From 2e4c95e83934737f22e9cb6336dc53b42e5e46be Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 09:57:07 -0500
Subject: [PATCH 001/201] serve: a llama.cpp engine behind the same boundary
 (--engine llama)

The Strata engine is CUDA. On a GPU without it - written for and measured on an Intel Arc Pro
B70 - the same GGUF weights run through llama.cpp's SYCL backend. serve/engine_llama.py puts
llama-server behind Engine.generate(ids, max_new, sampling, cancel), so the OpenAI and
Anthropic endpoints, streaming, tool calls, MCP and the web app are unchanged above it.

It sends the prompt as token ids (the server's own tokenizer, from the same GGUF) with
return_tokens, streams ids back with llama-server's timings mapped onto Strata's `last`,
heartbeats while a long prompt is read, and stops the server by closing the connection when a
client goes away. Attach to a running server ("llama": {"url"}) or spawn one ("llama": {"exe"}).

Not yet: images (Strata's Vision produces embeddings for the CUDA engine; llama-server takes
the image itself) - start without "vision" and image requests are refused cleanly.

Tests: a scripted llama-server (the wire format observed on b29c606), plus a live round trip
when STRATA_LLAMA_URL is set. Measured on the B70 with Coder IQ1_M: 23-25 tok/s decode,
~150 tok/s prefill, correct code, GPU-bound.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 serve/engine_llama.py      | 300 +++++++++++++++++++++++++++++++++++++
 serve/server.py            |  21 ++-
 serve/test_engine_llama.py | 197 ++++++++++++++++++++++++
 3 files changed, 516 insertions(+), 2 deletions(-)
 create mode 100644 serve/engine_llama.py
 create mode 100644 serve/test_engine_llama.py

diff --git a/serve/engine_llama.py b/serve/engine_llama.py
new file mode 100644
index 00000000000..948c8086349
--- /dev/null
+++ b/serve/engine_llama.py
@@ -0,0 +1,300 @@
+"""serve/engine_llama.py - Strata's engine boundary over llama.cpp's `llama-server`.
+
+The Strata engine (`strata --serve`) is CUDA: sm_80+ tensor-core kernels, cudaGraph, cuBLAS. On a GPU without
+CUDA - the Intel Arc Pro B70 this was written for - the same GGUF weights run through llama.cpp's SYCL backend.
+This class puts that engine behind the same boundary the server already speaks:
+
+    Engine.generate(prompt_ids, max_new, sampling, cancel) -> iterator of token ids   (None = heartbeat)
+
+so everything above it - the OpenAI and Anthropic endpoints, streaming, tool calls, MCP, the web app - is
+unchanged.  It talks to llama-server's `/completion` with the prompt AS TOKEN IDS (the server's own tokenizer
+produced them, from the same GGUF, so the ids agree) and `return_tokens`, which streams ids back one chunk
+at a time with the timings Strata reports.
+
+Two ways to get an engine:
+
+    LlamaEngine.attach("http://127.0.0.1:8081")            a llama-server someone else runs (a container, say)
+    LlamaEngine.spawn([exe, *args], log=..., cwd=...)      start `llama-server` ourselves and own its lifetime
+
+Both settle `max_context` from `/props` and expose the same `info` the Monitor tab reads.
+
+What it does not do (yet): images.  Strata's `Vision` encodes images with `strata-vision` into embeddings the
+CUDA engine reads (`GENI`); llama-server has its own multimodal path (`--mmproj`) that takes the image itself.
+Until that is wired, run the server with no `vision` in the config and it refuses image requests cleanly.
+"""
+from __future__ import annotations
+
+import http.client
+import json
+import os
+import subprocess
+import threading
+import time
+import urllib.error
+import urllib.parse
+import urllib.request
+from pathlib import Path
+from typing import Iterator
+
+HEARTBEAT_S = 10                 # yield None this often while the server is quiet (reading a long prompt)
+READY_TIMEOUT_S = 20 * 60        # a 30 GB model from a cold SSD can take this long to load
+STOP_TYPES = {"eos": "stop", "word": "stop", "limit": "length"}   # llama-server's stop_type -> Strata's finish
+
+
+class EngineDied(RuntimeError):
+    """The engine went away in the middle of a request."""
+
+
+class LlamaEngine:
+    def __init__(self, url: str, spawn: list[str] | None = None, cwd: str | None = None, log: str | None = None,
+                 env: dict | None = None, model_path: str = "", name: str = "llama.cpp"):
+        self.url = url.rstrip("/")
+        self.spawn_cmd, self.cwd, self.log_path, self.env = spawn, cwd, log, env
+        self.model_path = model_path
+        self.proc: subprocess.Popen | None = None
+        self.log = None
+        self.ended = False
+        self.max_context = 0
+        self.can_stop = True          # closing the HTTP response stops llama-server's generation
+        self.last: dict = {}
+        self.info: dict = {"engine": name}
+        self.progress = None          # llama-server reports no prompt-reading progress on this path
+        self._lock = threading.Lock()
+        if spawn:
+            self._start()
+        self._wait_ready()
+
+    # ------------------------------------------------------------------------------------ construction
+    @classmethod
+    def attach(cls, url: str, model_path: str = "") -> "LlamaEngine":
+        """Use a llama-server that is already running (started by hand, by a container, by the render front end)."""
+        return cls(url, model_path=model_path)
+
+    @classmethod
+    def spawn(cls, cmd: list[str], url: str, cwd: str | None = None, log: str | None = None,
+              env: dict | None = None, model_path: str = "") -> "LlamaEngine":
+        """Start `llama-server` ourselves.  `cmd` is the whole command line, `url` where it will listen."""
+        return cls(url, spawn=cmd, cwd=cwd, log=log, env=env, model_path=model_path)
+
+    def _start(self):
+        self.log = open(self.log_path, "a", encoding="utf-8") if self.log_path else subprocess.DEVNULL
+        self.proc = subprocess.Popen(self.spawn_cmd, cwd=self.cwd, stdout=self.log, stderr=subprocess.STDOUT,
+                                     env=self.env)
+        self.ended = False
+
+    def _wait_ready(self):
+        """`/health` says 503 until the model is loaded; `/props` answers once it is and carries n_ctx."""
+        t0 = time.time()
+        while True:
+            if self.proc is not None and self.proc.poll() is not None:
+                raise EngineDied(f"llama-server exited during load (code {self.proc.returncode})"
+                                 + (f"; see {self.log_path}" if self.log_path else ""))
+            try:
+                props = self._get("/props", timeout=5)
+                gen = props.get("default_generation_settings") or {}
+                self.max_context = int(gen.get("n_ctx") or 0)
+                if self.max_context:
+                    self.info.update(
+                        version=(props.get("build_info") or "").strip() or None,
+                        n_ctx=self.max_context,
+                        model=os.path.basename(props.get("model_path") or self.model_path or ""),
+                        modalities=",".join(k for k, v in (props.get("modalities") or {}).items() if v) or "text",
+                    )
+                    if not self.model_path:
+                        self.model_path = props.get("model_path") or ""
+                    return
+            except (urllib.error.URLError, http.client.HTTPException, OSError, ValueError):
+                pass
+            if time.time() - t0 > READY_TIMEOUT_S:
+                raise EngineDied(f"llama-server at {self.url} did not become ready in {READY_TIMEOUT_S // 60} min")
+            elapsed = int(time.time() - t0)
+            if elapsed and elapsed % 30 == 0:
+                print(f"[strata] still loading ({elapsed} s) - a 30 GB model takes a few minutes ...", flush=True)
+            time.sleep(1)
+
+    # ------------------------------------------------------------------------------------------ http
+    def _get(self, path: str, timeout: float = 30):
+        with urllib.request.urlopen(self.url + path, timeout=timeout) as r:
+            return json.loads(r.read().decode("utf-8"))
+
+    def _post_stream(self, path: str, body: dict, timeout: float):
+        req = urllib.request.Request(self.url + path, data=json.dumps(body).encode("utf-8"),
+                                     headers={"content-type": "application/json"})
+        return urllib.request.urlopen(req, timeout=timeout)
+
+    # -------------------------------------------------------------------------------------- generate
+    @staticmethod
+    def sampling_body(sampling: dict) -> dict:
+        """Strata's request sampling -> llama-server's field names.  Absent temperature means greedy, as the
+        CUDA engine does; a client's own values always win over the server's defaults."""
+        out: dict = {}
+        t = sampling.get("temperature")
+        out["temperature"] = float(t) if isinstance(t, (int, float)) and not isinstance(t, bool) and t > 0 else 0.0
+        for src, dst, lo in (("top_p", "top_p", 0.0), ("min_p", "min_p", 0.0),
+                             ("presence_penalty", "presence_penalty", None),
+                             ("frequency_penalty", "frequency_penalty", None),
+                             ("repetition_penalty", "repeat_penalty", None)):
+            v = sampling.get(src)
+            if isinstance(v, (int, float)) and not isinstance(v, bool):
+                out[dst] = float(v)
+        tk = sampling.get("top_k")
+        if isinstance(tk, int) and not isinstance(tk, bool) and tk >= 0:
+            out["top_k"] = tk
+        n = sampling.get("penalty_last_n")
+        if isinstance(n, int) and not isinstance(n, bool):
+            out["repeat_last_n"] = n
+        seed = sampling.get("seed")
+        if isinstance(seed, int) and not isinstance(seed, bool):
+            out["seed"] = seed
+        return out
+
+    def generate(self, ids: list[int], max_new: int, sampling: dict, cancel: threading.Event,
+                 embeddings=None) -> Iterator[int | None]:
+        """Yields token ids as llama-server streams them, and None every HEARTBEAT_S while it is quiet.
+        A consumer that stops early, or `cancel`, closes the response, which stops the generation server-side."""
+        if embeddings:
+            raise ValueError("images are not supported on the llama.cpp engine yet (start without vision)")
+        body = {"prompt": [int(t) for t in ids], "n_predict": int(max_new), "stream": True,
+                "return_tokens": True, "cache_prompt": True, **self.sampling_body(sampling or {})}
+        self.last = {}
+        self.progress = None
+        try:
+            resp = self._post_stream("/completion", body, timeout=HEARTBEAT_S)
+        except urllib.error.HTTPError as e:
+            detail = e.read().decode("utf-8", "replace")[:300]
+            raise ValueError(f"llama-server refused the request ({e.code}): {detail}") from None
+        except (urllib.error.URLError, OSError) as e:
+            raise EngineDied(f"llama-server is not answering: {e}") from None
+        finished = False
+        try:
+            buf = b""
+            while True:
+                if cancel.is_set():
+                    return
+                try:
+                    chunk = resp.read1(65536) if hasattr(resp, "read1") else resp.read(65536)
+                except TimeoutError:
+                    yield None                                # quiet: reading a long prompt
+                    continue
+                except (http.client.IncompleteRead, OSError) as e:
+                    raise EngineDied(f"the connection to llama-server broke mid-answer: {e}") from None
+                if not chunk:
+                    raise EngineDied("llama-server closed the stream without finishing")
+                buf += chunk
+                while b"\n" in buf:
+                    line, buf = buf.split(b"\n", 1)
+                    line = line.strip()
+                    if not line.startswith(b"data: "):
+                        continue
+                    ev = json.loads(line[6:])
+                    if "error" in ev:
+                        raise ValueError(str(ev["error"]))
+                    for t in ev.get("tokens") or []:
+                        if cancel.is_set():
+                            return
+                        yield int(t)
+                    if ev.get("stop"):
+                        tm = ev.get("timings") or {}
+                        self.last = {"generated": int(tm.get("predicted_n") or ev.get("tokens_predicted") or 0),
+                                     "prompt_tokens": int(tm.get("prompt_n") or ev.get("tokens_evaluated") or 0),
+                                     "prompt_ms": float(tm.get("prompt_ms") or 0.0),
+                                     "decode_ms": float(tm.get("predicted_ms") or 0.0),
+                                     "finish": STOP_TYPES.get(ev.get("stop_type"), "stop"),
+                                     "reused": int(tm.get("cache_n") or 0)}
+                        finished = True
+                        return
+        finally:
+            try:
+                resp.close()                                  # early stop: dropping the connection stops the server
+            except Exception:
+                pass
+            if not finished and not self.last:
+                self.last = {"finish": "cancelled"}
+
+    # ------------------------------------------------------------------------------------- lifecycle
+    def alive(self) -> bool:
+        if self.ended:
+            return False
+        if self.proc is not None:
+            return self.proc.poll() is None
+        try:
+            self._get("/health", timeout=3)
+            return True
+        except Exception:
+            return False
+
+    def exit_code(self):
+        if self.proc is None:
+            return None
+        try:
+            return self.proc.wait(timeout=5)
+        except subprocess.TimeoutExpired:
+            return None
+
+    def death_note(self) -> str:
+        tail = ""
+        try:
+            with open(self.log_path, "rb") as f:
+                f.seek(0, 2)
+                f.seek(max(0, f.tell() - 4096))
+                tail = f.read().decode("utf-8", "replace")
+        except (OSError, TypeError):
+            pass
+        low = tail.lower()
+        if "out of memory" in low or "sycl_out_of_memory" in low or "failed to allocate" in low:
+            return "the GPU ran out of memory (a smaller context, or fewer layers on the card)"
+        if "sigsegv" in low or "segmentation fault" in low:
+            return "llama-server crashed (if SYCL_CACHE_PERSISTENT is set, unset it: the JIT cache segfaults on Xe2)"
+        if self.proc is None:
+            return f"the llama-server at {self.url} stopped answering (it is not managed by this server)"
+        return "llama-server stopped; the end of its log:\n" + tail[-1200:]
+
+    def restart(self):
+        if self.proc is None:
+            self.ended = False
+            self._wait_ready()                              # attached: wait for whoever runs it to bring it back
+            return
+        try:
+            self.proc.kill()
+        except OSError:
+            pass
+        info = dict(self.info)
+        self._start()
+        self._wait_ready()
+        self.info = {**info, **self.info}
+
+    def close(self):
+        self.ended = True
+        if self.proc is None:
+            return
+        try:
+            self.proc.terminate()
+            self.proc.wait(timeout=15)
+        except Exception:
+            try:
+                self.proc.kill()
+            except OSError:
+                pass
+
+
+def engine_from_config(cfg: dict, env: dict | None = None) -> LlamaEngine:
+    """Build the engine the run config describes.
+
+        "llama": {"url": "http://127.0.0.1:8081"}                       attach to a running llama-server
+        "llama": {"exe": ".../llama-server", "args": [...], "port": 8081}  spawn it (args after -m/--port are ours)
+
+    `model` (the GGUF) is optional and only labels the Monitor tab when attached."""
+    L = cfg.get("llama") or {}
+    model = L.get("model") or cfg.get("model") or ""
+    if L.get("exe"):
+        port = int(L.get("port") or 8081)
+        host = L.get("host") or "127.0.0.1"
+        cmd = [L["exe"], *[str(a) for a in (L.get("args") or [])], "--host", host, "--port", str(port)]
+        if model and "-m" not in cmd and "--model" not in cmd:
+            cmd += ["-m", model]
+        return LlamaEngine.spawn(cmd, f"http://{host}:{port}", cwd=cfg.get("cwd"), log=cfg.get("log"), env=env,
+                                 model_path=model)
+    url = L.get("url")
+    if not url:
+        raise ValueError('the config\'s "llama" block needs either "url" (attach) or "exe" (spawn)')
+    return LlamaEngine.attach(url, model_path=model)
diff --git a/serve/server.py b/serve/server.py
index 7054d799922..b79047b0c84 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -1636,7 +1636,8 @@ def sampling_defaults_from_config(cfg: dict) -> dict:
 
 def main() -> int:
     ap = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)
-    ap.add_argument("--engine", choices=["mock", "strata"], default="mock")
+    ap.add_argument("--engine", choices=["mock", "strata", "llama"], default="mock",
+                    help="strata = the CUDA engine; llama = llama.cpp's llama-server (any GPU llama.cpp runs on, e.g. Intel Arc via SYCL); see serve/engine_llama.py")
     ap.add_argument("--config", help="strata engine config (JSON: exe, args, cwd, tokenizer, model_name), "
                                      "written by setup.py")
     ap.add_argument("--host", default=None,
@@ -1673,7 +1674,7 @@ def main() -> int:
         a.tokenizer = cfg["tokenizer"]
     tok = ByteTokenizer()
     tpath = Path(a.tokenizer)
-    if a.engine == "strata" and not (tpath / "vocab.json").exists():
+    if a.engine in ("strata", "llama") and not (tpath / "vocab.json").exists():
         ap.error(f"the model's tokenizer is missing ({tpath / 'vocab.json'}); run setup again")
     if (tpath / "vocab.json").exists():
         import strata_tokenizer as ST
@@ -1703,6 +1704,22 @@ def main() -> int:
             print(f"[strata] layer split across GPUs {gpu_list(cfg)} ({cfg.get('layer_split') or 'auto'})", flush=True)
         engine = StrataEngine(cfg["exe"], engine_args(cfg), cwd=cfg.get("cwd"), log=cfg.get("log"), env=env)
         warn_tight_ram(engine.info.get("arena_mib"))
+    elif a.engine == "llama":
+        if not cfg:
+            ap.error("--engine llama needs --config (with a \"llama\" block: url to attach, or exe to spawn)")
+        from serve.engine_llama import engine_from_config as llama_engine
+        vision = None                                       # images: not on this engine yet (engine_llama.py)
+        sampling_defaults = sampling_defaults_from_config(cfg)
+        if sampling_defaults:
+            pretty = ", ".join(f"{k}={v}" for k, v in sampling_defaults.items())
+            print(f"[strata] sampling defaults from the config: {pretty}", flush=True)
+        if cfg.get("vision"):
+            print("[strata] note: \"vision\" in the config is ignored on the llama engine (images not wired yet)",
+                  flush=True)
+        print("connecting to llama-server (or starting it: a 30 GB model takes a few minutes) ...", flush=True)
+        engine = llama_engine(cfg, env=child_env(cfg))
+        print(f"[strata] llama.cpp engine up: {engine.info.get('model') or engine.model_path}, "
+              f"context {engine.max_context}, build {engine.info.get('version') or '?'}", flush=True)
     else:
         engine, vision, sampling_defaults = MockEngine(tok, a.script or [
             "Thinking about it.</think>\n\nHello from the mock engine."]), None, {}
diff --git a/serve/test_engine_llama.py b/serve/test_engine_llama.py
new file mode 100644
index 00000000000..77369ff32e1
--- /dev/null
+++ b/serve/test_engine_llama.py
@@ -0,0 +1,197 @@
+"""serve/test_engine_llama.py - the llama.cpp engine boundary, against a scripted llama-server (no GPU).
+
+    python -m unittest serve.test_engine_llama -v
+    STRATA_LLAMA_URL=http://<your-box>:8081 python -m unittest serve.test_engine_llama -v     (+ the live test)
+
+The stub speaks exactly what the real llama-server was observed to send on 2026-09-29 (llama.cpp b29c606):
+`/props` with default_generation_settings.n_ctx, and `/completion` streaming `data: {...}` lines with
+`tokens`, `stop`, and on the last line `stop_type` and `timings`.
+"""
+from __future__ import annotations
+
+import json
+import os
+import sys
+import threading
+import time
+import unittest
+import urllib.request
+from http.server import BaseHTTPRequestHandler, ThreadingHTTPServer
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parents[1]))
+from serve.engine_llama import EngineDied, LlamaEngine, engine_from_config  # noqa: E402
+
+N_CTX = 4096
+
+
+class Stub(BaseHTTPRequestHandler):
+    """A llama-server that streams a scripted list of ids, one per chunk, slowly enough to test cancel."""
+    script: list[int] = []
+    delay_s = 0.0
+    seen: list[dict] = []
+    error: str | None = None
+    stop_type = "eos"
+
+    def log_message(self, *a):
+        pass
+
+    def do_GET(self):
+        if self.path == "/props":
+            body = {"default_generation_settings": {"n_ctx": N_CTX}, "build_info": "stub-1",
+                    "model_path": "/models/stub.gguf", "modalities": {"vision": False}}
+        elif self.path == "/health":
+            body = {"status": "ok"}
+        else:
+            self.send_response(404); self.end_headers(); return
+        b = json.dumps(body).encode()
+        self.send_response(200); self.send_header("content-type", "application/json")
+        self.send_header("content-length", str(len(b))); self.end_headers(); self.wfile.write(b)
+
+    def do_POST(self):
+        n = int(self.headers.get("content-length") or 0)
+        req = json.loads(self.rfile.read(n))
+        Stub.seen.append(req)
+        self.send_response(200); self.send_header("content-type", "text/event-stream"); self.end_headers()
+        if Stub.error:
+            self.wfile.write(f"data: {json.dumps({'error': Stub.error})}\n\n".encode()); self.wfile.flush(); return
+        ids = Stub.script[: int(req["n_predict"])]
+        for i, t in enumerate(ids):
+            last = i == len(ids) - 1
+            ev = {"tokens": [t], "content": "x", "stop": last, "tokens_predicted": i + 1,
+                  "tokens_evaluated": len(req["prompt"])}
+            if last:
+                ev["stop_type"] = Stub.stop_type if len(ids) == len(Stub.script) else "limit"
+                ev["timings"] = {"prompt_n": len(req["prompt"]), "prompt_ms": 12.5, "predicted_n": len(ids),
+                                 "predicted_ms": 40.0, "cache_n": 3}
+            try:
+                self.wfile.write(f"data: {json.dumps(ev)}\n\n".encode()); self.wfile.flush()
+            except (BrokenPipeError, ConnectionResetError):
+                Stub.seen[-1]["broken_at"] = i
+                return
+            if Stub.delay_s and not last:
+                time.sleep(Stub.delay_s)
+
+
+class Offline(unittest.TestCase):
+    @classmethod
+    def setUpClass(cls):
+        cls.httpd = ThreadingHTTPServer(("127.0.0.1", 0), Stub)
+        threading.Thread(target=cls.httpd.serve_forever, daemon=True).start()
+        cls.url = f"http://127.0.0.1:{cls.httpd.server_address[1]}"
+
+    @classmethod
+    def tearDownClass(cls):
+        cls.httpd.shutdown(); cls.httpd.server_close()
+
+    def setUp(self):
+        Stub.script, Stub.delay_s, Stub.seen, Stub.error, Stub.stop_type = [11, 22, 33, 44, 55], 0.0, [], None, "eos"
+
+    def test_attach_reads_context_and_info(self):
+        e = LlamaEngine.attach(self.url)
+        self.assertEqual(e.max_context, N_CTX)
+        self.assertEqual(e.info["version"], "stub-1")
+        self.assertEqual(e.info["model"], "stub.gguf")
+        self.assertTrue(e.alive())
+
+    def test_generate_streams_ids_and_reports_timings(self):
+        e = LlamaEngine.attach(self.url)
+        out = [t for t in e.generate([1, 2, 3], 10, {"temperature": 0.7, "top_k": 20}, threading.Event())
+               if t is not None]
+        self.assertEqual(out, [11, 22, 33, 44, 55])
+        self.assertEqual(e.last["generated"], 5)
+        self.assertEqual(e.last["prompt_tokens"], 3)
+        self.assertEqual(e.last["finish"], "stop")
+        self.assertEqual(e.last["reused"], 3)
+        self.assertAlmostEqual(e.last["prompt_ms"], 12.5)
+        req = Stub.seen[-1]
+        self.assertEqual(req["prompt"], [1, 2, 3])            # ids, not text
+        self.assertTrue(req["return_tokens"] and req["stream"] and req["cache_prompt"])
+        self.assertAlmostEqual(req["temperature"], 0.7)
+        self.assertEqual(req["top_k"], 20)
+
+    def test_max_new_caps_and_maps_to_length(self):
+        e = LlamaEngine.attach(self.url)
+        out = [t for t in e.generate([1], 2, {}, threading.Event()) if t is not None]
+        self.assertEqual(out, [11, 22])
+        self.assertEqual(e.last["finish"], "length")
+
+    def test_greedy_when_no_temperature(self):
+        e = LlamaEngine.attach(self.url)
+        list(e.generate([1], 1, {}, threading.Event()))
+        self.assertEqual(Stub.seen[-1]["temperature"], 0.0)
+
+    def test_cancel_stops_early_and_closes_the_stream(self):
+        Stub.delay_s = 0.05
+        e = LlamaEngine.attach(self.url)
+        cancel = threading.Event()
+        got = []
+        for t in e.generate([1], 5, {}, cancel):
+            if t is not None:
+                got.append(t)
+                if len(got) == 2:
+                    cancel.set()
+        self.assertEqual(got, [11, 22])
+        self.assertEqual(e.last, {"finish": "cancelled"})
+        time.sleep(0.3)                                       # the stub notices the closed socket on its next write
+        self.assertIn("broken_at", Stub.seen[-1])
+
+    def test_consumer_stopping_early_closes_the_stream(self):
+        Stub.delay_s = 0.05
+        e = LlamaEngine.attach(self.url)
+        gen = e.generate([1], 5, {}, threading.Event())
+        self.assertEqual(next(t for t in gen if t is not None), 11)
+        gen.close()
+        time.sleep(0.3)
+        self.assertIn("broken_at", Stub.seen[-1])
+
+    def test_server_error_event_is_a_value_error(self):
+        Stub.error = "context too long"
+        e = LlamaEngine.attach(self.url)
+        with self.assertRaises(ValueError):
+            list(e.generate([1], 1, {}, threading.Event()))
+
+    def test_images_refused_clearly(self):
+        e = LlamaEngine.attach(self.url)
+        with self.assertRaises(ValueError):
+            list(e.generate([1], 1, {}, threading.Event(), embeddings="/tmp/x.sve"))
+
+    def test_sampling_body_mapping(self):
+        b = LlamaEngine.sampling_body({"temperature": 0, "top_p": 0.9, "min_p": 0.05, "repetition_penalty": 1.1,
+                                       "presence_penalty": 1.5, "penalty_last_n": 64, "seed": 7, "top_k": 0})
+        self.assertEqual(b, {"temperature": 0.0, "top_p": 0.9, "min_p": 0.05, "repeat_penalty": 1.1,
+                             "presence_penalty": 1.5, "repeat_last_n": 64, "seed": 7, "top_k": 0})
+
+    def test_engine_from_config_attach(self):
+        e = engine_from_config({"llama": {"url": self.url, "model": "/m/x.gguf"}})
+        self.assertEqual(e.model_path, "/m/x.gguf")
+        with self.assertRaises(ValueError):
+            engine_from_config({"llama": {}})
+
+    def test_attach_to_nothing_dies_quickly(self):
+        import serve.engine_llama as M
+        old = M.READY_TIMEOUT_S
+        M.READY_TIMEOUT_S = 2
+        try:
+            with self.assertRaises(EngineDied):
+                LlamaEngine.attach("http://127.0.0.1:9")
+        finally:
+            M.READY_TIMEOUT_S = old
+
+
+@unittest.skipUnless(os.environ.get("STRATA_LLAMA_URL"), "set STRATA_LLAMA_URL to test against a live llama-server")
+class Live(unittest.TestCase):
+    def test_round_trip(self):
+        e = LlamaEngine.attach(os.environ["STRATA_LLAMA_URL"])
+        self.assertGreater(e.max_context, 0)
+        ids = json.loads(urllib.request.urlopen(urllib.request.Request(
+            e.url + "/tokenize", data=json.dumps({"content": "def fib(n):", "add_special": True}).encode(),
+            headers={"content-type": "application/json"}), timeout=30).read())["tokens"]
+        out = [t for t in e.generate(ids, 8, {"temperature": 0}, threading.Event()) if t is not None]
+        self.assertEqual(len(out), 8)
+        self.assertEqual(e.last["generated"], 8)
+        self.assertGreater(e.last["decode_ms"], 0)
+
+
+if __name__ == "__main__":
+    unittest.main()

From 43cd6bdb5833b98ce8df0ff3ebf2ae51be06b47a Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 10:12:32 -0500
Subject: [PATCH 002/201] setup: an Intel Arc path (no CUDA), and the run
 script starts llama-server itself

Without nvidia-smi, setup now looks for an Intel discrete GPU in sysfs (vendor 0x8086 under xe or
i915, named by PCI id - lspci's database does not know an Arc Pro B70 yet) and takes a path with no
compiler and no CUDA toolkit: download the model, export the tokenizer, find a llama-server
(--llama-server PATH, one on PATH, or the B70 container image via docker), write a config with a
"llama" block and a start-llama.sh, and a run script that uses --engine llama.

The CUDA engine's rules that do not apply are stepped around rather than deleted: the compute
capability and driver-version checks, the experts-in-RAM gates (on llama.cpp the fit is VRAM,
shard 1 = the download minus the 28.8 GB lookup table), the MTP draft download (5 GB the llama
engine cannot use), and the engine's own argument list.

engine_from_config runs the config's start script when nothing answers at the url, so the run
script is one click and closing the server stops the container.

Verified on an Arc Pro B70: setup runs steps 1-7 clean against the downloaded Coder IQ1_M.
docs/INTEL.md has the whole picture and the measurements.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md             |   2 +-
 docs/INTEL.md         |  93 +++++++++++++
 serve/engine_llama.py |  18 ++-
 setup.py              | 307 +++++++++++++++++++++++++++++++-----------
 4 files changed, 340 insertions(+), 80 deletions(-)
 create mode 100644 docs/INTEL.md

diff --git a/README.md b/README.md
index b72f6470c6e..1218a71bed6 100644
--- a/README.md
+++ b/README.md
@@ -1,7 +1,7 @@
 <h1 align="center">Strata</h1>
 
 <p align="center"><b>Run a 125-billion-parameter AI model on a normal gaming PC</b><br>
-one NVIDIA card (12-24 GB) + 64 GB of RAM · Windows or Linux · one click to install</p>
+one NVIDIA card (12-24 GB) + 64 GB of RAM · Windows or Linux · one click to install<br>or an <b>Intel Arc</b> (32 GB) with llama.cpp underneath: <a href="docs/INTEL.md">docs/INTEL.md</a></p>
 
 <p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="A voxel pagoda garden that Strata's model wrote, running in the browser"></a><br>
 <sub>A voxel pagoda garden, 1 shot prompt running on an RTX 5070 with Strata (IQ3_S, 128K context) ·
diff --git a/docs/INTEL.md b/docs/INTEL.md
new file mode 100644
index 00000000000..5bb8ea6e949
--- /dev/null
+++ b/docs/INTEL.md
@@ -0,0 +1,93 @@
+# Strata on an Intel Arc
+
+Strata's engine is CUDA. On an Intel Arc the same model runs behind the same Strata server, with
+llama.cpp's SYCL backend doing the arithmetic. Everything above the engine - the OpenAI and Anthropic
+APIs, streaming, tool calls, MCP, the web app - is unchanged.
+
+Written for and measured on an **Arc Pro B70 (32 GB)** running the Coder (IQ1_M) on Ubuntu 24.04.
+
+## What you get
+
+| | NVIDIA (Strata engine) | Intel Arc (llama.cpp engine) |
+|---|---|---|
+| model files | the same GGUFs | the same GGUFs |
+| where the model lives | experts in RAM, hot ones on the card | **all of shard 1 on the card** (it fits a 32 GB card); shard 2's lookup table paged from disk |
+| RAM needed | 32-64 GB | little: the model is on the card (23 GB was fine) |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | 23-25 tok/s on the B70 |
+| prompt reading | ~1,870 tok/s | ~150 tok/s |
+| speculative decoding (MTP) | yes | no (the GGUF carries no draft layer llama.cpp can use) |
+| images | yes | not yet |
+| context | up to 262K | 32K by default; more as VRAM allows |
+
+The speed gap is the SYCL backend's known state on Battlemage: general matrix multiplies do not use
+the XMX units yet (only the oneDNN flash-attention path does). It is upstream llama.cpp work, not
+something in Strata. Decode is GPU-bound at 90%+ busy, so nothing is falling back to the CPU.
+
+## Setup
+
+    ./setup.sh
+
+Setup notices the Arc (no `nvidia-smi`; an Intel GPU under the `xe` or `i915` driver in sysfs), says
+so, and takes the Intel path: no compiler, no CUDA toolkit. It downloads the model, exports the
+tokenizer, finds a `llama-server`, and writes a config with a `"llama"` block and a start script.
+
+Where the `llama-server` comes from, in order:
+
+1. `--llama-server PATH` - a llama.cpp you built yourself with `-DGGML_SYCL=ON` (needs oneAPI).
+2. `llama-server` on PATH.
+3. A container: `ghcr.io/snailium/llama.cpp-sycl-intel-b70/llama-sycl-b70:stable`, a community SYCL
+   build for Battlemage (llama.cpp 0.4.1, IntelLLVM 2026.1, AOT for bmg-g31). Needs docker and the
+   `render` and `video` groups. Setup writes `start-llama.sh`, which runs it with the GPU passed
+   through and the right environment. The run script starts it when nothing is answering yet.
+
+Then `run-<model>.sh` (or `./setup.sh` again) starts the model. First start of a 30 GB model: about
+two minutes.
+
+## The config
+
+```json
+{
+ "engine": "llama",
+ "tokenizer": ".../packs/coder-iq1_m/tokenizer",
+ "llama": {
+  "url":   "http://127.0.0.1:8081",
+  "model": ".../Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-00001-of-00002.gguf",
+  "start": ".../start-llama.sh",
+  "image": "ghcr.io/snailium/llama.cpp-sycl-intel-b70/llama-sycl-b70:stable"
+ }
+}
+```
+
+`url` attaches to a running llama-server; `start` is run first if nothing answers there. A config
+with `"exe"` and `"args"` instead spawns a native binary directly. See `serve/engine_llama.py`.
+
+## Things that matter on this GPU
+
+- **`SYCL_CACHE_PERSISTENT` must be 0.** The persistent JIT cache segfaults on Xe2 during the first
+  compile. The start script sets it; if you run llama-server by hand, do too.
+- **The whole model goes on the card** (`--n-gpu-layers 999`), except `per_layer_token_embd.weight`,
+  the single 28.8 GB tensor of shard 2. `--override-tensor per_layer_token_embd=CPU` keeps it in host
+  memory, mmapped and paged from the SSD by row, which is how the model's authors serve it. Host RSS
+  stays around 2 GB.
+- **Thinking.** The model reasons before it answers. Strata's web app has the setting; for an API
+  client, put `{"reasoning_effort": "none"}` in `strata-<model>.shared-settings.json` next to the
+  config, or send `chat_template_kwargs: {"enable_thinking": false}` per request. Without one of
+  those a short `max_tokens` is spent entirely inside the think block and the answer looks empty.
+- **`/health` says 503 while loading**; the server polls `/props` instead.
+
+## Not done
+
+- Images. Strata's vision path encodes with `strata-vision` into embeddings the CUDA engine reads;
+  llama-server takes the image itself (`--mmproj`). Wiring that is the next piece.
+- Speculative decoding. Strata's MTP draft is its own packed format; the GGUF has none.
+- The expert-residency profile and n-gram lookup: moot with the model on the card.
+
+## Measured, 2026-09-29, Arc Pro B70, Coder IQ1_M, 32K context, q8_0 KV
+
+| | |
+|---|---|
+| load | ~100 s |
+| VRAM | 28.4 of 32 GB |
+| decode | 23-25 tok/s; GPU 92% busy at 165 W, CPU idle |
+| prefill | 149 tok/s on a 2,701-token code prompt |
+| quality | correct code on every test; matches the NVIDIA path token for token in spirit, not measured |
diff --git a/serve/engine_llama.py b/serve/engine_llama.py
index 948c8086349..efd99bd2910 100644
--- a/serve/engine_llama.py
+++ b/serve/engine_llama.py
@@ -269,7 +269,7 @@ def close(self):
             return
         try:
             self.proc.terminate()
-            self.proc.wait(timeout=15)
+            self.proc.wait(timeout=60)      # a container unloading 30 GB takes a moment
         except Exception:
             try:
                 self.proc.kill()
@@ -297,4 +297,20 @@ def engine_from_config(cfg: dict, env: dict | None = None) -> LlamaEngine:
     url = L.get("url")
     if not url:
         raise ValueError('the config\'s "llama" block needs either "url" (attach) or "exe" (spawn)')
+    start = L.get("start")
+    if start and not _answering(url):
+        # setup wrote a start script (a container that owns the GPU): run it as our child, so the run script is
+        # one click and closing the server stops the container. If something already answers at the url, use it.
+        print(f"[strata] starting llama-server: {start}", flush=True)
+        return LlamaEngine.spawn([start], url, cwd=cfg.get("cwd"), log=cfg.get("log"), env=env, model_path=model)
     return LlamaEngine.attach(url, model_path=model)
+
+
+def _answering(url: str) -> bool:
+    try:
+        with urllib.request.urlopen(url.rstrip("/") + "/health", timeout=3) as r:
+            return r.status < 500
+    except urllib.error.HTTPError as e:
+        return e.code < 500                 # 503 = loading: someone is already bringing it up
+    except Exception:
+        return False
diff --git a/setup.py b/setup.py
index e9b07f50b73..477e550ad1b 100644
--- a/setup.py
+++ b/setup.py
@@ -274,6 +274,93 @@ def gpus():
     return found
 
 
+# ---------------------------------------------------------------- Intel Arc: the llama.cpp backend
+# Strata's engine is CUDA. On an Intel Arc the same GGUF runs through llama.cpp's SYCL backend behind the same
+# server (serve/engine_llama.py). Setup then needs no compiler and no CUDA: it downloads the model, exports the
+# tokenizer, finds a llama-server and writes a config that attaches to (or spawns) it. Measured on an Arc Pro
+# B70 with the Coder IQ1_M: the whole 29.6 GB shard on the card, 23-25 tok/s decode. docs/INTEL.md.
+LLAMA_IMAGE = "ghcr.io/snailium/llama.cpp-sycl-intel-b70/llama-sycl-b70:stable"   # a community SYCL build
+
+
+# Battlemage / Alchemist PCI device ids -> (name, VRAM GB). lspci's database lags new cards (an Arc Pro B70
+# reads "Intel Corporation Device [8086:e223]"), so sysfs ids are the reliable signal, and the name table is ours.
+INTEL_ARC = {"e223": ("Arc Pro B70", 32.0), "e221": ("Arc Pro B60", 24.0), "e20b": ("Arc B580", 12.0),
+             "e20c": ("Arc B570", 10.0), "e212": ("Arc B50", 16.0),
+             "56a0": ("Arc A770", 16.0), "56a1": ("Arc A750", 8.0), "56a2": ("Arc A580", 8.0),
+             "56a5": ("Arc A380", 6.0), "56a6": ("Arc A310", 4.0), "5690": ("Arc A770M", 16.0)}
+
+
+def intel_gpus():
+    """Intel discrete GPUs from sysfs: vendor 0x8086 under the xe or i915 driver, named by PCI device id. VRAM
+    comes from the id table, else from clinfo's global memory size when it is installed."""
+    found = []
+    for card in sorted(Path("/sys/class/drm").glob("card[0-9]*")):
+        dev = card / "device"
+        try:
+            vendor = (dev / "vendor").read_text().strip().lower()
+            devid = (dev / "device").read_text().strip().lower().replace("0x", "")
+            driver = os.path.basename(os.path.realpath(dev / "driver")) if (dev / "driver").exists() else ""
+        except OSError:
+            continue
+        if vendor != "0x8086" or driver not in ("xe", "i915"):
+            continue
+        name, vram = INTEL_ARC.get(devid, (None, 0.0))
+        if name is None:
+            if driver != "xe":                      # i915 without a known Arc id is an integrated GPU: not for this
+                continue
+            name = f"Intel GPU {devid} (xe)"
+        if not vram:
+            m = re.search(r"Global memory size\s+(\d+)", out(["clinfo"]))
+            vram = int(m.group(1)) / 2**30 if m else 0.0
+        found.append({"index": len(found), "name": name, "vram_gb": vram, "arch": "sycl", "driver": driver,
+                      "pci_id": devid})
+    return found
+
+
+def llama_block(kind, server, gguf, context, port):
+    """The config's "llama" block: how serve/engine_llama.py gets its llama-server.
+
+    A binary is spawned by the server itself. A container is attached to: docker owns the GPU passthrough
+    and the SYCL environment (the persistent JIT cache must be OFF on Xe2, it segfaults), and this writes a
+    start-llama script beside the config that runs it. Either way the whole model goes on the card
+    (--n-gpu-layers 999) except the per-layer embedding table, the single tensor of shard 2, which stays
+    mmapped in host memory and is paged from disk by row, as the model's authors serve it."""
+    common = ["--n-gpu-layers", "999", "--override-tensor", "per_layer_token_embd=CPU",
+              "--ctx-size", str(int(context)), "--cache-type-k", "q8_0", "--cache-type-v", "q8_0",
+              "--flash-attn", "on", "--parallel", "1"]
+    if kind == "exe":
+        return {"exe": server, "args": common, "port": port, "host": "127.0.0.1", "model": str(gguf)}
+    gguf = Path(gguf).resolve()
+    script = ROOT / "start-llama.sh"
+    script.write_text(
+        "#!/bin/sh\n# llama-server for Strata on an Intel Arc, in a container that owns the GPU.\n"
+        f"exec docker run --rm --name strata-llama --device /dev/dri \\\n"
+        f"  --group-add $(getent group render | cut -d: -f3) --group-add $(getent group video | cut -d: -f3) \\\n"
+        f"  -v \"{gguf.parent}\":/models:ro -p 127.0.0.1:{port}:8080 \\\n"
+        "  -e ONEAPI_DEVICE_SELECTOR=level_zero:0 -e SYCL_CACHE_PERSISTENT=0 -e ZES_ENABLE_SYSMAN=1 \\\n"
+        f"  {server} -m /models/{gguf.name} " + " ".join(common) + " --port 8080 --host 0.0.0.0\n",
+        encoding="utf-8")
+    script.chmod(0o755)
+    return {"url": f"http://127.0.0.1:{port}", "model": str(gguf), "start": str(script), "image": server}
+
+
+def find_llama_server(explicit=None):
+    """A llama-server for the Intel path: --llama-server PATH, else one on PATH, else the container image if
+    docker is here. Returns (kind, value): ("exe", path) to spawn, ("image", name) to run in docker."""
+    if explicit:
+        if explicit.startswith(("ghcr.io/", "docker.io/")) or "/" in explicit and not Path(explicit).exists():
+            return "image", explicit
+        return "exe", str(Path(explicit).resolve())
+    exe = shutil.which("llama-server")
+    if exe:
+        return "exe", exe
+    if shutil.which("docker") and out(["docker", "image", "inspect", LLAMA_IMAGE, "--format", "{{.Id}}"]).strip():
+        return "image", LLAMA_IMAGE
+    if shutil.which("docker"):
+        return "image", LLAMA_IMAGE       # not pulled yet: docker run pulls it (9 GB) on first start
+    return None, None
+
+
 GPU_PICK = None                                         # --gpu N (issue #51); None: the card with the most VRAM
 SPLIT_MIN_VRAM_GB = 8                                   # a card sharing a model holds the dense weights and its own
                                                         # prompt buffers too (docs/MULTI_GPU.md)
@@ -1262,8 +1349,8 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
     return subprocess.call(cmd)
 
 
-def write_run_script(model, cfg_path, port):
-    serve = [sys.executable, str(ROOT / "serve" / "server.py"), "--engine", "strata", "--config", str(cfg_path),
+def write_run_script(model, cfg_path, port, engine="strata"):
+    serve = [sys.executable, str(ROOT / "serve" / "server.py"), "--engine", engine, "--config", str(cfg_path),
              "--port", str(port), "--open"]
     if WIN:
         script = ROOT / f"run-{model.lower()}.bat"
@@ -1286,6 +1373,9 @@ def main() -> int:
     ap.add_argument("--kv", choices=["int8", "q4_0"],
                     help="KV cache precision above 8K context: int8 (default) or q4_0 (half the memory, a little less "
                          "precise)")
+    ap.add_argument("--llama-server", metavar="PATH|IMAGE",
+                    help="Intel Arc only: the llama-server to run the model with (a binary built with -DGGML_SYCL=ON, "
+                         "or a container image); default: one on PATH, else the B70 image via docker")
     ap.add_argument("--vision", choices=["yes", "no", "none", "gpu", "cpu"],
                     help="let the model read images (yes = the encoder on the GPU)")
     ap.add_argument("--experimental-speed-projection", metavar="on|off|GGUF",
@@ -1385,29 +1475,63 @@ def main() -> int:
     # ---- 1. the PC
     step(1, "checking your PC")
     found = gpus()
+    backend = "cuda"
     if not found:
-        fail("no NVIDIA GPU found (nvidia-smi did not answer)",
-             "install the NVIDIA driver from https://www.nvidia.com/drivers and restart the PC")
-    if len(found) > 1 or gpu_problem(found[0]) is not None:
-        gpu_table(found)
-    sel = choose_gpus(a, found)                        # asked when two or more cards can share the model
-    multi = sel if len(sel) > 1 else []
-    a.gpu = sel[0]                                     # the main GPU: the checks and the sizing below are its
-    GPU_PICK = a.gpu
-    gpu = gpu_info(a.gpu)
-    chosen = [gpu_info(i) for i in sel]
-    gpu["archs"] = sorted({x["arch"] for x in chosen})  # the engine needs code for every one of them
+        intel = intel_gpus()
+        if intel:
+            backend = "llama"
+            g = max(intel, key=lambda x: x["vram_gb"])
+            ok(f"Intel {g['name']} ({g['vram_gb']:.0f} GB): using llama.cpp's SYCL backend instead of the CUDA engine")
+            if a.vision not in (None, "no", "none"):
+                warn("images are not wired on the llama.cpp engine yet: continuing without vision")
+            a.vision = "none"
+            found = intel
+        else:
+            fail("no NVIDIA or Intel Arc GPU found (nvidia-smi did not answer, sycl-ls/lspci show no Arc)",
+                 "install the NVIDIA driver from https://www.nvidia.com/drivers and restart the PC")
+    if backend != "llama" and (len(found) > 1 or gpu_problem(found[0]) is not None):
+        gpu_table(found)                               # CUDA compute-capability checks; not for an Intel card
+    if backend == "llama":
+        sel, multi = [found[0]["index"]], []
+        a.gpu = sel[0]
+        GPU_PICK = a.gpu
+        gpu = {**found[0], "count": len(found), "archs": ["sycl"]}
+        chosen = [gpu]                                 # the one card the model runs on (no layer split here)
+    else:
+        sel = choose_gpus(a, found)                    # asked when two or more cards can share the model
+        multi = sel if len(sel) > 1 else []
+        a.gpu = sel[0]                                 # the main GPU: the checks and the sizing below are its
+        GPU_PICK = a.gpu
+        gpu = gpu_info(a.gpu)
+        chosen = [gpu_info(i) for i in sel]
+        gpu["archs"] = sorted({x["arch"] for x in chosen})  # the engine needs code for every one of them
     if multi:
         ok("GPUs: " + " + ".join(gpu_name(x) for x in chosen) + " together (the model's layers are split across them)")
-    ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, compute capability {cc(gpu)}, driver {gpu['driver']}")
-    if driver_major(gpu) < MIN_DRIVER:
-        fail(f"the NVIDIA driver is too old ({gpu['driver']}; {MIN_DRIVER} or newer is needed)",
-             "update it with the NVIDIA App or from https://www.nvidia.com/drivers, restart, and run this again")
+    if backend == "llama":
+        ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, {gpu['driver']} driver, SYCL via llama.cpp")
+    else:
+        ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, compute capability {cc(gpu)}, driver {gpu['driver']}")
+        if driver_major(gpu) < MIN_DRIVER:
+            fail(f"the NVIDIA driver is too old ({gpu['driver']}; {MIN_DRIVER} or newer is needed)",
+                 "update it with the NVIDIA App or from https://www.nvidia.com/drivers, restart, and run this again")
     if gpu["vram_gb"] < 11:
         warn("less than 12 GB of VRAM: Strata will run, but most experts stay on the CPU and it will be slow")
     ram = ram_gb()
     cpu, avx2, avx512 = cpu_info()
     need = min(d["ram_gb"] for d in MODELS.values())
+    if backend == "llama":
+        # The CUDA engine keeps every expert in RAM. llama.cpp puts the whole first shard on the card and only
+        # the second shard's lookup table (28.8 GB, read by row) in host memory as page cache, so the fit is a
+        # VRAM question: shard 1 = the download minus that table. Below that, experts spill to RAM (slower).
+        need = 8
+        fit = {m: round(d["download_gb"] - 28.8, 1) for m, d in MODELS.items()}
+        best = [m for m, g in fit.items() if g + 1.5 <= gpu["vram_gb"]]
+        if best:
+            ok(f"VRAM: {gpu['vram_gb']:.0f} GB fits the whole model for " + ", ".join(best) +
+               f" (shard 1: " + ", ".join(f"{m} {g} GB" for m, g in fit.items() if m in best) + ")")
+        else:
+            warn(f"VRAM: {gpu['vram_gb']:.0f} GB is less than any shard 1 (" +
+                 ", ".join(f"{m} {g} GB" for m, g in fit.items()) + "): experts will spill to RAM and it will be slow")
     if ram < need - 4 and not a.check:
         # every model keeps ALL its experts in RAM (23+ GB); VRAM only holds a copy of the most-used ones, so a
         # bigger GPU does not lower this
@@ -1451,21 +1575,22 @@ def main() -> int:
         fail(f"{fam['title']} has no {a.model} model file", "choose one of: " + ", ".join(names))
     for i, m in enumerate(names, 1):
         d = MODELS[m]
-        fit = "" if ram >= d["ram_gb"] else f"   <- needs {d['ram_gb']} GB RAM, you have {ram:.0f}"
+        fit = "" if ram >= d["ram_gb"] or backend == "llama" else f"   <- needs {d['ram_gb']} GB RAM, you have {ram:.0f}"
         say(f"  {i}) {m:8s} {d['about']}; download {d['download_gb']:.0f} GB, uses ~{d['arena_gb']:.0f} GB of RAM{fit}")
     rec = str(names.index("IQ3_XXS") + 1) if ram >= 60 and "IQ3_XXS" in names else "1"
     model = a.model or names[int(ask("Which size?", [str(i) for i in range(1, len(names) + 1)], rec, a.yes)) - 1]
-    if ram < MODELS[model]["ram_gb"] - 4:
-        # #125: a warning and a question, not a stop: the user may accept paging (asked, "no" by default, so an
-        # unattended --yes install still stops here)
-        need_gb, arena = MODELS[model]["ram_gb"], MODELS[model]["arena_gb"]
-        warn(f"{model} needs about {need_gb} GB of RAM and this PC has {ram:.0f} GB: its experts alone are "
-             f"{arena:.0f} GB and must stay in RAM, so Windows/Linux will page part of them from disk. Expect it "
-             "to be much slower, and it may not start at all.")
-        say("       A smaller size (Q2_0 or IQ2_XS) fits; more RAM fixes it.")
-        if ask("  Install it anyway?", ["y", "n"], "n", a.yes) != "y":
-            fail(f"{model} needs about {need_gb} GB of RAM; this PC has {ram:.0f} GB",
-                 "choose Q2_0 or IQ2_XS, or add RAM")
+    if backend != "llama":                          # the CUDA engine's experts-in-RAM rule; on llama.cpp the fit is VRAM (step 1)
+        if ram < MODELS[model]["ram_gb"] - 4:
+            # #125: a warning and a question, not a stop: the user may accept paging (asked, "no" by default, so an
+            # unattended --yes install still stops here)
+            need_gb, arena = MODELS[model]["ram_gb"], MODELS[model]["arena_gb"]
+            warn(f"{model} needs about {need_gb} GB of RAM and this PC has {ram:.0f} GB: its experts alone are "
+                 f"{arena:.0f} GB and must stay in RAM, so Windows/Linux will page part of them from disk. Expect it "
+                 "to be much slower, and it may not start at all.")
+            say("       A smaller size (Q2_0 or IQ2_XS) fits; more RAM fixes it.")
+            if ask("  Install it anyway?", ["y", "n"], "n", a.yes) != "y":
+                fail(f"{model} needs about {need_gb} GB of RAM; this PC has {ram:.0f} GB",
+                     "choose Q2_0 or IQ2_XS, or add RAM")
         warn(f"installing {model} with {ram:.0f} GB of RAM, as you chose")
     ok(f"size: {model}")
     tag = fam["tag"] + model                           # names of the pack, config and start script
@@ -1546,17 +1671,28 @@ def main() -> int:
     step(4, "the Strata engine")
     llama = get_llama_cpp()
     ok(f"llama.cpp {LLAMA_CPP_COMMIT[:7]} (gguf-py, ggml, mtmd)")
-    eng = None if a.build else get_prebuilt(a.prebuilt, gpu, vision)
+    if backend == "llama":
+        kind, server = find_llama_server(a.llama_server)
+        if kind is None:
+            fail("no llama-server found for the Intel card",
+                 "build llama.cpp with -DGGML_SYCL=ON and put llama-server on PATH, pass --llama-server PATH, "
+                 f"or install docker so the image {LLAMA_IMAGE} can run it")
+        ok(f"engine: llama-server ({'container ' if kind == 'image' else ''}{server})")
+        eng, lib_dirs = None, []
+    else:
+        kind = server = None
+        eng = None if a.build else get_prebuilt(a.prebuilt, gpu, vision)
     if eng is not None and json.loads((eng / "BUILD.json").read_text()).get("source") != "local":
         pip_install(CUDA_WHEELS, "NVIDIA CUDA libraries (cuBLAS, CUDA runtime; ~0.4 GB)")
         if vision != "none" and not (eng / VEXE).exists():
             warn("the ready-made engine has no image encoder: compiling it")
             eng = None
-    if eng is None:
-        eng = build_engine(gpu, vision, a.yes, llama)
-    meta = json.loads((eng / "BUILD.json").read_text())
-    lib_dirs = meta.get("cuda_dirs") or cuda_lib_dirs()
-    ok(f"engine: {eng / EXE}")
+    if backend != "llama":
+        if eng is None:
+            eng = build_engine(gpu, vision, a.yes, llama)
+        meta = json.loads((eng / "BUILD.json").read_text())
+        lib_dirs = meta.get("cuda_dirs") or cuda_lib_dirs()
+        ok(f"engine: {eng / EXE}")
 
     # ---- 5. the model files
     step(5, f"downloading {fam['title']} {model}")
@@ -1602,24 +1738,31 @@ def main() -> int:
         if not (pack / "tokenizer" / "vocab.json").exists():
             run([sys.executable, str(ROOT / "tools" / "strata_tokenizer.py"), "--gguf", str(shards[0]),
                  "--out", str(pack)], env=env)   # writes <pack>/tokenizer/
+    elif backend == "llama":
+        # llama-server reads the GGUF as it is; Strata's server only needs the tokenizer beside it
+        if not (pack / "tokenizer" / "vocab.json").exists():
+            run([sys.executable, str(ROOT / "tools" / "strata_tokenizer.py"), "--gguf", str(shards[0]),
+                 "--out", str(pack)], env=env)
     elif not (pack / "native_experts.txt").exists() or not (pack / "tokenizer" / "vocab.json").exists():
         # every tensor as the GGUF stores it; the experts are read from the GGUF at start (seconds to build)
         run([sys.executable, str(ROOT / "tools" / "iq_pack.py"), "--gguf", str(shards[0]), "--out", str(pack)], env=env)
     ok(f"model prepared: {pack}")
-    mtp = (find_in(roots, "mtp/rt/experts.bin") or data / "mtp/rt/experts.bin").parent.parent
-    rt = mtp / "rt"
-    if not (rt / "experts.bin").exists():
-        say("  The MTP draft layer (speculative decoding, ~2x faster output) comes from the original Qwen checkpoint:")
-        say("  only its ~5 GB of MTP tensors are downloaded.")
-        run([sys.executable, str(ROOT / "tools" / "mtp_fetch.py"), "fetch", "--out", str(mtp)], env=env)
-        run([sys.executable, str(ROOT / "tools" / "mtp_pack.py"), "--src", str(mtp), "--experts", "q2_0",
-             "--out", str(mtp / "mtp-q2_0.gguf")], env=env)
-        run([sys.executable, str(ROOT / "tools" / "mtp_rt.py"), "--gguf", str(mtp / "mtp-q2_0.gguf"), "--out", str(rt)],
-            env=env)
-    if not (rt / "draft_vocab.bin").exists():
-        shutil.copyfile(ROOT / "data" / "draft_vocab.bin", rt / "draft_vocab.bin")
-    ok(f"MTP draft layer: {rt}")
-
+    if backend == "llama":
+        ok("MTP draft layer: not used by the llama.cpp engine (no speculative decoding for this model there)")
+    else:
+        mtp = (find_in(roots, "mtp/rt/experts.bin") or data / "mtp/rt/experts.bin").parent.parent
+        rt = mtp / "rt"
+        if not (rt / "experts.bin").exists():
+            say("  The MTP draft layer (speculative decoding, ~2x faster output) comes from the original Qwen checkpoint:")
+            say("  only its ~5 GB of MTP tensors are downloaded.")
+            run([sys.executable, str(ROOT / "tools" / "mtp_fetch.py"), "fetch", "--out", str(mtp)], env=env)
+            run([sys.executable, str(ROOT / "tools" / "mtp_pack.py"), "--src", str(mtp), "--experts", "q2_0",
+                 "--out", str(mtp / "mtp-q2_0.gguf")], env=env)
+            run([sys.executable, str(ROOT / "tools" / "mtp_rt.py"), "--gguf", str(mtp / "mtp-q2_0.gguf"), "--out", str(rt)],
+                env=env)
+        if not (rt / "draft_vocab.bin").exists():
+            shutil.copyfile(ROOT / "data" / "draft_vocab.bin", rt / "draft_vocab.bin")
+        ok(f"MTP draft layer: {rt}")
     # ---- 7. the start script
     step(7, "writing the start script")
     sys.path.insert(0, str(ROOT / "tools"))
@@ -1627,31 +1770,39 @@ def main() -> int:
     ple = next((s for s in shards if any(t.name == "per_layer_token_embd.weight" for t in GGUFFile(s).tensors)), None)
     if ple is None:
         fail("the model has no per_layer_token_embd tensor (is this a Qwen3.8-Flash-Next GGUF?)")
-    args = ["--pack", str(pack), "--native", str(shards[0]), "--ple-gguf", str(ple),
-            "--expert-profile", str(ROOT / "data" / fam.get("profile", "expert-profile.bin")), "--expert-cache", "auto",
-            "--prefill", "auto", "--spec", "4", "--spec-min-p", "0.5", "--mtp", str(rt),
-            "--max-context", str(ctx)]
-    if ctx > 8192:
-        args += ["--kv", kv]
-    # KV streaming: from 64K up the whole KV cache lives in RAM and only the part the attention reads (32K positions
-    # per layer) stays in VRAM; the VRAM it frees holds more experts (+6% at 128K, +23% at 262K with Q2_0). It
-    # costs ~13.7 KB of RAM per context token with 8-bit KV (1.7 GB at 128K), 7.5 KB with 4-bit, so only when it fits.
-    kv_ram_gb = ctx * (13 * (576 if kv == "q4_0" else 1056)) / 1e9   # 12 QSA layers + the draft layer
-    # the RAM copy must be pinned, and under WSL the NVIDIA driver pins only about 1 GB in all
-    if is_wsl() and ctx >= 65536:
-        ok("WSL: KV streaming off (the driver pins only about 1 GB of RAM); the KV cache stays in VRAM")
-    elif ctx >= 65536 and ram >= MODELS[model]["ram_gb"] + kv_ram_gb + 1:
-        args += ["--kv-resident", "32768"]
-        ok(f"KV streaming on: the context's KV cache lives in RAM ({kv_ram_gb:.1f} GB), more experts fit in VRAM")
-    if vision != "none":
-        args += ["--vision", "--vram-reserve-mib", str(VISION[vision]["reserve_mib"])]
-    if esp is not None:
-        # the package's profile, with llama.cpp's flags (the engine takes the same ones)
-        args += ["--control-vector-scaled", f"{esp}:1.0", "--control-vector-layer-range", "4", "44",
-                 "--cvec-mode", "project", "--cvec-dir", "per-layer"]
-    cfg = {"exe": str(eng / EXE), "args": args, "cwd": str(ROOT), "tokenizer": str(pack / "tokenizer"),
-           "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
-           "lib_dirs": lib_dirs, "port": port}
+    args = []
+    if backend != "llama":                          # the CUDA engine's command line; nothing here applies to llama-server
+        args = ["--pack", str(pack), "--native", str(shards[0]), "--ple-gguf", str(ple),
+                "--expert-profile", str(ROOT / "data" / fam.get("profile", "expert-profile.bin")), "--expert-cache", "auto",
+                "--prefill", "auto", "--spec", "4", "--spec-min-p", "0.5", "--mtp", str(rt),
+                "--max-context", str(ctx)]
+        if ctx > 8192:
+            args += ["--kv", kv]
+        # KV streaming: from 64K up the whole KV cache lives in RAM and only the part the attention reads (32K positions
+        # per layer) stays in VRAM; the VRAM it frees holds more experts (+6% at 128K, +23% at 262K with Q2_0). It
+        # costs ~13.7 KB of RAM per context token with 8-bit KV (1.7 GB at 128K), 7.5 KB with 4-bit, so only when it fits.
+        kv_ram_gb = ctx * (13 * (576 if kv == "q4_0" else 1056)) / 1e9   # 12 QSA layers + the draft layer
+        # the RAM copy must be pinned, and under WSL the NVIDIA driver pins only about 1 GB in all
+        if is_wsl() and ctx >= 65536:
+            ok("WSL: KV streaming off (the driver pins only about 1 GB of RAM); the KV cache stays in VRAM")
+        elif ctx >= 65536 and ram >= MODELS[model]["ram_gb"] + kv_ram_gb + 1:
+            args += ["--kv-resident", "32768"]
+            ok(f"KV streaming on: the context's KV cache lives in RAM ({kv_ram_gb:.1f} GB), more experts fit in VRAM")
+        if vision != "none":
+            args += ["--vision", "--vram-reserve-mib", str(VISION[vision]["reserve_mib"])]
+        if esp is not None:
+            # the package's profile, with llama.cpp's flags (the engine takes the same ones)
+            args += ["--control-vector-scaled", f"{esp}:1.0", "--control-vector-layer-range", "4", "44",
+                     "--cvec-mode", "project", "--cvec-dir", "per-layer"]
+
+    if backend == "llama":
+        cfg = {"engine": "llama", "cwd": str(ROOT), "tokenizer": str(pack / "tokenizer"),
+               "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
+               "port": port, "llama": llama_block(kind, server, shards[0], a.context or 32768, port + 1)}
+    else:
+        cfg = {"exe": str(eng / EXE), "args": args, "cwd": str(ROOT), "tokenizer": str(pack / "tokenizer"),
+               "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
+               "lib_dirs": lib_dirs, "port": port}
     if gpu["count"] > 1 or a.gpu is not None:
         cfg["gpu"] = gpu["index"]                      # the engine is told this card (issue #51)
         cfg["gpus_asked"] = True                       # chosen at setup: not asked again at start
@@ -1663,22 +1814,22 @@ def main() -> int:
         cfg["host"] = a.host
     if a.api_key:
         cfg["api_key"] = a.api_key
-    if vision != "none":
+    if vision != "none" and backend != "llama":
         cfg["vision"] = {"exe": str(eng / VEXE), "mmproj": str(mmproj), "model": str(shards[0]),
                          "gpu": vision == "gpu", "max_tokens": VISION[vision]["max_tokens"]}
         if vision == "cpu":
             cfg["vision"]["threads"] = max(1, (os.cpu_count() or 8) // 2)
     cfg_path = ROOT / f"strata-{tag.lower()}.json"
-    cal = saved_calibration(cfg)
+    cal = None if backend == "llama" else saved_calibration(cfg)
     if cal is not None:
         sys.path.insert(0, str(ROOT / "tools"))
         import calibrate as CAL
         cfg["args"] = CAL.apply(cfg["args"], cal.get("settings") or {})
         ok("the settings tuned for this PC earlier are used" + (f" ({cal['date']})" if cal.get("date") else ""))
     cfg_path.write_text(json.dumps(cfg, indent=1), encoding="utf-8")
-    script = write_run_script(tag, cfg_path, port)
+    script = write_run_script(tag, cfg_path, port, engine="llama" if backend == "llama" else "strata")
     # offered only when someone answers: --yes installs and adopted earlier installs are not held up by it
-    if cal is None and not a.no_start and not a.yes and ask(
+    if cal is None and backend != "llama" and not a.no_start and not a.yes and ask(
             "Tune Strata for this PC now? It measures a few engine settings (about 5-10 minutes; the PC is busy "
             "meanwhile; later: START-HERE --calibrate)", ["y", "n"], "y", a.yes) == "y":
         calibrate_config(cfg_path)

From 8e1354bb08294ad9cc5b68b0a3c2de03424faa26 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 10:19:23 -0500
Subject: [PATCH 003/201] docs/INTEL.md: --port and --host, learned the hard
 way (8080 is open-webui here)

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 5bb8ea6e949..72fbdf41718 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -43,6 +43,10 @@ Where the `llama-server` comes from, in order:
 Then `run-<model>.sh` (or `./setup.sh` again) starts the model. First start of a 30 GB model: about
 two minutes.
 
+Two flags worth knowing on a box that already runs things: `--port N` (the default 8080 is also what
+open-webui takes; the llama-server container gets N+1) and `--host 0.0.0.0` to reach it from other
+machines (the default binds localhost only, as upstream does).
+
 ## The config
 
 ```json

From 56653152b31f1d65ab5eb29716d49d0b5d0c4944 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 11:10:24 -0500
Subject: [PATCH 004/201] README: the Intel Arc port and the rig it was tested
 on, up top

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/README.md b/README.md
index 1218a71bed6..265b6cee072 100644
--- a/README.md
+++ b/README.md
@@ -19,6 +19,24 @@ of a word): faster than you can read.
 
 ---
 
+
+> **Intel Arc port (this fork).** Strata's engine is CUDA. This fork adds a path for Intel Arc cards
+> that runs the same GGUF weights through llama.cpp's SYCL backend behind Strata's own server, web app
+> and APIs. It was developed and tested on this rig, so those are the numbers you will see quoted:
+>
+> | | |
+> |---|---|
+> | GPU | Intel Arc Pro B70, 32 GB (Battlemage G31, PCI `8086:e223`), `xe` kernel driver |
+> | CPU / RAM | AMD Ryzen 7 1700X (8 cores, AVX2, no AVX-512) / 23 GiB |
+> | OS | Ubuntu 24.04.5 LTS, kernel 7.0, Docker 29, Python 3.12 |
+> | Storage | 2 TB PCIe NVMe (the model's 28.8 GB lookup table is paged from it) |
+> | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
+> | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
+> | Measured | 23-25 tok/s decode (GPU-bound), ~150 tok/s prompt reading, correct code; see [docs/INTEL.md](docs/INTEL.md) |
+>
+> No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
+> and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
+
 ## How fast is it?
 
 Measured on an RTX 5070 (12 GB), a Ryzen 5 7600 and 64 GB of RAM:

From bcfcf40cc8b0cc951da2ee1f4a752562fc2be369 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 11:14:27 -0500
Subject: [PATCH 005/201] gitignore: start-llama.sh, generated by setup on the
 Intel path

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 .gitignore | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.gitignore b/.gitignore
index 16f92c6b471..e714ec2c3f7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -47,3 +47,6 @@ build-vision.bat
 *.done
 /third_party/*.zip
 
+
+# Intel Arc path (setup.py): the llama-server container start script
+/start-llama.sh

From 34cae9ec3f70d9d4404bd2020b885b893a0a1b6a Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 11:29:19 -0500
Subject: [PATCH 006/201] docs/INTEL.md: how much context fits on a 32 GB card,
 measured

About 20 KiB of KV per token (only 12 of 48 layers are full attention). 32k, 64k, 96k and 128k all
load with the whole model on the card, 128k with 1.6 GB to spare; 160k is under the safety margin
and 256k does not fit - asking for it spilled VRAM into host RAM and took the machine down until its
watchdog reset it, so the doc says so in bold.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 72fbdf41718..4e8c42946f1 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -17,7 +17,7 @@ Written for and measured on an **Arc Pro B70 (32 GB)** running the Coder (IQ1_M)
 | prompt reading | ~1,870 tok/s | ~150 tok/s |
 | speculative decoding (MTP) | yes | no (the GGUF carries no draft layer llama.cpp can use) |
 | images | yes | not yet |
-| context | up to 262K | 32K by default; more as VRAM allows |
+| context | up to 262K | 32K by default; 131K is the measured ceiling on a 32 GB card (see below); 262K does not fit |
 
 The speed gap is the SYCL backend's known state on Battlemage: general matrix multiplies do not use
 the XMX units yet (only the oneDNN flash-attention path does). It is upstream llama.cpp work, not
@@ -79,6 +79,29 @@ with `"exe"` and `"args"` instead spawns a native binary directly. See `serve/en
   those a short `max_tokens` is spent entirely inside the think block and the answer looks empty.
 - **`/health` says 503 while loading**; the server polls `/props` instead.
 
+## How much context fits
+
+The architecture keeps this small: only every fourth layer is full attention (12 of 48); the other
+36 are gated-delta-net layers with a fixed-size recurrent state that does not grow with context.
+Per token, the 12 attention layers keep 2 KV heads x 256 x (K + V) at q8_0, plus the
+sparse-attention indexer's keys. **Measured: about 20 KiB per token** (VRAM grows 0.6 GB per 32k
+of context with everything else unchanged).
+
+| context | VRAM in use, model loaded | headroom on 32 GB | status |
+|---|---|---|---|
+| 32,768 | 28.4 GB | 3.5 GB | measured, the default |
+| 65,536 | 29.0 GB | 2.9 GB | measured, loads |
+| 98,304 | 29.6 GB | 2.3 GB | measured, loads |
+| 131,072 | 30.3 GB | 1.6 GB | measured, loads: the practical ceiling |
+| 163,840 | ~31.0 GB | ~0.9 GB | not attempted: under the 1.2 GB safety margin |
+| 262,144 | ~32.6 GB | none | **does not fit - asking for it took the host down** |
+
+**Do not ask for more than fits.** On this driver a GPU allocation past VRAM does not fail: the xe
+driver evicts buffers into host RAM, the kernel runs out of memory, and the machine livelocks until
+its hardware watchdog resets it. A 262K request did exactly that on 2026-09-29, and llama.cpp's own
+"failed to fit params" check fired too late to prevent it. Compute the KV size first and leave
+1.5 GB free. Measured ceilings are in the table at the end.
+
 ## Not done
 
 - Images. Strata's vision path encodes with `strata-vision` into embeddings the CUDA engine reads;

From 0741381c8ec5d927ac48a9aab1d4319c10d1d40f Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 11:36:51 -0500
Subject: [PATCH 007/201] docs: 128k context proven on the B70 - a 105k-token
 prompt read at 424 tok/s

Prompt reading scales up with prompt size (150 tok/s at 2.7k, 424 tok/s at 105k), so the full
window costs about five minutes, not fifteen. 30.3 GB in use with 1.5 GB free at 131,072.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md     |  2 +-
 docs/INTEL.md | 10 +++++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index 265b6cee072..a2d19ac0960 100644
--- a/README.md
+++ b/README.md
@@ -32,7 +32,7 @@ of a word): faster than you can read.
 > | Storage | 2 TB PCIe NVMe (the model's 28.8 GB lookup table is paged from it) |
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
-> | Measured | 23-25 tok/s decode (GPU-bound), ~150 tok/s prompt reading, correct code; see [docs/INTEL.md](docs/INTEL.md) |
+> | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index 4e8c42946f1..17442d663e2 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -92,7 +92,7 @@ of context with everything else unchanged).
 | 32,768 | 28.4 GB | 3.5 GB | measured, the default |
 | 65,536 | 29.0 GB | 2.9 GB | measured, loads |
 | 98,304 | 29.6 GB | 2.3 GB | measured, loads |
-| 131,072 | 30.3 GB | 1.6 GB | measured, loads: the practical ceiling |
+| 131,072 | 30.3 GB | 1.5 GB | **measured, the practical ceiling**: a 104,798-token prompt (79% of the window) read in 247 s at 424 tok/s, then answered |
 | 163,840 | ~31.0 GB | ~0.9 GB | not attempted: under the 1.2 GB safety margin |
 | 262,144 | ~32.6 GB | none | **does not fit - asking for it took the host down** |
 
@@ -100,7 +100,11 @@ of context with everything else unchanged).
 driver evicts buffers into host RAM, the kernel runs out of memory, and the machine livelocks until
 its hardware watchdog resets it. A 262K request did exactly that on 2026-09-29, and llama.cpp's own
 "failed to fit params" check fired too late to prevent it. Compute the KV size first and leave
-1.5 GB free. Measured ceilings are in the table at the end.
+1.5 GB free.
+
+Prompt reading gets faster with size, because the work batches better: ~150 tok/s on a 2.7k-token
+prompt, 424 tok/s on a 105k-token one. So a full 128k window costs about five minutes to read,
+not fifteen.
 
 ## Not done
 
@@ -116,5 +120,5 @@ its hardware watchdog resets it. A 262K request did exactly that on 2026-09-29,
 | load | ~100 s |
 | VRAM | 28.4 of 32 GB |
 | decode | 23-25 tok/s; GPU 92% busy at 165 W, CPU idle |
-| prefill | 149 tok/s on a 2,701-token code prompt |
+| prefill | 149 tok/s on a 2,701-token prompt; 424 tok/s on a 104,798-token prompt at 131k context |
 | quality | correct code on every test; matches the NVIDIA path token for token in spirit, not measured |

From 7021c80ff819ace16d55e2b7246a051eb5d3e4bd Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 14:05:57 -0500
Subject: [PATCH 008/201] sycl: the CUDA engine migrated to SYCL - builds with
 oneAPI, 19 of 22 kernel parity tests pass on the Arc Pro B70

The port lives in sycl/ and changes no upstream file: sycl/src and sycl/include hold only the files the
migration touched, sycl/CMakeLists.txt takes everything else from the original tree.

How it was made, reproducibly (sycl/tools/): a dev image (the llama.cpp SYCL image + SYCLomatic 2025.3 +
CUDA 12.8 headers from the pip wheels), migrate.sh (compilation database + dpct over 86 translation
units), fixups.py (every hand fix with its reason, idempotent), build.sh (icpx, ninja).

What dpct got wrong and the script repairs: CUDA's null stream became a null sycl::queue* (strata::q_of
maps it to the default queue); __ldg((const float*) p) lost its cast and read one byte; __fadd_rn lost
parentheses; ggml's lookup tables were threaded through kernel parameters with the wrong table per
template; helper headers renamed since 2025.3; cudaGraphUpload, graph introspection and %globaltimer
have no equivalents. Two compiler flags are load-bearing: -fp-model=precise, and the device compiler's
-cl-fp32-correctly-rounded-divide-sqrt - the Arc's fp32 divide is not correctly rounded by default, and
quantize_act_parity went from 303k mismatches to byte-exact with it.

Not ported: the three kernels with inline PTX (mma.sync, ldmatrix, cp.async) take their existing
pre-sm_80 fallback; the launchers refuse the device. The XMX joint_matrix versions are next.

The engine itself starts on the card, loads the pack, the projections, the PLE table and the 23.4 GiB
expert arena, and is then stopped by the test rig's memory guard: Strata keeps the experts as a resident
host copy, and the rig has 23 GiB of RAM (upstream asks for 32). A streaming fill of the VRAM cache
from the GGUF is the next piece; the whole model fits in the 32 GB card.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 .gitignore                                    |    4 +
 README.md                                     |    1 +
 docs/INTEL.md                                 |   68 +
 sycl/CMakeLists.txt                           |  175 +
 sycl/dpct_report.apis.csv                     |  167 +
 sycl/dpct_report.stats.csv                    |  101 +
 sycl/include/dpct/atomic.hpp                  |  868 +++
 sycl/include/dpct/bindless_images.hpp         | 2061 ++++++
 sycl/include/dpct/blas_gemm_utils.hpp         |  896 +++
 sycl/include/dpct/blas_utils.hpp              | 2599 ++++++++
 sycl/include/dpct/ccl_utils.hpp               |  266 +
 sycl/include/dpct/codepin/codepin.hpp         |  383 ++
 .../dpct/codepin/serialization/basic.hpp      |  501 ++
 sycl/include/dpct/compat_service.hpp          |  122 +
 .../dpct/detail/blas_gemm_utils_detail.hpp    |  426 ++
 .../include/dpct/detail/blas_utils_detail.hpp |  649 ++
 sycl/include/dpct/detail/ccl_utils_detail.hpp |   37 +
 .../include/dpct/detail/dnnl_utils_detail.hpp |   98 +
 .../dpct/detail/group_utils_detail.hpp        |  236 +
 .../dpct/detail/lapack_utils_detail.hpp       |  625 ++
 .../dpct/detail/lib_common_utils_detail.hpp   |  149 +
 sycl/include/dpct/detail/math_detail.hpp      |  262 +
 sycl/include/dpct/detail/memory_detail.hpp    |  984 +++
 sycl/include/dpct/detail/rng_utils_detail.hpp |  382 ++
 .../dpct/detail/sparse_utils_detail.hpp       |  585 ++
 sycl/include/dpct/device.hpp                  | 1010 +++
 sycl/include/dpct/dnnl_utils.hpp              | 4854 ++++++++++++++
 sycl/include/dpct/dpct.hpp                    |  106 +
 sycl/include/dpct/dpl_extras/algorithm.h      | 2562 ++++++++
 .../dpct/dpl_extras/dpcpp_extensions.h        |  422 ++
 sycl/include/dpct/dpl_extras/functional.h     |  486 ++
 .../dpct/dpl_extras/iterator_adaptor.h        |   54 +
 sycl/include/dpct/dpl_extras/iterators.h      |  347 +
 sycl/include/dpct/dpl_extras/memory.h         |  976 +++
 sycl/include/dpct/dpl_extras/numeric.h        |   32 +
 sycl/include/dpct/dpl_extras/vector.h         |  990 +++
 sycl/include/dpct/dpl_utils.hpp               |   33 +
 sycl/include/dpct/fft_utils.hpp               | 1249 ++++
 sycl/include/dpct/graph.hpp                   |  195 +
 sycl/include/dpct/group_utils.hpp             | 1566 +++++
 sycl/include/dpct/image.hpp                   | 1075 ++++
 sycl/include/dpct/kernel.hpp                  |  632 ++
 sycl/include/dpct/lapack_utils.hpp            | 1286 ++++
 sycl/include/dpct/lib_common_utils.hpp        |  121 +
 sycl/include/dpct/math.hpp                    | 2807 +++++++++
 sycl/include/dpct/memory.hpp                  |  872 +++
 sycl/include/dpct/rng_utils.hpp               |  276 +
 sycl/include/dpct/shmem_utils.hpp             |   56 +
 sycl/include/dpct/sparse_utils.hpp            | 1838 ++++++
 sycl/include/dpct/util.hpp                    | 1358 ++++
 sycl/include/dpct/ze_utils.hpp                |   85 +
 sycl/include/strata/core/graph.hpp            |  118 +
 sycl/include/strata/core/mtp.hpp              |  149 +
 sycl/include/strata/core/on_device.hpp        |   38 +
 sycl/include/strata/core/remote_experts.hpp   |   85 +
 sycl/include/strata/core/session.hpp          |  417 ++
 sycl/include/strata/core/verify.hpp           |  239 +
 sycl/include/strata/kernels/bf16_bits.hpp     |   49 +
 sycl/include/strata/kernels/f16_bits.hpp      |   99 +
 sycl/include/strata/kernels/mrope.hpp         |   41 +
 sycl/include/strata/kernels/rope.hpp          |   53 +
 sycl/include/strata/kernels/sampler.hpp       |   64 +
 sycl/include/strata/sycl_queue.hpp            |   14 +
 sycl/src/core/concurrent_main.cpp             |  272 +
 sycl/src/core/device.dp.cpp                   |  201 +
 sycl/src/core/expert_cache.cpp                |  465 ++
 sycl/src/core/expert_source.cpp               |  830 +++
 sycl/src/core/graph.cpp                       |  249 +
 sycl/src/core/layer.cpp                       | 1482 +++++
 sycl/src/core/mtp.cpp                         |  997 +++
 sycl/src/core/native_dense.cpp                |  235 +
 sycl/src/core/native_head.cpp                 |  221 +
 sycl/src/core/overlap_main.cpp                |  239 +
 sycl/src/core/pinned.dp.cpp                   |  448 ++
 sycl/src/core/remote_experts.cpp              |  477 ++
 sycl/src/core/session.cpp                     | 1404 +++++
 sycl/src/core/verify.cpp                      | 1413 +++++
 sycl/src/core/weights.cpp                     |  504 ++
 sycl/src/kernels/bf16_gemv_parity.cpp         |  191 +
 sycl/src/kernels/cuda/bf16_gemv.dp.cpp        |  251 +
 sycl/src/kernels/cuda/cvec.dp.cpp             |  302 +
 sycl/src/kernels/cuda/dequant_bf16.dp.cpp     |  302 +
 sycl/src/kernels/cuda/dequant_s2.dp.cpp       |   72 +
 sycl/src/kernels/cuda/elementwise.dp.cpp      |  658 ++
 sycl/src/kernels/cuda/fused_gdn.dp.cpp        |  341 +
 sycl/src/kernels/cuda/fused_gr.dp.cpp         |  633 ++
 sycl/src/kernels/cuda/gdn.dp.cpp              |  401 ++
 sycl/src/kernels/cuda/gr.dp.cpp               |  735 +++
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       | 1401 +++++
 sycl/src/kernels/cuda/kv_q4.dp.cpp            |  353 ++
 sycl/src/kernels/cuda/kv_q8.dp.cpp            |  204 +
 sycl/src/kernels/cuda/kv_stream.dp.cpp        |  459 ++
 sycl/src/kernels/cuda/native_bf16.dp.cpp      |  345 +
 .../src/kernels/cuda/native_flash_attn.dp.cpp |  382 ++
 sycl/src/kernels/cuda/native_gdn.dp.cpp       |  167 +
 .../kernels/cuda/native_gdn_preprocess.dp.cpp |  356 ++
 sycl/src/kernels/cuda/native_gr_norm.dp.cpp   |  165 +
 .../src/kernels/cuda/native_gr_postops.dp.cpp |  247 +
 sycl/src/kernels/cuda/native_mmvq.dp.cpp      | 2048 ++++++
 sycl/src/kernels/cuda/native_moe.dp.cpp       |  156 +
 .../kernels/cuda/native_ple_postops.dp.cpp    |  516 ++
 sycl/src/kernels/cuda/native_qsa.dp.cpp       |  209 +
 .../kernels/cuda/native_qsa_indexer.dp.cpp    |  442 ++
 sycl/src/kernels/cuda/native_qsa_score.dp.cpp |  287 +
 sycl/src/kernels/cuda/native_rope.dp.cpp      |  145 +
 sycl/src/kernels/cuda/native_router.dp.cpp    |  232 +
 sycl/src/kernels/cuda/ple.dp.cpp              |  674 ++
 sycl/src/kernels/cuda/qsa.dp.cpp              | 1267 ++++
 sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp  |  466 ++
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp  | 1169 ++++
 sycl/src/kernels/cuda/qsa_select.dp.cpp       |  917 +++
 sycl/src/kernels/cuda/quantize_act.dp.cpp     |  424 ++
 sycl/src/kernels/cuda/rope.dp.cpp             |  124 +
 sycl/src/kernels/cuda/router_top10.dp.cpp     |  394 ++
 .../src/kernels/cuda/s2_expert_grouped.dp.cpp | 1352 ++++
 sycl/src/kernels/cuda/s2_gemv.dp.cpp          |   85 +
 sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp     |  250 +
 sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp       |  141 +
 sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp    |  138 +
 sycl/src/kernels/cuda/s_gemv.dp.cpp           | 1007 +++
 sycl/src/kernels/cuda/sampler.dp.cpp          |  547 ++
 sycl/src/kernels/cuda/shared_expert.dp.cpp    |  596 ++
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   | 1197 ++++
 sycl/src/kernels/cvec_parity.cpp              |  242 +
 sycl/src/kernels/dequant_bf16_test.cpp        |  116 +
 sycl/src/kernels/dequant_s2_parity.cpp        |  165 +
 sycl/src/kernels/elementwise_parity.cpp       |  623 ++
 sycl/src/kernels/gdn_parity.cpp               |  594 ++
 sycl/src/kernels/gr_parity.cpp                |  930 +++
 sycl/src/kernels/iq_parity.cpp                |  111 +
 sycl/src/kernels/kv_q4_parity.cpp             |  429 ++
 sycl/src/kernels/kv_q8_parity.cpp             |  230 +
 sycl/src/kernels/kv_stream_parity.cpp         |  344 +
 sycl/src/kernels/native_expert_parity.cpp     |  262 +
 sycl/src/kernels/ple_parity.cpp               | 1569 +++++
 sycl/src/kernels/qsa_parity.cpp               | 1459 +++++
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |  263 +
 sycl/src/kernels/qsa_select_bench.cpp         |  197 +
 sycl/src/kernels/quantize_act_parity.cpp      |  450 ++
 sycl/src/kernels/rope_parity.cpp              |  229 +
 sycl/src/kernels/router_top10_parity.cpp      |  186 +
 sycl/src/kernels/s2_gemv_parity.cpp           |  205 +
 sycl/src/kernels/s2_gemv_q8_parity.cpp        |  236 +
 sycl/src/kernels/s_gemv_parity.cpp            |  754 +++
 sycl/src/kernels/s_gemv_q8k_parity.cpp        |  321 +
 sycl/src/kernels/sampler_parity.cpp           |  929 +++
 sycl/src/kernels/shared_expert_parity.cpp     |  740 +++
 sycl/src/prefill/gemm.dp.cpp                  |  155 +
 sycl/src/prefill/ggml_cuda_host.dp.cpp        |  104 +
 sycl/src/prefill/kernels.dp.cpp               | 1428 +++++
 sycl/src/prefill/moe_mmq.dp.cpp               |  311 +
 sycl/src/prefill/prefill.cpp                  | 2004 ++++++
 sycl/src/program/generate.cpp                 | 5561 +++++++++++++++++
 sycl/third_party/ggml/ggml-common.h           | 2193 +++++++
 sycl/third_party/ggml/ggml-common.h.yaml      |  468 ++
 sycl/tools/Dockerfile                         |    9 +
 sycl/tools/build.sh                           |   12 +
 sycl/tools/fixups.py                          |  172 +
 sycl/tools/get-cuda-headers.sh                |   28 +
 sycl/tools/migrate.sh                         |   45 +
 160 files changed, 95558 insertions(+)
 create mode 100644 sycl/CMakeLists.txt
 create mode 100644 sycl/dpct_report.apis.csv
 create mode 100644 sycl/dpct_report.stats.csv
 create mode 100644 sycl/include/dpct/atomic.hpp
 create mode 100644 sycl/include/dpct/bindless_images.hpp
 create mode 100644 sycl/include/dpct/blas_gemm_utils.hpp
 create mode 100644 sycl/include/dpct/blas_utils.hpp
 create mode 100644 sycl/include/dpct/ccl_utils.hpp
 create mode 100644 sycl/include/dpct/codepin/codepin.hpp
 create mode 100644 sycl/include/dpct/codepin/serialization/basic.hpp
 create mode 100644 sycl/include/dpct/compat_service.hpp
 create mode 100644 sycl/include/dpct/detail/blas_gemm_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/blas_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/ccl_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/dnnl_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/group_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/lapack_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/lib_common_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/math_detail.hpp
 create mode 100644 sycl/include/dpct/detail/memory_detail.hpp
 create mode 100644 sycl/include/dpct/detail/rng_utils_detail.hpp
 create mode 100644 sycl/include/dpct/detail/sparse_utils_detail.hpp
 create mode 100644 sycl/include/dpct/device.hpp
 create mode 100644 sycl/include/dpct/dnnl_utils.hpp
 create mode 100644 sycl/include/dpct/dpct.hpp
 create mode 100644 sycl/include/dpct/dpl_extras/algorithm.h
 create mode 100644 sycl/include/dpct/dpl_extras/dpcpp_extensions.h
 create mode 100644 sycl/include/dpct/dpl_extras/functional.h
 create mode 100644 sycl/include/dpct/dpl_extras/iterator_adaptor.h
 create mode 100644 sycl/include/dpct/dpl_extras/iterators.h
 create mode 100644 sycl/include/dpct/dpl_extras/memory.h
 create mode 100644 sycl/include/dpct/dpl_extras/numeric.h
 create mode 100644 sycl/include/dpct/dpl_extras/vector.h
 create mode 100644 sycl/include/dpct/dpl_utils.hpp
 create mode 100644 sycl/include/dpct/fft_utils.hpp
 create mode 100644 sycl/include/dpct/graph.hpp
 create mode 100644 sycl/include/dpct/group_utils.hpp
 create mode 100644 sycl/include/dpct/image.hpp
 create mode 100644 sycl/include/dpct/kernel.hpp
 create mode 100644 sycl/include/dpct/lapack_utils.hpp
 create mode 100644 sycl/include/dpct/lib_common_utils.hpp
 create mode 100644 sycl/include/dpct/math.hpp
 create mode 100644 sycl/include/dpct/memory.hpp
 create mode 100644 sycl/include/dpct/rng_utils.hpp
 create mode 100644 sycl/include/dpct/shmem_utils.hpp
 create mode 100644 sycl/include/dpct/sparse_utils.hpp
 create mode 100644 sycl/include/dpct/util.hpp
 create mode 100644 sycl/include/dpct/ze_utils.hpp
 create mode 100644 sycl/include/strata/core/graph.hpp
 create mode 100644 sycl/include/strata/core/mtp.hpp
 create mode 100644 sycl/include/strata/core/on_device.hpp
 create mode 100644 sycl/include/strata/core/remote_experts.hpp
 create mode 100644 sycl/include/strata/core/session.hpp
 create mode 100644 sycl/include/strata/core/verify.hpp
 create mode 100644 sycl/include/strata/kernels/bf16_bits.hpp
 create mode 100644 sycl/include/strata/kernels/f16_bits.hpp
 create mode 100644 sycl/include/strata/kernels/mrope.hpp
 create mode 100644 sycl/include/strata/kernels/rope.hpp
 create mode 100644 sycl/include/strata/kernels/sampler.hpp
 create mode 100644 sycl/include/strata/sycl_queue.hpp
 create mode 100644 sycl/src/core/concurrent_main.cpp
 create mode 100644 sycl/src/core/device.dp.cpp
 create mode 100644 sycl/src/core/expert_cache.cpp
 create mode 100644 sycl/src/core/expert_source.cpp
 create mode 100644 sycl/src/core/graph.cpp
 create mode 100644 sycl/src/core/layer.cpp
 create mode 100644 sycl/src/core/mtp.cpp
 create mode 100644 sycl/src/core/native_dense.cpp
 create mode 100644 sycl/src/core/native_head.cpp
 create mode 100644 sycl/src/core/overlap_main.cpp
 create mode 100644 sycl/src/core/pinned.dp.cpp
 create mode 100644 sycl/src/core/remote_experts.cpp
 create mode 100644 sycl/src/core/session.cpp
 create mode 100644 sycl/src/core/verify.cpp
 create mode 100644 sycl/src/core/weights.cpp
 create mode 100644 sycl/src/kernels/bf16_gemv_parity.cpp
 create mode 100644 sycl/src/kernels/cuda/bf16_gemv.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/cvec.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/dequant_bf16.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/dequant_s2.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/elementwise.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/fused_gdn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/fused_gr.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/gdn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/gr.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/iq_kernels.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/kv_q4.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/kv_q8.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/kv_stream.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_bf16.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_flash_attn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_gdn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_gr_norm.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_gr_postops.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_mmvq.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_moe.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_ple_postops.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_qsa.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_qsa_score.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_rope.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/native_router.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/ple.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/qsa.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/qsa_select.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/quantize_act.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/rope.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/router_top10.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s2_gemv.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/s_gemv.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/sampler.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/shared_expert.dp.cpp
 create mode 100644 sycl/src/kernels/cuda/verify_kernels.dp.cpp
 create mode 100644 sycl/src/kernels/cvec_parity.cpp
 create mode 100644 sycl/src/kernels/dequant_bf16_test.cpp
 create mode 100644 sycl/src/kernels/dequant_s2_parity.cpp
 create mode 100644 sycl/src/kernels/elementwise_parity.cpp
 create mode 100644 sycl/src/kernels/gdn_parity.cpp
 create mode 100644 sycl/src/kernels/gr_parity.cpp
 create mode 100644 sycl/src/kernels/iq_parity.cpp
 create mode 100644 sycl/src/kernels/kv_q4_parity.cpp
 create mode 100644 sycl/src/kernels/kv_q8_parity.cpp
 create mode 100644 sycl/src/kernels/kv_stream_parity.cpp
 create mode 100644 sycl/src/kernels/native_expert_parity.cpp
 create mode 100644 sycl/src/kernels/ple_parity.cpp
 create mode 100644 sycl/src/kernels/qsa_parity.cpp
 create mode 100644 sycl/src/kernels/qsa_prompt_attn_parity.cpp
 create mode 100644 sycl/src/kernels/qsa_select_bench.cpp
 create mode 100644 sycl/src/kernels/quantize_act_parity.cpp
 create mode 100644 sycl/src/kernels/rope_parity.cpp
 create mode 100644 sycl/src/kernels/router_top10_parity.cpp
 create mode 100644 sycl/src/kernels/s2_gemv_parity.cpp
 create mode 100644 sycl/src/kernels/s2_gemv_q8_parity.cpp
 create mode 100644 sycl/src/kernels/s_gemv_parity.cpp
 create mode 100644 sycl/src/kernels/s_gemv_q8k_parity.cpp
 create mode 100644 sycl/src/kernels/sampler_parity.cpp
 create mode 100644 sycl/src/kernels/shared_expert_parity.cpp
 create mode 100644 sycl/src/prefill/gemm.dp.cpp
 create mode 100644 sycl/src/prefill/ggml_cuda_host.dp.cpp
 create mode 100644 sycl/src/prefill/kernels.dp.cpp
 create mode 100644 sycl/src/prefill/moe_mmq.dp.cpp
 create mode 100644 sycl/src/prefill/prefill.cpp
 create mode 100644 sycl/src/program/generate.cpp
 create mode 100644 sycl/third_party/ggml/ggml-common.h
 create mode 100644 sycl/third_party/ggml/ggml-common.h.yaml
 create mode 100644 sycl/tools/Dockerfile
 create mode 100644 sycl/tools/build.sh
 create mode 100644 sycl/tools/fixups.py
 create mode 100755 sycl/tools/get-cuda-headers.sh
 create mode 100755 sycl/tools/migrate.sh

diff --git a/.gitignore b/.gitignore
index e714ec2c3f7..7b0f1918882 100644
--- a/.gitignore
+++ b/.gitignore
@@ -50,3 +50,7 @@ build-vision.bat
 
 # Intel Arc path (setup.py): the llama-server container start script
 /start-llama.sh
+/build-sycl/
+/compile_commands.json
+/sycl-migrate.log
+/sycl/migrate.log
diff --git a/README.md b/README.md
index a2d19ac0960..d706bea01ec 100644
--- a/README.md
+++ b/README.md
@@ -33,6 +33,7 @@ of a word): faster than you can read.
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
 > | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
+> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL, builds and links with oneAPI; 19 of 22 kernel parity tests pass on the B70. Not yet generating: the engine's resident host copy of the experts (23.4 GiB) needs more RAM than this rig has - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index 17442d663e2..681432bce48 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -106,6 +106,74 @@ Prompt reading gets faster with size, because the work batches better: ~150 tok/
 prompt, 424 tok/s on a 105k-token one. So a full 128k window costs about five minutes to read,
 not fifteen.
 
+## The engine itself on Intel: the SYCL port (`sycl/`)
+
+Everything above runs the model through llama.cpp. This is the other half: Strata's own engine - the 50 CUDA
+kernels and the host code that drives them (streams, events, graph capture, pinned memory) - built for the
+Arc with oneAPI. It is a migration of the tree, not a new backend: the engine has no backend seam to slot
+into.
+
+**Layout.** `sycl/src` and `sycl/include` mirror the tree and hold only the files the port changes; the
+SYCL build (`sycl/CMakeLists.txt`) takes every other source from the original location. No upstream file
+is edited. `sycl/include/dpct/` is the vendored SYCLomatic helper library, so the port builds without the
+migration tool.
+
+**How it was made, so it can be redone.**
+
+1. `sycl/tools/Dockerfile` - the dev image: the llama.cpp SYCL image plus SYCLomatic (`dpct` 2025.3),
+   ninja, and the CUDA 12.8 headers that `sycl/tools/get-cuda-headers.sh` pulls out of NVIDIA's pip wheels
+   (dpct parses CUDA; it needs the headers, not the toolkit).
+2. `sycl/tools/migrate.sh` - writes a compilation database for the 86 CUDA-touching translation units and
+   runs dpct over them. 85 migrate; dpct reports no line it could not migrate, and about 1,400 advisory
+   notes.
+3. `sycl/tools/fixups.py` - what dpct got wrong or could not do, as an idempotent script with a reason per
+   item. The ones that mattered:
+   - CUDA's null stream means the default stream; dpct turned it into a null `sycl::queue*`. Every
+     stream cast now goes through `strata::q_of()` (`sycl/include/strata/sycl_queue.hpp`).
+   - `__ldg((const float*) p)` came out as `*p`, reading one byte of a float scale (two sites, s_gemv).
+   - `__fadd_rn(a, b ? c : d)` lost its parentheses (two sites).
+   - the ggml lookup tables were threaded through kernel parameters with the wrong table per template;
+     they are plain `static const` arrays read from device code, as ggml-sycl does.
+   - helper headers renamed since dpct 2025.3 (`entangle`, `chunked_partition`), graph introspection and
+     `cudaGraphUpload` (no SYCL equivalents), `%globaltimer` (the stage profiler reads zeros).
+4. `sycl/tools/build.sh` - configure + build with icpx inside the image. Two compiler flags are load-bearing:
+   `-fp-model=precise` (icpx defaults to a fast FP model) and `-cl-fp32-correctly-rounded-divide-sqrt`
+   for the device compiler - the Arc's fp32 divide is not correctly rounded by default (OpenCL allows
+   2.5 ulp), and Strata's quantizers are byte-exact against ggml through `amax / 127`. Measured: without
+   it `quantize_act_parity` has 303k mismatches, with it none.
+
+**Where it stands (2026-09-29).** The whole tree builds and links: the `strata` binary and 22 kernel
+parity tests. On the B70, 19 of the 22 pass byte-for-byte or within their tolerances; the other three
+need model fixtures (`iq_parity`, `ple_parity`) or the tensor-core kernel below (`qsa_prompt_attn`).
+
+| parity test | result |
+|---|---|
+| bf16_gemv, cvec, dequant_s2, elementwise, gdn, gr, kv_q4, kv_q8, kv_stream, qsa, quantize_act, rope, router_top10, s2_gemv, s2_gemv_q8, s_gemv, s_gemv_q8k, sampler, shared_expert | pass |
+| iq_parity, ple_parity | need fixtures (a `logs/iq_fixture` directory, a Q2_0 shard) |
+| qsa_prompt_attn_parity | needs the tensor-core kernel (below) |
+
+**The engine end to end.** `build-sycl/strata` starts on the card, measures the PCIe link (5.3 GB/s
+host-to-device through SYCL), loads the dense weights (1.4 GiB), the 300 native projection matrices
+(2.0 GiB), maps the 28.8 GB PLE table and reads the 23.4 GiB expert arena at 0.89 GiB/s - and is then
+stopped by the test rig's memory guard, because Strata keeps that arena as a resident host copy (its
+"R2.1" design: the CPU computes cache misses from it) and the rig has 23 GiB of RAM. That is upstream's
+own requirement (`ram_gb: 32` for IQ1_M in `setup.py`), not a port defect, and on a 32 GB card it is
+pure redundancy: every one of the 12,288 experts fits in the VRAM cache (23.4 GiB of 32), so nothing
+would ever be computed from the host copy. The missing piece is a streaming fill - load each layer's
+experts from the GGUF into the VRAM slots through a small staging buffer and keep no host arena - which
+is the next piece of engine work for machines with less RAM than experts. No token has been generated by
+the SYCL engine yet; the kernels have been validated one by one.
+
+**Not ported yet.**
+
+- Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
+  `qsa_prompt_attn`, `qsa_select`'s block scores, `native_qsa_score`. Each already has the "older card"
+  fallback the CUDA build uses below sm_80, and the SYCL build takes that path: the launchers refuse the
+  device and their callers use the older kernels. The XMX versions (`joint_matrix`, bf16/f16 on Xe2; no
+  tf32) are the next piece of work and the one that decides prompt speed.
+- The ggml MMQ prefill path (`moe_mmq.cu`) needs llama.cpp's ggml-cuda sources; not built.
+- AOT device code (`-DSTRATA_SYCL_AOT=bmg-g31`) is wired but untested; the port JITs from SPIR-V.
+
 ## Not done
 
 - Images. Strata's vision path encodes with `strata-vision` into embeddings the CUDA engine reads;
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
new file mode 100644
index 00000000000..01698a51d43
--- /dev/null
+++ b/sycl/CMakeLists.txt
@@ -0,0 +1,175 @@
+# Strata on Intel GPUs - the SYCL build of the engine (Phase 4 of the Intel port, docs/INTEL.md).
+#
+# This is a separate project on purpose. The top-level build describes the CUDA engine; every source it lists is
+# taken from ../src unless this directory carries a migrated copy: `src/X.cu` -> `sycl/src/X.dp.cpp`,
+# `src/X.cpp` -> `sycl/src/X.cpp` (only host files that called the CUDA runtime were migrated). Headers resolve
+# the same way through the include order. Upstream files are never edited, so the port is the content of this
+# directory plus the tool that produced it (../../sycl/migrate.sh).
+#
+#   cmake -S sycl -B build-sycl -G Ninja -DCMAKE_CXX_COMPILER=icpx && cmake --build build-sycl
+#
+# Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
+cmake_minimum_required(VERSION 3.24)
+project(strata_sycl VERSION 0.1.24 LANGUAGES C CXX)
+set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
+set(CMAKE_CXX_STANDARD 20)
+set(CMAKE_CXX_STANDARD_REQUIRED ON)
+set(CMAKE_CXX_EXTENSIONS OFF)
+if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES)
+  set(CMAKE_BUILD_TYPE Release CACHE STRING "" FORCE)
+endif()
+add_compile_definitions(STRATA_VERSION="${PROJECT_VERSION}-sycl")
+
+set(STRATA_SYCL_AOT "" CACHE STRING "AOT device for the GPU code, e.g. bmg-g31 (empty: SPIR-V, JIT at run time)")
+set(_sycl_flags -fsycl)
+if(STRATA_SYCL_AOT)
+  list(APPEND _sycl_flags -fsycl-targets=spir64_gen)
+  set(_sycl_link -fsycl -fsycl-targets=spir64_gen "-Xs=-device ${STRATA_SYCL_AOT}")
+else()
+  set(_sycl_link -fsycl)
+endif()
+# The Intel GPU's fp32 divide is not correctly rounded by default (OpenCL allows 2.5 ulp). Strata's quantizers
+# are byte-exact against ggml through `amax / 127`, so the device compiler is told to round divides and sqrt
+# properly; measured: quantize_act_parity goes from 303k mismatches to byte-exact. (Same as
+# SYCL_PROGRAM_COMPILE_OPTIONS=-cl-fp32-correctly-rounded-divide-sqrt at run time.)
+list(APPEND _sycl_link "-Xsycl-target-backend=spir64" "-cl-fp32-correctly-rounded-divide-sqrt")
+# Every translation unit gets -fsycl: the migrated host files construct queues and USM, not only the kernels.
+# icpx defaults to a fast floating-point model (reciprocal approximations, reassociation); the kernels are
+# compared byte-for-byte against ggml's, which nvcc built value-safe, so ask for the same here.
+add_compile_options("$<$<COMPILE_LANGUAGE:CXX>:${_sycl_flags}>" -fp-model=precise -Wno-unused-parameter
+                    -Wno-unused-variable -Wno-deprecated-declarations)
+add_link_options(${_sycl_link})
+
+# --- source resolution: the migrated copy when there is one, the original otherwise -------------------------------
+function(strata_resolve out)
+  set(r "")
+  foreach(f IN LISTS ARGN)
+    if(f MATCHES "\\.cu$")
+      string(REGEX REPLACE "\\.cu$" ".dp.cpp" m "${f}")
+      if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${m})
+        list(APPEND r ${CMAKE_CURRENT_SOURCE_DIR}/${m})
+      else()
+        message(FATAL_ERROR "no migrated copy of ${f} (expected ${m})")
+      endif()
+    elseif(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${f})
+      list(APPEND r ${CMAKE_CURRENT_SOURCE_DIR}/${f})
+    elseif(EXISTS ${STRATA_ROOT}/${f})
+      list(APPEND r ${STRATA_ROOT}/${f})
+    else()
+      message(FATAL_ERROR "no such source: ${f}")
+    endif()
+  endforeach()
+  set(${out} ${r} PARENT_SCOPE)
+endfunction()
+
+add_library(strata_includes INTERFACE)
+target_include_directories(strata_includes INTERFACE
+  ${CMAKE_CURRENT_SOURCE_DIR}/include      # migrated headers + dpct/ helpers, first
+  ${STRATA_ROOT}/include)
+target_compile_options(strata_includes INTERFACE -Wall -Wextra)
+
+# --- CPU-side pieces, identical to the top-level build ------------------------------------------------------------
+strata_resolve(_spec src/spec/suffix_drafter.cpp src/spec/controller.cpp src/spec/draft_policy.cpp)
+add_library(strata_spec STATIC ${_spec})
+target_link_libraries(strata_spec PUBLIC strata_includes)
+
+strata_resolve(_cpu src/kernels/cpu/expert.cpp src/kernels/cpu/pool.cpp src/kernels/cpu/expert_layout.cpp
+                    src/kernels/cpu/q2_avx2.cpp)
+add_library(strata_kernels_cpu STATIC ${_cpu})
+set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/expert.cpp PROPERTIES COMPILE_OPTIONS
+  "-mavx512f;-mavx512bw;-mavx512vl;-mavx512dq;-mavx512vnni;-mavx512vbmi;-mf16c;-mfma")
+set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/q2_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
+find_package(Threads REQUIRED)
+target_link_libraries(strata_kernels_cpu PUBLIC strata_includes Threads::Threads)
+
+option(STRATA_NATIVE_EXPERTS "Native (IQ) expert support through ggml-cpu" ON)
+set(STRATA_GGML_DIR "" CACHE PATH "llama.cpp checkout to take ggml from (empty: fetch the pinned commit)")
+if(STRATA_NATIVE_EXPERTS)
+  set(BUILD_SHARED_LIBS OFF CACHE BOOL "" FORCE)
+  set(GGML_STATIC ON CACHE BOOL "" FORCE)
+  set(GGML_CUDA OFF CACHE BOOL "" FORCE)
+  set(GGML_SYCL OFF CACHE BOOL "" FORCE)
+  set(GGML_OPENMP OFF CACHE BOOL "" FORCE)
+  set(GGML_BACKEND_DL OFF CACHE BOOL "" FORCE)
+  set(GGML_BUILD_TESTS OFF CACHE BOOL "" FORCE)
+  set(GGML_BUILD_EXAMPLES OFF CACHE BOOL "" FORCE)
+  set(GGML_NATIVE ON CACHE BOOL "" FORCE)
+  if(STRATA_GGML_DIR)
+    add_subdirectory(${STRATA_GGML_DIR}/ggml ${CMAKE_BINARY_DIR}/ggml EXCLUDE_FROM_ALL)
+  else()
+    include(FetchContent)
+    FetchContent_Declare(strata_llamacpp
+      GIT_REPOSITORY https://github.com/ggml-org/llama.cpp.git
+      GIT_TAG 3cf03257f219afbe7334045ff7c6a06ac68c627d
+      GIT_SHALLOW FALSE)
+    FetchContent_GetProperties(strata_llamacpp)
+    if(NOT strata_llamacpp_POPULATED)
+      FetchContent_Populate(strata_llamacpp)
+    endif()
+    add_subdirectory(${strata_llamacpp_SOURCE_DIR}/ggml ${CMAKE_BINARY_DIR}/ggml EXCLUDE_FROM_ALL)
+  endif()
+  strata_resolve(_cpu_native src/kernels/cpu/native_expert.cpp src/kernels/cpu/iq_avx512.cpp src/kernels/cpu/iq_avx2.cpp)
+  target_sources(strata_kernels_cpu PRIVATE ${_cpu_native})
+  target_include_directories(strata_kernels_cpu PRIVATE ${STRATA_ROOT}/third_party/ggml)
+  set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/iq_avx512.cpp PROPERTIES COMPILE_OPTIONS
+    "-mavx512f;-mavx512bw;-mavx512vl;-mavx512dq;-mavx512vnni;-mavx512vbmi;-mf16c;-mfma")
+  set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/iq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
+  target_link_libraries(strata_kernels_cpu PUBLIC ggml-cpu ggml-base)
+  target_compile_definitions(strata_kernels_cpu PUBLIC STRATA_NATIVE_EXPERTS=1)
+endif()
+
+# --- the GPU engine ------------------------------------------------------------------------------------------------
+strata_resolve(_core src/core/device.cu src/core/pinned.cu src/platform/memory.cpp src/core/graph.cpp
+                     src/core/weights.cpp src/core/layout.cpp)
+add_library(strata_core STATIC ${_core})
+target_link_libraries(strata_core PUBLIC strata_includes)
+
+set(_kernel_cu dequant_s2 s2_gemv s_gemv s2_gemv_quads s2_gemv_fast router_top10 quantize_act rope sampler s2_gemv_q8
+    s2_expert_grouped shared_expert gr gdn qsa elementwise bf16_gemv native_mmvq native_bf16 native_gr_norm native_moe
+    native_gdn native_gr_postops native_router native_gdn_preprocess native_qsa native_rope native_ple_postops
+    native_flash_attn native_qsa_indexer native_qsa_score ple kv_q8 kv_stream kv_q4 fused_gr cvec qsa_decode_attn
+    qsa_prompt_attn fused_gdn dequant_bf16 qsa_select verify_kernels iq_kernels)
+set(_kernel_files "")
+foreach(k IN LISTS _kernel_cu)
+  list(APPEND _kernel_files src/kernels/cuda/${k}.cu)
+endforeach()
+strata_resolve(_kernels ${_kernel_files} src/kernels/ngram.cpp src/ngram/ple_reader.cpp src/platform/direct_file.cpp)
+add_library(strata_kernels STATIC ${_kernels})
+target_include_directories(strata_kernels PRIVATE ${STRATA_ROOT}/third_party/ggml)
+target_link_libraries(strata_kernels PUBLIC strata_core)
+
+strata_resolve(_engine src/core/layer.cpp src/core/session.cpp src/core/expert_source.cpp src/core/remote_experts.cpp
+                       src/core/expert_cache.cpp src/core/native_head.cpp src/core/native_dense.cpp src/core/verify.cpp
+                       src/core/mtp.cpp)
+add_library(strata_engine STATIC ${_engine})
+target_link_libraries(strata_engine PUBLIC strata_core strata_kernels strata_kernels_cpu)
+
+# cuBLAS -> oneMKL through dpct::blas (needs the MKL SYCL BLAS domain)
+strata_resolve(_prefill src/prefill/gemm.cu src/prefill/kernels.cu src/prefill/prefill.cpp)
+add_library(strata_prefill STATIC ${_prefill})
+target_compile_options(strata_prefill PUBLIC -qmkl=sequential)
+target_link_options(strata_prefill PUBLIC -qmkl=sequential)
+target_link_libraries(strata_prefill PUBLIC strata_engine)
+
+strata_resolve(_main src/program/generate.cpp)
+add_executable(strata ${_main})
+target_link_libraries(strata PRIVATE strata_engine strata_prefill strata_spec)
+
+# --- the kernel parity self-tests (each runs on the card and compares against a CPU reference) ---------------------
+option(STRATA_SYCL_PARITY "Build the kernel parity tests" ON)
+if(STRATA_SYCL_PARITY)
+  enable_testing()
+  foreach(p IN ITEMS dequant_s2 s2_gemv iq shared_expert gr gdn s2_gemv_q8 sampler rope quantize_act router_top10
+                     s_gemv elementwise bf16_gemv s_gemv_q8k qsa ple kv_q8 kv_stream kv_q4 cvec)
+    strata_resolve(_src src/kernels/${p}_parity.cpp)
+    add_executable(${p}_parity ${_src})
+    target_include_directories(${p}_parity PRIVATE ${STRATA_ROOT}/src/kernels)   # the oracle .inc fixtures
+    target_link_libraries(${p}_parity PRIVATE strata_kernels)
+    add_test(NAME ${p}_parity COMMAND ${p}_parity --selftest)
+  endforeach()
+  # the prompt-attention parity takes a context length, not --selftest, and needs the tensor-core kernel (not
+  # ported yet: it reports "refused the pools" here). Built, not registered.
+  strata_resolve(_src src/kernels/qsa_prompt_attn_parity.cpp)
+  add_executable(qsa_prompt_attn_parity ${_src})
+  target_link_libraries(qsa_prompt_attn_parity PRIVATE strata_kernels)
+endif()
diff --git a/sycl/dpct_report.apis.csv b/sycl/dpct_report.apis.csv
new file mode 100644
index 00000000000..2f07be623bc
--- /dev/null
+++ b/sycl/dpct_report.apis.csv
@@ -0,0 +1,167 @@
+ API name, Frequency 
+"_Bool isnan(float __x)",1
+"__half",18
+"__half __float2half(const float a)",4
+"__half __float2half_rn(const float a)",10
+"__half __ushort_as_half(const unsigned short i)",22
+"__half2",27
+"__half2 __floats2half2_rn(const float a,const float b)",3
+"__half2 __halves2half2(const __half a,const __half b)",3
+"__half2 __hsub2(const __half2 a,const __half2 b)",1
+"__half2 make_half2(const __half x,const __half y)",2
+"char4",4
+"const char * cudaGetErrorString(cudaError_t error)",142
+"cublasHandle_t",6
+"cublasStatus_t",1
+"cublasStatus_t cublasCreate_v2(cublasHandle_t * handle)",2
+"cublasStatus_t cublasDestroy_v2(cublasHandle_t handle)",1
+"cublasStatus_t cublasGemmEx(cublasHandle_t handle,cublasOperation_t transa,cublasOperation_t transb,int m,int n,int k,const void * alpha,const void * A,cudaDataType Atype,int lda,const void * B,cudaDataType Btype,int ldb,const void * beta,void * C,cudaDataType Ctype,int ldc,cublasComputeType_t computeType,cublasGemmAlgo_t algo)",2
+"cublasStatus_t cublasSetMathMode(cublasHandle_t handle,cublasMath_t mode)",2
+"cublasStatus_t cublasSetStream_v2(cublasHandle_t handle,cudaStream_t streamId)",2
+"cublasStatus_t cublasSetWorkspace_v2(cublasHandle_t handle,void * workspace,size_t workspaceSizeInBytes)",3
+"cudaDeviceProp",2
+"cudaError_t",113
+"cudaError_t cudaDeviceGetAttribute(int * value,enum cudaDeviceAttr attr,int device)",6
+"cudaError_t cudaDeviceSynchronize()",70
+"cudaError_t cudaDriverGetVersion(int * driverVersion)",1
+"cudaError_t cudaEventCreate(cudaEvent_t * event)",17
+"cudaError_t cudaEventCreateWithFlags(cudaEvent_t * event,unsigned int flags)",9
+"cudaError_t cudaEventDestroy(cudaEvent_t event)",21
+"cudaError_t cudaEventElapsedTime(float * ms,cudaEvent_t start,cudaEvent_t end)",17
+"cudaError_t cudaEventQuery(cudaEvent_t event)",6
+"cudaError_t cudaEventRecord(cudaEvent_t event,cudaStream_t stream)",39
+"cudaError_t cudaEventSynchronize(cudaEvent_t event)",10
+"cudaError_t cudaFree(void * devPtr)",176
+"cudaError_t cudaFreeHost(void * ptr)",32
+"cudaError_t cudaFuncSetAttribute(void (*)(const float *, const float *, const int *, long, long, long, float *) func,enum cudaFuncAttribute attr,int value)",1
+"cudaError_t cudaFuncSetAttribute(void (*)(const float *, const unsigned short *, const unsigned short *, const int *, int, int, int, float *, float *) func,enum cudaFuncAttribute attr,int value)",1
+"cudaError_t cudaFuncSetAttribute(void (*)(const float *, struct strata::kernels::QsaAttnPools, const int *, const int *, int, int, float, float *, int) func,enum cudaFuncAttribute attr,int value)",2
+"cudaError_t cudaFuncSetAttribute(void (*)(struct strata::kernels::(anonymous namespace)::GrMulti) func,enum cudaFuncAttribute attr,int value)",1
+"cudaError_t cudaGetDevice(int * device)",19
+"cudaError_t cudaGetDeviceCount(int * count)",5
+"cudaError_t cudaGetDeviceProperties_v2(struct cudaDeviceProp * prop,int device)",2
+"cudaError_t cudaGetLastError()",89
+"cudaError_t cudaGraphDestroy(cudaGraph_t graph)",11
+"cudaError_t cudaGraphExecDestroy(cudaGraphExec_t graphExec)",14
+"cudaError_t cudaGraphGetNodes(cudaGraph_t graph,cudaGraphNode_t * nodes,size_t * numNodes)",1
+"cudaError_t cudaGraphInstantiate(cudaGraphExec_t * pGraphExec,cudaGraph_t graph,cudaGraphNode_t * pErrorNode,char * pLogBuffer,size_t bufferSize)",5
+"cudaError_t cudaGraphInstantiate(cudaGraphExec_t * pGraphExec,cudaGraph_t graph,unsigned long long flags)",5
+"cudaError_t cudaGraphLaunch(cudaGraphExec_t graphExec,cudaStream_t stream)",21
+"cudaError_t cudaHostAlloc(void ** pHost,size_t size,unsigned int flags)",15
+"cudaError_t cudaHostGetDevicePointer(void ** pDevice,void * pHost,unsigned int flags)",9
+"cudaError_t cudaHostRegister(void * ptr,size_t size,unsigned int flags)",2
+"cudaError_t cudaHostUnregister(void * ptr)",2
+"cudaError_t cudaMalloc(float ** devPtr,size_t size)",130
+"cudaError_t cudaMalloc(int ** devPtr,size_t size)",17
+"cudaError_t cudaMalloc(signed char ** devPtr,size_t size)",1
+"cudaError_t cudaMalloc(unsigned char ** devPtr,size_t size)",22
+"cudaError_t cudaMalloc(unsigned short ** devPtr,size_t size)",26
+"cudaError_t cudaMalloc(void ** devPtr,size_t size)",42
+"cudaError_t cudaMallocHost(void ** ptr,size_t size)",1
+"cudaError_t cudaMemGetInfo(size_t * free,size_t * total)",11
+"cudaError_t cudaMemcpy(void * dst,const void * src,size_t count,enum cudaMemcpyKind kind)",339
+"cudaError_t cudaMemcpy2DAsync(void * dst,size_t dpitch,const void * src,size_t spitch,size_t width,size_t height,enum cudaMemcpyKind kind,cudaStream_t stream)",1
+"cudaError_t cudaMemcpyAsync(void * dst,const void * src,size_t count,enum cudaMemcpyKind kind,cudaStream_t stream)",70
+"cudaError_t cudaMemcpyToSymbol(const float &[256][4] symbol,const void * src,size_t count,size_t offset,enum cudaMemcpyKind kind)",1
+"cudaError_t cudaMemset(void * devPtr,int value,size_t count)",13
+"cudaError_t cudaMemsetAsync(void * devPtr,int value,size_t count,cudaStream_t stream)",22
+"cudaError_t cudaPeekAtLastError()",3
+"cudaError_t cudaRuntimeGetVersion(int * runtimeVersion)",1
+"cudaError_t cudaSetDevice(int device)",11
+"cudaError_t cudaStreamBeginCapture(cudaStream_t stream,enum cudaStreamCaptureMode mode)",10
+"cudaError_t cudaStreamCreate(cudaStream_t * pStream)",11
+"cudaError_t cudaStreamCreateWithFlags(cudaStream_t * pStream,unsigned int flags)",12
+"cudaError_t cudaStreamDestroy(cudaStream_t stream)",17
+"cudaError_t cudaStreamEndCapture(cudaStream_t stream,cudaGraph_t * pGraph)",10
+"cudaError_t cudaStreamQuery(cudaStream_t stream)",2
+"cudaError_t cudaStreamSynchronize(cudaStream_t stream)",57
+"cudaError_t cudaStreamWaitEvent(cudaStream_t stream,cudaEvent_t event,unsigned int flags)",8
+"cudaEvent_t",30
+"cudaStream_t",306
+"dim3",55
+"double __dadd_rn(double __a,double __b)",6
+"double __ddiv_rn(double __a,double __b)",2
+"double __dmul_rn(double __a,double __b)",3
+"double __dsqrt_rn(double __a)",2
+"double __shfl_down_sync(unsigned int __mask,double __val,unsigned int __offset,int __width)",6
+"double __shfl_sync(unsigned int __mask,double __val,int __offset,int __width)",2
+"double __shfl_xor_sync(unsigned int __mask,double __val,int __offset,int __width)",1
+"double exp(double __a)",10
+"double fmax(double __a,double __b)",1
+"double rint(double __a)",1
+"double sqrt(double __a)",2
+"float __expf(float __a)",33
+"float __fadd_rn(float __a,float __b)",29
+"float __fdiv_rn(float __a,float __b)",3
+"float __fdividef(float __a,float __b)",3
+"float __fmaf_rn(float __a,float __b,float __c)",18
+"float __fmul_rn(float __a,float __b)",24
+"float __fsub_rn(float __a,float __b)",1
+"float __half2float(const __half a)",45
+"float __high2float(const __half2 a)",6
+"float __int_as_float(int __a)",21
+"float __ldg(const float * ptr)",2
+"float __low2float(const __half2 a)",29
+"float __shfl_down_sync(unsigned int __mask,float __val,unsigned int __offset,int __width)",16
+"float __shfl_sync(unsigned int __mask,float __val,int __offset,int __width)",2
+"float __shfl_xor_sync(unsigned int __mask,float __val,int __offset,int __width)",51
+"float __uint_as_float(unsigned int __a)",24
+"float cosf(float __a)",4
+"float exp2f(float __a)",4
+"float expf(float __a)",26
+"float fabsf(float __a)",13
+"float fmaf(float __a,float __b,float __c)",63
+"float fmaxf(float __a,float __b)",48
+"float frexpf(float __a,int * __b)",2
+"float ldexpf(float __a,int __b)",4
+"float log1pf(float __a)",5
+"float logf(float __a)",2
+"float max(const float a,const float b)",2
+"float powf(float __a,float __b)",4
+"float roundf(float __a)",2
+"float rsqrtf(float __a)",25
+"float sinf(float __a)",4
+"float sqrtf(float __a)",4
+"float2",23
+"float2 __half22float2(const __half2 a)",16
+"float2 make_float2(float x,float y)",6
+"float4",64
+"float4 make_float4(float x,float y,float z,float w)",6
+"half",15
+"half2",8
+"int __dp4a(int srcA,int srcB,int c)",54
+"int __float2int_rn(float __a)",2
+"int __float2int_rz(float __a)",1
+"int __ldg(const int * ptr)",22
+"int __popc(unsigned int __a)",5
+"int __shfl_down_sync(unsigned int __mask,int __val,unsigned int __offset,int __width)",7
+"int __shfl_up_sync(unsigned int __mask,int __val,unsigned int __offset,int __width)",4
+"int __shfl_xor_sync(unsigned int __mask,int __val,int __offset,int __width)",2
+"int atomicAdd(int * address,int val)",4
+"int atomicCAS(int * address,int compare,int val)",1
+"int max(int __a,int __b)",1
+"int min(int __a,int __b)",7
+"int2",12
+"int2 make_int2(int x,int y)",7
+"long long __shfl_sync(unsigned int __mask,long long __val,int __offset,int __width)",1
+"size_t __cvta_generic_to_shared(const void * p)",1
+"uint2",19
+"uint2 make_uint2(unsigned int x,unsigned int y)",1
+"uint4",50
+"uint4 __ldg(const uint4 * ptr)",12
+"uint4 make_uint4(unsigned int x,unsigned int y,unsigned int z,unsigned int w)",2
+"unsigned int __ballot_sync(unsigned int mask,int pred)",2
+"unsigned int __byte_perm(unsigned int __a,unsigned int __b,unsigned int __c)",22
+"unsigned int __float_as_uint(float __a)",3
+"unsigned int __umulhi(unsigned int __a,unsigned int __b)",2
+"unsigned int __vcmpne4(unsigned int __a,unsigned int __b)",10
+"unsigned int __vsub4(unsigned int __a,unsigned int __b)",10
+"unsigned int __vsubss4(unsigned int __a,unsigned int __b)",2
+"unsigned int atomicOr(unsigned int * address,unsigned int val)",2
+"unsigned short __half_as_ushort(const __half h)",3
+"unsigned short __ldg(const unsigned short * ptr)",2
+"ushort4",3
+"void __nanosleep(unsigned int ns)",3
+"void __syncwarp(unsigned int mask)",10
+"void __threadfence()",1
+"void __threadfence_system()",6
diff --git a/sycl/dpct_report.stats.csv b/sycl/dpct_report.stats.csv
new file mode 100644
index 00000000000..8bee6c52d6e
--- /dev/null
+++ b/sycl/dpct_report.stats.csv
@@ -0,0 +1,101 @@
+
+File name, LOC migrated to SYCL, LOC migrated to helper functions, LOC not needed to migrate, LOC not able to migrate
+/work/Strata_B70/src/core/session.cpp, 68, 91, 781, 0
+/work/Strata_B70/src/kernels/cuda/native_gdn_preprocess.cu, 43, 2, 155, 0
+/work/Strata_B70/src/kernels/cuda/rope.cu, 14, 4, 78, 0
+/work/Strata_B70/src/kernels/cuda/kv_q4.cu, 49, 12, 171, 0
+/work/Strata_B70/src/kernels/kv_q8_parity.cpp, 2, 18, 122, 0
+/work/Strata_B70/src/kernels/s_gemv_parity.cpp, 6, 44, 585, 0
+/work/Strata_B70/src/kernels/cuda/native_qsa_score.cu, 33, 5, 134, 0
+/work/Strata_B70/src/kernels/cuda/gdn.cu, 75, 15, 159, 0
+/work/Strata_B70/src/kernels/shared_expert_parity.cpp, 12, 60, 411, 0
+/work/Strata_B70/src/kernels/cuda/sampler.cu, 64, 15, 259, 0
+/work/Strata_B70/src/kernels/cuda/qsa_select.cu, 105, 17, 399, 0
+/work/Strata_B70/src/kernels/cuda/native_flash_attn.cu, 47, 5, 161, 0
+/work/Strata_B70/src/kernels/router_top10_parity.cpp, 6, 11, 151, 0
+/work/Strata_B70/src/kernels/bf16_gemv_parity.cpp, 6, 13, 130, 0
+/work/Strata_B70/src/kernels/qsa_prompt_attn_parity.cpp, 11, 18, 181, 0
+/work/Strata_B70/src/kernels/sampler_parity.cpp, 6, 26, 822, 0
+/work/Strata_B70/src/kernels/cuda/router_top10.cu, 35, 11, 181, 0
+/work/Strata_B70/src/kernels/cuda/native_qsa_indexer.cu, 63, 5, 176, 0
+/work/Strata_B70/src/kernels/cuda/qsa_decode_attn.cu, 94, 11, 170, 0
+/work/Strata_B70/src/kernels/cuda/fused_gr.cu, 97, 9, 262, 0
+/work/Strata_B70/src/kernels/cuda/quantize_act.cu, 53, 15, 246, 0
+/work/Strata_B70/src/kernels/cuda/native_gr_postops.cu, 27, 2, 87, 0
+/work/Strata_B70/src/core/expert_source.cpp, 6, 4, 783, 0
+/work/Strata_B70/src/kernels/kv_stream_parity.cpp, 3, 21, 211, 0
+/work/Strata_B70/src/kernels/cuda/gr.cu, 94, 12, 327, 0
+/work/Strata_B70/src/kernels/cuda/native_ple_postops.cu, 60, 4, 158, 0
+/work/Strata_B70/src/kernels/native_expert_parity.cpp, 1, 2, 259, 0
+/work/Strata_B70/src/prefill/ggml_cuda_host.cu, 7, 5, 71, 0
+/work/Strata_B70/src/kernels/cuda/s2_gemv_fast.cu, 45, 6, 103, 0
+/work/Strata_B70/src/kernels/cuda/native_qsa.cu, 19, 2, 107, 0
+/work/Strata_B70/src/kernels/qsa_parity.cpp, 20, 37, 1327, 0
+/work/Strata_B70/src/kernels/cuda/dequant_bf16.cu, 19, 2, 225, 0
+/work/Strata_B70/src/kernels/cuda/kv_stream.cu, 46, 12, 201, 0
+/work/Strata_B70/src/prefill/moe_mmq.cu, 38, 6, 143, 0
+/work/Strata_B70/src/kernels/cvec_parity.cpp, 6, 12, 206, 0
+/work/Strata_B70/src/core/expert_cache.cpp, 8, 16, 300, 0
+/work/Strata_B70/src/kernels/cuda/verify_kernels.cu, 177, 19, 359, 0
+/work/Strata_B70/include/strata/kernels/mrope.hpp, 3, 0, 31, 0
+/work/Strata_B70/src/kernels/cuda/iq_kernels.cu, 167, 40, 541, 0
+/work/Strata_B70/src/kernels/cuda/fused_gdn.cu, 65, 9, 93, 0
+/work/Strata_B70/src/kernels/cuda/native_mmvq.cu, 242, 59, 1192, 0
+/work/Strata_B70/include/strata/core/verify.hpp, 1, 5, 232, 0
+/work/Strata_B70/src/kernels/elementwise_parity.cpp, 19, 42, 356, 0
+/work/Strata_B70/src/kernels/cuda/qsa.cu, 138, 21, 653, 0
+/work/Strata_B70/src/kernels/dequant_bf16_test.cpp, 1, 9, 99, 0
+/work/Strata_B70/src/kernels/cuda/native_rope.cu, 10, 4, 84, 0
+/work/Strata_B70/src/core/device.cu, 11, 13, 95, 0
+/work/Strata_B70/src/kernels/quantize_act_parity.cpp, 6, 21, 381, 0
+/work/Strata_B70/src/kernels/cuda/s_gemv.cu, 127, 18, 542, 0
+/work/Strata_B70/src/kernels/cuda/bf16_gemv.cu, 31, 6, 105, 0
+/work/Strata_B70/include/strata/core/session.hpp, 1, 7, 404, 0
+/work/Strata_B70/src/kernels/cuda/shared_expert.cu, 60, 10, 277, 0
+/work/Strata_B70/src/core/layer.cpp, 29, 27, 1215, 0
+/work/Strata_B70/src/kernels/dequant_s2_parity.cpp, 6, 11, 127, 0
+/work/Strata_B70/src/core/pinned.cu, 13, 8, 346, 0
+/work/Strata_B70/src/core/concurrent_main.cpp, 13, 22, 163, 0
+/work/Strata_B70/src/kernels/s_gemv_q8k_parity.cpp, 6, 24, 207, 0
+/work/Strata_B70/src/core/weights.cpp, 2, 15, 440, 0
+/work/Strata_B70/src/kernels/cuda/elementwise.cu, 87, 9, 225, 0
+/work/Strata_B70/src/kernels/kv_q4_parity.cpp, 6, 32, 309, 0
+/work/Strata_B70/src/kernels/ple_parity.cpp, 26, 108, 1051, 0
+/work/Strata_B70/src/kernels/qsa_select_bench.cpp, 5, 17, 118, 0
+/work/Strata_B70/src/core/native_dense.cpp, 4, 7, 172, 0
+/work/Strata_B70/src/kernels/cuda/s2_gemv_quads.cu, 25, 2, 67, 0
+/work/Strata_B70/include/strata/kernels/bf16_bits.hpp, 2, 0, 45, 0
+/work/Strata_B70/src/kernels/gdn_parity.cpp, 6, 45, 347, 0
+/work/Strata_B70/src/kernels/cuda/native_bf16.cu, 32, 7, 148, 0
+/work/Strata_B70/src/kernels/cuda/s2_gemv.cu, 13, 2, 49, 0
+/work/Strata_B70/src/kernels/cuda/kv_q8.cu, 43, 6, 79, 0
+/work/Strata_B70/include/strata/kernels/rope.hpp, 2, 0, 49, 0
+/work/Strata_B70/third_party/ggml/ggml-common.h, 4, 865, 1043, 0
+/work/Strata_B70/include/strata/core/on_device.hpp, 1, 2, 20, 0
+/work/Strata_B70/src/core/overlap_main.cpp, 16, 28, 126, 0
+/work/Strata_B70/include/strata/core/mtp.hpp, 1, 6, 142, 0
+/work/Strata_B70/src/kernels/cuda/native_gr_norm.cu, 15, 3, 85, 0
+/work/Strata_B70/src/kernels/gr_parity.cpp, 16, 80, 520, 0
+/work/Strata_B70/src/kernels/cuda/native_router.cu, 19, 4, 105, 0
+/work/Strata_B70/src/kernels/s2_gemv_parity.cpp, 6, 14, 154, 0
+/work/Strata_B70/src/kernels/rope_parity.cpp, 6, 15, 151, 0
+/work/Strata_B70/src/prefill/prefill.cpp, 60, 52, 1542, 0
+/work/Strata_B70/src/kernels/iq_parity.cpp, 2, 12, 74, 0
+/work/Strata_B70/src/kernels/cuda/qsa_prompt_attn.cu, 159, 26, 485, 0
+/work/Strata_B70/src/kernels/cuda/ple.cu, 73, 6, 288, 0
+/work/Strata_B70/src/kernels/s2_gemv_q8_parity.cpp, 6, 16, 160, 0
+/work/Strata_B70/src/kernels/cuda/cvec.cu, 25, 22, 120, 0
+/work/Strata_B70/src/kernels/cuda/dequant_s2.cu, 10, 2, 40, 0
+/work/Strata_B70/src/kernels/cuda/native_gdn.cu, 15, 2, 106, 0
+/work/Strata_B70/include/strata/kernels/f16_bits.hpp, 2, 0, 95, 0
+/work/Strata_B70/include/strata/core/remote_experts.hpp, 1, 1, 84, 0
+/work/Strata_B70/src/kernels/cuda/s2_expert_grouped.cu, 184, 21, 581, 0
+/work/Strata_B70/src/prefill/gemm.cu, 7, 25, 83, 0
+/work/Strata_B70/src/kernels/cuda/native_moe.cu, 16, 2, 69, 0
+/work/Strata_B70/src/program/generate.cpp, 48, 134, 4874, 0
+/work/Strata_B70/src/core/native_head.cpp, 6, 12, 134, 0
+/work/Strata_B70/src/prefill/kernels.cu, 211, 10, 401, 0
+/work/Strata_B70/src/kernels/cuda/s2_gemv_q8.cu, 20, 4, 73, 0
+
+Total migration time: 179566.969000 ms
+
diff --git a/sycl/include/dpct/atomic.hpp b/sycl/include/dpct/atomic.hpp
new file mode 100644
index 00000000000..2bbecc94850
--- /dev/null
+++ b/sycl/include/dpct/atomic.hpp
@@ -0,0 +1,868 @@
+//==---- atomic.hpp -------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_ATOMIC_HPP__
+#define __DPCT_ATOMIC_HPP__
+
+#include <sycl/sycl.hpp>
+
+namespace dpct {
+
+/// Atomically add the value operand to the value at the addr and assign the
+/// result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to add to the value at \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_add(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_add(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_add(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_add(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline sycl::half2 atomic_fetch_add(sycl::half2 *addr, sycl::half2 operand) {
+  auto atm = sycl::atomic_ref<unsigned, memoryOrder, memoryScope, addressSpace>(
+      *reinterpret_cast<unsigned *>(addr));
+
+  union {
+    unsigned i;
+    sycl::half2 h;
+  } old{0}, output{0};
+
+  while (true) {
+    old.i = atm.load();
+    output.h = old.h + operand;
+    if (atm.compare_exchange_strong(old.i, output.i))
+      break;
+  }
+
+  return output.h;
+}
+
+/// Atomically add the value operand to the value at the addr and assign the
+/// result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to add to the value at \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_add(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_add<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_add<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_add<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_add(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_add<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically subtract the value operand from the value at the addr and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to subtract from the value at \p addr
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_sub(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_sub(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_sub(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_sub(operand);
+}
+
+/// Atomically subtract the value operand from the value at the addr and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to subtract from the value at \p addr
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_sub(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_sub<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_sub<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_sub<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_sub(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_sub<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically perform a bitwise AND between the value operand and the value at the addr
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise AND operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_and(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_and(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_and(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_and(operand);
+}
+
+/// Atomically perform a bitwise AND between the value operand and the value at the addr
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise AND operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_and(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_and<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_and<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_and<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_and(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_and<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically or the value at the addr with the value operand, and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise OR operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_or(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_or(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_or(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_or(operand);
+}
+
+/// Atomically or the value at the addr with the value operand, and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise OR operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_or(T *addr, T operand,
+                         sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_or<T, addressSpace, sycl::memory_order::relaxed,
+                           sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_or<T, addressSpace, sycl::memory_order::acq_rel,
+                           sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_or<T, addressSpace, sycl::memory_order::seq_cst,
+                           sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_or(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_or<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically xor the value at the addr with the value operand, and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise XOR operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_xor(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_xor(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_xor(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_xor(operand);
+}
+
+/// Atomically xor the value at the addr with the value operand, and assign
+/// the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to use in bitwise XOR operation with the value at the \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_xor(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_xor<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_xor<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_xor<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_xor(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_xor<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically calculate the minimum of the value at addr and the value operand
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_min(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_min(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_min(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_min(operand);
+}
+
+/// Atomically calculate the minimum of the value at addr and the value operand
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_min(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_min<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_min<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_min<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_min(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_min<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically calculate the maximum of the value at addr and the value operand
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_fetch_max(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_max(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_fetch_max(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.fetch_max(operand);
+}
+
+/// Atomically calculate the maximum of the value at addr and the value operand
+/// and assign the result to the value at addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_fetch_max(T *addr, T operand,
+                          sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_max<T, addressSpace, sycl::memory_order::relaxed,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_max<T, addressSpace, sycl::memory_order::acq_rel,
+                            sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_max<T, addressSpace, sycl::memory_order::seq_cst,
+                            sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_fetch_max(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_fetch_max<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically set \p operand to the value stored in \p addr, if old value stored in
+/// \p addr is equal to zero or greater than \p operand, else decrease the value stored
+/// in \p addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The threshold value.
+/// \param memoryOrder The memory ordering used.
+/// \returns The old value stored in \p addr.
+template <sycl::access::address_space addressSpace = sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline unsigned int atomic_fetch_compare_dec(unsigned int *addr,
+                                             unsigned int operand) {
+  auto atm = sycl::atomic_ref<unsigned int, memoryOrder, memoryScope,
+                                  addressSpace>(addr[0]);
+  unsigned int old;
+
+	while (true) {
+	  old = atm.load();
+	  if (old == 0 || old > operand) {
+		  if (atm.compare_exchange_strong(old, operand))
+        break;
+	  } else if (atm.compare_exchange_strong(old, old - 1))
+      break;
+	}
+
+  return old;
+}
+
+/// Atomically increment the value stored in \p addr if old value stored in \p
+/// addr is less than \p operand, else set 0 to the value stored in \p addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The threshold value.
+/// \param memoryOrder The memory ordering used.
+/// \returns The old value stored in \p addr.
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline unsigned int atomic_fetch_compare_inc(unsigned int *addr,
+                                             unsigned int operand) {
+  auto atm = sycl::atomic_ref<unsigned int, memoryOrder, memoryScope,
+                                  addressSpace>(addr[0]);
+  unsigned int old;
+  while (true) {
+    old = atm.load();
+    if (old >= operand) {
+      if (atm.compare_exchange_strong(old, 0))
+        break;
+    } else if (atm.compare_exchange_strong(old, old + 1))
+      break;
+  }
+  return old;
+}
+
+/// Atomically increment the value stored in \p addr if old value stored in \p
+/// addr is less than \p operand, else set 0 to the value stored in \p addr.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The threshold value.
+/// \param memoryOrder The memory ordering used.
+/// \returns The old value stored in \p addr.
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space>
+inline unsigned int
+atomic_fetch_compare_inc(unsigned int *addr, unsigned int operand,
+                         sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_fetch_compare_inc<addressSpace, sycl::memory_order::relaxed,
+                                    sycl::memory_scope::device>(addr,
+                                                                   operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_fetch_compare_inc<addressSpace, sycl::memory_order::acq_rel,
+                                    sycl::memory_scope::device>(addr,
+                                                                   operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_fetch_compare_inc<addressSpace, sycl::memory_order::seq_cst,
+                                    sycl::memory_scope::device>(addr,
+                                                                   operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+/// Atomically exchange the value at the address addr with the value operand.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to be exchanged with the value pointed by \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+inline T atomic_exchange(T *addr, T operand) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.exchange(operand);
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2>
+inline T1 atomic_exchange(T1 *addr, T2 operand) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  return atm.exchange(operand);
+}
+
+/// Atomically exchange the value at the address addr with the value operand.
+/// \param [in, out] addr The pointer to the data.
+/// \param operand The value to be exchanged with the value pointed by \p addr.
+/// \param memoryOrder The memory ordering used.
+/// \returns The value at the \p addr before the call.
+template <typename T, sycl::access::address_space addressSpace =
+                          sycl::access::address_space::global_space>
+inline T atomic_exchange(T *addr, T operand,
+                         sycl::memory_order memoryOrder) {
+  switch (memoryOrder) {
+  case sycl::memory_order::relaxed:
+    return atomic_exchange<T, addressSpace, sycl::memory_order::relaxed,
+                           sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::acq_rel:
+    return atomic_exchange<T, addressSpace, sycl::memory_order::acq_rel,
+                           sycl::memory_scope::device>(addr, operand);
+  case sycl::memory_order::seq_cst:
+    return atomic_exchange<T, addressSpace, sycl::memory_order::seq_cst,
+                           sycl::memory_scope::device>(addr, operand);
+  default:
+    assert(false && "Invalid memory_order for atomics. Valid memory_order for "
+                    "atomics are: sycl::memory_order::relaxed, "
+                    "sycl::memory_order::acq_rel, sycl::memory_order::seq_cst!");
+  }
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          typename T1, typename T2>
+inline T1 atomic_exchange(T1 *addr, T2 operand,
+                           sycl::memory_order memoryOrder) {
+  atomic_exchange<T1, addressSpace>(addr, operand, memoryOrder);
+}
+
+/// Atomically compare the value at \p addr to the value expected and exchange
+/// with the value desired if the value at \p addr is equal to the value expected.
+/// Returns the value at the \p addr before the call.
+/// \param [in, out] addr Multi_ptr.
+/// \param expected The value to compare against the value at \p addr.
+/// \param desired The value to assign to \p addr if the value at \p addr is expected.
+/// \param success The memory ordering used when comparison succeeds.
+/// \param fail The memory ordering used when comparison fails.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+T atomic_compare_exchange_strong(
+    sycl::multi_ptr<T, addressSpace> addr, T expected, T desired,
+    sycl::memory_order success = sycl::memory_order::relaxed,
+    sycl::memory_order fail = sycl::memory_order::relaxed) {
+  auto atm = sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(*addr);
+
+  atm.compare_exchange_strong(expected, desired, success, fail);
+  return expected;
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2, typename T3>
+T1 atomic_compare_exchange_strong(
+    sycl::multi_ptr<T1, addressSpace> addr, T2 expected, T3 desired,
+    sycl::memory_order success = sycl::memory_order::relaxed,
+    sycl::memory_order fail = sycl::memory_order::relaxed) {
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(*addr);
+  T1 expected_value = expected;
+  atm.compare_exchange_strong(expected_value, desired, success, fail);
+  return expected_value;
+}
+
+/// Atomically compare the value at \p addr to the value expected and exchange
+/// with the value desired if the value at \p addr is equal to the value expected.
+/// Returns the value at the \p addr before the call.
+/// \param [in] addr The pointer to the data.
+/// \param expected The value to compare against the value at \p addr.
+/// \param desired The value to assign to \p addr if the value at \p addr is expected.
+/// \param success The memory ordering used when comparison succeeds.
+/// \param fail The memory ordering used when comparison fails.
+/// \returns The value at the \p addr before the call.
+template <typename T,
+          sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device>
+T atomic_compare_exchange_strong(
+    T *addr, T expected, T desired,
+    sycl::memory_order success = sycl::memory_order::relaxed,
+    sycl::memory_order fail = sycl::memory_order::relaxed) {
+  auto atm =
+      sycl::atomic_ref<T, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  atm.compare_exchange_strong(expected, desired, success, fail);
+  return expected;
+}
+
+template <sycl::access::address_space addressSpace =
+              sycl::access::address_space::global_space,
+          sycl::memory_order memoryOrder = sycl::memory_order::relaxed,
+          sycl::memory_scope memoryScope = sycl::memory_scope::device,
+          typename T1, typename T2, typename T3>
+T1 atomic_compare_exchange_strong(
+    T1 *addr, T2 expected, T3 desired,
+    sycl::memory_order success = sycl::memory_order::relaxed,
+    sycl::memory_order fail = sycl::memory_order::relaxed) {
+  T1 expected_value = expected;
+  auto atm =
+      sycl::atomic_ref<T1, memoryOrder, memoryScope, addressSpace>(addr[0]);
+  atm.compare_exchange_strong(expected_value, desired, success, fail);
+  return expected_value;
+}
+
+/// Atomic extension to implement standard APIs in std::atomic
+namespace detail{
+template <typename T> struct IsValidAtomicType {
+  static constexpr bool value =
+      (std::is_same<T, int>::value || std::is_same<T, unsigned int>::value ||
+       std::is_same<T, long>::value || std::is_same<T, unsigned long>::value ||
+       std::is_same<T, long long>::value ||
+       std::is_same<T, unsigned long long>::value ||
+       std::is_same<T, float>::value || std::is_same<T, double>::value ||
+       std::is_pointer<T>::value);
+};
+} // namespace detail
+
+template <typename T,
+          sycl::memory_scope DefaultScope = sycl::memory_scope::system,
+#ifdef __AMDGPU__
+          sycl::memory_order DefaultOrder = sycl::memory_order::acq_rel,
+#else
+          sycl::memory_order DefaultOrder = sycl::memory_order::seq_cst,
+#endif
+          sycl::access::address_space Space =
+              sycl::access::address_space::generic_space>
+class atomic {
+  static_assert(
+    detail::IsValidAtomicType<T>::value,
+    "Invalid atomic type.  Valid types are int, unsigned int, long, "
+      "unsigned long, long long, unsigned long long, float, double "
+      "and pointer types");
+  T __d;
+
+public:
+  /// default memory synchronization order
+  static constexpr sycl::memory_order default_read_order =
+      sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space>::default_read_order;
+  static constexpr sycl::memory_order default_write_order =
+      sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space>::default_write_order;
+  static constexpr sycl::memory_scope default_scope = DefaultScope;
+  static constexpr sycl::memory_order default_read_modify_write_order =
+      DefaultOrder;
+
+  /// Default constructor.
+  constexpr atomic() noexcept = default;
+  /// Constructor with initialize value.
+  constexpr atomic(T d) noexcept : __d(d){};
+
+  /// atomically replaces the value of the referenced object with a non-atomic argument
+  /// \param operand The value to replace the pointed value.
+  /// \param memoryOrder The memory ordering used.
+  /// \param memoryScope The memory scope used.
+  void store(T operand, sycl::memory_order memoryOrder = default_write_order,
+             sycl::memory_scope memoryScope = default_scope) noexcept {
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    atm.store(operand, memoryOrder, memoryScope);
+  }
+
+  /// atomically obtains the value of the referenced object
+  /// \param memoryOrder The memory ordering used.
+  /// \param memoryScope The memory scope used.
+  /// \returns The value of the referenced object
+  T load(sycl::memory_order memoryOrder = default_read_order,
+         sycl::memory_scope memoryScope = default_scope) const noexcept {
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(
+      const_cast<T &>(__d));
+    return atm.load(memoryOrder, memoryScope);
+  }
+
+  /// atomically replaces the value of the referenced object and obtains the value held previously
+  /// \param operand The value to replace the pointed value.
+  /// \param memoryOrder The memory ordering used.
+  /// \param memoryScope The memory scope used.
+  /// \returns The value of the referenced object before the call.
+  T exchange(T operand,
+             sycl::memory_order memoryOrder = default_read_modify_write_order,
+             sycl::memory_scope memoryScope = default_scope) noexcept {
+
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.exchange(operand, memoryOrder, memoryScope);
+  }
+
+  /// atomically compares the value of the referenced object with non-atomic argument 
+  /// and performs atomic exchange if equal or atomic load if not
+  /// \param expected The value expected to be found in the object referenced by the atomic_ref object
+  /// \param desired  The value to store in the referenced object if it is as expected
+  /// \param success The memory models for the read-modify-write
+  /// \param failure The memory models for load operations
+  /// \param memoryScope The memory scope used.
+  /// \returns true if the referenced object was successfully changed, false otherwise.
+  bool compare_exchange_weak(
+      T &expected, T desired,
+      sycl::memory_order success, sycl::memory_order failure,
+      sycl::memory_scope memoryScope = default_scope) noexcept {
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.compare_exchange_weak(expected, desired, success, failure, memoryScope);
+  }
+  /// \param expected The value expected to be found in the object referenced by the atomic_ref object
+  /// \param desired  The value to store in the referenced object if it is as expected
+  /// \param memoryOrder 	The memory synchronization ordering for operations
+  /// \param memoryScope The memory scope used.
+  /// \returns true if the referenced object was successfully changed, false otherwise.
+  bool compare_exchange_weak(T &expected, T desired,
+                  sycl::memory_order memoryOrder = default_read_modify_write_order,
+                  sycl::memory_scope memoryScope = default_scope) noexcept {
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.compare_exchange_weak(expected, desired, memoryOrder, memoryScope);
+  }
+
+  /// atomically compares the value of the referenced object with non-atomic argument 
+  /// and performs atomic exchange if equal or atomic load if not
+  /// \param expected The value expected to be found in the object referenced by the atomic_ref object
+  /// \param desired  The value to store in the referenced object if it is as expected
+  /// \param success The memory models for the read-modify-write
+  /// \param failure The memory models for load operations
+  /// \param memoryScope The memory scope used.
+  /// \returns true if the referenced object was successfully changed, false otherwise.
+  bool compare_exchange_strong(
+      T &expected, T desired,
+      sycl::memory_order success, sycl::memory_order failure,
+      sycl::memory_scope memoryScope = default_scope) noexcept {
+
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.compare_exchange_strong(expected, desired, success, failure, memoryScope);
+  }
+  /// \param expected The value expected to be found in the object referenced by the atomic_ref object
+  /// \param desired  The value to store in the referenced object if it is as expected
+  /// \param memoryOrder 	The memory synchronization ordering for operations
+  /// \param memoryScope The memory scope used.
+  /// \returns true if the referenced object was successfully changed, false otherwise.
+  bool compare_exchange_strong(T &expected, T desired,
+                    sycl::memory_order memoryOrder = default_read_modify_write_order,
+                    sycl::memory_scope memoryScope = default_scope) noexcept {
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.compare_exchange_strong(expected, desired, memoryOrder, memoryScope);
+  }
+
+  /// atomically adds the argument to the value stored in the atomic object and obtains the value held previously
+  /// \param operand 	The other argument of arithmetic addition
+  /// \param memoryOrder The memory ordering used.
+  /// \param memoryScope The memory scope used.
+  /// \returns The value of the referenced object before the call.
+  T fetch_add(T operand,
+              sycl::memory_order memoryOrder = default_read_modify_write_order,
+              sycl::memory_scope  memoryScope = default_scope) noexcept {
+
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.fetch_add(operand, memoryOrder,  memoryScope);
+  }
+
+  /// atomically subtracts the argument from the value stored in the atomic object and obtains the value held previously
+  /// \param operand 	The other argument of arithmetic subtraction
+  /// \param memoryOrder The memory ordering used.
+  /// \param memoryScope The memory scope used.
+  /// \returns The value of the referenced object before the call.
+  T fetch_sub(T operand,
+              sycl::memory_order memoryOrder = default_read_modify_write_order,
+              sycl::memory_scope memoryScope = default_scope) noexcept {
+
+    sycl::atomic_ref<T, DefaultOrder, DefaultScope, Space> atm(__d);
+    return atm.fetch_sub(operand, memoryOrder, memoryScope);
+  }
+};
+
+} // namespace dpct
+#endif // __DPCT_ATOMIC_HPP__
diff --git a/sycl/include/dpct/bindless_images.hpp b/sycl/include/dpct/bindless_images.hpp
new file mode 100644
index 00000000000..042321d328a
--- /dev/null
+++ b/sycl/include/dpct/bindless_images.hpp
@@ -0,0 +1,2061 @@
+//===--- bindless_images.hpp ----------------------*- C++ -*---------------===//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_BINDLESS_IMAGE_HPP__
+#define __DPCT_BINDLESS_IMAGE_HPP__
+
+#ifdef _WIN32
+// DirectX headers
+#include <d3d11.h>
+#include <dxgi.h>
+#include <dxgi1_2.h>
+#endif // _WIN32
+
+namespace dpct {
+namespace experimental {
+
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+
+/// The wrapper structure for external memory resource handle desc
+class external_mem_handle_desc {
+#ifdef _WIN32
+  void *handle;
+  const void *name;
+#else
+  int handle;
+#endif // _WIN32
+  sycl::ext::oneapi::experimental::external_mem_handle_type handle_type;
+  size_t size_in_bytes;
+  int flags;
+
+public:
+  external_mem_handle_desc() {
+#ifdef _WIN32
+    handle = nullptr;
+    name = nullptr;
+#else
+    handle = -1;
+#endif // _WIN32
+    handle_type =
+        sycl::ext::oneapi::experimental::external_mem_handle_type::opaque_fd;
+    size_in_bytes = 0;
+    flags = 0;
+  }
+
+#ifdef _WIN32
+  /// handle setter
+  /// \param [in] win32_handle The win32 NT handle of the external memory
+  /// resource
+  void set_win32_handle(void *win32_handle) { handle = win32_handle; }
+
+  /// name setter
+  /// \param [in] win32_obj_name The object of the external memory resource
+  void set_win32_obj_name(const void *win32_obj_name) { name = win32_obj_name; }
+#else
+  /// fd setter
+  /// \param [in] fd The file descriptor of the external memory resource
+  void set_fd_handle(int fd) { handle = fd; }
+#endif // _WIN32
+
+  /// handle_type setter
+  /// \param [in] type The type of the external memory resource handle
+  void set_handle_type(
+      sycl::ext::oneapi::experimental::external_mem_handle_type type) {
+    handle_type = type;
+  }
+
+  /// size setter
+  /// \param [in] size The size (in bytes) of the external memory resource
+  void set_res_size(unsigned long long size) { size_in_bytes = size; }
+
+  /// flags setter
+  /// \param [in] flags The flags used to handle importing of external memory
+  /// resource
+  void set_flags(int flags) { this->flags = flags; }
+
+#ifdef _WIN32
+  /// handle getter
+  /// \param [out] handle The win32 NT handle of the external memory resource
+  void *get_win32_handle() { return handle; }
+
+  /// name getter
+  /// \param [out] name The object of the external memory resource
+  const void *get_win32_obj_name() { return name; }
+#else
+  /// fd getter
+  /// \param [out] fd The file descriptor of the external memory resource
+  int get_fd_handle() { return handle; }
+#endif // _WIN32
+
+  /// handle_type getter
+  /// \param [out] handle_type The type of the external memory resource handle
+  sycl::ext::oneapi::experimental::external_mem_handle_type get_handle_type() {
+    return handle_type;
+  }
+
+  /// size getter
+  /// \param [out] size The size (in bytes) of the external memory resource
+  unsigned long long get_res_size() { return size_in_bytes; }
+
+  /// flags getter
+  /// \param [out] flags The flags used to handle importing of external memory
+  /// resource
+  int get_flags() { return flags; }
+};
+
+/// The wrapper structure for external image memory desc
+class external_mem_img_desc {
+  sycl::range<3> size;
+  image_channel channel;
+  unsigned int num_levels;
+  sycl::ext::oneapi::experimental::image_type type;
+
+public:
+  external_mem_img_desc() {
+    size = sycl::range<3>{0, 0, 0};
+    channel = image_channel::create<float>();
+    num_levels = 1;
+    type = sycl::ext::oneapi::experimental::image_type::standard;
+  }
+
+  /// size setter
+  /// \param [in] img_dims The dimensions of the imported image resource
+  void set_size(sycl::range<3> img_dims) {
+    size = img_dims;
+
+    for (int i = 0; i < 3; i++) {
+      if (size[i] == 1) {
+        size[i] = 0;
+      }
+    }
+  }
+
+  /// image_channel setter
+  /// \param [in] img_ch The channel info of the imported image resource
+  void set_image_channel(image_channel img_ch) { channel = img_ch; }
+
+  /// num_levels setter
+  /// \param [in] numLevels The no. of levels in the imported image resource
+  void set_num_levels(unsigned int num_levels) {
+    this->num_levels = num_levels;
+
+    if (num_levels > 1) {
+      set_image_type(sycl::ext::oneapi::experimental::image_type::mipmap);
+    }
+  }
+
+  /// type setter
+  /// \param [in] img_type The type of the imported image resource
+  void set_image_type(sycl::ext::oneapi::experimental::image_type img_type) {
+    type = img_type;
+  }
+
+  /// size getter
+  /// \param [out] size The dimensions of the imported image resource
+  sycl::range<3> get_size() { return size; }
+
+  /// image_channel getter
+  /// \param [out] image_channel The channel info of the imported image resource
+  image_channel get_image_channel() { return channel; }
+
+  /// num_levels getter
+  /// \param [out] num_levels The no. of levels in the imported image resource
+  unsigned int get_num_levels() { return num_levels; }
+
+  /// type getter
+  /// \param [out] type The image type of the imported image resource
+  sycl::ext::oneapi::experimental::image_type get_image_type() { return type; }
+};
+
+/// The wrapper structure for external buffer memory desc
+class external_mem_buf_desc {
+  uint64_t size_in_bytes;
+  uint64_t offset;
+  unsigned int flags;
+
+public:
+  external_mem_buf_desc() {
+    size_in_bytes = 0;
+    offset = 0;
+    flags = 0;
+  }
+
+  /// size setter
+  /// \param [in] size The size (in bytes) of the external buffer resource
+  void set_res_size(uint64_t size) { size_in_bytes = size; }
+
+  /// offset setter
+  /// \param [in] offset The memory offset of the external buffer resource
+  void set_mem_offset(uint64_t offset) { this->offset = offset; }
+
+  /// flags setter
+  /// \param [in] flags The flags used to import external buffer resource
+  void set_flags(unsigned int flags) { this->flags = flags; }
+
+  /// size getter
+  /// \param [out] size_in_bytes The size (in bytes) of the external buffer res
+  uint64_t get_res_size() { return size_in_bytes; }
+
+  /// offset getter
+  /// \param [out] offset The memory offset of the external buffer resource
+  uint64_t get_mem_offset() { return offset; }
+
+  /// flags getter
+  /// \param [out] flags The flags used to import external buffer resource
+  unsigned int get_flags() { return flags; }
+};
+
+/// The wrapper class for external semaphore resource handle desc
+class external_sem_handle_desc {
+#ifdef _WIN32
+  void *handle;
+  const void *name;
+#else
+  int handle;
+#endif // _WIN32
+  sycl::ext::oneapi::experimental::external_semaphore_handle_type handle_type;
+  int flags;
+
+public:
+  external_sem_handle_desc() {
+#ifdef _WIN32
+    handle = nullptr;
+    name = nullptr;
+#else
+    handle = -1;
+#endif // _WIN32
+    handle_type = sycl::ext::oneapi::experimental::
+        external_semaphore_handle_type::opaque_fd;
+    flags = 0;
+  }
+
+#ifdef _WIN32
+  /// handle setter
+  /// \param [in] win32_handle The win32 NT handle of the external semaphore
+  /// resource
+  void set_win32_handle(void *win32_handle) { handle = win32_handle; }
+
+  /// name setter
+  /// \param [in] win32_obj_name The object of the external semaphore resource
+  void set_win32_obj_name(const void *win32_obj_name) { name = win32_obj_name; }
+#else
+  /// fd setter
+  /// \param [in] fd The file descriptor of the external semaphore resource
+  void set_fd_handle(int fd) { handle = fd; }
+#endif // _WIN32
+
+  /// handle_type setter
+  /// \param [in] type The type of the external semaphore resource handle
+  void set_handle_type(
+      sycl::ext::oneapi::experimental::external_semaphore_handle_type type) {
+    handle_type = type;
+  }
+
+  /// flags setter
+  /// \param [in] flags The flags used to handle importing of external semaphore
+  /// resource
+  void set_flags(int flags) { this->flags = flags; }
+
+#ifdef _WIN32
+  /// handle getter
+  /// \param [out] handle The win32 NT handle of the external semaphore resource
+  void *get_win32_handle() { return handle; }
+
+  /// name getter
+  /// \param [out] name The object of the external semaphore resource
+  const void *get_win32_obj_name() { return name; }
+#else
+  /// fd getter
+  /// \param [out] fd The file descriptor of the external semaphore resource
+  int get_fd_handle() { return handle; }
+#endif // _WIN32
+
+  /// handle_type getter
+  /// \param [out] handle_type The type of the external semaphore resource
+  /// handle
+  sycl::ext::oneapi::experimental::external_semaphore_handle_type
+  get_handle_type() {
+    return handle_type;
+  }
+
+  /// flags getter
+  /// \param [out] flags The flags used to handle importing of external
+  /// semaphore
+  int get_flags() { return flags; }
+};
+
+/// The wrapper structure for external semaphore signal/wait params
+class external_sem_params {
+  uint64_t value;
+
+public:
+  external_sem_params() { value = 0; }
+
+  /// value setter
+  /// \param [in] val The state value of the semaphore
+  void set_value(unsigned long long val) { value = val; }
+
+  /// value getter
+  /// \param [out] value The state value of the semaphore
+  unsigned long long get_value() { return value; }
+};
+
+/// The wrapper class of external semaphore
+class external_sem_wrapper {
+  sycl::ext::oneapi::experimental::external_semaphore ext_sem;
+  sycl::ext::oneapi::experimental::external_semaphore_handle_type
+      ext_sem_handle_type;
+
+public:
+  /// Create external semaphore wrapper.
+  /// \param [in] ext_sem The external semaphore resource object
+  /// \param [in] ext_sem_handle_type The external semaphore resource handle
+  /// type
+  external_sem_wrapper(
+      sycl::ext::oneapi::experimental::external_semaphore ext_sem,
+      sycl::ext::oneapi::experimental::external_semaphore_handle_type
+          ext_sem_handle_type) {
+    this->ext_sem = ext_sem;
+    this->ext_sem_handle_type = ext_sem_handle_type;
+  }
+
+  /// destory external semaphore resource
+  ~external_sem_wrapper() {
+    sycl::ext::oneapi::experimental::release_external_semaphore(
+        ext_sem, get_default_queue());
+  }
+
+  /// ext_sem getter
+  /// \param [out] ext_sem The external semaphore resource object
+  sycl::ext::oneapi::experimental::external_semaphore get() { return ext_sem; }
+
+  /// ext_sem_handle_type getter
+  /// \param [out] ext_sem_handle_type The external semaphore resource handle
+  /// type
+  sycl::ext::oneapi::experimental::external_semaphore_handle_type
+  get_handle_type() {
+    return ext_sem_handle_type;
+  }
+};
+
+/// The wrapper class of bindless image memory handle.
+class image_mem_wrapper {
+public:
+  /// Create bindless image memory wrapper.
+  /// \tparam dimensions The dimensions of image memory.
+  /// \param [in] channel The image channel used to create bindless image
+  /// \param [in] range The sizes of each dimension of bindless image memory.
+  /// memory.
+  template <int dimensions = 3>
+  image_mem_wrapper(image_channel channel, sycl::range<dimensions> range,
+                    sycl::ext::oneapi::experimental::image_type type =
+                        sycl::ext::oneapi::experimental::image_type::standard,
+                    unsigned int num_levels = 1)
+      : _channel(channel) {
+    unsigned array_size = 1;
+    if (type == sycl::ext::oneapi::experimental::image_type::array) {
+      assert(dimensions == 3);
+      array_size = range[2];
+      range[2] = 0;
+    }
+    _desc = sycl::ext::oneapi::experimental::image_descriptor(
+        range, _channel.get_channel_num(), _channel.get_channel_type(), type,
+        num_levels, array_size);
+    auto q = get_default_queue();
+    _handle = alloc_image_mem(_desc, q);
+    init_mip_level_wrappers(q);
+  }
+  /// Create bindless image memory wrapper.
+  /// \param [in] channel The image channel used to create bindless image
+  /// \param [in] width The width of bindless image memory.
+  /// \param [in] height The height of bindless image memory.
+  /// \param [in] depth The depth of bindless image memory.
+  image_mem_wrapper(image_channel channel, size_t width, size_t height = 0,
+                    size_t depth = 0)
+      : image_mem_wrapper(channel, {width, height, depth}) {}
+  /// Create bindless image memory wrapper.
+  /// \param [in] desc The image descriptor used to create bindless image
+  image_mem_wrapper(
+      const sycl::ext::oneapi::experimental::image_descriptor *desc)
+      : _desc(*desc) {
+    _channel.set_channel_type(desc->channel_type);
+    _channel.set_channel_num(desc->num_channels);
+    auto q = get_default_queue();
+    _handle = alloc_image_mem(_desc, q);
+  }
+  /// Create bindless image memory wrapper.
+  /// \param [in] desc The image descriptor of bindless image.
+  /// \param [in] img_mem_handle The memory handle of bindless image.
+  image_mem_wrapper(
+      sycl::ext::oneapi::experimental::image_descriptor desc,
+      sycl::ext::oneapi::experimental::image_mem_handle img_mem_handle)
+      : _desc(desc), _handle(img_mem_handle) {
+    _channel.set_channel_type(_desc.channel_type);
+#if (__SYCL_COMPILER_VERSION && __SYCL_COMPILER_VERSION >= 20240725)
+    _channel.set_channel_num(_desc.num_channels);
+#endif
+    auto q = get_default_queue();
+    init_mip_level_wrappers(q);
+  }
+  /// Create bindless image memory wrapper.
+  /// \param [in] extMem SYCL external memory resource object.
+  /// \param [in] ext_img_mem_desc The img desc of the imported image resource.
+  image_mem_wrapper(sycl::ext::oneapi::experimental::external_mem extMem,
+                    external_mem_img_desc *ext_img_mem_desc) {
+    auto q = get_default_queue();
+    unsigned int array_size = 1;
+
+    _channel = ext_img_mem_desc->get_image_channel();
+    _desc = sycl::ext::oneapi::experimental::image_descriptor(
+        ext_img_mem_desc->get_size(), _channel.get_channel_num(),
+        _channel.get_channel_type(), ext_img_mem_desc->get_image_type(),
+        ext_img_mem_desc->get_num_levels(), array_size);
+    _handle = sycl::ext::oneapi::experimental::map_external_image_memory(
+        extMem, _desc, q);
+
+    init_mip_level_wrappers(q);
+  }
+  /// Create bindless image memory wrapper.
+  /// \param [in] desc The image descriptor of bindless image.
+  /// \param [in] num_levels Number of mipmap levels to allocate
+  image_mem_wrapper(sycl::ext::oneapi::experimental::image_descriptor desc,
+                    unsigned int num_levels)
+      : _desc(desc) {
+    _desc.type = sycl::ext::oneapi::experimental::image_type::mipmap;
+    _desc.num_levels = num_levels;
+    auto q = get_default_queue();
+    _handle = alloc_image_mem(_desc, q);
+    init_mip_level_wrappers(q);
+  }
+
+  image_mem_wrapper(const image_mem_wrapper &) = delete;
+  image_mem_wrapper &operator=(const image_mem_wrapper &) = delete;
+  /// Destroy bindless image memory wrapper.
+  ~image_mem_wrapper() {
+    if (_sub_wrappers) {
+      std::destroy_n(_sub_wrappers, _desc.num_levels);
+      std::free(_sub_wrappers);
+    }
+    free_image_mem(_handle, _desc.type, get_default_queue());
+  }
+  /// Get the image channel of the bindless image memory.
+  /// \returns The image channel of bindless image memory.
+  image_channel get_channel() const noexcept { return _channel; }
+  /// Get the sizes of each dimension of the bindless image memory.
+  /// \returns The sizes of each dimension of bindless image memory.
+  sycl::range<3> get_range() const {
+    return {_desc.width, _desc.height, _desc.depth};
+  }
+  /// Get the image descriptor of the bindless image memory.
+  /// \returns The image descriptor of bindless image memory.
+  const sycl::ext::oneapi::experimental::image_descriptor &
+  get_desc() const noexcept {
+    return _desc;
+  }
+  /// Get the image handle of the bindless image memory.
+  /// \returns The image handle of bindless image memory.
+  sycl::ext::oneapi::experimental::image_mem_handle
+  get_handle() const noexcept {
+    return _handle;
+  }
+  /// Get the image mip level of the bindless image memory.
+  /// \returns The image mip level of the bindless image memory.
+  image_mem_wrapper *get_mip_level(unsigned int level) {
+    if (_desc.type == sycl::ext::oneapi::experimental::image_type::standard) {
+      assert(level == 0);
+      return this;
+    }
+
+    assert(_desc.type == sycl::ext::oneapi::experimental::image_type::mipmap);
+    return _sub_wrappers + level;
+  }
+
+  sycl::ext::oneapi::experimental::image_type get_image_type(void) {
+    return _desc.type;
+  }
+
+private:
+  image_mem_wrapper(
+      const image_channel &channel,
+      const sycl::ext::oneapi::experimental::image_descriptor &desc,
+      const sycl::ext::oneapi::experimental::image_mem_handle &handle)
+      : _channel(channel), _desc(desc), _handle(handle) {}
+
+  /// Initialize image mem wrappers for all the levels of mipmap image
+  /// \param [in] q The Queue to be used to query the mip levels
+  void init_mip_level_wrappers(sycl::queue q) {
+    auto num_levels = _desc.num_levels;
+    if (_desc.type == sycl::ext::oneapi::experimental::image_type::mipmap) {
+      assert(num_levels > 1);
+      _sub_wrappers = (image_mem_wrapper *)std::malloc(
+          sizeof(image_mem_wrapper) * num_levels);
+      for (unsigned i = 0; i < num_levels; ++i)
+        new (_sub_wrappers + i) image_mem_wrapper(
+            _channel, _desc.get_mip_level_desc(i),
+            sycl::ext::oneapi::experimental::get_mip_level_mem_handle(
+                _handle, i, q.get_device(), q.get_context()));
+    }
+  }
+
+  image_channel _channel;
+  sycl::ext::oneapi::experimental::image_descriptor _desc;
+  sycl::ext::oneapi::experimental::image_mem_handle _handle;
+  image_mem_wrapper *_sub_wrappers{nullptr};
+};
+
+/// The base wrapper class of external memory resource handle.
+class external_mem_wrapper_base {
+public:
+  /// Cleans up the external mem wrapper by releasing the SYCL external
+  /// memory handle
+  virtual ~external_mem_wrapper_base() {}
+
+  external_mem_wrapper_base(const external_mem_wrapper_base &) = delete;
+
+  external_mem_wrapper_base &
+  operator=(const external_mem_wrapper_base &) = delete;
+
+  const sycl::ext::oneapi::experimental::external_mem
+  get_external_mem() const noexcept {
+    return _res_external_mem;
+  }
+
+  /// Map the buf/texture resource memory and get its pointer/mem handle.
+  /// \param [in] q The queue used to map the resource with.
+  void map_resource(sycl::queue q) {
+    if (_res_is_buffer) {
+      if (_res_buf_ptr) {
+        throw std::runtime_error("Resource is already mapped! "
+                                 "Resource cannot be mapped more than once.");
+      }
+
+#if (__SYCL_COMPILER_VERSION && __SYCL_COMPILER_VERSION >= 20240823)
+      _res_buf_ptr =
+          sycl::ext::oneapi::experimental::map_external_linear_memory(
+              get_external_mem(), 0, _res_size_bytes, q);
+#else
+      throw std::runtime_error(
+          "Mapping a buffer resoure is not yet supported!");
+#endif
+    } else {
+      if (_res_img_mem_wrapper_ptr) {
+        throw std::runtime_error("Resource is already mapped! "
+                                 "Resource cannot be mapped more than once.");
+      }
+
+      auto img_mem_handle =
+          sycl::ext::oneapi::experimental::map_external_image_memory(
+              get_external_mem(), _res_img_desc, q);
+
+      _res_img_mem_wrapper_ptr =
+          new image_mem_wrapper(_res_img_desc, img_mem_handle);
+    }
+  }
+
+  /// Gets the pointer and size of the mapped resource
+  /// \param [out] ptr The pointer to the resource memory.
+  /// \param [out] size The size of the resource memory.
+  /// and resource size.
+  void get_mapped_pointer(void **ptr, size_t *size) {
+    if (!_res_is_buffer) {
+      throw std::runtime_error(
+          "Non buffer resouce cannot be accessed as a pointer!");
+    }
+
+    *ptr = _res_buf_ptr;
+    if (!*ptr) {
+      throw std::runtime_error(
+          "Resource is not mapped! "
+          "Resource should be mapped before accessing its memory");
+    }
+
+    *size = _res_size_bytes;
+  }
+
+  /// Returns mapped memory as image_mem_wrapper*
+  image_mem_wrapper *get_mapped_mipmapped_array() {
+    if (_res_is_buffer) {
+      throw std::runtime_error(
+          "Buffer resource cannot be accessed as an array!");
+    }
+    if (!_res_img_mem_wrapper_ptr) {
+      throw std::runtime_error(
+          "Resource is not mapped! "
+          "Resource should be mapped before accessing its memory.");
+    }
+
+    return _res_img_mem_wrapper_ptr;
+  }
+
+  /// Returns mapped subresource memory as image_mem_wrapper*
+  /// \param [in] array_index The layer of the image array to be returned.
+  /// \param [in] mip_level The level of the mipmap image to be returned.
+  image_mem_wrapper *get_sub_resource_mapped_array(unsigned int array_index,
+                                                   unsigned int mip_level) {
+    if (_res_is_buffer) {
+      throw std::runtime_error(
+          "Buffer resouce cannot be accessed as an array!");
+    }
+    if (array_index != 0) {
+      throw std::runtime_error("Retrieving a particular layer from image array "
+                               "is not yet supported!");
+    }
+    if (array_index >= _res_img_desc.array_size) {
+      throw std::runtime_error(
+          "Array index requested exceeds total array size in resource!");
+    }
+    if (mip_level >= _res_img_desc.num_levels) {
+      throw std::runtime_error(
+          "Mip level requested exceeds total num of levels in resource!");
+    }
+    if (!_res_img_mem_wrapper_ptr) {
+      throw std::runtime_error(
+          "Resouce is not mapped! "
+          "Resource should be mapped before accessing its memory");
+    }
+
+    return (mip_level == 0)
+               ? _res_img_mem_wrapper_ptr
+               : _res_img_mem_wrapper_ptr->get_mip_level(mip_level);
+  }
+
+  /// Unmap the buf/texture resource memory and get its pointer/mem handle.
+  /// \param [in] q The queue used to unmap the resource with.
+  void unmap_resource(sycl::queue q) {
+    if (_res_is_buffer) {
+      if (!_res_buf_ptr) {
+        throw std::runtime_error("Resource is not mapped! "
+                                 "Resource should be mapped before unmapping.");
+      }
+
+      _res_buf_ptr = nullptr;
+
+      throw std::runtime_error(
+          "Unmapping a buffer resoure is not yet supported!");
+    } else {
+      if (!_res_img_mem_wrapper_ptr) {
+        throw std::runtime_error("Resource is not mapped! "
+                                 "Resource should be mapped before unmapping.");
+      }
+
+      delete _res_img_mem_wrapper_ptr;
+      _res_img_mem_wrapper_ptr = nullptr;
+    }
+  }
+
+protected:
+  /// Init external mem handle for a given resource.
+  external_mem_wrapper_base(
+      sycl::ext::oneapi::experimental::external_mem external_mem,
+      unsigned reg_flags)
+      : _res_external_mem(external_mem), _res_reg_flags(reg_flags) {}
+
+  unsigned _res_reg_flags = 0;
+  bool _res_is_buffer = false;
+  size_t _res_size_bytes = 0;
+
+  sycl::ext::oneapi::experimental::image_descriptor _res_img_desc;
+  sycl::ext::oneapi::experimental::external_mem _res_external_mem;
+
+private:
+  void *_res_buf_ptr = nullptr;
+  image_mem_wrapper *_res_img_mem_wrapper_ptr = nullptr;
+};
+
+#ifdef _WIN32
+class external_mem_wrapper : public external_mem_wrapper_base {
+public:
+  /// Creates external memory resource wrapper for a given DX11 resource.
+  /// \param [in] d3d11_res Pointer to the ID3D11Resource to be wrapped.
+  /// \param [in] reg_flags Registration flags used for resource registration.
+  external_mem_wrapper(ID3D11Resource *d3d11_res, unsigned reg_flags)
+      : _res_D3D11(d3d11_res),
+        external_mem_wrapper_base(
+            sycl::ext::oneapi::experimental::external_mem(), reg_flags) {
+    // Check if the resource is already registered to prevent double
+    // registration.
+    if (_res_D3D11_set.find(_res_D3D11) != _res_D3D11_set.end()) {
+      throw std::runtime_error("This D3D11 resource is already registered!");
+    }
+
+    // Query the information from D3D11 resource object
+    query_res_info(_res_D3D11);
+
+    // Create a shared handle for the DX11 resource to enable interoperability.
+    _res_win_nt_handle = create_shared_handle(_res_D3D11);
+
+    // Prepare the external memory resource descriptor for SYCL interop.
+    sycl::ext::oneapi::experimental::resource_win32_handle ext_mem_win_handle{
+        _res_win_nt_handle};
+
+    sycl::ext::oneapi::experimental::external_mem_descriptor<
+        sycl::ext::oneapi::experimental::resource_win32_handle>
+        ext_mem_desc{ext_mem_win_handle,
+                     sycl::ext::oneapi::experimental::external_mem_handle_type::
+                         win32_nt_dx12_resource,
+                     _res_size_bytes};
+
+    // Import resource's external memory into SYCL for use with SYCL APIs.
+    _res_external_mem = sycl::ext::oneapi::experimental::external_mem(
+        sycl::ext::oneapi::experimental::import_external_memory(
+            ext_mem_desc, get_default_queue()));
+
+    // Register the resource to track its uniqueness.
+    _res_D3D11_set.insert(_res_D3D11);
+  }
+
+  /// Cleans up the external mem wrapper by releasing the SYCL external
+  /// memory handle and the shared handle created for the DX11 resource.
+  virtual ~external_mem_wrapper() {
+    // Release the mutex when done
+    _res_keyed_mutex->ReleaseSync(0);
+
+    // Release the keyed mutex interface
+    _res_keyed_mutex->Release();
+
+    // Close the shared handle to the DX11 resource.
+    CloseHandle(_res_win_nt_handle);
+
+    // Release the resource's external memory associated with the SYCL external
+    // mem handle.
+    sycl::ext::oneapi::experimental::release_external_memory(
+        get_external_mem(), get_default_queue());
+
+    // Remove the resource from the tracking set.
+    if (_res_D3D11_set.find(_res_D3D11) != _res_D3D11_set.end()) {
+      _res_D3D11_set.erase(_res_D3D11);
+    }
+  }
+
+private:
+  inline static std::set<ID3D11Resource *> _res_D3D11_set;
+
+  ID3D11Resource *_res_D3D11 = nullptr;
+  IDXGIKeyedMutex *_res_keyed_mutex = nullptr;
+  HANDLE _res_win_nt_handle = nullptr;
+
+  /// Helper function to query the properties of DX11 resource
+  void query_res_info(ID3D11Resource *resource) {
+    unsigned int res_width = 0;
+    unsigned int res_height = 0;
+    unsigned int res_depth = 0;
+    unsigned int res_num_levels = 1;
+    unsigned int res_arr_size = 1;
+
+    image_channel channel;
+
+    // Get the dimension info of DX11 resource
+    D3D11_RESOURCE_DIMENSION dimension;
+    resource->GetType(&dimension);
+
+    switch (dimension) {
+    case D3D11_RESOURCE_DIMENSION_BUFFER: {
+      _res_is_buffer = true;
+
+      D3D11_BUFFER_DESC desc;
+      ((ID3D11Buffer *)resource)->GetDesc(&desc);
+
+      _res_size_bytes = desc.ByteWidth;
+      break;
+    }
+    case D3D11_RESOURCE_DIMENSION_TEXTURE1D: {
+      D3D11_TEXTURE1D_DESC desc;
+      ((ID3D11Texture1D *)resource)->GetDesc(&desc);
+
+      res_width = desc.Width;
+      res_arr_size = desc.ArraySize;
+      res_num_levels = (desc.MipLevels ? desc.MipLevels : 1);
+
+      channel = get_img_ch_info(desc.Format);
+      _res_size_bytes = res_width;
+      break;
+    }
+    case D3D11_RESOURCE_DIMENSION_TEXTURE2D: {
+      D3D11_TEXTURE2D_DESC desc;
+      ((ID3D11Texture2D *)resource)->GetDesc(&desc);
+
+      res_width = desc.Width;
+      res_height = desc.Height;
+      res_arr_size = desc.ArraySize;
+      res_num_levels = (desc.MipLevels ? desc.MipLevels : 1);
+
+      channel = get_img_ch_info(desc.Format);
+      _res_size_bytes = res_width * res_height;
+      break;
+    }
+    case D3D11_RESOURCE_DIMENSION_TEXTURE3D: {
+      D3D11_TEXTURE3D_DESC desc;
+      ((ID3D11Texture3D *)resource)->GetDesc(&desc);
+
+      res_width = desc.Width;
+      res_height = desc.Height;
+      res_depth = desc.Depth;
+      res_num_levels = (desc.MipLevels ? desc.MipLevels : 1);
+
+      channel = get_img_ch_info(desc.Format);
+      _res_size_bytes = res_width * res_height * res_depth;
+      break;
+    }
+    default:
+      throw std::runtime_error("Unsupported DX11 resource type!");
+      break;
+    }
+
+    if (!_res_is_buffer) {
+      if (res_arr_size > 1) {
+        throw std::runtime_error(
+            "Images with multiple array levels are not supported. "
+            "Only standard and mipmap images are supported!");
+      }
+
+      // Calculate the size of a resource in bytes by multiplyting its dims
+      // with arr size, num levels & channel size
+      _res_size_bytes *=
+          res_arr_size * res_num_levels * channel.get_total_size();
+
+      sycl::ext::oneapi::experimental::image_type img_type =
+          (res_num_levels > 1)
+              ? sycl::ext::oneapi::experimental::image_type::mipmap
+              : sycl::ext::oneapi::experimental::image_type::standard;
+
+      _res_img_desc = sycl::ext::oneapi::experimental::image_descriptor{
+          sycl::range<3>{res_width, res_height, res_depth},
+          channel.get_channel_num(),
+          channel.get_channel_type(),
+          img_type,
+          res_num_levels,
+          res_arr_size};
+    }
+  }
+
+  /// Helper function to create shared handle for DXD11 resource
+  HANDLE create_shared_handle(ID3D11Resource *resource) {
+    HANDLE win_nt_handle = nullptr;
+
+    IDXGIResource1 *pDXGIResource1;
+    resource->QueryInterface(__uuidof(IDXGIResource1),
+                             reinterpret_cast<void **>(&pDXGIResource1));
+
+    if (_res_is_buffer) {
+      pDXGIResource1->GetSharedHandle(&win_nt_handle);
+    } else {
+      pDXGIResource1->CreateSharedHandle(
+          nullptr, DXGI_SHARED_RESOURCE_READ | DXGI_SHARED_RESOURCE_WRITE,
+          nullptr, &win_nt_handle);
+    }
+
+    pDXGIResource1->Release();
+
+    // Query for the keyed mutex interface
+    resource->QueryInterface(__uuidof(IDXGIKeyedMutex),
+                             reinterpret_cast<void **>(&_res_keyed_mutex));
+
+    // Use the keyed mutex to synchronize access to the shared resource
+    _res_keyed_mutex->AcquireSync(0, INFINITE);
+
+    return win_nt_handle;
+  }
+
+  /// Helper function to get the texture channel info of DX11 resource using
+  /// DXGI format
+  image_channel get_img_ch_info(DXGI_FORMAT format) {
+    image_channel channel;
+
+    switch (format) {
+    case DXGI_FORMAT_R16G16B16A16_FLOAT:
+      channel = image_channel::create<sycl::half4>();
+      break;
+    case DXGI_FORMAT_R8G8B8A8_UNORM:
+      channel = image_channel::create<sycl::uchar4>();
+      break;
+    case DXGI_FORMAT_R16G16_FLOAT:
+      channel = image_channel::create<sycl::half2>();
+      break;
+    case DXGI_FORMAT_R32_FLOAT:
+      channel = image_channel::create<float>();
+      break;
+    default:
+      throw std::runtime_error("Unsupported DX11 resource format!");
+      break;
+    }
+
+    return channel;
+  }
+};
+#endif // _WIN32
+
+namespace detail {
+struct sampled_image_handle_compare {
+  template <class T> bool operator()(T L, T R) const {
+    return L.raw_handle < R.raw_handle;
+  }
+};
+
+inline std::pair<image_data, sampling_info> &get_img_info_map(
+    const sycl::ext::oneapi::experimental::sampled_image_handle handle) {
+  static std::map<sycl::ext::oneapi::experimental::sampled_image_handle,
+                  std::pair<image_data, sampling_info>,
+                  sampled_image_handle_compare>
+      img_info_map;
+  return img_info_map[handle];
+}
+
+inline std::pair<image_data, sampling_info> &get_img_info_map(
+    const sycl::ext::oneapi::experimental::unsampled_image_handle handle) {
+  static std::map<sycl::ext::oneapi::experimental::unsampled_image_handle,
+                  std::pair<image_data, sampling_info>,
+                  sampled_image_handle_compare>
+      img_info_map;
+  return img_info_map[handle];
+}
+
+static inline size_t
+get_ele_size(const sycl::ext::oneapi::experimental::image_descriptor &decs) {
+  size_t channel_size;
+  switch (decs.channel_type) {
+  case sycl::image_channel_type::signed_int8:
+  case sycl::image_channel_type::unsigned_int8:
+    channel_size = 1;
+    break;
+  case sycl::image_channel_type::fp16:
+  case sycl::image_channel_type::signed_int16:
+  case sycl::image_channel_type::unsigned_int16:
+    channel_size = 2;
+    break;
+  case sycl::image_channel_type::fp32:
+  case sycl::image_channel_type::signed_int32:
+  case sycl::image_channel_type::unsigned_int32:
+    channel_size = 4;
+    break;
+  default:
+    throw std::runtime_error("Unsupported channel_type in get_ele_size!");
+    break;
+  }
+  return decs.num_channels * channel_size;
+}
+
+static inline sycl::event
+dpct_memcpy(sycl::ext::oneapi::experimental::image_mem_handle src,
+            const sycl::ext::oneapi::experimental::image_descriptor &desc_src,
+            size_t w_offset_src, size_t h_offset_src, void *dest, size_t p,
+            size_t w, size_t h, sycl::queue q) {
+  const auto ele_size = get_ele_size(desc_src);
+  const auto src_offset =
+      sycl::range<3>(w_offset_src / ele_size, h_offset_src, 0);
+  const auto dest_offset = sycl::range<3>(0, 0, 0);
+  const auto dest_extend = sycl::range<3>(p / ele_size, 0, 0);
+  const auto copy_extend = sycl::range<3>(w / ele_size, h, 0);
+  return q.ext_oneapi_copy(src, src_offset, desc_src, dest, dest_offset,
+                           dest_extend, copy_extend);
+}
+
+static inline std::vector<sycl::event> dpct_memcpy_to_host(
+    sycl::ext::oneapi::experimental::image_mem_handle src,
+    const sycl::ext::oneapi::experimental::image_descriptor &desc_src,
+    size_t w_offset_src, size_t h_offset_src, void *dest_host_ptr, size_t s,
+    sycl::queue q) {
+  std::vector<sycl::event> event_list;
+  const auto ele_size = get_ele_size(desc_src);
+  const auto w = desc_src.width * ele_size;
+  size_t offset_dest = 0;
+  while (s - offset_dest > w - w_offset_src) {
+    const auto src_offset =
+        sycl::range<3>(w_offset_src / ele_size, h_offset_src, 0);
+    const auto dest_offset = sycl::range<3>(offset_dest / ele_size, 0, 0);
+    const auto dest_extend = sycl::range<3>(0, 0, 0);
+    const auto copy_extend =
+        sycl::range<3>((w - w_offset_src) / ele_size, 1, 0);
+    event_list.push_back(q.ext_oneapi_copy(src, src_offset, desc_src,
+                                           dest_host_ptr, dest_offset,
+                                           dest_extend, copy_extend));
+    offset_dest += w - w_offset_src;
+    w_offset_src = 0;
+    ++h_offset_src;
+  }
+  if (s - offset_dest > 0) {
+    const auto src_offset =
+        sycl::range<3>(w_offset_src / ele_size, h_offset_src, 0);
+    const auto dest_offset = sycl::range<3>(offset_dest / ele_size, 0, 0);
+    const auto dest_extend = sycl::range<3>(0, 0, 0);
+    const auto copy_extend = sycl::range<3>((s - offset_dest) / ele_size, 1, 0);
+    event_list.push_back(q.ext_oneapi_copy(src, src_offset, desc_src,
+                                           dest_host_ptr, dest_offset,
+                                           dest_extend, copy_extend));
+  }
+  return event_list;
+}
+
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::ext::oneapi::experimental::image_mem_handle src,
+            const sycl::ext::oneapi::experimental::image_descriptor &desc_src,
+            size_t w_offset_src, size_t h_offset_src, void *dest, size_t s,
+            sycl::queue q) {
+  if (dpct::detail::get_pointer_attribute(q, dest) ==
+      dpct::detail::pointer_access_attribute::device_only) {
+    std::vector<sycl::event> event_list;
+    dpct::detail::host_buffer buf(s, q, event_list);
+    auto copy_events = dpct_memcpy_to_host(src, desc_src, w_offset_src,
+                                           h_offset_src, buf.get_ptr(), s, q);
+    event_list.push_back(dpct::detail::dpct_memcpy(
+        q, dest, buf.get_ptr(), s, memcpy_direction::host_to_device,
+        copy_events));
+    return event_list;
+  }
+  return dpct_memcpy_to_host(src, desc_src, w_offset_src, h_offset_src, dest, s,
+                             q);
+}
+
+static inline sycl::event
+dpct_memcpy(const void *src,
+            sycl::ext::oneapi::experimental::image_mem_handle dest,
+            const sycl::ext::oneapi::experimental::image_descriptor &desc_dest,
+            size_t w_offset_dest, size_t h_offset_dest, size_t p, size_t w,
+            size_t h, sycl::queue q) {
+  const auto ele_size = get_ele_size(desc_dest);
+  const auto src_offset = sycl::range<3>(0, 0, 0);
+  const auto src_extend = sycl::range<3>(p / ele_size, 0, 0);
+  const auto dest_offset =
+      sycl::range<3>(w_offset_dest / ele_size, h_offset_dest, 0);
+  const auto copy_extend = sycl::range<3>(w / ele_size, h, 0);
+  // TODO: Remove const_cast after refining the signature of ext_oneapi_copy.
+  return q.ext_oneapi_copy(const_cast<void *>(src), src_offset, src_extend,
+                           dest, dest_offset, desc_dest, copy_extend);
+}
+
+static inline std::vector<sycl::event> dpct_memcpy_from_host(
+    const void *src_host_ptr,
+    sycl::ext::oneapi::experimental::image_mem_handle dest,
+    const sycl::ext::oneapi::experimental::image_descriptor &desc_dest,
+    size_t w_offset_dest, size_t h_offset_dest, size_t s, sycl::queue q) {
+  std::vector<sycl::event> event_list;
+  const auto ele_size = get_ele_size(desc_dest);
+  const auto w = desc_dest.width * ele_size;
+  size_t offset_src = 0;
+  while (s - offset_src >= w - w_offset_dest) {
+    const auto src_offset = sycl::range<3>(offset_src / ele_size, 0, 0);
+    const auto src_extend = sycl::range<3>(0, 0, 0);
+    const auto dest_offset =
+        sycl::range<3>(w_offset_dest / ele_size, h_offset_dest, 0);
+    const auto copy_extend =
+        sycl::range<3>((w - w_offset_dest) / ele_size, 1, 0);
+    // TODO: Remove const_cast after refining the signature of ext_oneapi_copy.
+    event_list.push_back(q.ext_oneapi_copy(
+        const_cast<void *>(src_host_ptr), src_offset, src_extend, dest,
+        dest_offset, desc_dest, copy_extend));
+    offset_src += w - w_offset_dest;
+    w_offset_dest = 0;
+    ++h_offset_dest;
+  }
+  if (s - offset_src > 0) {
+    const auto src_offset = sycl::range<3>(offset_src / ele_size, 0, 0);
+    const auto src_extend = sycl::range<3>(0, 0, 0);
+    const auto dest_offset =
+        sycl::range<3>(w_offset_dest / ele_size, h_offset_dest, 0);
+    const auto copy_extend = sycl::range<3>((s - offset_src) / ele_size, 1, 0);
+    // TODO: Remove const_cast after refining the signature of ext_oneapi_copy.
+    event_list.push_back(q.ext_oneapi_copy(
+        const_cast<void *>(src_host_ptr), src_offset, src_extend, dest,
+        dest_offset, desc_dest, copy_extend));
+  }
+  return event_list;
+}
+
+static inline std::vector<sycl::event> dpct_memcpy(
+    const void *src, sycl::ext::oneapi::experimental::image_mem_handle dest,
+    const sycl::ext::oneapi::experimental::image_descriptor &desc_dest,
+    size_t w_offset_dest, size_t h_offset_dest, size_t s, sycl::queue q) {
+  if (dpct::detail::get_pointer_attribute(q, src) ==
+      dpct::detail::pointer_access_attribute::device_only) {
+    std::vector<sycl::event> event_list;
+    dpct::detail::host_buffer buf(s, q, event_list);
+    event_list.push_back(dpct::detail::dpct_memcpy(
+        q, buf.get_ptr(), src, s, memcpy_direction::device_to_host));
+    auto copy_events = dpct_memcpy_from_host(
+        buf.get_ptr(), dest, desc_dest, w_offset_dest, h_offset_dest, s, q);
+    event_list.insert(event_list.end(), copy_events.begin(), copy_events.end());
+    return event_list;
+  }
+  return dpct_memcpy_from_host(src, dest, desc_dest, w_offset_dest,
+                               h_offset_dest, s, q);
+}
+
+static inline sycl::event
+dpct_memcpy(const image_mem_wrapper *src, const sycl::id<3> &src_id,
+            const size_t src_x_offest_byte, pitched_data &dest,
+            const sycl::id<3> &dest_id, const size_t dest_x_offest_byte,
+            const sycl::range<3> &size, const size_t copy_x_size_byte,
+            sycl::queue q) {
+  const auto ele_size = get_ele_size(src->get_desc());
+  const auto src_offset = sycl::range<3>(
+      src_x_offest_byte != 0 ? src_x_offest_byte / ele_size : src_id[0],
+      src_id[1], src_id[2]);
+  const auto dest_offset = sycl::range<3>(
+      dest_x_offest_byte != 0 ? dest_x_offest_byte / ele_size : dest_id[0],
+      dest_id[1], dest_id[2]);
+  const auto dest_extend =
+      sycl::range<3>(dest.get_pitch() / ele_size, dest.get_y(), 1);
+  const auto copy_extend = sycl::range<3>(
+      copy_x_size_byte != 0 ? copy_x_size_byte / ele_size : size[0], size[1],
+      size[2]);
+  return q.ext_oneapi_copy(src->get_handle(), src_offset, src->get_desc(),
+                           dest.get_data_ptr(), dest_offset, dest_extend,
+                           copy_extend);
+}
+
+static inline sycl::event
+dpct_memcpy(pitched_data src, const sycl::id<3> &src_id,
+            const size_t src_x_offest_byte, image_mem_wrapper *dest,
+            const sycl::id<3> &dest_id, const size_t dest_x_offest_byte,
+            const sycl::range<3> &size, const size_t copy_x_size_byte,
+            sycl::queue q) {
+  const auto ele_size = get_ele_size(dest->get_desc());
+  const auto src_offset = sycl::range<3>(
+      src_x_offest_byte != 0 ? src_x_offest_byte / ele_size : src_id[0],
+      src_id[1], src_id[2]);
+  const auto src_extend =
+      sycl::range<3>(src.get_pitch() / ele_size, src.get_y(), 1);
+  const auto dest_offset = sycl::range<3>(
+      dest_x_offest_byte != 0 ? dest_x_offest_byte / ele_size : dest_id[0],
+      dest_id[1], dest_id[2]);
+  const auto copy_extend = sycl::range<3>(
+      copy_x_size_byte != 0 ? copy_x_size_byte / ele_size : size[0], size[1],
+      size[2]);
+  return q.ext_oneapi_copy(src.get_data_ptr(), src_offset, src_extend,
+                           dest->get_handle(), dest_offset, dest->get_desc(),
+                           copy_extend);
+}
+
+static inline sycl::event
+dpct_memcpy(const image_mem_wrapper *src, const sycl::id<3> &src_id,
+            const size_t src_x_offest_byte, image_mem_wrapper *dest,
+            const sycl::id<3> &dest_id, const size_t dest_x_offest_byte,
+            const sycl::range<3> &size, const size_t copy_x_size_byte,
+            sycl::queue q) {
+  // TODO: Need change logic when sycl support image_mem to image_mem copy.
+  const auto from_ele_size = get_ele_size(src->get_desc());
+  const auto to_ele_size = get_ele_size(dest->get_desc());
+  const auto copy_extend = sycl::range<3>(
+      copy_x_size_byte != 0 ? copy_x_size_byte / from_ele_size : size[0],
+      size[1], size[2]);
+  std::vector<sycl::event> event_list;
+  dpct::detail::host_buffer buf(
+      copy_extend.size() * std::max(from_ele_size, to_ele_size), q, event_list);
+  auto to = pitched_data(buf.get_ptr(), copy_extend[0] * from_ele_size,
+                         copy_extend[0], copy_extend[1]);
+  dpct_memcpy(src, src_id, src_x_offest_byte, to, sycl::id<3>(0, 0, 0), 0,
+              copy_extend, 0, q);
+  auto from = pitched_data(buf.get_ptr(), copy_extend[0] * to_ele_size,
+                           copy_extend[0], copy_extend[1]);
+  event_list.push_back(dpct_memcpy(from, sycl::id<3>(0, 0, 0), 0, dest, dest_id,
+                                   dest_x_offest_byte, copy_extend, 0, q));
+  return event_list.front();
+}
+
+template <typename T>
+inline bool check_duplicate_entries(int count, T **entries) {
+  std::set<T *> uniqueEntries;
+
+  for (size_t i = 0; i < count; ++i) {
+    auto result = uniqueEntries.insert(entries[i]);
+    if (!result.second) {
+      return true;
+    }
+  }
+
+  return false;
+}
+} // namespace detail
+
+/// Get image_mem_wrapper according to sampled image handle.
+/// \param [in] handle The bindless image handle.
+/// \returns The image_mem_wrapper of sampled image.
+inline image_mem_wrapper *&get_img_mem(
+    const sycl::ext::oneapi::experimental::sampled_image_handle handle) {
+  static std::map<sycl::ext::oneapi::experimental::sampled_image_handle,
+                  image_mem_wrapper *, detail::sampled_image_handle_compare>
+      img_mem_map;
+  return img_mem_map[handle];
+}
+
+/// Get image_mem_wrapper according to unsampled image handle.
+/// \param [in] handle The unsampled bindless image handle.
+/// \returns The image_mem_wrapper of unsampled image.
+inline image_mem_wrapper *&get_img_mem(
+    const sycl::ext::oneapi::experimental::unsampled_image_handle handle) {
+  static std::map<sycl::ext::oneapi::experimental::unsampled_image_handle,
+                  image_mem_wrapper *, detail::sampled_image_handle_compare>
+      img_mem_map;
+  return img_mem_map[handle];
+}
+
+/// Associate an image memory wrapper with a bindless unsampled image handle in
+/// the global registry.
+///
+/// Inserts or updates an entry in the internal image memory map, using the
+/// specified bindless unsampled image handle as the key and the provided image
+/// memory wrapper as the mapped value.
+/// \param [in] handle The unsampled bindless image handle.
+/// \param [in] img_mem The image_mem_wrapper associated with the unsampled handle.
+static inline void set_img_mem(
+    const sycl::ext::oneapi::experimental::unsampled_image_handle handle,
+    image_mem_wrapper *img_mem) {
+  dpct::experimental::get_img_mem(handle) = img_mem;
+}
+
+/// Associate an image memory wrapper with a bindless sampled image handle in
+/// the global registry.
+///
+/// Inserts or updates an entry in the internal image memory map, using the
+/// specified bindless unsampled image handle as the key and the provided image
+/// memory wrapper as the mapped value.
+/// \param [in] handle The sampled bindless image handle.
+/// \param [in] img_mem The image_mem_wrapper associated with the sampled handle.
+static inline void set_img_mem(
+    const sycl::ext::oneapi::experimental::sampled_image_handle handle,
+    image_mem_wrapper *img_mem) {
+  dpct::experimental::get_img_mem(handle) = img_mem;
+}
+
+#ifdef _WIN32
+/// Map the resource memories to mem handles
+/// \param [in] count The count of resources to map.
+/// \param [in] handles The external mem wrappers used to map the resources.
+/// \param [in] q The queue used to map the resource with.
+inline void map_resources(int count, external_mem_wrapper **handles,
+                          queue_ptr q_ptr = &get_default_queue()) {
+  if (detail::check_duplicate_entries(count, handles)) {
+    throw std::runtime_error(
+        "Duplicate handle entries found during resource mapping!");
+  }
+
+  for (int i = 0; i < count; i++) {
+    handles[i]->map_resource(*q_ptr);
+  }
+}
+
+/// Unmap the resource memories to mem handles
+/// \param [in] count The count of resources to unmap.
+/// \param [in] handles The external mem wrappers used to unmap the resources.
+/// \param [in] q The queue used to unmap the resource with.
+inline void unmap_resources(int count, external_mem_wrapper **handles,
+                            queue_ptr q_ptr = &get_default_queue()) {
+  if (detail::check_duplicate_entries(count, handles)) {
+    throw std::runtime_error(
+        "Duplicate handle entries found during resource unmapping!");
+  }
+
+  for (int i = 0; i < count; i++) {
+    handles[i]->unmap_resource(*q_ptr);
+  }
+}
+#endif // _WIN32
+
+/// Imports resource's external memory into a SYCL external memory object.
+/// \param [in] extMem SYCL external memory object ptr to be initialized.
+/// \param [in] memHandleDesc Pointer to the external memory resource handle
+/// descriptor.
+/// \throws std::runtime_error If no valid external memory resource handle is
+/// provided.
+inline void
+import_external_memory(sycl::ext::oneapi::experimental::external_mem *extMem,
+                       external_mem_handle_desc *memHandleDesc) {
+#ifdef _WIN32
+  if (memHandleDesc->get_win32_handle()) {
+    *extMem = sycl::ext::oneapi::experimental::import_external_memory(
+        sycl::ext::oneapi::experimental::external_mem_descriptor<
+            sycl::ext::oneapi::experimental::resource_win32_handle>{
+            {memHandleDesc->get_win32_handle()},
+            memHandleDesc->get_handle_type(),
+            memHandleDesc->get_res_size()},
+        get_default_queue());
+  } else if (memHandleDesc->get_win32_obj_name()) {
+    throw std::runtime_error(
+        "Importing external memory resource using Windows NT name"
+        " type is not supported. Only NT handle type is"
+        " supported");
+  }
+#else
+  if (memHandleDesc->get_fd_handle() != -1) {
+    *extMem = sycl::ext::oneapi::experimental::import_external_memory(
+        sycl::ext::oneapi::experimental::external_mem_descriptor<
+            sycl::ext::oneapi::experimental::resource_fd>{
+            {memHandleDesc->get_fd_handle()},
+            memHandleDesc->get_handle_type(),
+            memHandleDesc->get_res_size()},
+        get_default_queue());
+  }
+#endif // _WIN32
+  else {
+    throw std::runtime_error(
+        "No external memory resource handle is set for importing!");
+  }
+}
+
+/// Imports external semaphore resource into a SYCL external semaphore object.
+/// \param [in] extSem SYCL external semaphore object ptr to be initialized.
+/// \param [in] semHandleDesc Pointer to the external semaphore resource handle
+/// descriptor.
+/// \throws std::runtime_error If no valid external semaphore resource handle is
+/// provided.
+inline void import_external_semaphore(external_sem_wrapper **extSem,
+                                      external_sem_handle_desc *semHandleDesc) {
+  sycl::ext::oneapi::experimental::external_semaphore extSemObj;
+#ifdef _WIN32
+  if (semHandleDesc->get_win32_handle()) {
+    extSemObj = sycl::ext::oneapi::experimental::import_external_semaphore(
+        sycl::ext::oneapi::experimental::external_semaphore_descriptor<
+            sycl::ext::oneapi::experimental::resource_win32_handle>{
+            {semHandleDesc->get_win32_handle()},
+            semHandleDesc->get_handle_type()},
+        get_default_queue());
+  } else if (semHandleDesc->get_win32_obj_name()) {
+    throw std::runtime_error(
+        "Importing external semaphore resource using Windows NT name"
+        " type is not supported. Only NT handle type is"
+        " supported");
+  }
+#else
+  if (semHandleDesc->get_fd_handle() != -1) {
+    extSemObj = sycl::ext::oneapi::experimental::import_external_semaphore(
+        sycl::ext::oneapi::experimental::external_semaphore_descriptor<
+            sycl::ext::oneapi::experimental::resource_fd>{
+            {semHandleDesc->get_fd_handle()}, semHandleDesc->get_handle_type()},
+        get_default_queue());
+  }
+#endif // _WIN32
+  else {
+    throw std::runtime_error(
+        "No external semaphore resource handle is set for importing!");
+  }
+
+  *extSem =
+      new external_sem_wrapper(extSemObj, semHandleDesc->get_handle_type());
+}
+
+/// Signals the external semaphore resource.
+/// \param [in] extSem ptr to dpct external semaphore resource ptr
+/// \param [in] semSignalParams Pointer to the external semaphore signal
+/// parameters.
+/// \param [in] numExtSems Number of external semaphores to signal.
+/// \param [in] q_ptr The queue used to signal the external semaphore resource.
+inline void signal_external_semaphores(external_sem_wrapper **extSem,
+                                       external_sem_params *semSignalParams,
+                                       unsigned int numExtSems,
+                                       queue_ptr q_ptr = &get_default_queue()) {
+  for (int i = 0; i < numExtSems; i++) {
+    auto extSemType = extSem[i]->get_handle_type();
+    switch (extSemType) {
+#ifdef _WIN32
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        win32_nt_dx12_fence:
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        timeline_win32_nt_handle:
+      q_ptr->ext_oneapi_signal_external_semaphore(
+          extSem[i]->get(), semSignalParams[i].get_value());
+      break;
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        win32_nt_handle:
+      q_ptr->ext_oneapi_signal_external_semaphore(extSem[i]->get());
+      break;
+#else  // _WIN32
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        timeline_fd:
+      q_ptr->ext_oneapi_signal_external_semaphore(
+          extSem[i]->get(), semSignalParams[i].get_value());
+      break;
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        opaque_fd:
+      q_ptr->ext_oneapi_signal_external_semaphore(extSem[i]->get());
+      break;
+#endif // _WIN32
+    default:
+      throw std::runtime_error(
+          "Unsupported external semaphore resource handle type!");
+      break;
+    }
+  }
+}
+
+/// Wait for the external semaphore resource.
+/// \param [in] extSem ptr to dpct external semaphore resource ptr
+/// \param [in] semWaitParams Pointer to the external semaphore wait parameters.
+/// \param [in] numExtSems Number of external semaphores to wait.
+/// \param [in] q_ptr The queue used to wait on the external semaphore resource.
+inline void wait_external_semaphores(external_sem_wrapper **extSem,
+                                     external_sem_params *semWaitParams,
+                                     unsigned int numExtSems,
+                                     queue_ptr q_ptr = &get_default_queue()) {
+  for (int i = 0; i < numExtSems; i++) {
+    auto extSemType = extSem[i]->get_handle_type();
+    switch (extSemType) {
+#ifdef _WIN32
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        win32_nt_dx12_fence:
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        timeline_win32_nt_handle:
+      q_ptr->ext_oneapi_wait_external_semaphore(extSem[i]->get(),
+                                                semWaitParams[i].get_value());
+      break;
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        win32_nt_handle:
+      q_ptr->ext_oneapi_wait_external_semaphore(extSem[i]->get());
+      break;
+#else  // _WIN32
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        timeline_fd:
+      q_ptr->ext_oneapi_wait_external_semaphore(extSem[i]->get(),
+                                                semWaitParams[i].get_value());
+      break;
+    case sycl::ext::oneapi::experimental::external_semaphore_handle_type::
+        opaque_fd:
+      q_ptr->ext_oneapi_wait_external_semaphore(extSem[i]->get());
+      break;
+#endif // _WIN32
+    default:
+      throw std::runtime_error(
+          "Unsupported external semaphore resource handle type!");
+      break;
+    }
+  }
+}
+
+/// Create bindless image according to image data and sampling info.
+/// \param [in] data The image data used to create bindless image.
+/// \param [in] info The image sampling info used to create bindless image.
+/// \param [in] q The queue where the image creation be executed.
+/// \returns The sampled image handle of created bindless image.
+static inline sycl::ext::oneapi::experimental::sampled_image_handle
+create_bindless_image(image_data data, sampling_info info,
+                      sycl::queue q = get_default_queue()) {
+  auto samp = sycl::ext::oneapi::experimental::bindless_image_sampler(
+      info.get_addressing_mode(), info.get_coordinate_normalization_mode(),
+      info.get_filtering_mode(), info.get_mipmap_filtering(),
+      info.get_min_mipmap_level_clamp(), info.get_max_mipmap_level_clamp(),
+      info.get_max_anisotropy());
+
+  switch (data.get_data_type()) {
+  case image_data_type::linear: {
+    // linear memory only use sycl::filtering_mode::nearest.
+    samp.filtering = sycl::filtering_mode::nearest;
+    // TODO: Use pointer to create image when bindless image support.
+    auto mem = new image_mem_wrapper(
+        data.get_channel(), data.get_x() / data.get_channel().get_total_size());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), samp, mem->get_desc(), q);
+    set_img_mem(img, mem);
+    auto ptr = data.get_data_ptr();
+#ifdef DPCT_USM_LEVEL_NONE
+    q.ext_oneapi_copy(get_buffer(ptr).get_host_access().get_pointer(),
+                      mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    q.ext_oneapi_copy(ptr, mem->get_handle(), mem->get_desc()).wait();
+#endif
+    detail::get_img_info_map(img) = {data, info};
+    return img;
+  }
+  case image_data_type::pitch: {
+#ifdef DPCT_USM_LEVEL_NONE
+    auto mem =
+        new image_mem_wrapper(data.get_channel(), data.get_x(), data.get_y());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), samp, mem->get_desc(), q);
+    set_img_mem(img, mem);
+    q.ext_oneapi_copy(
+         get_buffer(data.get_data_ptr()).get_host_access().get_pointer(),
+         mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    auto desc = sycl::ext::oneapi::experimental::image_descriptor(
+        {data.get_x(), data.get_y()}, data.get_channel().get_channel_num(),
+        data.get_channel_type());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        data.get_data_ptr(), data.get_pitch(), samp, desc, q);
+#endif
+    detail::get_img_info_map(img) = {data, info};
+    return img;
+  }
+  case image_data_type::matrix: {
+    const auto mem = static_cast<image_mem_wrapper *>(data.get_data_ptr());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), samp, mem->get_desc(), q);
+    detail::get_img_info_map(img) = {data, info};
+    return img;
+  }
+  default:
+    throw std::runtime_error(
+        "Unsupported image_data_type in create_bindless_image!");
+    break;
+  }
+  // Must not reach here.
+  return sycl::ext::oneapi::experimental::sampled_image_handle();
+}
+
+/// Create bindless image according to image data.
+/// \param [in] data The image data used to create bindless image.
+/// \param [in] q The queue where the image creation be executed.
+/// \returns The sampled image handle of created bindless image.
+static inline sycl::ext::oneapi::experimental::unsampled_image_handle
+create_bindless_image(image_data data, sycl::queue q = get_default_queue()) {
+  switch (data.get_data_type()) {
+  case image_data_type::linear: {
+    // TODO: Use pointer to create image when bindless image support.
+    auto mem = new image_mem_wrapper(
+        data.get_channel(), data.get_x() / data.get_channel().get_total_size());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), mem->get_desc(), q);
+    set_img_mem(img, mem);
+    auto ptr = data.get_data_ptr();
+#ifdef DPCT_USM_LEVEL_NONE
+    q.ext_oneapi_copy(get_buffer(ptr).get_host_access().get_pointer(),
+                      mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    q.ext_oneapi_copy(ptr, mem->get_handle(), mem->get_desc()).wait();
+#endif
+    return img;
+  }
+  case image_data_type::pitch: {
+    auto mem =
+        new image_mem_wrapper(data.get_channel(), data.get_x(), data.get_y());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), mem->get_desc(), q);
+    set_img_mem(img, mem);
+#ifdef DPCT_USM_LEVEL_NONE
+    q.ext_oneapi_copy(
+         get_buffer(data.get_data_ptr()).get_host_access().get_pointer(),
+         mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    q.ext_oneapi_copy(data.get_data_ptr(), mem->get_handle(), mem->get_desc())
+        .wait();
+
+#endif
+    return img;
+  }
+  case image_data_type::matrix: {
+    const auto mem = static_cast<image_mem_wrapper *>(data.get_data_ptr());
+    auto img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), mem->get_desc(), q);
+    return img;
+  }
+  default:
+    throw std::runtime_error(
+        "Unsupported image_data_type in create_bindless_image!");
+    break;
+  }
+  // Must not reach here.
+  return sycl::ext::oneapi::experimental::unsampled_image_handle();
+}
+
+/// Destroy bindless image.
+/// \param [in] handle The bindless image should be destroyed.
+/// \param [in] q The queue where the image destruction be executed.
+template <class T>
+static inline void destroy_bindless_image(T handle,
+                                          sycl::queue q = get_default_queue()) {
+  auto &mem = get_img_mem(handle);
+  if (mem) {
+    delete mem;
+    mem = nullptr;
+  }
+  sycl::ext::oneapi::experimental::destroy_image_handle(handle, q);
+}
+
+/// Get the image data according to sampled image handle.
+/// \param [in] handle The bindless image handle.
+/// \returns The image data of sampled image.
+template <class T> static inline image_data get_data(const T handle) {
+  return detail::get_img_info_map(handle).first;
+}
+
+/// Get the sampling info according to sampled image handle.
+/// \param [in] handle The bindless image handle.
+/// \returns The sampling info of sampled image.
+static inline sampling_info get_sampling_info(
+    const sycl::ext::oneapi::experimental::sampled_image_handle handle) {
+  return detail::get_img_info_map(handle).second;
+}
+
+/// The base class of different template specialization bindless_image_wrapper
+/// class.
+class bindless_image_wrapper_base {
+public:
+  bindless_image_wrapper_base() {
+    // Make sure that singleton class dev_mgr will destruct later than this.
+    dev_mgr::instance();
+  }
+
+  /// Destroy bindless image wrapper.
+  ~bindless_image_wrapper_base() {
+    destroy_bindless_image(_img, get_default_queue());
+  }
+
+  /// Attach linear data to bindless image.
+  /// \param [in] data The linear data used to create bindless image.
+  /// \param [in] size The size of linear data used to create bindless image.
+  /// \param [in] channel The image channel used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(void *data, size_t size, const image_channel &channel,
+              sycl::queue q = get_default_queue()) {
+    detach(q);
+    auto samp = sycl::ext::oneapi::experimental::bindless_image_sampler(
+        _addressing_mode, _coordinate_normalization_mode, _filtering_mode);
+    // TODO: Use pointer to create image when bindless image support.
+    auto mem = new image_mem_wrapper(channel, size);
+    _img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), samp, mem->get_desc(), q);
+    set_img_mem(_img, mem);
+    auto ptr = data;
+#ifdef DPCT_USM_LEVEL_NONE
+    q.ext_oneapi_copy(get_buffer(data).get_host_access().get_pointer(),
+                      mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    q.ext_oneapi_copy(ptr, mem->get_handle(), mem->get_desc()).wait();
+#endif
+  }
+
+  /// Attach linear data to bindless image.
+  /// \param [in] data The linear data used to create bindless image.
+  /// \param [in] size The size of linear data used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(void *data, size_t size, sycl::queue q = get_default_queue()) {
+    attach(data, size, _channel, q);
+  }
+
+  /// Attach device_ptr data to bindless image.
+  /// \param [in] desc The image_descriptor used to create bindless image.
+  /// \param [in] ptr The data pointer used to create bindless image.
+  /// \param [in] pitch The pitch of 2D data used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(const sycl::ext::oneapi::experimental::image_descriptor *desc,
+              device_ptr ptr, size_t pitch,
+              sycl::queue q = get_default_queue()) {
+    detach(q);
+    auto samp = sycl::ext::oneapi::experimental::bindless_image_sampler(
+        _addressing_mode, _coordinate_normalization_mode, _filtering_mode);
+#ifdef DPCT_USM_LEVEL_NONE
+    auto mem = new image_mem_wrapper(desc);
+    _img = sycl::ext::oneapi::experimental::create_image(mem->get_handle(),
+                                                         samp, *desc, q);
+    set_img_mem(_img, mem);
+    q.ext_oneapi_copy(get_buffer(ptr).get_host_access().get_pointer(),
+                      mem->get_handle(), mem->get_desc())
+        .wait();
+#else
+    _img = sycl::ext::oneapi::experimental::create_image(ptr, pitch, samp,
+                                                         *desc, q);
+#endif
+  }
+
+  /// Attach 2D data to bindless image.
+  /// \param [in] data The 2D data used to create bindless image.
+  /// \param [in] width The width of 2D data used to create bindless image.
+  /// \param [in] height The height of 2D data used to create bindless image.
+  /// \param [in] pitch The pitch of 2D data used to create bindless image.
+  /// \param [in] channel The image channel used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(void *data, size_t width, size_t height, size_t pitch,
+              const image_channel &channel,
+              sycl::queue q = get_default_queue()) {
+    auto desc = sycl::ext::oneapi::experimental::image_descriptor(
+        {width, height}, channel.get_channel_num(), channel.get_channel_type());
+    attach(&desc, static_cast<device_ptr>(data), pitch, q);
+  }
+
+  /// Attach 2D data to bindless image.
+  /// \param [in] data The 2D data used to create bindless image.
+  /// \param [in] width The width of 2D data used to create bindless image.
+  /// \param [in] height The height of 2D data used to create bindless image.
+  /// \param [in] pitch The pitch of 2D data used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(void *data, size_t width, size_t height, size_t pitch,
+              sycl::queue q = get_default_queue()) {
+    attach(data, width, height, pitch, _channel, q);
+  }
+
+  /// Attach image memory to bindless image.
+  /// \param [in] mem The image memory used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(image_mem_wrapper *mem, const image_channel &channel,
+              sycl::queue q = get_default_queue()) {
+    detach(q);
+    auto samp = sycl::ext::oneapi::experimental::bindless_image_sampler(
+        _addressing_mode, _coordinate_normalization_mode, _filtering_mode);
+    _img = sycl::ext::oneapi::experimental::create_image(
+        mem->get_handle(), samp, mem->get_desc(), q);
+    set_img_mem(_img, mem);
+  }
+
+  /// Attach image memory to bindless image.
+  /// \param [in] mem The image memory used to create bindless image.
+  /// \param [in] q The queue where the image creation be executed.
+  void attach(image_mem_wrapper *mem, sycl::queue q = get_default_queue()) {
+    attach(mem, _channel, q);
+  }
+
+  /// Detach bindless image data.
+  /// \param [in] q The queue where the image destruction be executed.
+  void detach(sycl::queue q = get_default_queue()) {
+    destroy_bindless_image(_img, q);
+  }
+
+  /// Set image channel of bindless image.
+  /// \param [in] channel The image channel used to set.
+  void set_channel(image_channel channel) { _channel = channel; }
+  /// Get image channel of bindless image.
+  /// \returns The image channel of bindless image.
+  image_channel get_channel() { return _channel; }
+
+  /// Set channel size of image channel.
+  /// \param [in] channel_num The channels number to set.
+  /// \param [in] channel_size The size for each channel in bits.
+  void set_channel_size(unsigned channel_num, unsigned channel_size) {
+    return _channel.set_channel_size(channel_num, channel_size);
+  }
+  /// Get channel size of image channel.
+  /// \returns The size for each channel in bits.
+  unsigned get_channel_size() { return _channel.get_channel_size(); }
+
+  /// Set image channel data type of image channel.
+  /// \param [in] type The image channel data type to set.
+  void set_channel_data_type(image_channel_data_type type) {
+    _channel.set_channel_data_type(type);
+  }
+  /// Get image channel data type of image channel.
+  /// \returns The image channel data type of image channel.
+  image_channel_data_type get_channel_data_type() {
+    return _channel.get_channel_data_type();
+  }
+
+  /// Set channel num of bindless image.
+  /// \param [in] filtering_mode The channel num used to set.
+  void set_channel_num(unsigned num) { return _channel.set_channel_num(num); }
+
+  /// Set channel type of bindless image.
+  /// \param [in] filtering_mode The channel type used to set.
+  void set_channel_type(sycl::image_channel_type type) {
+    return _channel.set_channel_type(type);
+  }
+
+  /// Set addressing mode of bindless image.
+  /// \param [in] addressing_mode The addressing mode used to set.
+  void set(sycl::addressing_mode addressing_mode) {
+    _addressing_mode = addressing_mode;
+  }
+  /// Get addressing mode of bindless image.
+  /// \returns The addressing mode of bindless image.
+  sycl::addressing_mode get_addressing_mode() { return _addressing_mode; }
+
+  /// Set coordinate normalization mode of bindless image.
+  /// \param [in] coordinate_normalization_mode The coordinate normalization
+  /// mode used to set.
+  void set(sycl::coordinate_normalization_mode coordinate_normalization_mode) {
+    _coordinate_normalization_mode = coordinate_normalization_mode;
+  }
+  /// Set coordinate normalization mode of bindless image.
+  /// \param [in] is_normalized Determine whether the coordinate should be
+  /// normalized.
+  void set_coordinate_normalization_mode(int is_normalized) {
+    _coordinate_normalization_mode =
+        is_normalized ? sycl::coordinate_normalization_mode::normalized
+                      : sycl::coordinate_normalization_mode::unnormalized;
+  }
+  /// Get coordinate normalization mode of bindless image.
+  /// \returns The coordinate normalization mode of bindless image.
+  bool is_coordinate_normalized() {
+    return _coordinate_normalization_mode ==
+           sycl::coordinate_normalization_mode::normalized;
+  }
+
+  /// Set filtering mode of bindless image.
+  /// \param [in] filtering_mode The filtering mode used to set.
+  void set(sycl::filtering_mode filtering_mode) {
+    _filtering_mode = filtering_mode;
+  }
+  /// Get filtering mode of bindless image.
+  /// \returns The filtering mode of bindless image.
+  sycl::filtering_mode get_filtering_mode() { return _filtering_mode; }
+
+  /// Get bindless image handle.
+  /// \returns The sampled image handle of created bindless image.
+  inline sycl::ext::oneapi::experimental::sampled_image_handle get_handle() {
+    return _img;
+  }
+
+  /// Set mipmap sample filtering mode for bindless image handle
+  /// \param [in] filtering_mode The mipmap filtering mode
+  inline void set_mip_filtering_mode(sycl::filtering_mode mode) {
+    auto sampling_info = get_sampling_info(_img);
+    sampling_info.set_mipmap_filtering(mode);
+  }
+
+  /// Get mipmap sample filtering mode for bindless image handle
+  /// \return The mipmap filtering mode
+  inline sycl::filtering_mode get_mip_filtering_mode(void) {
+    auto sampling_info = get_sampling_info(_img);
+    return sampling_info.get_mipmap_filtering();
+  }
+
+  /// Get mipmap sample filtering mode for bindless image handle
+  /// \return The mipmap filtering mode
+  inline void get_mip_level_clamp(float *min_level_clamp,
+                                  float *max_level_clamp) {
+    auto sampling_info = get_sampling_info(_img);
+    *min_level_clamp = sampling_info.get_min_mipmap_level_clamp();
+    *max_level_clamp = sampling_info.get_max_mipmap_level_clamp();
+  }
+
+  /// Get mipmap memory wrapper attached the bindless image
+  /// \return The mipmap memory wrapper
+  inline image_mem_wrapper *get_attached_mipmap_data(void) {
+    auto mem = get_img_mem(_img);
+
+    if (mem->get_image_type() !=
+        sycl::ext::oneapi::experimental::image_type::mipmap)
+      throw std::runtime_error("Bindless image data is not of mipmap type");
+
+    return mem;
+  }
+
+private:
+  image_channel _channel;
+  sycl::addressing_mode _addressing_mode = sycl::addressing_mode::clamp_to_edge;
+  sycl::coordinate_normalization_mode _coordinate_normalization_mode =
+      sycl::coordinate_normalization_mode::unnormalized;
+  sycl::filtering_mode _filtering_mode = sycl::filtering_mode::nearest;
+  sycl::ext::oneapi::experimental::sampled_image_handle _img{0};
+};
+
+/// The wrapper class of bindless image.
+template <class T, int dimensions>
+class bindless_image_wrapper : public bindless_image_wrapper_base {
+public:
+  /// Create bindless image wrapper according to template argument \p T.
+  bindless_image_wrapper() { set_channel(image_channel::create<T>()); }
+};
+
+/// Asynchronously copies from the image memory to memory specified by a
+/// pointer, The return of the function does NOT guarantee the copy is
+/// completed.
+/// \param [in] dest The destination memory address.
+/// \param [in] p The pitch of destination memory.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] w The width of matrix to be copied.
+/// \param [in] h The height of matrix to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void async_dpct_memcpy(void *dest, size_t p,
+                                     const image_mem_wrapper *src,
+                                     size_t w_offset_src, size_t h_offset_src,
+                                     size_t w, size_t h,
+                                     sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src->get_handle(), src->get_desc(), w_offset_src,
+                      h_offset_src, dest, p, w, h, q);
+}
+
+/// Synchronously copies from the image memory to memory specified by a
+/// pointer, The function will return after the copy is completed.
+/// \param [in] dest The destination memory address.
+/// \param [in] p The pitch of destination memory.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] w The width of matrix to be copied.
+/// \param [in] h The height of matrix to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(void *dest, size_t p,
+                               const image_mem_wrapper *src,
+                               size_t w_offset_src, size_t h_offset_src,
+                               size_t w, size_t h,
+                               sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src->get_handle(), src->get_desc(), w_offset_src,
+                      h_offset_src, dest, p, w, h, q)
+      .wait();
+}
+
+/// Asynchronously copies from the image memory to memory specified by a
+/// pointer, The return of the function does NOT guarantee the copy is
+/// completed.
+/// \param [in] dest The destination memory address.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] s The size to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void async_dpct_memcpy(void *dest, const image_mem_wrapper *src,
+                                     size_t w_offset_src, size_t h_offset_src,
+                                     size_t s,
+                                     sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src->get_handle(), src->get_desc(), w_offset_src,
+                      h_offset_src, dest, s, q);
+}
+
+/// Synchronously copies from the image memory to memory specified by a
+/// pointer, The function will return after the copy is completed.
+/// \param [in] dest The destination memory address.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] s The size to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(void *dest, const image_mem_wrapper *src,
+                               size_t w_offset_src, size_t h_offset_src,
+                               size_t s, sycl::queue q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memcpy(src->get_handle(), src->get_desc(),
+                                        w_offset_src, h_offset_src, dest, s,
+                                        q));
+}
+
+/// Asynchronously copies from memory specified by a pointer to the image
+/// memory, The return of the function does NOT guarantee the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source memory address.
+/// \param [in] p The pitch of source memory.
+/// \param [in] w The width of matrix to be copied.
+/// \param [in] h The height of matrix to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void async_dpct_memcpy(image_mem_wrapper *dest,
+                                     size_t w_offset_dest, size_t h_offset_dest,
+                                     const void *src, size_t p, size_t w,
+                                     size_t h,
+                                     sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src, dest->get_handle(), dest->get_desc(), w_offset_dest,
+                      h_offset_dest, p, w, h, q);
+}
+
+/// Synchronously copies from memory specified by a pointer to the image
+/// memory, The function will return after the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source memory address.
+/// \param [in] p The pitch of source memory.
+/// \param [in] w The width of matrix to be copied.
+/// \param [in] h The height of matrix to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(image_mem_wrapper *dest, size_t w_offset_dest,
+                               size_t h_offset_dest, const void *src, size_t p,
+                               size_t w, size_t h,
+                               sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src, dest->get_handle(), dest->get_desc(), w_offset_dest,
+                      h_offset_dest, p, w, h, q)
+      .wait();
+}
+
+/// Asynchronously copies from memory specified by a pointer to the image
+/// memory, The return of the function does NOT guarantee the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source memory address.
+/// \param [in] s The size to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void async_dpct_memcpy(image_mem_wrapper *dest,
+                                     size_t w_offset_dest, size_t h_offset_dest,
+                                     const void *src, size_t s,
+                                     sycl::queue q = get_default_queue()) {
+  detail::dpct_memcpy(src, dest->get_handle(), dest->get_desc(), w_offset_dest,
+                      h_offset_dest, s, q);
+}
+
+/// Synchronously copies from memory specified by a pointer to the image
+/// memory, The function will return after the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source memory address.
+/// \param [in] s The size to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(image_mem_wrapper *dest, size_t w_offset_dest,
+                               size_t h_offset_dest, const void *src, size_t s,
+                               sycl::queue q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memcpy(src, dest->get_handle(),
+                                        dest->get_desc(), w_offset_dest,
+                                        h_offset_dest, s, q));
+}
+
+/// Synchronously copies from image memory to the image memory, The function
+/// will return after the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] w The width of matrix to be copied.
+/// \param [in] h The height of matrix to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(image_mem_wrapper *dest, size_t w_offset_dest,
+                               size_t h_offset_dest,
+                               const image_mem_wrapper *src,
+                               size_t w_offset_src, size_t h_offset_src,
+                               size_t w, size_t h,
+                               sycl::queue q = get_default_queue()) {
+  auto temp = (void *)sycl::malloc_device(w * h, q);
+  // TODO: Need change logic when sycl support image_mem to image_mem copy.
+  dpct_memcpy(temp, w, src, w_offset_src, h_offset_src, w, h, q);
+  dpct_memcpy(dest, w_offset_dest, h_offset_dest, temp, w, w, h, q);
+  sycl::free(temp, q);
+}
+
+/// Synchronously copies from image memory to the image memory, The function
+/// will return after the copy is completed.
+/// \param [in] dest The destination image memory.
+/// \param [in] w_offset_dest The x offset of destination image memory.
+/// \param [in] h_offset_dest The y offset of destination image memory.
+/// \param [in] src The source image memory.
+/// \param [in] w_offset_src The x offset of source image memory.
+/// \param [in] h_offset_src The y offset of source image memory.
+/// \param [in] s The size to be copied.
+/// \param [in] q The queue to execute the copy task.
+static inline void dpct_memcpy(image_mem_wrapper *dest, size_t w_offset_dest,
+                               size_t h_offset_dest,
+                               const image_mem_wrapper *src,
+                               size_t w_offset_src, size_t h_offset_src,
+                               size_t s, sycl::queue q = get_default_queue()) {
+  auto temp = (void *)sycl::malloc_device(s, q);
+  // TODO: Need change logic when sycl support image_mem to image_mem copy.
+  dpct_memcpy(temp, src, w_offset_src, h_offset_src, s, q);
+  dpct_memcpy(dest, w_offset_dest, h_offset_dest, temp, s, q);
+  sycl::free(temp, q);
+}
+// A wrapper for sycl fetch_image function for the byte addressing image.
+template <typename DataT, typename HintT = DataT, typename CoordT>
+DataT fetch_image_by_byte(
+    const sycl::ext::oneapi::experimental::unsampled_image_handle &imageHandle,
+    CoordT &&coords) {
+  if constexpr (std::is_scalar_v<CoordT>) {
+    return sycl::ext::oneapi::experimental::fetch_image<DataT, HintT, CoordT>(
+        imageHandle, coords / sizeof(DataT));
+  } else {
+    coords[0] = coords[0] / sizeof(DataT);
+    return sycl::ext::oneapi::experimental::fetch_image<DataT, HintT, CoordT>(
+        imageHandle, coords);
+  }
+}
+
+using image_mem_wrapper_ptr = image_mem_wrapper *;
+#ifdef _WIN32
+using external_mem_wrapper_ptr = external_mem_wrapper *;
+#else
+using external_mem_wrapper_ptr = external_mem_wrapper_base *;
+#endif // _WIN32
+using external_sem_wrapper_ptr = external_sem_wrapper *;
+using bindless_image_wrapper_base_p = bindless_image_wrapper_base *;
+
+#endif
+
+} // namespace experimental
+} // namespace dpct
+
+#endif // !__DPCT_BINDLESS_IMAGE_HPP__
diff --git a/sycl/include/dpct/blas_gemm_utils.hpp b/sycl/include/dpct/blas_gemm_utils.hpp
new file mode 100644
index 00000000000..f41fe0737b4
--- /dev/null
+++ b/sycl/include/dpct/blas_gemm_utils.hpp
@@ -0,0 +1,896 @@
+//==---- blas_gemm_utils.hpp ----------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+// This file contains the implementation of GEneral Matrix Multiplication by
+// using oneDNN. More datatype combinations and the epilogue can be supported by
+// oneDNN, which is not available in blas_utils.hpp using oneMKL.
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_BLAS_GEMM_UTILS_HPP__
+#define __DPCT_BLAS_GEMM_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "blas_utils.hpp"
+#include "dnnl_utils.hpp"
+
+namespace dpct::blas_gemm::experimental {
+enum class order_t : std::uint8_t {
+  col,
+  row,
+  col32,
+  col4_4r2_8c,
+  col32_2r_4r4
+};
+} // namespace dpct::blas_gemm::experimental
+
+#include "detail/blas_gemm_utils_detail.hpp"
+
+namespace dpct::blas_gemm::experimental {
+enum class pointer_mode_t {
+  host,
+  device,
+  device_vector,
+  alpha_device_vector_beta_zero,
+  alpha_device_vector_beta_host
+};
+enum class epilogue_t {
+  nop = 1,
+  relu,
+  bias,
+  gelu,
+  gelu_bias,
+  gelu_aux,
+  gelu_aux_bias,
+  dgelu,
+  bgradb
+};
+
+class descriptor;
+using descriptor_ptr = descriptor *;
+class matrix_layout_t;
+using matrix_layout_ptr = matrix_layout_t *;
+class matmul_desc_t;
+using matmul_desc_ptr = matmul_desc_t *;
+class transform_desc_t;
+using transform_desc_ptr = transform_desc_t *;
+
+class descriptor {
+public:
+  descriptor() {}
+  void init(sycl::queue *q_ptr) {
+    _engine = ::dnnl::sycl_interop::make_engine(q_ptr->get_device(),
+                                                q_ptr->get_context());
+    _engine_stream = ::dnnl::sycl_interop::make_stream(_engine, *q_ptr);
+  }
+  ::dnnl::engine get_engine() const noexcept { return _engine; }
+  ::dnnl::stream get_engine_stream() const noexcept { return _engine_stream; };
+
+private:
+  ::dnnl::engine _engine;
+  ::dnnl::stream _engine_stream;
+};
+
+class matrix_layout_t {
+public:
+  enum class attribute {
+    type,
+    order,
+    rows,
+    cols,
+    ld,
+    batch_count,
+    strided_batch_offset
+  };
+
+  matrix_layout_t(library_data_t type, std::uint64_t rows, std::uint64_t cols,
+                  std::int64_t ld)
+      : _type(type), _rows(rows), _cols(cols), _ld(ld) {}
+
+  void set_attribute(attribute attr, const void *mem) {
+    get_set_attr<true>(attr, const_cast<void *>(mem));
+  }
+  void get_attribute(attribute attr, void *mem) {
+    get_set_attr<false>(attr, mem);
+  }
+
+private:
+  template <bool is_set> void get_set_attr(attribute attr, void *mem) {
+#define CASE(tag)                                                              \
+  case attribute::tag:                                                         \
+    if constexpr (is_set) {                                                    \
+      _##tag = *static_cast<decltype(_##tag) *>(mem);                          \
+    } else {                                                                   \
+      *static_cast<decltype(_##tag) *>(mem) = _##tag;                          \
+    }                                                                          \
+    break;
+    switch (attr) {
+      CASE(type)
+      CASE(order)
+      CASE(rows)
+      CASE(cols)
+      CASE(ld)
+      CASE(batch_count)
+      CASE(strided_batch_offset)
+    }
+#undef CASE
+  }
+
+  library_data_t _type;
+  order_t _order = order_t::col;
+  std::uint64_t _rows;
+  std::uint64_t _cols;
+  std::int64_t _ld;
+  std::uint64_t _batch_count = 1;
+  std::uint64_t _strided_batch_offset = 0;
+
+  friend sycl::event matmul(descriptor_ptr handle, matmul_desc_ptr computeDesc,
+                            const void *alpha, const void *a,
+                            matrix_layout_ptr a_desc, const void *b,
+                            matrix_layout_ptr b_desc, const void *beta,
+                            const void *c, matrix_layout_ptr c_desc, void *d,
+                            matrix_layout_ptr d_desc,
+                            ::dpct::cs::queue_ptr q_ptr);
+  friend sycl::event
+  matrix_transform(transform_desc_ptr transform_desc, const void *alpha,
+                   const void *a, matrix_layout_ptr a_desc, const void *beta,
+                   const void *b, matrix_layout_ptr b_desc, void *c,
+                   matrix_layout_ptr c_desc, ::dpct::cs::queue_ptr q_ptr);
+};
+
+class matmul_desc_t {
+public:
+  enum class attribute {
+    compute_type,
+    scale_type,
+    bias_data_type,
+    bias_pointer,
+    pointer_mode,
+    trans_a,
+    trans_b,
+    trans_c,
+    epilogue,
+    epilogue_aux_ld,
+    epilogue_aux_pointer,
+    epilogue_aux_data_type,
+    a_scale_pointer,
+    b_scale_pointer,
+    d_scale_pointer,
+    absmax_d_pointer,
+    unsupport
+  };
+
+  matmul_desc_t(compute_type compute_type, library_data_t scale_type)
+      : _compute_type(compute_type), _scale_type(scale_type) {}
+
+  void set_attribute(attribute attr, const void *mem) {
+    if (attr != attribute::unsupport)
+      get_set_attr<true>(attr, const_cast<void *>(mem));
+  }
+  void get_attribute(attribute attr, void *mem) {
+    if (attr != attribute::unsupport)
+      get_set_attr<false>(attr, mem);
+  }
+
+private:
+  template <bool is_set> void get_set_attr(attribute attr, void *mem) {
+#define CASE(tag)                                                              \
+  case attribute::tag:                                                         \
+    if constexpr (is_set) {                                                    \
+      _##tag = *static_cast<decltype(_##tag) *>(mem);                          \
+    } else {                                                                   \
+      *static_cast<decltype(_##tag) *>(mem) = _##tag;                          \
+    }                                                                          \
+    break;
+    switch (attr) {
+      CASE(compute_type)
+      CASE(scale_type)
+      CASE(bias_data_type)
+      CASE(bias_pointer)
+      CASE(pointer_mode)
+      CASE(trans_a)
+      CASE(trans_b)
+      CASE(trans_c)
+      CASE(epilogue)
+      CASE(a_scale_pointer)
+      CASE(b_scale_pointer)
+      CASE(d_scale_pointer)
+      CASE(absmax_d_pointer)
+      CASE(epilogue_aux_ld)
+      CASE(epilogue_aux_pointer)
+      CASE(epilogue_aux_data_type)
+    default:
+      break;
+    }
+#undef CASE
+  }
+
+  compute_type _compute_type;
+  library_data_t _scale_type;
+  library_data_t _bias_data_type = library_data_t::real_float;
+  pointer_mode_t _pointer_mode = pointer_mode_t::host;
+  oneapi::mkl::transpose _trans_a = oneapi::mkl::transpose::nontrans;
+  oneapi::mkl::transpose _trans_b = oneapi::mkl::transpose::nontrans;
+  oneapi::mkl::transpose _trans_c = oneapi::mkl::transpose::nontrans;
+  epilogue_t _epilogue = epilogue_t::nop;
+  library_data_t _epilogue_aux_data_type = library_data_t::real_float;
+  size_t _epilogue_aux_ld = 0;
+  void *_a_scale_pointer = nullptr;
+  void *_b_scale_pointer = nullptr;
+  void *_d_scale_pointer = nullptr;
+  void *_absmax_d_pointer = nullptr;
+  void *_bias_pointer = nullptr;
+  void *_epilogue_aux_pointer = nullptr;
+
+  friend sycl::event matmul(descriptor_ptr handle, matmul_desc_ptr computeDesc,
+                            const void *alpha, const void *a,
+                            matrix_layout_ptr a_desc, const void *b,
+                            matrix_layout_ptr b_desc, const void *beta,
+                            const void *c, matrix_layout_ptr c_desc, void *d,
+                            matrix_layout_ptr d_desc,
+                            ::dpct::cs::queue_ptr q_ptr);
+};
+
+/// This function does the following operations:
+/// (1) D_temp = epilogue(alpha * scale_a * op_a(A) * scale_b * op_b(B) + beta * C)
+/// (2) Amax = absmax(D_temp) when matmul_desc_t::attribute::absmax_d_pointer is specified
+/// (3) D = scale_d * D_temp
+///   "op_a" is specified by the matmul_desc_t::attribute::trans_a
+///   (default is nontrans)
+///   "op_b" is specified by the matmul_desc_t::attribute::trans_b
+///   (default is nontrans)
+///   "scale_a" is specified by the matmul_desc_t::attribute::a_scale_pointer
+///   (default is nullptr, which behaves as 1.0)
+///   "scale_b" is specified by the matmul_desc_t::attribute::b_scale_pointer
+///   (default is nullptr, which behaves as 1.0)
+///   "scale_d" is specified by the matmul_desc_t::attribute::d_scale_pointer
+///   (default is nullptr, which behaves as 1.0)
+///   "alpha" can be a scalar value or a vector, which is specified by the
+///   matmul_desc_tattribute::::pointer_mode
+///   "epilogue" is specified by the matmul_desc_t::attribute::epilogue
+/// Currently, this function only supports the following type combinations:
+///   scale_type==int32 && a_type==int8 && b_type==int8 && c_type==int32;
+///   scale_type==float && a_type==int8 && b_type==int8 && c_type==int8;
+///   scale_type==float && a_type==int8 && b_type==int8 && c_type==int32;
+///   scale_type==float && a_type==float && b_type==float && c_type==float.
+/// Currently, this function only supports beta==0 or beta==1.
+/// Currently, this function only supports the relu, bias, gelu, gelu_bias,
+/// gelu_aux, gelu_aux_bias, dgelu and bgradb epilogue.
+/// NOTE: Non-col-major matrix will be converted to col-major matrix before.
+/// TODO: Impl row-major matmul without layout conversion.
+/// multiplication and converted back after multiplication.
+/// \param [in] handle A handle containing context info.
+/// \param [in] compute_desc Describe the computation.
+/// \param [in] alpha Scaling factor alpha.
+/// \param [in] a Input matrix A.
+/// \param [in] a_desc Describe the matrix A.
+/// \param [in] b Input matrix B.
+/// \param [in] b_desc Describe the matrix B.
+/// \param [in] beta Scaling factor beta.
+/// \param [in] c Input matrix C.
+/// \param [in] c_desc Describe the matrix C.
+/// \param [out] d Output matrix D.
+/// \param [in] d_desc Describe the matrix D.
+/// \param [in] q_ptr The queue where the routine should be executed.
+inline sycl::event matmul(descriptor_ptr handle, matmul_desc_ptr compute_desc,
+                          const void *alpha, const void *a,
+                          matrix_layout_ptr a_desc, const void *b,
+                          matrix_layout_ptr b_desc, const void *beta,
+                          const void *c, matrix_layout_ptr c_desc, void *d,
+                          matrix_layout_ptr d_desc,
+                          ::dpct::cs::queue_ptr q_ptr) {
+  const size_t m = compute_desc->_trans_a == oneapi::mkl::transpose::nontrans
+                       ? a_desc->_rows
+                       : a_desc->_cols;
+  const size_t n = d_desc->_cols;
+  const size_t k = compute_desc->_trans_b == oneapi::mkl::transpose::nontrans
+                       ? b_desc->_rows
+                       : b_desc->_cols;
+  const library_data_t a_type = a_desc->_type;
+  const library_data_t b_type = b_desc->_type;
+  const library_data_t c_type = c_desc->_type;
+  const library_data_t d_type = d_desc->_type;
+  const library_data_t scale_type = compute_desc->_scale_type;
+
+  if (!q_ptr)
+    q_ptr = &::dpct::cs::get_default_queue();
+  handle->init(q_ptr);
+  bool vector_alpha = false;
+  bool device_alpha = false;
+  if (compute_desc->_pointer_mode == pointer_mode_t::device_vector ||
+      compute_desc->_pointer_mode ==
+          pointer_mode_t::alpha_device_vector_beta_zero ||
+      compute_desc->_pointer_mode ==
+          pointer_mode_t::alpha_device_vector_beta_host) {
+    vector_alpha = true;
+    device_alpha = true;
+  } else if (compute_desc->_pointer_mode == pointer_mode_t::device) {
+    device_alpha = true;
+  }
+
+  bool beta_is_zero = true;
+  if (beta != nullptr) {
+    int beta_value = detail::type_dispatch<detail::get_beta_value_impl>(
+        compute_desc->_scale_type, beta, q_ptr);
+    if (beta_value != 0) {
+      beta_is_zero = false;
+      if (beta_value != 1)
+        throw std::runtime_error(
+            "dpct::blas_gemm::experimental::matmul() does "
+            "not support non-zero and non-one beta currently.");
+    }
+  }
+
+  if (compute_desc->_epilogue != epilogue_t::nop &&
+      compute_desc->_epilogue != epilogue_t::relu &&
+      compute_desc->_epilogue != epilogue_t::bias &&
+      compute_desc->_epilogue != epilogue_t::gelu &&
+      compute_desc->_epilogue != epilogue_t::gelu_bias &&
+      compute_desc->_epilogue != epilogue_t::gelu_aux &&
+      compute_desc->_epilogue != epilogue_t::gelu_aux_bias &&
+      compute_desc->_epilogue != epilogue_t::dgelu &&
+      compute_desc->_epilogue != epilogue_t::bgradb) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matmul() only "
+        "supports relu, bias, gelu, gelu_bias, gelu_aux, "
+        "gelu_aux_bias, dgelu and bgradb epilogue currently.");
+  }
+
+  if (!(compute_desc->_scale_type == library_data_t::real_int32 &&
+        a_desc->_type == library_data_t::real_int8 &&
+        b_desc->_type == library_data_t::real_int8 &&
+        c_desc->_type == library_data_t::real_int32) &&
+      !(compute_desc->_scale_type == library_data_t::real_float &&
+        a_desc->_type == library_data_t::real_int8 &&
+        b_desc->_type == library_data_t::real_int8 &&
+        c_desc->_type == library_data_t::real_int8) &&
+      !(compute_desc->_scale_type == library_data_t::real_float &&
+        a_desc->_type == library_data_t::real_int8 &&
+        b_desc->_type == library_data_t::real_int8 &&
+        c_desc->_type == library_data_t::real_int32) &&
+      !(compute_desc->_scale_type == library_data_t::real_float &&
+        a_desc->_type == library_data_t::real_float &&
+        b_desc->_type == library_data_t::real_float &&
+        c_desc->_type == library_data_t::real_float)) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matmul() only supports data type "
+        "combinataions:\n  scale_type==int32 && a_type==int8 && b_type==int8"
+        "&& c_type==int32,\n  scale_type==float && a_type==int8 && "
+        "b_type==int8 && c_type==int8,\n  scale_type==float && a_type==int8"
+        "&& b_type==int8 && c_type==int32 or\n  scale_type==float && "
+        "a_type==float"
+        "&& b_type==float && c_type==float.");
+  }
+
+  if (a_desc->_batch_count != b_desc->_batch_count ||
+      a_desc->_batch_count != c_desc->_batch_count ||
+      a_desc->_batch_count != d_desc->_batch_count) {
+    throw std::runtime_error("dpct::blas_gemm::experimental::matmul() does not "
+                             "support different batch count.");
+  }
+
+#ifdef DPCT_USM_LEVEL_NONE
+  if (a_desc->_batch_count != 1) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matmul() only supports "
+        "batch mode with USM enabled.");
+  }
+#endif
+
+  size_t a_elm_size = dpct::detail::library_data_size[static_cast<unsigned int>(
+                          a_desc->_type)] /
+                      8;
+  size_t b_elm_size = dpct::detail::library_data_size[static_cast<unsigned int>(
+                          b_desc->_type)] /
+                      8;
+  size_t c_elm_size = dpct::detail::library_data_size[static_cast<unsigned int>(
+                          c_desc->_type)] /
+                      8;
+  size_t d_elm_size = dpct::detail::library_data_size[static_cast<unsigned int>(
+                          d_desc->_type)] /
+                      8;
+
+  static const auto matmul_single =
+      [](descriptor_ptr handle, matmul_desc_ptr compute_desc, const void *alpha,
+         const void *a, matrix_layout_ptr a_desc, const void *b,
+         matrix_layout_ptr b_desc, const void *beta, const void *c,
+         matrix_layout_ptr c_desc, void *d, matrix_layout_ptr d_desc,
+         ::dpct::cs::queue_ptr q_ptr, const size_t m, const size_t n,
+         const size_t k, const library_data_t a_type,
+         const library_data_t b_type, const library_data_t c_type,
+         const library_data_t d_type, const library_data_t scale_type,
+         bool vector_alpha, bool device_alpha, bool beta_is_zero,
+         size_t a_elm_size, size_t b_elm_size, size_t c_elm_size,
+         size_t d_elm_size) -> sycl::event {
+    // For non-col_major matrix, convert it to col_major.
+    const void *new_a = a;
+    const void *new_b = b;
+    const void *new_c = c;
+    void *new_d = d;
+    bool new_b_allocated = false;
+    bool new_c_allocated = false;
+    bool new_d_allocated = false;
+    size_t new_lda = a_desc->_ld, new_ldb = b_desc->_ld, new_ldc = c_desc->_ld,
+           new_ldd = d_desc->_ld;
+    std::vector<sycl::event> transform_events;
+
+    if (a_desc->_order != order_t::col)
+      new_lda = a_desc->_rows;
+    new_a = ::dpct::cs::malloc(a_elm_size * a_desc->_cols * new_lda, *q_ptr);
+    sycl::event e_init;
+    if (a_desc->_order != order_t::col)
+      e_init = detail::type_dispatch<detail::matrix_transform_impl>(
+          a_desc->_type, q_ptr, a_desc->_rows, a_desc->_cols, a_desc->_ld,
+          a_desc->_order, (const std::int8_t *)a, new_lda, order_t::col,
+          (std::int8_t *)new_a, std::vector<sycl::event>{});
+    else
+      e_init = ::dpct::cs::memcpy(
+          *q_ptr, (void *)new_a, a, a_elm_size * a_desc->_cols * new_lda,
+          ::dpct::cs::memcpy_direction::device_to_device);
+
+    // alpha = alpha * scale_a * scale_b
+    sycl::event e_scale_new_a = detail::scale_new_a(
+        q_ptr, m, k, (void *)new_a, a_type, alpha, scale_type, vector_alpha,
+        device_alpha, compute_desc->_a_scale_pointer,
+        compute_desc->_b_scale_pointer, {e_init});
+
+    transform_events.push_back(e_scale_new_a);
+
+    if (b_desc->_order != order_t::col) {
+      new_ldb = b_desc->_rows;
+      new_b = ::dpct::cs::malloc(b_elm_size * b_desc->_cols * new_ldb, *q_ptr);
+      new_b_allocated = true;
+      sycl::event e = detail::type_dispatch<detail::matrix_transform_impl>(
+          b_desc->_type, q_ptr, b_desc->_rows, b_desc->_cols, b_desc->_ld,
+          b_desc->_order, b, new_ldb, order_t::col, const_cast<void *>(new_b),
+          std::vector<sycl::event>{});
+      transform_events.push_back(e);
+    }
+
+    if (!beta_is_zero && c_desc->_order != order_t::col) {
+      new_ldc = c_desc->_rows;
+      new_c = ::dpct::cs::malloc(c_elm_size * c_desc->_cols * new_ldc, *q_ptr);
+      new_c_allocated = true;
+      sycl::event e = detail::type_dispatch<detail::matrix_transform_impl>(
+          c_desc->_type, q_ptr, c_desc->_rows, c_desc->_cols, c_desc->_ld,
+          c_desc->_order, c, new_ldc, order_t::col, const_cast<void *>(new_c),
+          std::vector<sycl::event>{});
+      transform_events.push_back(e);
+    }
+
+    if (d_desc->_order != order_t::col) {
+      new_ldd = d_desc->_rows;
+      new_d = ::dpct::cs::malloc(d_elm_size * d_desc->_cols * new_ldd, *q_ptr);
+      new_d_allocated = true;
+    }
+
+    // start to call oneDNN matmul primitive
+    // a,d are col_major, b is row_major
+    const ::dnnl::memory::dim M = m;
+    const ::dnnl::memory::dim N = n;
+    const ::dnnl::memory::dim K = k;
+
+    ::dnnl::memory::dims src_dims = {M, K};
+    ::dnnl::memory::dims weights_dims = {K, N};
+    ::dnnl::memory::dims bias_dims = {M, N};
+    ::dnnl::memory::dims dst_dims = {M, N};
+
+    const ::dnnl::memory::dims src_strides =
+        compute_desc->_trans_a == oneapi::mkl::transpose::nontrans
+            ? ::dnnl::memory::dims{1, static_cast<long>(new_lda)}
+            : ::dnnl::memory::dims{static_cast<long>(new_lda), 1};
+    const ::dnnl::memory::dims weights_strides =
+        compute_desc->_trans_b == oneapi::mkl::transpose::nontrans
+            ? ::dnnl::memory::dims{1, static_cast<long>(new_ldb)}
+            : ::dnnl::memory::dims{static_cast<long>(new_ldb), 1};
+    const ::dnnl::memory::dims bias_strides =
+        ::dnnl::memory::dims{1, static_cast<long>(new_ldc)};
+    const ::dnnl::memory::dims dst_strides =
+        ::dnnl::memory::dims{1, static_cast<long>(new_ldd)};
+
+    auto src_md = ::dnnl::memory::desc(
+        src_dims, dpct::dnnl::memory_desc_ext::to_dnnl_data_type(a_type),
+        src_strides);
+    auto weights_md = ::dnnl::memory::desc(
+        weights_dims, dpct::dnnl::memory_desc_ext::to_dnnl_data_type(b_type),
+        weights_strides);
+    auto bias_md = ::dnnl::memory::desc(
+        bias_dims, dpct::dnnl::memory_desc_ext::to_dnnl_data_type(c_type),
+        bias_strides);
+    auto dst_md = ::dnnl::memory::desc(
+        dst_dims, dpct::dnnl::memory_desc_ext::to_dnnl_data_type(d_type),
+        dst_strides);
+
+    auto *src_mem =
+        new ::dnnl::memory(src_md, handle->get_engine(), DNNL_MEMORY_NONE);
+    auto *weights_mem =
+        new ::dnnl::memory(weights_md, handle->get_engine(), DNNL_MEMORY_NONE);
+    auto *bias_mem =
+        new ::dnnl::memory(bias_md, handle->get_engine(), DNNL_MEMORY_NONE);
+    auto *dst_mem =
+        new ::dnnl::memory(dst_md, handle->get_engine(), DNNL_MEMORY_NONE);
+
+#ifdef DPCT_USM_LEVEL_NONE
+    detail::type_dispatch<detail::set_buffer_impl>(a_type, src_mem, new_a);
+    detail::type_dispatch<detail::set_buffer_impl>(b_type, weights_mem, new_b);
+    if (!beta_is_zero)
+      detail::type_dispatch<detail::set_buffer_impl>(c_type, bias_mem, new_c);
+    detail::type_dispatch<detail::set_buffer_impl>(d_type, dst_mem, new_d);
+#else
+    src_mem->set_data_handle(const_cast<void *>(new_a));
+    weights_mem->set_data_handle(const_cast<void *>(new_b));
+    if (!beta_is_zero)
+      bias_mem->set_data_handle(const_cast<void *>(new_c));
+    dst_mem->set_data_handle(new_d);
+#endif
+
+    std::unordered_map<int, ::dnnl::memory> matmul_args;
+    matmul_args.insert({DNNL_ARG_SRC, *src_mem});
+    matmul_args.insert({DNNL_ARG_WEIGHTS, *weights_mem});
+    matmul_args.insert({DNNL_ARG_DST, *dst_mem});
+    ::dnnl::primitive_attr matmul_attr;
+
+    ::dnnl::post_ops matmul_ops;
+    if (!beta_is_zero) {
+      matmul_ops.append_binary(::dnnl::algorithm::binary_add, bias_md);
+      matmul_args.insert({DNNL_ARG_ATTR_MULTIPLE_POST_OP(matmul_ops.len() - 1) |
+                              DNNL_ARG_SRC_1,
+                          *bias_mem});
+    }
+
+    ::dnnl::memory *po_bias_mem = nullptr;
+    auto po_bias_md =
+        ::dnnl::memory::desc(::dnnl::memory::dims{M, 1},
+                             dpct::dnnl::memory_desc_ext::to_dnnl_data_type(
+                                 compute_desc->_bias_data_type),
+                             ::dnnl::memory::dims{1, M});
+    if (compute_desc->_epilogue == epilogue_t::bias ||
+        compute_desc->_epilogue == epilogue_t::gelu_bias ||
+        compute_desc->_epilogue == epilogue_t::gelu_aux_bias) {
+      po_bias_mem = new ::dnnl::memory(po_bias_md, handle->get_engine(),
+                                       DNNL_MEMORY_NONE);
+#ifdef DPCT_USM_LEVEL_NONE
+      detail::type_dispatch<detail::set_buffer_impl>(
+          compute_desc->_bias_data_type, po_bias_mem,
+          compute_desc->_bias_pointer);
+#else
+      po_bias_mem->set_data_handle(compute_desc->_bias_pointer);
+#endif
+    }
+
+    ::dnnl::memory *po_bias_bgradb_mem = nullptr;
+    auto po_bias_bgradb_md = ::dnnl::memory::desc(
+        compute_desc->_trans_b == oneapi::mkl::transpose::nontrans
+            ? ::dnnl::memory::dims{N, 1}
+            : ::dnnl::memory::dims{1, N},
+        dpct::dnnl::memory_desc_ext::to_dnnl_data_type(
+            compute_desc->_bias_data_type),
+        compute_desc->_trans_b == oneapi::mkl::transpose::nontrans
+            ? ::dnnl::memory::dims{1, N}
+            : ::dnnl::memory::dims{N, 1});
+    if (compute_desc->_epilogue == epilogue_t::bgradb) {
+      po_bias_bgradb_mem = new ::dnnl::memory(
+          po_bias_bgradb_md, handle->get_engine(), DNNL_MEMORY_NONE);
+#ifdef DPCT_USM_LEVEL_NONE
+      detail::type_dispatch<detail::set_buffer_impl>(
+          compute_desc->_bias_data_type, po_bias_bgradb_mem,
+          compute_desc->_bias_pointer);
+#else
+      po_bias_bgradb_mem->set_data_handle(compute_desc->_bias_pointer);
+#endif
+    }
+
+    ::dnnl::memory *po_aux_mem = nullptr;
+    auto po_aux_md = ::dnnl::memory::desc(
+        ::dnnl::memory::dims{M, N},
+        dpct::dnnl::memory_desc_ext::to_dnnl_data_type(
+            compute_desc->_epilogue_aux_data_type),
+        ::dnnl::memory::dims{
+            1, static_cast<long>(compute_desc->_epilogue_aux_ld)});
+    if (compute_desc->_epilogue == epilogue_t::dgelu) {
+      po_aux_mem =
+          new ::dnnl::memory(po_aux_md, handle->get_engine(), DNNL_MEMORY_NONE);
+#ifdef DPCT_USM_LEVEL_NONE
+      detail::type_dispatch<detail::set_buffer_impl>(
+          compute_desc->_epilogue_aux_data_type, po_aux_mem,
+          compute_desc->_epilogue_aux_pointer);
+#else
+      po_aux_mem->set_data_handle(compute_desc->_epilogue_aux_pointer);
+#endif
+    }
+
+    switch (compute_desc->_epilogue) {
+    case epilogue_t::relu:
+      matmul_ops.append_eltwise(::dnnl::algorithm::eltwise_relu, 0.f, 0.f);
+      break;
+    case epilogue_t::bias:
+    case epilogue_t::gelu_bias: {
+      matmul_ops.append_binary(::dnnl::algorithm::binary_add, po_bias_md);
+      matmul_args.insert({DNNL_ARG_ATTR_MULTIPLE_POST_OP(matmul_ops.len() - 1) |
+                              DNNL_ARG_SRC_1,
+                          *po_bias_mem});
+      if (compute_desc->_epilogue == epilogue_t::gelu_bias)
+        matmul_ops.append_eltwise(::dnnl::algorithm::eltwise_gelu_tanh, 0.f,
+                                  0.f);
+      break;
+    }
+    case epilogue_t::gelu:
+      matmul_ops.append_eltwise(::dnnl::algorithm::eltwise_gelu_tanh, 0.f, 0.f);
+      break;
+    default:
+      break;
+    }
+
+    matmul_attr.set_post_ops(matmul_ops);
+
+    auto matmul_pd = ::dnnl::matmul::primitive_desc(
+        handle->get_engine(), src_md, weights_md, dst_md, matmul_attr);
+    auto matmul_prim = ::dnnl::matmul(matmul_pd);
+    sycl::event matmul_prim_event =
+        ::dnnl::sycl_interop::execute(matmul_prim, handle->get_engine_stream(),
+                                      matmul_args, transform_events);
+
+    // post-op implemented by separate primitives
+    sycl::event post_op_prim_event;
+    if (compute_desc->_epilogue == epilogue_t::gelu_aux ||
+        compute_desc->_epilogue == epilogue_t::gelu_aux_bias) {
+      sycl::event prev_event = matmul_prim_event;
+      if (compute_desc->_epilogue == epilogue_t::gelu_aux_bias) {
+        auto po_bias_pd = ::dnnl::binary::primitive_desc(
+            handle->get_engine(), ::dnnl::algorithm::binary_add, dst_md,
+            po_bias_md, dst_md);
+        auto po_bias_prim = ::dnnl::binary(po_bias_pd);
+        std::unordered_map<int, ::dnnl::memory> po_bias_args;
+        po_bias_args.insert({DNNL_ARG_SRC_0, *dst_mem});
+        po_bias_args.insert({DNNL_ARG_SRC_1, *po_bias_mem});
+        po_bias_args.insert({DNNL_ARG_DST, *dst_mem});
+        sycl::event prev_event = ::dnnl::sycl_interop::execute(
+            po_bias_prim, handle->get_engine_stream(), po_bias_args,
+            {matmul_prim_event});
+      }
+      size_t size_of_element =
+          dpct::detail::library_data_size[static_cast<unsigned int>(
+              d_desc->_type)] /
+          8;
+      sycl::event copy_e = dpct::blas::matrix_mem_copy_async(
+          compute_desc->_epilogue_aux_pointer, new_d,
+          compute_desc->_epilogue_aux_ld, d_desc->_ld, m, n, size_of_element,
+          ::dpct::cs::memcpy_direction::automatic, *q_ptr, {prev_event});
+
+      auto gelu_pd = ::dnnl::eltwise_forward::primitive_desc(
+          handle->get_engine(), ::dnnl::prop_kind::forward_training,
+          ::dnnl::algorithm::eltwise_gelu_tanh, dst_md, dst_md);
+      auto gelu_prim = ::dnnl::eltwise_forward(gelu_pd);
+      std::unordered_map<int, ::dnnl::memory> gelu_args;
+      gelu_args.insert({DNNL_ARG_SRC, *dst_mem});
+      gelu_args.insert({DNNL_ARG_DST, *dst_mem});
+      post_op_prim_event = ::dnnl::sycl_interop::execute(
+          gelu_prim, handle->get_engine_stream(), gelu_args, {copy_e});
+    } else if (compute_desc->_epilogue == epilogue_t::dgelu) {
+      auto gelu_pd = ::dnnl::eltwise_forward::primitive_desc(
+          handle->get_engine(), ::dnnl::prop_kind::forward_training,
+          ::dnnl::algorithm::eltwise_gelu_tanh, po_aux_md, po_aux_md);
+      auto dgelu_pd = ::dnnl::eltwise_backward::primitive_desc(
+          handle->get_engine(), ::dnnl::algorithm::eltwise_gelu_tanh, dst_md,
+          dst_md, po_aux_md, gelu_pd);
+      auto dgelu_prim = ::dnnl::eltwise_backward(dgelu_pd);
+      std::unordered_map<int, ::dnnl::memory> dgelu_args;
+      dgelu_args.insert({DNNL_ARG_SRC, *po_aux_mem});
+      dgelu_args.insert({DNNL_ARG_DIFF_DST, *dst_mem});
+      dgelu_args.insert({DNNL_ARG_DIFF_SRC, *dst_mem});
+      post_op_prim_event =
+          ::dnnl::sycl_interop::execute(dgelu_prim, handle->get_engine_stream(),
+                                        dgelu_args, {matmul_prim_event});
+    } else if (compute_desc->_epilogue == epilogue_t::bgradb) {
+      auto reduction_pd = ::dnnl::reduction::primitive_desc(
+          handle->get_engine(), ::dnnl::algorithm::reduction_sum, weights_md,
+          po_bias_bgradb_md, 0.f, 0.f);
+      auto reduction_prim = ::dnnl::reduction(reduction_pd);
+      std::unordered_map<int, ::dnnl::memory> reduction_args;
+      reduction_args.insert({DNNL_ARG_SRC, *weights_mem});
+      reduction_args.insert({DNNL_ARG_DST, *po_bias_bgradb_mem});
+      post_op_prim_event = ::dnnl::sycl_interop::execute(
+          reduction_prim, handle->get_engine_stream(), reduction_args,
+          {matmul_prim_event});
+    }
+
+#ifndef DPCT_USM_LEVEL_NONE
+    // WA to avoid incorrect result on CPU with USM
+    if (q_ptr->get_device().is_cpu()) {
+      matmul_prim_event.wait();
+      post_op_prim_event.wait();
+    }
+#endif
+    // end of calling oneDNN
+
+    sycl::event absmax_d_event;
+    if (auto absmax_ptr = compute_desc->_absmax_d_pointer) {
+      absmax_d_event = detail::type_dispatch<detail::absmax_impl>(
+          d_desc->_type, absmax_ptr, new_d, new_ldd, d_desc->_rows,
+          d_desc->_cols, q_ptr,
+          std::vector<sycl::event>{matmul_prim_event, post_op_prim_event});
+    }
+
+    sycl::event scale_d_event;
+    if (auto d_scale_ptr = compute_desc->_d_scale_pointer) {
+      scale_d_event = detail::type_dispatch<detail::scale_d_impl>(
+          d_desc->_type, d_scale_ptr, new_d, new_ldd, d_desc->_rows,
+          d_desc->_cols, q_ptr, compute_desc->_scale_type,
+          std::vector<sycl::event>{matmul_prim_event, absmax_d_event,
+                                   post_op_prim_event});
+    }
+
+    sycl::event transform_d_event;
+    if (d_desc->_order != order_t::col) {
+      transform_d_event = detail::type_dispatch<detail::matrix_transform_impl>(
+          d_desc->_type, q_ptr, d_desc->_rows, d_desc->_cols, new_ldd,
+          order_t::col, new_d, d_desc->_ld, d_desc->_order, d,
+          std::vector<sycl::event>{matmul_prim_event, absmax_d_event,
+                                   post_op_prim_event});
+    }
+
+    sycl::event free_event = q_ptr->submit([&](sycl::handler &cgh) {
+      cgh.depends_on({transform_d_event, matmul_prim_event, absmax_d_event,
+                      post_op_prim_event});
+      cgh.host_task([=] {
+        delete src_mem;
+        delete weights_mem;
+        delete bias_mem;
+        delete dst_mem;
+        if (po_bias_mem)
+          delete po_bias_mem;
+        if (po_bias_bgradb_mem)
+          delete po_bias_bgradb_mem;
+        if (po_aux_mem)
+          delete po_aux_mem;
+        ::dpct::cs::free((void *)new_a, *q_ptr);
+        if (new_b_allocated)
+          ::dpct::cs::free((void *)new_b, *q_ptr);
+        if (new_c_allocated)
+          ::dpct::cs::free((void *)new_c, *q_ptr);
+        if (new_d_allocated)
+          ::dpct::cs::free((void *)new_d, *q_ptr);
+      });
+    });
+    return free_event;
+  };
+
+  std::vector<sycl::event> events;
+  const std::byte *offsetted_a = static_cast<const std::byte *>(a);
+  const std::byte *offsetted_b = static_cast<const std::byte *>(b);
+  const std::byte *offsetted_c = static_cast<const std::byte *>(c);
+  std::byte *offsetted_d = static_cast<std::byte *>(d);
+  for (std::uint64_t i = 0; i < a_desc->_batch_count; i++) {
+    sycl::event e = matmul_single(
+        handle, compute_desc, alpha, offsetted_a, a_desc, offsetted_b, b_desc,
+        beta, offsetted_c, c_desc, offsetted_d, d_desc, q_ptr, m, n, k, a_type,
+        b_type, c_type, d_type, scale_type, vector_alpha, device_alpha,
+        beta_is_zero, a_elm_size, b_elm_size, c_elm_size, d_elm_size);
+    events.push_back(e);
+
+    offsetted_a += a_elm_size * a_desc->_strided_batch_offset;
+    offsetted_b += b_elm_size * b_desc->_strided_batch_offset;
+    offsetted_c += c_elm_size * c_desc->_strided_batch_offset;
+    offsetted_d += d_elm_size * d_desc->_strided_batch_offset;
+  }
+
+  return q_ptr->single_task(events, [] {});
+}
+
+class transform_desc_t {
+public:
+  enum class attribute { scale_type, pointer_mode, trans_a, trans_b };
+
+  transform_desc_t(library_data_t scale_type) : _scale_type(scale_type) {}
+  void set_attribute(attribute attr, const void *mem) {
+    get_set_attr<true>(attr, const_cast<void *>(mem));
+  }
+  void get_attribute(attribute attr, void *mem) {
+    get_set_attr<false>(attr, mem);
+  }
+
+private:
+  template <bool is_set> void get_set_attr(attribute attr, void *mem) {
+#define CASE(tag)                                                              \
+  case attribute::tag:                                                         \
+    if constexpr (is_set) {                                                    \
+      _##tag = *static_cast<decltype(_##tag) *>(mem);                          \
+    } else {                                                                   \
+      *static_cast<decltype(_##tag) *>(mem) = _##tag;                          \
+    }                                                                          \
+    break;
+    switch (attr) {
+      CASE(scale_type)
+      CASE(pointer_mode)
+      CASE(trans_a)
+      CASE(trans_b)
+    }
+#undef CASE
+  }
+
+  library_data_t _scale_type;
+  pointer_mode_t _pointer_mode = pointer_mode_t::host;
+  oneapi::mkl::transpose _trans_a = oneapi::mkl::transpose::nontrans;
+  oneapi::mkl::transpose _trans_b = oneapi::mkl::transpose::nontrans;
+
+  friend sycl::event
+  matrix_transform(transform_desc_ptr transform_desc, const void *alpha,
+                   const void *a, matrix_layout_ptr a_desc, const void *beta,
+                   const void *b, matrix_layout_ptr b_desc, void *c,
+                   matrix_layout_ptr c_desc, ::dpct::cs::queue_ptr q_ptr);
+};
+
+/// This function does operation:
+/// C = alpha*transformation(A) + beta*transformation(B).
+/// The "transformation" includes matrix transpose and layout conversion.
+/// Currently it only supports alpha==1 && beta==0.
+/// \param [in] transform_desc Describe the transformation.
+/// \param [in] alpha Scaling factor alpha.
+/// \param [in] a Input matrix A.
+/// \param [in] a_desc Describe the matrix A.
+/// \param [in] beta Scaling factor beta.
+/// \param [in] b Input matrix B.
+/// \param [in] b_desc Describe the matrix B.
+/// \param [out] c Output matrix C.
+/// \param [in] c_desc Describe the matrix C.
+/// \param [in] q_ptr The queue where the routine should be executed.
+inline sycl::event matrix_transform(transform_desc_ptr transform_desc,
+                                    const void *alpha, const void *a,
+                                    matrix_layout_ptr a_desc, const void *beta,
+                                    const void *b, matrix_layout_ptr b_desc,
+                                    void *c, matrix_layout_ptr c_desc,
+                                    ::dpct::cs::queue_ptr q_ptr) {
+  if (!q_ptr)
+    q_ptr = &::dpct::cs::get_default_queue();
+
+  if (transform_desc->_pointer_mode != pointer_mode_t::host) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matrix_transform() "
+        "only supports pointer_mode_t::host as pointer_mode currently.");
+  }
+  if (transform_desc->_scale_type != library_data_t::real_float) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matrix_transform() "
+        "only supports library_data_t::real_float as scale_type currently.");
+  }
+
+  if (alpha != nullptr) {
+    if (1.0f != *reinterpret_cast<const float *>(alpha))
+      throw std::runtime_error(
+          "dpct::blas_gemm::experimental::matrix_transform() does not "
+          "support non-one alpha currently.");
+  }
+
+  if (beta != nullptr) {
+    if (0.0f != *reinterpret_cast<const float *>(beta))
+      throw std::runtime_error(
+          "dpct::blas_gemm::experimental::matrix_transform() does not "
+          "support non-zero beta currently.");
+  }
+
+  if (b != nullptr) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matrix_transform() does not "
+        "support matrix B currently.");
+  }
+
+  if ((a_desc->_type != library_data_t::real_int8 ||
+       c_desc->_type != library_data_t::real_int8) &&
+      (a_desc->_type != library_data_t::real_int32 ||
+       c_desc->_type != library_data_t::real_int32)) {
+    throw std::runtime_error(
+        "dpct::blas_gemm::experimental::matrix_transform() only supports "
+        "combinations of data types: a_type==real_int8&&c_type==real_int8, "
+        "a_type==real_int32&&c_type==real_int32.");
+  }
+
+  return detail::type_dispatch<detail::matrix_transform_impl>(
+      a_desc->_type, q_ptr, a_desc->_rows, a_desc->_cols, a_desc->_ld,
+      a_desc->_order, a, c_desc->_ld, c_desc->_order, c,
+      std::vector<sycl::event>{});
+}
+} // namespace dpct::blas_gemm::experimental
+#endif // __DPCT_BLAS_GEMM_UTILS_HPP__
diff --git a/sycl/include/dpct/blas_utils.hpp b/sycl/include/dpct/blas_utils.hpp
new file mode 100644
index 00000000000..4a58aad3345
--- /dev/null
+++ b/sycl/include/dpct/blas_utils.hpp
@@ -0,0 +1,2599 @@
+//==---- blas_utils.hpp----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_BLAS_UTILS_HPP__
+#define __DPCT_BLAS_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+#include "detail/blas_utils_detail.hpp"
+
+namespace dpct {
+namespace blas {
+
+/// Parameter input/output properties are:
+/// in: input parameter
+/// out: output parameter
+/// in_out: input and output parameter
+enum class parameter_inout_prop { in, out, in_out };
+
+/// parameter_wrapper_t is a class to wrap the parameter to fit the oneMKL
+/// interface.
+/// E.g.,
+/// \code
+/// void foo(sycl::queue q, int *res) {
+///   // Declare the wrapper.
+///   parameter_wrapper_t<std::int64_t, int, parameter_inout_prop::out>
+///       res_wrapper(q, res);
+///   // parameter_wrapper_t::get_ptr() is passed as a parameter. The result is
+///   // saved into the wrapper.
+///   oneapi::mkl::...(q, ..., res_wrapper.get_ptr());
+///   // The action to copy the result in the wrapper to the original variable
+///   // is submitted when destructing the wrapper automatically.
+/// }
+/// \endcode
+/// \tparam target_t Data type to fit oneMKL parameter data type. E.g.,
+/// get_ptr() returns \tparam target_t data type and can be used as oneMKL
+/// parameter with USM memory configuration.
+/// \tparam source_t Data type of the original parameter.
+/// \tparam inout_prop The input/output property of the parameter.
+template <typename target_t, typename source_t, parameter_inout_prop inout_prop>
+class parameter_wrapper_t
+    : public detail::parameter_wrapper_base_t<target_t, source_t> {
+  static_assert(inout_prop == parameter_inout_prop::out &&
+                "Only parameter_inout_prop::out is supported if "
+                "target_t and source_t are not same.");
+  using base_t = detail::parameter_wrapper_base_t<target_t, source_t>;
+  using base_t::_q;
+  using base_t::_source;
+  using base_t::_source_attribute;
+  using base_t::_target;
+
+public:
+  /// Constructor. Malloc the wrapper memory.
+  /// \param q The queue used for internal malloc and memcpy
+  /// \param source The original parameter
+  parameter_wrapper_t(sycl::queue q, source_t *source) : base_t(q, source, 1) {}
+  /// Destructor. Copy back content from wrapper memory to original memory
+  ~parameter_wrapper_t() {
+#ifdef DPCT_USM_LEVEL_NONE
+    if (_source_attribute ==
+        ::dpct::cs::detail::pointer_access_attribute::device_only) {
+      _q.submit([&](sycl::handler &cgh) {
+        auto from_acc = dpct::get_buffer<target_t>(_target)
+                            .template get_access<sycl::access_mode::read>(cgh);
+        auto to_acc = dpct::get_buffer<source_t>(_source)
+                          .template get_access<sycl::access_mode::write>(cgh);
+        cgh.single_task<::dpct::cs::kernel_name<
+            class parameter_wrapper_copyback, target_t, source_t>>(
+            [=]() { to_acc[0] = static_cast<source_t>(from_acc[0]); });
+      });
+    } else {
+      source_t temp =
+          static_cast<source_t>(dpct::get_host_ptr<target_t>(_target)[0]);
+      *_source = temp;
+    }
+#else
+    if (_source_attribute ==
+        ::dpct::cs::detail::pointer_access_attribute::device_only) {
+      _q.template single_task<::dpct::cs::kernel_name<
+          class parameter_wrapper_copyback, target_t, source_t>>(
+          [t = _target, s = _source]() { *s = static_cast<source_t>(*t); });
+    } else {
+      target_t temp;
+      _q.memcpy(&temp, _target, sizeof(target_t)).wait();
+      *_source = static_cast<source_t>(temp);
+    }
+#endif
+  }
+  /// Get the target memory of the wrapper to represent the wrapped variable
+  target_t *get_ptr() { return _target; }
+};
+
+/// parameter_wrapper_t is a class to wrap the parameter to fit the oneMKL
+/// interface.
+/// E.g.,
+/// \code
+/// void foo(sycl::queue q, int *params, int ele_num) {
+///   // Declare the wrapper.
+///   parameter_wrapper_t<float, parameter_inout_prop::in_out> params_wrapper(
+///       q, params, ele_num);
+///   // parameter_wrapper_t::get_ptr() is passed as a parameter. The result is
+///   // saved into the wrapper.
+///   oneapi::mkl::...(q, ..., params_wrapper.get_ptr());
+///   // The action to copy the result in the wrapper to the original variable
+///   // is submitted when destructing the wrapper automatically.
+/// }
+/// \endcode
+/// \tparam target_t Data type to fit oneMKL parameter data type. E.g.,
+/// get_ptr() returns \tparam target_t data type and can be used as oneMKL
+/// parameter with USM memory configuration.
+/// \tparam inout_prop The input/output property of the parameter.
+template <typename target_t, parameter_inout_prop inout_prop>
+class parameter_wrapper_t<target_t, target_t, inout_prop>
+    : public detail::parameter_wrapper_base_t<target_t, target_t> {
+  using base_t = detail::parameter_wrapper_base_t<target_t, target_t>;
+  using base_t::_ele_num;
+  using base_t::_need_free;
+  using base_t::_q;
+  using base_t::_source;
+  using base_t::_source_attribute;
+  using base_t::_target;
+
+public:
+  /// Constructor. Malloc the wrapper memory.
+  /// \param q The queue used for internal malloc and memcpy
+  /// \param source The original parameter
+  /// \param ele_num Element number in \p source
+  parameter_wrapper_t(sycl::queue q, target_t *source, size_t ele_num = 1)
+      : base_t(q, source, ele_num) {
+    if constexpr (inout_prop != parameter_inout_prop::out) {
+      if (_need_free) {
+        ::dpct::cs::memcpy(_q, _target, _source, sizeof(target_t) * _ele_num,
+                           ::dpct::cs::memcpy_direction::automatic);
+      }
+    }
+  }
+
+  /// Constructor. Only vaild for parameter_inout_prop::in.
+  /// \param q The queue used for internal malloc and memcpy
+  /// \param source The original parameter
+  /// \param ele_num Element number in \p source
+  template <parameter_inout_prop prop = inout_prop>
+  parameter_wrapper_t(
+      sycl::queue q, const target_t *source, size_t ele_num = 1,
+      typename std::enable_if<prop == parameter_inout_prop::in>::type * = 0)
+      : parameter_wrapper_t(q, const_cast<target_t *>(source), ele_num) {}
+
+  /// Destructor. Copy back content from wrapper memory to original memory
+  ~parameter_wrapper_t() {
+    if constexpr (inout_prop != parameter_inout_prop::in) {
+      if (_need_free) {
+        sycl::event e = ::dpct::cs::memcpy(
+            _q, _source, _target, sizeof(target_t) * _ele_num,
+            ::dpct::cs::memcpy_direction::automatic);
+        (void)e;
+        if (_source_attribute ==
+            ::dpct::cs::detail::pointer_access_attribute::host_only)
+          e.wait();
+      }
+    }
+  }
+  /// Get the target memory of the wrapper to represent the wrapped variable
+  target_t *get_ptr() { return _target; }
+};
+
+using wrapper_int_to_int64_out =
+    parameter_wrapper_t<std::int64_t, int, parameter_inout_prop::out>;
+using wrapper_int64_out =
+    parameter_wrapper_t<std::int64_t, std::int64_t, parameter_inout_prop::out>;
+using wrapper_float_out =
+    parameter_wrapper_t<float, float, parameter_inout_prop::out>;
+using wrapper_double_out =
+    parameter_wrapper_t<double, double, parameter_inout_prop::out>;
+using wrapper_float2_out =
+    parameter_wrapper_t<sycl::float2, sycl::float2, parameter_inout_prop::out>;
+using wrapper_double2_out = parameter_wrapper_t<sycl::double2, sycl::double2,
+                                                parameter_inout_prop::out>;
+using wrapper_float_inout =
+    parameter_wrapper_t<float, float, parameter_inout_prop::in_out>;
+using wrapper_double_inout =
+    parameter_wrapper_t<double, double, parameter_inout_prop::in_out>;
+using wrapper_float2_inout = parameter_wrapper_t<sycl::float2, sycl::float2,
+                                                 parameter_inout_prop::in_out>;
+using wrapper_double2_inout = parameter_wrapper_t<sycl::double2, sycl::double2,
+                                                  parameter_inout_prop::in_out>;
+using wrapper_float_in =
+    parameter_wrapper_t<float, float, parameter_inout_prop::in>;
+using wrapper_double_in =
+    parameter_wrapper_t<double, double, parameter_inout_prop::in>;
+
+/// Copy matrix data synchronously. The default leading dimension is column.
+/// \param [out] to_ptr A pointer points to the destination location.
+/// \param [in] from_ptr A pointer points to the source location.
+/// \param [in] to_ld The leading dimension the destination matrix.
+/// \param [in] from_ld The leading dimension the source matrix.
+/// \param [in] rows The number of rows of the source matrix.
+/// \param [in] cols The number of columns of the source matrix.
+/// \param [in] elem_size The element size in bytes.
+/// \param [in] direction The direction of the data copy.
+/// \param [in] queue The queue where the routine should be executed.
+/// \param [in] deps A list of events to wait for before starting copy.
+inline void
+matrix_mem_copy_sync(void *to_ptr, const void *from_ptr, std::int64_t to_ld,
+                     std::int64_t from_ld, std::int64_t rows, std::int64_t cols,
+                     std::int64_t elem_size,
+                     ::dpct::cs::memcpy_direction direction =
+                         ::dpct::cs::memcpy_direction::automatic,
+                     sycl::queue &queue = ::dpct::cs::get_default_queue(),
+                     const std::vector<sycl::event> &deps = {}) {
+  if (to_ptr == from_ptr && to_ld == from_ld)
+    return;
+  if (to_ld == from_ld) {
+    size_t copy_size = elem_size * ((cols - 1) * (size_t)to_ld + rows);
+    ::dpct::cs::memcpy(queue, to_ptr, from_ptr, copy_size, direction, deps)
+        .wait();
+  } else {
+    sycl::event::wait(::dpct::cs::memcpy(
+        queue, to_ptr, from_ptr, elem_size * to_ld, elem_size * from_ld,
+        elem_size * rows, cols, direction, deps));
+  }
+}
+/// Copy matrix data asynchronously. The default leading dimension is column.
+/// \return Output event to wait on to ensure copy is complete.
+/// \param [out] to_ptr A pointer points to the destination location.
+/// \param [in] from_ptr A pointer points to the source location.
+/// \param [in] to_ld The leading dimension the destination matrix.
+/// \param [in] from_ld The leading dimension the source matrix.
+/// \param [in] rows The number of rows of the source matrix.
+/// \param [in] cols The number of columns of the source matrix.
+/// \param [in] elem_size The element size in bytes.
+/// \param [in] direction The direction of the data copy.
+/// \param [in] queue The queue where the routine should be executed.
+/// \param [in] deps A list of events to wait for before starting copy.
+inline sycl::event
+matrix_mem_copy_async(void *to_ptr, const void *from_ptr, std::int64_t to_ld,
+                      std::int64_t from_ld, std::int64_t rows,
+                      std::int64_t cols, std::int64_t elem_size,
+                      ::dpct::cs::memcpy_direction direction =
+                          ::dpct::cs::memcpy_direction::automatic,
+                      sycl::queue &queue = ::dpct::cs::get_default_queue(),
+                      const std::vector<sycl::event> &deps = {}) {
+  if (to_ptr == from_ptr && to_ld == from_ld)
+    return sycl::event();
+  if (to_ld == from_ld) {
+    size_t copy_size = elem_size * ((cols - 1) * (size_t)to_ld + rows);
+    return ::dpct::cs::memcpy(queue, to_ptr, from_ptr, copy_size, direction,
+                              deps);
+  }
+  auto events = ::dpct::cs::memcpy(queue, to_ptr, from_ptr, elem_size * to_ld,
+                                   elem_size * from_ld, elem_size * rows, cols,
+                                   direction, deps);
+  return queue.single_task(events, [] {});
+}
+
+/// Copy matrix data. The default leading dimension is column.
+/// \param [out] to_ptr A pointer points to the destination location.
+/// \param [in] from_ptr A pointer points to the source location.
+/// \param [in] to_ld The leading dimension the destination matrix.
+/// \param [in] from_ld The leading dimension the source matrix.
+/// \param [in] rows The number of rows of the source matrix.
+/// \param [in] cols The number of columns of the source matrix.
+/// \param [in] elem_size The element size in bytes.
+/// \param [in] direction The direction of the data copy.
+/// \param [in] queue The queue where the routine should be executed.
+/// \param [in] async If this argument is true, the return of the function
+/// does NOT guarantee the copy is completed.
+inline void
+matrix_mem_copy(void *to_ptr, const void *from_ptr, std::int64_t to_ld,
+                std::int64_t from_ld, std::int64_t rows, std::int64_t cols,
+                std::int64_t elem_size,
+                ::dpct::cs::memcpy_direction direction =
+                    ::dpct::cs::memcpy_direction::automatic,
+                sycl::queue &queue = ::dpct::cs::get_default_queue(),
+                bool async = false) {
+  if (async)
+    matrix_mem_copy_async(to_ptr, from_ptr, to_ld, from_ld, rows, cols,
+                          elem_size, direction, queue);
+  else
+    matrix_mem_copy_sync(to_ptr, from_ptr, to_ld, from_ld, rows, cols,
+                         elem_size, direction, queue);
+}
+
+enum class math_mode : int {
+  mm_default,
+  mm_tf32,
+};
+
+using ::dpct::compute_type;
+
+class descriptor {
+public:
+  void set_queue(::dpct::cs::queue_ptr q_ptr) noexcept { _queue_ptr = q_ptr; }
+  sycl::queue &get_queue() noexcept { return *_queue_ptr; }
+  void set_math_mode(math_mode mm) noexcept { _mm = mm; }
+  math_mode get_math_mode() const noexcept { return _mm; }
+  static inline void set_saved_queue(::dpct::cs::queue_ptr q_ptr) noexcept {
+    _saved_queue_ptr = q_ptr;
+  }
+  static inline sycl::queue &get_saved_queue() noexcept {
+    return *_saved_queue_ptr;
+  }
+
+private:
+  ::dpct::cs::queue_ptr _queue_ptr = &::dpct::cs::get_default_queue();
+  math_mode _mm = math_mode::mm_default;
+  static inline ::dpct::cs::queue_ptr _saved_queue_ptr =
+      &::dpct::cs::get_default_queue();
+};
+
+using descriptor_ptr = descriptor *;
+} // namespace blas
+
+/// Get the value of \p s.
+/// Copy the data to host synchronously, then return the data.
+/// \param [in] p The pointer points the data.
+/// \param [in] q The queue where the memory copy should be executed.
+template <typename T> inline T get_value(const T *s, sycl::queue &q) {
+  return detail::get_value(s, q);
+}
+template <typename T>
+inline std::complex<T> get_value(const sycl::vec<T, 2> *s, sycl::queue &q) {
+  return detail::get_value(s, q);
+}
+
+inline oneapi::mkl::transpose get_transpose(int t) {
+  if (t == 0) {
+    return oneapi::mkl::transpose::nontrans;
+  } else if (t == 1) {
+    return oneapi::mkl::transpose::trans;
+  } else {
+    return oneapi::mkl::transpose::conjtrans;
+  }
+}
+
+/// Computes the LU factorizations of a batch of general matrices.
+/// \param [in] exec_queue The queue where the routine should be executed.
+/// \param [in] n The order of the matrices.
+/// \param [in, out] a Array of pointers to matrices. These matrices will be
+/// overwritten by lower triangulars with unit diagonal elements and upper
+/// triangulars.
+/// \param [in] lda The leading dimension of the matrices.
+/// \param [out] ipiv An array stores the pivot indices. If \p ipiv is nullptr,
+/// non-pivoting LU factorization is computed.
+/// \param [out] info An array stores the error information.
+/// \param [in] batch_size The size of the batch.
+template <typename T>
+inline void getrf_batch_wrapper(sycl::queue &exec_queue, int n, T *a[], int lda,
+                                int *ipiv, int *info, int batch_size) {
+  if (ipiv == nullptr) {
+    detail::getrfnp_batch_wrapper(exec_queue, n, a, lda, info, batch_size);
+    return;
+  }
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  // Set the info array value to 0
+  ::dpct::cs::fill<unsigned char>(exec_queue, info, 0,
+                                  sizeof(int) * batch_size);
+#ifdef DPCT_USM_LEVEL_NONE
+  std::int64_t stride_a = n * lda;
+  std::int64_t stride_ipiv = n;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getrf_batch_scratchpad_size<Ty>(
+          exec_queue, n, n, lda, stride_a, stride_ipiv, batch_size);
+
+  T *a_buffer_ptr;
+  a_buffer_ptr = (T *)::dpct::cs::malloc(stride_a * batch_size * sizeof(T));
+
+  T **host_a = (T **)std::malloc(batch_size * sizeof(T *));
+  dpct_memcpy(host_a, a, batch_size * sizeof(T *));
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    dpct_memcpy(a_buffer_ptr + i * stride_a, host_a[i], n * lda * sizeof(T));
+
+  {
+    sycl::buffer<std::int64_t, 1> ipiv_buf(
+        sycl::range<1>(batch_size * stride_ipiv));
+    sycl::buffer<Ty, 1> scratchpad{sycl::range<1>(scratchpad_size)};
+    auto a_buffer = get_buffer<Ty>(a_buffer_ptr);
+    oneapi::mkl::lapack::getrf_batch(exec_queue, n, n, a_buffer, lda, stride_a,
+                                     ipiv_buf, stride_ipiv, batch_size,
+                                     scratchpad, scratchpad_size);
+
+    auto to_buffer = get_buffer<int>(ipiv);
+    exec_queue.submit([&](sycl::handler &cgh) {
+      auto from_acc = ipiv_buf.get_access<sycl::access_mode::read>(cgh);
+      auto to_acc = to_buffer.get_access<sycl::access_mode::write>(cgh);
+      cgh.parallel_for<
+          ::dpct::cs::kernel_name<class getrf_device_int64_to_int, T>>(
+          sycl::range<2>(batch_size, n), [=](sycl::id<2> id) {
+            to_acc[id.get(0) * n + id.get(1)] =
+                static_cast<int>(from_acc[id.get(0) * stride_ipiv + id.get(1)]);
+          });
+    });
+  }
+
+  // Copy back to the original buffers
+  std::vector<sycl::event> events;
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    events.push_back(::dpct::cs::memcpy(
+        exec_queue, host_a[i], a_buffer_ptr + i * stride_a, n * lda * sizeof(T),
+        ::dpct::cs::memcpy_direction::automatic));
+
+  std::vector<void *> ptrs{host_a};
+  std::thread mem_free_thread(
+      [=](std::vector<void *> pointers_array,
+          std::vector<sycl::event> events_array) {
+        sycl::event::wait(events_array);
+        for (auto p : pointers_array)
+          std::free(p);
+      },
+      ptrs, events);
+  mem_free_thread.detach();
+#else
+  std::int64_t *m_int64 = new std::int64_t;
+  std::int64_t *n_int64 = new std::int64_t;
+  std::int64_t *lda_int64 = new std::int64_t;
+  std::int64_t *group_sizes = new std::int64_t;
+  *m_int64 = n;
+  *n_int64 = n;
+  *lda_int64 = lda;
+  *group_sizes = batch_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getrf_batch_scratchpad_size<Ty>(
+          exec_queue, m_int64, n_int64, lda_int64, 1, group_sizes);
+
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+  std::int64_t *ipiv_int64 =
+      sycl::malloc_device<std::int64_t>(batch_size * n, exec_queue);
+  std::int64_t **ipiv_int64_ptr =
+      sycl::malloc_shared<std::int64_t *>(batch_size, exec_queue);
+  T **a_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  exec_queue.memcpy(a_shared, a, batch_size * sizeof(T *)).wait();
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    ipiv_int64_ptr[i] = ipiv_int64 + n * i;
+
+  oneapi::mkl::lapack::getrf_batch(exec_queue, m_int64, n_int64,
+                                   (Ty **)a_shared, lda_int64, ipiv_int64_ptr,
+                                   1, group_sizes, scratchpad, scratchpad_size);
+
+  sycl::event e = exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.parallel_for<
+        ::dpct::cs::kernel_name<class getrf_device_int64_to_int, T>>(
+        sycl::range<1>(batch_size * n), [=](sycl::id<1> idx) {
+          ipiv[idx] = static_cast<int>(ipiv_int64[idx]);
+        });
+  });
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] {
+      delete m_int64;
+      delete n_int64;
+      delete lda_int64;
+      delete group_sizes;
+    });
+  });
+  std::vector<void *> ptrs{scratchpad, ipiv_int64, ipiv_int64_ptr, a_shared};
+  ::dpct::cs::enqueue_free(ptrs, {e}, exec_queue);
+#endif
+}
+
+/// Solves a system of linear equations with a batch of LU-factored square
+/// coefficient matrices, with multiple right-hand sides.
+/// \param [in] exec_queue The queue where the routine should be executed.
+/// \param [in] trans Indicates the form of the linear equations.
+/// \param [in] n The order of the matrices.
+/// \param [in] nrhs The number of right hand sides.
+/// \param [in] a Array of pointers to matrices.
+/// \param [in] lda The leading dimension of the matrices in \p a.
+/// \param [in] ipiv An array stores the pivots.
+/// \param [in, out] b Array of pointers to matrices, whose columns are
+/// the right-hand sides for the systems of equations.
+/// \param [in] ldb The leading dimension of the matrices in \p b.
+/// \param [out] info A value stores the error information.
+/// \param [in] batch_size The size of the batch.
+template <typename T>
+inline void getrs_batch_wrapper(sycl::queue &exec_queue,
+                                oneapi::mkl::transpose trans, int n, int nrhs,
+                                const T *a[], int lda, const int *ipiv, T *b[],
+                                int ldb, int *info, int batch_size) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  // Set the info value to 0
+  *info = 0;
+#ifdef DPCT_USM_LEVEL_NONE
+  std::int64_t stride_a = n * lda;
+  std::int64_t stride_b = nrhs * ldb;
+  std::int64_t stride_ipiv = n;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getrs_batch_scratchpad_size<Ty>(
+          exec_queue, trans, n, nrhs, lda, stride_a, stride_ipiv, ldb, stride_b,
+          batch_size);
+
+  T *a_buffer_ptr, *b_buffer_ptr;
+  a_buffer_ptr = (T *)::dpct::cs::malloc(stride_a * batch_size * sizeof(T));
+  b_buffer_ptr = (T *)::dpct::cs::malloc(stride_b * batch_size * sizeof(T));
+
+  T **host_a = (T **)std::malloc(batch_size * sizeof(T *));
+  T **host_b = (T **)std::malloc(batch_size * sizeof(T *));
+  dpct_memcpy(host_a, a, batch_size * sizeof(T *));
+  dpct_memcpy(host_b, b, batch_size * sizeof(T *));
+  for (std::int64_t i = 0; i < batch_size; ++i) {
+    dpct_memcpy(a_buffer_ptr + i * stride_a, host_a[i], n * lda * sizeof(T));
+    dpct_memcpy(b_buffer_ptr + i * stride_b, host_b[i], nrhs * ldb * sizeof(T));
+  }
+
+  {
+    auto a_buffer = get_buffer<Ty>(a_buffer_ptr);
+    auto b_buffer = get_buffer<Ty>(b_buffer_ptr);
+    sycl::buffer<Ty, 1> scratchpad{sycl::range<1>(scratchpad_size)};
+    sycl::buffer<std::int64_t, 1> ipiv_buf(
+        sycl::range<1>(batch_size * stride_ipiv));
+    auto from_buf = get_buffer<int>(ipiv);
+    exec_queue.submit([&](sycl::handler &cgh) {
+      auto from_acc = from_buf.get_access<sycl::access_mode::read>(cgh);
+      auto to_acc = ipiv_buf.get_access<sycl::access_mode::write>(cgh);
+      cgh.parallel_for<
+          ::dpct::cs::kernel_name<class getrs_device_int64_to_int, T>>(
+          sycl::range<2>(batch_size, n), [=](sycl::id<2> id) {
+            to_acc[id.get(0) * stride_ipiv + id.get(1)] =
+                static_cast<std::int64_t>(from_acc[id.get(0) * n + id.get(1)]);
+          });
+    });
+
+    oneapi::mkl::lapack::getrs_batch(exec_queue, trans, n, nrhs, a_buffer, lda,
+                                     stride_a, ipiv_buf, stride_ipiv, b_buffer,
+                                     ldb, stride_b, batch_size, scratchpad,
+                                     scratchpad_size);
+  }
+
+  // Copy back to the original buffers
+  std::vector<sycl::event> events;
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    events.push_back(::dpct::cs::memcpy(
+        exec_queue, host_b[i], b_buffer_ptr + i * stride_b,
+        nrhs * ldb * sizeof(T), ::dpct::cs::memcpy_direction::automatic));
+  std::vector<void *> ptrs{host_a, host_b};
+  std::thread mem_free_thread(
+      [=](std::vector<void *> pointers_array,
+          std::vector<sycl::event> events_array) {
+        sycl::event::wait(events_array);
+        for (auto p : pointers_array)
+          std::free(p);
+      },
+      ptrs, events);
+  mem_free_thread.detach();
+#else
+  std::int64_t *n_int64 = new std::int64_t;
+  std::int64_t *nrhs_int64 = new std::int64_t;
+  std::int64_t *lda_int64 = new std::int64_t;
+  std::int64_t *ldb_int64 = new std::int64_t;
+  std::int64_t *group_sizes = new std::int64_t;
+  oneapi::mkl::transpose *trans_array = new oneapi::mkl::transpose;
+  *n_int64 = n;
+  *nrhs_int64 = nrhs;
+  *lda_int64 = lda;
+  *ldb_int64 = ldb;
+  *group_sizes = batch_size;
+  *trans_array = trans;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getrs_batch_scratchpad_size<Ty>(
+          exec_queue, trans_array, n_int64, nrhs_int64, lda_int64, ldb_int64, 1,
+          group_sizes);
+
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+  std::int64_t *ipiv_int64 =
+      sycl::malloc_device<std::int64_t>(batch_size * n, exec_queue);
+  std::int64_t **ipiv_int64_ptr =
+      sycl::malloc_shared<std::int64_t *>(batch_size, exec_queue);
+  T **a_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  T **b_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  exec_queue.memcpy(a_shared, a, batch_size * sizeof(T *));
+  exec_queue.memcpy(b_shared, b, batch_size * sizeof(T *));
+
+  exec_queue
+      .submit([&](sycl::handler &cgh) {
+        cgh.parallel_for<
+            ::dpct::cs::kernel_name<class getrs_device_int64_to_int, T>>(
+            sycl::range<1>(batch_size * n), [=](sycl::id<1> idx) {
+              ipiv_int64[idx] = static_cast<std::int64_t>(ipiv[idx]);
+            });
+      })
+      .wait();
+
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    ipiv_int64_ptr[i] = ipiv_int64 + n * i;
+
+  sycl::event e = oneapi::mkl::lapack::getrs_batch(
+      exec_queue, trans_array, n_int64, nrhs_int64, (Ty **)a_shared, lda_int64,
+      ipiv_int64_ptr, (Ty **)b_shared, ldb_int64, 1, group_sizes, scratchpad,
+      scratchpad_size);
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] {
+      delete n_int64;
+      delete nrhs_int64;
+      delete lda_int64;
+      delete ldb_int64;
+      delete group_sizes;
+      delete trans_array;
+    });
+  });
+  std::vector<void *> ptrs{scratchpad, ipiv_int64_ptr, ipiv_int64, a_shared,
+                           b_shared};
+  ::dpct::cs::enqueue_free(ptrs, {e}, exec_queue);
+#endif
+}
+
+/// Computes the inverses of a batch of LU-factored matrices.
+/// \param [in] exec_queue The queue where the routine should be executed.
+/// \param [in] n The order of the matrices.
+/// \param [in] a Array of pointers to matrices.
+/// \param [in] lda The leading dimension of the matrices in \p a.
+/// \param [in] ipiv An array stores the pivots.
+/// \param [out] b Array of pointers to inverse matrices.
+/// \param [in] ldb The leading dimension of the matrices in \p b.
+/// \param [out] info An array stores the error information.
+/// \param [in] batch_size The size of the batch.
+template <typename T>
+inline void getri_batch_wrapper(sycl::queue &exec_queue, int n, const T *a[],
+                                int lda, int *ipiv, T *b[], int ldb, int *info,
+                                int batch_size) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  // Set the info array value to 0
+  ::dpct::cs::fill<unsigned char>(exec_queue, info, 0,
+                                  sizeof(int) * batch_size);
+#ifdef DPCT_USM_LEVEL_NONE
+  std::int64_t stride_b = n * ldb;
+  std::int64_t stride_ipiv = n;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getri_batch_scratchpad_size<Ty>(
+          exec_queue, n, ldb, stride_b, stride_ipiv, batch_size);
+
+  T *b_buffer_ptr;
+  b_buffer_ptr = (T *)::dpct::cs::malloc(stride_b * batch_size * sizeof(T));
+
+  T **host_a = (T **)std::malloc(batch_size * sizeof(T *));
+  T **host_b = (T **)std::malloc(batch_size * sizeof(T *));
+  dpct_memcpy(host_a, a, batch_size * sizeof(T *));
+  dpct_memcpy(host_b, b, batch_size * sizeof(T *));
+
+  for (std::int64_t i = 0; i < batch_size; ++i) {
+    // Need to create a copy of input matrices "a" to keep them unchanged.
+    // Matrices "b" (copy of matrices "a") will be used as input and output
+    // parameter in oneapi::mkl::lapack::getri_batch call.
+    blas::matrix_mem_copy(b_buffer_ptr + i * stride_b, host_a[i], ldb, lda, n,
+                          n, sizeof(T), dpct::device_to_device, exec_queue);
+  }
+
+  {
+    auto b_buffer = get_buffer<Ty>(b_buffer_ptr);
+    sycl::buffer<Ty, 1> scratchpad{sycl::range<1>(scratchpad_size)};
+    sycl::buffer<std::int64_t, 1> ipiv_buf(
+        sycl::range<1>(batch_size * stride_ipiv));
+    auto from_buf = get_buffer<int>(ipiv);
+    exec_queue.submit([&](sycl::handler &cgh) {
+      auto from_acc = from_buf.get_access<sycl::access_mode::read>(cgh);
+      auto to_acc = ipiv_buf.get_access<sycl::access_mode::write>(cgh);
+      cgh.parallel_for<
+          ::dpct::cs::kernel_name<class getri_device_int64_to_int, T>>(
+          sycl::range<2>(batch_size, n), [=](sycl::id<2> id) {
+            to_acc[id.get(0) * stride_ipiv + id.get(1)] =
+                static_cast<std::int64_t>(from_acc[id.get(0) * n + id.get(1)]);
+          });
+    });
+
+    oneapi::mkl::lapack::getri_batch(exec_queue, n, b_buffer, ldb, stride_b,
+                                     ipiv_buf, stride_ipiv, batch_size,
+                                     scratchpad, scratchpad_size);
+  }
+
+  // Copy back to the original buffers
+  std::vector<sycl::event> events;
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    events.push_back(::dpct::cs::memcpy(
+        exec_queue, host_b[i], b_buffer_ptr + i * stride_b, n * ldb * sizeof(T),
+        ::dpct::cs::memcpy_direction::automatic));
+  std::vector<void *> ptrs{host_a, host_b};
+  std::thread mem_free_thread(
+      [=](std::vector<void *> pointers_array,
+          std::vector<sycl::event> events_array) {
+        sycl::event::wait(events_array);
+        for (auto p : pointers_array)
+          std::free(p);
+      },
+      ptrs, events);
+  mem_free_thread.detach();
+#else
+  std::int64_t *n_int64 = new std::int64_t;
+  std::int64_t *ldb_int64 = new std::int64_t;
+  std::int64_t *group_sizes = new std::int64_t;
+  *n_int64 = n;
+  *ldb_int64 = ldb;
+  *group_sizes = batch_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getri_batch_scratchpad_size<Ty>(
+          exec_queue, n_int64, ldb_int64, 1, group_sizes);
+
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+  std::int64_t *ipiv_int64 =
+      sycl::malloc_device<std::int64_t>(batch_size * n, exec_queue);
+  std::int64_t **ipiv_int64_ptr =
+      sycl::malloc_shared<std::int64_t *>(batch_size, exec_queue);
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.parallel_for<
+        ::dpct::cs::kernel_name<class getri_device_int64_to_int, T>>(
+        sycl::range<1>(batch_size * n), [=](sycl::id<1> idx) {
+          ipiv_int64[idx] = static_cast<std::int64_t>(ipiv[idx]);
+        });
+  });
+
+  T **a_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  T **b_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  exec_queue.memcpy(a_shared, a, batch_size * sizeof(T *));
+  exec_queue.memcpy(b_shared, b, batch_size * sizeof(T *)).wait();
+  for (std::int64_t i = 0; i < batch_size; ++i) {
+    ipiv_int64_ptr[i] = ipiv_int64 + n * i;
+    // Need to create a copy of input matrices "a" to keep them unchanged.
+    // Matrices "b" (copy of matrices "a") will be used as input and output
+    // parameter in oneapi::mkl::lapack::getri_batch call.
+    blas::matrix_mem_copy(b_shared[i], a_shared[i], ldb, lda, n, n, sizeof(T),
+                          ::dpct::cs::memcpy_direction::device_to_device,
+                          exec_queue);
+  }
+
+  sycl::event e = oneapi::mkl::lapack::getri_batch(
+      exec_queue, n_int64, (Ty **)b_shared, ldb_int64, ipiv_int64_ptr, 1,
+      group_sizes, scratchpad, scratchpad_size);
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] {
+      delete n_int64;
+      delete ldb_int64;
+      delete group_sizes;
+    });
+  });
+  std::vector<void *> ptrs{scratchpad, ipiv_int64_ptr, ipiv_int64, a_shared,
+                           b_shared};
+  ::dpct::cs::enqueue_free(ptrs, {e}, exec_queue);
+#endif
+}
+
+/// Computes the QR factorizations of a batch of general matrices.
+/// \param [in] exec_queue The queue where the routine should be executed.
+/// \param [in] m The number of rows in the matrices.
+/// \param [in] n The number of columns in the matrices.
+/// \param [in, out] a Array of pointers to matrices. These
+/// matrices will be overwritten by the factorization data.
+/// \param [in] lda The leading dimension of the matrices in \p a.
+/// \param [out] tau An array stores the scalars.
+/// \param [out] info A value stores the error information.
+/// \param [in] batch_size The size of the batch.
+template <typename T>
+inline void geqrf_batch_wrapper(sycl::queue exec_queue, int m, int n, T *a[],
+                                int lda, T *tau[], int *info, int batch_size) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  // Set the info value to 0
+  *info = 0;
+#ifdef DPCT_USM_LEVEL_NONE
+  std::int64_t stride_a = n * lda;
+  std::int64_t stride_tau = (std::max)(1, (std::min)(m, n));
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::geqrf_batch_scratchpad_size<Ty>(
+          exec_queue, m, n, lda, stride_a, stride_tau, batch_size);
+
+  T *a_buffer_ptr, *tau_buffer_ptr;
+  a_buffer_ptr = (T *)::dpct::cs::malloc(stride_a * batch_size * sizeof(T));
+  tau_buffer_ptr = (T *)::dpct::cs::malloc(stride_tau * batch_size * sizeof(T));
+
+  T **host_a = (T **)std::malloc(batch_size * sizeof(T *));
+  T **host_tau = (T **)std::malloc(batch_size * sizeof(T *));
+  dpct_memcpy(host_a, a, batch_size * sizeof(T *));
+  dpct_memcpy(host_tau, tau, batch_size * sizeof(T *));
+
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    dpct_memcpy(a_buffer_ptr + i * stride_a, host_a[i], n * lda * sizeof(T));
+  {
+    auto a_buffer = get_buffer<Ty>(a_buffer_ptr);
+    auto tau_buffer = get_buffer<Ty>(tau_buffer_ptr);
+    sycl::buffer<Ty, 1> scratchpad{sycl::range<1>(scratchpad_size)};
+    oneapi::mkl::lapack::geqrf_batch(exec_queue, m, n, a_buffer, lda, stride_a,
+                                     tau_buffer, stride_tau, batch_size,
+                                     scratchpad, scratchpad_size);
+  }
+
+  // Copy back to the original buffers
+  std::vector<sycl::event> events_a;
+  std::vector<sycl::event> events_tau;
+  for (std::int64_t i = 0; i < batch_size; ++i) {
+    events_a.push_back(::dpct::cs::memcpy(
+        exec_queue, host_a[i], a_buffer_ptr + i * stride_a, n * lda * sizeof(T),
+        ::dpct::cs::memcpy_direction::automatic));
+    events_tau.push_back(::dpct::cs::memcpy(
+        exec_queue, host_tau[i], tau_buffer_ptr + i * stride_tau,
+        (std::max)(1, (std::min)(m, n)) * sizeof(T),
+        ::dpct::cs::memcpy_direction::automatic));
+  }
+  std::vector<void *> ptr_a{host_a};
+  std::vector<void *> ptr_tau{host_tau};
+  std::thread mem_free_thread_a(
+      [=](std::vector<void *> pointers_array,
+          std::vector<sycl::event> events_array) {
+        sycl::event::wait(events_array);
+        for (auto p : pointers_array)
+          std::free(p);
+      },
+      ptr_a, events_a);
+  std::thread mem_free_thread_tau(
+      [=](std::vector<void *> pointers_array,
+          std::vector<sycl::event> events_array) {
+        sycl::event::wait(events_array);
+        for (auto p : pointers_array)
+          std::free(p);
+      },
+      ptr_tau, events_tau);
+  mem_free_thread_a.detach();
+  mem_free_thread_tau.detach();
+#else
+  std::int64_t *m_int64 = new std::int64_t;
+  std::int64_t *n_int64 = new std::int64_t;
+  std::int64_t *lda_int64 = new std::int64_t;
+  std::int64_t *group_sizes = new std::int64_t;
+  *m_int64 = n;
+  *n_int64 = n;
+  *lda_int64 = lda;
+  *group_sizes = batch_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::geqrf_batch_scratchpad_size<Ty>(
+          exec_queue, m_int64, n_int64, lda_int64, 1, group_sizes);
+
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+  T **a_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  T **tau_shared = sycl::malloc_shared<T *>(batch_size, exec_queue);
+  exec_queue.memcpy(a_shared, a, batch_size * sizeof(T *));
+  exec_queue.memcpy(tau_shared, tau, batch_size * sizeof(T *)).wait();
+
+  sycl::event e = oneapi::mkl::lapack::geqrf_batch(
+      exec_queue, m_int64, n_int64, (Ty **)a_shared, lda_int64,
+      (Ty **)tau_shared, 1, group_sizes, scratchpad, scratchpad_size);
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] {
+      delete m_int64;
+      delete n_int64;
+      delete lda_int64;
+      delete group_sizes;
+    });
+  });
+  std::vector<void *> ptrs{scratchpad, a_shared, tau_shared};
+  ::dpct::cs::enqueue_free(ptrs, {e}, exec_queue);
+#endif
+}
+
+namespace blas {
+#ifdef __INTEL_MKL__
+template <typename T>
+inline oneapi::mkl::blas::compute_mode
+deduce_compute_mode(std::optional<compute_type> ct, math_mode mm) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  if (ct) {
+    switch (ct.value()) {
+    case compute_type::f16_standard:
+    case compute_type::f32_standard:
+    case compute_type::f64_standard:
+    case compute_type::i32_standard:
+      return oneapi::mkl::blas::compute_mode::standard;
+    case compute_type::f32:
+      if constexpr (std::is_same_v<Ty, std::complex<float>> ||
+                    std::is_same_v<Ty, std::complex<double>>)
+        return oneapi::mkl::blas::compute_mode::complex_3m;
+      break;
+    case compute_type::f32_fast_bf16:
+      return oneapi::mkl::blas::compute_mode::float_to_bf16;
+    case compute_type::f32_fast_tf32:
+      return oneapi::mkl::blas::compute_mode::float_to_tf32;
+    default:
+      [[fallthrough]];
+    }
+  }
+  if (mm == math_mode::mm_tf32)
+    return oneapi::mkl::blas::compute_mode::float_to_tf32;
+  return oneapi::mkl::blas::compute_mode::unset;
+}
+
+inline oneapi::mkl::blas::compute_mode
+deduce_compute_mode(std::optional<compute_type> ct, math_mode mm,
+                    bool is_complex) {
+  if (is_complex)
+    return deduce_compute_mode<std::complex<float>>(ct, mm);
+  return deduce_compute_mode<float>(ct, mm);
+}
+#endif
+
+/// Computes matrix-matrix product with general matrices.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] ct Compute type.
+inline void gemm(descriptor_ptr desc_ptr, oneapi::mkl::transpose a_trans,
+                 oneapi::mkl::transpose b_trans, std::int64_t m, std::int64_t n,
+                 std::int64_t k, const void *alpha, const void *a,
+                 library_data_t a_type, std::int64_t lda, const void *b,
+                 library_data_t b_type, std::int64_t ldb, const void *beta,
+                 void *c, library_data_t c_type, std::int64_t ldc,
+                 std::variant<compute_type, library_data_t> ct) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  sycl::queue q = desc_ptr->get_queue();
+  oneapi::mkl::blas::compute_mode cm = oneapi::mkl::blas::compute_mode::unset;
+  library_data_t scaling_type;
+  if (auto ct_p = std::get_if<compute_type>(&ct)) {
+    cm = deduce_compute_mode(*ct_p, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+    scaling_type = detail::compute_type_to_library_data_t(*ct_p);
+  } else {
+    cm = deduce_compute_mode(std::nullopt, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+    scaling_type = std::get<library_data_t>(ct);
+  }
+
+  if (scaling_type == library_data_t::real_float &&
+      c_type == library_data_t::complex_float) {
+    scaling_type = library_data_t::complex_float;
+  } else if (scaling_type == library_data_t::real_double &&
+             c_type == library_data_t::complex_double) {
+    scaling_type = library_data_t::complex_double;
+  }
+
+  std::uint64_t key = dpct::detail::get_type_combination_id(
+      a_type, b_type, c_type, scaling_type);
+  switch (key) {
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_float, library_data_t::real_float,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_impl<float, float, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_double, library_data_t::real_double,
+      library_data_t::real_double, library_data_t::real_double): {
+    dpct::detail::gemm_impl<double, double, double, double>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_float, library_data_t::complex_float,
+      library_data_t::complex_float, library_data_t::complex_float): {
+    dpct::detail::gemm_impl<std::complex<float>, std::complex<float>,
+                            std::complex<float>, std::complex<float>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double,
+      library_data_t::complex_double, library_data_t::complex_double): {
+    dpct::detail::gemm_impl<std::complex<double>, std::complex<double>,
+                            std::complex<double>, std::complex<double>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_half): {
+    dpct::detail::gemm_impl<sycl::half, sycl::half, sycl::half, sycl::half>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16, float,
+                            float>(q, a_trans, b_trans, m, n, k, alpha, a, lda,
+                                   b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_impl<sycl::half, sycl::half, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_float): {
+    float alpha_value =
+        dpct::get_value(reinterpret_cast<const float *>(alpha), q);
+    float beta_value =
+        dpct::get_value(reinterpret_cast<const float *>(beta), q);
+    sycl::half alpha_half(alpha_value);
+    sycl::half beta_half(beta_value);
+    dpct::detail::gemm_impl<sycl::half, sycl::half, sycl::half, sycl::half>(
+        q, a_trans, b_trans, m, n, k, &alpha_half, a, lda, b, ldb, &beta_half,
+        c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_impl<std::int8_t, std::int8_t, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_bfloat16, library_data_t::real_float): {
+    dpct::detail::gemm_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                            oneapi::mkl::bfloat16, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_int32, library_data_t::real_int32): {
+    float alpha_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(alpha), q);
+    float beta_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(beta), q);
+    dpct::detail::gemm_impl<std::int8_t, std::int8_t, std::int32_t, float>(
+        q, a_trans, b_trans, m, n, k, &alpha_float, a, lda, b, ldb, &beta_float,
+        c, ldc, cm);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+#endif
+}
+
+/// Computes a batch of matrix-matrix product with general matrices.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] batch_size Specifies the number of matrix multiply operations to perform.
+/// \param [in] scaling_type Data type of the scaling factors.
+/// \param [in] ct Compute type.
+inline void gemm_batch(descriptor_ptr desc_ptr, oneapi::mkl::transpose a_trans,
+                       oneapi::mkl::transpose b_trans, std::int64_t m,
+                       std::int64_t n, std::int64_t k, const void *alpha,
+                       const void *a[], library_data_t a_type, std::int64_t lda,
+                       const void *b[], library_data_t b_type, std::int64_t ldb,
+                       const void *beta, void *c[], library_data_t c_type,
+                       std::int64_t ldc, std::int64_t batch_size,
+                       std::variant<compute_type, library_data_t> ct) {
+#ifdef DPCT_USM_LEVEL_NONE
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  oneapi::mkl::blas::compute_mode cm = oneapi::mkl::blas::compute_mode::unset;
+#endif
+  library_data_t scaling_type;
+  if (auto ct_p = std::get_if<compute_type>(&ct)) {
+#ifdef __INTEL_MKL__
+    cm = deduce_compute_mode(*ct_p, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+#endif
+    scaling_type = detail::compute_type_to_library_data_t(*ct_p);
+  } else {
+#ifdef __INTEL_MKL__
+    cm = deduce_compute_mode(std::nullopt, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+#endif
+    scaling_type = std::get<library_data_t>(ct);
+  }
+
+  if (scaling_type == library_data_t::real_float &&
+      c_type == library_data_t::complex_float) {
+    scaling_type = library_data_t::complex_float;
+  } else if (scaling_type == library_data_t::real_double &&
+             c_type == library_data_t::complex_double) {
+    scaling_type = library_data_t::complex_double;
+  }
+
+  std::uint64_t key = dpct::detail::get_type_combination_id(
+      a_type, b_type, c_type, scaling_type);
+  switch (key) {
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_float, library_data_t::real_float,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<float, float, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_double, library_data_t::real_double,
+      library_data_t::real_double, library_data_t::real_double): {
+    dpct::detail::gemm_batch_impl<double, double, double, double>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_float, library_data_t::complex_float,
+      library_data_t::complex_float, library_data_t::complex_float): {
+    dpct::detail::gemm_batch_impl<std::complex<float>, std::complex<float>,
+                                  std::complex<float>, std::complex<float>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double,
+      library_data_t::complex_double, library_data_t::complex_double): {
+    dpct::detail::gemm_batch_impl<std::complex<double>, std::complex<double>,
+                                  std::complex<double>, std::complex<double>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_half): {
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, sycl::half,
+                                  sycl::half>(q, a_trans, b_trans, m, n, k,
+                                              alpha, a, lda, b, ldb, beta, c,
+                                              ldc, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_bfloat16, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                                  oneapi::mkl::bfloat16, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                                  float, float>(q, a_trans, b_trans, m, n, k,
+                                                alpha, a, lda, b, ldb, beta, c,
+                                                ldc, batch_size, cm);
+    break;
+  }
+#endif
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_int32, library_data_t::real_int32): {
+    float alpha_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(alpha), q);
+    float beta_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(beta), q);
+    dpct::detail::gemm_batch_impl<std::int8_t, std::int8_t, std::int32_t,
+                                  float>(
+        q, a_trans, b_trans, m, n, k, &alpha_float, a, lda, b, ldb, &beta_float,
+        c, ldc, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<std::int8_t, std::int8_t, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_float): {
+    float alpha_value =
+        dpct::get_value(reinterpret_cast<const float *>(alpha), q);
+    float beta_value =
+        dpct::get_value(reinterpret_cast<const float *>(beta), q);
+    sycl::half alpha_half(alpha_value);
+    sycl::half beta_half(beta_value);
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, sycl::half,
+                                  sycl::half>(
+        q, a_trans, b_trans, m, n, k, &alpha_half, a, lda, b, ldb, &beta_half,
+        c, ldc, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+#endif
+}
+
+/// Computes a batch of matrix-matrix product with general matrices.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] stride_a Stride between the different A matrices.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] stride_b Stride between the different B matrices.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] stride_c Stride between the different C matrices.
+/// \param [in] batch_size Specifies the number of matrix multiply operations to perform.
+/// \param [in] ct Compute type.
+inline void gemm_batch(descriptor_ptr desc_ptr, oneapi::mkl::transpose a_trans,
+                       oneapi::mkl::transpose b_trans, std::int64_t m,
+                       std::int64_t n, std::int64_t k, const void *alpha,
+                       const void *a, library_data_t a_type, std::int64_t lda,
+                       long long int stride_a, const void *b,
+                       library_data_t b_type, std::int64_t ldb,
+                       long long int stride_b, const void *beta, void *c,
+                       library_data_t c_type, std::int64_t ldc,
+                       long long int stride_c, std::int64_t batch_size,
+                       std::variant<compute_type, library_data_t> ct) {
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  oneapi::mkl::blas::compute_mode cm = oneapi::mkl::blas::compute_mode::unset;
+#endif
+  library_data_t scaling_type;
+  if (auto ct_p = std::get_if<compute_type>(&ct)) {
+#ifdef __INTEL_MKL__
+    cm = deduce_compute_mode(*ct_p, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+#endif
+    scaling_type = detail::compute_type_to_library_data_t(*ct_p);
+  } else {
+#ifdef __INTEL_MKL__
+    cm = deduce_compute_mode(std::nullopt, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+#endif
+    scaling_type = std::get<library_data_t>(ct);
+  }
+
+  if (scaling_type == library_data_t::real_float &&
+      c_type == library_data_t::complex_float) {
+    scaling_type = library_data_t::complex_float;
+  } else if (scaling_type == library_data_t::real_double &&
+             c_type == library_data_t::complex_double) {
+    scaling_type = library_data_t::complex_double;
+  }
+
+  std::uint64_t key = dpct::detail::get_type_combination_id(
+      a_type, b_type, c_type, scaling_type);
+  switch (key) {
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_float, library_data_t::real_float,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<float, float, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_double, library_data_t::real_double,
+      library_data_t::real_double, library_data_t::real_double): {
+    dpct::detail::gemm_batch_impl<double, double, double, double>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_float, library_data_t::complex_float,
+      library_data_t::complex_float, library_data_t::complex_float): {
+    dpct::detail::gemm_batch_impl<std::complex<float>, std::complex<float>,
+                                  std::complex<float>, std::complex<float>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double,
+      library_data_t::complex_double, library_data_t::complex_double): {
+    dpct::detail::gemm_batch_impl<std::complex<double>, std::complex<double>,
+                                  std::complex<double>, std::complex<double>>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_half): {
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, sycl::half,
+                                  sycl::half>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_bfloat16, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                                  oneapi::mkl::bfloat16, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size, cm);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_bfloat16, library_data_t::real_bfloat16,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                                  float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size, cm);
+    break;
+  }
+#endif
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_int32, library_data_t::real_int32): {
+    float alpha_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(alpha), q);
+    float beta_float =
+        dpct::get_value(reinterpret_cast<const std::int32_t *>(beta), q);
+    dpct::detail::gemm_batch_impl<std::int8_t, std::int8_t, std::int32_t,
+                                  float>(
+        q, a_trans, b_trans, m, n, k, &alpha_float, a, lda, stride_a, b, ldb,
+        stride_b, &beta_float, c, ldc, stride_c,
+        batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_int8, library_data_t::real_int8,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<std::int8_t, std::int8_t, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_float, library_data_t::real_float): {
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, float, float>(
+        q, a_trans, b_trans, m, n, k, alpha, a, lda, stride_a, b, ldb, stride_b,
+        beta, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(
+      library_data_t::real_half, library_data_t::real_half,
+      library_data_t::real_half, library_data_t::real_float): {
+    float alpha_value =
+        dpct::get_value(reinterpret_cast<const float *>(alpha), q);
+    float beta_value =
+        dpct::get_value(reinterpret_cast<const float *>(beta), q);
+    sycl::half alpha_half(alpha_value);
+    sycl::half beta_half(beta_value);
+    dpct::detail::gemm_batch_impl<sycl::half, sycl::half, sycl::half,
+                                  sycl::half>(
+        q, a_trans, b_trans, m, n, k, &alpha_half, a, lda, stride_a, b, ldb,
+        stride_b, &beta_half, c, ldc, stride_c, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Performs a symmetric/hermitian rank-k update.
+/// \tparam is_hermitian True means current matrix is hermitian.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] uplo Specifies whether matrix c is upper or lower triangular.
+/// \param [in] trans Specifies op(a), the transposition operation applied to
+/// matrix a.
+/// \param [in] n Number of rows and columns of matrix c.
+/// \param [in] k Number of columns of matrix op(a).
+/// \param [in] alpha Scaling factor for the rank-k update.
+/// \param [in] a Input matrix a.
+/// \param [in] a_type Data type of the matrix a.
+/// \param [in] lda Leading dimension of the matrix a.
+/// \param [in] beta Scaling factor for the rank-k update.
+/// \param [in, out] c Input/Output matrix c.
+/// \param [in] c_type Data type of the matrix c.
+/// \param [in] ldc Leading dimension of the matrix c.
+/// \param [in] ct Compute type.
+template <bool is_hermitian>
+inline void syherk(descriptor_ptr desc_ptr, oneapi::mkl::uplo uplo,
+                   oneapi::mkl::transpose trans, std::int64_t n, std::int64_t k,
+                   const void *alpha, const void *a, library_data_t a_type,
+                   std::int64_t lda, const void *beta, void *c,
+                   library_data_t c_type, std::int64_t ldc,
+                   std::variant<compute_type, library_data_t> ct) {
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  oneapi::mkl::blas::compute_mode cm = oneapi::mkl::blas::compute_mode::unset;
+  if (auto ct_p = std::get_if<compute_type>(&ct)) {
+    cm = deduce_compute_mode(*ct_p, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+  } else {
+    cm = deduce_compute_mode(std::nullopt, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+  }
+#endif
+  std::uint64_t key = dpct::detail::get_type_combination_id(a_type, c_type);
+  if (!is_hermitian &&
+      dpct::detail::get_type_combination_id(
+          library_data_t::real_float, library_data_t::real_float) == key) {
+    dpct::detail::syherk_impl<false, float>(q, uplo, trans, n, k, alpha, a, lda,
+                                            beta, c, ldc DPCT_COMPUTE_MODE_ARG);
+  } else if (!is_hermitian && dpct::detail::get_type_combination_id(
+                                  library_data_t::real_double,
+                                  library_data_t::real_double) == key) {
+    dpct::detail::syherk_impl<false, double>(q, uplo, trans, n, k, alpha, a,
+                                             lda, beta, c,
+                                             ldc DPCT_COMPUTE_MODE_ARG);
+  } else if (dpct::detail::get_type_combination_id(
+                 library_data_t::complex_float,
+                 library_data_t::complex_float) == key) {
+    dpct::detail::syherk_impl<is_hermitian, std::complex<float>>(
+        q, uplo, trans, n, k, alpha, a, lda, beta, c,
+        ldc DPCT_COMPUTE_MODE_ARG);
+  } else if (dpct::detail::get_type_combination_id(
+                 library_data_t::complex_double,
+                 library_data_t::complex_double) == key) {
+    dpct::detail::syherk_impl<is_hermitian, std::complex<double>>(
+        q, uplo, trans, n, k, alpha, a, lda, beta, c,
+        ldc DPCT_COMPUTE_MODE_ARG);
+  } else {
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// This routines perform a special rank-k update of a symmetric matrix C by
+/// general matrices A and B.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] uplo Specifies whether C's data is stored in its upper or lower triangle.
+/// \param [in] trans Specifies the operation to apply.
+/// \param [in] n The number of rows and columns in C.
+/// \param [in] k The inner dimension of matrix multiplications.
+/// \param [in] alpha Scaling factor for the rank-k update.
+/// \param [in] a Input matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for the rank-k update.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] ldc Leading dimension of C.
+template <class T>
+inline void syrk(descriptor_ptr desc_ptr, oneapi::mkl::uplo uplo,
+                 oneapi::mkl::transpose trans, std::int64_t n, std::int64_t k,
+                 const T *alpha, const T *a, std::int64_t lda, const T *b,
+                 std::int64_t ldb, const T *beta, T *c, std::int64_t ldc) {
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  auto cm = deduce_compute_mode<T>(std::nullopt, desc_ptr->get_math_mode());
+#endif
+  dpct::detail::rk_impl<false, T, T>(q, uplo, trans, n, k, alpha, a, lda, b,
+                                     ldb, beta, c, ldc DPCT_COMPUTE_MODE_ARG);
+}
+
+/// This routines perform a special rank-k update of a Hermitian matrix C by
+/// general matrices A and B.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] uplo Specifies whether C's data is stored in its upper or lower triangle.
+/// \param [in] trans Specifies the operation to apply.
+/// \param [in] n The number of rows and columns in C.
+/// \param [in] k The inner dimension of matrix multiplications.
+/// \param [in] alpha Scaling factor for the rank-k update.
+/// \param [in] a Input matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for the rank-k update.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] ldc Leading dimension of C.
+template <class T, class Tbeta>
+inline void herk(descriptor_ptr desc_ptr, oneapi::mkl::uplo uplo,
+                 oneapi::mkl::transpose trans, std::int64_t n, std::int64_t k,
+                 const T *alpha, const T *a, std::int64_t lda, const T *b,
+                 std::int64_t ldb, const Tbeta *beta, T *c, std::int64_t ldc) {
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  auto cm = deduce_compute_mode<T>(std::nullopt, desc_ptr->get_math_mode());
+#endif
+  dpct::detail::rk_impl<true, T, Tbeta>(q, uplo, trans, n, k, alpha, a, lda, b,
+                                        ldb, beta, c,
+                                        ldc DPCT_COMPUTE_MODE_ARG);
+}
+
+/// This routine performs a group of trsm operations. Each trsm solves an
+/// equation of the form op(A) * X = alpha * B or X * op(A) = alpha * B.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] left_right Specifies A multiplies X on the left or on the right.
+/// \param [in] upper_lower Specifies A is upper or lower triangular.
+/// \param [in] trans Specifies the operation applied to A.
+/// \param [in] unit_diag Specifies whether A is unit triangular.
+/// \param [in] m Number of rows of the B matrices.
+/// \param [in] n Number of columns of the B matrices.
+/// \param [in] alpha Scaling factor for the solutions.
+/// \param [in] a Input matrices A.
+/// \param [in] a_type Data type of the matrices A.
+/// \param [in] lda Leading dimension of the matrices A.
+/// \param [in, out] b Input and output matrices B.
+/// \param [in] b_type Data type of the matrices B.
+/// \param [in] ldb Leading dimension of the matrices B.
+/// \param [in] batch_size Specifies the number of trsm operations to perform.
+/// \param [in] ct Compute type.
+inline void trsm_batch(descriptor_ptr desc_ptr, oneapi::mkl::side left_right,
+                       oneapi::mkl::uplo upper_lower,
+                       oneapi::mkl::transpose trans,
+                       oneapi::mkl::diag unit_diag, std::int64_t m,
+                       std::int64_t n, const void *alpha, const void **a,
+                       library_data_t a_type, std::int64_t lda, void **b,
+                       library_data_t b_type, std::int64_t ldb,
+                       std::int64_t batch_size,
+                       std::variant<compute_type, library_data_t> ct) {
+#ifdef DPCT_USM_LEVEL_NONE
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  oneapi::mkl::blas::compute_mode cm = oneapi::mkl::blas::compute_mode::unset;
+  if (auto ct_p = std::get_if<compute_type>(&ct))
+    cm = deduce_compute_mode(*ct_p, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+  else
+    cm = deduce_compute_mode(std::nullopt, desc_ptr->get_math_mode(),
+                             a_type == library_data_t::complex_float ||
+                                 a_type == library_data_t::complex_double);
+#endif
+  std::uint64_t key = dpct::detail::get_type_combination_id(a_type, b_type);
+  switch (key) {
+  case dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                             library_data_t::real_float): {
+    dpct::detail::trsm_batch_impl<float, float, float>(
+        q, left_right, upper_lower, trans, unit_diag, m, n, alpha, a, lda, b,
+        ldb, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                             library_data_t::real_double): {
+    dpct::detail::trsm_batch_impl<double, double, double>(
+        q, left_right, upper_lower, trans, unit_diag, m, n, alpha, a, lda, b,
+        ldb, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                             library_data_t::complex_float): {
+    dpct::detail::trsm_batch_impl<std::complex<float>, std::complex<float>,
+                                  std::complex<float>>(
+        q, left_right, upper_lower, trans, unit_diag, m, n, alpha, a, lda, b,
+        ldb, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  case dpct::detail::get_type_combination_id(library_data_t::complex_double,
+                                             library_data_t::complex_double): {
+    dpct::detail::trsm_batch_impl<std::complex<double>, std::complex<double>,
+                                  std::complex<double>>(
+        q, left_right, upper_lower, trans, unit_diag, m, n, alpha, a, lda, b,
+        ldb, batch_size DPCT_COMPUTE_MODE_ARG);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+#endif
+}
+
+/// Computes a triangular matrix-general matrix product.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] left_right Specifies A is on the left or right side of the
+/// multiplication.
+/// \param [in] upper_lower Specifies A is upper or lower triangular.
+/// \param [in] trans Specifies the operation applied to A.
+/// \param [in] unit_diag Specifies whether A is unit triangular.
+/// \param [in] m Number of rows of B.
+/// \param [in] n Number of columns of B.
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrices A.
+/// \param [in] lda Leading dimension of the matrices A.
+/// \param [in] b Input matrices B.
+/// \param [in] ldb Leading dimension of the matrices B.
+/// \param [out] c Output matrices C.
+/// \param [in] ldc Leading dimension of the matrices C.
+template <class T>
+inline void trmm(descriptor_ptr desc_ptr, oneapi::mkl::side left_right,
+                 oneapi::mkl::uplo upper_lower, oneapi::mkl::transpose trans,
+                 oneapi::mkl::diag unit_diag, std::int64_t m, std::int64_t n,
+                 const T *alpha, const T *a, std::int64_t lda, const T *b,
+                 std::int64_t ldb, T *c, std::int64_t ldc) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue q = desc_ptr->get_queue();
+#ifdef __INTEL_MKL__
+  auto cm = deduce_compute_mode<Ty>(std::nullopt, desc_ptr->get_math_mode());
+#endif
+  auto alpha_val = dpct::get_value(alpha, q);
+  if (b != c) {
+    dpct::blas::matrix_mem_copy(c, b, ldc, ldb, m, n, sizeof(Ty),
+                                ::dpct::cs::memcpy_direction::device_to_device,
+                                q);
+  }
+  auto data_a = dpct::detail::get_memory<const Ty>(a);
+  auto data_c = dpct::detail::get_memory<Ty>(c);
+  oneapi::mkl::blas::column_major::trmm(q, left_right, upper_lower, trans,
+                                        unit_diag, m, n, alpha_val, data_a, lda,
+                                        data_c, ldc DPCT_COMPUTE_MODE_ARG);
+}
+
+/// Computes the Euclidean norm of a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+inline void nrm2(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                 library_data_t x_type, std::int64_t incx, void *result,
+                 library_data_t result_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key =
+      ::dpct::detail::get_type_combination_id(x_type, result_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::nrm2_impl<float, float>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::nrm2_impl<double, double>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::nrm2_impl<std::complex<float>, float>(q, n, x, incx,
+                                                          result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::nrm2_impl<std::complex<double>, double>(q, n, x, incx,
+                                                            result);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_half,
+                                               library_data_t::real_half): {
+    ::dpct::detail::nrm2_impl<sycl::half, sycl::half>(q, n, x, incx, result);
+    break;
+  }
+#endif
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Computes the dot product of two vectors.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in] y Input vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+inline void dot(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                library_data_t x_type, std::int64_t incx, const void *y,
+                library_data_t y_type, std::int64_t incy, void *result,
+                library_data_t result_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  ::dpct::detail::dotuc<false>(q, n, x, x_type, incx, y, y_type, incy, result,
+                               result_type);
+}
+
+/// Computes the dot product of two vectors, conjugating the first vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in] y Input vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+inline void dotc(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                 library_data_t x_type, std::int64_t incx, const void *y,
+                 library_data_t y_type, std::int64_t incy, void *result,
+                 library_data_t result_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  ::dpct::detail::dotuc<true>(q, n, x, x_type, incx, y, y_type, incy, result,
+                              result_type);
+}
+
+/// Computes the product of a vector by a scalar.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] alpha The scale factor alpha.
+/// \param [in] alpha_type The data type of alpha.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+inline void scal(descriptor_ptr desc_ptr, std::int64_t n, const void *alpha,
+                 library_data_t alpha_type, void *x, library_data_t x_type,
+                 std::int64_t incx) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float): {
+    ::dpct::detail::scal_impl<float, float>(q, n, alpha, x, incx);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double): {
+    ::dpct::detail::scal_impl<double, double>(q, n, alpha, x, incx);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float): {
+    ::dpct::detail::scal_impl<std::complex<float>, std::complex<float>>(
+        q, n, alpha, x, incx);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double): {
+    ::dpct::detail::scal_impl<std::complex<double>, std::complex<double>>(
+        q, n, alpha, x, incx);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_half): {
+    float alpha_value =
+        dpct::get_value(reinterpret_cast<const float *>(alpha), q);
+    sycl::half alaph_half(alpha_value);
+    ::dpct::detail::scal_impl<sycl::half, sycl::half>(q, n, &alaph_half, x,
+                                                      incx);
+    break;
+  }
+#endif
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Computes a vector-scalar product and adds the result to a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] alpha The scale factor alpha.
+/// \param [in] alpha_type The data type of alpha.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+inline void axpy(descriptor_ptr desc_ptr, std::int64_t n, const void *alpha,
+                 library_data_t alpha_type, const void *x,
+                 library_data_t x_type, std::int64_t incx, void *y,
+                 library_data_t y_type, std::int64_t incy) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key =
+      ::dpct::detail::get_type_combination_id(x_type, alpha_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::axpy_impl<float, float>(q, n, alpha, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::axpy_impl<double, double>(q, n, alpha, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::complex_float): {
+    ::dpct::detail::axpy_impl<std::complex<float>, std::complex<float>>(
+        q, n, alpha, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double): {
+    ::dpct::detail::axpy_impl<std::complex<double>, std::complex<double>>(
+        q, n, alpha, x, incx, y, incy);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_half,
+                                               library_data_t::real_float): {
+    float alpha_value =
+        dpct::get_value(reinterpret_cast<const float *>(alpha), q);
+    sycl::half alaph_half(alpha_value);
+    ::dpct::detail::axpy_impl<sycl::half, sycl::half>(q, n, &alaph_half, x,
+                                                      incx, y, incy);
+    break;
+  }
+#endif
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Performs rotation of points in the plane.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [in] c Scaling factor.
+/// \param [in] s Scaling factor.
+/// \param [in] cs_type Data type of the scaling factors.
+inline void rot(descriptor_ptr desc_ptr, std::int64_t n, void *x,
+                library_data_t x_type, std::int64_t incx, void *y,
+                library_data_t y_type, std::int64_t incy, const void *c,
+                const void *s, library_data_t cs_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type, cs_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::rot_impl<float, float, float>(q, n, x, incx, y, incy, c, s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::rot_impl<double, double, double>(q, n, x, incx, y, incy, c,
+                                                     s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::rot_impl<std::complex<float>, float, float>(q, n, x, incx,
+                                                                y, incy, c, s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::rot_impl<std::complex<double>, double, double>(
+        q, n, x, incx, y, incy, c, s);
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::complex_float): {
+    ::dpct::detail::rot_impl<std::complex<float>, float, std::complex<float>>(
+        q, n, x, incx, y, incy, c, s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double): {
+    ::dpct::detail::rot_impl<std::complex<double>, double,
+                             std::complex<double>>(q, n, x, incx, y, incy, c,
+                                                   s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_half,
+                                               library_data_t::real_half): {
+    ::dpct::detail::rot_impl<sycl::half, sycl::half, sycl::half>(q, n, x, incx,
+                                                                 y, incy, c, s);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_bfloat16,
+                                               library_data_t::real_bfloat16): {
+    ::dpct::detail::rot_impl<oneapi::mkl::bfloat16, oneapi::mkl::bfloat16,
+                             oneapi::mkl::bfloat16>(q, n, x, incx, y, incy, c,
+                                                    s);
+    break;
+  }
+#endif
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Performs modified Givens rotation of points in the plane.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [in] param Array of 5 parameters.
+/// \param [in] param_type Data type of \p param.
+inline void rotm(descriptor_ptr desc_ptr, std::int64_t n, void *x,
+                 library_data_t x_type, int64_t incx, void *y,
+                 library_data_t y_type, int64_t incy, const void *param,
+                 library_data_t param_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key =
+      ::dpct::detail::get_type_combination_id(x_type, param_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::rotm_impl<float, float, float>(q, n, x, incx, y, incy,
+                                                   param);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::rotm_impl<double, double, double>(q, n, x, incx, y, incy,
+                                                      param);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Copies a vector to another vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] y Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+inline void copy(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                 library_data_t x_type, std::int64_t incx, void *y,
+                 library_data_t y_type, std::int64_t incy) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type, y_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::copy_impl<float, float>(q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::copy_impl<double, double>(q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::complex_float): {
+    ::dpct::detail::copy_impl<std::complex<float>, std::complex<float>>(
+        q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double): {
+    ::dpct::detail::copy_impl<std::complex<double>, std::complex<double>>(
+        q, n, x, incx, y, incy);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Swaps a vector with another vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+inline void swap(descriptor_ptr desc_ptr, std::int64_t n, void *x,
+                 library_data_t x_type, std::int64_t incx, void *y,
+                 library_data_t y_type, std::int64_t incy) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type, y_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::swap_impl<float, float>(q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::swap_impl<double, double>(q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::complex_float): {
+    ::dpct::detail::swap_impl<std::complex<float>, std::complex<float>>(
+        q, n, x, incx, y, incy);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double, library_data_t::complex_double): {
+    ::dpct::detail::swap_impl<std::complex<double>, std::complex<double>>(
+        q, n, x, incx, y, incy);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Computes the sum of magnitudes of the vector elements.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The scalar result.
+/// \param [in] result_type Data type of \p result.
+inline void asum(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                 library_data_t x_type, std::int64_t incx, void *result,
+                 library_data_t result_type) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key =
+      ::dpct::detail::get_type_combination_id(x_type, result_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::asum_impl<float, float>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::asum_impl<double, double>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float,
+                                               library_data_t::real_float): {
+    ::dpct::detail::asum_impl<std::complex<float>, float>(q, n, x, incx,
+                                                          result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_double,
+                                               library_data_t::real_double): {
+    ::dpct::detail::asum_impl<std::complex<double>, double>(q, n, x, incx,
+                                                            result);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Finds the index of the element with the largest absolute value in a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The index of the maximal element.
+inline void iamax(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                  library_data_t x_type, std::int64_t incx,
+                  std::int64_t *result) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float): {
+    ::dpct::detail::iamax_impl<float>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double): {
+    ::dpct::detail::iamax_impl<double>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float): {
+    ::dpct::detail::iamax_impl<std::complex<float>>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double): {
+    ::dpct::detail::iamax_impl<std::complex<double>>(q, n, x, incx, result);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Finds the index of the element with the smallest absolute value in a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The index of the minimum element.
+inline void iamin(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                  library_data_t x_type, std::int64_t incx,
+                  std::int64_t *result) {
+  sycl::queue q = desc_ptr->get_queue();
+  std::uint64_t key = ::dpct::detail::get_type_combination_id(x_type);
+  switch (key) {
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_float): {
+    ::dpct::detail::iamin_impl<float>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::real_double): {
+    ::dpct::detail::iamin_impl<double>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(library_data_t::complex_float): {
+    ::dpct::detail::iamin_impl<std::complex<float>>(q, n, x, incx, result);
+    break;
+  }
+  case ::dpct::detail::get_type_combination_id(
+      library_data_t::complex_double): {
+    ::dpct::detail::iamin_impl<std::complex<double>>(q, n, x, incx, result);
+    break;
+  }
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+/// Finds the index of the element with the largest absolute value in a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The index of the maximal element.
+inline void iamax(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                  library_data_t x_type, std::int64_t incx, int *result) {
+  dpct::blas::wrapper_int_to_int64_out wrapper(desc_ptr->get_queue(), result);
+  iamax(desc_ptr, n, x, x_type, incx, wrapper.get_ptr());
+}
+
+/// Finds the index of the element with the smallest absolute value in a vector.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The index of the minimum element.
+inline void iamin(descriptor_ptr desc_ptr, std::int64_t n, const void *x,
+                  library_data_t x_type, std::int64_t incx, int *result) {
+  dpct::blas::wrapper_int_to_int64_out wrapper(desc_ptr->get_queue(), result);
+  iamin(desc_ptr, n, x, x_type, incx, wrapper.get_ptr());
+}
+
+/// Finds the least squares solutions for a batch of overdetermined linear
+/// systems. Uses the QR factorization to solve a grouped batch of linear
+/// systems with full rank matrices.
+/// \param [in] desc_ptr Descriptor.
+/// \param [in] trans Operation applied to \p a.
+/// \param [in] m The number of rows of \p a.
+/// \param [in] n The number of columns of \p a.
+/// \param [in] nrhs The number of columns of \p b.
+/// \param [in, out] a Array of pointers to matrices.
+/// \param [in] lda The leading dimension of \p a.
+/// \param [in, out] b Array of pointers to matrices.
+/// \param [in] ldb The leading dimension of \p b.
+/// \param [out] info Set to 0 if no error.
+/// \param [out] dev_info Optional. If it is not NULL : dev_info[i]==0 means the
+/// i-th problem is successful; dev_info[i]!=0 means dev_info[i] is the first
+/// zero diagonal element of the i-th \p a .
+/// \param [in] batch_size The size of the batch.
+template <typename T>
+inline sycl::event
+gels_batch_wrapper(descriptor_ptr desc_ptr, oneapi::mkl::transpose trans, int m,
+                   int n, int nrhs, T *const a[], int lda, T *const b[],
+                   int ldb, int *info, int *dev_info, int batch_size) {
+#if defined(DPCT_USM_LEVEL_NONE) || !defined(__INTEL_MKL__)
+#if defined(DPCT_USM_LEVEL_NONE)
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#endif
+#else
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue exec_queue = desc_ptr->get_queue();
+  struct matrix_info_t {
+    oneapi::mkl::transpose trans_info;
+    std::int64_t m_info;
+    std::int64_t n_info;
+    std::int64_t nrhs_info;
+    std::int64_t lda_info;
+    std::int64_t ldb_info;
+    std::int64_t group_size_info;
+  };
+  matrix_info_t *matrix_info =
+      (matrix_info_t *)std::malloc(sizeof(matrix_info_t));
+  matrix_info->trans_info = trans;
+  matrix_info->m_info = m;
+  matrix_info->n_info = n;
+  matrix_info->nrhs_info = nrhs;
+  matrix_info->lda_info = lda;
+  matrix_info->ldb_info = ldb;
+  matrix_info->group_size_info = batch_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::gels_batch_scratchpad_size<Ty>(
+          exec_queue, &(matrix_info->trans_info), &(matrix_info->m_info),
+          &(matrix_info->n_info), &(matrix_info->nrhs_info),
+          &(matrix_info->lda_info), &(matrix_info->ldb_info), 1,
+          &(matrix_info->group_size_info));
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+
+  *info = 0;
+  if (dev_info)
+    exec_queue.memset(dev_info, 0, batch_size * sizeof(int));
+  static const std::vector<sycl::event> empty_events{};
+  static const std::string api_name = "oneapi::mkl::lapack::gels_batch";
+  sycl::event e = ::dpct::detail::catch_batch_error_f<sycl::event>(
+      nullptr, api_name, exec_queue, info, dev_info, batch_size,
+      oneapi::mkl::lapack::gels_batch, exec_queue, &(matrix_info->trans_info),
+      &(matrix_info->m_info), &(matrix_info->n_info), &(matrix_info->nrhs_info),
+      (Ty **)a, &(matrix_info->lda_info), (Ty **)b, &(matrix_info->ldb_info),
+      (std::int64_t)1, &(matrix_info->group_size_info), (Ty *)scratchpad,
+      (std::int64_t)scratchpad_size, empty_events);
+
+  return exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() mutable {
+      ::dpct::detail::catch_batch_error(
+          nullptr, api_name, exec_queue, info, dev_info,
+          matrix_info->group_size_info,
+          [](sycl::event _e) {
+            _e.wait_and_throw();
+            return 0;
+          },
+          e);
+      std::free(matrix_info);
+      sycl::free(scratchpad, exec_queue);
+    });
+  });
+#endif
+}
+} // namespace blas
+
+/// Computes matrix-matrix product with general matrices.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] scaling_type Data type of the scaling factors.
+[[deprecated("Please use dpct::blas::gemm(...) instead.")]] inline void
+gemm(sycl::queue &q, oneapi::mkl::transpose a_trans,
+     oneapi::mkl::transpose b_trans, int m, int n, int k, const void *alpha,
+     const void *a, library_data_t a_type, int lda, const void *b,
+     library_data_t b_type, int ldb, const void *beta, void *c,
+     library_data_t c_type, int ldc, library_data_t scaling_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::gemm(&desc, a_trans, b_trans, m, n, k, alpha, a, a_type, lda, b, b_type,
+             ldb, beta, c, c_type, ldc, scaling_type);
+}
+
+/// Computes a batch of matrix-matrix product with general matrices.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] batch_size Specifies the number of matrix multiply operations to perform.
+/// \param [in] scaling_type Data type of the scaling factors.
+[[deprecated("Please use dpct::blas::gemm_batch(...) instead.")]] inline void
+gemm_batch(sycl::queue &q, oneapi::mkl::transpose a_trans,
+           oneapi::mkl::transpose b_trans, int m, int n, int k,
+           const void *alpha, const void *a[], library_data_t a_type, int lda,
+           const void *b[], library_data_t b_type, int ldb, const void *beta,
+           void *c[], library_data_t c_type, int ldc, int batch_size,
+           library_data_t scaling_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::gemm_batch(&desc, a_trans, b_trans, m, n, k, alpha, a, a_type, lda, b,
+                   b_type, ldb, beta, c, c_type, ldc, batch_size, scaling_type);
+}
+
+/// Computes a batch of matrix-matrix product with general matrices.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] a_trans Specifies the operation applied to A.
+/// \param [in] b_trans Specifies the operation applied to B.
+/// \param [in] m Specifies the number of rows of the matrix op(A) and of the matrix C.
+/// \param [in] n Specifies the number of columns of the matrix op(B) and of the matrix C.
+/// \param [in] k Specifies the number of columns of the matrix op(A) and the number of rows of the matrix op(B).
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrix A.
+/// \param [in] a_type Data type of the matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] stride_a Stride between the different A matrices.
+/// \param [in] b Input matrix B.
+/// \param [in] b_type Data type of the matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] stride_b Stride between the different B matrices.
+/// \param [in] beta Scaling factor for matrix C.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] c_type Data type of the matrix C.
+/// \param [in] ldc Leading dimension of C.
+/// \param [in] stride_c Stride between the different C matrices.
+/// \param [in] batch_size Specifies the number of matrix multiply operations to perform.
+/// \param [in] scaling_type Data type of the scaling factors.
+[[deprecated("Please use dpct::blas::gemm_batch(...) instead.")]] inline void
+gemm_batch(sycl::queue &q, oneapi::mkl::transpose a_trans,
+           oneapi::mkl::transpose b_trans, int m, int n, int k,
+           const void *alpha, const void *a, library_data_t a_type, int lda,
+           long long int stride_a, const void *b, library_data_t b_type,
+           int ldb, long long int stride_b, const void *beta, void *c,
+           library_data_t c_type, int ldc, long long int stride_c,
+           int batch_size, library_data_t scaling_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::gemm_batch(&desc, a_trans, b_trans, m, n, k, alpha, a, a_type, lda,
+                   stride_a, b, b_type, ldb, stride_b, beta, c, c_type, ldc,
+                   stride_c, batch_size, scaling_type);
+}
+
+/// This routines perform a special rank-k update of a symmetric matrix C by
+/// general matrices A and B.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] uplo Specifies whether C's data is stored in its upper or lower triangle.
+/// \param [in] trans Specifies the operation to apply.
+/// \param [in] n The number of rows and columns in C.
+/// \param [in] k The inner dimension of matrix multiplications.
+/// \param [in] alpha Scaling factor for the rank-k update.
+/// \param [in] a Input matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for the rank-k update.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] ldc Leading dimension of C.
+template <class T>
+[[deprecated("Please use dpct::blas::syrk(...) instead.")]] inline void
+syrk(sycl::queue &q, oneapi::mkl::uplo uplo, oneapi::mkl::transpose trans,
+     int n, int k, const T *alpha, const T *a, int lda, const T *b, int ldb,
+     const T *beta, T *c, int ldc) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::syrk<T>(&desc, uplo, trans, n, k, alpha, a, lda, b, ldb, beta, c, ldc);
+}
+
+/// This routines perform a special rank-k update of a Hermitian matrix C by
+/// general matrices A and B.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] uplo Specifies whether C's data is stored in its upper or lower triangle.
+/// \param [in] trans Specifies the operation to apply.
+/// \param [in] n The number of rows and columns in C.
+/// \param [in] k The inner dimension of matrix multiplications.
+/// \param [in] alpha Scaling factor for the rank-k update.
+/// \param [in] a Input matrix A.
+/// \param [in] lda Leading dimension of A.
+/// \param [in] b Input matrix B.
+/// \param [in] ldb Leading dimension of B.
+/// \param [in] beta Scaling factor for the rank-k update.
+/// \param [in, out] c Input/Output matrix C.
+/// \param [in] ldc Leading dimension of C.
+template <class T, class Tbeta>
+[[deprecated("Please use dpct::blas::herk(...) instead.")]] inline void
+herk(sycl::queue &q, oneapi::mkl::uplo uplo, oneapi::mkl::transpose trans,
+     int n, int k, const T *alpha, const T *a, int lda, const T *b, int ldb,
+     const Tbeta *beta, T *c, int ldc) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::herk(&desc, uplo, trans, n, k, alpha, a, lda, b, ldb, beta, c, ldc);
+}
+
+/// This routine performs a group of trsm operations. Each trsm solves an
+/// equation of the form op(A) * X = alpha * B or X * op(A) = alpha * B.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] left_right Specifies A multiplies X on the left or on the right.
+/// \param [in] upper_lower Specifies A is upper or lower triangular.
+/// \param [in] trans Specifies the operation applied to A.
+/// \param [in] unit_diag Specifies whether A is unit triangular.
+/// \param [in] m Number of rows of the B matrices.
+/// \param [in] n Number of columns of the B matrices.
+/// \param [in] alpha Scaling factor for the solutions.
+/// \param [in] a Input matrices A.
+/// \param [in] a_type Data type of the matrices A.
+/// \param [in] lda Leading dimension of the matrices A.
+/// \param [in, out] b Input and output matrices B.
+/// \param [in] b_type Data type of the matrices B.
+/// \param [in] ldb Leading dimension of the matrices B.
+/// \param [in] batch_size Specifies the number of trsm operations to perform.
+/// \param [in] scaling_type Data type of the scaling factors.
+[[deprecated("Please use dpct::blas::trsm_batch(...) instead.")]] inline void
+trsm_batch(sycl::queue &q, oneapi::mkl::side left_right,
+           oneapi::mkl::uplo upper_lower, oneapi::mkl::transpose trans,
+           oneapi::mkl::diag unit_diag, int m, int n, const void *alpha,
+           const void **a, library_data_t a_type, int lda, void **b,
+           library_data_t b_type, int ldb, int batch_size,
+           library_data_t scaling_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::trsm_batch(&desc, left_right, upper_lower, trans, unit_diag, m, n,
+                   alpha, a, a_type, lda, b, b_type, ldb, batch_size,
+                   scaling_type);
+}
+
+/// Computes a triangular matrix-general matrix product.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] left_right Specifies A is on the left or right side of the
+/// multiplication.
+/// \param [in] upper_lower Specifies A is upper or lower triangular.
+/// \param [in] trans Specifies the operation applied to A.
+/// \param [in] unit_diag Specifies whether A is unit triangular.
+/// \param [in] m Number of rows of B.
+/// \param [in] n Number of columns of B.
+/// \param [in] alpha Scaling factor for the matrix-matrix product.
+/// \param [in] a Input matrices A.
+/// \param [in] lda Leading dimension of the matrices A.
+/// \param [in] b Input matrices B.
+/// \param [in] ldb Leading dimension of the matrices B.
+/// \param [out] c Output matrices C.
+/// \param [in] ldc Leading dimension of the matrices C.
+template <class T>
+[[deprecated("Please use dpct::blas::trmm(...) instead.")]] inline void
+trmm(sycl::queue &q, oneapi::mkl::side left_right,
+     oneapi::mkl::uplo upper_lower, oneapi::mkl::transpose trans,
+     oneapi::mkl::diag unit_diag, int m, int n, const T *alpha, const T *a,
+     int lda, const T *b, int ldb, T *c, int ldc) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::trmm<T>(&desc, left_right, upper_lower, trans, unit_diag, m, n, alpha,
+                a, lda, b, ldb, c, ldc);
+}
+
+/// Computes the Euclidean norm of a vector.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+[[deprecated("Please use dpct::blas::nrm2(...) instead.")]] inline void
+nrm2(sycl::queue &q, int n, const void *x, library_data_t x_type, int incx,
+     void *result, library_data_t result_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::nrm2(&desc, n, x, x_type, incx, result, result_type);
+}
+
+/// Computes the dot product of two vectors.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in] y Input vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+[[deprecated("Please use dpct::blas::dot(...) instead.")]] inline void
+dot(sycl::queue &q, int n, const void *x, library_data_t x_type, int incx,
+    const void *y, library_data_t y_type, int incy, void *result,
+    library_data_t result_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::dot(&desc, n, x, x_type, incx, y, y_type, incy, result, result_type);
+}
+
+/// Computes the dot product of two vectors, conjugating the first vector.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in] y Input vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [out] result The result scalar.
+/// \param [in] result_type Data type of the result.
+[[deprecated("Please use dpct::blas::dotc(...) instead.")]] inline void
+dotc(sycl::queue &q, int n, const void *x, library_data_t x_type, int incx,
+     const void *y, library_data_t y_type, int incy, void *result,
+     library_data_t result_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::dotc(&desc, n, x, x_type, incx, y, y_type, incy, result, result_type);
+}
+
+/// Computes the product of a vector by a scalar.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] alpha The scale factor alpha.
+/// \param [in] alpha_type The data type of alpha.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+[[deprecated("Please use dpct::blas::scal(...) instead.")]] inline void
+scal(sycl::queue &q, int n, const void *alpha, library_data_t alpha_type,
+     void *x, library_data_t x_type, int incx) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::scal(&desc, n, alpha, alpha_type, x, x_type, incx);
+}
+
+/// Computes a vector-scalar product and adds the result to a vector.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in] alpha The scale factor alpha.
+/// \param [in] alpha_type The data type of alpha.
+/// \param [in] x Input vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+[[deprecated("Please use dpct::blas::axpy(...) instead.")]] inline void
+axpy(sycl::queue &q, int n, const void *alpha, library_data_t alpha_type,
+     const void *x, library_data_t x_type, int incx, void *y,
+     library_data_t y_type, int incy) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::axpy(&desc, n, alpha, alpha_type, x, x_type, incx, y, y_type, incy);
+}
+
+/// Performs rotation of points in the plane.
+/// \param [in] q The queue where the routine should be executed.
+/// \param [in] n Number of elements in vector x.
+/// \param [in, out] x Input/Output vector x.
+/// \param [in] x_type Data type of the vector x.
+/// \param [in] incx Stride of vector x.
+/// \param [in, out] y Input/Output vector y.
+/// \param [in] y_type Data type of the vector y.
+/// \param [in] incy Stride of vector y.
+/// \param [in] c Scaling factor.
+/// \param [in] s Scaling factor.
+/// \param [in] cs_type Data type of the scaling factors.
+[[deprecated("Please use dpct::blas::rot(...) instead.")]] inline void
+rot(sycl::queue &q, int n, void *x, library_data_t x_type, int incx, void *y,
+    library_data_t y_type, int incy, const void *c, const void *s,
+    library_data_t cs_type) {
+  blas::descriptor desc;
+  desc.set_queue(&q);
+  blas::rot(&desc, n, x, x_type, incx, y, y_type, incy, c, s, cs_type);
+}
+} // namespace dpct
+#undef DPCT_COMPUTE_MODE_ARG
+#undef DPCT_COMPUTE_MODE_PARAM
+#endif // __DPCT_BLAS_UTILS_HPP__
diff --git a/sycl/include/dpct/ccl_utils.hpp b/sycl/include/dpct/ccl_utils.hpp
new file mode 100644
index 00000000000..b965567900f
--- /dev/null
+++ b/sycl/include/dpct/ccl_utils.hpp
@@ -0,0 +1,266 @@
+//==---- ccl_utils.hpp----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_CCL_UTILS_HPP__
+#define __DPCT_CCL_UTILS_HPP__
+
+#include "compat_service.hpp"
+
+#include <oneapi/ccl.hpp>
+
+#include <unordered_map>
+#include <memory>
+
+#include "detail/ccl_utils_detail.hpp"
+
+namespace dpct {
+namespace ccl {
+
+/// Get concatenated library version as an integer.
+static inline int get_version() {
+  oneapi::ccl::init();
+  auto ver = oneapi::ccl::get_library_version();
+  return ver.major * 10000 + ver.minor * 100 + ver.update;
+}
+
+/// Create main kvs and return its address.
+static inline oneapi::ccl::kvs::address_type create_kvs_address() {
+  oneapi::ccl::init();
+  auto ptr = oneapi::ccl::create_main_kvs();
+  auto addr = ptr->get_address();
+  detail::get_kvs(addr) = ptr;
+  return addr;
+}
+
+/// Get stored kvs with /p addr if exist. Otherwise, create kvs with /p addr.
+static inline std::shared_ptr<oneapi::ccl::kvs>
+create_kvs(const oneapi::ccl::kvs::address_type &addr) {
+  oneapi::ccl::init();
+  auto &ptr = detail::get_kvs(addr);
+  if (!ptr)
+    ptr = oneapi::ccl::create_kvs(addr);
+  return ptr;
+}
+
+/// dpct communicator extension
+class communicator_wrapper : public dpct::ccl::detail::ccl_init_helper {
+public:
+  communicator_wrapper(
+      int size, int rank, oneapi::ccl::kvs::address_type id,
+      const oneapi::ccl::comm_attr &attr = oneapi::ccl::default_comm_attr)
+      : _device_comm(oneapi::ccl::create_device(
+            static_cast<sycl::device &>(::dpct::cs::get_current_device()))),
+        _context_comm(
+            oneapi::ccl::create_context(::dpct::cs::get_default_context())),
+        _comm(oneapi::ccl::create_communicator(
+            size, rank, _device_comm, _context_comm, dpct::ccl::create_kvs(id),
+            attr)) {
+    _queue_init = false;
+    _ccl_stream_ptr = nullptr;
+  }
+
+  ~communicator_wrapper() {
+    delete _ccl_stream_ptr;
+  };
+
+  /// Return the rank in a oneapi::ccl::communicator
+  /// \returns The rank corresponding to communicator object
+  int rank() const {
+    return _comm.rank();
+  }
+
+  /// Retrieves the number of rank in oneapi::ccl::communicator
+  /// \returns The number of the ranks
+  int size() const {
+    return _comm.size();
+  }
+
+  /// Return underlying native device, which was used in oneapi::ccl::communicator
+  sycl::device get_device() const {
+    return _comm.get_device().get_native();
+  }
+
+  /// \brief allreduce is a collective communication operation that performs the global reduction operation
+  ///       on values from all ranks of communicator and distributes the result back to all ranks.
+  /// \param sendbuff the buffer with @c count elements of @c dtype that stores local data to be reduced
+  /// \param recvbuff [out] the buffer to store reduced result, must have the same dimension as @c sendbuff
+  /// \param count the number of elements of type @c dtype in @c sendbuff and @c recvbuff
+  /// \param dtype the datatype of elements in @c sendbuff and @c recvbuff
+  /// \param rtype the type of the reduction operation to be applied
+  /// \param queue_ptr a sycl::queue ptr associated with the operation
+  /// \return @ref void
+  void allreduce(const void *sendbuff, void *recvbuff, size_t count,
+                 oneapi::ccl::datatype dtype, oneapi::ccl::reduction rtype,
+                 sycl::queue *queue_ptr) {
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::allreduce(sendbuff, recvbuff, count, dtype, rtype,
+                                        _comm, stream);
+        },
+        queue_ptr);
+  }
+
+  /// \brief reduce is a collective communication operation that performs the
+  ///        global reduction operation on values from all ranks of the communicator
+  ///        and returns the result to the root rank.
+  /// \param sendbuff the buffer with @c count elements of @c dtype that stores
+  ///        local data to be reduced 
+  /// \param recvbuff [out] the buffer to store reduced result, 
+  ///        must have the same dimension as @c sendbuff 
+  /// \param count the number of elements of type @c dtype in @c sendbuff and @c recvbuff 
+  /// \param dtype the datatype of elements in @c sendbuff and @c recvbuff 
+  /// \param root the rank that gets the result of reduction 
+  /// \param rtype the type of the reduction operation to be applied 
+  /// \param queue_ptr a sycl::queue ptr associated with the operation 
+  /// \return @ref void
+  void reduce(const void *sendbuff, void *recvbuff, size_t count,
+              oneapi::ccl::datatype dtype, oneapi::ccl::reduction rtype,
+              int root, sycl::queue *queue_ptr) {
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::reduce(sendbuff, recvbuff, count, dtype, rtype,
+                                     root, _comm, stream);
+        },
+        queue_ptr);
+  }
+
+  /// \brief broadcast is a collective communication operation that broadcasts data
+  ///        from one rank of communicator (denoted as root) to all other ranks.
+  ///        Only support in-place operation
+  /// \param sendbuff the buffer with @c count elements of @c dtype that stores
+  ///        local data to be reduced 
+  /// \param recvbuff [out] the buffer to store reduced result
+  /// \param count the number of elements of type @c dtype in @c buf 
+  /// \param dtype thedatatype of elements in @c buf 
+  /// \param root the rank that broadcasts @c buf
+  /// \param queue_ptr a sycl::queue ptr associated with the operation
+  /// \return @ref void
+  void broadcast(void *sendbuff, void *recvbuff, size_t count,
+                 oneapi::ccl::datatype dtype, int root,
+                 sycl::queue *queue_ptr) {
+    if (sendbuff != recvbuff) {
+      throw std::runtime_error(
+          "oneCCL broadcast only support in-place operation. "
+          "sendbuff and recvbuff must be same.");
+      return;
+    }
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::broadcast(recvbuff, count, dtype, root, _comm,
+                                        stream);
+        },
+        queue_ptr);
+  }
+
+  /// \brief reduce_scatter is a collective communication operation that performs the global reduction operation
+  ///        on values from all ranks of the communicator and scatters the result in blocks back to all ranks.
+  /// \param sendbuff the buffer with @c count elements of @c dtype that stores local data to be reduced
+  /// \param recvbuff [out] the buffer to store reduced result, must have the same dimension as @c sendbuff
+  /// \param recv_count the number of elements of type @c dtype in receive block
+  /// \param dtype the datatype of elements in @c sendbuff and @c recvbuff
+  /// \param rtype the type of the reduction operation to be applied
+  /// \param queue_ptr a sycl::queue ptr associated with the operation
+  /// \return @ref void
+  void reduce_scatter(const void *sendbuff, void *recvbuff, size_t recv_count,
+                      oneapi::ccl::datatype dtype, oneapi::ccl::reduction rtype,
+                      sycl::queue *queue_ptr) {
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::reduce_scatter(sendbuff, recvbuff, recv_count,
+                                             dtype, rtype, _comm, stream);
+        },
+        queue_ptr);
+  }
+
+  /// \brief send is a pt2pt communication operation that sends data from one rank of communicator.
+  /// \param sendbuff the buffer with @c count elements of @c dtype serves as send buffer for root
+  /// \param count the number of elements of type @c dtype in @c sendbuff
+  /// \param dtype the datatype of elements in @c sendbuff
+  /// \param peer the rank that receives @c sendbuff
+  /// \param queue_ptr a sycl::queue ptr associated with the operation
+  /// \return @ref void
+  void send(void *sendbuff, size_t count, oneapi::ccl::datatype dtype, int peer,
+            sycl::queue *queue_ptr) {
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::send(sendbuff, count, dtype, peer, _comm, stream);
+        },
+        queue_ptr);
+  }
+
+  /// \brief recv is a pt2pt communication operation that sends data from one rank of communicator.
+  /// \param recvbuff the buffer with @c count elements of @c dtype serves as  receive buffer
+  /// \param count the number of elements of type @c dtype in @c recvbuff
+  /// \param dtype the datatype of elements in @c recvbuff
+  /// \param peer the rank that receives @c recvbuff
+  /// \param queue_ptr a sycl::queue ptr associated with the operation
+  /// \return @ref void
+  void recv(void *recvbuff, size_t count, oneapi::ccl::datatype dtype, int peer,
+            sycl::queue *queue_ptr) {
+    call_func_wrapper(
+        [=](const oneapi::ccl::stream &stream) {
+          return oneapi::ccl::recv(recvbuff, count, dtype, peer, _comm, stream);
+        },
+        queue_ptr);
+  }
+
+private:
+  oneapi::ccl::device _device_comm;
+  oneapi::ccl::context _context_comm;
+  oneapi::ccl::communicator _comm;
+  sycl::queue _queue;
+  bool _queue_init;
+  oneapi::ccl::stream *_ccl_stream_ptr;
+
+  template <class Fn>
+  void call_func_wrapper(Fn func, sycl::queue *qptr) {
+    if (_queue_init && *qptr != _queue) {
+      call_func_async(func, qptr);
+    } else {
+      if(!_queue_init) {
+        _queue = *qptr;
+        _queue_init = true;
+        _ccl_stream_ptr = new oneapi::ccl::stream(oneapi::ccl::create_stream(_queue));
+      }
+      std::invoke(func, *_ccl_stream_ptr);
+    }
+  }
+
+  class call_func_async {
+    sycl::queue *_q_ptr;
+    struct call_async_impl {
+      oneapi::ccl::stream _ccl_stream_impl;
+      oneapi::ccl::event _ccl_event_impl;
+      template <class Fn>
+      explicit call_async_impl(Fn func, sycl::queue *qptr)
+          : _ccl_stream_impl(oneapi::ccl::create_stream(*qptr)),
+            _ccl_event_impl(std::invoke(func, _ccl_stream_impl)) {}
+    };
+    call_async_impl *_imp;
+
+  public:
+    template <class Fn>
+    explicit call_func_async(Fn func, sycl::queue *qptr)
+        : _q_ptr(qptr),
+          _imp(new call_async_impl(func, qptr)) {}
+    ~call_func_async() {
+      _q_ptr->submit([&](sycl::handler &cgh)
+                     { cgh.host_task([=]
+                                     {
+        _imp->_ccl_event_impl.wait();
+        delete _imp; }); });
+    }
+  };
+};
+
+typedef dpct::ccl::communicator_wrapper *comm_ptr;
+
+} // namespace ccl
+} // namespace dpct
+
+#endif // __DPCT_CCL_UTILS_HPP__
\ No newline at end of file
diff --git a/sycl/include/dpct/codepin/codepin.hpp b/sycl/include/dpct/codepin/codepin.hpp
new file mode 100644
index 00000000000..59ccd653194
--- /dev/null
+++ b/sycl/include/dpct/codepin/codepin.hpp
@@ -0,0 +1,383 @@
+//==---- codepin.hpp -------------------------*- C++ -*------------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===-------------------------------------------------------------------===//
+#ifndef __DPCT_CODEPIN_HPP__
+#define __DPCT_CODEPIN_HPP__
+
+#include "serialization/basic.hpp"
+#include <chrono>
+#include <ctime>
+#include <fstream>
+#include <iomanip>
+#include <map>
+#include <memory>
+#include <numeric>
+#include <sstream>
+#include <stdexcept>
+#include <string>
+#include <type_traits>
+#include <unordered_set>
+#include <utility>
+#include <vector>
+#include <iostream>
+#include <stdlib.h>
+
+// Random seed for data sampling.
+#ifndef CODEPIN_RAND_SEED
+#define CODEPIN_RAND_SEED 0
+#endif
+
+// Data size threshold to trigger data sampling.
+// array/pointer size larger than the threshold will be sampled.
+#ifndef CODEPIN_SAMPLING_THRESHOLD
+#define CODEPIN_SAMPLING_THRESHOLD 20
+#endif
+
+// Sampling percent, interval: [0, 100]
+// 0: No data will be logged.  
+// 100: all data will be logged.
+#ifndef CODEPIN_SAMPLING_PERCENT
+#define CODEPIN_SAMPLING_PERCENT 1
+#endif
+
+#define CODEPIN_TO_STR(x) CODEPIN_STR(x)
+#define CODEPIN_STR(x) #x
+#pragma message(                                                               \
+    "CodePin data sampling feature is enabled for data dump. As follow list 3 configs for data sampling:")
+#pragma message("CODEPIN_RAND_SEED: " CODEPIN_TO_STR(CODEPIN_RAND_SEED))
+#pragma message("CODEPIN_SAMPLING_THRESHOLD: " CODEPIN_TO_STR(CODEPIN_SAMPLING_THRESHOLD))
+#pragma message("CODEPIN_SAMPLING_PERCENT: " CODEPIN_TO_STR(CODEPIN_SAMPLING_PERCENT))
+#pragma message(                                                               \
+    "Define the macros in the build command to change sampling configs. Also refer to codepin.hpp for definitions and default value of the macros.")
+
+namespace dpct {
+namespace experimental {
+namespace codepin {
+
+inline static std::map<std::string, int> api_index;
+inline static std::map<std::string, event_t> event_map;
+inline static bool rand_seed_setup = false;
+namespace detail {
+
+inline static std::unordered_set<void *> ptr_unique;
+
+class logger {
+public:
+  logger(const std::string &dump_file)
+      : opf(dump_file), json_ss(opf), arr(json_ss) {
+    auto top_obj = arr.object();
+    top_obj.key("CodePin Random Seed");
+    top_obj.value(CODEPIN_RAND_SEED);
+    top_obj.key("CodePin Sampling Threshold");
+    top_obj.value(CODEPIN_SAMPLING_THRESHOLD);
+    top_obj.key("CodePin Sampling Percent");
+    top_obj.value(CODEPIN_SAMPLING_PERCENT);
+  }
+  ~logger() {}
+
+  detail::json_stringstream &get_stringstream() {
+    return this->json_ss;
+  }
+
+  template <class... Args>
+  void print_CP(const std::string &cp_id, std::string device_name,
+                size_t free_byte, size_t total_byte, float elapse_time,
+                queue_t queue, Args... args) {
+    ptr_unique.clear();
+    auto obj = arr.object();
+    obj.key("ID");
+    obj.value(cp_id);
+    obj.key("Device Name");
+    obj.value(device_name);
+    obj.key("Device ID");
+#ifdef __NVCC__
+    int device_id;
+    cudaGetDevice(&device_id);
+    obj.value(device_id);
+#else
+    obj.value((int)dpct::get_current_device_id());
+#endif
+    obj.key("Stream Address");
+    obj.value((void *)queue);
+    obj.key("Free Device Memory");
+    obj.value(free_byte);
+    obj.key("Total Device Memory");
+    obj.value(total_byte);
+    obj.key("Elapse Time(ms)");
+    obj.value(elapse_time);
+    obj.key("CheckPoint");
+    auto cp_obj =
+        obj.value<detail::json_stringstream::json_obj>();
+    print_args(cp_obj, queue, 0, args...);
+  }
+
+  void print_args(json_stringstream::json_obj &obj, queue_t queue,
+                  int index = 0) {}
+
+  template <class First, class... RestArgs>
+  void print_args(json_stringstream::json_obj &obj, queue_t queue, int index,
+                  std::string_view arg_name, First &arg, RestArgs... args) {
+    obj.key(arg_name);
+    {
+      auto type_obj =
+          obj.value<detail::json_stringstream::json_obj>();
+      detail::data_ser<First>::print_type_name(type_obj);
+      type_obj.key("Address");
+      print_address(type_obj, arg);
+      type_obj.key("Index");
+      type_obj.value(index);
+      type_obj.key("Data");
+      detail::data_ser<First>::dump(json_ss, arg, queue);
+    }
+    print_args(obj, queue, index + 1, args...);
+  }
+  template <class ArgT>
+  void print_address(json_stringstream::json_obj &obj, ArgT arg) {
+    if constexpr (std::is_pointer<ArgT>::value) {
+      obj.value((void *)arg);
+    } else {
+      obj.value((void *)&arg);
+    }
+  }
+
+private:
+  std::ofstream opf;
+  detail::json_stringstream json_ss;
+  detail::json_stringstream::json_array arr;
+};
+
+#ifdef __NVCC__
+inline std::string data_file_prefix = "CodePin_CUDA_";
+#else
+inline std::string data_file_prefix = "CodePin_SYCL_";
+#endif
+
+inline std::string get_data_file_name(std::string_view data_file_prefix) {
+  std::time_t now_time = std::time(nullptr);
+  std::stringstream strs;
+  strs << data_file_prefix
+       << std::put_time(std::localtime(&now_time), "%Y-%m-%d_%H-%M-%S")
+       << ".json";
+  return strs.str();
+}
+
+inline logger log(get_data_file_name(data_file_prefix));
+
+inline std::map<void *, uint32_t> &get_ptr_size_map() {
+  static std::map<void *, uint32_t> ptr_size_map;
+  return ptr_size_map;
+}
+
+inline uint32_t get_ptr_size_in_bytes(void *ptr) {
+  const std::map<void *, uint32_t> &ptr_size_map = get_ptr_size_map();
+  const auto &it = ptr_size_map.find(ptr);
+  return (it != ptr_size_map.end()) ? it->second : 0;
+}
+
+template <class T>
+class data_ser<T*, void> {
+public:
+  static void dump(detail::json_stringstream &ss, T* value,
+                   queue_t queue) {
+    using PointeeType = std::remove_cv_t<std::remove_pointer_t<T>>;
+    PointeeType *non_const_value = const_cast<PointeeType *>(value);
+    if (ptr_unique.find(non_const_value) != ptr_unique.end()) {
+      return;
+    }
+    ptr_unique.insert(non_const_value);
+    int size = get_ptr_size_in_bytes(non_const_value);
+    size = size == 0 ? 1 : size / sizeof(*value);
+    PointeeType *dump_addr = non_const_value;
+    bool is_dev = is_dev_ptr(non_const_value);
+    if (is_dev) {
+      PointeeType *h_data = new PointeeType[size];
+#ifdef __NVCC__
+      cudaMemcpyAsync(h_data, value, size * sizeof(PointeeType),
+                      cudaMemcpyDeviceToHost, queue);
+      cudaStreamSynchronize(queue);
+#else
+      queue->memcpy((void *)h_data, (void *)value, size * sizeof(PointeeType))
+          .wait();
+#endif
+      dump_addr = h_data;
+    }
+    auto arr = ss.array();
+    for (int i = 0; i < size; ++i) {
+      if (size > CODEPIN_SAMPLING_THRESHOLD && i != 0) {
+        float r = static_cast<float>(rand()) / static_cast<float>(RAND_MAX);
+        if (r > (float)CODEPIN_SAMPLING_PERCENT/(float)100)
+          continue;
+      }
+      auto obj = arr.object();
+      detail::data_ser<PointeeType>::print_type_name(obj);
+      obj.key("Data");
+      detail::data_ser<PointeeType>::dump(
+          ss, *(dump_addr + i), queue);
+    }
+    if(is_dev)
+      delete[] dump_addr;
+  }
+  static void print_type_name(
+      detail::json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value("Pointer");
+  }
+};
+
+template <class T>
+class data_ser<T, typename std::enable_if<std::is_array<T>::value>::type> {
+public:
+  static void dump(detail::json_stringstream &ss, T value,
+                   queue_t queue) {
+    auto arr = ss.array();
+    size_t size = sizeof(T) / sizeof(value[0]);
+    for (size_t i = 0; i < size; ++i) {
+      if (size > CODEPIN_SAMPLING_THRESHOLD && i != 0) {
+        float r = static_cast<float>(rand()) / static_cast<float>(RAND_MAX);
+        if (r > (float)CODEPIN_SAMPLING_PERCENT/(float)100)
+          continue;
+      }
+      auto obj = arr.object();
+      detail::data_ser<
+          std::remove_extent_t<T>>::print_type_name(obj);
+      obj.key("Data");
+      detail::data_ser<std::remove_extent_t<T>>::dump(
+          ss, value[i], queue);
+    }
+  }
+  static void print_type_name(
+      detail::json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value("Array");
+  }
+};
+
+template <class... Args>
+void gen_log_API_CP(const std::string &cp_id, std::string device_name,
+                    size_t free_byte, size_t total_byte, float elapse_time,
+                    queue_t queue, Args... args) {
+  if (!rand_seed_setup) {
+    srand(CODEPIN_RAND_SEED);
+    rand_seed_setup = true;
+    std::cout << "CodePin data sampling is enabled for data dump. As follow list 3 "
+                 "configs for data sampling:"
+              << std::endl;
+    std::cout << "CODEPIN_RAND_SEED: " << CODEPIN_RAND_SEED << std::endl;
+    std::cout << "CODEPIN_SAMPLING_THRESHOLD: " << CODEPIN_SAMPLING_THRESHOLD
+              << std::endl;
+    std::cout << "CODEPIN_SAMPLING_PERCENT: " << CODEPIN_SAMPLING_PERCENT
+              << std::endl;
+  }
+  log.print_CP(cp_id, device_name, free_byte, total_byte, elapse_time, queue,
+               args...);
+}
+} // namespace detail
+
+#ifdef __NVCC__
+inline void synchronize(cudaStream_t stream) { cudaStreamSynchronize(stream); }
+#else
+inline void synchronize(sycl::queue *q) { q->wait(); }
+#endif
+
+/// Generate API check point prolog.
+/// \param cp_id The UID of the function call.
+/// \param queue The sycl queue to synchronize the command execution.
+/// \param args The var name string and variable value pair list.
+template <class... Args>
+void gen_prolog_API_CP(const std::string &cp_id,
+                       queue_t queue, Args&&... args) {
+  synchronize(queue);
+  std::string prolog_tag = cp_id + ":" + "prolog";
+  if (api_index.find(cp_id) == api_index.end()) {
+    api_index[cp_id] = 0;
+  } else {
+    api_index[cp_id]++;
+  }
+  std::string event_id =
+      cp_id + ":" + std::to_string(api_index[cp_id]);
+  size_t free_byte, total_byte;
+#ifdef __NVCC__
+  int device;
+  cudaGetDevice(&device);  
+  cudaDeviceProp deviceProp;
+  cudaGetDeviceProperties(&deviceProp, device);
+  std::string device_name(deviceProp.name);
+  cudaMemGetInfo(&free_byte, &total_byte);
+  cudaEvent_t event;
+  cudaEventCreate(&event);
+  cudaEventRecord(event, queue);
+  event_map[event_id] = event;
+#else
+  dpct::get_current_device().get_memory_info(free_byte, total_byte);
+  std::string device_name = dpct::get_current_device().get_info<sycl::info::device::name>();
+#ifdef DPCT_PROFILING_ENABLED
+  sycl::event event = queue->ext_oneapi_submit_barrier();
+  event_map[event_id] = event;
+#endif //DPCT_PROFILING_ENABLED
+#endif
+
+  detail::gen_log_API_CP(prolog_tag, device_name, free_byte, total_byte, 0.0f,
+                         queue, args...);
+}
+
+/// Generate API check point epilog.
+/// \param cp_id The UID of the function call.
+/// \param stream The sycl queue to synchronize the command execution.
+/// \param args The var name string and variable value pair list.
+template <class... Args>
+void gen_epilog_API_CP(const std::string &cp_id,
+                       queue_t queue, Args&&... args) {
+  synchronize(queue);
+  std::string epilog_tag = cp_id + ":" + "epilog";
+  std::string event_id =
+      cp_id + ":" + std::to_string(api_index[cp_id]);
+  size_t free_byte, total_byte;
+  float kernel_elapsed_time = 0.0f;
+#ifdef __NVCC__
+  int device;
+  cudaGetDevice(&device);  
+  cudaDeviceProp deviceProp;
+  cudaGetDeviceProperties(&deviceProp, device);
+  std::string device_name(deviceProp.name);
+  cudaMemGetInfo(&free_byte, &total_byte);
+  cudaEvent_t event;
+  cudaEventCreate(&event);
+  cudaEventRecord(event, queue);
+  auto pre_event = event_map[event_id];
+  event_map.erase(event_id);
+  cudaEventSynchronize(event);
+  cudaEventElapsedTime(&kernel_elapsed_time, pre_event, event);
+#else
+#ifdef DPCT_PROFILING_ENABLED
+  sycl::event event = queue->ext_oneapi_submit_barrier();
+  auto pre_event = event_map[event_id];
+  event_map.erase(event_id);
+  event.wait_and_throw();
+  kernel_elapsed_time =
+      (event.get_profiling_info<sycl::info::event_profiling::command_end>() -
+       pre_event
+           .get_profiling_info<sycl::info::event_profiling::command_start>()) /
+      1000000.0f;
+#endif //DPCT_PROFILING_ENABLED
+  std::string device_name = dpct::get_current_device().get_info<sycl::info::device::name>();
+  dpct::get_current_device().get_memory_info(free_byte, total_byte);
+#endif
+  detail::gen_log_API_CP(epilog_tag, device_name, free_byte, total_byte,
+                         kernel_elapsed_time, queue, args...);
+}
+
+inline std::map<void *, uint32_t> &get_ptr_size_map() {
+  return detail::get_ptr_size_map();
+}
+} // namespace codepin
+} // namespace experimental
+} // namespace dpct
+
+namespace dpctexp = dpct::experimental;
+
+
+#endif // End of __DPCT_CODEPIN_HPP__
diff --git a/sycl/include/dpct/codepin/serialization/basic.hpp b/sycl/include/dpct/codepin/serialization/basic.hpp
new file mode 100644
index 00000000000..6be886bfc2e
--- /dev/null
+++ b/sycl/include/dpct/codepin/serialization/basic.hpp
@@ -0,0 +1,501 @@
+//==----------- basic.hpp ----------------------------*-C++-*-------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===--------------------------------------------------------------------===//
+#ifndef __DPCT_CODEPIN_SER_BASIC_HPP__
+#define __DPCT_CODEPIN_SER_BASIC_HPP__
+
+#if defined(__linux__)
+#include <cxxabi.h>
+#endif
+#include <fstream>
+#include <iostream>
+#include <sstream>
+#include <string>
+#ifdef __NVCC__
+#include <cuda_bf16.h>
+#include <cuda_fp16.h>
+#include <cuda_runtime.h>
+#else
+#include <dpct/dpct.hpp>
+#include <sycl/sycl.hpp>
+#endif
+
+namespace dpct {
+namespace experimental {
+namespace codepin {
+
+#ifdef __NVCC__
+typedef cudaStream_t queue_t;
+#else
+typedef dpct::queue_ptr queue_t;
+#endif
+
+#ifdef __NVCC__
+typedef cudaEvent_t event_t;
+#else
+typedef sycl::event event_t;
+#endif
+
+namespace detail {
+
+inline bool is_dev_ptr(void *p) {
+#ifdef __NVCC__
+  cudaPointerAttributes attr;
+  cudaPointerGetAttributes(&attr, p);
+  if (attr.type == cudaMemoryTypeDevice)
+    return true;
+  return false;
+#else
+  dpct::pointer_attributes attributes;
+  attributes.init(p);
+  if (attributes.get_device_pointer() != nullptr)
+    return true;
+  return false;
+#endif
+}
+
+class json_stringstream {
+  public:
+  json_stringstream(std::ofstream &ofst) : os(ofst) {
+    if (!ofst.is_open()) {
+      throw std::runtime_error("Error while openning file: ");
+    }
+  }
+
+private:
+  std::string indent;
+  const size_t tab_length = 2;
+  std::ofstream &os;
+
+#if defined(__linux__)
+  const std::string newline = "\n";
+#elif defined(_WIN64)
+  const std::string newline = "\r\n";
+#else
+#error Only support windows and Linux.
+#endif
+
+
+public:
+  class json_obj {
+    bool isFirst = true;
+    json_stringstream &js;
+  private:
+    friend class json_stringstream;
+    json_obj(json_stringstream &json_ss) : js(json_ss) {
+      js.os << "{" << js.newline;
+      js.indent.append(js.tab_length, ' ');
+      js.os << js.indent;
+    }
+
+  public:
+    template<class T> T value();
+
+    void key(std::string_view key) {
+      if (!isFirst){
+        js.os << "," << js.newline << js.indent;
+      } else {
+        isFirst = false;
+      }
+      js.os << "\"" << key << "\": ";
+    };
+
+    void value(std::string_view value) { js.os << "\"" << value << "\""; };
+    void value(float value) { js.os << "\"" << value << "\""; };
+    void value(size_t value) { js.os << "\"" << value << "\""; };
+    void value(int value) { js.os << "\"" << value << "\""; };
+    void value(void *value) { js.os << "\"" << value << "\""; };
+    ~json_obj() {
+      js.indent.resize(js.indent.size() - js.tab_length);
+      js.os << js.newline;
+      js.os << js.indent;
+      js.os << "}";
+    }
+  };
+
+  class json_array {
+    bool isFirst = true;
+    json_stringstream &js;
+  public:
+    json_array(json_stringstream &json_ss) : js(json_ss) {
+      if(!(js.os))
+        return;
+      js.os << "[" << js.newline;
+      js.indent.append(js.tab_length, ' ');
+      js.os << js.indent;
+    }
+
+    json_obj object() {
+      if(!isFirst){
+        js.os << "," << js.newline << js.indent;
+      } else {
+        isFirst = false;
+      }
+      return json_obj(js);      
+    }
+
+    template<class MemberT>
+    void member(const MemberT &t) {
+      if(!isFirst){
+        js.os << "," << js.newline << js.indent;
+      } else {
+        isFirst = false;
+      }
+      js.os << t;    
+    }
+
+    ~json_array() {
+      js.indent.resize(js.indent.size() - js.tab_length);
+      js.os << js.newline;
+      js.os << js.indent;
+      js.os << "]";
+    }
+  };
+
+  template <typename T, typename = std::enable_if_t<
+                            !std::is_same_v<const char *, std::decay_t<T>>>>
+  json_stringstream &operator<<(T &&value) {
+    os << std::forward<T>(value);
+    return *this;
+  }
+
+  json_obj object(){
+    return json_obj(*this);
+  }
+  json_array array(){
+    return json_array(*this);
+  }
+};
+
+template <>
+inline json_stringstream::json_obj
+json_stringstream::json_obj::value<json_stringstream::json_obj>() {
+  return js.object();
+}
+
+template <typename T> inline std::string demangle_name() {
+  std::string ret_str = "";
+#if defined(__linux__)
+  int s;
+  auto mangle_name = typeid(T).name();
+  auto demangle_name = abi::__cxa_demangle(mangle_name, NULL, NULL, &s);
+  if (s != 0) {
+    ret_str = "CODEPIN:ERROR:0: Unable to demangle symbol " +
+              std::string(mangle_name) + ".";
+  } else {
+    ret_str = demangle_name;
+    std::free(demangle_name);
+  }
+#else
+  ret_str = typeid(T).name();
+#endif
+  return ret_str;
+}
+
+#ifdef __NVCC__
+template <> inline std::string demangle_name<__half>() { return "fp16"; }
+template <> inline std::string demangle_name<__nv_bfloat16>() { return "bf16"; }
+#else
+template <> inline std::string demangle_name<sycl::half>() { return "fp16"; }
+template <> inline std::string demangle_name<sycl::ext::oneapi::bfloat16>() {
+  return "bf16";
+}
+#endif
+
+template <class T, class T2 = void> class data_ser {
+
+public:
+  static void dump(json_stringstream &ss, T value, queue_t queue) {
+    auto obj = ss.object();
+    obj.key("Data");
+    obj.value("CODEPIN:ERROR:1: Unable to find the corresponding serialization "
+              "function.");
+  }
+  static void print_type_name(json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value(std::string(demangle_name<T>()));
+  }
+};
+
+template <class T>
+class data_ser<T, typename std::enable_if<std::is_arithmetic<T>::value>::type> {
+public:
+  static void dump(json_stringstream &ss, const T &value, queue_t queue) {
+    auto arr = ss.array();
+    arr.member<T>(value);
+  }
+  static void print_type_name(json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value(std::string(demangle_name<T>()));
+  }
+};
+
+#ifdef __NVCC__
+template <> class data_ser<__half> {
+public:
+  static void dump(json_stringstream &ss, const __half &value, queue_t queue) {
+    float f = __half2float(value);
+    auto arr = ss.array();
+    arr.member<float>(value);
+  }
+  static void print_type_name(json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value(std::string(demangle_name<__half>()));
+  }
+};
+template <> class data_ser<__nv_bfloat16> {
+public:
+  static void dump(json_stringstream &ss, const __nv_bfloat16 &value,
+                   queue_t queue) {
+    float f = __bfloat162float(value);
+    auto arr = ss.array();
+    arr.member<float>(value);
+  }
+  static void print_type_name(json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value(std::string(demangle_name<__nv_bfloat16>()));
+  }
+};
+#else
+template <typename T>
+class data_ser<T,
+               typename std::enable_if<
+                   std::is_same<T, sycl::half>::value ||
+                   std::is_same<T, sycl::ext::oneapi::bfloat16>::value>::type> {
+public:
+  static void dump(json_stringstream &ss, const T &value, queue_t queue) {
+    auto arr = ss.array();
+    arr.member<T>(value);
+  }
+  static void print_type_name(json_stringstream::json_obj &obj) {
+    obj.key("Type");
+    obj.value(std::string(demangle_name<T>()));
+  }
+
+};
+#endif
+
+#ifdef __NVCC__
+template <> class data_ser<int3> {
+public:
+  static void dump(json_stringstream &ss, const int3 &value,
+                   queue_t queue) {
+    auto arr = ss.array();
+    {
+      auto obj_x = arr.object();
+      obj_x.key("x");
+      auto value_x =
+          obj_x
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_x);
+      value_x.key("Data");
+      data_ser<int>::dump(ss, value.x, queue);
+    }
+    {
+      auto obj_y = arr.object();
+      obj_y.key("y");
+      auto value_y =
+          obj_y
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_y);
+      value_y.key("Data");
+      data_ser<int>::dump(ss, value.y, queue);
+    }
+    {
+      auto obj_z = arr.object();
+      obj_z.key("z");
+      auto value_z =
+          obj_z
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_z);
+      value_z.key("Data");
+      data_ser<int>::dump(ss, value.z, queue);
+    }
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("int3");
+  }
+};
+
+template <> class data_ser<float3> {
+public:
+  static void dump(json_stringstream &ss, const float3 &value,
+                   queue_t queue) {
+    auto arr = ss.array();
+    {
+      auto obj_x = arr.object();
+      obj_x.key("x");
+      auto value_x =
+          obj_x
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_x);
+      value_x.key("Data");
+      data_ser<float>::dump(ss, value.x, queue);
+    }
+    {
+      auto obj_y = arr.object();
+      obj_y.key("y");
+      auto value_y =
+          obj_y
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_y);
+      value_y.key("Data");
+      data_ser<float>::dump(ss, value.y, queue);
+    }
+    {
+      auto obj_z = arr.object();
+      obj_z.key("z");
+      auto value_z =
+          obj_z
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_z);
+      value_z.key("Data");
+      data_ser<float>::dump(ss, value.z, queue);
+    }
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("float3");
+  }
+};
+
+#else
+template <> class data_ser<sycl::int3> {
+public:
+  static void dump(json_stringstream &ss, const sycl::int3 &value,
+                   queue_t queue) {
+    auto arr = ss.array();
+    {
+      auto obj_x = arr.object();
+      obj_x.key("x");
+      auto value_x =
+          obj_x
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_x);
+      value_x.key("Data");
+      data_ser<int>::dump(ss, value.x(), queue);
+    }
+    {
+      auto obj_y = arr.object();
+      obj_y.key("y");
+      auto value_y =
+          obj_y
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_y);
+      value_y.key("Data");
+      data_ser<int>::dump(ss, value.y(), queue);
+    }
+    {
+      auto obj_z = arr.object();
+      obj_z.key("z");
+      auto value_z =
+          obj_z
+              .value<json_stringstream::json_obj>();
+      data_ser<int>::print_type_name(value_z);
+      value_z.key("Data");
+      data_ser<int>::dump(ss, value.z(), queue);
+    }
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("sycl::int3");
+  }
+};
+
+template <> class data_ser<sycl::float3> {
+public:
+  static void dump(json_stringstream &ss, const sycl::float3 &value,
+                   queue_t queue) {
+    auto arr = ss.array();
+    {
+      auto obj_x = arr.object();
+      obj_x.key("x");
+      auto value_x =
+          obj_x
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_x);
+      value_x.key("Data");
+      data_ser<float>::dump(ss, value.x(), queue);
+    }
+    {
+      auto obj_y = arr.object();
+      obj_y.key("y");
+      auto value_y =
+          obj_y
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_y);
+      value_y.key("Data");
+      data_ser<float>::dump(ss, value.y(), queue);
+    }
+    {
+      auto obj_z = arr.object();
+      obj_z.key("z");
+      auto value_z =
+          obj_z
+              .value<json_stringstream::json_obj>();
+      data_ser<float>::print_type_name(value_z);
+      value_z.key("Data");
+      data_ser<float>::dump(ss, value.z(), queue);
+    }
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("sycl::float3");
+  }
+};
+#endif
+
+template <> class data_ser<char *> {
+public:
+  static void dump(json_stringstream &ss, const char *value,
+                   queue_t queue) {
+    auto obj = ss.object();
+    obj.key("Data");
+    const char *dump_addr = value;
+    bool is_dev = is_dev_ptr((void*)value);
+    if (is_dev) {
+      const char *h_data = new char[strlen(value)];
+#ifdef __NVCC__
+      cudaMemcpyAsync((void *)h_data, (void *)value,
+                      strlen(value) * sizeof(char), cudaMemcpyDeviceToHost,
+                      queue);
+      cudaStreamSynchronize(queue);
+#else
+      queue->memcpy((void *)h_data, (void *)value, strlen(value) * sizeof(char))
+          .wait();
+#endif
+      dump_addr = h_data;    
+    }
+    obj.value(std::string(dump_addr));
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("char *");
+  }
+};
+
+template <> class data_ser<std::string> {
+public:
+  static void dump(json_stringstream &ss, const std::string &value,
+                   queue_t queue) {
+    auto obj = ss.object();
+    obj.key("Data");
+    obj.value(value);
+  }
+  static void print_type_name(json_stringstream::json_obj &obj){
+    obj.key("Type");
+    obj.value("std::string");
+  }
+};
+
+} // namespace detail
+} // namespace codepin
+} // namespace experimental
+} // namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/compat_service.hpp b/sycl/include/dpct/compat_service.hpp
new file mode 100644
index 00000000000..c0d571ec8dd
--- /dev/null
+++ b/sycl/include/dpct/compat_service.hpp
@@ -0,0 +1,122 @@
+//==---- compat_service.hpp -----------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+// This file contains some compatibility service APIs which are used by all
+// library utility helper functions. The compatibility service APIs are based on
+// either dpct implementation or syclcompat implementation, which is controlled
+// by the macro USE_DPCT_HELPER.
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_COMPAT_SERVICE_HPP__
+#define __DPCT_COMPAT_SERVICE_HPP__
+
+namespace dpct {
+namespace cs {
+#if USE_DPCT_HELPER
+namespace ns = ::dpct;
+using memcpy_direction = ::dpct::memcpy_direction;
+template <class... Args> using kernel_name = dpct_kernel_name<Args...>;
+using byte_t = ::dpct::byte_t;
+#else
+namespace ns = ::syclcompat;
+using memcpy_direction = ::syclcompat::detail::memcpy_direction;
+template <class... Args> using kernel_name = syclcompat_kernel_name<Args...>;
+#ifndef __dpct_inline__
+#define __dpct_inline__ __syclcompat_inline__
+#endif
+using byte_t = ::syclcompat::byte_t;
+#endif
+
+using ns::get_current_device;
+using ns::get_default_context;
+using ns::queue_ptr;
+
+namespace detail {
+using ns::detail::get_pointer_attribute;
+using ns::detail::pointer_access_attribute;
+} // namespace detail
+
+inline sycl::queue &get_default_queue() {
+#if USE_DPCT_HELPER
+  return ::dpct::get_default_queue();
+#else
+  return *::syclcompat::detail::dev_mgr::instance()
+              .current_device()
+              .default_queue();
+#endif
+}
+
+inline sycl::event
+memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr, size_t size,
+       memcpy_direction direction = memcpy_direction::automatic,
+       const std::vector<sycl::event> &dep_events = {}) {
+#if USE_DPCT_HELPER
+  return ::dpct::detail::dpct_memcpy(q, to_ptr, from_ptr, size, direction,
+                                     dep_events);
+#else
+  return ::syclcompat::detail::memcpy(q, to_ptr, from_ptr, size, dep_events);
+#endif
+}
+
+inline std::vector<sycl::event>
+memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr, size_t to_pitch,
+       size_t from_pitch, size_t x, size_t y,
+       memcpy_direction direction = memcpy_direction::automatic,
+       const std::vector<sycl::event> &dep_events = {}) {
+#if USE_DPCT_HELPER
+  return ::dpct::detail::dpct_memcpy(
+      q, to_ptr, from_ptr, sycl::range<3>(to_pitch, y, 1),
+      sycl::range<3>(from_pitch, y, 1), sycl::id<3>(0, 0, 0),
+      sycl::id<3>(0, 0, 0), sycl::range<3>(x, y, 1), direction, dep_events);
+#else
+  return ::syclcompat::detail::memcpy(
+      q, to_ptr, from_ptr, sycl::range<3>(to_pitch, y, 1),
+      sycl::range<3>(from_pitch, y, 1), sycl::id<3>(0, 0, 0),
+      sycl::id<3>(0, 0, 0), sycl::range<3>(x, y, 1), dep_events);
+#endif
+}
+
+inline void *malloc(size_t size, sycl::queue q = get_default_queue()) {
+#if USE_DPCT_HELPER
+  return ::dpct::dpct_malloc(size, q);
+#else
+  return ::syclcompat::malloc(size, q);
+#endif
+}
+
+template <typename valueT>
+inline sycl::event fill(sycl::queue &q, void *dev_ptr, valueT value,
+                        size_t size) {
+#if USE_DPCT_HELPER
+  return ::dpct::detail::dpct_memset<valueT>(q, dev_ptr, value, size);
+#else
+  return ::syclcompat::detail::fill<valueT>(q, dev_ptr, value, size);
+#endif
+}
+
+inline void free(void *to_ptr, sycl::queue q) {
+#if USE_DPCT_HELPER
+  return ::dpct::detail::dpct_free(to_ptr, q);
+#else
+  return ::syclcompat::free(to_ptr, q);
+#endif
+}
+
+inline sycl::event enqueue_free(const std::vector<void *> &pointers,
+                                const std::vector<sycl::event> &events,
+                                sycl::queue q = get_default_queue()) {
+#if USE_DPCT_HELPER
+  return ::dpct::detail::async_dpct_free(pointers, events, q);
+#else
+  return ::syclcompat::enqueue_free(pointers, events, q);
+#endif
+}
+
+} // namespace cs
+} // namespace dpct
+
+#endif // __DPCT_COMPAT_SERVICE_HPP__
diff --git a/sycl/include/dpct/detail/blas_gemm_utils_detail.hpp b/sycl/include/dpct/detail/blas_gemm_utils_detail.hpp
new file mode 100644
index 00000000000..45068031431
--- /dev/null
+++ b/sycl/include/dpct/detail/blas_gemm_utils_detail.hpp
@@ -0,0 +1,426 @@
+//==---- blas_gemm_utils_detail.hpp---------------------*- C++ -*-----------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_BLAS_GEMM_UTILS_DETAIL_HPP__
+#define __DPCT_BLAS_GEMM_UTILS_DETAIL_HPP__
+
+namespace dpct::blas_gemm::experimental::detail {
+/// Sacling each row of matrix D with the corresponding element of vector alpha.
+template <class T, class Tscale>
+sycl::event scale_new_a_impl(::dpct::cs::queue_ptr q_ptr, int rows, int cols,
+                             void *a_ptr, const void *alpha_ptr,
+                             bool vector_alpha, bool device_alpha,
+                             const void *a_scale_ptr, const void *b_scale_ptr,
+                             const std::vector<sycl::event> &dependencies) {
+  std::vector<sycl::event> deps = dependencies;
+  T *a = (T *)a_ptr;
+  Tscale *alpha = (Tscale *)alpha_ptr;
+  Tscale *a_scale = (Tscale *)a_scale_ptr;
+  Tscale *b_scale = (Tscale *)b_scale_ptr;
+
+  if (!device_alpha) {
+    Tscale *alpha_host = alpha;
+    alpha = (Tscale *)::dpct::cs::malloc(sizeof(Tscale), *q_ptr);
+    deps.push_back(
+        ::dpct::cs::memcpy(*q_ptr, alpha, alpha_host, sizeof(Tscale)));
+  }
+  if (!a_scale_ptr) {
+    a_scale = (Tscale *)::dpct::cs::malloc(sizeof(Tscale), *q_ptr);
+    deps.push_back(::dpct::cs::fill<Tscale>(*q_ptr, a_scale, 1.0, 1));
+  }
+  if (!b_scale_ptr) {
+    b_scale = (Tscale *)::dpct::cs::malloc(sizeof(Tscale), *q_ptr);
+    deps.push_back(::dpct::cs::fill<Tscale>(*q_ptr, b_scale, 1.0, 1));
+  }
+
+  sycl::event e = q_ptr->submit([&](sycl::handler &cgh) {
+    cgh.depends_on(deps);
+#ifdef DPCT_USM_LEVEL_NONE
+    access_wrapper<T *> a_acc(a, cgh);
+    access_wrapper<Tscale *> alpha_acc(alpha, cgh);
+    access_wrapper<Tscale *> a_scale_acc(a_scale, cgh);
+    access_wrapper<Tscale *> b_scale_acc(b_scale, cgh);
+#endif
+    cgh.parallel_for<
+        ::dpct::cs::kernel_name<class scale_with_alpha, T, Tscale>>(
+        sycl::range<2>(rows, cols), [=](sycl::id<2> index) {
+#ifdef DPCT_USM_LEVEL_NONE
+          T *a_data = a_acc.get_raw_pointer();
+          Tscale *alpha_data = alpha_acc.get_raw_pointer();
+          Tscale *a_scale_data = a_scale_acc.get_raw_pointer();
+          Tscale *b_scale_data = b_scale_acc.get_raw_pointer();
+#else
+          T *a_data = a;
+          const Tscale *alpha_data = alpha;
+          const Tscale *a_scale_data = a_scale;
+          const Tscale *b_scale_data = b_scale;
+#endif
+          size_t row_idx = index.get(0);
+          size_t col_idx = index.get(1);
+          size_t idx = rows * col_idx + row_idx;
+
+          Tscale ab_scale = a_scale_data[0] * b_scale_data[0];
+
+          if (vector_alpha)
+            a_data[idx] = a_data[idx] * alpha_data[row_idx] * ab_scale;
+          else
+            a_data[idx] = a_data[idx] * alpha_data[0] * ab_scale;
+        });
+  });
+  return q_ptr->submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] {
+      if (!device_alpha)
+        ::dpct::cs::free(alpha, *q_ptr);
+      if (!a_scale_ptr)
+        ::dpct::cs::free(a_scale, *q_ptr);
+      if (!b_scale_ptr)
+        ::dpct::cs::free(b_scale, *q_ptr);
+    });
+  });
+}
+
+// a is col major without padding
+inline sycl::event scale_new_a(::dpct::cs::queue_ptr q_ptr, int rows, int cols,
+                               void *a, library_data_t a_type,
+                               const void *alpha, library_data_t scale_type,
+                               bool vector_alpha, bool device_alpha,
+                               const void *a_scale, const void *b_scale,
+                               const std::vector<sycl::event> &deps) {
+  std::uint64_t key = dpct::detail::get_type_combination_id(a_type, scale_type);
+  sycl::event e;
+  switch (key) {
+#define __SCALE_NEW_A_IMPL_CASE(A_TYPE_ENUM, SCALE_TYPE_ENUM, A_TYPE,          \
+                                SCALE_TYPE)                                    \
+  case dpct::detail::get_type_combination_id(                                  \
+      library_data_t::A_TYPE_ENUM, library_data_t::SCALE_TYPE_ENUM): {         \
+    e = scale_new_a_impl<A_TYPE, SCALE_TYPE>(q_ptr, rows, cols, a, alpha,      \
+                                             vector_alpha, device_alpha,       \
+                                             a_scale, b_scale, deps);          \
+    break;                                                                     \
+  }
+    __SCALE_NEW_A_IMPL_CASE(real_int8, real_float, std::int8_t, float)
+    __SCALE_NEW_A_IMPL_CASE(real_int32, real_float, int, float)
+    __SCALE_NEW_A_IMPL_CASE(real_int8, real_int32, std::int8_t, int)
+    __SCALE_NEW_A_IMPL_CASE(real_float, real_float, float, float)
+#undef __SCALE_NEW_A_IMPL_CASE
+  default:
+    throw std::runtime_error("dpct::blas_gemm::experimental::detail::scale_new_"
+                             "a_impl() does not support the data "
+                             "type combination currently.");
+  }
+  return e;
+}
+
+/// Get a linear idx map for a 2D point (row_idx, col_idx) between src_order and
+/// dst_order.
+inline std::tuple<size_t, size_t>
+get_linear_idx_map(size_t rows, size_t cols, size_t src_ld, order_t src_order,
+                   size_t dst_ld, order_t dst_order, size_t row_idx,
+                   size_t col_idx) {
+#define COMBINE(from, to)                                                      \
+  static_cast<std::uint16_t>(from) << 8 | static_cast<std::uint8_t>(to)
+
+  size_t from_linear_idx, to_linear_idx;
+  switch (COMBINE(src_order, dst_order)) {
+  case COMBINE(order_t::col, order_t::row): {
+    from_linear_idx = src_ld * col_idx + row_idx;
+    to_linear_idx = dst_ld * row_idx + col_idx;
+    break;
+  }
+  case COMBINE(order_t::row, order_t::col): {
+    from_linear_idx = src_ld * row_idx + col_idx;
+    to_linear_idx = dst_ld * col_idx + row_idx;
+    break;
+  }
+  case COMBINE(order_t::col, order_t::col32): {
+    from_linear_idx = src_ld * col_idx + row_idx;
+    to_linear_idx = dst_ld * (col_idx / 32) + 32 * row_idx + col_idx % 32;
+    break;
+  }
+  case COMBINE(order_t::col32, order_t::col): {
+    from_linear_idx = src_ld * (col_idx / 32) + 32 * row_idx + col_idx % 32;
+    to_linear_idx = dst_ld * col_idx + row_idx;
+    break;
+  }
+  case COMBINE(order_t::col, order_t::col4_4r2_8c): {
+    from_linear_idx = src_ld * col_idx + row_idx;
+
+    size_t from_row_in_row8_col32 = row_idx % 8;
+    size_t from_col_in_row8_col32 = col_idx % 32;
+
+    size_t to_row_in_row8_col32 =
+        4 * (from_row_in_row8_col32 % 2) + from_col_in_row8_col32 / 8;
+    size_t to_col_in_row8_col32 = 16 * ((from_col_in_row8_col32 / 4) % 2) +
+                                  4 * (from_row_in_row8_col32 / 2) +
+                                  from_col_in_row8_col32 % 4;
+    size_t to_linear_idx_in_row8_col32 =
+        to_row_in_row8_col32 * 32 + to_col_in_row8_col32;
+
+    to_linear_idx = dst_ld * (col_idx / 32) + (row_idx / 8) * (32 * 8) +
+                    to_linear_idx_in_row8_col32;
+    break;
+  }
+  case COMBINE(order_t::col4_4r2_8c, order_t::col): {
+    to_linear_idx = dst_ld * col_idx + row_idx;
+
+    size_t to_row_in_row8_col32 = row_idx % 8;
+    size_t to_col_in_row8_col32 = col_idx % 32;
+
+    size_t from_row_in_row8_col32 =
+        4 * (to_row_in_row8_col32 % 2) + to_col_in_row8_col32 / 8;
+    size_t from_col_in_row8_col32 = 16 * ((to_col_in_row8_col32 / 4) % 2) +
+                                    4 * (to_row_in_row8_col32 / 2) +
+                                    to_col_in_row8_col32 % 4;
+    size_t from_linear_idx_in_row8_col32 =
+        from_row_in_row8_col32 * 32 + from_col_in_row8_col32;
+
+    from_linear_idx = src_ld * (col_idx / 32) + (row_idx / 8) * (32 * 8) +
+                      from_linear_idx_in_row8_col32;
+    break;
+  }
+  case COMBINE(order_t::col, order_t::col32_2r_4r4): {
+    from_linear_idx = src_ld * col_idx + row_idx;
+
+    size_t from_row_in_row32_col32 = row_idx % 32;
+    size_t from_col_in_row32_col32 = col_idx % 32;
+
+    size_t to_row_in_row32_col32 = 8 * ((from_row_in_row32_col32 % 8) / 2) +
+                                   (from_row_in_row32_col32 / 8) * 2 +
+                                   from_row_in_row32_col32 % 2;
+    size_t to_col_in_row32_col32 = from_col_in_row32_col32;
+    size_t to_linear_idx_in_row32_col32 =
+        to_row_in_row32_col32 * 32 + to_col_in_row32_col32;
+
+    to_linear_idx = dst_ld * (col_idx / 32) + (row_idx / 32) * (32 * 32) +
+                    to_linear_idx_in_row32_col32;
+    break;
+  }
+  case COMBINE(order_t::col32_2r_4r4, order_t::col): {
+    to_linear_idx = dst_ld * col_idx + row_idx;
+
+    size_t to_row_in_row32_col32 = row_idx % 32;
+    size_t to_col_in_row32_col32 = col_idx % 32;
+
+    size_t from_row_in_row32_col32 = 8 * ((to_row_in_row32_col32 % 8) / 2) +
+                                     (to_row_in_row32_col32 / 8) * 2 +
+                                     to_row_in_row32_col32 % 2;
+    size_t from_col_in_row32_col32 = to_col_in_row32_col32;
+    size_t from_linear_idx_in_row32_col32 =
+        from_row_in_row32_col32 * 32 + from_col_in_row32_col32;
+
+    from_linear_idx = src_ld * (col_idx / 32) + (row_idx / 32) * (32 * 32) +
+                      from_linear_idx_in_row32_col32;
+    break;
+  }
+  }
+#undef COMBINE
+  return std::make_tuple(from_linear_idx, to_linear_idx);
+}
+
+template <template <typename> typename functor_t, typename... args_t>
+inline auto type_dispatch(library_data_t type, args_t &&...args) {
+  switch (type) {
+  case library_data_t::real_float:
+    return functor_t<float>()(std::forward<args_t>(args)...);
+  case library_data_t::real_int8:
+    return functor_t<std::int8_t>()(std::forward<args_t>(args)...);
+  case library_data_t::real_int32:
+    return functor_t<int>()(std::forward<args_t>(args)...);
+  default:
+    throw std::runtime_error("the data type is unsupported");
+  }
+}
+
+template <typename T> struct matrix_transform_impl {
+  sycl::event operator()(::dpct::cs::queue_ptr q_ptr, size_t rows, size_t cols,
+                         size_t a_ld, order_t a_order, const void *a,
+                         size_t c_ld, order_t c_order, void *c,
+                         std::vector<sycl::event> deps) {
+    if ((a_order != order_t::col && c_order != order_t::col) ||
+        (a_order == order_t::col && c_order == order_t::col)) {
+      throw std::runtime_error("dpct::blas_gemm::experimental::detail::matrix_"
+                               "transform_impl() does not "
+                               "support the order combination currently.");
+    }
+
+    return q_ptr->submit([&](sycl::handler &cgh) {
+      cgh.depends_on(deps);
+#ifdef DPCT_USM_LEVEL_NONE
+      access_wrapper<const T *> a_acc(a, cgh);
+      access_wrapper<T *> c_acc(c, cgh);
+#endif
+      cgh.parallel_for<
+          ::dpct::cs::kernel_name<class matrix_transform_col_to_row, T>>(
+          sycl::range<2>(a_ld, cols), [=](sycl::id<2> index) {
+#ifdef DPCT_USM_LEVEL_NONE
+            auto a_data = a_acc.get_raw_pointer();
+            auto c_data = c_acc.get_raw_pointer();
+#else
+            auto a_data = (const T *)a;
+            auto c_data = (T *)c;
+#endif
+            size_t row_idx = index.get(0);
+            size_t col_idx = index.get(1);
+            if (row_idx < rows) {
+              size_t from_linear_idx, to_linear_idx;
+              std::tie(from_linear_idx, to_linear_idx) = get_linear_idx_map(
+                  rows, cols, a_ld, a_order, c_ld, c_order, row_idx, col_idx);
+              c_data[to_linear_idx] = a_data[from_linear_idx];
+            }
+          });
+    });
+  }
+};
+
+#ifdef DPCT_USM_LEVEL_NONE
+template <typename T> struct scale_d_impl {
+  sycl::event operator()(const void *d_scale_ptr, void *d, size_t ld,
+                         size_t rows, size_t cols, ::dpct::cs::queue_ptr q_ptr,
+                         dpct::library_data_t scale_type,
+                         std::vector<sycl::event> deps) {
+    if (scale_type == dpct::library_data_t::real_float)
+      return q_ptr->submit([&](sycl::handler &cgh) {
+        cgh.depends_on(deps);
+        access_wrapper<const float *> d_scale_acc(
+            static_cast<const float *>(d_scale_ptr), cgh);
+        access_wrapper<T *> d_acc(d, cgh);
+        cgh.parallel_for<::dpct::cs::kernel_name<class scale_d_float, T>>(
+            sycl::range<2>(ld, cols), [=](sycl::id<2> idx) {
+              float scale_factor = d_scale_acc.get_raw_pointer()[0];
+              auto d_data = d_acc.get_raw_pointer();
+              size_t row_idx = idx.get(0);
+              size_t col_idx = idx.get(1);
+              if (row_idx < rows) {
+                size_t linear_idx = row_idx + ld * col_idx;
+                d_data[linear_idx] = d_data[linear_idx] * scale_factor;
+              }
+            });
+      });
+    else {
+      // int type
+      return q_ptr->submit([&](sycl::handler &cgh) {
+        cgh.depends_on(deps);
+        access_wrapper<const int *> d_scale_acc(
+            static_cast<const int *>(d_scale_ptr), cgh);
+        access_wrapper<T *> d_acc(d, cgh);
+        cgh.parallel_for<::dpct::cs::kernel_name<class scale_d_int, T>>(
+            sycl::range<2>(ld, cols), [=](sycl::id<2> idx) {
+              float scale_factor =
+                  static_cast<float>(d_scale_acc.get_raw_pointer()[0]);
+              auto d_data = d_acc.get_raw_pointer();
+              size_t row_idx = idx.get(0);
+              size_t col_idx = idx.get(1);
+              if (row_idx < rows) {
+                size_t linear_idx = row_idx + ld * col_idx;
+                d_data[linear_idx] = d_data[linear_idx] * scale_factor;
+              }
+            });
+      });
+    }
+  }
+};
+
+template <typename T> struct set_buffer_impl {
+  void operator()(::dnnl::memory *dnnl_memory, const void *ptr) {
+    auto buf = get_buffer<T>(ptr);
+    ::dnnl::sycl_interop::set_buffer(*dnnl_memory, buf);
+  }
+};
+#else
+template <typename T> struct scale_d_impl {
+  sycl::event operator()(const void *d_scale_ptr, void *d, size_t ld,
+                         size_t rows, size_t cols, ::dpct::cs::queue_ptr q_ptr,
+                         dpct::library_data_t scale_type,
+                         std::vector<sycl::event> deps) {
+    return q_ptr->submit([&](sycl::handler &cgh) {
+      cgh.depends_on(deps);
+      cgh.parallel_for<::dpct::cs::kernel_name<class scale_d, T>>(
+          sycl::range<2>(ld, cols), [=](sycl::id<2> idx) {
+            float scale_factor;
+            if (scale_type == dpct::library_data_t::real_float)
+              scale_factor = static_cast<const float *>(d_scale_ptr)[0];
+            else {
+              // int type
+              scale_factor =
+                  static_cast<float>(static_cast<const int *>(d_scale_ptr)[0]);
+            }
+            auto d_data = (T *)d;
+            size_t row_idx = idx.get(0);
+            size_t col_idx = idx.get(1);
+            if (row_idx < rows) {
+              size_t linear_idx = row_idx + ld * col_idx;
+              d_data[linear_idx] = d_data[linear_idx] * scale_factor;
+            }
+          });
+    });
+  }
+};
+#endif
+
+template <typename T> struct get_beta_value_impl {
+  int operator()(const void *beta, ::dpct::cs::queue_ptr q_ptr) {
+    T beta_host;
+    ::dpct::cs::memcpy(*q_ptr, &beta_host, beta, sizeof(T),
+                       ::dpct::cs::memcpy_direction::automatic)
+        .wait();
+    T zero = T(0);
+    T one = T(1);
+    if (beta_host == zero)
+      return 0;
+    else if (beta_host == one)
+      return 1;
+    return -1;
+  }
+};
+
+template <typename T> struct abs_max_op {
+  auto operator()(const T &lhs, const T &rhs) {
+    T abs_lhs = lhs >= 0 ? lhs : -lhs;
+    T abs_rhs = rhs >= 0 ? rhs : -rhs;
+    return (abs_lhs < abs_rhs) ? abs_rhs : abs_lhs;
+  }
+};
+
+template <typename T> struct absmax_impl {
+  sycl::event operator()(void *absmax_ptr, const void *new_d, size_t ld,
+                         size_t rows, size_t cols, ::dpct::cs::queue_ptr q_ptr,
+                         std::vector<sycl::event> deps) {
+    return q_ptr->submit([&](sycl::handler &cgh) {
+#ifdef DPCT_USM_LEVEL_NONE
+      auto absmax_reduction = sycl::reduction(
+          get_buffer<T>(absmax_ptr), cgh, T(0), abs_max_op<T>(),
+          {sycl::property::reduction::initialize_to_identity()});
+      access_wrapper<const T *> new_d_acc(new_d, cgh);
+#else
+      auto absmax_reduction = sycl::reduction(
+          (T *)(absmax_ptr), T(0), abs_max_op<T>(),
+          {sycl::property::reduction::initialize_to_identity()});
+#endif
+      cgh.depends_on(deps);
+      cgh.parallel_for<::dpct::cs::kernel_name<class absmax_reduction, T>>(
+          sycl::range<2>(ld, cols), absmax_reduction,
+          [=](sycl::id<2> idx, auto &absmax) {
+#ifdef DPCT_USM_LEVEL_NONE
+            auto new_d_data = new_d_acc.get_raw_pointer();
+#else
+            auto new_d_data = (const T *)new_d;
+#endif
+            size_t row_idx = idx.get(0);
+            size_t col_idx = idx.get(1);
+            if (row_idx < rows) {
+              size_t linear_idx = row_idx + ld * col_idx;
+              absmax.combine(new_d_data[linear_idx]);
+            }
+          });
+    });
+  }
+};
+} // namespace dpct::blas_gemm::experimental::detail
+
+#endif // __DPCT_BLAS_GEMM_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/blas_utils_detail.hpp b/sycl/include/dpct/detail/blas_utils_detail.hpp
new file mode 100644
index 00000000000..d920148cb59
--- /dev/null
+++ b/sycl/include/dpct/detail/blas_utils_detail.hpp
@@ -0,0 +1,649 @@
+//==---- blas_utils_detail.hpp---------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_BLAS_UTILS_DETAIL_HPP__
+#define __DPCT_BLAS_UTILS_DETAIL_HPP__
+
+#include <thread>
+#include <utility>
+#include <vector>
+
+namespace dpct {
+namespace blas {
+namespace detail {
+template <typename target_t, typename source_t> class parameter_wrapper_base_t {
+public:
+  parameter_wrapper_base_t(sycl::queue q, source_t *source, size_t ele_num)
+      : _source_attribute(::dpct::cs::detail::get_pointer_attribute(q, source)),
+        _q(q), _source(source), _ele_num(ele_num),
+        _target(construct_member_variable_target()) {}
+
+  ~parameter_wrapper_base_t() {
+    if (_need_free) {
+      _q.submit([&](sycl::handler &cgh) {
+        cgh.host_task([t = _target, q = _q] { ::dpct::cs::free(t, q); });
+      });
+    }
+  }
+
+protected:
+  ::dpct::cs::detail::pointer_access_attribute _source_attribute;
+  sycl::queue _q;
+  source_t *_source = nullptr;
+  size_t _ele_num;
+  bool _need_free = true;
+  target_t *_target;
+
+private:
+  target_t *construct_member_variable_target() {
+    if constexpr (std::is_same_v<target_t, source_t>) {
+      if (_source_attribute ==
+          ::dpct::cs::detail::pointer_access_attribute::host_only)
+        return (target_t *)::dpct::cs::malloc(sizeof(target_t) * _ele_num, _q);
+#ifdef DPCT_USM_LEVEL_NONE
+      auto alloc = dpct::detail::mem_mgr::instance().translate_ptr(_source);
+      size_t offset = (byte_t *)_source - alloc.alloc_ptr;
+      if (offset)
+        return (target_t *)::dpct::cs::malloc(sizeof(target_t) * _ele_num, _q);
+#endif
+      // If (data type is same && it is device pointer && (USM || buffer offset
+      // is 0)), it can be used directly.
+      _need_free = false;
+      return _source;
+    } else {
+      return (target_t *)::dpct::cs::malloc(sizeof(target_t) * _ele_num, _q);
+    }
+  }
+};
+
+inline library_data_t compute_type_to_library_data_t(compute_type ct) {
+  switch (ct) {
+  case compute_type::f16:
+  case compute_type::f16_standard:
+    return library_data_t::real_half;
+  case compute_type::f32:
+  case compute_type::f32_standard:
+  case compute_type::f32_fast_bf16:
+  case compute_type::f32_fast_tf32:
+    return library_data_t::real_float;
+  case compute_type::f64:
+  case compute_type::f64_standard:
+    return library_data_t::real_double;
+  case compute_type::i32:
+  case compute_type::i32_standard:
+    return library_data_t::real_int32;
+  default:
+    throw std::runtime_error("conversion is not supported.");
+  }
+}
+} // namespace detail
+} // namespace blas
+
+namespace detail {
+
+inline void mem_free(sycl::queue *exec_queue,
+                     std::vector<void *> pointers_array, sycl::event e) {
+  e.wait();
+  for (auto p : pointers_array)
+    sycl::free(p, *exec_queue);
+}
+
+inline int stride_for(int num_elems, int mem_align_in_elems) {
+  return ((num_elems - 1) / mem_align_in_elems + 1) * mem_align_in_elems;
+}
+
+#ifndef DPCT_USM_LEVEL_NONE
+template <typename T> class working_memory {
+  T *_input_ptr;
+  T *_temp_ptr;
+  bool _is_sycl_malloced = false;
+  bool _is_scalar_value = false;
+  sycl::queue _q;
+  sycl::event _e;
+
+public:
+  working_memory(size_t size, sycl::queue q) : _q(q) {
+    _is_scalar_value = false;
+    _temp_ptr = (T *)sycl::malloc_device(size, q);
+  }
+  working_memory(T *result_ptr, sycl::queue q) : _input_ptr(result_ptr), _q(q) {
+    _is_scalar_value = true;
+    _is_sycl_malloced = sycl::get_pointer_type(_input_ptr, _q.get_context()) !=
+                        sycl::usm::alloc::unknown;
+    if (!_is_sycl_malloced)
+      _temp_ptr = sycl::malloc_shared<T>(1, _q);
+  }
+  auto get_ptr() {
+    if (_is_scalar_value && _is_sycl_malloced)
+      return _input_ptr;
+    return _temp_ptr;
+  }
+  void set_event(sycl::event e) { _e = e; }
+  ~working_memory() {
+    if (_is_scalar_value) {
+      if (!_is_sycl_malloced) {
+        _q.memcpy(_input_ptr, _temp_ptr, sizeof(T)).wait();
+        sycl::free(_temp_ptr, _q);
+      }
+    } else {
+      std::vector<void *> ptrs{_temp_ptr};
+      ::dpct::cs::enqueue_free(ptrs, {_e});
+    }
+  }
+};
+#endif
+
+template <typename Tx, typename Tr>
+inline void nrm2_impl(sycl::queue &q, std::int64_t n, const void *x,
+                      std::int64_t incx, void *result) {
+#ifdef DPCT_USM_LEVEL_NONE
+  auto x_buffer = dpct::get_buffer<Tx>(x);
+  auto r_buffer =
+      sycl::buffer<Tr, 1>(reinterpret_cast<Tr *>(result), sycl::range<1>(1));
+  if (dpct::is_device_ptr(result))
+    r_buffer = dpct::get_buffer<Tr>(result);
+  oneapi::mkl::blas::column_major::nrm2(q, n, x_buffer, incx, r_buffer);
+#else
+  working_memory<Tr> res_mem(reinterpret_cast<Tr *>(result), q);
+  oneapi::mkl::blas::column_major::nrm2(q, n, reinterpret_cast<const Tx *>(x),
+                                        incx, res_mem.get_ptr());
+#endif
+}
+
+template <bool is_conjugate, class Txy, class Tr>
+inline void dotuc_impl(sycl::queue &q, std::int64_t n, const Txy *x,
+                       std::int64_t incx, const Txy *y, std::int64_t incy,
+                       Tr *result) {
+#ifdef DPCT_USM_LEVEL_NONE
+  auto x_buffer = dpct::get_buffer<Txy>(x);
+  auto y_buffer = dpct::get_buffer<Txy>(y);
+  auto r_buffer = sycl::buffer<Tr, 1>((Tr *)result, sycl::range<1>(1));
+  if (dpct::is_device_ptr(result))
+    r_buffer = dpct::get_buffer<Tr>(result);
+  if constexpr (std::is_same_v<Txy, std::complex<float>> ||
+                std::is_same_v<Txy, std::complex<double>>) {
+    if constexpr (is_conjugate)
+      oneapi::mkl::blas::column_major::dotc(q, n, x_buffer, incx, y_buffer,
+                                            incy, r_buffer);
+    else
+      oneapi::mkl::blas::column_major::dotu(q, n, x_buffer, incx, y_buffer,
+                                            incy, r_buffer);
+  } else
+    oneapi::mkl::blas::column_major::dot(q, n, x_buffer, incx, y_buffer, incy,
+                                         r_buffer);
+#else
+  working_memory<Tr> res_mem(result, q);
+  if constexpr (std::is_same_v<Txy, std::complex<float>> ||
+                std::is_same_v<Txy, std::complex<double>>) {
+    if constexpr (is_conjugate)
+      oneapi::mkl::blas::column_major::dotc(q, n, x, incx, y, incy,
+                                            res_mem.get_ptr());
+    else
+      oneapi::mkl::blas::column_major::dotu(q, n, x, incx, y, incy,
+                                            res_mem.get_ptr());
+  } else
+    oneapi::mkl::blas::column_major::dot(q, n, x, incx, y, incy,
+                                         res_mem.get_ptr());
+#endif
+}
+
+template <bool is_conjugate>
+inline void dotuc(sycl::queue &q, std::int64_t n, const void *x,
+                  library_data_t x_type, std::int64_t incx, const void *y,
+                  library_data_t y_type, std::int64_t incy, void *result,
+                  library_data_t result_type) {
+  std::uint64_t key =
+      detail::get_type_combination_id(x_type, y_type, result_type);
+  switch (key) {
+  case detail::get_type_combination_id(library_data_t::real_float,
+                                       library_data_t::real_float,
+                                       library_data_t::real_float): {
+    detail::dotuc_impl<is_conjugate>(q, n, reinterpret_cast<const float *>(x),
+                                     incx, reinterpret_cast<const float *>(y),
+                                     incy, reinterpret_cast<float *>(result));
+    break;
+  }
+  case detail::get_type_combination_id(library_data_t::real_double,
+                                       library_data_t::real_double,
+                                       library_data_t::real_double): {
+    detail::dotuc_impl<is_conjugate>(q, n, reinterpret_cast<const double *>(x),
+                                     incx, reinterpret_cast<const double *>(y),
+                                     incy, reinterpret_cast<double *>(result));
+    break;
+  }
+  case detail::get_type_combination_id(library_data_t::complex_float,
+                                       library_data_t::complex_float,
+                                       library_data_t::complex_float): {
+    detail::dotuc_impl<is_conjugate>(
+        q, n, reinterpret_cast<const std::complex<float> *>(x), incx,
+        reinterpret_cast<const std::complex<float> *>(y), incy,
+        reinterpret_cast<std::complex<float> *>(result));
+    break;
+  }
+  case detail::get_type_combination_id(library_data_t::complex_double,
+                                       library_data_t::complex_double,
+                                       library_data_t::complex_double): {
+    detail::dotuc_impl<is_conjugate>(
+        q, n, reinterpret_cast<const std::complex<double> *>(x), incx,
+        reinterpret_cast<const std::complex<double> *>(y), incy,
+        reinterpret_cast<std::complex<double> *>(result));
+    break;
+  }
+#ifdef __INTEL_MKL__
+  case detail::get_type_combination_id(library_data_t::real_half,
+                                       library_data_t::real_half,
+                                       library_data_t::real_half): {
+    detail::dotuc_impl<is_conjugate>(
+        q, n, reinterpret_cast<const sycl::half *>(x), incx,
+        reinterpret_cast<const sycl::half *>(y), incy,
+        reinterpret_cast<sycl::half *>(result));
+    break;
+  }
+#endif
+  default:
+    throw std::runtime_error("the combination of data type is unsupported");
+  }
+}
+
+template <class Tx, class Te>
+inline void scal_impl(sycl::queue &q, std::int64_t n, const void *alpha,
+                      void *x, std::int64_t incx) {
+  Te alpha_val = get_value(reinterpret_cast<const Te *>(alpha), q);
+  auto data_x = get_memory<Tx>(x);
+  oneapi::mkl::blas::column_major::scal(q, n, alpha_val, data_x, incx);
+}
+
+template <class Txy, class Te>
+inline void axpy_impl(sycl::queue &q, std::int64_t n, const void *alpha,
+                      const void *x, std::int64_t incx, void *y,
+                      std::int64_t incy) {
+  Te alpha_val = get_value(reinterpret_cast<const Te *>(alpha), q);
+  auto data_x = get_memory<const Txy>(x);
+  auto data_y = get_memory<Txy>(y);
+  oneapi::mkl::blas::column_major::axpy(q, n, alpha_val, data_x, incx, data_y,
+                                        incy);
+}
+
+template <class Txy, class Tc, class Ts>
+inline void rot_impl(sycl::queue &q, std::int64_t n, void *x, std::int64_t incx,
+                     void *y, std::int64_t incy, const void *c, const void *s) {
+  Tc c_value = get_value(reinterpret_cast<const Tc *>(c), q);
+  Ts s_value = get_value(reinterpret_cast<const Ts *>(s), q);
+  auto data_x = get_memory<Txy>(x);
+  auto data_y = get_memory<Txy>(y);
+  oneapi::mkl::blas::column_major::rot(q, n, data_x, incx, data_y, incy,
+                                       c_value, s_value);
+}
+
+template <class Tx, class Ty, class Tparam>
+inline void rotm_impl(sycl::queue &q, std::int64_t n, void *x, int64_t incx,
+                      void *y, int64_t incy, const void *param) {
+  auto data_x = get_memory<Tx>(x);
+  auto data_y = get_memory<Ty>(y);
+  auto data_param = get_memory<Tparam>(const_cast<void *>(param));
+  oneapi::mkl::blas::column_major::rotm(q, n, data_x, incx, data_y, incy,
+                                        data_param);
+}
+
+template <class Tx, class Ty>
+inline void copy_impl(sycl::queue &q, std::int64_t n, const void *x,
+                      std::int64_t incx, void *y, std::int64_t incy) {
+  auto data_x = get_memory<const Tx>(x);
+  auto data_y = get_memory<Ty>(y);
+  oneapi::mkl::blas::column_major::copy(q, n, data_x, incx, data_y, incy);
+}
+
+template <class Tx, class Ty>
+inline void swap_impl(sycl::queue &q, std::int64_t n, void *x,
+                      std::int64_t incx, void *y, std::int64_t incy) {
+  auto data_x = get_memory<Tx>(x);
+  auto data_y = get_memory<Ty>(y);
+  oneapi::mkl::blas::column_major::swap(q, n, data_x, incx, data_y, incy);
+}
+
+template <class Tx, class Tres>
+inline void asum_impl(sycl::queue &q, std::int64_t n, const void *x,
+                      std::int64_t incx, void *res) {
+  auto data_x = get_memory<Tx>(x);
+  auto data_res = get_memory<Tres>(res);
+  oneapi::mkl::blas::column_major::asum(q, n, data_x, incx, data_res);
+}
+
+template <class T>
+inline void iamax_impl(sycl::queue &q, std::int64_t n, const void *x,
+                       std::int64_t incx, std::int64_t *res) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  auto data_x = get_memory<T>(x);
+  auto data_res = get_memory<std::int64_t>(res);
+  oneapi::mkl::blas::column_major::iamax(q, n, data_x, incx, data_res,
+                                         oneapi::mkl::index_base::one);
+#endif
+}
+
+template <class T>
+inline void iamin_impl(sycl::queue &q, std::int64_t n, const void *x,
+                       std::int64_t incx, std::int64_t *res) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  auto data_x = get_memory<T>(x);
+  auto data_res = get_memory<std::int64_t>(res);
+  oneapi::mkl::blas::column_major::iamin(q, n, data_x, incx, data_res,
+                                         oneapi::mkl::index_base::one);
+#endif
+}
+
+#ifdef __INTEL_MKL__
+template <class Ta, class Tb, class Tc, class Ts>
+inline void gemm_impl(sycl::queue &q, oneapi::mkl::transpose a_trans,
+                      oneapi::mkl::transpose b_trans, int m, int n, int k,
+                      const void *alpha, const void *a, int lda, const void *b,
+                      int ldb, const void *beta, void *c, int ldc,
+                      oneapi::mkl::blas::compute_mode cm) {
+  Ts alpha_value = get_value(reinterpret_cast<const Ts *>(alpha), q);
+  Ts beta_value = get_value(reinterpret_cast<const Ts *>(beta), q);
+  auto data_a = get_memory<const Ta>(a);
+  auto data_b = get_memory<const Tb>(b);
+  auto data_c = get_memory<Tc>(c);
+  oneapi::mkl::blas::column_major::gemm(q, a_trans, b_trans, m, n, k,
+                                        alpha_value, data_a, lda, data_b, ldb,
+                                        beta_value, data_c, ldc, cm);
+}
+#endif
+
+#ifdef __INTEL_MKL__
+#define DPCT_COMPUTE_MODE_PARAM , oneapi::mkl::blas::compute_mode cm
+#define DPCT_COMPUTE_MODE_ARG , cm
+#else
+#define DPCT_COMPUTE_MODE_PARAM
+#define DPCT_COMPUTE_MODE_ARG
+#endif
+
+template <class Ta, class Tb, class Tc, class Ts>
+inline void gemm_batch_impl(sycl::queue &q, oneapi::mkl::transpose a_trans,
+                            oneapi::mkl::transpose b_trans, int m, int n, int k,
+                            const void *alpha, const void **a, int lda,
+                            const void **b, int ldb, const void *beta, void **c,
+                            int ldc, int batch_size DPCT_COMPUTE_MODE_PARAM) {
+  struct matrix_info_t {
+    oneapi::mkl::transpose transpose_info[2];
+    Ts value_info[2];
+    std::int64_t size_info[3];
+    std::int64_t ld_info[3];
+    std::int64_t groupsize_info;
+  };
+
+  Ts alpha_value = get_value(reinterpret_cast<const Ts *>(alpha), q);
+  Ts beta_value = get_value(reinterpret_cast<const Ts *>(beta), q);
+
+  matrix_info_t *matrix_info =
+      (matrix_info_t *)std::malloc(sizeof(matrix_info_t));
+  matrix_info->transpose_info[0] = a_trans;
+  matrix_info->transpose_info[1] = b_trans;
+  matrix_info->value_info[0] = alpha_value;
+  matrix_info->value_info[1] = beta_value;
+  matrix_info->size_info[0] = m;
+  matrix_info->size_info[1] = n;
+  matrix_info->size_info[2] = k;
+  matrix_info->ld_info[0] = lda;
+  matrix_info->ld_info[1] = ldb;
+  matrix_info->ld_info[2] = ldc;
+  matrix_info->groupsize_info = batch_size;
+
+  sycl::event e = oneapi::mkl::blas::column_major::gemm_batch(
+      q, matrix_info->transpose_info, matrix_info->transpose_info + 1,
+      matrix_info->size_info, matrix_info->size_info + 1,
+      matrix_info->size_info + 2, matrix_info->value_info,
+      reinterpret_cast<const Ta **>(a), matrix_info->ld_info,
+      reinterpret_cast<const Tb **>(b), matrix_info->ld_info + 1,
+      matrix_info->value_info + 1, reinterpret_cast<Tc **>(c),
+      matrix_info->ld_info + 2, 1,
+      &(matrix_info->groupsize_info)DPCT_COMPUTE_MODE_ARG);
+
+  q.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] { std::free(matrix_info); });
+  });
+}
+
+template <class Ta, class Tb, class Tc, class Ts>
+inline void gemm_batch_impl(sycl::queue &q, oneapi::mkl::transpose a_trans,
+                            oneapi::mkl::transpose b_trans, int m, int n, int k,
+                            const void *alpha, const void *a, int lda,
+                            long long int stride_a, const void *b, int ldb,
+                            long long int stride_b, const void *beta, void *c,
+                            int ldc, long long int stride_c,
+                            int batch_size DPCT_COMPUTE_MODE_PARAM) {
+  Ts alpha_value = get_value(reinterpret_cast<const Ts *>(alpha), q);
+  Ts beta_value = get_value(reinterpret_cast<const Ts *>(beta), q);
+  auto data_a = get_memory<const Ta>(a);
+  auto data_b = get_memory<const Tb>(b);
+  auto data_c = get_memory<Tc>(c);
+  oneapi::mkl::blas::column_major::gemm_batch(
+      q, a_trans, b_trans, m, n, k, alpha_value, data_a, lda, stride_a, data_b,
+      ldb, stride_b, beta_value, data_c, ldc, stride_c,
+      batch_size DPCT_COMPUTE_MODE_ARG);
+}
+
+template <bool is_hermitian, class T>
+inline void syherk_impl(sycl::queue &q, oneapi::mkl::uplo uplo,
+                        oneapi::mkl::transpose trans, int n, int k,
+                        const void *alpha, const void *a, int lda,
+                        const void *beta, void *c,
+                        int ldc DPCT_COMPUTE_MODE_PARAM) {
+  auto data_a = get_memory<const T>(a);
+  auto data_c = get_memory<T>(c);
+  if constexpr (is_hermitian) {
+    auto alpha_value =
+        get_value(reinterpret_cast<const typename T::value_type *>(alpha), q);
+    auto beta_value =
+        get_value(reinterpret_cast<const typename T::value_type *>(beta), q);
+    oneapi::mkl::blas::column_major::herk(q, uplo, trans, n, k, alpha_value,
+                                          data_a, lda, beta_value, data_c,
+                                          ldc DPCT_COMPUTE_MODE_ARG);
+  } else {
+    T alpha_value = get_value(reinterpret_cast<const T *>(alpha), q);
+    T beta_value = get_value(reinterpret_cast<const T *>(beta), q);
+    oneapi::mkl::blas::column_major::syrk(q, uplo, trans, n, k, alpha_value,
+                                          data_a, lda, beta_value, data_c,
+                                          ldc DPCT_COMPUTE_MODE_ARG);
+  }
+}
+
+template <bool is_hermitian, class T, class Tbeta>
+inline void rk_impl(sycl::queue &q, oneapi::mkl::uplo uplo,
+                    oneapi::mkl::transpose trans, int n, int k, const T *alpha,
+                    const T *a, int lda, const T *b, int ldb, const Tbeta *beta,
+                    T *c, int ldc DPCT_COMPUTE_MODE_PARAM) {
+  // For symmetric matrix, this function performs: C = alpha*OP(A)*(OP(B))^T +
+  // beta*C For Hermitian matrix, this function performs: C =
+  // alpha*OP(A)*(OP(B))^H + beta*C The gemmt() function performs: C =
+  // alpha*OPA(A)*OPB(B) + beta*C So the OPB need be updated before we call
+  // gemmt().
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  using Ts = typename ::dpct::detail::lib_data_traits_t<Tbeta>;
+  Ty alpha_value = get_value(reinterpret_cast<const Ty *>(alpha), q);
+  Ts beta_value = get_value(reinterpret_cast<const Ts *>(beta), q);
+  oneapi::mkl::transpose trans_A = trans, trans_B = trans;
+  int origin_b_rows = trans == oneapi::mkl::transpose::nontrans ? n : k;
+  int origin_b_cols = trans == oneapi::mkl::transpose::nontrans ? k : n;
+
+  if ((is_hermitian && trans == oneapi::mkl::transpose::trans) ||
+      (!is_hermitian && !std::is_floating_point_v<Ty> &&
+       trans == oneapi::mkl::transpose::conjtrans)) {
+    // In this case, OPB need be a conjugate operation,
+    // but only notrans, conjtrans and trans are available.
+    // So we need do a conjtrans operation first, then do a trans operation.
+    trans_B = oneapi::mkl::transpose::trans;
+    auto data_a = get_memory<const Ty>(a);
+    auto data_c = get_memory<Ty>(c);
+#ifdef DPCT_USM_LEVEL_NONE
+    auto new_B_buffer =
+        sycl::buffer<Ty, 1>(sycl::range<1>(origin_b_rows * origin_b_cols));
+    auto from_buffer = dpct::get_buffer<Ty>(b);
+    oneapi::mkl::blas::column_major::omatcopy_batch(
+        q, oneapi::mkl::transpose::conjtrans, origin_b_rows, origin_b_cols,
+        Ts(1.0), from_buffer, ldb, origin_b_rows * ldb, new_B_buffer,
+        origin_b_cols, origin_b_rows * origin_b_cols, 1);
+    oneapi::mkl::blas::column_major::gemmt(
+        q, uplo, trans_A, trans_B, n, k, alpha_value, data_a, lda, new_B_buffer,
+        origin_b_cols, beta_value, data_c, ldc DPCT_COMPUTE_MODE_ARG);
+#else
+    working_memory<T> new_B(origin_b_rows * origin_b_cols * sizeof(T), q);
+    oneapi::mkl::blas::column_major::omatcopy_batch(
+        q, oneapi::mkl::transpose::conjtrans, origin_b_rows, origin_b_cols,
+        Ts(1.0), reinterpret_cast<const Ty *>(b), ldb, origin_b_rows * ldb,
+        reinterpret_cast<Ty *>(new_B.get_ptr()), origin_b_cols,
+        origin_b_rows * origin_b_cols, 1);
+    sycl::event e = oneapi::mkl::blas::column_major::gemmt(
+        q, uplo, trans_A, trans_B, n, k, alpha_value, data_a, lda,
+        reinterpret_cast<Ty *>(new_B.get_ptr()), origin_b_cols, beta_value,
+        data_c, ldc DPCT_COMPUTE_MODE_ARG);
+    new_B.set_event(e);
+#endif
+  } else {
+    if constexpr (is_hermitian) {
+      trans_B = trans == oneapi::mkl::transpose::nontrans
+                    ? oneapi::mkl::transpose::conjtrans
+                    : oneapi::mkl::transpose::nontrans;
+    } else {
+      trans_B = trans == oneapi::mkl::transpose::nontrans
+                    ? oneapi::mkl::transpose::trans
+                    : oneapi::mkl::transpose::nontrans;
+    }
+    auto data_a = get_memory<const Ty>(a);
+    auto data_b = get_memory<const Ty>(b);
+    auto data_c = get_memory<Ty>(c);
+    oneapi::mkl::blas::column_major::gemmt(
+        q, uplo, trans_A, trans_B, n, k, alpha_value, data_a, lda, data_b, ldb,
+        beta_value, data_c, ldc DPCT_COMPUTE_MODE_ARG);
+  }
+}
+
+template <class Ta, class Tb, class Ts>
+inline void
+trsm_batch_impl(sycl::queue &q, oneapi::mkl::side left_right,
+                oneapi::mkl::uplo upper_lower, oneapi::mkl::transpose trans,
+                oneapi::mkl::diag unit_diag, int m, int n, const void *alpha,
+                const void **a, int lda, void **b, int ldb,
+                int batch_size DPCT_COMPUTE_MODE_PARAM) {
+  struct matrix_info_t {
+    matrix_info_t(oneapi::mkl::side side_info, oneapi::mkl::uplo uplo_info,
+                  oneapi::mkl::transpose transpose_info,
+                  oneapi::mkl::diag diag_info, Ts value_info, std::int64_t m,
+                  std::int64_t n, std::int64_t lda, std::int64_t ldb,
+                  std::int64_t groupsize_info)
+        : side_info(side_info), uplo_info(uplo_info),
+          transpose_info(transpose_info), diag_info(diag_info),
+          value_info(value_info), groupsize_info(groupsize_info) {
+      size_info[0] = m;
+      size_info[1] = n;
+      ld_info[0] = lda;
+      ld_info[1] = ldb;
+    }
+    oneapi::mkl::side side_info;
+    oneapi::mkl::uplo uplo_info;
+    oneapi::mkl::transpose transpose_info;
+    oneapi::mkl::diag diag_info;
+    Ts value_info;
+    std::int64_t size_info[2];
+    std::int64_t ld_info[2];
+    std::int64_t groupsize_info;
+  };
+
+  Ts alpha_value = get_value(reinterpret_cast<const Ts *>(alpha), q);
+
+  matrix_info_t *matrix_info =
+      new matrix_info_t(left_right, upper_lower, trans, unit_diag, alpha_value,
+                        m, n, lda, ldb, batch_size);
+
+  sycl::event e = oneapi::mkl::blas::column_major::trsm_batch(
+      q, &(matrix_info->side_info), &(matrix_info->uplo_info),
+      &(matrix_info->transpose_info), &(matrix_info->diag_info),
+      matrix_info->size_info, matrix_info->size_info + 1,
+      &(matrix_info->value_info), reinterpret_cast<const Ta **>(a),
+      matrix_info->ld_info, reinterpret_cast<Tb **>(b),
+      matrix_info->ld_info + 1, 1,
+      &(matrix_info->groupsize_info)DPCT_COMPUTE_MODE_ARG);
+
+  q.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] { delete matrix_info; });
+  });
+}
+
+template <typename T>
+inline void getrfnp_batch_wrapper(sycl::queue &exec_queue, int n, T *a[],
+                                  int lda, int *info, int batch_size) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  // Set the info array value to 0
+  ::dpct::cs::fill<unsigned char>(exec_queue, info, 0,
+                                  sizeof(int) * batch_size);
+  std::int64_t stride_a = n * lda;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::getrfnp_batch_scratchpad_size<Ty>(
+          exec_queue, n, n, lda, stride_a, batch_size);
+
+  Ty *a_strided_mem =
+      (Ty *)::dpct::cs::malloc(stride_a * batch_size * sizeof(Ty), exec_queue);
+  T **host_a = (T **)std::malloc(batch_size * sizeof(T *));
+  ::dpct::cs::memcpy(::dpct::cs::get_default_queue(), host_a, a,
+                     batch_size * sizeof(T *))
+      .wait();
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    ::dpct::cs::memcpy(::dpct::cs::get_default_queue(),
+                       a_strided_mem + i * stride_a, host_a[i],
+                       n * lda * sizeof(T))
+        .wait();
+
+#ifdef DPCT_USM_LEVEL_NONE
+  {
+    sycl::buffer<Ty, 1> scratchpad{sycl::range<1>(scratchpad_size)};
+    auto a_buffer = get_buffer<Ty>(a_strided_mem);
+    oneapi::mkl::lapack::getrfnp_batch(exec_queue, n, n, a_buffer, lda,
+                                       stride_a, batch_size, scratchpad,
+                                       scratchpad_size);
+  }
+  std::vector<sycl::event> events;
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    events.push_back(::dpct::cs::memcpy(
+        exec_queue, host_a[i], a_strided_mem + i * stride_a,
+        n * lda * sizeof(T), ::dpct::cs::memcpy_direction::automatic));
+#else
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, exec_queue);
+  sycl::event e = oneapi::mkl::lapack::getrfnp_batch(
+      exec_queue, n, n, a_strided_mem, lda, stride_a, batch_size, scratchpad,
+      scratchpad_size);
+  std::vector<sycl::event> events;
+  for (std::int64_t i = 0; i < batch_size; ++i)
+    events.push_back(::dpct::cs::memcpy(
+        exec_queue, host_a[i], a_strided_mem + i * stride_a,
+        n * lda * sizeof(T), ::dpct::cs::memcpy_direction::automatic, {e}));
+
+  std::vector<void *> ptrs{scratchpad, a_strided_mem};
+  ::dpct::cs::enqueue_free(ptrs, events, exec_queue);
+#endif
+
+  exec_queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(events);
+    cgh.host_task([=] { std::free(host_a); });
+  });
+#endif
+}
+} // namespace detail
+} // namespace dpct
+
+#endif // __DPCT_BLAS_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/ccl_utils_detail.hpp b/sycl/include/dpct/detail/ccl_utils_detail.hpp
new file mode 100644
index 00000000000..109e0e655f9
--- /dev/null
+++ b/sycl/include/dpct/detail/ccl_utils_detail.hpp
@@ -0,0 +1,37 @@
+//==---- ccl_utils_detail.hpp----------------------------*- C++ -*----------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_CCL_UTILS_DETAIL_HPP__
+#define __DPCT_CCL_UTILS_DETAIL_HPP__
+
+namespace dpct::ccl::detail {
+
+/// Get stored kvs with specified kvs address.
+inline std::shared_ptr<oneapi::ccl::kvs> &
+get_kvs(const oneapi::ccl::kvs::address_type &addr) {
+  struct hash {
+    std::size_t operator()(const oneapi::ccl::kvs::address_type &in) const {
+      return std::hash<std::string_view>()(
+          std::string_view(in.data(), in.size()));
+    }
+  };
+  static std::unordered_map<oneapi::ccl::kvs::address_type,
+                            std::shared_ptr<oneapi::ccl::kvs>, hash>
+      kvs_map;
+  return kvs_map[addr];
+}
+
+/// Help class to init ccl environment.
+class ccl_init_helper {
+public:
+  ccl_init_helper() { oneapi::ccl::init(); }
+};
+
+} // namespace dpct::ccl::detail
+
+#endif // __DPCT_CCL_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/dnnl_utils_detail.hpp b/sycl/include/dpct/detail/dnnl_utils_detail.hpp
new file mode 100644
index 00000000000..ee9d1d30aca
--- /dev/null
+++ b/sycl/include/dpct/detail/dnnl_utils_detail.hpp
@@ -0,0 +1,98 @@
+//==---- dnnl_utils_detail.hpp----------------------------*- C++ -*---------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_DNNL_UTILS_DETAIL_HPP__
+#define __DPCT_DNNL_UTILS_DETAIL_HPP__
+
+namespace dpct::dnnl::detail {
+
+typedef std::string primitive_cache_key_type;
+typedef std::list<primitive_cache_key_type> usage_list_type;
+struct primitive_cache_value_type {
+  ::dnnl::primitive *_primitive;
+  std::unordered_map<int, ::dnnl::memory> *_args;
+  usage_list_type::iterator _usage_it;
+  std::function<void(::dnnl::primitive *)> _destructor;
+  sycl::event _e;
+  sycl::queue _q;
+  primitive_cache_value_type(
+      ::dnnl::primitive *primitive,
+      std::unordered_map<int, ::dnnl::memory> *args,
+      usage_list_type::iterator usage_it,
+      std::function<void(::dnnl::primitive *)> destructor, sycl::event e,
+      sycl::queue q)
+      : _primitive(primitive), _args(args), _usage_it(usage_it),
+        _destructor(destructor), _e(e), _q(q) {}
+};
+struct primitive_and_args {
+  ::dnnl::primitive *primitive;
+  std::unordered_map<int, ::dnnl::memory> *args;
+};
+typedef std::unordered_map<primitive_cache_key_type,
+                           std::shared_ptr<primitive_cache_value_type>>
+    cache_map_type;
+
+// The primitive cache uses LRU replacement policy, and the default cache
+// capacity is 1024.
+class primitive_cache {
+  int _capacity = 1024;
+  usage_list_type usage;
+  cache_map_type cache_map;
+  void touch(cache_map_type::iterator it, sycl::event e = {},
+             bool update_event = false) {
+    if (it->second->_usage_it != usage.begin()) {
+      const primitive_cache_key_type &key = it->first;
+      usage.erase(it->second->_usage_it);
+      usage.push_front(key);
+      it->second->_usage_it = usage.begin();
+    }
+    if (update_event) {
+      it->second->_e = e;
+    }
+  }
+
+public:
+  std::shared_ptr<primitive_cache_value_type>
+  get(const primitive_cache_key_type &key) {
+    auto it = cache_map.find(key);
+    if (it == cache_map.end()) {
+      return nullptr;
+    }
+    touch(it);
+    return it->second;
+  }
+  void put(const primitive_cache_key_type &key, ::dnnl::primitive *value,
+           std::unordered_map<int, ::dnnl::memory> *args,
+           std::function<void(::dnnl::primitive *)> destructor, sycl::event e,
+           sycl::queue *q) {
+    auto it = cache_map.find(key);
+    if (it != cache_map.end()) {
+      touch(it, e, true);
+    } else {
+      if (cache_map.size() == _capacity) {
+        auto v = *(cache_map.find(usage.back())->second);
+        v._q.submit([=](sycl::handler &cgh) {
+          cgh.depends_on(v._e);
+          cgh.host_task([=] {
+            delete v._args;
+            v._destructor(v._primitive);
+          });
+        });
+        cache_map.erase(usage.back());
+        usage.pop_back();
+      }
+      usage.push_front(key);
+      cache_map[key] = std::make_shared<primitive_cache_value_type>(
+          value, args, usage.begin(), destructor, e, *q);
+    }
+  }
+};
+
+} // namespace dpct::dnnl::detail
+
+#endif // __DPCT_DNNL_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/group_utils_detail.hpp b/sycl/include/dpct/detail/group_utils_detail.hpp
new file mode 100644
index 00000000000..db53890fc77
--- /dev/null
+++ b/sycl/include/dpct/detail/group_utils_detail.hpp
@@ -0,0 +1,236 @@
+//==---- group_utils_detail.hpp ---------------------*- C++----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===---------------------------------------------------------------------===//
+#ifndef __DPCT_DETAIL_GROUP_UTILS_DETAIL_HPP__
+#define __DPCT_DETAIL_GROUP_UTILS_DETAIL_HPP__
+
+#include <iterator>
+#include <stdexcept>
+#include <sycl/sycl.hpp>
+
+namespace dpct {
+
+namespace group {
+namespace detail {
+
+typedef uint16_t digit_counter_type;
+typedef uint32_t packed_counter_type;
+
+template <int N, int CURRENT_VAL = N, int COUNT = 0> struct log2 {
+  enum { VALUE = log2<N, (CURRENT_VAL >> 1), COUNT + 1>::VALUE };
+};
+
+template <int N, int COUNT> struct log2<N, 0, COUNT> {
+  enum { VALUE = (1 << (COUNT - 1) < N) ? COUNT : COUNT - 1 };
+};
+
+template <int RADIX_BITS, bool DESCENDING = false> class radix_rank {
+public:
+  static size_t get_local_memory_size(size_t group_threads) {
+    return group_threads * PADDED_COUNTER_LANES * sizeof(packed_counter_type);
+  }
+
+  radix_rank(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  template <typename Item, typename KT, int VALUES_PER_THREAD>
+  __dpct_inline__ void
+  rank_keys(const Item &item, KT (&keys)[VALUES_PER_THREAD],
+            int (&ranks)[VALUES_PER_THREAD], int current_bit, int num_bits) {
+
+    digit_counter_type thread_prefixes[VALUES_PER_THREAD];
+    digit_counter_type *digit_counters[VALUES_PER_THREAD];
+    digit_counter_type *buffer =
+        reinterpret_cast<digit_counter_type *>(_local_memory);
+
+    reset_local_memory(item);
+
+    item.barrier(sycl::access::fence_space::local_space);
+
+#pragma unroll
+    for (int i = 0; i < VALUES_PER_THREAD; ++i) {
+      uint32_t digit = ::dpct::bfe(keys[i], current_bit, num_bits);
+      uint32_t sub_counter = digit >> LOG_COUNTER_LANES;
+      uint32_t counter_lane = digit & (COUNTER_LANES - 1);
+
+      if (DESCENDING) {
+        sub_counter = PACKING_RATIO - 1 - sub_counter;
+        counter_lane = COUNTER_LANES - 1 - counter_lane;
+      }
+
+      digit_counters[i] =
+          &buffer[counter_lane * item.get_local_range().size() * PACKING_RATIO +
+                  item.get_local_linear_id() * PACKING_RATIO + sub_counter];
+      thread_prefixes[i] = *digit_counters[i];
+      *digit_counters[i] = thread_prefixes[i] + 1;
+    }
+
+    item.barrier(sycl::access::fence_space::local_space);
+
+    scan_counters(item);
+
+    item.barrier(sycl::access::fence_space::local_space);
+
+    for (int i = 0; i < VALUES_PER_THREAD; ++i) {
+      ranks[i] = thread_prefixes[i] + *digit_counters[i];
+    }
+  }
+
+private:
+  template <typename Item>
+  __dpct_inline__ void reset_local_memory(const Item &item) {
+    packed_counter_type *ptr =
+        reinterpret_cast<packed_counter_type *>(_local_memory);
+
+#pragma unroll
+    for (int i = 0; i < PADDED_COUNTER_LANES; ++i) {
+      ptr[i * item.get_local_range().size() + item.get_local_linear_id()] = 0;
+    }
+  }
+
+  template <typename Item>
+  __dpct_inline__ packed_counter_type upsweep(const Item &item) {
+    packed_counter_type sum = 0;
+    packed_counter_type *ptr =
+        reinterpret_cast<packed_counter_type *>(_local_memory);
+
+#pragma unroll
+    for (int i = 0; i < PADDED_COUNTER_LANES; i++) {
+      cached_segment[i] =
+          ptr[item.get_local_linear_id() * PADDED_COUNTER_LANES + i];
+    }
+
+#pragma unroll
+    for (int i = 0; i < PADDED_COUNTER_LANES; ++i) {
+      sum += cached_segment[i];
+    }
+
+    return sum;
+  }
+
+  template <typename Item>
+  __dpct_inline__ void exclusive_downsweep(const Item &item,
+                                           packed_counter_type raking_partial) {
+    packed_counter_type *ptr =
+        reinterpret_cast<packed_counter_type *>(_local_memory);
+    packed_counter_type sum = raking_partial;
+
+#pragma unroll
+    for (int i = 0; i < PADDED_COUNTER_LANES; ++i) {
+      packed_counter_type value = cached_segment[i];
+      cached_segment[i] = sum;
+      sum += value;
+    }
+
+#pragma unroll
+    for (int i = 0; i < PADDED_COUNTER_LANES; ++i) {
+      ptr[item.get_local_linear_id() * PADDED_COUNTER_LANES + i] =
+          cached_segment[i];
+    }
+  }
+
+  struct prefix_callback {
+    __dpct_inline__ packed_counter_type
+    operator()(packed_counter_type block_aggregate) {
+      packed_counter_type block_prefix = 0;
+
+#pragma unroll
+      for (int packed = 1; packed < PACKING_RATIO; packed++) {
+        block_prefix += block_aggregate
+                        << (sizeof(digit_counter_type) * 8 * packed);
+      }
+
+      return block_prefix;
+    }
+  };
+
+  template <typename Item>
+  __dpct_inline__ void scan_counters(const Item &item) {
+    packed_counter_type raking_partial = upsweep(item);
+
+    prefix_callback callback;
+    packed_counter_type exclusive_partial = exclusive_scan(
+        item, raking_partial, sycl::ext::oneapi::plus<packed_counter_type>(),
+        callback);
+
+    exclusive_downsweep(item, exclusive_partial);
+  }
+
+private:
+  static constexpr int PACKING_RATIO =
+      sizeof(packed_counter_type) / sizeof(digit_counter_type);
+  static constexpr int LOG_PACKING_RATIO = log2<PACKING_RATIO>::VALUE;
+  static constexpr int LOG_COUNTER_LANES = RADIX_BITS - LOG_PACKING_RATIO;
+  static constexpr int COUNTER_LANES = 1 << LOG_COUNTER_LANES;
+  static constexpr int PADDED_COUNTER_LANES = COUNTER_LANES + 1;
+
+  packed_counter_type cached_segment[PADDED_COUNTER_LANES];
+  uint8_t *_local_memory;
+};
+
+template <typename T, typename U> struct base_traits {
+
+  static __dpct_inline__ U twiddle_in(U key) {
+    throw std::runtime_error("Not implemented");
+  }
+  static __dpct_inline__ U twiddle_out(U key) {
+    throw std::runtime_error("Not implemented");
+  }
+};
+
+template <typename U> struct base_traits<uint32_t, U> {
+  static __dpct_inline__ U twiddle_in(U key) { return key; }
+  static __dpct_inline__ U twiddle_out(U key) { return key; }
+};
+
+template <typename U> struct base_traits<int, U> {
+  static constexpr U HIGH_BIT = U(1) << ((sizeof(U) * 8) - 1);
+  static __dpct_inline__ U twiddle_in(U key) { return key ^ HIGH_BIT; }
+  static __dpct_inline__ U twiddle_out(U key) { return key ^ HIGH_BIT; }
+};
+
+template <typename U> struct base_traits<float, U> {
+  static constexpr U HIGH_BIT = U(1) << ((sizeof(U) * 8) - 1);
+  static __dpct_inline__ U twiddle_in(U key) {
+    U mask = (key & HIGH_BIT) ? U(-1) : HIGH_BIT;
+    return key ^ mask;
+  }
+  static __dpct_inline__ U twiddle_out(U key) {
+    U mask = (key & HIGH_BIT) ? HIGH_BIT : U(-1);
+    return key ^ mask;
+  }
+};
+
+template <typename U> struct base_traits<sycl::half, U> {
+  static constexpr U HIGH_BIT = U(1) << ((sizeof(U) * 8) - 1);
+  static __dpct_inline__ U twiddle_in(U key) {
+    U mask = (key & HIGH_BIT) ? U(-1) : HIGH_BIT;
+    return key ^ mask;
+  }
+  static __dpct_inline__ U twiddle_out(U key) {
+    U mask = (key & HIGH_BIT) ? HIGH_BIT : U(-1);
+    return key ^ mask;
+  }
+};
+
+template <typename T> struct traits : base_traits<T, T> {};
+template <> struct traits<uint32_t> : base_traits<uint32_t, uint32_t> {};
+template <> struct traits<int> : base_traits<int, uint32_t> {};
+template <> struct traits<float> : base_traits<float, uint32_t> {};
+template <> struct traits<sycl::half> : base_traits<sycl::half, uint16_t> {};
+
+template <int N> struct power_of_two {
+  enum { VALUE = ((N & (N - 1)) == 0) };
+};
+
+__dpct_inline__ uint32_t shr_add(uint32_t x, uint32_t shift, uint32_t addend) {
+  return (x >> shift) + addend;
+}
+
+} // namespace detail
+} // namespace group
+} // namespace dpct
+#endif // !__DPCT_DETAIL_GROUP_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/lapack_utils_detail.hpp b/sycl/include/dpct/detail/lapack_utils_detail.hpp
new file mode 100644
index 00000000000..20641f32aaa
--- /dev/null
+++ b/sycl/include/dpct/detail/lapack_utils_detail.hpp
@@ -0,0 +1,625 @@
+//==---- lapack_utils_detail.hpp ------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_LAPACK_UTILS_DETAIL_HPP__
+#define __DPCT_LAPACK_UTILS_DETAIL_HPP__
+
+namespace dpct::lapack::detail {
+template <template <typename> typename functor_t, typename... args_t>
+inline int lapack_shim(sycl::queue &q, library_data_t a_type, int *info,
+                       std::string const &lapack_api_name, args_t &&...args) {
+  auto handle_lapack_exception = [&](const oneapi::mkl::lapack::exception &e) {
+    std::cerr << "Unexpected exception caught during call to LAPACK API: "
+              << lapack_api_name << std::endl
+              << "reason: " << e.what() << std::endl
+              << "info: " << e.info() << std::endl
+              << "detail: " << e.detail() << std::endl;
+    if (e.info() < std::numeric_limits<int>::min() ||
+        e.info() > std::numeric_limits<int>::max()) {
+      throw std::runtime_error("e.info() exceeds the limit of int type");
+    }
+    int info_val = static_cast<int>(e.info());
+    if (info)
+      ::dpct::cs::memcpy(q, info, &info_val, sizeof(int),
+                         ::dpct::cs::memcpy_direction::host_to_device)
+          .wait();
+    return 1;
+  };
+  try {
+    switch (a_type) {
+    case library_data_t::real_float: {
+      functor_t<float>()(std::forward<args_t>(args)...);
+      break;
+    }
+    case library_data_t::real_double: {
+      functor_t<double>()(std::forward<args_t>(args)...);
+      break;
+    }
+    case library_data_t::complex_float: {
+      functor_t<std::complex<float>>()(std::forward<args_t>(args)...);
+      break;
+    }
+    case library_data_t::complex_double: {
+      functor_t<std::complex<double>>()(std::forward<args_t>(args)...);
+      break;
+    }
+    default:
+      throw std::runtime_error("the data type is unsupported");
+    }
+  } catch (oneapi::mkl::lapack::batch_error const &be) {
+    try {
+      std::rethrow_exception(be.exceptions()[0]);
+    } catch (oneapi::mkl::lapack::exception &e) {
+      return handle_lapack_exception(e);
+    }
+  } catch (oneapi::mkl::lapack::exception const &e) {
+    return handle_lapack_exception(e);
+  } catch (sycl::exception const &e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    if (info)
+      ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int)).wait();
+    return 1;
+  }
+  return 0;
+}
+
+template <typename T> class working_memory {
+public:
+  working_memory(std::size_t element_number, const sycl::queue &q) : _q(q) {
+    _ptr = ::dpct::cs::malloc(element_number * sizeof(T), _q);
+  }
+  auto get_memory() { return dpct::detail::get_memory<T>(_ptr); }
+  auto get_ptr() { return _ptr; }
+  void set_event(sycl::event e) { _e = e; }
+  ~working_memory() {
+    if (_ptr) {
+      ::dpct::cs::enqueue_free({_ptr}, {_e}, _q);
+    }
+  }
+
+private:
+  void *_ptr = nullptr;
+  sycl::event _e;
+  sycl::queue _q;
+};
+
+std::size_t byte_to_element_number(std::size_t size_in_byte,
+                                   dpct::library_data_t element_type) {
+  auto dv = std::lldiv(
+      size_in_byte,
+      dpct::detail::library_data_size[static_cast<unsigned int>(element_type)] /
+          8);
+  if (dv.rem) {
+    throw std::runtime_error(
+        "size_in_byte is not divisible by the size of element (in bytes)");
+  }
+  return dv.quot;
+}
+std::size_t element_number_to_byte(std::size_t size_in_element,
+                                   dpct::library_data_t element_type) {
+  auto dv = std::lldiv(
+      dpct::detail::library_data_size[static_cast<unsigned int>(element_type)],
+      8);
+  if (dv.rem) {
+    throw std::runtime_error(
+        "the size of element (in bits) is not divisible by 8");
+  }
+  return size_in_element * dv.quot;
+}
+
+inline oneapi::mkl::jobsvd char2jobsvd(signed char job) {
+  switch (job) {
+  case 'A':
+    return oneapi::mkl::jobsvd::vectors;
+  case 'S':
+    return oneapi::mkl::jobsvd::somevec;
+  case 'O':
+    return oneapi::mkl::jobsvd::vectorsina;
+  case 'N':
+    return oneapi::mkl::jobsvd::novec;
+  default:
+    throw std::runtime_error("the job type is unsupported");
+  }
+}
+
+template <typename T> struct getrf_scratchpad_size_impl {
+  void operator()(sycl::queue &q, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, std::int64_t lda,
+                  std::size_t &device_ws_size) {
+    device_ws_size =
+        oneapi::mkl::lapack::getrf_scratchpad_size<T>(q, m, n, lda);
+  }
+};
+
+template <typename T> struct getrf_impl {
+  void operator()(sycl::queue &q, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  std::int64_t *ipiv, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+    auto ipiv_data = dpct::detail::get_memory<std::int64_t>(ipiv);
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::getrf(q, m, n, a_data, lda, ipiv_data, device_ws_data,
+                               device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+
+template <typename T> struct getrs_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::transpose trans, std::int64_t n,
+                  std::int64_t nrhs, library_data_t a_type, void *a,
+                  std::int64_t lda, std::int64_t *ipiv, library_data_t b_type,
+                  void *b, std::int64_t ldb, int *info) {
+    auto ipiv_data = dpct::detail::get_memory<std::int64_t>(ipiv);
+    std::int64_t device_ws_size = oneapi::mkl::lapack::getrs_scratchpad_size<T>(
+        q, trans, n, nrhs, lda, ldb);
+    working_memory<T> device_ws(device_ws_size, q);
+    auto device_ws_data = device_ws.get_memory();
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto b_data = dpct::detail::get_memory<T>(b);
+    oneapi::mkl::lapack::getrs(q, trans, n, nrhs, a_data, lda, ipiv_data,
+                               b_data, ldb, device_ws_data, device_ws_size);
+    sycl::event e = ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+    device_ws.set_event(e);
+  }
+};
+
+template <typename T> struct geqrf_scratchpad_size_impl {
+  void operator()(sycl::queue &q, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, std::int64_t lda,
+                  std::size_t &device_ws_size) {
+    device_ws_size =
+        oneapi::mkl::lapack::geqrf_scratchpad_size<T>(q, m, n, lda);
+  }
+};
+
+template <typename T> struct geqrf_impl {
+  void operator()(sycl::queue &q, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  library_data_t tau_type, void *tau, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto tau_data = dpct::detail::get_memory<T>(tau);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::geqrf(q, m, n, a_data, lda, tau_data, device_ws_data,
+                               device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+
+template <typename T> struct getrfnp_impl {
+  void operator()(sycl::queue &q, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  std::int64_t *ipiv, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    std::int64_t a_stride = m * lda;
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::getrfnp_batch(q, m, n, a_data, lda, a_stride, 1,
+                                       device_ws_data, device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+#endif
+  }
+};
+
+template <typename T> struct gesvd_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::jobsvd jobu,
+                  oneapi::mkl::jobsvd jobvt, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, std::int64_t lda,
+                  library_data_t u_type, std::int64_t ldu,
+                  library_data_t vt_type, std::int64_t ldvt,
+                  std::size_t &device_ws_size) {
+    device_ws_size = oneapi::mkl::lapack::gesvd_scratchpad_size<T>(
+        q, jobu, jobvt, m, n, lda, ldu, ldvt);
+  }
+};
+
+template <typename T> struct ElementType { using value_tpye = T; };
+template <typename T> struct ElementType<std::complex<T>> {
+  using value_tpye = T;
+};
+template <typename T> struct gesvd_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::jobsvd jobu,
+                  oneapi::mkl::jobsvd jobvt, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  library_data_t s_type, void *s, library_data_t u_type,
+                  void *u, std::int64_t ldu, library_data_t vt_type, void *vt,
+                  std::int64_t ldvt, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto s_data =
+        dpct::detail::get_memory<typename ElementType<T>::value_tpye>(s);
+    auto u_data = dpct::detail::get_memory<T>(u);
+    auto vt_data = dpct::detail::get_memory<T>(vt);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::gesvd(q, jobu, jobvt, m, n, a_data, lda, s_data,
+                               u_data, ldu, vt_data, ldvt, device_ws_data,
+                               device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+template <typename T> struct gesvd_conj_impl : public gesvd_impl<T> {
+  void operator()(sycl::queue &q, oneapi::mkl::jobsvd jobu,
+                  oneapi::mkl::jobsvd jobvt, std::int64_t m, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  library_data_t s_type, void *s, library_data_t u_type,
+                  void *u, std::int64_t ldu, library_data_t vt_type, void *vt,
+                  std::int64_t ldvt, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using base = gesvd_impl<T>;
+    base::operator()(q, jobu, jobvt, m, n, a_type, a, lda, s_type, s, u_type, u,
+                     ldu, vt_type, vt, ldvt, device_ws, device_ws_size, info);
+    auto vt_data = dpct::detail::get_memory<T>(vt);
+    oneapi::mkl::blas::row_major::imatcopy(q, oneapi::mkl::transpose::conjtrans,
+                                           n, n, T(1.0f), vt_data, ldvt, ldvt);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+#endif
+  }
+};
+
+template <typename T> struct potrf_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::uplo uplo, std::int64_t n,
+                  library_data_t a_type, std::int64_t lda,
+                  std::size_t &device_ws_size) {
+    device_ws_size =
+        oneapi::mkl::lapack::potrf_scratchpad_size<T>(q, uplo, n, lda);
+  }
+};
+
+template <typename T> struct potrf_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::uplo uplo, std::int64_t n,
+                  library_data_t a_type, void *a, std::int64_t lda,
+                  void *device_ws, std::size_t device_ws_size, int *info) {
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::potrf(q, uplo, n, a_data, lda, device_ws_data,
+                               device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+
+template <typename T> struct potrs_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::uplo uplo, std::int64_t n,
+                  std::int64_t nrhs, library_data_t a_type, void *a,
+                  std::int64_t lda, library_data_t b_type, void *b,
+                  std::int64_t ldb, int *info) {
+    std::int64_t device_ws_size = oneapi::mkl::lapack::potrs_scratchpad_size<T>(
+        q, uplo, n, nrhs, lda, ldb);
+    working_memory<T> device_ws(device_ws_size, q);
+    auto device_ws_data = device_ws.get_memory();
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto b_data = dpct::detail::get_memory<T>(b);
+    oneapi::mkl::lapack::potrs(q, uplo, n, nrhs, a_data, lda, b_data, ldb,
+                               device_ws_data, device_ws_size);
+    sycl::event e = ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+    device_ws.set_event(e);
+  }
+};
+
+template <typename T> struct value_type_trait { using value_type = T; };
+template <typename T> struct value_type_trait<std::complex<T>> {
+  using value_type = T;
+};
+
+template <typename T> auto lamch_s() {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  if constexpr (std::is_same_v<T, float>) {
+    return slamch("S");
+  } else if constexpr (std::is_same_v<T, double>) {
+    return dlamch("S");
+  }
+  throw std::runtime_error("the type is unsupported");
+#endif
+}
+
+#define DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(FUNC, ...)                          \
+  do {                                                                         \
+    if constexpr (std::is_floating_point_v<T>) {                               \
+      device_ws_size = oneapi::mkl::lapack::sy##FUNC(__VA_ARGS__);             \
+    } else {                                                                   \
+      device_ws_size = oneapi::mkl::lapack::he##FUNC(__VA_ARGS__);             \
+    }                                                                          \
+  } while (0)
+
+#define DISPATCH_FLOAT_FOR_CALCULATION(FUNC, ...)                              \
+  do {                                                                         \
+    if constexpr (std::is_floating_point_v<T>) {                               \
+      oneapi::mkl::lapack::sy##FUNC(__VA_ARGS__);                              \
+    } else {                                                                   \
+      oneapi::mkl::lapack::he##FUNC(__VA_ARGS__);                              \
+    }                                                                          \
+  } while (0)
+
+template <typename T> struct syheevx_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::compz jobz,
+                  oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                  std::int64_t n, std::int64_t lda, void *vl, void *vu,
+                  std::int64_t il, std::int64_t iu,
+                  std::size_t &device_ws_size) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using value_t = typename value_type_trait<T>::value_type;
+    auto vl_value = *reinterpret_cast<value_t *>(vl);
+    auto vu_value = *reinterpret_cast<value_t *>(vu);
+    auto abstol = 2 * lamch_s<value_t>();
+    DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(evx_scratchpad_size<T>, q, jobz, range,
+                                       uplo, n, lda, vl_value, vu_value, il, iu,
+                                       abstol, lda);
+#endif
+  }
+};
+
+template <typename T> constexpr library_data_t get_library_data_t_from_type() {
+  if constexpr (std::is_same_v<T, float>) {
+    return library_data_t::real_float;
+  } else if constexpr (std::is_same_v<T, double>) {
+    return library_data_t::real_double;
+  } else if constexpr (std::is_same_v<T, sycl::float2> ||
+                       std::is_same_v<T, std::complex<float>>) {
+    return library_data_t::complex_float;
+  } else if constexpr (std::is_same_v<T, sycl::double2> ||
+                       std::is_same_v<T, std::complex<double>>) {
+    return library_data_t::complex_double;
+  }
+  throw std::runtime_error("the type is unsupported");
+}
+
+template <typename T> struct syheevx_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::compz jobz,
+                  oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                  std::int64_t n, library_data_t a_type, void *a,
+                  std::int64_t lda, void *vl, void *vu, std::int64_t il,
+                  std::int64_t iu, std::int64_t *m, library_data_t w_type,
+                  void *w, void *device_ws, std::size_t device_ws_size,
+                  int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using value_t = typename value_type_trait<T>::value_type;
+    working_memory<T> z(n * lda, q);
+    working_memory<std::int64_t> m_device(1, q);
+    auto z_data = z.get_memory();
+    auto m_device_data = m_device.get_memory();
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    auto vl_value = *reinterpret_cast<value_t *>(vl);
+    auto vu_value = *reinterpret_cast<value_t *>(vu);
+    auto w_data = dpct::detail::get_memory<value_t>(w);
+    auto abstol = 2 * lamch_s<value_t>();
+    DISPATCH_FLOAT_FOR_CALCULATION(evx, q, jobz, range, uplo, n, a_data, lda,
+                                   vl_value, vu_value, il, iu, abstol,
+                                   m_device_data, w_data, z_data, lda,
+                                   device_ws_data, device_ws_size);
+    ::dpct::cs::memcpy(q, a, z.get_ptr(), n * lda * sizeof(T),
+                       ::dpct::cs::memcpy_direction::device_to_device);
+    ::dpct::cs::memcpy(q, m, m_device.get_ptr(), sizeof(std::int64_t),
+                       ::dpct::cs::memcpy_direction::device_to_host);
+    sycl::event e = ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+    z.set_event(e);
+    m_device.set_event(e);
+#endif
+  }
+};
+
+template <typename T> struct syhegvx_scratchpad_size_impl {
+  void operator()(sycl::queue &q, std::int64_t itype, oneapi::mkl::compz jobz,
+                  oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                  std::int64_t n, std::int64_t lda, std::int64_t ldb, void *vl,
+                  void *vu, std::int64_t il, std::int64_t iu,
+                  std::size_t &device_ws_size) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using value_t = typename value_type_trait<T>::value_type;
+    auto vl_value = *reinterpret_cast<value_t *>(vl);
+    auto vu_value = *reinterpret_cast<value_t *>(vu);
+    auto abstol = 2 * lamch_s<value_t>();
+    DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(gvx_scratchpad_size<T>, q, itype, jobz,
+                                       range, uplo, n, lda, ldb, vl_value,
+                                       vu_value, il, iu, abstol, lda);
+#endif
+  }
+};
+
+template <typename T> struct syhegvx_impl {
+  void operator()(sycl::queue &q, std::int64_t itype, oneapi::mkl::compz jobz,
+                  oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                  std::int64_t n, void *a, std::int64_t lda, void *b,
+                  std::int64_t ldb, void *vl, void *vu, std::int64_t il,
+                  std::int64_t iu, std::int64_t *m, void *w, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using value_t = typename value_type_trait<T>::value_type;
+    working_memory<T> z(n * lda, q);
+    working_memory<std::int64_t> m_device(1, q);
+    auto z_data = z.get_memory();
+    auto m_device_data = m_device.get_memory();
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto b_data = dpct::detail::get_memory<T>(b);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    auto vl_value = *reinterpret_cast<value_t *>(vl);
+    auto vu_value = *reinterpret_cast<value_t *>(vu);
+    auto w_data = dpct::detail::get_memory<value_t>(w);
+    auto abstol = 2 * lamch_s<value_t>();
+    DISPATCH_FLOAT_FOR_CALCULATION(gvx, q, itype, jobz, range, uplo, n, a_data,
+                                   lda, b_data, ldb, vl_value, vu_value, il, iu,
+                                   abstol, m_device_data, w_data, z_data, lda,
+                                   device_ws_data, device_ws_size);
+    ::dpct::cs::memcpy(q, a, z.get_ptr(), n * lda * sizeof(T),
+                       ::dpct::cs::memcpy_direction::device_to_device);
+    ::dpct::cs::memcpy(q, m, m_device.get_ptr(), sizeof(std::int64_t),
+                       ::dpct::cs::memcpy_direction::device_to_host);
+    sycl::event e = ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+    z.set_event(e);
+    m_device.set_event(e);
+#endif
+  }
+};
+
+template <typename T> struct syhegvd_scratchpad_size_impl {
+  void operator()(sycl::queue &q, std::int64_t itype, oneapi::mkl::job jobz,
+                  oneapi::mkl::uplo uplo, std::int64_t n, std::int64_t lda,
+                  std::int64_t ldb, std::size_t &device_ws_size) {
+    DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(gvd_scratchpad_size<T>, q, itype, jobz,
+                                       uplo, n, lda, ldb);
+  }
+};
+
+template <typename T> struct syhegvd_impl {
+  void operator()(sycl::queue &q, std::int64_t itype, oneapi::mkl::job jobz,
+                  oneapi::mkl::uplo uplo, std::int64_t n, void *a,
+                  std::int64_t lda, void *b, std::int64_t ldb, void *w,
+                  void *device_ws, std::size_t device_ws_size, int *info) {
+    using value_t = typename value_type_trait<T>::value_type;
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto b_data = dpct::detail::get_memory<T>(b);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    auto w_data = dpct::detail::get_memory<value_t>(w);
+    DISPATCH_FLOAT_FOR_CALCULATION(gvd, q, itype, jobz, uplo, n, a_data, lda,
+                                   b_data, ldb, w_data, device_ws_data,
+                                   device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+
+oneapi::mkl::compz job2compz(const oneapi::mkl::job &job) {
+  oneapi::mkl::compz ret;
+  if (job == oneapi::mkl::job::novec) {
+    ret = oneapi::mkl::compz::novectors;
+  } else if (job == oneapi::mkl::job::vec) {
+    ret = oneapi::mkl::compz::vectors;
+  } else {
+    throw std::runtime_error("the job type is unsupported");
+  }
+  return ret;
+}
+
+template <typename T> struct syheev_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::compz jobz,
+                  oneapi::mkl::uplo uplo, std::int64_t n, std::int64_t lda,
+                  std::size_t &device_ws_size) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(ev_scratchpad_size<T>, q, jobz, uplo, n,
+                                       lda);
+#endif
+  }
+};
+
+template <typename T> struct syheev_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::compz jobz,
+                  oneapi::mkl::uplo uplo, std::int64_t n, void *a,
+                  std::int64_t lda, void *w, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using value_t = typename value_type_trait<T>::value_type;
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    auto w_data = dpct::detail::get_memory<value_t>(w);
+    DISPATCH_FLOAT_FOR_CALCULATION(ev, q, jobz, uplo, n, a_data, lda, w_data,
+                                   device_ws_data, device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+#endif
+  }
+};
+
+template <typename T> struct syheevd_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::job jobz, oneapi::mkl::uplo uplo,
+                  std::int64_t n, library_data_t a_type, std::int64_t lda,
+                  std::size_t &device_ws_size) {
+    DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE(evd_scratchpad_size<T>, q, jobz, uplo, n,
+                                       lda);
+  }
+};
+
+template <typename T> struct syheevd_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::job jobz, oneapi::mkl::uplo uplo,
+                  std::int64_t n, library_data_t a_type, void *a,
+                  std::int64_t lda, void *w, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+    using value_t = typename value_type_trait<T>::value_type;
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    auto w_data = dpct::detail::get_memory<value_t>(w);
+    DISPATCH_FLOAT_FOR_CALCULATION(evd, q, jobz, uplo, n, a_data, lda, w_data,
+                                   device_ws_data, device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+  }
+};
+
+#undef DISPATCH_FLOAT_FOR_SCRATCHPAD_SIZE
+#undef DISPATCH_FLOAT_FOR_CALCULATION
+
+template <typename T> struct trtri_scratchpad_size_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::uplo uplo,
+                  oneapi::mkl::diag diag, std::int64_t n, library_data_t a_type,
+                  std::int64_t lda, std::size_t &device_ws_size) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    device_ws_size =
+        oneapi::mkl::lapack::trtri_scratchpad_size<T>(q, uplo, diag, n, lda);
+#endif
+  }
+};
+
+template <typename T> struct trtri_impl {
+  void operator()(sycl::queue &q, oneapi::mkl::uplo uplo,
+                  oneapi::mkl::diag diag, std::int64_t n, library_data_t a_type,
+                  void *a, std::int64_t lda, void *device_ws,
+                  std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    auto a_data = dpct::detail::get_memory<T>(a);
+    auto device_ws_data = dpct::detail::get_memory<T>(device_ws);
+    oneapi::mkl::lapack::trtri(q, uplo, diag, n, a_data, lda, device_ws_data,
+                               device_ws_size);
+    ::dpct::cs::fill<unsigned char>(q, info, 0, sizeof(int));
+#endif
+  }
+};
+} // namespace dpct::lapack::detail
+
+#endif // __DPCT_LAPACK_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/lib_common_utils_detail.hpp b/sycl/include/dpct/detail/lib_common_utils_detail.hpp
new file mode 100644
index 00000000000..764925cbb2b
--- /dev/null
+++ b/sycl/include/dpct/detail/lib_common_utils_detail.hpp
@@ -0,0 +1,149 @@
+//==---- lib_common_utils_detail.hpp --------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_LIB_COMMON_UTILS_DETAIL_HPP__
+#define __DPCT_LIB_COMMON_UTILS_DETAIL_HPP__
+
+namespace dpct::detail {
+template <typename T> struct lib_data_traits { using type = T; };
+template <typename T> struct lib_data_traits<sycl::vec<T, 2>> {
+  using type = std::complex<T>;
+};
+template <class T> using lib_data_traits_t = typename lib_data_traits<T>::type;
+
+template <typename T> inline auto get_memory(const void *x) {
+  T *new_x = reinterpret_cast<T *>(const_cast<void *>(x));
+#ifdef DPCT_USM_LEVEL_NONE
+  return dpct::get_buffer<std::remove_cv_t<T>>(new_x);
+#else
+  return new_x;
+#endif
+}
+
+template <typename T>
+inline typename ::dpct::detail::lib_data_traits_t<T> get_value(const T *s,
+                                                               sycl::queue &q) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  Ty s_h;
+  if (::dpct::cs::detail::get_pointer_attribute(q, s) ==
+      ::dpct::cs::detail::pointer_access_attribute::device_only)
+    ::dpct::cs::memcpy(q, (void *)&s_h, (void *)s, sizeof(T),
+                       ::dpct::cs::memcpy_direction::device_to_host)
+        .wait();
+  else
+    s_h = *reinterpret_cast<const Ty *>(s);
+  return s_h;
+}
+
+template <typename ArgT>
+inline constexpr std::uint64_t get_type_combination_id(ArgT Val) {
+  static_assert((unsigned char)library_data_t::library_data_t_size <=
+                    std::numeric_limits<unsigned char>::max() &&
+                "library_data_t size exceeds limit.");
+  static_assert(std::is_same_v<ArgT, library_data_t>, "Unsupported ArgT");
+  return (std::uint64_t)Val;
+}
+
+template <typename FirstT, typename... RestT>
+inline constexpr std::uint64_t get_type_combination_id(FirstT FirstVal,
+                                                       RestT... RestVal) {
+  static_assert((std::uint8_t)library_data_t::library_data_t_size <=
+                    std::numeric_limits<unsigned char>::max() &&
+                "library_data_t size exceeds limit.");
+  static_assert(sizeof...(RestT) <= 8 && "Too many parameters");
+  static_assert(std::is_same_v<FirstT, library_data_t>, "Unsupported FirstT");
+  return get_type_combination_id(RestVal...) << 8 | ((std::uint64_t)FirstVal);
+}
+
+inline constexpr std::size_t library_data_size[] = {
+    8 * sizeof(float),                    // real_float
+    8 * sizeof(std::complex<float>),      // complex_float
+    8 * sizeof(double),                   // real_double
+    8 * sizeof(std::complex<double>),     // complex_double
+    8 * sizeof(sycl::half),               // real_half
+    8 * sizeof(std::complex<sycl::half>), // complex_half
+    16,                                   // real_bfloat16
+    16 * 2,                               // complex_bfloat16
+    4,                                    // real_int4
+    4 * 2,                                // complex_int4
+    4,                                    // real_uint4
+    4 * 2,                                // complex_uint4
+    8,                                    // real_int8
+    8 * 2,                                // complex_int8
+    8,                                    // real_uint8
+    8 * 2,                                // complex_uint8
+    16,                                   // real_int16
+    16 * 2,                               // complex_int16
+    16,                                   // real_uint16
+    16 * 2,                               // complex_uint16
+    32,                                   // real_int32
+    32 * 2,                               // complex_int32
+    32,                                   // real_uint32
+    32 * 2,                               // complex_uint32
+    64,                                   // real_int64
+    64 * 2,                               // complex_int64
+    64,                                   // real_uint64
+    64 * 2,                               // complex_uint64
+    8,                                    // real_int8_4
+    8,                                    // real_int8_32
+    8                                     // real_uint8_4
+};
+
+template <class func_t, typename... args_t>
+std::invoke_result_t<func_t, args_t...>
+catch_batch_error(int *has_execption, const std::string &api_names,
+                  sycl::queue exec_queue, int *info, int *dev_info,
+                  int batch_size, func_t &&f, args_t &&...args) {
+  try {
+    return f(std::forward<args_t>(args)...);
+  } catch (oneapi::mkl::lapack::batch_error const &be) {
+    std::cerr << "Unexpected exception caught during call to API(s): "
+              << api_names << std::endl
+              << "reason: " << be.what() << std::endl
+              << "number: " << be.info() << std::endl;
+    if (be.info() < 0 && info)
+      *info = be.info();
+    int i = 0;
+    auto &ids = be.ids();
+    std::vector<int> info_vec(batch_size, 0);
+    for (auto const &e : be.exceptions()) {
+      try {
+        std::rethrow_exception(e);
+      } catch (oneapi::mkl::lapack::exception &e) {
+        std::cerr << "Exception in problem: " << ids[i] << std::endl
+                  << "reason: " << e.what() << std::endl
+                  << "info: " << e.info() << std::endl;
+        info_vec[ids[i]] = e.info();
+        i++;
+      }
+    }
+    if (dev_info)
+      exec_queue.memcpy(dev_info, info_vec.data(), batch_size * sizeof(int))
+          .wait();
+  } catch (sycl::exception const &e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    if (dev_info)
+      exec_queue.memset(dev_info, 0, batch_size * sizeof(int)).wait();
+  }
+  if (has_execption)
+    *has_execption = 1;
+  return {};
+}
+
+template <typename ret_t, typename... args_t>
+ret_t catch_batch_error_f(int *has_execption, const std::string &api_names,
+                          sycl::queue exec_queue, int *info, int *dev_info,
+                          int batch_size, ret_t (*f)(args_t...),
+                          args_t &&...args) {
+  return catch_batch_error(has_execption, api_names, exec_queue, info, dev_info,
+                           batch_size, f, args...);
+}
+} // namespace dpct::detail
+
+#endif // __DPCT_LIB_COMMON_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/math_detail.hpp b/sycl/include/dpct/detail/math_detail.hpp
new file mode 100644
index 00000000000..34d4da3043e
--- /dev/null
+++ b/sycl/include/dpct/detail/math_detail.hpp
@@ -0,0 +1,262 @@
+//==---- math_internal.hpp -----------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===---------------------------------------------------------------------===//
+
+#ifndef __DPCT_DETAIL_MATH_DETAIL_HPP__
+#define __DPCT_DETAIL_MATH_DETAIL_HPP__
+
+namespace dpct {
+// forward declar
+template <typename T> inline T clamp(T val, T min_val, T max_val);
+
+namespace detail {
+
+template <typename VecT, class BinaryOperation, class = void>
+class vectorized_binary {
+public:
+  inline VecT operator()(VecT a, VecT b, const BinaryOperation binary_op) {
+    VecT v4;
+    for (size_t i = 0; i < v4.size(); ++i) {
+      v4[i] = binary_op(a[i], b[i]);
+    }
+    return v4;
+  }
+};
+template <typename VecT, class BinaryOperation>
+class vectorized_binary<
+    VecT, BinaryOperation,
+    std::void_t<std::invoke_result_t<BinaryOperation, VecT, VecT>>> {
+public:
+  inline VecT operator()(VecT a, VecT b, const BinaryOperation binary_op) {
+    return binary_op(a, b).template as<VecT>();
+  }
+};
+
+template <typename T> inline bool isnan(const T a) { return sycl::isnan(a); }
+#ifdef SYCL_EXT_ONEAPI_BFLOAT16_MATH_FUNCTIONS
+inline bool isnan(const sycl::ext::oneapi::bfloat16 a) {
+  return sycl::ext::oneapi::experimental::isnan(a);
+}
+#endif
+
+template <typename T>
+constexpr bool is_floating_point =
+    std::disjunction_v<std::is_floating_point<T>, std::is_same<T, sycl::half>
+#ifdef SYCL_EXT_ONEAPI_BFLOAT16_MATH_FUNCTIONS
+                       ,
+                       std::is_same<T, sycl::ext::oneapi::bfloat16>
+#endif
+                       >;
+
+struct shift_left {
+  template <typename T>
+  auto operator()(const T x, const uint32_t offset) const {
+    return x << offset;
+  }
+};
+
+struct shift_right {
+  template <typename T>
+  auto operator()(const T x, const uint32_t offset) const {
+    return x >> offset;
+  }
+};
+
+struct average {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return (x + y + (x + y >= 0)) >> 1;
+  }
+};
+
+/// Extend the 'val' to 'bit' size, zero extend for unsigned int and signed
+/// extend for signed int.
+template <typename T> inline auto zero_or_signed_extent(T val, unsigned bit) {
+  if constexpr (std::is_signed_v<T>) {
+    if constexpr (std::is_same_v<T, int32_t>) {
+      assert(bit < 64 &&
+             "When extend int32 value, bit must be smaller than 64.");
+      return int64_t(val) << (64 - bit) >> (64 - bit);
+    } else if constexpr (std::is_same_v<T, int16_t>) {
+      assert(bit < 32 &&
+             "When extend int16 value, bit must be smaller than 32.");
+      return int32_t(val) << (32 - bit) >> (32 - bit);
+    } else if constexpr (std::is_same_v<T, int8_t>) {
+      assert(bit < 16 &&
+             "When extend int8 value, bit must be smaller than 16.");
+      return int16_t(val) << (16 - bit) >> (16 - bit);
+    } else {
+      assert(bit < 64 && "Cannot extend int64 value.");
+      return val;
+    }
+  } else
+    return val;
+}
+
+template <typename RetT, bool NeedSat, typename AT, typename BT,
+          typename BinaryOperation>
+inline constexpr std::enable_if_t<
+    std::is_integral_v<AT> && std::is_integral_v<BT> &&
+        std::is_integral_v<RetT> && sizeof(AT) == 4 && sizeof(BT) == 4 &&
+        sizeof(RetT) == 4,
+    RetT>
+extend_binary(AT a, BT b, BinaryOperation binary_op) {
+  int64_t extend_a = zero_or_signed_extent(a, 33);
+  int64_t extend_b = zero_or_signed_extent(b, 33);
+  int64_t ret = binary_op(extend_a, extend_b);
+  if constexpr (NeedSat)
+    return dpct::clamp<int64_t>(ret, std::numeric_limits<RetT>::min(),
+                                std::numeric_limits<RetT>::max());
+  return ret;
+}
+
+template <typename RetT, bool NeedSat, typename AT, typename BT, typename CT,
+          typename BinaryOperation1, typename BinaryOperation2>
+inline constexpr std::enable_if_t<
+    std::is_integral_v<AT> && std::is_integral_v<BT> &&
+        std::is_integral_v<CT> && std::is_integral_v<RetT> && sizeof(AT) == 4 &&
+        sizeof(BT) == 4 && sizeof(CT) == 4 && sizeof(RetT) == 4,
+    RetT>
+extend_binary(AT a, BT b, CT c, BinaryOperation1 binary_op,
+              BinaryOperation2 second_op) {
+  int64_t extend_a = zero_or_signed_extent(a, 33);
+  int64_t extend_b = zero_or_signed_extent(b, 33);
+  int64_t extend_temp =
+      zero_or_signed_extent(binary_op(extend_a, extend_b), 34);
+  if constexpr (NeedSat)
+    extend_temp =
+        dpct::clamp<int64_t>(extend_temp, std::numeric_limits<RetT>::min(),
+                             std::numeric_limits<RetT>::max());
+  int64_t extend_c = zero_or_signed_extent(c, 33);
+  return second_op(extend_temp, extend_c);
+}
+
+template <typename T> sycl::vec<int32_t, 2> extractAndExtend2(T a) {
+  sycl::vec<int32_t, 2> ret;
+  sycl::vec<T, 1> va{a};
+  if constexpr (std::is_signed_v<T>) {
+    auto v = va.template as<sycl::vec<int16_t, 2>>();
+    ret[0] = zero_or_signed_extent(v[0], 17);
+    ret[1] = zero_or_signed_extent(v[1], 17);
+  } else {
+    auto v = va.template as<sycl::vec<uint16_t, 2>>();
+    ret[0] = zero_or_signed_extent(v[0], 17);
+    ret[1] = zero_or_signed_extent(v[1], 17);
+  }
+  return ret;
+}
+
+template <typename T> sycl::vec<int16_t, 4> extractAndExtend4(T a) {
+  sycl::vec<int16_t, 4> ret;
+  sycl::vec<T, 1> va{a};
+  if constexpr (std::is_signed_v<T>) {
+    auto v = va.template as<sycl::vec<int8_t, 4>>();
+    ret[0] = zero_or_signed_extent(v[0], 9);
+    ret[1] = zero_or_signed_extent(v[1], 9);
+    ret[2] = zero_or_signed_extent(v[2], 9);
+    ret[3] = zero_or_signed_extent(v[3], 9);
+  } else {
+    auto v = va.template as<sycl::vec<uint8_t, 4>>();
+    ret[0] = zero_or_signed_extent(v[0], 9);
+    ret[1] = zero_or_signed_extent(v[1], 9);
+    ret[2] = zero_or_signed_extent(v[2], 9);
+    ret[3] = zero_or_signed_extent(v[3], 9);
+  }
+  return ret;
+}
+
+template <typename RetT, bool NeedSat, bool NeedAdd, typename AT, typename BT,
+          typename BinaryOperation>
+inline constexpr std::enable_if_t<
+    std::is_integral_v<AT> && std::is_integral_v<BT> &&
+        std::is_integral_v<RetT> && sizeof(AT) == 4 && sizeof(BT) == 4 &&
+        sizeof(RetT) == 4,
+    RetT>
+extend_vbinary2(AT a, BT b, RetT c, BinaryOperation binary_op) {
+  sycl::vec<int32_t, 2> extend_a = extractAndExtend2(a);
+  sycl::vec<int32_t, 2> extend_b = extractAndExtend2(b);
+  sycl::vec<int32_t, 2> temp{binary_op(extend_a[0], extend_b[0]),
+                             binary_op(extend_a[1], extend_b[1])};
+  if constexpr (NeedSat) {
+    int32_t min_val = 0, max_val = 0;
+    if constexpr (std::is_signed_v<RetT>) {
+      min_val = std::numeric_limits<int16_t>::min();
+      max_val = std::numeric_limits<int16_t>::max();
+    } else {
+      min_val = std::numeric_limits<uint16_t>::min();
+      max_val = std::numeric_limits<uint16_t>::max();
+    }
+    temp = dpct::clamp(temp, {min_val, min_val}, {max_val, max_val});
+  }
+  if constexpr (NeedAdd) {
+    return temp[0] + temp[1] + c;
+  }
+  if constexpr (std::is_signed_v<RetT>) {
+    return sycl::vec<int16_t, 2>{temp[0], temp[1]}.as<sycl::vec<RetT, 1>>();
+  } else {
+    return sycl::vec<uint16_t, 2>{temp[0], temp[1]}.as<sycl::vec<RetT, 1>>();
+  }
+}
+
+template <typename RetT, bool NeedSat, bool NeedAdd, typename AT, typename BT,
+          typename BinaryOperation>
+inline constexpr std::enable_if_t<
+    std::is_integral_v<AT> && std::is_integral_v<BT> &&
+        std::is_integral_v<RetT> && sizeof(AT) == 4 && sizeof(BT) == 4 &&
+        sizeof(RetT) == 4,
+    RetT>
+extend_vbinary4(AT a, BT b, RetT c, BinaryOperation binary_op) {
+  sycl::vec<int16_t, 4> extend_a = extractAndExtend4(a);
+  sycl::vec<int16_t, 4> extend_b = extractAndExtend4(b);
+  sycl::vec<int16_t, 4> temp{
+      binary_op(extend_a[0], extend_b[0]), binary_op(extend_a[1], extend_b[1]),
+      binary_op(extend_a[2], extend_b[2]), binary_op(extend_a[3], extend_b[3])};
+  if constexpr (NeedSat) {
+    int16_t min_val = 0, max_val = 0;
+    if constexpr (std::is_signed_v<RetT>) {
+      min_val = std::numeric_limits<int8_t>::min();
+      max_val = std::numeric_limits<int8_t>::max();
+    } else {
+      min_val = std::numeric_limits<uint8_t>::min();
+      max_val = std::numeric_limits<uint8_t>::max();
+    }
+    temp = dpct::clamp(temp, {min_val, min_val, min_val, min_val},
+                       {max_val, max_val, max_val, max_val});
+  }
+  if constexpr (NeedAdd) {
+    return temp[0] + temp[1] + temp[2] + temp[3] + c;
+  }
+  if constexpr (std::is_signed_v<RetT>) {
+    return sycl::vec<int8_t, 4>{temp[0], temp[1], temp[2], temp[3]}
+        .as<sycl::vec<RetT, 1>>();
+  } else {
+    return sycl::vec<uint8_t, 4>{temp[0], temp[1], temp[2], temp[3]}
+        .as<sycl::vec<RetT, 1>>();
+  }
+}
+
+template <typename T1, typename T2>
+using dot_product_acc_t =
+    std::conditional_t<std::is_unsigned_v<T1> && std::is_unsigned_v<T2>,
+                       uint32_t, int32_t>;
+
+template <typename T> sycl::vec<T, 4> extract_and_sign_or_zero_extend4(T val) {
+  return sycl::vec<T, 1>(val)
+      .template as<sycl::vec<
+          std::conditional_t<std::is_signed_v<T>, int8_t, uint8_t>, 4>>()
+      .template convert<T>();
+}
+
+template <typename T> sycl::vec<T, 2> extract_and_sign_or_zero_extend2(T val) {
+  return sycl::vec<T, 1>(val)
+      .template as<sycl::vec<
+          std::conditional_t<std::is_signed_v<T>, int16_t, uint16_t>, 2>>()
+      .template convert<T>();
+}
+
+} // namespace detail
+} // namespace dpct
+#endif //!__DPCT_DETAIL_MATH_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/memory_detail.hpp b/sycl/include/dpct/detail/memory_detail.hpp
new file mode 100644
index 00000000000..e0bad438996
--- /dev/null
+++ b/sycl/include/dpct/detail/memory_detail.hpp
@@ -0,0 +1,984 @@
+//==---- memory_internal.hpp ---------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===---------------------------------------------------------------------===//
+
+#ifndef __DPCT_DETAIL_MEMORY_DETAIL_HPP__
+#define __DPCT_DETAIL_MEMORY_DETAIL_HPP__
+
+namespace dpct {
+
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+namespace experimental {
+namespace detail {
+static sycl::event dpct_memcpy(const image_mem_wrapper *src,
+                               const sycl::id<3> &src_id,
+                               const size_t src_x_offest_byte,
+                               pitched_data &dest, const sycl::id<3> &dest_id,
+                               const size_t dest_x_offest_byte,
+                               const sycl::range<3> &size,
+                               const size_t copy_x_size_byte, sycl::queue q);
+static sycl::event
+dpct_memcpy(const pitched_data src, const sycl::id<3> &src_id,
+            const size_t src_x_offest_byte, image_mem_wrapper *dest,
+            const sycl::id<3> &dest_id, const size_t dest_x_offest_byte,
+            const sycl::range<3> &size, const size_t copy_x_size_byte,
+            sycl::queue q);
+static sycl::event
+dpct_memcpy(const image_mem_wrapper *src, const sycl::id<3> &src_id,
+            const size_t src_x_offest_byte, image_mem_wrapper *dest,
+            const sycl::id<3> &dest_id, const size_t dest_x_offest_byte,
+            const sycl::range<3> &size, const size_t copy_x_size_byte,
+            sycl::queue q);
+} // namespace detail
+} // namespace experimental
+
+#endif // !SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+
+class image_matrix;
+
+namespace detail {
+static pitched_data to_pitched_data(image_matrix *image);
+
+class mem_mgr {
+  mem_mgr() {
+    // Reserved address space, no real memory allocation happens here.
+#if defined(__linux__)
+    mapped_address_space =
+        (byte_t *)mmap(nullptr, mapped_region_size, PROT_NONE,
+                       MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+#elif defined(_WIN64)
+    mapped_address_space = (byte_t *)VirtualAlloc(
+        NULL,               // NULL specified as the base address parameter
+        mapped_region_size, // Size of allocation
+        MEM_RESERVE,        // Allocate reserved pages
+        PAGE_NOACCESS);     // Protection = no access
+#else
+#error "Only support Windows and Linux."
+#endif
+    next_free = mapped_address_space;
+  };
+
+public:
+  using buffer_id_t = int;
+
+  struct allocation {
+    buffer_t buffer;
+    byte_t *alloc_ptr;
+    size_t size;
+  };
+
+  ~mem_mgr() {
+#if defined(__linux__)
+    munmap(mapped_address_space, mapped_region_size);
+#elif defined(_WIN64)
+    VirtualFree(mapped_address_space, 0, MEM_RELEASE);
+#else
+#error "Only support Windows and Linux."
+#endif
+  };
+
+  mem_mgr(const mem_mgr &) = delete;
+  mem_mgr &operator=(const mem_mgr &) = delete;
+  mem_mgr(mem_mgr &&) = delete;
+  mem_mgr &operator=(mem_mgr &&) = delete;
+
+  /// Allocate
+  void *mem_alloc(size_t size) {
+    if (!size)
+      return nullptr;
+    std::lock_guard<std::mutex> lock(m_mutex);
+    if (next_free + size > mapped_address_space + mapped_region_size) {
+      throw std::runtime_error(
+          "dpct_malloc: out of memory for virtual memory pool");
+    }
+    // Allocation
+    sycl::range<1> r(size);
+    buffer_t buf(r);
+    allocation A{buf, next_free, size};
+    // Map allocation to device pointer
+    void *result = next_free;
+    m_map.emplace(next_free + size, A);
+    // Update pointer to the next free space.
+    next_free += (size + extra_padding + alignment - 1) & ~(alignment - 1);
+
+    return result;
+  }
+
+  /// Deallocate
+  void mem_free(const void *ptr) {
+    if (!ptr)
+      return;
+    std::lock_guard<std::mutex> lock(m_mutex);
+    auto it = get_map_iterator(ptr);
+    m_map.erase(it);
+  }
+
+  /// map: device pointer -> allocation(buffer, alloc_ptr, size)
+  allocation translate_ptr(const void *ptr) {
+    std::lock_guard<std::mutex> lock(m_mutex);
+    auto it = get_map_iterator(ptr);
+    return it->second;
+  }
+
+  void *get_base_addr(const void *ptr) {
+    allocation alloc = translate_ptr(ptr);
+    return alloc.alloc_ptr;
+  }
+
+  /// Check if the pointer represents device pointer or not.
+  bool is_device_ptr(const void *ptr) const {
+    std::lock_guard<std::mutex> lock(m_mutex);
+    return (mapped_address_space <= ptr) &&
+           (ptr < mapped_address_space + mapped_region_size);
+  }
+
+  /// Returns the instance of memory manager singleton.
+  static mem_mgr &instance() {
+    static mem_mgr m;
+    return m;
+  }
+
+private:
+  std::map<byte_t *, allocation> m_map;
+  mutable std::mutex m_mutex;
+  byte_t *mapped_address_space;
+  byte_t *next_free;
+  const size_t mapped_region_size = 128ull * 1024 * 1024 * 1024;
+  const size_t alignment = 256;
+  /// This padding may be defined to some positive value to debug
+  /// out of bound accesses.
+  const size_t extra_padding = 0;
+
+  std::map<byte_t *, allocation>::iterator get_map_iterator(const void *ptr) {
+    auto it = m_map.upper_bound((byte_t *)ptr);
+    if (it == m_map.end()) {
+      // Not a virtual pointer.
+      throw std::runtime_error("can not get buffer from non-virtual pointer");
+    }
+    const allocation &alloc = it->second;
+    if (ptr < alloc.alloc_ptr) {
+      // Out of bound.
+      // This may happen if there's a gap between allocations due to alignment
+      // or extra padding and pointer points to this gap.
+      throw std::runtime_error("invalid virtual pointer");
+    }
+    return it;
+  }
+};
+
+template <class T, memory_region Memory, size_t Dimension> class accessor;
+template <memory_region Memory, class T = byte_t> class memory_traits {
+public:
+  static constexpr sycl::access::target target = sycl::access::target::device;
+  static constexpr sycl::access_mode mode = (Memory == constant)
+                                                ? sycl::access_mode::read
+                                                : sycl::access_mode::read_write;
+  static constexpr size_t type_size = sizeof(T);
+  using value_t = typename std::remove_cv<T>::type;
+  template <size_t Dimension = 1>
+  using accessor_t = typename std::conditional<
+      Memory == local, sycl::local_accessor<value_t, Dimension>,
+      sycl::accessor<T, Dimension, mode, target>>::type;
+  using pointer_t = T *;
+};
+
+static inline void *dpct_malloc(size_t size, sycl::queue &q) {
+#ifdef DPCT_USM_LEVEL_NONE
+  return mem_mgr::instance().mem_alloc(size * sizeof(byte_t));
+#else
+  return sycl::malloc_device(size, q.get_device(), q.get_context());
+#endif // DPCT_USM_LEVEL_NONE
+}
+
+#define PITCH_DEFAULT_ALIGN(x) (((x) + 31) & ~(0x1F))
+static inline void *dpct_malloc(size_t &pitch, size_t x, size_t y, size_t z,
+                                sycl::queue &q) {
+  pitch = PITCH_DEFAULT_ALIGN(x);
+  return dpct_malloc(pitch * y * z, q);
+}
+
+/**
+ * @brief Sets \p value to the first \p size elements starting from \p dev_ptr
+ * in \p q.
+ * @tparam valueT The type of the element to be set.
+ * @param [in] q The queue in which the operation is done.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @return An event representing the memset operation.
+ */
+template <typename valueT>
+static inline sycl::event dpct_memset(sycl::queue &q, void *dev_ptr,
+                                      valueT value, size_t size) {
+#ifdef DPCT_USM_LEVEL_NONE
+  auto &mm = mem_mgr::instance();
+  assert(mm.is_device_ptr(dev_ptr));
+  auto alloc = mm.translate_ptr(dev_ptr);
+  size_t offset = (valueT *)dev_ptr - (valueT *)alloc.alloc_ptr;
+
+  return q.submit([&](sycl::handler &cgh) {
+    auto r = sycl::range<1>(size);
+    auto o = sycl::id<1>(offset);
+    auto new_buffer = alloc.buffer.reinterpret<valueT>(
+        sycl::range<1>(alloc.size / sizeof(valueT)));
+    sycl::accessor<valueT, 1, sycl::access_mode::write,
+                   sycl::access::target::device>
+        acc(new_buffer, cgh, r, o);
+    cgh.fill(acc, value);
+  });
+#else
+  return q.fill(dev_ptr, value, size);
+#endif // DPCT_USM_LEVEL_NONE
+}
+
+/**
+ * @brief Sets \p value to the 3D memory region pointed by \p data in \p q.
+ * @tparam valueT The type of the element to be set.
+ * @param [in] q The queue in which the operation is done.
+ * @param [in] data Pointer to the pitched device memory region.
+ * @param [in] value The value to be set.
+ * @param [in] size 3D memory region by number of elements.
+ * @return An event list representing the memset operations.
+ */
+template <typename valueT>
+static inline std::vector<sycl::event>
+dpct_memset(sycl::queue &q, dpct::pitched_data data, valueT value,
+            sycl::range<3> size) {
+  std::vector<sycl::event> event_list;
+  size_t slice = data.get_pitch() * data.get_y();
+  unsigned char *data_surface = (unsigned char *)data.get_data_ptr();
+  for (size_t z = 0; z < size.get(2); ++z) {
+    unsigned char *data_ptr = data_surface;
+    for (size_t y = 0; y < size.get(1); ++y) {
+      event_list.push_back(dpct_memset(q, data_ptr, value, size.get(0)));
+      data_ptr += data.get_pitch();
+    }
+    data_surface += slice;
+  }
+  return event_list;
+}
+
+/**
+ * @brief Sets \p val to the pitched 2D memory region pointed by \p ptr in \p q.
+ * @tparam valueT The type of the element to be set.
+ * @param [in] q The queue in which the operation is done.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @return An event list representing the memset operations.
+ */
+template <typename valueT>
+static inline std::vector<sycl::event> dpct_memset(sycl::queue &q, void *ptr,
+                                                   size_t pitch, valueT val,
+                                                   size_t x, size_t y) {
+  return dpct_memset(q, pitched_data(ptr, pitch, x, 1), val,
+                     sycl::range<3>(x, y, 1));
+}
+
+enum class pointer_access_attribute {
+  host_only = 0,
+  device_only,
+  host_device,
+  end
+};
+
+static pointer_access_attribute get_pointer_attribute(sycl::queue &q,
+                                                      const void *ptr) {
+#ifdef DPCT_USM_LEVEL_NONE
+  return mem_mgr::instance().is_device_ptr(ptr)
+             ? pointer_access_attribute::device_only
+             : pointer_access_attribute::host_only;
+#else
+  switch (sycl::get_pointer_type(ptr, q.get_context())) {
+  case sycl::usm::alloc::unknown:
+    return pointer_access_attribute::host_only;
+  case sycl::usm::alloc::device:
+    return pointer_access_attribute::device_only;
+  case sycl::usm::alloc::shared:
+  case sycl::usm::alloc::host:
+    return pointer_access_attribute::host_device;
+  }
+#endif
+}
+
+static memcpy_direction deduce_memcpy_direction(sycl::queue &q, void *to_ptr,
+                                                const void *from_ptr,
+                                                memcpy_direction dir) {
+  switch (dir) {
+  case memcpy_direction::host_to_host:
+  case memcpy_direction::host_to_device:
+  case memcpy_direction::device_to_host:
+  case memcpy_direction::device_to_device:
+    return dir;
+  case memcpy_direction::automatic: {
+    // table[to_attribute][from_attribute]
+    static const memcpy_direction
+        direction_table[static_cast<unsigned>(pointer_access_attribute::end)]
+                       [static_cast<unsigned>(pointer_access_attribute::end)] =
+                           {{memcpy_direction::host_to_host,
+                             memcpy_direction::device_to_host,
+                             memcpy_direction::host_to_host},
+                            {memcpy_direction::host_to_device,
+                             memcpy_direction::device_to_device,
+                             memcpy_direction::device_to_device},
+                            {memcpy_direction::host_to_host,
+                             memcpy_direction::device_to_device,
+                             memcpy_direction::device_to_device}};
+    return direction_table[static_cast<unsigned>(get_pointer_attribute(
+        q, to_ptr))][static_cast<unsigned>(get_pointer_attribute(q, from_ptr))];
+  }
+  default:
+    throw std::runtime_error("dpct_memcpy: invalid direction value");
+  }
+}
+
+static sycl::event
+dpct_memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr, size_t size,
+            memcpy_direction direction,
+            const std::vector<sycl::event> &dep_events = {}) {
+  if (!size)
+    return sycl::event{};
+#ifdef DPCT_USM_LEVEL_NONE
+  auto &mm = mem_mgr::instance();
+  auto real_direction = deduce_memcpy_direction(q, to_ptr, from_ptr, direction);
+
+  switch (real_direction) {
+  case host_to_host:
+    return q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      cgh.host_task([=] { std::memcpy(to_ptr, from_ptr, size); });
+    });
+  case host_to_device: {
+    auto alloc = mm.translate_ptr(to_ptr);
+    size_t offset = (byte_t *)to_ptr - alloc.alloc_ptr;
+    return q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      auto r = sycl::range<1>(size);
+      auto o = sycl::id<1>(offset);
+      sycl::accessor<byte_t, 1, sycl::access_mode::write,
+                     sycl::access::target::device>
+          acc(alloc.buffer, cgh, r, o);
+      cgh.copy(from_ptr, acc);
+    });
+  }
+  case device_to_host: {
+    auto alloc = mm.translate_ptr(from_ptr);
+    size_t offset = (byte_t *)from_ptr - alloc.alloc_ptr;
+    return q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      auto r = sycl::range<1>(size);
+      auto o = sycl::id<1>(offset);
+      sycl::accessor<byte_t, 1, sycl::access_mode::read,
+                     sycl::access::target::device>
+          acc(alloc.buffer, cgh, r, o);
+      cgh.copy(acc, to_ptr);
+    });
+  }
+  case device_to_device: {
+    auto to_alloc = mm.translate_ptr(to_ptr);
+    auto from_alloc = mm.translate_ptr(from_ptr);
+    size_t to_offset = (byte_t *)to_ptr - to_alloc.alloc_ptr;
+    size_t from_offset = (byte_t *)from_ptr - from_alloc.alloc_ptr;
+    return q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      auto r = sycl::range<1>(size);
+      auto to_o = sycl::id<1>(to_offset);
+      auto from_o = sycl::id<1>(from_offset);
+      sycl::accessor<byte_t, 1, sycl::access_mode::write,
+                     sycl::access::target::device>
+          to_acc(to_alloc.buffer, cgh, r, to_o);
+      sycl::accessor<byte_t, 1, sycl::access_mode::read,
+                     sycl::access::target::device>
+          from_acc(from_alloc.buffer, cgh, r, from_o);
+      cgh.copy(from_acc, to_acc);
+    });
+  }
+  default:
+    throw std::runtime_error("dpct_memcpy: invalid direction value");
+  }
+#else
+  return q.memcpy(to_ptr, from_ptr, size, dep_events);
+#endif // DPCT_USM_LEVEL_NONE
+}
+
+// Get actual copy range and make sure it will not exceed range.
+static inline size_t get_copy_range(sycl::range<3> size, size_t slice,
+                                    size_t pitch) {
+  return slice * (size.get(2) - 1) + pitch * (size.get(1) - 1) + size.get(0);
+}
+
+static inline size_t get_offset(sycl::id<3> id, size_t slice, size_t pitch) {
+  return slice * id.get(2) + pitch * id.get(1) + id.get(0);
+}
+
+// RAII for host pointer
+class host_buffer {
+  void *_buf;
+  size_t _size;
+  sycl::queue &_q;
+  const std::vector<sycl::event> &_deps; // free operation depends
+
+public:
+  host_buffer(size_t size, sycl::queue &q, const std::vector<sycl::event> &deps)
+      : _buf(std::malloc(size)), _size(size), _q(q), _deps(deps) {}
+  void *get_ptr() const { return _buf; }
+  size_t get_size() const { return _size; }
+  ~host_buffer() {
+    if (_buf) {
+      _q.submit([&](sycl::handler &cgh) {
+        cgh.depends_on(_deps);
+        cgh.host_task([buf = _buf] { std::free(buf); });
+      });
+    }
+  }
+};
+
+static sycl::event dpct_memcpy(sycl::queue &q, void *to_ptr, int to_dev_id,
+                               const void *from_ptr, int from_dev_id,
+                               size_t size) {
+  if (to_dev_id == from_dev_id)
+    return dpct_memcpy(q, to_ptr, from_ptr, size,
+                       memcpy_direction::device_to_device);
+  // Now, different device have different context, and memcpy API cannot copy
+  // data between different context. So we need use host buffer to copy the data
+  // between devices.
+  std::vector<sycl::event> event_list;
+  host_buffer buf(size, q, event_list);
+  auto copy_events = dpct_memcpy(q, buf.get_ptr(), from_ptr, size,
+                                 memcpy_direction::device_to_host);
+  event_list.push_back(dpct::detail::dpct_memcpy(
+      q, to_ptr, buf.get_ptr(), size, memcpy_direction::host_to_device,
+      {copy_events}));
+  return event_list[0];
+}
+
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr,
+            sycl::range<3> to_range, sycl::range<3> from_range,
+            sycl::id<3> to_id, sycl::id<3> from_id, sycl::range<3> size,
+            memcpy_direction direction,
+            const std::vector<sycl::event> &dep_events);
+
+static inline void copy_to_device_via_host_buffer(
+    sycl::queue &q, const sycl::range<3> &size, unsigned char *to_surface,
+    const sycl::range<3> &to_range, const unsigned char *from_surface,
+    const sycl::range<3> &from_range, std::vector<sycl::event> &event_list,
+    memcpy_direction direction,
+    const std::vector<sycl::event> &dep_events = {}) {
+  assert(direction == device_to_host || direction == host_to_host);
+  size_t to_slice = to_range.get(1) * to_range.get(0);
+  host_buffer buf(get_copy_range(size, to_slice, to_range.get(0)), q,
+                  event_list);
+  std::vector<sycl::event> host_events;
+  size_t size_slice = size.get(1) * size.get(0);
+  if (to_slice == size_slice) {
+    // Copy host data to a temp host buffer with the shape of target.
+    host_events =
+        dpct_memcpy(q, buf.get_ptr(), from_surface, to_range, from_range,
+                    sycl::id<3>(0, 0, 0), sycl::id<3>(0, 0, 0), size, direction,
+                    dep_events);
+  } else {
+    // Copy host data to a temp host buffer with the shape of target.
+    host_events =
+        dpct_memcpy(q, buf.get_ptr(), from_surface, to_range, from_range,
+                    sycl::id<3>(0, 0, 0), sycl::id<3>(0, 0, 0), size, direction,
+                    // If has padding data, not sure whether it is useless. So
+                    // fill temp buffer with it.
+                    std::vector<sycl::event>{dpct_memcpy(
+                        q, buf.get_ptr(), to_surface, buf.get_size(),
+                        device_to_host, dep_events)});
+  }
+  // Copy from temp host buffer to device with only one submit.
+  event_list.push_back(dpct_memcpy(q, to_surface, buf.get_ptr(), buf.get_size(),
+                                   host_to_device, host_events));
+}
+
+/// copy 3D matrix specified by \p size from 3D matrix specified by \p from_ptr
+/// and \p from_range to another specified by \p to_ptr and \p to_range.
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr,
+            sycl::range<3> to_range, sycl::range<3> from_range,
+            sycl::id<3> to_id, sycl::id<3> from_id, sycl::range<3> size,
+            memcpy_direction direction,
+            const std::vector<sycl::event> &dep_events = {}) {
+  std::vector<sycl::event> event_list;
+
+  size_t to_slice = to_range.get(1) * to_range.get(0),
+         from_slice = from_range.get(1) * from_range.get(0);
+  unsigned char *to_surface =
+      (unsigned char *)to_ptr + get_offset(to_id, to_slice, to_range.get(0));
+  const unsigned char *from_surface =
+      (const unsigned char *)from_ptr +
+      get_offset(from_id, from_slice, from_range.get(0));
+
+  if (to_slice == from_slice && to_slice == size.get(1) * size.get(0)) {
+    return {dpct_memcpy(q, to_surface, from_surface, to_slice * size.get(2),
+                        direction, dep_events)};
+  }
+  direction = deduce_memcpy_direction(q, to_ptr, from_ptr, direction);
+  size_t size_slice = size.get(1) * size.get(0);
+  switch (direction) {
+  case host_to_host:
+    for (size_t z = 0; z < size.get(2); ++z) {
+      unsigned char *to_ptr = to_surface;
+      const unsigned char *from_ptr = from_surface;
+      if (to_range.get(0) == from_range.get(0) &&
+          to_range.get(0) == size.get(0)) {
+        event_list.push_back(dpct_memcpy(q, to_ptr, from_ptr, size_slice,
+                                         direction, dep_events));
+      } else {
+        for (size_t y = 0; y < size.get(1); ++y) {
+          event_list.push_back(dpct_memcpy(q, to_ptr, from_ptr, size.get(0),
+                                           direction, dep_events));
+          to_ptr += to_range.get(0);
+          from_ptr += from_range.get(0);
+        }
+      }
+      to_surface += to_slice;
+      from_surface += from_slice;
+    }
+    break;
+  case host_to_device: {
+    copy_to_device_via_host_buffer(q, size, to_surface, to_range, from_surface,
+                                   from_range, event_list, host_to_host,
+                                   dep_events);
+    break;
+  }
+  case device_to_host: {
+    host_buffer buf(get_copy_range(size, from_slice, from_range.get(0)), q,
+                    event_list);
+    // Copy from host temp buffer to host target with reshaping.
+    event_list = dpct_memcpy(
+        q, to_surface, buf.get_ptr(), to_range, from_range,
+        sycl::id<3>(0, 0, 0), sycl::id<3>(0, 0, 0), size, host_to_host,
+        // Copy from device to temp host buffer with only one submit.
+        std::vector<sycl::event>{dpct_memcpy(q, buf.get_ptr(), from_surface,
+                                             buf.get_size(), device_to_host,
+                                             dep_events)});
+    break;
+  }
+  case device_to_device:
+#ifdef DPCT_USM_LEVEL_NONE
+  {
+    auto &mm = mem_mgr::instance();
+    auto to_alloc = mm.translate_ptr(to_surface);
+    auto from_alloc = mm.translate_ptr(from_surface);
+    size_t to_offset = (byte_t *)to_surface - to_alloc.alloc_ptr;
+    size_t from_offset = (byte_t *)from_surface - from_alloc.alloc_ptr;
+    event_list.push_back(q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      auto to_o = sycl::id<1>(to_offset);
+      auto from_o = sycl::id<1>(from_offset);
+      sycl::accessor<byte_t, 1, sycl::access_mode::write,
+                     sycl::access::target::device>
+          to_acc(to_alloc.buffer, cgh,
+                 get_copy_range(size, to_slice, to_range.get(0)), to_o);
+      sycl::accessor<byte_t, 1, sycl::access_mode::read,
+                     sycl::access::target::device>
+          from_acc(from_alloc.buffer, cgh,
+                   get_copy_range(size, from_slice, from_range.get(0)), from_o);
+      cgh.parallel_for<class dpct_memcpy_3d_detail_usmnone>(
+          size, [=](sycl::id<3> id) {
+            to_acc[get_offset(id, to_slice, to_range.get(0))] =
+                from_acc[get_offset(id, from_slice, from_range.get(0))];
+          });
+    }));
+  }
+#else
+    event_list.push_back(q.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(dep_events);
+      cgh.parallel_for<class dpct_memcpy_3d_detail>(size, [=](sycl::id<3> id) {
+        to_surface[get_offset(id, to_slice, to_range.get(0))] =
+            from_surface[get_offset(id, from_slice, from_range.get(0))];
+      });
+    }));
+#endif
+  break;
+  default:
+    throw std::runtime_error("dpct_memcpy: invalid direction value");
+  }
+  return event_list;
+}
+
+/// memcpy 2D/3D matrix specified by pitched_data.
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, pitched_data to, sycl::id<3> to_id,
+            pitched_data from, sycl::id<3> from_id, sycl::range<3> size,
+            memcpy_direction direction = automatic) {
+  return dpct_memcpy(q, to.get_data_ptr(), from.get_data_ptr(),
+                     sycl::range<3>(to.get_pitch(), to.get_y(), 1),
+                     sycl::range<3>(from.get_pitch(), from.get_y(), 1), to_id,
+                     from_id, size, direction);
+}
+
+/// memcpy 2D/3D matrix between different devices.
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, pitched_data to, sycl::id<3> to_id, int to_dev_id,
+            pitched_data from, sycl::id<3> from_id, int from_dev_id,
+            sycl::range<3> size) {
+  if (to_dev_id == from_dev_id)
+    return dpct_memcpy(q, to, to_id, from, from_id, size,
+                       memcpy_direction::device_to_device);
+  std::vector<sycl::event> event_list;
+  const auto to_range = sycl::range<3>(to.get_pitch(), to.get_y(), 1),
+             from_range = sycl::range<3>(from.get_pitch(), from.get_y(), 1);
+  const size_t to_slice = to_range.get(1) * to_range.get(0),
+               from_slice = from_range.get(1) * from_range.get(0);
+  unsigned char *to_surface = (unsigned char *)to.get_data_ptr() +
+                              get_offset(to_id, to_slice, to_range.get(0));
+  const unsigned char *from_surface =
+      (const unsigned char *)from.get_data_ptr() +
+      get_offset(from_id, from_slice, from_range.get(0));
+  copy_to_device_via_host_buffer(q, size, to_surface, to_range, from_surface,
+                                 from_range, event_list, device_to_host);
+  return event_list;
+}
+
+/// memcpy 2D matrix with pitch.
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, void *to_ptr, const void *from_ptr, size_t to_pitch,
+            size_t from_pitch, size_t x, size_t y,
+            memcpy_direction direction = automatic) {
+  return dpct_memcpy(q, to_ptr, from_ptr, sycl::range<3>(to_pitch, y, 1),
+                     sycl::range<3>(from_pitch, y, 1), sycl::id<3>(0, 0, 0),
+                     sycl::id<3>(0, 0, 0), sycl::range<3>(x, y, 1), direction);
+}
+
+static inline std::vector<sycl::event>
+dpct_memcpy(sycl::queue &q, const memcpy_parameter &param) {
+  auto to = param.to.pitched;
+  auto from = param.from.pitched;
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+  if (param.to.image_bindless != nullptr &&
+      param.from.image_bindless != nullptr) {
+    return {experimental::detail::dpct_memcpy(
+        param.from.image_bindless, param.from.pos, param.from.pos_x_in_bytes,
+        param.to.image_bindless, param.to.pos, param.to.pos_x_in_bytes,
+        param.size, param.size_x_in_bytes, q)};
+  } else if (param.to.image_bindless != nullptr) {
+    return {experimental::detail::dpct_memcpy(
+        from, param.from.pos, param.from.pos_x_in_bytes,
+        param.to.image_bindless, param.to.pos, param.to.pos_x_in_bytes,
+        param.size, param.size_x_in_bytes, q)};
+  } else if (param.from.image_bindless != nullptr) {
+    return {experimental::detail::dpct_memcpy(
+        param.from.image_bindless, param.from.pos, param.from.pos_x_in_bytes,
+        to, param.to.pos, param.to.pos_x_in_bytes, param.size,
+        param.size_x_in_bytes, q)};
+  }
+#endif
+  auto size = param.size;
+  auto to_pos = param.to.pos;
+  auto from_pos = param.from.pos;
+  // If the src and dest are not bindless image, the x can be set to XInByte.
+  if (param.size_x_in_bytes != 0) {
+    size[0] = param.size_x_in_bytes;
+  }
+  if (param.to.pos_x_in_bytes != 0) {
+    to_pos[0] = param.to.pos_x_in_bytes;
+  }
+  if (param.from.pos_x_in_bytes != 0) {
+    from_pos[0] = param.from.pos_x_in_bytes;
+  }
+  if (param.to.image != nullptr) {
+    to = to_pitched_data(param.to.image);
+  }
+  if (param.from.image != nullptr) {
+    from = to_pitched_data(param.from.image);
+  }
+  if (deduce_memcpy_direction(q, to.get_data_ptr(), from.get_data_ptr(),
+                              param.direction) == device_to_device)
+    return dpct_memcpy(q, to, to_pos, param.to.dev_id, from, from_pos,
+                       param.from.dev_id, size);
+  return dpct_memcpy(q, to, to_pos, from, from_pos, size, param.direction);
+}
+
+namespace deprecated {
+
+template <typename T, sycl::usm::alloc AllocKind> class usm_allocator {
+private:
+  using Alloc = sycl::usm_allocator<T, AllocKind>;
+  Alloc _impl;
+
+public:
+  using value_type = typename std::allocator_traits<Alloc>::value_type;
+  using pointer = typename std::allocator_traits<Alloc>::pointer;
+  using const_pointer = typename std::allocator_traits<Alloc>::const_pointer;
+  using void_pointer = typename std::allocator_traits<Alloc>::void_pointer;
+  using const_void_pointer =
+      typename std::allocator_traits<Alloc>::const_void_pointer;
+  using reference = typename std::allocator_traits<Alloc>::value_type &;
+  using const_reference =
+      const typename std::allocator_traits<Alloc>::value_type &;
+  using difference_type =
+      typename std::allocator_traits<Alloc>::difference_type;
+  using size_type = typename std::allocator_traits<Alloc>::size_type;
+  using propagate_on_container_copy_assignment = typename std::allocator_traits<
+      Alloc>::propagate_on_container_copy_assignment;
+  using propagate_on_container_move_assignment = typename std::allocator_traits<
+      Alloc>::propagate_on_container_move_assignment;
+  using propagate_on_container_swap =
+      typename std::allocator_traits<Alloc>::propagate_on_container_swap;
+  using is_always_equal =
+      typename std::allocator_traits<Alloc>::is_always_equal;
+
+  template <typename U> struct rebind {
+    typedef usm_allocator<U, AllocKind> other;
+  };
+
+  usm_allocator() : _impl(dpct::get_default_queue()) {}
+  usm_allocator(sycl::queue &q) : _impl(q) {}
+  ~usm_allocator() {}
+  usm_allocator(const usm_allocator &other) : _impl(other._impl) {}
+  usm_allocator(usm_allocator &&other) : _impl(std::move(other._impl)) {}
+  pointer address(reference r) { return &r; }
+  const_pointer address(const_reference r) { return &r; }
+  pointer allocate(size_type cnt, const_void_pointer hint = nullptr) {
+    return std::allocator_traits<Alloc>::allocate(_impl, cnt, hint);
+  }
+  void deallocate(pointer p, size_type cnt) {
+    std::allocator_traits<Alloc>::deallocate(_impl, p, cnt);
+  }
+  size_type max_size() const {
+    return std::allocator_traits<Alloc>::max_size(_impl);
+  }
+  bool operator==(const usm_allocator &other) const {
+    return _impl == other._impl;
+  }
+  bool operator!=(const usm_allocator &other) const {
+    return _impl != other._impl;
+  }
+};
+
+} // namespace deprecated
+
+inline void dpct_free(void *ptr, const sycl::queue &q) {
+  if (ptr) {
+#ifdef DPCT_USM_LEVEL_NONE
+    detail::mem_mgr::instance().mem_free(ptr);
+#else
+    sycl::free(ptr, q.get_context());
+#endif // DPCT_USM_LEVEL_NONE
+  }
+}
+
+inline sycl::event async_dpct_free(const std::vector<void *> &pointers,
+                                   const std::vector<sycl::event> &events,
+                                   sycl::queue q) {
+  return q.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(events);
+    cgh.host_task([=] {
+      for (auto p : pointers)
+        if (p) {
+          detail::dpct_free(p, q);
+        }
+    });
+  });
+}
+
+/// Device variable with address space of shared, global or constant.
+template <class T, memory_region Memory, size_t Dimension> class device_memory {
+public:
+  using accessor_t =
+      typename detail::memory_traits<Memory, T>::template accessor_t<Dimension>;
+  using value_t = typename detail::memory_traits<Memory, T>::value_t;
+  using dpct_accessor_t = dpct::accessor<T, Memory, Dimension>;
+
+  device_memory() : device_memory(sycl::range<Dimension>(1)) {}
+
+  /// Constructor of 1-D array with initializer list
+  device_memory(const sycl::range<Dimension> &in_range,
+                std::initializer_list<value_t> &&init_list)
+      : device_memory(in_range) {
+    assert(init_list.size() <= in_range.size());
+    _host_ptr = (value_t *)std::malloc(_size);
+    std::memset(_host_ptr, 0, _size);
+    std::memcpy(_host_ptr, init_list.begin(), init_list.size() * sizeof(T));
+  }
+
+  /// Constructor of 2-D array with initializer list
+  template <size_t D = Dimension>
+  device_memory(
+      const typename std::enable_if<D == 2, sycl::range<2>>::type &in_range,
+      std::initializer_list<std::initializer_list<value_t>> &&init_list)
+      : device_memory(in_range) {
+    assert(init_list.size() <= in_range[0]);
+    _host_ptr = (value_t *)std::malloc(_size);
+    std::memset(_host_ptr, 0, _size);
+    auto tmp_data = _host_ptr;
+    for (auto sub_list : init_list) {
+      assert(sub_list.size() <= in_range[1]);
+      std::memcpy(tmp_data, sub_list.begin(), sub_list.size() * sizeof(T));
+      tmp_data += in_range[1];
+    }
+  }
+
+  /// Constructor with range
+  device_memory(const sycl::range<Dimension> &range_in)
+      : _size(range_in.size() * sizeof(T)), _range(range_in), _reference(false),
+        _host_ptr(nullptr), _device_ptrs(get_ptrs_size(), nullptr) {
+    static_assert((Memory == global) || (Memory == constant) ||
+                      (Memory == shared),
+                  "device memory region should be global, constant or shared");
+    // Make sure that singleton class mem_mgr and dev_mgr will destruct later
+    // than this.
+    detail::mem_mgr::instance();
+    dev_mgr::instance();
+  }
+
+  /// Constructor with range
+  template <class... Args>
+  device_memory(Args... Arguments)
+      : device_memory(sycl::range<Dimension>(Arguments...)) {}
+
+  ~device_memory() {
+    if (!_reference) {
+      for (unsigned i = 0; i < _device_ptrs.size(); ++i) {
+        if (auto ptr = _device_ptrs[i])
+          dpct::dpct_free(ptr, get_device(i).default_queue());
+      }
+    }
+    if (_host_ptr)
+      std::free(_host_ptr);
+  }
+
+  /// Allocate memory with default queue, and init memory if has initial value.
+  void init() { init(dpct::get_default_queue()); }
+  /// Allocate memory with specified queue, and init memory if has initial
+  /// value.
+  void init(sycl::queue &q) { (void)get_ptr_impl(q); }
+
+  /// The variable is assigned to a device pointer.
+#ifndef DPCT_USM_LEVLE_NONE
+  [[deprecated]]
+#endif
+  void
+  assign(value_t *src, size_t size) {
+    this->~device_memory();
+    new (this) device_memory(src, size);
+  }
+
+  /// Get memory pointer of the memory object, which is virtual pointer when
+  /// usm is not used, and device pointer when usm is used.
+  value_t *get_ptr() { return get_ptr(get_default_queue()); }
+  /// Get memory pointer of the memory object, which is virtual pointer when
+  /// usm is not used, and device pointer when usm is used.
+  value_t *get_ptr(sycl::queue &q) { return get_ptr_impl(q); }
+
+  /// Get the device memory object size in bytes.
+  size_t get_size() { return _size; }
+
+  template <size_t D = Dimension>
+  typename std::enable_if<D == 1, T>::type &operator[](size_t index) {
+    auto ptr = get_ptr();
+#ifdef DPCT_USM_LEVEL_NONE
+    return dpct::get_buffer<typename std::enable_if<D == 1, T>::type>(ptr)
+        .get_host_access(sycl::read_write)[index];
+#else
+    return ptr[index];
+#endif // DPCT_USM_LEVEL_NONE
+  }
+
+#ifdef DPCT_USM_LEVEL_NONE
+  /// Get sycl::accessor for the device memory object when usm is not used.
+  accessor_t get_access(sycl::handler &cgh) {
+    return get_buffer(_device_ptrs.front())
+        .template reinterpret<T, Dimension>(_range)
+        .template get_access<detail::memory_traits<Memory, T>::mode,
+                             detail::memory_traits<Memory, T>::target>(cgh);
+  }
+#else
+  /// Get dpct::accessor with dimension info for the device memory object
+  /// when usm is used and dimension is greater than 1.
+  template <size_t D = Dimension>
+  typename std::enable_if<D != 1, dpct_accessor_t>::type
+  get_access(sycl::handler &cgh) {
+    return dpct_accessor_t((T *)_device_ptrs.front(), _range);
+  }
+#endif // DPCT_USM_LEVEL_NONE
+
+private:
+  device_memory(value_t *memory_ptr, size_t size)
+      : _size(size), _range(size / sizeof(T)), _reference(true),
+        _device_ptrs(get_ptrs_size(), memory_ptr) {}
+
+  value_t *allocate_device(sycl::queue &q) {
+    _q = q;
+#ifndef DPCT_USM_LEVEL_NONE
+    if (Memory == shared) {
+      return (value_t *)sycl::malloc_shared(_size, q.get_device(),
+                                            q.get_context());
+    }
+#ifdef SYCL_EXT_ONEAPI_USM_DEVICE_READ_ONLY
+    if (Memory == constant) {
+      return (value_t *)sycl::malloc_device(
+          _size, q.get_device(), q.get_context(),
+          sycl::ext::oneapi::property::usm::device_read_only());
+    }
+#endif
+#endif
+    return (value_t *)detail::dpct_malloc(_size, q);
+  }
+
+  value_t *get_ptr_impl(sycl::queue &q) {
+#ifdef DPCT_USM_LEVEL_NONE
+    auto &ptr = _device_ptrs.front();
+#else
+    auto &ptr = _device_ptrs[get_device_id(q.get_device())];
+#endif
+    if (ptr || !_size)
+      return ptr;
+    ptr = allocate_device(q);
+    if (_host_ptr)
+      detail::dpct_memcpy(q, ptr, _host_ptr, _size, host_to_device);
+    return ptr;
+  }
+
+  static size_t get_ptrs_size() {
+#ifdef DPCT_USM_LEVEL_NONE
+    return 1;
+#else
+    return device_count();
+#endif
+  }
+
+  size_t _size;
+  sycl::range<Dimension> _range;
+  bool _reference;
+  value_t *_host_ptr;
+  std::vector<value_t *> _device_ptrs;
+  sycl::queue _q;
+};
+template <class T, memory_region Memory>
+class device_memory<T, Memory, 0> : public device_memory<T, Memory, 1> {
+public:
+  using base = device_memory<T, Memory, 1>;
+  using value_t = typename base::value_t;
+  using accessor_t =
+      typename detail::memory_traits<Memory, T>::template accessor_t<0>;
+
+  /// Constructor with initial value.
+  device_memory(const value_t &val) : base(sycl::range<1>(1), {val}) {}
+
+  /// Default constructor
+  device_memory() : base(1) {}
+
+#ifdef DPCT_USM_LEVEL_NONE
+  /// Get sycl::accessor for the device memory object when usm is not used.
+  accessor_t get_access(sycl::handler &cgh) {
+    auto buf = get_buffer(base::get_ptr())
+                   .template reinterpret<T, 1>(sycl::range<1>(1));
+    return accessor_t(buf, cgh);
+  }
+#endif // DPCT_USM_LEVEL_NONE
+};
+
+} // namespace detail
+} // namespace dpct
+#endif //! __DPCT_DETAIL_MEMORY_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/rng_utils_detail.hpp b/sycl/include/dpct/detail/rng_utils_detail.hpp
new file mode 100644
index 00000000000..ec4e54003a2
--- /dev/null
+++ b/sycl/include/dpct/detail/rng_utils_detail.hpp
@@ -0,0 +1,382 @@
+//==---- rng_utils_detail.hpp --------------------------*- C++ -*-----------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_RNG_UTILS_DETAIL_HPP__
+#define __DPCT_RNG_UTILS_DETAIL_HPP__
+
+namespace dpct::rng::host::detail {
+static const std::string OneMKLNotSupport =
+    "The oneAPI Math Kernel Library (oneMKL) Interfaces Project does not "
+    "support this API.";
+class rng_generator_base {
+public:
+  /// Set the seed of host rng_generator.
+  /// \param seed The engine seed.
+  virtual void set_seed(const std::uint64_t seed) = 0;
+
+  /// Set the dimensions of host rng_generator.
+  /// \param dimensions The engine dimensions.
+  virtual void set_dimensions(const std::uint32_t dimensions) = 0;
+
+  /// Set the queue of host rng_generator.
+  /// \param queue The engine queue.
+  virtual void set_queue(sycl::queue *queue) = 0;
+
+  /// Set the mode of host rng_generator.
+  /// \param mode The engine mode.
+  virtual void set_mode(const random_mode mode) = 0;
+
+  /// Generate unsigned int random number(s) with 'uniform_bits' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  virtual inline void generate_uniform_bits(unsigned int *output,
+                                            std::int64_t n) = 0;
+
+  /// Generate unsigned long long random number(s) with 'uniform_bits'
+  /// distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  virtual inline void generate_uniform_bits(unsigned long long *output,
+                                            std::int64_t n) = 0;
+
+  /// Generate float random number(s) with 'lognormal' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param m Mean of associated normal distribution
+  /// \param s Standard deviation of associated normal distribution.
+  virtual inline void generate_lognormal(float *output, std::int64_t n, float m,
+                                         float s) = 0;
+
+  /// Generate double random number(s) with 'lognormal' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param m Mean of associated normal distribution
+  /// \param s Standard deviation of associated normal distribution.
+  virtual inline void generate_lognormal(double *output, std::int64_t n,
+                                         double m, double s) = 0;
+
+  /// Generate float random number(s) with 'gaussian' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param mean Mean of normal distribution
+  /// \param stddev Standard deviation of normal distribution.
+  virtual inline void generate_gaussian(float *output, std::int64_t n,
+                                        float mean, float stddev) = 0;
+
+  /// Generate double random number(s) with 'gaussian' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param mean Mean of normal distribution
+  /// \param stddev Standard deviation of normal distribution.
+  virtual inline void generate_gaussian(double *output, std::int64_t n,
+                                        double mean, double stddev) = 0;
+
+  /// Generate unsigned int random number(s) with 'poisson' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param lambda Lambda for the Poisson distribution.
+  virtual inline void generate_poisson(unsigned int *output, std::int64_t n,
+                                       double lambda) = 0;
+
+  /// Generate float random number(s) with 'uniform' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  virtual inline void generate_uniform(float *output, std::int64_t n) = 0;
+
+  /// Generate double random number(s) with 'uniform' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  virtual inline void generate_uniform(double *output, std::int64_t n) = 0;
+
+  /// Skip ahead several random number(s).
+  /// \param num_to_skip The number of random numbers to be skipped.
+  virtual void skip_ahead(const std::uint64_t num_to_skip) = 0;
+
+  /// Set the direction numbers of host rng_generator. Only Sobol engine
+  /// supports this method.
+  /// \param direction_numbers The engine direction numbers.
+  virtual void set_direction_numbers(
+      const std::vector<std::uint32_t> &direction_numbers) = 0;
+
+  /// Set the engine index of host rng_generator. Only MT2203 engine
+  /// supports this method.
+  /// \param engine_idx The engine index.
+  virtual void set_engine_idx(std::uint32_t engine_idx) = 0;
+
+protected:
+  /// Construct the host rng_generator.
+  /// \param queue The queue where the generator should be executed.
+  rng_generator_base(sycl::queue *queue) : _queue(queue) {}
+
+  sycl::queue *_queue = nullptr;
+  std::uint64_t _seed{0};
+  std::uint32_t _dimensions{1};
+  random_mode _mode{random_mode::best};
+  std::vector<std::uint32_t> _direction_numbers;
+  std::uint32_t _engine_idx{0};
+};
+
+/// The random number generator on host.
+template <typename engine_t = oneapi::mkl::rng::philox4x32x10>
+class rng_generator : public rng_generator_base {
+public:
+  /// Constructor of rng_generator.
+  /// \param q The queue where the generator should be executed.
+  rng_generator(sycl::queue &q = ::dpct::cs::get_default_queue())
+      : rng_generator_base(&q),
+        _engine(create_engine(&q, _seed, _dimensions, _mode)) {}
+
+  /// Set the seed of host rng_generator.
+  /// \param seed The engine seed.
+  void set_seed(const std::uint64_t seed) {
+    if (seed == _seed)
+      return;
+    _seed = seed;
+    _engine = create_engine(_queue, _seed, _dimensions, _mode);
+  }
+
+  /// Set the dimensions of host rng_generator.
+  /// \param dimensions The engine dimensions.
+  void set_dimensions(const std::uint32_t dimensions) {
+    if (dimensions == _dimensions)
+      return;
+    _dimensions = dimensions;
+    _engine = create_engine(_queue, _seed, _dimensions, _mode);
+  }
+
+  /// Set the queue of host rng_generator.
+  /// \param queue The engine queue.
+  void set_queue(sycl::queue *queue) {
+    if (queue == _queue)
+      return;
+    _queue = queue;
+    _engine = create_engine(_queue, _seed, _dimensions, _mode);
+  }
+
+  /// Set the mode of host rng_generator.
+  /// \param mode The engine mode.
+  void set_mode(const random_mode mode) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(OneMKLNotSupport);
+#else
+    if constexpr (!std::is_same_v<engine_t, oneapi::mkl::rng::mrg32k3a>) {
+      throw std::runtime_error("Only mrg32k3a engine support this method.");
+    }
+    if (mode == _mode)
+      return;
+    _mode = mode;
+    _engine = create_engine(_queue, _seed, _dimensions, _mode);
+#endif
+  }
+
+  /// Set the direction numbers of Sobol host rng_generator.
+  /// \param direction_numbers The user-defined direction numbers.
+  void
+  set_direction_numbers(const std::vector<std::uint32_t> &direction_numbers) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(OneMKLNotSupport);
+#else
+    if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::sobol>) {
+      if (direction_numbers == _direction_numbers)
+        return;
+      _direction_numbers = direction_numbers;
+      _engine =
+          create_engine(_queue, _seed, _dimensions, _mode, _direction_numbers);
+    } else {
+      throw std::runtime_error("Only Sobol engine supports this method.");
+    }
+#endif
+  }
+
+  /// Set the engine index of MT2203 host rng_generator.
+  /// \param engine_idx The user-defined engine index.
+  void set_engine_idx(std::uint32_t engine_idx) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) "
+                             "Interfaces Project does not support this API.");
+#else
+    if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::mt2203>) {
+      if (engine_idx == _engine_idx)
+        return;
+      _engine_idx = engine_idx;
+      _engine = create_engine(_queue, _seed, _dimensions, _mode, std::nullopt,
+                              _engine_idx);
+    } else {
+      throw std::runtime_error("Only MT2203 engine supports this method.");
+    }
+#endif
+  }
+
+  /// Generate unsigned int random number(s) with 'uniform_bits' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  inline void generate_uniform_bits(unsigned int *output, std::int64_t n) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(OneMKLNotSupport);
+#else
+    static_assert(sizeof(unsigned int) == sizeof(std::uint32_t));
+    generate<oneapi::mkl::rng::uniform_bits<std::uint32_t>>(
+        (std::uint32_t *)output, n);
+#endif
+  }
+
+  /// Generate unsigned long long random number(s) with 'uniform_bits'
+  /// distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  inline void generate_uniform_bits(unsigned long long *output,
+                                    std::int64_t n) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(OneMKLNotSupport);
+#else
+    static_assert(sizeof(unsigned long long) == sizeof(std::uint64_t));
+    generate<oneapi::mkl::rng::uniform_bits<std::uint64_t>>(
+        (std::uint64_t *)output, n);
+#endif
+  }
+
+  /// Generate float random number(s) with 'lognormal' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param m Mean of associated normal distribution
+  /// \param s Standard deviation of associated normal distribution.
+  inline void generate_lognormal(float *output, std::int64_t n, float m,
+                                 float s) {
+    generate<oneapi::mkl::rng::lognormal<float>>(output, n, m, s);
+  }
+
+  /// Generate double random number(s) with 'lognormal' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param m Mean of associated normal distribution
+  /// \param s Standard deviation of associated normal distribution.
+  inline void generate_lognormal(double *output, std::int64_t n, double m,
+                                 double s) {
+    generate<oneapi::mkl::rng::lognormal<double>>(output, n, m, s);
+  }
+
+  /// Generate float random number(s) with 'gaussian' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param mean Mean of normal distribution
+  /// \param stddev Standard deviation of normal distribution.
+  inline void generate_gaussian(float *output, std::int64_t n, float mean,
+                                float stddev) {
+    generate<oneapi::mkl::rng::gaussian<float>>(output, n, mean, stddev);
+  }
+
+  /// Generate double random number(s) with 'gaussian' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param mean Mean of normal distribution
+  /// \param stddev Standard deviation of normal distribution.
+  inline void generate_gaussian(double *output, std::int64_t n, double mean,
+                                double stddev) {
+    generate<oneapi::mkl::rng::gaussian<double>>(output, n, mean, stddev);
+  }
+
+  /// Generate unsigned int random number(s) with 'poisson' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  /// \param lambda Lambda for the Poisson distribution.
+  inline void generate_poisson(unsigned int *output, std::int64_t n,
+                               double lambda) {
+    generate<oneapi::mkl::rng::poisson<unsigned int>>(output, n, lambda);
+  }
+
+  /// Generate float random number(s) with 'uniform' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  inline void generate_uniform(float *output, std::int64_t n) {
+    generate<oneapi::mkl::rng::uniform<float>>(output, n);
+  }
+
+  /// Generate double random number(s) with 'uniform' distribution.
+  /// \param output The pointer of the first random number.
+  /// \param n The number of random numbers.
+  inline void generate_uniform(double *output, std::int64_t n) {
+    generate<oneapi::mkl::rng::uniform<double>>(output, n);
+  }
+
+  /// Skip ahead several random number(s).
+  /// \param num_to_skip The number of random numbers to be skipped.
+  void skip_ahead(const std::uint64_t num_to_skip) {
+#ifndef __INTEL_MKL__
+    oneapi::mkl::rng::skip_ahead(_engine, num_to_skip);
+#else
+    if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::mt2203>)
+      throw std::runtime_error("no skip_ahead method of mt2203 engine.");
+    else
+      oneapi::mkl::rng::skip_ahead(_engine, num_to_skip);
+#endif
+  }
+
+private:
+  static inline engine_t
+  create_engine(sycl::queue *queue, const std::uint64_t seed,
+                const std::uint32_t dimensions, const random_mode mode,
+                std::optional<std::vector<std::uint32_t>> direction_numbers =
+                    std::nullopt,
+                std::optional<std::uint32_t> engine_idx = std::nullopt) {
+#ifdef __INTEL_MKL__
+    if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::mrg32k3a>) {
+      // oneapi::mkl::rng::mrg32k3a_mode is only supported for GPU device. For
+      // other devices, this argument will be ignored.
+      if (queue->get_device().is_gpu()) {
+#if __cplusplus < 202002L
+        // before C++20
+        switch (mode) {
+        case random_mode::best:
+          return engine_t(*queue, seed,
+                          oneapi::mkl::rng::mrg32k3a_mode::custom{81920});
+        case random_mode::legacy:
+          return engine_t(*queue, seed,
+                          oneapi::mkl::rng::mrg32k3a_mode::custom{4096});
+        case random_mode::optimal:
+          return engine_t(*queue, seed,
+                          oneapi::mkl::rng::mrg32k3a_mode::optimal_v);
+        }
+#else
+        // since C++20
+#if defined(_MSC_VER) && !defined(__clang__)
+#pragma message("warning: oneapi::mkl::rng::mrg32k3a_mode::custom cannot be "  \
+                "initialized with a value since C++20. Ignore the parameter "  \
+                "`mode`.")
+#else
+#warning "oneapi::mkl::rng::mrg32k3a_mode::custom cannot be initialized with " \
+         "a value since C++20. Ignore the parameter `mode`."
+#endif
+        return engine_t(*queue, dimensions);
+#endif
+      }
+    } else if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::mt2203>) {
+      if (engine_idx.has_value()) {
+        return engine_t(*queue, seed, engine_idx.value());
+      }
+    } else if constexpr (std::is_same_v<engine_t, oneapi::mkl::rng::sobol>) {
+      if (direction_numbers.has_value()) {
+        return engine_t(*queue, direction_numbers.value());
+      }
+      return engine_t(*queue, dimensions);
+    }
+#endif
+    return engine_t(*queue, seed);
+  }
+
+  template <typename distr_t, typename buffer_t, class... distr_params_t>
+  void generate(buffer_t *output, const std::int64_t n,
+                const distr_params_t... distr_params) {
+    auto output_buf = ::dpct::detail::get_memory<buffer_t>(output);
+    oneapi::mkl::rng::generate(distr_t(distr_params...), _engine, n,
+                               output_buf);
+  }
+  engine_t _engine{};
+};
+} // namespace dpct::rng::host::detail
+
+#endif // __DPCT_RNG_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/detail/sparse_utils_detail.hpp b/sycl/include/dpct/detail/sparse_utils_detail.hpp
new file mode 100644
index 00000000000..b341e7878d1
--- /dev/null
+++ b/sycl/include/dpct/detail/sparse_utils_detail.hpp
@@ -0,0 +1,585 @@
+//==---- sparse_utils_detail.hpp --------------------------*- C++ -*--------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_SPARSE_UTILS_DETAIL_HPP__
+#define __DPCT_SPARSE_UTILS_DETAIL_HPP__
+
+namespace dpct::sparse {
+namespace detail {
+using csrgemm_args_info =
+    std::tuple<oneapi::mkl::transpose, oneapi::mkl::transpose, int, int, int,
+               const std::shared_ptr<matrix_info>, const void *, const int *,
+               const int *, const std::shared_ptr<matrix_info>, const void *,
+               const int *, const int *, const std::shared_ptr<matrix_info>,
+               const int *>;
+struct csrgemm_args_info_hash {
+  size_t operator()(const csrgemm_args_info &args) const {
+    std::stringstream ss;
+    ss << (char)std::get<0>(args) << ":";
+    ss << (char)std::get<1>(args) << ":";
+    ss << std::get<2>(args) << ":";
+    ss << std::get<3>(args) << ":";
+    ss << std::get<4>(args) << ":";
+    ss << std::get<5>(args).get() << ":";
+    ss << std::get<6>(args) << ":";
+    ss << std::get<7>(args) << ":";
+    ss << std::get<8>(args) << ":";
+    ss << std::get<9>(args).get() << ":";
+    ss << std::get<10>(args) << ":";
+    ss << std::get<11>(args) << ":";
+    ss << std::get<12>(args) << ":";
+    ss << std::get<13>(args).get() << ":";
+    ss << std::get<14>(args) << ":";
+    return std::hash<std::string>{}(ss.str());
+  }
+};
+
+#ifdef __INTEL_MKL__ // The oneMKL Interfaces Project does not support this.
+template <typename handle_t> class handle_manager {
+public:
+  handle_manager() {}
+  handle_manager(const handle_manager &other) = delete;
+  handle_manager operator=(handle_manager other) = delete;
+  ~handle_manager() {
+    if (!_q || !_h)
+      return;
+    release();
+  }
+  void init(sycl::queue *q) {
+    _q = q;
+    _h = new handle_t;
+    _init_func(*_q, _h);
+  }
+  sycl::event release() {
+    if (!_q || !_h)
+      return sycl::event();
+    sycl::event e = _rel_func(*_q, _h, _deps);
+    sycl::event ret = _q->submit([&](sycl::handler &cgh) {
+      cgh.depends_on(e);
+      cgh.host_task([_hh = _h] { delete _hh; });
+    });
+    _h = nullptr;
+    _q = nullptr;
+    return ret;
+  }
+  handle_t &get_handle() { return *_h; }
+  void add_dependency(sycl::event e) { _deps.push_back(e); }
+  bool is_empty() { return !_h; }
+
+protected:
+  sycl::queue *_q = nullptr;
+
+private:
+  using init_func_t = std::function<void(sycl::queue &, handle_t *)>;
+  using rel_func_t = std::function<sycl::event(
+      sycl::queue &, handle_t *, const std::vector<sycl::event> &dependencies)>;
+  handle_t *_h = nullptr;
+  inline static init_func_t _init_func = nullptr;
+  inline static rel_func_t _rel_func = nullptr;
+  std::vector<sycl::event> _deps;
+};
+template <>
+inline handle_manager<oneapi::mkl::sparse::matrix_handle_t>::init_func_t
+    handle_manager<oneapi::mkl::sparse::matrix_handle_t>::_init_func =
+        [](sycl::queue &queue, oneapi::mkl::sparse::matrix_handle_t *p_desc) {
+          oneapi::mkl::sparse::init_matrix_handle(p_desc);
+        };
+template <>
+inline handle_manager<oneapi::mkl::sparse::matrix_handle_t>::rel_func_t
+    handle_manager<oneapi::mkl::sparse::matrix_handle_t>::_rel_func =
+        oneapi::mkl::sparse::release_matrix_handle;
+
+template <>
+inline handle_manager<oneapi::mkl::sparse::omatadd_descr_t>::init_func_t
+    handle_manager<oneapi::mkl::sparse::omatadd_descr_t>::_init_func =
+        oneapi::mkl::sparse::init_omatadd_descr;
+template <>
+inline handle_manager<oneapi::mkl::sparse::omatadd_descr_t>::rel_func_t
+    handle_manager<oneapi::mkl::sparse::omatadd_descr_t>::_rel_func =
+        [](sycl::queue &queue, oneapi::mkl::sparse::omatadd_descr_t *p_desc,
+           const std::vector<sycl::event> &dependencies) -> sycl::event {
+  return oneapi::mkl::sparse::release_omatadd_descr(queue, *p_desc,
+                                                    dependencies);
+};
+
+template <>
+inline handle_manager<oneapi::mkl::sparse::matmat_descr_t>::init_func_t
+    handle_manager<oneapi::mkl::sparse::matmat_descr_t>::_init_func =
+        [](sycl::queue &queue, oneapi::mkl::sparse::matmat_descr_t *p_desc) {
+          oneapi::mkl::sparse::init_matmat_descr(p_desc);
+        };
+template <>
+inline handle_manager<oneapi::mkl::sparse::matmat_descr_t>::rel_func_t
+    handle_manager<oneapi::mkl::sparse::matmat_descr_t>::_rel_func =
+        [](sycl::queue &queue, oneapi::mkl::sparse::matmat_descr_t *p_desc,
+           const std::vector<sycl::event> &dependencies) -> sycl::event {
+  return queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(dependencies);
+    cgh.host_task([=] { oneapi::mkl::sparse::release_matmat_descr(p_desc); });
+  });
+};
+class matrix_handle_manager
+    : public handle_manager<oneapi::mkl::sparse::matrix_handle_t> {
+public:
+  using handle_manager<oneapi::mkl::sparse::matrix_handle_t>::handle_manager;
+  template <typename Ty>
+  void set_matrix_data(const int rows, const int cols,
+                       oneapi::mkl::index_base base, const void *row_ptr,
+                       const void *col_ind, const void *val) {
+#ifdef DPCT_USM_LEVEL_NONE
+    _row_ptr_buf = dpct::detail::get_memory<int>((int *)row_ptr);
+    _col_ind_buf = dpct::detail::get_memory<int>((int *)col_ind);
+    _val_buf = dpct::detail::get_memory<Ty>((Ty *)val);
+    oneapi::mkl::sparse::set_csr_data(*_q, get_handle(), rows, cols, base,
+                                      _row_ptr_buf, _col_ind_buf,
+                                      std::get<sycl::buffer<Ty>>(_val_buf));
+#else
+    oneapi::mkl::sparse::set_csr_data(*_q, get_handle(), rows, cols, base,
+                                      (int *)row_ptr, (int *)col_ind,
+                                      (Ty *)val);
+#endif
+  }
+
+private:
+#ifdef DPCT_USM_LEVEL_NONE
+  static constexpr size_t _max_data_variable_size =
+      (std::max)({sizeof(sycl::buffer<float>), sizeof(sycl::buffer<double>),
+                  sizeof(sycl::buffer<std::complex<float>>),
+                  sizeof(sycl::buffer<std::complex<double>>)});
+  using value_buf_t =
+      std::variant<std::array<std::byte, _max_data_variable_size>,
+                   sycl::buffer<float>, sycl::buffer<double>,
+                   sycl::buffer<std::complex<float>>,
+                   sycl::buffer<std::complex<double>>>;
+  sycl::buffer<int> _row_ptr_buf = sycl::buffer<int>(0);
+  sycl::buffer<int> _col_ind_buf = sycl::buffer<int>(0);
+  value_buf_t _val_buf;
+#endif
+};
+
+#ifdef DPCT_USM_LEVEL_NONE
+#define SPARSE_CALL(CALL, HANDLE) CALL;
+#else
+#define SPARSE_CALL(CALL, HANDLE)                                              \
+  sycl::event e = CALL;                                                        \
+  HANDLE->add_dependency(e);
+#endif
+
+template <typename T> struct optimize_csrsv_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans, int row_col,
+                  const std::shared_ptr<matrix_info> info, const void *val,
+                  const int *row_ptr, const int *col_ind,
+                  std::shared_ptr<optimize_info> optimize_info) {
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    auto temp_row_ptr = dpct::detail::get_memory<int>(row_ptr);
+    auto temp_col_ind = dpct::detail::get_memory<int>(col_ind);
+    auto temp_val = dpct::detail::get_memory<Ty>(val);
+#ifdef DPCT_USM_LEVEL_NONE
+    optimize_info->_row_ptr_buf = temp_row_ptr;
+    optimize_info->_col_ind_buf = temp_col_ind;
+    optimize_info->_val_buf = temp_val;
+    auto &data_row_ptr = optimize_info->_row_ptr_buf;
+    auto &data_col_ind = optimize_info->_col_ind_buf;
+    auto &data_val = std::get<sycl::buffer<Ty>>(optimize_info->_val_buf);
+#else
+    auto data_row_ptr = temp_row_ptr;
+    auto data_col_ind = temp_col_ind;
+    auto data_val = temp_val;
+#endif
+    oneapi::mkl::sparse::set_csr_data(queue, optimize_info->get_matrix_handle(),
+                                      row_col, row_col, info->get_index_base(),
+                                      data_row_ptr, data_col_ind, data_val);
+    if (info->get_matrix_type() != matrix_info::matrix_type::tr)
+      throw std::runtime_error("dpct::sparse::optimize_csrsv_impl()(): "
+                               "oneapi::mkl::sparse::optimize_trsv "
+                               "only accept triangular matrix.");
+    SPARSE_CALL(oneapi::mkl::sparse::optimize_trsv(
+                    queue, info->get_uplo(), trans, info->get_diag(),
+                    optimize_info->get_matrix_handle()),
+                optimize_info);
+  }
+};
+template <typename T> struct csrsv_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans, int row_col,
+                  const void *alpha, const std::shared_ptr<matrix_info> info,
+                  const void *val, const int *row_ptr, const int *col_ind,
+                  std::shared_ptr<optimize_info> optimize_info, const void *x,
+                  void *y) {
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    auto alpha_value =
+        dpct::detail::get_value(static_cast<const Ty *>(alpha), queue);
+    auto data_x = dpct::detail::get_memory<Ty>(x);
+    auto data_y = dpct::detail::get_memory<Ty>(y);
+    SPARSE_CALL(oneapi::mkl::sparse::trsv(queue, info->get_uplo(), trans,
+                                          info->get_diag(), alpha_value,
+                                          optimize_info->get_matrix_handle(),
+                                          data_x, data_y),
+                optimize_info);
+  }
+};
+
+template <typename T> struct optimize_csrsm_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose transa,
+                  oneapi::mkl::transpose transb, int row_col, int nrhs,
+                  const std::shared_ptr<matrix_info> info, const void *val,
+                  const int *row_ptr, const int *col_ind,
+                  std::shared_ptr<optimize_info> optimize_info) {
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    auto temp_row_ptr = dpct::detail::get_memory<int>(row_ptr);
+    auto temp_col_ind = dpct::detail::get_memory<int>(col_ind);
+    auto temp_val = dpct::detail::get_memory<Ty>(val);
+#ifdef DPCT_USM_LEVEL_NONE
+    optimize_info->_row_ptr_buf = temp_row_ptr;
+    optimize_info->_col_ind_buf = temp_col_ind;
+    optimize_info->_val_buf = temp_val;
+    auto &data_row_ptr = optimize_info->_row_ptr_buf;
+    auto &data_col_ind = optimize_info->_col_ind_buf;
+    auto &data_val = std::get<sycl::buffer<Ty>>(optimize_info->_val_buf);
+#else
+    auto data_row_ptr = temp_row_ptr;
+    auto data_col_ind = temp_col_ind;
+    auto data_val = temp_val;
+#endif
+    oneapi::mkl::sparse::set_csr_data(queue, optimize_info->get_matrix_handle(),
+                                      row_col, row_col, info->get_index_base(),
+                                      data_row_ptr, data_col_ind, data_val);
+    if (info->get_matrix_type() != matrix_info::matrix_type::tr)
+      throw std::runtime_error("dpct::sparse::optimize_csrsv_impl()(): "
+                               "oneapi::mkl::sparse::optimize_trsm "
+                               "only accept triangular matrix.");
+    SPARSE_CALL(oneapi::mkl::sparse::optimize_trsm(
+                    queue,
+                    transb == oneapi::mkl::transpose::nontrans
+                        ? oneapi::mkl::layout::col_major
+                        : oneapi::mkl::layout::row_major,
+                    info->get_uplo(), transa, info->get_diag(),
+                    optimize_info->get_matrix_handle(), nrhs),
+                optimize_info);
+  }
+};
+template <typename T> struct csrsm_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose transa,
+                  oneapi::mkl::transpose transb, int row_col, int nrhs,
+                  const void *alpha, const std::shared_ptr<matrix_info> info,
+                  const void *val, const int *row_ptr, const int *col_ind,
+                  void *b, int ldb,
+                  std::shared_ptr<optimize_info> optimize_info) {
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    auto alpha_value =
+        dpct::detail::get_value(static_cast<const Ty *>(alpha), queue);
+    auto data_b = dpct::detail::get_memory<Ty>(b);
+
+    int x_size =
+        ldb * (transb == oneapi::mkl::transpose::nontrans ? nrhs : row_col);
+    Ty *x = (Ty *)::dpct::cs::malloc(sizeof(Ty) * x_size, queue);
+
+    auto data_x = dpct::detail::get_memory<Ty>(x);
+
+    sycl::event e1;
+#ifndef DPCT_USM_LEVEL_NONE
+    e1 =
+#endif
+        oneapi::mkl::sparse::trsm(
+            queue,
+            transb == oneapi::mkl::transpose::nontrans
+                ? oneapi::mkl::layout::col_major
+                : oneapi::mkl::layout::row_major,
+            transa, oneapi::mkl::transpose::nontrans, info->get_uplo(),
+            info->get_diag(), alpha_value, optimize_info->get_matrix_handle(),
+            data_b, nrhs, ldb, data_x, ldb);
+
+    sycl::event e2 =
+        ::dpct::cs::memcpy(queue, b, x, sizeof(Ty) * x_size,
+                           ::dpct::cs::memcpy_direction::automatic, {e1});
+
+    sycl::event e3 = ::dpct::cs::enqueue_free({x}, {e2}, queue);
+    optimize_info->add_dependency(e3);
+  }
+};
+
+template <typename T> struct spmv_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans,
+                  const void *alpha, sparse_matrix_desc_t a,
+                  std::shared_ptr<dense_vector_desc> x, const void *beta,
+                  std::shared_ptr<dense_vector_desc> y) {
+    auto alpha_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(alpha), queue);
+    auto beta_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(beta), queue);
+    auto data_x = dpct::detail::get_memory<T>(x->get_value());
+    auto data_y = dpct::detail::get_memory<T>(y->get_value());
+    if (a->get_diag().has_value() && a->get_uplo().has_value()) {
+      oneapi::mkl::sparse::optimize_trmv(queue, a->get_uplo().value(), trans,
+                                         a->get_diag().value(),
+                                         a->get_matrix_handle());
+      SPARSE_CALL(oneapi::mkl::sparse::trmv(queue, a->get_uplo().value(), trans,
+                                            a->get_diag().value(), alpha_value,
+                                            a->get_matrix_handle(), data_x,
+                                            beta_value, data_y),
+                  a);
+    } else {
+      oneapi::mkl::sparse::optimize_gemv(queue, trans, a->get_matrix_handle());
+      SPARSE_CALL(oneapi::mkl::sparse::gemv(queue, trans, alpha_value,
+                                            a->get_matrix_handle(), data_x,
+                                            beta_value, data_y),
+                  a);
+    }
+  }
+};
+
+template <typename T> struct spmm_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans_a,
+                  oneapi::mkl::transpose trans_b, const void *alpha,
+                  sparse_matrix_desc_t a, std::shared_ptr<dense_matrix_desc> b,
+                  const void *beta, std::shared_ptr<dense_matrix_desc> c) {
+    auto alpha_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(alpha), queue);
+    auto beta_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(beta), queue);
+    auto data_b = dpct::detail::get_memory<T>(b->get_value());
+    auto data_c = dpct::detail::get_memory<T>(c->get_value());
+    SPARSE_CALL(
+        oneapi::mkl::sparse::gemm(queue, b->get_layout(), trans_a, trans_b,
+                                  alpha_value, a->get_matrix_handle(), data_b,
+                                  b->get_col_num(), b->get_leading_dim(),
+                                  beta_value, data_c, c->get_leading_dim()),
+        a);
+  }
+};
+
+template <typename T> struct spsv_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::uplo uplo,
+                  oneapi::mkl::diag diag, oneapi::mkl::transpose trans_a,
+                  const void *alpha, sparse_matrix_desc_t a,
+                  std::shared_ptr<dense_vector_desc> x,
+                  std::shared_ptr<dense_vector_desc> y) {
+    auto alpha_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(alpha), queue);
+    auto data_x = dpct::detail::get_memory<T>(x->get_value());
+    auto data_y = dpct::detail::get_memory<T>(y->get_value());
+    SPARSE_CALL(oneapi::mkl::sparse::trsv(queue, uplo, trans_a, diag,
+                                          alpha_value, a->get_matrix_handle(),
+                                          data_x, data_y),
+                a);
+  }
+};
+
+template <typename T> struct spsm_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans_a,
+                  oneapi::mkl::transpose trans_b, oneapi::mkl::uplo uplo,
+                  oneapi::mkl::diag diag, const void *alpha,
+                  sparse_matrix_desc_t a, std::shared_ptr<dense_matrix_desc> b,
+                  std::shared_ptr<dense_matrix_desc> c) {
+    auto alpha_value =
+        dpct::detail::get_value(reinterpret_cast<const T *>(alpha), queue);
+    auto data_b = dpct::detail::get_memory<T>(b->get_value());
+    auto data_c = dpct::detail::get_memory<T>(c->get_value());
+    SPARSE_CALL(oneapi::mkl::sparse::trsm(
+                    queue, b->get_layout(), trans_a, trans_b, uplo, diag,
+                    alpha_value, a->get_matrix_handle(), data_b,
+                    c->get_col_num(), b->get_leading_dim(), data_c,
+                    c->get_leading_dim()),
+                a);
+  }
+};
+#undef SPARSE_CALL
+
+template <typename T, bool is_host_memory, typename host_memory_t = void>
+struct temp_memory {
+  static_assert(!is_host_memory || !std::is_same_v<host_memory_t, void>,
+                "host_memory_t cannot be void when the input parameter ptr "
+                "points to host memory");
+  temp_memory(sycl::queue queue, void *ptr)
+      : _queue(queue)
+#ifdef DPCT_USM_LEVEL_NONE
+        ,
+        _buffer(is_host_memory ? sycl::buffer<T, 1>(sycl::range<1>(1))
+                               : sycl::buffer<T, 1>(dpct::get_buffer<T>(ptr)))
+#endif
+  {
+    if constexpr (is_host_memory) {
+      _original_host_ptr = static_cast<host_memory_t *>(ptr);
+#ifdef DPCT_USM_LEVEL_NONE
+      auto _buffer_acc = _buffer.get_host_access(sycl::write_only);
+      _buffer_acc[0] = static_cast<T>(*_original_host_ptr);
+#else
+      _memory_ptr = sycl::malloc_host<T>(1, _queue);
+      *_memory_ptr = static_cast<T>(*_original_host_ptr);
+#endif
+    } else {
+#ifndef DPCT_USM_LEVEL_NONE
+      _memory_ptr = static_cast<T *>(ptr);
+#endif
+    }
+  }
+
+  ~temp_memory() {
+    if constexpr (is_host_memory) {
+#ifdef DPCT_USM_LEVEL_NONE
+      auto _buffer_acc = _buffer.get_host_access(sycl::read_only);
+      *_original_host_ptr = static_cast<host_memory_t>(_buffer_acc[0]);
+#else
+      _queue.wait();
+      *_original_host_ptr = *_memory_ptr;
+      sycl::free(_memory_ptr, _queue);
+#endif
+    }
+  }
+  auto get_memory_ptr() {
+#ifdef DPCT_USM_LEVEL_NONE
+    return &_buffer;
+#else
+    return _memory_ptr;
+#endif
+  }
+
+private:
+  sycl::queue _queue;
+  host_memory_t *_original_host_ptr = nullptr;
+#ifdef DPCT_USM_LEVEL_NONE
+  sycl::buffer<T, 1> _buffer;
+#else
+  T *_memory_ptr;
+#endif
+};
+
+template <typename T> struct csr2csc_impl {
+  void operator()(sycl::queue queue, int m, int n, int nnz,
+                  const void *from_val, const int *from_row_ptr,
+                  const int *from_col_ind, void *to_val, int *to_col_ptr,
+                  int *to_row_ind, conversion_scope range,
+                  oneapi::mkl::index_base base) {
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    oneapi::mkl::sparse::matrix_handle_t from_handle = nullptr;
+    oneapi::mkl::sparse::matrix_handle_t to_handle = nullptr;
+    oneapi::mkl::sparse::init_matrix_handle(&from_handle);
+    oneapi::mkl::sparse::init_matrix_handle(&to_handle);
+    auto data_from_row_ptr = dpct::detail::get_memory<int>(from_row_ptr);
+    auto data_from_col_ind = dpct::detail::get_memory<int>(from_col_ind);
+    auto data_from_val = dpct::detail::get_memory<Ty>(from_val);
+    auto data_to_col_ptr = dpct::detail::get_memory<int>(to_col_ptr);
+    auto data_to_row_ind = dpct::detail::get_memory<int>(to_row_ind);
+    void *new_to_value = to_val;
+    if (range == conversion_scope::index) {
+      new_to_value =
+          ::dpct::cs::malloc(sizeof(Ty) * nnz, ::dpct::cs::get_default_queue());
+    }
+    auto data_to_val = dpct::detail::get_memory<Ty>(new_to_value);
+    oneapi::mkl::sparse::set_csr_data(queue, from_handle, m, n, base,
+                                      data_from_row_ptr, data_from_col_ind,
+                                      data_from_val);
+    oneapi::mkl::sparse::set_csr_data(queue, to_handle, n, m, base,
+                                      data_to_col_ptr, data_to_row_ind,
+                                      data_to_val);
+    sycl::event e1 = oneapi::mkl::sparse::omatcopy(
+        queue, oneapi::mkl::transpose::trans, from_handle, to_handle);
+    sycl::event e2 =
+        oneapi::mkl::sparse::release_matrix_handle(queue, &from_handle, {e1});
+    sycl::event e3 =
+        oneapi::mkl::sparse::release_matrix_handle(queue, &to_handle, {e1});
+    if (range == conversion_scope::index) {
+      ::dpct::cs::enqueue_free({new_to_value}, {e2, e3}, queue);
+    }
+  }
+};
+#endif
+
+template <template <typename> typename functor_t, typename... args_t>
+inline void spblas_shim(library_data_t type, args_t &&...args) {
+  switch (type) {
+  case library_data_t::real_float: {
+    functor_t<float>()(std::forward<args_t>(args)...);
+    break;
+  }
+  case library_data_t::real_double: {
+    functor_t<double>()(std::forward<args_t>(args)...);
+    break;
+  }
+  case library_data_t::complex_float: {
+    functor_t<std::complex<float>>()(std::forward<args_t>(args)...);
+    break;
+  }
+  case library_data_t::complex_double: {
+    functor_t<std::complex<double>>()(std::forward<args_t>(args)...);
+    break;
+  }
+  default:
+    throw std::runtime_error("The data type is not supported.");
+  }
+}
+
+template <typename T> struct csrmv_impl {
+  void operator()(sycl::queue &queue, oneapi::mkl::transpose trans,
+                  int num_rows, int num_cols, const void *alpha,
+                  const std::shared_ptr<matrix_info> info, const void *val,
+                  const int *row_ptr, const int *col_ind, const void *x,
+                  const void *beta, void *y) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(
+        "The oneAPI Math Kernel Library (oneMKL) Interfaces "
+        "Project does not support this API.");
+#else
+    using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+    auto alpha_value =
+        dpct::detail::get_value(reinterpret_cast<const Ty *>(alpha), queue);
+    auto beta_value =
+        dpct::detail::get_value(reinterpret_cast<const Ty *>(beta), queue);
+
+    oneapi::mkl::sparse::matrix_handle_t *sparse_matrix_handle =
+        new oneapi::mkl::sparse::matrix_handle_t;
+    oneapi::mkl::sparse::init_matrix_handle(sparse_matrix_handle);
+    auto data_row_ptr = dpct::detail::get_memory<int>(row_ptr);
+    auto data_col_ind = dpct::detail::get_memory<int>(col_ind);
+    auto data_val = dpct::detail::get_memory<Ty>(val);
+    oneapi::mkl::sparse::set_csr_data(queue, *sparse_matrix_handle, num_rows,
+                                      num_cols, info->get_index_base(),
+                                      data_row_ptr, data_col_ind, data_val);
+
+    auto data_x = dpct::detail::get_memory<Ty>(x);
+    auto data_y = dpct::detail::get_memory<Ty>(y);
+    switch (info->get_matrix_type()) {
+    case matrix_info::matrix_type::ge: {
+      oneapi::mkl::sparse::optimize_gemv(queue, trans, *sparse_matrix_handle);
+      oneapi::mkl::sparse::gemv(queue, trans, alpha_value,
+                                *sparse_matrix_handle, data_x, beta_value,
+                                data_y);
+      break;
+    }
+    case matrix_info::matrix_type::sy: {
+      oneapi::mkl::sparse::symv(queue, info->get_uplo(), alpha_value,
+                                *sparse_matrix_handle, data_x, beta_value,
+                                data_y);
+      break;
+    }
+    case matrix_info::matrix_type::tr: {
+      oneapi::mkl::sparse::optimize_trmv(queue, info->get_uplo(), trans,
+                                         info->get_diag(),
+                                         *sparse_matrix_handle);
+      oneapi::mkl::sparse::trmv(
+          queue, info->get_uplo(), trans, info->get_diag(), alpha_value,
+          *sparse_matrix_handle, data_x, beta_value, data_y);
+      break;
+    }
+    default:
+      throw std::runtime_error(
+          "the spmv does not support matrix_info::matrix_type::he");
+    }
+
+    sycl::event e =
+        oneapi::mkl::sparse::release_matrix_handle(queue, sparse_matrix_handle);
+    queue.submit([&](sycl::handler &cgh) {
+      cgh.depends_on(e);
+      cgh.host_task([=] { delete sparse_matrix_handle; });
+    });
+#endif
+  }
+};
+} // namespace detail
+} // namespace dpct::sparse
+
+#endif // __DPCT_SPARSE_UTILS_DETAIL_HPP__
diff --git a/sycl/include/dpct/device.hpp b/sycl/include/dpct/device.hpp
new file mode 100644
index 00000000000..b55d2dcf08b
--- /dev/null
+++ b/sycl/include/dpct/device.hpp
@@ -0,0 +1,1010 @@
+//==---- device.hpp -------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_DEVICE_HPP__
+#define __DPCT_DEVICE_HPP__
+
+#include <algorithm>
+#include <array>
+#include <climits>
+#include <cstring>
+#include <functional>
+#include <iostream>
+#include <map>
+#include <mutex>
+#include <set>
+#include <sstream>
+#include <stack>
+#include <sycl/sycl.hpp>
+#include <thread>
+#include <vector>
+#if defined(__linux__)
+#include <unistd.h>
+#include <sys/syscall.h>
+#endif
+#if defined(_WIN64)
+#ifndef NOMINMAX
+#define NOMINMAX
+#endif
+#include <windows.h>
+#endif
+
+namespace dpct {
+namespace detail {
+static void get_version(const sycl::device &dev, int &major, int &minor) {
+  // Version string has the following format:
+  // a. OpenCL<space><major.minor><space><vendor-specific-information>
+  // b. <major.minor>
+  std::string ver;
+  ver = dev.get_info<sycl::info::device::version>();
+  std::string::size_type i = 0;
+  while (i < ver.size()) {
+    if (isdigit(ver[i]))
+      break;
+    i++;
+  }
+  if (i < ver.size())
+    major = std::stoi(&(ver[i]));
+  else
+    major = 0;
+  while (i < ver.size()) {
+    if (ver[i] == '.')
+      break;
+    i++;
+  }
+  i++;
+  if (i < ver.size())
+    minor = std::stoi(&(ver[i]));
+  else
+    minor = 0;
+}
+} // namespace detail
+
+/// SYCL default exception handler
+inline auto exception_handler = [](sycl::exception_list exceptions) {
+  for (std::exception_ptr const &e : exceptions) {
+    try {
+      std::rethrow_exception(e);
+    } catch (sycl::exception const &e) {
+      std::cerr << "Caught asynchronous SYCL exception:" << std::endl
+                << e.what() << std::endl
+                << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+    }
+  }
+};
+
+typedef sycl::event *event_ptr;
+
+typedef sycl::queue *queue_ptr;
+
+typedef char *device_ptr;
+
+using queue_callback = std::function<void (queue_ptr, int, void*)>;
+
+/// Destroy \p event pointed memory.
+///
+/// \param event Pointer to the sycl::event address.
+static void destroy_event(event_ptr event) {
+    delete event;
+}
+
+class device_info {
+public:
+  // get interface
+  const char *get_name() const { return _name; }
+  char *get_name() { return _name; }
+  template <typename WorkItemSizesTy = sycl::range<3>,
+            std::enable_if_t<std::is_same_v<WorkItemSizesTy, sycl::range<3>> ||
+                                 std::is_same_v<WorkItemSizesTy, int *>,
+                             int> = 0>
+  auto get_max_work_item_sizes() const {
+    if constexpr (std::is_same_v<WorkItemSizesTy, sycl::range<3>>)
+      return sycl::range<3>(_max_work_item_sizes_i[0],
+                            _max_work_item_sizes_i[1],
+                            _max_work_item_sizes_i[2]);
+    else {
+      return _max_work_item_sizes_i;
+    }  
+  }
+  template <typename WorkItemSizesTy = sycl::range<3>,
+            std::enable_if_t<std::is_same_v<WorkItemSizesTy, sycl::range<3>> ||
+                                 std::is_same_v<WorkItemSizesTy, int *>,
+                             int> = 0>
+  auto get_max_work_item_sizes() {
+    if constexpr (std::is_same_v<WorkItemSizesTy, sycl::range<3>>)
+      return sycl::range<3>(_max_work_item_sizes_i[0],
+                            _max_work_item_sizes_i[1],
+                            _max_work_item_sizes_i[2]);
+    else {
+      return _max_work_item_sizes_i;
+    }  
+  }
+  bool get_host_unified_memory() const { return _host_unified_memory; }
+  int get_major_version() const { return _major; }
+  int get_minor_version() const { return _minor; }
+  int get_integrated() const { return _integrated; }
+  int get_max_clock_frequency() const { return _frequency; }
+  int get_max_compute_units() const { return _max_compute_units; }
+  int get_max_work_group_size() const { return _max_work_group_size; }
+  int get_max_sub_group_size() const { return _max_sub_group_size; }
+  int get_max_work_items_per_compute_unit() const {
+    return _max_work_items_per_compute_unit;
+  }
+  int get_max_register_size_per_work_group() const {
+    return _max_register_size_per_work_group;
+  }
+  template <typename NDRangeSizeTy = size_t *,
+            std::enable_if_t<std::is_same_v<NDRangeSizeTy, size_t *> ||
+                                 std::is_same_v<NDRangeSizeTy, int *>,
+                             int> = 0>
+  auto get_max_nd_range_size() const {
+    if constexpr (std::is_same_v<NDRangeSizeTy, size_t *>)
+      return _max_nd_range_size;
+    else
+      return _max_nd_range_size_i;
+  }
+  template <typename NDRangeSizeTy = size_t *,
+            std::enable_if_t<std::is_same_v<NDRangeSizeTy, size_t *> ||
+                                 std::is_same_v<NDRangeSizeTy, int *>,
+                             int> = 0>
+  auto get_max_nd_range_size() {
+    if constexpr (std::is_same_v<NDRangeSizeTy, size_t *>)
+      return _max_nd_range_size;
+    else
+      return _max_nd_range_size_i;
+  }
+  size_t get_global_mem_size() const { return _global_mem_size; }
+  size_t get_local_mem_size() const { return _local_mem_size; }
+  /// Returns the maximum clock rate of device's global memory in kHz. If
+  /// compiler does not support this API then returns default value 3200000 kHz.
+  unsigned int get_memory_clock_rate() const { return _memory_clock_rate; }
+  /// Returns the maximum bus width between device and memory in bits. If
+  /// compiler does not support this API then returns default value 64 bits.
+  unsigned int get_memory_bus_width() const { return _memory_bus_width; }
+  uint32_t get_device_id() const { return _device_id; }
+  std::array<unsigned char, 16> get_uuid() const { return _uuid; }
+  /// Returns global memory cache size in bytes.
+  unsigned int get_global_mem_cache_size() const {
+    return _global_mem_cache_size;
+  }
+  int get_image1d_max() const { return _image1d_max; }
+  auto get_image2d_max() const { return _image2d_max; }
+  auto get_image2d_max() { return _image2d_max; }
+  auto get_image3d_max() const { return _image3d_max; }
+  auto get_image3d_max() { return _image3d_max; }
+
+  // set interface
+  void set_name(const char* name) {
+    size_t length = strlen(name);
+    if (length < 256) {
+      std::memcpy(_name, name, length + 1);
+    } else {
+      std::memcpy(_name, name, 255);
+      _name[255] = '\0';
+    }
+  }
+  void set_max_work_item_sizes(const sycl::range<3> max_work_item_sizes) {
+    for (int i = 0; i < 3; ++i)
+      _max_work_item_sizes_i[i] = max_work_item_sizes[i];
+  }
+  void set_host_unified_memory(bool host_unified_memory) {
+    _host_unified_memory = host_unified_memory;
+  }
+  void set_major_version(int major) { _major = major; }
+  void set_minor_version(int minor) { _minor = minor; }
+  void set_integrated(int integrated) { _integrated = integrated; }
+  void set_max_clock_frequency(int frequency) { _frequency = frequency; }
+  void set_max_compute_units(int max_compute_units) {
+    _max_compute_units = max_compute_units;
+  }
+  void set_global_mem_size(size_t global_mem_size) {
+    _global_mem_size = global_mem_size;
+  }
+  void set_local_mem_size(size_t local_mem_size) {
+    _local_mem_size = local_mem_size;
+  }
+  void set_max_work_group_size(int max_work_group_size) {
+    _max_work_group_size = max_work_group_size;
+  }
+  void set_max_sub_group_size(int max_sub_group_size) {
+    _max_sub_group_size = max_sub_group_size;
+  }
+  void
+  set_max_work_items_per_compute_unit(int max_work_items_per_compute_unit) {
+    _max_work_items_per_compute_unit = max_work_items_per_compute_unit;
+  }
+  void set_max_nd_range_size(int max_nd_range_size[]) {
+    for (int i = 0; i < 3; i++) {
+      _max_nd_range_size[i] = max_nd_range_size[i];
+      _max_nd_range_size_i[i] = max_nd_range_size[i];
+    }
+  }
+  void set_max_nd_range_size(sycl::id<3> max_nd_range_size) {
+    for (int i = 0; i < 3; i++) {
+      _max_nd_range_size[i] = max_nd_range_size[i];
+      _max_nd_range_size_i[i] = max_nd_range_size[i];
+    }
+  }
+  void set_memory_clock_rate(unsigned int memory_clock_rate) {
+    _memory_clock_rate = memory_clock_rate;
+  }
+  void set_memory_bus_width(unsigned int memory_bus_width) {
+    _memory_bus_width = memory_bus_width;
+  }
+  void
+  set_max_register_size_per_work_group(int max_register_size_per_work_group) {
+    _max_register_size_per_work_group = max_register_size_per_work_group;
+  }
+  void set_device_id(uint32_t device_id) {
+    _device_id = device_id;
+  }
+  void set_uuid(std::array<unsigned char, 16> uuid) {
+    _uuid = std::move(uuid);
+  }
+  void set_global_mem_cache_size(unsigned int global_mem_cache_size) {
+    _global_mem_cache_size = global_mem_cache_size;
+  }
+  void set_image1d_max(size_t image_max_buffer_size) {
+    _image1d_max = image_max_buffer_size;
+  }
+
+private:
+  char _name[256];
+  int _max_work_item_sizes_i[3];
+  bool _host_unified_memory = false;
+  int _major;
+  int _minor;
+  int _integrated = 0;
+  int _frequency;
+  // Set estimated value 3200000 kHz as default value.
+  unsigned int _memory_clock_rate = 3200000;
+  // Set estimated value 64 bits as default value.
+  unsigned int _memory_bus_width = 64;
+  unsigned int _global_mem_cache_size;
+  int _max_compute_units;
+  int _max_work_group_size;
+  int _max_sub_group_size;
+  int _max_work_items_per_compute_unit;
+  int _max_register_size_per_work_group;
+  size_t _global_mem_size;
+  size_t _local_mem_size;
+  size_t _max_nd_range_size[3];
+  int _max_nd_range_size_i[3];
+  uint32_t _device_id;
+  std::array<unsigned char, 16> _uuid;
+  int _image1d_max;
+  int _image2d_max[2];
+  int _image3d_max[3];
+};
+
+static int get_major_version(const sycl::device &dev) {
+  int major, minor;
+  detail::get_version(dev, major, minor);
+  return major;
+}
+
+static int get_minor_version(const sycl::device &dev) {
+  int major, minor;
+  detail::get_version(dev, major, minor);
+  return minor;
+}
+
+static void get_device_info(device_info &out, const sycl::device &dev) {
+  device_info prop;
+  prop.set_name(dev.get_info<sycl::info::device::name>().c_str());
+
+  int major, minor;
+  detail::get_version(dev, major, minor);
+  prop.set_major_version(major);
+  prop.set_minor_version(minor);
+
+  prop.set_max_work_item_sizes(
+#if (__SYCL_COMPILER_VERSION && __SYCL_COMPILER_VERSION < 20220902)
+      // oneAPI DPC++ compiler older than 2022/09/02, where max_work_item_sizes
+      // is an enum class element
+      dev.get_info<sycl::info::device::max_work_item_sizes>());
+#else
+      // SYCL 2020-conformant code, max_work_item_sizes is a struct templated by
+      // an int
+      dev.get_info<sycl::info::device::max_work_item_sizes<3>>());
+#endif
+  prop.set_host_unified_memory(dev.has(sycl::aspect::usm_host_allocations));
+
+  prop.set_max_clock_frequency(
+      dev.get_info<sycl::info::device::max_clock_frequency>() * 1000);
+
+#ifdef SYCL_EXT_ONEAPI_NUM_COMPUTE_UNITS
+  prop.set_max_compute_units(
+      dev.get_info<sycl::ext::oneapi::info::device::num_compute_units>());
+#else
+  prop.set_max_compute_units(
+      dev.get_info<sycl::info::device::max_compute_units>());
+#endif
+  prop.set_max_work_group_size(
+      dev.get_info<sycl::info::device::max_work_group_size>());
+  prop.set_global_mem_size(dev.get_info<sycl::info::device::global_mem_size>());
+  prop.set_local_mem_size(dev.get_info<sycl::info::device::local_mem_size>());
+
+#if (defined(SYCL_EXT_INTEL_DEVICE_INFO) && SYCL_EXT_INTEL_DEVICE_INFO >= 6)
+  if (dev.has(sycl::aspect::ext_intel_memory_clock_rate)) {
+    unsigned int tmp =
+        dev.get_info<sycl::ext::intel::info::device::memory_clock_rate>();
+    if (tmp != 0)
+      prop.set_memory_clock_rate(1000 * tmp);
+  }
+  if (dev.has(sycl::aspect::ext_intel_memory_bus_width)) {
+    prop.set_memory_bus_width(
+        dev.get_info<sycl::ext::intel::info::device::memory_bus_width>());
+  }
+  if (dev.has(sycl::aspect::ext_intel_device_id)) {
+    prop.set_device_id(
+        dev.get_info<sycl::ext::intel::info::device::device_id>());
+  }
+  if (dev.has(sycl::aspect::ext_intel_device_info_uuid)) {
+    prop.set_uuid(dev.get_info<sycl::ext::intel::info::device::uuid>());
+  }
+#elif defined(_MSC_VER) && !defined(__clang__)
+#pragma message("get_device_info: querying memory_clock_rate and \
+memory_bus_width are not supported by the compiler used. \
+Use 3200000 kHz as memory_clock_rate default value. \
+Use 64 bits as memory_bus_width default value.")
+#else
+#warning "get_device_info: querying memory_clock_rate and \
+memory_bus_width are not supported by the compiler used. \
+Use 3200000 kHz as memory_clock_rate default value. \
+Use 64 bits as memory_bus_width default value."
+#endif
+
+  size_t max_sub_group_size = 1;
+  std::vector<size_t> sub_group_sizes =
+      dev.get_info<sycl::info::device::sub_group_sizes>();
+
+  for (const auto &sub_group_size : sub_group_sizes) {
+    if (max_sub_group_size < sub_group_size)
+      max_sub_group_size = sub_group_size;
+  }
+
+  prop.set_max_sub_group_size(max_sub_group_size);
+
+  prop.set_max_work_items_per_compute_unit(
+      dev.get_info<sycl::info::device::max_work_group_size>());
+#ifdef SYCL_EXT_ONEAPI_MAX_WORK_GROUP_QUERY
+  prop.set_max_nd_range_size(
+      dev.get_info<
+          sycl::ext::oneapi::experimental::info::device::max_work_groups<3>>());
+#else
+#if defined(_MSC_VER) && !defined(__clang__)
+#pragma message("get_device_info: querying the maximum number \
+of work groups is not supported.")
+#else
+#warning "get_device_info: querying the maximum number of \
+work groups is not supported."
+#endif
+  int max_nd_range_size[] = {0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF};
+  prop.set_max_nd_range_size(max_nd_range_size);
+#endif
+
+#ifdef SYCL_EXT_CODEPLAY_MAX_REGISTERS_PER_WORK_GROUP_QUERY
+  if (dev.get_backend() == sycl::backend::ext_oneapi_cuda)
+    prop.set_max_register_size_per_work_group(
+        dev.get_info<sycl::ext::codeplay::experimental::info::device::
+                         max_registers_per_work_group>());
+  else
+#endif
+    // Estimates max register size per work group, feel free to update the value
+    // according to device properties.
+    prop.set_max_register_size_per_work_group(65536);
+
+  prop.set_global_mem_cache_size(
+      dev.get_info<sycl::info::device::global_mem_cache_size>());
+
+  prop.set_image1d_max(
+      dev.get_info<sycl::info::device::image_max_buffer_size>());
+  prop.get_image2d_max()[0] =
+      dev.get_info<sycl::info::device::image2d_max_width>();
+  prop.get_image2d_max()[1] =
+      dev.get_info<sycl::info::device::image2d_max_height>();
+  prop.get_image3d_max()[0] =
+      dev.get_info<sycl::info::device::image3d_max_width>();
+  prop.get_image3d_max()[1] =
+      dev.get_info<sycl::info::device::image3d_max_height>();
+  prop.get_image3d_max()[2] =
+      dev.get_info<sycl::info::device::image3d_max_depth>();
+  out = prop;
+}
+
+/// Util function to check whether a device supports some kinds of sycl::aspect.
+inline void
+has_capability_or_fail(const sycl::device &dev,
+                       const std::initializer_list<sycl::aspect> &props) {
+  for (const auto &it : props) {
+    if (dev.has(it))
+      continue;
+    switch (it) {
+    case sycl::aspect::fp64:
+      throw std::runtime_error("'double' is not supported in '" +
+                               dev.get_info<sycl::info::device::name>() +
+                               "' device");
+      break;
+    case sycl::aspect::fp16:
+      throw std::runtime_error("'half' is not supported in '" +
+                               dev.get_info<sycl::info::device::name>() +
+                               "' device");
+      break;
+    default:
+#define __SYCL_ASPECT(ASPECT, ID)                                              \
+  case sycl::aspect::ASPECT:                                                   \
+    return #ASPECT;
+#define __SYCL_ASPECT_DEPRECATED(ASPECT, ID, MESSAGE) __SYCL_ASPECT(ASPECT, ID)
+#define __SYCL_ASPECT_DEPRECATED_ALIAS(ASPECT, ID, MESSAGE)
+      auto getAspectNameStr = [](sycl::aspect AspectNum) -> std::string {
+        switch (AspectNum) {
+#include <sycl/info/aspects.def>
+#include <sycl/info/aspects_deprecated.def>
+        default:
+          return "unknown aspect";
+        }
+      };
+#undef __SYCL_ASPECT_DEPRECATED_ALIAS
+#undef __SYCL_ASPECT_DEPRECATED
+#undef __SYCL_ASPECT
+      throw std::runtime_error(
+          "'" + getAspectNameStr(it) + "' is not supported in '" +
+          dev.get_info<sycl::info::device::name>() + "' device");
+    }
+    break;
+  }
+}
+
+/// dpct device extension
+class device_ext : public sycl::device {
+  typedef std::mutex mutex_type;
+
+public:
+  device_ext() : sycl::device(), _ctx(*this) {}
+  ~device_ext() {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    clear_queues();
+  }
+  device_ext(const sycl::device &base) : sycl::device(base), _ctx(*this) {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    init_queues();
+  }
+
+  int is_native_atomic_supported() { return 0; }
+  int get_major_version() const {
+    return dpct::get_major_version(*this);
+  }
+
+  int get_minor_version() const {
+    return dpct::get_minor_version(*this);
+  }
+
+  int get_max_compute_units() const {
+    return get_device_info().get_max_compute_units();
+  }
+
+  /// Return the maximum clock frequency of this device in KHz.
+  int get_max_clock_frequency() const {
+    return get_device_info().get_max_clock_frequency();
+  }
+
+  int get_integrated() const { return get_device_info().get_integrated(); }
+
+  int get_max_sub_group_size() const {
+    return get_device_info().get_max_sub_group_size();
+  }
+
+  int get_max_register_size_per_work_group() const {
+    return get_device_info().get_max_register_size_per_work_group();
+  }
+
+  int get_max_work_group_size() const {
+    return get_device_info().get_max_work_group_size();
+  }
+
+  int get_mem_base_addr_align() const {
+    return get_info<sycl::info::device::mem_base_addr_align>();
+  }
+
+  int get_mem_base_addr_align_in_bytes() const {
+    return get_info<sycl::info::device::mem_base_addr_align>() / 8;
+  }
+
+  size_t get_global_mem_size() const {
+    return get_device_info().get_global_mem_size();
+  }
+
+  size_t get_local_mem_size() const {
+    return get_device_info().get_local_mem_size();
+  }
+
+  int get_max_pitch() const { return INT_MAX; }
+
+  /// Get the number of bytes of free and total memory on the SYCL device.
+  /// \param [out] free_memory The number of bytes of free memory on the SYCL device.
+  /// \param [out] total_memory The number of bytes of total memory on the SYCL device.
+  void get_memory_info(size_t &free_memory, size_t &total_memory) {
+#if (defined(__SYCL_COMPILER_VERSION) && __SYCL_COMPILER_VERSION >= 20221105)
+    if (!has(sycl::aspect::ext_intel_free_memory)) {
+      std::cerr << "get_memory_info: ext_intel_free_memory is not supported." << std::endl;
+      free_memory = 0;
+    } else {
+      free_memory = get_info<sycl::ext::intel::info::device::free_memory>();
+    }
+#else
+    std::cerr << "get_memory_info: ext_intel_free_memory is not supported." << std::endl;
+    free_memory = 0;
+#if defined(_MSC_VER) && !defined(__clang__)
+#pragma message("Querying the number of bytes of free memory is not supported")
+#else
+#warning "Querying the number of bytes of free memory is not supported"
+#endif
+#endif
+    total_memory = get_device_info().get_global_mem_size();
+  }
+
+  void get_device_info(device_info &out) const {
+    dpct::get_device_info(out, *this);
+  }
+
+  device_info get_device_info() const {
+    device_info prop;
+    dpct::get_device_info(prop, *this);
+    return prop;
+  }
+
+  void reset() {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    clear_queues();
+    init_queues();
+  }
+
+  sycl::queue &in_order_queue() { return *_q_in_order; }
+
+  sycl::queue &out_of_order_queue() { return *_q_out_of_order; }
+
+  sycl::queue &default_queue() {
+#ifdef DPCT_USM_LEVEL_NONE
+    return out_of_order_queue();
+#else
+    return in_order_queue();
+#endif // DPCT_USM_LEVEL_NONE
+  }
+
+  void queues_wait_and_throw() {
+    std::unique_lock<mutex_type> lock(m_mutex);
+    std::vector<std::shared_ptr<sycl::queue>> current_queues(
+        _queues);
+    lock.unlock();
+    for (const auto &q : current_queues) {
+      q->wait_and_throw();
+    }
+    // Guard the destruct of current_queues to make sure the ref count is safe.
+    lock.lock();
+  }
+
+  std::vector<sycl::event> get_in_order_queues_last_events() {
+    std::unique_lock<mutex_type> lock(m_mutex);
+    std::vector<sycl::event> last_events;
+    std::vector<std::shared_ptr<sycl::queue>> current_queues(_queues);
+    lock.unlock();
+    for (const auto &q : current_queues) {
+      if (q->is_in_order()) {
+        auto last_event = q->ext_oneapi_get_last_event();
+        [&](auto &&_e) {
+          if constexpr (std::is_same_v<
+                            std::remove_reference_t<decltype(last_event)>,
+                            sycl::event>)
+            last_events.push_back(_e);
+          else if (_e.has_value())
+            last_events.push_back(_e.value());
+        }(last_event);
+      }
+    }
+    // Guard the destruct of current_queues to make sure the ref count is safe.
+    lock.lock();
+    return last_events;
+  }
+
+  sycl::queue *create_queue(bool enable_exception_handler = false) {
+#ifdef DPCT_USM_LEVEL_NONE
+    return create_out_of_order_queue(enable_exception_handler);
+#else
+    return create_in_order_queue(enable_exception_handler);
+#endif // DPCT_USM_LEVEL_NONE
+  }
+
+  sycl::queue *create_in_order_queue(bool enable_exception_handler = false) {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    return create_queue_impl(enable_exception_handler,
+                             sycl::property::queue::in_order());
+  }
+
+  sycl::queue *create_out_of_order_queue(bool enable_exception_handler = false) {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    return create_queue_impl(enable_exception_handler);
+  }
+
+  void destroy_queue(sycl::queue *&queue) {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    _queues.erase(std::remove_if(_queues.begin(), _queues.end(),
+                                  [=](const std::shared_ptr<sycl::queue> &q) -> bool {
+                                    return q.get() == queue;
+                                  }),
+                   _queues.end());
+    queue = nullptr;
+  }
+  [[deprecated("set_saved_queue for device_ext is deprecated, please use "
+               "dpct::blas::descriptor::set_saved_queue instead")]] void
+  set_saved_queue(sycl::queue *q) {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    _saved_queue = q;
+  }
+  [[deprecated(
+      "get_saved_queue for device_ext is deprecated, please use "
+      "dpct::blas::descriptor::get_saved_queue instead")]] sycl::queue *
+  get_saved_queue() const {
+    std::lock_guard<mutex_type> lock(m_mutex);
+    return _saved_queue;
+  }
+  sycl::context get_context() const { return _ctx; }
+
+  void
+  has_capability_or_fail(const std::initializer_list<sycl::aspect> &props) {
+    ::dpct::has_capability_or_fail(*this, props);
+  }
+
+private:
+  void clear_queues() {
+    _queues.clear();
+    _q_in_order = _q_out_of_order = _saved_queue = nullptr;
+  }
+
+  void init_queues() {
+    _q_in_order = create_queue_impl(true, sycl::property::queue::in_order());
+    _q_out_of_order = create_queue_impl(true);
+    _saved_queue = &default_queue();
+  }
+
+  /// Caller should acquire resource \p m_mutex before calling this function.
+  template <class... Properties>
+  sycl::queue *create_queue_impl(bool enable_exception_handler,
+                                 Properties... properties) {
+    sycl::async_handler eh = {};
+    if (enable_exception_handler) {
+      eh = exception_handler;
+    }
+    _queues.push_back(std::make_shared<sycl::queue>(
+        _ctx, *this, eh,
+        sycl::property_list(
+#ifdef DPCT_PROFILING_ENABLED
+            sycl::property::queue::enable_profiling(),
+#endif
+            properties...)));
+
+    return _queues.back().get();
+  }
+
+  void get_version(int &major, int &minor) const {
+    detail::get_version(*this, major, minor);
+  }
+  sycl::queue *_q_in_order, *_q_out_of_order;
+  sycl::queue *_saved_queue;
+  sycl::context _ctx;
+  std::vector<std::shared_ptr<sycl::queue>> _queues;
+  mutable mutex_type m_mutex;
+};
+
+static inline unsigned int get_tid() {
+#if defined(__linux__)
+  return syscall(SYS_gettid);
+#elif defined(_WIN64)
+  return GetCurrentThreadId();
+#else
+#error "Only support Windows and Linux."
+#endif
+}
+
+/// device manager
+class dev_mgr {
+public:
+  device_ext &current_device() { return get_device(current_device_id()); }
+  device_ext &cpu_device() const {
+    std::lock_guard<std::recursive_mutex> lock(m_mutex);
+    if (_cpu_device == -1) {
+      throw std::runtime_error("no valid cpu device");
+    } else {
+      return *_devs[_cpu_device];
+    }
+  }
+  device_ext &get_device(unsigned int id) const {
+    std::lock_guard<std::recursive_mutex> lock(m_mutex);
+    check_id(id);
+    return *_devs[id];
+  }
+
+  unsigned int current_device_id() const {
+    if (_dev_stack.empty())
+      return DEFAULT_DEVICE_ID;
+    return _dev_stack.top();
+  }
+
+  /// Select device with a device ID.
+  /// \param [in] id The id of the device which can
+  /// be obtained through get_device_id(const sycl::device).
+  void select_device(unsigned int id) {
+    /// Replace the top of the stack with the given device id
+    if (_dev_stack.empty()) {
+      push_device(id);
+    } else {
+      check_id(id);
+      _dev_stack.top() = id;
+    }
+  }
+
+  unsigned int device_count() { return _devs.size(); }
+
+  unsigned int get_device_id(const sycl::device &dev) {
+    unsigned int id = 0;
+    for (auto dev_item : _devs) {
+      if (*dev_item == dev) {
+        return id;
+      }
+      id++;
+    }
+    throw std::runtime_error(
+        "The device[" + dev.get_info<sycl::info::device::name>() +
+        "] is filtered out by dpct::dev_mgr::filter/dpct::filter_device in "
+        "current device "
+        "list!");
+  }
+
+  /// List all the devices with its id in dev_mgr.
+  void list_devices() const {
+    for (size_t i = 0; i < _devs.size(); ++i) {
+      std::cout << "" << i << ": "
+                << _devs[i]->get_info<sycl::info::device::name>() << std::endl;
+    }
+  }
+
+  /// Filter out devices; only keep the device whose name contains one of the
+  /// subname in \p dev_subnames.
+  /// May break device id mapping and change current device. It's better to be
+  /// called before other DPCT/SYCL APIs.
+  void filter(const std::vector<std::string> &dev_subnames) {
+    std::lock_guard<std::recursive_mutex> lock(m_mutex);
+    auto iter = _devs.begin();
+    while (iter != _devs.end()) {
+      std::string dev_name = (*iter)->get_info<sycl::info::device::name>();
+      bool matched = false;
+      for (const auto &name : dev_subnames) {
+        if (dev_name.find(name) != std::string::npos) {
+          matched = true;
+          break;
+        }
+      }
+      if (matched)
+        ++iter;
+      else
+        iter = _devs.erase(iter);
+    }
+    _cpu_device = -1;
+    for (unsigned i = 0; i < _devs.size(); ++i) {
+      if (_devs[i]->is_cpu()) {
+        _cpu_device = i;
+        break;
+      }
+    }
+    /// Clear the device stack for all thread here. But we don't have access to
+    /// all threads current implementation.
+#ifdef DPCT_HELPER_VERBOSE
+    list_devices();
+#endif
+  }
+
+  template <class DeviceSelector>
+  std::enable_if_t<
+      std::is_invocable_r_v<int, DeviceSelector, const sycl::device &>>
+  select_device(const DeviceSelector &selector = sycl::gpu_selector_v) {
+    sycl::device selected_device = sycl::device(selector);
+    unsigned int selected_device_id = get_device_id(selected_device);
+    select_device(selected_device_id);
+  }
+
+  /// Update the device stack for the current thread id
+  void push_device(unsigned int id) {
+    check_id(id);
+    _dev_stack.push(id);
+  }
+
+  /// Remove the device from top of the stack if it exist
+  unsigned int pop_device() {
+    if (_dev_stack.empty())
+      throw std::runtime_error("can't pop an empty dpct device stack");
+
+    auto id = _dev_stack.top();
+    _dev_stack.pop();
+    return id;
+  }
+
+  /// Returns the instance of device manager singleton.
+  static dev_mgr &instance() {
+    static dev_mgr d_m;
+    return d_m;
+  }
+  dev_mgr(const dev_mgr &) = delete;
+  dev_mgr &operator=(const dev_mgr &) = delete;
+  dev_mgr(dev_mgr &&) = delete;
+  dev_mgr &operator=(dev_mgr &&) = delete;
+
+private:
+  mutable std::recursive_mutex m_mutex;
+  dev_mgr() {
+    sycl::device default_device =
+        sycl::device(sycl::default_selector_v);
+    _devs.push_back(std::make_shared<device_ext>(default_device));
+
+    std::vector<sycl::device> sycl_all_devs =
+        sycl::device::get_devices(sycl::info::device_type::all);
+    // Collect other devices except for the default device.
+    if (default_device.is_cpu())
+      _cpu_device = 0;
+    for (auto &dev : sycl_all_devs) {
+      if (dev == default_device) {
+        continue;
+      }
+      _devs.push_back(std::make_shared<device_ext>(dev));
+      if (_cpu_device == -1 && dev.is_cpu()) {
+        _cpu_device = _devs.size() - 1;
+      }
+    }
+#ifdef DPCT_HELPER_VERBOSE
+    list_devices();
+#endif
+  }
+  void check_id(unsigned int id) const {
+    std::lock_guard<std::recursive_mutex> lock(m_mutex);
+    if (id >= _devs.size()) {
+      throw std::runtime_error("invalid device id");
+    }
+  }
+  std::vector<std::shared_ptr<device_ext>> _devs;
+  /// stack of devices resulting from CUDA context change;
+  static inline thread_local std::stack<unsigned int> _dev_stack;
+  /// DEFAULT_DEVICE_ID is used, if current_device_id() finds an empty
+  /// _dev_stack, which means the default device should be used for the current
+  /// thread.
+  const unsigned int DEFAULT_DEVICE_ID = 0;
+  int _cpu_device = -1;
+};
+
+/// Util function to get the default queue of current selected device depends on
+/// the USM config. Return the default out-of-ordered queue when USM-none is
+/// enabled, otherwise return the default in-ordered queue.
+static inline sycl::queue &get_default_queue() {
+  return dev_mgr::instance().current_device().default_queue();
+}
+
+/// Util function to get the default in-ordered queue of current device in
+/// dpct device manager.
+static inline sycl::queue &get_in_order_queue() {
+  return dev_mgr::instance().current_device().in_order_queue();
+}
+
+/// Util function to get the default out-of-ordered queue of current device in
+/// dpct device manager.
+static inline sycl::queue &get_out_of_order_queue() {
+  return dev_mgr::instance().current_device().out_of_order_queue();
+}
+
+/// Util function to get the id of current device in
+/// dpct device manager.
+static inline unsigned int get_current_device_id() {
+  return dev_mgr::instance().current_device_id();
+}
+
+/// Util function to get the current device.
+static inline device_ext &get_current_device() {
+  return dev_mgr::instance().current_device();
+}
+
+/// Util function to get a device by id.
+static inline device_ext &get_device(unsigned int id) {
+  return dev_mgr::instance().get_device(id);
+}
+
+/// Util function to get the context of the default queue of current
+/// device in dpct device manager.
+static inline sycl::context get_default_context() {
+  return dpct::get_current_device().get_context();
+}
+
+/// Util function to get a CPU device.
+static inline device_ext &cpu_device() {
+  return dev_mgr::instance().cpu_device();
+}
+
+static inline unsigned int select_device(unsigned int id) {
+  dev_mgr::instance().select_device(id);
+  return id;
+}
+
+template <class DeviceSelector>
+static inline std::enable_if_t<
+    std::is_invocable_r_v<int, DeviceSelector, const sycl::device &>>
+select_device(const DeviceSelector &selector = sycl::gpu_selector_v) {
+  dev_mgr::instance().select_device(selector);
+}
+
+/// Filter out devices; only keep the device whose name contains one of the
+/// subname in \p dev_subnames.
+/// May break device id mapping and change current device. It's better to be
+/// called before other DPCT/SYCL APIs.
+static inline void filter_device(const std::vector<std::string> &dev_subnames) {
+  dev_mgr::instance().filter(dev_subnames);
+}
+
+/// List all the devices with its id in dev_mgr.
+static inline void list_devices() { dev_mgr::instance().list_devices(); }
+
+static inline unsigned int get_device_id(const sycl::device &dev){
+  return dev_mgr::instance().get_device_id(dev);
+}
+
+static inline unsigned int get_cpu_device_id() {
+  return get_device_id(cpu_device());
+}
+
+/// Util function to do implicit sync among queues of the same device then
+/// insert a synchronize barrier in the queue. For USM, If the queue is the
+/// default in-order queue, try to sync with all queues available in the current
+/// device before inserting a barrier. For USM-none, If the queue is the default
+/// out-of-order queue, try to sync with all queues available in the current
+/// device before inserting a barrier, else try to sync in the current queue
+/// before inserting a barrier.
+/// \param [out] event_ptr The memory to store the event.
+/// \param [in] queue The queue specified to do synchronization.
+inline void sync_barrier(sycl::event *event_ptr,
+                         sycl::queue *queue = &get_default_queue()) {
+  if (*queue == get_default_queue()) {
+    // Wait all the kernel tasks in all the queues of current device completed.
+    dpct::get_current_device().queues_wait_and_throw();
+  }
+
+#ifdef DPCT_USM_LEVEL_NONE
+  if (*queue != get_default_queue()) {
+    // For out-of-ordered queue, wait all the kernel tasks in \p queue
+    // completed.
+    queue->wait();
+  }
+#endif
+
+#ifdef DPCT_PROFILING_ENABLED
+  *event_ptr = queue->ext_oneapi_submit_barrier();
+#else
+  *event_ptr = queue->single_task([=]() {});
+#endif
+}
+
+static inline unsigned int push_device_for_curr_thread(unsigned int id) {
+  dev_mgr::instance().push_device(id);
+  return id;
+}
+
+static inline unsigned int pop_device_for_curr_thread(void) {
+  return dev_mgr::instance().pop_device();
+}
+
+static inline unsigned int device_count() {
+  return dev_mgr::instance().device_count();
+}
+} // namespace dpct
+
+#endif // __DPCT_DEVICE_HPP__
\ No newline at end of file
diff --git a/sycl/include/dpct/dnnl_utils.hpp b/sycl/include/dpct/dnnl_utils.hpp
new file mode 100644
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+++ b/sycl/include/dpct/dnnl_utils.hpp
@@ -0,0 +1,4854 @@
+//==---- dnnl_utils.hpp ---------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_DNNL_UTILS_HPP__
+#define __DPCT_DNNL_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+#include <oneapi/dnnl/dnnl.hpp>
+#include <oneapi/dnnl/dnnl_sycl.hpp>
+
+#if defined(__has_include) && __has_include(<oneapi/math/rng/device.hpp>)
+#include <oneapi/math/rng/device.hpp>
+#elif defined(__has_include) && __has_include(<oneapi/mkl/rng/device.hpp>)
+#include <oneapi/mkl/rng/device.hpp>
+#elif defined(__has_include)
+#error "SYCLomatic runtime requires oneMath/oneMKL support"
+#else
+#error "SYCLomatic runtime requires __has_include support"
+#endif
+
+#include <algorithm>
+#include <list>
+#include <unordered_map>
+
+#include "detail/dnnl_utils_detail.hpp"
+
+namespace dpct {
+namespace dnnl {
+/// Get concatenated library version as an integer.
+static inline size_t get_version() {
+  const ::dnnl::version_t *ver = ::dnnl::version();
+  return ver->major * 1000 + ver->minor * 100 + ver->patch;
+}
+class engine_ext;
+typedef oneapi::mkl::rng::philox4x32x10 rng_engine_t;
+/// An enum class representing memory layout. Used by
+/// memory_desc_ext to create a memory with pre-defined layout.
+enum class memory_format_tag { nchw, nhwc, nchw_blocked };
+
+/// An enum class representing RNN data memory layout. Used by
+/// memory_desc_ext to create a memory with pre-defined layout.
+enum class rnn_memory_format_tag { tnc, ntc };
+
+/// A class holding the description of an N-dimensions memory.
+class memory_desc_ext {
+  ::dnnl::memory::desc _desc;
+public:
+  /// Convert dpct::library_data_t to dnnl::memory::data_type.
+  static ::dnnl::memory::data_type to_dnnl_data_type(dpct::library_data_t dt);
+  /// Convert dnnl::memory::data_type to dpct::library_data_t.
+  static dpct::library_data_t
+  to_dpct_library_data_t(::dnnl::memory::data_type dt, unsigned block_size);
+  /// Convert dpct::dnnl::memory_format_tag to dnnl::memory::format_tag.
+  static ::dnnl::memory::format_tag to_dnnl_format_tag(dpct::library_data_t dt,
+                                                       memory_format_tag tag);
+  memory_desc_ext() = default;
+  memory_desc_ext(::dnnl::memory::desc &desc) : _desc(desc) {}
+  memory_desc_ext(::dnnl::memory::desc &&desc) : _desc(std::move(desc)) {}
+  /// Setting a 4D memory with given parameters.
+  /// \param [in] tag Format tag.
+  /// \param [in] dt Data type.
+  /// \param [in] n Number of images.
+  /// \param [in] c Number of channels.
+  /// \param [in] h Height of images.
+  /// \param [in] w Width of images.
+  void set(memory_format_tag tag, dpct::library_data_t dt, int n, int c, int h,
+           int w);
+  /// Setting a 3D RNN data memory with given parameters.
+  /// \param [in] tag RNN data format tag.
+  /// \param [in] dt Data type.
+  /// \param [in] t Number of sequence length.
+  /// \param [in] n Number of batch.
+  /// \param [in] c Height of input channel.
+  void set(rnn_memory_format_tag tag, dpct::library_data_t dt, int t, int n, int c);
+  /// Setting a 4D memory with given parameters.
+  /// \param [in] dt Data type.
+  /// \param [in] n Number of images.
+  /// \param [in] c Number of channels.
+  /// \param [in] h Height of images.
+  /// \param [in] w Width of images.
+  /// \param [in] n_stride Stride between two continuous images.
+  /// \param [in] c_stride Stride between two continuous channels.
+  /// \param [in] h_stride Stride between two continuous rows.
+  /// \param [in] w_stride Stride between two continuous columns.
+  void set(dpct::library_data_t dt, int n, int c, int h, int w, int n_stride,
+           int c_stride, int h_stride, int w_stride);
+  /// Setting a ND memory with given parameters.
+  /// \param [in] dt Data type.
+  /// \param [in] ndims Dimension of the memory.
+  /// \param [in] dims Array of dimension ndims that contain the size of each
+  /// memory dimension. \param [in] strides Array of dimension ndims that
+  /// contain the stride of each memory dimension.
+  void set(dpct::library_data_t dt, int ndims, const int dims[],
+           const int strides[]);
+  /// Setting a ND memory with given parameters.
+  /// \param [in] tag Format tag.
+  /// \param [in] dt Data type.
+  /// \param [in] ndims Dimension of the memory.
+  /// \param [in] dims Array of dimension ndims that contain the size of each
+  /// memory dimension.
+  void set(memory_format_tag tag, dpct::library_data_t dt, int ndims,
+           const int dims[]);
+  /// Getting a ::dnnl::memory::desc from a memory_desc_ext.
+  /// \returns The ::dnnl::memory::desc.
+  const ::dnnl::memory::desc &get_desc() const { return _desc; }
+  /// Setting holding desc with given dnnl memory descriptor.
+  void set_desc(::dnnl::memory::desc desc) { _desc = desc; }
+  /// Getting a size of a memory_desc_ext in bytes.
+  /// \returns The size.
+  size_t get_size() const { return _desc.get_size(); }
+  /// Getting parameters from a 4D memory.
+  /// \param [out] dt Data type.
+  /// \param [out] n Number of images.
+  /// \param [out] c Number of channels.
+  /// \param [out] h Height of images.
+  /// \param [out] w Width of images.
+  /// \param [out] n_stride Stride between two continuous images.
+  /// \param [out] c_stride Stride between two continuous channels.
+  /// \param [out] h_stride Stride between two continuous rows.
+  /// \param [out] w_stride Stride between two continuous columns.
+  void get(dpct::library_data_t *dt, int *n, int *c, int *h, int *w,
+           int *n_stride, int *c_stride, int *h_stride, int *w_stride) const;
+  /// Getting parameters from a 4D memory.
+  /// \param [out] dt Data type.
+  /// \param [out] tag Format tag.
+  /// \param [out] n Number of images.
+  /// \param [out] c Number of channels.
+  /// \param [out] h Height of images.
+  /// \param [out] w Width of images.
+  void get(dpct::library_data_t *dt, memory_format_tag *tag, int *n, int *c,
+           int *h, int *w) const;
+  /// Getting parameters from a 3D RNN data memory.
+  /// \param [out] dt Data type.
+  /// \param [out] tag RNN data format tag.
+  /// \param [out] t Number of sequence length.
+  /// \param [out] n Number of batch.
+  /// \param [out] c Height of input channel.
+  void get(dpct::library_data_t *dt, rnn_memory_format_tag *tag, int *t, int *n,
+           int *c) const;
+  /// Getting parameters from a ND memory.
+  /// \param [in] requested_ndims Requested number of dimensions to get from a
+  /// given memory descriptor.
+  /// \param [out] dt Data type.
+  /// \param [out] ndims Dimension of the memory.
+  /// \param [out] dims Array of dimension requested_ndims that contain the 
+  /// size of each memory dimension.
+  /// \param [out] strides Array of dimension requested_ndims that contain the
+  /// stride of each memory dimension.
+  void get(int requested_ndims, dpct::library_data_t *dt, int *ndims,
+           int dims[], int strides[]) const;
+  /// Getting parameters from a ND memory.
+  /// \param [in] requested_ndims Requested number of dimensions to get from a
+  /// given memory descriptor.
+  /// \param [out] dt Data type.
+  /// \param [out] tag Format tag.
+  /// \param [out] ndims Dimension of the memory.
+  /// \param [out] dims Array of dimension requested_ndims that contain the 
+  /// size of each memory dimension.
+  void get(int requested_ndims, dpct::library_data_t *dt,
+           memory_format_tag *tag, int *ndims, int dims[]) const;
+  /// Getting dims from a ND memory.
+  /// \return The dims.
+  std::vector<int64_t> get_dims() const { return _desc.get_dims(); }
+  /// Getting strides from a ND memory.
+  /// \return The strides.
+  std::vector<int64_t> get_strides() const {
+    return _desc.get_strides();
+  }
+  /// Getting element num from a ND memory.
+  /// \return The element number.
+  size_t get_element_num() const {
+    auto dims = _desc.get_dims();
+    if (dims.empty()) {
+      return 0;
+    }
+    size_t result = 1;
+    for (auto &dim : dims) {
+      result *= dim;
+    }
+    return result;
+  }
+
+  operator bool() const {
+    return bool(_desc);
+  }
+
+  memory_desc_ext &operator=(std::nullptr_t) {
+    _desc.reset(nullptr);
+    return *this;
+  }
+};
+
+/// A class holding description for an activation operation.
+class activation_desc {
+  ::dnnl::algorithm _alg;
+  float _alpha;
+  float _beta;
+
+public:
+  /// Setting an activation descriptor with given parameters.
+  /// \param [in] alg Activation algorithm.
+  /// \param [in] alpha Value of alpha parameter.
+  void set(::dnnl::algorithm alg, float alpha) {
+    _alg = alg;
+    if(alg == ::dnnl::algorithm::eltwise_clip) {
+      _alpha = 0;
+      _beta = alpha;
+    } else {
+      _alpha = alpha;
+    }
+  }
+  /// Getting parameters form an activation descriptor.
+  /// \param [out] alg Activation algorithm.
+  /// \param [out] alpha Value of alpha parameter.
+  void get(::dnnl::algorithm *alg, float *alpha) const {
+    *alg = _alg;
+    if(_alg == ::dnnl::algorithm::eltwise_clip) {
+      *alpha = _beta;
+    } else {
+      *alpha = _alpha;
+    }
+  }
+  /// Setting the alpha parameter of an activation descriptor.
+  /// \param [in] alpha Value of alpha parameter.
+  void set_alpha(float alpha) { _alpha = alpha; }
+  /// Setting the beta parameter of an activation descriptor.
+  /// \param [in] beta Value of beta parameter.
+  void set_beta(float beta) { _beta = beta; }
+  /// Setting the algorithm parameter of an activation descriptor.
+  /// \param [in] alg Activation algorithm.
+  void set_algorithm(::dnnl::algorithm alg) { _alg = alg; }
+  /// Getting the alpha parameter from an activation descriptor.
+  /// \param [out] alpha Value of alpha parameter.
+  float get_alpha() const { return _alpha; }
+  /// Getting the beta parameter from an activation descriptor.
+  /// \param [out] beta Value of beta parameter.
+  float get_beta() const { return _beta; }
+  /// Getting the algorithm parameter from an activation descriptor.
+  /// \param [out] alg Activation algorithm.
+  ::dnnl::algorithm get_algorithm() const { return _alg; }
+};
+
+/// A class holding description for a local response normalization operation.
+class lrn_desc {
+  unsigned int _local_size;
+  float _alpha;
+  float _beta;
+  float _k;
+
+public:
+  /// Setting a local response normalization descriptor with given parameters.
+  /// \param [in] local_size Value of local_size parameter.
+  /// \param [in] alpha Value of alpha parameter.
+  /// \param [in] beta Value of beta parameter.
+  /// \param [in] k Value of k parameter.
+  void set(unsigned int local_size, float alpha, float beta, float k) {
+    _local_size = local_size;
+    _alpha = alpha;
+    _beta = beta;
+    _k = k;
+  }
+  /// Getting parameters form a local response normalization descriptor.
+  /// \param [out] local_size Value of local_size parameter.
+  /// \param [out] alpha Value of alpha parameter.
+  /// \param [out] beta Value of beta parameter.
+  /// \param [out] k Value of k parameter.
+  void get(unsigned int *local_size, float *alpha, float *beta,
+           float *k) const {
+    *local_size = _local_size;
+    *alpha = _alpha;
+    *beta = _beta;
+    *k = _k;
+  }
+  /// Setting the local size parameter of a local response normalization
+  /// descriptor.
+  /// \param [in] local_size Value of local_size parameter.
+  void set_local_size(unsigned int local_size) { _local_size = local_size; }
+  /// Setting the alpha parameter of a local response normalization descriptor.
+  /// \param [in] alpha Value of alpha parameter.
+  void set_alpha(float alpha) { _alpha = alpha; }
+  /// Setting the beta parameter of a local response normalization descriptor.
+  /// \param [in] beta Value of beta parameter.
+  void set_beta(float beta) { _beta = beta; }
+  /// Setting the k parameter of a local response normalization descriptor.
+  /// \param [in] k Value of k parameter.
+  void set_k(float k) { _k = k; }
+  /// Getting the local size parameter from a local response normalization
+  /// descriptor.
+  /// \param [out] local_size Value of local_size parameter.
+  unsigned int get_local_size() const { return _local_size; }
+  /// Getting the alpha parameter from a local response normalization
+  /// descriptor.
+  /// \param [out] alpha Value of alpha parameter.
+  float get_alpha() const { return _alpha; }
+  /// Getting the beta parameter from a local response normalization descriptor.
+  /// \param [out] beta Value of beta parameter.
+  float get_beta() const { return _beta; }
+  /// Getting the k parameter from a local response normalization descriptor.
+  /// \param [out] k Value of k parameter.
+  float get_k() const { return _k; }
+};
+
+/// An enum class representing softmax algorithm.
+enum class softmax_algorithm { normal, log };
+/// An enum class representing softmax mode.
+enum class softmax_mode { instance, channel };
+
+/// A class holding description for a pooling operation.
+class pooling_desc {
+  ::dnnl::algorithm _alg;
+  std::vector<int64_t> _stride;
+  std::vector<int64_t> _kernel;
+  std::vector<int64_t> _padding;
+
+public:
+  /// Setting a 2D pooling descriptor with given parameters.
+  /// \param [in] alg Pooling algorithm.
+  /// \param [in] kernel_h Value of height of kernel.
+  /// \param [in] kernel_w Value of width of kernel.
+  /// \param [in] padding_h Value of height of padding.
+  /// \param [in] padding_w Value of width of padding.
+  /// \param [in] stride_h Value of height of stride.
+  /// \param [in] stride_w Value of width of stride.
+  void set(::dnnl::algorithm alg, int kernel_h, int kernel_w, int padding_h,
+           int padding_w, int stride_h, int stride_w) {
+    _alg = alg;
+    _stride = {stride_h, stride_w};
+    _kernel = {kernel_h, kernel_w};
+    _padding = {padding_h, padding_w};
+  }
+  /// Setting a ND pooling descriptor with given parameters.
+  /// \param [in] alg Pooling algorithm.
+  /// \param [in] ndims Dimension of the pooling operation.
+  /// \param [in] kernel Array of dimension ndims containing the kernel size of
+  /// each dimension.
+  /// \param [in] padding Array of dimension ndims containing the padding size of
+  /// each dimension.
+  /// \param [in] stride Array of dimension ndims containing the stride size of
+  /// each dimension.
+  void set(::dnnl::algorithm alg, int ndims, int kernel[], int padding[],
+           int stride[]) {
+    _alg = alg;
+    _stride = std::vector<int64_t>(stride, stride + ndims);
+    _kernel = std::vector<int64_t>(kernel, kernel + ndims);
+    _padding = std::vector<int64_t>(padding, padding + ndims);
+  }
+  /// Getting parameters from a 2D pooling descriptor.
+  /// \param [out] alg Pooling algorithm.
+  /// \param [out] kernel_h Value of height of kernel.
+  /// \param [out] kernel_w Value of width of kernel.
+  /// \param [out] padding_h Value of height of padding.
+  /// \param [out] padding_w Value of width of padding.
+  /// \param [out] stride_h Value of height of stride.
+  /// \param [out] stride_w Value of width of stride.
+  void get(::dnnl::algorithm *alg, int *kernel_h, int *kernel_w, int *padding_h,
+           int *padding_w, int *stride_h, int *stride_w) const {
+    *alg = _alg;
+    *kernel_h = _kernel[0];
+    *kernel_w = _kernel[1];
+    *padding_h = _padding[0];
+    *padding_w = _padding[1];
+    *stride_h = _stride[0];
+    *stride_w = _stride[1];
+  }
+  /// Getting parameters from a ND pooling descriptor.
+  /// \param [in] requested_ndims Requested number of dimensions to get from a
+  /// given pooling descriptor.
+  /// \param [out] alg Pooling algorithm.
+  /// \param [out] ndims Dimension of the pooling operation.
+  /// \param [out] kernel Array of dimension ndims containing the kernel size of
+  /// each dimension.
+  /// \param [out] padding Array of dimension ndims containing the padding size
+  /// of each dimension.
+  /// \param [out] stride Array of dimension ndims containing the stride size of
+  /// each dimension.
+  void get(int requested_ndims, ::dnnl::algorithm *alg, int *ndims,
+           int kernel[], int padding[], int stride[]) const {
+    *alg = _alg;
+    *ndims = _stride.size();
+    for (int i = 0; i < requested_ndims; i++) {
+      kernel[i] = _kernel[i];
+      padding[i] = _padding[i];
+      stride[i] = _stride[i];
+    }
+  }
+  /// Setting the algorithm parameter of a pooling descriptor.
+  /// \param [in] alg Pooling algorithm.
+  void set_algorithm(::dnnl::algorithm alg) { _alg = alg; }
+  /// Setting the stride parameter of a pooling descriptor.
+  /// \param [in] stride Array of dimension ndims containing the stride size of
+  /// each dimension.
+  void set_stride(const std::vector<int64_t> &stride) { _stride = stride; }
+  /// Setting the kernel parameter of a pooling descriptor.
+  /// \param [in] kernel Array of dimension ndims containing the kernel size of
+  /// each dimension.
+  void set_kernel(const std::vector<int64_t> &kernel) { _kernel = kernel; }
+  /// Setting the padding parameter of a pooling descriptor.
+  /// \param [in] padding Array of dimension ndims containing the padding size
+  /// of each dimension.
+  void set_padding(const std::vector<int64_t> &padding) { _padding = padding; }
+
+  /// Getting the algorithm parameter from a pooling descriptor.
+  /// \param [out] alg Pooling algorithm.
+  ::dnnl::algorithm get_algorithm() const { return _alg; }
+  /// Getting the stride parameter from a pooling descriptor.
+  /// \returns Array of dimension ndims containing the stride size of each
+  /// dimension.
+  const std::vector<int64_t> &get_stride() const { return _stride; }
+  /// Getting the kernel parameter from a pooling descriptor.
+  /// \returns Array of dimension ndims containing the kernel size of each
+  /// dimension.
+  const std::vector<int64_t> &get_kernel() const { return _kernel; }
+  /// Getting the padding parameter from a pooling descriptor.
+  /// \returns Array of dimension ndims containing the padding size of each
+  /// dimension.
+  const std::vector<int64_t> &get_padding() const { return _padding; }
+  /// Getting the output dimensions of a memory after 2D pooling has been
+  /// applied.
+  /// \param [in] desc Input memory descriptor.
+  /// \param [out] out_n Number of images.
+  /// \param [out] out_c Number of channels.
+  /// \param [out] out_h Height of images.
+  /// \param [out] out_w Width of images.
+  void get_forward_output_dim(const memory_desc_ext &desc, int *out_n,
+                              int *out_c, int *out_h, int *out_w) const {
+    auto dims = desc.get_dims();
+    *out_n = dims[0];
+    *out_c = dims[1];
+    *out_h = 1 + (dims[2] + 2 * _padding[0] - _kernel[0]) / _stride[0];
+    *out_w = 1 + (dims[3] + 2 * _padding[1] - _kernel[1]) / _stride[1];
+  }
+  /// Getting the output dimensions of a memory after ND pooling has been
+  /// applied.
+  /// \param [in] desc Input memory descriptor.
+  /// \param [out] ndims Dimension of the memory.
+  /// \param [out] out_dims Array of dimension requested_ndims that contain
+  /// the size of each memory dimension.
+  void get_forward_output_dim(const memory_desc_ext &desc, int ndims,
+                              int out_dims[]) const {
+    assert(ndims >= 4 && "ndims is at least 4.");
+    auto dims = desc.get_dims();
+    out_dims[0] = dims[0];
+    out_dims[1] = dims[1];
+    for (int i = 2; i < ndims; i++) {
+      out_dims[i] =
+          1 + (dims[i] + 2 * _padding[i - 2] - _kernel[i - 2]) / _stride[i - 2];
+    }
+  }
+};
+
+/// An enum class representing reduction operations.
+enum class reduction_op {
+  max,
+  min,
+  sum,
+  mul,
+  mean,
+  amax,
+  mul_no_zeros,
+  norm1,
+  norm2
+};
+
+/// An enum class representing batch normalization mode.
+enum class batch_normalization_mode { per_activation, spatial };
+
+/// An enum class representing batch normalization operations.
+enum class batch_normalization_ops { none, activation, add_activation };
+
+/// An enum class representing binary operations.
+enum class binary_op { add, sub, mul, div, min, max, sqrt, neg };
+
+/// An struct representing convolution algorithm infomation.
+struct convolution_algorithm_info {
+  ::dnnl::algorithm algo = ::dnnl::algorithm::convolution_auto;
+  int status = 0;
+};
+
+/// A class holding description for a convolution operation.
+class convolution_desc {
+  std::vector<int64_t> _strides;
+  std::vector<int64_t> _dilates;
+  std::vector<int64_t> _paddings;
+  int _group_count = 1;
+  ::dnnl::fpmath_mode _math_mode = ::dnnl::fpmath_mode::strict;
+public:
+  /// Setting a group count to be used in the convolution.
+  /// \param [in] group_count Value of group count.
+  void set_group_count(int group_count) { _group_count = group_count; }
+  /// Getting a group count specified in the given convolution descriptor.
+  /// \returns Value of group count.
+  int get_group_count() { return _group_count; }
+  /// Setting floating point math mode to be used in the convolution.
+  /// \param [in] math_mode Value of math_mode.
+  void set_math_mode(::dnnl::fpmath_mode math_mode) { _math_mode = math_mode; }
+  /// Getting floating point math mode specified in the given convolution descriptor.
+  /// \returns Value of math mode.
+  ::dnnl::fpmath_mode get_math_mode() { return _math_mode; }
+  /// Setting a 2D convolution descriptor with given parameters.
+  /// \param [in] padding_h Value of height of padding.
+  /// \param [in] padding_w Value of width of padding.
+  /// \param [in] stride_h Value of height of stride.
+  /// \param [in] stride_w Value of width of stride.
+  /// \param [in] dilate_h Value of height of dilate.
+  /// \param [in] dilate_w Value of width of dilate.
+  void set(int padding_h, int padding_w, int stride_h, int stride_w,
+           int dilate_h, int dilate_w) {
+    _strides = {stride_h, stride_w};
+    _dilates = {dilate_h - 1, dilate_w - 1};
+    _paddings = {padding_h, padding_w};
+  }
+  /// Setting a ND convolution descriptor with given parameters.
+  /// \param [in] ndims Dimension of the convolution operation.
+  /// \param [in] paddings Array of dimension ndims containing the padding size of
+  /// each dimension.
+  /// \param [in] strides Array of dimension ndims containing the stride size of
+  /// each dimension.
+  /// \param [in] dilates Array of dimension ndims containing the kernel size of
+  /// each dimension.
+  void set(int ndims, int paddings[], int strides[], int dilates[]) {
+    _strides = std::vector<int64_t>(strides, strides + ndims);
+    _paddings = std::vector<int64_t>(paddings, paddings + ndims);
+    _dilates = std::vector<int64_t>(dilates, dilates + ndims);
+    for (auto &dilate : _dilates) {
+      dilate--;
+    }
+  }
+  /// Getting parameters from a 2D convolution descriptor.
+  /// \param [out] padding_h Value of height of padding.
+  /// \param [out] padding_w Value of width of padding.
+  /// \param [out] stride_h Value of height of stride.
+  /// \param [out] stride_w Value of width of stride.
+  /// \param [out] dilate_h Value of height of dilate.
+  /// \param [out] dilate_w Value of width of dilate.
+  void get(int *padding_h, int *padding_w, int *stride_h, int *stride_w,
+           int *dilate_h, int *dilate_w) const {
+    *dilate_h = _dilates[0];
+    *dilate_w = _dilates[1];
+    *padding_h = _paddings[0];
+    *padding_w = _paddings[1];
+    *stride_h = _strides[0];
+    *stride_w = _strides[1];
+  }
+  /// Getting parameters from a ND convolution descriptor.
+  /// \param [in] requested_ndims Requested number of dimensions to get from a
+  /// given convolution descriptor.
+  /// \param [out] ndims Dimension of the pooling operation.
+  /// \param [out] paddings Array of dimension ndims containing the padding size
+  /// of each dimension.
+  /// \param [out] strides Array of dimension ndims containing the stride size of
+  /// each dimension.
+  /// \param [out] dilates Array of dimension ndims containing the dilate size of
+  /// each dimension.
+  void get(int requested_ndims, int *ndims, int paddings[], int strides[],
+           int dilates[]) const {
+    *ndims = _strides.size();
+    for (int i = 0; i < requested_ndims; i++) {
+      dilates[i] = _dilates[i];
+      paddings[i] = _paddings[i];
+      strides[i] = _strides[i];
+    }
+  }
+  /// Getting the stride parameter from a convolution descriptor.
+  /// \returns Array of dimension ndims containing the stride size of each
+  /// dimension.
+  const std::vector<int64_t> &get_stride() const { return _strides; }
+  /// Getting the kernel parameter from a convolution descriptor.
+  /// \returns Array of dimension ndims containing the dilate size of each
+  /// dimension.
+  const std::vector<int64_t> &get_dilate() const { return _dilates; }
+  /// Getting the padding parameter from a convolution descriptor.
+  /// \returns Array of dimension ndims containing the padding size of each
+  /// dimension.
+  const std::vector<int64_t> &get_padding() const { return _paddings; }
+  /// Getting the output dimensions of a memory after 2D convolution has been
+  /// applied.
+  /// \param [in] desc Input memory descriptor.
+  /// \param [in] weight_desc Input weight memory descriptor.
+  /// \param [out] out_n Number of images.
+  /// \param [out] out_c Number of channels.
+  /// \param [out] out_h Height of images.
+  /// \param [out] out_w Width of images.
+  void get_forward_output_dim(const memory_desc_ext &desc,
+                              const memory_desc_ext &weight_desc, int *out_n,
+                              int *out_c, int *out_h, int *out_w) const {
+    auto dims = desc.get_dims();
+    auto weight_dims = weight_desc.get_dims();
+    *out_n = dims[0];
+    *out_c = weight_dims[0];
+    *out_h = 1 + (dims[2] + 2 * _paddings[0] -
+                  (1 + ((_dilates[0] + 1) * (weight_dims[2] - 1)))) /
+                     _strides[0];
+    *out_w = 1 + (dims[3] + 2 * _paddings[1] -
+                  (1 + ((_dilates[1] + 1) * (weight_dims[3] - 1)))) /
+                     _strides[1];
+  }
+  /// Getting the output dimensions of a memory after ND convolution has been
+  /// applied.
+  /// \param [in] desc Input memory descriptor.
+  /// \param [in] weight_desc Input weight memory descriptor.
+  /// \param [out] ndims Dimension of the memory.
+  /// \param [out] out_dims Array of dimension requested_ndims that contain
+  /// the size of each memory dimension.
+  void get_forward_output_dim(const memory_desc_ext &desc,
+                              const memory_desc_ext &weight_desc, int ndims,
+                              int out_dims[]) const {
+    assert(ndims >= 4 && "ndims is at least 4.");
+    auto dims = desc.get_dims();
+    auto weight_dims = weight_desc.get_dims();
+    out_dims[0] = dims[0];
+    out_dims[1] = weight_dims[1];
+    for (int i = 2; i < ndims; i++) {
+      out_dims[i] = 1 + (dims[i] + 2 * _paddings[i - 2] -
+                         (1 + ((_dilates[i - 2] + 1) * (weight_dims[i] - 1)))) /
+                            _strides[i - 2];
+    }
+  }
+
+  convolution_desc &operator=(std::nullptr_t) {
+    return *this = convolution_desc();
+  }
+
+  operator bool() const {
+    return !(_strides.size() == 0
+             && _dilates.size() == 0
+             && _paddings.size() == 0);
+  }
+};
+
+/// An enum class representing rnn mode.
+enum class rnn_mode { vanilla_relu, vanilla_tanh, lstm, gru };
+
+/// An enum class representing rnn bias mode.
+enum class rnn_bias_mode { none, single };
+
+/// An enum class representing rnn direction.
+enum class rnn_direction {unidirectional, bidirectional};
+
+/// A class holding description for a RNN operation.
+class rnn_desc {
+  rnn_mode _mode;
+  rnn_bias_mode _bias_mode;
+  rnn_direction _direction;
+  dpct::library_data_t _dt;
+  int _input_size;
+  int _hidden_size;
+  int _projection_size;
+  int _layer_size;
+
+public:
+  void set(rnn_mode mode, rnn_bias_mode bias_mode, rnn_direction direction,
+           dpct::library_data_t dt, int input_size, int hidden_size,
+           int projection_size, int layer_size) {
+    _mode = mode;
+    _bias_mode = bias_mode;
+    _direction = direction;
+    _input_size = input_size;
+    _hidden_size = hidden_size;
+    _projection_size = projection_size;
+    _layer_size = layer_size;
+    _dt = dt;
+  }
+  void get(rnn_mode *mode, rnn_bias_mode *bias_mode, rnn_direction *direction,
+           dpct::library_data_t *dt, int *input_size, int *hidden_size,
+           int *projection_size, int *layer_size) const {
+    *mode = _mode;
+    *bias_mode = _bias_mode;
+    *direction = _direction;
+    *input_size = _input_size;
+    *hidden_size = _hidden_size;
+    *projection_size = _projection_size;
+    *layer_size = _layer_size;
+    *dt = _dt;
+  }
+};
+
+/// A class holding description for a Dropout operation.
+class dropout_desc {
+  struct dropout_desc_imp {
+    float _p = 0.5f;
+    unsigned long long _seed = 1;
+    void *_state = nullptr;
+    std::vector<std::uint8_t> _host_state;
+    rng_engine_t _rng_engine;
+    dropout_desc_imp() : _rng_engine(::dpct::cs::get_default_queue(), 1) {}
+  };
+  std::shared_ptr<dropout_desc_imp> _imp;
+
+  void generate(sycl::queue *q, std::int64_t required_state_size,
+                std::int64_t num, void *buffer) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) "
+                             "Interfaces Project does not support this API.");
+#else
+    sycl::event e_gen = oneapi::mkl::rng::generate(
+        oneapi::mkl::rng::bernoulli<std::int32_t>(1.f - _imp->_p),
+        _imp->_rng_engine, num, (std::int32_t *)buffer);
+    sycl::event e_save = q->submit([&](sycl::handler &cgh) {
+      cgh.depends_on(e_gen);
+      cgh.host_task([=] {
+        oneapi::mkl::rng::save_state(_imp->_rng_engine,
+                                     _imp->_host_state.data());
+      });
+    });
+    q->memcpy(_imp->_state, _imp->_host_state.data(), required_state_size,
+              e_save);
+#endif
+  }
+public:
+  operator bool() const {
+    return bool(_imp);
+  }
+  dropout_desc &operator=(std::nullptr_t) {
+    _imp.reset();
+    return *this;
+  }
+  /// Initializing a dropout descriptor.
+  void init(){
+    _imp = std::make_shared<dropout_desc_imp>();
+  }
+  /// Setting a dropout descriptor with given parameters.
+  /// \param [in] engine Engine of the dropout operation.
+  /// \param [in] p Probability of value set to zero.
+  /// \param [in] state Memory that store random generator state.
+  /// \param [in] state_size Required size to store random generator state.
+  /// \param [in] seed Seed to initialize conditions of the generator state.
+  void set(engine_ext &engine, float p, void *state, size_t state_size,
+           unsigned long long seed);
+  /// Getting parameters from a dropout descriptor.
+  /// \param [in] engine Engine of the dropout operation.
+  /// \param [in] p Probability of value set to zero.
+  /// \param [in] state Memory that store random generator state.
+  /// \param [in] seed Seed to initialize conditions of the generator state.
+  void get(float *p, void **states, unsigned long long *seed) const noexcept {
+    *seed = _imp->_seed;
+    *states = _imp->_state;
+    *p = _imp->_p;
+  }
+  /// Getting the probability of value set to zero.
+  /// \returns Probability.
+  float get_probability() const noexcept { return _imp->_p; }
+  /// Restoreing a dropout descriptor from stored state.
+  /// \param [in] engine Engine of the dropout operation.
+  /// \param [in] p Probability of value set to zero.
+  /// \param [in] state Memory that store random generator state.
+  /// \param [in] state_size Required size to store random generator state.
+  /// \param [in] seed Seed to initialize conditions of the generator state.
+  void restore(engine_ext &engine, float p, void *state, size_t state_size,
+               unsigned long long seed);
+  friend class engine_ext;
+};
+
+/// A class holding the oneDNN engine.
+class engine_ext {
+  struct output_argument_info {
+    float _alpha;
+    float _beta;
+    int _name;
+    memory_desc_ext _desc;
+    void *_data;
+    output_argument_info(float alpha, float beta, int name,
+                         memory_desc_ext desc, void *data)
+        : _alpha(alpha), _beta(beta), _name(name), _desc(desc), _data(data) {}
+    output_argument_info(float alpha, float beta, memory_desc_ext desc,
+                         void *data)
+        : _alpha(alpha), _beta(beta), _name(0), _desc(desc), _data(data) {}
+  };
+  struct buffer_info {
+    size_t capacity = 0;
+    uint8_t *buffer = nullptr;
+    size_t usage = 0;
+    sycl::queue q;
+    sycl::event deps;
+    size_t primitive_depth = 0;
+  };
+  struct internal_resource {
+    std::int64_t random_engine_state_size = -1;
+    buffer_info binfo;
+  };
+  std::shared_ptr<::dnnl::engine> _eng = nullptr;
+  std::shared_ptr<::dnnl::stream> _s = nullptr;
+  sycl::queue *_q = nullptr;
+  unsigned int _engine_id = 0;
+  static thread_local unsigned int _engine_count;
+  static thread_local std::map<void *, ::dnnl::memory> _workspace_map;
+  static thread_local std::map<sycl::queue *,
+                               std::shared_ptr<internal_resource>>
+      _internal_resource_cache;
+  static thread_local detail::primitive_cache _primitive_cache;
+  ::dnnl::memory &get_workspace(void *key) { return _workspace_map[key]; }
+  void insert_workspace(void *key, ::dnnl::memory workspace) {
+    _workspace_map[key] = workspace;
+  }
+  const ::dnnl::stream &get_stream() const { return *_s; }
+  const ::dnnl::engine &get_engine() const { return *_eng; }
+
+  void *allocate(const memory_desc_ext &desc, int count = 1);
+  void *allocate(size_t size);
+  std::shared_ptr<internal_resource> get_internal_resource(sycl::queue *q){
+    auto it = _internal_resource_cache.find(_q);
+    if (it == _internal_resource_cache.end()) {
+      return _internal_resource_cache[_q] = std::make_shared<internal_resource>();
+    }
+    return it->second;
+  }
+  void enter_primitive(size_t request_buffer_size = 0) {
+    auto &info = get_internal_resource(_q)->binfo;
+    if (info.primitive_depth == 0) {
+      info.usage = 0;
+      if (request_buffer_size > info.capacity) {
+        if (info.buffer && (info.capacity != 0)) {
+          auto ainfo = info;
+          ainfo.q.submit([=](sycl::handler &cgh) {
+            cgh.depends_on(ainfo.deps);
+            cgh.host_task([=] { sycl::free(ainfo.buffer, ainfo.q); });
+          });
+        }
+        size_t new_buffer_capacity =
+            (std::max)(request_buffer_size, info.capacity * 2);
+        info.capacity = new_buffer_capacity;
+        info.buffer = (uint8_t *)sycl::malloc_device(new_buffer_capacity, *_q);
+        info.q = *_q;
+        info.deps = sycl::event();
+      }
+    }
+    info.primitive_depth++;
+  }
+  sycl::event exit_primitive(const sycl::event &e) {
+    auto &info = get_internal_resource(_q)->binfo;
+    info.primitive_depth--;
+    if ((info.primitive_depth == 0) && info.usage) {
+      info.deps = e;
+    }
+    return e;
+  }
+  ::dnnl::memory::desc
+  compress_spatial_dimensions_to_channel(const ::dnnl::memory::desc &desc);
+  ::dnnl::memory::desc
+  get_bn_scale_bias_mean_var_desc(const ::dnnl::memory::desc &desc,
+                                  batch_normalization_mode mode);
+  sycl::event batch_normalization_backward_internal(
+      batch_normalization_mode mode, float epsilon, float alpha_data,
+      const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta_data,
+      const memory_desc_ext &diff_src_desc, void *diff_src, float alpha_param,
+      const memory_desc_ext &diff_scale_bias_desc, void *scale, void *bias,
+      float beta_param, void *diff_scale, void *diff_bias,
+      const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var);
+  sycl::event batch_normalization_forward_internal(
+      bool is_infer, batch_normalization_mode mode, float epsilon, float factor,
+      float alpha, const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+      const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var,
+      void *running_mean, void *running_var);
+  ::dnnl::memory::desc
+  transfer_memory_desc_to_channel_major_format(const ::dnnl::memory::desc &desc);
+  ::dnnl::memory::desc
+  bn_reorder_memory_to_channel_major_format(
+      bool is_input, ::dnnl::memory::desc &desc, void *src, void **cache);
+  ::dnnl::memory::desc
+  transfer_memory_desc_to_format_tag_any(const ::dnnl::memory::desc &desc){
+    return ::dnnl::memory::desc(desc.get_dims(), desc.get_data_type(),
+                                ::dnnl::memory::format_tag::any);
+  }
+  void allocate_and_reorder_memory_to_optimal(::dnnl::memory::desc &from_desc,
+                                              void *&from,
+                                              ::dnnl::memory::desc &to_desc,
+                                              void *&to) {
+    if (from_desc != to_desc) {
+      to = allocate(to_desc);
+      async_reorder(1.f, from_desc, from, 0.f, to_desc, to);
+    }
+  }
+  template <typename primitive_type, typename... args_type>
+  std::pair<detail::primitive_cache_key_type, detail::primitive_and_args>
+  create_primitive_args_or_get(args_type &&...args);
+  template <typename primitive_type>
+  typename primitive_type::primitive_desc
+  get_primitive_desc(::dnnl::primitive *p);
+  template <typename primitive_type, typename... args_type>
+  typename primitive_type::primitive_desc
+  create_primitive_desc(args_type &&...args);
+  template <typename T>
+  void generate_cache_key(std::string &key_buffer, const T &arg);
+  template <typename T, typename... args_type>
+  void generate_cache_key(std::string &key_buffer, const T &first_arg,
+                          const args_type &...args);
+  void insert_arg(std::unordered_map<int, ::dnnl::memory> *args, int name,
+                  const ::dnnl::memory::desc &desc, void *data) {
+    auto it = args->find(name);
+    if (it != args->end()) {
+      it->second.set_data_handle(data);
+    } else {
+      args->insert({name, ::dnnl::memory(desc, *_eng, data)});
+    }
+  }
+  void insert_arg(std::unordered_map<int, ::dnnl::memory> *args, int name,
+                  const ::dnnl::memory &mem) {
+    (*args)[name] = mem;
+  }
+  sycl::event execute_rnn_forward_primitive(
+      rnn_mode mode, ::dnnl::prop_kind kind, ::dnnl::rnn_direction direction,
+      rnn_bias_mode bias_mode, ::dnnl::memory::data_type dt,
+      ::dnnl::memory::format_tag tag, int seq_length, int batch_size, int src_c,
+      int dst_c, int layer_size, int direction_num, int hidden_size,
+      int gate_num, int projection_size, std::vector<void *> &data,
+      std::vector<int> &offset, int iter_num, size_t *weight_size = nullptr,
+      size_t *workspace_size = nullptr, size_t *scratchpad_size = nullptr);
+
+  sycl::event rnn_forward_internal(
+      const rnn_desc &desc, ::dnnl::prop_kind kind,
+      const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &iter_desc, void *src_iter, void *dst_iter,
+      const memory_desc_ext &iter_c_desc, void *src_iter_c, void *dst_iter_c,
+      size_t weight_size, void *weight, size_t workspace_size, void *workspace,
+      size_t scratchpad_size, void *scratchpad, bool is_get_execution_args,
+      size_t *weight_size_query, size_t *workspace_size_query,
+      size_t *scratchpad_size_query);
+
+  sycl::event execute_rnn_backward_primitive(
+      rnn_mode mode, ::dnnl::rnn_direction direction, rnn_bias_mode bias_mode,
+      ::dnnl::memory::data_type dt, ::dnnl::memory::format_tag tag,
+      int seq_length, int batch_size, int src_c, int dst_c, int layer_size,
+      int direction_num, int hidden_size, int gate_num, int projection_size,
+      std::vector<void *> &data, std::vector<int> &offset, int iter_num);
+  bool
+  scale_parameter_preprocess(const std::vector<output_argument_info> &args);
+  template <typename primitive_type>
+  sycl::event
+  execute_primitive(const std::pair<detail::primitive_cache_key_type,
+                                    detail::primitive_and_args> &primitive,
+                    const std::vector<output_argument_info> &extra_args = {});
+  template <typename T>
+  sycl::event fill_with_type(sycl::queue *q, void *src, const void *value,
+                             size_t size_with_byte) {
+    return q->fill<T>(static_cast<T *>(src), *static_cast<const T *>(value),
+                      size_with_byte / sizeof(T));
+  }
+  template <typename T>
+  void transform_no_zero_with_type(sycl::queue *q, void *src, void *dst,
+                                   size_t num) {
+    q->submit([&](sycl::handler &cgh) {
+      cgh.parallel_for<::dpct::cs::kernel_name<class zero_to_one, T>>(
+          sycl::range<1>(num), [=](sycl::id<1> idx) {
+            T *src_ptr = static_cast<T *>(src) + idx[0];
+            T *dst_ptr = static_cast<T *>(dst) + idx[0];
+            if (*src_ptr) {
+              *dst_ptr = *src_ptr;
+            } else {
+              *dst_ptr = 1;
+            }
+          });
+    });
+  }
+  void transform_no_zero(const memory_desc_ext &desc, void *src, void *dst);
+  ::dnnl::memory::desc get_group_weight_desc(int group_count,
+                                             const memory_desc_ext &weight_desc);
+  void get_rnn_configuration(const ::dnnl::memory::desc &desc,
+                             rnn_direction direction, rnn_mode mode,
+                             dpct::library_data_t dt, int hidden_size,
+                             ::dnnl::memory::data_type *dnnl_dt,
+                             ::dnnl::memory::format_tag *tag,
+                             int *projection_size, int *output_size,
+                             int *seq_length, int *batch_size,
+                             int *direction_num, int *gate_num);
+public:
+  engine_ext() {}
+  engine_ext(std::nullptr_t) {
+    _eng = nullptr;
+    _s = nullptr;
+    _q = nullptr;
+  }
+  operator bool() const {
+    return bool(_eng) && bool(_s) && bool(_q);
+  }
+  engine_ext &operator=(std::nullptr_t) {
+    _eng = nullptr;
+    _s = nullptr;
+    _q = nullptr;
+    return *this;
+  }
+  /// Creating oneDNN engine.
+  void create_engine() {
+#if USE_DPCT_HELPER
+    _q = &::dpct::cs::get_current_device().default_queue();
+#else
+    _q = ::dpct::cs::get_current_device().default_queue();
+#endif
+    _eng = std::make_shared<::dnnl::engine>(::dnnl::sycl_interop::make_engine(
+        ::dpct::cs::get_current_device(),
+        ::dpct::cs::get_current_device().get_context()));
+    _s = std::make_shared<::dnnl::stream>(
+        ::dnnl::sycl_interop::make_stream(*_eng, *_q));
+    _engine_id = _engine_count++;
+  }
+  /// Setting the user's SYCL queue for an oneDNN engine.
+  /// \param [in] q Pointer to the SYCL queue.
+  void set_queue(sycl::queue *q) {
+    if (!q) {
+      throw std::runtime_error("set_queue: pointer must not be nullptr.");
+    }
+    if (!_eng) {
+      throw std::runtime_error("set_queue: current engine is invalid.");
+    }
+    if (q->get_context() != ::dnnl::sycl_interop::get_context(*_eng)) {
+      throw std::runtime_error(
+          "set_queue: queue is mismatch with current engine context.");
+    }
+    _q = q;
+    _s = std::make_shared<::dnnl::stream>(
+        ::dnnl::sycl_interop::make_stream(*_eng, *_q));
+  }
+  /// Retrieving the user's SYCL queue set in the oneDNN engine.
+  /// \returns Pointer to the SYCL queue.
+  sycl::queue *get_queue() const { return _q; }
+  /// Setting all elements of a memory to a given value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] valuePtr Pointer to a single value.
+  void fill(const memory_desc_ext &src_desc, void *src,
+                   const void *valuePtr);
+  /// Coping the scaled data from a memory to another memory with a different
+  /// description.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  void reorder(float alpha, const memory_desc_ext &src_desc, void *src,
+                      float beta, const memory_desc_ext &dst_desc, void *dst);
+  /// Scaling all the elements of a memory by a given factor.
+  /// \param [in] alpha Value to scaling factors.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [out] src Pointer to source data.
+  void scale(float alpha, const memory_desc_ext &src_desc, void *src);
+  /// Adding the scaled values of a memory to another memory.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  void sum(float alpha, const memory_desc_ext &src_desc, void *src,
+                  float beta, const memory_desc_ext &dst_desc, void *dst);
+  /// Computing a specified activation function value.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  void activation_forward(activation_desc &desc, float alpha,
+                                 const memory_desc_ext &src_desc, void *src,
+                                 float beta, const memory_desc_ext &dst_desc,
+                                 void *dst);
+  /// Computing the gradient of a specified activation function.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  void
+  activation_backward(activation_desc &desc, float alpha,
+                      const memory_desc_ext &dst_desc, void *dst,
+                      const memory_desc_ext &diff_dst_desc, void *diff_dst,
+                      const memory_desc_ext &src_desc, void *src, float beta,
+                      const memory_desc_ext &diff_src_desc, void *diff_src);
+  /// Computing a specified pooling function value.
+  /// \param [in] desc Pooling descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [out] workspace Pointer to workspace generated from forward propagation.
+  void pooling_forward(pooling_desc &desc, float alpha,
+                              const memory_desc_ext &src_desc, void *src,
+                              float beta, const memory_desc_ext &dst_desc,
+                              void *dst, ::dnnl::memory *workspace = nullptr);
+  /// Computing the gradient of a specified pooling function.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential
+  /// source data. 
+  /// \param [in] workspace Pointer to workspace used for backward
+  /// propagation.
+  void pooling_backward(pooling_desc &desc, float alpha,
+                               const memory_desc_ext &dst_desc, void *dst,
+                               const memory_desc_ext &diff_dst_desc,
+                               void *diff_dst, const memory_desc_ext &src_desc,
+                               void *src, float beta,
+                               const memory_desc_ext &diff_src_desc,
+                               void *diff_src,
+                               ::dnnl::memory *workspace = nullptr);
+  /// Computing a specified softmax function value.
+  /// \param [in] alg Softmax algorithm.
+  /// \param [in] mode Softmax mode.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value. 
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data. 
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  void softmax_forward(softmax_algorithm alg, softmax_mode mode,
+                              float alpha, const memory_desc_ext &src_desc,
+                              void *src, float beta,
+                              const memory_desc_ext &dst_desc, void *dst);
+  /// Computing the gradient of a specified softmax function.
+  /// \param [in] alg Softmax algorithm.
+  /// \param [in] mode Softmax mode.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value. 
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  void softmax_backward(softmax_algorithm alg, softmax_mode mode,
+                               float alpha, const memory_desc_ext &dst_desc,
+                               void *dst, const memory_desc_ext &diff_dst_desc,
+                               void *diff_dst, float beta,
+                               const memory_desc_ext &diff_src_desc,
+                               void *diff_src);
+  /// Computing a specified local response normalization function value.
+  /// \param [in] desc Local response normalization descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [out] workspace Pointer to workspace generated from forward
+  /// propagation.
+  void lrn_forward(lrn_desc &desc, float alpha,
+                          const memory_desc_ext &src_desc, void *src,
+                          float beta, const memory_desc_ext &dst_desc,
+                          void *dst, ::dnnl::memory *workspace = nullptr);
+  /// Computing the gradient of a specified local response normalization
+  /// function.
+  /// \param [in] desc Local response normalization descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] workspace Pointer to workspace used for backward propagation.
+  void lrn_backward(lrn_desc &desc, float alpha,
+                           const memory_desc_ext &dst_desc, void *dst,
+                           const memory_desc_ext &diff_dst_desc, void *diff_dst,
+                           const memory_desc_ext &src_desc, void *src,
+                           float beta, const memory_desc_ext &diff_src_desc,
+                           void *diff_src, ::dnnl::memory *workspace = nullptr);
+  /// Setting all elements of a memory to a given value asynchronously.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] valuePtr Pointer to a single value.
+  /// \returns An event representing the fill operations.
+  sycl::event async_fill(const memory_desc_ext &src_desc, void *src,
+                   const void *valuePtr);
+  /// Coping the scaled data from a memory to another memory with a different
+  /// description asynchronously.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the reorder operations.
+  sycl::event async_reorder(float alpha, const memory_desc_ext &src_desc, void *src,
+                      float beta, const memory_desc_ext &dst_desc, void *dst);
+  /// Scaling all the elements of a memory by a given factor asynchronously.
+  /// \param [in] alpha Value to scaling factors.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [out] src Pointer to source data.
+  /// \returns An event representing the scale operations.
+  sycl::event async_scale(float alpha, const memory_desc_ext &src_desc, void *src);
+  /// Adding the scaled values of a memory to another memory asynchronously.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the sum operations.
+  sycl::event async_sum(float alpha, const memory_desc_ext &src_desc, void *src,
+                  float beta, const memory_desc_ext &dst_desc, void *dst);
+
+  /// Perform specified binary operation asynchronously.
+  /// \param [in] op Specified binary operation.
+  /// \param [in] alpha_0 Value to scaling factors used to scale the src_0
+  /// value.
+  /// \param [in] src_desc_0 Source 0 memory descriptor.
+  /// \param [in] src_0 Pointer to source 0 data.
+  /// \param [in] alpha_1 Value to scaling factors used to scale the src_1
+  /// value.
+  /// \param [in] src_desc_1 Source 1 memory descriptor.
+  /// \param [in] src_1 Pointer to source 1 data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the binary operations.
+  sycl::event async_binary(binary_op op, float alpha_0,
+                     const memory_desc_ext &src_desc_0, void *src_0,
+                     float alpha_1, const memory_desc_ext &src_desc_1,
+                     void *src_1, float beta, const memory_desc_ext &dst_desc,
+                     void *dst);
+
+  /// Perform specified binary operation asynchronously.
+  /// \param [in] op Specified reduction operation.
+  /// \param [in] alpha Value to scaling factors used to scale the data
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the reduction operations.
+  sycl::event async_reduction(reduction_op op, float alpha,
+                        const memory_desc_ext &src_desc, void *src, float beta,
+                        const memory_desc_ext &dst_desc, void *dst);
+  /// Computing a specified activation function value asynchronously.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the activation forward operations.
+  sycl::event async_activation_forward(activation_desc &desc, float alpha,
+                                 const memory_desc_ext &src_desc, void *src,
+                                 float beta, const memory_desc_ext &dst_desc,
+                                 void *dst);
+  /// Computing the gradient of a specified activation function asynchronously.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \returns An event representing the activation backward operations.
+  sycl::event
+  async_activation_backward(activation_desc &desc, float alpha,
+                      const memory_desc_ext &dst_desc, void *dst,
+                      const memory_desc_ext &diff_dst_desc, void *diff_dst,
+                      const memory_desc_ext &src_desc, void *src, float beta,
+                      const memory_desc_ext &diff_src_desc, void *diff_src);
+  /// Computing a specified pooling function value asynchronously.
+  /// \param [in] desc Pooling descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [out] workspace Pointer to workspace generated from forward propagation.
+  /// \returns An event representing the pooling forward operations.
+  sycl::event async_pooling_forward(pooling_desc &desc, float alpha,
+                              const memory_desc_ext &src_desc, void *src,
+                              float beta, const memory_desc_ext &dst_desc,
+                              void *dst, ::dnnl::memory *workspace = nullptr);
+  /// Computing the gradient of a specified pooling function asynchronously.
+  /// \param [in] desc Activation descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential
+  /// source data. 
+  /// \param [in] workspace Pointer to workspace used for backward
+  /// propagation.
+  /// \returns An event representing the pooling backward operations.
+  sycl::event async_pooling_backward(pooling_desc &desc, float alpha,
+                               const memory_desc_ext &dst_desc, void *dst,
+                               const memory_desc_ext &diff_dst_desc,
+                               void *diff_dst, const memory_desc_ext &src_desc,
+                               void *src, float beta,
+                               const memory_desc_ext &diff_src_desc,
+                               void *diff_src,
+                               ::dnnl::memory *workspace = nullptr);
+  /// Computing a specified softmax function value asynchronously.
+  /// \param [in] alg Softmax algorithm.
+  /// \param [in] mode Softmax mode.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value. 
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data. 
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the softmax forward operations.
+  sycl::event async_softmax_forward(softmax_algorithm alg, softmax_mode mode,
+                              float alpha, const memory_desc_ext &src_desc,
+                              void *src, float beta,
+                              const memory_desc_ext &dst_desc, void *dst);
+  /// Computing the gradient of a specified softmax function asynchronously.
+  /// \param [in] alg Softmax algorithm.
+  /// \param [in] mode Softmax mode.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value. 
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \returns An event representing the softmax backward operations.
+  sycl::event async_softmax_backward(softmax_algorithm alg, softmax_mode mode,
+                               float alpha, const memory_desc_ext &dst_desc,
+                               void *dst, const memory_desc_ext &diff_dst_desc,
+                               void *diff_dst, float beta,
+                               const memory_desc_ext &diff_src_desc,
+                               void *diff_src);
+  /// Computing a specified local response normalization function value
+  /// asynchronously.
+  /// \param [in] desc Local response normalization descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [out] workspace Pointer to workspace generated from forward
+  /// propagation.
+  /// \returns An event representing the lrn forward operations.
+  sycl::event async_lrn_forward(lrn_desc &desc, float alpha,
+                          const memory_desc_ext &src_desc, void *src,
+                          float beta, const memory_desc_ext &dst_desc,
+                          void *dst, ::dnnl::memory *workspace = nullptr);
+  /// Computing the gradient of a specified local response normalization
+  /// function asynchronously.
+  /// \param [in] desc Local response normalization descriptor.
+  /// \param [in] alpha Value to scaling factors used to scale the computed value.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the differential destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] workspace Pointer to workspace used for backward propagation.
+  /// \returns An event representing the lrn backward operations.
+  sycl::event async_lrn_backward(lrn_desc &desc, float alpha,
+                           const memory_desc_ext &dst_desc, void *dst,
+                           const memory_desc_ext &diff_dst_desc, void *diff_dst,
+                           const memory_desc_ext &src_desc, void *src,
+                           float beta, const memory_desc_ext &diff_src_desc,
+                           void *diff_src, ::dnnl::memory *workspace = nullptr);
+
+  /// Derives a memory descriptor for the batch normalization scale, bias, mean,
+  /// variance from the source memory descriptor and batch normalization mode.
+  /// \param [out] desc Derived memory descriptor.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] mode Batch normalization mode.
+  static void derive_batch_normalization_memory_desc(memory_desc_ext &desc,
+                                              const memory_desc_ext &src_desc,
+                                              batch_normalization_mode mode);
+
+  /// Derives a memory descriptor for the batch normalization scale, bias, mean,
+  /// variance from the source memory descriptor and batch normalization mode.
+  /// \param [out] scale_bias_desc Derived scale and bias memory descriptor.
+  /// \param [out] mean_var_desc Derived mean and var memory descriptor.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] mode Batch normalization mode.
+  static void derive_batch_normalization_memory_desc(memory_desc_ext &scale_bias_desc,
+                                             memory_desc_ext &mean_var_desc,
+                                             const memory_desc_ext &src_desc,
+                                             batch_normalization_mode mode);
+
+  /// Get the size of workspace that needed by batch normalization. The data stored
+  /// in workspace must be preserved between forward and backward.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \returns Size of workspace.
+  size_t get_batch_normalization_workspace_size(
+    batch_normalization_ops ops, const memory_desc_ext &src_desc);
+
+  /// Computing a specified batch normalization inference stage function value
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] scale_bias_mean_var_desc Scale, bias, mean, variance memory
+  /// descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] mean Pointer to mean data.
+  /// \param [in] var Pointer to variance data.
+  /// \returns An event representing the batch normalization forward operations.
+  sycl::event async_batch_normalization_forward_inference(
+      batch_normalization_mode mode, float epsilon, float alpha,
+      const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+      void *mean, void *var);
+
+  /// Computing a specified batch normalization inference stage function value
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] summand_desc Summand memory descriptor.
+  /// \param [in] summand Pointer to summand data.
+  /// \param [in] scale_bias_desc Scale, bias memory descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] mean_var_desc Mean, variance memory descriptor.
+  /// \param [in] mean Pointer to mean data.
+  /// \param [in] var Pointer to variance data.
+  /// \returns An event representing the batch normalization forward operations.
+  sycl::event async_batch_normalization_forward_inference(
+      batch_normalization_mode mode, batch_normalization_ops ops,
+      activation_desc &adesc, float epsilon, float alpha,
+      const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &summand_desc, void *summand,
+      const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+      const memory_desc_ext &mean_var_desc, void *mean, void *var);
+
+  /// Computing a specified batch normalization training stage function value
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] factor Factor value used in running mean and variance
+  /// computation.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] scale_bias_mean_var_desc Scale, bias, mean, variance memory
+  /// descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [out] running_mean Pointer to running mean data.
+  /// \param [out] running_var Pointer to running variance data.
+  /// \param [out] saved_mean Pointer to optional cache to save mean data.
+  /// \param [out] saved_var Pointer to optional cache to save variance data.
+  /// \returns An event representing the batch normalization forward operations.
+  sycl::event async_batch_normalization_forward_training(
+      batch_normalization_mode mode, float epsilon, float factor, float alpha,
+      const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+      void *running_mean, void *running_var, void *saved_mean, void *saved_var);
+
+  /// Computing a specified batch normalization training stage function value
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] factor Factor value used in running mean and variance
+  /// computation.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] summand_desc Summand memory descriptor.
+  /// \param [in] summand Pointer to summand data.
+  /// \param [in] scale_bias_mean_var_desc Scale, bias, mean, variance memory
+  /// descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [out] running_mean Pointer to running mean data.
+  /// \param [out] running_var Pointer to running variance data.
+  /// \param [out] saved_mean Pointer to optional cache to save mean data.
+  /// \param [out] saved_var Pointer to optional cache to save variance data.
+  /// \param [in] workspace_size Size of workspace.
+  /// \param [out] workspace Pointer to workspace generated from forward
+  /// propagation.
+  /// \returns An event representing the batch normalization forward operations.
+  sycl::event async_batch_normalization_forward_training(
+      batch_normalization_mode mode, batch_normalization_ops ops,
+      activation_desc &adesc, float epsilon, float factor, float alpha,
+      const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &summand_desc, void *summand,
+      const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+      void *running_mean, void *running_var, void *saved_mean, void *saved_var,
+      size_t workspace_size, void *workspace);
+
+  /// Computing a specified batch normalization training stage function value
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] factor Factor value used in running mean and variance
+  /// computation.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] summand_desc Summand memory descriptor.
+  /// \param [in] summand Pointer to summand data.
+  /// \param [in] scale_bias_desc Scale, bias memory descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] mean_var_desc Mean, variance memory descriptor.
+  /// \param [out] running_mean Pointer to running mean data.
+  /// \param [out] running_var Pointer to running variance data.
+  /// \param [out] saved_mean Pointer to optional cache to save mean data.
+  /// \param [out] saved_var Pointer to optional cache to save variance data.
+  /// \param [in] workspace_size Size of workspace.
+  /// \param [out] workspace Pointer to workspace generated from forward
+  /// propagation.
+  /// \returns An event representing the batch normalization forward operations.
+  sycl::event async_batch_normalization_forward_training(
+      batch_normalization_mode mode, batch_normalization_ops ops,
+      activation_desc &adesc, float epsilon, float factor, float alpha,
+      const memory_desc_ext &src_desc, void *src, float beta,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &summand_desc, void *summand,
+      const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+      const memory_desc_ext &mean_var_desc, void *running_mean, void *running_var,
+      void *saved_mean, void *saved_var, size_t workspace_size, void *workspace);
+
+  /// Computing the gradient of a specified batch normalization function asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] alpha_data Value to scaling factors used to scale the computed
+  /// data value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta_data Value to scaling factors used to scale the prior value
+  /// in the data memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] alpha_param Value to scaling factors used to scale the computed
+  /// parameter value.
+  /// \param [in] diff_scale_bias_mean_var_desc Differential scale, bias, mean,
+  /// variance memory descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] beta_param Value to scaling factors used to scale the prior value
+  /// in the parameter memory.
+  /// \param [in] diff_scale Pointer to differential scale data.
+  /// \param [in] diff_bias Pointer to differential bias data.
+  /// \param [in] saved_mean Pointer to optional cache saved mean data in forward.
+  /// \param [in] saved_var Pointer to optional cache saved variance data in forward.
+  /// \returns An event representing the batch normalization backward operations.
+  sycl::event async_batch_normalization_backward(
+      batch_normalization_mode mode, float epsilon, float alpha_data,
+      const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta_data,
+      const memory_desc_ext &diff_src_desc, void *diff_src, float alpha_param,
+      const memory_desc_ext &diff_scale_bias_mean_var_desc, void *scale,
+      float beta_param, void *diff_scale, void *diff_bias, void *saved_mean,
+      void *saved_var);
+
+  /// Computing the gradient of a specified batch normalization function
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] alpha_data Value to scaling factors used to scale the computed
+  /// data value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta_data Value to scaling factors used to scale the prior value
+  /// in the data memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] diff_summand_desc Differential summand memory descriptor.
+  /// \param [out] diff_summand Pointer to differential summand data.
+  /// \param [in] alpha_param Value to scaling factors used to scale the computed
+  /// parameter value.
+  /// \param [in] diff_scale_bias_mean_var_desc Differential scale, bias, mean,
+  /// variance memory descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] beta_param Value to scaling factors used to scale the prior value
+  /// in the parameter memory.
+  /// \param [out] diff_scale Pointer to differential scale data.
+  /// \param [out] diff_bias Pointer to differential bias data.
+  /// \param [in] saved_mean Pointer to optional cache saved mean data in forward.
+  /// \param [in] saved_var Pointer to optional cache saved variance data in forward.
+  /// \param [in] workspace_size Size of workspace.
+  /// \param [in] workspace Pointer to workspace used for backward propagation.
+  /// \returns An event representing the batch normalization backward operations.
+  sycl::event async_batch_normalization_backward(
+      batch_normalization_mode mode, batch_normalization_ops ops,
+      activation_desc &adesc, float epsilon, float alpha_data,
+      const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &dst_desc, void *dst,
+      const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta_data,
+      const memory_desc_ext &diff_src_desc, void *diff_src,
+      const memory_desc_ext &diff_summand_desc, void *diff_summand,
+      float alpha_param, const memory_desc_ext &diff_scale_bias_mean_var_desc,
+      void *scale, void *bias, float beta_param, void *diff_scale,
+      void *diff_bias, void *saved_mean, void *saved_var,
+      size_t workspace_size, void *workspace);
+
+  /// Computing the gradient of a specified batch normalization function
+  /// asynchronously.
+  /// \param [in] mode Batch normalization mode.
+  /// \param [in] ops Batch normalization operation mode. This mode can set to
+  /// perform only batch normalization, or batch normalization followed by
+  /// activation, or batch normalization followed by element-wise addition and
+  /// activation.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] epsilon Epsilon value used in computation.
+  /// \param [in] alpha_data Value to scaling factors used to scale the computed
+  /// data value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta_data Value to scaling factors used to scale the prior value
+  /// in the data memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] diff_summand_desc Differential summand memory descriptor.
+  /// \param [out] diff_summand Pointer to differential summand data.
+  /// \param [in] alpha_param Value to scaling factors used to scale the computed
+  /// parameter value.
+  /// \param [in] diff_scale_bias_desc Differential scale, bias memory descriptor.
+  /// \param [in] scale Pointer to scale data.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] beta_param Value to scaling factors used to scale the prior value
+  /// in the parameter memory.
+  /// \param [out] diff_scale Pointer to differential scale data.
+  /// \param [out] diff_bias Pointer to differential bias data.
+  /// \param [in] mean_var_desc Differential mean, variance memory descriptor.
+  /// \param [in] saved_mean Pointer to optional cache saved mean data in forward.
+  /// \param [in] saved_var Pointer to optional cache saved variance data in forward.
+  /// \param [in] workspace_size Size of workspace.
+  /// \param [in] workspace Pointer to workspace used for backward propagation.
+  /// \returns An event representing the batch normalization backward operations.
+  sycl::event async_batch_normalization_backward(
+      batch_normalization_mode mode, batch_normalization_ops ops,
+      activation_desc &adesc, float epsilon, float alpha_data,
+      const memory_desc_ext &src_desc, void *src, const memory_desc_ext &dst_desc,
+      void *dst, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+      float beta_data, const memory_desc_ext &diff_src_desc, void *diff_src,
+      const memory_desc_ext &diff_summand_desc, void *diff_summand,
+      float alpha_param, const memory_desc_ext &diff_scale_bias_desc, void *scale,
+      void *bias, float beta_param, void *diff_scale, void *diff_bias,
+      const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var,
+      size_t workspace_size, void *workspace);
+
+  /// Computing a specified convolution function value asynchronously.
+  /// \param [in] desc Convolution descriptor.
+  /// \param [in] alg Convolution algorithm.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] weight_desc Weight memory descriptor.
+  /// \param [in] weight Pointer to weight data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the convolution forward operations.
+  sycl::event async_convolution_forward(convolution_desc &desc, ::dnnl::algorithm alg,
+                                  float alpha, const memory_desc_ext &src_desc,
+                                  void *src, const memory_desc_ext &weight_desc,
+                                  void *weight, float beta,
+                                  const memory_desc_ext &dst_desc, void *dst);
+
+  /// Computing a specified convolution function value asynchronously.
+  /// \param [in] desc Convolution descriptor.
+  /// \param [in] alg Convolution algorithm.
+  /// \param [in] adesc Activation operation descriptor.
+  /// \param [in] alpha_0 Value to scaling factors used to scale the data
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] weight_desc Weight memory descriptor.
+  /// \param [in] weight Pointer to weight data.
+  /// \param [in] alpha_1 Value to scaling factors used to scale the summand
+  /// value.
+  /// \param [in] summand_desc Summand memory descriptor.
+  /// \param [in] summand Pointer to summand data.
+  /// \param [in] bias_desc Bias memory descriptor.
+  /// \param [in] bias Pointer to bias data.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \returns An event representing the convolution forward operations.
+  sycl::event async_convolution_forward(
+      convolution_desc &desc, ::dnnl::algorithm alg, activation_desc &adesc,
+      float alpha_0, const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &weight_desc, void *weight, float alpha_1,
+      const memory_desc_ext &summand_desc, void *summand,
+      const memory_desc_ext &bias_desc, void *bias,
+      const memory_desc_ext &dst_desc, void *dst);
+
+  /// Computing the data gradient of a specified convolution function asynchronously.
+  /// \param [in] desc Convolution descriptor.
+  /// \param [in] alg Convolution algorithm.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] weight_desc Weight memory descriptor.
+  /// \param [in] weight Pointer to weight data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \returns An event representing the convolution backward data operations.
+  sycl::event async_convolution_backward_data(
+      convolution_desc &desc, ::dnnl::algorithm alg, float alpha,
+      const memory_desc_ext &weight_desc, void *weight,
+      const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta,
+      const memory_desc_ext &diff_src_desc, void *diff_src);
+
+  /// Computing the weight gradient of a specified convolution function
+  /// asynchronously.
+  /// \param [in] desc Convolution descriptor.
+  /// \param [in] alg Convolution algorithm.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] diff_weight_desc Differential weight memory descriptor.
+  /// \param [out] diff_weight Pointer to differential weight data.
+  /// \returns An event representing the convolution backward weight operations.
+  sycl::event async_convolution_backward_weight(
+      convolution_desc &desc, ::dnnl::algorithm alg, float alpha,
+      const memory_desc_ext &src_desc, void *src,
+      const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta,
+      const memory_desc_ext &diff_weight_desc, void *diff_weight);
+
+  /// Computing the bias gradient of a specified convolution function
+  /// asynchronously.
+  /// \param [in] alpha Value to scaling factors used to scale the computed
+  /// value.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] beta Value to scaling factors used to scale the prior value
+  /// in the destination memory.
+  /// \param [in] diff_bias_desc Differential bias memory descriptor.
+  /// \param [out] diff_bias Pointer to differential bias data.
+  /// \returns An event representing the convolution backward bias operations.
+  sycl::event async_convolution_backward_bias(float alpha,
+                                        const memory_desc_ext &diff_dst_desc,
+                                        void *diff_dst, float beta,
+                                        const memory_desc_ext &diff_bias_desc,
+                                        void *diff_bias);
+
+  /// Getting the required weight space size for specified rnn operation.  
+  /// \param [in] desc RNN descriptor.
+  /// \param [out] weight_space_size Size of required weight space.
+  void rnn_get_weight_space_size(const rnn_desc &desc,
+                                 size_t *weight_space_size);
+
+  /// Getting the required scratchpad size and workspace size for specified rnn operation.  
+  /// \param [in] desc RNN descriptor.
+  /// \param [in] kind Propagation kind.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [out] scratchpad_size Size of required scratchpad.
+  /// \param [out] workspace_size Size of required workspace.
+  void rnn_get_scratchpad_workspace_size(const rnn_desc &desc, ::dnnl::prop_kind kind,
+                              const memory_desc_ext &src_desc,
+                              size_t *scratchpad_size, size_t *workspace_size);
+
+  /// Computing a specified rnn function value asynchronously.
+  /// \param [in] desc RNN descriptor.
+  /// \param [in] kind Propagation kind.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] iter_desc Recurrent hidden state data memory descriptor.
+  /// \param [in] src_iter Pointer to input recurrent hidden state data.
+  /// \param [in] dst_iter Pointer to output recurrent hidden state data.
+  /// \param [in] iter_c_desc Recurrent cell state data memory descriptor.
+  /// \param [in] src_c_iter Pointer to input recurrent cell state data.
+  /// \param [in] dst_c_iter Pointer to output recurrent cell state data.
+  /// \param [in] weight_size Size of weight memory.
+  /// \param [in] weight Pointer to weight data.
+  /// \param [in] scratchpad_size Size of scratchpad memory.
+  /// \param [in] scratchpad Pointer to scratchpad data.
+  /// \param [in] workspace_size Size of workspace memory.
+  /// \param [in] workspace Pointer to workspace data.
+  /// \returns An event representing the status of rnn forward operations.
+  sycl::event async_rnn_forward(const rnn_desc &desc, ::dnnl::prop_kind kind,
+                               const memory_desc_ext &src_desc, void *src,
+                               const memory_desc_ext &dst_desc, void *dst,
+                               const memory_desc_ext &iter_desc, void *src_iter,
+                               void *dst_iter,
+                               const memory_desc_ext &iter_c_desc,
+                               void *src_iter_c, void *dst_iter_c,
+                               size_t weight_size, void *weight,
+                               size_t scratchpad_size, void *scratchpad,
+                               size_t workspace_size, void *workspace);
+
+  /// Computing the data and weight gradient of a specified rnn function
+  /// asynchronously.
+  /// \param [in] desc RNN descriptor.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [in] dst Pointer to destination data.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] iter_desc Recurrent hidden state data memory descriptor.
+  /// \param [in] src_iter Pointer to input recurrent hidden state data.
+  /// \param [in] diff_dst_iter Pointer to differential output recurrent hidden state data.
+  /// \param [out] diff_src_iter Pointer to differential input recurrent hidden state data.
+  /// \param [in] iter_c_desc Recurrent cell state data memory descriptor.
+  /// \param [in] src_c_iter Pointer to input recurrent cell state data.
+  /// \param [in] diff_dst_c_iter Pointer to differential output recurrent cell state data.
+  /// \param [out] diff_src_c_iter Pointer to differential input recurrent cell state data.
+  /// \param [in] weight_size Size of weight memory.
+  /// \param [in] weight Pointer to weight data.
+  /// \param [out] diff_weight Pointer to differential weight data.
+  /// \param [in] scratchpad_size Size of scratchpad memory.
+  /// \param [in] scratchpad Pointer to scratchpad data.
+  /// \param [in] workspace_size Size of workspace memory.
+  /// \param [in] workspace Pointer to workspace data.
+  /// \returns An event representing the status of rnn backward operations.
+  sycl::event async_rnn_backward(
+      const rnn_desc &desc, const memory_desc_ext &dst_desc, void *dst,
+      void *diff_dst, const memory_desc_ext &src_desc, void *src,
+      void *diff_src, const memory_desc_ext &iter_desc, void *src_iter,
+      void *diff_dst_iter, void *diff_src_iter,
+      const memory_desc_ext &iter_c_desc, void *src_iter_c,
+      void *diff_dst_iter_c, void *diff_src_iter_c, size_t weight_size,
+      void *weight, void *diff_weight, size_t scratchpad_size, void *scratchpad,
+      size_t workspace_size, void *workspace);
+
+  /// Getting the required state size for specified dropout operation.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \returns Required size of state.
+  size_t get_dropout_state_size();
+
+  /// Getting the required workspace size for dropout operation.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \returns Required size of workspace.
+  static size_t get_dropout_workspace_size(const memory_desc_ext &src_desc);
+
+  /// Computing a specified dropout function value asynchronously.
+  /// \param [in] desc Dropout descriptor.
+  /// \param [in] src_desc Source memory descriptor.
+  /// \param [in] src Pointer to source data.
+  /// \param [in] dst_desc Destination memory descriptor.
+  /// \param [out] dst Pointer to destination data.
+  /// \param [in] workspace Pointer to workspace data.
+  /// \param [in] workspace_size Size of workspace memory.
+  /// \returns An event representing the dropout forward operations.
+  sycl::event async_dropout_forward(dropout_desc &desc,
+                                    const memory_desc_ext &src_desc, void *src,
+                                    const memory_desc_ext &dst_desc, void *dst,
+                                    void *workspace, size_t workspace_size);
+
+  /// Computing the gradient of a specified dropout function asynchronously.
+  /// \param [in] desc Dropout descriptor.
+  /// \param [in] diff_dst_desc Differential destination memory descriptor.
+  /// \param [in] diff_dst Pointer to differential destination data.
+  /// \param [in] diff_src_desc Differential source memory descriptor.
+  /// \param [out] diff_src Pointer to differential source data.
+  /// \param [in] workspace Pointer to workspace data.
+  /// \param [in] workspace_size Size of workspace memory.
+  /// \returns An event representing the dropout backward operations.
+  sycl::event async_dropout_backward(dropout_desc &desc,
+                                     const memory_desc_ext &diff_dst_desc,
+                                     void *diff_dst,
+                                     const memory_desc_ext &diff_src_desc,
+                                     void *diff_src, void *workspace,
+                                     size_t workspace_size);
+};
+
+inline thread_local unsigned int engine_ext::_engine_count;
+inline thread_local detail::primitive_cache engine_ext::_primitive_cache;
+inline thread_local std::map<void *, ::dnnl::memory> engine_ext::_workspace_map;
+inline thread_local std::map<sycl::queue *,
+                             std::shared_ptr<engine_ext::internal_resource>>
+    engine_ext::_internal_resource_cache;
+
+inline
+void dropout_desc::restore(engine_ext &engine, float p, void *state,
+                                  size_t state_size, unsigned long long seed) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) "
+                             "Interfaces Project does not support this API.");
+#else
+  if (state) {
+    std::int64_t required_state_size = engine.get_dropout_state_size();
+    if (state_size < required_state_size) {
+      throw std::runtime_error("restore: state_size less than required state size.");
+    }
+    sycl::queue *q = engine.get_queue();
+    _imp->_p = p;
+    _imp->_seed = seed;
+    _imp->_state = state;
+    _imp->_host_state = std::vector<std::uint8_t>(required_state_size);
+    q->memcpy(_imp->_host_state.data(), _imp->_state, required_state_size).wait();
+    _imp->_rng_engine =
+        oneapi::mkl::rng::load_state<rng_engine_t>(
+            *q, _imp->_host_state.data());
+  }
+#endif
+}
+
+inline
+void dropout_desc::set(engine_ext &engine, float p, void *state,
+                              size_t state_size, unsigned long long seed) {
+#ifndef __INTEL_MKL__
+    throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) "
+                             "Interfaces Project does not support this API.");
+#else
+  _imp->_p = p;
+  if (state) {
+    std::int64_t required_state_size = engine.get_dropout_state_size();
+    if (state_size < required_state_size) {
+      throw std::runtime_error("set: no sufficient memory to save states.");
+    }
+    sycl::queue *q = engine.get_queue();
+    _imp->_seed = seed;
+    _imp->_state = state;
+    _imp->_host_state = std::vector<std::uint8_t>(required_state_size);
+    _imp->_rng_engine = rng_engine_t(*q, seed);
+    oneapi::mkl::rng::save_state(_imp->_rng_engine, _imp->_host_state.data());
+    q->memcpy(_imp->_state, _imp->_host_state.data(), required_state_size).wait();
+  }
+#endif
+}
+
+inline
+::dnnl::memory::data_type
+memory_desc_ext::to_dnnl_data_type(dpct::library_data_t dt) {
+  using dnnl_dt = ::dnnl::memory::data_type;
+  switch (dt) {
+  case dpct::library_data_t::real_half:
+    return dnnl_dt::f16;
+  case dpct::library_data_t::real_bfloat16:
+    return dnnl_dt::bf16;
+  case dpct::library_data_t::real_float:
+    return dnnl_dt::f32;
+  case dpct::library_data_t::real_double:
+    return dnnl_dt::f64;
+  case dpct::library_data_t::real_int32:
+    return dnnl_dt::s32;
+  case dpct::library_data_t::real_int8:
+    return dnnl_dt::s8;
+  case dpct::library_data_t::real_uint8:
+    return dnnl_dt::u8;
+  case dpct::library_data_t::real_int8_4:
+    return dnnl_dt::s8;
+  case dpct::library_data_t::real_int8_32:
+    return dnnl_dt::s8;
+  case dpct::library_data_t::real_uint8_4:
+    return dnnl_dt::u8;
+  default:
+    throw std::runtime_error("to_dnnl_data_type: unsupported data type.");
+  }
+}
+
+inline
+dpct::library_data_t
+memory_desc_ext::to_dpct_library_data_t(::dnnl::memory::data_type dt,
+                                        unsigned block_size) {
+  using dpct_dt = dpct::library_data_t;
+  using dnnl_dt = ::dnnl::memory::data_type;
+  switch (dt) {
+  case dnnl_dt::f16:
+    return dpct_dt::real_half;
+  case dnnl_dt::bf16:
+    return dpct_dt::real_bfloat16;
+  case dnnl_dt::f32:
+    return dpct_dt::real_float;
+  case dnnl_dt::f64:
+    return dpct_dt::real_double;
+  case dnnl_dt::s32:
+    return dpct_dt::real_int32;
+  case dnnl_dt::s8:
+    if (block_size == 4) {
+      return dpct_dt::real_int8_4;
+    } else if (block_size == 32) {
+      return dpct_dt::real_int8_32;
+    } else {
+      return dpct_dt::real_int8;
+    }
+  case dnnl_dt::u8:
+    if (block_size == 4) {
+      return dpct_dt::real_uint8_4;
+    } else {
+      return dpct_dt::real_uint8;
+    }
+  default:
+    throw std::runtime_error("to_dpct_library_data_t: unsupported data type "
+                             "dnnl::memory::data_type::undef.");
+  }
+}
+
+inline
+::dnnl::memory::format_tag
+memory_desc_ext::to_dnnl_format_tag(dpct::library_data_t dt,
+                                    memory_format_tag tag) {
+  using dpct_dt = dpct::library_data_t;
+  using dpct_tag = memory_format_tag;
+  using dnnl_tag = ::dnnl::memory::format_tag;
+  switch (tag) {
+  case dpct_tag::nchw:
+    return dnnl_tag::nchw;
+  case dpct_tag::nhwc:
+    return dnnl_tag::nhwc;
+  default:
+    if (dt == dpct_dt::real_int8_32) {
+      return dnnl_tag::nChw32c;
+    } else {
+      return dnnl_tag::nChw4c;
+    }
+  }
+}
+
+inline
+void memory_desc_ext::set(memory_format_tag tag, dpct::library_data_t dt, int n,
+                          int c, int h, int w) {
+  _desc = ::dnnl::memory::desc({n, c, h, w}, to_dnnl_data_type(dt),
+                               to_dnnl_format_tag(dt, tag));
+}
+
+inline
+void memory_desc_ext::set(dpct::library_data_t dt, int n, int c, int h, int w,
+                          int n_stride, int c_stride, int h_stride,
+                          int w_stride) {
+  _desc = ::dnnl::memory::desc({n, c, h, w}, to_dnnl_data_type(dt),
+                               {n_stride, c_stride, h_stride, w_stride});
+}
+
+inline
+void memory_desc_ext::set(dpct::library_data_t dt, int ndims, const int dims[],
+                          const int strides[]) {
+  _desc = ::dnnl::memory::desc({dims, dims + ndims}, to_dnnl_data_type(dt),
+                               {strides, strides + ndims});
+}
+
+inline
+void memory_desc_ext::set(memory_format_tag tag, dpct::library_data_t dt,
+                          int ndims, const int dims[]) {
+  _desc = ::dnnl::memory::desc({dims, dims + ndims}, to_dnnl_data_type(dt),
+                               to_dnnl_format_tag(dt, tag));
+}
+
+inline
+void memory_desc_ext::set(rnn_memory_format_tag tag, dpct::library_data_t dt,
+                          int t, int n, int c) {
+  if (tag == rnn_memory_format_tag::tnc) {
+    _desc = ::dnnl::memory::desc({t, n, c}, to_dnnl_data_type(dt),
+                                 ::dnnl::memory::format_tag::tnc);
+  } else if(tag == rnn_memory_format_tag::ntc) {
+    _desc = ::dnnl::memory::desc({t, n, c}, to_dnnl_data_type(dt),
+                                 ::dnnl::memory::format_tag::ntc);
+  } else {
+    throw std::runtime_error("set: unsupported memory format tag.");
+  }
+}
+
+inline
+void memory_desc_ext::get(dpct::library_data_t *dt, int *n, int *c, int *h,
+                          int *w, int *n_stride, int *c_stride, int *h_stride,
+                          int *w_stride) const {
+  unsigned block_size = 1;
+  auto dims = _desc.get_dims();
+  auto inner_blks = _desc.get_inner_blks();
+  auto strides = _desc.get_strides();
+  if (!inner_blks.empty()) {
+    block_size = inner_blks[0];
+  }
+
+  *dt = to_dpct_library_data_t(_desc.get_data_type(), block_size);
+  *n = dims[0];
+  *c = dims[1];
+  *h = dims[2];
+  *w = dims[3];
+  *n_stride = strides[0] / block_size;
+  *c_stride = strides[1] / block_size;
+  *h_stride = strides[2] / block_size;
+  *w_stride = strides[3] / block_size;
+}
+
+inline
+void memory_desc_ext::get(dpct::library_data_t *dt, memory_format_tag *tag,
+                          int *n, int *c, int *h, int *w) const {
+  unsigned block_size = 1;
+  *tag = memory_format_tag::nchw;
+  auto dims = _desc.get_dims();
+  auto strides = _desc.get_strides();
+  auto inner_blks = _desc.get_inner_blks();
+  if (!inner_blks.empty()) {
+    block_size = inner_blks[0];
+    *tag = memory_format_tag::nchw_blocked;
+  }
+  if (strides[1] == 1 && dims[1] != 1) {
+    *tag = memory_format_tag::nhwc;
+  }
+  *dt = to_dpct_library_data_t(_desc.get_data_type(), block_size);
+  *n = dims[0];
+  *c = dims[1];
+  *h = dims[2];
+  *w = dims[3];
+}
+
+inline
+void memory_desc_ext::get(dpct::library_data_t *dt, rnn_memory_format_tag *tag,
+                          int *t, int *n, int *c) const {
+  auto dims = _desc.get_dims();
+  auto strides = _desc.get_strides();
+
+  if (strides[0] >= strides[1]) {
+    *tag = rnn_memory_format_tag::tnc;
+  } else {
+    *tag = rnn_memory_format_tag::ntc;
+  }
+
+  *dt = to_dpct_library_data_t(_desc.get_data_type(), 1);
+  *t = dims[0];
+  *n = dims[1];
+  *c = dims[2];
+}
+
+inline
+void memory_desc_ext::get(int requested_ndims, dpct::library_data_t *dt,
+                          int *ndims, int dims[], int strides[]) const {
+  unsigned block_size = 1;
+  auto inner_blks = _desc.get_inner_blks();
+  auto adims = _desc.get_dims();
+  auto astrides = _desc.get_strides();
+  if (!inner_blks.empty()) {
+    block_size = inner_blks[0];
+  }
+  *dt = to_dpct_library_data_t(_desc.get_data_type(), block_size);
+  *ndims = _desc.get_ndims();
+  for (int index = 0; index < requested_ndims; index++) {
+    dims[index] = adims[index];
+    strides[index] =
+        astrides[index] / block_size;
+  }
+}
+
+inline
+void memory_desc_ext::get(int requested_ndims, dpct::library_data_t *dt,
+                          memory_format_tag *tag, int *ndims,
+                          int dims[]) const {
+  unsigned block_size = 1;
+  *tag = memory_format_tag::nchw;
+  auto inner_blks = _desc.get_inner_blks();
+  auto adims = _desc.get_dims();
+  auto astrides = _desc.get_strides();
+  if (!inner_blks.empty()) {
+    block_size = inner_blks[0];
+    *tag = memory_format_tag::nchw_blocked;
+  }
+  if (astrides[1] == 1 &&
+      adims[1] != 1) {
+    *tag = memory_format_tag::nhwc;
+  }
+  *dt = to_dpct_library_data_t(_desc.get_data_type(), block_size);
+  *ndims = _desc.get_ndims();
+  for (int index = 0; index < requested_ndims; index++) {
+    dims[index] = adims[index];
+  }
+}
+
+inline
+void engine_ext::get_rnn_configuration(const ::dnnl::memory::desc &desc,
+                                       rnn_direction direction, rnn_mode mode,
+                                       dpct::library_data_t dt, int hidden_size,
+                                       ::dnnl::memory::data_type *dnnl_dt,
+                                       ::dnnl::memory::format_tag *tag,
+                                       int *projection_size, int *output_size,
+                                       int *seq_length, int *batch_size,
+                                       int *direction_num, int *gate_num) {
+  if (!desc.is_zero()) {
+    auto dims = desc.get_dims();
+    auto strides = desc.get_strides();
+    if (strides[0] >= strides[1]) {
+      *tag = ::dnnl::memory::format_tag::tnc;
+      *seq_length = dims[0];
+      *batch_size = dims[1];
+    } else {
+      *tag = ::dnnl::memory::format_tag::ntc;
+      *seq_length = dims[1];
+      *batch_size = dims[0];
+    }
+  }
+  if (direction == rnn_direction::bidirectional) {
+    *direction_num = 2;
+  } else {
+    *direction_num = 1;
+  }
+  if (mode == rnn_mode::lstm) {
+    *gate_num = 4;
+  } else if (mode == rnn_mode::gru) {
+    *gate_num = 3;
+  } else {
+    *gate_num = 1;
+  }
+  if (*projection_size != hidden_size) {
+    *output_size = *projection_size;
+  } else {
+    *projection_size = 0;
+    *output_size = hidden_size;
+  }
+  *dnnl_dt = memory_desc_ext::to_dnnl_data_type(dt);
+}
+
+inline
+void *engine_ext::allocate(const memory_desc_ext &data_desc, int count) {
+  return allocate(data_desc.get_size() * count);
+}
+
+inline
+void *engine_ext::allocate(size_t size) {
+  auto &Info = get_internal_resource(_q)->binfo;
+  uint8_t *result = Info.buffer + Info.usage;
+  Info.usage += size;
+  return result;
+}
+
+inline
+void engine_ext::transform_no_zero(const memory_desc_ext &desc, void *src, void *dst) {
+  ::dnnl::memory::data_type dt = desc.get_desc().get_data_type();
+  size_t element_num = desc.get_element_num();
+  switch (dt) {
+  case ::dnnl::memory::data_type::f32:
+    transform_no_zero_with_type<float>(_q, src, dst, element_num);
+    break;
+  case ::dnnl::memory::data_type::f16:
+    transform_no_zero_with_type<sycl::half>(_q, src, dst, element_num);
+    break;
+  case ::dnnl::memory::data_type::s32:
+    transform_no_zero_with_type<int32_t>(_q, src, dst, element_num);
+    break;
+  case ::dnnl::memory::data_type::s8:
+    transform_no_zero_with_type<int8_t>(_q, src, dst, element_num);
+    break;
+  case ::dnnl::memory::data_type::u8:
+    transform_no_zero_with_type<uint8_t>(_q, src, dst, element_num);
+    break;
+  default:
+    throw std::runtime_error("transform_no_zero: unsupported data type.");
+  }
+}
+
+inline
+::dnnl::memory::desc
+engine_ext::get_group_weight_desc(int group_count,
+                                  const memory_desc_ext &weight_desc) {
+  if (group_count == 1) {
+    return weight_desc.get_desc();
+  }
+  auto help_weight_desc = weight_desc.get_desc();
+  int ndims = help_weight_desc.get_ndims();
+  if (!help_weight_desc.get_inner_blks().empty()) {
+    throw std::runtime_error("get_group_weight_desc: group convolution with "
+                             "blocked weight memory unimplemented.");
+  }
+  std::vector<int64_t> new_size;
+  auto old_size = weight_desc.get_dims();
+  new_size.push_back(group_count);
+  new_size.push_back(old_size[0] / group_count);
+  for (int index = 1; index < old_size.size(); index++) {
+    new_size.push_back(old_size[index]);
+  }
+  std::vector<int64_t> strides = help_weight_desc.get_strides();
+  ::dnnl::memory::format_tag tag;
+  bool is_nhwc = (strides[1] == 1 && old_size[1] != 1);
+
+  if (ndims == 4) {
+    if (is_nhwc) {
+      tag = ::dnnl::memory::format_tag::gohwi;
+    } else {
+      tag = ::dnnl::memory::format_tag::goihw;
+    }
+  } else if (ndims == 5) {
+    if (is_nhwc) {
+      tag = ::dnnl::memory::format_tag::godhwi;
+    } else {
+      tag = ::dnnl::memory::format_tag::goidhw;
+    }
+  }
+
+  help_weight_desc =
+      ::dnnl::memory::desc(new_size, weight_desc.get_desc().get_data_type(), tag);
+  return help_weight_desc;
+}
+
+inline
+::dnnl::memory::desc engine_ext::compress_spatial_dimensions_to_channel(
+    const ::dnnl::memory::desc &desc) {
+  int ndims = desc.get_ndims();
+  auto dims = desc.get_dims();
+  auto inner_blks = desc.get_inner_blks();
+  assert(ndims >= 4 && "ndims is at least 4.");
+  std::vector<int64_t> compressed_dims(ndims);
+  compressed_dims[0] = dims[0];
+  compressed_dims[1] = dims[1];
+  for (int index = 2; index < ndims; index++) {
+    compressed_dims[1] = compressed_dims[1] * dims[index];
+    compressed_dims[index] = 1;
+  }
+  if (!inner_blks.empty() && inner_blks[0] == 4) {
+    return ::dnnl::memory::desc(compressed_dims, desc.get_data_type(),
+                                ::dnnl::memory::format_tag::nChw4c);
+  } else if (!inner_blks.empty() && inner_blks[0] == 32) {
+    return ::dnnl::memory::desc(compressed_dims, desc.get_data_type(),
+                                ::dnnl::memory::format_tag::nChw32c);
+  }
+  std::vector<int64_t> strides(ndims, 1);
+  strides[0] = compressed_dims[1];
+
+  return ::dnnl::memory::desc(compressed_dims, desc.get_data_type(), strides);
+}
+
+inline
+::dnnl::memory::desc
+engine_ext::get_bn_scale_bias_mean_var_desc(const ::dnnl::memory::desc &desc,
+                                            batch_normalization_mode mode) {
+  int ndims = desc.get_ndims();
+  auto dims = desc.get_dims();
+  assert(ndims >= 4 && "ndims is at least 4.");
+  int channel_num = 1;
+  if (mode == batch_normalization_mode::spatial) {
+    channel_num = dims[1];
+  } else {
+    for (int index = 1; index < ndims; index++) {
+      channel_num = channel_num * dims[index];
+    }
+  }
+  return ::dnnl::memory::desc({channel_num}, desc.get_data_type(),
+                              ::dnnl::memory::format_tag::a);
+}
+
+inline
+::dnnl::memory::desc engine_ext::transfer_memory_desc_to_channel_major_format(
+    const ::dnnl::memory::desc &desc) {
+  if (!desc.get_inner_blks().empty()) {
+    return desc;
+  }
+  int ndims = desc.get_ndims();
+  auto dims = desc.get_dims();
+  if (ndims == 4) {
+    return ::dnnl::memory::desc(dims, desc.get_data_type(),
+                                ::dnnl::memory::format_tag::nchw);
+  }
+  return ::dnnl::memory::desc(dims, desc.get_data_type(),
+                              ::dnnl::memory::format_tag::ncdhw);
+}
+
+/// If the alpha = 0 and beta = 1, then the destination (dst = alpha * out +
+/// beta * prior_dst) have no change. In this case this function returns true
+/// means the operation can exit directly.
+inline
+bool engine_ext::scale_parameter_preprocess(
+    const std::vector<output_argument_info> &args) {
+  bool direct_exit = true;
+  for (auto &arg : args) {
+    if (arg._alpha == 0.f) {
+      if (arg._beta != 1.f) {
+        async_scale(arg._beta, arg._desc, arg._data);
+      }
+    } else {
+      direct_exit = false;
+    }
+  }
+  return direct_exit;
+}
+
+inline
+void engine_ext::derive_batch_normalization_memory_desc(
+    memory_desc_ext &scale_bias_desc, memory_desc_ext &mean_var_desc,
+    const memory_desc_ext &src_desc, batch_normalization_mode mode) {
+    derive_batch_normalization_memory_desc(scale_bias_desc, src_desc, mode);
+    derive_batch_normalization_memory_desc(mean_var_desc, src_desc, mode);
+}
+
+inline
+void engine_ext::derive_batch_normalization_memory_desc(
+    memory_desc_ext &desc, const memory_desc_ext &src_desc,
+    batch_normalization_mode mode) {
+  int src_ndims = src_desc.get_desc().get_ndims();
+  auto inner_blks = src_desc.get_desc().get_inner_blks();
+  if (src_desc.get_desc().get_ndims() != 4 ||
+      src_desc.get_desc().get_ndims() != 5) {
+    throw std::runtime_error("derive_batch_normalization_memory_desc: only 4d "
+                             "and 5d memory descriptor supported.");
+  }
+  std::vector<int64_t> dims = src_desc.get_dims();
+  dims[0] = 1;
+  if (mode == batch_normalization_mode::spatial) {
+    dims[2] = 1;
+    dims[3] = 1;
+    if (src_ndims == 5) {
+      dims[4] = 1;
+    }
+  }
+  auto data_type = src_desc.get_desc().get_data_type();
+  if (data_type == ::dnnl::memory::data_type::f16) {
+    data_type = ::dnnl::memory::data_type::f32;
+  }
+  if (!inner_blks.empty() && inner_blks[0] == 4) {
+    desc.set_desc(::dnnl::memory::desc(dims, data_type,
+                                       ::dnnl::memory::format_tag::nChw4c));
+  } else if (!inner_blks.empty() && inner_blks[0] == 32) {
+    desc.set_desc(::dnnl::memory::desc(dims, data_type,
+                                       ::dnnl::memory::format_tag::nChw32c));
+  } else {
+    if (src_ndims == 4) {
+      desc.set_desc(::dnnl::memory::desc(dims, data_type,
+                                         ::dnnl::memory::format_tag::nchw));
+    } else {
+      desc.set_desc(::dnnl::memory::desc(dims, data_type,
+                                         ::dnnl::memory::format_tag::ncdhw));
+    }
+  }
+}
+
+template <typename primitive_type>
+sycl::event engine_ext::execute_primitive(
+    const std::pair<detail::primitive_cache_key_type, detail::primitive_and_args>
+        &primitive,
+    const std::vector<output_argument_info> &output_args) {
+  std::vector<void *> caches;
+  int output_arg_num = output_args.size();
+  for (int i = 0; i < output_arg_num; i++) {
+    if (output_args[i]._beta != 0.f) {
+      auto cache = allocate(output_args[i]._desc);
+      caches.push_back(cache);
+      (*primitive.second.args)[output_args[i]._name].set_data_handle(cache);
+    }
+  }
+
+  auto e = ::dnnl::sycl_interop::execute(
+      *(static_cast<primitive_type *>(primitive.second.primitive)), *_s,
+      *primitive.second.args);
+  _primitive_cache.put(
+      primitive.first, primitive.second.primitive, primitive.second.args,
+      [](::dnnl::primitive *p) { delete static_cast<primitive_type *>(p); }, e,
+      _q);
+  int cache_index = 0;
+  for (int i = 0; i < output_arg_num; i++) {
+    if (output_args[i]._beta != 0.f) {
+      e = async_sum(output_args[i]._alpha, output_args[i]._desc,
+                    caches[cache_index++], output_args[i]._beta,
+                    output_args[i]._desc, output_args[i]._data);
+    } else {
+      if (output_args[i]._alpha != 1.f) {
+        e = async_scale(output_args[i]._alpha, output_args[i]._desc,
+                        output_args[i]._data);
+      }
+    }
+  }
+  return e;
+}
+
+inline
+::dnnl::memory::desc engine_ext::bn_reorder_memory_to_channel_major_format(
+    bool is_input, ::dnnl::memory::desc &desc, void *src, void **cache) {
+  ::dnnl::memory::desc result;
+  result = transfer_memory_desc_to_channel_major_format(desc);
+  if ((result != desc) || !src) {
+    *cache = allocate(desc);
+    if (is_input && src) {
+      async_reorder(1.f, desc, src, 0.f, result, *cache);
+    }
+  }
+  return result;
+}
+
+inline
+sycl::event engine_ext::batch_normalization_backward_internal(
+    batch_normalization_mode mode, float epsilon, float alpha_data,
+    const memory_desc_ext &src_desc, void *src,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta_data,
+    const memory_desc_ext &diff_src_desc, void *diff_src, float alpha_param,
+    const memory_desc_ext &diff_scale_bias_desc, void *scale, void *bias,
+    float beta_param, void *diff_scale, void *diff_bias,
+    const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var) {
+  if (scale_parameter_preprocess(
+          {{alpha_data, beta_data, diff_src_desc, diff_src},
+           {alpha_param, beta_param, diff_scale_bias_desc, diff_scale},
+           {alpha_param, beta_param, diff_scale_bias_desc, diff_bias}})) {
+    return sycl::event();
+  }
+
+  void *reordered_src = nullptr, *reordered_diff_dst = nullptr,
+       *reordered_diff_src = nullptr, *reordered_scale = nullptr,
+       *reordered_bias = nullptr, *reordered_diff_scale = nullptr,
+       *reordered_diff_bias = nullptr, *reordered_saved_mean = nullptr,
+       *reordered_saved_var = nullptr;
+
+  ::dnnl::memory::desc help_src_desc = src_desc.get_desc();
+  ::dnnl::memory::desc help_diff_dst_desc = diff_dst_desc.get_desc();
+  ::dnnl::memory::desc help_diff_src_desc = diff_src_desc.get_desc();
+  ::dnnl::memory::desc help_diff_scale_bias_desc =
+      diff_scale_bias_desc.get_desc();
+  ::dnnl::memory::desc help_mean_var_desc = mean_var_desc.get_desc();
+  ::dnnl::memory::desc actual_diff_src_desc = help_diff_src_desc;
+  ::dnnl::memory::desc actual_diff_scale_bias_desc = help_diff_scale_bias_desc;
+  enter_primitive(
+      help_diff_scale_bias_desc.get_size() * 14 + help_src_desc.get_size() * 2 +
+      help_diff_dst_desc.get_size() * 7 + help_diff_src_desc.get_size() * 5 +
+      help_mean_var_desc.get_size() * 13);
+  if (mode == batch_normalization_mode::per_activation) {
+    help_src_desc = bn_reorder_memory_to_channel_major_format(true, help_src_desc, src,
+                                                       &reordered_src);
+    help_diff_dst_desc = bn_reorder_memory_to_channel_major_format(
+        true, help_diff_dst_desc, diff_dst, &reordered_diff_dst);
+    help_diff_src_desc = bn_reorder_memory_to_channel_major_format(
+        false, help_diff_src_desc, diff_src, &reordered_diff_src);
+    actual_diff_src_desc = help_diff_src_desc;
+    help_diff_scale_bias_desc = bn_reorder_memory_to_channel_major_format(
+        true, help_diff_scale_bias_desc, scale, &reordered_scale);
+    actual_diff_scale_bias_desc = help_diff_scale_bias_desc;
+    if (bias) {
+      bn_reorder_memory_to_channel_major_format(true, help_diff_scale_bias_desc, bias,
+                                         &reordered_bias);
+    }
+    bn_reorder_memory_to_channel_major_format(false, help_diff_scale_bias_desc,
+                                       diff_scale, &reordered_diff_scale);
+    bn_reorder_memory_to_channel_major_format(false, help_diff_scale_bias_desc,
+                                       diff_bias, &reordered_diff_bias);
+
+    help_mean_var_desc = bn_reorder_memory_to_channel_major_format(
+        true, help_mean_var_desc, saved_mean, &reordered_saved_mean);
+    bn_reorder_memory_to_channel_major_format(true, help_mean_var_desc, saved_var,
+                                       &reordered_saved_var);
+    help_src_desc = compress_spatial_dimensions_to_channel(help_src_desc);
+    help_diff_src_desc =
+        compress_spatial_dimensions_to_channel(help_diff_src_desc);
+    help_diff_dst_desc =
+        compress_spatial_dimensions_to_channel(help_diff_dst_desc);
+  } else {
+    if ((help_src_desc != help_diff_dst_desc) ||
+        (help_src_desc != help_diff_src_desc) ||
+        (help_diff_dst_desc != help_diff_src_desc)) {
+      help_src_desc = bn_reorder_memory_to_channel_major_format(
+          true, help_src_desc, src, &reordered_src);
+      help_diff_dst_desc = bn_reorder_memory_to_channel_major_format(
+          true, help_diff_dst_desc, diff_dst, &reordered_diff_dst);
+      help_diff_src_desc = bn_reorder_memory_to_channel_major_format(
+          false, help_diff_src_desc, diff_src, &reordered_diff_src);
+      actual_diff_src_desc = help_diff_src_desc;
+    }
+  }
+
+  help_diff_scale_bias_desc =
+      get_bn_scale_bias_mean_var_desc(help_diff_scale_bias_desc, mode);
+  help_mean_var_desc =
+      get_bn_scale_bias_mean_var_desc(help_mean_var_desc, mode);
+
+  auto forward_primitive =
+      create_primitive_desc<::dnnl::batch_normalization_forward>(
+          ::dnnl::prop_kind::forward_training, help_src_desc,
+          help_diff_dst_desc, epsilon,
+          ::dnnl::normalization_flags::use_scale |
+              ::dnnl::normalization_flags::use_shift);
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::batch_normalization_backward>(
+          ::dnnl::prop_kind::backward, help_diff_src_desc, help_diff_dst_desc,
+          help_src_desc, epsilon,
+          ::dnnl::normalization_flags::use_scale |
+              ::dnnl::normalization_flags::use_shift, forward_primitive);
+
+  void *dst_cache = nullptr;
+  if (!saved_mean && !saved_var) {
+    dst_cache = allocate(diff_dst_desc);
+    if (!reordered_saved_mean) {
+      reordered_saved_mean = allocate(mean_var_desc);
+    }
+    if (!reordered_saved_var) {
+      reordered_saved_var = allocate(mean_var_desc);
+    }
+    if (!bias) {
+      _q->fill(reordered_bias, 0, diff_scale_bias_desc.get_size());
+    }
+
+    batch_normalization_forward_internal(
+        true, mode, epsilon, 0.f, 1.f, src_desc, src, 0.f, diff_dst_desc,
+        dst_cache, diff_scale_bias_desc, scale, bias ? bias : reordered_bias,
+        mean_var_desc, reordered_saved_mean, reordered_saved_var, nullptr,
+        nullptr);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, help_src_desc,
+             reordered_src ? reordered_src : src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SCALE,
+             help_diff_scale_bias_desc,
+             reordered_scale ? reordered_scale : scale);
+  insert_arg(primitive_args.second.args, DNNL_ARG_MEAN, help_mean_var_desc,
+             reordered_saved_mean ? reordered_saved_mean : saved_mean);
+  insert_arg(primitive_args.second.args, DNNL_ARG_VARIANCE, help_mean_var_desc,
+             reordered_saved_var ? reordered_saved_var : saved_var);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST, help_diff_src_desc,
+             reordered_diff_dst ? reordered_diff_dst : diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC, help_diff_src_desc,
+             reordered_diff_src ? reordered_diff_src : diff_src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SCALE,
+             help_diff_scale_bias_desc,
+             reordered_diff_scale ? reordered_diff_scale : diff_scale);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SHIFT,
+             help_diff_scale_bias_desc,
+             reordered_diff_bias ? reordered_diff_bias : diff_bias);
+
+  sycl::event e = execute_primitive<::dnnl::batch_normalization_backward>(
+      primitive_args,
+      {{alpha_data, beta_data, DNNL_ARG_DIFF_SRC, help_diff_src_desc,
+        reordered_diff_src ? reordered_diff_src : diff_src},
+       {alpha_param, beta_param, DNNL_ARG_DIFF_SCALE, help_diff_scale_bias_desc,
+        reordered_diff_scale ? reordered_diff_scale : diff_scale},
+       {alpha_param, beta_param, DNNL_ARG_DIFF_SHIFT, help_diff_scale_bias_desc,
+        reordered_diff_bias ? reordered_diff_bias : diff_bias}});
+  if (actual_diff_src_desc != diff_src_desc.get_desc() && reordered_diff_src) {
+    e = async_reorder(1.f, actual_diff_src_desc, reordered_diff_src, 0.f,
+                diff_src_desc, diff_src);
+  }
+  if (actual_diff_scale_bias_desc != diff_scale_bias_desc.get_desc() &&
+      reordered_diff_scale && reordered_diff_bias) {
+    async_reorder(1.f, actual_diff_scale_bias_desc, reordered_diff_scale, 0.f,
+            diff_scale_bias_desc, diff_scale);
+    e = async_reorder(1.f, actual_diff_scale_bias_desc, reordered_diff_bias, 0.f,
+                diff_scale_bias_desc, diff_bias);
+  }
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::batch_normalization_forward_internal(
+    bool is_infer, batch_normalization_mode mode, float epsilon, float factor,
+    float alpha, const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+    const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var,
+    void *running_mean, void *running_var) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  enter_primitive(src_desc.get_size() + 5 * dst_desc.get_size() +
+                  scale_bias_desc.get_size() * 2 +
+                  mean_var_desc.get_size() * 9);
+  void *reordered_src = nullptr, *reordered_dst = nullptr,
+       *reordered_scale = nullptr, *reordered_bias = nullptr,
+       *reordered_saved_mean = nullptr, *reordered_saved_var = nullptr;
+  ::dnnl::memory::desc help_src_desc = src_desc.get_desc();
+  ::dnnl::memory::desc help_dst_desc = dst_desc.get_desc();
+  ::dnnl::memory::desc help_scale_bias_desc = scale_bias_desc.get_desc();
+  ::dnnl::memory::desc help_mean_var_desc = mean_var_desc.get_desc();
+  ::dnnl::memory::desc actual_dst_desc = help_dst_desc;
+  ::dnnl::memory::desc actual_mean_var_desc = help_mean_var_desc;
+
+  if (mode == batch_normalization_mode::per_activation) {
+    help_src_desc = bn_reorder_memory_to_channel_major_format(true, help_src_desc, src,
+                                                       &reordered_src);
+    help_dst_desc = bn_reorder_memory_to_channel_major_format(
+        false, help_dst_desc, dst, &reordered_dst);
+    actual_dst_desc = help_dst_desc;
+    help_scale_bias_desc = bn_reorder_memory_to_channel_major_format(
+        true, help_scale_bias_desc, scale, &reordered_scale);
+    bn_reorder_memory_to_channel_major_format(true, help_scale_bias_desc, bias,
+                                       &reordered_bias);
+    help_mean_var_desc = bn_reorder_memory_to_channel_major_format(
+        is_infer, help_mean_var_desc, saved_mean,
+        &reordered_saved_mean);
+    actual_mean_var_desc = help_mean_var_desc;
+    bn_reorder_memory_to_channel_major_format(is_infer,
+                                       help_mean_var_desc, saved_var,
+                                       &reordered_saved_var);
+    help_src_desc = compress_spatial_dimensions_to_channel(help_src_desc);
+    help_dst_desc = compress_spatial_dimensions_to_channel(help_dst_desc);
+  } else {
+    if (help_src_desc != help_dst_desc) {
+      help_src_desc = bn_reorder_memory_to_channel_major_format(
+          true, help_src_desc, src, &reordered_src);
+      help_dst_desc = bn_reorder_memory_to_channel_major_format(
+          false, help_dst_desc, dst, &reordered_dst);
+      actual_dst_desc = help_dst_desc;
+    }
+  }
+  help_scale_bias_desc =
+      get_bn_scale_bias_mean_var_desc(help_scale_bias_desc, mode);
+  help_mean_var_desc =
+      get_bn_scale_bias_mean_var_desc(help_mean_var_desc, mode);
+
+  ::dnnl::prop_kind kind;
+  ::dnnl::normalization_flags flag = ::dnnl::normalization_flags::use_scale |
+                                     ::dnnl::normalization_flags::use_shift;
+  if (is_infer) {
+    kind = ::dnnl::prop_kind::forward_inference;
+    flag = ::dnnl::normalization_flags::use_global_stats | flag;
+  } else {
+    kind = ::dnnl::prop_kind::forward_training;
+  }
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::batch_normalization_forward>(
+          kind, help_src_desc, help_dst_desc, epsilon, flag);
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, help_src_desc,
+             reordered_src ? reordered_src : src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SCALE, help_scale_bias_desc,
+             reordered_scale ? reordered_scale : scale);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SHIFT, help_scale_bias_desc,
+             reordered_bias ? reordered_bias : bias);
+  insert_arg(primitive_args.second.args, DNNL_ARG_MEAN, help_mean_var_desc,
+             reordered_saved_mean ? reordered_saved_mean
+                                            : saved_mean);
+  insert_arg(primitive_args.second.args, DNNL_ARG_VARIANCE, help_mean_var_desc,
+             reordered_saved_var ? reordered_saved_var
+                                           : saved_var);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, help_dst_desc,
+             reordered_dst ? reordered_dst : dst);
+  sycl::event e = execute_primitive<::dnnl::batch_normalization_forward>(primitive_args,
+                                    {{alpha, beta, DNNL_ARG_DST, help_dst_desc,
+                                      reordered_dst ? reordered_dst : dst}});
+
+  if (!is_infer && running_var) {
+    auto src_ndim = src_desc.get_desc().get_ndims();
+    auto src_dims = src_desc.get_dims();
+    int element_num = src_dims[0];
+    if (mode == batch_normalization_mode::spatial) {
+      for (int index = 2; index < src_ndim; index++) {
+        element_num *= src_dims[index];
+      }
+    }
+    float unbias_factor = element_num / (element_num - 1.f);
+    async_scale(1.f - factor, mean_var_desc, running_var);
+    e = async_sum(factor * unbias_factor, mean_var_desc,
+            reordered_saved_var ? reordered_saved_var : saved_var,
+            1.f, mean_var_desc, running_var);
+  }
+  if (!is_infer && running_mean) {
+    e = async_sum(factor, mean_var_desc,
+            reordered_saved_mean ? reordered_saved_mean : saved_mean,
+            (1.f - factor), mean_var_desc, running_mean);
+  }
+  if (reordered_dst && (actual_dst_desc != dst_desc.get_desc())) {
+    e = async_reorder(1.f, actual_dst_desc, reordered_dst, 0.f, dst_desc, dst);
+  }
+  if (!is_infer && reordered_saved_mean && reordered_saved_var && saved_mean &&
+      saved_var && (actual_mean_var_desc != mean_var_desc.get_desc())) {
+    e = async_reorder(1.f, actual_mean_var_desc, reordered_saved_mean, 0.f,
+                mean_var_desc, saved_mean);
+    e = async_reorder(1.f, actual_mean_var_desc, reordered_saved_var, 0.f,
+                mean_var_desc, saved_var);
+  }
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::rnn_forward_internal(
+    const rnn_desc &desc, ::dnnl::prop_kind kind,
+    const memory_desc_ext &src_desc, void *src, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &iter_desc, void *src_iter, void *dst_iter,
+    const memory_desc_ext &iter_c_desc, void *src_iter_c, void *dst_iter_c,
+    size_t weight_size, void *weight, size_t workspace_size, void *workspace,
+    size_t scratchpad_size, void *scratchpad, bool is_get_execution_args,
+    size_t *weight_size_query, size_t *workspace_size_query,
+    size_t *scratchpad_size_query) {
+  ::dnnl::memory::data_type src_dt;
+  ::dnnl::memory::format_tag src_format_tag;
+  rnn_mode mode;
+  rnn_bias_mode bias_mode;
+  rnn_direction direction;
+  dpct::library_data_t dt;
+  int direction_num = 1, input_size = 0, hidden_size = 0, projection_size = 0,
+      layer_size = 0, gate_num = 1, output_size = 0, data_type_size = 0,
+      seq_length = 1, batch_size = 1;
+  std::vector<void *> data = {src,        dst,        src_iter, dst_iter,
+                              src_iter_c, dst_iter_c, weight,   workspace,
+                              scratchpad};
+  std::vector<int> offset(6, 0);
+  void *input_layer_cache = nullptr, *hidden_layer_cache = nullptr;
+  sycl::event e;
+  enter_primitive(src_desc.get_size() * 2);
+  desc.get(&mode, &bias_mode, &direction, &dt, &input_size, &hidden_size,
+           &projection_size, &layer_size);
+
+  get_rnn_configuration(src_desc.get_desc(), direction, mode, dt, hidden_size,
+                        &src_dt, &src_format_tag, &projection_size,
+                        &output_size, &seq_length, &batch_size, &direction_num,
+                        &gate_num);
+
+  if (direction == rnn_direction::bidirectional) {
+    // Here to combine the oneDNN bidirectional_sum and 
+    // bidirectional_concat config, so call execute_rnn_forward_primitive
+    // twice.
+    if (layer_size > 1) {
+      if (!is_get_execution_args) {
+        input_layer_cache = allocate(src_desc);
+        hidden_layer_cache = allocate(src_desc);
+        _q->memcpy(input_layer_cache, src, src_desc.get_size());
+      }
+      data[0] = input_layer_cache;
+      data[1] = hidden_layer_cache;
+      e = execute_rnn_forward_primitive(
+          mode, kind, ::dnnl::rnn_direction::bidirectional_sum, bias_mode,
+          src_dt, src_format_tag, seq_length, batch_size, output_size,
+          output_size, 1, direction_num, hidden_size, gate_num, projection_size,
+          data, offset, layer_size - 1, weight_size_query, workspace_size_query,
+          scratchpad_size_query);
+      data[0] =
+          ((layer_size - 1) % 2 == 0) ? input_layer_cache : hidden_layer_cache;
+      data[1] = dst;
+    }
+    e = execute_rnn_forward_primitive(
+        mode, kind, ::dnnl::rnn_direction::bidirectional_concat, bias_mode,
+        src_dt, src_format_tag, seq_length, batch_size, output_size,
+        2 * output_size, 1, direction_num, hidden_size, gate_num,
+        projection_size, data, offset, 1, weight_size_query,
+        workspace_size_query, scratchpad_size_query);
+  } else {
+    e = execute_rnn_forward_primitive(
+        mode, kind, ::dnnl::rnn_direction::unidirectional_left2right, bias_mode,
+        src_dt, src_format_tag, seq_length, batch_size, output_size,
+        output_size, layer_size, direction_num, hidden_size, gate_num,
+        projection_size, data, offset, 1, weight_size_query,
+        workspace_size_query, scratchpad_size_query);
+  }
+
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::execute_rnn_forward_primitive(
+    rnn_mode mode, ::dnnl::prop_kind kind, ::dnnl::rnn_direction direction,
+    rnn_bias_mode bias_mode, ::dnnl::memory::data_type dt,
+    ::dnnl::memory::format_tag tag, int seq_length, int batch_size, int src_c,
+    int dst_c, int layer_size, int direction_num, int hidden_size, int gate_num,
+    int projection_size, std::vector<void *> &data, std::vector<int> &offset,
+    int iter_num, size_t *weight_size, size_t *workspace_size,
+    size_t *scratchpad_size) {
+
+  sycl::event e;
+  ::dnnl::primitive *p = nullptr;
+  std::unordered_map<int, ::dnnl::memory> *args = nullptr;
+  detail::primitive_cache_key_type key;
+  std::unordered_map<int, ::dnnl::memory> *execution_args;
+  ::dnnl::memory::desc bias_desc(
+      {layer_size, direction_num, gate_num, hidden_size}, dt,
+      ::dnnl::memory::format_tag::ldgo);
+  ::dnnl::memory::desc weight_layer_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldigo);
+  ::dnnl::memory::desc weight_iter_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldigo);
+  ::dnnl::memory::desc projection_desc;
+  if (projection_size) {
+    projection_desc = ::dnnl::memory::desc(
+        {layer_size, direction_num, hidden_size, projection_size}, dt,
+        ::dnnl::memory::format_tag::ldio);
+  }
+
+  if (weight_size) {
+    *weight_size +=
+        (weight_layer_desc.get_size() + weight_iter_desc.get_size() +
+         projection_desc.get_size() + bias_desc.get_size()) *
+        iter_num;
+    return e;
+  }
+
+  ::dnnl::memory::desc src_desc({seq_length, batch_size, src_c}, dt, tag);
+  ::dnnl::memory::desc dst_desc({seq_length, batch_size, dst_c}, dt, tag);
+  ::dnnl::memory::desc iter_desc(
+      {layer_size, direction_num, batch_size,
+       projection_size ? projection_size : hidden_size},
+      dt, ::dnnl::memory::format_tag::ldnc);
+  ::dnnl::memory::desc iter_c_desc(
+      {layer_size, direction_num, batch_size, hidden_size}, dt,
+      ::dnnl::memory::format_tag::ldnc);
+
+  ::dnnl::memory::desc workspace_desc;
+  ::dnnl::memory::desc scratchpad_desc;
+  ::dnnl::primitive_attr attr;
+  attr.set_scratchpad_mode(::dnnl::scratchpad_mode::user);
+
+  if (mode == rnn_mode::vanilla_relu || mode == rnn_mode::vanilla_tanh) {
+    auto primitive = create_primitive_args_or_get<::dnnl::vanilla_rnn_forward>(
+        kind,
+        mode == rnn_mode::vanilla_relu ? ::dnnl::algorithm::eltwise_relu
+                                       : ::dnnl::algorithm::eltwise_tanh,
+        direction, src_desc, iter_desc, weight_layer_desc, weight_iter_desc,
+        bias_desc, dst_desc, iter_desc, attr);
+
+    auto pd = get_primitive_desc<::dnnl::vanilla_rnn_forward>(
+        primitive.second.primitive);
+
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    if (workspace_size && scratchpad_size) {
+      *workspace_size += workspace_desc.get_size() * iter_num;
+      *scratchpad_size = scratchpad_desc.get_size() > *scratchpad_size
+                             ? scratchpad_desc.get_size()
+                             : *scratchpad_size;
+    } else {
+      key = primitive.first;
+      p = primitive.second.primitive;
+      args = primitive.second.args;
+    }
+  } else if (mode == rnn_mode::gru) {
+    auto primitive = create_primitive_args_or_get<::dnnl::gru_forward>(
+        kind, direction, src_desc, iter_desc, weight_layer_desc,
+        weight_iter_desc, bias_desc, dst_desc, iter_desc, attr);
+
+    auto pd =
+        get_primitive_desc<::dnnl::gru_forward>(primitive.second.primitive);
+
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    if (workspace_size && scratchpad_size) {
+      *workspace_size += workspace_desc.get_size() * iter_num;
+      *scratchpad_size = scratchpad_desc.get_size() > *scratchpad_size
+                             ? scratchpad_desc.get_size()
+                             : *scratchpad_size;
+    } else {
+      key = primitive.first;
+      p = primitive.second.primitive;
+      args = primitive.second.args;
+    }
+  } else if (mode == rnn_mode::lstm) {
+    auto primitive = create_primitive_args_or_get<::dnnl::lstm_forward>(
+        kind, direction, src_desc, iter_desc, iter_c_desc, weight_layer_desc,
+        weight_iter_desc, ::dnnl::memory::desc(), projection_desc, bias_desc,
+        dst_desc, iter_desc, iter_c_desc, attr);
+
+    auto pd =
+        get_primitive_desc<::dnnl::lstm_forward>(primitive.second.primitive);
+
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    if (workspace_size && scratchpad_size) {
+      *workspace_size += workspace_desc.get_size() * iter_num;
+      *scratchpad_size = scratchpad_desc.get_size() > *scratchpad_size
+                             ? scratchpad_desc.get_size()
+                             : *scratchpad_size;
+    } else {
+      key = primitive.first;
+      p = primitive.second.primitive;
+      args = primitive.second.args;
+    }
+  }
+
+  for (int i = 0; i < iter_num; i++) {
+    void *in_cache = data[0], *out_cache = data[1], *dst_iter_c_cache = nullptr,
+         *dst_iter_cache = ((uint8_t *)(data[3]) + offset[1]);
+    if (mode == rnn_mode::lstm) {
+      dst_iter_c_cache = (uint8_t *)(data[4]) + offset[2];
+    }
+    if (!workspace_size) {
+      insert_arg(args, DNNL_ARG_SRC_LAYER, src_desc, data[0]);
+      insert_arg(args, DNNL_ARG_DST_LAYER, dst_desc, data[1]);
+      insert_arg(args, DNNL_ARG_SCRATCHPAD, scratchpad_desc, data[8]);
+      auto insert_rnn_arg = [&](int arg_name, ::dnnl::memory::desc &d, void *data,
+                             int &offset) {
+        insert_arg(args, arg_name, d, (uint8_t *)data + offset);
+        offset += d.get_size();
+      };
+      insert_rnn_arg(DNNL_ARG_SRC_ITER, iter_desc, data[2], offset[0]);
+      insert_rnn_arg(DNNL_ARG_DST_ITER, iter_desc, data[3], offset[1]);
+
+      if (mode == rnn_mode::lstm) {
+        insert_rnn_arg(DNNL_ARG_SRC_ITER_C, iter_c_desc, data[4], offset[2]);
+        insert_rnn_arg(DNNL_ARG_DST_ITER_C, iter_c_desc, data[5], offset[3]);
+      }
+      insert_rnn_arg(DNNL_ARG_WEIGHTS_LAYER, weight_layer_desc, data[6],
+                  offset[4]);
+      insert_rnn_arg(DNNL_ARG_WEIGHTS_ITER, weight_iter_desc, data[6], offset[4]);
+      if (projection_size) {
+        insert_rnn_arg(DNNL_ARG_WEIGHTS_PROJECTION, projection_desc, data[6],
+                    offset[4]);
+      }
+      if (bias_mode == rnn_bias_mode::none) {
+        _q->memset((uint8_t *)(data[6]) + offset[4], 0, bias_desc.get_size());
+      }
+      insert_rnn_arg(DNNL_ARG_BIAS, bias_desc, data[6], offset[4]);
+      if (kind == ::dnnl::prop_kind::forward_training) {
+        insert_rnn_arg(DNNL_ARG_WORKSPACE, workspace_desc, data[7], offset[5]);
+      }
+      if (mode == rnn_mode::vanilla_relu || mode == rnn_mode::vanilla_tanh) {
+        execute_primitive<::dnnl::vanilla_rnn_forward>(
+            {key, {static_cast<::dnnl::vanilla_rnn_forward *>(p), args}});
+      } else if (mode == rnn_mode::gru) {
+        execute_primitive<::dnnl::gru_forward>(
+            {key, {static_cast<::dnnl::gru_forward *>(p), args}});
+      } else if (mode == rnn_mode::lstm) {
+        execute_primitive<::dnnl::lstm_forward>(
+            {key, {static_cast<::dnnl::lstm_forward *>(p), args}});
+      }
+      if (i != iter_num - 1) {
+        std::swap(data[0], data[1]);
+      }
+    }
+    if (kind == ::dnnl::prop_kind::forward_training) {
+      if (workspace_size) {
+        *workspace_size +=
+            (src_desc.get_size() + dst_desc.get_size() + iter_desc.get_size());
+        if (mode == rnn_mode::lstm) {
+          *workspace_size += iter_c_desc.get_size();
+        }
+      } else {
+        _q->memcpy((uint8_t *)(data[7]) + offset[5], in_cache,
+                   src_desc.get_size());
+        offset[5] += src_desc.get_size();
+        _q->memcpy((uint8_t *)(data[7]) + offset[5], out_cache,
+                   dst_desc.get_size());
+        offset[5] += dst_desc.get_size();
+        _q->memcpy((uint8_t *)(data[7]) + offset[5], dst_iter_cache,
+                   iter_desc.get_size());
+        offset[5] += iter_desc.get_size();
+        if (mode == rnn_mode::lstm) {
+          _q->memcpy((uint8_t *)(data[7]) + offset[5], dst_iter_c_cache,
+                     iter_c_desc.get_size());
+          offset[5] += iter_c_desc.get_size();
+        }
+      }
+    }
+  }
+  return e;
+}
+
+inline
+sycl::event engine_ext::execute_rnn_backward_primitive(
+    rnn_mode mode, ::dnnl::rnn_direction direction, rnn_bias_mode bias_mode,
+    ::dnnl::memory::data_type dt, ::dnnl::memory::format_tag tag,
+    int seq_length, int batch_size, int src_c, int dst_c, int layer_size,
+    int direction_num, int hidden_size, int gate_num, int projection_size,
+    std::vector<void *> &data, std::vector<int> &offset, int iter_num) {
+
+  sycl::event e;
+  ::dnnl::primitive *p = nullptr;
+  std::unordered_map<int, ::dnnl::memory> *args = nullptr;
+  detail::primitive_cache_key_type key;
+  ::dnnl::prop_kind fkind = ::dnnl::prop_kind::forward_training;
+  ::dnnl::prop_kind bkind = ::dnnl::prop_kind::backward;
+  ::dnnl::memory::desc bias_desc(
+      {layer_size, direction_num, gate_num, hidden_size}, dt,
+      ::dnnl::memory::format_tag::ldgo);
+  ::dnnl::memory::desc weight_layer_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldigo);
+  ::dnnl::memory::desc weight_iter_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldigo);
+  ::dnnl::memory::desc diff_weight_layer_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldgoi);
+  ::dnnl::memory::desc diff_weight_iter_desc(
+      {layer_size, direction_num,
+       projection_size ? projection_size : hidden_size, gate_num, hidden_size},
+      dt, ::dnnl::memory::format_tag::ldgoi);
+  ::dnnl::memory::desc projection_desc, diff_projection_desc;
+  if (projection_size) {
+    projection_desc = ::dnnl::memory::desc(
+        {layer_size, direction_num, hidden_size, projection_size}, dt,
+        ::dnnl::memory::format_tag::ldio);
+    diff_projection_desc = ::dnnl::memory::desc(
+        {layer_size, direction_num, hidden_size, projection_size}, dt,
+        ::dnnl::memory::format_tag::ldoi);
+  }
+
+  ::dnnl::memory::desc src_desc({seq_length, batch_size, src_c}, dt, tag);
+  ::dnnl::memory::desc dst_desc({seq_length, batch_size, dst_c}, dt, tag);
+  ::dnnl::memory::desc iter_desc(
+      {layer_size, direction_num, batch_size,
+       projection_size ? projection_size : hidden_size},
+      dt, ::dnnl::memory::format_tag::ldnc);
+  ::dnnl::memory::desc iter_c_desc(
+      {layer_size, direction_num, batch_size, hidden_size}, dt,
+      ::dnnl::memory::format_tag::ldnc);
+
+  ::dnnl::memory::desc workspace_desc;
+  ::dnnl::memory::desc scratchpad_desc;
+  ::dnnl::primitive_attr attr;
+  attr.set_scratchpad_mode(::dnnl::scratchpad_mode::user);
+
+  if (mode == rnn_mode::vanilla_relu || mode == rnn_mode::vanilla_tanh) {
+    auto fpd = create_primitive_desc<::dnnl::vanilla_rnn_forward>(
+        fkind,
+        mode == rnn_mode::vanilla_relu ? ::dnnl::algorithm::eltwise_relu
+                                       : ::dnnl::algorithm::eltwise_tanh,
+        direction, src_desc, iter_desc, weight_layer_desc, weight_iter_desc,
+        bias_desc, dst_desc, iter_desc, attr);
+    auto primitive = create_primitive_args_or_get<::dnnl::vanilla_rnn_backward>(
+        bkind,
+        mode == rnn_mode::vanilla_relu ? ::dnnl::algorithm::eltwise_relu
+                                       : ::dnnl::algorithm::eltwise_tanh,
+        direction, src_desc, iter_desc, diff_weight_layer_desc,
+        diff_weight_iter_desc, bias_desc, dst_desc, iter_desc, src_desc,
+        iter_desc, weight_layer_desc, weight_iter_desc, bias_desc, dst_desc,
+        iter_desc, fpd, attr);
+    auto pd = get_primitive_desc<::dnnl::vanilla_rnn_backward>(
+        primitive.second.primitive);
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    key = primitive.first;
+    p = primitive.second.primitive;
+    args = primitive.second.args;
+  } else if (mode == rnn_mode::gru) {
+    auto fpd = create_primitive_desc<::dnnl::gru_forward>(
+        fkind, direction, src_desc, iter_desc, weight_layer_desc,
+        weight_iter_desc, bias_desc, dst_desc, iter_desc, attr);
+    auto primitive = create_primitive_args_or_get<::dnnl::gru_backward>(
+        bkind, direction, src_desc, iter_desc, diff_weight_layer_desc,
+        diff_weight_iter_desc, bias_desc, dst_desc, iter_desc, src_desc,
+        iter_desc, weight_layer_desc, weight_iter_desc, bias_desc, dst_desc,
+        iter_desc, fpd, attr);
+    auto pd =
+        get_primitive_desc<::dnnl::gru_backward>(primitive.second.primitive);
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    key = primitive.first;
+    p = primitive.second.primitive;
+    args = primitive.second.args;
+  } else if (mode == rnn_mode::lstm) {
+    auto fpd = create_primitive_desc<::dnnl::lstm_forward>(
+        fkind, direction, src_desc, iter_desc, iter_c_desc, weight_layer_desc,
+        weight_iter_desc, ::dnnl::memory::desc(), projection_desc, bias_desc,
+        dst_desc, iter_desc, iter_c_desc, attr);
+    auto primitive = create_primitive_args_or_get<::dnnl::lstm_backward>(
+        bkind, direction, src_desc, iter_desc, iter_c_desc,
+        diff_weight_layer_desc, diff_weight_iter_desc, ::dnnl::memory::desc(),
+        diff_projection_desc, bias_desc, dst_desc, iter_desc, iter_c_desc,
+        src_desc, iter_desc, iter_c_desc, weight_layer_desc, weight_iter_desc,
+        ::dnnl::memory::desc(), projection_desc, bias_desc, dst_desc, iter_desc,
+        iter_c_desc, fpd, attr);
+    auto pd =
+        get_primitive_desc<::dnnl::lstm_backward>(primitive.second.primitive);
+    workspace_desc = pd.workspace_desc();
+    scratchpad_desc = pd.scratchpad_desc();
+    key = primitive.first;
+    p = primitive.second.primitive;
+    args = primitive.second.args;
+  }
+
+  for (int i = 0; i < iter_num; i++) {
+    insert_arg(args, DNNL_ARG_DIFF_SRC_LAYER, src_desc, data[8]);
+    insert_arg(args, DNNL_ARG_DIFF_DST_LAYER, dst_desc, data[9]);
+    insert_arg(args, DNNL_ARG_SCRATCHPAD, scratchpad_desc, data[15]);
+    auto insert_rnn_arg = [&](int arg_name, ::dnnl::memory::desc &d, void *data,
+                           int &offset) {
+      offset += d.get_size();
+      insert_arg(args, arg_name, d, (uint8_t *)data - offset);
+    };
+    if (mode == rnn_mode::lstm) {
+      insert_rnn_arg(DNNL_ARG_DST_ITER_C, iter_c_desc, data[7], offset[0]);
+      insert_rnn_arg(DNNL_ARG_SRC_ITER_C, iter_c_desc, data[4], offset[2]);
+    }
+    insert_rnn_arg(DNNL_ARG_DST_ITER, iter_desc, data[7], offset[0]);
+    insert_rnn_arg(DNNL_ARG_DST_LAYER, dst_desc, data[7], offset[0]);
+    insert_rnn_arg(DNNL_ARG_SRC_LAYER, src_desc, data[7], offset[0]);
+    insert_rnn_arg(DNNL_ARG_WORKSPACE, workspace_desc, data[7], offset[0]);
+    insert_rnn_arg(DNNL_ARG_SRC_ITER, iter_desc, data[2], offset[1]);
+    insert_rnn_arg(DNNL_ARG_BIAS, bias_desc, data[6], offset[3]);
+    if (projection_size) {
+      insert_rnn_arg(DNNL_ARG_WEIGHTS_PROJECTION, diff_projection_desc, data[6],
+                  offset[3]);
+    }
+    insert_rnn_arg(DNNL_ARG_WEIGHTS_ITER, diff_weight_iter_desc, data[6],
+                offset[3]);
+    insert_rnn_arg(DNNL_ARG_WEIGHTS_LAYER, diff_weight_layer_desc, data[6],
+                offset[3]);
+    insert_rnn_arg(DNNL_ARG_DIFF_SRC_ITER, iter_desc, data[10], offset[4]);
+    insert_rnn_arg(DNNL_ARG_DIFF_DST_ITER, iter_desc, data[11], offset[5]);
+    if (mode == rnn_mode::lstm) {
+      insert_rnn_arg(DNNL_ARG_DIFF_SRC_ITER_C, iter_c_desc, data[12], offset[6]);
+      insert_rnn_arg(DNNL_ARG_DIFF_DST_ITER_C, iter_c_desc, data[13], offset[7]);
+    }
+    insert_rnn_arg(DNNL_ARG_DIFF_BIAS, bias_desc, data[14], offset[8]);
+    if (bias_mode == rnn_bias_mode::none) {
+      _q->memset((uint8_t *)(data[14]) - offset[8], 0, bias_desc.get_size());
+    }
+    if (projection_size) {
+      insert_rnn_arg(DNNL_ARG_DIFF_WEIGHTS_PROJECTION, projection_desc, data[14],
+                  offset[8]);
+    }
+    insert_rnn_arg(DNNL_ARG_DIFF_WEIGHTS_ITER, weight_iter_desc, data[14],
+                offset[8]);
+    insert_rnn_arg(DNNL_ARG_DIFF_WEIGHTS_LAYER, weight_layer_desc, data[14],
+                offset[8]);
+    if (mode == rnn_mode::vanilla_relu || mode == rnn_mode::vanilla_tanh) {
+      e = execute_primitive<::dnnl::vanilla_rnn_backward>(
+          {key, {static_cast<::dnnl::vanilla_rnn_backward *>(p), args}});
+    } else if (mode == rnn_mode::gru) {
+      e = execute_primitive<::dnnl::gru_backward>(
+          {key, {static_cast<::dnnl::gru_backward *>(p), args}});
+    } else if (mode == rnn_mode::lstm) {
+      e = execute_primitive<::dnnl::lstm_backward>(
+          {key, {static_cast<::dnnl::lstm_backward *>(p), args}});
+    }
+    if (i != iter_num - 1) {
+      std::swap(data[8], data[9]);
+    }
+  }
+  return e;
+}
+
+#define EMPTY_CACHE_KEY(type)                                                  \
+  template <>                                                                  \
+  inline void engine_ext::generate_cache_key<type>(std::string & key_buffer,   \
+                                                   const type &arg) {}
+
+EMPTY_CACHE_KEY(::dnnl::engine)
+EMPTY_CACHE_KEY(::dnnl::convolution_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::eltwise_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::softmax_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::pooling_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::lrn_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::batch_normalization_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::vanilla_rnn_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::lstm_forward::primitive_desc)
+EMPTY_CACHE_KEY(::dnnl::gru_forward::primitive_desc)
+#undef EMPTY_CACHE_KEY
+
+template <>
+inline void engine_ext::generate_cache_key<std::vector<float>>(
+    std::string &key_buffer, const std::vector<float> &vec) {
+  key_buffer.append((char *)vec.data(), vec.size() * sizeof(float));
+}
+
+template <>
+inline void engine_ext::generate_cache_key<::dnnl::primitive_attr>(
+    std::string &key_buffer, const ::dnnl::primitive_attr &attr) {
+  if (!attr) {
+    return;
+  }
+  auto math_mode = (uint8_t)attr.get_fpmath_mode();
+  key_buffer.append((char *)&math_mode, sizeof(uint8_t));
+}
+
+template <>
+inline void engine_ext::generate_cache_key<::dnnl::memory::dims>(
+    std::string &key_buffer, const ::dnnl::memory::dims &dims) {
+  key_buffer.append((char *)dims.data(), dims.size() * sizeof(int64_t));
+}
+
+template <>
+inline void engine_ext::generate_cache_key<::dnnl::memory::desc>(
+    std::string &key_buffer, const ::dnnl::memory::desc &desc) {
+  uint8_t params[3] = {(uint8_t)desc.get_format_kind(),
+                       (uint8_t)desc.get_ndims(),
+                       (uint8_t)desc.get_data_type()};
+  generate_cache_key(key_buffer, desc.get_inner_blks());
+  generate_cache_key(key_buffer, desc.get_dims());
+  generate_cache_key(key_buffer, desc.get_strides());
+}
+
+template <typename T>
+void engine_ext::generate_cache_key(std::string &key_buffer, const T &arg) {
+  key_buffer.append((char *)&arg, sizeof(T));
+}
+
+template <typename T, typename... args_type>
+void engine_ext::generate_cache_key(std::string &key_buffer, const T &first_arg,
+                                    const args_type &...args) {
+  generate_cache_key(key_buffer, first_arg);
+  generate_cache_key(key_buffer, args...);
+}
+
+template <typename primitive_type, typename... args_type>
+std::pair<detail::primitive_cache_key_type, detail::primitive_and_args>
+engine_ext::create_primitive_args_or_get(args_type &&...args) {
+  std::string buffer;
+  buffer.reserve(512);
+  generate_cache_key(buffer, std::forward<args_type>(args)...);
+  buffer.append(std::to_string(_engine_id));
+  auto value = _primitive_cache.get(buffer);
+  primitive_type *p = nullptr;
+  std::unordered_map<int, ::dnnl::memory> *a = nullptr;
+  if (value) {
+    p = (primitive_type *)value->_primitive;
+    a = value->_args;
+  } else {
+    p = new primitive_type(create_primitive_desc<primitive_type>(
+        std::forward<args_type>(args)...));
+    a = new std::unordered_map<int, ::dnnl::memory>();
+  }
+  return {buffer, {p, a}};
+}
+
+template <typename primitive_type>
+typename primitive_type::primitive_desc
+engine_ext::get_primitive_desc(::dnnl::primitive *p) {
+  return typename primitive_type::primitive_desc(
+      const_cast<dnnl_primitive_desc_t>(p->get_primitive_desc()));
+}
+
+template <typename primitive_type, typename... args_type>
+typename primitive_type::primitive_desc
+engine_ext::create_primitive_desc(args_type &&...args) {
+  return typename primitive_type::primitive_desc(
+      *_eng, std::forward<args_type>(args)...);
+}
+
+inline
+void engine_ext::fill(const memory_desc_ext &src_desc, void *src,
+                      const void *valuePtr) {
+  async_fill(src_desc, src, valuePtr).wait();
+}
+
+inline
+void engine_ext::reorder(float alpha, const memory_desc_ext &src_desc,
+                         void *src, float beta, const memory_desc_ext &dst_desc,
+                         void *dst) {
+  async_reorder(alpha, src_desc, src, beta, dst_desc, dst).wait();
+}
+
+inline
+void engine_ext::scale(float alpha, const memory_desc_ext &src_desc,
+                       void *src) {
+  async_scale(alpha, src_desc, src).wait();
+}
+inline
+void engine_ext::sum(float alpha, const memory_desc_ext &src_desc, void *src,
+                     float beta, const memory_desc_ext &dst_desc, void *dst) {
+  async_sum(alpha, src_desc, src, beta, dst_desc, dst).wait();
+}
+inline
+void engine_ext::activation_forward(activation_desc &desc, float alpha,
+                                    const memory_desc_ext &src_desc, void *src,
+                                    float beta, const memory_desc_ext &dst_desc,
+                                    void *dst) {
+  async_activation_forward(desc, alpha, src_desc, src, beta, dst_desc, dst)
+      .wait();
+}
+inline
+void engine_ext::activation_backward(
+    activation_desc &desc, float alpha, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src) {
+  async_activation_backward(desc, alpha, dst_desc, dst, diff_dst_desc, diff_dst,
+                            src_desc, src, beta, diff_src_desc, diff_src)
+      .wait();
+}
+inline
+void engine_ext::pooling_forward(pooling_desc &desc, float alpha,
+                                 const memory_desc_ext &src_desc, void *src,
+                                 float beta, const memory_desc_ext &dst_desc,
+                                 void *dst,
+                                 ::dnnl::memory *workspace) {
+  async_pooling_forward(desc, alpha, src_desc, src, beta, dst_desc, dst,
+                        workspace).wait();
+}
+
+inline
+void engine_ext::pooling_backward(
+    pooling_desc &desc, float alpha, const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src,
+    ::dnnl::memory *workspace) {
+  async_pooling_backward(desc, alpha, dst_desc, dst, diff_dst_desc, diff_dst,
+                         src_desc, src, beta, diff_src_desc, diff_src,
+                         workspace)
+      .wait();
+}
+
+inline
+void engine_ext::softmax_forward(softmax_algorithm alg, softmax_mode mode,
+                                 float alpha, const memory_desc_ext &src_desc,
+                                 void *src, float beta,
+                                 const memory_desc_ext &dst_desc, void *dst) {
+  async_softmax_forward(alg, mode, alpha, src_desc, src, beta, dst_desc, dst)
+      .wait();
+}
+
+inline
+void engine_ext::softmax_backward(softmax_algorithm alg, softmax_mode mode,
+                                  float alpha, const memory_desc_ext &dst_desc,
+                                  void *dst,
+                                  const memory_desc_ext &diff_dst_desc,
+                                  void *diff_dst, float beta,
+                                  const memory_desc_ext &diff_src_desc,
+                                  void *diff_src) {
+  async_softmax_backward(alg, mode, alpha, dst_desc, dst, diff_dst_desc,
+                         diff_dst, beta, diff_src_desc, diff_src)
+      .wait();
+}
+
+inline
+void engine_ext::lrn_forward(lrn_desc &desc, float alpha,
+                             const memory_desc_ext &src_desc, void *src,
+                             float beta, const memory_desc_ext &dst_desc,
+                             void *dst, ::dnnl::memory *workspace) {
+  async_lrn_forward(desc, alpha, src_desc, src, beta, dst_desc, dst, workspace)
+      .wait();
+}
+
+inline
+void engine_ext::lrn_backward(lrn_desc &desc, float alpha,
+                              const memory_desc_ext &dst_desc, void *dst,
+                              const memory_desc_ext &diff_dst_desc,
+                              void *diff_dst, const memory_desc_ext &src_desc,
+                              void *src, float beta,
+                              const memory_desc_ext &diff_src_desc,
+                              void *diff_src,
+                              ::dnnl::memory *workspace) {
+  async_lrn_backward(desc, alpha, dst_desc, dst, diff_dst_desc, diff_dst,
+                     src_desc, src, beta, diff_src_desc, diff_src, workspace)
+      .wait();
+}
+
+inline
+sycl::event engine_ext::async_fill(const memory_desc_ext &src_desc, void *src,
+                             const void *valuePtr) {
+  ::dnnl::memory::data_type dt = src_desc.get_desc().get_data_type();
+  unsigned mem_size = src_desc.get_size();
+  switch (dt) {
+  case ::dnnl::memory::data_type::f32:
+    return fill_with_type<float>(_q, src, valuePtr, mem_size);
+  case ::dnnl::memory::data_type::f16:
+    return fill_with_type<sycl::half>(_q, src, valuePtr, mem_size);
+  case ::dnnl::memory::data_type::s32:
+    return fill_with_type<int32_t>(_q, src, valuePtr, mem_size);
+  case ::dnnl::memory::data_type::s8:
+    return fill_with_type<int8_t>(_q, src, valuePtr, mem_size);
+  case ::dnnl::memory::data_type::u8:
+    return fill_with_type<uint8_t>(_q, src, valuePtr, mem_size);
+  default:
+    throw std::runtime_error("async_fill: unsupported data type.");
+  }
+}
+
+inline
+sycl::event engine_ext::async_reorder(float alpha, const memory_desc_ext &src_desc,
+                                void *src, float beta,
+                                const memory_desc_ext &dst_desc, void *dst) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * dst_desc.get_size());
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::reorder>(
+      src_desc.get_desc(), *_eng, dst_desc.get_desc());
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  return exit_primitive(execute_primitive<::dnnl::reorder>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DST, dst_desc, dst}}));
+}
+
+inline
+sycl::event engine_ext::async_scale(float alpha, const memory_desc_ext &src_desc,
+                              void *src) {
+  if (alpha == 1.f) {
+    return sycl::event();
+  }
+  size_t cache_size = src_desc.get_size();
+  enter_primitive(cache_size);
+  void *src_cache = allocate(cache_size);
+  _q->memcpy(src_cache, src, cache_size);
+  auto primitive_args = create_primitive_args_or_get<::dnnl::eltwise_forward>(
+      ::dnnl::prop_kind::forward_inference, ::dnnl::algorithm::eltwise_linear,
+      src_desc.get_desc(), src_desc.get_desc(), alpha, 0.f);
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src_cache);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, src_desc.get_desc(),
+             src);
+
+  return exit_primitive(
+      execute_primitive<::dnnl::eltwise_forward>(primitive_args));
+}
+
+inline sycl::event
+engine_ext::async_sum(float alpha, const memory_desc_ext &src_desc, void *src,
+                      float beta, const memory_desc_ext &dst_desc, void *dst) {
+  if (alpha == 0.f && beta == 1.f) {
+    return sycl::event();
+  }
+  size_t cache_size = dst_desc.get_size();
+  enter_primitive(cache_size);
+  void *dst_cache = allocate(dst_desc);
+  _q->memcpy(dst_cache, dst, cache_size);
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::sum>(
+      std::vector<float>{alpha, beta},
+      std::vector<::dnnl::memory::desc>{src_desc.get_desc(),
+                                        dst_desc.get_desc()});
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_MULTIPLE_SRC,
+             src_desc.get_desc(), src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_MULTIPLE_SRC + 1,
+             dst_desc.get_desc(), dst_cache);
+
+  return exit_primitive(execute_primitive<::dnnl::sum>(primitive_args));
+}
+
+inline
+sycl::event engine_ext::async_binary(binary_op op, float alpha_0,
+                               const memory_desc_ext &src_desc_0, void *src_0,
+                               float alpha_1, const memory_desc_ext &src_desc_1,
+                               void *src_1, float beta,
+                               const memory_desc_ext &dst_desc, void *dst) {
+  ::dnnl::algorithm onednn_algorithm;
+  switch (op) {
+  case binary_op::max:
+    onednn_algorithm = ::dnnl::algorithm::binary_max;
+    break;
+  case binary_op::min:
+    onednn_algorithm = ::dnnl::algorithm::binary_min;
+    break;
+  case binary_op::add:
+    onednn_algorithm = ::dnnl::algorithm::binary_add;
+    break;
+  case binary_op::sub:
+    onednn_algorithm = ::dnnl::algorithm::binary_sub;
+    break;
+  case binary_op::mul:
+    onednn_algorithm = ::dnnl::algorithm::binary_mul;
+    break;
+  case binary_op::div:
+    onednn_algorithm = ::dnnl::algorithm::binary_div;
+    break;
+  case binary_op::sqrt:
+    onednn_algorithm = ::dnnl::algorithm::eltwise_sqrt;
+    break;
+  case binary_op::neg:
+    onednn_algorithm = ::dnnl::algorithm::eltwise_linear;
+    break;
+  }
+  size_t src0_cache_size = src_desc_0.get_size();
+  size_t src1_cache_size = src_desc_1.get_size();
+  size_t dst_cache_size = dst_desc.get_size();
+  enter_primitive(2 * src0_cache_size + 2 * src1_cache_size +
+                  5 * dst_cache_size);
+  if (onednn_algorithm == ::dnnl::algorithm::eltwise_sqrt ||
+      onednn_algorithm == ::dnnl::algorithm::eltwise_linear) {
+    void *src_cache = nullptr, *dst_cache = nullptr;
+    src_cache = allocate(src0_cache_size);
+    dst_cache = allocate(dst_cache_size);
+    _q->memcpy(src_cache, src_0, src0_cache_size);
+    _q->memcpy(dst_cache, dst, dst_cache_size);
+    async_scale(alpha_0, src_desc_0, src_cache);
+    async_scale(beta, dst_desc, dst_cache);
+
+    // Let the output = 1 - input to simulate the behavior of neg.
+    auto primitive_args = create_primitive_args_or_get<::dnnl::eltwise_forward>(
+        ::dnnl::prop_kind::forward_inference, onednn_algorithm,
+        src_desc_0.get_desc(), dst_desc.get_desc(), -1.f, 1.f);
+
+    insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc_0.get_desc(),
+               src_cache);
+    insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+               dst);
+
+    execute_primitive<::dnnl::eltwise_forward>(
+        primitive_args, {{1.f, 0.f, DNNL_ARG_DST, dst_desc, dst}});
+    return exit_primitive(
+        async_sum(1.f, dst_desc, dst_cache, 1.f, dst_desc, dst));
+  }
+
+  void *src_0_cache = nullptr, *src_1_cache = nullptr, *dst_cache = nullptr;
+
+  src_0_cache = allocate(src0_cache_size);
+  src_1_cache = allocate(src1_cache_size);
+  dst_cache = allocate(dst_cache_size);
+
+  _q->memcpy(src_0_cache, src_0, src0_cache_size);
+  _q->memcpy(src_1_cache, src_1, src1_cache_size);
+  _q->memcpy(dst_cache, dst, dst_cache_size);
+
+  async_scale(alpha_0, src_desc_0, src_0_cache);
+  async_scale(alpha_1, src_desc_1, src_1_cache);
+  async_scale(beta, dst_desc, dst_cache);
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::binary>(
+      onednn_algorithm, src_desc_0.get_desc(), src_desc_1.get_desc(),
+      dst_desc.get_desc());
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_0, src_desc_0.get_desc(),
+             src_0_cache);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_1, src_desc_1.get_desc(),
+             src_1_cache);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  execute_primitive<::dnnl::binary>(primitive_args,
+                                    {{1.f, 0.f, DNNL_ARG_DST, dst_desc, dst}});
+  return exit_primitive(
+      async_sum(1.f, dst_desc, dst_cache, 1.f, dst_desc, dst));
+}
+
+inline
+sycl::event engine_ext::async_reduction(reduction_op op, float alpha,
+                                  const memory_desc_ext &src_desc, void *src,
+                                  float beta, const memory_desc_ext &dst_desc,
+                                  void *dst) {
+  if (alpha == 0.f && beta == 1.f) {
+    return sycl::event();
+  }
+  size_t src_cache_size = src_desc.get_size();
+  size_t dst_cache_size = dst_desc.get_size();
+  enter_primitive(3 * src_cache_size + 2 * dst_cache_size);
+  float p = 2.f;
+  ::dnnl::algorithm onednn_algorithm;
+  void *cache = nullptr;
+  switch (op) {
+  case reduction_op::amax:
+    cache = allocate(src_cache_size);
+    activation_desc adesc;
+    adesc.set_algorithm(::dnnl::algorithm::eltwise_abs);
+    async_activation_forward(adesc, 1.f, src_desc, src, 0.f, src_desc, cache);
+    onednn_algorithm = ::dnnl::algorithm::reduction_max;
+    src = cache;
+    break;
+  case reduction_op::max:
+    onednn_algorithm = ::dnnl::algorithm::reduction_max;
+    break;
+  case reduction_op::min:
+    onednn_algorithm = ::dnnl::algorithm::reduction_min;
+    break;
+  case reduction_op::sum:
+    onednn_algorithm = ::dnnl::algorithm::reduction_sum;
+    break;
+  case reduction_op::mean:
+    onednn_algorithm = ::dnnl::algorithm::reduction_mean;
+    break;
+  case reduction_op::mul:
+    onednn_algorithm = ::dnnl::algorithm::reduction_mul;
+    break;
+  case reduction_op::mul_no_zeros:
+    cache = allocate(src_cache_size);
+    transform_no_zero(src_desc, src, cache);
+    onednn_algorithm = ::dnnl::algorithm::reduction_mul;
+    src = cache;
+    break;
+  case reduction_op::norm1:
+    p = 1.f;
+    onednn_algorithm = ::dnnl::algorithm::reduction_norm_lp_power_p_sum;
+    break;
+  case reduction_op::norm2:
+    onednn_algorithm = ::dnnl::algorithm::reduction_norm_lp_sum;
+    break;
+  }
+  auto primitive_args = create_primitive_args_or_get<::dnnl::reduction>(
+      onednn_algorithm, src_desc.get_desc(), dst_desc.get_desc(), p, 0.f);
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  return exit_primitive(execute_primitive<::dnnl::reduction>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DST, dst_desc, dst}}));
+}
+
+inline
+sycl::event engine_ext::async_activation_forward(activation_desc &desc, float alpha,
+                                           const memory_desc_ext &src_desc,
+                                           void *src, float beta,
+                                           const memory_desc_ext &dst_desc,
+                                           void *dst) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * dst_desc.get_size());
+  auto primitive_args = create_primitive_args_or_get<::dnnl::eltwise_forward>(
+      ::dnnl::prop_kind::forward, desc.get_algorithm(), src_desc.get_desc(),
+      dst_desc.get_desc(), desc.get_alpha(), desc.get_beta());
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  return exit_primitive(execute_primitive<::dnnl::eltwise_forward>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DST, dst_desc, dst}}));
+}
+
+inline
+sycl::event engine_ext::async_activation_backward(
+    activation_desc &desc, float alpha, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src) {
+
+  if (scale_parameter_preprocess({{alpha, beta, diff_src_desc, diff_src}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * diff_src_desc.get_size());
+  ::dnnl::memory::desc data_desc = dst_desc.get_desc();
+  auto alg = desc.get_algorithm();
+  if ((alg == ::dnnl::algorithm::eltwise_clip) ||
+      (alg == ::dnnl::algorithm::eltwise_linear) ||
+      (alg == ::dnnl::algorithm::eltwise_swish)) {
+    data_desc = src_desc.get_desc();
+  }
+  auto primitive_args = create_primitive_args_or_get<::dnnl::eltwise_backward>(
+      alg, diff_src_desc.get_desc(), diff_dst_desc.get_desc(), data_desc,
+      desc.get_alpha(), desc.get_beta(),
+      create_primitive_desc<::dnnl::eltwise_forward>(
+          ::dnnl::prop_kind::forward, alg, src_desc.get_desc(),
+          dst_desc.get_desc(), desc.get_alpha(), desc.get_beta()));
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST,
+             diff_dst_desc.get_desc(), diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC,
+             diff_src_desc.get_desc(), diff_src);
+
+  return exit_primitive(execute_primitive<::dnnl::eltwise_backward>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DIFF_SRC, diff_src_desc, diff_src}}));
+}
+
+inline
+sycl::event engine_ext::async_pooling_forward(pooling_desc &desc, float alpha,
+                                        const memory_desc_ext &src_desc,
+                                        void *src, float beta,
+                                        const memory_desc_ext &dst_desc,
+                                        void *dst, ::dnnl::memory *workspace) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * dst_desc.get_size());
+  int pooling_dim = desc.get_stride().size();
+  std::vector<int64_t> dilation(pooling_dim, 0);
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::pooling_forward>(
+          ::dnnl::prop_kind::forward_training, desc.get_algorithm(),
+          src_desc.get_desc(), dst_desc.get_desc(), desc.get_stride(),
+          desc.get_kernel(), dilation, desc.get_padding(), desc.get_padding());
+  auto pd = get_primitive_desc<::dnnl::pooling_forward>(
+      primitive_args.second.primitive);
+  ::dnnl::memory ws_mem(pd.workspace_desc(), *_eng);
+  if (workspace) {
+    *workspace = ws_mem;
+  } else {
+    insert_workspace(src, ws_mem);
+  }
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE, ws_mem);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  return exit_primitive(execute_primitive<::dnnl::pooling_forward>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DST, dst_desc, dst}}));
+}
+
+inline
+sycl::event engine_ext::async_pooling_backward(
+    pooling_desc &desc, float alpha, const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src,
+    ::dnnl::memory *workspace) {
+  if (scale_parameter_preprocess({{alpha, beta, diff_src_desc, diff_src}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * diff_src_desc.get_size());
+  int pooling_dim = desc.get_stride().size();
+  std::vector<int64_t> dilation(pooling_dim, 0);
+  auto primitive_args = create_primitive_args_or_get<::dnnl::pooling_backward>(
+      desc.get_algorithm(), diff_src_desc.get_desc(), diff_dst_desc.get_desc(),
+      desc.get_stride(), desc.get_kernel(), dilation, desc.get_padding(),
+      desc.get_padding(),
+      create_primitive_desc<::dnnl::pooling_forward>(
+          ::dnnl::prop_kind::forward_training, desc.get_algorithm(),
+          src_desc.get_desc(), dst_desc.get_desc(), desc.get_stride(),
+          desc.get_kernel(), dilation, desc.get_padding(), desc.get_padding()));
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST,
+             diff_dst_desc.get_desc(), diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC,
+             diff_src_desc.get_desc(), diff_src);
+
+  if (workspace) {
+    insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE, *workspace);
+  } else {
+    insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE,
+               get_workspace(src));
+  }
+
+  return exit_primitive(execute_primitive<::dnnl::pooling_backward>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DIFF_SRC, diff_src_desc, diff_src}}));
+}
+
+inline
+sycl::event engine_ext::async_softmax_forward(softmax_algorithm alg,
+                                        softmax_mode mode, float alpha,
+                                        const memory_desc_ext &src_desc,
+                                        void *src, float beta,
+                                        const memory_desc_ext &dst_desc,
+                                        void *dst) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+
+  ::dnnl::memory::desc help_src_desc = src_desc.get_desc();
+  ::dnnl::memory::desc help_dst_desc = dst_desc.get_desc();
+  if (mode == softmax_mode::instance) {
+    help_src_desc = compress_spatial_dimensions_to_channel(help_src_desc);
+    help_dst_desc = compress_spatial_dimensions_to_channel(help_dst_desc);
+  }
+  enter_primitive(2 * help_dst_desc.get_size());
+
+  ::dnnl::algorithm softmax_alg = ::dnnl::algorithm::softmax_accurate;
+  if (alg == softmax_algorithm::log) {
+    softmax_alg = ::dnnl::algorithm::softmax_log;
+  }
+  auto primitive_args = create_primitive_args_or_get<::dnnl::softmax_forward>(
+      ::dnnl::prop_kind::forward, softmax_alg, help_src_desc, 
+      help_dst_desc, 1);
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, help_dst_desc, dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, help_src_desc, src);
+
+  return exit_primitive(execute_primitive<::dnnl::softmax_forward>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DST, memory_desc_ext(help_dst_desc), dst}}));
+}
+
+inline
+sycl::event engine_ext::async_softmax_backward(
+    softmax_algorithm alg, softmax_mode mode, float alpha,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src) {
+  if (scale_parameter_preprocess({{alpha, beta, diff_src_desc, diff_src}})) {
+    return sycl::event();
+  }
+  ::dnnl::memory::desc help_diff_src_desc = diff_src_desc.get_desc();
+  ::dnnl::memory::desc help_dst_desc = dst_desc.get_desc();
+  ::dnnl::memory::desc help_diff_dst_desc = diff_dst_desc.get_desc();
+  if (mode == softmax_mode::instance) {
+    help_diff_src_desc =
+        compress_spatial_dimensions_to_channel(help_diff_src_desc);
+    help_dst_desc = compress_spatial_dimensions_to_channel(help_dst_desc);
+    help_diff_dst_desc =
+        compress_spatial_dimensions_to_channel(help_diff_dst_desc);
+  }
+  enter_primitive(2 * help_diff_src_desc.get_size());
+
+  ::dnnl::algorithm softmax_alg = ::dnnl::algorithm::softmax_accurate;
+  if (alg == softmax_algorithm::log) {
+    softmax_alg = ::dnnl::algorithm::softmax_log;
+  }
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::softmax_backward>(
+      softmax_alg, help_diff_src_desc, help_diff_dst_desc, help_dst_desc, 1,
+      create_primitive_desc<::dnnl::softmax_forward>(
+          ::dnnl::prop_kind::forward, softmax_alg, help_diff_src_desc,
+          help_dst_desc, 1));
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, help_dst_desc, dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST, help_diff_dst_desc,
+             diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC, help_diff_src_desc,
+             diff_src);
+
+  return exit_primitive(execute_primitive<::dnnl::softmax_backward>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DIFF_SRC,
+                        memory_desc_ext(help_diff_src_desc), diff_src}}));
+}
+
+inline
+sycl::event engine_ext::async_lrn_forward(lrn_desc &desc, float alpha,
+                                    const memory_desc_ext &src_desc, void *src,
+                                    float beta, const memory_desc_ext &dst_desc,
+                                    void *dst, ::dnnl::memory *workspace) {
+
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * dst_desc.get_size());
+  auto primitive_args = create_primitive_args_or_get<::dnnl::lrn_forward>(
+      ::dnnl::prop_kind::forward_training,
+      ::dnnl::algorithm::lrn_across_channels, src_desc.get_desc(),
+      dst_desc.get_desc(), desc.get_local_size(), desc.get_alpha(),
+      desc.get_beta(), desc.get_k());
+  auto pd =
+      get_primitive_desc<::dnnl::lrn_forward>(primitive_args.second.primitive);
+  ::dnnl::memory ws_mem(pd.workspace_desc(), *_eng);
+  if (workspace) {
+    *workspace = ws_mem;
+  } else {
+    insert_workspace(src, ws_mem);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE, ws_mem);
+
+  return exit_primitive(execute_primitive<::dnnl::lrn_forward>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DST, dst_desc, dst}}));
+}
+
+inline
+sycl::event
+engine_ext::async_lrn_backward(lrn_desc &desc, float alpha,
+                         const memory_desc_ext &dst_desc, void *dst,
+                         const memory_desc_ext &diff_dst_desc, void *diff_dst,
+                         const memory_desc_ext &src_desc, void *src, float beta,
+                         const memory_desc_ext &diff_src_desc, void *diff_src,
+                         ::dnnl::memory *workspace) {
+
+  if (scale_parameter_preprocess({{alpha, beta, diff_src_desc, diff_src}})) {
+    return sycl::event();
+  }
+  enter_primitive(2 * diff_src_desc.get_size());
+  auto primitive_args = create_primitive_args_or_get<::dnnl::lrn_backward>(
+      ::dnnl::algorithm::lrn_across_channels, diff_src_desc.get_desc(),
+      diff_dst_desc.get_desc(), src_desc.get_desc(), desc.get_local_size(),
+      desc.get_alpha(), desc.get_beta(), desc.get_k(),
+      create_primitive_desc<::dnnl::lrn_forward>(
+          ::dnnl::prop_kind::forward_training,
+          ::dnnl::algorithm::lrn_across_channels, src_desc.get_desc(),
+          dst_desc.get_desc(), desc.get_local_size(), desc.get_alpha(),
+          desc.get_beta(), desc.get_k()));
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST,
+             diff_dst_desc.get_desc(), diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC,
+             diff_src_desc.get_desc(), diff_src);
+
+  if (workspace) {
+    insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE, *workspace);
+  } else {
+    insert_arg(primitive_args.second.args, DNNL_ARG_WORKSPACE,
+               get_workspace(src));
+  }
+
+  return exit_primitive(execute_primitive<::dnnl::lrn_backward>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DIFF_SRC, diff_src_desc, diff_src}}));
+}
+
+inline
+size_t engine_ext::get_batch_normalization_workspace_size(
+    batch_normalization_ops ops, const memory_desc_ext &src_desc) {
+  if(ops == batch_normalization_ops::none) {
+    return 0;
+  }
+  return src_desc.get_size();
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_forward_inference(
+    batch_normalization_mode mode, float epsilon, float alpha,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+    void *mean, void *var) {
+
+  return batch_normalization_forward_internal(
+      true, mode, epsilon, 0.f, alpha, src_desc, src, beta, dst_desc, dst,
+      scale_bias_mean_var_desc, scale, bias, scale_bias_mean_var_desc, mean,
+      var, nullptr, nullptr);
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_forward_inference(
+    batch_normalization_mode mode, batch_normalization_ops ops,
+    activation_desc &adesc, float epsilon, float alpha,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &summand_desc, void *summand,
+    const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+    const memory_desc_ext &mean_var_desc, void *mean, void *var) {
+
+  bool has_post_op = (ops != batch_normalization_ops::none);
+  sycl::event e;
+  enter_primitive(src_desc.get_size() + dst_desc.get_size() * 4 +
+                  scale_bias_desc.get_size() * 2 +
+                  mean_var_desc.get_size() * 5);
+  if (has_post_op) {
+    void *dst_cache = allocate(dst_desc);
+    batch_normalization_forward_internal(
+        true, mode, epsilon, 0.f, 1.f, src_desc, src, 0.f, dst_desc, dst_cache,
+        scale_bias_desc, scale, bias, mean_var_desc, mean, var, nullptr,
+        nullptr);
+
+    if (ops == batch_normalization_ops::add_activation) {
+      async_sum(1.f, summand_desc, summand, 1.f, dst_desc, dst_cache);
+    }
+    async_activation_forward(adesc, 1.f, dst_desc, dst_cache, 0.f, dst_desc,
+                       dst_cache);
+    return exit_primitive(
+        async_sum(alpha, dst_desc, dst_cache, beta, dst_desc, dst));
+  }
+  return exit_primitive(batch_normalization_forward_internal(
+      true, mode, epsilon, 0.f, alpha, src_desc, src, beta, dst_desc, dst,
+      scale_bias_desc, scale, bias, mean_var_desc, mean, var, nullptr,
+      nullptr));
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_forward_training(
+    batch_normalization_mode mode, float epsilon, float factor, float alpha,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+    void *running_mean, void *running_var, void *saved_mean, void *saved_var) {
+  return batch_normalization_forward_internal(
+      false, mode, epsilon, factor, alpha, src_desc, src, beta, dst_desc, dst,
+      scale_bias_mean_var_desc, scale, bias, scale_bias_mean_var_desc,
+      saved_mean, saved_var, running_mean, running_var);
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_forward_training(
+    batch_normalization_mode mode, batch_normalization_ops ops,
+    activation_desc &adesc, float epsilon, float factor, float alpha,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &summand_desc, void *summand,
+    const memory_desc_ext &scale_bias_desc, void *scale, void *bias,
+    const memory_desc_ext &mean_var_desc, void *running_mean, void *running_var,
+    void *saved_mean, void *saved_var, size_t workspace_size,
+    void *workspace) {
+  enter_primitive(src_desc.get_size() + dst_desc.get_size() * 3 +
+                  mean_var_desc.get_size() * 5 +
+                  scale_bias_desc.get_size() * 2);
+  bool has_post_op = (ops != batch_normalization_ops::none);
+  sycl::event e;
+  if (has_post_op) {
+    if(workspace_size < dst_desc.get_desc().get_size()) {
+      throw std::runtime_error("async_batch_normalization_forward_training_ex: "
+        "no sufficient workspace.");
+    }
+    batch_normalization_forward_internal(
+        false, mode, epsilon, factor, 1.f, src_desc, src, 0.f, dst_desc,
+        workspace, scale_bias_desc, scale, bias, mean_var_desc,
+        saved_mean, saved_var, running_mean, running_var);
+    if (ops == batch_normalization_ops::add_activation) {
+      async_sum(1.f, summand_desc, summand, 1.f, dst_desc,
+          workspace);
+    }
+    return exit_primitive(async_activation_forward(
+        adesc, alpha, dst_desc, workspace, beta, dst_desc, dst));
+  }
+  return exit_primitive(batch_normalization_forward_internal(
+      false, mode, epsilon, factor, alpha, src_desc, src, beta, dst_desc, dst,
+      scale_bias_desc, scale, bias, mean_var_desc, saved_mean, saved_var,
+      running_mean, running_var));
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_forward_training(
+    batch_normalization_mode mode, batch_normalization_ops ops,
+    activation_desc &adesc, float epsilon, float factor, float alpha,
+    const memory_desc_ext &src_desc, void *src, float beta,
+    const memory_desc_ext &dst_desc, void *dst,
+    const memory_desc_ext &summand_desc, void *summand,
+    const memory_desc_ext &scale_bias_mean_var_desc, void *scale, void *bias,
+    void *running_mean, void *running_var, void *saved_mean, void *saved_var,
+    size_t workspace_size, void *workspace) {
+  return async_batch_normalization_forward_training(
+      mode, ops, adesc, epsilon, factor, alpha, src_desc, src, beta, dst_desc,
+      dst, summand_desc, summand, scale_bias_mean_var_desc, scale, bias,
+      scale_bias_mean_var_desc, running_mean, running_var, saved_mean,
+      saved_var, workspace_size, workspace);
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_backward(
+    batch_normalization_mode mode, float epsilon, float alpha_data,
+    const memory_desc_ext &src_desc, void *src,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta_data,
+    const memory_desc_ext &diff_src_desc, void *diff_src, float alpha_param,
+    const memory_desc_ext &diff_scale_bias_mean_var_desc, void *scale,
+    float beta_param, void *diff_scale, void *diff_bias, void *saved_mean,
+    void *saved_var) {
+
+  return batch_normalization_backward_internal(
+      mode, epsilon, alpha_data, src_desc, src, diff_dst_desc, diff_dst,
+      beta_data, diff_src_desc, diff_src, alpha_param,
+      diff_scale_bias_mean_var_desc, scale, nullptr, beta_param, diff_scale,
+      diff_bias, diff_scale_bias_mean_var_desc, saved_mean, saved_var);
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_backward(
+    batch_normalization_mode mode, batch_normalization_ops ops,
+    activation_desc &adesc, float epsilon, float alpha_data,
+    const memory_desc_ext &src_desc, void *src, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    float beta_data, const memory_desc_ext &diff_src_desc, void *diff_src,
+    const memory_desc_ext &diff_summand_desc, void *diff_summand,
+    float alpha_param, const memory_desc_ext &diff_scale_bias_desc, void *scale,
+    void *bias, float beta_param, void *diff_scale, void *diff_bias,
+    const memory_desc_ext &mean_var_desc, void *saved_mean, void *saved_var,
+    size_t workspace_size, void *workspace) {
+  std::vector<void *> caches;
+  ::dnnl::memory::desc real_diff_dst_desc = diff_dst_desc.get_desc();
+  void *real_diff_dst = diff_dst;
+
+  if (ops != batch_normalization_ops::none &&
+      workspace_size < dst_desc.get_desc().get_size()) {
+    throw std::runtime_error("async_batch_normalization_backward_ex: "
+                             "no sufficient workspace.");
+  }
+  enter_primitive(diff_scale_bias_desc.get_size() * 8 +
+                  src_desc.get_size() * 3 + diff_dst_desc.get_size() * 5 +
+                  diff_src_desc.get_size() + mean_var_desc.get_size() * 9 +
+                  diff_summand_desc.get_size());
+  if (ops == batch_normalization_ops::add_activation) {
+    void *diff_summand_cache = allocate(diff_summand_desc);
+    async_activation_backward(adesc, 1.f, dst_desc, dst, diff_dst_desc, diff_dst,
+                        dst_desc, workspace, 0.f,
+                        diff_summand_desc, diff_summand_cache);
+    async_sum(alpha_data, diff_summand_desc, diff_summand_cache, beta_data,
+        diff_summand_desc, diff_summand);
+    real_diff_dst_desc = diff_summand_desc.get_desc();
+    real_diff_dst = diff_summand_cache;
+  } else if (ops == batch_normalization_ops::activation) {
+    void *diff_dst_cache = allocate(diff_dst_desc);
+    async_activation_backward(adesc, 1.f, dst_desc, dst, diff_dst_desc,
+                        diff_dst, dst_desc, workspace,
+                        0.f, diff_dst_desc, diff_dst_cache);
+    real_diff_dst = diff_dst_cache;
+  }
+
+  return exit_primitive(batch_normalization_backward_internal(
+      mode, epsilon, alpha_data, src_desc, src, real_diff_dst_desc,
+      real_diff_dst, beta_data, diff_src_desc, diff_src, alpha_param,
+      diff_scale_bias_desc, scale, bias, beta_param, diff_scale, diff_bias,
+      mean_var_desc, saved_mean, saved_var));
+}
+
+inline
+sycl::event engine_ext::async_batch_normalization_backward(
+    batch_normalization_mode mode, batch_normalization_ops ops,
+    activation_desc &adesc, float epsilon, float alpha_data,
+    const memory_desc_ext &src_desc, void *src, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    float beta_data, const memory_desc_ext &diff_src_desc, void *diff_src,
+    const memory_desc_ext &diff_summand_desc, void *diff_summand,
+    float alpha_param, const memory_desc_ext &diff_scale_bias_mean_var_desc,
+    void *scale, void *bias, float beta_param, void *diff_scale,
+    void *diff_bias, void *saved_mean, void *saved_var,
+    size_t workspace_size, void *workspace) {
+
+  return async_batch_normalization_backward(
+      mode, ops, adesc, epsilon, alpha_data, src_desc, src, dst_desc, dst,
+      diff_dst_desc, diff_dst, beta_data, diff_src_desc, diff_src,
+      diff_summand_desc, diff_summand, alpha_param,
+      diff_scale_bias_mean_var_desc, scale, bias, beta_param, diff_scale,
+      diff_bias, diff_scale_bias_mean_var_desc, saved_mean, saved_var,
+      workspace_size, workspace);
+}
+
+inline
+sycl::event
+engine_ext::async_convolution_forward(convolution_desc &desc, ::dnnl::algorithm alg,
+                                float alpha, const memory_desc_ext &src_desc,
+                                void *src, const memory_desc_ext &weight_desc,
+                                void *weight, float beta,
+                                const memory_desc_ext &dst_desc, void *dst) {
+  if (scale_parameter_preprocess({{alpha, beta, dst_desc, dst}})) {
+    return sycl::event();
+  }
+  auto help_weight_desc =
+      get_group_weight_desc(desc.get_group_count(), weight_desc);
+
+  ::dnnl::primitive_attr attr;
+  attr.set_fpmath_mode(desc.get_math_mode());
+
+  auto origin_src_md = src_desc.get_desc();
+  auto origin_dst_md = dst_desc.get_desc();
+  auto origin_weight_md = help_weight_desc;
+  auto src_md = transfer_memory_desc_to_format_tag_any(origin_src_md);
+  auto dst_md = transfer_memory_desc_to_format_tag_any(origin_dst_md);
+  auto weight_md = transfer_memory_desc_to_format_tag_any(origin_weight_md);
+
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::convolution_forward>(
+          ::dnnl::prop_kind::forward_training, alg, src_md, weight_md, dst_md,
+          desc.get_stride(), desc.get_dilate(), desc.get_padding(),
+          desc.get_padding(), attr);
+
+  auto pd = get_primitive_desc<::dnnl::convolution_forward>(
+      primitive_args.second.primitive);
+  auto optimal_src_md = pd.src_desc();
+  auto optimal_dst_md = pd.dst_desc();
+  auto optimal_weight_md = pd.weights_desc();
+
+  enter_primitive(
+      optimal_src_md.get_size() * 3 + optimal_dst_md.get_size() * 5 +
+      optimal_weight_md.get_size() * 3 + origin_dst_md.get_size() * 2);
+
+  void *optimal_src = src, *optimal_dst = dst, *optimal_weight = weight;
+  allocate_and_reorder_memory_to_optimal(origin_src_md, src, optimal_src_md,
+                                         optimal_src);
+  allocate_and_reorder_memory_to_optimal(origin_weight_md, weight,
+                                         optimal_weight_md, optimal_weight);
+
+  if (beta == 0.f) {
+    if(origin_dst_md != optimal_dst_md) {
+      optimal_dst = allocate(optimal_dst_md);
+    }
+  } else {
+    allocate_and_reorder_memory_to_optimal(origin_dst_md, dst, optimal_dst_md,
+                                           optimal_dst);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, optimal_src_md,
+             optimal_src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_WEIGHTS, optimal_weight_md,
+             optimal_weight);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, optimal_dst_md,
+             optimal_dst);
+
+  auto e = execute_primitive<::dnnl::convolution_forward>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DST, optimal_dst_md, optimal_dst}});
+
+  if (origin_dst_md != optimal_dst_md) {
+    e = async_reorder(1.f, optimal_dst_md, optimal_dst, 0.f, origin_dst_md,
+                      dst);
+  }
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::async_convolution_forward(
+    convolution_desc &desc, ::dnnl::algorithm alg, activation_desc &adesc,
+    float alpha_0, const memory_desc_ext &src_desc, void *src,
+    const memory_desc_ext &weight_desc, void *weight, float alpha_1,
+    const memory_desc_ext &summand_desc, void *summand,
+    const memory_desc_ext &bias_desc, void *bias,
+    const memory_desc_ext &dst_desc, void *dst) {
+
+  int channel_num = bias_desc.get_element_num();
+  auto help_weight_desc =
+      get_group_weight_desc(desc.get_group_count(), weight_desc);
+  ::dnnl::memory::desc help_bias_desc = {{channel_num},
+                                         bias_desc.get_desc().get_data_type(),
+                                         ::dnnl::memory::format_tag::a};
+  auto origin_weight_md = help_weight_desc;
+  auto origin_bias_md = help_bias_desc;
+  auto origin_src_md = src_desc.get_desc();
+  auto origin_dst_md = dst_desc.get_desc();
+  auto src_md = transfer_memory_desc_to_format_tag_any(origin_src_md);
+  auto dst_md = transfer_memory_desc_to_format_tag_any(origin_dst_md);
+  auto weight_md = transfer_memory_desc_to_format_tag_any(origin_weight_md);
+  auto bias_md = transfer_memory_desc_to_format_tag_any(origin_bias_md);
+
+  ::dnnl::primitive_attr attr;
+  attr.set_fpmath_mode(desc.get_math_mode());
+
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::convolution_forward>(
+          ::dnnl::prop_kind::forward_training, alg, src_md, weight_md, bias_md,
+          dst_md, desc.get_stride(), desc.get_dilate(), desc.get_padding(),
+          desc.get_padding(), attr);
+
+  auto pd = get_primitive_desc<::dnnl::convolution_forward>(
+      primitive_args.second.primitive);
+  auto optimal_src_md = pd.src_desc();
+  auto optimal_dst_md = pd.dst_desc();
+  auto optimal_weight_md = pd.weights_desc();
+  auto optimal_bias_md = pd.bias_desc();
+
+  enter_primitive(optimal_src_md.get_size() + 3 * optimal_weight_md.get_size() +
+                  optimal_bias_md.get_size() + 7 * optimal_dst_md.get_size() +
+                  summand_desc.get_size());
+
+  void *optimal_src = src, *optimal_dst = dst, *optimal_weight = weight,
+       *optimal_bias = bias;
+  allocate_and_reorder_memory_to_optimal(origin_src_md, src, optimal_src_md,
+                                         optimal_src);
+  allocate_and_reorder_memory_to_optimal(origin_weight_md, weight,
+                                         optimal_weight_md, optimal_weight);
+  allocate_and_reorder_memory_to_optimal(origin_bias_md, bias, optimal_bias_md,
+                                         optimal_bias);
+  if (origin_dst_md != optimal_dst_md) {
+    optimal_dst = allocate(optimal_dst_md);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, optimal_src_md,
+             optimal_src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_BIAS, optimal_bias_md,
+             optimal_bias);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, optimal_dst_md,
+             optimal_dst);
+
+  void *cache = nullptr;
+  if (alpha_0 != 1.f) {
+    cache = allocate(optimal_weight_md);
+    _q->memcpy(cache, optimal_weight, optimal_weight_md.get_size());
+    async_scale(alpha_0, optimal_weight_md, cache);
+    insert_arg(primitive_args.second.args, DNNL_ARG_WEIGHTS, optimal_weight_md,
+               cache);
+    execute_primitive<::dnnl::convolution_forward>(
+        primitive_args,
+        {{1.f, 0.f, DNNL_ARG_DST, optimal_dst_md, optimal_dst}});
+  } else {
+    insert_arg(primitive_args.second.args, DNNL_ARG_WEIGHTS, optimal_weight_md,
+               optimal_weight);
+    execute_primitive<::dnnl::convolution_forward>(
+        primitive_args,
+        {{1.f, 0.f, DNNL_ARG_DST, optimal_dst_md, optimal_dst}});
+  }
+  if (origin_dst_md != optimal_dst_md) {
+    async_reorder(1.f, optimal_dst_md, optimal_dst, 0.f, origin_dst_md, dst);
+  }
+  async_sum(alpha_1, summand_desc, summand, 1.f, dst_desc, dst);
+  return exit_primitive(
+      async_activation_forward(adesc, 1.f, dst_desc, dst, 0.f, dst_desc, dst));
+}
+
+inline
+sycl::event engine_ext::async_convolution_backward_data(
+    convolution_desc &desc, ::dnnl::algorithm alg, float alpha,
+    const memory_desc_ext &weight_desc, void *weight,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta,
+    const memory_desc_ext &diff_src_desc, void *diff_src) {
+
+  if (scale_parameter_preprocess({{alpha, beta, diff_dst_desc, diff_dst}})) {
+    return sycl::event();
+  }
+
+  auto help_weight_desc =
+      get_group_weight_desc(desc.get_group_count(), weight_desc);
+
+  auto origin_weight_md = help_weight_desc;
+  auto origin_diff_src_md = diff_src_desc.get_desc();
+  auto origin_diff_dst_md = diff_dst_desc.get_desc();
+  auto diff_src_md = transfer_memory_desc_to_format_tag_any(origin_diff_src_md);
+  auto diff_dst_md = transfer_memory_desc_to_format_tag_any(origin_diff_dst_md);
+  auto weight_md = transfer_memory_desc_to_format_tag_any(origin_weight_md);
+
+  ::dnnl::primitive_attr attr;
+  attr.set_fpmath_mode(desc.get_math_mode());
+
+  auto forward_primitive = create_primitive_desc<::dnnl::convolution_forward>(
+      ::dnnl::prop_kind::forward_training, ::dnnl::algorithm::convolution_auto,
+      diff_src_md, weight_md, diff_dst_md, desc.get_stride(), desc.get_dilate(),
+      desc.get_padding(), desc.get_padding(), attr);
+
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::convolution_backward_data>(
+          ::dnnl::algorithm::convolution_auto, diff_src_md, weight_md,
+          diff_dst_md, desc.get_stride(), desc.get_dilate(), desc.get_padding(),
+          desc.get_padding(), forward_primitive, attr);
+
+  auto pd = get_primitive_desc<::dnnl::convolution_backward_data>(
+      primitive_args.second.primitive);
+  auto optimal_diff_src_md = pd.diff_src_desc();
+  auto optimal_diff_dst_md = pd.diff_dst_desc();
+  auto optimal_weight_md = pd.weights_desc();
+
+  enter_primitive(5 * optimal_diff_src_md.get_size() +
+                  optimal_diff_dst_md.get_size() +
+                  optimal_weight_md.get_size());
+
+  void *optimal_diff_src = diff_src, *optimal_diff_dst = diff_dst,
+       *optimal_weight = weight;
+  allocate_and_reorder_memory_to_optimal(origin_diff_dst_md, diff_dst,
+                                         optimal_diff_dst_md, optimal_diff_dst);
+  allocate_and_reorder_memory_to_optimal(origin_weight_md, weight,
+                                         optimal_weight_md, optimal_weight);
+  if (beta == 0.f) {
+    if (origin_diff_src_md != optimal_diff_src_md) {
+      optimal_diff_src = allocate(optimal_diff_src_md);
+    }
+  } else {
+    allocate_and_reorder_memory_to_optimal(
+        origin_diff_src_md, diff_src, optimal_diff_src_md, optimal_diff_src);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST, optimal_diff_dst_md,
+             optimal_diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_WEIGHTS, optimal_weight_md,
+             optimal_weight);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_SRC, optimal_diff_src_md,
+             optimal_diff_src);
+
+  auto e = execute_primitive<::dnnl::convolution_backward_data>(
+      primitive_args,
+      {{alpha, beta, DNNL_ARG_DIFF_SRC, optimal_diff_src_md, optimal_diff_src}});
+
+  if (origin_diff_src_md != optimal_diff_src_md) {
+    e = async_reorder(1.f, optimal_diff_src_md, optimal_diff_src, 0.f,
+                      origin_diff_src_md, diff_src);
+  }
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::async_convolution_backward_weight(
+    convolution_desc &desc, ::dnnl::algorithm alg, float alpha,
+    const memory_desc_ext &src_desc, void *src,
+    const memory_desc_ext &diff_dst_desc, void *diff_dst, float beta,
+    const memory_desc_ext &diff_weight_desc, void *diff_weight) {
+
+  if (scale_parameter_preprocess(
+          {{alpha, beta, diff_weight_desc, diff_weight}})) {
+    return sycl::event();
+  }
+
+  auto help_diff_weight_desc =
+      get_group_weight_desc(desc.get_group_count(), diff_weight_desc);
+
+  ::dnnl::primitive_attr attr;
+  attr.set_fpmath_mode(desc.get_math_mode());
+
+  auto origin_diff_weight_md = help_diff_weight_desc;
+  auto origin_src_md = src_desc.get_desc();
+  auto origin_diff_dst_md = diff_dst_desc.get_desc();
+  auto src_md = transfer_memory_desc_to_format_tag_any(origin_src_md);
+  auto diff_dst_md = transfer_memory_desc_to_format_tag_any(origin_diff_dst_md);
+  auto diff_weight_md =
+      transfer_memory_desc_to_format_tag_any(origin_diff_weight_md);
+
+  auto forward_primitive = create_primitive_desc<::dnnl::convolution_forward>(
+      ::dnnl::prop_kind::forward_training, ::dnnl::algorithm::convolution_auto,
+      src_md, diff_weight_md, diff_dst_md, desc.get_stride(), desc.get_dilate(),
+      desc.get_padding(), desc.get_padding(), attr);
+
+  auto primitive_args =
+      create_primitive_args_or_get<::dnnl::convolution_backward_weights>(
+          ::dnnl::algorithm::convolution_auto, src_md, diff_weight_md,
+          diff_dst_md, desc.get_stride(), desc.get_dilate(), desc.get_padding(),
+          desc.get_padding(), forward_primitive, attr);
+
+  auto pd = get_primitive_desc<::dnnl::convolution_backward_weights>(
+      primitive_args.second.primitive);
+  auto optimal_src_md = pd.src_desc();
+  auto optimal_diff_dst_md = pd.diff_dst_desc();
+  auto optimal_diff_weight_md = pd.diff_weights_desc();
+
+  enter_primitive(optimal_diff_weight_md.get_size() * 5 +
+                  optimal_diff_dst_md.get_size() + optimal_src_md.get_size());
+
+  void *optimal_src = src, *optimal_diff_dst = diff_dst,
+       *optimal_diff_weight = diff_weight;
+  allocate_and_reorder_memory_to_optimal(origin_diff_dst_md, diff_dst,
+                                         optimal_diff_dst_md, optimal_diff_dst);
+  allocate_and_reorder_memory_to_optimal(origin_src_md, src, optimal_src_md,
+                                         optimal_src);
+  if (beta == 0.f) {
+    if (origin_diff_weight_md != optimal_diff_weight_md) {
+      optimal_diff_weight = allocate(optimal_diff_weight_md);
+    }
+  } else {
+    allocate_and_reorder_memory_to_optimal(origin_diff_weight_md, diff_weight,
+                                           optimal_diff_weight_md,
+                                           optimal_diff_weight);
+  }
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC, optimal_src_md,
+             optimal_src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_DST, optimal_diff_dst_md,
+             optimal_diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DIFF_WEIGHTS,
+             optimal_diff_weight_md, optimal_diff_weight);
+
+  auto e = execute_primitive<::dnnl::convolution_backward_weights>(
+      primitive_args, {{alpha, beta, DNNL_ARG_DIFF_WEIGHTS,
+                        optimal_diff_weight_md, optimal_diff_weight}});
+
+  if (origin_diff_weight_md != optimal_diff_weight_md) {
+    e = async_reorder(1.f, optimal_diff_weight_md, optimal_diff_weight, 0.f,
+                      origin_diff_weight_md, diff_weight);
+  }
+  return exit_primitive(e);
+}
+
+inline
+sycl::event engine_ext::async_convolution_backward_bias(
+    float alpha, const memory_desc_ext &diff_dst_desc, void *diff_dst,
+    float beta, const memory_desc_ext &diff_bias_desc, void *diff_bias) {
+  return async_reduction(reduction_op::sum, alpha, diff_dst_desc, diff_dst, beta,
+                   diff_bias_desc, diff_bias);
+}
+
+inline
+void engine_ext::rnn_get_weight_space_size(const rnn_desc &desc,
+                                           size_t *weight_space_size) {
+  *weight_space_size = 0;
+  rnn_forward_internal(desc, ::dnnl::prop_kind::forward_inference,
+                       memory_desc_ext(), nullptr, memory_desc_ext(), nullptr,
+                       memory_desc_ext(), nullptr, nullptr, memory_desc_ext(),
+                       nullptr, nullptr, 0, nullptr, 0, nullptr, 0, nullptr, true,
+                       weight_space_size, nullptr, nullptr);
+  return;
+}
+
+inline
+void engine_ext::rnn_get_scratchpad_workspace_size(
+    const rnn_desc &desc, ::dnnl::prop_kind kind,
+    const memory_desc_ext &src_desc, size_t *scratchpad_size,
+    size_t *workspace_size) {
+  *workspace_size = 0;
+  *scratchpad_size = 0;
+  rnn_forward_internal(desc, kind, src_desc, nullptr, memory_desc_ext(),
+                       nullptr, memory_desc_ext(), nullptr, nullptr,
+                       memory_desc_ext(), nullptr, nullptr, 0, nullptr, 0,
+                       nullptr, 0, nullptr, true, nullptr, workspace_size,
+                       scratchpad_size);
+  return;
+}
+
+inline
+sycl::event engine_ext::async_rnn_forward(
+    const rnn_desc &desc, ::dnnl::prop_kind kind,
+    const memory_desc_ext &src_desc, void *src, const memory_desc_ext &dst_desc,
+    void *dst, const memory_desc_ext &iter_desc, void *src_iter, void *dst_iter,
+    const memory_desc_ext &iter_c_desc, void *src_iter_c, void *dst_iter_c,
+    size_t weight_size, void *weight, size_t scratchpad_size, void *scratchpad,
+    size_t workspace_size, void *workspace) {
+
+  return rnn_forward_internal(
+      desc, kind, src_desc, src, dst_desc, dst, iter_desc, src_iter, dst_iter,
+      iter_c_desc, src_iter_c, dst_iter_c, weight_size, weight, workspace_size,
+      workspace, scratchpad_size, scratchpad, false, nullptr, nullptr,
+      nullptr);
+}
+
+inline
+sycl::event engine_ext::async_rnn_backward(
+    const rnn_desc &desc, const memory_desc_ext &dst_desc, void *dst,
+    void *diff_dst, const memory_desc_ext &src_desc, void *src, void *diff_src,
+    const memory_desc_ext &iter_desc, void *src_iter, void *diff_dst_iter,
+    void *diff_src_iter, const memory_desc_ext &iter_c_desc, void *src_iter_c,
+    void *diff_dst_iter_c, void *diff_src_iter_c, size_t weight_size,
+    void *weight, void *diff_weight, size_t scratchpad_size, void *scratchpad,
+    size_t workspace_size, void *workspace) {
+  ::dnnl::memory::data_type src_dt;
+  ::dnnl::memory::format_tag src_format_tag;
+  rnn_mode mode;
+  rnn_memory_format_tag format_tag;
+  rnn_bias_mode bias_mode;
+  rnn_direction direction;
+  dpct::library_data_t dt;
+  int direction_num = 1, input_size = 0, hidden_size = 0, projection_size = 0,
+      layer_size = 0, gate_num = 1, output_size = 0, data_type_size = 0,
+      seq_length = 1, batch_size = 1;
+  void *last_layer_cache = nullptr;
+  void *hidden_layer_cache = nullptr;
+  sycl::event e;
+  enter_primitive(src_desc.get_size() * 2);
+  std::vector<int> offset(9, 0);
+  std::vector<void *> data = {
+      src,
+      dst,
+      (uint8_t *)src_iter + iter_desc.get_size(),
+      nullptr,
+      (uint8_t *)src_iter_c + iter_c_desc.get_size(),
+      nullptr,
+      (uint8_t *)weight + weight_size,
+      (uint8_t *)workspace + workspace_size,
+      diff_src,
+      diff_dst,
+      (uint8_t *)diff_src_iter + iter_desc.get_size(),
+      (uint8_t *)diff_dst_iter + iter_desc.get_size(),
+      (uint8_t *)diff_src_iter_c + iter_c_desc.get_size(),
+      (uint8_t *)diff_dst_iter_c + iter_c_desc.get_size(),
+      (uint8_t *)diff_weight + weight_size,
+      scratchpad};
+
+  desc.get(&mode, &bias_mode, &direction, &dt, &input_size, &hidden_size,
+           &projection_size, &layer_size);
+
+  get_rnn_configuration(src_desc.get_desc(), direction, mode, dt, hidden_size,
+                        &src_dt, &src_format_tag, &projection_size,
+                        &output_size, &seq_length, &batch_size, &direction_num,
+                        &gate_num);
+
+  if (direction == rnn_direction::bidirectional) {
+    if (layer_size > 1) {
+      last_layer_cache = allocate(src_desc);
+      hidden_layer_cache = allocate(src_desc);
+      data[8] = last_layer_cache;
+    }
+    e = execute_rnn_backward_primitive(
+        mode, ::dnnl::rnn_direction::bidirectional_concat, bias_mode, src_dt,
+        src_format_tag, seq_length, batch_size, output_size, 2 * output_size, 1,
+        direction_num, hidden_size, gate_num, projection_size, data, offset, 1);
+    if (layer_size > 1) {
+      data[8] = hidden_layer_cache;
+      data[9] = last_layer_cache;
+      e = execute_rnn_backward_primitive(
+          mode, ::dnnl::rnn_direction::bidirectional_sum, bias_mode, src_dt,
+          src_format_tag, seq_length, batch_size, output_size, output_size, 1,
+          direction_num, hidden_size, gate_num, projection_size, data, offset,
+          layer_size - 1);
+      _q->memcpy(diff_src,
+                 ((layer_size - 1) % 2 == 0) ? last_layer_cache
+                                             : hidden_layer_cache,
+                 src_desc.get_size());
+    }
+  } else {
+    e = execute_rnn_backward_primitive(
+        mode, ::dnnl::rnn_direction::unidirectional_left2right, bias_mode,
+        src_dt, src_format_tag, seq_length, batch_size, output_size,
+        output_size, layer_size, direction_num, hidden_size, gate_num,
+        projection_size, data, offset, 1);
+  }
+
+  return exit_primitive(e);
+}
+
+inline
+size_t engine_ext::get_dropout_state_size(){
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) "
+                           "Interfaces Project does not support this API.");
+#else
+  auto r = get_internal_resource(_q);
+  if(r->random_engine_state_size == -1){
+    auto rand_engine = rng_engine_t(*_q, 0);
+    r->random_engine_state_size =
+        oneapi::mkl::rng::get_state_size(rand_engine);
+  }
+  return r->random_engine_state_size;
+#endif
+}
+
+inline size_t
+engine_ext::get_dropout_workspace_size(const memory_desc_ext &src_desc) {
+  return src_desc.get_size();
+}
+
+inline
+sycl::event engine_ext::async_dropout_forward(dropout_desc &desc,
+                                              const memory_desc_ext &src_desc,
+                                              void *src,
+                                              const memory_desc_ext &dst_desc,
+                                              void *dst, void *workspace,
+                                              size_t workspace_size) {
+  if (workspace_size < src_desc.get_size()) {
+    throw std::runtime_error("async_dropout_forward: no sufficient workspace.");
+  }
+  enter_primitive(src_desc.get_size() * 2 + dst_desc.get_size() * 2);
+  float p = desc.get_probability();
+  if (p == 1.f) {
+    return _q->memset(dst, 0, dst_desc.get_size());
+  } else if (p == 0.f) {
+    return async_reorder(1.f, src_desc, src, 0.f, dst_desc, dst);
+  }
+
+  float scale_factor = 1.f / (1.f - p);
+  void *cache = workspace;
+
+  memory_desc_ext rng_data_desc(
+      ::dnnl::memory::desc(src_desc.get_dims(), ::dnnl::memory::data_type::s32,
+                           src_desc.get_strides()));
+  if (src_desc.get_desc().get_data_type() != ::dnnl::memory::data_type::s32) {
+    cache = allocate(rng_data_desc);
+  }
+
+  desc.generate(_q, get_dropout_state_size(), rng_data_desc.get_element_num(),
+                (std::int32_t *)cache);
+
+  if (cache == workspace) {
+    async_scale(scale_factor, src_desc, workspace);
+  } else {
+    async_reorder(scale_factor, rng_data_desc, cache, 0.f, src_desc, workspace);
+  }
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::binary>(
+      ::dnnl::algorithm::binary_mul, src_desc.get_desc(), src_desc.get_desc(),
+      dst_desc.get_desc());
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_0, src_desc.get_desc(),
+             src);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_1, src_desc.get_desc(),
+             workspace);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, dst_desc.get_desc(),
+             dst);
+
+  return exit_primitive(execute_primitive<::dnnl::binary>(primitive_args));
+}
+
+inline
+sycl::event engine_ext::async_dropout_backward(
+    dropout_desc &desc, const memory_desc_ext &diff_dst_desc,
+    void *diff_dst, const memory_desc_ext &diff_src_desc, void *diff_src,
+    void *workspace, size_t workspace_size) {
+  enter_primitive(2 * diff_src_desc.get_size());
+  float p = desc.get_probability();
+  if (p == 1.f) {
+    return _q->memset(diff_src, 0, diff_src_desc.get_size());
+  } else if (p == 0.f) {
+    return async_reorder(1.f, diff_dst_desc, diff_dst, 0.f, diff_src_desc,
+                         diff_src);
+  }
+
+  auto primitive_args = create_primitive_args_or_get<::dnnl::binary>(
+      ::dnnl::algorithm::binary_mul, diff_dst_desc.get_desc(),
+      diff_dst_desc.get_desc(), diff_src_desc.get_desc());
+
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_0,
+             diff_dst_desc.get_desc(), diff_dst);
+  insert_arg(primitive_args.second.args, DNNL_ARG_SRC_1,
+             diff_dst_desc.get_desc(), workspace);
+  insert_arg(primitive_args.second.args, DNNL_ARG_DST, diff_src_desc.get_desc(),
+             diff_src);
+
+  return exit_primitive(execute_primitive<::dnnl::binary>(primitive_args));
+}
+} // namespace dnnl
+} // namespace dpct
+
+#endif // __DPCT_DNNL_UTILS_HPP__
diff --git a/sycl/include/dpct/dpct.hpp b/sycl/include/dpct/dpct.hpp
new file mode 100644
index 00000000000..6318e88cbf9
--- /dev/null
+++ b/sycl/include/dpct/dpct.hpp
@@ -0,0 +1,106 @@
+//==---- dpct.hpp ---------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+// clang-format off
+/*
+There are 3 macros that can be used to control the behavior of the helper
+function files.
++========================+=========================+===========================+
+|                        | Helper function files   | Helper function files     |
+| Macro Name             | Used in dpct migrated   | Used in direct            |
+|                        | code                    | programming               |
++========================+=========================+===========================+
+| DPCT_USM_LEVEL_NONE    | USM by default.         | USM by default.           |
+| (Use USM or SYCL       | Use SYCL Buffer by      | Define it explicitly to   |
+| buffer)                | running dpct with       | use the SYCL buffer.      |
+|                        | "--use-level=none".     |                           |
++------------------------+-------------------------+---------------------------+
+| DPCT_PROFILING_ENABLED | Enabled heuristically   | Disable by default.       |
+| (Enable SYCL queue     | depends on the input    | Define it explicitly to   |
+| profiling)             | code.                   | enable.                   |
+|                        | Enable explicitly by    |                           |
+|                        | running dpct with       |                           |
+|                        | "--enable-profiling".   |                           |
+|                        | Disable by removing the |                           |
+|                        | macro definition        |                           |
+|                        | manually.               |                           |
++------------------------+-------------------------+---------------------------+
+| DPCT_HELPER_VERBOSE    | Disable by default.     | Disable by default.       |
+| (Verbose option)       | Define it explicitly to | Define it explicitly to   |
+|                        | enable.                 | enable.                   |
++========================+=========================+===========================+
+*/
+// clang-format on
+
+#ifndef __DPCT_HPP__
+#define __DPCT_HPP__
+
+#include <sycl/sycl.hpp>
+#include <iostream>
+#include <limits.h>
+#include <math.h>
+
+template <class... Args> class dpct_kernel_name;
+template <int Arg> class dpct_kernel_scalar;
+
+#include "atomic.hpp"
+#include "device.hpp"
+#include "image.hpp"
+#include "kernel.hpp"
+#include "math.hpp"
+#include "memory.hpp"
+#include "util.hpp"
+
+#include "bindless_images.hpp"
+#include "graph.hpp"
+#include "ze_utils.hpp"
+#define USE_DPCT_HELPER 1
+
+#if defined(_MSC_VER)
+#define __dpct_align__(n) __declspec(align(n))
+#define __dpct_inline__ __forceinline
+#else
+#define __dpct_align__(n) __attribute__((aligned(n)))
+#define __dpct_inline__ __inline__ __attribute__((always_inline))
+#endif
+
+#if defined(_MSC_VER)
+#define __dpct_noinline__ __declspec(noinline)
+#else
+#define __dpct_noinline__ __attribute__((noinline))
+#endif
+
+#define DPCT_COMPATIBILITY_TEMP (900)
+
+namespace dpct {
+enum error_code { success = 0, default_error = 999 };
+/// A dummy function introduced to assist auto migration.
+/// The migration tool user should replace it with a real error-handling function.
+/// SYCL reports errors using exceptions and does not use error codes.
+inline const char *get_error_string_dummy(int ec) {
+  (void)ec;
+  return "<FIXME: Placeholder>"; // Return the error string for the error code
+                                 // ec.
+}
+} // namespace dpct
+
+#define DPCT_CHECK_ERROR(expr)                                                 \
+  [&]() {                                                                      \
+    try {                                                                      \
+      expr;                                                                    \
+      return dpct::success;                                                    \
+    } catch (std::exception const &e) {                                        \
+      std::cerr << e.what() << std::endl;                                      \
+      return dpct::default_error;                                              \
+    }                                                                          \
+  }()
+
+#define DPCT_PI_F (3.14159274101257f)
+#define DPCT_PI (3.141592653589793115998)
+
+#endif // __DPCT_HPP__
diff --git a/sycl/include/dpct/dpl_extras/algorithm.h b/sycl/include/dpct/dpl_extras/algorithm.h
new file mode 100644
index 00000000000..8887789515c
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/algorithm.h
@@ -0,0 +1,2562 @@
+//==---- algorithm.h ------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_ALGORITHM_H__
+#define __DPCT_ALGORITHM_H__
+
+#include <oneapi/dpl/algorithm>
+#include <oneapi/dpl/execution>
+#include <oneapi/dpl/numeric>
+
+#include "functional.h"
+#include "iterators.h"
+#include "vector.h"
+
+namespace dpct {
+
+namespace internal {
+// This function is ported from oneDPL with the check for an FPGA policy
+// removed. This function should be used to wrap a provided policy when multiple
+// oneDPL calls are made to ensure unique kernel names.
+template <template <typename> class NewKernelName, typename Policy>
+auto make_wrapped_policy(Policy &&policy)
+    -> decltype(oneapi::dpl::execution::make_device_policy<
+                NewKernelName<typename ::std::decay_t<Policy>::kernel_name>>(
+        ::std::forward<Policy>(policy))) {
+  return oneapi::dpl::execution::make_device_policy<
+      NewKernelName<typename ::std::decay_t<Policy>::kernel_name>>(
+      ::std::forward<Policy>(policy));
+}
+
+template <typename Name> class partition_call1;
+
+template <typename Name> class partition_call2;
+
+template <typename Name> class copy_before_partition;
+
+template <typename Name> class reverse_partition;
+
+template <typename Name> class copy_call1;
+
+template <typename Name> class copy_call2;
+
+}; // namespace internal
+
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred,
+          typename T>
+void replace_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p,
+                const T &new_value) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  std::transform(
+      std::forward<Policy>(policy), first, last, mask, first,
+      internal::replace_if_fun<typename std::iterator_traits<Iter1>::value_type,
+                               Pred>(p, new_value));
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Pred, typename T>
+Iter3 replace_copy_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+                      Iter3 result, Pred p, const T &new_value) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  return std::transform(
+      std::forward<Policy>(policy), first, last, mask, result,
+      internal::replace_if_fun<typename std::iterator_traits<Iter3>::value_type,
+                               Pred>(p, new_value));
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred>
+internal::enable_if_hetero_execution_policy<Policy, Iter1>
+remove_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using oneapi::dpl::make_zip_iterator;
+  using policy_type = typename std::decay<Policy>::type;
+  using internal::__buffer;
+  using ValueType = typename std::iterator_traits<Iter1>::value_type;
+
+  __buffer<ValueType> _tmp(std::distance(first, last));
+
+  auto end = std::copy_if(
+      policy, make_zip_iterator(first, mask),
+      make_zip_iterator(last, mask + std::distance(first, last)),
+      make_zip_iterator(_tmp.get(), oneapi::dpl::discard_iterator()),
+      internal::negate_predicate_key_fun<Pred>(p));
+  return std::copy(std::forward<Policy>(policy), _tmp.get(),
+                   std::get<0>(end.base()), first);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred>
+typename std::enable_if<!internal::is_hetero_execution_policy<
+                            typename std::decay<Policy>::type>::value,
+                        Iter1>::type
+remove_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using oneapi::dpl::make_zip_iterator;
+  using policy_type = typename std::decay<Policy>::type;
+  using ValueType = typename std::iterator_traits<Iter1>::value_type;
+
+  std::vector<ValueType> _tmp(std::distance(first, last));
+
+  auto end = std::copy_if(
+      policy, make_zip_iterator(first, mask),
+      make_zip_iterator(last, mask + std::distance(first, last)),
+      make_zip_iterator(_tmp.begin(), oneapi::dpl::discard_iterator()),
+      internal::negate_predicate_key_fun<Pred>(p));
+  return std::copy(policy, _tmp.begin(), std::get<0>(end.base()), first);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Pred>
+Iter3 remove_copy_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+                     Iter3 result, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using oneapi::dpl::make_zip_iterator;
+  auto ret_val = std::remove_copy_if(
+      std::forward<Policy>(policy), make_zip_iterator(first, mask),
+      make_zip_iterator(last, mask + std::distance(first, last)),
+      make_zip_iterator(result, oneapi::dpl::discard_iterator()),
+      internal::predicate_key_fun<Pred>(p));
+  return std::get<0>(ret_val.base());
+}
+
+template <class Policy, class Iter1, class Iter2, class BinaryPred>
+std::pair<Iter1, Iter2> unique(Policy &&policy, Iter1 keys_first,
+                               Iter1 keys_last, Iter2 values_first,
+                               BinaryPred binary_pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::unique(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first, values_first),
+      oneapi::dpl::make_zip_iterator(
+          keys_last, values_first + std::distance(keys_first, keys_last)),
+      internal::compare_key_fun<BinaryPred>(binary_pred));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_first, values_first), ret_val);
+  return std::make_pair(keys_first + n1, values_first + n1);
+}
+
+template <class Policy, class Iter1, class Iter2>
+std::pair<Iter1, Iter2> unique(Policy &&policy, Iter1 keys_first,
+                               Iter1 keys_last, Iter2 values_first) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using T = typename std::iterator_traits<Iter1>::value_type;
+  return unique(std::forward<Policy>(policy), keys_first, keys_last,
+                values_first, std::equal_to<T>());
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class BinaryPred>
+std::pair<Iter3, Iter4> unique_copy(Policy &&policy, Iter1 keys_first,
+                                    Iter1 keys_last, Iter2 values_first,
+                                    Iter3 keys_result, Iter4 values_result,
+                                    BinaryPred binary_pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::unique_copy(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first, values_first),
+      oneapi::dpl::make_zip_iterator(
+          keys_last, values_first + std::distance(keys_first, keys_last)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::unique_fun<BinaryPred>(binary_pred));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4>
+std::pair<Iter3, Iter4> unique_copy(Policy &&policy, Iter1 keys_first,
+                                    Iter1 keys_last, Iter2 values_first,
+                                    Iter3 keys_result, Iter4 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using T = typename std::iterator_traits<Iter1>::value_type;
+  auto comp = std::equal_to<T>();
+  return unique_copy(std::forward<Policy>(policy), keys_first, keys_last,
+                     values_first, keys_result, values_result, comp);
+}
+
+template <typename Policy, typename Iter, typename Pred>
+Iter partition_point(Policy &&policy, Iter first, Iter last, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter>::iterator_category,
+                   std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  return std::find_if_not(std::forward<Policy>(policy), first, last, p);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Pred>
+Iter3 copy_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+              Iter3 result, Pred pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::copy_if(
+      std::forward<Policy>(policy), oneapi::dpl::make_zip_iterator(first, mask),
+      oneapi::dpl::make_zip_iterator(last, mask + std::distance(first, last)),
+      oneapi::dpl::make_zip_iterator(result, oneapi::dpl::discard_iterator()),
+      internal::predicate_key_fun<Pred>(pred));
+  return std::get<0>(ret_val.base());
+}
+
+template <class Policy, class Iter1, class Iter2, class UnaryOperation,
+          class Pred>
+Iter2 transform_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 result,
+                   UnaryOperation unary_op, Pred pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using T = typename std::iterator_traits<Iter1>::value_type;
+  const auto n = std::distance(first, last);
+  std::for_each(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(first, result),
+      oneapi::dpl::make_zip_iterator(first, result) + n,
+      internal::transform_if_fun<T, Pred, UnaryOperation>(pred, unary_op));
+  return result + n;
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3,
+          class UnaryOperation, class Pred>
+Iter3 transform_if(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+                   Iter3 result, UnaryOperation unary_op, Pred pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using T = typename std::iterator_traits<Iter1>::value_type;
+  using Ref1 = typename std::iterator_traits<Iter1>::reference;
+  using Ref2 = typename std::iterator_traits<Iter2>::reference;
+  const auto n = std::distance(first, last);
+  std::for_each(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(first, mask, result),
+      oneapi::dpl::make_zip_iterator(first, mask, result) + n,
+      internal::transform_if_unary_zip_mask_fun<T, Pred, UnaryOperation>(
+          pred, unary_op));
+  return result + n;
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class BinaryOperation, class Pred>
+Iter4 transform_if(Policy &&policy, Iter1 first1, Iter1 last1, Iter2 first2,
+                   Iter3 mask, Iter4 result, BinaryOperation binary_op,
+                   Pred pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  const auto n = std::distance(first1, last1);
+  using ZipIterator =
+      typename oneapi::dpl::zip_iterator<Iter1, Iter2, Iter3, Iter4>;
+  using T = typename std::iterator_traits<ZipIterator>::value_type;
+  std::for_each(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(first1, first2, mask, result),
+      oneapi::dpl::make_zip_iterator(last1, first2 + n, mask + n, result + n),
+      internal::transform_if_zip_mask_fun<T, Pred, BinaryOperation>(pred,
+                                                                    binary_op));
+  return result + n;
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename OutputIter>
+void scatter(Policy &&policy, InputIter1 first, InputIter1 last, InputIter2 map,
+             OutputIter result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<InputIter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter2>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<OutputIter>::iterator_category,
+              std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  oneapi::dpl::copy(policy, first, last,
+                    oneapi::dpl::make_permutation_iterator(result, map));
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename OutputIter>
+OutputIter gather(Policy &&policy, InputIter1 map_first, InputIter1 map_last,
+                  InputIter2 input_first, OutputIter result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<InputIter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter2>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<OutputIter>::iterator_category,
+              std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto perm_begin =
+      oneapi::dpl::make_permutation_iterator(input_first, map_first);
+  const int n = ::std::distance(map_first, map_last);
+
+  return oneapi::dpl::copy(policy, perm_begin, perm_begin + n, result);
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename InputIter3, typename OutputIter, typename Predicate>
+void scatter_if(Policy &&policy, InputIter1 first, InputIter1 last,
+                InputIter2 map, InputIter3 mask, OutputIter result,
+                Predicate pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<InputIter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter2>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter3>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<OutputIter>::iterator_category,
+              std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  dpct::transform_if(
+      ::std::forward<Policy>(policy), first, last, mask,
+      oneapi::dpl::make_permutation_iterator(result, map),
+      [=](auto &&v) { return v; }, [=](auto &&m) { return pred(m); });
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename InputIter3, typename OutputIter>
+void scatter_if(Policy &&policy, InputIter1 first, InputIter1 last,
+                InputIter2 map, InputIter3 mask, OutputIter result) {
+  scatter_if(::std::forward<Policy>(policy), first, last, map, mask, result,
+             internal::no_op_fun());
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename InputIter3, typename OutputIter, typename Predicate>
+OutputIter gather_if(Policy &&policy, InputIter1 map_first, InputIter1 map_last,
+                     InputIter2 mask, InputIter3 input_first, OutputIter result,
+                     Predicate pred) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<InputIter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter2>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<InputIter3>::iterator_category,
+              std::random_access_iterator_tag>::value &&
+          std::is_same<
+              typename std::iterator_traits<OutputIter>::iterator_category,
+              std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto perm_begin =
+      oneapi::dpl::make_permutation_iterator(input_first, map_first);
+  const int n = std::distance(map_first, map_last);
+
+  return dpct::transform_if(
+      ::std::forward<Policy>(policy), perm_begin, perm_begin + n, mask, result,
+      [=](auto &&v) { return v; }, [=](auto &&m) { return pred(m); });
+}
+
+template <typename Policy, typename InputIter1, typename InputIter2,
+          typename InputIter3, typename OutputIter>
+OutputIter gather_if(Policy &&policy, InputIter1 map_first, InputIter1 map_last,
+                     InputIter2 mask, InputIter3 input_first,
+                     OutputIter result) {
+  return gather_if(::std::forward<Policy>(policy), map_first, map_last, mask,
+                   input_first, result, internal::no_op_fun());
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Iter5, typename Iter6>
+std::pair<Iter5, Iter6>
+merge(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1, Iter2 keys_first2,
+      Iter2 keys_last2, Iter3 values_first1, Iter4 values_first2,
+      Iter5 keys_result, Iter6 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto n1 = std::distance(keys_first1, keys_last1);
+  auto n2 = std::distance(keys_first2, keys_last2);
+  std::merge(std::forward<Policy>(policy),
+             oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+             oneapi::dpl::make_zip_iterator(keys_last1, values_first1 + n1),
+             oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+             oneapi::dpl::make_zip_iterator(keys_last2, values_first2 + n2),
+             oneapi::dpl::make_zip_iterator(keys_result, values_result),
+             internal::compare_key_fun<>());
+  return std::make_pair(keys_result + n1 + n2, values_result + n1 + n2);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Iter5, typename Iter6, typename Comp>
+std::pair<Iter5, Iter6>
+merge(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1, Iter2 keys_first2,
+      Iter2 keys_last2, Iter3 values_first1, Iter4 values_first2,
+      Iter5 keys_result, Iter6 values_result, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto n1 = std::distance(keys_first1, keys_last1);
+  auto n2 = std::distance(keys_first2, keys_last2);
+  std::merge(std::forward<Policy>(policy),
+             oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+             oneapi::dpl::make_zip_iterator(keys_last1, values_first1 + n1),
+             oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+             oneapi::dpl::make_zip_iterator(keys_last2, values_first2 + n2),
+             oneapi::dpl::make_zip_iterator(keys_result, values_result),
+             internal::compare_key_fun<Comp>(comp));
+  return std::make_pair(keys_result + n1 + n2, values_result + n1 + n2);
+}
+
+template <class Policy, class Iter, class T>
+void iota(Policy &&policy, Iter first, Iter last, T init, T step) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter>::iterator_category,
+                   std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using DiffSize = typename std::iterator_traits<Iter>::difference_type;
+  std::transform(
+      std::forward<Policy>(policy), oneapi::dpl::counting_iterator<DiffSize>(0),
+      oneapi::dpl::counting_iterator<DiffSize>(std::distance(first, last)),
+      first, internal::sequence_fun<T>(init, step));
+}
+
+template <class Policy, class Iter, class T>
+void iota(Policy &&policy, Iter first, Iter last, T init) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter>::iterator_category,
+                   std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  iota(std::forward<Policy>(policy), first, last, init, T(1));
+}
+
+template <class Policy, class Iter>
+void iota(Policy &&policy, Iter first, Iter last) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter>::iterator_category,
+                   std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using DiffSize = typename std::iterator_traits<Iter>::difference_type;
+  iota(std::forward<Policy>(policy), first, last, DiffSize(0), DiffSize(1));
+}
+
+template <class Policy, class Iter1, class Iter2, class Comp>
+void sort(Policy &&policy, Iter1 keys_first, Iter1 keys_last,
+          Iter2 values_first, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  oneapi::dpl::sort_by_key(std::forward<Policy>(policy), keys_first, keys_last,
+                           values_first, comp);
+}
+
+template <class Policy, class Iter1, class Iter2>
+void sort(Policy &&policy, Iter1 keys_first, Iter1 keys_last,
+          Iter2 values_first) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  sort(std::forward<Policy>(policy), keys_first, keys_last, values_first,
+       internal::__less());
+}
+
+template <class Policy, class Iter1, class Iter2, class Comp>
+void stable_sort(Policy &&policy, Iter1 keys_first, Iter1 keys_last,
+                 Iter2 values_first, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  oneapi::dpl::stable_sort_by_key(std::forward<Policy>(policy), keys_first,
+                                  keys_last, values_first, comp);
+}
+
+template <class Policy, class Iter1, class Iter2>
+void stable_sort(Policy &&policy, Iter1 keys_first, Iter1 keys_last,
+                 Iter2 values_first) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  stable_sort(std::forward<Policy>(policy), keys_first, keys_last, values_first,
+              internal::__less());
+}
+
+template <class Policy, class Iter, class Operator>
+void for_each_index(Policy &&policy, Iter first, Iter last, Operator unary_op) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter>::iterator_category,
+                   std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  using DiffSize = typename std::iterator_traits<Iter>::difference_type;
+  std::transform(
+      std::forward<Policy>(policy), oneapi::dpl::counting_iterator<DiffSize>(0),
+      oneapi::dpl::counting_iterator<DiffSize>(std::distance(first, last)),
+      first, unary_op);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5>
+std::pair<Iter4, Iter5>
+set_intersection(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+                 Iter2 keys_first2, Iter2 keys_last2, Iter3 values_first1,
+                 Iter4 keys_result, Iter5 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_intersection(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2,
+                                     oneapi::dpl::discard_iterator()),
+      oneapi::dpl::make_zip_iterator(keys_last2,
+                                     oneapi::dpl::discard_iterator()),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<>());
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Comp>
+std::pair<Iter4, Iter5>
+set_intersection(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+                 Iter2 keys_first2, Iter2 keys_last2, Iter3 values_first1,
+                 Iter4 keys_result, Iter5 values_result, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_intersection(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2,
+                                     oneapi::dpl::discard_iterator()),
+      oneapi::dpl::make_zip_iterator(keys_last2,
+                                     oneapi::dpl::discard_iterator()),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<Comp>(comp));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6>
+std::pair<Iter5, Iter6>
+set_symmetric_difference(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+                         Iter2 keys_first2, Iter2 keys_last2,
+                         Iter3 values_first1, Iter4 values_first2,
+                         Iter5 keys_result, Iter6 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_symmetric_difference(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<>());
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6, class Comp>
+std::pair<Iter5, Iter6>
+set_symmetric_difference(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+                         Iter2 keys_first2, Iter2 keys_last2,
+                         Iter3 values_first1, Iter4 values_first2,
+                         Iter5 keys_result, Iter6 values_result, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_symmetric_difference(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<Comp>(comp));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6>
+std::pair<Iter5, Iter6>
+set_difference(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+               Iter2 keys_first2, Iter2 keys_last2, Iter3 values_first1,
+               Iter4 values_first2, Iter5 keys_result, Iter6 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_difference(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<>());
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6, class Comp>
+std::pair<Iter5, Iter6> set_difference(Policy &&policy, Iter1 keys_first1,
+                                       Iter1 keys_last1, Iter2 keys_first2,
+                                       Iter2 keys_last2, Iter3 values_first1,
+                                       Iter4 values_first2, Iter5 keys_result,
+                                       Iter6 values_result, Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_difference(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<Comp>(comp));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6>
+internal::enable_if_execution_policy<Policy, std::pair<Iter5, Iter6>>
+set_union(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+          Iter2 keys_first2, Iter2 keys_last2, Iter3 values_first1,
+          Iter4 values_first2, Iter5 keys_result, Iter6 values_result) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_union(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<>());
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <class Policy, class Iter1, class Iter2, class Iter3, class Iter4,
+          class Iter5, class Iter6, class Comp>
+internal::enable_if_execution_policy<Policy, std::pair<Iter5, Iter6>>
+set_union(Policy &&policy, Iter1 keys_first1, Iter1 keys_last1,
+          Iter2 keys_first2, Iter2 keys_last2, Iter3 values_first1,
+          Iter4 values_first2, Iter5 keys_result, Iter6 values_result,
+          Comp comp) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter5>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter6>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::set_union(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(keys_first1, values_first1),
+      oneapi::dpl::make_zip_iterator(
+          keys_last1, values_first1 + std::distance(keys_first1, keys_last1)),
+      oneapi::dpl::make_zip_iterator(keys_first2, values_first2),
+      oneapi::dpl::make_zip_iterator(
+          keys_last2, values_first2 + std::distance(keys_first2, keys_last2)),
+      oneapi::dpl::make_zip_iterator(keys_result, values_result),
+      internal::compare_key_fun<Comp>(comp));
+  auto n1 = std::distance(
+      oneapi::dpl::make_zip_iterator(keys_result, values_result), ret_val);
+  return std::make_pair(keys_result + n1, values_result + n1);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Pred>
+internal::enable_if_execution_policy<Policy, std::pair<Iter3, Iter4>>
+stable_partition_copy(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+                      Iter3 out_true, Iter4 out_false, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  auto ret_val = std::partition_copy(
+      std::forward<Policy>(policy), oneapi::dpl::make_zip_iterator(first, mask),
+      oneapi::dpl::make_zip_iterator(last, mask + std::distance(first, last)),
+      oneapi::dpl::make_zip_iterator(out_true, oneapi::dpl::discard_iterator()),
+      oneapi::dpl::make_zip_iterator(out_false,
+                                     oneapi::dpl::discard_iterator()),
+      internal::predicate_key_fun<Pred>(p));
+  return std::make_pair(std::get<0>(ret_val.first.base()),
+                        std::get<0>(ret_val.second.base()));
+}
+
+template <typename Policy, typename Iter1, typename Iter3, typename Iter4,
+          typename Pred>
+internal::enable_if_execution_policy<Policy, std::pair<Iter3, Iter4>>
+stable_partition_copy(Policy &&policy, Iter1 first, Iter1 last, Iter3 out_true,
+                      Iter4 out_false, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  return std::partition_copy(std::forward<Policy>(policy), first, last,
+                             out_true, out_false, p);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Pred>
+internal::enable_if_execution_policy<Policy, std::pair<Iter3, Iter4>>
+partition_copy(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask,
+               Iter3 out_true, Iter4 out_false, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter3>::iterator_category,
+                       std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter4>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  return stable_partition_copy(std::forward<Policy>(policy), first, last, mask,
+                               out_true, out_false, p);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred>
+internal::enable_if_hetero_execution_policy<Policy, Iter1>
+stable_partition(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  typedef typename std::decay<Policy>::type policy_type;
+  auto _partition_call1 =
+      internal::make_wrapped_policy<internal::partition_call1>(policy);
+  auto _copy_call1 =
+      internal::make_wrapped_policy<internal::copy_call1>(policy);
+  auto _copy_call2 = internal::make_wrapped_policy<internal::copy_call2>(
+      std::forward<Policy>(policy));
+  using _IterValueT = typename std::iterator_traits<Iter1>::value_type;
+
+  auto _n = std::distance(first, last);
+  internal::__buffer<_IterValueT> _tmp1(_n);
+  internal::__buffer<_IterValueT> _tmp2(_n);
+
+  auto _tmp1_first = _tmp1.get();
+  auto _tmp2_first = _tmp2.get();
+
+  auto _end_pair =
+      stable_partition_copy(std::move(_partition_call1), first, last, mask,
+                            _tmp1_first, _tmp2_first, p);
+  auto _first_part_end = std::copy(std::move(_copy_call1), _tmp1_first,
+                                   std::get<0>(_end_pair), first);
+  std::copy(std::move(_copy_call2), _tmp2_first, std::get<1>(_end_pair),
+            _first_part_end);
+
+  return _first_part_end;
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred>
+typename std::enable_if<!internal::is_hetero_execution_policy<
+                            typename std::decay<Policy>::type>::value,
+                        Iter1>::type
+stable_partition(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  typedef typename std::decay<Policy>::type policy_type;
+  std::vector<typename std::iterator_traits<Iter1>::value_type> _tmp(
+      std::distance(first, last));
+
+  std::copy(policy, mask, mask + std::distance(first, last), _tmp.begin());
+
+  auto ret_val = std::stable_partition(
+      std::forward<Policy>(policy),
+      oneapi::dpl::make_zip_iterator(first, _tmp.begin()),
+      oneapi::dpl::make_zip_iterator(last,
+                                     _tmp.begin() + std::distance(first, last)),
+      internal::predicate_key_fun<Pred>(p));
+  return std::get<0>(ret_val.base());
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Pred>
+internal::enable_if_execution_policy<Policy, Iter1>
+partition(Policy &&policy, Iter1 first, Iter1 last, Iter2 mask, Pred p) {
+  static_assert(
+      std::is_same<typename std::iterator_traits<Iter1>::iterator_category,
+                   std::random_access_iterator_tag>::value &&
+          std::is_same<typename std::iterator_traits<Iter2>::iterator_category,
+                       std::random_access_iterator_tag>::value,
+      "Iterators passed to algorithms must be random-access iterators.");
+  return stable_partition(std::forward<Policy>(policy), first, last, mask, p);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value &&
+                          dpct::internal::is_iterator<Iter3>::value &&
+                          dpct::internal::is_iterator<Iter4>::value>
+sort_pairs(Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+           Iter4 values_out, ::std::int64_t n, bool descending = false,
+           int begin_bit = 0,
+           int end_bit =
+               sizeof(typename ::std::iterator_traits<Iter1>::value_type) * 8);
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value>
+sort_keys(Policy &&policy, Iter1 keys_in, Iter2 keys_out, ::std::int64_t n,
+          bool descending = false, int begin_bit = 0,
+          int end_bit =
+              sizeof(typename ::std::iterator_traits<Iter1>::value_type) * 8);
+
+namespace internal {
+
+// Transforms key to a specific bit range and sorts the transformed key
+template <typename Policy, typename Iter1, typename Iter2,
+          typename TransformedKeyT>
+inline void transform_and_sort(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                               ::std::int64_t n, bool descending, int begin_bit,
+                               int end_bit) {
+  using key_t_value_t = typename std::iterator_traits<Iter1>::value_type;
+  auto trans_key =
+      translate_key<key_t_value_t, TransformedKeyT>(begin_bit, end_bit);
+
+  // Use of the comparison operator that is not simply std::greater() or
+  // std::less() will result in
+  //  not using radix sort which will cost some performance.  However, this is
+  //  necessary to provide the transformation of the key to the bitrange
+  //  desired.
+  auto partial_sort_with_comp = [&](const auto &comp) {
+    return oneapi::dpl::partial_sort_copy(
+        std::forward<Policy>(policy), keys_in, keys_in + n, keys_out,
+        keys_out + n, [=](const auto a, const auto b) {
+          return comp(trans_key(a), trans_key(b));
+        });
+  };
+  if (descending)
+    partial_sort_with_comp(::std::greater<TransformedKeyT>());
+  else
+    partial_sort_with_comp(::std::less<TransformedKeyT>());
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline void sort_only(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                      ::std::int64_t n, bool descending) {
+  using key_t_value_t = typename ::std::iterator_traits<Iter1>::value_type;
+
+  if constexpr (::std::is_floating_point<key_t_value_t>::value) {
+    if (descending) {
+      // Comparison operator that is not std::greater() ensures stability of
+      // -0.0 and 0.0
+      // at the cost of some performance because radix sort will not be used.
+      auto comp_descending = [=](const auto a, const auto b) { return a > b; };
+
+      oneapi::dpl::partial_sort_copy(::std::forward<Policy>(policy), keys_in,
+                                     keys_in + n, keys_out, keys_out + n,
+                                     comp_descending);
+    } else {
+      // Comparison operator that is not std::less() ensures stability of -0.0
+      // and 0.0
+      // at the cost of some performance because radix sort will not be used.
+      auto comp_ascending = [=](const auto a, const auto b) { return a < b; };
+
+      oneapi::dpl::partial_sort_copy(::std::forward<Policy>(policy), keys_in,
+                                     keys_in + n, keys_out, keys_out + n,
+                                     comp_ascending);
+    }
+  } else {
+    if (descending) {
+      oneapi::dpl::partial_sort_copy(::std::forward<Policy>(policy), keys_in,
+                                     keys_in + n, keys_out, keys_out + n,
+                                     ::std::greater<key_t_value_t>());
+    } else {
+
+      oneapi::dpl::partial_sort_copy(::std::forward<Policy>(policy), keys_in,
+                                     keys_in + n, keys_out, keys_out + n);
+    }
+  }
+}
+
+// Transforms key from a pair to a specific bit range and sorts the pairs by the
+// transformed key
+template <typename Policy, typename Iter1, typename Iter2,
+          typename TransformedKeyT, typename Iter3, typename Iter4>
+inline void
+transform_and_sort_pairs(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                         Iter3 values_in, Iter4 values_out, ::std::int64_t n,
+                         bool descending, int begin_bit, int end_bit) {
+  using key_t_value_t = typename std::iterator_traits<Iter1>::value_type;
+  auto zip_input = oneapi::dpl::zip_iterator(keys_in, values_in);
+  auto zip_output = oneapi::dpl::zip_iterator(keys_out, values_out);
+  auto trans_key =
+      translate_key<key_t_value_t, TransformedKeyT>(begin_bit, end_bit);
+
+  // Use of the comparison operator that is not simply std::greater() or
+  // std::less() will result in
+  //  not using radix sort which will cost some performance.  However, this is
+  //  necessary to provide the transformation of the key to the bitrange desired
+  //  and also to select the key from the zipped pair.
+  auto load_val = [=](const auto a) { return trans_key(std::get<0>(a)); };
+
+  auto partial_sort_with_comp = [&](const auto &comp) {
+    return oneapi::dpl::partial_sort_copy(
+        std::forward<Policy>(policy), zip_input, zip_input + n, zip_output,
+        zip_output + n, [=](const auto a, const auto b) {
+          return comp(load_val(a), load_val(b));
+        });
+  };
+  if (descending)
+    partial_sort_with_comp(::std::greater<key_t_value_t>());
+  else
+    partial_sort_with_comp(::std::less<key_t_value_t>());
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4>
+inline void sort_only_pairs(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                            Iter3 values_in, Iter4 values_out, ::std::int64_t n,
+                            bool descending) {
+  using key_t_value_t = typename ::std::iterator_traits<Iter1>::value_type;
+  auto zip_input = oneapi::dpl::zip_iterator(keys_in, values_in);
+  auto zip_output = oneapi::dpl::zip_iterator(keys_out, values_out);
+
+  // Use of the comparison operator that is not simply std::greater() or
+  // std::less() will result in
+  //  not using radix sort which will cost some performance.  However, this is
+  //  necessary to select the key from the zipped pair.
+  auto load_val = [=](const auto a) { return std::get<0>(a); };
+
+  auto partial_sort_with_comp = [&](const auto &comp) {
+    return oneapi::dpl::partial_sort_copy(
+        std::forward<Policy>(policy), zip_input, zip_input + n, zip_output,
+        zip_output + n, [=](const auto a, const auto b) {
+          return comp(load_val(a), load_val(b));
+        });
+  };
+  if (descending)
+    partial_sort_with_comp(::std::greater<key_t_value_t>());
+  else
+    partial_sort_with_comp(::std::less<key_t_value_t>());
+}
+
+// overload for Iter2 != std::nullptr_t
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4>
+typename ::std::enable_if<!::std::is_null_pointer<Iter2>::value>::type
+sort_pairs_impl(Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+                Iter4 values_out, ::std::int64_t n, bool descending,
+                int begin_bit, int end_bit) {
+  using key_t_value_t = typename ::std::iterator_traits<Iter1>::value_type;
+
+  int clipped_begin_bit = (::std::max)(begin_bit, 0);
+  int clipped_end_bit =
+      (::std::min)((::std::uint64_t)end_bit, sizeof(key_t_value_t) * 8);
+  int num_bytes = (clipped_end_bit - clipped_begin_bit - 1) / 8 + 1;
+
+  auto transform_and_sort_pairs_f = [&](auto x) {
+    using T = typename ::std::decay_t<decltype(x)>;
+    internal::transform_and_sort_pairs<decltype(policy), Iter1, Iter2, T, Iter3,
+                                       Iter4>(
+        ::std::forward<Policy>(policy), keys_in, keys_out, values_in,
+        values_out, n, descending, clipped_begin_bit, clipped_end_bit);
+  };
+
+  if (clipped_end_bit - clipped_begin_bit == sizeof(key_t_value_t) * 8) {
+    internal::sort_only_pairs(::std::forward<Policy>(policy), keys_in, keys_out,
+                              values_in, values_out, n, descending);
+  } else if (num_bytes == 1) {
+    transform_and_sort_pairs_f.template operator()<uint8_t>(0);
+  } else if (num_bytes == 2) {
+    transform_and_sort_pairs_f.template operator()<uint16_t>(0);
+  } else if (num_bytes <= 4) {
+    transform_and_sort_pairs_f.template operator()<uint32_t>(0);
+  } else // if (num_bytes <= 8)
+  {
+    transform_and_sort_pairs_f.template operator()<::std::uint64_t>(0);
+  }
+}
+
+// overload for Iter2 == std::nullptr_t
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4>
+typename ::std::enable_if<::std::is_null_pointer<Iter2>::value>::type
+sort_pairs_impl(Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+                Iter4 values_out, ::std::int64_t n, bool descending,
+                int begin_bit, int end_bit) {
+  // create temporary keys_out to discard, memory footprint could be improved by
+  // a specialized iterator with a single
+  // unchanging dummy Iter1 element
+  using key_t_value_t = typename std::iterator_traits<Iter1>::value_type;
+  sycl::buffer<key_t_value_t, 1> temp_keys_out{sycl::range<1>(n)};
+  internal::sort_pairs_impl(std::forward<Policy>(policy), keys_in,
+                            oneapi::dpl::begin(temp_keys_out), values_in,
+                            values_out, n, descending, begin_bit, end_bit);
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Iter5>
+inline void segmented_sort_pairs_by_parallel_sorts(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter4 values_in,
+    Iter3 values_out, ::std::int64_t n, ::std::int64_t nsegments,
+    Iter5 begin_offsets, Iter5 end_offsets, bool descending = false,
+    int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  using offset_type = typename ::std::iterator_traits<Iter5>::value_type;
+  ::std::vector<offset_type> host_accessible_offset_starts(nsegments);
+  ::std::vector<offset_type> host_accessible_offset_ends(nsegments);
+  // make offsets accessible on host
+  ::std::copy(policy, begin_offsets, begin_offsets + nsegments,
+              host_accessible_offset_starts.begin());
+  ::std::copy(policy, end_offsets, end_offsets + nsegments,
+              host_accessible_offset_ends.begin());
+
+  for (::std::uint64_t i = 0; i < nsegments; i++) {
+    ::std::uint64_t segment_begin = host_accessible_offset_starts[i];
+    ::std::uint64_t segment_end =
+        (::std::min)(n, (::std::int64_t)host_accessible_offset_ends[i]);
+    if (segment_begin < segment_end) {
+      ::dpct::sort_pairs(
+          policy, keys_in + segment_begin, keys_out + segment_begin,
+          values_in + segment_begin, values_out + segment_begin,
+          segment_end - segment_begin, descending, begin_bit, end_bit);
+    }
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline void segmented_sort_keys_by_parallel_sorts(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, ::std::int64_t n,
+    ::std::int64_t nsegments, Iter3 begin_offsets, Iter3 end_offsets,
+    bool descending = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  using offset_type = typename ::std::iterator_traits<Iter3>::value_type;
+  ::std::vector<offset_type> host_accessible_offset_starts(nsegments);
+  ::std::vector<offset_type> host_accessible_offset_ends(nsegments);
+  // make offsets accessible on host
+  ::std::copy(policy, begin_offsets, begin_offsets + nsegments,
+              host_accessible_offset_starts.begin());
+  ::std::copy(policy, end_offsets, end_offsets + nsegments,
+              host_accessible_offset_ends.begin());
+
+  for (::std::uint64_t i = 0; i < nsegments; i++) {
+    ::std::uint64_t segment_begin = host_accessible_offset_starts[i];
+    ::std::uint64_t segment_end =
+        (::std::min)(n, (::std::int64_t)host_accessible_offset_ends[i]);
+    if (segment_begin < segment_end) {
+      ::dpct::sort_keys(policy, keys_in + segment_begin,
+                        keys_out + segment_begin, segment_end - segment_begin,
+                        descending, begin_bit, end_bit);
+    }
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Iter5>
+inline void segmented_sort_pairs_by_parallel_for_of_sorts(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+    Iter4 values_out, ::std::int64_t n, ::std::int64_t nsegments,
+    Iter5 begin_offsets, Iter5 end_offsets, bool descending = false,
+    int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  policy.queue().submit([&](sycl::handler &cgh) {
+    cgh.parallel_for(nsegments, [=](sycl::id<1> i) {
+      ::std::uint64_t segment_begin = begin_offsets[i];
+      ::std::uint64_t segment_end =
+          (::std::min)(n, (::std::int64_t)end_offsets[i]);
+      if (segment_begin == segment_end) {
+        return;
+      }
+      ::dpct::sort_pairs(::std::execution::seq, keys_in + segment_begin,
+                         keys_out + segment_begin, values_in + segment_begin,
+                         values_out + segment_begin,
+                         segment_end - segment_begin, descending, begin_bit,
+                         end_bit);
+    });
+  });
+  policy.queue().wait();
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline void segmented_sort_keys_by_parallel_for_of_sorts(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, ::std::int64_t n,
+    ::std::int64_t nsegments, Iter3 begin_offsets, Iter3 end_offsets,
+    bool descending = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  policy.queue().submit([&](sycl::handler &cgh) {
+    cgh.parallel_for(nsegments, [=](sycl::id<1> i) {
+      ::std::uint64_t segment_begin = begin_offsets[i];
+      ::std::uint64_t segment_end =
+          (::std::min)(n, (::std::int64_t)end_offsets[i]);
+      if (segment_begin == segment_end) {
+        return;
+      }
+      ::dpct::sort_keys(::std::execution::seq, keys_in + segment_begin,
+                        keys_out + segment_begin, segment_end - segment_begin,
+                        descending, begin_bit, end_bit);
+    });
+  });
+  policy.queue().wait();
+}
+
+template <typename Policy, typename OffsetIteratorT>
+inline void mark_segments(Policy &&policy, OffsetIteratorT begin_offsets,
+                          OffsetIteratorT end_offsets, ::std::int64_t n,
+                          ::std::int64_t nsegments,
+                          sycl::buffer<::std::size_t, 1> segments) {
+
+  ::std::size_t work_group_size =
+      policy.queue()
+          .get_device()
+          .template get_info<sycl::info::device::max_work_group_size>();
+
+  auto sg_sizes = policy.queue()
+                      .get_device()
+                      .template get_info<sycl::info::device::sub_group_sizes>();
+  ::std::size_t sub_group_size = sg_sizes.empty() ? 0 : sg_sizes.back();
+
+  float avg_seg_size = (float)n / (float)nsegments;
+  if (avg_seg_size > work_group_size) {
+    // If average segment size is larger than workgroup, use workgroup to
+    // coordinate to mark segments
+    policy.queue()
+        .submit([&](sycl::handler &h) {
+          auto segments_acc = segments.get_access<sycl::access_mode::write>(h);
+          h.parallel_for(work_group_size, ([=](sycl::id<1> id) {
+                           for (::std::size_t seg = 0; seg < nsegments; seg++) {
+                             ::std::size_t i = begin_offsets[seg];
+                             ::std::size_t end = end_offsets[seg];
+                             while (i + id < end) {
+                               segments_acc[i + id] = seg;
+                               i += work_group_size;
+                             }
+                           }
+                         }));
+        })
+        .wait();
+  } else if (sub_group_size > 0 && avg_seg_size > sub_group_size / 2) {
+    // If average segment size is larger than half a subgroup, use subgroup to
+    // coordinate to mark segments
+    policy.queue()
+        .submit([&](sycl::handler &h) {
+          auto segments_acc = segments.get_access<sycl::access_mode::write>(h);
+          h.parallel_for(
+              sycl::nd_range<1>{work_group_size, work_group_size},
+              ([=](sycl::nd_item<1> item) {
+                auto sub_group = item.get_sub_group();
+                ::std::size_t num_subgroups =
+                    sub_group.get_group_range().size();
+                ::std::size_t local_size = sub_group.get_local_range().size();
+
+                ::std::size_t sub_group_id = sub_group.get_group_id();
+                while (sub_group_id < nsegments) {
+                  ::std::size_t subgroup_local_id = sub_group.get_local_id();
+                  ::std::size_t i = begin_offsets[sub_group_id];
+                  ::std::size_t end = end_offsets[sub_group_id];
+                  while (i + subgroup_local_id < end) {
+                    segments_acc[i + subgroup_local_id] = sub_group_id;
+                    i += local_size;
+                  }
+                  sub_group_id += num_subgroups;
+                }
+              }));
+        })
+        .wait();
+  } else {
+    // If average segment size is small as compared to subgroup, use single
+    // work item to mark each segment
+    policy.queue()
+        .submit([&](sycl::handler &h) {
+          auto segments_acc = segments.get_access<sycl::access_mode::write>(h);
+          h.parallel_for(nsegments, ([=](sycl::id<1> seg) {
+                           for (::std::size_t i = begin_offsets[seg];
+                                i < end_offsets[seg]; i++) {
+                             segments_acc[i] = seg;
+                           }
+                         }));
+        })
+        .wait();
+  }
+}
+
+// The dpl_histogram namespace contains a temporary preview of an upcoming
+// oneDPL histogram API.  This namespace will be removed and replaced with
+// corresponding calls to oneapi::dpl::histogram()
+namespace dpl_histogram {
+
+template <typename T1, typename T2>
+constexpr inline auto __ceiling_div(const T1 &number, const T2 &divisor) {
+  return (number - 1) / divisor + 1;
+}
+
+template <typename T1, bool _IsFloatingPoint>
+struct __evenly_divided_binhash_impl {};
+
+template <typename T>
+struct __evenly_divided_binhash_impl<T, /* is_floating_point = */ true> {
+  T __minimum;
+  ::std::uint32_t __num_bins;
+  T __scale;
+  T __maximum;
+  __evenly_divided_binhash_impl(const T &min, const T &max,
+                                const ::std::uint32_t &num_bins)
+      : __minimum(min), __maximum(max), __num_bins(num_bins),
+        __scale(T(num_bins) / (max - min)) {}
+  template <typename T2> std::uint32_t operator()(T2 &&value) const {
+    return ::std::uint32_t((::std::forward<T2>(value) - __minimum) * __scale);
+  }
+
+  template <typename T2> bool is_valid(const T2 &value) const {
+    return value >= __minimum && value < __maximum;
+  }
+};
+
+// non floating point type
+template <typename T>
+struct __evenly_divided_binhash_impl<T, /* is_floating_point= */ false> {
+  T __minimum;
+  ::std::uint32_t __num_bins;
+  T __range_size;
+  __evenly_divided_binhash_impl(const T &min, const T &max,
+                                const ::std::uint32_t &num_bins)
+      : __minimum(min), __num_bins(num_bins), __range_size(max - min) {}
+  template <typename T2>::std::uint32_t operator()(T2 &&value) const {
+    return ::std::uint32_t(
+        ((::std::uint64_t(::std::forward<T2>(value)) - __minimum) *
+         ::std::uint64_t(__num_bins)) /
+        __range_size);
+  }
+
+  template <typename T2> bool is_valid(const T2 &value) const {
+    return value >= __minimum && value < __minimum + __range_size;
+  }
+};
+
+template <typename T1>
+using __evenly_divided_binhash =
+    __evenly_divided_binhash_impl<T1, ::std::is_floating_point_v<T1>>;
+
+template <typename Range> struct __custom_range_binhash {
+  Range __boundaries;
+  __custom_range_binhash(Range boundaries) : __boundaries(boundaries) {}
+
+  template <typename T>::std::uint32_t operator()(T &&value) const {
+    return (::std::upper_bound(__boundaries.begin(), __boundaries.end(),
+                               ::std::forward<T>(value)) -
+            __boundaries.begin()) -
+           1;
+  }
+
+  template <typename T2> bool is_valid(const T2 &value) const {
+    return value >= __boundaries[0] &&
+           value < __boundaries[__boundaries.size() - 1];
+  }
+};
+
+template <typename HistAccessor, typename OffsetT, typename Size>
+inline void __clear_wglocal_histograms(const HistAccessor &local_histogram,
+                                       const OffsetT &offset,
+                                       const Size &num_bins,
+                                       const sycl::nd_item<1> &self_item) {
+  ::std::uint32_t gSize = self_item.get_local_range()[0];
+  ::std::uint32_t self_lidx = self_item.get_local_id(0);
+  ::std::uint8_t factor = __ceiling_div(num_bins, gSize);
+  ::std::uint8_t k;
+  _DPCT_PRAGMA_UNROLL
+  for (k = 0; k < factor - 1; k++) {
+    local_histogram[offset + gSize * k + self_lidx] = 0;
+  }
+  if (gSize * k + self_lidx < num_bins) {
+    local_histogram[offset + gSize * k + self_lidx] = 0;
+  }
+  self_item.barrier(sycl::access::fence_space::local_space);
+}
+
+template <typename BinIdxType, typename Iter1, typename HistReg,
+          typename BinFunc>
+inline void __accum_local_register_iter(const Iter1 &in_acc,
+                                        const ::std::size_t &index,
+                                        HistReg *histogram, BinFunc func) {
+  const auto &x = in_acc[index];
+  if (func.is_valid(x)) {
+    BinIdxType c = func(x);
+    histogram[c]++;
+  }
+}
+
+template <typename BinIdxType, sycl::access::address_space AddressSpace,
+          typename Iter1, typename HistAccessor, typename OffsetT,
+          typename BinFunc>
+inline void __accum_local_atomics_iter(const Iter1 &in_acc,
+                                       const ::std::size_t &index,
+                                       const HistAccessor &wg_local_histogram,
+                                       const OffsetT &offset, BinFunc func) {
+  using __histo_value_type = typename HistAccessor::value_type;
+  const auto &x = in_acc[index];
+  if (func.is_valid(x)) {
+    BinIdxType c = func(x);
+    sycl::atomic_ref<__histo_value_type, sycl::memory_order::relaxed,
+                     sycl::memory_scope::work_group, AddressSpace>
+        local_bin(wg_local_histogram[offset + c]);
+    local_bin++;
+  }
+}
+
+template <typename BinType, typename HistAccessorIn, typename OffsetT,
+          typename HistAccessorOut, typename Size>
+inline void __reduce_out_histograms(const HistAccessorIn &in_histogram,
+                                    const OffsetT &offset,
+                                    const HistAccessorOut &out_histogram,
+                                    const Size &num_bins,
+                                    const sycl::nd_item<1> &self_item) {
+  ::std::uint32_t gSize = self_item.get_local_range()[0];
+  ::std::uint32_t self_lidx = self_item.get_local_id(0);
+  ::std::uint8_t factor = __ceiling_div(num_bins, gSize);
+  ::std::uint8_t k;
+
+  _DPCT_PRAGMA_UNROLL
+  for (k = 0; k < factor - 1; k++) {
+    sycl::atomic_ref<BinType, sycl::memory_order::relaxed,
+                     sycl::memory_scope::device,
+                     sycl::access::address_space::global_space>
+        global_bin(out_histogram[gSize * k + self_lidx]);
+    global_bin += in_histogram[offset + gSize * k + self_lidx];
+  }
+  if (gSize * k + self_lidx < num_bins) {
+    sycl::atomic_ref<BinType, sycl::memory_order::relaxed,
+                     sycl::memory_scope::device,
+                     sycl::access::address_space::global_space>
+        global_bin(out_histogram[gSize * k + self_lidx]);
+    global_bin += in_histogram[offset + gSize * k + self_lidx];
+  }
+}
+
+template <::std::uint16_t ItersPerWorkItem, ::std::uint8_t BinsPerWorkItem,
+          typename BinType, typename Policy, typename Range1, typename Range2,
+          typename Size, typename IdxHashFunc, typename... Range3>
+inline void __histogram_general_registers_local_reduction(
+    Policy &&policy, ::std::uint16_t work_group_size, Range1 &&input,
+    Range2 &&bins, const Size &num_bins, IdxHashFunc func,
+    Range3 &&...opt_range) {
+  const ::std::size_t N = input.size();
+  using __local_histogram_type = ::std::uint32_t;
+  using __private_histogram_type = ::std::uint16_t;
+
+  ::std::size_t segments = __ceiling_div(N, work_group_size * ItersPerWorkItem);
+  auto e = policy.queue().submit([&](auto &h) {
+    // Temporary use of stable non-public API from oneDPL,  this function will
+    // be replaced with oneDPL call in an upcoming release.
+    oneapi::dpl::__ranges::__require_access(h, input, bins, opt_range...);
+    sycl::local_accessor<__local_histogram_type, 1> local_histogram(
+        sycl::range(num_bins), h);
+    h.parallel_for(
+        sycl::nd_range<1>(segments * work_group_size, work_group_size),
+        [=](sycl::nd_item<1> __self_item) {
+          using __bin_idx_type = ::std::uint8_t;
+          const ::std::size_t __self_lidx = __self_item.get_local_id(0);
+          const ::std::size_t __wgroup_idx = __self_item.get_group(0);
+          const ::std::size_t __seg_start =
+              work_group_size * ItersPerWorkItem * __wgroup_idx;
+
+          __clear_wglocal_histograms(local_histogram, 0, num_bins, __self_item);
+          __private_histogram_type histogram[BinsPerWorkItem];
+          _DPCT_PRAGMA_UNROLL
+          for (::std::uint8_t k = 0; k < BinsPerWorkItem; k++) {
+            histogram[k] = 0;
+          }
+
+          if (__seg_start + work_group_size * ItersPerWorkItem < N) {
+            _DPCT_PRAGMA_UNROLL
+            for (::std::uint8_t idx = 0; idx < ItersPerWorkItem; idx++) {
+              __accum_local_register_iter<__bin_idx_type>(
+                  input, __seg_start + idx * work_group_size + __self_lidx,
+                  histogram, func);
+            }
+          } else {
+            _DPCT_PRAGMA_UNROLL
+            for (::std::uint8_t idx = 0; idx < ItersPerWorkItem; idx++) {
+              ::std::size_t __val_idx =
+                  __seg_start + idx * work_group_size + __self_lidx;
+              if (__val_idx < N) {
+                __accum_local_register_iter<__bin_idx_type>(input, __val_idx,
+                                                            histogram, func);
+              }
+            }
+          }
+
+          _DPCT_PRAGMA_UNROLL
+          for (::std::uint8_t k = 0; k < num_bins; k++) {
+            sycl::atomic_ref<__local_histogram_type,
+                             sycl::memory_order::relaxed,
+                             sycl::memory_scope::work_group,
+                             sycl::access::address_space::local_space>
+                local_bin(local_histogram[k]);
+            local_bin += histogram[k];
+          }
+
+          __self_item.barrier(sycl::access::fence_space::local_space);
+
+          __reduce_out_histograms<BinType>(local_histogram, 0, bins, num_bins,
+                                           __self_item);
+        });
+  });
+  e.wait();
+}
+
+template <::std::uint16_t ItersPerWorkItem, typename BinType, typename Policy,
+          typename Range1, typename Range2, typename Size, typename IdxHashFunc,
+          typename... Range3>
+inline void __histogram_general_local_atomics(Policy &&policy,
+                                              ::std::uint16_t work_group_size,
+                                              Range1 &&input, Range2 &&bins,
+                                              const Size &num_bins,
+                                              IdxHashFunc func,
+                                              Range3 &&...opt_range) {
+  const ::std::size_t N = input.size();
+  ::std::size_t segments = __ceiling_div(N, work_group_size * ItersPerWorkItem);
+  auto e = policy.queue().submit([&](auto &h) {
+    // Temporary use of stable non-public API from oneDPL,  this function will
+    // be replaced with oneDPL call in an upcoming release.
+    oneapi::dpl::__ranges::__require_access(h, input, bins, opt_range...);
+    sycl::local_accessor<::std::uint32_t, 1> local_histogram(
+        sycl::range(num_bins), h);
+    h.parallel_for(
+        sycl::nd_range<1>(segments * work_group_size, work_group_size),
+        [=](sycl::nd_item<1> __self_item) {
+          using __bin_idx_type = ::std::uint16_t;
+          constexpr auto __atomic_address_space =
+              sycl::access::address_space::local_space;
+          const ::std::size_t __self_lidx = __self_item.get_local_id(0);
+          const ::std::uint32_t __wgroup_idx = __self_item.get_group(0);
+          const ::std::size_t __seg_start =
+              work_group_size * __wgroup_idx * ItersPerWorkItem;
+
+          __clear_wglocal_histograms(local_histogram, 0, num_bins, __self_item);
+
+          if (__seg_start + work_group_size * ItersPerWorkItem < N) {
+            _DPCT_PRAGMA_UNROLL
+            for (::std::uint8_t idx = 0; idx < ItersPerWorkItem; idx++) {
+              __accum_local_atomics_iter<__bin_idx_type,
+                                         __atomic_address_space>(
+                  input, __seg_start + idx * work_group_size + __self_lidx,
+                  local_histogram, 0, func);
+            }
+          } else {
+            _DPCT_PRAGMA_UNROLL
+            for (::std::uint8_t idx = 0; idx < ItersPerWorkItem; idx++) {
+              ::std::size_t __val_idx =
+                  __seg_start + idx * work_group_size + __self_lidx;
+              if (__val_idx < N) {
+                __accum_local_atomics_iter<__bin_idx_type,
+                                           __atomic_address_space>(
+                    input, __val_idx, local_histogram, 0, func);
+              }
+            }
+          }
+          __self_item.barrier(sycl::access::fence_space::local_space);
+
+          __reduce_out_histograms<BinType>(local_histogram, 0, bins, num_bins,
+                                           __self_item);
+        });
+  });
+
+  e.wait();
+}
+
+template <::std::uint16_t __min_iters_per_work_item, typename BinType,
+          typename Policy, typename Range1, typename Range2, typename Size,
+          typename IdxHashFunc, typename... Range3>
+inline void __histogram_general_private_global_atomics(
+    Policy &&policy, ::std::uint16_t work_group_size, Range1 &&input,
+    Range2 &&bins, const Size &num_bins, IdxHashFunc func,
+    Range3 &&...opt_range) {
+
+  const ::std::size_t N = input.size();
+  auto __global_mem_size =
+      policy.queue()
+          .get_device()
+          .template get_info<sycl::info::device::global_mem_size>();
+  const ::std::size_t max_segments = (::std::min)(
+      __global_mem_size / (num_bins * sizeof(BinType)),
+      __ceiling_div(N, work_group_size * __min_iters_per_work_item));
+  const ::std::size_t iters_per_work_item =
+      __ceiling_div(N, max_segments * work_group_size);
+  ::std::size_t segments =
+      __ceiling_div(N, work_group_size * iters_per_work_item);
+
+  sycl::buffer<BinType, 1> private_histograms(
+      sycl::range<1>(segments * num_bins));
+
+  auto e = policy.queue().submit([&](auto &h) {
+    // Temporary use of stable non-public API from oneDPL,  this function will
+    // be replaced with oneDPL call in an upcoming release.
+    oneapi::dpl::__ranges::__require_access(h, input, bins, opt_range...);
+    sycl::accessor hacc_private(private_histograms, h, sycl::read_write,
+                                sycl::no_init);
+    h.parallel_for(
+        sycl::nd_range<1>(segments * work_group_size, work_group_size),
+        [=](sycl::nd_item<1> __self_item) {
+          using __bin_idx_type = ::std::uint32_t;
+          constexpr auto __atomic_address_space =
+              sycl::access::address_space::global_space;
+          const ::std::size_t __self_lidx = __self_item.get_local_id(0);
+          const ::std::size_t __wgroup_idx = __self_item.get_group(0);
+          const ::std::size_t __seg_start =
+              work_group_size * iters_per_work_item * __wgroup_idx;
+
+          __clear_wglocal_histograms(hacc_private, __wgroup_idx * num_bins,
+                                     num_bins, __self_item);
+          if (__seg_start + work_group_size * iters_per_work_item < N) {
+            for (::std::size_t idx = 0; idx < iters_per_work_item; idx++) {
+              __accum_local_atomics_iter<__bin_idx_type,
+                                         __atomic_address_space>(
+                  input, __seg_start + idx * work_group_size + __self_lidx,
+                  hacc_private, __wgroup_idx * num_bins, func);
+            }
+          } else {
+            for (::std::size_t idx = 0; idx < iters_per_work_item; idx++) {
+              ::std::size_t __val_idx =
+                  __seg_start + idx * work_group_size + __self_lidx;
+              if (__val_idx < N) {
+                __accum_local_atomics_iter<__bin_idx_type,
+                                           __atomic_address_space>(
+                    input, __val_idx, hacc_private, __wgroup_idx * num_bins,
+                    func);
+              }
+            }
+          }
+          __self_item.barrier(sycl::access::fence_space::local_space);
+
+          __reduce_out_histograms<BinType>(hacc_private,
+                                           __wgroup_idx * num_bins, bins,
+                                           num_bins, __self_item);
+        });
+  });
+  e.wait();
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Size,
+          typename IdxHashFunc, typename... Range>
+inline Iter2
+__histogram_general_select_best(Policy &&policy, Iter1 first, Iter1 last,
+                                Iter2 histogram_first, const Size &num_bins,
+                                IdxHashFunc func, Range &&...opt_range) {
+  using __histo_value_type = typename ::std::iterator_traits<Iter2>::value_type;
+  auto __local_mem_size =
+      policy.queue()
+          .get_device()
+          .template get_info<sycl::info::device::local_mem_size>();
+  constexpr ::std::uint8_t __max_registers = 16;
+
+  // Temporary use of stable non-public API from oneDPL,  this function will be
+  // replaced with oneDPL call in an upcoming release.
+  auto keep_bins = oneapi::dpl::__ranges::__get_sycl_range<
+      oneapi::dpl::__par_backend_hetero::access_mode::write, Iter2>();
+  auto bins_buf = keep_bins(histogram_first, histogram_first + num_bins);
+
+  oneapi::dpl::fill(policy, bins_buf.all_view().begin(),
+                    bins_buf.all_view().end(), __histo_value_type(0));
+  auto N = last - first;
+  if (N > 0) {
+    // Temporary use of stable non-public API from oneDPL,  this function will
+    // be replaced with oneDPL call in an upcoming release.
+    auto keep_input = oneapi::dpl::__ranges::__get_sycl_range<
+        oneapi::dpl::__par_backend_hetero::access_mode::read, Iter1>();
+    auto input_buf = keep_input(first, last);
+
+    ::std::size_t max_work_group_size =
+        policy.queue()
+            .get_device()
+            .template get_info<sycl::info::device::max_work_group_size>();
+    ::std::size_t work_group_size =
+        (::std::min)(max_work_group_size, ::std::size_t(1024));
+
+    if (num_bins < __max_registers) {
+
+      // If bins fit into registers, use register private accumulation
+      __histogram_general_registers_local_reduction<32, 16, __histo_value_type>(
+          ::std::forward<Policy>(policy), work_group_size, input_buf.all_view(),
+          bins_buf.all_view(), num_bins, func,
+          ::std::forward<Range...>(opt_range)...);
+    } else if (num_bins * sizeof(__histo_value_type) < __local_mem_size) {
+      // If bins fit into SLM, use local atomics
+
+      // Experimentally determined iters per work-item
+      if (N <= 524288) {
+        __histogram_general_local_atomics<4, __histo_value_type>(
+            ::std::forward<Policy>(policy), work_group_size,
+            input_buf.all_view(), bins_buf.all_view(), num_bins, func,
+            ::std::forward<Range...>(opt_range)...);
+      } else {
+        __histogram_general_local_atomics<32, __histo_value_type>(
+            ::std::forward<Policy>(policy), work_group_size,
+            input_buf.all_view(), bins_buf.all_view(), num_bins, func,
+            ::std::forward<Range...>(opt_range)...);
+      }
+    } else // Otherwise, use global atomics (private copies per workgroup)
+    {
+      // Experimentally determined iters per work-item
+      if (N <= 524288) {
+        __histogram_general_private_global_atomics<4, __histo_value_type>(
+            ::std::forward<Policy>(policy), work_group_size,
+            input_buf.all_view(), bins_buf.all_view(), num_bins, func,
+            ::std::forward<Range...>(opt_range)...);
+      } else {
+        __histogram_general_private_global_atomics<32, __histo_value_type>(
+            ::std::forward<Policy>(policy), work_group_size,
+            input_buf.all_view(), bins_buf.all_view(), num_bins, func,
+            ::std::forward<Range...>(opt_range)...);
+      }
+    }
+  }
+  return histogram_first + num_bins;
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Size,
+          typename T>
+inline ::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+        dpct::internal::is_iterator<Iter2>::value &&
+        internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value,
+    Iter2>
+histogram(Policy &&policy, Iter1 first, Iter1 last, Iter2 histogram_first,
+          const Size &num_bins, const T &first_bin_min_val,
+          const T &last_bin_max_val) {
+  return __histogram_general_select_best(
+      ::std::forward<Policy>(policy), first, last, histogram_first, num_bins,
+      __evenly_divided_binhash<T>(first_bin_min_val, last_bin_max_val,
+                                  num_bins));
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline ::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+        dpct::internal::is_iterator<Iter2>::value &&
+        dpct::internal::is_iterator<Iter3>::value &&
+        internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value,
+    Iter2>
+histogram(Policy &&policy, Iter1 first, Iter1 last, Iter2 histogram_first,
+          Iter3 boundary_first, Iter3 boundary_last) {
+  // Temporary use of stable non-public API from oneDPL,  this function will be
+  // replaced with oneDPL call in an upcoming release.
+  auto keep_boundaries = oneapi::dpl::__ranges::__get_sycl_range<
+      oneapi::dpl::__par_backend_hetero::access_mode::read, Iter3>();
+  auto boundary_buf = keep_boundaries(boundary_first, boundary_last);
+
+  return __histogram_general_select_best(
+      ::std::forward<Policy>(policy), first, last, histogram_first,
+      (boundary_last - boundary_first) - 1,
+      __custom_range_binhash{boundary_buf.all_view()}, boundary_buf.all_view());
+}
+} // end namespace dpl_histogram
+
+} // end namespace internal
+
+// Evenly Divided Histogram of a 1-D array
+template <typename Policy, typename Iter1, typename Iter2, typename T,
+          typename Size>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+histogram_even(Policy &&policy, Iter1 d_samples, Iter2 d_histogram,
+               int num_levels, T lower_level, T upper_level, Size num_samples) {
+  internal::dpl_histogram::histogram(::std::forward<Policy>(policy), d_samples,
+                                     d_samples + num_samples, d_histogram,
+                                     num_levels - 1, lower_level, upper_level);
+}
+
+// Evenly Divided Histogram of a 2-D ROI in a flattened 2-D array
+template <typename Policy, typename Iter1, typename Iter2, typename T,
+          typename OffsetT>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+histogram_even_roi(Policy &&policy, Iter1 d_samples, Iter2 d_histogram,
+                   int num_levels, T lower_level, T upper_level,
+                   OffsetT num_row_samples, OffsetT num_rows,
+                   ::std::size_t row_stride_bytes) {
+  return histogram_even(
+      ::std::forward<Policy>(policy),
+      oneapi::dpl::permutation_iterator(
+          d_samples,
+          internal::__roi_2d_index_functor(
+              num_row_samples,
+              row_stride_bytes /
+                  sizeof(typename ::std::iterator_traits<Iter1>::value_type))),
+      d_histogram, num_levels, lower_level, upper_level,
+      num_row_samples * num_rows);
+}
+
+// Evenly Divided Multi-Channel Histogram of a 1-D array
+template <int NumChannels, int NumActiveChannels, typename Policy,
+          typename Iter1, typename Iter2, typename T, typename Size>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+multi_histogram_even(Policy &&policy, Iter1 d_samples,
+                     Iter2 d_histogram[NumActiveChannels],
+                     int num_levels[NumActiveChannels],
+                     T lower_level[NumActiveChannels],
+                     T upper_level[NumActiveChannels], Size num_pixels) {
+  for (int active_channel = 0; active_channel < NumActiveChannels;
+       active_channel++) {
+    histogram_even(
+        policy,
+        oneapi::dpl::permutation_iterator(
+            d_samples,
+            internal::__interleaved_index_functor(NumChannels, active_channel)),
+        d_histogram[active_channel], num_levels[active_channel],
+        lower_level[active_channel], upper_level[active_channel], num_pixels);
+  }
+}
+
+// Evenly Divided Multi-Channel Histogram of a 2-D ROI in a flattened 2-D array
+template <int NumChannels, int NumActiveChannels, typename Policy,
+          typename Iter1, typename Iter2, typename T, typename OffsetT>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+multi_histogram_even_roi(Policy &&policy, Iter1 d_samples,
+                         Iter2 d_histogram[NumActiveChannels],
+                         int num_levels[NumActiveChannels],
+                         T lower_level[NumActiveChannels],
+                         T upper_level[NumActiveChannels],
+                         OffsetT num_row_samples, OffsetT num_rows,
+                         ::std::size_t row_stride_bytes) {
+  for (int active_channel = 0; active_channel < NumActiveChannels;
+       active_channel++) {
+    histogram_even(
+        policy,
+        oneapi::dpl::permutation_iterator(
+            d_samples,
+            internal::__composition_functor(
+                internal::__roi_2d_index_functor(
+                    num_row_samples,
+                    row_stride_bytes /
+                        (NumChannels * sizeof(typename ::std::iterator_traits<
+                                              Iter1>::value_type))),
+                internal::__interleaved_index_functor(NumChannels,
+                                                      active_channel))),
+        d_histogram[active_channel], num_levels[active_channel],
+        lower_level[active_channel], upper_level[active_channel],
+        num_row_samples * num_rows);
+  }
+}
+
+// Custom Range Histogram of a 1-D array
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Size>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    dpct::internal::is_iterator<Iter3>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+histogram_range(Policy &&policy, Iter1 d_samples, Iter2 d_histogram,
+                int num_levels, Iter3 d_levels, Size num_samples) {
+  internal::dpl_histogram::histogram(::std::forward<Policy>(policy), d_samples,
+                                     d_samples + num_samples, d_histogram,
+                                     d_levels, d_levels + num_levels);
+}
+
+// Custom Range Histogram of a 2-D ROI in a flattened 2-D Array
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename OffsetT>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    dpct::internal::is_iterator<Iter3>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+histogram_range_roi(Policy &&policy, Iter1 d_samples, Iter2 d_histogram,
+                    int num_levels, Iter3 d_levels, OffsetT num_row_samples,
+                    OffsetT num_rows, ::std::size_t row_stride_bytes) {
+  return histogram_range(
+      ::std::forward<Policy>(policy),
+      oneapi::dpl::permutation_iterator(
+          d_samples,
+          internal::__roi_2d_index_functor(
+              num_row_samples,
+              row_stride_bytes /
+                  sizeof(typename ::std::iterator_traits<Iter1>::value_type))),
+      d_histogram, num_levels, d_levels, num_row_samples * num_rows);
+}
+
+// Custom Range Multi-Channel Histogram of a 1-D array
+template <int NumChannels, int NumActiveChannels, typename Policy,
+          typename Iter1, typename Iter2, typename Iter3, typename Size>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    dpct::internal::is_iterator<Iter3>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+multi_histogram_range(Policy &&policy, Iter1 d_samples,
+                      Iter2 d_histogram[NumActiveChannels],
+                      int num_levels[NumActiveChannels],
+                      Iter3 d_levels[NumActiveChannels], Size num_pixels) {
+  for (int active_channel = 0; active_channel < NumActiveChannels;
+       active_channel++) {
+    histogram_range(policy,
+                    oneapi::dpl::permutation_iterator(
+                        d_samples, internal::__interleaved_index_functor(
+                                       NumChannels, active_channel)),
+                    d_histogram[active_channel], num_levels[active_channel],
+                    d_levels[active_channel], num_pixels);
+  }
+}
+
+// Custom Range Multi-Channel Histogram of a 2-D ROI in a flattened 2-D array
+template <int NumChannels, int NumActiveChannels, typename Policy,
+          typename Iter1, typename Iter2, typename Iter3, typename OffsetT>
+::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    dpct::internal::is_iterator<Iter3>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+multi_histogram_range_roi(Policy &&policy, Iter1 d_samples,
+                          Iter2 d_histogram[NumActiveChannels],
+                          int num_levels[NumActiveChannels],
+                          Iter3 d_levels[NumActiveChannels],
+                          OffsetT num_row_samples, OffsetT num_rows,
+                          ::std::size_t row_stride_bytes) {
+  for (int active_channel = 0; active_channel < NumActiveChannels;
+       active_channel++) {
+    histogram_range(
+        policy,
+        oneapi::dpl::permutation_iterator(
+            d_samples,
+            internal::__composition_functor(
+                internal::__roi_2d_index_functor(
+                    num_row_samples,
+                    row_stride_bytes /
+                        (NumChannels * sizeof(typename ::std::iterator_traits<
+                                              Iter1>::value_type))),
+                internal::__interleaved_index_functor(NumChannels,
+                                                      active_channel))),
+        d_histogram[active_channel], num_levels[active_channel],
+        d_levels[active_channel], num_row_samples * num_rows);
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value &&
+                          dpct::internal::is_iterator<Iter3>::value &&
+                          dpct::internal::is_iterator<Iter4>::value>
+sort_pairs(Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+           Iter4 values_out, ::std::int64_t n, bool descending, int begin_bit,
+           int end_bit) {
+  internal::sort_pairs_impl(std::forward<Policy>(policy), keys_in, keys_out,
+                            values_in, values_out, n, descending, begin_bit,
+                            end_bit);
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline void sort_pairs(
+    Policy &&policy, io_iterator_pair<Iter1> &keys,
+    io_iterator_pair<Iter2> &values, ::std::int64_t n, bool descending = false,
+    bool do_swap_iters = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  sort_pairs(::std::forward<Policy>(policy), keys.first(), keys.second(),
+             values.first(), values.second(), n, descending, begin_bit,
+             end_bit);
+  if (do_swap_iters) {
+    keys.swap();
+    values.swap();
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value>
+sort_keys(Policy &&policy, Iter1 keys_in, Iter2 keys_out, ::std::int64_t n,
+          bool descending, int begin_bit, int end_bit) {
+  using key_t_value_t = typename ::std::iterator_traits<Iter1>::value_type;
+
+  int clipped_begin_bit = (::std::max)(begin_bit, 0);
+  int clipped_end_bit =
+      (::std::min)((::std::uint64_t)end_bit, sizeof(key_t_value_t) * 8);
+  int num_bytes = (clipped_end_bit - clipped_begin_bit - 1) / 8 + 1;
+
+  auto transform_and_sort_f = [&](auto x) {
+    using T = typename ::std::decay_t<decltype(x)>;
+    internal::transform_and_sort<decltype(policy), Iter1, Iter2, T>(
+        ::std::forward<Policy>(policy), keys_in, keys_out, n, descending,
+        clipped_begin_bit, clipped_end_bit);
+  };
+
+  if (clipped_end_bit - clipped_begin_bit == sizeof(key_t_value_t) * 8) {
+    internal::sort_only(::std::forward<Policy>(policy), keys_in, keys_out, n,
+                        descending);
+  } else if (num_bytes == 1) {
+    transform_and_sort_f.template operator()<uint8_t>(0);
+  } else if (num_bytes == 2) {
+    transform_and_sort_f.template operator()<uint16_t>(0);
+  } else if (num_bytes <= 4) {
+    transform_and_sort_f.template operator()<uint32_t>(0);
+  } else // if (num_bytes <= 8)
+  {
+    transform_and_sort_f.template operator()<::std::uint64_t>(0);
+  }
+}
+
+template <typename Policy, typename Iter1>
+inline void sort_keys(
+    Policy &&policy, io_iterator_pair<Iter1> &keys, ::std::int64_t n,
+    bool descending = false, bool do_swap_iters = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  sort_keys(std::forward<Policy>(policy), keys.first(), keys.second(), n,
+            descending, begin_bit, end_bit);
+  if (do_swap_iters)
+    keys.swap();
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value>
+segmented_sort_keys(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, ::std::int64_t n,
+    ::std::int64_t nsegments, Iter3 begin_offsets, Iter3 end_offsets,
+    bool descending = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  int compute_units =
+      policy.queue()
+          .get_device()
+          .template get_info<sycl::info::device::max_compute_units>();
+  auto sg_sizes = policy.queue()
+                      .get_device()
+                      .template get_info<sycl::info::device::sub_group_sizes>();
+  int subgroup_size = sg_sizes.empty() ? 1 : sg_sizes.back();
+  // parallel for of serial sorts when we have sufficient number of segments for
+  // load balance when number of segments is large as compared to our target
+  // compute capability
+  if (nsegments >
+      compute_units *
+          (policy.queue().get_device().is_gpu() ? subgroup_size : 1)) {
+    dpct::internal::segmented_sort_keys_by_parallel_for_of_sorts(
+        ::std::forward<Policy>(policy), keys_in, keys_out, n, nsegments,
+        begin_offsets, end_offsets, descending, begin_bit, end_bit);
+  } else
+  {
+    dpct::internal::segmented_sort_keys_by_parallel_sorts(
+        ::std::forward<Policy>(policy), keys_in, keys_out, n, nsegments,
+        begin_offsets, end_offsets, descending, begin_bit, end_bit);
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline void segmented_sort_keys(
+    Policy &&policy, io_iterator_pair<Iter1> &keys, ::std::int64_t n,
+    ::std::int64_t nsegments, Iter2 begin_offsets, Iter2 end_offsets,
+    bool descending = false, bool do_swap_iters = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  segmented_sort_keys(::std::forward<Policy>(policy), keys.first(),
+                      keys.second(), n, nsegments, begin_offsets, end_offsets,
+                      descending, begin_bit, end_bit);
+  if (do_swap_iters) {
+    keys.swap();
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3,
+          typename Iter4, typename Iter5>
+inline ::std::enable_if_t<dpct::internal::is_iterator<Iter1>::value &&
+                          dpct::internal::is_iterator<Iter2>::value &&
+                          dpct::internal::is_iterator<Iter3>::value &&
+                          dpct::internal::is_iterator<Iter4>::value>
+segmented_sort_pairs(
+    Policy &&policy, Iter1 keys_in, Iter2 keys_out, Iter3 values_in,
+    Iter4 values_out, ::std::int64_t n, ::std::int64_t nsegments,
+    Iter5 begin_offsets, Iter5 end_offsets, bool descending = false,
+    int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  int compute_units =
+      policy.queue()
+          .get_device()
+          .template get_info<sycl::info::device::max_compute_units>();
+  auto sg_sizes = policy.queue()
+                      .get_device()
+                      .template get_info<sycl::info::device::sub_group_sizes>();
+  int subgroup_size = sg_sizes.empty() ? 1 : sg_sizes.back();
+  // parallel for of serial sorts when we have sufficient number of segments for
+  // load balance when number of segments is large as compared to our target
+  // compute capability
+  if (nsegments >
+      compute_units *
+          (policy.queue().get_device().is_gpu() ? subgroup_size : 1)) {
+    dpct::internal::segmented_sort_pairs_by_parallel_for_of_sorts(
+        ::std::forward<Policy>(policy), keys_in, keys_out, values_in,
+        values_out, n, nsegments, begin_offsets, end_offsets, descending,
+        begin_bit, end_bit);
+  } else
+  {
+    dpct::internal::segmented_sort_pairs_by_parallel_sorts(
+        ::std::forward<Policy>(policy), keys_in, keys_out, values_in,
+        values_out, n, nsegments, begin_offsets, end_offsets, descending,
+        begin_bit, end_bit);
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline void segmented_sort_pairs(
+    Policy &&policy, io_iterator_pair<Iter1> &keys,
+    io_iterator_pair<Iter2> &values, ::std::int64_t n, ::std::int64_t nsegments,
+    Iter3 begin_offsets, Iter3 end_offsets, bool descending = false,
+    bool do_swap_iters = false, int begin_bit = 0,
+    int end_bit = sizeof(typename ::std::iterator_traits<Iter1>::value_type) *
+                  8) {
+  segmented_sort_pairs(std::forward<Policy>(policy), keys.first(),
+                       keys.second(), values.first(), values.second(), n,
+                       nsegments, begin_offsets, end_offsets, descending,
+                       begin_bit, end_bit);
+  if (do_swap_iters) {
+    keys.swap();
+    values.swap();
+  }
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline void reduce_argmax(Policy &&policy, Iter1 input, Iter2 output,
+                          ::std::size_t n) {
+  dpct::arg_index_input_iterator<decltype(input), int> input_arg_idx(input);
+  auto ret = ::std::max_element(
+      policy, input_arg_idx, input_arg_idx + n,
+      [](const auto &a, const auto &b) { return (a.value < b.value); });
+  ::std::copy(::std::forward<Policy>(policy), ret, ret + 1, output);
+}
+
+template <typename Policy, typename Iter1, typename Iter2>
+inline void reduce_argmin(Policy &&policy, Iter1 input, Iter2 output,
+                          ::std::size_t n) {
+  dpct::arg_index_input_iterator<decltype(input), int> input_arg_idx(input);
+  auto ret = ::std::min_element(
+      policy, input_arg_idx, input_arg_idx + n,
+      [](const auto &a, const auto &b) { return (a.value < b.value); });
+  ::std::copy(::std::forward<Policy>(policy), ret, ret + 1, output);
+}
+
+template <typename Policy, typename Iter1, typename ValueT, typename CompT>
+inline ::std::pair<Iter1, Iter1> equal_range(Policy &&policy, Iter1 start,
+                                             Iter1 end, const ValueT &value,
+                                             CompT comp) {
+  ::std::vector<::std::int64_t> res_lower(1);
+  ::std::vector<::std::int64_t> res_upper(1);
+  ::std::vector<ValueT> value_vec(1, value);
+  ::oneapi::dpl::lower_bound(policy, start, end, value_vec.begin(),
+                             value_vec.end(), res_lower.begin(), comp);
+  ::oneapi::dpl::upper_bound(::std::forward<Policy>(policy), start, end,
+                             value_vec.begin(), value_vec.end(),
+                             res_upper.begin(), comp);
+  return ::std::make_pair(start + res_lower[0], start + res_upper[0]);
+}
+
+template <typename Policy, typename Iter1, typename ValueT>
+inline ::std::pair<Iter1, Iter1> equal_range(Policy &&policy, Iter1 start,
+                                             Iter1 end, const ValueT &value) {
+  return equal_range(::std::forward<Policy>(policy), start, end, value,
+                     internal::__less());
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline ::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+segmented_reduce_argmin(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                        ::std::int64_t nsegments, Iter3 begin_offsets,
+                        Iter3 end_offsets) {
+  policy.queue().submit([&](sycl::handler &cgh) {
+    cgh.parallel_for(nsegments, [=](sycl::id<1> i) {
+      if (end_offsets[i] <= begin_offsets[i]) {
+        keys_out[i] = dpct::key_value_pair(
+            1, ::std::numeric_limits<
+                   typename ::std::iterator_traits<Iter1>::value_type>::max());
+      } else {
+        dpct::arg_index_input_iterator<Iter1, int> arg_index(keys_in +
+                                                             begin_offsets[i]);
+        keys_out[i] = *::std::min_element(
+            arg_index, arg_index + (end_offsets[i] - begin_offsets[i]),
+            [](const auto &a, const auto &b) { return a.value < b.value; });
+      }
+    });
+  });
+  policy.queue().wait();
+}
+
+template <typename Policy, typename Iter1, typename Iter2, typename Iter3>
+inline ::std::enable_if_t<
+    dpct::internal::is_iterator<Iter1>::value &&
+    dpct::internal::is_iterator<Iter2>::value &&
+    internal::is_hetero_execution_policy<::std::decay_t<Policy>>::value>
+segmented_reduce_argmax(Policy &&policy, Iter1 keys_in, Iter2 keys_out,
+                        ::std::int64_t nsegments, Iter3 begin_offsets,
+                        Iter3 end_offsets) {
+  policy.queue().submit([&](sycl::handler &cgh) {
+    cgh.parallel_for(nsegments, [=](sycl::id<1> i) {
+      if (end_offsets[i] <= begin_offsets[i]) {
+        keys_out[i] = dpct::key_value_pair(
+            1,
+            ::std::numeric_limits<
+                typename ::std::iterator_traits<Iter1>::value_type>::lowest());
+      } else {
+        dpct::arg_index_input_iterator<Iter1, int> arg_index(keys_in +
+                                                             begin_offsets[i]);
+        keys_out[i] = *::std::max_element(
+            arg_index, arg_index + (end_offsets[i] - begin_offsets[i]),
+            [](const auto &a, const auto &b) { return a.value < b.value; });
+      }
+    });
+  });
+  policy.queue().wait();
+}
+
+template <typename ExecutionPolicy, typename InputIterator,
+          typename OutputIterator1, typename OutputIterator2,
+          typename OutputIterator3>
+void nontrivial_run_length_encode(ExecutionPolicy &&policy,
+                                  InputIterator input_beg,
+                                  OutputIterator1 offsets_out,
+                                  OutputIterator2 lengths_out,
+                                  OutputIterator3 num_runs,
+                                  ::std::int64_t num_items) {
+  using oneapi::dpl::make_transform_iterator;
+  using oneapi::dpl::make_zip_iterator;
+  using offsets_t =
+      typename ::std::iterator_traits<OutputIterator1>::value_type;
+  using lengths_t =
+      typename ::std::iterator_traits<OutputIterator2>::value_type;
+
+  auto input_end = input_beg + num_items;
+  // First element must be nontrivial run (start of first segment)
+  auto first_adj_it = oneapi::dpl::adjacent_find(policy, input_beg, input_end);
+  auto first_adj_idx = ::std::distance(input_beg, first_adj_it);
+  if (first_adj_it == input_end) {
+    ::std::fill(policy, num_runs, num_runs + 1, 0);
+    return;
+  }
+  auto get_prev_idx_element = [first_adj_idx](const auto &idx) {
+    auto out_idx = idx + first_adj_idx;
+    return (out_idx == 0) ? 0 : out_idx - 1;
+  };
+  auto get_next_idx_element = [first_adj_idx, num_items](const auto &idx) {
+    auto out_idx = idx + first_adj_idx;
+    return (out_idx == num_items - 1) ? num_items - 1 : out_idx + 1;
+  };
+  // TODO: Use shifted view to pad range once oneDPL ranges is non-experimental
+  auto left_shifted_input_beg =
+      oneapi::dpl::make_permutation_iterator(input_beg, get_prev_idx_element);
+  auto right_shifted_input_beg =
+      oneapi::dpl::make_permutation_iterator(input_beg, get_next_idx_element);
+  // Segment type for ith idx consists of zip of iterators at (i-1, i, i+1)
+  // padded at the ends
+  auto zipped_keys_beg = make_zip_iterator(
+      left_shifted_input_beg, input_beg, right_shifted_input_beg,
+      oneapi::dpl::counting_iterator<offsets_t>(0));
+  // Set flag at the beginning of new nontrivial run (ex: (2, 3, 3) -> 1)
+  auto key_flags_beg =
+      make_transform_iterator(zipped_keys_beg, [num_items](const auto &zipped) {
+        using ::std::get;
+        bool last_idx_mask = get<3>(zipped) != num_items - 1;
+        return (get<0>(zipped) != get<1>(zipped) &&
+                get<1>(zipped) == get<2>(zipped)) &&
+               last_idx_mask;
+      });
+  auto count_beg = oneapi::dpl::counting_iterator<offsets_t>(0);
+  // Check for presence of nontrivial element at current index
+  auto tr_nontrivial_flags = make_transform_iterator(
+      make_zip_iterator(left_shifted_input_beg, input_beg,
+                        right_shifted_input_beg, count_beg),
+      [num_items](const auto &zip) {
+        using ::std::get;
+        // Flag all elements in a run with special handling for padding
+        return lengths_t{
+            get<0>(zip) == get<1>(zip) ||
+            (get<1>(zip) == get<2>(zip) && get<3>(zip) != num_items - 1)};
+      });
+  auto zipped_vals_beg = make_zip_iterator(tr_nontrivial_flags, count_beg);
+  auto pred = [](bool lhs, bool rhs) { return !rhs; };
+  auto op = [](auto lhs, const auto &rhs) {
+    using std::get;
+    // Update the left-hand side length of the run and return the lhs tuple.
+    // This ensures that get<1> of the result contains the starting offset of
+    // the run.
+    get<0>(lhs) += get<0>(rhs);
+    return std::move(lhs);
+  };
+  auto zipped_out_beg = make_zip_iterator(lengths_out, offsets_out);
+  auto [_, zipped_out_vals_end] = oneapi::dpl::reduce_by_segment(
+      policy, key_flags_beg + first_adj_idx, key_flags_beg + num_items,
+      zipped_vals_beg + first_adj_idx, oneapi::dpl::discard_iterator(),
+      zipped_out_beg, pred, op);
+  auto ret_dist = ::std::distance(zipped_out_beg, zipped_out_vals_end);
+  ::std::fill(policy, num_runs, num_runs + 1, ret_dist);
+}
+
+template <typename ExecutionPolicy, typename InputIterator,
+          typename OutputIterator, typename CountIterator,
+          typename UnaryPredicate>
+void partition_if(ExecutionPolicy &&policy, InputIterator input,
+                  OutputIterator output, CountIterator num_true, int num_items,
+                  UnaryPredicate pred, bool reverse_last = true) {
+  auto copy_policy =
+      internal::make_wrapped_policy<internal::copy_before_partition>(policy);
+  auto partition_policy =
+      internal::make_wrapped_policy<internal::partition_call1>(policy);
+
+  dpl::copy(::std::move(copy_policy), input, input + num_items, output);
+  auto beg_false = dpl::stable_partition(::std::move(partition_policy), output,
+                                         output + num_items, pred);
+  auto num_true_items = ::std::distance(output, beg_false);
+  if (reverse_last) {
+    auto reverse_policy =
+        internal::make_wrapped_policy<internal::reverse_partition>(policy);
+    dpl::reverse(::std::move(reverse_policy), beg_false, output + num_items);
+  }
+  dpl::fill(::std::forward<ExecutionPolicy>(policy), num_true, num_true + 1,
+            num_true_items);
+}
+
+template <typename ExecutionPolicy, typename InputIterator,
+          typename OutputIterator1, typename OutputIterator2,
+          typename OutputIterator3, typename CountIterator,
+          typename UnaryPredicate1, typename UnaryPredicate2>
+void partition_if(ExecutionPolicy &&policy, InputIterator input,
+                  OutputIterator1 output1, OutputIterator2 output2,
+                  OutputIterator3 output3, CountIterator partition_counts,
+                  int num_items, UnaryPredicate1 pred1, UnaryPredicate2 pred2,
+                  bool reverse_last = true) {
+  using internal::__buffer;
+  using ValueType = typename ::std::iterator_traits<InputIterator>::value_type;
+  using CountType = typename ::std::iterator_traits<CountIterator>::value_type;
+  auto partition1_policy =
+      internal::make_wrapped_policy<internal::partition_call1>(policy);
+  auto partition2_policy =
+      internal::make_wrapped_policy<internal::partition_call2>(policy);
+  __buffer<ValueType> tmp(num_items);
+
+  // Partition the first set (elements that satisfy pred1) and store the
+  // remaining in temporary storage.
+  auto [output1_end, tmp_end] =
+      dpct::stable_partition_copy(::std::move(partition1_policy), input,
+                                  input + num_items, output1, tmp.get(), pred1);
+  // Partition the remaining two sets (elements that satisfy pred2 and
+  // unselected).
+  auto [output2_end, output3_end] =
+      dpct::stable_partition_copy(::std::move(partition2_policy), tmp.get(),
+                                  tmp_end, output2, output3, pred2);
+
+  ::std::vector<CountType> host_counts = {
+      static_cast<CountType>(::std::distance(output1, output1_end)),
+      static_cast<CountType>(::std::distance(output2, output2_end)),
+      static_cast<CountType>(::std::distance(output3, output3_end))};
+  if (reverse_last) {
+    auto reverse_policy =
+        internal::make_wrapped_policy<internal::reverse_partition>(policy);
+    dpl::reverse(::std::move(reverse_policy), output3, output3_end);
+  }
+  dpl::copy(::std::forward<ExecutionPolicy>(policy), host_counts.begin(),
+            host_counts.end(), partition_counts);
+}
+
+template <typename ExecutionPolicy, typename InputIterator,
+          typename OutputIterator, typename FlagsIterator,
+          typename CountIterator>
+void partition_flagged(ExecutionPolicy &&policy, InputIterator input,
+                       FlagsIterator flags, OutputIterator output,
+                       CountIterator num_true, int num_items,
+                       bool reverse_last = true) {
+  auto copy_policy =
+      internal::make_wrapped_policy<internal::copy_before_partition>(policy);
+  auto partition_policy =
+      internal::make_wrapped_policy<internal::partition_call1>(policy);
+
+  dpl::copy(::std::move(copy_policy), input, input + num_items, output);
+  auto beg_false = dpct::stable_partition(::std::move(partition_policy), output,
+                                          output + num_items, flags,
+                                          [](auto flag) { return flag != 0; });
+  auto num_true_items = ::std::distance(output, beg_false);
+  if (reverse_last) {
+    auto reverse_policy =
+        internal::make_wrapped_policy<internal::reverse_partition>(policy);
+    dpl::reverse(::std::move(reverse_policy), beg_false, output + num_items);
+  }
+  dpl::fill(::std::forward<ExecutionPolicy>(policy), num_true, num_true + 1,
+            num_true_items);
+}
+
+template <typename ExecutionPolicy, typename InputIterator, typename BinaryPred>
+typename ::std::iterator_traits<InputIterator>::difference_type
+unique_count(ExecutionPolicy &&policy, InputIterator begin, InputIterator end,
+             BinaryPred binary_pred) {
+  auto n = ::std::distance(begin, end);
+  if (n == 0)
+    return 0;
+  if (n == 1)
+    return 1;
+  auto zip_beg = oneapi::dpl::make_zip_iterator(begin, begin + 1);
+  auto zip_end = zip_beg + n - 1;
+  return 1 + oneapi::dpl::count_if(::std::forward<ExecutionPolicy>(policy),
+                                   zip_beg, zip_end,
+                                   [binary_pred](const auto &e) {
+                                     using ::std::get;
+                                     return !binary_pred(get<0>(e), get<1>(e));
+                                   });
+}
+
+template <typename ExecutionPolicy, typename InputIterator>
+typename ::std::iterator_traits<InputIterator>::difference_type
+unique_count(ExecutionPolicy &&policy, InputIterator begin, InputIterator end) {
+  using T = typename ::std::iterator_traits<InputIterator>::value_type;
+  return dpct::unique_count(::std::forward<ExecutionPolicy>(policy), begin, end,
+                            ::std::equal_to<T>());
+}
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/dpcpp_extensions.h b/sycl/include/dpct/dpl_extras/dpcpp_extensions.h
new file mode 100644
index 00000000000..7d782fc7c42
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/dpcpp_extensions.h
@@ -0,0 +1,422 @@
+//==---- dpcpp_extensions.h ------------------*- C++ -*---------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------===//
+
+#ifndef __DPCT_DPCPP_EXTENSIONS_H__
+#define __DPCT_DPCPP_EXTENSIONS_H__
+
+#include <stdexcept>
+
+#ifdef SYCL_EXT_ONEAPI_USER_DEFINED_REDUCTIONS
+#include <sycl/ext/oneapi/experimental/user_defined_reductions.hpp>
+#endif
+
+#include "functional.h"
+
+namespace dpct {
+namespace group {
+namespace detail {
+
+template <typename... _Args>
+constexpr auto __reduce_over_group(_Args... __args) {
+  return sycl::reduce_over_group(__args...);
+}
+
+template <typename... _Args> constexpr auto __group_broadcast(_Args... __args) {
+  return sycl::group_broadcast(__args...);
+}
+
+template <typename... _Args>
+constexpr auto __exclusive_scan_over_group(_Args... __args) {
+  return sycl::exclusive_scan_over_group(__args...);
+}
+
+template <typename... _Args>
+constexpr auto __inclusive_scan_over_group(_Args... __args) {
+  return sycl::inclusive_scan_over_group(__args...);
+}
+
+} // end namespace detail
+
+/// Perform an exclusive scan over the values of inputs from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param inputs Pointer to the input data for the scan operation.
+/// \param outputs Pointer to the location where scan results will be stored.
+/// \param init initial value of the scan result.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan.
+template <typename Item, typename T, class BinaryOperation,
+          int VALUES_PER_THREAD>
+__dpct_inline__ void
+exclusive_scan(const Item &item, T (&inputs)[VALUES_PER_THREAD],
+               T (&outputs)[VALUES_PER_THREAD], T init,
+               BinaryOperation binary_op) {
+  T result = inputs[0];
+
+#pragma unroll
+  for (int i = 1; i < VALUES_PER_THREAD; ++i) {
+    result = binary_op(result, inputs[i]);
+  }
+
+  T exclusive_result =
+      detail::__exclusive_scan_over_group(item.get_group(), result, binary_op);
+
+  T input = inputs[0];
+  if (item.get_local_linear_id() == 0) {
+    outputs[0] = init;
+  } else {
+    outputs[0] = exclusive_result;
+  }
+
+#pragma unroll
+  for (int i = 1; i < VALUES_PER_THREAD; ++i) {
+    T output = binary_op(input, outputs[i - 1]);
+    input = inputs[i];
+    outputs[i] = output;
+  }
+}
+
+/// Perform an exclusive scan over the values of input from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param input Input data for the scan operation.
+/// \param init initial value of the scan result.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \param group_aggregate group-wide aggregate of all inputs
+/// in the work-items of the group. \returns exclusive scan of the first i
+/// work-items where item is the i-th work item.
+template <typename Item, typename T, class BinaryOperation>
+__dpct_inline__ T
+exclusive_scan(const Item &item, T input, T init, BinaryOperation binary_op,
+               T &group_aggregate) {
+  T output = detail::__exclusive_scan_over_group(item.get_group(), input, init,
+                                                 binary_op);
+  if (item.get_local_linear_id() == item.get_local_range().size() - 1) {
+    group_aggregate = binary_op(output, input);
+  }
+
+  group_aggregate = detail::__group_broadcast(
+      item.get_group(), group_aggregate, item.get_local_range().size() - 1);
+  return output;
+}
+
+/// Perform an exclusive scan over the values of input from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param input Input data for the scan operation.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \param prefix_callback_op functor invoked by the first
+/// work-item in the group that returns the
+///        initial value in the resulting scan of the work-items in the group.
+/// \returns exclusive scan of the input elements assigned to work-items in the
+/// group.
+template <typename Item, typename T, class BinaryOperation,
+          class GroupPrefixCallbackOperation>
+__dpct_inline__ T
+exclusive_scan(const Item &item, T input, BinaryOperation binary_op,
+               GroupPrefixCallbackOperation &prefix_callback_op) {
+  T group_aggregate;
+
+  T output =
+      detail::__exclusive_scan_over_group(item.get_group(), input, binary_op);
+  if (item.get_local_linear_id() == item.get_local_range().size() - 1) {
+    group_aggregate = binary_op(output, input);
+  }
+
+  group_aggregate = detail::__group_broadcast(
+      item.get_group(), group_aggregate, item.get_local_range().size() - 1);
+
+  T group_prefix = prefix_callback_op(group_aggregate);
+  if (item.get_local_linear_id() == 0) {
+    output = group_prefix;
+  } else {
+    output = binary_op(group_prefix, output);
+  }
+
+  return output;
+}
+
+/// Perform a reduction of the data elements assigned to all threads in the
+/// group.
+///
+/// \param item A work-item in a group.
+/// \param inputs Pointer to the input data for the reduce operation.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \returns value of the reduction using binary_op
+template <typename Item, typename T, class BinaryOperation,
+          int VALUES_PER_THREAD>
+__dpct_inline__ T
+reduce(Item item, T (&inputs)[VALUES_PER_THREAD], BinaryOperation binary_op) {
+  T result = inputs[0];
+
+#pragma unroll
+  for (int i = 1; i < VALUES_PER_THREAD; i++) {
+    result = binary_op(result, inputs[i]);
+  }
+  return detail::__reduce_over_group(item.get_group(), result, binary_op);
+}
+
+/// Perform a reduction on a limited number of the work items in a subgroup
+///
+/// \param item A work-item in a group.
+/// \param value value per work item which is to be reduced
+/// \param items_to_reduce num work items at the start of the subgroup to reduce
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \returns value of the reduction using binary_op
+template <typename Item, typename T, class BinaryOperation>
+__dpct_inline__
+typename ::std::enable_if_t<sycl::has_known_identity_v<BinaryOperation, T>, T>
+reduce_over_partial_group(const Item &item, const T &value,
+                          const ::std::uint16_t &items_to_reduce,
+                          BinaryOperation binary_op) {
+  T value_temp = (item.get_local_linear_id() < items_to_reduce)
+                     ? value
+                     : sycl::known_identity_v<BinaryOperation, T>;
+  return detail::__reduce_over_group(item.get_sub_group(), value_temp,
+                                     binary_op);
+}
+
+/// Perform an inclusive scan over the values of inputs from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param inputs Pointer to the input data for the scan operation.
+/// \param outputs Pointer to the location where scan results will be stored.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \returns inclusive scan of the input elements assigned to
+/// work-items in the group.
+template <typename Item, typename T, class BinaryOperation,
+          int VALUES_PER_THREAD>
+__dpct_inline__ void
+inclusive_scan(const Item &item, T (&inputs)[VALUES_PER_THREAD],
+               T (&outputs)[VALUES_PER_THREAD], BinaryOperation binary_op) {
+  T result = inputs[0];
+
+#pragma unroll
+  for (int i = 1; i < VALUES_PER_THREAD; ++i) {
+    result = binary_op(result, inputs[i]);
+  }
+
+  T exclusive_result =
+      detail::__exclusive_scan_over_group(item.get_group(), result, binary_op);
+
+  if (item.get_local_linear_id() == 0) {
+    outputs[0] = inputs[0];
+  } else {
+    outputs[0] = binary_op(inputs[0], exclusive_result);
+  }
+
+#pragma unroll
+  for (int i = 1; i < VALUES_PER_THREAD; ++i) {
+    outputs[i] = binary_op(inputs[i], outputs[i - 1]);
+  }
+}
+
+/// Perform an inclusive scan over the values of inputs from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param input Pointer to the input data for the scan operation.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \param group_aggregate group-wide aggregate of all inputs
+/// in the work-items of the group. \returns inclusive scan of the input
+/// elements assigned to work-items in the group.
+template <typename Item, typename T, class BinaryOperation>
+__dpct_inline__ T inclusive_scan(const Item &item, T input,
+                                                BinaryOperation binary_op,
+                                                T &group_aggregate) {
+  T output =
+      detail::__inclusive_scan_over_group(item.get_group(), input, binary_op);
+  if (item.get_local_linear_id() == item.get_local_range().size() - 1) {
+    group_aggregate = output;
+  }
+
+  group_aggregate = detail::__group_broadcast(
+      item.get_group(), group_aggregate, item.get_local_range().size() - 1);
+  return output;
+}
+
+/// Perform an inclusive scan over the values of input from all work-items in
+/// the group using the operator binary_op, which must be one of the SYCL 2020
+/// group algorithms library function objects.
+///
+/// \param item A work-item in a group.
+/// \param input Input data for the scan operation.
+/// \param binary_op functor that implements the binary operation used to
+/// perform the scan. \param prefix_callback_op functor invoked by the first
+/// work-item in the group that returns the
+///        initial value in the resulting scan of the work-items in the group.
+/// \returns inclusive scan of the input elements assigned to work-items in the
+/// group.
+template <typename Item, typename T, class BinaryOperation,
+          class GroupPrefixCallbackOperation>
+__dpct_inline__ T
+inclusive_scan(const Item &item, T input, BinaryOperation binary_op,
+               GroupPrefixCallbackOperation &prefix_callback_op) {
+  T group_aggregate;
+
+  T output = inclusive_scan(item, input, binary_op, group_aggregate);
+  T group_prefix = prefix_callback_op(group_aggregate);
+
+  return binary_op(group_prefix, output);
+}
+
+} // namespace group
+
+namespace device {
+
+namespace detail {
+
+template <typename... _Args> constexpr auto __joint_reduce(_Args... __args) {
+  return sycl::joint_reduce(__args...);
+}
+
+} // namespace detail
+
+/// Perform a reduce on each of the segments specified within data stored on
+/// the device.
+///
+/// \param queue Command queue used to access device used for reduction
+/// \param inputs Pointer to the data elements on the device to be reduced
+/// \param outputs Pointer to the storage where the reduced value for each
+/// segment will be stored \param segment_count number of segments to be reduced
+/// \param begin_offsets Pointer to the set of indices that are the first
+/// element in each segment \param end_offsets Pointer to the set of indices
+/// that are one past the last element in each segment \param binary_op functor
+/// that implements the binary operation used to perform the scan. \param init
+/// initial value of the reduction for each segment.
+template <int GROUP_SIZE, typename T, typename OffsetT, class BinaryOperation>
+void segmented_reduce(sycl::queue queue, T *inputs, T *outputs,
+                      size_t segment_count, OffsetT *begin_offsets,
+                      OffsetT *end_offsets, BinaryOperation binary_op, T init) {
+
+  sycl::range<1> global_size(segment_count * GROUP_SIZE);
+  sycl::range<1> local_size(GROUP_SIZE);
+
+  queue.submit([&](sycl::handler &cgh) {
+    cgh.parallel_for(
+        sycl::nd_range<1>(global_size, local_size), [=](sycl::nd_item<1> item) {
+          OffsetT segment_begin = begin_offsets[item.get_group_linear_id()];
+          OffsetT segment_end = end_offsets[item.get_group_linear_id()];
+          if (segment_begin == segment_end) {
+            if (item.get_local_linear_id() == 0) {
+              outputs[item.get_group_linear_id()] = init;
+            }
+            return;
+          }
+
+          sycl::multi_ptr<T, sycl::access::address_space::global_space>
+              input_ptr = inputs;
+          T group_aggregate = detail::__joint_reduce(
+              item.get_group(), input_ptr + segment_begin,
+              input_ptr + segment_end, init, binary_op);
+
+          if (item.get_local_linear_id() == 0) {
+            outputs[item.get_group_linear_id()] = group_aggregate;
+          }
+        });
+  });
+}
+
+
+#ifdef SYCL_EXT_ONEAPI_USER_DEFINED_REDUCTIONS
+
+namespace experimental {
+namespace detail {
+template <typename _Tp, typename... _Ts> struct __is_any {
+  constexpr static bool value = std::disjunction_v<
+      std::is_same<std::remove_cv_t<_Tp>, std::remove_cv_t<_Ts>>...>;
+};
+
+template <typename _Tp, typename _Bp> struct __in_native_op_list {
+  constexpr static bool value =
+      __is_any<_Bp, sycl::plus<_Tp>, sycl::bit_or<_Tp>, sycl::bit_xor<_Tp>,
+               sycl::bit_and<_Tp>, sycl::maximum<_Tp>, sycl::minimum<_Tp>,
+               sycl::multiplies<_Tp>>::value;
+};
+
+template <typename _Tp, typename _Bp> struct __is_native_op {
+  constexpr static bool value = __in_native_op_list<_Tp, _Bp>::value ||
+                                __in_native_op_list<void, _Bp>::value;
+};
+
+} // namespace detail
+
+/// Perform a reduce on each of the segments specified within data stored on
+/// the device. Compared with dpct::device::segmented_reduce, this experimental
+/// feature support user define reductions.
+///
+/// \param queue Command queue used to access device used for reduction
+/// \param inputs Pointer to the data elements on the device to be reduced
+/// \param outputs Pointer to the storage where the reduced value for each
+/// segment will be stored \param segment_count number of segments to be reduced
+/// \param begin_offsets Pointer to the set of indices that are the first
+/// element in each segment \param end_offsets Pointer to the set of indices
+/// that are one past the last element in each segment \param binary_op functor
+/// that implements the binary operation used to perform the scan. \param init
+/// initial value of the reduction for each segment.
+template <int GROUP_SIZE, typename T, typename OffsetT, class BinaryOperation>
+void segmented_reduce(sycl::queue queue, T *inputs, T *outputs,
+                      size_t segment_count, OffsetT *begin_offsets,
+                      OffsetT *end_offsets, BinaryOperation binary_op, T init) {
+
+  sycl::range<1> global_size(segment_count * GROUP_SIZE);
+  sycl::range<1> local_size(GROUP_SIZE);
+
+  if constexpr (!detail::__is_native_op<T, BinaryOperation>::value) {
+    queue.submit([&](sycl::handler &cgh) {
+      size_t temp_memory_size = GROUP_SIZE * sizeof(T);
+      auto scratch = sycl::local_accessor<std::byte, 1>(temp_memory_size, cgh);
+      cgh.parallel_for(
+          sycl::nd_range<1>(global_size, local_size),
+          [=](sycl::nd_item<1> item) {
+            OffsetT segment_begin = begin_offsets[item.get_group_linear_id()];
+            OffsetT segment_end = end_offsets[item.get_group_linear_id()];
+            if (segment_begin == segment_end) {
+              if (item.get_local_linear_id() == 0) {
+                outputs[item.get_group_linear_id()] = init;
+              }
+              return;
+            }
+            // Create a handle that associates the group with an allocation it
+            // can use
+            auto handle =
+                sycl::ext::oneapi::experimental::group_with_scratchpad(
+                    item.get_group(),
+                    sycl::span(&scratch[0], temp_memory_size));
+            T group_aggregate = sycl::ext::oneapi::experimental::joint_reduce(
+                handle, inputs + segment_begin, inputs + segment_end, init,
+                binary_op);
+            if (item.get_local_linear_id() == 0) {
+              outputs[item.get_group_linear_id()] = group_aggregate;
+            }
+          });
+    });
+  } else {
+    dpct::device::segmented_reduce<GROUP_SIZE>(queue, inputs, outputs,
+                                               segment_count, begin_offsets,
+                                               end_offsets, binary_op, init);
+  }
+}
+} // namespace experimental
+
+#endif // SYCL_EXT_ONEAPI_USER_DEFINED_REDUCTIONS
+
+
+} // namespace device
+} // namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/functional.h b/sycl/include/dpct/dpl_extras/functional.h
new file mode 100644
index 00000000000..110cd45a9ab
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/functional.h
@@ -0,0 +1,486 @@
+//==---- functional.h -----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_FUNCTIONAL_H__
+#define __DPCT_FUNCTIONAL_H__
+
+#include <functional>
+#include <oneapi/dpl/functional>
+#include <oneapi/dpl/iterator>
+
+#if ONEDPL_USE_DPCPP_BACKEND
+#include <oneapi/dpl/pstl/hetero/dpcpp/parallel_backend_sycl_utils.h>
+#endif
+
+#include <tuple>
+#include <utility>
+
+#define _DPCT_GCC_VERSION                                                      \
+  (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
+
+// Portability "#pragma" definition
+#ifdef _MSC_VER
+#define _DPCT_PRAGMA(x) __pragma(x)
+#else
+#define _DPCT_PRAGMA(x) _Pragma(#x)
+#endif
+
+// Enable loop unrolling pragmas where supported
+#if (__INTEL_COMPILER ||                                                       \
+     (!defined(__INTEL_COMPILER) && _DPCT_GCC_VERSION >= 80000))
+#define _DPCT_PRAGMA_UNROLL _DPCT_PRAGMA(unroll)
+#else // no pragma unroll
+#define _DPCT_PRAGMA_UNROLL
+#endif
+
+namespace dpct {
+
+struct null_type {};
+
+// Function object to wrap user defined functors to provide compile time "const"
+// workaround for user function objects.
+// The SYCL spec (4.12) states that writing to a function object during a SYCL
+// kernel is undefined behavior.  This wrapper is provided as a compile-time
+// work around, but functors used in SYCL kernels must be `const` in practice.
+template <typename _Op> struct mark_functor_const {
+  mutable _Op op;
+  mark_functor_const() : op() {}
+  mark_functor_const(const _Op &__op) : op(__op) {}
+  mark_functor_const(_Op &&__op) : op(::std::move(__op)) {}
+  template <typename... _T> auto operator()(_T &&...x) const {
+    return op(std::forward<_T>(x)...);
+  }
+};
+
+// Forward declare key_value_pair to avoid creating cyclic dependency between
+// iterators.h and functional.h.
+template <typename _KeyTp, typename _ValueTp> class key_value_pair;
+
+// Returns the smaller of two key_value_pair objects based on their value
+// member. If value elements compare equal, then the pair with the lower key is
+// returned.
+struct argmin {
+  template <typename _ValueTp, typename _KeyTp>
+  key_value_pair<_KeyTp, _ValueTp>
+  operator()(const key_value_pair<_KeyTp, _ValueTp> &lhs,
+             const key_value_pair<_KeyTp, _ValueTp> &rhs) const {
+    return (lhs.value < rhs.value) ||
+                   (lhs.value == rhs.value && lhs.key < rhs.key)
+               ? lhs
+               : rhs;
+  }
+};
+
+// Returns the larger of two key_value_pair objects based on their value member.
+// If value elements compare equal, then the pair with the lower key is
+// returned.
+struct argmax {
+  template <typename _ValueTp, typename _KeyTp>
+  key_value_pair<_KeyTp, _ValueTp>
+  operator()(const key_value_pair<_KeyTp, _ValueTp> &lhs,
+             const key_value_pair<_KeyTp, _ValueTp> &rhs) const {
+    return (lhs.value > rhs.value) ||
+                   (lhs.value == rhs.value && lhs.key < rhs.key)
+               ? lhs
+               : rhs;
+  }
+};
+
+namespace internal {
+
+template <class _ExecPolicy, class _T>
+using enable_if_execution_policy =
+    typename std::enable_if<oneapi::dpl::execution::is_execution_policy<
+                                typename std::decay<_ExecPolicy>::type>::value,
+                            _T>::type;
+
+template <typename _T> struct is_hetero_execution_policy : ::std::false_type {};
+
+template <typename... PolicyParams>
+struct is_hetero_execution_policy<
+    oneapi::dpl::execution::device_policy<PolicyParams...>> : ::std::true_type {
+};
+
+template <typename _T> struct is_fpga_execution_policy : ::std::false_type {};
+
+#if _ONEDPL_FPGA_DEVICE
+template <unsigned int unroll_factor, typename... PolicyParams>
+struct is_hetero_execution_policy<
+    execution::fpga_policy<unroll_factor, PolicyParams...>> : ::std::true_type {
+};
+#endif
+
+template <class _ExecPolicy, class _T>
+using enable_if_hetero_execution_policy = typename std::enable_if<
+    is_hetero_execution_policy<typename std::decay<_ExecPolicy>::type>::value,
+    _T>::type;
+
+#if _ONEDPL_CPP14_INTEGER_SEQUENCE_PRESENT
+
+template <std::size_t... _Sp>
+using index_sequence = std::index_sequence<_Sp...>;
+template <std::size_t _Np>
+using make_index_sequence = std::make_index_sequence<_Np>;
+
+#else
+
+template <std::size_t... _Sp> class index_sequence {};
+
+template <std::size_t _Np, std::size_t... _Sp>
+struct make_index_sequence_impl
+    : make_index_sequence_impl<_Np - 1, _Np - 1, _Sp...> {};
+
+template <std::size_t... _Sp> struct make_index_sequence_impl<0, _Sp...> {
+  using type = index_sequence<_Sp...>;
+};
+
+template <std::size_t _Np>
+using make_index_sequence = typename make_index_sequence_impl<_Np>::type;
+#endif
+
+// Minimal buffer implementations for temporary storage in mapping rules
+// Some of our algorithms need to start with raw memory buffer,
+// not an initialized array, because initialization/destruction
+// would make the span be at least O(N).
+#if ONEDPL_USE_DPCPP_BACKEND
+template <typename _Tp> class __buffer {
+  sycl::buffer<_Tp, 1> __buf;
+
+  __buffer(const __buffer &) = delete;
+
+  void operator=(const __buffer &) = delete;
+
+public:
+  // Try to obtain buffer of given size to store objects of _Tp type
+  __buffer(std::size_t __n) : __buf(sycl::range<1>(__n)) {}
+
+  // Return pointer to buffer, or  NULL if buffer could not be obtained.
+  auto get() -> decltype(oneapi::dpl::begin(__buf)) const {
+    return oneapi::dpl::begin(__buf);
+  }
+};
+#else
+template <typename _Tp> class __buffer {
+  std::unique_ptr<_Tp> _M_ptr;
+
+  __buffer(const __buffer &) = delete;
+
+  void operator=(const __buffer &) = delete;
+
+public:
+  // Try to obtain buffer of given size to store objects of _Tp type
+  __buffer(const std::size_t __n) : _M_ptr(new _Tp[__n]) {}
+
+  // Return pointer to buffer, or  NULL if buffer could not be obtained.
+  _Tp *get() const { return _M_ptr.get(); }
+};
+#endif
+
+// Implements C++14 std::less<void> specialization to allow parameter type
+// deduction.
+class __less {
+public:
+  template <typename _Xp, typename _Yp>
+  bool operator()(_Xp &&__x, _Yp &&__y) const {
+    return std::forward<_Xp>(__x) < std::forward<_Yp>(__y);
+  }
+};
+
+template <typename Policy, typename NewName> struct rebind_policy {
+  using type = Policy;
+};
+
+template <typename KernelName, typename NewName>
+struct rebind_policy<oneapi::dpl::execution::device_policy<KernelName>,
+                     NewName> {
+  using type = oneapi::dpl::execution::device_policy<NewName>;
+};
+
+#if _ONEDPL_FPGA_DEVICE
+template <unsigned int factor, typename KernelName, typename NewName>
+struct rebind_policy<oneapi::dpl::execution::fpga_policy<factor, KernelName>,
+                     NewName> {
+  using type = oneapi::dpl::execution::fpga_policy<factor, NewName>;
+};
+#endif
+
+template <typename T1, typename T2,
+          typename R1 = typename std::iterator_traits<T1>::reference,
+          typename R2 = typename std::iterator_traits<T2>::reference>
+struct perm_fun {
+  typedef R2 result_of;
+  perm_fun(T1 input) : source(input) {}
+
+  R2 operator()(R1 x) const { return *(source + x); }
+
+private:
+  T1 source;
+};
+
+// Functor compares first element (key) from tied sequence.
+template <typename Compare = class internal::__less> struct compare_key_fun {
+  typedef bool result_of;
+  compare_key_fun(Compare _comp = internal::__less()) : comp(_comp) {}
+
+  template <typename _T1, typename _T2>
+  result_of operator()(_T1 &&a, _T2 &&b) const {
+    using std::get;
+    return comp(get<0>(a), get<0>(b));
+  }
+
+private:
+  mutable Compare comp;
+};
+
+// Functor evaluates second element of tied sequence with predicate.
+// Used by: copy_if, remove_copy_if, stable_partition_copy
+// Lambda:
+template <typename Predicate> struct predicate_key_fun {
+  typedef bool result_of;
+  predicate_key_fun(Predicate _pred) : pred(_pred) {}
+
+  template <typename _T1> result_of operator()(_T1 &&a) const {
+    using std::get;
+    return pred(get<1>(a));
+  }
+
+private:
+  mutable Predicate pred;
+};
+
+// Used by: remove_if
+template <typename Predicate> struct negate_predicate_key_fun {
+  typedef bool result_of;
+  negate_predicate_key_fun(Predicate _pred) : pred(_pred) {}
+
+  template <typename _T1> result_of operator()(_T1 &&a) const {
+    using std::get;
+    return !pred(get<1>(a));
+  }
+
+private:
+  mutable Predicate pred;
+};
+
+template <typename T> struct sequence_fun {
+  using result_type = T;
+  sequence_fun(T _init, T _step) : init(_init), step(_step) {}
+
+  template <typename _T> result_type operator()(_T &&i) const {
+    return static_cast<T>(init + step * i);
+  }
+
+private:
+  const T init;
+  const T step;
+};
+
+//[binary_pred](Ref a, Ref b){ return(binary_pred(get<0>(a),get<0>(b)));
+template <typename Predicate> struct unique_fun {
+  typedef bool result_of;
+  unique_fun(Predicate _pred) : pred(_pred) {}
+  template <typename _T> result_of operator()(_T &&a, _T &&b) const {
+    using std::get;
+    return pred(get<0>(a), get<0>(b));
+  }
+
+private:
+  mutable Predicate pred;
+};
+
+// Lambda: [pred, &new_value](Ref1 a, Ref2 s) {return pred(s) ? new_value : a;
+// });
+template <typename T, typename Predicate> struct replace_if_fun {
+public:
+  typedef T result_of;
+  replace_if_fun(Predicate _pred, T _new_value)
+      : pred(_pred), new_value(_new_value) {}
+
+  template <typename _T1, typename _T2> T operator()(_T1 &&a, _T2 &&s) const {
+    return pred(s) ? new_value : a;
+  }
+
+private:
+  mutable Predicate pred;
+  const T new_value;
+};
+
+//[pred,op](Ref a){return pred(a) ? op(a) : a; }
+template <typename T, typename Predicate, typename Operator>
+struct transform_if_fun {
+  transform_if_fun(Predicate _pred, Operator _op) : pred(_pred), op(_op) {}
+  template <typename _T>
+  void operator()(_T&& t) const {
+    using std::get;
+    if (pred(get<0>(t)))
+      get<1>(t) = op(get<0>(t));
+  }
+
+private:
+  mutable Predicate pred;
+  mutable Operator op;
+};
+
+//[pred, op](Ref1 a, Ref2 s) { return pred(s) ? op(a) : a; });
+template <typename T, typename Predicate, typename Operator>
+struct transform_if_unary_zip_mask_fun {
+  transform_if_unary_zip_mask_fun(Predicate _pred, Operator _op) : pred(_pred), op(_op) {}
+  template <typename _T>
+  void operator()(_T&& t) const {
+    using std::get;
+    if (pred(get<1>(t)))
+      get<2>(t) = op(get<0>(t));
+  }
+
+private:
+  mutable Predicate pred;
+  mutable Operator op;
+};
+
+template <typename T, typename Predicate, typename BinaryOperation>
+class transform_if_zip_mask_fun {
+public:
+  transform_if_zip_mask_fun(Predicate _pred = oneapi::dpl::identity(),
+                            BinaryOperation _op = oneapi::dpl::identity())
+      : pred(_pred), op(_op) {}
+  template <typename _T> void operator()(_T &&t) const {
+    using std::get;
+    if (pred(get<2>(t)))
+      get<3>(t) = op(get<0>(t), get<1>(t));
+  }
+
+private:
+  mutable Predicate pred;
+  mutable BinaryOperation op;
+};
+
+// This following code is similar to a section of code in
+// oneDPL/include/oneapi/dpl/pstl/hetero/dpcpp/parallel_backend_sycl_radix_sort.h
+// It has a similar approach, and could be consolidated.
+// Outside of some differences in approach, there are two significant
+// differences in function.
+//
+// 1) This code allows the output type of the bit range translation to be fit
+// into to the minimal type required to provide that many bits. The code in
+// oneDPL to calculate the bucket for the radix is similar but its output is
+// always std::uint32_t.  The assumption that the bit range desired will fit in
+// 32 bits is not true for this code.
+//
+// 2) This code ensures that for floating point type, -0.0f and 0.0f map to the
+// same value.  This allows the output of this translation to be used to provide
+// a sort which ensures the stability of these values for floating point types.
+
+template <int N> struct uint_byte_map {};
+template <> struct uint_byte_map<1> { using type = uint8_t; };
+template <> struct uint_byte_map<2> { using type = uint16_t; };
+template <> struct uint_byte_map<4> { using type = uint32_t; };
+template <> struct uint_byte_map<8> { using type = uint64_t; };
+
+template <typename T> struct uint_map {
+  using type = typename uint_byte_map<sizeof(T)>::type;
+};
+
+template <typename T, typename OutKeyT> class translate_key {
+  using uint_type_t = typename uint_map<T>::type;
+
+public:
+  translate_key(int begin_bit, int end_bit) {
+    shift = begin_bit;
+    mask = ~OutKeyT(0); // all ones
+    mask = mask >> (sizeof(OutKeyT) * 8 -
+                    (end_bit - begin_bit));           // setup appropriate mask
+    flip_sign = uint_type_t(1) << (sizeof(uint_type_t) * 8 - 1); // sign bit
+    flip_key = ~uint_type_t(0);                       // 0xF...F
+  }
+
+  inline OutKeyT operator()(const T &key) const {
+    uint_type_t intermediate;
+    if constexpr (std::is_floating_point<T>::value) {
+        // normal case (both -0.0f and 0.0f equal -0.0f)
+        if (key != T(-0.0f)) {
+        uint_type_t is_negative = reinterpret_cast<const uint_type_t &>(key) >>
+              (sizeof(uint_type_t) * 8 - 1);
+          intermediate = reinterpret_cast<const uint_type_t &>(key) ^
+                         ((is_negative * flip_key) | flip_sign);
+        } else // special case for -0.0f to keep stability with 0.0f
+        {
+          T negzero = T(-0.0f);
+          intermediate = reinterpret_cast<const uint_type_t &>(negzero);
+        }
+    } else if constexpr (std::is_signed<T>::value) {
+        intermediate = reinterpret_cast<const uint_type_t &>(key) ^ flip_sign;
+    } else {
+      intermediate = key;
+    }
+
+    return static_cast<OutKeyT>(intermediate >> shift) &
+           mask; // shift, cast, and mask
+  }
+
+private:
+  uint8_t shift;
+  OutKeyT mask;
+  uint_type_t flip_sign;
+  uint_type_t flip_key;
+};
+
+// Unary operator that returns reference to its argument. Ported from
+// oneDPL: oneapi/dpl/pstl/utils.h
+struct no_op_fun {
+  template <typename Tp> Tp &&operator()(Tp &&a) const {
+    return ::std::forward<Tp>(a);
+  }
+};
+
+// Unary functor which composes a pair of functors by calling them in succession
+// on an input
+template <typename FunctorInner, typename FunctorOuter>
+struct __composition_functor {
+  __composition_functor(FunctorInner in, FunctorOuter out)
+      : _in(in), _out(out) {}
+  template <typename T> T operator()(const T &i) const {
+    return _out(_in(i));
+  }
+  FunctorInner _in;
+  FunctorOuter _out;
+};
+
+// Unary functor which maps an index of a ROI into a 2D flattened array
+template <typename OffsetT> struct __roi_2d_index_functor {
+  __roi_2d_index_functor(const OffsetT &num_cols,
+                         const ::std::size_t &row_stride)
+      : _num_cols(num_cols), _row_stride(row_stride) {}
+
+  template <typename Index> Index operator()(const Index &i) const {
+    return _row_stride * (i / _num_cols) + (i % _num_cols);
+  }
+
+  OffsetT _num_cols;
+  ::std::size_t _row_stride;
+};
+
+// Unary functor which maps and index into an interleaved array by its active
+// channel
+template <typename OffsetT> struct __interleaved_index_functor {
+  __interleaved_index_functor(const OffsetT &total_channels,
+                              const OffsetT &active_channel)
+      : _total_channels(total_channels), _active_channel(active_channel) {}
+
+  template <typename Index> Index operator()(const Index &i) const {
+    return i * _total_channels + _active_channel;
+  }
+
+  OffsetT _total_channels;
+  OffsetT _active_channel;
+};
+
+} // end namespace internal
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/iterator_adaptor.h b/sycl/include/dpct/dpl_extras/iterator_adaptor.h
new file mode 100644
index 00000000000..a8158f4e879
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/iterator_adaptor.h
@@ -0,0 +1,54 @@
+//==---- iterator_adaptor.h -----------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_ITERATOR_ADAPTOR_H__
+#define __DPCT_ITERATOR_ADAPTOR_H__
+
+#include <boost/iterator_adaptors.hpp>
+
+namespace dpct {
+
+typedef boost::use_default use_default;
+
+typedef boost::iterator_core_access iterator_core_access;
+
+template <class Derived, class Base, class Value = use_default,
+          class Traversal = use_default, class System = use_default,
+          class Reference = use_default, class Difference = use_default>
+class iterator_adaptor
+    : public boost::iterator_adaptor<Derived, Base, Value, Traversal, Reference,
+                                     Difference> {
+protected:
+  typedef boost::iterator_adaptor<Derived, Base, Value, Traversal, Reference,
+                                  Difference>
+      base_t;
+
+  // Note: System tag is not used to dispatch to any specific backend, this is
+  //       controlled explicitly by the user with execution policies. System tag
+  //       is kept for potential future extension by specialization based on
+  //       this part of the type definition.
+
+public:
+  // It is the user's responsibility to ensure extra data is available on the
+  // device if they want to use this iterator with device execution policies
+  using is_passed_directly = ::std::true_type;
+  using iterator_category = ::std::random_access_iterator_tag;
+
+  iterator_adaptor() {}
+
+  explicit iterator_adaptor(Base const &iter) : base_t(iter) {}
+
+  typename base_t::reference
+  operator[](typename base_t::difference_type n) const {
+    return *(this->derived() + n);
+  }
+};
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/iterators.h b/sycl/include/dpct/dpl_extras/iterators.h
new file mode 100644
index 00000000000..2e1d1098672
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/iterators.h
@@ -0,0 +1,347 @@
+//==---- iterators.h ------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_ITERATORS_H__
+#define __DPCT_ITERATORS_H__
+
+#include <oneapi/dpl/iterator>
+
+#include "functional.h"
+
+namespace dpct {
+
+namespace internal {
+
+// Wrapper class returned from a dereferenced transform_iterator which was
+// created using
+//  make_transform_output_iterator(). Used to apply the supplied transform
+//  function when writing into an object of this class.
+//
+// Example:
+// int a[] = {0, 1, 2, 3, 4};
+// int* p = a;
+// auto f = [](auto v) {return v*v;};
+// auto tr_out = dpct::make_transform_output_iterator(p+1, f);
+// auto wrap = *tr_out;         // wrap is a transform_output_ref_wrapper
+// std::cout<<*(p+1)<<std::endl;  // '1'
+// wrap = 2;                    // apply function, store 2*2=4
+// std::cout<<*(p+1)<<std::endl;  // '4'
+template <typename T, typename _UnaryFunc> class transform_output_ref_wrapper {
+private:
+  T __my_reference_;
+  _UnaryFunc __my_unary_func_;
+
+public:
+  template <typename U>
+  transform_output_ref_wrapper(U &&__reference, _UnaryFunc __unary_func)
+      : __my_reference_(std::forward<U>(__reference)),
+        __my_unary_func_(__unary_func) {}
+
+  // When writing to an object of this type, apply the supplied unary function,
+  // then write to the wrapped reference
+  template <typename UnaryInputType>
+  transform_output_ref_wrapper &operator=(const UnaryInputType &e) {
+    __my_reference_ = __my_unary_func_(e);
+    return *this;
+  }
+};
+
+// Unary functor to create a transform_output_reference_wrapper when a
+// transform_iterator is dereferenced, so that a
+// the supplied unary function may be applied on write, resulting in a
+// transform_output_iterator
+template <typename _UnaryFunc> struct _Unary_Out {
+  _Unary_Out(_UnaryFunc __f_) : __f(__f_) {}
+  _UnaryFunc __f;
+  template <typename T> auto operator()(T &&val) const {
+    return transform_output_ref_wrapper<T, _UnaryFunc>(std::forward<T>(val),
+                                                       __f);
+  }
+};
+
+} // end namespace internal
+
+using std::advance;
+
+using std::distance;
+
+template <typename T>
+oneapi::dpl::counting_iterator<T> make_counting_iterator(const T &input) {
+  return oneapi::dpl::counting_iterator<T>(input);
+}
+
+template <typename _Tp> class constant_iterator {
+public:
+  typedef std::false_type is_hetero;
+  typedef std::true_type is_passed_directly;
+  typedef std::ptrdiff_t difference_type;
+  typedef _Tp value_type;
+  typedef _Tp *pointer;
+  // There is no storage behind the iterator, so we return a value instead of
+  // reference.
+  typedef const _Tp reference;
+  typedef const _Tp const_reference;
+  typedef std::random_access_iterator_tag iterator_category;
+
+  explicit constant_iterator(_Tp __init)
+      : __my_value_(__init), __my_counter_(0) {}
+
+private:
+  // used to construct iterator instances with different counter values required
+  // by arithmetic operators
+  constant_iterator(const _Tp &__value, const difference_type &__offset)
+      : __my_value_(__value), __my_counter_(__offset) {}
+
+public:
+  // non-const variants of access operators are not provided so unintended
+  // writes are caught at compile time.
+  const_reference operator*() const { return __my_value_; }
+  const_reference operator[](difference_type) const { return __my_value_; }
+
+  difference_type operator-(const constant_iterator &__it) const {
+    return __my_counter_ - __it.__my_counter_;
+  }
+
+  constant_iterator &operator+=(difference_type __forward) {
+    __my_counter_ += __forward;
+    return *this;
+  }
+  constant_iterator &operator-=(difference_type __backward) {
+    return *this += -__backward;
+  }
+  constant_iterator &operator++() { return *this += 1; }
+  constant_iterator &operator--() { return *this -= 1; }
+
+  constant_iterator operator++(int) {
+    constant_iterator __it(*this);
+    ++(*this);
+    return __it;
+  }
+  constant_iterator operator--(int) {
+    constant_iterator __it(*this);
+    --(*this);
+    return __it;
+  }
+
+  constant_iterator operator-(difference_type __backward) const {
+    return constant_iterator(__my_value_, __my_counter_ - __backward);
+  }
+  constant_iterator operator+(difference_type __forward) const {
+    return constant_iterator(__my_value_, __my_counter_ + __forward);
+  }
+  friend constant_iterator operator+(difference_type __forward,
+                                     const constant_iterator __it) {
+    return __it + __forward;
+  }
+
+  bool operator==(const constant_iterator &__it) const {
+    return __my_value_ == __it.__my_value_ &&
+           this->__my_counter_ == __it.__my_counter_;
+  }
+  bool operator!=(const constant_iterator &__it) const {
+    return !(*this == __it);
+  }
+  bool operator<(const constant_iterator &__it) const {
+    return *this - __it < 0;
+  }
+  bool operator>(const constant_iterator &__it) const { return __it < *this; }
+  bool operator<=(const constant_iterator &__it) const {
+    return !(*this > __it);
+  }
+  bool operator>=(const constant_iterator &__it) const {
+    return !(*this < __it);
+  }
+
+private:
+  _Tp __my_value_;
+  uint64_t __my_counter_;
+};
+
+template <typename _Tp>
+constant_iterator<_Tp> make_constant_iterator(_Tp __value) {
+  return constant_iterator<_Tp>(__value);
+}
+
+// key_value_pair class to represent a key and value, specifically a
+// dereferenced arg_index_input_iterator
+template <typename _KeyTp, typename _ValueTp> class key_value_pair {
+public:
+  key_value_pair() = default;
+
+  key_value_pair(const _KeyTp &_key, const _ValueTp &_value)
+      : key(_key), value(_value) {}
+
+  bool operator==(const key_value_pair<_KeyTp, _ValueTp> &_kvp) const {
+    return (key == _kvp.key) && (value == _kvp.value);
+  }
+
+  bool operator!=(const key_value_pair<_KeyTp, _ValueTp> &_kvp) const {
+    return (key != _kvp.key) || (value != _kvp.value);
+  }
+
+  _KeyTp key;
+  _ValueTp value;
+};
+
+namespace detail {
+
+template <typename KeyTp, typename _ValueTp> struct make_key_value_pair {
+  template <typename ValRefTp>
+  key_value_pair<KeyTp, _ValueTp>
+  operator()(const oneapi::dpl::__internal::tuple<KeyTp, ValRefTp> &tup) const {
+    return ::dpct::key_value_pair<KeyTp, _ValueTp>(::std::get<0>(tup),
+                                                   ::std::get<1>(tup));
+  }
+};
+
+template <class T> struct __zip_iterator_impl;
+template <class... Ts> struct __zip_iterator_impl<std::tuple<Ts...>> {
+  using type = oneapi::dpl::zip_iterator<Ts...>;
+};
+
+} // end namespace detail
+
+// dpct::zip_iterator can only accept std::tuple type as template argument for
+// compatibility purpose. Please use oneapi::dpl::zip_iterator if you want to
+// pass iterator's types directly.
+template <typename... Ts>
+using zip_iterator = typename detail::__zip_iterator_impl<Ts...>::type;
+
+// arg_index_input_iterator is an iterator over a input iterator, with a index.
+// When dereferenced, it returns a key_value_pair, which can be interrogated for
+// the index key or the value from the input iterator
+template <typename InputIteratorT, typename OffsetT = ptrdiff_t,
+          typename OutputValueT =
+              typename ::std::iterator_traits<InputIteratorT>::value_type>
+class arg_index_input_iterator
+    : public oneapi::dpl::transform_iterator<
+          oneapi::dpl::zip_iterator<oneapi::dpl::counting_iterator<OffsetT>,
+                                    InputIteratorT>,
+          detail::make_key_value_pair<OffsetT, OutputValueT>> {
+  using arg_index_input_iterator_wrap = oneapi::dpl::transform_iterator<
+      oneapi::dpl::zip_iterator<oneapi::dpl::counting_iterator<OffsetT>,
+                                InputIteratorT>,
+      detail::make_key_value_pair<OffsetT, OutputValueT>>;
+
+public:
+  typedef OffsetT difference_type;
+
+  // signal to __get_sycl_range that this iterator is as a direct pass iterator
+  using is_zip = ::std::true_type;
+
+  arg_index_input_iterator(const arg_index_input_iterator_wrap &__arg_wrap)
+      : arg_index_input_iterator_wrap(__arg_wrap) {}
+  arg_index_input_iterator(InputIteratorT __iter)
+      : arg_index_input_iterator_wrap(
+            oneapi::dpl::make_zip_iterator(
+                oneapi::dpl::counting_iterator(OffsetT(0)), __iter),
+            detail::make_key_value_pair<OffsetT, OutputValueT>()) {}
+
+  arg_index_input_iterator &operator=(const arg_index_input_iterator &__input) {
+    arg_index_input_iterator_wrap::operator=(__input);
+    return *this;
+  }
+  arg_index_input_iterator &operator++() {
+    arg_index_input_iterator_wrap::operator++();
+    return *this;
+  }
+  arg_index_input_iterator &operator--() {
+    arg_index_input_iterator_wrap::operator--();
+    return *this;
+  }
+  arg_index_input_iterator operator++(int) {
+    arg_index_input_iterator __it(*this);
+    ++(*this);
+    return __it;
+  }
+  arg_index_input_iterator operator--(int) {
+    arg_index_input_iterator __it(*this);
+    --(*this);
+    return __it;
+  }
+  arg_index_input_iterator operator+(difference_type __forward) const {
+    return arg_index_input_iterator(
+        arg_index_input_iterator_wrap::operator+(__forward));
+  }
+  arg_index_input_iterator operator-(difference_type __backward) const {
+    return arg_index_input_iterator(
+        arg_index_input_iterator_wrap::operator-(__backward));
+  }
+  arg_index_input_iterator &operator+=(difference_type __forward) {
+    arg_index_input_iterator_wrap::operator+=(__forward);
+    return *this;
+  }
+  arg_index_input_iterator &operator-=(difference_type __backward) {
+    arg_index_input_iterator_wrap::operator-=(__backward);
+    return *this;
+  }
+
+  friend arg_index_input_iterator
+  operator+(difference_type __forward, const arg_index_input_iterator &__it) {
+    return __it + __forward;
+  }
+
+  difference_type operator-(const arg_index_input_iterator &__it) const {
+    return arg_index_input_iterator_wrap::operator-(__it);
+  }
+  bool operator==(const arg_index_input_iterator &__it) const {
+    return arg_index_input_iterator_wrap::operator==(__it);
+  }
+  bool operator!=(const arg_index_input_iterator &__it) const {
+    return !(*this == __it);
+  }
+  bool operator<(const arg_index_input_iterator &__it) const {
+    return *this - __it < 0;
+  }
+  bool operator>(const arg_index_input_iterator &__it) const {
+    return __it < *this;
+  }
+  bool operator<=(const arg_index_input_iterator &__it) const {
+    return !(*this > __it);
+  }
+  bool operator>=(const arg_index_input_iterator &__it) const {
+    return !(*this < __it);
+  }
+
+  // returns an arg_index_input_iterator with the same iter position, but a
+  // count reset to 0
+  arg_index_input_iterator create_normalized() {
+    return arg_index_input_iterator(
+        ::std::get<1>(arg_index_input_iterator_wrap::base().base()));
+  }
+};
+
+template <typename IterT> struct io_iterator_pair {
+  inline io_iterator_pair() : selector(false) {}
+
+  inline io_iterator_pair(const IterT &first, const IterT &second)
+      : selector(false) {
+    iter[0] = first;
+    iter[1] = second;
+  }
+
+  inline IterT first() const { return selector ? iter[1] : iter[0]; }
+
+  inline IterT second() const { return selector ? iter[0] : iter[1]; }
+
+  inline void swap() { selector = !selector; }
+
+  bool selector;
+
+  IterT iter[2];
+};
+
+template <typename _Iter, typename _UnaryFunc>
+auto make_transform_output_iterator(_Iter __it, _UnaryFunc __unary_func) {
+  return oneapi::dpl::transform_iterator(
+      __it, internal::_Unary_Out<_UnaryFunc>(__unary_func));
+}
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/memory.h b/sycl/include/dpct/dpl_extras/memory.h
new file mode 100644
index 00000000000..5ff61faadfb
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/memory.h
@@ -0,0 +1,976 @@
+//==---- memory.h ---------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_MEMORY_H__
+#define __DPCT_MEMORY_H__
+
+#include <oneapi/dpl/memory>
+#include "functional.h"
+
+// Memory management section:
+// device_pointer, device_reference, swap, device_iterator, malloc_device,
+// device_new, free_device, device_delete
+namespace dpct {
+namespace detail {
+template <typename T>
+struct make_allocatable
+{
+  using type = T;
+};
+
+template <>
+struct make_allocatable<void>
+{
+  using type = ::dpct::cs::byte_t;
+};
+
+#if defined(__LIBSYCL_MAJOR_VERSION) && defined(__LIBSYCL_MINOR_VERSION) &&    \
+    defined(__LIBSYCL_PATCH_VERSION)
+#define _DPCT_LIBSYCL_VERSION                                                  \
+  (__LIBSYCL_MAJOR_VERSION * 10000 + __LIBSYCL_MINOR_VERSION * 100 +           \
+   __LIBSYCL_PATCH_VERSION)
+#else
+#define _DPCT_LIBSYCL_VERSION 0
+#endif
+
+template <typename _DataT>
+using __buffer_allocator =
+#if _DPCT_LIBSYCL_VERSION >= 60000
+    sycl::buffer_allocator<typename make_allocatable<_DataT>::type>;
+#else
+    sycl::buffer_allocator;
+#endif
+} // namespace detail
+
+#ifdef DPCT_USM_LEVEL_NONE
+template <typename T, sycl::access_mode Mode = sycl::access_mode::read_write,
+          typename Allocator = detail::__buffer_allocator<T>>
+class device_pointer;
+#else
+template <typename T> class device_pointer;
+#endif
+
+template <typename T> struct device_reference {
+  using pointer = device_pointer<T>;
+  using value_type = T;
+  template <typename OtherT>
+  device_reference(const device_reference<OtherT> &input)
+      : value(input.value) {}
+  device_reference(const pointer &input) : value((*input).value) {}
+  device_reference(value_type &input) : value(input) {}
+  template <typename OtherT>
+  device_reference &operator=(const device_reference<OtherT> &input) {
+    value = input;
+    return *this;
+  };
+  device_reference &operator=(const device_reference &input) {
+    T val = input.value;
+    value = val;
+    return *this;
+  };
+  device_reference &operator=(const value_type &x) {
+    value = x;
+    return *this;
+  };
+  pointer operator&() const { return pointer(&value); };
+
+  operator T &() { return value; }
+  operator const T &() const { return value; }
+  void swap(device_reference &input) {
+    T tmp = (*this);
+    *this = (input);
+    input = (tmp);
+  }
+  T &value;
+};
+
+template <typename T>
+void swap(device_reference<T> &x, device_reference<T> &y) {
+  x.swap(y);
+}
+
+template <typename T> void swap(T &x, T &y) {
+  T tmp = x;
+  x = y;
+  y = tmp;
+}
+
+template <typename T>
+::std::ostream &operator<<(::std::ostream &out,
+                           const device_reference<T> &ref) {
+  return out << T(ref);
+}
+
+namespace internal {
+// struct for checking if iterator is heterogeneous or not
+template <typename Iter,
+          typename Void = void> // for non-heterogeneous iterators
+struct is_hetero_iterator : std::false_type {};
+
+template <typename Iter> // for heterogeneous iterators
+struct is_hetero_iterator<
+    Iter, typename std::enable_if<Iter::is_hetero::value, void>::type>
+    : std::true_type {};
+} // namespace internal
+
+#ifdef DPCT_USM_LEVEL_NONE
+// Must be forward declared due to default argument
+template <typename T>
+device_pointer<T> device_new(device_pointer<void>, const T &,
+                             const std::size_t = 1);
+
+template <typename T, sycl::access_mode Mode, typename Allocator>
+class device_iterator;
+
+template <typename ValueType, typename Allocator, typename Derived>
+class device_pointer_base {
+protected:
+  sycl::buffer<ValueType, 1, Allocator> buffer;
+  std::size_t idx;
+
+  // Declare friend to give access to protected buffer and idx members
+  template <typename T>
+  friend device_pointer<T> device_new(device_pointer<void>, const T &,
+                                      const std::size_t);
+
+public:
+  using pointer = ValueType *;
+  using difference_type = std::make_signed<std::size_t>::type;
+
+  device_pointer_base(sycl::buffer<ValueType, 1> in, std::size_t i = 0)
+      : buffer(in), idx(i) {}
+#ifdef __USE_DPCT
+  template <typename OtherT>
+  device_pointer_base(OtherT *ptr)
+      : buffer(
+            dpct::detail::mem_mgr::instance()
+                .translate_ptr(ptr)
+                .buffer.template reinterpret<ValueType, 1>(sycl::range<1>(
+                    dpct::detail::mem_mgr::instance().translate_ptr(ptr).size /
+                    sizeof(ValueType)))),
+        idx(ptr - (ValueType*)dpct::detail::mem_mgr::instance()
+                .translate_ptr(ptr).alloc_ptr) {}
+#endif
+  device_pointer_base(const std::size_t count)
+      : buffer(sycl::range<1>(count / sizeof(ValueType))), idx() {}
+  // buffer has no default ctor we pass zero-range to create an empty buffer
+  device_pointer_base() : buffer(sycl::range<1>(0)) {}
+  device_pointer_base(const device_pointer_base &in)
+      : buffer(in.buffer), idx(in.idx) {}
+  pointer get() const {
+    // This code returns a pointer data within to a sycl buffer accessor which
+    // is leaving scope. This relies on undefined behavior and may not provide
+    // a valid pointer to data inside that buffer.
+    auto res =
+        (const_cast<device_pointer_base *>(this)->buffer.get_host_access())
+            .get_pointer();
+    return res + idx;
+  }
+  operator ValueType *() {
+    // This code returns a pointer to data within a sycl buffer accessor which
+    // is leaving scope. This relies on undefined behavior and may not provide
+    // a valid pointer to data inside that buffer.
+    auto res = (buffer.get_host_access()).get_pointer();
+    return res + idx;
+  }
+  operator ValueType *() const {
+    // This code returns a pointer to data within a sycl buffer accessor which
+    // is leaving scope. This relies on undefined behavior and may not provide
+    // a valid pointer to data inside that buffer.
+    auto res =
+        (const_cast<device_pointer_base *>(this)->buffer.get_host_access())
+            .get_pointer();
+    return res + idx;
+  }
+  Derived operator+(difference_type forward) const {
+    return Derived{buffer, idx + forward};
+  }
+  Derived operator-(difference_type backward) const {
+    return Derived{buffer, idx - backward};
+  }
+  Derived operator++(int) {
+    Derived p(buffer, idx);
+    idx += 1;
+    return p;
+  }
+  Derived operator--(int) {
+    Derived p(buffer, idx);
+    idx -= 1;
+    return p;
+  }
+  difference_type operator-(const Derived &it) const { return idx - it.idx; }
+  template <typename OtherIterator>
+  typename std::enable_if<internal::is_hetero_iterator<OtherIterator>::value,
+                          difference_type>::type
+  operator-(const OtherIterator &it) const {
+    return idx - std::distance(oneapi::dpl::begin(buffer), it);
+  }
+
+  std::size_t get_idx() const { return idx; } // required
+
+  sycl::buffer<ValueType, 1, Allocator> get_buffer() {
+    return buffer;
+  } // required
+};
+
+template <sycl::access_mode Mode, typename Allocator>
+class device_pointer<void, Mode, Allocator>
+    : public device_pointer_base<::dpct::cs::byte_t, Allocator,
+                                 device_pointer<void, Mode, Allocator>> {
+private:
+  using base_type =
+      device_pointer_base<::dpct::cs::byte_t, Allocator, device_pointer>;
+
+public:
+  using value_type = ::dpct::cs::byte_t;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = void *;
+  using reference = value_type &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::true_type; // required
+  using is_passed_directly = std::false_type;
+  static constexpr sycl::access_mode mode = Mode; // required
+
+  device_pointer(sycl::buffer<value_type, 1> in, std::size_t i = 0)
+      : base_type(in, i) {}
+#ifdef __USE_DPCT
+  template <typename OtherT> device_pointer(OtherT *ptr) : base_type(ptr) {}
+#endif
+  // needed for malloc_device, count is number of bytes to allocate
+  device_pointer(const std::size_t count) : base_type(count) {}
+  device_pointer() : base_type() {}
+  device_pointer(const device_pointer &in) : base_type(in) {}
+  device_pointer &operator+=(difference_type forward) {
+    this->idx += forward;
+    return *this;
+  }
+  device_pointer &operator-=(difference_type backward) {
+    this->idx -= backward;
+    return *this;
+  }
+  // include operators from base class
+  using base_type::operator++;
+  using base_type::operator--;
+  device_pointer &operator++() {
+    this->idx += 1;
+    return *this;
+  }
+  device_pointer &operator--() {
+    this->idx -= 1;
+    return *this;
+  }
+};
+
+template <typename T, sycl::access_mode Mode, typename Allocator>
+class device_pointer
+    : public device_pointer_base<T, Allocator,
+                                 device_pointer<T, Mode, Allocator>> {
+private:
+  using base_type = device_pointer_base<T, Allocator, device_pointer>;
+
+public:
+  using value_type = T;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = T *;
+  using reference = T &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::true_type; // required
+  using is_passed_directly = std::false_type;
+  static constexpr sycl::access_mode mode = Mode; // required
+
+  device_pointer(sycl::buffer<T, 1> in, std::size_t i = 0) : base_type(in, i) {}
+#ifdef __USE_DPCT
+  template <typename OtherT> device_pointer(OtherT *ptr) : base_type(ptr) {}
+#endif
+  // needed for malloc_device, count is number of bytes to allocate
+  device_pointer(const std::size_t count) : base_type(count) {}
+  device_pointer() : base_type() {}
+  device_pointer(const device_pointer &in) : base_type(in) {}
+  device_pointer &operator+=(difference_type forward) {
+    this->idx += forward;
+    return *this;
+  }
+  device_pointer &operator-=(difference_type backward) {
+    this->idx -= backward;
+    return *this;
+  }
+  operator device_pointer<void>() {
+    auto converted_buf =
+        (this->buffer)
+            .template reinterpret<::dpct::cs::byte_t>(
+                sycl::range<1>(sizeof(value_type) * this->buffer.size()));
+    return device_pointer<void>(converted_buf, this->idx);
+  }
+  // include operators from base class
+  using base_type::operator++;
+  using base_type::operator--;
+  device_pointer &operator++() {
+    this->idx += 1;
+    return *this;
+  }
+  device_pointer &operator--() {
+    this->idx -= 1;
+    return *this;
+  }
+};
+#else
+template <typename T> class device_iterator;
+
+template <typename ValueType, typename Derived> class device_pointer_base {
+protected:
+  ValueType *ptr;
+
+public:
+  using pointer = ValueType *;
+  using difference_type = std::make_signed<std::size_t>::type;
+
+  device_pointer_base(ValueType *p) : ptr(p) {}
+  device_pointer_base(const std::size_t count) {
+    sycl::queue default_queue = ::dpct::cs::get_default_queue();
+    ptr = static_cast<ValueType *>(sycl::malloc_shared(
+        count, default_queue.get_device(), default_queue.get_context()));
+  }
+  device_pointer_base() {}
+  pointer get() const { return ptr; }
+  operator ValueType *() { return ptr; }
+  operator ValueType *() const { return ptr; }
+
+  ValueType &operator[](difference_type idx) { return ptr[idx]; }
+  ValueType &operator[](difference_type idx) const { return ptr[idx]; }
+
+  Derived operator+(difference_type forward) const {
+    return Derived{ptr + forward};
+  }
+  Derived operator-(difference_type backward) const {
+    return Derived{ptr - backward};
+  }
+  Derived operator++(int) {
+    Derived p(ptr);
+    ++ptr;
+    return p;
+  }
+  Derived operator--(int) {
+    Derived p(ptr);
+    --ptr;
+    return p;
+  }
+  difference_type operator-(const Derived &it) const { return ptr - it.ptr; }
+};
+
+template <>
+class device_pointer<void>
+    : public device_pointer_base<::dpct::cs::byte_t, device_pointer<void>> {
+private:
+  using base_type =
+      device_pointer_base<::dpct::cs::byte_t, device_pointer<void>>;
+
+public:
+  using value_type = ::dpct::cs::byte_t;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = void *;
+  using reference = value_type &;
+  using const_reference = const value_type &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::false_type;         // required
+  using is_passed_directly = std::true_type; // required
+
+  device_pointer(void *p) : base_type(static_cast<value_type *>(p)) {}
+  // needed for malloc_device, count is number of bytes to allocate
+  device_pointer(const std::size_t count) : base_type(count) {}
+  device_pointer() : base_type() {}
+  pointer get() const { return static_cast<pointer>(this->ptr); }
+  operator void *() { return this->ptr; }
+  operator void *() const { return this->ptr; }
+
+  // include operators from base class
+  using base_type::operator++;
+  using base_type::operator--;
+  device_pointer &operator++() {
+    ++(this->ptr);
+    return *this;
+  }
+  device_pointer &operator--() {
+    --(this->ptr);
+    return *this;
+  }
+  device_pointer &operator+=(difference_type forward) {
+    this->ptr = this->ptr + forward;
+    return *this;
+  }
+  device_pointer &operator-=(difference_type backward) {
+    this->ptr = this->ptr - backward;
+    return *this;
+  }
+};
+
+template <typename T>
+class device_pointer : public device_pointer_base<T, device_pointer<T>> {
+private:
+  using base_type = device_pointer_base<T, device_pointer<T>>;
+
+public:
+  using value_type = T;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = T *;
+  using reference = T &;
+  using const_reference = const T &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::false_type;         // required
+  using is_passed_directly = std::true_type; // required
+
+  device_pointer(T *p) : base_type(p) {}
+  // needed for malloc_device, count is number of bytes to allocate
+  device_pointer(const std::size_t count) : base_type(count) {}
+  device_pointer() : base_type() {}
+  device_pointer &operator=(const device_iterator<T> &in) {
+    this->ptr = static_cast<device_pointer<T>>(in).ptr;
+    return *this;
+  }
+  operator device_pointer<void>() {
+    return device_pointer<void>(static_cast<void *>(this->ptr));
+  }
+  // include operators from base class
+  using base_type::operator++;
+  using base_type::operator--;
+  device_pointer &operator++() {
+    ++(this->ptr);
+    return *this;
+  }
+  device_pointer &operator--() {
+    --(this->ptr);
+    return *this;
+  }
+  device_pointer &operator+=(difference_type forward) {
+    this->ptr = this->ptr + forward;
+    return *this;
+  }
+  device_pointer &operator-=(difference_type backward) {
+    this->ptr = this->ptr - backward;
+    return *this;
+  }
+};
+#endif
+
+#ifdef DPCT_USM_LEVEL_NONE
+template <typename T, sycl::access_mode Mode = sycl::access_mode::read_write,
+          typename Allocator = detail::__buffer_allocator<T>>
+class device_iterator : public device_pointer<T, Mode, Allocator> {
+  using Base = device_pointer<T, Mode, Allocator>;
+
+public:
+  using value_type = T;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = T *;
+  using reference = T &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::true_type;                // required
+  using is_passed_directly = std::false_type;      // required
+  static constexpr sycl::access_mode mode = Mode; // required
+
+  device_iterator() : Base() {}
+  device_iterator(sycl::buffer<T, 1, Allocator> vec, std::size_t index)
+      : Base(vec, index) {}
+  device_iterator(const Base &dev_ptr) : Base(dev_ptr) {}
+  template <sycl::access_mode inMode>
+  device_iterator(const device_iterator<T, inMode, Allocator> &in)
+      : Base(in.buffer, in.idx) {} // required for iter_mode
+  device_iterator &operator=(const device_iterator &in) {
+    Base::buffer = in.buffer;
+    Base::idx = in.idx;
+    return *this;
+  }
+
+  reference operator*() const {
+    return const_cast<device_iterator *>(this)
+        ->buffer.template get_access<mode>()[Base::idx];
+  }
+
+  reference operator[](difference_type i) const { return *(*this + i); }
+  device_iterator &operator++() {
+    ++Base::idx;
+    return *this;
+  }
+  device_iterator &operator--() {
+    --Base::idx;
+    return *this;
+  }
+  device_iterator operator++(int) {
+    device_iterator it(*this);
+    ++(*this);
+    return it;
+  }
+  device_iterator operator--(int) {
+    device_iterator it(*this);
+    --(*this);
+    return it;
+  }
+  device_iterator operator+(difference_type forward) const {
+    const auto new_idx = Base::idx + forward;
+    return {Base::buffer, new_idx};
+  }
+  device_iterator &operator+=(difference_type forward) {
+    Base::idx += forward;
+    return *this;
+  }
+  device_iterator operator-(difference_type backward) const {
+    return {Base::buffer, Base::idx - backward};
+  }
+  device_iterator &operator-=(difference_type backward) {
+    Base::idx -= backward;
+    return *this;
+  }
+  friend device_iterator operator+(difference_type forward,
+                                   const device_iterator &it) {
+    return it + forward;
+  }
+  difference_type operator-(const device_iterator &it) const {
+    return Base::idx - it.idx;
+  }
+  template <typename OtherIterator>
+  typename std::enable_if<internal::is_hetero_iterator<OtherIterator>::value,
+                          difference_type>::type
+  operator-(const OtherIterator &it) const {
+    return Base::idx - std::distance(oneapi::dpl::begin(Base::buffer), it);
+  }
+  bool operator==(const device_iterator &it) const { return *this - it == 0; }
+  bool operator!=(const device_iterator &it) const { return !(*this == it); }
+  bool operator<(const device_iterator &it) const { return *this - it < 0; }
+  bool operator>(const device_iterator &it) const { return it < *this; }
+  bool operator<=(const device_iterator &it) const { return !(*this > it); }
+  bool operator>=(const device_iterator &it) const { return !(*this < it); }
+
+  std::size_t get_idx() const { return Base::idx; } // required
+
+  sycl::buffer<T, 1, Allocator> get_buffer() {
+    return Base::buffer;
+  } // required
+};
+#else
+template <typename T> class device_iterator : public device_pointer<T> {
+  using Base = device_pointer<T>;
+
+protected:
+  std::size_t idx;
+
+public:
+  using value_type = T;
+  using difference_type = std::make_signed<std::size_t>::type;
+  using pointer = typename Base::pointer;
+  using reference = typename Base::reference;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = std::false_type;         // required
+  using is_passed_directly = std::true_type; // required
+  static constexpr sycl::access_mode mode =
+      sycl::access_mode::read_write; // required
+
+  device_iterator() : Base(nullptr), idx(0) {}
+  device_iterator(T *vec, std::size_t index) : Base(vec), idx(index) {}
+  device_iterator(const Base &dev_ptr) : Base(dev_ptr), idx(0) {}
+  template <sycl::access_mode inMode>
+  device_iterator(const device_iterator<T> &in)
+      : Base(in.ptr), idx(in.idx) {} // required for iter_mode
+  device_iterator(const device_iterator &in) = default;
+  device_iterator &operator=(const device_iterator &in) = default;
+
+  reference operator*() const { return *(Base::ptr + idx); }
+
+  reference operator[](difference_type i) { return Base::ptr[idx + i]; }
+  reference operator[](difference_type i) const { return Base::ptr[idx + i]; }
+  device_iterator &operator++() {
+    ++idx;
+    return *this;
+  }
+  device_iterator &operator--() {
+    --idx;
+    return *this;
+  }
+  device_iterator operator++(int) {
+    device_iterator it(*this);
+    ++(*this);
+    return it;
+  }
+  device_iterator operator--(int) {
+    device_iterator it(*this);
+    --(*this);
+    return it;
+  }
+  device_iterator operator+(difference_type forward) const {
+    const auto new_idx = idx + forward;
+    return {Base::ptr, new_idx};
+  }
+  device_iterator &operator+=(difference_type forward) {
+    idx += forward;
+    return *this;
+  }
+  device_iterator operator-(difference_type backward) const {
+    return {Base::ptr, idx - backward};
+  }
+  device_iterator &operator-=(difference_type backward) {
+    idx -= backward;
+    return *this;
+  }
+  friend device_iterator operator+(difference_type forward,
+                                   const device_iterator &it) {
+    return it + forward;
+  }
+  difference_type operator-(const device_iterator &it) const {
+    return idx - it.idx;
+  }
+
+  template <typename OtherIterator>
+  typename std::enable_if<internal::is_hetero_iterator<OtherIterator>::value,
+                          difference_type>::type
+  operator-(const OtherIterator &it) const {
+    return idx - it.get_idx();
+  }
+
+  bool operator==(const device_iterator &it) const { return *this - it == 0; }
+  bool operator!=(const device_iterator &it) const { return !(*this == it); }
+  bool operator<(const device_iterator &it) const { return *this - it < 0; }
+  bool operator>(const device_iterator &it) const { return it < *this; }
+  bool operator<=(const device_iterator &it) const { return !(*this > it); }
+  bool operator>=(const device_iterator &it) const { return !(*this < it); }
+
+  std::size_t get_idx() const { return idx; } // required
+
+  device_iterator &get_buffer() { return *this; } // required
+
+  std::size_t size() const { return idx; }
+};
+#endif
+
+struct sys_tag {};
+struct device_sys_tag : public sys_tag {};
+struct host_sys_tag : public sys_tag {};
+
+#ifdef DPCT_USM_LEVEL_NONE
+template <typename T, typename Tag> class tagged_pointer {
+  static_assert(false,
+                "tagged_pointer is not supported with DPCT_USM_LEVEL_NONE");
+};
+template <typename PolicyOrTag, typename Pointer>
+void release_temporary_allocation(PolicyOrTag &&policy_or_tag, Pointer ptr) {
+  static_assert(
+      false,
+      "release_temporary_allocation is not supported with DPCT_USM_LEVEL_NONE");
+}
+template <typename T, typename PolicyOrTag, typename SizeType>
+auto get_temporary_allocation(PolicyOrTag &&policy_or_tag,
+                              SizeType num_elements) {
+  static_assert(
+      false,
+      "get_temporary_allocation is not supported with DPCT_USM_LEVEL_NONE");
+}
+template <typename PolicyOrTag>
+auto malloc(PolicyOrTag &&policy_or_tag, const ::std::size_t num_bytes) {
+  static_assert(false, "malloc is not supported with DPCT_USM_LEVEL_NONE");
+}
+template <typename T, typename PolicyOrTag>
+auto malloc(PolicyOrTag &&policy_or_tag, const ::std::size_t num_elements) {
+  static_assert(false, "malloc<T> is not supported with DPCT_USM_LEVEL_NONE");
+}
+template <typename PolicyOrTag, typename Pointer>
+void free(PolicyOrTag &&policy_or_tag, Pointer ptr) {
+  static_assert(false, "free is not supported with DPCT_USM_LEVEL_NONE");
+}
+#else
+namespace internal {
+
+// Utility that converts a policy to a tag or reflects a provided tag
+template <typename PolicyOrTag> struct policy_or_tag_to_tag {
+private:
+  using decayed_policy_or_tag_t = ::std::decay_t<PolicyOrTag>;
+  using policy_conversion = ::std::conditional_t<
+      !is_hetero_execution_policy<decayed_policy_or_tag_t>::value, host_sys_tag,
+      device_sys_tag>;
+  static constexpr bool is_policy_v =
+      oneapi::dpl::execution::is_execution_policy_v<decayed_policy_or_tag_t>;
+  static constexpr bool is_sys_tag_v = ::std::disjunction_v<
+      ::std::is_same<decayed_policy_or_tag_t, host_sys_tag>,
+      ::std::is_same<decayed_policy_or_tag_t, device_sys_tag>>;
+  static_assert(is_policy_v || is_sys_tag_v,
+                "Only oneDPL policies or system tags may be provided");
+
+public:
+  using type = ::std::conditional_t<is_policy_v, policy_conversion,
+                                    decayed_policy_or_tag_t>;
+};
+
+template <typename PolicyOrTag>
+using policy_or_tag_to_tag_t = typename policy_or_tag_to_tag<PolicyOrTag>::type;
+
+template <typename PolicyOrTag> struct is_host_policy_or_tag {
+private:
+  using tag_t = policy_or_tag_to_tag_t<PolicyOrTag>;
+
+public:
+  static constexpr bool value = ::std::is_same_v<tag_t, host_sys_tag>;
+};
+
+template <typename PolicyOrTag>
+inline constexpr bool is_host_policy_or_tag_v =
+    is_host_policy_or_tag<PolicyOrTag>::value;
+
+} // namespace internal
+
+// TODO: Make this class an iterator adaptor.
+// tagged_pointer provides a wrapper around a raw pointer type with a tag of the
+// location of the allocated memory. Standard pointer operations are supported
+// with this class.
+template <typename T, typename Tag> class tagged_pointer {
+public:
+  using value_type = T;
+  using difference_type = ::std::ptrdiff_t;
+  using pointer = T *;
+  using reference = T &;
+  using iterator_category = std::random_access_iterator_tag;
+  using is_hetero = ::std::false_type;
+  using is_passed_directly = std::true_type;
+
+  tagged_pointer() : m_ptr(nullptr) {}
+  tagged_pointer(T *ptr) : m_ptr(ptr) {}
+  T &operator[](difference_type idx) { return this->m_ptr[idx]; }
+  const T &operator[](difference_type idx) const { return this->m_ptr[idx]; }
+  tagged_pointer operator+(difference_type forward) const {
+    return tagged_pointer{this->m_ptr + forward};
+  }
+  tagged_pointer operator-(difference_type backward) const {
+    return tagged_pointer{this->m_ptr - backward};
+  }
+  operator const T *() const { return m_ptr; }
+  operator T *() { return m_ptr; }
+  T &operator*() { return *this->m_ptr; }
+  const T &operator*() const { return *this->m_ptr; }
+  T *operator->() { return this->m_ptr; }
+  const T *operator->() const { return this->m_ptr; }
+  tagged_pointer operator++(int) {
+    tagged_pointer p(this->m_ptr);
+    ++this->m_ptr;
+    return p;
+  }
+  tagged_pointer operator--(int) {
+    tagged_pointer p(this->m_ptr);
+    --this->m_ptr;
+    return p;
+  }
+  tagged_pointer &operator++() {
+    ++this->m_ptr;
+    return *this;
+  }
+  tagged_pointer &operator--() {
+    --this->m_ptr;
+    return *this;
+  }
+  difference_type operator-(const tagged_pointer &it) const {
+    return this->m_ptr - it.m_ptr;
+  }
+  tagged_pointer &operator+=(difference_type forward) {
+    this->m_ptr = this->m_ptr + forward;
+    return *this;
+  }
+  tagged_pointer &operator-=(difference_type backward) {
+    this->m_ptr = this->m_ptr - backward;
+    return *this;
+  }
+
+private:
+  T *m_ptr;
+};
+
+// Void specialization for tagged pointers. Iterator traits are not provided but
+// conversion to other non-void tagged pointers is allowed. Pointer arithmetic
+// is disallowed with this specialization.
+template <typename Tag> class tagged_pointer<void, Tag> {
+public:
+  using difference_type = ::std::ptrdiff_t;
+  using pointer = void *;
+  tagged_pointer() : m_ptr(nullptr) {}
+  tagged_pointer(pointer ptr) : m_ptr(ptr) {}
+  operator const void *() const { return m_ptr; }
+  operator void *() { return m_ptr; }
+  // Enable tagged void pointer to convert to all other raw pointer types.
+  template <typename OtherPtr> operator OtherPtr *() const {
+    return static_cast<OtherPtr *>(this->m_ptr);
+  }
+
+private:
+  void *m_ptr;
+};
+
+namespace internal {
+
+// Internal utility to return raw pointer to allocated memory. Note that host
+// allocations are not device accessible (not pinned).
+template <typename PolicyOrTag>
+void *malloc_base(PolicyOrTag &&policy_or_tag, const ::std::size_t num_bytes) {
+  using decayed_policy_or_tag_t = ::std::decay_t<PolicyOrTag>;
+  if constexpr (internal::is_host_policy_or_tag_v<PolicyOrTag>) {
+    return ::std::malloc(num_bytes);
+  } else {
+    sycl::queue q;
+    // Grab the associated queue if a device policy is provided. Otherwise, use
+    // default constructed.
+    if constexpr (oneapi::dpl::execution::is_execution_policy_v<
+                      decayed_policy_or_tag_t>) {
+      q = policy_or_tag.queue();
+    } else {
+      q = ::dpct::cs::get_default_queue();
+    }
+    return sycl::malloc_shared(num_bytes, q);
+  }
+}
+
+} // namespace internal
+
+template <typename PolicyOrTag>
+auto malloc(PolicyOrTag &&policy_or_tag, const ::std::size_t num_bytes) {
+  return tagged_pointer<void, internal::policy_or_tag_to_tag_t<PolicyOrTag>>(
+      internal::malloc_base(::std::forward<PolicyOrTag>(policy_or_tag),
+                            num_bytes));
+}
+
+template <typename T, typename PolicyOrTag>
+auto malloc(PolicyOrTag &&policy_or_tag, const ::std::size_t num_elements) {
+  return tagged_pointer<T, internal::policy_or_tag_to_tag_t<PolicyOrTag>>(
+      static_cast<T *>(
+          internal::malloc_base(::std::forward<PolicyOrTag>(policy_or_tag),
+                                num_elements * sizeof(T))));
+}
+
+template <typename PolicyOrTag, typename Pointer>
+void free(PolicyOrTag &&policy_or_tag, Pointer ptr) {
+  using decayed_policy_or_tag_t = ::std::decay_t<PolicyOrTag>;
+  if constexpr (internal::is_host_policy_or_tag_v<PolicyOrTag>) {
+    ::std::free(ptr);
+  } else {
+    sycl::queue q;
+    // Grab the associated queue if a device policy is provided. Otherwise, use
+    // default constructed.
+    if constexpr (oneapi::dpl::execution::is_execution_policy_v<
+                      decayed_policy_or_tag_t>) {
+      q = policy_or_tag.queue();
+    } else {
+      q = ::dpct::cs::get_default_queue();
+    }
+    sycl::free(ptr, q);
+  }
+}
+
+template <typename T, typename PolicyOrTag, typename SizeType>
+auto get_temporary_allocation(PolicyOrTag &&policy_or_tag,
+                              SizeType num_elements) {
+  auto allocation_ptr =
+      dpct::malloc<T>(::std::forward<PolicyOrTag>(policy_or_tag), num_elements);
+  if (allocation_ptr == nullptr)
+    return ::std::make_pair(allocation_ptr, SizeType(0));
+  return ::std::make_pair(allocation_ptr, num_elements);
+}
+
+template <typename PolicyOrTag, typename Pointer>
+void release_temporary_allocation(PolicyOrTag &&policy_or_tag, Pointer ptr) {
+  dpct::free(::std::forward<PolicyOrTag>(policy_or_tag), ptr);
+}
+#endif
+
+template <typename T>
+device_pointer<T> malloc_device(const std::size_t num_elements) {
+  return device_pointer<T>(num_elements * sizeof(T));
+}
+static inline device_pointer<void> malloc_device(const std::size_t num_bytes) {
+  return device_pointer<void>(num_bytes);
+}
+#ifdef DPCT_USM_LEVEL_NONE
+template <typename T>
+device_pointer<T> device_new(device_pointer<void> p, const T &value,
+                             const std::size_t count) {
+  auto converted_buf = p.buffer.template reinterpret<T>(sycl::range<1>(count));
+  ::std::uninitialized_fill(oneapi::dpl::execution::make_device_policy(
+                                ::dpct::cs::get_default_queue()),
+                            oneapi::dpl::begin(converted_buf),
+                            oneapi::dpl::end(converted_buf), value);
+  return device_pointer<T>(converted_buf, p.idx);
+}
+// buffer manages lifetime
+template <typename T> void free_device(device_pointer<T> ptr) {}
+#else
+template <typename T>
+device_pointer<T> device_new(device_pointer<void> p, const T &value,
+                             const std::size_t count = 1) {
+  dpct::device_pointer<T> converted_p(static_cast<T *>(p.get()));
+  ::std::uninitialized_fill(oneapi::dpl::execution::make_device_policy(
+                                ::dpct::cs::get_default_queue()),
+                            converted_p, converted_p + count, value);
+  return converted_p;
+}
+template <typename T> void free_device(device_pointer<T> ptr) {
+  sycl::free(ptr.get(), ::dpct::cs::get_default_queue());
+}
+#endif
+template <typename T>
+device_pointer<T> device_new(device_pointer<void> p,
+                             const std::size_t count = 1) {
+  return device_new(p, T{}, count);
+}
+template <typename T>
+device_pointer<T> device_new(const std::size_t count = 1) {
+  return device_new(device_pointer<void>(sizeof(T) * count), T{}, count);
+}
+
+template <typename T>
+typename std::enable_if<!std::is_trivially_destructible<T>::value, void>::type
+device_delete(device_pointer<T> p, const std::size_t count = 1) {
+  ::std::destroy(oneapi::dpl::execution::make_device_policy(
+                     ::dpct::cs::get_default_queue()),
+                 p, p + count);
+  free_device(p);
+}
+template <typename T>
+typename std::enable_if<std::is_trivially_destructible<T>::value, void>::type
+device_delete(device_pointer<T> p, const std::size_t count = 1) {
+  free_device(p);
+}
+
+template <typename T> device_pointer<T> get_device_pointer(T *ptr) {
+  return device_pointer<T>(ptr);
+}
+
+template <typename T>
+device_pointer<T> get_device_pointer(const device_pointer<T> &ptr) {
+  return device_pointer<T>(ptr);
+}
+
+template <typename T> T *get_raw_pointer(const device_pointer<T> &ptr) {
+  // This code returns a pointer to data within a sycl buffer accessor which has
+  // left scope. This relies on undefined behavior and may not provide a valid
+  // pointer to data inside that buffer.
+  return ptr.get();
+}
+
+template <typename Pointer> Pointer get_raw_pointer(const Pointer &ptr) {
+  return ptr;
+}
+
+template <typename T> const T &get_raw_reference(const device_reference<T> &ref) {
+  return ref.value;
+}
+
+template <typename T> T &get_raw_reference(device_reference<T> &ref) {
+  return ref.value;
+}
+
+template <typename T> const T &get_raw_reference(const T &ref) {
+  return ref;
+}
+
+template <typename T> T &get_raw_reference(T &ref) {
+  return ref;
+}
+
+} // namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/numeric.h b/sycl/include/dpct/dpl_extras/numeric.h
new file mode 100644
index 00000000000..9864cd17359
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/numeric.h
@@ -0,0 +1,32 @@
+//==---- numeric.h --------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_NUMERIC_H__
+#define __DPCT_NUMERIC_H__
+
+namespace dpct {
+
+template <typename Policy, typename InputIt1, typename InputIt2, typename T>
+T inner_product(Policy &&policy, InputIt1 first1, InputIt1 last1,
+                InputIt2 first2, T init) {
+  return std::transform_reduce(std::forward<Policy>(policy), first1, last1,
+                               first2, init);
+}
+
+template <typename Policy, typename InputIt1, typename InputIt2, typename T,
+          typename BinaryOperation1, typename BinaryOperation2>
+T inner_product(Policy &&policy, InputIt1 first1, InputIt1 last1,
+                InputIt2 first2, T init, BinaryOperation1 op1,
+                BinaryOperation2 op2) {
+  return std::transform_reduce(std::forward<Policy>(policy), first1, last1,
+                               first2, init, op1, op2);
+}
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_extras/vector.h b/sycl/include/dpct/dpl_extras/vector.h
new file mode 100644
index 00000000000..b3189994dd3
--- /dev/null
+++ b/sycl/include/dpct/dpl_extras/vector.h
@@ -0,0 +1,990 @@
+//==---- vector.h ---------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_VECTOR_H__
+#define __DPCT_VECTOR_H__
+
+#include <oneapi/dpl/algorithm>
+#include <oneapi/dpl/execution>
+#include <oneapi/dpl/memory>
+
+#include "memory.h"
+
+#include <algorithm>
+#include <iterator>
+#include <vector>
+
+namespace dpct {
+
+namespace internal {
+template <typename Iter, typename Void = void> // for non-iterators
+struct is_iterator : std::false_type {};
+
+template <typename Iter> // For iterators
+struct is_iterator<
+    Iter,
+    typename std::enable_if<
+        !std::is_void<typename Iter::iterator_category>::value, void>::type>
+    : std::true_type {};
+
+template <typename T> // For pointers
+struct is_iterator<T *> : std::true_type {};
+} // end namespace internal
+
+#ifndef DPCT_USM_LEVEL_NONE
+
+// device_allocator_traits is a helper struct which makes use of custom
+//  allocator constructor routines when they are specified serially on the host,
+//  while enabling oneDPL pstl accelleration when such custom constructors are
+//  not provided.
+template <typename _Allocator> struct device_allocator_traits {
+
+  // taken from libc++
+  template <class, class _Alloc, class... _Args>
+  struct __has_construct_impl : ::std::false_type {};
+
+  template <class _Alloc, class... _Args>
+  struct __has_construct_impl<decltype((void)std::declval<_Alloc>().construct(
+                                  std::declval<_Args>()...)),
+                              _Alloc, _Args...> : ::std::true_type {};
+
+  template <class _Alloc, class... _Args>
+  struct __has_construct : __has_construct_impl<void, _Alloc, _Args...> {};
+
+  template <class _Alloc, class _Pointer, class = void>
+  struct __has_destroy : ::std::false_type {};
+
+  template <class _Alloc, class _Pointer>
+  struct __has_destroy<_Alloc, _Pointer,
+                       decltype((void)std::declval<_Alloc>().destroy(
+                           std::declval<_Pointer>()))> : ::std::true_type {};
+  // end of taken from libc++
+
+  template <typename T, typename Size>
+  static void uninitialized_value_construct_n(_Allocator alloc, T *p, Size n) {
+    assert(p != nullptr && "value constructing null data");
+    if constexpr (__has_construct<_Allocator, T *>::value) {
+      for (Size i = 0; i < n; i++) {
+        ::std::allocator_traits<_Allocator>::construct(alloc, p + i);
+      }
+    } else {
+      ::std::uninitialized_value_construct_n(
+          oneapi::dpl::execution::make_device_policy(
+              ::dpct::cs::get_default_queue()),
+          p, n);
+    }
+  }
+
+  template <typename T, typename Size, typename Value>
+  static void uninitialized_fill_n(_Allocator alloc, T *first, Size n,
+                                   const Value &value) {
+    assert(first != nullptr && "filling null data");
+    if constexpr (__has_construct<_Allocator, T *, const Value &>::value) {
+      for (Size i = 0; i < n; i++) {
+        ::std::allocator_traits<_Allocator>::construct(alloc, first + i, value);
+      }
+    } else {
+      ::std::uninitialized_fill_n(oneapi::dpl::execution::make_device_policy(
+                                      ::dpct::cs::get_default_queue()),
+                                  first, n, value);
+    }
+  }
+
+  template <typename Iter1, typename Size, typename T>
+  static void __uninitialized_custom_copy_n(_Allocator alloc, Iter1 first,
+                                            Size n, T *d_first) {
+    for (Size i = 0; i < n; i++) {
+      ::std::allocator_traits<_Allocator>::construct(alloc, d_first + i,
+                                                     *(first + i));
+    }
+  }
+
+  template <typename Iter1, typename Size, typename T>
+  static void uninitialized_device_copy_n(_Allocator alloc, Iter1 first, Size n,
+                                          T *d_first) {
+    assert(d_first != nullptr && "copying into null data");
+    if constexpr (__has_construct<_Allocator, T *,
+                                  typename ::std::iterator_traits<
+                                      Iter1>::value_type>::value) {
+      __uninitialized_custom_copy_n(alloc, first, n, d_first);
+    } else {
+      ::std::uninitialized_copy_n(oneapi::dpl::execution::make_device_policy(
+                                      ::dpct::cs::get_default_queue()),
+                                  first, n, d_first);
+    }
+  }
+
+  template <typename Iter1, typename Size, typename T>
+  static void uninitialized_host_copy_n(_Allocator alloc, Iter1 first, Size n,
+                                        T *d_first) {
+    assert(d_first != nullptr && "copying into null data");
+    if constexpr (__has_construct<_Allocator, T *,
+                                  typename ::std::iterator_traits<
+                                      Iter1>::value_type>::value) {
+      __uninitialized_custom_copy_n(alloc, first, n, d_first);
+    } else {
+      ::std::uninitialized_copy_n(first, n, d_first);
+    }
+  }
+
+  template <typename T, typename Size>
+  static void destroy_n(_Allocator alloc, T *p, Size n) {
+    assert(p != nullptr && "destroying null data");
+    if constexpr (__has_destroy<_Allocator, T *>::value) {
+      for (Size i = 0; i < n; i++) {
+        ::std::allocator_traits<_Allocator>::destroy(alloc, p + i);
+      }
+    } else {
+      ::std::destroy_n(oneapi::dpl::execution::make_device_policy(
+                           ::dpct::cs::get_default_queue()),
+                       p, n);
+    }
+  }
+};
+
+template <typename T,
+          typename Allocator = sycl::usm_allocator<T, sycl::usm::alloc::shared>>
+class device_vector {
+public:
+  using iterator = device_iterator<T>;
+  using const_iterator = const iterator;
+  using reference = device_reference<T>;
+  using const_reference = const reference;
+  using value_type = T;
+  using pointer = device_pointer<T>;
+  using const_pointer = device_pointer<const T>;
+  using difference_type =
+      typename ::std::iterator_traits<iterator>::difference_type;
+  using size_type = ::std::size_t;
+  using allocator_type = Allocator;
+  using alloc_traits = ::std::allocator_traits<Allocator>;
+
+private:
+  Allocator _alloc;
+  size_type _size;
+  size_type _capacity;
+  T *_storage;
+
+  size_type _min_capacity() const { return size_type(1); }
+
+  void _set_capacity_and_alloc() {
+    _capacity = (::std::max)(_size * 2, _min_capacity());
+    _storage = alloc_traits::allocate(_alloc, _capacity);
+  }
+
+  void _construct(size_type n, size_type start_idx = 0) {
+    if (n > 0) {
+      device_allocator_traits<Allocator>::uninitialized_value_construct_n(
+          _alloc, _storage + start_idx, n);
+    }
+  }
+
+  void _construct(size_type n, const T &value, size_type start_idx = 0) {
+    if (n > 0) {
+      device_allocator_traits<Allocator>::uninitialized_fill_n(
+          _alloc, _storage + start_idx, n, value);
+    }
+  }
+
+  template <typename Iter>
+  void _construct_iter(Iter first, size_type n, size_type start_idx = 0) {
+    if (n > 0) {
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, first, n, _storage + start_idx);
+    }
+  }
+
+  template <typename Iter>
+  void _construct_iter_host(Iter first, size_type n, size_type start_idx = 0) {
+    if (n > 0) {
+      device_allocator_traits<Allocator>::uninitialized_host_copy_n(
+          _alloc, first, n, _storage + start_idx);
+    }
+  }
+
+  void _destroy(size_type n, size_type start_idx = 0) {
+    if (n > 0) {
+      device_allocator_traits<Allocator>::destroy_n(_alloc,
+                                                    _storage + start_idx, n);
+    }
+  }
+
+  void _assign_elements(const device_vector &other) {
+    if (other.size() <= _size) {
+      // if incoming elements fit within existing elements, copy then destroy
+      // excess
+      ::std::copy(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  other.begin(), other.end(), begin());
+      resize(other.size());
+    } else if (other.size() < _capacity) {
+      // if incoming elements don't fit within existing elements but do fit
+      // within total capacity
+      // copy elements that fit, then use uninitialized copy to ge the rest
+      // and adjust size
+      std::copy_n(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  other.begin(), _size, begin());
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, other.begin() + _size, other.size() - _size,
+          _storage + _size);
+      _size = other.size();
+    } else {
+      // If incoming elements exceed current capacity, destroy all existing
+      // elements, then allocate incoming vectors capacity, then use
+      // uninitialized copy
+      clear();
+      reserve(other.capacity());
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, other.begin(), other.size(), _storage);
+      _size = other.size();
+    }
+  }
+
+public:
+  template <typename OtherA> operator ::std::vector<T, OtherA>() const {
+    auto __tmp = ::std::vector<T, OtherA>(this->size());
+    ::std::copy(oneapi::dpl::execution::make_device_policy(
+                    ::dpct::cs::get_default_queue()),
+                this->begin(), this->end(), __tmp.begin());
+    return __tmp;
+  }
+
+  device_vector(
+      const Allocator &alloc = Allocator(::dpct::cs::get_default_queue()))
+      : _alloc(alloc), _size(0), _capacity(_min_capacity()) {
+    _set_capacity_and_alloc();
+  }
+
+  ~device_vector() /*= default*/ {
+    clear();
+    alloc_traits::deallocate(_alloc, _storage, _capacity);
+  }
+
+  explicit device_vector(size_type n, const Allocator &alloc = Allocator(
+                                          ::dpct::cs::get_default_queue()))
+      : _alloc(alloc), _size(n) {
+    _set_capacity_and_alloc();
+    _construct(n);
+  }
+
+  explicit device_vector(
+      size_type n, const T &value,
+      const Allocator &alloc = Allocator(::dpct::cs::get_default_queue()))
+      : _alloc(alloc), _size(n) {
+    _set_capacity_and_alloc();
+    _construct(n, value);
+  }
+
+  device_vector(device_vector &&other)
+      : _alloc(std::move(other._alloc)), _size(other.size()),
+        _capacity(other.capacity()), _storage(other._storage) {
+    other._size = 0;
+    other._capacity = 0;
+    other._storage = nullptr;
+  }
+
+  device_vector(device_vector &&other, const Allocator &alloc)
+      : _alloc(alloc), _size(other.size()), _capacity(other.capacity()) {
+    _storage = alloc_traits::allocate(_alloc, _capacity);
+    _construct_iter(other.begin(), _size); // ok to parallelize
+    other._size = 0;
+    other._capacity = 0;
+    other._storage = nullptr;
+  }
+
+  template <typename InputIterator>
+  device_vector(
+      InputIterator first,
+      typename ::std::enable_if_t<
+          dpct::internal::is_iterator<InputIterator>::value, InputIterator>
+          last,
+      const Allocator &alloc = Allocator(::dpct::cs::get_default_queue()))
+      : _alloc(alloc) {
+    _size = ::std::distance(first, last);
+    _set_capacity_and_alloc();
+    // unsafe to parallelize on device as we dont know if InputIterator is
+    // valid oneDPL input type
+    _construct_iter_host(first, _size);
+  }
+
+  device_vector(const device_vector &other, const Allocator &alloc)
+      : _alloc(alloc) {
+    _size = other.size();
+    _capacity = other.capacity();
+    _storage = alloc_traits::allocate(_alloc, _capacity);
+    _construct_iter(other.begin(), _size);
+  }
+
+  device_vector(const device_vector &other)
+      : device_vector(
+            other,
+            alloc_traits::select_on_container_copy_construction(other._alloc)) {
+  }
+
+  template <typename OtherAllocator>
+  device_vector(
+      const device_vector<T, OtherAllocator> &other,
+      const Allocator &alloc = Allocator(::dpct::cs::get_default_queue()))
+      : _alloc(alloc) {
+    _size = other.size();
+    _capacity = other.capacity();
+    _storage = alloc_traits::allocate(_alloc, _capacity);
+    _construct_iter(other.begin(), _size);
+  }
+
+  template <typename OtherAllocator>
+  device_vector(const ::std::vector<T, OtherAllocator> &v)
+      : device_vector(v.begin(), v.end()) {}
+
+  template <typename OtherAllocator>
+  device_vector(const ::std::vector<T, OtherAllocator> &v,
+                const Allocator &alloc)
+      : device_vector(v.begin(), v.end(), alloc) {}
+
+  template <typename OtherAllocator>
+  device_vector &operator=(const ::std::vector<T, OtherAllocator> &v) {
+    resize(v.size());
+    ::std::copy(oneapi::dpl::execution::make_device_policy(
+                    ::dpct::cs::get_default_queue()),
+                v.begin(), v.end(), begin());
+    return *this;
+  }
+
+  device_vector &operator=(const device_vector &other) {
+    // Copy assignment operator:
+    if constexpr (alloc_traits::propagate_on_container_copy_assignment::value) {
+      clear();
+      alloc_traits::deallocate(_alloc, _storage, _capacity);
+      _capacity = 0;
+      _alloc = other._alloc;
+    }
+    _assign_elements(other);
+    return *this;
+  }
+  device_vector &operator=(device_vector &&other) {
+    // Move assignment operator:
+    if constexpr (alloc_traits::propagate_on_container_move_assignment::value) {
+      clear();
+      alloc_traits::deallocate(_alloc, _storage, _capacity);
+      _alloc = ::std::move(other._alloc);
+      _storage = ::std::move(other._storage);
+      _capacity = ::std::move(other._capacity);
+      _size = ::std::move(other._size);
+    } else {
+      _assign_elements(other);
+      // destroy and deallocate other vector
+      other.clear();
+      alloc_traits::deallocate(other._alloc, other._storage, other._capacity);
+    }
+    other._size = 0;
+    other._capacity = 0;
+    other._storage = nullptr;
+    return *this;
+  }
+  size_type size() const { return _size; }
+  iterator begin() noexcept { return device_iterator<T>(_storage, 0); }
+  iterator end() { return device_iterator<T>(_storage, size()); }
+  const_iterator begin() const noexcept {
+    return device_iterator<T>(_storage, 0);
+  }
+  const_iterator cbegin() const noexcept { return begin(); }
+  const_iterator end() const { return device_iterator<T>(_storage, size()); }
+  const_iterator cend() const { return end(); }
+  T *real_begin() { return _storage; }
+  const T *real_begin() const { return _storage; }
+  void swap(device_vector &v) {
+    if constexpr (::std::allocator_traits<
+                      Allocator>::propagate_on_container_swap::value) {
+      ::std::swap(_alloc, v._alloc);
+      ::std::swap(_size, v._size);
+      ::std::swap(_capacity, v._capacity);
+      ::std::swap(_storage, v._storage);
+    } else {
+      // swap all elements up to the minimum size between the two vectors
+      size_type min_size = (::std::min)(size(), v.size());
+      auto zip = oneapi::dpl::make_zip_iterator(begin(), v.begin());
+      ::std::for_each(oneapi::dpl::execution::make_device_policy(
+                          ::dpct::cs::get_default_queue()),
+                      zip, zip + min_size, [](auto zip_ele) {
+                        std::swap(::std::get<0>(zip_ele),
+                                  ::std::get<1>(zip_ele));
+                      });
+      // then copy the elements beyond the end of the smaller list, and resize
+      if (size() > v.size()) {
+        v.reserve(capacity());
+        device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+            _alloc, begin() + min_size, size() - min_size,
+            v._storage + min_size);
+        v._size = size();
+        _destroy(size() - min_size, min_size);
+        _size = min_size;
+      } else if (size() < v.size()) {
+        reserve(v.capacity());
+        device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+            _alloc, v.begin() + min_size, v.size() - min_size,
+            _storage + min_size);
+        _size = v.size();
+        v._destroy(v.size() - min_size, min_size);
+        v._size = min_size;
+      }
+    }
+  }
+  reference operator[](size_type n) { return _storage[n]; }
+  const_reference operator[](size_type n) const { return _storage[n]; }
+  void reserve(size_type n) {
+    if (n > capacity()) {
+      // allocate buffer for new size
+      auto tmp = alloc_traits::allocate(_alloc, n);
+      // copy content (old buffer to new buffer)
+      if (capacity() > 0) {
+        device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+            _alloc, begin(), _size, tmp);
+        alloc_traits::deallocate(_alloc, _storage, _capacity);
+      }
+      _storage = tmp;
+      _capacity = n;
+    }
+  }
+  void resize(size_type new_size, const T &x = T()) {
+    reserve(new_size);
+    if (new_size > size()) {
+      _construct(new_size - size(), x, size());
+    } else {
+      _destroy(_size - new_size, new_size);
+    }
+    _size = new_size;
+  }
+  size_type max_size(void) const {
+    return ::std::numeric_limits<size_type>::max() / sizeof(T);
+  }
+  size_type capacity() const { return _capacity; }
+  const_reference front() const { return *begin(); }
+  reference front() { return *begin(); }
+  const_reference back(void) const { return *(end() - 1); }
+  reference back(void) { return *(end() - 1); }
+  pointer data(void) { return pointer(_storage); }
+  const_pointer data(void) const { return const_pointer(_storage); }
+  void shrink_to_fit(void) {
+    if (_size != capacity() && capacity() > _min_capacity()) {
+      size_type tmp_capacity = (::std::max)(_size, _min_capacity());
+      auto tmp = alloc_traits::allocate(_alloc, tmp_capacity);
+      if (_size > 0) {
+        ::std::copy(oneapi::dpl::execution::make_device_policy(
+                        ::dpct::cs::get_default_queue()),
+                    begin(), end(), tmp);
+      }
+      alloc_traits::deallocate(_alloc, _storage, _capacity);
+      _storage = tmp;
+      _capacity = tmp_capacity;
+    }
+  }
+  void assign(size_type n, const T &x) {
+    resize(n);
+    if (_size > 0) {
+      ::std::fill(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  begin(), begin() + n, x);
+    }
+  }
+  template <typename InputIterator>
+  void
+  assign(InputIterator first,
+         typename ::std::enable_if<internal::is_iterator<InputIterator>::value,
+                                   InputIterator>::type last) {
+    auto n = ::std::distance(first, last);
+    resize(n);
+    if (_size > 0) {
+      // unsafe to call on device as we don't know the InputIterator type
+      ::std::copy(first, last, begin());
+    }
+  }
+  void clear(void) {
+    _destroy(_size);
+    _size = 0;
+  }
+  bool empty(void) const { return (size() == 0); }
+  void push_back(const T &x) { insert(end(), size_type(1), x); }
+  void pop_back(void) {
+    if (_size > 0) {
+      _destroy(1, _size - 1);
+      --_size;
+    }
+  }
+  iterator erase(iterator first, iterator last) {
+    auto n = ::std::distance(first, last);
+    if (last == end()) {
+      _destroy(n, _size - n);
+      _size = _size - n;
+      return end();
+    }
+    auto m = ::std::distance(last, end());
+    if (m <= 0) {
+      return end();
+    } else if (n >= m) {
+      ::std::copy(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  last, last + m, first);
+    } else {
+      auto tmp = alloc_traits::allocate(_alloc, m);
+
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, last, m, tmp);
+
+      std::copy(oneapi::dpl::execution::make_device_policy(
+                    ::dpct::cs::get_default_queue()),
+                tmp, tmp + m, first);
+      device_allocator_traits<Allocator>::destroy_n(_alloc, tmp, m);
+      alloc_traits::deallocate(_alloc, tmp, m);
+    }
+    // now destroy the remaining elements
+    _destroy(n, size() - n);
+    _size -= n;
+    return begin() + first.get_idx() + n;
+  }
+  iterator erase(iterator pos) { return erase(pos, pos + 1); }
+  iterator insert(iterator position, const T &x) {
+    auto n = ::std::distance(begin(), position);
+    insert(position, size_type(1), x);
+    return begin() + n;
+  }
+  void insert(iterator position, size_type n, const T &x) {
+    if (position == end()) {
+      reserve(size() + n);
+      device_allocator_traits<Allocator>::uninitialized_fill_n(
+          _alloc, _storage + size(), n, x);
+      _size += n;
+    } else {
+      auto i_n = ::std::distance(begin(), position);
+      // allocate temporary storage
+      auto m = ::std::distance(position, end());
+      // will throw if position is not inside active vector
+      auto tmp = alloc_traits::allocate(_alloc, m);
+      // copy remainder
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, position, m, tmp);
+      resize(size() + n);
+      // resizing might invalidate position
+      position = begin() + position.get_idx();
+      ::std::fill(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  position, position + n, x);
+      ::std::copy(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  tmp, tmp + m, position + n);
+      device_allocator_traits<Allocator>::destroy_n(_alloc, tmp, m);
+      alloc_traits::deallocate(_alloc, tmp, m);
+    }
+  }
+  template <typename InputIterator>
+  void
+  insert(iterator position, InputIterator first,
+         typename ::std::enable_if<internal::is_iterator<InputIterator>::value,
+                                   InputIterator>::type last) {
+    auto n = ::std::distance(first, last);
+    if (position == end()) {
+      reserve(size() + n);
+      // unsafe to call on device as we dont know the InputIterator type
+      ::std::uninitialized_copy(first, last, end());
+      _size += n;
+    } else {
+      auto m = ::std::distance(position, end());
+      // will throw if position is not inside active vector
+      auto tmp = alloc_traits::allocate(_alloc, m);
+
+      device_allocator_traits<Allocator>::uninitialized_device_copy_n(
+          _alloc, position, m, tmp);
+
+      resize(size() + n);
+      // resizing might invalidate position
+      position = begin() + position.get_idx();
+      // unsafe to call on device as we dont know the InputIterator type
+      ::std::copy(first, last, position);
+      ::std::copy(oneapi::dpl::execution::make_device_policy(
+                      ::dpct::cs::get_default_queue()),
+                  tmp, tmp + m, position + n);
+      device_allocator_traits<Allocator>::destroy_n(_alloc, tmp, m);
+      alloc_traits::deallocate(_alloc, tmp, m);
+    }
+  }
+  Allocator get_allocator() const { return _alloc; }
+};
+
+#else
+
+template <typename T, typename Allocator = detail::__buffer_allocator<T>>
+class device_vector {
+  static_assert(
+      std::is_same<Allocator, detail::__buffer_allocator<T>>::value,
+      "device_vector doesn't support custom allocator when USM is not used.");
+
+public:
+  using iterator = device_iterator<T>;
+  using const_iterator = const iterator;
+  using reference = device_reference<T>;
+  using const_reference = const reference;
+  using value_type = T;
+  using pointer = device_pointer<T>;
+  using const_pointer = device_pointer<const T>;
+  using difference_type =
+      typename std::iterator_traits<iterator>::difference_type;
+  using size_type = std::size_t;
+
+private:
+  using Buffer = sycl::buffer<T, 1>;
+  using Range = sycl::range<1>;
+  // Using mem_mgr to handle memory allocation
+  void *_storage;
+  size_type _size;
+
+  size_type _min_capacity() const { return size_type(1); }
+
+  void *alloc_store(size_type num_bytes) {
+    return detail::mem_mgr::instance().mem_alloc(num_bytes);
+  }
+
+public:
+  template <typename OtherA> operator std::vector<T, OtherA>() const {
+    auto __tmp = std::vector<T, OtherA>(this->size());
+    std::copy(oneapi::dpl::execution::dpcpp_default, this->begin(), this->end(),
+              __tmp.begin());
+    return __tmp;
+  }
+  device_vector()
+      : _storage(alloc_store(_min_capacity() * sizeof(T))), _size(0) {}
+  ~device_vector() = default;
+  explicit device_vector(size_type n) : device_vector(n, T()) {}
+  explicit device_vector(size_type n, const T &value)
+      : _storage(alloc_store((std::max)(n, _min_capacity()) * sizeof(T))),
+        _size(n) {
+    auto buf = get_buffer();
+    std::fill(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(buf),
+              oneapi::dpl::begin(buf) + n, T(value));
+  }
+  device_vector(const device_vector &other)
+      : _storage(other._storage), _size(other.size()) {}
+  device_vector(device_vector &&other)
+      : _storage(std::move(other._storage)), _size(other.size()) {}
+
+  template <typename InputIterator>
+  device_vector(InputIterator first,
+                typename std::enable_if<
+                    internal::is_iterator<InputIterator>::value &&
+                        !std::is_pointer<InputIterator>::value &&
+                        std::is_same<typename std::iterator_traits<
+                                         InputIterator>::iterator_category,
+                                     std::random_access_iterator_tag>::value,
+                    InputIterator>::type last)
+      : _storage(alloc_store(std::distance(first, last) * sizeof(T))),
+        _size(std::distance(first, last)) {
+    auto buf = get_buffer();
+    auto dst = oneapi::dpl::begin(buf);
+    std::copy(oneapi::dpl::execution::make_device_policy(
+                  ::dpct::cs::get_default_queue()),
+              first, last, dst);
+  }
+
+  template <typename InputIterator>
+  device_vector(InputIterator first,
+                typename std::enable_if<std::is_pointer<InputIterator>::value,
+                                        InputIterator>::type last)
+      : _storage(alloc_store(std::distance(first, last) * sizeof(T))),
+        _size(std::distance(first, last)) {
+    auto buf = get_buffer();
+    Buffer tmp_buf(first, last);
+    auto start = oneapi::dpl::begin(tmp_buf);
+    auto end = oneapi::dpl::end(tmp_buf);
+    auto dst = oneapi::dpl::begin(buf);
+    std::copy(oneapi::dpl::execution::make_device_policy(
+                  ::dpct::cs::get_default_queue()),
+              start, end, dst);
+  }
+
+  template <typename InputIterator>
+  device_vector(InputIterator first,
+                typename std::enable_if<
+                    internal::is_iterator<InputIterator>::value &&
+                        !std::is_same<typename std::iterator_traits<
+                                          InputIterator>::iterator_category,
+                                      std::random_access_iterator_tag>::value,
+                    InputIterator>::type last)
+      : _storage(alloc_store(std::distance(first, last) * sizeof(T))),
+        _size(std::distance(first, last)) {
+    auto buf = get_buffer();
+    std::vector<T> tmp(first, last);
+    Buffer tmp_buf(tmp);
+    auto start = oneapi::dpl::begin(tmp_buf);
+    auto end = oneapi::dpl::end(tmp_buf);
+    auto dst = oneapi::dpl::begin(buf);
+    std::copy(oneapi::dpl::execution::make_device_policy(
+                  ::dpct::cs::get_default_queue()),
+              start, end, dst);
+  }
+
+  template <typename OtherAllocator>
+  device_vector(const device_vector<T, OtherAllocator> &v)
+      : _storage(alloc_store(v.size() * sizeof(T))), _size(v.size()) {
+    auto buf = get_buffer();
+    auto dst = oneapi::dpl::begin(buf);
+    std::copy(oneapi::dpl::execution::make_device_policy(
+                  ::dpct::cs::get_default_queue()),
+              v.real_begin(), v.real_begin() + v.size(), dst);
+  }
+
+  template <typename OtherAllocator>
+  device_vector(std::vector<T, OtherAllocator> &v)
+      : _storage(alloc_store(v.size() * sizeof(T))), _size(v.size()) {
+    std::copy(oneapi::dpl::execution::dpcpp_default, v.begin(), v.end(),
+              oneapi::dpl::begin(get_buffer()));
+  }
+
+  device_vector &operator=(const device_vector &other) {
+    // Copy assignment operator:
+    _size = other.size();
+    void *tmp = alloc_store(_size * sizeof(T));
+    auto tmp_buf =
+        detail::mem_mgr::instance()
+            .translate_ptr(tmp)
+            .buffer.template reinterpret<T, 1>(sycl::range<1>(_size));
+    std::copy(oneapi::dpl::execution::dpcpp_default,
+              oneapi::dpl::begin(other.get_buffer()),
+              oneapi::dpl::end(other.get_buffer()),
+              oneapi::dpl::begin(tmp_buf));
+    detail::mem_mgr::instance().mem_free(_storage);
+    _storage = tmp;
+    return *this;
+  }
+  device_vector &operator=(device_vector &&other) {
+    // Move assignment operator:
+    _size = other.size();
+    this->_storage = std::move(other._storage);
+    return *this;
+  }
+  template <typename OtherAllocator>
+  device_vector &operator=(const std::vector<T, OtherAllocator> &v) {
+    Buffer data(v.begin(), v.end());
+    _size = v.size();
+    void *tmp = alloc_store(_size * sizeof(T));
+    auto tmp_buf =
+        detail::mem_mgr::instance()
+            .translate_ptr(tmp)
+            .buffer.template reinterpret<T, 1>(sycl::range<1>(_size));
+    std::copy(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(data),
+              oneapi::dpl::end(data), oneapi::dpl::begin(tmp_buf));
+    detail::mem_mgr::instance().mem_free(_storage);
+    _storage = tmp;
+
+    return *this;
+  }
+  Buffer get_buffer() const {
+    return detail::mem_mgr::instance()
+        .translate_ptr(_storage)
+        .buffer.template reinterpret<T, 1>(sycl::range<1>(capacity()));
+  }
+  size_type size() const { return _size; }
+  iterator begin() noexcept { return device_iterator<T>(get_buffer(), 0); }
+  iterator end() { return device_iterator<T>(get_buffer(), _size); }
+  const_iterator begin() const noexcept {
+    return device_iterator<T>(get_buffer(), 0);
+  }
+  const_iterator cbegin() const noexcept { return begin(); }
+  const_iterator end() const { return device_iterator<T>(get_buffer(), _size); }
+  const_iterator cend() const { return end(); }
+  T *real_begin() {
+    // This code returns a pointer to a data within sycl buffer accessor which
+    // is leaving scope. This relies on undefined
+    // behavior and may not provide a valid pointer to data inside that buffer.
+    return (detail::mem_mgr::instance()
+                .translate_ptr(_storage)
+                .buffer.get_host_access())
+        .get_pointer();
+  }
+  const T *real_begin() const {
+    // This code returns a pointer to a data within sycl buffer accessor which
+    // is leaving scope. This relies on undefined
+    // behavior and may not provide a valid pointer to data inside that buffer.
+    return const_cast<device_vector *>(this)->real_begin();
+  }
+  void swap(device_vector &v) {
+    void *temp = v._storage;
+    v._storage = this->_storage;
+    this->_storage = temp;
+    std::swap(_size, v._size);
+  }
+  reference operator[](size_type n) { return *(begin() + n); }
+  const_reference operator[](size_type n) const { return *(begin() + n); }
+  void reserve(size_type n) {
+    if (n > capacity()) {
+      // create new buffer (allocate for new size)
+      void *a = alloc_store(n * sizeof(T));
+
+      // copy content (old buffer to new buffer)
+      if (_storage != nullptr) {
+        auto tmp = detail::mem_mgr::instance()
+                       .translate_ptr(a)
+                       .buffer.template reinterpret<T, 1>(sycl::range<1>(n));
+        auto src_buf = get_buffer();
+        std::copy(oneapi::dpl::execution::dpcpp_default,
+                  oneapi::dpl::begin(src_buf), oneapi::dpl::end(src_buf),
+                  oneapi::dpl::begin(tmp));
+
+        // deallocate old memory
+        detail::mem_mgr::instance().mem_free(_storage);
+      }
+      _storage = a;
+    }
+  }
+  void resize(size_type new_size, const T &x = T()) {
+    reserve(new_size);
+    if (_size < new_size) {
+      auto src_buf = get_buffer();
+      std::fill(oneapi::dpl::execution::dpcpp_default,
+                oneapi::dpl::begin(src_buf) + _size,
+                oneapi::dpl::begin(src_buf) + new_size, x);
+    }
+    _size = new_size;
+  }
+  size_type max_size(void) const {
+    return std::numeric_limits<size_type>::max() / sizeof(T);
+  }
+  size_type capacity() const {
+    return _storage != nullptr ? detail::mem_mgr::instance()
+                                         .translate_ptr(_storage)
+                                         .buffer.size() /
+                                     sizeof(T)
+                               : 0;
+  }
+  const_reference front() const { return *begin(); }
+  reference front() { return *begin(); }
+  const_reference back(void) const { return *(end() - 1); }
+  reference back(void) { return *(end() - 1); }
+  pointer data(void) { return pointer(reinterpret_cast<T *>(_storage)); }
+  const_pointer data(void) const {
+    return const_pointer(reinterpret_cast<const T *>(_storage));
+  }
+  void shrink_to_fit(void) {
+    if (_size != capacity()) {
+      void *a = alloc_store(_size * sizeof(T));
+      auto tmp = detail::mem_mgr::instance()
+                     .translate_ptr(a)
+                     .buffer.template reinterpret<T, 1>(sycl::range<1>(_size));
+      std::copy(oneapi::dpl::execution::dpcpp_default,
+                oneapi::dpl::begin(get_buffer()),
+                oneapi::dpl::begin(get_buffer()) + _size,
+                oneapi::dpl::begin(tmp));
+      detail::mem_mgr::instance().mem_free(_storage);
+      _storage = a;
+    }
+  }
+  void assign(size_type n, const T &x) {
+    resize(n);
+    std::fill(oneapi::dpl::execution::dpcpp_default, begin(), begin() + n, x);
+  }
+  template <typename InputIterator>
+  void
+  assign(InputIterator first,
+         typename std::enable_if<internal::is_iterator<InputIterator>::value,
+                                 InputIterator>::type last) {
+    auto n = std::distance(first, last);
+    resize(n);
+    if (internal::is_iterator<InputIterator>::value &&
+        !std::is_pointer<InputIterator>::value)
+      std::copy(oneapi::dpl::execution::dpcpp_default, first, last, begin());
+    else {
+      Buffer tmp(first, last);
+      std::copy(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(tmp),
+                oneapi::dpl::end(tmp), begin());
+    }
+  }
+  void clear(void) {
+    _size = 0;
+    detail::mem_mgr::instance().mem_free(_storage);
+    _storage = nullptr;
+  }
+  bool empty(void) const { return (size() == 0); }
+  void push_back(const T &x) { insert(end(), size_type(1), x); }
+  void pop_back(void) {
+    if (_size > 0)
+      --_size;
+  }
+  iterator erase(iterator first, iterator last) {
+    auto n = std::distance(first, last);
+    if (last == end()) {
+      _size = _size - n;
+      return end();
+    }
+    Buffer tmp{Range(std::distance(last, end()))};
+    // copy remainder to temporary buffer.
+    std::copy(oneapi::dpl::execution::dpcpp_default, last, end(),
+              oneapi::dpl::begin(tmp));
+    // override (erase) subsequence in storage.
+    std::copy(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(tmp),
+              oneapi::dpl::end(tmp), first);
+    resize(_size - n);
+    return begin() + first.get_idx() + n;
+  }
+  iterator erase(iterator pos) { return erase(pos, pos + 1); }
+  iterator insert(iterator position, const T &x) {
+    auto n = std::distance(begin(), position);
+    insert(position, size_type(1), x);
+    return begin() + n;
+  }
+  void insert(iterator position, size_type n, const T &x) {
+    if (position == end()) {
+      resize(size() + n);
+      std::fill(oneapi::dpl::execution::dpcpp_default, end() - n, end(), x);
+    } else {
+      auto i_n = std::distance(begin(), position);
+      // allocate temporary storage
+      Buffer tmp{Range(std::distance(position, end()))};
+      // copy remainder
+      std::copy(oneapi::dpl::execution::dpcpp_default, position, end(),
+                oneapi::dpl::begin(tmp));
+
+      resize(size() + n);
+      // resizing might invalidate position
+      position = begin() + position.get_idx();
+
+      std::fill(oneapi::dpl::execution::dpcpp_default, position, position + n,
+                x);
+
+      std::copy(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(tmp),
+                oneapi::dpl::end(tmp), position + n);
+    }
+  }
+  template <typename InputIterator>
+  void
+  insert(iterator position, InputIterator first,
+         typename std::enable_if<internal::is_iterator<InputIterator>::value,
+                                 InputIterator>::type last) {
+    auto n = std::distance(first, last);
+    if (position == end()) {
+      resize(size() + n);
+      std::copy(oneapi::dpl::execution::dpcpp_default, first, last, end());
+    } else {
+      Buffer tmp{Range(std::distance(position, end()))};
+
+      std::copy(oneapi::dpl::execution::dpcpp_default, position, end(),
+                oneapi::dpl::begin(tmp));
+
+      resize(size() + n);
+      // resizing might invalidate position
+      position = begin() + position.get_idx();
+
+      std::copy(oneapi::dpl::execution::dpcpp_default, first, last, position);
+      std::copy(oneapi::dpl::execution::dpcpp_default, oneapi::dpl::begin(tmp),
+                oneapi::dpl::end(tmp), position + n);
+    }
+  }
+};
+
+#endif
+
+} // end namespace dpct
+
+#endif
diff --git a/sycl/include/dpct/dpl_utils.hpp b/sycl/include/dpct/dpl_utils.hpp
new file mode 100644
index 00000000000..8bddec5b3cf
--- /dev/null
+++ b/sycl/include/dpct/dpl_utils.hpp
@@ -0,0 +1,33 @@
+//==---- dpl_utils.hpp ----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_DPL_UTILS_HPP__
+#define __DPCT_DPL_UTILS_HPP__
+
+#define ONEDPL_USE_DPCPP_BACKEND 1
+#define __USE_DPCT 1
+
+#include <oneapi/dpl/execution>
+#include <oneapi/dpl/algorithm>
+#include <oneapi/dpl/numeric>
+
+#include "compat_service.hpp"
+
+#include "dpl_extras/memory.h"
+#include "dpl_extras/algorithm.h"
+#include "dpl_extras/numeric.h"
+#include "dpl_extras/iterators.h"
+#include "dpl_extras/vector.h"
+#include "dpl_extras/dpcpp_extensions.h"
+
+// Only include iterator adaptor (and therefore boost) if necessary
+#ifdef ITERATOR_ADAPTOR_REQUIRED
+#include "dpl_extras/iterator_adaptor.h"
+#endif // ITERATOR_ADAPTOR_REQUIRED
+
+#endif // __DPCT_DPL_UTILS_HPP__
diff --git a/sycl/include/dpct/fft_utils.hpp b/sycl/include/dpct/fft_utils.hpp
new file mode 100644
index 00000000000..742bb84c2e5
--- /dev/null
+++ b/sycl/include/dpct/fft_utils.hpp
@@ -0,0 +1,1249 @@
+//==---- fft_utils.hpp ----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_FFT_UTILS_HPP__
+#define __DPCT_FFT_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+#include <optional>
+#include <utility>
+
+namespace dpct {
+namespace fft {
+/// An enumeration type to describe the FFT direction is forward or backward.
+enum fft_direction : int { forward = 0, backward };
+/// An enumeration type to describe the types of FFT input and output data.
+enum fft_type : int {
+  real_float_to_complex_float = 0,
+  complex_float_to_real_float,
+  real_double_to_complex_double,
+  complex_double_to_real_double,
+  complex_float_to_complex_float,
+  complex_double_to_complex_double,
+};
+
+/// A class to perform FFT calculation.
+class fft_engine {
+public:
+  /// Default constructor.
+  fft_engine() {}
+  /// Commit the configuration to calculate n-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] input_type Input data type.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] output_type Output data type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int dim, long long *n,
+              long long *inembed, long long istride, long long idist,
+              library_data_t input_type, long long *onembed, long long ostride,
+              long long odist, library_data_t output_type, long long batch,
+              size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    _q = exec_queue;
+    init<long long>(dim, n, inembed, istride, idist, input_type, onembed,
+                    ostride, odist, output_type, batch,
+                    direction_and_placement);
+    if (scratchpad_size) {
+      if (_is_estimate_call)
+        *scratchpad_size = _workspace_estimate_bytes;
+      else
+        *scratchpad_size = _workspace_bytes;
+    }
+  }
+  /// Commit the configuration to calculate n-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] input_type Input data type.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] output_type Output data type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int dim, int *n, int *inembed,
+              int istride, int idist, library_data_t input_type, int *onembed,
+              int ostride, int odist, library_data_t output_type, int batch,
+              size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    _q = exec_queue;
+    init<int>(dim, n, inembed, istride, idist, input_type, onembed, ostride,
+              odist, output_type, batch, direction_and_placement);
+    if (scratchpad_size) {
+      if (_is_estimate_call)
+        *scratchpad_size = _workspace_estimate_bytes;
+      else
+        *scratchpad_size = _workspace_bytes;
+    }
+  }
+  /// Commit the configuration to calculate n-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int dim, long long *n,
+              long long *inembed, long long istride, long long idist,
+              long long *onembed, long long ostride, long long odist,
+              fft_type type, long long batch, size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    commit(exec_queue, dim, n, inembed, istride, idist,
+           fft_type_to_data_type(type).first, onembed, ostride, odist,
+           fft_type_to_data_type(type).second, batch, scratchpad_size,
+           direction_and_placement);
+  }
+  /// Commit the configuration to calculate n-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int dim, int *n, int *inembed,
+              int istride, int idist, int *onembed, int ostride, int odist,
+              fft_type type, int batch, size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    commit(exec_queue, dim, n, inembed, istride, idist,
+           fft_type_to_data_type(type).first, onembed, ostride, odist,
+           fft_type_to_data_type(type).second, batch, scratchpad_size,
+           direction_and_placement);
+  }
+  /// Commit the configuration to calculate 1-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n1 The size of the dimension of the data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int n1, fft_type type, int batch,
+              size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    _q = exec_queue;
+    _n.resize(1);
+    _n[0] = n1;
+    std::tie(_input_type, _output_type) = fft_type_to_data_type(type);
+    _dim = 1;
+    _batch = batch;
+    _is_basic = true;
+    if (direction_and_placement.has_value()) {
+      _is_user_specified_dir_and_placement = true;
+      _direction = direction_and_placement->first;
+      _is_inplace = direction_and_placement->second;
+    }
+    config_and_commit_basic();
+    if (scratchpad_size) {
+      if (_is_estimate_call)
+        *scratchpad_size = _workspace_estimate_bytes;
+      else
+        *scratchpad_size = _workspace_bytes;
+    }
+  }
+  /// Commit the configuration to calculate 2-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n2 The size of the 2nd dimension (outermost) of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int n2, int n1, fft_type type,
+              size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    _q = exec_queue;
+    _n.resize(2);
+    _n[0] = n2;
+    _n[1] = n1;
+    std::tie(_input_type, _output_type) = fft_type_to_data_type(type);
+    _dim = 2;
+    _is_basic = true;
+    if (direction_and_placement.has_value()) {
+      _is_user_specified_dir_and_placement = true;
+      _direction = direction_and_placement->first;
+      _is_inplace = direction_and_placement->second;
+    }
+    config_and_commit_basic();
+    if (scratchpad_size) {
+      if (_is_estimate_call)
+        *scratchpad_size = _workspace_estimate_bytes;
+      else
+        *scratchpad_size = _workspace_bytes;
+    }
+  }
+  /// Commit the configuration to calculate 3-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n3 The size of the 3rd dimension (outermost) of the data.
+  /// \param [in] n2 The size of the 2nd dimension of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [out] scratchpad_size The workspace size required for this FFT.
+  /// If this value is used to allocate memory, \p direction_and_placement need
+  /// to be specified explicitly to get correct result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  void commit(sycl::queue *exec_queue, int n3, int n2, int n1, fft_type type,
+              size_t *scratchpad_size,
+              std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                  direction_and_placement = std::nullopt) {
+    _q = exec_queue;
+    _n.resize(3);
+    _n[0] = n3;
+    _n[1] = n2;
+    _n[2] = n1;
+    std::tie(_input_type, _output_type) = fft_type_to_data_type(type);
+    _dim = 3;
+    _is_basic = true;
+    if (direction_and_placement.has_value()) {
+      _is_user_specified_dir_and_placement = true;
+      _direction = direction_and_placement->first;
+      _is_inplace = direction_and_placement->second;
+    }
+    config_and_commit_basic();
+    if (scratchpad_size) {
+      if (_is_estimate_call)
+        *scratchpad_size = _workspace_estimate_bytes;
+      else
+        *scratchpad_size = _workspace_bytes;
+    }
+  }
+
+  /// Create the class for calculate 1-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n1 The size of the dimension of the data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  static fft_engine *
+  create(sycl::queue *exec_queue, int n1, fft_type type, int batch,
+         std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+             direction_and_placement = std::nullopt) {
+    fft_engine *engine = new fft_engine();
+    engine->commit(exec_queue, n1, type, batch, nullptr,
+                   direction_and_placement);
+    return engine;
+  }
+  /// Create the class for calculate 2-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n2 The size of the 2nd dimension (outermost) of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  static fft_engine *
+  create(sycl::queue *exec_queue, int n2, int n1, fft_type type,
+         std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+             direction_and_placement = std::nullopt) {
+    fft_engine *engine = new fft_engine();
+    engine->commit(exec_queue, n2, n1, type, nullptr, direction_and_placement);
+    return engine;
+  }
+  /// Create the class for calculate 3-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] n3 The size of the 3rd dimension (outermost) of the data.
+  /// \param [in] n2 The size of the 2nd dimension of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  static fft_engine *
+  create(sycl::queue *exec_queue, int n3, int n2, int n1, fft_type type,
+         std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+             direction_and_placement = std::nullopt) {
+    fft_engine *engine = new fft_engine();
+    engine->commit(exec_queue, n3, n2, n1, type, nullptr,
+                   direction_and_placement);
+    return engine;
+  }
+  /// Create the class for calculate n-D FFT.
+  /// \param [in] exec_queue The queue where the calculation should be executed.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If this value is specified, the direction parameter
+  /// will be ignored in the fft_engine::compute function. If it is not set,
+  /// forward direction(if current FFT is complex-to-complex) and out-of-place
+  /// (false) are set by default.
+  static fft_engine *
+  create(sycl::queue *exec_queue, int dim, int *n, int *inembed, int istride,
+         int idist, int *onembed, int ostride, int odist, fft_type type,
+         int batch,
+         std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+             direction_and_placement = std::nullopt) {
+    fft_engine *engine = new fft_engine();
+    engine->commit(exec_queue, dim, n, inembed, istride, idist, onembed,
+                   ostride, odist, type, batch, nullptr,
+                   direction_and_placement);
+    return engine;
+  }
+  /// Create the class for calculate FFT without commit any config.
+  static fft_engine *create() {
+    fft_engine *engine = new fft_engine();
+    return engine;
+  }
+  /// Destroy the class for calculate FFT.
+  /// \param [in] engine Pointer returned from fft_engine::craete.
+  static void destroy(fft_engine *engine) { delete engine; }
+
+#ifdef __INTEL_MKL__
+  /// Estimates the workspace size for calculating n-D FFT.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] estimated_scratchpad_size The estimated workspace size
+  /// required for this FFT. If this value is used to allocate memory,
+  /// \p direction_and_placement need to be specified explicitly to get correct
+  /// result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT
+  /// direction and placement info. If it is not set, forward direction(if
+  /// current FFT is complex-to-complex) and out-of-place (false) are set by default.
+  static void
+  estimate_size(int dim, long long *n, long long *inembed, long long istride,
+                long long idist, long long *onembed, long long ostride,
+                long long odist, fft_type type, long long batch,
+                size_t *estimated_scratchpad_size,
+                std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                    direction_and_placement = std::nullopt) {
+    fft_engine *engine = fft_engine::create();
+    engine->_is_estimate_call = true;
+    engine->commit(&::dpct::cs::get_default_queue(), dim, n, inembed, istride,
+                   idist, fft_type_to_data_type(type).first, onembed, ostride,
+                   odist, fft_type_to_data_type(type).second, batch,
+                   estimated_scratchpad_size, direction_and_placement);
+    fft_engine::destroy(engine);
+  }
+  /// Estimates the workspace size for calculating n-D FFT.
+  /// \param [in] dim Dimension number of the data.
+  /// \param [in] n Pointer to an array containing each dimension's size.
+  /// \param [in] inembed Pointer to an array containing each dimension's size
+  /// of the embedded input data.
+  /// \param [in] istride Stride size of the input data.
+  /// \param [in] idist Distance between the two batches of the input data.
+  /// \param [in] onembed Pointer to an array containing each dimension's size
+  /// of the embedded output data.
+  /// \param [in] ostride Stride size of the output data.
+  /// \param [in] odist Distance between the two batches of the output data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] estimated_scratchpad_size The estimated workspace size
+  /// required for this FFT. If this value is used to allocate memory,
+  /// \p direction_and_placement need to be specified explicitly to get correct
+  /// result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT
+  /// direction and placement info. If it is not set, forward direction(if
+  /// current FFT is complex-to-complex) and out-of-place (false) are set by default.
+  static void
+  estimate_size(int dim, int *n, int *inembed, int istride, int idist,
+                int *onembed, int ostride, int odist, fft_type type, int batch,
+                size_t *estimated_scratchpad_size,
+                std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                    direction_and_placement = std::nullopt) {
+    fft_engine *engine = fft_engine::create();
+    engine->_is_estimate_call = true;
+    engine->commit(&::dpct::cs::get_default_queue(), dim, n, inembed, istride,
+                   idist, fft_type_to_data_type(type).first, onembed, ostride,
+                   odist, fft_type_to_data_type(type).second, batch,
+                   estimated_scratchpad_size, direction_and_placement);
+    fft_engine::destroy(engine);
+  }
+  /// Estimates the workspace size for calculating 1-D FFT.
+  /// \param [in] n1 The size of the dimension of the data.
+  /// \param [in] type The FFT type.
+  /// \param [in] batch The number of FFT operations to perform.
+  /// \param [out] estimated_scratchpad_size The estimated workspace size
+  /// required for this FFT. If this value is used to allocate memory,
+  /// \p direction_and_placement need to be specified explicitly to get correct
+  /// result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT direction
+  /// and placement info. If it is not set, forward direction(if current FFT is
+  /// complex-to-complex) and out-of-place (false) are set by default.
+  static void
+  estimate_size(int n1, fft_type type, int batch,
+                size_t *estimated_scratchpad_size,
+                std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                    direction_and_placement = std::nullopt) {
+    fft_engine *engine = fft_engine::create();
+    engine->_is_estimate_call = true;
+    engine->commit(&::dpct::cs::get_default_queue(), n1, type, batch,
+                   estimated_scratchpad_size, direction_and_placement);
+    fft_engine::destroy(engine);
+  }
+  /// Estimates the workspace size for calculating 2-D FFT.
+  /// \param [in] n2 The size of the 2nd dimension (outermost) of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [out] estimated_scratchpad_size The estimated workspace size
+  /// required for this FFT. If this value is used to allocate memory,
+  /// \p direction_and_placement need to be specified explicitly to get correct
+  /// result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT
+  /// direction and placement info. If it is not set, forward direction(if
+  /// current FFT is complex-to-complex) and out-of-place (false) are set by default.
+  static void
+  estimate_size(int n2, int n1, fft_type type,
+                size_t *estimated_scratchpad_size,
+                std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                    direction_and_placement = std::nullopt) {
+    fft_engine *engine = fft_engine::create();
+    engine->_is_estimate_call = true;
+    engine->commit(&::dpct::cs::get_default_queue(), n2, n1, type,
+                   estimated_scratchpad_size, direction_and_placement);
+    fft_engine::destroy(engine);
+  }
+  /// Estimates the workspace size for calculating 3-D FFT.
+  /// \param [in] n3 The size of the 3rd dimension (outermost) of the data.
+  /// \param [in] n2 The size of the 2nd dimension of the data.
+  /// \param [in] n1 The size of the 1st dimension (innermost) of the data.
+  /// \param [in] type The FFT type.
+  /// \param [out] estimated_scratchpad_size The estimated workspace size
+  /// required for this FFT. If this value is used to allocate memory,
+  /// \p direction_and_placement need to be specified explicitly to get correct
+  /// result.
+  /// \param [in] direction_and_placement Explicitly specify the FFT
+  /// direction and placement info. If it is not set, forward direction(if
+  /// current FFT is complex-to-complex) and out-of-place (false) are set by default.
+  static void
+  estimate_size(int n3, int n2, int n1, fft_type type,
+                size_t *estimated_scratchpad_size,
+                std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                    direction_and_placement = std::nullopt) {
+    fft_engine *engine = fft_engine::create();
+    engine->_is_estimate_call = true;
+    engine->commit(&::dpct::cs::get_default_queue(), n3, n2, n1, type,
+                   estimated_scratchpad_size, direction_and_placement);
+    fft_engine::destroy(engine);
+  }
+#endif
+
+  /// Execute the FFT calculation.
+  /// \param [in] input Pointer to the input data.
+  /// \param [out] output Pointer to the output data.
+  /// \param [in] direction The FFT direction.
+  template <typename input_t, typename output_t>
+  void compute(input_t *input, output_t *output, fft_direction direction) {
+    if (_input_type == library_data_t::complex_float &&
+        _output_type == library_data_t::complex_float) {
+      compute_complex<float, oneapi::mkl::dft::precision::SINGLE>(
+          (float *)input, (float *)output, direction);
+    } else if (_input_type == library_data_t::complex_double &&
+               _output_type == library_data_t::complex_double) {
+      compute_complex<double, oneapi::mkl::dft::precision::DOUBLE>(
+          (double *)input, (double *)output, direction);
+    } else if (_input_type == library_data_t::real_float &&
+               _output_type == library_data_t::complex_float) {
+      _direction = direction;
+      compute_real<float, oneapi::mkl::dft::precision::SINGLE>((float *)input,
+                                                               (float *)output);
+    } else if (_input_type == library_data_t::complex_float &&
+               _output_type == library_data_t::real_float) {
+      _direction = direction;
+      compute_real<float, oneapi::mkl::dft::precision::SINGLE>((float *)input,
+                                                               (float *)output);
+    } else if (_input_type == library_data_t::real_double &&
+               _output_type == library_data_t::complex_double) {
+      _direction = direction;
+      compute_real<double, oneapi::mkl::dft::precision::DOUBLE>(
+          (double *)input, (double *)output);
+    } else if (_input_type == library_data_t::complex_double &&
+               _output_type == library_data_t::real_double) {
+      _direction = direction;
+      compute_real<double, oneapi::mkl::dft::precision::DOUBLE>(
+          (double *)input, (double *)output);
+    }
+  }
+  template <>
+  void compute(float *input, sycl::float2 *output, fft_direction direction) {
+    _direction = direction;
+    compute_real<float, oneapi::mkl::dft::precision::SINGLE>((float *)input,
+                                                             (float *)output);
+  }
+  template <>
+  void compute(sycl::float2 *input, float *output, fft_direction direction) {
+    _direction = direction;
+    compute_real<float, oneapi::mkl::dft::precision::SINGLE>((float *)input,
+                                                             (float *)output);
+  }
+  template <>
+  void compute(double *input, sycl::double2 *output, fft_direction direction) {
+    _direction = direction;
+    compute_real<double, oneapi::mkl::dft::precision::DOUBLE>((double *)input,
+                                                              (double *)output);
+  }
+  template <>
+  void compute(sycl::double2 *input, double *output, fft_direction direction) {
+    _direction = direction;
+    compute_real<double, oneapi::mkl::dft::precision::DOUBLE>((double *)input,
+                                                              (double *)output);
+  }
+  template <>
+  void compute(sycl::float2 *input, sycl::float2 *output,
+               fft_direction direction) {
+    compute_complex<float, oneapi::mkl::dft::precision::SINGLE>(
+        (float *)input, (float *)output, direction);
+  }
+  template <>
+  void compute(sycl::double2 *input, sycl::double2 *output,
+               fft_direction direction) {
+    compute_complex<double, oneapi::mkl::dft::precision::DOUBLE>(
+        (double *)input, (double *)output, direction);
+  }
+  /// Setting the user's SYCL queue for calculation.
+  /// \param [in] q Pointer to the SYCL queue.
+  void set_queue(sycl::queue *q) { _q = q; }
+#ifdef __INTEL_MKL__
+  /// Setting whether to use external or internal workspace.
+  /// \param [in] flag True means using internal workspace. False means using
+  /// external workspace.
+  void use_internal_workspace(bool flag = true) {
+    _use_external_workspace = !flag;
+  }
+  /// Specify the external workspace.
+  /// \param [in] ptr Pointer to the workspace.
+  void set_workspace(void *ptr) {
+    if (!_use_external_workspace) {
+      return;
+    }
+    if (_input_type == library_data_t::complex_float &&
+        _output_type == library_data_t::complex_float) {
+      if (_q->get_device().is_gpu()) {
+        auto data = dpct::detail::get_memory<float>(ptr);
+        _desc_sc->set_workspace(data);
+      }
+    } else if (_input_type == library_data_t::complex_double &&
+               _output_type == library_data_t::complex_double) {
+      if (_q->get_device().is_gpu()) {
+        auto data = dpct::detail::get_memory<double>(ptr);
+        _desc_dc->set_workspace(data);
+      }
+    } else if ((_input_type == library_data_t::real_float &&
+                _output_type == library_data_t::complex_float) ||
+               (_input_type == library_data_t::complex_float &&
+                _output_type == library_data_t::real_float)) {
+      if (_q->get_device().is_gpu()) {
+        auto data = dpct::detail::get_memory<float>(ptr);
+        _desc_sr->set_workspace(data);
+      }
+    } else if ((_input_type == library_data_t::real_double &&
+                _output_type == library_data_t::complex_double) ||
+               (_input_type == library_data_t::complex_double &&
+                _output_type == library_data_t::real_double)) {
+      if (_q->get_device().is_gpu()) {
+        auto data = dpct::detail::get_memory<double>(ptr);
+        _desc_dr->set_workspace(data);
+      }
+    } else {
+      throw sycl::exception(sycl::make_error_code(sycl::errc::invalid),
+                            "invalid fft type");
+    }
+  }
+#endif
+  /// Get the workspace size.
+  /// \param [out] scratchpad_size Workspace size in bytes.
+  void get_workspace_size(size_t *scratchpad_size) {
+    if (scratchpad_size) {
+      *scratchpad_size = _workspace_bytes;
+    }
+  }
+
+private:
+  static std::pair<library_data_t, library_data_t>
+  fft_type_to_data_type(fft_type type) {
+    switch (type) {
+    case fft_type::real_float_to_complex_float: {
+      return std::make_pair(library_data_t::real_float,
+                            library_data_t::complex_float);
+    }
+    case fft_type::complex_float_to_real_float: {
+      return std::make_pair(library_data_t::complex_float,
+                            library_data_t::real_float);
+    }
+    case fft_type::real_double_to_complex_double: {
+      return std::make_pair(library_data_t::real_double,
+                            library_data_t::complex_double);
+    }
+    case fft_type::complex_double_to_real_double: {
+      return std::make_pair(library_data_t::complex_double,
+                            library_data_t::real_double);
+    }
+    case fft_type::complex_float_to_complex_float: {
+      return std::make_pair(library_data_t::complex_float,
+                            library_data_t::complex_float);
+    }
+    case fft_type::complex_double_to_complex_double: {
+      return std::make_pair(library_data_t::complex_double,
+                            library_data_t::complex_double);
+    }
+    }
+  }
+
+  void config_and_commit_basic() {
+    if (_input_type == library_data_t::complex_float &&
+        _output_type == library_data_t::complex_float) {
+      _desc_sc = std::make_shared<
+          oneapi::mkl::dft::descriptor<oneapi::mkl::dft::precision::SINGLE,
+                                       oneapi::mkl::dft::domain::COMPLEX>>(_n);
+      std::int64_t distance = 1;
+      for (auto i : _n)
+        distance = distance * i;
+      _fwd_dist = distance;
+      _bwd_dist = distance;
+      _desc_sc->set_value(oneapi::mkl::dft::config_param::FWD_DISTANCE,
+                          distance);
+      _desc_sc->set_value(oneapi::mkl::dft::config_param::BWD_DISTANCE,
+                          distance);
+      _desc_sc->set_value(oneapi::mkl::dft::config_param::NUMBER_OF_TRANSFORMS,
+                          _batch);
+      if (_is_user_specified_dir_and_placement && _is_inplace)
+        _desc_sc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::INPLACE);
+      else
+        _desc_sc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::NOT_INPLACE);
+#ifdef __INTEL_MKL__
+      if (_use_external_workspace) {
+        if (_q->get_device().is_gpu()) {
+          _desc_sc->set_value(
+              oneapi::mkl::dft::config_param::WORKSPACE,
+              oneapi::mkl::dft::config_value::WORKSPACE_EXTERNAL);
+        }
+      }
+      if (_is_estimate_call) {
+        if (_q->get_device().is_gpu()) {
+          _desc_sc->get_value(
+              oneapi::mkl::dft::config_param::WORKSPACE_ESTIMATE_BYTES,
+              &_workspace_estimate_bytes);
+        }
+      } else {
+        _desc_sc->commit(*_q);
+        if (_q->get_device().is_gpu()) {
+          _desc_sc->get_value(oneapi::mkl::dft::config_param::WORKSPACE_BYTES,
+                              &_workspace_bytes);
+        }
+      }
+#else
+      _desc_sc->commit(*_q);
+#endif
+    } else if (_input_type == library_data_t::complex_double &&
+               _output_type == library_data_t::complex_double) {
+      _desc_dc = std::make_shared<
+          oneapi::mkl::dft::descriptor<oneapi::mkl::dft::precision::DOUBLE,
+                                       oneapi::mkl::dft::domain::COMPLEX>>(_n);
+      std::int64_t distance = 1;
+      for (auto i : _n)
+        distance = distance * i;
+      _fwd_dist = distance;
+      _bwd_dist = distance;
+      _desc_dc->set_value(oneapi::mkl::dft::config_param::FWD_DISTANCE,
+                          distance);
+      _desc_dc->set_value(oneapi::mkl::dft::config_param::BWD_DISTANCE,
+                          distance);
+      _desc_dc->set_value(oneapi::mkl::dft::config_param::NUMBER_OF_TRANSFORMS,
+                          _batch);
+      if (_is_user_specified_dir_and_placement && _is_inplace)
+        _desc_dc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::INPLACE);
+      else
+        _desc_dc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::NOT_INPLACE);
+#ifdef __INTEL_MKL__
+      if (_use_external_workspace) {
+        if (_q->get_device().is_gpu()) {
+          _desc_dc->set_value(
+              oneapi::mkl::dft::config_param::WORKSPACE,
+              oneapi::mkl::dft::config_value::WORKSPACE_EXTERNAL);
+        }
+      }
+      if (_is_estimate_call) {
+        if (_q->get_device().is_gpu()) {
+          _desc_dc->get_value(
+              oneapi::mkl::dft::config_param::WORKSPACE_ESTIMATE_BYTES,
+              &_workspace_estimate_bytes);
+        }
+      } else {
+        _desc_dc->commit(*_q);
+        if (_q->get_device().is_gpu()) {
+          _desc_dc->get_value(oneapi::mkl::dft::config_param::WORKSPACE_BYTES,
+                              &_workspace_bytes);
+        }
+      }
+#else
+      _desc_dc->commit(*_q);
+#endif
+    } else if ((_input_type == library_data_t::real_float &&
+                _output_type == library_data_t::complex_float) ||
+               (_input_type == library_data_t::complex_float &&
+                _output_type == library_data_t::real_float)) {
+      _desc_sr = std::make_shared<oneapi::mkl::dft::descriptor<
+          oneapi::mkl::dft::precision::SINGLE, oneapi::mkl::dft::domain::REAL>>(
+          _n);
+      if (_input_type == library_data_t::real_float &&
+          _output_type == library_data_t::complex_float)
+        _direction = fft_direction::forward;
+      else
+        _direction = fft_direction::backward;
+      _desc_sr->set_value(oneapi::mkl::dft::config_param::NUMBER_OF_TRANSFORMS,
+                          _batch);
+      if (_is_user_specified_dir_and_placement && _is_inplace) {
+        _desc_sr->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::INPLACE);
+        set_stride_and_distance_basic<true>(_desc_sr);
+      } else {
+        _desc_sr->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::NOT_INPLACE);
+        set_stride_and_distance_basic<false>(_desc_sr);
+      }
+#ifdef __INTEL_MKL__
+      if (_use_external_workspace) {
+        if (_q->get_device().is_gpu()) {
+          _desc_sr->set_value(
+              oneapi::mkl::dft::config_param::WORKSPACE,
+              oneapi::mkl::dft::config_value::WORKSPACE_EXTERNAL);
+        }
+      }
+      if (_is_estimate_call) {
+        if (_q->get_device().is_gpu()) {
+          _desc_sr->get_value(
+              oneapi::mkl::dft::config_param::WORKSPACE_ESTIMATE_BYTES,
+              &_workspace_estimate_bytes);
+        }
+      } else {
+        _desc_sr->commit(*_q);
+        if (_q->get_device().is_gpu()) {
+          _desc_sr->get_value(oneapi::mkl::dft::config_param::WORKSPACE_BYTES,
+                              &_workspace_bytes);
+        }
+      }
+#else
+      _desc_sr->commit(*_q);
+#endif
+    } else if ((_input_type == library_data_t::real_double &&
+                _output_type == library_data_t::complex_double) ||
+               (_input_type == library_data_t::complex_double &&
+                _output_type == library_data_t::real_double)) {
+      _desc_dr = std::make_shared<oneapi::mkl::dft::descriptor<
+          oneapi::mkl::dft::precision::DOUBLE, oneapi::mkl::dft::domain::REAL>>(
+          _n);
+      if (_input_type == library_data_t::real_double &&
+          _output_type == library_data_t::complex_double)
+        _direction = fft_direction::forward;
+      else
+        _direction = fft_direction::backward;
+      _desc_dr->set_value(oneapi::mkl::dft::config_param::NUMBER_OF_TRANSFORMS,
+                          _batch);
+      if (_is_user_specified_dir_and_placement && _is_inplace) {
+        _desc_dr->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::INPLACE);
+        set_stride_and_distance_basic<true>(_desc_dr);
+      } else {
+        _desc_dr->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                            oneapi::mkl::dft::config_value::NOT_INPLACE);
+        set_stride_and_distance_basic<false>(_desc_dr);
+      }
+#ifdef __INTEL_MKL__
+      if (_use_external_workspace) {
+        if (_q->get_device().is_gpu()) {
+          _desc_dr->set_value(
+              oneapi::mkl::dft::config_param::WORKSPACE,
+              oneapi::mkl::dft::config_value::WORKSPACE_EXTERNAL);
+        }
+      }
+      if (_is_estimate_call) {
+        if (_q->get_device().is_gpu()) {
+          _desc_dr->get_value(
+              oneapi::mkl::dft::config_param::WORKSPACE_ESTIMATE_BYTES,
+              &_workspace_estimate_bytes);
+        }
+      } else {
+        _desc_dr->commit(*_q);
+        if (_q->get_device().is_gpu()) {
+          _desc_dr->get_value(oneapi::mkl::dft::config_param::WORKSPACE_BYTES,
+                              &_workspace_bytes);
+        }
+      }
+#else
+      _desc_dr->commit(*_q);
+#endif
+    } else {
+      throw sycl::exception(sycl::make_error_code(sycl::errc::invalid),
+                            "invalid fft type");
+    }
+  }
+
+  void config_and_commit_advanced() {
+#define CONFIG_LAYOUT_AND_PLACEMENT(DESC, PREC, DOM)                           \
+  DESC = std::make_shared<oneapi::mkl::dft::descriptor<                        \
+      oneapi::mkl::dft::precision::PREC, oneapi::mkl::dft::domain::DOM>>(_n);  \
+  set_stride_advanced(DESC);                                                   \
+  DESC->set_value(oneapi::mkl::dft::config_param::FWD_DISTANCE, _fwd_dist);    \
+  DESC->set_value(oneapi::mkl::dft::config_param::BWD_DISTANCE, _bwd_dist);    \
+  DESC->set_value(oneapi::mkl::dft::config_param::NUMBER_OF_TRANSFORMS,        \
+                  _batch);                                                     \
+  if (_is_user_specified_dir_and_placement && _is_inplace)                     \
+    DESC->set_value(oneapi::mkl::dft::config_param::PLACEMENT,                 \
+                    oneapi::mkl::dft::config_value::INPLACE);                  \
+  else                                                                         \
+    DESC->set_value(oneapi::mkl::dft::config_param::PLACEMENT,                 \
+                    oneapi::mkl::dft::config_value::NOT_INPLACE);
+
+#ifdef __INTEL_MKL__
+#define CONFIG_AND_COMMIT(DESC, PREC, DOM)                                     \
+  {                                                                            \
+    CONFIG_LAYOUT_AND_PLACEMENT(DESC, PREC, DOM)                               \
+    if (_is_estimate_call) {                                                   \
+      if (_q->get_device().is_gpu()) {                                         \
+        DESC->get_value(                                                       \
+            oneapi::mkl::dft::config_param::WORKSPACE_ESTIMATE_BYTES,          \
+            &_workspace_estimate_bytes);                                       \
+      }                                                                        \
+    } else {                                                                   \
+      DESC->commit(*_q);                                                       \
+      if (_is_estimate_call) {                                                 \
+        DESC->get_value(oneapi::mkl::dft::config_param::WORKSPACE_BYTES,       \
+                        &_workspace_bytes);                                    \
+      }                                                                        \
+    }                                                                          \
+  }
+#else
+#define CONFIG_AND_COMMIT(DESC, PREC, DOM)                                     \
+  {                                                                            \
+    CONFIG_LAYOUT_AND_PLACEMENT(DESC, PREC, DOM)                               \
+    DESC->commit(*_q);                                                         \
+  }
+#endif
+
+    if (_input_type == library_data_t::complex_float &&
+        _output_type == library_data_t::complex_float) {
+      CONFIG_AND_COMMIT(_desc_sc, SINGLE, COMPLEX);
+    } else if (_input_type == library_data_t::complex_double &&
+               _output_type == library_data_t::complex_double) {
+      CONFIG_AND_COMMIT(_desc_dc, DOUBLE, COMPLEX);
+    } else if ((_input_type == library_data_t::real_float &&
+                _output_type == library_data_t::complex_float) ||
+               (_input_type == library_data_t::complex_float &&
+                _output_type == library_data_t::real_float)) {
+      CONFIG_AND_COMMIT(_desc_sr, SINGLE, REAL);
+    } else if ((_input_type == library_data_t::real_double &&
+                _output_type == library_data_t::complex_double) ||
+               (_input_type == library_data_t::complex_double &&
+                _output_type == library_data_t::real_double)) {
+      CONFIG_AND_COMMIT(_desc_dr, DOUBLE, REAL);
+    } else {
+      throw sycl::exception(sycl::make_error_code(sycl::errc::invalid),
+                            "invalid fft type");
+    }
+#undef CONFIG_LAYOUT_AND_PLACEMENT
+#undef CONFIG_AND_COMMIT
+  }
+
+  template <typename T>
+  void init(int dim, T *n, T *inembed, T istride, T idist,
+            library_data_t input_type, T *onembed, T ostride, T odist,
+            library_data_t output_type, T batch,
+            std::optional<std::pair<fft_direction, bool /*is_inplace*/>>
+                direction_and_placement) {
+    if (direction_and_placement.has_value()) {
+      _is_user_specified_dir_and_placement = true;
+      _direction = direction_and_placement->first;
+      _is_inplace = direction_and_placement->second;
+    }
+    _n.resize(dim);
+    _inembed.resize(dim);
+    _onembed.resize(dim);
+    _input_type = input_type;
+    _output_type = output_type;
+    for (int i = 0; i < dim; i++) {
+      _n[i] = n[i];
+    }
+    if (inembed && onembed) {
+      for (int i = 0; i < dim; i++) {
+        _inembed[i] = inembed[i];
+        _onembed[i] = onembed[i];
+      }
+      _istride = istride;
+      _ostride = ostride;
+
+      if ((_input_type == library_data_t::real_float &&
+           _output_type == library_data_t::complex_float) ||
+          (_input_type == library_data_t::real_double &&
+           _output_type == library_data_t::complex_double)) {
+        _fwd_dist = idist;
+        _bwd_dist = odist;
+        _direction = fft_direction::forward;
+      } else if ((_output_type == library_data_t::real_float &&
+                  _input_type == library_data_t::complex_float) ||
+                 (_output_type == library_data_t::real_double &&
+                  _input_type == library_data_t::complex_double)) {
+        _fwd_dist = odist;
+        _bwd_dist = idist;
+        _direction = fft_direction::backward;
+      } else {
+        if (_is_user_specified_dir_and_placement &&
+            (_direction == fft_direction::backward)) {
+          _fwd_dist = odist;
+          _bwd_dist = idist;
+        } else {
+          _fwd_dist = idist;
+          _bwd_dist = odist;
+        }
+      }
+    } else {
+      _is_basic = true;
+    }
+    _batch = batch;
+    _dim = dim;
+
+    if (_is_basic)
+      config_and_commit_basic();
+    else
+      config_and_commit_advanced();
+  }
+  template <class Desc_t>
+  void set_stride_advanced(std::shared_ptr<Desc_t> desc) {
+    if (_dim == 1) {
+      _fwd_strides = {0, _istride};
+      _bwd_strides = {0, _ostride};
+    } else if (_dim == 2) {
+      _fwd_strides = {0, _inembed[1] * _istride, _istride};
+      _bwd_strides = {0, _onembed[1] * _ostride, _ostride};
+    } else if (_dim == 3) {
+      _fwd_strides = {0, _inembed[2] * _inembed[1] * _istride,
+                      _inembed[2] * _istride, _istride};
+      _bwd_strides = {0, _onembed[2] * _onembed[1] * _ostride,
+                      _onembed[2] * _ostride, _ostride};
+    }
+    if (_direction == fft_direction::backward) {
+      std::swap_ranges(_fwd_strides.begin(), _fwd_strides.end(),
+                       _bwd_strides.begin());
+    }
+#ifdef __INTEL_MKL__
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES, _fwd_strides);
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES, _bwd_strides);
+#else
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES,
+                    _fwd_strides.data());
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES,
+                    _bwd_strides.data());
+#endif
+  }
+
+  template <class Desc_t> void swap_distance(std::shared_ptr<Desc_t> desc) {
+    std::swap(_fwd_dist, _bwd_dist);
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_DISTANCE, _fwd_dist);
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_DISTANCE, _bwd_dist);
+  }
+
+  template <class Desc_t> void swap_strides(std::shared_ptr<Desc_t> desc) {
+    std::swap_ranges(_fwd_strides.begin(), _fwd_strides.end(),
+                     _bwd_strides.begin());
+#ifdef __INTEL_MKL__
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES, _fwd_strides);
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES, _bwd_strides);
+#else
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES,
+                    _fwd_strides.data());
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES,
+                    _bwd_strides.data());
+#endif
+  }
+
+  template <bool Is_inplace, class Desc_t>
+  void set_stride_and_distance_basic(std::shared_ptr<Desc_t> desc) {
+    std::int64_t forward_distance = 0;
+    std::int64_t backward_distance = 0;
+    if (_dim == 1) {
+      if constexpr (Is_inplace) {
+        _fwd_strides = {0, 1};
+        _bwd_strides = {0, 1};
+        forward_distance = 2 * (_n[0] / 2 + 1);
+        backward_distance = _n[0] / 2 + 1;
+      } else {
+        _fwd_strides = {0, 1};
+        _bwd_strides = {0, 1};
+        forward_distance = _n[0];
+        backward_distance = _n[0] / 2 + 1;
+      }
+    } else if (_dim == 2) {
+      if constexpr (Is_inplace) {
+        _bwd_strides = {0, _n[1] / 2 + 1, 1};
+        _fwd_strides = {0, 2 * (_n[1] / 2 + 1), 1};
+        forward_distance = _n[0] * 2 * (_n[1] / 2 + 1);
+        backward_distance = _n[0] * (_n[1] / 2 + 1);
+      } else {
+        _bwd_strides = {0, _n[1] / 2 + 1, 1};
+        _fwd_strides = {0, _n[1], 1};
+        forward_distance = _n[0] * _n[1];
+        backward_distance = _n[0] * (_n[1] / 2 + 1);
+      }
+    } else if (_dim == 3) {
+      if constexpr (Is_inplace) {
+        _bwd_strides = {0, _n[1] * (_n[2] / 2 + 1), _n[2] / 2 + 1, 1};
+        _fwd_strides = {0, _n[1] * 2 * (_n[2] / 2 + 1), 2 * (_n[2] / 2 + 1), 1};
+        forward_distance = _n[0] * _n[1] * 2 * (_n[2] / 2 + 1);
+        backward_distance = _n[0] * _n[1] * (_n[2] / 2 + 1);
+      } else {
+        _bwd_strides = {0, _n[1] * (_n[2] / 2 + 1), _n[2] / 2 + 1, 1};
+        _fwd_strides = {0, _n[1] * _n[2], _n[2], 1};
+        forward_distance = _n[0] * _n[1] * _n[2];
+        backward_distance = _n[0] * _n[1] * (_n[2] / 2 + 1);
+      }
+    }
+#ifdef __INTEL_MKL__
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES, _fwd_strides);
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES, _bwd_strides);
+#else
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_STRIDES,
+                    _fwd_strides.data());
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_STRIDES,
+                    _bwd_strides.data());
+#endif
+    desc->set_value(oneapi::mkl::dft::config_param::FWD_DISTANCE,
+                    forward_distance);
+    desc->set_value(oneapi::mkl::dft::config_param::BWD_DISTANCE,
+                    backward_distance);
+  }
+
+  template <class Dest_t, class T>
+  void compute_impl(Dest_t desc, T *input, T *output,
+                    std::optional<fft_direction> direction) {
+    bool is_this_compute_inplace = input == output;
+    constexpr bool is_complex =
+        std::is_same_v<Dest_t, std::shared_ptr<oneapi::mkl::dft::descriptor<
+                                   oneapi::mkl::dft::precision::SINGLE,
+                                   oneapi::mkl::dft::domain::COMPLEX>>> ||
+        std::is_same_v<Dest_t, std::shared_ptr<oneapi::mkl::dft::descriptor<
+                                   oneapi::mkl::dft::precision::DOUBLE,
+                                   oneapi::mkl::dft::domain::COMPLEX>>>;
+
+    if (!_is_user_specified_dir_and_placement) {
+      // The descriptor need different config values if the FFT direction
+      // or placement is different.
+      // Here we check the conditions, and new config values are set and
+      // re-committed if needed.
+      bool need_commit = false;
+      if constexpr (is_complex) {
+        if (direction.value() != _direction) {
+          need_commit = true;
+          swap_distance(desc);
+          if (!_is_basic)
+            swap_strides(desc);
+          _direction = direction.value();
+        }
+      }
+      if (is_this_compute_inplace != _is_inplace) {
+        need_commit = true;
+        _is_inplace = is_this_compute_inplace;
+        if (_is_inplace) {
+          desc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                          oneapi::mkl::dft::config_value::INPLACE);
+          if constexpr (!is_complex)
+            if (_is_basic)
+              set_stride_and_distance_basic<true>(desc);
+        } else {
+          desc->set_value(oneapi::mkl::dft::config_param::PLACEMENT,
+                          oneapi::mkl::dft::config_value::NOT_INPLACE);
+          if constexpr (!is_complex)
+            if (_is_basic)
+              set_stride_and_distance_basic<false>(desc);
+        }
+      }
+      if (need_commit)
+        desc->commit(*_q);
+    }
+
+    if (_is_inplace) {
+      auto data_input = dpct::detail::get_memory<T>(input);
+      if (_direction == fft_direction::forward) {
+        oneapi::mkl::dft::compute_forward<typename Dest_t::element_type, T>(
+            *desc, data_input);
+      } else {
+        oneapi::mkl::dft::compute_backward<typename Dest_t::element_type, T>(
+            *desc, data_input);
+      }
+    } else {
+      auto data_input = dpct::detail::get_memory<T>(input);
+      auto data_output = dpct::detail::get_memory<T>(output);
+      if (_direction == fft_direction::forward) {
+        oneapi::mkl::dft::compute_forward<typename Dest_t::element_type, T, T>(
+            *desc, data_input, data_output);
+      } else {
+        oneapi::mkl::dft::compute_backward<typename Dest_t::element_type, T, T>(
+            *desc, data_input, data_output);
+      }
+    }
+  }
+
+  template <class T, oneapi::mkl::dft::precision Precision>
+  void compute_complex(T *input, T *output, fft_direction direction) {
+    if constexpr (Precision == oneapi::mkl::dft::precision::SINGLE) {
+      compute_impl(_desc_sc, input, output, direction);
+    } else {
+      compute_impl(_desc_dc, input, output, direction);
+    }
+  }
+
+  template <class T, oneapi::mkl::dft::precision Precision>
+  void compute_real(T *input, T *output) {
+    if constexpr (Precision == oneapi::mkl::dft::precision::SINGLE) {
+      compute_impl(_desc_sr, input, output, std::nullopt);
+    } else {
+      compute_impl(_desc_dr, input, output, std::nullopt);
+    }
+  }
+
+private:
+  sycl::queue *_q = nullptr;
+  int _dim;
+  std::vector<std::int64_t> _n;
+  std::vector<std::int64_t> _inembed;
+  std::int64_t _istride;
+  std::int64_t _fwd_dist;
+  library_data_t _input_type;
+  std::vector<std::int64_t> _onembed;
+  std::int64_t _ostride;
+  std::int64_t _bwd_dist;
+  library_data_t _output_type;
+  std::int64_t _batch = 1;
+  bool _is_basic = false;
+  bool _is_inplace = false;
+  fft_direction _direction = fft_direction::forward;
+  bool _is_user_specified_dir_and_placement = false;
+  bool _use_external_workspace = false;
+  void *_external_workspace_ptr = nullptr;
+  std::int64_t _workspace_bytes = 0;
+  bool _is_estimate_call = false;
+  std::int64_t _workspace_estimate_bytes = 0;
+  std::shared_ptr<oneapi::mkl::dft::descriptor<
+      oneapi::mkl::dft::precision::SINGLE, oneapi::mkl::dft::domain::REAL>>
+      _desc_sr;
+  std::shared_ptr<oneapi::mkl::dft::descriptor<
+      oneapi::mkl::dft::precision::DOUBLE, oneapi::mkl::dft::domain::REAL>>
+      _desc_dr;
+  std::shared_ptr<oneapi::mkl::dft::descriptor<
+      oneapi::mkl::dft::precision::SINGLE, oneapi::mkl::dft::domain::COMPLEX>>
+      _desc_sc;
+  std::shared_ptr<oneapi::mkl::dft::descriptor<
+      oneapi::mkl::dft::precision::DOUBLE, oneapi::mkl::dft::domain::COMPLEX>>
+      _desc_dc;
+  std::vector<std::int64_t> _fwd_strides;
+  std::vector<std::int64_t> _bwd_strides;
+};
+
+using fft_engine_ptr = fft_engine *;
+} // namespace fft
+} // namespace dpct
+
+#endif // __DPCT_FFT_UTILS_HPP__
diff --git a/sycl/include/dpct/graph.hpp b/sycl/include/dpct/graph.hpp
new file mode 100644
index 00000000000..f17fc869eef
--- /dev/null
+++ b/sycl/include/dpct/graph.hpp
@@ -0,0 +1,195 @@
+//===----- graph.hpp ----------------------------*- C++ -*-----------------===//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#pragma once
+
+#include <sycl/ext/oneapi/experimental/graph.hpp>
+#include <sycl/sycl.hpp>
+#include <unordered_map>
+
+namespace dpct {
+namespace experimental {
+
+typedef sycl::ext::oneapi::experimental::command_graph<
+    sycl::ext::oneapi::experimental::graph_state::modifiable>
+    *command_graph_ptr;
+
+typedef sycl::ext::oneapi::experimental::command_graph<
+    sycl::ext::oneapi::experimental::graph_state::executable>
+    *command_graph_exec_ptr;
+
+typedef sycl::ext::oneapi::experimental::node *node_ptr;
+
+namespace detail {
+class graph_mgr {
+public:
+  graph_mgr() = default;
+  graph_mgr(const graph_mgr &) = delete;
+  graph_mgr &operator=(const graph_mgr &) = delete;
+  graph_mgr(graph_mgr &&) = delete;
+  graph_mgr &operator=(graph_mgr &&) = delete;
+
+  static graph_mgr &instance() {
+    static graph_mgr instance;
+    return instance;
+  }
+
+  void begin_recording(sycl::queue *queue_ptr) {
+    // Calling begin_recording on an already recording queue is a no-op in SYCL
+    if (queue_graph_map.find(queue_ptr) != queue_graph_map.end()) {
+      return;
+    }
+    auto graph = new sycl::ext::oneapi::experimental::command_graph<
+        sycl::ext::oneapi::experimental::graph_state::modifiable>(
+        queue_ptr->get_context(), queue_ptr->get_device());
+    auto result = queue_graph_map.insert({queue_ptr, graph});
+    if (!result.second) {
+      delete graph;
+      return;
+    }
+    graph->begin_recording(*queue_ptr);
+  }
+
+  void end_recording(sycl::queue *queue_ptr,
+                     dpct::experimental::command_graph_ptr *graph) {
+    auto it = queue_graph_map.find(queue_ptr);
+    if (it == queue_graph_map.end()) {
+      return;
+    }
+    *graph = it->second;
+    queue_graph_map.erase(it);
+    (*graph)->end_recording();
+  }
+
+  void get_nodes(dpct::experimental::command_graph_ptr graph,
+                 dpct::experimental::node_ptr *nodesArray,
+                 std::size_t *numberOfNodes) {
+    auto nodes = graph->get_nodes();
+    nodes_map[graph] = nodes;
+    *numberOfNodes = nodes.size();
+    if (!nodesArray) {
+      return;
+    }
+    for (std::size_t i = 0; i < *numberOfNodes; i++) {
+      nodesArray[i] = &nodes_map[graph][i];
+    }
+  }
+
+  void get_root_nodes(dpct::experimental::command_graph_ptr graph,
+                      dpct::experimental::node_ptr *nodesArray,
+                      std::size_t *numberOfNodes) {
+    auto root_nodes = graph->get_root_nodes();
+    root_nodes_map[graph] = root_nodes;
+    *numberOfNodes = root_nodes.size();
+    if (!nodesArray) {
+      return;
+    }
+    for (std::size_t i = 0; i < *numberOfNodes; i++) {
+      nodesArray[i] = &root_nodes_map[graph][i];
+    }
+  }
+
+private:
+  std::unordered_map<sycl::queue *, command_graph_ptr> queue_graph_map;
+  std::unordered_map<dpct::experimental::command_graph_ptr,
+                     std::vector<sycl::ext::oneapi::experimental::node>>
+      nodes_map;
+  std::unordered_map<dpct::experimental::command_graph_ptr,
+                     std::vector<sycl::ext::oneapi::experimental::node>>
+      root_nodes_map;
+};
+} // namespace detail
+
+/// Begins recording commands into a command graph for a specific SYCL queue.
+/// \param [in] queue_ptr A pointer to the SYCL queue on which the commands
+/// will be recorded.
+static inline void begin_recording(sycl::queue *queue_ptr) {
+  detail::graph_mgr::instance().begin_recording(queue_ptr);
+}
+
+/// Ends the recording of commands into a command graph for a specific SYCL
+/// queue.
+/// \param [in] queue_ptr A pointer to the SYCL queue on which the commands
+/// were recorded.
+/// \param [out] graph A pointer to a command_graph_ptr pointer where the
+/// command graph will be assigned.
+static inline void end_recording(sycl::queue *queue_ptr,
+                                 dpct::experimental::command_graph_ptr *graph) {
+  detail::graph_mgr::instance().end_recording(queue_ptr, graph);
+}
+
+/// Adds an empty node to the command graph with optional
+/// dependencies.
+/// \param [out] newNode A pointer to the node_ptr that will be
+/// added to the graph.
+/// \param [in] graph A pointer to the command graph.
+/// \param [in] dependenciesArray An array of node pointers
+/// representing the dependencies of the new node.
+/// \param [in] numberOfDependencies The number of dependencies in
+/// the dependenciesArray.
+static void
+add_empty_node(dpct::experimental::node_ptr *newNode,
+               dpct::experimental::command_graph_ptr graph,
+               const dpct::experimental::node_ptr *dependenciesArray,
+               std::size_t numberOfDependencies) {
+  if (numberOfDependencies == 0) {
+    *newNode = new sycl::ext::oneapi::experimental::node(graph->add());
+    return;
+  }
+  std::vector<sycl::ext::oneapi::experimental::node> dependencies;
+  for (std::size_t i = 0; i < numberOfDependencies; i++) {
+    dependencies.push_back(*dependenciesArray[i]);
+  }
+  *newNode =
+      new sycl::ext::oneapi::experimental::node(graph->add(sycl::property_list{
+          sycl::ext::oneapi::experimental::property::node::depends_on(
+              dependencies)}));
+}
+
+/// Adds dependencies between nodes in the command graph.
+/// \param [in] graph A pointer to the command graph.
+/// \param [in] fromNodes An array of node pointers representing
+/// the source nodes.
+/// \param [in] toNodes An array of node pointers representing
+/// the destination nodes.
+/// \param [in] numberOfDependencies The number of dependencies
+/// to be added.
+static void add_dependencies(dpct::experimental::command_graph_ptr graph,
+                             const dpct::experimental::node_ptr *fromNodes,
+                             const dpct::experimental::node_ptr *toNodes,
+                             std::size_t numberOfDependencies) {
+  for (std::size_t i = 0; i < numberOfDependencies; i++) {
+    graph->make_edge(*fromNodes[i], *toNodes[i]);
+  }
+}
+
+/// Gets the nodes in the command graph.
+/// \param [in] graph A pointer to the command graph.
+/// \param [out] nodesArray An array of node pointers where the
+/// nodes will be assigned.
+/// \param [out] numberOfNodes The number of nodes in the graph.
+static void get_nodes(dpct::experimental::command_graph_ptr graph,
+                      dpct::experimental::node_ptr *nodesArray,
+                      std::size_t *numberOfNodes) {
+  detail::graph_mgr::instance().get_nodes(graph, nodesArray, numberOfNodes);
+}
+
+/// Gets the root nodes in the command graph.
+/// \param [in] graph A pointer to the command graph.
+/// \param [out] nodesArray An array of node pointers where the
+/// root nodes will be assigned.
+/// \param [out] numberOfNodes The number of root nodes in the graph.
+static void get_root_nodes(dpct::experimental::command_graph_ptr graph,
+                           dpct::experimental::node_ptr *nodesArray,
+                           std::size_t *numberOfNodes) {
+  detail::graph_mgr::instance().get_root_nodes(graph, nodesArray,
+                                               numberOfNodes);
+}
+
+} // namespace experimental
+} // namespace dpct
diff --git a/sycl/include/dpct/group_utils.hpp b/sycl/include/dpct/group_utils.hpp
new file mode 100644
index 00000000000..804ebfc3cac
--- /dev/null
+++ b/sycl/include/dpct/group_utils.hpp
@@ -0,0 +1,1566 @@
+//==---- group_utils.hpp ------------------*- C++ -*--------------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===------------------------------------------------------------------===//
+
+#ifndef __DPCT_GROUP_UTILS_HPP__
+#define __DPCT_GROUP_UTILS_HPP__
+
+#include <iterator>
+#include <stdexcept>
+#include <sycl/sycl.hpp>
+
+#include "dpct.hpp"
+#include "dpl_extras/functional.h"
+
+#include "detail/group_utils_detail.hpp"
+namespace dpct {
+namespace group {
+
+/// Rearranging data partitioned across a work-group.
+///
+/// \tparam T The type of the data elements.
+/// \tparam ElementsPerWorkItem The number of data elements assigned to a
+/// work-item.
+template <typename T, size_t ElementsPerWorkItem> class exchange {
+public:
+  static size_t get_local_memory_size(size_t group_threads) {
+    size_t padding_values =
+        (INSERT_PADDING)
+            ? ((group_threads * ElementsPerWorkItem) >> LOG_LOCAL_MEMORY_BANKS)
+            : 0;
+    return (group_threads * ElementsPerWorkItem + padding_values) * sizeof(T);
+  }
+
+  exchange(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  // TODO: Investigate if padding is required for performance,
+  // and if specializations are required for specific target hardware.
+  static size_t adjust_by_padding(size_t offset) {
+
+    if constexpr (INSERT_PADDING) {
+      offset = detail::shr_add(offset, LOG_LOCAL_MEMORY_BANKS, offset);
+    }
+    return offset;
+  }
+
+  struct blocked_offset {
+    template <typename Item> size_t operator()(Item item, size_t i) {
+      size_t offset = item.get_local_linear_id() * ElementsPerWorkItem + i;
+      return adjust_by_padding(offset);
+    }
+  };
+
+  struct striped_offset {
+    template <typename Item> size_t operator()(Item item, size_t i) {
+      size_t offset = i * item.get_group().get_local_linear_range() +
+                      item.get_local_linear_id();
+      return adjust_by_padding(offset);
+    }
+  };
+
+  struct sub_group_striped_offset {
+    template <typename Item> size_t operator()(Item item, size_t i) {
+      auto sg = item.get_sub_group();
+      size_t wg_size = item.get_group().get_local_linear_range();
+      size_t sub_group_sliced_items =
+          std::min<size_t>(sg.get_local_linear_range(), wg_size);
+      size_t offset = (sg.get_group_linear_id() * sub_group_sliced_items *
+                       ElementsPerWorkItem) +
+                      (i * sub_group_sliced_items) + sg.get_local_linear_id();
+      return adjust_by_padding(offset);
+    }
+  };
+
+  template <typename Iterator> struct scatter_offset {
+    Iterator begin;
+    scatter_offset(const int (&ranks)[ElementsPerWorkItem]) {
+      begin = std::begin(ranks);
+    }
+    template <typename Item> size_t operator()(Item item, size_t i) const {
+      // iterator i is expected to be within bounds [0,VALUES_PER_THREAD)
+      return adjust_by_padding(begin[i]);
+    }
+  };
+
+  template <typename Item, typename offsetFunctorTypeFW,
+            typename offsetFunctorTypeRV>
+  [[deprecated("Please use blocked_to_striped, "
+               "striped_to_blocked, scatter_to_blocked, scatter_to_striped "
+               "instead")]] __dpct_inline__ void
+  helper_exchange(Item item, T (&keys)[ElementsPerWorkItem],
+                  offsetFunctorTypeFW &offset_functor_fw,
+                  offsetFunctorTypeRV &offset_functor_rv) {
+    helper_exchange(item, keys, keys, offset_functor_fw, offset_functor_rv);
+  }
+
+  /// Inplace rearrange elements from blocked order to striped order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// blocked \p input across the work-group is:
+  ///
+  ///   {[0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511]}.
+  ///
+  /// The striped order output is:
+  ///
+  ///   {[0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511]}.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void blocked_to_striped(Item item,
+                                          T (&input)[ElementsPerWorkItem]) {
+    striped_offset get_striped_offset;
+    blocked_offset get_blocked_offset;
+    helper_exchange(item, input, input, get_blocked_offset, get_striped_offset);
+  }
+
+  /// Inplace rearrange elements from striped order to blocked order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// striped \p input across the work-group is:
+  ///
+  ///   { [0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511] }.
+  ///
+  /// The blocked order output is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void striped_to_blocked(Item item,
+                                          T (&input)[ElementsPerWorkItem]) {
+    blocked_offset get_blocked_offset;
+    striped_offset get_striped_offset;
+    helper_exchange(item, input, input, get_striped_offset, get_blocked_offset);
+  }
+
+  /// Rearrange elements from blocked order to striped order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// blocked \p input across the work-group is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// The striped order output is:
+  ///
+  ///   { [0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param output The corresponding output data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void blocked_to_striped(Item item,
+                                          T (&input)[ElementsPerWorkItem],
+                                          T (&output)[ElementsPerWorkItem]) {
+    striped_offset get_striped_offset;
+    blocked_offset get_blocked_offset;
+    helper_exchange(item, input, output, get_blocked_offset,
+                    get_striped_offset);
+  }
+
+  /// Rearrange elements from striped order to blocked order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// striped \p input across the work-group is:
+  ///
+  ///   { [0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511] }.
+  ///
+  /// The blocked order output is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param output The corresponding output data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void striped_to_blocked(Item item,
+                                          T (&input)[ElementsPerWorkItem],
+                                          T (&output)[ElementsPerWorkItem]) {
+    blocked_offset get_blocked_offset;
+    striped_offset get_striped_offset;
+    helper_exchange(item, input, output, get_striped_offset,
+                    get_blocked_offset);
+  }
+
+  /// Inplace exchanges data items annotated by rank into blocked arrangement.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// striped \p input across the work-group is:
+  ///
+  ///   { [0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511] }.
+  ///
+  /// The rank across the work-group is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// The blocked order output is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param ranks The corresponding rank annotation of each work-item.
+  template <typename Item>
+  __dpct_inline__ void scatter_to_blocked(Item item,
+                                          T (&input)[ElementsPerWorkItem],
+                                          int (&ranks)[ElementsPerWorkItem]) {
+    scatter_offset<const int *> get_scatter_offset(ranks);
+    blocked_offset get_blocked_offset;
+    helper_exchange(item, input, input, get_scatter_offset, get_blocked_offset);
+  }
+
+  /// Inplace exchanges data items annotated by rank into striped arrangement.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// blocked \p input across the work-group is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// The rank across the work-group is:
+  ///
+  ///   { [16, 20, 24, 28], [32, 36, 40, 44], ..., [499, 503, 507, 511] }.
+  ///
+  /// The striped order output of each work-item will be:
+  ///
+  ///   { [0, 128, 256, 384], [1, 129, 257, 385], ..., [127, 255, 383, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param ranks The corresponding rank annotation of each work-item.
+  template <typename Item>
+  __dpct_inline__ void scatter_to_striped(Item item,
+                                          T (&input)[ElementsPerWorkItem],
+                                          int (&ranks)[ElementsPerWorkItem]) {
+    scatter_offset<const int *> get_scatter_offset(ranks);
+    striped_offset get_striped_offset;
+    helper_exchange(item, input, input, get_scatter_offset, get_striped_offset);
+  }
+
+  /// Rearrange elements from blocked order to sub_group striped order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// blocked \p input across the work-group is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// The sub_group striped order output (with sub_group size 2) is:
+  ///
+  ///   { [0, 4, 1, 5], [2, 6, 3, 7], [8, 12, 9, 13], [10, 14, 11, 15], ...
+  ///     , [506, 510, 507, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param output The corresponding output data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void
+  blocked_to_sub_group_striped(Item item, T (&input)[ElementsPerWorkItem],
+                               T (&output)[ElementsPerWorkItem]) {
+    blocked_offset get_blocked_offset;
+    sub_group_striped_offset get_sub_group_striped_offset;
+    helper_exchange(item, input, output, get_blocked_offset,
+                    get_sub_group_striped_offset);
+  }
+
+  /// Rearrange elements from sub_group striped order to blocked order.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// sub_group striped \p input across the work-group is:
+  ///
+  ///   { [0, 4, 1, 5], [2, 6, 3, 7], [8, 12, 9, 13], [10, 14, 11, 15], ...
+  ///     , [506, 510, 507, 511] }.
+  ///
+  /// The blocked order output is:
+  ///
+  ///   { [0, 1, 2, 3], [4, 5, 6, 7], ..., [508, 509, 510, 511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param output The corresponding output data of each work-item.
+  template <typename Item>
+  __dpct_inline__ void
+  sub_group_striped_to_blocked(Item item, T (&input)[ElementsPerWorkItem],
+                               T (&output)[ElementsPerWorkItem]) {
+    blocked_offset get_blocked_offset;
+    sub_group_striped_offset get_sub_group_striped_offset;
+    helper_exchange(item, input, output, get_sub_group_striped_offset,
+                    get_blocked_offset);
+  }
+
+private:
+  template <typename Item, typename offsetFunctorTypeFW,
+            typename offsetFunctorTypeRV>
+  __dpct_inline__ void helper_exchange(Item item,
+                                       T (&input)[ElementsPerWorkItem],
+                                       T (&output)[ElementsPerWorkItem],
+                                       offsetFunctorTypeFW &offset_functor_fw,
+                                       offsetFunctorTypeRV &offset_functor_rv) {
+    T *buffer = reinterpret_cast<T *>(_local_memory);
+#pragma unroll
+    for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+      size_t offset = offset_functor_fw(item, i);
+      buffer[offset] = input[i];
+    }
+    sycl::group_barrier(item.get_group());
+#pragma unroll
+    for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+      size_t offset = offset_functor_rv(item, i);
+      output[i] = buffer[offset];
+    }
+  }
+
+  static constexpr int LOG_LOCAL_MEMORY_BANKS = 4;
+  static constexpr bool INSERT_PADDING =
+      (ElementsPerWorkItem > 4) &&
+      (detail::power_of_two<ElementsPerWorkItem>::VALUE);
+
+  uint8_t *_local_memory;
+};
+
+/// The work-group wide radix sort to sort integer data elements
+/// assigned to all work-items in the work-group.
+///
+/// \tparam T The type of the data elements.
+/// \tparam ElementsPerWorkItem The number of data elements assigned to
+/// a work-item.
+/// \tparam RADIX_BITS The number of radix bits per digit place.
+template <typename T, int ElementsPerWorkItem, int RADIX_BITS = 4>
+class group_radix_sort {
+  uint8_t *_local_memory;
+
+public:
+  group_radix_sort(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  static size_t get_local_memory_size(size_t group_threads) {
+    size_t ranks_size =
+        detail::radix_rank<RADIX_BITS>::get_local_memory_size(group_threads);
+    size_t exchange_size =
+        exchange<T, ElementsPerWorkItem>::get_local_memory_size(group_threads);
+    return sycl::max(ranks_size, exchange_size);
+  }
+
+private:
+  template <typename Item, bool DESCENDING>
+  __dpct_inline__ void
+  helper_sort(const Item &item, T (&keys)[ElementsPerWorkItem],
+              int begin_bit = 0, int end_bit = 8 * sizeof(T),
+              bool is_striped = false) {
+    using UnsignedT =
+        typename std::conditional<std::is_same<T, sycl::half>::value, uint16_t,
+                                  uint32_t>::type;
+    UnsignedT(&unsigned_keys)[ElementsPerWorkItem] =
+        reinterpret_cast<UnsignedT(&)[ElementsPerWorkItem]>(keys);
+
+#pragma unroll
+    for (int i = 0; i < ElementsPerWorkItem; ++i) {
+      unsigned_keys[i] = detail::traits<T>::twiddle_in(unsigned_keys[i]);
+    }
+
+    for (int i = begin_bit; i < end_bit; i += RADIX_BITS) {
+      int pass_bits = sycl::min(RADIX_BITS, end_bit - begin_bit);
+
+      int ranks[ElementsPerWorkItem];
+      detail::radix_rank<RADIX_BITS, DESCENDING>(_local_memory)
+          .template rank_keys<Item, UnsignedT, ElementsPerWorkItem>(
+              item, unsigned_keys, ranks, i, pass_bits);
+
+      sycl::group_barrier(item.get_group());
+
+      bool last_iter = i + RADIX_BITS >= end_bit;
+      if (last_iter && is_striped) {
+        exchange<T, ElementsPerWorkItem>(_local_memory)
+            .scatter_to_striped(item, keys, ranks);
+
+      } else {
+        exchange<T, ElementsPerWorkItem>(_local_memory)
+            .scatter_to_blocked(item, keys, ranks);
+      }
+
+      sycl::group_barrier(item.get_group());
+    }
+
+#pragma unroll
+    for (int i = 0; i < ElementsPerWorkItem; ++i) {
+      unsigned_keys[i] = detail::traits<T>::twiddle_out(unsigned_keys[i]);
+    }
+  }
+
+public:
+  /// Performs an ascending work-group wide radix sort over a blocked
+  /// arrangement of input elements.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   { [0,511,1,510], [2,509,3,508], [4,507,5,506], ..., [254,257,255,256] }.
+  ///
+  /// The ascending order output is:
+  ///
+  ///   { [0,1,2,3], [4,5,6,7], [8,9,10,11], ..., [508,509,510,511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param begin_bit The beginning (least-significant) bit index needed for
+  /// key comparison.
+  /// \param end_bit The past-the-end (most-significant) bit
+  /// index needed for key comparison.
+  template <typename Item>
+  __dpct_inline__ void sort(const Item &item, T (&input)[ElementsPerWorkItem],
+                            int begin_bit = 0, int end_bit = 8 * sizeof(T)) {
+    helper_sort<Item, /*DESCENDING=*/false>(item, input, begin_bit, end_bit);
+  }
+
+  /// Performs an descending work-group wide radix sort over a blocked
+  /// arrangement of input elements.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   { [0,511,1,510], [2,509,3,508], [4,507,5,506], ..., [254,257,255,256] }.
+  ///
+  /// The descending order output is:
+  ///
+  ///   { [511,510,509,508], [11,10,9,8], [7,6,5,4], ..., [3,2,1,0] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param begin_bit The beginning (least-significant) bit index needed for
+  /// key comparison.
+  /// \param end_bit The past-the-end (most-significant) bit
+  /// index needed for key comparison.
+  template <typename Item>
+  __dpct_inline__ void
+  sort_descending(const Item &item, T (&input)[ElementsPerWorkItem],
+                  int begin_bit = 0, int end_bit = 8 * sizeof(T)) {
+    helper_sort<Item, /*DESCENDING=*/true>(item, input, begin_bit, end_bit);
+  }
+
+  /// Performs an ascending radix sort across a blocked arrangement of input
+  /// elements, leaving them in a striped arrangement.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   { [0,511,1,510], [2,509,3,508], [4,507,5,506], ..., [254,257,255,256] }.
+  ///
+  /// The corresponding output of each work-item will be:
+  ///
+  ///   { [0,128,256,384], [1,129,257,385], [2,130,258,386], ...,
+  ///   [127,255,383,511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param begin_bit The beginning (least-significant) bit index needed for
+  /// key comparison.
+  /// \param end_bit The past-the-end (most-significant) bit
+  /// index needed for key comparison.
+  template <typename Item>
+  __dpct_inline__ void
+  sort_blocked_to_striped(const Item &item, T (&input)[ElementsPerWorkItem],
+                          int begin_bit = 0, int end_bit = 8 * sizeof(T)) {
+    helper_sort<Item, /*DESCENDING=*/false>(item, input, begin_bit, end_bit,
+                                            /*is_striped=*/true);
+  }
+
+  /// Performs an descending radix sort across a blocked arrangement of input
+  /// elements, leaving them in a striped arrangement.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   { [0,511,1,510], [2,509,3,508], [4,507,5,506], ..., [254,257,255,256] }.
+  ///
+  /// The descending striped order output is:
+  ///
+  ///   { [0,128,256,384], [1,129,257,385], [2,130,258,386], ...,
+  ///   [127,255,383,511] }.
+  ///
+  /// \tparam Item The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param begin_bit The beginning (least-significant) bit index needed for
+  /// key comparison.
+  /// \param end_bit The past-the-end (most-significant) bit
+  /// index needed for key comparison.
+  template <typename Item>
+  __dpct_inline__ void sort_descending_blocked_to_striped(
+      const Item &item, T (&input)[ElementsPerWorkItem], int begin_bit = 0,
+      int end_bit = 8 * sizeof(T)) {
+    helper_sort<Item, /*DESCENDING=*/true>(item, input, begin_bit, end_bit,
+                                           /*is_striped=*/true);
+  }
+};
+
+/// The work-group wide radix sort to sort integer data elements assigned to
+/// all work-items in the work-group.
+///
+/// \tparam T The type of the data elements.
+/// \tparam ElementsPerWorkItem The number of data elements assigned to
+/// a work-item.
+/// \tparam DECENDING The value indicating if data elements are sorted in
+/// decending order.
+template <typename T, int ElementsPerWorkItem, bool DESCENDING = false>
+class [[deprecated("Please use group_radix_sort instead")]] radix_sort {
+  using SorterT = group_radix_sort<T, ElementsPerWorkItem>;
+  SorterT _sorter;
+
+public:
+  static size_t get_local_memory_size(size_t group_threads) {
+    return SorterT::get_local_memory_size(group_threads);
+  }
+
+  radix_sort(uint8_t * local_memory) : _sorter(local_memory) {}
+
+  template <typename Item>
+  __dpct_inline__ void helper_sort(
+      const Item &item, T(&keys)[ElementsPerWorkItem], int begin_bit = 0,
+      int end_bit = 8 * sizeof(T), bool is_striped = false) {
+    if constexpr (DESCENDING) {
+      if (is_striped)
+        _sorter.sort_descending_blocked_to_striped(item, keys, begin_bit,
+                                                   end_bit);
+      else
+        _sorter.sort_descending(item, keys, begin_bit, end_bit);
+    } else {
+      if (is_striped)
+        _sorter.sort_blocked_to_striped(item, keys, begin_bit, end_bit);
+      else
+        _sorter.sort(item, keys, begin_bit, end_bit);
+    }
+  }
+
+  template <typename Item>
+  __dpct_inline__ void sort_blocked(
+      const Item &item, T(&keys)[ElementsPerWorkItem], int begin_bit = 0,
+      int end_bit = 8 * sizeof(T)) {
+    helper_sort(item, keys, begin_bit, end_bit, false);
+  }
+
+  template <typename Item>
+  __dpct_inline__ void sort_blocked_to_striped(
+      const Item &item, T(&keys)[ElementsPerWorkItem], int begin_bit = 0,
+      int end_bit = 8 * sizeof(T)) {
+    helper_sort(item, keys, begin_bit, end_bit, true);
+  }
+};
+
+/// Load linear segment items into block format across threads
+/// Helper for Block Load
+enum load_algorithm {
+  BLOCK_LOAD_DIRECT,
+  BLOCK_LOAD_STRIPED,
+};
+
+// loads a linear segment of workgroup items into a blocked arrangement.
+template <size_t ITEMS_PER_WORK_ITEM, typename InputT, typename InputIteratorT,
+          typename Item>
+[[deprecated("Please use load_direct_blocked instead")]]
+__dpct_inline__ void load_blocked(const Item &item, InputIteratorT block_itr,
+                                  InputT (&items)[ITEMS_PER_WORK_ITEM]) {
+
+  // This implementation does not take in account range loading across
+  // workgroup items To-do: Decide whether range loading is required for group
+  // loading
+  size_t linear_tid = item.get_local_linear_id();
+  uint32_t workgroup_offset = linear_tid * ITEMS_PER_WORK_ITEM;
+#pragma unroll
+  for (size_t idx = 0; idx < ITEMS_PER_WORK_ITEM; idx++) {
+    items[idx] = block_itr[workgroup_offset + idx];
+  }
+}
+
+// loads a linear segment of workgroup items into a striped arrangement.
+template <size_t ITEMS_PER_WORK_ITEM, typename InputT, typename InputIteratorT,
+          typename Item>
+[[deprecated("Please use load_direct_striped instead")]]
+__dpct_inline__ void load_striped(const Item &item, InputIteratorT block_itr,
+                                  InputT (&items)[ITEMS_PER_WORK_ITEM]) {
+
+  // This implementation does not take in account range loading across
+  // workgroup items To-do: Decide whether range loading is required for group
+  // loading
+  size_t linear_tid = item.get_local_linear_id();
+  size_t group_work_items = item.get_local_range().size();
+#pragma unroll
+  for (size_t idx = 0; idx < ITEMS_PER_WORK_ITEM; idx++) {
+    items[idx] = block_itr[linear_tid + (idx * group_work_items)];
+  }
+}
+
+/// Load a linear segment of elements into a blocked arrangement across the
+/// work-group.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+template <typename T, size_t ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void load_direct_blocked(const ItemT &item,
+                                         InputIteratorT input_iter,
+                                         T (&data)[ElementsPerWorkItem]) {
+  size_t work_item_id = item.get_local_linear_id();
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    data[i] = input_iter[(work_item_id * ElementsPerWorkItem) + i];
+}
+
+/// Load a linear segment of elements into a striped arrangement across the
+/// work-group.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+template <typename T, int ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void load_direct_striped(const ItemT &item,
+                                         InputIteratorT input_iter,
+                                         T (&data)[ElementsPerWorkItem]) {
+  size_t work_group_size = item.get_group().get_local_linear_range();
+  size_t work_item_id = item.get_local_linear_id();
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    data[i] = input_iter[work_item_id + i * work_group_size];
+}
+
+/// Load a linear segment of elements into a sub_group striped arrangement
+/// across the work-group.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+template <typename T, int ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+load_direct_sub_group_striped(const ItemT &item, InputIteratorT input_iter,
+                              T (&data)[ElementsPerWorkItem]) {
+  auto sg = item.get_sub_group();
+  size_t wg_size = item.get_group().get_local_linear_range();
+  size_t sub_group_sliced_items =
+      std::min<size_t>(sg.get_local_linear_range(), wg_size);
+
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+    size_t offset = (sg.get_group_linear_id() * sub_group_sliced_items *
+                     ElementsPerWorkItem) +
+                    (i * sub_group_sliced_items) + sg.get_local_linear_id();
+    data[i] = input_iter[offset];
+  }
+}
+
+/// Load a linear segment of elements into a blocked arrangement across the
+/// work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load
+template <typename T, size_t ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+load_direct_blocked(const ItemT &item, InputIteratorT input_iter,
+                    T (&data)[ElementsPerWorkItem], int valid_items) {
+  size_t work_item_id = item.get_local_linear_id();
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    if ((work_item_id * ElementsPerWorkItem) + i < valid_items)
+      data[i] = input_iter[(work_item_id * ElementsPerWorkItem) + i];
+}
+
+/// Load a linear segment of elements into a striped arrangement across the
+/// work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load
+template <typename T, int ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+load_direct_striped(const ItemT &item, InputIteratorT input_iter,
+                    T (&data)[ElementsPerWorkItem], int valid_items) {
+  size_t work_group_size = item.get_group().get_local_linear_range();
+  size_t work_item_id = item.get_local_linear_id();
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    if (work_item_id + (i * work_group_size) < valid_items)
+      data[i] = input_iter[work_item_id + i * work_group_size];
+}
+
+/// Load a linear segment of elements into a sub_group striped arrangement
+/// across the work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load.
+template <typename T, int ElementsPerWorkItem, typename InputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+load_direct_sub_group_striped(const ItemT &item, InputIteratorT input_iter,
+                              T (&data)[ElementsPerWorkItem], int valid_items) {
+  auto sg = item.get_sub_group();
+  size_t wg_size = item.get_group().get_local_linear_range();
+  size_t sub_group_sliced_items =
+      std::min<size_t>(sg.get_local_linear_range(), wg_size);
+
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+    size_t offset = (sg.get_group_linear_id() * sub_group_sliced_items *
+                     ElementsPerWorkItem) +
+                    (i * sub_group_sliced_items) + sg.get_local_linear_id();
+    if (offset < valid_items) {
+      data[i] = input_iter[offset];
+    }
+  }
+}
+
+/// Load a linear segment of elements into a blocked arrangement across the
+/// work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam DefaultT The type of default value to assign out-of-bound items.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load
+/// \param default_value Default value to assign out-of-bound items.
+template <typename T, typename DefaultT, size_t ElementsPerWorkItem,
+          typename InputIteratorT, typename ItemT>
+__dpct_inline__ void
+load_direct_blocked(const ItemT &item, InputIteratorT input_iter,
+                    T (&data)[ElementsPerWorkItem], int valid_items,
+                    DefaultT default_value) {
+#pragma unroll
+  for (int i = 0; i < ElementsPerWorkItem; i++) {
+    data[i] = default_value;
+  }
+  load_direct_blocked(item, input_iter, data, valid_items);
+}
+
+/// Load a linear segment of elements into a striped arrangement across the
+/// work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam DefaultT The type of default value to assign out-of-bound items.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load
+/// \param default_value Default value to assign out-of-bound items.
+template <typename T, typename DefaultT, int ElementsPerWorkItem,
+          typename InputIteratorT, typename ItemT>
+__dpct_inline__ void
+load_direct_striped(const ItemT &item, InputIteratorT input_iter,
+                    T (&data)[ElementsPerWorkItem], int valid_items,
+                    DefaultT default_value) {
+#pragma unroll
+  for (int i = 0; i < ElementsPerWorkItem; i++) {
+    data[i] = default_value;
+  }
+  load_direct_striped(item, input_iter, data, valid_items);
+}
+
+/// Load a linear segment of elements into a sub_group striped arrangement
+/// across the work-group, guarded by range.
+///
+/// \tparam T The data type to load.
+/// \tparam DefaultT The type of default value to assign out-of-bound items.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam InputIteratorT  The random-access iterator type for input \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param input_iter The work-group's base input iterator for loading from.
+/// \param data Data to load.
+/// \param valid_items Number of valid items to load.
+/// \param default_value Default value to assign out-of-bound items.
+template <typename T, typename DefaultT, int ElementsPerWorkItem,
+          typename InputIteratorT, typename ItemT>
+__dpct_inline__ void
+load_direct_sub_group_striped(const ItemT &item, InputIteratorT input_iter,
+                              T (&data)[ElementsPerWorkItem], int valid_items,
+                              DefaultT default_value) {
+#pragma unroll
+  for (int i = 0; i < ElementsPerWorkItem; i++) {
+    data[i] = default_value;
+  }
+  load_direct_sub_group_striped(item, input_iter, data, valid_items);
+}
+
+/// Store a blocked arrangement of items across a work-group into a linear
+/// segment of items.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param data Data to store.
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void store_direct_blocked(const ItemT &item,
+                                          OutputIteratorT output_iter,
+                                          T (&data)[ElementsPerWorkItem]) {
+  size_t work_item_id = item.get_local_linear_id();
+  OutputIteratorT work_item_iter =
+      output_iter + (work_item_id * ElementsPerWorkItem);
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    work_item_iter[i] = data[i];
+}
+
+/// Store a striped arrangement of items across a work-group into a linear
+/// segment of items.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param data Data to store.
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void store_direct_striped(const ItemT &item,
+                                          OutputIteratorT output_iter,
+                                          T (&data)[ElementsPerWorkItem]) {
+  size_t work_group_size = item.get_group().get_local_linear_range();
+  size_t work_item_id = item.get_local_linear_id();
+  OutputIteratorT work_item_iter = output_iter + work_item_id;
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    work_item_iter[i * work_group_size] = data[i];
+}
+
+/// Store a sub_group striped arrangement of items across a work-group into a
+/// linear segment of items.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param data Data to store.
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+store_direct_sub_group_striped(const ItemT &item, OutputIteratorT output_iter,
+                               T (&data)[ElementsPerWorkItem]) {
+  auto sg = item.get_sub_group();
+  size_t wg_size = item.get_group().get_local_linear_range();
+  size_t sub_group_sliced_items =
+      std::min<size_t>(sg.get_local_linear_range(), wg_size);
+
+  OutputIteratorT work_item_iter =
+      output_iter +
+      sg.get_group_linear_id() * sub_group_sliced_items * ElementsPerWorkItem +
+      sg.get_local_linear_id();
+
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+    work_item_iter[i * sub_group_sliced_items] = data[i];
+  }
+}
+
+/// Store a blocked arrangement of items across a work-group into a linear
+/// segment of items, guarded by range.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param data Data to store.
+/// \param valid_items Number of valid items to load
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+store_direct_blocked(const ItemT &item, OutputIteratorT output_iter,
+                     T (&data)[ElementsPerWorkItem], size_t valid_items) {
+  size_t work_item_id = item.get_local_linear_id();
+  OutputIteratorT work_item_iter =
+      output_iter + (work_item_id * ElementsPerWorkItem);
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    if (i + (work_item_id * ElementsPerWorkItem) < valid_items)
+      work_item_iter[i] = data[i];
+}
+
+/// Store a striped arrangement of items across a work-group into a linear
+/// segment of items, guarded by range.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param items Data to store.
+/// \param valid_items Number of valid items to load
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+store_direct_striped(const ItemT &item, OutputIteratorT output_iter,
+                     T (&data)[ElementsPerWorkItem], size_t valid_items) {
+  size_t work_group_size = item.get_group().get_local_linear_range();
+  size_t work_item_id = item.get_local_linear_id();
+  OutputIteratorT work_item_iter = output_iter + work_item_id;
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++)
+    if ((i * work_group_size) + work_item_id < valid_items)
+      work_item_iter[i * work_group_size] = data[i];
+}
+
+/// Store a sub_group striped arrangement of items across a work-group into a
+/// linear segment of items.
+///
+/// \tparam T The data type to store.
+/// \tparam ElementsPerWorkItem The number of consecutive elements partitioned
+/// onto each work-item.
+/// \tparam OutputIteratorT  The random-access iterator type for output.
+/// \iterator.
+/// \tparam ItemT The sycl::nd_item index space class.
+/// \param item The calling work-item.
+/// \param output_iter The work-group's base output iterator for writing.
+/// \param data Data to store.
+/// \param valid_items Number of valid items to load
+template <typename T, size_t ElementsPerWorkItem, typename OutputIteratorT,
+          typename ItemT>
+__dpct_inline__ void
+store_direct_sub_group_striped(const ItemT &item, OutputIteratorT output_iter,
+                               T (&data)[ElementsPerWorkItem],
+                               size_t valid_items) {
+  auto sg = item.get_sub_group();
+  size_t wg_size = item.get_group().get_local_linear_range();
+  size_t sub_group_sliced_items =
+      std::min<size_t>(sg.get_local_linear_range(), wg_size);
+  size_t sub_group_offset =
+      sg.get_group_linear_id() * sub_group_sliced_items * ElementsPerWorkItem;
+  OutputIteratorT work_item_iter =
+      output_iter + sub_group_offset + sg.get_local_linear_id();
+
+#pragma unroll
+  for (size_t i = 0; i < ElementsPerWorkItem; i++) {
+    if (sub_group_offset + sg.get_local_linear_id() +
+            i * sub_group_sliced_items <
+        valid_items) {
+      work_item_iter[i * sub_group_sliced_items] = data[i];
+    }
+  }
+}
+
+// loads a linear segment of workgroup items into a subgroup striped
+// arrangement. Created as free function until exchange mechanism is
+// implemented.
+// To-do: inline this function with BLOCK_LOAD_WARP_TRANSPOSE mechanism
+template <size_t ITEMS_PER_WORK_ITEM, typename InputT, typename InputIteratorT,
+          typename Item>
+__dpct_inline__ void
+uninitialized_load_subgroup_striped(const Item &item, InputIteratorT block_itr,
+                                    InputT (&items)[ITEMS_PER_WORK_ITEM]) {
+
+  // This implementation does not take in account range loading across
+  // workgroup items To-do: Decide whether range loading is required for group
+  // loading
+  // This implementation uses unintialized memory for loading linear segments
+  // into warp striped arrangement.
+  uint32_t subgroup_offset = item.get_sub_group().get_local_linear_id();
+  uint32_t subgroup_size = item.get_sub_group().get_local_linear_range();
+  uint32_t subgroup_idx = item.get_sub_group().get_group_linear_id();
+  uint32_t initial_offset =
+      (subgroup_idx * ITEMS_PER_WORK_ITEM * subgroup_size) + subgroup_offset;
+#pragma unroll
+  for (size_t idx = 0; idx < ITEMS_PER_WORK_ITEM; idx++) {
+    new (&items[idx]) InputT(block_itr[initial_offset + (idx * subgroup_size)]);
+  }
+}
+// template parameters :
+// ITEMS_PER_WORK_ITEM: size_t variable controlling the number of items per
+// thread/work_item
+// ALGORITHM: load_algorithm variable controlling the type of load operation.
+// InputT: type for input sequence.
+// InputIteratorT:  input iterator type
+// Item : typename parameter resembling sycl::nd_item<3> .
+template <size_t ITEMS_PER_WORK_ITEM, load_algorithm ALGORITHM, typename InputT,
+          typename InputIteratorT, typename Item>
+class [[deprecated(
+    "Please use dpct::group::group_load instead")]] workgroup_load {
+public:
+  static size_t get_local_memory_size(size_t group_work_items) { return 0; }
+  workgroup_load(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  __dpct_inline__ void load(const Item &item, InputIteratorT block_itr,
+                            InputT (&items)[ITEMS_PER_WORK_ITEM]) {
+
+    if constexpr (ALGORITHM == BLOCK_LOAD_DIRECT) {
+      load_blocked<ITEMS_PER_WORK_ITEM>(item, block_itr, items);
+    } else if constexpr (ALGORITHM == BLOCK_LOAD_STRIPED) {
+      load_striped<ITEMS_PER_WORK_ITEM>(item, block_itr, items);
+    }
+  }
+
+private:
+  uint8_t *_local_memory;
+};
+
+/// Enumerates alternative algorithms for dpct::group::group_load to read a
+/// linear segment of data from memory into a blocked arrangement across a
+/// work-group.
+enum class group_load_algorithm {
+  /// A blocked arrangement of data is read directly from memory.
+  blocked,
+
+  /// A striped arrangement of data is read directly from memory.
+  striped,
+
+  /// A striped arrangement of data is read directly from memory and transposed
+  /// into a blocked arrangement.
+  transpose,
+
+  /// A sub_group striped arrangement of data is read directly from memory and
+  /// transposed into a blocked arrangement.
+  sub_group_transpose,
+};
+
+/// Provide methods for loading a linear segment of items from memory into a
+/// blocked arrangement across a work-group.
+///
+/// \tparam T The input data type.
+/// \tparam ElementsPerWorkItem The number of data elements assigned to a
+/// work-item.
+/// \tparam LoadAlgorithm The data movement strategy, default is blocked.
+template <typename T, size_t ElementsPerWorkItem,
+          group_load_algorithm LoadAlgorithm = group_load_algorithm::blocked>
+class group_load {
+public:
+  static size_t get_local_memory_size(size_t work_group_size) {
+    if constexpr ((LoadAlgorithm == group_load_algorithm::transpose) ||
+                  (LoadAlgorithm ==
+                   group_load_algorithm::sub_group_transpose)) {
+      return dpct::group::exchange<
+          T, ElementsPerWorkItem>::get_local_memory_size(work_group_size);
+    }
+    return 0;
+  }
+  group_load(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  /// Load a linear segment of items from memory.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   1, 2, 3, 4, 5, 6, 7, ..., 508, 509, 510, 511.
+  ///
+  /// The blocked order \p data of each work-item will be:
+  ///
+  ///   {[0,1,2,3], [4,5,6,7], ..., [508,509,510,511]}.
+  ///
+  /// The striped order \p output of each work-item will be:
+  ///
+  ///   {[0,128,256,384], [1,129,257,385], ..., [127,255,383,511]}.
+  ///
+  /// \tparam ItemT The sycl::nd_item index space class.
+  /// \tparam InputIteratorT The random-access iterator type for input
+  /// \iterator.
+  /// \param item The work-item identifier.
+  /// \param input_iter The work-group's base input iterator for loading from.
+  /// \param data The data to load.
+  template <typename ItemT, typename InputIteratorT>
+  __dpct_inline__ void load(const ItemT &item, InputIteratorT input_iter,
+                            T (&data)[ElementsPerWorkItem]) {
+    if constexpr (LoadAlgorithm == group_load_algorithm::blocked) {
+      load_direct_blocked<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::striped) {
+      load_direct_striped<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::transpose) {
+      load_direct_striped<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .striped_to_blocked(item, data, data);
+    } else if constexpr (LoadAlgorithm ==
+                         group_load_algorithm::sub_group_transpose) {
+      load_direct_sub_group_striped<T, ElementsPerWorkItem, InputIteratorT,
+                                    ItemT>(item, input_iter, data);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .sub_group_striped_to_blocked(item, data, data);
+    }
+  }
+
+  /// Load a linear segment of items from memory, guarded by range.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and
+  /// valid_items is 5, the \p input across the work-group is:
+  ///
+  ///   0, 1, 2, 3, 4, 5, 6, 7, ..., 508, 509, 510, 511.
+  ///
+  /// The blocked order \p data of each work-item will be:
+  ///
+  ///   {[0,1,2,3], [4,?,?,?], ..., [?,?,?,?]}.
+  ///
+  /// The striped order \p output of each work-item will be:
+  ///
+  ///   {[0,?,?,?], [1,?,?,?], [2,?,?,?], [3,?,?,?] ..., [?,?,?,?]}.
+  ///
+  /// \tparam ItemT The sycl::nd_item index space class.
+  /// \tparam InputIteratorT The random-access iterator type for input
+  /// \iterator.
+  /// \param item The work-item identifier.
+  /// \param input_iter The work-group's base input iterator for loading from.
+  /// \param data The data to load.
+  /// \param valid_items Number of valid items to load
+  template <typename ItemT, typename InputIteratorT>
+  __dpct_inline__ void load(const ItemT &item, InputIteratorT input_iter,
+                            T (&data)[ElementsPerWorkItem], int valid_items) {
+    if constexpr (LoadAlgorithm == group_load_algorithm::blocked) {
+      load_direct_blocked<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data, valid_items);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::striped) {
+      load_direct_striped<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data, valid_items);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::transpose) {
+      load_direct_striped<T, ElementsPerWorkItem, InputIteratorT, ItemT>(
+          item, input_iter, data, valid_items);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .striped_to_blocked(item, data, data);
+    } else if constexpr (LoadAlgorithm ==
+                         group_load_algorithm::sub_group_transpose) {
+      load_direct_sub_group_striped<T, ElementsPerWorkItem, InputIteratorT,
+                                    ItemT>(item, input_iter, data, valid_items);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .sub_group_striped_to_blocked(item, data, data);
+    }
+  }
+
+  /// Load a linear segment of items from memory, guarded by range.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and
+  /// valid_items is 5, the \p input across the work-group is:
+  ///
+  ///   0, 1, 2, 3, 4, 5, 6, 7, ..., 508, 509, 510, 511.
+  ///
+  /// The blocked order \p data of each work-item will be:
+  ///
+  ///   {[0,1,2,3], [4,?,?,?], ..., [?,?,?,?]}.
+  ///
+  /// The striped order \p output of each work-item will be:
+  ///
+  ///   {[0,?,?,?], [1,?,?,?], [2,?,?,?], [3,?,?,?] ..., [?,?,?,?]}.
+  ///
+  /// \tparam ItemT The sycl::nd_item index space class.
+  /// \tparam InputIteratorT The random-access iterator type for input
+  /// \iterator.
+  /// \tparam DefaultT The type of default value to assign out-of-bound items.
+  /// \param item The work-item identifier.
+  /// \param input_iter The work-group's base input iterator for loading from.
+  /// \param data The data to load.
+  /// \param valid_items Number of valid items to load.
+  /// \param default_value Default value to assign out-of-bound items.
+  template <typename ItemT, typename InputIteratorT, typename DefaultT>
+  __dpct_inline__ void load(const ItemT &item, InputIteratorT input_iter,
+                            T (&data)[ElementsPerWorkItem], int valid_items,
+                            DefaultT default_value) {
+    if constexpr (LoadAlgorithm == group_load_algorithm::blocked) {
+      load_direct_blocked<T, DefaultT, ElementsPerWorkItem, InputIteratorT,
+                          ItemT>(item, input_iter, data, valid_items,
+                                 default_value);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::striped) {
+      load_direct_striped<T, DefaultT, ElementsPerWorkItem, InputIteratorT,
+                          ItemT>(item, input_iter, data, valid_items,
+                                 default_value);
+    } else if constexpr (LoadAlgorithm == group_load_algorithm::transpose) {
+      load_direct_striped<T, DefaultT, ElementsPerWorkItem, InputIteratorT,
+                          ItemT>(item, input_iter, data, valid_items,
+                                 default_value);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .striped_to_blocked(item, data, data);
+    } else if constexpr (LoadAlgorithm ==
+                         group_load_algorithm::sub_group_transpose) {
+      load_direct_sub_group_striped<T, DefaultT, ElementsPerWorkItem,
+                                    InputIteratorT, ItemT>(
+          item, input_iter, data, valid_items, default_value);
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .sub_group_striped_to_blocked(item, data, data);
+    }
+  }
+
+private:
+  uint8_t *_local_memory;
+};
+
+/// Enumerates alternative algorithms for dpct::group::group_load to write a
+/// blocked arrangement of items across a work-group to a linear segment of
+/// memory.
+enum class group_store_algorithm {
+  /// A blocked arrangement of data is written directly to memory.
+  blocked,
+
+  /// A striped arrangement of data is written directly to memory.
+  striped,
+
+  /// A blocked arrangement of data transposed into a striped arrangement and
+  /// then written directly to memory.
+  transpose,
+
+  /// A blocked arrangement of data transposed into a sub_group striped
+  /// arrangement and then written directly to memory.
+  sub_group_transpose,
+};
+
+/// Provide methods for writing a blocked arrangement of elements partitioned
+/// across a work-group to a linear segment of memory.
+///
+/// \tparam T The output data type.
+/// \tparam ElementsPerWorkItem The number of data elements assigned to a
+/// work-item.
+/// \tparam StoreAlgorithm The data movement strategy, default is blocked.
+template <typename T, size_t ElementsPerWorkItem,
+          group_store_algorithm StoreAlgorithm = group_store_algorithm::blocked>
+class group_store {
+public:
+  static size_t get_local_memory_size(size_t work_group_size) {
+    if constexpr ((StoreAlgorithm == group_store_algorithm::transpose) ||
+                  (StoreAlgorithm ==
+                   group_store_algorithm::sub_group_transpose)) {
+      return dpct::group::exchange<
+          T, ElementsPerWorkItem>::get_local_memory_size(work_group_size);
+    }
+    return 0;
+  }
+  group_store(uint8_t *local_memory) : _local_memory(local_memory) {}
+
+  /// Store items into a linear segment of memory.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and the
+  /// \p input across the work-group is:
+  ///
+  ///   {[0,1,2,3], [4,5,6,7], ..., [508,509,510,511]}.
+  ///
+  /// The blocked order \p output will be:
+  ///
+  ///   1, 2, 3, 4, 5, 6, 7, ..., 508, 509, 510, 511.
+  ///
+  /// The striped order \p output will be:
+  ///
+  ///   0, 128, 256, 384, 1, 129, 257, 385, ..., 127, 255, 383, 511.
+  ///
+  /// \tparam ItemT The sycl::nd_item index space class.
+  /// \tparam OutputIteratorT The random-access iterator type for \p output
+  /// iterator.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param data The data to store.
+  template <typename ItemT, typename OutputIteratorT>
+  __dpct_inline__ void store(const ItemT &item, OutputIteratorT output_iter,
+                             T (&data)[ElementsPerWorkItem]) {
+    if constexpr (StoreAlgorithm == group_store_algorithm::blocked) {
+      store_direct_blocked<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data);
+    } else if constexpr (StoreAlgorithm == group_store_algorithm::striped) {
+      store_direct_striped<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data);
+    } else if constexpr (StoreAlgorithm == group_store_algorithm::transpose) {
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .blocked_to_striped(item, data, data);
+      store_direct_striped<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data);
+    } else if constexpr (StoreAlgorithm ==
+                         group_store_algorithm::sub_group_transpose) {
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .blocked_to_sub_group_striped(item, data, data);
+      store_direct_sub_group_striped<T, ElementsPerWorkItem, OutputIteratorT,
+                                     ItemT>(item, output_iter, data);
+    }
+  }
+
+  /// Store items into a linear segment of memory, guarded by range.
+  ///
+  /// Suppose 512 integer data elements partitioned across 128 work-items, where
+  /// each work-item owns 4 ( \p ElementsPerWorkItem ) data elements and
+  /// \p valid_items is 5, the \p output across the work-group is:
+  ///
+  ///   {[0,0,0,0], [0,0,0,0], ..., [0,0,0,0]}.
+  ///
+  /// The blocked order \p output will be:
+  ///
+  ///   0, 1, 2, 3, 4, 5, 0, 0, ..., 0, 0, 0, 0.
+  ///
+  /// The striped order \p output will be:
+  ///
+  ///   0, 4, 8, 12, 16, 0, 0, 0, ..., 0, 0, 0, 0.
+  ///
+  /// \tparam ItemT The sycl::nd_item index space class.
+  /// \tparam OutputIteratorT The random-access iterator type for \p output
+  /// iterator.
+  /// \param item The work-item identifier.
+  /// \param input The input data of each work-item.
+  /// \param data The data to store.
+  /// \param valid_items Number of valid items to load
+  template <typename ItemT, typename OutputIteratorT>
+  __dpct_inline__ void store(const ItemT &item, OutputIteratorT output_iter,
+                             T (&data)[ElementsPerWorkItem],
+                             size_t valid_items) {
+    if constexpr (StoreAlgorithm == group_store_algorithm::blocked) {
+      store_direct_blocked<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data, valid_items);
+    } else if constexpr (StoreAlgorithm == group_store_algorithm::striped) {
+      store_direct_striped<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data, valid_items);
+    } else if constexpr (StoreAlgorithm == group_store_algorithm::transpose) {
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .blocked_to_striped(item, data, data);
+      store_direct_striped<T, ElementsPerWorkItem, OutputIteratorT, ItemT>(
+          item, output_iter, data, valid_items);
+    } else if constexpr (StoreAlgorithm ==
+                         group_store_algorithm::sub_group_transpose) {
+      dpct::group::exchange<T, ElementsPerWorkItem>(_local_memory)
+          .blocked_to_sub_group_striped(item, data, data);
+      store_direct_sub_group_striped<T, ElementsPerWorkItem, OutputIteratorT,
+                                     ItemT>(item, output_iter, data,
+                                            valid_items);
+    }
+  }
+
+private:
+  uint8_t *_local_memory;
+};
+
+/// The work-group wide shuffle operations that allow work-items to exchange
+/// data elements with other work-items within the same work-group.
+///
+/// \tparam T The type of the data elements.
+/// \tparam group_dim_0 The first dimension size of the work-group.
+/// \tparam group_dim_1 The second dimension size of the work-group.
+/// \tparam group_dim_2 The third dimension size of the work-group.
+template <typename T, int group_dim_0, int group_dim_1 = 1, int group_dim_2 = 1>
+class group_shuffle {
+  T *_local_memory = nullptr;
+  static constexpr size_t group_work_items =
+      group_dim_0 * group_dim_1 * group_dim_2;
+
+public:
+  static constexpr size_t get_local_memory_size(size_t work_group_size) {
+    return sizeof(T) * work_group_size;
+  }
+  group_shuffle(uint8_t *local_memory) : _local_memory((T *)local_memory) {}
+
+  /// Selects a value from a work-item at a given distance in the work-group
+  /// and stores the value in the output.
+  ///
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input from the calling work-item.
+  /// \param output The output where the selected data will be stored.
+  /// \param distance The distance of work-items to look ahead or behind in the
+  /// work-group.
+  template <typename ItemT>
+  __dpct_inline__ void select(const ItemT &item, T input, T &output,
+                              int distance = 1) {
+    auto g = item.get_group();
+    size_t id = g.get_local_linear_id();
+    _local_memory[id] = input;
+
+    sycl::group_barrier(g, sycl::memory_scope::work_group);
+
+    const int target_id = static_cast<int>(id) + distance;
+    if ((target_id >= 0) && (target_id < group_work_items)) {
+      output = _local_memory[static_cast<size_t>(target_id)];
+    }
+  }
+  /// Selects a value from a work-item at a given distance in the work-group
+  /// and stores the value in the output, using a wrapped index to handle
+  /// overflow.
+  ///
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data to be selected.
+  /// \param output The output where the selected data will be stored.
+  /// \param distance The number of work-items to look ahead in the
+  /// work-group.
+  template <typename ItemT>
+  __dpct_inline__ void select2(const ItemT &item, T input, T &output,
+                               unsigned int distance = 1) {
+    auto g = item.get_group();
+    size_t id = g.get_local_linear_id();
+    _local_memory[id] = input;
+
+    sycl::group_barrier(g, sycl::memory_scope::work_group);
+
+    unsigned int offset = id + distance;
+    if (offset >= group_work_items)
+      offset -= group_work_items;
+
+    output = _local_memory[offset];
+  }
+  /// Performs a shuffle operation to move data to the right across the
+  /// work-items, shifting elements in a work-item array by one position to the
+  /// right.
+  ///
+  /// \tparam ElementsPerWorkItem The number of data elements per work-item.
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data to be shuffled.
+  /// \param output The array that will store the shuffle result.
+  template <int ElementsPerWorkItem, typename ItemT>
+  __dpct_inline__ void shuffle_right(const ItemT &item,
+                                     T (&input)[ElementsPerWorkItem],
+                                     T (&output)[ElementsPerWorkItem]) {
+    auto g = item.get_group();
+    size_t id = g.get_local_linear_id();
+    _local_memory[id] = input[ElementsPerWorkItem - 1];
+
+    sycl::group_barrier(g, sycl::memory_scope::work_group);
+
+#pragma unroll
+    for (int index = ElementsPerWorkItem - 1; index > 0; --index)
+      output[index] = input[index - 1];
+
+    if (id > 0)
+      output[0] = _local_memory[id - 1];
+  }
+  /// Performs a shuffle operation to move data to the right across the
+  /// work-items, storing the suffix of the group after the shuffle operation.
+  ///
+  /// \tparam ElementsPerWorkItem The number of data elements per work-item.
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data to be shuffled.
+  /// \param output The array that will store the shuffle result.
+  /// \param group_suffix The suffix of the group after the shuffle.
+  template <int ElementsPerWorkItem, typename ItemT>
+  __dpct_inline__ void
+  shuffle_right(const ItemT &item, T (&input)[ElementsPerWorkItem],
+                T (&output)[ElementsPerWorkItem], T &group_suffix) {
+    shuffle_right(item, input, output);
+    group_suffix = _local_memory[group_work_items - 1];
+  }
+  /// Performs a shuffle operation to move data to the left across the
+  /// work-items, shifting elements in a work-item array by one position to the
+  /// left.
+  ///
+  /// \tparam ElementsPerWorkItem The number of data elements per work-item.
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data to be shuffled.
+  /// \param output The array that will store the shuffle result.
+  template <int ElementsPerWorkItem, typename ItemT>
+  __dpct_inline__ void shuffle_left(const ItemT &item,
+                                    T (&input)[ElementsPerWorkItem],
+                                    T (&output)[ElementsPerWorkItem]) {
+    auto g = item.get_group();
+    size_t id = g.get_local_linear_id();
+    _local_memory[id] = input[0];
+
+    sycl::group_barrier(g, sycl::memory_scope::work_group);
+
+#pragma unroll
+    for (int index = 0; index < ElementsPerWorkItem - 1; index++)
+      output[index] = input[index + 1];
+
+    if (id < group_work_items - 1)
+      output[ElementsPerWorkItem - 1] = _local_memory[id + 1];
+  }
+  /// Performs a shuffle operation to move data to the left across the
+  /// work-items, storing the prefix of the group before the shuffle operation.
+  ///
+  /// \tparam ElementsPerWorkItem The number of data elements per work-item.
+  /// \tparam ItemT The work-item identifier type.
+  /// \param item The work-item identifier.
+  /// \param input The input data to be shuffled.
+  /// \param output The array that will store the shuffle result.
+  /// \param group_prefix The prefix of the group before the shuffle.
+  template <int ElementsPerWorkItem, typename ItemT>
+  __dpct_inline__ void
+  shuffle_left(const ItemT &item, T (&input)[ElementsPerWorkItem],
+               T (&output)[ElementsPerWorkItem], T &group_prefix) {
+    shuffle_left(item, input, output);
+    group_prefix = _local_memory[0];
+  }
+};
+} // namespace group
+} // namespace dpct
+
+#endif // __DPCT_GROUP_UTILS_HPP__
diff --git a/sycl/include/dpct/image.hpp b/sycl/include/dpct/image.hpp
new file mode 100644
index 00000000000..d9acf485e3c
--- /dev/null
+++ b/sycl/include/dpct/image.hpp
@@ -0,0 +1,1075 @@
+//==---- image.hpp --------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_IMAGE_HPP__
+#define __DPCT_IMAGE_HPP__
+
+#include <sycl/sycl.hpp>
+
+#include "memory.hpp"
+#include "util.hpp"
+
+namespace dpct {
+
+enum class image_channel_data_type {
+  signed_int,
+  unsigned_int,
+  fp,
+};
+
+enum class image_type {
+  standard,
+  array,
+};
+
+class image_channel;
+class image_wrapper_base;
+namespace detail {
+/// Image object type traits, with accessor type and sampled data type defined.
+/// The data type of an image accessor must be one of sycl::int4, sycl::uint4,
+/// sycl::float4 and sycl::half4. The data type of accessors with 8bits/16bits
+/// channel width will be 32 bits. sycl::half is an exception.
+template <class T> struct image_trait {
+  using acc_data_t = sycl::vec<T, 4>;
+  template <int dimensions>
+  using accessor_t =
+      sycl::accessor<acc_data_t, dimensions, sycl::access_mode::read,
+                         sycl::access::target::image>;
+  template <int dimensions>
+  using array_accessor_t =
+      sycl::accessor<acc_data_t, dimensions, sycl::access_mode::read,
+                         sycl::access::target::image_array>;
+  using data_t = T;
+  using elem_t = T;
+  static constexpr image_channel_data_type data_type =
+      std::is_integral<T>::value
+          ? (std::is_signed<T>::value ? image_channel_data_type::signed_int
+                                      : image_channel_data_type::unsigned_int)
+          : image_channel_data_type::fp;
+  static constexpr int channel_num = 1;
+};
+template <>
+struct image_trait<std::uint8_t> : public image_trait<std::uint32_t> {
+  using data_t = std::uint8_t;
+  using elem_t = data_t;
+};
+template <>
+struct image_trait<std::uint16_t>
+    : public image_trait<std::uint32_t> {
+  using data_t = std::uint16_t;
+  using elem_t = data_t;
+};
+template <>
+struct image_trait<std::int8_t> : public image_trait<std::int32_t> {
+  using data_t = std::int8_t;
+  using elem_t = data_t;
+};
+template <>
+struct image_trait<std::int16_t> : public image_trait<std::int32_t> {
+  using data_t = std::int16_t;
+  using elem_t = data_t;
+};
+template <>
+struct image_trait<char>
+    : public image_trait<typename std::conditional<
+          std::is_signed<char>::value, signed char, unsigned char>::type> {};
+
+template <class T>
+struct image_trait<sycl::vec<T, 1>> : public image_trait<T> {};
+
+template <class T>
+struct image_trait<sycl::vec<T, 2>> : public image_trait<T> {
+  using data_t = sycl::vec<T, 2>;
+  static constexpr int channel_num = 2;
+};
+
+template <class T>
+struct image_trait<sycl::vec<T, 3>>
+    : public image_trait<sycl::vec<T, 4>> {
+  static constexpr int channel_num = 3;
+};
+
+template <class T>
+struct image_trait<sycl::vec<T, 4>> : public image_trait<T> {
+  using data_t = sycl::vec<T, 4>;
+  static constexpr int channel_num = 4;
+};
+
+/// Functor to fetch data from read result of an image accessor.
+template <class T> struct fetch_data {
+  using return_t = typename image_trait<T>::data_t;
+  using acc_data_t = typename image_trait<T>::acc_data_t;
+
+  return_t operator()(acc_data_t &&original_data) {
+    return (return_t)original_data.r();
+  }
+};
+template <class T>
+struct fetch_data<sycl::vec<T, 1>> : public fetch_data<T> {};
+template <class T> struct fetch_data<sycl::vec<T, 2>> {
+  using return_t = typename image_trait<sycl::vec<T, 2>>::data_t;
+  using acc_data_t = typename image_trait<sycl::vec<T, 2>>::acc_data_t;
+
+  return_t operator()(acc_data_t &&origin_data) {
+    return return_t(origin_data.r(), origin_data.g());
+  }
+};
+template <class T>
+struct fetch_data<sycl::vec<T, 3>>
+    : public fetch_data<sycl::vec<T, 4>> {};
+template <class T> struct fetch_data<sycl::vec<T, 4>> {
+  using return_t = typename image_trait<sycl::vec<T, 4>>::data_t;
+  using acc_data_t = typename image_trait<sycl::vec<T, 4>>::acc_data_t;
+
+  return_t operator()(acc_data_t &&origin_data) {
+    return return_t(origin_data.r(), origin_data.g(), origin_data.b(),
+                    origin_data.a());
+  }
+};
+
+/// Create image according with given type \p T and \p dims.
+template <class T> static image_wrapper_base *create_image_wrapper(int dims);
+
+/// Create image with given data type \p T, channel order and dims
+template <class T>
+static image_wrapper_base *create_image_wrapper(unsigned channel_num, int dims);
+
+/// Create image with channel info and specified dimensions.
+static image_wrapper_base *create_image_wrapper(image_channel channel, int dims);
+
+} // namespace detail
+
+struct image_matrix_desc {
+  size_t width = 0;
+  size_t height = 0;
+  size_t depth = 0;
+  sycl::image_channel_type channel_type =
+      sycl::image_channel_type::signed_int32;
+  unsigned num_channels = 0;
+};
+
+/// Image channel info, include channel number, order, data width and type
+class image_channel {
+  image_channel_data_type _type = image_channel_data_type::signed_int;
+  /// Number of channels.
+  unsigned _channel_num = 0;
+  /// Total size of all channels in bytes.
+  unsigned _total_size = 0;
+  /// Size of each channel in bytes.
+  unsigned _channel_size = 0;
+
+public:
+  /// Create image channel info according to template argument \p T.
+  template <class T> static image_channel create() {
+    image_channel channel;
+    channel.set_channel_size(detail::image_trait<T>::channel_num,
+                             sizeof(typename detail::image_trait<T>::elem_t) *
+                                 8);
+    channel.set_channel_data_type(detail::image_trait<T>::data_type);
+    return channel;
+  }
+
+  image_channel() = default;
+
+  image_channel_data_type get_channel_data_type() { return _type; }
+  void set_channel_data_type(image_channel_data_type type) { _type = type; }
+
+  unsigned get_total_size() const { return _total_size; }
+
+  unsigned get_channel_num() const { return _channel_num; }
+  void set_channel_num(unsigned channel_num) {
+    _channel_num = channel_num;
+    _total_size = _channel_size * _channel_num;
+  }
+
+  /// image_channel constructor.
+  /// \param r Channel r width in bits.
+  /// \param g Channel g width in bits. Should be same with \p r, or zero.
+  /// \param b Channel b width in bits. Should be same with \p g, or zero.
+  /// \param a Channel a width in bits. Should be same with \p b, or zero.
+  /// \param data_type Image channel data type: signed_nt, unsigned_int or fp.
+  image_channel(int r, int g, int b, int a, image_channel_data_type data_type) {
+    _type = data_type;
+    if (a) {
+      assert(r == a && "SYCL doesn't support different channel size");
+      assert(r == b && "SYCL doesn't support different channel size");
+      assert(r == g && "SYCL doesn't support different channel size");
+      set_channel_size(4, a);
+    } else if (b) {
+      assert(r == b && "SYCL doesn't support different channel size");
+      assert(r == g && "SYCL doesn't support different channel size");
+      set_channel_size(3, b);
+    } else if (g) {
+      assert(r == g && "SYCL doesn't support different channel size");
+      set_channel_size(2, g);
+    } else {
+      set_channel_size(1, r);
+    }
+  }
+
+  sycl::image_channel_type get_channel_type() const {
+    if (_channel_size == 4) {
+      if (_type == image_channel_data_type::signed_int)
+        return sycl::image_channel_type::signed_int32;
+      else if (_type == image_channel_data_type::unsigned_int)
+        return sycl::image_channel_type::unsigned_int32;
+      else if (_type == image_channel_data_type::fp)
+        return sycl::image_channel_type::fp32;
+    } else if (_channel_size == 2) {
+      if (_type == image_channel_data_type::signed_int)
+        return sycl::image_channel_type::signed_int16;
+      else if (_type == image_channel_data_type::unsigned_int)
+        return sycl::image_channel_type::unsigned_int16;
+      else if (_type == image_channel_data_type::fp)
+        return sycl::image_channel_type::fp16;
+    } else {
+      if (_type == image_channel_data_type::signed_int)
+        return sycl::image_channel_type::signed_int8;
+      else if (_type == image_channel_data_type::unsigned_int)
+        return sycl::image_channel_type::unsigned_int8;
+    }
+    assert(false && "unexpected channel data kind and channel size");
+    return sycl::image_channel_type::signed_int32;
+  }
+  void set_channel_type(sycl::image_channel_type type) {
+    switch (type) {
+    case sycl::image_channel_type::unsigned_int8:
+      _type = image_channel_data_type::unsigned_int;
+      _channel_size = 1;
+      break;
+    case sycl::image_channel_type::unsigned_int16:
+      _type = image_channel_data_type::unsigned_int;
+      _channel_size = 2;
+      break;
+    case sycl::image_channel_type::unsigned_int32:
+      _type = image_channel_data_type::unsigned_int;
+      _channel_size = 4;
+      break;
+    case sycl::image_channel_type::signed_int8:
+      _type = image_channel_data_type::signed_int;
+      _channel_size = 1;
+      break;
+    case sycl::image_channel_type::signed_int16:
+      _type = image_channel_data_type::signed_int;
+      _channel_size = 2;
+      break;
+    case sycl::image_channel_type::signed_int32:
+      _type = image_channel_data_type::signed_int;
+      _channel_size = 4;
+      break;
+    case sycl::image_channel_type::fp16:
+      _type = image_channel_data_type::fp;
+      _channel_size = 2;
+      break;
+    case sycl::image_channel_type::fp32:
+      _type = image_channel_data_type::fp;
+      _channel_size = 4;
+      break;
+    default:
+      break;
+    }
+    _total_size = _channel_size * _channel_num;
+  }
+
+  sycl::image_channel_order get_channel_order() const {
+    switch (_channel_num) {
+    case 1:
+      return sycl::image_channel_order::r;
+    case 2:
+      return sycl::image_channel_order::rg;
+    case 3:
+      return sycl::image_channel_order::rgb;
+    case 4:
+      return sycl::image_channel_order::rgba;
+    default:
+      return sycl::image_channel_order::r;
+    }
+  }
+  /// Get the size for each channel in bits.
+  unsigned get_channel_size() const { return _channel_size * 8; }
+
+  /// Set channel size.
+  /// \param in_channel_num Channels number to set.
+  /// \param channel_size Size for each channel in bits.
+  void set_channel_size(unsigned in_channel_num,
+                        unsigned channel_size) {
+    if (in_channel_num < _channel_num)
+      return;
+    _channel_num = in_channel_num;
+    _channel_size = channel_size / 8;
+    _total_size = _channel_size * _channel_num;
+  }
+};
+
+/// 2D or 3D matrix data for image.
+class image_matrix {
+  image_channel _channel;
+  int _range[3] = {1, 1, 1};
+  int _dims = 0;
+  void *_host_data = nullptr;
+
+  /// Set range of each dimension.
+  template <int dimensions> void set_range(sycl::range<dimensions> range) {
+    for (int i = 0; i < dimensions; ++i)
+      _range[i] = range[i];
+    _dims = dimensions;
+  }
+
+  template <int... DimIdx>
+  sycl::range<sizeof...(DimIdx)> get_range(integer_sequence<DimIdx...>) {
+    return sycl::range<sizeof...(DimIdx)>(_range[DimIdx]...);
+  }
+
+public:
+  /// Constructor with channel info and dimension size info.
+  template <int dimensions>
+  image_matrix(image_channel channel, sycl::range<dimensions> range,
+               image_type type = image_type::standard)
+      : _channel(channel) {
+    if (type == image_type::array && range[1] == 0) {
+      range[1] = range[2];
+      range[2] = 0;
+    }
+    set_range(range);
+    _host_data = std::malloc(range.size() * _channel.get_total_size());
+  }
+  image_matrix(sycl::image_channel_type channel_type, unsigned channel_num,
+               size_t x, size_t y) {
+    _channel.set_channel_type(channel_type);
+    _channel.set_channel_num(channel_num);
+    _dims = 1;
+    _range[0] = x;
+    if (y) {
+      _dims = 2;
+      _range[1] = y;
+    }
+    _host_data = std::malloc(_range[0] * _range[1] * _channel.get_total_size());
+  }
+  image_matrix(const image_matrix_desc *desc)
+      : image_matrix(desc->channel_type, desc->num_channels, desc->width,
+                     desc->height) {}
+
+  /// Construct a new image class with the matrix data.
+  template <int dimensions> sycl::image<dimensions> *create_image() {
+    return create_image<dimensions>(_channel);
+  }
+  /// Construct a new image class with the matrix data.
+  template <int dimensions>
+  sycl::image<dimensions> *create_image(image_channel channel) {
+    return new sycl::image<dimensions>(
+        _host_data, channel.get_channel_order(), channel.get_channel_type(),
+        get_range(make_index_sequence<dimensions>()),
+        sycl::property::image::use_host_ptr());
+  }
+
+  /// Get channel info.
+  inline image_channel get_channel() { return _channel; }
+  /// Get range of the image.
+  sycl::range<3> get_range() {
+    return sycl::range<3>(_range[0], _range[1], _range[2]);
+  }
+  /// Get matrix dims.
+  inline int get_dims() { return _dims; }
+  /// Convert to pitched data.
+  pitched_data to_pitched_data() {
+    return pitched_data(_host_data, _range[0] * _channel.get_total_size(),
+                        _range[0], _range[1]);
+  }
+
+  ~image_matrix() {
+    if (_host_data)
+      std::free(_host_data);
+    _host_data = nullptr;
+  }
+};
+using image_matrix_p = image_matrix *;
+
+enum class image_data_type { matrix, linear, pitch, unsupport };
+
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+namespace experimental {
+class image_mem_wrapper;
+}
+#endif
+
+/// Image data info.
+class image_data {
+public:
+  image_data() { _type = image_data_type::unsupport; }
+  image_data(image_matrix_p matrix_data) { set_data(matrix_data); }
+  image_data(void *data_ptr, size_t x_size, image_channel channel) {
+    set_data(data_ptr, x_size, channel);
+  }
+  image_data(void *data_ptr, size_t x_size, size_t y_size, size_t pitch_size,
+             image_channel channel) {
+    set_data(data_ptr, x_size, y_size, pitch_size, channel);
+  }
+  void set_data(image_matrix_p matrix_data) {
+    _type = image_data_type::matrix;
+    _data = matrix_data;
+    _channel = matrix_data->get_channel();
+  }
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+  void set_data(experimental::image_mem_wrapper *image_mem) {
+    _type = image_data_type::matrix;
+    _data = image_mem;
+  }
+#endif
+  void set_data(void *data_ptr, size_t x_size, image_channel channel) {
+    _type = image_data_type::linear;
+    _data = data_ptr;
+    _x = x_size;
+    _channel = channel;
+  }
+  void set_data(void *data_ptr, size_t x_size, size_t y_size, size_t pitch_size,
+                image_channel channel) {
+    _type = image_data_type::pitch;
+    _data = data_ptr;
+    _x = x_size;
+    _y = y_size;
+    _pitch = pitch_size;
+    _channel = channel;
+  }
+
+  image_data_type get_data_type() const { return _type; }
+  void set_data_type(image_data_type type) { _type = type; }
+
+  void *get_data_ptr() const { return _data; }
+  void set_data_ptr(void *data) { _data = data; }
+
+  size_t get_x() const { return _x; }
+  void set_x(size_t x) { _x = x; }
+
+  size_t get_y() const { return _y; }
+  void set_y(size_t y) { _y = y; }
+
+  size_t get_pitch() const { return _pitch; }
+  void set_pitch(size_t pitch) { _pitch = pitch; }
+
+  image_channel get_channel() const { return _channel; }
+  void set_channel(image_channel channel) { _channel = channel; }
+
+  image_channel_data_type get_channel_data_type() {
+    return _channel.get_channel_data_type();
+  }
+  void set_channel_data_type(image_channel_data_type type) {
+    _channel.set_channel_data_type(type);
+  }
+
+  unsigned get_channel_size() { return _channel.get_channel_size(); }
+  void set_channel_size(unsigned channel_num, unsigned channel_size) {
+    return _channel.set_channel_size(channel_num, channel_size);
+  }
+
+  unsigned get_channel_num() { return _channel.get_channel_num(); }
+  void set_channel_num(unsigned num) {
+    return _channel.set_channel_num(num);
+  }
+
+  sycl::image_channel_type get_channel_type() {
+    return _channel.get_channel_type();
+  }
+  void set_channel_type(sycl::image_channel_type type) {
+    return _channel.set_channel_type(type);
+  }
+
+private:
+  image_data_type _type;
+  void *_data = nullptr;
+  size_t _x, _y, _pitch;
+  image_channel _channel;
+};
+
+/// Image sampling info, include addressing mode, filtering mode and
+/// normalization info.
+class sampling_info {
+  sycl::addressing_mode _addressing_mode =
+      sycl::addressing_mode::clamp_to_edge;
+  sycl::filtering_mode _filtering_mode = sycl::filtering_mode::nearest;
+  sycl::coordinate_normalization_mode _coordinate_normalization_mode =
+      sycl::coordinate_normalization_mode::unnormalized;
+  // Dictates the method in which sampling between mipmap levels is performed.
+  sycl::filtering_mode _mipmap_filtering = sycl::filtering_mode::nearest;
+  // Defines the minimum mipmap level from which we can sample, with the minimum
+  // value being 0.
+  float _min_mipmap_level_clamp = 0.f;
+  // Defines the maximum mipmap level from which we can sample. This value
+  // cannot be higher than the number of allocated levels.
+  float _max_mipmap_level_clamp = 0.f;
+  // Dictates the anisotropic ratio used when sampling the mipmap with
+  // anisotropic filtering.
+  float _max_anisotropy = 0.f;
+
+public:
+  sycl::addressing_mode get_addressing_mode() const noexcept {
+    // Make sure the return value is legal addressing_mode when using memset.
+    if ((unsigned)_addressing_mode == 0)
+      return sycl::addressing_mode::clamp_to_edge;
+    return _addressing_mode;
+  }
+  void set(sycl::addressing_mode addressing_mode) noexcept {
+    _addressing_mode = addressing_mode;
+  }
+
+  sycl::filtering_mode get_filtering_mode() const noexcept {
+    // Make sure the return value is legal filtering_mode when using memset.
+    return _filtering_mode == sycl::filtering_mode::linear
+               ? sycl::filtering_mode::linear
+               : sycl::filtering_mode::nearest;
+  }
+  void set(sycl::filtering_mode filtering_mode) noexcept {
+    _filtering_mode = filtering_mode;
+  }
+
+  sycl::coordinate_normalization_mode
+  get_coordinate_normalization_mode() const noexcept {
+    return _coordinate_normalization_mode;
+  }
+  void set(sycl::coordinate_normalization_mode
+               coordinate_normalization_mode) noexcept {
+    _coordinate_normalization_mode = coordinate_normalization_mode;
+  }
+
+  bool is_coordinate_normalized() const noexcept {
+    return _coordinate_normalization_mode ==
+           sycl::coordinate_normalization_mode::normalized;
+  }
+  void set_coordinate_normalization_mode(int is_normalized) noexcept {
+    _coordinate_normalization_mode =
+        is_normalized ? sycl::coordinate_normalization_mode::normalized
+                      : sycl::coordinate_normalization_mode::unnormalized;
+  }
+
+  /// Get the method in which sampling between mipmap levels is performed.
+  /// \returns The method in which sampling between mipmap levels is performed.
+  sycl::filtering_mode get_mipmap_filtering() const noexcept {
+    // Make sure the return value is legal filtering_mode when using memset.
+    return _mipmap_filtering == sycl::filtering_mode::linear
+               ? sycl::filtering_mode::linear
+               : sycl::filtering_mode::nearest;
+  }
+  /// Set the method in which sampling between mipmap levels is performed.
+  /// \param [in] filtering_mode The method in which sampling between mipmap
+  /// levels is performed.
+  void set_mipmap_filtering(sycl::filtering_mode filtering_mode) noexcept {
+    _mipmap_filtering = filtering_mode;
+  }
+
+  /// Get the minimum mipmap level from which we can sample
+  /// \returns The minimum mipmap level from which we can sample.
+  float get_min_mipmap_level_clamp() const noexcept {
+    return _min_mipmap_level_clamp;
+  }
+  /// Set the minimum mipmap level from which we can sample
+  /// \param [in] min_mipmap_level_clamp The minimum mipmap level from which we
+  /// can sample.
+  void set_min_mipmap_level_clamp(float min_mipmap_level_clamp) noexcept {
+    _min_mipmap_level_clamp = min_mipmap_level_clamp;
+  }
+
+  /// Get the maximum mipmap level from which we can sample.
+  /// \returns The maximum mipmap level from which we can sample.
+  float get_max_mipmap_level_clamp() const noexcept {
+    return _max_mipmap_level_clamp;
+  }
+  /// Set the maximum mipmap level from which we can sample.
+  /// \param [in] max_mipmap_level_clamp The maximum mipmap level from which we
+  /// can sample.
+  void set_max_mipmap_level_clamp(float max_mipmap_level_clamp) noexcept {
+    _max_mipmap_level_clamp = max_mipmap_level_clamp;
+  }
+
+  /// Get the anisotropic ratio used when sampling the mipmap with
+  // anisotropic filtering.
+  /// \returns The anisotropic ratio used when sampling the mipmap with
+  // anisotropic filtering.
+  float get_max_anisotropy() const noexcept { return _max_anisotropy; }
+  /// Set the anisotropic ratio used when sampling the mipmap with
+  // anisotropic filtering.
+  /// \param [in] max_anisotropy The anisotropic ratio used when sampling the
+  /// mipmap with anisotropic filtering.
+  void set_max_anisotropy(float max_anisotropy) noexcept {
+    _max_anisotropy = max_anisotropy;
+  }
+
+  void set(sycl::addressing_mode addressing_mode,
+           sycl::filtering_mode filtering_mode,
+           sycl::coordinate_normalization_mode
+               coordinate_normalization_mode) noexcept {
+    set(addressing_mode);
+    set(filtering_mode);
+    set(coordinate_normalization_mode);
+  }
+  void set(sycl::addressing_mode addressing_mode,
+           sycl::filtering_mode filtering_mode, int is_normalized) noexcept {
+    set(addressing_mode);
+    set(filtering_mode);
+    set_coordinate_normalization_mode(is_normalized);
+  }
+
+  sycl::sampler get_sampler() const {
+    return sycl::sampler(_coordinate_normalization_mode, _addressing_mode,
+                         _filtering_mode);
+  }
+};
+
+/// Image base class.
+class image_wrapper_base {
+  sampling_info _sampling_info;
+  image_data _data;
+
+public:
+  virtual ~image_wrapper_base() = 0;
+
+  void attach(image_data data) { set_data(data); }
+  /// Attach matrix data to this class.
+  void attach(image_matrix *matrix) {
+    detach();
+    image_wrapper_base::set_data(image_data(matrix));
+  }
+  /// Attach matrix data to this class.
+  void attach(image_matrix *matrix, image_channel channel) {
+    attach(matrix);
+    image_wrapper_base::set_channel(channel);
+  }
+  /// Attach linear data to this class.
+  void attach(const void *ptr, size_t count) {
+    attach(ptr, count, get_channel());
+  }
+  /// Attach linear data to this class.
+  void attach(const void *ptr, size_t count, image_channel channel) {
+    detach();
+    image_wrapper_base::set_data(image_data(const_cast<void *>(ptr), count, channel));
+  }
+  /// Attach 2D data to this class.
+  void attach(const void *data, size_t x, size_t y, size_t pitch) {
+    attach(data, x, y, pitch, get_channel());
+  }
+  /// Attach 2D data to this class.
+  void attach(const void *data, size_t x, size_t y, size_t pitch,
+              image_channel channel) {
+    detach();
+    image_wrapper_base::set_data(
+        image_data(const_cast<void *>(data), x, y, pitch, channel));
+  }
+  /// Attach device_ptr data to this class.
+  void attach(const image_matrix_desc *desc, device_ptr ptr, size_t pitch) {
+    detach();
+    image_channel channel;
+    channel.set_channel_num(desc->num_channels);
+    channel.set_channel_type(desc->channel_type);
+    image_wrapper_base::set_data(
+        image_data(ptr, desc->width, desc->height, pitch, channel));
+  }
+  /// Detach data.
+  virtual void detach() {}
+
+  sampling_info get_sampling_info() { return _sampling_info; }
+  void set_sampling_info(sampling_info info) {
+    _sampling_info = info;
+  }
+  const image_data &get_data() { return _data; }
+  void set_data(image_data data) { _data = data; }
+
+  image_channel get_channel() { return _data.get_channel(); }
+  void set_channel(image_channel channel) { _data.set_channel(channel); }
+
+  image_channel_data_type get_channel_data_type() {
+    return _data.get_channel_data_type();
+  }
+  void set_channel_data_type(image_channel_data_type type) {
+    _data.set_channel_data_type(type);
+  }
+
+  unsigned get_channel_size() { return _data.get_channel_size(); }
+  void set_channel_size(unsigned channel_num, unsigned channel_size) {
+    return _data.set_channel_size(channel_num, channel_size);
+  }
+
+  sycl::addressing_mode get_addressing_mode() {
+    return _sampling_info.get_addressing_mode();
+  }
+  void set(sycl::addressing_mode addressing_mode) {
+    _sampling_info.set(addressing_mode);
+  }
+
+  sycl::filtering_mode get_filtering_mode() {
+    return _sampling_info.get_filtering_mode();
+  }
+  void set(sycl::filtering_mode filtering_mode) {
+    _sampling_info.set(filtering_mode);
+  }
+
+  sycl::coordinate_normalization_mode get_coordinate_normalization_mode() {
+    return _sampling_info.get_coordinate_normalization_mode();
+  }
+  void
+  set(sycl::coordinate_normalization_mode coordinate_normalization_mode) {
+    _sampling_info.set(coordinate_normalization_mode);
+  }
+
+  bool is_coordinate_normalized() {
+    return _sampling_info.is_coordinate_normalized();
+  }
+  void set_coordinate_normalization_mode(int is_normalized) {
+    _sampling_info.set_coordinate_normalization_mode(is_normalized);
+  }
+  void
+  set(sycl::addressing_mode addressing_mode,
+      sycl::filtering_mode filtering_mode,
+      sycl::coordinate_normalization_mode coordinate_normalization_mode) {
+    set(addressing_mode);
+    set(filtering_mode);
+    set(coordinate_normalization_mode);
+  }
+  void set(sycl::addressing_mode addressing_mode,
+           sycl::filtering_mode filtering_mode, int is_normalized) {
+    set(addressing_mode);
+    set(filtering_mode);
+    set_coordinate_normalization_mode(is_normalized);
+  }
+
+  unsigned get_channel_num() { return _data.get_channel_num(); }
+  void set_channel_num(unsigned num) {
+    return _data.set_channel_num(num);
+  }
+
+  sycl::image_channel_type get_channel_type() {
+    return _data.get_channel_type();
+  }
+  void set_channel_type(sycl::image_channel_type type) {
+    return _data.set_channel_type(type);
+  }
+
+  sycl::sampler get_sampler() {
+    sycl::sampler smp = _sampling_info.get_sampler();
+    /// linear memory only used for sycl::filtering_mode::nearest.
+    if (_data.get_data_type() == image_data_type::linear) {
+      smp = sycl::sampler(smp.get_coordinate_normalization_mode(),
+                          smp.get_addressing_mode(),
+                          sycl::filtering_mode::nearest);
+    }
+    return smp;
+  }
+};
+inline image_wrapper_base::~image_wrapper_base() {}
+using image_wrapper_base_p = image_wrapper_base *;
+
+template <class T, int dimensions, bool IsImageArray> class image_accessor_ext;
+
+/// Image class, wrapper of sycl::image.
+template <class T, int dimensions, bool IsImageArray = false> class image_wrapper : public image_wrapper_base {
+  sycl::image<dimensions> *_image = nullptr;
+
+#ifndef DPCT_USM_LEVEL_NONE
+  std::vector<char> _host_buffer;
+#endif
+
+public:
+  void create_image(sycl::queue &q = get_default_queue()) {
+    if (_image)
+      return;
+    auto &data = get_data();
+    if (data.get_data_type() == image_data_type::matrix) {
+      _image = static_cast<image_matrix_p>(data.get_data_ptr())
+          ->create_image<dimensions>(data.get_channel());
+      return;
+    }
+    auto ptr = data.get_data_ptr();
+    auto channel = data.get_channel();
+
+    if (detail::get_pointer_attribute(q, ptr) == detail::pointer_access_attribute::device_only) {
+#ifdef DPCT_USM_LEVEL_NONE
+      ptr = get_buffer(ptr).get_host_access().get_pointer();
+#else
+      auto sz = data.get_x();
+      if (data.get_data_type() == image_data_type::pitch)
+        sz *= channel.get_total_size() * data.get_y();
+      _host_buffer.resize(sz);
+      q.memcpy(_host_buffer.data(), ptr, sz);
+      ptr = _host_buffer.data();
+#endif
+    }
+
+    if constexpr (dimensions == 1) {
+      assert(data.get_data_type() == image_data_type::linear);
+      _image = new sycl::image<1>(
+        ptr, channel.get_channel_order(), channel.get_channel_type(),
+        sycl::range<1>(data.get_x() / channel.get_total_size()));
+    } else if constexpr (dimensions == 2) {
+      assert(data.get_data_type() == image_data_type::pitch);
+      _image = new sycl::image<2>(ptr, channel.get_channel_order(),
+                                  channel.get_channel_type(),
+                                  sycl::range<2>(data.get_x(), data.get_y()),
+                                  sycl::range<1>(data.get_pitch()));
+    } else {
+      throw std::runtime_error("3D image only support matrix data");
+    }
+    return;
+  }
+
+  using acc_data_t = typename detail::image_trait<T>::acc_data_t;
+  using accessor_t =
+      typename image_accessor_ext<T, IsImageArray ? (dimensions - 1) : dimensions,
+                              IsImageArray>::accessor_t;
+
+  image_wrapper() { set_channel(image_channel::create<T>()); }
+  ~image_wrapper() override { detach(); }
+
+  /// Get image accessor.
+  accessor_t get_access(sycl::handler &cgh) {
+    assert(_image != nullptr && "Image not created");
+    return accessor_t(*_image, cgh);
+  }
+
+  /// Detach data.
+  void detach() override {
+    if (_image)
+      delete _image;
+    _image = nullptr;
+  }
+};
+
+/// Wrap sampler and image accessor together.
+template <class T, int dimensions, bool IsImageArray = false>
+class image_accessor_ext {
+public:
+  using accessor_t =
+      typename detail::image_trait<T>::template accessor_t<dimensions>;
+  using data_t = typename detail::image_trait<T>::data_t;
+  sycl::sampler _sampler;
+  accessor_t _img_acc;
+
+public:
+  image_accessor_ext(sycl::sampler sampler, accessor_t acc)
+      : _sampler(sampler), _img_acc(acc) {}
+
+  /// Read data from accessor.
+  template <bool Available = dimensions == 3>
+  typename std::enable_if<Available, data_t>::type read(float x, float y,
+                                                        float z) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::float4(x, y, z, 0), _sampler));
+  }
+  /// Read data from accessor.
+  template <class Coord0, class Coord1, class Coord2,
+            bool Available = dimensions == 3 &&
+                             std::is_integral<Coord0>::value
+                                 &&std::is_integral<Coord1>::value
+                                     &&std::is_integral<Coord2>::value>
+  typename std::enable_if<Available, data_t>::type read(Coord0 x, Coord1 y,
+                                                        Coord2 z) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::int4(x, y, z, 0), _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 2>
+  typename std::enable_if<Available, data_t>::type read(float x, float y) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::float2(x, y), _sampler));
+  }
+  /// Read data from accessor.
+  template <class Coord0, class Coord1,
+            bool Available = dimensions == 2 &&
+                             std::is_integral<Coord0>::value
+                                 &&std::is_integral<Coord1>::value>
+  typename std::enable_if<Available, data_t>::type read(Coord0 x, Coord1 y) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::int2(x, y), _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 1>
+  typename std::enable_if<Available, data_t>::type read(float x) {
+    return detail::fetch_data<T>()(_img_acc.read(x, _sampler));
+  }
+  /// Read data from accessor.
+  template <class CoordT,
+            bool Available = dimensions == 1 && std::is_integral<CoordT>::value>
+  typename std::enable_if<Available, data_t>::type read(CoordT x) {
+    return detail::fetch_data<T>()(_img_acc.read(x, _sampler));
+  }
+
+  /// Read data from accessor.
+  template <bool Available = dimensions == 3>
+  typename std::enable_if<Available, data_t>::type read_byte(float x, float y,
+                                                             float z) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::float4(x / sizeof(T), y, z, 0), _sampler));
+  }
+  /// Read data from accessor.
+  template <class Coord0, class Coord1, class Coord2,
+            bool Available = dimensions == 3 &&
+                             std::is_integral<Coord0>::value
+                                 &&std::is_integral<Coord1>::value
+                                     &&std::is_integral<Coord2>::value>
+  typename std::enable_if<Available, data_t>::type read_byte(Coord0 x, Coord1 y,
+                                                             Coord2 z) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::int4(x / sizeof(T), y, z, 0), _sampler));
+  }
+
+  /// Read data from accessor.
+  template <class Coord0, class Coord1,
+            bool Available = dimensions == 2 &&
+                             std::is_integral<Coord0>::value
+                                 &&std::is_integral<Coord1>::value>
+  typename std::enable_if<Available, data_t>::type read_byte(Coord0 x,
+                                                             Coord1 y) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::int2(x / sizeof(T), y), _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 2>
+  typename std::enable_if<Available, data_t>::type read_byte(float x, float y) {
+    return detail::fetch_data<T>()(
+        _img_acc.read(sycl::float2(x / sizeof(T), y), _sampler));
+  }
+  /// Read data from accessor.
+  template <class CoordT,
+            bool Available = dimensions == 1 && std::is_integral<CoordT>::value>
+  typename std::enable_if<Available, data_t>::type read_byte(CoordT x) {
+    return detail::fetch_data<T>()(_img_acc.read(x / sizeof(T), _sampler));
+  }
+
+  /// Read data from accessor.
+  template <bool Available = dimensions == 1>
+  typename std::enable_if<Available, data_t>::type read_byte(float x) {
+    return detail::fetch_data<T>()(_img_acc.read(x / sizeof(T), _sampler));
+  }
+};
+
+template <class T, int dimensions> class image_accessor_ext<T, dimensions, true> {
+public:
+  using accessor_t =
+      typename detail::image_trait<T>::template array_accessor_t<dimensions>;
+  using data_t = typename detail::image_trait<T>::data_t;
+  sycl::sampler _sampler;
+  accessor_t _img_acc;
+
+public:
+  image_accessor_ext(sycl::sampler sampler, accessor_t acc)
+      : _sampler(sampler), _img_acc(acc) {}
+
+  /// Read data from accessor.
+  template <bool Available = dimensions == 2>
+  typename std::enable_if<Available, data_t>::type read(int index, float x,
+                                                        float y) {
+    return detail::fetch_data<T>()(
+        _img_acc[index].read(sycl::float2(x, y), _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 2>
+  typename std::enable_if<Available, data_t>::type read(int index, int x, int y) {
+    return detail::fetch_data<T>()(
+        _img_acc[index].read(sycl::int2(x, y), _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 1>
+  typename std::enable_if<Available, data_t>::type read(int index, float x) {
+    return detail::fetch_data<T>()(
+        _img_acc[index].read(x, _sampler));
+  }
+  /// Read data from accessor.
+  template <bool Available = dimensions == 1>
+  typename std::enable_if<Available, data_t>::type read(int index, int x) {
+    return detail::fetch_data<T>()(
+        _img_acc[index].read(x, _sampler));
+  }
+};
+
+/// Create image wrapper according to image data and sampling info.
+/// \return Pointer to image wrapper base class.
+/// \param data Image data used to create image wrapper.
+/// \param info Image sampling info used to create image wrapper.
+/// \returns Pointer to base class of created image wrapper object.
+static inline image_wrapper_base *create_image_wrapper(image_data data,
+                              sampling_info info = {}) {
+  image_channel channel;
+  int dims = 1;
+  if (data.get_data_type() == image_data_type::matrix) {
+    auto matrix = (image_matrix_p)data.get_data_ptr();
+    channel = matrix->get_channel();
+    dims = matrix->get_dims();
+  } else {
+    if (data.get_data_type() == image_data_type::pitch) {
+      dims = 2;
+    }
+    channel = data.get_channel();
+  }
+
+  if (auto ret = detail::create_image_wrapper(channel, dims)) {
+    ret->set_sampling_info(info);
+    ret->set_data(data);
+    return ret;
+  }
+  return nullptr;
+}
+
+namespace detail {
+static inline pitched_data to_pitched_data(image_matrix *image) {
+  return image->to_pitched_data();
+}
+
+/// Create image according with given type \p T and \p dims.
+template <class T> static image_wrapper_base *create_image_wrapper(int dims) {
+  switch (dims) {
+  case 1:
+    return new image_wrapper<T, 1>();
+  case 2:
+    return new image_wrapper<T, 2>();
+  case 3:
+    return new image_wrapper<T, 3>();
+  default:
+    return nullptr;
+  }
+}
+/// Create image with given data type \p T, channel order and dims
+template <class T>
+static image_wrapper_base *create_image_wrapper(unsigned channel_num, int dims) {
+  switch (channel_num) {
+  case 1:
+    return create_image_wrapper<T>(dims);
+  case 2:
+    return create_image_wrapper<sycl::vec<T, 2>>(dims);
+  case 3:
+    return create_image_wrapper<sycl::vec<T, 3>>(dims);
+  case 4:
+    return create_image_wrapper<sycl::vec<T, 4>>(dims);
+  default:
+    return nullptr;
+  }
+}
+
+/// Create image with channel info and specified dimensions.
+static image_wrapper_base *create_image_wrapper(image_channel channel, int dims) {
+  switch (channel.get_channel_type()) {
+  case sycl::image_channel_type::fp16:
+    return create_image_wrapper<sycl::half>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::fp32:
+    return create_image_wrapper<float>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::signed_int8:
+    return create_image_wrapper<std::int8_t>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::signed_int16:
+    return create_image_wrapper<std::int16_t>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::signed_int32:
+    return create_image_wrapper<std::int32_t>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::unsigned_int8:
+    return create_image_wrapper<std::uint8_t>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::unsigned_int16:
+    return create_image_wrapper<std::uint16_t>(channel.get_channel_num(), dims);
+  case sycl::image_channel_type::unsigned_int32:
+    return create_image_wrapper<std::uint32_t>(channel.get_channel_num(), dims);
+  default:
+    return nullptr;
+  }
+}
+} // namespace detail
+
+} // namespace dpct
+
+#endif // !__DPCT_IMAGE_HPP__
diff --git a/sycl/include/dpct/kernel.hpp b/sycl/include/dpct/kernel.hpp
new file mode 100644
index 00000000000..0e214aee349
--- /dev/null
+++ b/sycl/include/dpct/kernel.hpp
@@ -0,0 +1,632 @@
+//==---- kernel.hpp -------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_KERNEL_HPP__
+#define __DPCT_KERNEL_HPP__
+
+#include <cstdint>
+#include <sycl/sycl.hpp>
+#ifdef _WIN32
+#include <unordered_set>
+#include <windows.h>
+#else
+#include <dlfcn.h>
+#endif
+
+#if defined(__has_include) && __has_include(<filesystem>)
+#include <filesystem>
+#elif defined(__has_include) && __has_include(<experimental/filesystem>)
+#include <experimental/filesystem>
+#else
+#error "SYCLomatic runtime requires C++ filesystem support"
+#endif
+
+#include "image.hpp"
+#include <fstream>
+#include <mutex>
+#include <random>
+
+namespace dpct {
+
+typedef void (*kernel_functor)(sycl::queue &, const sycl::nd_range<3> &,
+                               unsigned int, void **, void **);
+
+typedef void (*host_func)(void *);
+
+struct kernel_function_info {
+  int max_work_group_size = 0;
+  int shared_size_bytes = 0;
+  int local_size_bytes = 0;
+  int const_size_bytes = 0;
+  int num_regs = 0;
+};
+
+static inline void get_kernel_function_info(kernel_function_info *kernel_info,
+                                            const void *function) {
+  kernel_info->max_work_group_size =
+      dpct::dev_mgr::instance()
+          .current_device()
+          .get_info<sycl::info::device::max_work_group_size>();
+}
+static inline kernel_function_info
+get_kernel_function_info(const void *function) {
+  kernel_function_info kernel_info;
+  kernel_info.max_work_group_size =
+      dpct::dev_mgr::instance()
+          .current_device()
+          .get_info<sycl::info::device::max_work_group_size>();
+  return kernel_info;
+}
+
+
+namespace detail {
+
+#if defined(__has_include) && __has_include(<filesystem>)
+namespace fs = std::filesystem;
+#else
+namespace fs = std::experimental::filesystem;
+#endif
+
+/// Write data to temporary file and return absolute path to temporary file.
+/// Temporary file is created in a temporary directory both of which have random
+/// names with only the user having access permissions.  Only one temporary file
+/// will be created in the temporary directory.
+static inline fs::path write_data_to_file(char const *const data, size_t size) {
+  std::error_code ec;
+
+  if (sizeof(size_t) >= sizeof(std::streamsize) &&
+      size > (std::numeric_limits<std::streamsize>::max)())
+    throw std::runtime_error("data file too large");
+
+  // random number generator
+  std::random_device dev;
+  std::mt19937 prng(dev());
+  std::uniform_int_distribution<uint64_t> rand(0);
+
+  // find temporary directory
+  auto tmp_dir = fs::temp_directory_path(ec);
+  if (ec)
+    throw std::runtime_error("could not find temporary directory");
+
+  // create private directory
+  std::stringstream directory;
+  fs::path directory_path;
+  constexpr int max_attempts = 5;
+  int i;
+
+  for (i = 0; i < max_attempts; i++) {
+    directory << std::hex << rand(prng);
+    directory_path = tmp_dir / directory.str();
+    if (fs::create_directory(directory_path)) {
+      break;
+    }
+  }
+  if (i == max_attempts)
+    throw std::runtime_error("could not create directory");
+
+  // only allow owner permissions to private directory
+  fs::permissions(directory_path, fs::perms::owner_all, ec);
+  if (ec)
+    throw std::runtime_error("could not set directory permissions");
+
+  // random filename in private directory
+  std::stringstream filename;
+  filename << std::hex << rand(prng);
+#ifdef _WIN32
+  auto filepath = directory_path / (filename.str() + ".dll");
+#else
+  auto filepath = directory_path / filename.str();
+#endif
+
+  // write data to temporary file
+  auto outfile = std::ofstream(filepath, std::ios::out | std::ios::binary);
+  if (outfile) {
+    // only allow program to write file
+    fs::permissions(filepath, fs::perms::owner_write, ec);
+    if (ec)
+      throw std::runtime_error("could not set permissions");
+
+    outfile.write(data, size);
+    if (!outfile.good())
+      throw std::runtime_error("could not write data");
+    outfile.close();
+
+    // only allow program to read/execute file
+    fs::permissions(filepath, fs::perms::owner_read | fs::perms::owner_exec,
+                    ec);
+    if (ec)
+      throw std::runtime_error("could not set permissions");
+  } else
+    throw std::runtime_error("could not write data");
+
+  // check temporary file contents
+  auto infile = std::ifstream(filepath, std::ios::in | std::ios::binary);
+  if (infile) {
+    bool mismatch = false;
+    size_t cnt = 0;
+
+    while (1) {
+      char c;
+      infile.get(c);
+      if (infile.eof())
+        break;
+      if (c != data[cnt++])
+        mismatch = true;
+    }
+    if (cnt != size || mismatch)
+      throw std::runtime_error("file contents not written correctly");
+  } else
+    throw std::runtime_error("could not validate file");
+
+  if (!filepath.is_absolute())
+    throw std::runtime_error("temporary filepath is not absolute");
+
+  return filepath;
+}
+
+static inline uint16_t extract16(unsigned char const *const ptr) {
+  uint16_t ret = 0;
+
+  ret |= static_cast<uint16_t>(ptr[0]) << 0;
+  ret |= static_cast<uint16_t>(ptr[1]) << 8;
+
+  return (ret);
+}
+
+static inline uint32_t extract32(unsigned char const *const ptr) {
+  uint32_t ret = 0;
+
+  ret |= static_cast<uint32_t>(ptr[0]) << 0;
+  ret |= static_cast<uint32_t>(ptr[1]) << 8;
+  ret |= static_cast<uint32_t>(ptr[2]) << 16;
+  ret |= static_cast<uint32_t>(ptr[3]) << 24;
+
+  return (ret);
+}
+
+static inline uint64_t extract64(unsigned char const *const ptr) {
+  uint64_t ret = 0;
+
+  ret |= static_cast<uint64_t>(ptr[0]) << 0;
+  ret |= static_cast<uint64_t>(ptr[1]) << 8;
+  ret |= static_cast<uint64_t>(ptr[2]) << 16;
+  ret |= static_cast<uint64_t>(ptr[3]) << 24;
+  ret |= static_cast<uint64_t>(ptr[4]) << 32;
+  ret |= static_cast<uint64_t>(ptr[5]) << 40;
+  ret |= static_cast<uint64_t>(ptr[6]) << 48;
+  ret |= static_cast<uint64_t>(ptr[7]) << 56;
+
+  return (ret);
+}
+
+static inline uint64_t get_lib_size(char const *const blob) {
+#ifdef _WIN32
+  ///////////////////////////////////////////////////////////////////////
+  // Analyze DOS stub
+  unsigned char const *const ublob =
+      reinterpret_cast<unsigned char const *const>(blob);
+  if (ublob[0] != 0x4d || ublob[1] != 0x5a) {
+    throw std::runtime_error("Blob is not a Windows DLL.");
+  }
+  uint32_t pe_header_offset = extract32(ublob + 0x3c);
+
+  ///////////////////////////////////////////////////////////////////////
+  // Ananlyze PE-header
+  unsigned char const *const pe_header = ublob + pe_header_offset;
+
+  // signature
+  uint32_t pe_signature = extract32(pe_header + 0);
+  if (pe_signature != 0x00004550) {
+    throw std::runtime_error("PE-header signature is not 0x00004550");
+  }
+
+  // machine
+  uint16_t machine = extract16(pe_header + 4);
+  if (machine != 0x8664) {
+    throw std::runtime_error("Only DLLs for x64 supported");
+  }
+
+  // number of sections
+  uint16_t number_of_sections = extract16(pe_header + 6);
+
+  // sizeof optional header
+  uint16_t sizeof_optional_header = extract16(pe_header + 20);
+
+  // magic
+  uint16_t magic = extract16(pe_header + 24);
+  if (magic != 0x10b && magic != 0x20b) {
+    throw std::runtime_error("MAGIC is not 0x010b or 0x020b");
+  }
+
+  ///////////////////////////////////////////////////////////////////////
+  // Analyze tail of optional header
+  constexpr int coff_header_size = 24;
+
+  unsigned char const *const tail_of_optional_header =
+      pe_header + coff_header_size + sizeof_optional_header;
+  if (extract64(tail_of_optional_header - 8) != 0) {
+    throw std::runtime_error("Optional header not zero-padded");
+  }
+
+  ///////////////////////////////////////////////////////////////////////
+  // Analyze last section header
+  constexpr int section_header_size = 40;
+  unsigned char const *const last_section_header =
+      tail_of_optional_header + section_header_size * (number_of_sections - 1);
+
+  uint32_t sizeof_raw_data = extract32(last_section_header + 16);
+  uint32_t pointer_to_raw_data = extract32(last_section_header + 20);
+
+  return sizeof_raw_data + pointer_to_raw_data;
+#else
+  if (blob[0] != 0x7F || blob[1] != 'E' || blob[2] != 'L' || blob[3] != 'F')
+    throw std::runtime_error("Blob is not in ELF format");
+
+  if (blob[4] != 0x02)
+    throw std::runtime_error("Only 64-bit headers are supported");
+
+  if (blob[5] != 0x01)
+    throw std::runtime_error("Only little-endian headers are supported");
+
+  unsigned char const *const ublob =
+      reinterpret_cast<unsigned char const *const>(blob);
+  uint64_t e_shoff = extract64(ublob + 0x28);
+  uint16_t e_shentsize = extract16(ublob + 0x3A);
+  uint16_t e_shnum = extract16(ublob + 0x3C);
+
+  return e_shoff + (e_shentsize * e_shnum);
+#endif
+}
+
+#ifdef _WIN32
+class path_lib_record {
+public:
+  void operator=(const path_lib_record &) = delete;
+  ~path_lib_record() {
+    for (auto entry : lib_to_path) {
+      FreeLibrary(static_cast<HMODULE>(entry.first));
+      fs::permissions(entry.second, fs::perms::owner_all);
+      fs::remove_all(entry.second.remove_filename());
+    }
+  }
+  static void record_lib_path(fs::path path, void *library) {
+    lib_to_path[library] = path;
+  }
+  static void remove_lib(void *library) {
+    auto path = lib_to_path[library];
+    std::error_code ec;
+
+    FreeLibrary(static_cast<HMODULE>(library));
+    fs::permissions(path, fs::perms::owner_all);
+    if (fs::remove_all(path.remove_filename(), ec) != 2 || ec)
+      // one directory and one temporary file should have been deleted
+      throw std::runtime_error("Directory delete failed");
+
+    lib_to_path.erase(library);
+  }
+
+private:
+  static inline std::unordered_map<void *, fs::path> lib_to_path;
+};
+#endif
+
+} // namespace detail
+
+class kernel_library {
+public:
+  constexpr kernel_library() : ptr{nullptr} {}
+  constexpr kernel_library(void *ptr) : ptr{ptr} {}
+  kernel_library(uint64_t addr) : ptr(reinterpret_cast<void *>(addr)) {}
+
+  operator void *() const { return ptr; }
+  explicit operator uint64_t() const { return reinterpret_cast<uint64_t>(ptr); }
+
+private:
+  void *ptr;
+#ifdef _WIN32
+  static inline detail::path_lib_record single_instance_to_trigger_destructor;
+#endif
+};
+
+namespace detail {
+
+static inline kernel_library load_dl_from_data(char const *const data,
+                                               size_t size) {
+  fs::path filename = write_data_to_file(data, size);
+#ifdef _WIN32
+  void *so = LoadLibraryW(filename.wstring().c_str());
+#else
+  void *so = dlopen(filename.c_str(), RTLD_LAZY);
+#endif
+  if (so == nullptr)
+    throw std::runtime_error("Failed to load kernel library");
+
+#ifdef _WIN32
+  detail::path_lib_record::record_lib_path(filename, so);
+#else
+  std::error_code ec;
+
+  // Windows DLL cannot be deleted while in use
+  if (fs::remove_all(filename.remove_filename(), ec) != 2 || ec)
+    // one directory and one temporary file should have been deleted
+    throw std::runtime_error("Directory delete failed");
+#endif
+
+  return so;
+}
+
+} // namespace detail
+
+/// Load kernel library and return a handle to use the library.
+/// \param [in] name The name of the library.
+static inline kernel_library load_kernel_library(const std::string &name) {
+  std::ifstream ifs;
+  ifs.open(name, std::ios::in | std::ios::binary);
+
+  std::stringstream buffer;
+  buffer << ifs.rdbuf();
+
+  const std::string buffer_string = buffer.str();
+  return detail::load_dl_from_data(buffer_string.c_str(), buffer_string.size());
+}
+
+/// Load kernel library whose image is alreay in memory and return a handle to
+/// use the library.
+/// \param [in] image A pointer to the image in memory.
+static inline kernel_library load_kernel_library_mem(char const *const image) {
+  const size_t size = detail::get_lib_size(image);
+
+  return detail::load_dl_from_data(image, size);
+}
+
+/// Unload kernel library.
+/// \param [in,out] library Handle to the library to be closed.
+static inline void unload_kernel_library(const kernel_library &library) {
+#ifdef _WIN32
+  detail::path_lib_record::remove_lib(library);
+#else
+  dlclose(library);
+#endif
+}
+
+class kernel_function {
+public:
+  constexpr kernel_function() : ptr{nullptr} {}
+  constexpr kernel_function(dpct::kernel_functor ptr) : ptr{ptr} {}
+  kernel_function(uint64_t addr)
+      : ptr(reinterpret_cast<dpct::kernel_functor>(addr)) {}
+
+  operator void *() const { return ((void *)ptr); }
+
+  void operator()(sycl::queue &q, const sycl::nd_range<3> &range,
+                  unsigned int a, void **args, void **extra) const {
+    ptr(q, range, a, args, extra);
+  }
+
+  explicit operator uint64_t() const { return reinterpret_cast<uint64_t>(ptr); }
+
+private:
+  dpct::kernel_functor ptr;
+};
+
+/// Find kernel function in a kernel library and return its address.
+/// \param [in] library Handle to the kernel library.
+/// \param [in] name Name of the kernel function.
+static inline dpct::kernel_function
+get_kernel_function(const kernel_library &library, const std::string &name) {
+#ifdef _WIN32
+  dpct::kernel_functor fn = reinterpret_cast<dpct::kernel_functor>(
+      GetProcAddress(static_cast<HMODULE>(static_cast<void *>(library)),
+                     (name + std::string("_wrapper")).c_str()));
+#else
+  dpct::kernel_functor fn = reinterpret_cast<dpct::kernel_functor>(
+      dlsym(library, (name + std::string("_wrapper")).c_str()));
+#endif
+  if (fn == nullptr)
+    throw std::runtime_error("Failed to get function");
+  return fn;
+}
+
+/// Invoke a kernel function.
+/// \param [in] function kernel function.
+/// \param [in] queue SYCL queue used to execute kernel
+/// \param [in] groupRange SYCL group range
+/// \param [in] localRange SYCL local range
+/// \param [in] localMemSize The size of local memory required by the kernel
+///             function.
+/// \param [in] kernelParams Array of pointers to kernel arguments.
+/// \param [in] extra Extra arguments.
+static inline void invoke_kernel_function(const dpct::kernel_function &function,
+                                          sycl::queue &queue,
+                                          sycl::range<3> groupRange,
+                                          sycl::range<3> localRange,
+                                          unsigned int localMemSize,
+                                          void **kernelParams, void **extra) {
+  function(queue, sycl::nd_range<3>(groupRange * localRange, localRange),
+           localMemSize, kernelParams, extra);
+}
+
+/// Utility class for launching SYCL kernels through kernel
+/// function wrapper.
+/// For example:
+/// A SYCL kernel function:
+///   void kernel_func(int *ptr, sycl::nd_item<3> item);
+/// Kernel function wrapper:
+///   void kernel_func_wrapper(int *ptr) {
+///     sycl::queue queue = *dpct::kernel_launcher::_que;
+///     unsigned int localMemSize = dpct::kernel_launcher::_local_mem_size;
+///     sycl::nd_range<3> nr = dpct::kernel_launcher::_nr;
+///     queue.parallel_for(
+///       nr,
+///       [=](sycl::nd_item<3> item_ct1) {
+///         kernel_func(ptr, item_ct1);
+///       });
+///   }
+/// Then launch the kernel through wrapper like:
+///   typedef void(*fpt)(int *);
+///   fpt fp = kernel_func_wrapper;
+///   dpct::kernel_launcher::launch(fp, dpct::dim3(1), dpct::dim3(1), 0, 0,
+///   device_ptr);
+/// If the origin function type is erased, then need to register it first:
+///   void *fp = (void *)wrapper_register(&kernel_func_wrapper).get();
+///   dpct::kernel_launcher::launch(fp, dpct::dim3(1), dpct::dim3(1), args, 0,
+///   0);
+class kernel_launcher {
+  template <typename FuncT, typename ArgSelector, std::size_t... Index>
+  static void launch_helper(FuncT &&func, ArgSelector &selector,
+                            std::index_sequence<Index...>) {
+    func(selector.template get<Index>()...);
+  }
+  static void set_execution_config(dim3 group_range, dim3 local_range,
+                                   unsigned int local_mem_size, queue_ptr que) {
+    if (que) {
+      _que = que;
+    } else {
+      _que = &get_default_queue();
+    }
+    _nr = sycl::nd_range<3>(
+        static_cast<sycl::range<3>>(group_range * local_range),
+        static_cast<sycl::range<3>>(local_range));
+    _local_mem_size = local_mem_size;
+  };
+  static inline std::mutex kernel_function_ptr_map_mutex;
+
+public:
+  /// Variables for storing execution configuration.
+  static inline thread_local sycl::queue *_que = nullptr;
+  static inline thread_local sycl::nd_range<3> _nr = sycl::nd_range<3>();
+  static inline thread_local unsigned int _local_mem_size = 0;
+  /// Map for retrieving launchable functor from a raw pointer.
+  static inline std::map<
+      const void *,
+      std::function<void(dim3, dim3, void **, unsigned int, queue_ptr)>>
+      kernel_function_ptr_map = {};
+
+  /// Registers a kernel function pointer with a corresponding launchable
+  /// functor.
+  /// \param [in] func Pointer to the kernel function.
+  /// \param [in] launcher Functor to handle kernel invocation.
+  static void register_kernel_ptr(
+      const void *func,
+      std::function<void(dim3, dim3, void **, unsigned int, queue_ptr)>
+          launcher) {
+    std::lock_guard<std::mutex> lock(kernel_function_ptr_map_mutex);
+    kernel_function_ptr_map[func] = std::move(launcher);
+  }
+  /// Launches a kernel function with arguments provided directly through
+  /// kernel function wrapper.
+  /// \tparam FuncT Type of the kernel function wrapper.
+  /// \tparam ArgsT Types of kernel arguments.
+  /// \param [in] func Pointer to the kernel function wrapper.
+  /// \param [in] group_range SYCL group range.
+  /// \param [in] local_range SYCL local range.
+  /// \param [in] local_mem_size The size of local memory required by the kernel
+  /// function.
+  /// \param [in] que SYCL queue used to execute kernel.
+  /// \param [in] args Kernel arguments.
+  template <typename FuncT, typename... ArgsT>
+  static std::enable_if_t<std::is_invocable_v<FuncT *, ArgsT...>, void>
+  launch(FuncT *func, dim3 group_range, dim3 local_range,
+         unsigned int local_mem_size, queue_ptr que, ArgsT... args) {
+    set_execution_config(group_range, local_range, local_mem_size, que);
+    func(args...);
+  }
+  /// Launches a kernel function through registered kernel function wrapper.
+  /// \param [in] func Pointer to the registered kernel function wrapper.
+  /// \param [in] group_range SYCL group range.
+  /// \param [in] local_range SYCL local range.
+  /// \param [in] args Array of pointers to kernel arguments.
+  /// \param [in] local_mem_size The size of local memory required by the kernel
+  /// function.
+  /// \param [in] que SYCL queue used to execute kernel.
+  static void launch(const void *func, dim3 group_range, dim3 local_range,
+                     void **args, unsigned int local_mem_size, queue_ptr que) {
+    std::lock_guard<std::mutex> lock(kernel_function_ptr_map_mutex);
+    auto Iter = kernel_function_ptr_map.find(func);
+    if (Iter == kernel_function_ptr_map.end()) {
+      throw std::runtime_error(
+          "dpct::launch() : no registered kernel function wrapper found.");
+    }
+    (Iter->second)(group_range, local_range, args, local_mem_size, que);
+  }
+  /// Launches a kernel function with packed arguments through kernel
+  /// function wrapper.
+  /// \tparam FuncT Type of the kernel function wrapper.
+  /// \param [in] func Pointer to the kernel function wrapper.
+  /// \param [in] group_range SYCL group range.
+  /// \param [in] local_range SYCL local range.
+  /// \param [in] args Array of pointers to kernel arguments.
+  /// \param [in] local_mem_size The size of local memory required by the kernel
+  /// function.
+  /// \param [in] que SYCL queue used to execute kernel.
+  template <typename FuncT>
+  static std::enable_if_t<std::is_function_v<FuncT>, void>
+  launch(FuncT *func, dim3 group_range, dim3 local_range, void **args,
+         unsigned int local_mem_size, queue_ptr que) {
+    constexpr size_t p_num = args_selector<0, 0, FuncT>::params_num;
+    set_execution_config(group_range, local_range, local_mem_size, que);
+    args_selector<p_num, p_num, FuncT> selector(args, nullptr);
+    launch_helper(func, selector, std::make_index_sequence<p_num>{});
+  }
+};
+
+/// Helper class to register and invoke kernel functions through a wrapper.
+template <typename F> class wrapper_register;
+template <typename Ret, typename... Args>
+class wrapper_register<Ret (*)(Args...)> {
+public:
+  typedef Ret (*FT)(Args...);
+  FT func;
+  /// Constructor to register a kernel function pointer.
+  /// \param [in] fp Pointer to the kernel function.
+  wrapper_register(FT fp) : func(fp) {
+    kernel_launcher::register_kernel_ptr((void *)func, *this);
+  }
+  /// Invokes the kernel function through the stored kernel function wrapper.
+  /// \param [in] group_range SYCL group range.
+  /// \param [in] local_range SYCL local range.
+  /// \param [in] args Array of pointers to kernel arguments.
+  /// \param [in] local_mem_size The size of local memory required by the kernel
+  /// function.
+  /// \param [in] que SYCL queue used to execute kernel.
+  void operator()(dim3 group_range, dim3 local_range, void **args,
+                  unsigned int local_mem_size, queue_ptr que) {
+    kernel_launcher::launch(func, group_range, local_range, args,
+                            local_mem_size, que);
+  }
+  /// Retrieves the original kernel function pointer.
+  /// \return The original kernel function pointer.
+  const FT &get() const noexcept { return func; }
+  /// Implicit conversion to the original kernel function pointer.
+  /// \return The original kernel function pointer.
+  operator FT() const noexcept { return func; }
+};
+/// Deduction guide for wrapper_register.
+template <typename Ret, typename... Args>
+wrapper_register(Ret (*)(Args...)) -> wrapper_register<Ret (*)(Args...)>;
+
+/// Find image wrapper in a kernel library and return its address.
+/// \param [in] library Handle to the kernel library.
+/// \param [in] name Name of the target image wrapper.
+static inline dpct::image_wrapper_base_p
+get_image_wrapper(dpct::kernel_library &library, const std::string &name) {
+#ifdef _WIN32
+  dpct::image_wrapper_base_p fn =
+      reinterpret_cast<dpct::image_wrapper_base_p>(GetProcAddress(
+          static_cast<HMODULE>(static_cast<void *>(library)), name.c_str()));
+#else
+  dpct::image_wrapper_base_p fn = reinterpret_cast<dpct::image_wrapper_base_p>(
+      dlsym(library, name.c_str()));
+#endif
+  if (fn == nullptr)
+    throw std::runtime_error("Failed to get image");
+  return fn;
+}
+
+} // namespace dpct
+#endif // __DPCT_KERNEL_HPP__
diff --git a/sycl/include/dpct/lapack_utils.hpp b/sycl/include/dpct/lapack_utils.hpp
new file mode 100644
index 00000000000..6fb3719e6ca
--- /dev/null
+++ b/sycl/include/dpct/lapack_utils.hpp
@@ -0,0 +1,1286 @@
+//==---- lapack_utils.hpp -------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_LAPACK_UTILS_HPP__
+#define __DPCT_LAPACK_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+#include "detail/lapack_utils_detail.hpp"
+
+namespace dpct {
+namespace lapack {
+/// Computes all eigenvalues and, optionally, eigenvectors of a real generalized
+/// symmetric definite eigenproblem using a divide and conquer method.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] queue Device queue where calculations will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1 or 2 or 3. Specifies the problem type to be solved.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrices A and B.
+/// \param [in,out] a The symmetric matrix A.
+/// \param [in] lda The leading dimension of matrix A.
+/// \param [in,out] b The symmetric matrix B.
+/// \param [in] ldb The leading dimension of matrix B.
+/// \param [out] w Eigenvalues.
+/// \param [in] scratchpad Scratchpad memory to be used by the routine
+/// for storing intermediate results.
+/// \param [in] scratchpad_size Size of scratchpad memory as a number of
+/// floating point elements of type T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T>
+inline int sygvd(sycl::queue &queue, std::int64_t itype, oneapi::mkl::job jobz,
+                 oneapi::mkl::uplo uplo, int n, T *a, int lda, T *b, int ldb,
+                 T *w, T *scratchpad, int scratchpad_size, int *info) {
+#ifdef DPCT_USM_LEVEL_NONE
+  auto info_buf = get_buffer<int>(info);
+  auto a_buffer = get_buffer<T>(a);
+  auto b_buffer = get_buffer<T>(b);
+  auto w_buffer = get_buffer<T>(w);
+  auto scratchpad_buffer = get_buffer<T>(scratchpad);
+  int info_val = 0;
+  int ret_val = 0;
+  try {
+    oneapi::mkl::lapack::sygvd(queue, itype, jobz, uplo, n, a_buffer, lda,
+                               b_buffer, ldb, w_buffer, scratchpad_buffer,
+                               scratchpad_size);
+  } catch (oneapi::mkl::lapack::exception const& e) {
+    std::cerr << "Unexpected exception caught during call to LAPACK API: sygvd"
+              << std::endl
+              << "reason: " << e.what() << std::endl
+              << "info: " << e.info() << std::endl;
+    info_val = static_cast<int>(e.info());
+    ret_val = 1;
+  } catch (sycl::exception const& e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    ret_val = 1;
+  }
+  queue.submit([&, info_val](sycl::handler &cgh) {
+    auto info_acc = info_buf.get_access<sycl::access_mode::write>(cgh);
+    cgh.single_task<::dpct::cs::kernel_name<class sygvd_set_info, T>>(
+        [=]() { info_acc[0] = info_val; });
+  });
+  return ret_val;
+#else
+  try {
+    oneapi::mkl::lapack::sygvd(queue, itype, jobz, uplo, n, a, lda, b, ldb, w,
+                               scratchpad, scratchpad_size);
+  } catch (oneapi::mkl::lapack::exception const& e) {
+    std::cerr << "Unexpected exception caught during call to LAPACK API: sygvd"
+              << std::endl
+              << "reason: " << e.what() << std::endl
+              << "info: " << e.info() << std::endl;
+    int info_val = static_cast<int>(e.info());
+    queue.memcpy(info, &info_val, sizeof(int)).wait();
+    return 1;
+  } catch (sycl::exception const& e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    queue.memset(info, 0, sizeof(int)).wait();
+    return 1;
+  }
+  queue.memset(info, 0, sizeof(int));
+  return 0;
+#endif
+}
+/// Computes all the eigenvalues, and optionally, the eigenvectors of a complex
+/// generalized Hermitian positive-definite eigenproblem using a divide and
+/// conquer method.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] queue Device queue where calculations will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1 or 2 or 3. Specifies the problem type to be solved.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrices A and B.
+/// \param [in,out] a The Hermitian matrix A.
+/// \param [in] lda The leading dimension of matrix A.
+/// \param [in,out] b The Hermitian matrix B.
+/// \param [in] ldb The leading dimension of matrix B.
+/// \param [in] w Eigenvalues.
+/// \param [in] scratchpad Scratchpad memory to be used by the routine
+/// for storing intermediate results.
+/// \param [in] scratchpad_size Size of scratchpad memory as a number of
+/// floating point elements of type T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename Tw>
+inline int hegvd(sycl::queue &queue, std::int64_t itype, oneapi::mkl::job jobz,
+                 oneapi::mkl::uplo uplo, int n, T *a, int lda, T *b, int ldb,
+                 Tw *w, T *scratchpad, int scratchpad_size, int *info) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+#ifdef DPCT_USM_LEVEL_NONE
+  auto info_buf = get_buffer<int>(info);
+  auto a_buffer = get_buffer<Ty>(a);
+  auto b_buffer = get_buffer<Ty>(b);
+  auto w_buffer = get_buffer<Tw>(w);
+  auto scratchpad_buffer = get_buffer<Ty>(scratchpad);
+  int info_val = 0;
+  int ret_val = 0;
+  try {
+    oneapi::mkl::lapack::hegvd(queue, itype, jobz, uplo, n, a_buffer, lda,
+                               b_buffer, ldb, w_buffer, scratchpad_buffer,
+                               scratchpad_size);
+  } catch (oneapi::mkl::lapack::exception const& e) {
+    std::cerr << "Unexpected exception caught during call to LAPACK API: hegvd"
+              << std::endl
+              << "reason: " << e.what() << std::endl
+              << "info: " << e.info() << std::endl;
+    info_val = static_cast<int>(e.info());
+    ret_val = 1;
+  } catch (sycl::exception const& e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    ret_val = 1;
+  }
+  queue.submit([&, info_val](sycl::handler &cgh) {
+    auto info_acc = info_buf.get_access<sycl::access_mode::write>(cgh);
+    cgh.single_task<::dpct::cs::kernel_name<class hegvd_set_info, T>>(
+        [=]() { info_acc[0] = info_val; });
+  });
+  return ret_val;
+#else
+  try {
+    oneapi::mkl::lapack::hegvd(queue, itype, jobz, uplo, n, (Ty *)a, lda, (Ty *)b,
+                               ldb, w, (Ty *)scratchpad, scratchpad_size);
+  } catch (oneapi::mkl::lapack::exception const& e) {
+    std::cerr << "Unexpected exception caught during call to LAPACK API: hegvd"
+              << std::endl
+              << "reason: " << e.what() << std::endl
+              << "info: " << e.info() << std::endl;
+    int info_val = static_cast<int>(e.info());
+    queue.memcpy(info, &info_val, sizeof(int)).wait();
+    return 1;
+  } catch (sycl::exception const& e) {
+    std::cerr << "Caught synchronous SYCL exception:" << std::endl
+              << "reason: " << e.what() << std::endl;
+    queue.memset(info, 0, sizeof(int)).wait();
+    return 1;
+  }
+  queue.memset(info, 0, sizeof(int));
+  return 0;
+#endif
+}
+/// Computes the Cholesky factorizations of a batch of symmetric (or Hermitian,
+/// for complex data) positive-definite matrices.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] queue Device queue where calculations will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in,out] a Array of pointers to matrix A.
+/// \param [in] lda The leading dimension of matrix A.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+/// \param [in] group_size The batch size.
+template <typename T>
+inline int potrf_batch(sycl::queue &queue, oneapi::mkl::uplo uplo, int n,
+                       T *a[], int lda, int *info, int group_size) {
+#ifdef DPCT_USM_LEVEL_NONE
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  struct matrix_info_t {
+    oneapi::mkl::uplo uplo_info;
+    std::int64_t n_info;
+    std::int64_t lda_info;
+    std::int64_t group_size_info;
+  };
+  matrix_info_t *matrix_info =
+      (matrix_info_t *)std::malloc(sizeof(matrix_info_t));
+  matrix_info->uplo_info = uplo;
+  matrix_info->n_info = n;
+  matrix_info->lda_info = lda;
+  matrix_info->group_size_info = group_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::potrf_batch_scratchpad_size<Ty>(
+          queue, &(matrix_info->uplo_info), &(matrix_info->n_info),
+          &(matrix_info->lda_info), 1, &(matrix_info->group_size_info));
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, queue);
+  int has_execption = 0;
+
+  static const std::vector<sycl::event> empty_events{};
+  static const std::string api_name = "oneapi::mkl::lapack::potrf_batch";
+  if (info)
+    queue.memset(info, 0, group_size * sizeof(int));
+  sycl::event e = ::dpct::detail::catch_batch_error_f<sycl::event>(
+      &has_execption, api_name, queue, nullptr, info,
+      matrix_info->group_size_info, oneapi::mkl::lapack::potrf_batch, queue,
+      &(matrix_info->uplo_info), &(matrix_info->n_info), (Ty **)a,
+      &(matrix_info->lda_info), (std::int64_t)1,
+      &(matrix_info->group_size_info), (Ty *)scratchpad,
+      (std::int64_t)scratchpad_size, empty_events);
+
+  queue.submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() mutable {
+      ::dpct::detail::catch_batch_error(
+          nullptr, api_name, queue, nullptr, info, matrix_info->group_size_info,
+          [](sycl::event _e) {
+            _e.wait_and_throw();
+            return 0;
+          },
+          e);
+      std::free(matrix_info);
+      sycl::free(scratchpad, queue);
+    });
+  });
+  return has_execption;
+#endif
+}
+/// Solves a batch of systems of linear equations with a Cholesky-factored
+/// symmetric (Hermitian) positive-definite coefficient matrices.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] queue Device queue where calculations will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] nrhs The number of right-hand sides.
+/// \param [in,out] a Array of pointers to matrix A.
+/// \param [in] lda The leading dimension of matrix A.
+/// \param [in,out] b Array of pointers to matrix B.
+/// \param [in] ldb The leading dimension of matrix B.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+/// \param [in] group_size The batch size.
+template <typename T>
+inline int potrs_batch(sycl::queue &queue, oneapi::mkl::uplo uplo, int n,
+                       int nrhs, T *a[], int lda, T *b[], int ldb, int *info,
+                       int group_size) {
+#ifdef DPCT_USM_LEVEL_NONE
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  struct matrix_info_t {
+    oneapi::mkl::uplo uplo_info;
+    std::int64_t n_info;
+    std::int64_t nrhs_info;
+    std::int64_t lda_info;
+    std::int64_t ldb_info;
+    std::int64_t group_size_info;
+  };
+  matrix_info_t *matrix_info =
+      (matrix_info_t *)std::malloc(sizeof(matrix_info_t));
+  matrix_info->uplo_info = uplo;
+  matrix_info->n_info = n;
+  matrix_info->nrhs_info = nrhs;
+  matrix_info->lda_info = lda;
+  matrix_info->ldb_info = ldb;
+  matrix_info->group_size_info = group_size;
+  std::int64_t scratchpad_size =
+      oneapi::mkl::lapack::potrs_batch_scratchpad_size<Ty>(
+          queue, &(matrix_info->uplo_info), &(matrix_info->n_info),
+          &(matrix_info->nrhs_info), &(matrix_info->lda_info),
+          &(matrix_info->ldb_info), 1, &(matrix_info->group_size_info));
+  Ty *scratchpad = sycl::malloc_device<Ty>(scratchpad_size, queue);
+  int has_execption = 0;
+
+  if (info)
+    queue.memset(info, 0, group_size * sizeof(int));
+
+  static const std::vector<sycl::event> empty_events{};
+  static const std::string api_name = "oneapi::mkl::lapack::potrs_batch";
+  sycl::event e = ::dpct::detail::catch_batch_error_f<sycl::event>(
+      &has_execption, api_name, queue, nullptr, info,
+      matrix_info->group_size_info, oneapi::mkl::lapack::potrs_batch, queue,
+      &(matrix_info->uplo_info), &(matrix_info->n_info),
+      &(matrix_info->nrhs_info), (const Ty *const *)a, &(matrix_info->lda_info),
+      (Ty **)b, &(matrix_info->ldb_info), (std::int64_t)1,
+      &(matrix_info->group_size_info), (Ty *)scratchpad,
+      (std::int64_t)scratchpad_size, empty_events);
+
+  queue.submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() mutable {
+      ::dpct::detail::catch_batch_error(
+          nullptr, api_name, queue, nullptr, info, matrix_info->group_size_info,
+          [](sycl::event _e) {
+            _e.wait_and_throw();
+            return 0;
+          },
+          e);
+      std::free(matrix_info);
+      sycl::free(scratchpad, queue);
+    });
+  });
+  return has_execption;
+#endif
+}
+
+/// Computes the size of workspace memory of getrf function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] device_ws_size The workspace size in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int getrf_scratchpad_size(sycl::queue &q, std::int64_t m, std::int64_t n,
+                                 library_data_t a_type, std::int64_t lda,
+                                 std::size_t *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::getrf_scratchpad_size_impl>(
+      q, a_type, nullptr, "getrf_scratchpad_size", q, m, n, a_type, lda,
+      device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes the LU factorization of a general m-by-n matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. Overwritten by L and U. The unit
+/// diagonal elements of L are not stored.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] ipiv The pivot indices. If \p ipiv is nullptr, non-pivoting
+/// LU factorization is computed.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int getrf(sycl::queue &q, std::int64_t m, std::int64_t n,
+                 library_data_t a_type, void *a, std::int64_t lda,
+                 std::int64_t *ipiv, void *device_ws,
+                 std::size_t device_ws_size, int *info) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  if (ipiv == nullptr) {
+    return detail::lapack_shim<detail::getrfnp_impl>(
+        q, a_type, info, "getrfnp_batch", q, m, n, a_type, a, lda, ipiv,
+        device_ws, device_ws_size_in_element_number, info);
+  }
+  return detail::lapack_shim<detail::getrf_impl>(
+      q, a_type, info, "getrf", q, m, n, a_type, a, lda, ipiv, device_ws,
+      device_ws_size_in_element_number, info);
+#endif
+}
+
+/// Solves a system of linear equations with a LU-factored square coefficient
+/// matrix, with multiple right-hand sides.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] trans Indicates the form of the linear equation.
+/// \param [in] n The order of the matrix A and the number of rows in matrix B.
+/// \param [in] nrhs The number of right hand sides.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] a The input matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] ipiv The pivot indices.
+/// \param [in] b_type The data type of the matrix B.
+/// \param [in, out] b The matrix B, whose columns are the right-hand sides
+/// for the systems of equations.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int getrs(sycl::queue &q, oneapi::mkl::transpose trans, std::int64_t n,
+                 std::int64_t nrhs, library_data_t a_type, void *a,
+                 std::int64_t lda, std::int64_t *ipiv, library_data_t b_type,
+                 void *b, std::int64_t ldb, int *info) {
+  return detail::lapack_shim<detail::getrs_impl>(
+      q, a_type, info, "getrs_scratchpad_size/getrs", q, trans, n, nrhs, a_type,
+      a, lda, ipiv, b_type, b, ldb, info);
+}
+
+/// Computes the size of workspace memory of geqrf function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] device_ws_size The device workspace size in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int geqrf_scratchpad_size(sycl::queue &q, std::int64_t m, std::int64_t n,
+                                 library_data_t a_type, std::int64_t lda,
+                                 std::size_t *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::geqrf_scratchpad_size_impl>(
+      q, a_type, nullptr, "geqrf_scratchpad_size", q, m, n, a_type, lda,
+      device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes the QR factorization of a general m-by-n matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. Overwritten by the factorization data.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] tau_type The data type of the array tau.
+/// \param [in] tau The array contains scalars that define elementary reflectors
+/// for the matrix Q in its decomposition in a product of elementary reflectors.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int geqrf(sycl::queue &q, std::int64_t m, std::int64_t n,
+                 library_data_t a_type, void *a, std::int64_t lda,
+                 library_data_t tau_type, void *tau, void *device_ws,
+                 std::size_t device_ws_size, int *info) {
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  return detail::lapack_shim<detail::geqrf_impl>(
+      q, a_type, info, "geqrf", q, m, n, a_type, a, lda, tau_type, tau,
+      device_ws, device_ws_size_in_element_number, info);
+}
+
+/// Computes the size of workspace memory of gesvd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobu Must be 'A' (representing jobsvd::vectors), 'S'
+/// (representing jobsvd::somevec), 'O' (representing jobsvd::vectorsina) or 'N'
+/// (representing jobsvd::novec).
+/// \param [in] jobvt Must be 'A' (representing jobsvd::vectors), 'S'
+/// (representing jobsvd::somevec), 'O' (representing jobsvd::vectorsina) or 'N'
+/// (representing jobsvd::novec).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] u_type The data type of the matrix U.
+/// \param [in] ldu The leading dimension of the matrix U.
+/// \param [in] vt_type The data type of the matrix VT.
+/// \param [in] ldvt The leading dimension of the matrix VT.
+/// \param [out] device_ws_size The device workspace size in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int gesvd_scratchpad_size(sycl::queue &q, signed char jobu,
+                                 signed char jobvt, std::int64_t m,
+                                 std::int64_t n, library_data_t a_type,
+                                 std::int64_t lda, library_data_t u_type,
+                                 std::int64_t ldu, library_data_t vt_type,
+                                 std::int64_t ldvt, std::size_t *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  oneapi::mkl::jobsvd jobu_enum = detail::char2jobsvd(jobu);
+  oneapi::mkl::jobsvd jobvt_enum = detail::char2jobsvd(jobvt);
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::gesvd_scratchpad_size_impl>(
+      q, a_type, nullptr, "gesvd_scratchpad_size", q, jobu_enum, jobvt_enum, m,
+      n, a_type, lda, u_type, ldu, vt_type, ldvt, device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes the size of workspace memory of gesvd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::vec or job::novec
+/// \param [in] all_vec Only have effects when \param jobz is job::vec.If the
+/// value is zero, all m columns of U are returned in the matrix U, otherwise
+/// the first min( \param m, \param n ) columns of U (the left singular vectors)
+/// are returned in the matrix U.
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] u_type The data type of the matrix U.
+/// \param [in] ldu The leading dimension of the matrix U.
+/// \param [in] vt_type The data type of the matrix VT.
+/// \param [in] ldvt The leading dimension of the matrix VT.
+/// \param [out] device_ws_size The device workspace size as a number of
+/// elements of type \param a_type.
+/// \param [out] host_ws_size The host workspace size as a number of elements
+/// of type \param a_type. Currently the value is always zero.
+inline int gesvd_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                 std::int64_t all_vec, std::int64_t m,
+                                 std::int64_t n, library_data_t a_type,
+                                 std::int64_t lda, library_data_t u_type,
+                                 std::int64_t ldu, library_data_t vt_type,
+                                 std::int64_t ldvt, int *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  oneapi::mkl::jobsvd jobu;
+  oneapi::mkl::jobsvd jobvt;
+  if (jobz == oneapi::mkl::job::vec) {
+    if (all_vec) {
+      jobu = jobvt = oneapi::mkl::jobsvd::somevec;
+    } else {
+      jobu = jobvt = oneapi::mkl::jobsvd::vectors;
+    }
+  } else if (jobz == oneapi::mkl::job::novec) {
+    jobu = jobvt = oneapi::mkl::jobsvd::novec;
+  } else {
+    throw std::runtime_error("the job type is unsupported");
+  }
+  std::size_t device_ws_size_64;
+  int ret = detail::lapack_shim<detail::gesvd_scratchpad_size_impl>(
+      q, a_type, nullptr, "gesvd_scratchpad_size", q, jobu, jobvt, m, n, a_type,
+      lda, u_type, ldu, vt_type, ldvt, device_ws_size_64);
+  *device_ws_size = device_ws_size_64;
+  return ret;
+}
+
+/// Computes the size of workspace memory of gesvd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobu Must be 'A' (representing jobsvd::vectors), 'S'
+/// (representing jobsvd::somevec), 'O' (representing jobsvd::vectorsina) or 'N'
+/// (representing jobsvd::novec).
+/// \param [in] jobvt Must be 'A' (representing jobsvd::vectors), 'S'
+/// (representing jobsvd::somevec), 'O' (representing jobsvd::vectorsina) or 'N'
+/// (representing jobsvd::novec).
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A and it will be overwritten according
+/// to \p jobu and \p jobvt.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] s_type The data type of the matrix S.
+/// \param [out] s The output matrix S.
+/// \param [in] u_type The data type of the matrix U.
+/// \param [out] u The output matrix U.
+/// \param [in] ldu The leading dimension of the matrix U.
+/// \param [in] vt_type The data type of the matrix VT.
+/// \param [out] vt The output matrix VT.
+/// \param [in] ldvt The leading dimension of the matrix VT.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int gesvd(sycl::queue &q, signed char jobu, signed char jobvt,
+                 std::int64_t m, std::int64_t n, library_data_t a_type, void *a,
+                 std::int64_t lda, library_data_t s_type, void *s,
+                 library_data_t u_type, void *u, std::int64_t ldu,
+                 library_data_t vt_type, void *vt, std::int64_t ldvt,
+                 void *device_ws, std::size_t device_ws_size, int *info) {
+  oneapi::mkl::jobsvd jobu_enum = detail::char2jobsvd(jobu);
+  oneapi::mkl::jobsvd jobvt_enum = detail::char2jobsvd(jobvt);
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  return detail::lapack_shim<detail::gesvd_impl>(
+      q, a_type, info, "gesvd", q, jobu_enum, jobvt_enum, m, n, a_type, a, lda,
+      s_type, s, u_type, u, ldu, vt_type, vt, ldvt, device_ws,
+      device_ws_size_in_element_number, info);
+}
+
+/// Computes the size of workspace memory of gesvd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::vec or job::novec.
+/// \param [in] all_vec Only have effects when \param jobz is job::vec.If the
+/// value is zero, all m columns of U are returned in the matrix U, otherwise
+/// the first min( \param m, \param n ) columns of U (the left singular vectors)
+/// are returned in the matrix U.
+/// \param [in] m The number of rows in the matrix A.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A and it will be overwritten according
+/// to \p jobu and \p jobvt.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] s_type The data type of the matrix S.
+/// \param [out] s The output matrix S.
+/// \param [in] u_type The data type of the matrix U.
+/// \param [out] u The output matrix U.
+/// \param [in] ldu The leading dimension of the matrix U.
+/// \param [in] vt_type The data type of the matrix VT.
+/// \param [out] vt The output matrix VT.
+/// \param [in] ldvt The leading dimension of the matrix VT.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \param a_type.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int gesvd(sycl::queue &q, oneapi::mkl::job jobz, std::int64_t all_vec,
+                 std::int64_t m, std::int64_t n, library_data_t a_type, void *a,
+                 std::int64_t lda, library_data_t s_type, void *s,
+                 library_data_t u_type, void *u, std::int64_t ldu,
+                 library_data_t vt_type, void *vt, std::int64_t ldvt,
+                 void *device_ws, std::size_t device_ws_size, int *info) {
+  oneapi::mkl::jobsvd jobu;
+  oneapi::mkl::jobsvd jobvt;
+  if (jobz == oneapi::mkl::job::vec) {
+    if (all_vec) {
+      jobu = jobvt = oneapi::mkl::jobsvd::somevec;
+    } else {
+      jobu = jobvt = oneapi::mkl::jobsvd::vectors;
+    }
+  } else if (jobz == oneapi::mkl::job::novec) {
+    jobu = jobvt = oneapi::mkl::jobsvd::novec;
+  } else {
+    throw std::runtime_error("the job type is unsupported");
+  }
+
+  detail::lapack_shim<detail::gesvd_conj_impl>(
+      q, a_type, info, "gesvd", q, jobu, jobvt, m, n, a_type, a, lda, s_type, s,
+      u_type, u, ldu, vt_type, vt, ldvt, device_ws, device_ws_size, info);
+  return 0;
+}
+
+/// Computes the size of workspace memory of potrf function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] device_ws_size The device workspace size in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int potrf_scratchpad_size(sycl::queue &q, oneapi::mkl::uplo uplo,
+                                 std::int64_t n, library_data_t a_type,
+                                 std::int64_t lda, std::size_t *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::potrf_scratchpad_size_impl>(
+      q, a_type, nullptr, "potrf_scratchpad_size", q, uplo, n, a_type, lda,
+      device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes the Cholesky factorization of a symmetric (Hermitian)
+/// positive-definite matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The number of columns in the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. Overwritten by the Cholesky factor U
+/// or L, as specified by \p uplo.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int potrf(sycl::queue &q, oneapi::mkl::uplo uplo, std::int64_t n,
+                 library_data_t a_type, void *a, std::int64_t lda,
+                 void *device_ws, std::size_t device_ws_size, int *info) {
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  return detail::lapack_shim<detail::potrf_impl>(
+      q, a_type, info, "potrf", q, uplo, n, a_type, a, lda, device_ws,
+      device_ws_size_in_element_number, info);
+}
+
+/// Solves a system of linear equations with a Cholesky-factored symmetric
+/// (Hermitian) positive-definite coefficient matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A and the number of rows in matrix B.
+/// \param [in] nrhs The number of right hand sides.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. Overwritten by the Cholesky factor U
+/// or L, as specified by \p uplo.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] b_type The data type of the matrix B.
+/// \param [in, out] b The matrix B, whose columns are the right-hand sides
+/// for the systems of equations.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int potrs(sycl::queue &q, oneapi::mkl::uplo uplo, std::int64_t n,
+                 std::int64_t nrhs, library_data_t a_type, void *a,
+                 std::int64_t lda, library_data_t b_type, void *b,
+                 std::int64_t ldb, int *info) {
+  return detail::lapack_shim<detail::potrs_impl>(
+      q, a_type, info, "potrs_scratchpad_size/potrs", q, uplo, n, nrhs, a_type,
+      a, lda, b_type, b, ldb, info);
+}
+
+/// Computes the size of workspace memory of syevx/heevx function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] device_ws_size The device workspace size in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int syheevx_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                   oneapi::mkl::rangev range,
+                                   oneapi::mkl::uplo uplo, std::int64_t n,
+                                   library_data_t a_type, std::int64_t lda,
+                                   void *vl, void *vu, std::int64_t il,
+                                   std::int64_t iu, library_data_t w_type,
+                                   std::size_t *device_ws_size,
+                                   std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syheevx_scratchpad_size_impl>(
+      q, a_type, nullptr, "syevx_scratchpad_size/heevx_scratchpad_size", q,
+      compz_jobz, range, uplo, n, lda, vl, vu, il, iu,
+      device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes selected eigenvalues and, optionally, eigenvectors of a
+/// symmetric/Hermitian matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, the lower or upper triangle is
+/// overwritten.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [out] m The total number of eigenvalues found.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int syheevx(sycl::queue &q, oneapi::mkl::job jobz,
+                   oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                   std::int64_t n, library_data_t a_type, void *a,
+                   std::int64_t lda, void *vl, void *vu, std::int64_t il,
+                   std::int64_t iu, std::int64_t *m, library_data_t w_type,
+                   void *w, void *device_ws, std::size_t device_ws_size,
+                   int *info) {
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  int ret = detail::lapack_shim<detail::syheevx_impl>(
+      q, a_type, info, "syevx/heevx", q, compz_jobz, range, uplo, n, a_type, a,
+      lda, vl, vu, il, iu, m, w_type, w, device_ws,
+      device_ws_size_in_element_number, info);
+  q.wait();
+  return ret;
+}
+
+/// Computes the size of workspace memory of syevx/heevx function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [out] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+template <typename T, typename ValueT>
+inline int syheevx_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                   oneapi::mkl::rangev range,
+                                   oneapi::mkl::uplo uplo, int n, int lda,
+                                   ValueT vl, ValueT vu, int il, int iu,
+                                   int *device_ws_size) {
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syheevx_scratchpad_size_impl>(
+      q, detail::get_library_data_t_from_type<T>(), nullptr,
+      "syevx_scratchpad_size/heevx_scratchpad_size", q, compz_jobz, range, uplo,
+      n, lda, &vl, &vu, il, iu, device_ws_size_tmp);
+  *device_ws_size = (int)device_ws_size_tmp;
+  return ret;
+}
+
+/// Computes selected eigenvalues and, optionally, eigenvectors of a
+/// symmetric/Hermitian matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, the lower or upper triangle is
+/// overwritten.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [out] m The total number of eigenvalues found.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename ValueT>
+inline int syheevx(sycl::queue &q, oneapi::mkl::job jobz,
+                   oneapi::mkl::rangev range, oneapi::mkl::uplo uplo, int n,
+                   T *a, int lda, ValueT vl, ValueT vu, int il, int iu, int *m,
+                   ValueT *w, T *device_ws, int device_ws_size, int *info) {
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  std::int64_t m64;
+  int ret = detail::lapack_shim<detail::syheevx_impl>(
+      q, detail::get_library_data_t_from_type<T>(), info, "syevx/heevx", q,
+      compz_jobz, range, uplo, n, detail::get_library_data_t_from_type<T>(), a,
+      lda, &vl, &vu, il, iu, &m64,
+      detail::get_library_data_t_from_type<ValueT>(), w, device_ws,
+      device_ws_size, info);
+  q.wait();
+  *m = (int)m64;
+  return ret;
+}
+
+/// Computes the size of workspace memory of sygvx/hegvx function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1, 2 or 3.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+template <typename T, typename ValueT>
+inline int
+syhegvx_scratchpad_size(sycl::queue &q, int itype, oneapi::mkl::job jobz,
+                        oneapi::mkl::rangev range, oneapi::mkl::uplo uplo,
+                        int n, int lda, int ldb, ValueT vl, ValueT vu, int il,
+                        int iu, int *device_ws_size) {
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syhegvx_scratchpad_size_impl>(
+      q, detail::get_library_data_t_from_type<T>(), nullptr,
+      "sygvx_scratchpad_size/hegvx_scratchpad_size", q, itype, compz_jobz,
+      range, uplo, n, lda, ldb, &vl, &vu, il, iu, device_ws_size_tmp);
+  *device_ws_size = (int)device_ws_size_tmp;
+  return ret;
+}
+
+/// Computes selected eigenvalues and, optionally, eigenvectors of a real
+/// generalized symmetric/Hermitian definite eigenproblem.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1, 2 or 3.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] range Must be rangev::all, rangev::values or uplo::indices.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, the lower or upper triangle is
+/// overwritten.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in, out] b The input matrix B.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [in] vl If range == rangev::values, the lower bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] vu If range == rangev::values, the upper bound of the interval
+/// to be searched for eigenvalues
+/// \param [in] il If range == rangev::indices, the indices of the smallest
+/// eigenvalue to be returned.
+/// \param [in] iu If range == rangev::indices, the indices of the largest
+/// eigenvalue to be returned.
+/// \param [out] m The total number of eigenvalues found.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename ValueT>
+inline int syhegvx(sycl::queue &q, int itype, oneapi::mkl::job jobz,
+                   oneapi::mkl::rangev range, oneapi::mkl::uplo uplo, int n,
+                   T *a, int lda, T *b, int ldb, ValueT vl, ValueT vu, int il,
+                   int iu, int *m, ValueT *w, T *device_ws, int device_ws_size,
+                   int *info) {
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  std::int64_t m64;
+  int ret = detail::lapack_shim<detail::syhegvx_impl>(
+      q, detail::get_library_data_t_from_type<T>(), info, "sygvx/hegvx", q,
+      itype, compz_jobz, range, uplo, n, a, lda, b, ldb, &vl, &vu, il, iu, &m64,
+      w, device_ws, device_ws_size, info);
+  q.wait();
+  *m = (int)m64;
+  return ret;
+}
+
+/// Computes the size of workspace memory of sygvd/hegvd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1, 2 or 3.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+template <typename T>
+inline int syhegvd_scratchpad_size(sycl::queue &q, int itype,
+                                   oneapi::mkl::job jobz,
+                                   oneapi::mkl::uplo uplo, int n, int lda,
+                                   int ldb, int *device_ws_size) {
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syhegvd_scratchpad_size_impl>(
+      q, detail::get_library_data_t_from_type<T>(), nullptr,
+      "sygvd_scratchpad_size/hegvd_scratchpad_size", q, itype, jobz, uplo, n,
+      lda, ldb, device_ws_size_tmp);
+  *device_ws_size = (int)device_ws_size_tmp;
+  return ret;
+}
+
+/// Computes all eigenvalues and, optionally, eigenvectors of a real generalized
+/// symmetric/Hermitian definite eigenproblem using a divide and conquer method.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] itype Must be 1, 2 or 3.
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, it is overwritten by eigenvectors.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in, out] b The input matrix B.
+/// \param [in] ldb The leading dimension of the matrix B.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename ValueT>
+inline int syhegvd(sycl::queue &q, int itype, oneapi::mkl::job jobz,
+                   oneapi::mkl::uplo uplo, int n, T *a, int lda, T *b, int ldb,
+                   ValueT *w, T *device_ws, int device_ws_size, int *info) {
+  return detail::lapack_shim<detail::syhegvd_impl>(
+      q, detail::get_library_data_t_from_type<T>(), info, "sygvd/hegvd", q,
+      itype, jobz, uplo, n, a, lda, b, ldb, w, device_ws, device_ws_size, info);
+}
+
+/// Computes the size of workspace memory of syev/heev function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+template <typename T>
+inline int syheev_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                  oneapi::mkl::uplo uplo, int n, int lda,
+                                  int *device_ws_size) {
+  std::size_t device_ws_size_tmp;
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  int ret = detail::lapack_shim<detail::syheev_scratchpad_size_impl>(
+      q, detail::get_library_data_t_from_type<T>(), nullptr,
+      "syev_scratchpad_size/heev_scratchpad_size", q, compz_jobz, uplo, n, lda,
+      device_ws_size_tmp);
+  *device_ws_size = (int)device_ws_size_tmp;
+  return ret;
+}
+
+/// Computes all eigenvalues and, optionally, eigenvectors of a real symmetric
+/// or Hermitian matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, it is overwritten by
+/// eigenvectors.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename ValueT>
+inline int syheev(sycl::queue &q, oneapi::mkl::job jobz, oneapi::mkl::uplo uplo,
+                  int n, T *a, int lda, ValueT *w, T *device_ws,
+                  int device_ws_size, int *info) {
+  oneapi::mkl::compz compz_jobz = detail::job2compz(jobz);
+  return detail::lapack_shim<detail::syheev_impl>(
+      q, detail::get_library_data_t_from_type<T>(), info, "syev/heev", q,
+      compz_jobz, uplo, n, a, lda, w, device_ws, device_ws_size, info);
+}
+
+/// Computes the size of workspace memory of syevd/heevd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] device_ws_size The device workspace in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int syheevd_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                   oneapi::mkl::uplo uplo, std::int64_t n,
+                                   library_data_t a_type, std::int64_t lda,
+                                   library_data_t w_type,
+                                   std::size_t *device_ws_size,
+                                   std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syheevd_scratchpad_size_impl>(
+      q, a_type, nullptr, "syevd_scratchpad_size/heevd_scratchpad_size", q,
+      jobz, uplo, n, a_type, lda, device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes all eigenvalues and, optionally, all eigenvectors of a real
+/// symmetric or Hermitian matrix using divide and conquer algorithm.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, it is overwritten by
+/// eigenvectors.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int syheevd(sycl::queue &q, oneapi::mkl::job jobz,
+                   oneapi::mkl::uplo uplo, std::int64_t n,
+                   library_data_t a_type, void *a, std::int64_t lda,
+                   library_data_t w_type, void *w, void *device_ws,
+                   std::size_t device_ws_size, int *info) {
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  return detail::lapack_shim<detail::syheevd_impl>(
+      q, a_type, info, "syevd/heevd", q, jobz, uplo, n, a_type, a, lda, w,
+      device_ws, device_ws_size_in_element_number, info);
+}
+
+/// Computes the size of workspace memory of syevd/heevd function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] device_ws_size The device workspace size as a number of
+/// elements of type \tparam T.
+template <typename T>
+inline int syheevd_scratchpad_size(sycl::queue &q, oneapi::mkl::job jobz,
+                                   oneapi::mkl::uplo uplo, std::int64_t n,
+                                   std::int64_t lda, int *device_ws_size) {
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::syheevd_scratchpad_size_impl>(
+      q, detail::get_library_data_t_from_type<T>(), nullptr,
+      "syevd_scratchpad_size/heevd_scratchpad_size", q, jobz, uplo, n,
+      detail::get_library_data_t_from_type<T>(), lda, device_ws_size_tmp);
+  *device_ws_size = (int)device_ws_size_tmp;
+  return ret;
+}
+
+/// Computes all eigenvalues and, optionally, all eigenvectors of a real
+/// symmetric or Hermitian matrix using divide and conquer algorithm.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] jobz Must be job::novec or job::vec.
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, it is overwritten by
+/// eigenvectors.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] w_type The data type of the eigenvalues.
+/// \param [out] w The eigenvalues of the matrix A in ascending order.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size as a number of
+/// elements of type \tparam T.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+template <typename T, typename ValueT>
+inline int syheevd(sycl::queue &q, oneapi::mkl::job jobz,
+                   oneapi::mkl::uplo uplo, std::int64_t n, T *a,
+                   std::int64_t lda, ValueT *w, T *device_ws,
+                   int device_ws_size, int *info) {
+  return detail::lapack_shim<detail::syheevd_impl>(
+      q, detail::get_library_data_t_from_type<T>(), info, "syevd/heevd", q,
+      jobz, uplo, n, detail::get_library_data_t_from_type<T>(), a, lda, w,
+      device_ws, device_ws_size, info);
+}
+
+/// Computes the size of workspace memory of trtri function.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] diag Must be diag::nonunit or diag::unit.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [out] device_ws_size The device workspace in bytes.
+/// \param [out] host_ws_size The host workspace size in bytes. Currently the
+/// value is always zero.
+inline int trtri_scratchpad_size(sycl::queue &q, oneapi::mkl::uplo uplo,
+                                 oneapi::mkl::diag diag, std::int64_t n,
+                                 library_data_t a_type, std::int64_t lda,
+                                 std::size_t *device_ws_size,
+                                 std::size_t *host_ws_size = nullptr) {
+  if (host_ws_size)
+    *host_ws_size = 0;
+  std::size_t device_ws_size_tmp;
+  int ret = detail::lapack_shim<detail::trtri_scratchpad_size_impl>(
+      q, a_type, nullptr, "trtri_scratchpad_size", q, uplo, diag, n, a_type,
+      lda, device_ws_size_tmp);
+  *device_ws_size = detail::element_number_to_byte(device_ws_size_tmp, a_type);
+  return ret;
+}
+
+/// Computes the inverse of a triangular matrix.
+/// \return Returns 0 if no synchronous exception, otherwise returns 1.
+/// \param [in] q Device queue where computation will be performed. It must
+/// have the in_order property when using the USM mode (DPCT_USM_LEVEL_NONE is
+/// not defined).
+/// \param [in] uplo Must be uplo::upper or uplo::lower.
+/// \param [in] diag Must be diag::nonunit or diag::unit.
+/// \param [in] n The order of the matrix A.
+/// \param [in] a_type The data type of the matrix A.
+/// \param [in, out] a The input matrix A. On exit, it is overwritten by
+/// the inverse matrix of A.
+/// \param [in] lda The leading dimension of the matrix A.
+/// \param [in] device_ws The workspace.
+/// \param [in] device_ws_size The workspace size in bytes.
+/// \param [out] info If lapack synchronous exception is caught, the value
+/// returned from info() method of the exception is set to \p info.
+inline int trtri(sycl::queue &q, oneapi::mkl::uplo uplo, oneapi::mkl::diag diag,
+                 std::int64_t n, library_data_t a_type, void *a,
+                 std::int64_t lda, void *device_ws, std::size_t device_ws_size,
+                 int *info) {
+#ifdef DPCT_USM_LEVEL_NONE
+  throw std::runtime_error("this API is unsupported when USM level is none");
+#else
+  std::size_t device_ws_size_in_element_number =
+      detail::byte_to_element_number(device_ws_size, a_type);
+  return detail::lapack_shim<detail::trtri_impl>(
+      q, a_type, info, "trtri", q, uplo, diag, n, a_type, a, lda, device_ws,
+      device_ws_size_in_element_number, info);
+#endif
+}
+} // namespace lapack
+} // namespace dpct
+
+#endif // __DPCT_LAPACK_UTILS_HPP__
diff --git a/sycl/include/dpct/lib_common_utils.hpp b/sycl/include/dpct/lib_common_utils.hpp
new file mode 100644
index 00000000000..b8f79039819
--- /dev/null
+++ b/sycl/include/dpct/lib_common_utils.hpp
@@ -0,0 +1,121 @@
+//==---- lib_common_utils.hpp ---------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_LIB_COMMON_UTILS_HPP__
+#define __DPCT_LIB_COMMON_UTILS_HPP__
+
+#include "compat_service.hpp"
+
+#if defined(__has_include) && __has_include(<oneapi/math.hpp>)
+#include <oneapi/math.hpp>
+#include <oneapi/mkl/namespace_alias.hpp>
+#elif defined(__has_include) && __has_include(<oneapi/mkl.hpp>)
+#include <oneapi/mkl.hpp>
+#elif defined(__has_include)
+#error "SYCLomatic runtime requires oneMath/oneMKL support"
+#else
+#error "SYCLomatic runtime requires __has_include support"
+#endif
+
+namespace dpct {
+
+enum class version_field : int { major, minor, update, patch };
+
+/// Returns the requested field of Intel(R) oneAPI Math Kernel Library version.
+/// \param field The version information field (major, minor, update or patch).
+/// \param result The result value.
+inline void mkl_get_version(version_field field, int *result) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  MKLVersion version;
+  mkl_get_version(&version);
+  if (version_field::major == field) {
+    *result = version.MajorVersion;
+  } else if (version_field::minor == field) {
+    *result = version.MinorVersion;
+  } else if (version_field::update == field) {
+    *result = version.UpdateVersion;
+  } else if (version_field::patch == field) {
+    *result = 0;
+  } else {
+    throw std::runtime_error("unknown field");
+  }
+#endif
+}
+
+enum class library_data_t : unsigned char {
+  real_float = 0,
+  complex_float,
+  real_double,
+  complex_double,
+  real_half,
+  complex_half,
+  real_bfloat16,
+  complex_bfloat16,
+  real_int4,
+  complex_int4,
+  real_uint4,
+  complex_uint4,
+  real_int8,
+  complex_int8,
+  real_uint8,
+  complex_uint8,
+  real_int16,
+  complex_int16,
+  real_uint16,
+  complex_uint16,
+  real_int32,
+  complex_int32,
+  real_uint32,
+  complex_uint32,
+  real_int64,
+  complex_int64,
+  real_uint64,
+  complex_uint64,
+  real_int8_4,
+  real_int8_32,
+  real_uint8_4,
+  real_f8_e4m3,
+  real_f8_e5m2,
+  library_data_t_size
+};
+
+enum class compute_type : int {
+  f16,
+  f16_standard,
+  f32,
+  f32_standard,
+  f32_fast_bf16,
+  f32_fast_tf32,
+  f64,
+  f64_standard,
+  i32,
+  i32_standard,
+};
+
+#ifdef DPCT_USM_LEVEL_NONE
+/// Cast a "rvalue reference to a temporary object" to an "lvalue reference to
+/// that temporary object".
+/// CAUTION:
+/// The returned lvalue reference is available only before the last step in
+/// evaluating the full-expression that contains this function call.
+/// \param [in] temporary_object The rvalue reference to a temporary object.
+/// \returns The lvalue reference to that temporary object.
+template <typename T>
+inline typename std::enable_if_t<std::is_rvalue_reference_v<T &&>, T &>
+rvalue_ref_to_lvalue_ref(T &&temporary_object) {
+  return temporary_object;
+}
+#endif
+} // namespace dpct
+
+#include "detail/lib_common_utils_detail.hpp"
+
+#endif // __DPCT_LIB_COMMON_UTILS_HPP__
diff --git a/sycl/include/dpct/math.hpp b/sycl/include/dpct/math.hpp
new file mode 100644
index 00000000000..daed5c6f8ff
--- /dev/null
+++ b/sycl/include/dpct/math.hpp
@@ -0,0 +1,2807 @@
+//==---- math.hpp ---------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_MATH_HPP__
+#define __DPCT_MATH_HPP__
+
+#include <climits>
+#include <limits>
+#include <sycl/sycl.hpp>
+#include <type_traits>
+
+#include "detail/math_detail.hpp"
+
+namespace dpct {
+
+/// Compute fast_length for variable-length array
+/// \param [in] a The array
+/// \param [in] len Length of the array
+/// \returns The computed fast_length
+inline float fast_length(const float *a, int len) {
+  switch (len) {
+  case 1:
+    return a[0];
+  case 2:
+    return sycl::fast_length(sycl::float2(a[0], a[1]));
+  case 3:
+    return sycl::fast_length(sycl::float3(a[0], a[1], a[2]));
+  case 4:
+    return sycl::fast_length(sycl::float4(a[0], a[1], a[2], a[3]));
+  case 0:
+    return 0;
+  default:
+    float f = 0;
+    for (int i = 0; i < len; ++i)
+      f += a[i] * a[i];
+    return sycl::sqrt(f);
+  }
+}
+
+/// Calculate the square root of the input array.
+/// \param [in] a The array pointer
+/// \param [in] len Length of the array
+/// \returns The square root
+template <typename T> inline T length(const T *a, const int len) {
+  switch (len) {
+  case 1:
+    return a[0];
+  case 2:
+    return sycl::length(sycl::vec<T, 2>(a[0], a[1]));
+  case 3:
+    return sycl::length(sycl::vec<T, 3>(a[0], a[1], a[2]));
+  case 4:
+    return sycl::length(sycl::vec<T, 4>(a[0], a[1], a[2], a[3]));
+  default:
+    T ret = 0;
+    for (int i = 0; i < len; ++i)
+      ret += a[i] * a[i];
+    return sycl::sqrt(ret);
+  }
+}
+
+/// Returns min(max(val, min_val), max_val)
+/// \param [in] val The input value
+/// \param [in] min_val The minimum value
+/// \param [in] max_val The maximum value
+/// \returns the value between min_val and max_val
+template <typename T> inline T clamp(T val, T min_val, T max_val) {
+  return sycl::clamp(val, min_val, max_val);
+}
+#ifdef SYCL_EXT_ONEAPI_BFLOAT16_MATH_FUNCTIONS
+template <>
+inline sycl::ext::oneapi::bfloat16 clamp(sycl::ext::oneapi::bfloat16 val,
+                                         sycl::ext::oneapi::bfloat16 min_val,
+                                         sycl::ext::oneapi::bfloat16 max_val) {
+  if (val < min_val)
+    return min_val;
+  if (val > max_val)
+    return max_val;
+  return val;
+}
+template <>
+inline sycl::vec<sycl::ext::oneapi::bfloat16, 2>
+clamp(sycl::vec<sycl::ext::oneapi::bfloat16, 2> val,
+      sycl::vec<sycl::ext::oneapi::bfloat16, 2> min_val,
+      sycl::vec<sycl::ext::oneapi::bfloat16, 2> max_val) {
+  return {clamp(val[0], min_val[0], max_val[0]),
+          clamp(val[1], min_val[1], max_val[1])};
+}
+#endif
+template <typename T>
+inline sycl::marray<T, 2> clamp(sycl::marray<T, 2> val,
+                                sycl::marray<T, 2> min_val,
+                                sycl::marray<T, 2> max_val) {
+  return {clamp(val[0], min_val[0], max_val[0]),
+          clamp(val[1], min_val[1], max_val[1])};
+}
+
+/// Performs comparison.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<
+    std::is_same_v<std::invoke_result_t<BinaryOperation, T, T>, bool>, bool>
+compare(const T a, const T b, const BinaryOperation binary_op) {
+  return binary_op(a, b);
+}
+template <typename T>
+inline std::enable_if_t<
+    std::is_same_v<std::invoke_result_t<std::not_equal_to<>, T, T>, bool>, bool>
+compare(const T a, const T b, const std::not_equal_to<> binary_op) {
+  return !detail::isnan(a) && !detail::isnan(b) && binary_op(a, b);
+}
+
+/// Performs unordered comparison.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<
+    std::is_same_v<std::invoke_result_t<BinaryOperation, T, T>, bool>, bool>
+unordered_compare(const T a, const T b, const BinaryOperation binary_op) {
+  return detail::isnan(a) || detail::isnan(b) || binary_op(a, b);
+}
+
+/// Performs 2 element comparison and return true if both results are true.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<T::size() == 2, bool>
+compare_both(const T a, const T b, const BinaryOperation binary_op) {
+  return compare(a[0], b[0], binary_op) && compare(a[1], b[1], binary_op);
+}
+
+/// Performs 2 element unordered comparison and return true if both results are
+/// true.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<T::size() == 2, bool>
+unordered_compare_both(const T a, const T b, const BinaryOperation binary_op) {
+  return unordered_compare(a[0], b[0], binary_op) &&
+         unordered_compare(a[1], b[1], binary_op);
+}
+
+/// Performs 2 element comparison.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<T::size() == 2, T>
+compare(const T a, const T b, const BinaryOperation binary_op) {
+  return {compare(a[0], b[0], binary_op), compare(a[1], b[1], binary_op)};
+}
+
+/// Performs 2 elements comparison, compare result of each element is 0 (false)
+/// or 0xffff (true), returns an unsigned int by composing compare result of two
+/// elements.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline unsigned compare_mask(const sycl::vec<T, 2> a, const sycl::vec<T, 2> b,
+                             const BinaryOperation binary_op) {
+  return sycl::vec<short, 2>(-compare(a[0], b[0], binary_op),
+                             -compare(a[1], b[1], binary_op))
+      .as<sycl::vec<unsigned, 1>>();
+}
+template <typename T, class BinaryOperation>
+inline unsigned compare_mask(const sycl::marray<T, 2> a,
+                             const sycl::marray<T, 2> b,
+                             const BinaryOperation binary_op) {
+  return sycl::vec<short, 2>(-compare(a[0], b[0], binary_op),
+                             -compare(a[1], b[1], binary_op))
+      .as<sycl::vec<unsigned, 1>>();
+}
+
+/// Performs 2 element unordered comparison.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline std::enable_if_t<T::size() == 2, T>
+unordered_compare(const T a, const T b, const BinaryOperation binary_op) {
+  return {unordered_compare(a[0], b[0], binary_op),
+          unordered_compare(a[1], b[1], binary_op)};
+}
+
+/// Performs 2 elements unordered comparison, compare result of each element is
+/// 0 (false) or 0xffff (true), returns an unsigned int by composing compare
+/// result of two elements.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op functor that implements the binary operation
+/// \returns the comparison result
+template <typename T, class BinaryOperation>
+inline unsigned unordered_compare_mask(const sycl::vec<T, 2> a,
+                                       const sycl::vec<T, 2> b,
+                                       const BinaryOperation binary_op) {
+  return sycl::vec<short, 2>(-unordered_compare(a[0], b[0], binary_op),
+                             -unordered_compare(a[1], b[1], binary_op))
+      .as<sycl::vec<unsigned, 1>>();
+}
+template <typename T, class BinaryOperation>
+inline unsigned unordered_compare_mask(const sycl::marray<T, 2> a,
+                                       const sycl::marray<T, 2> b,
+                                       const BinaryOperation binary_op) {
+  return sycl::vec<short, 2>(-unordered_compare(a[0], b[0], binary_op),
+                             -unordered_compare(a[1], b[1], binary_op))
+      .as<sycl::vec<unsigned, 1>>();
+}
+
+/// Bitfield-extract.
+///
+/// \tparam T The type of \param source value, must be an integer.
+/// \param source The source value to extracting.
+/// \param bit_start The position to start extracting.
+/// \param num_bits The number of bits to extracting.
+template <typename T>
+inline std::enable_if_t<std::is_unsigned_v<T>, T>
+bfe(const T source, const uint32_t bit_start, const uint32_t num_bits) {
+  const T mask = (T{1} << num_bits) - 1;
+  return (source >> bit_start) & mask;
+}
+
+/// Bitfield-extract with boundary checking.
+///
+/// Extract bit field from \param source and return the zero or sign-extended
+/// result. Source \param bit_start gives the bit field starting bit position,
+/// and source \param num_bits gives the bit field length in bits.
+///
+/// The result is padded with the sign bit of the extracted field. If the start
+/// position is beyond the msb of the input, the result was filled with the
+/// replicated sign bit of the extracted field.
+///
+/// \tparam T The type of \param source value, must be an integer.
+/// \param source The source value to extracting.
+/// \param bit_start The position to start extracting.
+/// \param num_bits The number of bits to extracting.
+template <typename T>
+inline std::enable_if_t<std::is_integral_v<T>, T>
+bfe_safe(const T source, const uint32_t bit_start, const uint32_t num_bits) {
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+  if constexpr (std::is_same_v<T, int8_t> || std::is_same_v<T, int16_t> ||
+                std::is_same_v<T, int32_t>) {
+    int32_t res{};
+    asm volatile("bfe.s32 %0, %1, %2, %3;"
+                 : "=r"(res)
+                 : "r"((int32_t)source), "r"(bit_start), "r"(num_bits));
+    return res;
+  } else if constexpr (std::is_same_v<T, uint8_t> ||
+                       std::is_same_v<T, uint16_t> ||
+                       std::is_same_v<T, uint32_t>) {
+    uint32_t res{};
+    asm volatile("bfe.u32 %0, %1, %2, %3;"
+                 : "=r"(res)
+                 : "r"((uint32_t)source), "r"(bit_start), "r"(num_bits));
+    return res;
+  } else if constexpr (std::is_same_v<T, int64_t>) {
+    T res{};
+    asm volatile("bfe.s64 %0, %1, %2, %3;"
+                 : "=l"(res)
+                 : "l"(source), "r"(bit_start), "r"(num_bits));
+    return res;
+  } else if constexpr (std::is_same_v<T, uint64_t>) {
+    T res{};
+    asm volatile("bfe.u64 %0, %1, %2, %3;"
+                 : "=l"(res)
+                 : "l"(source), "r"(bit_start), "r"(num_bits));
+    return res;
+  }
+#endif
+  const uint32_t bit_width = CHAR_BIT * sizeof(T);
+  const uint32_t pos = (std::min)(bit_start, bit_width);
+  const uint32_t len = (std::min)(pos + num_bits, bit_width) - pos;
+  if constexpr (std::is_signed_v<T>) {
+    const T mask = (T{1} << len) - 1;
+
+    // Find the sign-bit, the result is padded with the sign bit of the
+    // extracted field.
+    //
+    // sign_bit = len == 0 ? 0 : source[min(pos + len - 1, bit_width - 1)]
+    const uint32_t sign_bit_pos = (std::min)(pos + len - 1, bit_width - 1);
+    const T sign_bit = len != 0 && ((source >> sign_bit_pos) & 1);
+    const T sign_bit_padding = (-sign_bit & ~mask);
+    return ((source >> pos) & mask) | sign_bit_padding;
+  } else {
+    return dpct::bfe(source, pos, len);
+  }
+}
+
+/// Bitfield-insert.
+///
+/// \tparam T The type of \param x and \param y , must be an unsigned integer.
+/// \param x The source of the bitfield.
+/// \param y The source where bitfield is inserted.
+/// \param bit_start The position to start insertion.
+/// \param num_bits The number of bits to insertion.
+template <typename T>
+inline std::enable_if_t<std::is_unsigned_v<T>, T>
+bfi(const T x, const T y, const uint32_t bit_start, const uint32_t num_bits) {
+  constexpr unsigned bit_width = CHAR_BIT * sizeof(T);
+
+  // if bit_start > bit_width || len == 0, should return y.
+  const uint32_t ignore_bfi = bit_start > bit_width || num_bits == 0;
+  T extract_bitfield_mask = (~(T{0}) >> (bit_width - num_bits)) << bit_start;
+  T clean_bitfield_mask = ~extract_bitfield_mask;
+  return (y & (-ignore_bfi | clean_bitfield_mask)) |
+         (~-ignore_bfi & ((x << bit_start) & extract_bitfield_mask));
+}
+
+/// Bitfield-insert with boundary checking.
+///
+/// Align and insert a bit field from \param x into \param y . Source \param
+/// bit_start gives the starting bit position for the insertion, and source
+/// \param num_bits gives the bit field length in bits.
+///
+/// \tparam T The type of \param x and \param y , must be an unsigned integer.
+/// \param x The source of the bitfield.
+/// \param y The source where bitfield is inserted.
+/// \param bit_start The position to start insertion.
+/// \param num_bits The number of bits to insertion.
+template <typename T>
+inline std::enable_if_t<std::is_unsigned_v<T>, T>
+bfi_safe(const T x, const T y, const uint32_t bit_start,
+         const uint32_t num_bits) {
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+  if constexpr (std::is_same_v<T, uint8_t> || std::is_same_v<T, uint16_t> ||
+                std::is_same_v<T, uint32_t>) {
+    uint32_t res{};
+    asm volatile("bfi.b32 %0, %1, %2, %3, %4;"
+                 : "=r"(res)
+                 : "r"((uint32_t)x), "r"((uint32_t)y), "r"(bit_start),
+                   "r"(num_bits));
+    return res;
+  } else if constexpr (std::is_same_v<T, uint64_t>) {
+    uint64_t res{};
+    asm volatile("bfi.b64 %0, %1, %2, %3, %4;"
+                 : "=l"(res)
+                 : "l"(x), "l"(y), "r"(bit_start), "r"(num_bits));
+    return res;
+  }
+#endif
+  constexpr unsigned bit_width = CHAR_BIT * sizeof(T);
+  const uint32_t pos = (std::min)(bit_start, bit_width);
+  const uint32_t len = (std::min)(pos + num_bits, bit_width) - pos;
+  return dpct::bfi(x, y, pos, len);
+}
+
+/// Determine whether 2 element value is NaN.
+/// \param [in] a The input value
+/// \returns the comparison result
+template <typename T>
+inline std::enable_if_t<T::size() == 2, T> isnan(const T a) {
+  return {detail::isnan(a[0]), detail::isnan(a[1])};
+}
+
+/// Emulated function for __funnelshift_l
+inline unsigned int funnelshift_l(unsigned int low, unsigned int high,
+                                  unsigned int shift) {
+  return (sycl::upsample(high, low) << (shift & 31U)) >> 32;
+}
+
+/// Emulated function for __funnelshift_lc
+inline unsigned int funnelshift_lc(unsigned int low, unsigned int high,
+                                   unsigned int shift) {
+  return (sycl::upsample(high, low) << sycl::min(shift, 32U)) >> 32;
+}
+
+/// Emulated function for __funnelshift_r
+inline unsigned int funnelshift_r(unsigned int low, unsigned int high,
+                                  unsigned int shift) {
+  return (sycl::upsample(high, low) >> (shift & 31U)) & 0xFFFFFFFF;
+}
+
+/// Emulated function for __funnelshift_rc
+inline unsigned int funnelshift_rc(unsigned int low, unsigned int high,
+                                   unsigned int shift) {
+  return (sycl::upsample(high, low) >> sycl::min(shift, 32U)) & 0xFFFFFFFF;
+}
+
+/// cbrt function wrapper.
+template <typename T> inline T cbrt(T val) { return sycl::cbrt((T)val); }
+
+template <typename T1, typename T2>
+std::enable_if_t<std::is_integral_v<T1> && std::is_integral_v<T2>,
+                 std::common_type_t<T1, T2>>
+min(T1 a, T2 b) {
+  using common_t = std::common_type_t<T1, T2>;
+  return sycl::min(static_cast<common_t>(a), static_cast<common_t>(b));
+}
+template <typename T1, typename T2>
+std::enable_if_t<std::is_floating_point_v<T1> && std::is_floating_point_v<T2>,
+                 std::common_type_t<T1, T2>>
+min(T1 a, T2 b) {
+  using common_t = std::common_type_t<T1, T2>;
+  return sycl::fmin(static_cast<common_t>(a), static_cast<common_t>(b));
+}
+template <typename T1, typename T2>
+std::enable_if_t<std::is_integral_v<T1> && std::is_integral_v<T2>,
+                 std::common_type_t<T1, T2>>
+max(T1 a, T2 b) {
+  using common_t = std::common_type_t<T1, T2>;
+  return sycl::max(static_cast<common_t>(a), static_cast<common_t>(b));
+}
+template <typename T1, typename T2>
+std::enable_if_t<std::is_floating_point_v<T1> && std::is_floating_point_v<T2>,
+                 std::common_type_t<T1, T2>>
+max(T1 a, T2 b) {
+  using common_t = std::common_type_t<T1, T2>;
+  return sycl::fmax(static_cast<common_t>(a), static_cast<common_t>(b));
+}
+
+// pow functions overload.
+inline float pow(const float a, const int b) { return sycl::pown(a, b); }
+inline double pow(const double a, const int b) { return sycl::pown(a, b); }
+inline float pow(const float a, const float b) { return sycl::pow(a, b); }
+inline double pow(const double a, const double b) { return sycl::pow(a, b); }
+template <typename T, typename U>
+inline typename std::enable_if_t<std::is_floating_point_v<T>, T>
+pow(const T a, const U b) {
+  return sycl::pow(a, static_cast<T>(b));
+}
+template <typename T, typename U>
+inline typename std::enable_if_t<!std::is_floating_point_v<T>, double>
+pow(const T a, const U b) {
+  return sycl::pow(static_cast<double>(a), static_cast<double>(b));
+}
+
+/// Performs relu saturation.
+/// \param [in] a The input value
+/// \returns the relu saturation result
+template <typename T> inline T relu(T a) {
+  T zero{};
+  if constexpr (detail::is_floating_point<T>)
+    return !detail::isnan(a) && a < zero ? zero : a;
+  else
+    return a < zero ? zero : a;
+}
+template <typename T, int N>
+inline sycl::vec<T, N> relu(const sycl::vec<T, N> a) {
+  sycl::vec<T, N> ret;
+  for (int i = 0; i < N; ++i)
+    ret[i] = relu(a[i]);
+  return ret;
+}
+template <class T> inline sycl::marray<T, 2> relu(const sycl::marray<T, 2> a) {
+  return {relu(a[0]), relu(a[1])};
+}
+
+/// Performs complex number multiply addition.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns the operation result
+template <typename T>
+inline sycl::vec<T, 2> complex_mul_add(const sycl::vec<T, 2> a,
+                                       const sycl::vec<T, 2> b,
+                                       const sycl::vec<T, 2> c) {
+  return sycl::vec<T, 2>{a[0] * b[0] - a[1] * b[1] + c[0],
+                         a[0] * b[1] + a[1] * b[0] + c[1]};
+}
+template <typename T>
+inline sycl::marray<T, 2> complex_mul_add(const sycl::marray<T, 2> a,
+                                          const sycl::marray<T, 2> b,
+                                          const sycl::marray<T, 2> c) {
+  return sycl::marray<T, 2>{a[0] * b[0] - a[1] * b[1] + c[0],
+                            a[0] * b[1] + a[1] * b[0] + c[1]};
+}
+
+/// Performs 2 elements comparison and returns the bigger one. If either of
+/// inputs is NaN, then return NaN.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns the bigger value
+template <typename T> inline T fmax_nan(const T a, const T b) {
+  if (detail::isnan(a) || detail::isnan(b))
+    return NAN;
+  return sycl::fmax(a, b);
+}
+#ifdef SYCL_EXT_ONEAPI_BFLOAT16_MATH_FUNCTIONS
+template <>
+inline sycl::ext::oneapi::bfloat16
+fmax_nan(const sycl::ext::oneapi::bfloat16 a,
+         const sycl::ext::oneapi::bfloat16 b) {
+  if (detail::isnan(a) || detail::isnan(b))
+    return NAN;
+  return sycl::fmax(float(a), float(b));
+}
+#endif
+template <typename T>
+inline sycl::vec<T, 2> fmax_nan(const sycl::vec<T, 2> a,
+                                const sycl::vec<T, 2> b) {
+  return {fmax_nan(a[0], b[0]), fmax_nan(a[1], b[1])};
+}
+template <typename T>
+inline sycl::marray<T, 2> fmax_nan(const sycl::marray<T, 2> a,
+                                   const sycl::marray<T, 2> b) {
+  return {fmax_nan(a[0], b[0]), fmax_nan(a[1], b[1])};
+}
+
+/// Performs 2 elements comparison and returns the smaller one. If either of
+/// inputs is NaN, then return NaN.
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns the smaller value
+template <typename T> inline T fmin_nan(const T a, const T b) {
+  if (detail::isnan(a) || detail::isnan(b))
+    return NAN;
+  return sycl::fmin(a, b);
+}
+#ifdef SYCL_EXT_ONEAPI_BFLOAT16_MATH_FUNCTIONS
+template <>
+inline sycl::ext::oneapi::bfloat16
+fmin_nan(const sycl::ext::oneapi::bfloat16 a,
+         const sycl::ext::oneapi::bfloat16 b) {
+  if (detail::isnan(a) || detail::isnan(b))
+    return NAN;
+  return sycl::fmin(float(a), float(b));
+}
+#endif
+template <typename T>
+inline sycl::vec<T, 2> fmin_nan(const sycl::vec<T, 2> a,
+                                const sycl::vec<T, 2> b) {
+  return {fmin_nan(a[0], b[0]), fmin_nan(a[1], b[1])};
+}
+template <typename T>
+inline sycl::marray<T, 2> fmin_nan(const sycl::marray<T, 2> a,
+                                   const sycl::marray<T, 2> b) {
+  return {fmin_nan(a[0], b[0]), fmin_nan(a[1], b[1])};
+}
+
+/// A sycl::abs wrapper functors.
+struct abs {
+  template <typename T> auto operator()(const T x) const {
+    return sycl::abs(x);
+  }
+};
+
+/// A sycl::abs_diff wrapper functors.
+struct abs_diff {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::abs_diff(x, y);
+  }
+};
+
+/// A sycl::add_sat wrapper functors.
+struct add_sat {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::add_sat(x, y);
+  }
+};
+
+/// A sycl::rhadd wrapper functors.
+struct rhadd {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::rhadd(x, y);
+  }
+};
+
+/// A sycl::hadd wrapper functors.
+struct hadd {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::hadd(x, y);
+  }
+};
+
+/// A sycl::max wrapper functors.
+struct maximum {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::max(x, y);
+  }
+  template <typename T>
+  auto operator()(const T x, const T y, bool *pred) const {
+    return (x >= y) ? ((*pred = true), x) : ((*pred = false), y);
+  }
+};
+
+/// A sycl::min wrapper functors.
+struct minimum {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::min(x, y);
+  }
+  template <typename T>
+  auto operator()(const T x, const T y, bool *pred) const {
+    return (x <= y) ? ((*pred = true), x) : ((*pred = false), y);
+  }
+};
+
+/// A sycl::sub_sat wrapper functors.
+struct sub_sat {
+  template <typename T> auto operator()(const T x, const T y) const {
+    return sycl::sub_sat(x, y);
+  }
+};
+
+/// Compute vectorized binary operation value for two values, with each value
+/// treated as a vector type \p VecT.
+/// \tparam [in] VecT The type of the vector
+/// \tparam [in] BinaryOperation The binary operation class
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op The operation to do with the two values
+/// \param [in] need_relu Whether the result need relu saturation
+/// \returns The vectorized binary operation value of the two values
+template <typename VecT, class BinaryOperation>
+inline unsigned vectorized_binary(unsigned a, unsigned b,
+                                  const BinaryOperation binary_op,
+                                  bool need_relu = false) {
+  sycl::vec<unsigned, 1> v0{a}, v1{b};
+  auto v2 = v0.as<VecT>();
+  auto v3 = v1.as<VecT>();
+  auto v4 =
+      detail::vectorized_binary<VecT, BinaryOperation>()(v2, v3, binary_op);
+  if (need_relu)
+    v4 = relu(v4);
+  v0 = v4.template as<sycl::vec<unsigned, 1>>();
+  return v0;
+}
+
+/// Compute vectorized binary operation value with pred for two values, with
+/// each value treated as a 2 \p T type elements vector type.
+///
+/// \tparam [in] VecT The type of the vector
+/// \tparam [in] BinaryOperation The binary operation class
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] binary_op The operation with pred to do with the two values
+/// \param [out] pred_hi The pred pointer that pass into high halfword operation
+/// \param [out] pred_lo The pred pointer that pass into low halfword operation
+/// \returns The vectorized binary operation value of the two values
+template <typename VecT, typename BinaryOperation>
+inline unsigned vectorized_binary_with_pred(unsigned a, unsigned b,
+                                            const BinaryOperation binary_op,
+                                            bool *pred_hi, bool *pred_lo) {
+  auto v1 = sycl::vec<unsigned, 1>(a).as<VecT>();
+  auto v2 = sycl::vec<unsigned, 1>(b).as<VecT>();
+  VecT ret;
+  ret[0] = binary_op(v1[0], v2[0], pred_lo);
+  ret[1] = binary_op(v1[1], v2[1], pred_hi);
+  return ret.template as<sycl::vec<unsigned, 1>>();
+}
+
+/// Compute vectorized isgreater for two values, with each value treated as a
+/// vector type \p S.
+/// \tparam [in] S The type of the vector
+/// \tparam [in] T The type of the original values
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The vectorized greater than of the two values
+template <typename S, typename T> inline T vectorized_isgreater(T a, T b) {
+  sycl::vec<T, 1> v0{a}, v1{b};
+  auto v2 = v0.template as<S>();
+  auto v3 = v1.template as<S>();
+  auto v4 = v2 > v3;
+  v0 = v4.template as<sycl::vec<T, 1>>();
+  return v0;
+}
+
+/// Compute vectorized max for two values, with each value treated as a vector
+/// type \p S.
+/// \tparam [in] S The type of the vector
+/// \tparam [in] T The type of the original values
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The vectorized max of the two values
+template <typename S, typename T> inline T vectorized_max(T a, T b) {
+  sycl::vec<T, 1> v0{a}, v1{b};
+  auto v2 = v0.template as<S>();
+  auto v3 = v1.template as<S>();
+  auto v4 = sycl::max(v2, v3);
+  v0 = v4.template as<sycl::vec<T, 1>>();
+  return v0;
+}
+
+/// Compute vectorized min for two values, with each value treated as a vector
+/// type \p S.
+/// \tparam [in] S The type of the vector
+/// \tparam [in] T The type of the original values
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The vectorized min of the two values
+template <typename S, typename T> inline T vectorized_min(T a, T b) {
+  sycl::vec<T, 1> v0{a}, v1{b};
+  auto v2 = v0.template as<S>();
+  auto v3 = v1.template as<S>();
+  auto v4 = sycl::min(v2, v3);
+  v0 = v4.template as<sycl::vec<T, 1>>();
+  return v0;
+}
+
+/// Compute vectorized unary operation for a value, with the value treated as a
+/// vector type \p VecT.
+/// \tparam [in] VecT The type of the vector
+/// \tparam [in] UnaryOperation The unary operation class
+/// \param [in] a The input value
+/// \returns The vectorized unary operation value of the input value
+template <typename VecT, class UnaryOperation>
+inline unsigned vectorized_unary(unsigned a, const UnaryOperation unary_op) {
+  sycl::vec<unsigned, 1> v0{a};
+  auto v1 = v0.as<VecT>();
+  auto v2 = unary_op(v1);
+  v0 = v2.template as<sycl::vec<unsigned, 1>>();
+  return v0;
+}
+
+/// Compute vectorized absolute difference for two values without modulo
+/// overflow, with each value treated as a vector type \p VecT.
+/// \tparam [in] VecT The type of the vector
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The vectorized absolute difference of the two values
+template <typename VecT>
+inline unsigned vectorized_sum_abs_diff(unsigned a, unsigned b) {
+  sycl::vec<unsigned, 1> v0{a}, v1{b};
+  // Need convert element type to wider signed type to avoid overflow.
+  auto v2 = v0.as<VecT>().template convert<int>();
+  auto v3 = v1.as<VecT>().template convert<int>();
+  auto v4 = sycl::abs_diff(v2, v3);
+  unsigned sum = 0;
+  for (size_t i = 0; i < v4.size(); ++i) {
+    sum += v4[i];
+  }
+  return sum;
+}
+
+/// Compute two vectorized binary operation value with pred for three values,
+/// with each value treated as a 2 \p T type elements vector type.
+///
+/// \tparam [in] VecT The type of the vector
+/// \tparam [in] BinaryOperation1 The first binary operation class
+/// \tparam [in] BinaryOperation2 The second binary operation class
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] binary_op1 The first operation to do with the first two values
+/// \param [in] binary_op2 The second operation to do with the third values
+/// \param [in] need_relu Whether the result need relu saturation
+/// \returns The two vectorized binary operation value of the three values
+template <typename VecT, typename BinaryOperation1, typename BinaryOperation2>
+inline unsigned vectorized_ternary(unsigned a, unsigned b, unsigned c,
+                                   const BinaryOperation1 binary_op1,
+                                   const BinaryOperation2 binary_op2,
+                                   bool need_relu = false) {
+  const auto v1 = sycl::vec<unsigned, 1>(a).as<VecT>();
+  const auto v2 = sycl::vec<unsigned, 1>(b).as<VecT>();
+  const auto v3 = sycl::vec<unsigned, 1>(c).as<VecT>();
+  auto v4 =
+      detail::vectorized_binary<VecT, BinaryOperation1>()(v1, v2, binary_op1);
+  v4 = detail::vectorized_binary<VecT, BinaryOperation2>()(v4, v3, binary_op2);
+  if (need_relu)
+    v4 = relu(v4);
+  return v4.template as<sycl::vec<unsigned, 1>>();
+}
+
+/// Two-way dot product-accumulate. Calculate and return interger_vector2(
+/// \param a) dot product interger_vector2(low16_bit( \param b))  + \param c
+///
+/// \tparam [in] T1 The type of first value.
+/// \tparam [in] T2 The type of second value.
+/// \param [in] a The first value.
+/// \param [in] b The second value.
+/// \param [in] c The third value. It has type uint32_t if both T1 and T1 are
+/// uint32_t else has type int32_t.
+/// \return Two-way 16-bit to 8-bit dot product which is accumulated in 32-bit
+/// result.
+template <typename T1, typename T2, typename T3>
+inline auto dp2a_lo(T1 a, T2 b, T3 c) {
+  detail::dot_product_acc_t<T1, T2> res = c;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__) &&                     \
+    defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 610
+  res = __dp2a_lo(a, b, c);
+#else
+  auto va = ::dpct::detail::extract_and_sign_or_zero_extend2(a);
+  auto vb = ::dpct::detail::extract_and_sign_or_zero_extend4(b);
+  res += va[0] * vb[0];
+  res += va[1] * vb[1];
+#endif
+  return res;
+}
+
+/// Two-way dot product-accumulate. Calculate and return interger_vector2(
+/// \param a) dot product interger_vector2(high_16bit( \param b)) + \param c
+///
+/// \tparam [in] T1 The type of first value.
+/// \tparam [in] T2 The type of second value.
+/// \param [in] a The first value.
+/// \param [in] b The second value.
+/// \param [in] c The third value. It has type uint32_t if both T1 and T1 are
+/// uint32_t else has type int32_t.
+/// \return Two-way 16-bit to 8-bit dot product which is accumulated in 32-bit
+/// result.
+template <typename T1, typename T2, typename T3>
+inline auto dp2a_hi(T1 a, T2 b, T3 c) {
+  detail::dot_product_acc_t<T1, T2> res = c;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__) &&                     \
+    defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 610
+  res = __dp2a_hi(a, b, c);
+#else
+  auto va = ::dpct::detail::extract_and_sign_or_zero_extend2(a);
+  auto vb = ::dpct::detail::extract_and_sign_or_zero_extend4(b);
+  res += va[0] * vb[2];
+  res += va[1] * vb[3];
+#endif
+  return res;
+}
+
+/// Four-way byte dot product-accumulate. Calculate and return interger_vector4(
+/// \param a) dot product interger_vector4( \param b)  + \param c
+///
+/// \tparam [in] T1 The type of first value.
+/// \tparam [in] T2 The type of second value.
+/// \param [in] a The first value.
+/// \param [in] b The second value.
+/// \param [in] c The third value. It has type uint32_t if both T1 and T1 are
+/// uint32_t else has type int32_t.
+/// \return Four-way byte dot product which is accumulated in 32-bit result.
+template <typename T1, typename T2, typename T3>
+inline auto dp4a(T1 a, T2 b, T3 c) {
+  detail::dot_product_acc_t<T1, T2> res = c;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__) &&                     \
+    defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 610
+  res = __dp4a(a, b, c);
+#else
+  auto va = ::dpct::detail::extract_and_sign_or_zero_extend4(a);
+  auto vb = ::dpct::detail::extract_and_sign_or_zero_extend4(b);
+  res += va[0] * vb[0];
+  res += va[1] * vb[1];
+  res += va[2] * vb[2];
+  res += va[3] * vb[3];
+#endif
+  return res;
+}
+
+/// Extend \p a and \p b to 33 bit and add them.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend addition of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_add(AT a, BT b) {
+  return detail::extend_binary<RetT, false>(a, b, std::plus());
+}
+
+/// Extend Inputs to 33 bit, add \p a, \p b, then do \p second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend addition of \p a, \p b and \p second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_add(AT a, BT b, CT c, BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b, c, std::plus(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and add them with saturation.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend addition of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_add_sat(AT a, BT b) {
+  return detail::extend_binary<RetT, true>(a, b, std::plus());
+}
+
+/// Extend Inputs to 33 bit, add \p a, \p b with saturation, then do \p
+/// second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend addition of \p a, \p b with saturation and \p second_op
+/// with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_add_sat(AT a, BT b, CT c,
+                                     BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b, c, std::plus(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and minus them.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend subtraction of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_sub(AT a, BT b) {
+  return detail::extend_binary<RetT, false>(a, b, std::minus());
+}
+
+/// Extend Inputs to 33 bit, minus \p a, \p b, then do \p second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend subtraction of \p a, \p b and \p second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_sub(AT a, BT b, CT c, BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b, c, std::minus(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and minus them with saturation.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend subtraction of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_sub_sat(AT a, BT b) {
+  return detail::extend_binary<RetT, true>(a, b, std::minus());
+}
+
+/// Extend Inputs to 33 bit, minus \p a, \p b with saturation, then do \p
+/// second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend subtraction of \p a, \p b with saturation and \p
+/// second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_sub_sat(AT a, BT b, CT c,
+                                     BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b, c, std::minus(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and do abs_diff.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend abs_diff of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_absdiff(AT a, BT b) {
+  return detail::extend_binary<RetT, false>(a, b, abs_diff());
+}
+
+/// Extend Inputs to 33 bit, abs_diff \p a, \p b, then do \p second_op with \p
+/// c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend abs_diff of \p a, \p b and \p second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_absdiff(AT a, BT b, CT c,
+                                     BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b, c, abs_diff(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and do abs_diff with saturation.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The extend abs_diff of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_absdiff_sat(AT a, BT b) {
+  return detail::extend_binary<RetT, true>(a, b, abs_diff());
+}
+
+/// Extend Inputs to 33 bit, abs_diff \p a, \p b with saturation, then do \p
+/// second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The extend abs_diff of \p a, \p b with saturation and \p
+/// second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_absdiff_sat(AT a, BT b, CT c,
+                                         BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b, c, abs_diff(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return smaller one.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The smaller one of the two extended values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_min(AT a, BT b) {
+  return detail::extend_binary<RetT, false>(a, b, minimum());
+}
+
+/// Extend Inputs to 33 bit, find the smaller one in \p a, \p b, then do \p
+/// second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The smaller one of \p a, \p b and \p second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_min(AT a, BT b, CT c, BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b, c, minimum(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return smaller one with saturation.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The smaller one of the two extended values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_min_sat(AT a, BT b) {
+  return detail::extend_binary<RetT, true>(a, b, minimum());
+}
+
+/// Extend Inputs to 33 bit, find the smaller one in \p a, \p b with saturation,
+/// then do \p second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The smaller one of \p a, \p b with saturation and \p
+/// second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_min_sat(AT a, BT b, CT c,
+                                     BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b, c, minimum(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return bigger one.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The bigger one of the two extended values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_max(AT a, BT b) {
+  return detail::extend_binary<RetT, false>(a, b, maximum());
+}
+
+/// Extend Inputs to 33 bit, find the bigger one in \p a, \p b, then do \p
+/// second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The bigger one of \p a, \p b and \p second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_max(AT a, BT b, CT c, BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b, c, maximum(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return bigger one with saturation.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \returns The bigger one of the two extended values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_max_sat(AT a, BT b) {
+  return detail::extend_binary<RetT, true>(a, b, maximum());
+}
+
+/// Extend Inputs to 33 bit, find the bigger one in \p a, \p b with saturation,
+/// then do \p second_op with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] CT The type of the third value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] second_op The operation to do with the third value
+/// \returns The bigger one of \p a, \p b with saturation and \p
+/// second_op with \p c
+template <typename RetT, typename AT, typename BT, typename CT,
+          typename BinaryOperation>
+inline constexpr RetT extend_max_sat(AT a, BT b, CT c,
+                                     BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b, c, maximum(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and compare input values using specified
+/// comparison \p cmp .
+///
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] cmp The comparsion operator
+/// \returns The comparison result of the two extended values.
+template <typename AT, typename BT, typename BinaryOperation>
+inline constexpr unsigned extend_compare(AT a, BT b, BinaryOperation cmp) {
+  return detail::extend_binary<unsigned, false>(a, b, cmp);
+}
+
+/// Extend Inputs to 33 bit, and compare input values using specified comparison
+/// \p cmp , then do \p second_op with \p c .
+///
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \tparam [in] SecondBinaryOperation The type of the second operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] cmp The comparsion operator
+/// \param [in] second_op The operation to do with the third value
+/// \returns The comparison result of the two extended values. and \p second_op
+/// with \p c .
+template <typename AT, typename BT, typename BinaryOperation,
+          typename SecondBinaryOperation>
+inline constexpr unsigned extend_compare(AT a, BT b, unsigned c,
+                                         BinaryOperation cmp,
+                                         SecondBinaryOperation second_op) {
+  return detail::extend_binary<unsigned, false>(a, b, c, cmp, second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return a << clamp(b, 0, 32).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns a << clamp(b, 0, 32)
+template <typename RetT, typename T>
+inline constexpr RetT extend_shl_clamp(T a, uint32_t b) {
+  return detail::extend_binary<RetT, false>(a, sycl::clamp(b, 0u, 32u),
+                                            detail::shift_left());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(a << clamp(b, 0, 32), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(a << clamp(b, 0, 32), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shl_clamp(T a, uint32_t b, uint32_t c,
+                                       BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, sycl::clamp(b, 0u, 32u), c,
+                                            detail::shift_left(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return sat(a << clamp(b, 0, 32)).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns sat(a << clamp(b, 0, 32))
+template <typename RetT, typename T>
+inline constexpr RetT extend_shl_sat_clamp(T a, uint32_t b) {
+  return detail::extend_binary<RetT, true>(a, sycl::clamp(b, 0u, 32u),
+                                           detail::shift_left());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(sat(a << clamp(b, 0, 32)), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(sat(a << clamp(b, 0, 32)), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shl_sat_clamp(T a, uint32_t b, uint32_t c,
+                                           BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, sycl::clamp(b, 0u, 32u), c,
+                                           detail::shift_left(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return a << (b & 0x1F).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns a << (b & 0x1F)
+template <typename RetT, typename T>
+inline constexpr RetT extend_shl_wrap(T a, uint32_t b) {
+  return detail::extend_binary<RetT, false>(a, b & 0x1F, detail::shift_left());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(a << (b & 0x1F), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(a << (b & 0x1F), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shl_wrap(T a, uint32_t b, uint32_t c,
+                                      BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b & 0x1F, c,
+                                            detail::shift_left(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return sat(a << (b & 0x1F)).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns sat(a << (b & 0x1F))
+template <typename RetT, typename T>
+inline constexpr RetT extend_shl_sat_wrap(T a, uint32_t b) {
+  return detail::extend_binary<RetT, true>(a, b & 0x1F, detail::shift_left());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(sat(a << (b & 0x1F)), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(sat(a << (b & 0x1F)), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shl_sat_wrap(T a, uint32_t b, uint32_t c,
+                                          BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b & 0x1F, c, detail::shift_left(),
+                                           second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return a >> clamp(b, 0, 32).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns a >> clamp(b, 0, 32)
+template <typename RetT, typename T>
+inline constexpr RetT extend_shr_clamp(T a, uint32_t b) {
+  return detail::extend_binary<RetT, false>(a, sycl::clamp(b, 0u, 32u),
+                                            detail::shift_right());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(a >> clamp(b, 0, 32), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(a >> clamp(b, 0, 32), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shr_clamp(T a, uint32_t b, uint32_t c,
+                                       BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, sycl::clamp(b, 0u, 32u), c,
+                                            detail::shift_right(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return sat(a >> clamp(b, 0, 32)).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns sat(a >> clamp(b, 0, 32))
+template <typename RetT, typename T>
+inline constexpr RetT extend_shr_sat_clamp(T a, uint32_t b) {
+  return detail::extend_binary<RetT, true>(a, sycl::clamp(b, 0u, 32u),
+                                           detail::shift_right());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(sat(a >> clamp(b, 0, 32)), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(sat(a >> clamp(b, 0, 32)), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shr_sat_clamp(T a, uint32_t b, uint32_t c,
+                                           BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, sycl::clamp(b, 0u, 32u), c,
+                                           detail::shift_right(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return a >> (b & 0x1F).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns a >> (b & 0x1F)
+template <typename RetT, typename T>
+inline constexpr RetT extend_shr_wrap(T a, uint32_t b) {
+  return detail::extend_binary<RetT, false>(a, b & 0x1F, detail::shift_right());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(a >> (b & 0x1F), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(a >> (b & 0x1F), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shr_wrap(T a, uint32_t b, uint32_t c,
+                                      BinaryOperation second_op) {
+  return detail::extend_binary<RetT, false>(a, b & 0x1F, c,
+                                            detail::shift_right(), second_op);
+}
+
+/// Extend \p a and \p b to 33 bit and return sat(a >> (b & 0x1F)).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \returns sat(a >> (b & 0x1F))
+template <typename RetT, typename T>
+inline constexpr RetT extend_shr_sat_wrap(T a, uint32_t b) {
+  return detail::extend_binary<RetT, true>(a, b & 0x1F, detail::shift_right());
+}
+
+/// Extend Inputs to 33 bit, and return second_op(sat(a >> (b & 0x1F)), c).
+/// \param [in] a The source value
+/// \param [in] b The offset to shift
+/// \param [in] c The value to merge
+/// \param [in] second_op The operation to do with the third value
+/// \returns second_op(sat(a >> (b & 0x1F)), c)
+template <typename RetT, typename T, typename BinaryOperation>
+inline constexpr RetT extend_shr_sat_wrap(T a, uint32_t b, uint32_t c,
+                                          BinaryOperation second_op) {
+  return detail::extend_binary<RetT, true>(a, b & 0x1F, c,
+                                           detail::shift_right(), second_op);
+}
+
+/// Compute vectorized addition of \p a and \p b, with each value treated as a
+/// 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized addition of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c, std::plus());
+}
+
+/// Compute vectorized addition of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized addition of the two
+/// values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, std::plus());
+}
+
+/// Compute vectorized addition of \p a and \p b with saturation, with each
+/// value treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized addition of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, std::plus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b, with each value treated as
+/// a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized subtraction of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c, std::minus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b, with each value treated as
+/// a 2 elements vector type and extend each element to 17 bit. Then add each
+/// half of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized subtraction of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, std::minus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b with saturation, with each
+/// value treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized subtraction of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, std::minus());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized abs_diff of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized abs_diff of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b with saturation, with each
+/// value treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized abs_diff of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized minimum of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized minimum of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c, minimum());
+}
+
+/// Compute vectorized minimum of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized minimum of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, minimum());
+}
+
+/// Compute vectorized minimum of \p a and \p b with saturation, with each value
+/// treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized minimum of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, minimum());
+}
+
+/// Compute vectorized maximum of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized maximum of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c, maximum());
+}
+
+/// Compute vectorized maximum of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized maximum of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, maximum());
+}
+
+/// Compute vectorized maximum of \p a and \p b with saturation, with each value
+/// treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized maximum of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, maximum());
+}
+
+/// Extend \p a and \p b to 33 bit and vectorized compare input values using
+///
+/// specified comparison \p cmp .
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] cmp The comparsion operator
+/// \returns The comparison result of the two extended values.
+template <typename AT, typename BT, typename BinaryOperation>
+inline constexpr unsigned extend_vcompare2(AT a, BT b, BinaryOperation cmp) {
+  return detail::extend_vbinary2<unsigned, false, false>(a, b, 0, cmp);
+}
+
+/// Extend Inputs to 33 bit, and vectorized compare input values using specified
+/// comparison \p cmp , then add the result with \p c .
+///
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] cmp The comparsion operator
+/// \returns The comparison result of the two extended values, and add the
+/// result with \p c .
+template <typename AT, typename BT, typename BinaryOperation>
+inline constexpr unsigned extend_vcompare2_add(AT a, BT b, unsigned c,
+                                               BinaryOperation cmp) {
+  return detail::extend_vbinary2<unsigned, false, true>(a, b, c, cmp);
+}
+
+/// Compute vectorized average of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized average of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg2(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, false>(a, b, c,
+                                                     detail::average());
+}
+
+/// Compute vectorized average of \p a and \p b, with each value treated as a 2
+/// elements vector type and extend each element to 17 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend average maximum of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg2_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, false, true>(a, b, c, detail::average());
+}
+
+/// Compute vectorized average of \p a and \p b with saturation, with each value
+/// treated as a 2 elements vector type and extend each element to 17 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized average of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg2_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary2<RetT, true, false>(a, b, c, detail::average());
+}
+
+/// Compute vectorized addition of \p a and \p b, with each value treated as a
+/// 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized addition of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c, std::plus());
+}
+
+/// Compute vectorized addition of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized addition of the two
+/// values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, std::plus());
+}
+
+/// Compute vectorized addition of \p a and \p b with saturation, with each
+/// value treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized addition of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vadd4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, std::plus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b, with each value treated as
+/// a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized subtraction of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c, std::minus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b, with each value treated as
+/// a 4 elements vector type and extend each element to 9 bit. Then add each
+/// half of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized subtraction of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, std::minus());
+}
+
+/// Compute vectorized subtraction of \p a and \p b with saturation, with each
+/// value treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized subtraction of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vsub4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, std::minus());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized abs_diff of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized abs_diff of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized abs_diff of \p a and \p b with saturation, with each
+/// value treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized abs_diff of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vabsdiff4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, abs_diff());
+}
+
+/// Compute vectorized minimum of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized minimum of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c, minimum());
+}
+
+/// Compute vectorized minimum of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized minimum of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, minimum());
+}
+
+/// Compute vectorized minimum of \p a and \p b with saturation, with each value
+/// treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized minimum of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmin4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, minimum());
+}
+
+/// Compute vectorized maximum of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized maximum of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c, maximum());
+}
+
+/// Compute vectorized maximum of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized maximum of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, maximum());
+}
+
+/// Compute vectorized maximum of \p a and \p b with saturation, with each value
+/// treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized maximum of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vmax4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, maximum());
+}
+
+/// Extend \p a and \p b to 33 bit and vectorized compare input values using
+///
+/// specified comparison \p cmp .
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] cmp The comparsion operator
+/// \returns The comparison result of the two extended values.
+template <typename AT, typename BT, typename BinaryOperation>
+inline constexpr unsigned extend_vcompare4(AT a, BT b, BinaryOperation cmp) {
+  return detail::extend_vbinary4<unsigned, false, false>(a, b, 0, cmp);
+}
+
+/// Extend Inputs to 33 bit, and vectorized compare input values using specified
+/// comparison \p cmp , then add the result with \p c .
+///
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \tparam [in] BinaryOperation The type of the compare operation
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \param [in] cmp The comparsion operator
+/// \returns The comparison result of the two extended values, and add the
+/// result with \p c .
+template <typename AT, typename BT, typename BinaryOperation>
+inline constexpr unsigned extend_vcompare4_add(AT a, BT b, unsigned c,
+                                               BinaryOperation cmp) {
+  return detail::extend_vbinary4<unsigned, false, true>(a, b, c, cmp);
+}
+
+/// Compute vectorized average of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized average of the two values
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg4(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, false>(a, b, c,
+                                                     detail::average());
+}
+
+/// Compute vectorized average of \p a and \p b, with each value treated as a 4
+/// elements vector type and extend each element to 9 bit. Then add each half
+/// of the result and add with \p c.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The addition of each half of extend vectorized average of the
+/// two values and the third value
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg4_add(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, false, true>(a, b, c, detail::average());
+}
+
+/// Compute vectorized average of \p a and \p b with saturation, with each value
+/// treated as a 4 elements vector type and extend each element to 9 bit.
+/// \tparam [in] RetT The type of the return value, can only be 32 bit integer
+/// \tparam [in] AT The type of the first value, can only be 32 bit integer
+/// \tparam [in] BT The type of the second value, can only be 32 bit integer
+/// \param [in] a The first value
+/// \param [in] b The second value
+/// \param [in] c The third value
+/// \returns The extend vectorized average of the two values with saturation
+template <typename RetT, typename AT, typename BT>
+inline constexpr RetT extend_vavrg4_sat(AT a, BT b, RetT c) {
+  return detail::extend_vbinary4<RetT, true, false>(a, b, c, detail::average());
+}
+
+namespace experimental {
+namespace matrix {
+namespace syclex = sycl::ext::oneapi::experimental;
+struct row_major
+    : public std::integral_constant<syclex::matrix::layout,
+                                    syclex::matrix::layout::row_major> {};
+struct col_major
+    : public std::integral_constant<syclex::matrix::layout,
+                                    syclex::matrix::layout::col_major> {};
+struct a : public std::integral_constant<syclex::matrix::use,
+                                         syclex::matrix::use::a> {};
+struct b : public std::integral_constant<syclex::matrix::use,
+                                         syclex::matrix::use::b> {};
+struct accumulator
+    : public std::integral_constant<syclex::matrix::use,
+                                    syclex::matrix::use::accumulator> {};
+
+template <class use, int m, int n, int k> struct matrix_size_traits;
+template <int m, int n, int k> struct matrix_size_traits<a, m, n, k> {
+  static constexpr int rows = m;
+  static constexpr int cols = k;
+};
+
+template <int m, int n, int k> struct matrix_size_traits<b, m, n, k> {
+  static constexpr int rows = k;
+  static constexpr int cols = n;
+};
+
+template <int m, int n, int k> struct matrix_size_traits<accumulator, m, n, k> {
+  static constexpr int rows = m;
+  static constexpr int cols = n;
+};
+
+// A class that wraps the syclex::matrix::joint_matrix class and provides
+// copy constructor and assignment operator.
+template <typename use, int m, int n, int k, typename T,
+          typename layout = std::integral_constant<
+              syclex::matrix::layout, syclex::matrix::layout::dynamic>>
+class joint_matrix {
+  using joint_matrix_type = syclex::matrix::joint_matrix<
+      sycl::sub_group, T, use::value, matrix_size_traits<use, m, n, k>::rows,
+      matrix_size_traits<use, m, n, k>::cols, layout::value>;
+
+  static inline decltype(auto) get_wi_data(joint_matrix_type &matrix) {
+    return sycl::ext::oneapi::detail::get_wi_data(
+        sycl::ext::oneapi::this_work_item::get_sub_group(), matrix);
+  }
+
+public:
+  joint_matrix()
+      : matrix(), x(matrix), num_elements(get_wi_data(matrix).length()) {}
+  joint_matrix(joint_matrix &other)
+      : x(matrix), num_elements(get_wi_data(matrix).length()) {
+    syclex::matrix::joint_matrix_copy(
+        sycl::ext::oneapi::this_work_item::get_sub_group(), other.get(),
+        matrix);
+  }
+  joint_matrix &operator=(joint_matrix &other) {
+    if (this != &other) {
+      syclex::matrix::joint_matrix_copy(
+          sycl::ext::oneapi::this_work_item::get_sub_group(), other.get(),
+          matrix);
+    }
+    return *this;
+  }
+
+  joint_matrix_type &get() { return matrix; }
+
+  const joint_matrix_type &get() const { return matrix; }
+
+  class matrix_accessor {
+    friend joint_matrix;
+    joint_matrix_type &matrix;
+    matrix_accessor(joint_matrix_type &matrix) : matrix(matrix) {}
+
+  public:
+    decltype(auto) operator[](unsigned I) { return get_wi_data(matrix)[I]; }
+    decltype(auto) operator[](unsigned I) const {
+      return get_wi_data(matrix)[I];
+    }
+  };
+
+private:
+  joint_matrix_type matrix;
+
+public:
+  matrix_accessor x;
+  const size_t num_elements;
+};
+
+/// Collectively loads 1 8x8 b16 (128 bytes) matrix from local memory to private
+/// memory per sub-group. Requires the sub-group size of kernel calling this
+/// function to be 32.
+/// 'mat' specifies the matrix index to be loaded. The first '(mat + 1) * 8'
+/// work items of sub-group contain the starting address of their respective
+/// matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// load 32-bits (2 packed 16-bit data) into 'm' for a total of 128 bytes.
+/// 'trans' specifies to perform a transposed/non-transposed load by each work
+/// item like below
+/// Row Major: Each row of the matrix is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrix is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m The private memory to store the matrix. It points to 2 b16
+/// type elements.
+/// \param [in] trans Indicates whether the matrix to be loaded transposed
+/// \param [in] mat The matrix index to be loaded
+template <typename T>
+void ldmatrix(uintptr_t addr, T *m, bool trans = false, unsigned mat = 0) {
+  auto sg = sycl::ext::oneapi::this_work_item::get_sub_group();
+  int lane = sg.get_local_linear_id();
+
+  int lane_group8_row = lane / 8;
+  int lane_group8_col = lane % 8;
+
+  if (!trans) {
+    // calculate the source lane
+    int src_lane = 2 * lane_group8_row;
+    if (lane_group8_col >= 4)
+      src_lane += 1;
+
+    // Broadcast the address from the source lane
+    auto recv_addr_uintp =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane);
+
+    // Cast the received address from uintptr_t to the type of 'm'
+    auto recv_addr = reinterpret_cast<T *>(recv_addr_uintp);
+
+    // Non-transposed load
+    *m = recv_addr[lane_group8_col % 4];
+  } else {
+    // calculate the source lane
+    int src_lane = (lane % 4) * 2;
+
+    // Broadcast the address from the source lane
+    auto recv_addr_uintp_1 =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane);
+    auto recv_addr_uintp_2 =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane + 1);
+
+    // Cast the received address from uintptr_t to 'half *'
+    auto recv_addr_1 = reinterpret_cast<sycl::half *>(recv_addr_uintp_1);
+    auto recv_addr_2 = reinterpret_cast<sycl::half *>(recv_addr_uintp_2);
+
+    // Transposed load
+    int index = lane / 4;
+    sycl::half val0 = recv_addr_1[index];
+    sycl::half val1 = recv_addr_2[index];
+
+    // Combine the two 16-bits into one 32-bit value
+    sycl::half2 val = sycl::half2(val0, val1);
+    *m = *reinterpret_cast<T *>(&val);
+  }
+}
+
+/// Collectively loads 2 8x8 b16 (256 bytes) matrix from local memory to private
+/// memory per sub-group. Requires the sub-group size of kernel calling this
+/// function to be 32.
+/// The first 16 work items of sub-group contain the starting address of their
+/// respective matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// load 64-bits (32-bits per matrix) into 'm1' & 'm2' for a total of 256 bytes.
+/// 'trans' specifies to perform a transposed/non-transposed load by each work
+/// item like below
+/// Row Major: Each row of the matrices is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrices is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m1 The private memory to store the data of 1st matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m2 The private memory to store the data of 2nd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] trans Indicates whether the matrix to be loaded transposed
+template <typename T>
+void ldmatrix(uintptr_t addr, T *m1, T *m2, bool trans = false) {
+  // Load 1st matrix
+  ldmatrix(addr, m1, trans, 0);
+  // Load 2nd matrix
+  ldmatrix(addr, m2, trans, 1);
+}
+
+/// Collectively loads 4 8x8 b16 (512 bytes) matrix from local memory to private
+/// memory per sub-group. Requires the sub-group size of kernel calling this
+/// function to be 32.
+/// Each work item of sub-group contains the starting address of their
+/// respective matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// load 128-bits (32-bits per matrix) into 'm1', 'm2', 'm3' & 'm4' for a total
+/// of 512 bytes.
+/// 'trans' specifies to perform a transposed/non-transposed load by each work
+/// item like below
+/// Row Major: Each row of the matrices is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrices is loaded by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m1 The private memory to store the data of 1st matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m2 The private memory to store the data of 2nd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m3 The private memory to store the data of 3rd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m4 The private memory to store the data of 4th matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] trans Indicates whether the matrix to be loaded transposed
+template <typename T>
+void ldmatrix(uintptr_t addr, T *m1, T *m2, T *m3, T *m4, bool trans = false) {
+  // Load 1st matrix
+  ldmatrix(addr, m1, trans, 0);
+  // Load 2nd matrix
+  ldmatrix(addr, m2, trans, 1);
+  // Load 3rd matrix
+  ldmatrix(addr, m3, trans, 2);
+  // Load 4th matrix
+  ldmatrix(addr, m4, trans, 3);
+}
+
+/// Collectively stores 1 8x8 b16 (128 bytes) matrix from private memory to
+/// local memory per sub-group.
+/// Requires the sub-group size of kernel calling this function to be 32.
+/// 'mat' specifies the matrix index to be stored. The first '(mat + 1) * 8'
+/// work items of sub-group contain the starting address of their respective
+/// matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// store 32-bits (2 packed 16-bit data) into 'm' for a total of 128 bytes.
+/// 'trans' specifies to perform a transposed/non-transposed store by each work
+/// item like below
+/// Row Major: Each row of the matrix is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrix is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m The local memory to store the matrix. It points to 2 b16
+/// type elements.
+/// \param [in] trans Indicates whether the matrix to be stored transposed
+/// \param [in] mat The matrix index to be stored
+template <typename T>
+void stmatrix(uintptr_t addr, T m, bool trans = false, unsigned mat = 0) {
+  auto sg = sycl::ext::oneapi::this_work_item::get_sub_group();
+  int lane = sg.get_local_linear_id();
+
+  int lane_group8_row = lane / 8;
+  int lane_group8_col = lane % 8;
+
+  if (!trans) {
+    // calculate the source lane
+    int src_lane = 2 * lane_group8_row;
+    if (lane_group8_col >= 4)
+      src_lane += 1;
+
+    // Broadcast the address from the source lane
+    auto recv_addr_uintp =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane);
+
+    // Cast the received address from uintptr_t to the type of 'm'
+    auto recv_addr = reinterpret_cast<T *>(recv_addr_uintp);
+
+    // Non-transposed store
+    recv_addr[lane_group8_col % 4] = m;
+  } else {
+    // calculate the source lane
+    int src_lane = (lane % 4) * 2;
+
+    // Broadcast the address from the source lane
+    auto recv_addr_uintp_1 =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane);
+    auto recv_addr_uintp_2 =
+        dpct::select_from_sub_group(sg, addr, mat * 8 + src_lane + 1);
+
+    // Cast the received address from uintptr_t to 'half *'
+    auto recv_addr_1 = reinterpret_cast<sycl::half *>(recv_addr_uintp_1);
+    auto recv_addr_2 = reinterpret_cast<sycl::half *>(recv_addr_uintp_2);
+
+    // Split the 32-bit value of 'm' into two 16-bits
+    sycl::half *val = reinterpret_cast<sycl::half *>(&m);
+
+    // Transposed store
+    int index = lane / 4;
+    recv_addr_1[index] = val[0];
+    recv_addr_2[index] = val[1];
+  }
+}
+
+/// Collectively stores 2 8x8 b16 (256 bytes) matrix from private memory to
+/// local memory per sub-group.
+/// Requires the sub-group size of kernel calling this function to be 32.
+/// The first 16 work items of sub-group contain the starting address of their
+/// respective matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// store 64-bits (32-bits per matrix) into 'm1' & 'm2' for a total of 256
+/// bytes.
+/// 'trans' specifies to perform a transposed/non-transposed store by each work
+/// item like below
+/// Row Major: Each row of the matrices is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrices is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m1 The local memory to store the data of 1st matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m2 The local memory to store the data of 2nd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] trans Indicates whether the matrix to be stored transposed
+template <typename T>
+void stmatrix(uintptr_t addr, T m1, T m2, bool trans = false) {
+  // Store 1st matrix
+  stmatrix(addr, m1, trans, 0);
+  // Store 2nd matrix
+  stmatrix(addr, m2, trans, 1);
+}
+
+/// Collectively stores 4 8x8 b16 (512 bytes) matrix from private memory to
+/// local memory per sub-group.
+/// Requires the sub-group size of kernel calling this function to be 32.
+/// Each work item of sub-group contains the starting address of their
+/// respective matrix row in 'addr'.
+/// After distributing addresses to other work items, each of the 32 work items
+/// store 128-bits (32-bits per matrix) into 'm1', 'm2', 'm3' & 'm4' for a total
+/// of 512 bytes.
+/// 'trans' specifies to perform a transposed/non-transposed store by each work
+/// item like below
+/// Row Major: Each row of the matrices is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi0 wi1 wi1 ... wi3 wi3
+/// row-1: wi4 wi4 wi5 wi5 ... wi7 wi7
+/// ...
+/// row-6: wi24 wi24 wi25 wi25 ... wi27 wi27
+/// row-7: wi28 wi28 wi29 wi29 ... wi31 wi31
+/// Col Major: Each col of the matrices is stored by a group of 4 work items(wi)
+/// row-0: wi0 wi4 wi8 ... wi28
+/// row-1: wi0 wi4 wi8 ... wi28
+/// ...
+/// row-6: wi3 wi7 wi11 ... wi31
+/// row-7: wi3 wi7 wi11 ... wi31
+/// \tparam [in] T Type of result variable (currently only supports 16-bit type)
+/// \param [in] addr The starting address of corresponding matrix row for a work
+/// item in local memory
+/// \param [in] m1 The local memory to store the data of 1st matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m2 The local memory to store the data of 2nd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m3 The local memory to store the data of 3rd matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] m4 The local memory to store the data of 4th matrix. It points
+/// to 2 b16 type elements.
+/// \param [in] trans Indicates whether the matrix to be stored transposed
+template <typename T>
+void stmatrix(uintptr_t addr, T m1, T m2, T m3, T m4, bool trans = false) {
+  // Store 1st matrix
+  stmatrix(addr, m1, trans, 0);
+  // Store 2nd matrix
+  stmatrix(addr, m2, trans, 1);
+  // Store 3rd matrix
+  stmatrix(addr, m3, trans, 2);
+  // Store 4th matrix
+  stmatrix(addr, m4, trans, 3);
+}
+
+/// A helper struct that defines the pack type for the input matrix fragments
+/// of mma() function based on the type of input matrix fragments.
+/// The MMAType struct is specialized for different types of input matrices.
+/// Currently, the specialization for f16, bf16 and s8 types is defined below.
+/// \tparam [in] T The type of the input matrix fragments
+template <typename T> struct MMAType {
+  using PackType = uint32_t;
+};
+
+/// Each work item of a sub-group (limited to size 32) calling this function
+/// calculates a subset fragment for the output matrix D using MAD operation on
+/// A, B & C matrix fragments (D = A * B + C).
+/// Current supported shapes & types:
+/// - m8n8k4 (f32.f16.f16.f32)
+/// - m8n8k16 (s32.s8.s8.s32)
+/// - m16n8k8 (f32.f16.f16.f32 & f32.bf16.bf16.f32)
+/// - m16n8k16 (f32.f16.f16.f32 & s32.s8.s8.s32)
+/// - m16n8k32 (s32.s8.s8.s32)
+/// Here, m, n & k define the shapes of A, B & C matrices respectively
+/// (A = [m x k], B = [k x n], C = [m x n]).
+/// \tparam [in] M The rows of A, C & D matrices
+/// \tparam [in] N The columns of B, C, D matrices
+/// \tparam [in] K The columns & rows of A & B matrices respectively
+/// \tparam [in] ABType The type of the input matrix (A & B) fragment
+/// \tparam [in] CDType The type of the output matrix (C & D) fragment
+/// \param [out] d_mat_frag The fragment of the output matrix D to store the
+/// result of A * B + C
+/// \param [in] a_mat_frag The fragment of the input matrix A to be multiplied
+/// with B matrix fragment
+/// \param [in] b_mat_frag The fragment of the input matrix B to be multiplied
+/// with A matrix fragment
+/// \param [in] c_mat_frag The fragment of the input matrix C to be added with
+/// the result of A * B fragments
+template <int M, int N, int K, typename ABType, typename CDType>
+void mma(volatile void **d_mat_frag, void *a_mat_frag, void *b_mat_frag,
+         void *c_mat_frag) {
+  auto d = reinterpret_cast<volatile CDType **>(d_mat_frag);
+  auto a = reinterpret_cast<typename MMAType<ABType>::PackType *>(a_mat_frag);
+  auto b = reinterpret_cast<typename MMAType<ABType>::PackType *>(b_mat_frag);
+  auto c = reinterpret_cast<CDType *>(c_mat_frag);
+
+  auto sg = sycl::ext::oneapi::this_work_item::get_sub_group();
+  int lane = sg.get_local_linear_id();
+
+  static_assert((M == 8 && N == 8 && K == 4) || (M == 8 && N == 8 && K == 16) ||
+                    (M == 16 && N == 8 && K == 8) ||
+                    (M == 16 && N == 8 && K == 16) ||
+                    (M == 16 && N == 8 && K == 32),
+                "Unsupported MMA shape!");
+
+  short row_load_offset = 4 * (lane >> 2);
+  short col_load_offset = 8 * (lane % 4);
+
+  if constexpr (M == 8 && N == 8 && K == 4) {
+    if constexpr (std::is_floating_point_v<CDType>) {
+      col_load_offset = row_load_offset % 16;
+
+      // Init D matrix with fragments of C matrix
+      *d[0] = c[0];
+      *d[1] = c[1];
+      *d[2] = c[2];
+      *d[3] = c[3];
+      *d[4] = c[4];
+      *d[5] = c[5];
+      *d[6] = c[6];
+      *d[7] = c[7];
+
+      // Calculate the row and col offset indices to iterate through the row &
+      // col fragments of A & B matrices
+      int r_ind = (lane % 2) ? 1 : 0;
+      int c_ind = ((lane % 4) / 2) ? 2 : 0;
+
+      // Each sub-group is responsible for computing a fragment size of 8*8
+      // elements of matrix D for each of 4 MMA computations.
+      // Each work item computes 8 elements of matrix D by gathering
+      // their corresponding col & row matrix fragments of length k (4)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = (i % 4) if (lane < 16) else (i % 4) + 4
+      // col0 = (lane % 4)
+      // As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      typename MMAType<ABType>::PackType recv_a[2], recv_b[2];
+
+      for (int i = 0; i < 4; i++) {
+        // Load partial fragment from col0 of matrix A ({a0, a1})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from col0 of matrix A ({a2, a3})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[1], row_load_offset + i);
+
+        // Load partial fragment from row0 of matrix B ({b0, b1})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from row0 of matrix B ({b2, b3})
+        recv_b[1] = dpct::select_from_sub_group(sg, b[1], col_load_offset + i);
+
+        auto ra = reinterpret_cast<ABType *>(recv_a);
+        auto rb = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // (for even work item indices)
+        // d0 += col0{ a0 } * row0{ b0 }
+        // d1 += col0{ a0 } * row0{ b1 }
+        // d2 += col1{ a2 } * row0{ b0 }
+        // d3 += col1{ a2 } * row0{ b1 }
+        // (for odd work item indices)
+        // d0 += col0{ a1 } * row0{ b2 }
+        // d1 += col0{ a1 } * row0{ b3 }
+        // d2 += col1{ a3 } * row0{ b2 }
+        // d3 += col1{ a3 } * row0{ b3 }
+        *d[0] += static_cast<float>(ra[r_ind]) * static_cast<float>(rb[c_ind]);
+        *d[1] +=
+            static_cast<float>(ra[r_ind]) * static_cast<float>(rb[c_ind + 1]);
+        *d[2] +=
+            static_cast<float>(ra[r_ind + 2]) * static_cast<float>(rb[c_ind]);
+        *d[3] += static_cast<float>(ra[r_ind + 2]) *
+                 static_cast<float>(rb[c_ind + 1]);
+
+        // Load partial fragment from row1 of matrix B ({b0, b1})
+        recv_b[0] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + i + 16);
+        // Load partial fragment from row1 of matrix B ({b2, b3})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[1], col_load_offset + i + 16);
+
+        // (for even work item indices)
+        // d0 += col0{ a0 } * row1{ b0 }
+        // d1 += col0{ a0 } * row1{ b1 }
+        // d2 += col1{ a2 } * row1{ b0 }
+        // d3 += col1{ a2 } * row1{ b1 }
+        // (for odd work item indices)
+        // d0 += col0{ a1 } * row1{ b2 }
+        // d1 += col0{ a1 } * row1{ b3 }
+        // d2 += col1{ a3 } * row1{ b2 }
+        // d3 += col1{ a3 } * row1{ b3 }
+        *d[4] += static_cast<float>(ra[r_ind]) * static_cast<float>(rb[c_ind]);
+        *d[5] +=
+            static_cast<float>(ra[r_ind]) * static_cast<float>(rb[c_ind + 1]);
+        *d[6] +=
+            static_cast<float>(ra[r_ind + 2]) * static_cast<float>(rb[c_ind]);
+        *d[7] += static_cast<float>(ra[r_ind + 2]) *
+                 static_cast<float>(rb[c_ind + 1]);
+      }
+    }
+  } else if constexpr (M == 8 && N == 8 && K == 16) {
+    if constexpr (std::is_integral_v<ABType>) {
+      // Init D matrix with fragments of C matrix
+      *d[0] = c[0];
+      *d[1] = c[1];
+
+      // Each sub-group is responsible for computing a fragment size of 16*8
+      // elements of matrix D.
+      // Each work item computes 2 elements of matrix D by gathering
+      // their corresponding row & col matrix fragments of length k (16)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = ((lane % 4) * 4) + i
+      // col0 = (lane >> 2)
+      // As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a, recv_b[2];
+
+        // Load partial fragment from row0 of matrix A ({a0, a1, a2, a3})
+        recv_a = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b0, b1, b2, b3})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b0, b1, b2, b3})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + i + 4);
+
+        auto a = reinterpret_cast<ABType *>(&recv_a);
+        auto b = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d1 += row0{ a0, a1, a2, a3 } * col1{ b0, b1, b2, b3 }
+        // d2 += row0{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d3 += row0{ a0, a1, a2, a3 } * col1{ b0, b1, b2, b3 }
+        for (int j = 0; j < 4; j++) {
+          *d[0] += a[j] * b[j];
+          *d[1] += a[j] * b[j + 4];
+        }
+      }
+    }
+  } else if constexpr (M == 16 && N == 8 && K == 8) {
+    if constexpr (std::is_floating_point_v<CDType>) {
+      // Init D matrix fragment with C matrix fragment
+      *d[0] = c[0];
+      *d[1] = c[1];
+      *d[2] = c[2];
+      *d[3] = c[3];
+
+      // Each sub-group is responsible for computing a fragment size of 16*8
+      // elements of matrix D.
+      // Each work item computes 4 elements of matrix D by gathering
+      // their corresponding row & col matrix fragments of length k (8)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = (lane >> 2) & row1 = (lane >> 2) + 8
+      // col0 = (lane % 4) * 2 + (i & 0x1)
+      // As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a[2], recv_b[2];
+
+        // Load partial fragment from row0 of matrix A ({a0, a1})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a2, a3})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[1], row_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b0, b1})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b0, b1})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + i + 4);
+
+        auto ra = reinterpret_cast<ABType *>(recv_a);
+        auto rb = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a0, a1 } * col0{ b0, b1 }
+        // d1 += row0{ a0, a1 } * col1{ b0, b1 }
+        // d2 += row1{ a2, a3 } * col0{ b0, b1 }
+        // d3 += row1{ a2, a3 } * col1{ b0, b1 }
+        for (int j = 0; j < 2; j++) {
+          *d[0] += static_cast<float>(ra[j]) * static_cast<float>(rb[j]);
+          *d[1] += static_cast<float>(ra[j]) * static_cast<float>(rb[j + 2]);
+          *d[2] += static_cast<float>(ra[j + 2]) * static_cast<float>(rb[j]);
+          *d[3] +=
+              static_cast<float>(ra[j + 2]) * static_cast<float>(rb[j + 2]);
+        }
+      }
+    }
+  } else if constexpr (M == 16 && N == 8 && K == 16) {
+    if constexpr (std::is_floating_point_v<CDType>) {
+      // Init D matrix fragment with C matrix fragment
+      *d[0] = c[0];
+      *d[1] = c[1];
+      *d[2] = c[2];
+      *d[3] = c[3];
+
+      // Each sub-group is responsible for computing a fragment size of 16*8
+      // elements of matrix D.
+      // Each work item computes 4 elements of matrix D by gathering
+      // their corresponding row & col matrix fragments of length k (8)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = (lane >> 2)    & row1 = (lane >> 2) + 8
+      // col0 = (lane % 4) * 2 & col1 = (lane % 4) * 2 + 1
+      // As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a[4], recv_b[4];
+
+        // Load partial fragment from row0 of matrix A ({a0, a1})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from row0 of matrix A ({a2, a3})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[2], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a0, a1})
+        recv_a[2] = dpct::select_from_sub_group(sg, a[1], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a2, a3})
+        recv_a[3] = dpct::select_from_sub_group(sg, a[3], row_load_offset + i);
+
+        // Load partial fragment from col0 of matrix B ({b0, b1})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b2, b3})
+        recv_b[1] = dpct::select_from_sub_group(sg, b[1], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b0, b1})
+        recv_b[2] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + 4 + i);
+        // Load partial fragment from col1 of matrix B ({b2, b3})
+        recv_b[3] =
+            dpct::select_from_sub_group(sg, b[1], col_load_offset + 4 + i);
+
+        auto ra = reinterpret_cast<ABType *>(recv_a);
+        auto rb = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d1 += row0{ a0, a1, a2, a3 } * col1{ b0, b1, b2, b3 }
+        // d2 += row1{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d3 += row1{ a0, a1, a2, a3 } * col1{ b0, b1, b2, b3 }
+        for (int j = 0; j < 4; j++) {
+          *d[0] += static_cast<CDType>(ra[j]) * static_cast<CDType>(rb[j]);
+          *d[1] += static_cast<CDType>(ra[j]) * static_cast<CDType>(rb[j + 4]);
+          *d[2] += static_cast<CDType>(ra[j + 4]) * static_cast<CDType>(rb[j]);
+          *d[3] +=
+              static_cast<CDType>(ra[j + 4]) * static_cast<CDType>(rb[j + 4]);
+        }
+      }
+    } else if constexpr (std::is_integral_v<ABType>) {
+      // Init D matrix with fragments of C matrix
+      *d[0] = c[0];
+      *d[1] = c[1];
+      *d[2] = c[2];
+      *d[3] = c[3];
+
+      // Each sub-group is responsible for computing a fragment size of 16*8
+      // elements of matrix D.
+      // Each work item computes 4 elements of matrix D by gathering
+      // their corresponding row & col matrix fragments of length k (8)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = (lane >> 2)    & row1 = (lane >> 2) + 8
+      // col0 = (lane % 4) * 2 & col1 = (lane % 4) * 2 + 1
+      // As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a[2], recv_b[2];
+
+        // Load partial fragment from row0 of matrix A ({a0, a1, a2, a3})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a4, a5, a6, a7})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[1], row_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b0, b1, b2, b3})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b4, b5, b6, b7})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + i + 4);
+
+        auto ra = reinterpret_cast<ABType *>(recv_a);
+        auto rb = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d1 += row0{ a0, a1, a2, a3 } * col1{ b4, b5, b6, b7 }
+        // d2 += row1{ a4, a5, a6, a7 } * col0{ b0, b1, b2, b3 }
+        // d3 += row1{ a4, a5, a6, a7 } * col1{ b4, b5, b6, b7 }
+        for (int i = 0; i < 4; i++) {
+          *d[0] += ra[i] * rb[i];
+          *d[1] += ra[i] * rb[i + 4];
+          *d[2] += ra[i + 4] * rb[i];
+          *d[3] += ra[i + 4] * rb[i + 4];
+        }
+      }
+    }
+  } else if constexpr (M == 16 && N == 8 && K == 32) {
+    if constexpr (std::is_integral_v<ABType>) {
+      // Init D matrix with fragments of C matrix
+      *d[0] = c[0];
+      *d[1] = c[1];
+      *d[2] = c[2];
+      *d[3] = c[3];
+
+      // Each sub-group is responsible for computing a fragment size of 16*8
+      // elements of matrix D.
+      // Each work item computes 4 elements of matrix D by gathering
+      // their corresponding row & col matrix fragments of length k (32)
+      // from A & B matrices respectively using below mapping logic:
+      // row0 = (lane >> 2)    & row1 = (lane >> 2) + 8
+      // col0 = ((lane % 4) * 4) + (i & 0x3) & col1 = ((lane % 4) * 4) + (i &
+      // 0x3) As each row & col fragment of A & B matrices is distributed across
+      // 4 work items, each iteration of below loop loads a partial fragment of
+      // matrix A (row) and matrix B (col) using the row & col offsets.
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a[2], recv_b[2];
+
+        // Load partial fragment from row0 of matrix A ({a0, a1, a2, a3})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[0], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a4, a5, a6, a7})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[1], row_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b0, b1, b2, b3})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[0], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b0, b1, b2, b3})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[0], col_load_offset + i + 4);
+
+        auto a = reinterpret_cast<ABType *>(recv_a);
+        auto b = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a0, a1, a2, a3 } * col0{ b0, b1, b2, b3 }
+        // d1 += row0{ a0, a1, a2, a3 } * col1{ b0, b1, b2, b3 }
+        // d2 += row1{ a4, a5, a6, a7 } * col0{ b0, b1, b2, b3 }
+        // d3 += row1{ a4, a5, a6, a7 } * col1{ b0, b1, b2, b3 }
+        for (int j = 0; j < 4; j++) {
+          *d[0] += a[j] * b[j];
+          *d[1] += a[j] * b[j + 4];
+          *d[2] += a[j + 4] * b[j];
+          *d[3] += a[j + 4] * b[j + 4];
+        }
+      }
+
+      for (int i = 0; i < 4; i++) {
+        typename MMAType<ABType>::PackType recv_a[2], recv_b[2];
+
+        // Load partial fragment from row0 of matrix A ({a8, a9, a10, a11})
+        recv_a[0] = dpct::select_from_sub_group(sg, a[2], row_load_offset + i);
+        // Load partial fragment from row1 of matrix A ({a12, a13, a14, a15})
+        recv_a[1] = dpct::select_from_sub_group(sg, a[3], row_load_offset + i);
+        // Load partial fragment from col0 of matrix B ({b4, b5, b6, b7})
+        recv_b[0] = dpct::select_from_sub_group(sg, b[1], col_load_offset + i);
+        // Load partial fragment from col1 of matrix B ({b4, b5, b6, b7})
+        recv_b[1] =
+            dpct::select_from_sub_group(sg, b[1], col_load_offset + i + 4);
+
+        auto a = reinterpret_cast<ABType *>(recv_a);
+        auto b = reinterpret_cast<ABType *>(recv_b);
+
+        // Each work item calculates a partial product of A & B matrix fragments
+        // and adds it to the corresponding D matrix fragment
+        // d0 += row0{ a8, a9, a10, a11 } * col0{ b4, b5, b6, b7 }
+        // d1 += row0{ a8, a9, a10, a11 } * col1{ b4, b5, b6, b7 }
+        // d2 += row1{ a12, a13, a14, a15 } * col0{ b4, b5, b6, b7 }
+        // d3 += row1{ a12, a13, a14, a15 } * col1{ b4, b5, b6, b7 }
+        for (int j = 0; j < 4; j++) {
+          *d[0] += a[j] * b[j];
+          *d[1] += a[j] * b[j + 4];
+          *d[2] += a[j + 4] * b[j];
+          *d[3] += a[j + 4] * b[j + 4];
+        }
+      }
+    }
+  }
+}
+
+} // namespace matrix
+} // namespace experimental
+
+} // namespace dpct
+
+#endif // __DPCT_MATH_HPP__
diff --git a/sycl/include/dpct/memory.hpp b/sycl/include/dpct/memory.hpp
new file mode 100644
index 00000000000..2ea68a983fc
--- /dev/null
+++ b/sycl/include/dpct/memory.hpp
@@ -0,0 +1,872 @@
+//==---- memory.hpp -------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_MEMORY_HPP__
+#define __DPCT_MEMORY_HPP__
+
+#include "device.hpp"
+#include <sycl/sycl.hpp>
+#include <cassert>
+#include <cstdint>
+#include <cstring>
+#include <mutex>
+#include <unordered_map>
+#include <map>
+#include <utility>
+#include <thread>
+#include <type_traits>
+
+#if defined(__linux__)
+#include <sys/mman.h>
+#elif defined(_WIN64)
+#ifndef NOMINMAX
+#define NOMINMAX
+#endif
+#include <windows.h>
+#else
+#error "Only support Windows and Linux."
+#endif
+
+namespace dpct {
+enum memcpy_direction {
+  host_to_host,
+  host_to_device,
+  device_to_host,
+  device_to_device,
+  automatic
+};
+enum memory_region {
+  global = 0, // device global memory
+  constant,   // device constant memory
+  local,      // device local memory
+  shared,     // memory which can be accessed by host and device
+};
+
+typedef uint8_t byte_t;
+
+/// Buffer type to be used in Memory Management runtime.
+typedef sycl::buffer<byte_t> buffer_t;
+
+class image_matrix;
+
+/// dpct accessor used as device function parameter.
+template <class T, memory_region Memory, size_t Dimension> class accessor;
+static inline void dpct_free(void *ptr, sycl::queue &q);
+template <typename T> static sycl::buffer<T> get_buffer(const void *ptr);
+static buffer_t get_buffer(const void *ptr);
+
+/// Pitched 2D/3D memory data.
+class pitched_data {
+public:
+  pitched_data() : pitched_data(nullptr, 0, 0, 0) {}
+  pitched_data(void *data, size_t pitch, size_t x, size_t y)
+      : _data(data), _pitch(pitch), _x(x), _y(y) {}
+
+  void *get_data_ptr() { return _data; }
+  void set_data_ptr(const void *data) { _data = const_cast<void *>(data); }
+
+  size_t get_pitch() { return _pitch; }
+  void set_pitch(size_t pitch) { _pitch = pitch; }
+
+  size_t get_x() { return _x; }
+  void set_x(size_t x) { _x = x; };
+
+  size_t get_y() { return _y; }
+  void set_y(size_t y) { _y = y; }
+
+private:
+  void *_data;
+  size_t _pitch, _x, _y;
+};
+
+namespace experimental {
+class image_mem_wrapper;
+} // namespace experimental
+
+/// Memory copy parameters for 2D/3D memory data.
+struct memcpy_parameter {
+  struct data_wrapper {
+    pitched_data pitched{};
+    sycl::id<3> pos{};
+    size_t pos_x_in_bytes{0};
+    int dev_id{0};
+#ifdef SYCL_EXT_ONEAPI_BINDLESS_IMAGES
+    experimental::image_mem_wrapper *image_bindless{nullptr};
+#endif
+    image_matrix *image{nullptr};
+  };
+  data_wrapper from{};
+  data_wrapper to{};
+  sycl::range<3> size{};
+  size_t size_x_in_bytes{0};
+  memcpy_direction direction{memcpy_direction::automatic};
+};
+
+} // namespace dpct
+
+#include "detail/memory_detail.hpp"
+namespace dpct {
+
+#ifdef DPCT_USM_LEVEL_NONE
+/// Check if the pointer \p ptr represents device pointer or not.
+///
+/// \param ptr The pointer to be checked.
+/// \returns true if \p ptr is a device pointer.
+template<class T>
+static inline bool is_device_ptr(T ptr) {
+  if constexpr (std::is_pointer<T>::value) {
+    return detail::mem_mgr::instance().is_device_ptr(ptr);
+  }
+  return false;
+}
+/// Get the base address of the allocated memory for the given pointer \p ptr.
+template <class T> static inline void *get_base_addr(T ptr) {
+  if constexpr (std::is_pointer<T>::value) {
+    return detail::mem_mgr::instance().get_base_addr(ptr);
+  }
+  return nullptr;
+}
+#endif
+
+/// Get the buffer and the offset of a piece of memory pointed to by \p ptr.
+///
+/// \param ptr Pointer to a piece of memory.
+/// If NULL is passed as an argument, an exception will be thrown.
+/// \returns a pair containing both the buffer and the offset.
+static std::pair<buffer_t, size_t> get_buffer_and_offset(const void *ptr) {
+  if (ptr) {
+    auto alloc = detail::mem_mgr::instance().translate_ptr(ptr);
+    size_t offset = (byte_t *)ptr - alloc.alloc_ptr;
+    return std::make_pair(alloc.buffer, offset);
+  } else {
+    throw std::runtime_error(
+        "NULL pointer argument in get_buffer_and_offset function is invalid");
+  }
+}
+
+/// Get the data pointed from \p ptr as a 1D buffer reinterpreted as type T.
+template <typename T> static sycl::buffer<T> get_buffer(const void *ptr) {
+  if (!ptr)
+    return sycl::buffer<T>(sycl::range<1>(0));
+  auto alloc = detail::mem_mgr::instance().translate_ptr(ptr);
+  return alloc.buffer.reinterpret<T>(
+      sycl::range<1>(alloc.size / sizeof(T)));
+}
+
+/// Get the buffer of a piece of memory pointed to by \p ptr.
+///
+/// \param ptr Pointer to a piece of memory.
+/// \returns the buffer.
+static buffer_t get_buffer(const void *ptr) {
+  return detail::mem_mgr::instance().translate_ptr(ptr).buffer;
+}
+
+/// A wrapper class contains an accessor and an offset.
+template <typename PtrT,
+          sycl::access_mode accessMode = sycl::access_mode::read_write>
+class access_wrapper {
+  sycl::accessor<byte_t, 1, accessMode> accessor;
+  size_t offset;
+
+public:
+  /// Construct the accessor wrapper for memory pointed by \p ptr.
+  ///
+  /// \param ptr Pointer to memory.
+  /// \param cgh The command group handler.
+  access_wrapper(const void *ptr, sycl::handler &cgh)
+      : accessor(get_buffer(ptr).get_access<accessMode>(cgh)), offset(0) {
+    auto alloc = detail::mem_mgr::instance().translate_ptr(ptr);
+    offset = (byte_t *)ptr - alloc.alloc_ptr;
+  }
+  template <typename U = PtrT>
+  access_wrapper(
+      PtrT ptr, sycl::handler &cgh,
+      typename std::enable_if_t<!std::is_same_v<
+          std::remove_cv_t<std::remove_reference_t<U>>, void *>> * = 0)
+      : access_wrapper((const void *)ptr, cgh) {}
+
+  /// Get the device pointer.
+  ///
+  /// \returns a device pointer with offset.
+  PtrT get_raw_pointer() const { return (PtrT)(&accessor[0] + offset); }
+};
+
+/// Get the accessor for memory pointed by \p ptr.
+///
+/// \param ptr Pointer to memory.
+/// If NULL is passed as an argument, an exception will be thrown.
+/// \param cgh The command group handler.
+/// \returns an accessor.
+template <typename T,
+          sycl::access_mode accessMode = sycl::access_mode::read_write>
+static auto get_access(const T *ptr, sycl::handler &cgh) {
+  if (ptr) {
+    auto alloc = detail::mem_mgr::instance().translate_ptr(ptr);
+    if constexpr (std::is_same_v<std::remove_reference_t<T>, void>)
+      return alloc.buffer.template get_access<accessMode>(cgh);
+    else
+      return alloc.buffer
+          .template reinterpret<T>(sycl::range<1>(alloc.size / sizeof(T)))
+          .template get_access<accessMode>(cgh);
+  } else {
+    throw std::runtime_error(
+        "NULL pointer argument in get_access function is invalid");
+  }
+}
+
+/// Allocate memory block on the device.
+/// \param num_bytes Number of bytes to allocate.
+/// \param q Queue to execute the allocate task.
+/// \returns A pointer to the newly allocated memory.
+template <typename T>
+static inline void *dpct_malloc(T num_bytes,
+                                sycl::queue &q = get_default_queue()) {
+  return detail::dpct_malloc(static_cast<size_t>(num_bytes), q);
+}
+
+/// Get the host pointer from a buffer that is mapped to virtual pointer ptr.
+/// \param ptr Virtual Pointer mapped to device buffer
+/// \returns A host pointer
+template <typename T> static inline T *get_host_ptr(const void *ptr) {
+  auto BufferOffset = get_buffer_and_offset(ptr);
+  auto host_ptr =
+      BufferOffset.first.get_host_access()
+          .get_pointer();
+  return (T *)(host_ptr + BufferOffset.second);
+}
+
+/// Allocate memory block for 3D array on the device.
+/// \param size Size of the memory block, in bytes.
+/// \param q Queue to execute the allocate task.
+/// \returns A pitched_data object which stores the memory info.
+static inline pitched_data
+dpct_malloc(sycl::range<3> size, sycl::queue &q = get_default_queue()) {
+  pitched_data pitch(nullptr, 0, size.get(0), size.get(1));
+  size_t pitch_size;
+  pitch.set_data_ptr(detail::dpct_malloc(pitch_size, size.get(0), size.get(1),
+                                         size.get(2), q));
+  pitch.set_pitch(pitch_size);
+  return pitch;
+}
+
+/// Allocate memory block for 2D array on the device.
+/// \param [out] pitch Aligned size of x in bytes.
+/// \param x Range in dim x.
+/// \param y Range in dim y.
+/// \param q Queue to execute the allocate task.
+/// \returns A pointer to the newly allocated memory.
+static inline void *dpct_malloc(size_t &pitch, size_t x, size_t y,
+                                sycl::queue &q = get_default_queue()) {
+  return detail::dpct_malloc(pitch, x, y, 1, q);
+}
+
+/// free
+/// \param ptr Point to free.
+/// \param q Queue to execute the free task.
+/// \returns no return value.
+static inline void dpct_free(void *ptr,
+                             sycl::queue &q = get_default_queue()) {
+#ifndef DPCT_USM_LEVEL_NONE
+  dpct::get_device(dpct::get_device_id(q.get_device())).queues_wait_and_throw();
+#endif
+  detail::dpct_free(ptr, q);
+}
+
+/// Free the device memory pointed by a batch of pointers in \p pointers which
+/// are related to \p q after \p events completed.
+///
+/// \param pointers The pointers point to the device memory requested to be freed.
+/// \param events The events to be waited.
+/// \param q The sycl::queue the memory relates to.
+inline void async_dpct_free(const std::vector<void *> &pointers,
+                            const std::vector<sycl::event> &events,
+                            sycl::queue &q = get_default_queue()) {
+  detail::async_dpct_free(pointers, events, q);
+}
+
+/// Synchronously copies \p size bytes from the address specified by \p from_ptr
+/// to the address specified by \p to_ptr. The value of \p direction is used to
+/// set the copy direction, it can be \a host_to_host, \a host_to_device,
+/// \a device_to_host, \a device_to_device or \a automatic. The function will
+/// return after the copy is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param from_ptr Pointer to source memory address.
+/// \param size Number of bytes to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static void dpct_memcpy(void *to_ptr, const void *from_ptr, size_t size,
+                        memcpy_direction direction = automatic,
+                        sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, to_ptr, from_ptr, size, direction).wait();
+}
+
+/// Synchronously copies \p size bytes from the address specified by \p from_ptr
+/// on device specified by \p from_dev_id to the address specified by \p to_ptr
+/// on device specified by \p to_dev_id. The function will return after the copy
+/// is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param to_dev_id Destination device ID.
+/// \param from_ptr Pointer to source memory address.
+/// \param from_dev_id Source device ID.
+/// \param size Number of bytes to be copied.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static void dpct_memcpy(void *to_ptr, int to_dev_id, const void *from_ptr,
+                        int from_dev_id, size_t size,
+                        sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, to_ptr, to_dev_id, from_ptr, from_dev_id, size).wait();
+}
+
+/// Asynchronously copies \p size bytes from the address specified by \p
+/// from_ptr to the address specified by \p to_ptr. The value of \p direction is
+/// used to set the copy direction, it can be \a host_to_host, \a
+/// host_to_device, \a device_to_host, \a device_to_device or \a automatic. The
+/// return of the function does NOT guarantee the copy is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param from_ptr Pointer to source memory address.
+/// \param size Number of bytes to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static void async_dpct_memcpy(void *to_ptr, const void *from_ptr, size_t size,
+                              memcpy_direction direction = automatic,
+                              sycl::queue &q = dpct::get_default_queue()) {
+  detail::dpct_memcpy(q, to_ptr, from_ptr, size, direction);
+}
+
+/// Asynchronously copies \p size bytes from the address specified by \p
+/// from_ptr on device specified by \p from_dev_id to the address specified by
+/// \p to_ptr on device specified by \p to_dev_id. The return of the function
+/// does NOT guarantee the copy is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param to_dev_id Destination device ID.
+/// \param from_ptr Pointer to source memory address.
+/// \param from_dev_id Source device ID.
+/// \param size Number of bytes to be copied.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static void async_dpct_memcpy(void *to_ptr, int to_dev_id, const void *from_ptr,
+                              int from_dev_id, size_t size,
+                              sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, to_ptr, to_dev_id, from_ptr, from_dev_id, size);
+}
+
+/// Synchronously copies 2D matrix specified by \p x and \p y from the address
+/// specified by \p from_ptr to the address specified by \p to_ptr, while \p
+/// from_pitch and \p to_pitch are the range of dim x in bytes of the matrix
+/// specified by \p from_ptr and \p to_ptr. The value of \p direction is used to
+/// set the copy direction, it can be \a host_to_host, \a host_to_device, \a
+/// device_to_host, \a device_to_device or \a automatic. The function will
+/// return after the copy is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param to_pitch Range of dim x in bytes of destination matrix.
+/// \param from_ptr Pointer to source memory address.
+/// \param from_pitch Range of dim x in bytes of source matrix.
+/// \param x Range of dim x of matrix to be copied.
+/// \param y Range of dim y of matrix to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void dpct_memcpy(void *to_ptr, size_t to_pitch,
+                               const void *from_ptr, size_t from_pitch,
+                               size_t x, size_t y,
+                               memcpy_direction direction = automatic,
+                               sycl::queue &q = dpct::get_default_queue()) {
+  sycl::event::wait(detail::dpct_memcpy(q, to_ptr, from_ptr, to_pitch,
+                                            from_pitch, x, y, direction));
+}
+
+/// Asynchronously copies 2D matrix specified by \p x and \p y from the address
+/// specified by \p from_ptr to the address specified by \p to_ptr, while \p
+/// \p from_pitch and \p to_pitch are the range of dim x in bytes of the matrix
+/// specified by \p from_ptr and \p to_ptr. The value of \p direction is used to
+/// set the copy direction, it can be \a host_to_host, \a host_to_device, \a
+/// device_to_host, \a device_to_device or \a automatic. The return of the
+/// function does NOT guarantee the copy is completed.
+///
+/// \param to_ptr Pointer to destination memory address.
+/// \param to_pitch Range of dim x in bytes of destination matrix.
+/// \param from_ptr Pointer to source memory address.
+/// \param from_pitch Range of dim x in bytes of source matrix.
+/// \param x Range of dim x of matrix to be copied.
+/// \param y Range of dim y of matrix to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void
+async_dpct_memcpy(void *to_ptr, size_t to_pitch, const void *from_ptr,
+                  size_t from_pitch, size_t x, size_t y,
+                  memcpy_direction direction = automatic,
+                  sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, to_ptr, from_ptr, to_pitch, from_pitch, x, y,
+                      direction);
+}
+
+/// Synchronously copies a subset of a 3D matrix specified by \p to to another
+/// 3D matrix specified by \p from. The from and to position info are specified
+/// by \p from_pos and \p to_pos The copied matrix size is specified by \p size.
+/// The value of \p direction is used to set the copy direction, it can be \a
+/// host_to_host, \a host_to_device, \a device_to_host, \a device_to_device or
+/// \a automatic. The function will return after the copy is completed.
+///
+/// \param to Destination matrix info.
+/// \param to_pos Position of destination.
+/// \param from Source matrix info.
+/// \param from_pos Position of destination.
+/// \param size Range of the submatrix to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void dpct_memcpy(pitched_data to, sycl::id<3> to_pos,
+                               pitched_data from, sycl::id<3> from_pos,
+                               sycl::range<3> size,
+                               memcpy_direction direction = automatic,
+                               sycl::queue &q = dpct::get_default_queue()) {
+  sycl::event::wait(
+      detail::dpct_memcpy(q, to, to_pos, from, from_pos, size, direction));
+}
+
+/// Asynchronously copies a subset of a 3D matrix specified by \p to to another
+/// 3D matrix specified by \p from. The from and to position info are specified
+/// by \p from_pos and \p to_pos The copied matrix size is specified by \p size.
+/// The value of \p direction is used to set the copy direction, it can be \a
+/// host_to_host, \a host_to_device, \a device_to_host, \a device_to_device or
+/// \a automatic. The return of the function does NOT guarantee the copy is
+/// completed.
+///
+/// \param to Destination matrix info.
+/// \param to_pos Position of destination.
+/// \param from Source matrix info.
+/// \param from_pos Position of destination.
+/// \param size Range of the submatrix to be copied.
+/// \param direction Direction of the copy.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void
+async_dpct_memcpy(pitched_data to, sycl::id<3> to_pos, pitched_data from,
+                  sycl::id<3> from_pos, sycl::range<3> size,
+                  memcpy_direction direction = automatic,
+                  sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, to, to_pos, from, from_pos, size, direction);
+}
+
+/// Synchronously copies 2D/3D memory data specified by \p param . The function
+/// will return after the copy is completed.
+///
+/// \param param Memory copy parameters.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void dpct_memcpy(const memcpy_parameter &param,
+                               sycl::queue &q = dpct::get_default_queue()) {
+  sycl::event::wait(detail::dpct_memcpy(q, param));
+}
+
+/// Asynchronously copies 2D/3D memory data specified by \p param . The return
+/// of the function does NOT guarantee the copy is completed.
+///
+/// \param param Memory copy parameters.
+/// \param q Queue to execute the copy task.
+/// \returns no return value.
+static inline void async_dpct_memcpy(const memcpy_parameter &param,
+                                     sycl::queue &q = get_default_queue()) {
+  detail::dpct_memcpy(q, param);
+}
+
+/**
+ * @brief Sets 1 byte data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q synchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void dpct_memset(void *dev_ptr, int value, size_t size,
+                        sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset<unsigned char>(q, dev_ptr, value, size).wait();
+}
+
+/**
+ * @brief Sets 2 bytes data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q synchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void dpct_memset_d16(void *dev_ptr, unsigned short value, size_t size,
+                        sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset(q, dev_ptr, value, size).wait();
+}
+/**
+ * @brief Sets 4 bytes data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q synchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void dpct_memset_d32(void *dev_ptr, unsigned int value, size_t size,
+                        sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset(q, dev_ptr, value, size).wait();
+}
+
+/**
+ * @brief Sets 1 byte data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q asynchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void async_dpct_memset(void *dev_ptr, int value, size_t size,
+                              sycl::queue &q = dpct::get_default_queue()) {
+  detail::dpct_memset<unsigned char>(q, dev_ptr, value, size);
+}
+/**
+ * @brief Sets 2 bytes data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q asynchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void async_dpct_memset_d16(void *dev_ptr, unsigned short value, size_t size,
+                              sycl::queue &q = dpct::get_default_queue()) {
+  detail::dpct_memset(q, dev_ptr, value, size);
+}
+/**
+ * @brief Sets 4 bytes data \p value to the first \p size elements starting from
+ * \p dev_ptr in \p q asynchronously.
+ * @param [in] dev_ptr Pointer to the virtual device memory address.
+ * @param [in] value The value to be set.
+ * @param [in] size Number of elements to be set to the value.
+ * @param [in] q The queue in which the operation is done.
+ */
+static void async_dpct_memset_d32(void *dev_ptr, unsigned int value, size_t size,
+                              sycl::queue &q = dpct::get_default_queue()) {
+  detail::dpct_memset(q, dev_ptr, value, size);
+}
+
+/**
+ * @brief Sets 1 byte data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * synchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void dpct_memset(void *ptr, size_t pitch, int val, size_t x,
+                               size_t y,
+                               sycl::queue &q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memset<unsigned char>(q, ptr, pitch, val, x, y));
+}
+/**
+ * @brief Sets 2 bytes data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * synchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void dpct_memset_d16(void *ptr, size_t pitch, unsigned short val, size_t x,
+                               size_t y,
+                               sycl::queue &q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memset(q, ptr, pitch, val, x, y));
+}
+/**
+ * @brief Sets 4 bytes data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * synchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void dpct_memset_d32(void *ptr, size_t pitch, unsigned int val, size_t x,
+                               size_t y,
+                               sycl::queue &q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memset(q, ptr, pitch, val, x, y));
+}
+
+/**
+ * @brief Sets 1 byte data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * asynchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void async_dpct_memset(void *ptr, size_t pitch, int val, size_t x,
+                                     size_t y,
+                                     sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset<unsigned char>(q, ptr, pitch, val, x, y);
+}
+
+/**
+ * @brief Sets 2 bytes data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * asynchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void async_dpct_memset_d16(void *ptr, size_t pitch,
+                                         unsigned short val, size_t x, size_t y,
+                                         sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset(q, ptr, pitch, val, x, y);
+}
+
+/**
+ * @brief Sets 4 bytes data \p val to the pitched 2D memory region pointed by \p ptr in \p q
+ * asynchronously.
+ * @param [in] ptr Pointer to the virtual device memory.
+ * @param [in] pitch The pitch size by number of elements, including padding.
+ * @param [in] val The value to be set.
+ * @param [in] x The width of memory region by number of elements.
+ * @param [in] y The height of memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void async_dpct_memset_d32(void *ptr, size_t pitch,
+                                         unsigned int val, size_t x, size_t y,
+                                         sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset(q, ptr, pitch, val, x, y);
+}
+
+/**
+ * @brief Sets 1 byte data \p value to the 3D memory region pointed by \p data in \p q
+ * synchronously.
+ * @param [in] data Pointer to the pitched device memory region.
+ * @param [in] value The value to be set.
+ * @param [in] size 3D memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void dpct_memset(pitched_data pitch, int val,
+                               sycl::range<3> size,
+                               sycl::queue &q = get_default_queue()) {
+  sycl::event::wait(detail::dpct_memset<unsigned char>(q, pitch, val, size));
+}
+
+/**
+ * @brief Sets 1 byte data \p value to the 3D memory region pointed by \p data in \p q
+ * asynchronously.
+ * @param [in] data Pointer to the pitched device memory region.
+ * @param [in] value The value to be set.
+ * @param [in] size 3D memory region by number of elements.
+ * @param [in] q The queue in which the operation is done.
+ */
+static inline void async_dpct_memset(pitched_data pitch, int val,
+                                     sycl::range<3> size,
+                                     sycl::queue &q = get_default_queue()) {
+  detail::dpct_memset<unsigned char>(q, pitch, val, size);
+}
+
+namespace experimental {
+typedef sycl::ext::oneapi::experimental::physical_mem *physical_mem_ptr;
+
+struct mem_location {
+  int id = 0;
+  // Location type. Value 1 means device location, and thus, id is a device id.
+  int type = 1;
+};
+
+struct mem_prop {
+  mem_location location;
+  int type = 1; // Memory type. Value 1 means default device memory.
+};
+
+struct mem_access_desc {
+  sycl::ext::oneapi::experimental::address_access_mode flags;
+  mem_location location;
+};
+} // namespace experimental
+
+template <class T, memory_region Memory> class accessor<T, Memory, 3> {
+public:
+  using memory_t = detail::memory_traits<Memory, T>;
+  using pointer_t = typename memory_t::pointer_t;
+  using accessor_t = typename memory_t::template accessor_t<3>;
+  accessor(pointer_t data, const sycl::range<3> &in_range)
+      : _data(data), _range(in_range) {}
+  template <memory_region M = Memory>
+  accessor(typename std::enable_if<M != local, const accessor_t>::type &acc)
+      : accessor(acc, acc.get_range()) {}
+  accessor(const accessor_t &acc, const sycl::range<3> &in_range)
+      : accessor(
+            acc.template get_multi_ptr<sycl::access::decorated::no>().get(),
+            in_range) {}
+  accessor<T, Memory, 2> operator[](size_t index) const {
+    sycl::range<2> sub(_range.get(1), _range.get(2));
+    return accessor<T, Memory, 2>(_data + index * sub.size(), sub);
+  }
+
+  pointer_t get_ptr() const { return _data; }
+
+private:
+  pointer_t _data;
+  sycl::range<3> _range;
+};
+template <class T, memory_region Memory> class accessor<T, Memory, 2> {
+public:
+  using memory_t = detail::memory_traits<Memory, T>;
+  using pointer_t = typename memory_t::pointer_t;
+  using accessor_t = typename memory_t::template accessor_t<2>;
+  accessor(pointer_t data, const sycl::range<2> &in_range)
+      : _data(data), _range(in_range) {}
+
+  template <memory_region M = Memory>
+  [[deprecated]] accessor(
+      typename std::enable_if<M != local, const accessor_t>::type &acc)
+      : accessor(acc, acc.get_range()) {}
+  [[deprecated]] accessor(const accessor_t &acc, const sycl::range<2> &in_range)
+      : accessor(const_cast<pointer_t>(
+                     acc.template get_multi_ptr<sycl::access::decorated::no>()
+                         .get()),
+                 in_range) {}
+
+  pointer_t operator[](size_t index) const {
+    return _data + _range.get(1) * index;
+  }
+
+  pointer_t get_ptr() const { return _data; }
+
+private:
+  pointer_t _data;
+  sycl::range<2> _range;
+};
+
+template <class T, size_t Dimension>
+using global_memory = detail::device_memory<T, global, Dimension>;
+template <class T, size_t Dimension>
+using constant_memory = detail::device_memory<T, constant, Dimension>;
+template <class T, size_t Dimension>
+using shared_memory = detail::device_memory<T, shared, Dimension>;
+
+// dpct::deprecated:: is for functionality that was introduced for compatibility
+// purpose, but relies on deprecated C++ features, which are either removed or
+// will be removed in the future standards.
+// Direct use of deprecated functionality in this namespace should be avoided.
+namespace deprecated {
+
+template <typename T>
+using usm_host_allocator = detail::deprecated::usm_allocator<T, sycl::usm::alloc::host>;
+
+template <typename T>
+using usm_device_allocator = detail::deprecated::usm_allocator<T, sycl::usm::alloc::shared>;
+} // namespace deprecated
+
+class pointer_attributes {
+public:
+  enum class type {
+    memory_type,
+    device_pointer,
+    host_pointer,
+    is_managed,
+    device_id,
+    unsupported
+  };
+
+  void init(const void *ptr,
+              sycl::queue &q = dpct::get_default_queue()) {
+#ifdef DPCT_USM_LEVEL_NONE
+    throw std::runtime_error(
+          "dpct::pointer_attributes: only works for USM pointer.");
+#else
+    memory_type = sycl::get_pointer_type(ptr, q.get_context());
+    if (memory_type == sycl::usm::alloc::unknown) {
+      device_id = -1;
+      return;
+    }
+    device_pointer = (memory_type !=
+                        sycl::usm::alloc::unknown) ? ptr : nullptr;
+    host_pointer = (memory_type !=
+                        sycl::usm::alloc::unknown) &&
+                   (memory_type != sycl::usm::alloc::device) ? ptr : nullptr;
+    sycl::device device_obj = sycl::get_pointer_device(ptr, q.get_context());
+    device_id = dpct::dev_mgr::instance().get_device_id(device_obj);
+#endif
+  }
+
+  // Query pointer propreties listed in attributes and store the results in data array
+  static void get(unsigned int numAttributes, type *attributes,
+                  void **data, device_ptr ptr) {
+    pointer_attributes sycl_attributes;
+
+    sycl_attributes.init(ptr);
+
+    for (int i = 0; i < numAttributes; i++) {
+      switch (attributes[i]) {
+      case type::memory_type:
+        *static_cast<int *>(data[i]) =
+            static_cast<int>(sycl_attributes.get_memory_type());
+        break;
+      case type::device_pointer:
+        *(reinterpret_cast<void **>(data[i])) =
+            const_cast<void *>(sycl_attributes.get_device_pointer());
+        break;
+      case type::host_pointer:
+        *(reinterpret_cast<void **>(data[i])) =
+            const_cast<void *>(sycl_attributes.get_host_pointer());
+        break;
+      case type::is_managed:
+        *static_cast<unsigned int *>(data[i]) =
+            sycl_attributes.is_memory_shared();
+        break;
+      case type::device_id:
+        *static_cast<unsigned int *>(data[i]) = sycl_attributes.get_device_id();
+        break;
+      default:
+        data[i] = nullptr;
+        break;
+      }
+    }
+  }
+
+  sycl::usm::alloc get_memory_type() {
+    return memory_type;
+  }
+
+  const void *get_device_pointer() {
+    return device_pointer;
+  }
+
+  const void *get_host_pointer() {
+    return host_pointer;
+  }
+
+  bool is_memory_shared() {
+    return memory_type == sycl::usm::alloc::shared;
+  }
+
+  unsigned int get_device_id() {
+    return device_id;
+  }
+
+private:
+  sycl::usm::alloc memory_type = sycl::usm::alloc::unknown;
+  const void *device_pointer = nullptr;
+  const void *host_pointer = nullptr;
+  unsigned int device_id = -1;
+};
+
+} // namespace dpct
+#endif // __DPCT_MEMORY_HPP__
diff --git a/sycl/include/dpct/rng_utils.hpp b/sycl/include/dpct/rng_utils.hpp
new file mode 100644
index 00000000000..1b9f313f08a
--- /dev/null
+++ b/sycl/include/dpct/rng_utils.hpp
@@ -0,0 +1,276 @@
+//==---- rng_utils.hpp ----------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_RNG_UTILS_HPP__
+#define __DPCT_RNG_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+#if defined(__has_include) && __has_include(<oneapi/math/rng/device.hpp>)
+#include <oneapi/math/rng/device.hpp>
+#elif defined(__has_include) && __has_include(<oneapi/mkl/rng/device.hpp>)
+#include <oneapi/mkl/rng/device.hpp>
+#elif defined(__has_include)
+#error "SYCLomatic runtime requires oneMath/oneMKL support"
+#else
+#error "SYCLomatic runtime requires __has_include support"
+#endif
+
+namespace dpct::rng {
+enum class random_mode {
+  best,
+  legacy,
+  optimal,
+};
+
+enum class random_engine_type {
+  philox4x32x10,
+  mrg32k3a,
+  mt2203,
+  mt19937,
+  sobol,
+  mcg59
+};
+} // namespace dpct::rng
+
+#include "detail/rng_utils_detail.hpp"
+
+namespace dpct::rng {
+namespace device {
+/// The random number generator on device.
+/// \tparam engine_t The device random number generator engine. It can only be
+/// oneapi::mkl::rng::device::mrg32k3a<1> or
+/// oneapi::mkl::rng::device::mrg32k3a<4> or
+/// oneapi::mkl::rng::device::philox4x32x10<1> or
+/// oneapi::mkl::rng::device::philox4x32x10<4> or "
+/// oneapi::mkl::rng::device::mcg59<1>.
+template <typename engine_t> class rng_generator {
+  static_assert(
+      std::disjunction_v<
+          std::is_same<engine_t, oneapi::mkl::rng::device::mrg32k3a<1>>,
+          std::is_same<engine_t, oneapi::mkl::rng::device::mrg32k3a<4>>,
+          std::is_same<engine_t, oneapi::mkl::rng::device::philox4x32x10<1>>,
+          std::is_same<engine_t, oneapi::mkl::rng::device::philox4x32x10<4>>,
+          std::is_same<engine_t, oneapi::mkl::rng::device::mcg59<1>>>,
+      "engine_t can only be oneapi::mkl::rng::device::mrg32k3a<1> or "
+      "oneapi::mkl::rng::device::mrg32k3a<4> or "
+      "oneapi::mkl::rng::device::philox4x32x10<1> or "
+      "oneapi::mkl::rng::device::philox4x32x10<4> or "
+      "oneapi::mkl::rng::device::mcg59<1>.");
+  static constexpr bool _is_engine_vec_size_one = std::disjunction_v<
+      std::is_same<engine_t, oneapi::mkl::rng::device::mrg32k3a<1>>,
+      std::is_same<engine_t, oneapi::mkl::rng::device::philox4x32x10<1>>,
+      std::is_same<engine_t, oneapi::mkl::rng::device::mcg59<1>>>;
+  static constexpr std::uint64_t default_seed = 0;
+  oneapi::mkl::rng::device::bits<std::uint32_t> _distr_bits;
+  oneapi::mkl::rng::device::uniform_bits<std::uint32_t> _distr_uniform_bits;
+  oneapi::mkl::rng::device::gaussian<float> _distr_gaussian_float;
+  oneapi::mkl::rng::device::gaussian<double> _distr_gaussian_double;
+  oneapi::mkl::rng::device::lognormal<float> _distr_lognormal_float;
+  oneapi::mkl::rng::device::lognormal<double> _distr_lognormal_double;
+  oneapi::mkl::rng::device::poisson<std::uint32_t> _distr_poisson;
+  oneapi::mkl::rng::device::uniform<float> _distr_uniform_float;
+  oneapi::mkl::rng::device::uniform<double> _distr_uniform_double;
+  engine_t _engine;
+
+public:
+  /// Default constructor of rng_generator
+  rng_generator() { _engine = engine_t(default_seed); }
+  /// Constructor of rng_generator if engine type is not mcg59
+  /// \param [in] seed The seed to initialize the engine state.
+  /// \param [in] num_to_skip Set the number of elements need to be skipped.
+  /// The number is calculated as: num_to_skip[0] + num_to_skip[1] * 2^64 +
+  /// num_to_skip[2] * 2^128 + ... + num_to_skip[n-1] * 2^(64*(n-1))
+  template <typename T = engine_t,
+            typename std::enable_if<!std::is_same_v<
+                T, oneapi::mkl::rng::device::mcg59<1>>>::type * = nullptr>
+  rng_generator(std::uint64_t seed,
+                std::initializer_list<std::uint64_t> num_to_skip) {
+    _engine = engine_t(seed, num_to_skip);
+  }
+  /// Constructor of rng_generator if engine type is mcg59
+  /// \param [in] seed The seed to initialize the engine state.
+  /// \param [in] num_to_skip Set the number of elements need to be skipped.
+  template <typename T = engine_t,
+            typename std::enable_if<std::is_same_v<
+                T, oneapi::mkl::rng::device::mcg59<1>>>::type * = nullptr>
+  rng_generator(std::uint64_t seed, std::uint64_t num_to_skip) {
+    _engine = engine_t(seed, num_to_skip);
+  }
+
+  /// Generate random number(s) obeys distribution \tparam distr_t.
+  /// \tparam T The distribution of the random number. It can only be
+  /// oneapi::mkl::rng::device::bits<std::uint32_t>,
+  /// oneapi::mkl::rng::device::uniform_bits<std::uint32_t>,
+  /// oneapi::mkl::rng::device::gaussian<float>,
+  /// oneapi::mkl::rng::device::gaussian<double>,
+  /// oneapi::mkl::rng::device::lognormal<float>,
+  /// oneapi::mkl::rng::device::lognormal<double>,
+  /// oneapi::mkl::rng::device::poisson<std::uint32_t>,
+  /// oneapi::mkl::rng::device::uniform<float> or
+  /// oneapi::mkl::rng::device::uniform<double>
+  /// \tparam vec_size The length of the return vector. It can only be 1, 2
+  /// or 4.
+  /// \param distr_params The parameter(s) for lognormal or poisson
+  /// distribution.
+  /// \return The vector of the random number(s).
+  template <typename distr_t, int vec_size, class... distr_params_t>
+  auto generate(distr_params_t... distr_params) {
+    static_assert(vec_size == 1 || vec_size == 2 || vec_size == 4,
+                  "vec_size is not supported.");
+    static_assert(
+        std::disjunction_v<
+            std::is_same<distr_t,
+                         oneapi::mkl::rng::device::bits<std::uint32_t>>,
+            std::is_same<distr_t,
+                         oneapi::mkl::rng::device::uniform_bits<std::uint32_t>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::gaussian<float>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::gaussian<double>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::lognormal<float>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::lognormal<double>>,
+            std::is_same<distr_t,
+                         oneapi::mkl::rng::device::poisson<std::uint32_t>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::uniform<float>>,
+            std::is_same<distr_t, oneapi::mkl::rng::device::uniform<double>>>,
+        "distribution is not supported.");
+#ifndef __INTEL_MKL__
+    static_assert(
+        vec_size == 4 || _is_engine_vec_size_one,
+        "When using the oneMKL Interfaces Project, this function only support "
+        "vec_size == 4 or _is_engine_vec_size_one is true.");
+#endif
+
+    if constexpr (std::is_same_v<
+                      distr_t, oneapi::mkl::rng::device::bits<std::uint32_t>>) {
+      return generate_vec<vec_size>(_distr_bits);
+    }
+    if constexpr (std::is_same_v<
+                      distr_t,
+                      oneapi::mkl::rng::device::uniform_bits<std::uint32_t>>) {
+      return generate_vec<vec_size>(_distr_uniform_bits);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::gaussian<float>>) {
+      return generate_vec<vec_size>(_distr_gaussian_float);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::gaussian<double>>) {
+      return generate_vec<vec_size>(_distr_gaussian_double);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::lognormal<float>>) {
+      return generate_vec<vec_size>(_distr_lognormal_float, distr_params...,
+                                    0.0f, 1.0f);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::lognormal<double>>) {
+      return generate_vec<vec_size>(_distr_lognormal_double, distr_params...,
+                                    0.0, 1.0);
+    }
+    if constexpr (std::is_same_v<distr_t, oneapi::mkl::rng::device::poisson<
+                                              std::uint32_t>>) {
+      return generate_vec<vec_size>(_distr_poisson, distr_params...);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::uniform<float>>) {
+      return generate_vec<vec_size>(_distr_uniform_float);
+    }
+    if constexpr (std::is_same_v<distr_t,
+                                 oneapi::mkl::rng::device::uniform<double>>) {
+      return generate_vec<vec_size>(_distr_uniform_double);
+    }
+  }
+
+  /// Get the random number generator engine.
+  /// \return The reference of the internal random number generator engine.
+  engine_t &get_engine() { return _engine; }
+
+private:
+  template <typename distr_t> auto generate_single(distr_t &distr) {
+    if constexpr (_is_engine_vec_size_one) {
+      return oneapi::mkl::rng::device::generate(distr, _engine);
+    }
+#ifdef __INTEL_MKL__
+    else {
+      return oneapi::mkl::rng::device::generate_single(distr, _engine);
+    }
+#endif
+  }
+
+  template <int vec_size, typename distr_t, class... distr_params_t>
+  auto generate_vec(distr_t &distr, distr_params_t... distr_params) {
+    if constexpr (sizeof...(distr_params_t)) {
+      typename distr_t::param_type pt(distr_params...);
+      distr.param(pt);
+    }
+    if constexpr (vec_size == 4) {
+      if constexpr (_is_engine_vec_size_one) {
+        sycl::vec<typename distr_t::result_type, 4> res;
+        res.x() = oneapi::mkl::rng::device::generate(distr, _engine);
+        res.y() = oneapi::mkl::rng::device::generate(distr, _engine);
+        res.z() = oneapi::mkl::rng::device::generate(distr, _engine);
+        res.w() = oneapi::mkl::rng::device::generate(distr, _engine);
+        return res;
+      } else {
+        return oneapi::mkl::rng::device::generate(distr, _engine);
+      }
+    } else if constexpr (vec_size == 1) {
+      return generate_single(distr);
+    } else if constexpr (vec_size == 2) {
+      sycl::vec<typename distr_t::result_type, 2> res;
+      res.x() = generate_single(distr);
+      res.y() = generate_single(distr);
+      return res;
+    }
+  }
+};
+} // namespace device
+
+typedef std::shared_ptr<host::detail::rng_generator_base> host_rng_ptr;
+
+/// Create a host random number generator.
+/// \tparam work_on_cpu Whether the work is offloaded to CPU.
+/// \param type The random engine type.
+/// \param q The queue where the generator should be executed.
+/// \return The pointer of random number generator.
+inline host_rng_ptr
+create_host_rng(const random_engine_type type,
+                sycl::queue &q = ::dpct::cs::get_default_queue()) {
+  switch (type) {
+  case random_engine_type::philox4x32x10:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::philox4x32x10>>(q);
+  case random_engine_type::mrg32k3a:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::mrg32k3a>>(q);
+#ifndef __INTEL_MKL__
+    throw std::runtime_error(host::detail::OneMKLNotSupport);
+#else
+  case random_engine_type::mt2203:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::mt2203>>(q);
+  case random_engine_type::mt19937:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::mt19937>>(q);
+  case random_engine_type::sobol:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::sobol>>(q);
+  case random_engine_type::mcg59:
+    return std::make_shared<
+        rng::host::detail::rng_generator<oneapi::mkl::rng::mcg59>>(q);
+#endif
+  }
+}
+} // namespace dpct::rng
+
+template <class engine_t>
+struct sycl::is_device_copyable<dpct::rng::device::rng_generator<engine_t>>
+    : std::true_type {};
+
+#endif // __DPCT_RNG_UTILS_HPP__
diff --git a/sycl/include/dpct/shmem_utils.hpp b/sycl/include/dpct/shmem_utils.hpp
new file mode 100644
index 00000000000..faef3c218cc
--- /dev/null
+++ b/sycl/include/dpct/shmem_utils.hpp
@@ -0,0 +1,56 @@
+//==--------------- shmem_utils.hpp ---------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_SHMEM_UTILS_HPP__
+#define __DPCT_SHMEM_UTILS_HPP__
+
+namespace dpct::shmemx {
+
+enum flags { RUNTIME_MPI = 1 << 1, RUNTIME_OPENSHMEM = 1 << 2 };
+
+/// Initialize Intel SHMEM library based on exisiting communicator
+/// \param [in] runtime_flags specify the underlying communicator like MPI/
+/// OpenSHMEM to initialize iSHMEM for launcher agnostic bootstrapping
+/// \param [in] attr Additional attributes for initializing the iSHMEM library.
+void init_attr(unsigned runtime_flags, ishmemx_attr_t *attr) {
+  if (runtime_flags == 0) {
+    // if no runtime flags are present, initialize iSHMEM normally
+    ishmem_init();
+  } else {
+    unsigned ishmem_runtime_flags = 0;
+
+    if (runtime_flags & RUNTIME_MPI)
+      ishmem_runtime_flags |= ISHMEMX_RUNTIME_MPI;
+    if (runtime_flags & RUNTIME_OPENSHMEM)
+      ishmem_runtime_flags |= ISHMEMX_RUNTIME_OPENSHMEM;
+
+    attr->runtime = static_cast<ishmemx_runtime_type_t>(ishmem_runtime_flags);
+    ishmemx_init_attr(attr);
+  }
+}
+
+/// Update signal address with signal using signal operation
+/// \param [out] sig_addr Symmetric address of the signal data object to be
+/// updated on the remote PE.
+/// \param [in] signal Unsigned 64-bit value that is used for updating the
+/// remote sig_addr signal data object.
+/// \param [in] sig_op Operator used to update signal data object
+/// \param [in] pe Processing element
+void signal_op(uint64_t *sig_addr, uint64_t signal, int sig_op, int pe) {
+  if (sig_op == ISHMEM_SIGNAL_SET) {
+    ishmemx_signal_set(sig_addr, signal, pe);
+  } else if (sig_op == ISHMEM_SIGNAL_ADD) {
+    ishmemx_signal_add(sig_addr, signal, pe);
+  } else {
+    throw std::runtime_error("Unsupported signal operator!");
+  }
+}
+
+} // namespace dpct::shmemx
+
+#endif // __DPCT_SHMEM_UTILS_HPP__
diff --git a/sycl/include/dpct/sparse_utils.hpp b/sycl/include/dpct/sparse_utils.hpp
new file mode 100644
index 00000000000..4833ac92e2c
--- /dev/null
+++ b/sycl/include/dpct/sparse_utils.hpp
@@ -0,0 +1,1838 @@
+//==---- sparse_utils.hpp -------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_SPARSE_UTILS_HPP__
+#define __DPCT_SPARSE_UTILS_HPP__
+
+#include "compat_service.hpp"
+#include "lib_common_utils.hpp"
+
+namespace dpct::sparse {
+class matrix_info {
+public:
+  /// Matrix types are:
+  /// ge: General matrix
+  /// sy: Symmetric matrix
+  /// he: Hermitian matrix
+  /// tr: Triangular matrix
+  enum class matrix_type : int { ge = 0, sy, he, tr };
+
+  auto get_matrix_type() const { return _matrix_type; }
+  auto get_diag() const { return _diag; }
+  auto get_uplo() const { return _uplo; }
+  auto get_index_base() const { return _index_base; }
+  void set_matrix_type(matrix_type mt) { _matrix_type = mt; }
+  void set_diag(oneapi::mkl::diag d) { _diag = d; }
+  void set_uplo(oneapi::mkl::uplo u) { _uplo = u; }
+  void set_index_base(oneapi::mkl::index_base ib) { _index_base = ib; }
+
+private:
+  matrix_type _matrix_type = matrix_type::ge;
+  oneapi::mkl::diag _diag = oneapi::mkl::diag::nonunit;
+  oneapi::mkl::uplo _uplo = oneapi::mkl::uplo::upper;
+  oneapi::mkl::index_base _index_base = oneapi::mkl::index_base::zero;
+};
+
+/// Sparse matrix data format
+enum matrix_format : int { csr = 1, coo = 2 };
+
+/// Sparse matrix attribute
+enum matrix_attribute : int { uplo = 0, diag };
+
+enum class conversion_scope : int { index = 0, index_and_value };
+
+#ifdef __INTEL_MKL__ // The oneMKL Interfaces Project does not support this.
+// Forward declaration
+namespace detail {
+template <typename T> struct optimize_csrsv_impl;
+template <typename T> struct optimize_csrsm_impl;
+}
+
+/// Saving the optimization information for solving a system of linear
+/// equations.
+class optimize_info {
+public:
+  /// Constructor
+  optimize_info() { oneapi::mkl::sparse::init_matrix_handle(&_matrix_handle); }
+  /// Destructor
+  ~optimize_info() {
+    oneapi::mkl::sparse::release_matrix_handle(::dpct::cs::get_default_queue(),
+                                               &_matrix_handle, _deps)
+        .wait();
+  }
+  /// Add dependency for the destructor.
+  /// \param [in] e The event which the destructor depends on.
+  void add_dependency(sycl::event e) { _deps.push_back(e); }
+  /// Get the internal saved matrix handle.
+  /// \return Returns the matrix handle.
+  oneapi::mkl::sparse::matrix_handle_t get_matrix_handle() const noexcept {
+    return _matrix_handle;
+  }
+#ifdef DPCT_USM_LEVEL_NONE
+  template <typename T> friend struct detail::optimize_csrsv_impl;
+  template <typename T> friend struct detail::optimize_csrsm_impl;
+#endif
+
+private:
+  oneapi::mkl::sparse::matrix_handle_t _matrix_handle = nullptr;
+  std::vector<sycl::event> _deps;
+#ifdef DPCT_USM_LEVEL_NONE
+  static constexpr size_t _max_data_variable_size =
+      (std::max)({sizeof(sycl::buffer<float>), sizeof(sycl::buffer<double>),
+                  sizeof(sycl::buffer<std::complex<float>>),
+                  sizeof(sycl::buffer<std::complex<double>>)});
+  using value_buf_t =
+      std::variant<std::array<std::byte, _max_data_variable_size>,
+                   sycl::buffer<float>, sycl::buffer<double>,
+                   sycl::buffer<std::complex<float>>,
+                   sycl::buffer<std::complex<double>>>;
+  sycl::buffer<int> _row_ptr_buf = sycl::buffer<int>(0);
+  sycl::buffer<int> _col_ind_buf = sycl::buffer<int>(0);
+  value_buf_t _val_buf;
+#endif
+};
+
+/// Structure for describe a sparse matrix
+class sparse_matrix_desc {
+public:
+  /// Constructor
+  /// \param [out] desc The descriptor to be created
+  /// \param [in] row_num Number of rows of the sparse matrix.
+  /// \param [in] col_num Number of colums of the sparse matrix.
+  /// \param [in] nnz Non-zero elements in the sparse matrix.
+  /// \param [in] row_ptr An array of length \p row_num + 1. If the \p row_ptr is
+  /// NULL, the sparse_matrix_desc will allocate internal memory for it. This
+  /// internal memory can be gotten from get_shadow_row_ptr().
+  /// \param [in] col_ind An array containing the column indices in index-based
+  /// numbering.
+  /// \param [in] value An array containing the non-zero elements of the sparse matrix.
+  /// \param [in] row_ptr_type Data type of the \p row_ptr .
+  /// \param [in] col_ind_type Data type of the \p col_ind .
+  /// \param [in] base Indicates how input arrays are indexed.
+  /// \param [in] value_type Data type of the \p value .
+  /// \param [in] data_format The matrix data format.
+  sparse_matrix_desc(std::int64_t row_num, std::int64_t col_num,
+                     std::int64_t nnz, void *row_ptr, void *col_ind,
+                     void *value, library_data_t row_ptr_type,
+                     library_data_t col_ind_type, oneapi::mkl::index_base base,
+                     library_data_t value_type, matrix_format data_format)
+      : _row_num(row_num), _col_num(col_num), _nnz(nnz), _row_ptr(row_ptr),
+        _col_ind(col_ind), _value(value), _row_ptr_type(row_ptr_type),
+        _col_ind_type(col_ind_type), _base(base), _value_type(value_type),
+        _data_format(data_format) {
+    if (_data_format != matrix_format::csr &&
+        _data_format != matrix_format::coo) {
+      throw std::runtime_error("the sparse matrix data format is unsupported");
+    }
+    oneapi::mkl::sparse::init_matrix_handle(&_matrix_handle);
+    set_data();
+  }
+  /// Destructor
+  ~sparse_matrix_desc() {
+    oneapi::mkl::sparse::release_matrix_handle(::dpct::cs::get_default_queue(),
+                                               &_matrix_handle, _deps)
+        .wait();
+  }
+
+  /// Add dependency for the destroy method.
+  /// \param [in] e The event which the destroy method depends on.
+  void add_dependency(sycl::event e) { _deps.push_back(e); }
+  /// Get the internal saved matrix handle.
+  /// \return Returns the matrix handle.
+  oneapi::mkl::sparse::matrix_handle_t get_matrix_handle() const noexcept {
+    return _matrix_handle;
+  }
+  /// Get the values saved in the descriptor
+  /// \param [out] row_num Number of rows of the sparse matrix.
+  /// \param [out] col_num Number of colums of the sparse matrix.
+  /// \param [out] nnz Non-zero elements in the sparse matrix.
+  /// \param [out] row_ptr An array of length \p row_num + 1.
+  /// \param [out] col_ind An array containing the column indices in index-based
+  /// numbering.
+  /// \param [out] value An array containing the non-zero elements of the sparse matrix.
+  /// \param [out] row_ptr_type Data type of the \p row_ptr .
+  /// \param [out] col_ind_type Data type of the \p col_ind .
+  /// \param [out] base Indicates how input arrays are indexed.
+  /// \param [out] value_type Data type of the \p value .
+  void get_desc(int64_t *row_num, int64_t *col_num, int64_t *nnz,
+                void **row_ptr, void **col_ind, void **value,
+                library_data_t *row_ptr_type, library_data_t *col_ind_type,
+                oneapi::mkl::index_base *base,
+                library_data_t *value_type) const noexcept {
+    *row_num = _row_num;
+    *col_num = _col_num;
+    *nnz = _nnz;
+    *row_ptr = _row_ptr;
+    *col_ind = _col_ind;
+    *value = _value;
+    *row_ptr_type = _row_ptr_type;
+    *col_ind_type = _col_ind_type;
+    *base = _base;
+    *value_type = _value_type;
+  }
+  /// Get the sparse matrix data format of this descriptor
+  /// \param [out] format The matrix data format result
+  void get_format(matrix_format *data_format) const noexcept {
+    *data_format = _data_format;
+  }
+  /// Get the index base of this descriptor
+  /// \param [out] base The index base result
+  void get_base(oneapi::mkl::index_base *base) const noexcept { *base = _base; }
+  /// Get the value pointer of this descriptor
+  /// \param [out] value The value pointer result
+  void get_value(void **value) const noexcept { *value = _value; }
+  /// Set the value pointer of this descriptor
+  /// \param [in] value The input value pointer
+  void set_value(void *value) {
+    if (!value) {
+      throw std::runtime_error(
+          "dpct::sparse::sparse_matrix_desc::set_value(): The value "
+          "pointer is NULL.");
+    }
+    if (_value && (_value != value)) {
+      throw std::runtime_error(
+          "dpct::sparse::sparse_matrix_desc::set_value(): "
+          "The _value pointer is not NULL. It cannot be reset.");
+    }
+    _value = value;
+    set_data();
+  }
+  /// Get the size of the sparse matrix
+  /// \param [out] row_num Number of rows of the sparse matrix.
+  /// \param [out] col_num Number of colums of the sparse matrix.
+  /// \param [out] nnz Non-zero elements in the sparse matrix.
+  void get_size(int64_t *row_num, int64_t *col_num,
+                int64_t *nnz) const noexcept {
+    *row_num = _row_num;
+    *col_num = _col_num;
+    *nnz = _nnz;
+  }
+  /// Set the sparse matrix attribute
+  /// \param [in] attribute The attribute type
+  /// \param [in] data The attribute value
+  /// \param [in] data_size The data size of the attribute value
+  void set_attribute(matrix_attribute attribute, const void *data,
+                     size_t data_size) {
+    if (attribute == matrix_attribute::diag) {
+      const oneapi::mkl::diag *diag_ptr =
+          reinterpret_cast<const oneapi::mkl::diag *>(data);
+      if (*diag_ptr == oneapi::mkl::diag::unit) {
+        _diag = oneapi::mkl::diag::unit;
+      } else if (*diag_ptr == oneapi::mkl::diag::nonunit) {
+        _diag = oneapi::mkl::diag::nonunit;
+      } else {
+        throw std::runtime_error("unsupported diag value");
+      }
+    } else if (attribute == matrix_attribute::uplo) {
+      const oneapi::mkl::uplo *uplo_ptr =
+          reinterpret_cast<const oneapi::mkl::uplo *>(data);
+      if (*uplo_ptr == oneapi::mkl::uplo::upper) {
+        _uplo = oneapi::mkl::uplo::upper;
+      } else if (*uplo_ptr == oneapi::mkl::uplo::lower) {
+        _uplo = oneapi::mkl::uplo::lower;
+      } else {
+        throw std::runtime_error("unsupported uplo value");
+      }
+    } else {
+      throw std::runtime_error("unsupported attribute");
+    }
+  }
+  /// Get the sparse matrix attribute
+  /// \param [out] attribute The attribute type
+  /// \param [out] data The attribute value
+  /// \param [out] data_size The data size of the attribute value
+  void get_attribute(matrix_attribute attribute, void *data,
+                     size_t data_size) const {
+    if (attribute == matrix_attribute::diag) {
+      oneapi::mkl::diag *diag_ptr = reinterpret_cast<oneapi::mkl::diag *>(data);
+      if (_diag.has_value()) {
+        *diag_ptr = _diag.value();
+      } else {
+        *diag_ptr = oneapi::mkl::diag::nonunit;
+      }
+    } else if (attribute == matrix_attribute::uplo) {
+      oneapi::mkl::uplo *uplo_ptr = reinterpret_cast<oneapi::mkl::uplo *>(data);
+      if (_uplo.has_value()) {
+        *uplo_ptr = _uplo.value();
+      } else {
+        *uplo_ptr = oneapi::mkl::uplo::lower;
+      }
+    } else {
+      throw std::runtime_error("unsupported attribute");
+    }
+  }
+  /// Set the pointers for describing the sparse matrix
+  /// \param [in] row_ptr An array of length \p row_num + 1.
+  /// \param [in] col_ind An array containing the column indices in index-based
+  /// numbering.
+  /// \param [in] value An array containing the non-zero elements of the sparse matrix.
+  void set_pointers(void *row_ptr, void *col_ind, void *value) {
+    if (!row_ptr) {
+      throw std::runtime_error(
+          "dpct::sparse::sparse_matrix_desc::set_pointers(): The "
+          "row_ptr pointer is NULL.");
+    }
+    if (!col_ind) {
+      throw std::runtime_error(
+          "dpct::sparse::sparse_matrix_desc::set_pointers(): The "
+          "col_ind pointer is NULL.");
+    }
+    if (_row_ptr && (_row_ptr != row_ptr)) {
+      throw std::runtime_error("dpct::sparse::sparse_matrix_desc::set_pointers("
+                               "): The _row_ptr pointer is "
+                               "not NULL. It cannot be reset.");
+    }
+    if (_col_ind && (_col_ind != col_ind)) {
+      throw std::runtime_error("dpct::sparse::sparse_matrix_desc::set_pointers("
+                               "): The _col_ind pointer is "
+                               "not NULL. It cannot be reset.");
+    }
+    _row_ptr = row_ptr;
+    _col_ind = col_ind;
+
+    // The descriptor will be updated in the set_value function
+    set_value(value);
+  }
+
+  /// Get the diag attribute
+  /// \return diag value
+  std::optional<oneapi::mkl::diag> get_diag() const noexcept { return _diag; }
+  /// Get the uplo attribute
+  /// \return uplo value
+  std::optional<oneapi::mkl::uplo> get_uplo() const noexcept { return _uplo; }
+  /// Set the number of non-zero elements
+  /// \param nnz [in] The number of non-zero elements.
+  void set_nnz(std::int64_t nnz) noexcept { _nnz = nnz; }
+  /// Get the type of the value pointer.
+  /// \return The type of the value pointer.
+  library_data_t get_value_type() const noexcept { return _value_type; }
+  /// Get the row_ptr.
+  /// \return The row_ptr.
+  void *get_row_ptr() const noexcept { return _row_ptr; }
+  /// If the internal _row_ptr is NULL, the sparse_matrix_desc will allocate
+  /// internal memory for it in the constructor. The internal memory can be gotten
+  /// from this interface.
+  /// \return The shadow row_ptr.
+  void *get_shadow_row_ptr() const noexcept { return _shadow_row_ptr.get(); }
+  /// Get the type of the col_ind pointer.
+  /// \return The type of the col_ind pointer.
+  library_data_t get_col_ind_type() const noexcept { return _col_ind_type; }
+  /// Get the row_num.
+  /// \return The row_num.
+  std::int64_t get_row_num() const noexcept { return _row_num; }
+
+private:
+  inline static const std::function<void(void *)> _shadow_row_ptr_deleter =
+      [](void *ptr) { ::dpct::cs::free(ptr, ::dpct::cs::get_default_queue()); };
+  template <typename index_t, typename value_t> void set_data() {
+    void *row_ptr = nullptr;
+    if (_shadow_row_ptr) {
+      row_ptr = _shadow_row_ptr.get();
+    } else if (_row_ptr) {
+      row_ptr = _row_ptr;
+    } else {
+      row_ptr = ::dpct::cs::malloc(sizeof(index_t) * (_row_num + 1),
+                                   ::dpct::cs::get_default_queue());
+      _shadow_row_ptr.reset(row_ptr);
+    }
+#ifdef DPCT_USM_LEVEL_NONE
+    using data_index_t = sycl::buffer<index_t>;
+    using data_value_t = sycl::buffer<value_t>;
+#else
+    using data_index_t = index_t *;
+    using data_value_t = value_t *;
+#endif
+    _data_row_ptr = dpct::detail::get_memory<index_t>(row_ptr);
+    _data_col_ind = dpct::detail::get_memory<index_t>(_col_ind);
+    _data_value = dpct::detail::get_memory<value_t>(_value);
+    if (_data_format == matrix_format::csr)
+      oneapi::mkl::sparse::set_csr_data(
+          ::dpct::cs::get_default_queue(), _matrix_handle, _row_num, _col_num,
+          _base, std::get<data_index_t>(_data_row_ptr),
+          std::get<data_index_t>(_data_col_ind),
+          std::get<data_value_t>(_data_value));
+    else
+      oneapi::mkl::sparse::set_coo_data(
+          ::dpct::cs::get_default_queue(), _matrix_handle, _row_num, _col_num,
+          _nnz, _base, std::get<data_index_t>(_data_row_ptr),
+          std::get<data_index_t>(_data_col_ind),
+          std::get<data_value_t>(_data_value));
+    ::dpct::cs::get_default_queue().wait();
+  }
+
+  void set_data() {
+    std::uint64_t key = dpct::detail::get_type_combination_id(
+        _row_ptr_type, _col_ind_type, _value_type);
+    switch (key) {
+    case dpct::detail::get_type_combination_id(library_data_t::real_int32,
+                                               library_data_t::real_int32,
+                                               library_data_t::real_float): {
+      set_data<std::int32_t, float>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(library_data_t::real_int32,
+                                               library_data_t::real_int32,
+                                               library_data_t::real_double): {
+      set_data<std::int32_t, double>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(library_data_t::real_int32,
+                                               library_data_t::real_int32,
+                                               library_data_t::complex_float): {
+      set_data<std::int32_t, std::complex<float>>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(
+        library_data_t::real_int32, library_data_t::real_int32,
+        library_data_t::complex_double): {
+      set_data<std::int32_t, std::complex<double>>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(library_data_t::real_int64,
+                                               library_data_t::real_int64,
+                                               library_data_t::real_float): {
+      set_data<std::int64_t, float>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(library_data_t::real_int64,
+                                               library_data_t::real_int64,
+                                               library_data_t::real_double): {
+      set_data<std::int64_t, double>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(library_data_t::real_int64,
+                                               library_data_t::real_int64,
+                                               library_data_t::complex_float): {
+      set_data<std::int64_t, std::complex<float>>();
+      break;
+    }
+    case dpct::detail::get_type_combination_id(
+        library_data_t::real_int64, library_data_t::real_int64,
+        library_data_t::complex_double): {
+      set_data<std::int64_t, std::complex<double>>();
+      break;
+    }
+    default:
+      throw std::runtime_error("the combination of data type is unsupported");
+    }
+  }
+
+  std::int64_t _row_num;
+  std::int64_t _col_num;
+  std::int64_t _nnz;
+  void *_row_ptr;
+  void *_col_ind;
+  void *_value;
+  library_data_t _row_ptr_type;
+  library_data_t _col_ind_type;
+  oneapi::mkl::index_base _base;
+  library_data_t _value_type;
+  oneapi::mkl::sparse::matrix_handle_t _matrix_handle = nullptr;
+  std::vector<sycl::event> _deps;
+  matrix_format _data_format;
+  std::optional<oneapi::mkl::uplo> _uplo;
+  std::optional<oneapi::mkl::diag> _diag;
+  std::unique_ptr<void, std::function<void(void *)>> _shadow_row_ptr =
+      std::unique_ptr<void, std::function<void(void *)>>(
+          nullptr, _shadow_row_ptr_deleter);
+
+  static constexpr size_t _max_data_variable_size = (std::max)(
+      {sizeof(sycl::buffer<std::int32_t>), sizeof(sycl::buffer<std::int64_t>),
+       sizeof(sycl::buffer<float>), sizeof(sycl::buffer<double>),
+       sizeof(sycl::buffer<std::complex<float>>),
+       sizeof(sycl::buffer<std::complex<double>>), sizeof(void *)});
+  using index_variant_t =
+      std::variant<std::array<std::byte, _max_data_variable_size>,
+                   sycl::buffer<std::int32_t>, sycl::buffer<std::int64_t>,
+                   std::int32_t *, std::int64_t *>;
+  using value_variant_t =
+      std::variant<std::array<std::byte, _max_data_variable_size>,
+                   sycl::buffer<float>, sycl::buffer<double>,
+                   sycl::buffer<std::complex<float>>,
+                   sycl::buffer<std::complex<double>>, float *, double *,
+                   std::complex<float> *, std::complex<double> *>;
+  index_variant_t _data_row_ptr;
+  index_variant_t _data_col_ind;
+  value_variant_t _data_value;
+};
+#endif
+
+class sparse_matrix_desc;
+using sparse_matrix_desc_t = std::shared_ptr<sparse_matrix_desc>;
+
+/// Structure for describe a dense vector
+class dense_vector_desc {
+public:
+  dense_vector_desc(std::int64_t ele_num, void *value,
+                    library_data_t value_type)
+      : _ele_num(ele_num), _value(value), _value_type(value_type) {}
+  void get_desc(std::int64_t *ele_num, const void **value,
+                library_data_t *value_type) const noexcept {
+    *ele_num = _ele_num;
+    *value = _value;
+    *value_type = _value_type;
+  }
+  void get_desc(std::int64_t *ele_num, void **value,
+                library_data_t *value_type) const noexcept {
+    get_desc(ele_num, const_cast<const void **>(value), value_type);
+  }
+  void *get_value() const noexcept { return _value; }
+  void set_value(void *value) { _value = value; }
+  library_data_t get_value_type() const noexcept { return _value_type; }
+  std::int64_t get_ele_num() const noexcept { return _ele_num; }
+
+private:
+  std::int64_t _ele_num;
+  void *_value;
+  library_data_t _value_type;
+};
+
+/// Structure for describe a dense matrix
+class dense_matrix_desc {
+public:
+  dense_matrix_desc(std::int64_t row_num, std::int64_t col_num,
+                    std::int64_t leading_dim, void *value,
+                    library_data_t value_type, oneapi::mkl::layout layout)
+      : _row_num(row_num), _col_num(col_num), _leading_dim(leading_dim),
+        _value(value), _value_type(value_type), _layout(layout) {}
+  void get_desc(std::int64_t *row_num, std::int64_t *col_num,
+                std::int64_t *leading_dim, void **value,
+                library_data_t *value_type,
+                oneapi::mkl::layout *layout) const noexcept {
+    *row_num = _row_num;
+    *col_num = _col_num;
+    *leading_dim = _leading_dim;
+    *value = _value;
+    *value_type = _value_type;
+    *layout = _layout;
+  }
+  void *get_value() const noexcept { return _value; }
+  void set_value(void *value) { _value = value; }
+  std::int64_t get_col_num() const noexcept { return _col_num; }
+  std::int64_t get_leading_dim() const noexcept { return _leading_dim; }
+  oneapi::mkl::layout get_layout() const noexcept { return _layout; }
+
+private:
+  std::int64_t _row_num;
+  std::int64_t _col_num;
+  std::int64_t _leading_dim;
+  void *_value;
+  library_data_t _value_type;
+  oneapi::mkl::layout _layout;
+};
+} // namespace dpct::sparse
+
+#include "detail/sparse_utils_detail.hpp"
+
+namespace dpct::sparse {
+class descriptor {
+public:
+  descriptor() {}
+  void set_queue(::dpct::cs::queue_ptr q_ptr) noexcept { _queue_ptr = q_ptr; }
+  sycl::queue &get_queue() const noexcept { return *_queue_ptr; }
+
+private:
+#ifdef __INTEL_MKL__
+  struct matmat_info {
+    detail::matrix_handle_manager matrix_handle_a;
+    detail::matrix_handle_manager matrix_handle_b;
+    detail::matrix_handle_manager matrix_handle_c;
+    detail::handle_manager<oneapi::mkl::sparse::matmat_descr_t> matmat_desc;
+    bool is_empty() { return matmat_desc.is_empty(); }
+    void init(sycl::queue *q_ptr) {
+      matmat_desc.init(q_ptr);
+      matrix_handle_a.init(q_ptr);
+      matrix_handle_b.init(q_ptr);
+      matrix_handle_c.init(q_ptr);
+    }
+  };
+  std::unordered_map<detail::csrgemm_args_info, matmat_info,
+                     detail::csrgemm_args_info_hash> &
+  get_csrgemm_info_map() {
+    return _csrgemm_info_map;
+  }
+
+  std::unordered_map<detail::csrgemm_args_info, matmat_info,
+                     detail::csrgemm_args_info_hash>
+      _csrgemm_info_map;
+
+  template <typename T>
+  friend void
+  csrgemm_nnz(descriptor *desc, oneapi::mkl::transpose trans_a,
+              oneapi::mkl::transpose trans_b, int m, int n, int k,
+              const std::shared_ptr<matrix_info> info_a, int nnz_a,
+              const T *val_a, const int *row_ptr_a, const int *col_ind_a,
+              const std::shared_ptr<matrix_info> info_b, int nnz_b,
+              const T *val_b, const int *row_ptr_b, const int *col_ind_b,
+              const std::shared_ptr<matrix_info> info_c, int *row_ptr_c,
+              int *nnz_host_ptr);
+  template <typename T>
+  friend void csrgemm(descriptor *desc, oneapi::mkl::transpose trans_a,
+                      oneapi::mkl::transpose trans_b, int m, int n, int k,
+                      const std::shared_ptr<matrix_info> info_a, const T *val_a,
+                      const int *row_ptr_a, const int *col_ind_a,
+                      const std::shared_ptr<matrix_info> info_b, const T *val_b,
+                      const int *row_ptr_b, const int *col_ind_b,
+                      const std::shared_ptr<matrix_info> info_c, T *val_c,
+                      const int *row_ptr_c, int *col_ind_c);
+#endif
+  ::dpct::cs::queue_ptr _queue_ptr = &::dpct::cs::get_default_queue();
+};
+
+using descriptor_ptr = descriptor *;
+
+/// Computes a CSR format sparse matrix-dense vector product.
+/// y = alpha * op(A) * x + beta * y
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans The operation applied to the matrix A.
+/// \param [in] num_rows Number of rows of the matrix A.
+/// \param [in] num_cols Number of columns of the matrix A.
+/// \param [in] alpha Scaling factor for the matrix A.
+/// \param [in] info Matrix info of the matrix A.
+/// \param [in] val An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [in] x Data of the vector x.
+/// \param [in] beta Scaling factor for the vector x.
+/// \param [in, out] y Data of the vector y.
+template <typename T>
+void csrmv(sycl::queue &queue, oneapi::mkl::transpose trans, int num_rows,
+           int num_cols, const T *alpha,
+           const std::shared_ptr<matrix_info> info, const T *val,
+           const int *row_ptr, const int *col_ind, const T *x, const T *beta,
+           T *y) {
+  detail::csrmv_impl<T>()(queue, trans, num_rows, num_cols, alpha, info, val,
+                          row_ptr, col_ind, x, beta, y);
+}
+
+/// Computes a CSR format sparse matrix-dense vector product. y = A * x
+///
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] values An array containing the non-zero elements of the matrix.
+/// \param [in] row_offsets An array of length \p num_rows + 1.
+/// \param [in] column_indices An array containing the column indices in
+/// index-based numbering.
+/// \param [in] vector_x Data of the vector x.
+/// \param [in, out] vector_y Data of the vector y.
+/// \param [in] num_rows Number of rows of the matrix A.
+/// \param [in] num_cols Number of columns of the matrix A.
+template <typename T>
+void csrmv(sycl::queue &queue, const T *values, const int *row_offsets,
+           const int *column_indices, const T *vector_x, T *vector_y,
+           int num_rows, int num_cols) {
+  T alpha{1}, beta{0};
+  auto matrix_info = std::make_shared<dpct::sparse::matrix_info>();
+  matrix_info->set_index_base(oneapi::mkl::index_base::zero);
+  matrix_info->set_matrix_type(dpct::sparse::matrix_info::matrix_type::ge);
+  detail::csrmv_impl<T>()(queue, oneapi::mkl::transpose::nontrans, num_rows,
+                          num_cols, &alpha, matrix_info, values, row_offsets,
+                          column_indices, vector_x, &beta, vector_y);
+}
+
+/// Computes a CSR format sparse matrix-dense vector product.
+/// y = alpha * op(A) * x + beta * y
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans The operation applied to the matrix A.
+/// \param [in] num_rows Number of rows of the matrix A.
+/// \param [in] num_cols Number of columns of the matrix A.
+/// \param [in] alpha Scaling factor for the matrix A.
+/// \param [in] alpha_type Data type of \p alpha .
+/// \param [in] info Matrix info of the matrix A.
+/// \param [in] val An array containing the non-zero elements of the matrix A.
+/// \param [in] val_type Data type of \p val .
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [in] x Data of the vector x.
+/// \param [in] x_type Data type of \p x .
+/// \param [in] beta Scaling factor for the vector x.
+/// \param [in] beta_type Data type of \p beta .
+/// \param [in, out] y Data of the vector y.
+/// \param [in] y_type Data type of \p y .
+inline void csrmv(sycl::queue &queue, oneapi::mkl::transpose trans,
+                  int num_rows, int num_cols, const void *alpha,
+                  library_data_t alpha_type,
+                  const std::shared_ptr<matrix_info> info, const void *val,
+                  library_data_t val_type, const int *row_ptr,
+                  const int *col_ind, const void *x, library_data_t x_type,
+                  const void *beta, library_data_t beta_type, void *y,
+                  library_data_t y_type) {
+  detail::spblas_shim<detail::csrmv_impl>(val_type, queue, trans, num_rows,
+                                          num_cols, alpha, info, val, row_ptr,
+                                          col_ind, x, beta, y);
+}
+
+/// Computes a CSR format sparse matrix-dense matrix product.
+/// C = alpha * op(A) * op(B) + beta * C
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a The operation applied to the matrix A.
+/// \param [in] trans_b The operation applied to the matrix B.
+/// \param [in] sparse_rows Number of rows of the matrix A.
+/// \param [in] dense_cols Number of columns of the matrix B or C.
+/// \param [in] sparse_cols Number of columns of the matrix A.
+/// \param [in] alpha Scaling factor for the matrix A.
+/// \param [in] info Matrix info of the matrix A.
+/// \param [in] val An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [in] b Data of the matrix B.
+/// \param [in] ldb Leading dimension of the matrix B.
+/// \param [in] beta Scaling factor for the matrix B.
+/// \param [in, out] c Data of the matrix C.
+/// \param [in] ldc Leading dimension of the matrix C.
+template <typename T>
+void csrmm(sycl::queue &queue, oneapi::mkl::transpose trans_a,
+           oneapi::mkl::transpose trans_b, int sparse_rows, int dense_cols,
+           int sparse_cols, const T *alpha,
+           const std::shared_ptr<matrix_info> info, const T *val,
+           const int *row_ptr, const int *col_ind, const T *b, int ldb,
+           const T *beta, T *c, int ldc) {
+#ifndef __INTEL_MKL__
+  throw std::runtime_error("The oneAPI Math Kernel Library (oneMKL) Interfaces "
+                           "Project does not support this API.");
+#else
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  auto alpha_value =
+      dpct::detail::get_value(reinterpret_cast<const Ty *>(alpha), queue);
+  auto beta_value =
+      dpct::detail::get_value(reinterpret_cast<const Ty *>(beta), queue);
+
+  oneapi::mkl::sparse::matrix_handle_t *sparse_matrix_handle =
+      new oneapi::mkl::sparse::matrix_handle_t;
+  oneapi::mkl::sparse::init_matrix_handle(sparse_matrix_handle);
+  auto data_row_ptr = dpct::detail::get_memory<int>(row_ptr);
+  auto data_col_ind = dpct::detail::get_memory<int>(col_ind);
+  auto data_val = dpct::detail::get_memory<Ty>(val);
+  oneapi::mkl::sparse::set_csr_data(queue, *sparse_matrix_handle, sparse_rows,
+                                    sparse_cols, info->get_index_base(),
+                                    data_row_ptr, data_col_ind, data_val);
+
+  auto data_b = dpct::detail::get_memory<Ty>(b);
+  auto data_c = dpct::detail::get_memory<Ty>(c);
+  sycl::event gemm_event;
+  switch (info->get_matrix_type()) {
+  case matrix_info::matrix_type::ge: {
+#ifndef DPCT_USM_LEVEL_NONE
+    gemm_event =
+#endif
+        oneapi::mkl::sparse::gemm(queue, oneapi::mkl::layout::col_major,
+                                  trans_a, trans_b, alpha_value,
+                                  *sparse_matrix_handle, data_b, dense_cols,
+                                  ldb, beta_value, data_c, ldc);
+    break;
+  }
+  default:
+    throw std::runtime_error(
+        "the csrmm does not support matrix_info::matrix_type::sy, "
+        "matrix_info::matrix_type::tr and matrix_info::matrix_type::he");
+  }
+#ifdef DPCT_USM_LEVEL_NONE
+  queue.wait();
+#endif
+  sycl::event e = oneapi::mkl::sparse::release_matrix_handle(
+      queue, sparse_matrix_handle, {gemm_event});
+  queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(e);
+    cgh.host_task([=] { delete sparse_matrix_handle; });
+  });
+#endif
+}
+
+/// Computes a CSR format sparse matrix-dense matrix product.
+/// C = alpha * op(A) * B + beta * C
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans The operation applied to the matrix A.
+/// \param [in] sparse_rows Number of rows of the matrix A.
+/// \param [in] dense_cols Number of columns of the matrix op(B) or C.
+/// \param [in] sparse_cols Number of columns of the matrix A.
+/// \param [in] alpha Scaling factor for the matrix A.
+/// \param [in] info Matrix info of the matrix A.
+/// \param [in] val An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [in] b Data of the matrix B.
+/// \param [in] ldb Leading dimension of the matrix B.
+/// \param [in] beta Scaling factor for the matrix B.
+/// \param [in, out] c Data of the matrix C.
+/// \param [in] ldc Leading dimension of the matrix C.
+template <typename T>
+void csrmm(sycl::queue &queue, oneapi::mkl::transpose trans, int sparse_rows,
+           int dense_cols, int sparse_cols, const T *alpha,
+           const std::shared_ptr<matrix_info> info, const T *val,
+           const int *row_ptr, const int *col_ind, const T *b, int ldb,
+           const T *beta, T *c, int ldc) {
+  csrmm<T>(queue, trans, oneapi::mkl::transpose::nontrans, sparse_rows,
+           dense_cols, sparse_cols, alpha, info, val, row_ptr, col_ind, b, ldb,
+           beta, c, ldc);
+}
+
+#ifdef __INTEL_MKL__ // The oneMKL Interfaces Project does not support this.
+/// Performs internal optimizations for solving a system of linear equations for
+/// a CSR format sparse matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans The operation applied to the sparse matrix.
+/// \param [in] row_col Number of rows of the sparse matrix.
+/// \param [in] info Matrix info of the sparse matrix.
+/// \param [in] val An array containing the non-zero elements of the sparse matrix.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [out] optimize_info The result of the optimizations.
+template <typename T>
+void optimize_csrsv(sycl::queue &queue, oneapi::mkl::transpose trans,
+                    int row_col, const std::shared_ptr<matrix_info> info,
+                    const T *val, const int *row_ptr, const int *col_ind,
+                    std::shared_ptr<optimize_info> optimize_info) {
+  detail::optimize_csrsv_impl<T>()(queue, trans, row_col, info, val, row_ptr,
+                                   col_ind, optimize_info);
+}
+
+inline void optimize_csrsv(sycl::queue &queue, oneapi::mkl::transpose trans,
+                           int row_col, const std::shared_ptr<matrix_info> info,
+                           const void *val, library_data_t val_type,
+                           const int *row_ptr, const int *col_ind,
+                           std::shared_ptr<optimize_info> optimize_info) {
+  detail::spblas_shim<detail::optimize_csrsv_impl>(
+      val_type, queue, trans, row_col, info, val, row_ptr, col_ind,
+      optimize_info);
+}
+
+template <typename T>
+void csrsv(sycl::queue &queue, oneapi::mkl::transpose trans, int row_col,
+           const T *alpha, const std::shared_ptr<matrix_info> info,
+           const T *val, const int *row_ptr, const int *col_ind,
+           std::shared_ptr<optimize_info> optimize_info, const T *x, T *y) {
+  detail::csrsv_impl<T>()(queue, trans, row_col, alpha, info, val, row_ptr,
+                          col_ind, optimize_info, x, y);
+}
+
+inline void csrsv(sycl::queue &queue, oneapi::mkl::transpose trans, int row_col,
+                  const void *alpha, library_data_t alpha_type,
+                  const std::shared_ptr<matrix_info> info, const void *val,
+                  library_data_t val_type, const int *row_ptr,
+                  const int *col_ind,
+                  std::shared_ptr<optimize_info> optimize_info, const void *x,
+                  library_data_t x_type, void *y, library_data_t y_type) {
+  detail::spblas_shim<detail::csrsv_impl>(val_type, queue, trans, row_col,
+                                          alpha, info, val, row_ptr, col_ind,
+                                          optimize_info, x, y);
+}
+
+/// Performs internal optimizations for dpct::sparse::csrsm by analyzing
+/// the provided matrix structure and operation parameters. The matrix A must be
+/// a triangular sparse matrix with the CSR format.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] transa The operation applied to A.
+/// \param [in] transb The operation applied to B and X.
+/// \param [in] row_col Number of rows and columns of A.
+/// \param [in] nrhs Number of columns op_b(B).
+/// \param [in] info Matrix info of A.
+/// \param [in] val An array containing the non-zero elements of A.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [out] optimize_info The result of the optimizations.
+template <typename T>
+void optimize_csrsm(sycl::queue &queue, oneapi::mkl::transpose transa,
+                    oneapi::mkl::transpose transb, int row_col, int nrhs,
+                    const std::shared_ptr<matrix_info> info, const T *val,
+                    const int *row_ptr, const int *col_ind,
+                    std::shared_ptr<optimize_info> optimize_info) {
+  detail::optimize_csrsm_impl<T>()(queue, transa, transb, row_col, nrhs, info,
+                                   val, row_ptr, col_ind, optimize_info);
+}
+
+/// Solves the sparse triangular system op_a(A) * op_b(X) = alpha * op_b(B).
+/// A is a sparse triangular matrix with the CSR format of size \p row_col
+/// by \p row_col .
+/// B is a dense matrix of size \p row_col by \p nrhs ( \p transb is nontrans)
+/// or \p nrhs by \p row_col ( \p transb isn't nontrans).
+/// X is the solution dense matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] transa The operation applied to A.
+/// \param [in] transb The operation applied to B and X.
+/// \param [in] row_col Number of rows and columns of A.
+/// \param [in] nrhs Number of columns op_b(B).
+/// \param [in] alpha Specifies the scalar.
+/// \param [in] info Matrix info of A.
+/// \param [in] val An array containing the non-zero elements of A.
+/// \param [in] row_ptr An array of length \p num_rows + 1.
+/// \param [in] col_ind An array containing the column indices in index-based
+/// numbering.
+/// \param [in, out] b The RHS matrix. It will be overwritten by the X.
+/// \param [in] ldb The leading dimension of B and X.
+/// \param [in] optimize_info The result of the optimizations.
+template <typename T>
+void csrsm(sycl::queue &queue, oneapi::mkl::transpose transa,
+           oneapi::mkl::transpose transb, int row_col, int nrhs, const T *alpha,
+           const std::shared_ptr<matrix_info> info, const T *val,
+           const int *row_ptr, const int *col_ind, T *b, int ldb,
+           std::shared_ptr<optimize_info> optimize_info) {
+  detail::csrsm_impl<T>()(queue, transa, transb, row_col, nrhs, alpha, info,
+                          val, row_ptr, col_ind, b, ldb, optimize_info);
+}
+
+/// Computes a sparse matrix-dense vector product: y = alpha * op(a) * x + beta * y.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans Specifies operation on input matrix.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] x Specifies the dense vector x.
+/// \param [in] beta Specifies the scalar beta.
+/// \param [in, out] y Specifies the dense vector y.
+/// \param [in] data_type Specifies the data type of \param a, \param x and \param y .
+inline void spmv(sycl::queue queue, oneapi::mkl::transpose trans,
+                 const void *alpha, sparse_matrix_desc_t a,
+                 std::shared_ptr<dense_vector_desc> x, const void *beta,
+                 std::shared_ptr<dense_vector_desc> y,
+                 library_data_t data_type) {
+  detail::spblas_shim<detail::spmv_impl>(data_type, queue, trans, alpha, a, x,
+                                         beta, y);
+}
+
+/// Computes a sparse matrix-dense matrix product: c = alpha * op(a) * op(b) + beta * c.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] trans_b Specifies operation on input matrix b.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] b Specifies the dense matrix b.
+/// \param [in] beta Specifies the scalar beta.
+/// \param [in, out] c Specifies the dense matrix c.
+/// \param [in] data_type Specifies the data type of \param a, \param b and \param c .
+inline void spmm(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                 oneapi::mkl::transpose trans_b, const void *alpha,
+                 sparse_matrix_desc_t a, std::shared_ptr<dense_matrix_desc> b,
+                 const void *beta, std::shared_ptr<dense_matrix_desc> c,
+                 library_data_t data_type) {
+  if (b->get_layout() != c->get_layout())
+    throw std::runtime_error("the layout of b and c are different");
+  detail::spblas_shim<detail::spmm_impl>(data_type, queue, trans_a, trans_b,
+                                         alpha, a, b, beta, c);
+}
+
+/// Do initial estimation of work and load balancing of computing a sparse
+/// matrix-sparse matrix product.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] trans_b Specifies operation on input matrix b.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] b Specifies the sparse matrix b.
+/// \param [in] beta Specifies the scalar beta.
+/// \param [in, out] c Specifies the sparse matrix c.
+/// \param [in] matmat_descr Describes the sparse matrix-sparse matrix operation
+/// to be executed.
+/// \param [in, out] size_temp_buffer Specifies the size of workspace.
+/// \param [in] temp_buffer Specifies the memory of the workspace.
+inline void
+spgemm_work_estimation(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                       oneapi::mkl::transpose trans_b, const void *alpha,
+                       sparse_matrix_desc_t a, sparse_matrix_desc_t b,
+                       const void *beta, sparse_matrix_desc_t c,
+                       oneapi::mkl::sparse::matmat_descr_t matmat_descr,
+                       size_t *size_temp_buffer, void *temp_buffer) {
+  if (temp_buffer) {
+    detail::temp_memory<std::int64_t, true, size_t> size_memory(
+        queue, size_temp_buffer);
+    detail::temp_memory<std::uint8_t, false> work_memory(queue, temp_buffer);
+    oneapi::mkl::sparse::matmat(
+        queue, a->get_matrix_handle(), b->get_matrix_handle(),
+        c->get_matrix_handle(),
+        oneapi::mkl::sparse::matmat_request::work_estimation, matmat_descr,
+        size_memory.get_memory_ptr(), work_memory.get_memory_ptr()
+#ifndef DPCT_USM_LEVEL_NONE
+        , {}
+#endif
+    );
+  } else {
+    oneapi::mkl::sparse::set_matmat_data(
+        matmat_descr, oneapi::mkl::sparse::matrix_view_descr::general, trans_a,
+        oneapi::mkl::sparse::matrix_view_descr::general, trans_b,
+        oneapi::mkl::sparse::matrix_view_descr::general);
+    detail::temp_memory<std::int64_t, true, size_t> size_memory(
+        queue, size_temp_buffer);
+    oneapi::mkl::sparse::matmat(
+        queue, a->get_matrix_handle(), b->get_matrix_handle(),
+        c->get_matrix_handle(),
+        oneapi::mkl::sparse::matmat_request::get_work_estimation_buf_size,
+        matmat_descr, size_memory.get_memory_ptr(), nullptr
+#ifndef DPCT_USM_LEVEL_NONE
+        , {}
+#endif
+    );
+  }
+}
+
+/// Do internal products for computing the C matrix of computing a sparse
+/// matrix-sparse matrix product.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] trans_b Specifies operation on input matrix b.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] b Specifies the sparse matrix b.
+/// \param [in] beta Specifies the scalar beta.
+/// \param [in, out] c Specifies the sparse matrix c.
+/// \param [in] matmat_descr Describes the sparse matrix-sparse matrix operation
+/// to be executed.
+/// \param [in, out] size_temp_buffer Specifies the size of workspace.
+/// \param [in] temp_buffer Specifies the memory of the workspace.
+inline void spgemm_compute(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                           oneapi::mkl::transpose trans_b, const void *alpha,
+                           sparse_matrix_desc_t a, sparse_matrix_desc_t b,
+                           const void *beta, sparse_matrix_desc_t c,
+                           oneapi::mkl::sparse::matmat_descr_t matmat_descr,
+                           size_t *size_temp_buffer, void *temp_buffer) {
+  if (temp_buffer) {
+    std::int64_t nnz_value = 0;
+    {
+      detail::temp_memory<std::int64_t, true, size_t> size_memory(
+          queue, size_temp_buffer);
+      detail::temp_memory<std::uint8_t, false> work_memory(queue, temp_buffer);
+      detail::temp_memory<std::int64_t, true, std::int64_t> nnz_memory(
+          queue, &nnz_value);
+      oneapi::mkl::sparse::matmat(
+          queue, a->get_matrix_handle(), b->get_matrix_handle(),
+          c->get_matrix_handle(), oneapi::mkl::sparse::matmat_request::compute,
+          matmat_descr, size_memory.get_memory_ptr(),
+          work_memory.get_memory_ptr()
+#ifndef DPCT_USM_LEVEL_NONE
+          , {}
+#endif
+      );
+      oneapi::mkl::sparse::matmat(
+          queue, a->get_matrix_handle(), b->get_matrix_handle(),
+          c->get_matrix_handle(), oneapi::mkl::sparse::matmat_request::get_nnz,
+          matmat_descr, nnz_memory.get_memory_ptr(), nullptr
+#ifndef DPCT_USM_LEVEL_NONE
+          , {}
+#endif
+      );
+    }
+    c->set_nnz(nnz_value);
+  } else {
+    detail::temp_memory<std::int64_t, true, size_t> size_memory(
+        queue, size_temp_buffer);
+    oneapi::mkl::sparse::matmat(
+        queue, a->get_matrix_handle(), b->get_matrix_handle(),
+        c->get_matrix_handle(),
+        oneapi::mkl::sparse::matmat_request::get_compute_buf_size, matmat_descr,
+        size_memory.get_memory_ptr(), nullptr
+#ifndef DPCT_USM_LEVEL_NONE
+        , {}
+#endif
+    );
+  }
+}
+
+/// Do any remaining internal products and accumulation and transfer into final
+/// C matrix arrays of computing a sparse matrix-sparse matrix product.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] trans_b Specifies operation on input matrix b.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] b Specifies the sparse matrix b.
+/// \param [in] beta Specifies the scalar beta.
+/// \param [in, out] c Specifies the sparse matrix c.
+/// \param [in] matmat_descr Describes the sparse matrix-sparse matrix operation
+/// to be executed.
+inline void spgemm_finalize(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                            oneapi::mkl::transpose trans_b, const void *alpha,
+                            sparse_matrix_desc_t a, sparse_matrix_desc_t b,
+                            const void *beta, sparse_matrix_desc_t c,
+                            oneapi::mkl::sparse::matmat_descr_t matmat_descr) {
+  oneapi::mkl::sparse::matmat(queue, a->get_matrix_handle(),
+                              b->get_matrix_handle(), c->get_matrix_handle(),
+                              oneapi::mkl::sparse::matmat_request::finalize,
+                              matmat_descr, nullptr, nullptr
+#ifdef DPCT_USM_LEVEL_NONE
+  );
+#else
+  , {}).wait();
+#endif
+  if (c->get_shadow_row_ptr()) {
+    switch (c->get_col_ind_type()) {
+    case library_data_t::real_int32: {
+      ::dpct::cs::memcpy(::dpct::cs::get_default_queue(), c->get_row_ptr(),
+                         c->get_shadow_row_ptr(),
+                         sizeof(std::int32_t) * (c->get_row_num() + 1))
+          .wait();
+      break;
+    }
+    case library_data_t::real_int64: {
+      ::dpct::cs::memcpy(::dpct::cs::get_default_queue(), c->get_row_ptr(),
+                         c->get_shadow_row_ptr(),
+                         sizeof(std::int64_t) * (c->get_row_num() + 1))
+          .wait();
+      break;
+    }
+    default:
+      throw std::runtime_error("dpct::sparse::spgemm_finalize(): The data type "
+                               "of the col_ind in matrix c is unsupported.");
+    }
+  }
+}
+
+/// Performs internal optimizations for spsv by analyzing the provided matrix
+/// structure and operation parameters.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] a Specifies the sparse matrix a.
+inline void spsv_optimize(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                          sparse_matrix_desc_t a) {
+  if (!a->get_uplo() || !a->get_diag()) {
+    throw std::runtime_error(
+        "dpct::sparse::spsv_optimize(): oneapi::mkl::sparse::optimize_trsv "
+        "needs uplo and diag attributes to be specified.");
+  }
+  oneapi::mkl::sparse::optimize_trsv(
+      queue, a->get_uplo().value(), oneapi::mkl::transpose::nontrans,
+      a->get_diag().value(), a->get_matrix_handle());
+}
+
+/// Solves a system of linear equations for a sparse matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] x Specifies the dense vector x.
+/// \param [in, out] y Specifies the dense vector y.
+/// \param [in] data_type Specifies the data type of \param a, \param x and
+/// \param y .
+inline void spsv(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                 const void *alpha, sparse_matrix_desc_t a,
+                 std::shared_ptr<dense_vector_desc> x,
+                 std::shared_ptr<dense_vector_desc> y,
+                 library_data_t data_type) {
+  if (!a->get_uplo() || !a->get_diag()) {
+    throw std::runtime_error(
+        "dpct::sparse::spsv(): oneapi::mkl::sparse::trsv needs uplo and diag "
+        "attributes to be specified.");
+  }
+  oneapi::mkl::uplo uplo = a->get_uplo().value();
+  oneapi::mkl::diag diag = a->get_diag().value();
+  detail::spblas_shim<detail::spsv_impl>(a->get_value_type(), queue, uplo, diag,
+                                         trans_a, alpha, a, x, y);
+}
+
+/// Performs internal optimizations for spsm by analyzing the provided matrix
+/// structure and operation parameters.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] a Specifies the dense matrix b.
+/// \param [in] a Specifies the dense matrix c.
+inline void spsm_optimize(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                          sparse_matrix_desc_t a,
+                          std::shared_ptr<dense_matrix_desc> b,
+                          std::shared_ptr<dense_matrix_desc> c) {
+  if (!a->get_uplo() || !a->get_diag()) {
+    throw std::runtime_error(
+        "dpct::sparse::spsm_optimize(): oneapi::mkl::sparse::optimize_trsm "
+        "needs uplo and diag attributes to be specified.");
+  }
+  oneapi::mkl::sparse::optimize_trsm(
+      queue, b->get_layout(), a->get_uplo().value(), trans_a,
+      a->get_diag().value(), a->get_matrix_handle(), c->get_col_num());
+}
+
+/// Solves a system of linear equations with multiple right-hand sides (RHS)
+/// for a triangular sparse matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] trans_a Specifies operation on input matrix a.
+/// \param [in] trans_b Specifies operation on input matrix b.
+/// \param [in] alpha Specifies the scalar alpha.
+/// \param [in] a Specifies the sparse matrix a.
+/// \param [in] b Specifies the dense matrix b.
+/// \param [in, out] c Specifies the dense matrix c.
+/// \param [in] data_type Specifies the data type of \param a, \param b and
+/// \param c .
+inline void spsm(sycl::queue queue, oneapi::mkl::transpose trans_a,
+                 oneapi::mkl::transpose trans_b, const void *alpha,
+                 sparse_matrix_desc_t a, std::shared_ptr<dense_matrix_desc> b,
+                 std::shared_ptr<dense_matrix_desc> c,
+                 library_data_t data_type) {
+  if (!a->get_uplo() || !a->get_diag()) {
+    throw std::runtime_error(
+        "dpct::sparse::spsm(): oneapi::mkl::sparse::trsm needs uplo and diag "
+        "attributes to be specified.");
+  }
+  oneapi::mkl::uplo uplo = a->get_uplo().value();
+  oneapi::mkl::diag diag = a->get_diag().value();
+  detail::spblas_shim<detail::spsm_impl>(data_type, queue, trans_a, trans_b,
+                                         uplo, diag, alpha, a, b, c);
+}
+
+/// Convert a CSR sparse matrix to a CSC sparse matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] m Number of rows of the matrix.
+/// \param [in] n Number of columns of the matrix.
+/// \param [in] nnz Number of non-zero elements.
+/// \param [in] from_val An array containing the non-zero elements of the input
+/// matrix.
+/// \param [in] from_row_ptr An array of length \p m + 1.
+/// \param [in] from_col_ind An array containing the column indices in
+/// index-based numbering.
+/// \param [out] to_val An array containing the non-zero elements of the output
+/// matrix.
+/// \param [out] to_col_ptr An array of length \p n + 1.
+/// \param [out] to_row_ind An array containing the row indices in index-based
+/// numbering.
+/// \param [in] range Specifies the conversion scope.
+/// \param [in] base Specifies the index base.
+template <typename T>
+inline void csr2csc(sycl::queue queue, int m, int n, int nnz, const T *from_val,
+                    const int *from_row_ptr, const int *from_col_ind, T *to_val,
+                    int *to_col_ptr, int *to_row_ind, conversion_scope range,
+                    oneapi::mkl::index_base base) {
+  detail::csr2csc_impl<T>()(queue, m, n, nnz, from_val, from_row_ptr,
+                            from_col_ind, to_val, to_col_ptr, to_row_ind, range,
+                            base);
+}
+
+/// Convert a CSR sparse matrix to a CSC sparse matrix.
+/// \param [in] queue The queue where the routine should be executed. It must
+/// have the in_order property when using the USM mode.
+/// \param [in] m Number of rows of the matrix.
+/// \param [in] n Number of columns of the matrix.
+/// \param [in] nnz Number of non-zero elements.
+/// \param [in] from_val An array containing the non-zero elements of the input
+/// matrix.
+/// \param [in] from_row_ptr An array of length \p m + 1.
+/// \param [in] from_col_ind An array containing the column indices in
+/// index-based numbering.
+/// \param [out] to_val An array containing the non-zero elements of the output
+/// matrix.
+/// \param [out] to_col_ptr An array of length \p n + 1.
+/// \param [out] to_row_ind An array containing the row indices in index-based
+/// numbering.
+/// \param [in] value_type Data type of \p from_val and \p to_val .
+/// \param [in] range Specifies the conversion scope.
+/// \param [in] base Specifies the index base.
+inline void csr2csc(sycl::queue queue, int m, int n, int nnz,
+                    const void *from_val, const int *from_row_ptr,
+                    const int *from_col_ind, void *to_val, int *to_col_ptr,
+                    int *to_row_ind, library_data_t value_type,
+                    conversion_scope range, oneapi::mkl::index_base base) {
+  detail::spblas_shim<detail::csr2csc_impl>(
+      value_type, queue, m, n, nnz, from_val, from_row_ptr, from_col_ind,
+      to_val, to_col_ptr, to_row_ind, range, base);
+}
+
+/// Calculate the non-zero elements number of the result of a
+/// sparse matrix (CSR format)-sparse matrix (CSR format) product:
+/// C = op(A) * op(B)
+/// \param [in] desc The descriptor of this calculation.
+/// \param [in] trans_a The operation applied to the matrix A.
+/// \param [in] trans_b The operation applied to the matrix B.
+/// \param [in] m The rows number of op(A) and C.
+/// \param [in] n The columns number of op(B) and C.
+/// \param [in] k The columns number of op(A) and rows number of op(B).
+/// \param [in] info_a Matrix info of the matrix A.
+/// \param [in] nnz_a Non-zero elements number of matrix A.
+/// \param [in] val_a An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr_a An array of length row number + 1.
+/// \param [in] col_ind_a An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_b Matrix info of the matrix B.
+/// \param [in] nnz_b Non-zero elements number of matrix B.
+/// \param [in] val_b An array containing the non-zero elements of the matrix B.
+/// \param [in] row_ptr_b An array of length row number + 1.
+/// \param [in] col_ind_b An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_c Matrix info of the matrix C.
+/// \param [in] row_ptr_c An array of length row number + 1.
+/// \param [out] nnz_host_ptr Non-zero elements number of matrix C.
+template <typename T>
+void csrgemm_nnz(descriptor_ptr desc, oneapi::mkl::transpose trans_a,
+                 oneapi::mkl::transpose trans_b, int m, int n, int k,
+                 const std::shared_ptr<matrix_info> info_a, int nnz_a,
+                 const T *val_a, const int *row_ptr_a, const int *col_ind_a,
+                 const std::shared_ptr<matrix_info> info_b, int nnz_b,
+                 const T *val_b, const int *row_ptr_b, const int *col_ind_b,
+                 const std::shared_ptr<matrix_info> info_c, int *row_ptr_c,
+                 int *nnz_host_ptr) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue &queue = desc->get_queue();
+  detail::csrgemm_args_info args(trans_a, trans_b, m, n, k, info_a, val_a,
+                                 row_ptr_a, col_ind_a, info_b, val_b, row_ptr_b,
+                                 col_ind_b, info_c, row_ptr_c);
+  auto &info = desc->get_csrgemm_info_map()[args];
+
+  if (info.is_empty()) {
+    info.init(&queue);
+
+    int rows_c = m;
+    int cols_c = n;
+    int rows_a = (trans_a == oneapi::mkl::transpose::nontrans) ? m : k;
+    int cols_a = (trans_a == oneapi::mkl::transpose::nontrans) ? k : m;
+    int rows_b = (trans_b == oneapi::mkl::transpose::nontrans) ? k : n;
+    int cols_b = (trans_b == oneapi::mkl::transpose::nontrans) ? n : k;
+
+    info.matrix_handle_a.set_matrix_data<Ty>(
+        rows_a, cols_a, info_a->get_index_base(), row_ptr_a, col_ind_a, val_a);
+    info.matrix_handle_b.set_matrix_data<Ty>(
+        rows_b, cols_b, info_b->get_index_base(), row_ptr_b, col_ind_b, val_b);
+    // In the future, oneMKL will allow nullptr to be passed in for row_ptr_c in
+    // the initial calls before matmat. But currently, it needs an array of
+    // length row_number + 1.
+    info.matrix_handle_c.set_matrix_data<Ty>(
+        rows_c, cols_c, info_c->get_index_base(), row_ptr_c, nullptr, nullptr);
+
+    oneapi::mkl::sparse::set_matmat_data(
+        info.matmat_desc.get_handle(),
+        oneapi::mkl::sparse::matrix_view_descr::general, trans_a,
+        oneapi::mkl::sparse::matrix_view_descr::general, trans_b,
+        oneapi::mkl::sparse::matrix_view_descr::general);
+  }
+
+#ifdef DPCT_USM_LEVEL_NONE
+#define __MATMAT(STEP, NNZ_C)                                                  \
+  oneapi::mkl::sparse::matmat(queue, info.matrix_handle_a.get_handle(),        \
+                              info.matrix_handle_b.get_handle(),               \
+                              info.matrix_handle_c.get_handle(), STEP,         \
+                              info.matmat_desc.get_handle(), NNZ_C, nullptr)
+#else
+#define __MATMAT(STEP, NNZ_C)                                                  \
+  oneapi::mkl::sparse::matmat(                                                 \
+      queue, info.matrix_handle_a.get_handle(),                                \
+      info.matrix_handle_b.get_handle(), info.matrix_handle_c.get_handle(),    \
+      STEP, info.matmat_desc.get_handle(), NNZ_C, nullptr, {})
+#endif
+
+  __MATMAT(oneapi::mkl::sparse::matmat_request::work_estimation, nullptr);
+  queue.wait();
+
+  __MATMAT(oneapi::mkl::sparse::matmat_request::compute, nullptr);
+
+  int nnz_c_int = 0;
+#ifdef DPCT_USM_LEVEL_NONE
+  sycl::buffer<std::int64_t, 1> nnz_buf_c(1);
+  __MATMAT(oneapi::mkl::sparse::matmat_request::get_nnz, &nnz_buf_c);
+  nnz_c_int = nnz_buf_c.get_host_access(sycl::read_only)[0];
+#else
+  std::int64_t *nnz_c = sycl::malloc_host<std::int64_t>(1, queue);
+  __MATMAT(oneapi::mkl::sparse::matmat_request::get_nnz, nnz_c);
+  queue.wait();
+  nnz_c_int = *nnz_c;
+#endif
+
+  if (nnz_host_ptr) {
+    *nnz_host_ptr = nnz_c_int;
+  }
+}
+
+/// Computes a sparse matrix (CSR format)-sparse matrix (CSR format) product:
+/// C = op(A) * op(B)
+/// \param [in] desc The descriptor of this calculation.
+/// \param [in] trans_a The operation applied to the matrix A.
+/// \param [in] trans_b The operation applied to the matrix B.
+/// \param [in] m The rows number of op(A) and C.
+/// \param [in] n The columns number of op(B) and C.
+/// \param [in] k The columns number of op(A) and rows number of op(B).
+/// \param [in] info_a Matrix info of the matrix A.
+/// \param [in] val_a An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr_a An array of length row number + 1.
+/// \param [in] col_ind_a An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_b Matrix info of the matrix B.
+/// \param [in] val_b An array containing the non-zero elements of the matrix B.
+/// \param [in] row_ptr_b An array of length row number + 1.
+/// \param [in] col_ind_b An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_c Matrix info of the matrix C.
+/// \param [out] val_c An array containing the non-zero elements of the matrix
+/// C.
+/// \param [in] row_ptr_c An array of length row number + 1.
+/// \param [out] col_ind_c An array containing the column indices in index-based
+/// numbering.
+template <typename T>
+void csrgemm(descriptor_ptr desc, oneapi::mkl::transpose trans_a,
+             oneapi::mkl::transpose trans_b, int m, int n, int k,
+             const std::shared_ptr<matrix_info> info_a, const T *val_a,
+             const int *row_ptr_a, const int *col_ind_a,
+             const std::shared_ptr<matrix_info> info_b, const T *val_b,
+             const int *row_ptr_b, const int *col_ind_b,
+             const std::shared_ptr<matrix_info> info_c, T *val_c,
+             const int *row_ptr_c, int *col_ind_c) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue &queue = desc->get_queue();
+  detail::csrgemm_args_info args(trans_a, trans_b, m, n, k, info_a, val_a,
+                                 row_ptr_a, col_ind_a, info_b, val_b, row_ptr_b,
+                                 col_ind_b, info_c, row_ptr_c);
+  auto &info = desc->get_csrgemm_info_map()[args];
+  if (info.is_empty()) {
+    throw std::runtime_error("csrgemm_nnz is not invoked previously.");
+  }
+
+  int rows_c = m;
+  int cols_c = n;
+  info.matrix_handle_c.set_matrix_data<Ty>(
+      rows_c, cols_c, info_c->get_index_base(), row_ptr_c, col_ind_c, val_c);
+  sycl::event e;
+#ifndef DPCT_USM_LEVEL_NONE
+  e =
+#endif
+      __MATMAT(oneapi::mkl::sparse::matmat_request::finalize, nullptr);
+#undef __MATMAT
+
+  info.matrix_handle_a.add_dependency(e);
+  info.matrix_handle_b.add_dependency(e);
+  info.matrix_handle_c.add_dependency(e);
+  info.matmat_desc.add_dependency(e);
+  desc->get_csrgemm_info_map().erase(args);
+}
+
+/// Contains internal information for csrgemm2 by analyzing the provided
+/// matrix structure and operation parameters.
+class csrgemm2_info {
+  detail::matrix_handle_manager matrix_handle_a;
+  detail::matrix_handle_manager matrix_handle_b;
+  detail::matrix_handle_manager matrix_handle_axb;
+  detail::matrix_handle_manager matrix_handle_d;
+  detail::matrix_handle_manager matrix_handle_c;
+  detail::handle_manager<oneapi::mkl::sparse::matmat_descr_t> matmat_desc;
+  detail::handle_manager<oneapi::mkl::sparse::omatadd_descr_t> omatadd_desc;
+  void *row_ptr_axb = nullptr;
+  void *col_ind_axb = nullptr;
+  void *val_axb = nullptr;
+#ifdef DPCT_USM_LEVEL_NONE
+  sycl::buffer<std::int64_t, 1> *temp_buffer_1_size;
+  sycl::buffer<std::int64_t, 1> *temp_buffer_2_size;
+  sycl::buffer<std::uint8_t, 1> *temp_buffer_1;
+  sycl::buffer<std::uint8_t, 1> *temp_buffer_2;
+#else
+  std::int64_t *temp_buffer_1_size;
+  std::int64_t *temp_buffer_2_size;
+  std::uint8_t *temp_buffer_1;
+  std::uint8_t *temp_buffer_2;
+#endif
+  enum matrix_c_datatype_t {
+    mcd_float,
+    mcd_double,
+    mcd_float2,
+    mcd_double2,
+  };
+  template <typename T> void set_matrix_c_datatype() {
+    if constexpr (std::is_same_v<T, float>) {
+      matrix_c_datatype = matrix_c_datatype_t::mcd_float;
+    } else if constexpr (std::is_same_v<T, double>) {
+      matrix_c_datatype = matrix_c_datatype_t::mcd_double;
+    } else if constexpr (std::is_same_v<T, std::complex<float>>) {
+      matrix_c_datatype = matrix_c_datatype_t::mcd_float2;
+    } else {
+      matrix_c_datatype = matrix_c_datatype_t::mcd_double2;
+    }
+  }
+  matrix_c_datatype_t matrix_c_datatype;
+  void init(sycl::queue *q_ptr) {
+    matrix_handle_a.init(q_ptr);
+    matrix_handle_b.init(q_ptr);
+    matrix_handle_axb.init(q_ptr);
+    matrix_handle_d.init(q_ptr);
+    matrix_handle_c.init(q_ptr);
+    matmat_desc.init(q_ptr);
+    omatadd_desc.init(q_ptr);
+  }
+  sycl::event release(sycl::queue q, sycl::event dep) {
+    matrix_handle_a.add_dependency(dep);
+    matrix_handle_b.add_dependency(dep);
+    matrix_handle_axb.add_dependency(dep);
+    matrix_handle_d.add_dependency(dep);
+    matrix_handle_c.add_dependency(dep);
+    matmat_desc.add_dependency(dep);
+    omatadd_desc.add_dependency(dep);
+    std::vector<sycl::event> events;
+    events.push_back(matrix_handle_a.release());
+    events.push_back(matrix_handle_b.release());
+    events.push_back(matrix_handle_axb.release());
+    events.push_back(matrix_handle_d.release());
+    events.push_back(matrix_handle_c.release());
+    events.push_back(matmat_desc.release());
+    events.push_back(omatadd_desc.release());
+    return q.single_task(events, [] {});
+  }
+  template <typename T>
+  friend void csrgemm2_get_buffer_size(
+      descriptor_ptr desc, int m, int n, int k, const T *alpha,
+      const std::shared_ptr<matrix_info> info_a, int nnz_a,
+      const int *row_ptr_a, const int *col_ind_a,
+      const std::shared_ptr<matrix_info> info_b, int nnz_b,
+      const int *row_ptr_b, const int *col_ind_b, const T *beta,
+      const std::shared_ptr<matrix_info> info_d, int nnz_d,
+      const int *row_ptr_d, const int *col_ind_d,
+      std::shared_ptr<csrgemm2_info> info, size_t *buffer_size_in_bytes);
+  friend void csrgemm2_nnz(descriptor_ptr desc, int m, int n, int k,
+                           const std::shared_ptr<matrix_info> info_a, int nnz_a,
+                           const int *row_ptr_a, const int *col_ind_a,
+                           const std::shared_ptr<matrix_info> info_b, int nnz_b,
+                           const int *row_ptr_b, const int *col_ind_b,
+                           const std::shared_ptr<matrix_info> info_d, int nnz_d,
+                           const int *row_ptr_d, const int *col_ind_d,
+                           const std::shared_ptr<matrix_info> info_c,
+                           int *row_ptr_c, int *nnz_ptr,
+                           std::shared_ptr<csrgemm2_info> info, void *buffer);
+  template <typename T>
+  friend void
+  csrgemm2(descriptor_ptr desc, int m, int n, int k, const T *alpha,
+           const std::shared_ptr<matrix_info> info_a, int nnz_a, const T *val_a,
+           const int *row_ptr_a, const int *col_ind_a,
+           const std::shared_ptr<matrix_info> info_b, int nnz_b, const T *val_b,
+           const int *row_ptr_b, const int *col_ind_b, const T *beta,
+           const std::shared_ptr<matrix_info> info_d, int nnz_d, const T *val_d,
+           const int *row_ptr_d, const int *col_ind_d,
+           const std::shared_ptr<matrix_info> info_c, T *val_c,
+           const int *row_ptr_c, int *col_ind_c,
+           std::shared_ptr<csrgemm2_info> info, void *buffer);
+};
+
+/// Calculate the required workspace size of the following operation:
+/// C = alpha * A * B + beta * D
+/// \param [in] desc The descriptor of this calculation.
+/// \param [in] m The rows number of A, D and C.
+/// \param [in] n The columns number of B, D and C.
+/// \param [in] k The columns number of A and rows number of B.
+/// \param [in] alpha Scaling factor.
+/// \param [in] info_a Matrix info of the matrix A.
+/// \param [in] nnz_a Non-zero elements number of matrix A.
+/// \param [in] row_ptr_a An array of length \p m + 1.
+/// \param [in] col_ind_a An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_b Matrix info of the matrix B.
+/// \param [in] nnz_b Non-zero elements number of matrix B.
+/// \param [in] row_ptr_b An array of length \p k + 1.
+/// \param [in] col_ind_b An array containing the column indices in index-based
+/// numbering.
+/// \param [in] beta Scaling factor.
+/// \param [in] info_d Matrix info of the matrix D.
+/// \param [in] nnz_d Non-zero elements number of matrix D.
+/// \param [in] row_ptr_d An array of length \p m + 1.
+/// \param [in] col_ind_d An array containing the column indices in index-based
+/// numbering.
+/// \param [in, out] info The information of csrgemm2 operation.
+/// \param [out] buffer_size_in_bytes Workspace memory size in bytes.
+template <typename T>
+void csrgemm2_get_buffer_size(
+    descriptor_ptr desc, int m, int n, int k, const T *alpha,
+    const std::shared_ptr<matrix_info> info_a, int nnz_a, const int *row_ptr_a,
+    const int *col_ind_a, const std::shared_ptr<matrix_info> info_b, int nnz_b,
+    const int *row_ptr_b, const int *col_ind_b, const T *beta,
+    const std::shared_ptr<matrix_info> info_d, int nnz_d, const int *row_ptr_d,
+    const int *col_ind_d, std::shared_ptr<csrgemm2_info> info,
+    size_t *buffer_size_in_bytes) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue &queue = desc->get_queue();
+  info->set_matrix_c_datatype<Ty>();
+
+  info->row_ptr_axb = (int *)::dpct::cs::malloc((m + 1) * sizeof(int), queue);
+  info->init(&queue);
+
+  info->matrix_handle_a.set_matrix_data<Ty>(m, k, info_a->get_index_base(),
+                                            row_ptr_a, col_ind_a, nullptr);
+  info->matrix_handle_b.set_matrix_data<Ty>(k, n, info_b->get_index_base(),
+                                            row_ptr_b, col_ind_b, nullptr);
+  info->matrix_handle_axb.set_matrix_data<Ty>(
+      m, n, oneapi::mkl::index_base::zero, info->row_ptr_axb, nullptr, nullptr);
+  info->matrix_handle_d.set_matrix_data<Ty>(m, n, info_d->get_index_base(),
+                                            row_ptr_d, col_ind_d, nullptr);
+  info->matrix_handle_c.set_matrix_data<Ty>(m, n, oneapi::mkl::index_base::zero,
+                                            nullptr, nullptr, nullptr);
+
+  oneapi::mkl::sparse::set_matmat_data(
+      info->matmat_desc.get_handle(),
+      oneapi::mkl::sparse::matrix_view_descr::general,
+      oneapi::mkl::transpose::nontrans,
+      oneapi::mkl::sparse::matrix_view_descr::general,
+      oneapi::mkl::transpose::nontrans,
+      oneapi::mkl::sparse::matrix_view_descr::general);
+
+#ifdef DPCT_USM_LEVEL_NONE
+#define __MATMAT(STEP, PTR1, PTR2)                                             \
+  oneapi::mkl::sparse::matmat(queue, info->matrix_handle_a.get_handle(),       \
+                              info->matrix_handle_b.get_handle(),              \
+                              info->matrix_handle_axb.get_handle(),            \
+                              oneapi::mkl::sparse::matmat_request::STEP,       \
+                              info->matmat_desc.get_handle(), PTR1, PTR2)
+#else
+#define __MATMAT(STEP, PTR1, PTR2)                                             \
+  oneapi::mkl::sparse::matmat(queue, info->matrix_handle_a.get_handle(),       \
+                              info->matrix_handle_b.get_handle(),              \
+                              info->matrix_handle_axb.get_handle(),            \
+                              oneapi::mkl::sparse::matmat_request::STEP,       \
+                              info->matmat_desc.get_handle(), PTR1, PTR2, {})
+#endif
+
+  std::int64_t nnz_axb = 0;
+#ifdef DPCT_USM_LEVEL_NONE
+  info->temp_buffer_1_size = new sycl::buffer<std::int64_t, 1>(1);
+  __MATMAT(get_work_estimation_buf_size, info->temp_buffer_1_size, nullptr);
+  info->temp_buffer_1 = new sycl::buffer<std::uint8_t, 1>(
+      info->temp_buffer_1_size->get_host_access(sycl::read_only)[0]);
+  __MATMAT(work_estimation, info->temp_buffer_1_size, info->temp_buffer_1);
+  info->temp_buffer_2_size = new sycl::buffer<std::int64_t, 1>(1);
+  __MATMAT(get_compute_structure_buf_size, info->temp_buffer_2_size, nullptr);
+  info->temp_buffer_2 = new sycl::buffer<std::uint8_t, 1>(
+      info->temp_buffer_2_size->get_host_access(sycl::read_only)[0]);
+  __MATMAT(compute_structure, info->temp_buffer_2_size, info->temp_buffer_2);
+  sycl::buffer<std::int64_t, 1> nnz_axb_buf(1);
+  __MATMAT(get_nnz, &nnz_axb_buf, nullptr);
+  nnz_axb = nnz_axb_buf.get_host_access(sycl::read_only)[0];
+#else
+  info->temp_buffer_1_size = sycl::malloc_host<std::int64_t>(1, queue);
+  __MATMAT(get_work_estimation_buf_size, info->temp_buffer_1_size, nullptr);
+  queue.wait();
+  info->temp_buffer_1 =
+      sycl::malloc_device<std::uint8_t>(info->temp_buffer_1_size[0], queue);
+  __MATMAT(work_estimation, info->temp_buffer_1_size, info->temp_buffer_1);
+  info->temp_buffer_2_size = sycl::malloc_host<std::int64_t>(1, queue);
+  __MATMAT(get_compute_structure_buf_size, info->temp_buffer_2_size, nullptr);
+  queue.wait();
+  info->temp_buffer_2 =
+      sycl::malloc_device<std::uint8_t>(info->temp_buffer_2_size[0], queue);
+  __MATMAT(compute_structure, info->temp_buffer_2_size, info->temp_buffer_2);
+  std::int64_t *nnz_axb_ptr = sycl::malloc_host<std::int64_t>(1, queue);
+  __MATMAT(get_nnz, nnz_axb_ptr, nullptr);
+  queue.wait();
+  nnz_axb = *nnz_axb_ptr;
+  sycl::free(nnz_axb_ptr, queue);
+#endif
+
+  info->col_ind_axb = (int *)::dpct::cs::malloc(nnz_axb * sizeof(int), queue);
+  info->val_axb = (Ty *)::dpct::cs::malloc(nnz_axb * sizeof(Ty), queue);
+  info->matrix_handle_axb.set_matrix_data<Ty>(
+      m, n, oneapi::mkl::index_base::zero, info->row_ptr_axb, info->col_ind_axb,
+      info->val_axb);
+
+  __MATMAT(finalize_structure, nullptr, nullptr);
+
+  std::int64_t ws_size = 0;
+  oneapi::mkl::sparse::omatadd_buffer_size(
+      queue, oneapi::mkl::transpose::nontrans, oneapi::mkl::transpose::nontrans,
+      info->matrix_handle_axb.get_handle(), info->matrix_handle_d.get_handle(),
+      info->matrix_handle_c.get_handle(),
+      oneapi::mkl::sparse::omatadd_alg::default_alg,
+      info->omatadd_desc.get_handle(), ws_size);
+  *buffer_size_in_bytes = ws_size;
+}
+
+/// Calculate the non-zero elements number of the matrix C in following operation:
+/// C = alpha * A * B + beta * D
+/// \param [in] desc The descriptor of this calculation.
+/// \param [in] m The rows number of A, D and C.
+/// \param [in] n The columns number of B, D and C.
+/// \param [in] k The columns number of A and rows number of B.
+/// \param [in] info_a Matrix info of the matrix A.
+/// \param [in] nnz_a Non-zero elements number of matrix A.
+/// \param [in] row_ptr_a An array of length \p m + 1.
+/// \param [in] col_ind_a An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_b Matrix info of the matrix B.
+/// \param [in] nnz_b Non-zero elements number of matrix B.
+/// \param [in] row_ptr_b An array of length \p k + 1.
+/// \param [in] col_ind_b An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_d Matrix info of the matrix D.
+/// \param [in] nnz_d Non-zero elements number of matrix D.
+/// \param [in] row_ptr_d An array of length \p m + 1.
+/// \param [in] col_ind_d An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_c Matrix info of the matrix C.
+/// \param [in] row_ptr_c An array of length \p m + 1.
+/// \param [out] nnz_ptr Non-zero elements number of matrix C.
+/// \param [in] info The information of csrgemm2 operation.
+/// \param [in] buffer Workspace memory.
+inline void csrgemm2_nnz(descriptor_ptr desc, int m, int n, int k,
+                         const std::shared_ptr<matrix_info> info_a, int nnz_a,
+                         const int *row_ptr_a, const int *col_ind_a,
+                         const std::shared_ptr<matrix_info> info_b, int nnz_b,
+                         const int *row_ptr_b, const int *col_ind_b,
+                         const std::shared_ptr<matrix_info> info_d, int nnz_d,
+                         const int *row_ptr_d, const int *col_ind_d,
+                         const std::shared_ptr<matrix_info> info_c,
+                         int *row_ptr_c, int *nnz_ptr,
+                         std::shared_ptr<csrgemm2_info> info, void *buffer) {
+  sycl::queue &queue = desc->get_queue();
+  if (info->matrix_c_datatype ==
+      csrgemm2_info::matrix_c_datatype_t::mcd_float) {
+    info->matrix_handle_c.set_matrix_data<float>(m, n, info_c->get_index_base(),
+                                                 nullptr, nullptr, nullptr);
+  } else if (info->matrix_c_datatype ==
+             csrgemm2_info::matrix_c_datatype_t::mcd_double) {
+    info->matrix_handle_c.set_matrix_data<double>(
+        m, n, info_c->get_index_base(), nullptr, nullptr, nullptr);
+  } else if (info->matrix_c_datatype ==
+             csrgemm2_info::matrix_c_datatype_t::mcd_float2) {
+    info->matrix_handle_c.set_matrix_data<std::complex<float>>(
+        m, n, info_c->get_index_base(), nullptr, nullptr, nullptr);
+  } else {
+    info->matrix_handle_c.set_matrix_data<std::complex<double>>(
+        m, n, info_c->get_index_base(), nullptr, nullptr, nullptr);
+  }
+  auto data_buffer = dpct::detail::get_memory<std::uint8_t>(buffer);
+  oneapi::mkl::sparse::omatadd_analyze(
+      queue, oneapi::mkl::transpose::nontrans, oneapi::mkl::transpose::nontrans,
+      info->matrix_handle_axb.get_handle(), info->matrix_handle_d.get_handle(),
+      info->matrix_handle_c.get_handle(),
+      oneapi::mkl::sparse::omatadd_alg::default_alg,
+      info->omatadd_desc.get_handle(),
+#ifdef DPCT_USM_LEVEL_NONE
+      &data_buffer
+#else
+      data_buffer
+#endif
+  );
+  std::int64_t nnz_c = 0;
+  oneapi::mkl::sparse::omatadd_get_nnz(
+      queue, oneapi::mkl::transpose::nontrans, oneapi::mkl::transpose::nontrans,
+      info->matrix_handle_axb.get_handle(), info->matrix_handle_d.get_handle(),
+      info->matrix_handle_c.get_handle(),
+      oneapi::mkl::sparse::omatadd_alg::default_alg,
+      info->omatadd_desc.get_handle(), nnz_c);
+
+  assert((nnz_c >= INT_MIN && nnz_c <= INT_MAX) && "nnz_c is out of range.");
+  int nnz_c_int = nnz_c;
+  if (nnz_ptr)
+    ::dpct::cs::memcpy(queue, nnz_ptr, &nnz_c_int, sizeof(int)).wait();
+  int row_ptr_c_0 =
+      (info_c->get_index_base() == oneapi::mkl::index_base::zero) ? 0 : 1;
+  nnz_c_int += row_ptr_c_0;
+  ::dpct::cs::memcpy(queue, row_ptr_c + m, &nnz_c_int, sizeof(int));
+  ::dpct::cs::memcpy(queue, row_ptr_c, &row_ptr_c_0, sizeof(int)).wait();
+}
+
+/// Computes the matrix C in the following operation:
+/// C = alpha * A * B + beta * D
+/// \param [in] desc The descriptor of this calculation.
+/// \param [in] m The rows number of A, D and C.
+/// \param [in] n The columns number of B, D and C.
+/// \param [in] k The columns number of A and rows number of B.
+/// \param [in] alpha Scaling factor.
+/// \param [in] info_a Matrix info of the matrix A.
+/// \param [in] nnz_a Non-zero elements number of matrix A.
+/// \param [in] val_a An array containing the non-zero elements of the matrix A.
+/// \param [in] row_ptr_a An array of length \p m + 1.
+/// \param [in] col_ind_a An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_b Matrix info of the matrix B.
+/// \param [in] nnz_b Non-zero elements number of matrix B.
+/// \param [in] val_b An array containing the non-zero elements of the matrix B.
+/// \param [in] row_ptr_b An array of length \p k + 1.
+/// \param [in] col_ind_b An array containing the column indices in index-based
+/// numbering.
+/// \param [in] beta Scaling factor.
+/// \param [in] info_d Matrix info of the matrix D.
+/// \param [in] nnz_d Non-zero elements number of matrix D.
+/// \param [in] val_d An array containing the non-zero elements of the matrix D.
+/// \param [in] row_ptr_d An array of length \p m + 1.
+/// \param [in] col_ind_d An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info_c Matrix info of the matrix C.
+/// \param [out] val_c An array containing the non-zero elements of the matrix
+/// C.
+/// \param [in] row_ptr_c An array of length \p m + 1.
+/// \param [out] col_ind_c An array containing the column indices in index-based
+/// numbering.
+/// \param [in] info The information of csrgemm2 operation.
+/// \param [in] buffer Workspace memory.
+template <typename T>
+void csrgemm2(descriptor_ptr desc, int m, int n, int k, const T *alpha,
+              const std::shared_ptr<matrix_info> info_a, int nnz_a,
+              const T *val_a, const int *row_ptr_a, const int *col_ind_a,
+              const std::shared_ptr<matrix_info> info_b, int nnz_b,
+              const T *val_b, const int *row_ptr_b, const int *col_ind_b,
+              const T *beta, const std::shared_ptr<matrix_info> info_d,
+              int nnz_d, const T *val_d, const int *row_ptr_d,
+              const int *col_ind_d, const std::shared_ptr<matrix_info> info_c,
+              T *val_c, const int *row_ptr_c, int *col_ind_c,
+              std::shared_ptr<csrgemm2_info> info, void *buffer) {
+  using Ty = typename ::dpct::detail::lib_data_traits_t<T>;
+  sycl::queue &queue = desc->get_queue();
+  auto alpha_value =
+      dpct::detail::get_value(reinterpret_cast<const Ty *>(alpha), queue);
+  auto beta_value =
+      dpct::detail::get_value(reinterpret_cast<const Ty *>(beta), queue);
+
+  info->matrix_handle_a.set_matrix_data<Ty>(m, k, info_a->get_index_base(),
+                                            row_ptr_a, col_ind_a, val_a);
+  info->matrix_handle_b.set_matrix_data<Ty>(k, n, info_b->get_index_base(),
+                                            row_ptr_b, col_ind_b, val_b);
+  __MATMAT(compute, nullptr, nullptr);
+  __MATMAT(finalize, nullptr, nullptr);
+
+  info->matrix_handle_d.set_matrix_data<Ty>(m, n, info_d->get_index_base(),
+                                            row_ptr_d, col_ind_d, val_d);
+  info->matrix_handle_c.set_matrix_data<Ty>(m, n, info_c->get_index_base(),
+                                            row_ptr_c, col_ind_c, val_c);
+
+  sycl::event e;
+#ifndef DPCT_USM_LEVEL_NONE
+  e =
+#endif
+      oneapi::mkl::sparse::omatadd(
+          queue, oneapi::mkl::transpose::nontrans,
+          oneapi::mkl::transpose::nontrans, alpha_value,
+          info->matrix_handle_axb.get_handle(), beta_value,
+          info->matrix_handle_d.get_handle(),
+          info->matrix_handle_c.get_handle(),
+          oneapi::mkl::sparse::omatadd_alg::default_alg,
+          info->omatadd_desc.get_handle());
+
+  std::vector<sycl::event> events;
+  events.push_back(e);
+  events.push_back(info->release(queue, e));
+  queue.submit([&](sycl::handler &cgh) {
+    cgh.depends_on(events);
+    cgh.host_task([_p1 = info->row_ptr_axb, _p2 = info->col_ind_axb,
+                   _p3 = info->val_axb, _p4 = info->temp_buffer_1_size,
+                   _p5 = info->temp_buffer_1, _p6 = info->temp_buffer_2_size,
+                   _p7 = info->temp_buffer_2, _q = queue] {
+      ::dpct::cs::free(_p1, _q);
+      ::dpct::cs::free(_p2, _q);
+      ::dpct::cs::free(_p3, _q);
+#ifdef DPCT_USM_LEVEL_NONE
+      delete _p4;
+      delete _p5;
+      delete _p6;
+      delete _p7;
+#else
+      sycl::free(_p4, _q);
+      sycl::free(_p5, _q);
+      sycl::free(_p6, _q);
+      sycl::free(_p7, _q);
+#endif
+    });
+  });
+}
+
+#endif
+} // namespace dpct::sparse
+
+#endif // __DPCT_SPARSE_UTILS_HPP__
diff --git a/sycl/include/dpct/util.hpp b/sycl/include/dpct/util.hpp
new file mode 100644
index 00000000000..033f6c74564
--- /dev/null
+++ b/sycl/include/dpct/util.hpp
@@ -0,0 +1,1358 @@
+//==---- util.hpp ---------------------------------*- C++ -*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_UTIL_HPP__
+#define __DPCT_UTIL_HPP__
+
+#include <sycl/sycl.hpp>
+#include <complex>
+#include <type_traits>
+#include <cassert>
+#include <cstdint>
+
+// TODO: Remove these function definitions once they exist in the DPC++ compiler
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__INTEL_LLVM_COMPILER)
+template <typename T>
+__SYCL_CONVERGENT__ extern SYCL_EXTERNAL __SYCL_EXPORT __attribute__((noduplicate))
+T __spirv_GroupNonUniformShuffle(__spv::Scope::Flag, T, unsigned) noexcept;
+
+template <typename T>
+__SYCL_CONVERGENT__ extern SYCL_EXTERNAL __SYCL_EXPORT __attribute__((noduplicate))
+T __spirv_GroupNonUniformShuffleDown(__spv::Scope::Flag, T, unsigned) noexcept;
+
+template <typename T>
+__SYCL_CONVERGENT__ extern SYCL_EXTERNAL __SYCL_EXPORT __attribute__((noduplicate))
+T __spirv_GroupNonUniformShuffleUp(__spv::Scope::Flag, T, unsigned) noexcept;
+#endif
+
+namespace dpct {
+/// dim3 is used to store 3 component dimensions.
+class dim3 {
+public:
+  unsigned x, y, z;
+
+  constexpr dim3(unsigned x = 1, unsigned y = 1, unsigned z = 1)
+      : x(x), y(y), z(z) {}
+
+  dim3(const sycl::id<3> &r) : dim3(r[2], r[1], r[0]) {}
+
+  operator sycl::range<3>() const { return sycl::range<3>(z, y, x); }
+};
+
+inline dim3 operator*(const dim3 &a, const dim3 &b) {
+  return dim3{a.x * b.x, a.y * b.y, a.z * b.z};
+}
+
+namespace detail {
+
+template <typename tag, typename T> class generic_error_type {
+public:
+  generic_error_type() = default;
+  generic_error_type(T value) : value{value} {}
+  operator T() const { return value; }
+
+private:
+  T value;
+};
+
+} // namespace detail
+
+using err0 = detail::generic_error_type<struct err0_tag, int>;
+using err1 = detail::generic_error_type<struct err1_tag, int>;
+
+template <int... Ints> struct integer_sequence {};
+template <int Size, int... Ints>
+struct make_index_sequence
+    : public make_index_sequence<Size - 1, Size - 1, Ints...> {};
+template <int... Ints>
+struct make_index_sequence<0, Ints...> : public integer_sequence<Ints...> {};
+
+template <typename T> struct [[deprecated]] DataType { using T2 = T; };
+template <typename T> struct DataType<sycl::vec<T, 2>> {
+  using T2 = std::complex<T>;
+};
+
+[[deprecated("Please use dpct::blas::matrix_mem_copy() instead.")]] inline void
+matrix_mem_copy(void *to_ptr, const void *from_ptr, int to_ld, int from_ld,
+                int rows, int cols, int elem_size,
+                memcpy_direction direction = automatic,
+                sycl::queue &queue = dpct::get_default_queue(),
+                bool async = false) {
+  if (to_ptr == from_ptr && to_ld == from_ld) {
+    return;
+  }
+
+  if (to_ld == from_ld) {
+    size_t copy_size = elem_size * ((cols - 1) * (size_t)to_ld + rows);
+    if (async)
+      detail::dpct_memcpy(queue, (void *)to_ptr, (void *)from_ptr, copy_size,
+                          direction);
+    else
+      detail::dpct_memcpy(queue, (void *)to_ptr, (void *)from_ptr, copy_size,
+                          direction)
+          .wait();
+  } else {
+    if (async)
+      detail::dpct_memcpy(queue, to_ptr, from_ptr, elem_size * to_ld,
+                          elem_size * from_ld, elem_size * rows, cols,
+                          direction);
+    else
+      sycl::event::wait(detail::dpct_memcpy(
+          queue, to_ptr, from_ptr, elem_size * to_ld, elem_size * from_ld,
+          elem_size * rows, cols, direction));
+  }
+}
+
+/// Copy matrix data. The default leading dimension is column.
+/// \param [out] to_ptr A pointer points to the destination location.
+/// \param [in] from_ptr A pointer points to the source location.
+/// \param [in] to_ld The leading dimension the destination matrix.
+/// \param [in] from_ld The leading dimension the source matrix.
+/// \param [in] rows The number of rows of the source matrix.
+/// \param [in] cols The number of columns of the source matrix.
+/// \param [in] direction The direction of the data copy.
+/// \param [in] queue The queue where the routine should be executed.
+/// \param [in] async If this argument is true, the return of the function
+/// does NOT guarantee the copy is completed.
+template <typename T>
+[[deprecated("Please use dpct::blas::matrix_mem_copy() instead.")]] inline void
+matrix_mem_copy(T *to_ptr, const T *from_ptr, int to_ld, int from_ld, int rows,
+                int cols, memcpy_direction direction = automatic,
+                sycl::queue &queue = dpct::get_default_queue(),
+                bool async = false) {
+  using Ty = typename DataType<T>::T2;
+  matrix_mem_copy((void *)to_ptr, (void *)from_ptr, to_ld, from_ld, rows, cols,
+                  sizeof(Ty), direction, queue, async);
+}
+
+/// Cast the high or low 32 bits of a double to an integer.
+/// \param [in] d The double value.
+/// \param [in] use_high32 Cast the high 32 bits of the double if true;
+/// otherwise cast the low 32 bits.
+inline int cast_double_to_int(double d, bool use_high32 = true) {
+  sycl::vec<double, 1> v0{d};
+  auto v1 = v0.as<sycl::int2>();
+  if (use_high32)
+    return v1[1];
+  return v1[0];
+}
+
+/// Combine two integers, the first as the high 32 bits and the second
+/// as the low 32 bits, into a double.
+/// \param [in] high32 The integer as the high 32 bits
+/// \param [in] low32 The integer as the low 32 bits
+inline double cast_ints_to_double(int high32, int low32) {
+  sycl::int2 v0{low32, high32};
+  auto v1 = v0.as<sycl::vec<double, 1>>();
+  return v1;
+}
+
+/// Reverse the bit order of an unsigned integer
+/// \param [in] a Input unsigned integer value
+/// \returns Value of a with the bit order reversed
+template <typename T> inline T reverse_bits(T a) {
+  static_assert(std::is_unsigned<T>::value && std::is_integral<T>::value,
+                "unsigned integer required");
+  if (!a)
+    return 0;
+  T mask = 0;
+  size_t count = 4 * sizeof(T);
+  mask = ~mask >> count;
+  while (count) {
+    a = ((a & mask) << count) | ((a & ~mask) >> count);
+    count = count >> 1;
+    mask = mask ^ (mask << count);
+  }
+  return a;
+}
+
+/// \param [in] a The first value contains 4 bytes
+/// \param [in] b The second value contains 4 bytes
+/// \param [in] s The selector value, only lower 16bit used
+/// \returns the permutation result of 4 bytes selected in the way
+/// specified by \p s from \p a and \p b
+inline unsigned int byte_level_permute(unsigned int a, unsigned int b,
+                                       unsigned int s) {
+  unsigned int ret;
+  ret =
+      ((((std::uint64_t)b << 32 | a) >> (s & 0x7) * 8) & 0xff) |
+      (((((std::uint64_t)b << 32 | a) >> ((s >> 4) & 0x7) * 8) & 0xff) << 8) |
+      (((((std::uint64_t)b << 32 | a) >> ((s >> 8) & 0x7) * 8) & 0xff) << 16) |
+      (((((std::uint64_t)b << 32 | a) >> ((s >> 12) & 0x7) * 8) & 0xff) << 24);
+  return ret;
+}
+
+/// \param [in] low32 The 4 bytes to construct the 8 bytes value as low 32 bits.
+/// \param [in] high32 The 4 bytes to construct the 8 bytes value as high 32
+/// bits.
+/// \param [in] sel The selector value. It is used to generate selectors which are
+/// used to fetch byte value from \p low32 and \p high32 to construct result
+/// value.
+/// \param [in] mode The mode of permutation, together with \p sel, it
+/// further defines the behavior of data selection. \p mode and \p sel define 4
+/// selectors (s[i], i=0, 1, 2, 3), which are used as index to fetch 4 bytes from
+/// the 8 bytes value constructed by \p low32 and \p high32; the byte selected by s[i]
+/// is used to fill the i-th byte of the result.
+/// The available mode values are:
+/// mode value 0: s[i] = sel[i * 4 + 3 : i * 4]
+/// mode value 1: s[i] = sel[1 : 0] + i
+/// mode value 2: s[i] = (sel[1 : 0] + 7) % 8
+/// mode value 3: s[i] = sel[1 : 0]
+/// mode value 4: s[i] = max(sel[1 : 0], i)
+/// mode value 5: s[i] = min(sel[1 : 0], i)
+/// mode value 6: s[0] = sel[0 : 0] * 2
+///               s[1] = sel[0 : 0] * 2 + 1
+///               s[2] = s[0]
+///               s[3] = s[1]
+/// other value: illegal, undefined behavior, return 0.
+inline uint32_t byte_level_permute_custom(uint32_t low32, uint32_t high32,
+                                          uint32_t sel, int mode = 0) {
+  constexpr uint16_t lookup[6][4] = {
+      {0x3210, 0x4321, 0x5432, 0x6543}, // Forward 4-byte extract
+      {0x5670, 0x6701, 0x7012, 0x0123}, // Backward 4-byte extract
+      {0x0000, 0x1111, 0x2222, 0x3333}, // Replicate 8-bit values
+      {0x3210, 0x3211, 0x3222, 0x3333}, // Edge clamp left
+      {0x0000, 0x1110, 0x2210, 0x3210}, // Edge clamp right
+      {0x1010, 0x3232, 0x1010, 0x3232}  // Replicate 16-bit values
+  };
+
+  if (mode >= 1 && mode <= 6) {
+    return byte_level_permute(low32, high32, lookup[mode - 1][sel & 0x3]);
+  } else if (!mode) {
+    return byte_level_permute(low32, high32, sel);
+  }
+  return 0;
+}
+
+/// Find position of first least significant set bit in an integer.
+/// ffs(0) returns 0.
+///
+/// \param [in] a Input integer value
+/// \returns The position
+template <typename T> inline int ffs(T a) {
+  static_assert(std::is_integral<T>::value, "integer required");
+  return (sycl::ctz(a) + 1) % (sizeof(T) * 8 + 1);
+}
+
+/// select_from_sub_group allows work-items to obtain a copy of a value held by
+/// any other work-item in the sub_group. The input sub_group will be divided
+/// into several logical sub_groups with id range [0, \p logical_sub_group_size
+/// - 1]. Each work-item in logical sub_group gets value from another work-item
+/// whose id is \p remote_local_id. If \p remote_local_id is outside the
+/// logical sub_group id range, \p remote_local_id will modulo with \p
+/// logical_sub_group_size. The \p logical_sub_group_size must be a power of 2
+/// and not exceed input sub_group size.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] remote_local_id Input source work item id
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T select_from_sub_group(sycl::sub_group g, T x, int remote_local_id,
+                        int logical_sub_group_size = 32) {
+  unsigned int start_index =
+      g.get_local_linear_id() / logical_sub_group_size * logical_sub_group_size;
+  return sycl::select_from_group(
+      g, x, start_index + remote_local_id % logical_sub_group_size);
+}
+
+/// shift_sub_group_left move values held by the work-items in a sub_group
+/// directly to another work-item in the sub_group, by shifting values a fixed
+/// number of work-items to the left. The input sub_group will be divided into
+/// several logical sub_groups with id range [0, \p logical_sub_group_size - 1].
+/// Each work-item in logical sub_group gets value from another work-item whose
+/// id is caller's id adds \p delta. If calculated id is outside the logical
+/// sub_group id range, the work-item will get value from itself. The \p
+/// logical_sub_group_size must be a power of 2 and not exceed input sub_group
+/// size.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T shift_sub_group_left(sycl::sub_group g, T x, unsigned int delta,
+                       int logical_sub_group_size = 32) {
+  unsigned int id = g.get_local_linear_id();
+  unsigned int end_index =
+      (id / logical_sub_group_size + 1) * logical_sub_group_size;
+  T result = sycl::shift_group_left(g, x, delta);
+  if ((id + delta) >= end_index) {
+    result = x;
+  }
+  return result;
+}
+
+/// shift_sub_group_right move values held by the work-items in a sub_group
+/// directly to another work-item in the sub_group, by shifting values a fixed
+/// number of work-items to the right. The input sub_group will be divided into
+/// several logical_sub_groups with id range [0, \p logical_sub_group_size - 1].
+/// Each work-item in logical_sub_group gets value from another work-item whose
+/// id is caller's id subtracts \p delta. If calculated id is outside the
+/// logical sub_group id range, the work-item will get value from itself. The \p
+/// logical_sub_group_size must be a power of 2 and not exceed input sub_group
+/// size.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T shift_sub_group_right(sycl::sub_group g, T x, unsigned int delta,
+                        int logical_sub_group_size = 32) {
+  unsigned int id = g.get_local_linear_id();
+  unsigned int start_index =
+      id / logical_sub_group_size * logical_sub_group_size;
+  T result = sycl::shift_group_right(g, x, delta);
+  if ((id - start_index) < delta) {
+    result = x;
+  }
+  return result;
+}
+
+/// permute_sub_group_by_xor permutes values by exchanging values held by pairs
+/// of work-items identified by computing the bitwise exclusive OR of the
+/// work-item id and some fixed mask. The input sub_group will be divided into
+/// several logical sub_groups with id range [0, \p logical_sub_group_size - 1].
+/// Each work-item in logical sub_group gets value from another work-item whose
+/// id is bitwise exclusive OR of the caller's id and \p mask. If calculated id
+/// is outside the logical sub_group id range, the work-item will get value from
+/// itself. The \p logical_sub_group_size must be a power of 2 and not exceed
+/// input sub_group size.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] mask Input mask
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T permute_sub_group_by_xor(sycl::sub_group g, T x, unsigned int mask,
+                           int logical_sub_group_size = 32) {
+  unsigned int id = g.get_local_linear_id();
+  unsigned int start_index =
+      id / logical_sub_group_size * logical_sub_group_size;
+  unsigned int target_offset = (id % logical_sub_group_size) ^ mask;
+  return sycl::select_from_group(g, x,
+                                 target_offset < logical_sub_group_size
+                                     ? start_index + target_offset
+                                     : id);
+}
+
+/// The function match_any_over_sub_group conducts a comparison of values
+/// across work-items within a sub-group. match_any_over_sub_group return a mask
+/// in which some bits are set to 1, indicating that the \p value provided by
+/// the work-item represented by these bits are equal. The n-th bit of mask
+/// representing the work-item with id n. The parameter \p member_mask
+/// indicating the work-items participating the call.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] member_mask Input mask
+/// \param [in] value Input value
+/// \returns The result
+template <typename T>
+unsigned int match_any_over_sub_group(sycl::sub_group g, unsigned member_mask,
+                                      T value) {
+  static_assert(std::is_trivially_copyable_v<T>,
+                "Value type must be trivially copyable type.");
+  if (!member_mask) {
+    return 0;
+  }
+  unsigned int id = g.get_local_linear_id();
+  unsigned int flag = 0, result = 0, reduce_result = 0;
+  unsigned int bit_index = 0x1 << id;
+  bool is_participate = member_mask & bit_index;
+  T broadcast_value = 0;
+  bool matched = false;
+  while (flag != member_mask) {
+    broadcast_value =
+        sycl::select_from_group(g, value, sycl::ctz((~flag & member_mask)));
+    reduce_result = sycl::reduce_over_group(
+        g, is_participate ? (broadcast_value == value ? bit_index : 0) : 0,
+        sycl::plus<>());
+    flag |= reduce_result;
+    matched = reduce_result & bit_index;
+    result = matched * reduce_result + (1 - matched) * result;
+  }
+  return result;
+}
+
+/// The function match_all_over_sub_group conducts a comparison of values
+/// across work-items within a sub-group. match_all_over_sub_group return \p
+/// member_mask and predicate \p pred will be set to 1 if all \p value that
+/// provided by each work-item in \p member_mask are equal, otherwise return 0
+/// and the predicate \p pred will be set to 0. The n-th bit of \p member_mask
+/// representing the work-item with id n. The parameter \p member_mask
+/// indicating the work-items participating the call.
+/// \tparam T Input value type
+/// \param [in] g Input sub_group
+/// \param [in] member_mask Input mask
+/// \param [in] value Input value
+/// \param [out] pred Output predicate
+/// \returns The result
+template <typename T>
+unsigned int match_all_over_sub_group(sycl::sub_group g, unsigned member_mask,
+                                      T value, int *pred) {
+  static_assert(std::is_trivially_copyable_v<T>,
+                "Value type must be trivially copyable type.");
+  if (!member_mask) {
+    return 0;
+  }
+  unsigned int id = g.get_local_linear_id();
+  unsigned int bit_index = 0x1 << id;
+  bool is_participate = member_mask & bit_index;
+  T broadcast_value = sycl::select_from_group(g, value, sycl::ctz(member_mask));
+  unsigned int reduce_result = sycl::reduce_over_group(
+      g,
+      (member_mask & bit_index) ? (broadcast_value == value ? bit_index : 0)
+                                : 0,
+      sycl::plus<>());
+  bool all_equal = (reduce_result == member_mask);
+  *pred = is_participate & all_equal;
+  return all_equal * member_mask;
+}
+
+namespace experimental {
+#if defined(__NVPTX__) && defined(__SYCL_DEVICE_ONLY__)
+#define SHFL_SYNC(RES, MASK, VAL, SHFL_PARAM, C, SHUFFLE_INSTR)                \
+  if constexpr (std::is_same_v<T, double>) {                                   \
+    int x_a, x_b;                                                              \
+    asm("mov.b64 {%0,%1},%2;" : "=r"(x_a), "=r"(x_b) : "d"(VAL));              \
+    auto tmp_a = __nvvm_shfl_sync_##SHUFFLE_INSTR(MASK, x_a, SHFL_PARAM, C);   \
+    auto tmp_b = __nvvm_shfl_sync_##SHUFFLE_INSTR(MASK, x_b, SHFL_PARAM, C);   \
+    asm("mov.b64 %0,{%1,%2};" : "=d"(RES) : "r"(tmp_a), "r"(tmp_b));           \
+  } else if constexpr (std::is_same_v<T, long> ||                              \
+                       std::is_same_v<T, unsigned long>) {                     \
+    int x_a, x_b;                                                              \
+    asm("mov.b64 {%0,%1},%2;" : "=r"(x_a), "=r"(x_b) : "l"(VAL));              \
+    auto tmp_a = __nvvm_shfl_sync_##SHUFFLE_INSTR(MASK, x_a, SHFL_PARAM, C);   \
+    auto tmp_b = __nvvm_shfl_sync_##SHUFFLE_INSTR(MASK, x_b, SHFL_PARAM, C);   \
+    asm("mov.b64 %0,{%1,%2};" : "=l"(RES) : "r"(tmp_a), "r"(tmp_b));           \
+  } else if constexpr (std::is_same_v<T, sycl::half>) {                        \
+    short tmp_b16;                                                             \
+    asm("mov.b16 %0,%1;" : "=h"(tmp_b16) : "h"(VAL));                          \
+    auto tmp_b32 = __nvvm_shfl_sync_##SHUFFLE_INSTR(                           \
+        MASK, static_cast<int>(tmp_b16), SHFL_PARAM, C);                       \
+    asm("mov.b16 %0,%1;" : "=h"(RES) : "h"(static_cast<short>(tmp_b32)));      \
+  } else if constexpr (std::is_same_v<T, float>) {                             \
+    auto tmp_b32 = __nvvm_shfl_sync_##SHUFFLE_INSTR(                           \
+        MASK, __nvvm_bitcast_f2i(VAL), SHFL_PARAM, C);                         \
+    RES = __nvvm_bitcast_i2f(tmp_b32);                                         \
+  } else {                                                                     \
+    RES = __nvvm_shfl_sync_##SHUFFLE_INSTR(MASK, VAL, SHFL_PARAM, C);          \
+  }
+#endif
+/// Masked version of select_from_sub_group, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] remote_local_id Input source work item id
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T select_from_sub_group(unsigned int member_mask,
+                        sycl::sub_group g, T x, int remote_local_id,
+                        int logical_sub_group_size = 32) {
+#if defined(__SYCL_DEVICE_ONLY__)
+#if defined(__SPIR__)
+  unsigned int start_index =
+      g.get_local_linear_id() / logical_sub_group_size * logical_sub_group_size;
+  unsigned logical_remote_id =
+      start_index + remote_local_id % logical_sub_group_size;
+  return __spirv_GroupNonUniformShuffle(__spv::Scope::Subgroup, x, logical_remote_id);
+#elif defined(__NVPTX__)
+  T result;
+  int cVal = ((32 - logical_sub_group_size) << 8) | 31;
+  SHFL_SYNC(result, member_mask, x, remote_local_id, cVal, idx_i32)
+  return result;
+#endif
+#else
+  (void)g;
+  (void)x;
+  (void)remote_local_id;
+  (void)logical_sub_group_size;
+  (void)member_mask;
+  throw sycl::exception(sycl::errc::runtime, "Masked version of select_from_sub_group not "
+                        "supported on host device.");
+#endif // __SYCL_DEVICE_ONLY__
+}
+
+/// Masked version of shift_sub_group_left, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T shift_sub_group_left(unsigned int member_mask,
+                       sycl::sub_group g, T x, unsigned int delta,
+                       int logical_sub_group_size = 32) {
+#if defined(__SYCL_DEVICE_ONLY__)
+#if defined(__SPIR__)
+  unsigned int id = g.get_local_linear_id();
+  unsigned int end_index =
+      (id / logical_sub_group_size + 1) * logical_sub_group_size;
+  T result = __spirv_GroupNonUniformShuffleDown(__spv::Scope::Subgroup, x, delta);
+  if ((id + delta) >= end_index) {
+    result = x;
+  }
+  return result;
+#elif defined(__NVPTX__)
+  T result;
+  int cVal = ((32 - logical_sub_group_size) << 8) | 31;
+  SHFL_SYNC(result, member_mask, x, delta, cVal, down_i32)
+  return result;
+#endif
+#else
+  (void)g;
+  (void)x;
+  (void)delta;
+  (void)logical_sub_group_size;
+  (void)member_mask;
+  throw sycl::exception(sycl::errc::runtime, "Masked version of shift_sub_group_left not "
+                        "supported on host device.");
+#endif // __SYCL_DEVICE_ONLY__
+}
+
+/// Masked version of shift_sub_group_right, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T shift_sub_group_right(unsigned int member_mask,
+                        sycl::sub_group g, T x, unsigned int delta,
+                        int logical_sub_group_size = 32) {
+#if defined(__SYCL_DEVICE_ONLY__)
+#if defined(__SPIR__)
+  unsigned int id = g.get_local_linear_id();
+  unsigned int start_index =
+      id / logical_sub_group_size * logical_sub_group_size;
+  T result = __spirv_GroupNonUniformShuffleUp(__spv::Scope::Subgroup, x, delta);
+  if ((id - start_index) < delta) {
+    result = x;
+  }
+  return result;
+#elif defined(__NVPTX__)
+  T result;
+  int cVal = ((32 - logical_sub_group_size) << 8);
+  SHFL_SYNC(result, member_mask, x, delta, cVal, up_i32)
+  return result;
+#endif
+#else
+  (void)g;
+  (void)x;
+  (void)delta;
+  (void)logical_sub_group_size;
+  (void)member_mask;
+  throw sycl::exception(sycl::errc::runtime, "Masked version of shift_sub_group_right not "
+                        "supported on host device.");
+#endif // __SYCL_DEVICE_ONLY__
+}
+
+/// Masked version of shift_sub_group_left, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam LogicSubGroupSize Input logical sub_group size
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] last_item Index of last thread in logical subgroup
+/// \returns The result
+template <size_t LogicSubGroupSize, typename T>
+T shift_sub_group_left(sycl::sub_group sg, T input, int delta, int last_item,
+                       unsigned member_mask) {
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+  T result;
+  constexpr int cVal = ((32 - LogicSubGroupSize) << 8);
+  SHFL_SYNC(result, member_mask, input, delta, cVal | last_item, down_i32)
+  return result;
+#else
+  if ((1U << sg.get_local_linear_id()) & member_mask) {
+    auto inner = sycl::ext::oneapi::experimental::entangle(sg);
+    sycl::group_barrier(inner);
+  }
+  auto partition =
+      sycl::ext::oneapi::experimental::chunked_partition<LogicSubGroupSize>(
+          sg);
+  int id = partition.get_local_linear_id();
+  T result = sycl::shift_group_left(partition, input, delta);
+  if ((id + delta) > last_item)
+    result = input;
+  return result;
+#endif
+}
+
+/// Masked version of shift_sub_group_right, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam LogicSubGroupSize Input logical sub_group size
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] delta Input delta
+/// \param [in] first_item Index of first lane in logical subgroup
+/// \returns The result
+template <size_t LogicSubGroupSize, typename T>
+T shift_sub_group_right(sycl::sub_group sg, T input, int delta, int first_item,
+                        unsigned member_mask) {
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+  T result;
+  constexpr int cVal = ((32 - LogicSubGroupSize) << 8);
+  SHFL_SYNC(result, member_mask, input, delta, cVal | first_item, up_i32)
+  return result;
+#else
+  if ((1U << sg.get_local_linear_id()) & member_mask) {
+    auto inner = sycl::ext::oneapi::experimental::entangle(sg);
+    sycl::group_barrier(inner);
+  }
+  auto partition =
+      sycl::ext::oneapi::experimental::chunked_partition<LogicSubGroupSize>(
+          sg);
+  int id = sg.get_local_linear_id();
+  T result = sycl::shift_group_right(partition, input, delta);
+  if ((id - first_item) < delta)
+    result = input;
+  return result;
+#endif
+}
+
+/// Masked version of permute_sub_group_by_xor, which execute masked sub-group
+/// operation. The parameter member_mask indicating the work-items participating
+/// the call. Whether the n-th bit is set to 1 representing whether the
+/// work-item with id n is participating the call. All work-items named in
+/// member_mask must be executed with the same member_mask, or the result is
+/// undefined.
+/// \tparam T Input value type
+/// \param [in] member_mask Input mask
+/// \param [in] g Input sub_group
+/// \param [in] x Input value
+/// \param [in] mask Input mask
+/// \param [in] logical_sub_group_size Input logical sub_group size
+/// \returns The result
+template <typename T>
+T permute_sub_group_by_xor(unsigned int member_mask,
+                           sycl::sub_group g, T x, unsigned int mask,
+                           int logical_sub_group_size = 32) {
+#if defined(__SYCL_DEVICE_ONLY__)
+#if defined(__SPIR__)
+  unsigned int id = g.get_local_linear_id();
+  unsigned int start_index =
+      id / logical_sub_group_size * logical_sub_group_size;
+  unsigned int target_offset = (id % logical_sub_group_size) ^ mask;
+  unsigned logical_remote_id = (target_offset < logical_sub_group_size) ? start_index + target_offset : id;
+  return __spirv_GroupNonUniformShuffle(__spv::Scope::Subgroup, x, logical_remote_id);
+#elif defined(__NVPTX__)
+  T result;
+  int cVal = ((32 - logical_sub_group_size) << 8) | 31;
+  SHFL_SYNC(result, member_mask, x, mask, cVal, bfly_i32)
+  return result;
+#endif
+#else
+  (void)g;
+  (void)x;
+  (void)mask;
+  (void)logical_sub_group_size;
+  (void)member_mask;
+  throw sycl::exception(sycl::errc::runtime, "Masked version of permute_sub_group_by_xor not "
+                        "supported on host device.");
+#endif // __SYCL_DEVICE_ONLY__
+}
+#if defined(__NVPTX__)
+#undef SHFL_SYNC
+#endif
+} // namespace experimental
+
+/// Computes the multiplication of two complex numbers.
+/// \tparam T Complex element type
+/// \param [in] x The first input complex number
+/// \param [in] y The second input complex number
+/// \returns The result
+template <typename T>
+sycl::vec<T, 2> cmul(sycl::vec<T, 2> x, sycl::vec<T, 2> y) {
+  std::complex<T> t1(x[0], x[1]), t2(y[0], y[1]);
+  t1 = t1 * t2;
+  return sycl::vec<T, 2>(t1.real(), t1.imag());
+}
+
+/// Computes the division of two complex numbers.
+/// \tparam T Complex element type
+/// \param [in] x The first input complex number
+/// \param [in] y The second input complex number
+/// \returns The result
+template <typename T>
+sycl::vec<T, 2> cdiv(sycl::vec<T, 2> x, sycl::vec<T, 2> y) {
+  std::complex<T> t1(x[0], x[1]), t2(y[0], y[1]);
+  t1 = t1 / t2;
+  return sycl::vec<T, 2>(t1.real(), t1.imag());
+}
+
+/// Computes the magnitude of a complex number.
+/// \tparam T Complex element type
+/// \param [in] x The input complex number
+/// \returns The result
+template <typename T>
+T cabs(sycl::vec<T, 2> x) {
+  std::complex<T> t(x[0], x[1]);
+  return std::abs(t);
+}
+
+/// Computes the complex conjugate of a complex number.
+/// \tparam T Complex element type
+/// \param [in] x The input complex number
+/// \returns The result
+template <typename T>
+sycl::vec<T, 2> conj(sycl::vec<T, 2> x) {
+  std::complex<T> t(x[0], x[1]);
+  t = std::conj(t);
+  return sycl::vec<T, 2>(t.real(), t.imag());
+}
+
+inline int get_sycl_language_version() {
+#ifdef SYCL_LANGUAGE_VERSION
+  return SYCL_LANGUAGE_VERSION;
+#else
+  return 202000;
+#endif
+}
+
+// Returns the SYCL event status for the SYCL command.
+/// \param [in] event_ptr A pointer points to the SYCL event
+/// \returns The execution result for the SYCL command
+inline int sycl_event_query(sycl::event *event_ptr) {
+  if (event_ptr->get_info<sycl::info::event::command_execution_status>() ==
+      sycl::info::event_command_status::complete) {
+    // The SYCL command has finished running on the SYCL device.
+    return 0;
+  } else {
+    // The SYCL command has not finished running on the SYCL device.
+    return 1;
+  }
+}
+
+namespace experimental {
+/// Synchronize work items from all work groups within a SYCL kernel.
+/// \param [in] item:  Represents a work group.
+/// \param [in] counter: An atomic object defined on a device memory which can
+/// be accessed by work items in all work groups. The initial value of the
+/// counter should be zero.
+/// Note: Please make sure that all the work items of all work groups within
+/// a SYCL kernel can be scheduled actively at the same time on a device.
+template <int dimensions = 3>
+[[deprecated(
+    "Please use "
+    "sycl::group_barrier(sycl::ext::oneapi::experimental::root_group G) "
+    "instead.")]] inline void
+nd_range_barrier(
+    const sycl::nd_item<dimensions> &item,
+    sycl::atomic_ref<unsigned int,
+#ifdef __AMDGPU__
+                     sycl::memory_order::acq_rel,
+#else
+                     sycl::memory_order::seq_cst,
+#endif
+                     sycl::memory_scope::device,
+                     sycl::access::address_space::global_space> &counter) {
+
+  static_assert(dimensions == 3, "dimensions must be 3.");
+
+  unsigned int num_groups = item.get_group_range(2) * item.get_group_range(1) *
+                            item.get_group_range(0);
+
+  item.barrier();
+
+  if (item.get_local_linear_id() == 0) {
+    unsigned int inc = 1;
+    unsigned int old_arrive = 0;
+    bool is_group0 =
+        (item.get_group(2) + item.get_group(1) + item.get_group(0) == 0);
+    if (is_group0) {
+      inc = 0x80000000 - (num_groups - 1);
+    }
+
+    old_arrive = counter.fetch_add(inc);
+    // Synchronize all the work groups
+    while (((old_arrive ^ counter.load()) & 0x80000000) == 0)
+      ;
+  }
+
+  item.barrier();
+}
+
+/// Synchronize work items from all work groups within a SYCL kernel.
+/// \param [in] item:  Represents a work group.
+/// \param [in] counter: An atomic object defined on a device memory which can
+/// be accessed by work items in all work groups. The initial value of the
+/// counter should be zero.
+/// Note: Please make sure that all the work items of all work groups within
+/// a SYCL kernel can be scheduled actively at the same time on a device.
+template <>
+[[deprecated(
+    "Please use "
+    "sycl::group_barrier(sycl::ext::oneapi::experimental::root_group G) "
+    "instead.")]] inline void
+nd_range_barrier(
+    const sycl::nd_item<1> &item,
+    sycl::atomic_ref<unsigned int,
+#ifdef __AMDGPU__
+                     sycl::memory_order::acq_rel,
+#else
+                     sycl::memory_order::seq_cst,
+#endif
+                     sycl::memory_scope::device,
+                     sycl::access::address_space::global_space> &counter) {
+  unsigned int num_groups = item.get_group_range(0);
+
+  item.barrier();
+
+  if (item.get_local_linear_id() == 0) {
+    unsigned int inc = 1;
+    unsigned int old_arrive = 0;
+    bool is_group0 = (item.get_group(0) == 0);
+    if (is_group0) {
+      inc = 0x80000000 - (num_groups - 1);
+    }
+
+    old_arrive = counter.fetch_add(inc);
+    // Synchronize all the work groups
+    while (((old_arrive ^ counter.load()) & 0x80000000) == 0)
+      ;
+  }
+
+  item.barrier();
+}
+
+/// The logical-group is a logical collection of some work-items within a
+/// work-group.
+/// Note: Please make sure that the logical-group size is a power of 2 in the
+/// range [1, current_sub_group_size].
+template <int dimensions = 3> class logical_group {
+  sycl::nd_item<dimensions> _item;
+  sycl::group<dimensions> _g;
+  uint32_t _logical_group_size;
+  uint32_t _group_linear_range_in_parent;
+
+public:
+  /// Dividing \p parent_group into several logical-groups.
+  /// \param [in] item Current work-item.
+  /// \param [in] parent_group The group to be divided.
+  /// \param [in] size The logical-group size.
+  logical_group(sycl::nd_item<dimensions> item,
+                sycl::group<dimensions> parent_group, uint32_t size)
+      : _item(item), _g(parent_group), _logical_group_size(size) {
+    _group_linear_range_in_parent =
+        (_g.get_local_linear_range() - 1) / _logical_group_size + 1;
+  }
+  logical_group(sycl::nd_item<dimensions> item)
+      : _item(item), _g(item.get_group()) {}
+  /// Returns the index of the work-item within the logical-group.
+  uint32_t get_local_linear_id() const {
+    return _item.get_local_linear_id() % _logical_group_size;
+  }
+  /// Returns the index of the logical-group in the parent group.
+  uint32_t get_group_linear_id() const {
+    return _item.get_local_linear_id() / _logical_group_size;
+  }
+  /// Returns the number of work-items in the logical-group.
+  uint32_t get_local_linear_range() const {
+    if (_g.get_local_linear_range() % _logical_group_size == 0) {
+      return _logical_group_size;
+    }
+    uint32_t last_item_group_id =
+        _g.get_local_linear_range() / _logical_group_size;
+    uint32_t first_of_last_group = last_item_group_id * _logical_group_size;
+    if (_item.get_local_linear_id() >= first_of_last_group) {
+      return _g.get_local_linear_range() - first_of_last_group;
+    } else {
+      return _logical_group_size;
+    }
+  }
+  /// Returns the number of logical-group in the parent group.
+  uint32_t get_group_linear_range() const {
+    return _group_linear_range_in_parent;
+  }
+};
+
+// The original source of the functions calculate_max_active_wg_per_xecore and
+// calculate_max_potential_wg were under the license below:
+//
+// Copyright (C) Intel Corporation
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+//
+/// This function is used for occupancy calculation, it computes the max active
+/// work-group number per Xe-Core. Ref to
+/// https://github.com/oneapi-src/oneAPI-samples/tree/master/Tools/GPU-Occupancy-Calculator
+/// \param [out] num_wg Active work-group number.
+/// \param [in] wg_size Work-group size.
+/// \param [in] slm_size Share local memory size.
+/// \param [in] sg_size Sub-group size.
+/// \param [in] used_barrier Whether barrier is used.
+/// \param [in] used_large_grf Whether large General Register File is used.
+/// \return If no error, returns 0.
+/// If \p wg_size exceeds the max work-group size, the max work-group size will
+/// be used instead of \p wg_size and returns -1.
+inline int calculate_max_active_wg_per_xecore(int *num_wg, int wg_size,
+                                              int slm_size = 0,
+                                              int sg_size = 32,
+                                              bool used_barrier = false,
+                                              bool used_large_grf = false) {
+  int ret = 0;
+  const int slm_size_per_xe_core = 64 * 1024;
+  const int max_barrier_registers = 32;
+  dpct::device_ext &dev = dpct::get_current_device();
+
+  size_t max_wg_size = dev.get_info<sycl::info::device::max_work_group_size>();
+  if (wg_size > max_wg_size) {
+    wg_size = max_wg_size;
+    ret = -1;
+  }
+
+  int num_threads_ss = 56;
+  int max_num_wg = 56;
+  if (dev.has(sycl::aspect::ext_intel_gpu_eu_count_per_subslice) &&
+      dev.has(sycl::aspect::ext_intel_gpu_hw_threads_per_eu)) {
+    auto eu_count =
+        dev.get_info<sycl::info::device::ext_intel_gpu_eu_count_per_subslice>();
+    auto threads_count =
+        dev.get_info<sycl::ext::intel::info::device::gpu_hw_threads_per_eu>();
+    num_threads_ss = eu_count * threads_count;
+    max_num_wg = eu_count * threads_count;
+  }
+
+  if (used_barrier) {
+    max_num_wg = max_barrier_registers;
+  }
+
+  // Calculate num_wg_slm
+  int num_wg_slm = 0;
+  if (slm_size == 0) {
+    num_wg_slm = max_num_wg;
+  } else {
+    num_wg_slm = std::floor((float)slm_size_per_xe_core / slm_size);
+  }
+
+  // Calculate num_wg_threads
+  if (used_large_grf)
+    num_threads_ss = num_threads_ss / 2;
+  int num_threads = std::ceil((float)wg_size / sg_size);
+  int num_wg_threads = std::floor((float)num_threads_ss / num_threads);
+
+  // Calculate num_wg
+  *num_wg = (std::min)(num_wg_slm, num_wg_threads);
+  *num_wg = (std::min)(*num_wg, max_num_wg);
+  return ret;
+}
+
+/// This function is used for occupancy calculation, it computes the work-group
+/// number and the work-group size which achieves the maximum occupancy of the
+/// device potentially. Ref to
+/// https://github.com/oneapi-src/oneAPI-samples/tree/master/Tools/GPU-Occupancy-Calculator
+/// \param [out] num_wg Work-group number.
+/// \param [out] wg_size Work-group size.
+/// \param [in] max_ws_size_for_device_code The maximum working work-group size
+/// for current device code logic. Zero means no limitation.
+/// \param [in] slm_size Share local memory size.
+/// \param [in] sg_size Sub-group size.
+/// \param [in] used_barrier Whether barrier is used.
+/// \param [in] used_large_grf Whether large General Register File is used.
+/// \return Returns 0.
+inline int calculate_max_potential_wg(int *num_wg, int *wg_size,
+                                      int max_ws_size_for_device_code,
+                                      int slm_size = 0, int sg_size = 32,
+                                      bool used_barrier = false,
+                                      bool used_large_grf = false) {
+  sycl::device &dev = dpct::get_current_device();
+  size_t max_wg_size = dev.get_info<sycl::info::device::max_work_group_size>();
+  if (max_ws_size_for_device_code == 0 ||
+      max_ws_size_for_device_code >= max_wg_size)
+    *wg_size = (int)max_wg_size;
+  else
+    *wg_size = max_ws_size_for_device_code;
+  calculate_max_active_wg_per_xecore(num_wg, *wg_size, slm_size, sg_size,
+                                     used_barrier, used_large_grf);
+  std::uint32_t num_ss = 1;
+  if (dev.has(sycl::aspect::ext_intel_gpu_slices) &&
+      dev.has(sycl::aspect::ext_intel_gpu_subslices_per_slice)) {
+    num_ss =
+        dev.get_info<sycl::ext::intel::info::device::gpu_slices>() *
+        dev.get_info<sycl::ext::intel::info::device::gpu_subslices_per_slice>();
+  }
+  num_wg[0] = num_ss * num_wg[0];
+  return 0;
+}
+
+/// Supported group type during migration.
+enum class group_type { work_group, sub_group, logical_group, root_group };
+
+/// The group_base will dispatch the function call to the specific interface
+/// based on the group type.
+template <int dimensions = 3> class group_base {
+public:
+  group_base(sycl::nd_item<dimensions> item)
+      : nd_item(item), logical_group(item) {}
+  ~group_base() {}
+  /// Returns the number of work-items in the group.
+  size_t get_local_linear_range() {
+    switch (type) {
+    case group_type::work_group:
+      return nd_item.get_group().get_local_linear_range();
+    case group_type::sub_group:
+      return nd_item.get_sub_group().get_local_linear_range();
+    case group_type::logical_group:
+      return logical_group.get_local_linear_range();
+    default:
+      return -1; // Unkonwn group type
+    }
+  }
+  /// Returns the index of the work-item within the group.
+  size_t get_local_linear_id() {
+    switch (type) {
+    case group_type::work_group:
+      return nd_item.get_group().get_local_linear_id();
+    case group_type::sub_group:
+      return nd_item.get_sub_group().get_local_linear_id();
+    case group_type::logical_group:
+      return logical_group.get_local_linear_id();
+    default:
+      return -1; // Unkonwn group type
+    }
+  }
+  /// Wait for all the elements within the group to complete their execution
+  /// before proceeding.
+  void barrier() {
+    switch (type) {
+    case group_type::work_group:
+      sycl::group_barrier(nd_item.get_group());
+      break;
+    case group_type::sub_group:
+    case group_type::logical_group:
+      sycl::group_barrier(nd_item.get_sub_group());
+      break;
+    default:
+      break;
+    }
+  }
+
+protected:
+  logical_group<dimensions> logical_group;
+  sycl::nd_item<dimensions> nd_item;
+  group_type type;
+};
+
+/// The group class is a container type that can storage supported group_type.
+template <typename T, int dimensions = 3>
+class group : public group_base<dimensions> {
+  using group_base<dimensions>::type;
+  using group_base<dimensions>::logical_group;
+
+public:
+  group(T g, sycl::nd_item<dimensions> item) : group_base<dimensions>(item) {
+    if constexpr (std::is_same_v<T, sycl::sub_group>) {
+      type = group_type::sub_group;
+    } else if constexpr (std::is_same_v<T, sycl::group<dimensions>>) {
+      type = group_type::work_group;
+    } else if constexpr (std::is_same_v<T, dpct::experimental::logical_group<
+                                               dimensions>>) {
+      logical_group = g;
+      type = group_type::logical_group;
+    }
+  }
+};
+} // namespace experimental
+
+/// If x <= 2, then return a pointer to the deafult queue;
+/// otherwise, return x reinterpreted as a dpct::queue_ptr.
+inline queue_ptr int_as_queue_ptr(uintptr_t x) {
+  return x <= 2 ?
+  &get_default_queue()
+  : reinterpret_cast<queue_ptr>(x);
+}
+
+template <int n_nondefault_params, int n_default_params, typename T>
+class args_selector;
+
+/// args_selector is a helper class for extracting arguments from an
+/// array of pointers to arguments or buffer of arguments to pass to a
+/// kernel function.
+///
+/// \param R(Ts...) The type of the kernel
+/// \param n_nondefault_params The number of nondefault parameters of the kernel
+/// (excluding parameters that like sycl::nd_item, etc.)
+/// \param n_default_params The number of default parameters of the kernel
+///
+/// Example usage:
+/// With the following kernel:
+///   void foo(sycl::float2 *x, int n, sycl::nd_item<3> item_ct1, float f=.1) {}
+/// and with the declaration:
+///   args_selector<2, 1, decltype(foo)> selector(kernelParams, extra);
+/// we have:
+///   selector.get<0>() returns a reference to sycl::float*,
+///   selector.get<1>() returns a reference to int,
+///   selector.get<2>() returns a reference to float
+template <int n_nondefault_params, int n_default_params,
+   typename R, typename... Ts>
+class args_selector<n_nondefault_params, n_default_params, R(Ts...)> {
+private:
+  void **kernel_params;
+  char *args_buffer;
+
+  template <int i>
+  static constexpr int account_for_default_params() {
+    constexpr int n_total_params = sizeof...(Ts);
+    if constexpr (i >= n_nondefault_params) {
+      return n_total_params - n_default_params + (i - n_nondefault_params);
+    } else {
+      return i;
+    }
+  }    
+
+public:
+  /// Get the type of the ith argument of R(Ts...)
+  /// \param [in] i Index of parameter to get
+  /// \returns Type of ith parameter
+  template <int i>
+  using arg_type = std::tuple_element_t<account_for_default_params<i>(),
+					  std::tuple<Ts...>>;
+  static constexpr int params_num = sizeof...(Ts);
+
+private:
+  template <int i>
+  static constexpr int get_offset() {
+    if constexpr (i == 0) {
+      // we can assume args_buffer is properly aligned to the
+      // first argument
+      return 0;
+    } else {
+      constexpr int prev_off = get_offset<i-1>();
+      constexpr int prev_past_end = prev_off + sizeof(arg_type<i-1>);
+      using T = arg_type<i>;
+      // is the past-the-end of the i-1st element properly aligned
+      // with the ith element's alignment?
+      if constexpr (prev_past_end % alignof(T) == 0) {
+	return prev_past_end;
+      }
+      // otherwise bump prev_past_end to match alignment
+      else {
+	return prev_past_end + (alignof(T) - (prev_past_end % alignof(T)));
+      }
+    }
+  }
+
+  static char *get_args_buffer(void **extra) {
+    if (!extra)
+      return nullptr;
+    for (; (std::size_t) *extra != 0; ++extra) {
+      if ((std::size_t) *extra == 1) {
+	return static_cast<char*>(*(extra+1));
+      }
+    }
+    return nullptr;
+  }
+    
+public:
+  /// If kernel_params is nonnull, then args_selector will
+  /// extract arguments from kernel_params. Otherwise, it
+  /// will extract them from extra.
+  /// \param [in] kernel_params Array of pointers to arguments
+  /// a or null pointer.
+  /// \param [in] extra Array containing pointer to argument buffer.
+  args_selector(void **kernel_params, void **extra)
+    : kernel_params(kernel_params),
+      args_buffer(get_args_buffer(extra))
+  {}
+
+  /// Get a reference to the ith argument extracted from kernel_params
+  /// or extra.
+  /// \param [in] i Index of argument to get
+  /// \returns Reference to the ith argument
+  template <int i>    
+  arg_type<i> &get() {
+    if (kernel_params) {
+      return *static_cast<arg_type<i>*>(kernel_params[i]);
+    } else {
+      return *reinterpret_cast<arg_type<i>*>(args_buffer + get_offset<i>());
+    }
+  }
+};
+
+/// \brief This struct template used to get the type of the N-th argument of a
+/// callable type `Func`. It supports both function types (e.g., `void(int,
+/// double)`) and callable objects such as lambdas or functors.
+///
+/// \tparam Func The callable type from which to extract the argument type.
+/// \tparam N The index of the argument to retrieve.
+///
+/// Example:
+/// using Func = void(int, double, const char*);
+/// static_assert(std::is_same<nth_argument_type<Func, 0>::type, int>::value,
+/// "Unexpected type");
+template <typename Func, std::size_t N> struct nth_argument_type {
+  template <typename R, typename... Args>
+  static auto
+      helper(R(Args...)) -> std::tuple_element_t<N, std::tuple<Args...>>;
+  using type = decltype(helper(std::declval<Func>()));
+};
+
+/// \brief The function performs bitwise logical operations on three input
+/// values of \p a, \p b and \p c based on the specified 8-bit truth table \p
+/// lut and return the result
+///
+/// \param [in] a Input value
+/// \param [in] b Input value
+/// \param [in] c Input value
+/// \param [in] lut truth table for looking up
+/// \returns The result
+inline uint32_t ternary_logic_op(uint32_t a, uint32_t b, uint32_t c,
+                                 uint8_t lut) {
+  uint32_t result = 0;
+
+  switch (lut) {
+  case 0x0:
+    result = 0;
+    break;
+  case 0x1:
+    result = ~a & ~b & ~c;
+    break;
+  case 0x2:
+    result = ~a & ~b & c;
+  case 0x4:
+    result = ~a & b & ~c;
+    break;
+  case 0x8:
+    result = ~a & b & c;
+    break;
+  case 0x10:
+    result = a & ~b & ~c;
+    break;
+  case 0x20:
+    result = a & ~b & c;
+    break;
+  case 0x40:
+    result = a & b & ~c;
+    break;
+  case 0x80:
+    result = a & b & c;
+    break;
+  case 0x1a:
+    result = (a & b | c) ^ a;
+    break;
+  case 0x1e:
+    result = a ^ (b | c);
+    break;
+  case 0x2d:
+    result = ~a ^ (~b & c);
+    break;
+  case 0x78:
+    result = a ^ (b & c);
+    break;
+  case 0x96:
+    result = a ^ b ^ c;
+    break;
+  case 0xb4:
+    result = a ^ (b & ~c);
+    break;
+  case 0xb8:
+    result = a ^ (b & (c ^ a));
+    break;
+  case 0xd2:
+    result = a ^ (~b & c);
+    break;
+  case 0xe8:
+    result = a & (b | c) | (b & c);
+    break;
+  case 0xea:
+    result = a & b | c;
+    break;
+  case 0xfe:
+    result = a | b | c;
+    break;
+  case 0xff:
+    result = -1;
+    break;
+  default: {
+    if (lut & 0x01)
+      result |= ~a & ~b & ~c;
+    if (lut & 0x02)
+      result |= ~a & ~b & c;
+    if (lut & 0x04)
+      result |= ~a & b & ~c;
+    if (lut & 0x08)
+      result |= ~a & b & c;
+    if (lut & 0x10)
+      result |= a & ~b & ~c;
+    if (lut & 0x20)
+      result |= a & ~b & c;
+    if (lut & 0x40)
+      result |= a & b & ~c;
+    if (lut & 0x80)
+      result |= a & b & c;
+    break;
+  }
+  }
+
+  return result;
+}
+
+#ifdef _WIN32
+#define DPCT_EXPORT __declspec(dllexport)
+#else
+#define DPCT_EXPORT
+#endif
+
+} // namespace dpct
+
+#endif // __DPCT_UTIL_HPP__
diff --git a/sycl/include/dpct/ze_utils.hpp b/sycl/include/dpct/ze_utils.hpp
new file mode 100644
index 00000000000..631246e40f6
--- /dev/null
+++ b/sycl/include/dpct/ze_utils.hpp
@@ -0,0 +1,85 @@
+//==---- ze_utils.hpp ---------------------------------*- C++
+//-*----------------==//
+//
+// Copyright (C) Intel Corporation
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+// See https://llvm.org/LICENSE.txt for license information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef __DPCT_ZE_UTILS_HPP__
+#define __DPCT_ZE_UTILS_HPP__
+
+#ifdef ONEAPI_BACKEND_LEVEL_ZERO_EXT
+#if defined(__linux__)
+#include <level_zero/ze_api.h>
+#include <sycl/ext/oneapi/backend/level_zero.hpp>
+#include <sycl/sycl.hpp>
+namespace dpct {
+namespace experimental {
+
+struct ipc_mem_handle_ext_t {
+  pid_t pid;
+  ze_ipc_mem_handle_t handle;
+};
+
+namespace detail {
+
+#ifndef _SYS_pidfd_open
+#define _SYS_pidfd_open 434 // syscall number for pidfd_open
+#endif
+
+#ifndef _SYS_pidfd_getfd
+#define _SYS_pidfd_getfd 438 // syscall number for pidfd_getfd
+#endif
+
+inline int get_fd_of_peer_process(ipc_mem_handle_ext_t ext_handle) {
+  int pidfd = syscall(_SYS_pidfd_open, ext_handle.pid,
+                      0); // obtain a file descriptor that refers to a
+                          // process(requires kernel 5.6+).
+  if (pidfd < 0)
+    return -1;
+  return syscall(_SYS_pidfd_getfd, pidfd, *(int *)ext_handle.handle.data,
+                 0); // obtain a duplicate of another process's file
+                     // descriptor(requires kernel 5.6+).
+}
+
+} // namespace detail
+
+/// Creates an IPC memory handle for the specified allocation.
+/// \param [in] ptr Pointer to the device memory allocation
+/// \param [out] ext_handle_ptr IPC memory handle extension
+inline ze_result_t get_mem_ipc_handle(const void *ptr,
+                                      ipc_mem_handle_ext_t *ext_handle_ptr) {
+  ext_handle_ptr->pid = getpid();
+  return zeMemGetIpcHandle(
+      sycl::get_native<sycl::backend::ext_oneapi_level_zero>(
+          dpct::get_current_device().get_context()),
+      ptr, &ext_handle_ptr->handle);
+}
+
+/// Opens an IPC memory handle to retrieve a device pointer.
+/// \param [in] ext_handle IPC memory handle extension
+/// \param [out] pptr Pointer to device allocation in this process
+inline ze_result_t open_mem_ipc_handle(ipc_mem_handle_ext_t ext_handle,
+                                       void **pptr) {
+  int fd = detail::get_fd_of_peer_process(ext_handle);
+  if (fd < 0)
+    throw std::runtime_error("Cannot get file descriptor of peer process.");
+  *((int *)ext_handle.handle.data) = fd;
+
+  return zeMemOpenIpcHandle(
+      sycl::get_native<sycl::backend::ext_oneapi_level_zero>(
+          dpct::get_current_device().get_context()),
+      sycl::get_native<sycl::backend::ext_oneapi_level_zero>(
+          (sycl::device)dpct::get_current_device()),
+      ext_handle.handle, 0u, pptr);
+}
+
+} // namespace experimental
+} // namespace dpct
+
+#endif // __linux__
+#endif // ONEAPI_BACKEND_LEVEL_ZERO_EXT
+
+#endif // ! __DPCT_ZE_UTILS_HPP__
diff --git a/sycl/include/strata/core/graph.hpp b/sycl/include/strata/core/graph.hpp
new file mode 100644
index 00000000000..4eb7f3b308f
--- /dev/null
+++ b/sycl/include/strata/core/graph.hpp
@@ -0,0 +1,118 @@
+// include/strata/core/graph.hpp - P2.S5: the GraphRegistry.
+//
+// `GraphRegistry`: capture/replay wrappers keyed by `(layer_type, n_tokens)`, with static input/output
+// buffers at fixed addresses.
+//
+// THREE THINGS ARE BAKED INTO THIS INTERFACE, and each one is a measurement rather than a preference.  All
+// three come from `bench/micro/graph_capture.cu`, which was written to answer the phase's own instruction -
+// "verify on the installed CUDA version with a minimal test before building on it".
+//
+// 1. **THE WAIT MUST POLL THE DRIVER, NOT MEMORY.**  The phase's host loop says "spin on
+//    doorbell_seq == expected ... no cudaStreamSynchronize anywhere".  A spin that only reads memory NEVER
+//    RUNS THE KERNEL: 5,907,703 spins over 500 ms, and the datum flips to 1 the instant anything calls into
+//    the driver and never before.  On Windows the display driver model BATCHES command submission, and a
+//    thread that only reads memory gives it no reason to flush.  Hence `wait_ms`, which polls an event -
+//    a QUERY and not a blocking sync, so P2.X3's "zero synchronization calls in the layer loop" still holds,
+//    and it costs 0.021 ms.
+//
+// 2. **A GRAPH RE-READS ITS INPUT BUFFERS AT REPLAY, BUT NOT ITS KERNEL ARGUMENTS.**  Verified: eight
+//    replays with a different pinned input each time all tracked correctly, so the data path is live; but a
+//    kernel argument is copied into the node at capture and is never re-read.  **Anything that changes per
+//    step - a position, a page-table base, a token id - must be DATA in a device buffer, never an argument.**
+//    This is the phase's "graph capture with pointers that change between steps silently replays stale
+//    addresses" hazard, and it now has a measurement behind it.
+//
+// 3. **FIXED ADDRESSES ARE THE CALLER'S OBLIGATION.**  The registry cannot check them.  Every buffer a
+//    captured body touches must be allocated before `record` and never reallocated; the registry holds the
+//    graph, not the memory.
+//
+// What the registry is FOR: a layer's ops are the same every token, so recording them once and replaying
+// removes the per-call host cost of submitting them individually.  Measured, that cost is 10-22 us PER CALL
+// into the driver on this machine, and a layer with 8 submissions is ~0.1 ms of round trip.
+#pragma once
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+#include <cstring>
+#include <functional>
+#include <map>
+#include <string>
+#include <vector>
+
+namespace strata::core {
+
+/// The two attention families.  `docs/semantics.md`: 36 GDN layers and 12 QSA, at indices 3, 7, ... 47.
+enum class LayerType : int { GDN = 0, QSA = 1 };
+inline const char* to_string(LayerType t) { return t == LayerType::GDN ? "GDN" : "QSA"; }
+
+/// One recorded graph.  Move-only: it owns a `cudaGraphExec_t` and an event, and two owners would
+/// double-destroy.
+class CapturedGraph {
+public:
+    CapturedGraph() = default;
+    ~CapturedGraph() { reset(); }
+    CapturedGraph(const CapturedGraph&) = delete;
+    CapturedGraph& operator=(const CapturedGraph&) = delete;
+    CapturedGraph(CapturedGraph&& o) noexcept { *this = std::move(o); }
+    CapturedGraph& operator=(CapturedGraph&& o) noexcept;
+
+    /// Start recording everything the caller launches into `stream`.
+    bool begin(void* stream, std::string& err);
+
+    /// Stop recording, instantiate, and record the completion event.  A capture that produced ZERO nodes is
+    /// reported as an error: it means the body did nothing, which is a wiring mistake and NOT an empty graph
+    /// to be replayed happily forever.
+    bool end(void* stream, std::string& err);
+
+    /// Replay.  Does not synchronise.
+    bool launch(void* stream, std::string& err) const;
+
+    /// The host loop's wait: poll `done_` until it completes or `timeout_ms` elapses.  Returns false on
+    /// timeout, which the caller must treat as a hang and not as "probably fine".  See NOTE 1 above for why
+    /// this exists instead of a memory spin.
+    bool wait_ms(int timeout_ms) const;
+
+    size_t nodes() const { return nodes_; }
+    bool valid() const { return exec_ != nullptr; }
+
+private:
+    void reset();
+    dpct::experimental::command_graph_ptr graph_ = nullptr;
+    dpct::experimental::command_graph_exec_ptr exec_ = nullptr;
+    dpct::event_ptr done_ = nullptr;
+    mutable std::chrono::time_point<std::chrono::steady_clock> done__ct1;
+    size_t nodes_ = 0;
+};
+
+/// Capture-once, replay-many, keyed by `(layer_type, n_tokens)`.
+///
+/// `record` is given a CALLABLE that launches the layer's ops.  On the first call for a key it captures;
+/// afterwards it returns the cached graph and does NOT run the callable - so a caller that mutates state
+/// inside the body will be surprised, which is why the body must only launch.
+class GraphRegistry {
+public:
+    explicit GraphRegistry(void* stream) : stream_(stream) {}
+
+    /// Capture `body` for `key` if it is not already recorded.  Returns false and fills `err` on failure.
+    /// Recording the same key twice is a no-op and is NOT an error - that is the point of a registry, and a
+    /// regression test asserts that the body runs exactly once across many calls.
+    bool record(LayerType type, int n_tokens, const std::function<void()>& body, std::string& err);
+
+    const CapturedGraph* find(LayerType type, int n_tokens) const;
+
+    /// Launch and wait, in that order, the two things the host loop does per layer.
+    bool launch(LayerType type, int n_tokens, int timeout_ms, std::string& err) const;
+
+    size_t size() const { return graphs_.size(); }
+    /// How many times a BODY was actually captured.  With a working cache this equals `size()`.
+    size_t captures() const { return captures_; }
+
+private:
+    using Key = std::pair<int, int>;
+    void* stream_ = nullptr;
+    std::map<Key, CapturedGraph> graphs_;
+    size_t captures_ = 0;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/mtp.hpp b/sycl/include/strata/core/mtp.hpp
new file mode 100644
index 00000000000..6469dbb524d
--- /dev/null
+++ b/sycl/include/strata/core/mtp.hpp
@@ -0,0 +1,149 @@
+// include/strata/core/mtp.hpp - plan v0.3 P6: the MTP draft layer on the GPU.
+//
+// The model ships one multi-token-prediction layer (vLLM 0.30.0 `qwen4_exp` MTP; transcribed and validated in
+// `tools/mtp_probe.py`, where it accepts 0.89 / 0.86 / 0.85 of greedy drafts at steps 1-3).  Cell i of its
+// sequence pairs the main model's final multi-stream residual at position i with the token at position i+1, at
+// rope position i (vLLM's convention); its output predicts the token at position i+2, and its own residual feeds
+// the next draft step.
+//
+//   e = fc_embedding(rms(embed(tok)) * (1+w))           h = fc_hidden per stream(rms_10240(R) * (1+w))
+//   R = h + e  ->  attention hyper-connection  ->  QSA attention (own K/V)  ->  MLP hyper-connection  ->
+//   MoE (512 experts, top-10, shared expert)  ->  R += y * 2 sigmoid(inject / hc)  ->  final mixer  ->  head
+//
+// Runtime choices, each a trade of exactness for simplicity that only affects DRAFT quality, never the output
+// (the verify window decides every emitted token):
+//   * the large projections run as Q8_0 through the multi-column MMVQ (`tools/mtp_rt.py` quantizes them);
+//   * the attention is DENSE over every cell the layer has seen - identical to the model's sparse selection
+//     below 2,051 cells - so speculative cells (draft steps, rejected window rows) never touch indexer state and
+//     are simply overwritten when their positions are processed again;
+//   * all 512 routed experts live in VRAM (708 MB) and run through the grouped hit kernels.
+#pragma once
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/layer.hpp"
+#include "strata/core/session.hpp"
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+namespace strata::core {
+
+class NativeHead;
+
+class MtpDrafter {
+public:
+    MtpDrafter() = default;
+    ~MtpDrafter();
+    MtpDrafter(const MtpDrafter&) = delete;
+    MtpDrafter& operator=(const MtpDrafter&) = delete;
+
+    /// Loads `rt_dir` (from tools/mtp_rt.py) and allocates the layer's K/V and buffers for up to `max_t` rows.
+    /// Call before the VRAM expert tier is sized: this takes ~0.9 GB.
+    bool load(const std::string& rt_dir, const ModelGeometry& g, SessionState& ss, int max_t, std::string& err,
+              int64_t window = 32768);
+    /// The prompt's length: prefill() skips the cells the attention window can never reach again.
+    void set_prompt_len(int64_t n) { prompt_len_ = n; }
+    /// At most this many drafts per round (below max_t - 1): a window longer than the MTP's comes from elsewhere.
+    void set_max_drafts(int k) { max_drafts_ = k; }
+    uint64_t vram_bytes() const { return vram_; }
+    /// The draft layer's K/V state (read-only: --serve's STRATA_STATE_HASH check hashes it)
+    const QsaState& kv_state() const { return st_; }
+    /// KV streaming: refill the ring of the drafter's window from its host copy for a sequence that continues at
+    /// `upto` (a conversation-cache resume). No-op unless the drafter's K/V is a ring.
+    void kv_restore(int64_t upto);
+    /// The main model's embedding and head, and the verify window's final residuals (T rows, hc*n_embd each).
+    bool bind(const WeightTable& wt, const NativeHead* head, const float* window_R, std::string& err);
+
+    /// Prompt cells [cell0, cell0 + n): residual rows `R_rows` (device, hc*n_embd each) and `next_tokens` (host,
+    /// the token at position cell+1).  Runs in batches of up to max_t rows.
+    bool prefill(const float* R_rows, const int32_t* next_tokens, int64_t n, int64_t cell0, std::string& err);
+
+    /// One round: catch-up over T cells from `p` (rows = the window's final residuals, `tokens` = the window's
+    /// argmaxes: row t pairs R_{p+t} with the token at p+t+1), then the draft chain from row `a` (the last
+    /// accepted row) for T-1 drafts at cells p+a+1 ...  `drafts` gets T-1 tokens.
+    bool draft(int T, const int32_t* tokens, int64_t p, int a, int32_t* drafts, std::string& err,
+               float* probs = nullptr, float min_p = 0.0f, int* n_drafts = nullptr);
+
+    /// The first round: one cell (`cell`) from `R_row` (device) and `token` -> T-1 drafts.
+    bool draft_first(int T, const float* R_row, int32_t token, int64_t cell, int32_t* drafts, std::string& err,
+                     float* probs = nullptr, float min_p = 0.0f, int* n_drafts = nullptr);
+
+    double ms_draft = 0, ms_prefill = 0;
+    int64_t rounds = 0;
+
+private:
+    bool record_forward(int T, int step_row0, dpct::queue_ptr cs,
+                        std::string &err);
+    bool capture_prefill(int T, std::string& err);
+    bool capture_prefill_dev(int T, std::string& err);   ///< E-4: without the mapped staging (inputs copied on device)
+    bool capture_round(int T, std::string& err);
+    bool capture_step(int j, std::string& err);
+    dpct::experimental::command_graph_exec_ptr step_exec_[9] = {};
+    const float* f32(const char* name) const;
+    const uint16_t* bf16(const char* name) const;
+    const void* q8(const char* name) const;
+
+    const ModelGeometry* g_ = nullptr;
+    SessionState* ss_ = nullptr;
+    const WeightTable* wt_ = nullptr;
+    const NativeHead* head_ = nullptr;
+    const float* window_R_ = nullptr;
+    int max_t_ = 0;
+    int device_ = -1;   ///< the device `load` ran on: the public calls switch to it (layer split)
+    int max_drafts_ = 1 << 30;
+    int64_t n_vocab_ = 0;
+    uint64_t vram_ = 0;
+    dpct::queue_ptr cs_ = &dpct::get_in_order_queue();
+    dpct::experimental::command_graph_exec_ptr prefill_exec_[9] = {};
+    dpct::experimental::command_graph_exec_ptr prefill_dev_exec_[9] = {};
+    int32_t* pf_dev_ = nullptr;   ///< E-4: a prompt's rows' token / step / position records, uploaded at once
+    int64_t pf_cap_ = 0;          ///< its capacity in ints
+    dpct::experimental::command_graph_exec_ptr round_exec_[9] = {};
+
+    struct Tensor { std::string name, kind; int64_t rows = 0, cols = 0; uint64_t off = 0, bytes = 0; };
+    std::vector<Tensor> tensors_;
+    uint8_t* dense_ = nullptr;
+    uint8_t* experts_ = nullptr;
+    void* state_arena_ = nullptr;
+    QsaState st_;
+    void* arena_ = nullptr;
+
+    // mapped staging: tokens, step records (2*max_t rows), positions per head (2*max_t rows), the selected row,
+    // the drafts out
+    int32_t *h_tok_ = nullptr, *m_tok_ = nullptr, *h_step_ = nullptr, *m_step_ = nullptr;
+    int32_t *h_pos_ = nullptr, *m_pos_ = nullptr, *h_row_ = nullptr, *m_row_ = nullptr;
+    int32_t *h_out_ = nullptr, *m_out_ = nullptr;
+    float *h_prob_ = nullptr, *m_prob_ = nullptr;   // each draft's probability under the draft layer
+    // the draft head: the main head's rows for a token subset (rt/draft_vocab.bin), or the whole head
+    uint8_t* dhead_ = nullptr;
+    int32_t* dvocab_ = nullptr;
+    int64_t n_dvocab_ = 0;
+    std::string rt_dir_;
+    int64_t window_ = 0;        // attention over the last window_ cells (0 = every cell)
+    int64_t prompt_len_ = 0;
+    float* probs_ = nullptr;
+    // device
+    int32_t *tok_ = nullptr, *step_ = nullptr, *pos_ = nullptr, *row_ = nullptr, *ident_ = nullptr;
+    float *Rin_ = nullptr, *R_ = nullptr, *emb_ = nullptr, *en_ = nullptr, *e2_ = nullptr, *hn_ = nullptr, *h2_ = nullptr;
+    float *mixed_ = nullptr, *inj_ = nullptr, *inj2_ = nullptr, *lo_ = nullptr, *rs_ = nullptr, *bo_ = nullptr;
+    float* xn_ = nullptr;
+    uint8_t* xq_ = nullptr;
+    float *qfull_ = nullptr, *qcur_ = nullptr, *kcur_ = nullptr, *vcur_ = nullptr, *attn_ = nullptr, *attn32_ = nullptr;
+    float* attn_scratch_ = nullptr;
+    float *logits_ = nullptr, *w_ = nullptr, *shared_ = nullptr, *parts_ = nullptr, *y_ = nullptr, *sample_ = nullptr;
+    int32_t *ids_ = nullptr, *hit_slot_ = nullptr, *hit_dst_ = nullptr, *hit_count_ = nullptr, *out_ids_ = nullptr;
+    uint8_t* hit_xq_ = nullptr;
+    unsigned long long* grp_ptr_ = nullptr;
+    int32_t *grp_start_ = nullptr, *grp_counts_ = nullptr;
+    float* hit_xs_ = nullptr;
+    void* hit_scratch_ = nullptr;
+    float* sh_scratch_ = nullptr;
+    uint16_t* x_bf16_ = nullptr;
+    float* head_logits_ = nullptr;
+    float* dummy_inj_ = nullptr;
+    int64_t cap_ = 0, attn_scratch_floats_ = 0;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/on_device.hpp b/sycl/include/strata/core/on_device.hpp
new file mode 100644
index 00000000000..b6c620bb805
--- /dev/null
+++ b/sycl/include/strata/core/on_device.hpp
@@ -0,0 +1,38 @@
+#pragma once
+// Multi-GPU: make `device` current for a scope and restore the caller's device after it.  An object that owns CUDA
+// streams, graphs and buffers on one device (a verify stage, the drafter) wraps its public calls in this, so the
+// caller's thread may be on any device.  A negative device, or the device already current, does nothing.
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+
+namespace strata::core {
+
+struct OnDevice {
+    int previous = -1;
+    explicit OnDevice(int device) try {
+        int cur = 0;
+        /*
+        DPCT1093:7: The "device" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        if (device >= 0 &&
+            DPCT_CHECK_ERROR(cur = dpct::get_current_device_id()) == 0 &&
+            cur != device && DPCT_CHECK_ERROR(dpct::select_device(device)) == 0)
+            previous = cur;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    /*
+    DPCT1093:8: The "previous" device may be not the one intended for use.
+    Adjust the selected device if needed.
+    */
+    ~OnDevice() { if (previous >= 0) dpct::select_device(previous); }
+    OnDevice(const OnDevice&) = delete;
+    OnDevice& operator=(const OnDevice&) = delete;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/remote_experts.hpp b/sycl/include/strata/core/remote_experts.hpp
new file mode 100644
index 00000000000..097d82d996d
--- /dev/null
+++ b/sycl/include/strata/core/remote_experts.hpp
@@ -0,0 +1,85 @@
+#pragma once
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/expert_cache.hpp"
+#include "strata/core/expert_source.hpp"
+
+#include <cstdint>
+#include <string>
+#include <utility>
+#include <vector>
+
+namespace strata::core {
+
+/// A static, profile-filled expert tier on another CUDA device. CUDA0 keeps all
+/// dense weights and state; results return through the existing pinned CPU rows.
+class RemoteExperts {
+public:
+    RemoteExperts() = default;
+    ~RemoteExperts();
+    RemoteExperts(const RemoteExperts&) = delete;
+    RemoteExperts& operator=(const RemoteExperts&) = delete;
+
+    /// Initialise the device before the host expert arena registers
+    /// tens of GiB of portable mapped memory with CUDA.
+    static bool preflight(int device, double& free_gib, std::string& err);
+    bool open(int device, int slots, int64_t layers, int64_t experts,
+              const std::vector<std::pair<int32_t, int32_t>>& ranked,
+              const ExpertCache& primary, ExpertSource& source,
+              std::vector<uint8_t>& claimed, std::string& err);
+    void close();
+
+    /// `kind` is the primary verifier's classification (-1 = CPU candidate),
+    /// or null on the one-token path. Entries already served on CUDA0 are excluded.
+    bool begin(int64_t layer, const float* x, const int32_t* ids, int64_t n_tok,
+               int64_t k, const int32_t* kind, const int32_t* primary_res,
+               std::string& err);
+    bool owns(int64_t index) const { return owned_[(size_t) index] != 0; }
+    bool finish(float* out, std::string& err);
+    int64_t resident() const { return cache_.resident(); }
+    int64_t computed() const { return computed_; }
+    int64_t launched_layers() const { return launched_layers_; }
+    double gib() const { return cache_.gib(); }
+    uint64_t returned_bytes() const { return returned_bytes_; }
+    uint64_t full_row_bytes() const { return full_row_bytes_; }
+    /// host time spent in begin() (staging + launches) and in finish() (waiting for this GPU), cumulative
+    double ms_begin() const { return ms_begin_; }
+    double ms_wait() const { return ms_wait_; }
+
+private:
+    int device_ = -1;
+    int64_t n_expert_ = 0;
+    int32_t groups_ = 0;
+    int64_t computed_ = 0;
+    int64_t launched_layers_ = 0;
+    uint64_t returned_bytes_ = 0;
+    uint64_t full_row_bytes_ = 0;
+    double ms_begin_ = 0, ms_wait_ = 0;
+    ExpertCache cache_;
+    dpct::queue_ptr stream_ = &dpct::get_in_order_queue();
+    float* h_x_ = nullptr;
+    float* h_out_ = nullptr;
+    void* h_meta_ = nullptr;
+    float* d_x_ = nullptr;
+    float* z_x_ = nullptr;     ///< h_x_ as the helper GPU sees it (zero-copy: no input copy per layer)
+    float* z_out_ = nullptr;   ///< h_out_ as the helper GPU sees it (zero-copy: no result copy)
+    bool zero_copy_ = false;
+    float* d_out_ = nullptr;
+    uint8_t* d_q8_ = nullptr;
+    float* d_scales_ = nullptr;
+    void* d_scratch_ = nullptr;
+    void* d_meta_ = nullptr;  ///< one contiguous upload of grouped indices, instead of five small copies
+    int32_t* d_start_ = nullptr;
+    int32_t* d_dst_ = nullptr;
+    int32_t* d_tok_ = nullptr;
+    int32_t* d_count_ = nullptr;
+    unsigned long long* d_ptr_ = nullptr;
+    std::vector<uint8_t> owned_;
+    std::vector<uint8_t> layers_present_;
+    std::vector<int32_t> group_of_, group_id_;
+    std::vector<int32_t> start_, dst_, tok_, original_row_;
+    std::vector<unsigned long long> ptr_;
+};
+
+} // namespace strata::core
diff --git a/sycl/include/strata/core/session.hpp b/sycl/include/strata/core/session.hpp
new file mode 100644
index 00000000000..633a62d5c96
--- /dev/null
+++ b/sycl/include/strata/core/session.hpp
@@ -0,0 +1,417 @@
+// include/strata/core/session.hpp - ONE TOKEN through all 48 layers, and the doorbell protocol between them.
+//
+// P2.S5's host loop, and the first place the engine runs a whole forward pass rather than one block.  What it
+// owns is the ORDER across layers and the state that outlives a layer:
+//
+//   * the gated residual stack `R` - (hc, n_embd), which every block reads and writes;
+//   * 12 QSA states (KV cache + indexer) and 36 GDN states (recurrence + conv history), because `is_qsa_layer`
+//     splits the 48 layers 12/36 and the two kinds of state have nothing in common;
+//   * the per-token expert handoff, which is where the CPU pool meets the GPU.
+//
+// WHY THE LAYER GRAPHS ARE CAPTURED AND THE LOOP IS NOT.  A graph bakes in its arguments, so the graph unit is
+// ONE LAYER: everything per-token (the position, the step counts) arrives through fixed-address device buffers
+// (rounds 211-214), and the HOST decides when each layer runs.  That decision is the whole point - it is what
+// lets the CPU expert pool start while the GPU is still working on the next layer.
+#pragma once
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/hit_hook.hpp"
+#include "strata/core/layer.hpp"
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+namespace strata::core {
+
+/// Everything a sequence needs that is NOT a weight: the per-layer state, the block scratch, and the pinned
+/// handoff between the GPU and the CPU expert pool.
+struct SessionState {
+    int64_t max_cells = 0;
+
+    GdnBuffers gdn;                 ///< the 36 GDN layers share one set of scratch; their STATE is per layer
+    float* gdn_state = nullptr;     ///< (n_gdn_layers, gdn_state_floats)
+
+    QsaState* qsa_states = nullptr;      ///< one per QSA layer
+    void* qsa_state_arena = nullptr;
+    QsaBuffers qsa_bufs;                 ///< scratch, shared across the 12 (they never run concurrently)
+    void* qsa_buf_arena = nullptr;
+
+    MoEBuffers moe;
+    void* moe_arena = nullptr;
+    BlockBuffers block;
+    void* block_arena = nullptr;
+
+    float* R = nullptr;             ///< alias of `block.R`, named for what it means at this level
+    int64_t k = 10;                 ///< experts per token
+    /// The doorbell the host loop polls.  Null until a caller provides one - the engine runs without it, and
+    /// neither `session_token` nor `session_replay` looks at it.
+    const Doorbell* db = nullptr;
+
+    // ================================ THE PLE, AND IT IS SEQUENCE STATE ================================
+    //
+    // **THE PLE IS A LAYER-1 MODULE AND THIS ENGINE DID NOT RUN IT, WHICH IS WHY C1 FAILED** (LEDGER L123).
+    // Every part of it was already built and parity-tested - the hash against `ref/ngram.py` with the
+    // artifact's own constants, the IQ4_NL row read against numpy over the original GGUF, and the block
+    // against ggml's own graph - and none of it was ever called from the model path.  These fields are what
+    // was missing on the state side.
+    //
+    // `ple_prev` is the last two tokens OLDEST FIRST with `-1` where there is none, which is exactly
+    // `ngram_rows`' `prev` argument; `ple_token` is the token being decoded.  **They are advanced by the
+    // DRIVER, once per token**, because the hash is a function of the sequence and not of a layer.
+    int32_t ple_prev[2] = {-1, -1};
+    int32_t ple_token = -1;
+    /// `NG_HIST` rows of `hc_dim` NORMALIZED history, **ROW-FASTEST**: `ple_hist[row + NG_HIST*channel]`.
+    /// That is `ggml_reshape_3d(state, d_conv-1, conv_channels, n_seqs)`, not a layout choice - the transposed
+    /// reading fails ggml's own assert (`ple_layer_xcheck.cpp` L79-83).
+    float* ple_hist = nullptr;
+    /// **THE WHOLE PLE RUN LIVES HERE, AND THAT IS NOT A CONVENIENCE.**  Its history and its token window are
+    /// sequence state, so the session is where they belong - and putting the rest of it here too means
+    /// `session_capture`/`session_loop`/`session_token` need no new parameter to reach it.  A `PleRun` whose
+    /// `ready()` is false is skipped, which is what every caller had before LEDGER L123.
+    PleRun ple;
+};
+
+/// Bytes for a whole session at `max_cells` of context.  Every layer's state is sized at once, because P2.T10
+/// requires ZERO token-path allocations - a `cudaMalloc` that happened on the first token of a longer sequence
+/// would satisfy every test here and fail that one.
+uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k);
+/// Carves `base` (DEVICE memory) into `s`.  Returns the bytes used.
+uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s);
+/// Zeroes every layer's state - the residual to `R_init`, everything else to zero, so a fresh sequence starts
+/// from the reference's own `zeros()`.
+void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init, void* stream);
+
+/// One token: layers 0..47 in order, each a `block_layer`, and the residual is updated in place.
+///
+/// `parts` is (k, n_embd) DEVICE memory, filled by the caller - by the CPU expert pool and the VRAM-resident
+/// experts.  In this phase `moe_layer` consumes it directly; the doorbell protocol's job is to let it be
+/// produced DURING the layer rather than before it, which is a change to *when* the host runs, not to what this
+/// function computes.
+///
+/// `sync_every_layer` inserts a device synchronisation and an error check after EVERY layer.  That is the
+/// `--sync-every-layer` debug mode, and it is deliberately a parameter rather than a compile-time choice: the
+/// errors it catches (a kernel reading a buffer that a later layer writes) are invisible otherwise, and the
+/// synchronisation it costs is exactly what P2.X3 forbids in the fast path.
+bool session_token(const WeightTable& tables, const ModelGeometry& g, int64_t pos, int32_t pos_base,
+                   SessionState& s, const float* parts, void* stream, bool sync_every_layer,
+                   std::string& err);
+
+// ================================ the captured form ================================
+
+/// ONE GRAPH PER LAYER, because a graph bakes in its POINTERS and every layer has different weights AND
+/// different state.  That is not a limitation to work around - it is what makes the per-layer graph the right
+/// unit: the host decides when each layer runs, which is what lets the CPU expert pool start while the GPU is
+/// still working on the next one.
+///
+/// WHY THIS IS WORTH DOING, MEASURED: **the engine is launch-bound, not bandwidth-bound.**  Every kernel in
+/// `gdn_layer` measured ~0.028 ms - including `gdn_gate`, which processes FORTY-EIGHT elements, and a kernel
+/// cannot execute for 28 us.  That is what a null-stream launch costs on this driver, and `gdn_layer` makes ~19
+/// of them while a block makes ~45.  Replaying the 43-node block graph measured **1.585 ms against 2.393 ms**
+/// for the same work as direct launches - a 1.51x that is pure launch overhead.
+struct SessionGraphs {
+    dpct::experimental::command_graph_exec_ptr *execs =
+        nullptr; ///< one per layer, in layer order
+    int64_t n = 0;
+    /// **THE SECOND GRAPH PER LAYER: `moe_finish` + `gr_write`, launched AFTER the host has run the pool.**
+    ///
+    /// Without it the loop has to hand layer `l`'s expert vectors to layer `l+1`, which multiplies them by
+    /// layer `l+1`'s router weights - see `layer.hpp`'s note on `moe_route`.  With it, `post[l]` is launched
+    /// after the pool returns, so layer `l`'s experts are combined with layer `l`'s weights.
+    ///
+    /// The cost is the overlap, and it is worth stating: the window is now whatever GPU work follows the ring
+    /// inside `pre[l]` - the shared expert, and nothing else, because everything after the combine depends on
+    /// `parts`.  **A per-layer CPU pool cannot be hidden behind a strictly serial residual chain**, which is
+    /// why the CPU term is answered by Phase 3's VRAM cache and not by this pipeline.
+    dpct::experimental::command_graph_exec_ptr *posts = nullptr;
+    bool captured = false;
+    /// THE DEVICE ADDRESS THE GRAPHS WERE CAPTURED WITH.  The host loop copies each layer's expert outputs
+    /// here before launching the next layer, and a graph bakes the POINTER, so it has to be this one.
+    float* parts_dev = nullptr;
+
+    /// **DIAGNOSTIC, AND IT IS THE ONE THAT SAYS WHETHER THE DOORBELL IS DECORATIVE.**
+    ///
+    /// Counts the layers where the ring was observed while the graph was STILL RUNNING - i.e. the layers where
+    /// the pool actually had a window to work in.  A nonzero `h_seq` read at the same moment
+    /// `cudaEventQuery` returns `cudaSuccess` means the layer was already over, and the pool then runs with the
+    /// GPU IDLE, which makes the whole pipeline equivalent to a serialised one.
+    ///
+    /// That distinction is invisible in the loop's RETURN VALUE - both paths produce a correct token - and it
+    /// is invisible in a per-layer timing, because the layer still takes the same time either way.  It shows up
+    /// only as "the overlap hides nothing", which is why it is counted here.
+    int64_t rings_mid_graph = 0;
+
+    /// **THE WINDOW, MEASURED RATHER THAN ASSUMED.**  Milliseconds from `cudaGraphLaunch` to the moment the
+    /// ring was observed, summed over the loop.  The pool's window is `layer period - this`, and that is the
+    /// entire budget the overlap has: if the CPU's per-layer work exceeds it, the GPU goes idle for the
+    /// difference on every layer and a "pipelined" loop measures the same as a serialised one.
+    ///
+    /// It is NOT the same as the doorbell's position inside the graph.  It includes the launch itself, the
+    /// driver's submission, and however long the host took to notice - all of which are real and none of which
+    /// the pool gets to use.
+    double ms_to_ring = 0;
+
+    // ================================ R0.9: THE LAYER AS THREE GRAPHS ================================
+    //
+    // **THE CAPTURED PER-STAGE TABLE THE PROTOCOL HAS DEMANDED SINCE R0 AND NOBODY HAS HAD.**  Round 309's
+    // came from `--no-capture`, and round 312 showed its `moe_finish` figure was a host-gap artefact four
+    // times the captured cost of the same work - so the plan has been choosing between R3.3, R3.4 and R3.5
+    // without knowing what any of them is worth.
+    //
+    // An event recorded BETWEEN two `cudaGraphLaunch` calls is not inside a capture and is therefore valid,
+    // so the layer is captured at its own documented seam (`block_layer_pre`'s `half`) and timed from outside.
+    /// **R0.11: FIVE PREFIX GRAPHS, ADDED BESIDE `preA`/`preB` RATHER THAN REPLACING THEM.**
+    /// `preP[k]` (k = 1..5) runs stages `0..k-1`. Consecutive differences are the per-stage times, which is
+    /// what prices the two `gr_read`s and the `gr_write` (R3.3) against GDN's interior (R3.4). A prefix and not
+    /// a range, because the stages are a chain: stage 1 reads what stage 0 wrote and stage 2 mutates the
+    /// residual in place.
+    ///
+    /// **THE FIFTH PREFIX USED TO BE `execs[l]`, AND THAT WAS THE BUG ROUND 324 COULD NOT FIND.**  Prefix 5
+    /// has ~7 more nodes than prefix 4, so the two differ in launch setup as well as in execution - and the
+    /// difference attributed ALL of it to stage 4, the router. Capturing prefix 5 the same way as the others
+    /// makes the two comparable and the difference purely stage 4's.
+    dpct::experimental::command_graph_exec_ptr *preP[5] = {
+        nullptr, nullptr, nullptr, nullptr, nullptr};
+    dpct::experimental::command_graph_exec_ptr *preA =
+        nullptr; ///< `half == 1`: gr_read -> attention -> gr_write   (the
+                 ///< MIXER)
+    dpct::experimental::command_graph_exec_ptr *preB =
+        nullptr; ///< `half == 2`: gr_read -> moe_route              (FFN front
+                 ///< + ROUTER)
+    bool split_captured = false;
+
+    /// How many times `session_loop` has run.  `rings_mid_graph` and `ms_to_ring` are CUMULATIVE and the loop
+    /// is called once per token, so anything reporting a ratio needs this - and prefill runs the loop too, so
+    /// "per generated token" is the wrong denominator.
+    int64_t calls_total = 0;
+
+    /// **WHERE THE PER-LAYER ROUND TRIP GOES, AND `ms_to_ring` ALONE CANNOT SAY.**
+    ///
+    /// `--no-pool` measures **38.73 ms/token against a 26.32 ms pure-GPU floor**, so ~12.4 ms/token - a quarter
+    /// of the token - is spent in the loop with no expert work at all: 0.258 ms per layer. `ms_to_ring` covers
+    /// only the first half of that; it stops when the ring is seen, and everything the host then does before
+    /// the next `pre` is launched is invisible to it.
+    ///
+    /// So the round trip is split at the ring, and **`ms_to_ring` above IS the first half** - do not add a
+    /// second counter for it:
+    ///
+    ///   * `ms_to_ring` - launch -> ring observed. The GPU is working (or already finished) here.
+    ///   * `ms_host`    - ring observed -> `pre[l+1]` launched. **The GPU has nothing queued and is IDLE for
+    ///                    all of this unless `pre[l]`'s tail still covers it.** This is
+    ///                    `cudaMemcpyAsync(parts)` + `cudaGraphLaunch(post[l])` + `cudaGraphLaunch(pre[l+1])` +
+    ///                    `cudaEventRecord`, and if it is the large half then the fix is fewer driver calls
+    ///                    (R2.4), not a faster kernel.
+    ///
+    /// Cumulative, like `ms_to_ring`; divide by `calls_total * n_layers`.
+    double ms_host = 0;
+};
+
+/// Captures all 48 layer graphs.  Idempotent: a second call is a no-op.
+///
+/// `pos`/`pos_base` are baked in ONLY through the fixed-address pinned staging in each `QsaState`, which the
+/// replay re-reads every token - so the position is data, not an argument.  That is the whole reason rounds
+/// 211-214 moved the per-token counts into device buffers.
+bool session_capture(const WeightTable& tables, const ModelGeometry& g, SessionState& s, const float* parts,
+                     SessionGraphs& gr, std::string& err, bool split = false);
+
+/// One token by REPLAYING the captured graphs.  Identical arithmetic to `session_token`; the only difference is
+/// that ~2,000 kernel launches become 48 graph launches.
+bool session_replay(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s, SessionGraphs& gr,
+                    void* stream, std::string& err);
+
+/// One token by replaying BOTH halves of every layer - `pre[l]` and `post[l]` - with no pool running.
+///
+/// **THIS IS THE TRUE PER-TOKEN GPU FLOOR, AND `session_replay` IS NOT.**  `session_replay` launches only
+/// `gr.execs[l]`, the `pre` graphs, so it omits the 48 `post` graphs (shared expert, combine, second `gr_write`)
+/// entirely - and everything published as "39.8 ms pure GPU" came from it while being described as the whole
+/// GPU.  See `Memory/ERRORS.md` A4.
+///
+/// `parts` is left at whatever the buffer holds, because no pool writes it; that is deliberate and makes the
+/// measurement pure GPU work.  The LM head is NOT included here - the caller times it separately, since it runs
+/// on the host-side path rather than inside a captured graph.
+bool session_replay_full(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                         SessionGraphs& gr, void* stream, std::string& err);
+
+/// **ONE TOKEN THROUGH THE SPLIT GRAPHS, WITH EVERY STAGE TIMED FROM OUTSIDE THE CAPTURE.**  Requires
+/// `session_capture(..., split = true)`.  Replays `preA[l]`, `preB[l]`, `post[l]` in order on one stream -
+/// the same order `session_loop` uses - and reports the three totals in milliseconds for the whole token.
+///
+/// The stages are ordered by the stream, so an event pair around each launch measures that launch's GPU work
+/// plus the gap the driver left before it.  That gap is real and is why the three totals sum slightly above
+/// `session_replay_full`; the comparison is printed by the caller rather than hidden here.
+/// **R0.11: THE FIVE STAGES SEPARATELY, BY DIFFERENCING PREFIXES.**  `stage_ms` is resized to 5 and holds
+/// stages 0..4 in milliseconds for a whole token; `mixer_per_layer` holds prefix 3's time for each layer, which
+/// is what R0.10's GDN-versus-QSA split needs.  Requires `session_capture(..., split = true)`.
+///
+/// **THE RESIDUAL IS SAVED AND RESTORED BETWEEN PREFIXES.**  Stage 2 is `gr_write`, which mutates `R` in
+/// place, so without the restore every prefix after the first reads a residual the earlier ones already
+/// advanced - and every number after the first would be measuring a different tensor while looking correct.
+bool session_replay_stage_prefixes(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                                   SessionGraphs& gr, void* stream, std::vector<double>& stage_ms,
+                                   std::vector<double>& mixer_per_layer, std::string& err);
+
+/// **R3.5c: ONE PREFIX, ALL 48 LAYERS, BACK TO BACK.**  `k` in 1..5 replays `preP[k-1][l]` (or `execs[l]` for
+/// k = 5) for every layer with no other graph in between, and reports the whole sweep in milliseconds.
+///
+/// **WHY THIS EXISTS: TO RULE OUT THE PREFIX TABLE'S OWN BIAS.**  The five-stage table differences prefix
+/// times measured with FIVE DIFFERENT GRAPHS LAUNCHED PER LAYER.  Stage 4's interval therefore contains the
+/// launch of `execs[l]` - the full five-stage graph - while stage 3's contains `preP[3][l]`, a four-stage one.
+/// A launch cost that scales with graph size would inflate stage 4 specifically, and stage 4 is the router,
+/// which is the thing under investigation.  This sweep launches ONE graph type per layer, so there is nothing
+/// to switch between and nothing to attribute wrongly.
+///
+/// Five separate sweeps give five totals; their consecutive differences are the stage times on the same
+/// arithmetic as before, and **if the two methods disagree the difference is the bias and the sweep is right.**
+bool session_replay_stage_sweep(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                                SessionGraphs& gr, void* stream, int k, double& ms, std::string& err);
+
+bool session_replay_stages(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                           SessionGraphs& gr, void* stream, double& ms_mixer, double& ms_ffn, double& ms_post,
+                           std::string& err);
+
+/// **THE SAME REPLAY, KEEPING EVERY LAYER INSTEAD OF SUMMING THEM.**
+///
+/// The 48 layers are not 48 of the same thing: 36 are GDN and 12 are QSA, and the mixer - 55.8% of the GPU
+/// floor - contains both. A total cannot separate them; a per-layer vector can, and it is already being
+/// measured. `out` is resized to `n_layers` and holds each layer's mixer time in milliseconds.
+///
+/// **THIS IS THE CHEAPEST HALF OF R0.10 AND IT NEEDS NO NEW SPLIT.** Round 309's uncaptured table put GDN at
+/// 10.88 ms for 36 layers and QSA at 4.56 for 12, which would make the recurrence the largest single R3
+/// target; that table also had `moe_finish` wrong by 4x, so the ratio is worth re-deriving from the captured
+/// graph rather than inherited.
+bool session_replay_stages_per_layer(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                                     SessionGraphs& gr, void* stream, std::vector<double>& mixer_per_layer,
+                                     double& ms_ffn, double& ms_post, std::string& err);
+
+/// Releases the graph execs.  The `SessionGraphs` struct holds no device memory of its own.
+void session_graphs_free(SessionGraphs& gr);
+
+// ================================ THE HOST LOOP ================================
+
+/// WHAT THE POOL HAS TO DO, as the loop sees it: given the `x_f` a layer published and the miss list it
+/// selected, produce the `k` expert outputs into `out` (k x n_embd, HOST memory).  A function pointer rather
+/// than a virtual class because the loop is the thing under test and the pool is the thing being faked.
+using PoolFn = void (*)(void* user, const float* x_f, const int32_t* ids, const float* weights, int64_t n_embd,
+                        int64_t k, float* out);
+
+/// **R4.2c: THE VRAM-RESIDENT HALF OF THE LAYER'S EXPERTS.**  Called by the loop after the misses have been
+/// staged into `parts` and before `post[l]` is launched, so its kernels are stream-ordered between them: the
+/// misses are already in `parts`, the hits overwrite the rows the CPU zeroed, and `post[l]`'s `moe_combine`
+/// reads the sum and cannot tell which engine produced which row.
+///
+/// **WHY IT IS A CALLBACK RATHER THAN MORE PARAMETERS.**  `session_loop` owns the ORDER across layers and has
+/// no business knowing what an expert cache is.  Everything the hit path needs lives on the caller's `user`,
+/// and this has the same shape as `PoolFn` for the same reason.
+///
+/// A null pointer means "no VRAM tier" - the default, and what every caller had before R4.
+// The hit hook's type lives in its own header - see `hit_hook.hpp` for why and for the ordering it wants.
+
+/// `phases/phase-2-correct-engine.md` P2.S5's host loop, which is the point of everything above it:
+///
+///     launch G[l] -> poll the doorbell -> read the miss list -> dispatch the pool -> wait for it ->
+///     write y_miss -> launch G[l+1]
+///
+/// **NO `cudaStreamSynchronize` IN THE LOOP**, which is P2.X3.  Waiting is `cudaEventQuery` on an event recorded
+/// right after the launch - a QUERY, and it is not optional: round 195 measured a host spin that only read
+/// memory never running the kernel at all, 5,907,703 spins over 500 ms with the datum flipping only when
+/// `cudaStreamSynchronize` was called.
+///
+/// **THE OVERLAP IS THE ONE-LAYER DELAY.**  A layer publishes `x_f` at ~71% of its own duration, so the pool has
+/// the remaining 29% of that layer to work in; its result is consumed by the NEXT layer, which is why the
+/// combine is not waiting on it.  `overlap = false` runs the same sequence with a synchronisation after every
+/// layer, which is the comparison that says whether the pipeline is worth its complexity - and it is a
+/// parameter rather than a second function so that the two cannot drift.
+///
+/// **`dump_layers`, WHEN NOT NULL, IS THE C1 ORACLE AND IT IS A HOST BUFFER OF `(n_layers + 1) * hc * n_embd`
+/// FLOATS.**  Slot 0 is the residual the function was ENTERED with - the token's embedding broadcast to every
+/// stream, which is the reference's `hc_init` node - and slot `l + 1` is `s.R` after layer `l`, which is the
+/// reference's `l_last-<l>`.  Each is enqueued as a device-to-host copy, and the final `cudaStreamSynchronize`
+/// at the end of the loop is what makes every one of them complete.  **NO EXTRA SYNCHRONISATION IS INSERTED**,
+/// which is the whole reason this is written as an enqueue rather than a read: `pre[l+1]` does not write `R` and
+/// `post[l+1]` is launched after the copy on the same stream, so FIFO order alone makes slot `l + 1` a true
+/// snapshot.  It costs 40 KB per layer per token, and it is the only way to bisect the engine against the
+/// reference layer by layer instead of against one end-to-end perplexity.
+/// Per-token scratch that MUST NOT be reallocated per token (P2.T10, review finding H3).
+///
+/// **`session_loop` IS CALLED ONCE PER TOKEN, SO ANYTHING IT ALLOCATES IS A PER-TOKEN ALLOCATION.**  It used to
+/// allocate three things on every token of every run:
+///
+///   * `cudaHostAlloc` for the pool's pinned staging, freed by an RAII destructor at the end of the call - and
+///     `cudaFreeHost` IMPLICITLY SYNCHRONISES THE DEVICE, so every token ended with a device sync;
+///   * `cudaEventCreate` / `cudaEventDestroy` for the doorbell probe;
+///   * a host-affinity change (`physical_cores` + pin + restore).
+///
+/// A comment in the old code said "allocated once", but once per token is not once.
+///
+/// Own one of these at session setup and pass it in.  **Passing `nullptr` keeps the old behaviour** - the loop
+/// allocates and frees locally - so every existing caller and test is unaffected, but the allocation is then
+/// visible at the call site instead of hidden inside a hot function.
+struct SessionLoopScratch {
+    float* y_miss = nullptr;        ///< pinned host staging for the pool's answer, `parts_bytes` long
+    size_t parts_bytes = 0;
+    dpct::event_ptr probe = nullptr;
+    long long pinned_core = -1;     ///< the affinity to restore, or -1 if the host was never pinned
+    bool pinned = false;
+
+    /// Allocates the buffers and pins the host thread.  Call ONCE, at session setup.
+    bool init(size_t parts_bytes_in, std::string& err);
+    /// Frees everything and restores the affinity.  Safe to call twice, or on a default-constructed object.
+    void free();
+};
+
+bool session_loop(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s, SessionGraphs& gr,
+                  PoolFn pool, HitFn hits, void* user, bool overlap, void* stream, std::string& err,
+                  float* dump_layers = nullptr, SessionLoopScratch* scratch = nullptr);
+
+// ================================ plan v0.3 P3: THE WHOLE TOKEN AS ONE GRAPH ================================
+//
+// Under WDDM every graph launch costs ~0.3-0.4 ms of submission latency, and the per-layer loop above makes 96
+// of them per token: measured 48.6 ms/token for 12 ms of GPU kernels and 27 ms of pool.  The token graph holds
+// all 48 layers.  Between `pre[l]` (which rings the doorbell) and the parts copy, a one-thread kernel waits ON
+// THE DEVICE until the host writes the ring value into `db.h_flag`; the host only polls rings, runs the pool
+// and writes flags, with no driver call in the loop (bench/micro/device_wait.cu: 5.2 us per handoff).
+//
+//     for l:  pre[l] (.. router, doorbell ring, shared expert)  ->  doorbell_wait  ->  parts <- y_miss (H2D)
+//             ->  post[l] (combine, gr_write)
+//
+// Same kernels, same order per layer as `session_loop`, so the token is bitwise the same.  No VRAM expert tier
+// yet (the hit decision is a host step between ring and post); the caller falls back to `session_loop` then.
+struct TokenGraph {
+    dpct::experimental::command_graph_exec_ptr exec = nullptr;
+    bool captured = false;
+    int64_t n_layers = 0;
+    const float* y_src = nullptr;    ///< the pinned host staging the graph's H2D copies read (baked in)
+    size_t parts_bytes = 0;
+    int64_t calls = 0;
+    double ms_wait = 0;              ///< host waiting for rings (the GPU is running)
+    double ms_pool = 0;              ///< host inside the pool
+    int64_t flushes = 0;             ///< cudaStreamQuery calls made because a ring was slow to appear
+};
+
+/// Plan v0.3 P4: the VRAM expert tier inside the token graph.  Residency is STATIC during a token (a
+/// `n_layers x n_expert` table, slot or -1, on the device; the host pool reads its own copy), so the hit list
+/// is built on the device right after the ring and the hits run while the CPU computes the misses.
+struct TokenHits {
+    const int32_t* d_res = nullptr;      ///< device [n_layers * n_expert]
+    int64_t n_expert = 0;
+    const uint8_t* cache_base = nullptr; ///< slot 0 of the VRAM expert arena
+    int64_t blob = 0;                    ///< bytes per slot
+    int32_t* d_slot = nullptr;           ///< device, k entries
+    int32_t* d_dst = nullptr;            ///< device, k entries
+    int32_t* d_count = nullptr;          ///< device, 1
+    uint8_t* x_q8 = nullptr;             ///< the activation's q8_0 blocks, (n_embd/32)*34 B
+    float* x_scale = nullptr;            ///< and its fp32 scales (the CPU pool's contract)
+    void* scratch = nullptr;             ///< moe_hit_grouped_scratch_bytes(k, ...)
+    float* hit_out = nullptr;            ///< device, k * n_embd
+    bool on() const { return d_res && cache_base && d_slot && d_dst && d_count && x_q8 && x_scale && scratch && hit_out; }
+};
+
+bool session_capture_token(const WeightTable& tables, const ModelGeometry& g, SessionState& s, float* parts_dev,
+                           const float* y_miss_host, size_t parts_bytes, TokenGraph& tg, std::string& err,
+                           const TokenHits* hits = nullptr);
+bool session_run_token(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s, TokenGraph& tg,
+                       PoolFn pool, void* user, float* y_miss_host, void* stream, std::string& err);
+void token_graph_free(TokenGraph& tg);
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
new file mode 100644
index 00000000000..f6f7835c771
--- /dev/null
+++ b/sycl/include/strata/core/verify.hpp
@@ -0,0 +1,239 @@
+// include/strata/core/verify.hpp - plan v0.3 P6: the speculative VERIFY window.
+//
+// T tokens at consecutive positions p0 .. p0+T-1 - the last accepted token and T-1 drafts - go through all 48
+// layers in ONE captured graph, and the head's argmax is produced for every one of them.  Token t's argmax is
+// what plain greedy decode would produce after token t, BIT FOR BIT: every kernel here is either the single-token
+// kernel applied per token, or a multi-token kernel whose per-token arithmetic is the single-token kernel's
+// (multi-column MMVQ in exact mode, the T-token GDN kernels, the per-token hit activation, the multi-token CPU
+// expert rows).  So a draft is accepted exactly when greedy decode would have produced it.
+//
+// What the window costs is the dense weights read ONCE for T tokens and the union of the T tokens' missed
+// experts on the CPU (measured on decode traces: 1.75x one token's misses for T=2, 2.4x for 3, 3.05x for 4).
+//
+// STATE.  The window appends K/V and indexer keys for all T positions and leaves the GDN state untouched.
+// `commit(n_keep)` then makes the first `n_keep` tokens permanent: the GDN conv history and recurrent state are
+// advanced by replaying those tokens from inputs the window stored, the indexer's key tail is restored from a
+// snapshot and the accepted keys re-appended (a rejected key can land in a slot the current block still needs),
+// and the PLE history is set to its snapshot after token n_keep-1.  K/V cells past the accepted prefix are simply
+// overwritten when those positions are processed again, before any query can read them.
+//
+// Requires the default native decode configuration (native projections, fused GR, fused GDN, fast attention and
+// selection, native indexer) and a profile-filled VRAM expert tier with its residency table on the device.
+#pragma once
+
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdio>
+
+#include "strata/core/expert_source.hpp"
+#include "strata/core/layer.hpp"
+#include "strata/core/session.hpp"
+#include "strata/kernels/sampler.hpp"
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+namespace strata::core {
+
+class NativeHead;
+
+/// The CPU pool for a window: x_f (n_tok, n_embd), ids (n_tok, k) -> out (n_tok * k, n_embd), hit rows zeroed.
+using PoolMultiFn = void (*)(void* user, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k, float* out,
+                             int64_t layer);
+
+struct VerifyHits {
+    const int32_t* d_res = nullptr;      ///< device [n_layers * n_expert] slot or -1
+    const uint8_t* cache_base = nullptr; ///< slot 0 of the VRAM expert arena
+    const uint64_t* slot_off = nullptr;   ///< E-6: host per-slot offsets when slots differ in size (null: slot * blob)
+    int64_t n_slots = 0;                  ///< E-6: how many (for the device copy)
+    int64_t blob = 0;
+};
+
+class Verifier {
+public:
+    Verifier() = default;
+    ~Verifier();
+    Verifier(const Verifier&) = delete;
+    Verifier& operator=(const Verifier&) = delete;
+
+    /// The watchdog's view of the window in flight (issue #31): the layer, the GPU's sequence, the flags.
+    void diag(std::FILE* f) const;
+
+    /// `max_t` <= kVerifyMaxT.  `head` may be null (the canonical head is then run per token).
+    bool init(const WeightTable& wt, const ModelGeometry& g, SessionState& ss, const VerifyHits& hits,
+              const NativeHead* head, int max_t, std::string& err);
+
+    /// One window: `tokens[0..T)` at positions pos0.., the pool served per layer; `out[t]` = argmax after token t.
+    /// The PLE rows are gathered here from `ss.ple_prev` and the tokens.  Captures the T-token graph on first use.
+    bool run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool, void* user, int32_t* out, std::string& err);
+    /// The sampling the verify window's head applies (temperature / top_p / top_k / seed).  Set per
+    /// request; greedy by default.  The sampling itself runs OUTSIDE the captured graph - its
+    /// parameters would otherwise be baked forever - so this can change between requests freely.
+    void set_sampling(const strata::kernels::SamplerParams& sp) {
+        sampling_ = sp;   // row t of a window at pos0 draws Philox(seed, pos0 + t): see run()
+        if (next_) next_->set_sampling(sp);
+    }
+
+    /// The penalty histories for `sampling_.penalty_last_n`: ONE ROW PER WINDOW ROW, T rows of `history_len`
+    /// int32 slots at that stride (`strata::kernels::penalty_rows` builds them), most recent token LAST, unused
+    /// front slots -1 (the kernel reads only the tail window).  Row t follows the window's drafts 1..t - staging
+    /// row 0 alone (before 0.1.19) left the drafted rows with unwritten histories.  Null disables the penalties
+    /// entirely - the neutral run's sampling call is byte-for-byte what it was.  The engine re-uploads the rows
+    /// before every window; the buffer must hold kVerifyMaxT rows and stay alive across the request.
+    void set_history(const int32_t* history, int history_len) {
+        hist_d_ = history;
+        hist_len_ = history_len;
+        if (next_) next_->set_history(history, history_len);
+    }
+    /// Off: `run` skips the request's head sampling and `out` is the recorded greedy pick.  For windows whose
+    /// picks are discarded - a prompt read through windows commits every token - so they cost no sampler launch
+    /// or sync and never read a history staged for another position.
+    void set_head_sampling(bool on) { head_sampling_ = on; if (next_) next_->set_head_sampling(on); }
+
+    /// LAYER SPLIT (multi-GPU): this verifier runs layers [layer_begin, layer_end) of every window.  A stage that
+    /// does not start at layer 0 takes its residual from `handoff_in` instead of embedding the tokens; a stage that
+    /// does not end at the last layer writes its residual to `handoff_out` and has no head.  The hand-off holds,
+    /// per token, the residual R (hc x n_embd), the last layer's pending write bo (n_embd) and inject (hc): the next
+    /// stage folds that write into its first read exactly as the unsplit window does, so the split is bit-exact.
+    /// Both pointers must be device-visible (mapped pinned memory, portable when the stages are on two devices).
+    /// Set before `init`.  Default: the whole model, no hand-off.
+    void set_stage(int64_t layer_begin, int64_t layer_end, const float* handoff_in, float* handoff_out) {
+        lb_ = layer_begin; le_ = layer_end; hand_in_ = handoff_in; hand_out_ = handoff_out;
+    }
+    /// The next stage: `run` and `commit` continue into it (its pool calls get `next_user`); sampling settings
+    /// and `final_R` are the last stage's.
+    void set_next(Verifier* next, void* next_user) { next_ = next; next_user_ = next_user; }
+    /// floats per token in a hand-off buffer
+    static int64_t handoff_floats(const ModelGeometry& g) { return (int64_t) g.hc * g.n_embd + g.n_embd + g.hc; }
+
+    /// Keep the first `n_keep` (1..T) tokens of the last window; advances `ss.ple_prev` by them.
+    bool commit(int n_keep, std::string& err);
+
+    /// Token t's residual after the last layer, (hc, n_embd) on the device, valid until the next `run`.
+    const float* final_R(int t) const;
+    const float* final_R_all() const { return next_ ? next_->final_R_all() : R_; }
+
+    /// The GPU plan the pool writes each layer (VRAM hits + the PCIe share of the misses); give it to the
+    /// dispatch (`ExpertDispatch::plan`) before the first `run`.
+    GpuPlanSink* plan_sink() { return &sink_; }
+    /// Plan v0.3 P6: split the window into two token groups and pipeline the CPU experts of one with the GPU work
+    /// of the other (default on).  Set before the first `run`.
+    void set_split(bool on) { split_ = on; }
+    /// Plan v0.3 P6: how the PCIe share of the misses reaches the GPU: 0 = DMA into staging (the copy engine works
+    /// beside the CPU; best when the CPU is compute-bound, the i-quants), 1 = the grouped kernel reads the mapped
+    /// arena directly, 2 = a copy kernel stages it inside the graph (no API calls on the pool's thread; best when
+    /// the CPU is RAM-bound, Q2_0).  Set before the first `run`.
+    void set_pcie_mode(int mode) { sink_.pcie_mode = mode; }
+    /// the pool never plans a PCIe share (--pcie-frac 0): the window skips that path.  Before the first run.
+
+    double ms_wait = 0, ms_pool = 0, ms_host = 0, ms_commit = 0;
+    int64_t windows = 0;
+    /// STRATA_VERIFY_PROFILE=1 - GPU stage times of the windows since the last call (ms per
+    /// window), as one line; empty when off.
+    std::string profile_report();
+
+private:
+    bool capture(int T, std::string& err);
+    strata::kernels::SamplerParams sampling_ = [] {
+        strata::kernels::SamplerParams s;
+        s.greedy = true;
+        s.temperature = 0.0f;
+        return s;
+    }();   ///< greedy by default; per-request via set_sampling
+    const int32_t* hist_d_ = nullptr;   ///< penalty-history row (set_history); null = no penalties apply
+    int hist_len_ = 0;
+    bool head_sampling_ = true;          ///< set_head_sampling
+    int device_ = -1;                    ///< the device `init` ran on: run/commit switch to it (layer split)
+    bool device_plan_ = false;            ///< E-6: resident-only layers planned on the device (STRATA_VERIFY_DEVICE_PLAN)
+    uint32_t* skip_ = nullptr;            ///< E-6: per group, the ring whose plan the device built (0: the host's)
+    unsigned long long* slot_off_d_ = nullptr;   ///< E-6: the slot offsets on the device
+    int64_t lb_ = 0, le_ = -1;           ///< set_stage: the layers this verifier runs (-1: to the last)
+    const float* hand_in_ = nullptr;
+    float* hand_out_ = nullptr;
+    Verifier* next_ = nullptr;
+    void* next_user_ = nullptr;
+    bool ple_stage() const { return lb_ <= 1 && 1 < le_; }   ///< holds layer 1, where the PLE block runs
+    bool capture_commit(std::string& err);
+    bool record_window(int T, dpct::queue_ptr cs, std::string &err);
+    static constexpr int kProfPer = 32;              // stamps per layer
+    bool prof_on_ = false;
+    unsigned long long* prof_ = nullptr;              // device: n_layers * kProfPer + 4 stamps
+    std::vector<unsigned long long> prof_h_;
+    double prof_sum_[2][kProfPer] = {};   // [GDN / QSA layers][stage]
+    int64_t prof_windows_ = 0;
+
+    const WeightTable* wt_ = nullptr;
+    const ModelGeometry* g_ = nullptr;
+    SessionState* ss_ = nullptr;
+    VerifyHits hits_;
+    const NativeHead* head_ = nullptr;
+    int max_t_ = 0;
+    int last_t_ = 0;
+    int64_t last_pos0_ = 0;
+    int32_t last_tokens_[8] = {};
+    int64_t n_vocab_ = 0;
+    dpct::queue_ptr cs_ = &dpct::get_in_order_queue();
+    dpct::experimental::command_graph_exec_ptr exec_[9] = {};
+    dpct::experimental::command_graph_exec_ptr commit_exec_ = nullptr;
+
+    // mapped staging (host pointer, device alias)
+    int32_t* h_tok_ = nullptr;   int32_t* m_tok_ = nullptr;     // T
+    int32_t* h_step_ = nullptr;  int32_t* m_step_ = nullptr;    // T * kStepCount
+    int32_t* h_pos_ = nullptr;   int32_t* m_pos_ = nullptr;     // T * n_head
+    int32_t* h_commit_ = nullptr; int32_t* m_commit_ = nullptr; // [n_keep, n_keep-1, pos_0 .. pos_{T-1}]
+    float* h_ple_ = nullptr;     float* m_ple_ = nullptr;       // T * n_embd
+    int32_t* h_out_ = nullptr;   int32_t* m_out_ = nullptr;     // T argmax ids
+    float* h_x_ = nullptr;       float* m_x_ = nullptr;         // doorbell payload: T * n_embd
+    int32_t* h_ids_ = nullptr;   int32_t* m_ids_ = nullptr;     // T * k
+    float* h_w_ = nullptr;       float* m_w_ = nullptr;         // T * k
+    uint32_t* h_seq_ = nullptr;  uint32_t* m_seq_ = nullptr;
+    uint32_t* h_flag_ = nullptr; uint32_t* m_flag_ = nullptr;
+    uint32_t* h_flagA_ = nullptr; uint32_t* m_flagA_ = nullptr;  // the GPU plan is in place
+    uint32_t* h_flagB_ = nullptr; uint32_t* m_flagB_ = nullptr;  // the PCIe share's DMA copies have landed
+    dpct::queue_ptr copy_ =
+        &dpct::get_in_order_queue(); // the copy engine's stream (DMA of missed
+                                     // experts)
+    struct FlagSet { uint32_t* flag; uint32_t value; };
+    FlagSet flag_sets_[2 * 64 * 2] = {};                          // host-function arguments, one per (layer, group)
+    static void fetch_dma(void* ctx, const uint8_t* const* src, int n, size_t bytes);
+    static void raise_flag(uint32_t* flag, uint32_t value);
+    int32_t* h_plan_ = nullptr;  int32_t* m_plan_ = nullptr;     // counts | start | dst | tok | ptr (as int32 pairs)
+    int64_t plan_i32_ = 0;                                        // int32 words in the plan block
+    GpuPlanSink sink_;
+    uint32_t cur_layer_ = 0;
+    static void publish_plan(void* ctx);
+    void set_plan_slot(int grp);
+    bool split_ = false;   // opt-in (--spec-split): exact but slower, see the overlap study
+    int groups_[9] = {};
+    float* h_ymiss_ = nullptr;   float* m_ymiss_ = nullptr;     // T * k * n_embd
+
+    // device
+    void* arena_ = nullptr;
+    int32_t *tok_ = nullptr, *step_ = nullptr, *pos_ = nullptr, *commit_ = nullptr;
+    float *ple_ = nullptr, *emb_ = nullptr, *R_ = nullptr, *mixed_ = nullptr, *bo_ = nullptr;
+    float *inj_ = nullptr, *inj2_ = nullptr, *lo_ = nullptr, *rs_ = nullptr, *xn_ = nullptr;
+    uint8_t* xq_ = nullptr;                                   // T columns of q8_1
+    float *qkv_L_ = nullptr, *h_L_ = nullptr, *gate_L_ = nullptr, *beta_L_ = nullptr;   // per GDN layer
+    float *z_ = nullptr, *y_ = nullptr, *y_dummy_ = nullptr;
+    float *qfull_ = nullptr, *qcur_ = nullptr, *kcur_ = nullptr, *vcur_ = nullptr, *idx_raw_L_ = nullptr;
+    float *qidx_ = nullptr, *scores_ = nullptr, *attn_ = nullptr, *attn32_ = nullptr, *attn_scratch_ = nullptr;
+    float* tail_snap_ = nullptr;                              // per QSA layer
+    int32_t* sel_ = nullptr;
+    float *logits_ = nullptr, *w_ = nullptr, *shared_ = nullptr, *parts_ = nullptr, *hit_out_ = nullptr;
+    int32_t *ids_ = nullptr, *hit_slot_ = nullptr, *hit_dst_ = nullptr, *hit_count_ = nullptr;
+    int32_t* plan_ = nullptr;                                     // device copy of the plan block
+    uint8_t* staging_ = nullptr;                                  // VRAM slots for the PCIe share of the misses
+    static constexpr int64_t kStagingBlobs = 16;
+    uint8_t* hit_xq_ = nullptr;
+    uint8_t* nat_xq_ = nullptr;   // plan v0.3 P6: q8_1 activations for a native pack's grouped experts
+    float* hit_xs_ = nullptr;
+    void* hit_scratch_ = nullptr;
+    float *head_mixed_ = nullptr, *head_inj_ = nullptr, *head_logits_ = nullptr;
+    uint16_t* sh_bf16_ = nullptr;
+    float *sh_gate_ = nullptr, *sh_up_ = nullptr, *sh_g_ = nullptr;
+    float* hist_snap_ = nullptr;                              // T * NG_HIST * NG_HC_DIM
+    int64_t cap_ = 0, max_blocks_ = 0, attn_scratch_floats_ = 0;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/kernels/bf16_bits.hpp b/sycl/include/strata/kernels/bf16_bits.hpp
new file mode 100644
index 00000000000..11a85f28b1a
--- /dev/null
+++ b/sycl/include/strata/kernels/bf16_bits.hpp
@@ -0,0 +1,49 @@
+// include/strata/kernels/bf16_bits.hpp - the bf16 conversions, written out, as bits.
+//
+// bf16 is the TOP HALF of an f32, so `f32_from_bf16` is a shift and needs no rounding at all.  The forward
+// direction does: ggml's `ggml_compute_fp32_to_bf16` adds `((i >> 16) & 1) + 0x7FFF` and truncates 16 bits.
+//
+// **THE `& 1` IS ON BIT 16**, the lowest KEPT bit, which is what makes an exact tie round to EVEN.  Using bit
+// 15 there is a plausible mistake: it differs only on exact ties, i.e. almost never on real data, which is
+// exactly why it would survive any amount of end-to-end testing.  `ref/quant.py` documents the same rule for
+// the same reason.
+//
+// WHY THIS IS SEPARATE FROM `f16_bits.hpp`: fp16 and bf16 are not two spellings of one idea.  fp16 has 5
+// exponent bits and 10 mantissa bits; bf16 has 8 and 7.  A conversion routine written for one and reused for
+// the other is wrong in a way that produces plausible numbers - bf16's 2^-9 relative precision looks like a
+// small fp16 error and is not small at all next to fp16's 2^-11.
+//
+// `gr.cu` carried a private copy of `f32_to_bf16_bits` until this header existed.  It now includes this.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+#include <cstring>
+
+#if defined(SYCL_LANGUAGE_VERSION)
+#define STRATA_BF16_HD 
+#else
+#define STRATA_BF16_HD
+#endif
+
+namespace strata::kernels {
+
+/// Round-to-nearest-even f32 -> bf16, returned as raw bits in the LOW half of the uint16.
+STRATA_BF16_HD inline uint16_t bf16_from_f32(float f) {
+    uint32_t i;
+    std::memcpy(&i, &f, 4);
+    i = (i + ((i >> 16) & 1u) + 0x7FFFu) & 0xFFFF0000u;
+    return (uint16_t) (i >> 16);
+}
+
+/// bf16 bits -> f32.  Exact, and no rounding: the low 16 bits of an f32 are simply zero.
+STRATA_BF16_HD inline float f32_from_bf16(uint16_t h) {
+    const uint32_t i = (uint32_t) h << 16;
+    float f;
+    std::memcpy(&f, &i, 4);
+    return f;
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/f16_bits.hpp b/sycl/include/strata/kernels/f16_bits.hpp
new file mode 100644
index 00000000000..3ac2a52457e
--- /dev/null
+++ b/sycl/include/strata/kernels/f16_bits.hpp
@@ -0,0 +1,99 @@
+// include/strata/kernels/f16_bits.hpp - the fp16 conversions, written out, as bits.
+//
+// WHY THIS IS NOT `__float2half`.  Round 193 found `__float2half` producing 0x2600 for a value whose correct
+// fp16 encoding is 0x26DB, and 0x3C01 for a value that is exactly 1.0 - i.e. wrong bits, not a rounding
+// difference.  The cause was never isolated (it is either `__float2half` itself or `__half_as_ushort`), so
+// `src/kernels/cuda/quantize_act.cu` replaced it with the version below, which then came out byte-exact over
+// all 20,480 blocks of the fixture.  `shared_expert.cu` carries the same function privately for the same
+// reason.  Three copies of a converter whose failure mode is silent wrong bits is two copies too many, so the
+// copy lives here and the kernel and its TEST both include it - with the test checking it against vectors
+// generated by numpy's float16 (an oracle that shares no code with this), which is what neither private copy
+// had.
+//
+// The rounding is ROUND-TO-NEAREST-EVEN, which is what numpy's `.astype(np.float16)` does and what IEEE-754
+// specifies for the default mode.  The three interesting regimes are all handled explicitly and all three are
+// covered by the test's oracle vectors:
+//
+//   * normal      - exponent fits, mantissa is rounded from 13 surviving bits with a sticky remainder
+//   * subnormal    - the implicit 1 is restored and the result is shifted right, so the rounding point MOVES
+//   * overflow     - exp >= 31 saturates to inf (0x7C00) and keeps the sign; a NaN input stays a NaN
+//
+// `f32_from_f16` deliberately does NOT round: it is used to compare against a reference that holds the same
+// bits, so it only has to be exact.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+#include <cstring>
+
+#if defined(SYCL_LANGUAGE_VERSION)
+#define STRATA_HD 
+#else
+#define STRATA_HD
+#endif
+
+namespace strata::kernels {
+
+/// Round-to-nearest-even f32 -> fp16, returned as raw bits.
+STRATA_HD inline uint16_t f16_from_f32(float f) {
+    uint32_t x;
+    std::memcpy(&x, &f, 4);
+    const uint32_t sign = (x >> 16) & 0x8000u;
+    const uint32_t rawexp = (x >> 23) & 0xFFu;
+    int exp = (int) rawexp - 127 + 15;
+    uint32_t man = x & 0x7FFFFFu;
+    // TWO different things reach here and they must not be conflated: an f32 inf/NaN (raw exponent 255) stays
+    // an inf/NaN, and a FINITE value too large for fp16 (1e30) SATURATES TO INF.  The version of this function
+    // in quantize_act.cu and shared_expert.cu tests `if (exp >= 31) return sign | 0x7C00 | (man ? 0x200 : 0)`
+    // and therefore returns a NaN for every overflowing finite value - which their own fixtures cannot see,
+    // because all of their values are O(1).  Round 198's numpy oracle caught it here on the first run (1e30,
+    // 65536, 1e45: numpy says inf, the conflated test said NaN).
+    if (rawexp == 0xFFu) return (uint16_t) (sign | 0x7C00u | (man ? 0x200u : 0u));   // inf, or a quiet/NaN
+    if (exp >= 31) return (uint16_t) (sign | 0x7C00u);                             // finite overflow -> inf
+    if (exp <= 0) {
+        if (exp < -10) return (uint16_t) sign;                                // underflows to a signed zero
+        man |= 0x800000u;                                                     // restore the implicit 1
+        const uint32_t sh = (uint32_t) (14 - exp);
+        uint32_t h = (man >> sh) & 0x3FFu;
+        const uint32_t rem = man & ((1u << sh) - 1u);
+        if (rem > (1u << (sh - 1)) || (rem == (1u << (sh - 1)) && (h & 1u))) ++h;
+        return (uint16_t) (sign | h);
+    }
+    uint16_t h = (uint16_t) (sign | ((uint32_t) exp << 10) | (man >> 13));
+    const uint32_t rem = man & 0x1FFFu;
+    if (rem > 0x1000u || (rem == 0x1000u && (h & 1u))) ++h;                   // the carry may bump the exponent
+    return h;
+}
+
+/// Exact fp16 bits -> f32.  No rounding, no exceptions: every one of the 65,536 inputs maps to a value f32
+/// represents exactly, including the subnormals (which is why the `ex == 0` case cannot be skipped).
+STRATA_HD inline float f32_from_f16(uint16_t h) {
+    const uint32_t sign = (uint32_t) (h & 0x8000u) << 16;
+    const uint32_t ex = (h >> 10) & 0x1Fu, man = h & 0x3FFu;
+    uint32_t out;
+    if (ex == 0) {
+        // Subnormal or zero.  The value is `man * 2^-24`, so after `s` left shifts the leading 1 reaches bit
+        // 10 and the value is `(1 + frac) * 2^(-14-s)`: the f32 exponent field is 113 - s and `frac` is the low
+        // ten bits.  Flushing these to zero - which the two private copies of this function in the tree do -
+        // maps 0x0001 to 0.0 instead of 2^-24, a 100% relative error on any KL-quant scale that lands here.
+        if (man == 0) {
+            out = sign;
+        } else {
+            uint32_t m = man;
+            int s = 0;
+            while ((m & 0x400u) == 0) { m <<= 1; ++s; }
+            out = sign | ((uint32_t) (113 - s) << 23) | ((m & 0x3FFu) << 13);
+        }
+    } else if (ex == 31) {
+        out = sign | 0x7F800000u | (man << 13);
+    } else {
+        out = sign | ((ex - 15 + 127) << 23) | (man << 13);
+    }
+    float f;
+    std::memcpy(&f, &out, 4);
+    return f;
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/mrope.hpp b/sycl/include/strata/kernels/mrope.hpp
new file mode 100644
index 00000000000..11fcfe1e078
--- /dev/null
+++ b/sycl/include/strata/kernels/mrope.hpp
@@ -0,0 +1,41 @@
+// strata/kernels/mrope.hpp - multimodal rotary positions (the vision path).
+//
+// qwen4exp rotates with interleaved M-RoPE (llama.cpp LLAMA_ROPE_TYPE_IMROPE, rope.dimension_sections 11/11/10/0):
+// each of the 32 rotated pairs takes its position from one of three streams, time t, height h and width w.  Text
+// has t = h = w, which is why every rope kernel here takes one position per row.  An image does not: its tokens
+// share t and differ in h and w (mtmd: t = p, h = p + y, w = p + x), and the text after it continues at
+// p + max(nx, ny), not at its cell index.
+//
+// The table: nullptr (the default) keeps every kernel exactly as before - the position a caller passes is the
+// rotary position.  Set, it is a DEVICE int32 [cells][3] (t, h, w) and the position a caller passes is read as a
+// CELL index; pair i rotates by tab[cell * 3 + mrope_sector(i)].  Every caller in the engine passes cell indices
+// (pos_base is 0 everywhere), so the table covers the prompt path, the verify window and the MTP drafter at once.
+// The pointer must be set before any CUDA graph is captured (kernels take it as an argument); the contents may
+// change between requests.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+
+namespace strata::kernels {
+
+/// The table of the CURRENT device (a layer split sets one per device; null = the identity).
+void mrope_table_set(const int32_t* device_table);
+const int32_t* mrope_table();
+
+#if defined(SYCL_LANGUAGE_VERSION)
+/// ggml rope_multi, is_imrope, sections {11, 11, 10, 0}: sector = pair % 32; sector % 3 == 1 -> h (sector < 33),
+/// == 2 -> w (sector < 30), == 0 -> t (sector < 33).  For pairs 0..31 all three bounds hold, so it is pair % 3.
+__dpct_inline__ int mrope_pos(const int32_t *tab, int pos, int pair) {
+    /*
+    DPCT1098:387: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    return tab ? *(tab + (size_t)pos * 3 + pair % 3) : pos;
+}
+#endif
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/rope.hpp b/sycl/include/strata/kernels/rope.hpp
new file mode 100644
index 00000000000..5b262748797
--- /dev/null
+++ b/sycl/include/strata/kernels/rope.hpp
@@ -0,0 +1,53 @@
+// include/strata/kernels/rope.hpp - NEOX partial RoPE, host-callable (P2.S2).
+//
+// Pairing is NEOX: (i, i + n_rot/2), NOT the adjacent pair (2i, 2i+1).  The rotation is PARTIAL - only the
+// first n_rot of head_dim are touched, 64 of 256 in this artifact - and the tail passes through.
+//
+// The cos/sin table is built on the HOST in float64 (see src/kernels/cuda/rope.cu for why) and the kernel is
+// a pure rotation over it.  The table depends on (n_rot, theta, position) and not on the token, so it is worth
+// caching; `build_rope_table` fills `max_pos` positions of `n_rot/2` pairs each.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+
+#if defined(SYCL_LANGUAGE_VERSION)
+#define STRATA_ROPE_HD 
+#else
+#define STRATA_ROPE_HD
+#endif
+
+namespace strata::kernels {
+
+/// ONE NEOX PAIR: `(a, b) -> (a*c - b*s, a*s + b*c)`.
+///
+/// This exists so the pairing and the sign convention live in ONE place.  `rope_neox_apply` walks a whole row
+/// with it, and `indexer_key_append`'s pooling kernel uses it to rotate the single pooled row it has just
+/// written - two call sites that MUST agree, because the indexer's key is compared against query scores
+/// downstream and a mismatched rotation produces a well-formed key pointing the wrong way.
+///
+/// It is `__host__ __device__` (the `f16_bits.hpp` pattern) rather than device-only so a host-side reference in
+/// a test can call THE SAME function instead of transcribing it.  A transcription is exactly how the pairing
+/// convention gets written down wrong.
+///
+/// In-place is safe: the caller writes both outputs from the two inputs it read, and under NEOX no two pairs
+/// share an element (`i` pairs with `i + n_rot/2`, so the halves are disjoint).
+STRATA_ROPE_HD inline void rope_neox_pair(float a, float b, float c, float s, float& oa, float& ob) {
+    oa = a * c - b * s;
+    ob = a * s + b * c;
+}
+
+void build_rope_table(int n_rot, double theta, int max_pos, float* cos_tab, float* sin_tab);
+
+// `x` and `out` are (rows, head_dim) and `pos` is (rows,) - one position per row, so a batch of heads at
+// different sequence positions is one call.  `cos_tab`/`sin_tab` are (max_pos, n_rot/2).  `out` may equal `x`.
+//
+// **`pos` IS A DEVICE ARRAY, NOT A HOST SCALAR**, and that is a graph-capture requirement rather than a style
+// choice: a CUDA graph bakes kernel arguments in at capture time, so a host scalar position would replay the
+// first token's value forever.  See the same note on `indexer_key_append` in `qsa.hpp`.
+void rope_neox_apply(const float* x, float* out, int64_t rows, int head_dim, int n_rot, const float* cos_tab,
+                     const float* sin_tab, const int* pos, void* stream);
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/sampler.hpp b/sycl/include/strata/kernels/sampler.hpp
new file mode 100644
index 00000000000..b247f15e9b2
--- /dev/null
+++ b/sycl/include/strata/kernels/sampler.hpp
@@ -0,0 +1,64 @@
+// include/strata/kernels/sampler.hpp - the sampler chain, host-callable (P2.S2).
+//
+//     penalties -> top_k -> top_p -> min_p -> temperature -> pick
+//
+// llama.cpp's default chain (issue #53): ONE penalties stage, first, and temperature AFTER the truncation filters;
+// top_p cuts before min_p.  `src/kernels/cuda/sampler.cu` has the details and `sampler_parity` pins them.
+#pragma once
+
+#include <algorithm>
+#include <cstddef>
+#include <cstdint>
+#include <cmath>
+
+namespace strata::kernels {
+
+struct SamplerParams {
+    int top_k = 20;              // sampled path: 1..64 as given; 0 (off) or more than 64 keep the widest list, 64
+    float top_p = 0.95f;         // 1.0 disables the filter
+    float min_p = 0.0f;          // 0 disables; keeps tokens with p >= min_p * p_max (a prefix of the top_k list)
+    float temperature = 1.0f;    // <= 0 means greedy
+    int min_keep = 1;            // top_p keeps at least this many
+    int penalty_last_n = 0;      // 0 disables; the window over `history` to count occurrences in
+    float penalty_repeat = 1.0f;
+    float penalty_freq = 0.0f;
+    float penalty_present = 0.0f;
+    uint64_t seed = 0;           // drives Philox, which is counter-based on (seed, token index)
+    uint64_t counter = 0;        // absolute draw index of row 0; advance across decode calls
+    bool greedy = false;
+};
+
+// logits (n_tokens, n_vocab) -> one sampled token id per row in `out`.
+//
+// **`logits` AND `out` ARE DEVICE POINTERS.**  This is a CUDA kernel launch, not a host function, and nothing
+// in the parameter names or the types says so - `const float* logits` reads exactly like a host buffer.
+// Measured: passing host memory for `logits` faults inside the kernel with an ILLEGAL MEMORY ACCESS that is
+// reported by whatever synchronising call happens NEXT, which will be somewhere else entirely and will name a
+// buffer that has nothing to do with it.  A sticky async fault does not know where it came from.
+//
+// `history` is (n_tokens, history_len) int32 - ONE ROW PER TOKEN ROW, at a stride of `history_len` - the most
+// recent tokens that row's pick follows, with any unused slots set to -1; only the last `p.penalty_last_n` of
+// each row are counted, and ids outside [0, n_vocab) are ignored.  Pass nullptr and 0 when no penalties apply.
+// A verify window's rows need DIFFERENT histories: row t follows the window's drafts 1..t (`penalty_rows`).
+void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
+                   const SamplerParams& p, int* out, void* stream);
+
+// The penalty-history rows of a verify window, on the host: row t of `out` (T rows of `h` slots) is the last `h`
+// tokens of `tail[0..n_tail)` followed by `window[0..t]`, most recent LAST, -1 in the unused front slots.
+// `tail` is what the state consumed before the window, `window[0]` the fed-back token and `window[1..]` the
+// drafts: row t is exactly the history plain decode counts when it picks the token after `window[t]`, so drafting
+// cannot change which tokens are penalised.  Row 0 alone is the single row the engine staged before 0.1.19.
+inline void penalty_rows(const int32_t* tail, int64_t n_tail, const int32_t* window, int T, int h, int32_t* out) {
+    for (int t = 0; t < T; ++t) {
+        int32_t* row = out + (size_t) t * (size_t) h;
+        const int64_t avail = n_tail + t + 1;                      // tail + window[0..t]
+        const int take = (int) std::min<int64_t>(h, avail);
+        std::fill(row, row + (h - take), -1);
+        for (int j = 0; j < take; ++j) {
+            const int64_t i = avail - take + j;                     // index into (tail, window)
+            row[h - take + j] = i < n_tail ? tail[i] : window[i - n_tail];
+        }
+    }
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/sycl_queue.hpp b/sycl/include/strata/sycl_queue.hpp
new file mode 100644
index 00000000000..6df9898a8a5
--- /dev/null
+++ b/sycl/include/strata/sycl_queue.hpp
@@ -0,0 +1,14 @@
+// include/strata/sycl_queue.hpp - the SYCL port's one addition to the engine's API surface.
+//
+// Every launcher takes `void* stream`, a cudaStream_t where null means the default stream. dpct migrates the
+// cast to `(dpct::queue_ptr) stream` and dereferences it, so a null stream is a null sycl::queue* and a crash.
+// q_of() is that cast with CUDA's null-stream meaning restored: the default in-order queue.
+#pragma once
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+
+namespace strata {
+inline sycl::queue* q_of(const void* stream) {
+    return stream ? (sycl::queue*) stream : &dpct::get_in_order_queue();
+}
+}  // namespace strata
diff --git a/sycl/src/core/concurrent_main.cpp b/sycl/src/core/concurrent_main.cpp
new file mode 100644
index 00000000000..845615e545f
--- /dev/null
+++ b/sycl/src/core/concurrent_main.cpp
@@ -0,0 +1,272 @@
+// src/core/concurrent_main.cpp - do the CPU expert path and the GPU stream path actually run at once?
+//
+// L9 concluded that the two miss paths are INDEPENDENT RESOURCES - 42.55 GB/s of DRAM bandwidth for the CPU
+// expert kernel and 28.9 GB/s of PCIe for the stream - and that running them together would cover a token's
+// 552.7 MB of misses in 7.74 ms, which is what puts 100 tps inside reach on this Gen4 machine.
+//
+// THAT CLAIM HAS A HOLE.  An H2D copy from PINNED host memory READS HOST DRAM to do it, so the bus path is not
+// free of the resource the CPU path is bound by.  If the two contend, the combined rate is not 42.55 + 28.9 and
+// the 129 tok/s figure is optimistic; if they overlap cleanly, it stands.  This measures it three ways in one
+// process - CPU alone, GPU alone, both - because comparing two separately-measured rates is exactly the
+// inference that has been wrong twice already in this ledger (L2's dependency chain, L8's bus-only ceiling).
+//
+// The CPU side is a READ LOOP over the same pinned arena rather than the real VNNI kernel, and that is
+// deliberate: the question is whether the two paths contend for DRAM BANDWIDTH, and a read loop is a pure
+// measurement of that demand, with no compute that could mask it.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/pinned.hpp"
+#include "strata/kernels/s_gemv.hpp"
+
+#include <atomic>
+#include <chrono>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <fstream>
+#include <string>
+#include <thread>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// Volatile sink so the read loop cannot be optimised away; summed across threads and printed, so a compiler
+// that removed the loads would produce a suspiciously round zero rather than a plausible number.
+std::atomic<uint64_t> g_sink{0};
+
+struct Run {
+    double seconds = 0;
+    double cpu_gb = 0;      // GB/s read by the CPU threads
+    double gpu_experts = 0; // experts streamed and computed by the GPU
+};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    std::string path;
+    // 4096 planes = 2 GiB, which is 64x the 32 MB L3 on this CPU.  At 0.1 GiB the read loop measured 206 GB/s -
+    // that is CACHE bandwidth, not DRAM, and it would have answered the contention question with a number about
+    // a different resource entirely.
+    int experts = 4096;
+    int cpu_threads = 6;
+    int gpu_roles = 256;
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        auto val = [&]() -> const char* {
+            if (i + 1 >= argc) { std::fprintf(stderr, "%s needs a value\n", a.c_str()); std::exit(2); }
+            return argv[++i];
+        };
+        if (a == "--file") path = val();
+        else if (a == "--experts") experts = std::atoi(val());
+        else if (a == "--cpu-threads") cpu_threads = std::atoi(val());
+        else if (a == "--gpu-roles") gpu_roles = std::atoi(val());
+        else {
+            std::fprintf(stderr, "usage: strata-concurrent --file experts.bin [--experts N] "
+                                 "[--cpu-threads N] [--gpu-roles N]\n");
+            return 2;
+        }
+    }
+    if (path.empty()) { std::fprintf(stderr, "--file is required\n"); return 2; }
+
+    const long long n_in = 2560, n_out = 640;
+    const uint64_t role_codes = (uint64_t) n_out * n_in / 4;
+    const uint64_t plane_bytes = role_codes;      // the CPU loop reads the same planes
+
+    strata::core::PinnedArena arena((uint64_t) experts * role_codes);
+    if (!arena.valid()) { std::fprintf(stderr, "arena allocation failed\n"); return 1; }
+    {
+        std::ifstream f(path, std::ios::binary);
+        if (!f) { std::fprintf(stderr, "cannot open %s\n", path.c_str()); return 1; }
+        for (int i = 0; i < experts; ++i) {
+            f.seekg((std::streamoff) i * 1382400);
+            f.read((char*) arena.data() + (uint64_t) i * role_codes, (std::streamsize) role_codes);
+            if ((uint64_t) f.gcount() != role_codes) { std::fprintf(stderr, "short read\n"); return 1; }
+        }
+    }
+    std::printf("arena %.2f GiB pinned; %d CPU threads; %d GPU roles\n",
+                (double) arena.capacity / (1024.0 * 1024 * 1024), cpu_threads, gpu_roles);
+
+    uint8_t* d_codes = nullptr;
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               role_codes, dpct::get_in_order_queue())),
+          "cudaMalloc codes");
+    uint16_t* d_x = nullptr;
+    float *d_scales = nullptr, *d_y = nullptr;
+    check(DPCT_CHECK_ERROR(
+              d_x = (uint16_t *)sycl::malloc_device(
+                  n_in * sizeof(uint16_t), dpct::get_in_order_queue())),
+          "cudaMalloc x");
+    check(DPCT_CHECK_ERROR(d_scales = (float *)sycl::malloc_device(
+                               (size_t)n_out * (n_in / 64) * sizeof(float),
+                               dpct::get_in_order_queue())),
+          "cudaMalloc scales");
+    check(DPCT_CHECK_ERROR(
+              d_y = (float *)sycl::malloc_device(n_out * sizeof(float),
+                                                 dpct::get_in_order_queue())),
+          "cudaMalloc y");
+    std::vector<uint16_t> hx((size_t) n_in, 0x3C00);
+    std::vector<float> hs((size_t) n_out * (size_t) (n_in / 64), 0.001f);
+    /*
+    DPCT1114:922: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+          "copy x");
+    /*
+    DPCT1114:923: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, hs.data(), hs.size() * sizeof(float))),
+          "copy scales");
+    dpct::queue_ptr s_copy{}, s_comp{};
+    check(DPCT_CHECK_ERROR(s_copy =
+                               dpct::get_current_device().create_queue(true)),
+          "stream copy");
+    check(DPCT_CHECK_ERROR(s_comp =
+                               dpct::get_current_device().create_queue(true)),
+          "stream compute");
+    const strata::kernels::SForm form{2, -1, 64, strata::kernels::Codebook::Affine, false};
+
+    // The CPU loop: read the whole arena, Nthreads ways, and sum bytes so nothing is elided.
+    auto cpu_work = [&](std::atomic<bool>& stop, std::atomic<uint64_t>& bytes) {
+        uint64_t acc = 0, n = 0;
+        const uint8_t* p = arena.data();
+        while (!stop.load(std::memory_order_relaxed)) {
+            // touch one byte per 64 - a stride that defeats prefetch into a pure streaming read
+            for (uint64_t i = 0; i < plane_bytes * (uint64_t) experts; i += 64) acc += p[i];
+            n += plane_bytes * (uint64_t) experts;
+        }
+        bytes.fetch_add(n);
+        g_sink.fetch_add(acc);
+    };
+
+    // The GPU loop: stream each role plane on the copy stream while computing on the compute stream.
+    auto gpu_work = [&](int roles) {
+        try {
+    dpct::event_ptr ev[2];
+        for (int b = 0; b < 2; ++b)
+            check(DPCT_CHECK_ERROR(ev[b] = new sycl::event()), "event");
+        uint8_t* buf[2] = {d_codes, d_codes};      // one buffer is enough: the timing is what is measured
+        /*
+        DPCT1124:924: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        check(
+            DPCT_CHECK_ERROR(s_copy->memcpy(buf[0], arena.data(), role_codes)),
+            "prologue");
+        /*
+        DPCT1024:925: The original code returned the error code that was further
+        consumed by the program logic. This original code was replaced with 0.
+        You may need to rewrite the program logic consuming the error code.
+        */
+        check(DPCT_CHECK_ERROR(dpct::sync_barrier(ev[0], s_copy)),
+              "prologue event");
+        for (int i = 0; i < roles; ++i) {
+            const int cur = i & 1, nxt = (i + 1) & 1;
+            if (i + 1 < roles) {
+                /*
+                DPCT1124:926: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                check(DPCT_CHECK_ERROR(s_copy->memcpy(
+                          buf[nxt],
+                          arena.data() +
+                              (uint64_t)((i + 1) % experts) * role_codes,
+                          role_codes)),
+                      "copy");
+                /*
+                DPCT1024:927: The original code returned the error code that was
+                further consumed by the program logic. This original code was
+                replaced with 0. You may need to rewrite the program logic
+                consuming the error code.
+                */
+                check(DPCT_CHECK_ERROR(dpct::sync_barrier(ev[nxt], s_copy)),
+                      "event");
+            }
+            check(
+                DPCT_CHECK_ERROR(s_comp->ext_oneapi_submit_barrier({*ev[cur]})),
+                "wait");
+            strata::kernels::s_gemv_split_async(d_x, buf[cur], d_scales, nullptr, d_y, n_in, n_out, form, 32,
+                                                (void*) s_comp);
+        }
+        check(DPCT_CHECK_ERROR(s_comp->wait()), "sync comp");
+        check(DPCT_CHECK_ERROR(s_copy->wait()), "sync copy");
+        for (int b = 0; b < 2; ++b) dpct::destroy_event(ev[b]);
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+
+    auto run = [&](bool do_cpu, bool do_gpu, const char *name) {
+        try {
+    std::atomic<bool> stop{false};
+        std::atomic<uint64_t> bytes{0};
+        std::vector<std::thread> cpu;
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait()), "pre");
+        const auto t0 = std::chrono::steady_clock::now();
+        if (do_cpu) for (int t = 0; t < cpu_threads; ++t) cpu.emplace_back(cpu_work, std::ref(stop), std::ref(bytes));
+        if (do_gpu) {
+            gpu_work(gpu_roles);
+        } else {
+            // CPU-only needs a REAL window.  The first version let t0..t1 span nothing when there was no GPU
+            // work, so the threads were stopped immediately and the run reported 0.000 s and 0.00 GB/s.
+            std::this_thread::sleep_for(std::chrono::milliseconds(3000));
+        }
+        const auto t1 = std::chrono::steady_clock::now();
+        stop = true;
+        for (auto& t : cpu) t.join();
+        Run r;
+        r.seconds = std::chrono::duration<double>(t1 - t0).count();
+        r.cpu_gb = (double) bytes.load() / 1e9 / r.seconds;
+        r.gpu_experts = do_gpu ? (double) gpu_roles / r.seconds : 0.0;
+        std::printf("  %-18s %7.3f s   CPU read %6.2f GB/s   GPU %7.1f roles/s\n", name, r.seconds, r.cpu_gb,
+                    r.gpu_experts);
+        return r;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+
+    std::printf("\n  mode                     wall   CPU read          GPU\n");
+    const Run cpu_only = run(true, false, "CPU only");
+    const Run gpu_only = run(false, true, "GPU only");
+    const Run both = run(true, true, "BOTH");
+
+    std::printf("\n  independence check (1.00 = perfectly shared, 0.00 = fully independent):\n");
+    const double cpu_interference = cpu_only.cpu_gb > 0 ? 1.0 - both.cpu_gb / cpu_only.cpu_gb : 0.0;
+    const double gpu_interference = gpu_only.gpu_experts > 0 ? 1.0 - both.gpu_experts / gpu_only.gpu_experts : 0.0;
+    std::printf("    CPU throughput lost when the GPU also runs : %5.1f%%\n", cpu_interference * 100);
+    std::printf("    GPU throughput lost when the CPU also runs : %5.1f%%\n", gpu_interference * 100);
+    std::printf("    combined vs the sum of the parts           : CPU %6.2f + GPU-equivalent vs %6.2f measured\n",
+                cpu_only.cpu_gb, both.cpu_gb);
+    std::printf("\n  NOTE: the CPU side is a READ LOOP, not the VNNI kernel - it measures DRAM DEMAND, which is the\n"
+                "        resource the question is about.  L9's 129 tok/s assumes these two do not contend.\n");
+
+    sycl::free(d_codes, dpct::get_in_order_queue());
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+    dpct::get_current_device().destroy_queue(s_copy);
+    dpct::get_current_device().destroy_queue(s_comp);
+    return 0;
+}
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
new file mode 100644
index 00000000000..ce679dd6c08
--- /dev/null
+++ b/sycl/src/core/device.dp.cpp
@@ -0,0 +1,201 @@
+// src/core/device.cu - P2.S1: the CUDA side of the runtime core.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/device.hpp"
+
+#include <cstdio>
+#include <cstring>
+
+namespace strata::core {
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+    /*
+    DPCT1000:1125: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:1126: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:1124: The statement could not be removed.
+        */
+        throw CudaError(
+            std::string(what) + ": " + dpct::get_error_string_dummy(e), (int)e);
+    }
+}
+
+// A NaN pattern, not zero.  Zeros read from uninitialised memory are indistinguishable from real zeros in a
+// dequantized weight or a masked attention score, which is exactly the kind of wrong-but-plausible value the
+// Phase 1 harnesses kept catching.
+__dpct_inline__ void poison_kernel(float *p, uint64_t n_floats) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const uint64_t i =
+        (uint64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n_floats) p[i] = sycl::bit_cast<float>(0x7fc00000);
+}
+
+}  // namespace
+
+DeviceInfo device_info(int ordinal) {
+    int count = 0;
+    check(DPCT_CHECK_ERROR(count = dpct::device_count()), "cudaGetDeviceCount");
+    if (count == 0) {
+        throw CudaError("no CUDA device is present; Strata needs an NVIDIA GPU of compute capability 8.0 or newer", -1);
+    }
+    if (ordinal < 0 || ordinal >= count) {
+        throw CudaError("device ordinal " + std::to_string(ordinal) + " is out of range (have " +
+                            std::to_string(count) + ")",
+                        -1);
+    }
+    DeviceInfo d;
+    d.ordinal = ordinal;
+    /*
+    DPCT1093:1127: The "ordinal" device may be not the one intended for use.
+    Adjust the selected device if needed.
+    */
+    check(DPCT_CHECK_ERROR(dpct::select_device(ordinal)), "cudaSetDevice");
+
+    dpct::device_info p{};
+    check(DPCT_CHECK_ERROR(dpct::get_device(ordinal).get_device_info(p)),
+          "cudaGetDeviceProperties");
+    d.name = p.get_name();
+    /*
+    DPCT1005:1128: The SYCL device version is different from CUDA Compute
+    Compatibility. You may need to rewrite this code.
+    */
+    d.cc_major = p.get_major_version();
+    /*
+    DPCT1005:1129: The SYCL device version is different from CUDA Compute
+    Compatibility. You may need to rewrite this code.
+    */
+    d.cc_minor = p.get_minor_version();
+    d.multi_processor_count = p.get_max_compute_units();
+
+    size_t free_b = 0, total_b = 0;
+    /*
+    DPCT1106:1130: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    check(DPCT_CHECK_ERROR(
+              dpct::get_current_device().get_memory_info(free_b, total_b)),
+          "cudaMemGetInfo");
+    d.free_bytes = free_b;
+    d.total_bytes = total_b;
+
+    /*
+    DPCT1043:1131: The version-related API is different in SYCL. An initial code
+    was generated, but you need to adjust it.
+    */
+    check(DPCT_CHECK_ERROR(d.driver_version = dpct::get_major_version(
+                               dpct::get_current_device())),
+          "cudaDriverGetVersion");
+    /*
+    DPCT1043:1132: The version-related API is different in SYCL. An initial code
+    was generated, but you need to adjust it.
+    */
+    check(DPCT_CHECK_ERROR(d.runtime_version = dpct::get_major_version(
+                               dpct::get_current_device())),
+          "cudaRuntimeGetVersion");
+
+    // The kernels need sm_80 or newer (tf32 mma in the attention scorer, bf16 math) - the same floor the
+    // arch guard in CMakeLists enforces at build time (RTX 30 / 40 / 50).  Anything older is caught here,
+    // because a binary can be carried to a machine with an older card and would otherwise silently take
+    // whatever path the driver chose.  Pre-Blackwell is untested by the author; trust, then verify.
+    if (d.cc_major < 8) {
+        throw CudaError("device " + d.name + " reports compute capability " + std::to_string(d.cc_major) +
+                            "." + std::to_string(d.cc_minor) +
+                            "; Strata needs an NVIDIA GPU of compute capability 8.0 or newer (RTX 30 / 40 / 50)",
+                        -1);
+    }
+    return d;
+}
+
+DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
+    : capacity_(bytes), ordinal_(ordinal), poison_(poison) {
+    if (bytes == 0) throw CudaError("DeviceArena of 0 bytes", -1);
+    /*
+    DPCT1093:1133: The "ordinal" device may be not the one intended for use.
+    Adjust the selected device if needed.
+    */
+    check(DPCT_CHECK_ERROR(dpct::select_device(ordinal)), "cudaSetDevice");
+    // One allocation for the whole region.  cudaMalloc of a large block is the thing that can fail late, so it
+    // happens once, here, before anything depends on it.
+    check(DPCT_CHECK_ERROR(base_ = (void *)sycl::malloc_device(
+                               (size_t)bytes, dpct::get_in_order_queue())),
+          "cudaMalloc");
+    if (poison_) {
+        const int threads = 256;
+        const uint64_t n = bytes / sizeof(float);
+        const uint64_t blocks = (n + threads - 1) / threads;
+        // gridDim.x is 32-bit, so a large region needs a loop.  12 GB of floats is 3e9 elements = 1.2e7
+        // blocks, which fits, but the loop keeps it correct for any size rather than for today's sizes.
+        const uint64_t max_blocks = 0x7FFFFFFFull;
+        for (uint64_t b = 0; b < blocks; b += max_blocks) {
+            const uint64_t chunk = (blocks - b < max_blocks) ? (blocks - b) : max_blocks;
+            {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                dpct::get_in_order_queue().submit([&](sycl::handler &cgh) {
+                    auto float_base__b_threads_ct0 =
+                        (float *)base_ + b * threads;
+                    auto n_b_threads_ct1 = n - b * threads;
+
+                    cgh.parallel_for<
+                        dpct_kernel_name<class poison_kernel_cca729>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, (unsigned)chunk) *
+                                              sycl::range(1, 1, threads),
+                                          sycl::range(1, 1, threads)),
+                        exp_props, [=](sycl::nd_item<3> item_ct1) {
+                            poison_kernel(float_base__b_threads_ct0,
+                                          n_b_threads_ct1);
+                        });
+                });
+            }
+            /*
+            DPCT1010:1134: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            check(0, "poison_kernel");
+        }
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_current_device().queues_wait_and_throw()),
+              "poison sync");
+    }
+}
+
+DeviceArena::~DeviceArena() {
+    if (base_) sycl::free(
+        base_,
+        dpct::get_in_order_queue()); // best effort: a destructor must not throw
+}
+
+void* DeviceArena::alloc(uint64_t bytes, uint64_t align) {
+    if (bytes == 0) return nullptr;
+    if (align == 0 || (align & (align - 1)) != 0) {
+        throw CudaError("DeviceArena::alloc alignment must be a power of two", -1);
+    }
+    const uint64_t start = (used_ + align - 1) & ~(align - 1);
+    if (start + bytes > capacity_) {
+        char msg[256];
+        std::snprintf(msg, sizeof(msg),
+                      "DeviceArena out of memory: asked for %llu B at offset %llu (align %llu) in a %llu B "
+                      "region - the plan from P1.S9 did not close",
+                      (unsigned long long) bytes, (unsigned long long) start, (unsigned long long) align,
+                      (unsigned long long) capacity_);
+        throw CudaError(msg, -1);
+    }
+    used_ = start + bytes;
+    return (char*) base_ + start;
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
new file mode 100644
index 00000000000..c6a4ca9f474
--- /dev/null
+++ b/sycl/src/core/expert_cache.cpp
@@ -0,0 +1,465 @@
+// src/core/expert_cache.cpp - R4's slot storage and residency table.  Read the header first.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/expert_cache.hpp"
+
+#include <cstdio>
+#include <utility>
+#include <cstring>
+
+namespace strata::core {
+
+bool read_expert_profile(const std::string& path, int64_t n_layers, int64_t n_expert,
+                         std::vector<std::pair<int32_t, int32_t>>& ranked, int64_t& slots, std::string& err) {
+    std::FILE* f = std::fopen(path.c_str(), "rb");
+    if (f == nullptr) {
+        err = "read_expert_profile: cannot open " + path;
+        return false;
+    }
+    char magic[4] = {0, 0, 0, 0};
+    uint32_t hdr[5] = {0, 0, 0, 0, 0};
+    if (std::fread(magic, 1, 4, f) != 4 || std::fread(hdr, 4, 5, f) != 5) {
+        std::fclose(f);
+        err = "read_expert_profile: " + path + " is too short to hold a header";
+        return false;
+    }
+    if (std::memcmp(magic, "STRP", 4) != 0) {
+        std::fclose(f);
+        err = "read_expert_profile: " + path + " does not start with STRP";
+        return false;
+    }
+    const uint32_t version = hdr[0], nl = hdr[1], ne = hdr[2], want = hdr[3], n_ranked = hdr[4];
+    if ((int64_t) nl != n_layers || (int64_t) ne != n_expert) {
+        std::fclose(f);
+        char buf[256];
+        std::snprintf(buf, sizeof buf,
+                      "read_expert_profile: %s is %ux%u but this model is %lldx%lld - it is a profile for a "
+                      "different artifact", path.c_str(), nl, ne, (long long) n_layers, (long long) n_expert);
+        err = buf;
+        return false;
+    }
+    if (n_ranked > want) {
+        std::fclose(f);
+        err = "read_expert_profile: the header claims more ranked pairs than slots";
+        return false;
+    }
+    ranked.assign(n_ranked, {0, 0});
+    std::vector<uint16_t> raw((size_t) n_ranked * 2);
+    if (n_ranked > 0 && std::fread(raw.data(), 2, (size_t) n_ranked * 2, f) != (size_t) n_ranked * 2) {
+        std::fclose(f);
+        err = "read_expert_profile: the ranked list is truncated";
+        return false;
+    }
+    std::fclose(f);
+    for (uint32_t i = 0; i < n_ranked; ++i) {
+        const int32_t l = (int32_t) raw[(size_t) i * 2], e = (int32_t) raw[(size_t) i * 2 + 1];
+        if (l < 0 || l >= n_layers || e < 0 || e >= n_expert) {
+            char buf[256];
+            std::snprintf(buf, sizeof buf, "read_expert_profile: pair %u is (layer %d, expert %d), out of range",
+                          i, l, e);
+            err = buf;
+            return false;
+        }
+        ranked[(size_t) i] = {l, e};
+    }
+    slots = (int64_t) want;
+    (void) version;   // a future format bumps it; the layout check above is what protects this reader today
+    return true;
+}
+
+ExpertCache::~ExpertCache() { close(); }
+
+bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
+                       int64_t blob_bytes, std::string &err) try {
+    close();
+    if (n_slots <= 0) {
+        err = "ExpertCache: n_slots must be positive";
+        return false;
+    }
+    if (n_layers <= 0 || n_expert <= 0 || blob_bytes <= 0) {
+        err = "ExpertCache: n_layers, n_expert and blob_bytes must all be positive";
+        return false;
+    }
+
+    const uint64_t want = (uint64_t) n_slots * (uint64_t) blob_bytes;
+
+    // ---- **THE ALLOCATION IS CHECKED AGAINST THE CARD, NOT AGAINST THE REQUEST.**
+    //
+    // `cudaMalloc` failing is the easy case. The one that matters is a machine where the weights already own
+    // most of VRAM: the cache then takes what is left and `slots()` would report the number ASKED FOR while
+    // `device_slot()` walks off the end. So the free-VRAM figure is read and compared BEFORE the allocation,
+    // and the two numbers are named in the refusal.
+    size_t free_b = 0, total_b = 0;
+    /*
+    DPCT1106:759: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    if (DPCT_CHECK_ERROR(
+            dpct::get_current_device().get_memory_info(free_b, total_b)) == 0) {
+        if ((uint64_t) free_b < want) {
+            char buf[320];
+            std::snprintf(buf, sizeof buf,
+                          "ExpertCache: %lld slots x %lld B = %.2f GiB, but only %.2f GiB of VRAM is free "
+                          "(%.2f GiB of %.2f GiB total). Lower --expert-cache.",
+                          (long long) n_slots, (long long) blob_bytes, (double) want / 1073741824.0,
+                          (double) free_b / 1073741824.0, (double) (total_b - free_b) / 1073741824.0,
+                          (double) total_b / 1073741824.0);
+            err = buf;
+            return false;
+        }
+    }
+
+    if (DPCT_CHECK_ERROR(base_ = (uint8_t *)sycl::malloc_device(
+                             (size_t)want, dpct::get_in_order_queue())) != 0) {
+        base_ = nullptr;
+        char buf[256];
+        std::snprintf(
+            buf, sizeof buf, "ExpertCache: cudaMalloc(%.2f GiB) failed: %s",
+            /*
+            DPCT1009:760: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1010:761: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            (double)want / 1073741824.0, dpct::get_error_string_dummy(0));
+        err = buf;
+        return false;
+    }
+    // Zeroed so a slot read before it is filled is a DETERMINISTIC wrong answer rather than whatever the
+    // allocator handed back.  A stale block of a previous process's memory would still sum to finite floats.
+    if (DPCT_CHECK_ERROR(
+            dpct::get_in_order_queue().memset(base_, 0, (size_t)want).wait()) !=
+        0) {
+        err = "ExpertCache: cudaMemset of the slot arena failed";
+        close();
+        return false;
+    }
+
+    residency_.assign((size_t) (n_layers * n_expert), kNotResident);
+    slots_ = n_slots;
+    n_layers_ = n_layers;
+    n_expert_ = n_expert;
+    blob_ = blob_bytes;
+    next_free_ = 0;
+    fills_ = 0;
+    admitted_ = 0;
+    // R4.2g: each layer starts at the bottom of its own range.  Built here rather than lazily so `admit`
+    // stays allocation-free on the token path.
+    layer_next_.assign((size_t) (n_layers > 0 ? n_layers : 0), 0);
+    for (int64_t l = 0; l < n_layers; ++l) {
+        int64_t lo = 0, hi = 0;
+        layer_slot_range(l, lo, hi);
+        layer_next_[(size_t) l] = (int32_t) lo;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::open_sized(const std::vector<int64_t>& slot_bytes, int64_t n_layers, int64_t n_expert,
+                             std::string& err) {
+    if (slot_bytes.empty()) { err = "ExpertCache: no slots"; return false; }
+    int64_t mx = 0;
+    std::vector<uint64_t> off(slot_bytes.size() + 1, 0);
+    for (size_t i = 0; i < slot_bytes.size(); ++i) {
+        // 256-byte aligned slots, so every blob starts where the kernels' vector loads expect it
+        off[i + 1] = off[i] + ((uint64_t) slot_bytes[i] + 255) / 256 * 256;
+        mx = slot_bytes[i] > mx ? slot_bytes[i] : mx;
+    }
+    // one allocation of the summed size, through the uniform path's checks: n "slots" of 1 byte
+    if (!open((int64_t) off.back(), n_layers, n_expert, 1, err)) return false;
+    slots_ = (int64_t) slot_bytes.size();
+    blob_ = mx;
+    off_ = std::move(off);
+    layer_next_.assign((size_t) (n_layers > 0 ? n_layers : 0), 0);
+    return true;
+}
+
+void ExpertCache::close() {
+    off_.clear();
+    if (base_ != nullptr) {
+        sycl::free(base_, dpct::get_in_order_queue());
+        base_ = nullptr;
+    }
+    residency_.clear();
+    slots_ = 0;
+    n_layers_ = 0;
+    n_expert_ = 0;
+    blob_ = 0;
+    next_free_ = 0;
+    fills_ = 0;
+    admitted_ = 0;
+    layer_next_.clear();
+}
+
+/// R4.2g.  Layer `l` owns `[l*q, (l+1)*q)` with `q = slots_ / n_layers_`; the LAST layer takes whatever is
+/// left over, so the ranges always cover `0..slots_` exactly and no slot is orphaned by the division.
+void ExpertCache::layer_slot_range(int64_t layer, int64_t& lo, int64_t& hi) const {
+    lo = 0;
+    hi = 0;
+    if (n_layers_ <= 0 || slots_ <= 0 || layer < 0 || layer >= n_layers_) return;
+    const int64_t q = slots_ / n_layers_;
+    lo = layer * q;
+    hi = (layer == n_layers_ - 1) ? slots_ : (layer + 1) * q;
+}
+
+int32_t ExpertCache::slot_of(int64_t layer, int64_t expert) const {
+    if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_) return kNotResident;
+    return residency_[(size_t) (layer * n_expert_ + expert)];
+}
+
+int32_t ExpertCache::admit(int64_t layer, int64_t expert) {
+    if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_) return kNotResident;
+    const size_t at = (size_t) (layer * n_expert_ + expert);
+    if (residency_[at] != kNotResident) return residency_[at];
+    // R4.2g: THE PER-LAYER PATH.  Same "no eviction" rule, but the ceiling is this layer's own range rather
+    // than one counter shared by all 48 - which is what confined the measured hit rate to 2.97%.
+    if (per_layer_) {
+        if (layer_next_.empty()) return kNotResident;
+        int64_t lo = 0, hi = 0;
+        layer_slot_range(layer, lo, hi);
+        if ((int64_t) layer_next_[(size_t) layer] >= hi) return kNotResident;   // this layer's quota is full
+        residency_[at] = layer_next_[(size_t) layer]++;
+        ++admitted_;
+        return residency_[at];
+    }
+    if (next_free_ >= slots_) return kNotResident;   // full: no eviction, deliberately - see the header
+    residency_[at] = (int32_t) next_free_;
+    return (int32_t) next_free_++;
+}
+
+uint8_t* ExpertCache::device_slot(int32_t slot) {
+    if (slot < 0 || slot >= slots_) return nullptr;
+    if (!off_.empty()) return base_ + off_[(size_t) slot];
+    return base_ + (size_t) slot * (size_t) blob_;
+}
+
+const uint8_t* ExpertCache::device_slot(int32_t slot) const {
+    if (slot < 0 || slot >= slots_) return nullptr;
+    if (!off_.empty()) return base_ + off_[(size_t) slot];
+    return base_ + (size_t) slot * (size_t) blob_;
+}
+
+bool ExpertCache::fill_slot(int32_t slot, const uint8_t *host_blob,
+                            void *stream, std::string &err, int64_t bytes) try {
+    const size_t n = (size_t) (bytes > 0 && bytes <= blob_ ? bytes : blob_);
+    uint8_t* dst = device_slot(slot);
+    if (dst == nullptr) {
+        err = "ExpertCache::fill_slot: slot " + std::to_string(slot) + " is outside 0.." +
+              std::to_string(slots_ - 1);
+        return false;
+    }
+    if (host_blob == nullptr) {
+        err = "ExpertCache::fill_slot: the host blob is null";
+        return false;
+    }
+    /*
+    DPCT1124:764: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(dst, host_blob, n));
+    /*
+    DPCT1000:763: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:765: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:762: The statement could not be removed.
+        */
+        err = std::string("ExpertCache::fill_slot: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
+    }
+    ++fills_;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::fill_slot_blocking(int32_t slot, const uint8_t *host_blob,
+                                     std::string &err, int64_t bytes) try {
+    const size_t n = (size_t) (bytes > 0 && bytes <= blob_ ? bytes : blob_);
+    uint8_t* dst = device_slot(slot);
+    if (dst == nullptr) {
+        err = "ExpertCache::fill_slot_blocking: slot outside the arena";
+        return false;
+    }
+    if (host_blob == nullptr) {
+        err = "ExpertCache::fill_slot_blocking: the host blob is null";
+        return false;
+    }
+    /*
+    DPCT1114:768: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n));
+    /*
+    DPCT1000:767: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:769: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:766: The statement could not be removed.
+        */
+        err = std::string("ExpertCache::fill_slot_blocking: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
+    }
+    ++fills_;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::fill_slot_queued(int32_t slot, const uint8_t *host_blob,
+                                   std::string &err, int64_t bytes) try {
+    const size_t n = (size_t) (bytes > 0 && bytes <= blob_ ? bytes : blob_);
+    uint8_t* dst = device_slot(slot);
+    if (dst == nullptr || host_blob == nullptr) {
+        err = dst == nullptr ? "ExpertCache::fill_slot_queued: slot outside the arena"
+                             : "ExpertCache::fill_slot_queued: the host blob is null";
+        return false;
+    }
+    /*
+    DPCT1124:772: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n));
+    /*
+    DPCT1000:771: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:773: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:770: The statement could not be removed.
+        */
+        err = std::string("ExpertCache::fill_slot_queued: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
+    }
+    ++fills_;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::sync_queued(std::string &err) try {
+    const dpct::err0 e = DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait());
+    /*
+    DPCT1000:775: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:776: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:774: The statement could not be removed.
+        */
+        err = std::string("ExpertCache::sync_queued: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::verify_slot(int32_t slot, const uint8_t *host_blob,
+                              std::string &err, int64_t bytes) try {
+    const int64_t nb = bytes > 0 && bytes <= blob_ ? bytes : blob_;
+    const uint8_t* src = device_slot(slot);
+    if (src == nullptr) {
+        err = "ExpertCache::verify_slot: slot outside the arena";
+        return false;
+    }
+    // `cudaMemcpy` and not `cudaMemcpyAsync`: this is a startup check, and a check that can be read before it
+    // has happened is not a check.  It also synchronises the fills queued before it, which is what makes the
+    // comparison meaningful.
+    std::vector<uint8_t> got((size_t) nb);
+    const dpct::err0 e = DPCT_CHECK_ERROR(
+        dpct::get_in_order_queue().memcpy(got.data(), src, (size_t)nb).wait());
+    /*
+    DPCT1000:778: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) {
+        /*
+        DPCT1009:779: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:777: The statement could not be removed.
+        */
+        err = std::string("ExpertCache::verify_slot: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
+    }
+    if (std::memcmp(got.data(), host_blob, (size_t) nb) != 0) {
+        size_t first = 0;
+        while (first < (size_t) nb && got[first] == host_blob[first]) ++first;
+        char buf[256];
+        std::snprintf(buf, sizeof buf,
+                      "ExpertCache::verify_slot: slot %d differs from the arena at byte %llu (of %lld)",
+                      (int) slot, (unsigned long long) first, (long long) blob_);
+        err = buf;
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
new file mode 100644
index 00000000000..8beed71d6a7
--- /dev/null
+++ b/sycl/src/core/expert_source.cpp
@@ -0,0 +1,830 @@
+// src/core/expert_source.cpp - the adapter.  See the header for the three clauses of the contract.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/expert_source.hpp"
+#include "strata/core/remote_experts.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+
+#include "strata/core/pinned.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+
+#include <algorithm>
+#include <atomic>
+#include <chrono>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <fstream>
+#include <thread>
+#include <vector>
+
+#if defined(_WIN32)
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#else
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#endif
+
+namespace strata::core {
+
+// ================================ THE FILE-BACKED SOURCE ================================
+
+FileExpertSource::~FileExpertSource() { close(); }
+
+bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64_t n_expert, std::string& err) {
+    close();
+    if (n_layers <= 0 || n_expert <= 0) { err = "FileExpertSource: the geometry is empty"; return false; }
+    n_expert_ = n_expert;
+    blobs_ = n_layers * n_expert;
+    const uint64_t want = (uint64_t) blobs_ * (uint64_t) strata::kernels::cpu::BLOB;
+    const std::string path = pack_dir + "/experts.bin";
+
+#if defined(_WIN32)
+    // UTF-8 -> UTF-16: the pack may live under a path with non-ASCII characters, and `CreateFileA` would
+    // silently mangle it into a file-not-found.
+    const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
+    std::vector<wchar_t> wpath((size_t) (wide > 0 ? wide : 1));
+    if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, wpath.data(), wide);
+    // **`FILE_FLAG_RANDOM_ACCESS` WAS HERE AND IT COST 14x.**
+    //
+    // The design depends on the OS page cache holding the whole 34 GB expert set, because this machine has
+    // 64 GB of DDR5 and `L9` measured the CPU path at 44.14 GB/s from DRAM.  `FILE_FLAG_RANDOM_ACCESS` tells
+    // the cache manager the opposite: it disables read-ahead AND it lets the manager drop the pages again
+    // quickly, on the assumption that a large randomly-accessed file will not be re-read.  Measured, on
+    // `strata generate --max-new 24`: **1.93 GB/s** - disk speed, 344 ms/token, and it never warmed up over 25
+    // tokens, because the pages were being evicted as fast as they were faulted in.
+    //
+    // The correct flag is NO flag.  The access pattern IS random (10 of 512 experts per layer, a different 10
+    // each layer), but every byte read is read again on the next token, so retention is the whole game.
+    HANDLE f = CreateFileW(wpath.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                           FILE_ATTRIBUTE_NORMAL, nullptr);
+    if (f == INVALID_HANDLE_VALUE) {
+        err = "FileExpertSource: cannot open " + path;
+        return false;
+    }
+    LARGE_INTEGER sz{};
+    if (!GetFileSizeEx(f, &sz)) {
+        CloseHandle(f);
+        err = "FileExpertSource: cannot size " + path;
+        return false;
+    }
+    if ((uint64_t) sz.QuadPart != want) {
+        char buf[400];
+        std::snprintf(buf, sizeof buf,
+                      "FileExpertSource: %s is %llu B but %lld layers x %lld experts x %d B is %llu B - this "
+                      "is not the pack this geometry came from",
+                      path.c_str(), (unsigned long long) sz.QuadPart, (long long) n_layers,
+                      (long long) n_expert, (int) strata::kernels::cpu::BLOB, (unsigned long long) want);
+        CloseHandle(f);
+        err = buf;
+        return false;
+    }
+    HANDLE m = CreateFileMappingW(f, nullptr, PAGE_READONLY, 0, 0, nullptr);
+    if (m == nullptr) {
+        CloseHandle(f);
+        err = "FileExpertSource: CreateFileMapping failed on " + path;
+        return false;
+    }
+    void* view = MapViewOfFile(m, FILE_MAP_READ, 0, 0, 0);
+    if (view == nullptr) {
+        CloseHandle(m);
+        CloseHandle(f);
+        err = "FileExpertSource: MapViewOfFile failed on " + path;
+        return false;
+    }
+    file_ = f;
+    mapping_ = m;
+    base_ = (const uint8_t*) view;
+#else
+    const int fd = ::open(path.c_str(), O_RDONLY);
+    if (fd < 0) { err = "FileExpertSource: cannot open " + path; return false; }
+    struct stat st{};
+    if (fstat(fd, &st) != 0) { ::close(fd); err = "FileExpertSource: cannot stat " + path; return false; }
+    if ((uint64_t) st.st_size != want) {
+        char buf[400];
+        std::snprintf(buf, sizeof buf,
+                      "FileExpertSource: %s is %llu B but %lld layers x %lld experts x %d B is %llu B - this "
+                      "is not the pack this geometry came from",
+                      path.c_str(), (unsigned long long) st.st_size, (long long) n_layers, (long long) n_expert,
+                      (int) strata::kernels::cpu::BLOB, (unsigned long long) want);
+        ::close(fd);
+        err = buf;
+        return false;
+    }
+    void* view = mmap(nullptr, (size_t) want, PROT_READ, MAP_SHARED, fd, 0);
+    if (view == MAP_FAILED) { ::close(fd); err = "FileExpertSource: mmap failed on " + path; return false; }
+    fd_ = fd;
+    base_ = (const uint8_t*) view;
+#endif
+    return true;
+}
+
+void FileExpertSource::close() {
+#if defined(_WIN32)
+    if (base_ != nullptr) UnmapViewOfFile((LPCVOID) base_);
+    if (mapping_ != nullptr) CloseHandle((HANDLE) mapping_);
+    if (file_ != nullptr) CloseHandle((HANDLE) file_);
+    mapping_ = nullptr;
+    file_ = nullptr;
+#else
+    if (base_ != nullptr) munmap((void*) base_, (size_t) blobs_ * (size_t) strata::kernels::cpu::BLOB);
+    if (fd_ >= 0) ::close(fd_);
+    fd_ = -1;
+#endif
+    base_ = nullptr;
+    blobs_ = 0;
+    reads_ = 0;
+}
+
+const uint8_t* FileExpertSource::blob(int64_t layer, int64_t expert) {
+    if (base_ == nullptr) return nullptr;
+    if (layer < 0 || expert < 0) return nullptr;
+    // **`expert >= n_expert_` IS CHECKED SEPARATELY, AND THE FLAT INDEX ALONE DOES NOT CATCH IT.**  The blob
+    // index is `layer * n_expert + expert`, so `blob(0, 512)` has flat index 512 - which is in range, and is
+    // `blob(1, 0)`.  A router id one past the end of a layer would then read the NEXT LAYER's first expert:
+    // finite, correctly sized, and wrong.  Layer and expert are separate axes and are validated as such.
+    if (expert >= n_expert_) return nullptr;
+    const int64_t i = layer * n_expert_ + expert;
+    if (i >= blobs_) return nullptr;
+    ++reads_;
+    return base_ + (size_t) i * strata::kernels::cpu::BLOB;
+}
+
+// ================================ THE ADAPTER ================================
+
+void expert_pool_dispatch(void* user, const float* x_f, const int32_t* ids, const float* weights, int64_t n_embd,
+                          int64_t k, float* out) {
+    (void) weights;   // clause 2: `moe_combine` applies it on the device.  Not an oversight.
+    ExpertDispatch& d = *(ExpertDispatch*) user;
+    if (d.failed) return;   // a previous layer already failed; do not make it worse
+
+    using namespace strata::kernels::cpu;
+    // Clause 3: the blob's internal offsets are compile-time constants, so a mismatched geometry does not
+    // produce a wrong answer - it produces a walk off the end of the blob into the next expert's bytes, which
+    // is finite and plausible.  Refuse, name the number, and let the driver report it.
+    if (n_embd != H) {
+        d.failed = true;
+        d.fail = "the expert kernel is compiled for a 2560-wide activation";
+        d.fail_layer = d.layers;
+        return;
+    }
+    if (expert_layout().native) {
+        // plan v0.3 P6: a native pack runs its experts in verify windows only (the driver guarantees it)
+        d.failed = true;
+        d.fail = "the single-token expert path does not take a native (IQ) pack";
+        d.fail_layer = d.layers;
+        return;
+    }
+    if (k > (int64_t) d.jobs.size()) d.jobs.resize((size_t) k);
+
+    d.src->begin_layer(d.layers, ids, k);
+
+    // Clause 1: rebuilt from `x_f` on EVERY call.  `x_f` is mapped pinned memory whose address never changes,
+    // so anything cached against it would be layer 0's activation reused 48 times.
+    act_quant_q8_1(x_f, H, d.act);
+
+    // ---- R4.2c: THE POOL'S HALF OF THE SPLIT.  **IT DOES NOT DECIDE ANYTHING - `Launch` ALREADY DID.**
+    //
+    // The decision has to be made on THIS layer's ids, and `Launch` is the only callback that runs before the
+    // pool while the ids are known (the doorbell publishes them when the ring fires).  So `expert_hit_run`
+    // decides, and this consumes `d.is_hit`.  The first version decided here instead, which meant `Launch`
+    // computed the PREVIOUS layer's experts into this layer's rows: C1 went from mean KL 9.69e-02 to 1.03e+00.
+    //
+    // `njobs` indexes the JOB ARRAY and `i` indexes the OUTPUT - they are the same only when nothing is a hit.
+    const bool graph_hits = d.host_res != nullptr;
+    const bool use_hits = graph_hits || (d.hits_ready() && d.decided);
+    int64_t njobs = 0;
+
+    if (d.remote_count > 0) {
+        int32_t kind[32];
+        if (k > 32) {
+            d.failed = true; d.fail = "remote experts: routing width exceeds 32"; return;
+        }
+        for (int64_t i = 0; i < k; ++i)
+            kind[i] = use_hits && ids[i] >= 0 && ids[i] < d.n_expert && (graph_hits
+                ? d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) ids[i]] >= 0
+                : d.is_hit[(size_t) i] != 0) ? 0 : -1;
+        static thread_local std::string remote_error;
+        for (int r = 0; r < d.remote_count; ++r)
+            if (!d.remote[r]->begin(d.layers, x_f, ids, 1, k, kind, d.host_res, remote_error)) {
+                d.failed = true; d.fail = remote_error.c_str(); d.fail_layer = d.layers; return;
+            }
+    }
+
+    for (int64_t i = 0; i < k; ++i) {
+        const int64_t e = ids[i];
+        if (e < 0 || e >= d.n_expert) {
+            d.failed = true;
+            d.fail = "a routed expert id is out of range";
+            d.fail_layer = d.layers;
+            d.fail_expert = e;
+            return;
+        }
+        const uint8_t* b = d.src->blob(d.layers, e);
+        if (b == nullptr) {
+            // The one failure the loop cannot see.  Leaving `out` at its previous contents would feed the NEXT
+            // layer a stale expert vector, which `moe_combine` would weight and add - the token would still be
+            // finite and would still be wrong, 48 layers deep.
+            d.failed = true;
+            d.fail = "the expert source could not produce a blob";
+            d.fail_layer = d.layers;
+            d.fail_expert = e;
+            ++d.missing;
+            return;
+        }
+        // A hit's row was zeroed by `Launch` and belongs to the GPU; the pool must not touch it.
+        if (use_hits && (graph_hits ? d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] >= 0
+                                    : d.is_hit[(size_t) i] != 0)) {
+            if (graph_hits) ++d.cache_hits;
+            // The GPU owns this row and `hit_out` is zeroed, so the CPU's contribution is zero - but
+            // `y_miss` is a REUSED pinned buffer, so the row must be written, not merely skipped.
+            std::memset(out + (size_t) i * (size_t) n_embd, 0, (size_t) n_embd * sizeof(float));
+            continue;
+        }
+        if (graph_hits) ++d.cache_refused;   // token graph: a miss (nothing is admitted during a token)
+
+        bool remote_owns = false;
+        for (int r = 0; r < d.remote_count; ++r) remote_owns |= d.remote[r]->owns(i);
+        if (remote_owns) {
+            std::memset(out + (size_t) i * (size_t) n_embd, 0, (size_t) n_embd * sizeof(float));
+            continue;
+        }
+
+        // `njobs` indexes the JOB ARRAY and `i` indexes the OUTPUT - they are the same only when nothing is a
+        // hit, and using one for the other is how a hit's row would get two experts summed into it.
+        ExpertJob& j = d.jobs[(size_t) njobs++];
+        j.blob = b;
+        j.act = &d.act;             // SHARED across the batch: one conversion serves all ten experts
+        j.out = out + (size_t) i * (size_t) n_embd;
+        j.weight = 1.0f;            // clause 2: a diagnostic field, NOT the router weight
+        j.slot = (int) i;
+    }
+
+    // Plan v0.3 P4: rows of every expert across all threads (bitwise the same as `run`).
+    if (d.split_rows) d.pool->run_split(d.jobs.data(), (int) njobs);
+    else d.pool->run(d.jobs.data(), (int) njobs);
+    if (d.remote_count > 0) {
+        static thread_local std::string remote_error;
+        for (int r = 0; r < d.remote_count; ++r)
+            if (!d.remote[r]->finish(out, remote_error)) {
+                d.failed = true; d.fail = remote_error.c_str(); d.fail_layer = d.layers; return;
+            }
+    }
+    ++d.layers;
+    d.experts += k;
+}
+
+void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k,
+                                float* out) {
+    using namespace strata::kernels::cpu;
+    if (d.failed) return;
+    if (n_tok < 1 || n_tok > MAXT) {
+        d.failed = true;
+        d.fail = "a verify window has more tokens than the multi-token expert kernel takes";
+        d.fail_layer = d.layers;
+        return;
+    }
+    if ((int64_t) d.act_multi.size() < n_tok) d.act_multi.resize((size_t) MAXT);
+    const ExpertLayout& lay = expert_layout();
+    const bool native = lay.native;
+    if (native && d.nact_multi.size() < (size_t) MAXT * kNativeActBytes) d.nact_multi.resize((size_t) MAXT * kNativeActBytes);
+    if (d.job_of.size() != (size_t) d.n_expert) d.job_of.assign((size_t) d.n_expert, (int16_t) -1);
+    if (d.jobs_multi.size() < (size_t) (n_tok * k)) d.jobs_multi.resize((size_t) (MAXT * k));
+    static const bool ptrace = std::getenv("STRATA_POOL_TRACE") != nullptr;
+    auto pt = [&](const char* what, long long a = -1) {
+        if (ptrace) { std::fprintf(stderr, "pool trace: layer %lld %s %lld\n", (long long) d.layers, what, a); std::fflush(stderr); }
+    };
+    const auto c0 = std::chrono::steady_clock::now();
+    pt("begin");
+    d.src->begin_layer(d.layers, ids, n_tok * k);
+    pt("begun");
+    if (!d.usage.empty())
+        for (int64_t i = 0; i < n_tok * k; ++i)
+            if (ids[i] >= 0 && ids[i] < d.n_expert) d.usage[(size_t) d.layers * (size_t) d.n_expert + (size_t) ids[i]] += 1.0f;
+    // ---- plan v0.3 P6: the GPU's share, decided and published FIRST so the GPU starts while the CPU works.
+    // Distinct experts in routing order; resident ones and the last pcie_num/256 of the missed ones go to the GPU.
+    const int64_t n = n_tok * k;
+    int32_t kind[128];                     // per entry: -1 CPU, 0 VRAM, 1 PCIe
+    if (d.plan != nullptr && n <= 128 && n <= d.plan->cap) {
+        int64_t distinct[128], first_of[128];
+        int nd = 0, nmiss = 0;
+        for (int64_t i = 0; i < n; ++i) {
+            first_of[i] = i;
+            for (int64_t j = 0; j < i; ++j)
+                if (ids[j] == ids[i]) { first_of[i] = first_of[j]; break; }
+            if (first_of[i] == i) {
+                distinct[nd++] = i;
+                const int32_t e = ids[i];
+                if (e >= 0 && e < d.n_expert && d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] < 0) ++nmiss;
+            }
+        }
+        const bool pcie_ok = d.pcie_num > 0 && d.src->device_alias(d.layers, 0) != nullptr;
+        const int m = pcie_ok ? (nmiss * d.pcie_num) >> 8 : 0;
+        int miss_rank = 0, groups = 0, entries = 0, fetches = 0;
+        GpuPlanSink& P = *d.plan;
+        const uint8_t* dma_src[64];
+        int64_t pcie_i0[64];
+        for (int q = 0; q < nd; ++q) {
+            const int64_t i0 = distinct[q];
+            const int32_t e = ids[i0];
+            int kd = -1;
+            unsigned long long ptr = 0;
+            if (e >= 0 && e < d.n_expert) {
+                const int32_t slot = d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e];
+                if (slot >= 0) {
+                    kd = 0;
+                    ptr = (unsigned long long) (d.cache_base + (d.cache_slot_off ? (size_t) d.cache_slot_off[slot]
+                                                                                 : (size_t) slot * (size_t) d.cache_blob));
+                } else {
+                    if (miss_rank >= nmiss - m && fetches < P.staging_cap && fetches < 64) {
+                        const uint8_t* src = d.src->blob(d.layers, e);
+                        if (src != nullptr && d.src->pinned(d.layers, e)) {
+                            kd = 1;
+                            dma_src[fetches] = src;
+                            pcie_i0[fetches] = i0;
+                            ++fetches;
+                        }
+                    }
+                    ++miss_rank;
+                }
+            }
+            for (int64_t i = i0; i < n; ++i)
+                if (first_of[i] == i0) kind[i] = kd;
+            if (kd != 0) continue;                 // the VRAM groups first; the PCIe groups below
+            P.ptr[groups] = ptr;
+            P.start[groups] = entries;
+            for (int64_t i = i0; i < n; ++i)
+                if (first_of[i] == i0) {
+                    P.dst[entries] = (int32_t) i;
+                    P.tok[entries] = (int32_t) (i / k);
+                    ++entries;
+                }
+            ++groups;
+        }
+        P.start[groups] = entries;
+        const uint64_t bb = lay.blob_bytes(d.layers);
+        for (int q = 0; q < fetches; ++q) {       // the PCIe groups: staging slot q, entries after the VRAM ones
+            const int64_t i0 = pcie_i0[q];
+            P.ptr2[q] = P.pcie_mode != 0 ? (unsigned long long) d.src->device_alias(d.layers, ids[i0])
+                                 : P.staging + (unsigned long long) q * (unsigned long long) bb;
+            P.start2[q] = entries;
+            for (int64_t i = i0; i < n; ++i)
+                if (first_of[i] == i0) {
+                    P.dst[entries] = (int32_t) i;
+                    P.tok[entries] = (int32_t) (i / k);
+                    ++entries;
+                }
+            ++d.pcie_experts;
+        }
+        P.start2[fetches] = entries;
+        P.counts[0] = groups;
+        P.counts[1] = entries;
+        P.counts[2] = fetches;
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        pt("publish", fetches);
+        if (P.publish) P.publish(P.ctx);
+        pt("fetch", fetches);
+        if (P.fetch) P.fetch(P.ctx, dma_src, P.pcie_mode != 0 ? 0 : fetches, (size_t) bb);   // the copy engine, beside the CPU's work
+    } else {
+        for (int64_t i = 0; i < n; ++i) {
+            const int32_t e = ids[i];
+            kind[i] = (e >= 0 && e < d.n_expert && d.host_res != nullptr &&
+                       d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] >= 0) ? 0 : -1;
+        }
+    }
+    if (d.remote_count > 0) {
+        static thread_local std::string remote_error;
+        for (int r = 0; r < d.remote_count; ++r) {
+            if (!d.remote[r]->begin(d.layers, x_f, ids, n_tok, k, kind, d.host_res, remote_error)) {
+                d.failed = true; d.fail = remote_error.c_str(); d.fail_layer = d.layers; return;
+            }
+            for (int64_t i = 0; i < n; ++i) if (d.remote[r]->owns(i)) kind[i] = 2;
+        }
+    }
+    const auto c1 = std::chrono::steady_clock::now();
+    if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
+        for (int64_t t = 0; t < n_tok; ++t) act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+    else if (native)
+        for (int64_t t = 0; t < n_tok; ++t)
+            native_quant_act(lay.fmt[(size_t) d.layers], x_f + (size_t) t * H, d.nact_multi.data() + (size_t) t * kNativeActBytes);
+    else
+        for (int64_t t = 0; t < n_tok; ++t) act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+    const auto c2 = std::chrono::steady_clock::now();
+    int njobs = 0;
+    for (int64_t t = 0; t < n_tok; ++t)
+        for (int64_t j = 0; j < k; ++j) {
+            const int64_t i = t * k + j;
+            const int64_t e = ids[i];
+            float* row = out + (size_t) i * H;
+            if (e < 0 || e >= d.n_expert) {
+                d.failed = true;
+                d.fail = "a routed expert id is out of range";
+                d.fail_layer = d.layers;
+                d.fail_expert = e;
+                return;
+            }
+            if (kind[i] >= 0) {             // CUDA0, PCIe, or a remote result staged into this row below
+                if (kind[i] == 0) ++d.cache_hits;
+                std::memset(row, 0, (size_t) H * sizeof(float));
+                continue;
+            }
+            ++d.cache_refused;
+            int16_t& jo = d.job_of[(size_t) e];
+            if (jo < 0) {
+                const uint8_t* b = d.src->blob(d.layers, e);
+                if (b == nullptr) {
+                    d.failed = true;
+                    d.fail = "the expert source could not produce a blob";
+                    d.fail_layer = d.layers;
+                    d.fail_expert = e;
+                    ++d.missing;
+                    return;
+                }
+                jo = (int16_t) njobs++;
+                ExpertJobMulti& nj = d.jobs_multi[(size_t) jo];
+                nj.blob = b;
+                nj.nt = 0;
+            }
+            ExpertJobMulti& jb = d.jobs_multi[(size_t) jo];
+            jb.act[jb.nt] = &d.act_multi[(size_t) t];
+            jb.nact[jb.nt] = native ? d.nact_multi.data() + (size_t) t * kNativeActBytes : nullptr;
+            jb.out[jb.nt] = row;
+            ++jb.nt;
+            ++d.multi_entries;
+        }
+    const auto c3 = std::chrono::steady_clock::now();
+    pt("run", njobs);
+    if (native) d.pool->run_split_multi_native(lay.fmt[(size_t) d.layers], d.jobs_multi.data(), njobs);
+    else d.pool->run_split_multi(d.jobs_multi.data(), njobs);
+    if (d.remote_count > 0) {
+        static thread_local std::string remote_error;
+        for (int r = 0; r < d.remote_count; ++r)
+            if (!d.remote[r]->finish(out, remote_error)) {
+                d.failed = true; d.fail = remote_error.c_str(); d.fail_layer = d.layers; return;
+            }
+    }
+    const auto c4 = std::chrono::steady_clock::now();
+    pt("ran");
+    auto ms = [](auto a, auto b) { return std::chrono::duration<double, std::milli>(b - a).count(); };
+    d.ms_plan += ms(c0, c1);
+    d.ms_actq += ms(c1, c2);
+    d.ms_jobs += ms(c2, c3);
+    d.ms_run += ms(c3, c4);
+    for (int64_t i = 0; i < n_tok * k; ++i) {
+        const int64_t e = ids[i];
+        if (e >= 0 && e < d.n_expert) d.job_of[(size_t) e] = -1;
+    }
+    d.multi_misses += njobs;
+    ++d.layers;
+    d.experts += n_tok * k;
+}
+
+void expert_hit_run(void *user, void *stream, HitPhase phase,
+                    const int32_t *ids, int64_t k) try {
+    ExpertDispatch& d = *(ExpertDispatch*) user;
+    if (d.failed) return;
+    dpct::queue_ptr cs = strata::q_of(stream);
+
+    if (phase == HitPhase::Launch) {
+        d.decided = false;
+        d.hit_pending = false;
+        if (!d.hits_ready() || ids == nullptr || k <= 0) return;
+        if ((int64_t) d.is_hit.size() < k) d.is_hit.resize((size_t) k);
+
+        // ================================ THE DECISION, ONCE, ON THIS LAYER'S IDS ================================
+        //
+        // Every routed expert is asked of the cache.  Resident -> the GPU computes it.  Not resident -> it is
+        // admitted and filled if there is room (which makes it a hit on THIS call, because the fill and the
+        // kernel are on one stream in that order), and otherwise it stays a miss for the CPU.
+        d.n_hits = 0;
+        for (int64_t i = 0; i < k; ++i) {
+            const int64_t e = ids[i];
+            d.is_hit[(size_t) i] = 0;
+            if (e < 0 || e >= d.n_expert) continue;   // out of range: the pool refuses it, with a message
+            int32_t slot = d.cache->slot_of(d.layers, e);
+            if (slot == kNotResident) {
+                const int32_t cand = d.cache->admit(d.layers, e);
+                if (cand == kNotResident) {
+                    ++d.cache_refused;
+                    continue;
+                }
+                // `blob` is asked ONLY for an expert about to be filled, so the source's read counter stays a
+                // count of distinct experts moved rather than of looks.
+                const uint8_t* b = d.src->blob(d.layers, e);
+                std::string ferr;
+                if (b == nullptr || !d.cache->fill_slot(cand, b, cs, ferr, (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(d.layers))) {
+                    d.failed = true;
+                    d.fail = "the expert cache could not fill a slot";
+                    d.fail_layer = d.layers;
+                    d.fail_expert = e;
+                    return;
+                }
+                ++d.cache_admitted;
+                slot = cand;
+            } else {
+                ++d.cache_hits;
+            }
+            d.is_hit[(size_t) i] = 1;
+            d.h_slot[(size_t) d.n_hits] = slot;
+            d.h_dst[(size_t) d.n_hits] = (int32_t) i;
+            ++d.n_hits;
+        }
+        d.decided = true;
+        if (d.n_hits <= 0) return;   // nothing resident yet: no GPU work, and nothing for `Combine` to add
+
+        const size_t list_bytes = (size_t) d.n_hits * sizeof(int32_t);
+        // `hit_out` is ZEROED rather than overwritten: the kernel writes only the rows this layer's hits own,
+        // so a row that was a hit last layer and a miss this one would still hold last layer's expert and
+        // `add_inplace` would sum it in.  Finite, plausible, wrong.
+        if (DPCT_CHECK_ERROR(cs->memset(
+                d.hit_out, 0, (size_t)d.parts_elems * sizeof(float))) != 0 ||
+            /*
+            DPCT1124:653: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(
+                cs->memcpy(d.d_slot, d.h_slot.data(), list_bytes)) != 0 ||
+            /*
+            DPCT1124:654: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(cs->memcpy(d.d_dst, d.h_dst.data(), list_bytes)) !=
+                0) {
+            d.hit_fail = "the hit list could not be staged";
+            d.failed = true;
+            d.fail = d.hit_fail;
+            return;
+        }
+        // The activation is quantized HERE rather than reused from `s.moe.x_q8_0`, which `post[l-1]` wrote from
+        // the PREVIOUS layer's `mixed`.  `pre[l]` has since overwritten `mixed`, so that buffer is a layer stale
+        // - and a stale activation produces a perfectly finite expert for the wrong input.
+        // **R4.2h: THE SCALED QUANTIZER, SO A HIT REPRODUCES A MISS.**  The CPU pool quantizes this same
+        // activation with `act_quant_q8_1` and multiplies by the fp32 `ActQ::scale`; `quantize_q8_0` writes
+        // an fp16 `d` instead, and `bench/micro/act_quant_parity.cu` measured **80 of 80 chunks differing by
+        // up to 4.761e-04 relative**.  `quantize_q8_0_scaled` adopts the CPU's rule and scale, and the kernel
+        // takes the fp32 array.  Falling back to the old path would silently reintroduce the divergence, so
+        // the scales are required here rather than optional.
+        if (d.x_q8_0_hit_scale == nullptr) {
+            d.failed = true;
+            d.fail = "the hit path has no fp32 activation scales (R4.2h)";
+            return;
+        }
+        strata::kernels::quantize_q8_0_scaled(d.mixed, d.x_q8_0_hit, d.x_q8_0_hit_scale, strata::kernels::cpu::H,
+                                              cs);
+        if (d.hit_cpu_order)
+            strata::kernels::moe_hit_grouped_s2_cpu_order(d.cache_base, d.d_slot, d.d_dst, d.n_hits,
+                d.cache_blob, d.x_q8_0_hit, d.hit_scratch, d.hit_out, cs, d.x_q8_0_hit_scale);
+        else
+            strata::kernels::moe_hit_grouped_s2(d.cache_base, d.d_slot, d.d_dst, d.n_hits, d.cache_blob,
+                d.x_q8_0_hit, d.hit_scratch, d.hit_out, cs, d.x_q8_0_hit_scale);
+        d.hit_pending = true;
+        if (d.hit_done != nullptr)
+            dpct::sync_barrier((dpct::event_ptr)d.hit_done, cs);
+        // The A/B arm: ONE driver entry here, and nothing else changes.  If the work was waiting for the host
+        // to enter the driver, this is what lets it start while the pool runs.
+        if (d.hit_poke && d.hit_done != nullptr)(void)
+            dpct::sycl_event_query((dpct::event_ptr)d.hit_done);
+        return;
+    }
+
+    // Combine: `parts += hit_out`, stream-ordered after the misses were copied into `parts`.
+    if (!d.hit_pending) return;
+    d.hit_pending = false;
+    // Did the GPU get the hit work done while the CPU was in the pool?  This query is itself a driver entry,
+    // so it is the LAST chance to observe a late start: a NOT-READY here means the work had not finished by the
+    // time the pool returned, and with no poke in front of it that can only be because it began after.
+    if (d.hit_done != nullptr) {
+        if (((dpct::event_ptr)d.hit_done)
+                ->get_info<sycl::info::event::command_execution_status>() ==
+            sycl::info::event_command_status::complete)++ d.hit_ready;
+        else ++d.hit_late;
+    }
+    strata::kernels::add_inplace(d.parts_out, d.hit_out, d.parts_elems, cs);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// ================================ THE RESIDENT ARENA (R2.1) ================================
+
+// Plan v0.3 P6: the arena from the model's shard 1.  Each layer's gate, up and down tensors hold the 512 experts
+// one after another; they are read in chunks and each expert's slice lands at its place in the blob
+// [gate rows | up rows | down rows] - the layout tools/iq_pack.py would have written to experts.bin.
+LoadStats load_experts_gguf(const std::string& gguf, uint8_t* dst, const strata::kernels::cpu::ExpertLayout& lay,
+                            int threads) {
+    LoadStats st;
+    st.layers = (uint64_t) lay.n_layers;
+    const auto t0 = std::chrono::steady_clock::now();
+    std::atomic<int64_t> next{0};
+    std::atomic<bool> bad{false};
+    // a layer's experts may sit in another shard of the model (native_experts.txt v3): a name beside `gguf`
+    const size_t cut = gguf.find_last_of("/\\");
+    const std::string dir = cut == std::string::npos ? std::string() : gguf.substr(0, cut + 1);
+    auto file_of = [&](int64_t l) -> std::string {
+        if (lay.gguf_file.empty() || lay.gguf_file[(size_t) l].empty()) return gguf;
+        return dir + lay.gguf_file[(size_t) l];
+    };
+    auto worker = [&]() {
+        std::ifstream f;
+        std::string open_name;
+        std::vector<uint8_t> buf;
+        for (;;) {
+            const int64_t l = next.fetch_add(1);
+            if (l >= lay.n_layers || bad) break;
+            const std::string name = file_of(l);
+            if (name != open_name) {
+                f.close();
+                f.clear();
+                f.open(name, std::ios::binary);
+                if (!f) { bad = true; return; }
+                open_name = name;
+            }
+            const auto& fm = lay.fmt[(size_t) l];
+            const uint64_t blob = lay.bytes[(size_t) l];
+            const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
+            const uint64_t at[3] = {0, fm.up_off, fm.down_off};
+            for (int r = 0; r < 3; ++r) {
+                const uint64_t src = lay.gguf_off[(size_t) (3 * l + r)];
+                const uint64_t total = per[r] * (uint64_t) lay.n_expert;
+                const uint64_t chunk = per[r] * 16;           // 16 experts per read
+                buf.resize((size_t) chunk);
+                for (uint64_t done = 0; done < total; done += chunk) {
+                    const uint64_t n = std::min<uint64_t>(chunk, total - done);
+                    f.seekg((std::streamoff) (src + done));
+                    f.read((char*) buf.data(), (std::streamsize) n);
+                    if ((uint64_t) f.gcount() != n) { bad = true; return; }
+                    for (uint64_t k = 0; k < n / per[r]; ++k) {
+                        const uint64_t e = done / per[r] + k;
+                        std::memcpy(dst + lay.blob_offset(l, (int64_t) e) + at[r], buf.data() + k * per[r], (size_t) per[r]);
+                    }
+                }
+            }
+        }
+    };
+    std::vector<std::thread> pool;
+    for (int i = 1; i < threads; ++i) pool.emplace_back(worker);
+    worker();
+    for (auto& t : pool) t.join();
+    if (bad) {
+        st.seconds = -1.0;
+        st.ok = false;
+        st.error = "short read or unreadable shard while reading the experts from the GGUF";
+        return st;
+    }
+    st.bytes = lay.total;
+    st.seconds = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+    return st;
+}
+
+ArenaExpertSource::~ArenaExpertSource() { close(); }
+
+bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
+                             int64_t n_expert, int threads, std::string &err,
+                             uint64_t max_pinned_bytes) try {
+    close();
+    const std::string path = pack_dir + "/experts.bin";
+    // plan v0.3 P6: the layout (canonical, or a native pack's per-layer blobs) was loaded by the driver
+    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
+    if (lay.n_layers != n_layers || lay.n_expert != n_expert) {
+        err = "ArenaExpertSource: the expert layout was loaded for a different geometry";
+        return false;
+    }
+    const int64_t blob = (int64_t) lay.max_blob;
+    const uint64_t want = lay.total;
+
+    // plan v0.3 P6: no experts.bin in a native pack -> the experts come straight from the GGUF
+    const bool from_gguf = !std::ifstream(path, std::ios::binary) && lay.native && !lay.gguf_off.empty() && !gguf_.empty();
+    // SIZE CHECK BEFORE THE ALLOCATION, not after.  A wrong pack should name the two numbers rather than spend
+    // 34 GB and a minute of loading first.
+    if (!from_gguf) {
+        std::ifstream f(path, std::ios::binary | std::ios::ate);
+        if (!f) { err = "ArenaExpertSource: cannot open " + path; return false; }
+        const uint64_t got = (uint64_t) f.tellg();
+        if (got != want) {
+            char buf[400];
+            std::snprintf(buf, sizeof buf,
+                          "ArenaExpertSource: %s is %llu B but %lld layers x %lld experts (blobs up to %lld B) "
+                          "make %llu B - this is not the pack this geometry came from",
+                          path.c_str(), (unsigned long long) got, (long long) n_layers, (long long) n_expert,
+                          (long long) blob, (unsigned long long) want);
+            err = buf;
+            return false;
+        }
+    }
+
+    // one layer per registration slice, so no expert straddles two registrations.  The arena is one blob
+    // longer than the file: a copy of a whole VRAM slot (the largest blob) may then start at any expert.
+    std::vector<uint64_t> bounds, loff, lbytes;
+    for (int64_t l = 0; l < n_layers; ++l) {
+        bounds.push_back(lay.layer_offset(l));
+        loff.push_back(lay.layer_offset(l));
+        lbytes.push_back(lay.blob_bytes(l) * (uint64_t) n_expert);
+    }
+    bounds.push_back(want);
+    PinnedArena* a = new PinnedArena(want + (uint64_t) blob, bounds, max_pinned_bytes);
+    if (!a->valid()) {
+        delete a;
+        err = "ArenaExpertSource: the arena could not be reserved (" + std::to_string(want) + " B)";
+        return false;
+    }
+    const LoadStats st = from_gguf ? load_experts_gguf(gguf_, a->data(), lay, threads)
+                                   : load_experts_ranges(path, a->data(), loff, lbytes, threads, /*chunk=*/8u << 20);
+    if (!st.ok) {
+        delete a;
+        err = "ArenaExpertSource: the expert load was refused: " + (st.error.empty() ? std::string("unknown") : st.error);
+        return false;
+    }
+    if (st.bytes != want) {
+        delete a;
+        err = "ArenaExpertSource: the load read " + std::to_string(st.bytes) + " B of " + std::to_string(want);
+        return false;
+    }
+    arena_ = a;
+    base_ = a->data();
+    pinned_bytes_ = a->registered_bytes;
+    // plan v0.3 P6: device aliases of the mapped registration, for the PCIe share of the misses
+    dev_slice_.clear();
+    slice_bytes_ = a->slice_bytes;
+    if (a->registered_bytes > 0) {
+        std::vector<uint64_t> starts = a->slice_bytes > 0 ? a->slice_starts : std::vector<uint64_t>{0};
+        for (uint64_t off : starts) {
+            void* d = nullptr;
+            if (DPCT_CHECK_ERROR(d = (void *)(void *)(base_ + off)) != 0) {
+                /*
+                DPCT1010:655: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                (void)0;
+                dev_slice_.clear();
+                break;
+            }
+            dev_slice_.push_back((const uint8_t*) d);
+        }
+    }
+    blobs_ = n_layers * n_expert;
+    n_expert_ = n_expert;
+    reads_ = 0;
+    note_ = a->note;
+    gib_per_s_ = st.gib_per_second();
+    load_seconds_ = st.seconds;
+    load_read_s_ = st.read_seconds;
+    load_copy_s_ = st.copy_seconds;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void ArenaExpertSource::close() {
+    if (arena_ != nullptr) {
+        delete (PinnedArena*) arena_;
+        arena_ = nullptr;
+    }
+    base_ = nullptr;
+    blobs_ = 0;
+    n_expert_ = 0;
+}
+
+bool ArenaExpertSource::pinned(int64_t layer, int64_t expert) const {
+    if (base_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return false;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    return lay.blob_offset(layer, expert) + lay.blob_bytes(layer) <= pinned_bytes_;
+}
+
+const uint8_t* ArenaExpertSource::device_alias(int64_t layer, int64_t expert) const {
+    if (dev_slice_.empty() || !pinned(layer, expert)) return nullptr;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    if (slice_bytes_ == 0) return dev_slice_[0] + lay.blob_offset(layer, expert);
+    // one registration slice per layer
+    if ((size_t) layer >= dev_slice_.size()) return nullptr;
+    return dev_slice_[(size_t) layer] + (uint64_t) expert * lay.blob_bytes(layer);
+}
+
+const uint8_t* ArenaExpertSource::blob(int64_t layer, int64_t expert) {
+    if (base_ == nullptr) return nullptr;
+    if (layer < 0 || expert < 0 || expert >= n_expert_) return nullptr;
+    const int64_t idx = layer * n_expert_ + expert;
+    if (idx < 0 || idx >= blobs_) return nullptr;
+    ++reads_;
+    // Pointer arithmetic into resident memory.  No fault, no copy, no mapping - which is the entire point of
+    // this class over `FileExpertSource`.
+    return base_ + strata::kernels::cpu::expert_layout().blob_offset(layer, expert);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/graph.cpp b/sycl/src/core/graph.cpp
new file mode 100644
index 00000000000..eab5afa0e9e
--- /dev/null
+++ b/sycl/src/core/graph.cpp
@@ -0,0 +1,249 @@
+// src/core/graph.cpp - P2.S5: the GraphRegistry implementation.
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/graph.hpp"
+
+#include <immintrin.h>
+
+#include <chrono>
+#include <cstdio>
+#include <chrono>
+
+namespace strata::core {
+namespace {
+
+/// Fills `err` from the CUDA runtime, naming the call that failed.  A bare "invalid argument" with no call
+/// site is the least useful error this API can produce and the easiest to avoid.
+bool fail(std::string &err, const char *what, dpct::err0 e) {
+    /*
+    DPCT1009:68: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    err = std::string(what) + ": " + dpct::get_error_string_dummy(e);
+    return false;
+}
+
+}  // namespace
+
+CapturedGraph& CapturedGraph::operator=(CapturedGraph&& o) noexcept {
+    if (this != &o) {
+        reset();
+        graph_ = o.graph_;
+        exec_ = o.exec_;
+        done_ = o.done_;
+        nodes_ = o.nodes_;
+        o.graph_ = nullptr;
+        o.exec_ = nullptr;
+        o.done_ = nullptr;
+        o.nodes_ = 0;
+    }
+    return *this;
+}
+
+void CapturedGraph::reset() {
+    // ORDER MATTERS: destroying a graph exec BLOCKS until the launch it is destroying has completed, so
+    // destroying it before the event is harmless but destroying it after a spin that was supposed to observe
+    // completion would silently become the thing that caused it.  `bench/micro/graph_capture.cu` was fooled by
+    // exactly this once - it looked like captured graphs made a doorbell visible and direct launches did not.
+    if (exec_) { delete (exec_); exec_ = nullptr; }
+    if (graph_) { delete (graph_); graph_ = nullptr; }
+    if (done_) { dpct::destroy_event(done_); done_ = nullptr; }
+    nodes_ = 0;
+}
+
+bool CapturedGraph::begin(void *stream, std::string &err) try {
+    if (graph_ || exec_) { err = "begin: this CapturedGraph is already recorded"; return false; }
+    const dpct::err0 e = DPCT_CHECK_ERROR(
+        dpct::experimental::begin_recording(strata::q_of(stream)));
+    /*
+    DPCT1001:69: The statement could not be removed.
+    */
+    /*
+    DPCT1000:70: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaStreamBeginCapture", e);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool CapturedGraph::end(void *stream, std::string &err) try {
+    dpct::err0 e = DPCT_CHECK_ERROR(
+        dpct::experimental::end_recording(strata::q_of(stream), &graph_));
+    /*
+    DPCT1001:71: The statement could not be removed.
+    */
+    /*
+    DPCT1000:72: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) {
+        graph_ = nullptr; return fail(err, "cudaStreamEndCapture", e);
+    }
+
+    nodes_ = 0;
+    e = DPCT_CHECK_ERROR(
+        dpct::experimental::get_nodes(graph_, nullptr, &nodes_));
+    /*
+    DPCT1001:73: The statement could not be removed.
+    */
+    /*
+    DPCT1000:74: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaGraphGetNodes", e);
+    // A capture that recorded NOTHING is a wiring mistake, and a graph that replays nothing produces no error
+    // and no output - the silent kind of failure this project keeps paying for.
+    if (nodes_ == 0) { err = "end: the capture recorded ZERO nodes - the body launched nothing"; reset(); return false; }
+
+    e = DPCT_CHECK_ERROR(
+        exec_ = new sycl::ext::oneapi::experimental::command_graph<
+            sycl::ext::oneapi::experimental::graph_state::executable>(
+            (graph_)->finalize()));
+    /*
+    DPCT1001:75: The statement could not be removed.
+    */
+    /*
+    DPCT1000:76: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaGraphInstantiate", e);
+
+    // The completion event is recorded ONCE and reused: `launch` records it again after each replay, which is
+    // what makes `wait_ms` a query rather than a sync.
+    e = DPCT_CHECK_ERROR(done_ = new sycl::event());
+    /*
+    DPCT1001:77: The statement could not be removed.
+    */
+    /*
+    DPCT1000:78: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaEventCreateWithFlags", e);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool CapturedGraph::launch(void *stream, std::string &err) const try {
+    if (!exec_) { err = "launch: not recorded"; return false; }
+    dpct::err0 e =
+        DPCT_CHECK_ERROR(strata::q_of(stream)->ext_oneapi_graph(*exec_));
+    /*
+    DPCT1001:79: The statement could not be removed.
+    */
+    /*
+    DPCT1000:80: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaGraphLaunch", e);
+    /*
+    DPCT1012:83: Detected kernel execution time measurement pattern and
+    generated an initial code for time measurements in SYCL. You can change the
+    way time is measured depending on your goals.
+    */
+    /*
+    DPCT1024:84: The original code returned the error code that was further
+    consumed by the program logic. This original code was replaced with 0. You
+    may need to rewrite the program logic consuming the error code.
+    */
+    done__ct1 = std::chrono::steady_clock::now();
+    e = DPCT_CHECK_ERROR(*done_ = strata::q_of(stream)
+                                      ->ext_oneapi_submit_barrier());
+    /*
+    DPCT1001:81: The statement could not be removed.
+    */
+    /*
+    DPCT1000:82: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (e != 0) return fail(err, "cudaEventRecord", e);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool CapturedGraph::wait_ms(int timeout_ms) const try {
+    if (!done_) return false;
+    // A BOUNDED wait, and the bound is the point: an unbounded spin turns a protocol bug into a hung run, and
+    // a hung run says nothing about which side is stuck.  `cudaEventQuery` is a QUERY - it does not block and
+    // it does not synchronise - so this satisfies P2.X3 while still giving the driver the call it needs to
+    // flush the submission.  See NOTE 1 in the header: without a driver call here the work never starts.
+    //
+    // The deadline is a REAL CLOCK, not a count of pause instructions: `_mm_pause` is a few cycles, so
+    // counting pauses as microseconds would make the timeout tens of times longer than the caller asked for -
+    // a timeout that does not time out is worse than none, because it reports a hang as a pass.
+    const auto deadline = std::chrono::steady_clock::now() + std::chrono::milliseconds(timeout_ms);
+    for (;;) {
+        const dpct::err0 q = dpct::sycl_event_query(done_);
+        if (q == 0) return true;
+        if (q != 1) return false; // a real error, not "not finished"
+        if (std::chrono::steady_clock::now() >= deadline) return false;
+        for (int i = 0; i < 64; ++i) _mm_pause();
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool GraphRegistry::record(LayerType type, int n_tokens, const std::function<void()>& body, std::string& err) {
+    const Key k{(int) type, n_tokens};
+    if (graphs_.count(k)) return true;              // already recorded: the point of a registry
+
+    CapturedGraph g;
+    if (!g.begin(stream_, err)) return false;
+    body();                                        // the caller launches into the captured stream
+    // The body must not have failed silently.  An error state left on the stream would make EndCapture
+    // succeed with a broken graph, so it is checked and cleared first.
+    /*
+    DPCT1010:87: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 body_err = 0;
+    /*
+    DPCT1000:86: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (body_err != 0) {
+        // Abandon the capture without instantiating anything.
+        dpct::experimental::command_graph_ptr junk = nullptr;
+        /*
+        DPCT1001:85: The statement could not be removed.
+        */
+        dpct::experimental::end_recording(strata::q_of(stream_), &junk);
+        if (junk) delete (junk);
+        return fail(err, "the capture body left a CUDA error", body_err);
+    }
+    if (!g.end(stream_, err)) return false;
+
+    graphs_.emplace(k, std::move(g));
+    ++captures_;
+    return true;
+}
+
+const CapturedGraph* GraphRegistry::find(LayerType type, int n_tokens) const {
+    const auto it = graphs_.find(Key{(int) type, n_tokens});
+    return it == graphs_.end() ? nullptr : &it->second;
+}
+
+bool GraphRegistry::launch(LayerType type, int n_tokens, int timeout_ms, std::string& err) const {
+    const CapturedGraph* g = find(type, n_tokens);
+    if (!g) {
+        char buf[128];
+        std::snprintf(buf, sizeof buf, "launch: no graph recorded for %s n=%d", to_string(type), n_tokens);
+        err = buf;
+        return false;
+    }
+    if (!g->launch(stream_, err)) return false;
+    if (!g->wait_ms(timeout_ms)) { err = "launch: timed out waiting for the graph to complete"; return false; }
+    return true;
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/layer.cpp b/sycl/src/core/layer.cpp
new file mode 100644
index 00000000000..5e68553c3cd
--- /dev/null
+++ b/sycl/src/core/layer.cpp
@@ -0,0 +1,1482 @@
+
+// src/core/layer.cpp - the GDN layer, composed.  See the header for the operation order and its traps.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/layer.hpp"
+#include "strata/core/native_head.hpp"
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/gdn.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/rope.hpp"
+#include "strata/kernels/router_top10.hpp"
+#include "strata/kernels/s2_gemv_q8.hpp"
+#include "strata/kernels/s_gemv.hpp"
+#include "strata/kernels/shared_expert.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/native_moe.hpp"
+#include "strata/kernels/native_gdn.hpp"
+#include "strata/kernels/native_gdn_preprocess.hpp"
+#include "strata/kernels/native_router.hpp"
+#include "strata/kernels/native_qsa.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/native_rope.hpp"
+#include "strata/kernels/native_flash_attn.hpp"
+#include "strata/kernels/fused_gr.hpp"
+#include "strata/kernels/cvec.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/fused_gdn.hpp"
+#include "strata/kernels/qsa_select.hpp"
+#include <algorithm>
+#include <cstdlib>
+#include <exception>
+#include <cmath>
+#include <cstdio>
+#include <cstring>
+#include <vector>
+namespace strata::core {
+namespace { bool g_shared_early = true; bool g_fused_gr = false; bool g_fast_attn = true; bool g_publish_kernel = true; bool g_fused_gdn = true; bool g_fast_select = true; }
+namespace {constexpr int Q8K_BYTES_PER_BLOCK = 292;
+constexpr int Q8K_ELEMS_PER_BLOCK = 256;
+constexpr float RMS_EPS = 1e-6f;
+const std::string EMBEDDING_NAME = "token_embd.weight";
+// qwen4exp.attention.layer_norm_rms_epsilon, used for BOTH norms here
+/// A Q8_K buffer needs `n` a multiple of 256 and `n/256` blocks of 292 bytes.
+uint64_t q8k_bytes(int64_t n) { return (uint64_t) (n / Q8K_ELEMS_PER_BLOCK) * Q8K_BYTES_PER_BLOCK; }
+/// `s_gemv_q8k` takes the canonical-form attributes; a `WeightRef` carries them, and a tensor that is NOT
+/// quantized has none.  Returns false and names the tensor rather than building a form out of zeroes - which
+/// would decode every code as `0 + bias` and produce a perfectly finite wrong answer.
+bool sform_of(const WeightRef& r, strata::kernels::SForm& f, const std::string& name, std::string& err) {    if (!r.quantized()) {        err = name + " is not a quantized tensor, so it has no S-form";        return false;    }    f.code_bits = r.code_bits;    f.code_bias = r.code_bias;    f.group_elems = r.group_elems;    f.codebook = r.codebook_iq4nl ? strata::kernels::Codebook::Iq4Nl : strata::kernels::Codebook::Affine;    f.has_offset = r.has_offset;    f.act_kind = r.act_kind;
+// carried, not derived - see the note on `SForm::act_kind`
+return true;}
+/// The three canonical planes of a quantized tensor, located INSIDE the loaded region.
+//
+//
+// **THIS FUNCTION USED TO RE-DERIVE THE LAYOUT, AND THAT IS HOW A WIDTH BUG SURVIVED A ROUND.**  It computed
+/// `n_groups = n_in / group_elems` and then `scales_bytes = n_out * n_groups * sizeof(float)` - 4 bytes per
+/// scale for every tensor.  90 of the 303 quantized tensors hold fp16 scales in the pack (all 58 Q2_0 expert
+/// tensors, plus Q4_0, Q5_0, Q8_0 and IQ4_NL), so for those the computed plane was TWICE the real one and the
+/// three planes did not add up to the tensor.  The first diagnosis was "the manifest's `group_elems` must be
+/// wrong, the real group is 64"; it is not, and an audit of all 303 tensors against `scales_fp16` found zero
+/// inconsistencies.  **The unexamined input was the scale WIDTH, not the group COUNT.**
+//
+//
+// The loader now widens fp16 scales to f32 on the way into the arena and records the resulting plane sizes in
+/// the `WeightRef`, so this function has nothing left to derive - it reads what was loaded.  The redundancy is
+/// deliberate: the sizes come from ONE place (the index, checked against the manifest by `pack_index.py` and
+/// against the span by the loader), and this function only checks that they describe the tensor it was given.
+//
+//
+// **THE PLANE KEY IS `offsets`, NOT `mins`, AND THAT COST 136 MiB.**  `tools/pack_index.py` and
+/// `tools/pack_budget.py` both looked for `mins` and both therefore omitted the offset plane of 54 Q4_K/Q5_K
+/// tensors - so the arena was sized without it AND the bytes were never copied.  Two tools agreeing is only
+/// evidence when they do not share the assumption that is wrong.  This function refuses rather than guessing,
+/// which is what caught it.
+struct Planes {    const uint8_t* codes = nullptr;    const float* scales = nullptr;    const float* offset = nullptr;
+///< null when the form has none
+};
+bool plane_ptrs(const WeightRef& r, const std::string& name, Planes& out, std::string& err) {
+// S2, S4 AND S8 ALL SPLIT THE SAME WAY.  The plane LOCATION does not depend on the code width - the three
+// sizes come from the index and are checked against the tensor below - so the guard is here to catch a
+// tensor that is not quantized at all, not to pick a decoder.  WHICH KERNEL reads the planes is the
+// caller's choice and the two differ: an S2 tensor's activation contract is Q8_0 (`s2_gemv_q8`) while a
+// K-quant's is Q8_K (`s_gemv_q8k`).  This used to accept only 4 and 8, which refused `attn_q` - a Q2_0
+// tensor and the reason the QSA layer could not be composed at all.
+if (r.code_bits != 2 && r.code_bits != 4 && r.code_bits != 8) {        err = name + ": code_bits " + std::to_string(r.code_bits) + " is not an S2/S4/S8 form";        return false;    }    const uint64_t end = r.codes_bytes + r.scales_bytes + r.offset_bytes;    if (r.codes_bytes == 0 || r.scales_bytes == 0 || end != r.bytes) {        char buf[320];        std::snprintf(buf, sizeof buf,                      "%s: the planes add up to %llu B but the tensor is %llu B (codes %llu, scales %llu, "                      "offsets %llu) - what the loader recorded is not the layout that was loaded",                      name.c_str(), (unsigned long long) end, (unsigned long long) r.bytes,                      (unsigned long long) r.codes_bytes, (unsigned long long) r.scales_bytes,                      (unsigned long long) r.offset_bytes);        err = buf;        return false;    }    if (r.has_offset != (r.offset_bytes != 0)) {        err = name + ": has_offset is " + std::to_string(r.has_offset ? 1 : 0) + " but the offset plane is " +              std::to_string(r.offset_bytes) + " B";        return false;    }    const uint8_t* base = (const uint8_t*) r.data;    out.codes = base;    out.scales = (const float*) (base + r.codes_bytes);    out.offset = r.offset_bytes ? (const float*) (base + r.codes_bytes + r.scales_bytes) : nullptr;    return true;}
+constexpr int TPR = 32;
+bool native_bf16_projections = false;
+bool native_flash_attn_short = false;
+
+void project_bf16(const float* x, const uint16_t* x_bf16, const uint16_t* weights, float* out,
+                  int64_t n_in, int64_t n_out, bool split, void* stream) {
+    using namespace strata::kernels;
+    if (native_bf16_projections) bf16_gemv_fp32_mmvf(x, weights, out, n_in, n_out, stream);
+    else if (split) bf16_gemv_split(x_bf16, weights, out, n_in, n_out, TPR, stream);
+    else bf16_gemv(x_bf16, weights, out, n_in, n_out, stream);
+}
+///< threads per row for the row-split GEMVs.
+/// **MEASURED, NOT ASSUMED, AND 64 IS NOT BETTER.**  `dense_pass.exe` drives the same split kernels at
+/// threads_per_row 64 and reports 248.5 GB/s, so matching it looked like free performance.  It is not:
+/// TPR=64 gives 11.75 tok/s against 32's 11.99 with experts, and 20.19 against 20.26 without - identical
+/// inside noise and marginally worse on both.  That is also what the stage table predicts, because the GEMVs
+/// are only ~16% of a token, so a few percent there cannot move the total.  Kept at 32; the sweep that would
+/// actually settle it is per-tensor, not global, and belongs with the fusion work rather than before it.
+///< threads per row for the row-split GEMVs
+/// Writes the sequence number into MAPPED PINNED memory.  A KERNEL, not cudaEventRecord - round 199 found
+/// that an event record inside a capture is silently dropped, while this is captured normally and the host can
+/// read its result MID-GRAPH.  One thread: it is a store.
+// (the ring kernel lives in src/kernels/cuda/elementwise.cu; this file is HOST code)
+/// WHICH ACTIVATION A QUANTIZED WEIGHT WANTS, AND IT IS A PROPERTY OF THE **TENSOR**, NOT OF ITS ROLE.
+//
+//
+// Rounds 205-215 ran `gdn_layer` and `qsa_layer` on the assumption that a name implies a family: `attn_qkv` is
+/// a K-quant, `attn_q` is Q2_0, and so on.  **The pack does not work that way.**  The same name is quantized
+/// per LAYER, and the spread is wide:
+//
+//
+//     attn_qkv     IQ4_XS x13, Q3_K x18, Q2_0 x1,  Q4_K x4      (36 GDN layers)
+///     attn_gate    Q3_K x25,  IQ4_XS x4, Q4_K x3,  Q2_0 x4
+///     attn_q       Q3_K x6,   IQ4_XS x4, Q2_0 x2                (12 QSA layers)
+//
+//
+// `docs/activation-contract.md` fixes the rule per TYPE, and it is short:
+//
+//
+//     code_bits == 2           ->  Q8_0,  via `quantize_q8_0` + `s2_gemv_q8`
+///     anything else quantized  ->  Q8_K,  via `quantize_q8_K` + `s_gemv_q8k_split`
+//
+//
+// Getting it wrong is worth 0.6-1.4% on the GEMV - a plausible vector, not a broken one - which is exactly
+/// what Gate C1 exists to find and what nothing before C1 would have.  `s_gemv_q8k`'s own guard is what caught
+/// it here (`code_bits 2 has no Q8_K contract`).
+//
+//
+// `x80` and `xq8k` are the two quantized images of the SAME activation; a caller produces both once and this
+/// picks.  Producing only the one it thinks it needs is how the assumption gets baked in again.
+bool gemv_quantized(const WeightRef& w, const Planes& p, const strata::kernels::SForm& f, const uint8_t* x80, const uint8_t* xq8k,                    float* y, int64_t n_in, int64_t n_out, const std::string& name, void* stream,                    std::string& err, const float* x_f32 = nullptr, bool x_q8_1_ready = false) {
+    using namespace strata::kernels;
+    if (w.native_data) {
+        if (!x_f32 || !w.native_q8_1 || !stream || n_in != w.ne0 || n_out != w.ne1) {
+            err = name + ": native projection requires matching FP32 input and session scratch";
+            return false;
+        }
+        try {
+            // Plan v0.3 P3: a caller whose previous native projection quantized the SAME x into the shared
+            // scratch, with no native projection in between, passes x_q8_1_ready and the quantize is skipped.
+            if (!x_q8_1_ready) native_quantize_q8_1(x_f32, w.native_q8_1, (int) n_in, 1, stream);
+            native_mmvq(w.native_type, w.native_data, w.native_q8_1, y,
+                        (int) n_in, (int) n_out, 1, stream);
+        } catch (const std::exception& error) {
+            err = name + ": " + error.what();
+            return false;
+        }
+        return true;
+    }
+    if ((w.code_bits == 2 || !w.wants_q8k()) ? !x80 : !xq8k) {
+        err = name + ": missing canonical quantized activation";
+        return false;
+    }
+    if (w.code_bits == 2) {
+// S2 carries no offset plane and no SForm: its attributes are fixed (2 bits, group 64, bias -1), which
+// is why `s2_gemv_q8` takes neither.
+if (w.has_offset || p.offset != nullptr) {            err = name + ": an S2 form must have no offset plane";            return false;        }        if (w.group_elems != 64 || w.code_bias != -1) {            err = name + ": an S2 form must be group 64 with bias -1, this one is group " +                  std::to_string(w.group_elems) + " with bias " + std::to_string(w.code_bias);            return false;        }        s2_gemv_q8(x80, p.codes, p.scales, y, n_in, n_out, TPR, stream);        return true;    }
+// **A LEGACY 4/8-BIT FORM WANTS Q8_0, NOT Q8_K, AND `code_bits` CANNOT TELL YOU WHICH.**  This used to be
+// `code_bits == 2 ? Q8_0 : Q8_K`, which is CORRECT ONLY BY LUCK: every legacy tensor in this pack apart
+// from `ffn_down_shexp` is Q2_0, whose attributes happen to be S2's.  Q5_0 and Q5_K are both 8-bit with
+// bias -16 and differ only in `has_offset`; IQ4_NL and IQ4_XS differ in NOTHING the S-form carries.  The
+// kind therefore comes from the manifest's `source_type`, through the index (LEDGER L54/L55).
+if (!w.wants_q8k()) {        s_gemv_q8_0_split(x80, p.codes, p.scales, p.offset, y, n_in, n_out, f, stream);        return true;    }    s_gemv_q8k_split(xq8k, p.codes, p.scales, p.offset, y, n_in, n_out, f, stream);    return true;}}
+// namespace
+void layer_set_native_bf16(bool enabled) { native_bf16_projections = enabled; }
+void layer_set_native_flash_attn_short(bool enabled) { native_flash_attn_short = enabled; }
+namespace { bool g_kv_int8 = false, g_kv_q4 = false; }
+void qsa_set_kv_int8(bool enabled) { g_kv_int8 = enabled; }
+bool qsa_kv_int8() { return g_kv_int8; }
+void qsa_set_kv_q4(bool enabled) { g_kv_q4 = enabled; }
+bool qsa_kv_q4() { return g_kv_q4; }
+uint64_t gdn_buffers_bytes(const ModelGeometry& g) {    const int64_t C = g.ssm_conv_channels;    const int64_t V = g.ssm_value_dim;    const uint64_t parts[] = {        q8k_bytes(g.n_embd),
+// x_q8k
+(uint64_t) (g.n_embd / 32) * 34,
+// x_q8_0
+(uint64_t) g.n_embd * 2,
+// x_bf16
+(uint64_t) C * 4,
+// qkv
+(uint64_t) C * 4,
+// conv_out
+(uint64_t) C * 4,
+// h
+(uint64_t) g.ssm_v_heads * 4,
+// alpha
+(uint64_t) g.ssm_v_heads * 4,
+// beta
+(uint64_t) g.ssm_v_heads * 4,
+// gate
+(uint64_t) g.ssm_v_heads * g.ssm_state_size * 4,
+// o
+(uint64_t) V * 4,
+// z
+(uint64_t) V * 4,
+// y
+q8k_bytes(V),
+// y_q8k
+(uint64_t) (V / 32) * 34,
+// y_q8_0
+(uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size * 4,
+// state
+(uint64_t) C * (g.ssm_d_conv - 1) * 4,
+// conv_state
+};    uint64_t total = 0;    for (uint64_t v : parts) total += (v + 15) & ~(uint64_t) 15;    return total;}
+uint64_t gdn_buffers_init(const ModelGeometry& g, void* base, GdnBuffers& b) {    const int64_t C = g.ssm_conv_channels;    const int64_t V = g.ssm_value_dim;    const uint64_t parts[] = {        q8k_bytes(g.n_embd), (uint64_t) (g.n_embd / 32) * 34, (uint64_t) g.n_embd * 2, (uint64_t) C * 4,        (uint64_t) C * 4, (uint64_t) C * 4,        (uint64_t) g.ssm_v_heads * 4, (uint64_t) g.ssm_v_heads * 4, (uint64_t) g.ssm_v_heads * 4,        (uint64_t) g.ssm_v_heads * g.ssm_state_size * 4, (uint64_t) V * 4, (uint64_t) V * 4, q8k_bytes(V),        (uint64_t) (V / 32) * 34,        (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size * 4, (uint64_t) C * (g.ssm_d_conv - 1) * 4,    };    uint8_t* p = (uint8_t*) base;    void* ptr[16];    uint64_t total = 0;    for (int i = 0; i < 16; ++i) {        ptr[i] = p;        const uint64_t al = (parts[i] + 15) & ~(uint64_t) 15;        p += al;        total += al;    }    b.x_q8k = (uint8_t*) ptr[0];    b.x_q8_0 = (uint8_t*) ptr[1];    b.x_bf16 = (uint16_t*) ptr[2];    b.qkv = (float*) ptr[3];    b.conv_out = (float*) ptr[4];    b.h = (float*) ptr[5];    b.alpha = (float*) ptr[6];    b.beta = (float*) ptr[7];    b.gate = (float*) ptr[8];    b.o = (float*) ptr[9];    b.z = (float*) ptr[10];    b.y = (float*) ptr[11];    b.y_q8k = (uint8_t*) ptr[12];    b.y_q8_0 = (uint8_t*) ptr[13];    b.state = (float*) ptr[14];    b.conv_state = (float*) ptr[15];    return total;}
+void gdn_buffers_zero_state(const GdnBuffers &b, const ModelGeometry &g,
+                            void *stream) {
+    const uint64_t st = (uint64_t)g.ssm_state_size * g.ssm_v_heads *
+                        g.ssm_state_size * sizeof(float);
+    const uint64_t cs = (uint64_t)g.ssm_conv_channels * (g.ssm_d_conv - 1) *
+                        sizeof(float);
+    strata::q_of(stream)-> memset(b.state, 0, st);
+    strata::q_of(stream)->memset(b.conv_state, 0, cs);
+}
+// Forward-declared because `gdn_layer` and `qsa_layer` are both defined above the timer's own definition, and
+// the sub-stage marks live inside them.
+static void st_begin(int64_t layer, int slot, void* stream);
+static void st_end(int64_t layer, int slot, void* stream);
+bool gdn_layer(const WeightTable& tables, const ModelGeometry& g, int64_t layer, const GdnBuffers& b,               const float* mixed, float* out, void* stream, std::string& err) {    const LayerView v(tables, layer);    const int64_t C = g.ssm_conv_channels;
+// ---- resolve.  Every one of these was shape-checked by `check_layer` at load time, so a miss here is a
+//      NAME problem and not a geometry one, and the message says which name.
+const WeightRef* w_qkv = v.get("attn_qkv.weight");    const WeightRef* w_gate = v.get("attn_gate.weight");    const WeightRef* w_out = v.get("ssm_out.weight");    const WeightRef* w_alpha = v.get("ssm_alpha.weight");    const WeightRef* w_beta = v.get("ssm_beta.weight");    const WeightRef* w_conv = v.get("ssm_conv1d.weight");    const WeightRef* w_norm = v.get("ssm_norm.weight");    const WeightRef* w_dt = v.get("ssm_dt.bias");    const WeightRef* w_a = v.get("ssm_a");    const char* missing = !w_qkv ? "attn_qkv.weight" : !w_gate ? "attn_gate.weight"                          : !w_out ? "ssm_out.weight" : !w_alpha ? "ssm_alpha.weight"                          : !w_beta ? "ssm_beta.weight" : !w_conv ? "ssm_conv1d.weight"                          : !w_norm ? "ssm_norm.weight" : !w_dt ? "ssm_dt.bias"                          : !w_a ? "ssm_a" : nullptr;    if (missing) { err = v.name(missing) + " is missing"; return false; }
+// The conv kernel and the two norms are F32 source types, and the loader copied them verbatim - so their
+// device bytes ARE f32 and can be handed straight to the kernels that want `const float*`.
+const float *conv_kernel = (const float *)w_conv->data;
+    const float *ssm_norm = (const float *)w_norm->data;
+    const float *dt = (const float *)w_dt->data;
+    const float *ssm_a = (const float *)w_a->data;
+    strata::kernels::SForm f_qkv, f_gate, f_out;
+    if (!sform_of(*w_qkv, f_qkv, v.name("attn_qkv.weight"), err)) return false;
+    if (!sform_of(*w_gate, f_gate, v.name("attn_gate.weight"),
+                  err)) return false;
+    if (!sform_of(*w_out, f_out, v.name("ssm_out.weight"), err)) return false;
+    Planes p_qkv, p_gate, p_out;
+    if (!plane_ptrs(*w_qkv, v.name("attn_qkv.weight"), p_qkv,
+                    err)) return false;
+    if (!plane_ptrs(*w_gate, v.name("attn_gate.weight"), p_gate,
+                    err)) return false;
+    if (!plane_ptrs(*w_out, v.name("ssm_out.weight"), p_out, err)) return false;
+    using namespace strata::kernels;
+    dpct::queue_ptr st = strata::q_of(stream);
+// ---- 1. the activation, in EVERY format a weight on this layer might ask for.  BOTH quantized images are
+//         produced, because which one is wanted is a property of the TENSOR and the pack mixes them by
+//         layer - producing only the "right" one is how the per-role assumption gets baked back in.
+st_begin(layer, 8, stream);
+    // Plan v0.3 P3: the canonical activation images only when a canonical projection reads them.
+    if (!w_qkv->native_data || !w_gate->native_data) {
+        quantize_q8_K(mixed, b.x_q8k, g.n_embd, stream);
+        quantize_q8_0(mixed, b.x_q8_0, g.n_embd, stream);
+    }
+    st_end(layer, 8, stream);
+// ---- 2. qkv = wqkv @ x, with the activation THIS layer's `attn_qkv` asks for
+st_begin(layer, 9, stream);    if (!gemv_quantized(*w_qkv, p_qkv, f_qkv, b.x_q8_0, b.x_q8k, b.qkv, g.n_embd, C,                        v.name("attn_qkv.weight"), stream, err, mixed)) return false;    st_end(layer, 9, stream);
+// ---- 3. conv, then SiLU on the WHOLE conv output - before the q|k|v split, which is what
+//         `ref/gdn.py` L262 says and what makes the split a reshape rather than a copy.
+st_begin(layer, 10, stream);
+// Plan v0.3 P3: under the native contract, conv + SiLU + both L2 norms are one kernel, and alpha/beta with their
+// epilogues another (`fused_gdn.hpp`).
+const bool fused_pre = g_fused_gdn && native_gdn_enabled() && native_bf16_projections && g.ssm_d_conv == 4 &&
+                       g.ssm_state_size == 128;
+if (fused_pre) {
+    fused_gdn_conv_l2(b.conv_state, b.qkv, conv_kernel, b.h, (int) C, (int) (2 * g.ssm_k_heads), RMS_EPS, stream);
+} else
+try {
+    if (native_gdn_enabled()) native_gdn_conv_silu(b.conv_state, b.qkv, conv_kernel, b.conv_out, b.h, C, g.ssm_d_conv, stream);
+    else {
+        gdn_conv_step(b.conv_state, b.qkv, conv_kernel, b.conv_out, C, g.ssm_d_conv, stream);
+        /*
+        DPCT1124:794: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        st->memcpy(b.h, b.conv_out, (size_t)C * 4);
+        silu_inplace(b.h, C, stream);
+    }
+} catch (const std::exception& error) { err = v.name("gdn_conv_silu") + ": " + error.what(); return false; }
+st_end(layer, 10, stream);
+// ---- 4. q,k = l2_norm; v is NOT normalised.  The three views are contiguous runs of the same buffer:
+//         q at [0, 2048), k at [2048, 4096), v at [4096, 10240), each 128-wide heads.    const
+st_begin(layer, 11, stream);    int64_t qk = g.ssm_state_size * g.ssm_k_heads;
+if (!fused_pre) try {
+    if (native_gdn_enabled()) {
+        native_gdn_l2_norm(b.h, g.ssm_k_heads, g.ssm_state_size, RMS_EPS, stream);
+        native_gdn_l2_norm(b.h + qk, g.ssm_k_heads, g.ssm_state_size, RMS_EPS, stream);
+    } else {
+        gdn_l2_norm(b.h, g.ssm_k_heads, g.ssm_state_size, RMS_EPS, stream);
+        gdn_l2_norm(b.h + qk, g.ssm_k_heads, g.ssm_state_size, RMS_EPS, stream);
+    }
+} catch (const std::exception& error) { err = v.name("gdn_l2_norm") + ": " + error.what(); return false; }
+// The recurrence needs another 1/sqrt(S) beyond Q/K normalization. The legacy
+// recurrence consumes prescaled Q; pinned CUDA applies it after the readout dot.
+// Keep the scale at that backend-specific boundary to preserve rounding order.
+if (!native_gdn_enabled()) scale_inplace(b.h, qk, 1.0f / std::sqrt((float) g.ssm_state_size), stream);
+st_end(layer, 11, stream);
+// ---- 5. beta and the gate. The weights are BF16. Native single-token CUDA MMVF
+//         consumes F32 activations; the legacy path rounds them to BF16 first.
+//
+//         THE ROW-SPLIT FORM, and here the case is stronger than the router's: `ssm_v_heads` is **48**, so
+//         the plain one-thread-per-row form puts 48 threads on a 48-SM GPU and each walks 2,560 elements
+//         alone.  Measured 0.1072 ms each, against 0.0277 for the split - and there are two of them, in all
+//         36 GDN layers.
+st_begin(layer, 12, stream);
+    if (fused_pre) {
+        fused_gdn_ab(mixed, (const uint16_t*) w_alpha->data, (const uint16_t*) w_beta->data, dt, ssm_a, b.gate, b.beta,
+                     (int) g.n_embd, (int) g.ssm_v_heads, stream);
+    } else {
+    if (!native_bf16_projections) f32_to_bf16_bulk(mixed, b.x_bf16, g.n_embd, stream);
+    project_bf16(mixed, b.x_bf16, (const uint16_t*) w_alpha->data, b.alpha, g.n_embd, g.ssm_v_heads, true, stream);
+    project_bf16(mixed, b.x_bf16, (const uint16_t*) w_beta->data, b.beta, g.n_embd, g.ssm_v_heads, true, stream);
+    }
+    if (!fused_pre) try {
+        if (native_gdn_enabled()) {
+            native_gdn_beta_gate(b.beta, g.ssm_v_heads, stream);
+            native_gdn_gate(b.alpha, dt, ssm_a, b.gate, g.ssm_v_heads, stream);
+        } else {
+            gdn_beta_gate(b.beta, g.ssm_v_heads, stream);
+            gdn_gate(b.alpha, dt, ssm_a, b.gate, 1, g.ssm_v_heads, stream);
+        }
+    } catch (const std::exception& error) { err = v.name("gdn_gate") + ": " + error.what(); return false; }
+    st_end(layer, 12, stream); st_begin(layer, 13, stream);
+    GdnShapes gs{g.ssm_state_size, g.ssm_k_heads, g.ssm_v_heads};
+    // Plan v0.3 P3: with the native contract the step and the output norm are one kernel (after the z GEMV).
+    const bool fused_gdn = g_fused_gdn && native_gdn_enabled() && g.ssm_state_size == 128;
+    if (!fused_gdn) try {
+        if (native_gdn_enabled()) native_gdn_step(b.state, b.h, b.h + qk, b.h + 2 * qk, b.gate, b.beta, b.o, gs, stream);
+        else gdn_step(b.state, b.h, b.h + qk, b.h + 2 * qk, b.gate, b.beta, b.o, gs, stream);
+    } catch (const std::exception& error) {
+        err = v.name("gdn_step") + ": " + error.what();
+        return false;
+    }
+    st_end(layer, 13, stream); st_begin(layer, 14, stream);
+// ---- 6. the recurrence.  q and k are the (16, 128) views; v is the (48, 128) view.  The stage marks for
+// it live at the end of the alpha/beta/gate line above, because the gate and the step are one sequence.
+// ---- 7. z, then y = rms_norm(o) * ssm_norm * sigmoid(z).  SIGMOID, not SiLU.
+// qkv's native quantize of `mixed` is still in the shared q8_1 scratch: nothing native ran in between.
+if (!gemv_quantized(*w_gate, p_gate, f_gate, b.x_q8_0, b.x_q8k, b.z, g.n_embd, g.ssm_value_dim, v.name("attn_gate.weight"), stream, err, mixed,
+                    w_qkv->native_data != nullptr && w_gate->native_data != nullptr)) return false;
+try {
+    if (fused_gdn) fused_gdn_step_norm(b.state, b.h, b.h + qk, b.h + 2 * qk, b.gate, b.beta, b.z, ssm_norm, RMS_EPS, b.y,
+                                       (int) g.ssm_k_heads, (int) g.ssm_v_heads, stream);
+    else if (native_gdn_enabled()) native_gdn_out_norm(b.o, b.z, ssm_norm, b.y, g.ssm_v_heads, g.ssm_state_size, RMS_EPS, stream);
+    else gdn_out_norm(b.o, b.z, ssm_norm, b.y, g.ssm_v_heads, g.ssm_state_size, RMS_EPS, stream);
+} catch (const std::exception& error) { err = v.name("gdn_out_norm") + ": " + error.what(); return false; }
+st_end(layer, 14, stream);
+// ---- 8. out = ssm_out @ y, whose activation is whatever THIS layer's `ssm_out` asks for
+st_begin(layer, 15, stream);
+    if (!w_out->native_data) {
+        quantize_q8_K(b.y, b.y_q8k, g.ssm_value_dim, stream);
+        quantize_q8_0(b.y, b.y_q8_0, g.ssm_value_dim, stream);
+    }    if (!gemv_quantized(*w_out, p_out, f_out, b.y_q8_0, b.y_q8k, out, g.ssm_value_dim, g.n_embd,                        v.name("ssm_out.weight"), stream, err, b.y)) return false;    st_end(layer, 15, stream);    return true;}
+// ================================ the MoE block ================================
+uint64_t moe_buffers_bytes(const ModelGeometry& g, int64_t k) {    const uint64_t parts[] = {        (uint64_t) g.n_embd * 2,
+// x_bf16
+(uint64_t) g.n_embd * 2,
+// x_f16
+(uint64_t) g.n_expert * 4,
+// logits
+(uint64_t) k * 4,
+// ids (int32)
+(uint64_t) k * 4,
+// weights
+(uint64_t) g.n_embd * 4,
+// shared
+strata::kernels::shared_expert_scratch_bytes(g.n_ff),
+// the shared expert's own scratch
+(uint64_t) (g.n_embd / 32) * 34,
+// x_q8_0
+q8k_bytes(g.n_embd),
+// x_q8k
+};    uint64_t total = 0;    for (uint64_t v : parts) total += (v + 15) & ~(uint64_t) 15;    return total;}
+uint64_t moe_buffers_init(const ModelGeometry& g, int64_t k, void* base, MoEBuffers& b) {    const uint64_t parts[] = {        (uint64_t) g.n_embd * 2, (uint64_t) g.n_embd * 2, (uint64_t) g.n_expert * 4,        (uint64_t) k * 4, (uint64_t) k * 4, (uint64_t) g.n_embd * 4,        strata::kernels::shared_expert_scratch_bytes(g.n_ff),        (uint64_t) (g.n_embd / 32) * 34, q8k_bytes(g.n_embd),    };    uint8_t* p = (uint8_t*) base;    void* ptr[9];    uint64_t total = 0;    for (int i = 0; i < 9; ++i) {        ptr[i] = p;        const uint64_t al = (parts[i] + 15) & ~(uint64_t) 15;        p += al;        total += al;    }    b.x_bf16 = (uint16_t*) ptr[0];    b.x_f16 = (uint16_t*) ptr[1];    b.logits = (float*) ptr[2];    b.ids = (int*) ptr[3];    b.weights = (float*) ptr[4];    b.shared = (float*) ptr[5];    b.sh_scratch = (float*) ptr[6];    b.x_q8_0 = (uint8_t*) ptr[7];    b.x_q8k = (uint8_t*) ptr[8];    return total;}
+bool moe_route(const WeightTable &tables, const ModelGeometry &g, int64_t layer,
+               int64_t k, const MoEBuffers &b, const float *x, void *stream,
+               std::string &err, const Doorbell *db) try {
+    using namespace strata::kernels; const LayerView v(tables, layer);
+    const WeightRef *w_router = v.get("ffn_gate_inp.weight");
+    if (w_router == nullptr) {
+        err = v.name("ffn_gate_inp.weight") + " is missing"; return false;
+    } if (k < 1 || k > 64) {
+        err = "moe_route: k must be 1..64"; return false;
+    }
+// ---- the router's activation.  The router's weight is BF16 and that is the one `ref/moe.py` singles out.
+if (!native_bf16_projections) f32_to_bf16_bulk(x, b.x_bf16, g.n_embd, stream);
+// ---- logits = ffn_gate_inp @ bf16(x).  The weight is BF16, so this is `bf16_gemv` and not `s_gemv` -
+//      and using the fp16 activation here instead is the 8.100e-03 error that flips a selection.
+//
+//      **THE ROW-SPLIT VARIANT, BECAUSE THE PLAIN ONE'S PARALLELISM IS THE OUTPUT WIDTH.**  `bf16_gemv` is
+//      one thread per output row: for the router that is 512 threads over 48 SMs, each walking 2,560
+//      elements sequentially, and it measured **0.2711 ms for a 2.6 MB weight** - about 65x its
+//      memory-bound floor and the largest single item left inside the MoE after the top-10 was fixed.
+//      `bf16_gemv_split` exists for precisely this case; its own header says so.  Measured here:
+//      LEDGER L41 -> L42.
+project_bf16(x, b.x_bf16, (const uint16_t*) w_router->data, b.logits, g.n_embd, g.n_expert, true, stream);
+// ---- routing: softmax over ALL experts, stable descending argsort with ties by index, gather, renormalise
+// the native fused router is canonical-512x10 only; anything else takes the generic top-k kernel
+if (native_router_enabled() && g.n_expert == 512 && k == 10) {
+    try { native_router_top10(b.logits, b.ids, b.weights, stream); }
+    catch (const std::exception& error) { err = v.name("router") + ": " + error.what(); return false; }
+} else router_top10(b.logits, 1, (int) g.n_expert, (int) k, b.ids, b.weights, stream);
+// ---- THE DOORBELL, AND IT IS THE WHOLE POINT OF THE PROTOCOL.  The routed experts' INPUT (`x`) and the
+//      miss list (`ids`, `weights`) are published to the host HERE, before anything that depends on them,
+//      so a CPU pool can start on them while the GPU keeps working.  Both the copy and the ring are
+//      captured into `G[l]` like anything else - a kernel writing mapped pinned memory, which round 209
+//      measured the host seeing 0.050 ms into a 39.8 ms graph.
+if (db != nullptr && g_publish_kernel) {
+    strata::kernels::doorbell_publish(x, b.ids, b.weights, g.n_embd, k, db->d_x_f, db->d_ids, db->d_weights, db->d_seq,
+                                      stream);
+/*
+DPCT1124:795: cudaMemcpyAsync is migrated to asynchronous memcpy API. While the
+origin API might be synchronous, it depends on the type of operand memory, so
+you may need to call wait() on event return by memcpy API to ensure
+synchronization behavior.
+*/
+} else if (db != nullptr) {
+    if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+            db->d_x_f, x, (size_t)g.n_embd * 4)) != 0 ||
+        DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(db->d_ids, b.ids,
+                                                         (size_t)k * 4)) != 0 ||
+        DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+            db->d_weights, b.weights, (size_t)k * 4)) != 0) {
+        err = "moe_route: the doorbell handoff copy failed"; return false;
+    }
+// THE RING IS LAST, so a host that sees it knows every byte above is in place.  Ordering within a
+// stream is what makes that true; it is not a timing assumption.
+// THE RING LIVES IN A .cu: this file is compiled by the HOST compiler, where `__global__` and `<<<>>>` do
+// not exist.  The sequence value is read from the HOST copy and incremented, which is what makes the
+// write idempotent across replays of the same graph - a captured literal would ring the same number
+// forever and the host would never see a change.
+strata::kernels::doorbell_ring(db->d_seq, stream);    }    return true;}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+bool moe_shared(const WeightTable& tables, const ModelGeometry& g, int64_t layer, const MoEBuffers& b,                const float* x, void* stream, std::string& err) {    using namespace strata::kernels;    const LayerView v(tables, layer);    const WeightRef* w_ginp = v.get("ffn_gate_inp_shexp.weight");    const WeightRef* w_sgate = v.get("ffn_gate_shexp.weight");    const WeightRef* w_sup = v.get("ffn_up_shexp.weight");    const WeightRef* w_sdown = v.get("ffn_down_shexp.weight");    const char* missing = !w_ginp ? "ffn_gate_inp_shexp.weight" : !w_sgate ? "ffn_gate_shexp.weight"                          : !w_sup ? "ffn_up_shexp.weight" : !w_sdown ? "ffn_down_shexp.weight" : nullptr;    if (missing) { err = v.name(missing) + " is missing"; return false; }
+// ---- the shared expert.  Its three weights are quantized, so they need their planes.
+SForm f_gate, f_up, f_down;    if (!sform_of(*w_sgate, f_gate, v.name("ffn_gate_shexp.weight"), err)) return false;    if (!sform_of(*w_sup, f_up, v.name("ffn_up_shexp.weight"), err)) return false;    if (!sform_of(*w_sdown, f_down, v.name("ffn_down_shexp.weight"), err)) return false;    Planes p_gate, p_up, p_down;    if (!plane_ptrs(*w_sgate, v.name("ffn_gate_shexp.weight"), p_gate, err)) return false;    if (!plane_ptrs(*w_sup, v.name("ffn_up_shexp.weight"), p_up, err)) return false;    if (!plane_ptrs(*w_sdown, v.name("ffn_down_shexp.weight"), p_down, err)) return false;
+// `ffn_gate_inp_shexp` is a 1-D BF16 vector, so THE ARENA HOLDS 2 BYTES PER ELEMENT, not 4 - the loader
+// re-rounded it to the engine form like any other BF16 tensor.  Reading it as f32 is 5120 bytes past the
+// end of a 5120-byte tensor inside a 4.5 GiB arena, where nothing faults.  Refuse here rather than trust
+// the layout check to have run: this function is reachable without it.
+if (w_ginp->kind != WeightKind::Bf16InF32) {        err = v.name("ffn_gate_inp_shexp.weight") + " is engine form " +              std::to_string((int) w_ginp->kind) + " (" + std::to_string(w_ginp->bytes) +              " B); the scalar gate reads it as bf16, so it must be form 1 (" +              std::to_string((uint64_t) g.n_embd * 2) + " B)";        return false;    }
+// THE SHARED EXPERT'S WEIGHTS ARE NOT ONE FAMILY: `ffn_gate_shexp` is Q2_0 on 21 layers and a K-quant on
+// the rest, `ffn_up_shexp` Q2_0 on 13, and `ffn_down_shexp` is LEGACY in every layer (IQ4_NL/Q4_0/Q5_0/
+// Q8_0/Q2_0, `n_in` 640 so Q8_K is impossible).  So BOTH quantized images of the activation are produced
+// and each projection takes the one its own form asks for.
+f32_to_bf16_bulk(x, b.x_bf16, g.n_embd, stream);
+    if (!w_sgate->native_data || !w_sup->native_data) {
+        quantize_q8_K(x, b.x_q8k, g.n_embd, stream);
+        quantize_q8_0(x, b.x_q8_0, g.n_embd, stream);
+    }
+    NativeSharedWeights native;
+    native.gate_type = w_sgate->native_type; native.gate_data = w_sgate->native_data;
+    native.up_type = w_sup->native_type; native.up_data = w_sup->native_data;
+    native.down_type = w_sdown->native_type; native.down_data = w_sdown->native_data;
+    // The NativeDense owner publishes one shared workspace for this ordered session stream.
+    native.q8_1 = w_sgate->native_q8_1 ? w_sgate->native_q8_1 :
+                  w_sup->native_q8_1 ? w_sup->native_q8_1 : w_sdown->native_q8_1;
+    try {
+        shared_expert(b.x_q8_0, b.x_q8k, b.x_bf16, f_gate, p_gate.codes, p_gate.scales, p_gate.offset,
+                      f_up, p_up.codes, p_up.scales, p_up.offset, f_down, p_down.codes, p_down.scales,
+                      p_down.offset, (const uint16_t*) w_ginp->data, b.sh_scratch, b.shared,
+                      g.n_embd, g.n_ff, /*tpr=*/32, stream, x, &native);
+    } catch (const std::exception& error) {
+        err = v.name("shared_expert") + ": " + error.what();
+        return false;
+    }
+    return true;
+}
+bool moe_combine_parts(const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b, const float* parts,
+                       float* out, void* stream, std::string& err) {
+    using namespace strata::kernels;
+    if (k < 1 || k > 64) { err = "moe_finish: k must be 1..64"; return false; }
+    // ---- the combination: sum of w[i] * parts[i], plus the shared output ADDED PLAIN.
+//
+// **`parts` IS COMBINED WITH `b.weights`, WHICH `moe_route` WROTE FOR *THIS* LAYER.**  That is the whole
+// reason this is a separate function: a caller that passes the previous layer's expert vectors gets
+// `sum_j w_l[j] * expert_{ids_{l-1},j}(x_{l-1})`, which is finite, fluent and not the model.
+try {
+    if (native_moe_combine_enabled()) native_moe_combine(parts, b.weights, b.shared, out, g.n_embd, k, stream);
+    else moe_combine(parts, b.weights, b.shared, out, g.n_embd, k, stream);
+} catch (const std::exception& error) {
+    err = "blk." + std::to_string(layer) + ".moe_combine" + ": " + error.what();
+    return false;
+}
+return true;}
+bool moe_finish(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b,
+                const float* x, const float* parts, float* out, void* stream, std::string& err) {
+    if (k < 1 || k > 64) { err = "moe_finish: k must be 1..64"; return false; }
+    if (!moe_shared(tables, g, layer, b, x, stream, err)) return false;
+    return moe_combine_parts(g, layer, k, b, parts, out, stream, err);
+}
+bool layer_verify_compatible(std::string& why) {
+    // Plan v0.3 P6: the verify window reproduces exactly this configuration's per-token arithmetic.
+    if (!native_bf16_projections) why = "the native BF16 projections are off";
+    else if (!g_fused_gr) why = "the fused hyper-connection read is off";
+    else if (!g_fused_gdn || !strata::kernels::native_gdn_enabled()) why = "the fused native GDN kernels are off";
+    else if (!g_fast_attn || native_flash_attn_short) why = "the split-K decode attention is off";
+    else if (!g_fast_select) why = "the block top-k selection is off";
+    else if (!strata::kernels::native_qsa_indexer_enabled()) why = "the native QSA indexer is off";
+    else return true;
+    return false;
+}
+void layer_set_publish_kernel(bool enabled) { g_publish_kernel = enabled; }
+void layer_set_fused_gdn(bool enabled) { g_fused_gdn = enabled; }
+void layer_set_fast_select(bool enabled) { g_fast_select = enabled; }
+void layer_set_fast_attn(bool enabled) { g_fast_attn = enabled; }
+void layer_set_fused_gr(bool enabled) { g_fused_gr = enabled; }
+bool layer_fused_gr() { return g_fused_gr; }
+void layer_set_shared_early(bool enabled) { g_shared_early = enabled; }
+bool layer_shared_early() { return g_shared_early; }
+bool moe_layer(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b,               const float* x, const float* parts, float* out, void* stream, std::string& err,               const Doorbell* db) {
+// The two halves in sequence.  `moe_route` publishes `ids`/`weights` for THIS layer and `moe_finish`
+// combines `parts` with them, so a caller of this wrapper must have `parts` ready BEFORE the call - which
+// is what `session_token` (the uncaptured path) does and what the captured loop CANNOT, which is why the
+// loop uses the halves separately.
+if (!moe_route(tables, g, layer, k, b, x, stream, err, db)) return false;    return moe_finish(tables, g, layer, k, b, x, parts, out, stream, err);}
+// ================================ the QSA mixer ================================
+namespace {using strata::kernels::QsaIndexerBuffers;using strata::kernels::QsaShapes;
+/// The geometry the QSA kernels want, from the one place that defines it.  `ModelGeometry` carries the widths
+/// the LAYOUT needs; `QsaShapes` adds `n_rot`, `idx_block` and `idx_top_k`, which are kernel contracts.
+QsaShapes qsa_shapes(const ModelGeometry& g) {    QsaShapes s = strata::kernels::qsa_real_shapes();    s.n_head = g.n_head;    s.n_head_kv = g.n_head_kv;    s.head_dim = g.head_dim;    s.idx_n_head = g.idx_q_heads;    s.idx_dim = g.idx_key_dim;    return s;}
+uint64_t align_up16(uint64_t n) { return (n + 15) & ~15ull; }
+/// One cursor over an arena, so every region is 16-byte aligned without a list of hand-added offsets.
+struct Cursor {    uint8_t* p;    uint64_t used = 0;    template <typename T>    T* take(uint64_t count) {        T* r = (T*) (p + used);        used = align_up16(used + count * sizeof(T));        return r;    }    uint8_t* take_bytes(uint64_t n) {        uint8_t* r = p + used;        used = align_up16(used + n);        return r;    }};
+// `TPR` and `gemv_quantized` live in the FIRST anonymous namespace, above, because `gdn_layer` needs the
+// dispatch too and the two must not be able to drift.
+}
+// namespace
+namespace {
+// KV streaming (docs/kv-streaming-design.md): 0 keeps every cell in VRAM.
+int64_t g_kv_resident = 0;
+uint64_t g_kv_host_bytes = 0;
+
+/// How one state holds its K/V: `mode` as in QsaState::kv_mode, `slots` VRAM pages of `pages` logical ones.
+struct KvPlan {
+    int mode = 0;
+    int64_t pages = 0, slots = 0, pooled_rows = 0;
+};
+KvPlan kv_plan(const QsaShapes& s, int64_t max_cells, int64_t ring_cells) {
+    KvPlan p;
+    p.pages = (max_cells + s.page_size - 1) / s.page_size;
+    p.slots = p.pages;
+    p.pooled_rows = max_cells / s.idx_block + 2;
+    if (g_kv_resident <= 0 || ring_cells < 0) return p;   // ring_cells < 0: always fully resident
+    // A/B only: STRATA_KV_RING_OFF keeps the drafter fully resident, STRATA_KV_MAIN_OFF the main layers
+    static const bool ring_off = std::getenv("STRATA_KV_RING_OFF") != nullptr;
+    static const bool main_off = std::getenv("STRATA_KV_MAIN_OFF") != nullptr;
+    if (ring_cells > 0 ? ring_off : main_off) return p;
+    if (ring_cells > 0) {
+        const int64_t r = (ring_cells + s.page_size - 1) / s.page_size;
+        if (r < p.pages) { p.mode = 2; p.slots = r; p.pooled_rows = 2; }   // the drafter has no indexer
+    } else {
+        const int64_t r = (std::max(g_kv_resident, qsa_kv_resident_min()) + s.page_size - 1) / s.page_size;
+        if (r < p.pages) { p.mode = 1; p.slots = r; }
+    }
+    return p;
+}
+uint64_t kv_pool_bytes(const QsaShapes& s, int64_t pages) {
+    if (g_kv_q4) return (uint64_t) pages * s.page_size * strata::kernels::kv_q4_bytes_per_cell(s) + 64;
+    return g_kv_int8 ? (uint64_t) pages * s.page_size * strata::kernels::kv_q8_bytes_per_cell(s) + 64
+                     : (uint64_t) pages * s.n_head_kv * s.page_size * s.head_dim * 2 * 2;
+}
+}  // namespace
+
+void qsa_set_kv_resident(int64_t cells) { g_kv_resident = cells > 0 ? cells : 0; }
+int64_t qsa_kv_resident() { return g_kv_resident; }
+int64_t qsa_kv_resident_min() { return 20480; }
+uint64_t qsa_kv_host_bytes() { return g_kv_host_bytes; }
+
+uint64_t qsa_state_bytes(const ModelGeometry& g, int64_t max_cells, bool with_rope, int64_t ring_cells) {
+    const QsaShapes s = qsa_shapes(g);
+    const KvPlan p = kv_plan(s, max_cells, ring_cells);
+    uint64_t n = 0;
+    n += kv_pool_bytes(s, p.slots) + 4 * 16;                                   // K/V pools (the VRAM slots)
+    n += (uint64_t) p.pages * 4;                                               // page_table
+    if (p.mode == 1) n += strata::kernels::kv_stream_map_bytes(p.slots) + 6 * 16;   // the residency map
+    n += (uint64_t) (s.idx_block - 1) * s.idx_dim * 4;                         // tail
+    n += (uint64_t) s.idx_dim * 4;                                             // dead
+    n += (uint64_t) p.pooled_rows * s.idx_dim * 4;                             // pooled
+    n += 16;                                                                   // block_pos
+    if (with_rope) n += (uint64_t) max_cells * (s.n_rot / 2) * 4 * 2;          // cos + sin tables
+    n += strata::kernels::qsa_step_bytes() + 16;                               // counts and aligned attention status
+    n += (uint64_t) s.n_head * 4;                                              // pos_dev
+    return align_up16(n) + 256;
+}
+
+uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
+                        QsaState &st, const QsaState *share_rope,
+                        int64_t ring_cells) try {
+    const QsaShapes s = qsa_shapes(g);
+    const KvPlan p = kv_plan(s, max_cells, ring_cells);
+    const int64_t pages = p.pages;
+    Cursor c{(uint8_t*) base};
+    st.kv_int8 = g_kv_int8 && !g_kv_q4;
+    st.kv_q4 = g_kv_q4;
+    st.kv_mode = p.mode;
+    st.n_slots = p.slots;
+    const uint64_t rows = (uint64_t) p.slots * s.n_head_kv * s.page_size;   // VRAM rows: the slots
+    const uint64_t q4_row = strata::kernels::kv_q4_bytes_per_head((int) s.head_dim);
+    if (st.kv_q4) {
+        st.k_q4 = c.take<uint8_t>(rows * q4_row);
+        st.v_q4 = c.take<uint8_t>(rows * q4_row);
+    } else if (g_kv_int8) {
+        st.k_q = c.take<int8_t>(rows * s.head_dim);
+        st.v_q = c.take<int8_t>(rows * s.head_dim);
+        st.k_scale = c.take<uint16_t>(rows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
+        st.v_scale = c.take<uint16_t>(rows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
+    } else {
+        st.k_pool = c.take<uint16_t>(rows * s.head_dim);
+        st.v_pool = c.take<uint16_t>(rows * s.head_dim);
+    }
+    st.page_table = c.take<int32_t>((uint64_t) pages);
+    st.n_pages = pages;
+    st.max_cells = max_cells;
+    st.map = strata::kernels::KvStreamMap{};
+    st.map.page_table = st.page_table;
+    st.map.n_blocks = pages;
+    st.map.n_slots = p.slots;
+    if (p.mode == 1) {
+        st.map.slot_block = c.take<int32_t>((uint64_t) p.slots);
+        st.map.slot_stamp = c.take<int32_t>((uint64_t) p.slots);
+        st.map.slot_ref = c.take<int32_t>((uint64_t) p.slots);
+        st.map.miss_block = c.take<int32_t>((uint64_t) p.slots);
+        st.map.miss_slot = c.take<int32_t>((uint64_t) p.slots);
+        st.map.ctl = c.take<int32_t>((uint64_t) strata::kernels::kKvCtlInts);
+    }
+    st.idx_tail = c.take<float>((uint64_t) (s.idx_block - 1) * s.idx_dim);
+    st.idx_dead = c.take<float>((uint64_t) s.idx_dim);
+    st.idx_pooled_rows = p.pooled_rows;
+    st.idx_pooled = c.take<float>((uint64_t) p.pooled_rows * s.idx_dim);
+    st.idx_block_pos = c.take<int32_t>(1);
+    if (share_rope != nullptr) {
+        st.cos_tab = share_rope->cos_tab;
+        st.sin_tab = share_rope->sin_tab;
+    } else {
+        st.cos_tab = c.take<float>((uint64_t) max_cells * (s.n_rot / 2));
+        st.sin_tab = c.take<float>((uint64_t) max_cells * (s.n_rot / 2));
+    }
+    st.step = c.take<int32_t>((uint64_t) strata::kernels::kStepCount);
+    st.attention_status = c.take<int32_t>(1);
+    st.pos_dev = c.take<int32_t>((uint64_t) s.n_head);
+    // the pinned staging the uploads copy FROM - see the note on `host_step` in the header
+    if (DPCT_CHECK_ERROR(
+            st.host_step = (int32_t *)sycl::malloc_host(
+                strata::kernels::qsa_step_bytes() + sizeof(int32_t),
+                dpct::get_in_order_queue())) != 0 ||
+        /*
+        DPCT1048:8: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        /*
+        DPCT1048:9: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        DPCT_CHECK_ERROR(
+            st.host_pos = (int32_t *)sycl::malloc_host(
+                (size_t)s.n_head * 4, dpct::get_in_order_queue())) != 0) {
+        return 0;   // the caller sees a zero byte count; a half-built state is worse than none
+    }
+    st.host_step[strata::kernels::kStepCount] = 0;
+    // KV streaming: the authoritative K/V of every cell, pinned and device-mapped, in the identity layout
+    st.host = strata::kernels::KvHostPools{};
+    if (p.mode != 0) {
+        const uint64_t hrows = (uint64_t) pages * s.n_head_kv * s.page_size;
+        const uint64_t bytes = (uint64_t) pages * strata::kernels::kv_block_bytes(s, qsa_kv_format(st)) + 4 * 256;
+        uint8_t* h = nullptr;
+        uint8_t* d = nullptr;
+        /*
+        DPCT1048:10: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        /*
+        DPCT1048:11: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        if (DPCT_CHECK_ERROR(h = (uint8_t *)sycl::malloc_host(
+                                 bytes, dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(*(void **)&d = (uint8_t *)h) != 0) {
+            // under WSL the NVIDIA driver pins only ~1 GiB in all, which is less than 128K of 8-bit KV needs
+            if (p.mode == 1) std::fprintf(stderr, "strata: KV streaming: cannot pin %.2f GiB of RAM for a layer's KV copy "
+                                 "(%.2f GiB pinned so far) - lower the context, or run without --kv-resident (under "
+                                 "WSL the driver pins only about 1 GiB in all)\n", (double) bytes / 1073741824.0,
+                                 (double) g_kv_host_bytes / 1073741824.0);
+            return 0;
+        }
+        g_kv_host_bytes += bytes;
+        Cursor hc{d};
+        if (st.kv_q4) {
+            st.host.k_q4 = hc.take<uint8_t>(hrows * q4_row);
+            st.host.v_q4 = hc.take<uint8_t>(hrows * q4_row);
+        } else if (g_kv_int8) {
+            st.host.k_q = hc.take<int8_t>(hrows * s.head_dim);
+            st.host.v_q = hc.take<int8_t>(hrows * s.head_dim);
+            st.host.k_scale = hc.take<uint16_t>(hrows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
+            st.host.v_scale = hc.take<uint16_t>(hrows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
+        } else {
+            st.host.k_pool = hc.take<uint16_t>(hrows * s.head_dim);
+            st.host.v_pool = hc.take<uint16_t>(hrows * s.head_dim);
+        }
+    }
+    // THE ROPE TABLE IS BUILT ON THE HOST IN FLOAT64 and uploaded once, because the reference computes its
+    // frequencies in float64 and reproducing that on device means double-precision `pow`/`cos` that need not
+    // agree with the host's libm.  A table shorter than the sequence would have the rotation read past it.
+    if (share_rope == nullptr) {
+        std::vector<float> hc((size_t) max_cells * (s.n_rot / 2)), hs((size_t) max_cells * (s.n_rot / 2));
+        strata::kernels::build_rope_table((int) s.n_rot, strata::kernels::qsa_freq_base(), (int) max_cells,
+                                          hc.data(), hs.data());
+        dpct::get_in_order_queue()
+            .memcpy(st.cos_tab, hc.data(), hc.size() * 4)
+            .wait();
+        dpct::get_in_order_queue()
+            .memcpy(st.sin_tab, hs.data(), hs.size() * 4)
+            .wait();
+    }
+    // the page table starts as the IDENTITY, which is the simplest legal mapping and what a caller that does
+    // not page at all wants; a streamed state starts with nothing resident, a ring at `block % n_slots`.
+    if (p.mode == 0) {
+        std::vector<int32_t> tab((size_t) pages);
+        for (int64_t i = 0; i < pages; ++i) tab[(size_t) i] = (int32_t) i;
+        dpct::get_in_order_queue()
+            .memcpy(st.page_table, tab.data(), tab.size() * 4)
+            .wait();
+    } else if (p.mode == 1) {
+        strata::kernels::kv_stream_reset(st.map, nullptr);
+    } else {
+        strata::kernels::kv_ring_table(st.page_table, pages, p.slots, nullptr);
+    }
+    dpct::get_current_device().queues_wait_and_throw();
+    return c.used;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void qsa_state_zero(const QsaState& st, const ModelGeometry& g, void* stream) {
+    const QsaShapes s = qsa_shapes(g);
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const size_t rows = (size_t) st.n_slots * s.n_head_kv * s.page_size;
+    if (st.kv_q4) {
+        cs->memset(st.k_q4, 0,
+                   rows *
+                       strata::kernels::kv_q4_bytes_per_head((int)s.head_dim));
+        cs->memset(st.v_q4, 0,
+                   rows *
+                       strata::kernels::kv_q4_bytes_per_head((int)s.head_dim));
+    } else if (st.kv_int8) {
+        cs->memset(st.k_q, 0, rows * s.head_dim);
+        cs->memset(st.v_q, 0, rows * s.head_dim);
+        cs->memset(st.k_scale, 0,
+                   rows * (s.head_dim / strata::kernels::KV_Q8_GROUP) * 2);
+        cs->memset(st.v_scale, 0,
+                   rows * (s.head_dim / strata::kernels::KV_Q8_GROUP) * 2);
+    } else {
+        cs->memset(st.k_pool, 0, rows * s.head_dim * 2);
+        cs->memset(st.v_pool, 0, rows * s.head_dim * 2);
+    }
+    // A streamed state starts over with nothing resident. Its host copy is not cleared (GBs over PCIe per new
+    // conversation): no reader names a cell before this sequence has written it, and a block copied in whole
+    // carries the unwritten cells past the end, which nothing reads.
+    if (st.kv_mode == 1) strata::kernels::kv_stream_reset(st.map, stream);
+    cs->memset(st.idx_tail, 0, (size_t)(s.idx_block - 1) * s.idx_dim * 4);
+    cs->memset(st.idx_dead, 0, (size_t)s.idx_dim * 4);
+    cs->memset(st.idx_pooled, 0, (size_t)st.idx_pooled_rows * s.idx_dim * 4);
+}
+
+strata::kernels::QsaAttnPools qsa_attn_pools(const QsaState& st) {
+    strata::kernels::QsaAttnPools pools;
+    pools.page_table = st.page_table;
+    if (st.kv_q4) { pools.k_q4 = st.k_q4; pools.v_q4 = st.v_q4; }
+    else if (st.kv_int8) { pools.k_q = st.k_q; pools.v_q = st.v_q; pools.k_scale = st.k_scale; pools.v_scale = st.v_scale; }
+    else { pools.k_pool = st.k_pool; pools.v_pool = st.v_pool; }
+    return pools;
+}
+
+void qsa_kv_resolve(const QsaState& st, const ModelGeometry& g, const int32_t* ids, const int32_t* steps, int64_t n_q,
+                    int64_t cap, void* stream) {
+    if (st.kv_mode != 1) return;
+    strata::kernels::kv_stream_resolve(st.map, qsa_attn_pools(st), st.host, qsa_kv_format(st), ids, steps, n_q, cap,
+                                       qsa_shapes(g), stream);
+}
+
+uint64_t qsa_buffers_bytes(const ModelGeometry& g, int64_t max_cells) {    const QsaShapes s = qsa_shapes(g);    const int64_t cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);    uint64_t n = 0;    n += (uint64_t) q8k_bytes(g.n_embd);    n += (uint64_t) (g.n_embd / 32) * 34;
+// block_q8_0
+n += (uint64_t) g.n_embd * 2;    n += (uint64_t) g.n_head * 2 * g.head_dim * 4;    n += (uint64_t) g.n_head * g.head_dim * 4;    n += (uint64_t) g.n_head_kv * g.head_dim * 4 * 2;    n += (uint64_t) g.idx_key_dim * 4;    n += (uint64_t) g.idx_q_heads * g.idx_key_dim * 4;    n += (uint64_t) max_cells * 4;    n += (uint64_t) cap * 4;    n += (uint64_t) cap * g.n_head_kv * g.head_dim * 2 * 2;    n += (uint64_t) g.n_head * g.head_dim * 4;
+// attn
+n += (uint64_t) g.n_head * g.head_dim * 2;
+// attn16
+n += (uint64_t) g.n_head * g.head_dim * 4;
+// attn32
+n += (uint64_t) q8k_bytes(g.n_head * g.head_dim);
+// attn_q8k
+n += strata::kernels::qsa_decode_attn_scratch_floats(cap, s) * 4 + 16;
+// attn_scratch
+return align_up16(n) + 256;}
+uint64_t qsa_buffers_init(const ModelGeometry& g, int64_t max_cells, void* base, QsaBuffers& b) {    const QsaShapes s = qsa_shapes(g);    const int64_t cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);    Cursor c{(uint8_t*) base};    b.x_q8k = c.take_bytes(q8k_bytes(g.n_embd));    b.x_q8_0 = c.take_bytes((uint64_t) (g.n_embd / 32) * 34);    b.x_bf16 = c.take<uint16_t>((uint64_t) g.n_embd);    b.q_full = c.take<float>((uint64_t) g.n_head * 2 * g.head_dim);    b.qcur = c.take<float>((uint64_t) g.n_head * g.head_dim);    b.kcur = c.take<float>((uint64_t) g.n_head_kv * g.head_dim);    b.vcur = c.take<float>((uint64_t) g.n_head_kv * g.head_dim);    b.idx_raw = c.take<float>((uint64_t) g.idx_key_dim);    b.q_idx = c.take<float>((uint64_t) g.idx_q_heads * g.idx_key_dim);    b.cell_scores = c.take<float>((uint64_t) max_cells);    b.ids = c.take<int32_t>((uint64_t) cap);    b.k_scratch = c.take<uint16_t>((uint64_t) cap * g.n_head_kv * g.head_dim);    b.v_scratch = c.take<uint16_t>((uint64_t) cap * g.n_head_kv * g.head_dim);    b.attn = c.take<float>((uint64_t) g.n_head * g.head_dim);    b.attn16 = c.take<uint16_t>((uint64_t) g.n_head * g.head_dim);    b.attn32 = c.take<float>((uint64_t) g.n_head * g.head_dim);    b.attn_q8k = c.take_bytes(q8k_bytes(g.n_head * g.head_dim));    b.attn_scratch = c.take<float>(strata::kernels::qsa_decode_attn_scratch_floats(cap, s));    return c.used;}
+// ================================ PER-STAGE TIMING, DEBUG ONLY ================================
+//
+// **THE ENGINE SPENDS 1.047 ms PER LAYER WITH THE EXPERTS OFF, AND EVERY COST MODEL IN `bench/` PREDICTS LESS
+// THAN HALF OF THAT.**  `dense_pass.exe` puts all 302 dense GEMVs at 11.64 ms/token and the 1.377 GiB of
+// BF16/F32 weights they exclude at another ~5.9, so ~17.5 ms of the 50.25 ms captured no-pool floor is
+// accounted for and ~33 ms is not.  Arithmetic has already discounted the obvious candidates - the GDN
+// recurrence moves 6.2 MB of state per token, the QSA attention at 1,024 tokens is 75M MACs over twelve
+// layers, and `gr_norm_kernel`'s 4-block launch moves 40 KB - so the attribution has to come from the engine.
+//
+// Event pairs are recorded per (layer, stage) and read once at the end, so **NOTHING IS SYNCHRONISED DURING
+// THE RUN** and the measurement does not perturb what it measures.  That matters here more than usual: a
+// per-stage `cudaEventSynchronize` would serialise the pipeline and report the serialised time.
+//
+// **IT CANNOT BE USED WITH CAPTURED GRAPHS.**  An event record inside a stream capture is silently dropped
+// (round 199: 2 nodes for two kernels plus an event record, and the event never completed across a 41 ms
+// graph), so this is gated on the `--no-capture` path where the layers are ordinary launches.
+constexpr int STAGE_SLOTS = 20;
+
+struct StageTimer {
+    bool on = false;
+    dpct::event_ptr a[64][STAGE_SLOTS] = {};
+    dpct::event_ptr b[64][STAGE_SLOTS] = {};
+    const char* names[STAGE_SLOTS] = {};
+    int nslots = 0;
+};
+
+static StageTimer g_st;
+
+bool stage_timing_enable() try {
+    if (g_st.on) return true;
+    for (int l = 0; l < 64; ++l) {
+        for (int s = 0; s < STAGE_SLOTS; ++s) {
+            if (DPCT_CHECK_ERROR(g_st.a[l][s] = new sycl::event()) !=
+                0) return false;
+            if (DPCT_CHECK_ERROR(g_st.b[l][s] = new sycl::event()) !=
+                0) return false;
+        }
+    }
+    g_st.on = true;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void stage_timing_name(int slot, const char* name) {
+    if (slot >= 0 && slot < STAGE_SLOTS) {
+        g_st.names[slot] = name;
+        if (slot + 1 > g_st.nslots) g_st.nslots = slot + 1;
+    }
+}
+
+void stage_mark_begin(int64_t layer, int slot, void* stream) { st_begin(layer, slot, stream); }
+void stage_mark_end(int64_t layer, int slot, void* stream) { st_end(layer, slot, stream); }
+
+static void st_begin(int64_t layer, int slot, void* stream) {
+    if (g_st.on && layer < 64)
+        dpct::sync_barrier(g_st.a[layer][slot], strata::q_of(stream));
+}
+
+static void st_end(int64_t layer, int slot, void* stream) {
+    if (g_st.on && layer < 64)
+        dpct::sync_barrier(g_st.b[layer][slot], strata::q_of(stream));
+}
+
+void stage_timing_report(int64_t n_layers) try {
+    if (!g_st.on) return;
+    dpct::get_current_device().queues_wait_and_throw();
+    double tot[STAGE_SLOTS] = {};
+    for (int s = 0; s < g_st.nslots; ++s) {
+        for (int64_t l = 0; l < n_layers && l < 64; ++l) {
+            float ms = 0.0f;
+            if (DPCT_CHECK_ERROR(
+                    ms = (g_st.b[l][s]
+                              ->get_profiling_info<
+                                  sycl::info::event_profiling::command_end>() -
+                          g_st.a[l][s]
+                              ->get_profiling_info<sycl::info::event_profiling::
+                                                       command_start>()) /
+                         1000000.0f) == 0) tot[s] += (double)ms;
+        }
+    }
+    double sum = 0;
+    for (int s = 0; s < g_st.nslots; ++s) sum += tot[s];
+    std::fprintf(stderr, "\nper-stage GPU time, summed over %lld layers (one token):\n", (long long) n_layers);
+    for (int s = 0; s < g_st.nslots; ++s) {
+        std::fprintf(stderr, "  %-22s %8.3f ms/token   %6.3f ms/layer   %5.1f%%\n",
+                     g_st.names[s] ? g_st.names[s] : "(unnamed)", tot[s], tot[s] / (double) n_layers,
+                     sum > 0 ? 100.0 * tot[s] / sum : 0.0);
+    }
+    std::fprintf(stderr, "  %-22s %8.3f ms/token\n", "sum of stages", sum);
+    // ---- THE PER-LAYER SPLIT, because the attention block is 55% of the token and the engine mixes two
+    // entirely different attention implementations: GDN on 36 layers and QSA on the twelve where
+    // `full_attention_interval` divides the index.  A single total cannot say which one is expensive, and the
+    // two have nothing in common to optimise.
+    std::fprintf(stderr, "\nper-layer, the attention block (ms).  A `*` marks a QSA layer:\n");
+    double gdn = 0, qsa = 0;
+    int ng = 0, nq = 0;
+    for (int64_t l = 0; l < n_layers && l < 64; ++l) {
+        float ms = 0.0f;
+        if (DPCT_CHECK_ERROR(
+                ms = (g_st.b[l][1]
+                          ->get_profiling_info<
+                              sycl::info::event_profiling::command_end>() -
+                      g_st.a[l][1]
+                          ->get_profiling_info<
+                              sycl::info::event_profiling::command_start>()) /
+                     1000000.0f) != 0) continue;
+        const bool is_qsa = (l % 4) == 3;
+        if (is_qsa) { qsa += ms; ++nq; } else { gdn += ms; ++ng; }
+        std::fprintf(stderr, "  %s%2lld %7.3f%s", is_qsa ? "*" : " ", (long long) l, (double) ms,
+                     ((l + 1) % 8 == 0) ? "\n" : "");
+    }
+    std::fprintf(stderr, "\n  GDN: %d layers, %.3f ms total, %.4f ms/layer\n", ng, gdn, ng ? gdn / ng : 0.0);
+    std::fprintf(stderr, "  QSA: %d layers, %.3f ms total, %.4f ms/layer\n", nq, qsa, nq ? qsa / nq : 0.0);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// Declared here because `qsa_layer` is defined above `block_layer_pre`, where the body lives.  The dump buffer
+// is a plain host pointer and the copy is a graph node of whichever layer's capture is running, so the helper
+// needs nothing from the layer it is called for beyond its index.
+static void dump_slot(float* dump, const ModelGeometry& g, int64_t layer, const float* src, uint64_t off,
+                      uint64_t n, void* stream);
+bool qsa_layer(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t pos, int32_t pos_base,               const QsaState& st, const QsaBuffers& b, const float* x, float* out, void* stream,               std::string& err, float* dump) {    using namespace strata::kernels;    const QsaShapes s = qsa_shapes(g);    const LayerView v(tables, layer);    const int64_t n_kv = pos + 1;    /* P7 audit: RoPE reads cos/sin row pos_base + pos, and the table holds max_cells rows. */    if ((int64_t) pos_base + pos >= st.max_cells || pos_base < 0) {        err = "qsa_layer: position " + std::to_string((long long) pos_base + pos) + " is outside the RoPE table (" + std::to_string((long long) st.max_cells) + " rows)";        return false;    }    const int64_t n_bid = n_kv / s.idx_block;    const int64_t width = qsa_selection_width(n_kv, s);    const int64_t cap = qsa_selection_width(kTopkMaxCells, s);
+const auto normalize_rotate = [&](float* data, const WeightRef* norm, int rows, int cols) {
+    try {
+        if (native_qsa_enabled()) native_qsa_rms_norm_weighted(data, (const float*) norm->data, data, cols, rows, RMS_EPS, stream);
+        else rms_norm_weighted(data, (const float*) norm->data, rows, cols, RMS_EPS, stream);
+        if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), st.pos_dev, stream);
+        else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st.cos_tab, st.sin_tab, st.pos_dev, stream);
+        return true;
+    } catch (const std::exception& error) {
+        err = v.name("qsa_norm_rope") + ": " + error.what();
+        return false;
+    }
+};
+// ---- resolve every tensor by name, and REFUSE rather than reading a null.  `check_layer` has already
+// asserted the shapes at load time; a missing name here is a wiring mistake.
+struct Req { const char* suf; };    const WeightRef* w_idxk = v.get("indexer.k_proj.weight");    const WeightRef* w_attnq = v.get("attn_q.weight");    const WeightRef* w_attnk = v.get("attn_k.weight");    const WeightRef* w_attnv = v.get("attn_v.weight");    const WeightRef* w_attno = v.get("attn_output.weight");    const WeightRef* w_idxq = v.get("indexer.q_proj.weight");    const WeightRef* w_qn = v.get("attn_q_norm.weight");    const WeightRef* w_kn = v.get("attn_k_norm.weight");    const WeightRef* w_iqn = v.get("indexer.q_norm.weight");    const WeightRef* w_ikn = v.get("indexer.k_norm.weight");    const char* missing = !w_idxk ? "indexer.k_proj.weight" : !w_attnq ? "attn_q.weight"                          : !w_attnk ? "attn_k.weight" : !w_attnv ? "attn_v.weight"                          : !w_attno ? "attn_output.weight" : !w_idxq ? "indexer.q_proj.weight"                          : !w_qn ? "attn_q_norm.weight" : !w_kn ? "attn_k_norm.weight"                          : !w_iqn ? "indexer.q_norm.weight" : !w_ikn ? "indexer.k_norm.weight" : nullptr;    if (missing) { err = v.name(missing) + " is missing"; return false; }    if (pos < 0 || pos >= st.max_cells) {        err = "qsa_layer: pos " + std::to_string(pos) + " is outside the state's 0.." +              std::to_string(st.max_cells - 1);        return false;    }
+// THE TWO BF16 PROJECTIONS: the arena holds them re-rounded to 2 B/elem, which is what `bf16_gemv` wants.
+// Reading one as f32 would walk 2x its length inside the arena without faulting.
+if (w_idxk->kind != WeightKind::Bf16InF32 || w_idxq->kind != WeightKind::Bf16InF32) {        err = v.name("indexer.*_proj.weight") + " must be engine form 1 (bf16); they are " +              std::to_string((int) w_idxk->kind) + " and " + std::to_string((int) w_idxq->kind);        return false;    }
+// ---- 1. the three activation formats, once each
+if (!w_attnk->native_data || !w_attnv->native_data || !w_attnq->native_data) {
+        quantize_q8_K(x, b.x_q8k, g.n_embd, stream);
+        quantize_q8_0(x, b.x_q8_0, g.n_embd, stream);
+    }
+    if (!native_bf16_projections) f32_to_bf16_bulk(x, b.x_bf16, g.n_embd, stream);
+// ---- 2. the step state: ONE H2D carries every per-token count the kernels need.  Nothing below passes a
+// per-token scalar as an argument, which is what keeps this layer capturable.
+//
+// THE SOURCES ARE `st.host_step`/`st.host_pos`, WHICH LIVE AS LONG AS THE STATE DOES.  A stack array or a
+// local vector here would be captured as a dangling POINTER and replayed as garbage - see the note in
+// `layer.hpp`.  That is a silent failure, not a fault: the copy succeeds, the counts are wrong, and the
+// token that comes out is plausible.
+{        qsa_step_fill(st.host_step, pos, s);        for (int64_t h = 0; h < g.n_head; ++h) st.host_pos[h] = (int32_t) (pos_base + pos);
+        int32_t* m_step = nullptr;
+        int32_t* m_pos = nullptr;
+        if (g_publish_kernel &&
+            DPCT_CHECK_ERROR(*(void **)&m_step = (int32_t *)st.host_step) ==
+                0 &&
+            DPCT_CHECK_ERROR(*(void **)&m_pos = (int32_t *)st.host_pos) == 0) {
+            strata::kernels::copy_i32_from_mapped(st.step, m_step, strata::kernels::kStepCount, stream);
+            strata::kernels::copy_i32_from_mapped(st.pos_dev, m_pos, g.n_head, stream);
+        } else
+        /*
+        DPCT1124:796: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(st.step, st.host_step, qsa_step_bytes())) != 0 ||            DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(st.pos_dev, st.host_pos, (size_t) g.n_head * 4)) != 0) {            err = "qsa_layer: the step-state upload failed";            return false;        }    }
+// ---- 3. the indexer's RAW key: appended before any norm, pooled later once per block
+project_bf16(x, b.x_bf16, (const uint16_t*) w_idxk->data, b.idx_raw, g.n_embd, g.idx_key_dim, false, stream);
+// ---- 4. K and V, in Q8_K, then norm and rotate K only
+SForm f_k, f_v, f_o, f_q;    if (!sform_of(*w_attnk, f_k, v.name("attn_k.weight"), err)) return false;    if (!sform_of(*w_attnv, f_v, v.name("attn_v.weight"), err)) return false;    if (!sform_of(*w_attno, f_o, v.name("attn_output.weight"), err)) return false;    if (!sform_of(*w_attnq, f_q, v.name("attn_q.weight"), err)) return false;    Planes p_k, p_v, p_o, p_q;    if (!plane_ptrs(*w_attnk, v.name("attn_k.weight"), p_k, err)) return false;    if (!plane_ptrs(*w_attnv, v.name("attn_v.weight"), p_v, err)) return false;    if (!plane_ptrs(*w_attno, v.name("attn_output.weight"), p_o, err)) return false;    if (!plane_ptrs(*w_attnq, v.name("attn_q.weight"), p_q, err)) return false;
+// k and v, with the activation THIS layer's tensors ask for.  Both are K-quants in every QSA layer of this
+// artifact, but the dispatch is here for the same reason it is in `gdn_layer`: the pack decides per tensor,
+// and "it happens to be uniform here" is the assumption that was wrong for `attn_q`.
+if (!gemv_quantized(*w_attnk, p_k, f_k, b.x_q8_0, b.x_q8k, b.kcur, g.n_embd, g.n_head_kv * g.head_dim,                        v.name("attn_k.weight"), stream, err, x)) return false;    if (!gemv_quantized(*w_attnv, p_v, f_v, b.x_q8_0, b.x_q8k, b.vcur, g.n_embd, g.n_head_kv * g.head_dim,                        v.name("attn_v.weight"), stream, err, x, w_attnk->native_data && w_attnv->native_data)) return false;    dump_slot(dump, g, layer, b.vcur,                            (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim,                            (uint64_t) g.n_head_kv * g.head_dim, stream);    if (!normalize_rotate(b.kcur, w_kn, (int) g.n_head_kv, (int) g.head_dim)) return false;
+// ---- 5. into the cache, and the indexer's append (which pools AND rotates on a block completion).
+// EVERY ENTRY POINT FROM HERE ON IS THE CAPTURABLE ONE: the per-token counts come from `st.step` and every
+// launch is sized from a capacity in `st`/`b`, so this sequence can be captured and replayed.  The
+// host-scalar wrappers would be correct here today and silently wrong in a graph.
+if (st.kv_q4) {
+    strata::kernels::fwht256_inplace_cuda(b.kcur, g.n_head_kv, stream);   // Q4_0: rotated K and V (kv_q4.hpp)
+    strata::kernels::fwht256_inplace_cuda(b.vcur, g.n_head_kv, stream);
+    strata::kernels::kv_append_q4_step(st.k_q4, st.v_q4, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);
+} else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
+    try {
+        native_qsa_indexer_append(b.idx_raw, st.step + kStepPos, pos_base,
+            (const float*) w_ikn->data, RMS_EPS, ib, s, st.max_cells, (float) qsa_freq_base(), stream);
+    } catch (const std::exception& error) { err = v.name("native_indexer") + ": " + error.what(); return false; }
+} else indexer_key_append(b.idx_raw, st.pos_dev, pos_base, (const float*) w_ikn->data, RMS_EPS, ib, s,
+                          st.cos_tab, st.sin_tab, stream);    }
+// ---- 6. the query projection, and the HALF-SPLIT into q and gate.
+//
+// **`attn_q` IS *NOT* ALWAYS Q2_0.**  It is Q2_0 on TWO of the twelve QSA layers, Q3_K on six and IQ4_XS on
+// four, and this line used to call `s2_gemv_q8` unconditionally - so TEN of the twelve layers decoded an
+// S4 code plane with a Q8_0 activation.  Both are "a quantized activation", both produce a plausible
+// vector, and the difference is 0.6-1.4%.
+if (!gemv_quantized(*w_attnq, p_q, f_q, b.x_q8_0, b.x_q8k, b.q_full, g.n_embd, g.n_head * 2 * g.head_dim,                        v.name("attn_q.weight"), stream, err, x, w_attnv->native_data && w_attnq->native_data)) return false;
+// `per_head[:, :head_dim]` - the FIRST half of each head's 2*head_dim block, copied out contiguously so
+// the norm and the rotation see whole rows.  A 2-D copy is a memcpy node, which captures (`pinned_capture`
+// case A) and needs no kernel.
+/*
+DPCT1124:797: cudaMemcpy2DAsync is migrated to asynchronous memcpy API. While
+the origin API might be synchronous, it depends on the type of operand memory,
+so you may need to call wait() on event return by memcpy API to ensure
+synchronization behavior.
+*/
+if (DPCT_CHECK_ERROR(dpct::async_dpct_memcpy(
+        b.qcur, (size_t)g.head_dim * 4, b.q_full, (size_t)g.head_dim * 2 * 4,
+        (size_t)g.head_dim * 4, (size_t)g.n_head, dpct::device_to_device,
+        *strata::q_of(stream))) != 0) {
+    err = "qsa_layer: the q/gate split failed"; return false;
+} if (!normalize_rotate(b.qcur, w_qn, (int)g.n_head,
+                        (int)g.head_dim)) return false;
+// ---- 7. the indexer's query: BF16, then norm and rotate
+project_bf16(x, b.x_bf16, (const uint16_t*) w_idxq->data, b.q_idx, g.n_embd, g.idx_q_heads * g.idx_key_dim, false, stream);
+if (!normalize_rotate(b.q_idx, w_iqn, (int) g.idx_q_heads, (int) g.idx_key_dim)) return false;
+// ---- 8. score, select, gather, attend.  `max_blocks` and `cap` are CAPACITIES from the state, not this
+// token's counts: a grid or a shared-memory size that follows the sequence length is baked into a captured
+// graph, and the kernels guard for the surplus.    const
+int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
+    if (g_fast_select) {
+        // Plan v0.3 P7: block-level FP32 scores and a radix selection over blocks (qsa_select.hpp).
+        qsa_block_scores(st.idx_pooled, st.idx_dead, b.q_idx, st.step, 1, max_blocks, s, b.cell_scores, stream);
+        qsa_block_topk(b.cell_scores, st.step, 1, max_blocks, cap, s, b.ids, stream);
+    } else {
+    qsa_index_step(st.idx_pooled, b.q_idx, nullptr, s, st.step, max_blocks, b.cell_scores, stream);    topk_512_step(b.cell_scores, s, cap, st.step, b.ids, stream);
+    }
+    // KV streaming: every block the selection names is made resident before anything reads it
+    qsa_kv_resolve(st, g, b.ids, st.step, 1, cap, stream);
+    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(b.qcur, g.n_head, stream);   // <Hq, Hk> = <q, k>
+    if (g_fast_attn && !native_flash_attn_short && dump == nullptr) {
+        const strata::kernels::QsaAttnPools pools = qsa_attn_pools(st);
+        strata::kernels::qsa_decode_attn_step(b.qcur, pools, b.ids, st.step, cap, s, b.attn_scratch, b.attn, stream);
+    } else {
+    if (st.kv_q4) strata::kernels::kv_gather_q4_step(st.k_q4, st.v_q4, st.page_table, b.ids, st.step, cap, s, b.k_scratch, b.v_scratch, stream);
+    else if (st.kv_int8) kv_gather_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, b.ids, st.step, cap, s,                                 b.k_scratch, b.v_scratch, stream);    else kv_gather_step(st.k_pool, st.v_pool, st.page_table, b.ids, st.step, cap, s, b.k_scratch, b.v_scratch,                   stream);    if (native_flash_attn_short) {
+    if (st.max_cells < 1 || st.max_cells > 256 || !st.attention_status || !st.host_step) {
+        err = v.name("native_flash_attn") + ": short adapter requires context <=256 and persistent status storage";
+        return false;
+    }
+    try {
+        native_flash_attn_short_step(b.qcur, b.k_scratch, b.v_scratch, st.step, cap,
+            (int) st.max_cells, s, b.attn, st.attention_status, nullptr, stream);
+    } catch (const std::exception& error) { err = v.name("native_flash_attn") + ": " + error.what(); return false; }
+    /*
+    DPCT1124:798: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+            st.host_step + kStepCount, st.attention_status, sizeof(int32_t))) !=
+        0) {
+        err = v.name("native_flash_attn") + ": status readback failed"; return false;
+    }
+} else qsa_attend_step(b.qcur, b.k_scratch, b.v_scratch, st.step, cap, s, b.attn, nullptr, stream);
+    }
+    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(b.attn, g.n_head, stream);   // the output back: H is self-inverse
+    dump_slot(dump, g, layer, b.attn, (uint64_t) 2 * g.n_embd + 2 * g.hc,                            (uint64_t) g.n_head * g.head_dim, stream);    {        const uint64_t vs = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim +                            (uint64_t) 2 * g.n_head_kv * g.head_dim;        dump_slot(dump, g, layer, (const float*) b.v_scratch, vs,                            (uint64_t) g.n_head_kv * g.head_dim / 2, stream);        dump_slot(dump, g, layer, (const float*) b.ids, vs + (uint64_t) g.n_head_kv * g.head_dim / 2, 4, stream);        dump_slot(dump, g, layer, (const float*) st.step,                            vs + (uint64_t) g.n_head_kv * g.head_dim / 2 + 4, 4, stream);    }
+// ---- 9. Gate the attention output before its projection. Native CUDA keeps F32
+// sigmoid/multiply arithmetic and uses Q8_1 for the native quantized projection.
+// The canonical fallback retains its prior FP64 gate and Q8_K projection.
+try {
+    if (native_qsa_enabled()) native_qsa_gate_apply(b.attn, b.q_full, b.attn32, (int) g.n_head, (int) g.head_dim, stream);
+    else qsa_gate_apply_f32(b.attn, b.q_full, s, b.attn32, stream);
+} catch (const std::exception& error) { err = v.name("qsa_gate") + ": " + error.what(); return false; }
+    if (!w_attno->native_data) quantize_q8_K(b.attn32, b.attn_q8k, g.n_head * g.head_dim, stream);    if (w_attno->native_data) {
+    if (!gemv_quantized(*w_attno, p_o, f_o, nullptr, b.attn_q8k, out,
+        g.n_head * g.head_dim, g.n_embd, v.name("attn_output.weight"), stream, err, b.attn32)) return false;
+} else {
+    s_gemv_q8k_split(b.attn_q8k, p_o.codes, p_o.scales, p_o.offset, out,
+                    g.n_head * g.head_dim, g.n_embd, f_o, stream);
+}    return true;}
+// ================================ THE DOORBELL ================================
+namespace {}
+// namespace
+uint64_t doorbell_init(const ModelGeometry& g, int64_t k, Doorbell& db) {    db.n_embd = g.n_embd;    db.k = k;    uint64_t bytes = 0;
+// ONE region per field, each MAPPED PINNED, so the device and the host have different pointers to the same
+// bytes and no copy is needed to publish them.
+/*
+DPCT1048:12: The original value cudaHostAllocMapped is not meaningful in the
+migrated code and was removed or replaced with 0. You may need to check the
+migrated code.
+*/
+auto alloc = [&](size_t n, void** h, void** d, const char* what) {
+                                                                          try {
+if (DPCT_CHECK_ERROR(*h = (void *)sycl::malloc_host(n, dpct::get_in_order_queue())) != 0) {            std::fprintf(stderr, "doorbell_init: cudaHostAlloc(%s) failed\n", what);            return false;        }        if (DPCT_CHECK_ERROR(*d = (void *)*h) != 0) {            std::fprintf(stderr, "doorbell_init: cudaHostGetDevicePointer(%s) failed\n", what);            return false;        }        std::memset(*h, 0, n);        bytes += n;        return true;    }
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+};    if (!alloc((size_t) g.n_embd * 4, (void**) &db.h_x_f, (void**) &db.d_x_f, "x_f")) return 0;    if (!alloc((size_t) k * 4, (void**) &db.h_ids, (void**) &db.d_ids, "ids")) return 0;    if (!alloc((size_t) k * 4, (void**) &db.h_weights, (void**) &db.d_weights, "weights")) return 0;    if (!alloc(4, (void**) &db.h_seq, (void**) &db.d_seq, "seq")) return 0;    if (!alloc(4, (void**) &db.h_flag, (void**) &db.d_flag, "flag")) return 0;    return bytes;}
+void doorbell_free(Doorbell &db) {
+    if (db.h_x_f) sycl::free(db.h_x_f, dpct::get_in_order_queue());
+    if (db.h_ids) sycl::free(db.h_ids, dpct::get_in_order_queue());
+    if (db.h_weights) sycl::free(db.h_weights, dpct::get_in_order_queue());
+    if (db.h_seq) sycl::free(db.h_seq, dpct::get_in_order_queue());
+    if (db.h_flag) sycl::free(db.h_flag, dpct::get_in_order_queue());
+    db = Doorbell{};
+}
+void doorbell_reset(const Doorbell& db) {
+    if (db.h_seq) *db.h_seq = 0;
+    if (db.h_flag) *(volatile uint32_t*) db.h_flag = 0;
+}
+// ================================ THE TWO ENDS OF A TOKEN ================================
+bool embed_row(const WeightTable& tables, const ModelGeometry& g, int64_t token, float* out_dev,
+               void* stream, std::string& err) {
+    if (const NativeEmbed* ne = native_embed()) {   // plan v0.3 P6: the GGUF-form table (IQ model files)
+        if (token < 0 || out_dev == nullptr) { err = "embed_row: invalid token or output"; return false; }
+        ne->gather_one(token, out_dev, stream);
+        return true;
+    }
+    const WeightRef* w = tables.find(EMBEDDING_NAME);
+    if (w == nullptr) { err = "token_embd.weight is missing"; return false; }
+    if (w->code_bits != 2 && w->code_bits != 4 && w->code_bits != 8) {
+        err = "embed_row: token_embd.weight is not an S2/S4/S8 tensor";
+        return false;
+    }
+    if (w->codebook_iq4nl) {
+        err = "embed_row: an IQ4NL embedding is not supported";
+        return false;
+    }
+    if (w->data == nullptr || out_dev == nullptr || w->ne0 <= 0 || w->ne1 <= 0 ||
+        w->ne0 != g.n_embd || w->group_elems <= 0 ||
+        w->ne0 % w->group_elems != 0 || w->ne0 % (8 / w->code_bits) != 0) {
+        err = "embed_row: invalid embedding pointers, dimensions or group size";
+        return false;
+    }
+    if (token < 0 || token >= w->ne1) {
+        err = "embed_row: token " + std::to_string(token) + " is outside 0.." + std::to_string(w->ne1 - 1);
+        return false;
+    }
+
+    const uint64_t row_codes = (uint64_t) (w->ne0 / (8 / w->code_bits));
+    const uint64_t row_groups = (uint64_t) (w->ne0 / w->group_elems);
+    const uint64_t rows = (uint64_t) w->ne1;
+    // Division-based checks avoid overflow in rows * row_bytes and reject partial
+    // code/group rows before any device pointer arithmetic.
+    if (w->codes_bytes > w->bytes || w->scales_bytes > w->bytes - w->codes_bytes ||
+        w->offset_bytes != w->bytes - w->codes_bytes - w->scales_bytes ||
+        w->codes_bytes % row_codes != 0 || w->codes_bytes / row_codes != rows ||
+        w->codes_bytes % alignof(float) != 0 || w->scales_bytes % sizeof(float) != 0 ||
+        (w->scales_bytes / sizeof(float)) % row_groups != 0 ||
+        (w->scales_bytes / sizeof(float)) / row_groups != rows ||
+        w->has_offset != (w->offset_bytes != 0) ||
+        (w->has_offset && w->offset_bytes != w->scales_bytes)) {
+        err = "embed_row: embedding planes do not match the loaded tensor shape";
+        return false;
+    }
+
+    const auto* codes = static_cast<const uint8_t*>(w->data);
+    const auto* scales = reinterpret_cast<const float*>(codes + w->codes_bytes);
+    const auto* offsets = w->has_offset ? reinterpret_cast<const float*>(codes + w->codes_bytes + w->scales_bytes)
+                                       : nullptr;
+    const uint64_t group_offset = (uint64_t) token * row_groups;
+    strata::kernels::embedding_gather(codes + (uint64_t) token * row_codes, scales + group_offset,
+                                       offsets ? offsets + group_offset : nullptr, w->ne0,
+                                       w->code_bits, w->code_bias, w->group_elems, out_dev, stream);
+    return true;
+}
+bool lm_head_mix(const WeightTable& tables, const ModelGeometry& g, const BlockBuffers& bb,
+                 void* stream, std::string& err) {
+    const WeightRef* wn = tables.find("output_hc_norm.weight");
+    const WeightRef* wd = tables.find("output_hc_down.weight");
+    const WeightRef* wu = tables.find("output_hc_up.weight");
+    if (!wn || !wd || !wu) {
+        err = "lm_head: an output_hc_* weight is missing";
+        return false;
+    }
+    if (wn->kind != WeightKind::F32 || wd->kind != WeightKind::Bf16InF32 ||
+        wu->kind != WeightKind::Bf16InF32) {
+        err = "lm_head: the output_hc_* weights have the wrong engine forms";
+        return false;
+    }
+    const strata::kernels::GrShapes gs{g.n_embd, g.hc, g.hc_lr};
+    strata::kernels::gr_read(bb.R, (const float*) wn->data, (const uint16_t*) wd->data,
+                            (const uint16_t*) wu->data, nullptr, RMS_EPS, gs, bb.gr,
+                            bb.mixed, bb.inject, stream);
+    return true;
+}
+
+bool lm_head(const WeightTable& tables, const ModelGeometry& g, const BlockBuffers& bb,
+             float* logits, void* stream, std::string& err) {
+    const WeightRef* wo = tables.find("output.weight");
+    if (!wo) { err = "output.weight is missing"; return false; }
+    strata::kernels::SForm form;
+    Planes planes;
+    if (!sform_of(*wo, form, "output.weight", err) ||
+        !plane_ptrs(*wo, "output.weight", planes, err)) return false;
+    if (g.n_embd % Q8K_ELEMS_PER_BLOCK != 0) {
+        err = "lm_head: n_embd is not a multiple of 256";
+        return false;
+    }
+    if (!lm_head_mix(tables, g, bb, stream, err)) return false;
+    strata::kernels::quantize_q8_K(bb.mixed, bb.head_q8k, g.n_embd, stream);
+    return gemv_quantized(*wo, planes, form, bb.head_q8k, bb.head_q8k, logits,
+                          g.n_embd, wo->ne1, "output.weight", stream, err);
+}
+// ================================ ONE WHOLE BLOCK ================================
+uint64_t block_buffers_bytes(const ModelGeometry& g) {    const strata::kernels::GrShapes s{g.n_embd, g.hc, g.hc_lr};    uint64_t n = 0;    n += (uint64_t) g.hc * g.n_embd * 4;
+// R
+n += (uint64_t) g.n_embd * 4;
+// mixed
+n += (uint64_t) g.n_embd * 4;
+// block_out
+n += (uint64_t) g.hc * 4;
+// inject
+n += (uint64_t) g.hc * 4 * 2 + 32;
+// inject2, gr_rs
+n += q8k_bytes(g.n_embd);
+// head_q8k
+n += strata::kernels::gr_workspace_bytes(s);    return align_up16(n) + 256;}
+uint64_t block_buffers_init(const ModelGeometry& g, void* base, BlockBuffers& b) {    const strata::kernels::GrShapes s{g.n_embd, g.hc, g.hc_lr};    Cursor c{(uint8_t*) base};    b.R = c.take<float>((uint64_t) g.hc * g.n_embd);    b.mixed = c.take<float>((uint64_t) g.n_embd);    b.block_out = c.take<float>((uint64_t) g.n_embd);    b.inject = c.take<float>((uint64_t) g.hc);    b.inject2 = c.take<float>((uint64_t) g.hc);    b.gr_rs = c.take<float>((uint64_t) g.hc);    b.head_q8k = c.take_bytes(q8k_bytes(g.n_embd));    uint8_t* grw = c.take_bytes(strata::kernels::gr_workspace_bytes(s));    strata::kernels::gr_workspace_init(s, grw, b.gr);    return c.used;}
+// ---- THE HALF-LEVEL C1 ORACLE.  `dump` is a HOST buffer of `2 * n_embd + 2 * hc + n_head * head_dim` floats
+// per layer; this enqueues one slice of it as a device-to-host copy.  **IT RUNS INSIDE THE CAPTURE**, which is
+// the point: the copy becomes a node of that layer's graph and replays with it, so the layer functions stay one
+// function each and no per-layer plumbing reaches `generate.cpp`.  A null `dump` is the default and skips the
+// enqueue entirely, so the fast path records no extra node.
+uint64_t dump_stride_floats(const ModelGeometry& g) {
+    // Layout per layer, all in floats:
+    //   [0, 2*n_embd)                     the two halves' block_out
+    //   [2*n_embd, +2*hc)                 the two halves' inject
+    //   [+NH*HD)                          the QSA pre-gate attention
+    //   [+2*NKV*HD)                       the QSA RAW vcur  (as floats)
+    //   [+NKV*HD/2)                       the gathered v_scratch, as fp16 pairs
+    //   [+4) [+4)                         ids[0..3], then step[0..3]
+    //   [+NKV*HD/2)                       the v_pool prefix, as fp16 pairs
+    //   [+NKV*HD)                         the post-norm POST-ROPE kcur
+    // The last four are what separate a wrong projection from a wrong pool round trip.
+    const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;
+    return (uint64_t) 2 * g.n_embd + (uint64_t) 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 5 * nvk + 8;
+}
+static void dump_slot(float* dump, const ModelGeometry& g, int64_t layer, const float* src, uint64_t off,
+                      uint64_t n, void* stream) {
+    if (dump == nullptr || src == nullptr || n == 0) return;
+    /*
+    DPCT1124:799: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    strata::q_of(stream)->memcpy(dump + (size_t)layer * dump_stride_floats(g) + off, src,
+                       n * sizeof(float));
+}
+static void dump_half(const BlockBuffers& bb, const ModelGeometry& g, int64_t layer, const float* src,
+                      uint64_t off, uint64_t n, void* stream) {
+    dump_slot(bb.dump, g, layer, src, off, n, stream);
+}
+bool block_layer_pre(const WeightTable &tables, const ModelGeometry &g,
+                     int64_t layer, int64_t pos, int32_t pos_base,
+                     const GdnBuffers &gb, const QsaState &qst,
+                     const QsaBuffers &qb, const MoEBuffers &mb, int64_t k,
+                     const BlockBuffers &bb, void *stream, std::string &err,
+                     const Doorbell *db, const PleRun *ple, int half,
+                     int stage_prefix) try {
+    // ================================ THE PLE, AT LAYER 1 ONLY ================================
+    //
+    // **THIS IS THE CALL WHOSE ABSENCE FAILED GATE C1.**  Layer 1 carries the six `blk.1.ple_*` tensors and no
+    // other layer does; every part of the module was built and parity-tested and none of it was reachable from
+    // here.  The block's output is `hidden + gated + silu(conv)` on the RESIDUAL STACK ITSELF, so it is a
+    // residual update applied BEFORE layer 1's own `gr_read` - which is what the architecture means by the
+    // gathered rows arriving "before layer 2".
+    //
+    // **THE HASH AND THE GATHER ARE *NOT* HERE, AND THAT IS THE WHOLE REASON `ple_stage_token` EXISTS.**  Both
+    // are HOST operations - the hash is 64-bit multiply/xor that `qwen4exp.cpp` says is host-side because "ggml
+    // has no int64 and no xor", and the table is a host mapping.  This function is CAPTURED, so anything host
+    // side in it runs ONCE, at capture time, and the graph then replays that result for every token: the engine
+    // would gather the capture-time token's rows forever and produce a perfectly finite, perfectly stable,
+    // completely wrong answer.  It is the same bug as the doorbell's cloned literal, and it is silent.
+    //
+    // So the driver calls `ple_stage_token` once per token, BEFORE the graphs, and what is captured here is only
+    // the device half: `ple_block` reading `emb_dev`, and the history shift.
+    const bool fused = g_fused_gr && stage_prefix == 0 && half == 0 &&
+                       strata::kernels::fused_gr_supported(g.n_embd, g.hc, g.hc_lr);
+    // layer-1's FFN write has not been applied to R yet - unless a control vector follows it, which needs R
+    bool pending_ffn = fused && layer > 0 && !strata::kernels::cvec().covers(layer - 1);
+    if (ple != nullptr && ple->ready() && layer == 1 && (half == 0 || half == 1)) {
+        if (pending_ffn) {
+            const strata::kernels::GrShapes gs0{g.n_embd, g.hc, g.hc_lr};
+            gr_write(bb.R, bb.block_out, bb.inject2, gs0, bb.R, stream);
+            pending_ffn = false;
+        }
+        const int64_t hcd = strata::kernels::NG_HC_DIM;
+        strata::kernels::PleOut po;
+        // Exports must not alias the block's internal workspace. The previous diagnostic views used a
+        // different layout inside that workspace: exporting gated values overwrote normalized values
+        // before the latter were copied to history. Allocate only the one export the recurrence needs.
+        po.normalized = (float*) ((uint8_t*) ple->scratch + strata::kernels::ple_block_scratch_bytes());
+        // `result` IS THE RESIDUAL, in place: the block computes `hidden[i] + gated[i] + conv[i]` elementwise,
+        // so reading and writing `R` at the same index is well-defined.
+        po.result = bb.R;
+        try {
+            strata::kernels::ple_block(ple->emb_dev, bb.R, ple->hist, ple->w, po, ple->scratch, stream);
+        } catch (const std::exception& error) {
+            err = std::string("block_layer_pre PLE: ") + error.what();
+            return false;
+        }
+
+        // ---- AND THE HISTORY ADVANCES, ONCE PER TOKEN, WHICH IS WHAT MAKES IT A CONV HISTORY.
+        //
+        // `ple_block` deliberately does NOT write back to the history - "the caller keeps ownership of its
+        // state and this stays a pure function of its inputs, which is what makes the chunked-versus-single-shot
+        // property testable" - so the shift is here.  The layout is ROW-FASTEST (`hist[row + NG_HIST*channel]`,
+        // from `ggml_reshape_3d(state, d_conv-1, conv_channels, n_seqs)`), so a row shift is a STRIDED copy of
+        // NG_HIST-1 elements per channel and an append is a strided copy of one - not a flat memmove, which
+        // would be the natural reading and would scramble the channels.
+        strata::kernels::ple_history_advance(ple->hist, po.normalized, stream);
+        /*
+        DPCT1010:800: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaPeekAtLastError function call was replaced with 0.
+        You need to rewrite this code.
+        */
+        if (0 != 0) {
+            err = "block_layer_pre: the PLE history shift failed";
+            return false;
+        }
+    }
+    const bool qsa = is_qsa_layer(g, layer);    const LayerView v(tables, layer);    const strata::kernels::GrShapes gs{g.n_embd, g.hc, g.hc_lr};
+// ---- the two halves' GR tensors.  Both halves have the same four names with a different prefix, and the
+// prefix is the ONLY thing that distinguishes them - so it is built rather than written twice.
+const char* pre[2] = {"hc_attn_", "hc_ffn_"};    const WeightRef* w_norm[2];    const WeightRef* w_down[2];    const WeightRef* w_up[2];    const WeightRef* w_inject[2];    for (int h = 0; h < 2; ++h) {        const std::string a = std::string(pre[h]) + "norm.weight";        const std::string d = std::string(pre[h]) + "down.weight";        const std::string u = std::string(pre[h]) + "up.weight";        const std::string i = std::string(pre[h]) + "inject.weight";        w_norm[h] = v.get(a.c_str());        w_down[h] = v.get(d.c_str());        w_up[h] = v.get(u.c_str());        w_inject[h] = v.get(i.c_str());        if (!w_norm[h] || !w_down[h] || !w_up[h] || !w_inject[h]) {            err = v.name((std::string(pre[h]) + "{norm,down,up,inject}.weight").c_str()) + " is missing";            return false;        }
+// The GR weights are BF16 and the arena holds them re-rounded to 2 B/elem.  `gr_read` wants exactly
+// that; handing it f32 bytes would walk 2x the tensor inside the arena without faulting.
+if (w_down[h]->kind != WeightKind::Bf16InF32 || w_up[h]->kind != WeightKind::Bf16InF32 ||            w_inject[h]->kind != WeightKind::Bf16InF32 || w_norm[h]->kind != WeightKind::F32) {            err = v.name(pre[h]) + "has the wrong engine forms (norm must be F32, the other three bf16)";            return false;        }    }
+// ---- half 1: the mixer
+float* R = bb.R;
+    // R0.11: WHICH STAGES TO RUN.  `stage_prefix == 0` means "as `half` says", so every caller that predates
+    // this parameter is bit-for-bit unaffected; `stage_prefix == k` runs stages 0..k-1 and ignores `half`.
+    const bool run0 = stage_prefix > 0 ? (stage_prefix >= 1) : (half == 0 || half == 1);
+    const bool run1 = stage_prefix > 0 ? (stage_prefix >= 2) : (half == 0 || half == 1);
+    const bool run2 = stage_prefix > 0 ? (stage_prefix >= 3) : (half == 0 || half == 1);
+    const bool run3 = stage_prefix > 0 ? (stage_prefix >= 4) : (half == 0 || half == 2);
+    const bool run4 = stage_prefix > 0 ? (stage_prefix >= 5) : (half == 0 || half == 2);        // R0.9: this is the MIXER half, and `half == 2` skips it entirely.  A `half` of 1 or 0 runs it,
+    // and 0 is what every caller before this used.
+    if (run0) {
+st_begin(layer, 0, stream);
+    if (fused) {
+        strata::kernels::FusedGrArgs fa;
+        fa.R = R; fa.R_out = R; fa.apply = pending_ffn; fa.bo_prev = bb.block_out; fa.inj_prev = bb.inject2;
+        fa.w_norm = (const float*) w_norm[0]->data; fa.w_down = (const uint16_t*) w_down[0]->data;
+        fa.w_up = (const uint16_t*) w_up[0]->data; fa.w_inject = (const uint16_t*) w_inject[0]->data;
+        fa.eps = RMS_EPS; fa.lo = bb.gr.lo; fa.rs = bb.gr_rs; fa.inject_out = bb.inject; fa.mixed = bb.mixed;
+        strata::kernels::fused_gr_read(fa, stream);
+    } else {
+    gr_read(R, (const float*) w_norm[0]->data, (const uint16_t*) w_down[0]->data,            (const uint16_t*) w_up[0]->data, (const uint16_t*) w_inject[0]->data, RMS_EPS, gs, bb.gr, bb.mixed,            bb.inject, stream);
+    }
+    st_end(layer, 0, stream);    dump_half(bb, g, layer, bb.inject, 2 * g.n_embd, g.hc, stream);        }
+    if (run1) {
+    st_begin(layer, 1, stream);    if (qsa) {        if (!qsa_layer(tables, g, layer, pos, pos_base, qst, qb, bb.mixed, bb.block_out, stream, err,                            bb.dump))            return false;    } else {        if (!gdn_layer(tables, g, layer, gb, bb.mixed, bb.block_out, stream, err)) return false;    }    st_end(layer, 1, stream);    dump_half(bb, g, layer, bb.block_out, 0, g.n_embd, stream);        }
+    if (run2) {
+    st_begin(layer, 2, stream);    if (!fused) gr_write(R, bb.block_out, bb.inject, gs, R, stream);    st_end(layer, 2, stream);
+// ---- half 2, UP TO AND INCLUDING THE ROUTER.  `gr_read` leaves the normed activation in `bb.mixed` and
+// the per-stream injection in `bb.inject`, and BOTH must survive until `block_layer_post` runs - which is
+// the contract the two functions have with each other and with the host loop's ordering.
+    }
+    // R0.9: the FFN front and the ROUTER.  It reads `bb.mixed`/`bb.inject`, which the mixer left -
+    // the same contract `block_layer_post` has, and the reason the two are only meaningful in order.
+    if (run3) {
+st_begin(layer, 3, stream);
+    if (fused) {
+        strata::kernels::FusedGrArgs fa;
+        fa.R = R; fa.R_out = R; fa.apply = true; fa.bo_prev = bb.block_out; fa.inj_prev = bb.inject;
+        fa.w_norm = (const float*) w_norm[1]->data; fa.w_down = (const uint16_t*) w_down[1]->data;
+        fa.w_up = (const uint16_t*) w_up[1]->data; fa.w_inject = (const uint16_t*) w_inject[1]->data;
+        fa.eps = RMS_EPS; fa.lo = bb.gr.lo; fa.rs = bb.gr_rs; fa.inject_out = bb.inject2; fa.mixed = bb.mixed;
+        strata::kernels::fused_gr_read(fa, stream);
+    } else {
+    gr_read(R, (const float*) w_norm[1]->data, (const uint16_t*) w_down[1]->data,            (const uint16_t*) w_up[1]->data, (const uint16_t*) w_inject[1]->data, RMS_EPS, gs, bb.gr, bb.mixed,            bb.inject, stream);
+    }
+    st_end(layer, 3, stream);        }
+    if (run4) {
+    st_begin(layer, 4, stream);    {        const bool ok = moe_route(tables, g, layer, k, mb, bb.mixed, stream, err, db);        st_end(layer, 4, stream);        if (!ok) return false;    }
+    // Plan v0.3 P3: after the ring, so the GPU computes the shared expert while the host runs the pool.
+    if (g_shared_early && !moe_shared(tables, g, layer, mb, bb.mixed, stream, err)) return false;
+    }
+    // Every stage this call was asked to run has run.  There is no other way out: the old `return ok;`
+    // lived inside the stage-4 block and restructuring that left the function with no return at all.
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+bool ple_issue_token(const PleRun& p, std::string& err) {
+    if (!p.ready()) { err = "ple_issue_token: the PLE run is not ready"; return false; }
+    uint32_t rows[strata::kernels::PLE_N_HEADS];
+    strata::kernels::ngram_rows(p.token, p.prev, 1, p.consts, rows);
+    if (!p.table->issue(rows)) { err = "ple_issue_token: the previous token's rows were never collected"; return false; }
+    return true;
+}
+
+bool ple_finish_token(const PleRun &p, void *stream, std::string &err) try {
+    if (!p.ready()) { err = "ple_finish_token: the PLE run is not ready"; return false; }
+    if (!p.table->collect(p.emb_host, err)) { err = "ple_finish_token: " + err; return false; }
+    /*
+    DPCT1124:801: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+            p.emb_dev, p.emb_host,
+            (size_t)strata::kernels::NG_N_EMBD * sizeof(float))) != 0) {
+        err = "ple_finish_token: the row upload failed";
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ple_stage_token(const PleRun& p, void* stream, std::string& err) {
+    if (!ple_issue_token(p, err)) return false;
+    return ple_finish_token(p, stream, err);
+}
+
+uint64_t ple_run_scratch_bytes() {
+    // Internal workspace followed by a disjoint normalized export used for the next history row.
+    return strata::kernels::ple_block_scratch_bytes() + strata::kernels::NG_HC_DIM * sizeof(float);
+}
+
+bool block_layer_post(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k,                      const MoEBuffers& mb, const BlockBuffers& bb, const float* parts, void* stream,                      std::string& err) {    const strata::kernels::GrShapes gs{g.n_embd, g.hc, g.hc_lr};
+// `bb.mixed` and `bb.inject` are what `block_layer_pre` left, and NOTHING between the two calls may touch
+// them - that is what makes `post[l]` safe to launch after the host has run the pool.
+st_begin(layer, 5, stream);
+    if (g_shared_early ? !moe_combine_parts(g, layer, k, mb, parts, bb.block_out, stream, err)
+                       : !moe_finish(tables, g, layer, k, mb, bb.mixed, parts, bb.block_out, stream, err)) return false;
+    st_end(layer, 5, stream);    dump_half(bb, g, layer, bb.block_out, (uint64_t) g.n_embd, g.n_embd, stream);    dump_half(bb, g, layer, bb.inject, (uint64_t) 2 * g.n_embd + g.hc, g.hc, stream);    st_begin(layer, 6, stream);
+    const bool steer = strata::kernels::cvec().covers(layer);   // --control-vector-scaled: after this write
+    try {
+        if (!(g_fused_gr && strata::kernels::fused_gr_supported(g.n_embd, g.hc, g.hc_lr))) {
+            gr_write(bb.R, bb.block_out, bb.inject, gs, bb.R, stream);
+            if (steer) strata::kernels::cvec_apply(bb.R, layer, 1, g.hc * g.n_embd, nullptr, 0, nullptr, 0, false, stream);
+        } else if (layer == g.n_layers - 1) {
+            gr_write(bb.R, bb.block_out, bb.inject2, gs, bb.R, stream);   // materialise R for the head
+            if (steer) strata::kernels::cvec_apply(bb.R, layer, 1, g.hc * g.n_embd, nullptr, 0, nullptr, 0, false, stream);
+        } else if (steer) {
+            // the write the next layer's fused read would have folded, then the vector
+            strata::kernels::cvec_apply(bb.R, layer, 1, g.hc * g.n_embd, bb.block_out, g.n_embd, bb.inject2, g.hc,
+                                        true, stream);
+        }
+    } catch (const std::exception& e) {
+        err = std::string("block_layer_post: ") + e.what();
+        return false;
+    }
+    st_end(layer, 6, stream);    return true;}
+bool block_layer(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t pos, int32_t pos_base,                 const GdnBuffers& gb, const QsaState& qst, const QsaBuffers& qb, const MoEBuffers& mb,                 int64_t k, const BlockBuffers& bb, const float* parts, void* stream, std::string& err,                 const Doorbell* db, const PleRun* ple) {
+// The two halves back to back.  `parts` must be THIS layer's experts and must be ready before the call -
+// which holds for `session_token`, where the caller supplies them, and does NOT hold for a host loop that
+// has only just seen the router.  That is why the captured path calls the halves separately.
+if (!block_layer_pre(tables, g, layer, pos, pos_base, gb, qst, qb, mb, k, bb, stream, err, db, ple))        return false;    return block_layer_post(tables, g, layer, k, mb, bb, parts, stream, err);}}
+// namespace strata::core
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
new file mode 100644
index 00000000000..8c90e6c30c1
--- /dev/null
+++ b/sycl/src/core/mtp.cpp
@@ -0,0 +1,997 @@
+// src/core/mtp.cpp - see include/strata/core/mtp.hpp.
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/mtp.hpp"
+#include "strata/core/on_device.hpp"
+
+#include "strata/core/native_head.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/cpu/expert.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/fused_gr.hpp"
+#include "strata/kernels/gr.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/native_moe.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/native_qsa.hpp"
+#include "strata/kernels/native_rope.hpp"
+#include "strata/kernels/native_router.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/rope.hpp"
+#include "strata/kernels/router_top10.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/sampler.hpp"
+#include "strata/kernels/shared_expert.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+
+#include <algorithm>
+#include <atomic>
+#include <chrono>
+#include <cstdio>
+#include <cstring>
+#include <exception>
+#include <fstream>
+#include <sstream>
+#include <vector>
+
+namespace strata::core {
+namespace {
+
+constexpr float EPS = 1e-6f;
+constexpr int GGML_Q8_0 = 8;
+using Clock = std::chrono::steady_clock;
+double ms_since(Clock::time_point t) { return std::chrono::duration<double, std::milli>(Clock::now() - t).count(); }
+
+struct Bump {
+    uint8_t* base = nullptr;
+    uint64_t used = 0;
+    template <typename T> T* take(uint64_t n) {
+        T* p = base ? (T*) (base + used) : nullptr;
+        used += (n * sizeof(T) + 255) & ~255ull;
+        return p;
+    }
+};
+
+bool mapped(size_t bytes, void **h, void **d) try {
+    /*
+    DPCT1048:0: The original value cudaHostAllocMapped is not meaningful in the
+    migrated code and was removed or replaced with 0. You may need to check the
+    migrated code.
+    */
+    if (DPCT_CHECK_ERROR(*h = (void *)sycl::malloc_host(
+                             bytes, dpct::get_in_order_queue())) !=
+        0) return false;
+    std::memset(*h, 0, bytes);
+    return DPCT_CHECK_ERROR(*d = (void *)*h) == 0;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+strata::kernels::QsaShapes shapes_of(const ModelGeometry& g) {
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head;
+    s.n_head_kv = g.n_head_kv;
+    s.head_dim = g.head_dim;
+    s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    return s;
+}
+
+// 64-bit seek/tell on a `FILE*`: `fseek`/`ftell` take a 32-bit `long` on Windows and would wrap past 2 GiB.
+#if defined(_WIN32)
+#define STRATA_FILE_SEEK64(f, o, w) _fseeki64((f), (long long) (o), (w))
+#define STRATA_FILE_TELL64(f) _ftelli64(f)
+#else
+#define STRATA_FILE_SEEK64(f, o, w) fseeko((f), (off_t) (o), (w))
+#define STRATA_FILE_TELL64(f) ftello(f)
+#endif
+
+bool read_file(const std::string& path, std::vector<uint8_t>& out) {
+    // Loader fix (0.1.15+loaderfix.2): `ifstream::read` reaches the disk as 4095-byte reads on MSVC - the same
+    // split `load_experts_ranges` had - so the drafter's 111 MiB dense blob paid 4 KiB per operation on a cold
+    // start.  `fread` passes a request bigger than the stream buffer straight to `ReadFile()`.
+    FILE* f = std::fopen(path.c_str(), "rb");
+    if (f == nullptr) return false;
+    // A `FILE*` has no destructor and the short-read path below returns early: the guard closes on every path.
+    struct Closer {
+        FILE* f;
+        ~Closer() { if (f != nullptr) std::fclose(f); }
+    } closer{f};
+    if (STRATA_FILE_SEEK64(f, 0, SEEK_END) != 0) return false;
+    const long long n = (long long) STRATA_FILE_TELL64(f);
+    if (n < 0 || STRATA_FILE_SEEK64(f, 0, SEEK_SET) != 0) return false;
+    out.resize((size_t) n);
+    return n == 0 || std::fread(out.data(), 1, (size_t) n, f) == (size_t) n;
+}
+
+}  // namespace
+
+MtpDrafter::~MtpDrafter() {
+    if (cs_) cs_->wait();
+    for (auto &e : prefill_exec_) if (e) delete (e);
+    for (auto &e : prefill_dev_exec_) if (e) delete (e);
+    if (pf_dev_) sycl::free(pf_dev_, dpct::get_in_order_queue());
+    for (auto &e : round_exec_) if (e) delete (e);
+    for (auto &e : step_exec_) if (e) delete (e);
+    if (cs_) dpct::get_current_device().destroy_queue(cs_);
+    if (dense_) sycl::free(dense_, dpct::get_in_order_queue());
+    if (experts_) sycl::free(experts_, dpct::get_in_order_queue());
+    if (state_arena_) sycl::free(state_arena_, dpct::get_in_order_queue());
+    if (arena_) sycl::free(arena_, dpct::get_in_order_queue());
+    if (head_logits_) sycl::free(head_logits_, dpct::get_in_order_queue());
+    if (dhead_) sycl::free(dhead_, dpct::get_in_order_queue());
+    if (dvocab_) sycl::free(dvocab_, dpct::get_in_order_queue());
+    void* hosts[] = {h_tok_, h_step_, h_pos_, h_row_, h_out_, h_prob_};
+    for (void *h : hosts) if (h) sycl::free(h, dpct::get_in_order_queue());
+}
+
+const float* MtpDrafter::f32(const char* name) const {
+    for (const auto& t : tensors_) if (t.name == name && t.kind == "f32") return (const float*) (dense_ + t.off);
+    return nullptr;
+}
+const uint16_t* MtpDrafter::bf16(const char* name) const {
+    for (const auto& t : tensors_) if (t.name == name && t.kind == "bf16") return (const uint16_t*) (dense_ + t.off);
+    return nullptr;
+}
+const void* MtpDrafter::q8(const char* name) const {
+    for (const auto& t : tensors_) if (t.name == name && t.kind == "q8_0") return dense_ + t.off;
+    return nullptr;
+}
+
+bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
+                      SessionState &ss, int max_t, std::string &err,
+                      int64_t window) try {
+    device_ =
+        dpct::get_current_device_id(); // a layer split's last stage on another
+                                       // GPU: the drafter lives there
+    g_ = &g;
+    ss_ = &ss;
+    max_t_ = max_t;
+    rt_dir_ = rt_dir;
+    if (max_t < 1 || max_t > strata::kernels::kVerifyMaxT) { err = "mtp: max_t out of range"; return false; }
+    // Loader fix (0.1.15+loaderfix.2): the two reads below are the whole “drafter files” cost; reporting
+    // them apart from the rest of the stage is what makes the next regression visible.
+    const auto t_files = std::chrono::steady_clock::now();
+    // ---- the index and the dense weights
+    {
+        std::ifstream idx(rt_dir + "/dense.txt");
+        if (!idx) { err = "mtp: cannot open " + rt_dir + "/dense.txt (run tools/mtp_rt.py)"; return false; }
+        std::string line;
+        while (std::getline(idx, line)) {
+            if (line.empty()) continue;
+            std::istringstream is(line);
+            Tensor t;
+            is >> t.name >> t.kind >> t.rows >> t.cols >> t.off >> t.bytes;
+            if (!is) { err = "mtp: malformed dense.txt line: " + line; return false; }
+            tensors_.push_back(t);
+        }
+        std::vector<uint8_t> blob;
+        if (!read_file(rt_dir + "/dense.bin", blob)) { err = "mtp: cannot read dense.bin"; return false; }
+        const dpct::err0 alloc =
+            DPCT_CHECK_ERROR(dense_ = (uint8_t *)sycl::malloc_device(
+                                 blob.size(), dpct::get_in_order_queue()));
+        /*
+        DPCT1000:10: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (alloc != 0) {
+            size_t free_bytes = 0, total_bytes = 0;
+            /*
+            DPCT1106:12: 'cudaMemGetInfo' was migrated with the Intel extensions
+            for device information which may not be supported by all compilers
+            or runtimes. You may need to adjust the code.
+            */
+            const dpct::err0 info =
+                DPCT_CHECK_ERROR(dpct::get_current_device().get_memory_info(
+                    free_bytes, total_bytes));
+            /*
+            DPCT1009:13: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:9: The statement could not be removed.
+            */
+            err = "mtp: dense weights allocation failed (" +
+                  std::string(dpct::get_error_string_dummy(alloc)) +
+                  "), requested " + std::to_string(blob.size() >> 20) +
+                  " MiB, CUDA0 free " +
+                  (info == 0 ? std::to_string(free_bytes >> 20) + " MiB"
+                             : "unknown");
+            return false;
+        }
+        /*
+        DPCT1114:11: cudaMemcpy is migrated to asynchronization memcpy, assuming
+        in the original code the source host memory is pageable memory. If the
+        memory is not pageable, call wait() on event return by memcpy API to
+        ensure synchronization behavior.
+        */
+        dpct::get_in_order_queue().memcpy(dense_, blob.data(), blob.size());
+        vram_ += blob.size();
+    }
+    // ---- the 512 routed experts, one blob each
+    {
+        const uint64_t bytes = (uint64_t) g.n_expert * strata::kernels::cpu::BLOB;
+        // Loader fix (0.1.15+loaderfix.2): each 64 MiB read below reached the disk as ~16k 4095-byte reads under
+        // MSVC's `basic_filebuf::xsgetn`, which is what made 675 MiB of drafter experts take minutes.
+        FILE* f = std::fopen((rt_dir + "/experts.bin").c_str(), "rb");
+        if (f == nullptr) { err = "mtp: cannot open experts.bin"; return false; }
+        struct Closer {
+            FILE* f;
+            ~Closer() { if (f != nullptr) std::fclose(f); }
+        } closer{f};
+        if (DPCT_CHECK_ERROR(experts_ = (uint8_t *)sycl::malloc_device(
+                                 bytes, dpct::get_in_order_queue())) != 0) {
+            err = "mtp: the 512 experts do not fit in VRAM"; return false;
+        }
+        std::vector<uint8_t> chunk(64u << 20);
+        for (uint64_t off = 0; off < bytes;) {
+            const uint64_t n = std::min<uint64_t>(chunk.size(), bytes - off);
+            if (std::fread(chunk.data(), 1, (size_t) n, f) != (size_t) n) { err = "mtp: experts.bin is truncated"; return false; }
+            dpct::get_in_order_queue()
+                .memcpy(experts_ + off, chunk.data(), n)
+                .wait();
+            off += n;
+        }
+        vram_ += bytes;
+    }
+    const char* required[] = {"fc_embedding.weight", "fc_hidden.weight", "self_attn.q_proj.weight", "self_attn.k_proj.weight",
+                              "self_attn.v_proj.weight", "self_attn.o_proj.weight", "mlp.shared_expert.gate_proj.weight",
+                              "mlp.shared_expert.up_proj.weight", "mlp.shared_expert.down_proj.weight"};
+    for (const char* n : required) if (!q8(n)) { err = std::string("mtp: ") + n + " is missing (q8_0)"; return false; }
+
+    // ---- the layer's own K/V (dense attention: no indexer state is read)
+    const strata::kernels::QsaShapes s = shapes_of(g);
+    const int64_t max_cells = ss.qsa_states[0].max_cells;
+    // KV streaming: the drafter only reads its last `window` cells, so with streaming on its K/V is a ring of the
+    // window (plus the cells a round writes ahead of its queries) over a host copy, refilled on a resume. The host copy
+    // is pinned after the expert arena has pinned what it could: if it does not fit, the K/V stays whole in VRAM.
+    int64_t ring = (window > 0 && window < max_cells) ? window + 4 * (int64_t) max_t + 64 : 0;
+    uint64_t sb = qsa_state_bytes(g, max_cells, false, ring);
+    if (DPCT_CHECK_ERROR(state_arena_ = (void *)sycl::malloc_device(
+                             sb, dpct::get_in_order_queue())) != 0) {
+        err = "mtp: the K/V state does not fit"; return false;
+    }
+    if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[0], ring) == 0) {
+        if (st_.kv_mode == 0) { err = "mtp: state init failed"; return false; }
+        std::fprintf(stderr, "strata mtp: no pinned RAM left for the draft layer's K/V copy; keeping it in VRAM\n");
+        /*
+        DPCT1026:14: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        sycl::free(state_arena_, dpct::get_in_order_queue());
+        st_ = QsaState{};
+        ring = -1;   // fully resident
+        sb = qsa_state_bytes(g, max_cells, false, ring);
+        if (DPCT_CHECK_ERROR(state_arena_ = (void *)sycl::malloc_device(
+                                 sb, dpct::get_in_order_queue())) != 0) {
+            err = "mtp: the K/V state does not fit"; return false;
+        }
+        if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[0], ring) == 0) { err = "mtp: state init failed"; return false; }
+    }
+    qsa_state_zero(st_, g, nullptr);
+    dpct::get_current_device().queues_wait_and_throw();
+    vram_ += sb;
+
+    // ---- buffers
+    window_ = (window > 0 && window < max_cells) ? window : 0;
+    cap_ = (((window_ > 0 ? window_ : max_cells) + 63) / 64) * 64;
+    attn_scratch_floats_ = (int64_t) strata::kernels::qsa_decode_attn_scratch_floats(cap_, s);
+    const uint64_t T = (uint64_t) max_t, N = (uint64_t) g.n_embd, HC = (uint64_t) g.hc, K = (uint64_t) ss.k;
+    const uint64_t NH = (uint64_t) g.n_head, HD = (uint64_t) g.head_dim, NKV = (uint64_t) g.n_head_kv;
+    const uint64_t R2 = 2 * T;   // step/pos rows: T catch-up rows + up to T-2 chain steps
+    bool ok = mapped(T * 4 + 64, (void**) &h_tok_, (void**) &m_tok_) &&
+              mapped(R2 * 4 * 4 + 64, (void**) &h_step_, (void**) &m_step_) &&
+              mapped(R2 * NH * 4 + 64, (void**) &h_pos_, (void**) &m_pos_) &&
+              mapped(64, (void**) &h_row_, (void**) &m_row_) &&
+              mapped(T * 4 + 64, (void**) &h_out_, (void**) &m_out_) &&
+              mapped(T * 4 + 64, (void**) &h_prob_, (void**) &m_prob_);
+    if (!ok) { err = "mtp: mapped staging failed"; return false; }
+    auto carve = [&](Bump& b) {
+        tok_ = b.take<int32_t>(T); step_ = b.take<int32_t>(R2 * 4); pos_ = b.take<int32_t>(R2 * NH); row_ = b.take<int32_t>(4);
+        ident_ = b.take<int32_t>(T * (uint64_t) cap_);
+        Rin_ = b.take<float>(T * HC * N); R_ = b.take<float>(T * HC * N);
+        emb_ = b.take<float>(T * N); en_ = b.take<float>(T * N); e2_ = b.take<float>(T * N);
+        hn_ = b.take<float>(T * HC * N); h2_ = b.take<float>(T * HC * N);
+        mixed_ = b.take<float>(T * N); inj_ = b.take<float>(T * HC); inj2_ = b.take<float>(T * HC);
+        lo_ = b.take<float>(T * (uint64_t) g.hc_lr); rs_ = b.take<float>(T * HC); bo_ = b.take<float>(T * N);
+        xn_ = b.take<float>(T * HC * N);
+        xq_ = b.take<uint8_t>(strata::kernels::native_q8_1_bytes((int) (NH * HD), 8));
+        qfull_ = b.take<float>(T * NH * 2 * HD); qcur_ = b.take<float>(T * NH * HD);
+        kcur_ = b.take<float>(T * NKV * HD); vcur_ = b.take<float>(T * NKV * HD);
+        attn_ = b.take<float>(T * NH * HD); attn32_ = b.take<float>(T * NH * HD);
+        attn_scratch_ = b.take<float>((uint64_t) attn_scratch_floats_);   // the full layer runs one row at a time
+        logits_ = b.take<float>(T * (uint64_t) g.n_expert); w_ = b.take<float>(T * K); ids_ = b.take<int32_t>(T * K);
+        shared_ = b.take<float>(T * N); parts_ = b.take<float>(T * K * N); y_ = b.take<float>(T * N);
+        sample_ = b.take<float>(T * N);
+        hit_slot_ = b.take<int32_t>(T * K); hit_dst_ = b.take<int32_t>(T * K); hit_count_ = b.take<int32_t>(4);
+        grp_ptr_ = b.take<unsigned long long>(T * K); grp_start_ = b.take<int32_t>(T * K + 1);
+        grp_counts_ = b.take<int32_t>(4);
+        hit_xq_ = b.take<uint8_t>(T * (N / 32) * 34); hit_xs_ = b.take<float>(T * (N / 32));
+        hit_scratch_ = b.take<uint8_t>(strata::kernels::moe_hit_grouped_scratch_bytes((int64_t) (T * K), g.n_embd, g.n_ff));
+        sh_scratch_ = (float*) b.take<uint8_t>(strata::kernels::shared_expert_scratch_bytes(g.n_ff));
+        x_bf16_ = b.take<uint16_t>(N);
+        out_ids_ = b.take<int32_t>(T + 4);
+        probs_ = b.take<float>(T + 4);
+        dummy_inj_ = b.take<float>(HC);
+    };
+    Bump count;
+    carve(count);
+    if (DPCT_CHECK_ERROR(arena_ = (void *)sycl::malloc_device(
+                             count.used, dpct::get_in_order_queue())) != 0) {
+        err = "mtp: buffers do not fit"; return false;
+    }
+    dpct::get_in_order_queue().memset(arena_, 0, count.used).wait();
+    Bump real;
+    real.base = (uint8_t*) arena_;
+    carve(real);
+    vram_ += count.used;
+    {
+        std::vector<int32_t> id((size_t) (T * (uint64_t) cap_));
+        for (uint64_t t = 0; t < T; ++t)
+            for (int64_t i = 0; i < cap_; ++i) id[(size_t) (t * (uint64_t) cap_ + (uint64_t) i)] = (int32_t) i;
+        /*
+        DPCT1114:15: cudaMemcpy is migrated to asynchronization memcpy, assuming
+        in the original code the source host memory is pageable memory. If the
+        memory is not pageable, call wait() on event return by memcpy API to
+        ensure synchronization behavior.
+        */
+        dpct::get_in_order_queue().memcpy(ident_, id.data(), id.size() * 4);
+    }
+    /*
+    DPCT1025:16: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    if (DPCT_CHECK_ERROR(cs_ = dpct::get_current_device().create_queue(true)) !=
+        0) {
+        err = "mtp: stream"; return false;
+    }
+    const double files_s = std::chrono::duration<double>(std::chrono::steady_clock::now() - t_files).count();
+    std::fprintf(stderr, "strata mtp: draft layer loaded, %.0f MiB of VRAM (experts %.0f, dense %.0f), files read in %.2f s (%.0f MiB/s)\n",
+                 (double) vram_ / 1048576.0, (double) g.n_expert * strata::kernels::cpu::BLOB / 1048576.0,
+                 (double) tensors_.back().off / 1048576.0, files_s,
+                 files_s > 0 ? ((double) g.n_expert * strata::kernels::cpu::BLOB + (double) tensors_.back().off) /
+                                   1048576.0 / files_s : 0.0);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
+                      const float *window_R, std::string &err) try {
+    const OnDevice on_device(device_);
+    wt_ = &wt;
+    head_ = head;
+    window_R_ = window_R;
+    const WeightRef* wo = wt.find("output.weight");
+    if (!wo) { err = "mtp: output.weight is missing"; return false; }
+    n_vocab_ = wo->ne1;
+    if (head == nullptr || !head->loaded()) { err = "mtp: the draft layer needs the native head (--native)"; return false; }
+    if (head_logits_ == nullptr &&
+        DPCT_CHECK_ERROR(head_logits_ = sycl::malloc_device<float>(
+                             (size_t)max_t_ * (size_t)n_vocab_,
+                             dpct::get_in_order_queue())) != 0) {
+        err = "mtp: the draft logits do not fit";
+        return false;
+    }
+    // the draft head's token subset, when tools/draft_vocab.py wrote one
+    if (dhead_ == nullptr) {
+        std::vector<uint8_t> raw;
+        if (read_file(rt_dir_ + "/draft_vocab.bin", raw) && raw.size() >= 4 && raw.size() % 4 == 0) {
+            n_dvocab_ = (int64_t) (raw.size() / 4);
+            const int64_t row_bytes = (int64_t) head->row_bytes();   // a vocabulary row of the native head
+            if (DPCT_CHECK_ERROR(dvocab_ = (int32_t *)sycl::malloc_device(
+                                     raw.size(), dpct::get_in_order_queue())) !=
+                    0 ||
+                DPCT_CHECK_ERROR(dhead_ = (uint8_t *)sycl::malloc_device(
+                                     (size_t)(n_dvocab_ * row_bytes),
+                                     dpct::get_in_order_queue())) != 0) {
+                err = "mtp: the draft head does not fit";
+                return false;
+            }
+            dpct::get_in_order_queue()
+                .memcpy(dvocab_, raw.data(), raw.size())
+                .wait();
+            strata::kernels::gather_rows((const uint8_t*) head->weights(), row_bytes, dvocab_, n_dvocab_, dhead_, nullptr);
+            dpct::get_current_device().queues_wait_and_throw();
+            vram_ += (uint64_t) (n_dvocab_ * row_bytes) + raw.size();
+            std::fprintf(stderr, "strata mtp: draft head over %lld tokens (%.1f MiB)\n", (long long) n_dvocab_,
+                         (double) (n_dvocab_ * row_bytes) / 1048576.0);
+        }
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// The layer for T rows.  full = false stops after the K/V append (the prompt only needs the cache).
+bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
+                                std::string &err) {
+    using namespace strata::kernels;
+    const ModelGeometry& g = *g_;
+    SessionState& ss = *ss_;
+    // step_row0 >= 0: the full layer on step rows [step_row0, +T); step_row0 < 0: K/V only on rows [-1 - step_row0, +T)
+    const bool full = step_row0 >= 0;
+    const int row0 = full ? step_row0 : -1 - step_row0;
+    if (full && T != 1) { err = "mtp: the full layer runs one row at a time (its attention scratch is sized for one)"; return false; }
+    const int64_t N = g.n_embd, HC = g.hc, K = ss.k, NH = g.n_head, HD = g.head_dim, NKV = g.n_head_kv;
+    const QsaShapes s = shapes_of(g);
+    const GrShapes gs{g.n_embd, g.hc, g.hc_lr};
+    const int32_t* step = step_ + row0 * 4;
+    const int32_t* pos = pos_ + row0 * NH;
+    try {
+        // ---- the two input branches
+        const WeightRef* we = wt_->find("token_embd.weight");
+        if (!we) { err = "mtp: token_embd.weight is missing"; return false; }
+        if (const NativeEmbed* ne = native_embed()) {   // plan v0.3 P6: the GGUF-form table
+            ne->gather_dev(tok_, T, emb_, cs);
+        } else {
+            const auto* codes = (const uint8_t*) we->data;
+            const auto* scales = (const float*) (codes + we->codes_bytes);
+            const auto* offsets = we->has_offset ? (const float*) (codes + we->codes_bytes + we->scales_bytes) : nullptr;
+            embedding_gather_dev(codes, scales, offsets, tok_, T, we->ne0, we->code_bits, we->code_bias, we->group_elems,
+                                 (uint64_t) (we->ne0 / (8 / we->code_bits)), (uint64_t) (we->ne0 / we->group_elems), emb_, cs);
+        }
+        native_qsa_rms_norm_weighted(emb_, f32("pre_fc_norm_embedding.weight"), en_, (int) N, T, EPS, cs);
+        native_quantize_q8_1(en_, xq_, (int) N, T, cs);
+        native_mmvq(GGML_Q8_0, q8("fc_embedding.weight"), xq_, e2_, (int) N, (int) N, T, cs);
+        native_qsa_rms_norm_weighted(Rin_, f32("pre_fc_norm_hidden.weight"), hn_, (int) (HC * N), T, EPS, cs);
+        for (int c0 = 0; c0 < T * HC; c0 += 8) {
+            const int nc = (int) std::min<int64_t>(8, T * HC - c0);
+            native_quantize_q8_1(hn_ + (size_t) c0 * N, xq_, (int) N, nc, cs);
+            native_mmvq(GGML_Q8_0, q8("fc_hidden.weight"), xq_, h2_ + (size_t) c0 * N, (int) N, (int) N, nc, cs);
+        }
+        add_streams_broadcast(h2_, e2_, R_, N, (int) HC, T, cs);
+        // ---- the attention hyper-connection
+        {
+            FusedGrArgs fa[kFusedGrMaxT];
+            for (int t = 0; t < T; ++t) {
+                fa[t].R = R_ + (size_t) t * HC * N; fa[t].R_out = R_ + (size_t) t * HC * N; fa[t].apply = false;
+                fa[t].w_norm = f32("attn_hyper_connection.hc_norm.weight");
+                fa[t].w_down = bf16("attn_hyper_connection.input_mix_weight_down.weight");
+                fa[t].w_up = bf16("attn_hyper_connection.input_mix_weight_up.weight");
+                fa[t].w_inject = bf16("attn_hyper_connection.block_inject_weight.weight");
+                fa[t].eps = EPS; fa[t].lo = lo_ + t * g.hc_lr; fa[t].rs = rs_ + t * HC;
+                fa[t].inject_out = inj_ + t * HC; fa[t].mixed = mixed_ + t * N;
+            }
+            fused_gr_read_multi(fa, T, xn_, cs);
+        }
+        // ---- attention: K/V into the layer's own cache, then (full) dense attention over every cell
+        auto norm_rope = [&](float* data, const float* gamma, int rows, int cols, const int32_t* p) {
+            native_qsa_rms_norm_weighted(data, gamma, data, cols, rows, EPS, cs);
+            if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), p, cs);
+            else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st_.cos_tab, st_.sin_tab, p, cs);
+        };
+        native_quantize_q8_1(mixed_, xq_, (int) N, T, cs);
+        native_mmvq(GGML_Q8_0, q8("self_attn.k_proj.weight"), xq_, kcur_, (int) N, (int) (NKV * HD), T, cs);
+        native_mmvq(GGML_Q8_0, q8("self_attn.v_proj.weight"), xq_, vcur_, (int) N, (int) (NKV * HD), T, cs);
+        for (int t = 0; t < T; ++t) {
+            norm_rope(kcur_ + t * NKV * HD, f32("self_attn.k_norm.weight"), (int) NKV, (int) HD, pos + t * NH);
+            if (st_.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V
+                fwht256_inplace_cuda(kcur_ + t * NKV * HD, NKV, cs);
+                fwht256_inplace_cuda(vcur_ + t * NKV * HD, NKV, cs);
+                kv_append_q4_step(st_.k_q4, st_.v_q4, st_.page_table, step + t * 4, kcur_ + t * NKV * HD,
+                                  vcur_ + t * NKV * HD, s, cs, &st_.host);
+            } else if (st_.kv_int8)
+                kv_append_q8_step(st_.k_q, st_.v_q, st_.k_scale, st_.v_scale, st_.page_table, step + t * 4,
+                                  kcur_ + t * NKV * HD, vcur_ + t * NKV * HD, s, cs, &st_.host);
+            else
+                kv_append_step(st_.k_pool, st_.v_pool, st_.page_table, step + t * 4, kcur_ + t * NKV * HD,
+                               vcur_ + t * NKV * HD, s, cs, &st_.host);
+        }
+        if (!full) return true;
+        native_mmvq(GGML_Q8_0, q8("self_attn.q_proj.weight"), xq_, qfull_, (int) N, (int) (NH * 2 * HD), T, cs);
+        for (int t = 0; t < T; ++t) {
+            float* qc = qcur_ + t * NH * HD;
+            /*
+            DPCT1124:17: cudaMemcpy2DAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(dpct::async_dpct_memcpy(
+                    qc, (size_t)HD * 4, qfull_ + t * NH * 2 * HD,
+                    (size_t)HD * 2 * 4, (size_t)HD * 4, (size_t)NH,
+                    dpct::device_to_device, *cs)) != 0) {
+                err = "mtp: q split failed";
+                return false;
+            }
+            norm_rope(qc, f32("self_attn.q_norm.weight"), (int) NH, (int) HD, pos + t * NH);
+            if (st_.kv_q4) fwht256_inplace_cuda(qc, NH, cs);
+        }
+        const QsaAttnPools pools = qsa_attn_pools(st_);
+        if (window_ > 0) window_ids(const_cast<int32_t*>(step), T, (int) window_, ident_, cap_, cs);
+        qsa_decode_attn_batch(qcur_, pools, ident_, step, cap_, s, attn_scratch_, attn_, T, cs);
+        if (st_.kv_q4) fwht256_inplace_cuda(attn_, (int64_t) T * NH, cs);
+        for (int t = 0; t < T; ++t)
+            native_qsa_gate_apply(attn_ + t * NH * HD, qfull_ + t * NH * 2 * HD, attn32_ + t * NH * HD, (int) NH, (int) HD, cs);
+        native_quantize_q8_1(attn32_, xq_, (int) (NH * HD), T, cs);
+        native_mmvq(GGML_Q8_0, q8("self_attn.o_proj.weight"), xq_, bo_, (int) (NH * HD), (int) N, T, cs);
+        // ---- the MLP hyper-connection (the attention write folded in)
+        {
+            FusedGrArgs fa[kFusedGrMaxT];
+            for (int t = 0; t < T; ++t) {
+                fa[t].R = R_ + (size_t) t * HC * N; fa[t].R_out = R_ + (size_t) t * HC * N; fa[t].apply = true;
+                fa[t].bo_prev = bo_ + t * N; fa[t].inj_prev = inj_ + t * HC;
+                fa[t].w_norm = f32("mlp_hyper_connection.hc_norm.weight");
+                fa[t].w_down = bf16("mlp_hyper_connection.input_mix_weight_down.weight");
+                fa[t].w_up = bf16("mlp_hyper_connection.input_mix_weight_up.weight");
+                fa[t].w_inject = bf16("mlp_hyper_connection.block_inject_weight.weight");
+                fa[t].eps = EPS; fa[t].lo = lo_ + t * g.hc_lr; fa[t].rs = rs_ + t * HC;
+                fa[t].inject_out = inj2_ + t * HC; fa[t].mixed = mixed_ + t * N;
+            }
+            fused_gr_read_multi(fa, T, xn_, cs);
+        }
+        // ---- MoE: router, the 512 resident experts, the shared expert, the combine, the write
+        for (int t = 0; t < T; ++t) {
+            bf16_gemv_fp32_mmvf(mixed_ + t * N, bf16("mlp.gate.weight"), logits_ + t * g.n_expert, (int) N, (int) g.n_expert, cs);
+            if (native_router_enabled()) native_router_top10(logits_ + t * g.n_expert, ids_ + t * K, w_ + t * K, cs);
+            else router_top10(logits_ + t * g.n_expert, 1, (int) g.n_expert, (int) K, ids_ + t * K, w_ + t * K, cs);
+        }
+        moe_group_resident(ids_, (int) (T * K), (int) K, experts_, (int64_t) strata::kernels::cpu::BLOB, grp_ptr_,
+                           grp_start_, grp_counts_, hit_dst_, hit_slot_, cs);
+        quantize_q8_0_scaled(mixed_, hit_xq_, hit_xs_, (int64_t) T * N, cs);
+        moe_grouped_s2(grp_ptr_, grp_start_, grp_counts_, hit_dst_, hit_slot_, (int64_t) T * K, (int64_t) T * K, hit_xq_,
+                       hit_xs_, hit_scratch_, parts_, cs);
+        NativeSharedWeights nsw;
+        nsw.gate_type = GGML_Q8_0; nsw.gate_data = q8("mlp.shared_expert.gate_proj.weight");
+        nsw.up_type = GGML_Q8_0; nsw.up_data = q8("mlp.shared_expert.up_proj.weight");
+        nsw.down_type = GGML_Q8_0; nsw.down_data = q8("mlp.shared_expert.down_proj.weight");
+        nsw.q8_1 = xq_;
+        const SForm none{};
+        for (int t = 0; t < T; ++t) {
+            f32_to_bf16_bulk(mixed_ + t * N, x_bf16_, N, cs);
+            shared_expert(nullptr, nullptr, x_bf16_, none, nullptr, nullptr, nullptr, none, nullptr, nullptr, nullptr, none,
+                          nullptr, nullptr, nullptr, bf16("mlp.shared_expert_gate.weight"), sh_scratch_, shared_ + t * N,
+                          N, g.n_ff, 32, cs, mixed_ + t * N, &nsw);
+            if (native_moe_combine_enabled())
+                native_moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
+            else
+                moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
+            gr_write(R_ + (size_t) t * HC * N, y_ + t * N, inj2_ + t * HC, gs, R_ + (size_t) t * HC * N, cs);
+        }
+        // ---- the final mixer and the main model's head
+        for (int t = 0; t < T; ++t)
+            gr_read(R_ + (size_t) t * HC * N, f32("hyper_connection_mixer.hc_norm.weight"),
+                    bf16("hyper_connection_mixer.input_mix_weight_down.weight"),
+                    bf16("hyper_connection_mixer.input_mix_weight_up.weight"), nullptr, EPS, gs, ss.block.gr,
+                    sample_ + t * N, dummy_inj_, cs);
+        native_quantize_q8_1(sample_, xq_, (int) N, T, cs);
+        const bool sub = dhead_ != nullptr;
+        const int64_t nv = sub ? n_dvocab_ : n_vocab_;
+        native_mmvq(head_->type(), sub ? dhead_ : head_->weights(), xq_, head_logits_, (int) N, (int) nv, T, cs);
+        SamplerParams sp;
+        sp.greedy = true;
+        sp.temperature = 0.0f;
+        sample_tokens(head_logits_, T, (int) nv, nullptr, 0, sp, out_ids_, cs);
+        row_top_prob(head_logits_, T, (int) nv, out_ids_, probs_, cs);
+        if (sub) map_ids(out_ids_, dvocab_, T, cs);
+    } catch (const std::exception& e) {
+        err = std::string("mtp: ") + e.what();
+        return false;
+    }
+    return true;
+}
+
+namespace {
+bool finish_capture(dpct::queue_ptr cs, bool ok,
+                    dpct::experimental::command_graph_exec_ptr &exec,
+                    const char *what, std::string &err) try {
+    dpct::experimental::command_graph_ptr graph = nullptr;
+    const dpct::err0 ce =
+        DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &graph));
+    if (!ok) {
+        if (graph) delete (graph);
+        return false;
+    }
+    if (ce != 0 ||
+        DPCT_CHECK_ERROR(
+            exec = new sycl::ext::oneapi::experimental::command_graph<
+                sycl::ext::oneapi::experimental::graph_state::executable>(
+                graph->finalize())) != 0) {
+        if (graph) delete (graph);
+        /*
+        DPCT1009:19: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        err = std::string("mtp: ") + what +
+              " capture: " + dpct::get_error_string_dummy(ce);
+        return false;
+    }
+    delete (graph);
+    // an explicit upload: the first launch's implicit one blocked behind a device-side spin (verify.cpp)
+    /*
+    DPCT1007:18: Migration of cudaGraphUpload is not supported.
+    */
+    // no cudaGraphUpload on SYCL: a finalized command_graph is already resident
+    cs->wait();
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+}  // namespace
+
+bool MtpDrafter::capture_prefill(int T, std::string &err) try {
+    if (prefill_exec_[T]) return true;
+    using namespace strata::kernels;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "mtp: begin capture"; return false;
+    }
+    copy_i32_from_mapped(tok_, m_tok_, T, cs_);
+    copy_i32_from_mapped(step_, m_step_, (int64_t) T * 4, cs_);
+    copy_i32_from_mapped(pos_, m_pos_, (int64_t) T * g_->n_head, cs_);
+    const bool ok = record_forward(T, -1, cs_, err);   // K/V only, rows [0, T)
+    return finish_capture(cs_, ok, prefill_exec_[T], "prefill", err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool MtpDrafter::capture_prefill_dev(int T, std::string &err) try {
+    if (prefill_dev_exec_[T]) return true;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "mtp: begin capture"; return false;
+    }
+    const bool ok = record_forward(T, -1, cs_, err);   // K/V only, rows [0, T); tok_/step_/pos_ filled before launch
+    return finish_capture(cs_, ok, prefill_dev_exec_[T], "prefill (device inputs)", err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool MtpDrafter::capture_round(int T, std::string &err) try {
+    if (round_exec_[T]) return true;
+    using namespace strata::kernels;
+    const int64_t HCN = g_->hc * g_->n_embd;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "mtp: begin capture"; return false;
+    }
+    bool ok = true;
+    copy_i32_from_mapped(tok_, m_tok_, T, cs_);
+    copy_i32_from_mapped(step_, m_step_, (int64_t) 2 * T * 4, cs_);
+    copy_i32_from_mapped(pos_, m_pos_, (int64_t) 2 * T * g_->n_head, cs_);
+    copy_i32_from_mapped(row_, m_row_, 2, cs_);
+    copy_from_mapped(Rin_, window_R_, (int64_t) T * HCN, cs_);
+    // the catch-up: K/V for the window's T cells, then the full layer for row a only (its cell's K/V is written
+    // again, identically), staged by the host in step row 2*max_t - 1; the draft chain is one graph per step
+    // (`capture_step`) so the host can stop it when a draft is unlikely
+    const int ra = 2 * max_t_ - 1;
+    ok = record_forward(T, -1, cs_, err);
+    if (ok) mtp_select(Rin_, HCN, tok_, row_, Rin_, tok_, nullptr, 0, cs_);
+    if (ok) {
+        copy_i32_from_mapped(step_ + ra * 4, m_step_ + ra * 4, 4, cs_);
+        copy_i32_from_mapped(pos_ + ra * g_->n_head, m_pos_ + ra * g_->n_head, g_->n_head, cs_);
+        ok = record_forward(1, ra, cs_, err);
+    }
+    if (ok) mtp_select(R_, HCN, out_ids_, row_ + 1, Rin_, tok_, m_out_, 0, cs_, probs_, m_prob_);
+    return finish_capture(cs_, ok, round_exec_[T], "round", err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// Chain step j (1..max_t-2): one row at the cell staged in step row `max_t + j - 1`, from the previous step's
+// residual and token (left in Rin_[0] / tok_[0] by mtp_select); draft j and its probability to the mapped outputs.
+bool MtpDrafter::capture_step(int j, std::string &err) try {
+    if (step_exec_[j]) return true;
+    using namespace strata::kernels;
+    const int64_t HCN = g_->hc * g_->n_embd;
+    const int row = max_t_ + j - 1;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "mtp: begin capture"; return false;
+    }
+    copy_i32_from_mapped(step_ + row * 4, m_step_ + row * 4, 4, cs_);
+    copy_i32_from_mapped(pos_ + row * g_->n_head, m_pos_ + row * g_->n_head, g_->n_head, cs_);
+    bool ok = record_forward(1, row, cs_, err);
+    if (ok) mtp_select(R_, HCN, out_ids_, row_ + 1, Rin_, tok_, m_out_, j, cs_, probs_, m_prob_);
+    return finish_capture(cs_, ok, step_exec_[j], "step", err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void MtpDrafter::kv_restore(int64_t upto) {
+    const OnDevice on_device(device_);
+    if (st_.kv_mode != 2 || upto <= 0) return;
+    // the ring's blocks below `upto`, from the host copy: a checkpoint resume may have left later cells in them
+    const strata::kernels::QsaShapes s = shapes_of(*g_);
+    const int64_t b1 = (upto + s.page_size - 1) / s.page_size, b0 = std::max<int64_t>(0, b1 - st_.n_slots);
+    strata::kernels::kv_ring_restore(qsa_attn_pools(st_), st_.host, qsa_kv_format(st_), b0, b1, st_.n_slots, s, cs_);
+    cs_->wait();
+}
+
+bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
+                         int64_t n, int64_t cell0, std::string &err) try {
+    const OnDevice on_device(device_);
+    const Clock::time_point t0 = Clock::now();
+    const int64_t HCN = g_->hc * g_->n_embd;
+    // cells the window can never reach again need no K/V
+    const int64_t first_needed = (window_ > 0 && prompt_len_ > 0) ? prompt_len_ - window_ - 64 : 0;
+    // E-4: every group's token / step / position records uploaded at once; each group is then device copies and a
+    // graph on the one stream, with a single sync at the end (a group of <= max_t rows used to be staged in mapped
+    // memory and synced before the next: ~5,500 host round trips on a 32K prompt).  The same work in the same
+    // order.  STRATA_MTP_PREFILL_SYNC=1 keeps the old loop.
+    static const bool per_group_sync = std::getenv("STRATA_MTP_PREFILL_SYNC") != nullptr;
+    const int64_t NHp = g_->n_head, per_row = 1 + 4 + NHp;
+    if (!per_group_sync && n > 0) {
+        if (pf_cap_ < n * per_row) {
+            if (pf_dev_) sycl::free(pf_dev_, dpct::get_in_order_queue());
+            pf_dev_ = nullptr;
+            pf_cap_ = 0;
+            if (DPCT_CHECK_ERROR(pf_dev_ = sycl::malloc_device<int32_t>(
+                                     (size_t)(n * per_row),
+                                     dpct::get_in_order_queue())) != 0) {
+                err = "mtp prefill: the input records do not fit";
+                return false;
+            }
+            pf_cap_ = n * per_row;
+        }
+        std::vector<int32_t> rec((size_t) (n * per_row));
+        int32_t* tk = rec.data();
+        int32_t* stp = tk + n;
+        int32_t* ps = stp + 4 * n;
+        for (int64_t i = 0; i < n; ++i) {
+            const int64_t cell = cell0 + i;
+            tk[i] = next_tokens[i];
+            stp[i * 4 + 0] = (int32_t) cell;
+            stp[i * 4 + 1] = (int32_t) (cell + 1);
+            stp[i * 4 + 2] = (int32_t) ((cell + 1) / 4);
+            stp[i * 4 + 3] = (int32_t) (cell + 1);
+            for (int64_t h = 0; h < NHp; ++h) ps[i * NHp + h] = (int32_t) cell;
+        }
+        /*
+        DPCT1124:20: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(cs_->memcpy(pf_dev_, rec.data(),
+                                         rec.size() * sizeof(int32_t))) != 0) {
+            err = "mtp prefill: the input records upload failed";
+            return false;
+        }
+        const int32_t* d_tk = pf_dev_;
+        const int32_t* d_stp = d_tk + n;
+        const int32_t* d_ps = d_stp + 4 * n;
+        for (int64_t c = 0; c < n; c += max_t_) {
+            const int T = (int) std::min<int64_t>(max_t_, n - c);
+            if (cell0 + c + T <= first_needed) continue;
+            if (!capture_prefill_dev(T, err)) return false;
+            /*
+            DPCT1124:21: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+            While the origin API might be synchronous, it depends on the type of
+            operand memory, so you may need to call wait() on event return by
+            memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(cs_->memcpy(tok_, d_tk + c, (size_t)T * 4)) !=
+                    0 ||
+                /*
+                DPCT1124:22: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(
+                    cs_->memcpy(step_, d_stp + c * 4, (size_t)T * 16)) != 0 ||
+                /*
+                DPCT1124:23: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(cs_->memcpy(pos_, d_ps + c * NHp,
+                                             (size_t)(T * NHp) * 4)) != 0 ||
+                /*
+                DPCT1124:24: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(
+                    cs_->memcpy(Rin_, R_rows + (size_t)c * HCN,
+                                (size_t)T * HCN * sizeof(float))) != 0 ||
+                DPCT_CHECK_ERROR(
+                    (cs_)->ext_oneapi_graph(*prefill_dev_exec_[T])) != 0) {
+                /*
+                DPCT1009:25: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010:26: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                err = std::string("mtp prefill: ") +
+                      dpct::get_error_string_dummy(0);
+                return false;
+            }
+        }
+        if (DPCT_CHECK_ERROR(cs_->wait()) != 0) {
+            /*
+            DPCT1009:27: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1010:28: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            err =
+                std::string("mtp prefill: ") + dpct::get_error_string_dummy(0);
+            return false;
+        }
+        ms_prefill += ms_since(t0);
+        return true;
+    }
+    for (int64_t c = 0; c < n; c += max_t_) {
+        const int T = (int) std::min<int64_t>(max_t_, n - c);
+        if (cell0 + c + T <= first_needed) continue;
+        if (!capture_prefill(T, err)) return false;
+        for (int t = 0; t < T; ++t) {
+            const int64_t cell = cell0 + c + t;
+            h_tok_[t] = next_tokens[c + t];
+            h_step_[t * 4 + 0] = (int32_t) cell;
+            h_step_[t * 4 + 1] = (int32_t) (cell + 1);
+            h_step_[t * 4 + 2] = (int32_t) ((cell + 1) / 4);
+            h_step_[t * 4 + 3] = (int32_t) (cell + 1);
+            for (int64_t h = 0; h < g_->n_head; ++h) h_pos_[t * g_->n_head + h] = (int32_t) cell;
+        }
+        /*
+        DPCT1124:29: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(cs_->memcpy(Rin_, R_rows + (size_t)c * HCN,
+                                         (size_t)T * HCN * sizeof(float))) !=
+                0 ||
+            DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*prefill_exec_[T])) != 0 ||
+            DPCT_CHECK_ERROR(cs_->wait()) != 0) {
+            /*
+            DPCT1009:30: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1010:31: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            err =
+                std::string("mtp prefill: ") + dpct::get_error_string_dummy(0);
+            return false;
+        }
+    }
+    ms_prefill += ms_since(t0);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t* drafts, std::string& err,
+                       float* probs, float min_p, int* n_drafts) {
+    const OnDevice on_device(device_);
+    if (T < 1 || T > max_t_ || a < 0 || a >= T) { err = "mtp: draft arguments out of range"; return false; }
+    if (!capture_round(T, err)) return false;
+    const Clock::time_point t0 = Clock::now();
+    const int64_t NH = g_->n_head;
+    auto put = [&](int row, int64_t cell) {
+        h_step_[row * 4 + 0] = (int32_t) cell;
+        h_step_[row * 4 + 1] = (int32_t) (cell + 1);
+        h_step_[row * 4 + 2] = (int32_t) ((cell + 1) / 4);
+        h_step_[row * 4 + 3] = (int32_t) (cell + 1);
+        for (int64_t h = 0; h < NH; ++h) h_pos_[row * NH + h] = (int32_t) cell;
+    };
+    for (int t = 0; t < T; ++t) {
+        h_tok_[t] = tokens[t];
+        put(t, p + t);
+    }
+    put(2 * max_t_ - 1, p + a);
+    h_row_[0] = a;
+    h_row_[1] = 0;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*round_exec_[T])) != 0 ||
+        DPCT_CHECK_ERROR(cs_->wait()) != 0) {
+        /*
+        DPCT1009:32: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        /*
+        DPCT1010:33: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        err = std::string("mtp draft: ") + dpct::get_error_string_dummy(0);
+        return false;
+    }
+    drafts[0] = ((volatile int32_t*) h_out_)[0];
+    float pj = ((volatile float*) h_prob_)[0];
+    if (probs) probs[0] = pj;
+    int n = 1;
+    // the chain continues while the last draft is likely enough to be verified
+    for (int j = 1; j < std::min(max_t_ - 1, max_drafts_) && pj >= min_p; ++j) {
+        if (!capture_step(j, err)) return false;
+        put(max_t_ + j - 1, p + a + j);
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*step_exec_[j])) != 0 ||
+            DPCT_CHECK_ERROR(cs_->wait()) != 0) {
+            /*
+            DPCT1009:34: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1010:35: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            err = std::string("mtp draft step: ") +
+                  dpct::get_error_string_dummy(0);
+            return false;
+        }
+        drafts[j] = ((volatile int32_t*) h_out_)[j];
+        pj = ((volatile float*) h_prob_)[j];
+        if (probs) probs[j] = pj;
+        ++n;
+    }
+    for (int j = n; j < max_t_ - 1; ++j) { drafts[j] = 0; if (probs) probs[j] = 0.0f; }
+    if (n_drafts) *n_drafts = n;
+    ms_draft += ms_since(t0);
+    ++rounds;
+    return true;
+}
+
+bool MtpDrafter::draft_first(int T, const float *R_row, int32_t token,
+                             int64_t cell, int32_t *drafts, std::string &err,
+                             float *probs, float min_p, int *n_drafts) try {
+    const OnDevice on_device(device_);
+    // row 0 is the real pair; rows 1.. repeat it and only write cells the next round overwrites
+    const int64_t HCN = g_->hc * g_->n_embd;
+    for (int t = 0; t < T; ++t)
+        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                (void *)(window_R_ + (size_t)t * HCN), R_row,
+                (size_t)HCN * sizeof(float))) != 0) {
+            err = "mtp: staging the first residual failed";
+            return false;
+        }
+    std::vector<int32_t> toks((size_t) T, token);
+    return draft(T, toks.data(), cell, 0, drafts, err, probs, min_p, n_drafts);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/native_dense.cpp b/sycl/src/core/native_dense.cpp
new file mode 100644
index 00000000000..51c2ca9703e
--- /dev/null
+++ b/sycl/src/core/native_dense.cpp
@@ -0,0 +1,235 @@
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/native_dense.hpp"
+#include "strata/core/weights.hpp"
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+
+#include <algorithm>
+#include <climits>
+#include <exception>
+#include <limits>
+#include <memory>
+#include <set>
+
+namespace strata::core {
+namespace {
+bool eligible(const strata::TensorInfo& tensor, bool include_ple_key) {
+    const auto& name = tensor.name;
+    if (name.rfind("blk.", 0) != 0) return false;
+    // The native PLE kernel accepts Q2_0. Other quantized keys can be converted to BF16 by iq_pack;
+    // keep their packed bytes resident instead of overriding them with an unsupported native key.
+    if (name == "blk.1.ple_key.weight") return include_ple_key && tensor.type == 42;   // 42 = Q2_0
+    static const char* suffixes[] = {".attn_qkv.weight", ".attn_gate.weight", ".ssm_out.weight",
+        ".attn_q.weight", ".attn_k.weight", ".attn_v.weight", ".attn_output.weight",
+        ".ffn_gate_shexp.weight", ".ffn_up_shexp.weight", ".ffn_down_shexp.weight"};
+    for (const char* suffix : suffixes) if (name.ends_with(suffix)) return true;
+    return false;
+}
+struct DeviceFree {
+    void
+    operator()(void *p) const {
+        if (p) sycl::free(p, dpct::get_in_order_queue());
+    }
+};
+using DevicePtr = std::unique_ptr<void, DeviceFree>;
+struct Pending {
+    WeightRef* ref;
+    int type;
+    uint64_t bytes;
+    DevicePtr data;
+};
+}
+
+bool NativeDense::served_names(const std::vector<std::string>& shards, bool include_ple_key,
+                               std::set<std::string>& out, std::string& err) {
+    try {
+        for (const auto& path : shards) {
+            strata::GgufFile gguf(path);
+            for (const auto& tensor : gguf.tensors())
+                if (eligible(tensor, include_ple_key) && strata::kernels::native_mmvq_supported(tensor.type) &&
+                    tensor.shape.size() == 2)
+                    out.insert(tensor.name);
+        }
+        return true;
+    } catch (const std::exception& error) {
+        err = std::string("native dense: ") + error.what();
+        return false;
+    }
+}
+
+NativeDense::~NativeDense() {
+    if (scratch_) sycl::free(scratch_, dpct::get_in_order_queue());
+    for (void *p : weights_)
+        DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
+}
+
+bool NativeDense::load(const std::vector<std::string> &shards,
+                       WeightTable &table, std::string &err,
+                       bool include_ple_key) try {
+    if (scratch_ || !weights_.empty()) { err = "native dense: already loaded"; return false; }
+    if (shards.empty()) { err = "native dense: at least one GGUF shard is required"; return false; }
+    try {
+        std::vector<Pending> pending;
+        std::set<std::string> seen;
+        int max_in = 0;
+        uint64_t total = 0;
+        uint64_t split_count = 0, split_tensors = 0;
+        std::set<uint64_t> split_numbers;
+        bool have_architecture = false;
+        for (const auto& path : shards) {
+            strata::GgufFile gguf(path);
+            const auto* count = gguf.get("split.count");
+            const auto* number = gguf.get("split.no");
+            const auto* tensors = gguf.get("split.tensors.count");
+            if (gguf.get("general.architecture")) {
+                err = strata::check_architecture(gguf);
+                if (!err.empty()) return false;
+                have_architecture = true;
+                if (count && number && tensors && number->u == 0 && count->u > 1) {
+                    split_count = count->u;
+                    split_tensors = tensors->u;
+                }
+            } else if (!have_architecture || !split_count || !count || !number || !tensors ||
+                       count->u != split_count || number->u == 0 || number->u >= split_count ||
+                       tensors->u != split_tensors) {
+                err = "native dense: additional shard must match the architecture-validated first shard's split metadata";
+                return false;
+            }
+            if (number && !split_numbers.insert(number->u).second) {
+                err = "native dense: duplicate split shard number"; return false;
+            }
+            std::vector<uint64_t> offsets;
+            for (const auto& tensor : gguf.tensors()) offsets.push_back(tensor.offset);
+            std::sort(offsets.begin(), offsets.end());
+            if (std::adjacent_find(offsets.begin(), offsets.end()) != offsets.end()) {
+                err = "native dense: tensor payload offsets overlap"; return false;
+            }
+            // Validate every directory span, including tensors we do not upload:
+            // an ignored tensor must not overlap the native matrix that follows it.
+            const uint64_t payload = gguf.file_size() - gguf.data_start();
+            for (const auto& tensor : gguf.tensors()) {
+                int block_elements = 0, block_bytes = 0;
+                uint64_t elements = 1;
+                if (tensor.shape.empty() || !strata::block_geometry(tensor.type, block_elements, block_bytes) ||
+                    tensor.shape[0] % (uint64_t) block_elements != 0) {
+                    err = "native dense: invalid block geometry " + tensor.name; return false;
+                }
+                for (uint64_t dimension : tensor.shape) {
+                    if (!dimension || elements > (std::numeric_limits<uint64_t>::max)() / dimension) {
+                        err = "native dense: invalid tensor extent " + tensor.name; return false;
+                    }
+                    elements *= dimension;
+                }
+                const uint64_t blocks = elements / (uint64_t) block_elements;
+                if (blocks > (std::numeric_limits<uint64_t>::max)() / (uint64_t) block_bytes) {
+                    err = "native dense: tensor byte count overflow " + tensor.name; return false;
+                }
+                const uint64_t bytes = blocks * (uint64_t) block_bytes;
+                if (tensor.offset > payload || bytes > payload - tensor.offset) {
+                    err = "native dense: truncated payload " + tensor.name; return false;
+                }
+                const auto next = std::upper_bound(offsets.begin(), offsets.end(), tensor.offset);
+                if (next != offsets.end() && bytes > *next - tensor.offset) {
+                    err = "native dense: overlapping payload " + tensor.name; return false;
+                }
+            }
+            for (const auto& tensor : gguf.tensors()) {
+                if (!eligible(tensor, include_ple_key)) continue;
+                if (!seen.insert(tensor.name).second) {
+                    err = "native dense: duplicate tensor " + tensor.name; return false;
+                }
+                auto found = table.table_.find(tensor.name);
+                if (found == table.table_.end()) {
+                    err = "native dense: tensor absent from canonical table: " + tensor.name; return false;
+                }
+                auto& ref = found->second;
+                if (ref.native_data) { err = "native dense: override already attached"; return false; }
+                if (!strata::kernels::native_mmvq_supported(tensor.type)) continue;
+                if (!ref.quantized() || tensor.shape.size() != 2 ||
+                    ref.ne0 <= 0 || ref.ne0 > INT_MAX || ref.ne1 <= 0 || ref.ne1 > INT_MAX ||
+                    tensor.shape[0] != (uint64_t) ref.ne0 || tensor.shape[1] != (uint64_t) ref.ne1) {
+                    err = "native dense: incompatible matrix " + tensor.name; return false;
+                }
+                const auto bytes = strata::kernels::native_mmvq_weight_bytes(
+                    tensor.type, (int) ref.ne0, (int) ref.ne1);
+                void* allocation = nullptr;
+                auto status =
+                    DPCT_CHECK_ERROR(allocation = (void *)sycl::malloc_device(
+                                         bytes, dpct::get_in_order_queue()));
+                DevicePtr data(allocation);
+                if (status == 0)
+                    status = DPCT_CHECK_ERROR(
+                        dpct::get_in_order_queue()
+                            .memcpy(data.get(), gguf.tensor_data(tensor), bytes)
+                            .wait());
+                /*
+                DPCT1000:420: Error handling if-stmt was detected but could not
+                be rewritten.
+                */
+                if (status != 0) {
+                    /*
+                    DPCT1009:421: SYCL reports errors using exceptions and does
+                    not use error codes. Please replace the
+                    "get_error_string_dummy(...)" with a real error-handling
+                    function.
+                    */
+                    /*
+                    DPCT1001:419: The statement could not be removed.
+                    */
+                    err = "native dense upload " + tensor.name + ": " +
+                          dpct::get_error_string_dummy(status);
+                        return false;
+                }
+                max_in = (std::max)(max_in, (int) ref.ne0);
+                total += bytes;
+                pending.push_back(Pending{&ref, (int) tensor.type, bytes, std::move(data)});
+            }
+        }
+        if (pending.empty()) { err = "native dense: no supported GDN/QSA matrices in supplied shards"; return false; }
+        void* allocation = nullptr;
+        const auto status =
+            DPCT_CHECK_ERROR(allocation = (void *)sycl::malloc_device(
+                                 strata::kernels::native_q8_1_bytes(max_in),
+                                 dpct::get_in_order_queue()));
+        DevicePtr scratch(allocation);
+        /*
+        DPCT1009:422: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:417: The statement could not be removed.
+        */
+        /*
+        DPCT1000:418: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (status != 0) {
+            err = std::string("native dense scratch: ") +
+                  dpct::get_error_string_dummy(status);
+            return false;
+        }
+        // All checks and allocations finish before publishing any reference.
+        weights_.reserve(pending.size());
+        for (auto& item : pending) {
+            item.ref->native_data = item.data.get();
+            item.ref->native_type = item.type;
+            item.ref->native_q8_1 = scratch.get();
+            weights_.push_back(item.data.release());
+        }
+        scratch_ = scratch.release();
+        bytes_ = total;
+        return true;
+    } catch (const std::exception& error) {
+        err = std::string("native dense: ") + error.what();
+        return false;
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+} // namespace strata::core
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
new file mode 100644
index 00000000000..5c8566a8094
--- /dev/null
+++ b/sycl/src/core/native_head.cpp
@@ -0,0 +1,221 @@
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/native_head.hpp"
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+
+#include <climits>
+#include <cstring>
+#include <exception>
+
+namespace strata::core {
+
+NativeHead::~NativeHead() {
+    if (scratch_) sycl::free(scratch_, dpct::get_in_order_queue());
+    if (weights_) sycl::free(weights_, dpct::get_in_order_queue());
+}
+
+bool NativeHead::load(const std::string &path, int64_t n_in, int64_t n_out,
+                      std::string &err) try {
+    if (loaded()) { err = "native head is already loaded"; return false; }
+    if (n_in <= 0 || n_out <= 0 || n_in > INT_MAX || n_out > INT_MAX || n_in % 256) {
+        err = "native head requires positive int32 dimensions and whole 256-value rows";
+        return false;
+    }
+    try {
+        strata::GgufFile gguf(path);
+        err = strata::check_architecture(gguf);
+        if (!err.empty()) return false;
+        const strata::TensorInfo* tensor = nullptr;
+        for (const auto& candidate : gguf.tensors()) {
+            if (candidate.name != "output.weight") continue;
+            if (tensor) { err = "native head: duplicate output.weight"; return false; }
+            tensor = &candidate;
+        }
+        if (!tensor || !strata::kernels::native_mmvq_supported((int) tensor->type) || tensor->shape.size() != 2 ||
+            tensor->shape[0] != (uint64_t) n_in || tensor->shape[1] != (uint64_t) n_out) {
+            err = "native head: expected a natively supported output.weight with the canonical head dimensions";
+            return false;
+        }
+        const uint64_t bytes = strata::kernels::native_mmvq_weight_bytes((int) tensor->type, (int) n_in, (int) n_out);
+        const uint64_t payload = gguf.file_size() - gguf.data_start();
+        if (tensor->offset > payload || bytes > payload - tensor->offset) {
+            err = "native head: truncated output.weight payload";
+            return false;
+        }
+        void* weights = nullptr;
+        void* scratch = nullptr;
+        dpct::err0 status =
+            DPCT_CHECK_ERROR(weights = (void *)sycl::malloc_device(
+                                 bytes, dpct::get_in_order_queue()));
+        if (status == 0)
+            status = DPCT_CHECK_ERROR(
+                scratch = (void *)sycl::malloc_device(
+                    strata::kernels::native_q8_1_bytes((int)n_in, 1),
+                    dpct::get_in_order_queue()));
+        if (status == 0)
+            status = DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue()
+                    .memcpy(weights, gguf.tensor_data(*tensor), bytes)
+                    .wait());
+        /*
+        DPCT1000:1107: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (status != 0) {
+            if (scratch) sycl::free(scratch, dpct::get_in_order_queue());
+            if (weights) sycl::free(weights, dpct::get_in_order_queue());
+            /*
+            DPCT1009:1108: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:1106: The statement could not be removed.
+            */
+            err = std::string("native head upload: ") +
+                  dpct::get_error_string_dummy(status);
+            return false;
+        }
+        weights_ = weights;
+        scratch_ = scratch;
+        bytes_ = bytes;
+        n_in_ = (int) n_in;
+        n_out_ = (int) n_out;
+        type_ = (int) tensor->type;
+        return true;
+    } catch (const std::exception& error) {
+        err = std::string("native head: ") + error.what();
+        return false;
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool NativeHead::run(const float *mixed, float *logits, void *stream,
+                     std::string &err) const try {
+    if (!loaded() || !mixed || !logits || !stream) {
+        err = "native head requires loaded weights, device buffers and an explicit stream";
+        return false;
+    }
+    try {
+        if (type_ == 13) {
+            strata::kernels::native_q5_k_f32(weights_, mixed, scratch_, logits, n_in_, n_out_, 1, stream);
+        } else {
+            strata::kernels::native_quantize_q8_1(mixed, scratch_, n_in_, 1, stream);
+            strata::kernels::native_mmvq(type_, weights_, scratch_, logits, n_in_, n_out_, 1, stream);
+        }
+    } catch (const std::exception& error) {
+        err = std::string("native head launch: ") + error.what();
+        return false;
+    }
+    /*
+    DPCT1010:1111: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaPeekAtLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 status = 0;
+    /*
+    DPCT1000:1110: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (status != 0) {
+        /*
+        DPCT1009:1112: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:1109: The statement could not be removed.
+        */
+        err = std::string("native head launch: ") +
+              dpct::get_error_string_dummy(status);
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// ================================ plan v0.3 P6: THE NATIVE EMBEDDING ================================
+
+namespace {
+const NativeEmbed* g_embed = nullptr;
+}
+void set_native_embed(const NativeEmbed* e) { g_embed = e; }
+const NativeEmbed* native_embed() { return g_embed; }
+
+NativeEmbed::~NativeEmbed() {
+    if (host_) sycl::free(host_, dpct::get_in_order_queue());
+}
+
+bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
+                       std::string &err) try {
+    try {
+        strata::GgufFile gguf(path);
+        const strata::TensorInfo* t = nullptr;
+        for (const auto& c : gguf.tensors())
+            if (c.name == "token_embd.weight") t = &c;
+        if (!t || t->shape.size() != 2 || t->shape[0] != (uint64_t) n_embd || t->shape[1] != (uint64_t) n_vocab ||
+            !strata::kernels::iq_supported((int) t->type) || n_embd % 256) {
+            err = "native embedding: token_embd.weight is absent, of another shape, or of a type without a GPU "
+                  "dequantizer";
+            return false;
+        }
+        row_ = strata::kernels::iq_row_bytes((int) t->type, n_embd);
+        bytes_ = (uint64_t) row_ * (uint64_t) n_vocab;
+        /*
+        DPCT1048:19: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        /*
+        DPCT1048:20: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        if (DPCT_CHECK_ERROR(host_ = (void *)sycl::malloc_host(
+                                 bytes_, dpct::get_in_order_queue())) != 0) {
+            host_ = nullptr;
+            err = "native embedding: cannot pin " + std::to_string(bytes_ >> 20) + " MiB";
+            return false;
+        }
+        std::memcpy(host_, gguf.tensor_data(*t), bytes_);
+        void* d = nullptr;
+        if (DPCT_CHECK_ERROR(d = (void *)host_) != 0) {
+            err = "native embedding: no device alias for the mapped table";
+            return false;
+        }
+        dev_ = d;
+        type_ = (int) t->type;
+        n_embd_ = n_embd;
+        n_vocab_ = n_vocab;
+        return true;
+    } catch (const std::exception& e) {
+        err = std::string("native embedding: ") + e.what();
+        return false;
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void NativeEmbed::gather_dev(const int32_t* tokens, int64_t n_tok, float* out, void* stream) const {
+    strata::kernels::iq_embed_rows(type_, dev_, row_, tokens, n_tok, n_embd_, out, stream);
+}
+
+void NativeEmbed::gather_one(int64_t token, float* out, void* stream) const {
+    strata::kernels::iq_dequant_f32(type_, (const uint8_t*) dev_ + (size_t) token * row_, n_embd_, out, stream);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/overlap_main.cpp b/sycl/src/core/overlap_main.cpp
new file mode 100644
index 00000000000..c49f1a6592d
--- /dev/null
+++ b/sycl/src/core/overlap_main.cpp
@@ -0,0 +1,239 @@
+// src/core/overlap_main.cpp - `strata-overlap`: does streaming an expert overlap with computing on it?
+//
+// THE ARCHITECTURE'S CENTRAL PREMISE.  Only (1 - h) of a token's expert weights are in VRAM, so the rest must
+// cross the bus while the GPU is working.  If the copy and the compute do not overlap, the per-token cost is
+// their SUM; if they do, it is their MAXIMUM.  L3 measured the stream at 4.07 ms/token (design h) and L5 the
+// matvec at 27.9 ms/token, so serial would be ~32 ms and overlapped ~28 - but those are the STEADY-STATE
+// numbers for a whole token; at one expert's granularity the ratio is completely different and that is what
+// decides how the loop must be built.
+//
+// Measured against a SERIAL baseline in the same process, because the interesting quantity is the ratio and
+// not the absolute figure - and L6 established that absolute figures on this machine move by 20%.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/pinned.hpp"
+#include "strata/kernels/s_gemv.hpp"
+
+#include <chrono>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <fstream>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+struct Timing {
+    double seconds = 0;
+    const char* name = "";
+};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    std::string path;
+    int experts = 64;
+    int threads_per_row = 32;
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        auto val = [&]() -> const char* {
+            if (i + 1 >= argc) { std::fprintf(stderr, "%s needs a value\n", a.c_str()); std::exit(2); }
+            return argv[++i];
+        };
+        if (a == "--file") path = val();
+        else if (a == "--experts") experts = std::atoi(val());
+        else if (a == "--tpr") threads_per_row = std::atoi(val());
+        else {
+            std::fprintf(stderr, "usage: strata-overlap --file experts.bin [--experts N] [--tpr N]\n");
+            return 2;
+        }
+    }
+    if (path.empty()) { std::fprintf(stderr, "--file is required\n"); return 2; }
+
+    // One ROLE's worth of S2 weights: gate is [n_embd 2560] x [ff 640] = 1,638,400 weights = 460,800 B of
+    // codes at 4 codes per byte, plus 40 scales per row.
+    const long long n_in = 2560, n_out = 640;
+    const uint64_t role_codes = (uint64_t) n_out * n_in / 4;
+    const uint64_t role_bytes = role_codes + (uint64_t) n_out * (n_in / 64) * 4;
+    std::printf("per role: %lld x %lld S2 weights, %.1f KB of planes\n", n_in, n_out, role_bytes / 1024.0);
+
+    // host side: `experts` blobs read into a pinned arena, and the S2 planes the GEMV will read
+    strata::core::PinnedArena arena((uint64_t) experts * role_codes);
+    if (!arena.valid()) { std::fprintf(stderr, "arena allocation failed\n"); return 1; }
+    {
+        std::ifstream f(path, std::ios::binary);
+        if (!f) { std::fprintf(stderr, "cannot open %s\n", path.c_str()); return 1; }
+        // take the first `experts` blobs' worth of CODE bytes, pretending each is a role's plane: the bytes
+        // are real Q2_0 codes, so the kernel decodes real data and no cache-friendly pattern is invented
+        for (int i = 0; i < experts; ++i) {
+            f.seekg((std::streamoff) i * 1382400);
+            f.read((char*) arena.data() + (uint64_t) i * role_codes, (std::streamsize) role_codes);
+            if ((uint64_t) f.gcount() != role_codes) {
+                std::fprintf(stderr, "short read on expert %d\n", i);
+                return 1;
+            }
+        }
+    }
+    std::printf("loaded %d role-sized planes into a %s arena\n", experts, arena.note.c_str());
+
+    // device side: double buffered codes, plus x / scales / y
+    uint8_t* d_codes[2] = {nullptr, nullptr};
+    for (int b = 0; b < 2; ++b)
+        check(DPCT_CHECK_ERROR(d_codes[b] = (uint8_t *)sycl::malloc_device(
+                                   role_codes, dpct::get_in_order_queue())),
+              "cudaMalloc codes");
+    uint16_t* d_x = nullptr;
+    float *d_scales = nullptr, *d_y = nullptr;
+    check(DPCT_CHECK_ERROR(
+              d_x = (uint16_t *)sycl::malloc_device(
+                  n_in * sizeof(uint16_t), dpct::get_in_order_queue())),
+          "cudaMalloc x");
+    check(DPCT_CHECK_ERROR(d_scales = (float *)sycl::malloc_device(
+                               (size_t)n_out * (n_in / 64) * sizeof(float),
+                               dpct::get_in_order_queue())),
+          "cudaMalloc scales");
+    check(DPCT_CHECK_ERROR(
+              d_y = (float *)sycl::malloc_device(n_out * sizeof(float),
+                                                 dpct::get_in_order_queue())),
+          "cudaMalloc y");
+    std::vector<uint16_t> hx((size_t) n_in, 0x3C00);
+    std::vector<float> hs((size_t) n_out * (size_t) (n_in / 64), 0.001f);
+    /*
+    DPCT1114:657: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+          "copy x");
+    /*
+    DPCT1114:658: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, hs.data(), hs.size() * sizeof(float))),
+          "copy scales");
+
+    dpct::queue_ptr s_copy{}, s_comp{};
+    check(DPCT_CHECK_ERROR(s_copy =
+                               dpct::get_current_device().create_queue(true)),
+          "stream copy");
+    check(DPCT_CHECK_ERROR(s_comp =
+                               dpct::get_current_device().create_queue(true)),
+          "stream compute");
+    const strata::kernels::SForm form{2, -1, 64, strata::kernels::Codebook::Affine, false};
+
+    // ---- SERIAL: the same operations on the SAME stream, so the GPU runs them one after another ----
+    //
+    // NOT a sync-per-iteration loop.  The first version waited with `cudaStreamSynchronize` after every copy and
+    // measured 234.8 us/expert where a copy plus a GEMV is ~43 us: the baseline was dominated by the CPU
+    // round-trip, so the ratio of 0.095 mostly measured "with syncs" against "without syncs".  Putting both
+    // operations on one stream expresses the same dependency with NO CPU involvement and ONE sync at the end,
+    // which is what makes the comparison about overlap rather than about synchronisation.
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait()), "pre sync");
+    auto t0 = std::chrono::steady_clock::now();
+    for (int i = 0; i < experts; ++i) {
+        /*
+        DPCT1124:659: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_codes[0], arena.data() + (uint64_t)i * role_codes,
+                  role_codes)),
+              "serial copy");
+        strata::kernels::s_gemv_split_async(
+            d_x, d_codes[0], d_scales, nullptr, d_y, n_in, n_out, form,
+            threads_per_row,
+            (void *)(dpct::queue_ptr)&dpct::get_in_order_queue());
+    }
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait()),
+          "serial final sync");
+    const double serial = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+
+    // ---- OVERLAPPED: copy the next one while computing on the current one ----
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait()), "pre sync 2");
+    dpct::event_ptr ev[2];
+    for (int b = 0; b < 2; ++b)
+        check(DPCT_CHECK_ERROR(ev[b] = new sycl::event()), "event");
+    t0 = std::chrono::steady_clock::now();
+    /*
+    DPCT1124:660: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    check(
+        DPCT_CHECK_ERROR(s_copy->memcpy(d_codes[0], arena.data(), role_codes)),
+        "prologue");
+    /*
+    DPCT1024:661: The original code returned the error code that was further
+    consumed by the program logic. This original code was replaced with 0. You
+    may need to rewrite the program logic consuming the error code.
+    */
+    check(DPCT_CHECK_ERROR(dpct::sync_barrier(ev[0], s_copy)),
+          "prologue event");
+    for (int i = 0; i < experts; ++i) {
+        const int cur = i & 1, nxt = (i + 1) & 1;
+        if (i + 1 < experts) {
+            /*
+            DPCT1124:662: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            check(
+                DPCT_CHECK_ERROR(s_copy->memcpy(
+                    d_codes[nxt], arena.data() + (uint64_t)(i + 1) * role_codes,
+                    role_codes)),
+                "overlap copy");
+            /*
+            DPCT1024:663: The original code returned the error code that was
+            further consumed by the program logic. This original code was
+            replaced with 0. You may need to rewrite the program logic consuming
+            the error code.
+            */
+            check(DPCT_CHECK_ERROR(dpct::sync_barrier(ev[nxt], s_copy)),
+                  "overlap event");
+        }
+        // the compute stream must not start row i until its codes have landed
+        check(DPCT_CHECK_ERROR(s_comp->ext_oneapi_submit_barrier({*ev[cur]})),
+              "wait");
+        // a hand-written launch so it goes on s_comp; `s_gemv` synchronises on the default stream
+        strata::kernels::s_gemv_split_async(d_x, d_codes[cur], d_scales, nullptr, d_y, n_in, n_out, form,
+                                            threads_per_row, (void*) s_comp);
+    }
+    check(DPCT_CHECK_ERROR(s_comp->wait()), "final sync");
+    check(DPCT_CHECK_ERROR(s_copy->wait()), "final sync 2");
+    const double overlap = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+
+    std::printf("\n  serial     %8.3f ms for %d experts  (%.1f us/expert)\n", serial * 1000, experts,
+                serial * 1e6 / experts);
+    std::printf("  overlapped %8.3f ms for %d experts  (%.1f us/expert)\n", overlap * 1000, experts,
+                overlap * 1e6 / experts);
+    std::printf("  ratio      %.3f  (1.00 = no overlap at all, <1.00 = overlap)\n", overlap / serial);
+    std::printf("\nNOTE: the OVERLAPPED loop launches on `s_comp` without synchronising, so the copy and the\n"
+                "      compute really are concurrent; the serial loop waits after each step.  What this does NOT\n"
+                "      model is the CPU expert path, the router, or the fact that a real token has 1440 roles to\n"
+                "      stream rather than %d.\n", experts);
+
+    for (int b = 0; b < 2; ++b) {
+        sycl::free(d_codes[b], dpct::get_in_order_queue());
+        dpct::destroy_event(ev[b]);
+    }
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+    dpct::get_current_device().destroy_queue(s_copy);
+    dpct::get_current_device().destroy_queue(s_comp);
+    return 0;
+}
diff --git a/sycl/src/core/pinned.dp.cpp b/sycl/src/core/pinned.dp.cpp
new file mode 100644
index 00000000000..86c84dbb555
--- /dev/null
+++ b/sycl/src/core/pinned.dp.cpp
@@ -0,0 +1,448 @@
+// src/core/pinned.cu - P2.S1: the pinned host arena and the parallel expert load.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/pinned.hpp"
+#include "strata/platform/memory.hpp"
+
+#include <atomic>
+#include <cstdlib>
+#include <cstdio>
+#include <cstring>
+#include <fstream>
+#include <mutex>
+#include <thread>
+
+// Loader fix: `fseek`/`ftell` are 32-bit on Windows by default (and the pack is 42.9 GB), and the 64-bit
+// spelling is not the same on the two platforms the engine builds for.
+#ifdef _WIN32
+#define STRATA_FSEEK64(f, o) _fseeki64((f), (long long) (o), SEEK_SET)
+#else
+#define STRATA_FSEEK64(f, o) fseeko((f), (off_t) (o), SEEK_SET)
+#endif
+
+#ifdef _WIN32
+#include <windows.h>
+#else
+#include <sys/mman.h>
+#include <linux/mman.h>
+#ifndef MAP_HUGE_2MB
+#define MAP_HUGE_2MB (21 << 26)
+#endif
+#endif
+
+namespace strata::core {
+
+namespace {
+
+// A 2 MB-aligned reservation.  Large pages first, then the largest alignment the OS will give us for free.
+void* reserve(uint64_t bytes, PageBacking& got, std::string& note) {
+#ifdef _WIN32
+    // MEM_LARGE_PAGES needs SeLockMemoryPrivilege.  Having it assigned to the account is not enough: the
+    // PROCESS must enable it in its own token (AdjustTokenPrivileges) before VirtualAlloc, or the call fails.
+    // An account without the assignment, or a failure to enable, leaves the process as it was: VirtualAlloc
+    // then refuses and the 4 KB fallback below runs - that is the EXPECTED outcome on a desktop.
+    {
+        HANDLE tok = nullptr;
+        if (OpenProcessToken(GetCurrentProcess(), TOKEN_ADJUST_PRIVILEGES | TOKEN_QUERY, &tok)) {
+            TOKEN_PRIVILEGES tp{};
+            tp.PrivilegeCount = 1;
+            if (LookupPrivilegeValueW(nullptr, L"SeLockMemoryPrivilege", &tp.Privileges[0].Luid)) {
+                tp.Privileges[0].Attributes = SE_PRIVILEGE_ENABLED;
+                if (!AdjustTokenPrivileges(tok, FALSE, &tp, 0, nullptr, nullptr) && GetLastError() != ERROR_NOT_ALL_ASSIGNED)
+                    (void) 0;   // nothing actionable: the large-page attempt below reports the outcome
+            }
+            CloseHandle(tok);
+        }
+    }
+    // MEM_LARGE_PAGES needs SeLockMemoryPrivilege; a normal account does not have it and VirtualAlloc then
+    // fails with ERROR_PRIVILEGE_NOT_HELD.  That is the EXPECTED outcome on a desktop, not an error.
+    SIZE_T large = GetLargePageMinimum();
+    // A/B switch: STRATA_NO_LARGEPAGES=1 skips the large-page attempt, same run, same boot.
+    if (large > 0 && std::getenv("STRATA_NO_LARGEPAGES") == nullptr) {
+        // MEM_LARGE_PAGES requires the allocation size to be an exact multiple of the large page size -
+        // anything else is ERROR_INVALID_PARAMETER (87), which reads like a privilege problem but is not.
+        // Round up: the slack is under 2 MB and the tail stays unused.
+        const SIZE_T lbytes = (SIZE_T) (((SIZE_T) bytes + large - 1) / large * large);
+        void* p = VirtualAlloc(nullptr, lbytes, MEM_RESERVE | MEM_COMMIT | MEM_LARGE_PAGES,
+                               PAGE_READWRITE);
+        if (p) {
+            got = PageBacking::LargePages;
+            note = "large pages (" + std::to_string((unsigned long long) large) + " B)";
+            return p;
+        }
+        // 1450 (ERROR_NO_SYSTEM_RESOURCES) is the large-page pool saying no, 87 is a size that is not a
+        // multiple of the minimum, 1314 is the privilege: without the byte count the three read as one bug.
+        note = "large pages refused for " + std::to_string((unsigned long long) lbytes) + " B (GetLargePageMinimum=" +
+               std::to_string((unsigned long long) large) + ", VirtualAlloc error " +
+               std::to_string((unsigned long long) GetLastError()) + "); using 4 KB pages";
+    } else if (std::getenv("STRATA_NO_LARGEPAGES") != nullptr) {
+        note = "large pages skipped (STRATA_NO_LARGEPAGES); using 4 KB pages";
+    } else {
+        note = "this system has no large-page minimum; using 4 KB pages";
+    }
+    void* p = VirtualAlloc(nullptr, (SIZE_T) bytes, MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE);
+    got = PageBacking::NormalPages;
+    return p;
+#else
+    void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE,
+                   MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_HUGE_2MB, -1, 0);
+    if (p != MAP_FAILED) {
+        got = PageBacking::LargePages;
+        note = "hugetlb 2 MB pages";
+        return p;
+    }
+    note = "MAP_HUGETLB unavailable (no hugetlb pool configured?); using 4 KB pages";
+    p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+    got = PageBacking::NormalPages;
+    return p == MAP_FAILED ? nullptr : p;
+#endif
+}
+
+void release(void* p, uint64_t bytes) {
+    if (!p) return;
+#ifdef _WIN32
+    (void) bytes;
+    VirtualFree(p, 0, MEM_RELEASE);
+#else
+    munmap(p, bytes);
+#endif
+}
+
+}  // namespace
+
+uint64_t fnv1a64(const uint8_t* p, uint64_t n, uint64_t seed) {
+    uint64_t h = seed;
+    for (uint64_t i = 0; i < n; ++i) {
+        h ^= p[i];
+        h *= 1099511628211ull;
+    }
+    return h;
+}
+
+namespace {
+/*
+DPCT1010:1113: SYCL uses exceptions to report errors and does not use the error
+codes. The cudaGetLastError function call was replaced with 0. You need to
+rewrite this code.
+*/
+bool clear_error() {(void)0; return true; }
+}  // namespace
+
+namespace {
+std::vector<uint64_t> uniform_bounds(uint64_t bytes, uint64_t slice) {
+    std::vector<uint64_t> b;
+    if (slice == 0) return b;
+    for (uint64_t off = 0; off + slice <= bytes; off += slice) b.push_back(off);
+    if (!b.empty()) b.push_back(b.back() + slice);
+    return b;
+}
+}  // namespace
+
+PinnedArena::PinnedArena(uint64_t bytes, uint64_t slice) : PinnedArena(bytes, uniform_bounds(bytes, slice)) {
+    if (slice_bytes) slice_bytes = slice;   // sliced registration: record the uniform size
+}
+
+PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
+                         uint64_t max_pinned_bytes) try
+    : capacity(bytes) {
+    if (bytes == 0) return;
+    base = reserve(bytes, backing, note);
+
+    // Register with CUDA BEFORE any page is touched: cudaHostRegister pins what is resident now, and a region
+    // that has already been faulted in page by page is far more expensive to register and may fail outright.
+    if (base) {
+        const bool capped = max_pinned_bytes > 0 && max_pinned_bytes < bytes && bounds.size() >= 2;
+        const dpct::err0 e =
+            capped ? 0 :
+                   /*
+                   DPCT1027:1114: The call to cudaHostRegister was replaced with
+                   0 because SYCL currently does not support registering of
+                   existing host memory for use by device. Use USM to allocate
+                   memory for use by host and device.
+                   */
+                0;
+        if (!capped && e == 0) {
+            note = "cudaHostRegister PORTABLE ok; " + note;
+            registered_bytes = bytes;
+        } else if (bounds.size() >= 2 && (capped || clear_error())) {
+            // Plan v0.3 P5: the whole range is refused, so pin it slice by slice from the start.  The rest stays
+            // resident through the working-set lock below.  (P6: slices may differ in size, one per layer.)
+            slice_bytes = 1;   // sliced; the uniform constructor records the size
+            for (size_t i = 0; i + 1 < bounds.size(); ++i) {
+                const uint64_t off = bounds[i], n = bounds[i + 1] - bounds[i];
+                if (capped && (off > max_pinned_bytes || n > max_pinned_bytes - off)) break;
+                /*
+                DPCT1027:1115: The call to cudaHostRegister was replaced with 0
+                because SYCL currently does not support registering of existing
+                host memory for use by device. Use USM to allocate memory for
+                use by host and device.
+                */
+                if (0 != 0) {
+                    /*
+                    DPCT1010:1116: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
+                    */
+                    (void)0;
+                    break;
+                }
+                slice_starts.push_back(off);
+                registered_bytes = off + n;
+                ++registered_slices;
+            }
+            note =
+                (capped ? "cudaHostRegister limited to " +
+                              std::to_string(max_pinned_bytes >> 30) +
+                              " GiB for CUDA1; "
+                        :
+                        /*
+                        DPCT1009:1117: SYCL reports errors using exceptions and
+                        does not use error codes. Please replace the
+                        "get_error_string_dummy(...)" with a real error-handling
+                        function.
+                        */
+                     "cudaHostRegister of the whole arena FAILED (" +
+                         std::string(dpct::get_error_string_dummy(e)) + "); ") +
+                std::to_string(registered_slices) + " slices pinned (" +
+                std::to_string(registered_bytes >> 30) + " GiB); " + note;
+            if (registered_bytes < bytes) {
+                const char* env = std::getenv("STRATA_ARENA_LOCK");
+                if (env == nullptr || std::string(env) != "0") {
+                    const strata::platform::LockResult lr =
+                        strata::platform::lock_resident((uint8_t*) base + registered_bytes, bytes - registered_bytes);
+                    locked_bytes = lr.locked_bytes;
+                    note = lr.note + "; " + note;
+                }
+            }
+        } else {
+            /*
+            DPCT1009:1118: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            note = std::string("cudaHostRegister FAILED (") +
+                   dpct::get_error_string_dummy(e) +
+                   ") - the arena is NOT pinned, so copies will be slow; " +
+                   note;
+            // **CONSUME THE ERROR, OR IT LIES ABOUT SOMETHING ELSE LATER.**
+            //
+            // `cudaGetLastError()` returns the last error and CLEARS it; until something reads it, the error
+            // state is sticky.  This failure is caught and handled right here - the arena is simply not pinned -
+            // but leaving it set meant the next `cudaGetLastError()` in the engine, which is `gr_read`'s launch
+            // check, reported "out of memory" for kernels that allocate nothing.  That cost a round: the arena
+            // was written off as not fitting the machine when in fact the only thing wrong was a stale error
+            // from this line.
+            //
+            // It is the same trap `gr.cu` warns about for ASYNC faults, in the other direction: a synchronous
+            // failure is sticky too, and it lies about where it happened just as convincingly.
+            /*
+            DPCT1010:1119: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            (void)0;
+            // Plan v0.3 P0.1: keep it RESIDENT instead. Unpinned, Windows trims the arena under memory pressure
+            // and the CPU pool's rate then depends on the OS; locking it through the working set needs no
+            // special privilege. STRATA_ARENA_LOCK=0 is the A/B arm.
+            const char* env = std::getenv("STRATA_ARENA_LOCK");
+            if (env == nullptr || std::string(env) != "0") {
+                const strata::platform::LockResult lr = strata::platform::lock_resident(base, bytes);
+                locked_bytes = lr.locked_bytes;
+                note = lr.note + "; " + note;
+            } else {
+                note = "arena lock disabled (STRATA_ARENA_LOCK=0); " + note;
+            }
+        }
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+PinnedArena::~PinnedArena() {
+    if (base) {
+        if (locked_bytes) strata::platform::unlock_resident((uint8_t*) base + (slice_bytes ? registered_bytes : 0), locked_bytes);
+        if (slice_bytes) {
+            /*
+            DPCT1027:1120: The call to cudaHostUnregister was replaced with 0
+            because SYCL currently does not support registering of existing host
+            memory for use by device. Use USM to allocate memory for use by host
+            and device.
+            */
+            for (uint64_t off : slice_starts) 0;
+        } else {
+            /*
+            DPCT1026:1121: The call to cudaHostUnregister was removed because
+            SYCL currently does not support registering of existing host memory
+            for use by device. Use USM to allocate memory for use by host and
+            device.
+            */
+        }
+        release(base, capacity);
+        base = nullptr;
+    }
+}
+
+LoadStats load_experts(const std::string& path, uint8_t* dst, uint64_t blob_bytes, uint64_t blobs_per_layer,
+                       uint64_t layers, int threads, uint64_t chunk) {
+    std::vector<uint64_t> off((size_t) layers), n((size_t) layers, blobs_per_layer * blob_bytes);
+    for (uint64_t L = 0; L < layers; ++L) off[(size_t) L] = L * blobs_per_layer * blob_bytes;
+    return load_experts_ranges(path, dst, off, n, threads, chunk);
+}
+
+LoadStats load_experts_ranges(const std::string& path, uint8_t* dst, const std::vector<uint64_t>& layer_off,
+                              const std::vector<uint64_t>& layer_bytes, int threads, uint64_t chunk) {
+    LoadStats st;
+    const uint64_t layers = (uint64_t) layer_off.size();
+    st.layers = layers;
+    st.bytes = 0;
+    for (uint64_t b : layer_bytes) st.bytes += b;
+    if (threads < 1) threads = 1;
+
+    const auto t0 = std::chrono::steady_clock::now();
+    std::vector<uint64_t> layer_hash((size_t) layers, 1469598103934665603ull);
+    std::atomic<uint64_t> next_layer{0};
+    std::atomic<uint64_t> read_ns_sum{0};   // summed over the threads: see LoadStats::read_seconds
+    std::atomic<uint64_t> copy_ns_sum{0};
+    std::mutex err_mu;
+    std::string err;
+
+    auto worker = [&]() {
+        std::vector<uint8_t> buf((size_t) chunk);
+        // One handle per thread, seeked once per layer: a shared handle would need a lock around the seek and
+        // would serialise the very thing the threads are here to parallelise.  `fread` on a `FILE*` rather than
+        // `std::ifstream`: see the header - MSVC's `basic_filebuf::xsgetn` splits any request larger than
+        // `_INTERNAL_BUFSIZ - 1` into 4095-byte freads, which turned one 8 MiB chunk into ~2048 4 KiB reads.
+        // `fread` sees a request bigger than the stream buffer and passes it to `_read()`/
+        // `ReadFile()` unchanged, so the chunk size reaches the disk.  Buffered, not `FILE_FLAG_NO_BUFFERING`:
+        // the cache should still hold what it can.
+        FILE* f = std::fopen(path.c_str(), "rb");
+        if (f == nullptr) {
+            std::lock_guard<std::mutex> g(err_mu);
+            err = "cannot open " + path;
+            return;
+        }
+        // A `FILE*` has no destructor that closes it, and this function has early returns below (open, seek and
+        // short-read failures), so the guard is what keeps the closing correct on every path.
+        struct Closer {
+            FILE* f;
+            ~Closer() { if (f != nullptr) std::fclose(f); }
+        } closer{f};
+        uint64_t read_ns = 0, copy_ns = 0;
+        for (;;) {
+            const uint64_t L = next_layer.fetch_add(1);
+            if (L >= layers) break;
+            const uint64_t off = layer_off[(size_t) L];
+            uint64_t remaining = layer_bytes[(size_t) L];
+            uint64_t pos = 0;
+            uint64_t h = 1469598103934665603ull;
+            // 64-bit seek: the pack is 42.9 GB, so the 32-bit `fseek` would wrap past 4 GiB
+            if (STRATA_FSEEK64(f, off) != 0) {
+                std::lock_guard<std::mutex> g(err_mu);
+                err = "seek to " + std::to_string(off) + " B failed in layer " + std::to_string(L);
+                return;
+            }
+            while (remaining > 0) {
+                const uint64_t n = remaining < chunk ? remaining : chunk;
+                const auto t_read = std::chrono::steady_clock::now();
+                const size_t got = std::fread(buf.data(), 1, (size_t) n, f);
+                read_ns += (uint64_t) std::chrono::duration_cast<std::chrono::nanoseconds>(
+                               std::chrono::steady_clock::now() - t_read).count();
+                // A short read is EOF or an I/O error, never a silent zero fill: say WHERE and HOW SHORT, and
+                // keep going no further - the caller turns this into a refused load, not a wrong answer.
+                if (got != (size_t) n) {
+                    std::lock_guard<std::mutex> g(err_mu);
+                    err = "short read in layer " + std::to_string(L) + ": got " + std::to_string(got) + " of "
+                          + std::to_string(n) + " B at offset " + std::to_string(off + pos)
+                          + (std::ferror(f) != 0 ? " (ferror set)" : "");
+                    return;
+                }
+                const auto t_copy = std::chrono::steady_clock::now();
+                std::memcpy(dst + off + pos, buf.data(), (size_t) n);
+                h = fnv1a64(buf.data(), n, h);
+                copy_ns += (uint64_t) std::chrono::duration_cast<std::chrono::nanoseconds>(
+                               std::chrono::steady_clock::now() - t_copy).count();
+                pos += n;
+                remaining -= n;
+            }
+            layer_hash[(size_t) L] = h;
+        }
+        read_ns_sum.fetch_add(read_ns);
+        copy_ns_sum.fetch_add(copy_ns);
+    };
+
+    std::vector<std::thread> pool;
+    for (int i = 1; i < threads; ++i) pool.emplace_back(worker);
+    worker();
+    for (auto& t : pool) t.join();
+
+    if (!err.empty()) {
+        std::fprintf(stderr, "load_experts: %s\n", err.c_str());
+        st.seconds = -1.0;
+        st.ok = false;
+        st.error = err;
+        return st;
+    }
+    st.read_seconds = (double) read_ns_sum.load() / 1e9;
+    st.copy_seconds = (double) copy_ns_sum.load() / 1e9;
+    st.layer_checksums = std::move(layer_hash);
+    st.seconds = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+    return st;
+}
+
+StreamStats stream_bandwidth(const uint8_t *src, uint64_t bytes, uint64_t chunk,
+                             int iters) try {
+    StreamStats st;
+    st.bytes = bytes * (uint64_t) iters;
+    st.chunk = chunk;
+    uint8_t* dst = nullptr;
+    dpct::queue_ptr s{};
+    if (DPCT_CHECK_ERROR(dst = (uint8_t *)sycl::malloc_device(
+                             (size_t)chunk, dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "stream_bandwidth: cudaMalloc failed for %llu B\n", (unsigned long long) chunk);
+        st.seconds = -1.0;
+        return st;
+    }
+    s = dpct::get_current_device().create_queue(true);
+
+    // one untimed pass so the first transfer's page-fault and setup cost is not in the measurement
+    for (uint64_t off = 0; off + chunk <= bytes; off += chunk) {
+        /*
+        DPCT1124:1122: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        s->memcpy(dst, src + off, (size_t)chunk);
+    }
+    s->wait();
+
+    const auto t0 = std::chrono::steady_clock::now();
+    for (int it = 0; it < iters; ++it) {
+        for (uint64_t off = 0; off + chunk <= bytes; off += chunk) {
+            /*
+            DPCT1124:1123: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            s->memcpy(dst, src + off, (size_t)chunk);
+        }
+    }
+    s->wait();
+    st.seconds = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+
+    dpct::get_current_device().destroy_queue(s);
+    sycl::free(dst, dpct::get_in_order_queue());
+    return st;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/remote_experts.cpp b/sycl/src/core/remote_experts.cpp
new file mode 100644
index 00000000000..2cec2f1be40
--- /dev/null
+++ b/sycl/src/core/remote_experts.cpp
@@ -0,0 +1,477 @@
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/remote_experts.hpp"
+
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+
+#include <algorithm>
+#include <chrono>
+#include <cstdlib>
+#include <cstring>
+
+namespace strata::core {
+namespace {
+constexpr int64_t H = strata::kernels::cpu::H;
+constexpr int64_t FF = strata::kernels::cpu::FF;
+constexpr int64_t CAP = strata::kernels::cpu::MAXT * 10;
+
+// Small enough to copy as one pinned buffer per layer. The kernels read the
+// individual arrays through pointers into the same device allocation.
+struct RemoteMeta {
+    unsigned long long ptr[CAP];
+    int32_t start[CAP + 1];
+    int32_t dst[CAP];
+    int32_t tok[CAP];
+    int32_t count;
+};
+
+struct DeviceScope {
+    int previous = -1;
+    bool ok = false;
+    dpct::err0 status = 0;
+    const char* failed_step = nullptr;
+    explicit DeviceScope(int device) {
+        status = DPCT_CHECK_ERROR(previous = dpct::get_current_device_id());
+        if (status != 0) {
+            previous = -1;
+            failed_step = "cudaGetDevice";
+            return;
+        }
+        /*
+        DPCT1093:88: The "device" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        status = DPCT_CHECK_ERROR(dpct::select_device(device));
+        if (status != 0) {
+            failed_step = "cudaSetDevice";
+            return;
+        }
+        ok = true;
+    }
+    /*
+    DPCT1093:89: The "previous" device may be not the one intended for use.
+    Adjust the selected device if needed.
+    */
+    ~DeviceScope() { if (previous >= 0) dpct::select_device(previous); }
+    std::string error(int device) const {
+        return std::string("CUDA") + std::to_string(device) +
+               " experts: " + (failed_step ? failed_step : "device switch") +
+               /*
+               DPCT1009:90: SYCL reports errors using exceptions and does not
+               use error codes. Please replace the "get_error_string_dummy(...)"
+               with a real error-handling function.
+               */
+               "(" +
+               std::to_string(device) +
+               ") failed: " + dpct::get_error_string_dummy(status) +
+               " (CUDA error " + std::to_string((int)status) + ")";
+    }
+};
+
+bool check(dpct::err0 result, const char *what, std::string &err, int device) {
+    if (result == 0) return true;
+    /*
+    DPCT1009:91: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    err = "CUDA" + std::to_string(device) + " experts: " + what + ": " +
+          dpct::get_error_string_dummy(result);
+    return false;
+}
+} // namespace
+
+RemoteExperts::~RemoteExperts() { close(); }
+
+bool RemoteExperts::preflight(int device, double &free_gib,
+                              std::string &err) try {
+    int count = 0;
+    if (!check(DPCT_CHECK_ERROR(count = dpct::device_count()),
+               "cudaGetDeviceCount", err, device)) return false;
+    if (device < 1 || device >= count) {
+        err = "CUDA" + std::to_string(device) + " experts: CUDA device is not visible";
+        return false;
+    }
+    // The layer waits for this GPU on the CPU pool's critical path: spin instead of sleeping, whose wake-up
+    // costs more than a small expert batch takes (measured: ~0.3 ms per round trip on Windows).  Only possible
+    // before the device's context exists, so first thing; STRATA_REMOTE_SPIN=0 keeps the driver's default.
+    const char* spin = std::getenv("STRATA_REMOTE_SPIN");
+    /*
+    DPCT1007:93: Migration of cudaInitDevice is not supported.
+    */
+    (void) spin;   // SYCL: no cudaInitDevice scheduling flags; the runtime picks its own wait policy
+    /*
+    DPCT1026:92: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    DeviceScope scope(device);
+    if (!scope.ok) { err = scope.error(device); return false; }
+    size_t free_bytes = 0, total_bytes = 0;
+    /*
+    DPCT1106:94: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    if (!check(DPCT_CHECK_ERROR(dpct::get_current_device().get_memory_info(
+                   free_bytes, total_bytes)),
+               "preflight free memory", err, device)) return false;
+    free_gib = (double) free_bytes / 1073741824.0;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void RemoteExperts::close() {
+    if (device_ < 0) return;
+    DeviceScope scope(device_);
+    if (scope.ok) {
+        if (stream_) stream_->wait();
+        cache_.close();
+        if (d_x_) sycl::free(d_x_, dpct::get_in_order_queue());
+        if (d_out_) sycl::free(d_out_, dpct::get_in_order_queue());
+        if (d_q8_) sycl::free(d_q8_, dpct::get_in_order_queue());
+        if (d_scales_) sycl::free(d_scales_, dpct::get_in_order_queue());
+        if (d_scratch_) sycl::free(d_scratch_, dpct::get_in_order_queue());
+        if (d_meta_) sycl::free(d_meta_, dpct::get_in_order_queue());
+        if (h_x_) sycl::free(h_x_, dpct::get_in_order_queue());
+        if (h_out_) sycl::free(h_out_, dpct::get_in_order_queue());
+        if (h_meta_) sycl::free(h_meta_, dpct::get_in_order_queue());
+        if (stream_) dpct::get_current_device().destroy_queue(stream_);
+    }
+    device_ = -1;
+    stream_ = &dpct::get_in_order_queue();
+    h_x_ = h_out_ = d_x_ = d_out_ = nullptr;
+    h_meta_ = d_meta_ = nullptr;
+    d_q8_ = nullptr;
+    d_scales_ = nullptr;
+    d_scratch_ = nullptr;
+    d_start_ = d_dst_ = d_tok_ = d_count_ = nullptr;
+    d_ptr_ = nullptr;
+    original_row_.clear();
+    layers_present_.clear();
+}
+
+bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
+                         const std::vector<std::pair<int32_t, int32_t>> &ranked,
+                         const ExpertCache &primary, ExpertSource &source,
+                         std::vector<uint8_t> &claimed, std::string &err) try {
+    close();
+    int count = 0;
+    if (!check(DPCT_CHECK_ERROR(count = dpct::device_count()),
+               "cudaGetDeviceCount", err, device)) return false;
+    if (device < 1 || device >= count || slots <= 0 || ranked.empty() ||
+        layers <= 0 || experts <= 0 || claimed.size() != (size_t) layers * (size_t) experts) {
+        err = "CUDA" + std::to_string(device) + " experts: need the device, ranked experts and positive slot count";
+        return false;
+    }
+    DeviceScope scope(device);
+    if (!scope.ok) { err = scope.error(device); return false; }
+    device_ = device;
+    n_expert_ = experts;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    std::vector<std::pair<int32_t, int32_t>> selected;
+    selected.reserve((size_t) slots);
+    std::vector<uint8_t> picked(claimed.size(), 0);
+    for (const auto& pair : ranked) {
+        if (pair.first < 0 || pair.first >= layers || pair.second < 0 || pair.second >= experts) continue;
+        const size_t index = (size_t) pair.first * (size_t) experts + (size_t) pair.second;
+        if (primary.slot_of(pair.first, pair.second) < 0 && !claimed[index] && !picked[index]) {
+            selected.push_back(pair);
+            picked[index] = 1;
+            if ((int) selected.size() >= slots) break;
+        }
+    }
+    if (selected.empty()) { err = "CUDA" + std::to_string(device) + " experts: no unclaimed experts remain"; close(); return false; }
+    std::vector<int64_t> sizes;
+    if (lay.native) {
+        sizes.reserve(selected.size());
+        for (const auto& pair : selected) sizes.push_back((int64_t) lay.blob_bytes(pair.first));
+    }
+    size_t free_bytes = 0, total_bytes = 0;
+    /*
+    DPCT1106:96: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    if (!check(DPCT_CHECK_ERROR(dpct::get_current_device().get_memory_info(
+                   free_bytes, total_bytes)),
+               "free memory", err, device)) {
+        close(); return false;
+    }
+    uint64_t needed = 0;
+    for (const auto& pair : selected)
+        needed += lay.native ? (lay.blob_bytes(pair.first) + 255) / 256 * 256 : lay.max_blob;
+    // Leave room for the CUDA context, staging and later driver allocations, especially under WDDM.
+    if (needed + (512ull << 20) > free_bytes) {
+        err = "CUDA" + std::to_string(device) + " experts: slots leave less than 512 MiB free; reduce --expert-cache-device" + std::to_string(device);
+        close(); return false;
+    }
+    const bool cache_ok = lay.native ? cache_.open_sized(sizes, layers, experts, err)
+                                     : cache_.open((int64_t) selected.size(), layers, experts,
+                                                   (int64_t) lay.max_blob, err);
+    if (!cache_ok) { err = "CUDA" + std::to_string(device) + " experts: " + err; close(); return false; }
+    for (const auto& pair : selected) {
+        const int32_t slot = cache_.admit(pair.first, pair.second);
+        const uint8_t* blob = source.blob(pair.first, pair.second);
+        if (slot < 0 || !blob || !cache_.fill_slot_blocking(slot, blob, err, (int64_t) lay.blob_bytes(pair.first))) {
+            err = "CUDA" + std::to_string(device) + " experts: " +
+                  (err.empty() ? "cache fill failed" : err);
+            close(); return false;
+        }
+    }
+    const auto& first = selected.front();
+    if (!cache_.verify_slot(cache_.slot_of(first.first, first.second), source.blob(first.first, first.second),
+                            err, (int64_t) lay.blob_bytes(first.first))) {
+        err = "CUDA" + std::to_string(device) + " experts: " + err;
+        close(); return false;
+    }
+
+    const size_t scratch = std::max<size_t>(
+        (size_t) strata::kernels::moe_hit_grouped_scratch_bytes(CAP, H, FF),
+        strata::kernels::native_expert_scratch_bytes(CAP, FF));
+    const bool allocated =
+        /*
+        DPCT1025:97: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        check(DPCT_CHECK_ERROR(
+                  stream_ = dpct::get_current_device().create_queue(true)),
+              "stream", err, device) &&
+        /*
+        DPCT1048:2: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        /*
+        DPCT1048:3: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        check(
+            DPCT_CHECK_ERROR(h_x_ = sycl::malloc_host<float>(
+                                 (size_t)CAP * H, dpct::get_in_order_queue())),
+            "input staging", err, device) &&
+        /*
+        DPCT1048:4: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        /*
+        DPCT1048:5: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        check(
+            DPCT_CHECK_ERROR(h_out_ = sycl::malloc_host<float>(
+                                 (size_t)CAP * H, dpct::get_in_order_queue())),
+            "result staging", err, device) &&
+        /*
+        DPCT1048:6: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        check(DPCT_CHECK_ERROR(
+                  h_meta_ = (void *)sycl::malloc_host(
+                      sizeof(RemoteMeta), dpct::get_in_order_queue())),
+              "metadata staging", err, device) &&
+        check(
+            DPCT_CHECK_ERROR(d_x_ = sycl::malloc_device<float>(
+                                 (size_t)CAP * H, dpct::get_in_order_queue())),
+            "input", err, device) &&
+        check(
+            DPCT_CHECK_ERROR(d_out_ = sycl::malloc_device<float>(
+                                 (size_t)CAP * H, dpct::get_in_order_queue())),
+            "result", err, device) &&
+        check(DPCT_CHECK_ERROR(
+                  d_q8_ = (uint8_t *)sycl::malloc_device(
+                      (size_t)CAP * (H / 32) * 36, dpct::get_in_order_queue())),
+              "activation", err, device) &&
+        check(DPCT_CHECK_ERROR(
+                  d_scales_ = sycl::malloc_device<float>(
+                      (size_t)CAP * (H / 32), dpct::get_in_order_queue())),
+              "activation scales", err, device) &&
+        check(DPCT_CHECK_ERROR(d_scratch_ = (void *)sycl::malloc_device(
+                                   scratch, dpct::get_in_order_queue())),
+              "scratch", err, device) &&
+        check(DPCT_CHECK_ERROR(
+                  d_meta_ = (void *)sycl::malloc_device(
+                      sizeof(RemoteMeta), dpct::get_in_order_queue())),
+              "group metadata", err, device);
+    if (!allocated) { close(); return false; }
+    // Zero-copy: the helper reads its input from, and writes its compact rows into, the pinned host buffers
+    // directly - two copies fewer per layer, each of which is a PCIe round trip.  STRATA_REMOTE_ZEROCOPY=0 copies.
+    const char* zc = std::getenv("STRATA_REMOTE_ZEROCOPY");
+    zero_copy_ = !(zc && zc[0] == '0') &&
+                 DPCT_CHECK_ERROR(*(void **)&z_x_ = (float *)h_x_) == 0 &&
+                 DPCT_CHECK_ERROR(*(void **)&z_out_ = (float *)h_out_) == 0;
+    /*
+    DPCT1026:95: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    auto *meta = (RemoteMeta *)d_meta_;
+    d_ptr_ = meta->ptr;
+    d_start_ = meta->start;
+    d_dst_ = meta->dst;
+    d_tok_ = meta->tok;
+    d_count_ = &meta->count;
+    owned_.resize(CAP);
+    layers_present_.assign((size_t) layers, 0);
+    group_of_.resize(CAP);
+    group_id_.reserve(CAP);
+    ptr_.reserve(CAP);
+    start_.reserve(CAP + 1);
+    dst_.reserve(CAP);
+    tok_.reserve(CAP);
+    original_row_.reserve(CAP);
+    computed_ = 0;
+    launched_layers_ = 0;
+    returned_bytes_ = full_row_bytes_ = 0;
+    for (const auto& pair : selected) {
+        layers_present_[(size_t) pair.first] = 1;
+        claimed[(size_t) pair.first * (size_t) experts + (size_t) pair.second] = 1;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool RemoteExperts::begin(int64_t layer, const float *x, const int32_t *ids,
+                          int64_t n_tok, int64_t k, const int32_t *kind,
+                          const int32_t *primary_res, std::string &err) try {
+    // cumulative host time in here (staging and launches), reported per request by the driver
+    struct Timer { double& acc; std::chrono::steady_clock::time_point t0 = std::chrono::steady_clock::now();
+        ~Timer() { acc += std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t0).count(); } } timer{ms_begin_};
+    const int64_t n = n_tok * k;
+    if (n <= 0 || n > CAP || n_tok > strata::kernels::cpu::MAXT || k != 10 || layer < 0 ||
+        (size_t) layer >= layers_present_.size() || device_ < 0) {
+        err = "CUDA" + std::to_string(device_) + " experts: invalid layer, routing width or window size";
+        return false;
+    }
+    std::fill(owned_.begin(), owned_.begin() + n, 0);
+    group_id_.clear(); ptr_.clear(); start_.clear(); dst_.clear(); tok_.clear(); original_row_.clear();
+    if (!layers_present_[(size_t) layer]) return true;
+    std::fill(group_of_.begin(), group_of_.begin() + n, -1);
+    for (int64_t i = 0; i < n; ++i) {
+        const int32_t e = ids[i];
+        if ((kind && kind[i] != -1) || e < 0 || e >= n_expert_ ||
+            (primary_res && primary_res[(size_t) layer * (size_t) n_expert_ + (size_t) e] >= 0)) continue;
+        const int32_t slot = cache_.slot_of(layer, e);
+        if (slot < 0) continue;
+        owned_[(size_t) i] = 1;
+        int32_t group = -1;
+        for (size_t g = 0; g < group_id_.size(); ++g)
+            if (group_id_[g] == e) { group = (int32_t) g; break; }
+        if (group < 0) {
+            group = (int32_t) group_id_.size();
+            group_id_.push_back(e);
+            ptr_.push_back((unsigned long long) cache_.device_slot(slot));
+        }
+        group_of_[(size_t) i] = group;
+        ++computed_;
+    }
+    if (group_id_.empty()) return true;
+    for (size_t g = 0; g < group_id_.size(); ++g) {
+        start_.push_back((int32_t) dst_.size());
+        for (int64_t i = 0; i < n; ++i) if (group_of_[(size_t) i] == (int32_t) g) {
+            // The grouped kernels read the activation from `tok`, so their
+            // output row can instead be packed densely for the USB4 return.
+            original_row_.push_back((int32_t) i);
+            dst_.push_back((int32_t) dst_.size());
+            tok_.push_back((int32_t) (i / k));
+        }
+    }
+    start_.push_back((int32_t) dst_.size());
+    // Private pinned buffers survive until this GPU has consumed them. The CPU
+    // pool can write other output rows without a cross-device race.
+    std::memcpy(h_x_, x, (size_t) n_tok * H * sizeof(float));
+    auto* meta = (RemoteMeta*) h_meta_;
+    std::memcpy(meta->ptr, ptr_.data(), ptr_.size() * sizeof(ptr_[0]));
+    std::memcpy(meta->start, start_.data(), start_.size() * sizeof(start_[0]));
+    std::memcpy(meta->dst, dst_.data(), dst_.size() * sizeof(dst_[0]));
+    std::memcpy(meta->tok, tok_.data(), tok_.size() * sizeof(tok_[0]));
+    meta->count = (int32_t) group_id_.size();
+    DeviceScope scope(device_);
+    if (!scope.ok) { err = scope.error(device_); return false; }
+    groups_ = (int32_t) group_id_.size();
+    const dpct::queue_ptr s = stream_;
+    const bool staged =
+        /*
+        DPCT1124:98: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        (zero_copy_ ||
+         check(DPCT_CHECK_ERROR(
+                   s->memcpy(d_x_, h_x_, (size_t)n_tok * H * sizeof(float))),
+               "copy input", err, device_)) &&
+        /*
+        DPCT1124:99: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(s->memcpy(d_meta_, h_meta_, sizeof(RemoteMeta))),
+              "copy group metadata", err, device_);
+    if (!staged) return false;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    if (lay.native) {
+        strata::kernels::quantize_q8_1_rows(zero_copy_ ? z_x_ : d_x_, n_tok, H, d_q8_, s);
+        const auto& fmt = lay.fmt[(size_t) layer];
+        auto L = strata::kernels::native_expert_layout(fmt.gu_type, fmt.d_type, fmt.n_embd, fmt.n_ff);
+        strata::kernels::native_expert_grouped(L, d_ptr_, d_start_, d_count_, d_dst_, d_tok_,
+                                               groups_, (int64_t) dst_.size(), d_q8_, d_scratch_, zero_copy_ ? z_out_ : d_out_, s);
+    } else {
+        strata::kernels::quantize_q8_0_scaled(zero_copy_ ? z_x_ : d_x_, d_q8_, d_scales_, n_tok * H, s);
+        strata::kernels::moe_grouped_s2(d_ptr_, d_start_, d_count_, d_dst_, d_tok_,
+                                        groups_, (int64_t) dst_.size(), d_q8_, d_scales_, d_scratch_, zero_copy_ ? z_out_ : d_out_, s);
+    }
+    const uint64_t compact_bytes = (uint64_t) dst_.size() * H * sizeof(float);
+    /*
+    DPCT1124:100: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    if (!zero_copy_ && !check(DPCT_CHECK_ERROR(s->memcpy(
+                                  h_out_, d_out_, (size_t)compact_bytes)),
+                              "copy results", err, device_)) return false;
+    ++launched_layers_;
+    returned_bytes_ += compact_bytes;
+    full_row_bytes_ += (uint64_t) n * H * sizeof(float);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool RemoteExperts::finish(float *out, std::string &err) try {
+    if (group_id_.empty()) return true;
+    DeviceScope scope(device_);
+    if (!scope.ok) { err = scope.error(device_); return false; }
+    const auto w0 = std::chrono::steady_clock::now();
+    if (!check(DPCT_CHECK_ERROR(stream_->wait()), "finish", err,
+               device_)) return false;
+    ms_wait_ += std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count();
+    for (size_t i = 0; i < original_row_.size(); ++i)
+        std::memcpy(out + (size_t) original_row_[i] * H, h_out_ + i * H, (size_t) H * sizeof(float));
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+} // namespace strata::core
diff --git a/sycl/src/core/session.cpp b/sycl/src/core/session.cpp
new file mode 100644
index 00000000000..f23b4a0a37c
--- /dev/null
+++ b/sycl/src/core/session.cpp
@@ -0,0 +1,1404 @@
+// src/core/session.cpp - one token through all 48 layers.  See the header for why the graphs are per-layer.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/session.hpp"
+#include "strata/core/progress.hpp"
+
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/cpu/pool.hpp"
+#include "strata/kernels/ngram.hpp"
+
+#include <atomic>
+#include <chrono>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <vector>
+
+// `_mm_pause` for the doorbell spin.  Guarded because it is x86-only; a target without it still builds, the
+// spin is just less polite to the pipeline.
+#if defined(_MSC_VER) || defined(__x86_64__) || defined(__i386__)
+#include <immintrin.h>
+#define STRATA_SPIN_PAUSE() _mm_pause()
+#else
+#define STRATA_SPIN_PAUSE() ((void) 0)
+#endif
+
+namespace strata::core {
+namespace {
+
+constexpr uint64_t SESSION_STATE_ALIGN = 256;
+
+uint64_t align_up(uint64_t n, uint64_t a) { return (n + a - 1) / a * a; }
+
+/// The floats one GDN layer's recurrent + conv state needs.  `gdn_buffers_bytes` carves them for ONE layer and
+/// `GdnBuffers::state`/`conv_state` point INTO that carve, so a session with 36 GDN layers has to give each one
+/// its own - they cannot share, because the recurrence is the whole point.
+uint64_t gdn_state_floats(const ModelGeometry& g) {
+    return (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
+           (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
+}
+
+}  // namespace
+
+/// `NG_HIST` rows of `hc_dim` floats: the PLE conv's history, which is the ONLY PLE state that lives in the
+/// session arena.  The table and the weights are model-level and the caller owns them.
+static uint64_t ple_hist_bytes() {
+    return (uint64_t) strata::kernels::NG_HIST * strata::kernels::NG_HC_DIM * sizeof(float);
+}
+
+uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k) {
+    uint64_t n = 0;
+    n += gdn_buffers_bytes(g);
+    n += (uint64_t) g.n_gdn_layers() * gdn_state_floats(g) * 4;
+    // One QSA state carries the RoPE table; the others borrow it (P7: 64 MiB per layer at 262K).
+    if (g.n_qsa_layers() > 0)
+        n += qsa_state_bytes(g, max_cells, true) + (uint64_t) (g.n_qsa_layers() - 1) * qsa_state_bytes(g, max_cells, false);
+    n += qsa_buffers_bytes(g, max_cells);
+    n += moe_buffers_bytes(g, k);
+    n += block_buffers_bytes(g);
+    n += ple_hist_bytes();                       // the PLE's NG_HIST normalized history rows
+    return align_up(n, SESSION_STATE_ALIGN) + 4096;
+}
+
+uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s) {
+    uint8_t* p = (uint8_t*) base;
+    uint64_t used = 0;
+    auto take = [&](uint64_t bytes) {
+        uint8_t* r = p + used;
+        used = align_up(used + bytes, SESSION_STATE_ALIGN);
+        return r;
+    };
+
+    s.max_cells = max_cells;
+    s.k = k;
+
+    gdn_buffers_init(g, take(gdn_buffers_bytes(g)), s.gdn);
+    s.gdn_state = (float*) take((uint64_t) g.n_gdn_layers() * gdn_state_floats(g) * 4);
+
+    // the 12 QSA states are separate allocations carved from one arena, because `QsaState` is a struct of
+    // pointers and `qsa_state_init` writes them - a contiguous array would need the arena to be laid out the
+    // same way, which is a coupling with nothing to gain.
+    const uint64_t first = qsa_state_bytes(g, max_cells, true), rest = qsa_state_bytes(g, max_cells, false);
+    s.qsa_state_arena = take(g.n_qsa_layers() > 0 ? first + (uint64_t) (g.n_qsa_layers() - 1) * rest : 0);
+    s.qsa_states = new QsaState[(size_t) g.n_qsa_layers()];
+    s.qsa_buf_arena = take(qsa_buffers_bytes(g, max_cells));
+
+    uint8_t* qp = (uint8_t*) s.qsa_state_arena;
+    // a layer whose pinned RAM could not be had (KV streaming's host copy) is half-built: going on would have the
+    // attention read null host pointers at the first request ("illegal memory access"), so the session fails here
+    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
+        if (qsa_state_init(g, max_cells, qp + (i == 0 ? 0 : first + (uint64_t) (i - 1) * rest), s.qsa_states[i],
+                           i == 0 ? nullptr : &s.qsa_states[0]) == 0)
+            return 0;
+    qsa_buffers_init(g, max_cells, s.qsa_buf_arena, s.qsa_bufs);
+
+    s.moe_arena = take(moe_buffers_bytes(g, k));
+    moe_buffers_init(g, k, s.moe_arena, s.moe);
+    s.block_arena = take(block_buffers_bytes(g));
+    block_buffers_init(g, s.block_arena, s.block);
+    // THE PLE HISTORY: NG_HIST rows of hc_dim floats, row-fastest.  Sequence state, carved here and zeroed by
+    // `session_zero`; it survives every token, which is the whole point of a conv history.
+    s.ple_hist = (float*) take(ple_hist_bytes());
+    s.R = s.block.R;
+    return used;
+}
+
+void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init, void* stream) {
+    dpct::queue_ptr cs = strata::q_of(stream);
+    // the residual: `hc` copies of the one vector a caller hands in.  A real sequence's first token is the
+    // embedding broadcast to every stream, which is the reference's own initial condition.
+    if (R_init != nullptr) {
+        for (int64_t c = 0; c < g.hc; ++c)
+            /*
+            DPCT1124:538: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            cs->memcpy(s.block.R + (size_t)c * g.n_embd, R_init,
+                       (size_t)g.n_embd * 4);
+    } else {
+        cs->memset(s.block.R, 0, (size_t)g.hc * g.n_embd * 4);
+    }
+    // every GDN layer's recurrence and conv history
+    cs->memset(s.gdn_state, 0,
+               (size_t)g.n_gdn_layers() * gdn_state_floats(g) * 4);
+    // and every QSA layer's cache and indexer
+    for (int64_t i = 0; i < g.n_qsa_layers(); ++i) qsa_state_zero(s.qsa_states[i], g, stream);
+    // **AND THE PLE'S CONV HISTORY AND TOKEN WINDOW.**  A sequence that started with a warm history would
+    // convolve over rows belonging to a different sequence - the conv reads NG_HIST previous NORMALIZED rows,
+    // so a stale one is a real contribution and not a zero.  The token window resets to `NG_HIST`-many nulls
+    // for the same reason: `ngram_rows` treats a missing predecessor as the EOS cut, which is what a sequence
+    // boundary IS.
+    cs->memset(s.ple_hist, 0, (size_t)ple_hist_bytes());
+    s.ple_prev[0] = -1;
+    s.ple_prev[1] = -1;
+    s.ple_token = -1;
+}
+
+/// Sets `s.gdn.state`/`conv_state` for `layer`, which is what makes one layer's GDN state its own.  Shared by
+/// the direct and captured paths so the two cannot disagree about which slice a layer owns.
+void gdn_point_at(const ModelGeometry& g, int64_t layer, SessionState& s) {
+    if (is_qsa_layer(g, layer)) return;
+    int64_t gdn_index = 0;
+    for (int64_t l = 0; l < layer; ++l) if (!is_qsa_layer(g, l)) ++gdn_index;
+    s.gdn.state = s.gdn_state + (size_t) gdn_index * gdn_state_floats(g);
+    s.gdn.conv_state = s.gdn.state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+}
+
+/// The per-token staging every QSA layer's captured H2D reads FROM.  Must run before each replay: the graphs
+/// captured the SOURCE POINTER, not the value, and that is exactly why the buffers are pinned and fixed.
+void stage_token(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s) {
+    strata::kernels::QsaShapes sh = strata::kernels::qsa_real_shapes();
+    sh.n_head = g.n_head;
+    sh.n_head_kv = g.n_head_kv;
+    sh.head_dim = g.head_dim;
+    sh.idx_n_head = g.idx_q_heads;
+    sh.idx_dim = g.idx_key_dim;
+    for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
+        QsaState& q = s.qsa_states[i];
+        qsa_step_fill(q.host_step, pos, sh);
+        for (int64_t h = 0; h < g.n_head; ++h) q.host_pos[h] = (int32_t) (pos_base + pos);
+    }
+}
+
+bool session_capture(const WeightTable& tables, const ModelGeometry& g, SessionState& s, const float* parts,
+                     SessionGraphs& gr, std::string& err, bool split) {
+    if (gr.captured) return true;
+    gr.execs =
+        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+    gr.posts =
+        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+    for (int64_t i = 0; i < g.n_layers; ++i) gr.posts[i] = nullptr;
+    if (split) {
+        gr.preA =
+            new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+        gr.preB =
+            new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+        for (int64_t i = 0; i < g.n_layers; ++i) { gr.preA[i] = nullptr; gr.preB[i] = nullptr; }
+        for (int k = 0; k < 5; ++k) {
+            gr.preP[k] =
+                new dpct::experimental::command_graph_exec_ptr[(size_t)
+                                                                   g.n_layers];
+            for (int64_t i = 0; i < g.n_layers; ++i) gr.preP[k][i] = nullptr;
+        }
+    }
+    gr.split_captured = split;
+    gr.n = 0;
+
+    int64_t qsa_index = 0;
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        gdn_point_at(g, l, s);
+        const bool qsa = is_qsa_layer(g, l);
+        QsaState& qst = qsa ? s.qsa_states[qsa_index] : s.qsa_states[0];
+
+        // **TWO GRAPHS PER LAYER, SPLIT AT THE ROUTER.**  `pre` ends with the doorbell rung; the host then runs
+        // the CPU pool on what it published; `post` combines those experts with THIS layer's weights.  Capturing
+        // them together is what the old single graph could not do, and the reason it could not is that
+        // `moe_combine` needs the pool's answer and the pool needs the router's.
+        auto capture =
+            [&](bool post, dpct::experimental::command_graph_exec_ptr *out,
+                const char *what, int half = 0, int stage_prefix = 0) -> bool {
+            try {
+                           dpct::queue_ptr cs = &dpct::get_in_order_queue();
+            if (DPCT_CHECK_ERROR(
+                    cs = dpct::get_current_device().create_queue(true)) != 0) {
+                err = std::string("session_capture: stream create failed");
+                return false;
+            }
+            if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs)) !=
+                0) {
+                err = "session_capture: begin failed at layer " + std::to_string(l);
+                return false;
+            }
+            err.clear();
+            // R0.9: `half` is 0 for every mode except the split capture, where it selects a prefix of the
+            // stages so the mixer and the FFN-front-plus-router can be timed separately.
+            const bool ok = post
+                                ? block_layer_post(tables, g, l, s.k, s.moe, s.block, parts, (void*) cs, err)
+                                : block_layer_pre(tables, g, l, 0, 0, s.gdn, qst, s.qsa_bufs, s.moe, s.k,
+                                                  s.block, (void*) cs, err, s.db, s.ple.ready() ? &s.ple : nullptr,
+                                                  half, stage_prefix);
+            if (!ok) {
+                err = "session_capture: " + std::string(what) + " layer " + std::to_string(l) + ": " + err;
+                return false;
+            }
+            dpct::experimental::command_graph_ptr graph = nullptr;
+            const dpct::err0 ce =
+                DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &graph));
+            dpct::get_current_device().destroy_queue(cs);
+            /*
+            DPCT1000:540: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (ce != 0) {
+                /*
+                DPCT1001:539: The statement could not be removed.
+                */
+                err = "session_capture: " + std::string(what) + " layer " +
+                      std::to_string(l) + ": " +
+                      /*
+                      DPCT1009:541: SYCL reports errors using exceptions and
+                      does not use error codes. Please replace the
+                      "get_error_string_dummy(...)" with a real error-handling
+                      function.
+                      */
+                      dpct::get_error_string_dummy(ce) +
+                      " (a synchronous call in the layer?)";
+                return false;
+            }
+            if (DPCT_CHECK_ERROR(
+                        *out =
+                            new sycl::ext::oneapi::experimental::command_graph<
+                                sycl::ext::oneapi::experimental::graph_state::
+                                    executable>(graph->finalize())) != 0) {
+                err = "session_capture: instantiate failed at layer " + std::to_string(l);
+                return false;
+            }
+            delete (graph);
+            return true;
+        }
+                           catch (sycl::exception const &exc) {
+                             std::cerr
+                                 << exc.what()
+                                 << "Exception caught at file:" << __FILE__
+                                 << ", line:" << __LINE__ << std::endl;
+                             std::exit(1);
+                           }
+        };
+        if (!capture(/*post=*/false, &gr.execs[l], "pre")) return false;
+        if (!capture(/*post=*/true, &gr.posts[l], "post")) return false;
+        if (split) {
+            if (!capture(/*post=*/false, &gr.preA[l], "preA", /*half=*/1)) return false;
+            if (!capture(/*post=*/false, &gr.preB[l], "preB", /*half=*/2)) return false;
+            // Prefixes 1..5, ALL through the new parameter - including the fifth, so that it and the fourth
+            // differ only in the one stage between them and not in how many nodes their graphs carry.
+            for (int k = 1; k <= 5; ++k)
+                if (!capture(/*post=*/false, &gr.preP[k - 1][l], "preP", /*half=*/0, /*stage_prefix=*/k))
+                    return false;
+        }
+        ++gr.n;
+        if (qsa) ++qsa_index;
+    }
+    gr.captured = true;
+    gr.parts_dev = const_cast<float*>(parts);   // the address the graphs baked in; the loop copies here
+    return true;
+}
+
+bool session_replay(const ModelGeometry &g, int64_t pos, int32_t pos_base,
+                    SessionState &s, SessionGraphs &gr, void *stream,
+                    std::string &err) try {
+    if (!gr.captured || gr.n != g.n_layers) { err = "session_replay: not captured"; return false; }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    stage_token(g, pos, pos_base, s);
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        const dpct::err0 e =
+            DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l]));
+        /*
+        DPCT1000:543: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (e != 0) {
+            /*
+            DPCT1009:544: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:542: The statement could not be removed.
+            */
+            err = "session_replay: layer " + std::to_string(l) + ": " +
+                  dpct::get_error_string_dummy(e);
+            return false;
+        }
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool session_replay_full(const ModelGeometry &g, int64_t pos, int32_t pos_base,
+                         SessionState &s, SessionGraphs &gr, void *stream,
+                         std::string &err) try {
+    if (!gr.captured || gr.n != g.n_layers || gr.posts == nullptr) {
+        err = "session_replay_full: not captured with post graphs";
+        return false;
+    }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    stage_token(g, pos, pos_base, s);
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        // `pre[l]` then `post[l]`, in the order `session_loop` uses.  The two are ordered on one stream, and
+        // `post[l]` reads what `pre[l]` wrote, so they cannot be reordered or run concurrently.
+        dpct::err0 e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l]));
+        /*
+        DPCT1000:546: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (e != 0) {
+            /*
+            DPCT1009:549: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:545: The statement could not be removed.
+            */
+            err = "session_replay_full: pre[" + std::to_string(l) +
+                  "]: " + dpct::get_error_string_dummy(e);
+            return false;
+        }
+        e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.posts[l]));
+        /*
+        DPCT1000:548: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (e != 0) {
+            /*
+            DPCT1009:550: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:547: The statement could not be removed.
+            */
+            err = "session_replay_full: post[" + std::to_string(l) +
+                  "]: " + dpct::get_error_string_dummy(e);
+            return false;
+        }
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool session_replay_stages_per_layer(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                                     SessionGraphs& gr, void* stream, std::vector<double>& mixer_per_layer,
+                                     double& ms_ffn, double& ms_post, std::string& err) {
+    if (!gr.split_captured || gr.preA == nullptr || gr.preB == nullptr) {
+        err = "session_replay_stages: not captured with the split";
+        return false;
+    }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    stage_token(g, pos, pos_base, s);
+
+    // Four events PER LAYER rather than four reused ones: reusing them would need a synchronisation after
+    // every layer to read them before the next launch overwrote them, and a per-layer sync would report the
+    // serialised time rather than the graph's.
+    const int64_t n = g.n_layers;
+    std::vector<dpct::event_ptr> ev((size_t)(n * 4));
+    for (auto& e : ev) {
+        if (DPCT_CHECK_ERROR(e = new sycl::event()) != 0) {
+            err = "session_replay_stages: event create"; return false;
+        }
+    }
+    struct Free {
+        std::vector<dpct::event_ptr> *v;
+        ~Free() { for (auto &e : *v) DPCT_CHECK_ERROR(dpct::destroy_event(e)); }
+    } frees{&ev};
+
+    for (int64_t l = 0; l < n; ++l) {
+        dpct::sync_barrier(ev[(size_t)(l * 4 + 0)], cs);
+        if (DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.preA[l])) != 0) {
+            err = "stages: preA"; return false;
+        }
+        dpct::sync_barrier(ev[(size_t)(l * 4 + 1)], cs);
+        if (DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.preB[l])) != 0) {
+            err = "stages: preB"; return false;
+        }
+        dpct::sync_barrier(ev[(size_t)(l * 4 + 2)], cs);
+        if (DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.posts[l])) != 0) {
+            err = "stages: post"; return false;
+        }
+        dpct::sync_barrier(ev[(size_t)(l * 4 + 3)], cs);
+    }
+    if (DPCT_CHECK_ERROR(cs->wait()) != 0) {
+        err = "stages: final sync"; return false;
+    }
+
+    mixer_per_layer.assign((size_t) n, 0.0);
+    ms_ffn = 0; ms_post = 0;
+    for (int64_t l = 0; l < n; ++l) {
+        float a = 0, b = 0, c = 0;
+        a = (ev[(size_t)(l * 4 + 1)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 4 + 0)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        b = (ev[(size_t)(l * 4 + 2)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 4 + 1)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        c = (ev[(size_t)(l * 4 + 3)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 4 + 2)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        mixer_per_layer[(size_t) l] = (double) a;
+        ms_ffn += b; ms_post += c;
+    }
+    return true;
+}
+
+bool session_replay_stages(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionState& s,
+                           SessionGraphs& gr, void* stream, double& ms_mixer, double& ms_ffn, double& ms_post,
+                           std::string& err) {
+    std::vector<double> per;
+    if (!session_replay_stages_per_layer(g, pos, pos_base, s, gr, stream, per, ms_ffn, ms_post, err)) return false;
+    ms_mixer = 0;
+    for (double v : per) ms_mixer += v;
+    return true;
+}
+
+bool session_replay_stage_sweep(const ModelGeometry &g, int64_t pos,
+                                int32_t pos_base, SessionState &s,
+                                SessionGraphs &gr, void *stream, int k,
+                                double &ms, std::string &err) try {
+    if (!gr.split_captured || gr.preP[0] == nullptr) {
+        err = "session_replay_stage_sweep: not captured with the split";
+        return false;
+    }
+    if (k < 1 || k > 5) { err = "session_replay_stage_sweep: k must be 1..5"; return false; }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    stage_token(g, pos, pos_base, s);
+
+    dpct::event_ptr a, b;
+    if (DPCT_CHECK_ERROR(a = new sycl::event()) != 0 ||
+        DPCT_CHECK_ERROR(b = new sycl::event()) != 0) {
+        err = "session_replay_stage_sweep: event create";
+        return false;
+    }
+    dpct::sync_barrier(a, cs);
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        const dpct::err0 e =
+            DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.preP[k - 1][l]));
+        /*
+        DPCT1000:552: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (e != 0) {
+            /*
+            DPCT1001:551: The statement could not be removed.
+            */
+            dpct::destroy_event(a);
+            dpct::destroy_event(b);
+            /*
+            DPCT1009:553: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            err = std::string("session_replay_stage_sweep: launch: ") +
+                  dpct::get_error_string_dummy(e);
+            return false;
+        }
+    }
+    dpct::sync_barrier(b, cs);
+    if (DPCT_CHECK_ERROR(cs->wait()) != 0) {
+        dpct::destroy_event(a);
+        dpct::destroy_event(b);
+        err = "session_replay_stage_sweep: sync";
+        return false;
+    }
+    float v = 0;
+    v = (b->get_profiling_info<sycl::info::event_profiling::command_end>() -
+         a->get_profiling_info<sycl::info::event_profiling::command_start>()) /
+        1000000.0f;
+    dpct::destroy_event(a);
+    dpct::destroy_event(b);
+    ms = (double) v;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool session_replay_stage_prefixes(const ModelGeometry &g, int64_t pos,
+                                   int32_t pos_base, SessionState &s,
+                                   SessionGraphs &gr, void *stream,
+                                   std::vector<double> &stage_ms,
+                                   std::vector<double> &mixer_per_layer,
+                                   std::string &err) try {
+    if (!gr.split_captured || gr.preP[0] == nullptr) {
+        err = "session_replay_stage_prefixes: not captured with the split";
+        return false;
+    }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    stage_token(g, pos, pos_base, s);
+    const int64_t n = g.n_layers;
+    const size_t r_floats = (size_t) g.hc * (size_t) g.n_embd;
+
+    float* saved = nullptr;
+    if (DPCT_CHECK_ERROR(saved = sycl::malloc_device<float>(
+                             r_floats, dpct::get_in_order_queue())) != 0) {
+        err = "session_replay_stage_prefixes: could not save the residual";
+        return false;
+    }
+    std::vector<dpct::event_ptr> ev((size_t)(n * 6));
+    bool ev_ok = true;
+    for (auto &e : ev) if (DPCT_CHECK_ERROR(e = new sycl::event()) != 0) {
+        ev_ok = false; break;
+    }
+    if (!ev_ok) {
+        for (auto &e : ev) DPCT_CHECK_ERROR(dpct::destroy_event(e));
+        sycl::free(saved, dpct::get_in_order_queue());
+        err = "session_replay_stage_prefixes: event create";
+        return false;
+    }
+    struct Cleanup {
+        std::vector<dpct::event_ptr> *v;
+        float* p;
+        ~Cleanup() {
+            for (auto &e : *v) DPCT_CHECK_ERROR(dpct::destroy_event(e));
+            sycl::free(p, dpct::get_in_order_queue());
+        }
+    } cleanup{&ev, saved};
+
+    double t[5] = {0, 0, 0, 0, 0};
+    mixer_per_layer.assign((size_t) n, 0.0);
+    for (int64_t l = 0; l < n; ++l) {
+        // The residual as this layer receives it, before any prefix has advanced it.
+        /*
+        DPCT1124:554: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        cs->memcpy(saved, s.block.R, r_floats * sizeof(float));
+        for (int k = 1; k <= 5; ++k) {
+            /*
+            DPCT1124:557: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (k > 1) cs->memcpy(s.block.R, saved, r_floats * sizeof(float));
+            dpct::sync_barrier(ev[(size_t)(l * 6 + k - 1)], cs);
+            const dpct::experimental::command_graph_exec_ptr ge =
+                (k == 5) ? gr.execs[l] : gr.preP[k - 1][l];
+            const dpct::err0 e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*ge));
+            /*
+            DPCT1000:556: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (e != 0) {
+                /*
+                DPCT1001:555: The statement could not be removed.
+                */
+                err = std::string(
+                          "session_replay_stage_prefixes: launch prefix ") +
+                      std::to_string(k) + ": " +
+                      /*
+                      DPCT1009:558: SYCL reports errors using exceptions and
+                      does not use error codes. Please replace the
+                      "get_error_string_dummy(...)" with a real error-handling
+                      function.
+                      */
+                      dpct::get_error_string_dummy(e);
+                return false;
+            }
+        }
+        dpct::sync_barrier(ev[(size_t)(l * 6 + 5)], cs);
+    }
+    if (DPCT_CHECK_ERROR(cs->wait()) != 0) {
+        err = "prefixes: final sync"; return false;
+    }
+
+    float t1 = 0, t2 = 0, t3 = 0, t4 = 0, t5 = 0;
+    for (int64_t l = 0; l < n; ++l) {
+        float a = 0, b = 0, c = 0, d = 0, e = 0;
+        a = (ev[(size_t)(l * 6 + 1)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 6 + 0)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        b = (ev[(size_t)(l * 6 + 2)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 6 + 1)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        c = (ev[(size_t)(l * 6 + 3)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 6 + 2)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        d = (ev[(size_t)(l * 6 + 4)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 6 + 3)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        e = (ev[(size_t)(l * 6 + 5)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+             ev[(size_t)(l * 6 + 4)]
+                 ->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+            1000000.0f;
+        t1 += a; t2 += b; t3 += c; t4 += d; t5 += e;
+        mixer_per_layer[(size_t) l] = (double) c;   // prefix 3 IS the mixer: stages 0..2
+    }
+    t[0] = t1;
+    t[1] = t2 - t1;
+    t[2] = t3 - t2;
+    t[3] = t4 - t3;
+    t[4] = t5 - t4;
+    stage_ms.assign(t, t + 5);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void session_graphs_free(SessionGraphs& gr) {
+    if (gr.execs) {
+        for (int64_t i = 0; i < gr.n; ++i) delete (gr.execs[i]);
+        delete[] gr.execs;
+    }
+    if (gr.posts) {
+        for (int64_t i = 0; i < gr.n; ++i)
+            if (gr.posts[i] != nullptr) delete (gr.posts[i]);
+        delete[] gr.posts;
+    }
+    if (gr.preA) {
+        for (int64_t i = 0; i < gr.n; ++i)
+            if (gr.preA[i] != nullptr) delete (gr.preA[i]);
+        delete[] gr.preA;
+    }
+    if (gr.preB) {
+        for (int64_t i = 0; i < gr.n; ++i)
+            if (gr.preB[i] != nullptr) delete (gr.preB[i]);
+        delete[] gr.preB;
+    }
+    for (int k = 0; k < 5; ++k) {
+        if (gr.preP[k] == nullptr) continue;
+        for (int64_t i = 0; i < gr.n; ++i)
+            if (gr.preP[k][i] != nullptr) delete (gr.preP[k][i]);
+        delete[] gr.preP[k];
+        gr.preP[k] = nullptr;
+    }
+    gr.preA = nullptr;
+    gr.preB = nullptr;
+    gr.split_captured = false;
+    gr.posts = nullptr;
+    gr.execs = nullptr;
+    gr.parts_dev = nullptr;
+    gr.n = 0;
+    gr.captured = false;
+}
+
+bool SessionLoopScratch::init(size_t parts_bytes_in, std::string &err) try {
+    if (y_miss != nullptr || probe != nullptr) {
+        err = "SessionLoopScratch::init: already initialised";
+        return false;
+    }
+    parts_bytes = parts_bytes_in;
+    // MAPPED as well as pinned: the token graph's handoff kernel reads it through its device pointer.
+    /*
+    DPCT1048:0: The original value cudaHostAllocMapped is not meaningful in the
+    migrated code and was removed or replaced with 0. You may need to check the
+    migrated code.
+    */
+    /*
+    DPCT1048:1: The original value cudaHostAllocPortable is not meaningful in
+    the migrated code and was removed or replaced with 0. You may need to check
+    the migrated code.
+    */
+    if (DPCT_CHECK_ERROR(y_miss = (float *)sycl::malloc_host(
+                             parts_bytes, dpct::get_in_order_queue())) != 0) {
+        err = "SessionLoopScratch: cudaHostAlloc for the pool's staging failed";
+        return false;
+    }
+    std::memset(y_miss, 0, parts_bytes);
+    if (DPCT_CHECK_ERROR(probe = new sycl::event()) != 0) {
+        err = "SessionLoopScratch: cudaEventCreate failed";
+        free();
+        return false;
+    }
+    // **PIN THE HOST ONCE, NOT ONCE PER TOKEN.**  `ExpertPool` builds its workers from `physical_cores(true)`,
+    // which drops the first physical core so the host loop can spin without taking a worker's cycles - and
+    // nothing in the pool can pin the host, so if this does not happen the spin is free to land on a worker's
+    // core or its SMT sibling.  The symptom is not an error: it is a CPU path at 26.9 GB/s where the same pool
+    // runs at 36.32.  It was being done and undone on EVERY token, which is a syscall pair on the critical path
+    // for a property that wants to hold for the whole session.
+    const std::vector<int> cores = strata::kernels::cpu::physical_cores(false);
+    if (!cores.empty()) {
+        pinned_core = strata::kernels::cpu::pin_current_thread(cores[0]);
+        pinned = true;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void SessionLoopScratch::free() {
+    // Restores the caller's affinity on every path, including teardown: a library that silently leaves its
+    // caller's thread nailed to one core is worse than one that never pinned at all.
+    if (pinned) {
+        strata::kernels::cpu::restore_thread_affinity(pinned_core);
+        pinned = false;
+        pinned_core = -1;
+    }
+    if (probe != nullptr) { dpct::destroy_event(probe); probe = nullptr; }
+    if (y_miss != nullptr) {
+        sycl::free(y_miss, dpct::get_in_order_queue()); y_miss = nullptr;
+    }
+    parts_bytes = 0;
+}
+
+bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
+                  SessionState &s, SessionGraphs &gr, PoolFn pool, HitFn hits,
+                  void *user, bool overlap, void *stream, std::string &err,
+                  float *dump_layers, SessionLoopScratch *scratch) try {
+    if (!gr.captured || gr.n != g.n_layers) { err = "session_loop: not captured"; return false; }
+    if (gr.parts_dev == nullptr) { err = "session_loop: the graphs were captured without a parts buffer"; return false; }
+    if (s.db == nullptr) { err = "session_loop: no doorbell; the loop has nothing to poll"; return false; }
+
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const int64_t k = s.k;
+    const size_t parts_bytes = (size_t) k * g.n_embd * 4;
+    ++gr.calls_total;
+
+    // ================================ THE POSITION, WHICH THIS LOOP NEVER STAGED ================================
+    //
+    // **EVERY TOKEN AFTER THE FIRST USED TO REPLAY POSITION 0.**  The QSA layers read their per-token counts from
+    // `st.step` and `st.pos_dev`, which are DEVICE buffers filled by an H2D copy captured INTO each graph.  A
+    // graph bakes the SOURCE POINTER, not the value - so the copy re-reads the pinned host buffers on every
+    // replay, and those hold whatever was last written there.  `session_capture` left them at position 0.
+    //
+    // `layer.hpp` documents the requirement this loop was missing: "The per-token staging every QSA layer's
+    // captured H2D reads FROM.  Must run before each replay: the graphs captured the SOURCE POINTER, not the
+    // value, and that is exactly why the buffers are pinned and fixed."  `session_replay` calls `stage_token`;
+    // `session_loop` did not.  **A single-token test cannot see a position that never advances** - which is why
+    // the whole suite passed while a 20-token prompt rotated every token at position 0.
+    stage_token(g, pos, pos_base, s);
+
+    // ---- **THE TOKEN PATH ALLOCATES NOTHING (P2.T10, review finding H3).**
+    //
+    // Everything this loop needs on the host - the pinned staging for the pool's answer, the doorbell probe
+    // event, and the host pin - lives in a `SessionLoopScratch` owned by the SESSION and passed in.  It used to
+    // be created here, once per token, and `cudaFreeHost` at the end of the call IMPLICITLY SYNCHRONISES THE
+    // DEVICE, so every token finished with a device-wide sync that nothing had asked for.  A comment here said
+    // "allocated once"; once per token is not once.
+    //
+    // Passing `nullptr` keeps the old behaviour so existing callers and tests are unaffected: the loop builds a
+    // local scratch and frees it on every exit path below, including the error returns.
+    SessionLoopScratch local;
+    if (scratch == nullptr) {
+        if (!local.init(parts_bytes, err)) return false;
+        scratch = &local;
+    }
+    struct LocalFree {
+        SessionLoopScratch* p;
+        ~LocalFree() { if (p != nullptr) p->free(); }
+    } local_free{scratch == &local ? &local : nullptr};
+    if (scratch->parts_bytes != parts_bytes) {
+        err = "session_loop: the scratch was sized for a different k or n_embd";
+        return false;
+    }
+
+    // HOST-side staging for the pool's answer.  It is copied to `gr.parts_dev` before the next launch, on the
+    // same stream, so the ordering is the stream's and no captured node is needed for it.
+    //
+    // ---- **PINNED, BECAUSE A COPY FROM PAGEABLE MEMORY IS NOT ASYNCHRONOUS AT ALL.**
+    //
+    // `cudaMemcpyAsync` with a pageable source cannot DMA: the driver first memcpys the bytes into an internal
+    // pinned bounce buffer, SYNCHRONOUSLY, on this thread, and only then enqueues the transfer.  So the "async"
+    // copy would be a blocking memcpy plus a driver round trip, on the critical path of all 48 layers.  The
+    // doorbell's `h_x_f` is `cudaHostAlloc(Mapped)` for exactly this reason and this buffer is the same kind of
+    // object.
+    float* y_miss = scratch->y_miss;
+    dpct::event_ptr probe = scratch->probe;
+
+    // the first layer has no previous layer's experts: `y_miss` starts at zero, which is what "hits are empty
+    // in this phase" means once every miss has been computed
+    /*
+    DPCT1124:559: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    cs->memcpy(gr.parts_dev, y_miss, parts_bytes);
+    doorbell_reset(*s.db);
+    uint32_t expected = 0;
+
+    // **`pre[0]` IS LAUNCHED BEFORE THE LOOP SO EVERY ITERATION HAS THE SAME SHAPE**: poll the ring that
+    // `pre[l]` published, run the pool on it, combine, then start layer `l+1`'s `pre`.
+    //
+    // SLOT 0 OF THE DUMP IS THE INPUT, not a layer output.  `s.R` holds the embedding broadcast to every stream
+    // when this function is entered, which is the reference's `hc_init` node - so dumping it here is what splits
+    // "the input to layer 0 is already wrong" from "layer 0 is wrong".
+    if (dump_layers != nullptr) {
+        const size_t n = (size_t) g.hc * (size_t) g.n_embd;
+        /*
+        DPCT1124:562: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        const dpct::err0 de =
+            DPCT_CHECK_ERROR(cs->memcpy(dump_layers, s.R, n * sizeof(float)));
+        /*
+        DPCT1000:561: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (de != 0) {
+            /*
+            DPCT1009:563: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:560: The statement could not be removed.
+            */
+            err = "session_loop: dump the input residual: " +
+                  std::string(dpct::get_error_string_dummy(de));
+            return false;
+        }
+    }
+    {
+        const auto t0 = std::chrono::steady_clock::now();
+        const dpct::err0 le =
+            DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[0]));
+        /*
+        DPCT1000:565: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (le != 0) {
+            /*
+            DPCT1009:566: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001:564: The statement could not be removed.
+            */
+            err = "session_loop: launch pre[0]: " +
+                  std::string(dpct::get_error_string_dummy(le));
+            return false;
+        }
+        dpct::sync_barrier(probe, cs);
+        (void) t0;
+    }
+
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        const auto t_launch = std::chrono::steady_clock::now();
+
+        // ---- poll for the ring.  **THE DRIVER CALL IS NOW A FALLBACK, NOT THE MECHANISM.**
+        const uint32_t want = ++expected;
+        bool rang = false;
+        bool mid_graph = false;
+        // VOLATILE, because the device writes this through mapped pinned memory and a cached host line would
+        // never see it.  Read through a volatile pointer so the compiler re-issues the load every iteration -
+        // otherwise this whole spin collapses into `while (true) { }`.
+        volatile uint32_t* const seq = s.db->h_seq;
+        for (;;) {
+            // **THE PER-ITERATION DRIVER CALL IS REQUIRED, AND THREE EXPERIMENTS NOW SAY SO.**  Round 287
+            // throttled this to one call in 64 and broke tests 51 and 56; adding `__threadfence_system()` to
+            // `doorbell_ring_kernel` and a volatile read here, then throttling, broke them again.  So the call
+            // is not merely flushing submission (round 195's reading) and it is not a missing fence either: on
+            // this driver, the device's write to mapped pinned memory becomes host-visible only when the driver
+            // is entered.  The fence and the volatile read are kept because they are correct and cost nothing -
+            // without them the ring's ordering against `x_f`/`ids`/`weights` is unstated - but they do not
+            // remove the need for the call, and nothing here should be read as claiming they do.
+            const dpct::err0 q = dpct::sycl_event_query(probe);
+            if (!rang && *seq >= want) {
+                rang = true;
+                mid_graph = (q != 0);
+            }
+            if (q == 0) break; // the graph has ended
+            if (q != 1) {
+                /*
+                DPCT1009:568: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                err = "session_loop: query at layer " + std::to_string(l) +
+                      ": " + dpct::get_error_string_dummy(q);
+                return false;
+            }
+            if (rang) break;                             // rung, and the graph is still running: the overlap
+            STRATA_SPIN_PAUSE();
+        }
+        if (mid_graph) ++gr.rings_mid_graph;
+        // the window, from just before the launch to the instant the ring was seen
+        const auto t_ring = std::chrono::steady_clock::now();
+        gr.ms_to_ring += std::chrono::duration<double, std::milli>(t_ring - t_launch).count();
+        if (!rang) {
+            // The graph finished without the ring being observed.  `h_seq` is monotonic, so this is not a race
+            // - it means the ring never happened, which is the failure round 199 found in a captured event.
+            err = "session_loop: layer " + std::to_string(l) + " ended without ringing";
+            return false;
+        }
+
+        // ---- **THE GPU'S HALF GOES FIRST, SO IT RUNS WHILE THE CPU DOES ITS HALF.**  `Launch` only enqueues:
+        // the quantize and the grouped expert kernel land on `main_cs` and the GPU starts on them immediately,
+        // while the host is still inside `pool` below.  Nothing here waits.
+        if (hits != nullptr) hits(user, cs, HitPhase::Launch, s.db->h_ids, k);
+
+        // ---- the pool, on the bytes the doorbell published.  **THESE ARE LAYER `l`'s EXPERTS.**
+        if (pool != nullptr) pool(user, s.db->h_x_f, s.db->h_ids, s.db->h_weights, g.n_embd, k, y_miss);
+
+        // ---- **AND THEY ARE COMBINED BY LAYER `l`, NOT BY LAYER `l+1`.**
+        //
+        // This copy and the launch below are the whole of the L100 fix.  `moe_combine` multiplies `parts` by
+        // THIS layer's `b.weights`, so `parts` must be THIS layer's expert outputs; the previous form copied
+        // the pool's answer into `parts_dev` for the NEXT layer, which computed
+        // `sum_j w_{l+1}[j] * expert_{ids_l,j}(x_l)` - both the selection and the input one layer stale while
+        // the weights were current.  It produced finite, fluent, deterministic tokens that were not the
+        // model's, and no timing test could see it.
+        /*
+        DPCT1124:567: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        cs->memcpy(gr.parts_dev, y_miss, parts_bytes);
+        // ---- **AND THEN THE COMBINE.**  Stream-ordered after the copy above, so `hit_out` is added to misses
+        // that are already in `parts`, and before `post[l]`, whose `moe_combine` reads the sum.  A no-op when
+        // there is no VRAM tier or nothing is resident, which is every layer until the cache warms.
+        if (hits != nullptr) hits(user, cs, HitPhase::Combine, nullptr, 0);
+        {
+            const dpct::err0 pe =
+                DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.posts[l]));
+            /*
+            DPCT1000:570: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (pe != 0) {
+                /*
+                DPCT1009:571: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1001:569: The statement could not be removed.
+                */
+                err = "session_loop: launch post[" + std::to_string(l) +
+                      "]: " + dpct::get_error_string_dummy(pe);
+                return false;
+            }
+        }
+        // ---- the C1 oracle.  `s.R` now holds layer `l`'s residual and keeps it until `post[l+1]` writes it, so
+        // a copy enqueued HERE - after `post[l]`, before `pre[l+1]` - is ordered correctly by the stream alone.
+        // Nothing is synchronised: the loop's existing final sync is what completes these.  See the note on
+        // `dump_layers` in session.hpp for why this is an enqueue and not a read.
+        if (dump_layers != nullptr) {
+            const size_t n = (size_t) g.hc * (size_t) g.n_embd;
+            /*
+            DPCT1124:574: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            const dpct::err0 de = DPCT_CHECK_ERROR(cs->memcpy(
+                dump_layers + (size_t)(l + 1) * n, s.R, n * sizeof(float)));
+            /*
+            DPCT1000:573: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (de != 0) {
+                /*
+                DPCT1009:575: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1001:572: The statement could not be removed.
+                */
+                err = "session_loop: dump layer " + std::to_string(l) + ": " +
+                      dpct::get_error_string_dummy(de);
+                return false;
+            }
+        }
+        if (!overlap) {
+            // THE COMPARISON ARM.  The same sequence with the pipeline removed: the CPU does not start until the
+            // layer is over, so nothing overlaps and the difference is attributable to the doorbell alone.
+            if (DPCT_CHECK_ERROR(cs->wait()) != 0) {
+                err = "session_loop: sync at layer " + std::to_string(l);
+                return false;
+            }
+        }
+        // ---- and layer l+1's routing starts.  `pre[l+1]` touches none of the buffers `post[l]` reads, because
+        // the two are ordered on one stream and `pre[l+1]`'s first use of `bb.mixed`/`bb.inject` is its own
+        // `gr_read`, which comes after `post[l]` has consumed them.
+        if (l + 1 < g.n_layers) {
+            const dpct::err0 ne =
+                DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l + 1]));
+            /*
+            DPCT1000:577: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (ne != 0) {
+                /*
+                DPCT1009:578: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1001:576: The statement could not be removed.
+                */
+                err = "session_loop: launch pre[" + std::to_string(l + 1) +
+                      "]: " + dpct::get_error_string_dummy(ne);
+                return false;
+            }
+            dpct::sync_barrier(probe, cs);
+        }
+        // ---- **THE SECOND HALF OF THE ROUND TRIP, AND THE HALF NOTHING WAS MEASURING.**
+        //
+        // From seeing the ring to having queued the next `pre`.  Everything in here is a driver call, and on
+        // the token path the GPU has nothing left to run for most of it - `pre[l]` has already rung, and
+        // `post[l]` cannot start until this code launches it.  So this interval is GPU-idle time, and it is
+        // the number that decides whether the fix is R2.4 (fewer launches per layer) or a faster kernel.
+        //
+        // It INCLUDES the `!overlap` synchronisation when that arm is selected, which is deliberate: that arm
+        // exists to show what the pipeline is worth, and hiding its cost here would defeat the comparison.
+        gr.ms_host += std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t_ring).count();
+    }
+    if (DPCT_CHECK_ERROR(cs->wait()) != 0) {
+        err = "session_loop: final sync"; return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool session_token(const WeightTable &tables, const ModelGeometry &g,
+                   int64_t pos, int32_t pos_base, SessionState &s,
+                   const float *parts, void *stream, bool sync_every_layer,
+                   std::string &err) try {
+    dpct::queue_ptr cs = strata::q_of(stream);
+    int64_t qsa_index = 0;
+    int64_t gdn_index = 0;
+
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        // THE GDN LAYERS EACH GET THEIR OWN STATE, and `GdnBuffers` carries it - so the session points the
+        // shared scratch at the right slice before each call.  Sharing one state across 36 layers would make
+        // every layer start from the previous layer's recurrence, which produces a perfectly finite answer.
+        if (!is_qsa_layer(g, l)) {
+            s.gdn.state = s.gdn_state + (size_t) gdn_index * gdn_state_floats(g);
+            s.gdn.conv_state = s.gdn.state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+            ++gdn_index;
+        }
+
+        err.clear();
+        const bool ok = is_qsa_layer(g, l)
+            ? block_layer(tables, g, l, pos, pos_base, s.gdn, s.qsa_states[qsa_index], s.qsa_bufs, s.moe, s.k,
+                          s.block, parts, stream, err, nullptr, s.ple.ready() ? &s.ple : nullptr)
+            : block_layer(tables, g, l, pos, pos_base, s.gdn, s.qsa_states[0], s.qsa_bufs, s.moe, s.k,
+                          s.block, parts, stream, err, nullptr, s.ple.ready() ? &s.ple : nullptr);
+        if (!ok) {
+            err = "layer " + std::to_string(l) + ": " + err;
+            return false;
+        }
+        if (is_qsa_layer(g, l)) ++qsa_index;
+
+        if (sync_every_layer) {
+            // THE DEBUG MODE, and its cost is the point: it is a real synchronisation after every layer, which
+            // P2.X3 forbids in the fast path.  It exists to turn an ASYNCHRONOUS error - a kernel reading a
+            // buffer a later layer wrote, or an out-of-range launch - into a failure AT THE LAYER THAT CAUSED
+            // IT, instead of a wrong number 40 layers later or at the end of the token.
+            const dpct::err0 e = DPCT_CHECK_ERROR(cs->wait());
+            /*
+            DPCT1000:580: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (e != 0) {
+                /*
+                DPCT1009:581: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1001:579: The statement could not be removed.
+                */
+                err = "layer " + std::to_string(l) + ": " +
+                      dpct::get_error_string_dummy(e);
+                return false;
+            }
+        }
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::core
+
+namespace strata::core {
+
+bool session_capture_token(const WeightTable &tables, const ModelGeometry &g,
+                           SessionState &s, float *parts_dev,
+                           const float *y_miss_host, size_t parts_bytes,
+                           TokenGraph &tg, std::string &err,
+                           const TokenHits *hits) try {
+    if (hits != nullptr && !hits->on()) { err = "session_capture_token: incomplete hit configuration"; return false; }
+    if (tg.captured) return true;
+    if (s.db == nullptr || s.db->d_flag == nullptr || s.db->d_seq == nullptr) {
+        err = "session_capture_token: the doorbell has no flag";
+        return false;
+    }
+    if (parts_dev == nullptr || y_miss_host == nullptr || parts_bytes == 0) {
+        err = "session_capture_token: parts buffers are required";
+        return false;
+    }
+    float* y_dev = nullptr;
+    if (DPCT_CHECK_ERROR(*(void **)&y_dev =
+                             (float *)const_cast<float *>(y_miss_host)) != 0 ||
+        !y_dev) {
+        err = "session_capture_token: the parts staging is not mapped pinned memory";
+        return false;
+    }
+    dpct::queue_ptr cs = &dpct::get_in_order_queue();
+    if (DPCT_CHECK_ERROR(cs = dpct::get_current_device().create_queue(true)) !=
+        0) {
+        err = "session_capture_token: stream create failed"; return false;
+    }
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs)) != 0) {
+        dpct::get_current_device().destroy_queue(cs);
+        err = "session_capture_token: begin capture failed";
+        return false;
+    }
+    int64_t qsa_index = 0;
+    bool ok = true;
+    for (int64_t l = 0; l < g.n_layers && ok; ++l) {
+        gdn_point_at(g, l, s);
+        const bool qsa = is_qsa_layer(g, l);
+        QsaState& qst = qsa ? s.qsa_states[qsa_index] : s.qsa_states[0];
+        err.clear();
+        ok = block_layer_pre(tables, g, l, 0, 0, s.gdn, qst, s.qsa_bufs, s.moe, s.k, s.block, (void*) cs, err, s.db,
+                             s.ple.ready() ? &s.ple : nullptr);
+        if (!ok) { err = "session_capture_token: pre layer " + std::to_string(l) + ": " + err; break; }
+        if (hits != nullptr) {
+            // After the ring (and the shared expert): the GPU's experts run while the CPU computes the misses.
+            strata::kernels::moe_hit_select(s.moe.ids, hits->d_res + l * hits->n_expert, (int) s.k,
+                                            (int) hits->n_expert, hits->d_slot, hits->d_dst, hits->d_count, (void*) cs);
+            strata::kernels::quantize_q8_0_scaled(s.block.mixed, hits->x_q8, hits->x_scale, g.n_embd, (void*) cs);
+            strata::kernels::moe_hit_grouped_s2_dev(hits->cache_base, hits->d_slot, hits->d_dst, hits->d_count, s.k,
+                                                    hits->blob, hits->x_q8, hits->scratch, hits->hit_out, (void*) cs,
+                                                    hits->x_scale);
+        }
+        strata::kernels::doorbell_wait(s.db->d_flag, s.db->d_seq, (void*) cs);
+        // A kernel, not a memcpy node: a copy-engine node splits the WDDM submission (measured 67 flushes/token).
+        strata::kernels::copy_from_mapped(parts_dev, y_dev, (int64_t) (parts_bytes / sizeof(float)), (void*) cs);
+        if (hits != nullptr)
+            strata::kernels::moe_hit_add(parts_dev, hits->hit_out, hits->d_dst, hits->d_count, s.k, g.n_embd, (void*) cs);
+        ok = block_layer_post(tables, g, l, s.k, s.moe, s.block, parts_dev, (void*) cs, err);
+        if (!ok) { err = "session_capture_token: post layer " + std::to_string(l) + ": " + err; break; }
+        if (qsa) ++qsa_index;
+    }
+    dpct::experimental::command_graph_ptr graph = nullptr;
+    const dpct::err0 ce =
+        DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &graph));
+    dpct::get_current_device().destroy_queue(cs);
+    if (!ok) { if (graph) delete (graph); return false; }
+    /*
+    DPCT1000:583: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (ce != 0) {
+        /*
+        DPCT1009:586: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:582: The statement could not be removed.
+        */
+        err = std::string("session_capture_token: end capture: ") +
+              dpct::get_error_string_dummy(ce);
+        return false;
+    }
+    const dpct::err0 ie = DPCT_CHECK_ERROR(
+        tg.exec = new sycl::ext::oneapi::experimental::command_graph<
+            sycl::ext::oneapi::experimental::graph_state::executable>(
+            graph->finalize()));
+    delete (graph);
+    /*
+    DPCT1000:585: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (ie != 0) {
+        /*
+        DPCT1009:587: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:584: The statement could not be removed.
+        */
+        err = std::string("session_capture_token: instantiate: ") +
+              dpct::get_error_string_dummy(ie);
+        return false;
+    }
+    tg.captured = true;
+    tg.n_layers = g.n_layers;
+    tg.y_src = y_miss_host;
+    tg.parts_bytes = parts_bytes;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool session_run_token(const ModelGeometry &g, int64_t pos, int32_t pos_base,
+                       SessionState &s, TokenGraph &tg, PoolFn pool, void *user,
+                       float *y_miss_host, void *stream, std::string &err) try {
+    if (!tg.captured) { err = "session_run_token: not captured"; return false; }
+    if (y_miss_host != tg.y_src) { err = "session_run_token: the staging buffer is not the captured one"; return false; }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    ++tg.calls;
+    stage_token(g, pos, pos_base, s);
+    doorbell_reset(*s.db);
+    const dpct::err0 le = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*tg.exec));
+    /*
+    DPCT1009:592: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:588: The statement could not be removed.
+    */
+    /*
+    DPCT1000:589: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (le != 0) {
+        err = std::string("session_run_token: launch: ") +
+              dpct::get_error_string_dummy(le);
+        return false;
+    }
+    (void)DPCT_CHECK_ERROR(
+        (cs->ext_oneapi_empty())); // one flush, so WDDM submits the graph now
+    static const int flush_us = [] {
+        const char* e = std::getenv("STRATA_TG_FLUSH_US");
+        return e ? std::atoi(e) : 2000;   // 24 Sep: 0 flushes run as fast as 5 us ones; this only notices faults
+    }();
+    volatile uint32_t* const seq = s.db->h_seq;
+    volatile uint32_t* const flag = s.db->h_flag;
+    using Clock = std::chrono::steady_clock;
+    for (int64_t l = 0; l < g.n_layers; ++l) {
+        const uint32_t want = (uint32_t) (l + 1);
+        const auto t0 = Clock::now();
+        auto last_flush = t0;
+        uint32_t spins = 0;
+        progress_at("token: waiting for the GPU to reach layer", l);
+        while (*seq < want) {
+            STRATA_SPIN_PAUSE();
+            if ((++spins & 1023u) != 0) continue;
+            const auto now = Clock::now();
+            if (now - last_flush > std::chrono::microseconds(flush_us)) {
+                // A slow ring: flush the submission queue once more, and notice a fault or a finished graph.
+                last_flush = now;
+                ++tg.flushes;
+                const dpct::err0 q = DPCT_CHECK_ERROR((cs->ext_oneapi_empty()));
+                if (q != 1 && *seq < want) {
+                    err = "session_run_token: layer " + std::to_string(l) +
+                          " never rang (" +
+                          /*
+                          DPCT1009:593: SYCL reports errors using exceptions and
+                          does not use error codes. Please replace the
+                          "get_error_string_dummy(...)" with a real
+                          error-handling function.
+                          */
+                          (q == 0
+                               ? std::string("graph finished")
+                               : std::string(dpct::get_error_string_dummy(q))) +
+                          ")";
+                    return false;
+                }
+            }
+            if (now - t0 > std::chrono::seconds(20)) {
+                err = "session_run_token: timed out waiting for layer " + std::to_string(l);
+                return false;
+            }
+        }
+        const auto t1 = Clock::now();
+        progress_at("token: the CPU experts of layer", l);
+        if (pool != nullptr) pool(user, s.db->h_x_f, s.db->h_ids, s.db->h_weights, g.n_embd, s.k, y_miss_host);
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        _mm_sfence();
+        *flag = want;
+        const auto t2 = Clock::now();
+        tg.ms_wait += std::chrono::duration<double, std::milli>(t1 - t0).count();
+        tg.ms_pool += std::chrono::duration<double, std::milli>(t2 - t1).count();
+    }
+    progress_at("token: waiting for the GPU to finish the token");
+    const dpct::err0 se = DPCT_CHECK_ERROR(cs->wait());
+    /*
+    DPCT1009:594: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:590: The statement could not be removed.
+    */
+    /*
+    DPCT1000:591: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (se != 0) {
+        err = std::string("session_run_token: ") +
+              dpct::get_error_string_dummy(se);
+        return false;
+    }
+    progress_at("decode");
+    progress_beat();
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void token_graph_free(TokenGraph& tg) {
+    if (tg.exec) delete (tg.exec);
+    tg = TokenGraph{};
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
new file mode 100644
index 00000000000..05b753ed9db
--- /dev/null
+++ b/sycl/src/core/verify.cpp
@@ -0,0 +1,1413 @@
+// src/core/verify.cpp - see include/strata/core/verify.hpp.
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/verify.hpp"
+#if defined(_WIN32)
+#include <intrin.h>
+#endif
+
+#include "strata/core/native_head.hpp"
+#include "strata/core/on_device.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/native_router.hpp"
+#include "strata/kernels/native_moe.hpp"
+#include "strata/kernels/cpu/expert.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/fused_gr.hpp"
+#include "strata/kernels/cvec.hpp"
+#include "strata/kernels/gr.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/native_qsa.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/native_rope.hpp"
+#include "strata/kernels/ngram.hpp"
+#include "strata/kernels/ple.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/qsa_select.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/rope.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/sampler.hpp"
+#include "strata/core/progress.hpp"
+#include "strata/kernels/shared_expert.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+
+#include <algorithm>
+#include <atomic>
+#include <map>
+#include <string>
+#include <vector>
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <exception>
+#include <immintrin.h>
+
+namespace strata::core {
+namespace {
+
+constexpr float EPS = 1e-6f;
+using Clock = std::chrono::steady_clock;
+double ms_since(Clock::time_point t) { return std::chrono::duration<double, std::milli>(Clock::now() - t).count(); }
+const bool g_dbg = std::getenv("STRATA_VERIFY_DEBUG") != nullptr;
+#define VDBG(...) do { if (g_dbg) { std::fprintf(stderr, "verify dbg: " __VA_ARGS__); std::fflush(stderr); } } while (0)
+
+struct Bump {
+    uint8_t* base = nullptr;
+    uint64_t used = 0;
+    template <typename T> T* take(uint64_t n) {
+        T* p = base ? (T*) (base + used) : nullptr;
+        used += (n * sizeof(T) + 255) & ~255ull;
+        return p;
+    }
+};
+
+bool mapped(size_t bytes, void **h, void **d) try {
+    /*
+    DPCT1048:1: The original value cudaHostAllocMapped is not meaningful in the
+    migrated code and was removed or replaced with 0. You may need to check the
+    migrated code.
+    */
+    if (DPCT_CHECK_ERROR(*h = (void *)sycl::malloc_host(
+                             bytes, dpct::get_in_order_queue())) !=
+        0) return false;
+    std::memset(*h, 0, bytes);
+    return DPCT_CHECK_ERROR(*d = (void *)*h) == 0;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+strata::kernels::QsaShapes shapes_of(const ModelGeometry& g) {
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head;
+    s.n_head_kv = g.n_head_kv;
+    s.head_dim = g.head_dim;
+    s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    return s;
+}
+
+const WeightRef* need(const LayerView& v, const char* suffix, std::string& err) {
+    const WeightRef* r = v.get(suffix);
+    if (r == nullptr && err.empty()) err = v.name(suffix) + " is missing";
+    return r;
+}
+
+bool native_of(const WeightRef* w, const std::string& name, std::string& err) {
+    if (w == nullptr) return false;
+    if (w->native_data == nullptr) {
+        err = "verify: " + name + " is not served natively (run with --native)";
+        return false;
+    }
+    return true;
+}
+
+}  // namespace
+
+namespace {
+std::atomic<const Verifier*> g_diag_verifier{nullptr};
+void diag_active_verifier(std::FILE* f) {
+    if (const Verifier* v = g_diag_verifier.load()) v->diag(f);
+}
+}  // namespace
+
+void Verifier::diag(std::FILE* f) const {
+    auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
+    std::fprintf(f, "  verify window: %d tokens at position %lld, host at layer step %u; the GPU rang %u; flags: "
+                    "served %u, plan (A) %u, copies (B) %u\n", last_t_, (long long) last_pos0_, cur_layer_ + 1,
+                 rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
+}
+
+Verifier::~Verifier() {
+    const Verifier* self = this;
+    g_diag_verifier.compare_exchange_strong(self, nullptr);
+    if (cs_) cs_->wait();
+    for (auto& e : exec_)
+        if (e) delete (e);
+    if (commit_exec_) delete (commit_exec_);
+    if (cs_) dpct::get_current_device().destroy_queue(cs_);
+    if (copy_) {
+        copy_->wait(); dpct::get_current_device().destroy_queue(copy_);
+    }
+    if (arena_) sycl::free(arena_, dpct::get_in_order_queue());
+    void* hosts[] = {h_tok_, h_step_, h_pos_, h_commit_, h_ple_, h_out_, h_x_, h_ids_, h_w_, h_seq_, h_flag_, h_ymiss_,
+                     h_flagA_, h_plan_, h_flagB_};
+    for (void* h : hosts)
+        if (h) sycl::free(h, dpct::get_in_order_queue());
+}
+
+bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
+                    SessionState &ss, const VerifyHits &hits,
+                    const NativeHead *head, int max_t, std::string &err) try {
+    g_diag_verifier.store(this);
+    diag_verify_fn().store(&diag_active_verifier);
+    device_ = dpct::get_current_device_id(); // a layer split's stage on another
+                                             // GPU: its streams, graphs and
+                                             // buffers live there
+    wt_ = &wt;
+    g_ = &g;
+    ss_ = &ss;
+    hits_ = hits;
+    head_ = head;
+    max_t_ = max_t;
+    sampling_.greedy = true;      // a fresh verifier samples greedily until set_sampling says otherwise
+    sampling_.temperature = 0.0f;
+    if (max_t < 2 || max_t > strata::kernels::kVerifyMaxT || max_t > strata::kernels::cpu::MAXT) {
+        err = "verify: the window must hold 2.." + std::to_string(strata::kernels::kVerifyMaxT) + " tokens";
+        return false;
+    }
+    if (hits.d_res == nullptr || hits.cache_base == nullptr || hits.blob <= 0) {
+        err = "verify: needs the profile-filled VRAM expert tier (--expert-profile and --expert-cache)";
+        return false;
+    }
+    std::string why;
+    if (!layer_verify_compatible(why)) {
+        err = "verify: " + why + " (the verify window reproduces the default native decode path)";
+        return false;
+    }
+    if (!strata::kernels::fused_gr_supported(g.n_embd, g.hc, g.hc_lr) || ss.k != 10 || g.ssm_state_size != 128 ||
+        g.ssm_d_conv != 4) {
+        err = "verify: geometry differs from the artifact's";
+        return false;
+    }
+    if (le_ < 0) le_ = g.n_layers;
+    if (lb_ < 0 || lb_ >= le_ || le_ > g.n_layers || (lb_ > 0 && hand_in_ == nullptr) ||
+        (le_ < g.n_layers && hand_out_ == nullptr)) {
+        err = "verify: the stage's layer range or its hand-off buffers are wrong";
+        return false;
+    }
+    const WeightRef* wo = wt.find("output.weight");
+    if (wo == nullptr) { err = "verify: output.weight is missing"; return false; }
+    n_vocab_ = wo->ne1;
+
+    const strata::kernels::QsaShapes s = shapes_of(g);
+    cap_ = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
+    max_blocks_ = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    attn_scratch_floats_ = (int64_t) strata::kernels::qsa_decode_attn_scratch_floats(cap_, s);
+
+    const uint64_t T = (uint64_t) max_t, N = (uint64_t) g.n_embd, HC = (uint64_t) g.hc, K = (uint64_t) ss.k;
+    const uint64_t C = (uint64_t) g.ssm_conv_channels, ZV = (uint64_t) g.ssm_value_dim, HV = (uint64_t) g.ssm_v_heads;
+    const uint64_t NH = (uint64_t) g.n_head, HD = (uint64_t) g.head_dim, NKV = (uint64_t) g.n_head_kv;
+    const uint64_t IQ = (uint64_t) g.idx_q_heads, ID = (uint64_t) g.idx_key_dim;
+    const uint64_t nG = (uint64_t) g.n_gdn_layers(), nQ = (uint64_t) g.n_qsa_layers();
+    const uint64_t HS = (uint64_t) strata::kernels::NG_HIST * strata::kernels::NG_HC_DIM;
+    const uint64_t TS = (uint64_t) (s.idx_block - 1) * ID;
+    const int max_in = (int) std::max<uint64_t>(std::max<uint64_t>(N, ZV), NH * HD);
+
+    // ---- mapped staging
+    bool ok = mapped(T * 4, (void**) &h_tok_, (void**) &m_tok_) &&
+              mapped(T * strata::kernels::kStepCount * 4, (void**) &h_step_, (void**) &m_step_) &&
+              mapped(T * (NH + NKV + IQ) * 4, (void**) &h_pos_, (void**) &m_pos_) &&
+              mapped((2 + T) * 4 + 16, (void**) &h_commit_, (void**) &m_commit_) &&
+              mapped(T * N * 4, (void**) &h_ple_, (void**) &m_ple_) &&
+              mapped(T * 4 + 16, (void**) &h_out_, (void**) &m_out_) &&
+              mapped(T * N * 4, (void**) &h_x_, (void**) &m_x_) &&
+              mapped(T * K * 4, (void**) &h_ids_, (void**) &m_ids_) &&
+              mapped(T * K * 4, (void**) &h_w_, (void**) &m_w_) &&
+              mapped(64, (void**) &h_seq_, (void**) &m_seq_) &&
+              mapped(64, (void**) &h_flag_, (void**) &m_flag_) &&
+              mapped(64, (void**) &h_flagA_, (void**) &m_flagA_) &&
+              mapped(64, (void**) &h_flagB_, (void**) &m_flagB_) &&
+              mapped(T * K * N * 4, (void**) &h_ymiss_, (void**) &m_ymiss_);
+    if (!ok) { err = "verify: mapped staging allocation failed"; return false; }
+    // the GPU plan: counts(4) | start(cap+1) | dst(cap) | tok(cap) | pad | ptr(cap u64) | ptr2(cap u64) | start2(cap+1)
+    {
+        const int64_t cap = (int64_t) (T * K);
+        const int64_t i32 = 4 + (cap + 1) + cap + cap;
+        const int64_t ptr_off = (i32 + 1) & ~1ll;
+        plan_i32_ = ptr_off + 4 * cap + (cap + 1) + 1;
+        if (!mapped((size_t) plan_i32_ * 4 * 2 + 64, (void**) &h_plan_, (void**) &m_plan_)) {
+            err = "verify: mapped plan allocation failed";
+            return false;
+        }
+        sink_.counts = h_plan_;
+        sink_.start = h_plan_ + 4;
+        sink_.dst = sink_.start + cap + 1;
+        sink_.tok = sink_.dst + cap;
+        sink_.ptr = (unsigned long long*) (h_plan_ + ptr_off);
+        sink_.ptr2 = sink_.ptr + cap;
+        sink_.start2 = h_plan_ + ptr_off + 4 * cap;
+        sink_.cap = cap;
+        sink_.publish = &Verifier::publish_plan;
+        sink_.fetch = &Verifier::fetch_dma;
+        sink_.ctx = this;
+    }
+
+    // ---- the device arena: the same sequence counted, then carved
+    auto carve = [&](Bump& b) {
+        tok_ = b.take<int32_t>(T); step_ = b.take<int32_t>(T * strata::kernels::kStepCount);
+        pos_ = b.take<int32_t>(T * (NH + NKV + IQ)); commit_ = b.take<int32_t>(2 + T);
+        ple_ = b.take<float>(T * N); emb_ = b.take<float>(T * N); R_ = b.take<float>(T * HC * N);
+        mixed_ = b.take<float>(T * N); bo_ = b.take<float>(T * N);
+        inj_ = b.take<float>(T * HC); inj2_ = b.take<float>(T * HC);
+        lo_ = b.take<float>(T * (uint64_t) g.hc_lr); rs_ = b.take<float>(T * HC); xn_ = b.take<float>(T * HC * N);
+        xq_ = b.take<uint8_t>(strata::kernels::native_q8_1_bytes(max_in, (int) T));
+        qkv_L_ = b.take<float>(nG * T * C); h_L_ = b.take<float>(nG * T * C);
+        gate_L_ = b.take<float>(nG * T * HV); beta_L_ = b.take<float>(nG * T * HV);
+        z_ = b.take<float>(T * ZV); y_ = b.take<float>(T * ZV); y_dummy_ = b.take<float>(T * ZV);
+        qfull_ = b.take<float>(T * NH * 2 * HD); qcur_ = b.take<float>(T * NH * HD);
+        kcur_ = b.take<float>(T * NKV * HD); vcur_ = b.take<float>(T * NKV * HD);
+        idx_raw_L_ = b.take<float>(nQ * T * ID); qidx_ = b.take<float>(T * IQ * ID);
+        scores_ = b.take<float>(T * (uint64_t) max_blocks_); sel_ = b.take<int32_t>(T * (uint64_t) cap_);
+        attn_ = b.take<float>(T * NH * HD); attn32_ = b.take<float>(T * NH * HD);
+        attn_scratch_ = b.take<float>(T * (uint64_t) attn_scratch_floats_);
+        tail_snap_ = b.take<float>(nQ * TS);
+        logits_ = b.take<float>(T * (uint64_t) g.n_expert); w_ = b.take<float>(T * K); ids_ = b.take<int32_t>(T * K);
+        shared_ = b.take<float>(T * N); parts_ = b.take<float>(T * K * N); hit_out_ = b.take<float>(T * K * N);
+        hit_slot_ = b.take<int32_t>(T * K); hit_dst_ = b.take<int32_t>(T * K); hit_count_ = b.take<int32_t>(4);
+        plan_ = b.take<int32_t>(2 * ((uint64_t) plan_i32_ + 16));
+        staging_ = b.take<uint8_t>((uint64_t) kStagingBlobs * strata::kernels::cpu::expert_layout().max_blob);
+        hit_xq_ = b.take<uint8_t>(T * (N / 32) * 34); hit_xs_ = b.take<float>(T * (N / 32));
+        nat_xq_ = b.take<uint8_t>(T * (N / 32) * 36);
+        hit_scratch_ = b.take<uint8_t>(std::max<uint64_t>(
+            strata::kernels::moe_hit_grouped_scratch_bytes((int64_t) (T * K), g.n_embd, g.n_ff),
+            strata::kernels::native_expert_scratch_bytes((int64_t) (T * K), g.n_ff)));
+        head_mixed_ = b.take<float>(T * N); head_inj_ = b.take<float>(HC);
+        sh_bf16_ = b.take<uint16_t>(T * N); sh_gate_ = b.take<float>(T * (uint64_t) g.n_ff);
+        sh_up_ = b.take<float>(T * (uint64_t) g.n_ff); sh_g_ = b.take<float>(T + 4);
+        head_logits_ = b.take<float>(T * (uint64_t) n_vocab_);
+        hist_snap_ = b.take<float>(T * HS);
+    };
+    Bump count;
+    carve(count);
+    if (DPCT_CHECK_ERROR(arena_ = (void *)sycl::malloc_device(
+                             count.used, dpct::get_in_order_queue())) != 0) {
+        err = "verify: the device arena (" + std::to_string(count.used >> 20) + " MiB) does not fit";
+        return false;
+    }
+    dpct::get_in_order_queue().memset(arena_, 0, count.used).wait();
+    prof_on_ = std::getenv("STRATA_VERIFY_PROFILE") != nullptr;
+    if (prof_on_) {
+        const size_t np = (size_t) g.n_layers * kProfPer + 4;
+        /*
+        DPCT1026:36: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        if (DPCT_CHECK_ERROR(prof_ = (unsigned long long *)sycl::malloc_device(
+                                 np * 8, dpct::get_in_order_queue())) != 0) {
+            prof_on_ = false; prof_ = nullptr;
+        } else {
+            dpct::get_in_order_queue().memset(prof_, 0, np * 8).wait();
+            prof_h_.assign(np, 0);
+        }
+    }
+    Bump real;
+    real.base = (uint8_t*) arena_;
+    carve(real);
+    sink_.staging = (unsigned long long) staging_;
+    sink_.staging_cap = kStagingBlobs;
+    (void) TS;
+    /*
+    DPCT1025:37: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    if (DPCT_CHECK_ERROR(
+            copy_ = dpct::get_current_device().create_queue(true)) != 0) {
+        err = "verify: copy stream create failed";
+        return false;
+    }
+    /*
+    DPCT1025:38: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    if (DPCT_CHECK_ERROR(cs_ = dpct::get_current_device().create_queue(true)) !=
+        0) {
+        err = "verify: stream create failed";
+        return false;
+    }
+    // E-6: a layer whose routed experts are all resident is planned on the device (STRATA_VERIFY_DEVICE_PLAN=1: on;
+    // exact, but neutral on RIBPC 1-2 GPUs: off by default)
+    {
+        const char* v = std::getenv("STRATA_VERIFY_DEVICE_PLAN");
+        device_plan_ = v != nullptr && std::atoi(v) != 0;
+    }
+    if (device_plan_) {
+        bool ok2 =
+            DPCT_CHECK_ERROR(skip_ = (uint32_t *)sycl::malloc_device(
+                                 64, dpct::get_in_order_queue())) == 0 &&
+            DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue().memset(skip_, 0, 64).wait()) == 0;
+        if (ok2 && hits.slot_off != nullptr && hits.n_slots > 0) {
+            ok2 = DPCT_CHECK_ERROR(
+                      slot_off_d_ = sycl::malloc_device<unsigned long long>(
+                          (size_t)hits.n_slots, dpct::get_in_order_queue())) ==
+                      0 &&
+                  DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(slot_off_d_, hits.slot_off,
+                                               (size_t)hits.n_slots *
+                                                   sizeof(unsigned long long))
+                                       .wait()) == 0;
+        }
+        /*
+        DPCT1026:39: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        if (!ok2) {; device_plan_ = false; }
+    }
+    std::fprintf(stderr, "strata verify: window up to %d tokens, %.1f MiB of device buffers\n", max_t,
+                 (double) count.used / 1048576.0);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+const float* Verifier::final_R(int t) const { return R_ + (size_t) t * (size_t) (g_->hc * g_->n_embd); }
+
+// ================================ THE WINDOW, AS CAPTURED ================================
+//
+// Plan v0.3 P6 (split window): with `groups_ == 2` the window's tokens are cut into two groups A = [0, T/2 up) and
+// B = the rest, and the stream is ordered
+//
+//     pre(0,A) pre(0,B) | post(0,A) pre(1,A) | post(0,B) pre(1,B) | post(1,A) pre(2,A) | ...
+//
+// so the CPU computes A's experts of layer l while the GPU runs B's mixer and router of layer l, and B's experts
+// while the GPU combines A and runs A's layer l+1.  B's mixer only needs A's mixer of the same layer (K/V, GDN
+// state), never A's experts, so nothing waits that did not wait before.  Every token's arithmetic is unchanged.
+bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
+    using namespace strata::kernels;
+    const ModelGeometry& g = *g_;
+    const WeightTable& wt = *wt_;
+    SessionState& ss = *ss_;
+    const int64_t N = g.n_embd, HC = g.hc, K = ss.k, C = g.ssm_conv_channels, ZV = g.ssm_value_dim;
+    const int64_t HV = g.ssm_v_heads, HK = g.ssm_k_heads, NH = g.n_head, HD = g.head_dim, NKV = g.n_head_kv;
+    const int64_t IQ = g.idx_q_heads, ID = g.idx_key_dim, NE = g.n_expert, MT = max_t_;
+    const QsaShapes s = shapes_of(g);
+    const GrShapes gs{g.n_embd, g.hc, g.hc_lr};
+    const uint64_t gdn_floats = (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
+                                (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
+    const int64_t HS = (int64_t) NG_HIST * NG_HC_DIM;
+    const int64_t TS = (s.idx_block - 1) * ID;
+    const bool ple_on = ss.ple.ready() && ple_stage();
+    auto Rt = [&](int t) { return R_ + (size_t) t * HC * N; };
+    const int G = (split_ && T >= 2) ? 2 : 1;
+    static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
+    auto stamp = [&](int64_t l, int i, int grp) { if (prof_on_ && grp == 0) gpu_stamp(prof_, (int) (l * kProfPer + i), cs); };
+    const int tb_[2] = {0, (T + 1) / 2}, te_[2] = {G == 2 ? (T + 1) / 2 : T, T};
+    groups_[T] = G;
+
+    // ---- the window's inputs, from mapped staging
+    copy_i32_from_mapped(tok_, m_tok_, T, cs);
+    copy_i32_from_mapped(step_, m_step_, (int64_t) T * kStepCount, cs);
+    copy_i32_from_mapped(pos_, m_pos_, (int64_t) MT * (NH + NKV + IQ), cs);
+    // per-ROW positions of the K rows [t][NKV] and the indexer query rows [t][IQ] (for batched RoPE)
+    const int32_t* pos_k = pos_ + MT * NH;
+    const int32_t* pos_i = pos_ + MT * (NH + NKV);
+    if (ple_on) copy_from_mapped(ple_, m_ple_, (int64_t) T * N, cs);
+
+    // ---- the embeddings, broadcast to the hc streams - or, in a later stage of a layer split, the previous stage's
+    // residual, pending write and inject (see set_stage)
+    const int64_t HB = Verifier::handoff_floats(g);
+    if (lb_ > 0) {
+        for (int t = 0; t < T; ++t) {
+            copy_from_mapped(Rt(t), hand_in_ + (size_t) t * HB, HC * N, cs);
+            copy_from_mapped(bo_ + (size_t) t * N, hand_in_ + (size_t) t * HB + HC * N, N, cs);
+            copy_from_mapped(inj2_ + (size_t) t * HC, hand_in_ + (size_t) t * HB + HC * N + N, HC, cs);
+        }
+    } else if (const NativeEmbed* ne = native_embed()) {       // plan v0.3 P6: the GGUF-form table
+        ne->gather_dev(tok_, T, emb_, cs);
+        broadcast_streams(emb_, R_, N, (int) HC, T, cs);
+    } else {
+        const WeightRef* w = wt.find("token_embd.weight");
+        if (w == nullptr || w->codebook_iq4nl || (w->code_bits != 2 && w->code_bits != 4 && w->code_bits != 8)) {
+            err = "verify: token_embd.weight is missing or not an S2/S4/S8 tensor";
+            return false;
+        }
+        const auto* codes = (const uint8_t*) w->data;
+        const auto* scales = (const float*) (codes + w->codes_bytes);
+        const auto* offsets = w->has_offset ? (const float*) (codes + w->codes_bytes + w->scales_bytes) : nullptr;
+        const uint64_t row_codes = (uint64_t) (w->ne0 / (8 / w->code_bits));
+        const uint64_t row_groups = (uint64_t) (w->ne0 / w->group_elems);
+        embedding_gather_dev(codes, scales, offsets, tok_, T, w->ne0, w->code_bits, w->code_bias, w->group_elems,
+                             row_codes, row_groups, emb_, cs);
+        broadcast_streams(emb_, R_, N, (int) HC, T, cs);
+    }
+
+    // per-layer state indices (GDN and QSA layers are numbered separately)
+    std::vector<int64_t> gdn_idx((size_t) g.n_layers, -1), qsa_idx((size_t) g.n_layers, -1);
+    {
+        int64_t qi = 0, gi = 0;
+        for (int64_t l = 0; l < g.n_layers; ++l) {
+            if (is_qsa_layer(g, l)) qsa_idx[(size_t) l] = qi++;
+            else gdn_idx[(size_t) l] = gi++;
+        }
+    }
+
+    // ---------------------------------------------------------------- pre(l, group): up to the ring
+    auto pre = [&](int64_t l, int grp) -> bool {
+        const int tb = tb_[grp], te = te_[grp], n = te - tb;
+        stamp(l, 0, grp);
+        const LayerView v(wt, l);
+        const char* pfx[2] = {"hc_attn_", "hc_ffn_"};
+        const WeightRef *wn[2], *wd[2], *wu[2], *wi[2];
+        for (int h = 0; h < 2; ++h) {
+            wn[h] = need(v, (std::string(pfx[h]) + "norm.weight").c_str(), err);
+            wd[h] = need(v, (std::string(pfx[h]) + "down.weight").c_str(), err);
+            wu[h] = need(v, (std::string(pfx[h]) + "up.weight").c_str(), err);
+            wi[h] = need(v, (std::string(pfx[h]) + "inject.weight").c_str(), err);
+            if (!wn[h] || !wd[h] || !wu[h] || !wi[h]) return false;
+        }
+        // the previous layer's FFN write, folded into this layer's first read (a control vector after it has
+        // already applied it)
+        bool pending = l > 0 && !cvec().covers(l - 1);
+        if (l == 1 && ple_on) {
+            float* normalized = (float*) ((uint8_t*) ss.ple.scratch + ple_block_scratch_bytes());
+            for (int t = tb; t < te; ++t) {
+                gr_write(Rt(t), bo_ + t * N, inj2_ + t * HC, gs, Rt(t), cs);
+                PleOut po;
+                po.normalized = normalized;
+                po.result = Rt(t);
+                try {
+                    ple_block(ple_ + t * N, Rt(t), ss.ple.hist, ss.ple.w, po, ss.ple.scratch, cs);
+                    ple_history_advance(ss.ple.hist, normalized, cs);
+                } catch (const std::exception& e) {
+                    err = std::string("verify PLE: ") + e.what();
+                    return false;
+                }
+                copy_from_mapped(hist_snap_ + (size_t) t * HS, ss.ple.hist, HS, cs);
+            }
+            pending = false;
+        }
+        auto gr_read_group = [&](int half, bool apply, float* inj_prev, float* inj_out) {
+            FusedGrArgs fa[kFusedGrMaxT];
+            for (int t = tb; t < te; ++t) {
+                FusedGrArgs& a = fa[t - tb];
+                a.R = Rt(t); a.R_out = Rt(t); a.apply = apply;
+                a.bo_prev = bo_ + t * N; a.inj_prev = inj_prev + t * HC;
+                a.w_norm = (const float*) wn[half]->data; a.w_down = (const uint16_t*) wd[half]->data;
+                a.w_up = (const uint16_t*) wu[half]->data; a.w_inject = (const uint16_t*) wi[half]->data;
+                a.eps = EPS; a.lo = lo_ + t * g.hc_lr; a.rs = rs_ + t * HC;
+                a.inject_out = inj_out + t * HC; a.mixed = mixed_ + t * N;
+            }
+            fused_gr_read_multi(fa, n, xn_ + (size_t) tb * HC * N, cs, (prof_on_ && grp == 0) ? prof_ : nullptr,
+                                (int) (l * kProfPer + (half == 0 ? 27 : 30)));
+        };
+        gr_read_group(0, pending, inj2_, inj_);
+        stamp(l, 1, grp);
+        float* xm = mixed_ + tb * N;
+        try {
+            if (!is_qsa_layer(g, l)) {
+                // ======================= GDN =======================
+                const WeightRef *wqkv = need(v, "attn_qkv.weight", err), *wg = need(v, "attn_gate.weight", err),
+                                *wout = need(v, "ssm_out.weight", err), *wa = need(v, "ssm_alpha.weight", err),
+                                *wb = need(v, "ssm_beta.weight", err), *wc = need(v, "ssm_conv1d.weight", err),
+                                *wnm = need(v, "ssm_norm.weight", err), *wdt = need(v, "ssm_dt.bias", err),
+                                *wsa = need(v, "ssm_a", err);
+                if (!wqkv || !wg || !wout || !wa || !wb || !wc || !wnm || !wdt || !wsa) return false;
+                if (!native_of(wqkv, v.name("attn_qkv.weight"), err) || !native_of(wg, v.name("attn_gate.weight"), err) ||
+                    !native_of(wout, v.name("ssm_out.weight"), err))
+                    return false;
+                const int64_t gi = gdn_idx[(size_t) l];
+                float* state = ss.gdn_state + (size_t) gi * gdn_floats;
+                float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+                float* qkv = qkv_L_ + (size_t) gi * MT * C;
+                float* hb = h_L_ + (size_t) gi * MT * C;
+                float* gate = gate_L_ + (size_t) gi * MT * HV;
+                float* beta = beta_L_ + (size_t) gi * MT * HV;
+                native_quantize_q8_1(xm, xq_, (int) N, n, cs);
+                native_mmvq(wqkv->native_type, wqkv->native_data, xq_, qkv + (size_t) tb * C, (int) N, (int) C, n, cs);
+                stamp(l, 2, grp);
+                gdn_conv_l2_multi(conv, qkv, (const float*) wc->data, hb, (int) C, (int) (2 * HK), EPS, n, cs, tb);
+                stamp(l, 3, grp);
+                gdn_ab_multi(xm, (const uint16_t*) wa->data, (const uint16_t*) wb->data, (const float*) wdt->data,
+                             (const float*) wsa->data, gate + (size_t) tb * HV, beta + (size_t) tb * HV, (int) N, (int) HV,
+                             n, cs);
+                stamp(l, 4, grp);
+                native_mmvq(wg->native_type, wg->native_data, xq_, z_ + (size_t) tb * ZV, (int) N, (int) ZV, n, cs);
+                stamp(l, 5, grp);
+                // the recurrence from the untouched state over tokens [0, te); outputs only for this group's
+                gdn_step_norm_multi(state, hb, (int) C, gate, beta, z_, (const float*) wnm->data, EPS, y_, (int) HK,
+                                    (int) HV, te, nullptr, cs, tb);
+                stamp(l, 6, grp);
+                native_quantize_q8_1(y_ + (size_t) tb * ZV, xq_, (int) ZV, n, cs);
+                native_mmvq(wout->native_type, wout->native_data, xq_, bo_ + tb * N, (int) ZV, (int) N, n, cs);
+            } else {
+                // ======================= QSA =======================
+                const int64_t qi = qsa_idx[(size_t) l];
+                const QsaState& st = ss.qsa_states[qi];
+                const WeightRef *wik = need(v, "indexer.k_proj.weight", err), *wq = need(v, "attn_q.weight", err),
+                                *wk = need(v, "attn_k.weight", err), *wv = need(v, "attn_v.weight", err),
+                                *wo = need(v, "attn_output.weight", err), *wiq = need(v, "indexer.q_proj.weight", err),
+                                *wqn = need(v, "attn_q_norm.weight", err), *wkn = need(v, "attn_k_norm.weight", err),
+                                *wiqn = need(v, "indexer.q_norm.weight", err), *wikn = need(v, "indexer.k_norm.weight", err);
+                if (!wik || !wq || !wk || !wv || !wo || !wiq || !wqn || !wkn || !wiqn || !wikn) return false;
+                if (!native_of(wq, v.name("attn_q.weight"), err) || !native_of(wk, v.name("attn_k.weight"), err) ||
+                    !native_of(wv, v.name("attn_v.weight"), err) || !native_of(wo, v.name("attn_output.weight"), err))
+                    return false;
+                auto norm_rope = [&](float* data, const WeightRef* norm, int rows, int cols, const int32_t* pos) {
+                    if (native_qsa_enabled()) native_qsa_rms_norm_weighted(data, (const float*) norm->data, data, cols, rows, EPS, cs);
+                    else rms_norm_weighted(data, (const float*) norm->data, rows, cols, EPS, cs);
+                    if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), pos, cs);
+                    else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st.cos_tab, st.sin_tab, pos, cs);
+                };
+                float* idx_raw = idx_raw_L_ + (size_t) qi * MT * ID;
+                // the per-token GEMVs / norms / RoPEs / copies of this layer as one launch over the
+                // window's rows each - row-wise identical arithmetic (STRATA_DEC_BATCH=0: token by token)
+                const bool qb = dec_batch && n > 1 && native_qsa_enabled() && native_rope_enabled() && !st.kv_q4;
+                native_quantize_q8_1(xm, xq_, (int) N, n, cs);
+                if (qb) bf16_gemv_fp32_mmvf_multi(mixed_ + tb * N, N, (const uint16_t*) wik->data, idx_raw + tb * ID, ID, N, ID, n, cs);
+                else for (int t = tb; t < te; ++t)
+                    bf16_gemv_fp32_mmvf(mixed_ + t * N, (const uint16_t*) wik->data, idx_raw + t * ID, (int) N, (int) ID, cs);
+                stamp(l, 7, grp);
+                native_mmvq(wk->native_type, wk->native_data, xq_, kcur_ + tb * NKV * HD, (int) N, (int) (NKV * HD), n, cs);
+                native_mmvq(wv->native_type, wv->native_data, xq_, vcur_ + tb * NKV * HD, (int) N, (int) (NKV * HD), n, cs);
+                if (qb) norm_rope(kcur_ + tb * NKV * HD, wkn, (int) (n * NKV), (int) HD, pos_k + tb * NKV);
+                else for (int t = tb; t < te; ++t) norm_rope(kcur_ + t * NKV * HD, wkn, (int) NKV, (int) HD, pos_ + t * NH);
+                if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): K and V rotated before they are stored
+                    fwht256_inplace_cuda(kcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
+                    fwht256_inplace_cuda(vcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
+                }
+                stamp(l, 8, grp);
+                if (grp == 0) copy_from_mapped(tail_snap_ + (size_t) qi * TS, st.idx_tail, TS, cs);
+                for (int t = tb; t < te; ++t) {
+                    const int32_t* step_t = step_ + t * kStepCount;
+                    if (st.kv_q4)
+                        kv_append_q4_step(st.k_q4, st.v_q4, st.page_table, step_t, kcur_ + t * NKV * HD,
+                                          vcur_ + t * NKV * HD, s, cs, &st.host);
+                    else if (st.kv_int8)
+                        kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, step_t,
+                                          kcur_ + t * NKV * HD, vcur_ + t * NKV * HD, s, cs, &st.host);
+                    else
+                        kv_append_step(st.k_pool, st.v_pool, st.page_table, step_t, kcur_ + t * NKV * HD,
+                                       vcur_ + t * NKV * HD, s, cs, &st.host);
+                }
+                const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
+                for (int t = tb; t < te; ++t)
+                    native_qsa_indexer_append(idx_raw + t * ID, step_ + t * kStepCount + kStepPos, 0,
+                                              (const float*) wikn->data, EPS, ib, s, st.max_cells,
+                                              (float) qsa_freq_base(), cs);
+                stamp(l, 9, grp);
+                native_mmvq(wq->native_type, wq->native_data, xq_, qfull_ + tb * NH * 2 * HD, (int) N, (int) (NH * 2 * HD),
+                            n, cs);
+                if (qb) {
+                    /*
+                    DPCT1124:40: cudaMemcpy2DAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    if (DPCT_CHECK_ERROR(dpct::async_dpct_memcpy(
+                            qcur_ + tb * NH * HD, (size_t)HD * 4,
+                            qfull_ + tb * NH * 2 * HD, (size_t)HD * 2 * 4,
+                            (size_t)HD * 4, (size_t)(n * NH),
+                            dpct::device_to_device, *cs)) != 0) {
+                        err = "verify: the q/gate split failed";
+                        return false;
+                    }
+                    norm_rope(qcur_ + tb * NH * HD, wqn, (int) (n * NH), (int) HD, pos_ + tb * NH);
+                    bf16_gemv_fp32_mmvf_multi(mixed_ + tb * N, N, (const uint16_t*) wiq->data, qidx_ + tb * IQ * ID, IQ * ID,
+                                              N, IQ * ID, n, cs);
+                    norm_rope(qidx_ + tb * IQ * ID, wiqn, (int) (n * IQ), (int) ID, pos_i + tb * IQ);
+                } else {
+                for (int t = tb; t < te; ++t) {
+                    float* qc = qcur_ + t * NH * HD;
+                    /*
+                    DPCT1124:41: cudaMemcpy2DAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    if (DPCT_CHECK_ERROR(dpct::async_dpct_memcpy(
+                            qc, (size_t)HD * 4, qfull_ + t * NH * 2 * HD,
+                            (size_t)HD * 2 * 4, (size_t)HD * 4, (size_t)NH,
+                            dpct::device_to_device, *cs)) != 0) {
+                        err = "verify: the q/gate split failed";
+                        return false;
+                    }
+                    norm_rope(qc, wqn, (int) NH, (int) HD, pos_ + t * NH);
+                    if (st.kv_q4) fwht256_inplace_cuda(qc, NH, cs);   // <Hq, Hk> = <q, k>
+                }
+                for (int t = tb; t < te; ++t) {
+                    float* qx = qidx_ + t * IQ * ID;
+                    bf16_gemv_fp32_mmvf(mixed_ + t * N, (const uint16_t*) wiq->data, qx, (int) N, (int) (IQ * ID), cs);
+                    norm_rope(qx, wiqn, (int) IQ, (int) ID, pos_ + t * NH);
+                }
+                }
+                stamp(l, 10, grp);
+                qsa_block_scores(st.idx_pooled, st.idx_dead, qidx_ + tb * IQ * ID, step_ + tb * kStepCount, n, max_blocks_,
+                                 s, scores_ + (size_t) tb * max_blocks_, cs);
+                qsa_block_topk(scores_ + (size_t) tb * max_blocks_, step_ + tb * kStepCount, n, max_blocks_, cap_, s,
+                               sel_ + (size_t) tb * cap_, cs);
+                stamp(l, 11, grp);
+                // KV streaming: the n selections' blocks resident (device-side, inside the graph)
+                qsa_kv_resolve(st, *g_, sel_ + (size_t) tb * cap_, step_ + tb * kStepCount, n, cap_, cs);
+                stamp(l, 12, grp);
+                const QsaAttnPools pools = qsa_attn_pools(st);
+                qsa_decode_attn_batch(qcur_ + tb * NH * HD, pools, sel_ + (size_t) tb * cap_, step_ + tb * kStepCount, cap_,
+                                      s, attn_scratch_ + (size_t) tb * attn_scratch_floats_, attn_ + tb * NH * HD, n, cs);
+                stamp(l, 13, grp);
+                if (st.kv_q4) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
+                if (qb) native_qsa_gate_apply(attn_ + tb * NH * HD, qfull_ + tb * NH * 2 * HD, attn32_ + tb * NH * HD,
+                                              (int) (n * NH), (int) HD, cs);
+                else
+                for (int t = tb; t < te; ++t) {
+                    if (native_qsa_enabled())
+                        native_qsa_gate_apply(attn_ + t * NH * HD, qfull_ + t * NH * 2 * HD, attn32_ + t * NH * HD,
+                                              (int) NH, (int) HD, cs);
+                    else
+                        qsa_gate_apply_f32(attn_ + t * NH * HD, qfull_ + t * NH * 2 * HD, s, attn32_ + t * NH * HD, cs);
+                }
+                stamp(l, 14, grp);
+                native_quantize_q8_1(attn32_ + tb * NH * HD, xq_, (int) (NH * HD), n, cs);
+                native_mmvq(wo->native_type, wo->native_data, xq_, bo_ + tb * N, (int) (NH * HD), (int) N, n, cs);
+            }
+        } catch (const std::exception& e) {
+            err = "verify layer " + std::to_string(l) + ": " + e.what();
+            return false;
+        }
+        stamp(l, 16, grp);
+        gr_read_group(1, true, inj_, inj2_);
+        // the window's rows routed in 2 launches (one router GEMV reading the weight once, one
+        // top-10) instead of 2 per token; every row's arithmetic is the single-token call's (STRATA_DEC_BATCH=0: old)
+        const WeightRef* w_router = v.get("ffn_gate_inp.weight");
+        if (dec_batch && n > 1 && w_router != nullptr && native_router_enabled() && NE == 512 && K == 10) {
+            try {
+                bf16_gemv_fp32_mmvf_multi(mixed_ + tb * N, N, (const uint16_t*) w_router->data, logits_ + tb * NE, NE, N,
+                                          NE, n, cs);
+                native_router_top10_multi(logits_ + tb * NE, ids_ + tb * K, w_ + tb * K, n, cs);
+            } catch (const std::exception& e) { err = "verify router: " + std::string(e.what()); return false; }
+        } else
+        for (int t = tb; t < te; ++t) {
+            MoEBuffers mb = ss.moe;
+            mb.logits = logits_ + t * NE; mb.ids = ids_ + t * K; mb.weights = w_ + t * K;
+            if (!moe_route(wt, g, l, K, mb, mixed_ + t * N, cs, err, nullptr)) return false;
+        }
+        if (device_plan_)   // E-6: every routed expert resident: this group's plan without the host
+            resident_plan(ids_ + tb * K, n * (int) K, (int) K, hits_.d_res + l * g.n_expert, (int) g.n_expert,
+                          hits_.cache_base, slot_off_d_, (long long) hits_.blob,
+                          plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, skip_ + grp,
+                          (uint32_t) ((l - lb_) * G + grp + 1), cs);
+        doorbell_publish(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
+                         m_ids_ + tb * K, m_w_ + tb * K, m_seq_, cs);
+        stamp(l, 17, grp);
+        {
+            const WeightRef *wgi = need(v, "ffn_gate_inp_shexp.weight", err), *wsg = need(v, "ffn_gate_shexp.weight", err),
+                            *wsu = need(v, "ffn_up_shexp.weight", err), *wsd = need(v, "ffn_down_shexp.weight", err);
+            if (!wgi || !wsg || !wsu || !wsd) return false;
+            if (!native_of(wsg, v.name("ffn_gate_shexp.weight"), err) || !native_of(wsu, v.name("ffn_up_shexp.weight"), err) ||
+                !native_of(wsd, v.name("ffn_down_shexp.weight"), err))
+                return false;
+            NativeSharedWeights nsw;
+            nsw.gate_type = wsg->native_type; nsw.gate_data = wsg->native_data;
+            nsw.up_type = wsu->native_type; nsw.up_data = wsu->native_data;
+            nsw.down_type = wsd->native_type; nsw.down_data = wsd->native_data;
+            nsw.q8_1 = xq_;
+            if (dec_batch) f32_to_bf16_bulk(mixed_ + tb * N, sh_bf16_ + tb * N, (int64_t) n * N, cs);   // contiguous rows
+            else for (int t = tb; t < te; ++t) f32_to_bf16_bulk(mixed_ + t * N, sh_bf16_ + t * N, N, cs);
+            try {
+                shared_expert_multi(n, xm, sh_bf16_ + tb * N, nsw, (const uint16_t*) wgi->data, sh_gate_ + (size_t) tb * g.n_ff,
+                                    sh_up_ + (size_t) tb * g.n_ff, sh_g_ + tb, shared_ + tb * N, N, g.n_ff, cs);
+            } catch (const std::exception& e) {
+                err = std::string("verify shared expert: ") + e.what();
+                return false;
+            }
+        }
+        if (strata::kernels::cpu::expert_layout().native)
+            quantize_q8_1_rows(xm, n, N, nat_xq_ + (size_t) tb * (N / 32) * 36, cs);
+        else
+            quantize_q8_0_scaled(xm, hit_xq_ + (size_t) tb * (N / 32) * 34, hit_xs_ + (size_t) tb * (N / 32), (int64_t) n * N, cs);
+        stamp(l, 18, grp);
+        return true;
+    };
+
+    // ---------------------------------------------------------------- post(l, group): experts, combine
+    auto post = [&](int64_t l, int grp) -> bool {
+        const int tb = tb_[grp], te = te_[grp], n = te - tb;
+        const uint32_t ring = (uint32_t) ((l - lb_) * G + grp + 1);
+        const int64_t cap = (int64_t) n * K, capx = (int64_t) max_t_ * K;
+        int32_t* pl = plan_ + (size_t) grp * (size_t) (plan_i32_ + 16);
+        if (device_plan_) {   // E-6: skipped when the device planned this group (all its experts resident)
+            wait_flag_ge_or(m_flagA_, ring, skip_ + grp, cs);
+            copy_i32_from_mapped_unless(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, skip_ + grp, ring, cs);
+        } else {
+            wait_flag_ge(m_flagA_, ring, cs);                  // the pool published this group's GPU plan
+            copy_i32_from_mapped(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, cs);
+        }
+        stamp(l, 19, grp);
+        const int32_t* p_counts = pl;
+        const int32_t* p_start = pl + 4;
+        const int32_t* p_dst = p_start + capx + 1;
+        const int32_t* p_tok = p_dst + capx;
+        const int64_t ptr_off = ((4 + (capx + 1) + 2 * capx) + 1) & ~1ll;
+        const unsigned long long* p_ptr = (const unsigned long long*) (pl + ptr_off);
+        const unsigned long long* p_ptr2 = p_ptr + capx;
+        const int32_t* p_start2 = pl + ptr_off + 4 * capx;
+        float* hit_out = hit_out_ + (size_t) tb * K * N;
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        // plan v0.3 P6: the VRAM groups now; the PCIe groups once the copy engine has landed them in staging
+        auto grouped = [&](const unsigned long long* gp, const int32_t* gs, const int32_t* gn) {
+            if (lay.native) {
+                // the layer's GGUF formats (i-quant gate/up, Q2_0 / IQ4_NL down)
+                const auto& f = lay.fmt[(size_t) l];
+                const NativeExpertLayout L = native_expert_layout(f.gu_type, f.d_type, f.n_embd, f.n_ff);
+                native_expert_grouped(L, gp, gs, gn, p_dst, p_tok, cap, cap,
+                                      nat_xq_ + (size_t) tb * (N / 32) * 36, hit_scratch_, hit_out, cs);
+            } else {
+                moe_grouped_s2(gp, gs, gn, p_dst, p_tok, cap, cap, hit_xq_ + (size_t) tb * (N / 32) * 34,
+                               hit_xs_ + (size_t) tb * (N / 32), hit_scratch_, hit_out, cs);
+            }
+        };
+        grouped(p_ptr, p_start, p_counts);
+        stamp(l, 20, grp);
+        if (device_plan_) wait_flag_ge_or(m_flagB_, ring, skip_ + grp, cs);
+        else wait_flag_ge(m_flagB_, ring, cs);                 // the PCIe share is in staging (DMA) or mapped
+        if (sink_.pcie_mode == 2) {                            // stage it with a copy kernel, then point at staging
+            const int64_t per = G == 2 ? kStagingBlobs / 2 : kStagingBlobs;
+            uint8_t* stage = staging_ + (size_t) (grp * per) * lay.max_blob;
+            fetch_blobs(p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), (int) per, cs);
+            rebase_ptrs((unsigned long long*) p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), cs);
+        }
+        stamp(l, 21, grp);
+        grouped(p_ptr2, p_start2, p_counts + 2);
+        stamp(l, 22, grp);
+        if (device_plan_) {   // no CPU share when the device planned the group: its rows are zeros
+            wait_flag_ge_or(m_flag_, ring, skip_ + grp, cs);
+            copy_or_zero_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (long long) n * K * N,
+                                     skip_ + grp, ring, cs);
+        } else {
+            wait_flag_ge(m_flag_, ring, cs);               // the CPU's share is in the mapped rows
+            stamp(l, 23, grp);
+            if (dec_batch)   // only the CPU rows cross PCIe (p_dst[0, counts[1]) = the GPU's own rows)
+                copy_rows_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K, N,
+                                      p_dst, p_counts + 1, cs);
+            else
+                copy_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K * N, cs);
+        }
+        moe_hit_add(parts_ + (size_t) tb * K * N, hit_out, p_dst, p_counts + 1, cap, N, cs);
+        if (dec_batch && n > 1 && native_moe_combine_enabled()) {   // one launch for the window's rows
+            try {
+                native_moe_combine_multi(parts_ + (size_t) tb * K * N, w_ + tb * K, shared_ + tb * N, bo_ + tb * N, N, K, n, cs);
+            } catch (const std::exception& e) { err = "verify combine: " + std::string(e.what()); return false; }
+        } else
+        for (int t = tb; t < te; ++t) {
+            MoEBuffers mb = ss.moe;
+            mb.weights = w_ + t * K; mb.shared = shared_ + t * N;
+            if (!moe_combine_parts(g, l, K, mb, parts_ + (size_t) t * K * N, bo_ + t * N, cs, err)) return false;
+        }
+        stamp(l, 24, grp);
+        if (l == g.n_layers - 1) {
+            for (int t = tb; t < te; ++t) gr_write(Rt(t), bo_ + t * N, inj2_ + t * HC, gs, Rt(t), cs);
+            if (cvec().covers(l)) cvec_apply(Rt(tb), l, n, HC * N, nullptr, 0, nullptr, 0, false, cs);
+        } else if (cvec().covers(l)) {
+            cvec_apply(Rt(tb), l, n, HC * N, bo_ + tb * N, N, inj2_ + tb * HC, HC, true, cs);
+        }
+        return true;
+    };
+
+    for (int grp = 0; grp < G; ++grp)
+        if (!pre(lb_, grp)) return false;
+    for (int64_t l = lb_; l < le_; ++l)
+        for (int grp = 0; grp < G; ++grp) {
+            if (!post(l, grp)) return false;
+            if (l + 1 < le_ && !pre(l + 1, grp)) return false;
+        }
+    if (le_ < g.n_layers) {   // a layer split's earlier stage: hand the residual on, no head
+        for (int t = 0; t < T; ++t) {
+            copy_from_mapped(hand_out_ + (size_t) t * HB, Rt(t), HC * N, cs);
+            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N, bo_ + (size_t) t * N, N, cs);
+            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N + N, inj2_ + (size_t) t * HC, HC, cs);
+        }
+        return true;
+    }
+
+    // ---- the head, T columns, and the argmax of each
+    stamp(g.n_layers, 0, 0);
+    {
+        const WeightRef *hn = wt.find("output_hc_norm.weight"), *hd = wt.find("output_hc_down.weight"),
+                        *hu = wt.find("output_hc_up.weight");
+        if (!hn || !hd || !hu) { err = "verify: an output_hc_* weight is missing"; return false; }
+        for (int t = 0; t < T; ++t) {
+            BlockBuffers bb = ss.block;
+            bb.R = Rt(t);
+            bb.mixed = head_mixed_ + t * N;
+            if (head_ != nullptr && head_->loaded()) {
+                if (!lm_head_mix(wt, g, bb, cs, err)) return false;
+            } else if (!lm_head(wt, g, bb, head_logits_ + (size_t) t * n_vocab_, cs, err)) {
+                return false;
+            }
+        }
+        if (head_ != nullptr && head_->loaded()) {
+            try {
+                native_quantize_q8_1(head_mixed_, xq_, (int) N, T, cs);
+                native_mmvq(head_->type(), head_->weights(), xq_, head_logits_, (int) N, (int) n_vocab_, T, cs);
+            } catch (const std::exception& e) {
+                err = std::string("verify head: ") + e.what();
+                return false;
+            }
+        }
+        // Greedy, the default, is recorded here as before (no extra launch or sync per window). A request that
+        // samples or penalizes is sampled again host-side after the replay (run()) with its own parameters and a
+        // fresh draw counter: a captured sampler would bake them in and replay the same draws forever.
+        SamplerParams sp;
+        sp.greedy = true;
+        sp.temperature = 0.0f;
+        sample_tokens(head_logits_, T, (int) n_vocab_, nullptr, 0, sp, m_out_, cs);
+    }
+    stamp(g.n_layers, 1, 0);
+    return true;
+}
+
+std::string Verifier::profile_report() {
+    if (!prof_on_ || prof_windows_ == 0) return std::string();
+    static const char* names[kProfPer] = {"-", "hc-read0", "q8+qkv/q-idx gemv", "conv", "ab", "z", "rec", "q8+kv-idx",
+                                          "k/v+norm-rope", "kv+idx append", "q+q-idx", "scores+topk", "kv-resolve",
+                                          "attention", "gate", "", "out-proj", "hc-read1+router", "shared+quant",
+                                          "waitA", "VRAM hits", "waitB", "PCIe grp", "waitCPU", "copy+combine",
+                                          "(gap)", "head", "  hc0 norm", "  hc0 down", "  hc0 up", "", ""};
+    std::string out;
+    char b[80];
+    double total = 0;
+    for (int k = 0; k < 2; ++k) {
+        out += k == 0 ? " GDN layers:" : " | QSA layers:";
+        for (int i = 0; i < kProfPer; ++i) {
+            if (prof_sum_[k][i] <= 0) continue;
+            total += prof_sum_[k][i];
+            std::snprintf(b, sizeof b, " %s %.2f", names[i], prof_sum_[k][i] / 1e6 / (double) prof_windows_);
+            out += b;
+        }
+    }
+    std::snprintf(b, sizeof b, " | total %.2f ms/window over %lld windows", total / 1e6 / (double) prof_windows_, (long long) prof_windows_);
+    out += b;
+    for (auto& r : prof_sum_) for (double& d : r) d = 0;
+    prof_windows_ = 0;
+    return out;
+}
+
+bool Verifier::capture(int T, std::string &err) try {
+    if (exec_[T] != nullptr) return true;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "verify: begin capture failed";
+        return false;
+    }
+    std::string rerr;
+    const bool ok = record_window(T, cs_, rerr);
+    dpct::experimental::command_graph_ptr graph = nullptr;
+    const dpct::err0 ce =
+        DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs_, &graph));
+    if (!ok) {
+        if (graph) delete (graph);
+        err = rerr;
+        return false;
+    }
+    /*
+    DPCT1000:43: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (ce != 0) {
+        /*
+        DPCT1009:46: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        /*
+        DPCT1001:42: The statement could not be removed.
+        */
+        err = std::string("verify: end capture: ") +
+              dpct::get_error_string_dummy(ce);
+        return false;
+    }
+    if (std::getenv("STRATA_VERIFY_NODES") != nullptr) {   // what the window graph holds
+        size_t nn = 0;
+        dpct::experimental::get_nodes(graph, nullptr, &nn);
+        std::vector<dpct::experimental::node_ptr> nodes(nn);
+        dpct::experimental::get_nodes(graph, nodes.data(), &nn);
+        std::map<std::string, int> kinds;
+        for (dpct::experimental::node_ptr nd : nodes) {
+            sycl::ext::oneapi::experimental::node_type ty;
+            ty = nd->get_type();
+            std::string name = "type" + std::to_string((int) ty);
+            if (ty == sycl::ext::oneapi::experimental::node_type::kernel) {
+                name = "kernel";   // SYCL: no kernel-name introspection on graph nodes
+            } else if (ty == sycl::ext::oneapi::experimental::node_type::memcpy)
+                name = "memcpy";
+            else if (ty == sycl::ext::oneapi::experimental::node_type::memset)
+                name = "memset";
+            ++kinds[name];
+        }
+        std::vector<std::pair<int, std::string>> v;
+        for (auto& [k2, c] : kinds) v.push_back({c, k2});
+        std::sort(v.rbegin(), v.rend());
+        std::fprintf(stderr, "strata verify: the %d-token window graph has %zu nodes:", T, nn);
+        for (size_t i = 0; i < v.size() && i < 40; ++i) std::fprintf(stderr, " %d x %.60s;", v[i].first, v[i].second.c_str());
+        std::fprintf(stderr, "\n");
+    }
+    const dpct::err0 ie = DPCT_CHECK_ERROR(
+        exec_[T] = new sycl::ext::oneapi::experimental::command_graph<
+            sycl::ext::oneapi::experimental::graph_state::executable>(
+            graph->finalize()));
+    delete (graph);
+    /*
+    DPCT1000:45: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (ie != 0) {
+        /*
+        DPCT1009:50: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        /*
+        DPCT1001:44: The statement could not be removed.
+        */
+        err = std::string("verify: instantiate: ") +
+              dpct::get_error_string_dummy(ie);
+        return false;
+    }
+    /*
+    DPCT1007:51: Migration of cudaGraphUpload is not supported.
+    */
+    const dpct::err0 ue = 0;   // no cudaGraphUpload on SYCL: a finalized command_graph is already resident
+    const dpct::err0 us = DPCT_CHECK_ERROR(cs_->wait());
+    std::fprintf(
+        stderr,
+        "strata verify: captured the %d-token window (upload %s, sync %s)\n", T,
+        /*
+        DPCT1009:52: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        dpct::get_error_string_dummy(ue), dpct::get_error_string_dummy(us));
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool Verifier::capture_commit(std::string &err) try {
+    if (commit_exec_ != nullptr) return true;
+    using namespace strata::kernels;
+    const ModelGeometry& g = *g_;
+    SessionState& ss = *ss_;
+    const QsaShapes s = shapes_of(g);
+    const int64_t C = g.ssm_conv_channels, HV = g.ssm_v_heads, ID = g.idx_key_dim, MT = max_t_;
+    const uint64_t gdn_floats = (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
+                                (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
+    const int64_t TS = (s.idx_block - 1) * ID;
+    const int64_t HS = (int64_t) NG_HIST * NG_HC_DIM;
+    if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
+        err = "verify: begin commit capture failed";
+        return false;
+    }
+    bool ok = true;
+    try {
+        copy_i32_from_mapped(commit_, m_commit_, 2 + MT, cs_);
+        int64_t qsa_index = 0, gdn_index = 0;
+        for (int64_t l = 0; l < lb_; ++l) (is_qsa_layer(g, l) ? qsa_index : gdn_index) += 1;
+        for (int64_t l = lb_; l < le_ && ok; ++l) {
+            const LayerView v(*wt_, l);
+            if (!is_qsa_layer(g, l)) {
+                const WeightRef* wnm = need(v, "ssm_norm.weight", err);
+                if (!wnm) { ok = false; break; }
+                float* state = ss.gdn_state + (size_t) gdn_index * gdn_floats;
+                float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+                const float* qkv = qkv_L_ + (size_t) gdn_index * MT * C;
+                gdn_conv_commit(conv, qkv, (int) C, commit_, cs_);
+                gdn_step_norm_multi(state, h_L_ + (size_t) gdn_index * MT * C, (int) C, gate_L_ + (size_t) gdn_index * MT * HV,
+                                    beta_L_ + (size_t) gdn_index * MT * HV, z_, (const float*) wnm->data, EPS, y_dummy_,
+                                    (int) g.ssm_k_heads, (int) HV, (int) MT, commit_, cs_);
+                ++gdn_index;
+            } else {
+                const QsaState& st = ss.qsa_states[qsa_index];
+                const WeightRef* wikn = need(v, "indexer.k_norm.weight", err);
+                if (!wikn) { ok = false; break; }
+                copy_from_mapped(st.idx_tail, tail_snap_ + (size_t) qsa_index * TS, TS, cs_);
+                const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
+                for (int64_t t = 0; t < MT; ++t)
+                    native_qsa_indexer_append(idx_raw_L_ + (size_t) (qsa_index * MT + t) * ID, commit_ + 2 + t, 0,
+                                              (const float*) wikn->data, EPS, ib, s, st.max_cells,
+                                              (float) qsa_freq_base(), cs_);
+                ++qsa_index;
+            }
+        }
+        if (ok && ss.ple.ready() && ple_stage()) copy_indexed(ss.ple.hist, hist_snap_, HS, commit_ + 1, HS, cs_);
+    } catch (const std::exception& e) {
+        err = std::string("verify commit: ") + e.what();
+        ok = false;
+    }
+    dpct::experimental::command_graph_ptr graph = nullptr;
+    const dpct::err0 ce =
+        DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs_, &graph));
+    if (!ok) {
+        if (graph) delete (graph);
+        return false;
+    }
+    if (ce != 0 ||
+        DPCT_CHECK_ERROR(
+            commit_exec_ = new sycl::ext::oneapi::experimental::command_graph<
+                sycl::ext::oneapi::experimental::graph_state::executable>(
+                graph->finalize())) != 0) {
+        if (graph) delete (graph);
+        /*
+        DPCT1009:53: SYCL reports errors using exceptions and does not use error
+        codes. Please replace the "get_error_string_dummy(...)" with a real
+        error-handling function.
+        */
+        err = std::string("verify: commit capture: ") +
+              dpct::get_error_string_dummy(ce);
+        return false;
+    }
+    delete (graph);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
+                   void *user, int32_t *out, std::string &err) try {
+    using namespace strata::kernels;
+    const OnDevice on_device(device_);
+    if (T < 1 || T > max_t_) { err = "verify: window size out of range"; return false; }
+    const ModelGeometry& g = *g_;
+    SessionState& ss = *ss_;
+    if (pos0 + T > ss.qsa_states[0].max_cells) { err = "verify: the window runs past the context"; return false; }
+    if (!capture(T, err) || !capture_commit(err)) return false;
+    VDBG("captured; staging\n");
+    const Clock::time_point t0 = Clock::now();
+    const QsaShapes s = shapes_of(g);
+    for (int t = 0; t < T; ++t) {
+        h_tok_[t] = tokens[t];
+        qsa_step_fill(h_step_ + t * kStepCount, pos0 + t, s);
+        for (int64_t h = 0; h < g.n_head; ++h) h_pos_[t * g.n_head + h] = (int32_t) (pos0 + t);
+        int32_t* pk = h_pos_ + (size_t) max_t_ * g.n_head;
+        int32_t* pi = pk + (size_t) max_t_ * g.n_head_kv;
+        for (int64_t h = 0; h < g.n_head_kv; ++h) pk[t * g.n_head_kv + h] = (int32_t) (pos0 + t);
+        for (int64_t h = 0; h < g.idx_q_heads; ++h) pi[t * g.idx_q_heads + h] = (int32_t) (pos0 + t);
+    }
+    if (ss.ple.ready() && ple_stage()) {
+        uint32_t rows[kVerifyMaxT * PLE_N_HEADS];
+        int32_t prev[2] = {ss.ple_prev[0], ss.ple_prev[1]};
+        for (int t = 0; t < T; ++t) {
+            ngram_rows(&tokens[t], prev, 1, ss.ple.consts, rows + t * PLE_N_HEADS);
+            prev[0] = prev[1];
+            prev[1] = tokens[t];
+        }
+        if (!ss.ple.table->gather_batch(rows, (size_t) T, h_ple_, err)) return false;
+    }
+    *(volatile uint32_t*) h_seq_ = 0;
+    *(volatile uint32_t*) h_flag_ = 0;
+    *(volatile uint32_t*) h_flagA_ = 0;
+    *(volatile uint32_t*) h_flagB_ = 0;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    last_t_ = T;
+    last_pos0_ = pos0;
+    for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
+    ms_host += ms_since(t0);
+    VDBG("staged; launching\n");
+    const dpct::err0 le = DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*exec_[T]));
+    /*
+    DPCT1009:58: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:54: The statement could not be removed.
+    */
+    /*
+    DPCT1000:55: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (le != 0) {
+        err =
+            std::string("verify: launch: ") + dpct::get_error_string_dummy(le);
+        return false;
+    }
+    (void)DPCT_CHECK_ERROR(((cs_)->ext_oneapi_empty()));
+    VDBG("launched\n");
+    volatile uint32_t* const seq = h_seq_;
+    volatile uint32_t* const flag = h_flag_;
+    const int G = groups_[T] > 0 ? groups_[T] : 1;
+    const int gtb[2] = {0, (T + 1) / 2}, gte[2] = {G == 2 ? (T + 1) / 2 : T, T};
+    for (int64_t k = 0; k < (le_ - lb_) * G; ++k) {
+        const int64_t l = lb_ + k / G;
+        const int grp = (int) (k % G);
+        const uint32_t want = (uint32_t) (k + 1);
+        const Clock::time_point a = Clock::now();
+        auto last_flush = a;
+        uint32_t spins = 0;
+        progress_at("verify window: waiting for the GPU to reach layer", l);
+        while (*seq < want) {
+            _mm_pause();
+            if ((++spins & 1023u) != 0) continue;
+            const auto now = Clock::now();
+            if (now - last_flush > std::chrono::microseconds(2000)) {
+                last_flush = now;
+                const dpct::err0 q =
+                    DPCT_CHECK_ERROR(((cs_)->ext_oneapi_empty()));
+                if (q != 1 && *seq < want) {
+                    err = "verify: layer " + std::to_string(l) +
+                          " never rang (" +
+                          /*
+                          DPCT1009:59: SYCL reports errors using exceptions and
+                          does not use error codes. Please replace the
+                          "get_error_string_dummy(...)" with a real
+                          error-handling function.
+                          */
+                          (q == 0
+                               ? std::string("graph finished")
+                               : std::string(dpct::get_error_string_dummy(q))) +
+                          ")";
+                    return false;
+                }
+            }
+            if (now - a > std::chrono::seconds(20)) { err = "verify: timed out at layer " + std::to_string(l); return false; }
+        }
+        const Clock::time_point b = Clock::now();
+        VDBG("layer %lld rang\n", (long long) l);
+        cur_layer_ = want - 1;
+        set_plan_slot(grp);
+        const int tb = gtb[grp], n = gte[grp] - gtb[grp];
+        progress_at("verify window: the CPU experts of layer", l);
+        if (pool != nullptr)
+            pool(user, h_x_ + (size_t) tb * g.n_embd, h_ids_ + (size_t) tb * ss.k, n, ss.k,
+                 h_ymiss_ + (size_t) tb * ss.k * g.n_embd, l);
+        VDBG("layer %lld served\n", (long long) l);
+        progress_tick();
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        _mm_sfence();
+        if (*(volatile uint32_t*) h_flagA_ != want) {        // the pool did not publish a plan: an empty one
+            sink_.counts[0] = 0;
+            sink_.counts[1] = 0;
+            sink_.counts[2] = 0;
+            sink_.start[0] = 0;
+            sink_.start2[0] = 0;
+            std::atomic_thread_fence(std::memory_order_seq_cst);
+            *(volatile uint32_t*) h_flagA_ = want;
+            raise_flag(h_flagB_, want);
+        }
+        *flag = want;
+        ms_wait += std::chrono::duration<double, std::milli>(b - a).count();
+        ms_pool += ms_since(b);
+    }
+    progress_at("verify window: waiting for the GPU to finish the window (flags A/B/M raised)", (int64_t) T);
+    const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
+    /*
+    DPCT1009:60: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:56: The statement could not be removed.
+    */
+    /*
+    DPCT1000:57: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (se != 0) {
+        err = std::string("verify: ") + dpct::get_error_string_dummy(se);
+        return false;
+    }
+    progress_at("verify window: waiting for the expert copies", (int64_t) T);
+    copy_->wait(); // no host function of this window may raise flag B in the
+                   // next one
+    if (prof_on_ && G == 1) {       // the window's GPU stage stamps
+        dpct::get_in_order_queue()
+            .memcpy(prof_h_.data(), prof_, prof_h_.size() * 8)
+            .wait();
+        const int64_t L = g.n_layers;
+        auto at = [&](int64_t l, int i) { return prof_h_[(size_t) (l * kProfPer + i)]; };
+        for (int64_t l = 0; l < L; ++l) {
+            const int kind = is_qsa_layer(g, l) ? 1 : 0;
+            unsigned long long prev = at(l, 0);
+            for (int i = 1; i <= 24; ++i) {
+                const unsigned long long x = at(l, i);
+                if (x == 0 || x < prev) continue;
+                prof_sum_[kind][i] += (double) (x - prev);
+                prev = x;
+            }
+            if (l + 1 < L) prof_sum_[kind][25] += (double) (at(l + 1, 0) - at(l, 24));
+            prof_sum_[kind][27] += (double) (at(l, 27) - at(l, 0));    // hc-read0: norm
+            prof_sum_[kind][28] += (double) (at(l, 28) - at(l, 27));   //           down
+            prof_sum_[kind][29] += (double) (at(l, 1) - at(l, 28));    //           up
+            prof_sum_[kind][1] -= (double) (at(l, 1) - at(l, 0));      // (hc-read0 shown split)
+        }
+        prof_sum_[0][26] += (double) (at(L, 1) - at(L, 0));
+        ++prof_windows_;
+    }
+    // ---- a sampled or penalized request: the head's sampling again, host-side so its parameters are this call's
+    // own (a captured kernel would replay the same draws forever).  Row t's draw is Philox(seed, pos0 + t): tied to
+    // the POSITION it samples, not to how the text was cut into windows, so a seed replays the same text whatever
+    // the drafts were. Exact: a rejected row's draw is discarded, and no kept decision depends on a reused draw.
+    if (le_ < g.n_layers) {   // a layer split's earlier stage: the hand-off is written (synced above)
+        ++windows;
+        return next_ == nullptr || next_->run(T, tokens, pos0, pool, next_user_, out, err);
+    }
+    const bool sampled = !sampling_.greedy && sampling_.temperature > 0.0f;
+    if (head_sampling_ && (sampled || hist_d_ != nullptr)) {
+        SamplerParams sp = sampling_;
+        sp.counter = (uint64_t) pos0;
+        sample_tokens(head_logits_, T, (int) n_vocab_, hist_d_, hist_len_, sp, m_out_, cs_);
+        if (DPCT_CHECK_ERROR(cs_->wait()) !=
+            0) { // m_out_ is the mapped h_out_: synced, it is readable
+            err = "verify: the head sampling failed";
+            return false;
+        }
+    }
+    for (int t = 0; t < T; ++t) out[t] = ((volatile int32_t*) h_out_)[t];
+    if (static const bool dbg = std::getenv("STRATA_DBG_NAN") != nullptr; dbg) {   // debug: the first non-finite head
+        static bool reported = false;
+        if (!reported) {
+            std::vector<float> h((size_t) T * (size_t) n_vocab_);
+            dpct::get_in_order_queue()
+                .memcpy(h.data(), head_logits_, h.size() * 4)
+                .wait();
+            for (int t = 0; t < T && !reported; ++t) {
+                int64_t bad = 0;
+                for (int64_t v = 0; v < n_vocab_; ++v) bad += !std::isfinite(h[(size_t) t * n_vocab_ + v]);
+                if (bad) {
+                    reported = true;
+                    std::fprintf(stderr, "strata dbg: verify window at position %lld, row %d: %lld of %lld logits non-finite "
+                                         "(token out %d)\n", (long long) pos0, t, (long long) bad, (long long) n_vocab_, out[t]);
+                }
+            }
+        }
+    }
+    VDBG("window done\n");
+    ++windows;
+    progress_at("decode");
+    progress_beat();
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void Verifier::set_plan_slot(int grp) {
+    const int64_t cap = sink_.cap;
+    int32_t* base = h_plan_ + (size_t) grp * (size_t) plan_i32_;
+    const int64_t i32 = 4 + (cap + 1) + cap + cap;
+    const int64_t ptr_off = (i32 + 1) & ~1ll;
+    sink_.counts = base;
+    sink_.start = base + 4;
+    sink_.dst = sink_.start + cap + 1;
+    sink_.tok = sink_.dst + cap;
+    sink_.ptr = (unsigned long long*) (base + ptr_off);
+    sink_.ptr2 = sink_.ptr + cap;
+    sink_.start2 = base + ptr_off + 4 * cap;
+    const int G = groups_[last_t_] > 0 ? groups_[last_t_] : 1;
+    const int64_t per = G == 2 ? kStagingBlobs / 2 : kStagingBlobs;
+    sink_.staging = (unsigned long long) (staging_ + (size_t) (grp * per) * strata::kernels::cpu::expert_layout().max_blob);
+    sink_.staging_cap = per;
+}
+
+// Flag B only rises: a host function of an earlier layer may run after a later layer already raised it directly.
+void Verifier::raise_flag(uint32_t* flag, uint32_t value) {
+    volatile long* f = (volatile long*) flag;
+#if defined(_WIN32)
+    long cur = *f;
+    while ((uint32_t) cur < value) {
+        const long prev = _InterlockedCompareExchange(f, (long) value, cur);
+        if (prev == cur) break;
+        cur = prev;
+    }
+#else
+    uint32_t cur = __atomic_load_n((uint32_t*) flag, __ATOMIC_SEQ_CST);
+    while (cur < value && !__atomic_compare_exchange_n((uint32_t*) flag, &cur, value, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST)) {}
+#endif
+}
+
+// Plan v0.3 P6: the PCIe share by DMA.  The copy engine moves the blobs while the CPU computes its own share and the
+// GPU its VRAM experts; a host function raises flag B when they have landed (the graph waits for it before the PCIe
+// groups).  Staging is split between the two token groups of a split window.
+void Verifier::fetch_dma(void* ctx, const uint8_t* const* src, int n, size_t bytes) {
+    Verifier* v = (Verifier*) ctx;
+    const uint32_t want = v->cur_layer_ + 1;
+    if (n <= 0) { raise_flag(v->h_flagB_, want); return; }
+    uint8_t* stage = (uint8_t*) v->sink_.staging;                  // this group's half in a split window
+    /*
+    DPCT1124:61: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    for (int i = 0; i < n; ++i)
+        v->copy_->memcpy(stage + (size_t)i * bytes, src[i], bytes);
+    FlagSet& fs = v->flag_sets_[v->cur_layer_ % (sizeof v->flag_sets_ / sizeof v->flag_sets_[0])];
+    fs.flag = v->h_flagB_;
+    fs.value = want;
+  FlagSet* fsp = &fs;
+  v->copy_->submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() { raise_flag(fsp->flag, fsp->value); });
+  });
+}
+
+void Verifier::publish_plan(void* ctx) {
+    Verifier* v = (Verifier*) ctx;
+    _mm_sfence();
+    *(volatile uint32_t*) v->h_flagA_ = v->cur_layer_ + 1;
+}
+
+bool Verifier::commit(int n_keep, std::string &err) try {
+    const OnDevice on_device(device_);
+    if (n_keep < 1 || n_keep > last_t_) { err = "verify: commit count out of range"; return false; }
+    const Clock::time_point t0 = Clock::now();
+    h_commit_[0] = n_keep;
+    h_commit_[1] = n_keep - 1;
+    for (int t = 0; t < max_t_; ++t) h_commit_[2 + t] = t < n_keep ? (int32_t) (last_pos0_ + t) : -1;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    const dpct::err0 le =
+        DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*commit_exec_));
+    /*
+    DPCT1009:66: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:62: The statement could not be removed.
+    */
+    /*
+    DPCT1000:63: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (le != 0) {
+        err = std::string("verify: commit launch: ") +
+              dpct::get_error_string_dummy(le);
+        return false;
+    }
+    const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
+    /*
+    DPCT1009:67: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:64: The statement could not be removed.
+    */
+    /*
+    DPCT1000:65: Error handling if-stmt was detected but could not be rewritten.
+    */
+    if (se != 0) {
+        err =
+            std::string("verify: commit: ") + dpct::get_error_string_dummy(se);
+        return false;
+    }
+    if (ple_stage())   // stages that share one session must advance it once
+        for (int t = 0; t < n_keep; ++t) {
+            ss_->ple_prev[0] = ss_->ple_prev[1];
+            ss_->ple_prev[1] = last_tokens_[t];
+        }
+    ms_commit += ms_since(t0);
+    return next_ == nullptr || next_->commit(n_keep, err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/weights.cpp b/sycl/src/core/weights.cpp
new file mode 100644
index 00000000000..3ab7f2feed0
--- /dev/null
+++ b/sycl/src/core/weights.cpp
@@ -0,0 +1,504 @@
+// src/core/weights.cpp - the dense-weight loader.  See the header for the engine-vs-pack distinction.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/weights.hpp"
+
+#include "strata/kernels/f16_bits.hpp"
+
+#include <chrono>
+#include <algorithm>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+
+#if defined(_WIN32)
+#include <io.h>
+#else
+#include <unistd.h>
+#endif
+
+namespace strata::core {
+namespace {
+
+constexpr uint64_t CHUNK = 8ull << 20;   // 8 MiB of SOURCE per staging round
+
+double now_ms() {
+    using namespace std::chrono;
+    return duration<double, std::milli>(steady_clock::now().time_since_epoch()).count();
+}
+
+struct IndexRow {
+    std::string name;
+    int file = 0;
+    WeightKind kind = WeightKind::Verbatim;
+    uint64_t src_off = 0, src_bytes = 0, dst_off = 0, dst_bytes = 0;
+    int64_t ne0 = 0, ne1 = 0;
+    int code_bits = 0, code_bias = 0, group_elems = 0, codebook = 0, has_offset = 0;
+    uint64_t codes_bytes = 0, scales_bytes = 0, offset_bytes = 0;
+    int scales_fp16 = 0;
+    int act_kind = 0;
+    bool raw16 = false;   ///< plan v0.3 P6: already 16-bit in the file (kinds 4/5)
+};
+
+/// How a segment's bytes must be transformed on the way from the pack to the arena.
+enum class Conv : int {
+    Copy = 0,      ///< the bytes are already the engine form
+    Bf16High = 1,  ///< f32 container holding a bf16 value: take the high 16 bits
+    ToF16 = 2,     ///< f32 container holding an f16 value: a real round-to-nearest-even conversion
+    WidenF16 = 3,  ///< fp16 bits to be held as f32: EXACT, and the reason this path exists at all
+};
+
+/// One contiguous run of a tensor's source span with a single destination range and one transform.
+///
+/// THE SEGMENT LIST IS WHY THIS LOADER CAN CHANGE WIDTHS PLANE BY PLANE.  A quantized tensor used to be one
+/// verbatim span, which is only correct when every plane is already in engine form - and for 90 of the 303
+/// quantized tensors the scale plane is fp16 in the pack and must be f32 in the arena.
+struct Seg {
+    uint64_t src_off = 0;   ///< relative to the row's src_off
+    uint64_t src_bytes = 0;
+    uint64_t dst_off = 0;   ///< relative to the row's dst_off
+    uint64_t dst_bytes = 0;
+    Conv conv = Conv::Copy;
+};
+
+const char* file_name(int id) {
+    switch (id) {
+        case 0: return "dense.bin";
+        case 1: return "embd.bin";
+        case 2: return "experts.bin";
+        case 3: return "extra.bin";   // plan v0.3 P6: a native pack's float tensors that the base pack quantized
+        default: return nullptr;
+    }
+}
+
+/// UTF-16 path for CreateFile-free portability: the loader uses `std::fopen`, which on Windows takes an ANSI
+/// path.  The pack lives beside the executable in practice, but a pack under a user directory with a
+/// non-ASCII name would silently fail to open, so the caller gets the errno rather than a null pointer.
+bool read_at(std::FILE* f, uint64_t off, void* dst, size_t n, std::string& err, const char* what) {
+#if defined(_WIN32)
+    if (_fseeki64(f, (long long) off, SEEK_SET) != 0) { err = std::string(what) + ": seek failed"; return false; }
+#else
+    if (fseeko(f, (off_t) off, SEEK_SET) != 0) { err = std::string(what) + ": seek failed"; return false; }
+#endif
+    if (std::fread(dst, 1, n, f) != n) { err = std::string(what) + ": short read"; return false; }
+    return true;
+}
+
+}  // namespace
+
+bool WeightTable::pool_bytes(const std::string& pack_dir, uint64_t& out, std::string& err,
+                             const std::set<std::string>* skip) {
+    const std::string path = pack_dir + "/index.txt";
+    std::FILE* f = std::fopen(path.c_str(), "rb");
+    if (!f) { err = "cannot open " + path; return false; }
+    char line[1024];
+    out = 0;
+    uint64_t pool = 0, compact = 0;
+    int align = 0;
+    while (std::fgets(line, sizeof line, f)) {
+        if (line[0] == '#') {
+            unsigned long long p = 0;
+            int a = 0, tensors = 0;
+            if (std::sscanf(line, "# align %d pool %llu tensors %d", &a, &p, &tensors) == 3) { pool = p; align = a; }
+            continue;
+        }
+        if (skip == nullptr) continue;
+        char name[256] = {0};
+        unsigned long long dst_bytes = 0, dummy = 0;
+        int i1 = 0, i2 = 0;
+        if (std::sscanf(line, "%255s %d %d %llu %llu %llu %llu", name, &i1, &i2, &dummy, &dummy, &dummy, &dst_bytes) != 7)
+            continue;
+        if (skip->count(name)) continue;
+        const uint64_t a = align > 0 ? (uint64_t) align : 256;
+        compact += (dst_bytes + a - 1) / a * a;
+    }
+    std::fclose(f);
+    if (pool == 0) { err = "no '# align ... pool ...' header in " + path; return false; }
+    out = skip ? compact : pool;
+    return true;
+}
+
+bool WeightTable::load(const std::string &pack_dir, void *arena_base,
+                       uint64_t arena_bytes, std::string &err,
+                       const std::set<std::string> *skip) try {
+    const std::string path = pack_dir + "/index.txt";
+    std::FILE* idx = std::fopen(path.c_str(), "rb");
+    if (!idx) { err = "cannot open " + path + " (run tools/pack_index.py)"; return false; }
+
+    uint64_t pool = 0;
+    int align = 0;
+    std::vector<IndexRow> rows;
+    char line[1024];
+    while (std::fgets(line, sizeof line, idx)) {
+        if (line[0] == '#') {
+            unsigned long long p = 0;
+            int a = 0, t = 0;
+            if (std::sscanf(line, "# align %d pool %llu tensors %d", &a, &p, &t) == 3) { pool = p; align = a; }
+            continue;
+        }
+        IndexRow r;
+        char name[256] = {0};
+        int kind = 0;
+        // The format is written by tools/pack_index.py and is space-separated with no quoting; a name with a
+        // space in it would break the parse, which is why the parser REFUSES rather than taking what it got.
+        const int n = std::sscanf(line,
+                                  "%255s %d %d %llu %llu %llu %llu %lld %lld %d %d %d %d %d %llu %llu %llu %d %d",
+                                  name, &r.file, &kind, &r.src_off, &r.src_bytes, &r.dst_off, &r.dst_bytes,
+                                  &r.ne0, &r.ne1, &r.code_bits, &r.code_bias, &r.group_elems, &r.codebook,
+                                  &r.has_offset, &r.codes_bytes, &r.scales_bytes, &r.offset_bytes,
+                                  &r.scales_fp16, &r.act_kind);
+        if (n != 19) {
+            // A malformed index line is a WRONG BYTE OFFSET waiting to happen, and a wrong offset decodes to
+            // a plausible weight.  Refuse loudly instead of loading the rows that happened to parse.
+            err = "index.txt: could not parse a row (" + std::to_string(n) + " of 19 fields)";
+            std::fclose(idx);
+            return false;
+        }
+        r.name = name;
+        // plan v0.3 P6: a standalone native pack (tools/iq_pack.py) stores 16-bit floats as they are in the GGUF:
+        // index kinds 4 (BF16) and 5 (F16) are copied and take the engine forms of kinds 1 and 3
+        if (kind == 4 || kind == 5) {
+            r.raw16 = true;
+            kind = kind == 4 ? (int) WeightKind::Bf16InF32 : (int) WeightKind::F16InF32;
+        }
+        r.kind = (WeightKind) kind;
+        rows.push_back(r);
+    }
+    std::fclose(idx);
+
+    if (pool == 0 || rows.empty()) { err = "index.txt has no header or no rows"; return false; }
+    // Plan v0.3 P1: a skip set compacts the arena.  Kept rows are re-placed in index order at the index's
+    // alignment; skipped rows keep their metadata and get no bytes.
+    std::vector<bool> skipped(rows.size(), false);
+    if (skip != nullptr) {
+        const uint64_t a = align > 0 ? (uint64_t) align : 256;
+        uint64_t at = 0;
+        for (size_t i = 0; i < rows.size(); ++i) {
+            if (skip->count(rows[i].name)) { skipped[i] = true; continue; }
+            rows[i].dst_off = at;
+            at += (rows[i].dst_bytes + a - 1) / a * a;
+        }
+        pool = at;
+    }
+    if (arena_bytes < pool) {
+        err = "arena is " + std::to_string(arena_bytes) + " B but the index needs " + std::to_string(pool);
+        return false;
+    }
+
+    // Two pinned staging buffers, both reused.  Pinned because a 5 GB pageable upload spends its time in the
+    // driver copying through a bounce buffer, and bounded by CHUNK rather than by the largest tensor.
+    //
+    // STAGE_OUT IS NOT OPTIONAL.  The first version of this loop converted the values straight into the
+    // destination pointer - which is DEVICE memory - from host code.  A host write to a device address is
+    // undefined behaviour, and on this driver it does not fault: it corrupts whatever the address maps to in
+    // the host's own space, which is nothing at all, so the tensor would have loaded as the UNCONVERTED pack
+    // bytes and every BF16 weight would have been read as 32-bit garbage.  Converted data goes to a host
+    // buffer and crosses the bus once.
+    //
+    // STAGE_OUT IS TWICE STAGE_IN because a conversion can now GROW: widening an fp16 scale plane to f32
+    // doubles it.  Sized at CHUNK it would have written 8 MiB past the end of a pinned allocation for every
+    // one of the 90 widened tensors - a heap corruption that would have been blamed on whatever ran next.
+    void* stage_in = nullptr;
+    void* stage_out = nullptr;
+    /*
+    DPCT1048:17: The original value cudaHostAllocDefault is not meaningful in
+    the migrated code and was removed or replaced with 0. You may need to check
+    the migrated code.
+    */
+    if (DPCT_CHECK_ERROR(stage_in = (void *)sycl::malloc_host(
+                             CHUNK, dpct::get_in_order_queue())) != 0 ||
+        /*
+        DPCT1048:18: The original value cudaHostAllocDefault is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        DPCT_CHECK_ERROR(stage_out = (void *)sycl::malloc_host(
+                             CHUNK * 2, dpct::get_in_order_queue())) != 0) {
+        err = "cudaHostAlloc for the staging buffers failed";
+        if (stage_in) sycl::free(stage_in, dpct::get_in_order_queue());
+        if (stage_out) sycl::free(stage_out, dpct::get_in_order_queue());
+        return false;
+    }
+
+    uint8_t* dst_base = (uint8_t*) arena_base;
+    std::FILE* cur = nullptr;
+    int cur_file = -1;
+    table_.clear();
+    report_ = LoadReport{};
+
+    const double t_read0 = now_ms();
+    double upload_ms = 0;
+    for (size_t row_i = 0; row_i < rows.size(); ++row_i) {
+        const IndexRow& r = rows[row_i];
+        if (skipped[row_i]) {
+            WeightRef wr;
+            wr.data = nullptr;
+            wr.resident = false;
+            wr.bytes = r.dst_bytes;
+            wr.ne0 = r.ne0;
+            wr.ne1 = r.ne1;
+            wr.elements = r.ne0 * (r.ne1 > 0 ? r.ne1 : 1);
+            wr.kind = r.kind;
+            wr.code_bits = r.code_bits;
+            wr.code_bias = r.code_bias;
+            wr.group_elems = r.group_elems;
+            wr.codebook_iq4nl = r.codebook != 0;
+            wr.has_offset = r.has_offset != 0;
+            wr.codes_bytes = r.codes_bytes;
+            wr.scales_bytes = r.scales_bytes;
+            wr.offset_bytes = r.offset_bytes;
+            wr.src_off = r.src_off;
+            wr.src_bytes = r.src_bytes;
+            wr.file_id = r.file;
+            wr.scales_fp16 = r.scales_fp16 != 0;
+            wr.act_kind = r.act_kind;
+            table_[r.name] = wr;
+            ++report_.tensors;
+            continue;
+        }
+        if (r.code_bits != 0 && r.dst_bytes == 0) {
+            // plan v0.3 P6: a native pack's row that carries a shape only - the GGUF form must serve it
+            err = r.name + ": this pack holds the tensor only in its GGUF form (run with --native SHARD1)";
+            sycl::free(stage_in, dpct::get_in_order_queue());
+                sycl::free(stage_out, dpct::get_in_order_queue());
+            return false;
+        }
+        if (r.file != cur_file) {
+            if (cur) std::fclose(cur);
+            const char* fn = file_name(r.file);
+            const std::string p = pack_dir + "/" + (fn ? fn : "?");
+            cur = std::fopen(p.c_str(), "rb");
+            if (!cur) {
+                err = "cannot open " + p;
+                sycl::free(stage_in, dpct::get_in_order_queue());
+                sycl::free(stage_out, dpct::get_in_order_queue());
+                return false;
+            }
+            cur_file = r.file;
+        }
+
+        // ---- the segment list: what this tensor's bytes are, plane by plane, in both forms
+        Seg segs[3];
+        int n_segs = 0;
+        bool bad = false;
+        uint64_t sum_src = 0, sum_dst = 0;
+        if (r.codes_bytes != 0) {
+            // A quantized tensor: codes, then scales, then the optional offset plane, each contiguous in the
+            // source span in that order (pack_index.py verifies the contiguity and refuses otherwise).
+            segs[n_segs++] = Seg{0, r.codes_bytes, 0, r.codes_bytes, Conv::Copy};
+            if (r.scales_bytes) {
+                const uint64_t src_scale_bytes = r.scales_fp16 ? r.scales_bytes / 2 : r.scales_bytes;
+                if (r.scales_fp16 && (r.scales_bytes % 2 || src_scale_bytes * 2 != r.scales_bytes)) {
+                    err = r.name + ": an fp16 scale plane of an odd byte count";
+                    bad = true;
+                }
+                segs[n_segs++] = Seg{r.codes_bytes, src_scale_bytes, r.codes_bytes, r.scales_bytes,
+                                     r.scales_fp16 ? Conv::WidenF16 : Conv::Copy};
+            }
+            if (r.offset_bytes) {
+                const uint64_t after = r.codes_bytes + (r.scales_fp16 ? r.scales_bytes / 2 : r.scales_bytes);
+                segs[n_segs++] = Seg{after, r.offset_bytes, r.codes_bytes + r.scales_bytes, r.offset_bytes,
+                                     Conv::Copy};
+            }
+        } else {
+            // Everything else is one run whose transform is the row's kind.  The two promoted types shrink
+            // 4 B/elem to 2; the rest are already the engine form.
+            Conv c = Conv::Copy;
+            if (r.raw16) c = Conv::Copy;
+            else if (r.kind == WeightKind::Bf16InF32) c = Conv::Bf16High;
+            else if (r.kind == WeightKind::F16InF32) c = Conv::ToF16;
+            const uint64_t elems = (uint64_t) r.ne0 * (uint64_t) (r.ne1 > 0 ? r.ne1 : 1);
+            if (c != Conv::Copy && (r.src_bytes != elems * 4 || r.dst_bytes != elems * 2)) {
+                // A promoted type is 4 B/elem in and 2 B/elem out, and nothing else.  If those two numbers do
+                // not say so, the shape and the byte counts disagree and the element count this loop would
+                // use to walk the source is not the element count the pack wrote.
+                char buf[320];
+                std::snprintf(buf, sizeof buf,
+                              "%s: a promoted tensor of %llu elements is %llu B in and %llu B out, not %llu/%llu",
+                              r.name.c_str(), (unsigned long long) elems, (unsigned long long) r.src_bytes,
+                              (unsigned long long) r.dst_bytes, (unsigned long long) (elems * 4),
+                              (unsigned long long) (elems * 2));
+                err = buf;
+                bad = true;
+            }
+            segs[n_segs++] = Seg{0, r.src_bytes, 0, r.dst_bytes, c};
+        }
+        for (int i = 0; i < n_segs; ++i) { sum_src += segs[i].src_bytes; sum_dst += segs[i].dst_bytes; }
+        // The segment list is this loop's own idea of the layout, and it is the ONLY thing standing between a
+        // mis-sized plane and a wrong byte offset.  It is checked against both recorded totals, not trusted.
+        if (!bad && (sum_src != r.src_bytes || sum_dst != r.dst_bytes)) {
+            char buf[360];
+            std::snprintf(buf, sizeof buf,
+                          "%s: the segments cover %llu/%llu B but the index says %llu/%llu - the plane layout "
+                          "this loader built is not the one the index describes",
+                          r.name.c_str(), (unsigned long long) sum_src, (unsigned long long) sum_dst,
+                          (unsigned long long) r.src_bytes, (unsigned long long) r.dst_bytes);
+            err = buf;
+            bad = true;
+        }
+        if (bad) {
+            sycl::free(stage_in, dpct::get_in_order_queue());
+            sycl::free(stage_out, dpct::get_in_order_queue());
+            return false;
+        }
+
+        for (int si = 0; si < n_segs; ++si) {
+            const Seg& s = segs[si];
+            const bool widening = (s.conv == Conv::WidenF16);
+            if (widening && (s.src_bytes & 1ull)) {
+                err = r.name + ": an fp16 plane with an odd source byte count";
+                sycl::free(stage_in, dpct::get_in_order_queue());
+                    sycl::free(stage_out, dpct::get_in_order_queue());
+                return false;
+            }
+            uint64_t done = 0;
+            while (done < s.src_bytes) {
+                uint64_t n = std::min(CHUNK, s.src_bytes - done);
+                // WIDENING NEVER SPLITS AN ELEMENT.  CHUNK is even, so a full chunk cannot, but the tail of a
+                // plane whose length is odd would - and half an fp16 is a plausible-looking scale.
+                if (widening && (n & 1ull)) {
+                    if (n == 1) {
+                        err =
+                            r.name + ": an fp16 plane ending on a half element";
+                        sycl::free(stage_in, dpct::get_in_order_queue());
+                        sycl::free(stage_out, dpct::get_in_order_queue());
+                        return false;
+                    }
+                    n -= 1;
+                }
+                if (!read_at(cur, r.src_off + s.src_off + done, stage_in, (size_t) n, err, r.name.c_str())) {
+                    sycl::free(stage_in, dpct::get_in_order_queue());
+                        sycl::free(stage_out, dpct::get_in_order_queue());
+                    return false;
+                }
+                const uint8_t* src = (const uint8_t*) stage_in;
+                const void* host_src = src;
+                uint64_t out_bytes = n;
+                uint64_t out_at = s.dst_off + done;
+
+                switch (s.conv) {
+                    case Conv::Copy:
+                        break;
+                    case Conv::Bf16High: {
+                        // THE HIGH 16 BITS ARE THE BF16 ENCODING, exactly - not a rounding.  A bf16 value is
+                        // the top half of its f32 image, and the pack promoted it without changing it, so
+                        // this is a copy with a stride.
+                        const uint64_t elems = n / 4;
+                        out_bytes = elems * 2;
+                        uint8_t* o = (uint8_t*) stage_out;
+                        for (uint64_t i = 0; i < elems; ++i) {
+                            uint32_t v;
+                            std::memcpy(&v, src + i * 4, 4);
+                            const uint16_t h = (uint16_t) (v >> 16);
+                            std::memcpy(o + i * 2, &h, 2);
+                        }
+                        host_src = stage_out;
+                        out_at = s.dst_off + done / 2;
+                        break;
+                    }
+                    case Conv::ToF16: {
+                        const uint64_t elems = n / 4;
+                        out_bytes = elems * 2;
+                        uint8_t* o = (uint8_t*) stage_out;
+                        for (uint64_t i = 0; i < elems; ++i) {
+                            float v;
+                            std::memcpy(&v, src + i * 4, 4);
+                            const uint16_t h = strata::kernels::f16_from_f32(v);
+                            std::memcpy(o + i * 2, &h, 2);
+                        }
+                        host_src = stage_out;
+                        out_at = s.dst_off + done / 2;
+                        break;
+                    }
+                    case Conv::WidenF16: {
+                        // fp16 bits -> f32.  EXACT: every fp16 value is an f32 value, including the
+                        // subnormals, so this cannot change a single weight - which is why the engine may do
+                        // it at all, and why doing it costs 10.88 MiB rather than a second kernel family.
+                        const uint64_t elems = n / 2;
+                        out_bytes = elems * 4;
+                        float* o = (float*) stage_out;
+                        for (uint64_t i = 0; i < elems; ++i) {
+                            uint16_t h;
+                            std::memcpy(&h, src + i * 2, 2);
+                            o[i] = strata::kernels::f32_from_f16(h);
+                        }
+                        host_src = stage_out;
+                        out_at = s.dst_off + done * 2;
+                        break;
+                    }
+                }
+
+                const double u0 = now_ms();
+                /*
+                DPCT1114:1055: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                        dst_base + r.dst_off + out_at, host_src, out_bytes)) !=
+                    0) {
+                    err = "cudaMemcpy failed for " + r.name;
+                    sycl::free(stage_in, dpct::get_in_order_queue());
+                        sycl::free(stage_out, dpct::get_in_order_queue());
+                    return false;
+                }
+                upload_ms += now_ms() - u0;
+                done += n;
+            }
+        }
+
+        WeightRef wr;
+        wr.data = dst_base + r.dst_off;
+        wr.bytes = r.dst_bytes;
+        wr.ne0 = r.ne0;
+        wr.ne1 = r.ne1;
+        wr.elements = r.ne0 * (r.ne1 > 0 ? r.ne1 : 1);
+        wr.kind = r.kind;
+        wr.code_bits = r.code_bits;
+        wr.code_bias = r.code_bias;
+        wr.group_elems = r.group_elems;
+        wr.codebook_iq4nl = r.codebook != 0;
+        wr.has_offset = r.has_offset != 0;
+        wr.codes_bytes = r.codes_bytes;
+        wr.scales_bytes = r.scales_bytes;
+        wr.offset_bytes = r.offset_bytes;
+        wr.src_off = r.src_off;
+        wr.src_bytes = r.src_bytes;
+        wr.file_id = r.file;
+        wr.scales_fp16 = r.scales_fp16 != 0;
+        wr.act_kind = r.act_kind;
+        table_[r.name] = wr;
+
+        ++report_.tensors;
+        if ((r.kind == WeightKind::Bf16InF32 || r.kind == WeightKind::F16InF32) && !r.raw16) {
+            ++report_.re_rounded;
+            report_.bytes_saved += r.src_bytes - r.dst_bytes;
+        }
+    }
+    if (cur) std::fclose(cur);
+    sycl::free(stage_in, dpct::get_in_order_queue());
+    sycl::free(stage_out, dpct::get_in_order_queue());
+
+    report_.arena_bytes = pool;
+    report_.read_ms = now_ms() - t_read0 - upload_ms;
+    report_.upload_ms = upload_ms;
+    if (DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()) !=
+        0) {
+        err = "cudaDeviceSynchronize after the load failed"; return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+const WeightRef* WeightTable::find(const std::string& name) const {
+    const auto it = table_.find(name);
+    return it == table_.end() ? nullptr : &it->second;
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/kernels/bf16_gemv_parity.cpp b/sycl/src/kernels/bf16_gemv_parity.cpp
new file mode 100644
index 00000000000..b01f3bed228
--- /dev/null
+++ b/sycl/src/kernels/bf16_gemv_parity.cpp
@@ -0,0 +1,191 @@
+// src/kernels/bf16_gemv_parity.cpp - P2.S5's test for the BF16 GEMV.
+//
+// THREE THINGS ARE CHECKED, and the third is the one the engine's correctness rests on:
+//
+//   1. both kernels against a host reference that reads the SAME bf16 bits - so what is under test is the
+//      reduction, not the conversion, and the tolerance is set by summation order and nothing else;
+//   2. the naive and the split kernel agree with each other, because the naive one is the reference the
+//      split one exists to be checked against and a disagreement there means one of them is wrong;
+//   3. **THE ACTIVATION CONTRACT IS OBSERVABLE.**  A BF16 weight sees a BF16 activation; feeding it fp16 or
+//      f32 instead is a 2^-9 = 1.95e-03 relative change, which is above any 1e-3 tolerance.  An fp16
+//      activation is the rival reading, computed and required to differ, because it is what the engine did
+//      before `docs/activation-contract.md` settled the question and it produces perfectly plausible output.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+using strata::kernels::bf16_from_f32;
+using strata::kernels::f32_from_bf16;
+
+void check(dpct::err0 e, const char *what) {
+}
+
+double rel_l1(const std::vector<float>& a, const std::vector<float>& b) {
+    double d = 0, m = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs((double) a[i] - (double) b[i]);
+        m += std::fabs((double) a[i]);
+    }
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+/// The host reference, in DOUBLE, over the same bf16 bits.
+void reference(const std::vector<uint16_t>& x, const std::vector<uint16_t>& w, long long n_in, long long n_out,
+               std::vector<float>& y) {
+    y.assign((size_t) n_out, 0.0f);
+    for (long long o = 0; o < n_out; ++o) {
+        double acc = 0;
+        for (long long i = 0; i < n_in; ++i)
+            acc += (double) f32_from_bf16(x[(size_t) i]) * (double) f32_from_bf16(w[(size_t) (o * n_in + i)]);
+        y[(size_t) o] = (float) acc;
+    }
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: bf16_gemv_parity [--selftest]\n"); return 2; }
+    }
+    int bad = 0;
+
+    // THE REAL SHAPES, because a kernel that only works on a square toy is not a kernel this engine can use.
+    // `ssm_alpha` is [2560, 48] - a wide reduction and 48 outputs - and `indexer.k_proj` is [2560, 128].
+    struct Shape { long long n_in, n_out; const char* what; };
+    const Shape shapes[] = {
+        {2560, 48, "ssm_alpha.weight  [2560, 48]"},
+        {2560, 128, "indexer.k_proj   [2560, 128]"},
+        {2560, 512, "indexer.q_proj   [2560, 512]"},
+        {2560, 2560, "ple_value        [2560, 2560]"},
+    };
+
+    for (const Shape& s : shapes) {
+        std::mt19937 rng(4242);
+        std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> fx((size_t) s.n_in), fw((size_t) (s.n_in * s.n_out));
+        for (auto& v : fx) v = g(rng);
+        // a realistic weight scale: these are projections, not embeddings
+        for (auto& v : fw) v = g(rng) * 0.05f;
+
+        // THE ACTIVATION IS ROUNDED TO BF16 FIRST, which is the contract, and the WEIGHT is already bf16 in
+        // the pack - the loaded bytes ARE the high 16 bits of an f32.
+        std::vector<uint16_t> x((size_t) s.n_in), w((size_t) (s.n_in * s.n_out));
+        for (size_t i = 0; i < fx.size(); ++i) x[i] = bf16_from_f32(fx[i]);
+        for (size_t i = 0; i < fw.size(); ++i) w[i] = bf16_from_f32(fw[i]);
+
+        std::vector<float> want;
+        reference(x, w, s.n_in, s.n_out, want);
+
+        uint16_t *d_x = nullptr, *d_w = nullptr;
+        float *d_y = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = (uint16_t *)sycl::malloc_device(
+                                   x.size() * 2, dpct::get_in_order_queue())),
+              "x");
+        check(DPCT_CHECK_ERROR(d_w = (uint16_t *)sycl::malloc_device(
+                                   w.size() * 2, dpct::get_in_order_queue())),
+              "w");
+        check(DPCT_CHECK_ERROR(
+                  d_y = (float *)sycl::malloc_device(
+                      (size_t)s.n_out * 4, dpct::get_in_order_queue())),
+              "y");
+        /*
+        DPCT1114:1141: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+                                                                 x.size() * 2)),
+              "cx");
+        /*
+        DPCT1114:1142: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+                                                                 w.size() * 2)),
+              "cw");
+
+        std::vector<float> naive((size_t) s.n_out), warp((size_t) s.n_out), split((size_t) s.n_out);
+        strata::kernels::bf16_gemv(d_x, d_w, d_y, s.n_in, s.n_out, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(naive.data(), d_y, naive.size() * 4)
+                                   .wait()),
+              "cy1");
+        strata::kernels::bf16_gemv_split(d_x, d_w, d_y, s.n_in, s.n_out, 32, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(warp.data(), d_y, warp.size() * 4)
+                                   .wait()),
+              "cy2");
+        strata::kernels::bf16_gemv_split(d_x, d_w, d_y, s.n_in, s.n_out, 256, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(split.data(), d_y, split.size() * 4)
+                                   .wait()),
+              "cy3");
+
+        const double rn = rel_l1(want, naive), rw = rel_l1(want, warp), rs = rel_l1(want, split);
+        std::printf("  %-34s naive %.2e  warp %.2e  split256 %.2e\n", s.what, rn, rw, rs);
+        // The products are EXACT - both sides are bf16-valued, so f32 represents each product exactly - and
+        // the only difference is the order the 2560 terms are added.  A tight bound is therefore meaningful.
+        if (!(rn <= 1e-5 && rw <= 1e-5 && rs <= 1e-5)) { std::printf("    *** over 1e-5 ***\n"); ++bad; }
+
+        // ---- 3. THE ACTIVATION CONTRACT.  The rival: an fp16 activation instead of bf16, which is what the
+        // engine did before the contract was settled.  It must be observable, or check 1 above would pass
+        // against either and the contract would be untested.
+        {
+            std::vector<float> fp16_as_f32((size_t) s.n_in);
+            std::vector<uint16_t> x16((size_t) s.n_in);
+            for (size_t i = 0; i < fx.size(); ++i) {
+                x16[i] = strata::kernels::f16_from_f32(fx[i]);
+                fp16_as_f32[i] = strata::kernels::f32_from_f16(x16[i]);
+            }
+            // Round the fp16 value to bf16 - i.e. give the kernel a bf16 activation whose VALUES came through
+            // fp16.  That is the whole difference between the two contracts at this call site.
+            for (size_t i = 0; i < fp16_as_f32.size(); ++i) x[i] = bf16_from_f32(fp16_as_f32[i]);
+            /*
+            DPCT1114:1143: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      d_x, x.data(), x.size() * 2)),
+                  "cx2");
+            std::vector<float> rival((size_t) s.n_out);
+            strata::kernels::bf16_gemv(d_x, d_w, d_y, s.n_in, s.n_out, nullptr);
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(rival.data(), d_y, rival.size() * 4)
+                          .wait()),
+                  "cy4");
+            const double r = rel_l1(want, rival);
+            const bool visible = r > 1e-4;
+            std::printf("      %-30s %s (%.4f%% apart)\n", "bf16 vs fp16 activation",
+                        visible ? "yes" : "*** NO ***", r * 100);
+            if (!visible) ++bad;
+        }
+        sycl::free(d_x, dpct::get_in_order_queue());
+            sycl::free(d_w, dpct::get_in_order_queue());
+            sycl::free(d_y, dpct::get_in_order_queue());
+    }
+
+    std::printf("\nbf16_gemv: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("bf16_gemv_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/cuda/bf16_gemv.dp.cpp b/sycl/src/kernels/cuda/bf16_gemv.dp.cpp
new file mode 100644
index 00000000000..9ed03958773
--- /dev/null
+++ b/sycl/src/kernels/cuda/bf16_gemv.dp.cpp
@@ -0,0 +1,251 @@
+// src/kernels/cuda/bf16_gemv.cu - the BF16 GEMV.  See the header for why it is not `s_gemv`.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+
+#include "strata/kernels/bf16_bits.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 256;
+
+/// One thread per output row, walking it contiguously.  Kept as the naive reference the split version is
+/// checked against, and used directly for the shapes where the output width is already large.
+__dpct_inline__ void bf16_gemv_naive_kernel(const uint16_t *__restrict__ x,
+                                            const uint16_t *__restrict__ w,
+                                            float *__restrict__ y,
+                                            long long n_in, long long n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long o =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (o >= n_out) return;
+    const uint16_t* row = w + o * n_in;
+    float acc = 0.0f;
+#pragma unroll
+    for (long long i = 0; i < n_in; ++i)
+        acc += f32_from_bf16(x[i]) * f32_from_bf16(row[i]);
+    y[o] = acc;
+}
+
+/// One WARP per output row, lanes striding the reduction axis.  For a fixed `i` consecutive lanes touch
+/// consecutive addresses in this layout, so the load is coalesced - the property that took `gr_read` from
+/// 262 ms/token to 8.9.
+__dpct_inline__ void bf16_gemv_warp_kernel(const uint16_t *__restrict__ x,
+                                           const uint16_t *__restrict__ w,
+                                           float *__restrict__ y,
+                                           long long n_in, long long n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long o = (long long)item_ct1.get_group(2) * warps_per_block +
+                        (item_ct1.get_local_id(2) >> 5);
+    if (o >= n_out) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const uint16_t* row = w + o * n_in;
+    float acc = 0.0f;
+#pragma unroll
+    for (long long i = lane; i < n_in; i += 32)
+        acc += f32_from_bf16(x[i]) * f32_from_bf16(row[i]);
+    /*
+DPCT1108:171: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) acc +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, off);
+    if (lane == 0) y[o] = acc;
+}
+
+/// TPR lanes cooperate on ONE row's reduction: `threads_per_row` threads each take a strided slice and the
+/// block reduces through shared memory.  Used when the output width is too small to fill the machine.
+__dpct_inline__ void bf16_gemv_split_kernel(const uint16_t *__restrict__ x,
+                                            const uint16_t *__restrict__ w,
+                                            float *__restrict__ y,
+                                            long long n_in, long long n_out,
+                                            int tpr, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto scratch = (float *)dpct_local;
+    const long long o = item_ct1.get_group(2);
+    if (o >= n_out) return;
+    const int t = item_ct1.get_local_id(2); // 0 .. tpr-1
+    const uint16_t* row = w + o * n_in;
+    float acc = 0.0f;
+#pragma unroll
+    for (long long i = t; i < n_in; i += tpr)
+        acc += f32_from_bf16(x[i]) * f32_from_bf16(row[i]);
+    // block reduction; `tpr` is at most a few hundred, so a tree in shared is enough
+    scratch[t] = acc;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int off = tpr >> 1; off > 0; off >>= 1) {
+        if (t < off) scratch[t] += scratch[t + off];
+        /*
+        DPCT1118:172: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    if (t == 0) y[o] = scratch[0];
+}
+
+inline void finish(void *stream, const char *what) try {
+    /*
+    DPCT1010:839: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream != nullptr) return;
+    const dpct::err0 s =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace
+
+void bf16_gemv(const uint16_t* x, const uint16_t* w, float* y, int64_t n_in, int64_t n_out, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    // **THIS USED TO ALWAYS USE THE NAIVE KERNEL, AND THE NAIVE KERNEL IS UNCOALESCED.**
+    //
+    // `bf16_gemv_naive_kernel` gives one THREAD per output row and walks the row contiguously, so at a fixed
+    // `i` the 32 threads of a warp read `w[(o+k)*n_in + i]` - addresses `n_in * 2` bytes apart.  Every load in
+    // the kernel's inner loop costs 32 transactions instead of 1.  The comment above that kernel claims it is
+    // "used directly for the shapes where the output width is already large", but nothing ever made that
+    // choice: this function called it unconditionally, at every shape.
+    //
+    // What that costs, from the nsys per-kernel table: **4.66 ms/token across 24 calls, 194 us each** - the
+    // third largest kernel in the engine at the time, moving 1.19 GiB/token at ~210 GB/s where a plain read at
+    // this geometry measures 641 GB/s (`bench/micro/p32_floor.cu`).
+    //
+    // `bf16_gemv_warp_kernel` exists, is checked against this one by `bf16_gemv_parity`, and is coalesced -
+    // consecutive lanes touch consecutive addresses - which is the property `gr_read`'s comment records as
+    // having taken it from 262 ms/token to 8.9.  The threshold below is where warp-per-row has enough rows to
+    // fill the machine: 8 warps per block, so 64 rows is 8 blocks and 128 is 16, against 48 SMs.
+    if (n_out >= 64) {
+        const int warps = THREADS / 32;
+        const unsigned grid = (unsigned) ((n_out + warps - 1) / warps);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class bf16_gemv_warp_kernel_1fb910>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            bf16_gemv_warp_kernel(x, w, y, n_in, n_out);
+                        });
+        }
+        finish(stream, "bf16_gemv(warp)");
+        return;
+    }
+    // Below the threshold the warp kernel would leave most of the machine idle, and the naive one is at least
+    // not wasting warps.  It is still uncoalesced, so this is the branch to revisit if a small-output caller
+    // ever shows up hot in the profile.
+    const unsigned grid = (unsigned) ((n_out + THREADS - 1) / THREADS);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class bf16_gemv_naive_kernel_7678d1>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    bf16_gemv_naive_kernel(x, w, y, n_in, n_out);
+                });
+    }
+    finish(stream, "bf16_gemv");
+}
+
+void bf16_gemv_split(const uint16_t* x, const uint16_t* w, float* y, int64_t n_in, int64_t n_out,
+                     int threads_per_row, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    // WARP-PER-ROW when the caller asks for 32, because that path needs no shared memory and no barrier - and
+    // with 48 output rows it is the configuration that fills the machine.  A `tpr` that is not 32 and not a
+    // power of two is refused rather than quietly rounded, because the tree reduction below needs one.
+    if (threads_per_row == 32) {
+        const int warps = THREADS / 32;
+        const unsigned grid = (unsigned) ((n_out + warps - 1) / warps);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class bf16_gemv_warp_kernel_1f3015>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            bf16_gemv_warp_kernel(x, w, y, n_in, n_out);
+                        });
+        }
+        finish(stream, "bf16_gemv_split(warp)");
+        return;
+    }
+    if (threads_per_row <= 0 || (threads_per_row & (threads_per_row - 1)) != 0) {
+        std::fprintf(stderr, "bf16_gemv_split: threads_per_row %d must be a power of two (32 selects the "
+                             "warp-per-row path)\n", threads_per_row);
+        std::exit(1);
+    }
+    const unsigned grid = (unsigned) n_out;
+    /*
+    DPCT1049:173: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                /*
+                DPCT1083:1164: The size of local memory in the migrated code may
+                be different from the original code. Check that the allocated
+                memory size in the migrated code is correct.
+                */
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range((size_t)threads_per_row * sizeof(float)), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class bf16_gemv_split_kernel_adfacf>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, threads_per_row),
+                                      sycl::range(1, 1, threads_per_row)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        bf16_gemv_split_kernel(
+                            x, w, y, n_in, n_out, threads_per_row,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    finish(stream, "bf16_gemv_split");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/cvec.dp.cpp b/sycl/src/kernels/cuda/cvec.dp.cpp
new file mode 100644
index 00000000000..346f0e78fd4
--- /dev/null
+++ b/sycl/src/kernels/cuda/cvec.dp.cpp
@@ -0,0 +1,302 @@
+// src/kernels/cuda/cvec.cu - see include/strata/kernels/cvec.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/cvec.hpp"
+
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 256;
+constexpr int MAXK = 16;   // n_embd up to 4096, held in registers between the dot and the update
+
+Cvec g_cvec;                 // the description; its device pointers are the uploading device's
+bool g_on_host = false;
+// the tables on every device that holds them (a layer split applies the vector on several)
+constexpr int kDevices = 64;
+struct DevTables { float* dir = nullptr; float* s = nullptr; int* on = nullptr; };
+DevTables g_dev[kDevices];
+std::vector<float> g_dir_host, g_s_host;
+int cur_device() try {
+    int d = 0;
+    if (DPCT_CHECK_ERROR(d = dpct::get_current_device_id()) != 0 || d < 0 ||
+        d >= kDevices) d = 0;
+    return d;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+bool upload_here(std::string &err) try {
+    DevTables& t = g_dev[cur_device()];
+    if (t.dir != nullptr) return true;
+    const int flag = g_on_host ? 1 : 0;
+    if (DPCT_CHECK_ERROR(t.dir = sycl::malloc_device<float>(
+                             g_dir_host.size(), dpct::get_in_order_queue())) !=
+            0 ||
+        DPCT_CHECK_ERROR(t.s = sycl::malloc_device<float>(
+                             g_s_host.size(), dpct::get_in_order_queue())) !=
+            0 ||
+        DPCT_CHECK_ERROR(t.on = sycl::malloc_device<int>(
+                             1, dpct::get_in_order_queue())) != 0 ||
+        /*
+        DPCT1114:507: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            t.dir, g_dir_host.data(), g_dir_host.size() * sizeof(float))) !=
+            0 ||
+        /*
+        DPCT1114:508: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            t.s, g_s_host.data(), g_s_host.size() * sizeof(float))) != 0 ||
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memcpy(t.on, &flag, sizeof(int))
+                             .wait()) != 0) {
+        err = "control vector: device allocation failed";
+        t = DevTables{};
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// the fused hyper-connection read's gate (fused_gr.cu), so a write done here is bitwise the one it would have folded
+__dpct_inline__ float sigmoidf_(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+
+// one block per (stream, token): the pending write, then h . v over the stream, then the update
+/*
+DPCT1110:95: The total declared local variable size in device function
+cvec_kernel exceeds 128 bytes and may cause high register pressure. Consult with
+your hardware vendor to find the total register size available and adjust the
+code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+cvec_kernel(float *__restrict__ R, const float *__restrict__ dir,
+            const float *__restrict__ s_l, const int *__restrict__ on, int mode,
+            int64_t layer, int n, int hc, int64_t r_ld,
+            const float *__restrict__ bo, int64_t bo_ld,
+            const float *__restrict__ inj, int64_t inj_ld, int write) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2);
+    const int64_t t = item_ct1.get_group(1);
+    float* r = R + t * r_ld + (int64_t) c * n;
+    const float s = s_l[layer];
+    const bool steer = *on != 0 && s != 0.0f;   // uniform over the block
+    if (!steer && !write) return;
+    const float* v = dir + layer * n;
+    const float w = write ? 2.0f * sigmoidf_(inj[t * inj_ld + c] / (float) hc) : 0.0f;
+    const float* b = write ? bo + t * bo_ld : nullptr;
+    float x[MAXK];
+    float dot = 0.0f;
+#pragma unroll
+    for (int k = 0; k < MAXK; ++k) {
+        const int d = item_ct1.get_local_id(2) + k * THREADS;
+        if (d < n) {
+            float xv = r[d];
+            if (write) xv = sycl::fma((float)(b[d]), (float)w, xv);
+            x[k] = xv;
+            if (steer && mode == 0) dot = sycl::fma(xv, (float)(v[d]), dot);
+        }
+    }
+    if (steer && mode == 0) {
+        auto &part = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+            float[THREADS / 32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+#pragma unroll
+        /*
+        DPCT1108:98: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        for (int o = 16; o > 0; o >>= 1) dot +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                dot, o);
+        if ((item_ct1.get_local_id(2) & 31) == 0)
+            part[item_ct1.get_local_id(2) >> 5] = dot;
+        /*
+        DPCT1118:96: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:509: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (item_ct1.get_local_id(2) < 32) {
+            float p = item_ct1.get_local_id(2) < THREADS / 32
+                          ? part[item_ct1.get_local_id(2)]
+                          : 0.0f;
+#pragma unroll
+            /*
+            DPCT1108:99: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 16; o > 0; o >>= 1) p +=
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), p, o);
+            if (item_ct1.get_local_id(2) == 0) part[0] = p;
+        }
+        /*
+        DPCT1118:97: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:510: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        dot = part[0] * s;   // s (h . v)
+    }
+#pragma unroll
+    for (int k = 0; k < MAXK; ++k) {
+        const int d = item_ct1.get_local_id(2) + k * THREADS;
+        if (d < n) {
+            float xv = x[k];
+            if (steer) xv =
+                mode == 0 ? sycl::fma(-dot, (float)(v[d]), xv) : xv + v[d];
+            r[d] = xv;
+        }
+    }
+}
+
+}  // namespace
+
+const Cvec& cvec() { return g_cvec; }
+
+bool cvec_upload(const std::vector<float>& dir, const std::vector<float>& s, int mode, int first, int last,
+                 int64_t n_embd, int64_t hc, std::string& err) {
+    if (n_embd < 1 || n_embd > (int64_t) THREADS * MAXK) { err = "control vector: unsupported n_embd"; return false; }
+    if (s.empty() || dir.size() != s.size() * (size_t) n_embd) { err = "control vector: bad table sizes"; return false; }
+    int prev = 0;   // a new vector replaces the old one on every device
+    prev = dpct::get_current_device_id();
+    for (int d = 0; d < kDevices; ++d) {
+        if (g_dev[d].dir == nullptr) continue;
+        /*
+        DPCT1093:512: The "d" device may be not the one intended for use. Adjust
+        the selected device if needed.
+        */
+        dpct::select_device(d);
+        dpct::get_current_device().queues_wait_and_throw();
+        sycl::free(g_dev[d].dir, dpct::get_in_order_queue());
+        sycl::free(g_dev[d].s, dpct::get_in_order_queue());
+        sycl::free(g_dev[d].on, dpct::get_in_order_queue());
+        g_dev[d] = DevTables{};
+    }
+    /*
+    DPCT1093:511: The "prev" device may be not the one intended for use. Adjust
+    the selected device if needed.
+    */
+    dpct::select_device(prev);
+    g_dir_host = dir;
+    g_s_host = s;
+    g_on_host = true;
+    if (!upload_here(err)) return false;
+    const DevTables& t = g_dev[cur_device()];
+    g_cvec.dir = t.dir;
+    g_cvec.s = t.s;
+    g_cvec.on = t.on;
+    g_cvec.mode = mode;
+    g_cvec.first = first;
+    g_cvec.last = last;
+    g_cvec.n_embd = n_embd;
+    g_cvec.hc = hc;
+    g_cvec.steered.assign(s.size(), false);
+    for (size_t l = 0; l < s.size(); ++l) g_cvec.steered[l] = s[l] != 0.0f;
+    return true;
+}
+
+bool cvec_replicate(std::string& err) { return !g_cvec.loaded() || upload_here(err); }
+
+void cvec_set_enabled(bool on) {
+    if (!g_cvec.loaded() || on == g_on_host) return;
+    int prev = 0;
+    prev = dpct::get_current_device_id();
+    const int v = on ? 1 : 0;
+    for (int d = 0; d < kDevices; ++d) {
+        if (g_dev[d].on == nullptr) continue;
+        /*
+        DPCT1093:514: The "d" device may be not the one intended for use. Adjust
+        the selected device if needed.
+        */
+        dpct::select_device(d);
+        dpct::get_current_device()
+            .queues_wait_and_throw(); // nothing in flight may still read the
+                                      // flag
+        dpct::get_in_order_queue().memcpy(g_dev[d].on, &v, sizeof(int)).wait();
+    }
+    /*
+    DPCT1093:513: The "prev" device may be not the one intended for use. Adjust
+    the selected device if needed.
+    */
+    dpct::select_device(prev);
+    g_on_host = on;
+}
+
+bool cvec_enabled() { return g_cvec.loaded() && g_on_host; }
+
+void cvec_apply(float *R, int64_t layer, int64_t T, int64_t r_ld,
+                const float *bo, int64_t bo_ld, const float *inj,
+                int64_t inj_ld, bool write, void *stream) try {
+    if (!g_cvec.loaded() || T < 1) return;
+    const DevTables& t = g_dev[cur_device()];
+    if (t.dir == nullptr) throw std::runtime_error("cvec_apply: the control vector is not on this device (cvec_replicate)");
+    const dpct::dim3 grid((unsigned)g_cvec.hc, (unsigned)T);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto g_cvec_mode_ct4 = g_cvec.mode;
+                auto g_cvec_n_embd_ct6 = (int)g_cvec.n_embd;
+                auto g_cvec_hc_ct7 = (int)g_cvec.hc;
+
+                cgh.parallel_for<dpct_kernel_name<class cvec_kernel_a17328>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            cvec_kernel(R, t.dir, t.s, t.on, g_cvec_mode_ct4,
+                                        layer, g_cvec_n_embd_ct6, g_cvec_hc_ct7,
+                                        r_ld, bo, bo_ld, inj, inj_ld,
+                                        write ? 1 : 0);
+                        });
+            });
+    }
+    /*
+    DPCT1010:515: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaPeekAtLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    if (0 != 0) throw std::runtime_error("cvec_apply: launch failed");
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
new file mode 100644
index 00000000000..bfdb54fc2c0
--- /dev/null
+++ b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
@@ -0,0 +1,302 @@
+// src/kernels/cuda/dequant_bf16.cu - see include/strata/kernels/dequant_bf16.hpp.
+//
+// Arithmetic transcribed from ggml/src/ggml-quants.c at the pinned llama.cpp (MIT License, Copyright (c) 2023-2026
+// The ggml authors): dequantize_row_q2_0/q4_0/q5_0/q8_0/q3_K/q4_K/q5_K/q6_K/iq4_nl/iq4_xs.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/dequant_bf16.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+__dpct_inline__ float h2f(const uint8_t *p) {
+    return sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(
+                                        (uint16_t)(p[0] | (p[1] << 8))))
+        .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+__dpct_inline__ uint16_t f2bf(float f) {
+    uint32_t u = sycl::bit_cast<unsigned int>(f);
+    u += 0x7fffu + ((u >> 16) & 1u);          // round to nearest even
+    return (uint16_t) (u >> 16);
+}
+__dpct_inline__ void put(uint16_t *o, int i, float v) { o[i] = f2bf(v); }
+struct H16 { uint16_t v; };
+__dpct_inline__ void put(H16 *o, int i, float v) {
+    o[i].v = sycl::bit_cast<unsigned short, sycl::half>(
+        sycl::vec<float, 1>(v)
+            .convert<sycl::half, sycl::rounding_mode::rte>()[0]);
+}
+__dpct_inline__ void put(float *o, int i, float v) { o[i] = v; }
+
+const int8_t kv_iq4nl[16] = {-127, -104, -83, -65, -49, -35, -22, -10,
+                             1,    13,   25,  38,  53,  69,  89,  113};
+
+__dpct_inline__ void scale_min_k4(int j, const uint8_t *q, int &d, int &m) {
+    if (j < 4) { d = q[j] & 63; m = q[j + 4] & 63; }
+    else { d = (q[j + 4] & 0xF) | ((q[j - 4] >> 6) << 4); m = (q[j + 4] >> 4) | ((q[j] >> 6) << 4); }
+}
+
+// One 32-element group `g` (row-major over the whole slice); `out` points at that group's 32 outputs.
+template <int TYPE, typename T>
+/*
+DPCT1110:176: The total declared local variable size in device function group32
+exceeds 128 bytes and may cause high register pressure. Consult with your
+hardware vendor to find the total register size available and adjust the code,
+or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void group32(const uint8_t *row_blocks, int gi_in_row, T *out) {
+    if constexpr (TYPE == 42) {                                   // Q2_0: 64 per block of 18 B
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 2) * 18;
+        const float d = h2f(b);
+        const int e0 = (gi_in_row % 2) * 32;
+#pragma unroll
+        for (int j = 0; j < 32; ++j) {
+            const int e = e0 + j;
+            const int q = (b[2 + e / 4] >> ((e % 4) * 2)) & 3;
+            put(out, j, (float) (q - 1) * d);
+        }
+    } else if constexpr (TYPE == 2) {                              // Q4_0
+        const uint8_t* b = row_blocks + (size_t) gi_in_row * 18;
+        const float d = h2f(b);
+#pragma unroll
+        for (int j = 0; j < 16; ++j) {
+            put(out, j, (float) ((b[2 + j] & 0x0F) - 8) * d);
+            put(out, j + 16, (float) ((b[2 + j] >> 4) - 8) * d);
+        }
+    } else if constexpr (TYPE == 6) {                              // Q5_0
+        const uint8_t* b = row_blocks + (size_t) gi_in_row * 22;
+        const float d = h2f(b);
+        const uint32_t qh = (uint32_t) b[2] | ((uint32_t) b[3] << 8) | ((uint32_t) b[4] << 16) | ((uint32_t) b[5] << 24);
+        for (int j = 0; j < 16; ++j) {
+            const int xh0 = ((qh >> j) << 4) & 0x10;
+            const int xh1 = (qh >> (j + 12)) & 0x10;
+            put(out, j, (float) (((b[6 + j] & 0x0F) | xh0) - 16) * d);
+            put(out, j + 16, (float) (((b[6 + j] >> 4) | xh1) - 16) * d);
+        }
+    } else if constexpr (TYPE == 8) {                              // Q8_0
+        const uint8_t* b = row_blocks + (size_t) gi_in_row * 34;
+        const float d = h2f(b);
+#pragma unroll
+        for (int j = 0; j < 32; ++j) put(out, j, (float)(int8_t)b[2 + j] * d);
+    } else if constexpr (TYPE == 20) {                             // IQ4_NL
+        const uint8_t* b = row_blocks + (size_t) gi_in_row * 18;
+        const float d = h2f(b);
+#pragma unroll
+        for (int j = 0; j < 16; ++j) {
+            put(out, j, d * (float) kv_iq4nl[b[2 + j] & 0xf]);
+            put(out, j + 16, d * (float) kv_iq4nl[b[2 + j] >> 4]);
+        }
+    } else if constexpr (TYPE == 11) {                             // Q3_K: hmask[32] qs[64] scales[12] d
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 8) * 110;
+        const int gi = gi_in_row % 8, n = gi / 4, jj = gi % 4;
+        const uint8_t* hm = b;
+        const uint8_t* q = b + 32 + n * 32;
+        const uint8_t* sc = b + 96;
+        const float d_all = h2f(b + 108);
+        uint32_t aux[4];
+        memcpy(aux, sc, 12);
+        const uint32_t kmask1 = 0x03030303u, kmask2 = 0x0f0f0f0fu, tmp = aux[2];
+        aux[2] = ((aux[0] >> 4) & kmask2) | (((tmp >> 4) & kmask1) << 4);
+        aux[3] = ((aux[1] >> 4) & kmask2) | (((tmp >> 6) & kmask1) << 4);
+        aux[0] = (aux[0] & kmask2) | (((tmp >> 0) & kmask1) << 4);
+        aux[1] = (aux[1] & kmask2) | (((tmp >> 2) & kmask1) << 4);
+        const int8_t* scales = reinterpret_cast<const int8_t*>(aux);
+        const int shift = 2 * jj;
+        const uint8_t m = (uint8_t) (1u << (n * 4 + jj));
+        for (int t = 0; t < 32; ++t) {
+            const int is = n * 8 + jj * 2 + (t >= 16 ? 1 : 0);
+            const float dl = d_all * (float) (scales[is] - 32);
+            put(out, t, dl * (float) ((int) ((q[t] >> shift) & 3) - ((hm[t] & m) ? 0 : 4)));
+        }
+    } else if constexpr (TYPE == 12) {                             // Q4_K: d dmin scales[12] qs[128]
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 8) * 144;
+        const int gi = gi_in_row % 8, j64 = gi / 2, hi = gi % 2;
+        const float d = h2f(b), dmin = h2f(b + 2);
+        int sc, m;
+        scale_min_k4(gi, b + 4, sc, m);
+        const float d1 = d * (float) sc, m1 = dmin * (float) m;
+        const uint8_t* q = b + 16 + 32 * j64;
+#pragma unroll
+        for (int l = 0; l < 32; ++l)
+            put(out, l, d1 * (float)(hi ? (q[l] >> 4) : (q[l] & 0xF)) - m1);
+    } else if constexpr (TYPE == 13) {                             // Q5_K: d dmin scales[12] qh[32] qs[128]
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 8) * 176;
+        const int gi = gi_in_row % 8, j64 = gi / 2, hi = gi % 2;
+        const float d = h2f(b), dmin = h2f(b + 2);
+        int sc, m;
+        scale_min_k4(gi, b + 4, sc, m);
+        const float d1 = d * (float) sc, m1 = dmin * (float) m;
+        const uint8_t* qh = b + 16;
+        const uint8_t* ql = b + 48 + 32 * j64;
+        const uint8_t u = (uint8_t) (1u << (2 * j64 + hi));
+        for (int l = 0; l < 32; ++l) {
+            const int nib = hi ? (ql[l] >> 4) : (ql[l] & 0xF);
+            put(out, l, d1 * (float) (nib + ((qh[l] & u) ? 16 : 0)) - m1);
+        }
+    } else if constexpr (TYPE == 14) {                             // Q6_K: ql[128] qh[64] scales[16] d
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 8) * 210;
+        const int gi = gi_in_row % 8, n = gi / 4, qu = gi % 4;
+        const uint8_t* ql = b + 64 * n;
+        const uint8_t* qh = b + 128 + 32 * n;
+        const int8_t* sc = reinterpret_cast<const int8_t*>(b + 192) + 8 * n;
+        const float d = h2f(b + 208);
+        for (int l = 0; l < 32; ++l) {
+            const int is = l / 16;
+            int q;
+            if (qu == 0) q = (ql[l] & 0xF) | (((qh[l] >> 0) & 3) << 4);
+            else if (qu == 1) q = (ql[l + 32] & 0xF) | (((qh[l] >> 2) & 3) << 4);
+            else if (qu == 2) q = (ql[l] >> 4) | (((qh[l] >> 4) & 3) << 4);
+            else q = (ql[l + 32] >> 4) | (((qh[l] >> 6) & 3) << 4);
+            put(out, l, d * (float) sc[is + 2 * qu] * (float) (q - 32));
+        }
+    } else if constexpr (TYPE == 23) {                             // IQ4_XS: d scales_h scales_l[4] qs[128]
+        const uint8_t* b = row_blocks + (size_t) (gi_in_row / 8) * 136;
+        const int ib = gi_in_row % 8;
+        const float d = h2f(b);
+        const uint16_t scales_h = (uint16_t) (b[2] | (b[3] << 8));
+        const int ls = ((b[4 + ib / 2] >> (4 * (ib % 2))) & 0xf) | (((scales_h >> (2 * ib)) & 3) << 4);
+        const float dl = d * (float) (ls - 32);
+        const uint8_t* qs = b + 8 + 16 * ib;
+#pragma unroll
+        for (int j = 0; j < 16; ++j) {
+            put(out, j, dl * (float) kv_iq4nl[qs[j] & 0xf]);
+            put(out, j + 16, dl * (float) kv_iq4nl[qs[j] >> 4]);
+        }
+    }
+}
+
+template <int TYPE, typename T>
+__dpct_inline__ void dequant_kernel(const uint8_t *__restrict__ blocks,
+                                    int64_t row_bytes, int64_t row0,
+                                    int64_t rows, int64_t groups_per_row,
+                                    T *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t g =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (g >= rows * groups_per_row) return;
+    const int64_t r = g / groups_per_row, gi = g % groups_per_row;
+    group32<TYPE>(blocks + (row0 + r) * row_bytes, (int) gi, out + r * groups_per_row * 32 + gi * 32);
+}
+
+bool geometry(int type, int& block_elems, int& block_bytes) {
+    switch (type) {
+    case 2: block_elems = 32; block_bytes = 18; return true;
+    case 6: block_elems = 32; block_bytes = 22; return true;
+    case 8: block_elems = 32; block_bytes = 34; return true;
+    case 20: block_elems = 32; block_bytes = 18; return true;
+    case 11: block_elems = 256; block_bytes = 110; return true;
+    case 12: block_elems = 256; block_bytes = 144; return true;
+    case 13: block_elems = 256; block_bytes = 176; return true;
+    case 14: block_elems = 256; block_bytes = 210; return true;
+    case 23: block_elems = 256; block_bytes = 136; return true;
+    case 42: block_elems = 64; block_bytes = 18; return true;
+    default: return false;
+    }
+}
+
+template <typename T>
+void launch(int type, const void* blocks, int64_t row0, int64_t rows, int64_t cols, T* out, void* stream) {
+    int be = 0, bb = 0;
+    if (!geometry(type, be, bb) || cols % be != 0 || rows <= 0) {
+        std::fprintf(stderr, "dequant: unsupported type %d or shape %lld x %lld\n", type, (long long) rows,
+                     (long long) cols);
+        std::exit(1);
+    }
+    const int64_t row_bytes = cols / be * bb, gpr = cols / 32, total = rows * gpr;
+    const unsigned grid = (unsigned) ((total + 255) / 256);
+    const uint8_t* p = (const uint8_t*) blocks;
+    dpct::queue_ptr st = strata::q_of(stream);
+#define STRATA_DQ(TY)                                                          \
+    {                                                                          \
+        auto exp_props = sycl::ext::oneapi::experimental::properties{          \
+            sycl::ext::oneapi::experimental::use_root_sync};                   \
+                                                                               \
+        st->submit([&](sycl::handler &cgh) {                                   \
+            auto p_ct0 = p;                                                    \
+            auto row_bytes_ct1 = row_bytes;                                    \
+            auto row0_ct2 = row0;                                              \
+            auto rows_ct3 = rows;                                              \
+            auto gpr_ct4 = gpr;                                                \
+            auto out_ct5 = out;                                                \
+                                                                               \
+            cgh.parallel_for<dpct_kernel_name<class dequant_kernel_c70bbf,     \
+                                              dpct_kernel_scalar<TY>, T>>(     \
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *                    \
+                                      sycl::range(1, 1, 256),                  \
+                                  sycl::range(1, 1, 256)),                     \
+                exp_props, [=](sycl::nd_item<3> item_ct1) {                    \
+                    dequant_kernel<TY, T>(p_ct0, row_bytes_ct1, row0_ct2,      \
+                                          rows_ct3, gpr_ct4, out_ct5);         \
+                });                                                            \
+        });                                                                    \
+    } break
+    switch (type) {
+    case 2: STRATA_DQ(2);
+    case 6: STRATA_DQ(6);
+    case 8: STRATA_DQ(8);
+    case 11: STRATA_DQ(11);
+    case 12: STRATA_DQ(12);
+    case 13: STRATA_DQ(13);
+    case 14: STRATA_DQ(14);
+    case 20: STRATA_DQ(20);
+    case 23: STRATA_DQ(23);
+    case 42: STRATA_DQ(42);
+    }
+#undef STRATA_DQ
+    /*
+    DPCT1010:854: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:855: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+}  // namespace
+
+bool dequant_bf16_supported(int ggml_type) noexcept {
+    int a, b;
+    return geometry(ggml_type, a, b);
+}
+
+namespace {
+// plan v0.3 P6: the i-quant formats (llama.cpp's dequantizers, iq_kernels.cu)
+bool iq_only(int t) { return t == 16 || t == 17 || t == 18 || t == 21 || t == 22 || t == 29; }
+}  // namespace
+
+void dequant_bf16(int ggml_type, const void* blocks, int64_t row0, int64_t rows, int64_t cols, uint16_t* out,
+                  void* stream) {
+    launch<uint16_t>(ggml_type, blocks, row0, rows, cols, out, stream);
+}
+
+void dequant_f16(int ggml_type, const void* blocks, int64_t row0, int64_t rows, int64_t cols, uint16_t* out,
+                 void* stream) {
+    if (iq_only(ggml_type)) {
+        iq_dequant_f16(ggml_type, (const uint8_t*) blocks + (size_t) row0 * iq_row_bytes(ggml_type, cols), rows * cols,
+                       out, stream);
+        return;
+    }
+    launch<H16>(ggml_type, blocks, row0, rows, cols, reinterpret_cast<H16*>(out), stream);
+}
+
+void dequant_f32(int ggml_type, const void* blocks, int64_t row0, int64_t rows, int64_t cols, float* out, void* stream) {
+    if (iq_only(ggml_type)) {
+        iq_dequant_f32(ggml_type, (const uint8_t*) blocks + (size_t) row0 * iq_row_bytes(ggml_type, cols), rows * cols,
+                       out, stream);
+        return;
+    }
+    launch<float>(ggml_type, blocks, row0, rows, cols, out, stream);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/dequant_s2.dp.cpp b/sycl/src/kernels/cuda/dequant_s2.dp.cpp
new file mode 100644
index 00000000000..787a0339b5c
--- /dev/null
+++ b/sycl/src/kernels/cuda/dequant_s2.dp.cpp
@@ -0,0 +1,72 @@
+// src/kernels/cuda/dequant_s2.cu - P2.S2's first naive kernel.
+//
+// S2 is Q2_0's canonical form and 31.64 GiB of the artifact is Q2_0, so this is the single hottest decode in
+// the engine.  The canonical plane layout is `docs/pack-format.md`'s: codes packed 4 per byte LSB-first
+// (element i at byte i/4, bits (i%4)*2 - Q2_0's own convention, kept for every form) and one FP32 scale per
+// group (64 elements for S2).  The decode is `(code + code_bias) * scale` with `code_bias = -1`, the
+// subtraction inside the INTEGER domain, which is what makes it bit-exact (docs/pack-format.md §3.1).
+//
+// Naive on purpose: one thread per block, no vectors, no shared memory, no unrolling.  Phase 3 changes this
+// file and the parity test in src/kernels/dequant_s2_parity.cpp is what says whether a change is still right.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/dequant_s2.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK = 64;             // S2 group = Q2_0 block = 64 elements
+constexpr int CODES_PER_BYTE = 4;
+
+__dpct_inline__ void dequant_s2_kernel(const uint8_t *__restrict__ codes,
+                                       const float *__restrict__ scales,
+                                       float *__restrict__ out,
+                                       long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const float d = scales[b];
+    const uint8_t* c = codes + b * (QK / CODES_PER_BYTE);
+    float* y = out + b * QK;
+    for (int j = 0; j < QK; ++j) {
+        const int code = (c[j / CODES_PER_BYTE] >> ((j % CODES_PER_BYTE) * 2)) & 0x03;
+        y[j] = (float)(code - 1) * d;      // the -1 is applied to the CODE, then ONE multiply
+    }
+}
+
+}  // namespace
+
+void dequant_s2(const uint8_t *codes, const float *scales, float *out,
+                int64_t n_blocks) try {
+    if (n_blocks <= 0) return;
+    const int threads = 256;
+    const long long blocks = (n_blocks + threads - 1) / threads;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        dpct::get_in_order_queue()
+            .parallel_for<dpct_kernel_name<class dequant_s2_kernel_bdb833>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    dequant_s2_kernel(codes, scales, out, n_blocks);
+                });
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
new file mode 100644
index 00000000000..6cc4f490173
--- /dev/null
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -0,0 +1,658 @@
+// src/kernels/cuda/elementwise.cu - P2.S5's glue kernels.  See the header for why each exists.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/elementwise.hpp"
+
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <time.h>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 256;
+
+__dpct_inline__ void embedding_gather_kernel(const uint8_t *__restrict__ codes,
+                                             const float *__restrict__ scales,
+                                             const float *__restrict__ offsets,
+                                             int64_t n, int code_bits,
+                                             int code_bias, int group_elems,
+                                             float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const int per_byte = 8 / code_bits;
+    const unsigned mask = (1u << code_bits) - 1u;
+    const int code = (codes[i / per_byte] >> ((i % per_byte) * code_bits)) & mask;
+    const int64_t group = i / group_elems;
+    /*
+    DPCT1013:1056: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const float product = (float)(code + code_bias) * scales[group];
+    /*
+    DPCT1013:1057: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    out[i] = product + (offsets ? offsets[group] : 0.0f);
+}
+
+/// `ggml_compute_softplus_f32`: `log1p(exp(x))`, with the large-x branch that avoids overflow.
+///
+/// The branch is not cosmetic. `exp(89)` overflows f32 and `exp(20)` is already 4.85e8 where `log1p` loses
+/// relative precision; above 20 the function is `x` to within f32 anyway.
+__dpct_inline__ float softplus_dev(float x) {
+    return x > 20.0f ? x : sycl::log1p(sycl::native::exp(x));
+}
+
+__dpct_inline__ void gdn_gate_kernel(const float *__restrict__ alpha,
+                                     const float *__restrict__ dt,
+                                     const float *__restrict__ ssm_a,
+                                     float *__restrict__ gate, int64_t h_v) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= h_v) return;
+    const int64_t t = i / h_v;      // `n_tokens` is the leading dim; the real call has one token
+    const int64_t h = i % h_v;
+    gate[i] = softplus_dev(alpha[i] + dt[h]) * ssm_a[h];
+    (void) t;
+}
+
+__dpct_inline__ void scale_kernel(float *__restrict__ x, int64_t n, float s) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n) x[i] *= s;
+}
+
+// `dst[i] += src[i]`.  See the header: this is what lets R4's GPU half and CPU half run at the same
+// time and still add up to one `parts` buffer.
+__dpct_inline__ void add_kernel(float *__restrict__ dst,
+                                const float *__restrict__ src, long long n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n) dst[i] += src[i];
+}
+
+__dpct_inline__ void to_f16_kernel(const float *__restrict__ x,
+                                   uint16_t *__restrict__ y, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n) y[i] = f16_from_f32(x[i]);
+}
+
+__dpct_inline__ void to_bf16_kernel(const float *__restrict__ x,
+                                    uint16_t *__restrict__ y, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n) y[i] = bf16_from_f32(x[i]);
+}
+
+__dpct_inline__ void silu_kernel(float *__restrict__ x, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    // DOUBLE then cast, matching `ref/gdn.py`'s numpy: its arrays are f32 but `np.exp` on an f32 array is
+    // computed to f32 precision by a different algorithm than `expf`, and the reference is the oracle.  The
+    // difference is in the last bits and this is one line.
+    const double v = (double) x[i];
+    x[i] = (float)(v / (1.0 + sycl::exp(-v)));
+}
+
+/// A bounded launch: a zero-length grid is illegal, and `n == 0` is a real call (an empty selection).
+inline unsigned grid_for(int64_t n) { return (unsigned) ((n + THREADS - 1) / THREADS); }
+
+/// One WARP per row, reduced through shuffles.  The rows here are short and few - (24, 256), (2, 256),
+/// (4, 128) - so a block-per-row tree would spend its time in `__syncthreads` for 8 warps of 32, and the whole
+/// call is 30 rows.  A warp reduction with NO shared memory and NO barrier is the shape that fits.
+__dpct_inline__ void rms_norm_weighted_kernel(float *__restrict__ x,
+                                              const float *__restrict__ w,
+                                              int64_t rows, int64_t cols,
+                                              float eps) {
+
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const int64_t row =
+        ((int64_t)item_ct1.get_group(2) * (item_ct1.get_local_range(2) >> 5)) +
+        (item_ct1.get_local_id(2) >> 5);
+    // **THE ROW GUARD IS NOT DECORATION, AND ITS ABSENCE WAS THE QSA BUG.**  The launcher rounds the grid up to
+    // whole 4-warp blocks, so a call with `rows` = 2 - the QSA k-norm, the only non-multiple-of-4 row count in
+    // the engine - runs EIGHT warps: rows 0 and 1 are the data, and rows 2 and 3 write 2*cols floats PAST the
+    // end of `b.kcur`, which in the arena is exactly where `b.vcur` begins.  `b.vcur` was therefore silently
+    // replaced by two rows of `rms_norm(...) * attn_k_norm`: a normalized vector with l2 ~20.6 against V's
+    // ~5.7, which the attention then attended to.  `rope_neox_kernel` has had this guard all along.
+    if (row >= rows) return;
+    float* r = x + row * cols;
+    float acc = 0.0f;
+#pragma unroll
+    for (int64_t c = lane; c < cols; c += 32) acc += r[c] * r[c];
+    /*
+DPCT1108:275: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) acc +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, off);
+    // The MEAN, not the sum: `ref/qsa.py::rms_norm` divides by `np.mean(np.square(x))`.  Broadcasting the
+    // reciprocal from lane 0 keeps all 32 lanes on the same value - computing `rsqrt` per lane would be the
+    // same number but a needless 32-way divergence in the last bit.
+    float inv = 0.0f;
+    if (lane == 0) inv = sycl::rsqrt(acc / (float)cols + eps);
+    /*
+    DPCT1108:276: '__shfl_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    inv = dpct::experimental::select_from_sub_group(
+        0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), inv,
+        0);
+#pragma unroll
+    for (int64_t c = lane; c < cols; c += 32)
+        r[c] = (w ? r[c] * w[c] : r[c]) * inv;
+}
+
+void sync_if_needed(void *stream, const char *what) try {
+    if (stream != nullptr) return;
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool check_launch(const char* what) {
+    /*
+    DPCT1010:1059: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    return true;
+}
+
+}  // namespace
+
+void embedding_gather(const uint8_t* codes, const float* scales, const float* offsets,
+                      int64_t n, int code_bits, int code_bias, int group_elems,
+                      float* out, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class embedding_gather_kernel_40b387>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    embedding_gather_kernel(codes, scales, offsets, n,
+                                            code_bits, code_bias, group_elems,
+                                            out);
+                });
+    }
+    check_launch("embedding_gather");
+}
+
+void gdn_gate(const float* alpha, const float* dt, const float* ssm_a, float* gate, int64_t n_tokens,
+              int64_t h_v, void* stream) {
+    if (n_tokens <= 0 || h_v <= 0) return;
+    const int64_t n = n_tokens * h_v;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_gate_kernel_de22c0>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_gate_kernel(alpha, dt, ssm_a, gate, h_v);
+                });
+    }
+    check_launch("gdn_gate");
+    sync_if_needed(stream, "gdn_gate");
+}
+
+void scale_inplace(float* x, int64_t n, float s, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class scale_kernel_501571>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    scale_kernel(x, n, s);
+                });
+    }
+    check_launch("scale_inplace");
+    sync_if_needed(stream, "scale_inplace");
+}
+
+void add_inplace(float* dst, const float* src, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class add_kernel_95886e>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    add_kernel(dst, src, n);
+                });
+    }
+    check_launch("add_inplace");
+    sync_if_needed(stream, "add_inplace");
+}
+
+void f32_to_f16_bulk(const float* x, uint16_t* y, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class to_f16_kernel_ba0968>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    to_f16_kernel(x, y, n);
+                });
+    }
+    check_launch("f32_to_f16_bulk");
+    sync_if_needed(stream, "f32_to_f16_bulk");
+}
+
+void f32_to_bf16_bulk(const float* x, uint16_t* y, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_7b22d1>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    to_bf16_kernel(x, y, n);
+                });
+    }
+    check_launch("f32_to_bf16_bulk");
+    sync_if_needed(stream, "f32_to_bf16_bulk");
+}
+
+void silu_inplace(float* x, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class silu_kernel_4d1386>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n)) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    silu_kernel(x, n);
+                });
+    }
+    check_launch("silu_inplace");
+    sync_if_needed(stream, "silu_inplace");
+}
+
+/// THE DOORBELL.  One thread, one INCREMENT - the cost is the launch, and inside a graph that is paid once.
+///
+/// **IT INCREMENTS THE MEMORY, AND IT DOES NOT TAKE THE VALUE AS AN ARGUMENT.**  The first version did -
+/// doorbell_ring(d_seq, *(h_seq) + 1u) - and that is a CLONED LITERAL: the expression is evaluated on the HOST
+/// at CAPTURE time, so the graph rings 1 on every replay and a host waiting for a change waits forever.  It
+/// would have looked like a working doorbell on the first token, which is the worst way for it to be wrong.
+/// **THE FENCE IS NOT DECORATION, AND ITS ABSENCE WAS COSTING ~10 ms PER TOKEN ON THE HOST SIDE.**
+///
+/// The ring PUBLISHES three buffers the host is about to read - `h_x_f`, `h_ids`, `h_weights` - so the increment
+/// must be ordered after their writes, or the host can observe the ring and then read a payload that has not
+/// landed.  `__threadfence_system()` is what orders them, and it covers the HOST as well as the device, which is
+/// the whole point: the reader is the CPU.
+///
+/// Without it the host loop was compensating with a driver call.  `session_loop` polled with `cudaEventQuery`
+/// on EVERY spin iteration, because round 195 had measured that a memory-only spin never saw the datum flip -
+/// and that measurement was right about the symptom and wrong about the cause.  The cause is this missing fence:
+/// the write was not ordered into host-visible memory, so no amount of reading it would show it, and the driver
+/// call was flushing the whole pipeline enough to make it appear.  A 10-22 us driver call per iteration is a
+/// very expensive substitute for one fence instruction.
+__dpct_inline__ void doorbell_ring_kernel(uint32_t *seq) {
+    /*
+    DPCT1078:277: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+    *seq = *seq + 1u;
+}
+
+__dpct_inline__ void doorbell_wait_kernel(const volatile uint32_t *flag,
+                                          const volatile uint32_t *seq) {
+    const uint32_t want = *seq;
+    /*
+    DPCT1008:1061: __nanosleep function is not defined in SYCL. This is a
+    hardware-specific feature. Consult with your hardware vendor to find a
+    replacement.
+    */
+    while (*flag != want) /* spin (no __nanosleep on SYCL) */;
+    /*
+    DPCT1078:278: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+}
+
+void doorbell_wait(const uint32_t* d_flag, const uint32_t* d_seq, void* stream) {
+    if (d_flag == nullptr || d_seq == nullptr) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class doorbell_wait_kernel_47b360>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    doorbell_wait_kernel(d_flag, d_seq);
+                });
+    }
+    check_launch("doorbell_wait");
+}
+
+/*
+DPCT1052:1062: SYCL does not support the member access for a volatile qualified
+vector type. The volatile qualifier was removed. You may need to rewrite the
+code.
+*/
+__dpct_inline__ void copy_from_mapped_kernel(sycl::float4 *__restrict__ dst,
+                                             const sycl::float4 *src,
+                                             int64_t n4) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n4; i += (int64_t)item_ct1.get_group_range(2) *
+                      item_ct1.get_local_range(2)) {
+        const sycl::float4 v = const_cast<const sycl::float4 *>(src)[i];
+        dst[i] = v;
+    }
+}
+
+// the CPU rows of a verify window, skipping the rows the GPU plan computes itself (the
+// pool writes +0.0 into those, so this writes +0.0 too): block = row, the plan's hit rows `dst[0, *count)`.
+/*
+DPCT1052:1063: SYCL does not support the member access for a volatile qualified
+vector type. The volatile qualifier was removed. You may need to rewrite the
+code.
+*/
+__dpct_inline__ void copy_rows_from_mapped_kernel(
+    sycl::float4 *__restrict__ dst, const sycl::float4 *src, int64_t row4,
+    const int32_t *__restrict__ hit_rows, const int32_t *__restrict__ count) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2);
+    auto &hit = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) == 0) {
+        int h = 0;
+        const int c = *count;
+#pragma unroll
+        for (int i = 0; i < c; ++i) h |= hit_rows[i] == row;
+        hit = h;
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    sycl::float4 *d = dst + (int64_t)row * row4;
+    if (hit) {
+#pragma unroll
+        for (int64_t i = item_ct1.get_local_id(2); i < row4;
+             i += item_ct1.get_local_range(2))
+            d[i] = sycl::float4(0.0f, 0.0f, 0.0f, 0.0f);
+    } else {
+        /*
+        DPCT1052:1064: SYCL does not support the member access for a volatile
+        qualified vector type. The volatile qualifier was removed. You may need
+        to rewrite the code.
+        */
+        const sycl::float4 *sr = src + (int64_t)row * row4;
+#pragma unroll
+        for (int64_t i = item_ct1.get_local_id(2); i < row4;
+             i += item_ct1.get_local_range(2))
+            d[i] = const_cast<const sycl::float4 *>(sr)[i];
+    }
+}
+void copy_rows_from_mapped(float* dst, const float* src, int64_t rows, int64_t width, const int32_t* hit_rows,
+                           const int32_t* count, void* stream) {
+    if (rows <= 0) return;
+    if ((width & 3) != 0 || ((uintptr_t) dst & 15) != 0 || ((uintptr_t) src & 15) != 0) {
+        std::fprintf(stderr, "copy_rows_from_mapped: width must be a multiple of 4 and both pointers 16-byte aligned\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto width_ct2 = width / 4;
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class copy_rows_from_mapped_kernel_9530d4>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)rows) *
+                                          sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        copy_rows_from_mapped_kernel(
+                            (sycl::float4 *)dst,
+                            (const sycl::float4 *)src, width_ct2,
+                            hit_rows, count);
+                    });
+            });
+    }
+}
+void copy_from_mapped(float* dst, const float* src, int64_t n, void* stream) {
+    if (n <= 0) return;
+    if ((n & 3) != 0 || ((uintptr_t) dst & 15) != 0 || ((uintptr_t) src & 15) != 0) {
+        std::fprintf(stderr, "copy_from_mapped: n must be a multiple of 4 and both pointers 16-byte aligned\n");
+        std::exit(1);
+    }
+    const int64_t n4 = n / 4;
+    const int blocks = (int) ((n4 + 255) / 256 < 64 ? (n4 + 255) / 256 : 64);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class copy_from_mapped_kernel_82951a>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_from_mapped_kernel((sycl::float4 *)dst,
+                                            (const sycl::float4 *)src,
+                                            n4);
+                });
+    }
+    check_launch("copy_from_mapped");
+}
+
+__dpct_inline__ void doorbell_publish_kernel(const float *__restrict__ x,
+                                             const int32_t *__restrict__ ids,
+                                             const float *__restrict__ w, int n,
+                                             int k, float *x_out,
+                                             int32_t *ids_out, float *w_out,
+                                             uint32_t *seq) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n;
+         i += item_ct1.get_local_range(2)) x_out[i] = x[i];
+    if ((int)item_ct1.get_local_id(2) < k) {
+        ids_out[item_ct1.get_local_id(2)] = ids[item_ct1.get_local_id(2)];
+        w_out[item_ct1.get_local_id(2)] = w[item_ct1.get_local_id(2)];
+    }
+    /*
+    DPCT1078:279: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+    /*
+    DPCT1065:1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(2) == 0) {
+        /*
+        DPCT1078:280: Consider replacing memory_order::acq_rel with
+        memory_order::seq_cst for correctness if strong memory order
+        restrictions are needed.
+        */
+        sycl::atomic_fence(sycl::memory_order::acq_rel,
+                           sycl::memory_scope::system);
+        *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;
+    }
+}
+
+void doorbell_publish(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k, float* x_out,
+                      int32_t* ids_out, float* weights_out, uint32_t* d_seq, void* stream) {
+    if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }
+    /*
+    DPCT1049:281: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class doorbell_publish_kernel_8b5bad>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    doorbell_publish_kernel(x, ids, weights, (int)n, (int)k,
+                                            x_out, ids_out, weights_out, d_seq);
+                });
+    }
+    check_launch("doorbell_publish");
+}
+
+__dpct_inline__ void copy_i32_from_mapped_kernel(int32_t *__restrict__ dst,
+                                                 const volatile int32_t *src,
+                                                 int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n;
+         i += item_ct1.get_local_range(2)) dst[i] = src[i];
+}
+
+void copy_i32_from_mapped(int32_t* dst, const int32_t* src, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class copy_i32_from_mapped_kernel_a44acc>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_i32_from_mapped_kernel(
+                        dst, (const volatile int32_t *)src, (int)n);
+                });
+    }
+    check_launch("copy_i32_from_mapped");
+}
+
+void doorbell_ring(uint32_t* d_seq, void* stream) {
+    if (d_seq == nullptr) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class doorbell_ring_kernel_b862a4>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    doorbell_ring_kernel(d_seq);
+                });
+    }
+    check_launch("doorbell_ring");
+    sync_if_needed(stream, "doorbell_ring");
+}
+
+void rms_norm_weighted(float* x, const float* w, int64_t rows, int64_t cols, float eps, void* stream) {
+    if (rows <= 0 || cols <= 0) return;
+    // 4 warps per block, so a row count that is not a multiple of 4 wastes at most 3 warps rather than
+    // launching a block per row for a 2-row call.
+    const unsigned warps_per_block = 4;
+    const unsigned grid = (unsigned) ((rows + warps_per_block - 1) / warps_per_block);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class rms_norm_weighted_kernel_b603f5>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, warps_per_block * 32),
+                                  sycl::range(1, 1, warps_per_block * 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        rms_norm_weighted_kernel(x, w, rows, cols, eps);
+                    });
+    }
+    check_launch("rms_norm_weighted");
+    sync_if_needed(stream, "rms_norm_weighted");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/fused_gdn.dp.cpp b/sycl/src/kernels/cuda/fused_gdn.dp.cpp
new file mode 100644
index 00000000000..0e587e88e1a
--- /dev/null
+++ b/sycl/src/kernels/cuda/fused_gdn.dp.cpp
@@ -0,0 +1,341 @@
+// src/kernels/cuda/fused_gdn.cu - see include/strata/kernels/fused_gdn.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/fused_gdn.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int S = 128;          // state size (rows = cols = 128)
+constexpr int RG = 4;           // row groups
+constexpr int RPG = S / RG;     // 32 rows per thread
+
+/*
+DPCT1110:292: The total declared local variable size in device function
+gdn_step_norm_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gdn_step_norm_kernel(
+    float *__restrict__ state, const float *__restrict__ q,
+    const float *__restrict__ k, const float *__restrict__ v,
+    const float *__restrict__ gate, const float *__restrict__ beta,
+    const float *__restrict__ z, const float *__restrict__ gamma, float eps,
+    float *__restrict__ y, int h_k, int h_v) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sq = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &red =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[RG][S]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[S * RG / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int head = item_ct1.get_group(2);
+    const int col = item_ct1.get_local_id(2); // 0..127
+    const int rg = item_ct1.get_local_id(1);  // 0..3
+    const int tid = rg * S + col;
+    const int qh = head % h_k;
+    if (tid < S) { sk[tid] = k[qh * S + tid]; sq[tid] = q[qh * S + tid]; }
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * h_v + head) * S + col;
+    const size_t row_stride = (size_t) h_v * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * row_stride];
+    /*
+    DPCT1065:1151: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float g = sycl::native::exp(gate[head]);
+    float kv = 0.0f;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
+    red[rg][col] = kv;
+    /*
+    DPCT1065:1152: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float kv_col = red[0][col] + red[1][col] + red[2][col] + red[3][col];
+    const float delta = (v[head * S + col] - g * kv_col) * beta[head];
+    float o = 0.0f;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) {
+        s[r] = sycl::fma((float)g, s[r], sk[rg * RPG + r] * delta);
+        o = sycl::fma(s[r], sq[rg * RPG + r], o);
+        base[r * row_stride] = s[r];
+    }
+    /*
+    DPCT1065:1153: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier(); // every thread has read red[] for kv_col
+    red[rg][col] = o;
+    /*
+    DPCT1065:1154: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    float oc = 0.0f, sq_part = 0.0f;
+    if (rg == 0) {
+        oc = (red[0][col] + red[1][col] + red[2][col] + red[3][col]) *
+             sycl::rsqrt((float)S);
+        sq_part = oc * oc;
+    }
+    // RMS over the head's 128 outputs: warps of row group 0 are threads 0..127.
+    /*
+DPCT1108:293: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o2 = 16; o2 > 0; o2 >>= 1) sq_part +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            sq_part, o2);
+    if ((tid & 31) == 0) wsum[tid >> 5] = sq_part;
+    /*
+    DPCT1065:1155: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (rg == 0) {
+        const float ss = wsum[0] + wsum[1] + wsum[2] + wsum[3];
+        const float scale = sycl::rsqrt(ss / (float)S + eps);
+        const float zz = z[head * S + col];
+        y[head * S + col] =
+            oc * scale * gamma[col] * (1.0f / (1.0f + sycl::native::exp(-zz)));
+    }
+}
+
+__dpct_inline__ void gdn_conv_l2_kernel(float *__restrict__ hist,
+                                        const float *__restrict__ qkv,
+                                        const float *__restrict__ w,
+                                        float *__restrict__ h, int qk_heads,
+                                        float eps) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &part =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int c = item_ct1.get_group(2) * S + item_ct1.get_local_id(2);
+    const float v0 = hist[c * 3], v1 = hist[c * 3 + 1], v2 = hist[c * 3 + 2], x = qkv[c];
+    float sum = v0 * w[c * 4] + v1 * w[c * 4 + 1] + v2 * w[c * 4 + 2] + x * w[c * 4 + 3];
+    hist[c * 3] = v1;
+    hist[c * 3 + 1] = v2;
+    hist[c * 3 + 2] = x;
+    float y = sum / (1.0f + sycl::native::exp(-sum));
+    if ((int)item_ct1.get_group(2) < qk_heads) {
+        float sq = y * y;
+        /*
+DPCT1108:295: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+        for (int o = 16; o > 0; o >>= 1) sq +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                sq, o);
+        if ((item_ct1.get_local_id(2) & 31) == 0)
+            part[item_ct1.get_local_id(2) >> 5] = sq;
+        /*
+        DPCT1118:294: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:1156: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float ss = part[0] + part[1] + part[2] + part[3];
+        y *= sycl::rsqrt(ss + eps);
+    }
+    h[c] = y;
+}
+
+__dpct_inline__ void
+gdn_ab_kernel(const float *__restrict__ x, const uint16_t *__restrict__ wa,
+              const uint16_t *__restrict__ wb, const float *__restrict__ dt,
+              const float *__restrict__ ssm_a, float *__restrict__ gate,
+              float *__restrict__ beta, int n, int h_v) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2) * 8 + (item_ct1.get_local_id(2) >> 5),
+              lane = item_ct1.get_local_id(2) & 31;
+    if (row >= 2 * h_v) return;
+    const bool is_beta = row >= h_v;
+    const int r = is_beta ? row - h_v : row;
+    const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(
+        (is_beta ? wb : wa) + (size_t)r * n);
+    float acc = 0.0f;
+    for (int j = lane; j < n / 8; j += 32) {
+        /*
+        DPCT1098:1157: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wv = *(w4 + j);
+        const sycl::float4 xa =
+            *reinterpret_cast<const sycl::float4 *>(x + j * 8);
+        const sycl::float4 xb =
+            *reinterpret_cast<const sycl::float4 *>(x + j * 8 + 4);
+        acc = sycl::fma(sycl::bit_cast<float>(wv.x() << 16), (float)(xa.x()),
+                        acc);
+            acc = sycl::fma(sycl::bit_cast<float>(wv.x() & 0xffff0000u),
+                            (float)(xa.y()), acc);
+        acc = sycl::fma(sycl::bit_cast<float>(wv.y() << 16), (float)(xa.z()),
+                        acc);
+            acc = sycl::fma(sycl::bit_cast<float>(wv.y() & 0xffff0000u),
+                            (float)(xa.w()), acc);
+        acc = sycl::fma(sycl::bit_cast<float>(wv.z() << 16), (float)(xb.x()),
+                        acc);
+            acc = sycl::fma(sycl::bit_cast<float>(wv.z() & 0xffff0000u),
+                            (float)(xb.y()), acc);
+        acc = sycl::fma(sycl::bit_cast<float>(wv.w() << 16), (float)(xb.z()),
+                        acc);
+            acc = sycl::fma(sycl::bit_cast<float>(wv.w() & 0xffff0000u),
+                            (float)(xb.w()), acc);
+    }
+    /*
+DPCT1108:296: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) acc +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, o);
+    if (lane != 0) return;
+    if (is_beta) {
+        beta[r] = 1.0f / (1.0f + sycl::native::exp(-acc));
+    } else {
+        const float v = acc + dt[r];
+        const float sp = v > 20.0f ? v : sycl::log1p(sycl::native::exp(v));
+        gate[r] = sp * ssm_a[r];
+    }
+}
+
+}  // namespace
+
+void fused_gdn_conv_l2(float* history, const float* qkv, const float* conv_w, float* h, int channels, int qk_heads,
+                       float eps, void* stream) {
+    if (!history || !qkv || !conv_w || !h || channels % S != 0 || qk_heads < 0 || qk_heads > channels / S) {
+        std::fprintf(stderr, "fused_gdn_conv_l2: invalid arguments\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_conv_l2_kernel_44cd0c>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(channels / S)) *
+                                      sycl::range(1, 1, S),
+                                  sycl::range(1, 1, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_conv_l2_kernel(history, qkv, conv_w, h, qk_heads,
+                                           eps);
+                    });
+    }
+    /*
+    DPCT1010:1158: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:1159: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+void fused_gdn_ab(const float* x, const uint16_t* w_alpha, const uint16_t* w_beta, const float* dt, const float* ssm_a,
+                  float* gate, float* beta, int n_embd, int h_v, void* stream) {
+    if (!x || !w_alpha || !w_beta || !dt || !ssm_a || !gate || !beta || n_embd % 8 != 0 || h_v <= 0) {
+        std::fprintf(stderr, "fused_gdn_ab: invalid arguments\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_ab_kernel_c211b9>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((2 * h_v + 7) / 8)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_ab_kernel(x, w_alpha, w_beta, dt, ssm_a, gate, beta,
+                                      n_embd, h_v);
+                    });
+    }
+    /*
+    DPCT1010:1160: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:1161: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+void fused_gdn_step_norm(float* state, const float* q, const float* k, const float* v, const float* gate,
+                         const float* beta, const float* z, const float* gamma, float eps, float* y, int h_k, int h_v,
+                         void* stream) {
+    if (!state || !q || !k || !v || !gate || !beta || !z || !gamma || !y || h_k <= 0 || h_v <= 0 || h_v % h_k) {
+        std::fprintf(stderr, "fused_gdn_step_norm: invalid arguments\n");
+        std::exit(1);
+    }
+    /*
+    DPCT1049:297: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_step_norm_kernel_51bed3>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)h_v) *
+                                      sycl::range(1, RG, S),
+                                  sycl::range(1, RG, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_step_norm_kernel(state, q, k, v, gate, beta, z,
+                                             gamma, eps, y, h_k, h_v);
+                    });
+    }
+    /*
+    DPCT1010:1162: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
new file mode 100644
index 00000000000..431e90b5fa4
--- /dev/null
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -0,0 +1,633 @@
+// src/kernels/cuda/fused_gr.cu - see include/strata/kernels/fused_gr.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/fused_gr.hpp"
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int N = 2560;         // n_embd
+constexpr int HC = 4;           // streams
+constexpr int D = N * HC;       // 10240
+constexpr int LR = 320;         // hc_lr
+constexpr int THREADS = 256;
+constexpr int WARPS = THREADS / 32;
+constexpr int DOWN_BLOCKS = LR / WARPS;          // 40 blocks of 8 rows; one more for the inject rows
+constexpr int UP_COLS = 32;                      // columns d per `up` block (x 4 streams = 128 rows)
+constexpr int UP_BLOCKS = N / UP_COLS;           // 80
+
+__dpct_inline__ float warp_sum(float v) {
+#pragma unroll
+    /*
+    DPCT1108:88: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            o);
+    return v;
+}
+__dpct_inline__ float sigmoidf_(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+
+// 8 bf16 packed in a uint4 against 8 floats.
+__dpct_inline__ float dot8(const sycl::uint4 w, const float *x) {
+    float acc = 0.0f;
+    const uint32_t v[4] = {w.x(), w.y(), w.z(), w.w()};
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        acc = sycl::fma(sycl::bit_cast<float>(v[j] << 16), (float)(x[2 * j]),
+                        acc);
+        acc = sycl::fma(sycl::bit_cast<float>(v[j] & 0xffff0000u),
+                        (float)(x[2 * j + 1]), acc);
+    }
+    return acc;
+}
+
+/*
+DPCT1110:89: The total declared local variable size in device function
+gr_down_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_down_kernel(FusedGrArgs a) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &part =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS][HC]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_rs =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[HC]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    float gw[HC];
+#pragma unroll
+    for (int c = 0; c < HC; ++c) gw[c] = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+    // 1. R' * w_norm into shared memory, and the per-stream sums of squares of R'.
+    float ss[HC] = {0.0f, 0.0f, 0.0f, 0.0f};
+    for (int i = t * 4; i < D; i += THREADS * 4) {
+        const int c = i / N, d = i - c * N;
+        sycl::float4 r = *reinterpret_cast<const sycl::float4 *>(a.R + i);
+        if (a.apply) {
+            const sycl::float4 b =
+                *reinterpret_cast<const sycl::float4 *>(a.bo_prev + d);
+            r.x() = sycl::fma((float)(b.x()), gw[c], r.x());
+                r.y() = sycl::fma((float)(b.y()), gw[c], r.y());
+            r.z() = sycl::fma((float)(b.z()), gw[c], r.z());
+                r.w() = sycl::fma((float)(b.w()), gw[c], r.w());
+        }
+        const sycl::float4 g =
+            *reinterpret_cast<const sycl::float4 *>(a.w_norm + i);
+        float sq =
+            r.x() * r.x() + r.y() * r.y() + r.z() * r.z() + r.w() * r.w();
+#pragma unroll
+        for (int cc = 0; cc < HC; ++cc) if (cc == c) ss[cc] += sq;
+        *reinterpret_cast<sycl::float4 *>(xn + i) = sycl::float4(
+            r.x() * g.x(), r.y() * g.y(), r.z() * g.z(), r.w() * g.w());
+    }
+#pragma unroll
+    for (int c = 0; c < HC; ++c) {
+        const float v = warp_sum(ss[c]);
+        if (lane == 0) part[warp][c] = v;
+    }
+    /*
+    DPCT1065:457: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t < HC) {
+        float s = 0.0f;
+#pragma unroll
+        for (int w = 0; w < WARPS; ++w) s += part[w][t];
+        s_rs[t] = sycl::rsqrt(s / (float)N + a.eps);
+        if (item_ct1.get_group(2) == 0) a.rs[t] = s_rs[t];
+    }
+    /*
+    DPCT1065:458: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+#pragma unroll
+    for (int i = t; i < D; i += THREADS) xn[i] *= s_rs[i / N];
+    /*
+    DPCT1065:459: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // 2. one warp per output row: 10240 bf16 = 1280 chunks of 8, 40 per lane.
+    const bool inject_block = item_ct1.get_group(2) == DOWN_BLOCKS;
+    const int row = inject_block ? warp : item_ct1.get_group(2) * WARPS + warp;
+    if (inject_block && (a.w_inject == nullptr || warp >= HC)) return;
+    const uint16_t* wrow = (inject_block ? a.w_inject : a.w_down) + (size_t) row * D;
+    const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
+    float acc = 0.0f;
+#pragma unroll 4
+    /*
+    DPCT1098:460: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    for (int j = lane; j < D / 8; j += 32) acc += dot8(*(w4 + j), xn + j * 8);
+    acc = warp_sum(acc);
+    if (lane != 0) return;
+    if (inject_block) {
+        a.inject_out[row] = acc;
+    } else {
+        const float x = acc / (float) HC;
+        a.lo[row] = x / (1.0f + sycl::native::exp(-x));
+    }
+}
+
+__dpct_inline__ void gr_up_kernel(FusedGrArgs a) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[LR]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &g = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[HC][UP_COLS]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int d0 = item_ct1.get_group(2) * UP_COLS;
+#pragma unroll
+    for (int k = t; k < LR; k += THREADS) lo[k] = a.lo[k];
+    /*
+    DPCT1065:461: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // 128 rows (4 streams x 32 columns), 16 per warp: 320 bf16 = 40 chunks of 8.
+    for (int r = warp; r < HC * UP_COLS; r += WARPS) {
+        const int c = r / UP_COLS, dd = r - c * UP_COLS, i = c * N + d0 + dd;
+        const sycl::uint4 *w4 =
+            reinterpret_cast<const sycl::uint4 *>(a.w_up + (size_t)i * LR);
+        /*
+        DPCT1098:463: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        float acc = dot8(*(w4 + lane), lo + lane * 8);
+        /*
+        DPCT1098:464: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        if (lane < LR / 8 - 32) acc +=
+            dot8(*(w4 + 32 + lane), lo + (32 + lane) * 8);
+        acc = warp_sum(acc);
+        if (lane == 0) {
+            float rv = a.R[i];
+            if (a.apply) {
+                rv = sycl::fma((float)(a.bo_prev[d0 + dd]),
+                               2.0f * sigmoidf_(a.inj_prev[c] / (float)HC), rv);
+                a.R_out[i] = rv;                       // this block owns column d0+dd of every stream
+            }
+            const float x = rv * a.w_norm[i] * a.rs[c];
+            g[c][dd] = x * sigmoidf_(acc);
+        }
+    }
+    /*
+    DPCT1065:462: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t < UP_COLS) {
+        float s = 0.0f;
+#pragma unroll
+        for (int c = 0; c < HC; ++c) s += g[c][t];
+        a.mixed[d0 + t] = s / (float) HC;
+    }
+}
+
+// ================================ plan v0.3 P6: T tokens, one weight read ================================
+struct GrMulti {
+    FusedGrArgs a[kFusedGrMaxT];
+    float* xn;
+    int T;
+};
+
+// Step 1 of `gr_down_kernel`, one block per token, same threads and reduction order: rs[t] and xn[t] to global.
+/*
+DPCT1110:90: The total declared local variable size in device function
+gr_norm_multi_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_norm_multi_kernel(GrMulti m) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &part =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS][HC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_rs =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[HC]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const FusedGrArgs &a = m.a[item_ct1.get_group(2)];
+    float *xn = m.xn + (size_t)item_ct1.get_group(2) * D;
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    float gw[HC];
+#pragma unroll
+    for (int c = 0; c < HC; ++c) gw[c] = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+    float ss[HC] = {0.0f, 0.0f, 0.0f, 0.0f};
+    for (int i = t * 4; i < D; i += THREADS * 4) {
+        const int c = i / N, d = i - c * N;
+        sycl::float4 r = *reinterpret_cast<const sycl::float4 *>(a.R + i);
+        if (a.apply) {
+            const sycl::float4 b =
+                *reinterpret_cast<const sycl::float4 *>(a.bo_prev + d);
+            r.x() = sycl::fma((float)(b.x()), gw[c], r.x());
+                r.y() = sycl::fma((float)(b.y()), gw[c], r.y());
+            r.z() = sycl::fma((float)(b.z()), gw[c], r.z());
+                r.w() = sycl::fma((float)(b.w()), gw[c], r.w());
+        }
+        const sycl::float4 g =
+            *reinterpret_cast<const sycl::float4 *>(a.w_norm + i);
+        float sq =
+            r.x() * r.x() + r.y() * r.y() + r.z() * r.z() + r.w() * r.w();
+#pragma unroll
+        for (int cc = 0; cc < HC; ++cc) if (cc == c) ss[cc] += sq;
+        *reinterpret_cast<sycl::float4 *>(xn + i) = sycl::float4(
+            r.x() * g.x(), r.y() * g.y(), r.z() * g.z(), r.w() * g.w());
+    }
+#pragma unroll
+    for (int c = 0; c < HC; ++c) {
+        const float v = warp_sum(ss[c]);
+        if (lane == 0) part[warp][c] = v;
+    }
+    /*
+    DPCT1065:465: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t < HC) {
+        float s = 0.0f;
+#pragma unroll
+        for (int w = 0; w < WARPS; ++w) s += part[w][t];
+        s_rs[t] = sycl::rsqrt(s / (float)N + a.eps);
+        a.rs[t] = s_rs[t];
+    }
+    /*
+    DPCT1065:466: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+#pragma unroll
+    for (int i = t; i < D; i += THREADS) xn[i] *= s_rs[i / N];
+}
+
+constexpr int TILE = 2560;             // xn floats per token staged at a time: 320 chunks of 8, 10 per lane
+constexpr int TQ = TILE / 8 / 32;      // uint4 weight chunks per lane per tile
+
+// Step 2 of `gr_down_kernel` for T tokens.  One warp per row (so each lane accumulates the same chunks in the
+// same order as the single-token kernel); per tile the lane's 10 weight chunks are loaded BEFORE the activation
+// tile is staged, so the DRAM and L2 traffic are in flight together.
+/*
+DPCT1110:91: The total declared local variable size in device function
+gr_down_multi_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto tile = (float *)dpct_local; // [T][TILE]
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    const bool inject_block = item_ct1.get_group(2) == DOWN_BLOCKS;
+    const int row = inject_block ? warp : item_ct1.get_group(2) * WARPS + warp;
+    const bool active = !(inject_block && (m.a[0].w_inject == nullptr || warp >= HC));
+    const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
+    const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
+    float acc[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+    for (int base = 0; base < D; base += TILE) {
+        sycl::uint4 wv[TQ];
+        if (active) {
+#pragma unroll
+            /*
+            DPCT1098:469: The '*' expression is used instead of the __ldg call.
+            These two expressions do not provide the exact same functionality.
+            Check the generated code for potential precision and/or performance
+            issues.
+            */
+            for (int q = 0; q < TQ; ++q)
+                wv[q] = *(w4 + base / 8 + lane + 32 * q);
+        }
+        /*
+        DPCT1118:92: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:467: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier(); // the previous tile is consumed
+        const sycl::float4 *src4 = reinterpret_cast<const sycl::float4 *>(m.xn);
+        sycl::float4 *tile4 = reinterpret_cast<sycl::float4 *>(tile);
+        for (int i = t; i < T * (TILE / 4); i += THREADS) {
+            const int k = i / (TILE / 4), off = i - k * (TILE / 4);
+            tile4[i] = src4[((size_t) k * D + base) / 4 + off];
+        }
+        /*
+        DPCT1118:93: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:468: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (!active) continue;
+#pragma unroll
+        for (int q = 0; q < TQ; ++q) {
+            const int j = lane + 32 * q;
+#pragma unroll
+            for (int k = 0; k < kFusedGrMaxT; ++k)
+                if (k < T) acc[k] += dot8(wv[q], tile + k * TILE + j * 8);
+        }
+    }
+    if (!active) return;
+    float s[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
+    // lane k writes token k (every lane holds every sum after the xor reduction)
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        if (k >= T || lane != k) continue;
+        if (inject_block) {
+            m.a[k].inject_out[row] = s[k];
+        } else {
+            const float x = s[k] / (float) HC;
+            m.a[k].lo[row] = x / (1.0f + sycl::native::exp(-x));
+        }
+    }
+}
+
+constexpr int UPM_COLS = 16;                      // columns per block (x 4 streams = 64 rows, 8 per warp)
+constexpr int UPM_BLOCKS = N / UPM_COLS;          // 160
+
+// `gr_up_kernel` for T tokens: each row of w_up read once; the T dots reduced by xor so every lane holds every
+// sum, and lane k runs token k's epilogue - the T epilogues in parallel instead of one after another.
+/*
+DPCT1110:94: The total declared local variable size in device function
+gr_up_multi_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_up_multi_kernel(GrMulti m) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+    float[kFusedGrMaxT][LR]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &g = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[kFusedGrMaxT][HC][UPM_COLS]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    const int d0 = item_ct1.get_group(2) * UPM_COLS;
+#pragma unroll
+    for (int i = t; i < T * LR; i += THREADS)
+        lo[i / LR][i % LR] = m.a[i / LR].lo[i % LR];
+    /*
+    DPCT1065:470: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    for (int r = warp; r < HC * UPM_COLS; r += WARPS) {
+        const int c = r / UPM_COLS, dd = r - c * UPM_COLS, i = c * N + d0 + dd;
+        const sycl::uint4 *w4 =
+            reinterpret_cast<const sycl::uint4 *>(m.a[0].w_up + (size_t)i * LR);
+        /*
+        DPCT1098:472: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wa = *(w4 + lane);
+        /*
+        DPCT1098:473: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wb =
+            lane < LR / 8 - 32 ? *(w4 + 32 + lane) : sycl::uint4(0, 0, 0, 0);
+        // the epilogue inputs of this lane's token, fetched while the dots run
+        float rv = 0.0f, wn = 0.0f, rsc = 0.0f, bo = 0.0f, ip = 0.0f;
+        bool apply = false;
+        if (lane < T) {
+            const FusedGrArgs& a = m.a[lane];
+            rv = a.R[i];
+            wn = a.w_norm[i];
+            rsc = a.rs[c];
+            apply = a.apply;
+            if (apply) { bo = a.bo_prev[d0 + dd]; ip = a.inj_prev[c]; }
+        }
+        float mine = 0.0f;
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            if (k >= T) break;
+            float acc = dot8(wa, lo[k] + lane * 8);
+            if (lane < LR / 8 - 32) acc += dot8(wb, lo[k] + (32 + lane) * 8);
+            acc = warp_sum(acc);
+            if (lane == k) mine = acc;
+        }
+        if (lane < T) {
+            if (apply) {
+                rv = sycl::fma(bo, 2.0f * sigmoidf_(ip / (float)HC), rv);
+                m.a[lane].R_out[i] = rv;
+            }
+            const float x = rv * wn * rsc;
+            g[lane][c][dd] = x * sigmoidf_(mine);
+        }
+    }
+    /*
+    DPCT1065:471: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    for (int i = t; i < T * UPM_COLS; i += THREADS) {
+        const int k = i / UPM_COLS, col = i - k * UPM_COLS;
+        float s = 0.0f;
+#pragma unroll
+        for (int c = 0; c < HC; ++c) s += g[k][c][col];
+        m.a[k].mixed[d0 + col] = s / (float) HC;
+    }
+}
+
+}  // namespace
+
+void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, void* stream, unsigned long long* stamp_buf,
+                         int stamp_i0) {
+    if (n_tok < 1 || n_tok > kFusedGrMaxT || xn_scratch == nullptr) {
+        std::fprintf(stderr, "fused_gr_read_multi: invalid arguments\n");
+        std::exit(1);
+    }
+    GrMulti m;
+    for (int t = 0; t < n_tok; ++t) {
+        m.a[t] = a[t];
+        const FusedGrArgs& x = a[t];
+        if (!x.R || !x.w_norm || !x.w_down || !x.w_up || !x.lo || !x.rs || !x.mixed || (x.w_inject && !x.inject_out) ||
+            (x.apply && (!x.bo_prev || !x.inj_prev || !x.R_out)) || x.w_down != a[0].w_down || x.w_up != a[0].w_up ||
+            x.w_inject != a[0].w_inject || x.w_norm != a[0].w_norm) {
+            std::fprintf(stderr, "fused_gr_read_multi: invalid arguments for token %d\n", t);
+            std::exit(1);
+        }
+    }
+    m.xn = xn_scratch;
+    m.T = n_tok;
+    dpct::queue_ptr st = strata::q_of(stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_bf1e13>>(
+            sycl::nd_range<3>(sycl::range(1, 1, n_tok) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_norm_multi_kernel(m);
+            });
+    }
+    if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, stream);
+    // the shared-memory opt-in is a per-DEVICE setting: once per device, not once per process (a layer split
+    // runs this kernel on two cards)
+    static bool attr[64] = {};
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    if (dev < 0 || dev >= 64 || !attr[dev]) {
+        // at most what the card allows (Turing: 64 KB - enough for windows of up to 6 tokens)
+        int optin = 0;
+        /*
+        DPCT1019:474: local_mem_size in SYCL is not a complete equivalent of
+        cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
+        the code.
+        */
+        optin = dpct::get_device(dev).get_local_mem_size();
+        int want = (int) (kFusedGrMaxT * TILE * sizeof(float));
+        if (optin > 0 && want > optin) want = optin;
+        /*
+        DPCT1026:475: The call to cudaFuncSetAttribute was removed because SYCL
+        currently does not support corresponding setting.
+        */
+        /*
+        DPCT1026:476: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        if (dev >= 0 && dev < 64) attr[dev] = true;
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->submit([&](sycl::handler &cgh) {
+            /*
+            DPCT1083:1166: The size of local memory in the migrated code may be
+            different from the original code. Check that the allocated memory
+            size in the migrated code is correct.
+            */
+            sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                sycl::range((size_t)n_tok * TILE * sizeof(float)), cgh);
+
+            cgh.parallel_for<
+                dpct_kernel_name<class gr_down_multi_kernel_e2a6b0>>(
+                sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_down_multi_kernel(
+                            m, dpct_local_acc_ct1
+                                   .get_multi_ptr<sycl::access::decorated::no>()
+                                   .get());
+                    });
+        });
+    }
+    if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_up_multi_kernel_e2528e>>(
+            sycl::nd_range<3>(sycl::range(1, 1, UPM_BLOCKS) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_up_multi_kernel(m);
+            });
+    }
+    /*
+    DPCT1010:477: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+bool fused_gr_supported(int64_t n_embd, int64_t hc, int64_t hc_lr) {
+    return n_embd == N && hc == HC && hc_lr == LR;
+}
+
+void fused_gr_read(const FusedGrArgs& a, void* stream) {
+    if (!a.R || !a.w_norm || !a.w_down || !a.w_up || !a.lo || !a.rs || !a.mixed ||
+        (a.w_inject && !a.inject_out) || (a.apply && (!a.bo_prev || !a.inj_prev || !a.R_out)) ||
+        (a.apply && a.inj_prev == a.inject_out)) {
+        std::fprintf(stderr, "fused_gr_read: invalid arguments\n");
+        std::exit(1);
+    }
+    dpct::queue_ptr st = strata::q_of(stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_down_kernel_5d714c>>(
+            sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_down_kernel(a);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_up_kernel_86511f>>(
+            sycl::nd_range<3>(sycl::range(1, 1, UP_BLOCKS) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_up_kernel(a);
+            });
+    }
+    /*
+    DPCT1010:479: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/gdn.dp.cpp b/sycl/src/kernels/cuda/gdn.dp.cpp
new file mode 100644
index 00000000000..b56c96294c7
--- /dev/null
+++ b/sycl/src/kernels/cuda/gdn.dp.cpp
@@ -0,0 +1,401 @@
+// src/kernels/cuda/gdn.cu - P2.S2: the gated delta-net's non-projection parts.
+//
+// See include/strata/kernels/gdn.hpp for the state layout (S, h_v, S) and for why the recurrence needs no
+// barrier at all: every line of it touches only one (j, h) column, so one thread owns a column end to end.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/gdn.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int JTHREADS = 32;   ///< threads along j, the state's fast axis
+/// Heads staged per block.  **THIS IS A LATENCY-HIDING KNOB, NOT A CAPACITY ONE, AND IT WAS SET WRONG.**
+///
+/// The kernel is one thread per `(h, j)` COLUMN of the state, so the thread count is fixed at
+/// `S * h_v` = 128 * 48 = **6,144** no matter how the work is packed - and `MAX_H` decides only how many of
+/// those columns share a block:
+///
+///     MAX_H = 8   grid = (S/32, h_v/8) = (4, 6)  =  24 blocks x 32 threads  ->  1 warp on 24 of 48 SMs
+///     MAX_H = 1   grid = (S/32, h_v/1) = (4, 48) = 192 blocks x 32 threads  ->  4 warps on every SM
+///
+/// Each thread walks `i` in 0..S-1 TWICE per head with a strided global load each step, so it is entirely
+/// latency-bound: a warp that issues one 128-byte transaction and then waits ~600 cycles needs other warps to
+/// run meanwhile, and at 24 blocks there were none.  Measured 0.2800 ms per GDN block - 10 ms of a 71.5 ms
+/// token, 14%, in a kernel touching 12.6 MB that a 643 GB/s card should do in 0.020 ms.
+///
+/// The arithmetic does not change at all: the same columns are computed by the same code, in different blocks.
+constexpr int MAX_H = 1;       ///< heads staged in shared memory per block
+
+/// ggml_compute_softplus_f32: log1p(exp(x)), with the large-x branch that avoids overflow.
+__dpct_inline__ float softplus_f(float x) {
+    return x > 20.0f ? x : sycl::log1p(sycl::native::exp(x));
+}
+__dpct_inline__ float sigmoid_f(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+
+/// One step of the recurrence.  One thread per (h, j) column of the state.
+///
+/// `ks`/`qs` stage `k[idx[h]]` and `q[idx[h]]` for the block's heads.  Within a warp h is constant and j
+/// varies, so the staged row is read with a single broadcast - which is also why the GLOBAL loads of
+/// `q`/`k` are done once per block into shared instead of once per thread.
+__dpct_inline__ void
+gdn_step_kernel(float *__restrict__ state, const float *__restrict__ q,
+                const float *__restrict__ k, const float *__restrict__ v,
+                const float *__restrict__ gate, const float *__restrict__ beta,
+                float *__restrict__ o, int S, int h_k, int h_v) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &ks =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<float[MAX_H][128]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &qs =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[MAX_H][128]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &dec_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[MAX_H]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &beta_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[MAX_H]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+
+    const int h0 = item_ct1.get_group(1) * MAX_H;
+    const int nh = sycl::min(MAX_H, h_v - h0);
+    const int j = item_ct1.get_group(2) * JTHREADS + item_ct1.get_local_id(2);
+
+    // stage this block's q/k rows and its per-head scalars
+    for (int hi = 0; hi < nh; ++hi) {
+        const int h = h0 + hi;
+        const int src = h % h_k;                       // MODULO head pairing
+#pragma unroll
+        for (int i = item_ct1.get_local_id(2); i < S; i += JTHREADS) {
+            ks[hi][i] = k[src * S + i];
+            qs[hi][i] = q[src * S + i];
+        }
+        if (item_ct1.get_local_id(2) == 0) {
+            dec_s[hi] = sycl::native::exp(gate[h]);
+            beta_s[hi] = beta[h];
+        }
+    }
+    /*
+    DPCT1065:326: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (j >= S) return;
+
+    for (int hi = 0; hi < nh; ++hi) {
+        const int h = h0 + hi;
+        const float dec = dec_s[hi], b = beta_s[hi];
+        float* col = state + (size_t) h * S + j;        // (S, h_v, S) with j fastest
+        const size_t stride = (size_t) h_v * S;
+
+        // pass 1: decay the state and contract it against k.  Decay BEFORE the update - PROPERTY 5.
+        float sk = 0.0f;
+        for (int i = 0; i < S; ++i) {
+            const float s = col[(size_t) i * stride] * dec;
+            col[(size_t) i * stride] = s;
+            sk += s * ks[hi][i];
+        }
+        const float d = (v[(size_t) h * S + j] - sk) * b;
+        // pass 2: the rank-1 update, then read out against q using the UPDATED state
+        float dot = 0.0f;
+        for (int i = 0; i < S; ++i) {
+            const float s = col[(size_t) i * stride] + ks[hi][i] * d;
+            col[(size_t) i * stride] = s;
+            dot += s * qs[hi][i];
+        }
+        o[(size_t) h * S + j] = dot;
+    }
+}
+
+/// `ggml_ssm_conv`: out[c] = sum_i inp[i][c] * kW[c*d_conv + i], inp = [conv_state | x], and the state slides.
+/// One thread per channel; d_conv is 4, so the serial work per thread is a 4-tap dot and an unrolled shift.
+__dpct_inline__ void gdn_conv_kernel(float *__restrict__ cs,
+                                     const float *__restrict__ x,
+                                     const float *__restrict__ kW,
+                                     float *__restrict__ out, int C, int dc) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= C) return;
+    float* st = cs + (size_t) c * (dc - 1);
+    const float* w = kW + (size_t) c * dc;
+    float acc = 0.0f;
+#pragma unroll
+    for (int i = 0; i < dc - 1; ++i) acc +=
+        st[i] * w[i]; // kernel[0] reads the OLDEST state row
+    acc += x[c] * w[dc - 1];                                // the new input lands in the LAST tap
+    out[c] = acc;
+#pragma unroll
+    for (int i = 0; i < dc - 2; ++i)
+        st[i] = st[i + 1]; // slide: drop the oldest, append the newest
+    st[dc - 2] = x[c];
+}
+
+/// `build_gdn_l2_norm`, one warp per row: x / sqrt(sum(x^2) + eps) over the last axis.
+///
+/// The sum is accumulated in DOUBLE, as `ref/gdn.py` does (`l2_norm(q.astype(np.float64), eps)`), because the
+/// reference deliberately computes this one in float64 and then casts - so matching its precision is part of
+/// transcribing it.
+__dpct_inline__ void gdn_l2_kernel(float *__restrict__ x, int cols, float eps) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2);
+    float* p = x + (size_t) row * cols;
+    double acc = 0.0;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < cols;
+         i += item_ct1.get_local_range(2)) acc += (double)p[i] * (double)p[i];
+    // warp reduction
+    /*
+DPCT1108:35: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) acc +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, off);
+    auto &ssum = *sycl::ext::oneapi::group_local_memory_for_overwrite<double>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) == 0) ssum = acc;
+    /*
+    DPCT1065:327: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float inv = (float)(1.0 / sycl::sqrt(ssum + (double)eps));
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < cols;
+         i += item_ct1.get_local_range(2)) p[i] *= inv;
+}
+
+/// y = rms_norm(o, eps) * ssm_norm * sigmoid(z), one warp per head, norm over that head's S values.
+__dpct_inline__ void gdn_out_norm_kernel(const float *__restrict__ o,
+                                         const float *__restrict__ z,
+                                         const float *__restrict__ ssm_norm,
+                                         float *__restrict__ y, int S,
+                                         float eps) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int h = item_ct1.get_group(2);
+    const float* po = o + (size_t) h * S;
+    const float* pz = z + (size_t) h * S;
+    float* py = y + (size_t) h * S;
+    double acc = 0.0;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < S;
+         i += item_ct1.get_local_range(2)) acc += (double)po[i] * (double)po[i];
+    /*
+DPCT1108:36: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) acc +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, off);
+    auto &ssum = *sycl::ext::oneapi::group_local_memory_for_overwrite<double>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) == 0) ssum = acc;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const float inv = (float)(1.0 / sycl::sqrt(ssum / (double)S + (double)eps));
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < S;
+         i += item_ct1.get_local_range(2))
+        py[i] = po[i] * inv * ssm_norm[i] * sigmoid_f(pz[i]);
+}
+
+}  // namespace
+
+void gdn_step(float *state, const float *q, const float *k, const float *v,
+              const float *gate, const float *beta, float *o,
+              const GdnShapes &s, void *stream) try {
+    if (s.S <= 0 || s.h_k <= 0 || s.h_v <= 0) return;
+    if (s.S > 128) {
+        std::fprintf(stderr, "gdn_step: S = %lld exceeds the staged 128 (`ks`/`qs` are [8][128])\n",
+                     (long long) s.S);
+        std::exit(1);
+    }
+    const dpct::dim3 grid((unsigned)((s.S + JTHREADS - 1) / JTHREADS),
+                          (unsigned)((s.h_v + MAX_H - 1) / MAX_H));
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_step_kernel_34b62e>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, JTHREADS),
+                                  sycl::range(1, 1, JTHREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_step_kernel(state, q, k, v, gate, beta, o, (int)s.S,
+                                    (int)s.h_k, (int)s.h_v);
+                });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void gdn_conv_step(float *conv_state, const float *x, const float *kW,
+                   float *out, int64_t channels, int64_t d_conv,
+                   void *stream) try {
+    if (channels <= 0 || d_conv < 1) return;
+    const int blocks = (int) ((channels + 255) / 256);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_b12e73>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_conv_kernel(conv_state, x, kW, out, (int)channels,
+                                    (int)d_conv);
+                });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void gdn_l2_norm(float *x, int64_t rows, int64_t cols, float eps,
+                 void *stream) try {
+    if (rows <= 0 || cols <= 0) return;
+    if (cols > 1024) {
+        std::fprintf(stderr, "gdn_l2_norm: cols = %lld exceeds the 1024-wide warp reduction\n", (long long) cols);
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_fcfb3d>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)rows) *
+                                      sycl::range(1, 1, 32),
+                                  sycl::range(1, 1, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_l2_kernel(x, (int)cols, eps);
+                    });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+/// `beta = sigmoid(beta)`, in place, over the `h_v` per-head scalars.
+///
+/// **THIS IS `build_layer_attn_linear` L889, AND LEAVING IT OUT WAS THE C1 BUG.**  The reference computes
+/// `beta = ggml_sigmoid(ssm_beta @ cur)` and hands the RESULT to the delta net; `gdn_step_kernel` is documented
+/// as `d[h,j] = (v[h,j] - sk[h,j]) * beta[h]` and applies no sigmoid of its own, so the layer glue owes it one.
+/// The engine passed the raw pre-activation, which is unbounded and signed - the delta-net write strength then
+/// stops being a fraction and the whole recurrence is wrong from layer 0.
+///
+/// **IT SURVIVED `gdn_parity` BECAUSE THAT TEST SUPPLIES ITS OWN `beta`.**  The kernel was always right; only
+/// the glue between the projection and the kernel was wrong, and `ref/gdn.py` (`beta = sigmoid(wbeta @ x)`) and
+/// `ref/model.py` (`beta = G.sigmoid(proj(...))`) both get it right - so the two transcriptions agreed with
+/// each other and neither was ever compared against the C++ that actually runs.
+__dpct_inline__ void gdn_beta_gate_kernel(float *__restrict__ beta, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) beta[i] = sigmoid_f(beta[i]);
+}
+
+void gdn_beta_gate(float *beta, int64_t h_v, void *stream) try {
+    if (beta == nullptr || h_v <= 0) return;
+    const int n = (int) h_v;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_beta_gate_kernel_e2ab3e>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((n + 127) / 128)) *
+                        sycl::range(1, 1, 128),
+                    sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_beta_gate_kernel(beta, n);
+                });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void gdn_out_norm(const float *o, const float *z, const float *ssm_norm,
+                  float *y, int64_t h_v, int64_t S, float eps,
+                  void *stream) try {
+    if (h_v <= 0 || S <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_out_norm_kernel_9883e0>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)h_v) *
+                                      sycl::range(1, 1, 32),
+                                  sycl::range(1, 1, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_out_norm_kernel(o, z, ssm_norm, y, (int)S, eps);
+                    });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/gr.dp.cpp b/sycl/src/kernels/cuda/gr.dp.cpp
new file mode 100644
index 00000000000..4091f3f967c
--- /dev/null
+++ b/sycl/src/kernels/cuda/gr.dp.cpp
@@ -0,0 +1,735 @@
+// src/kernels/cuda/gr.cu - P2.S2: the gated residual / hyper-connection, `gr_read` and `gr_write`.
+//
+// See include/strata/kernels/gr.hpp for the semantics, for why the weights are bf16, and for the history of
+// this kernel's 134x-off-the-floor first version.  The short form: it was launched `<<<1, 256>>>` so that
+// `xn`/`xq` fit in shared memory, which used ONE of 48 SMs and cost 262 ms/token.
+//
+// THE SHAPE OF THE FIX is that each projection is an ordinary GEMV and is now mapped the way the shapes want:
+//
+//     norm    hc blocks, one per residual stream            (each needs its own reduction)
+//     down    ONE WARP PER OUTPUT ROW, lanes stride the 10240 reduction axis
+//     gate    ONE WARP PER OUTPUT ROW, lanes stride the 320 reduction axis
+//     mean    a flat elementwise pass over n_embd
+//
+// WARP-PER-ROW RATHER THAN THREAD-PER-ROW, and that is the whole difference.  A thread walking one row is
+// coalesced with ITSELF and 32 transactions away from its warp neighbours: `w_down[k*hc_dim + i]` for fixed k
+// is contiguous, but two threads on rows k and k+1 are hc_dim*2 bytes apart.  With the warp on one row, lanes
+// i, i+1, i+2 touch consecutive addresses in EITHER orientation - which is why this version needs no
+// transposed copies and takes both matrices exactly as the manifest stores them.
+//
+// Layouts are the MANIFEST's: `hc_attn_down.weight` is [10240, 320] with ne0 = hc*n_embd fast, so it holds
+// `w_down[k][i]` with i contiguous - `ref/gr.py`'s (hc_lr, hc*n_embd) row-major.  `hc_attn_up.weight` is
+// [320, 10240] so it holds `w_up[i][k]` with k contiguous - `ref/gr.py`'s (hc*n_embd, hc_lr) row-major.  Both
+// index with no permutation at all.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/gr.hpp"
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/native_gr_norm.hpp"
+#include "strata/kernels/native_gr_postops.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 256;
+constexpr int WARPS = THREADS / 32;
+bool fp32_activations = false;
+bool native_mmvf = false;
+
+/// The bf16 conversions live in `strata/kernels/bf16_bits.hpp`, and this file used to carry its own copies.
+/// Two files with a private copy of a conversion whose failure mode is silent wrong bits is one too many -
+/// and the reason the shared header exists is that `bf16` and `fp16` are NOT two spellings of one idea, so a
+/// routine written for one and reused for the other is wrong in a way that still produces numbers.
+///
+/// The local names are kept as thin wrappers so the body below is untouched by the swap.
+__dpct_inline__ uint16_t f32_to_bf16_bits(float f) { return bf16_from_f32(f); }
+__dpct_inline__ float bf16_bits_to_f32(uint16_t h) { return f32_from_bf16(h); }
+__dpct_inline__ float activation_f32(float x) { return x; }
+__dpct_inline__ float activation_f32(uint16_t x) { return bf16_bits_to_f32(x); }
+__dpct_inline__ void store_activation(float *dst, int i, float x) {
+    dst[i] = x;
+}
+__dpct_inline__ void store_activation(uint16_t *dst, int i, float x) {
+    dst[i] = f32_to_bf16_bits(x);
+}
+
+/// silu and sigmoid exactly as `ref/gr.py` writes them - in FLOAT, not double.
+///
+/// This is the opposite of `shared_expert.cu`, which uses double, and the difference is not stylistic:
+/// `ref/gr.py`'s arrays are float32, so `x / (1.0 + np.exp(-x))` evaluates in float32 under NEP 50, while
+/// `ref/moe.py` works in float64.  Matching the reference's PRECISION is part of transcribing it.
+__dpct_inline__ float silu_f(float x) {
+    return x / (1.0f + sycl::native::exp(-x));
+}
+__dpct_inline__ float sigmoid_f(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+
+__dpct_inline__ double warp_sum(double v) {
+    /*
+DPCT1108:37: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+    /*
+DPCT1121:38: Make sure that the "v" which is used in the SYCL group
+function/algorithm is initialized.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) v +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            off);
+    /*
+    DPCT1108:39: '__shfl_sync' was migrated with the experimental feature masked
+    sub_group function which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    /*
+    DPCT1121:40: Make sure that the "v" which is used in the SYCL group
+    function/algorithm is initialized.
+    */
+    return dpct::experimental::select_from_sub_group(
+        0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v, 0);
+}
+
+__dpct_inline__ float warp_sumf(float v) {
+    /*
+DPCT1108:41: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+    /*
+DPCT1121:42: Make sure that the "v" which is used in the SYCL group
+function/algorithm is initialized.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) v +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            off);
+    /*
+    DPCT1108:43: '__shfl_sync' was migrated with the experimental feature masked
+    sub_group function which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    /*
+    DPCT1121:44: Make sure that the "v" which is used in the SYCL group
+    function/algorithm is initialized.
+    */
+    return dpct::experimental::select_from_sub_group(
+        0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v, 0);
+}
+
+/// The FP32 block-wide sum, for the reason the review's G5 states: this is a GeForce part and FP64 runs at a
+/// small fraction of FP32, so a `double` reduction turns a bandwidth kernel into a latency kernel.
+///
+/// The scratch is taken as `double*` and reinterpreted as `float*` rather than changing the callers' shared
+/// arrays, because `double scratch[8]` is 64 bytes and so is at least as large as the `float[8]` this needs -
+/// the cast cannot overrun, and it keeps the change to one function instead of one per caller.
+inline float block_sumf(float v, double *scratch_raw) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    float *scratch = (float *)scratch_raw;
+    // The leading barrier is not decoration - see the note on `block_sum` above: the result is read straight out
+    // of `scratch[0]` by every thread and a later call reuses the array, so without it a fast thread can
+    // overwrite `scratch[0]` before a slow one has read the previous result.
+    /*
+    DPCT1065:355: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    v = warp_sumf(v);
+    if (lane == 0) scratch[warp] = v;
+    /*
+    DPCT1065:356: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int nw = ((int)item_ct1.get_local_range(2) + 31) >> 5;
+    v = (item_ct1.get_local_id(2) < nw) ? scratch[item_ct1.get_local_id(2)]
+                                        : 0.0f;
+    if (warp == 0) v = warp_sumf(v);
+    if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
+    /*
+    DPCT1065:357: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return scratch[0];
+}
+
+/// Block-wide sum in DOUBLE, broadcast to every thread.
+///
+/// Double because `ref/gr.py` reduces in float64 for the norm and the bottleneck, and because a block-wide
+/// f32 sum of 2560 squares is a different number from the reference's; the shuffle tree here also reorders
+/// the additions, so the only defence is enough precision that the order stops mattering.
+///
+/// The leading `__syncthreads()` is not decoration: the result is read straight out of `scratch[0]` by every
+/// thread, and a later call reuses the same array.  Without a barrier on entry a fast thread can overwrite
+/// `scratch[0]` before a slow one has read the previous result - a race that is invisible in most runs.
+double block_sum(double v, double* scratch) {
+    /*
+    DPCT1065:358: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    item_ct1.barrier();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    v = warp_sum(v);
+    if (lane == 0) scratch[warp] = v;
+    /*
+    DPCT1065:359: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int nw = ((int)item_ct1.get_local_range(2) + 31) >> 5;
+    v = (item_ct1.get_local_id(2) < nw) ? scratch[item_ct1.get_local_id(2)]
+                                        : 0.0;
+    if (warp == 0) v = warp_sum(v);
+    if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
+    /*
+    DPCT1065:360: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return scratch[0];
+}
+
+/// `hc` blocks, one per residual stream: per-stream RMSNorm, then the activated stream in both forms.
+///
+/// ggml_rms_norm reduces over ne[0], and ne[0] is n_embd, so the reduction is PER STREAM.  The `[n_embd, hc]`
+/// gamma then scales each stream individually.
+///
+/// A per-thread accumulator is only a sum when the block is narrower than the row, which is why this is a
+/// block reduction: with `n_embd` equal to the thread count every thread would hold exactly one element and
+/// normalise by its own square.  That mistake is silent - it produces a plausible vector of the right shape -
+/// and it is what `gr_parity`'s `mixed vs reference` caught at 2.0e+01 in round 196.
+template <bool FP32_ACT>
+__dpct_inline__ void gr_norm_kernel(const float *__restrict__ R,
+                                    const float *__restrict__ w_norm, float eps,
+                                    int n_embd, float *__restrict__ xn,
+                                    uint16_t *__restrict__ xq) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &scratch = *sycl::ext::oneapi::group_local_memory_for_overwrite<double[8]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int c = item_ct1.get_group(2);
+    const float* Rc = R + (size_t) c * n_embd;
+    float* xnc = xn + (size_t) c * n_embd;
+    uint16_t* xqc = xq + (size_t) c * n_embd;
+
+    // FP32, for the same reason as `gr_down_kernel` and `gr_inject_kernel`: this is a GeForce part, FP64 runs
+    // at a small fraction of FP32, and the sum of squares is a pure reduction.  It was the last `double` on the
+    // `gr_read` path.  `gr_norm` is only 0.80 ms/token, so this is hygiene rather than a headline - but it is
+    // 12 of the FP64 sites the review's G5 counted in this file, and the rule it states ("no FP64 on any decode
+    // or prefill path") is worth being able to check mechanically rather than case by case.
+    float ss = 0.0f;
+    for (int d = item_ct1.get_local_id(2); d < n_embd;
+         d += item_ct1.get_local_range(2)) {
+        const float v = Rc[d];
+        ss += v * v;
+    }
+    const float ms = block_sumf(ss, scratch) / (float) n_embd;
+    const float rs = sycl::rsqrt(ms + eps);
+    for (int d = item_ct1.get_local_id(2); d < n_embd;
+         d += item_ct1.get_local_range(2)) {
+        const float x = Rc[d] * rs * w_norm[(size_t) c * n_embd + d];
+        xnc[d] = x;
+        if constexpr (!FP32_ACT) xqc[d] = f32_to_bf16_bits(x);
+    }
+}
+
+/// `lo = silu((bf16(xn) @ w_down.T) / hc)`, ONE BLOCK PER OUTPUT ROW with its warps splitting the reduction.
+template <typename Activation>
+__dpct_inline__ void gr_down_kernel(const Activation *__restrict__ xq,
+                                    const uint16_t *__restrict__ w_down,
+                                    int hc_dim, int hc_lr, int hc,
+                                    Activation *__restrict__ lq) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int k = item_ct1.get_group(2);
+    if (k >= hc_lr) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const int warp = item_ct1.get_local_id(2) >> 5;
+    const int nw = (int)(item_ct1.get_local_range(2) >>
+                         5); // warps per row == warps per block
+    const uint16_t* row = w_down + (size_t) k * hc_dim;
+    // **THE OCCUPANCY HERE IS 10% AND IT IS REAL, BUT FIXING IT DOES NOT PAY.**  `hc_lr` is 320, one warp per
+    // row, 8 warps per block, so this launches 40 blocks = 320 warps: **6.7 warps per SM out of the 64 a
+    // Blackwell SM holds**, each lane walking 10,240 elements in 320 dependent steps.
+    //
+    // Four independent accumulators were tried to break the dependency chain and put four loads in flight per
+    // lane.  **Measured: 39.86 ms/token of pure GPU against 39.80, i.e. no change**, with `gr_parity` green
+    // either way.  Removed, on the rule this file already states about `#pragma unroll 4`: a hint that does not
+    // change the timing is a claim that is not true.
+    //
+    // The reason is that `gr_read`'s cost is not here.  Its four kernels are the norm (4 blocks), this (40),
+    // `gr_gate_kernel` (1,280) and the mean (10), and the 1,280-block gate kernel reads 6.55 MB of weights with
+    // good occupancy - so `gr_read`'s ~93 us is mostly the gate kernel at its own memory rate, and the ~165 GB/s
+    // whole-call figure is an average over kernels that do not share a rate.
+    // **FP32, AND THE FP64 THAT WAS HERE COST MORE THAN EVERYTHING ELSE IN `gr_read`.**
+    //
+    // This accumulated in `double`.  GeForce Blackwell executes FP64 at a small fraction of FP32 - 1/64 on
+    // recent parts - so a 320-step dependent FP64 chain per lane turned a memory-bound reduction into a
+    // latency-bound one.  The `nsys` per-kernel table (round 2) measured it at **5.07 ms/token, 15.3% of all
+    // GPU time**, against `gr_gate_kernel`'s 1.23 ms - which REFUTES the comment that used to sit here, that
+    // "gr_read's ~93 us is mostly the gate kernel at its own memory rate".  It was not: down + inject were
+    // 8.77 of gr_read's 10.8 ms, and the gate was 1.23.
+    //
+    // The justification for `double` was matching `ref/gr.py`'s float64 transcription.  **The ground truth is
+    // llama.cpp, and llama.cpp accumulates in FP32** - so this does not move away from the oracle, it moves
+    // toward it, and the review's G1 lists it first.
+    //
+    // Four independent accumulators were tried here BEFORE, against the FP64 version, and measured no change
+    // (39.86 vs 39.80 ms/token) - because FP64 throughput was the limit, not the dependency chain.  With FP32
+    // the kernel becomes memory-bound: it reads ~13 MB per call across xq and w_down, which at the measured
+    // 641 GB/s is ~20 us against the 52 us this took.
+    // **THE OCCUPANCY CONCLUSION ABOVE IS STALE, AND THIS IS THE RETEST IT ASKED FOR.**
+    //
+    // "Fixing it does not pay" was measured against the FP64 version, where FP64 THROUGHPUT was the limit and
+    // more parallelism could not help.  The kernel is FP32 now (round 282: 5.07 -> 2.38 ms/token) and the limit
+    // moved to memory - which is the regime where occupancy does pay, because at 6.7 warps/SM there are not
+    // enough bytes in flight to cover DRAM latency.  The old result is not wrong; it is about a different kernel.
+    //
+    // One BLOCK per row, its 8 warps splitting the 10,240-element reduction: 320 blocks x 8 = **2,560 warps =
+    // 53 warps/SM instead of 6.7**, with no second kernel and no partial buffer - the eight partials meet in
+    // shared memory.  Lanes within a warp still read consecutive addresses, because warp `w` starts at
+    // `w * 32` and strides by `nw * 32`.
+    float acc = 0.0f;
+#pragma unroll
+    for (int i = warp * 32 + lane; i < hc_dim; i += nw * 32)
+        acc += activation_f32(xq[i]) * bf16_bits_to_f32(row[i]);
+    acc = warp_sumf(acc);
+
+    auto &part =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (lane == 0) part[warp] = acc;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (warp == 0) {
+        float t = (lane < nw) ? part[lane] : 0.0f;
+        t = warp_sumf(t);
+        // NOTE: the reduction order differs from the one-warp version, so this is a NUMERICS CHANGE.  C1 is the
+        // gate that judges it - not this comment, and not `gr_parity`, which compares against the reference on
+        // a fixture that a changed summation order can still pass.
+        if (lane == 0) store_activation(lq, k, silu_f(t / (float) hc));
+    }
+}
+
+/// `gated[i] = xn[i] * sigmoid(bf16(lo) @ w_up.T)`, one warp per output row, lanes striding hc_lr.
+template <typename Activation>
+__dpct_inline__ void gr_gate_kernel(const Activation *__restrict__ lq,
+                                    const uint16_t *__restrict__ w_up,
+                                    const float *__restrict__ xn, int hc_dim,
+                                    int hc_lr, float *__restrict__ gated) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i =
+        item_ct1.get_group(2) * WARPS + (item_ct1.get_local_id(2) >> 5);
+    if (i >= hc_dim) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const uint16_t* row = w_up + (size_t) i * hc_lr;
+    float acc = 0.0f;
+#pragma unroll
+    for (int k = lane; k < hc_lr; k += 32)
+        acc += activation_f32(lq[k]) * bf16_bits_to_f32(row[k]);
+    acc = warp_sumf(acc);
+    // Every lane computes the sigmoid (the shuffle broadcasts acc), so there is no second sync point and no
+    // branch; lane 0 stores.
+    if (lane == 0) gated[i] = xn[i] * sigmoid_f(acc);
+}
+
+/// `mixed[d] = mean over c of gated[c][d]`.  Flat elementwise: the mean is over the streams, which are
+/// strided by n_embd, so no cross-thread reduction is needed at all.
+__dpct_inline__ void gr_mean_kernel(const float *__restrict__ gated, int n_embd,
+                                    int hc, float *__restrict__ mixed) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int d = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (d >= n_embd) return;
+    float m = 0.0f;
+#pragma unroll
+    for (int c = 0; c < hc; ++c) m += gated[(size_t)c * n_embd + d];
+    mixed[d] = m / (float) hc;
+}
+
+/// `inject[c] = bf16(xn) @ w_inject[c]`, one value per stream: ONE WARP PER STREAM, lanes striding hc_dim.
+///
+/// This mirrors `gr_down_kernel` rather than using a block-wide reduction.  `hc` is 4 at the real geometry,
+/// so a block per stream would put 256 threads on a 10240-element dot and leave the reduction to do all the
+/// work; a warp per stream is the same shape as the down projection and reuses its pattern exactly.  The
+/// whole kernel is one block of `32*hc` threads, which is small - and it is a 4-value output, so it is.
+template <typename Activation>
+__dpct_inline__ void gr_inject_kernel(const Activation *__restrict__ xq,
+                                      const uint16_t *__restrict__ w_inject,
+                                      int hc_dim, int hc,
+                                      float *__restrict__ inject) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_local_id(2) >> 5;
+    if (c >= hc) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const uint16_t* row = w_inject + (size_t) c * hc_dim;
+    // FP32, for the same reason as `gr_down_kernel` - and this one is worse.  A ONE-BLOCK kernel doing four
+    // 10,240-element FP64 reductions measured **3.70 ms/token, 11.1% of all GPU time, from a single SM out of
+    // 48.**  It is the fourth largest consumer of GPU time in the engine and it cannot use more than 1/48th of
+    // the machine.  In FP32 the same reduction is a few microseconds and the block size stops mattering.
+    float acc = 0.0f;
+#pragma unroll
+    for (int i = lane; i < hc_dim; i += 32)
+        acc += activation_f32(xq[i]) * bf16_bits_to_f32(row[i]);
+    acc = warp_sumf(acc);
+    if (lane == 0) inject[c] = acc;
+}
+
+__dpct_inline__ void gr_write_kernel(const float *__restrict__ R,
+                                     const float *__restrict__ block_out,
+                                     const float *__restrict__ inject,
+                                     int n_embd, int hc,
+                                     float *__restrict__ out,
+                                     uint8_t *dpct_local) {
+    // w = 2*sigmoid(inject/hc), computed once per stream in shared rather than per element.
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto smem_raw = (unsigned char *)dpct_local;
+    float* w = (float*) smem_raw;
+    if ((int)item_ct1.get_local_id(2) < hc) w[item_ct1.get_local_id(2)] =
+        2.0f * sigmoid_f(inject[item_ct1.get_local_id(2)] / (float)hc);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const long long n = (long long) hc * n_embd;
+    for (long long i =
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (long long)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2)) {
+        const int c = (int) (i / n_embd), d = (int) (i % n_embd);
+        // every stream adds the SAME block output; only the weight differs per stream
+        out[i] = R[i] + block_out[d] * w[c];
+    }
+}
+
+}  // namespace
+
+void gr_set_fp32_activations(bool enabled) { fp32_activations = enabled; }
+void gr_set_native_mmvf(bool enabled) { native_mmvf = enabled; }
+
+size_t gr_workspace_init(const GrShapes& s, void* base, GrWorkspace& out) {
+    const size_t hc_dim = (size_t) s.hc * (size_t) s.n_embd;
+    // ONE table, indexed by the same `k` that assigns the pointers below.  The first version of this function
+    // sized three locals named `xn`, `xq`, `lq` in a DIFFERENT order from the pointer assignments - `xq` got
+    // hc_lr*2 while `lq` got hc_dim*4 - so for the real geometry xq was given 640 bytes where it needed
+    // 20,480 and every region overlapped its neighbour.
+    //
+    // What that looked like is worth recording: `inject` came out ~20% wrong, and rewriting its reduction
+    // from block-wide to warp-wide produced BYTE-IDENTICAL wrong answers.  Two different reductions agreeing
+    // exactly is not a coincidence to investigate - it means the reduction is not where the bug is, and the
+    // inputs are.  Chasing the reduction instead cost most of a round.
+    const size_t sz[5] = {
+        hc_dim * sizeof(float),                // 0: xn
+        hc_dim * sizeof(uint16_t),             // 1: xq
+        (size_t) s.hc_lr * sizeof(uint16_t),   // 2: lq
+        hc_dim * sizeof(float),                // 3: gated
+        (size_t) s.hc_lr * sizeof(float),        // 4: lo (FP32 activation experiment)
+    };
+    size_t al[5], bytes = 0;
+    for (int k = 0; k < 5; ++k) {
+        al[k] = (sz[k] + 15) & ~(size_t) 15;
+        bytes += al[k];
+    }
+    out.bytes = bytes;
+    if (base != nullptr) {
+        unsigned char* p = (unsigned char*) base;
+        void* ptr[5];
+        for (int k = 0; k < 5; ++k) {
+            ptr[k] = p;
+            p += al[k];
+        }
+        out.xn = (float*) ptr[0];
+        out.xq = (uint16_t*) ptr[1];
+        out.lq = (uint16_t*) ptr[2];
+        out.gated = (float*) ptr[3];
+        out.lo = (float*) ptr[4];
+    }
+    return bytes;
+}
+
+void gr_read(const float *R, const float *w_norm, const uint16_t *w_down,
+             const uint16_t *w_up, const uint16_t *w_inject, float eps,
+             const GrShapes &s, const GrWorkspace &ws, float *mixed,
+             float *inject, void *stream) try {
+    if (s.n_embd <= 0 || s.hc <= 0 || s.hc_lr <= 0) return;
+    if (ws.xn == nullptr || ws.xq == nullptr || ws.lq == nullptr || ws.gated == nullptr || ws.lo == nullptr) {
+        std::fprintf(stderr, "gr_read: GrWorkspace is not initialised (see gr_workspace_init)\n");
+        std::exit(1);
+    }
+    if (ws.bytes < gr_workspace_bytes(s)) {
+        std::fprintf(stderr, "gr_read: GrWorkspace is %zu bytes but this geometry needs %zu\n",
+                     ws.bytes, gr_workspace_bytes(s));
+        std::exit(1);
+    }
+    const int n_embd = (int) s.n_embd, hc = (int) s.hc, hc_lr = (int) s.hc_lr;
+    const int hc_dim = (int) (s.hc * s.n_embd);
+    dpct::queue_ptr st = strata::q_of(stream);
+
+    // One setting selects every projection in this call. Captured graphs retain these kernel variants.
+    const bool use_native = native_mmvf;
+    const bool use_fp32 = fp32_activations || use_native;
+    if (use_native) {
+        if ((hc_dim & 1) != 0 || (hc_lr & 1) != 0)
+            throw std::invalid_argument("gr_read native MMVF requires even hc*n_embd and hc_lr");
+        native_gr_rms_norm_weighted(R, w_norm, ws.xn, n_embd, hc, eps, stream);
+        bf16_gemv_fp32_mmvf(ws.xn, w_down, ws.lo, hc_dim, hc_lr, stream);
+        native_gr_down_silu(ws.lo, hc_lr, hc, stream);
+        bf16_gemv_fp32_mmvf(ws.lo, w_up, ws.gated, hc_lr, hc_dim, stream);
+        // The existing null-injection contract identifies the final mixer.
+        // Pinned qwen4exp uses fused HC pre for layers and the unfused graph for il=-1.
+        native_gr_pre_gated(ws.xn, ws.gated, mixed, n_embd, hc, w_inject != nullptr, stream);
+    } else if (use_fp32) {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->parallel_for<dpct_kernel_name<class gr_norm_kernel_8a2029,
+                                              dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_norm_kernel<true>(R, w_norm, eps, n_embd, ws.xn,
+                                             ws.xq);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_down_kernel_f016b0, float>>(
+                sycl::nd_range<3>(sycl::range(1, 1, hc_lr) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_down_kernel<float>(ws.xn, w_down, hc_dim, hc_lr, hc,
+                                              ws.lo);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_gate_kernel_4b823d, float>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (hc_dim + WARPS - 1) / WARPS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_gate_kernel<float>(ws.lo, w_up, ws.xn, hc_dim, hc_lr,
+                                              ws.gated);
+                    });
+        }
+    } else {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->parallel_for<dpct_kernel_name<class gr_norm_kernel_f7b23c,
+                                              dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_norm_kernel<false>(R, w_norm, eps, n_embd, ws.xn,
+                                              ws.xq);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_down_kernel_cbf49c, uint16_t>>(
+                sycl::nd_range<3>(sycl::range(1, 1, hc_lr) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_down_kernel<uint16_t>(ws.xq, w_down, hc_dim, hc_lr,
+                                                 hc, ws.lq);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_gate_kernel_75fce5, uint16_t>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (hc_dim + WARPS - 1) / WARPS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_gate_kernel<uint16_t>(ws.lq, w_up, ws.xn, hc_dim,
+                                                 hc_lr, ws.gated);
+                    });
+        }
+    }
+    if (!use_native)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_mean_kernel_f4c4e8>>(
+            sycl::nd_range<3>(
+                sycl::range(1, 1, (n_embd + THREADS - 1) / THREADS) *
+                    sycl::range(1, 1, THREADS),
+                sycl::range(1, 1, THREADS)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                gr_mean_kernel(ws.gated, n_embd, hc, mixed);
+            });
+    }
+    // Absent for the final mixer, and then nothing is written - computing an injection nobody reads would be
+    // a claim, not a convenience.
+    if (w_inject != nullptr) {
+        const int nthreads = 32 * hc;
+        if (use_native)
+            bf16_gemv_fp32_mmvf(ws.xn, w_inject, inject, hc_dim, hc, stream);
+        else if (use_fp32)
+            /*
+            DPCT1049:45: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_inject_kernel_182d54, float>>(
+                sycl::nd_range<3>(sycl::range(1, 1, nthreads),
+                                  sycl::range(1, 1, nthreads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_inject_kernel<float>(ws.xn, w_inject, hc_dim, hc,
+                                                inject);
+                    });
+        } else
+        /*
+        DPCT1049:46: The work-group size passed to the SYCL kernel may
+        exceed the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if
+        needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<
+                dpct_kernel_name<class gr_inject_kernel_500b2a, uint16_t>>(
+                sycl::nd_range<3>(sycl::range(1, 1, nthreads),
+                                  sycl::range(1, 1, nthreads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_inject_kernel<uint16_t>(ws.xq, w_inject, hc_dim, hc,
+                                                   inject);
+                    });
+        }
+    }
+
+    /*
+    DPCT1010:361: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) {
+        const dpct::err0 se = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void gr_write(const float *R, const float *block_out, const float *inject,
+              const GrShapes &s, float *R_out, void *stream) try {
+    if (s.n_embd <= 0 || s.hc <= 0) return;
+    const long long n = (long long) s.hc * s.n_embd;
+    const int blocks = (int) ((n + THREADS - 1) / THREADS);
+    if (native_mmvf)
+        native_gr_post(R, block_out, inject, R_out, (int) s.n_embd, (int) s.hc, stream);
+    else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                /*
+                DPCT1083:1165: The size of local memory in the migrated code may
+                be different from the original code. Check that the allocated
+                memory size in the migrated code is correct.
+                */
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range((size_t)s.hc * sizeof(float)), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class gr_write_kernel_bd7975>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gr_write_kernel(
+                            R, block_out, inject, (int)s.n_embd, (int)s.hc,
+                            R_out,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
new file mode 100644
index 00000000000..4e629c998ac
--- /dev/null
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -0,0 +1,1401 @@
+// src/kernels/cuda/iq_kernels.cu - see include/strata/kernels/iq_kernels.hpp.
+//
+// The dot products (vec_dot_*_q8_1), the dequantizers and the q8_1 quantizer are transcribed from llama.cpp
+// (ggml/src/ggml-cuda/vecdotq.cuh, dequantize.cuh, quantize.cu at the commit in third_party/ggml/VERSION.txt;
+// MIT license, third_party/ggml/LICENSE).  The block structs and codebook grids come from its ggml-common.h,
+// included unchanged.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+
+#define GGML_COMMON_DECL_SYCL
+#define GGML_COMMON_IMPL_SYCL
+#include "ggml-common.h"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+void check(const char* what) {
+    /*
+    DPCT1010:928: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:929: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+// ---------------------------------------------------------------- llama.cpp helpers (vecdotq.cuh)
+__dpct_inline__ int get_int_b2(const void *x, const int &i32) {
+    const uint16_t* x16 = (const uint16_t*) x;
+    int x32 = x16[2 * i32 + 0] << 0;
+    x32 |= x16[2 * i32 + 1] << 16;
+    return x32;
+}
+__dpct_inline__ int get_int_b4(const void *x, const int &i32) {
+    return ((const int *)x)[i32];
+}
+__dpct_inline__ uint32_t unpack_ksigns(const uint8_t v) {
+    const uint32_t p = sycl::popcount(v) & 1;
+    const uint32_t s = v ^ p << 7;
+    return s * 0x01010101;
+}
+__dpct_inline__ sycl::int2 get_int_from_table_16(const int &q4,
+                                                 const int8_t *table) {
+    const uint32_t* table32 = (const uint32_t*) table;
+    uint32_t tmp[2];
+    const uint32_t low_high_selection_indices = (0x32103210 | ((q4 & 0x88888888) >> 1));
+#pragma unroll
+    for (uint32_t i = 0; i < 2; ++i) {
+        const uint32_t shift = 16 * i;
+        const uint32_t low =
+            dpct::byte_level_permute(table32[0], table32[1], q4 >> shift);
+        const uint32_t high =
+            dpct::byte_level_permute(table32[2], table32[3], q4 >> shift);
+        tmp[i] = dpct::byte_level_permute(low, high,
+                                          low_high_selection_indices >> shift);
+    }
+    return sycl::int2(dpct::byte_level_permute(tmp[0], tmp[1], 0x6420),
+                      dpct::byte_level_permute(tmp[0], tmp[1], 0x7531));
+}
+#define ggml_cuda_dp4a(a, b, c) dpct::dp4a((a), (b), (c))
+
+// ---------------------------------------------------------------- the dot products (vecdotq.cuh)
+__dpct_inline__ float vec_dot_q2_0_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
+    const float d2 = bq2_0->d;
+    const int16_t* qs = (const int16_t*) bq2_0->qs + iqs * 4;
+    const block_q8_1* bq8_1_chunk = bq8_1 + iqs;
+    int sumi = 0;
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        const int q = qs[j];
+        const int u = get_int_b4(bq8_1_chunk->qs, j * 2 + 0);
+        const int v = get_int_b4(bq8_1_chunk->qs, j * 2 + 1);
+        const int qe = dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 0);
+        const int qo = dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 2);
+        const int qx = dpct::byte_level_permute(qe, qo, 0x5140);
+        const int qy = dpct::byte_level_permute(qe, qo, 0x7362);
+        sumi = ggml_cuda_dp4a(u, qx, sumi);
+        sumi = ggml_cuda_dp4a(v, qy, sumi);
+    }
+    const float d8 = bq8_1_chunk->ds[0];
+    return d2 * d8 * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq2_xxs_q8_1(const void *__restrict__ vbq,
+                                           const block_q8_1 *__restrict__ bq8_1,
+                                           const int &kbx, const int &iqs) {
+    const block_iq2_xxs* bq2 = (const block_iq2_xxs*) vbq + kbx;
+    const int q2 = get_int_b2(bq2->qs, iqs);
+    const uint8_t* aux8 = (const uint8_t*) &q2;
+    const uint32_t aux32 = get_int_b2(bq2->qs, iqs + 1);
+    int sumi = 0;
+#pragma unroll
+    for (int k0 = 0; k0 < 8; k0 += 2) {
+        const sycl::uint2 grid_pos =
+            ((const sycl::uint2 *)iq2xxs_grid)[aux8[k0 / 2]];
+        const uint32_t signs = unpack_ksigns(aux32 >> (7 * k0 / 2));
+        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x08040201, 0, std::not_equal_to<>());
+        const int grid0 = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, k0 + 0);
+        sumi = ggml_cuda_dp4a(grid0, u0, sumi);
+        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x80402010, 0, std::not_equal_to<>());
+        const int grid1 = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, k0 + 1);
+        sumi = ggml_cuda_dp4a(grid1, u1, sumi);
+    }
+    const int ls = aux32 >> 27 | 1;
+    sumi = sumi * ls / 8;
+    const float d = sycl::vec<sycl::half, 1>(bq2->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 2].ds[0];
+    return d * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq2_xs_q8_1(const void *__restrict__ vbq,
+                                          const block_q8_1 *__restrict__ bq8_1,
+                                          const int &kbx, const int &iqs) {
+    const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
+    const sycl::int2 q2_packed =
+        sycl::int2(get_int_b2(bq2->qs, iqs + 0), get_int_b2(bq2->qs, iqs + 1));
+    const uint16_t* q2 = (const uint16_t*) &q2_packed;
+    const int ls0 = bq2->scales[iqs / 2] & 0x0F;
+    const int ls1 = bq2->scales[iqs / 2] >> 4;
+    int sumi0 = 0, sumi1 = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const sycl::uint2 grid_pos =
+            ((const sycl::uint2 *)iq2xs_grid)[q2[l0 / 2] & 0x1FF];
+        const uint32_t signs = unpack_ksigns(q2[l0 / 2] >> 9);
+        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x08040201, 0, std::not_equal_to<>());
+        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x80402010, 0, std::not_equal_to<>());
+        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        if (l0 < 4) {
+            sumi0 = ggml_cuda_dp4a(grid_l, u0, sumi0);
+            sumi0 = ggml_cuda_dp4a(grid_h, u1, sumi0);
+        } else {
+            sumi1 = ggml_cuda_dp4a(grid_l, u0, sumi1);
+            sumi1 = ggml_cuda_dp4a(grid_h, u1, sumi1);
+        }
+    }
+    const int sumi = (sumi0 * ls0 + sumi1 * ls1 + (sumi0 + sumi1) / 2) / 4;
+    const float d = sycl::vec<sycl::half, 1>(bq2->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 2].ds[0];
+    return d * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq2_s_q8_1(const void *__restrict__ vbq,
+                                         const block_q8_1 *__restrict__ bq8_1,
+                                         const int &kbx, const int &iqs) {
+    const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
+    const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
+    const uint8_t* qs = (const uint8_t*) &qs_packed;
+    const int qh = bq2->qh[iqs / 2];
+    const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
+    const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+    const int ls0 = bq2->scales[iqs / 2] & 0x0F;
+    const int ls1 = bq2->scales[iqs / 2] >> 4;
+    int sumi0 = 0, sumi1 = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+            ((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                ((signs_packed_8[l0 / 2] & 0x0C) << 21),
+            0x00000000, std::not_equal_to<>());
+        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+            ((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                ((signs_packed_8[l0 / 2] & 0xC0) << 17),
+            0x00000000, std::not_equal_to<>());
+        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos[0] ^ signs0, signs0, std::minus<>());
+        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos[1] ^ signs1, signs1, std::minus<>());
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        if (l0 < 4) {
+            sumi0 = ggml_cuda_dp4a(grid_l, u0, sumi0);
+            sumi0 = ggml_cuda_dp4a(grid_h, u1, sumi0);
+        } else {
+            sumi1 = ggml_cuda_dp4a(grid_l, u0, sumi1);
+            sumi1 = ggml_cuda_dp4a(grid_h, u1, sumi1);
+        }
+    }
+    const int sumi = (sumi0 * ls0 + sumi1 * ls1 + (sumi0 + sumi1) / 2) / 4;
+    const float d = sycl::vec<sycl::half, 1>(bq2->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 2].ds[0];
+    return d * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq3_xxs_q8_1(const void *__restrict__ vbq,
+                                           const block_q8_1 *__restrict__ bq8_1,
+                                           const int &kbx, const int &iqs) {
+    const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
+    const sycl::int2 q3_packed =
+        sycl::int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
+    const uint8_t* q3 = (const uint8_t*) &q3_packed;
+    const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+    int sumi = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const sycl::int2 grid_pos =
+            sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
+        const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
+        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x08040201, 0, std::not_equal_to<>());
+        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+            signs & 0x80402010, 0, std::not_equal_to<>());
+        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
+        sumi = ggml_cuda_dp4a(grid_h, u1, sumi);
+    }
+    const int ls = aux32 >> 28;
+    sumi = (ls * sumi + sumi / 2) / 2;
+    const float d = sycl::vec<sycl::half, 1>(bq3->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 2].ds[0];
+    return d * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq3_s_q8_1(const void *__restrict__ vbq,
+                                         const block_q8_1 *__restrict__ bq8_1,
+                                         const int &kbx, const int &iqs) {
+    const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
+    const sycl::int2 qs_packed =
+        sycl::int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
+    const uint8_t* qs = (const uint8_t*) &qs_packed;
+    const int qh = bq3->qh[iqs / 2];
+    const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
+    const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+    int sumi = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const sycl::int2 grid_pos =
+            sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                       iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+            ((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                ((signs_packed_8[l0 / 2] & 0x0C) << 21),
+            0x00000000, std::not_equal_to<>());
+        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+            ((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                ((signs_packed_8[l0 / 2] & 0xC0) << 17),
+            0x00000000, std::not_equal_to<>());
+        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
+            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
+        sumi = ggml_cuda_dp4a(grid_h, u1, sumi);
+    }
+    sumi *= 1 + 2 * ((bq3->scales[iqs / 4] >> ((iqs << 1) & 0x04)) & 0x0F);
+    const float d = sycl::vec<sycl::half, 1>(bq3->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 2].ds[0];
+    return d * sumi;
+}
+
+__dpct_inline__ float vec_dot_iq1_m_q8_1(const void *__restrict__ vbq,
+                                         const block_q8_1 *__restrict__ bq8_1,
+                                         const int &kbx, const int &iqs) {
+    const block_iq1_m* bq1 = (const block_iq1_m*) vbq + kbx;
+    const int qs_packed = get_int_b4(bq1->qs, iqs);
+    const uint8_t* qs = (const uint8_t*) &qs_packed;
+    int sumi[2] = {0, 0};
+    float sumf[2] = {0.0f, 0.0f};
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const int qhl = bq1->qh[2 * iqs + l0 / 4] >> (4 * ((l0 / 2) % 2));
+        const int grid = iq1s_grid_gpu[qs[l0 / 2] | ((qhl & 0x07) << 8)];
+        const int grid0 = (grid >> 0) & 0x0F0F0F0F;
+        const int grid1 = (grid >> 4) & 0x0F0F0F0F;
+        const int u0 = get_int_b4(bq8_1[iqs].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs].qs, l0 + 1);
+        sumi[l0 / 4] = ggml_cuda_dp4a(grid0, u0, sumi[l0 / 4]);
+        sumi[l0 / 4] = ggml_cuda_dp4a(grid1, u1, sumi[l0 / 4]);
+        const float delta = -1.0f + IQ1M_DELTA - (qhl & 0x08) * (2.0f * IQ1M_DELTA / 0x08);
+        int sumy = 0;
+        sumy = ggml_cuda_dp4a(u0, 0x01010101, sumy);
+        sumy = ggml_cuda_dp4a(u1, 0x01010101, sumy);
+        sumf[l0 / 4] += delta * sumy;
+    }
+    const uint16_t* sc = (const uint16_t*) bq1->scales;
+    iq1m_scale_t scale;
+    scale.u16 = (sc[0] >> 12) | ((sc[1] >> 8) & 0x00F0) | ((sc[2] >> 4) & 0x0F00) | (sc[3] & 0xF000);
+    const float d = sycl::vec<sycl::half, 1>(scale.f16)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs].ds[0];
+    const int tmp = sc[iqs / 2] >> (6 * (iqs % 2));
+    const int sc0 = 2 * ((tmp >> 0) & 0x07) + 1;
+    const int sc1 = 2 * ((tmp >> 3) & 0x07) + 1;
+    return d * ((sumi[0] + sumf[0]) * sc0 + (sumi[1] + sumf[1]) * sc1);
+}
+
+__dpct_inline__ float vec_dot_iq4_nl_q8_1(const void *__restrict__ vbq,
+                                          const block_q8_1 *__restrict__ bq8_1,
+                                          const int &kbx, const int &iqs) {
+    const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
+    const int* q8 = (const int*) bq8_1->qs + iqs;
+    int sumi = 0;
+#pragma unroll
+    for (int l = 0; l < 2; ++l) {
+        const int aux_q4 = get_int_b2(bq4->qs, iqs + l);
+        const sycl::int2 v = get_int_from_table_16(aux_q4, kvalues_iq4nl);
+        sumi = ggml_cuda_dp4a(v.x(), q8[l + 0], sumi);
+        sumi = ggml_cuda_dp4a(v.y(), q8[l + 4], sumi);
+    }
+    const float d = sycl::vec<sycl::half, 1>(bq4->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1->ds[0];
+    return d * sumi;
+}
+
+// IQ4_XS: 256 values as 8 sub-blocks of 32 (6-bit scale each); one call covers one sub-block (iqs = 4 * sub-block),
+// and `bq8_1` is the super-block's first q8_1 block, so the call's activation is bq8_1[iqs / 4].  The GSQ-RCO IQ3_S
+// file keeps one layer's routed gate/up experts in this format.
+__dpct_inline__ float vec_dot_iq4_xs_q8_1(const void *__restrict__ vbq,
+                                          const block_q8_1 *__restrict__ bq8_1,
+                                          const int &kbx, const int &iqs) {
+    const block_iq4_xs* bq4 = (const block_iq4_xs*) vbq + kbx;
+    int sumi = 0;
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        const int aux_q4 = get_int_b4(bq4->qs, iqs + j);
+        const sycl::int2 v = get_int_from_table_16(aux_q4, kvalues_iq4nl);
+        const int u0 = get_int_b4(bq8_1[iqs / 4].qs, j + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 4].qs, j + 4);
+        sumi = ggml_cuda_dp4a(v.x(), u0, sumi);
+        sumi = ggml_cuda_dp4a(v.y(), u1, sumi);
+    }
+    const int ls = ((bq4->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0F) | (((bq4->scales_h >> (iqs / 2)) & 0x03) << 4);
+    sumi *= ls - 32;
+    const float d = sycl::vec<sycl::half, 1>(bq4->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    bq8_1[iqs / 4].ds[0];
+    return d * sumi;
+}
+
+// ---------------------------------------------------------------- the formats
+// qk = values per block, ipb = dot calls per block (qi / vdr), step = the iqs stride between calls.
+template<int TY> struct Fmt;
+template<> struct Fmt<16> { static constexpr int qk = 256, ipb = 8, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq2_xxs_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<17> { static constexpr int qk = 256, ipb = 8, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq2_xs_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<18> { static constexpr int qk = 256, ipb = 8, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq3_xxs_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<20> { static constexpr int qk = 32, ipb = 2, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq4_nl_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<21> { static constexpr int qk = 256, ipb = 8, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq3_s_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<23> { static constexpr int qk = 256, ipb = 8, step = 4;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq4_xs_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<22> { static constexpr int qk = 256, ipb = 8, step = 2;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq2_s_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<29> { static constexpr int qk = 256, ipb = 8, step = 1;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq1_m_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<42> { static constexpr int qk = 64, ipb = 2, step = 1;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q2_0_q8_1(v, y, kbx, iqs); } };
+
+__dpct_inline__ float warp_sum(float v) {
+#pragma unroll
+    /*
+    DPCT1108:230: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            o);
+    return v;
+}
+
+// One row against one q8_1 activation, the whole warp: call k = (block, part) is lane-strided.
+template <int TY>
+__dpct_inline__ float row_dot(const uint8_t *row, const block_q8_1 *x, int nb,
+                              int lane) {
+    using F = Fmt<TY>;
+    float s = 0.0f;
+    for (int k = lane; k < nb * F::ipb; k += 32) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        /*
+        DPCT1084:298: The function call "Fmt::dot" has multiple migration
+        results in different template instantiations that could not be unified.
+        You may need to adjust the code.
+        */
+        s += F::dot(row, x + kbx * (F::qk / 32), kbx, iqs);
+    }
+    return warp_sum(s);
+}
+
+template <int TY>
+__dpct_inline__ void
+mmvq_kernel(const uint8_t *__restrict__ w, size_t row_bytes,
+            const block_q8_1 *__restrict__ x, float *__restrict__ y, int n_in,
+            int n_out, int ncols) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2) * 4 + item_ct1.get_local_id(1);
+    if (row >= n_out) return;
+    const int lane = item_ct1.get_local_id(2);
+    const int nb = n_in / Fmt<TY>::qk;
+    const uint8_t* wr = w + (size_t) row * row_bytes;
+    for (int c = 0; c < ncols; ++c) {
+        const float s =
+            row_dot<TY>(wr, x + (size_t)c * (n_in / 32), nb, lane);
+        if (lane == 0) y[(size_t) c * n_out + row] = s;
+    }
+}
+
+// ---------------------------------------------------------------- grouped native experts
+constexpr int GU_ROWS = 8;     // rows per block (one warp each)
+
+template <int TG>
+__dpct_inline__ void native_gu_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_tok, const block_q8_1 *__restrict__ xq,
+    NativeExpertLayout L, float *__restrict__ gate, float *__restrict__ up) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int warp = item_ct1.get_local_id(2) >> 5,
+              lane = item_ct1.get_local_id(2) & 31;
+    const int row = item_ct1.get_group(2) * GU_ROWS + warp; // 0 .. 2*n_ff
+    if (row >= 2 * L.n_ff) return;
+    const bool is_up = row >= L.n_ff;
+    const int r = is_up ? row - (int) L.n_ff : row;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
+    const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    for (int e = e0; e < e1; ++e) {
+        const float s = row_dot<TG>(wr, xq + (size_t)ent_tok[e] * xb, nb, lane);
+        if (lane == 0) (is_up ? up : gate)[(size_t) e * L.n_ff + r] = s;
+    }
+}
+
+__dpct_inline__ void swiglu_entries_kernel(const float *__restrict__ gate,
+                                           const float *__restrict__ up,
+                                           float *__restrict__ h, long long n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const float g = gate[i];
+    h[i] = (g / (1.0f + sycl::native::exp(-g))) * up[i];
+}
+
+template <int TD>
+__dpct_inline__ void native_down_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_dst, const block_q8_1 *__restrict__ hq,
+    NativeExpertLayout L, float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int warp = item_ct1.get_local_id(2) >> 5,
+              lane = item_ct1.get_local_id(2) & 31;
+    const int r = item_ct1.get_group(2) * 8 + warp;
+    if (r >= L.n_embd) return;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
+    const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    for (int e = e0; e < e1; ++e) {
+        const float s =
+            row_dot<TD>(wr, hq + (size_t)e * hb, nb, lane);
+        if (lane == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = s;
+    }
+}
+
+// ---------------------------------------------------------------- q8_1 (quantize.cu)
+__dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
+                                          block_q8_1 *__restrict__ y,
+                                          long long n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const float xi = x[i];
+    float amax = sycl::fabs(xi), sum = xi;
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) {
+        /*
+        DPCT1108:231: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        amax = sycl::fmax(
+            amax,
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                amax, o));
+        /*
+        DPCT1108:232: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        sum += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            sum, o);
+    }
+    const float d = amax / 127.0f;
+    const int8_t q = amax == 0.0f ? 0 : sycl::round(xi / d);
+    const long long ib = i / 32, iqs = i % 32;
+    y[ib].qs[iqs] = q;
+    if (iqs == 0) y[ib].ds = sycl::half2(d, sum);
+}
+
+// ---------------------------------------------------------------- dequant (dequantize.cuh)
+template <typename dst_t> __dpct_inline__ dst_t cvt(float v);
+template <> __dpct_inline__ float cvt<float>(float v) { return v; }
+template <>
+__dpct_inline__ sycl::half cvt<sycl::half>(float v) {
+    return sycl::vec<float, 1>(v)
+        .convert<sycl::half, sycl::rounding_mode::automatic>()[0];
+}
+
+template <typename dst_t>
+inline void dq_iq2_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq2_xxs* x = (const block_iq2_xxs*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint16_t* q2 = x[ibs].qs + 4 * ib;
+    const uint8_t* aux8 = (const uint8_t*) q2;
+    const uint8_t* grid = (const uint8_t*) (iq2xxs_grid + aux8[il]);
+    const uint32_t aux32 = q2[2] | (q2[3] << 16);
+    const float d = (float) x[ibs].d * (0.5f + (aux32 >> 28)) * 0.25f;
+    const uint8_t signs = ksigns_iq2xs[(aux32 >> 7 * il) & 127];
+#pragma unroll
+    for (int j = 0; j < 8; ++j)
+        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+}
+template <typename dst_t>
+inline void dq_iq2_xs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq2_xs* x = (const block_iq2_xs*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint16_t* q2 = x[ibs].qs + 4 * ib;
+    const uint8_t* grid = (const uint8_t*) (iq2xs_grid + (q2[il] & 511));
+    const float d = (float) x[ibs].d * (0.5f + ((x[ibs].scales[ib] >> 4 * (il / 2)) & 0xf)) * 0.25f;
+    const uint8_t signs = ksigns_iq2xs[q2[il] >> 9];
+#pragma unroll
+    for (int j = 0; j < 8; ++j)
+        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+}
+template <typename dst_t>
+inline void dq_iq2_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq2_s* x = (const block_iq2_s*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint8_t* grid = (const uint8_t*) (iq2s_grid + (x[ibs].qs[4 * ib + il] | ((x[ibs].qh[ib] << (8 - 2 * il)) & 0x300)));
+    const float d = (float) x[ibs].d * (0.5f + ((x[ibs].scales[ib] >> 4 * (il / 2)) & 0xf)) * 0.25f;
+    const uint8_t signs = x[ibs].qs[QK_K / 8 + 4 * ib + il];
+#pragma unroll
+    for (int j = 0; j < 8; ++j)
+        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+}
+template <typename dst_t>
+inline void dq_iq3_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq3_xxs* x = (const block_iq3_xxs*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint8_t* q3 = x[ibs].qs + 8 * ib;
+    const uint16_t* gas = (const uint16_t*) (x[ibs].qs + QK_K / 4) + 2 * ib;
+    const uint8_t* grid1 = (const uint8_t*) (iq3xxs_grid + q3[2 * il + 0]);
+    const uint8_t* grid2 = (const uint8_t*) (iq3xxs_grid + q3[2 * il + 1]);
+    const uint32_t aux32 = gas[0] | (gas[1] << 16);
+    const float d = (float) x[ibs].d * (0.5f + (aux32 >> 28)) * 0.5f;
+    const uint8_t signs = ksigns_iq2xs[(aux32 >> 7 * il) & 127];
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        y[j + 0] = cvt<dst_t>(d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f));
+        y[j + 4] = cvt<dst_t>(d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f));
+    }
+}
+template <typename dst_t>
+inline void dq_iq3_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq3_s* x = (const block_iq3_s*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint8_t* qs = x[ibs].qs + 8 * ib;
+    const uint8_t* grid1 = (const uint8_t*) (iq3s_grid + (qs[2 * il + 0] | ((x[ibs].qh[ib] << (8 - 2 * il)) & 256)));
+    const uint8_t* grid2 = (const uint8_t*) (iq3s_grid + (qs[2 * il + 1] | ((x[ibs].qh[ib] << (7 - 2 * il)) & 256)));
+    const float d = (float) x[ibs].d * (1 + 2 * ((x[ibs].scales[ib / 2] >> 4 * (ib % 2)) & 0xf));
+    const uint8_t signs = x[ibs].signs[4 * ib + il];
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        y[j + 0] = cvt<dst_t>(d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f));
+        y[j + 4] = cvt<dst_t>(d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f));
+    }
+}
+template <typename dst_t>
+inline void dq_iq1_m(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq1_m* x = (const block_iq1_m*) vx;
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint16_t* sc = (const uint16_t*) x[ibs].scales;
+    iq1m_scale_t scale;
+    scale.u16 = (sc[0] >> 12) | ((sc[1] >> 8) & 0x00f0) | ((sc[2] >> 4) & 0x0f00) | (sc[3] & 0xf000);
+    const int64_t ib16 = 2 * ib + il / 2;
+    const float d = (float) scale.f16 * (2 * ((sc[ib16 / 4] >> 3 * (ib16 % 4)) & 0x7) + 1);
+    const float delta = x[ibs].qh[2 * ib + il / 2] & (0x08 << 4 * (il % 2)) ? -1 - IQ1M_DELTA : -1 + IQ1M_DELTA;
+    uint32_t grid32[2];
+    const int8_t* q = (const int8_t*) grid32;
+    grid32[0] = iq1s_grid_gpu[x[ibs].qs[4 * ib + il] | (((x[ibs].qh[2 * ib + il / 2] >> 4 * (il % 2)) & 7) << 8)];
+    grid32[1] = (grid32[0] >> 4) & 0x0f0f0f0f;
+    grid32[0] &= 0x0f0f0f0f;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) y[j] = cvt<dst_t>(d * (q[j] + delta));
+}
+template <typename dst_t>
+inline void dq_iq4_nl(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq4_nl* x = (const block_iq4_nl*) vx + ibs * (QK_K / QK4_NL);
+    const int64_t il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 4 * il;
+    const uint8_t* q4 = x[ib].qs + 4 * il;
+    const float d = (float) x[ib].d;
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        y[j + 0] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] & 0xf]);
+        y[j + 16] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] >> 4]);
+    }
+}
+// Q3_K (the Q2_0 file's token_embd): llama.cpp's dequantize_block_q3_K, its 64 threads folded onto 32
+template <typename dst_t>
+inline void dq_q3_k(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_q3_K* x = (const block_q3_K*) vx + ibs;
+    for (int tt = tid; tt < 64; tt += 32) {
+        const int r = tt / 4, t2 = r / 2, is0 = r % 2;
+        const int l0 = 16 * is0 + 4 * (tt % 4);
+        const int n = t2 / 4, j = t2 - 4 * n;
+        const uint8_t m = (uint8_t) (1 << (4 * n + j));
+        const int is = 8 * n + 2 * j + is0;
+        const int shift = 2 * j;
+        const int8_t us = is < 4  ? (int8_t) ((x->scales[is - 0] & 0xF) | (((x->scales[is + 8] >> 0) & 3) << 4)) :
+                          is < 8  ? (int8_t) ((x->scales[is - 0] & 0xF) | (((x->scales[is + 4] >> 2) & 3) << 4)) :
+                          is < 12 ? (int8_t) ((x->scales[is - 8] >> 4) | (((x->scales[is + 0] >> 4) & 3) << 4)) :
+                                    (int8_t) ((x->scales[is - 8] >> 4) | (((x->scales[is - 4] >> 6) & 3) << 4));
+        const float dl = (float) x->d * (us - 32);
+        dst_t* y = yy + 128 * n + 32 * j;
+        const uint8_t* q = x->qs + 32 * n;
+        const uint8_t* hm = x->hmask;
+#pragma unroll
+        for (int l = l0; l < l0 + 4; ++l) y[l] = cvt<dst_t>(
+            dl * ((int8_t)((q[l] >> shift) & 3) - ((hm[l] & m) ? 0 : 4)));
+    }
+}
+template <typename dst_t>
+inline void dq_iq4_xs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_iq4_xs* x = (const block_iq4_xs*) vx + ibs;
+    const int il = tid / 8, ib = tid % 8;
+    dst_t* y = yy + 32 * ib + 4 * il;
+    const uint8_t* q4 = x->qs + 16 * ib + 4 * il;
+    const float d = (float) x->d * ((((x->scales_l[ib / 2] >> 4 * (ib % 2)) & 0xf) | (((x->scales_h >> 2 * ib) & 3) << 4)) - 32);
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        y[j + 0] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] & 0xf]);
+        y[j + 16] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] >> 4]);
+    }
+}
+template <typename dst_t>
+inline void dq_q2_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    // one "superblock" = 256 values = 4 blocks of 64; thread tid writes 8 values
+    const block_q2_0* x = (const block_q2_0*) vx + ibs * 4;
+    const int b = tid / 8, part = tid % 8;          // block 0..3, 8 values each
+    const float d = (float) x[b].d;
+    for (int j = 0; j < 8; ++j) {
+        const int i = part * 8 + j;
+        const int code = (x[b].qs[i / 4] >> ((i % 4) * 2)) & 3;
+        yy[b * 64 + i] = cvt<dst_t>(d * (float) (code - 1));
+    }
+}
+
+template <typename dst_t>
+__dpct_inline__ void
+dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
+    switch (ty) {
+        case 16: dq_iq2_xxs(vx, ibs, y, tid);
+            break;
+        case 17: dq_iq2_xs(vx, ibs, y, tid);
+            break;
+        case 18: dq_iq3_xxs(vx, ibs, y, tid);
+            break;
+        case 20: dq_iq4_nl(vx, ibs, y, tid); break;
+        case 21: dq_iq3_s(vx, ibs, y, tid); break;
+        case 22: dq_iq2_s(vx, ibs, y, tid); break;
+        case 29: dq_iq1_m(vx, ibs, y, tid); break;
+        case 23: dq_iq4_xs(vx, ibs, y, tid); break;
+        case 11: dq_q3_k(vx, ibs, y, tid); break;
+        case 42: dq_q2_0(vx, ibs, y, tid); break;
+        default: break;
+    }
+}
+
+// flat: superblock i -> y + 256 i
+template <typename dst_t>
+__dpct_inline__ void dequant_flat_kernel(
+    int ty, const void *__restrict__ vx, dst_t *__restrict__ y) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i = item_ct1.get_group(2);
+    dq_dispatch<dst_t>(ty, vx, i, y + i * QK_K, item_ct1.get_local_id(2));
+}
+// gate/up: superblock i of a role matrix (n_embd/256 per row) -> interleaved row 2r + parity
+__dpct_inline__ void dequant_gu_kernel(
+    int ty, const void *__restrict__ gate, const void *__restrict__ up,
+    int64_t per_row, sycl::half *__restrict__ y) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i = item_ct1.get_group(2);
+    const int parity = item_ct1.get_group(1);
+    const int64_t r = i / per_row, c = i % per_row;
+    dq_dispatch<sycl::half>(ty, parity ? up : gate, i,
+                            y + ((2 * r + parity) * per_row + c) * QK_K,
+                            item_ct1.get_local_id(2));
+}
+
+bool is_iq(int t) { return t == 16 || t == 17 || t == 18 || t == 20 || t == 21 || t == 22 || t == 23 || t == 29 || t == 42 || t == 11; }
+
+}  // namespace
+
+bool iq_supported(int t) noexcept { return is_iq(t); }
+
+size_t iq_row_bytes(int t, int64_t n) noexcept {
+    switch (t) {
+        case 16: return (size_t) (n / 256) * sizeof(block_iq2_xxs);
+        case 17: return (size_t) (n / 256) * sizeof(block_iq2_xs);
+        case 18: return (size_t) (n / 256) * sizeof(block_iq3_xxs);
+        case 20: return (size_t) (n / 32) * sizeof(block_iq4_nl);
+        case 21: return (size_t) (n / 256) * sizeof(block_iq3_s);
+        case 22: return (size_t) (n / 256) * sizeof(block_iq2_s);
+        case 29: return (size_t) (n / 256) * sizeof(block_iq1_m);
+        case 23: return (size_t) (n / 256) * sizeof(block_iq4_xs);
+        case 11: return (size_t) (n / 256) * sizeof(block_q3_K);
+        case 42: return (size_t) (n / 64) * sizeof(block_q2_0);
+        default: return 0;
+    }
+}
+
+void quantize_q8_1_rows(const float* x, int64_t n_rows, int64_t n_cols, void* y, void* stream) {
+    const long long n = (long long) n_rows * n_cols;
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class quantize_q8_1_kernel_a566ca>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((n + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        quantize_q8_1_kernel(x, (block_q8_1 *)y, n);
+                    });
+    }
+    check("quantize_q8_1_rows");
+}
+
+void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+    const dpct::dim3 grid((unsigned)((n_out + 3) / 4)), block(32, 4);
+    const size_t rb = iq_row_bytes(t, n_in);
+    dpct::queue_ptr s = strata::q_of(stream);
+    const auto* W = (const uint8_t*) w;
+    const auto* X = (const block_q8_1*) x_q8_1;
+    switch (t) {
+        /*
+        DPCT1049:233: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 16: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_2769e1,
+                                              dpct_kernel_scalar<16>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<16>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:234: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 17: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_4ee329,
+                                              dpct_kernel_scalar<17>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<17>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:235: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 18: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_34dcfe,
+                                              dpct_kernel_scalar<18>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<18>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:236: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 20: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_dfe57c,
+                                              dpct_kernel_scalar<20>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<20>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:237: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 21: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_9d8f61,
+                                              dpct_kernel_scalar<21>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<21>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:238: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 22: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_979367,
+                                              dpct_kernel_scalar<22>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<22>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:239: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 23: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_15e579,
+                                              dpct_kernel_scalar<23>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<23>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:240: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 29: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_bc4076,
+                                              dpct_kernel_scalar<29>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<29>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        /*
+        DPCT1049:241: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    case 42: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_2c3d4c,
+                                              dpct_kernel_scalar<42>>>(
+                sycl::nd_range<3>(grid * block, block), exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        mmvq_kernel<42>(W, rb, X, y, n_in, n_out, ncols);
+                    });
+        });
+    } break;
+        default: std::fprintf(stderr, "iq_mmvq: type %d is not supported\n", t); std::exit(1);
+    }
+    check("iq_mmvq");
+}
+
+void iq_dequant_f16(int t, const void* src, int64_t n, uint16_t* dst, void* stream) {
+    if (n % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_dequant_f16: bad arguments\n"); std::exit(1); }
+    {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp16});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class dequant_flat_kernel_d891c8, sycl::half>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(n / 256)) *
+                                          sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        dequant_flat_kernel<sycl::half>(
+                            t, src, (sycl::half *)dst);
+                    });
+            });
+    }
+    check("iq_dequant_f16");
+}
+
+namespace {
+__dpct_inline__ void embed_rows_kernel(
+    int ty, const uint8_t *__restrict__ table, size_t row_bytes,
+    const int32_t *__restrict__ tokens, int64_t n_embd, float *__restrict__ y) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const int64_t b = item_ct1.get_group(2);
+    const uint8_t* row = table + (size_t) tokens[t] * row_bytes;
+    dq_dispatch<float>(ty, row, b, y + (size_t)t * n_embd + b * QK_K,
+                       item_ct1.get_local_id(2));
+}
+}  // namespace
+
+void iq_embed_rows(int t, const void* table, size_t row_bytes, const int32_t* tokens, int64_t n_tok, int64_t n_embd,
+                   float* out, void* stream) {
+    if (n_tok <= 0) return;
+    if (n_embd % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_embed_rows: bad arguments\n"); std::exit(1); }
+    {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp16});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class embed_rows_kernel_284a43>>(
+                    sycl::nd_range<3>(sycl::range(1, (unsigned)n_tok,
+                                                  (unsigned)(n_embd / 256)) *
+                                          sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        embed_rows_kernel(
+                            t, (const uint8_t *)table, row_bytes, tokens,
+                            n_embd, out);
+                    });
+            });
+    }
+    check("iq_embed_rows");
+}
+
+void iq_dequant_f32(int t, const void* src, int64_t n, float* dst, void* stream) {
+    if (n % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_dequant_f32: bad arguments\n"); std::exit(1); }
+    {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp16});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class dequant_flat_kernel_d7b5ca, float>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(n / 256)) *
+                                          sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        dequant_flat_kernel<float>(
+                            t, src, dst);
+                    });
+            });
+    }
+    check("iq_dequant_f32");
+}
+
+void iq_dequant_gu_f16(int t, const void* gate, const void* up, int64_t n_ff, int64_t n_embd, uint16_t* dst, void* stream) {
+    const int64_t per_row = n_embd / 256;
+    {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp16});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class dequant_gu_kernel_2397ca>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 2, (unsigned)(n_ff * per_row)) *
+                            sycl::range(1, 1, 32),
+                        sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        dequant_gu_kernel(
+                            t, gate, up, per_row, (sycl::half *)dst);
+                    });
+            });
+    }
+    check("iq_dequant_gu_f16");
+}
+
+NativeExpertLayout native_expert_layout(int gu_type, int d_type, int64_t n_embd, int64_t n_ff) {
+    NativeExpertLayout L;
+    L.gu_type = gu_type;
+    L.d_type = d_type;
+    L.n_embd = n_embd;
+    L.n_ff = n_ff;
+    L.gu_row = iq_row_bytes(gu_type, n_embd);
+    L.d_row = iq_row_bytes(d_type, n_ff);
+    L.up_off = (size_t) n_ff * L.gu_row;
+    L.down_off = 2 * L.up_off;
+    L.bytes = L.down_off + (size_t) n_embd * L.d_row;
+    return L;
+}
+
+size_t native_expert_scratch_bytes(int64_t cap, int64_t n_ff) {
+    const size_t f = (size_t) cap * (size_t) n_ff * sizeof(float);
+    return 3 * ((f + 255) & ~(size_t) 255) + (((size_t) cap * (size_t) (n_ff / 32) * sizeof(block_q8_1) + 255) & ~(size_t) 255);
+}
+
+void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long* grp_ptr, const int32_t* grp_start,
+                           const int32_t* n_groups, const int32_t* ent_dst, const int32_t* ent_tok, int64_t cap_groups,
+                           int64_t cap_entries, const void* x_q8_1, void* scratch, float* out, void* stream) {
+    if (cap_groups <= 0 || cap_entries <= 0) return;
+    dpct::queue_ptr s = strata::q_of(stream);
+    const size_t f = (size_t) cap_entries * (size_t) L.n_ff * sizeof(float), fa = (f + 255) & ~(size_t) 255;
+    float* gate = (float*) scratch;
+    float* up = (float*) ((uint8_t*) scratch + fa);
+    float* h = (float*) ((uint8_t*) scratch + 2 * fa);
+    block_q8_1* hq = (block_q8_1*) ((uint8_t*) scratch + 3 * fa);
+    const auto* X = (const block_q8_1*) x_q8_1;
+    const dpct::dim3 ggu((unsigned)((2 * L.n_ff + GU_ROWS - 1) / GU_ROWS),
+                         (unsigned)cap_groups);
+    switch (L.gu_type) {
+    case 16: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_472f9a,
+                                              dpct_kernel_scalar<16>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<16>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 17: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_3af217,
+                                              dpct_kernel_scalar<17>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<17>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 18: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_17c573,
+                                              dpct_kernel_scalar<18>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<18>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 21: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_1f1e65,
+                                              dpct_kernel_scalar<21>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<21>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 22: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_5b900c,
+                                              dpct_kernel_scalar<22>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<22>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 23: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_ca9850,
+                                              dpct_kernel_scalar<23>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<23>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 29: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_5ad3a4,
+                                              dpct_kernel_scalar<29>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<29>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+    case 42: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_331601,
+                                              dpct_kernel_scalar<42>>>(
+                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_gu_kernel<42>(grp_ptr, grp_start, n_groups,
+                                             ent_tok, X, L, gate, up);
+                    });
+        });
+    } break;
+        default: std::fprintf(stderr, "native_expert_grouped: gate/up type %d\n", L.gu_type); std::exit(1);
+    }
+    check("native_expert_grouped/gu");
+    const long long nh = (long long) cap_entries * L.n_ff;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<dpct_kernel_name<class swiglu_entries_kernel_a4959c>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                swiglu_entries_kernel(gate, up, h, nh);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<dpct_kernel_name<class quantize_q8_1_kernel_3fc248>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                quantize_q8_1_kernel(h, hq, nh);
+            });
+    }
+    const dpct::dim3 gd((unsigned)((L.n_embd + 7) / 8), (unsigned)cap_groups);
+    switch (L.d_type) {
+    case 20: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_f2a0ef,
+                                              dpct_kernel_scalar<20>>>(
+                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_down_kernel<20>(grp_ptr, grp_start, n_groups,
+                                               ent_dst, hq, L, out);
+                    });
+        });
+    } break;
+    case 23: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_cf19c8,
+                                              dpct_kernel_scalar<23>>>(
+                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_down_kernel<23>(grp_ptr, grp_start, n_groups,
+                                               ent_dst, hq, L, out);
+                    });
+        });
+    } break;
+    case 42: {
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+
+            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_57a5b9,
+                                              dpct_kernel_scalar<42>>>(
+                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_down_kernel<42>(grp_ptr, grp_start, n_groups,
+                                               ent_dst, hq, L, out);
+                    });
+        });
+    } break;
+        default: std::fprintf(stderr, "native_expert_grouped: down type %d\n", L.d_type); std::exit(1);
+    }
+    check("native_expert_grouped/down");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/kv_q4.dp.cpp b/sycl/src/kernels/cuda/kv_q4.dp.cpp
new file mode 100644
index 00000000000..8834a75fb36
--- /dev/null
+++ b/sycl/src/kernels/cuda/kv_q4.dp.cpp
@@ -0,0 +1,353 @@
+// src/kernels/cuda/kv_q4.cu - see include/strata/kernels/kv_q4.hpp. Q4_0 KV with Walsh-Hadamard rotation
+// (from PR #21 by code-martin; KV-streaming integration and the deterministic group maximum added on merge).
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/kv_stream.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+void check(const char* what) {
+    /*
+    DPCT1010:430: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+// Fast Walsh-Hadamard Transform for N = 256: one warp per row, 8 values per lane in registers.
+// Orthonormal (scale 1/sqrt(256) = 1/16), so it is its own inverse.
+__dpct_inline__ void fwht256_kernel(const float *__restrict__ src,
+                                    float *__restrict__ dst, int64_t n_rows,
+                                    float scale) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int warp_size = 32;
+    constexpr int N = 256;
+    constexpr int el_w = N / warp_size;   // 8
+
+    const int64_t r =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(1) +
+        item_ct1.get_local_id(1);
+    if (r >= n_rows) return;
+
+    const float* row_src = src + r * N;
+    float* row_dst = dst + r * N;
+
+    float reg[el_w];
+    const int lane = item_ct1.get_local_id(2);
+
+#pragma unroll
+    for (int i = 0; i < el_w; ++i) reg[i] = row_src[i * warp_size + lane] * scale;
+
+    // the low 5 index bits live across lanes
+#pragma unroll
+    for (int h = 1; h < warp_size; h *= 2) {
+#pragma unroll
+        for (int j = 0; j < el_w; ++j) {
+            const float val = reg[j];
+            /*
+            DPCT1108:77: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float val2 = dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                val, h);
+            reg[j] = (lane & h) == 0 ? val + val2 : val2 - val;
+        }
+    }
+    // the high 3 bits across each lane's registers
+#pragma unroll
+    for (int h = warp_size; h < N; h *= 2) {
+        const int step = h / warp_size;
+#pragma unroll
+        for (int j = 0; j < el_w; j += 2 * step) {
+#pragma unroll
+            for (int k = 0; k < step; ++k) {
+                const float x = reg[j + k];
+                const float y = reg[j + k + step];
+                reg[j + k] = x + y;
+                reg[j + k + step] = x - y;
+            }
+        }
+    }
+#pragma unroll
+    for (int i = 0; i < el_w; ++i) row_dst[i * warp_size + lane] = reg[i];
+}
+
+// One 32-value group in one warp (lane = element), ggml's q4_0: d = (the value of largest |x|) / -8,
+// q = clamp(trunc(x / d + 8.5), 0, 15). Returns the scale bits; `byte` is lane t's packed byte for t < 16
+// (element t in the low nibble, t + 16 in the high one). Ties in |x| resolve to the larger value in EVERY lane,
+// so all lanes agree on d (a plain `a > amax` could leave lanes with opposite signs and one block two scales).
+__dpct_inline__ uint16_t q4_group(float x, int lane, uint8_t &byte) {
+    float amax = sycl::fabs(x), mval = x;
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) {
+        /*
+        DPCT1108:78: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const float a = dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            amax, o);
+        /*
+        DPCT1108:79: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const float v = dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            mval, o);
+        if (a > amax || (a == amax && v > mval)) { amax = a; mval = v; }
+    }
+    const float d = mval / -8.0f;
+    const float id = d != 0.0f ? 1.0f / d : 0.0f;
+    int q = sycl::vec<float, 1>{(x * id + 8.5f)}
+                .convert<int, sycl::rounding_mode::rtz>()[0];
+    const uint8_t qc = (uint8_t) (q < 0 ? 0 : (q > 15 ? 15 : q));
+    /*
+    DPCT1108:80: '__shfl_down_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    const uint8_t qhi = dpct::experimental::shift_sub_group_left(
+        0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), qc,
+        16);
+    byte = (uint8_t) (qc | (qhi << 4));
+    (void) lane;
+    return f16_from_f32(d);
+}
+
+__dpct_inline__ void q4_store(uint8_t *pool, long long row, int b, int lane,
+                              uint16_t d, uint8_t byte) {
+    block_q4_0* blk = reinterpret_cast<block_q4_0*>(pool + row * (long long) sizeof(block_q4_0) * 8) + b;
+    if (lane == 0) blk->d = d;
+    if (lane < 16) blk->qs[lane] = byte;
+}
+
+// One block = one 32-value group of one KV head of K (blockIdx.z = 0) or V (1); 32 threads. KV streaming: the VRAM
+// page only if the block is resident (table >= 0), the host copy always (identity layout) when there is one.
+__dpct_inline__ void kv_append_q4_kernel(
+    uint8_t *__restrict__ k_q4, uint8_t *__restrict__ v_q4,
+    const int32_t *__restrict__ table, const int32_t *__restrict__ step,
+    const float *__restrict__ kcur, const float *__restrict__ vcur,
+    int kv_heads, int head_dim, int page_size, KvHostPools host) {
+    /*
+    DPCT1098:432: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long pos = (long long)*(step + kStepPos);
+    const int h = item_ct1.get_group(2), b = item_ct1.get_group(1),
+              t = item_ct1.get_local_id(2);
+    const bool is_v = item_ct1.get_group(0) == 1;
+    const float x = (is_v ? vcur : kcur)[h * head_dim + b * QK4_0 + t];
+    uint8_t byte;
+    const uint16_t d = q4_group(x, t, byte);
+    const long long page = (long long) table[pos / page_size];
+    if (page >= 0) q4_store(is_v ? v_q4 : k_q4, (page * kv_heads + h) * page_size + (pos % page_size), b, t, d, byte);
+    if (host.k_q4 != nullptr)
+        q4_store(is_v ? host.v_q4 : host.k_q4, ((pos / page_size) * kv_heads + h) * page_size + (pos % page_size), b, t,
+                 d, byte);
+}
+
+// The prompt path: grid (T, kv_heads, groups), K then V; also into the staging pool (identity layout) when given.
+__dpct_inline__ void kv_append_q4_batch_kernel(
+    uint8_t *__restrict__ k_q4, uint8_t *__restrict__ v_q4,
+    const int32_t *__restrict__ table, int64_t pos0,
+    const float *__restrict__ K, const float *__restrict__ V, int kv_heads,
+    int head_dim, int page_size, int is_v_grid, KvHostPools host,
+    KvHostPools stage) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long t = item_ct1.get_group(2);
+    const long long pos = pos0 + t;
+    const int h = item_ct1.get_group(1), b = item_ct1.get_group(0),
+              th = item_ct1.get_local_id(2);
+    const bool is_v = is_v_grid != 0;
+    const float x = (is_v ? V : K)[t * (kv_heads * head_dim) + h * head_dim + b * QK4_0 + th];
+    uint8_t byte;
+    const uint16_t d = q4_group(x, th, byte);
+    const long long page = (long long) table[pos / page_size];
+    const long long row_id = ((pos / page_size) * kv_heads + h) * page_size + (pos % page_size);
+    if (page >= 0) q4_store(is_v ? v_q4 : k_q4, (page * kv_heads + h) * page_size + (pos % page_size), b, th, d, byte);
+    if (host.k_q4 != nullptr) q4_store(is_v ? host.v_q4 : host.k_q4, row_id, b, th, d, byte);
+    if (stage.k_q4 != nullptr) q4_store(is_v ? stage.v_q4 : stage.k_q4, row_id, b, th, d, byte);
+}
+
+// Gather step[kStepWidth] cells into FP16 scratch (the non-fused attention paths)
+__dpct_inline__ void kv_gather_q4_kernel(
+    const uint8_t *__restrict__ k_q4, const uint8_t *__restrict__ v_q4,
+    const int32_t *__restrict__ table, const int32_t *__restrict__ ids,
+    const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
+    uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
+    /*
+    DPCT1098:433: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_ids = (long long)*(step + kStepWidth);
+    const int blocks_per_head = head_dim / QK4_0;                        // 8
+    const int bytes_per_head = blocks_per_head * sizeof(block_q4_0);    // 144
+    const long long total_blocks = n_ids * kv_heads * blocks_per_head;
+
+    const long long blk_idx =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(1) +
+        item_ct1.get_local_id(1);
+    if (blk_idx >= total_blocks) return;
+
+    const int t = item_ct1.get_local_id(2);
+    const long long id = blk_idx / (kv_heads * blocks_per_head);
+    const int rem = (int) (blk_idx % (kv_heads * blocks_per_head));
+    const int h = rem / blocks_per_head;
+    const int b = rem % blocks_per_head;
+
+    const int cell = ids[id];
+    const long long page = (long long) table[cell / page_size];
+    const long long row = (page * kv_heads + h) * page_size + (cell % page_size);
+
+    const block_q4_0* k_blk = reinterpret_cast<const block_q4_0*>(k_q4 + row * bytes_per_head) + b;
+    const block_q4_0* v_blk = reinterpret_cast<const block_q4_0*>(v_q4 + row * bytes_per_head) + b;
+    const float kd = f32_from_f16(k_blk->d);
+    const float vd = f32_from_f16(v_blk->d);
+    const int j = t < 16 ? t : (t - 16);
+    const uint8_t k_byte = k_blk->qs[j];
+    const uint8_t v_byte = v_blk->qs[j];
+    const int kq = (t < 16) ? ((k_byte & 0x0F) - 8) : ((k_byte >> 4) - 8);
+    const int vq = (t < 16) ? ((v_byte & 0x0F) - 8) : ((v_byte >> 4) - 8);
+    const long long dst_offset = ((id * kv_heads + h) * head_dim) + (b * QK4_0 + t);
+    k_scratch[dst_offset] = f16_from_f32((float) kq * kd);
+    v_scratch[dst_offset] = f16_from_f32((float) vq * vd);
+}
+
+void need_256(const QsaShapes& s, const char* what) {
+    if (s.head_dim != 256) {
+        std::fprintf(stderr, "%s: head_dim must be 256 (the Hadamard transform's size)\n", what);
+        std::exit(1);
+    }
+}
+
+}  // namespace
+
+void fwht256_cuda(const float* src, float* dst, int64_t n_rows, void* stream) {
+    if (n_rows <= 0) return;
+    const int rows_per_block = 4;
+    const int64_t num_blocks = (n_rows + rows_per_block - 1) / rows_per_block;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto ct3 = 1.0f / 16.0f;
+
+                cgh.parallel_for<dpct_kernel_name<class fwht256_kernel_d551a1>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)num_blocks) *
+                                          sycl::range(1, rows_per_block, 32),
+                                      sycl::range(1, rows_per_block, 32)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            fwht256_kernel(src, dst, n_rows, ct3);
+                        });
+            });
+    }
+    check("fwht256 launch");
+}
+
+void kv_append_q4_step(uint8_t* k_q4, uint8_t* v_q4, const int32_t* page_table, const int32_t* step,
+                       const float* kcur, const float* vcur, const QsaShapes& s, void* stream,
+                       const KvHostPools* host) {
+    need_256(s, "kv_append_q4");
+    const dpct::dim3 grid((unsigned)s.n_head_kv, (unsigned)(s.head_dim / QK4_0),
+                          2);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                KvHostPools host_host_KvHostPools_ct9 =
+                    host ? *host : KvHostPools{};
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class kv_append_q4_kernel_f256b8>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            kv_append_q4_kernel(
+                                k_q4, v_q4, page_table, step, kcur, vcur,
+                                (int)s.n_head_kv, (int)s.head_dim,
+                                (int)s.page_size, host_host_KvHostPools_ct9);
+                        });
+            });
+    }
+    check("kv_append_q4 launch");
+}
+
+void kv_append_q4(uint8_t* k_q4, uint8_t* v_q4, const int32_t* page_table, int64_t pos0, int64_t T, const float* K,
+                  const float* V, const QsaShapes& s, void* stream, const KvHostPools* host, const KvHostPools* stage) {
+    if (T <= 0) return;
+    need_256(s, "kv_append_q4");
+    const dpct::dim3 grid((unsigned)T, (unsigned)s.n_head_kv,
+                          (unsigned)(s.head_dim / QK4_0));
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const KvHostPools h = host ? *host : KvHostPools{}, st = stage ? *stage : KvHostPools{};
+    for (int is_v = 0; is_v < 2; ++is_v)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->parallel_for<
+            dpct_kernel_name<class kv_append_q4_batch_kernel_11c37a>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, 32),
+                              sycl::range(1, 1, 32)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                kv_append_q4_batch_kernel(k_q4, v_q4, page_table, pos0, K, V,
+                                          (int)s.n_head_kv, (int)s.head_dim,
+                                          (int)s.page_size, is_v, h, st);
+            });
+    }
+    check("kv_append_q4 batch launch");
+}
+
+void kv_gather_q4_step(const uint8_t* k_q4, const uint8_t* v_q4, const int32_t* page_table, const int32_t* ids,
+                       const int32_t* step, int64_t max_ids, const QsaShapes& s, uint16_t* k_scratch,
+                       uint16_t* v_scratch, void* stream) {
+    if (max_ids <= 0) return;
+    const int blocks_per_head = (int) (s.head_dim / QK4_0);
+    const int64_t total_blocks = max_ids * s.n_head_kv * blocks_per_head;
+    const int rows_per_block = 4;
+    const unsigned num_blocks = (unsigned) ((total_blocks + rows_per_block - 1) / rows_per_block);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class kv_gather_q4_kernel_300c16>>(
+                sycl::nd_range<3>(sycl::range(1, 1, num_blocks) *
+                                      sycl::range(1, rows_per_block, 32),
+                                  sycl::range(1, rows_per_block, 32)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    kv_gather_q4_kernel(k_q4, v_q4, page_table, ids, step,
+                                        (int)s.n_head_kv, (int)s.head_dim,
+                                        (int)s.page_size, k_scratch, v_scratch);
+                });
+    }
+    check("kv_gather_q4 launch");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/kv_q8.dp.cpp b/sycl/src/kernels/cuda/kv_q8.dp.cpp
new file mode 100644
index 00000000000..952d40ad937
--- /dev/null
+++ b/sycl/src/kernels/cuda/kv_q8.dp.cpp
@@ -0,0 +1,204 @@
+// src/kernels/cuda/kv_q8.cu - see include/strata/kernels/kv_q8.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+void check(const char* what) {
+    /*
+    DPCT1010:1135: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+void validate(const QsaShapes& s, const char* what) {
+    if (s.head_dim % KV_Q8_GROUP != 0 || s.n_head_kv <= 0 || s.page_size <= 0) {
+        std::fprintf(stderr, "kv_q8: %s: head_dim %lld must be a multiple of %d\n", what, (long long) s.head_dim,
+                     KV_Q8_GROUP);
+        std::exit(1);
+    }
+}
+
+// One block = one 64-value group of one KV head of K (blockIdx.z = 0) or V (1); 64 threads, one value each.
+__dpct_inline__ void kv_append_q8_kernel(
+    int8_t *__restrict__ k_q, int8_t *__restrict__ v_q,
+    uint16_t *__restrict__ k_scale, uint16_t *__restrict__ v_scale,
+    const int32_t *__restrict__ table, const int32_t *__restrict__ step,
+    const float *__restrict__ kcur, const float *__restrict__ vcur,
+    int kv_heads, int head_dim, int page_size, KvHostPools host) {
+    /*
+    DPCT1098:1138: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long pos = (long long)*(step + kStepPos);
+    const int h = item_ct1.get_group(2), g = item_ct1.get_group(1),
+              t = item_ct1.get_local_id(2);
+    const bool is_v = item_ct1.get_group(0) == 1;
+    const int groups = head_dim / KV_Q8_GROUP;
+    const float x = (is_v ? vcur : kcur)[h * head_dim + g * KV_Q8_GROUP + t];
+    // max |x| over the 64 values: two warps, then combine through shared memory in a fixed order
+    float a = sycl::fabs(x);
+    /*
+DPCT1108:289: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) a = sycl::fmax(
+        a, dpct::experimental::permute_sub_group_by_xor(
+               0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+               a, o));
+    auto &warp_max =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if ((t & 31) == 0) warp_max[t >> 5] = a;
+    /*
+    DPCT1065:1137: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float amax = sycl::fmax(warp_max[0], warp_max[1]);
+    const uint16_t sbits = f16_from_f32(amax / 127.0f);
+    const float sf = f32_from_f16(sbits);                          // quantize against the STORED scale
+    int q = 0;
+    if (sf > 0.0f) {
+        q = sycl::vec<float, 1>{(x / sf)}
+                .convert<int, sycl::rounding_mode::rte>()[0];
+        q = q < -127 ? -127 : (q > 127 ? 127 : q);
+    }
+    // KV streaming: the host copy (identity layout) always, the VRAM page only if the block is resident
+    const long long page = (long long) table[pos / page_size];
+    if (page >= 0) {
+        const long long row = (page * kv_heads + h) * page_size + (pos % page_size);
+        (is_v ? v_q : k_q)[row * head_dim + g * KV_Q8_GROUP + t] = (int8_t) q;
+        if (t == 0) (is_v ? v_scale : k_scale)[row * groups + g] = sbits;
+    }
+    if (host.k_q != nullptr) {
+        const long long row = ((pos / page_size) * kv_heads + h) * page_size + (pos % page_size);
+        (is_v ? host.v_q : host.k_q)[row * head_dim + g * KV_Q8_GROUP + t] = (int8_t) q;
+        if (t == 0) (is_v ? host.v_scale : host.k_scale)[row * groups + g] = sbits;
+    }
+}
+
+// One thread = 4 consecutive values of one cell and head (as the FP16 gather does with uint2).
+__dpct_inline__ void kv_gather_q8_kernel(
+    const int8_t *__restrict__ k_q, const int8_t *__restrict__ v_q,
+    const uint16_t *__restrict__ k_scale, const uint16_t *__restrict__ v_scale,
+    const int32_t *__restrict__ table, const int32_t *__restrict__ ids,
+    const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
+    uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
+    /*
+    DPCT1098:1139: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_ids = (long long)*(step + kStepWidth);
+    const int per = head_dim / 4;
+    const long long total = n_ids * kv_heads * per;
+    const long long i =
+        item_ct1.get_group(2) * (long long)item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= total) return;
+    const long long id = i / (kv_heads * (long long) per);
+    const int rem = (int) (i % (kv_heads * (long long) per));
+    const int h = rem / per, q4 = rem - h * per;
+    const int cell = ids[id];
+    const long long page = (long long) table[cell / page_size];
+    const long long row = (page * kv_heads + h) * page_size + (cell % page_size);
+    const int d = q4 * 4;
+    const int groups = head_dim / KV_Q8_GROUP;
+    const float ks = f32_from_f16(k_scale[row * groups + d / KV_Q8_GROUP]);
+    const float vs = f32_from_f16(v_scale[row * groups + d / KV_Q8_GROUP]);
+    const sycl::char4 kc =
+        reinterpret_cast<const sycl::char4 *>(k_q + row * head_dim)[q4];
+    const sycl::char4 vc =
+        reinterpret_cast<const sycl::char4 *>(v_q + row * head_dim)[q4];
+    sycl::ushort4 ko, vo;
+    ko.x() = f16_from_f32((float)kc.x() * ks);
+        ko.y() = f16_from_f32((float)kc.y() * ks);
+    ko.z() = f16_from_f32((float)kc.z() * ks);
+        ko.w() = f16_from_f32((float)kc.w() * ks);
+    vo.x() = f16_from_f32((float)vc.x() * vs);
+        vo.y() = f16_from_f32((float)vc.y() * vs);
+    vo.z() = f16_from_f32((float)vc.z() * vs);
+        vo.w() = f16_from_f32((float)vc.w() * vs);
+    const long long dst = (id * kv_heads + h) * (long long) per + q4;
+    reinterpret_cast<sycl::ushort4 *>(k_scratch)[dst] = ko;
+    reinterpret_cast<sycl::ushort4 *>(v_scratch)[dst] = vo;
+}
+
+}  // namespace
+
+void kv_append_q8_step(int8_t* k_q, int8_t* v_q, uint16_t* k_scale, uint16_t* v_scale, const int32_t* page_table,
+                       const int32_t* step, const float* kcur, const float* vcur, const QsaShapes& s, void* stream,
+                       const KvHostPools* host) {
+    validate(s, "kv_append_q8");
+    const dpct::dim3 grid((unsigned)s.n_head_kv,
+                          (unsigned)(s.head_dim / KV_Q8_GROUP), 2);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                KvHostPools host_host_KvHostPools_ct11 =
+                    host ? *host : KvHostPools{};
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class kv_append_q8_kernel_b60fdc>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, KV_Q8_GROUP),
+                                      sycl::range(1, 1, KV_Q8_GROUP)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            kv_append_q8_kernel(
+                                k_q, v_q, k_scale, v_scale, page_table, step,
+                                kcur, vcur, (int)s.n_head_kv, (int)s.head_dim,
+                                (int)s.page_size, host_host_KvHostPools_ct11);
+                        });
+            });
+    }
+    check("kv_append_q8 launch");
+}
+
+void kv_gather_q8_step(const int8_t* k_q, const int8_t* v_q, const uint16_t* k_scale, const uint16_t* v_scale,
+                       const int32_t* page_table, const int32_t* ids, const int32_t* step, int64_t max_ids,
+                       const QsaShapes& s, uint16_t* k_scratch, uint16_t* v_scratch, void* stream) {
+    validate(s, "kv_gather_q8");
+    if (max_ids <= 0) return;
+    const long long total = max_ids * s.n_head_kv * (s.head_dim / 4);
+    const unsigned blocks = (unsigned) ((total + 255) / 256);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class kv_gather_q8_kernel_84cbb3>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    kv_gather_q8_kernel(k_q, v_q, k_scale, v_scale, page_table,
+                                        ids, step, (int)s.n_head_kv,
+                                        (int)s.head_dim, (int)s.page_size,
+                                        k_scratch, v_scratch);
+                });
+    }
+    check("kv_gather_q8 launch");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/kv_stream.dp.cpp b/sycl/src/kernels/cuda/kv_stream.dp.cpp
new file mode 100644
index 00000000000..fe1769d1b81
--- /dev/null
+++ b/sycl/src/kernels/cuda/kv_stream.dp.cpp
@@ -0,0 +1,459 @@
+// src/kernels/cuda/kv_stream.cu - see include/strata/kernels/kv_stream.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/kv_stream.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+
+#include <algorithm>
+#include <cstdio>
+#include <cstdlib>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+
+void check(const char* what) {
+    /*
+    DPCT1010:314: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+constexpr int RT = 1024;   // the resolve block
+
+// The per-block byte runs of the (up to four) pool arrays: block b of array i is bytes [b * len, (b + 1) * len).
+struct Runs {
+    const uint8_t* src[4];
+    uint8_t* dst[4];
+    int len[4];
+    int n;
+};
+
+Runs runs_of(const QsaAttnPools& slots, const KvHostPools& host, int fmt, const QsaShapes& s) {
+    const int rows = (int) (s.n_head_kv * s.page_size);
+    Runs r{};
+    if (fmt == kKvQ4) {
+        const int bytes = rows * (int) kv_q4_bytes_per_head((int) s.head_dim);
+        r.src[0] = (const uint8_t*) host.k_q4; r.dst[0] = (uint8_t*) slots.k_q4; r.len[0] = bytes;
+        r.src[1] = (const uint8_t*) host.v_q4; r.dst[1] = (uint8_t*) slots.v_q4; r.len[1] = bytes;
+        r.n = 2;
+    } else if (fmt == kKvInt8) {
+        const int codes = rows * (int) s.head_dim, scales = rows * (int) (s.head_dim / KV_Q8_GROUP) * 2;
+        r.src[0] = (const uint8_t*) host.k_q;     r.dst[0] = (uint8_t*) slots.k_q;     r.len[0] = codes;
+        r.src[1] = (const uint8_t*) host.v_q;     r.dst[1] = (uint8_t*) slots.v_q;     r.len[1] = codes;
+        r.src[2] = (const uint8_t*) host.k_scale; r.dst[2] = (uint8_t*) slots.k_scale; r.len[2] = scales;
+        r.src[3] = (const uint8_t*) host.v_scale; r.dst[3] = (uint8_t*) slots.v_scale; r.len[3] = scales;
+        r.n = 4;
+    } else {
+        const int bytes = rows * (int) s.head_dim * 2;
+        r.src[0] = (const uint8_t*) host.k_pool; r.dst[0] = (uint8_t*) slots.k_pool; r.len[0] = bytes;
+        r.src[1] = (const uint8_t*) host.v_pool; r.dst[1] = (uint8_t*) slots.v_pool; r.len[1] = bytes;
+        r.n = 2;
+    }
+    return r;
+}
+
+// Block-wide exclusive prefix sum of one int per thread (RT threads); `total` is the sum over the block.
+inline int block_scan(int v, int *warp_sums, int &total) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              w = item_ct1.get_local_id(2) >> 5;
+    int x = v;
+    for (int o = 1; o < 32; o <<= 1) {
+        /*
+        DPCT1108:29: '__shfl_up_sync' was migrated with the experimental feature
+        masked sub_group function which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        const int y = dpct::experimental::shift_sub_group_right(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            o);
+        if (lane >= o) x += y;
+    }
+    if (lane == 31) warp_sums[w] = x;
+    /*
+    DPCT1065:316: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (w == 0) {
+        int t = warp_sums[lane];
+        for (int o = 1; o < 32; o <<= 1) {
+            /*
+            DPCT1108:30: '__shfl_up_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int y = dpct::experimental::shift_sub_group_right(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                t, o);
+            if (lane >= o) t += y;
+        }
+        warp_sums[lane] = t;
+    }
+    /*
+    DPCT1065:317: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    total = warp_sums[31];
+    const int excl = x - v + (w > 0 ? warp_sums[w - 1] : 0);
+    /*
+    DPCT1065:318: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return excl;
+}
+
+__dpct_inline__ void resolve_kernel(KvStreamMap m,
+                                    const int32_t *__restrict__ ids,
+                                    const int32_t *__restrict__ steps, int n_q,
+                                    int cap, int page_size) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_lookups = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_cut = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &warp_sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int epoch = m.ctl[0] + 1;
+    if (item_ct1.get_local_id(2) == 0) { s_nmiss = 0; s_lookups = 0; }
+    /*
+    DPCT1065:319: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // 1. hits take this epoch and their reference bit; a missing block is claimed exactly once (-1 -> -2)
+    int lookups = 0;
+    for (int q = 0; q < n_q; ++q) {
+        const int width = steps[q * kStepCount + kStepWidth];
+        const int32_t* qi = ids + (long long) q * cap;
+        for (int i = item_ct1.get_local_id(2); i < width; i += RT) {
+            const int b = qi[i] / page_size;
+            if (i > 0 && qi[i - 1] / page_size == b) continue;   // ids are ascending: one lookup per block
+            ++lookups;
+            const int sl = m.page_table[b];
+            if (sl >= 0) {
+                m.slot_stamp[sl] = epoch;
+                m.slot_ref[sl] = 1;
+            } else if (sl == -1 &&
+                       dpct::atomic_compare_exchange_strong<
+                           sycl::access::address_space::generic_space>(
+                           &m.page_table[b], -1, -2) == -1) {
+                m.miss_block[dpct::atomic_fetch_add<
+                    sycl::access::address_space::generic_space>(&s_nmiss, 1)] =
+                    b;
+            }
+        }
+    }
+    dpct::atomic_fetch_add<sycl::access::address_space::generic_space>(
+        &s_lookups, lookups);
+    /*
+    DPCT1065:320: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // 2. one victim per miss: a clock sweep from the hand. A slot this call uses (stamp == epoch) is never taken;
+    //    a referenced one loses its bit as the hand passes it and is taken on the next pass.
+    const int need = s_nmiss, n = (int) m.n_slots;
+    int hand = m.ctl[1], got = 0;
+    for (int scanned = 0; got < need && scanned < 3 * n; scanned += RT) {
+        const int j = (int)(((long long)hand + item_ct1.get_local_id(2)) % n);
+        const bool mine = m.slot_stamp[j] == epoch;
+        const bool cand = !mine && (m.slot_block[j] < 0 || m.slot_ref[j] == 0);
+        int total = 0;
+        const int rank = block_scan(cand ? 1 : 0, warp_sums, total);
+        const int want = need - got;
+        if (item_ct1.get_local_id(2) == 0) s_cut = RT;
+        /*
+        DPCT1118:31: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:321: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (cand && rank == want - 1) s_cut =
+            item_ct1.get_local_id(2) +
+            1; // the hand stops just past the last slot taken
+        /*
+        DPCT1118:32: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:322: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const int cut = s_cut;
+        if (cand && rank < want) {
+            m.miss_slot[got + rank] = j;
+            m.slot_stamp[j] = epoch;   // taken: a sweep that wraps around must not take it twice
+        } else if (item_ct1.get_local_id(2) < cut && !mine) {
+            m.slot_ref[j] = 0;
+        }
+        got += total < want ? total : want;
+        hand = (int) (((long long) hand + cut) % n);
+        /*
+        DPCT1118:33: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:323: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+    }
+    // 3. re-point the table; the copy kernel fills the slots
+    const int placed = got < need ? got : need;
+    for (int k = item_ct1.get_local_id(2); k < need; k += RT) {
+        const int b = m.miss_block[k];
+        if (k >= placed) { m.page_table[b] = -1; continue; }   // overflow: never happens with a legal n_slots
+        const int sl = m.miss_slot[k];
+        const int old = m.slot_block[sl];
+        if (old >= 0) m.page_table[old] = -1;
+        m.slot_block[sl] = b;
+        m.slot_stamp[sl] = epoch;
+        m.slot_ref[sl] = 1;
+        m.page_table[b] = sl;
+    }
+    if (item_ct1.get_local_id(2) == 0) {
+        m.ctl[0] = epoch;
+        m.ctl[1] = hand;
+        m.ctl[2] = placed;
+        if (placed < need) m.ctl[3] = 1;
+        unsigned long long* c = reinterpret_cast<unsigned long long*>(m.ctl + 4);
+        c[0] += (unsigned long long) placed;
+        c[1] += (unsigned long long) s_lookups;
+        c[2] += 1ull;
+    }
+}
+
+// One block per missed block (grid-stride): copy its runs from the host copy into its slot, 16 B per thread.
+__dpct_inline__ void copy_kernel(KvStreamMap m, Runs r) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int need = m.ctl[2];
+    for (int k = item_ct1.get_group(2); k < need;
+         k += item_ct1.get_group_range(2)) {
+        const long long b = m.miss_block[k], sl = m.miss_slot[k];
+        for (int a = 0; a < r.n; ++a) {
+            const sycl::uint4 *src =
+                reinterpret_cast<const sycl::uint4 *>(r.src[a] + b * r.len[a]);
+            sycl::uint4 *dst =
+                reinterpret_cast<sycl::uint4 *>(r.dst[a] + sl * r.len[a]);
+#pragma unroll
+            for (int i = item_ct1.get_local_id(2); i < r.len[a] / 16;
+                 i += item_ct1.get_local_range(2)) dst[i] = src[i];
+        }
+    }
+}
+
+__dpct_inline__ void reset_kernel(KvStreamMap m) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i0 = (long long)item_ct1.get_group(2) *
+                             item_ct1.get_local_range(2) +
+                         item_ct1.get_local_id(2),
+                    st = (long long)item_ct1.get_group_range(2) *
+                         item_ct1.get_local_range(2);
+#pragma unroll
+    for (long long i = i0; i < m.n_blocks; i += st) m.page_table[i] = -1;
+#pragma unroll
+    for (long long i = i0; i < m.n_slots; i += st) {
+        m.slot_block[i] = -1;
+        m.slot_stamp[i] = -1;
+        m.slot_ref[i] = 0;
+    }
+    if (i0 < kKvCtlInts) m.ctl[i0] = 0;
+}
+
+__dpct_inline__ void ring_kernel(int32_t *table, long long n_blocks,
+                                 long long n_slots) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (long long i =
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n_blocks; i += (long long)item_ct1.get_group_range(2) *
+                            item_ct1.get_local_range(2))
+        table[i] = (int32_t) (i % n_slots);
+}
+
+}  // namespace
+
+uint64_t kv_block_bytes(const QsaShapes& s, int fmt) {
+    const uint64_t rows = (uint64_t) (s.n_head_kv * s.page_size);
+    if (fmt == kKvQ4) return rows * kv_q4_bytes_per_head((int) s.head_dim) * 2;
+    return fmt == kKvInt8 ? rows * (uint64_t) s.head_dim * 2 + rows * (uint64_t) (s.head_dim / KV_Q8_GROUP) * 2 * 2
+                : rows * (uint64_t) s.head_dim * 2 * 2;
+}
+
+void kv_stream_reset(const KvStreamMap& m, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class reset_kernel_f02a82>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    reset_kernel(m);
+                });
+    }
+    check("reset");
+}
+
+void kv_stream_resolve(const KvStreamMap& m, const QsaAttnPools& slots, const KvHostPools& host, int fmt,
+                       const int32_t* ids, const int32_t* steps, int64_t n_q, int64_t cap, const QsaShapes& s,
+                       void* stream) {
+    if (n_q <= 0) return;
+    if (s.n_head_kv * s.page_size * (s.head_dim / KV_Q8_GROUP) * 2 % 16 != 0) {
+        std::fprintf(stderr, "kv_stream: a block's scale run must be a multiple of 16 bytes\n");
+        std::exit(1);
+    }
+    /*
+    DPCT1049:34: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class resolve_kernel_d27792>>(
+                sycl::nd_range<3>(sycl::range(1, 1, RT), sycl::range(1, 1, RT)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        resolve_kernel(m, ids, steps, (int)n_q, (int)cap,
+                                       (int)s.page_size);
+                    });
+    }
+    check("resolve");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto runs_of_slots_host_fmt_s_ct1 =
+                    runs_of(slots, host, fmt, s);
+
+                cgh.parallel_for<dpct_kernel_name<class copy_kernel_e47935>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, 96) *
+                                          sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        copy_kernel(m, runs_of_slots_host_fmt_s_ct1);
+                    });
+            });
+    }
+    check("copy");
+}
+
+void kv_ring_table(int32_t* page_table, int64_t n_blocks, int64_t n_slots, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class ring_kernel_728502>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 64) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    ring_kernel(page_table, n_blocks, n_slots);
+                });
+    }
+    check("ring table");
+}
+
+void kv_ring_restore(const QsaAttnPools &slots, const KvHostPools &host,
+                     int fmt, int64_t b0, int64_t b1, int64_t n_slots,
+                     const QsaShapes &s, void *stream) try {
+    const Runs r = runs_of(slots, host, fmt, s);
+    for (int64_t b = b0; b < b1;) {
+        const int64_t sl = b % n_slots, run = std::min<int64_t>(b1 - b, n_slots - sl);   // up to the ring's end
+        for (int a = 0; a < r.n; ++a)
+            /*
+            DPCT1124:324: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+                    r.dst[a] + sl * r.len[a], r.src[a] + b * r.len[a],
+                    (size_t)(run * r.len[a]))) != 0)
+                check("ring restore");
+        b += run;
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void kv_stage_from_host(const QsaAttnPools &stage, const KvHostPools &host,
+                        int fmt, int64_t n_blocks, const QsaShapes &s,
+                        void *stream) try {
+    if (n_blocks <= 0) return;
+    const Runs r = runs_of(stage, host, fmt, s);
+    for (int a = 0; a < r.n; ++a)
+        /*
+        DPCT1124:325: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+                r.dst[a], r.src[a], (size_t)(n_blocks * r.len[a]))) != 0)
+            check("stage");
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+KvStreamCounters kv_stream_counters(const KvStreamMap &m) try {
+    int32_t c[kKvCtlInts] = {};
+    KvStreamCounters r;
+    if (m.ctl == nullptr ||
+        DPCT_CHECK_ERROR(
+            dpct::get_in_order_queue().memcpy(c, m.ctl, sizeof(c)).wait()) !=
+            0) return r;
+    const unsigned long long* u = reinterpret_cast<const unsigned long long*>(c + 4);
+    r.misses = u[0];
+    r.lookups = u[1];
+    r.calls = u[2];
+    r.overflow = c[3] != 0;
+    return r;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_bf16.dp.cpp b/sycl/src/kernels/cuda/native_bf16.dp.cpp
new file mode 100644
index 00000000000..6745f079811
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_bf16.dp.cpp
@@ -0,0 +1,345 @@
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/bf16_bits.hpp"
+
+#include <limits>
+#include <stdexcept>
+#include <string>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+
+// The FP32-activation MMVF implementation below is adapted from llama.cpp
+// 3cf03257f219afbe7334045ff7c6a06ac68c627d, ggml/src/ggml-cuda/{mmvf.cu,common.cuh}.
+// Scope: ordinary contiguous BF16 matrix, one FP32 activation vector, no fusion/ids/channels.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+__dpct_inline__ float mmvf_warp_sum(float value) {
+#pragma unroll
+    for (int offset = 16; offset > 0; offset >>= 1)
+        /*
+        DPCT1108:288: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        value += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    return value;
+}
+
+template <int BLOCK_SIZE>
+__dpct_inline__ void bf16_f32_mmvf_kernel(const float *__restrict__ x,
+                                          const uint16_t *__restrict__ w,
+                                          float *__restrict__ y, int n_in) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_local_id(2);
+    const uint16_t *row = w + (size_t)item_ct1.get_group(2) * n_in;
+    const uint32_t* weights2 = reinterpret_cast<const uint32_t*>(row);
+    const sycl::float2 *inputs2 = reinterpret_cast<const sycl::float2 *>(x);
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if constexpr (BLOCK_SIZE > 32) {
+        if (t < 32) partials[t] = 0.0f;
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    float acc = 0.0f;
+    for (int pair = t; pair < n_in / 2; pair += BLOCK_SIZE) {
+        const uint32_t weight = weights2[pair];
+        const sycl::float2 input = inputs2[pair];
+        // Match the two ordered multiply-adds in ggml_cuda_mad, not a pair sum followed by one add.
+        /*
+        DPCT1013:1094: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        acc = sycl::fma(f32_from_bf16((uint16_t)weight), input.x(), acc);
+        /*
+        DPCT1013:1095: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        acc =
+            sycl::fma(f32_from_bf16((uint16_t)(weight >> 16)), input.y(), acc);
+    }
+    acc = mmvf_warp_sum(acc);
+    if constexpr (BLOCK_SIZE > 32) {
+        // All lanes have the same reduced value; one store avoids a same-value shared-memory race.
+        if ((t & 31) == 0) partials[t / 32] = acc;
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        if (t < 32) acc = mmvf_warp_sum(partials[t]);
+    }
+    if (t == 0) y[item_ct1.get_group(2)] = acc;
+}
+
+// the same kernel for up to 8 activation rows - the weight row is read ONCE and every
+// token keeps its own accumulator with exactly the single-row kernel's order (pairs, two ordered FMAs, the same warp
+// and block reductions), so each output is bit-identical to a bf16_f32_mmvf_kernel launch of its own.
+template <int BLOCK_SIZE, int NT>
+__dpct_inline__ void bf16_f32_mmvf_multi_kernel(
+    const float *__restrict__ x, int64_t ldx, const uint16_t *__restrict__ w,
+    float *__restrict__ y, int64_t ldy, int n_in, int n_tok) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_local_id(2);
+    const uint16_t *row = w + (size_t)item_ct1.get_group(2) * n_in;
+    const uint32_t* weights2 = reinterpret_cast<const uint32_t*>(row);
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[NT][32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if constexpr (BLOCK_SIZE > 32) {
+        if (t < 32)
+#pragma unroll
+            for (int k = 0; k < NT; ++k) partials[k][t] = 0.0f;
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    float acc[NT];
+#pragma unroll
+    for (int k = 0; k < NT; ++k) acc[k] = 0.0f;
+    for (int pair = t; pair < n_in / 2; pair += BLOCK_SIZE) {
+        const uint32_t weight = weights2[pair];
+        const float w0 = f32_from_bf16((uint16_t) weight), w1 = f32_from_bf16((uint16_t) (weight >> 16));
+#pragma unroll
+        for (int k = 0; k < NT; ++k) {
+            if (k < n_tok) {
+                const sycl::float2 input =
+                    reinterpret_cast<const sycl::float2 *>(x + (size_t)k *
+                                                                   ldx)[pair];
+                /*
+                DPCT1013:1096: The rounding mode could not be specified and the
+                generated code may have different accuracy than the original
+                code. Verify the correctness. SYCL math built-in function
+                rounding mode is aligned with OpenCL C 1.2 standard.
+                */
+                acc[k] = sycl::fma(w0, input.x(), acc[k]);
+                /*
+                DPCT1013:1097: The rounding mode could not be specified and the
+                generated code may have different accuracy than the original
+                code. Verify the correctness. SYCL math built-in function
+                rounding mode is aligned with OpenCL C 1.2 standard.
+                */
+                acc[k] = sycl::fma(w1, input.y(), acc[k]);
+            }
+        }
+    }
+#pragma unroll
+    for (int k = 0; k < NT; ++k) acc[k] = mmvf_warp_sum(acc[k]);
+    if constexpr (BLOCK_SIZE > 32) {
+        if ((t & 31) == 0)
+#pragma unroll
+            for (int k = 0; k < NT; ++k) partials[k][t / 32] = acc[k];
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        if (t < 32)
+#pragma unroll
+            for (int k = 0; k < NT; ++k) acc[k] = mmvf_warp_sum(partials[k][t]);
+    }
+    if (t == 0)
+#pragma unroll
+        for (int k = 0; k < NT; ++k)
+            if (k < n_tok) y[(size_t)k * ldy + item_ct1.get_group(2)] = acc[k];
+}
+
+int mmvf_block_size(int64_t n_in) {
+    int best = 32;
+    int64_t best_iterations = (n_in + 63) / 64;
+    for (int candidate = 64; candidate <= 256; candidate += 32) {
+        const int64_t iterations = (n_in + 2 * candidate - 1) / (2 * candidate);
+        if (iterations < best_iterations) {
+            best_iterations = iterations;
+            best = candidate;
+        }
+    }
+    return best;
+}
+
+}  // namespace
+
+void bf16_gemv_fp32_mmvf_multi(const float* x, int64_t ldx, const uint16_t* w, float* y, int64_t ldy,
+                               int64_t n_in, int64_t n_out, int n_tok, void* stream) {
+    if (n_tok == 1 && ldy >= n_out) { bf16_gemv_fp32_mmvf(x, w, y, n_in, n_out, stream); return; }
+    if (n_tok < 1 || n_tok > 8 || n_in <= 0 || (n_in & 1) != 0 || n_out <= 0 || (ldx & 1) != 0 || x == nullptr ||
+        w == nullptr || y == nullptr || (reinterpret_cast<uintptr_t>(x) & 7u) != 0)
+        throw std::invalid_argument("bf16_gemv_fp32_mmvf_multi: 1..8 rows, even n_in/ldx, aligned pointers");
+    const dpct::queue_ptr st = strata::q_of(stream);
+#define STRATA_MMVF_M(N)                                                       \
+    case N:                                                                    \
+        if (n_tok <= 4) {                                                      \
+            auto exp_props = sycl::ext::oneapi::experimental::properties{      \
+                sycl::ext::oneapi::experimental::use_root_sync};               \
+                                                                               \
+            st->submit([&](sycl::handler &cgh) {                               \
+                auto x_ct0 = x;                                                \
+                auto ldx_ct1 = ldx;                                            \
+                auto w_ct2 = w;                                                \
+                auto y_ct3 = y;                                                \
+                auto ldy_ct4 = ldy;                                            \
+                auto n_in_ct5 = (int)n_in;                                     \
+                auto n_tok_ct6 = n_tok;                                        \
+                                                                               \
+                cgh.parallel_for<dpct_kernel_name<                             \
+                    class bf16_f32_mmvf_multi_kernel_c4da69,                   \
+                    dpct_kernel_scalar<N>, dpct_kernel_scalar<4>>>(            \
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *     \
+                                          sycl::range(1, 1, N),                \
+                                      sycl::range(1, 1, N)),                   \
+                    exp_props,                                                 \
+                    [=](sycl::nd_item<3> item_ct1)                             \
+                        [[sycl::reqd_sub_group_size(32)]] {                    \
+                            bf16_f32_mmvf_multi_kernel<N, 4>(                  \
+                                x_ct0, ldx_ct1, w_ct2, y_ct3, ldy_ct4,         \
+                                n_in_ct5, n_tok_ct6);                          \
+                        });                                                    \
+            });                                                                \
+        } else {                                                               \
+            auto exp_props = sycl::ext::oneapi::experimental::properties{      \
+                sycl::ext::oneapi::experimental::use_root_sync};               \
+                                                                               \
+            st->submit([&](sycl::handler &cgh) {                               \
+                auto x_ct0 = x;                                                \
+                auto ldx_ct1 = ldx;                                            \
+                auto w_ct2 = w;                                                \
+                auto y_ct3 = y;                                                \
+                auto ldy_ct4 = ldy;                                            \
+                auto n_in_ct5 = (int)n_in;                                     \
+                auto n_tok_ct6 = n_tok;                                        \
+                                                                               \
+                cgh.parallel_for<dpct_kernel_name<                             \
+                    class bf16_f32_mmvf_multi_kernel_e8550d,                   \
+                    dpct_kernel_scalar<N>, dpct_kernel_scalar<8>>>(            \
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *     \
+                                          sycl::range(1, 1, N),                \
+                                      sycl::range(1, 1, N)),                   \
+                    exp_props,                                                 \
+                    [=](sycl::nd_item<3> item_ct1)                             \
+                        [[sycl::reqd_sub_group_size(32)]] {                    \
+                            bf16_f32_mmvf_multi_kernel<N, 8>(                  \
+                                x_ct0, ldx_ct1, w_ct2, y_ct3, ldy_ct4,         \
+                                n_in_ct5, n_tok_ct6);                          \
+                        });                                                    \
+            });                                                                \
+        } break
+    switch (mmvf_block_size(n_in)) {
+        STRATA_MMVF_M(32); STRATA_MMVF_M(64); STRATA_MMVF_M(96); STRATA_MMVF_M(128);
+        STRATA_MMVF_M(160); STRATA_MMVF_M(192); STRATA_MMVF_M(224); STRATA_MMVF_M(256);
+    }
+#undef STRATA_MMVF_M
+    /*
+    DPCT1010:1100: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 result = 0;
+    /*
+    DPCT1000:1099: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (result != 0)
+        /*
+        DPCT1009:1101: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:1098: The statement could not be removed.
+        */
+        throw std::runtime_error(
+            std::string("bf16_gemv_fp32_mmvf_multi launch: ") +
+            dpct::get_error_string_dummy(result));
+}
+
+void bf16_gemv_fp32_mmvf(const float* x, const uint16_t* w, float* y,
+                         int64_t n_in, int64_t n_out, void* stream) {
+    if (n_in <= 0 || (n_in & 1) != 0 || n_in > std::numeric_limits<int>::max() ||
+        n_out <= 0 || n_out > std::numeric_limits<int>::max())
+        throw std::invalid_argument("bf16_gemv_fp32_mmvf: require positive even n_in and positive n_out <= INT_MAX");
+    if (x == nullptr || w == nullptr || y == nullptr ||
+        (reinterpret_cast<uintptr_t>(x) & 7u) != 0 ||
+        (reinterpret_cast<uintptr_t>(w) & 3u) != 0 ||
+        (reinterpret_cast<uintptr_t>(y) & 3u) != 0)
+        throw std::invalid_argument("bf16_gemv_fp32_mmvf: null or misaligned pointer");
+    const dpct::queue_ptr st = strata::q_of(stream);
+#define STRATA_MMVF_CASE(N)                                                    \
+    case N: {                                                                  \
+        auto exp_props = sycl::ext::oneapi::experimental::properties{          \
+            sycl::ext::oneapi::experimental::use_root_sync};                   \
+                                                                               \
+        st->submit([&](sycl::handler &cgh) {                                   \
+            auto x_ct0 = x;                                                    \
+            auto w_ct1 = w;                                                    \
+            auto y_ct2 = y;                                                    \
+            auto n_in_ct3 = (int)n_in;                                         \
+                                                                               \
+            cgh.parallel_for<dpct_kernel_name<                                 \
+                class bf16_f32_mmvf_kernel_2903a5, dpct_kernel_scalar<N>>>(    \
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *         \
+                                      sycl::range(1, 1, N),                    \
+                                  sycl::range(1, 1, N)),                       \
+                exp_props,                                                     \
+                [=](sycl::nd_item<3> item_ct1)                                 \
+                    [[sycl::reqd_sub_group_size(32)]] {                        \
+                        bf16_f32_mmvf_kernel<N>(x_ct0, w_ct1, y_ct2,           \
+                                                n_in_ct3);                     \
+                    });                                                        \
+        });                                                                    \
+    } break
+    switch (mmvf_block_size(n_in)) {
+        STRATA_MMVF_CASE(32);
+        STRATA_MMVF_CASE(64);
+        STRATA_MMVF_CASE(96);
+        STRATA_MMVF_CASE(128);
+        STRATA_MMVF_CASE(160);
+        STRATA_MMVF_CASE(192);
+        STRATA_MMVF_CASE(224);
+        STRATA_MMVF_CASE(256);
+    }
+#undef STRATA_MMVF_CASE
+    /*
+    DPCT1010:1104: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 result = 0;
+    /*
+    DPCT1000:1103: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (result != 0)
+        /*
+        DPCT1009:1105: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:1102: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("bf16_gemv_fp32_mmvf launch: ") +
+                                 dpct::get_error_string_dummy(result));
+}
+
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_flash_attn.dp.cpp b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
new file mode 100644
index 00000000000..55c204a19c1
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
@@ -0,0 +1,382 @@
+// Specialized from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d,
+// ggml/src/ggml-cuda/{fattn-vec.cuh,fattn-common.cuh,common.cuh}.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_flash_attn.hpp"
+#include <cfloat>
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <string>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+template <int Width> __dpct_inline__ float warp_sum(float x) {
+#pragma unroll
+    for (int offset = Width / 2; offset; offset >>= 1)
+        /*
+        DPCT1108:81: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        x += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            offset, Width);
+    return x;
+}
+__dpct_inline__ float warp_max(float x) {
+#pragma unroll
+    for (int offset = 16; offset; offset >>= 1)
+        /*
+        DPCT1108:82: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        x = sycl::fmax(x,
+                       dpct::experimental::permute_sub_group_by_xor(
+                           0xffffffffu,
+                           sycl::ext::oneapi::this_work_item::get_sub_group(),
+                           x, offset));
+    return x;
+}
+
+// D=256,ncols=1,F16/F16; 128 threads, nthreads_KQ=nthreads_V=8,
+// four values (float2) per load, four V columns per iteration. Padded length256
+// gives ntiles_KV=ceil(256/D)=1, so the pinned launcher selects grid.y=1.
+/*
+DPCT1110:83: The total declared local variable size in device function attend
+exceeds 128 bytes and may cause high register pressure. Consult with your
+hardware vendor to find the total register size available and adjust the code,
+or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
+       const sycl::half *__restrict__ v, const int32_t *__restrict__ step,
+       int max_context, int padded_length, float scale, float *__restrict__ out,
+       int32_t *__restrict__ status, const sycl::half *__restrict__ mask) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2), warp = item_ct1.get_local_id(1),
+              tid = warp * 32 + lane;
+    const int head = item_ct1.get_group(2), kv = head / 12;
+    const int width = step[kStepWidth], nkv = step[kStepNKv];
+    const bool valid = width >= 1 && width <= max_context && nkv == width &&
+                       step[kStepPos] == width - 1 && step[kStepNBid] == width / 4;
+    if (head == 0 && tid == 0)
+        *status = valid ? kNativeFlashAttnSuccess : kNativeFlashAttnUnsupportedStep;
+    if (!valid) {
+        out[head * 256 + tid] = sycl::bit_cast<float>(0x7fc00000);
+        out[head * 256 + tid + 128] = sycl::bit_cast<float>(0x7fc00000);
+        return;
+    }
+    sycl::float2 qreg[16];
+    sycl::float2 vkq[16] = {};
+    auto &tile = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[4 * 4 * 256]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &max_shared =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sum_shared =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float maximum = -FLT_MAX / 2.0f, sum = 0.0f;
+#pragma unroll
+    for (int i0 = 0; i0 < 128; i0 += 32) {
+        const int i = i0 + (lane % 8) * 4;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int d = 2 * (i + j);
+            qreg[i0 / 8 + j] = sycl::float2(q[head * 256 + d] * scale,
+                                            q[head * 256 + d + 1] * scale);
+        }
+    }
+    for (int base = 0; base < padded_length; base += 128) {
+        float score = 0.0f, next_max = maximum;
+#pragma unroll
+        for (int row = 0; row < 8; ++row) {
+            const int cell = base + warp * 32 + (lane & ~7) + row;
+            float dot = 0.0f;
+#pragma unroll
+            for (int i0 = 0; i0 < 128; i0 += 32) {
+                const int i = i0 + (lane % 8) * 4;
+#pragma unroll
+                for (int j = 0; j < 4; ++j) {
+                    const int d = 2 * (i + j);
+                    const float a =
+                        cell < width
+                            ? sycl::vec<sycl::half, 1>(
+                                  k[(cell * 2 + kv) * 256 + d])
+                                  .convert<float,
+                                           sycl::rounding_mode::automatic>()[0]
+                            : 0.0f;
+                    const float b =
+                        cell < width
+                            ? sycl::vec<sycl::half, 1>(
+                                  k[(cell * 2 + kv) * 256 + d + 1])
+                                  .convert<float,
+                                           sycl::rounding_mode::automatic>()[0]
+                            : 0.0f;
+                    dot += a * qreg[i0 / 8 + j].x();
+                    dot += b * qreg[i0 / 8 + j].y();
+                }
+            }
+            dot = warp_sum<8>(dot);
+            dot +=
+                cell < width
+                    ? (mask ? sycl::vec<sycl::half, 1>(mask[cell])
+                                  .convert<float,
+                                           sycl::rounding_mode::automatic>()[0]
+                            : 0.0f)
+                    : sycl::bit_cast<float, int>(0xff800000u);
+            next_max = sycl::fmax(next_max, dot + (3.0f * 0.6931f));
+            if (lane % 8 == row) score = dot;
+        }
+#pragma unroll
+        for (int offset = 8; offset < 32; offset <<= 1)
+            /*
+            DPCT1108:84: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            next_max = sycl::fmax(
+                next_max,
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(),
+                    next_max, offset));
+        const float rescale = sycl::native::exp(maximum - next_max);
+        maximum = next_max;
+        score = sycl::native::exp(score - maximum);
+        sum = sum * rescale + score;
+        tile[tid] = score;
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+        for (int k0 = 0; k0 < 32; k0 += 4) {
+            const int local = warp * 32 + k0 + lane / 8, cell = base + local;
+            const float weight = tile[local];
+#pragma unroll
+            for (int i0 = 0; i0 < 128; i0 += 32) {
+                const int i = i0 + (lane % 8) * 4;
+#pragma unroll
+                for (int j = 0; j < 4; ++j) {
+                    const int d = 2 * (i + j);
+                    const float a =
+                        cell < width
+                            ? sycl::vec<sycl::half, 1>(
+                                  v[(cell * 2 + kv) * 256 + d])
+                                  .convert<float,
+                                           sycl::rounding_mode::automatic>()[0]
+                            : 0.0f;
+                    const float b =
+                        cell < width
+                            ? sycl::vec<sycl::half, 1>(
+                                  v[(cell * 2 + kv) * 256 + d + 1])
+                                  .convert<float,
+                                           sycl::rounding_mode::automatic>()[0]
+                            : 0.0f;
+                    // The pinned sm120a binary contracts the old-accumulator
+                    // rescale with the FIRST addition: fma(rescale,old,round(V*w)).
+                    // Later columns use fma(V,w,acc). Explicit intrinsics retain
+                    // that order despite this adapter's masked-load branches.
+                    if (k0 == 0) {
+                        /*
+                        DPCT1013:437: The rounding mode could not be specified
+                        and the generated code may have different accuracy than
+                        the original code. Verify the correctness. SYCL math
+                        built-in function rounding mode is aligned with OpenCL
+                        C 1.2 standard.
+                        */
+                        vkq[i0 / 8 + j].x() =
+                            sycl::fma(rescale, vkq[i0 / 8 + j].x(), a * weight);
+                        /*
+                        DPCT1013:438: The rounding mode could not be specified
+                        and the generated code may have different accuracy than
+                        the original code. Verify the correctness. SYCL math
+                        built-in function rounding mode is aligned with OpenCL
+                        C 1.2 standard.
+                        */
+                        vkq[i0 / 8 + j].y() =
+                            sycl::fma(rescale, vkq[i0 / 8 + j].y(), b * weight);
+                    } else {
+                        /*
+                        DPCT1013:439: The rounding mode could not be specified
+                        and the generated code may have different accuracy than
+                        the original code. Verify the correctness. SYCL math
+                        built-in function rounding mode is aligned with OpenCL
+                        C 1.2 standard.
+                        */
+                        vkq[i0 / 8 + j].x() =
+                            sycl::fma(a, weight, vkq[i0 / 8 + j].x());
+                        /*
+                        DPCT1013:440: The rounding mode could not be specified
+                        and the generated code may have different accuracy than
+                        the original code. Verify the correctness. SYCL math
+                        built-in function rounding mode is aligned with OpenCL
+                        C 1.2 standard.
+                        */
+                        vkq[i0 / 8 + j].y() =
+                            sycl::fma(b, weight, vkq[i0 / 8 + j].y());
+                    }
+                }
+            }
+        }
+    }
+    if (warp == 0) { max_shared[lane] = -FLT_MAX / 2.0f; sum_shared[lane] = 0.0f; }
+    /*
+    DPCT1065:434: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (lane == 0) max_shared[warp] = maximum;
+    /*
+    DPCT1065:435: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float global_max = warp_max(max_shared[lane]);
+    const float rescale = sycl::native::exp(maximum - global_max);
+#pragma unroll
+    for (int i = 0; i < 16; ++i) {
+        /*
+        DPCT1013:441: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        vkq[i].x() = vkq[i].x() * rescale;
+        /*
+        DPCT1013:442: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        vkq[i].y() = vkq[i].y() * rescale;
+    }
+#pragma unroll
+    for (int i0 = 0; i0 < 128; i0 += 32) {
+        const int start = warp * 4 * 256 + (lane / 8) * 256 + 2 * (i0 + (lane % 8) * 4);
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            tile[start + 2 * j] = vkq[i0 / 8 + j].x();
+            tile[start + 2 * j + 1] = vkq[i0 / 8 + j].y();
+        }
+    }
+    sum *= rescale;
+    sum = warp_sum<32>(sum);
+    if (lane == 0) sum_shared[warp] = sum;
+    /*
+    DPCT1065:436: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    sum = warp_sum<32>(sum_shared[lane]);
+#pragma unroll
+    for (int i0 = 0; i0 < 256; i0 += 128) {
+        float result = 0.0f;
+#pragma unroll
+        for (int w = 0; w < 4; ++w) {
+#pragma unroll
+            for (int group = 0; group < 4; ++group)
+                result += tile[w * 4 * 256 + group * 256 + i0 + tid];
+        }
+        out[head * 256 + i0 + tid] = result / sum;
+    }
+}
+struct Span { const void* p; std::size_t n, alignment; };
+void validate_spans(const Span* spans, int count) {
+    for (int i = 0; i < count; ++i) {
+        const auto a = reinterpret_cast<std::uintptr_t>(spans[i].p);
+        if (!a || a % spans[i].alignment || spans[i].n > UINTPTR_MAX - a)
+            throw std::invalid_argument("native FlashAttention requires nonnull aligned bounded spans");
+        for (int j = 0; j < i; ++j) {
+            const auto b = reinterpret_cast<std::uintptr_t>(spans[j].p);
+            if (a < b + spans[j].n && b < a + spans[i].n)
+                throw std::invalid_argument("native FlashAttention requires disjoint buffers");
+        }
+    }
+}
+} // namespace
+
+void native_flash_attn_short_step(const float* q, const uint16_t* k, const uint16_t* v,
+                                  const int32_t* step, int64_t capacity, int max_context,
+                                  const QsaShapes& shapes, float* output, int32_t* status,
+                                  const uint16_t* mask, void* stream) {
+    if (!stream || shapes.n_head != 24 || shapes.n_head_kv != 2 || shapes.head_dim != 256 ||
+        shapes.idx_block != 4 || shapes.idx_top_k < 256 || capacity < 256 ||
+        uint64_t(capacity) > std::numeric_limits<std::size_t>::max() / 1024 ||
+        max_context < 1 || max_context > 256)
+        throw std::invalid_argument("native FlashAttention supports only Q24x256/KV2x256, capacity>=256 and context1..256 on an explicit stream");
+    const std::size_t kv_bytes = std::size_t(capacity) * 1024;
+    const Span spans[] = {{q, 24 * 256 * 4, 4}, {k, kv_bytes, 2}, {v, kv_bytes, 2},
+                          {step, kStepCount * 4, 4}, {output, 24 * 256 * 4, 4},
+                          {status, 4, 4}, {mask, 256 * 2, 2}};
+    validate_spans(spans, mask ? 7 : 6);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            ((sycl::queue *)(strata::q_of(stream)))
+                ->get_device(),
+            {sycl::aspect::fp16});
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class attend_9d5505>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 24) * sycl::range(1, 4, 32),
+                                  sycl::range(1, 4, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        attend(q, reinterpret_cast<const sycl::half *>(k),
+                               reinterpret_cast<const sycl::half *>(v), step,
+                               max_context, 256, 0.0625f, output, status,
+                               reinterpret_cast<const sycl::half *>(mask));
+                    });
+    }
+    /*
+    DPCT1010:445: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto result = 0;
+    /*
+    DPCT1000:444: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (result != 0)
+        /*
+        DPCT1009:446: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:443: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("native FlashAttention launch: ") +
+                                 dpct::get_error_string_dummy(result));
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_gdn.dp.cpp b/sycl/src/kernels/cuda/native_gdn.dp.cpp
new file mode 100644
index 00000000000..c4309722fa7
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_gdn.dp.cpp
@@ -0,0 +1,167 @@
+// Arithmetic adapted from gated_delta_net.cu at pinned llama.cpp
+// 3cf03257f219afbe7334045ff7c6a06ac68c627d. Only state addressing differs:
+// each warp owns one Strata (head,column) and retains its four rows in registers.
+// Compile with --use_fast_math to match the pinned CUDA implementation.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_gdn.hpp"
+#include <atomic>
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+constexpr int S = 128;
+
+__dpct_inline__ float warp_sum(float value) {
+#pragma unroll
+    for (int offset = 16; offset > 0; offset >>= 1)
+        /*
+        DPCT1108:157: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        value += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffff, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    return value;
+}
+
+__dpct_inline__ void
+step(float *__restrict__ state, const float *__restrict__ q,
+     const float *__restrict__ k, const float *__restrict__ v,
+     const float *__restrict__ gate, const float *__restrict__ beta,
+     float *__restrict__ output, int h_k, int h_v, float scale) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int head = item_ct1.get_group(2);
+    const int lane = item_ct1.get_local_id(2);
+    const int col = item_ct1.get_group(0) * item_ct1.get_local_range(1) +
+                    item_ct1.get_local_id(1);
+    const int q_head = head % h_k;
+    float s_shard[4], k_reg[4], q_reg[4];
+#pragma unroll
+    for (int r = 0; r < 4; ++r) {
+        const int i = r * 32 + lane;
+        s_shard[r] = state[(size_t(i) * h_v + head) * S + col];
+        k_reg[r] = k[q_head * S + i];
+        q_reg[r] = q[q_head * S + i];
+    }
+    const float g_val = sycl::native::exp(gate[head]);
+    float kv_shard = 0.0f;
+#pragma unroll
+    for (int r = 0; r < 4; ++r) kv_shard += s_shard[r] * k_reg[r];
+    const float kv_col = warp_sum(kv_shard);
+    const float delta_col = (v[head * S + col] - g_val * kv_col) * beta[head];
+    float attn_partial = 0.0f;
+#pragma unroll
+    for (int r = 0; r < 4; ++r) {
+        s_shard[r] = g_val * s_shard[r] + k_reg[r] * delta_col;
+        attn_partial += s_shard[r] * q_reg[r];
+    }
+    const float attn_col = warp_sum(attn_partial);
+    if (lane == 0) output[head * S + col] = attn_col * scale;
+#pragma unroll
+    for (int r = 0; r < 4; ++r) {
+        const int i = r * 32 + lane;
+        state[(size_t(i) * h_v + head) * S + col] = s_shard[r];
+    }
+}
+
+bool valid_span(const void* pointer, size_t bytes) {
+    const auto address = reinterpret_cast<uintptr_t>(pointer);
+    return pointer && address % sizeof(float) == 0 && bytes <= UINTPTR_MAX - address;
+}
+bool overlap(const void* a, size_t an, const void* b, size_t bn) {
+    const auto ap = reinterpret_cast<uintptr_t>(a), bp = reinterpret_cast<uintptr_t>(b);
+    return ap < bp + bn && bp < ap + an;
+}
+}
+
+void native_gdn_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_gdn_enabled() { return enabled.load(std::memory_order_relaxed); }
+
+void native_gdn_step(float* state, const float* q, const float* k, const float* v,
+                     const float* gate, const float* beta, float* output,
+                     const GdnShapes& shape, void* stream) {
+    if (!stream || shape.S != S || shape.h_k <= 0 || shape.h_v <= 0 ||
+        shape.h_v > 65535 || shape.h_v % shape.h_k != 0)
+        throw std::invalid_argument("native GDN requires a stream, S=128 and positive divisible head counts <=65535");
+    const size_t state_bytes = size_t(S) * S * size_t(shape.h_v) * sizeof(float);
+    const size_t qk_bytes = size_t(S) * size_t(shape.h_k) * sizeof(float);
+    const size_t output_bytes = size_t(S) * size_t(shape.h_v) * sizeof(float);
+    const size_t head_bytes = size_t(shape.h_v) * sizeof(float);
+    if (!valid_span(state, state_bytes) || !valid_span(output, output_bytes) ||
+        overlap(state, state_bytes, output, output_bytes))
+        throw std::invalid_argument("native GDN requires aligned, disjoint state and output spans");
+    const void* inputs[] = {q, k, v, gate, beta};
+    const size_t bytes[] = {qk_bytes, qk_bytes, output_bytes, head_bytes, head_bytes};
+    for (int i = 0; i < 5; ++i) {
+        if (!valid_span(inputs[i], bytes[i]) || overlap(state, state_bytes, inputs[i], bytes[i]) ||
+            overlap(output, output_bytes, inputs[i], bytes[i]))
+            throw std::invalid_argument("native GDN requires aligned input spans disjoint from state and output");
+    }
+    const float scale = 1.0f / sqrtf(float(S));
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class step_134598>>(
+                sycl::nd_range<3>(sycl::range(S / 4, 1, unsigned(shape.h_v)) *
+                                      sycl::range(1, 4, 32),
+                                  sycl::range(1, 4, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        step(state, q, k, v, gate, beta, output, int(shape.h_k),
+                             int(shape.h_v), scale);
+                    });
+    }
+    /*
+    DPCT1010:804: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:805: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:802: The statement could not be removed.
+    */
+    /*
+    DPCT1000:803: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
new file mode 100644
index 00000000000..f0bd4ed3966
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
@@ -0,0 +1,356 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{norm.cu,common.cuh,unary.cu,unary.cuh,ssm-conv.cu,scale.cu}.
+// Compile with --use_fast_math, as the pinned backend does.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_gdn_preprocess.hpp"
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <initializer_list>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+constexpr int S = 128;
+
+__dpct_inline__ float warp_sum(float value) {
+#pragma unroll
+    for (int offset = 16; offset > 0; offset >>= 1)
+        /*
+        DPCT1108:100: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        value += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    return value;
+}
+__dpct_inline__ float norm_sum(float value, float *sums) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) % 32;
+    value = warp_sum(value);
+    if (lane == 0) sums[item_ct1.get_local_id(2) / 32] = value;
+    /*
+    DPCT1065:516: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    value = lane < 8 ? sums[lane] : 0.0f;
+    return warp_sum(value);
+}
+__dpct_inline__ float sigmoid(float value) {
+    return 1.0f / (1.0f + sycl::native::exp(-value));
+}
+
+__dpct_inline__ void conv_silu(float *__restrict__ history,
+                               const float *__restrict__ input,
+                               const float *__restrict__ weights,
+                               float *__restrict__ raw_output,
+                               float *__restrict__ silu_output, int channels) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= channels) return;
+    float values[4] = {history[c * 3], history[c * 3 + 1], history[c * 3 + 2], input[c]};
+    float sum = 0.0f;
+#pragma unroll
+    for (int tap = 0; tap < 4; ++tap) sum += values[tap] * weights[c * 4 + tap];
+    // The native SSM kernel adds its zero bias even when there is no bias input.
+    /*
+    DPCT1013:517: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    sum = sum + 0.0f;
+    raw_output[c] = sum;
+    silu_output[c] = sum / (1.0f + sycl::native::exp(-sum));
+#pragma unroll
+    for (int tap = 0; tap < 3; ++tap) history[c * 3 + tap] = values[tap + 1];
+}
+
+__dpct_inline__ void l2_norm(float *input, float epsilon, float scale_after) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int col = item_ct1.get_local_id(2);
+    input += size_t(item_ct1.get_group(2)) * S;
+    const float value = col < S ? input[col] : 0.0f;
+    float partial = 0.0f;
+    if (col < S) partial += value * value;
+    auto &sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    partial = norm_sum(partial, sums);
+    const float scale = sycl::rsqrt(partial / S + epsilon);
+    if (col < S) {
+        // Preserve the FP32 store boundary between RMSNorm and ggml_scale.
+        /*
+        DPCT1013:518: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float normalized = scale * value;
+        /*
+        DPCT1013:519: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        input[col] = sycl::fma(normalized, scale_after, 0.0f);
+    }
+}
+
+__dpct_inline__ void beta_sigmoid(float *beta, int count) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < count) beta[i] = sigmoid(beta[i]);
+}
+__dpct_inline__ void gate_softplus(const float *__restrict__ alpha,
+                                   const float *__restrict__ dt,
+                                   const float *__restrict__ ssm_a,
+                                   float *__restrict__ gate, int count) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= count) return;
+    /*
+    DPCT1013:520: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const float value = alpha[i] + dt[i];
+    const float softplus =
+        value > 20.0f ? value : sycl::log(1.0f + sycl::native::exp(value));
+    gate[i] = softplus * ssm_a[i];
+}
+
+__dpct_inline__ void out_norm(const float *__restrict__ input,
+                              const float *__restrict__ z,
+                              const float *__restrict__ gamma,
+                              float *__restrict__ output, float epsilon) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int col = item_ct1.get_local_id(2);
+    const size_t offset = size_t(item_ct1.get_group(2)) * S;
+    const float value = col < S ? input[offset + col] : 0.0f;
+    float partial = 0.0f;
+    if (col < S) partial += value * value;
+    auto &sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    partial = norm_sum(partial, sums);
+    const float scale = sycl::rsqrt(partial / S + epsilon);
+    if (col < S) {
+        // RMSNorm+gamma is one pinned fused operator, followed by sigmoid*mul.
+        /*
+        DPCT1013:521: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float weighted = scale * value * gamma[col];
+        output[offset + col] = weighted * sigmoid(z[offset + col]);
+    }
+}
+
+struct Span { const void* pointer; size_t bytes; };
+void valid(Span span) {
+    const auto address = reinterpret_cast<uintptr_t>(span.pointer);
+    if (!span.pointer || address % sizeof(float) || span.bytes > UINTPTR_MAX - address)
+        throw std::invalid_argument("native GDN preprocessing requires aligned nonnull valid spans");
+}
+void disjoint(Span a, Span b) {
+    const auto ap = reinterpret_cast<uintptr_t>(a.pointer), bp = reinterpret_cast<uintptr_t>(b.pointer);
+    if (ap < bp + b.bytes && bp < ap + a.bytes)
+        throw std::invalid_argument("native GDN preprocessing requires disjoint writable spans");
+}
+void count_and_stream(int64_t count, void* stream) {
+    if (!stream || count <= 0 || count > 65535)
+        throw std::invalid_argument("native GDN preprocessing requires a stream and count in [1,65535]");
+}
+void norm_geometry(int64_t rows, int64_t cols, float epsilon, void* stream) {
+    count_and_stream(rows, stream);
+    if (cols != S || !std::isfinite(epsilon) || epsilon < 0.0f)
+        throw std::invalid_argument("native GDN norm requires width 128 and finite nonnegative epsilon");
+}
+void check_launch() {
+    /*
+    DPCT1010:524: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:525: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:522: The statement could not be removed.
+    */
+    /*
+    DPCT1000:523: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+}
+
+void native_gdn_conv_silu(float* history, const float* input, const float* weights,
+                          float* raw_output, float* silu_output, int64_t channels,
+                          int64_t d_conv, void* stream) {
+    count_and_stream(channels, stream);
+    if (d_conv != 4) throw std::invalid_argument("native GDN convolution requires four taps");
+    const size_t bytes = size_t(channels) * sizeof(float);
+    const Span writable[] = {{history, 3 * bytes}, {raw_output, bytes}, {silu_output, bytes}};
+    const Span inputs[] = {{input, bytes}, {weights, 4 * bytes}};
+    for (auto span : writable) valid(span);
+    for (auto span : inputs) valid(span);
+    for (int i = 0; i < 3; ++i) {
+        for (int j = 0; j < i; ++j) disjoint(writable[i], writable[j]);
+        for (auto span : inputs) disjoint(writable[i], span);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class conv_silu_1ba4e6>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, unsigned((channels + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    conv_silu(history, input, weights, raw_output, silu_output,
+                              int(channels));
+                });
+    }
+    check_launch();
+}
+void native_gdn_l2_norm(float* input, int64_t rows, int64_t cols, float epsilon, void* stream) {
+    norm_geometry(rows, cols, epsilon, stream);
+    valid({input, size_t(rows) * S * sizeof(float)});
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto epsilon_S_ct1 = epsilon / S;
+                auto sqrtf_float_S_ct2 = 1.0f / sqrtf(float(S));
+
+                cgh.parallel_for<dpct_kernel_name<class l2_norm_bcf2af>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, unsigned(rows)) *
+                                          sycl::range(1, 1, 256),
+                                      sycl::range(1, 1, 256)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            l2_norm(input, epsilon_S_ct1, sqrtf_float_S_ct2);
+                        });
+            });
+    }
+    check_launch();
+}
+void native_gdn_beta_gate(float* beta, int64_t heads, void* stream) {
+    count_and_stream(heads, stream);
+    valid({beta, size_t(heads) * sizeof(float)});
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class beta_sigmoid_fcf68f>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, unsigned((heads + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    beta_sigmoid(beta, int(heads));
+                });
+    }
+    check_launch();
+}
+void native_gdn_gate(const float* alpha, const float* dt, const float* ssm_a,
+                     float* gate, int64_t heads, void* stream) {
+    count_and_stream(heads, stream);
+    const size_t bytes = size_t(heads) * sizeof(float);
+    const Span output{gate, bytes};
+    valid(output);
+    for (auto input : {Span{alpha, bytes}, Span{dt, bytes}, Span{ssm_a, bytes}}) {
+        valid(input);
+        disjoint(output, input);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class gate_softplus_a95cee>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, unsigned((heads + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gate_softplus(alpha, dt, ssm_a, gate, int(heads));
+                });
+    }
+    check_launch();
+}
+void native_gdn_out_norm(const float* output, const float* z, const float* gamma,
+                         float* destination, int64_t heads, int64_t cols,
+                         float epsilon, void* stream) {
+    norm_geometry(heads, cols, epsilon, stream);
+    const size_t bytes = size_t(heads) * S * sizeof(float);
+    const Span writable{destination, bytes};
+    valid(writable);
+    for (auto input : {Span{output, bytes}, Span{z, bytes}, Span{gamma, S * sizeof(float)}}) {
+        valid(input);
+        disjoint(writable, input);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class out_norm_a49e35>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(heads)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        out_norm(output, z, gamma, destination, epsilon);
+                    });
+    }
+    check_launch();
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_gr_norm.dp.cpp b/sycl/src/kernels/cuda/native_gr_norm.dp.cpp
new file mode 100644
index 00000000000..6bc15c6e8c3
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_gr_norm.dp.cpp
@@ -0,0 +1,165 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{norm.cu,common.cuh}. Scope: contiguous weighted F32 RMSNorm.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_gr_norm.hpp"
+
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <stdexcept>
+#include <string>
+
+namespace strata::kernels {
+namespace {
+
+__dpct_inline__ float norm_warp_sum(float value) {
+#pragma unroll
+    for (int offset = 16; offset > 0; offset >>= 1) {
+        /*
+        DPCT1108:290: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        value += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    }
+    return value;
+}
+
+template <int BlockSize>
+__dpct_inline__ void weighted_rms_norm(const float *__restrict__ input,
+                                       const float *__restrict__ gamma,
+                                       float *__restrict__ output, int n_cols,
+                                       float epsilon) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int tid = item_ct1.get_local_id(2);
+    const std::size_t row_offset = std::size_t(item_ct1.get_group(2)) * n_cols;
+    input += row_offset;
+    gamma += row_offset;
+    output += row_offset;
+    float partial = 0.0f;
+    for (int col = tid; col < n_cols; col += BlockSize) {
+        const float value = input[col];
+        partial += value * value;
+    }
+
+    // Pinned block_reduce<SUM,BlockSize>: every warp repeats the final XOR
+    // reduction. There is no warp-0-only broadcast or downward-shuffle tree.
+    auto &sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    partial = norm_warp_sum(partial);
+    const int lane = tid % 32;
+    if (lane == 0) sums[tid / 32] = partial;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    partial = 0.0f;
+    if (lane < BlockSize / 32) partial = sums[lane];
+    partial = norm_warp_sum(partial);
+
+    const float mean = partial / n_cols;
+    const float scale = sycl::rsqrt(mean + epsilon);
+#pragma unroll
+    for (int col = tid; col < n_cols; col += BlockSize) {
+        output[col] = scale * input[col] * gamma[col];
+    }
+}
+
+void check_pointer(const void* p) {
+    if (!p || reinterpret_cast<std::uintptr_t>(p) % alignof(float) != 0)
+        throw std::invalid_argument("native GR RMSNorm requires non-null four-byte aligned pointers");
+}
+
+} // namespace
+
+void native_gr_rms_norm_weighted(const float* input, const float* gamma, float* output,
+                                 int n_cols, int n_rows, float epsilon, void* stream) {
+    if (n_cols <= 0 || n_rows <= 0 || !std::isfinite(epsilon) || epsilon < 0.0f)
+        throw std::invalid_argument("native GR RMSNorm requires positive dimensions and finite nonnegative epsilon");
+    check_pointer(input);
+    check_pointer(gamma);
+    check_pointer(output);
+    const auto cuda_stream = strata::q_of(stream);
+    if (n_cols < 1024)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cuda_stream->parallel_for<dpct_kernel_name<
+            class weighted_rms_norm_46d94c, dpct_kernel_scalar<256>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_rows)) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                weighted_rms_norm<256>(input, gamma, output, n_cols, epsilon);
+            });
+    } else
+    /*
+    DPCT1049:291: The work-group size passed to the SYCL kernel may exceed
+    the limit. To get the device limit, query
+    info::device::max_work_group_size. Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cuda_stream->parallel_for<dpct_kernel_name<
+            class weighted_rms_norm_11a6fe, dpct_kernel_scalar<1024>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_rows)) *
+                                  sycl::range(1, 1, 1024),
+                              sycl::range(1, 1, 1024)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                weighted_rms_norm<1024>(input, gamma, output, n_cols, epsilon);
+            });
+    }
+    /*
+    DPCT1010:1149: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1000:1148: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error != 0)
+        /*
+        DPCT1009:1150: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:1147: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("native GR RMSNorm launch: ") +
+                                 dpct::get_error_string_dummy(error));
+}
+
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
new file mode 100644
index 00000000000..a758831fdde
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
@@ -0,0 +1,247 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{dsv4-hc.cu,scale.cu,unary.cu,unary.cuh}.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_gr_postops.hpp"
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <string>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+constexpr int THREADS = 256;
+__dpct_inline__ float sigmoid(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+// ggml SCALE uses scale*x+bias, including its +0 bias. Retain this operation
+// explicitly so compile-time zero does not change signed-zero behavior.
+__dpct_inline__ float scale_zero_bias(float x, float scale) {
+    /*
+    DPCT1013:908: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    return sycl::fma(scale, x, 0.0f);
+}
+__dpct_inline__ void down_silu(float *lo, int count, float scale) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const std::size_t i =
+        std::size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= std::size_t(count)) return;
+    const float x = scale_zero_bias(lo[i], scale);
+    lo[i] = x / (1.0f + sycl::native::exp(-x));
+}
+template <bool Fused>
+__dpct_inline__ void
+pre_gated(const float *__restrict__ xn, float *__restrict__ gate,
+          float *__restrict__ mixed, int n_embd, int hc, float scale) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const std::size_t d =
+        std::size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (d >= std::size_t(n_embd)) return;
+    float sum = 0.0f;
+    for (int c = 0; c < hc; ++c) {
+        const std::size_t i = std::size_t(c) * n_embd + d;
+        const float x = xn[i], w = sigmoid(gate[i]);
+        /*
+        DPCT1013:909: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float product = x * w;
+        gate[i] = product;
+        /*
+        DPCT1013:910: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        if constexpr (Fused) sum = sycl::fma(x, w, sum);
+        /*
+        DPCT1013:911: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        else sum = c == 0 ? product : sum + product;
+    }
+    if constexpr (Fused) mixed[d] = scale * sum;
+    else mixed[d] = scale_zero_bias(sum, scale);
+}
+__dpct_inline__ void post(const float *residual,
+                          const float *__restrict__ block_out,
+                          const float *__restrict__ inject, float *output,
+                          int n_embd, int hc, float scale) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const std::size_t i =
+        std::size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= std::size_t(n_embd) * hc) return;
+    const int c = int(i / n_embd), d = int(i % n_embd);
+    const float weight = scale_zero_bias(sigmoid(scale_zero_bias(inject[c], scale)), 2.0f);
+    // Exact residual/output alias is supported; no other thread reads residual[i].
+    /*
+    DPCT1013:912: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    output[i] = sycl::fma(block_out[d], weight, residual[i]);
+}
+void check_pointer(const void* p) {
+    if (!p || reinterpret_cast<std::uintptr_t>(p) % alignof(float))
+        throw std::invalid_argument("native GR postops require non-null four-byte aligned pointers");
+}
+void check_shape(int n, int hc) {
+    if (n <= 0 || hc <= 0 || std::uint64_t(n) * hc > std::uint64_t(std::numeric_limits<int>::max()))
+        throw std::invalid_argument("native GR postops require positive bounded dimensions");
+}
+unsigned blocks(std::size_t n) { return unsigned((n + THREADS - 1) / THREADS); }
+void check_launch() {
+    /*
+    DPCT1010:915: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1000:914: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error != 0)
+        /*
+        DPCT1009:916: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:913: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("native GR postops launch: ") +
+                                 dpct::get_error_string_dummy(error));
+}
+} // namespace
+
+void native_gr_down_silu(float* lo, int hc_lr, int hc, void* stream) {
+    check_shape(hc_lr, hc);
+    check_pointer(lo);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto float_hc_ct2 = 1.0f / float(hc);
+
+                cgh.parallel_for<dpct_kernel_name<class down_silu_24f4fb>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks(hc_lr)) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        down_silu(lo, hc_lr, float_hc_ct2);
+                    });
+            });
+    }
+    check_launch();
+}
+void native_gr_pre_gated(const float* xn, float* gate, float* mixed,
+                         int n_embd, int hc, bool fused_layer, void* stream) {
+    check_shape(n_embd, hc);
+    check_pointer(xn); check_pointer(gate); check_pointer(mixed);
+    if (fused_layer)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto float_hc_ct5 = 1.0f / float(hc);
+
+                cgh.parallel_for<dpct_kernel_name<class pre_gated_7b64ea,
+                                                  dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks(n_embd)) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        pre_gated<true>(xn, gate, mixed, n_embd, hc,
+                                        float_hc_ct5);
+                    });
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto float_hc_ct5 = 1.0f / float(hc);
+
+                cgh.parallel_for<dpct_kernel_name<class pre_gated_4a043d,
+                                                  dpct_kernel_scalar<false>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks(n_embd)) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        pre_gated<false>(xn, gate, mixed, n_embd, hc,
+                                         float_hc_ct5);
+                    });
+            });
+    }
+    check_launch();
+}
+void native_gr_post(const float* residual, const float* block_out, const float* inject,
+                    float* output, int n_embd, int hc, void* stream) {
+    check_shape(n_embd, hc);
+    check_pointer(residual); check_pointer(block_out); check_pointer(inject); check_pointer(output);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto float_hc_ct6 = 1.0f / float(hc);
+
+                cgh.parallel_for<dpct_kernel_name<class post_a7f844>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 1, blocks(std::size_t(n_embd) * hc)) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        post(residual, block_out, inject, output, n_embd, hc,
+                             float_hc_ct6);
+                    });
+            });
+    }
+    check_launch();
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
new file mode 100644
index 00000000000..b30b4723081
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -0,0 +1,2048 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{quantize.cu,vecdotq.cuh,mmvq.cu,common.cuh}
+// and ggml/src/ggml-common.h. See docs/native-mmvq.md for exact scope.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <string>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK = 256;
+constexpr int Q8K = 32;
+constexpr int QI = 32;
+constexpr int VDR = 2;
+constexpr int WARPS = 4;
+constexpr int WARP = 32;
+constexpr int QUANT_THREADS = 256;
+
+struct Q5KBlock {
+    sycl::half2 dm;
+    uint8_t scales[12];
+    uint8_t qh[32];
+    uint8_t qs[128];
+};
+struct Q81Block {
+    sycl::half2 ds;
+    int8_t qs[32];
+};
+struct Q20Block {
+    sycl::half d;
+    uint8_t qs[16];
+};
+struct Q3KBlock {
+    uint8_t hmask[32];
+    uint8_t qs[64];
+    uint8_t scales[12];
+    sycl::half d;
+};
+struct IQ4XSBlock {
+    sycl::half d;
+    uint16_t scales_h;
+    uint8_t scales_l[4];
+    uint8_t qs[128];
+};
+struct Q4KBlock {
+    sycl::half2 dm;
+    uint8_t scales[12];
+    uint8_t qs[128];
+};
+struct Q6KBlock {
+    uint8_t ql[128];
+    uint8_t qh[64];
+    int8_t scales[16];
+    sycl::half d;
+};
+struct Q40Block {
+    sycl::half d;
+    uint8_t qs[16];
+};
+struct Q50Block {
+    sycl::half d;
+    uint8_t qh[4];
+    uint8_t qs[16];
+};
+struct Q80Block {
+    sycl::half d;
+    int8_t qs[32];
+};
+struct IQ4NLBlock {
+    sycl::half d;
+    uint8_t qs[16];
+};
+static_assert(sizeof(Q5KBlock) == 176 && alignof(Q5KBlock) == 4);
+static_assert(sizeof(Q81Block) == 36 && alignof(Q81Block) == 4);
+static_assert(sizeof(Q20Block) == 18 && alignof(Q20Block) == 2 && offsetof(Q20Block, qs) == 2);
+static_assert(sizeof(Q3KBlock) == 110 && alignof(Q3KBlock) == 2 && offsetof(Q3KBlock, qs) == 32 &&
+              offsetof(Q3KBlock, scales) == 96 && offsetof(Q3KBlock, d) == 108);
+static_assert(sizeof(IQ4XSBlock) == 136 && alignof(IQ4XSBlock) == 2 &&
+              offsetof(IQ4XSBlock, scales_h) == 2 && offsetof(IQ4XSBlock, scales_l) == 4 &&
+              offsetof(IQ4XSBlock, qs) == 8);
+static_assert(offsetof(Q5KBlock, scales) == 4 && offsetof(Q5KBlock, qh) == 16 &&
+              offsetof(Q5KBlock, qs) == 48 && offsetof(Q81Block, qs) == 4);
+static_assert(sizeof(Q4KBlock) == 144 && alignof(Q4KBlock) == 4 &&
+              offsetof(Q4KBlock, scales) == 4 && offsetof(Q4KBlock, qs) == 16);
+static_assert(sizeof(Q6KBlock) == 210 && alignof(Q6KBlock) == 2 &&
+              offsetof(Q6KBlock, qh) == 128 && offsetof(Q6KBlock, scales) == 192 &&
+              offsetof(Q6KBlock, d) == 208);
+static_assert(sizeof(Q40Block) == 18 && alignof(Q40Block) == 2 && offsetof(Q40Block, qs) == 2);
+static_assert(sizeof(Q50Block) == 22 && alignof(Q50Block) == 2 &&
+              offsetof(Q50Block, qh) == 2 && offsetof(Q50Block, qs) == 6);
+static_assert(sizeof(Q80Block) == 34 && alignof(Q80Block) == 2 && offsetof(Q80Block, qs) == 2);
+static_assert(sizeof(IQ4NLBlock) == 18 && alignof(IQ4NLBlock) == 2 && offsetof(IQ4NLBlock, qs) == 2);
+
+__dpct_inline__ float warp_sum(float x) {
+#pragma unroll
+    for (int offset = WARP / 2; offset > 0; offset >>= 1) {
+        /*
+        DPCT1108:203: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        x += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffff, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            offset);
+    }
+    return x;
+}
+
+__dpct_inline__ float warp_max(float x) {
+#pragma unroll
+    for (int offset = WARP / 2; offset > 0; offset >>= 1) {
+        /*
+        DPCT1108:204: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        x = sycl::fmax(x,
+                       dpct::experimental::permute_sub_group_by_xor(
+                           0xffffffff,
+                           sycl::ext::oneapi::this_work_item::get_sub_group(),
+                           x, offset));
+    }
+    return x;
+}
+
+__dpct_inline__ void native_quantize_q8_1_kernel(const float *__restrict__ x,
+                                                 Q81Block *__restrict__ y,
+                                                 int n_in) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = int(item_ct1.get_group(2)) * QUANT_THREADS +
+                  int(item_ct1.get_local_id(2));
+    if (i >= n_in) return; // n_in is a multiple of 32: only whole warps return.
+    const float xi = x[i];
+    const float amax = warp_max(sycl::fabs(xi));
+    const float sum = warp_sum(xi);
+    const float d = amax / 127.0f;
+    const int8_t q = amax == 0.0f ? 0 : sycl::round(xi / d);
+    y[i / Q8K].qs[i % Q8K] = q;
+    if (i % Q8K == 0) y[i / Q8K].ds = sycl::half2(d, sum);
+}
+
+// Exact pinned vec_dot_q5_K_q8_1_impl_vmmq expression and integer dot order.
+__dpct_inline__ float
+q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
+               const int *__restrict__ u, const uint8_t *__restrict__ sc,
+               const uint8_t *__restrict__ m, const sycl::half2 &dm5,
+               const float *__restrict__ d8) {
+    float sumf_d = 0.0f;
+    float sumf_m = 0.0f;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int vl0i = (vl[0] >> (4 * i)) & 0x0f0f0f0f;
+        const int vl1i = (vl[1] >> (4 * i)) & 0x0f0f0f0f;
+        const int vh0i = ((vh[0] >> i) << 4) & 0x10101010;
+        const int vh1i = ((vh[1] >> i) << 4) & 0x10101010;
+        const int v0i = vl0i | vh0i;
+        const int v1i = vl1i | vh1i;
+        const int dot1 =
+            dpct::dp4a(v0i, u[2 * i], dpct::dp4a(v1i, u[2 * i + 1], 0));
+        const int dot2 = dpct::dp4a(0x01010101, u[2 * i],
+                                    dpct::dp4a(0x01010101, u[2 * i + 1], 0));
+        sumf_d += d8[i] * (dot1 * sc[i]);
+        sumf_m += d8[i] * (dot2 * m[i]);
+    }
+    const sycl::float2 dm5f =
+        dm5.template convert<float, sycl::rounding_mode::automatic>();
+    return dm5f.x() * sumf_d - dm5f.y() * sumf_m;
+}
+
+/*
+DPCT1110:205: The total declared local variable size in device function
+q5_q8_dot exceeds 128 bytes and may cause high register pressure. Consult with
+your hardware vendor to find the total register size available and adjust the
+code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ float q5_q8_dot(const Q5KBlock *__restrict__ bq5,
+                                const Q81Block *__restrict__ bq8, int iqs) {
+    int vl[2];
+    int vh[2];
+    int u[4];
+    float d8[2];
+    const int bq8_offset = 2 * ((iqs / 2) / 4);
+    const int* ql = reinterpret_cast<const int*>(bq5->qs + 16 * bq8_offset + 4 * ((iqs / 2) % 4));
+    const int* qh = reinterpret_cast<const int*>(bq5->qh + 4 * ((iqs / 2) % 4));
+    vl[0] = ql[0];
+    vl[1] = ql[4];
+    vh[0] = qh[0] >> bq8_offset;
+    vh[1] = qh[4] >> bq8_offset;
+
+    const uint16_t* scales = reinterpret_cast<const uint16_t*>(bq5->scales);
+    const int j = bq8_offset / 2;
+    const int jm = j & 1;
+    const uint32_t s0 = scales[jm];
+    const uint32_t s2 = scales[jm + 2];
+    const uint32_t s4 = scales[jm + 4];
+    const uint32_t hi = uint32_t(-int32_t(j >= 2));
+    uint16_t aux[2];
+    aux[0] = uint16_t(((s0 & 0x3f3f) & ~hi) |
+                     ((((s4 >> 0) & 0x0f0f) | ((s0 & 0xc0c0) >> 2)) & hi));
+    aux[1] = uint16_t(((s2 & 0x3f3f) & ~hi) |
+                     ((((s4 >> 4) & 0x0f0f) | ((s2 & 0xc0c0) >> 2)) & hi));
+    const uint8_t* sc = reinterpret_cast<const uint8_t*>(aux);
+    const uint8_t* m = sc + 2;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const Q81Block* bq8i = bq8 + bq8_offset + i;
+        d8[i] = bq8i->ds[0];
+        const int* q8 = reinterpret_cast<const int*>(bq8i->qs) + ((iqs / 2) % 4);
+        u[2 * i] = q8[0];
+        u[2 * i + 1] = q8[4];
+    }
+    return q5_q8_dot_impl(vl, vh, u, sc, m, bq5->dm, d8);
+}
+
+// The generic ncols=1 oracle uses 4 warps and 1 row (or 4 rows for small K),
+// eight weight blocks per K iteration, warp-ascending shared sum, then XOR tree.
+template <bool SmallK>
+__dpct_inline__ void native_q5_k_mmvq_kernel(const Q5KBlock *__restrict__ w,
+                                             const Q81Block *__restrict__ x,
+                                             float *__restrict__ y, int n_in,
+                                             int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = VDR * WARPS * WARP / QI;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / QK;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / (QI / VDR); kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * (QK / Q8K);
+        const int kqs = VDR * (tid % (QI / VDR));
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            // The source assumes allocator padding for partial row groups. This
+            // guard preserves every valid row's math without an out-of-bounds read.
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += q5_q8_dot(w + block, x + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:896: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// Exact pinned vec_dot_q2_0_q8_1: each thread handles one 32-element chunk.
+// The weight block is only 2-byte aligned, so qs is intentionally loaded as
+// int16_t, unlike the naturally 4-byte aligned activation codes.
+__dpct_inline__ float q2_q8_dot(const Q20Block *__restrict__ w,
+                                const Q81Block *__restrict__ x, int iqs) {
+    const float d2 = w->d;
+    const int16_t* qs = reinterpret_cast<const int16_t*>(w->qs) + iqs * 4;
+    const Q81Block* chunk = x + iqs;
+    const int* q8 = reinterpret_cast<const int*>(chunk->qs);
+    int sumi = 0;
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        const int q = qs[j];
+        const int u = q8[j * 2];
+        const int v = q8[j * 2 + 1];
+        const int qe = dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 0);
+        const int qo = dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 2);
+        const int qx = dpct::byte_level_permute(qe, qo, 0x5140);
+        const int qy = dpct::byte_level_permute(qe, qo, 0x7362);
+        sumi = dpct::dp4a(u, qx, sumi);
+        sumi = dpct::dp4a(v, qy, sumi);
+    }
+    const float d8 = chunk->ds[0];
+    return d2 * d8 * sumi;
+}
+
+// Q2_0 generic MMVQ: QK=64, QI=2, VDR=1, 64 blocks per iteration.
+// Preserve the same outer accumulation and cross-warp reduction as the oracle.
+template <bool SmallK>
+__dpct_inline__ void native_q2_0_mmvq_kernel(const Q20Block *__restrict__ w,
+                                             const Q81Block *__restrict__ x,
+                                             float *__restrict__ y, int n_in,
+                                             int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = WARPS * WARP / 2;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / 64;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / 2; kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * 2;
+        const int kqs = tid % 2;
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += q2_q8_dot(w + block, x + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:897: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// Q3_K's 110-byte stride gives alternate blocks only two-byte alignment.
+// Preserve the pinned helper's pair of 16-bit loads and little-endian combine.
+__dpct_inline__ int load_int_b2(const void *ptr, int i32) {
+    const auto* x = static_cast<const uint16_t*>(ptr);
+    int value = x[2 * i32] << 0;
+    value |= x[2 * i32 + 1] << 16;
+    return value;
+}
+
+__dpct_inline__ float q3_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
+                                     const uint8_t *__restrict__ scales,
+                                     int scale_offset, float d3,
+                                     const float *__restrict__ d8) {
+    float sumf = 0.0f;
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        const int isc = scale_offset + 2 * i;
+        const int isc_low = isc % 8;
+        const int sc_shift_low = 4 * (isc / 8);
+        const int sc_low = (scales[isc_low] >> sc_shift_low) & 0xf;
+        const int isc_high = isc % 4;
+        const int sc_shift_high = 2 * (isc / 4);
+        const int sc_high = ((scales[8 + isc_high] >> sc_shift_high) & 3) << 4;
+        const int sc = (sc_low | sc_high) - 32;
+        const int vil = (vl >> (2 * i)) & 0x03030303;
+        const int vih = ((vh >> i) << 2) & 0x04040404;
+        const int vi =
+            dpct::vectorized_binary<sycl::char4>(vil, vih, dpct::sub_sat());
+        sumf += d8[i] * (dpct::dp4a(vi, u[i], 0) * sc);
+    }
+    return d3 * sumf;
+}
+
+__dpct_inline__ float q3_q8_dot(const Q3KBlock *__restrict__ w,
+                                const Q81Block *__restrict__ x, int iqs) {
+    const int bq8_offset = 4 * (iqs / 8);
+    const int scale_offset = iqs - iqs % 8 + (iqs % 8) / 4;
+    const float d = w->d;
+    const int vl = load_int_b2(w->qs, iqs);
+    const int vh = ~load_int_b2(w->hmask, iqs % 8) >> bq8_offset;
+    int u[4];
+    float d8[4];
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        u[i] = reinterpret_cast<const int*>(x[bq8_offset + i].qs)[iqs % 8];
+        d8[i] = x[bq8_offset + i].ds[0];
+    }
+    return q3_q8_dot_impl(vl, vh, u, w->scales, scale_offset, d, d8);
+}
+
+// Q3_K generic MMVQ: QK=256, QI=16, VDR=1, eight blocks per iteration.
+template <bool SmallK>
+__dpct_inline__ void native_q3_k_mmvq_kernel(const Q3KBlock *__restrict__ w,
+                                             const Q81Block *__restrict__ x,
+                                             float *__restrict__ y, int n_in,
+                                             int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = WARPS * WARP / 16;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / 256;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / 16; kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * 8;
+        const int kqs = tid % 16;
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += q3_q8_dot(w + block, x + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:898: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// The pinned nonlinear IQ4 codebook and its CUDA two-stage byte lookup. The
+// explicit alignment satisfies the four 32-bit table loads; values are unchanged.
+inline dpct::global_memory<int8_t, 1>
+    iq4nl_values(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1,
+                                   13, 25, 38, 53, 69, 89, 113});
+
+static constexpr int8_t kIq4nlTable[16] = {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113};
+__dpct_inline__ sycl::int2 iq4_table_lookup(int q4, int8_t *iq4nl_values) {
+    const uint32_t* table32 = reinterpret_cast<const uint32_t*>(iq4nl_values);
+    uint32_t tmp[2];
+    const uint32_t low_high_selection_indices = 0x32103210 | ((q4 & 0x88888888) >> 1);
+#pragma unroll
+    for (uint32_t i = 0; i < 2; ++i) {
+        const uint32_t shift = 16 * i;
+        const uint32_t low =
+            dpct::byte_level_permute(table32[0], table32[1], q4 >> shift);
+        const uint32_t high =
+            dpct::byte_level_permute(table32[2], table32[3], q4 >> shift);
+        tmp[i] = dpct::byte_level_permute(low, high,
+                                          low_high_selection_indices >> shift);
+    }
+    return sycl::int2(dpct::byte_level_permute(tmp[0], tmp[1], 0x6420),
+                      dpct::byte_level_permute(tmp[0], tmp[1], 0x7531));
+}
+
+// Exact pinned vec_dot_iq4_xs_q8_1: a lane consumes one 32-element subblock,
+// computes integer dot products, applies signed scale in the integer domain,
+// then multiplies the two half scales and integer sum in the original order.
+__dpct_inline__ float iq4_xs_q8_dot(const IQ4XSBlock *__restrict__ w,
+                                    const Q81Block *__restrict__ x, int iqs,
+                                    int8_t *iq4nl_values) {
+    int sumi = 0;
+#pragma unroll
+    for (int j = 0; j < 4; ++j) {
+        const int aux_q4 = reinterpret_cast<const int*>(w->qs)[iqs + j];
+        const sycl::int2 v = iq4_table_lookup(aux_q4, iq4nl_values);
+        const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
+        const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
+        sumi = dpct::dp4a(v.x(), u0, sumi);
+        sumi = dpct::dp4a(v.y(), u1, sumi);
+    }
+    const int ls = ((w->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0f) |
+                   (((w->scales_h >> (iqs / 2)) & 0x03) << 4);
+    sumi *= ls - 32;
+    const float d = sycl::vec<sycl::half, 1>(w->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    x[iqs / 4].ds[0];
+    return d * sumi;
+}
+
+// IQ4_XS generic MMVQ: QK=256, QI=32, VDR=4,16 blocks per iteration.
+template <bool SmallK>
+__dpct_inline__ void
+native_iq4_xs_mmvq_kernel(const IQ4XSBlock *__restrict__ w,
+                          const Q81Block *__restrict__ x, float *__restrict__ y,
+                          int n_in, int n_out, int8_t *iq4nl_values) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = 4 * WARPS * WARP / 32;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / 256;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / 8; kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * 8;
+        const int kqs = 4 * (tid % 8);
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += iq4_xs_q8_dot(w + block, x + kby, kqs, iq4nl_values);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:899: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// Exact pinned vec_dot_q4_K_q8_1_impl_vmmq expression and integer dot order.
+__dpct_inline__ float
+q4_q8_dot_impl(const int *__restrict__ v, const int *__restrict__ u,
+               const uint8_t *__restrict__ sc, const uint8_t *__restrict__ m,
+               const sycl::half2 &dm4, const float *__restrict__ d8) {
+    float sumf_d = 0.0f;
+    float sumf_m = 0.0f;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int v0i = (v[0] >> (4 * i)) & 0x0f0f0f0f;
+        const int v1i = (v[1] >> (4 * i)) & 0x0f0f0f0f;
+        const int dot1 =
+            dpct::dp4a(v1i, u[2 * i + 1], dpct::dp4a(v0i, u[2 * i], 0));
+        const int dot2 = dpct::dp4a(0x01010101, u[2 * i + 1],
+                                    dpct::dp4a(0x01010101, u[2 * i], 0));
+        sumf_d += d8[i] * (dot1 * sc[i]);
+        sumf_m += d8[i] * (dot2 * m[i]);
+    }
+    const sycl::float2 dm4f =
+        dm4.template convert<float, sycl::rounding_mode::automatic>();
+    return dm4f.x() * sumf_d - dm4f.y() * sumf_m;
+}
+
+__dpct_inline__ float q4_q8_dot(const Q4KBlock *__restrict__ bq4,
+                                const Q81Block *__restrict__ bq8, int iqs) {
+    int v[2];
+    int u[4];
+    float d8[2];
+    const int bq8_offset = 2 * ((iqs / 2) / 4);
+    const int* ql = reinterpret_cast<const int*>(bq4->qs + 16 * bq8_offset + 4 * ((iqs / 2) % 4));
+    v[0] = ql[0];
+    v[1] = ql[4];
+
+    const uint16_t* scales = reinterpret_cast<const uint16_t*>(bq4->scales);
+    const int j = bq8_offset / 2;
+    const int jm = j & 1;
+    const uint32_t s0 = scales[jm];
+    const uint32_t s2 = scales[jm + 2];
+    const uint32_t s4 = scales[jm + 4];
+    const uint32_t hi = uint32_t(-int32_t(j >= 2));
+    uint16_t aux[2];
+    aux[0] = uint16_t(((s0 & 0x3f3f) & ~hi) |
+                     ((((s4 >> 0) & 0x0f0f) | ((s0 & 0xc0c0) >> 2)) & hi));
+    aux[1] = uint16_t(((s2 & 0x3f3f) & ~hi) |
+                     ((((s4 >> 4) & 0x0f0f) | ((s2 & 0xc0c0) >> 2)) & hi));
+    const uint8_t* sc = reinterpret_cast<const uint8_t*>(aux);
+    const uint8_t* m = sc + 2;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const Q81Block* bq8i = bq8 + bq8_offset + i;
+        d8[i] = bq8i->ds[0];
+        const int* q8 = reinterpret_cast<const int*>(bq8i->qs) + ((iqs / 2) % 4);
+        u[2 * i] = q8[0];
+        u[2 * i + 1] = q8[4];
+    }
+    return q4_q8_dot_impl(v, u, sc, m, bq4->dm, d8);
+}
+
+// The generic ncols=1 oracle uses 4 warps and 1 row (or 4 rows for small K),
+// eight weight blocks per K iteration, warp-ascending shared sum, then XOR tree.
+template <bool SmallK>
+__dpct_inline__ void native_q4_k_mmvq_kernel(const Q4KBlock *__restrict__ w,
+                                             const Q81Block *__restrict__ x,
+                                             float *__restrict__ y, int n_in,
+                                             int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = VDR * WARPS * WARP / QI;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / QK;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / (QI / VDR); kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * (QK / Q8K);
+        const int kqs = VDR * (tid % (QI / VDR));
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            // The source assumes allocator padding for partial row groups. This
+            // guard preserves every valid row's math without an out-of-bounds read.
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += q4_q8_dot(w + block, x + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:900: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// Exact pinned vec_dot_q6_K_q8_1: keep signed per-16-element scales,
+// signed-byte subtraction, DP4A order, and the float accumulation sequence.
+__dpct_inline__ float q6_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
+                                     const int8_t *__restrict__ scales, float d,
+                                     const float *__restrict__ d8) {
+    float sumf = 0.0f;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int sc = scales[4 * i];
+        const int vil = (vl >> (4 * i)) & 0x0f0f0f0f;
+        const int vih = ((vh >> (4 * i)) << 4) & 0x30303030;
+        const int vi = dpct::vectorized_binary<sycl::char4>(
+            vil | vih, 0x20202020, dpct::sub_sat());
+        sumf += d8[i] * (dpct::dp4a(vi, u[i], 0) * sc);
+    }
+    return d * sumf;
+}
+
+__dpct_inline__ float q6_q8_dot(const Q6KBlock *__restrict__ w,
+                                const Q81Block *__restrict__ x, int iqs) {
+    const int bq8_offset = 4 * (iqs / 16) + (iqs % 16) / 8;
+    const int scale_offset = 8 * (iqs / 16) + (iqs % 16) / 4;
+    const int vh_shift = 2 * ((iqs % 16) / 8);
+    const int vl = load_int_b2(w->ql, iqs);
+    const int vh = load_int_b2(w->qh, 8 * (iqs / 16) + iqs % 8) >> vh_shift;
+    int u[2];
+    float d8[2];
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        u[i] = reinterpret_cast<const int*>(x[bq8_offset + 2 * i].qs)[iqs % 8];
+        d8[i] = x[bq8_offset + 2 * i].ds[0];
+    }
+    return q6_q8_dot_impl(vl, vh, u, w->scales + scale_offset, w->d, d8);
+}
+
+// Q6_K generic MMVQ: QK=256, QI=32, VDR=1, four blocks per iteration.
+template <bool SmallK>
+__dpct_inline__ void native_q6_k_mmvq_kernel(const Q6KBlock *__restrict__ w,
+                                             const Q81Block *__restrict__ x,
+                                             float *__restrict__ y, int n_in,
+                                             int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = WARPS * WARP / 32;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / 256;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / 32; kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kby = kbx * 8;
+        const int kqs = tid % 32;
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += q6_q8_dot(w + block, x + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:901: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// The four 32-element formats use native two-byte loads and VDR=2. The affine
+// Q4_0/Q5_0 correction consumes the original-input sum stored in Q8_1, exactly
+// as the pinned CUDA dot does; a signed-integer code substitution would differ.
+__dpct_inline__ float small_q8_dot(const Q40Block *__restrict__ w,
+                                   const Q81Block *__restrict__ x, int iqs,
+                                   int8_t *iq4nl_values) {
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int v = load_int_b2(w->qs, iqs + i);
+        const int vi0 = (v >> 0) & 0x0f0f0f0f;
+        const int vi1 = (v >> 4) & 0x0f0f0f0f;
+        sumi = dpct::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
+                          sumi);
+        sumi = dpct::dp4a(
+            vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
+    }
+    const sycl::float2 ds =
+        (x->ds).template convert<float, sycl::rounding_mode::automatic>();
+    const float d = w->d;
+    return d * (sumi * ds.x() - 4 * ds.y());
+}
+
+__dpct_inline__ float small_q8_dot(const Q50Block *__restrict__ w,
+                                   const Q81Block *__restrict__ x, int iqs,
+                                   int8_t *iq4nl_values) {
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int vl = load_int_b2(w->qs, iqs + i);
+        const int vh = load_int_b2(w->qh, 0) >> (4 * (iqs + i));
+        int vi0 = (vl >> 0) & 0x0f0f0f0f;
+        vi0 |= (vh << 4) & 0x00000010;
+        vi0 |= (vh << 11) & 0x00001000;
+        vi0 |= (vh << 18) & 0x00100000;
+        vi0 |= (vh << 25) & 0x10000000;
+        sumi = dpct::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
+                          sumi);
+        int vi1 = (vl >> 4) & 0x0f0f0f0f;
+        vi1 |= (vh >> 12) & 0x00000010;
+        vi1 |= (vh >> 5) & 0x00001000;
+        vi1 |= (vh << 2) & 0x00100000;
+        vi1 |= (vh << 9) & 0x10000000;
+        sumi = dpct::dp4a(
+            vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
+    }
+    const sycl::float2 ds =
+        (x->ds).template convert<float, sycl::rounding_mode::automatic>();
+    const float d = w->d;
+    return d * (sumi * ds.x() - 8 * ds.y());
+}
+
+__dpct_inline__ float small_q8_dot(const Q80Block *__restrict__ w,
+                                   const Q81Block *__restrict__ x, int iqs,
+                                   int8_t *iq4nl_values) {
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const int v = load_int_b2(w->qs, iqs + i);
+        const int u = reinterpret_cast<const int*>(x->qs)[iqs + i];
+        sumi = dpct::dp4a(v, u, sumi);
+    }
+    const float d0 = w->d;
+    const float d1 = x->ds[0];
+    return d0 * d1 * float(sumi);
+}
+
+__dpct_inline__ float small_q8_dot(const IQ4NLBlock *__restrict__ w,
+                                   const Q81Block *__restrict__ x, int iqs,
+                                   int8_t *iq4nl_values) {
+    const int* q8 = reinterpret_cast<const int*>(x->qs) + iqs;
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const sycl::int2 v =
+            iq4_table_lookup(load_int_b2(w->qs, iqs + i), iq4nl_values);
+        sumi = dpct::dp4a(v.x(), q8[i], sumi);
+        sumi = dpct::dp4a(v.y(), q8[i + 4], sumi);
+    }
+    const float d = sycl::vec<sycl::half, 1>(w->d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0] *
+                    x->ds[0];
+    return d * sumi;
+}
+
+// QI=4 for Q4_0/Q5_0/IQ4_NL and QI=8 for Q8_0. With VDR=2 this preserves
+// the pinned 64/32-block iteration and 2048/1024-element small-K thresholds.
+template <typename Weight, int Qi, bool SmallK>
+__dpct_inline__ void native_small_mmvq_kernel(const Weight *__restrict__ w,
+                                              const Q81Block *__restrict__ x,
+                                              float *__restrict__ y, int n_in,
+                                              int n_out, int8_t *iq4nl_values) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int ROWS = SmallK ? WARPS : 1;
+    constexpr int BLOCKS_PER_ITER = 2 * WARPS * WARP / Qi;
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / 32;
+    float tmp[ROWS] = {};
+    for (int kbx = tid / (Qi / 2); kbx < blocks_per_row; kbx += BLOCKS_PER_ITER) {
+        const int kqs = 2 * (tid % (Qi / 2));
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                tmp[i] += small_q8_dot(w + block, x + kbx, kqs, iq4nl_values);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS - 1][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i)
+            partial[item_ct1.get_local_id(1) - 1][i][item_ct1.get_local_id(2)] =
+                tmp[i];
+    }
+    /*
+    DPCT1065:902: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+        for (int l = 0; l < WARPS - 1; ++l) tmp[i] +=
+            partial[l][i][item_ct1.get_local_id(2)];
+        tmp[i] = warp_sum(tmp[i]);
+        if (item_ct1.get_local_id(2) == i && row0 + i < n_out) y[row0 + i] =
+            tmp[i];
+    }
+}
+
+// ============================ plan v0.3 P3: ncols = 2..8 (speculative verify, small batches) ============================
+//
+// One generic kernel for every format, parameterized by the format's iteration traits below, which are
+// transcribed from the ncols = 1 kernels above (same thread-to-block mapping, same blocks per iteration, same
+// small-K rule). Column j reads activation blocks x + j * (n_in / 32) and writes y + j * n_out. Each (column,
+// row) value is accumulated over kbx in the same order, summed across warps in the same order and reduced with
+// the same warp tree as the ncols = 1 kernel, so every column is BITWISE equal to a single-column call on that
+// column (checked by bench/micro/native_mmvq_multi.cpp). The ncols = 1 kernels are untouched.
+constexpr int MAX_NCOLS = 8;
+
+// Each format splits its dot product into `load` (everything that depends only on the weight block: codes,
+// unpacked scales, block scale) and `apply` (the activation loads and the original *_impl expression). `load` runs
+// once per (row, block) and `apply` once per column, so adding columns adds only activation work. `apply` calls
+// the same impl functions, in the same order, with the same values as the ncols = 1 dot, which is what keeps
+// every column bitwise equal to it.
+struct Q5KTraits {
+    using Block = Q5KBlock;
+    static constexpr int DIV = QK, T = QI / VDR, KBY = QK / Q8K, BPI = VDR * WARPS * WARP / QI;
+    static int kqs(int tid) { return VDR * (tid % (QI / VDR)); }
+    struct W {
+        int vl[2], vh[2]; uint16_t aux[2]; sycl::half2 dm; int bq8_offset;
+    };
+    static W load(const Block* __restrict__ bq5, int iqs) {
+        W r;
+        r.bq8_offset = 2 * ((iqs / 2) / 4);
+        const int* ql = reinterpret_cast<const int*>(bq5->qs + 16 * r.bq8_offset + 4 * ((iqs / 2) % 4));
+        const int* qh = reinterpret_cast<const int*>(bq5->qh + 4 * ((iqs / 2) % 4));
+        r.vl[0] = ql[0];
+        r.vl[1] = ql[4];
+        r.vh[0] = qh[0] >> r.bq8_offset;
+        r.vh[1] = qh[4] >> r.bq8_offset;
+        const uint16_t* scales = reinterpret_cast<const uint16_t*>(bq5->scales);
+        const int j = r.bq8_offset / 2;
+        const int jm = j & 1;
+        const uint32_t s0 = scales[jm];
+        const uint32_t s2 = scales[jm + 2];
+        const uint32_t s4 = scales[jm + 4];
+        const uint32_t hi = uint32_t(-int32_t(j >= 2));
+        r.aux[0] = uint16_t(((s0 & 0x3f3f) & ~hi) | ((((s4 >> 0) & 0x0f0f) | ((s0 & 0xc0c0) >> 2)) & hi));
+        r.aux[1] = uint16_t(((s2 & 0x3f3f) & ~hi) | ((((s4 >> 4) & 0x0f0f) | ((s2 & 0xc0c0) >> 2)) & hi));
+        r.dm = bq5->dm;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ bq8, int iqs) {
+        int u[4];
+        float d8[2];
+#pragma unroll
+        for (int i = 0; i < 2; ++i) {
+            const Q81Block* bq8i = bq8 + r.bq8_offset + i;
+            d8[i] = bq8i->ds[0];
+            const int* q8 = reinterpret_cast<const int*>(bq8i->qs) + ((iqs / 2) % 4);
+            u[2 * i] = q8[0];
+            u[2 * i + 1] = q8[4];
+        }
+        const uint8_t* sc = reinterpret_cast<const uint8_t*>(r.aux);
+        return q5_q8_dot_impl(r.vl, r.vh, u, sc, sc + 2, r.dm, d8);
+    }
+};
+struct Q4KTraits {
+    using Block = Q4KBlock;
+    static constexpr int DIV = QK, T = QI / VDR, KBY = QK / Q8K, BPI = VDR * WARPS * WARP / QI;
+    static int kqs(int tid) { return VDR * (tid % (QI / VDR)); }
+    struct W { int v[2]; uint16_t aux[2]; sycl::half2 dm; int bq8_offset; };
+    static W load(const Block* __restrict__ bq4, int iqs) {
+        W r;
+        r.bq8_offset = 2 * ((iqs / 2) / 4);
+        const int* ql = reinterpret_cast<const int*>(bq4->qs + 16 * r.bq8_offset + 4 * ((iqs / 2) % 4));
+        r.v[0] = ql[0];
+        r.v[1] = ql[4];
+        const uint16_t* scales = reinterpret_cast<const uint16_t*>(bq4->scales);
+        const int j = r.bq8_offset / 2;
+        const int jm = j & 1;
+        const uint32_t s0 = scales[jm];
+        const uint32_t s2 = scales[jm + 2];
+        const uint32_t s4 = scales[jm + 4];
+        const uint32_t hi = uint32_t(-int32_t(j >= 2));
+        r.aux[0] = uint16_t(((s0 & 0x3f3f) & ~hi) | ((((s4 >> 0) & 0x0f0f) | ((s0 & 0xc0c0) >> 2)) & hi));
+        r.aux[1] = uint16_t(((s2 & 0x3f3f) & ~hi) | ((((s4 >> 4) & 0x0f0f) | ((s2 & 0xc0c0) >> 2)) & hi));
+        r.dm = bq4->dm;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ bq8, int iqs) {
+        int u[4];
+        float d8[2];
+#pragma unroll
+        for (int i = 0; i < 2; ++i) {
+            const Q81Block* bq8i = bq8 + r.bq8_offset + i;
+            d8[i] = bq8i->ds[0];
+            const int* q8 = reinterpret_cast<const int*>(bq8i->qs) + ((iqs / 2) % 4);
+            u[2 * i] = q8[0];
+            u[2 * i + 1] = q8[4];
+        }
+        const uint8_t* sc = reinterpret_cast<const uint8_t*>(r.aux);
+        return q4_q8_dot_impl(r.v, u, sc, sc + 2, r.dm, d8);
+    }
+};
+struct Q20Traits {
+    using Block = Q20Block;
+    static constexpr int DIV = 64, T = 2, KBY = 2, BPI = WARPS * WARP / 2;
+    static int kqs(int tid) { return tid % 2; }
+    struct W { int qx[4], qy[4]; float d2; };
+    static W load(const Block* __restrict__ w, int iqs) {
+        W r;
+        r.d2 = w->d;
+        const int16_t* qs = reinterpret_cast<const int16_t*>(w->qs) + iqs * 4;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int q = qs[j];
+            const int qe =
+                dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 0);
+            const int qo =
+                dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 2);
+            r.qx[j] = dpct::byte_level_permute(qe, qo, 0x5140);
+            r.qy[j] = dpct::byte_level_permute(qe, qo, 0x7362);
+        }
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ x, int iqs) {
+        const Q81Block* chunk = x + iqs;
+        const int* q8 = reinterpret_cast<const int*>(chunk->qs);
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            sumi = dpct::dp4a(q8[j * 2], r.qx[j], sumi);
+            sumi = dpct::dp4a(q8[j * 2 + 1], r.qy[j], sumi);
+        }
+        const float d8 = chunk->ds[0];
+        return r.d2 * d8 * sumi;
+    }
+};
+struct Q3KTraits {
+    using Block = Q3KBlock;
+    static constexpr int DIV = 256, T = 16, KBY = 8, BPI = WARPS * WARP / 16;
+    static int kqs(int tid) { return tid % 16; }
+    struct W { int vl, vh; float d; const uint8_t* scales; int scale_offset, bq8_offset; };
+    static W load(const Block* __restrict__ w, int iqs) {
+        W r;
+        r.bq8_offset = 4 * (iqs / 8);
+        r.scale_offset = iqs - iqs % 8 + (iqs % 8) / 4;
+        r.d = w->d;
+        r.vl = load_int_b2(w->qs, iqs);
+        r.vh = ~load_int_b2(w->hmask, iqs % 8) >> r.bq8_offset;
+        r.scales = w->scales;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ x, int iqs) {
+        int u[4];
+        float d8[4];
+#pragma unroll
+        for (int i = 0; i < 4; ++i) {
+            u[i] = reinterpret_cast<const int*>(x[r.bq8_offset + i].qs)[iqs % 8];
+            d8[i] = x[r.bq8_offset + i].ds[0];
+        }
+        return q3_q8_dot_impl(r.vl, r.vh, u, r.scales, r.scale_offset, r.d, d8);
+    }
+};
+struct Q6KTraits {
+    using Block = Q6KBlock;
+    static constexpr int DIV = 256, T = 32, KBY = 8, BPI = WARPS * WARP / 32;
+    static int kqs(int tid) { return tid % 32; }
+    struct W { int vl, vh; float d; const int8_t* scales; int bq8_offset; };
+    static W load(const Block* __restrict__ w, int iqs) {
+        W r;
+        r.bq8_offset = 4 * (iqs / 16) + (iqs % 16) / 8;
+        const int scale_offset = 8 * (iqs / 16) + (iqs % 16) / 4;
+        const int vh_shift = 2 * ((iqs % 16) / 8);
+        r.vl = load_int_b2(w->ql, iqs);
+        r.vh = load_int_b2(w->qh, 8 * (iqs / 16) + iqs % 8) >> vh_shift;
+        r.scales = w->scales + scale_offset;
+        r.d = w->d;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ x, int iqs) {
+        int u[2];
+        float d8[2];
+#pragma unroll
+        for (int i = 0; i < 2; ++i) {
+            u[i] = reinterpret_cast<const int*>(x[r.bq8_offset + 2 * i].qs)[iqs % 8];
+            d8[i] = x[r.bq8_offset + 2 * i].ds[0];
+        }
+        return q6_q8_dot_impl(r.vl, r.vh, u, r.scales, r.d, d8);
+    }
+};
+struct IQ4XSTraits {
+    using Block = IQ4XSBlock;
+    static constexpr int DIV = 256, T = 8, KBY = 8, BPI = 4 * WARPS * WARP / 32;
+    static int kqs(int tid) { return 4 * (tid % 8); }
+    struct W { sycl::int2 v[4]; int ls; float dw; };
+    static W load(const Block* __restrict__ w, int iqs) { return load(w, iqs, const_cast<int8_t*>(kIq4nlTable)); }
+    static W load(const Block* __restrict__ w, int iqs, int8_t *iq4nl_values) {
+        W r;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) r.v[j] = iq4_table_lookup(
+            reinterpret_cast<const int *>(w->qs)[iqs + j], iq4nl_values);
+        r.ls = ((w->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0f) | (((w->scales_h >> (iqs / 2)) & 0x03) << 4);
+        r.dw = sycl::vec<sycl::half, 1>(w->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* __restrict__ x, int iqs) {
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
+            const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
+            sumi = dpct::dp4a(r.v[j].x(), u0, sumi);
+            sumi = dpct::dp4a(r.v[j].y(), u1, sumi);
+        }
+        sumi *= r.ls - 32;
+        const float d = r.dw * x[iqs / 4].ds[0];
+        return d * sumi;
+    }
+};
+// The four 32-element formats: `load` keeps the block pointer (their decode is a few integer ops) and `apply` is
+// the unchanged small_q8_dot. Their per-column cost is small; the win above is for the K and IQ formats.
+template<typename Weight, int Qi>
+struct SmallTraits {
+    using Block = Weight;
+    static constexpr int DIV = 32, T = Qi / 2, KBY = 1, BPI = 2 * WARPS * WARP / Qi;
+    static int kqs(int tid) { return 2 * (tid % (Qi / 2)); }
+    struct W { const Weight* w; };
+    static W load(const Block* __restrict__ w, int) { return W{w}; }
+    static float apply(const W &r, const Q81Block *__restrict__ x, int k) { return apply(r, x, k, const_cast<int8_t*>(kIq4nlTable)); }
+    static float apply(const W &r, const Q81Block *__restrict__ x, int k,
+                       int8_t *iq4nl_values) {
+        return small_q8_dot(r.w, x, k, iq4nl_values);
+    }
+};
+
+// NW warps per block and ROWS rows per block. The EXACT layout (NW = 4, ROWS = 1, or 4 for small K) is the
+// ncols = 1 layout and keeps every column bitwise equal to a single-column call. The UPSTREAM layout is
+// llama.cpp's generic multi-column table (ncols 2-4: 4 warps; 5-8: 2 warps; always 2 rows per block): faster,
+// equal to ncols = 1 only to float rounding (the cross-warp reduction groups partial sums differently).
+bool g_multi_exact = true;   // until the upstream layout is timed on an idle GPU (plan rule: default only what is measured)
+
+template <typename F, int NCOLS, int NW, int ROWS>
+/*
+DPCT1110:206: The total declared local variable size in device function
+native_mmvq_multi_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
+                         const Q81Block *__restrict__ x, float *__restrict__ y,
+                         int n_in, int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int BPI =
+        F::BPI * NW / WARPS; // blocks per iteration scale with the warp count
+    const int tid =
+        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+    const int row0 = ROWS * int(item_ct1.get_group(2));
+    const int blocks_per_row = n_in / F::DIV;
+    const int x_stride = n_in / Q8K;                   // Q8_1 blocks per activation column
+    float tmp[NCOLS][ROWS] = {};
+    for (int kbx = tid / F::T; kbx < blocks_per_row; kbx += BPI) {
+        const int kby = kbx * F::KBY;
+        const int kqs = F::kqs(tid);
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+            if (row0 + i < n_out) {
+                const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
+                /*
+                DPCT1084:299: The function call "Q5KTraits::load" has multiple
+                migration results in different template instantiations that
+                could not be unified. You may need to adjust the code.
+                */
+                const typename F::W wv =
+                    F::load(w + block, kqs); // once per (row, block)
+#pragma unroll
+                for (int j = 0; j < NCOLS; ++j)                         // then per column
+                    /*
+                    DPCT1084:300: The function call "Q5KTraits::apply" has
+                    multiple migration results in different template
+                    instantiations that could not be unified. You may need to
+                    adjust the code.
+                    */
+                    tmp[j][i] +=
+                        F::apply(wv, x + std::size_t(j) * x_stride + kby, kqs);
+            }
+        }
+    }
+    auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[NW - 1 > 0 ? NW - 1 : 1][NCOLS][ROWS][WARP]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(1) > 0) {
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j)
+#pragma unroll
+            for (int i = 0; i < ROWS; ++i)
+                partial[item_ct1.get_local_id(1) - 1][j][i]
+                       [item_ct1.get_local_id(2)] = tmp[j][i];
+    }
+    /*
+    DPCT1065:903: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_local_id(1) > 0) return;
+#pragma unroll
+    for (int j = 0; j < NCOLS; ++j) {
+#pragma unroll
+        for (int i = 0; i < ROWS; ++i) {
+#pragma unroll
+            for (int l = 0; l < NW - 1; ++l) tmp[j][i] +=
+                partial[l][j][i][item_ct1.get_local_id(2)];
+            tmp[j][i] = warp_sum(tmp[j][i]);
+            if (item_ct1.get_local_id(2) == i && row0 + i < n_out)
+                y[std::size_t(j) * n_out + row0 + i] = tmp[j][i];
+        }
+    }
+}
+
+template <typename F, int NCOLS>
+void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
+                    int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const typename F::Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    if (!g_multi_exact) {
+        constexpr int NW = NCOLS <= 4 ? 4 : 2;
+        const unsigned blocks = unsigned((std::size_t(n_out) + 1) / 2);
+        /*
+        DPCT1049:207: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+            s->parallel_for<dpct_kernel_name<
+                class native_mmvq_multi_kernel_646c3d, F,
+                dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<NW>,
+                dpct_kernel_scalar<2>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, NW, WARP),
+                                  sycl::range(1, NW, WARP)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_mmvq_multi_kernel<F, NCOLS, NW, 2>(w, x, y, n_in,
+                                                                  n_out);
+                    });
+        }
+        return;
+    }
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / F::DIV < F::BPI) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:208: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+            s->parallel_for<dpct_kernel_name<
+                class native_mmvq_multi_kernel_23124e, F,
+                dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<WARPS>,
+                dpct_kernel_scalar<WARPS>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_mmvq_multi_kernel<F, NCOLS, WARPS, WARPS>(
+                            w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:209: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+        s->parallel_for<dpct_kernel_name<
+            class native_mmvq_multi_kernel_75e8ad, F, dpct_kernel_scalar<NCOLS>,
+            dpct_kernel_scalar<WARPS>, dpct_kernel_scalar<1>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_mmvq_multi_kernel<F, NCOLS, WARPS, 1>(w, x, y, n_in,
+                                                             n_out);
+            });
+    }
+}
+
+template<typename F>
+void launch_multi(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols,
+                  void* stream) {
+    const auto s = strata::q_of(stream);
+    switch (ncols) {
+        case 2: launch_multi_n<F, 2>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 3: launch_multi_n<F, 3>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 4: launch_multi_n<F, 4>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 5: launch_multi_n<F, 5>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 6: launch_multi_n<F, 6>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 7: launch_multi_n<F, 7>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 8: launch_multi_n<F, 8>(weights, x_q8_1, y, n_in, n_out, s); break;
+        default: throw std::invalid_argument("native MMVQ multi-column launch requires 2 <= ncols <= 8");
+    }
+}
+
+void validate_shape(int n_in, int ncols, int block_elems = Q8K) {
+    if (n_in <= 0 || n_in % block_elems != 0) {
+        throw std::invalid_argument("native MMVQ requires n_in > 0 and divisible by its block element count");
+    }
+    if (ncols < 1 || ncols > MAX_NCOLS) throw std::invalid_argument("native MMVQ requires 1 <= ncols <= 8");
+}
+void validate_pointer(const void* p) {
+    if (!p || reinterpret_cast<std::uintptr_t>(p) % 4 != 0) {
+        throw std::invalid_argument("native MMVQ requires non-null 4-byte aligned device pointers");
+    }
+}
+void validate_stream(void* stream) {
+    if (!stream) throw std::invalid_argument("native MMVQ requires an explicit non-null CUDA stream");
+}
+void launch_check() {
+    /*
+    DPCT1010:906: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1000:905: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error != 0) {
+        /*
+        DPCT1009:907: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:904: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("native MMVQ launch: ") +
+                                 dpct::get_error_string_dummy(error));
+    }
+}
+
+template<typename Weight, int Qi>
+void small_mmvq(const void* weights, const void* x_q8_1, float* y,
+                int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 32);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<SmallTraits<Weight, Qi>>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Weight*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 32 < 2 * WARPS * WARP / Qi) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:210: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            iq4nl_values.init(*s);
+
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->submit([&](sycl::handler &cgh) {
+                auto iq4nl_values_ptr_ct1 = iq4nl_values.get_ptr();
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class native_small_mmvq_kernel_75ea67, Weight,
+                    dpct_kernel_scalar<Qi>, dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads,
+                                      threads),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            native_small_mmvq_kernel<Weight, Qi, true>(
+                                w, x, y, n_in, n_out, iq4nl_values_ptr_ct1);
+                        });
+            });
+        }
+    } else {
+        /*
+        DPCT1049:211: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        iq4nl_values.init(*s);
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+            auto iq4nl_values_ptr_ct1 = iq4nl_values.get_ptr();
+
+            cgh.parallel_for<dpct_kernel_name<
+                class native_small_mmvq_kernel_7408e4, Weight,
+                dpct_kernel_scalar<Qi>, dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                                  threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_small_mmvq_kernel<Weight, Qi, false>(
+                            w, x, y, n_in, n_out, iq4nl_values_ptr_ct1);
+                    });
+        });
+    }
+    launch_check();
+}
+
+template<typename Weight, int Qi>
+void small_f32(const void* weights, const float* x, void* scratch_q8_1,
+               float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 32);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    small_mmvq<Weight, Qi>(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+} // namespace
+
+void native_mmvq_set_multi_exact(bool exact) { g_multi_exact = exact; }
+bool native_mmvq_multi_exact() { return g_multi_exact; }
+
+std::size_t native_q8_1_bytes(int n_in, int ncols) {
+    validate_shape(n_in, ncols);
+    return std::size_t(ncols) * std::size_t(n_in / Q8K) * sizeof(Q81Block);
+}
+
+void native_quantize_q8_1(const float* x, void* x_q8_1, int n_in, int ncols, void* stream) {
+    validate_shape(n_in, ncols);
+    validate_pointer(x);
+    validate_pointer(x_q8_1);
+    validate_stream(stream);
+    // Columns are contiguous and n_in is a multiple of 32, so ncols columns quantize as one vector of
+    // ncols * n_in elements: every 32-element block stays inside one column.
+    const int n_total = n_in * ncols;
+    const unsigned blocks = unsigned((std::size_t(n_total) + QUANT_THREADS - 1) / QUANT_THREADS);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<
+                dpct_kernel_name<class native_quantize_q8_1_kernel_b480d2>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, QUANT_THREADS),
+                                  sycl::range(1, 1, QUANT_THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_quantize_q8_1_kernel(
+                            x, static_cast<Q81Block *>(x_q8_1), n_total);
+                    });
+    }
+    launch_check();
+}
+
+void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, QK);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<Q5KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Q5KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / QK < VDR * WARPS * WARP / QI) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:212: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+            s->parallel_for<
+                dpct_kernel_name<class native_q5_k_mmvq_kernel_cee99f,
+                                 dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_q5_k_mmvq_kernel<true>(w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:213: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+        s->parallel_for<dpct_kernel_name<class native_q5_k_mmvq_kernel_4061e4,
+                                         dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_q5_k_mmvq_kernel<false>(w, x, y, n_in, n_out);
+            });
+    }
+    launch_check();
+}
+
+void native_q5_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream) {
+    // Validate all outputs before enqueueing the first operation.
+    validate_shape(n_in, ncols, QK);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_q5_k_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q2_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 64);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<Q20Traits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Q20Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 64 < WARPS * WARP / 2) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:214: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<
+                dpct_kernel_name<class native_q2_0_mmvq_kernel_b58485,
+                                 dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_q2_0_mmvq_kernel<true>(w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:215: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<dpct_kernel_name<class native_q2_0_mmvq_kernel_42f157,
+                                         dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_q2_0_mmvq_kernel<false>(w, x, y, n_in, n_out);
+            });
+    }
+    launch_check();
+}
+
+void native_q2_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 64);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_q2_0_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q3_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<Q3KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Q3KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 256 < WARPS * WARP / 16) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:216: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<
+                dpct_kernel_name<class native_q3_k_mmvq_kernel_616146,
+                                 dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_q3_k_mmvq_kernel<true>(w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:217: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<dpct_kernel_name<class native_q3_k_mmvq_kernel_72056c,
+                                         dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_q3_k_mmvq_kernel<false>(w, x, y, n_in, n_out);
+            });
+    }
+    launch_check();
+}
+
+void native_q3_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_q3_k_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<IQ4XSTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const IQ4XSBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 256 < 4 * WARPS * WARP / 32) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:218: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            iq4nl_values.init(*s);
+
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->submit([&](sycl::handler &cgh) {
+                auto iq4nl_values_ptr_ct1 = iq4nl_values.get_ptr();
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class native_iq4_xs_mmvq_kernel_4d1d70,
+                                     dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads,
+                                      threads),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            native_iq4_xs_mmvq_kernel<true>(
+                                w, x, y, n_in, n_out, iq4nl_values_ptr_ct1);
+                        });
+            });
+        }
+    } else {
+        /*
+        DPCT1049:219: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        iq4nl_values.init(*s);
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+            auto iq4nl_values_ptr_ct1 = iq4nl_values.get_ptr();
+
+            cgh.parallel_for<
+                dpct_kernel_name<class native_iq4_xs_mmvq_kernel_e6ab3b,
+                                 dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                                  threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_iq4_xs_mmvq_kernel<false>(w, x, y, n_in, n_out,
+                                                         iq4nl_values_ptr_ct1);
+                    });
+        });
+    }
+    launch_check();
+}
+
+void native_iq4_xs_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_iq4_xs_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<Q4KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Q4KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 256 < WARPS * WARP / 16) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:220: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+            s->parallel_for<
+                dpct_kernel_name<class native_q4_k_mmvq_kernel_e486cb,
+                                 dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_q4_k_mmvq_kernel<true>(w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:221: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp16});
+
+        s->parallel_for<dpct_kernel_name<class native_q4_k_mmvq_kernel_1ca3b8,
+                                         dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_q4_k_mmvq_kernel<false>(w, x, y, n_in, n_out);
+            });
+    }
+    launch_check();
+}
+
+void native_q4_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_q4_k_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    if (ncols > 1) {
+        launch_multi<Q6KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+        launch_check();
+        return;
+    }
+    const auto* w = static_cast<const Q6KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const auto s = strata::q_of(stream);
+    const dpct::dim3 threads(WARP, WARPS);
+    if (n_in / 256 < WARPS * WARP / 32) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        /*
+        DPCT1049:222: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<
+                dpct_kernel_name<class native_q6_k_mmvq_kernel_902936,
+                                 dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * threads, threads),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        native_q6_k_mmvq_kernel<true>(w, x, y, n_in, n_out);
+                    });
+        }
+    } else {
+        /*
+        DPCT1049:223: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<dpct_kernel_name<class native_q6_k_mmvq_kernel_239e8f,
+                                         dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * threads,
+                              threads),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                native_q6_k_mmvq_kernel<false>(w, x, y, n_in, n_out);
+            });
+    }
+    launch_check();
+}
+
+void native_q6_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream) {
+    validate_shape(n_in, ncols, 256);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    validate_pointer(weights);
+    validate_pointer(x);
+    validate_pointer(scratch_q8_1);
+    validate_pointer(y);
+    validate_stream(stream);
+    native_quantize_q8_1(x, scratch_q8_1, n_in, ncols, stream);
+    native_q6_k_mmvq(weights, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q4_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream) {
+    small_mmvq<Q40Block, 4>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q4_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream) {
+    small_f32<Q40Block, 4>(weights, x, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q5_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream) {
+    small_mmvq<Q50Block, 4>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q5_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream) {
+    small_f32<Q50Block, 4>(weights, x, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q8_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream) {
+    small_mmvq<Q80Block, 8>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_q8_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream) {
+    small_f32<Q80Block, 8>(weights, x, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_iq4_nl_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream) {
+    small_mmvq<IQ4NLBlock, 4>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+void native_iq4_nl_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream) {
+    small_f32<IQ4NLBlock, 4>(weights, x, scratch_q8_1, y, n_in, n_out, ncols, stream);
+}
+
+bool native_mmvq_supported(int ggml_type) noexcept {
+    return ggml_type == 2 || ggml_type == 6 || ggml_type == 8 || ggml_type == 11 ||
+           ggml_type == 12 || ggml_type == 13 || ggml_type == 14 || ggml_type == 20 ||
+           ggml_type == 23 || ggml_type == 42 || ggml_type == 16 || ggml_type == 17 || ggml_type == 18 ||
+           ggml_type == 21 || ggml_type == 22 || ggml_type == 29;
+}
+
+std::size_t native_mmvq_weight_bytes(int ggml_type, int n_in, int n_out) {
+    int block_elems, block_bytes;
+    switch (ggml_type) {
+    case 2: block_elems = 32; block_bytes = 18; break;
+    case 6: block_elems = 32; block_bytes = 22; break;
+    case 8: block_elems = 32; block_bytes = 34; break;
+    case 20: block_elems = 32; block_bytes = 18; break;
+    case 11: block_elems = 256; block_bytes = 110; break;
+    case 12: block_elems = 256; block_bytes = 144; break;
+    case 13: block_elems = 256; block_bytes = 176; break;
+    case 14: block_elems = 256; block_bytes = 210; break;
+    case 23: block_elems = 256; block_bytes = 136; break;
+    case 42: block_elems = 64; block_bytes = 18; break;
+    case 16: case 17: case 18: case 21: case 22: case 29:
+        block_elems = 256; block_bytes = (int) iq_row_bytes(ggml_type, 256); break;
+    default: throw std::invalid_argument("unsupported native MMVQ GGML type");
+    }
+    validate_shape(n_in, 1, block_elems);
+    if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
+    const std::size_t row_bytes = std::size_t(n_in / block_elems) * block_bytes;
+    if (row_bytes > std::numeric_limits<std::size_t>::max() / std::size_t(n_out)) {
+        throw std::length_error("native MMVQ weight byte count overflows size_t");
+    }
+    return row_bytes * std::size_t(n_out);
+}
+
+void native_mmvq(int ggml_type, const void* weights, const void* x_q8_1, float* y,
+                 int n_in, int n_out, int ncols, void* stream) {
+    switch (ggml_type) {
+    case 2: native_q4_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 6: native_q5_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 8: native_q8_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 20: native_iq4_nl_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 11: native_q3_k_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 12: native_q4_k_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 13: native_q5_k_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 14: native_q6_k_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 23: native_iq4_xs_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 42: native_q2_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 16: case 17: case 18: case 21: case 22: case 29:
+        iq_mmvq(ggml_type, weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    default: throw std::invalid_argument("unsupported native MMVQ GGML type");
+    }
+}
+
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_moe.dp.cpp b/sycl/src/kernels/cuda/native_moe.dp.cpp
new file mode 100644
index 00000000000..b94b5f850da
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_moe.dp.cpp
@@ -0,0 +1,156 @@
+// Arithmetic adapted from the MIT-licensed pinned ggml CUDA
+// moe-weighted-reduction.cu at 3cf03257f219afbe7334045ff7c6a06ac68c627d.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_moe.hpp"
+#include <atomic>
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+__dpct_inline__ void combine(const float *__restrict__ parts,
+                             const float *__restrict__ weights,
+                             const float *__restrict__ shared,
+                             float *__restrict__ output, int64_t n_embd,
+                             int k) {
+    // blockIdx.y = the token of a multi-token launch (0 for the single one)
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t tk = item_ct1.get_group(1);
+    parts += tk * k * n_embd; weights += tk * k; if (shared) shared += tk * n_embd; output += tk * n_embd;
+    const int64_t col =
+        int64_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (col >= n_embd) return;
+    float sum = parts[col] * weights[0];
+#pragma unroll
+    for (int expert = 1; expert < k; ++expert) {
+        sum += parts[int64_t(expert) * n_embd + col] * weights[expert];
+    }
+    if (shared) sum += shared[col];
+    output[col] = sum;
+}
+bool valid_span(const void* p, size_t bytes) {
+    const auto address = reinterpret_cast<uintptr_t>(p);
+    return p && address % alignof(float) == 0 && bytes <= UINTPTR_MAX - address;
+}
+bool overlap(const void* a, size_t an, const void* b, size_t bn) {
+    const auto ap = reinterpret_cast<uintptr_t>(a), bp = reinterpret_cast<uintptr_t>(b);
+    return ap < bp + bn && bp < ap + an;
+}
+}
+void native_moe_combine_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_moe_combine_enabled() { return enabled.load(std::memory_order_relaxed); }
+void native_moe_combine(const float* parts, const float* weights, const float* shared,
+                        float* output, int64_t n_embd, int64_t k, void* stream) {
+    if (!stream || n_embd <= 0 || n_embd > std::numeric_limits<int>::max() || k < 1 || k > 15)
+        throw std::invalid_argument("native MoE combine requires a stream, positive width and 1..15 experts");
+    const size_t row_bytes = size_t(n_embd) * sizeof(float);
+    const size_t part_bytes = row_bytes * size_t(k), weight_bytes = size_t(k) * sizeof(float);
+    if (!valid_span(parts, part_bytes) || !valid_span(weights, weight_bytes) || !valid_span(output, row_bytes)
+            || (shared && !valid_span(shared, row_bytes))
+            || overlap(output, row_bytes, parts, part_bytes)
+            || overlap(output, row_bytes, weights, weight_bytes)
+            || (shared && overlap(output, row_bytes, shared, row_bytes)))
+        throw std::invalid_argument("native MoE combine requires aligned spans and disjoint output");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class combine_d6d46b>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, unsigned((n_embd + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    combine(parts, weights, shared, output, n_embd, int(k));
+                });
+    }
+    /*
+    DPCT1010:597: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:598: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:595: The statement could not be removed.
+    */
+    /*
+    DPCT1000:596: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+void native_moe_combine_multi(const float* parts, const float* weights, const float* shared, float* output,
+                              int64_t n_embd, int64_t k, int n_tok, void* stream) {
+    if (!stream || n_embd <= 0 || k < 1 || k > 15 || n_tok < 1)
+        throw std::invalid_argument("native MoE combine (multi) requires a stream, width, 1..15 experts, tokens");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class combine_eee9de>>(
+                sycl::nd_range<3>(sycl::range(1, (unsigned)n_tok,
+                                              unsigned((n_embd + 255) / 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    combine(parts, weights, shared, output, n_embd, int(k));
+                });
+    }
+    /*
+    DPCT1010:601: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:602: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:599: The statement could not be removed.
+    */
+    /*
+    DPCT1000:600: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+}
diff --git a/sycl/src/kernels/cuda/native_ple_postops.dp.cpp b/sycl/src/kernels/cuda/native_ple_postops.dp.cpp
new file mode 100644
index 00000000000..d90b7a458c4
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_ple_postops.dp.cpp
@@ -0,0 +1,516 @@
+// Arithmetic adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// src/models/qwen4exp.cpp and ggml-cuda/{reduce_rows.cuh,sumrows.cu,unary.cu}.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_ple_postops.hpp"
+#include "strata/kernels/native_gr_norm.hpp"
+#include "strata/kernels/ngram.hpp"
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <string>
+
+namespace strata::kernels {
+namespace {
+constexpr int N = 2560, H = 4, D = N * H, HISTORY = 9;
+inline float warp_sum(float x) {
+    /*
+DPCT1108:50: '__shfl_xor_sync' was migrated with the experimental feature masked
+sub_group function which may not be supported by all compilers or runtimes. You
+may need to adjust the code.
+*/
+#pragma unroll
+    for (int offset = 16; offset; offset >>= 1) x +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            offset);
+    return x;
+}
+__dpct_inline__ void gate_kernel(const float *key, const float *query,
+                                 float *gate, float scale) {
+    // SUM_ROWS selects 512 threads for four rows on the target GPU. Preserve
+    // its eight partial lanes and materialized MUL rounding (never a dot FMA).
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    float sums[8] = {};
+#pragma unroll
+    for (int j = 0; j < 8; ++j) {
+        const int d = item_ct1.get_local_id(2) + j * 512;
+        /*
+        DPCT1013:372: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float p = d < N ? key[item_ct1.get_group(2) * N + d] *
+                                    query[item_ct1.get_group(2) * N + d]
+                              : 0.0f;
+        sums[j] += p;
+    }
+    float sum = 0;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) sum += sums[j];
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    sum = warp_sum(sum);
+    const int lane = item_ct1.get_local_id(2) % 32;
+    if (!lane) partials[item_ct1.get_local_id(2) / 32] = sum;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    sum = lane < 16 ? partials[lane] : 0.0f;
+    sum = warp_sum(sum);
+    if (item_ct1.get_local_id(2) == 0) {
+        /*
+        DPCT1013:373: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float s = sycl::fma(scale, sum, 0.0f); // ggml SCALE's zero bias
+        const float mag = sycl::sqrt(sycl::fmax(sycl::fabs(s), 1e-6f));
+        const float sign = float((s > 0.0f) - (s < 0.0f));
+        /*
+        DPCT1013:374: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        gate[item_ct1.get_group(2)] =
+            1.0f / (1.0f + sycl::native::exp(-sign * mag));
+    }
+}
+__dpct_inline__ void broadcast_kernel(const float *value, const float *gate,
+                                      float *gated) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    /*
+    DPCT1013:375: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    if (i < D) gated[i] = value[i % N] * gate[i / N];
+}
+__dpct_inline__ void
+conv_residual_kernel(const float *history, const float *normalized,
+                     const uint16_t *weights, const float *hidden,
+                     const float *gated, float *conv, float *result) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= D) return;
+    float sum = 0;
+#pragma unroll
+    for (int k = 0; k < 4; ++k) {
+        const float x = k == 3 ? normalized[c] : history[c * HISTORY + 3 * k];
+        const float w =
+            sycl::vec<sycl::half, 1>(
+                sycl::bit_cast<sycl::half, unsigned short>(weights[c * 4 + k]))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        /*
+        DPCT1013:376: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float term = x * w;
+        /*
+        DPCT1013:377: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        sum = k == 0 ? term : sum + term;
+    }
+    const float activation = sum / (1.0f + sycl::native::exp(-sum));
+    conv[c] = activation;
+    // Exact hidden/result alias is safe: each thread owns one element.
+    /*
+    DPCT1013:378: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    result[c] = hidden[c] + gated[c] + activation;
+}
+// ---- the batch: T tokens, the same arithmetic per element as the kernels above
+// weighted_rms_norm (native_gr_norm.cu) with the gamma row repeating every H rows (one token's H groups)
+inline float norm_warp_sum(float value) {
+#pragma unroll
+    /*
+    DPCT1108:51: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int offset = 16; offset > 0; offset >>= 1) value +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    return value;
+}
+__dpct_inline__ void rms_rep_kernel(const float *__restrict__ input,
+                                    const float *__restrict__ gamma,
+                                    float *__restrict__ output) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int BlockSize =
+        1024; // native_gr_rms_norm_weighted's choice for 2560 columns
+    const int tid = item_ct1.get_local_id(2);
+    const size_t row_offset = size_t(item_ct1.get_group(2)) * N;
+    input += row_offset;
+    output += row_offset;
+    gamma += size_t(item_ct1.get_group(2) % H) * N;
+    float partial = 0.0f;
+    for (int col = tid; col < N; col += BlockSize) {
+        const float value = input[col];
+        partial += value * value;
+    }
+    auto &sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    partial = norm_warp_sum(partial);
+    const int lane = tid % 32;
+    if (lane == 0) sums[tid / 32] = partial;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    partial = 0.0f;
+    if (lane < BlockSize / 32) partial = sums[lane];
+    partial = norm_warp_sum(partial);
+    const float mean = partial / N;
+    const float scale = sycl::rsqrt(mean + NG_RMS_EPS);
+#pragma unroll
+    for (int col = tid; col < N; col += BlockSize)
+        output[col] = scale * input[col] * gamma[col];
+}
+__dpct_inline__ void broadcast_batch_kernel(const float *value,
+                                            const float *gate, float *gated,
+                                            int T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const size_t i =
+        size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= size_t(T) * D) return;
+    const size_t t = i / D, d = i % D;
+    /*
+    DPCT1013:379: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    gated[i] = value[t * N + d % N] * gate[t * H + d / N];
+}
+// the dilated conv (taps 9, 6, 3 tokens back and this one) and the residual; a tap before the chunk reads the history
+__dpct_inline__ void conv_residual_batch_kernel(const float *history,
+                                                const float *normalized,
+                                                const uint16_t *weights,
+                                                float *hidden,
+                                                const float *gated, int T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const size_t i =
+        size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= size_t(T) * D) return;
+    const int t = int(i / D), c = int(i % D);
+    float sum = 0;
+#pragma unroll
+    for (int k = 0; k < 4; ++k) {
+        const int p = t - 9 + 3 * k;             // the token this tap reads (k == 3: this one)
+        const float x = p >= 0 ? normalized[size_t(p) * D + c] : history[size_t(c) * HISTORY + (9 + p)];
+        const float wk =
+            sycl::vec<sycl::half, 1>(
+                sycl::bit_cast<sycl::half, unsigned short>(weights[c * 4 + k]))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        /*
+        DPCT1013:380: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float term = x * wk;
+        /*
+        DPCT1013:381: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        sum = k == 0 ? term : sum + term;
+    }
+    const float activation = sum / (1.0f + sycl::native::exp(-sum));
+    /*
+    DPCT1013:382: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    hidden[i] = hidden[i] + gated[i] + activation;
+}
+// the history after the chunk: the last nine normalized rows (older ones from the history when T < 9)
+__dpct_inline__ void history_batch_kernel(float *history,
+                                          const float *normalized, int T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= D) return;
+    float h[HISTORY];
+#pragma unroll
+    for (int r = 0; r < HISTORY; ++r) {
+        const int p = T - HISTORY + r;
+        h[r] = p >= 0 ? normalized[size_t(p) * D + c] : history[size_t(c) * HISTORY + (T + r)];
+    }
+#pragma unroll
+    for (int r = 0; r < HISTORY; ++r) history[size_t(c) * HISTORY + r] = h[r];
+}
+
+struct Span { const void* p; size_t bytes; size_t alignment; };
+bool overlaps(Span a, Span b) {
+    const auto x = reinterpret_cast<uintptr_t>(a.p), y = reinterpret_cast<uintptr_t>(b.p);
+    return x < y + b.bytes && y < x + a.bytes;
+}
+void validate(Span span) {
+    const auto p = reinterpret_cast<uintptr_t>(span.p);
+    if (!p || p % span.alignment || p > std::numeric_limits<uintptr_t>::max() - span.bytes)
+        throw std::invalid_argument("native PLE postops require nonnull aligned bounded spans");
+}
+void launch_check() {
+    /*
+    DPCT1010:385: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:386: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:383: The statement could not be removed.
+    */
+    /*
+    DPCT1000:384: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(std::string("native PLE postops launch: ") +
+                                    dpct::get_error_string_dummy(error));
+}
+} // namespace
+
+void native_ple_postops(const float* projected_key, const float* hidden,
+                        const float* value, const float* history,
+                        const PleWeights& w, const NativePlePostopsBuffers& b, void* stream) {
+    if (!stream) throw std::invalid_argument("native PLE postops require an explicit stream");
+    const Span inputs[] = {{projected_key,D*4,4}, {hidden,D*4,4}, {value,N*4,4},
+        {history,HISTORY*D*4,4}, {w.norm_key,D*4,4}, {w.norm_query,D*4,4},
+        {w.norm_conv,D*4,4}, {w.conv1d_f16,4*D*2,2}};
+    const Span outputs[] = {{b.key,D*4,4}, {b.query,D*4,4}, {b.gate,H*4,4},
+        {b.gated,D*4,4}, {b.normalized,D*4,4}, {b.conv,D*4,4}, {b.result,D*4,4}};
+    for (const auto& span : inputs) validate(span);
+    for (const auto& span : outputs) validate(span);
+    for (size_t i = 0; i < 7; ++i) {
+        for (size_t j = 0; j < 8; ++j)
+            if (!(i == 6 && j == 1 && b.result == hidden) && overlaps(outputs[i], inputs[j]))
+                throw std::invalid_argument("native PLE postops output overlaps an input or weight");
+        for (size_t j = i + 1; j < 7; ++j)
+            if (!(i == 1 && j == 4 && b.query == b.normalized) && overlaps(outputs[i], outputs[j]))
+                throw std::invalid_argument("native PLE postops writable spans overlap");
+    }
+    native_gr_rms_norm_weighted(projected_key,w.norm_key,b.key,N,H,NG_RMS_EPS,stream);
+    native_gr_rms_norm_weighted(hidden,w.norm_query,b.query,N,H,NG_RMS_EPS,stream);
+    auto st = strata::q_of(stream);
+    /*
+    DPCT1049:52: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->submit([&](sycl::handler &cgh) {
+            auto std_sqrt_float_N_ct3 = 1.0f / std::sqrt(float(N));
+
+            cgh.parallel_for<dpct_kernel_name<class gate_kernel_f8e4fc>>(
+                sycl::nd_range<3>(sycl::range(1, 1, H) * sycl::range(1, 1, 512),
+                                  sycl::range(1, 1, 512)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gate_kernel(b.key, b.query, b.gate,
+                                    std_sqrt_float_N_ct3);
+                    });
+        });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class broadcast_kernel_50d78d>>(
+            sycl::nd_range<3>(sycl::range(1, 1, D / 256) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                broadcast_kernel(value, b.gate, b.gated);
+            });
+    }
+    launch_check();
+    native_gr_rms_norm_weighted(b.gated,w.norm_conv,b.normalized,N,H,NG_RMS_EPS,stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class conv_residual_kernel_6182eb>>(
+            sycl::nd_range<3>(sycl::range(1, 1, D / 256) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                conv_residual_kernel(history, b.normalized, w.conv1d_f16,
+                                     hidden, b.gated, b.conv, b.result);
+            });
+    }
+    launch_check();
+}
+
+void native_ple_postops_batch(float* key, float* hidden, const float* value, float* history, const PleWeights& w,
+                              float* query_norm, float* gated, float* gate, int T, void* stream) {
+    if (!stream || T <= 0 || !key || !hidden || !value || !history || !query_norm || !gated || !gate)
+        throw std::invalid_argument("native PLE postops batch: null input or empty batch");
+    auto st = strata::q_of(stream);
+    const unsigned rows = unsigned(T) * H;
+    const unsigned blocks = unsigned((size_t(T) * D + 255) / 256);
+    /*
+    DPCT1049:53: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class rms_rep_kernel_dde36c>>(
+            sycl::nd_range<3>(sycl::range(1, 1, rows) * sycl::range(1, 1, 1024),
+                              sycl::range(1, 1, 1024)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                rms_rep_kernel(key, w.norm_key, key);
+            });
+    }
+    /*
+    DPCT1049:54: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class rms_rep_kernel_9b5d94>>(
+            sycl::nd_range<3>(sycl::range(1, 1, rows) * sycl::range(1, 1, 1024),
+                              sycl::range(1, 1, 1024)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                rms_rep_kernel(hidden, w.norm_query, query_norm);
+            });
+    }
+    /*
+    DPCT1049:55: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->submit([&](sycl::handler &cgh) {
+            auto std_sqrt_float_N_ct3 = 1.0f / std::sqrt(float(N));
+
+            cgh.parallel_for<dpct_kernel_name<class gate_kernel_558e90>>(
+                sycl::nd_range<3>(sycl::range(1, 1, rows) *
+                                      sycl::range(1, 1, 512),
+                                  sycl::range(1, 1, 512)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gate_kernel(key, query_norm, gate,
+                                    std_sqrt_float_N_ct3);
+                    });
+        });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class broadcast_batch_kernel_24ebaf>>(
+            sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                broadcast_batch_kernel(value, gate, gated, T);
+            });
+    }
+    /*
+    DPCT1049:56: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class rms_rep_kernel_e4e0bd>>(
+            sycl::nd_range<3>(sycl::range(1, 1, rows) * sycl::range(1, 1, 1024),
+                              sycl::range(1, 1, 1024)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                rms_rep_kernel(gated, w.norm_conv, query_norm);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<
+            dpct_kernel_name<class conv_residual_batch_kernel_3906fe>>(
+            sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                conv_residual_batch_kernel(history, query_norm, w.conv1d_f16,
+                                           hidden, gated, T);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class history_batch_kernel_8243c6>>(
+            sycl::nd_range<3>(sycl::range(1, 1, D / 256) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                history_batch_kernel(history, query_norm, T);
+            });
+    }
+    launch_check();
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_qsa.dp.cpp b/sycl/src/kernels/cuda/native_qsa.dp.cpp
new file mode 100644
index 00000000000..f0c4c0f9122
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_qsa.dp.cpp
@@ -0,0 +1,209 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{norm.cu,common.cuh,unary.cu}.
+//
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_qsa.hpp"
+#include <atomic>
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+#include <string>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+__dpct_inline__ float warp_sum(float value) {
+#pragma unroll
+    for (int offset = 16; offset; offset >>= 1)
+        /*
+        DPCT1108:174: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        value += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, offset);
+    return value;
+}
+template <int BlockSize>
+__dpct_inline__ void norm(const float *input, const float *__restrict__ gamma,
+                          float *output, int n_cols, float epsilon) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int tid = item_ct1.get_local_id(2);
+    const std::size_t row_offset = std::size_t(item_ct1.get_group(2)) * n_cols;
+    input += row_offset; output += row_offset;
+    float partial = 0.0f;
+    for (std::size_t col = tid; col < std::size_t(n_cols); col += BlockSize) {
+        const float x = input[col];
+        partial += x * x;
+    }
+    auto &sums =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    partial = warp_sum(partial);
+    const int lane = tid % 32;
+    if (lane == 0) sums[tid / 32] = partial;
+    // All reads of input for the reduction precede this barrier. Afterwards,
+    // each thread reads/writes only its own elements, allowing exact in-place use.
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    partial = lane < BlockSize / 32 ? sums[lane] : 0.0f;
+    partial = warp_sum(partial);
+    const float mean = partial / n_cols;
+    const float scale = sycl::rsqrt(mean + epsilon);
+#pragma unroll
+    for (std::size_t col = tid; col < std::size_t(n_cols); col += BlockSize)
+        output[col] = scale * input[col] * gamma[col];
+}
+__dpct_inline__ void gate(const float *attn, const float *__restrict__ q_full,
+                          float *output, int n_head, int head_dim) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const std::size_t i =
+        std::size_t(item_ct1.get_group(2)) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= std::size_t(n_head) * head_dim) return;
+    const std::size_t head = i / head_dim, channel = i % head_dim;
+    const float raw = q_full[head * 2 * head_dim + head_dim + channel];
+    const float sigmoid = 1.0f / (1.0f + sycl::native::exp(-raw));
+    output[i] = attn[i] * sigmoid;
+}
+std::size_t elements(int cols, int rows) {
+    if (cols <= 0 || rows <= 0 || std::uint64_t(cols) * rows > std::uint64_t(std::numeric_limits<int>::max()))
+        throw std::invalid_argument("native QSA requires positive bounded dimensions");
+    return std::size_t(cols) * rows;
+}
+bool valid(const void* ptr, std::size_t bytes) {
+    const auto address = reinterpret_cast<std::uintptr_t>(ptr);
+    return ptr && address % 4 == 0 && bytes <= UINTPTR_MAX - address;
+}
+bool overlap(const void* a, std::size_t an, const void* b, std::size_t bn) {
+    const auto ap = reinterpret_cast<std::uintptr_t>(a), bp = reinterpret_cast<std::uintptr_t>(b);
+    return ap < bp + bn && bp < ap + an;
+}
+void buffers(const float* input, std::size_t in_bytes, const float* weight, std::size_t weight_bytes,
+             float* output, void* stream) {
+    if (!stream || !valid(input, in_bytes) || !valid(weight, weight_bytes) || !valid(output, in_bytes) ||
+        overlap(input, in_bytes, weight, weight_bytes) || overlap(output, in_bytes, weight, weight_bytes) ||
+        (input != output && overlap(input, in_bytes, output, in_bytes)))
+        throw std::invalid_argument("native QSA requires a stream, aligned spans, and disjoint buffers or exact input/output alias");
+}
+void check_launch() {
+    /*
+    DPCT1010:844: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto result = 0;
+    /*
+    DPCT1000:843: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (result != 0)
+        /*
+        DPCT1009:845: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001:842: The statement could not be removed.
+        */
+        throw std::runtime_error(std::string("native QSA launch: ") +
+                                 dpct::get_error_string_dummy(result));
+}
+} // namespace
+
+void native_qsa_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_qsa_enabled() { return enabled.load(std::memory_order_relaxed); }
+
+void native_qsa_rms_norm_weighted(const float* input, const float* gamma, float* output,
+                                  int n_cols, int n_rows, float epsilon, void* stream) {
+    const auto count = elements(n_cols, n_rows);
+    if (!std::isfinite(epsilon) || epsilon < 0.0f)
+        throw std::invalid_argument("native QSA requires finite nonnegative epsilon");
+    buffers(input, count * 4, gamma, std::size_t(n_cols) * 4, output, stream);
+    if (n_cols < 1024)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<
+                dpct_kernel_name<class norm_bffbae, dpct_kernel_scalar<256>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_rows)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        norm<256>(input, gamma, output, n_cols, epsilon);
+                    });
+    } else
+    /*
+    DPCT1049:175: The work-group size passed to the SYCL kernel may exceed
+    the limit. To get the device limit, query
+    info::device::max_work_group_size. Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<
+                dpct_kernel_name<class norm_de4c8c, dpct_kernel_scalar<1024>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_rows)) *
+                                      sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        norm<1024>(input, gamma, output, n_cols, epsilon);
+                    });
+    }
+    check_launch();
+}
+void native_qsa_gate_apply(const float* attn, const float* q_full, float* output,
+                           int n_head, int head_dim, void* stream) {
+    const auto count = elements(head_dim, n_head);
+    buffers(attn, count * 4, q_full, count * 8, output, stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class gate_148967>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, unsigned((count + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gate(attn, q_full, output, n_head, head_dim);
+                });
+    }
+    check_launch();
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
new file mode 100644
index 00000000000..bda43e8bc66
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
@@ -0,0 +1,442 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// src/models/qwen4exp.cpp; ggml/src/ggml-cuda/{set-rows.cu,norm.cu,rope.cu}.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/mrope.hpp"
+#include <atomic>
+#include <cmath>
+#include <cstddef>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+constexpr int D = 128, R = 4, ROT = 64, THREADS = 256;
+inline float warp_sum(float x) {
+#pragma unroll
+    for (int offset = 16; offset; offset >>= 1)
+        /*
+        DPCT1108:133: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        x += dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            offset);
+    return x;
+}
+__dpct_inline__ void
+append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
+       int pos_base, const float *__restrict__ gamma, float epsilon,
+       float *__restrict__ tail, float *__restrict__ dead,
+       float *__restrict__ pooled, int32_t *__restrict__ block_pos,
+       int max_cells, float theta_scale, const int32_t *__restrict__ mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int pos = *pos_dev, d = item_ct1.get_local_id(2);
+    if (pos < 0 || pos >= max_cells) return;
+    const int slot = pos % R;
+    float incoming = 0.0f;
+    if (d < D) {
+        // SET_ROWS stores F16; GET_ROWS expands those exact values to F32.
+        incoming = sycl::vec<sycl::half, 1>(
+                       sycl::vec<float, 1>(raw[d])
+                           .convert<sycl::half, sycl::rounding_mode::rte>()[0])
+                       .convert<float, sycl::rounding_mode::automatic>()[0];
+        if (slot < R - 1) tail[slot * D + d] = incoming;
+    }
+    if (pos != 0 && slot != R - 1) return;
+    auto &values =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float mean = 0.0f;
+    if (d < D) {
+        // The spare's four gather indices all name cell zero. Completed blocks
+        // use chronological slices; each graph ADD materializes an F32 sum.
+        float sum = pos == 0 ? incoming : tail[d];
+#pragma unroll
+        for (int j = 1; j < R; ++j)
+            /*
+            DPCT1013:637: The rounding mode could not be specified and the
+            generated code may have different accuracy than the original code.
+            Verify the correctness. SYCL math built-in function rounding mode is
+            aligned with OpenCL C 1.2 standard.
+            */
+            sum = sum + pos == 0 || j == R - 1 ? incoming : tail[j * D + d];
+        /*
+        DPCT1013:638: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        mean = sycl::fma(0.25f, sum, 0.0f); // SCALE includes a zero bias.
+    }
+    float square_sum = 0.0f;
+    if (d < D) square_sum += mean * mean;
+    square_sum = warp_sum(square_sum);
+    const int lane = d % 32;
+    if (lane == 0) partials[d / 32] = square_sum;
+    /*
+    DPCT1065:635: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    square_sum = lane < THREADS / 32 ? partials[lane] : 0.0f;
+    square_sum = warp_sum(square_sum);
+    const float scale = sycl::rsqrt(square_sum / D + epsilon);
+    if (d < D) values[d] = scale * mean * gamma[d];
+    /*
+    DPCT1065:636: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (d >= D) return;
+    const int b = pos / R;
+    const int rope_pos = pos == 0 ? 0 : pos_base + R * b;
+    float y = values[d];
+    if (d < ROT) {
+        const int pair = d % (ROT / 2);
+        const float theta = (pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+                            dpct::pow(theta_scale, float(pair));
+        const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+        const float a = values[pair], z = values[pair + ROT / 2];
+        y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
+    }
+    pooled[std::size_t(b) * D + d] = y;
+    if (pos == 0) dead[d] = y;
+    else pooled[std::size_t(b + 1) * D + d] = dead[d];
+    if (d == 0 && pos != 0) *block_pos = rope_pos;
+}
+// ---- C-2: the batched append.  The pooled key of a completed block b (its last cell pos = 4b+3), computed with
+// the single append's arithmetic: keys rounded through F16, summed tail[0]+tail[1]+tail[2]+incoming in that order,
+// the RMS norm, gamma, the rotation at pos_base + 4b.  `k(j)` is the key of the block's cell j: a row of this batch
+// (cell >= p0) or the tail the previous batch left (cell < p0).  Only the batch's last completed block writes the
+// spare after it (every earlier one's is overwritten by the next block in order).
+__dpct_inline__ float pooled_value(const float *values, int d, int rope_pos,
+                                   float theta_scale, const int32_t *mtab,
+                                   bool zero_pos) {
+    float y = values[d];
+    if (d < ROT) {
+        const int pair = d % (ROT / 2);
+        const float theta = (zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+                            dpct::pow(theta_scale, float(pair));
+        const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+        const float a = values[pair], z = values[pair + ROT / 2];
+        y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
+    }
+    return y;
+}
+__dpct_inline__ float norm_scale(float mean, float *partials, int d) {
+    float square_sum = d < D ? mean * mean : 0.0f;
+    square_sum = warp_sum(square_sum);
+    const int lane = d % 32;
+    if (lane == 0) partials[d / 32] = square_sum;
+    /*
+    DPCT1065:639: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    sycl::ext::oneapi::this_work_item::get_nd_item<3>().barrier();
+    square_sum = lane < THREADS / 32 ? partials[lane] : 0.0f;
+    square_sum = warp_sum(square_sum);
+    return square_sum;
+}
+// cell 0 of a sequence: the spare (every gather index names cell 0), written to pooled[0] and dead
+__dpct_inline__ void append_first(const float *__restrict__ raw,
+                                  const float *__restrict__ gamma,
+                                  float epsilon, float *__restrict__ dead,
+                                  float *__restrict__ pooled, float theta_scale,
+                                  const int32_t *__restrict__ mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int d = item_ct1.get_local_id(2);
+    auto &values =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float mean = 0.0f;
+    if (d < D) {
+        const float incoming =
+            sycl::vec<sycl::half, 1>(
+                sycl::vec<float, 1>(raw[d])
+                    .convert<sycl::half, sycl::rounding_mode::rte>()[0])
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        float sum = incoming;
+#pragma unroll
+        /*
+        DPCT1013:641: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        for (int j = 1; j < R; ++j) sum = sum + incoming;
+        /*
+        DPCT1013:642: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        mean = sycl::fma(0.25f, sum, 0.0f);
+    }
+    const float square_sum = norm_scale(mean, partials, d);
+    const float scale = sycl::rsqrt(square_sum / D + epsilon);
+    if (d < D) values[d] = scale * mean * gamma[d];
+    /*
+    DPCT1113:640: Consider replacing
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) with
+    sycl::nd_item::barrier() if function "append_first" is called in a
+    multidimensional kernel.
+    */
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (d >= D) return;
+    const float y = pooled_value(values, d, 0, theta_scale, mtab, true);
+    pooled[d] = y;
+    dead[d] = y;
+}
+__dpct_inline__ void
+append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
+              int pos_base, const float *__restrict__ gamma, float epsilon,
+              const float *__restrict__ tail, const float *__restrict__ dead,
+              float *__restrict__ pooled, int32_t *__restrict__ block_pos,
+              int64_t first_block, int64_t last_block, float theta_scale,
+              const int32_t *__restrict__ mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t b = first_block + item_ct1.get_group(2);
+    const int d = item_ct1.get_local_id(2);
+    auto &values =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &partials =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float mean = 0.0f;
+    if (d < D) {
+        auto key = [&](int j) -> float {
+            const int64_t cell = b * R + j;
+            return cell >= p0
+                       ? sycl::vec<sycl::half, 1>(
+                             sycl::vec<float, 1>(raw[(cell - p0) * D + d])
+                                 .convert<sycl::half,
+                                          sycl::rounding_mode::rte>()[0])
+                             .convert<float,
+                                      sycl::rounding_mode::automatic>()[0]
+                       : tail[j * D + d];
+        };
+        float sum = key(0);
+#pragma unroll
+        /*
+        DPCT1013:643: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        for (int j = 1; j < R; ++j) sum = sum + key(j);
+        /*
+        DPCT1013:644: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        mean = sycl::fma(0.25f, sum, 0.0f);
+    }
+    const float square_sum = norm_scale(mean, partials, d);
+    const float scale = sycl::rsqrt(square_sum / D + epsilon);
+    if (d < D) values[d] = scale * mean * gamma[d];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (d >= D) return;
+    const int rope_pos = pos_base + R * (int) b;
+    pooled[std::size_t(b) * D + d] = pooled_value(values, d, rope_pos, theta_scale, mtab, false);
+    if (b == last_block) {
+        pooled[std::size_t(b + 1) * D + d] = dead[d];
+        if (d == 0) *block_pos = rope_pos;
+    }
+}
+// the tail after the batch: slot s holds the key of the batch's last cell with cell % 4 == s (s < 3), if any
+__dpct_inline__ void append_tail(const float *__restrict__ raw, int64_t n,
+                                 int64_t p0, float *__restrict__ tail) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int s = item_ct1.get_group(2), d = item_ct1.get_local_id(2);
+    if (d >= D) return;
+    const int64_t last = p0 + n - 1;
+    int64_t cell = last - ((last % R) - s + R) % R;       // the last cell <= last with cell % 4 == s
+    if (cell < p0) return;
+    tail[s * D + d] =
+        sycl::vec<sycl::half, 1>(
+            sycl::vec<float, 1>(raw[(cell - p0) * D + d])
+                .convert<sycl::half, sycl::rounding_mode::rte>()[0])
+            .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+struct Span { const void* p; std::size_t n; };
+void validate(Span s) {
+    const auto p = reinterpret_cast<std::uintptr_t>(s.p);
+    if (!p || p % 4 || s.n > UINTPTR_MAX - p)
+        throw std::invalid_argument("native QSA indexer requires aligned bounded spans");
+}
+bool overlaps(Span a, Span b) {
+    const auto x = reinterpret_cast<std::uintptr_t>(a.p), y = reinterpret_cast<std::uintptr_t>(b.p);
+    return x < y + b.n && y < x + a.n;
+}
+} // namespace
+
+void native_qsa_indexer_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_qsa_indexer_enabled() { return enabled.load(std::memory_order_relaxed); }
+void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_device, int32_t pos_base,
+                               const float* gamma, float epsilon, const QsaIndexerBuffers& b,
+                               const QsaShapes& s, int64_t max_cells, float freq_base, void* stream) {
+    if (!stream || s.idx_dim != D || s.idx_block != R || s.n_rot != ROT ||
+        max_cells < 1 || max_cells > INT32_MAX || pos_base < 0 || pos_base % R ||
+        int64_t(pos_base) + max_cells > INT32_MAX || !std::isfinite(epsilon) || epsilon <= 0.0f ||
+        !std::isfinite(freq_base) || freq_base <= 1.0f)
+        throw std::invalid_argument("native QSA indexer requires fixed geometry, aligned position base, positive capacity/epsilon, valid frequency and explicit stream");
+    const Span spans[] = {{raw,D*4},{relative_pos_device,4},{gamma,D*4},{b.tail,(R-1)*D*4},
+        {b.dead,D*4},{b.pooled,std::size_t(max_cells/R+1)*D*4},{b.block_pos,4}};
+    for (const auto& span : spans) validate(span);
+    for (int i = 0; i < 7; ++i) for (int j = i + 1; j < 7; ++j)
+        if (overlaps(spans[i], spans[j])) throw std::invalid_argument("native QSA indexer buffers overlap");
+    const float theta_scale = powf(freq_base, -2.0f / ROT);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto mrope_table_ct11 = mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class append_182f95>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            append(raw, relative_pos_device, pos_base, gamma,
+                                   epsilon, b.tail, b.dead, b.pooled,
+                                   b.block_pos, int(max_cells), theta_scale,
+                                   mrope_table_ct11);
+                        });
+            });
+    }
+    /*
+    DPCT1010:647: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:648: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:645: The statement could not be removed.
+    */
+    /*
+    DPCT1000:646: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, int32_t pos_base, const float* gamma,
+                                     float epsilon, const QsaIndexerBuffers& b, const QsaShapes& s, int64_t max_cells,
+                                     float freq_base, void* stream) {
+    if (n <= 0) return;
+    if (!stream || s.idx_dim != D || s.idx_block != R || s.n_rot != ROT || p0 < 0 || p0 + n > max_cells ||
+        max_cells > INT32_MAX || pos_base < 0 || pos_base % R || int64_t(pos_base) + max_cells > INT32_MAX ||
+        !std::isfinite(epsilon) || epsilon <= 0.0f || !std::isfinite(freq_base) || freq_base <= 1.0f)
+        throw std::invalid_argument("native QSA indexer (batch): bad geometry, positions or parameters");
+    const float theta_scale = powf(freq_base, -2.0f / ROT);
+    const dpct::queue_ptr st = strata::q_of(stream);
+    const int32_t* mtab = mrope_table();
+    if (p0 == 0) {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class append_first_ea2d1f>>(
+            sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                append_first(raw, gamma, epsilon, b.dead, b.pooled, theta_scale,
+                             mtab);
+            });
+    }
+    // completed blocks: those whose last cell (4b+3) lies in [p0, p0 + n)
+    const int64_t first = p0 <= R - 1 ? 0 : (p0 - (R - 1) + R - 1) / R;       // the smallest b with 4b+3 >= p0
+    const int64_t hi = p0 + n - 1 >= R - 1 ? (p0 + n - 1 - (R - 1)) / R : -1;   // the largest b with 4b+3 <= p0+n-1
+    if (hi >= first)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class append_blocks_a6c94e>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(hi - first + 1)) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                append_blocks(raw, n, p0, pos_base, gamma, epsilon, b.tail,
+                              b.dead, b.pooled, b.block_pos, first, hi,
+                              theta_scale, mtab);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class append_tail_e0658e>>(
+            sycl::nd_range<3>(sycl::range(1, 1, R - 1) * sycl::range(1, 1, D),
+                              sycl::range(1, 1, D)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                append_tail(raw, n, p0, b.tail);
+            });
+    }
+    /*
+    DPCT1010:651: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:652: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:649: The statement could not be removed.
+    */
+    /*
+    DPCT1000:650: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
new file mode 100644
index 00000000000..d544e2e626f
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
@@ -0,0 +1,287 @@
+// Adapted from llama.cpp 3cf03257f219afbe7334045ff7c6a06ac68c627d:
+// ggml/src/ggml-cuda/{mmf.cuh,mma.cuh,unary.cu,binbcast.cu}.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_qsa_score.hpp"
+#include <atomic>
+#include <cstddef>
+#include <cstdint>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+constexpr int D=128, HEADS=4, R=4, ROWS=32, WARPS=2, STRIDE=36, COMBINE=68;
+struct TileA { uint32_t x[4]; };
+struct TileB { uint32_t x[2]; };
+struct TileC { float x[4]={0.0f,0.0f,0.0f,0.0f}; };
+#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
+__dpct_inline__ void load_a(TileA &a, const float *p) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const float *src = p + (item_ct1.get_local_id(2) % 16) * STRIDE +
+                       (item_ct1.get_local_id(2) / 16) * 4;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("ldmatrix.sync.aligned.m8n8.x4.b16 {%0,%1,%2,%3}, [%4];"
+                 : "=r"(a.x[0]), "=r"(a.x[1]), "=r"(a.x[2]), "=r"(a.x[3])
+                 : "l"(src));
+#else
+    dpct::experimental::matrix::ldmatrix((uintptr_t)src, &a.x[0], &a.x[1],
+                                         &a.x[2], &a.x[3]);
+#endif
+}
+__dpct_inline__ void load_b(TileB &b, const float *p) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const float *src = p + (item_ct1.get_local_id(2) % 8) * STRIDE +
+                       ((item_ct1.get_local_id(2) / 8) * 4) % 8;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("ldmatrix.sync.aligned.m8n8.x2.b16 {%0,%1}, [%2];"
+                 : "=r"(b.x[0]), "=r"(b.x[1])
+                 : "l"(src));
+#else
+    dpct::experimental::matrix::ldmatrix((uintptr_t)src, &b.x[0], &b.x[1]);
+#endif
+}
+__dpct_inline__ void mma(TileC &c, const TileA &a, const TileB &b) {
+    // Deliberately no cvt.rn.tf32: pinned mma.cuh passes raw F32 bits directly.
+    /*
+    DPCT1053:75: Migration of device assembly code is not supported.
+    */
+    asm("mma.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {%0,%1,%2,%3}, "
+        "{%4,%5,%6,%7}, {%8,%9}, {%0,%1,%2,%3};"
+        : "+f"(c.x[0]), "+f"(c.x[1]), "+f"(c.x[2]), "+f"(c.x[3])
+        : "r"(a.x[0]), "r"(a.x[1]), "r"(a.x[2]), "r"(a.x[3]), "r"(b.x[0]),
+          "r"(b.x[1]));
+}
+#endif
+/*
+DPCT1110:76: The total declared local variable size in device function
+score_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void score_kernel(const float *__restrict__ pooled,
+                                  const float *__restrict__ query,
+                                  const float *__restrict__ bias,
+                                  const int32_t *__restrict__ step,
+                                  int max_cells, float *__restrict__ cells) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int n = step[kStepNKv], full = step[kStepNBid];
+    if(n<1||n>max_cells||step[kStepPos]!=n-1||full!=n/R||
+       step[kStepWidth]!=(n<2051?n:2051))return;
+    const int row0 = item_ct1.get_group(2) * ROWS;
+    if(row0>full)return;
+    const int lane = item_ct1.get_local_id(2), warp = item_ct1.get_local_id(1);
+#if 1   // SYCL: the scalar path (the PTX one above is not ported yet)
+    // Turing (STRATA_EXPERIMENTAL_SM75, a layer-split stage): no tf32 mma.  The same scores with FP32 FMAs, one row
+    // per thread of the first warp - rounded differently from the tensor-core path (FP32 instead of TF32 inputs).
+    if(warp!=0)return;
+    const int row=row0+lane;
+    if(row>full)return;
+    float h[HEADS];
+    for(int j=0;j<HEADS;++j){
+        float acc=0.0f;
+        for(int d=0;d<D;++d)acc=fmaf(pooled[size_t(row)*D+d],query[j*D+d],acc);
+        h[j]=fmaxf(acc,0.0f);
+    }
+    float sum=(((h[0] + h[1]) + h[2]) + h[3]);
+    if(bias)sum=(sum + bias[row]);
+    sum=(sum + row==full&&n%R?1e9f:0.0f);
+    for(int i=row*R;i<n&&i<(row+1)*R;++i)cells[i]=sum;
+#else
+    auto &shared = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS * 16 * STRIDE]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float* tile=shared+warp*16*STRIDE;
+    TileC c[2];
+    // mmf's launch heuristic picks2warps for K128. Each warp accumulates
+    // K[warp*32,warp*32+32), then K[warp*32+64,warp*32+96).
+    for(int col=warp*32+lane;col<D;col+=WARPS*32){
+        TileA a[2][4];
+#pragma unroll
+        for(int ia=0;ia<2;++ia){
+            sycl::group_barrier(
+                sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+            for(int i=0;i<16;++i){
+                const int row=row0+ia*16+i;
+                tile[i*STRIDE+lane]=row<=full?pooled[size_t(row)*D+col]:0.0f;
+            }
+            sycl::group_barrier(
+                sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+            for(int k=0;k<4;++k)load_a(a[ia][k],tile+k*8);
+        }
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+        for(int h=0;h<8;++h)tile[h*STRIDE+lane]=h<HEADS?query[h*D+col]:0.0f;
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+        for(int k=0;k<4;++k){
+            TileB b;load_b(b,tile+k*8);
+#pragma unroll
+            for(int ia=0;ia<2;++ia)mma(c[ia],a[ia][k],b);
+        }
+    }
+    /*
+    DPCT1065:405: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+#pragma unroll
+    for(int ia=0;ia<2;++ia){
+#pragma unroll
+        for(int l=0;l<4;++l){
+            const int i=warp*ROWS+ia*16+(l/2)*8+lane/4;
+            const int h=(lane%4)*2+l%2;
+            shared[h*COMBINE+i]=c[ia].x[l];
+        }
+    }
+    /*
+    DPCT1065:406: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // In the reference: +0 then warp0 partial then warp1 partial, followed
+    // by materialized ReLU, CONT(head0), ADD(head1), ADD(head2), ADD(head3).
+    if(warp==0){
+        const int row=row0+lane;
+        if(row>full)return;
+        float h[HEADS];
+#pragma unroll
+        for(int j=0;j<HEADS;++j){
+            /*
+            DPCT1013:407: The rounding mode could not be specified and the
+            generated code may have different accuracy than the original code.
+            Verify the correctness. SYCL math built-in function rounding mode is
+            aligned with OpenCL C 1.2 standard.
+            */
+            float v = 0.0f + shared[j * COMBINE + lane];
+            /*
+            DPCT1013:408: The rounding mode could not be specified and the
+            generated code may have different accuracy than the original code.
+            Verify the correctness. SYCL math built-in function rounding mode is
+            aligned with OpenCL C 1.2 standard.
+            */
+            v = v + shared[j * COMBINE + ROWS + lane];
+            h[j] = sycl::fmax(v, 0.0f);
+        }
+        /*
+        DPCT1013:409: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        float sum = h[0] + h[1] + h[2] + h[3];
+        /*
+        DPCT1013:410: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        if (bias) sum = sum + bias[row];
+        /*
+        DPCT1013:411: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        sum = sum + row == full && n % R ? 1e9f : 0.0f;
+        // The live causal mask is +0. Invalid/padded cells are never exported.
+        /*
+        DPCT1013:412: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        sum = sum + 0.0f;
+#pragma unroll
+        for (int i = row * R; i < n && i < (row + 1) * R; ++i) cells[i] = sum;
+    }
+#endif
+}
+struct Span{const void* p;size_t n;};
+void validate(Span s){
+    const auto p=reinterpret_cast<uintptr_t>(s.p);
+    if(!p||p%4||s.n>UINTPTR_MAX-p)throw std::invalid_argument("native QSA score requires aligned bounded spans");
+}
+bool overlaps(Span a,Span b){
+    const auto x=reinterpret_cast<uintptr_t>(a.p),y=reinterpret_cast<uintptr_t>(b.p);
+    return x<y+b.n&&y<x+a.n;
+}
+} // namespace
+void native_qsa_score_set_enabled(bool value){enabled.store(value,std::memory_order_relaxed);}
+bool native_qsa_score_enabled(){return enabled.load(std::memory_order_relaxed);}
+void native_qsa_score(const float* pooled,const float* query,const float* bias,
+                      const QsaShapes& s,const int32_t* step,int64_t max_blocks,int64_t max_cells,
+                      float* cells,void* stream){
+    if(!stream||s.idx_dim!=D||s.idx_n_head!=HEADS||s.idx_block!=R||s.idx_top_k!=2048||
+       max_cells<1||max_cells>INT32_MAX-3||max_blocks!=max_cells/R+1)
+        throw std::invalid_argument("native QSA score requires128dim/4heads/4cells/2048budget, exact capacities and explicit stream");
+    const Span spans[]={{pooled,size_t(max_blocks)*D*4},{query,HEADS*D*4},
+        {step,kStepCount*4},{cells,size_t(max_cells)*4},{bias,bias?size_t(max_blocks)*4:0}};
+    const int count=bias?5:4;
+    for(int i=0;i<count;++i)validate(spans[i]);
+    for(int i=0;i<count;++i)for(int j=i+1;j<count;++j)
+        if(overlaps(spans[i],spans[j]))throw std::invalid_argument("native QSA score spans overlap");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class score_kernel_8b4dbe>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1,
+                                unsigned((max_blocks + ROWS - 1) / ROWS)) *
+                        sycl::range(1, WARPS, 32),
+                    sycl::range(1, WARPS, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        score_kernel(pooled, query, bias, step, int(max_cells),
+                                     cells);
+                    });
+    }
+    /*
+    DPCT1010:415: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:416: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:413: The statement could not be removed.
+    */
+    /*
+    DPCT1000:414: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_rope.dp.cpp b/sycl/src/kernels/cuda/native_rope.dp.cpp
new file mode 100644
index 00000000000..8c809bb3a67
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_rope.dp.cpp
@@ -0,0 +1,145 @@
+// Numerical contract: pinned ggml/src/ggml-cuda/rope.cu, rope_multi/rope_yarn.
+// Text positions are equal across the four IMRoPE sections, so section routing
+// reduces to the one position associated with each contiguous row.
+// MIT License
+//
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_rope.hpp"
+#include "strata/kernels/mrope.hpp"
+#include <atomic>
+#include <cmath>
+#include <cstdint>
+#include <limits>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+bool overlaps(const void* a, size_t an, const void* b, size_t bn) {
+    auto x = reinterpret_cast<uintptr_t>(a), y = reinterpret_cast<uintptr_t>(b);
+    return x <= y ? y - x < an : x - y < bn;
+}
+__dpct_inline__ void apply(const float *x, float *out, int rows, int width,
+                           int n_rot, float theta_scale, const int *positions,
+                           const int32_t *mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(1);
+    const int pair = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                     item_ct1.get_local_id(2);
+    if (row >= rows || pair >= width / 2) return;
+    const size_t start = size_t(row) * width;
+    if (pair >= n_rot / 2) {
+        if (x != out) {
+            out[start + 2 * pair] = x[start + 2 * pair];
+            out[start + 2 * pair + 1] = x[start + 2 * pair + 1];
+        }
+        return;
+    }
+    const float theta = mrope_pos(mtab, positions[row], pair) *
+                        dpct::pow(theta_scale, float(pair));
+    const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+    const float a = x[start + pair], b = x[start + pair + n_rot / 2];
+    out[start + pair] = a * c - b * s;
+    out[start + pair + n_rot / 2] = a * s + b * c;
+}
+}
+// one table per device (a layer split runs the rope kernels on several): set and read for the current device
+namespace {
+constexpr int kMropeDevices = 64;
+std::atomic<const int32_t*> mrope_tab[kMropeDevices] = {};
+int mrope_dev() try {
+    int d = 0;
+    if (DPCT_CHECK_ERROR(d = dpct::get_current_device_id()) != 0 || d < 0 ||
+        d >= kMropeDevices) d = 0;
+    return d;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+}  // namespace
+void mrope_table_set(const int32_t* device_table) { mrope_tab[mrope_dev()].store(device_table, std::memory_order_relaxed); }
+const int32_t* mrope_table() { return mrope_tab[mrope_dev()].load(std::memory_order_relaxed); }
+void native_rope_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_rope_enabled() { return enabled.load(std::memory_order_relaxed); }
+void native_rope_apply(const float* x, float* out, int rows, int head_dim,
+                       int n_rot, float freq_base, const int* positions, void* stream) {
+    if (!x || !out || !positions || !stream || rows < 1 || rows > 65535 ||
+        (head_dim != 128 && head_dim != 256) || n_rot != 64 ||
+        !std::isfinite(freq_base) || freq_base <= 1.0f ||
+        reinterpret_cast<uintptr_t>(x) % 4 || reinterpret_cast<uintptr_t>(out) % 4 ||
+        reinterpret_cast<uintptr_t>(positions) % 4) {
+        throw std::invalid_argument("native RoPE requires aligned F32 rows, width 128/256, rotation 64, valid base and explicit stream");
+    }
+    const size_t bytes = size_t(rows) * head_dim * sizeof(float);
+    if ((x != out && overlaps(x, bytes, out, bytes)) ||
+        overlaps(positions, size_t(rows) * sizeof(int), out, bytes) ||
+        overlaps(positions, size_t(rows) * sizeof(int), x, bytes)) {
+        throw std::invalid_argument("native RoPE buffers partially overlap");
+    }
+    // Match pinned host-side float powf before device fast powf/trigonometry.
+    const float theta_scale = powf(freq_base, -2.0f / n_rot);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto mrope_table_ct7 = mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class apply_b955ef>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, rows, (head_dim / 2 + 127) / 128) *
+                            sycl::range(1, 1, 128),
+                        sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        apply(x, out, rows, head_dim, n_rot, theta_scale,
+                              positions, mrope_table_ct7);
+                    });
+            });
+    }
+    /*
+    DPCT1010:390: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:391: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:388: The statement could not be removed.
+    */
+    /*
+    DPCT1000:389: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+}
diff --git a/sycl/src/kernels/cuda/native_router.dp.cpp b/sycl/src/kernels/cuda/native_router.dp.cpp
new file mode 100644
index 00000000000..4be5d9bdeab
--- /dev/null
+++ b/sycl/src/kernels/cuda/native_router.dp.cpp
@@ -0,0 +1,232 @@
+// Adapted from topk-moe.cu/common.cuh in llama.cpp
+// 3cf03257f219afbe7334045ff7c6a06ac68c627d; finite F32, 512-expert/10-output path.
+// MIT License
+// Copyright (c) 2023-2026 The ggml authors
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all
+// copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+// SOFTWARE.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/native_router.hpp"
+#include <atomic>
+#include <cfloat>
+#include <cstddef>
+#include <cstdint>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+std::atomic<bool> enabled{false};
+__dpct_inline__ float warp_sum(float value) {
+#pragma unroll
+    /*
+    DPCT1108:177: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int mask = 16; mask; mask >>= 1) value +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, mask);
+    return value;
+}
+__dpct_inline__ float warp_max(float value) {
+#pragma unroll
+    /*
+    DPCT1108:178: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int mask = 16; mask; mask >>= 1) value = sycl::fmax(
+        value,
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            value, mask));
+    return value;
+}
+/*
+DPCT1110:179: The total declared local variable size in device function route
+exceeds 128 bytes and may cause high register pressure. Consult with your
+hardware vendor to find the total register size available and adjust the code,
+or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void route(const float *__restrict__ logits,
+                           int32_t *__restrict__ ids,
+                           float *__restrict__ weights) {
+    // Preserve the pinned 32x8 block geometry; only row zero is active here.
+    // blockIdx.x = the token (a multi-token launch; 0 for the single one)
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    logits += (size_t)item_ct1.get_group(2) * 512;
+        ids += (size_t)item_ct1.get_group(2) * 10;
+        weights += (size_t)item_ct1.get_group(2) * 10;
+    if (item_ct1.get_local_id(1) != 0) return;
+    const int lane = item_ct1.get_local_id(2);
+    float values[16];
+#pragma unroll
+    for (int i = 0; i < 16; ++i) values[i] = logits[lane + i * 32];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    float maximum = -INFINITY;
+#pragma unroll
+    for (int i = 0; i < 16; ++i) maximum = sycl::max(maximum, values[i]);
+    maximum = warp_max(maximum);
+    float sum = 0.0f;
+#pragma unroll
+    for (int i = 0; i < 16; ++i) {
+        values[i] = sycl::native::exp(values[i] - maximum);
+        sum += values[i];
+    }
+    const float reciprocal = 1.0f / warp_sum(sum);
+#pragma unroll
+    for (int i = 0; i < 16; ++i) {
+        values[i] *= reciprocal;
+        if (sycl::isnan(values[i])) values[i] = -FLT_MAX;
+    }
+    float selected = 0.0f, selected_sum = 0.0f;
+    for (int rank = 0; rank < 10; ++rank) {
+        float best = values[0];
+        int expert = lane;
+#pragma unroll
+        for (int i = 1; i < 16; ++i) {
+            if (values[i] > best) { best = values[i]; expert = lane + i * 32; }
+        }
+#pragma unroll
+        for (int mask = 16; mask; mask >>= 1) {
+            /*
+            DPCT1108:180: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float other = dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                best, mask);
+            /*
+            DPCT1108:181: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int other_id = dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                expert, mask);
+            if (other > best || (other == best && other_id < expert)) { best = other; expert = other_id; }
+        }
+        if ((expert & 31) == lane) {
+            values[expert / 32] = -INFINITY;
+            ids[rank] = expert;
+            // Deliberately accumulate by WINNING EXPERT lane, not output rank.
+            // Multiple selected experts in one lane add in selection order.
+            selected_sum += best;
+        }
+        if (rank == lane) selected = best;
+    }
+    selected_sum = sycl::max(warp_sum(selected_sum), 6.103515625e-5f);
+    const float inverse_selected_sum = 1.0f / selected_sum;
+    if (lane < 10) weights[lane] = selected * inverse_selected_sum;
+}
+bool valid(const void* p, size_t bytes) {
+    const auto address = reinterpret_cast<uintptr_t>(p);
+    return p && address % 4 == 0 && bytes <= UINTPTR_MAX - address;
+}
+bool overlap(const void* a, size_t an, const void* b, size_t bn) {
+    const auto ap = reinterpret_cast<uintptr_t>(a), bp = reinterpret_cast<uintptr_t>(b);
+    return ap < bp + bn && bp < ap + an;
+}
+}
+void native_router_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
+bool native_router_enabled() { return enabled.load(std::memory_order_relaxed); }
+void native_router_top10(const float* logits, int32_t* ids, float* weights, void* stream) {
+    if (!stream || !valid(logits, 512 * 4) || !valid(ids, 10 * 4) || !valid(weights, 10 * 4)
+        || overlap(logits, 512 * 4, ids, 10 * 4) || overlap(logits, 512 * 4, weights, 10 * 4)
+        || overlap(ids, 10 * 4, weights, 10 * 4))
+        throw std::invalid_argument("native router requires a stream, aligned spans, and disjoint outputs");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class route_60b296>>(
+                sycl::nd_range<3>(sycl::range(1, 8, 32), sycl::range(1, 8, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        route(logits, ids, weights);
+                    });
+    }
+    /*
+    DPCT1010:858: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:859: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:856: The statement could not be removed.
+    */
+    /*
+    DPCT1000:857: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+void native_router_top10_multi(const float* logits, int32_t* ids, float* weights, int n_tok, void* stream) {
+    if (!stream || n_tok < 1 || !valid(logits, (size_t) n_tok * 512 * 4) || !valid(ids, (size_t) n_tok * 10 * 4) ||
+        !valid(weights, (size_t) n_tok * 10 * 4))
+        throw std::invalid_argument("native router (multi) requires a stream and aligned [n,512]/[n,10] buffers");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->parallel_for<dpct_kernel_name<class route_64c24f>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_tok) *
+                                      sycl::range(1, 8, 32),
+                                  sycl::range(1, 8, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        route(logits, ids, weights);
+                    });
+    }
+    /*
+    DPCT1010:862: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto error = 0;
+    /*
+    DPCT1009:863: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:860: The statement could not be removed.
+    */
+    /*
+    DPCT1000:861: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (error !=
+        0) throw std::runtime_error(dpct::get_error_string_dummy(error));
+}
+}
diff --git a/sycl/src/kernels/cuda/ple.dp.cpp b/sycl/src/kernels/cuda/ple.dp.cpp
new file mode 100644
index 00000000000..b8d46677269
--- /dev/null
+++ b/sycl/src/kernels/cuda/ple.dp.cpp
@@ -0,0 +1,674 @@
+// src/kernels/cuda/ple.cu - P2.S4: the PLE block's GPU half.
+//
+// See include/strata/kernels/ple.hpp for the structure and for the `normalized`-is-the-conv-input finding.
+//
+// The legacy arithmetic below follows the captured CPU ggml graph
+// (`bench/micro/ple_in.bin` / `ple_out.bin`, produced by `ple_layer_xcheck.cpp`):
+//
+//   * `rms_norm` accumulates `(double)(x*x)` with the PRODUCT rounded in f32 first - that is literally what
+//     `ggml_compute_forward_rms_norm_f32` does (`sum += (ggml_float)(x[i00]*x[i00])` with `ggml_float` =
+//     double), and it is not the same as accumulating in f32 or as widening before the multiply.
+//   * `silu` is `x / (1 + expf(-x))` in f32, which is `ggml_silu_f32`.
+//   * the gate's `sqrt` and `sigmoid` are f32.
+//
+// The opt-in native BF16 path replaces only ple_value with the pinned CUDA single-token BF16/F32 MMVF.
+// A separate opt-in native postops path follows the pinned CUDA arithmetic after both projections.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/ple.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/ngram.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s2_gemv_q8.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/native_ple_postops.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <stdexcept>
+#include <string>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 256;
+bool native_bf16 = false;
+bool native_postops = false;
+
+bool overlap(const void* a, size_t a_bytes, const void* b, size_t b_bytes) {
+    if (a == nullptr || b == nullptr || a_bytes == 0 || b_bytes == 0) return false;
+    const uintptr_t aa = reinterpret_cast<uintptr_t>(a), bb = reinterpret_cast<uintptr_t>(b);
+    return aa < bb ? bb - aa < a_bytes : aa - bb < b_bytes;
+}
+
+__dpct_inline__ void
+history_advance_kernel(float *__restrict__ history,
+                       const float *__restrict__ normalized) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int channel = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                        item_ct1.get_local_id(2);
+    if (channel >= NG_HC_DIM) return;
+    float* column = history + (size_t) channel * NG_HIST;
+#pragma unroll
+    for (int row = 0; row + 1 < NG_HIST; ++row) column[row] = column[row + 1];
+    column[NG_HIST - 1] = normalized[channel];
+}
+
+__dpct_inline__ uint16_t bf16_bits(float f) {
+    uint32_t i;
+    memcpy(&i, &f, 4);
+    i = (i + ((i >> 16) & 1u) + 0x7FFFu) & 0xFFFF0000u;
+    return (uint16_t) (i >> 16);
+}
+
+__dpct_inline__ float bf16_float(uint16_t h) {
+    const uint32_t i = (uint32_t) h << 16;
+    float f;
+    memcpy(&f, &i, 4);
+    return f;
+}
+
+__dpct_inline__ float silu_f(float x) {
+    return x / (1.0f + sycl::native::exp(-x));
+}
+
+/// Block-wide sum in double, broadcast to all threads.  The leading `__syncthreads` matters: the result is
+/// read out of `scratch[0]` and a later call reuses the array, so without a barrier a fast thread can
+/// overwrite it before a slow one has read it - invisible in most runs and a slightly different norm when it
+/// fires.
+inline double block_sum(double v, double *scratch) {
+    /*
+    DPCT1065:1040: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    item_ct1.barrier();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    /*
+DPCT1108:271: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+    /*
+DPCT1121:272: Make sure that the "v" which is used in the SYCL group
+function/algorithm is initialized.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) v +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            off);
+    if (lane == 0) scratch[warp] = v;
+    /*
+    DPCT1065:1041: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int nw = ((int)item_ct1.get_local_range(2) + 31) >> 5;
+    v = (item_ct1.get_local_id(2) < nw) ? scratch[item_ct1.get_local_id(2)]
+                                        : 0.0;
+    if (warp == 0)
+        /*
+DPCT1108:273: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+        /*
+DPCT1121:274: Make sure that the "v" which is used in the SYCL group
+function/algorithm is initialized.
+*/
+#pragma unroll
+        for (int off = 16; off > 0; off >>= 1) v +=
+            dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                v, off);
+    if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
+    /*
+    DPCT1065:1042: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return scratch[0];
+}
+
+/// `grouped_norm`, ONE BLOCK PER STREAM.  The ggml form is `reshape_3d(x, n_embd, hc, T)` then
+/// `rms_norm(..., eps) * w`, so ne0 = n_embd is the reduction axis and each hc stream is normalised on its
+/// own.  In the flat ggml layout (ne0 fastest) stream c occupies [c*n_embd, (c+1)*n_embd).
+__dpct_inline__ void gnorm_kernel(const float *__restrict__ x,
+                                  const float *__restrict__ w,
+                                  float *__restrict__ y, int n_embd,
+                                  float eps) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &scratch = *sycl::ext::oneapi::group_local_memory_for_overwrite<double[8]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int c = item_ct1.get_group(2);
+    const float* xc = x + (size_t) c * n_embd;
+    const float* wc = w + (size_t) c * n_embd;
+    float* yc = y + (size_t) c * n_embd;
+
+    double acc = 0.0;
+    for (int d = item_ct1.get_local_id(2); d < n_embd;
+         d += item_ct1.get_local_range(2)) {
+        // The PRODUCT is rounded in f32 before it is widened - `(ggml_float)(x[i00]*x[i00])`.
+        const float sq = xc[d] * xc[d];
+        acc += (double) sq;
+    }
+    const float mean = (float) (block_sum(acc, scratch) / (double) n_embd);
+    const float scale = 1.0f / sycl::sqrt(mean + eps);
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < n_embd;
+         d += item_ct1.get_local_range(2)) yc[d] = xc[d] * scale * wc[d];
+}
+
+/// `s[c] = sum_d key[c][d]*query[c][d] / sqrt(n_embd)`, then the signed square root and the sigmoid.
+///
+/// `mag = sqrt(clamp(|s|, 1e-6, inf))` and `gate = sigmoid(sgn(s) * mag)`.  The clamp is a floor on |s|, so
+/// it only bites near zero; the SIGN is carried separately, which is what keeps the gate symmetric about 0.5.
+__dpct_inline__ void gate_kernel(const float *__restrict__ key,
+                                 const float *__restrict__ query,
+                                 float *__restrict__ gate, int n_embd,
+                                 float inv_sqrt_n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &scratch = *sycl::ext::oneapi::group_local_memory_for_overwrite<double[8]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int c = item_ct1.get_group(2);
+    const float* kc = key + (size_t) c * n_embd;
+    const float* qc = query + (size_t) c * n_embd;
+    double acc = 0.0;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < n_embd;
+         d += item_ct1.get_local_range(2)) acc += (double)(kc[d] * qc[d]);
+    const float s = (float) (block_sum(acc, scratch) / (double) 1.0) * inv_sqrt_n;
+    const float mag = sycl::sqrt(sycl::fmax(sycl::fabs(s), 1e-6f));
+    const float sgn = (s > 0.0f) ? 1.0f : ((s < 0.0f) ? -1.0f : 0.0f);
+    if (item_ct1.get_local_id(2) == 0) gate[c] =
+        1.0f / (1.0f + sycl::native::exp(-(sgn * mag)));
+}
+
+/// `gated[c][d] = value[d] * gate[c]` - the value broadcast across the hc streams.
+__dpct_inline__ void bcast_kernel(const float *__restrict__ value,
+                                  const float *__restrict__ gate,
+                                  float *__restrict__ gated, int n_embd,
+                                  int hc) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= n_embd * hc) return;
+    gated[i] = value[i % n_embd] * gate[i / n_embd];
+}
+
+/// The depthwise causal dilated conv, then SiLU.  One thread per channel.
+///
+/// `out[c] = sum_k kW[k][c] * terms[t - (kern-1-k)*dil][c]` with `t = hist` (the first new position), so tap k
+/// reads row `hist - (kern-1-k)*dil` of `[history | new]`.  For the real geometry (kern 4, dil 3, hist 9) the
+/// four taps read rows 0, 3, 6 and 9 - and row 9 is the NEW row, which is the only one beyond the history.
+/// That is why no `terms` buffer is built: three taps come from the caller's history and one from `norm`.
+///
+/// `kW` IS GGML-NATIVE: `kW[k + kern*c]`.  The manifest's shape is [4, 10240] with ne0 = 4 fast, and
+/// `ref/ngram.py`'s (4, 10240) numpy `kernel[k][c]` is the TRANSPOSE of that.  The source's own view
+/// (`ggml_view_2d(model.layers[il].ple_conv1d, 1, hc_dim, nb[1], k*nb[0])`) settles which one is meant.
+__dpct_inline__ void conv_kernel(const float *__restrict__ hist,
+                                 const float *__restrict__ norm,
+                                 const uint16_t *__restrict__ kW,
+                                 float *__restrict__ out, int hc_dim, int kern,
+                                 int dil, int nhist) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= hc_dim) return;
+    float acc = 0.0f;
+    for (int k = 0; k < kern; ++k) {
+        const int row = nhist - (kern - 1 - k) * dil;      // tap 0 reads the FURTHEST back
+        // ROW-FASTEST: `hist[row + nhist*c]`.  The conv state is `ggml_reshape_3d(state, d_conv-1,
+        // conv_channels, n_seqs)`, so ne0 = hist varies fastest and the flat index is row + hist*channel.
+        // Channel-slowest (`row*hc_dim + c`) is the natural thing to write and would read a transposed state -
+        // `ple_layer_xcheck.cpp` L79-83 records getting this wrong once already.
+        const float v = (row == nhist) ? norm[c] : hist[(size_t) row + (size_t) nhist * c];
+        acc += f32_from_f16(kW[k + kern * c]) * v;
+    }
+    out[c] = silu_f(acc);
+}
+
+/// `result = hidden + gated + conv`, elementwise over hc_dim.
+__dpct_inline__ void add3_kernel(const float *__restrict__ hidden,
+                                 const float *__restrict__ gated,
+                                 const float *__restrict__ conv,
+                                 float *__restrict__ result, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) result[i] = hidden[i] + gated[i] + conv[i];
+}
+
+/// `y[o] = sum_i bf16(x[i]) * bf16(w[o*n_in + i])`.  The weight is BF16 and so is the ACTIVATION, which is
+/// the contract for a BF16 tensor (`docs/activation-contract.md`); with both sides bf16 the products are
+/// exact in f32 and only the summation order differs from ggml's.
+__dpct_inline__ void bf16_gemv_kernel(const uint16_t *__restrict__ x,
+                                      const uint16_t *__restrict__ w,
+                                      float *__restrict__ y, int n_in,
+                                      int n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int o = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (o >= n_out) return;
+    const uint16_t* row = w + (size_t) o * n_in;
+    double acc = 0.0;
+#pragma unroll
+    for (int i = 0; i < n_in; ++i) acc +=
+        (double)bf16_float(x[i]) * (double)bf16_float(row[i]);
+    y[o] = (float) acc;
+}
+
+__dpct_inline__ void to_bf16_kernel(const float *__restrict__ x,
+                                    uint16_t *__restrict__ y, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) y[i] = bf16_bits(x[i]);
+}
+
+void ck(dpct::err0 e, const char *what) {
+}
+
+}  // namespace
+
+void ple_set_native_bf16(bool enabled) { native_bf16 = enabled; }
+void ple_set_native_postops(bool enabled) { native_postops = enabled; }
+bool ple_native_postops_enabled() { return native_postops; }
+
+void ple_history_advance(float* hist, const float* normalized, void* stream) {
+    if (hist == nullptr || normalized == nullptr)
+        throw std::invalid_argument("ple_history_advance: null history or normalized input");
+    if (overlap(hist, (size_t) NG_HIST * NG_HC_DIM * sizeof(float),
+                normalized, (size_t) NG_HC_DIM * sizeof(float)))
+        throw std::invalid_argument("ple_history_advance: history and normalized input overlap");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class history_advance_kernel_204159>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (NG_HC_DIM + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    history_advance_kernel(hist, normalized);
+                });
+    }
+    /*
+    DPCT1010:1044: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "history advance launch");
+}
+
+bool ple_block_available() try {
+    int n = 0;
+    return DPCT_CHECK_ERROR(n = dpct::device_count()) == 0 && n > 0;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+uint64_t ple_block_scratch_bytes() {
+    // five hc_dim floats + n_embd + hc, then the Q8 activation image, then the BF16 embedding copy, each
+    // 16-byte aligned because `d_scratch` is cast to `float*` and `d_act` to `uint8_t*` at those offsets.
+    const size_t f = (size_t) (5 * NG_HC_DIM + NG_N_EMBD + NG_HC) * sizeof(float);
+    const size_t q = (size_t) (NG_N_EMBD / 32) * 34;
+    const size_t e = (size_t) NG_N_EMBD * sizeof(uint16_t);
+    return ((f + 15) & ~(size_t) 15) + ((q + 15) & ~(size_t) 15) + e + 256;
+}
+
+void ple_block(const float* emb, const float* hidden, const float* hist_rows, const PleWeights& w,
+               PleOut& out, void* scratch, void* stream) {
+    const bool native_key = w.key_native_data != nullptr && w.key_bf16 == nullptr;
+    if (native_key && (!emb || !hidden || !hist_rows || !out.result || !scratch || !stream ||
+                       !w.key_native_q8_1 || w.key_native_type != 42))
+        throw std::invalid_argument("ple_block: native key requires Q2_0 weights, input/output, private scratch and explicit stream");
+    if (emb == nullptr || hidden == nullptr || hist_rows == nullptr || out.result == nullptr) return;
+    const int n_embd = NG_N_EMBD, hc = NG_HC, hc_dim = NG_HC_DIM;
+    static_assert(NG_N_EMBD == 2560 && NG_HC_DIM == 10240, "native PLE key geometry changed");
+    const size_t float_bytes = (size_t) (5 * hc_dim + n_embd + hc) * sizeof(float);
+    dpct::queue_ptr st = strata::q_of(stream);
+
+    // One allocation for every intermediate.
+    //
+    // THE ENGINE WILL NOT DO THIS.  P2.T10 requires zero token-path allocations, and the fix is the same one
+    // `gr_read` already uses: a caller-owned workspace carved once at startup.  It is done this way here
+    // because this function's job in P2.S4 is to be CORRECT and comparable against the oracle, and matching
+    // `shared_expert.cu`'s existing shape keeps the diff small.  Recorded rather than hidden.
+    //
+    // FIVE SEPARATE hc_dim BUFFERS, deliberately.  `key` and `normalized` are both needed at the end for the
+    // oracle comparison, so aliasing one onto the other - which the first version did - silently returns the
+    // WRONG `key`.  Two buffers of the same size look like an obvious saving and the only thing it saves is
+    // 40 KB.
+    // **THE WORKSPACE IS CARVED FROM THE CALLER'S, NOT ALLOCATED.**  Three `cudaMalloc`s and a
+    // `cudaStreamSynchronize` used to live here, and inside a stream capture both are errors: the engine
+    // reported `ple_block: scratch: operation not permitted when stream is capturing`, and a token-path
+    // allocation is a P2.T10 violation besides.  The comment this replaces already said the right shape was
+    // "a caller-owned workspace carved once at startup"; this is that.
+    const size_t q8_bytes = (size_t) (n_embd / 32) * 34;
+    if (scratch == nullptr) {
+        std::fprintf(stderr, "ple_block: scratch is null; the caller owns it (see ple_block_scratch_bytes)\n");
+        std::exit(1);
+    }
+    const struct Export { const float* pointer; size_t count; const char* name; } exports[] = {
+        {out.key, (size_t) hc_dim, "key"}, {out.value, (size_t) n_embd, "value"},
+        {out.gate, (size_t) hc, "gate"}, {out.gated, (size_t) hc_dim, "gated"},
+        {out.normalized, (size_t) hc_dim, "normalized"}, {out.conv, (size_t) hc_dim, "conv"},
+        {out.result, (size_t) hc_dim, "result"}
+    };
+    for (const auto& item : exports) {
+        if (overlap(item.pointer, item.count * sizeof(float), scratch, (size_t) ple_block_scratch_bytes()))
+            throw std::invalid_argument(std::string("ple_block: output ") + item.name + " overlaps scratch");
+    }
+    if (native_key) {
+        const size_t native_bytes = native_q8_1_bytes(n_embd);
+        const size_t weight_bytes = native_mmvq_weight_bytes(w.key_native_type, n_embd, hc_dim);
+        if ((reinterpret_cast<uintptr_t>(w.key_native_data) & 3u) ||
+            (reinterpret_cast<uintptr_t>(w.key_native_q8_1) & 3u))
+            throw std::invalid_argument("ple_block: native key buffers require four-byte alignment");
+        const struct Region { const void* pointer; size_t bytes; } regions[] = {
+            {scratch, (size_t) ple_block_scratch_bytes()}, {emb, (size_t) n_embd * 4},
+            {hidden, (size_t) hc_dim * 4}, {hist_rows, (size_t) NG_HIST * hc_dim * 4},
+            {w.key_native_data, weight_bytes}, {w.value_bf16, (size_t) n_embd * n_embd * 2},
+            {w.norm_key, (size_t) hc_dim * 4}, {w.norm_query, (size_t) hc_dim * 4},
+            {w.norm_conv, (size_t) hc_dim * 4}, {w.conv1d_f16, (size_t) PLE_CONV_KERNEL * hc_dim * 2}
+        };
+        for (const auto& region : regions)
+            if (overlap(w.key_native_q8_1, native_bytes, region.pointer, region.bytes))
+                throw std::invalid_argument("ple_block: native key scratch overlaps workspace, input or weight");
+        for (const auto& item : exports)
+            if (overlap(w.key_native_q8_1, native_bytes, item.pointer, item.count * sizeof(float)))
+                throw std::invalid_argument(std::string("ple_block: native key scratch overlaps output ") + item.name);
+    }
+    uint8_t* base = (uint8_t*) scratch;
+    float* d_scratch = (float*) base;
+    uint8_t* d_act = base + ((float_bytes + 15) & ~(size_t) 15);
+    uint16_t* d_emb16 = (uint16_t*) (d_act + ((q8_bytes + 15) & ~(size_t) 15));
+    float* d_key = d_scratch;
+    float* d_query = d_key + hc_dim;
+    float* d_norm = d_query + hc_dim;
+    float* d_gated = d_norm + hc_dim;
+    float* d_conv = d_gated + hc_dim;
+    float* d_value = d_conv + hc_dim;
+    float* d_gate = d_value + n_embd;
+
+    // ---- key = grouped_norm(ple_key @ emb). The optional native projection
+    // follows pinned CUDA Q8_1 MMVQ; the default retains its canonical Q8_0 path.
+    if (w.key_bf16 != nullptr) {
+        bf16_gemv_fp32_mmvf(emb, w.key_bf16, d_key, n_embd, hc_dim, stream);
+    } else if (native_key) {
+        native_quantize_q8_1(emb, w.key_native_q8_1, n_embd, 1, stream);
+        native_mmvq(w.key_native_type, w.key_native_data, w.key_native_q8_1,
+                    d_key, n_embd, hc_dim, 1, stream);
+    } else {
+        quantize_q8_0(emb, d_act, n_embd, st);
+        s2_gemv_q8(d_act, w.key_codes, w.key_scales, d_key, n_embd, hc_dim, 8, st);
+    }
+    if (!native_postops) {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->submit([&](sycl::handler &cgh) {
+                auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
+
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_cf1ead>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gnorm_kernel(d_key, w.norm_key, d_key, n_embd,
+                                         NG_RMS_EPS_ct4);
+                        });
+            });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->submit([&](sycl::handler &cgh) {
+                auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
+
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_2584bb>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gnorm_kernel(hidden, w.norm_query, d_query, n_embd,
+                                         NG_RMS_EPS_ct4);
+                        });
+            });
+        }
+    }
+
+    // The value projection's independent option leaves the nonlinear PLE operations unchanged.
+    if (native_bf16) {
+        bf16_gemv_fp32_mmvf(emb, w.value_bf16, d_value, n_embd, n_embd, stream);
+    } else {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class to_bf16_kernel_e8b7a8>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (n_embd + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    to_bf16_kernel(emb, d_emb16, n_embd);
+                });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->parallel_for<dpct_kernel_name<class bf16_gemv_kernel_ab93ff>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (n_embd + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    bf16_gemv_kernel(d_emb16, w.value_bf16, d_value, n_embd,
+                                     n_embd);
+                });
+        }
+    }
+
+    const float* normalized_key = d_key;
+    if (native_postops) {
+        // The key norm has a distinct destination; temporary query storage can
+        // be reused for normalized gated values after the gate consumes it.
+        NativePlePostopsBuffers buffers{d_query,d_norm,d_gate,d_gated,d_norm,d_conv,out.result};
+        native_ple_postops(d_key,hidden,d_value,hist_rows,w,buffers,stream);
+        normalized_key = d_query;
+    } else {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->submit([&](sycl::handler &cgh) {
+                auto sqrtf_float_n_embd_ct4 = 1.0f / sqrtf((float)n_embd);
+
+                cgh.parallel_for<dpct_kernel_name<class gate_kernel_2da4a8>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gate_kernel(d_key, d_query, d_gate, n_embd,
+                                        sqrtf_float_n_embd_ct4);
+                        });
+            });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class bcast_kernel_ce83eb>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    bcast_kernel(d_value, d_gate, d_gated, n_embd, hc);
+                });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp64});
+
+            st->submit([&](sycl::handler &cgh) {
+                auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
+
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_79d1c2>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, hc) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gnorm_kernel(d_gated, w.norm_conv, d_norm, n_embd,
+                                         NG_RMS_EPS_ct4);
+                        });
+            });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                auto PLE_CONV_KERNEL_ct5 = PLE_CONV_KERNEL;
+                auto NGRAM_SIZE_ct6 = NGRAM_SIZE;
+                auto NG_HIST_ct7 = NG_HIST;
+
+                cgh.parallel_for<dpct_kernel_name<class conv_kernel_cb94da>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        conv_kernel(hist_rows, d_norm, w.conv1d_f16, d_conv,
+                                    hc_dim, PLE_CONV_KERNEL_ct5, NGRAM_SIZE_ct6,
+                                    NG_HIST_ct7);
+                    });
+            });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class add3_kernel_ba9359>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    add3_kernel(hidden, d_gated, d_conv, out.result, hc_dim);
+                });
+        }
+    }
+
+    // ---- the intermediates the oracle comparison needs.  `key` is the NORMALISED key, because the source's
+    //      `cb(key, ...)` capture is after `gnorm`; `value` is the projection before the gate.  Each stage the
+    //      oracle records is reproduced here so a mismatch can be attributed instead of guessed at.
+    /*
+    DPCT1124:1045: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    if (out.key) ck(DPCT_CHECK_ERROR(st->memcpy(out.key, normalized_key,
+                                                hc_dim * sizeof(float))),
+                    "key");
+    if (out.value)
+        /*
+        DPCT1124:1046: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               st->memcpy(out.value, d_value, n_embd * sizeof(float))),
+           "value");
+    /*
+    DPCT1124:1047: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    if (out.gate)
+        ck(DPCT_CHECK_ERROR(st->memcpy(out.gate, d_gate, hc * sizeof(float))),
+           "gate");
+    if (out.gated)
+        /*
+        DPCT1124:1048: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               st->memcpy(out.gated, d_gated, hc_dim * sizeof(float))),
+           "gated");
+    if (out.normalized)
+        /*
+        DPCT1124:1049: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               st->memcpy(out.normalized, d_norm, hc_dim * sizeof(float))),
+           "norm");
+    if (out.conv)
+        /*
+        DPCT1124:1050: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               st->memcpy(out.conv, d_conv, hc_dim * sizeof(float))),
+           "conv");
+
+    /*
+    DPCT1010:1051: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "launch");
+    // **NO `cudaStreamSynchronize` HERE.**  It was there to make the function self-contained for the parity
+    // test, and inside a capture it is an error - a caller that wants the result immediately synchronises
+    // itself, and the engine's caller does not want that at all.
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa.dp.cpp b/sycl/src/kernels/cuda/qsa.dp.cpp
new file mode 100644
index 00000000000..87641aa06ec
--- /dev/null
+++ b/sycl/src/kernels/cuda/qsa.dp.cpp
@@ -0,0 +1,1267 @@
+// src/kernels/cuda/qsa.cu - P2.S2: the QSA cache, indexer and attention (see include/strata/kernels/qsa.hpp).
+//
+// The header documents the layouts and the scope; this file documents the four decisions that are about the
+// KERNEL rather than about the interface.
+//
+// 1. THE THRESHOLD SEARCH IN `topk_512` RATHER THAN A SORT.  The selection has to reproduce `ggml_top_k` on the
+//    masked per-cell scores with the reference's tie rule (ascending index), and it has to be EXACT: a
+//    different selected set is a different attention input, and `docs/capture-format.md` L127 gives
+//    `indexer_ids` no tolerance.  The kernel therefore computes the width-th largest score as a 32-bit
+//    "order key" by binary lifting (32 monotone passes with `count(key >= cand) >= width`), and then emits -
+//    in ONE ascending walk - every cell strictly above it and the first `width - c_gt` cells equal to it.  That
+//    is provably the same set as sorting by (score desc, index asc) and taking the first width, it needs no
+//    scratch and no sort, it is deterministic, and it is the reason `kTopkMaxCells` exists: the whole selection
+//    runs in ONE block so the ascending walk is a chunked scan rather than a second global pass.  Phase 3
+//    replaces it with a radix select; this one is the thing that radix select has to agree with.
+//
+// 2. ONE BLOCK PER HEAD IN `qsa_attend`, SCORES IN SHARED MEMORY.  n_ids reaches 2051, so a per-head score
+//    vector is 8 KB and 24 heads are 24 blocks: the whole attention is 24 blocks x 256 threads, which is a
+//    small grid, but it is also exactly the shape the source uses (one flash tile per query head) and it keeps
+//    the softmax's three passes over the scores in shared memory instead of in global.  The score loop has one
+//    thread per CELL walking the 256 dims sequentially, which reads 16-byte-vectorisable half2 runs; the value
+//    loop has one thread per DIM walking the cells, whose warp-wide reads are contiguous within a cell.  Both
+//    are coalesced for the layout the gather produces.
+//
+// 3. NO `__float2half`.  `f16_from_f32` from f16_bits.hpp, for the reason round 193 recorded: `__float2half`
+//    produced 0x2600 for 0x26DB and 0x3C01 for exactly 1.0.  The parity test checks that converter against
+//    vectors generated by numpy's float16, which is an oracle sharing no code with it.
+//
+// 4. THE POOLING ARITHMETIC IS IN DOUBLE AND ORDER-FIXED.  `pooled` and the spare key are compared BIT-EXACT
+//    against the reference (the spare key's rotation is at position 0, where the f32 rope kernel is an exact
+//    identity, so the comparison is not weakened by the rope).  That needs the same summation order on both
+//    sides: the `r` raw keys are added in CELL order, the sum of squares runs d = 0..idx_dim-1 sequentially,
+//    and `__dadd_rn`/`__dmul_rn` block FMA contraction, which would otherwise fuse `ss + m*m` into one
+//    operation with no intermediate rounding and land one ulp away from the host.
+//
+//    THE `d` IN THOSE NAMES IS NOT COSMETIC.  The first version wrote `__fadd_rn`/`__fmul_rn`, which are
+//    the SINGLE-precision intrinsics: the compiler converted each double operand to float, operated
+//    there, and converted back, so the whole pooling arithmetic ran in single precision - `ss` held only
+//    float precision (121.82236480712891 on the device against 121.82236342931094 in the reference).
+//    Every comparison still passed at any sane tolerance, the spare key landing 0.4 f32 ulp away; only a
+//    BIT-EXACT assertion plus a full-precision probe of the intermediate found it.  That is the strongest
+//    argument in this file for keeping both.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/qsa.hpp"
+
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/kv_stream.hpp"
+#include "strata/kernels/rope.hpp"
+#include "strata/kernels/mrope.hpp"
+
+#include <cfloat>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 128;
+
+void fail(const char* what) {
+    std::fprintf(stderr, "qsa: %s\n", what);
+    std::exit(1);
+}
+
+void check_launch(const char* what) {
+    /*
+    DPCT1010:806: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+/// The SYNCHRONOUS entry points must check their own wait.  Without this the sticky error from a kernel that
+/// faulted becomes visible only at the NEXT call's `cudaGetLastError()`, which then names the wrong kernel -
+/// exactly the mis-attribution that made round 198's first `kv_append` failure look like a later one.
+void check_sync(const char *what) try {
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+/// Geometry validation.  A silently wrong `head_dim % 4` would corrupt the gather's uint2 copy and a silently
+/// wrong `n_head % n_head_kv` would produce a plausible attention with the wrong key, so both are refused.
+void validate(const QsaShapes& s, const char* who) {
+    if (s.n_head <= 0 || s.n_head_kv <= 0 || s.head_dim <= 0 || s.idx_dim <= 0 || s.idx_n_head <= 0 ||
+        s.idx_block < 2 || s.page_size < 1) {
+        std::fprintf(stderr, "qsa: %s: geometry is not set up\n", who);
+        std::exit(1);
+    }
+    if (s.n_head % s.n_head_kv != 0) {
+        std::fprintf(stderr, "qsa: %s: n_head %lld is not a multiple of n_head_kv %lld\n", who,
+                     (long long) s.n_head, (long long) s.n_head_kv);
+        std::exit(1);
+    }
+    if (s.head_dim % 4 != 0) {
+        std::fprintf(stderr, "qsa: %s: head_dim %lld must be a multiple of 4 (the gather copies uint2)\n", who,
+                     (long long) s.head_dim);
+        std::exit(1);
+    }
+    if (s.n_rot <= 0 || s.n_rot % 2 != 0 || s.n_rot > s.head_dim || s.n_rot > s.idx_dim) {
+        std::fprintf(stderr, "qsa: %s: n_rot %lld must be even and <= head_dim %lld and idx_dim %lld\n", who,
+                     (long long) s.n_rot, (long long) s.head_dim, (long long) s.idx_dim);
+        std::exit(1);
+    }
+    if (s.idx_n_head > 32) {
+        std::fprintf(stderr, "qsa: %s: idx_n_head %lld > 32 (one warp per indexer head)\n", who,
+                     (long long) s.idx_n_head);
+        std::exit(1);
+    }
+}
+
+__dpct_inline__ float h2f(uint16_t bits) { return f32_from_f16(bits); }
+
+// ================= 1. kv_append =================
+
+__dpct_inline__ void
+kv_append_kernel(uint16_t *__restrict__ k_pool, uint16_t *__restrict__ v_pool,
+                 const int32_t *__restrict__ table,
+                 const int32_t *__restrict__ step,
+                 const float *__restrict__ kcur, const float *__restrict__ vcur,
+                 int kv_heads, int head_dim, int page_size, KvHostPools host) {
+    /*
+    DPCT1098:809: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long pos = (long long)*(step + kStepPos);
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= kv_heads * head_dim) return;
+    const int h = i / head_dim, d = i - h * head_dim;
+    // `[page][kv_head][page_size][head_dim]`: one head's consecutive cells are contiguous inside a page.
+    // KV streaming: the host copy (identity layout) always, the VRAM page only if the block is resident.
+    const long long page = (long long) table[pos / page_size];
+    if (page >= 0) {
+        const long long row = (page * kv_heads + h) * page_size + (pos % page_size);
+        k_pool[row * head_dim + d] = f16_from_f32(kcur[i]);
+        v_pool[row * head_dim + d] = f16_from_f32(vcur[i]);
+    }
+    if (host.k_pool != nullptr) {
+        const long long row = ((pos / page_size) * kv_heads + h) * page_size + (pos % page_size);
+        host.k_pool[row * head_dim + d] = f16_from_f32(kcur[i]);
+        host.v_pool[row * head_dim + d] = f16_from_f32(vcur[i]);
+    }
+}
+
+// ================= 2. indexer_key_append =================
+
+/// Appends the raw key, and on a block completion pools AND ROTATES the pooled row.  One thread per indexer
+/// dim, shared `mean` in double.
+///
+/// **THE ROTATION IS INSIDE THIS KERNEL, AND THAT IS WHAT MAKES THE WHOLE FUNCTION CAPTURABLE.**  It used to be
+/// a second launch from the host wrapper, guarded by `if (pos % idx_block == idx_block - 1)` - a HOST branch on
+/// `pos`, which forced `pos` to be a host scalar, which meant a captured graph would replay the first token's
+/// position forever.  Doing it here reads the position from `pos_dev` like every other kernel, so the grid and
+/// the arguments are the same for every token and the graph replays correctly.
+__dpct_inline__ void indexer_key_append_kernel(
+    const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
+    int pos_base, const float *__restrict__ w_k_norm, float eps,
+    float *__restrict__ tail, float *__restrict__ dead,
+    float *__restrict__ pooled, int32_t *__restrict__ block_pos, int idx_dim,
+    int r, int n_rot, const float *__restrict__ cos_tab,
+    const float *__restrict__ sin_tab, const int32_t *__restrict__ mtab,
+    uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto s_mean = (double *)dpct_local; // idx_dim doubles
+    const int d = item_ct1.get_local_id(2);
+    /*
+    DPCT1098:813: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const int pos = (int)*pos_dev;
+    const int slot = pos % r;
+
+    // The RAW tail: a cell that COMPLETES a block is not stored, because the pool below consumes it directly.
+    // That is what makes `idx_block - 1` rows enough.
+    if (slot < r - 1) tail[(size_t) slot * idx_dim + d] = raw[d];
+
+    // The spare slot's key is `rms_norm(raw[0])`, which is CONSTANT for the sequence and is the only reason
+    // cell 0's raw key has to be kept: the three-row tail no longer holds it after the first block.
+    if (pos == 0) {
+        double p = (double) raw[d];
+        double ss = 0.0;
+        // Same order as the pooled path, so the two are comparable: sum of squares over the dims, sequential.
+        // Every thread computes the same `ss` and uses only its own output element.
+        //
+        // `__dadd_rn`/`__dmul_rn`, NOT `__fadd_rn`/`__fmul_rn`: the `f` names are the SINGLE-precision
+        // intrinsics, and using them on doubles silently rounds every operation to float.  `ss` then carries
+        // only float precision (121.82236480712891 against the reference's 121.82236342931094) and the spare
+        // key comes out 0.4 f32 ulp away - close enough that only a BIT-EXACT assertion notices.  `__ddiv_rn`
+        // and `__dsqrt_rn` pin the reciprocal square root for the same reason.
+        for (int i = 0; i < idx_dim; ++i) {
+            const double v = (double) raw[i];
+            /*
+            DPCT1013:814: The rounding mode could not be specified and the
+            generated code may have different accuracy than the original code.
+            Verify the correctness. SYCL math built-in function rounding mode is
+            aligned with OpenCL C 1.2 standard.
+            */
+            ss = ss + v * v;
+        }
+        /*
+        DPCT1013:815: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const double inv = 1.0 / sycl::sqrt(ss / (double)idx_dim + (double)eps);
+        dead[d] = (float) (p * inv * (double) w_k_norm[d]);
+        // rope at position 0 is the identity here (cos = 1, sin = 0 exactly), so no rotation is applied and
+        // the parity test asserts the value is bit-exact - which is what makes skipping it legitimate.
+        pooled[d] = dead[d];
+    }
+
+    if (slot != r - 1) return;
+    /*
+    DPCT1065:810: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier(); // the tail rows this thread is about to read are
+                        // written above
+
+    // The mean of this block's r raw keys, in CELL order: the r-1 tail rows (slots 0..r-2) then the incoming
+    // cell (slot r-1).  The sum of r f32 values is exact in double, so the mean's order cannot matter here -
+    // but the order of the SUM OF SQUARES below can, and it is fixed to d ascending on both sides.
+    double m = 0.0;
+    /*
+DPCT1013:816: The rounding mode could not be specified and the generated code
+may have different accuracy than the original code. Verify the correctness. SYCL
+math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
+*/
+#pragma unroll
+    for (int j = 0; j < r - 1; ++j)
+        m = m + (double)tail[(size_t)j * idx_dim + d];
+    /*
+    DPCT1013:817: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    m = m + (double)raw[d];
+    m = m / (double) r;
+    s_mean[d] = m;
+    /*
+    DPCT1065:811: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    double ss = 0.0;
+    /*
+DPCT1013:818: The rounding mode could not be specified and the generated code
+may have different accuracy than the original code. Verify the correctness. SYCL
+math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
+*/
+#pragma unroll
+    for (int i = 0; i < idx_dim; ++i) ss = ss + s_mean[i] * s_mean[i];
+    /*
+    DPCT1013:819: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const double inv = 1.0 / sycl::sqrt(ss / (double)idx_dim + (double)eps);
+
+    const int b = pos / r;
+    pooled[(size_t) b * idx_dim + d] = (float) (m * inv * (double) w_k_norm[d]);
+    // The spare slot MOVES to b+1 and is rewritten with the same constant value.
+    pooled[(size_t) (b + 1) * idx_dim + d] = dead[d];
+    // The rotation position for this row, kept because a capture reader and the debug dumps want it.  It is the
+    // block's first cell's POSITION, `pos_base + b*r`, and NOT the cell index `b*r`.
+    if (d == 0) *block_pos = (int32_t) (pos_base + b * r);
+    /*
+    DPCT1065:812: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier(); // the row is complete only now; the rotation below
+                        // reads TWO elements of it
+
+    // ---- the rotation of the row that just completed, IN PLACE.
+    //
+    // `i` pairs with `i + half`, so only the first `half` threads do any work - but EVERY thread must reach the
+    // barrier above, which is why the guard is here and not around the whole block's tail.
+    //
+    // The position is the BLOCK'S FIRST cell (`ref/qsa.py` PROPERTY 4: rotating at the block's last cell keeps
+    // every shape and every magnitude), and it comes from `pos_base`, which is constant for a sequence.
+    const int half = n_rot / 2;
+    if (d < half) {
+        float* row = pooled + (size_t) b * idx_dim;
+        const size_t toff = (size_t) mrope_pos(mtab, pos_base + b * r, d) * half;
+        // THE SAME `rope_neox_pair` THE STANDALONE ROPE KERNEL USES.  A second transcription of the pairing is
+        // what this project keeps finding written down wrong.
+        rope_neox_pair(row[d], row[half + d], cos_tab[toff + d], sin_tab[toff + d], row[d], row[half + d]);
+    }
+}
+
+// ================= 3. qsa_index =================
+
+/// One warp per indexer head, one block per pooled row; thread 0 sums the relu'd dots IN HEAD ORDER and maps
+/// the row's score onto its cells.  The reference's Relu is PER HEAD, so the dots cannot be summed first.
+__dpct_inline__ void qsa_index_kernel(const float *__restrict__ pooled,
+                                      const float *__restrict__ q_idx,
+                                      const float *__restrict__ bias,
+                                      int idx_n_head, int idx_dim, long long r,
+                                      const int32_t *__restrict__ step,
+                                      float *__restrict__ cell_scores) {
+    /*
+    DPCT1098:820: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_bid = (long long)*(step + kStepNBid);
+    /*
+    DPCT1098:821: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const long long n_kv = (long long)*(step + kStepNKv);
+    auto &s_dot =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<double[32]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const long long b = item_ct1.get_group(2);
+    // A BLOCK PAST THE COMPLETED-BLOCK COUNT MUST DO NOTHING.  This is what lets the LAYER launch a CONSTANT
+    // grid of the maximum block count instead of this token's `n_bid + 1`: a grid sized from a per-token value
+    // is a per-token LAUNCH CONFIGURATION, and a CUDA graph bakes those in exactly as it bakes in an argument.
+    // Without this guard, a capacity-sized grid would score pooled rows that have not been written yet -
+    // reading zeros and producing a plausible score for a block that does not exist.
+    if (b > n_bid) return;
+    const int wid = item_ct1.get_local_id(2) >> 5,
+              lane = item_ct1.get_local_id(2) & 31;
+    if (wid == 0) s_dot[lane] = 0.0;     // thread 0 reads all idx_n_head entries; zero the unused ones
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+
+    double acc = 0.0;
+#pragma unroll
+    for (int d = lane; d < idx_dim; d += 32)
+        /*
+        DPCT1013:822: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        acc = acc + (double)pooled[(size_t)b * idx_dim + d] *
+                        (double)q_idx[(size_t)wid * idx_dim + d];
+    /*
+DPCT1108:158: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+    /*
+DPCT1013:823: The rounding mode could not be specified and the generated code
+may have different accuracy than the original code. Verify the correctness. SYCL
+math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) acc =
+        acc + dpct::experimental::permute_sub_group_by_xor(
+                  0xffffffffu,
+                  sycl::ext::oneapi::this_work_item::get_sub_group(), acc, o);
+    if (lane == 0) s_dot[wid] = acc;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+
+    if (item_ct1.get_local_id(2) != 0) return;
+    double score = 0.0;
+#pragma unroll
+    for (int h = 0; h < idx_n_head; ++h) score +=
+        (s_dot[h] > 0.0) ? s_dot[h] : 0.0;
+    if (bias != nullptr) score += (double) bias[b];
+    // cell_block: cells of block b for b < n_bid, and the WHOLE incomplete tail for b == n_bid
+    long long lo = b * r, hi = lo + r;
+    if (b == n_bid) hi = n_kv;
+    if (hi > n_kv) hi = n_kv;
+    // llama-memory-hybrid-idx.cpp::set_input_qsa gives incomplete-tail cells
+    // a finite +1e9 bias before top-k.  Read the current step on every replay:
+    // the spare row becomes an ordinary block as soon as its fourth cell arrives.
+    float sc = (float) score;
+    if (b == n_bid && n_kv % r != 0) sc += 1e9f;
+#pragma unroll
+    for (long long j = lo; j < hi; ++j) cell_scores[j] = sc;
+}
+
+// ================= 4. topk_512 =================
+
+/// Total order over f32 as an unsigned key, so one integer comparison orders scores with numpy's float
+/// semantics.  `+ 0.0f` maps -0.0 to +0.0 because numpy treats them as EQUAL (and would break the tie by
+/// index), while the raw bit pattern orders them.  A NaN is mapped to 0, below every real key, i.e. never
+/// selected - numpy sorts NaN LAST, and silently selecting one would be worse than the disagreement.
+__dpct_inline__ uint32_t order_key(float s) {
+    const float v = s + 0.0f;
+    if (!(v == v)) return 0u;
+    uint32_t b;
+    memcpy(&b, &v, 4);
+    return (b & 0x80000000u) ? ~b : (b | 0x80000000u);
+}
+
+constexpr int TOPK_THREADS = 256;
+
+/*
+DPCT1110:159: The total declared local variable size in device function
+topk_kernel exceeds 128 bytes and may cause high register pressure. Consult with
+your hardware vendor to find the total register size available and adjust the
+code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void topk_kernel(const float *__restrict__ scores,
+                                 const int32_t *__restrict__ step,
+                                 int *__restrict__ out_ids) {
+    /*
+    DPCT1098:824: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_kv = (long long)*(step + kStepNKv);
+    /*
+    DPCT1098:825: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const long long width = (long long)*(step + kStepWidth);
+    auto &s_a =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TOPK_THREADS]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_b =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TOPK_THREADS]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_cgt =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<long long>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2);
+    const long long chunk = (n_kv + TOPK_THREADS - 1) / TOPK_THREADS;
+    const long long lo = (long long) t * chunk;
+    long long hi = lo + chunk;
+    if (hi > n_kv) hi = n_kv;
+
+    // ---- binary lifting: the largest key v with count(key >= v) >= width.  Monotone in v, so setting the
+    // bits from the top down lands on exactly that value, and count(>= v) >= width > count(>= v+1).
+    uint32_t v = 0u;
+    for (int bit = 31; bit >= 0; --bit) {
+        const uint32_t cand = v | (1u << bit);
+        int c = 0;
+#pragma unroll
+        for (long long j = lo; j < hi;
+             ++j) if (order_key(scores[j]) >= cand)++ c;
+        s_a[t] = c;
+        /*
+        DPCT1118:160: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+        for (int s = TOPK_THREADS / 2; s > 0; s >>= 1) {
+            if (t < s) s_a[t] += s_a[t + s];
+            /*
+            DPCT1118:162: SYCL group functions and algorithms must be
+            encountered in converged control flow. You may need to adjust the
+            code.
+            */
+            item_ct1.barrier(sycl::access::fence_space::local_space);
+        }
+        const int tot = s_a[0];
+        /*
+        DPCT1118:161: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(
+            sycl::access::fence_space::local_space); // before the next round
+                                                     // overwrites s_a
+        if (tot >= (int) width) v = cand;
+    }
+    const uint32_t thr = v;
+
+    // ---- counts and their exclusive prefixes.  The prefixes are computed by thread 0 in one walk, which is
+    // 256 iterations ONCE per kernel and removes 2 log-steps of scan machinery from a path that is already
+    // 32 passes deep.
+    int gt = 0, eq = 0;
+    for (long long j = lo; j < hi; ++j) {
+        const uint32_t k = order_key(scores[j]);
+        if (k > thr) ++gt;
+        else if (k == thr) ++eq;
+    }
+    s_a[t] = gt;
+    s_b[t] = eq;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (t == 0) {
+        long long ag = 0, ae = 0;
+        for (int i = 0; i < TOPK_THREADS; ++i) {
+            const int g = s_a[i], e = s_b[i];
+            s_a[i] = (int) ag;
+            s_b[i] = (int) ae;
+            ag += g;
+            ae += e;
+        }
+        s_cgt = ag;    // how many are strictly above the threshold, i.e. where the equals start
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    // THE RANK VS THE COUNT.  `off_eq` is how many equal-to-threshold cells come BEFORE this chunk, and it is
+    // compared against `eq_budget`, the number of them the selection has room for.  The first version wrote
+    // `c_gt + prefix_eq` - where an equal cell would land in a "greater-than first, then equal" LAYOUT - and
+    // compared THAT against the budget.  With distinct scores `c_gt == width` and `eq_budget == 0`, so nothing
+    // was ever selected at the threshold and the kernel emitted `width` ids with one missing and one stale.
+    // Every all-equal fixture passed, because there `c_gt == 0` and the two readings coincide.
+    const long long off_eq = s_b[t];
+    const long long eq_budget = width - s_cgt;
+
+    // ---- how many this chunk selects, so the ascending walk can be scattered into place
+    int sel = 0;
+    {
+        long long e = off_eq;
+        for (long long j = lo; j < hi; ++j) {
+            const uint32_t k = order_key(scores[j]);
+            if (k > thr) ++sel;
+            else if (k == thr && e < eq_budget) { ++sel; ++e; }
+        }
+    }
+    s_a[t] = sel;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (t == 0) {
+        long long a = 0;
+        for (int i = 0; i < TOPK_THREADS; ++i) {
+            const int c = s_a[i];
+            s_a[i] = (int) a;
+            a += c;
+        }
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+
+    // ---- emit, walking the cells ASCENDING so the tie rule's "first by index" is the walk order itself
+    long long w = s_a[t];
+    long long e = off_eq;
+    for (long long j = lo; j < hi; ++j) {
+        const uint32_t k = order_key(scores[j]);
+        if (k > thr) out_ids[w++] = (int) j;
+        else if (k == thr && e < eq_budget) { ++e; out_ids[w++] = (int) j; }
+    }
+}
+
+// ================= 5. kv_gather =================
+
+__dpct_inline__ void kv_gather_kernel(
+    const uint16_t *__restrict__ k_pool, const uint16_t *__restrict__ v_pool,
+    const int32_t *__restrict__ table, const int32_t *__restrict__ ids,
+    const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
+    uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
+    /*
+    DPCT1098:826: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_ids = (long long)*(step + kStepWidth);
+    const int per = head_dim / 4;                       // 4 halfs per uint2
+    const long long total = n_ids * kv_heads * per;
+    const long long i =
+        item_ct1.get_group(2) * (long long)item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= total) return;
+    const long long id = i / (kv_heads * (long long) per);
+    const int rem = (int) (i % (kv_heads * (long long) per));
+    const int h = rem / per, q = rem - h * per;
+    const int cell = ids[id];
+    const long long page = (long long) table[cell / page_size];
+    const long long src = ((page * kv_heads + h) * page_size + (cell % page_size)) * (long long) per + q;
+    const long long dst = (id * kv_heads + h) * (long long) per + q;
+    reinterpret_cast<sycl::uint2 *>(k_scratch)[dst] =
+        reinterpret_cast<const sycl::uint2 *>(k_pool)[src];
+    reinterpret_cast<sycl::uint2 *>(v_scratch)[dst] =
+        reinterpret_cast<const sycl::uint2 *>(v_pool)[src];
+}
+
+// ================= 6. qsa_attend =================
+
+__dpct_inline__ float warp_max(float v) {
+    /*
+DPCT1108:163: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) v = sycl::fmax(
+        v, dpct::experimental::permute_sub_group_by_xor(
+               0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+               v, o));
+    return v;
+}
+
+__dpct_inline__ float warp_sum(float v) {
+    /*
+DPCT1108:164: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) v +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            o);
+    return v;
+}
+
+/// One block per query head.  `s` holds the scores, which are then overwritten with the softmax weights.
+/*
+DPCT1110:165: The total declared local variable size in device function
+qsa_attend_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void qsa_attend_kernel(
+    const float *__restrict__ q, const uint16_t *__restrict__ k_scratch,
+    const uint16_t *__restrict__ v_scratch, const int32_t *__restrict__ step,
+    int n_head, int n_head_kv, int head_dim, float *__restrict__ attn,
+    float *__restrict__ weights, uint8_t *dpct_local) {
+    /*
+    DPCT1098:834: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long n_ids = (long long)*(step + kStepWidth);
+    auto s_w = (float *)dpct_local; // CAPACITY floats (scores, then weights) +
+                                    // 32 for the reductions
+    float* red = s_w;                    // red[0..31] live past the scores/weights: see the launch
+    float* w = s_w + 32;
+    const int h = item_ct1.get_group(2);
+    const int d = item_ct1.get_local_id(2);
+    // AN EMPTY SELECTION IS HANDLED HERE, not by a host early return.  The wrapper used to check `n_ids == 0`
+    // and `cudaMemsetAsync` the output, but `n_ids` is a device value now - so the branch has to be on the
+    // device, and this is also the only form a graph can replay: the launch is unconditional and the kernel
+    // decides.  Below the selection bound the selection is the IDENTITY, so `n_ids` is never 0 there; it is
+    // reachable only for a genuinely empty cache, and the reference returns zeros for that.
+    if (n_ids == 0) {
+#pragma unroll
+        for (int i = d; i < head_dim; i += item_ct1.get_local_range(2))
+            attn[(size_t)h * head_dim + i] = 0.0f;
+        return;
+    }
+    const int kv = h / (n_head / n_head_kv);       // ops.cpp L8729: iv2 = iq2 / rv2, NOT h % n_head_kv
+    const float scale = 1.0f / sycl::sqrt((float)head_dim);
+    const int lane = d & 31, wid = d >> 5,
+              nwarp = (int)((item_ct1.get_local_range(2) + 31) >> 5);
+
+    for (long long j = d; j < n_ids; j += item_ct1.get_local_range(2)) {
+        const uint16_t* krow = k_scratch + (j * n_head_kv + kv) * head_dim;
+        float acc = 0.0f;
+#pragma unroll
+        for (int i = 0; i < head_dim; ++i) acc +=
+            h2f(krow[i]) * q[(size_t)h * head_dim + i];
+        w[j] = acc * scale;
+    }
+    /*
+    DPCT1065:827: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    float mx = -FLT_MAX;    // not -inf, whose double -> float conversion nvcc warns about
+#pragma unroll
+    for (long long j = d; j < n_ids; j += item_ct1.get_local_range(2))
+        mx = sycl::fmax(mx, w[j]);
+    mx = warp_max(mx);
+    if (lane == 0) red[wid] = mx;
+    /*
+    DPCT1065:828: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (wid == 0) {
+        mx = (lane < nwarp) ? red[lane] : -FLT_MAX;
+        mx = warp_max(mx);
+        if (lane == 0) red[0] = mx;
+    }
+    /*
+    DPCT1065:829: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    mx = red[0];
+    /*
+    DPCT1065:830: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    float sum = 0.0f;
+    for (long long j = d; j < n_ids; j += item_ct1.get_local_range(2)) {
+        const float e = sycl::native::exp(w[j] - mx);
+        w[j] = e;
+        sum += e;
+    }
+    sum = warp_sum(sum);
+    if (lane == 0) red[wid] = sum;
+    /*
+    DPCT1065:831: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (wid == 0) {
+        sum = (lane < nwarp) ? red[lane] : 0.0f;
+        sum = warp_sum(sum);
+        if (lane == 0) red[0] = 1.0f / sum;
+    }
+    /*
+    DPCT1065:832: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float inv = red[0];
+    /*
+    DPCT1065:833: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    float acc = 0.0f;
+#pragma unroll
+    for (long long j = 0; j < n_ids; ++j)
+        acc += (w[j] * inv) * h2f(v_scratch[(j * n_head_kv + kv) * head_dim + d]);
+    attn[(size_t) h * head_dim + d] = acc;
+    if (weights != nullptr) {
+#pragma unroll
+        for (long long j = d; j < n_ids; j += item_ct1.get_local_range(2))
+            weights[(size_t)h * n_ids + j] = w[j] * inv;
+    }
+}
+
+// ================= 7. qsa_gate_apply =================
+
+__dpct_inline__ void qsa_gate_apply_kernel(const float *__restrict__ attn,
+                                           const float *__restrict__ q_full,
+                                           int n_head, int head_dim,
+                                           uint16_t *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        item_ct1.get_group(2) * (long long)item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= (long long) n_head * head_dim) return;
+    const int h = (int) (i / head_dim), d = (int) (i % head_dim);
+    const double g = (double) q_full[((size_t) h * 2 * head_dim) + head_dim + d];   // the SECOND half
+    const double sig = 1.0 / (1.0 + sycl::exp(-g));
+    out[i] = f16_from_f32((float) ((double) attn[i] * sig));
+}
+
+inline unsigned grid_for(long long n, int threads) {
+    return (unsigned) ((n + threads - 1) / threads);
+}
+
+}  // namespace
+
+/// THE STEP STATE, UPLOADED.  Every kernel below reads its per-token counts from here rather than from a kernel
+/// argument, because a CUDA graph bakes arguments in at capture time - see the long note in `qsa.hpp`.  This
+/// module-level buffer is what lets the OLD host-scalar signatures keep working unchanged while the kernels
+/// already read the device values; the layer will pass its own buffer once it captures.
+///
+/// It is per-PROCESS and reused, which is safe because the upload and the kernel that reads it are on the same
+/// stream and the host is the only writer.  `cudaMemcpyAsync` on the null stream is ordered against the null
+/// stream's kernels, which is what every direct-launch caller here uses.
+namespace {
+
+int32_t *step_scratch() try {
+    static int32_t* d_step = nullptr;
+    if (d_step == nullptr) {
+        if (DPCT_CHECK_ERROR(
+                d_step = (int32_t *)sycl::malloc_device(
+                    qsa_step_bytes(), dpct::get_in_order_queue())) != 0) {
+            std::fprintf(stderr, "qsa: step upload: cudaMalloc failed\n");
+            std::exit(1);
+        }
+    }
+    return d_step;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void step_upload_raw(const int32_t *h_step) try {
+    int32_t* d = step_scratch();
+    /*
+    DPCT1114:835: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            d, h_step, qsa_step_bytes())) != 0) {
+        std::fprintf(stderr, "qsa: step upload: cudaMemcpy failed\n");
+        std::exit(1);
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+/// From a POSITION: fills all four entries.  This is the form the layer will use, and the only form that cannot
+/// produce an inconsistent `n_kv`/`n_bid`/`width`.
+const int32_t* step_upload(int64_t pos, int64_t n_kv_hint, const QsaShapes& s) {
+    int32_t h[kStepCount];
+    qsa_step_fill(h, pos, s);
+    // A caller that also knows `n_kv` is CHECKED against it rather than believed: a disagreement is exactly the
+    // inconsistency `qsa_step_fill` exists to make impossible, so it is worth an exit rather than a silent
+    // preference for one of the two.
+    if (n_kv_hint >= 0 && n_kv_hint != (int64_t) h[kStepNKv]) {
+        std::fprintf(stderr, "qsa: step upload: n_kv %lld disagrees with pos+1 = %d\n", (long long) n_kv_hint,
+                     h[kStepNKv]);
+        std::exit(1);
+    }
+    step_upload_raw(h);
+    return step_scratch();
+}
+
+/// From a WIDTH.  `kv_gather` and `qsa_attend` are handed the selection width directly and never see `pos`, so
+/// only that entry is meaningful for them; the others are set consistently anyway rather than left stale,
+/// because a stale entry is a value the NEXT kernel might read.
+const int32_t* step_upload_width(int64_t width, const QsaShapes& s) {
+    int32_t h[kStepCount];
+    for (int i = 0; i < kStepCount; ++i) h[i] = 0;
+    h[kStepWidth] = (int32_t) width;
+    (void) s;
+    step_upload_raw(h);
+    return step_scratch();
+}
+
+}  // namespace
+
+// ================= THE CAPTURABLE ENTRY POINTS =================
+//
+// These are the REAL implementations: every launch below is sized from a constant capacity and every per-token
+// count comes from `step`.  The host-scalar entry points further down are wrappers that fill a module-level step
+// buffer and forward this token's counts as the capacities.
+
+void kv_append_step(uint16_t* k_pool, uint16_t* v_pool, const int32_t* page_table, const int32_t* step,
+                    const float* kcur, const float* vcur, const QsaShapes& s, void* stream, const KvHostPools* host) {
+    validate(s, "kv_append");
+    if (step == nullptr) fail("kv_append: step is null");
+    // The grid is the head x dim count, which is a CONSTANT - `kv_append` writes one cell.
+    const long long n = s.n_head_kv * s.head_dim;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                KvHostPools host_host_KvHostPools_ct9 =
+                    host ? *host : KvHostPools{};
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class kv_append_kernel_19f129>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid_for(n, THREADS)) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        kv_append_kernel(k_pool, v_pool, page_table, step, kcur,
+                                         vcur, (int)s.n_head_kv,
+                                         (int)s.head_dim, (int)s.page_size,
+                                         host_host_KvHostPools_ct9);
+                    });
+            });
+    }
+    check_launch("kv_append");
+    if (stream == nullptr) check_sync("kv_append");
+}
+
+void qsa_index_step(const float* pooled, const float* q_idx, const float* bias, const QsaShapes& s,
+                    const int32_t* step, int64_t max_blocks, float* cell_scores, void* stream) {
+    validate(s, "qsa_index");
+    if (step == nullptr) fail("qsa_index: step is null");
+    if (max_blocks <= 0) fail("qsa_index: max_blocks must be positive");
+    // THE GRID IS `max_blocks`, A CONSTANT - not this token's `n_bid + 1`.  The kernel returns for
+    // `b > n_bid`, so the surplus blocks cost a launch and nothing else.
+    const int threads = 32 * (int) s.idx_n_head;
+    /*
+    DPCT1049:166: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class qsa_index_kernel_bb65cd>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)max_blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        qsa_index_kernel(pooled, q_idx, bias, (int)s.idx_n_head,
+                                         (int)s.idx_dim, s.idx_block, step,
+                                         cell_scores);
+                    });
+    }
+    check_launch("qsa_index");
+    if (stream == nullptr) check_sync("qsa_index");
+}
+
+void topk_512_step(const float* cell_scores, const QsaShapes& s, int64_t cap, const int32_t* step,
+                   int32_t* ids, void* stream) {
+    validate(s, "topk_512");
+    if (step == nullptr) fail("topk_512: step is null");
+    // `cap` is checked against the GEOMETRY'S largest possible width rather than this token's, because this
+    // token's is a device value.  The two are the same guarantee: `width = min(n_kv, top_k + r - 1)` and
+    // `n_kv <= kTopkMaxCells`, so this is the most the kernel can ever write.
+    const int64_t width_max = qsa_selection_width(kTopkMaxCells, s);
+    if (cap < width_max) {
+        std::fprintf(stderr, "qsa: topk_512: cap %lld < the largest possible selection width %lld\n",
+                     (long long) cap, (long long) width_max);
+        std::exit(1);
+    }
+    // One block, so the launch is already constant; the kernel reads `n_kv` and `width` from `step`.
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class topk_kernel_97d5c9>>(
+                sycl::nd_range<3>(sycl::range(1, 1, TOPK_THREADS),
+                                  sycl::range(1, 1, TOPK_THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    topk_kernel(cell_scores, step, ids);
+                });
+    }
+    check_launch("topk_512");
+    if (stream == nullptr) check_sync("topk_512");
+}
+
+void kv_gather_step(const uint16_t* k_pool, const uint16_t* v_pool, const int32_t* page_table,
+                    const int32_t* ids, const int32_t* step, int64_t max_ids, const QsaShapes& s,
+                    uint16_t* k_scratch, uint16_t* v_scratch, void* stream) {
+    validate(s, "kv_gather");
+    if (step == nullptr) fail("kv_gather: step is null");
+    if (max_ids <= 0) return;
+    // THE GRID IS THE CAPACITY.  The kernel reads the real `n_ids` from `step` and its `if (i >= total) return;`
+    // guard leaves the surplus threads idle.
+    const long long total = max_ids * s.n_head_kv * (s.head_dim / 4);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class kv_gather_kernel_3473e7>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(total, 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    kv_gather_kernel(k_pool, v_pool, page_table, ids, step,
+                                     (int)s.n_head_kv, (int)s.head_dim,
+                                     (int)s.page_size, k_scratch, v_scratch);
+                });
+    }
+    check_launch("kv_gather");
+    if (stream == nullptr) check_sync("kv_gather");
+}
+
+void qsa_attend_step(const float *q, const uint16_t *k_scratch,
+                     const uint16_t *v_scratch, const int32_t *step,
+                     int64_t max_ids, const QsaShapes &s, float *attn,
+                     float *weights, void *stream) try {
+    validate(s, "qsa_attend");
+    if (step == nullptr) fail("qsa_attend: step is null");
+    if (max_ids <= 0) fail("qsa_attend: max_ids must be positive");
+    // THE SHARED SIZE IS THE CAPACITY.  Shared memory is part of the LAUNCH CONFIGURATION, so sizing it from
+    // this token's `n_ids` bakes the sequence length in: a captured layer would allocate room for token 1 and
+    // then index past it at token 500.  The kernel reads the real count from `step`, so a larger allocation is
+    // exactly what it wants.  The opt-in therefore happens once, for the capacity.
+    /*
+    DPCT1083:168: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (size_t)(max_ids + 32) * sizeof(float);
+    // per DEVICE: the opt-in is a device setting (a layer split runs this on two cards)
+    static size_t s_configured_dev[64] = {};
+    int cur_dev = 0;
+    cur_dev = dpct::get_current_device_id();
+    size_t& s_configured = s_configured_dev[(cur_dev >= 0 && cur_dev < 64) ? cur_dev : 0];
+    if (smem > s_configured) {
+        int dev = 0, max_shared = 0;
+        dev = dpct::get_current_device_id();
+        /*
+        DPCT1019:836: local_mem_size in SYCL is not a complete equivalent of
+        cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
+        the code.
+        */
+        max_shared = dpct::get_device(dev).get_local_mem_size();
+        if ((int) smem > max_shared) {
+            std::fprintf(stderr, "qsa: qsa_attend: max_ids %lld needs %zu B of shared, over the %d B limit\n",
+                         (long long) max_ids, smem, max_shared);
+            std::exit(1);
+        }
+        const dpct::err0 e =
+            /*
+            DPCT1027:837: The call to cudaFuncSetAttribute was replaced with 0
+            because SYCL currently does not support corresponding setting.
+            */
+            0;
+
+        s_configured = smem;
+    }
+    /*
+    DPCT1049:167: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class qsa_attend_kernel_6a355d>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 1, (unsigned)s.n_head) *
+                            sycl::range(1, 1, (unsigned)s.head_dim),
+                        sycl::range(1, 1, (unsigned)s.head_dim)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        qsa_attend_kernel(
+                            q, k_scratch, v_scratch, step, (int)s.n_head,
+                            (int)s.n_head_kv, (int)s.head_dim, attn, weights,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    check_launch("qsa_attend");
+    if (stream == nullptr) check_sync("qsa_attend");
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// ================= host entry points =================
+
+void qsa_step_fill(int32_t* host_step, int64_t pos, const QsaShapes& s) {
+    if (host_step == nullptr) return;
+    if (pos < 0) fail("qsa_step_fill: pos < 0");
+    // ONE PLACE COMPUTES ALL FOUR, which is the whole reason the step state is a BUFFER rather than four
+    // separate parameters.  `n_kv`, `n_bid` and `width` are DERIVED from `pos`, so a caller filling them in
+    // itself could fill them inconsistently - and `qsa_index`'s host guard against exactly that inconsistency
+    // now has a single writer to check against instead of two independent arguments.
+    //
+    // This is the form the LAYER will use: every value a QSA kernel needs derives from one position, so one
+    // H2D per token updates all of them and no entry point takes a per-token scalar.
+    const int64_t n_kv = pos + 1;
+    host_step[kStepPos] = (int32_t) pos;
+    host_step[kStepNKv] = (int32_t) n_kv;
+    host_step[kStepNBid] = (int32_t) (n_kv / s.idx_block);
+    host_step[kStepWidth] = (int32_t) qsa_selection_width(n_kv, s);
+}
+
+void kv_append(uint16_t* k_pool, uint16_t* v_pool, const int32_t* page_table, int64_t pos,
+               const float* kcur, const float* vcur, const QsaShapes& s, void* stream) {
+    if (pos < 0) { validate(s, "kv_append"); fail("kv_append: pos < 0"); }
+    kv_append_step(k_pool, v_pool, page_table, step_upload(pos, -1, s), kcur, vcur, s, stream);
+}
+
+void indexer_key_append(const float* raw, const int32_t* pos_dev, int32_t pos_base, const float* w_k_norm,
+                        float eps, const QsaIndexerBuffers& b, const QsaShapes& s, const float* cos_tab,
+                        const float* sin_tab, void* stream) {
+    validate(s, "indexer_key_append");
+    if (pos_dev == nullptr) fail("indexer_key_append: pos_dev is null");
+    if (b.tail == nullptr || b.dead == nullptr || b.pooled == nullptr || b.block_pos == nullptr)
+        fail("indexer_key_append: the indexer buffers are not all set (tail/dead/pooled/block_pos)");
+    const int threads = (int) s.idx_dim;
+    /*
+    DPCT1083:170: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (size_t)s.idx_dim * sizeof(double);
+    // **ONE LAUNCH, NO HOST BRANCH ON THE POSITION.**  The completion rotation is inside the kernel now.  The
+    // arguments here are identical for every token, which is the property a CUDA graph needs: this function can
+    // be captured and replayed, and the position arrives through `pos_dev` like every other kernel's data.
+    /*
+    DPCT1049:169: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                auto mrope_table_ct14 = mrope_table();
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class indexer_key_append_kernel_9e74e0>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, threads),
+                                      sycl::range(1, 1, threads)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        indexer_key_append_kernel(
+                            raw, pos_dev, (int)pos_base, w_k_norm, eps, b.tail,
+                            b.dead, b.pooled, b.block_pos, (int)s.idx_dim,
+                            (int)s.idx_block, (int)s.n_rot, cos_tab, sin_tab,
+                            mrope_table_ct14,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    check_launch("indexer_key_append");
+    if (stream == nullptr) check_sync("indexer_key_append");
+}
+
+void qsa_index(const float* pooled, int64_t n_bid, const float* q_idx, const float* bias, const QsaShapes& s,
+               int64_t n_kv, float* cell_scores, void* stream) {
+    validate(s, "qsa_index");
+    if (n_bid < 0 || n_kv <= 0) fail("qsa_index: n_bid < 0 or n_kv <= 0");
+    // `n_kv`, `n_bid` and `width` are DERIVED from one position, so this refuses a caller whose two arguments
+    // disagree rather than launching a kernel that would score the wrong number of blocks.
+    if ((n_kv / s.idx_block) != n_bid) {
+        std::fprintf(stderr, "qsa: qsa_index: n_bid %lld is not n_kv %lld / r %lld\n", (long long) n_bid,
+                     (long long) n_kv, (long long) s.idx_block);
+        std::exit(1);
+    }
+    // THIS TOKEN'S counts as the CAPACITIES: correct for a direct launch, WRONG in a graph.  The layer passes a
+    // constant `max_blocks` from its state instead - see the note in `qsa.hpp`.
+    qsa_index_step(pooled, q_idx, bias, s, step_upload(n_kv - 1, n_kv, s), n_bid + 1, cell_scores, stream);
+}
+
+void topk_512(const float* cell_scores, int64_t n_kv, const QsaShapes& s, int64_t cap, int32_t* ids,
+              void* stream) {
+    validate(s, "topk_512");
+    if (n_kv <= 0) return;
+    if (n_kv > kTopkMaxCells) {
+        std::fprintf(stderr, "qsa: topk_512: n_kv %lld > kTopkMaxCells %lld (one block; phase 3 replaces this)\n",
+                     (long long) n_kv, (long long) kTopkMaxCells);
+        std::exit(1);
+    }
+    topk_512_step(cell_scores, s, cap, step_upload(n_kv - 1, n_kv, s), ids, stream);
+}
+
+void kv_gather(const uint16_t* k_pool, const uint16_t* v_pool, const int32_t* page_table, const int32_t* ids,
+               int64_t n_ids, const QsaShapes& s, uint16_t* k_scratch, uint16_t* v_scratch, void* stream) {
+    validate(s, "kv_gather");
+    if (n_ids <= 0) return;
+    kv_gather_step(k_pool, v_pool, page_table, ids, step_upload_width(n_ids, s), n_ids, s, k_scratch,
+                   v_scratch, stream);
+}
+
+void qsa_attend(const float* q, const uint16_t* k_scratch, const uint16_t* v_scratch, int64_t n_ids,
+                const QsaShapes& s, float* attn, float* weights, void* stream) {
+    validate(s, "qsa_attend");
+    if (n_ids < 0) fail("qsa_attend: n_ids < 0");
+    if (n_ids == 0) {
+        // The empty selection goes through the kernel's own zero path; `max_ids` must still be positive, so the
+        // wrapper gives it the geometry's capacity rather than 0.
+        qsa_attend_step(q, k_scratch, v_scratch, step_upload_width(0, s),
+                        qsa_selection_width(kTopkMaxCells, s), s, attn, weights, stream);
+        return;
+    }
+    qsa_attend_step(q, k_scratch, v_scratch, step_upload_width(n_ids, s), n_ids, s, attn, weights, stream);
+}
+
+/// The same multiply as `qsa_gate_apply_kernel` WITHOUT the fp16 round - see the header for why the caller
+/// whose weight is a K-quant needs the f32 form.  Identical arithmetic up to the last step.
+__dpct_inline__ void qsa_gate_apply_f32_kernel(const float *__restrict__ attn,
+                                               const float *__restrict__ q_full,
+                                               int n_head, int head_dim,
+                                               float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        item_ct1.get_group(2) * (long long)item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= (long long) n_head * head_dim) return;
+    const int h = (int) (i / head_dim), d = (int) (i % head_dim);
+    const double g = (double) q_full[((size_t) h * 2 * head_dim) + head_dim + d];   // the SECOND half
+    const double sig = 1.0 / (1.0 + sycl::exp(-g));
+    out[i] = (float) ((double) attn[i] * sig);
+}
+
+void qsa_gate_apply_f32(const float* attn, const float* q_full, const QsaShapes& s, float* out, void* stream) {
+    validate(s, "qsa_gate_apply_f32");
+    const long long n = s.n_head * s.head_dim;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class qsa_gate_apply_f32_kernel_7cff4f>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n, 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    qsa_gate_apply_f32_kernel(attn, q_full, (int)s.n_head,
+                                              (int)s.head_dim, out);
+                });
+    }
+    check_launch("qsa_gate_apply_f32");
+    if (stream == nullptr) check_sync("qsa_gate_apply_f32");
+}
+
+void qsa_gate_apply(const float* attn, const float* q_full, const QsaShapes& s, uint16_t* out, void* stream) {
+    validate(s, "qsa_gate_apply");
+    const long long n = s.n_head * s.head_dim;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class qsa_gate_apply_kernel_650dec>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid_for(n, 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    qsa_gate_apply_kernel(attn, q_full, (int)s.n_head,
+                                          (int)s.head_dim, out);
+                });
+    }
+    check_launch("qsa_gate_apply");
+    if (stream == nullptr) check_sync("qsa_gate_apply");
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
new file mode 100644
index 00000000000..b1ce2fb3541
--- /dev/null
+++ b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
@@ -0,0 +1,466 @@
+// src/kernels/cuda/qsa_decode_attn.cu - see include/strata/kernels/qsa_decode_attn.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/kv_q4.hpp"
+
+#include <cfloat>
+#include <cstdio>
+#include <cstdlib>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int HD = 256;          // head_dim
+constexpr int G = 12;            // query heads per KV head (24 / 2)
+constexpr int CHUNK = 64;        // cells per block
+constexpr int THREADS = 256;
+constexpr int WARPS = THREADS / 32;
+
+__dpct_inline__ float warp_sum(float v) {
+#pragma unroll
+    /*
+    DPCT1108:85: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            o);
+    return v;
+}
+__dpct_inline__ float warp_max(float v) {
+#pragma unroll
+    /*
+    DPCT1108:86: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v = sycl::fmax(
+        v, dpct::experimental::permute_sub_group_by_xor(
+               0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+               v, o));
+    return v;
+}
+
+// 8 consecutive values of one cell's key or value row for KV head `kvh`, dimensions [d0, d0+8).
+template <int KV_MODE>
+__dpct_inline__ void load8(const QsaAttnPools &p, bool value, long long row,
+                           int d0, float *out) {
+    if constexpr (KV_MODE == 0) {
+        const uint16_t* base = (value ? p.v_pool : p.k_pool) + row * HD + d0;
+        const sycl::uint4 raw = *reinterpret_cast<const sycl::uint4 *>(base);
+        const sycl::half2 *h2 = reinterpret_cast<const sycl::half2 *>(&raw);
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const sycl::float2 f =
+                h2[j].template convert<float, sycl::rounding_mode::automatic>();
+            out[2 * j] = f.x();
+            out[2 * j + 1] = f.y();
+        }
+    } else if constexpr (KV_MODE == 1) {
+        const int8_t* codes = (value ? p.v_q : p.k_q) + row * HD + d0;
+        const uint16_t sbits = (value ? p.v_scale : p.k_scale)[row * (HD / KV_Q8_GROUP) + d0 / KV_Q8_GROUP];
+        const float sc =
+            sycl::vec<sycl::half, 1>(
+                sycl::bit_cast<sycl::half, unsigned short>(sbits))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        const sycl::uint2 raw = *reinterpret_cast<const sycl::uint2 *>(codes);
+        const int8_t* c = reinterpret_cast<const int8_t*>(&raw);
+#pragma unroll
+        for (int j = 0; j < 8; ++j) out[j] = (float) c[j] * sc;
+    } else {
+        constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
+        const int b = d0 / QK4_0;
+        const int rem = d0 % QK4_0;
+        const block_q4_0* blk = reinterpret_cast<const block_q4_0*>((value ? p.v_q4 : p.k_q4) + row * bytes_per_head) + b;
+        const float d =
+            sycl::vec<sycl::half, 1>(
+                sycl::bit_cast<sycl::half, unsigned short>(blk->d))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        const int j = (rem == 0 || rem == 16) ? 0 : 8;
+        const uint8_t* bytes = blk->qs + j;
+        if (rem < 16) {
+#pragma unroll
+            for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] & 0x0F) - 8) * d;
+        } else {
+#pragma unroll
+            for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] >> 4) - 8) * d;
+        }
+    }
+}
+
+template <int KV_MODE>
+/*
+DPCT1110:87: The total declared local variable size in device function
+attn_chunk_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
+                  const int32_t *__restrict__ ids,
+                  const int32_t *__restrict__ step, int n_kv_heads,
+                  int page_size, float scale, float *__restrict__ part_acc,
+                  float *__restrict__ part_m, float *__restrict__ part_l,
+                  int n_chunks, int cap = 0, long long scratch_stride = 0) {
+    // batched form: query blockIdx.z, with its own q row, selection, step and scratch
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    q += (size_t)item_ct1.get_group(0) * (size_t)(n_kv_heads * G) * HD;
+    ids += (size_t)item_ct1.get_group(0) * (size_t)cap;
+    step += (size_t)item_ct1.get_group(0) * kStepCount;
+    part_acc += (size_t)item_ct1.get_group(0) * (size_t)scratch_stride;
+    part_m += (size_t)item_ct1.get_group(0) * (size_t)scratch_stride;
+    part_l += (size_t)item_ct1.get_group(0) * (size_t)scratch_stride;
+    auto &sq =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[G][HD]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // 12 KB: this KV head's query heads
+    auto &sp =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[G][CHUNK]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // scores, then probabilities
+    auto &srow =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<long long[CHUNK]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // pool row of each cell (page, kv head, slot)
+    /*
+    DPCT1098:447: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const int n_ids = *(step + kStepWidth);
+    const int chunk = item_ct1.get_group(2), kvh = item_ct1.get_group(1);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int c0 = chunk * CHUNK;
+    const int n_here = sycl::min(CHUNK, n_ids - c0);
+    const int slot = kvh * n_chunks + chunk;
+    if (n_here <= 0) {
+        if (t < G) { part_m[slot * G + t] = -FLT_MAX; part_l[slot * G + t] = 0.0f; }
+        return;
+    }
+#pragma unroll
+    for (int i = t; i < G * HD; i += THREADS)
+        sq[i / HD][i % HD] = q[(size_t)(kvh * G) * HD + i];
+    if (t < CHUNK) {
+        long long r = -1;
+        if (t < n_here) {
+            const int cell = ids[c0 + t];
+            const long long page = (long long) p.page_table[cell / page_size];
+            r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+        }
+        srow[t] = r;
+    }
+    /*
+    DPCT1065:448: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // scores: each warp takes cells warp, warp+8, ...; each lane holds 8 of the 256 dimensions.
+    for (int c = warp; c < CHUNK; c += WARPS) {
+        if (c >= n_here) {
+            if (lane < G) sp[lane][c] = -FLT_MAX;
+            continue;
+        }
+        float k8[8];
+        load8<KV_MODE>(p, false, srow[c], lane * 8, k8);
+#pragma unroll
+        for (int h = 0; h < G; ++h) {
+            const sycl::float4 qa =
+                *reinterpret_cast<const sycl::float4 *>(&sq[h][lane * 8]);
+            const sycl::float4 qb =
+                *reinterpret_cast<const sycl::float4 *>(&sq[h][lane * 8 + 4]);
+            float s = k8[0] * qa.x() + k8[1] * qa.y() + k8[2] * qa.z() +
+                      k8[3] * qa.w() + k8[4] * qb.x() + k8[5] * qb.y() +
+                      k8[6] * qb.z() + k8[7] * qb.w();
+            s = warp_sum(s);
+            if (lane == 0) sp[h][c] = s * scale;
+        }
+    }
+    /*
+    DPCT1065:449: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // per-head chunk max and exp-sum: warp w handles heads w and w+8.
+    for (int h = warp; h < G; h += WARPS) {
+        const float a = sp[h][lane], b = sp[h][lane + 32];
+        const float m = warp_max(sycl::fmax(a, b));
+        const float ea = (lane < n_here) ? sycl::native::exp(a - m) : 0.0f;
+        const float eb = (lane + 32 < n_here) ? sycl::native::exp(b - m) : 0.0f;
+        sp[h][lane] = ea;
+        sp[h][lane + 32] = eb;
+        const float l = warp_sum(ea + eb);
+        if (lane == 0) { part_m[slot * G + h] = m; part_l[slot * G + h] = l; }
+    }
+    /*
+    DPCT1065:450: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    // values: thread t owns dimension t for all 12 heads.
+    float acc[G];
+#pragma unroll
+    for (int h = 0; h < G; ++h) acc[h] = 0.0f;
+    for (int c = 0; c < n_here; ++c) {
+        float v;
+        if constexpr (KV_MODE == 0) {
+            v = sycl::vec<sycl::half, 1>(
+                    sycl::bit_cast<sycl::half, unsigned short>(
+                        p.v_pool[srow[c] * HD + t]))
+                    .convert<float, sycl::rounding_mode::automatic>()[0];
+        } else if constexpr (KV_MODE == 1) {
+            const float sc =
+                sycl::vec<sycl::half, 1>(
+                    sycl::bit_cast<sycl::half, unsigned short>(
+                        p.v_scale[srow[c] * (HD / KV_Q8_GROUP) +
+                                  t / KV_Q8_GROUP]))
+                    .convert<float, sycl::rounding_mode::automatic>()[0];
+            v = (float) p.v_q[srow[c] * HD + t] * sc;
+        } else {
+            constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
+            const int b = t / QK4_0;
+            const int rem = t % QK4_0;
+            const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + srow[c] * bytes_per_head) + b;
+            const float d =
+                sycl::vec<sycl::half, 1>(
+                    sycl::bit_cast<sycl::half, unsigned short>(blk->d))
+                    .convert<float, sycl::rounding_mode::automatic>()[0];
+            const int j = rem < 16 ? rem : (rem - 16);
+            const uint8_t byte = blk->qs[j];
+            const int nibble = (rem < 16) ? ((byte & 0x0F) - 8) : ((byte >> 4) - 8);
+            v = (float) nibble * d;
+        }
+#pragma unroll
+        for (int h = 0; h < G; ++h) acc[h] = sycl::fma(sp[h][c], v, acc[h]);
+    }
+#pragma unroll
+    for (int h = 0; h < G; ++h) part_acc[((size_t) slot * G + h) * HD + t] = acc[h];
+}
+
+__dpct_inline__ void attn_merge_kernel(const float *__restrict__ part_acc,
+                                       const float *__restrict__ part_m,
+                                       const float *__restrict__ part_l,
+                                       int n_chunks, float *__restrict__ attn,
+                                       long long scratch_stride = 0) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    part_acc += (size_t)item_ct1.get_group(1) * (size_t)scratch_stride;
+    part_m += (size_t)item_ct1.get_group(1) * (size_t)scratch_stride;
+    part_l += (size_t)item_ct1.get_group(1) * (size_t)scratch_stride;
+    attn += (size_t)item_ct1.get_group(1) *
+            (size_t)item_ct1.get_group_range(2) * HD;
+    const int h = item_ct1.get_group(2); // global query head
+    const int kvh = h / G, hl = h % G;
+    const int d = item_ct1.get_local_id(2);
+    float M = -FLT_MAX;
+#pragma unroll
+    for (int c = 0; c < n_chunks; ++c)
+        M = sycl::fmax(M, part_m[(kvh * n_chunks + c) * G + hl]);
+    float L = 0.0f, acc = 0.0f;
+    for (int c = 0; c < n_chunks; ++c) {
+        const int slot = kvh * n_chunks + c;
+        const float m = part_m[slot * G + hl];
+        if (m == -FLT_MAX) continue;
+        const float w = sycl::native::exp(m - M);
+        L = sycl::fma((float)(part_l[slot * G + hl]), (float)w, L);
+        acc = sycl::fma((float)(part_acc[((size_t)slot * G + hl) * HD + d]),
+                        (float)w, acc);
+    }
+    attn[(size_t) h * HD + d] = L > 0.0f ? acc / L : 0.0f;
+}
+
+}  // namespace
+
+void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps,
+                           int64_t cap, const QsaShapes& s, float* scratch, float* attn, int64_t n_q, void* stream) {
+    if (n_q <= 0) return;
+    if (s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !scratch || !ids || !steps ||
+        !pools.page_table || n_q > 65535) {
+        std::fprintf(stderr, "qsa_decode_attn_batch: unsupported geometry or missing buffers (head_dim %lld want %d, "
+                     "n_head %lld, n_head_kv %lld, cap %lld, n_q %lld, scratch %d ids %d steps %d page_table %d)\n",
+                     (long long) s.head_dim, HD, (long long) s.n_head, (long long) s.n_head_kv, (long long) cap,
+                     (long long) n_q, scratch != nullptr, ids != nullptr, steps != nullptr, pools.page_table != nullptr);
+        std::exit(1);
+    }
+    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr ? 1 : 0);
+    const int n_chunks = (int) ((cap + CHUNK - 1) / CHUNK);
+    // per query: [acc: n_chunks*n_head*HD][m: n_chunks*n_head][l: n_chunks*n_head], all offsets from one stride
+    const long long stride = (long long) qsa_decode_attn_scratch_floats(cap, s);
+    float* part_acc = scratch;
+    float* part_m = scratch + (size_t) n_chunks * s.n_head * HD;
+    float* part_l = part_m + (size_t) n_chunks * s.n_head;
+    const float scale = 1.0f / sqrtf((float) HD);
+    const dpct::dim3 grid((unsigned)n_chunks, (unsigned)s.n_head_kv,
+                          (unsigned)n_q);
+    dpct::queue_ptr st = strata::q_of(stream);
+    if (kv_mode == 2)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_411f11,
+                                          dpct_kernel_scalar<2>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<2>(q, pools, ids, steps, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, (int)cap, stride);
+            });
+    } else if (kv_mode == 1)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_5a54ec,
+                                          dpct_kernel_scalar<1>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<1>(q, pools, ids, steps, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, (int)cap, stride);
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_d59020,
+                                          dpct_kernel_scalar<0>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<0>(q, pools, ids, steps, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, (int)cap, stride);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_ed01b1>>(
+            sycl::nd_range<3>(
+                sycl::range(1, (unsigned)n_q, (unsigned)s.n_head) *
+                    sycl::range(1, 1, HD),
+                sycl::range(1, 1, HD)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                attn_merge_kernel(part_acc, part_m, part_l, n_chunks, attn,
+                                  stride);
+            });
+    }
+    /*
+    DPCT1010:451: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+uint64_t qsa_decode_attn_scratch_floats(int64_t cap, const QsaShapes& s) {
+    const int64_t chunks = (cap + CHUNK - 1) / CHUNK;
+    return (uint64_t) chunks * (uint64_t) s.n_head * (HD + 2) + 64;
+}
+
+void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* step,
+                          int64_t cap, const QsaShapes& s, float* scratch, float* attn, void* stream) {
+    if (s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !scratch || !ids || !step ||
+        !pools.page_table) {
+        std::fprintf(stderr, "qsa_decode_attn: unsupported geometry or missing buffers\n");
+        std::exit(1);
+    }
+    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr ? 1 : 0);
+    if (kv_mode == 2 ? (!pools.v_q4) : (kv_mode == 1 ? (!pools.v_q || !pools.k_scale || !pools.v_scale) : (!pools.k_pool || !pools.v_pool))) {
+        std::fprintf(stderr, "qsa_decode_attn: incomplete KV pools\n");
+        std::exit(1);
+    }
+    const int n_chunks = (int) ((cap + CHUNK - 1) / CHUNK);
+    float* part_acc = scratch;
+    float* part_m = scratch + (size_t) n_chunks * s.n_head * HD;
+    float* part_l = part_m + (size_t) n_chunks * s.n_head;
+    const float scale = 1.0f / sqrtf((float) HD);
+    const dpct::dim3 grid((unsigned)n_chunks, (unsigned)s.n_head_kv);
+    dpct::queue_ptr st = strata::q_of(stream);
+    if (kv_mode == 2)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_bd420a,
+                                          dpct_kernel_scalar<2>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<2>(q, pools, ids, step, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, 0, 0);
+            });
+    } else if (kv_mode == 1)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_19615d,
+                                          dpct_kernel_scalar<1>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<1>(q, pools, ids, step, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, 0, 0);
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_bf0626,
+                                          dpct_kernel_scalar<0>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<0>(q, pools, ids, step, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, 0, 0);
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_814186>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)s.n_head) *
+                                  sycl::range(1, 1, HD),
+                              sycl::range(1, 1, HD)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                attn_merge_kernel(part_acc, part_m, part_l, n_chunks, attn, 0);
+            });
+    }
+    /*
+    DPCT1010:453: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
new file mode 100644
index 00000000000..ea2c21be4d4
--- /dev/null
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -0,0 +1,1169 @@
+// src/kernels/cuda/qsa_prompt_attn.cu - see include/strata/kernels/qsa_prompt_attn.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/qsa_prompt_attn.hpp"
+#include "strata/kernels/kv_q8.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+#include <type_traits>
+#include <cmath>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int HD = 256;           // head_dim
+constexpr int G = 12;             // query heads per KV head
+#ifndef D1_CH
+#define D1_CH 32
+#endif
+constexpr int CH = D1_CH;         // cells per chunk
+constexpr int THREADS = 128;      // 4 warps: scores by cell (8 each), p.v by dimension (64 each = one int8 scale group)
+constexpr int QS = HD + 8;        // q row stride in halves (bank-conflict-free fragment loads)
+
+// The MMA and cp.async below need sm_80. Builds for older cards (the experimental sm_75 one) compile them to a trap;
+// qsa_prompt_attn_batch refuses such a device at run time, so the old kernel runs there.
+#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
+#define STRATA_PA_SM80 1
+#else
+#define STRATA_PA_SM80 0
+#endif
+
+__dpct_inline__ void mma16816(float *c, const uint32_t *a, const uint32_t *b) {
+#if !STRATA_PA_SM80
+    /* unreachable on SYCL: the launcher refuses this device */
+#else
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("mma.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 "
+                 "{%0,%1,%2,%3}, {%4,%5,%6,%7}, {%8,%9}, "
+                 "{%0,%1,%2,%3};\n"
+                 : "+f"(c[0]), "+f"(c[1]), "+f"(c[2]), "+f"(c[3])
+                 : "r"(a[0]), "r"(a[1]), "r"(a[2]), "r"(a[3]), "r"(b[0]),
+                   "r"(b[1]));
+#else
+    {
+        volatile void *d_mat_frag_ct1[4] = {&c[0], &c[1], &c[2], &c[3]};
+        sycl::vec<uint32_t, 4> a_mat_frag_ct1(a[0], a[1], a[2], a[3]);
+        sycl::vec<uint32_t, 2> b_mat_frag_ct1(b[0], b[1]);
+        sycl::vec<float, 4> c_mat_frag_ct1(c[0], c[1], c[2], c[3]);
+        dpct::experimental::matrix::mma<16, 8, 16, sycl::half, float>(
+            reinterpret_cast<volatile void **>(d_mat_frag_ct1), &a_mat_frag_ct1,
+            &b_mat_frag_ct1, &c_mat_frag_ct1);
+    }
+#endif
+#endif
+}
+
+// Two int8 codes (low byte first) as an exact half2: 1024 + (c + 128) built in the mantissa, minus 1152.
+__dpct_inline__ uint32_t i8x2_to_h2(uint32_t x) {
+    uint32_t y = ((x & 0xffu) | ((x & 0xff00u) << 8)) ^ 0x00800080u;
+    y |= 0x64006400u;
+    sycl::half2 h = *reinterpret_cast<sycl::half2 *>(&y);
+    h = h - sycl::half2(
+                sycl::vec<float, 1>(1152.f)
+                    .convert<sycl::half, sycl::rounding_mode::automatic>()[0],
+                sycl::vec<float, 1>(1152.f)
+                    .convert<sycl::half, sycl::rounding_mode::automatic>()[0]);
+    return *reinterpret_cast<uint32_t*>(&h);
+}
+
+__dpct_inline__ uint32_t pack_h2(float lo_k,
+                                 float hi_k) { // element k in the low half
+    sycl::half2 h = sycl::float2(lo_k, hi_k)
+                        .convert<sycl::half, sycl::rounding_mode::rte>();
+    return *reinterpret_cast<uint32_t*>(&h);
+}
+
+// KV_MODE 1: int8 codes + fp16 scale per 64 values. KV_MODE 0: fp16 values (scales 1).
+template <int KV_MODE>
+struct Smem {
+    using Elem =
+        typename std::conditional<KV_MODE == 1, int8_t, sycl::half>::type;
+    static constexpr int ROW = KV_MODE == 1 ? HD + 16 : HD + 8;   // elements; 16-byte aligned rows, banks spread
+    sycl::half qh[16][QS];
+    sycl::half ql[16][QS];
+    Elem k[CH][ROW];
+    Elem v[CH][ROW];
+    float ks[CH][4];
+    float vs[CH][4];
+    float s[16][CH + 1];
+    float qmax[THREADS / 32];
+    float alpha[16];
+    float lsum[16];
+    float mrow[16];
+    long long row[CH];
+};
+
+template <int KV_MODE>
+/*
+DPCT1110:134: The total declared local variable size in device function
+prompt_attn_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
+                   const int32_t *__restrict__ ids,
+                   const int32_t *__restrict__ steps, int n_kv_heads,
+                   int page_size, float scale_log2, float *__restrict__ attn,
+                   int cap, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto smem_raw = (unsigned char *)dpct_local;
+    Smem<KV_MODE>& S = *reinterpret_cast<Smem<KV_MODE>*>(smem_raw);
+    const int qi = item_ct1.get_group(2), kvh = item_ct1.get_group(1);
+    const int n_head = n_kv_heads * G;
+    q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    ids += (size_t) qi * cap;
+    /*
+    DPCT1098:727: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const int n = *(steps + (size_t)qi * kStepCount + kStepWidth);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int gid = lane >> 2, tig = lane & 3;
+
+    // q: 12 heads + 4 zero rows, scaled by a power of two that puts its largest value near 2^14 (exact, and the
+    // lo halves stay out of FP16's subnormal range), then split into hi + lo halves
+    float qm = 0.0f;
+#pragma unroll
+    for (int i = t; i < G * HD; i += THREADS)
+        qm = sycl::fmax(qm, sycl::fabs(q[i]));
+#pragma unroll
+    /*
+    DPCT1108:135: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) qm = sycl::fmax(
+        qm, dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                qm, o));
+    if (lane == 0) S.qmax[warp] = qm;
+    /*
+    DPCT1065:733: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    qm = sycl::fmax(sycl::fmax(S.qmax[0], S.qmax[1]),
+                    sycl::fmax(S.qmax[2], S.qmax[3]));
+    int qe = 0;
+    /*
+    DPCT1017:728: The sycl::frexp call is used instead of the frexpf call. These
+    two calls do not provide exactly the same functionality. Check the potential
+    precision and/or performance issues for the generated code.
+    */
+    if (qm > 0.0f) sycl::frexp(
+        qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
+                                     sycl::access::decorated::yes>(
+                &qe)); // qm < 2^qe
+    const float qup = sycl::ldexp(1.0f, 14 - qe),
+                qdown = sycl::ldexp(scale_log2, qe - 14);
+    for (int i = t; i < 16 * HD; i += THREADS) {
+        const int h = i / HD, d = i % HD;
+        const float x = h < G ? q[(size_t) h * HD + d] * qup : 0.0f;
+        const sycl::half hi =
+            sycl::vec<float, 1>(x)
+                .convert<sycl::half, sycl::rounding_mode::rte>()[0];
+        S.qh[h][d] = hi;
+        S.ql[h][d] =
+            sycl::vec<float, 1>(
+                x - sycl::vec<sycl::half, 1>(hi)
+                        .convert<float, sycl::rounding_mode::automatic>()[0])
+                .convert<sycl::half, sycl::rounding_mode::rte>()[0];
+    }
+    if (t < 16) {
+        S.mrow[t] = -sycl::bit_cast<float, int>(0x7f800000U); S.lsum[t] = 0.0f;
+    }
+
+    float acc[8][4];
+#pragma unroll
+    for (int j = 0; j < 8; ++j) acc[j][0] = acc[j][1] = acc[j][2] = acc[j][3] = 0.0f;
+
+    for (int c0 = 0; c0 < n; c0 += CH) {
+        const int nh = sycl::min(CH, n - c0);
+        if (t < CH) {
+            long long r = -1;
+            if (t < nh) {
+                const int cell = ids[c0 + t];
+                const long long page = (long long) p.page_table[cell / page_size];
+                r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+            }
+            S.row[t] = r;
+        }
+        /*
+        DPCT1118:136: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:735: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier(); // rows ready; the previous chunk's p.v is done with
+                            // k, v, s
+        // gather the chunk's K and V rows (16-byte pieces) and their scales
+        {
+            constexpr int PIECES = HD * (int) sizeof(typename Smem<KV_MODE>::Elem) / 16;   // per row
+            for (int i = t; i < CH * PIECES; i += THREADS) {
+                const int c = i / PIECES, pc = i % PIECES;
+                const long long r = S.row[c];
+                sycl::uint4 kx = sycl::uint4(0, 0, 0, 0), vx = kx;
+                if (r >= 0) {
+                    if constexpr (KV_MODE == 1) {
+                        /*
+                        DPCT1098:729: The '*' expression is used instead of the
+                        __ldg call. These two expressions do not provide the
+                        exact same functionality. Check the generated code for
+                        potential precision and/or performance issues.
+                        */
+                        kx = *(reinterpret_cast<const sycl::uint4 *>(p.k_q +
+                                                                     r * HD) +
+                               pc);
+                        /*
+                        DPCT1098:730: The '*' expression is used instead of the
+                        __ldg call. These two expressions do not provide the
+                        exact same functionality. Check the generated code for
+                        potential precision and/or performance issues.
+                        */
+                        vx = *(reinterpret_cast<const sycl::uint4 *>(p.v_q +
+                                                                     r * HD) +
+                               pc);
+                    } else {
+                        /*
+                        DPCT1098:731: The '*' expression is used instead of the
+                        __ldg call. These two expressions do not provide the
+                        exact same functionality. Check the generated code for
+                        potential precision and/or performance issues.
+                        */
+                        kx = *(reinterpret_cast<const sycl::uint4 *>(p.k_pool +
+                                                                     r * HD) +
+                               pc);
+                        /*
+                        DPCT1098:732: The '*' expression is used instead of the
+                        __ldg call. These two expressions do not provide the
+                        exact same functionality. Check the generated code for
+                        potential precision and/or performance issues.
+                        */
+                        vx = *(reinterpret_cast<const sycl::uint4 *>(p.v_pool +
+                                                                     r * HD) +
+                               pc);
+                    }
+                }
+                *reinterpret_cast<sycl::uint4 *>(
+                    reinterpret_cast<unsigned char *>(&S.k[c][0]) + pc * 16) =
+                    kx;
+                *reinterpret_cast<sycl::uint4 *>(
+                    reinterpret_cast<unsigned char *>(&S.v[c][0]) + pc * 16) =
+                    vx;
+            }
+            for (int i = t; i < CH * 4; i += THREADS) {
+                const int c = i / 4, g = i % 4;
+                const long long r = S.row[c];
+                float a = 0.0f, b = 0.0f;
+                if (r >= 0) {
+                    if constexpr (KV_MODE == 1) {
+                        a = sycl::vec<sycl::half, 1>(
+                                sycl::bit_cast<sycl::half, unsigned short>(
+                                    p.k_scale[r * (HD / KV_Q8_GROUP) + g]))
+                                .convert<float,
+                                         sycl::rounding_mode::automatic>()[0];
+                        b = sycl::vec<sycl::half, 1>(
+                                sycl::bit_cast<sycl::half, unsigned short>(
+                                    p.v_scale[r * (HD / KV_Q8_GROUP) + g]))
+                                .convert<float,
+                                         sycl::rounding_mode::automatic>()[0];
+                    } else {
+                        a = b = 1.0f;
+                    }
+                }
+                S.ks[c][g] = a;
+                S.vs[c][g] = b;
+            }
+        }
+        /*
+        DPCT1118:137: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:736: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        // scores: warp w takes cells 8w..8w+7 (one n-tile) over all 256 dims, per 64-dim scale group
+#pragma unroll
+        for (int nt = 0; nt < CH / 32; ++nt) {
+            const int cb = (warp + 4 * nt) * 8;
+            float sc[4] = {0.f, 0.f, 0.f, 0.f};
+#pragma unroll
+            for (int g = 0; g < 4; ++g) {
+                float tg[4] = {0.f, 0.f, 0.f, 0.f};
+#pragma unroll
+                for (int kk = 0; kk < 4; ++kk) {
+                    const int k0 = (g * 4 + kk) * 16;
+                    uint32_t ah[4], al[4], b[2];
+                    ah[0] = *reinterpret_cast<const uint32_t*>(&S.qh[gid][k0 + 2 * tig]);
+                    ah[1] = *reinterpret_cast<const uint32_t*>(&S.qh[gid + 8][k0 + 2 * tig]);
+                    ah[2] = *reinterpret_cast<const uint32_t*>(&S.qh[gid][k0 + 2 * tig + 8]);
+                    ah[3] = *reinterpret_cast<const uint32_t*>(&S.qh[gid + 8][k0 + 2 * tig + 8]);
+                    al[0] = *reinterpret_cast<const uint32_t*>(&S.ql[gid][k0 + 2 * tig]);
+                    al[1] = *reinterpret_cast<const uint32_t*>(&S.ql[gid + 8][k0 + 2 * tig]);
+                    al[2] = *reinterpret_cast<const uint32_t*>(&S.ql[gid][k0 + 2 * tig + 8]);
+                    al[3] = *reinterpret_cast<const uint32_t*>(&S.ql[gid + 8][k0 + 2 * tig + 8]);
+                    if constexpr (KV_MODE == 1) {
+                        b[0] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(&S.k[cb + gid][k0 + 2 * tig]));
+                        b[1] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(&S.k[cb + gid][k0 + 2 * tig + 8]));
+                    } else {
+                        b[0] = *reinterpret_cast<const uint32_t*>(&S.k[cb + gid][k0 + 2 * tig]);
+                        b[1] = *reinterpret_cast<const uint32_t*>(&S.k[cb + gid][k0 + 2 * tig + 8]);
+                    }
+                    mma16816(tg, ah, b);
+#ifndef D1_NO_QLO
+                    mma16816(tg, al, b);
+#endif
+                }
+                const float s0 = S.ks[cb + 2 * tig][g], s1 = S.ks[cb + 2 * tig + 1][g];
+                sc[0] = sycl::fma(tg[0], (float)s0, sc[0]);
+                sc[1] = sycl::fma(tg[1], (float)s1, sc[1]);
+                sc[2] = sycl::fma(tg[2], (float)s0, sc[2]);
+                sc[3] = sycl::fma(tg[3], (float)s1, sc[3]);
+            }
+            const int c = cb + 2 * tig;
+            S.s[gid][c] = c < nh ? sc[0] * qdown
+                                 : -sycl::bit_cast<float, int>(0x7f800000U);
+            S.s[gid][c + 1] = c + 1 < nh
+                                  ? sc[1] * qdown
+                                  : -sycl::bit_cast<float, int>(0x7f800000U);
+            S.s[gid + 8][c] = c < nh ? sc[2] * qdown
+                                     : -sycl::bit_cast<float, int>(0x7f800000U);
+            S.s[gid + 8][c + 1] =
+                c + 1 < nh ? sc[3] * qdown
+                           : -sycl::bit_cast<float, int>(0x7f800000U);
+        }
+        /*
+        DPCT1118:138: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:737: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        // online softmax: row t/8, 4 cells per thread, 8 threads per row (lanes 8r..8r+7 of a warp)
+        {
+            constexpr int PER = CH / 8;
+            const int r = t >> 3, sub = t & 7;
+            float x[PER], mx = -sycl::bit_cast<float, int>(0x7f800000U);
+#pragma unroll
+            for (int j = 0; j < PER; ++j) {
+                x[j] = S.s[r][sub * PER + j]; mx = sycl::fmax(mx, x[j]);
+            }
+#pragma unroll
+            /*
+            DPCT1108:140: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 1; o < 8; o <<= 1) mx = sycl::fmax(
+                mx,
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), mx, o));
+            const float m_old = S.mrow[r];
+            const float m_new = sycl::fmax(m_old, mx);
+            float sum = 0.0f;
+#pragma unroll
+            for (int j = 0; j < PER; ++j) {
+                const float e = x[j] == -sycl::bit_cast<float, int>(0x7f800000U)
+                                    ? 0.0f
+                                    : sycl::exp2(x[j] - m_new);
+                S.s[r][sub * PER + j] = e;
+                sum += e;
+            }
+#pragma unroll
+            /*
+            DPCT1108:141: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 1; o < 8; o <<= 1) sum +=
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), sum, o);
+            sycl::group_barrier(
+                sycl::ext::oneapi::this_work_item::get_sub_group());
+            if (sub == 0) {
+                const float a =
+                    m_old == -sycl::bit_cast<float, int>(0x7f800000U)
+                        ? 0.0f
+                        : sycl::exp2(m_old - m_new);
+                S.alpha[r] = a;
+                S.lsum[r] = sycl::fma(S.lsum[r], (float)a, sum);
+                S.mrow[r] = m_new;
+            }
+        }
+        /*
+        DPCT1118:139: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:738: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        // p.v: warp w owns dims [64w, 64w+64), which is int8 scale group w. The scale is folded into p relative to
+        // the chunk's largest, times 2^14 (p' <= 2^14: its lo half stays out of FP16's subnormal range); the chunk's
+        // sum is then added to the running one in FP32 with the factor taken back out
+        {
+            float vmax = 0.0f;
+#pragma unroll
+            for (int c = lane; c < CH; c += 32)
+                vmax = sycl::fmax(vmax, S.vs[c][warp]);
+#pragma unroll
+            /*
+            DPCT1108:142: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 16; o > 0; o >>= 1) vmax = sycl::fmax(
+                vmax, dpct::experimental::permute_sub_group_by_xor(
+                          0xffffffffu,
+                          sycl::ext::oneapi::this_work_item::get_sub_group(),
+                          vmax, o));
+            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f, vdown = vmax * (1.0f / 16384.0f);
+            float tmp[8][4];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) tmp[j][0] = tmp[j][1] = tmp[j][2] = tmp[j][3] = 0.0f;
+#pragma unroll
+            for (int ks = 0; ks < CH / 16; ++ks) {
+                const int cA = ks * 16 + 2 * tig, cB = cA + 8;
+                const float w0 = S.vs[cA][warp] * vup, w1 = S.vs[cA + 1][warp] * vup, w2 = S.vs[cB][warp] * vup,
+                            w3 = S.vs[cB + 1][warp] * vup;
+                const float p00 = S.s[gid][cA] * w0, p01 = S.s[gid][cA + 1] * w1;
+                const float p10 = S.s[gid + 8][cA] * w0, p11 = S.s[gid + 8][cA + 1] * w1;
+                const float p02 = S.s[gid][cB] * w2, p03 = S.s[gid][cB + 1] * w3;
+                const float p12 = S.s[gid + 8][cB] * w2, p13 = S.s[gid + 8][cB + 1] * w3;
+                uint32_t ah[4], al[4];
+                ah[0] = pack_h2(p00, p01);
+                ah[1] = pack_h2(p10, p11);
+                ah[2] = pack_h2(p02, p03);
+                ah[3] = pack_h2(p12, p13);
+                {
+                    const sycl::half2 *h =
+                        reinterpret_cast<const sycl::half2 *>(ah);
+                    sycl::float2 f;
+                    f = h[0].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[0] = pack_h2(p00 - f.x(), p01 - f.y());
+                    f = h[1].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[1] = pack_h2(p10 - f.x(), p11 - f.y());
+                    f = h[2].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[2] = pack_h2(p02 - f.x(), p03 - f.y());
+                    f = h[3].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[3] = pack_h2(p12 - f.x(), p13 - f.y());
+                }
+#pragma unroll
+                for (int j = 0; j < 8; ++j) {
+                    const int d = warp * 64 + j * 8 + gid;
+                    uint32_t b[2];
+                    if constexpr (KV_MODE == 1) {
+                        const uint32_t x0 = (uint8_t) S.v[cA][d] | ((uint32_t) (uint8_t) S.v[cA + 1][d] << 8);
+                        const uint32_t x1 = (uint8_t) S.v[cB][d] | ((uint32_t) (uint8_t) S.v[cB + 1][d] << 8);
+                        b[0] = i8x2_to_h2(x0);
+                        b[1] = i8x2_to_h2(x1);
+                    } else {
+                        const sycl::half2 h0 =
+                            sycl::half2(S.v[cA][d], S.v[cA + 1][d]);
+                        const sycl::half2 h1 =
+                            sycl::half2(S.v[cB][d], S.v[cB + 1][d]);
+                        b[0] = *reinterpret_cast<const uint32_t*>(&h0);
+                        b[1] = *reinterpret_cast<const uint32_t*>(&h1);
+                    }
+                    mma16816(tmp[j], ah, b);
+#ifndef D1_NO_PLO
+                    mma16816(tmp[j], al, b);
+#endif
+                }
+            }
+            const float a0 = S.alpha[gid], a1 = S.alpha[gid + 8];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) {
+                acc[j][0] = sycl::fma(acc[j][0], (float)a0, tmp[j][0] * vdown);
+                acc[j][1] = sycl::fma(acc[j][1], (float)a0, tmp[j][1] * vdown);
+                acc[j][2] = sycl::fma(acc[j][2], (float)a1, tmp[j][2] * vdown);
+                acc[j][3] = sycl::fma(acc[j][3], (float)a1, tmp[j][3] * vdown);
+            }
+        }
+    }
+    /*
+    DPCT1065:734: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float l0 = S.lsum[gid], l1 = S.lsum[gid + 8];
+    const float i0 = l0 > 0.0f ? 1.0f / l0 : 0.0f, i1 = l1 > 0.0f ? 1.0f / l1 : 0.0f;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) {
+        const int d = warp * 64 + j * 8 + 2 * tig;
+        *reinterpret_cast<sycl::float2 *>(attn + (size_t)gid * HD + d) =
+            sycl::float2(acc[j][0] * i0, acc[j][1] * i0);
+        if (gid + 8 < G)
+            *reinterpret_cast<sycl::float2 *>(attn + (size_t)(gid + 8) * HD +
+                                              d) =
+                sycl::float2(acc[j][2] * i1, acc[j][3] * i1);
+    }
+}
+
+// ---- v2 (int8 KV): warp w owns dims [64w, 64w+64) for both q.k and p.v, which is also int8 scale group w. So a
+// warp needs only its own 64-byte slice of each K and V row: it gathers it itself with cp.async into its own
+// double-buffered stage while it computes the previous chunk, and q stays in registers. Only the q.k partial sums
+// (one per dim group) cross warps, and they are added in a fixed order: the result is deterministic.
+constexpr int CH2 = 32;
+
+struct Smem2 {
+    int8_t kv[2][4][2][CH2][64];   // stage, warp, K/V, cell, 64 dims in 16-byte pieces XOR-swizzled by the cell
+    float sc[2][4][2][CH2];        // stage, warp, K/V scale of the cell for the warp's group
+    float part[4][16][CH2 + 1];    // q.k per dim group
+    float p[16][CH2 + 1];
+    float qmax[4];
+    float alpha[16];
+    float lsum[16];
+    float mrow[16];
+};
+
+__dpct_inline__ int
+swz(int cell, int byte) { // byte offset of (cell, byte) in a stage slice
+    return cell * 64 + ((((byte >> 4) ^ (cell >> 1)) & 3) << 4) + (byte & 15);
+}
+__dpct_inline__ void cp_async16(void *smem, const void *gmem, bool valid) {
+#if !STRATA_PA_SM80
+    /* unreachable on SYCL: the launcher refuses this device */
+#else
+    auto sa = smem;
+    /*
+    DPCT1053:143: Migration of device assembly code is not supported.
+    */
+    asm volatile("cp.async.cg.shared.global [%0], [%1], 16, %2;\n" ::"r"(sa),
+                 "l"(gmem), "r"(valid ? 16 : 0));
+#endif
+}
+__dpct_inline__ void cp_async_commit() {
+#if STRATA_PA_SM80
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.commit_group;\n" ::);
+#else
+
+#endif
+#endif
+}
+__dpct_inline__ void cp_async_wait1() {
+#if STRATA_PA_SM80
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.wait_group 1;\n" ::);
+#else
+
+#endif
+#endif
+}
+
+/*
+DPCT1110:146: The total declared local variable size in device function
+prompt_attn_i8_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
+                      const int32_t *__restrict__ ids,
+                      const int32_t *__restrict__ steps, int n_kv_heads,
+                      int page_size, float scale_log2, float *__restrict__ attn,
+                      int cap, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto smem_raw = (unsigned char *)dpct_local;
+    Smem2& S = *reinterpret_cast<Smem2*>(smem_raw);
+    const int qi = item_ct1.get_group(2), kvh = item_ct1.get_group(1);
+    const int n_head = n_kv_heads * G;
+    q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    ids += (size_t) qi * cap;
+    /*
+    DPCT1098:741: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const int n = *(steps + (size_t)qi * kStepCount + kStepWidth);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int gid = lane >> 2, tig = lane & 3;
+    const int dim0 = warp * 64;
+
+    // q: the power-of-two prescale over all 12 heads (as v1), then this warp's 64 dims as hi/lo A fragments
+    float qm = 0.0f;
+#pragma unroll
+    for (int i = t; i < G * HD; i += THREADS)
+        qm = sycl::fmax(qm, sycl::fabs(q[i]));
+#pragma unroll
+    /*
+    DPCT1108:147: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) qm = sycl::fmax(
+        qm, dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                qm, o));
+    if (lane == 0) S.qmax[warp] = qm;
+    if (t < 16) {
+        S.mrow[t] = -sycl::bit_cast<float, int>(0x7f800000U); S.lsum[t] = 0.0f;
+    }
+    /*
+    DPCT1065:739: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    qm = sycl::fmax(sycl::fmax(S.qmax[0], S.qmax[1]),
+                    sycl::fmax(S.qmax[2], S.qmax[3]));
+    int qe = 0;
+    /*
+    DPCT1017:742: The sycl::frexp call is used instead of the frexpf call. These
+    two calls do not provide exactly the same functionality. Check the potential
+    precision and/or performance issues for the generated code.
+    */
+    if (qm > 0.0f) sycl::frexp(
+        qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
+                                     sycl::access::decorated::yes>(&qe));
+    const float qup = sycl::ldexp(1.0f, 14 - qe),
+                qdown = sycl::ldexp(scale_log2, qe - 14);
+    uint32_t qh[4][4], ql[4][4];
+#pragma unroll
+    for (int kk = 0; kk < 4; ++kk) {
+#pragma unroll
+        for (int r = 0; r < 4; ++r) {
+            const int row = gid + (r & 1) * 8, col = dim0 + kk * 16 + 2 * tig + (r >> 1) * 8;
+            sycl::float2 x = sycl::float2(0.f, 0.f);
+            if (row < G) x = *reinterpret_cast<const sycl::float2 *>(
+                q + (size_t)row * HD + col);
+            x.x() *= qup;
+            x.y() *= qup;
+            const sycl::half2 hi =
+                sycl::float2(x.x(), x.y())
+                    .convert<sycl::half, sycl::rounding_mode::rte>();
+            const sycl::float2 hf =
+                hi.template convert<float, sycl::rounding_mode::automatic>();
+            const sycl::half2 lo =
+                sycl::float2(x.x() - hf.x(), x.y() - hf.y())
+                    .convert<sycl::half, sycl::rounding_mode::rte>();
+            qh[kk][r] = *reinterpret_cast<const uint32_t*>(&hi);
+            ql[kk][r] = *reinterpret_cast<const uint32_t*>(&lo);
+        }
+    }
+
+    // the chunk pipeline: cells two chunks ahead, their pool rows one chunk ahead, the data (cp.async) one ahead
+    const int n_chunks = (n + CH2 - 1) / CH2;
+    /*
+    DPCT1098:743: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    auto cell_of = [&](int c) -> int {
+                                       return c < n ? *(ids + c) : -1;
+    };
+    auto row_of = [&](int cell) -> long long {
+        if (cell < 0) return -1;
+        /*
+        DPCT1098:744: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const long long page = (long long)*(p.page_table + cell / page_size);
+        return (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+    };
+    auto issue = [&](long long r, int st, float& ksr, float& vsr) {
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int idx = lane + 32 * j, cell = idx >> 2, pc = idx & 3;
+            /*
+            DPCT1108:148: '__shfl_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            /*
+            DPCT1121:149: Make sure that the "r" which is used in the SYCL group
+            function/algorithm is initialized.
+            */
+            const long long rr = dpct::experimental::select_from_sub_group(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                r, cell);
+            const bool ok = rr >= 0;
+            const size_t off = ok ? (size_t) rr * HD + dim0 + pc * 16 : 0;
+            cp_async16(&S.kv[st][warp][0][0][0] + swz(cell, pc * 16), p.k_q + off, ok);
+            cp_async16(&S.kv[st][warp][1][0][0] + swz(cell, pc * 16), p.v_q + off, ok);
+        }
+        /*
+        DPCT1098:745: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        ksr = r >= 0 ? sycl::vec<sycl::half, 1>(
+                           sycl::bit_cast<sycl::half, unsigned short>(
+                               *(p.k_scale + r * (HD / KV_Q8_GROUP) + warp)))
+                           .convert<float, sycl::rounding_mode::automatic>()[0]
+                     : 0.0f;
+        /*
+        DPCT1098:746: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        vsr = r >= 0 ? sycl::vec<sycl::half, 1>(
+                           sycl::bit_cast<sycl::half, unsigned short>(
+                               *(p.v_scale + r * (HD / KV_Q8_GROUP) + warp)))
+                           .convert<float, sycl::rounding_mode::automatic>()[0]
+                     : 0.0f;
+    };
+    float ksn, vsn;
+    issue(row_of(cell_of(lane)), 0, ksn, vsn);
+    cp_async_commit();
+    S.sc[0][warp][0][lane] = ksn;
+    S.sc[0][warp][1][lane] = vsn;
+    long long r_next = row_of(cell_of(CH2 + lane));
+    int cell_next2 = cell_of(2 * CH2 + lane);
+
+    float acc[8][4];
+#pragma unroll
+    for (int j = 0; j < 8; ++j) acc[j][0] = acc[j][1] = acc[j][2] = acc[j][3] = 0.0f;
+
+    for (int ci = 0; ci < n_chunks; ++ci) {
+        const int st = ci & 1, c0 = ci * CH2;
+        const bool more = ci + 1 < n_chunks;
+        if (more) issue(r_next, st ^ 1, ksn, vsn);
+        cp_async_commit();
+        r_next = row_of(cell_next2);
+        cell_next2 = cell_of((ci + 3) * CH2 + lane);
+        cp_async_wait1();
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+        const int8_t* K = &S.kv[st][warp][0][0][0];
+        const int8_t* V = &S.kv[st][warp][1][0][0];
+        // q.k over this warp's 64 dims, times the cell's K scale for this group
+#pragma unroll
+        for (int nt = 0; nt < CH2 / 8; ++nt) {
+            float tg[4] = {0.f, 0.f, 0.f, 0.f};
+            const int cell = nt * 8 + gid;
+#pragma unroll
+            for (int kk = 0; kk < 4; ++kk) {
+                uint32_t b[2];
+                b[0] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(K + swz(cell, kk * 16 + 2 * tig)));
+                b[1] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(K + swz(cell, kk * 16 + 2 * tig + 8)));
+                mma16816(tg, qh[kk], b);
+                mma16816(tg, ql[kk], b);
+            }
+            const int c = nt * 8 + 2 * tig;
+            const float s0 = S.sc[st][warp][0][c], s1 = S.sc[st][warp][0][c + 1];
+            S.part[warp][gid][c] = tg[0] * s0;
+            S.part[warp][gid][c + 1] = tg[1] * s1;
+            S.part[warp][gid + 8][c] = tg[2] * s0;
+            S.part[warp][gid + 8][c + 1] = tg[3] * s1;
+        }
+        /*
+        DPCT1118:150: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:747: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        // online softmax over the four groups' sum (fixed order): row t/8, 4 cells per thread
+        {
+            const int r = t >> 3, sub = t & 7;
+            float x[4], mx = -sycl::bit_cast<float, int>(0x7f800000U);
+#pragma unroll
+            for (int j = 0; j < 4; ++j) {
+                const int c = sub * 4 + j;
+                x[j] = c0 + c < n ? (((S.part[0][r][c] + S.part[1][r][c]) +
+                                      S.part[2][r][c]) +
+                                     S.part[3][r][c]) *
+                                        qdown
+                                  : -sycl::bit_cast<float, int>(0x7f800000U);
+                mx = sycl::fmax(mx, x[j]);
+            }
+#pragma unroll
+            /*
+            DPCT1108:152: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 1; o < 8; o <<= 1) mx = sycl::fmax(
+                mx,
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), mx, o));
+            const float m_old = S.mrow[r];
+            const float m_new = sycl::fmax(m_old, mx);
+            float sum = 0.0f;
+#pragma unroll
+            for (int j = 0; j < 4; ++j) {
+                const float e = x[j] == -sycl::bit_cast<float, int>(0x7f800000U)
+                                    ? 0.0f
+                                    : sycl::exp2(x[j] - m_new);
+                S.p[r][sub * 4 + j] = e;
+                sum += e;
+            }
+#pragma unroll
+            /*
+            DPCT1108:153: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 1; o < 8; o <<= 1) sum +=
+                dpct::experimental::permute_sub_group_by_xor(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), sum, o);
+            sycl::group_barrier(
+                sycl::ext::oneapi::this_work_item::get_sub_group());
+            if (sub == 0) {
+                const float a =
+                    m_old == -sycl::bit_cast<float, int>(0x7f800000U)
+                        ? 0.0f
+                        : sycl::exp2(m_old - m_new);
+                S.alpha[r] = a;
+                S.lsum[r] = sycl::fma(S.lsum[r], (float)a, sum);
+                S.mrow[r] = m_new;
+            }
+        }
+        /*
+        DPCT1118:151: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:748: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        // p.v over this warp's 64 dims (as v1)
+        {
+            float vmax = S.sc[st][warp][1][lane];
+#pragma unroll
+            /*
+            DPCT1108:154: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            for (int o = 16; o > 0; o >>= 1) vmax = sycl::fmax(
+                vmax, dpct::experimental::permute_sub_group_by_xor(
+                          0xffffffffu,
+                          sycl::ext::oneapi::this_work_item::get_sub_group(),
+                          vmax, o));
+            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f, vdown = vmax * (1.0f / 16384.0f);
+            float tmp[8][4];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) tmp[j][0] = tmp[j][1] = tmp[j][2] = tmp[j][3] = 0.0f;
+#pragma unroll
+            for (int ks = 0; ks < CH2 / 16; ++ks) {
+                const int cA = ks * 16 + 2 * tig, cB = cA + 8;
+                const float w0 = S.sc[st][warp][1][cA] * vup, w1 = S.sc[st][warp][1][cA + 1] * vup,
+                            w2 = S.sc[st][warp][1][cB] * vup, w3 = S.sc[st][warp][1][cB + 1] * vup;
+                const float p00 = S.p[gid][cA] * w0, p01 = S.p[gid][cA + 1] * w1;
+                const float p10 = S.p[gid + 8][cA] * w0, p11 = S.p[gid + 8][cA + 1] * w1;
+                const float p02 = S.p[gid][cB] * w2, p03 = S.p[gid][cB + 1] * w3;
+                const float p12 = S.p[gid + 8][cB] * w2, p13 = S.p[gid + 8][cB + 1] * w3;
+                uint32_t ah[4], al[4];
+                ah[0] = pack_h2(p00, p01);
+                ah[1] = pack_h2(p10, p11);
+                ah[2] = pack_h2(p02, p03);
+                ah[3] = pack_h2(p12, p13);
+                {
+                    const sycl::half2 *h =
+                        reinterpret_cast<const sycl::half2 *>(ah);
+                    sycl::float2 f;
+                    f = h[0].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[0] = pack_h2(p00 - f.x(), p01 - f.y());
+                    f = h[1].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[1] = pack_h2(p10 - f.x(), p11 - f.y());
+                    f = h[2].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[2] = pack_h2(p02 - f.x(), p03 - f.y());
+                    f = h[3].template convert<float,
+                                              sycl::rounding_mode::automatic>();
+                        al[3] = pack_h2(p12 - f.x(), p13 - f.y());
+                }
+#pragma unroll
+                for (int j = 0; j < 8; ++j) {
+                    const int d = j * 8 + gid;
+                    const uint32_t x0 = (uint8_t) V[swz(cA, d)] | ((uint32_t) (uint8_t) V[swz(cA + 1, d)] << 8);
+                    const uint32_t x1 = (uint8_t) V[swz(cB, d)] | ((uint32_t) (uint8_t) V[swz(cB + 1, d)] << 8);
+                    uint32_t b[2];
+                    b[0] = i8x2_to_h2(x0);
+                    b[1] = i8x2_to_h2(x1);
+                    mma16816(tmp[j], ah, b);
+                    mma16816(tmp[j], al, b);
+                }
+            }
+            const float a0 = S.alpha[gid], a1 = S.alpha[gid + 8];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) {
+                acc[j][0] = sycl::fma(acc[j][0], (float)a0, tmp[j][0] * vdown);
+                acc[j][1] = sycl::fma(acc[j][1], (float)a0, tmp[j][1] * vdown);
+                acc[j][2] = sycl::fma(acc[j][2], (float)a1, tmp[j][2] * vdown);
+                acc[j][3] = sycl::fma(acc[j][3], (float)a1, tmp[j][3] * vdown);
+            }
+        }
+        if (more) {
+            S.sc[st ^ 1][warp][0][lane] = ksn;
+            S.sc[st ^ 1][warp][1][lane] = vsn;
+        }
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    }
+    /*
+    DPCT1065:740: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float l0 = S.lsum[gid], l1 = S.lsum[gid + 8];
+    const float i0 = l0 > 0.0f ? 1.0f / l0 : 0.0f, i1 = l1 > 0.0f ? 1.0f / l1 : 0.0f;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) {
+        const int d = dim0 + j * 8 + 2 * tig;
+        *reinterpret_cast<sycl::float2 *>(attn + (size_t)gid * HD + d) =
+            sycl::float2(acc[j][0] * i0, acc[j][1] * i0);
+        if (gid + 8 < G)
+            *reinterpret_cast<sycl::float2 *>(attn + (size_t)(gid + 8) * HD +
+                                              d) =
+                sycl::float2(acc[j][2] * i1, acc[j][3] * i1);
+    }
+}
+
+bool launch_i8(const float *q, const QsaAttnPools &pools, const int32_t *ids,
+               const int32_t *steps, int64_t cap, const QsaShapes &s,
+               float *attn, int64_t n_q, dpct::queue_ptr st) try {
+    static bool attr[64] = {};   // the shared-memory opt-in is per device (a layer split runs this on several)
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    /*
+    DPCT1083:155: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const int bytes = (int)sizeof(Smem2);
+    if (dev < 0 || dev >= 64) return false;
+    if (!attr[dev]) {
+        /*
+        DPCT1027:749: The call to cudaFuncSetAttribute was replaced with 0
+        because SYCL currently does not support corresponding setting.
+        */
+        if (0 != 0) {
+            /*
+            DPCT1026:750: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            return false;
+        }
+        attr[dev] = true;
+    }
+    const float scale_log2 = 1.4426950408889634f / sqrtf((float) HD);
+    for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
+        const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp16});
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(bytes), cgh);
+
+                auto q_q0_s_n_head_HD_ct0 = q + q0 * s.n_head * HD;
+                auto ids_q0_cap_ct2 = ids + q0 * cap;
+                auto steps_q0_kStepCount_ct3 = steps + q0 * kStepCount;
+                auto attn_q0_s_n_head_HD_ct7 = attn + q0 * s.n_head * HD;
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class prompt_attn_i8_kernel_4540c2>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, (unsigned)s.n_head_kv, (unsigned)nb) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        prompt_attn_i8_kernel(
+                            q_q0_s_n_head_HD_ct0, pools, ids_q0_cap_ct2,
+                            steps_q0_kStepCount_ct3, (int)s.n_head_kv,
+                            (int)s.page_size, scale_log2,
+                            attn_q0_s_n_head_HD_ct7, (int)cap,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+    }
+    /*
+    DPCT1010:751: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+template <int KV_MODE>
+bool launch(const float *q, const QsaAttnPools &pools, const int32_t *ids,
+            const int32_t *steps, int64_t cap, const QsaShapes &s, float *attn,
+            int64_t n_q, dpct::queue_ptr st) try {
+    static bool attr[64] = {};   // per device, as above
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    /*
+    DPCT1083:156: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const int bytes = (int)sizeof(Smem<KV_MODE>);
+    if (dev < 0 || dev >= 64) return false;
+    if (!attr[dev]) {
+        /*
+        DPCT1027:756: The call to cudaFuncSetAttribute was replaced with 0
+        because SYCL currently does not support corresponding setting.
+        */
+        if (0 != 0) {
+            /*
+            DPCT1026:753: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            return false;
+        }
+        attr[dev] = true;
+    }
+    const float scale_log2 = 1.4426950408889634f / sqrtf((float) HD);
+    for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
+        const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(st->get_device(),
+                                         {sycl::aspect::fp16});
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(bytes), cgh);
+
+                auto q_q0_s_n_head_HD_ct0 = q + q0 * s.n_head * HD;
+                auto ids_q0_cap_ct2 = ids + q0 * cap;
+                auto steps_q0_kStepCount_ct3 = steps + q0 * kStepCount;
+                auto attn_q0_s_n_head_HD_ct7 = attn + q0 * s.n_head * HD;
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class prompt_attn_kernel_410441,
+                                     dpct_kernel_scalar<KV_MODE>>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, (unsigned)s.n_head_kv, (unsigned)nb) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        prompt_attn_kernel<KV_MODE>(
+                            q_q0_s_n_head_HD_ct0, pools, ids_q0_cap_ct2,
+                            steps_q0_kStepCount_ct3, (int)s.n_head_kv,
+                            (int)s.page_size, scale_log2,
+                            attn_q0_s_n_head_HD_ct7, (int)cap,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+    }
+    /*
+    DPCT1010:754: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace
+
+bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
+                           const int32_t *ids, const int32_t *steps,
+                           int64_t cap, const QsaShapes &s, float *attn,
+                           int64_t n_q, void *stream) try {
+    if (n_q <= 0) return true;
+    {   // sm_80 or newer (the MMA and cp.async above); an older card keeps the old kernel
+        static int cc_major[64] = {};
+        int dev = 0;
+        /*
+        DPCT1026:757: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 ||
+            dev < 0 || dev >= 64) {
+            ; return false;
+        }
+        if (cc_major[dev] == 0) {
+            int major = 0;
+            if (DPCT_CHECK_ERROR(
+                    major = dpct::get_device(dev).get_major_version()) != 0) {
+                /*
+                DPCT1026:758: The call to cudaGetLastError was removed because
+                this functionality is redundant in SYCL.
+                */
+                return false;
+            }
+            cc_major[dev] = major;
+        }
+        (void) cc_major[dev];
+        return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
+    }
+    if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids ||
+        !steps || !pools.page_table)
+        return false;
+    dpct::queue_ptr st = strata::q_of(stream);
+    if (pools.k_q != nullptr) {
+        if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
+        // STRATA_PROMPT_ATTN_V1=1 (debug): the first version, same accuracy, another summation order - the control
+        // for how far the model amplifies an FP32-level change
+        static const bool v1 = std::getenv("STRATA_PROMPT_ATTN_V1") != nullptr;
+        if (v1) return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
+        return launch_i8(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
+    if (!pools.k_pool || !pools.v_pool) return false;
+    return launch<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa_select.dp.cpp b/sycl/src/kernels/cuda/qsa_select.dp.cpp
new file mode 100644
index 00000000000..676a89930a6
--- /dev/null
+++ b/sycl/src/kernels/cuda/qsa_select.dp.cpp
@@ -0,0 +1,917 @@
+// src/kernels/cuda/qsa_select.cu - see include/strata/kernels/qsa_select.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/qsa_select.hpp"
+
+#include <cfloat>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int IDX_DIM = 128, IDX_HEADS = 4, R = 4;
+constexpr int SCORE_WARPS = 8;
+constexpr int TOPK_T = 256;
+
+__dpct_inline__ uint32_t order_key(float s) {
+    const float v = s + 0.0f;
+    if (!(v == v)) return 0u;
+    const uint32_t b = sycl::bit_cast<unsigned int>(v);
+    return (b & 0x80000000u) ? ~b : (b | 0x80000000u);
+}
+
+__dpct_inline__ void block_scores_kernel(const float *__restrict__ pooled,
+                                         const float *__restrict__ dead,
+                                         const float *__restrict__ q_idx,
+                                         const int32_t *__restrict__ steps,
+                                         int64_t max_blocks,
+                                         float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t qi = item_ct1.get_group(1);
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid];
+    const int64_t b = (int64_t)item_ct1.get_group(2) * SCORE_WARPS +
+                      (item_ct1.get_local_id(2) >> 5);
+    if (b > n_bid || b >= max_blocks) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const float* key = (b == n_bid) ? dead : pooled + b * IDX_DIM;
+    const sycl::float4 k4 =
+        *reinterpret_cast<const sycl::float4 *>(key + lane * 4);
+    const float* q = q_idx + qi * IDX_HEADS * IDX_DIM + lane * 4;
+    float score = 0.0f;
+#pragma unroll
+    for (int h = 0; h < IDX_HEADS; ++h) {
+        const sycl::float4 q4 =
+            *reinterpret_cast<const sycl::float4 *>(q + h * IDX_DIM);
+        float d = k4.x() * q4.x() + k4.y() * q4.y() + k4.z() * q4.z() +
+                  k4.w() * q4.w();
+#pragma unroll
+        /*
+        DPCT1108:112: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        for (int o = 16; o > 0; o >>= 1) d +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                d, o);
+        score += d > 0.0f ? d : 0.0f;
+    }
+    if (lane == 0) {
+        if (b == n_bid && n_kv % R != 0) score += 1e9f;
+        out[qi * max_blocks + b] = score;
+    }
+}
+
+/*
+DPCT1110:113: The total declared local variable size in device function
+block_topk_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void block_topk_kernel(const float *__restrict__ scores,
+                                       const int32_t *__restrict__ steps,
+                                       int64_t max_blocks, int64_t cap,
+                                       int32_t *__restrict__ ids) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_a =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TOPK_T]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_b =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TOPK_T]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_digit = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_above = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t qi = item_ct1.get_group(2);
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid], width = st[kStepWidth];
+    int32_t* out = ids + qi * cap;
+    const int t = item_ct1.get_local_id(2);
+    if (n_kv <= width) {                               // everything is selected: the identity, ascending
+#pragma unroll
+        for (int64_t j = t; j < n_kv; j += TOPK_T) out[j] = (int32_t)j;
+        return;
+    }
+    const float* sc = scores + qi * max_blocks;
+    const int64_t nb = n_bid + 1;                      // blocks 0..n_bid, the last possibly empty
+    const int64_t per = (nb + TOPK_T - 1) / TOPK_T;
+    const int64_t b0 = (int64_t) t * per, b1 = (b0 + per < nb) ? b0 + per : nb;
+    auto weight = [&](int64_t b) -> int { return b < n_bid ? R : (int) (n_kv - n_bid * R); };
+    // ---- radix select: the largest key thr with (cells with key >= thr) >= width, 8 bits at a time
+    uint32_t prefix = 0;
+    int above = 0;                                     // cells strictly above the digits fixed so far
+    for (int shift = 24; shift >= 0; shift -= 8) {
+#pragma unroll
+        for (int i = t; i < 256; i += TOPK_T) hist[i] = 0;
+        /*
+        DPCT1118:114: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:610: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const uint32_t hi_mask = shift == 24 ? 0u : (0xffffffffu << (shift + 8));
+        for (int64_t b = b0; b < b1; ++b) {
+            const int w = weight(b);
+            if (w == 0) continue;
+            const uint32_t k = order_key(sc[b]);
+            if ((k & hi_mask) == (prefix & hi_mask)) dpct::atomic_fetch_add<
+                sycl::access::address_space::generic_space>(
+                &hist[(k >> shift) & 255], w);
+        }
+        /*
+        DPCT1118:115: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:611: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (t == 0) {
+            int cum = above, d = 255;
+#pragma unroll
+            for (; d > 0; --d) {
+                if (cum + hist[d] >= width) break;
+                cum += hist[d];
+            }
+            s_digit = d;
+            s_above = cum;
+        }
+        /*
+        DPCT1118:116: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:612: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        prefix |= (uint32_t) s_digit << shift;
+        above = s_above;
+        /*
+        DPCT1118:117: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:613: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+    }
+    const uint32_t thr = prefix;
+    const int64_t eq_budget = width - above;          // cells equal to thr that fit, lowest index first
+    // ---- per-thread counts of cells above and at the threshold, then their exclusive prefixes
+    int gt = 0, eq = 0;
+    for (int64_t b = b0; b < b1; ++b) {
+        const int w = weight(b);
+        if (w == 0) continue;
+        const uint32_t k = order_key(sc[b]);
+        if (k > thr) gt += w;
+        else if (k == thr) eq += w;
+    }
+    s_a[t] = gt;
+    s_b[t] = eq;
+    /*
+    DPCT1065:605: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t == 0) {
+        int ag = 0, ae = 0;
+        for (int i = 0; i < TOPK_T; ++i) {
+            const int g = s_a[i], e = s_b[i];
+            s_a[i] = ag; s_b[i] = ae;
+            ag += g; ae += e;
+        }
+    }
+    /*
+    DPCT1065:606: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int64_t eq_before = s_b[t];
+    int64_t my_eq = eq_budget - eq_before;
+    if (my_eq < 0) my_eq = 0;
+    if (my_eq > eq) my_eq = eq;
+    const int sel = gt + (int) my_eq;
+    /*
+    DPCT1065:607: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    s_a[t] = sel;
+    /*
+    DPCT1065:608: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t == 0) {
+        int a = 0;
+        for (int i = 0; i < TOPK_T; ++i) { const int c = s_a[i]; s_a[i] = a; a += c; }
+    }
+    /*
+    DPCT1065:609: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    int64_t wpos = s_a[t];
+    int64_t eq_left = my_eq;
+    for (int64_t b = b0; b < b1; ++b) {
+        const int w = weight(b);
+        if (w == 0) continue;
+        const uint32_t k = order_key(sc[b]);
+        if (k > thr) {
+#pragma unroll
+            for (int c = 0; c < w; ++c) out[wpos++] = (int32_t)(b * R + c);
+        } else if (k == thr) {
+#pragma unroll
+            for (int c = 0; c < w && eq_left > 0; ++c, --eq_left)
+                out[wpos++] = (int32_t)(b * R + c);
+        }
+    }
+}
+
+
+// ---- QSA select on tensor cores (perf-review, after D-1): the block scores of many queries are one GEMM,
+// rows (query, indexer head) x columns (blocks), K = 128, with relu per head summed. 3xTF32 (each operand split
+// into a TF32 hi and lo part, hi*hi + hi*lo + lo*hi) keeps FP32-level accuracy; the summation order differs from
+// the warp kernel, so a score can move in its last bits and a near-tie can select differently (not bitwise).
+// Blocks < n_bid only; the tail block n_bid (the `dead` key, +1e9) is scored by the warp kernel's own code.
+constexpr int TC_QT = 16;                 // queries per CTA (one m16 tile per indexer head)
+constexpr int TC_NB = 32;                 // blocks per tile (4 warps x n8)
+constexpr int TC_ITER = 4;                // tiles per CTA (the query tile is loaded once)
+constexpr int TC_QS = IDX_HEADS * IDX_DIM + 4;   // query row stride in floats
+constexpr int TC_KS = IDX_DIM + 4;               // key row stride
+
+// TF32 conversion and MMA need sm_80: below it they compile to a trap and qsa_block_scores_tc refuses the device
+#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
+#define STRATA_SEL_SM80 1
+#else
+#define STRATA_SEL_SM80 0
+#endif
+__dpct_inline__ uint32_t tf32_hi(float x) {
+#if STRATA_SEL_SM80
+    uint32_t r;
+    /*
+    DPCT1053:118: Migration of device assembly code is not supported.
+    */
+    asm("cvt.rna.tf32.f32 %0, %1;" : "=r"(r) : "f"(x));
+    return r;
+#else
+    return sycl::bit_cast<uint32_t>(x);
+#endif
+}
+__dpct_inline__ void mma_tf32(float *c, const uint32_t *a, const uint32_t *b) {
+#if !STRATA_SEL_SM80
+    /* unreachable on SYCL: the launcher refuses this device */
+#else
+    /*
+    DPCT1053:119: Migration of device assembly code is not supported.
+    */
+    asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 "
+                 "{%0,%1,%2,%3}, {%4,%5,%6,%7}, {%8,%9}, "
+                 "{%0,%1,%2,%3};\n"
+                 : "+f"(c[0]), "+f"(c[1]), "+f"(c[2]), "+f"(c[3])
+                 : "r"(a[0]), "r"(a[1]), "r"(a[2]), "r"(a[3]), "r"(b[0]),
+                   "r"(b[1]));
+#endif
+}
+
+/*
+DPCT1110:120: The total declared local variable size in device function
+block_scores_tc_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void block_scores_tc_kernel(
+    const float *__restrict__ pooled, const float *__restrict__ q_idx,
+    const int32_t *__restrict__ steps, int64_t nq, int64_t max_blocks,
+    int64_t reach, float *__restrict__ out, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto sm = (float *)dpct_local;
+    float* sQ = sm;                                   // [TC_QT][TC_QS]
+    float* sK = sm + TC_QT * TC_QS;                   // [TC_NB][TC_KS]
+    auto &s_nbid =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TC_QT]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5,
+              gid = lane >> 2, tig = lane & 3;
+    const int64_t q0 = (int64_t)item_ct1.get_group(1) * TC_QT;
+    for (int i = t; i < TC_QT * IDX_HEADS * IDX_DIM / 4; i += 128) {
+        const int r = i / (IDX_HEADS * IDX_DIM / 4), c = i % (IDX_HEADS * IDX_DIM / 4);
+        sycl::float4 v = sycl::float4(0.f, 0.f, 0.f, 0.f);
+        if (q0 + r < nq) v = reinterpret_cast<const sycl::float4 *>(
+            q_idx + (q0 + r) * IDX_HEADS * IDX_DIM)[c];
+        *reinterpret_cast<sycl::float4 *>(sQ + r * TC_QS + c * 4) = v;
+    }
+    if (t < TC_QT) s_nbid[t] = q0 + t < nq ? steps[(q0 + t) * kStepCount + kStepNBid] : 0;
+    int lo_nbid = 0x7fffffff, hi_nbid = 0;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int i = 0; i < TC_QT; ++i) {
+        if (q0 + i >= nq) break;
+        lo_nbid = sycl::min(lo_nbid, s_nbid[i]);
+        hi_nbid = sycl::max(hi_nbid, s_nbid[i]);
+    }
+    for (int it = 0; it < TC_ITER; ++it) {
+        const int64_t b0 =
+            ((int64_t)item_ct1.get_group(2) * TC_ITER + it) * TC_NB;
+        if (b0 >= reach || b0 >= hi_nbid) break;      // blocks >= every query's n_bid: nothing to score
+        /*
+        DPCT1118:121: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:614: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier(); // the previous tile's reads are done
+        for (int i = t; i < TC_NB * IDX_DIM / 4; i += 128) {
+            const int r = i / (IDX_DIM / 4), c = i % (IDX_DIM / 4);
+            sycl::float4 v = sycl::float4(0.f, 0.f, 0.f, 0.f);
+            if (b0 + r < hi_nbid) v = reinterpret_cast<const sycl::float4 *>(
+                pooled + (b0 + r) * IDX_DIM)[c];
+            *reinterpret_cast<sycl::float4 *>(sK + r * TC_KS + c * 4) = v;
+        }
+        /*
+        DPCT1118:122: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:615: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        float acc[IDX_HEADS][4];
+#pragma unroll
+        for (int h = 0; h < IDX_HEADS; ++h) acc[h][0] = acc[h][1] = acc[h][2] = acc[h][3] = 0.f;
+        const float* kr = sK + (warp * 8 + gid) * TC_KS;
+#pragma unroll 4
+        for (int k0 = 0; k0 < IDX_DIM; k0 += 8) {
+            const float kx0 = kr[k0 + tig], kx1 = kr[k0 + tig + 4];
+            uint32_t bh[2], bl[2];
+            bh[0] = tf32_hi(kx0);
+            bh[1] = tf32_hi(kx1);
+            bl[0] = tf32_hi(kx0 - sycl::bit_cast<float>(bh[0]));
+            bl[1] = tf32_hi(kx1 - sycl::bit_cast<float>(bh[1]));
+#pragma unroll
+            for (int h = 0; h < IDX_HEADS; ++h) {
+                const float* qa = sQ + h * IDX_DIM + k0 + tig;
+                const float x0 = qa[gid * TC_QS], x1 = qa[(gid + 8) * TC_QS];
+                const float x2 = qa[gid * TC_QS + 4], x3 = qa[(gid + 8) * TC_QS + 4];
+                uint32_t ah[4], al[4];
+                ah[0] = tf32_hi(x0); ah[1] = tf32_hi(x1); ah[2] = tf32_hi(x2); ah[3] = tf32_hi(x3);
+                al[0] = tf32_hi(x0 - sycl::bit_cast<float>(ah[0]));
+                al[1] = tf32_hi(x1 - sycl::bit_cast<float>(ah[1]));
+                al[2] = tf32_hi(x2 - sycl::bit_cast<float>(ah[2]));
+                al[3] = tf32_hi(x3 - sycl::bit_cast<float>(ah[3]));
+                mma_tf32(acc[h], al, bh);
+                mma_tf32(acc[h], ah, bl);
+                mma_tf32(acc[h], ah, bh);
+            }
+        }
+        // relu per head, heads added in order (as the warp kernel), written where the block completed for the query
+        const int64_t bc = b0 + warp * 8 + 2 * tig;
+#pragma unroll
+        for (int half = 0; half < 2; ++half) {
+            const int qr = gid + half * 8;
+            const int64_t qi = q0 + qr;
+            if (qi >= nq) continue;
+            const int nb = s_nbid[qr];
+#pragma unroll
+            for (int j = 0; j < 2; ++j) {
+                const int64_t b = bc + j;
+                if (b >= nb || b >= max_blocks) continue;
+                float score = 0.0f;
+#pragma unroll
+                for (int h = 0; h < IDX_HEADS; ++h) {
+                    const float d = acc[h][half * 2 + j];
+                    score += d > 0.0f ? d : 0.0f;
+                }
+                out[qi * max_blocks + b] = score;
+            }
+        }
+    }
+}
+
+// the tail block n_bid of each query: exactly block_scores_kernel's arithmetic for that block
+__dpct_inline__ void block_scores_tail_kernel(const float *__restrict__ dead,
+                                              const float *__restrict__ q_idx,
+                                              const int32_t *__restrict__ steps,
+                                              int64_t max_blocks,
+                                              float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t qi = item_ct1.get_group(2);
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid];
+    if (n_bid >= max_blocks) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const sycl::float4 k4 =
+        *reinterpret_cast<const sycl::float4 *>(dead + lane * 4);
+    const float* q = q_idx + qi * IDX_HEADS * IDX_DIM + lane * 4;
+    float score = 0.0f;
+#pragma unroll
+    for (int h = 0; h < IDX_HEADS; ++h) {
+        const sycl::float4 q4 =
+            *reinterpret_cast<const sycl::float4 *>(q + h * IDX_DIM);
+        float d = k4.x() * q4.x() + k4.y() * q4.y() + k4.z() * q4.z() +
+                  k4.w() * q4.w();
+#pragma unroll
+        /*
+        DPCT1108:123: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        for (int o = 16; o > 0; o >>= 1) d +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                d, o);
+        score += d > 0.0f ? d : 0.0f;
+    }
+    if (lane == 0) {
+        if (n_kv % R != 0) score += 1e9f;
+        out[qi * max_blocks + n_bid] = score;
+    }
+}
+
+// ---- the same top-k with each query's keys read once: 1,024 threads hold up to TK_PER consecutive blocks' keys in
+// registers (contexts up to 4 * 1024 * TK_PER cells), per-warp histograms, block-wide scans. The selection rule is
+// block_topk_kernel's (radix threshold, ties to the lowest index, cells ascending): identical ids.
+constexpr int TK_T = 1024;
+constexpr int TK_PER = 33;
+
+__dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    int x = v;
+#pragma unroll
+    for (int o = 1; o < 32; o <<= 1) {
+        /*
+        DPCT1108:124: '__shfl_up_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const int y = dpct::experimental::shift_sub_group_right(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            o);
+        if (lane >= o) x += y;
+    }
+    if (lane == 31) s_warp[warp] = x;
+    /*
+    DPCT1065:616: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (warp == 0) {
+        int w = s_warp[lane];
+        int z = w;
+#pragma unroll
+        for (int o = 1; o < 32; o <<= 1) {
+            /*
+            DPCT1108:125: '__shfl_up_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int y = dpct::experimental::shift_sub_group_right(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                z, o);
+            if (lane >= o) z += y;
+        }
+        s_warp[lane] = z - w;               // exclusive per warp
+        if (lane == 31) s_warp[32] = z;     // total
+    }
+    /*
+    DPCT1065:617: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int r = s_warp[warp] + x - v;
+    total = s_warp[32];
+    /*
+    DPCT1065:618: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return r;
+}
+
+/*
+DPCT1110:126: The total declared local variable size in device function
+block_topk_reg_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void block_topk_reg_kernel(const float *__restrict__ scores,
+                                           const int32_t *__restrict__ steps,
+                                           int64_t max_blocks, int64_t cap,
+                                           int32_t *__restrict__ ids) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &hist =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<int[TK_T / 32][256]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_warp =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[33]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_digit = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_above = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t qi = item_ct1.get_group(2);
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid], width = st[kStepWidth];
+    int32_t* out = ids + qi * cap;
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    if (n_kv <= width) {
+#pragma unroll
+        for (int64_t j = t; j < n_kv; j += TK_T) out[j] = (int32_t)j;
+        return;
+    }
+    const float* sc = scores + qi * max_blocks;
+    const int64_t nb = n_bid + 1;
+    const int64_t per = (nb + TK_T - 1) / TK_T;       // <= TK_PER (the caller checks)
+    const int64_t b0 = (int64_t) t * per, b1 = (b0 + per < nb) ? b0 + per : nb;
+    uint32_t key[TK_PER];
+#pragma unroll
+    for (int j = 0; j < TK_PER; ++j) key[j] = (b0 + j < b1) ? order_key(sc[b0 + j]) : 0u;
+    auto weight = [&](int64_t b) -> int { return b < n_bid ? R : (int) (n_kv - n_bid * R); };
+    uint32_t prefix = 0;
+    int above = 0;
+    for (int shift = 24; shift >= 0; shift -= 8) {
+#pragma unroll
+        for (int i = lane; i < 256; i += 32) hist[warp][i] = 0;
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+        const uint32_t hi_mask = shift == 24 ? 0u : (0xffffffffu << (shift + 8));
+#pragma unroll
+        for (int j = 0; j < TK_PER; ++j) {
+            const int64_t b = b0 + j;
+            if (b >= b1) break;
+            const int w = weight(b);
+            if (w == 0) continue;
+            if ((key[j] & hi_mask) == (prefix & hi_mask))
+                dpct::atomic_fetch_add<
+                    sycl::access::address_space::generic_space>(
+                    &hist[warp][(key[j] >> shift) & 255], w);
+        }
+        /*
+        DPCT1118:127: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:619: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (t < 256) {                                // fold the warps' histograms into warp 0's
+            int s = 0;
+#pragma unroll
+            for (int w2 = 0; w2 < TK_T / 32; ++w2) s += hist[w2][t];
+            hist[0][t] = s;
+        }
+        /*
+        DPCT1118:128: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:620: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (t == 0) {
+            int cum = above, d = 255;
+#pragma unroll
+            for (; d > 0; --d) {
+                if (cum + hist[0][d] >= width) break;
+                cum += hist[0][d];
+            }
+            s_digit = d;
+            s_above = cum;
+        }
+        /*
+        DPCT1118:129: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:621: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        prefix |= (uint32_t) s_digit << shift;
+        above = s_above;
+        /*
+        DPCT1118:130: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:622: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+    }
+    const uint32_t thr = prefix;
+    const int64_t eq_budget = width - above;
+    int gt = 0, eq = 0;
+#pragma unroll
+    for (int j = 0; j < TK_PER; ++j) {
+        const int64_t b = b0 + j;
+        if (b >= b1) break;
+        const int w = weight(b);
+        if (w == 0) continue;
+        if (key[j] > thr) gt += w;
+        else if (key[j] == thr) eq += w;
+    }
+    int tot;
+    const int eq_before = block_excl_scan(eq, s_warp, tot);
+    int64_t my_eq = eq_budget - eq_before;
+    if (my_eq < 0) my_eq = 0;
+    if (my_eq > eq) my_eq = eq;
+    const int sel = gt + (int) my_eq;
+    int64_t wpos = block_excl_scan(sel, s_warp, tot);
+    int64_t eq_left = my_eq;
+#pragma unroll
+    for (int j = 0; j < TK_PER; ++j) {
+        const int64_t b = b0 + j;
+        if (b >= b1) break;
+        const int w = weight(b);
+        if (w == 0) continue;
+        if (key[j] > thr) {
+#pragma unroll
+            for (int c = 0; c < w; ++c) out[wpos++] = (int32_t)(b * R + c);
+        } else if (key[j] == thr) {
+#pragma unroll
+            for (int c = 0; c < w && eq_left > 0; ++c, --eq_left)
+                out[wpos++] = (int32_t)(b * R + c);
+        }
+    }
+}
+
+}  // namespace
+
+void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx, const int32_t* steps, int64_t nq,
+                      int64_t max_blocks, const QsaShapes& s, float* scores, void* stream, int64_t active_blocks) {
+    if (nq <= 0) return;
+    if (s.idx_dim != IDX_DIM || s.idx_n_head != IDX_HEADS || s.idx_block != R || nq > 65535) {
+        std::fprintf(stderr, "qsa_block_scores: unsupported indexer geometry\n");
+        std::exit(1);
+    }
+    // a block past a query's n_bid returns at once: the grid need only reach the batch's largest n_bid (C-1)
+    const int64_t reach = active_blocks > 0 && active_blocks < max_blocks ? active_blocks : max_blocks;
+    const dpct::dim3 grid((unsigned)((reach + SCORE_WARPS - 1) / SCORE_WARPS),
+                          (unsigned)nq);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class block_scores_kernel_8916c5>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, SCORE_WARPS * 32),
+                                  sycl::range(1, 1, SCORE_WARPS * 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        block_scores_kernel(pooled, dead, q_idx, steps,
+                                            max_blocks, scores);
+                    });
+    }
+    /*
+    DPCT1010:623: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:624: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+bool qsa_block_scores_tc(const float *pooled, const float *dead,
+                         const float *q_idx, const int32_t *steps, int64_t nq,
+                         int64_t max_blocks, const QsaShapes &s, float *scores,
+                         void *stream, int64_t active_blocks) try {
+    if (nq <= 0) return true;
+    if (s.idx_dim != IDX_DIM || s.idx_n_head != IDX_HEADS || s.idx_block != R || nq > 65535 * TC_QT) return false;
+    {   // sm_80 or newer (TF32 MMA); an older card keeps the warp kernel
+        static int cc_major[64] = {};
+        int dev = 0;
+        /*
+        DPCT1026:625: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 ||
+            dev < 0 || dev >= 64) {
+            ; return false;
+        }
+        if (cc_major[dev] == 0) {
+            int major = 0;
+            if (DPCT_CHECK_ERROR(
+                    major = dpct::get_device(dev).get_major_version()) != 0) {
+                /*
+                DPCT1026:626: The call to cudaGetLastError was removed because
+                this functionality is redundant in SYCL.
+                */
+                return false;
+            }
+            cc_major[dev] = major;
+        }
+        (void) cc_major[dev];
+        return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
+    }
+    static bool attr[64] = {};   // the shared-memory opt-in is per device (a layer split runs it on several)
+    int adev = 0;
+    adev = dpct::get_current_device_id();
+    /*
+    DPCT1083:131: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const int bytes = (TC_QT * TC_QS + TC_NB * TC_KS) * (int)sizeof(float);
+    if (!attr[adev]) {
+        /*
+        DPCT1027:627: The call to cudaFuncSetAttribute was replaced with 0
+        because SYCL currently does not support corresponding setting.
+        */
+        if (0 != 0) {
+            /*
+            DPCT1026:628: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            return false;
+        }
+        attr[adev] = true;
+    }
+    const int64_t reach = active_blocks > 0 && active_blocks < max_blocks ? active_blocks : max_blocks;
+    const int64_t per = (int64_t) TC_NB * TC_ITER;
+    const dpct::dim3 grid((unsigned)((reach + per - 1) / per),
+                          (unsigned)((nq + TC_QT - 1) / TC_QT));
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(bytes), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class block_scores_tc_kernel_236d56>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        block_scores_tc_kernel(
+                            pooled, q_idx, steps, nq, max_blocks, reach, scores,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class block_scores_tail_kernel_79a8ce>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
+                                      sycl::range(1, 1, 32),
+                                  sycl::range(1, 1, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        block_scores_tail_kernel(dead, q_idx, steps, max_blocks,
+                                                 scores);
+                    });
+    }
+    /*
+    DPCT1010:629: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:630: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
+                        const QsaShapes& s, int32_t* ids, void* stream) {
+    if (nq <= 0) return;
+    if (s.idx_block != R || cap < qsa_selection_width(kTopkMaxCells, s)) {
+        std::fprintf(stderr, "qsa_block_topk: unsupported geometry or cap\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class block_topk_kernel_52e176>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
+                                      sycl::range(1, 1, TOPK_T),
+                                  sycl::range(1, 1, TOPK_T)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    block_topk_kernel(scores, steps, max_blocks, cap, ids);
+                });
+    }
+    /*
+    DPCT1010:631: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:632: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
+                    const QsaShapes& s, int32_t* ids, void* stream) {
+    // keys in registers when every query's blocks fit (contexts up to ~135K cells); the same ids. STRATA_TOPK_OLD=1:
+    // the kernel that reads them from memory on every pass
+    static const bool old = std::getenv("STRATA_TOPK_OLD") != nullptr;
+    if (nq <= 0) return;
+    if (old || max_blocks > (int64_t) TK_T * TK_PER) {
+        qsa_block_topk_ref(scores, steps, nq, max_blocks, cap, s, ids, stream);
+        return;
+    }
+    if (s.idx_block != R || cap < qsa_selection_width(kTopkMaxCells, s)) {
+        std::fprintf(stderr, "qsa_block_topk: unsupported geometry or cap\n");
+        std::exit(1);
+    }
+    /*
+    DPCT1049:132: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class block_topk_reg_kernel_f7046a>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
+                                      sycl::range(1, 1, TK_T),
+                                  sycl::range(1, 1, TK_T)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        block_topk_reg_kernel(scores, steps, max_blocks, cap,
+                                              ids);
+                    });
+    }
+    /*
+    DPCT1010:633: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:634: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/quantize_act.dp.cpp b/sycl/src/kernels/cuda/quantize_act.dp.cpp
new file mode 100644
index 00000000000..480da5b78bb
--- /dev/null
+++ b/sycl/src/kernels/cuda/quantize_act.dp.cpp
@@ -0,0 +1,424 @@
+// src/kernels/cuda/quantize_act.cu - P2.S2: quantize an activation the way ggml converts src1.
+//
+// WHY THIS EXISTS AT ALL.  `ggml_mul_mat` converts the ACTIVATION (src1) to the weight's `vec_dot_type`
+// before the dot product - the rule established over rounds 119-136 and written into `ref/quant.py` as
+// `apply_src1`.  The CPU expert path already honours it (`bench/micro/cpu_s2.cpp` quantizes to int8 and uses
+// `vpdpbusd`), and its P0.T2 parity passes at 1.461e-06.  The GPU kernels added in rounds 166-177 take FP16
+// activations instead.  **Left that way, the two paths would compute different numbers for different experts
+// of the SAME token** - not a tolerance question, an inconsistency inside one forward pass.
+//
+// Q2_0 IS THE CASE THAT MATTERS: the routed experts are all Q2_0, `Q2_0 -> Q8_0`, and that is 31.64 GiB of the
+// 38 GiB pack.  Q8_K (for the K-quants and IQ4_XS) is the other half of the table and is not here yet.
+//
+// THE THREE SUBTLETIES, each of which was paid for once already and is transcribed rather than recalled:
+//
+//   1. `d32 = amax / 127.0f` is computed in FP32, and the QUANTIZED INTEGERS divide by **d32**, not by the
+//      fp16-rounded value that gets stored.  Conflating the two shifts every quant near a rounding boundary -
+//      measured against ggml's own bytes, 18 of 80 blocks differed, and because Q2_0 experts convert to Q8_0
+//      the error landed in all 48 MoE blocks and made the end-to-end KL WORSE.
+//   2. The reference divides in FLOAT64 (`blk.astype(np.float64) / float(np.float32(d32))`) and rounds with
+//      `rint` - half to even.  This kernel therefore divides in double too: an FP32 division followed by
+//      `rintf` differs from the reference wherever the f32 quotient rounds across a .5 boundary.
+//   3. The DEQUANTIZED value is `q * d16`, the fp16 scale, not `q * d32`.  The block stores fp16 and that is
+//      what a reader multiplies by.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK8_0 = 32;
+
+// THE fp16 CONVERSION LIVES IN `strata/kernels/f16_bits.hpp`, and this file used to carry its own copy.
+//
+// Round 198 found the private copy wrong in a way no fixture here could see: it tested `if (exp >= 31)` to
+// detect an out-of-range exponent, which conflates an f32 INF/NAN (raw exponent 255) with a FINITE value too
+// large for fp16.  Every finite overflow - 1e30, 65536, 1e45 - came back as a NaN instead of saturating to
+// inf, and this file's fixture is O(1) throughout, so it passed.  A numpy-generated oracle caught it on its
+// first run.  Three copies of a converter whose failure mode is silent wrong bits was two copies too many.
+
+__dpct_inline__ void quantize_q8_0_kernel(const float *__restrict__ x,
+                                          uint8_t *__restrict__ blocks,
+                                          long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const float* xb = x + b * QK8_0;
+    uint8_t* out = blocks + b * 34;                 // { fp16 d ; int8 qs[32] }
+
+    float amax = 0.0f;
+#pragma unroll
+    for (int i = 0; i < QK8_0; ++i) amax = sycl::fmax(amax, sycl::fabs(xb[i]));
+    if (amax == 0.0f) {
+        // ggml leaves the block zeroed: d = 0 and every q = 0.  Writing the fp16 zero explicitly rather than
+        // skipping keeps the block layout deterministic for the byte comparison.
+        const uint16_t zb = f16_from_f32(0.0f);
+        out[0] = (uint8_t) (zb & 0xFF);
+        out[1] = (uint8_t) (zb >> 8);
+#pragma unroll
+        for (int i = 0; i < QK8_0; ++i) out[2 + i] = 0;
+        return;
+    }
+    const float d32 = amax / 127.0f;
+    const uint16_t d16bits = f16_from_f32(d32);
+    out[0] = (uint8_t) (d16bits & 0xFF);
+    out[1] = (uint8_t) (d16bits >> 8);
+
+    // double division, matching the reference exactly (subtlety 2)
+    for (int i = 0; i < QK8_0; ++i) {
+        double q = sycl::rint((double)xb[i] / (double)d32);
+        if (q > 127.0) q = 127.0;
+        if (q < -128.0) q = -128.0;
+        out[2 + i] = (uint8_t) (int8_t) q;
+    }
+}
+
+/// **THE HIT PATH'S QUANTIZER, AND IT EXISTS TO REPRODUCE `act_quant_q8_1` EXACTLY (R4.2h, round 331).**
+///
+/// The engine computes every routed expert twice.  MISSES go through `cpu/expert.cpp:138 act_quant_q8_1`
+/// into the VNNI kernel; HITS went through `quantize_q8_0` above.  **Those are not the same quantization**,
+/// and round 330 measured the difference with both real implementations linked
+/// (`bench/micro/act_quant_parity.cu`):
+///
+///     int8 activations differing : 0 of 2560                       <- this rule's ties are measure-zero
+///     chunks whose SCALE differs : 80 of 80, max rel 4.761e-04     <- 2^-11: fp32 vs the block's fp16
+///
+/// The scale is the difference that matters: `ActQ::scale` is `float` and the CPU kernel multiplies by it
+/// (`expert.cpp:92`), while `row_dot_s2_q8` read `f16_at(xb)` out of the `block_q8_0`.  So this variant
+/// writes the SAME 34-byte blocks (the kernel's indexing is unchanged) **and** a parallel fp32 scale array
+/// carrying `d32` unrounded.
+///
+/// It also adopts the CPU's ROUNDING RULE - multiply by the reciprocal, round half AWAY FROM ZERO - rather
+/// than this file's `rint`.  That is deliberate and it is the opposite of the direction the comment above
+/// argues for.  `quantize_q8_0` was tuned to match **ggml's Q8_0 bytes**, which is right for the pack and for
+/// `moe_hit_parity`.  This function's job is different: it must match **this engine's own CPU reference**,
+/// because a hit and a miss for the same expert on the same layer have to produce the same number.  The CPU
+/// path is the reference - C1 passes on it - so the hit path is brought to it, not the reverse.
+__dpct_inline__ void quantize_q8_0_scaled_kernel(const float *__restrict__ x,
+                                                 uint8_t *__restrict__ blocks,
+                                                 float *__restrict__ scales,
+                                                 long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const float* xb = x + b * QK8_0;
+    uint8_t* out = blocks + b * 34;
+
+    float amax = 0.0f;
+#pragma unroll
+    for (int i = 0; i < QK8_0; ++i) amax = sycl::fmax(amax, sycl::fabs(xb[i]));
+    // VERBATIM from `cpu/expert.cpp:144-145`, including the `amax > 0` guard, so the fp32 value written here
+    // is bit-identical to the `s` the CPU path used.
+    const float s = amax > 0.f ? amax / 127.f : 0.f;
+    const float inv = s > 0.f ? 1.f / s : 0.f;
+    scales[b] = s;
+
+    const uint16_t d16bits = f16_from_f32(s);
+    out[0] = (uint8_t) (d16bits & 0xFF);
+    out[1] = (uint8_t) (d16bits >> 8);
+    for (int i = 0; i < QK8_0; ++i) {
+        // VERBATIM from `cpu/expert.cpp:159-162`: reciprocal multiply, then `t + copysign(0.5, t)` truncated
+        // toward zero, which is `lround`'s rule - round half away from zero.
+        const float t = xb[i] * inv;
+        const float r = t + (t >= 0.f ? 0.5f : -0.5f);
+        int v = (int) r;
+        v = v < -127 ? -127 : (v > 127 ? 127 : v);
+        out[2 + i] = (uint8_t) (int8_t) v;
+    }
+}
+
+__dpct_inline__ void dequant_q8_0_kernel(const uint8_t *__restrict__ blocks,
+                                         float *__restrict__ x,
+                                         long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const uint8_t* blk = blocks + b * 34;
+    const uint16_t dbits = (uint16_t) (blk[0] | (blk[1] << 8));
+    const float d = f32_from_f16(dbits);
+    float* out = x + b * QK8_0;
+#pragma unroll
+    for (int i = 0; i < QK8_0; ++i) out[i] = (float)(int8_t)blk[2 + i] * d;
+}
+
+// ===================== Q8_K =====================
+//
+// `block_q8_K` = { float d ; int8_t qs[256] ; int16_t bsums[16] } = 292 bytes, no padding
+// (`static_assert` in ggml-common.h).  QK_K = 256.
+
+constexpr int QK_K = 256;
+constexpr int Q8K_BYTES = 292;
+
+/// ggml's `nearest_int` (ggml-quants.c L621), transcribed rather than replaced.
+///
+/// The magic number is 1.5 * 2^23: adding it forces the mantissa's integer part into the low bits, and the
+/// mask/subtract recover it.  The reason it is transcribed and not written as `rintf` is that the two differ
+/// on exact ties - and that is the whole point of the constant, so a "cleaner" rewrite would silently change
+/// which way ties go.
+__dpct_inline__ int nearest_int_dev(float fval) {
+    const float val = fval + 12582912.0f;
+    int i;
+    memcpy(&i, &val, 4);
+    return (i & 0x007fffff) - 0x00400000;
+}
+
+__dpct_inline__ void quantize_q8_K_kernel(const float *__restrict__ x,
+                                          uint8_t *__restrict__ blocks,
+                                          long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const float* xb = x + b * QK_K;
+    uint8_t* out = blocks + b * Q8K_BYTES;
+    float* d = (float*) out;
+    int8_t* qs = (int8_t*) (out + 4);
+    int16_t* bsums = (int16_t*) (out + 4 + QK_K);
+
+    // `max` is the SIGNED value at the largest magnitude position, and the comparison is STRICTLY greater,
+    // so a tie keeps the FIRST maximum - which is what `np.argmax` does in the reference transcription too.
+    float max = 0.0f, amax = 0.0f;
+    for (int j = 0; j < QK_K; ++j) {
+        const float ax = sycl::fabs(xb[j]);
+        if (ax > amax) {
+            amax = ax;
+            max = xb[j];
+        }
+    }
+    if (amax == 0.0f) {
+        // ggml writes d = 0 and zeroes qs, then `continue`s - which LEAVES bsums UNWRITTEN.  A zeroed block
+        // and an untouched one are indistinguishable to the dot product, but not to a byte comparison, so
+        // this zeroes bsums as well and the parity test's reference does the same.  Recorded because it is a
+        // deliberate divergence from the letter of the source.
+        *d = 0.0f;
+#pragma unroll
+        for (int j = 0; j < QK_K; ++j) qs[j] = 0;
+#pragma unroll
+        for (int j = 0; j < QK_K / 16; ++j) bsums[j] = 0;
+        return;
+    }
+    const float iscale = -127.0f / max;          // -127, NOT -128; see the header
+    for (int j = 0; j < QK_K; ++j) {
+        // `__fmul_rn`, NOT `iscale * xb[j]`.  ggml computes the product, ROUNDS IT TO F32, and then adds
+        // 12582912.0f inside `nearest_int`.  Written as a plain expression, nvcc CONTRACTS the multiply into
+        // the add as an FMA - which is a more accurate product but not the same one, and it flips the result
+        // wherever the true product sits just off a .5 boundary.  The first version of this kernel differed
+        // from the reference in 1 element of 524,288 for exactly this reason, and `__fmul_rn` pins the
+        // rounding step the source actually performs.
+        /*
+        DPCT1013:1066: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        const int v = nearest_int_dev(iscale * xb[j]);
+        qs[j] = (int8_t)sycl::min(
+            127, v); // MIN only - the source has no lower clamp
+    }
+    for (int j = 0; j < QK_K / 16; ++j) {
+        int sum = 0;
+#pragma unroll
+        for (int ii = 0; ii < 16; ++ii) sum += qs[j * 16 + ii];
+        bsums[j] = (int16_t) sum;
+    }
+    *d = 1.0f / iscale;
+}
+
+__dpct_inline__ void dequant_q8_K_kernel(const uint8_t *__restrict__ blocks,
+                                         float *__restrict__ x,
+                                         long long n_blocks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long b =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (b >= n_blocks) return;
+    const uint8_t* blk = blocks + b * Q8K_BYTES;
+    float d;
+    memcpy(&d, blk, 4);
+    const int8_t* qs = (const int8_t*) (blk + 4);
+    float* out = x + b * QK_K;
+#pragma unroll
+    for (int i = 0; i < QK_K; ++i) out[i] = (float)qs[i] * d;
+}
+
+}  // namespace
+
+void quantize_q8_0(const float* x, uint8_t* blocks, int64_t n, void* stream) {
+    if (n <= 0) return;
+    if (n % QK8_0 != 0) {
+        std::fprintf(stderr, "quantize_q8_0: n %lld is not a multiple of %d\n", (long long) n, QK8_0);
+        std::exit(1);
+    }
+    const long long nb = n / QK8_0;
+    const int threads = 128;
+    const unsigned grid = (unsigned) ((nb + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class quantize_q8_0_kernel_5451b9>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    quantize_q8_0_kernel(x, blocks, nb);
+                });
+    }
+    /*
+    DPCT1010:1067: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+/// See `quantize_q8_0_scaled_kernel`.  Writes the same 34-byte `block_q8_0` layout as `quantize_q8_0`, plus
+/// `scales[n/32]` carrying the fp32 `s` the CPU path used - so a hit can be computed with the CPU's
+/// multiplier instead of the block's fp16 `d`.  `scales` must not be null.
+void quantize_q8_0_scaled(const float* x, uint8_t* blocks, float* scales, int64_t n, void* stream) {
+    if (n <= 0) return;
+    if (n % QK8_0 != 0) {
+        std::fprintf(stderr, "quantize_q8_0_scaled: n %lld is not a multiple of %d\n", (long long) n, QK8_0);
+        std::exit(1);
+    }
+    if (scales == nullptr) {
+        std::fprintf(stderr, "quantize_q8_0_scaled: scales is null\n");
+        std::exit(1);
+    }
+    const long long nb = n / QK8_0;
+    const int threads = 128;
+    const unsigned grid = (unsigned) ((nb + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class quantize_q8_0_scaled_kernel_caf6f4>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    quantize_q8_0_scaled_kernel(x, blocks, scales, nb);
+                });
+    }
+    /*
+    DPCT1010:1069: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+void dequant_q8_0(const uint8_t* blocks, float* x, int64_t n, void* stream) {
+    if (n <= 0) return;
+    const long long nb = n / QK8_0;
+    const int threads = 128;
+    const unsigned grid = (unsigned) ((nb + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class dequant_q8_0_kernel_154e61>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    dequant_q8_0_kernel(blocks, x, nb);
+                });
+    }
+    /*
+    DPCT1010:1071: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+void quantize_q8_K(const float* x, uint8_t* blocks, int64_t n, void* stream) {
+    if (n <= 0) return;
+    if (n % QK_K != 0) {
+        std::fprintf(stderr, "quantize_q8_K: n %lld is not a multiple of %d\n", (long long) n, QK_K);
+        std::exit(1);
+    }
+    const long long nb = n / QK_K;
+    const int threads = 64;                       // one block per thread, and a block is 256 elements
+    const unsigned grid = (unsigned) ((nb + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class quantize_q8_K_kernel_7aadb2>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    quantize_q8_K_kernel(x, blocks, nb);
+                });
+    }
+    /*
+    DPCT1010:1073: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+void dequant_q8_K(const uint8_t* blocks, float* x, int64_t n, void* stream) {
+    if (n <= 0) return;
+    const long long nb = n / QK_K;
+    const int threads = 64;
+    const unsigned grid = (unsigned) ((nb + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class dequant_q8_K_kernel_e03426>>(
+                sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    dequant_q8_K_kernel(blocks, x, nb);
+                });
+    }
+    /*
+    DPCT1010:1075: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/rope.dp.cpp b/sycl/src/kernels/cuda/rope.dp.cpp
new file mode 100644
index 00000000000..dfb8847269e
--- /dev/null
+++ b/sycl/src/kernels/cuda/rope.dp.cpp
@@ -0,0 +1,124 @@
+// src/kernels/cuda/rope.cu - P2.S2: NEOX partial RoPE.
+//
+// Semantics from `ref/qsa.py` (`rope_freqs` + `rope_neox`), which `bench/micro/rope_xcheck` validates against
+// the oracle:
+//
+//     inv[i] = theta ** (-2i / n_rot)          i in [0, n_rot/2)
+//     ang    = pos * inv
+//     cos, sin = cos(ang), sin(ang)
+//     out[:half]     = a*cos - b*sin            a = x[:half], b = x[half:n_rot]
+//     out[half:n_rot] = a*sin + b*cos
+//
+// THE PAIRING IS NEOX - (i, i + n_rot/2), NOT the adjacent pair (2i, 2i+1).  `ggml.h` writes NEOX
+// n_dims=8 as [ccccssss]; the adjacent-pair ("NORMAL") ordering is the other common convention and choosing
+// wrongly rotates the wrong dimensions together, which produces correctly-shaped output with scrambled
+// content.  It is also PARTIAL: only the first n_rot of head_dim are touched, here 64 of 256.
+//
+// WHY THE TABLE IS BUILT ON THE HOST.  The reference computes the frequencies in FLOAT64 (`theta ** (...)`
+// on a float64 arange, cos/sin in float64).  Reproducing that on device means double-precision pow and cos,
+// which are slow on a consumer GPU and - more to the point - not guaranteed to agree with the host's libm.
+// Building the table once on the host and passing it in makes the TABLE exactly the reference's values and
+// leaves the kernel a pure rotation, so each half can be checked tightly instead of both halves sharing one
+// loose tolerance.  The engine wants a cached table anyway: it is per (n_rot, theta, position), not per token.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/rope.hpp"
+#include "strata/kernels/mrope.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+
+void build_rope_table(int n_rot, double theta, int max_pos, float* cos_tab, float* sin_tab) {
+    const int half = n_rot / 2;
+    for (int p = 0; p < max_pos; ++p) {
+        for (int i = 0; i < half; ++i) {
+            // float64 throughout, in the reference's order: inv, then ang, then cos/sin
+            const double inv = std::pow(theta, -2.0 * (double) i / (double) n_rot);
+            const double ang = (double) p * inv;
+            cos_tab[(size_t) p * half + i] = (float) std::cos(ang);
+            sin_tab[(size_t) p * half + i] = (float) std::sin(ang);
+        }
+    }
+}
+
+namespace {
+
+// ONE THREAD PER ROW, not per (row, pair).  The first version had one thread per pair and did the tail copy
+// with 	hreadIdx.x strided loops - so up to 32 threads wrote into the SAME row, with no barrier between the
+// copy and the rotation, and a thread's copy of orow[i] could land AFTER another thread had rotated it.  A
+// race that silently writes the unrotated value is worse than a wrong answer: it is intermittent.
+//
+// A row is head_dim floats (256 here) and there are batch x heads of them, so one thread per row is a
+// handful of threads for a token and removes the ordering question entirely rather than synchronising it.
+__dpct_inline__ void rope_neox_kernel(const float *__restrict__ x,
+                                      float *__restrict__ out, long long rows,
+                                      int head_dim, int n_rot,
+                                      const float *__restrict__ cos_tab,
+                                      const float *__restrict__ sin_tab,
+                                      const int *__restrict__ pos,
+                                      const int32_t *__restrict__ mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long r =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (r >= rows) return;
+    const int half = n_rot / 2;
+    const float* xr = x + r * head_dim;
+    float* orow = out + r * head_dim;
+
+#pragma unroll
+    for (int d = n_rot; d < head_dim; ++d)
+        orow[d] = xr[d]; // the PARTIAL rotation's untouched tail
+    for (int i = 0; i < half; ++i) {
+        const size_t toff = (size_t) mrope_pos(mtab, pos[r], i) * half;   // the image path's per-pair position
+        // THE PAIRING AND THE SIGNS COME FROM `rope_neox_pair`, shared with the indexer's pooling kernel.
+        rope_neox_pair(xr[i], xr[half + i], cos_tab[toff + i], sin_tab[toff + i], orow[i], orow[half + i]);
+    }
+}
+
+}  // namespace
+
+void rope_neox_apply(const float* x, float* out, int64_t rows, int head_dim, int n_rot, const float* cos_tab,
+                     const float* sin_tab, const int* pos, void* stream) {
+    if (rows <= 0 || n_rot <= 0) return;
+    if (n_rot % 2 != 0 || n_rot > head_dim) {
+        std::fprintf(stderr, "rope_neox_apply: n_rot %d must be even and <= head_dim %d\n", n_rot, head_dim);
+        std::exit(1);
+    }
+    const int threads = 128;
+    const unsigned grid = (unsigned) ((rows + threads - 1) / threads);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto mrope_table_ct8 = mrope_table();
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class rope_neox_kernel_e291c2>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, threads),
+                                      sycl::range(1, 1, threads)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        rope_neox_kernel(x, out, rows, head_dim, n_rot, cos_tab,
+                                         sin_tab, pos, mrope_table_ct8);
+                    });
+            });
+    }
+    /*
+    DPCT1010:455: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/router_top10.dp.cpp b/sycl/src/kernels/cuda/router_top10.dp.cpp
new file mode 100644
index 00000000000..3bdaf09d0f0
--- /dev/null
+++ b/sycl/src/kernels/cuda/router_top10.dp.cpp
@@ -0,0 +1,394 @@
+// src/kernels/cuda/router_top10.cu - P2.S2: the MoE router.
+//
+// P2.S2's spec: "BF16 GEMV, softmax / top-k / renormalize per docs/semantics.md; emits (expert_id, weight) x 10
+// per token".  This is the softmax/top-k/renormalize half; the BF16 GEMV that produces the logits is a
+// separate kernel and is NOT here.
+//
+// The semantics are transcribed from `ref/moe.py::router`, which is itself transcribed from llama-graph.cpp:
+//
+//     p   = softmax(logits)                       over ALL experts, not over the selected subset
+//     ids = stable argsort(-p)[:k]                ties break by INDEX, ascending
+//     w   = gather(p, ids)
+//     s   = max(sum(w), 2**-14)                   ggml_clamp(..., 2**-14, INF)
+//     return ids, w / s
+//
+// The two-step structure matters and is not cosmetic: computing softmax over the selected subset instead is
+// mathematically identical (softmax is shift-invariant) but it moves the renormalisation, and the CLAMP is
+// part of the renormalisation.  Reproducing the gather form is what makes the clamp land in the same place.
+//
+// WHY THIS IS NO LONGER "NAIVE BY DESIGN", AND WHAT THE OLD REASONING GOT WRONG.
+//
+// The first version was ONE THREAD PER TOKEN: k passes over the experts, each pass recomputing
+// `exp((double) l[e] - mx)` for every expert.  Its comment justified that with
+//
+//     "5,120 operations per token against 2.36e9 weights of expert matvec - three orders of magnitude smaller
+//      than the thing it feeds, so the simplest correct version is also fast enough"
+//
+// **That is a statement about OPERATION COUNT and it says nothing about TIME, because all 5,120 operations were
+// on ONE THREAD while the matvec has thousands.**  Measured (round 218, stage-by-stage inside one block):
+//
+//     moe_layer   4.077 ms      router_top10   3.387 ms      bf16 gemv   0.270 ms
+//
+// 3.39 ms per layer x 48 layers = 163 ms of a 289 ms token - **56% of the whole forward pass, in a kernel that
+// reads 2.6 MB.**  It was invisible in `router_top10_parity` because that test runs the kernel ONCE and checks
+// the right ids, and invisible in every per-layer test for the same reason.
+//
+// WHAT IS PARALLELISED AND WHAT IS DELIBERATELY NOT:
+//
+//   * the MAX is a tree reduction of `fmaxf`, which is exact and order-independent - bit-identical to the
+//     serial scan it replaces;
+//   * the 512 EXPONENTIALS are computed ONCE each, in parallel.  The old kernel computed them ELEVEN TIMES
+//     (once for the softmax, then again inside every one of the k passes).  This is where the 3.4 ms was;
+//   * the DOUBLE SUM is still accumulated on ONE thread in ASCENDING order.  512 double adds is about a
+//     microsecond and it keeps the accumulation order - and therefore the last bits - identical to the
+//     reference-faithful serial version.  Parallelising it would be a free speedup and a silent change to the
+//     values, and the exp was the cost, not this;
+//   * the SELECTION is by RANK rather than by k repeated maxima:
+//
+//         rank(e) = #{ f : p[f] > p[e] }  +  #{ f < e : p[f] == p[e] }
+//
+//     which IS "stable descending argsort, ties by ascending index" - the same order the repeated-maximum loop
+//     produced - computed in ONE parallel pass over the experts instead of k serial ones.  It is O(n^2)
+//     comparisons and that is the right trade here: n = 512, every comparison is independent, and the old
+//     version was O(k*n) with a serial `exp` inside.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/router_top10.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int RT_MAX_THREADS = 512;
+
+/// One BLOCK per token, so the reductions have somewhere to happen.  `n_tokens` is 1 in decode; the grid keeps
+/// the batch case working without a second code path.
+/*
+DPCT1110:101: The total declared local variable size in device function
+router_top10_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void router_top10_kernel(const float *__restrict__ logits,
+                                         int n_tokens, int n_expert, int k,
+                                         int *__restrict__ ids,
+                                         float *__restrict__ weights,
+                                         uint8_t *dpct_local) {
+    // **`s_taken` IS FIRST SO THE OTHER TWO KEEP THEIR ALIGNMENT WITHOUT AN OFFSET PARAMETER**, and `s_p`'s
+    // existing `s_ex + n_expert` stays correct because it is relative to `s_ex`.  One byte per expert.
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto s_raw = (unsigned char *)dpct_local;
+    const size_t taken_bytes = ((size_t) n_expert + 15u) & ~(size_t) 15u;
+    unsigned char* s_taken = s_raw;
+    double* s_ex = (double*) (s_raw + taken_bytes);
+    auto &s_red = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[RT_MAX_THREADS / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_rid = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        int[RT_MAX_THREADS / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_sum = *sycl::ext::oneapi::group_local_memory_for_overwrite<double>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+
+    const int t = item_ct1.get_group(2);
+    if (t >= n_tokens) return;
+    const int tid = item_ct1.get_local_id(2);
+    const int nt = item_ct1.get_local_range(2);
+    const float* l = logits + (size_t) t * n_expert;
+
+    // ---- softmax over ALL experts, for stability: the max.  A tree of `fmaxf` is EXACT and order-independent,
+    // so this is bit-identical to the serial scan.
+    float mx = -INFINITY;
+#pragma unroll
+    for (int e = tid; e < n_expert; e += nt) mx = sycl::fmax(mx, l[e]);
+    /*
+DPCT1108:102: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) mx = sycl::fmax(
+        mx, dpct::experimental::shift_sub_group_left(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                mx, off));
+    if ((tid & 31) == 0) s_red[tid >> 5] = mx;
+    /*
+    DPCT1065:526: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (tid < 32) {
+        const int nw = (nt + 31) >> 5;
+        float v = (tid < nw) ? s_red[tid] : -INFINITY;
+        /*
+DPCT1108:103: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+        for (int off = 16; off > 0; off >>= 1) v = sycl::fmax(
+            v, dpct::experimental::shift_sub_group_left(
+                   0xffffffffu,
+                   sycl::ext::oneapi::this_work_item::get_sub_group(), v, off));
+        if (tid == 0) s_red[0] = v;
+    }
+    /*
+    DPCT1065:527: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    mx = s_red[0];
+
+    // ---- THE 512 EXPONENTIALS, ONCE EACH AND IN PARALLEL.  `exp` in double is software-emulated on this die
+    // and was 5,632 serial calls before; it is 512 parallel ones now.
+#pragma unroll
+    for (int e = tid; e < n_expert; e += nt)
+        s_ex[e] = sycl::exp((double)l[e] - (double)mx);
+    /*
+    DPCT1065:528: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    // ---- the sum, ascending, on one thread: see the note above on why this is NOT parallelised.
+    if (tid == 0) {
+        double sum = 0.0;
+#pragma unroll
+        for (int e = 0; e < n_expert; ++e) sum += s_ex[e];
+        s_sum = sum;
+    }
+    /*
+    DPCT1065:529: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float inv = (float) (1.0 / s_sum);
+
+    // ---- the selection, by rank.  `p[e] = (float)(s_ex[e] * inv)` reproduces the old expression exactly:
+    // `(float)(exp((double) l[e] - (double) mx) * inv)` with `inv` a FLOAT.
+    // ---- p[] ONCE.  The rank loop below compares every expert against every other, so computing
+    // `(float) (s_ex[f] * inv)` INSIDE it did **512 x 512 = 262,144** double multiplies and float converts per
+    // token per layer instead of 512 - and a consumer die runs FP64 at a small fraction of FP32, which is why
+    // this was worth more than the branch.  The shared load stays either way; the ARITHMETIC is what goes.
+    //
+    // THIS IS BIT-IDENTICAL, not merely equivalent: `p[e]` is the same expression it was, computed once instead
+    // of 513 times, and the comparisons then see exactly the same floats.
+    float* s_p = (float*) (s_ex + n_expert);
+#pragma unroll
+    for (int e = tid; e < n_expert; e += nt) s_p[e] = (float)(s_ex[e] * inv);
+    /*
+    DPCT1065:530: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    // ================================ THE SELECTION, IN k PASSES ================================
+    //
+    // **THE RANK-BY-COUNTING LOOP COMPARED EVERY EXPERT AGAINST EVERY OTHER**: 512 x 512 = 262,144 shared
+    // loads and compares per token per layer, to choose ten things out of 512 - measured at 34.35 us, 63% of
+    // `moe_route`'s accounted cost and the largest single item in the R3 plan.  The comment above records that
+    // the FP64 ARITHMETIC inside that loop was hoisted out once already ("262,144 double multiplies per token
+    // per layer instead of 512"); **the O(n^2) STRUCTURE was left, and it is the structure that costs.**
+    //
+    // `k` passes of a block-wide argmax is 10 x 512 = 5,120 compares - **51x less work** - and it produces the
+    // SAME ORDER.  That is the whole correctness argument: scanning `e` ascending with a strict `>` keeps the
+    // LOWEST index on a tie, which is exactly the rule the rank loop spelled out as
+    // `else if (f < e && pf == pe) ++rank`.  A stable descending top-k, ties by index.
+#pragma unroll
+    for (int e = tid; e < n_expert; e += nt) s_taken[e] = 0;
+    /*
+    DPCT1065:531: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    for (int i = 0; i < k; ++i) {
+        float bv = -INFINITY;
+        int bi = n_expert;               // a sentinel that loses to every real index
+        for (int e = tid; e < n_expert; e += nt) {
+            if (s_taken[e]) continue;
+            const float pe = s_p[e];
+            if (pe > bv) { bv = pe; bi = e; }
+        }
+        for (int off = 16; off > 0; off >>= 1) {
+            /*
+            DPCT1108:106: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float ov = dpct::experimental::shift_sub_group_left(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                bv, off);
+            /*
+            DPCT1108:107: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int oi = dpct::experimental::shift_sub_group_left(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                bi, off);
+            if (ov > bv || (ov == bv && oi < bi)) { bv = ov; bi = oi; }
+        }
+        if ((tid & 31) == 0) { s_red[tid >> 5] = bv; s_rid[tid >> 5] = bi; }
+        /*
+        DPCT1118:104: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:533: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (tid < 32) {
+            const int nw = (nt + 31) >> 5;
+            float v = (tid < nw) ? s_red[tid] : -INFINITY;
+            int ix = (tid < nw) ? s_rid[tid] : n_expert;
+            for (int off = 16; off > 0; off >>= 1) {
+                /*
+                DPCT1108:108: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const float ov = dpct::experimental::shift_sub_group_left(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), v, off);
+                /*
+                DPCT1108:109: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const int oi = dpct::experimental::shift_sub_group_left(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), ix,
+                    off);
+                if (ov > v || (ov == v && oi < ix)) { v = ov; ix = oi; }
+            }
+            if (tid == 0 && ix < n_expert) {
+                ids[(size_t) t * k + i] = ix;
+                weights[(size_t) t * k + i] = v;
+                s_taken[ix] = 1;
+            }
+        }
+        /*
+        DPCT1118:105: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:534: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+    }
+    /*
+    DPCT1065:532: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+
+    // ---- renormalise, with ggml's lower clamp.  Order preserved.
+    if (tid == 0) {
+        double s = 0.0;
+#pragma unroll
+        for (int i = 0; i < k; ++i) s += (double)weights[(size_t)t * k + i];
+        const double sc = sycl::fmax(s, 6.103515625e-05); // 2**-14
+#pragma unroll
+        for (int i = 0; i < k; ++i)
+            weights[(size_t) t * k + i] = (float) ((double) weights[(size_t) t * k + i] / sc);
+    }
+}
+
+}  // namespace
+
+void router_top10(const float *logits, int n_tokens, int n_expert, int k,
+                  int *ids, float *weights, void *stream) try {
+    if (n_tokens <= 0 || n_expert <= 0 || k <= 0) return;
+    if (k > 64) {
+        std::fprintf(stderr, "router_top10: k %d exceeds the kernel's 64\n", k);
+        std::exit(1);
+    }
+    if (n_expert > RT_MAX_THREADS * 64) {
+        std::fprintf(stderr, "router_top10: n_expert %d is past the kernel's %d\n", n_expert,
+                     RT_MAX_THREADS * 64);
+        std::exit(1);
+    }
+    int threads = n_expert < RT_MAX_THREADS ? n_expert : RT_MAX_THREADS;
+    threads = (threads + 31) & ~31;                  // at least one full warp, for the reductions
+    // the selection's taken-mask, then n_expert doubles for the exponentials, then n_expert floats for the
+    // probabilities.  The mask is first so the two aligned arrays need no offset parameter.
+    const size_t taken_bytes = ((size_t) n_expert + 15u) & ~(size_t) 15u;
+    const size_t smem =
+        /*
+        DPCT1083:111: The size of local memory in the migrated code may be
+        different from the original code. Check that the allocated memory size
+        in the migrated code is correct.
+        */
+        taken_bytes + (size_t)n_expert * sizeof(double) +
+        (size_t)n_expert * sizeof(float);
+    /*
+    DPCT1049:110: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class router_top10_kernel_3e0655>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_tokens) *
+                                          sycl::range(1, 1, threads),
+                                      sycl::range(1, 1, threads)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        router_top10_kernel(
+                            logits, n_tokens, n_expert, k, ids, weights,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    /*
+    DPCT1010:535: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) {
+        const dpct::err0 s = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
new file mode 100644
index 00000000000..e2f8804cf37
--- /dev/null
+++ b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
@@ -0,0 +1,1352 @@
+// src/kernels/cuda/s2_expert_grouped.cu - R4's grouped GPU expert.  Read the header first.
+//
+// THE ARITHMETIC IS `src/kernels/cpu/expert.cpp`'s, over the same bytes, one warp per output row.
+//
+//     sum_j (c_j - 1) * d_w * xhat_j * d_x   ==   d_w * d_x * ( sum_j c_j*xhat_j  -  sum_j xhat_j )
+//
+// Both sums are INT8 x INT8, so both are `__dp4a` - four multiply-accumulates per instruction, exact in
+// integer and with no dequantization inside the loop.  The weight scale `d_w` is fp16 (one per 64 elements)
+// and the activation scale `d_x` is fp16 (one per 32 elements), so the float work is one multiply-add per
+// 32-element chunk rather than one per element.
+//
+// **THE SUMMATION ORDER IS NOT THE CPU's AND CANNOT BE.**  Lane `L` takes chunks `L, L+32, ...` and the
+// partials are reduced through shuffle; the CPU walks every chunk in order with its own accumulator shape.
+// The two agree to float rounding and not to the bit, which is the same contract `s_gemv_parity` carries for
+// the same reason.  `bench/micro/moe_hit_parity.cu` is the check.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+
+#include "strata/kernels/quantize_act.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+
+namespace strata::kernels {
+namespace {
+
+// THE BLOB'S OWN GEOMETRY, from `include/strata/kernels/cpu/expert.hpp`.  Restated as literals because that
+// header is the CPU path's and this file must not silently follow it if the two ever disagree: the sizes below
+// are what the CPU kernel's indexing computes, and `moe_hit_parity` compares the two end to end.
+constexpr int H = 2560;
+constexpr int FF = 640;
+constexpr int QK = 64;                       // Q2_0's group: one fp16 scale per 64 weights
+constexpr int ROW_GU = H / 4;                // 640 B of codes per gate/up row (2 bits per element)
+constexpr int ROW_D = FF / 4;                // 160 B per down row
+constexpr int SC_GU = H / QK;                // 40 fp16 scales per gate/up row
+constexpr int SC_D = FF / QK;                // 10 per down row
+constexpr size_t O_D_CODES = (size_t) 2 * FF * ROW_GU;
+constexpr size_t O_GU_SCALES = O_D_CODES + (size_t) H * ROW_D;
+constexpr size_t O_D_SCALES = O_GU_SCALES + (size_t) 2 * FF * SC_GU * 2;
+
+__dpct_inline__ float f16_at(const uint8_t *p) {
+    return sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(
+                                        (uint16_t)(p[0] | (p[1] << 8))))
+        .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+
+/// **ONE S2 ROW AGAINST A Q8_0 ACTIVATION, WARP-WIDE.**  Every lane accumulates its own float partial over a
+/// strided set of 32-element chunks and the caller reduces; `chunk` indices are absolute so the caller can
+/// start the lane at any offset.
+///
+/// Returns the lane's partial.  `codes` is `n_in/4` bytes and `scales` `n_in/QK` fp16, both for THIS row.
+///
+/// **`x_scales` IS R4.2h AND IT IS OPTIONAL ON PURPOSE.**  When it is non-null the activation's multiplier
+/// comes from an fp32 array instead of the block's fp16 `d`.  The CPU pool multiplies by the fp32
+/// `ActQ::scale` (`cpu/expert.cpp:92`), and the two disagreed by **4.761e-04 relative on 80 of 80 chunks**
+/// (`bench/micro/act_quant_parity.cu`), which is what made a cache hit compute a different expert from a
+/// cache miss.  Null keeps the previous fp16 behaviour **exactly**, so `moe_hit_parity` - which passes no
+/// scales - still measures the kernel it always measured.
+__dpct_inline__ float
+row_dot_s2_q8(const uint8_t *__restrict__ codes,
+              const uint8_t *__restrict__ scales,
+              const uint8_t *__restrict__ x_q8_0, int n_chunks, int lane,
+              const float *__restrict__ x_scales = nullptr) {
+    float acc = 0.0f;
+    for (int c = lane; c < n_chunks; c += 32) {
+        const uint8_t* cb = codes + (size_t) c * 8;             // 8 code bytes = 32 elements
+        const uint8_t* xb = x_q8_0 + (size_t) c * 34;           // one block_q8_0
+        const float dx = x_scales ? x_scales[c] : f16_at(xb);
+        const int8_t* xq = (const int8_t*) (xb + 2);
+
+        // ---- THE CODES, EXPANDED TO ONE BYTE PER ELEMENT, THEN FOUR AT A TIME INTO `dp4a`.
+        //
+        // The packed form is LSB-first: element 4j+k is bits [2k, 2k+2) of code byte j.  `dp4a` needs both
+        // operands as packed int8, so each code byte becomes a word whose four bytes are its four 2-bit
+        // fields - which is exactly `(c & 3) | ((c>>2)&3)<<8 | ((c>>4)&3)<<16 | ((c>>6)&3)<<24`.
+        int s = 0;      // sum of code * x
+        int hx = 0;     // sum of x        - the weight-independent term, as ones * x
+        const int ones = 0x01010101;
+#pragma unroll
+        for (int j = 0; j < 8; ++j) {
+            const unsigned cbyte = cb[j];
+            const int cw = (int) ((cbyte & 3u) | (((cbyte >> 2) & 3u) << 8) | (((cbyte >> 4) & 3u) << 16) |
+                                  (((cbyte >> 6) & 3u) << 24));
+            // **`memcpy`, NOT A CAST.**  A `block_q8_0` is 34 BYTES - two of header then 32 of int8 - so the
+            // activation data at offset 2 is never 4-byte aligned, and `*(const int*)(xq + 4*j)` faults with
+            // "misaligned address".  It faulted exactly that way on this kernel's first run.  `memcpy` of a
+            // known 4 bytes compiles to whatever load is legal for the alignment, which is the point of using
+            // it rather than reasoning about which cast happens to work.
+            int xw;
+            memcpy(&xw, xq + 4 * j, 4);
+            s = dpct::dp4a(cw, xw, s);
+            hx = dpct::dp4a(ones, xw, hx);
+        }
+        // One weight scale per 64 elements, so per TWO 32-element chunks.
+        const float dw = f16_at(scales + (size_t) (c >> 1) * 2);
+        acc += dw * dx * (float) (s - hx);
+    }
+    return acc;
+}
+
+__dpct_inline__ float warp_sum(float v) {
+#pragma unroll
+    /*
+    DPCT1108:282: '__shfl_down_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    /*
+    DPCT1121:283: Make sure that the "v" which is used in the SYCL group
+    function/algorithm is initialized.
+    */
+    for (int off = 16; off > 0; off >>= 1) v +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            off);
+    return v;
+}
+
+/// GATE AND UP, ONE WARP PER ROW.
+///
+/// **THE ROWS ARE INTERLEAVED AND THE FIRST VERSION OF THIS GOT IT WRONG.**  In the blob, row-SLOT `i` of the
+/// `2*FF` gate/up rows is gate row `i/2` when `i` is even and up row `(i-1)/2` when it is odd - that is what
+/// `O_GU_CODES + (2r)*ROW_GU` and `+ (2r+1)*ROW_GU` mean in `expert.cpp`.  This kernel decoded the correct
+/// code row for slot `i` and then wrote it to output slot `i` of a layout whose first `FF` entries are gate and
+/// whose last `FF` are up, which pairs `silu(gate[r]) * up[r]` with the WRONG `up` for every `r`.  It produced
+/// finite, plausible numbers.  `moe_hit_parity` caught it on the first run, at worst relative error 2.2e+03.
+///
+/// So slot `i` is DECODED from row-slot `i` and WRITTEN to the output slot its parity says it belongs to.
+__dpct_inline__ void
+gu_kernel(const uint8_t *__restrict__ blob_base,
+          const int32_t *__restrict__ slot_index, long long blob_bytes,
+          const uint8_t *__restrict__ x_q8_0,
+          const float *__restrict__ x_scales, float *__restrict__ gate_up,
+          int n_hits, const int32_t *__restrict__ d_count = nullptr,
+          const int32_t *__restrict__ dst_index = nullptr, int tok_div = 0) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long slot = (long long)item_ct1.get_group(2) * warps_per_block +
+                           (item_ct1.get_local_id(2) >> 5);
+    const long long rows_per_hit = 2LL * FF;
+    const long long total = (long long) n_hits * rows_per_hit;
+    if (slot >= total) return;
+    const int h = (int) (slot / rows_per_hit);
+    if (d_count != nullptr && h >= *d_count) return;     // token graph: capacity layout, device count
+    const int i = (int) (slot % rows_per_hit);
+    const int lane = item_ct1.get_local_id(2) & 31;
+
+    const uint8_t* blob = blob_base + (size_t) slot_index[h] * (size_t) blob_bytes;
+    if (tok_div > 0) {   // plan v0.3 P6 verify window: each hit reads its own token's activation
+        const int tok = dst_index[h] / tok_div;
+        x_q8_0 += (size_t) tok * (size_t) (H / 32) * 34;
+        if (x_scales != nullptr) x_scales += (size_t) tok * (size_t) (H / 32);
+    }
+    const float acc = row_dot_s2_q8(blob + (size_t) i * ROW_GU,
+                                    blob + O_GU_SCALES + (size_t) i * SC_GU * 2, x_q8_0, H / 32, lane, x_scales);
+    const float s = warp_sum(acc);
+    if (lane != 0) return;
+    // ---- THE OUTPUT LAYOUT IS GATE-MAJOR, AND THAT IS NOT COSMETIC.
+    //
+    // The first version wrote `gate_up[h*2FF + {0..FF-1}] = gate` and `[h*2FF + FF..] = up`, i.e. a per-hit
+    // [gate | up] pair, and then called the shared `swiglu_kernel` and `quantize_q8_0` over the whole buffer.
+    // Both of those walk a CONTIGUOUS range, so with more than one hit they read hit 0's UP rows where they
+    // wanted hit 1's GATE rows - finite numbers, wrong expert.  With one hit it would have passed.
+    //
+    // Gate-major removes the mismatch instead of adding a stride to two other kernels: every hit's gate rows
+    // are contiguous from 0, every hit's up rows are contiguous from `n_hits * FF`, and the swiglu's output
+    // lands in the first `n_hits * FF` floats exactly where `quantize_q8_0` reads it.
+    const int r = i >> 1;
+    const size_t base = (i & 1) ? ((size_t) n_hits * FF + (size_t) h * FF) : ((size_t) h * FF);
+    gate_up[base + (size_t) r] = s;
+}
+
+/// `silu(gate) * up`, in place, over a GATE-MAJOR buffer: `[0, n_pairs)` is every hit's gate and
+/// `[n_pairs, 2*n_pairs)` is every hit's up, so hit `h`'s row `r` meets itself at `h*FF + r`.
+///
+/// SiLU on the GATE and multiplied by up - the reading `docs/semantics.md` records, and the one that is wrong
+/// the other way round in a way that still produces a finite number.
+__dpct_inline__ void swiglu_kernel(float *__restrict__ gate_up,
+                                   long long n_pairs) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n_pairs) return;
+    const float g = gate_up[i];
+    const float u = gate_up[n_pairs + i];
+    gate_up[i] = (g / (1.0f + sycl::native::exp(-g))) * u;
+}
+
+/// DOWN, ONE WARP PER ROW, reading the quantized intermediate the caller produced.
+///
+/// `dst_index[h]` is which row of the shared output buffer hit `h` fills - see the header.  It is the router's
+/// slot, not `h`, and the two differ on every layer where some experts are resident and some are not.
+__dpct_inline__ void
+down_kernel(const uint8_t *__restrict__ blob_base,
+            const int32_t *__restrict__ slot_index,
+            const int32_t *__restrict__ dst_index, long long blob_bytes,
+            const uint8_t *__restrict__ h_q8_0,
+            const float *__restrict__ h_scales, float *__restrict__ out,
+            int n_hits, const int32_t *__restrict__ d_count = nullptr) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long row = (long long)item_ct1.get_group(2) * warps_per_block +
+                          (item_ct1.get_local_id(2) >> 5);
+    const long long total = (long long) n_hits * H;
+    if (row >= total) return;
+    const int h = (int) (row / H);
+    if (d_count != nullptr && h >= *d_count) return;
+    const int r = (int) (row % H);
+    const int lane = item_ct1.get_local_id(2) & 31;
+
+    const uint8_t* blob = blob_base + (size_t) slot_index[h] * (size_t) blob_bytes;
+    const uint8_t* xb = h_q8_0 + (size_t) h * (size_t) (FF / 32) * 34;
+    const float acc = row_dot_s2_q8(blob + O_D_CODES + (size_t) r * ROW_D,
+                                    blob + O_D_SCALES + (size_t) r * SC_D * 2, xb, FF / 32, lane,
+                                    h_scales ? h_scales + (size_t) h * (size_t) (FF / 32) : nullptr);
+    const float s = warp_sum(acc);
+    if (lane == 0) out[(size_t) dst_index[h] * H + r] = s;
+}
+
+// The CPU subtracts the weight bias after its eight FMA accumulators have been reduced. Moving the
+// subtraction into each integer dot, as the legacy kernel does, changes rounding even with equal scales.
+__dpct_inline__ void activation_correction_kernel(const uint8_t *q8,
+                                                  const float *scales,
+                                                  float *hx, int chunks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= chunks) return;
+    const int8_t* q = (const int8_t*) (q8 + (size_t) c * 34 + 2);
+    int sum = 0;
+#pragma unroll
+    for (int j = 0; j < 32; ++j) sum += q[j];
+    /*
+    DPCT1013:1077: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    hx[c] = scales[c] * (float)sum;
+}
+
+__dpct_inline__ int dot4(const uint8_t *codes, const int8_t *q) {
+    const unsigned c = *codes;
+    const int cw = (int) ((c & 3u) | (((c >> 2) & 3u) << 8) |
+                          (((c >> 4) & 3u) << 16) | (((c >> 6) & 3u) << 24));
+    int xw;
+    memcpy(&xw, q, sizeof xw);
+    return dpct::dp4a(cw, xw, 0);
+}
+
+__dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
+                                        const uint8_t *scales,
+                                        const uint8_t *xq, const float *xs,
+                                        const float *hx, int blocks, int lane) {
+    float acc = 0.0f;
+    float corr = 0.0f;
+    for (int b = 0; b < blocks; ++b) {
+        const float d = f16_at(scales + 2 * b);
+        const int lo = dot4(codes + b * 16 + lane,
+                           (const int8_t*) (xq + (size_t) (2 * b) * 34 + 2) + lane * 4);
+        const int hi = dot4(codes + b * 16 + 8 + lane,
+                           (const int8_t*) (xq + (size_t) (2 * b + 1) * 34 + 2) + lane * 4);
+        /*
+        DPCT1013:1078: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        acc = sycl::fma(d * xs[2 * b], (float)lo, acc);
+        /*
+        DPCT1013:1079: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        acc = sycl::fma(d * xs[2 * b + 1], (float)hi, acc);
+        if (lane == 0)
+            /*
+            DPCT1013:1080: The rounding mode could not be specified and the
+            generated code may have different accuracy than the original code.
+            Verify the correctness. SYCL math built-in function rounding mode is
+            aligned with OpenCL C 1.2 standard.
+            */
+            corr = corr + d * hx[2 * b] + hx[2 * b + 1];
+    }
+    // _mm_add_ps(low128, high128), then two _mm_hadd_ps. The pair order is 4, 1, 2;
+    // a standard shuffle tree in the order 4, 2, 1 is a different floating-point expression.
+    constexpr unsigned mask = 0xffffffffu;
+    /*
+    DPCT1108:284: '__shfl_down_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    /*
+    DPCT1013:1081: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    acc = acc + dpct::experimental::shift_sub_group_left(
+                    mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                    acc, 4, 8);
+    /*
+    DPCT1108:285: '__shfl_down_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    /*
+    DPCT1013:1082: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    acc = acc + dpct::experimental::shift_sub_group_left(
+                    mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                    acc, 1, 8);
+    /*
+    DPCT1108:286: '__shfl_down_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    /*
+    DPCT1013:1083: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    acc = acc + dpct::experimental::shift_sub_group_left(
+                    mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                    acc, 2, 8);
+    /*
+    DPCT1013:1084: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    return acc - corr; // Only lane zero is consumed.
+}
+
+template <bool DOWN>
+__dpct_inline__ void
+cpu_order_projection_kernel(const uint8_t *blob_base, const int32_t *slots,
+                            const int32_t *destinations, long long blob_bytes,
+                            const uint8_t *xq, const float *xs, const float *hx,
+                            float *out, int n_hits) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int rows_per_hit = DOWN ? H : 2 * FF;
+    const int row = item_ct1.get_group(2) * (item_ct1.get_local_range(2) / 8) +
+                    item_ct1.get_local_id(2) / 8;
+    if (row >= n_hits * rows_per_hit) return;
+    const int h = row / rows_per_hit;
+    const int r = row % rows_per_hit;
+    const int lane = item_ct1.get_local_id(2) & 7;
+    const uint8_t* blob = blob_base + (size_t) slots[h] * (size_t) blob_bytes;
+    const int chunks_offset = DOWN ? h * (FF / 32) : 0;
+    const uint8_t* codes = DOWN ? blob + O_D_CODES + (size_t) r * ROW_D : blob + (size_t) r * ROW_GU;
+    const uint8_t* scales = DOWN ? blob + O_D_SCALES + (size_t) r * SC_D * 2
+                                 : blob + O_GU_SCALES + (size_t) r * SC_GU * 2;
+    const float value = row_dot_cpu_order(codes, scales, xq + (size_t) chunks_offset * 34,
+                                           xs + chunks_offset, hx + chunks_offset,
+                                           DOWN ? SC_D : SC_GU, lane);
+    if (lane != 0) return;
+    if (DOWN) out[(size_t) destinations[h] * H + r] = value;
+    else out[((r & 1) ? (size_t) n_hits * FF : 0) + (size_t) h * FF + (r >> 1)] = value;
+}
+
+__dpct_inline__ void cpu_order_swiglu_kernel(float *gu, int pairs) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= pairs) return;
+    const float g = gu[i];
+    // Accurate fp32 exponential; __expf's approximation would introduce an additional source of error.
+    // CPU/GPU libc last-bit differences are diagnosed separately by the micro, not hidden with FP64 here.
+    const float eg = sycl::native::exp(-g);
+    /*
+    DPCT1013:1085: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    gu[i] = g / (1.0f + eg) * gu[pairs + i];
+}
+
+__dpct_inline__ void cpu_order_quantize_kernel(const float *x, uint8_t *blocks,
+                                               float *scales, float *hx,
+                                               int chunks) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= chunks) return;
+    const float* xb = x + c * 32;
+    uint8_t* out = blocks + (size_t) c * 34;
+    float amax = 0.0f;
+#pragma unroll
+    for (int j = 0; j < 32; ++j) amax = sycl::fmax(amax, sycl::fabs(xb[j]));
+    /*
+    DPCT1013:1086: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const float s = amax > 0.0f ? amax / 127.0f : 0.0f;
+    /*
+    DPCT1013:1087: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const float inv = s > 0.0f ? 1.0f / s : 0.0f;
+    scales[c] = s;
+    const uint16_t bits = sycl::bit_cast<unsigned short, sycl::half>(
+        sycl::vec<float, 1>(s)
+            .convert<sycl::half, sycl::rounding_mode::rte>()[0]);
+    out[0] = (uint8_t) bits;
+    out[1] = (uint8_t) (bits >> 8);
+    int sum = 0;
+    for (int j = 0; j < 32; ++j) {
+        /*
+        DPCT1013:1088: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        const float t = xb[j] * inv;
+        /*
+        DPCT1013:1089: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
+        */
+        int v = (int)t + t >= 0.0f ? 0.5f : -0.5f;
+        v = v < -127 ? -127 : (v > 127 ? 127 : v);
+        out[2 + j] = (uint8_t) (int8_t) v;
+        sum += v;
+    }
+    /*
+    DPCT1013:1090: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    hx[c] = s * (float)sum;
+}
+
+constexpr int THREADS = 256;
+
+void check(const char* who, void* stream) {
+    /*
+    DPCT1010:1091: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    // Deliberately NOT synchronising for a non-null stream: this is called once per layer from a captured
+    // graph's worth of work, and `finish()`'s null-stream sync in `s_gemv.cu` is the pattern that made a whole
+    // round of measurements the driver's cost instead of the kernel's (Memory/ERRORS.md RC-7).
+    (void) stream;
+}
+
+}  // namespace
+
+uint64_t moe_hit_grouped_scratch_bytes(int64_t n_hits, int64_t n_embd, int64_t n_ff) {
+    if (n_hits <= 0) return 0;
+    const uint64_t gu = (uint64_t) n_hits * (uint64_t) (2 * n_ff) * 4;
+    const uint64_t q8 = (uint64_t) n_hits * (uint64_t) (n_ff / 32) * 34;
+    // R4.2h: the fp32 scales for the INTERMEDIATE's own quantization, one per 32-element chunk per hit.
+    const uint64_t hs = (uint64_t) n_hits * (uint64_t) (n_ff / 32) * 4;
+    const uint64_t xh = (uint64_t) (n_embd / 32) * 4;
+    return ((gu + 15) & ~15ull) + ((q8 + 15) & ~15ull) + 2 * ((hs + 15) & ~15ull) +
+           ((xh + 15) & ~15ull);
+}
+
+void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, const int32_t* dst_index,
+                        int64_t n_hits, int64_t blob_bytes, const uint8_t* x_q8_0, void* scratch, float* out,
+                        void* stream, const float* x_scales) {
+    if (n_hits <= 0) return;
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const int warps = THREADS / 32;
+
+    const uint64_t gu_bytes = ((uint64_t) n_hits * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
+    const uint64_t q8_bytes = ((uint64_t) n_hits * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
+    float* gate_up = (float*) scratch;
+    uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
+    float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
+
+    // 1. gate + up, one launch for every row of every hit.
+    {
+        const long long rows = n_hits * 2LL * FF;
+        const unsigned blocks = (unsigned) ((rows + warps - 1) / warps);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_feb5f7>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
+                                  x_scales, gate_up, (int)n_hits, nullptr,
+                                  nullptr, 0);
+                    });
+        }
+        check("moe_hit_grouped_s2/gu", stream);
+    }
+    // 2. silu(gate) * up.
+    {
+        const long long pairs = n_hits * (long long) FF;
+        const unsigned blocks = (unsigned) ((pairs + THREADS - 1) / THREADS);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_6bd648>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gate_up, pairs);
+                });
+        }
+        check("moe_hit_grouped_s2/swiglu", stream);
+    }
+    // 3. the intermediate's own contract, which is `ggml_mul_mat`'s rule and NOT a choice: the down weight is
+    //    Q2_0, whose `vec_dot_type` is Q8_0.  `gate_up` holds the pairs; the product went into the first half.
+    //    **R4.2h: the CPU quantizes this intermediate into `a2` with fp32 scales too** (`expert.cpp:232`), so
+    //    when the caller supplies `x_scales` the intermediate gets the CPU's contract as well - otherwise the
+    //    down projection would keep the very disagreement the gate/up projection just had removed.
+    if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, n_hits * (int64_t) FF, stream);
+    else quantize_q8_0(gate_up, h_q8_0, n_hits * (int64_t) FF, stream);
+    // 4. down.
+    {
+        const long long rows = n_hits * (long long) H;
+        const unsigned blocks = (unsigned) ((rows + warps - 1) / warps);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->submit([&](sycl::handler &cgh) {
+                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
+                    x_scales != nullptr ? h_scales : nullptr;
+
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_6b2ba9>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            down_kernel(blob_base, slot_index, dst_index,
+                                        blob_bytes, h_q8_0,
+                                        x_scales_nullptr_h_scales_nullptr_ct5,
+                                        out, (int)n_hits, nullptr);
+                        });
+            });
+        }
+        check("moe_hit_grouped_s2/down", stream);
+    }
+}
+
+namespace {
+// Plan v0.3 P4 token graph: which of this layer's routed experts are resident, decided ON THE DEVICE from the
+// static residency row, so no host step sits between the ring and the hit kernels.  One warp; k <= 32.
+__dpct_inline__ void hit_select_kernel(const int32_t *__restrict__ ids,
+                                       const int32_t *__restrict__ res_row,
+                                       int k, int n_expert,
+                                       int32_t *__restrict__ slot,
+                                       int32_t *__restrict__ dst,
+                                       int32_t *__restrict__ count) {
+    const int lane =
+        sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(2);
+    int s = -1;
+    if (lane < k) {
+        const int e = ids[lane];
+        if (e >= 0 && e < n_expert) s = res_row[e];
+    }
+    const unsigned hit = sycl::reduce_over_group(
+        sycl::ext::oneapi::this_work_item::get_sub_group(),
+        (0xffffffffu &
+         (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                     .get_local_linear_id())) &&
+                s >= 0
+            ? (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                          .get_local_linear_id())
+            : 0,
+        sycl::ext::oneapi::plus<>());
+    if (s >= 0) {
+        const int at = sycl::popcount(hit & ((1u << lane) - 1u));
+        slot[at] = s;
+        dst[at] = lane;
+    }
+    if (lane == 0) *count = sycl::popcount(hit);
+}
+
+// Plan v0.3 P6: the same for up to 128 routed entries (a verify window of T tokens x k): four warps, ballots
+// compacted in entry order.
+__dpct_inline__ void hit_select_multi_kernel(
+    const int32_t *__restrict__ ids, const int32_t *__restrict__ res_row, int n,
+    int n_expert, int32_t *__restrict__ slot, int32_t *__restrict__ dst,
+    int32_t *__restrict__ count) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &warp_count = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[4]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int i = item_ct1.get_local_id(2), lane = i & 31, warp = i >> 5;
+    int s = -1;
+    if (i < n) {
+        const int e = ids[i];
+        if (e >= 0 && e < n_expert) s = res_row[e];
+    }
+    const unsigned hit = sycl::reduce_over_group(
+        sycl::ext::oneapi::this_work_item::get_sub_group(),
+        (0xffffffffu &
+         (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                     .get_local_linear_id())) &&
+                s >= 0
+            ? (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                          .get_local_linear_id())
+            : 0,
+        sycl::ext::oneapi::plus<>());
+    if (lane == 0) warp_count[warp] = sycl::popcount(hit);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    int before = 0;
+#pragma unroll
+    for (int w = 0; w < warp; ++w) before += warp_count[w];
+    if (s >= 0) {
+        const int at = before + sycl::popcount(hit & ((1u << lane) - 1u));
+        slot[at] = s;
+        dst[at] = i;
+    }
+    if (i == 0) *count = warp_count[0] + warp_count[1] + warp_count[2] + warp_count[3];
+}
+
+__dpct_inline__ void add_hits_kernel(float *__restrict__ parts,
+                                     const float *__restrict__ hit_out,
+                                     const int32_t *__restrict__ dst,
+                                     const int32_t *__restrict__ count,
+                                     int n_embd) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int h = item_ct1.get_group(1);
+    if (h >= *count) return;
+    const size_t row = (size_t) dst[h] * (size_t) n_embd;
+#pragma unroll
+    for (int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                 item_ct1.get_local_id(2);
+         i < n_embd;
+         i += item_ct1.get_group_range(2) * item_ct1.get_local_range(2))
+        parts[row + i] += hit_out[row + i];
+}
+}  // namespace
+
+void moe_hit_select(const int32_t* ids, const int32_t* res_row, int k, int n_expert, int32_t* slot, int32_t* dst,
+                    int32_t* count, void* stream) {
+    if (k < 1 || k > 32) { std::fprintf(stderr, "moe_hit_select: k must be 1..32\n"); std::exit(1); }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class hit_select_kernel_62d6cd>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 32), sycl::range(1, 1, 32)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        hit_select_kernel(ids, res_row, k, n_expert, slot, dst,
+                                          count);
+                    });
+    }
+    check("moe_hit_select", stream);
+}
+
+void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index, const int32_t* dst_index,
+                            const int32_t* d_count, int64_t cap, int64_t blob_bytes, const uint8_t* x_q8_0,
+                            void* scratch, float* out, void* stream, const float* x_scales) {
+    if (cap <= 0) return;
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const int warps = THREADS / 32;
+    const uint64_t gu_bytes = ((uint64_t) cap * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
+    const uint64_t q8_bytes = ((uint64_t) cap * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
+    float* gate_up = (float*) scratch;
+    uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
+    float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
+    {
+        const long long rows = cap * 2LL * FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_fd0f96>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
+                                  x_scales, gate_up, (int)cap, d_count, nullptr,
+                                  0);
+                    });
+        }
+        check("moe_hit_grouped_s2_dev/gu", stream);
+    }
+    {
+        const long long pairs = cap * (long long) FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_40adf2>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1,
+                                (unsigned)((pairs + THREADS - 1) / THREADS)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gate_up, pairs);
+                });
+        }
+        check("moe_hit_grouped_s2_dev/swiglu", stream);
+    }
+    if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap * (int64_t) FF, stream);
+    else quantize_q8_0(gate_up, h_q8_0, cap * (int64_t) FF, stream);
+    {
+        const long long rows = cap * (long long) H;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->submit([&](sycl::handler &cgh) {
+                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
+                    x_scales != nullptr ? h_scales : nullptr;
+
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_e2a4a9>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 1,
+                                    (unsigned)((rows + warps - 1) / warps)) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            down_kernel(blob_base, slot_index, dst_index,
+                                        blob_bytes, h_q8_0,
+                                        x_scales_nullptr_h_scales_nullptr_ct5,
+                                        out, (int)cap, d_count);
+                        });
+            });
+        }
+        check("moe_hit_grouped_s2_dev/down", stream);
+    }
+}
+
+void moe_hit_select_multi(const int32_t* ids, const int32_t* res_row, int n, int n_expert, int32_t* slot, int32_t* dst,
+                          int32_t* count, void* stream) {
+    if (n < 1 || n > 128) { std::fprintf(stderr, "moe_hit_select_multi: n must be 1..128\n"); std::exit(1); }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class hit_select_multi_kernel_a381b5>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        hit_select_multi_kernel(ids, res_row, n, n_expert, slot,
+                                                dst, count);
+                    });
+    }
+    check("moe_hit_select_multi", stream);
+}
+
+void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_index, const int32_t* dst_index,
+                              const int32_t* d_count, int64_t cap, int64_t blob_bytes, const uint8_t* x_q8_0,
+                              const float* x_scales, int k_per_token, void* scratch, float* out, void* stream) {
+    if (cap <= 0) return;
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const int warps = THREADS / 32;
+    const uint64_t gu_bytes = ((uint64_t) cap * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
+    const uint64_t q8_bytes = ((uint64_t) cap * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
+    float* gate_up = (float*) scratch;
+    uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
+    float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
+    {
+        const long long rows = cap * 2LL * FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_583c8a>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
+                                  x_scales, gate_up, (int)cap, d_count,
+                                  dst_index, k_per_token);
+                    });
+        }
+        check("moe_hit_grouped_s2_multi/gu", stream);
+    }
+    {
+        const long long pairs = cap * (long long) FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_f4e4db>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1,
+                                (unsigned)((pairs + THREADS - 1) / THREADS)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gate_up, pairs);
+                });
+        }
+        check("moe_hit_grouped_s2_multi/swiglu", stream);
+    }
+    if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap * (int64_t) FF, stream);
+    else quantize_q8_0(gate_up, h_q8_0, cap * (int64_t) FF, stream);
+    {
+        const long long rows = cap * (long long) H;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->submit([&](sycl::handler &cgh) {
+                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
+                    x_scales != nullptr ? h_scales : nullptr;
+
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_1ae146>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1, 1,
+                                    (unsigned)((rows + warps - 1) / warps)) *
+                            sycl::range(1, 1, THREADS),
+                        sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            down_kernel(blob_base, slot_index, dst_index,
+                                        blob_bytes, h_q8_0,
+                                        x_scales_nullptr_h_scales_nullptr_ct5,
+                                        out, (int)cap, d_count);
+                        });
+            });
+        }
+        check("moe_hit_grouped_s2_multi/down", stream);
+    }
+}
+
+namespace {
+// Plan v0.3 P6: experts GROUPED - one blob pointer per group (a VRAM slot or a mapped host blob read over PCIe),
+// every entry of the group (a token routed to that expert) computed from ONE read of each row.  Per entry the
+// arithmetic is `row_dot_s2_q8`'s, chunk by chunk in the same lane order, so every entry is bitwise the per-entry
+// hit kernel's.
+constexpr int GU_CHUNKS = (H / 32 + 31) / 32;   // 3: chunks of a gate/up row per lane (80 chunks / 32 lanes)
+constexpr int GMAX = 8;                          // entries per group (tokens routed to one expert in a window)
+constexpr int GU_ROWS = 32;                      // gate/up rows per block: 4 per warp
+constexpr int D_ROWS = 64;                       // down rows per block: 8 per warp
+
+// One activation chunk's contribution, `row_dot_s2_q8`'s inner body with the 32 int8 of the chunk already in
+// aligned words: same dp4a sequence, same float expression, so the result is bitwise the per-entry kernel's.
+__dpct_inline__ float chunk_dot(sycl::uint2 cb, const int *xw, float dw,
+                                float dx) {
+    const uint8_t* cbytes = (const uint8_t*) &cb;
+    int s = 0, hx = 0;
+    const int ones = 0x01010101;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) {
+        const unsigned cbyte = cbytes[j];
+        const int cw = (int) ((cbyte & 3u) | (((cbyte >> 2) & 3u) << 8) | (((cbyte >> 4) & 3u) << 16) |
+                              (((cbyte >> 6) & 3u) << 24));
+        s = dpct::dp4a(cw, xw[j], s);
+        hx = dpct::dp4a(ones, xw[j], hx);
+    }
+    return dw * dx * (float) (s - hx);
+}
+
+// Gate/up: a block = GU_ROWS rows of ONE group.  The group's activations (each entry's token row of x_q8_0 and
+// its fp32 scales) are staged once into shared memory as aligned words; each warp then walks its rows, loading
+// each lane's code chunks once and dotting them with every entry.
+/*
+DPCT1110:287: The total declared local variable size in device function
+gu_grouped_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gu_grouped_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_tok, const uint8_t *__restrict__ x_q8_0,
+    const float *__restrict__ x_scales, float *__restrict__ gate_up,
+    int cap_entries) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &xs_q =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<int[GMAX][H / 4]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<
+            3>()); // the entries' int8 activations as words (2560 B each)
+    auto &xs_d = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[GMAX][H / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int e0 = grp_start[g], ne = sycl::min(grp_start[g + 1] - e0, GMAX);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    for (int i = t; i < ne * (H / 32); i += item_ct1.get_local_range(2)) {
+        const int k = i / (H / 32), c = i - k * (H / 32);
+        const uint8_t* xb = x_q8_0 + (size_t) ent_tok[e0 + k] * (size_t) (H / 32) * 34 + (size_t) c * 34;
+        xs_d[k][c] = x_scales ? x_scales[(size_t) ent_tok[e0 + k] * (H / 32) + c] : f16_at(xb);
+        const int8_t* q = (const int8_t*) (xb + 2);
+#pragma unroll
+        for (int w = 0; w < 8; ++w) {
+            int v;
+            memcpy(&v, q + 4 * w, 4);
+            xs_q[k][c * 8 + w] = v;
+        }
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int row0 = item_ct1.get_group(2) * GU_ROWS;
+    for (int rr = warp; rr < GU_ROWS; rr += 8) {
+        const int i = row0 + rr;
+        const uint8_t* codes = blob + (size_t) i * ROW_GU;
+        const uint8_t* scales = blob + O_GU_SCALES + (size_t) i * SC_GU * 2;
+        sycl::uint2 cb[GU_CHUNKS];
+        float dw[GU_CHUNKS];
+#pragma unroll
+        for (int q = 0; q < GU_CHUNKS; ++q) {
+            const int c = lane + 32 * q;
+            if (c < H / 32) {
+                cb[q] = *(const sycl::uint2 *)(codes + (size_t)c * 8);
+                dw[q] = f16_at(scales + (size_t) (c >> 1) * 2);
+            }
+        }
+        for (int k = 0; k < ne; ++k) {
+            float acc = 0.0f;
+#pragma unroll
+            for (int q = 0; q < GU_CHUNKS; ++q) {
+                const int c = lane + 32 * q;
+                if (c >= H / 32) break;
+                acc += chunk_dot(cb[q], &xs_q[k][c * 8], dw[q], xs_d[k][c]);
+            }
+            const float sum = warp_sum(acc);
+            if (lane == 0) {
+                const int e = e0 + k, r = i >> 1;
+                const size_t base = (i & 1) ? ((size_t) cap_entries * FF + (size_t) e * FF) : ((size_t) e * FF);
+                gate_up[base + (size_t) r] = sum;
+            }
+        }
+    }
+}
+
+// Down: a block = D_ROWS rows of ONE group; the entries' quantized intermediates staged once.  A down row is 20
+// chunks, so lanes 0..19 each hold one chunk, as in the per-entry kernel.
+__dpct_inline__ void down_grouped_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_dst, const uint8_t *__restrict__ h_q8_0,
+    const float *__restrict__ h_scales, float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &hs_q =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<int[GMAX][FF / 4]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &hs_d = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[GMAX][FF / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int e0 = grp_start[g], ne = sycl::min(grp_start[g + 1] - e0, GMAX);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    for (int i = t; i < ne * (FF / 32); i += item_ct1.get_local_range(2)) {
+        const int k = i / (FF / 32), c = i - k * (FF / 32);
+        const uint8_t* xb = h_q8_0 + (size_t) (e0 + k) * (size_t) (FF / 32) * 34 + (size_t) c * 34;
+        hs_d[k][c] = h_scales ? h_scales[(size_t) (e0 + k) * (FF / 32) + c] : f16_at(xb);
+        const int8_t* q = (const int8_t*) (xb + 2);
+#pragma unroll
+        for (int w = 0; w < 8; ++w) {
+            int v;
+            memcpy(&v, q + 4 * w, 4);
+            hs_q[k][c * 8 + w] = v;
+        }
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int row0 = item_ct1.get_group(2) * D_ROWS;
+    for (int rr = warp; rr < D_ROWS; rr += 8) {
+        const int r = row0 + rr;
+        const uint8_t* codes = blob + O_D_CODES + (size_t) r * ROW_D;
+        const uint8_t* scales = blob + O_D_SCALES + (size_t) r * SC_D * 2;
+        const int c = lane;
+        sycl::uint2 cb = sycl::uint2(0, 0);
+        float dw = 0.0f;
+        if (c < FF / 32) {
+            cb = *(const sycl::uint2 *)(codes + (size_t)c * 8);
+            dw = f16_at(scales + (size_t) (c >> 1) * 2);
+        }
+        for (int k = 0; k < ne; ++k) {
+            float acc = 0.0f;
+            if (c < FF / 32) acc += chunk_dot(cb, &hs_q[k][c * 8], dw, hs_d[k][c]);
+            const float sum = warp_sum(acc);
+            if (lane == 0) out[(size_t) ent_dst[e0 + k] * H + r] = sum;
+        }
+    }
+}
+}  // namespace
+
+namespace {
+// Plan v0.3 P6: groups built on the device when every expert is resident at `base + id * blob` (the MTP layer):
+// one block of 128 threads, groups in first-appearance order, entries of a group in routing order.
+__dpct_inline__ void group_resident_kernel(
+    const int32_t *__restrict__ ids, int n, int k_per_tok, const uint8_t *base,
+    long long blob, unsigned long long *__restrict__ grp_ptr,
+    int32_t *__restrict__ grp_start, int32_t *__restrict__ counts,
+    int32_t *__restrict__ ent_dst, int32_t *__restrict__ ent_tok) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &e_s = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[128]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &first_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[128]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &size_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[128]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &gidx_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[128]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &gstart_s =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[129]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int i = item_ct1.get_local_id(2);
+    const int e = i < n ? ids[i] : -1;
+    e_s[i] = e;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    int first = i, rank = 0, size = 0;
+    if (i < n) {
+#pragma unroll
+        for (int j = 0; j < i; ++j)
+            if (e_s[j] == e) { if (first == i) first = j; ++rank; }
+        if (first == i)
+#pragma unroll
+            for (int j = i; j < n; ++j) size += e_s[j] == e;
+    }
+    first_s[i] = first;
+    size_s[i] = (i < n && first == i) ? size : 0;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (i == 0) {
+        int gi = 0, acc = 0;
+#pragma unroll
+        for (int j = 0; j < n; ++j)
+            if (first_s[j] == j) {
+                gidx_s[j] = gi;
+                gstart_s[gi] = acc;
+                grp_ptr[gi] = (unsigned long long) (base + (size_t) e_s[j] * (size_t) blob);
+                grp_start[gi] = acc;
+                acc += size_s[j];
+                ++gi;
+            }
+        grp_start[gi] = acc;
+        counts[0] = gi;
+        counts[1] = acc;
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (i < n) {
+        const int at = gstart_s[gidx_s[first]] + rank;
+        ent_dst[at] = i;
+        ent_tok[at] = i / k_per_tok;
+    }
+}
+}  // namespace
+
+void moe_group_resident(const int32_t* ids, int n, int k_per_tok, const uint8_t* base, int64_t blob,
+                        unsigned long long* grp_ptr, int32_t* grp_start, int32_t* counts, int32_t* ent_dst,
+                        int32_t* ent_tok, void* stream) {
+    if (n < 1 || n > 128) { std::fprintf(stderr, "moe_group_resident: n must be 1..128\n"); std::exit(1); }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class group_resident_kernel_937b58>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    group_resident_kernel(ids, n, k_per_tok, base,
+                                          (long long)blob, grp_ptr, grp_start,
+                                          counts, ent_dst, ent_tok);
+                });
+    }
+    check("moe_group_resident", stream);
+}
+
+void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start, const int32_t* n_groups,
+                    const int32_t* ent_dst, const int32_t* ent_tok, int64_t cap_groups, int64_t cap_entries,
+                    const uint8_t* x_q8_0, const float* x_scales, void* scratch, float* out, void* stream) {
+    if (cap_groups <= 0 || cap_entries <= 0) return;
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const uint64_t gu_bytes = ((uint64_t) cap_entries * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
+    const uint64_t q8_bytes = ((uint64_t) cap_entries * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
+    float* gate_up = (float*) scratch;
+    uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
+    float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
+    {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_grouped_kernel_393d46>>(
+                sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
+                                              (unsigned)(2 * FF / GU_ROWS)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_grouped_kernel(grp_ptr, grp_start, n_groups, ent_tok,
+                                          x_q8_0, x_scales, gate_up,
+                                          (int)cap_entries);
+                    });
+        }
+        check("moe_grouped_s2/gu", stream);
+    }
+    {
+        const long long pairs = cap_entries * (long long) FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_2292bf>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1,
+                                (unsigned)((pairs + THREADS - 1) / THREADS)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gate_up, pairs);
+                });
+        }
+        check("moe_grouped_s2/swiglu", stream);
+    }
+    if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap_entries * (int64_t) FF, stream);
+    else quantize_q8_0(gate_up, h_q8_0, cap_entries * (int64_t) FF, stream);
+    {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->submit([&](sycl::handler &cgh) {
+                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
+                    x_scales != nullptr ? h_scales : nullptr;
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class down_grouped_kernel_f03334>>(
+                    sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
+                                                  (unsigned)(H / D_ROWS)) *
+                                          sycl::range(1, 1, 256),
+                                      sycl::range(1, 1, 256)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            down_grouped_kernel(
+                                grp_ptr, grp_start, n_groups, ent_dst, h_q8_0,
+                                x_scales_nullptr_h_scales_nullptr_ct5, out);
+                        });
+            });
+        }
+        check("moe_grouped_s2/down", stream);
+    }
+}
+
+void moe_hit_add(float* parts, const float* hit_out, const int32_t* dst, const int32_t* count, int64_t cap,
+                 int64_t n_embd, void* stream) {
+    if (cap <= 0) return;
+    const dpct::dim3 grid(
+        (unsigned)((n_embd + 255) / 256 < 8 ? (n_embd + 255) / 256 : 8),
+        (unsigned)cap);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class add_hits_kernel_9d7642>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    add_hits_kernel(parts, hit_out, dst, count, (int)n_embd);
+                });
+    }
+    check("moe_hit_add", stream);
+}
+
+void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
+                                  const int32_t *slot_index,
+                                  const int32_t *dst_index, int64_t n_hits,
+                                  int64_t blob_bytes, const uint8_t *x_q8_0,
+                                  void *scratch, float *out, void *stream,
+                                  const float *x_scales,
+                                  float *gate_up_trace) try {
+    if (n_hits <= 0) return;
+    if (x_scales == nullptr) {
+        std::fprintf(stderr, "moe_hit_grouped_s2_cpu_order requires fp32 activation scales\n");
+        std::exit(1);
+    }
+    dpct::queue_ptr cs = strata::q_of(stream);
+    const uint64_t gu_bytes = ((uint64_t) n_hits * 2 * FF * 4 + 15) & ~15ull;
+    const uint64_t q8_bytes = ((uint64_t) n_hits * (FF / 32) * 34 + 15) & ~15ull;
+    const uint64_t scale_bytes = ((uint64_t) n_hits * (FF / 32) * 4 + 15) & ~15ull;
+    float* gu = (float*) scratch;
+    uint8_t* hq = (uint8_t*) scratch + gu_bytes;
+    float* hs = (float*) (hq + q8_bytes);
+    float* hh = (float*) ((uint8_t*) hs + scale_bytes);
+    float* xh = (float*) ((uint8_t*) hh + scale_bytes);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->submit([&](sycl::handler &cgh) {
+            auto H_ct3 = H / 32;
+
+            cgh.parallel_for<
+                dpct_kernel_name<class activation_correction_kernel_f8a161>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (H / 32 + THREADS - 1) / THREADS) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    activation_correction_kernel(x_q8_0, x_scales, xh, H_ct3);
+                });
+        });
+    }
+    check("cpu_order/input_correction", stream);
+    const int rows_per_block = THREADS / 8;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->parallel_for<
+            dpct_kernel_name<class cpu_order_projection_kernel_ca15a9,
+                             dpct_kernel_scalar<false>>>(
+            sycl::nd_range<3>(
+                sycl::range(1, 1,
+                            (unsigned)((n_hits * 2 * FF + rows_per_block - 1) /
+                                       rows_per_block)) *
+                    sycl::range(1, 1, THREADS),
+                sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                cpu_order_projection_kernel<false>(
+                    blob_base, slot_index, dst_index, blob_bytes, x_q8_0,
+                    x_scales, xh, gu, (int)n_hits);
+            });
+    }
+    check("cpu_order/gate_up", stream);
+    if (gate_up_trace != nullptr &&
+        /*
+        DPCT1124:1093: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(cs->memcpy(
+            gate_up_trace, gu, (size_t)n_hits * 2 * FF * sizeof(float))) != 0) {
+        std::fprintf(stderr, "cpu_order/gate_up_trace copy failed\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->submit([&](sycl::handler &cgh) {
+            auto int_n_hits_FF_ct1 = (int)n_hits * FF;
+
+            cgh.parallel_for<
+                dpct_kernel_name<class cpu_order_swiglu_kernel_883f7b>>(
+                sycl::nd_range<3>(
+                    sycl::range(
+                        1, 1,
+                        (unsigned)((n_hits * FF + THREADS - 1) / THREADS)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    cpu_order_swiglu_kernel(gu, int_n_hits_FF_ct1);
+                });
+        });
+    }
+    check("cpu_order/swiglu", stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->submit([&](sycl::handler &cgh) {
+            auto int_n_hits_FF_ct4 = (int)n_hits * (FF / 32);
+
+            cgh.parallel_for<
+                dpct_kernel_name<class cpu_order_quantize_kernel_813a16>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1,
+                                (unsigned)((n_hits * (FF / 32) + THREADS - 1) /
+                                           THREADS)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    cpu_order_quantize_kernel(gu, hq, hs, hh,
+                                              int_n_hits_FF_ct4);
+                });
+        });
+    }
+    check("cpu_order/intermediate_quantize", stream);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->parallel_for<
+            dpct_kernel_name<class cpu_order_projection_kernel_7f4897,
+                             dpct_kernel_scalar<true>>>(
+            sycl::nd_range<3>(
+                sycl::range(1, 1,
+                            (unsigned)((n_hits * H + rows_per_block - 1) /
+                                       rows_per_block)) *
+                    sycl::range(1, 1, THREADS),
+                sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                cpu_order_projection_kernel<true>(blob_base, slot_index,
+                                                  dst_index, blob_bytes, hq, hs,
+                                                  hh, out, (int)n_hits);
+            });
+    }
+    check("cpu_order/down", stream);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s2_gemv.dp.cpp b/sycl/src/kernels/cuda/s2_gemv.dp.cpp
new file mode 100644
index 00000000000..d7e2fafd68e
--- /dev/null
+++ b/sycl/src/kernels/cuda/s2_gemv.dp.cpp
@@ -0,0 +1,85 @@
+// src/kernels/cuda/s2_gemv.cu - P2.S2: the S2 GEMV, one thread per output row.
+//
+// Naive per the phase rule: dequantize on the fly, FP32 accumulation inside the row, no shared memory, no
+// vector loads, no __ldg hints.  Phase 3 changes this file; the parity test is what says whether a change is
+// still right.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/s2_gemv.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK = 64;
+
+__dpct_inline__ void s2_gemv_kernel(const uint16_t *__restrict__ x,
+                                    const uint8_t *__restrict__ codes,
+                                    const float *__restrict__ scales,
+                                    float *__restrict__ y, long long n_in,
+                                    long long n_out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long o =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (o >= n_out) return;
+
+    const long long nb = n_in / QK;
+    const uint8_t* c = codes + o * nb * (QK / 4);
+    const float* s = scales + o * nb;
+
+    float acc = 0.0f;
+    for (long long b = 0; b < nb; ++b) {
+        const float d = s[b];
+        const uint8_t* cb = c + b * (QK / 4);
+        const uint16_t* xb = x + b * QK;
+        for (int j = 0; j < QK; ++j) {
+            // (code - 1) in the INTEGER domain, then the group scale, then the activation; the CPU reference
+            // below is written in the same order so the two differ only by floating-point contraction.
+            const int code = (cb[j >> 2] >> ((j & 3) * 2)) & 0x03;
+            acc += (float)(code - 1) * d *
+                   sycl::vec<sycl::half, 1>(
+                       sycl::bit_cast<sycl::half, unsigned short>(xb[j]))
+                       .convert<float, sycl::rounding_mode::automatic>()[0];
+        }
+    }
+    y[o] = acc;
+}
+
+}  // namespace
+
+void s2_gemv(const uint16_t *x, const uint8_t *codes, const float *scales,
+             float *y, int64_t n_in, int64_t n_out) try {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (n_in % QK != 0) {
+        std::fprintf(stderr, "s2_gemv: n_in %lld is not a multiple of %d\n", (long long) n_in, QK);
+        std::exit(1);
+    }
+    const int threads = 128;
+    const long long blocks = (n_out + threads - 1) / threads;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        dpct::get_in_order_queue()
+            .parallel_for<dpct_kernel_name<class s2_gemv_kernel_163eb8>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s2_gemv_kernel(x, codes, scales, y, n_in, n_out);
+                });
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
new file mode 100644
index 00000000000..4db6c40a7bf
--- /dev/null
+++ b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
@@ -0,0 +1,250 @@
+// src/kernels/cuda/s2_gemv_fast.cu - two levers on the hottest kernel, BOTH MEASURED NEGATIVE OR NEUTRAL.
+//
+// *** THIS FILE IS NAMED "fast" AND IS NOT FASTER.  DO NOT ADOPT IT AS THE FAST PATH. ***
+// It is kept because the negative result is worth more than the file costs: it closes two plausible
+// optimisations and it is the experiment that established the measurement floor.
+//
+// L5 got the S2 GEMV from 10.5 to 86.2 G weights/s by amortising the loads, and left the instruction-count
+// argument confirmed but unfinished.  Two further reductions were obvious, so both were built and measured:
+//
+// LEVER 1 - STAGE `x` IN SHARED MEMORY.  `x` is n_in halves (5 KB at n_embd 2560) and every output row reads
+// all of it, so the generic kernel issues n_out * n_in activation loads per GEMV.  Staging it once per block
+// measured WORSE in every single paired comparison (59-76 G w/s staged against 64-87 G w/s unstaged, across
+// four sweep passes and three thread counts).  The __syncthreads and the copy cost more than the L1/L2 hits
+// they replace - the same 5 KB is already resident and already broadcast.
+//
+// LEVER 2 - A CONSTANT-MEMORY CODE TABLE.  Turn the per-element shifts, masks and int-to-float convert into
+// one broadcast `float4` load per four elements.  Measured NEUTRAL: the two orderings swap between passes
+// with no consistent winner.
+//
+// WHY THE NEGATIVE RESULT IS THE REAL FINDING: run-to-run variance on this machine is now ~20% within a
+// single configuration (quads tpr=32 measured 64.3 to 79.5 G w/s across four passes), because `verify` holds
+// ~97% of six CPU cores.  **The noise floor now EXCEEDS the effect sizes being chased**, so further
+// micro-optimisation of this kernel cannot be evaluated here and should wait for a quiet machine rather than
+// produce more numbers that cannot be distinguished from noise.
+//
+// Both changes alter the summation order or the expression, so this kernel is checked against the naive
+// reference like every other one - being faster is never a reason to be trusted, and being neutral is not
+// either.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/s_gemv.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK_S2 = 64;
+constexpr int MAX_SHARED_HALVES = 4096;      // 8 KB of shared for x; n_embd 2560 fits with room
+
+// byte -> the four code values with the -1 bias already applied, in element order (bits 0,2,4,6).
+inline dpct::constant_memory<float, 2> c_codes(256, 4);
+
+bool g_lut_ready[64] = {};   // per device: __constant__ memory is per device (a layer split runs on two)
+
+void ensure_lut() try {
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    if (dev < 0 || dev >= 64) dev = 0;
+    if (g_lut_ready[dev]) return;
+    float host[256][4];
+    for (int b = 0; b < 256; ++b) {
+        for (int k = 0; k < 4; ++k) {
+            host[b][k] = (float) (((b >> (2 * k)) & 3) - 1);
+        }
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memcpy(c_codes.get_ptr(), host, sizeof(host))
+                             .wait());
+
+    g_lut_ready[dev] = true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// One block per output row.  `staged` says whether x was copied to shared, so the SAME kernel covers both
+// configurations and the bench can measure them against each other with nothing else changed.
+template <bool STAGE_X>
+/*
+DPCT1110:224: The total declared local variable size in device function
+s2_gemv_fast_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void s2_gemv_fast_kernel(
+    const uint16_t *__restrict__ x, const uint8_t *__restrict__ codes,
+    const float *__restrict__ scales, float *__restrict__ y, long long n_in,
+    long long n_out, int threads_per_row, uint8_t *dpct_local,
+    dpct::accessor<float, dpct::constant, 2> c_codes) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto smem = (float *)dpct_local;
+    sycl::half *sx = reinterpret_cast<sycl::half *>(
+        smem); // [threads_per_row, ...] partials live after
+    float* partial = smem + (STAGE_X ? (MAX_SHARED_HALVES / 2) : 0);
+
+    const long long o = item_ct1.get_group(2);
+    if (o >= n_out) return;
+    const int tid = item_ct1.get_local_id(2);
+
+    if (STAGE_X) {
+        const sycl::half *xh = reinterpret_cast<const sycl::half *>(x);
+#pragma unroll
+        for (long long i = tid; i < n_in; i += threads_per_row) sx[i] = xh[i];
+        /*
+        DPCT1118:225: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+
+    const long long n_quads = n_in / 4;
+    const uint8_t* c = codes + o * n_quads;
+    const float* s = scales + o * (n_in / QK_S2);
+
+    float a0 = 0.0f, a1 = 0.0f, a2 = 0.0f, a3 = 0.0f;
+    for (long long q = tid; q < n_quads; q += threads_per_row) {
+        const uint8_t byte = c[q];                          // ONE load for four codes
+        const float d = s[q >> 4];                          // (q*4) >> 6
+        const sycl::float4 cv = *reinterpret_cast<const sycl::float4 *>(
+            &c_codes[byte][0]); // one broadcast load
+        if (STAGE_X) {
+            const sycl::half2 h01 =
+                *reinterpret_cast<const sycl::half2 *>(&sx[q * 4]);
+            const sycl::half2 h23 =
+                *reinterpret_cast<const sycl::half2 *>(&sx[q * 4 + 2]);
+            a0 += cv.x() * d * h01[0];
+            a1 += cv.y() * d * h01[1];
+            a2 += cv.z() * d * h23[0];
+            a3 += cv.w() * d * h23[1];
+        } else {
+            const sycl::uint2 xw2 =
+                *reinterpret_cast<const sycl::uint2 *>(x + q * 4);
+            const sycl::half2 h01 =
+                *reinterpret_cast<const sycl::half2 *>(&xw2.x());
+            const sycl::half2 h23 =
+                *reinterpret_cast<const sycl::half2 *>(&xw2.y());
+            a0 += cv.x() * d * h01[0];
+            a1 += cv.y() * d * h01[1];
+            a2 += cv.z() * d * h23[0];
+            a3 += cv.w() * d * h23[1];
+        }
+    }
+    partial[tid] = (a0 + a1) + (a2 + a3);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int step = threads_per_row / 2; step > 0; step >>= 1) {
+        if (tid < step) partial[tid] += partial[tid + step];
+        /*
+        DPCT1118:226: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    if (tid == 0) y[o] = partial[0];
+}
+
+}  // namespace
+
+void s2_gemv_fast(const uint16_t *x, const uint8_t *codes, const float *scales,
+                  float *y, int64_t n_in, int64_t n_out, int threads_per_row,
+                  bool stage_x) try {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (n_in % 4 != 0 || n_in % QK_S2 != 0) {
+        std::fprintf(stderr, "s2_gemv_fast: n_in %lld must be a multiple of %d\n", (long long) n_in, QK_S2);
+        std::exit(1);
+    }
+    ensure_lut();
+    if (stage_x && n_in > MAX_SHARED_HALVES) {
+        std::fprintf(stderr, "s2_gemv_fast: n_in %lld exceeds the %d-half shared staging limit\n",
+                     (long long) n_in, MAX_SHARED_HALVES);
+        std::exit(1);
+    }
+    /*
+    DPCT1083:228: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (stage_x ? MAX_SHARED_HALVES * sizeof(sycl::half) : 0) +
+                        (size_t)threads_per_row * sizeof(float);
+    if (stage_x) {
+        /*
+        DPCT1049:227: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        c_codes.init();
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(dpct::get_in_order_queue().get_device(),
+                                     {sycl::aspect::fp16});
+
+        dpct::get_in_order_queue().submit([&](sycl::handler &cgh) {
+            sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                sycl::range(smem), cgh);
+            auto c_codes_acc_ct1 = c_codes.get_access(cgh);
+
+            cgh.parallel_for<dpct_kernel_name<class s2_gemv_fast_kernel_3b9618,
+                                              dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *
+                                      sycl::range(1, 1, threads_per_row),
+                                  sycl::range(1, 1, threads_per_row)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s2_gemv_fast_kernel<true>(
+                        x, codes, scales, y, n_in, n_out, threads_per_row,
+                        dpct_local_acc_ct1
+                            .get_multi_ptr<sycl::access::decorated::no>()
+                            .get(),
+                        c_codes_acc_ct1);
+                });
+        });
+    } else {
+        /*
+        DPCT1049:229: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        c_codes.init();
+
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(dpct::get_in_order_queue().get_device(),
+                                     {sycl::aspect::fp16});
+
+        dpct::get_in_order_queue().submit([&](sycl::handler &cgh) {
+            sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                sycl::range(smem), cgh);
+            auto c_codes_acc_ct1 = c_codes.get_access(cgh);
+
+            cgh.parallel_for<dpct_kernel_name<class s2_gemv_fast_kernel_61f77f,
+                                              dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *
+                                      sycl::range(1, 1, threads_per_row),
+                                  sycl::range(1, 1, threads_per_row)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s2_gemv_fast_kernel<false>(
+                        x, codes, scales, y, n_in, n_out, threads_per_row,
+                        dpct_local_acc_ct1
+                            .get_multi_ptr<sycl::access::decorated::no>()
+                            .get(),
+                        c_codes_acc_ct1);
+                });
+        });
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
new file mode 100644
index 00000000000..0be7d4ce58a
--- /dev/null
+++ b/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
@@ -0,0 +1,141 @@
+// src/kernels/cuda/s2_gemv_q8.cu - the S2 GEMV that consumes Q8_0 ACTIVATIONS, as ggml does.
+//
+// THE GAP THIS CLOSES (round 186).  `ggml_mul_mat` converts src1 - the ACTIVATION - to the weight's
+// `vec_dot_type` before the dot product, and for Q2_0 that is Q8_0.  The CUDA kernels built in rounds 166-177
+// take FP16 activations instead, while the CPU expert path (`bench/micro/cpu_s2.cpp`) already quantizes to int8
+// and uses `vpdpbusd`.  Left that way the two paths compute different numbers for different experts of the SAME
+// token, and the measured size of the difference is the activation contract itself: 0.9498% relative, against
+// P2.S2's 1e-3 tolerance for FP16 paths.
+//
+// This is the CORRECTNESS version, not the fast one.  It dequantizes each activation (`xq * dx`) inside the
+// loop and does the same float arithmetic as `s2_gemv_quads`; the speed win available here is `__dp4a`, which
+// turns four int8 MACs into one instruction, and that belongs to Phase 3 once the numerics are settled.  The
+// phase's rule is the simplest correct kernel first, and a dp4a version whose numerics are wrong would be
+// indistinguishable from a fast one.
+//
+// Layout: activations are (n_in/32) ggml Q8_0 blocks, 34 bytes each - `fp16 d` then `int8 qs[32]` - produced by
+// `strata::kernels::quantize_q8_0`.  A quad of four elements lies inside one 32-element block, so the block
+// scale is constant across it and is loaded once.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/s2_gemv_q8.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int QK_S2 = 64;
+constexpr int QK8_0 = 32;
+
+__dpct_inline__ void s2_gemv_q8_kernel(const uint8_t *__restrict__ act,
+                                       const uint8_t *__restrict__ codes,
+                                       const float *__restrict__ scales,
+                                       float *__restrict__ y, long long n_in,
+                                       long long n_out, int threads_per_row,
+                                       uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto partial = (float *)dpct_local;
+    const long long o = item_ct1.get_group(2);
+    if (o >= n_out) return;
+    const int tid = item_ct1.get_local_id(2);
+
+    const long long n_quads = n_in / 4;
+    const uint8_t* c = codes + o * n_quads;             // one code byte per quad
+    const float* s = scales + o * (n_in / QK_S2);
+
+    float a0 = 0.0f, a1 = 0.0f, a2 = 0.0f, a3 = 0.0f;
+    for (long long q = tid; q < n_quads; q += threads_per_row) {
+        const uint8_t byte = c[q];
+        const float d = s[q >> 4];                      // (q*4) >> 6, the S2 group index as a shift
+        // the activation quad: four int8 in one 32-element block, so one block scale
+        const long long ablk = (q * 4) / QK8_0;
+        const uint8_t* blk = act + ablk * 34;
+        const uint16_t dbits = (uint16_t) (blk[0] | (blk[1] << 8));
+        const float dx =
+            sycl::vec<sycl::half, 1>(
+                sycl::bit_cast<sycl::half, unsigned short>(dbits))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        const int8_t* xq = reinterpret_cast<const int8_t*>(blk + 2);
+        const int off = (int) ((q * 4) % QK8_0);
+
+        const float w0 = (float) ((int) (byte & 3) - 1) * d;
+        const float w1 = (float) ((int) ((byte >> 2) & 3) - 1) * d;
+        const float w2 = (float) ((int) ((byte >> 4) & 3) - 1) * d;
+        const float w3 = (float) ((int) ((byte >> 6) & 3) - 1) * d;
+        a0 += w0 * ((float) xq[off + 0] * dx);
+        a1 += w1 * ((float) xq[off + 1] * dx);
+        a2 += w2 * ((float) xq[off + 2] * dx);
+        a3 += w3 * ((float) xq[off + 3] * dx);
+    }
+    partial[tid] = (a0 + a1) + (a2 + a3);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int step = threads_per_row / 2; step > 0; step >>= 1) {
+        if (tid < step) partial[tid] += partial[tid + step];
+        /*
+        DPCT1118:47: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    if (tid == 0) y[o] = partial[0];
+}
+
+}  // namespace
+
+void s2_gemv_q8(const uint8_t* act, const uint8_t* codes, const float* scales, float* y, int64_t n_in,
+                int64_t n_out, int threads_per_row, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (n_in % QK8_0 != 0 || n_in % QK_S2 != 0) {
+        std::fprintf(stderr, "s2_gemv_q8: n_in %lld must be a multiple of %d\n", (long long) n_in, QK_S2);
+        std::exit(1);
+    }
+    /*
+    DPCT1083:49: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (size_t)threads_per_row * sizeof(float);
+    /*
+    DPCT1049:48: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class s2_gemv_q8_kernel_b9a814>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *
+                                          sycl::range(1, 1, threads_per_row),
+                                      sycl::range(1, 1, threads_per_row)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        s2_gemv_q8_kernel(
+                            act, codes, scales, y, n_in, n_out, threads_per_row,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    /*
+    DPCT1010:367: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
new file mode 100644
index 00000000000..3a267ad4cb9
--- /dev/null
+++ b/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
@@ -0,0 +1,138 @@
+// src/kernels/cuda/s2_gemv_quads.cu - S2 with the code load amortised over four elements.
+//
+// THE HYPOTHESIS THIS TESTS.  L4 measured 66 G weights/s = 0.55 weights/cycle/SM, and at an estimated ~13
+// instructions per weight that is ~7.2 instructions/cycle/SM against an SM's 4/cycle issue ceiling.  Compute
+// (0.4% of FP32 peak) and bandwidth (2%) are excluded by measurement and the dependency chain was excluded by
+// experiment in L4, so instruction ISSUE is what remains.  If that is right, cutting instructions per weight
+// must move the rate; if the rate does not move, the hypothesis is wrong and that is worth knowing too.
+//
+// WHERE THE INSTRUCTIONS GO.  For S2 four consecutive elements share ONE byte (element i at byte i/4, bits
+// (i%4)*2), and four halves of x are eight contiguous bytes.  The generic kernel walks with a thread stride
+// and loads one byte and one half PER ELEMENT; a thread that takes a contiguous quad instead loads one byte
+// and one 64-bit word for all four.  Memory instructions per element drop from 2 to 0.5, and the address
+// arithmetic is computed once rather than four times.
+//
+// S2 IS SPECIALISED DELIBERATELY: it is 31.64 GiB of the 38 GiB pack, so it is the kernel that matters.  The
+// generic `s_gemv_split` still serves S4 and S8.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/s_gemv.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+// QK = 64 elements per group; a quad of 4 elements is 1/16 of a group, so
+//     group = (quad * 4) >> 6 = quad >> 4
+constexpr int QK_S2 = 64;
+constexpr int CODES_PER_BYTE_S2 = 4;
+
+__dpct_inline__ void s2_gemv_quads_kernel(const uint16_t *__restrict__ x,
+                                          const uint8_t *__restrict__ codes,
+                                          const float *__restrict__ scales,
+                                          float *__restrict__ y, long long n_in,
+                                          long long n_out, int threads_per_row,
+                                          uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto partial = (float *)dpct_local;
+    const long long o = item_ct1.get_group(2);
+    if (o >= n_out) return;
+    const int tid = item_ct1.get_local_id(2);
+
+    const long long n_quads = n_in / 4;
+    const uint8_t* c = codes + o * n_quads;             // exactly one code byte per quad
+    const float* s = scales + o * (n_in / QK_S2);
+
+    float a0 = 0.0f, a1 = 0.0f, a2 = 0.0f, a3 = 0.0f;
+    for (long long q = tid; q < n_quads; q += threads_per_row) {
+        const uint8_t byte = c[q];                      // ONE load for four codes
+        const float d = s[q >> 4];                      // (q*4) >> 6, the group index as a shift
+        // ONE 64-bit load for four halves.  `x` is 256-byte aligned and four halves are eight bytes, so
+        // this is an aligned uint2 - if it were not, the misaligned access would fault rather than be slow.
+        const sycl::uint2 xw =
+            *reinterpret_cast<const sycl::uint2 *>(x + q * 4);
+        const sycl::half2 h01 = *reinterpret_cast<const sycl::half2 *>(&xw.x());
+        const sycl::half2 h23 = *reinterpret_cast<const sycl::half2 *>(&xw.y());
+        // the four codes, each carrying the -1 bias in the INTEGER domain; the scale is applied once per
+        // element here rather than once per group, which is the same expression the generic kernel uses
+        const float w0 = (float) ((int) (byte & 3) - 1) * d;
+        const float w1 = (float) ((int) ((byte >> 2) & 3) - 1) * d;
+        const float w2 = (float) ((int) ((byte >> 4) & 3) - 1) * d;
+        const float w3 = (float) ((int) ((byte >> 6) & 3) - 1) * d;
+        a0 += w0 * h01[0];
+        a1 += w1 * h01[1];
+        a2 += w2 * h23[0];
+        a3 += w3 * h23[1];
+    }
+    partial[tid] = (a0 + a1) + (a2 + a3);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int step = threads_per_row / 2; step > 0; step >>= 1) {
+        if (tid < step) partial[tid] += partial[tid + step];
+        /*
+        DPCT1118:268: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    if (tid == 0) y[o] = partial[0];
+}
+
+}  // namespace
+
+void s2_gemv_quads(const uint16_t *x, const uint8_t *codes, const float *scales,
+                   float *y, int64_t n_in, int64_t n_out,
+                   int threads_per_row) try {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (n_in % 4 != 0) {
+        std::fprintf(stderr, "s2_gemv_quads: n_in %lld is not a multiple of 4\n", (long long) n_in);
+        std::exit(1);
+    }
+    /*
+    DPCT1083:270: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (size_t)threads_per_row * sizeof(float);
+    /*
+    DPCT1049:269: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(dpct::get_in_order_queue().get_device(),
+                                     {sycl::aspect::fp16});
+
+        dpct::get_in_order_queue().submit([&](sycl::handler &cgh) {
+            sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                sycl::range(smem), cgh);
+
+            cgh.parallel_for<
+                dpct_kernel_name<class s2_gemv_quads_kernel_5797f4>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_out) *
+                                      sycl::range(1, 1, threads_per_row),
+                                  sycl::range(1, 1, threads_per_row)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s2_gemv_quads_kernel(
+                        x, codes, scales, y, n_in, n_out, threads_per_row,
+                        dpct_local_acc_ct1
+                            .get_multi_ptr<sycl::access::decorated::no>()
+                            .get());
+                });
+        });
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/s_gemv.dp.cpp b/sycl/src/kernels/cuda/s_gemv.dp.cpp
new file mode 100644
index 00000000000..d61cd144bed
--- /dev/null
+++ b/sycl/src/kernels/cuda/s_gemv.dp.cpp
@@ -0,0 +1,1007 @@
+// src/kernels/cuda/s_gemv.cu - P2.S2: the S-family GEMV, one thread per output row.
+//
+// Naive per the phase rule: dequantize on the fly, FP32 accumulation inside the row, no shared memory, no
+// vector loads.  The kernel is templated on the code WIDTH (a compile-time property of the unpacking loop) and
+// takes the rest of the per-type attributes as run-time arguments, because the manifest supplies them per
+// tensor and a 13-way switch inside the inner loop would be the naive-but-wrong kind of naive.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/s_gemv.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+// `kvalues_iq4nl`: the non-linear codebook, verbatim from ggml-common.h / ggml-quants.c.
+//
+// **IT WAS IN `__constant__` FOR THE WRONG REASON, AND IT COST 2.12x.**  The old comment justified constant
+// memory with "every thread reads it and it is the same 16 values for the whole launch".  That reasoning is
+// exactly backwards: constant memory is fast when the access is UNIFORM - every lane reading the SAME address -
+// and a NON-LINEAR codebook means every lane reads a DIFFERENT index, which is the pattern it handles worst.
+//
+// Measured on `attn_qkv` (IQ4_XS, 10240 x 2560), forcing the Affine codebook so that the memory traffic and the
+// instruction count stay identical and only the table read is removed:
+//
+//     codebook probe: IQ4NL 0.2032 ms   Affine 0.0960 ms   ratio 2.12x
+//
+// `decode_tbl` below reads a SHARED copy instead: 16 bytes loaded once per block, then an index into shared
+// memory that costs at most a four-way bank conflict.  The `__constant__` array stays as the source of it.
+const signed char kIq4Nl[16] = {-127, -104, -83, -65, -49, -35, -22, -10,
+                                1,    13,   25,  38,  53,  69,  89,  113};
+
+template <int CODE_BITS>
+__dpct_inline__ float decode(int code, int bias, int codebook) {
+    if (codebook == (int) Codebook::Iq4Nl) return (float) kIq4Nl[code & 0x0F];
+    return (float) (code + bias);       // the bias is applied to the CODE, in the integer domain
+}
+
+/// The same decode with the codebook in SHARED memory, which is what the hot kernels use - see the measurement
+/// above.  A divergent read of a 16-entry table is the one access pattern constant memory is worst at.
+template <int CODE_BITS>
+__dpct_inline__ float decode_tbl(int code, int bias, int codebook,
+                                 const signed char *tbl) {
+    if (codebook == (int) Codebook::Iq4Nl) return (float) tbl[code & 0x0F];
+    return (float) (code + bias);
+}
+
+// ---- Q8_K ACTIVATIONS ----------------------------------------------------------------------------------
+//
+// 292 bytes per 256 elements: `{ f32 d ; int8_t qs[256] ; int16_t bsums[16] }`.  `bsums` is not read - it
+// exists for ggml's AVX2 dot product - but the STRIDE includes it, so a buffer from `quantize_q8_K` passes
+// straight in.
+//
+// The block's `d` sits at a 4-byte-aligned offset from the buffer base as long as the base is aligned, which
+// `cudaMalloc` guarantees.
+constexpr int Q8K_BLOCK_BYTES = 292;
+constexpr int Q8K_BLOCK_ELEMS = 256;
+
+__dpct_inline__ float q8k_at(const uint8_t *__restrict__ x, long long i) {
+    const uint8_t* blk = x + (i / Q8K_BLOCK_ELEMS) * Q8K_BLOCK_BYTES;
+    /*
+    DPCT1098:301: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    const float d = *(const float*) blk;
+    const int8_t q = ((const int8_t*) (blk + 4))[i % Q8K_BLOCK_ELEMS];
+    return d * (float) q;
+}
+
+/// **THE Q8_0 ACTIVATION**, which is what the LEGACY block formats want: `block_q8_0` is `{fp16 d; int8 qs[32]}`,
+/// 34 bytes per 32 elements, produced by `quantize_q8_0`.
+///
+/// THE ENGINE HAD NO GEMV FOR THIS, and it was the last activation-contract gap (LEDGER L54).  It was described
+/// as "Q8_K is not implemented", which is not the situation: `ffn_down_shexp` is IQ4_NL/Q4_0/Q5_0/Q8_0 in EVERY
+/// layer, whose `vec_dot_type` is Q8_0 - and its `n_in` is 640, which is not a multiple of 256, so **Q8_K is
+/// STRUCTURALLY IMPOSSIBLE for it rather than merely absent**.  Every other legacy tensor in the pack is Q2_0,
+/// whose attributes happen to be S2's, which is how the S2-only kernel covered them and the hole stayed hidden.
+constexpr int Q8_0_BLOCK_BYTES = 34;
+constexpr int Q8_0_BLOCK_ELEMS = 32;
+
+__dpct_inline__ float q8_0_at(const uint8_t *__restrict__ x, long long i) {
+    const uint8_t* blk = x + (i / Q8_0_BLOCK_ELEMS) * Q8_0_BLOCK_BYTES;
+    // a `uint16_t` needs 2-byte alignment and the stride is 34, so every block's `d` is aligned
+    const float d =
+        sycl::vec<sycl::half, 1>(
+            sycl::bit_cast<sycl::half, unsigned short>(*(const uint16_t *)blk))
+            .convert<float, sycl::rounding_mode::automatic>()[0];
+    const int8_t q = ((const int8_t*) (blk + 2))[i % Q8_0_BLOCK_ELEMS];
+    return d * (float) q;
+}
+
+/// The Q8_K path, with the SAME weight decode as `s_gemv_kernel` and a different activation loader.  The two
+/// are separate kernels rather than one templated on the activation kind because the activation POINTER TYPE
+/// differs (`uint16_t*` vs `uint8_t*`) and a templated pointer would need a cast at every call site - which is
+/// where a wrong stride would hide.
+template <int CODE_BITS>
+__dpct_inline__ void s_gemv_q8k_kernel(const uint8_t *__restrict__ x,
+                                       const uint8_t *__restrict__ codes,
+                                       const float *__restrict__ scales,
+                                       const float *__restrict__ offset,
+                                       float *__restrict__ y, long long n_in,
+                                       long long n_out, int bias, int codebook,
+                                       int group_elems, int has_offset) {
+    // THE CODEBOOK, IN SHARED MEMORY - 16 bytes, loaded once per block.  See the note on `kIq4Nl`.
+    // THE LOAD AND THE BARRIER COME BEFORE THE EARLY RETURN: `o` is per-THREAD in this kernel, so a thread
+    // that returned first would leave the others waiting at a barrier it never reaches.
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &s_iq4nl =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<signed char[16]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) < 16) s_iq4nl[item_ct1.get_local_id(2)] =
+        kIq4Nl[item_ct1.get_local_id(2)];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const long long o =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (o >= n_out) return;
+
+    constexpr int PER_BYTE = 8 / CODE_BITS;
+    const long long n_groups = n_in / group_elems;
+    const long long codes_per_row = n_in / PER_BYTE;
+    const uint8_t* c = codes + o * codes_per_row;
+    const float* s = scales + o * n_groups;
+    const float* off = has_offset ? offset + o * n_groups : nullptr;
+
+    float acc = 0.0f;
+    for (long long g = 0; g < n_groups; ++g) {
+        const float d = s[g];
+        const float b = off ? off[g] : 0.0f;
+        const long long base = g * (long long) group_elems;
+        for (int j = 0; j < group_elems; ++j) {
+            const long long i = base + j;
+            const int code = (c[i / PER_BYTE] >> ((int) (i % PER_BYTE) * CODE_BITS)) & ((1 << CODE_BITS) - 1);
+            // The offset belongs to the WEIGHT and is applied before the activation multiply - see the note in
+            // `s_gemv_kernel`, where writing it the other way rounded differently and only the Q4_K case could
+            // tell.
+            const float w = decode_tbl<CODE_BITS>(code, bias, codebook, s_iq4nl) * d + b;
+            acc += w * q8k_at(x, i);
+        }
+    }
+    y[o] = acc;
+}
+
+/// One warp per output row, lanes striding the reduction axis: for a fixed `i` consecutive lanes read
+/// consecutive activations, which is the coalescing that matters once the output width is small.
+///
+/// **`group_shift`, NOT `group_elems`, AND IT COSTS A DIVISION PER ELEMENT IF YOU GET IT WRONG.**  The
+/// sibling fp16 kernel was given this treatment ("a 64-bit integer division on this hardware is a long
+/// instruction sequence - one per element, in the hottest loop in the engine") and THIS one was not: it kept
+/// `i / group_elems` with `group_elems` a RUNTIME value, once per element, in the kernel that carries most of
+/// the model's weight bytes.  Every group size the format defines is a power of two, so the divisor is passed
+/// as its logarithm and the division becomes a shift; the host refuses a non-power-of-two group rather than
+/// computing a wrong index.
+/// ONE KERNEL FOR BOTH QUANTIZED ACTIVATIONS, templated on which block format `x` holds.  A second copy with a
+/// different loader would be a second thing to get wrong, and the only difference IS the loader - the weight
+/// decode, the quad loop, the shared codebook and the reduction are identical.
+template <int CODE_BITS, bool Q8K>
+/*
+DPCT1110:21: The total declared local variable size in device function
+s_gemv_q8_split_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void s_gemv_q8_split_kernel(
+    const uint8_t *__restrict__ x, const uint8_t *__restrict__ codes,
+    const float *__restrict__ scales, const float *__restrict__ offset,
+    float *__restrict__ y, long long n_in, long long n_out, int bias,
+    int codebook, int group_shift, int has_offset) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int PER_BYTE = 8 / CODE_BITS;
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long o = (long long)item_ct1.get_group(2) * warps_per_block +
+                        (item_ct1.get_local_id(2) >> 5);
+    if (o >= n_out) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+
+    // THE CODEBOOK, IN SHARED MEMORY.  16 bytes, loaded once per block by the first 16 threads, instead of a
+    // divergent constant read per element - measured at 2.12x of this whole kernel (see the note on `kIq4Nl`).
+    auto &s_iq4nl =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<signed char[16]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) < 16) s_iq4nl[item_ct1.get_local_id(2)] =
+        kIq4Nl[item_ct1.get_local_id(2)];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+
+    const long long n_groups = n_in >> group_shift;
+    const long long codes_per_row = n_in / PER_BYTE;
+    const uint8_t* c = codes + o * codes_per_row;
+    const float* s = scales + o * n_groups;
+    const float* off = has_offset ? offset + o * n_groups : nullptr;
+
+    float acc0 = 0.0f, acc1 = 0.0f, acc2 = 0.0f, acc3 = 0.0f;
+    float acc4 = 0.0f, acc5 = 0.0f, acc6 = 0.0f, acc7 = 0.0f;
+    float acc8 = 0.0f, acc9 = 0.0f, acc10 = 0.0f, acc11 = 0.0f;
+    float acc12 = 0.0f, acc13 = 0.0f, acc14 = 0.0f, acc15 = 0.0f;
+    // ---- EIGHT CONSECUTIVE ELEMENTS PER LANE, from TWO code loads and ONE scale.
+    //
+    // **THIS IS THE EXPERIMENT THE `#pragma unroll` NOTE BELOW LEFT OPEN**, and the note said what it would
+    // be: "Widening QE to 8 or 16 changes the LOADS THEMSELVES - two or four independent 16-bit words per
+    // lane - which an unroll cannot do because the extraction code is written for exactly four codes."  So a
+    // lane now takes a double quad: two code words issued before either is consumed, which is what raises the
+    // bytes in flight.  The scale and offset are still ONE load, because eight consecutive elements lie in one
+    // group whenever `group_elems % 8 == 0` - the launcher asserts that, and every group size this format
+    // defines (16, 32, 64) satisfies it.
+    //
+    // The loop used to take `i = lane, lane+32, ...` - a STRIDE, chosen so consecutive lanes read consecutive
+    // activations - and paid a code load, a shift-and-mask, and a scale load FOR EVERY ELEMENT.  But four
+    // consecutive elements share one code word (1, 2 or 4 bytes depending on width) and lie in one group,
+    // because every group size this format defines is a multiple of four.  So a lane takes a QUAD:
+    //
+    //     one code load        instead of four
+    //     one scale load       instead of four
+    //     one shift per element instead of a divide, a modulo and a shift
+    //
+    // THE BIT ORDER IS THE SAME ONE, verified for all three widths: element `i+k` is bits
+    // `[k*CODE_BITS, (k+1)*CODE_BITS)` of the little-endian word at byte `i/PER_BYTE`, which is what the old
+    // `(c[e/PER_BYTE] >> ((e%PER_BYTE)*CODE_BITS)) & MASK` computed one element at a time.
+    //
+    // THE SUMMATION ORDER CHANGES, which is why `s_gemv_parity` and `s_gemv_q8k_parity` carry tolerances and
+    // compare against the naive kernel - they are the guard for this, and they are the reason it is safe to do.
+    constexpr int QE = 16;
+    // BYTES PER FOUR-CODE WORD, not per octet.  The two are easy to confuse and the first version of this
+    // did: it branched on the octet's total width and so read a uint32 for S4 (whose four codes are a
+    // uint16) and single bytes for S8 (whose four codes are a uint32).  `s_gemv_q8k_parity` failed on
+    // exactly that, which is what it is for.
+    constexpr int QW = 4 * CODE_BITS / 8;              // 1 for S2, 2 for S4, 4 for S8
+    constexpr unsigned MASK = (1u << CODE_BITS) - 1u;
+    long long i = (long long) lane * QE;
+    // **`#pragma unroll 4` WAS TRIED HERE AND DID NOTHING.**  Measured: 184.6 -> 183.9 GB/s at n_out 10240,
+    // with `s_gemv_parity` and `s_gemv_q8k_parity` both still clean.  The hypothesis it was testing is L93 -
+    // that this kernel's flat ~6 ns per output row is a bytes-in-flight limit, one code load and one scale
+    // load per lane-iteration with only 20 iterations.  A 4x unroll issues four of each before the first is
+    // consumed, so either the compiler was already doing it or **the limit is not instruction scheduling.**
+    // Removed rather than kept, because a hint that does not change the timing is a claim that is not true.
+    //
+    // What it does NOT rule out is the structural version of the same idea: QE is 4, so a lane consumes ONE
+    // 2-byte code word per iteration.  Widening QE to 8 or 16 changes the LOADS THEMSELVES - two or four
+    // independent 16-bit words per lane - which an unroll cannot do because the extraction code is written for
+    // exactly four codes.  That is the experiment that would settle it, and it is not this one.
+    for (; i + QE <= n_in; i += 32 * QE) {
+        const long long g = i >> group_shift;          // the whole octet is in one group: group_elems % 8 == 0
+        const float d = s[g];
+        const float b = off ? off[g] : 0.0f;
+        const uint8_t* cp = c + i / PER_BYTE;
+        unsigned v, v2, v3, v4;
+        if (QW == 1) { v = cp[0]; v2 = cp[1]; v3 = cp[2]; v4 = cp[3]; }
+        else if (QW == 2) { v = *(const uint16_t*) cp; v2 = *(const uint16_t*) (cp + 2);
+                            v3 = *(const uint16_t*) (cp + 4); v4 = *(const uint16_t*) (cp + 6); }
+        else { v = *(const uint32_t*) cp; v2 = *(const uint32_t*) (cp + 4);
+               v3 = *(const uint32_t*) (cp + 8); v4 = *(const uint32_t*) (cp + 12); }
+        // ---- THE ACTIVATION BLOCK IS HOISTED OUT OF THE SIXTEEN ELEMENTS, AND THAT WAS THE KERNEL'S COST.
+        //
+        // `q8k_at(x, i + k)` computes `(i + k) / 256` and `(i + k) % 256` on EVERY call: a 64-bit integer
+        // division AND modulo per element, sixteen times per lane-iteration.  A 64-bit division on a GPU is a
+        // software routine of roughly a hundred cycles, and the compiler cannot strength-reduce it because it
+        // cannot prove `(i + k) / 256 == i / 256` without knowing `i % 256`.
+        //
+        // But `QE` is 16, `Q8K_BLOCK_ELEMS` is 256 and `Q8_0_BLOCK_ELEMS` is 32, and the loop advances `i` by
+        // `32 * QE`.  So `i % 256` and `i % 32` are ALWAYS multiples of 16 - which means all QE elements of one
+        // lane-iteration lie inside ONE block, for either activation kind.  One division and one modulo per
+        // iteration replace sixteen of each, and the sixteen activations become sixteen consecutive int8 loads
+        // from a pointer computed once.
+        //
+        // This is exact, not an approximation: `xi + QE <= blk_elems` holds for every reachable `xi`, so no
+        // lane-iteration can straddle a block boundary.  The tail loop below still uses the accessors because
+        // its elements do not share a block, and it runs at most once per lane.
+        const int blk_elems = Q8K ? Q8K_BLOCK_ELEMS : Q8_0_BLOCK_ELEMS;
+        const uint8_t* xb = x + (i / blk_elems) * (Q8K ? Q8K_BLOCK_BYTES : Q8_0_BLOCK_BYTES);
+        const int xi = (int) (i % blk_elems);
+        /*
+        DPCT1098:302: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const float xd =
+            Q8K ? *(const float*) xb
+                : sycl::vec<sycl::half, 1>(
+                      sycl::bit_cast<sycl::half, unsigned short>(
+                          *(const uint16_t *)xb))
+                      .convert<float, sycl::rounding_mode::automatic>()[0];
+        const int8_t* xq = (const int8_t*) (xb + (Q8K ? 4 : 2)) + xi;
+
+        const float w0 = decode_tbl<CODE_BITS>((int) (v & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w1 = decode_tbl<CODE_BITS>((int) ((v >> CODE_BITS) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w2 = decode_tbl<CODE_BITS>((int) ((v >> (2 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w3 = decode_tbl<CODE_BITS>((int) ((v >> (3 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w4 = decode_tbl<CODE_BITS>((int) (v2 & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w5 = decode_tbl<CODE_BITS>((int) ((v2 >> CODE_BITS) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w6 = decode_tbl<CODE_BITS>((int) ((v2 >> (2 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w7 = decode_tbl<CODE_BITS>((int) ((v2 >> (3 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        acc0 += w0 * (xd * (float) xq[0]);
+        acc1 += w1 * (xd * (float) xq[1]);
+        acc2 += w2 * (xd * (float) xq[2]);
+        acc3 += w3 * (xd * (float) xq[3]);
+        acc4 += w4 * (xd * (float) xq[4]);
+        acc5 += w5 * (xd * (float) xq[5]);
+        acc6 += w6 * (xd * (float) xq[6]);
+        acc7 += w7 * (xd * (float) xq[7]);
+        const float w8  = decode_tbl<CODE_BITS>((int) (v3 & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w9  = decode_tbl<CODE_BITS>((int) ((v3 >> CODE_BITS) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w10 = decode_tbl<CODE_BITS>((int) ((v3 >> (2 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w11 = decode_tbl<CODE_BITS>((int) ((v3 >> (3 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w12 = decode_tbl<CODE_BITS>((int) (v4 & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w13 = decode_tbl<CODE_BITS>((int) ((v4 >> CODE_BITS) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w14 = decode_tbl<CODE_BITS>((int) ((v4 >> (2 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        const float w15 = decode_tbl<CODE_BITS>((int) ((v4 >> (3 * CODE_BITS)) & MASK), bias, codebook, s_iq4nl) * d + b;
+        acc8  += w8  * (xd * (float) xq[8]);
+        acc9  += w9  * (xd * (float) xq[9]);
+        acc10 += w10 * (xd * (float) xq[10]);
+        acc11 += w11 * (xd * (float) xq[11]);
+        acc12 += w12 * (xd * (float) xq[12]);
+        acc13 += w13 * (xd * (float) xq[13]);
+        acc14 += w14 * (xd * (float) xq[14]);
+        acc15 += w15 * (xd * (float) xq[15]);
+    }
+    // the last, partial quad - at most one per lane
+    for (; i < n_in; i += 32 * QE) {
+        for (int k = 0; k < QE && i + k < n_in; ++k) {
+            const long long e = i + k;
+            const long long g = e >> group_shift;
+            const int code = (c[e / PER_BYTE] >> ((int) (e % PER_BYTE) * CODE_BITS)) & MASK;
+            acc0 += (decode_tbl<CODE_BITS>(code, bias, codebook, s_iq4nl) * s[g] + (off ? off[g] : 0.0f)) * (Q8K ? q8k_at(x, e) : q8_0_at(x, e));
+        }
+    }
+    float acc = (((acc0 + acc1) + (acc2 + acc3)) + ((acc4 + acc5) + (acc6 + acc7))) +
+                (((acc8 + acc9) + (acc10 + acc11)) + ((acc12 + acc13) + (acc14 + acc15)));
+    /*
+DPCT1108:22: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int step = 16; step > 0; step >>= 1) acc +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            acc, step);
+    if (lane == 0) y[o] = acc;
+}
+
+template <int CODE_BITS>
+__dpct_inline__ void
+s_gemv_kernel(const uint16_t *__restrict__ x, const uint8_t *__restrict__ codes,
+              const float *__restrict__ scales,
+              const float *__restrict__ offset, float *__restrict__ y,
+              long long n_in, long long n_out, int bias, int codebook,
+              int group_elems, int has_offset) {
+    // THE CODEBOOK, IN SHARED MEMORY - 16 bytes, loaded once per block.  See the note on `kIq4Nl`.
+    // THE LOAD AND THE BARRIER COME BEFORE THE EARLY RETURN: `o` is per-THREAD in this kernel, so a thread
+    // that returned first would leave the others waiting at a barrier it never reaches.
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &s_iq4nl =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<signed char[16]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) < 16) s_iq4nl[item_ct1.get_local_id(2)] =
+        kIq4Nl[item_ct1.get_local_id(2)];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const long long o =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (o >= n_out) return;
+
+    constexpr int PER_BYTE = 8 / CODE_BITS;
+    const long long n_groups = n_in / group_elems;
+    const long long codes_per_row = n_in / PER_BYTE;
+    const uint8_t* c = codes + o * codes_per_row;
+    const float* s = scales + o * n_groups;
+    const float* off = has_offset ? offset + o * n_groups : nullptr;
+
+    float acc = 0.0f;
+    for (long long g = 0; g < n_groups; ++g) {
+        const float d = s[g];
+        const float b = off ? off[g] : 0.0f;
+        const long long base = g * (long long) group_elems;
+        for (int j = 0; j < group_elems; ++j) {
+            const long long i = base + j;
+            const int code = (c[i / PER_BYTE] >> ((int) (i % PER_BYTE) * CODE_BITS)) & ((1 << CODE_BITS) - 1);
+            // The offset belongs to the WEIGHT, so it is applied to the decoded value BEFORE the activation
+            // multiply: `w = code*scale + offset; acc += w * x`.  Writing `acc += code*scale*x + offset*x`
+            // computes a mathematically equal expression that ROUNDS DIFFERENTLY, because it performs two
+            // multiplications and an addition where this performs one of each.  The no-offset types cannot
+            // tell the difference - which is why this was wrong until the Q4_K case was added.
+            const float w = decode_tbl<CODE_BITS>(code, bias, codebook, s_iq4nl) * d + b;
+            acc += w * sycl::vec<sycl::half, 1>(
+                           sycl::bit_cast<sycl::half, unsigned short>(x[i]))
+                           .convert<float, sycl::rounding_mode::automatic>()[0];
+        }
+    }
+    y[o] = acc;
+}
+
+}  // namespace
+
+void s_gemv(const uint16_t *x, const uint8_t *codes, const float *scales,
+            const float *offset, float *y, int64_t n_in, int64_t n_out,
+            const SForm &form) try {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (form.group_elems <= 0 || n_in % form.group_elems != 0) {
+        std::fprintf(stderr, "s_gemv: n_in %lld is not a multiple of group_elems %d\n", (long long) n_in,
+                     form.group_elems);
+        std::exit(1);
+    }
+    if (form.has_offset && offset == nullptr) {
+        std::fprintf(stderr, "s_gemv: form says has_offset but offset is null\n");
+        std::exit(1);
+    }
+    const int threads = 128;
+    const long long blocks = (n_out + threads - 1) / threads;
+    const int cb = (int) form.codebook;
+    switch (form.code_bits) {
+    case 2: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        dpct::get_in_order_queue()
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_2c435c,
+                                           dpct_kernel_scalar<2>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s_gemv_kernel<2>(x, codes, scales, offset, y, n_in, n_out,
+                                     form.code_bias, cb, form.group_elems,
+                                     form.has_offset ? 1 : 0);
+                });
+    } break;
+    case 4: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        dpct::get_in_order_queue()
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_1b4b21,
+                                           dpct_kernel_scalar<4>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s_gemv_kernel<4>(x, codes, scales, offset, y, n_in, n_out,
+                                     form.code_bias, cb, form.group_elems,
+                                     form.has_offset ? 1 : 0);
+                });
+    } break;
+    case 8: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        dpct::get_in_order_queue()
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_c5017e,
+                                           dpct_kernel_scalar<8>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s_gemv_kernel<8>(x, codes, scales, offset, y, n_in, n_out,
+                                     form.code_bias, cb, form.group_elems,
+                                     form.has_offset ? 1 : 0);
+                });
+    } break;
+        default:
+            std::fprintf(stderr, "s_gemv: unsupported code_bits %d\n", form.code_bits);
+            std::exit(1);
+    }
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+namespace {
+
+// One BLOCK per output row, `threads_per_row` threads splitting it.  Parallelism becomes
+// n_out * threads_per_row instead of n_out, which is the whole point: gate/up is [2560 x 640] and 640 threads
+// cannot fill 48 SMs.
+//
+// The reduction is a fixed tree over shared memory rather than atomics, so the result is DETERMINISTIC for a
+// given threads_per_row - a race would make the parity test flaky rather than wrong, which is the worst kind
+// of failing test.
+// NOTE ON `g = e >> group_shift`.  The group index was `e / group_elems` with `group_elems` a RUNTIME value,
+// and a 64-bit integer division on this hardware is a long instruction sequence - one per element, in the
+// hottest loop in the engine.  Every group size this format defines is a POWER OF TWO (16, 32, 64), so the
+// divisor is passed as its logarithm and the division becomes a shift.  The host wrapper refuses a
+// non-power-of-two group rather than silently computing a wrong index.
+template <int CODE_BITS>
+/*
+DPCT1110:23: The total declared local variable size in device function
+s_gemv_split_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void s_gemv_split_kernel(
+    const uint16_t *__restrict__ x, const uint8_t *__restrict__ codes,
+    const float *__restrict__ scales, const float *__restrict__ offset,
+    float *__restrict__ y, long long n_in, long long n_out, int bias,
+    int codebook, int group_elems, int group_shift, int has_offset,
+    int threads_per_row, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto partial = (float *)dpct_local;
+    // THE CODEBOOK, IN SHARED MEMORY - 16 bytes, loaded once per block.  See the note on `kIq4Nl`.
+    // THE LOAD AND THE BARRIER COME BEFORE THE EARLY RETURN: `o` is per-THREAD in this kernel, so a thread
+    // that returned first would leave the others waiting at a barrier it never reaches.
+    auto &s_iq4nl =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<signed char[16]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if (item_ct1.get_local_id(2) < 16) s_iq4nl[item_ct1.get_local_id(2)] =
+        kIq4Nl[item_ct1.get_local_id(2)];
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const long long o = item_ct1.get_group(2);
+    if (o >= n_out) return;
+    const int tid = item_ct1.get_local_id(2);
+
+    constexpr int PER_BYTE = 8 / CODE_BITS;
+    const long long n_groups = n_in / group_elems;
+    const uint8_t* c = codes + o * (n_in / PER_BYTE);
+    const float* s = scales + o * n_groups;
+    const float* off = has_offset ? offset + o * n_groups : nullptr;
+
+    // FOUR ACCUMULATORS, NOT ONE.  L2 measured this kernel at 0.4% of FP32 peak and 2.1% of bandwidth, so
+    // neither limit is the constraint - the constraint is the DEPENDENCY CHAIN: a single `acc += ...` serialises
+    // every FMA behind the previous one's latency (4-6 cycles each, ~1 per 4 cycles achieved), so the SM sits
+    // idle.  Four independent accumulators let the scheduler keep four FMAs in flight, and the loop is
+    // unrolled by four so the four chains are interleaved.  The summation ORDER changes, which is why the
+    // parity test carries a tolerance and why this kernel's output is checked against the naive one.
+    // FOUR CONSECUTIVE ELEMENTS PER THREAD, from ONE code load and ONE scale - the same transformation the
+    // Q8_K kernel got, for the same reason and with the same guard (`s_gemv_parity`).  See the long note there
+    // for the bit order, which is unchanged, and for why the group size is passed as a shift.
+    //
+    // THIS KERNEL IS THE ONE `attn_output` AND `shared_expert` USE, so the fix has to exist in both or half the
+    // model keeps the old instruction count.
+    constexpr int QE = 4;
+    constexpr int QB = QE * CODE_BITS / 8;             // 1 for S2, 2 for S4, 4 for S8
+    constexpr unsigned MASK = (1u << CODE_BITS) - 1u;
+    float acc0 = 0.0f, acc1 = 0.0f, acc2 = 0.0f, acc3 = 0.0f;
+    long long i = (long long) tid * QE;
+    for (; i + QE <= n_in; i += (long long) threads_per_row * QE) {
+        const long long g = i >> group_shift;
+        const float d = s[g];
+        const float b = off ? off[g] : 0.0f;
+        const uint8_t* cp = c + i / PER_BYTE;
+        unsigned v;
+        if (QB == 1) v = cp[0];
+        else if (QB == 2) v = *(const uint16_t*) cp;
+        else v = *(const uint32_t*) cp;
+        // four halves in ONE 8-byte load; `i` is a multiple of four, so `x + i` is 8-byte aligned
+        const sycl::float2 f01 =
+            (*reinterpret_cast<const sycl::half2 *>(x + i))
+                .template convert<float, sycl::rounding_mode::automatic>();
+        const sycl::float2 f23 =
+            (*reinterpret_cast<const sycl::half2 *>(x + i + 2))
+                .template convert<float, sycl::rounding_mode::automatic>();
+        acc0 +=
+            (decode_tbl<CODE_BITS>((int)(v & MASK), bias, codebook, s_iq4nl) *
+                 d +
+             b) *
+            f01.x();
+        acc1 += (decode_tbl<CODE_BITS>((int)((v >> CODE_BITS) & MASK), bias,
+                                       codebook, s_iq4nl) *
+                     d +
+                 b) *
+                f01.y();
+        acc2 += (decode_tbl<CODE_BITS>((int)((v >> (2 * CODE_BITS)) & MASK),
+                                       bias, codebook, s_iq4nl) *
+                     d +
+                 b) *
+                f23.x();
+        acc3 += (decode_tbl<CODE_BITS>((int)((v >> (3 * CODE_BITS)) & MASK),
+                                       bias, codebook, s_iq4nl) *
+                     d +
+                 b) *
+                f23.y();
+    }
+    // the last, partial quad - at most one per thread
+    for (; i < n_in; i += (long long) threads_per_row * QE) {
+        for (int k = 0; k < QE && i + k < n_in; ++k) {
+            const long long e = i + k;
+            const long long g = e >> group_shift;
+            const int code = (c[e / PER_BYTE] >> ((int) (e % PER_BYTE) * CODE_BITS)) & MASK;
+            acc0 +=
+                (decode_tbl<CODE_BITS>(code, bias, codebook, s_iq4nl) * s[g] +
+                 (off ? off[g] : 0.0f)) *
+                sycl::vec<sycl::half, 1>(
+                    sycl::bit_cast<sycl::half, unsigned short>(x[e]))
+                    .convert<float, sycl::rounding_mode::automatic>()[0];
+        }
+    }
+    partial[tid] = (acc0 + acc1) + (acc2 + acc3);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+    for (int step = threads_per_row / 2; step > 0; step >>= 1) {
+        if (tid < step) partial[tid] += partial[tid + step];
+        /*
+        DPCT1118:24: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    if (tid == 0) y[o] = partial[0];
+}
+
+}  // namespace
+
+static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
+                              const float *scales, const float *offset,
+                              float *y, int64_t n_in, int64_t n_out,
+                              const SForm &form, int threads_per_row,
+                              dpct::queue_ptr stream, bool sync) try {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (threads_per_row < 1 || (threads_per_row & (threads_per_row - 1)) != 0 || threads_per_row > 1024) {
+        std::fprintf(stderr, "s_gemv_split: threads_per_row must be a power of two in 1..1024, got %d\n",
+                     threads_per_row);
+        std::exit(1);
+    }
+    const int cb = (int) form.codebook;
+    // Every group size this format defines is a power of two, which is what lets the per-element group index
+    // be a shift.  Refuse anything else rather than compute a wrong index quietly.
+    if (form.group_elems <= 0 || (form.group_elems & (form.group_elems - 1)) != 0) {
+        std::fprintf(stderr, "s_gemv_split: group_elems must be a power of two, got %d\n", form.group_elems);
+        std::exit(1);
+    }
+    // AND THE QUAD MUST FIT INSIDE ONE GROUP: four consecutive elements share a scale and the kernel reads
+    // exactly one.  Every group size this format defines is 16, 32 or 64, so this cannot fire on a real pack.
+    if (form.group_elems % 4 != 0) {
+        std::fprintf(stderr, "s_gemv_split: group_elems %d is not a multiple of 4\n", form.group_elems);
+        std::exit(1);
+    }
+    int group_shift = 0;
+    while ((1 << group_shift) < form.group_elems) ++group_shift;
+    /*
+    DPCT1083:26: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t smem = (size_t)threads_per_row * sizeof(float);
+    const unsigned grid = (unsigned) n_out;
+    switch (form.code_bits) {
+        case 2:
+            /*
+            DPCT1049:25: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(stream->get_device(),
+                                         {sycl::aspect::fp16});
+
+            stream->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class s_gemv_split_kernel_51319d, dpct_kernel_scalar<2>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, threads_per_row),
+                                      sycl::range(1, 1, threads_per_row)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        s_gemv_split_kernel<2>(
+                            x, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, form.group_elems, group_shift,
+                            form.has_offset ? 1 : 0, threads_per_row,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+            break;
+        case 4:
+            /*
+            DPCT1049:27: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(stream->get_device(),
+                                         {sycl::aspect::fp16});
+
+            stream->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class s_gemv_split_kernel_36431d, dpct_kernel_scalar<4>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, threads_per_row),
+                                      sycl::range(1, 1, threads_per_row)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        s_gemv_split_kernel<4>(
+                            x, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, form.group_elems, group_shift,
+                            form.has_offset ? 1 : 0, threads_per_row,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+            break;
+        case 8:
+            /*
+            DPCT1049:28: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(stream->get_device(),
+                                         {sycl::aspect::fp16});
+
+            stream->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class s_gemv_split_kernel_377b5e, dpct_kernel_scalar<8>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, threads_per_row),
+                                      sycl::range(1, 1, threads_per_row)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        s_gemv_split_kernel<8>(
+                            x, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, form.group_elems, group_shift,
+                            form.has_offset ? 1 : 0, threads_per_row,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+            break;
+        default:
+            std::fprintf(stderr, "s_gemv_split: unsupported code_bits %d\n", form.code_bits);
+            std::exit(1);
+    }
+    if (sync) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void s_gemv_split(const uint16_t* x, const uint8_t* codes, const float* scales, const float* offset,
+                  float* y, int64_t n_in, int64_t n_out, const SForm& form, int threads_per_row) {
+    s_gemv_split_impl(x, codes, scales, offset, y, n_in, n_out, form,
+                      threads_per_row,
+                      (dpct::queue_ptr)&dpct::get_in_order_queue(), true);
+}
+
+void s_gemv_split_async(const uint16_t* x, const uint8_t* codes, const float* scales, const float* offset,
+                        float* y, int64_t n_in, int64_t n_out, const SForm& form, int threads_per_row,
+                        void* stream) {
+    s_gemv_split_impl(x, codes, scales, offset, y, n_in, n_out, form,
+                      threads_per_row, strata::q_of(stream), false);
+}
+
+// ---- the Q8_K entry points -----------------------------------------------------------------------------
+
+namespace {
+
+bool q8k_form_ok(const SForm& form, int64_t n_in, const char* who) {
+    if (form.group_elems <= 0 || n_in % form.group_elems != 0) {
+        std::fprintf(stderr, "%s: n_in %lld is not a multiple of group_elems %d\n", who, (long long) n_in,
+                     form.group_elems);
+        return false;
+    }
+    if (n_in % Q8K_BLOCK_ELEMS != 0) {
+        // `quantize_q8_K` requires this too, and a partial block would read past the end of the activation.
+        std::fprintf(stderr, "%s: n_in %lld is not a multiple of the Q8_K block %d\n", who, (long long) n_in,
+                     Q8K_BLOCK_ELEMS);
+        return false;
+    }
+    return true;
+}
+
+void finish(const char *who, void *stream) try {
+    /*
+    DPCT1010:305: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream != nullptr) return;
+    const dpct::err0 s =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace
+
+void s_gemv_q8k(const uint8_t* x_q8k, const uint8_t* codes, const float* scales, const float* offset, float* y,
+                int64_t n_in, int64_t n_out, const SForm& form, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (!q8k_form_ok(form, n_in, "s_gemv_q8k")) std::exit(1);
+    const int threads = 128;
+    const unsigned blocks = (unsigned) ((n_out + threads - 1) / threads);
+    const int cb = (int) form.codebook;
+    const int ho = form.has_offset ? 1 : 0;
+    switch (form.code_bits) {
+    case 4: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_6a05ad,
+                                            dpct_kernel_scalar<4>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s_gemv_q8k_kernel<4>(x_q8k, codes, scales, offset, y, n_in,
+                                         n_out, form.code_bias, cb,
+                                         form.group_elems, ho);
+                });
+    } break;
+    case 8: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_c8cb93,
+                                            dpct_kernel_scalar<8>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    s_gemv_q8k_kernel<8>(x_q8k, codes, scales, offset, y, n_in,
+                                         n_out, form.code_bias, cb,
+                                         form.group_elems, ho);
+                });
+    } break;
+        default:
+            // 2-bit S2 never has a Q8_K activation: its `vec_dot_type` is Q8_0.  Refusing is better than
+            // running a kernel that would be numerically wrong in a way the caller cannot see.
+            std::fprintf(stderr, "s_gemv_q8k: code_bits %d has no Q8_K contract "
+                                 "(S2 uses Q8_0; see docs/activation-contract.md)\n", form.code_bits);
+            std::exit(1);
+    }
+    finish("s_gemv_q8k", stream);
+}
+
+void s_gemv_q8k_split(const uint8_t* x_q8k, const uint8_t* codes, const float* scales, const float* offset,
+                      float* y, int64_t n_in, int64_t n_out, const SForm& form, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    if (!q8k_form_ok(form, n_in, "s_gemv_q8k_split")) std::exit(1);
+    // THE GROUP SIZE IS PASSED AS ITS LOGARITHM: see the note on the kernel.  A non-power-of-two group would
+    // make the shift a WRONG INDEX rather than a slow one, so it is refused here.
+    int group_shift = 0;
+    while ((1 << group_shift) < form.group_elems) ++group_shift;
+    if ((1 << group_shift) != form.group_elems) {
+        std::fprintf(stderr, "s_gemv_q8k_split: group_elems %d is not a power of two\n", form.group_elems);
+        std::exit(1);
+    }
+    // AND THE QUAD MUST FIT INSIDE ONE GROUP.  Four consecutive elements share a scale, so a group smaller
+    // than four would need two of them and the kernel reads exactly one.  Every group size this format
+    // defines is 16, 32 or 64, so this cannot fire on a real pack - it is here because a future one could.
+    if (form.group_elems % 16 != 0) {
+        std::fprintf(stderr, "s_gemv_q8k_split: group_elems %d is not a multiple of 16\n", form.group_elems);
+        std::exit(1);
+    }
+    const int threads = 256;
+    const int warps = threads / 32;
+    const unsigned blocks = (unsigned) ((n_out + warps - 1) / warps);
+    const int cb = (int) form.codebook;
+    const int ho = form.has_offset ? 1 : 0;
+    switch (form.code_bits) {
+    case 4: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_c3278e,
+                                            dpct_kernel_scalar<4>,
+                                            dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        s_gemv_q8_split_kernel<4, true>(
+                            x_q8k, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, group_shift, ho);
+                    });
+    } break;
+    case 8: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_7d9a26,
+                                            dpct_kernel_scalar<8>,
+                                            dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        s_gemv_q8_split_kernel<8, true>(
+                            x_q8k, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, group_shift, ho);
+                    });
+    } break;
+        default:
+            std::fprintf(stderr, "s_gemv_q8k_split: code_bits %d has no Q8_K contract\n", form.code_bits);
+            std::exit(1);
+    }
+    finish("s_gemv_q8k_split", stream);
+}
+
+void s_gemv_q8_0_split(const uint8_t* x_q8_0, const uint8_t* codes, const float* scales, const float* offset,
+                       float* y, int64_t n_in, int64_t n_out, const SForm& form, void* stream) {
+    if (n_in <= 0 || n_out <= 0) return;
+    // THE ACTIVATION IS `block_q8_0`, 32 elements per block, so `n_in` must be a multiple of 32 - which is a
+    // WEAKER requirement than Q8_K's 256 and is exactly why this kernel has to exist: `ffn_down_shexp` has
+    // n_in = 640, a multiple of 32 that is NOT a multiple of 256.
+    if (n_in % Q8_0_BLOCK_ELEMS != 0) {
+        std::fprintf(stderr, "s_gemv_q8_0_split: n_in %lld is not a multiple of %d\n", (long long) n_in,
+                     Q8_0_BLOCK_ELEMS);
+        std::exit(1);
+    }
+    // the same two checks `s_gemv_q8k_split` makes, for the same reasons - see the notes there
+    if (form.group_elems <= 0 || (form.group_elems & (form.group_elems - 1)) != 0) {
+        std::fprintf(stderr, "s_gemv_q8_0_split: group_elems must be a power of two, got %d\n",
+                     form.group_elems);
+        std::exit(1);
+    }
+    if (form.group_elems % 4 != 0) {
+        std::fprintf(stderr, "s_gemv_q8_0_split: group_elems %d is not a multiple of 4\n", form.group_elems);
+        std::exit(1);
+    }
+    int group_shift = 0;
+    while ((1 << group_shift) < form.group_elems) ++group_shift;
+
+    const int threads = 256;
+    const int warps = threads / 32;
+    const unsigned blocks = (unsigned) ((n_out + warps - 1) / warps);
+    const int cb = (int) form.codebook;
+    const int ho = form.has_offset ? 1 : 0;
+    switch (form.code_bits) {
+    case 4: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_ee83d2,
+                                            dpct_kernel_scalar<4>,
+                                            dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        s_gemv_q8_split_kernel<4, false>(
+                            x_q8_0, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, group_shift, ho);
+                    });
+    } break;
+    case 8: {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_47112d,
+                                            dpct_kernel_scalar<8>,
+                                            dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, threads),
+                                  sycl::range(1, 1, threads)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        s_gemv_q8_split_kernel<8, false>(
+                            x_q8_0, codes, scales, offset, y, n_in, n_out,
+                            form.code_bias, cb, group_shift, ho);
+                    });
+    } break;
+        default:
+            std::fprintf(stderr, "s_gemv_q8_0_split: code_bits %d has no Q8_0 contract\n", form.code_bits);
+            std::exit(1);
+    }
+    finish("s_gemv_q8_0_split", stream);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/sampler.dp.cpp b/sycl/src/kernels/cuda/sampler.dp.cpp
new file mode 100644
index 00000000000..00f279ae490
--- /dev/null
+++ b/sycl/src/kernels/cuda/sampler.dp.cpp
@@ -0,0 +1,547 @@
+// src/kernels/cuda/sampler.cu - P2.S2: the sampler chain, in llama.cpp's order.
+//
+//     penalties -> top_k -> top_p -> min_p -> temperature -> pick
+//
+// THE ORDER IS THE WHOLE CONTENT OF THIS FILE.  llama.cpp builds its chain by walking `params.samplers`, whose
+// default is { PENALTIES, DRY, TOP_N_SIGMA, TOP_K, TYPICAL_P, TOP_P, MIN_P, XTC, TEMPERATURE } (`common/common.h`
+// at 3cf03257) - ONE penalties stage, first, and TEMPERATURE AFTER THE TRUNCATION FILTERS.  (Issue #53: this file
+// used to apply the penalties a second time after the temperature, and min_p before top_p - both taken from the
+// order of the `case` labels in `common/sampling.cpp`, which is not the order the chain runs.)  Every order
+// produces a valid token, so only a comparison at the distribution level can tell them apart; the parity test
+// does that against an independently computed distribution.
+//
+// Both kernels put ONE BLOCK per token over the vocabulary: `sampler_greedy_kernel` is the plain argmax,
+// `sampler_kernel` runs the sampled chain as `top_k` block-argmax rounds followed by the top_p / temperature /
+// draw chain (its header says why the selection must be parallel and why the tie rule keeps the semantics).
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/sampler.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::kernels {
+namespace {
+
+// Philox 4x32-10, the counter-based generator the phase asks for.  Counter-based matters because it makes the
+// stream a function of (seed, position) rather than of how many draws came before - so a batch can be sampled
+// in any order and a run is reproducible.
+__dpct_inline__ uint32_t philox4x32_round(uint32_t &c0, uint32_t &c1,
+                                          uint32_t &c2, uint32_t &c3,
+                                          uint32_t k0, uint32_t k1) {
+    const uint32_t hi0 = sycl::mul_hi<unsigned>(0x9E3779B9u, c0);
+    const uint32_t hi1 = sycl::mul_hi<unsigned>(0xBB67AE85u, c2);
+    const uint32_t lo0 = 0x9E3779B9u * c0;
+    const uint32_t lo1 = 0xBB67AE85u * c2;
+    const uint32_t n0 = hi1 ^ c1 ^ k0;
+    const uint32_t n1 = lo1;
+    const uint32_t n2 = hi0 ^ c3 ^ k1;
+    const uint32_t n3 = lo0;
+    c0 = n0; c1 = n1; c2 = n2; c3 = n3;
+    return 0;
+}
+
+__dpct_inline__ float philox_uniform(uint64_t seed, uint64_t counter) {
+    uint32_t c0 = (uint32_t) counter, c1 = (uint32_t) (counter >> 32);
+    uint32_t c2 = (uint32_t) seed, c3 = (uint32_t) (seed >> 32);
+#pragma unroll
+    for (int i = 0; i < 10; ++i) {
+        philox4x32_round(c0, c1, c2, c3, (uint32_t) i, 0u);
+    }
+    // 24 bits of mantissa, so the value is uniform in [0,1) with no rounding to 1.0
+    return (float) (c0 >> 8) * (1.0f / 16777216.0f);
+}
+
+// `count_in_history` and the penalty application, transcribed from `llama_sampler_penalties_apply`.
+// The repeat penalty MULTIPLIES for non-positive logits and DIVIDES for positive ones - dividing
+// unconditionally is the natural reading of the source paper and it INVERTS the penalty on half the
+// vocabulary.  The presence penalty is `float(count > 0)`, a boolean, not the count.
+__dpct_inline__ int history_count(const int *__restrict__ h, int n, int v) {
+    int c = 0;
+#pragma unroll
+    for (int i = 0; i < n; ++i) if (h[i] == v)++ c;
+    return c;
+}
+
+__dpct_inline__ float apply_penalties(float logit, int count,
+                                      const SamplerParams &p) {
+    if (count <= 0) return logit;
+    if (logit <= 0.0f) logit *= p.penalty_repeat;
+    else               logit /= p.penalty_repeat;
+    logit -= (float) count * p.penalty_freq + (count > 0 ? 1.0f : 0.0f) * p.penalty_present;
+    return logit;
+}
+
+/// **THE GREEDY ARGMAX, ONE BLOCK PER TOKEN, COVERING THE VOCABULARY.**
+///
+/// **WHY THIS IS A SEPARATE KERNEL AND NOT A BRANCH.**  `sampler_kernel` is launched as a grid over TOKENS
+/// with 64 threads and a `if (t >= n_tokens) return;` at the top.  The decode path has `n_tokens == 1`, so
+/// that launch was `<<<1, 64>>>`, 63 threads exited on the first line, and ONE THREAD walked all 248,320
+/// logits in a dependent loop on one SM of 48.  Measured in isolation (`bench/micro/sampler_cost.cu`):
+/// **3.11 ms per token**, 5.7% of an ~54 ms token, and the whole of round 309's `sample` phase - the two
+/// synchronisations around it are 0.03 ms each.
+///
+/// The obvious repair is to parallelise the scan inside `sampler_kernel`, and it is WRONG: with one thread
+/// per token, a block reduction over the vocabulary has nothing to reduce, and the threads that returned
+/// early are not there for `__syncthreads` or `__shfl_down_sync`.  The first attempt did exactly that and
+/// produced the token `5120` thirty-two times.  The grid has to be over tokens with the BLOCK over the
+/// vocabulary, which is a different launch configuration and therefore a different kernel.
+///
+/// **THE TIE RULE IS UNCHANGED AND THAT IS THE WHOLE CORRECTNESS ARGUMENT.**  The serial scan walked `v`
+/// ascending with `if (s > bv)`, so the LOWEST index wins a tie.  Each thread keeps that rule over its own
+/// strided subset and the reduction resolves two candidates by taking the larger value and, on equality, the
+/// SMALLER index - the same total order, so `sampler_parity` and C1 see no change.
+__dpct_inline__ void
+sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
+                      const int *__restrict__ history, int history_len,
+                      const SamplerParams p, int pmin, int plen,
+                      int *__restrict__ out, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(2);
+    const float* l = logits + (size_t) t * n_vocab;
+    (void) pmin;
+    const int* hrow = history ? history + (size_t) t * history_len : nullptr;
+    int hlen = 0;
+    if (hrow) {
+        hlen = plen < history_len ? plen : history_len;
+        if (hlen < 0) hlen = 0;
+        hrow += history_len - hlen;          // the window is the TAIL
+    }
+
+    // PENALTY MEMBERSHIP AS A BITMAP.  The history touches at most `hlen` tokens of a quarter-million
+    // vocabulary, but the naive `history_count` per candidate per argmax round costs O(k x n_vocab x hlen)
+    // integer compares (~318 M per token at k=20, hlen=64 - measured 45 -> 31 tok/s on a real workload).
+    // A shared bitmap gives an O(1) membership test, and only the (at most hlen) hits pay the count scan;
+    // the counts - and therefore every sampled value - are exactly what the per-candidate scan produced.
+    auto penal_bits = (unsigned int *)dpct_local;
+    const int bits_words = (int) ((n_vocab + 31) / 32);
+    // The gate needs a NON-EMPTY WINDOW (`hlen > 0`): the launch sizes the shared bitmap only when penalties
+    // are on, so a caller handing over a history buffer with `penalty_last_n == 0` must not touch it.
+    const bool use_bits = hrow != nullptr && hlen > 0 && bits_words > 0;
+    if (use_bits) {
+#pragma unroll
+        for (int w = item_ct1.get_local_id(2); w < bits_words;
+             w += item_ct1.get_local_range(2)) penal_bits[w] = 0u;
+        /*
+        DPCT1118:57: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+        for (int i = item_ct1.get_local_id(2); i < hlen;
+             i += item_ct1.get_local_range(2))
+            if (hrow[i] >= 0 && hrow[i] < n_vocab)   // an id outside the vocabulary is never a candidate
+                dpct::atomic_fetch_or<
+                    sycl::access::address_space::generic_space>(
+                    &penal_bits[hrow[i] >> 5], 1u << (hrow[i] & 31));
+        /*
+        DPCT1118:58: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    auto hit_count = [&](int v, uint8_t *dpct_local) -> int {
+        if (!use_bits || !(penal_bits[v >> 5] & (1u << (v & 31)))) return 0;
+        return history_count(hrow, hlen, v);
+    };
+
+    // `n_vocab` is the "no candidate" index: it loses every comparison to a real one, so a thread with no
+    // elements contributes nothing rather than contributing a bogus zero.
+    float bv = sycl::bit_cast<float, int>(0xff800000); // -inf
+    int best = n_vocab;
+    for (int v = item_ct1.get_local_id(2); v < n_vocab;
+         v += item_ct1.get_local_range(2)) {
+        const float s = apply_penalties(l[v], hit_count(v, dpct_local), p);
+        if (s > bv) { bv = s; best = v; }
+    }
+    for (int off = 16; off > 0; off >>= 1) {
+        /*
+        DPCT1108:59: '__shfl_down_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const float ov = dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), bv,
+            off);
+        /*
+        DPCT1108:60: '__shfl_down_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const int oi = dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+            best, off);
+        if (ov > bv || (ov == bv && oi < best)) { bv = ov; best = oi; }
+    }
+    auto &sv = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &si = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int warp = (int)(item_ct1.get_local_id(2) >> 5),
+              lane = (int)(item_ct1.get_local_id(2) & 31);
+    if (lane == 0) { sv[warp] = bv; si[warp] = best; }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (warp == 0) {
+        const int nw = (int)((item_ct1.get_local_range(2) + 31) >> 5);
+        float wv =
+            lane < nw ? sv[lane] : sycl::bit_cast<float, int>(0xff800000);
+        int wi = lane < nw ? si[lane] : n_vocab;
+        for (int off = 16; off > 0; off >>= 1) {
+            /*
+            DPCT1108:61: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float ov = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                wv, off);
+            /*
+            DPCT1108:62: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int oi = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                wi, off);
+            if (ov > wv || (ov == wv && oi < wi)) { wv = ov; wi = oi; }
+        }
+        // A tie between two `-inf` candidates leaves `wi == n_vocab`, and the serial version answered 0.
+        if (lane == 0) out[t] = (wi < n_vocab) ? wi : 0;
+    }
+}
+
+/// **THE SAMPLED PATH, ONE BLOCK PER TOKEN.**  The kernel below replaced a version that ran the whole chain
+/// in ONE THREAD per token (`<<<ceil(T/64), 64>>>`, so a 4-token window fielded four threads): `top_k` alone
+/// was `k` sequential scans of the vocabulary with an inner sweep over the already-taken list - 20 x 248,320
+/// iterations of dependent work on one SM - and a verify window measured **1.6 s in the sampler**, which made
+/// every temperature-bearing request ~30x slower than a greedy one.  The selection is `k` argmax rounds, and
+/// an argmax over the vocabulary parallelises exactly like `sampler_greedy_kernel` (block over the vocab), so
+/// the rounds run back to back inside a block-per-token launch: the per-token cost falls to
+/// `k x n_vocab / 1024` plus `k` block reductions.
+///
+/// THE SEMANTICS ARE THE SERIAL ONES, EXACTLY.  Each round's argmax resolves ties to the LOWEST index (the
+/// serial scan's strict `>` keeps the first maximum it meets), so the kept sequence - both its set and its
+/// order - is unchanged; `top_p`'s cut reads that order in double arithmetic as before; temperature and the
+/// Philox draw apply after the cut.  `sampler_parity` pins all of it against the host reference.
+/*
+DPCT1110:63: The total declared local variable size in device function
+sampler_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
+                                    int n_vocab, int n_tokens,
+                                    const int *__restrict__ history,
+                                    int history_len, const SamplerParams p,
+                                    int *__restrict__ out,
+                                    uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(2);
+    if (t >= n_tokens) return;
+    const float* l = logits + (size_t) t * n_vocab;
+
+    // Temperature is needed by BOTH stages below, so it is computed here; the chain still APPLIES it after
+    // the truncation filters - the survivors are chosen on the raw logits and only then scaled.
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+
+    // The penalty window is the last `penalty_last_n` entries of this row's history (disabled at this
+    // launch: `sample_tokens` refuses a non-zero `penalty_last_n` without a history buffer).
+    const int* hrow = history ? history + (size_t) t * history_len : nullptr;
+    int hlen = 0;
+    if (hrow) {
+        hlen = p.penalty_last_n < history_len ? p.penalty_last_n : history_len;
+        if (hlen < 0) hlen = 0;
+        hrow += history_len - hlen;          // the window is the TAIL
+    }
+
+    // the membership bitmap, as in `sampler_greedy_kernel` - see the cost note there.  The gate needs an
+    // NON-EMPTY WINDOW too: the launch sizes the bitmap only when penalties are on, so a caller that hands over
+    // a stale history buffer with `penalty_last_n == 0` must not touch it.
+    auto penal_bits = (unsigned int *)dpct_local;
+    const int bits_words = (int) ((n_vocab + 31) / 32);
+    const bool use_bits = hrow != nullptr && hlen > 0 && bits_words > 0;
+    if (use_bits) {
+#pragma unroll
+        for (int w = item_ct1.get_local_id(2); w < bits_words;
+             w += item_ct1.get_local_range(2)) penal_bits[w] = 0u;
+        /*
+        DPCT1118:64: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+        for (int i = item_ct1.get_local_id(2); i < hlen;
+             i += item_ct1.get_local_range(2))
+            if (hrow[i] >= 0 && hrow[i] < n_vocab)   // an id outside the vocabulary is never a candidate
+                dpct::atomic_fetch_or<
+                    sycl::access::address_space::generic_space>(
+                    &penal_bits[hrow[i] >> 5], 1u << (hrow[i] & 31));
+        /*
+        DPCT1118:65: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    auto hit_count = [&](int v, uint8_t *dpct_local) -> int {
+        if (!use_bits || !(penal_bits[v >> 5] & (1u << (v & 31)))) return 0;
+        return history_count(hrow, hlen, v);
+    };
+
+    // top_k in 1..64 is taken as given; 0 ("off") and anything wider mean the widest shortlist the kernel
+    // keeps, 64.  Every row writes out[t]: a verify window reads all of them.
+    const int KMAX = 64;
+    int k = (p.top_k > 0 && p.top_k < KMAX) ? p.top_k : KMAX;
+    if (k > n_vocab) k = n_vocab;
+
+    // ---- top_k: k rounds of a block argmax over the not-yet-taken.  `sel_*` holds the kept ids and their
+    // raw logits in selection order: descending by value, ties to the lower index, which is the order the
+    // top_p cut below is defined over.
+    auto &sel_ids =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[KMAX]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_logit =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[KMAX]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sv = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &si = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    for (int i = 0; i < k; ++i) {
+        // `n_vocab` is the "no candidate" index: it loses every comparison to a real one (same convention as
+        // the greedy kernel, whose tie rule this reduction shares).
+        float bv = sycl::bit_cast<float, int>(0xff800000); // -inf
+        int best = n_vocab;
+        for (int v = item_ct1.get_local_id(2); v < n_vocab;
+             v += item_ct1.get_local_range(2)) {
+            bool taken = false;
+#pragma unroll
+            for (int j = 0; j < i; ++j) if (sel_ids[j] == v) {
+                taken = true; break;
+            }
+            if (taken) continue;
+            const float s = apply_penalties(l[v], hit_count(v, dpct_local), p);
+            if (s > bv) { bv = s; best = v; }
+        }
+        for (int off = 16; off > 0; off >>= 1) {
+            /*
+            DPCT1108:68: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float ov = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                bv, off);
+            /*
+            DPCT1108:69: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int oi = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                best, off);
+            if (ov > bv || (ov == bv && oi < best)) { bv = ov; best = oi; }
+        }
+        const int warp = (int)(item_ct1.get_local_id(2) >> 5),
+                  lane = (int)(item_ct1.get_local_id(2) & 31);
+        if (lane == 0) { sv[warp] = bv; si[warp] = best; }
+        /*
+        DPCT1118:66: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        if (warp == 0) {
+            const int nw = (int)((item_ct1.get_local_range(2) + 31) >> 5);
+            float wv =
+                lane < nw ? sv[lane] : sycl::bit_cast<float, int>(0xff800000);
+            int wi = lane < nw ? si[lane] : n_vocab;
+            for (int off = 16; off > 0; off >>= 1) {
+                /*
+                DPCT1108:70: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const float ov = dpct::experimental::shift_sub_group_left(
+                    0xFFFFFFFFu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), wv,
+                    off);
+                /*
+                DPCT1108:71: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const int oi = dpct::experimental::shift_sub_group_left(
+                    0xFFFFFFFFu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), wi,
+                    off);
+                if (ov > wv || (ov == wv && oi < wi)) { wv = ov; wi = oi; }
+            }
+            if (lane == 0) { sel_ids[i] = (wi < n_vocab) ? wi : 0; sel_logit[i] = wv; }
+        }
+        /*
+        DPCT1118:67: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+
+    // ---- top_p over the top_k list (penalised logits, descending as the selection produced them), then min_p,
+    // then temperature and one Philox draw - llama.cpp's order (issue #53).  Every thread computes the same chain
+    // redundantly over `sel_*` - the arithmetic is the serial kernel's, instruction for instruction - so they
+    // agree on `pick` and thread 0 writes it.
+    int n_keep = k;
+    float mx = sel_logit[0];
+#pragma unroll
+    for (int i = 1; i < k; ++i) mx = sycl::fmax(mx, sel_logit[i]);
+    if (p.top_p < 1.0f) {
+        double sum = 0.0;
+#pragma unroll
+        for (int i = 0; i < k; ++i) sum +=
+            sycl::exp((double)sel_logit[i] - (double)mx);
+        double cum = 0.0;
+        int cut = k;
+#pragma unroll
+        for (int i = 0; i < k; ++i) {
+            cum += sycl::exp((double)sel_logit[i] - (double)mx) / sum;
+            if (cum >= (double) p.top_p) { cut = i + 1; break; }
+        }
+        if (cut < p.min_keep) cut = p.min_keep < k ? p.min_keep : k;
+        n_keep = cut;
+    }
+    // ---- min_p on top_p's survivors: the descending prefix whose probability is at least `min_p` of the top
+    // token's.  In logit space the threshold is `sel_logit[0] + logf(min_p)` - equivalent to `p >= min_p * p_max`
+    // without the overflow an exp of raw logits risks.  0 disables, and the head itself always survives
+    // (`expf(0) == 1 >= min_p` for min_p in 0..1), so the count never reaches zero.
+    if (p.min_p > 0.0f) {
+        const float thresh = sel_logit[0] + sycl::log((float)(p.min_p));
+#pragma unroll
+        for (int i = 0; i < n_keep; ++i)
+            if (sel_logit[i] < thresh) { n_keep = i; break; }
+    }
+    // temperature only: the penalties were applied once, before the selection (issue #53: they were applied a
+    // second time here, after the temperature scaling - llama.cpp's chain has one penalties stage)
+    auto scaled = [&](int i) { return sel_logit[i] * inv_t; };
+    float smx = scaled(0);
+#pragma unroll
+    for (int i = 1; i < n_keep; ++i) smx = sycl::fmax(smx, scaled(i));
+    double sum = 0.0;
+#pragma unroll
+    for (int i = 0; i < n_keep; ++i) sum +=
+        sycl::exp((double)scaled(i) - (double)smx);
+    const float u = philox_uniform(p.seed, p.counter + (uint64_t) t);
+    double cum = 0.0;
+    int pick = sel_ids[n_keep - 1];
+#pragma unroll
+    for (int i = 0; i < n_keep; ++i) {
+        cum += sycl::exp((double)scaled(i) - (double)smx) / sum;
+        if ((double) u < cum) { pick = sel_ids[i]; break; }
+    }
+    if (item_ct1.get_local_id(2) == 0) out[t] = pick;
+}
+
+}  // namespace
+
+void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
+                   const SamplerParams& p, int* out, void* stream) {
+    if (n_tokens <= 0 || n_vocab <= 0) return;
+    if (p.penalty_last_n > 0 && (history == nullptr || history_len <= 0)) {
+        std::fprintf(stderr, "sample_tokens: penalty_last_n %d needs a history (got %p, len %d)\n",
+                     p.penalty_last_n, (const void*) history, history_len);
+        std::exit(1);
+    }
+    /*
+    DPCT1083:73: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const unsigned shmem =
+        (history != nullptr && history_len > 0 && p.penalty_last_n > 0)
+            ? (unsigned)((n_vocab + 31) / 32) *
+                  sizeof(unsigned) // the penalty bitmap
+            : 0;
+    if (p.greedy || p.temperature <= 0.0f) {
+        // One block per token, 1,024 threads over the vocabulary.  See `sampler_greedy_kernel`.
+        const int gthreads = 1024;
+        /*
+        DPCT1049:72: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(shmem), cgh);
+
+                    cgh.parallel_for<
+                        dpct_kernel_name<class sampler_greedy_kernel_eacb1a>>(
+                        sycl::nd_range<3>(
+                            sycl::range(1, 1, (unsigned)n_tokens) *
+                                sycl::range(1, 1, gthreads),
+                            sycl::range(1, 1, gthreads)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                sampler_greedy_kernel(
+                                    logits, n_vocab, history, history_len, p,
+                                    p.penalty_last_n, p.penalty_last_n, out,
+                                    dpct_local_acc_ct1
+                                        .get_multi_ptr<
+                                            sycl::access::decorated::no>()
+                                        .get());
+                            });
+                });
+        }
+    } else {
+        // The same block-per-token shape: the selection's k argmax rounds reduce inside the block.  See
+        // `sampler_kernel`'s header for what the old one-thread-per-token launch cost.
+        /*
+        DPCT1049:74: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(shmem), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<class sampler_kernel_9f529a>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_tokens) *
+                                          sycl::range(1, 1, 1024),
+                                      sycl::range(1, 1, 1024)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        sampler_kernel(
+                            logits, n_vocab, n_tokens, history, history_len, p,
+                            out,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+    }
+    /*
+    DPCT1010:403: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+
+    if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/shared_expert.dp.cpp b/sycl/src/kernels/cuda/shared_expert.dp.cpp
new file mode 100644
index 00000000000..95a95e58136
--- /dev/null
+++ b/sycl/src/kernels/cuda/shared_expert.dp.cpp
@@ -0,0 +1,596 @@
+// src/kernels/cuda/shared_expert.cu - P2.S2: the shared expert.
+//
+// `ref/moe.py::shared_expert`, transcribed:
+//
+//     h = silu(x @ gate_shexp.T) * (x @ up_shexp.T)      <- SILU GOES ON GATE, not on up
+//     h = h @ down_shexp.T                                (nt, n_embd)
+//     g = sigmoid(x @ gate_inp_shexp)                     (nt,) ONE SCALAR PER TOKEN
+//     return h * g[:, None]
+//
+// TWO THINGS HERE WERE BELIEVED WRONG FOR MANY ROUNDS and `docs/semantics.md` records both.  SILU GOES ON THE
+// GATE TENSOR: the opposite reading is plausible, produces the right shapes, and is wrong.  And
+// `ffn_gate_inp_shexp` is `(n_embd,)` whose output is "one value per token" - a SCALAR gate obtained by dotting
+// that vector with the hidden state, NOT a per-expert gate and NOT a per-dimension elementwise one.  Both were
+// live readings of the same shapes until the source comment settled them.
+//
+// The result is ADDED to the routed output - not router-weighted, not renormalised against it.
+//
+// The legacy canonical projections use their explicit Q8_0/Q8_K activation images. The optional native
+// BF16 path affects only the scalar gate: it reads the original F32 input and uses pinned CUDA MMVF plus
+// an FP32 sigmoid. Native projection overrides independently select CUDA Q8_1 MMVQ and FP32 SwiGLU.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/shared_expert.hpp"
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s2_gemv_q8.hpp"
+#include "strata/kernels/s_gemv.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+
+#include <cmath>
+#include <climits>
+#include <cstdio>
+#include <string>
+#include <cstdlib>
+#include <cstring>
+#include <stdexcept>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int THREADS = 128;
+bool native_bf16 = false;
+
+// `f32_to_f16` used to live here as a private copy.  Round 198 found it - and the identical one in
+// `quantize_act.cu` - returning a NaN for every FINITE value that overflows fp16 (1e30, 65536, 1e45) instead
+// of saturating to inf, because `exp >= 31` conflates an f32 inf/NaN with an out-of-range finite exponent.
+// This file's fixture is all O(1), so it could not see it.  The conversion now lives in one place, with the
+// regimes spelled out.
+
+// silu(x) = x / (1 + exp(-x)), written as `ref/moe.py` writes it, in DOUBLE then cast - the reference works in
+// float64 and a float32 exp differs in the last bits.  The multiplication by `up` is the reference's order.
+__dpct_inline__ void swiglu_kernel(const float *__restrict__ gate,
+                                   const float *__restrict__ up,
+                                   float *__restrict__ out, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const double x = (double) gate[i];
+    out[i] = (float)(x / (1.0 + sycl::exp(-x))) * up[i];
+}
+
+__dpct_inline__ void native_swiglu_kernel(const float *gate, const float *up,
+                                          float *out, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i >= n) return;
+    // Pinned CUDA unary.cuh op_silu, then unary_gated_op_kernel's multiply.
+    // Explicit intrinsics reproduce its --use_fast_math operations without
+    // changing compilation of the default legacy arithmetic in this file.
+    out[i] = gate[i] / (1.0f + sycl::native::exp(-gate[i])) * up[i];
+}
+
+void to_f16_kernel(const float* __restrict__ in, uint16_t* __restrict__ out, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) out[i] = f16_from_f32(in[i]);
+}
+
+// The per-token scalar gate: sigmoid(dot(x, w)) with w = `ffn_gate_inp_shexp` (n_embd,).
+//
+// **ONE THREAD WAS THE LARGEST SINGLE KERNEL IN THE MODEL, AND THE COMMENT DEFENDING IT SAID WHY IT SHOULD
+// NOT BE.**  It read: "n_embd is 2560, so this is a short serial loop and the parallelism is elsewhere."
+// 2560 iterations is not short when each one is a DOUBLE multiply-add.  This card's double rate is **1/64** of
+// its float rate, so the loop is a 2560-long dependency chain through a 1/64-rate unit - tens of microseconds
+// from the chain alone, before counting 2560 sequential global loads issued by one thread with no coalescing.
+//
+// MEASURED, and this is what the number looks like from outside: `shared_expert` is **0.2374 ms of a
+// 0.8883 ms block - 26.7% of the whole block, 11.4 ms per token** - for three projections that read 5.5 MB and
+// whose memory floor is 0.009 ms.  It is seven kernels, and six of them are GEMVs or elementwise passes over
+// 640-2560 elements.  This is the one that cannot be explained by bandwidth.
+//
+// THE DOUBLE ACCUMULATOR IS KEPT.  `ref/gr.py` reduces in float64 and `block_sum` in `gr.cu` exists for the
+// same reason - the summation order of a tree is not the reference's, so the defence is enough precision that
+// the order stops mattering.  What changes is the CHAIN: ten terms per thread instead of 2560, then a
+// tree-reduce.  Through a sigmoid, a 1e-16 relative difference in the dot is not a difference.
+//
+// **BOTH OPERANDS ARE BF16, AND THAT IS THE REFERENCE'S CONTRACT, NOT A STORAGE DETAIL.**  `gate_inp_shexp` is a
+// BF16 weight, so ggml converts the activation to its `vec_dot_type` - BF16 - exactly as it does for the router
+// (`docs/activation-contract.md`).  This kernel used to take `const float* w` while the LOADER had already
+// re-rounded the tensor to 2 B/elem, so it read 2560 floats out of a 5120-byte buffer: 5120 B past the end of
+// the tensor, inside the 4.5 GiB arena, where nothing faults.  The dot came out astronomically large, sigmoid
+// saturated to 1.0, and `scale_kernel` multiplied the shared expert's output by it - which is why the FIRST
+// symptom was 2560 non-finite outputs rather than a wrong scalar.
+//
+// A wrong scalar here is the quiet failure mode: sigmoid bounds the damage to [0,1], so a gate that should be
+// 0.5 and reads 1.0 scales the shared expert by 2x and produces perfectly finite, perfectly plausible logits.
+__dpct_inline__ double warp_sum_d(double v) {
+    /*
+DPCT1108:242: '__shfl_down_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+    /*
+DPCT1121:243: Make sure that the "v" which is used in the SYCL group
+function/algorithm is initialized.
+*/
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) v +=
+        dpct::experimental::shift_sub_group_left(
+            0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            off);
+    /*
+    DPCT1108:244: '__shfl_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    /*
+    DPCT1121:245: Make sure that the "v" which is used in the SYCL group
+    function/algorithm is initialized.
+    */
+    return dpct::experimental::select_from_sub_group(
+        0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v, 0);
+}
+
+__dpct_inline__ void scalar_gate_kernel(const uint16_t *__restrict__ x_bf16,
+                                        const uint16_t *__restrict__ w_bf16,
+                                        float *__restrict__ out, int n_embd) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &scratch = *sycl::ext::oneapi::group_local_memory_for_overwrite<double[8]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<
+        3>()); // 8 warps: the launch is <<<1, 256>>>
+    double acc = 0.0;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n_embd;
+         i += item_ct1.get_local_range(2))
+        acc += (double) f32_from_bf16(x_bf16[i]) * (double) f32_from_bf16(w_bf16[i]);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    acc = warp_sum_d(acc);
+    if (lane == 0) scratch[warp] = acc;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const int nw = ((int)item_ct1.get_local_range(2) + 31) >> 5;
+    if (warp == 0) {
+        acc = (item_ct1.get_local_id(2) < nw)
+                  ? scratch[item_ct1.get_local_id(2)]
+                  : 0.0;
+        acc = warp_sum_d(acc);
+        if (item_ct1.get_local_id(2) == 0) out[0] =
+            (float)(1.0 / (1.0 + sycl::exp(-acc)));
+    }
+}
+
+__dpct_inline__ void scale_kernel(float *__restrict__ out,
+                                  const float *__restrict__ g, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) out[i] *= g[0];
+}
+
+__dpct_inline__ void native_scalar_sigmoid_kernel(float *gate) {
+    // Match the single-token CUDA sigmoid's FP32 fast-math operations without changing legacy kernels'
+    // compilation flags. The dot product was already reduced by the pinned native MMVF implementation.
+    gate[0] = 1.0f / (1.0f + sycl::native::exp(-gate[0]));
+}
+__dpct_inline__ void native_scalar_sigmoid_multi_kernel(
+    float *gate) { // thread t = token t, same expression
+    /*
+    DPCT1064:936: Migrated __expf call is used in a macro/template definition
+    and may not be valid for all macro/template uses. Adjust the code.
+    */
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    gate[item_ct1.get_local_id(2)] =
+        1.0f / (1.0f + sycl::native::exp(-gate[item_ct1.get_local_id(2)]));
+}
+
+/// The MoE block's final combination.  See the header for the two readings it exists to pin.
+__dpct_inline__ void moe_combine_kernel(const float *__restrict__ parts,
+                                        const float *__restrict__ weights,
+                                        const float *__restrict__ shared,
+                                        float *__restrict__ y, int n_embd,
+                                        int k, int has_shared) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int j = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (j >= n_embd) return;
+    // Accumulate in DOUBLE, in the reference's own order (`for i in range(k): out[t] += w[t,i] * g[0]`).
+    // f32 would be defensible for ten terms, but the reference is float64 and this is one line.
+    double acc = 0.0;
+#pragma unroll
+    for (int e = 0; e < k; ++e) acc +=
+        (double)weights[e] * (double)parts[(size_t)e * n_embd + j];
+    // The SHARED output is added PLAIN - not router-weighted, not renormalised against the routed sum.
+    if (has_shared) acc += (double) shared[j];
+    y[j] = (float) acc;
+}
+
+}  // namespace
+
+void shared_expert_set_native_bf16(bool enabled) { native_bf16 = enabled; }
+
+namespace {
+__dpct_inline__ void scale_rows_kernel(float *__restrict__ out,
+                                       const float *__restrict__ g, int n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (i < n) out[(size_t) t * n + i] *= g[t];
+}
+}  // namespace
+
+void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, const NativeSharedWeights& nw,
+                         const uint16_t* gate_inp_bf16, float* gate, float* up, float* g, float* out, int64_t n_embd,
+                         int64_t n_ff, void* stream) {
+    if (n_tok < 1 || n_tok > 8 || !nw.q8_1 || !nw.gate_data || !nw.up_data || !nw.down_data || !stream)
+        throw std::invalid_argument("shared_expert_multi: needs 1..8 tokens, native weights, scratch and a stream");
+    dpct::queue_ptr cs = strata::q_of(stream);
+    native_quantize_q8_1(x, nw.q8_1, (int) n_embd, n_tok, stream);
+    native_mmvq(nw.gate_type, nw.gate_data, nw.q8_1, gate, (int) n_embd, (int) n_ff, n_tok, stream);
+    native_mmvq(nw.up_type, nw.up_data, nw.q8_1, up, (int) n_embd, (int) n_ff, n_tok, stream);
+    const int n = (int) (n_ff * n_tok);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->parallel_for<dpct_kernel_name<class native_swiglu_kernel_93d137>>(
+            sycl::nd_range<3>(
+                sycl::range(1, 1, (unsigned)((n + THREADS - 1) / THREADS)) *
+                    sycl::range(1, 1, THREADS),
+                sycl::range(1, 1, THREADS)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                native_swiglu_kernel(gate, up, gate, n);
+            });
+    }
+    native_quantize_q8_1(gate, nw.q8_1, (int) n_ff, n_tok, stream);
+    native_mmvq(nw.down_type, nw.down_data, nw.q8_1, out, (int) n_ff, (int) n_embd, n_tok, stream);
+    static const bool batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
+    if (native_bf16 && batch && n_tok > 1) {   // one gemv for all rows (outputs identical), one sigmoid launch
+        bf16_gemv_fp32_mmvf_multi(x, n_embd, gate_inp_bf16, g, 1, n_embd, 1, n_tok, stream);
+        /*
+        DPCT1049:246: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<
+                class native_scalar_sigmoid_multi_kernel_e0530d>>(
+                sycl::nd_range<3>(sycl::range(1, 1, n_tok),
+                                  sycl::range(1, 1, n_tok)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    native_scalar_sigmoid_multi_kernel(g);
+                });
+        }
+    } else
+    for (int t = 0; t < n_tok; ++t) {
+        if (native_bf16) {
+            bf16_gemv_fp32_mmvf(x + (size_t) t * n_embd, gate_inp_bf16, g + t, n_embd, 1, stream);
+                {
+                    auto exp_props =
+                        sycl::ext::oneapi::experimental::properties{
+                            sycl::ext::oneapi::experimental::use_root_sync};
+
+                    cs->submit([&](sycl::handler &cgh) {
+                        auto g_t_ct0 = g + t;
+
+                        cgh.parallel_for<dpct_kernel_name<
+                            class native_scalar_sigmoid_kernel_344179>>(
+                            sycl::nd_range<3>(sycl::range(1, 1, 1),
+                                              sycl::range(1, 1, 1)),
+                            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                                native_scalar_sigmoid_kernel(g_t_ct0);
+                            });
+                    });
+                }
+        } else {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+                dpct::has_capability_or_fail(cs->get_device(),
+                                             {sycl::aspect::fp64});
+
+                cs->submit([&](sycl::handler &cgh) {
+                    auto x_bf16_size_t_t_n_embd_ct0 =
+                        x_bf16 + (size_t)t * n_embd;
+                    auto g_t_ct2 = g + t;
+
+                    cgh.parallel_for<
+                        dpct_kernel_name<class scalar_gate_kernel_372f76>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, 256),
+                                          sycl::range(1, 1, 256)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                scalar_gate_kernel(x_bf16_size_t_t_n_embd_ct0,
+                                                   gate_inp_bf16, g_t_ct2,
+                                                   (int)n_embd);
+                            });
+                });
+        }
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        cs->parallel_for<dpct_kernel_name<class scale_rows_kernel_4f17ec>>(
+            sycl::nd_range<3>(
+                sycl::range(1, (unsigned)n_tok,
+                            (unsigned)((n_embd + THREADS - 1) / THREADS)) *
+                    sycl::range(1, 1, THREADS),
+                sycl::range(1, 1, THREADS)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                scale_rows_kernel(out, g, (int)n_embd);
+            });
+    }
+    /*
+    DPCT1010:939: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:940: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    /*
+    DPCT1001:937: The statement could not be removed.
+    */
+    /*
+    DPCT1000:938: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (e != 0) throw std::runtime_error(std::string("shared_expert_multi: ") +
+                                         dpct::get_error_string_dummy(e));
+}
+
+uint64_t shared_expert_scratch_bytes(int64_t n_ff) {
+    // gate (n_ff f32) | up (n_ff f32) | q8_0 (n_ff/32*34) | q8k (n_ff/256*292) | g (1 f32), 16-byte aligned
+    const uint64_t a = ((uint64_t) n_ff * 4 + 15) & ~15ull;
+    const uint64_t q0 = ((uint64_t) (n_ff / 32) * 34 + 15) & ~15ull;
+    const uint64_t qk = ((uint64_t) (n_ff / 256) * 292 + 15) & ~15ull;
+    return a * 2 + q0 + qk + 32;
+}
+
+void shared_expert(const uint8_t *x_q8_0, const uint8_t *x_q8k,
+                   const uint16_t *x_bf16, const SForm &gate_form,
+                   const uint8_t *gate_codes, const float *gate_scales,
+                   const float *gate_off, const SForm &up_form,
+                   const uint8_t *up_codes, const float *up_scales,
+                   const float *up_off, const SForm &down_form,
+                   const uint8_t *down_codes, const float *down_scales,
+                   const float *down_off, const uint16_t *gate_inp_bf16,
+                   float *scratch, float *out, int64_t n_embd, int64_t n_ff,
+                   int tpr, void *stream, const float *x_f32,
+                   const NativeSharedWeights *native) try {
+    if (n_embd <= 0 || n_ff <= 0) return;
+    const bool use_native = native_bf16;
+    const bool native_gate = native && native->gate_data && native_mmvq_supported(native->gate_type);
+    const bool native_up = native && native->up_data && native_mmvq_supported(native->up_type);
+    const bool native_down = native && native->down_data && native_mmvq_supported(native->down_type);
+    const bool native_projection = native_gate || native_up || native_down;
+    if ((use_native || native_gate || native_up) && !x_f32)
+        throw std::invalid_argument("shared_expert native input projection requires unrounded x_f32");
+    if (native_projection) {
+        if (!native->q8_1 || !stream || n_embd > INT_MAX || n_ff > INT_MAX)
+            throw std::invalid_argument("shared_expert native projections require scratch, stream and int32 dimensions");
+        // Validate every active shape before any kernel is enqueued.
+        if (native_gate) native_mmvq_weight_bytes(native->gate_type, (int) n_embd, (int) n_ff);
+        if (native_up) native_mmvq_weight_bytes(native->up_type, (int) n_embd, (int) n_ff);
+        if (native_down) native_mmvq_weight_bytes(native->down_type, (int) n_ff, (int) n_embd);
+    }
+    if (scratch == nullptr) {
+        std::fprintf(stderr, "shared_expert: scratch is null; the caller owns it "
+                             "(see shared_expert_scratch_bytes)\n");
+        std::exit(1);
+    }
+    // CARVED FROM THE CALLER'S SCRATCH.  This used to be four `cudaMalloc`s and four `cudaFree`s per call, which
+    // is illegal during stream capture AND a token-path allocation - P2.T10 forbids both.
+    uint8_t* p = (uint8_t*) scratch;
+    const uint64_t a = ((uint64_t) n_ff * 4 + 15) & ~15ull;
+    const uint64_t q0 = ((uint64_t) (n_ff / 32) * 34 + 15) & ~15ull;
+    const uint64_t qk = ((uint64_t) (n_ff / 256) * 292 + 15) & ~15ull;
+    float* gate = (float*) p;
+    float* up = (float*) (p + a);
+    uint8_t* h_q8_0 = (uint8_t*) (p + a * 2);
+    uint8_t* h_q8k = (uint8_t*) (p + a * 2 + q0);
+    float* g = (float*) (p + a * 2 + q0 + qk);
+
+    // WHICH ACTIVATION THIS PROJECTION WANTS, READ FROM ITS OWN FORM.  See `SForm::act_kind`: the three
+    // families cannot be told apart by the other fields, so the kind is carried rather than derived.
+    auto gemv = [&](const SForm& f, const uint8_t* codes, const float* scales, const float* off,
+                    const uint8_t* act80, const uint8_t* actq8k, float* y, int64_t nin, int64_t nout) {
+        if (f.code_bits == 2) {
+            s2_gemv_q8(act80, codes, scales, y, nin, nout, tpr, stream);
+        } else if (f.act_kind == 1) {
+            s_gemv_q8k_split(actq8k, codes, scales, off, y, nin, nout, f, stream);
+        } else {
+            s_gemv_q8_0_split(act80, codes, scales, off, y, nin, nout, f, stream);
+        }
+    };
+
+    const unsigned g_ff = (unsigned) ((n_ff + THREADS - 1) / THREADS);
+    const unsigned g_embd = (unsigned) ((n_embd + THREADS - 1) / THREADS);
+
+    // gate and up projections, then silu(gate) * up in place in `gate`
+    if (native_gate || native_up)
+        native_quantize_q8_1(x_f32, native->q8_1, (int) n_embd, 1, stream);
+    if (native_gate)
+        native_mmvq(native->gate_type, native->gate_data, native->q8_1, gate, (int) n_embd, (int) n_ff, 1, stream);
+    else
+        gemv(gate_form, gate_codes, gate_scales, gate_off, x_q8_0, x_q8k, gate, n_embd, n_ff);
+    if (native_up)
+        native_mmvq(native->up_type, native->up_data, native->q8_1, up, (int) n_embd, (int) n_ff, 1, stream);
+    else
+        gemv(up_form, up_codes, up_scales, up_off, x_q8_0, x_q8k, up, n_embd, n_ff);
+    if (native_projection)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class native_swiglu_kernel_5e9503>>(
+                sycl::nd_range<3>(sycl::range(1, 1, g_ff) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    native_swiglu_kernel(gate, up, gate, (int)n_ff);
+                });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class swiglu_kernel_fbfcfe>>(
+                sycl::nd_range<3>(sycl::range(1, 1, g_ff) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gate, up, gate, (int)n_ff);
+                });
+    }
+
+    // down: (n_ff) -> (n_embd), and THE INTERMEDIATE IS QUANTIZED TO THE DOWN WEIGHT'S OWN CONTRACT - which is
+    // what `ggml_mul_mat` does for every matmul in the model.  It used to be rounded to fp16 with no
+    // justification beyond "the kernel takes fp16".
+    if (native_down) {
+        native_quantize_q8_1(gate, native->q8_1, (int) n_ff, 1, stream);
+        native_mmvq(native->down_type, native->down_data, native->q8_1, out, (int) n_ff, (int) n_embd, 1, stream);
+    } else if (down_form.act_kind == 1) {
+        if (n_ff % 256 != 0) {
+            std::fprintf(stderr, "shared_expert: the down weight wants Q8_K but n_ff %lld is not a multiple "
+                                 "of 256; Q8_K is structurally impossible here\n", (long long) n_ff);
+            std::exit(1);
+        }
+        quantize_q8_K(gate, h_q8k, n_ff, stream);
+        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+    } else if (down_form.code_bits == 2) {
+        quantize_q8_0(gate, h_q8_0, n_ff, stream);
+        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+    } else {
+        quantize_q8_0(gate, h_q8_0, n_ff, stream);
+        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+    }
+
+    // the per-token scalar gate, then the multiply.  Note the gate is computed from `x`, the ORIGINAL hidden
+    // state, not from anything the expert produced. The historical branch uses BF16-rounded inputs; the
+    // native branch uses the pinned CUDA FP32 activation contract.
+    // `<<<1, 256>>>`: one block, because the output is ONE scalar and a second block would only add a global
+    // round trip.  256 threads is the reduction's width, not the problem's size.
+    if (use_native) {
+        bf16_gemv_fp32_mmvf(x_f32, gate_inp_bf16, g, n_embd, 1, stream);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<dpct_kernel_name<
+                    class native_scalar_sigmoid_kernel_3dbcd0>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, 1),
+                                      sycl::range(1, 1, 1)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        native_scalar_sigmoid_kernel(g);
+                    });
+        }
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class scalar_gate_kernel_264fbf>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        scalar_gate_kernel(x_bf16, gate_inp_bf16, g,
+                                           (int)n_embd);
+                    });
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class scale_kernel_a41a71>>(
+                sycl::nd_range<3>(sycl::range(1, 1, g_embd) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    scale_kernel(out, g, (int)n_embd);
+                });
+    }
+
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void moe_combine(const float *parts, const float *weights, const float *shared,
+                 float *y, int64_t n_embd, int64_t k, void *stream) try {
+    if (n_embd <= 0 || k <= 0) return;
+    // k > 64 is refused rather than truncated: silently summing the first 64 of a longer list would be a
+    // wrong answer that looks like a right one, and no geometry in this artifact comes close to it.
+    if (k > 64) {
+        std::fprintf(stderr, "moe_combine: k = %lld exceeds 64\n", (long long) k);
+        std::exit(1);
+    }
+    const unsigned grid = (unsigned) ((n_embd + THREADS - 1) / THREADS);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(
+            strata::q_of(stream)->get_device(),
+            {sycl::aspect::fp64});
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                int shared_nullptr_ct6 = shared != nullptr;
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class moe_combine_kernel_c03916>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, grid) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        moe_combine_kernel(parts, weights, shared, y,
+                                           (int)n_embd, (int)k,
+                                           shared_nullptr_ct6);
+                    });
+            });
+    }
+    if (stream == nullptr) {
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+    }
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
new file mode 100644
index 00000000000..a71a7eaca0f
--- /dev/null
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -0,0 +1,1197 @@
+// src/kernels/cuda/verify_kernels.cu - see include/strata/kernels/verify_kernels.hpp.
+//
+// The per-token arithmetic of every kernel here is transcribed from its single-token original (fused_gdn.cu,
+// elementwise.cu) with the same operation order, so a verify window reproduces plain decode bit for bit.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+#include <time.h>
+
+namespace strata::kernels {
+namespace {
+
+constexpr int S = 128;          // GDN state size
+constexpr int RG = 4;
+constexpr int RPG = S / RG;
+
+void check(const char* what) {
+    /*
+    DPCT1010:871: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:872: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+
+__dpct_inline__ void gdn_conv_l2_multi_kernel(const float *__restrict__ hist,
+                                              const float *__restrict__ qkv,
+                                              const float *__restrict__ w,
+                                              float *__restrict__ h, int C,
+                                              int qk_heads, float eps,
+                                              int t_begin) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &part =
+    *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = t_begin + item_ct1.get_group(1);
+    const int c = item_ct1.get_group(2) * S + item_ct1.get_local_id(2);
+    // the window of token t: [hist0, hist1, hist2, x_0, ..., x_t], its last four entries
+    float win[3];
+#pragma unroll
+    for (int j = 0; j < 3; ++j) {
+        const int src = t + j;          // index into [hist(3) | x...]
+        win[j] = src < 3 ? hist[c * 3 + src] : qkv[(size_t) (src - 3) * C + c];
+    }
+    const float v0 = win[0], v1 = win[1], v2 = win[2], x = qkv[(size_t) t * C + c];
+    float sum = v0 * w[c * 4] + v1 * w[c * 4 + 1] + v2 * w[c * 4 + 2] + x * w[c * 4 + 3];
+    float y = sum / (1.0f + sycl::native::exp(-sum));
+    if ((int)item_ct1.get_group(2) < qk_heads) {
+        float sq = y * y;
+        /*
+DPCT1108:184: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+        for (int o = 16; o > 0; o >>= 1) sq +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                sq, o);
+        if ((item_ct1.get_local_id(2) & 31) == 0)
+            part[item_ct1.get_local_id(2) >> 5] = sq;
+        /*
+        DPCT1118:183: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        const float ss = part[0] + part[1] + part[2] + part[3];
+        y *= sycl::rsqrt(ss + eps);
+    }
+    h[(size_t) t * C + c] = y;
+}
+
+__dpct_inline__ void
+gdn_conv_commit_kernel(float *__restrict__ hist, const float *__restrict__ qkv,
+                       int C, const int32_t *__restrict__ n_keep) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= C) return;
+    const int n = *n_keep;
+    if (n <= 0) return;
+    float seq[3];
+#pragma unroll
+    for (int j = 0; j < 3; ++j) {
+        const int src = n + j;          // the last three of [hist(3) | x_0..x_{n-1}]
+        seq[j] = src < 3 ? hist[c * 3 + src] : qkv[(size_t) (src - 3) * C + c];
+    }
+    hist[c * 3] = seq[0];
+    hist[c * 3 + 1] = seq[1];
+    hist[c * 3 + 2] = seq[2];
+}
+
+/*
+DPCT1110:185: The total declared local variable size in device function
+gdn_ab_multi_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gdn_ab_multi_kernel(
+    const float *__restrict__ x, const uint16_t *__restrict__ wa,
+    const uint16_t *__restrict__ wb, const float *__restrict__ dt,
+    const float *__restrict__ ssm_a, float *__restrict__ gate,
+    float *__restrict__ beta, int n, int h_v, int T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2) * 8 + (item_ct1.get_local_id(2) >> 5),
+              lane = item_ct1.get_local_id(2) & 31;
+    if (row >= 2 * h_v) return;
+    const bool is_beta = row >= h_v;
+    const int r = is_beta ? row - h_v : row;
+    const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(
+        (is_beta ? wb : wa) + (size_t)r * n);
+    float acc[kVerifyMaxT];
+#pragma unroll
+    for (int t = 0; t < kVerifyMaxT; ++t) acc[t] = 0.0f;
+    for (int j = lane; j < n / 8; j += 32) {
+        /*
+        DPCT1098:873: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wv = *(w4 + j);
+#pragma unroll
+        for (int t = 0; t < kVerifyMaxT; ++t) {
+            if (t >= T) break;
+            const float* xt = x + (size_t) t * n;
+            const sycl::float4 xa =
+                *reinterpret_cast<const sycl::float4 *>(xt + j * 8);
+            const sycl::float4 xb =
+                *reinterpret_cast<const sycl::float4 *>(xt + j * 8 + 4);
+            float a = acc[t];
+            a = sycl::fma(sycl::bit_cast<float>(wv.x() << 16), (float)(xa.x()),
+                          a);
+                a = sycl::fma(sycl::bit_cast<float>(wv.x() & 0xffff0000u),
+                              (float)(xa.y()), a);
+            a = sycl::fma(sycl::bit_cast<float>(wv.y() << 16), (float)(xa.z()),
+                          a);
+                a = sycl::fma(sycl::bit_cast<float>(wv.y() & 0xffff0000u),
+                              (float)(xa.w()), a);
+            a = sycl::fma(sycl::bit_cast<float>(wv.z() << 16), (float)(xb.x()),
+                          a);
+                a = sycl::fma(sycl::bit_cast<float>(wv.z() & 0xffff0000u),
+                              (float)(xb.y()), a);
+            a = sycl::fma(sycl::bit_cast<float>(wv.w() << 16), (float)(xb.z()),
+                          a);
+                a = sycl::fma(sycl::bit_cast<float>(wv.w() & 0xffff0000u),
+                              (float)(xb.w()), a);
+            acc[t] = a;
+        }
+    }
+#pragma unroll
+    for (int t = 0; t < kVerifyMaxT; ++t) {
+        if (t >= T) break;
+        float a = acc[t];
+        /*
+DPCT1108:186: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+        for (int o = 16; o > 0; o >>= 1) a +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                a, o);
+        if (lane != 0) continue;
+        if (is_beta) {
+            beta[(size_t)t * h_v + r] = 1.0f / (1.0f + sycl::native::exp(-a));
+        } else {
+            const float v = a + dt[r];
+            const float sp = v > 20.0f ? v : sycl::log1p(sycl::native::exp(v));
+            gate[(size_t) t * h_v + r] = sp * ssm_a[r];
+        }
+    }
+}
+
+/*
+DPCT1110:187: The total declared local variable size in device function
+gdn_step_norm_multi_kernel exceeds 128 bytes and may cause high register
+pressure. Consult with your hardware vendor to find the total register size
+available and adjust the code, or use smaller sub-group size to avoid high
+register pressure.
+*/
+__dpct_inline__ void gdn_step_norm_multi_kernel(
+    float *__restrict__ state, const float *__restrict__ hbuf, int C,
+    const float *__restrict__ gate, const float *__restrict__ beta,
+    const float *__restrict__ z, const float *__restrict__ gamma, float eps,
+    float *__restrict__ y, int h_k, int h_v, int T,
+    const int32_t *__restrict__ n_keep, int t_out_begin) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sq = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &red =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[RG][S]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[S * RG / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int head = item_ct1.get_group(2);
+    const int col = item_ct1.get_local_id(2);
+    const int rg = item_ct1.get_local_id(1);
+    const int tid = rg * S + col;
+    const int qh = head % h_k;
+    const int qk = S * h_k;             // q at [0, qk), k at [qk, 2qk), v at [2qk, ...)
+    const int value_dim = S * h_v;
+    const int n = n_keep ? *n_keep : T;
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * h_v + head) * S + col;
+    const size_t row_stride = (size_t) h_v * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * row_stride];
+    for (int t = 0; t < n; ++t) {
+        const float* ht = hbuf + (size_t) t * C;
+        /*
+        DPCT1118:188: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:874: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier(); // the previous token is done with sk/sq/red/wsum
+        if (tid < S) { sk[tid] = ht[qk + qh * S + tid]; sq[tid] = ht[qh * S + tid]; }
+        /*
+        DPCT1118:189: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:875: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float g = sycl::native::exp(gate[(size_t)t * h_v + head]);
+        float kv = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r)
+            kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
+        red[rg][col] = kv;
+        /*
+        DPCT1118:190: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:876: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float kv_col = red[0][col] + red[1][col] + red[2][col] + red[3][col];
+        const float delta = (ht[2 * qk + head * S + col] - g * kv_col) * beta[(size_t) t * h_v + head];
+        float o = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) {
+            s[r] = sycl::fma((float)g, s[r], sk[rg * RPG + r] * delta);
+            o = sycl::fma(s[r], sq[rg * RPG + r], o);
+        }
+        /*
+        DPCT1118:191: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:877: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        red[rg][col] = o;
+        /*
+        DPCT1118:192: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:878: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        float oc = 0.0f, sq_part = 0.0f;
+        if (rg == 0) {
+            oc = (red[0][col] + red[1][col] + red[2][col] + red[3][col]) *
+                 sycl::rsqrt((float)S);
+            sq_part = oc * oc;
+        }
+        if (t < t_out_begin) continue;   // a replayed token: its state update is needed, its output is not
+        /*
+DPCT1108:194: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+        for (int o2 = 16; o2 > 0; o2 >>= 1) sq_part +=
+            dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                sq_part, o2);
+        if ((tid & 31) == 0) wsum[tid >> 5] = sq_part;
+        /*
+        DPCT1118:193: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:879: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (rg == 0) {
+            const float ss = wsum[0] + wsum[1] + wsum[2] + wsum[3];
+            const float scale = sycl::rsqrt(ss / (float)S + eps);
+            const float zz = z[(size_t) t * value_dim + head * S + col];
+            y[(size_t)t * value_dim + head * S + col] =
+                oc * scale * gamma[col] *
+                (1.0f / (1.0f + sycl::native::exp(-zz)));
+        }
+    }
+    if (n_keep != nullptr && n > 0) {
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) base[r * row_stride] = s[r];
+    }
+}
+
+__dpct_inline__ void embedding_gather_dev_kernel(
+    const uint8_t *__restrict__ codes, const float *__restrict__ scales,
+    const float *__restrict__ offsets, const int32_t *__restrict__ tokens,
+    int64_t n, int code_bits, int code_bias, int group_elems,
+    unsigned long long row_codes, unsigned long long row_groups,
+    float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const unsigned long long token = (unsigned long long) tokens[t];
+    const uint8_t* c = codes + token * row_codes;
+    const float* sc = scales + token * row_groups;
+    const float* of = offsets ? offsets + token * row_groups : nullptr;
+    const int per_byte = 8 / code_bits;
+    const unsigned mask = (1u << code_bits) - 1u;
+    const int code = (c[i / per_byte] >> ((i % per_byte) * code_bits)) & mask;
+    const int64_t group = i / group_elems;
+    /*
+    DPCT1013:880: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    const float product = (float)(code + code_bias) * sc[group];
+    /*
+    DPCT1013:881: The rounding mode could not be specified and the generated
+    code may have different accuracy than the original code. Verify the
+    correctness. SYCL math built-in function rounding mode is aligned with
+    OpenCL C 1.2 standard.
+    */
+    out[(size_t)t * n + i] = product + (of ? of[group] : 0.0f);
+}
+
+__dpct_inline__ void broadcast_streams_kernel(const float *__restrict__ x,
+                                              float *__restrict__ R, int64_t n,
+                                              int hc) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n * hc) return;
+    R[(size_t) t * n * hc + i] = x[(size_t) t * n + i % n];
+}
+
+__dpct_inline__ void copy_indexed_kernel(float *__restrict__ dst,
+                                         const float *__restrict__ src,
+                                         int64_t stride,
+                                         const int32_t *__restrict__ index,
+                                         int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int idx = *index;
+    if (idx < 0) return;
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (int64_t)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2))
+        dst[i] = src[(size_t) idx * stride + i];
+}
+
+__dpct_inline__ void
+fetch_blobs_kernel(const unsigned long long *__restrict__ src,
+                   const int32_t *__restrict__ n, sycl::uint4 *__restrict__ dst,
+                   long long per) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long total = (long long)*n * per;
+    for (long long i =
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < total; i += (long long)item_ct1.get_group_range(2) *
+                         item_ct1.get_local_range(2)) {
+        const long long k = i / per, off = i - k * per;
+        dst[i] = ((const sycl::uint4 *)src[k])[off];
+    }
+}
+
+__dpct_inline__ void rebase_ptrs_kernel(unsigned long long *ptr,
+                                        const int32_t *n,
+                                        unsigned long long base,
+                                        long long bytes) {
+    const int k =
+        sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(2);
+    if (k < *n) ptr[k] = base + (unsigned long long) k * (unsigned long long) bytes;
+}
+
+__dpct_inline__ void add_streams_broadcast_kernel(const float *__restrict__ h,
+                                                  const float *__restrict__ e,
+                                                  float *__restrict__ R,
+                                                  int64_t n, int hc) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n * hc) return;
+    R[(size_t) t * n * hc + i] = h[(size_t) t * n * hc + i] + e[(size_t) t * n + i % n];
+}
+
+__dpct_inline__ void ident_hits_kernel(const int32_t *__restrict__ ids, int n,
+                                       int32_t *__restrict__ slot,
+                                       int32_t *__restrict__ dst,
+                                       int32_t *__restrict__ count) {
+    const int i =
+        sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(2);
+    if (i < n) { slot[i] = ids[i]; dst[i] = i; }
+    if (i == 0) *count = n;
+}
+
+// E = the widest element the row size divides into (16, 4 or 1 bytes): a Q6_K head row of 2560 values is 2100 bytes
+template <typename E>
+__dpct_inline__ void gather_rows_kernel(const E *__restrict__ src,
+                                        long long row_e,
+                                        const int32_t *__restrict__ ids,
+                                        long long n, E *__restrict__ dst) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long total = n * row_e;
+    for (long long i =
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < total; i += (long long)item_ct1.get_group_range(2) *
+                         item_ct1.get_local_range(2)) {
+        const long long r = i / row_e, o = i - r * row_e;
+        dst[i] = src[(long long) ids[r] * row_e + o];
+    }
+}
+
+__dpct_inline__ void map_ids_kernel(int32_t *ids,
+                                    const int32_t *__restrict__ table, int n) {
+    const int i =
+        sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(2);
+    if (i < n) ids[i] = table[ids[i]];
+}
+
+__dpct_inline__ void row_top_prob_kernel(const float *__restrict__ logits,
+                                         int n_vocab,
+                                         const int32_t *__restrict__ ids,
+                                         float *__restrict__ probs) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_group(2);
+    const float* l = logits + (size_t) t * n_vocab;
+    const float m = l[ids[t]];
+    float s = 0.0f;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n_vocab;
+         i += item_ct1.get_local_range(2)) s += sycl::native::exp(l[i] - m);
+    /*
+DPCT1108:195: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) s +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), s,
+            o);
+    if ((item_ct1.get_local_id(2) & 31) == 0)
+        part[item_ct1.get_local_id(2) >> 5] = s;
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (item_ct1.get_local_id(2) == 0) {
+        float tot = 0.0f;
+#pragma unroll
+        for (int w = 0; w < (int)(item_ct1.get_local_range(2) >> 5); ++w) tot +=
+            part[w];
+        probs[t] = 1.0f / tot;
+    }
+}
+
+__dpct_inline__ void
+mtp_select_kernel(const float *__restrict__ R_src, int64_t stride,
+                  const int32_t *__restrict__ ids,
+                  const int32_t *__restrict__ row_dev,
+                  float *__restrict__ R_dst, int32_t *__restrict__ tok_dst,
+                  int32_t *out, int j, const float *probs, float *out_p) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = *row_dev;
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < stride; i += (int64_t)item_ct1.get_group_range(2) *
+                          item_ct1.get_local_range(2))
+        R_dst[i] = R_src[(size_t) row * stride + i];
+    if (item_ct1.get_group(2) == 0 && item_ct1.get_local_id(2) == 0) {
+        const int32_t tok = ids[row];
+        *tok_dst = tok;
+        if (out != nullptr) ((volatile int32_t*) out)[j] = tok;
+        if (probs != nullptr && out_p != nullptr) ((volatile float*) out_p)[j] = probs[row];
+    }
+}
+
+__dpct_inline__ void dense_steps_kernel(const int32_t *__restrict__ cells,
+                                        int n, int32_t *__restrict__ steps) {
+    const int i =
+        sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(2);
+    if (i >= n) return;
+    const int c = cells[i];
+    steps[i * 4 + 0] = c;
+    steps[i * 4 + 1] = c + 1;
+    steps[i * 4 + 2] = (c + 1) / 4;
+    steps[i * 4 + 3] = c + 1;
+}
+
+}  // namespace
+
+void fetch_blobs(const unsigned long long* src, const int32_t* n, uint8_t* dst, int64_t blob_bytes, int cap, void* stream) {
+    if (cap <= 0) return;
+    if (blob_bytes % 16 != 0) { std::fprintf(stderr, "fetch_blobs: blob size must be a multiple of 16\n"); std::exit(1); }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto blob_bytes_ct3 = (long long)(blob_bytes / 16);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class fetch_blobs_kernel_14b6f5>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, 48 * 8) *
+                                          sycl::range(1, 1, 256),
+                                      sycl::range(1, 1, 256)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        fetch_blobs_kernel(src, n, (sycl::uint4 *)dst,
+                                           blob_bytes_ct3);
+                    });
+            });
+    }
+    check("fetch_blobs");
+}
+
+void rebase_ptrs(unsigned long long* ptr, const int32_t* n, uint8_t* base, int64_t blob_bytes, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class rebase_ptrs_kernel_436f27>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    rebase_ptrs_kernel(ptr, n, (unsigned long long)base,
+                                       (long long)blob_bytes);
+                });
+    }
+    check("rebase_ptrs");
+}
+
+void add_streams_broadcast(const float* h, const float* e, float* R, int64_t n_embd, int hc, int n_tok, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class add_streams_broadcast_kernel_7de8f5>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, (unsigned)n_tok,
+                                (unsigned)((n_embd * hc + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    add_streams_broadcast_kernel(h, e, R, n_embd, hc);
+                });
+    }
+    check("add_streams_broadcast");
+}
+
+void ident_hits(const int32_t* ids, int n, int32_t* slot, int32_t* dst, int32_t* count, void* stream) {
+    if (n < 1 || n > 1024) { std::fprintf(stderr, "ident_hits: n out of range\n"); std::exit(1); }
+    /*
+    DPCT1049:196: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class ident_hits_kernel_287489>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    ident_hits_kernel(ids, n, slot, dst, count);
+                });
+    }
+    check("ident_hits");
+}
+
+void mtp_select(const float* R_src, int64_t R_stride, const int32_t* ids, const int32_t* row_dev, float* R_dst,
+                int32_t* tok_dst, int32_t* out, int j, void* stream, const float* probs, float* out_p) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class mtp_select_kernel_4611fe>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 16) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    mtp_select_kernel(R_src, R_stride, ids, row_dev, R_dst,
+                                      tok_dst, out, j, probs, out_p);
+                });
+    }
+    check("mtp_select");
+}
+
+void gather_rows(const uint8_t* src, int64_t row_bytes, const int32_t* ids, int64_t n, uint8_t* dst, void* stream) {
+    dpct::queue_ptr s = strata::q_of(stream);
+    if (row_bytes % 16 == 0)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+            long long row_bytes_ct1 = row_bytes / 16;
+
+            cgh.parallel_for<
+                dpct_kernel_name<class gather_rows_kernel_d4a04b, sycl::uint4>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 48 * 8) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gather_rows_kernel((const sycl::uint4 *)src, row_bytes_ct1,
+                                       ids, n, (sycl::uint4 *)dst);
+                });
+        });
+    } else if (row_bytes % 4 == 0)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+            long long row_bytes_ct1 = row_bytes / 4;
+
+            cgh.parallel_for<
+                dpct_kernel_name<class gather_rows_kernel_7960b2, uint32_t>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 48 * 8) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gather_rows_kernel((const uint32_t *)src, row_bytes_ct1,
+                                       ids, n, (uint32_t *)dst);
+                });
+        });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<
+            dpct_kernel_name<class gather_rows_kernel_6148af, uint8_t>>(
+            sycl::nd_range<3>(sycl::range(1, 1, 48 * 8) *
+                                  sycl::range(1, 1, 256),
+                              sycl::range(1, 1, 256)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                gather_rows_kernel(src, row_bytes, ids, n, dst);
+            });
+    }
+    check("gather_rows");
+}
+
+void map_ids(int32_t* ids, const int32_t* table, int n, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class map_ids_kernel_43a113>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 64), sycl::range(1, 1, 64)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    map_ids_kernel(ids, table, n);
+                });
+    }
+    check("map_ids");
+}
+
+void row_top_prob(const float* logits, int n_rows, int n_vocab, const int32_t* ids, float* probs, void* stream) {
+    /*
+    DPCT1049:197: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class row_top_prob_kernel_6adbe2>>(
+                sycl::nd_range<3>(sycl::range(1, 1, n_rows) *
+                                      sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        row_top_prob_kernel(logits, n_vocab, ids, probs);
+                    });
+    }
+    check("row_top_prob");
+}
+
+namespace {
+__dpct_inline__ void window_ids_kernel(int32_t *steps, int window, int32_t *ids,
+                                       long long stride) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int q = item_ct1.get_group(1);
+    int32_t* st = steps + q * 4;
+    const int n_kv = st[1];
+    const int start = n_kv > window ? n_kv - window : 0;
+    const int width = n_kv - start;
+#pragma unroll
+    for (int j = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                 item_ct1.get_local_id(2);
+         j < width;
+         j += item_ct1.get_group_range(2) * item_ct1.get_local_range(2))
+        ids[q * stride + j] = start + j;
+    /*
+    DPCT1065:882: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (item_ct1.get_group(2) == 0 && item_ct1.get_local_id(2) == 0) st[3] =
+        width;
+}
+}  // namespace
+
+void window_ids(int32_t* steps, int n, int window, int32_t* ids, int64_t ids_stride, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class window_ids_kernel_581536>>(
+                sycl::nd_range<3>(sycl::range(1, (unsigned)n, 8) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    window_ids_kernel(steps, window, ids,
+                                      (long long)ids_stride);
+                });
+    }
+    check("window_ids");
+}
+
+void dense_steps(const int32_t* cells, int n, int32_t* steps, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class dense_steps_kernel_fd7245>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 64), sycl::range(1, 1, 64)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    dense_steps_kernel(cells, n, steps);
+                });
+    }
+    check("dense_steps");
+}
+
+void gdn_conv_l2_multi(const float* history, const float* qkv, const float* conv_w, float* h, int channels,
+                       int qk_heads, float eps, int n_tok, void* stream, int t_begin) {
+    if (!history || !qkv || !conv_w || !h || channels % S != 0 || n_tok < 1 || n_tok > kVerifyMaxT) {
+        std::fprintf(stderr, "gdn_conv_l2_multi: invalid arguments\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class gdn_conv_l2_multi_kernel_b3f737>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, (unsigned)n_tok, (unsigned)(channels / S)) *
+                        sycl::range(1, 1, S),
+                    sycl::range(1, 1, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_conv_l2_multi_kernel(history, qkv, conv_w, h,
+                                                 channels, qk_heads, eps,
+                                                 t_begin);
+                    });
+    }
+    check("gdn_conv_l2_multi");
+}
+
+void gdn_conv_commit(float* history, const float* qkv, int channels, const int32_t* n_keep, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class gdn_conv_commit_kernel_dc1d7f>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((channels + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_conv_commit_kernel(history, qkv, channels, n_keep);
+                });
+    }
+    check("gdn_conv_commit");
+}
+
+void gdn_ab_multi(const float* x, const uint16_t* w_alpha, const uint16_t* w_beta, const float* dt, const float* ssm_a,
+                  float* gate, float* beta, int n_embd, int h_v, int n_tok, void* stream) {
+    if (n_embd % 8 != 0 || n_tok < 1 || n_tok > kVerifyMaxT) {
+        std::fprintf(stderr, "gdn_ab_multi: invalid arguments\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_ab_multi_kernel_34dcce>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((2 * h_v + 7) / 8)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_ab_multi_kernel(x, w_alpha, w_beta, dt, ssm_a, gate,
+                                            beta, n_embd, h_v, n_tok);
+                    });
+    }
+    check("gdn_ab_multi");
+}
+
+void gdn_step_norm_multi(float* state, const float* h, int conv_channels, const float* gate, const float* beta,
+                         const float* z, const float* gamma, float eps, float* y, int h_k, int h_v, int n_tok,
+                         const int32_t* n_keep, void* stream, int t_out_begin) {
+    if (!state || !h || !gate || !beta || !z || !gamma || !y || h_k <= 0 || h_v % h_k || n_tok < 1 ||
+        n_tok > kVerifyMaxT) {
+        std::fprintf(stderr, "gdn_step_norm_multi: invalid arguments\n");
+        std::exit(1);
+    }
+    /*
+    DPCT1049:198: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class gdn_step_norm_multi_kernel_42ae26>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)h_v) *
+                                      sycl::range(1, RG, S),
+                                  sycl::range(1, RG, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_step_norm_multi_kernel(
+                            state, h, conv_channels, gate, beta, z, gamma, eps,
+                            y, h_k, h_v, n_tok, n_keep, t_out_begin);
+                    });
+    }
+    check("gdn_step_norm_multi");
+}
+
+namespace {
+__dpct_inline__ void wait_flag_ge_kernel(const volatile uint32_t *flag,
+                                         uint32_t value) {
+    /*
+    DPCT1008:883: __nanosleep function is not defined in SYCL. This is a
+    hardware-specific feature. Consult with your hardware vendor to find a
+    replacement.
+    */
+    while (*flag < value) /* spin (no __nanosleep on SYCL) */;
+    /*
+    DPCT1078:199: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+}
+}  // namespace
+
+namespace {
+__dpct_inline__ void resident_plan_kernel(
+    const int32_t *__restrict__ ids, int n, int k,
+    const int32_t *__restrict__ res, int n_expert, const uint8_t *cache_base,
+    const unsigned long long *slot_off, long long blob,
+    int32_t *__restrict__ pl, long long capx, uint32_t *skip, uint32_t ring) {
+    // one thread: at most kVerifyMaxT * 10 entries, the host's exact loop
+    for (int i = 0; i < n; ++i) {
+        const int32_t e = ids[i];
+        if (e < 0 || e >= n_expert || res[e] < 0) { *skip = 0; return; }
+    }
+    int32_t* counts = pl;
+    int32_t* start = pl + 4;
+    int32_t* dst = start + capx + 1;
+    int32_t* tok = dst + capx;
+    const long long ptr_off = ((4 + (capx + 1) + 2 * capx) + 1) & ~1ll;
+    unsigned long long* ptr = (unsigned long long*) (pl + ptr_off);
+    int32_t* start2 = pl + ptr_off + 4 * capx;
+    int groups = 0, entries = 0;
+    for (int i0 = 0; i0 < n; ++i0) {
+        bool first = true;
+#pragma unroll
+        for (int j = 0; j < i0; ++j) if (ids[j] == ids[i0]) {
+            first = false; break;
+        }
+        if (!first) continue;
+        const int32_t slot = res[ids[i0]];
+        ptr[groups] = (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob));
+        start[groups] = entries;
+#pragma unroll
+        for (int i = i0; i < n; ++i)
+            if (ids[i] == ids[i0]) {
+                // an entry belongs to i0's group when its first occurrence is i0: the same expert id
+                dst[entries] = i;
+                tok[entries] = i / k;
+                ++entries;
+            }
+        ++groups;
+    }
+    start[groups] = entries;
+    start2[0] = entries;
+    counts[0] = groups;
+    counts[1] = entries;
+    counts[2] = 0;
+    /*
+    DPCT1078:200: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
+    *skip = ring;
+}
+__dpct_inline__ void wait_flag_ge_or_kernel(const volatile uint32_t *flag,
+                                            uint32_t value,
+                                            const volatile uint32_t *skip) {
+    if (*skip == value) return;
+    /*
+    DPCT1008:884: __nanosleep function is not defined in SYCL. This is a
+    hardware-specific feature. Consult with your hardware vendor to find a
+    replacement.
+    */
+    while (*flag < value) /* spin (no __nanosleep on SYCL) */;
+    /*
+    DPCT1078:201: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+}
+__dpct_inline__ void copy_i32_unless_kernel(int32_t *__restrict__ dst,
+                                            const volatile int32_t *src, int n,
+                                            const uint32_t *skip,
+                                            uint32_t value) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    if (*skip == value) return;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n;
+         i += item_ct1.get_local_range(2)) dst[i] = src[i];
+}
+/*
+DPCT1052:885: SYCL does not support the member access for a volatile qualified
+vector type. The volatile qualifier was removed. You may need to rewrite the
+code.
+*/
+__dpct_inline__ void copy_or_zero_kernel(sycl::float4 *__restrict__ dst,
+                                         const sycl::float4 *src, long long n4,
+                                         const uint32_t *skip, uint32_t value) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const bool zero = *skip == value;
+#pragma unroll
+    for (long long i =
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n4; i += (long long)item_ct1.get_group_range(2) *
+                      item_ct1.get_local_range(2))
+        dst[i] = zero ? sycl::float4(0.f, 0.f, 0.f, 0.f)
+                      : const_cast<const sycl::float4 *>(src)[i];
+}
+}  // namespace
+
+void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_layer, int n_expert,
+                   const uint8_t* cache_base, const unsigned long long* slot_off, long long blob, int32_t* plan,
+                   long long capx, uint32_t* skip, uint32_t ring, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class resident_plan_kernel_db6b7a>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    resident_plan_kernel(ids, n_entries, k, res_layer, n_expert,
+                                         cache_base, slot_off, blob, plan, capx,
+                                         skip, ring);
+                });
+    }
+    check("resident_plan");
+}
+void wait_flag_ge_or(const uint32_t* flag, uint32_t value, const uint32_t* skip, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class wait_flag_ge_or_kernel_2b2de3>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    wait_flag_ge_or_kernel(flag, value, skip);
+                });
+    }
+    check("wait_flag_ge_or");
+}
+void copy_i32_from_mapped_unless(int32_t* dst, const int32_t* src, long long n, const uint32_t* skip, uint32_t value,
+                                 void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class copy_i32_unless_kernel_d9d761>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_i32_unless_kernel(dst, (const volatile int32_t *)src,
+                                           (int)n, skip, value);
+                });
+    }
+    check("copy_i32_from_mapped_unless");
+}
+void copy_or_zero_from_mapped(float* dst, const float* src, long long n, const uint32_t* skip, uint32_t value,
+                              void* stream) {
+    if (n <= 0) return;
+    const long long n4 = n / 4;
+    const int blocks = (int) ((n4 + 255) / 256 < 64 ? (n4 + 255) / 256 : 64);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class copy_or_zero_kernel_5ef081>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_or_zero_kernel((sycl::float4 *)dst,
+                                        (const sycl::float4 *)src, n4,
+                                        skip, value);
+                });
+    }
+    check("copy_or_zero_from_mapped");
+}
+
+void wait_flag_ge(const uint32_t* flag, uint32_t value, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class wait_flag_ge_kernel_d7debf>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    wait_flag_ge_kernel(flag, value);
+                });
+    }
+    check("wait_flag_ge");
+}
+
+void embedding_gather_dev(const uint8_t* codes, const float* scales, const float* offsets, const int32_t* tokens,
+                          int n_tok, int64_t n, int code_bits, int code_bias, int group_elems, uint64_t row_codes,
+                          uint64_t row_groups, float* out, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class embedding_gather_dev_kernel_600016>>(
+                sycl::nd_range<3>(sycl::range(1, (unsigned)n_tok,
+                                              (unsigned)((n + 255) / 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    embedding_gather_dev_kernel(
+                        codes, scales, offsets, tokens, n, code_bits, code_bias,
+                        group_elems, row_codes, row_groups, out);
+                });
+    }
+    check("embedding_gather_dev");
+}
+
+void broadcast_streams(const float* x, float* R, int64_t n_embd, int hc, int n_tok, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class broadcast_streams_kernel_aa4f6f>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, (unsigned)n_tok,
+                                (unsigned)((n_embd * hc + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    broadcast_streams_kernel(x, R, n_embd, hc);
+                });
+    }
+    check("broadcast_streams");
+}
+
+void copy_indexed(float* dst, const float* src, int64_t stride, const int32_t* index, int64_t n, void* stream) {
+    const unsigned blocks = (unsigned) ((n + 255) / 256 < 64 ? (n + 255) / 256 : 64);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class copy_indexed_kernel_b12e23>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_indexed_kernel(dst, src, stride, index, n);
+                });
+    }
+    check("copy_indexed");
+}
+
+// a GPU timestamp (ns, %globaltimer) into buf[i] - the verify window's stage profiler
+namespace {
+    __dpct_inline__ void gpu_stamp_kernel(unsigned long long *buf, int i) {
+    unsigned long long t;
+    /*
+    DPCT1053:202: Migration of device assembly code is not supported.
+    */
+    t = 0;   // SYCL: no %globaltimer equivalent; the stage profiler is inert on this backend
+    buf[i] = t;
+} }
+void gpu_stamp(unsigned long long* buf, int i, void* stream) {
+    auto exp_props = sycl::ext::oneapi::experimental::properties{
+        sycl::ext::oneapi::experimental::use_root_sync};
+
+    strata::q_of(stream)
+        ->parallel_for<dpct_kernel_name<class gpu_stamp_kernel_596fa5>>(
+            sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
+            exp_props, [=](sycl::nd_item<3> item_ct1) {
+                gpu_stamp_kernel(buf, i);
+            });
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cvec_parity.cpp b/sycl/src/kernels/cvec_parity.cpp
new file mode 100644
index 00000000000..856f1d80a7b
--- /dev/null
+++ b/sycl/src/kernels/cvec_parity.cpp
@@ -0,0 +1,242 @@
+// src/kernels/cvec_parity.cpp - the control vector kernel (strata/kernels/cvec.hpp) against a host reference.
+//   1. project: h - s (h.v) v per stream and token, against double precision; the steered component is gone.
+//   2. add: h + d.
+//   3. switched off: R unchanged without a pending write; with one, R is BITWISE the write the fused read folds
+//      (fused_gr_read with apply), which is what keeps a loaded-but-off vector identical to the stock engine.
+//   4. a layer without a direction is untouched.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/cvec.hpp"
+#include "strata/kernels/fused_gr.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+
+int g_fail = 0;
+
+void ck(dpct::err0 e, const char *w) {
+}
+
+template <typename T>
+T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T), dpct::get_in_order_queue())),
+       "malloc");
+    return p;
+}
+
+template <typename T>
+/*
+DPCT1114:920: cudaMemcpy is migrated to asynchronization memcpy, assuming in the
+original code the source host memory is pageable memory. If the memory is not
+pageable, call wait() on event return by memcpy API to ensure synchronization
+behavior.
+*/
+void up(T *d, const std::vector<T> &h) {
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d, h.data(), h.size() * sizeof(T))),
+       "up");
+}
+template <typename T>
+std::vector<T> down(const T* d, size_t n) {
+    std::vector<T> h(n);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h.data(), d, n * sizeof(T))
+                            .wait()),
+       "down");
+    return h;
+}
+
+void check(bool ok, const char* what) {
+    std::printf("  %-66s %s\n", what, ok ? "ok" : "FAIL");
+    if (!ok) ++g_fail;
+}
+
+}  // namespace
+
+int main() {
+    constexpr int64_t L = 48, N = 2560, HC = 4, LR = 320, T = 5, D = HC * N;
+    constexpr int64_t kLayer = 7, kOff = 3;   // steered / not steered
+    std::mt19937 rng(1234);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+
+    // a unit direction at kLayer with a norm-2 scaled one's s = 2; nothing at kOff
+    std::vector<float> dir((size_t) (L * N), 0.0f), s((size_t) L, 0.0f);
+    {
+        double nrm = 0.0;
+        std::vector<float> v((size_t) N);
+        for (auto& x : v) { x = nd(rng); nrm += (double) x * x; }
+        nrm = std::sqrt(nrm);
+        for (int64_t j = 0; j < N; ++j) dir[(size_t) (kLayer * N + j)] = (float) (v[(size_t) j] / nrm);
+        s[(size_t) kLayer] = 2.0f;
+    }
+    std::string err;
+    if (!k::cvec_upload(dir, s, /*project*/ 0, 4, 44, N, HC, err)) { std::fprintf(stderr, "%s\n", err.c_str()); return 2; }
+    check(k::cvec().covers(kLayer) && !k::cvec().covers(kOff) && !k::cvec().covers(45), "covers(): steered layers only");
+
+    std::vector<float> R((size_t) (T * D)), bo((size_t) (T * N)), inj((size_t) (T * HC));
+    for (auto& x : R) x = nd(rng) * 3.0f;
+    for (auto& x : bo) x = nd(rng);
+    for (auto& x : inj) x = nd(rng);
+    float* dR = dalloc<float>(R.size());
+    float* dbo = dalloc<float>(bo.size());
+    float* dinj = dalloc<float>(inj.size());
+    up(dbo, bo);
+    up(dinj, inj);
+
+    // ---- 1. project, no pending write
+    std::printf("project\n");
+    up(dR, R);
+    k::cvec_apply(dR, kLayer, T, D, nullptr, 0, nullptr, 0, false, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "project");
+    {
+        const auto got = down(dR, R.size());
+        double worst = 0.0, worst_dot = 0.0;
+        for (int64_t t = 0; t < T; ++t)
+            for (int64_t c = 0; c < HC; ++c) {
+                const float* h = R.data() + t * D + c * N;
+                const float* v = dir.data() + kLayer * N;
+                double dot = 0.0;
+                for (int64_t j = 0; j < N; ++j) dot += (double) h[j] * v[j];
+                double after = 0.0;
+                for (int64_t j = 0; j < N; ++j) {
+                    const double want = h[j] - 2.0 * dot * v[j];
+                    const double g = got[(size_t) (t * D + c * N + j)];
+                    worst = std::fmax(worst, std::fabs(g - want));
+                    after += g * v[j];
+                }
+                // s = 2 reflects the component: h.v -> -h.v
+                worst_dot = std::fmax(worst_dot, std::fabs(after + dot));
+            }
+        std::printf("    max |err| %.3g, max |h'.v + h.v| %.3g\n", worst, worst_dot);
+        check(worst < 1e-4, "project matches h - s (h.v) v (s = 2)");
+        check(worst_dot < 1e-3, "the component along v is reflected (s = 2)");
+    }
+    // s = 1 removes it
+    s[(size_t) kLayer] = 1.0f;
+    if (!k::cvec_upload(dir, s, 0, 4, 44, N, HC, err)) return 2;
+    up(dR, R);
+    k::cvec_apply(dR, kLayer, T, D, nullptr, 0, nullptr, 0, false, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "project s=1");
+    {
+        const auto got = down(dR, R.size());
+        double worst = 0.0;
+        for (int64_t t = 0; t < T; ++t)
+            for (int64_t c = 0; c < HC; ++c) {
+                double after = 0.0;
+                for (int64_t j = 0; j < N; ++j) after += (double) got[(size_t) (t * D + c * N + j)] * dir[(size_t) (kLayer * N + j)];
+                worst = std::fmax(worst, std::fabs(after));
+            }
+        std::printf("    max |h'.v| %.3g\n", worst);
+        check(worst < 1e-3, "s = 1 projects the direction out");
+    }
+
+    // ---- 4. a layer without a direction
+    up(dR, R);
+    k::cvec_apply(dR, kOff, T, D, nullptr, 0, nullptr, 0, false, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "off layer");
+    check(std::memcmp(down(dR, R.size()).data(), R.data(), R.size() * 4) == 0, "a layer without a direction is untouched");
+
+    // ---- 3. switched off
+    std::printf("switched off\n");
+    k::cvec_set_enabled(false);
+    check(!k::cvec_enabled(), "cvec_enabled() follows the switch");
+    up(dR, R);
+    k::cvec_apply(dR, kLayer, T, D, nullptr, 0, nullptr, 0, false, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "off");
+    check(std::memcmp(down(dR, R.size()).data(), R.data(), R.size() * 4) == 0, "off, no pending write: R unchanged");
+    {
+        // the fused read's folded write, one token at a time, against the kernel's write-only pass
+        std::vector<uint16_t> wd((size_t) (LR * D)), wu((size_t) (D * LR)), wi((size_t) (HC * D));
+        std::vector<float> wn((size_t) D);
+        auto bf = [&](float x) { uint32_t u; std::memcpy(&u, &x, 4); return (uint16_t) (u >> 16); };
+        for (auto& x : wd) x = bf(nd(rng) * 0.02f);
+        for (auto& x : wu) x = bf(nd(rng) * 0.02f);
+        for (auto& x : wi) x = bf(nd(rng) * 0.02f);
+        for (auto& x : wn) x = 1.0f + 0.1f * nd(rng);
+        uint16_t* dwd = dalloc<uint16_t>(wd.size());
+        uint16_t* dwu = dalloc<uint16_t>(wu.size());
+        uint16_t* dwi = dalloc<uint16_t>(wi.size());
+        float* dwn = dalloc<float>(wn.size());
+        up(dwd, wd); up(dwu, wu); up(dwi, wi); up(dwn, wn);
+        float* lo = dalloc<float>(LR);
+        float* rs = dalloc<float>(HC);
+        float* inj_out = dalloc<float>(HC);
+        float* mixed = dalloc<float>(N);
+        float* dF = dalloc<float>(R.size());
+        up(dF, R);
+        for (int64_t t = 0; t < T; ++t) {
+            k::FusedGrArgs a;
+            a.R = dF + t * D; a.R_out = dF + t * D; a.apply = true;
+            a.bo_prev = dbo + t * N; a.inj_prev = dinj + t * HC;
+            a.w_norm = dwn; a.w_down = dwd; a.w_up = dwu; a.w_inject = dwi;
+            a.lo = lo; a.rs = rs; a.inject_out = inj_out; a.mixed = mixed;
+            k::fused_gr_read(a, nullptr);
+        }
+        up(dR, R);
+        k::cvec_apply(dR, kLayer, T, D, dbo, N, dinj, HC, true, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "write only");
+        const auto fused = down(dF, R.size()), mine = down(dR, R.size());
+        check(std::memcmp(fused.data(), mine.data(), R.size() * 4) == 0,
+              "off, pending write: bitwise the fused read's folded write");
+        k::cvec_set_enabled(true);
+        // on, with the write: the write, then the projection (reference from the fused result)
+        up(dR, R);
+        k::cvec_apply(dR, kLayer, T, D, dbo, N, dinj, HC, true, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "write+project");
+        const auto both = down(dR, R.size());
+        double worst = 0.0;
+        for (int64_t t = 0; t < T; ++t)
+            for (int64_t c = 0; c < HC; ++c) {
+                const float* h = fused.data() + t * D + c * N;
+                const float* v = dir.data() + kLayer * N;
+                double dot = 0.0;
+                for (int64_t j = 0; j < N; ++j) dot += (double) h[j] * v[j];
+                for (int64_t j = 0; j < N; ++j)
+                    worst = std::fmax(worst, std::fabs(both[(size_t) (t * D + c * N + j)] - (h[j] - dot * v[j])));
+            }
+        std::printf("    write + project: max |err| %.3g\n", worst);
+        check(worst < 1e-4, "on, pending write: the write, then the projection");
+    }
+
+    // ---- 2. add
+    std::printf("add\n");
+    for (int64_t j = 0; j < N; ++j) dir[(size_t) (kLayer * N + j)] *= 0.1f;   // d = 0.1 v, s = 1
+    s[(size_t) kLayer] = 1.0f;
+    if (!k::cvec_upload(dir, s, /*add*/ 1, 4, 44, N, HC, err)) return 2;
+    up(dR, R);
+    k::cvec_apply(dR, kLayer, T, D, nullptr, 0, nullptr, 0, false, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "add");
+    {
+        const auto got = down(dR, R.size());
+        bool same = true;
+        for (int64_t t = 0; t < T; ++t)
+            for (int64_t c = 0; c < HC; ++c)
+                for (int64_t j = 0; j < N; ++j) {
+                    const size_t i = (size_t) (t * D + c * N + j);
+                    same = same && got[i] == R[i] + dir[(size_t) (kLayer * N + j)];
+                }
+        check(same, "add is h + d in every stream (bitwise)");
+    }
+
+    std::printf(g_fail ? "cvec_parity: %d FAILED\n" : "cvec_parity: all passed\n", g_fail);
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/kernels/dequant_bf16_test.cpp b/sycl/src/kernels/dequant_bf16_test.cpp
new file mode 100644
index 00000000000..a84bc9da3e5
--- /dev/null
+++ b/sycl/src/kernels/dequant_bf16_test.cpp
@@ -0,0 +1,116 @@
+// src/kernels/dequant_bf16_test.cpp - plan v0.3 P5: the device dequantizers against the artifact's validated CPU
+// dequantizers (`strata/artifact/dequant.hpp`), on one real tensor of every type the model uses.
+//
+//     dequant_bf16_test SHARD1.gguf [SHARD2.gguf]
+//
+// For each type: the first 4 rows of the first tensor of that type, FP32 path compared with a relative tolerance of
+// 1e-6 (the products are the reference's, reordered at most), BF16 path within half a BF16 ulp of the CPU value.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/dequant.hpp"
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/dequant_bf16.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstring>
+#include <map>
+#include <string>
+#include <vector>
+
+namespace {
+
+bool cpu_block(int type, const uint8_t* b, float* out) {
+    using namespace strata;
+    switch (type) {
+    case 2: dequantize_q4_0(b, out); return true;
+    case 6: dequantize_q5_0(b, out); return true;
+    case 8: dequantize_q8_0(b, out); return true;
+    case 11: dequantize_q3_K(b, out); return true;
+    case 12: dequantize_q4_K(b, out); return true;
+    case 13: dequantize_q5_K(b, out); return true;
+    case 14: dequantize_q6_K(b, out); return true;
+    case 20: dequantize_iq4_nl(b, out); return true;
+    case 23: dequantize_iq4_xs(b, out); return true;
+    case 42: dequantize_q2_0(b, out); return true;
+    default: return false;
+    }
+}
+
+float bf16_to_f32(uint16_t h) {
+    uint32_t u = (uint32_t) h << 16;
+    float f;
+    std::memcpy(&f, &u, 4);
+    return f;
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    if (argc < 2) {
+        std::fprintf(stderr, "usage: dequant_bf16_test SHARD.gguf [SHARD2.gguf]\n");
+        return 2;
+    }
+    std::map<int, bool> done;
+    int fails = 0, checked = 0;
+    for (int a = 1; a < argc; ++a) {
+        strata::GgufFile gguf(argv[a]);
+        for (const auto& t : gguf.tensors()) {
+            const int type = (int) t.type;
+            if (done.count(type) || !strata::kernels::dequant_bf16_supported(type) || t.shape.size() != 2) continue;
+            int be = 0, bb = 0;
+            if (!strata::block_geometry(t.type, be, bb)) continue;
+            const int64_t cols = (int64_t) t.shape[0];
+            const int64_t rows = (std::min<int64_t>)(4, (int64_t) t.shape[1]);
+            const int64_t row_bytes = cols / be * bb;
+            const uint8_t* host = (const uint8_t*) gguf.tensor_data(t);
+            void* d_blocks = nullptr;
+            float* d_f = nullptr;
+            uint16_t* d_h = nullptr;
+            d_blocks = (void *)sycl::malloc_device((size_t)(rows * row_bytes),
+                                                   dpct::get_in_order_queue());
+            d_f = (float *)sycl::malloc_device((size_t)(rows * cols) * 4,
+                                               dpct::get_in_order_queue());
+            d_h = (uint16_t *)sycl::malloc_device((size_t)(rows * cols) * 2,
+                                                  dpct::get_in_order_queue());
+            dpct::get_in_order_queue()
+                .memcpy(d_blocks, host, (size_t)(rows * row_bytes))
+                .wait();
+            strata::kernels::dequant_f32(type, d_blocks, 0, rows, cols, d_f, nullptr);
+            strata::kernels::dequant_bf16(type, d_blocks, 0, rows, cols, d_h, nullptr);
+            std::vector<float> gf((size_t) (rows * cols));
+            std::vector<uint16_t> gh((size_t) (rows * cols));
+            dpct::get_in_order_queue().memcpy(gf.data(), d_f, gf.size() * 4);
+            dpct::get_in_order_queue()
+                .memcpy(gh.data(), d_h, gh.size() * 2)
+                .wait();
+            sycl::free(d_blocks, dpct::get_in_order_queue());
+            sycl::free(d_f, dpct::get_in_order_queue());
+            sycl::free(d_h, dpct::get_in_order_queue());
+            std::vector<float> ref((size_t) (rows * cols));
+            for (int64_t r = 0; r < rows; ++r)
+                for (int64_t b = 0; b < cols / be; ++b)
+                    cpu_block(type, host + r * row_bytes + b * bb, ref.data() + r * cols + b * be);
+            int64_t bad_f = 0, bad_h = 0;
+            double worst = 0;
+            for (size_t i = 0; i < ref.size(); ++i) {
+                const double e = std::fabs((double) gf[i] - ref[i]);
+                const double tol = 1e-6 * std::fabs((double) ref[i]) + 1e-30;
+                if (e > tol) ++bad_f;
+                worst = (std::max)(worst, e / (std::fabs((double) ref[i]) + 1e-30));
+                const double eh = std::fabs((double) bf16_to_f32(gh[i]) - ref[i]);
+                if (eh > std::ldexp(std::fabs((double) ref[i]), -8) + 1e-30) ++bad_h;
+            }
+            ++checked;
+            done[type] = true;
+            const bool ok = bad_f == 0 && bad_h == 0;
+            if (!ok) ++fails;
+            std::printf("type %2d  %-40s %lld x %lld: f32 %s (%lld off, worst rel %.2e), bf16 %s (%lld off)\n", type,
+                        t.name.c_str(), (long long) rows, (long long) cols, bad_f ? "FAIL" : "ok", (long long) bad_f,
+                        worst, bad_h ? "FAIL" : "ok", (long long) bad_h);
+        }
+    }
+    std::printf("dequant_bf16_test: %d types checked, %s\n", checked, fails ? "FAILED" : "OK");
+    return fails ? 1 : 0;
+}
diff --git a/sycl/src/kernels/dequant_s2_parity.cpp b/sycl/src/kernels/dequant_s2_parity.cpp
new file mode 100644
index 00000000000..b5984e0bb74
--- /dev/null
+++ b/sycl/src/kernels/dequant_s2_parity.cpp
@@ -0,0 +1,165 @@
+// src/kernels/dequant_s2_parity.cpp - P2.S2's parity test for the S2 decode.
+//
+// THE REFERENCE IS THE CHAIN, NOT A SECOND OPINION.  `strata::dequantize_q2_0` (include/strata/artifact/
+// dequant.hpp) is a scalar transcription that `bench/micro/dequant_xcheck` checks against **ggml's own**
+// dequantizer on real block bytes; and `tools/canonical_xcheck.py --full` checks that the canonical form
+// decodes to the same values on every block of the artifact.  So this compares "GPU canonical decode" against
+// "CPU decode already proven equal to ggml", and a fault in either the canonicaliser or the kernel shows up
+// here.  A parity test whose two sides were written together would show neither.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/dequant.hpp"
+#include "strata/kernels/dequant_s2.hpp"
+
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+constexpr int QK = 64;
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// fp16 patterns that are finite, normal and exactly representable.  Random 16-bit patterns would include NaN
+// and infinity, and a NaN makes `!=` true for a reason that has nothing to do with the kernel - the test
+// would fail for the wrong cause, or worse, a real fault would hide behind a NaN it caused itself.
+const uint16_t kScales[] = {0x3C00, 0x3800, 0x3400, 0x3000, 0x2C00, 0x2800, 0x2000,
+                            0xBC00, 0xB800, 0xB400, 0xB000, 0xAC00, 0x1800, 0x1400};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    long long n_blocks = 200000;
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::strcmp(argv[i], "--selftest") == 0) selftest = true;
+        else if (std::strcmp(argv[i], "--blocks") == 0 && i + 1 < argc) n_blocks = std::atoll(argv[++i]);
+        else {
+            std::fprintf(stderr, "usage: dequant_s2_parity [--selftest] [--blocks N]\n");
+            return 2;
+        }
+    }
+    if (n_blocks <= 0) { std::fprintf(stderr, "--blocks must be positive\n"); return 2; }
+
+    std::mt19937 rng(12345);
+    const int n_scales = (int) (sizeof(kScales) / sizeof(kScales[0]));
+
+    // raw Q2_0 blocks: { fp16 d ; uint8 qs[16] } - what ggml produced and what the artifact stores
+    std::vector<uint8_t> raw((size_t) n_blocks * 18);
+    for (long long b = 0; b < n_blocks; ++b) {
+        const uint16_t d = kScales[rng() % n_scales];
+        raw[(size_t) b * 18 + 0] = (uint8_t) (d & 0xFF);
+        raw[(size_t) b * 18 + 1] = (uint8_t) (d >> 8);
+        for (int t = 0; t < 16; ++t) raw[(size_t) b * 18 + 2 + t] = (uint8_t) (rng() & 0xFF);
+    }
+
+    // the CPU reference, over the RAW blocks
+    std::vector<float> cpu((size_t) n_blocks * QK);
+    for (long long b = 0; b < n_blocks; ++b) {
+        strata::dequantize_q2_0(&raw[(size_t) b * 18], &cpu[(size_t) b * QK]);
+    }
+
+    // canonical planes: S2 packs 4 codes per byte exactly as Q2_0 stores them, so the codes plane is the raw
+    // qs bytes; the scales plane is the fp16 `d` widened.  Copied into planes of their own rather than
+    // aliased, because that is what the kernel will read in the engine.
+    std::vector<uint8_t> codes((size_t) n_blocks * 16);
+    std::vector<float> scales((size_t) n_blocks);
+    for (long long b = 0; b < n_blocks; ++b) {
+        std::memcpy(&codes[(size_t) b * 16], &raw[(size_t) b * 18 + 2], 16);
+        const uint16_t d = (uint16_t) (raw[(size_t) b * 18] | (raw[(size_t) b * 18 + 1] << 8));
+        scales[(size_t) b] = strata::fp16_to_fp32(d);
+    }
+
+    uint8_t* d_codes = nullptr;
+    float *d_scales = nullptr, *d_out = nullptr;
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "cudaMalloc codes");
+    check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                               scales.size(), dpct::get_in_order_queue())),
+          "cudaMalloc scales");
+    check(DPCT_CHECK_ERROR(d_out = sycl::malloc_device<float>(
+                               cpu.size(), dpct::get_in_order_queue())),
+          "cudaMalloc out");
+    /*
+    DPCT1114:370: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size())),
+          "copy codes");
+    /*
+    DPCT1114:371: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * sizeof(float))),
+          "copy scales");
+
+    strata::kernels::dequant_s2(d_codes, d_scales, d_out, n_blocks);
+
+    std::vector<float> gpu(cpu.size());
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(gpu.data(), d_out, gpu.size() * sizeof(float))
+                  .wait()),
+          "copy back");
+
+    long long bad = 0, first_bad = -1;
+    for (size_t i = 0; i < cpu.size(); ++i) {
+        // bit comparison, not a tolerance: S2's decode is exact integer-to-float arithmetic, so ANY
+        // difference is a bug and a tolerance would only hide which one
+        if (std::memcmp(&cpu[i], &gpu[i], sizeof(float)) != 0) {
+            if (first_bad < 0) first_bad = (long long) i;
+            ++bad;
+        }
+    }
+
+    // NON-VACUITY.  Two buffers of zeros compare equal, and so do two buffers a broken test filled with the
+    // same constant - an agreement check that cannot distinguish "both correct" from "both empty" is the
+    // failure this project keeps finding.  So the data must actually vary, and the four codes must all occur:
+    // an S2 decode that only ever saw one code would agree while being unable to tell -1 from +2.
+    bool seen[4] = {false, false, false, false};
+    for (size_t i = 0; i < codes.size(); ++i) {
+        for (int t = 0; t < 4; ++t) seen[(codes[i] >> (2 * t)) & 3] = true;
+    }
+    int distinct = 0;
+    for (bool s : seen) distinct += s ? 1 : 0;
+    long long distinct_vals = 0;
+    for (size_t i = 0; i < cpu.size() && distinct_vals < 8; ++i) {
+        bool dup = false;
+        for (size_t j = 0; j < i && !dup; ++j) dup = (cpu[j] == cpu[i]);
+        if (!dup) ++distinct_vals;
+    }
+    std::printf("  non-vacuity: %d of 4 codes present, %lld distinct values in the first elements\n", distinct,
+                distinct_vals);
+    if (distinct != 4 || distinct_vals < 4) {
+        std::fprintf(stderr, "VACUOUS: the comparison could not have distinguished a wrong decode\n");
+        return 1;
+    }
+
+    std::printf("dequant_s2: %lld blocks, %lld elements, %lld mismatched\n", n_blocks, (long long) cpu.size(),
+                bad);
+    if (bad) {
+        std::printf("  first mismatch at element %lld (block %lld, offset %d): cpu %.9g gpu %.9g\n",
+                    (long long) first_bad, (long long) (first_bad / QK), (int) (first_bad % QK),
+                    (double) cpu[(size_t) first_bad], (double) gpu[(size_t) first_bad]);
+        return 1;
+    }
+    std::printf("  bit-exact against the scalar dequantizer that dequant_xcheck proved equal to ggml\n");
+    if (selftest) std::printf("dequant_s2_parity OK\n");
+
+    sycl::free(d_codes, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_out, dpct::get_in_order_queue());
+    return 0;
+}
diff --git a/sycl/src/kernels/elementwise_parity.cpp b/sycl/src/kernels/elementwise_parity.cpp
new file mode 100644
index 00000000000..5d61559fffc
--- /dev/null
+++ b/sycl/src/kernels/elementwise_parity.cpp
@@ -0,0 +1,623 @@
+// src/kernels/elementwise_parity.cpp - P2.S5's test for the layer glue.
+//
+// The ops are small; the CONVENTIONS in them are not, and each one is a place where a plausible reading
+// gives a plausible number:
+//
+//   1. `softplus` HAS A LARGE-x BRANCH.  `log1p(exp(x))` overflows f32 at x > 88 and loses relative precision
+//      well before that; `ggml_compute_softplus_f32` returns `x` above 20.  A rival without the branch is
+//      asserted observable, because a gate that saturates to +inf makes `exp(gate)` inf and the whole
+//      recurrence NaN - which reads as a state bug and not as a missing branch.
+//   2. `ssm_a` IS NEGATIVE.  `gate = softplus(...) * ssm_a`, so `exp(gate) < 1` and the state DECAYS.  A
+//      fixture with a positive `ssm_a` would still produce finite output and the recurrence would blow up
+//      instead of decaying, so the sign is checked as a property and not assumed.
+//   3. `silu` IS COMPUTED IN DOUBLE then cast, because `ref/gdn.py`'s numpy does.  f32 `expf` differs in the
+//      last bits, and the test measures that rather than asserting it away.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+double rel_l1(const std::vector<float>& a, const std::vector<float>& b) {
+    double d = 0, m = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs((double) a[i] - (double) b[i]);
+        m += std::fabs((double) a[i]);
+    }
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: elementwise_parity [--selftest]\n"); return 2; }
+    }
+    int bad = 0;
+    const int64_t H_V = 48;
+
+    // ---- 1. gdn_gate, with the reference's own softplus
+    {
+        const int n = (int) H_V;
+        std::mt19937 rng(11);
+        std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> alpha(n), dt(n), a(n), want(n);
+        for (int i = 0; i < n; ++i) {
+            // A MIXTURE THAT ACTUALLY CROSSES THE BRANCH.  The first version drew alpha from a normal with
+            // sigma 3, so the largest value was about 9 and `softplus` never took its `x > 20` path - the
+            // "branch is observable" check then reported **0.00% apart, 0 non-finite**, which is the fixture
+            // saying it cannot see the thing it was written to see.  Every third head is now large.
+            const bool large = (i % 3) == 0;
+            // Up to ~120, so the fixture spans WELL PAST f32's `exp` overflow at 88.  A fixture that stopped
+            // at 88 would show the branch as unobservable and would be right: `log1pf(expf(x))` equals `x` to
+            // f32 precision for the whole range 20..88, so ggml's threshold of 20 is CONSERVATIVE and the
+            // behaviour only actually changes where `expf` overflows.
+            alpha[i] = large ? (22.0f + 6.0f * (float) (i % 17)) : g(rng) * 3.0f;
+            dt[i] = g(rng) * 0.5f;
+            // NEGATIVE, as the artifact's `ssm_a = -exp(A_log)` is.  Checked below as a property.
+            a[i] = -(std::fabs(g(rng)) + 0.1f);
+            const double x = (double) alpha[i] + (double) dt[i];
+            const double sp = x > 20.0 ? x : std::log1p(std::exp(x));
+            want[(size_t) i] = (float) (sp * (double) a[i]);
+        }
+        // the fixture must EXERCISE the branch, or check 1 below measures nothing
+        {
+            int over = 0, past_overflow = 0;
+            for (int i = 0; i < n; ++i) {
+                const float x = alpha[(size_t) i] + dt[(size_t) i];
+                if (x > 20.0f) ++over;
+                if (x > 88.0f) ++past_overflow;
+            }
+            std::printf("  %-44s %s (%d above 20, %d above 88)\n", "the fixture crosses the branch",
+                        over ? "yes" : "*** NO ***", over, past_overflow);
+            if (!over) ++bad;
+        }
+        // the sign property, asserted rather than assumed
+        int positive = 0;
+        for (int i = 0; i < n; ++i) if (a[(size_t) i] >= 0.0f) ++positive;
+        std::printf("  %-44s %s (%d of %d non-negative)\n", "the fixture's ssm_a is negative",
+                    positive ? "*** NO ***" : "yes", positive, n);
+        if (positive) ++bad;
+
+        float *d_a = nullptr, *d_dt = nullptr, *d_sa = nullptr, *d_g = nullptr;
+        check(DPCT_CHECK_ERROR(d_a = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "a");
+        check(DPCT_CHECK_ERROR(d_dt = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "dt");
+        check(DPCT_CHECK_ERROR(d_sa = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "sa");
+        check(DPCT_CHECK_ERROR(d_g = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "g");
+        /*
+        DPCT1114:712: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(d_a, alpha.data(), n * 4)),
+              "ca");
+        /*
+        DPCT1114:713: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(d_dt, dt.data(), n * 4)),
+              "cd");
+        /*
+        DPCT1114:714: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(d_sa, a.data(), n * 4)),
+              "cs");
+        strata::kernels::gdn_gate(d_a, d_dt, d_sa, d_g, 1, H_V, nullptr);
+        std::vector<float> got((size_t) n);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_g, n * 4)
+                                   .wait()),
+              "cg");
+
+        const double rel = rel_l1(want, got);
+        std::printf("  %-44s rel %.3e\n", "gdn_gate vs the reference", rel);
+        // double softplus and double multiply on both sides, then one cast
+        if (!(rel <= 1e-6)) { std::printf("    *** over 1e-6 ***\n"); ++bad; }
+
+        // TRAP: no large-x branch.  `log1p(exp(x))` in f32, with no `x > 20` path.
+        //
+        // AND THE MEASUREMENT SAYS WHERE THE BRANCH ACTUALLY MATTERS.  The first version of this fixture
+        // spanned 20..88 and reported **0 heads differ**: `log1pf(expf(x))` agrees with `x` to f32 precision
+        // over that whole range, so ggml's threshold of 20 is CONSERVATIVE - the branch changes the answer only
+        // where `expf` OVERFLOWS, at about 88.  The check reports the smallest x at which the two readings
+        // part company, so the number is in the output rather than in this comment.
+        {
+            int wrong = 0, differing = 0;
+            float first_differ = -1.0f;
+            std::vector<float> rival((size_t) n);
+            for (int i = 0; i < n; ++i) {
+                const float x = alpha[(size_t) i] + dt[(size_t) i];
+                const float sp = std::log1p(std::exp(x));       // no branch, f32
+                rival[(size_t) i] = sp * a[(size_t) i];
+                if (!std::isfinite(sp)) ++wrong;
+                const float branched = x > 20.0f ? x : std::log1pf(std::exp(x));
+                if (sp != branched) {
+                    ++differing;
+                    if (first_differ < 0.0f || x < first_differ) first_differ = x;
+                }
+            }
+            const double r = rel_l1(want, rival);
+            const bool visible = r > 0.05 || wrong > 0;
+            std::printf("  %-44s %s (%.2f%% apart, %d non-finite, %d heads differ, first at x = %.1f)\n",
+                        "the softplus large-x branch is observable", visible ? "yes" : "*** NO ***",
+                        r * 100, wrong, differing, (double) first_differ);
+            if (!visible) ++bad;
+        }
+        // PROPERTY: exp(gate) < 1 for every element, which is what makes the state decay
+        {
+            int over = 0;
+            for (float v : got) if (!(std::exp(v) < 1.0f)) ++over;
+            std::printf("  %-44s %s (%d of %d not < 1)\n", "exp(gate) < 1 for every head",
+                        over ? "*** NO ***" : "yes", over, n);
+            if (over) ++bad;
+        }
+        sycl::free(d_a, dpct::get_in_order_queue());
+            sycl::free(d_dt, dpct::get_in_order_queue());
+            sycl::free(d_sa, dpct::get_in_order_queue());
+            sycl::free(d_g, dpct::get_in_order_queue());
+    }
+
+    // ---- 2. silu, in double then cast
+    {
+        const int n = 4096;
+        std::mt19937 rng(22);
+        std::normal_distribution<float> g(0.0f, 3.0f);
+        std::vector<float> x((size_t) n), want((size_t) n);
+        for (int i = 0; i < n; ++i) {
+            x[(size_t) i] = g(rng);
+            const double v = (double) x[(size_t) i];
+            want[(size_t) i] = (float) (v / (1.0 + std::exp(-v)));
+        }
+        float* d_x = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "sx");
+        /*
+        DPCT1114:715: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4)),
+              "csx");
+        strata::kernels::silu_inplace(d_x, n, nullptr);
+        std::vector<float> got((size_t) n);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_x, n * 4)
+                                   .wait()),
+              "csg");
+        const double rel = rel_l1(want, got);
+        std::printf("\n  %-44s rel %.3e\n", "silu (double) vs the reference", rel);
+        if (!(rel <= 1e-7)) { std::printf("    *** over 1e-7 ***\n"); ++bad; }
+        sycl::free(d_x, dpct::get_in_order_queue());
+    }
+
+    // ---- 3. scale and the f32->f16 bridge
+    {
+        const int n = 1024;
+        std::vector<float> x((size_t) n), want((size_t) n);
+        for (int i = 0; i < n; ++i) x[(size_t) i] = (float) (i - n / 2) * 0.013f;
+        const float s = 1.0f / std::sqrt(128.0f);
+        for (int i = 0; i < n; ++i) want[(size_t) i] = x[(size_t) i] * s;
+
+        float* d_x = nullptr;
+        uint16_t* d_h = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "ex");
+        check(DPCT_CHECK_ERROR(d_h = (uint16_t *)sycl::malloc_device(
+                                   n * 2, dpct::get_in_order_queue())),
+              "eh");
+        /*
+        DPCT1114:716: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4)),
+              "cex");
+        strata::kernels::scale_inplace(d_x, n, s, nullptr);
+        std::vector<float> got((size_t) n);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_x, n * 4)
+                                   .wait()),
+              "ceg");
+        int diff = 0;
+        for (int i = 0; i < n; ++i) if (got[(size_t) i] != want[(size_t) i]) ++diff;
+        std::printf("  %-44s %d of %d differ\n", "scale_inplace is exact", diff, n);
+        if (diff) ++bad;
+
+        strata::kernels::f32_to_f16_bulk(d_x, d_h, n, nullptr);
+        std::vector<uint16_t> h((size_t) n);
+        check(
+            DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue().memcpy(h.data(), d_h, n * 2).wait()),
+            "ceh");
+        int hbad = 0;
+        for (int i = 0; i < n; ++i)
+            if (h[(size_t) i] != strata::kernels::f16_from_f32(got[(size_t) i])) ++hbad;
+        std::printf("  %-44s %d of %d differ\n", "f32_to_f16_bulk uses the shared conversion", hbad, n);
+        if (hbad) ++bad;
+        sycl::free(d_x, dpct::get_in_order_queue());
+            sycl::free(d_h, dpct::get_in_order_queue());
+    }
+
+    // ---- 4. rms_norm_weighted, and the TWO RIVAL READINGS it exists to be told apart from.
+    //
+    // This kernel's whole reason for being a separate entry point from `gdn_l2_norm` is that the two differ by
+    // one `/ cols`, and that a swap produces a well-scaled, plausible tensor.  So the test computes BOTH wrong
+    // readings and requires each to differ from the right one by more than the tolerance before it judges the
+    // kernel - the same discipline the shared-expert test uses for silu-on-gate.
+    {
+        const int64_t rows = 24, cols = 256;          // the real `attn_q`-norm shape
+        const float eps = 1e-6f;
+        std::vector<float> x((size_t) (rows * cols));
+        for (size_t i = 0; i < x.size(); ++i) x[i] = (float) std::sin((double) i * 0.017) * 1.7f + 0.4f;
+        std::vector<float> w((size_t) cols);
+        for (int64_t c = 0; c < cols; ++c) w[(size_t) c] = 0.5f + 0.002f * (float) (c % 97);
+
+        // the oracle: f64, mean, times w
+        auto ref = [&](bool use_sum, bool use_w) {
+            std::vector<double> y((size_t) (rows * cols));
+            for (int64_t r = 0; r < rows; ++r) {
+                double ss = 0;
+                for (int64_t c = 0; c < cols; ++c) {
+                    const double v = x[(size_t) (r * cols + c)];
+                    ss += v * v;
+                }
+                const double den = std::sqrt((use_sum ? ss : ss / (double) cols) + (double) eps);
+                for (int64_t c = 0; c < cols; ++c) {
+                    const double v = x[(size_t) (r * cols + c)];
+                    y[(size_t) (r * cols + c)] = (v / den) * (use_w ? (double) w[(size_t) c] : 1.0);
+                }
+            }
+            std::vector<float> out((size_t) (rows * cols));
+            for (size_t i = 0; i < out.size(); ++i) out[i] = (float) y[i];
+            return out;
+        };
+        const std::vector<float> want = ref(false, true);
+        const std::vector<float> rival_sum = ref(true, false);    // what gdn_l2_norm computes
+        const std::vector<float> rival_now = ref(false, false);   // the (1+w)-vs-w / no-weight confusion
+
+        auto rel = [&](const std::vector<float>& a, const std::vector<float>& b) {
+            double d = 0, m = 0;
+            for (size_t i = 0; i < a.size(); ++i) {
+                d += std::fabs((double) a[i] - (double) b[i]);
+                m += std::fabs((double) a[i]);
+            }
+            return d / (m > 1e-30 ? m : 1e-30);
+        };
+        const double r_sum = rel(want, rival_sum), r_now = rel(want, rival_now);
+        std::printf("  %-44s %.2f%% apart\n", "sum-vs-mean is observable", r_sum * 100);
+        std::printf("  %-44s %.2f%% apart\n", "with-w-vs-without-w is observable", r_now * 100);
+        // `sqrt(cols)` = 16 for the first and the weight's own spread for the second; a fixture that cannot
+        // separate them is not testing the kernel that was written.
+        if (!(r_sum > 0.5)) { std::printf("  *** the sum reading is NOT observable ***\n"); ++bad; }
+        if (!(r_now > 0.5)) { std::printf("  *** the no-weight reading is NOT observable ***\n"); ++bad; }
+
+        float* d_x = nullptr;
+        float* d_w = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = (float *)sycl::malloc_device(
+                                   x.size() * 4, dpct::get_in_order_queue())),
+              "m rmsx");
+        check(DPCT_CHECK_ERROR(d_w = (float *)sycl::malloc_device(
+                                   w.size() * 4, dpct::get_in_order_queue())),
+              "m rmsw");
+        /*
+        DPCT1114:717: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+                                                                 x.size() * 4)),
+              "c rmsx");
+        /*
+        DPCT1114:718: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+                                                                 w.size() * 4)),
+              "c rmsw");
+        strata::kernels::rms_norm_weighted(d_x, d_w, rows, cols, eps, nullptr);
+        std::vector<float> got((size_t) (rows * cols));
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_x, got.size() * 4)
+                                   .wait()),
+              "c rmsg");
+
+        const double r_got = rel(want, got);
+        double worst = 0;
+        for (size_t i = 0; i < got.size(); ++i) {
+            const double m = std::fabs((double) want[i]);
+            const double e = std::fabs((double) got[i] - (double) want[i]) / (m > 1e-30 ? m : 1e-30);
+            if (e > worst) worst = e;
+        }
+        int nonfinite = 0;
+        for (float v : got) if (!std::isfinite(v)) ++nonfinite;
+        std::printf("  %-44s rel %.3e  worst %.3e  nonfinite %d\n", "rms_norm_weighted vs f64 oracle", r_got,
+                    worst, nonfinite);
+        if (nonfinite) ++bad;
+        // The kernel accumulates in f32 over 256 terms; 1e-6 is loose enough for that and far tighter than the
+        // 16x the rival readings are off by.
+        if (!(r_got < 1e-6)) { std::printf("  *** rms_norm_weighted is WRONG ***\n"); ++bad; }
+        // and a null `w` must be legal, because `ref/qsa.py` allows it.
+        //
+        // THE INPUT HAS TO BE RE-UPLOADED FIRST.  The kernel is IN PLACE, so `d_x` currently holds the
+        // NORMALISED tensor from the call above; running it again normalises a second time and every element
+        // differs.  That is exactly what the first version of this check reported - "6144 of 6144 differ" -
+        // and it is a fixture bug rather than a kernel bug: the oracle reads the ORIGINAL `x`, so the two
+        // sides were never looking at the same input.
+        const std::vector<float> want_null = ref(false, false);
+        /*
+        DPCT1114:719: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+                                                                 x.size() * 4)),
+              "c rmsx2");
+        strata::kernels::rms_norm_weighted(d_x, nullptr, rows, cols, eps, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_x, got.size() * 4)
+                                   .wait()),
+              "c rmsn");
+        int null_bad = 0;
+        for (size_t i = 0; i < got.size(); ++i)
+            if (std::fabs((double) got[i] - (double) want_null[i]) > 1e-6) ++null_bad;
+        std::printf("  %-44s %d of %zu differ\n", "a null weight is legal", null_bad, got.size());
+        if (null_bad) ++bad;
+        sycl::free(d_x, dpct::get_in_order_queue());
+        sycl::free(d_w, dpct::get_in_order_queue());
+    }
+
+    // Packed embedding rows: every code width, scale-group size, optional offset,
+    // row boundary and partial CUDA block. Compare bits with a scalar CPU decoder.
+    // Volatile materializes the multiply so this oracle cannot silently use FMA.
+    {
+        dpct::queue_ptr stream;
+        /*
+        DPCT1025:720: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        check(DPCT_CHECK_ERROR(
+                  stream = dpct::get_current_device().create_queue(true)),
+              "embedding stream");
+        std::mt19937 rng(77);
+        std::uniform_real_distribution<float> values(-2.0f, 2.0f);
+        int mismatches = 0, guards = 0, fma_diff = 0, cases = 0;
+        for (const int bits : {2, 4, 8}) {
+            const int bias = bits == 2 ? -1 : bits == 4 ? -7 : -16;
+            const int per_byte = 8 / bits;
+            const unsigned mask = (1u << bits) - 1u;
+            for (const int group : {16, 32, 64}) {
+                for (const int n : {320, 2560}) {
+                    const int row_bytes = n / per_byte, row_groups = n / group;
+                    std::vector<uint8_t> codes((size_t) 3 * row_bytes, 0);
+                    std::vector<float> scales((size_t) 3 * row_groups), offsets(scales.size());
+                    std::vector<int> unpacked((size_t) 3 * n);
+                    for (size_t i = 0; i < unpacked.size(); ++i) {
+                        const unsigned code = (unsigned) (i * 13 + i / n * 7) & mask;
+                        unpacked[i] = (int) code;
+                        codes[i / per_byte] |= (uint8_t) (code << ((i % per_byte) * bits));
+                    }
+                    for (size_t i = 0; i < scales.size(); ++i) {
+                        scales[i] = values(rng);
+                        offsets[i] = values(rng);
+                    }
+                    scales[0] = -0.0f;
+                    offsets[0] = 0.0f;
+                    uint8_t* dc = nullptr;
+                    float *ds = nullptr, *dof = nullptr, *out = nullptr;
+                    check(DPCT_CHECK_ERROR(
+                              dc = (uint8_t *)sycl::malloc_device(
+                                  codes.size(), dpct::get_in_order_queue())),
+                          "embedding codes");
+                    check(DPCT_CHECK_ERROR(
+                              ds = sycl::malloc_device<float>(
+                                  scales.size(), dpct::get_in_order_queue())),
+                          "embedding scales");
+                    check(DPCT_CHECK_ERROR(
+                              dof = sycl::malloc_device<float>(
+                                  offsets.size(), dpct::get_in_order_queue())),
+                          "embedding offsets");
+                    check(DPCT_CHECK_ERROR(
+                              out = sycl::malloc_device<float>(
+                                  ((size_t)n + 2), dpct::get_in_order_queue())),
+                          "embedding output");
+                    /*
+                    DPCT1124:721: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    check(DPCT_CHECK_ERROR(
+                              stream->memcpy(dc, codes.data(), codes.size())),
+                          "embedding codes upload");
+                    /*
+                    DPCT1124:722: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    check(
+                        DPCT_CHECK_ERROR(stream->memcpy(
+                            ds, scales.data(), scales.size() * sizeof(float))),
+                        "embedding scales upload");
+                    /*
+                    DPCT1124:723: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    check(DPCT_CHECK_ERROR(
+                              stream->memcpy(dof, offsets.data(),
+                                             offsets.size() * sizeof(float))),
+                          "embedding offsets upload");
+                    check(DPCT_CHECK_ERROR(stream->wait()),
+                          "embedding upload sync");
+
+                    for (const bool with_offset : {false, true}) {
+                        for (int row = 0; row < 3; ++row) {
+                            std::vector<float> want((size_t) n), got((size_t) n + 2, -12345.0f);
+                            for (int i = 0; i < n; ++i) {
+                                const size_t gi = (size_t) row * row_groups + i / group;
+                                const float code = (float) (unpacked[(size_t) row * n + i] + bias);
+                                volatile float product = code * scales[gi];
+                                const float offset = with_offset ? offsets[gi] : 0.0f;
+                                want[(size_t) i] = product + offset;
+                                const float fused = std::fma(code, scales[gi], offset);
+                                if (std::memcmp(&fused, &want[(size_t) i], sizeof(float)) != 0) ++fma_diff;
+                            }
+                            /*
+                            DPCT1124:724: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            check(DPCT_CHECK_ERROR(stream->memcpy(
+                                      out, got.data(),
+                                      got.size() * sizeof(float))),
+                                  "embedding output guards");
+                            strata::kernels::embedding_gather(dc + (size_t) row * row_bytes,
+                                ds + (size_t) row * row_groups,
+                                with_offset ? dof + (size_t) row * row_groups : nullptr,
+                                n, bits, bias, group, out + 1, stream);
+                            /*
+                            DPCT1124:725: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            check(DPCT_CHECK_ERROR(stream->memcpy(
+                                      got.data(), out,
+                                      got.size() * sizeof(float))),
+                                  "embedding result");
+                            check(DPCT_CHECK_ERROR(stream->wait()),
+                                  "embedding sync");
+                            for (int i = 0; i < n; ++i) {
+                                if (std::memcmp(&want[(size_t) i], &got[(size_t) i + 1], sizeof(float)) != 0) ++mismatches;
+                            }
+                            if (got.front() != -12345.0f || got.back() != -12345.0f) ++guards;
+                            ++cases;
+
+                            // Capturing the gather proves that it has no hidden synchronization.
+                            // A following scale also checks that it uses the caller's stream.
+                            if (row == 1) {
+                                dpct::experimental::command_graph_ptr graph;
+                                dpct::experimental::command_graph_exec_ptr exec;
+                                check(DPCT_CHECK_ERROR(
+                                          dpct::experimental::begin_recording(
+                                              stream)),
+                                      "embedding capture");
+                                strata::kernels::embedding_gather(dc + (size_t) row * row_bytes,
+                                    ds + (size_t) row * row_groups,
+                                    with_offset ? dof + (size_t) row * row_groups : nullptr,
+                                    n, bits, bias, group, out + 1, stream);
+                                strata::kernels::scale_inplace(out + 1, n, 2.0f, stream);
+                                check(DPCT_CHECK_ERROR(
+                                          dpct::experimental::end_recording(
+                                              stream, &graph)),
+                                      "embedding capture end");
+                                check(
+                                    DPCT_CHECK_ERROR(
+                                        exec = new sycl::ext::oneapi::
+                                            experimental::command_graph<
+                                                sycl::ext::oneapi::
+                                                    experimental::graph_state::
+                                                        executable>(
+                                                graph->finalize())),
+                                    "embedding instantiate");
+                                check(DPCT_CHECK_ERROR(
+                                          stream->ext_oneapi_graph(*exec)),
+                                      "embedding replay");
+                                /*
+                                DPCT1124:726: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                check(DPCT_CHECK_ERROR(stream->memcpy(
+                                          got.data(), out,
+                                          got.size() * sizeof(float))),
+                                      "embedding graph result");
+                                check(DPCT_CHECK_ERROR(stream->wait()),
+                                      "embedding graph sync");
+                                for (int i = 0; i < n; ++i) {
+                                    const float expected = want[(size_t) i] * 2.0f;
+                                    if (std::memcmp(&expected, &got[(size_t) i + 1], sizeof(float)) != 0) ++mismatches;
+                                }
+                                if (got.front() != -12345.0f || got.back() != -12345.0f) ++guards;
+                                check(DPCT_CHECK_ERROR(delete (exec)),
+                                      "embedding exec destroy");
+                                check(DPCT_CHECK_ERROR(delete (graph)),
+                                      "embedding graph destroy");
+                            }
+                        }
+                    }
+                    sycl::free(dc, dpct::get_in_order_queue());
+                        sycl::free(ds, dpct::get_in_order_queue());
+                        sycl::free(dof, dpct::get_in_order_queue());
+                        sycl::free(out, dpct::get_in_order_queue());
+                }
+            }
+        }
+        check(
+            DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+            "embedding stream destroy");
+        std::printf("  embedding gather: %d row cases, %d bit mismatches, %d guard failures, %d FMA differences\n",
+                    cases, mismatches, guards, fma_diff);
+        if (mismatches || guards || fma_diff == 0) ++bad;
+    }
+
+    std::printf("\nelementwise: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("elementwise_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/gdn_parity.cpp b/sycl/src/kernels/gdn_parity.cpp
new file mode 100644
index 00000000000..06e15a0ddb5
--- /dev/null
+++ b/sycl/src/kernels/gdn_parity.cpp
@@ -0,0 +1,594 @@
+// src/kernels/gdn_parity.cpp - P2.S2's test for the GDN recurrence, the conv and the two norms.
+//
+// `ref/gdn.py` carries eleven PROPERTY checks, several of which exist because a rival reading of the SOURCE
+// produces well-formed output.  The four that the kernels here can be wrong about are re-pinned below, each
+// asserted OBSERVABLE against a deliberately-wrong computation before the kernel is judged:
+//
+//   1. MODULO head pairing, h % h_k, not INTERLEAVE.  With H_k=2 and H_v=4 the two give [0,1,0,1] and
+//      [0,0,1,1]: they differ at h=1 and h=2.  Both produce a full-rank state of the right shape.
+//   2. Decay applied BEFORE the rank-1 update.  Applying it after is a one-line move that keeps every shape
+//      and every magnitude.
+//   3. The conv's SLIDE DIRECTION.  `kernel[0]` must read the OLDEST state row and the new input must land in
+//      the LAST state row; reversing either is invisible on a symmetric state, so the state rows here are
+//      labelled so each position is identifiable.
+//   4. `l2_norm`'s `+ eps` is an absolute floor on the SQUARED NORM, not on the mean.  The mean reading
+//      differs by sqrt(S) = 11.3x at S = 128.  `ref/gdn.py` PROPERTY 1 instruments the derivation, so it is
+//      not taken on trust there either.
+//
+// It also checks the STATE LAYOUT, which is the one place these kernels intentionally differ from the
+// reference: (S, h_v, S) with j fastest instead of (S, S, h_v).  A layout mix-up is silent, so the state is
+// filled with a value that encodes its own coordinates.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/gdn.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+float sigmoid_f(float x) { return 1.0f / (1.0f + std::exp(-x)); }
+
+/// The reference's `gdn_step`, with switches for the rival readings.
+///
+/// `state` is passed in the REFERENCE layout (S, S, h_v) - i.e. (i, j, h) - so that this function is a
+/// transcription of `ref/gdn.py` and not of the kernel.
+void ref_step(std::vector<double>& state, const std::vector<float>& q, const std::vector<float>& k,
+              const std::vector<float>& v, const std::vector<float>& gate, const std::vector<float>& beta,
+              int S, int h_k, int h_v, std::vector<float>& o, bool modulo_heads, bool decay_first) {
+    auto at = [&](int i, int j, int h) -> double& { return state[(size_t) (i * S + j) * h_v + h]; };
+    std::vector<float> oo((size_t) h_v * S, 0.0f);
+    for (int h = 0; h < h_v; ++h) {
+        const int src = modulo_heads ? (h % h_k) : (h / (h_v / h_k));
+        const double dec = std::exp((double) gate[(size_t) h]);
+        const double b = (double) beta[(size_t) h];
+        for (int j = 0; j < S; ++j) {
+            if (decay_first) for (int i = 0; i < S; ++i) at(i, j, h) *= dec;
+            double sk = 0;
+            for (int i = 0; i < S; ++i) sk += at(i, j, h) * (double) k[(size_t) (src * S + i)];
+            const double d = ((double) v[(size_t) (h * S + j)] - sk) * b;
+            for (int i = 0; i < S; ++i) at(i, j, h) += (double) k[(size_t) (src * S + i)] * d;
+            if (!decay_first) for (int i = 0; i < S; ++i) at(i, j, h) *= dec;
+            double dot = 0;
+            for (int i = 0; i < S; ++i) dot += at(i, j, h) * (double) q[(size_t) (src * S + i)];
+            oo[(size_t) (h * S + j)] = (float) dot;
+        }
+    }
+    o = oo;
+}
+
+/// `ref/gdn.py::conv_step` in its own (d_conv, C) row-major orientation.
+void ref_conv(std::vector<float>& cs, const std::vector<float>& x, const std::vector<float>& kern, int C,
+              int dc, std::vector<float>& out) {
+    out.assign((size_t) C, 0.0f);
+    for (int c = 0; c < C; ++c) {
+        double acc = 0;
+        for (int i = 0; i < dc - 1; ++i) acc += (double) cs[(size_t) (i * C + c)] * (double) kern[(size_t) (i * C + c)];
+        acc += (double) x[(size_t) c] * (double) kern[(size_t) ((dc - 1) * C + c)];
+        out[(size_t) c] = (float) acc;
+        for (int i = 0; i < dc - 2; ++i) cs[(size_t) (i * C + c)] = cs[(size_t) ((i + 1) * C + c)];
+        cs[(size_t) ((dc - 2) * C + c)] = x[(size_t) c];
+    }
+}
+
+double rel_l1(const std::vector<float>& a, const std::vector<float>& b) {
+    double d = 0, m = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs((double) a[i] - (double) b[i]);
+        m += std::fabs((double) a[i]);
+    }
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: gdn_parity [--selftest]\n"); return 2; }
+    }
+
+    const int S = 128, h_k = 16, h_v = 48;      // the artifact's real geometry
+    std::mt19937 rng(2024);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+    int bad = 0;
+
+    // ================= 1. the recurrence =================
+    {
+        // The state encodes its own coordinates, so a layout mix-up cannot pass: reading (i,j,h) where the
+        // buffer holds (i,h,j) gives a DIFFERENT number, not a wrong-but-plausible one.
+        std::vector<double> st_ref((size_t) S * S * h_v);
+        std::vector<float> st_dev((size_t) S * h_v * S);
+        for (int i = 0; i < S; ++i)
+            for (int j = 0; j < S; ++j)
+                for (int h = 0; h < h_v; ++h) {
+                    const float val = (float) (0.001 * (i + 2 * j + 3 * h) - 1.0);
+                    st_ref[(size_t) (i * S + j) * h_v + h] = val;
+                    st_dev[(size_t) (i * h_v + h) * S + j] = val;   // (S, h_v, S), j fastest
+                }
+
+        std::vector<float> q((size_t) h_k * S), k((size_t) h_k * S), v((size_t) h_v * S), gate((size_t) h_v),
+            beta((size_t) h_v);
+        for (auto& x : q) x = gauss(rng) * 0.1f;
+        for (auto& x : k) x = gauss(rng) * 0.1f;
+        for (auto& x : v) x = gauss(rng);
+        for (auto& x : gate) x = -(2.0f + 4.0f * (float) (rng() % 100) / 100.0f);   // dec in (0.0025, 0.135]
+        for (auto& x : beta) x = (float) (rng() % 100) / 100.0f;
+
+        std::vector<float> want_o;
+        std::vector<double> st_mod = st_ref;
+        ref_step(st_mod, q, k, v, gate, beta, S, h_k, h_v, want_o, true, true);
+
+        // the traps
+        {
+            std::vector<double> a = st_ref;
+            std::vector<float> oo;
+            ref_step(a, q, k, v, gate, beta, S, h_k, h_v, oo, false, true);
+            const double rel = rel_l1(want_o, oo);
+            std::printf("  %-42s %-4s (%.2f%% apart)\n", "modulo vs interleave head pairing",
+                        rel > 0.05 ? "yes" : "*** NO ***", rel * 100);
+            if (!(rel > 0.05)) ++bad;
+        }
+        {
+            std::vector<double> a = st_ref;
+            std::vector<float> oo;
+            ref_step(a, q, k, v, gate, beta, S, h_k, h_v, oo, true, false);
+            const double rel = rel_l1(want_o, oo);
+            std::printf("  %-42s %-4s (%.2f%% apart)\n", "decay before vs after the update",
+                        rel > 0.05 ? "yes" : "*** NO ***", rel * 100);
+            // The two readings differ by exactly `k (x) (beta * v * (1 - dec))`, so the fixture is only able
+            // to see the trap when `dec` is far from 1 and `beta` is far from 0.  The first version used
+            // gate in [-0.99, 0] - dec in [0.37, 1] - and managed 3.25%, which is a threshold the wrong
+            // reading nearly clears.  Deep decay is also the realistic regime: `ssm_a = -exp(A_log) < 0` and
+            // softplus is positive, so gate is comfortably negative in the real model.
+            if (!(rel > 0.05)) ++bad;
+        }
+
+        // the kernel
+        float *d_st = nullptr, *d_q = nullptr, *d_k = nullptr, *d_v = nullptr, *d_g = nullptr, *d_b = nullptr,
+              *d_o = nullptr;
+        check(DPCT_CHECK_ERROR(
+                  d_st = (float *)sycl::malloc_device(
+                      st_dev.size() * 4, dpct::get_in_order_queue())),
+              "st");
+        check(DPCT_CHECK_ERROR(d_q = (float *)sycl::malloc_device(
+                                   q.size() * 4, dpct::get_in_order_queue())),
+              "q");
+        check(DPCT_CHECK_ERROR(d_k = (float *)sycl::malloc_device(
+                                   k.size() * 4, dpct::get_in_order_queue())),
+              "k");
+        check(DPCT_CHECK_ERROR(d_v = (float *)sycl::malloc_device(
+                                   v.size() * 4, dpct::get_in_order_queue())),
+              "v");
+        check(
+            DPCT_CHECK_ERROR(d_g = (float *)sycl::malloc_device(
+                                 gate.size() * 4, dpct::get_in_order_queue())),
+            "g");
+        check(
+            DPCT_CHECK_ERROR(d_b = (float *)sycl::malloc_device(
+                                 beta.size() * 4, dpct::get_in_order_queue())),
+            "b");
+        check(DPCT_CHECK_ERROR(
+                  d_o = (float *)sycl::malloc_device(
+                      (size_t)h_v * S * 4, dpct::get_in_order_queue())),
+              "o");
+        /*
+        DPCT1114:486: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_st, st_dev.data(), st_dev.size() * 4)),
+              "cst");
+        /*
+        DPCT1114:487: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_q, q.data(),
+                                                                 q.size() * 4)),
+              "cq");
+        /*
+        DPCT1114:488: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_k, k.data(),
+                                                                 k.size() * 4)),
+              "ck");
+        /*
+        DPCT1114:489: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_v, v.data(),
+                                                                 v.size() * 4)),
+              "cv");
+        /*
+        DPCT1114:490: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_g, gate.data(), gate.size() * 4)),
+              "cg");
+        /*
+        DPCT1114:491: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_b, beta.data(), beta.size() * 4)),
+              "cb");
+
+        strata::kernels::GdnShapes sh{S, h_k, h_v};
+        strata::kernels::gdn_step(d_st, d_q, d_k, d_v, d_g, d_b, d_o, sh, nullptr);
+
+        std::vector<float> got_o((size_t) h_v * S), got_st(st_dev.size());
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got_o.data(), d_o, got_o.size() * 4)
+                                   .wait()),
+              "cgo");
+        check(
+            DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                 .memcpy(got_st.data(), d_st, got_st.size() * 4)
+                                 .wait()),
+            "cgst");
+
+        // o, and the STATE read back through the declared layout
+        const double rel_o = rel_l1(want_o, got_o);
+        double rel_st = 0, mag_st = 0;
+        for (int i = 0; i < S; ++i)
+            for (int j = 0; j < S; ++j)
+                for (int h = 0; h < h_v; ++h) {
+                    const size_t dev = (size_t) (i * h_v + h) * S + j;
+                    const double w = st_mod[(size_t) (i * S + j) * h_v + h];
+                    rel_st += std::fabs(w - (double) got_st[dev]);
+                    mag_st += std::fabs(w);
+                }
+        rel_st /= (mag_st > 1e-30 ? mag_st : 1e-30);
+        std::printf("\n  %-42s rel %.3e\n", "o vs reference", rel_o);
+        std::printf("  %-42s rel %.3e\n", "state (read via (S,h_v,S)) vs reference", rel_st);
+        // The kernel accumulates in f32 and the reference in f64, and the state is a RECURRENCE over 128
+        // terms, so 1e-5 is the arithmetic's floor here and not a structural allowance.
+        if (!(rel_o <= 1e-5)) { std::printf("    *** o over 1e-5 ***\n"); ++bad; }
+        if (!(rel_st <= 1e-5)) { std::printf("    *** state over 1e-5 ***\n"); ++bad; }
+
+        // a zero state stays zero, and a zero gate/beta leaves the state untouched (the reference's
+        // PROPERTY 4 setup) - a cheap independent invariant that no layout can fake
+        {
+            std::vector<float> zero(st_dev.size(), 0.0f), zg((size_t) h_v, 0.0f), zb((size_t) h_v, 0.0f);
+            /*
+            DPCT1114:492: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      d_st, zero.data(), zero.size() * 4)),
+                  "z0");
+            /*
+            DPCT1114:493: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      d_g, zg.data(), zg.size() * 4)),
+                  "z1");
+            /*
+            DPCT1114:494: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      d_b, zb.data(), zb.size() * 4)),
+                  "z2");
+            strata::kernels::gdn_step(d_st, d_q, d_k, d_v, d_g, d_b, d_o, sh, nullptr);
+            std::vector<float> zz(zero.size());
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(zz.data(), d_st, zz.size() * 4)
+                                       .wait()),
+                  "z3");
+            double nz = 0;
+            for (float x : zz) nz += std::fabs(x);
+            const bool ok = nz == 0.0;
+            std::printf("  %-42s %s\n", "gate=beta=0 from a zero state is a no-op", ok ? "yes" : "*** NO ***");
+            if (!ok) ++bad;
+        }
+
+        // ephemeral state: unchanged when the state is untouched but beta=1 — the delta rule writing k*d
+        sycl::free(d_st, dpct::get_in_order_queue());
+            sycl::free(d_q, dpct::get_in_order_queue());
+            sycl::free(d_k, dpct::get_in_order_queue());
+            sycl::free(d_v, dpct::get_in_order_queue());
+            sycl::free(d_g, dpct::get_in_order_queue());
+            sycl::free(d_b, dpct::get_in_order_queue());
+            sycl::free(d_o, dpct::get_in_order_queue());
+    }
+
+    // ================= 2. the conv =================
+    {
+        const int C = 24, dc = 4;      // small, so the host reference is a plain loop
+        // TWO DIFFERENT LAYOUTS MEET HERE, and this is where the first version of this test failed at 0.136.
+        // `ref/gdn.py` carries the conv state as (d_conv-1, C) ROW-MAJOR - (i, c) at i*C + c - because it is
+        // numpy.  The kernel carries it as (C, d_conv-1) with c fastest - c*(dc-1) + i - because that is
+        // ggml's `ne = {d_conv-1, C}` with ne0 fast, and it is a runtime buffer so either is legal.  The
+        // mapping between them is written out below rather than assumed, in both directions.
+        std::vector<float> cs_ref((size_t) (dc - 1) * C), x((size_t) C), kern((size_t) dc * C);
+        for (int i = 0; i < dc - 1; ++i)
+            for (int c = 0; c < C; ++c) cs_ref[(size_t) (i * C + c)] = (float) (10 * (i + 1) + c);  // labelled
+        for (int c = 0; c < C; ++c) x[(size_t) c] = (float) (100 + c);
+        for (size_t i = 0; i < kern.size(); ++i) kern[i] = gauss(rng);
+
+        auto to_dev_layout = [&](const std::vector<float>& r) {
+            std::vector<float> d(r.size());
+            for (int i = 0; i < dc - 1; ++i)
+                for (int c = 0; c < C; ++c) d[(size_t) (c * (dc - 1) + i)] = r[(size_t) (i * C + c)];
+            return d;
+        };
+        auto to_ref_layout = [&](const std::vector<float>& d) {
+            std::vector<float> r(d.size());
+            for (int i = 0; i < dc - 1; ++i)
+                for (int c = 0; c < C; ++c) r[(size_t) (i * C + c)] = d[(size_t) (c * (dc - 1) + i)];
+            return r;
+        };
+
+        std::vector<float> cs = to_dev_layout(cs_ref);
+        std::vector<float> want;
+        std::vector<float> cs_want_ref = cs_ref;
+        ref_conv(cs_want_ref, x, kern, C, dc, want);
+        const std::vector<float> cs_want = to_dev_layout(cs_want_ref);
+
+        // THE LAYOUT: the manifest's `ssm_conv1d.weight` has ne = [d_conv, C], so ne0 = d_conv is fast.
+        // The kernel takes `kW[c*dc + i]`; the reference's `kern` is (dc, C) row-major.  The transcription
+        // below is the ONLY place the two meet.
+        std::vector<float> kW((size_t) C * dc);
+        for (int c = 0; c < C; ++c)
+            for (int i = 0; i < dc; ++i) kW[(size_t) (c * dc + i)] = kern[(size_t) (i * C + c)];
+        // and the rival reading, which must differ or the fixture cannot see a transposed weight
+        std::vector<float> kW_wrong((size_t) C * dc);
+        for (size_t i = 0; i < kern.size(); ++i) kW_wrong[i] = kern[i];
+        {
+            // apply the WRONG layout by hand: tap i of channel c is kW[c*dc+i] read as kW[i*C+c]
+            std::vector<float> cs2 = cs;
+            std::vector<float> out_bad((size_t) C, 0.0f);
+            for (int c = 0; c < C; ++c) {
+                double a = 0;
+                for (int i = 0; i < dc - 1; ++i) a += (double) cs2[(size_t) (i * C + c)] * (double) kW_wrong[(size_t) (c * dc + i)];
+                a += (double) x[(size_t) c] * (double) kW_wrong[(size_t) (c * dc + dc - 1)];
+                out_bad[(size_t) c] = (float) a;
+            }
+            const double rel = rel_l1(want, out_bad);
+            std::printf("\n  %-42s %-4s (%.1f%% apart)\n", "conv weight layout is observable",
+                        rel > 0.05 ? "yes" : "*** NO ***", rel * 100);
+            if (!(rel > 0.05)) ++bad;
+        }
+
+        float *d_cs = nullptr, *d_x = nullptr, *d_w = nullptr, *d_o = nullptr;
+        check(DPCT_CHECK_ERROR(d_cs = (float *)sycl::malloc_device(
+                                   cs.size() * 4, dpct::get_in_order_queue())),
+              "cs");
+        check(DPCT_CHECK_ERROR(d_x = (float *)sycl::malloc_device(
+                                   x.size() * 4, dpct::get_in_order_queue())),
+              "cx");
+        check(DPCT_CHECK_ERROR(d_w = (float *)sycl::malloc_device(
+                                   kW.size() * 4, dpct::get_in_order_queue())),
+              "cw");
+        check(DPCT_CHECK_ERROR(d_o = (float *)sycl::malloc_device(
+                                   (size_t)C * 4, dpct::get_in_order_queue())),
+              "co");
+        /*
+        DPCT1114:495: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_cs, cs.data(), cs.size() * 4)),
+              "ccs");
+        /*
+        DPCT1114:496: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+                                                                 x.size() * 4)),
+              "ccx");
+        /*
+        DPCT1114:497: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_w, kW.data(), kW.size() * 4)),
+              "ccw");
+        strata::kernels::gdn_conv_step(d_cs, d_x, d_w, d_o, C, dc, nullptr);
+        std::vector<float> got((size_t) C), got_cs(cs.size());
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_o, got.size() * 4)
+                                   .wait()),
+              "cgo");
+        check(
+            DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                 .memcpy(got_cs.data(), d_cs, got_cs.size() * 4)
+                                 .wait()),
+            "cgs");
+        const double rel_out = rel_l1(want, got), rel_cs = rel_l1(cs_want, got_cs);
+        std::printf("  %-42s rel %.3e\n", "conv out vs reference", rel_out);
+        std::printf("  %-42s rel %.3e\n", "conv state slide (mapped) vs reference", rel_cs);
+        if (!(rel_out <= 1e-6)) { std::printf("    *** conv out ***\n"); ++bad; }
+        if (!(rel_cs <= 1e-6)) { std::printf("    *** conv state ***\n"); ++bad; }
+        sycl::free(d_cs, dpct::get_in_order_queue());
+            sycl::free(d_x, dpct::get_in_order_queue());
+            sycl::free(d_w, dpct::get_in_order_queue());
+            sycl::free(d_o, dpct::get_in_order_queue());
+    }
+
+    // ================= 3. l2_norm =================
+    {
+        const int rows = 16, cols = 128;
+        std::vector<float> x((size_t) rows * cols), x_ref;
+        for (auto& val : x) val = gauss(rng) * 3.0f;
+        x_ref = x;
+        const float eps = 1e-6f;
+        for (int r = 0; r < rows; ++r) {
+            double acc = 0;
+            for (int i = 0; i < cols; ++i) acc += (double) x_ref[(size_t) (r * cols + i)] * (double) x_ref[(size_t) (r * cols + i)];
+            const float inv = (float) (1.0 / std::sqrt(acc + (double) eps));
+            for (int i = 0; i < cols; ++i) x_ref[(size_t) (r * cols + i)] *= inv;
+        }
+        // The rival reading puts THE SAME eps on the MEAN instead of on the squared norm, which at
+        // ||x||^2 ~ 1152 and cols = 128 changes the divisor from sqrt(1152) to sqrt(9) - a factor of 11.3, so
+        // the trap is large here.  It would be a much smaller correction on a near-zero row, where the floor
+        // is the whole answer; that regime is not what this fixture exercises.
+        std::vector<float> x_mean = x;
+        for (int r = 0; r < rows; ++r) {
+            double acc = 0;
+            for (int i = 0; i < cols; ++i) acc += (double) x_mean[(size_t) (r * cols + i)] * (double) x_mean[(size_t) (r * cols + i)];
+            const float inv = (float) (1.0 / std::sqrt(acc / cols + (double) eps));
+            for (int i = 0; i < cols; ++i) x_mean[(size_t) (r * cols + i)] *= inv;
+        }
+        const double rel_trap = rel_l1(x_ref, x_mean);
+        std::printf("\n  %-42s %-4s (%.1f%% apart)\n", "eps on sum vs on mean is observable",
+                    rel_trap > 0.05 ? "yes" : "*** NO ***", rel_trap * 100);
+        if (!(rel_trap > 0.05)) ++bad;
+
+        float* d_x = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = (float *)sycl::malloc_device(
+                                   x.size() * 4, dpct::get_in_order_queue())),
+              "lx");
+        /*
+        DPCT1114:498: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+                                                                 x.size() * 4)),
+              "lcx");
+        strata::kernels::gdn_l2_norm(d_x, rows, cols, eps, nullptr);
+        std::vector<float> got(x.size());
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_x, got.size() * 4)
+                                   .wait()),
+              "lcg");
+        const double rel = rel_l1(x_ref, got);
+        std::printf("  %-42s rel %.3e\n", "l2_norm vs reference", rel);
+        if (!(rel <= 1e-6)) ++bad;
+        sycl::free(d_x, dpct::get_in_order_queue());
+    }
+
+    // ================= 4. the closing norm =================
+    {
+        const int S2 = 128, hv2 = 8;
+        std::vector<float> o((size_t) hv2 * S2), z((size_t) hv2 * S2), sn((size_t) S2), y_ref((size_t) hv2 * S2);
+        for (auto& val : o) val = gauss(rng);
+        for (auto& val : z) val = gauss(rng);
+        for (auto& val : sn) val = 1.0f + 0.1f * gauss(rng);
+        const float eps = 1e-6f;
+        for (int h = 0; h < hv2; ++h) {
+            double acc = 0;
+            for (int i = 0; i < S2; ++i) acc += (double) o[(size_t) (h * S2 + i)] * (double) o[(size_t) (h * S2 + i)];
+            const float inv = (float) (1.0 / std::sqrt(acc / S2 + (double) eps));
+            for (int i = 0; i < S2; ++i)
+                y_ref[(size_t) (h * S2 + i)] = o[(size_t) (h * S2 + i)] * inv * sn[(size_t) i] *
+                                              sigmoid_f(z[(size_t) (h * S2 + i)]);
+        }
+        float *d_o = nullptr, *d_z = nullptr, *d_sn = nullptr, *d_y = nullptr;
+        check(DPCT_CHECK_ERROR(d_o = (float *)sycl::malloc_device(
+                                   o.size() * 4, dpct::get_in_order_queue())),
+              "no");
+        check(DPCT_CHECK_ERROR(d_z = (float *)sycl::malloc_device(
+                                   z.size() * 4, dpct::get_in_order_queue())),
+              "nz");
+        check(DPCT_CHECK_ERROR(d_sn = (float *)sycl::malloc_device(
+                                   sn.size() * 4, dpct::get_in_order_queue())),
+              "ns");
+        check(
+            DPCT_CHECK_ERROR(d_y = (float *)sycl::malloc_device(
+                                 y_ref.size() * 4, dpct::get_in_order_queue())),
+            "ny");
+        /*
+        DPCT1114:499: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_o, o.data(),
+                                                                 o.size() * 4)),
+              "nco");
+        /*
+        DPCT1114:500: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_z, z.data(),
+                                                                 z.size() * 4)),
+              "ncz");
+        /*
+        DPCT1114:501: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_sn, sn.data(), sn.size() * 4)),
+              "ncs");
+        strata::kernels::gdn_out_norm(d_o, d_z, d_sn, d_y, hv2, S2, eps, nullptr);
+        std::vector<float> got(y_ref.size());
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_y, got.size() * 4)
+                                   .wait()),
+              "ncy");
+        const double rel = rel_l1(y_ref, got);
+        std::printf("\n  %-42s rel %.3e\n", "out norm (rms * ssm_norm * sigmoid z)", rel);
+        if (!(rel <= 1e-6)) ++bad;
+
+        // SiLU instead of sigmoid is the qwen3.5 reading; `ref/gdn.py` says this artifact does NOT use it
+        std::vector<float> y_silu(y_ref.size());
+        for (int h = 0; h < hv2; ++h) {
+            double acc = 0;
+            for (int i = 0; i < S2; ++i) acc += (double) o[(size_t) (h * S2 + i)] * (double) o[(size_t) (h * S2 + i)];
+            const float inv = (float) (1.0 / std::sqrt(acc / S2 + (double) eps));
+            for (int i = 0; i < S2; ++i) {
+                const float zz = z[(size_t) (h * S2 + i)];
+                y_silu[(size_t) (h * S2 + i)] =
+                    o[(size_t) (h * S2 + i)] * inv * sn[(size_t) i] * (zz / (1.0f + std::exp(-zz)));
+            }
+        }
+        const double rel_silu = rel_l1(y_ref, y_silu);
+        std::printf("  %-42s %-4s (%.2f%% apart)\n", "sigmoid vs SiLU on the gate is observable",
+                    rel_silu > 0.05 ? "yes" : "*** NO ***", rel_silu * 100);
+        if (!(rel_silu > 0.05)) ++bad;
+        sycl::free(d_o, dpct::get_in_order_queue());
+            sycl::free(d_z, dpct::get_in_order_queue());
+            sycl::free(d_sn, dpct::get_in_order_queue());
+            sycl::free(d_y, dpct::get_in_order_queue());
+    }
+
+    std::printf("\ngdn: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("gdn_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/gr_parity.cpp b/sycl/src/kernels/gr_parity.cpp
new file mode 100644
index 00000000000..742fdae7182
--- /dev/null
+++ b/sycl/src/kernels/gr_parity.cpp
@@ -0,0 +1,930 @@
+// src/kernels/gr_parity.cpp - P2.S2's test for the gated residual / hyper-connection.
+//
+// `ref/gr.py` opens by listing the details "a prose reading gets wrong", and every one of them is a reading
+// that has the RIGHT SHAPES and produces a PLAUSIBLE number.  So each is computed here the wrong way round and
+// required to differ materially BEFORE the kernel is judged against the right one.  A test that only does the
+// second half passes against either reading:
+//
+//   1. PER-STREAM RMSNorm.  The source comment reads ambiguously; the code reduces over ne[0] = n_embd, i.e.
+//      one RMS per stream.  The rival reading is one RMS over the whole hc*n_embd stack.
+//   2. `/ hc` INSIDE the silu: `lo = silu(proj / hc)`.  Moving it outside is a one-line change that keeps
+//      every shape.
+//   3. SiLU on `lo` and SIGMOID on the gate, a few lines apart in the same function.  Swapping them is the
+//      obvious slip, and both are monotone saturating functions so the magnitudes stay comparable.
+//   4. `mean` over the stream axis, not `sum`.  A factor of hc = 4, which is exactly the kind of error that
+//      looks like a scale problem rather than a structural one.
+//   5. ACTIVATION PRECISION. The historical BF16-rounded CPU contract and the pinned CUDA single-token
+//      FP32-activation contract must be distinguishable. Both are tested against explicit references;
+//      neither is selected merely because the weight is BF16. The scalar fixture isolates xn and lo
+//      rounding from reduction order, and graph replay must preserve the precision chosen at capture.
+//   6. `gr_write`'s `2*sigmoid`, which centres the gate on 1 so a ZERO injection is a plain residual add.
+//      Asserted as a property, not as a value, because that is what the source comment claims.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/gr.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+/// The same rule the kernel uses, on the host - `ref/quant.py::bf16`.
+float to_bf16(float f) {
+    uint32_t i;
+    std::memcpy(&i, &f, 4);
+    i = (i + ((i >> 16) & 1u) + 0x7FFFu) & 0xFFFF0000u;
+    float o;
+    std::memcpy(&o, &i, 4);
+    return o;
+}
+
+uint16_t bf16_bits(float f) {
+    uint32_t i;
+    std::memcpy(&i, &f, 4);
+    return (uint16_t) (i >> 16);
+}
+
+struct Opts {
+    bool per_stream_norm = true;   ///< false: one RMS over the whole stack (WRONG)
+    bool scale_inside_silu = true; ///< false: silu(proj)/hc instead of silu(proj/hc) (WRONG)
+    bool sigmoid_on_gate = true;   ///< false: silu on the gate and sigmoid on lo (WRONG)
+    bool mean_over_streams = true; ///< false: sum over streams instead of mean (WRONG)
+    bool round_activation = true;  ///< false: pinned CUDA single-token BF16 MMVF contract
+};
+
+/// `ref/gr.py::gr_read`, transcribed with switches for the rival readings.
+void reference(const std::vector<float>& R, const std::vector<float>& w_norm,
+               const std::vector<float>& w_down, const std::vector<float>& w_up,
+               const std::vector<float>& w_inject, float eps, long long n_embd, long long hc, long long hc_lr,
+               const Opts& o, std::vector<float>& mixed, std::vector<float>& inject) {
+    const long long hc_dim = hc * n_embd;
+    std::vector<float> xn((size_t) hc_dim);
+    if (o.per_stream_norm) {
+        for (long long c = 0; c < hc; ++c) {
+            double ms = 0;
+            for (long long d = 0; d < n_embd; ++d) ms += (double) R[(size_t) (c * n_embd + d)] * R[(size_t) (c * n_embd + d)];
+            ms /= (double) n_embd;
+            const float rs = (float) (1.0 / std::sqrt(ms + (double) eps));
+            for (long long d = 0; d < n_embd; ++d) {
+                const size_t i = (size_t) (c * n_embd + d);
+                xn[i] = R[i] * rs * w_norm[i];
+            }
+        }
+    } else {
+        double ms = 0;
+        for (long long i = 0; i < hc_dim; ++i) ms += (double) R[(size_t) i] * R[(size_t) i];
+        ms /= (double) hc_dim;
+        const float rs = (float) (1.0 / std::sqrt(ms + (double) eps));
+        for (long long i = 0; i < hc_dim; ++i) xn[(size_t) i] = R[(size_t) i] * rs * w_norm[(size_t) i];
+    }
+
+    std::vector<float> act((size_t) hc_dim);
+    for (long long i = 0; i < hc_dim; ++i) act[(size_t) i] = o.round_activation ? to_bf16(xn[(size_t) i]) : xn[(size_t) i];
+
+    // lo
+    std::vector<float> lo((size_t) hc_lr);
+    for (long long k = 0; k < hc_lr; ++k) {
+        double a = 0;
+        for (long long i = 0; i < hc_dim; ++i) a += (double) act[(size_t) i] * (double) w_down[(size_t) (k * hc_dim + i)];
+        const float p = (float) a;
+        if (o.sigmoid_on_gate) lo[(size_t) k] = o.scale_inside_silu ? (p / (float) hc) / (1.0f + std::exp(-(p / (float) hc)))
+                                                                  : (p / (1.0f + std::exp(-p))) / (float) hc;
+        else                   lo[(size_t) k] = o.scale_inside_silu ? 1.0f / (1.0f + std::exp(-(p / (float) hc)))
+                                                                    : (1.0f / (1.0f + std::exp(-p))) / (float) hc;
+    }
+    std::vector<float> lq((size_t) hc_lr);
+    for (long long k = 0; k < hc_lr; ++k)
+        lq[(size_t) k] = o.round_activation ? to_bf16(lo[(size_t) k]) : lo[(size_t) k];
+
+    // gate and the gated mean
+    mixed.assign((size_t) n_embd, 0.0f);
+    for (long long d = 0; d < n_embd; ++d) {
+        float m = 0.0f;
+        for (long long c = 0; c < hc; ++c) {
+            const long long i = c * n_embd + d;
+            double a = 0;
+            for (long long k = 0; k < hc_lr; ++k) a += (double) lq[(size_t) k] * (double) w_up[(size_t) (i * hc_lr + k)];
+            const float g = (float) a;
+            const float s = o.sigmoid_on_gate ? 1.0f / (1.0f + std::exp(-g)) : g / (1.0f + std::exp(-g));
+            m += xn[(size_t) i] * s;
+        }
+        mixed[(size_t) d] = o.mean_over_streams ? m / (float) hc : m;
+    }
+
+    inject.assign((size_t) hc, 0.0f);
+    for (long long c = 0; c < hc; ++c) {
+        double a = 0;
+        for (long long i = 0; i < hc_dim; ++i) a += (double) act[(size_t) i] * (double) w_inject[(size_t) (c * hc_dim + i)];
+        inject[(size_t) c] = (float) a;
+    }
+}
+
+/// Normalised L1 difference.  `mag_out` returns the mean |a|, for reporting.
+double rel_diff(const std::vector<float>& a, const std::vector<float>& b, double* mag_out = nullptr) {
+    double d = 0, mag = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs((double) a[i] - (double) b[i]);
+        mag += std::fabs((double) a[i]);
+    }
+    if (mag_out) *mag_out = mag / (double) (a.empty() ? 1 : a.size());
+    return d / (mag > 1e-30 ? mag : 1e-30);
+}
+
+/// Relative error against the magnitude of the TERMS, not of the result.
+///
+/// `R + block_out * w` cancels wherever block_out*w is close to -R, and a plain |want-got|/|want| then
+/// reports the CONDITION NUMBER instead of the arithmetic.  This is the same metric mistake the project has
+/// now made four times: rounds 169 (Q4_K), 189 (RoPE), 194 (shared_expert) and this one.  For a sum, the
+/// denominator is the sum of the term magnitudes.
+double rel_terms(double want, double got, double term_a, double term_b) {
+    const double den = std::fabs(term_a) + std::fabs(term_b);
+    return std::fabs(want - got) / (den > 1e-30 ? den : 1e-30);
+}
+
+const char* activation_mode_name(int mode) {
+    return mode == 2 ? "native pinned GR" : (mode == 1 ? "FP32" : "BF16");
+}
+void select_activation_mode(int mode) {
+    strata::kernels::gr_set_native_mmvf(mode == 2);
+    // In mode 2 the precision-only switch is deliberately false: native MMVF must imply FP32 by itself.
+    strata::kernels::gr_set_fp32_activations(mode == 1);
+}
+
+// A diagonal GR fixture makes activation precision observable without summation-order ambiguity.
+// Two-wide matrices satisfy native MMVF's pair ABI, while each nonzero dot has only one nonzero product.
+// At R=1 and eps=0, xn=gamma exactly; any rounding in xn or lo comes from the selected activation contract.
+int scalar_activation_contract() {
+    using namespace strata::kernels;
+    const GrShapes sh{2, 1, 2};
+    float *d_R = nullptr, *d_norm = nullptr, *d_mixed = nullptr, *d_inject = nullptr;
+    uint16_t* d_weights = nullptr;
+    void* d_scratch = nullptr;
+    check(DPCT_CHECK_ERROR(
+              d_R = sycl::malloc_device<float>(2, dpct::get_in_order_queue())),
+          "scalar R");
+    check(DPCT_CHECK_ERROR(d_norm = sycl::malloc_device<float>(
+                               2, dpct::get_in_order_queue())),
+          "scalar norm");
+    check(DPCT_CHECK_ERROR(d_mixed = sycl::malloc_device<float>(
+                               2, dpct::get_in_order_queue())),
+          "scalar mixed");
+    check(DPCT_CHECK_ERROR(d_inject = sycl::malloc_device<float>(
+                               1, dpct::get_in_order_queue())),
+          "scalar inject");
+    check(DPCT_CHECK_ERROR(d_weights = sycl::malloc_device<uint16_t>(
+                               10, dpct::get_in_order_queue())),
+          "scalar weights");
+    check(DPCT_CHECK_ERROR(
+              d_scratch = (void *)sycl::malloc_device(
+                  gr_workspace_bytes(sh), dpct::get_in_order_queue())),
+          "scalar scratch");
+    GrWorkspace ws;
+    gr_workspace_init(sh, d_scratch, ws);
+    const float ones[] = {1.0f, 1.0f};
+    const uint16_t weights[] = {
+        bf16_bits(0.5f), 0, 0, 0,             // down: lo[0]=silu(xn[0]/2), lo[1]=0
+        bf16_bits(1.5f), 0, bf16_bits(1.5f), 0, // both gate rows consume lo[0]
+        bf16_bits(2.0f), 0                     // injection: 2*xn[0]
+    };
+    /*
+    DPCT1114:966: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue().memcpy(d_R, ones, sizeof(ones))),
+          "scalar upload R");
+    /*
+    DPCT1114:967: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_weights, weights,
+                                                             sizeof(weights))),
+          "scalar upload weights");
+    dpct::queue_ptr stream;
+    /*
+    DPCT1025:968: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    check(DPCT_CHECK_ERROR(stream =
+                               dpct::get_current_device().create_queue(true)),
+          "scalar stream");
+    int bad = 0;
+    for (float gamma : {1.0f, 1.00390625f}) {
+        const float gammas[] = {gamma, gamma};
+        /*
+        DPCT1114:969: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_norm, gammas, sizeof(gammas))),
+              "scalar upload norm");
+        float mixed_by_mode[3][2] = {}, inject_by_mode[3] = {};
+        for (int mode = 0; mode < 3; ++mode) {
+            select_activation_mode(mode);
+            gr_read(d_R, d_norm, d_weights, d_weights + 4, d_weights + 8, 0.0f,
+                    sh, ws, d_mixed, d_inject, stream);
+            check(DPCT_CHECK_ERROR(stream->wait()), "scalar warmup");
+            dpct::experimental::command_graph_ptr graph;
+            dpct::experimental::command_graph_exec_ptr executable;
+            check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+                  "scalar capture begin");
+            gr_read(d_R, d_norm, d_weights, d_weights + 4, d_weights + 8, 0.0f,
+                    sh, ws, d_mixed, d_inject, stream);
+            check(DPCT_CHECK_ERROR(
+                      dpct::experimental::end_recording(stream, &graph)),
+                  "scalar capture end");
+            check(DPCT_CHECK_ERROR(
+                      executable =
+                          new sycl::ext::oneapi::experimental::command_graph<
+                              sycl::ext::oneapi::experimental::graph_state::
+                                  executable>(graph->finalize())),
+                  "scalar instantiate");
+            // Changing both host options after capture cannot change the graph's selected kernels.
+            select_activation_mode((mode + 1) % 3);
+            // Warmup results must not make a missing/no-op captured launch pass.
+            // Poison the outputs and intermediate workspace before replay.
+            check(DPCT_CHECK_ERROR(
+                      stream->memset(d_mixed, 0xa5, 2 * sizeof(float))),
+                  "scalar poison mixed");
+            check(
+                DPCT_CHECK_ERROR(stream->memset(d_inject, 0xa5, sizeof(float))),
+                "scalar poison inject");
+            check(DPCT_CHECK_ERROR(stream->memset(d_scratch, 0xa5, ws.bytes)),
+                  "scalar poison workspace");
+            check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
+                  "scalar replay");
+            check(DPCT_CHECK_ERROR(stream->wait()), "scalar replay sync");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(mixed_by_mode[mode], d_mixed,
+                                               2 * sizeof(float))
+                                       .wait()),
+                  "scalar mixed copy");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(&inject_by_mode[mode], d_inject,
+                                               sizeof(float))
+                                       .wait()),
+                  "scalar inject copy");
+            const float activation = mode ? gamma : to_bf16(gamma);
+            const float projection = activation * 0.5f;
+            const float lo = projection / (1.0f + std::exp(-projection));
+            const float gate = (mode ? lo : to_bf16(lo)) * 1.5f;
+            const float expected_mixed = gamma / (1.0f + std::exp(-gate));
+            const float expected_inject = activation * 2.0f;
+            // Each mode has its own activation contract and bounded scalar-formula
+            // check. Native fast exp/div need not match ordinary FP32 postops bit
+            // for bit: native_gr_postops_parity establishes that arithmetic with
+            // actual pinned CUDA graphs. The nonzero projection/injection here
+            // has only one exactly representable product and remains exact.
+            const bool ok = std::fabs(mixed_by_mode[mode][0] - expected_mixed) <= 2e-7f &&
+                            mixed_by_mode[mode][0] == mixed_by_mode[mode][1] &&
+                            inject_by_mode[mode] == expected_inject;
+            std::printf("  scalar gamma %.8f %s activation/capture %s (mixed %.9f, ref %.9f)\n",
+                        gamma, activation_mode_name(mode), ok ? "pass" : "FAIL",
+                        mixed_by_mode[mode][0], expected_mixed);
+            if (!ok) ++bad;
+            check(DPCT_CHECK_ERROR(delete (executable)),
+                  "scalar graph exec destroy");
+            check(DPCT_CHECK_ERROR(delete (graph)), "scalar graph destroy");
+
+            const float sentinel = -73.25f;
+            check(
+                DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                     .memcpy(d_inject, &sentinel, sizeof(float))
+                                     .wait()),
+                "scalar sentinel");
+            select_activation_mode(mode);
+            gr_read(d_R, d_norm, d_weights, d_weights + 4, nullptr, 0.0f,
+                    sh, ws, d_mixed, d_inject, stream);
+            check(DPCT_CHECK_ERROR(stream->wait()), "scalar final mixer sync");
+            float final_mixed[2] = {}, untouched = 0.0f;
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(final_mixed, d_mixed, sizeof(final_mixed))
+                          .wait()),
+                  "scalar final mixed");
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(&untouched, d_inject, sizeof(float))
+                          .wait()),
+                  "scalar sentinel copy");
+            const bool final_ok = std::memcmp(final_mixed, mixed_by_mode[mode], sizeof(final_mixed)) == 0 && untouched == sentinel;
+            std::printf("  scalar final mixer %s %s\n", activation_mode_name(mode), final_ok ? "pass" : "FAIL");
+            if (!final_ok) ++bad;
+        }
+        if (std::fabs(mixed_by_mode[1][0] - mixed_by_mode[0][0]) <= 1e-5f ||
+            (gamma != 1.0f && inject_by_mode[0] == inject_by_mode[1])) {
+            std::printf("  scalar precision fixture is not observable\n");
+            ++bad;
+        }
+        if (inject_by_mode[1] != inject_by_mode[2]) {
+            std::printf("  native MMVF changed the exact scalar FP32 injection projection\n");
+            ++bad;
+        }
+    }
+    select_activation_mode(0);
+    check(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+          "scalar stream destroy");
+    sycl::free(d_R, dpct::get_in_order_queue());
+        sycl::free(d_norm, dpct::get_in_order_queue());
+        sycl::free(d_mixed, dpct::get_in_order_queue());
+        sycl::free(d_inject, dpct::get_in_order_queue());
+    sycl::free(d_weights, dpct::get_in_order_queue());
+        sycl::free(d_scratch, dpct::get_in_order_queue());
+    return bad;
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: gr_parity [--selftest]\n"); return 2; }
+    }
+
+    const long long n_embd = 256, hc = 4, hc_lr = 32;
+    const long long hc_dim = hc * n_embd;
+    const float eps = 1e-6f;
+    std::mt19937 rng(1234);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+
+    // Weights are BF16-VALUED f32, which is what the pack holds for a BF16 source type.  Generating plain f32
+    // weights would make the kernel (which stores 16 bits) differ from the reference by the rounding itself,
+    // and the test would then be measuring the fixture.
+    auto bf16_weight = [&](size_t n, float sigma) {
+        std::vector<float> v(n);
+        for (auto& x : v) x = to_bf16(gauss(rng) * sigma);
+        return v;
+    };
+    std::vector<float> R((size_t) hc_dim);
+    for (auto& x : R) x = gauss(rng);
+    // STREAM SCALES 1, 4, 16, 64.  Without them trap 1 is only ~5% observable, because four streams of i.i.d.
+    // normal noise have nearly the same RMS by accident - so a whole-stack RMS and a per-stream RMS agree to
+    // within the noise, and the fixture would be asserting a distinction it cannot see.  Giving the streams
+    // different magnitudes is what makes "per-stream" a claim with content.
+    for (long long c = 0; c < hc; ++c)
+        for (long long d = 0; d < n_embd; ++d) R[(size_t) (c * n_embd + d)] *= std::pow(4.0f, (float) c);
+    // gamma stored as (1 + w), so values near 1 - a reader expecting a plain scale is the one this catches
+    std::vector<float> w_norm((size_t) hc_dim);
+    for (auto& x : w_norm) x = 1.0f + 0.1f * gauss(rng);
+    std::vector<float> w_down = bf16_weight((size_t) (hc_lr * hc_dim), 0.2f);
+    std::vector<float> w_up = bf16_weight((size_t) (hc_dim * hc_lr), 0.2f);
+    std::vector<float> w_inject = bf16_weight((size_t) (hc * hc_dim), 0.05f);
+
+    // NO PERMUTATION: the kernel takes both matrices exactly as the manifest (and `ref/gr.py`) store them.
+    // `w_down` is (hc_lr, hc_dim) row-major and `w_up` is (hc_dim, hc_lr) row-major, so the bit-copy below is
+    // the whole conversion.  An earlier version of this kernel wanted both TRANSPOSED - the test built them
+    // that way and asserted the orientation observable - and that is gone because the warp-per-row mapping
+    // makes it unnecessary.  What replaces it is the general orientation trap further down: a weight array
+    // read with the wrong index expression must still produce a visibly different answer.
+    std::vector<uint16_t> q_down(w_down.size()), q_up(w_up.size()), q_inject(w_inject.size());
+    for (size_t i = 0; i < w_down.size(); ++i) q_down[i] = bf16_bits(w_down[i]);
+    for (size_t i = 0; i < w_up.size(); ++i) q_up[i] = bf16_bits(w_up[i]);
+    for (size_t i = 0; i < w_inject.size(); ++i) q_inject[i] = bf16_bits(w_inject[i]);
+
+    // ---- device side
+    float *d_R = nullptr, *d_norm = nullptr, *d_mixed = nullptr, *d_inject = nullptr;
+    uint16_t *d_down = nullptr, *d_up = nullptr, *d_inj = nullptr;
+    check(DPCT_CHECK_ERROR(d_R = sycl::malloc_device<float>(
+                               R.size(), dpct::get_in_order_queue())),
+          "m R");
+    check(DPCT_CHECK_ERROR(d_norm = sycl::malloc_device<float>(
+                               w_norm.size(), dpct::get_in_order_queue())),
+          "m norm");
+    check(DPCT_CHECK_ERROR(d_down = sycl::malloc_device<uint16_t>(
+                               q_down.size(), dpct::get_in_order_queue())),
+          "m down");
+    check(DPCT_CHECK_ERROR(d_up = sycl::malloc_device<uint16_t>(
+                               q_up.size(), dpct::get_in_order_queue())),
+          "m up");
+    check(DPCT_CHECK_ERROR(d_inj = sycl::malloc_device<uint16_t>(
+                               q_inject.size(), dpct::get_in_order_queue())),
+          "m inj");
+    check(DPCT_CHECK_ERROR(d_mixed = sycl::malloc_device<float>(
+                               (size_t)n_embd, dpct::get_in_order_queue())),
+          "m mixed");
+    check(DPCT_CHECK_ERROR(d_inject = sycl::malloc_device<float>(
+                               (size_t)hc, dpct::get_in_order_queue())),
+          "m inject");
+    /*
+    DPCT1114:970: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_R, R.data(), R.size() * sizeof(float))),
+          "c R");
+    /*
+    DPCT1114:971: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_norm, w_norm.data(), w_norm.size() * sizeof(float))),
+          "c norm");
+    /*
+    DPCT1114:972: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_down, q_down.data(), q_down.size() * sizeof(uint16_t))),
+          "c down");
+    /*
+    DPCT1114:973: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_up, q_up.data(), q_up.size() * sizeof(uint16_t))),
+          "c up");
+    /*
+    DPCT1114:974: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_inj, q_inject.data(), q_inject.size() * sizeof(uint16_t))),
+          "c inj");
+
+    const strata::kernels::GrShapes sh{n_embd, hc, hc_lr};
+    // DEVICE memory: the workspace is written by the kernel.
+    void* d_ws_raw = nullptr;
+    check(DPCT_CHECK_ERROR(d_ws_raw = (void *)sycl::malloc_device(
+                               strata::kernels::gr_workspace_bytes(sh),
+                               dpct::get_in_order_queue())),
+          "m ws");
+    strata::kernels::GrWorkspace ws;
+    strata::kernels::gr_workspace_init(sh, d_ws_raw, ws);
+    strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
+    std::vector<float> got_mixed((size_t) n_embd), got_inject((size_t) hc);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(got_mixed.data(), d_mixed,
+                                       got_mixed.size() * sizeof(float))
+                               .wait()),
+          "c mixed");
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(got_inject.data(), d_inject,
+                                       got_inject.size() * sizeof(float))
+                               .wait()),
+          "c inject");
+
+    int bad = 0;
+
+    // ---- the traps, asserted OBSERVABLE before the kernel is judged against the right reading
+    Opts right;
+    std::vector<float> want_mixed, want_inject;
+    reference(R, w_norm, w_down, w_up, w_inject, eps, n_embd, hc, hc_lr, right, want_mixed, want_inject);
+
+    struct Trap { const char* name; Opts o; double floor; };
+    const Trap traps[] = {
+        {"per-stream RMSNorm vs whole-stack", {false, true, true, true, true}, 0.05},
+        {"/hc inside the silu vs outside", {true, false, true, true, true}, 0.05},
+        {"SiLU on lo / sigmoid on gate, swapped", {true, true, false, true, true}, 0.05},
+        {"mean over streams vs sum", {true, true, true, false, true}, 0.50},
+        {"BF16 vs FP32 activation contracts", {true, true, true, true, false}, 1e-4},
+    };
+    for (const Trap& t : traps) {
+        std::vector<float> m, i;
+        reference(R, w_norm, w_down, w_up, w_inject, eps, n_embd, hc, hc_lr, t.o, m, i);
+        const double rel = rel_diff(want_mixed, m);
+        const bool observable = rel > t.floor;
+        std::printf("  %-40s %-4s (%.4f%% apart, floor %.3f%%)\n", t.name, observable ? "yes" : "*** NO ***",
+                    rel * 100, t.floor * 100);
+        if (!observable) {
+            std::printf("      *** the fixture cannot see this trap, so passing proves nothing about it ***\n");
+            ++bad;
+        }
+    }
+
+    // ---- the kernel against the correct reference
+    double mag = 0;
+    const double rel_mixed = rel_diff(want_mixed, got_mixed, &mag);
+    std::printf("\n  %-40s worst %.3e (mean |ref| %.4f)\n", "mixed vs reference", rel_mixed, mag);
+
+    // The tolerance is set by SUMMATION ORDER, not by the structure: both sides round the activation to bf16
+    // and both weights are bf16-valued, so every product is exact in f32 and only the order differs.  A
+    // structural error is several orders of magnitude larger - the trap floors above say so.
+    if (!(rel_mixed <= 1e-4)) {
+        std::printf("    *** over 1e-4, which summation order does not explain - look for a structural bug ***\n");
+        ++bad;
+    }
+
+    const double rel_inject = rel_diff(want_inject, got_inject);
+    std::printf("  %-40s rel %.3e\n", "inject vs reference", rel_inject);
+    if (!(rel_inject <= 1e-4)) {
+        // Say WHICH elements and by how much: a whole-array L1 hides whether this is one stream wrong (an
+        // indexing bug) or all of them slightly wrong (a precision bug), and those need different responses.
+        std::printf("    want:");
+        for (long long c = 0; c < hc; ++c) std::printf(" %12.6f", (double) want_inject[(size_t) c]);
+        std::printf("\n    got :");
+        for (long long c = 0; c < hc; ++c) std::printf(" %12.6f", (double) got_inject[(size_t) c]);
+        std::printf("\n");
+        ++bad;
+    }
+
+    // Same geometry and weights with the CUDA single-token activation contract.  The scalar fixture
+    // below is the independent precision check; this case exercises multi-stream reductions and indexing.
+    {
+        Opts fp32;
+        fp32.round_activation = false;
+        std::vector<float> wm, wi, gm((size_t) n_embd), gi((size_t) hc);
+        reference(R, w_norm, w_down, w_up, w_inject, eps, n_embd, hc, hc_lr, fp32, wm, wi);
+        strata::kernels::gr_set_fp32_activations(true);
+        strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(gm.data(), d_mixed, gm.size() * sizeof(float))
+                      .wait()),
+              "FP32 mixed");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(gi.data(), d_inject, gi.size() * sizeof(float))
+                      .wait()),
+              "FP32 inject");
+        strata::kernels::gr_set_fp32_activations(false);
+        const double rm = rel_diff(wm, gm), ri = rel_diff(wi, gi);
+        const bool ok = rm <= 1e-4 && ri <= 1e-4;
+        std::printf("  FP32 activations vs reference: %s (mixed %.3e, inject %.3e)\n",
+                    ok ? "pass" : "FAIL", rm, ri);
+        if (!ok) ++bad;
+        strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(gm.data(), d_mixed, gm.size() * sizeof(float))
+                      .wait()),
+              "restored mixed");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(gi.data(), d_inject, gi.size() * sizeof(float))
+                      .wait()),
+              "restored inject");
+        const bool restored = std::memcmp(gm.data(), got_mixed.data(), gm.size() * sizeof(float)) == 0 &&
+                              std::memcmp(gi.data(), got_inject.data(), gi.size() * sizeof(float)) == 0;
+        std::printf("  restoring default activation contract: %s\n", restored ? "byte-identical" : "FAIL");
+        if (!restored) ++bad;
+    }
+
+    // ---- THE WEIGHT ORIENTATION MUST BE OBSERVABLE.  The kernel now takes both matrices exactly as the
+    // manifest stores them, so there is no permutation for a loader to forget - but the INDEX EXPRESSIONS
+    // inside the kernel are still a place to be wrong, and a wrong one gives right-shaped, wrong-valued
+    // output.  Feed transposed copies through the same code path and require the answer to differ.
+    {
+        uint16_t *d_down_bad = nullptr, *d_up_bad = nullptr;
+        check(DPCT_CHECK_ERROR(d_down_bad = sycl::malloc_device<uint16_t>(
+                                   q_down.size(), dpct::get_in_order_queue())),
+              "m down_bad");
+        check(DPCT_CHECK_ERROR(d_up_bad = sycl::malloc_device<uint16_t>(
+                                   q_up.size(), dpct::get_in_order_queue())),
+              "m up_bad");
+        std::vector<uint16_t> tr_down(q_down.size()), tr_up(q_up.size());
+        for (long long k = 0; k < hc_lr; ++k)
+            for (long long i = 0; i < hc_dim; ++i)
+                tr_down[(size_t) (i * hc_lr + k)] = q_down[(size_t) (k * hc_dim + i)];
+        for (long long i = 0; i < hc_dim; ++i)
+            for (long long k = 0; k < hc_lr; ++k)
+                tr_up[(size_t) (k * hc_dim + i)] = q_up[(size_t) (i * hc_lr + k)];
+        /*
+        DPCT1114:975: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_down_bad, tr_down.data(), tr_down.size() * 2)),
+              "cb d");
+        /*
+        DPCT1114:976: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_up_bad, tr_up.data(), tr_up.size() * 2)),
+              "cb u");
+        std::vector<float> bad_mixed((size_t) n_embd);
+        float* d_bad = nullptr;
+        check(
+            DPCT_CHECK_ERROR(d_bad = sycl::malloc_device<float>(
+                                 bad_mixed.size(), dpct::get_in_order_queue())),
+            "m bad");
+        strata::kernels::gr_read(d_R, d_norm, d_down_bad, d_up_bad, d_inj, eps, sh, ws, d_bad, d_inject,
+                                 nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(bad_mixed.data(), d_bad,
+                                           bad_mixed.size() * sizeof(float))
+                                   .wait()),
+              "cb b");
+        const double rel = rel_diff(want_mixed, bad_mixed);
+        const bool visible = rel > 0.05;
+        std::printf("  %-40s %s (%.1f%% apart)\n", "weight orientation is observable",
+                    visible ? "yes" : "*** NO ***", rel * 100);
+        if (!visible) ++bad;
+        sycl::free(d_down_bad, dpct::get_in_order_queue());
+            sycl::free(d_up_bad, dpct::get_in_order_queue());
+            sycl::free(d_bad, dpct::get_in_order_queue());
+    }
+
+    // ---- the FINAL mixer passes w_inject = nullptr, and then nothing may be written
+    float sentinel = -12345.0f;
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(d_inject, &sentinel, sizeof(float))
+                               .wait()),
+          "c sentinel");
+    strata::kernels::gr_read(d_R, d_norm, d_down, d_up, nullptr, eps, sh, ws, d_mixed, d_inject, nullptr);
+    float after = 0.0f;
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(&after, d_inject, sizeof(float))
+                               .wait()),
+          "c after");
+    const bool untouched = (after == sentinel);
+    std::printf("  %-40s %s\n", "null w_inject writes nothing", untouched ? "yes" : "*** NO ***");
+    if (!untouched) ++bad;
+
+    // ---- gr_write: the `2*sigmoid` centring, asserted as the PROPERTY the source comment claims
+    std::vector<float> block_out((size_t) n_embd);
+    for (auto& x : block_out) x = gauss(rng);
+    std::vector<float> zero_inj((size_t) hc, 0.0f);
+    float *d_Rw = nullptr, *d_bo = nullptr, *d_zi = nullptr, *d_outw = nullptr;
+    check(DPCT_CHECK_ERROR(d_Rw = sycl::malloc_device<float>(
+                               R.size(), dpct::get_in_order_queue())),
+          "m Rw");
+    check(DPCT_CHECK_ERROR(d_bo = sycl::malloc_device<float>(
+                               block_out.size(), dpct::get_in_order_queue())),
+          "m bo");
+    check(DPCT_CHECK_ERROR(d_zi = sycl::malloc_device<float>(
+                               zero_inj.size(), dpct::get_in_order_queue())),
+          "m zi");
+    check(DPCT_CHECK_ERROR(d_outw = sycl::malloc_device<float>(
+                               R.size(), dpct::get_in_order_queue())),
+          "m outw");
+    /*
+    DPCT1114:977: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_Rw, R.data(), R.size() * sizeof(float))),
+          "c Rw");
+    /*
+    DPCT1114:978: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_bo, block_out.data(), block_out.size() * sizeof(float))),
+          "c bo");
+    /*
+    DPCT1114:979: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_zi, zero_inj.data(), zero_inj.size() * sizeof(float))),
+          "c zi");
+
+    strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
+    std::vector<float> got_write((size_t) hc_dim);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(got_write.data(), d_outw,
+                                       got_write.size() * sizeof(float))
+                               .wait()),
+          "c outw");
+
+    double worst_plain = 0;
+    for (long long c = 0; c < hc; ++c)
+        for (long long d = 0; d < n_embd; ++d) {
+            const size_t i = (size_t) (c * n_embd + d);
+            const double want = (double) R[i] + (double) block_out[(size_t) d];
+            worst_plain = std::fmax(worst_plain, rel_terms(want, (double) got_write[i], (double) R[i],
+                                                           (double) block_out[(size_t) d]));
+        }
+    const bool plain = worst_plain < 1e-6;
+    std::printf("  %-40s %s (worst rel %.3e)\n", "zero injection -> plain residual add",
+                plain ? "yes" : "*** NO ***", worst_plain);
+    if (!plain) ++bad;
+
+    // the rival reading: sigmoid without the 2 halves the update, and must be visible.
+    //
+    // The comparison is on the DELTA `out - R`, not on `out`.  The claim is about the gate WEIGHT, and `R`
+    // now reaches 64 in the last stream, so measuring `R + block_out*w` against the wrong reading dilutes a
+    // 100% error in `w` down to 2.27% - which is how this check first passed as "not observable" while being
+    // perfectly observable.  Measure the quantity the claim is about.
+    {
+        std::vector<float> got_delta((size_t) hc_dim), want_delta((size_t) hc_dim), wrong_delta((size_t) hc_dim);
+        for (long long c = 0; c < hc; ++c)
+            for (long long d = 0; d < n_embd; ++d) {
+                const size_t i = (size_t) (c * n_embd + d);
+                got_delta[i] = (float) ((double) got_write[i] - (double) R[i]);
+                want_delta[i] = block_out[(size_t) d];        // 2*sigmoid(0) = 1.0
+                wrong_delta[i] = block_out[(size_t) d] * 0.5f; // 1*sigmoid(0) = 0.5
+            }
+        const double rel = rel_diff(want_delta, wrong_delta);
+        const double rel_got = rel_diff(want_delta, got_delta);
+        const bool visible = rel > 0.05 && rel_got < 0.05;
+        std::printf("  %-40s %s (readings %.0f%% apart, kernel within %.2e)\n",
+                    "1*sigmoid vs 2*sigmoid is observable", visible ? "yes" : "*** NO ***", rel * 100, rel_got);
+        if (!visible) ++bad;
+    }
+
+    // a non-zero injection: every stream receives the SAME block output, differing only by weight
+    std::vector<float> inj((size_t) hc);
+    for (auto& x : inj) x = gauss(rng) * 3.0f;
+    /*
+    DPCT1114:980: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_zi, inj.data(), inj.size() * sizeof(float))),
+          "c inj2");
+    strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(got_write.data(), d_outw,
+                                       got_write.size() * sizeof(float))
+                               .wait()),
+          "c outw2");
+    double worst_stream = 0;
+    for (long long c = 0; c < hc; ++c) {
+        const double w = 2.0 / (1.0 + std::exp(-(double) inj[(size_t) c] / (double) hc));
+        for (long long d = 0; d < n_embd; ++d) {
+            const size_t i = (size_t) (c * n_embd + d);
+            const double want = (double) R[i] + (double) block_out[(size_t) d] * w;
+            worst_stream = std::fmax(worst_stream, rel_terms(want, (double) got_write[i], (double) R[i],
+                                                             (double) block_out[(size_t) d] * w));
+        }
+    }
+    const bool streams_ok = worst_stream < 1e-6;
+    std::printf("  %-40s %s (worst rel %.3e)\n", "every stream adds the same block output",
+                streams_ok ? "yes" : "*** NO ***", worst_stream);
+    if (!streams_ok) ++bad;
+
+    // ---- THE REAL DIMENSIONS. Exercise all activation/projection variants at n_embd=2560, hc=4, hc_lr=320.
+    // Workspace sizing and every full weight row must agree with the model geometry.
+    {
+        const long long rn = 2560, rhc = 4, rlr = 320, rdim = rhc * rn;
+        std::mt19937 rrng(99);
+        std::normal_distribution<float> rg(0.0f, 1.0f);
+        auto rbf16 = [&](size_t n, float sigma) {
+            std::vector<float> v(n);
+            for (auto& x : v) x = to_bf16(rg(rrng) * sigma);
+            return v;
+        };
+        std::vector<float> rR((size_t) rdim);
+        for (auto& x : rR) x = rg(rrng);
+        for (long long c = 0; c < rhc; ++c)
+            for (long long d = 0; d < rn; ++d) rR[(size_t) (c * rn + d)] *= std::pow(4.0f, (float) c);
+        std::vector<float> rnorm((size_t) rdim);
+        for (auto& x : rnorm) x = 1.0f + 0.1f * rg(rrng);
+        std::vector<float> rdown = rbf16((size_t) (rlr * rdim), 0.2f);
+        std::vector<float> rup = rbf16((size_t) (rdim * rlr), 0.2f);
+        std::vector<float> rinj = rbf16((size_t) (rhc * rdim), 0.05f);
+
+        std::vector<uint16_t> qd(rdown.size()), qu(rup.size()), qi(rinj.size());
+        for (size_t i = 0; i < rdown.size(); ++i) qd[i] = bf16_bits(rdown[i]);
+        for (size_t i = 0; i < rup.size(); ++i) qu[i] = bf16_bits(rup[i]);
+        for (size_t i = 0; i < rinj.size(); ++i) qi[i] = bf16_bits(rinj[i]);
+
+        float *dR = nullptr, *dN = nullptr, *dM = nullptr, *dI = nullptr;
+        uint16_t *dD = nullptr, *dU = nullptr, *dJ = nullptr;
+        check(DPCT_CHECK_ERROR(dR = (float *)sycl::malloc_device(
+                                   rR.size() * 4, dpct::get_in_order_queue())),
+              "rR");
+        check(
+            DPCT_CHECK_ERROR(dN = (float *)sycl::malloc_device(
+                                 rnorm.size() * 4, dpct::get_in_order_queue())),
+            "rN");
+        check(DPCT_CHECK_ERROR(dD = (uint16_t *)sycl::malloc_device(
+                                   qd.size() * 2, dpct::get_in_order_queue())),
+              "rD");
+        check(DPCT_CHECK_ERROR(dU = (uint16_t *)sycl::malloc_device(
+                                   qu.size() * 2, dpct::get_in_order_queue())),
+              "rU");
+        check(DPCT_CHECK_ERROR(dJ = (uint16_t *)sycl::malloc_device(
+                                   qi.size() * 2, dpct::get_in_order_queue())),
+              "rJ");
+        check(DPCT_CHECK_ERROR(dM = (float *)sycl::malloc_device(
+                                   (size_t)rn * 4, dpct::get_in_order_queue())),
+              "rM");
+        check(
+            DPCT_CHECK_ERROR(dI = (float *)sycl::malloc_device(
+                                 (size_t)rhc * 4, dpct::get_in_order_queue())),
+            "rI");
+        /*
+        DPCT1114:981: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  dR, rR.data(), rR.size() * 4)),
+              "crR");
+        /*
+        DPCT1114:982: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  dN, rnorm.data(), rnorm.size() * 4)),
+              "crN");
+        /*
+        DPCT1114:983: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  dD, qd.data(), qd.size() * 2)),
+              "crD");
+        /*
+        DPCT1114:984: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  dU, qu.data(), qu.size() * 2)),
+              "crU");
+        /*
+        DPCT1114:985: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  dJ, qi.data(), qi.size() * 2)),
+              "crJ");
+
+        const strata::kernels::GrShapes rsh{rn, rhc, rlr};
+        void* rws_raw = nullptr;
+        check(DPCT_CHECK_ERROR(rws_raw = (void *)sycl::malloc_device(
+                                   strata::kernels::gr_workspace_bytes(rsh),
+                                   dpct::get_in_order_queue())),
+              "m rws");
+        strata::kernels::GrWorkspace rws;
+        strata::kernels::gr_workspace_init(rsh, rws_raw, rws);
+        for (int mode = 0; mode < 3; ++mode) {
+            select_activation_mode(mode);
+            strata::kernels::gr_read(dR, dN, dD, dU, dJ, eps, rsh, rws, dM, dI, nullptr);
+            std::vector<float> gm((size_t) rn), gi((size_t) rhc);
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(gm.data(), dM, gm.size() * 4)
+                                       .wait()),
+                  "cgm");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(gi.data(), dI, gi.size() * 4)
+                                       .wait()),
+                  "cgi");
+
+            Opts precision;
+            precision.round_activation = mode == 0;
+            std::vector<float> wm, wi;
+            reference(rR, rnorm, rdown, rup, rinj, eps, rn, rhc, rlr, precision, wm, wi);
+            const double rm = rel_diff(wm, gm), ri = rel_diff(wi, gi);
+            const bool ok = rm <= 1e-4 && ri <= 1e-4;
+            std::printf("\n  real dims 2560/4/320 %s %s (mixed %.3e, inject %.3e)\n",
+                        activation_mode_name(mode), ok ? "pass" : "*** FAIL ***", rm, ri);
+            if (!ok) ++bad;
+        }
+        select_activation_mode(0);
+        sycl::free(rws_raw, dpct::get_in_order_queue());
+        sycl::free(dR, dpct::get_in_order_queue());
+            sycl::free(dN, dpct::get_in_order_queue());
+            sycl::free(dD, dpct::get_in_order_queue());
+            sycl::free(dU, dpct::get_in_order_queue());
+            sycl::free(dJ, dpct::get_in_order_queue());
+            sycl::free(dM, dpct::get_in_order_queue());
+            sycl::free(dI, dpct::get_in_order_queue());
+    }
+
+    bad += scalar_activation_contract();
+    std::printf("\ngr_read/gr_write: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("gr_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/iq_parity.cpp b/sycl/src/kernels/iq_parity.cpp
new file mode 100644
index 00000000000..0f957d55ba5
--- /dev/null
+++ b/sycl/src/kernels/iq_parity.cpp
@@ -0,0 +1,111 @@
+// src/kernels/iq_parity.cpp - plan v0.3 P6: the i-quant kernels against gguf-py on real rows.
+//
+//     python tools/iq_fixture.py --out logs/iq_fixture && build/iq_parity logs/iq_fixture
+//
+// Dequant must match gguf-py's values to fp32 rounding; the MMVQ dot (q8_1 activations) must match the float
+// matrix-vector product within the activation rounding (a few 1e-3 relative).
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <random>
+#include <string>
+#include <vector>
+
+int main(int argc, char** argv) {
+    const std::string dir = argc > 1 ? argv[1] : "logs/iq_fixture";
+    const char* names[] = {"IQ2_XXS", "IQ2_XS", "IQ2_S", "IQ3_XXS", "IQ3_S", "IQ1_M", "IQ4_NL", "IQ4_XS", "Q2_0", "Q3_K"};
+    int failures = 0;
+    dpct::queue_ptr s;
+    s = dpct::get_current_device().create_queue(true);
+    for (const char* nm : names) {
+        std::FILE* f = std::fopen((dir + "/" + nm + ".bin").c_str(), "rb");
+        std::FILE* g = std::fopen((dir + "/" + nm + ".f32").c_str(), "rb");
+        if (!f || !g) { std::printf("%-8s missing fixture\n", nm); ++failures; continue; }
+        int hdr[3];
+        std::fread(hdr, 4, 3, f);
+        const int type = hdr[0], rows = hdr[1], cols = hdr[2];
+        std::vector<uint8_t> raw;
+        { uint8_t buf[1 << 16]; size_t n; while ((n = std::fread(buf, 1, sizeof buf, f)) > 0) raw.insert(raw.end(), buf, buf + n); }
+        std::vector<float> ref((size_t) rows * cols);
+        std::fread(ref.data(), 4, ref.size(), g);
+        std::fclose(f);
+        std::fclose(g);
+        void* dw = nullptr;
+        float* dq = nullptr;
+        dw =
+            (void *)sycl::malloc_device(raw.size(), dpct::get_in_order_queue());
+        dq = (float *)sycl::malloc_device(ref.size() * 4,
+                                          dpct::get_in_order_queue());
+        /*
+        DPCT1114:365: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        dpct::get_in_order_queue().memcpy(dw, raw.data(), raw.size());
+        double dq_err = 0.0;
+        if (strata::kernels::iq_supported(type) && ((size_t) rows * cols) % 256 == 0) {
+            strata::kernels::iq_dequant_f32(type, dw, (int64_t) rows * cols, dq, s);
+            std::vector<float> got(ref.size());
+            dpct::get_in_order_queue()
+                .memcpy(got.data(), dq, got.size() * 4)
+                .wait();
+            double num = 0, den = 0;
+            for (size_t i = 0; i < ref.size(); ++i) { num += std::fabs(got[i] - ref[i]); den += std::fabs(ref[i]); }
+            dq_err = num / (den + 1e-30);
+        }
+        // the dot, two columns
+        std::mt19937 rng(7);
+        std::normal_distribution<float> nd(0.f, 1.f);
+        std::vector<float> x((size_t) 2 * cols);
+        for (auto& v : x) v = nd(rng);
+        float* dx = nullptr;
+        void* xq = nullptr;
+        float* dy = nullptr;
+        dx = (float *)sycl::malloc_device(x.size() * 4,
+                                          dpct::get_in_order_queue());
+        xq = (void *)sycl::malloc_device((size_t)2 * cols / 32 * 36,
+                                         dpct::get_in_order_queue());
+        dy = (float *)sycl::malloc_device((size_t)2 * rows * 4,
+                                          dpct::get_in_order_queue());
+        /*
+        DPCT1114:366: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4);
+        strata::kernels::quantize_q8_1_rows(dx, 2, cols, xq, s);
+        try {
+            strata::kernels::native_mmvq(type, dw, xq, dy, cols, rows, 2, s);
+        } catch (const std::exception& e) { std::printf("%-8s mmvq: %s\n", nm, e.what()); ++failures; continue; }
+        std::vector<float> y((size_t) 2 * rows);
+        s->wait();
+        dpct::get_in_order_queue().memcpy(y.data(), dy, y.size() * 4).wait();
+        double num = 0, den = 0;
+        for (int c = 0; c < 2; ++c)
+            for (int r = 0; r < rows; ++r) {
+                double acc = 0;
+                for (int k = 0; k < cols; ++k) acc += (double) ref[(size_t) r * cols + k] * x[(size_t) c * cols + k];
+                num += std::fabs(y[(size_t) c * rows + r] - acc);
+                den += std::fabs(acc);
+            }
+        const double mm_err = num / (den + 1e-30);
+        const bool ok = dq_err < 1e-6 && mm_err < 2e-2;
+        std::printf("%-8s type %2d %4d x %5d  dequant rel %.2e  mmvq rel %.2e  %s\n", nm, type, rows, cols, dq_err, mm_err,
+                    ok ? "ok" : "FAIL");
+        if (!ok) ++failures;
+        sycl::free(dw, dpct::get_in_order_queue());
+            sycl::free(dq, dpct::get_in_order_queue());
+            sycl::free(dx, dpct::get_in_order_queue());
+            sycl::free(xq, dpct::get_in_order_queue());
+            sycl::free(dy, dpct::get_in_order_queue());
+    }
+    std::printf("iq_parity: %d failures\n", failures);
+    return failures ? 1 : 0;
+}
diff --git a/sycl/src/kernels/kv_q4_parity.cpp b/sycl/src/kernels/kv_q4_parity.cpp
new file mode 100644
index 00000000000..854f8993393
--- /dev/null
+++ b/sycl/src/kernels/kv_q4_parity.cpp
@@ -0,0 +1,429 @@
+// src/kernels/kv_q4_parity.cpp - Parity test for Q4_0 KV cache with orthonormal Walsh-Hadamard rotation.
+// Validates:
+// 1. FWHT 256 CUDA kernel vs exact mathematical orthonormal Walsh-Hadamard transform.
+//    (H * H * x == x, H is symmetric and orthonormal with scale 1/sqrt(256) = 1/16).
+// 2. Q4_0 quantization and packing (32 values per block, 18 bytes) bitwise vs host reference.
+// 3. kv_append_q4_step and kv_gather_q4_step through paged pool against host reference.
+// 4. Invariance of dot products under Walsh-Hadamard rotation: (H*q) . (H*k) == q . k.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/qsa.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+
+int g_fail = 0;
+
+void ck(dpct::err0 e, const char *w) {
+}
+
+template <typename T>
+T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 64, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+       "memset");
+    return p;
+}
+
+// Exact CPU reference for Fast Walsh-Hadamard Transform (D = 256)
+// Sylvester construction matching llama.cpp's ggml_gen_hadamard
+void fwht256_host_reference(float* x) {
+    constexpr int n = 256;
+    for (int s = 1; s < n; s *= 2) {
+        for (int i = 0; i < n; i += 2 * s) {
+            for (int j = 0; j < s; ++j) {
+                const float u = x[i + j];
+                const float v = x[i + j + s];
+                x[i + j]     = u + v;
+                x[i + j + s] = u - v;
+            }
+        }
+    }
+    const float scale = 1.0f / 16.0f; // 1 / sqrt(256)
+    for (int i = 0; i < n; ++i) {
+        x[i] *= scale;
+    }
+}
+
+// Host reference for Q4_0 quantization of 32 elements (1 block)
+void quantize_block_q4_0_host(const float* x, k::block_q4_0& blk) {
+    float amax = 0.0f;
+    float max_val = 0.0f;
+    for (int i = 0; i < 32; ++i) {
+        const float v = x[i];
+        if (amax < std::fabs(v)) {
+            amax = std::fabs(v);
+            max_val = v;
+        }
+    }
+    const float d = max_val / -8.0f;
+    const float id = d != 0.0f ? 1.0f / d : 0.0f;
+    blk.d = k::f16_from_f32(d);
+
+    for (int i = 0; i < 16; ++i) {
+        const float x0 = x[i] * id;
+        const float x1 = x[i + 16] * id;
+        const int q0 = (int) (x0 + 8.5f);
+        const int q1 = (int) (x1 + 8.5f);
+        const uint8_t xi0 = (uint8_t) std::min(15, std::max(0, q0));
+        const uint8_t xi1 = (uint8_t) std::min(15, std::max(0, q1));
+        blk.qs[i] = xi0 | (xi1 << 4);
+    }
+}
+
+} // namespace
+
+int main() {
+    std::printf("=== Running kv_q4_parity test ===\n");
+    std::mt19937 rng(42);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+
+    // -------------------------------------------------------------
+    // Test 1: Orthonormal Fast Walsh-Hadamard Transform (D=256)
+    // -------------------------------------------------------------
+    std::printf("[1/4] Verifying FWHT-256 CUDA kernel vs exact mathematical reference...\n");
+    constexpr int n_vectors = 64;
+    std::vector<float> h_in(n_vectors * 256);
+    std::vector<float> h_ref(n_vectors * 256);
+    for (size_t i = 0; i < h_in.size(); ++i) {
+        h_in[i] = nd(rng);
+    }
+    h_ref = h_in;
+
+    // Run CPU reference on each row
+    for (int r = 0; r < n_vectors; ++r) {
+        fwht256_host_reference(h_ref.data() + r * 256);
+    }
+
+    // Run GPU kernel
+    float* d_src = dalloc<float>(n_vectors * 256);
+    float* d_dst = dalloc<float>(n_vectors * 256);
+    /*
+    DPCT1114:781: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_src, h_in.data(), h_in.size() * sizeof(float))),
+       "memcpy H2D");
+
+    k::fwht256_cuda(d_src, d_dst, n_vectors, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "fwht256_cuda");
+
+    std::vector<float> h_out(n_vectors * 256);
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue()
+               .memcpy(h_out.data(), d_dst, h_out.size() * sizeof(float))
+               .wait()),
+       "memcpy D2H");
+
+    double max_fwht_diff = 0.0;
+    for (size_t i = 0; i < h_out.size(); ++i) {
+        double diff = std::fabs(h_out[i] - h_ref[i]);
+        if (diff > max_fwht_diff) max_fwht_diff = diff;
+    }
+    if (max_fwht_diff > 1e-5) {
+        std::fprintf(stderr, "FAIL: FWHT-256 GPU output differs from host reference (max diff = %e)\n", max_fwht_diff);
+        ++g_fail;
+    } else {
+        std::printf("  -> FWHT-256 bitwise match with host reference (max diff = %e, OK)\n", max_fwht_diff);
+    }
+
+    // Self-inverse property: H * (H * x) == x
+    k::fwht256_inplace_cuda(d_dst, n_vectors, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "fwht256_inplace_cuda");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue()
+               .memcpy(h_out.data(), d_dst, h_out.size() * sizeof(float))
+               .wait()),
+       "memcpy D2H");
+
+    double max_inv_diff = 0.0;
+    for (size_t i = 0; i < h_out.size(); ++i) {
+        double diff = std::fabs(h_out[i] - h_in[i]);
+        if (diff > max_inv_diff) max_inv_diff = diff;
+    }
+    if (max_inv_diff > 1e-5) {
+        std::fprintf(stderr, "FAIL: FWHT-256 self-inverse property failed (max diff = %e)\n", max_inv_diff);
+        ++g_fail;
+    } else {
+        std::printf("  -> FWHT-256 self-inverse property verified H*H*x == x (max diff = %e, OK)\n", max_inv_diff);
+    }
+
+    // -------------------------------------------------------------
+    // Test 2: Invariance of Attention Scores under Hadamard Rotation
+    // -------------------------------------------------------------
+    std::printf("[2/4] Verifying Attention Score Invariance: <H*q, H*k> == <q, k>...\n");
+    double max_dot_diff = 0.0;
+    for (int r = 0; r < n_vectors; r += 2) {
+        const float* q = h_in.data() + r * 256;
+        const float* k_vec = h_in.data() + (r + 1) * 256;
+        const float* hq = h_ref.data() + r * 256;
+        const float* hk = h_ref.data() + (r + 1) * 256;
+
+        double dot_raw = 0.0;
+        double dot_rot = 0.0;
+        for (int i = 0; i < 256; ++i) {
+            dot_raw += (double) q[i] * (double) k_vec[i];
+            dot_rot += (double) hq[i] * (double) hk[i];
+        }
+        double d = std::fabs(dot_raw - dot_rot);
+        if (d > max_dot_diff) max_dot_diff = d;
+    }
+    if (max_dot_diff > 1e-5) {
+        std::fprintf(stderr, "FAIL: Rotated dot product differs from original (max diff = %e)\n", max_dot_diff);
+        ++g_fail;
+    } else {
+        std::printf("  -> Dot product invariant under rotation: |<Hq,Hk> - <q,k>| = %e (OK)\n", max_dot_diff);
+    }
+
+    // -------------------------------------------------------------
+    // Test 3: Q4_0 Paged KV Append & Gather against Host Reference
+    // -------------------------------------------------------------
+    std::printf("[3/4] Verifying Q4_0 KV append and gather against host reference...\n");
+    k::QsaShapes s = k::qsa_real_shapes();
+    s.page_size = 64;
+    const int H = (int) s.n_head_kv; // 2
+    const int D = (int) s.head_dim;   // 256
+    const int P = (int) s.page_size;  // 64
+    const int pages = 8;
+    const int cells = pages * P;
+
+    std::vector<int32_t> table(pages);
+    for (int i = 0; i < pages; ++i) table[i] = (i * 3 + 5) % pages; // permutation
+    int32_t* d_table = dalloc<int32_t>(pages);
+    /*
+    DPCT1114:782: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_table, table.data(), pages * sizeof(int32_t))),
+       "memcpy table");
+
+    const size_t pool_bytes = (size_t) pages * H * P * k::kv_q4_bytes_per_head(D);
+    uint8_t* d_k_q4 = dalloc<uint8_t>(pool_bytes);
+    uint8_t* d_v_q4 = dalloc<uint8_t>(pool_bytes);
+    float* d_kcur = dalloc<float>(H * D);
+    float* d_vcur = dalloc<float>(H * D);
+    int32_t* d_step = dalloc<int32_t>(k::kStepCount);
+
+    std::vector<std::vector<float>> host_k(cells), host_v(cells);
+    std::vector<int> positions(cells);
+    for (int i = 0; i < cells; ++i) positions[i] = i;
+    std::shuffle(positions.begin(), positions.end(), rng);
+
+    const int n_fill = cells - 25; // leave some cells empty
+    for (int n = 0; n < n_fill; ++n) {
+        const int pos = positions[n];
+        std::vector<float> kv(H * D), vv(H * D);
+        for (auto& x : kv) x = nd(rng) * 2.0f;
+        for (auto& x : vv) x = nd(rng) * 2.0f;
+
+        // Apply FWHT before append
+        for (int h = 0; h < H; ++h) {
+            fwht256_host_reference(kv.data() + h * D);
+            fwht256_host_reference(vv.data() + h * D);
+        }
+        host_k[pos] = kv;
+        host_v[pos] = vv;
+
+        int32_t hstep[k::kStepCount] = {pos, pos + 1, 0, 0};
+        /*
+        DPCT1114:783: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep))),
+           "memcpy step");
+        /*
+        DPCT1114:784: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_kcur, kv.data(), kv.size() * sizeof(float))),
+           "memcpy k");
+        /*
+        DPCT1114:785: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_vcur, vv.data(), vv.size() * sizeof(float))),
+           "memcpy v");
+
+        k::kv_append_q4_step(d_k_q4, d_v_q4, d_table, d_step, d_kcur, d_vcur, s, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "kv_append_q4_step");
+    }
+
+    // Verify written Q4_0 blocks bitwise against host quantizer
+    std::vector<uint8_t> h_k_q4(pool_bytes), h_v_q4(pool_bytes);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_k_q4.data(), d_k_q4, pool_bytes)
+                            .wait()),
+       "memcpy d2h k_q4");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_v_q4.data(), d_v_q4, pool_bytes)
+                            .wait()),
+       "memcpy d2h v_q4");
+
+    long bad_blocks = 0;
+    const int blocks_per_head = D / k::QK4_0; // 8
+    const int bytes_per_head = blocks_per_head * sizeof(k::block_q4_0); // 144
+
+    for (int n = 0; n < n_fill; ++n) {
+        const int pos = positions[n];
+        for (int is_v = 0; is_v < 2; ++is_v) {
+            for (int h = 0; h < H; ++h) {
+                const long long page = (long long) table[pos / P];
+                const long long row = (page * H + h) * P + (pos % P);
+                const uint8_t* pool_ptr = (is_v ? h_v_q4.data() : h_k_q4.data()) + row * bytes_per_head;
+                const float* raw_vec = (is_v ? host_v[pos].data() : host_k[pos].data()) + h * D;
+
+                for (int b = 0; b < blocks_per_head; ++b) {
+                    k::block_q4_0 host_blk;
+                    quantize_block_q4_0_host(raw_vec + b * 32, host_blk);
+
+                    const k::block_q4_0* gpu_blk = reinterpret_cast<const k::block_q4_0*>(pool_ptr) + b;
+                    if (std::memcmp(&host_blk, gpu_blk, sizeof(k::block_q4_0)) != 0) {
+                        if (bad_blocks == 0) {
+                            std::printf("MISMATCH at n=%d, pos=%d, is_v=%d, h=%d, b=%d\n", n, pos, is_v, h, b);
+                            std::printf("  host blk.d = 0x%04x (%f), gpu blk.d = 0x%04x (%f)\n",
+                                        host_blk.d, k::f32_from_f16(host_blk.d),
+                                        gpu_blk->d, k::f32_from_f16(gpu_blk->d));
+                            std::printf("  host qs: ");
+                            for (int i = 0; i < 16; ++i) std::printf("%02x ", host_blk.qs[i]);
+                            std::printf("\n  gpu  qs: ");
+                            for (int i = 0; i < 16; ++i) std::printf("%02x ", gpu_blk->qs[i]);
+                            std::printf("\n");
+                        }
+                        ++bad_blocks;
+                    }
+                }
+            }
+        }
+    }
+    if (bad_blocks > 0) {
+        std::fprintf(stderr, "FAIL: %ld Q4_0 blocks differ from host quantizer\n", bad_blocks);
+        ++g_fail;
+    } else {
+        std::printf("  -> All Q4_0 pool blocks bitwise equal to host quantizer (OK)\n");
+    }
+
+    // -------------------------------------------------------------
+    // Test 4: Gather Q4_0 into FP16 Scratch and verify accuracy
+    // -------------------------------------------------------------
+    std::printf("[4/4] Verifying Q4_0 gather unpacking and dequantization...\n");
+    const int max_ids = 128;
+    int32_t* d_ids = dalloc<int32_t>(max_ids);
+    uint16_t* d_k_scratch = dalloc<uint16_t>((size_t) max_ids * H * D);
+    uint16_t* d_v_scratch = dalloc<uint16_t>((size_t) max_ids * H * D);
+
+    std::vector<int32_t> ids(max_ids);
+    for (int i = 0; i < max_ids; ++i) {
+        ids[i] = positions[rng() % n_fill];
+    }
+    /*
+    DPCT1114:786: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_ids, ids.data(), max_ids * sizeof(int32_t))),
+       "memcpy ids");
+
+    int32_t hstep[k::kStepCount] = {0, 0, 0, max_ids};
+    /*
+    DPCT1114:787: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep))),
+       "memcpy step");
+
+    k::kv_gather_q4_step(d_k_q4, d_v_q4, d_table, d_ids, d_step, max_ids, s, d_k_scratch, d_v_scratch, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "kv_gather_q4_step");
+
+    std::vector<uint16_t> h_k_scratch((size_t) max_ids * H * D);
+    std::vector<uint16_t> h_v_scratch((size_t) max_ids * H * D);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_k_scratch.data(), d_k_scratch,
+                                    h_k_scratch.size() * sizeof(uint16_t))
+                            .wait()),
+       "memcpy d2h k_scratch");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_v_scratch.data(), d_v_scratch,
+                                    h_v_scratch.size() * sizeof(uint16_t))
+                            .wait()),
+       "memcpy d2h v_scratch");
+
+    double worst_quant_err = 0.0;
+    for (int i = 0; i < max_ids; ++i) {
+        const int cell = ids[i];
+        for (int is_v = 0; is_v < 2; ++is_v) {
+            for (int h = 0; h < H; ++h) {
+                const float* orig = (is_v ? host_v[cell].data() : host_k[cell].data()) + h * D;
+                const uint16_t* gathered = (is_v ? h_v_scratch.data() : h_k_scratch.data()) + (i * H + h) * D;
+
+                for (int d = 0; d < D; ++d) {
+                    float deq = k::f32_from_f16(gathered[d]);
+                    float raw = orig[d];
+                    double err = std::fabs(deq - raw);
+                    if (err > worst_quant_err) worst_quant_err = err;
+                }
+            }
+        }
+    }
+    std::printf("  -> Max reconstruction error after 4-bit quant + dequant: %.4f (OK)\n", worst_quant_err);
+
+    sycl::free(d_src, dpct::get_in_order_queue());
+    sycl::free(d_dst, dpct::get_in_order_queue());
+    sycl::free(d_table, dpct::get_in_order_queue());
+    sycl::free(d_k_q4, dpct::get_in_order_queue());
+    sycl::free(d_v_q4, dpct::get_in_order_queue());
+    sycl::free(d_kcur, dpct::get_in_order_queue());
+    sycl::free(d_vcur, dpct::get_in_order_queue());
+    sycl::free(d_step, dpct::get_in_order_queue());
+    sycl::free(d_ids, dpct::get_in_order_queue());
+    sycl::free(d_k_scratch, dpct::get_in_order_queue());
+    sycl::free(d_v_scratch, dpct::get_in_order_queue());
+
+    if (g_fail == 0) {
+        std::printf("=== kv_q4_parity: ALL TESTS PASSED SUCCESSFULLY! ===\n");
+        return 0;
+    } else {
+        std::fprintf(stderr, "=== kv_q4_parity: FAILED (%d failures) ===\n", g_fail);
+        return 1;
+    }
+}
diff --git a/sycl/src/kernels/kv_q8_parity.cpp b/sycl/src/kernels/kv_q8_parity.cpp
new file mode 100644
index 00000000000..4d6e117777f
--- /dev/null
+++ b/sycl/src/kernels/kv_q8_parity.cpp
@@ -0,0 +1,230 @@
+// src/kernels/kv_q8_parity.cpp - plan v0.3 P7: INT8 KV append/gather against a host reference (GPU, no model).
+//
+// Appends random K/V cells at scattered positions through a non-identity page table into both the INT8 pools
+// (kv_append_q8_step) and the FP16 pools (kv_append_step), gathers random cell sets from both, and checks:
+//   1. INT8 codes and FP16 scales are BITWISE equal to the host reference (same f16_from_f32 rounding);
+//   2. the INT8 gather is BITWISE equal to the host dequantization of those codes;
+//   3. against the FP16 path, the INT8 values differ by at most half a quantization step of their group plus the
+//      fp16 rounding of both sides (0.624 steps).
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/qsa.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+int g_fail = 0;
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009:423: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T>
+T *dalloc(size_t n) {
+    T *p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 64, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+       "memset");
+    return p;
+}
+}  // namespace
+
+int main() {
+    k::QsaShapes s = k::qsa_real_shapes();
+    s.page_size = 64;                                                              // several pages in a small pool
+    const int H = (int) s.n_head_kv, D = (int) s.head_dim, P = (int) s.page_size, G = D / k::KV_Q8_GROUP;
+    const int pages = 8, cells = pages * P;
+    std::mt19937 rng(17);
+    std::vector<int32_t> table(pages);
+    for (int i = 0; i < pages; ++i) table[i] = (i * 5 + 3) % pages;            // a non-identity permutation
+    int32_t* d_table = dalloc<int32_t>(pages);
+    /*
+    DPCT1114:424: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4)),
+       "table");
+    int8_t *kq = dalloc<int8_t>((size_t) cells * H * D), *vq = dalloc<int8_t>((size_t) cells * H * D);
+    uint16_t *ks = dalloc<uint16_t>((size_t) cells * H * G), *vs = dalloc<uint16_t>((size_t) cells * H * G);
+    uint16_t *kp = dalloc<uint16_t>((size_t) cells * H * D), *vp = dalloc<uint16_t>((size_t) cells * H * D);
+    float *kcur = dalloc<float>(H * D), *vcur = dalloc<float>(H * D);
+    int32_t* step = dalloc<int32_t>(k::kStepCount);
+    std::vector<std::vector<float>> hk(cells), hv(cells);
+    std::normal_distribution<float> nd(0.f, 1.f);
+    std::vector<int> positions(cells);
+    for (int i = 0; i < cells; ++i) positions[i] = i;
+    std::shuffle(positions.begin(), positions.end(), rng);
+    const int n_fill = cells - 37;                                                  // leave some cells empty
+    for (int n = 0; n < n_fill; ++n) {
+        const int pos = positions[n];
+        std::vector<float> kv(H * D), vv(H * D);
+        const float scale = (n % 7 == 0) ? 1e-3f : (n % 11 == 0 ? 40.f : 1.f);    // small and large groups
+        for (auto& x : kv) x = nd(rng) * scale;
+        for (auto& x : vv) x = nd(rng) * scale;
+        if (n % 13 == 0) std::fill(kv.begin(), kv.begin() + 64, 0.f);              // an all-zero group
+        hk[pos] = kv; hv[pos] = vv;
+        int32_t hstep[k::kStepCount] = {pos, pos + 1, 0, 0};
+        /*
+        DPCT1114:425: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep)),
+           "step");
+        /*
+        DPCT1114:426: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(kcur, kv.data(),
+                                                              kv.size() * 4)),
+           "k");
+        /*
+        DPCT1114:427: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(vcur, vv.data(),
+                                                              vv.size() * 4)),
+           "v");
+        k::kv_append_q8_step(kq, vq, ks, vs, d_table, step, kcur, vcur, s, nullptr);
+        k::kv_append_step(kp, vp, d_table, step, kcur, vcur, s, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "append");
+    }
+    // 1. codes and scales bitwise vs the host reference
+    std::vector<int8_t> hkq((size_t) cells * H * D), hvq(hkq.size());
+    std::vector<uint16_t> hks((size_t) cells * H * G), hvs(hks.size());
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hkq.data(), kq, hkq.size())
+                            .wait()),
+       "d2h");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hvq.data(), vq, hvq.size())
+                            .wait()),
+       "d2h");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hks.data(), ks, hks.size() * 2)
+                            .wait()),
+       "d2h");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hvs.data(), vs, hvs.size() * 2)
+                            .wait()),
+       "d2h");
+    long bad_codes = 0;
+    for (int n = 0; n < n_fill; ++n) {
+        const int pos = positions[n];
+        for (int kvsel = 0; kvsel < 2; ++kvsel)
+            for (int h = 0; h < H; ++h)
+                for (int g = 0; g < G; ++g) {
+                    const float* x = (kvsel ? hv[pos] : hk[pos]).data() + h * D + g * 64;
+                    float amax = 0.f;
+                    for (int t = 0; t < 64; ++t) amax = std::fmax(amax, std::fabs(x[t]));
+                    const uint16_t sb = k::f16_from_f32(amax / 127.0f);
+                    const float sf = k::f32_from_f16(sb);
+                    const long long row = ((long long) table[pos / P] * H + h) * P + pos % P;
+                    if ((kvsel ? hvs : hks)[row * G + g] != sb) ++bad_codes;
+                    for (int t = 0; t < 64; ++t) {
+                        int q = sf > 0.f ? (int) std::nearbyint(x[t] / sf) : 0;
+                        q = std::clamp(q, -127, 127);
+                        if ((kvsel ? hvq : hkq)[row * D + g * 64 + t] != (int8_t) q) ++bad_codes;
+                    }
+                }
+    }
+    if (bad_codes) { std::fprintf(stderr, "FAIL: %ld codes/scales differ from the host reference\n", bad_codes); ++g_fail; }
+    // 2 + 3. gather random selections from both paths
+    const int max_ids = 200;
+    int32_t* d_ids = dalloc<int32_t>(max_ids);
+    uint16_t *k8 = dalloc<uint16_t>((size_t) max_ids * H * D), *v8 = dalloc<uint16_t>((size_t) max_ids * H * D);
+    uint16_t *k16 = dalloc<uint16_t>((size_t) max_ids * H * D), *v16 = dalloc<uint16_t>((size_t) max_ids * H * D);
+    double worst = 0.0;
+    for (int trial = 0; trial < 20; ++trial) {
+        const int n_ids = 1 + (int) (rng() % max_ids);
+        std::vector<int32_t> ids(n_ids);
+        for (auto& id : ids) id = positions[rng() % n_fill];
+        /*
+        DPCT1114:428: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(d_ids, ids.data(), n_ids * 4)),
+           "ids");
+        int32_t hstep[k::kStepCount] = {0, 0, 0, n_ids};
+        /*
+        DPCT1114:429: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep)),
+           "step");
+        k::kv_gather_q8_step(kq, vq, ks, vs, d_table, d_ids, step, max_ids, s, k8, v8, nullptr);
+        k::kv_gather_step(kp, vp, d_table, d_ids, step, max_ids, s, k16, v16, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "gather");
+        std::vector<uint16_t> a8((size_t) n_ids * H * D), b8(a8.size()), a16(a8.size()), b16(a8.size());
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(a8.data(), k8, a8.size() * 2)
+                                .wait()),
+           "d2h");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(b8.data(), v8, b8.size() * 2)
+                                .wait()),
+           "d2h");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(a16.data(), k16, a16.size() * 2)
+                                .wait()),
+           "d2h");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(b16.data(), v16, b16.size() * 2)
+                                .wait()),
+           "d2h");
+        for (int j = 0; j < n_ids; ++j)
+            for (int h = 0; h < H; ++h) {
+                const long long row = ((long long) table[ids[j] / P] * H + h) * P + ids[j] % P;
+                for (int d = 0; d < D; ++d) {
+                    const size_t o = ((size_t) j * H + h) * D + d;
+                    for (int kvsel = 0; kvsel < 2; ++kvsel) {
+                        const float sf = k::f32_from_f16((kvsel ? hvs : hks)[row * G + d / 64]);
+                        const int8_t q = (kvsel ? hvq : hkq)[row * D + d];
+                        const uint16_t want = k::f16_from_f32((float) q * sf);
+                        const uint16_t got = (kvsel ? b8 : a8)[o];
+                        if (got != want) { if (g_fail < 5) std::fprintf(stderr, "FAIL: gather id %d h %d d %d\n", j, h, d); ++g_fail; }
+                        const float ref = k::f32_from_f16((kvsel ? b16 : a16)[o]);
+                        const double err = std::fabs(k::f32_from_f16(got) - ref) / (sf > 0 ? sf : 1.0);
+                        worst = std::max(worst, err);
+                    }
+                }
+            }
+    }
+    // |x - q*sf| <= sf/2 (the stored scale keeps |x|/sf <= 127.06, so no clamping), plus the fp16 rounding of each
+    // side: at most 2^-11 relative of a value up to 127*sf, i.e. 127/2048 = 0.062 steps each -> 0.5 + 0.124
+    if (!(worst <= 0.5 + 2.0 * 127.0 / 2048.0 + 1e-3)) { std::fprintf(stderr, "FAIL: INT8 vs FP16 error %.3f steps\n", worst); ++g_fail; }
+    std::printf("kv_q8_parity: %s (worst INT8-vs-FP16 error %.3f quantization steps)\n", g_fail ? "FAILED" : "OK", worst);
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/kernels/kv_stream_parity.cpp b/sycl/src/kernels/kv_stream_parity.cpp
new file mode 100644
index 00000000000..81c19f08abe
--- /dev/null
+++ b/sycl/src/kernels/kv_stream_parity.cpp
@@ -0,0 +1,344 @@
+// src/kernels/kv_stream_parity.cpp - KV streaming (kv_stream.hpp) against a fully resident pool (GPU, no model).
+//
+// Decodes a synthetic sequence twice: into a fully resident pool with the identity page table, and into a streamed
+// layer (host copy + a small VRAM slot pool that must evict constantly). Every few cells a batch of 1-8 queries
+// with selections shaped like the indexer's (whole 4-cell blocks, a partial threshold block, the tail block, half of
+// them recent) is attended in both; `kv_stream_resolve` runs before the streamed attention. Checks:
+//   1. the attention outputs are BITWISE equal (the streamed readers see exactly the resident values);
+//   2. the residency map is consistent after every call (slot_block and page_table invert each other);
+//   3. no call overflowed, and the hit/miss counters add up;
+//   4. a ring (the MTP drafter's layout) restored from the host copy reads the same values as the resident pool.
+// INT8, FP16 and Q4_0 (PR #21) pools.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/kv_stream.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+
+#include <algorithm>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <set>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+int g_fail = 0;
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009:886: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T> T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 64, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+       "memset");
+    return p;
+}
+template <typename T> T* halloc(size_t n) {   // pinned, mapped; returns the device pointer
+    void* h = nullptr;
+    void* d = nullptr;
+    /*
+    DPCT1048:13: The original value cudaHostAllocMapped is not meaningful in the
+    migrated code and was removed or replaced with 0. You may need to check the
+    migrated code.
+    */
+    ck(DPCT_CHECK_ERROR(h = (void *)sycl::malloc_host(
+                            n * sizeof(T) + 64, dpct::get_in_order_queue())),
+       "hostalloc");
+    std::memset(h, 0, n * sizeof(T) + 64);
+    ck(DPCT_CHECK_ERROR(d = (void *)h), "devptr");
+    return (T*) d;
+}
+
+struct Pools {   // one K/V pool set of `pages` pages
+    k::KvHostPools p;   // reused as a plain pointer bundle
+    void alloc(int64_t pages, const k::QsaShapes& s, int fmt, bool host) {
+        const size_t rows = (size_t) pages * s.n_head_kv * s.page_size;
+        if (fmt == k::kKvQ4) {
+            const size_t b = rows * k::kv_q4_bytes_per_head((int) s.head_dim);
+            p.k_q4 = host ? halloc<uint8_t>(b) : dalloc<uint8_t>(b);
+            p.v_q4 = host ? halloc<uint8_t>(b) : dalloc<uint8_t>(b);
+        } else if (fmt == k::kKvInt8) {
+            p.k_q = host ? halloc<int8_t>(rows * s.head_dim) : dalloc<int8_t>(rows * s.head_dim);
+            p.v_q = host ? halloc<int8_t>(rows * s.head_dim) : dalloc<int8_t>(rows * s.head_dim);
+            p.k_scale = host ? halloc<uint16_t>(rows * 4) : dalloc<uint16_t>(rows * 4);
+            p.v_scale = host ? halloc<uint16_t>(rows * 4) : dalloc<uint16_t>(rows * 4);
+        } else {
+            p.k_pool = host ? halloc<uint16_t>(rows * s.head_dim) : dalloc<uint16_t>(rows * s.head_dim);
+            p.v_pool = host ? halloc<uint16_t>(rows * s.head_dim) : dalloc<uint16_t>(rows * s.head_dim);
+        }
+    }
+    k::QsaAttnPools attn(const int32_t* table) const {
+        k::QsaAttnPools a;
+        a.k_pool = p.k_pool; a.v_pool = p.v_pool; a.k_q = p.k_q; a.v_q = p.v_q; a.k_scale = p.k_scale;
+        a.v_scale = p.v_scale; a.k_q4 = p.k_q4; a.v_q4 = p.v_q4; a.page_table = table;
+        return a;
+    }
+};
+
+void append(const Pools& pl, const int32_t* table, const int32_t* step, const float* kc, const float* vc,
+            const k::QsaShapes& s, int fmt, const k::KvHostPools* host) {
+    if (fmt == k::kKvQ4) k::kv_append_q4_step(pl.p.k_q4, pl.p.v_q4, table, step, kc, vc, s, nullptr, host);
+    else if (fmt == k::kKvInt8) k::kv_append_q8_step(pl.p.k_q, pl.p.v_q, pl.p.k_scale, pl.p.v_scale, table, step, kc, vc, s, nullptr, host);
+    else k::kv_append_step(pl.p.k_pool, pl.p.v_pool, table, step, kc, vc, s, nullptr, host);
+}
+
+// A selection like qsa_block_topk's: ascending cells, whole blocks, the tail block's cells, and one partial block.
+std::vector<int32_t> selection(int64_t n_kv, int64_t width, std::mt19937& rng) {
+    std::vector<int32_t> ids;
+    if (n_kv <= width) {
+        for (int64_t c = 0; c < n_kv; ++c) ids.push_back((int32_t) c);
+        return ids;
+    }
+    const int64_t n_bid = n_kv / 4, tail = n_kv - n_bid * 4;
+    std::set<int64_t> blocks;
+    const int64_t want_full = (width - tail) / 4, part = (width - tail) % 4;
+    std::uniform_int_distribution<int64_t> any(0, n_bid - 1), recent(std::max<int64_t>(0, n_bid - 2048), n_bid - 1);
+    while ((int64_t) blocks.size() < want_full + (part ? 1 : 0)) blocks.insert(rng() % 2 ? recent(rng) : any(rng));
+    int64_t partial_block = part ? *std::next(blocks.begin(), (long) (rng() % blocks.size())) : -1;
+    for (int64_t b : blocks) {
+        const int64_t take = b == partial_block ? part : 4;
+        for (int64_t i = 0; i < take; ++i) ids.push_back((int32_t) (b * 4 + i));
+    }
+    for (int64_t c = n_bid * 4; c < n_kv; ++c) ids.push_back((int32_t) c);
+    std::sort(ids.begin(), ids.end());
+    return ids;
+}
+
+bool run(int fmt) {
+    const char* name = fmt == k::kKvQ4 ? "q4_0" : fmt == k::kKvInt8 ? "int8" : "fp16";
+    k::QsaShapes s = k::qsa_real_shapes();
+    const int64_t N = 40000, n_blocks = (N + 3) / 4, n_slots = 8 * 516 + 700;   // must evict: slots < blocks
+    const int64_t cap = k::qsa_selection_width(k::kTopkMaxCells, s), NQ = 8;
+    const int64_t H = s.n_head_kv, D = s.head_dim, NH = s.n_head;
+    std::mt19937 rng(7 + 4 * fmt);
+    std::normal_distribution<float> nd(0.f, 1.f);
+
+    Pools ref, slots, host;
+    ref.alloc(n_blocks, s, fmt, false);
+    slots.alloc(n_slots, s, fmt, false);
+    host.alloc(n_blocks, s, fmt, true);
+    int32_t* ident = dalloc<int32_t>(n_blocks);
+    {
+        std::vector<int32_t> t(n_blocks);
+        for (int64_t i = 0; i < n_blocks; ++i) t[i] = (int32_t) i;
+        /*
+        DPCT1114:887: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ident, t.data(),
+                                                              n_blocks * 4)),
+           "ident");
+    }
+    k::KvStreamMap m;
+    m.page_table = dalloc<int32_t>(n_blocks);
+    m.slot_block = dalloc<int32_t>(n_slots); m.slot_stamp = dalloc<int32_t>(n_slots); m.slot_ref = dalloc<int32_t>(n_slots);
+    m.miss_block = dalloc<int32_t>(n_slots); m.miss_slot = dalloc<int32_t>(n_slots);
+    m.ctl = dalloc<int32_t>(k::kKvCtlInts);
+    m.n_blocks = n_blocks; m.n_slots = n_slots;
+    k::kv_stream_reset(m, nullptr);
+
+    float* kc = dalloc<float>(H * D);
+    float* vc = dalloc<float>(H * D);
+    int32_t* step = dalloc<int32_t>(k::kStepCount);
+    int32_t* steps = dalloc<int32_t>(NQ * k::kStepCount);
+    int32_t* ids = dalloc<int32_t>(NQ * cap);
+    float* q = dalloc<float>(NQ * NH * D);
+    const uint64_t scr = k::qsa_decode_attn_scratch_floats(cap, s);
+    float* scratch = dalloc<float>(NQ * scr);
+    float* out_ref = dalloc<float>(NQ * NH * D);
+    float* out_str = dalloc<float>(NQ * NH * D);
+    std::vector<float> hk(H * D), hv(H * D), hq(NQ * NH * D), a((size_t) NQ * NH * D), b2((size_t) NQ * NH * D);
+    std::vector<int32_t> pt(n_blocks), sb(n_slots);
+
+    int batches = 0, bad = 0;
+    for (int64_t pos = 0; pos < N; ++pos) {
+        for (auto& x : hk) x = nd(rng) * ((pos % 17 == 0) ? 30.f : 1.f);
+        for (auto& x : hv) x = nd(rng);
+        const int32_t st[4] = {(int32_t) pos, (int32_t) (pos + 1), (int32_t) ((pos + 1) / 4), 0};
+        /*
+        DPCT1114:888: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(kc, hk.data(), hk.size() * 4)),
+           "k");
+        /*
+        DPCT1114:889: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(vc, hv.data(), hv.size() * 4)),
+           "v");
+        /*
+        DPCT1114:890: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(step, st, sizeof(st))),
+           "step");
+        append(ref, ident, step, kc, vc, s, fmt, nullptr);
+        append(slots, m.page_table, step, kc, vc, s, fmt, &host.p);
+        if (pos % 131 != 130 && pos != N - 1) continue;
+        // a batch: n_q queries at the last n_q positions (as a verify window), each with its own selection
+        const int n_q = 1 + (int) (rng() % NQ);
+        std::vector<int32_t> hids((size_t) NQ * cap, 0), hst(NQ * 4, 0);
+        for (int t = 0; t < n_q; ++t) {
+            const int64_t p = std::max<int64_t>(0, pos - (n_q - 1 - t)), n_kv = p + 1;
+            const int64_t width = std::min<int64_t>(n_kv, cap);
+            const std::vector<int32_t> sel = selection(n_kv, width, rng);
+            if ((int64_t) sel.size() != width) { std::fprintf(stderr, "selection size %zu != %lld\n", sel.size(), (long long) width); return false; }
+            std::copy(sel.begin(), sel.end(), hids.begin() + (size_t) t * cap);
+            hst[t * 4 + 0] = (int32_t) p; hst[t * 4 + 1] = (int32_t) n_kv; hst[t * 4 + 2] = (int32_t) (n_kv / 4);
+            hst[t * 4 + 3] = (int32_t) width;
+        }
+        for (auto& x : hq) x = nd(rng);
+        /*
+        DPCT1114:891: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
+                                                              hids.size() * 4)),
+           "ids");
+        /*
+        DPCT1114:892: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(steps, hst.data(),
+                                                              hst.size() * 4)),
+           "steps");
+        /*
+        DPCT1114:893: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(q, hq.data(), hq.size() * 4)),
+           "q");
+        k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, n_q, nullptr);
+        k::kv_stream_resolve(m, slots.attn(m.page_table), host.p, fmt, ids, steps, n_q, cap, s, nullptr);
+        k::qsa_decode_attn_batch(q, slots.attn(m.page_table), ids, steps, cap, s, scratch, out_str, n_q, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "batch");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(a.data(), out_ref, (size_t)n_q * NH * D * 4)
+                   .wait()),
+           "a");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(b2.data(), out_str, (size_t)n_q * NH * D * 4)
+                   .wait()),
+           "b");
+        if (std::memcmp(a.data(), b2.data(), (size_t) n_q * NH * D * 4) != 0) {
+            if (bad++ < 5) std::fprintf(stderr, "  %s pos %lld n_q %d: streamed attention differs\n", name, (long long) pos, n_q);
+        }
+        // the map inverts itself
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(pt.data(), m.page_table, n_blocks * 4)
+                                .wait()),
+           "pt");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(sb.data(), m.slot_block, n_slots * 4)
+                                .wait()),
+           "sb");
+        int64_t resident = 0;
+        for (int64_t bk = 0; bk < n_blocks; ++bk) {
+            if (pt[bk] < -1 || pt[bk] >= n_slots || (pt[bk] >= 0 && sb[pt[bk]] != bk)) {
+                if (bad++ < 5) std::fprintf(stderr, "  map broken at block %lld (table %d)\n", (long long) bk, pt[bk]);
+                break;
+            }
+            resident += pt[bk] >= 0;
+        }
+        for (int64_t sl = 0; sl < n_slots; ++sl)
+            if (sb[sl] >= 0 && pt[sb[sl]] != sl) { if (bad++ < 5) std::fprintf(stderr, "  slot %lld not in the table\n", (long long) sl); break; }
+        ++batches;
+    }
+    const k::KvStreamCounters c = k::kv_stream_counters(m);
+    std::printf("  %s: %d batches, %llu block lookups, %llu misses (%.1f%% hit), overflow %d, %d failures\n",
+                name, batches, (unsigned long long) c.lookups, (unsigned long long) c.misses,
+                c.lookups ? 100.0 * (double) (c.lookups - c.misses) / (double) c.lookups : 0.0, (int) c.overflow, bad);
+    if (c.overflow || c.calls != (uint64_t) batches || c.misses == 0 || c.misses >= c.lookups) ++bad;
+
+    // 4. a ring over the same host copy: blocks [b1 - R, b1) restored, read through `b % R`
+    {
+        const int64_t R = 1500, b1 = n_blocks, b0 = b1 - R;
+        Pools ring;
+        ring.alloc(R, s, fmt, false);
+        int32_t* rt = dalloc<int32_t>(n_blocks);
+        k::kv_ring_table(rt, n_blocks, R, nullptr);
+        k::kv_ring_restore(ring.attn(rt), host.p, fmt, b0, b1, R, s, nullptr);
+        const int64_t width = cap;
+        std::vector<int32_t> hids((size_t) cap), hst = {(int32_t) (N - 1), (int32_t) N, (int32_t) (N / 4), (int32_t) width};
+        for (int64_t i = 0; i < width; ++i) hids[i] = (int32_t) (N - width + i);   // the window's last cells
+        /*
+        DPCT1114:894: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
+                                                              hids.size() * 4)),
+           "ids");
+        /*
+        DPCT1114:895: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(steps, hst.data(), 16)),
+           "steps");
+        k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, 1, nullptr);
+        k::qsa_decode_attn_batch(q, ring.attn(rt), ids, steps, cap, s, scratch, out_str, 1, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "ring");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(a.data(), out_ref, (size_t)NH * D * 4)
+                                .wait()),
+           "a");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(b2.data(), out_str, (size_t)NH * D * 4)
+                                .wait()),
+           "b");
+        const bool ok = std::memcmp(a.data(), b2.data(), (size_t) NH * D * 4) == 0;
+        std::printf("  %s ring restore: %s\n", name, ok ? "identical" : "DIFFERS");
+        if (!ok) ++bad;
+    }
+    return bad == 0;
+}
+}  // namespace
+
+int main() {
+    std::printf("kv_stream_parity: streamed vs resident KV, bitwise\n");
+    const bool a = run(k::kKvInt8), b = run(k::kKvF16), c = run(k::kKvQ4);
+    if (!a || !b || !c) ++g_fail;
+    std::printf(g_fail ? "FAIL\n" : "PASS\n");
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/kernels/native_expert_parity.cpp b/sycl/src/kernels/native_expert_parity.cpp
new file mode 100644
index 00000000000..ac6b6f786ee
--- /dev/null
+++ b/sycl/src/kernels/native_expert_parity.cpp
@@ -0,0 +1,262 @@
+// src/kernels/native_expert_parity.cpp - plan v0.3 P6: one native expert three ways, on real GGUF rows.
+//
+//     build/native_expert_parity <shard1.gguf> [layer ...]
+//
+// (a) float reference: ggml's own dequantizer (`to_float`) and a float SwiGLU expert, (b) the CPU path
+// (ggml-cpu vec_dot with its quantized activations), (c) the GPU path (`native_expert_grouped`, q8_1
+// activations).  (b) and (c) each differ from (a) by their activation rounding only (a few 1e-3 relative).
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/cpu/native_expert.hpp"
+#include "strata/kernels/cpu/expert.hpp"
+#include "strata/kernels/cpu/iq_avx512.hpp"
+#include "strata/kernels/cpu/iq_avx2.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "ggml-cpu.h"
+#include "strata/kernels/iq_kernels.hpp"
+
+#include "ggml.h"
+
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace cpu = strata::kernels::cpu;
+
+static double rel(const std::vector<float>& a, const std::vector<float>& b) {
+    double n = 0, d = 0;
+    for (size_t i = 0; i < a.size(); ++i) { n += std::fabs((double) a[i] - b[i]); d += std::fabs((double) b[i]); }
+    return n / (d + 1e-30);
+}
+
+int main(int argc, char** argv) {
+    setvbuf(stdout, nullptr, _IONBF, 0);   // keep the trail on a crash
+    if (argc < 2) { std::fprintf(stderr, "usage: native_expert_parity <shard1.gguf> [layer ...]\n"); return 2; }
+    strata::GgufFile gguf(argv[1]);
+    std::vector<int> layers;
+    for (int i = 2; i < argc; ++i) layers.push_back(std::atoi(argv[i]));
+    if (layers.empty()) layers = {0, 1, 2, 3, 20, 47};
+    const int NT = 3, E = 7;
+    const int64_t H = 2560, FF = 640;
+    int failures = 0;
+    dpct::queue_ptr s;
+    s = dpct::get_current_device().create_queue(true);
+    for (int l : layers) {
+        const strata::TensorInfo* t[3] = {};
+        const char* roles[3] = {"gate", "up", "down"};
+        for (const auto& ti : gguf.tensors())
+            for (int r = 0; r < 3; ++r)
+                if (ti.name == "blk." + std::to_string(l) + ".ffn_" + roles[r] + "_exps.weight") t[r] = &ti;
+        if (!t[0] || !t[1] || !t[2]) { std::printf("layer %d: no expert tensors\n", l); ++failures; continue; }
+        cpu::NativeFmt f;
+        std::string err;
+        if (!cpu::native_fmt((int) t[0]->type, (int) t[2]->type, H, FF, f, err)) {
+            std::printf("layer %d: %s\n", l, err.c_str()); ++failures; continue;
+        }
+        std::vector<uint8_t> blob(f.bytes);
+        std::memcpy(blob.data(), gguf.tensor_data(*t[0]) + (size_t) E * f.up_off, f.up_off);
+        std::memcpy(blob.data() + f.up_off, gguf.tensor_data(*t[1]) + (size_t) E * f.up_off, f.up_off);
+        std::memcpy(blob.data() + f.down_off, gguf.tensor_data(*t[2]) + (size_t) E * (f.bytes - f.down_off),
+                    f.bytes - f.down_off);
+        // (a) the float reference
+        const auto* tg = ggml_get_type_traits((ggml_type) f.gu_type);
+        const auto* td = ggml_get_type_traits((ggml_type) f.d_type);
+        std::vector<float> G((size_t) FF * H), U((size_t) FF * H), D((size_t) H * FF);
+        for (int64_t r = 0; r < FF; ++r) {
+            tg->to_float(blob.data() + r * f.gu_row, G.data() + r * H, H);
+            tg->to_float(blob.data() + f.up_off + r * f.gu_row, U.data() + r * H, H);
+        }
+        for (int64_t r = 0; r < H; ++r) td->to_float(blob.data() + f.down_off + r * f.d_row, D.data() + r * FF, FF);
+        std::mt19937 rng(11 + l);
+        std::normal_distribution<float> nd(0.f, 1.f);
+        std::vector<float> x((size_t) NT * H);
+        for (auto& v : x) v = nd(rng);
+        std::vector<float> ref((size_t) NT * H), got_c((size_t) NT * H), got_g((size_t) NT * H);
+        for (int k = 0; k < NT; ++k) {
+            std::vector<float> h(FF);
+            for (int64_t r = 0; r < FF; ++r) {
+                double g = 0, u = 0;
+                for (int64_t i = 0; i < H; ++i) { g += (double) G[r * H + i] * x[k * H + i]; u += (double) U[r * H + i] * x[k * H + i]; }
+                h[r] = (float) (g / (1.0 + std::exp(-g)) * u);
+            }
+            for (int64_t r = 0; r < H; ++r) {
+                double o = 0;
+                for (int64_t i = 0; i < FF; ++i) o += (double) D[r * FF + i] * h[i];
+                ref[k * H + r] = (float) o;
+            }
+        }
+        // (b) the CPU
+        {
+            std::vector<std::vector<uint8_t>> act(NT, std::vector<uint8_t>(cpu::kNativeActBytes));
+            std::vector<std::vector<uint8_t>> hq(NT, std::vector<uint8_t>(cpu::kNativeHBytes));
+            std::vector<std::vector<float>> ff(NT, std::vector<float>(FF));
+            const void* a[NT];
+            float* ffp[NT];
+            const void* hp[NT];
+            float* op[NT];
+            for (int k = 0; k < NT; ++k) {
+                cpu::native_quant_act(f, x.data() + k * H, act[k].data());
+                a[k] = act[k].data();
+                ffp[k] = ff[k].data();
+            }
+            cpu::native_gu_rows(f, blob.data(), a, NT, ffp, 0, (int) FF);
+            if (cpu::iq512_supported(f.gu_type)) {
+                // ggml's own vec_dot, same Q8_K activations: the reference for both multi-token kernels
+                // (float-order differences only)
+                const auto* tc = ggml_get_type_traits_cpu((ggml_type) f.gu_type);
+                std::vector<float> gref((size_t) NT * FF);
+                for (int k = 0; k < NT; ++k)
+                    for (int64_t r = 0; r < FF; ++r)
+                        tc->vec_dot((int) H, &gref[k * FF + r], 0, blob.data() + r * f.gu_row, 0, a[k], 0, 1);
+                double usg = 0.0;
+                {   // ggml single-token throughput, the weights cache-resident (compute bound)
+                    const int it = 50;
+                    auto t0 = std::chrono::steady_clock::now();
+                    for (int i = 0; i < it; ++i)
+                        for (int64_t r = 0; r < FF; ++r) {
+                            float gg, uu;
+                            tc->vec_dot((int) H, &gg, 0, blob.data() + r * f.gu_row, 0, a[0], 0, 1);
+                            tc->vec_dot((int) H, &uu, 0, blob.data() + f.up_off + r * f.gu_row, 0, a[0], 0, 1);
+                        }
+                    auto t1 = std::chrono::steady_clock::now();
+                    usg = std::chrono::duration<double, std::micro>(t1 - t0).count() / it;
+                }
+                // one multi-token kernel: parity against ggml's vec_dot, then one-token and NT-token throughput
+                auto check = [&](const char* tag, bool is512) {
+                    std::vector<float> g((size_t) NT * FF);
+                    float* gp[NT];
+                    for (int k = 0; k < NT; ++k) gp[k] = g.data() + k * FF;
+                    (is512 ? cpu::iq512_rows : cpu::iq256_rows)(f.gu_type, blob.data(), f.gu_row, (int) H, a, NT, gp, 0, (int) FF);
+                    const double rg = rel(g, gref);
+                    std::printf("          %s %s gate rows vs ggml vec_dot: rel %.2e\n",
+                                ggml_type_name((ggml_type) f.gu_type), tag, rg);
+                    if (rg > 1e-5) {   // ggml's own vec_dot is the reference: above 1e-5 it is a real mismatch,
+                        std::printf("          %s %s gate rows MISMATCH (rel %.2e > 1e-5)\n",
+                                    ggml_type_name((ggml_type) f.gu_type), tag, rg);   // not rounding (measured 3e-8)
+                        ++failures;
+                    }
+                    float* f1[1] = {ffp[0]};
+                    const int it = 50;
+                    const auto gu = is512 ? cpu::iq512_gu_rows : cpu::iq256_gu_rows;
+                    auto t0 = std::chrono::steady_clock::now();
+                    for (int i = 0; i < it; ++i) gu(f.gu_type, blob.data(), f.gu_row, f.up_off, (int) H, a, 1, f1, 0, (int) FF);
+                    auto t1 = std::chrono::steady_clock::now();
+                    for (int i = 0; i < it; ++i) gu(f.gu_type, blob.data(), f.gu_row, f.up_off, (int) H, a, NT, ffp, 0, (int) FF);
+                    auto t2 = std::chrono::steady_clock::now();
+                    const double us1 = std::chrono::duration<double, std::micro>(t1 - t0).count() / it;
+                    const double usn = std::chrono::duration<double, std::micro>(t2 - t1).count() / it;
+                    std::printf("          gate+up one token one thread: %s %.0f us (%.2f GB/s), ggml %.0f us (%.2f GB/s)\n",
+                                tag, us1, 2.0 * f.up_off / us1 / 1e3, usg, 2.0 * f.up_off / usg / 1e3);
+                    std::printf("          gate+up %d tokens one thread: %s %.0f us vs ggml %d x %.0f us\n", NT, tag, usn, NT, usg);
+                };
+                if (cpu::cpu_avx512_ok()) check("avx512", true);   // guarded: the binary runs on AVX-2 CPUs too
+                check("avx2", false);
+            }
+            for (int k = 0; k < NT; ++k) {
+                cpu::native_quant_h(f, ff[k].data(), hq[k].data());
+                hp[k] = hq[k].data();
+                op[k] = got_c.data() + k * H;
+            }
+            cpu::native_down_rows(f, blob.data(), hp, NT, op, 0, (int) H);
+            if (f.d_type == 42) {
+                // (b2) the GGUF-layout Q2_0 kernel the pool uses for Q2_0 down projections - the AVX-512 one
+                // where the CPU has it, the AVX-2 one (q2_avx2.cpp) where it does not.  Calling the AVX-512
+                // kernel unconditionally faults on a Zen 2/3 CPU.
+                std::vector<cpu::ActQ> a2(NT);
+                const cpu::ActQ* ap[NT];
+                std::vector<float> alt((size_t) NT * H);
+                float* altp[NT];
+                for (int k = 0; k < NT; ++k) {
+                    cpu::act_quant_any(ff[k].data(), (int) FF, a2[k]);   // gated: AVX-512 or AVX-2 per CPU
+                    ap[k] = &a2[k];
+                    altp[k] = alt.data() + k * H;
+                }
+                cpu::q2_rows_any(blob.data() + f.down_off, f.d_row, (int) (FF / 64), ap, NT, altp, 0, (int) H);
+                std::printf("          q2_0 %s down vs ggml down: rel %.2e\n",
+                            cpu::cpu_avx512_ok() ? "AVX-512" : "AVX-2", rel(alt, got_c));
+            }
+            if (f.d_type == 20) {
+                // (b3) the IQ4_NL multi-token AVX-2 kernel the pool now uses for IQ4_NL down projections,
+                // against ggml-cpu's single-token vec_dot on the SAME Q8_0 activations (h), plus timing.
+                std::vector<float> alt((size_t) NT * H), refd((size_t) NT * H);
+                float* altp[NT];
+                for (int k = 0; k < NT; ++k) altp[k] = alt.data() + k * H;
+                cpu::iq4nl256_down_rows(blob.data() + f.down_off, f.d_row, (int) FF, hp, NT, altp, 0, (int) H);
+                const auto* tdc = ggml_get_type_traits_cpu((ggml_type) f.d_type);
+                for (int k = 0; k < NT; ++k)
+                    for (int64_t r = 0; r < H; ++r)
+                        tdc->vec_dot((int) FF, refd.data() + k * H + r, 0,
+                                     blob.data() + f.down_off + (size_t) r * f.d_row, 0, hp[k], 0, 1);
+                const double rdn = rel(alt, refd);
+                std::printf("          iq4_nl AVX-2 multi-token down vs ggml down: rel %.2e\n", rdn);
+                if (rdn > 1e-5) {   // measured 1e-7; same reasoning as the gate/up rows above
+                    std::printf("          iq4_nl down MISMATCH (rel %.2e > 1e-5)\n", rdn);
+                    ++failures;
+                }
+                const int it = 50;
+                const auto t0 = std::chrono::steady_clock::now();
+                for (int i = 0; i < it; ++i)
+                    cpu::iq4nl256_down_rows(blob.data() + f.down_off, f.d_row, (int) FF, hp, NT, altp, 0, (int) H);
+                const auto t1 = std::chrono::steady_clock::now();
+                for (int i = 0; i < it; ++i)
+                    for (int k = 0; k < NT; ++k)
+                        for (int64_t r = 0; r < H; ++r)
+                            tdc->vec_dot((int) FF, refd.data() + k * H + r, 0,
+                                        blob.data() + f.down_off + (size_t) r * f.d_row, 0, hp[k], 0, 1);
+                const auto t2 = std::chrono::steady_clock::now();
+                const double usn = std::chrono::duration<double, std::micro>(t1 - t0).count() / it;
+                const double usg = std::chrono::duration<double, std::micro>(t2 - t1).count() / it;
+                std::printf("          down %d tokens one thread: avx2 %.0f us (%.2f GB/s) vs ggml %.0f us (%.2f GB/s)\n",
+                            NT, usn, (double) (f.bytes - f.down_off) / usn / 1e3, usg,
+                            (double) (f.bytes - f.down_off) / usg / 1e3);
+            }
+        }
+        // (c) the GPU: one group holding the NT entries
+        {
+            const auto L = strata::kernels::native_expert_layout(f.gu_type, f.d_type, H, FF);
+            void *dblob, *dx, *dxq, *dscr;
+            float* dout;
+            unsigned long long* dptr;
+            int32_t *dstart, *dn, *ddst, *dtok;
+            cudaMalloc(&dblob, blob.size());
+            cudaMalloc(&dx, x.size() * 4);
+            cudaMalloc(&dxq, (size_t) NT * H / 32 * 36);
+            cudaMalloc(&dscr, strata::kernels::native_expert_scratch_bytes(NT, FF));
+            cudaMalloc((void**) &dout, (size_t) NT * H * 4);
+            cudaMalloc((void**) &dptr, 8);
+            cudaMalloc((void**) &dstart, 8);
+            cudaMalloc((void**) &dn, 4);
+            cudaMalloc((void**) &ddst, NT * 4);
+            cudaMalloc((void**) &dtok, NT * 4);
+            cudaMemcpy(dblob, blob.data(), blob.size(), cudaMemcpyHostToDevice);
+            cudaMemcpy(dx, x.data(), x.size() * 4, cudaMemcpyHostToDevice);
+            const unsigned long long p = (unsigned long long) dblob;
+            const int32_t st[2] = {0, NT}, one = 1, idx[NT] = {0, 1, 2};
+            cudaMemcpy(dptr, &p, 8, cudaMemcpyHostToDevice);
+            cudaMemcpy(dstart, st, 8, cudaMemcpyHostToDevice);
+            cudaMemcpy(dn, &one, 4, cudaMemcpyHostToDevice);
+            cudaMemcpy(ddst, idx, NT * 4, cudaMemcpyHostToDevice);
+            cudaMemcpy(dtok, idx, NT * 4, cudaMemcpyHostToDevice);
+            strata::kernels::quantize_q8_1_rows((const float*) dx, NT, H, dxq, s);
+            strata::kernels::native_expert_grouped(L, dptr, dstart, dn, ddst, dtok, 1, NT, dxq, dscr, dout, s);
+            cudaStreamSynchronize(s);
+            cudaMemcpy(got_g.data(), dout, got_g.size() * 4, cudaMemcpyDeviceToHost);
+            cudaFree(dblob); cudaFree(dx); cudaFree(dxq); cudaFree(dscr); cudaFree(dout); cudaFree(dptr);
+            cudaFree(dstart); cudaFree(dn); cudaFree(ddst); cudaFree(dtok);
+        }
+        const double ec = rel(got_c, ref), eg = rel(got_g, ref), ecg = rel(got_c, got_g);
+        const bool ok = ec < 3e-2 && eg < 3e-2 && std::isfinite(ec) && std::isfinite(eg);
+        std::printf("layer %2d  %-8s/%-7s blob %8zu  cpu rel %.2e  gpu rel %.2e  cpu-gpu %.2e  %s\n", l,
+                    ggml_type_name((ggml_type) f.gu_type), ggml_type_name((ggml_type) f.d_type), f.bytes, ec, eg, ecg,
+                    ok ? "ok" : "FAIL");
+        if (!ok) ++failures;
+    }
+    std::printf("native_expert_parity: %d failures\n", failures);
+    return failures ? 1 : 0;
+}
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
new file mode 100644
index 00000000000..4f0c3c21a4a
--- /dev/null
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -0,0 +1,1569 @@
+// src/kernels/ple_parity.cpp - P2.S4's test: the n-gram hash, the IQ4_NL table read, and the PLE block.
+//
+// THREE PARTS, THREE DIFFERENT ORACLES, and none of them is this project's own code:
+//
+//   A. THE HASH against `ref/ngram.py::ngram_rows`, via `ple_oracle_vectors.inc` (generated).  The properties
+//      are asserted OBSERVABLE first - XOR vs sum, `%` vs `&`, the cut DIRECTION, the NULL sentinel - because
+//      each rival reading produces a perfectly valid index in range.
+//   B. THE TABLE against numpy reading the ORIGINAL GGUF at the offset the validated `gguf_reader` reports.
+//   C. THE BLOCK against ggml's own graph, captured in `bench/micro/ple_in.bin` / `ple_out.bin` by
+//      `ple_layer_xcheck.cpp`.  That file records EVERY intermediate (key, value, gate, gated, normalized,
+//      conv_out, result), so a mismatch can be attributed to a stage instead of guessed at - and the weights
+//      in it were checked to be the artifact's real ones before this test was written.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/ple.hpp"
+#include "strata/kernels/ngram.hpp"
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/native_mmvq.hpp"
+#include "ple_oracle_vectors.inc"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <string>
+#include <stdexcept>
+#include <vector>
+
+namespace k = strata::kernels;
+namespace o = strata::kernels::ple_oracle;
+
+namespace {
+
+void ck(dpct::err0 e, const char *what) {
+}
+
+/// TOLERANCE CHECKS MUST BE NaN-SAFE, and `x <= t` is not.
+///
+/// `x <= t` AND `x > t` are BOTH false for NaN, so a check written either way can silently pass - round 197
+/// found `shared_expert_parity` printing a perfect score for an entirely-NaN fixture because the accumulator
+/// was `if (rel > worst) worst = rel;` and NaN is never greater.  Every comparison in this file goes through
+/// `le`/`gt`, which require the value to be FINITE first, and every compared pair is counted for non-finite
+/// entries and the count printed.  A NaN fixture is then a loud failure rather than a green line.
+bool le(double x, double t) { return std::isfinite(x) && x <= t; }
+bool gt(double x, double t) { return std::isfinite(x) && x > t; }
+
+/// How many entries of `a` are not finite.  Printed next to every comparison.
+long long nonfinite(const float* a, size_t n) {
+    long long k = 0;
+    for (size_t i = 0; i < n; ++i)
+        if (!std::isfinite(a[i])) ++k;
+    return k;
+}
+
+/// Normalised L1 with the reference magnitude returned.  For the STAGE comparisons a plain |ref| denominator
+/// is right: these are dense vectors of O(1) values with no cancellation between them.
+///
+/// Returns NaN if EITHER side has a non-finite entry, so a caller that forgets `le`/`gt` still cannot read a
+/// finite-looking number out of a broken fixture.
+double rel_l1(const float* a, const float* b, size_t n, double* mag_out = nullptr,
+              long long* nf_out = nullptr) {
+    double d = 0, m = 0;
+    long long nf = 0;
+    for (size_t i = 0; i < n; ++i) {
+        if (!std::isfinite(a[i]) || !std::isfinite(b[i])) { ++nf; continue; }
+        d += std::fabs((double) a[i] - (double) b[i]);
+        m += std::fabs((double) a[i]);
+    }
+    if (mag_out) *mag_out = m / (double) (n ? n : 1);
+    if (nf_out) *nf_out = nf;
+    if (nf) return std::nan("");
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+/// The file's size, WITHOUT reading it.
+///
+/// The first version of this test called `read_file(gguf)` - which reads the WHOLE file into a vector - three
+/// times, on a 28.8 GB GGUF.  That is 27 GB of RSS, three full passes over the file, and a 132-second ctest
+/// entry in a suite where every other test is under a second.  A test that slow stops being run, which is how
+/// a gate stops being a gate.  Everything below now reads only the bytes it actually compares.
+long long file_size(const char* path) {
+    std::FILE* f = std::fopen(path, "rb");
+    if (!f) return -1;
+#if defined(_MSC_VER)
+    _fseeki64(f, 0, SEEK_END);
+    const long long n = _ftelli64(f);
+#else
+    std::fseek(f, 0, SEEK_END);
+    const long long n = std::ftell(f);
+#endif
+    std::fclose(f);
+    return n;
+}
+
+/// `n` bytes at `off`, or an empty vector.
+std::vector<uint8_t> read_at(const char* path, long long off, size_t n) {
+    std::vector<uint8_t> v(n);
+    std::FILE* f = std::fopen(path, "rb");
+    if (!f) return {};
+#if defined(_MSC_VER)
+    if (_fseeki64(f, off, SEEK_SET) != 0) { std::fclose(f); return {}; }
+#else
+    if (std::fseek(f, (long) off, SEEK_SET) != 0) { std::fclose(f); return {}; }
+#endif
+    const size_t got = std::fread(v.data(), 1, n, f);
+    std::fclose(f);
+    if (got != n) return {};
+    return v;
+}
+
+/// Only used for the pack, which is 5.4 GB rather than 28.8 GB - and even then the caller says which region.
+std::vector<uint8_t> read_path(const char* path) {
+    const long long n = file_size(path);
+    if (n <= 0) return {};
+    return read_at(path, 0, (size_t) n);
+}
+
+/// Dequantize one IQ4_NL row with an INTERLEAVED nibble order, to show the correct split-half order is
+/// observable.  Deliberately shares nothing with the kernel's decoder.
+void deq_interleaved(const uint8_t* row, float* out160) {
+    for (int b = 0; b < k::PLE_HEAD_DIM / 32; ++b) {
+        const uint8_t* blk = row + (size_t) b * 18;
+        uint16_t db;
+        std::memcpy(&db, blk, 2);
+        const float d = k::f32_from_f16(db);
+        for (int j = 0; j < 16; ++j) {
+            out160[b * 32 + 2 * j] = d * (float) k::iq4nl_code(blk[2 + j] & 0x0F);
+            out160[b * 32 + 2 * j + 1] = d * (float) k::iq4nl_code(blk[2 + j] >> 4);
+        }
+    }
+}
+
+struct PleCapture {
+    int n_embd = 0, hc = 0, nt = 0, kern = 0, dil = 0;
+    float eps = 0.0f;
+    std::vector<float> emb, hidden, w_key, w_value, w_nk, w_nq, w_nc, w_conv, hist;
+    // oracle outputs
+    std::vector<float> key, value, gate, gated, normalized, conv_out, result;
+};
+
+bool load_capture(const char* in_path, const char* out_path, PleCapture& c) {
+    std::FILE* fi = std::fopen(in_path, "rb");
+    if (!fi) return false;
+    int32_t h[5] = {0};
+    if (std::fread(h, 4, 5, fi) != 5) { std::fclose(fi); return false; }
+    c.n_embd = h[0]; c.hc = h[1]; c.nt = h[2]; c.kern = h[3]; c.dil = h[4];
+    if (std::fread(&c.eps, 4, 1, fi) != 1) { std::fclose(fi); return false; }
+    // Validate before deriving sizes or allocating. This bounded diagnostic
+    // format is for this model's geometry and at most 64 captured tokens.
+    if (c.n_embd != k::NG_N_EMBD || c.hc != k::NG_HC || c.nt <= 0 || c.nt > 64 ||
+        c.kern != k::PLE_CONV_KERNEL || c.dil != k::NGRAM_SIZE || c.eps != k::NG_RMS_EPS) {
+        std::fclose(fi); return false;
+    }
+    const long long nd = c.n_embd, hcd = (long long) c.hc * c.n_embd, nt = c.nt,
+                    hist = (long long) (c.kern - 1) * c.dil;
+    const long long in_bytes = 24 + 4 * (nt * nd + nt * hcd + hcd * nd + nd * nd +
+                                        3 * hcd + hcd * c.kern + hist * hcd);
+    const long long out_bytes = 12 + 4 * nt * (5 * hcd + nd + c.hc);
+    if (file_size(in_path) != in_bytes || file_size(out_path) != out_bytes) {
+        std::fclose(fi); return false;
+    }
+    auto rd = [](std::FILE* file, std::vector<float>& v, long long n) {
+        v.resize((size_t) n);
+        return n == 0 || std::fread(v.data(), 4, (size_t) n, file) == (size_t) n;
+    };
+    bool ok = rd(fi, c.emb, nt * nd) && rd(fi, c.hidden, nt * hcd) && rd(fi, c.w_key, hcd * nd) &&
+              rd(fi, c.w_value, nd * nd) && rd(fi, c.w_nk, hcd) && rd(fi, c.w_nq, hcd) && rd(fi, c.w_nc, hcd) &&
+              rd(fi, c.w_conv, hcd * c.kern) && rd(fi, c.hist, hist * hcd);
+    std::fclose(fi);
+    if (!ok) return false;
+
+    std::FILE* fo = std::fopen(out_path, "rb");
+    if (!fo) return false;
+    int32_t oh[3] = {0};
+    if (std::fread(oh, 4, 3, fo) != 3) { std::fclose(fo); return false; }
+    if (oh[0] != c.n_embd || oh[1] != hcd || oh[2] != c.nt) { std::fclose(fo); return false; }
+    ok = rd(fo, c.key, nt * hcd) && rd(fo, c.value, nt * nd) && rd(fo, c.gate, nt * c.hc) && rd(fo, c.gated, nt * hcd) &&
+         rd(fo, c.normalized, nt * hcd) && rd(fo, c.conv_out, nt * hcd) && rd(fo, c.result, nt * hcd);
+    std::fclose(fo);
+    return ok;
+}
+
+int history_advance_regression() {
+    const size_t channels = (size_t) k::NG_HC_DIM, rows = (size_t) k::NG_HIST, guard = 16;
+    const size_t count = channels * rows;
+    std::vector<float> expected(count), normalized(channels), actual(count);
+    for (size_t c = 0; c < channels; ++c)
+        for (size_t r = 0; r < rows; ++r) expected[c * rows + r] = -float(c * 16 + r + 1);
+    float *history_storage = nullptr, *norm_storage = nullptr;
+    ck(DPCT_CHECK_ERROR(history_storage = sycl::malloc_device<float>(
+                            (count + 2 * guard), dpct::get_in_order_queue())),
+       "history regression allocation");
+    ck(DPCT_CHECK_ERROR(
+           norm_storage = sycl::malloc_device<float>(
+               (channels + 2 * guard), dpct::get_in_order_queue())),
+       "history norm allocation");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memset(history_storage, 0xa5,
+                                    (count + 2 * guard) * sizeof(float))
+                            .wait()),
+       "history guard init");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memset(norm_storage, 0xa5,
+                                    (channels + 2 * guard) * sizeof(float))
+                            .wait()),
+       "history norm guard init");
+    float* history = history_storage + guard;
+    float* norm = norm_storage + guard;
+    /*
+    DPCT1114:944: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           history, expected.data(), count * sizeof(float))),
+       "history initial values");
+    dpct::queue_ptr stream;
+    dpct::experimental::command_graph_ptr graph;
+    dpct::experimental::command_graph_exec_ptr executable;
+    /*
+    DPCT1025:945: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    ck(DPCT_CHECK_ERROR(stream = dpct::get_current_device().create_queue(true)),
+       "history regression stream");
+    ck(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+       "history regression capture");
+    k::ple_history_advance(history, norm, stream);
+    ck(DPCT_CHECK_ERROR(dpct::experimental::end_recording(stream, &graph)),
+       "history regression capture end");
+    ck(DPCT_CHECK_ERROR(
+           executable = new sycl::ext::oneapi::experimental::command_graph<
+               sycl::ext::oneapi::experimental::graph_state::executable>(
+               graph->finalize())),
+       "history regression instantiate");
+    int bad = 0;
+    for (int token = 0; token < 12; ++token) {
+        for (size_t c = 0; c < channels; ++c) {
+            normalized[c] = float((token + 1) * 1000000 + c); // distinct exactly represented integers
+            for (size_t r = 0; r + 1 < rows; ++r) expected[c * rows + r] = expected[c * rows + r + 1];
+            expected[c * rows + rows - 1] = normalized[c];
+        }
+        /*
+        DPCT1124:946: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(stream->memcpy(norm, normalized.data(),
+                                           channels * sizeof(float))),
+           "history new normalized row");
+        ck(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
+           "history captured advance");
+        ck(DPCT_CHECK_ERROR(stream->wait()), "history captured advance sync");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(actual.data(), history, count * sizeof(float))
+                   .wait()),
+           "history readback");
+        if (std::memcmp(actual.data(), expected.data(), count * sizeof(float)) != 0) {
+            std::printf("  history advance mismatch after token %d\n", token);
+            ++bad;
+        }
+    }
+    bool overlap_refused = false, null_refused = false;
+    try { k::ple_history_advance(history, history + 1, stream); }
+    catch (const std::invalid_argument&) { overlap_refused = true; }
+    try { k::ple_history_advance(history, nullptr, stream); }
+    catch (const std::invalid_argument&) { null_refused = true; }
+    if (!overlap_refused || !null_refused) ++bad;
+    auto guard_ok = [&](float* storage, size_t payload) {
+        uint8_t before[64], after[64];
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(before, storage, sizeof(before))
+                                .wait()),
+           "history prefix guard");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(after, storage + guard + payload, sizeof(after))
+                   .wait()),
+           "history suffix guard");
+        return std::all_of(before, before + 64, [](uint8_t b) { return b == 0xa5; }) &&
+               std::all_of(after, after + 64, [](uint8_t b) { return b == 0xa5; });
+    };
+    if (!guard_ok(history_storage, count) || !guard_ok(norm_storage, channels)) ++bad;
+    std::printf("  PLE history 12 captured steps, row-fastest state and guards: %s\n", bad == 0 ? "pass" : "FAIL");
+    ck(DPCT_CHECK_ERROR(delete (executable)), "history graph exec destroy");
+    ck(DPCT_CHECK_ERROR(delete (graph)), "history graph destroy");
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+       "history stream destroy");
+    sycl::free(history_storage, dpct::get_in_order_queue());
+        sycl::free(norm_storage, dpct::get_in_order_queue());
+    return bad;
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    bool check_fixtures = false;
+    std::string pack = "pack/full";
+    // --gguf, else $STRATA_PLE_GGUF, else the development layout (run from the engine root)
+    std::string gguf = std::getenv("STRATA_PLE_GGUF") ? std::getenv("STRATA_PLE_GGUF")
+                                                      : "../../Q2_0/Qwen3.8-Flash-Next-GSQ-RCO-Q2_0-00002-of-00002.gguf";
+    std::string in_bin = "bench/micro/ple_in.bin", out_bin = "bench/micro/ple_out.bin";
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        if (a == "--selftest") selftest = true;
+        else if (a == "--check-fixtures") check_fixtures = true;
+        else if (a == "--pack" && i + 1 < argc) pack = argv[++i];
+        else if (a == "--gguf" && i + 1 < argc) gguf = argv[++i];
+        else if (a == "--in" && i + 1 < argc) in_bin = argv[++i];
+        else if (a == "--out" && i + 1 < argc) out_bin = argv[++i];
+        else { std::fprintf(stderr, "usage: ple_parity [--selftest] [--check-fixtures] [--pack D] [--gguf F] [--in F] [--out F]\n");
+               return 2; }
+    }
+    if (selftest && check_fixtures) {
+        std::fprintf(stderr, "ple_parity: --check-fixtures is CPU-only; use it separately from --selftest\n");
+        return 2;
+    }
+    // Required self-test fixtures are checked before the first CUDA call, so
+    // missing files cannot become an apparent pass or a misleading GPU error.
+    k::PleTable table;
+    std::string err;
+    PleCapture cap;
+    bool preflight_done = false;
+    if (selftest || check_fixtures) {
+        if (!table.open(gguf, err) || table.rows() != o::kTableRows ||
+            file_size(gguf.c_str()) != (long long) o::kTableDataStart + (long long) o::kTableRows * k::PLE_ROW_BYTES) {
+            std::fprintf(stderr, "ple_parity: required PLE table is missing or incompatible: %s (%s)\n", gguf.c_str(), err.c_str());
+            return 2;
+        }
+        const uint64_t pack_needed = std::max({o::kKeyCodesOffset + o::kKeyCodesBytes,
+            o::kKeyScalesOffset + o::kKeyScalesBytes, o::kValueOffset + o::kValueBytes});
+        const long long pack_size = file_size((pack + "/dense.bin").c_str());
+        if (pack_size < 0 || (uint64_t) pack_size < pack_needed) {
+            std::fprintf(stderr, "ple_parity: required dense pack is missing or truncated: %s/dense.bin\n", pack.c_str());
+            return 2;
+        }
+        if (!load_capture(in_bin.c_str(), out_bin.c_str(), cap)) {
+            std::fprintf(stderr, "ple_parity: required block fixtures are missing, truncated or incompatible: %s / %s\n", in_bin.c_str(), out_bin.c_str());
+            return 2;
+        }
+        preflight_done = true;
+        if (check_fixtures) {
+            std::puts("PASS required PLE fixture structure on CPU; no GPU numerical checks were run");
+            return 0;
+        }
+        if (!k::ple_block_available()) {
+            std::fprintf(stderr, "ple_parity: --selftest requires a CUDA device for block checks\n");
+            return 2;
+        }
+    }
+    int bad = history_advance_regression();
+    const k::PleConsts C = k::ple_artifact_consts();
+
+    // ============================ A. THE HASH ============================
+    std::printf("A. the n-gram hash, against ref/ngram.py with the artifact's own constants\n");
+
+    // ---- the constants must be internally consistent BEFORE they are used: `head_offsets` is its own array
+    //      in the metadata, so deriving it from `vocab_sizes` would hide a disagreement between them.
+    {
+        uint64_t run = 0;
+        bool ok = true;
+        for (int h = 0; h < k::PLE_N_HEADS; ++h) {
+            if (C.offset[h] != run) ok = false;
+            run += C.vocab[h];
+        }
+        const uint64_t total = run;
+        const bool fits = total <= k::PLE_TABLE_ROWS;
+        std::printf("  %-46s %s (sum %llu <= %llu rows; %llu spare)\n",
+                    "head_offsets == the running sum of vocab_sizes", ok && fits ? "yes" : "*** NO ***",
+                    (unsigned long long) total, (unsigned long long) k::PLE_TABLE_ROWS,
+                    (unsigned long long) (k::PLE_TABLE_ROWS - total));
+        if (!ok || !fits) ++bad;
+    }
+
+    for (int ci = 0; ci < o::kHashCaseCount; ++ci) {
+        const o::HashCase& hc = o::kHashCases[ci];
+        std::vector<uint32_t> got((size_t) hc.n_tokens * k::PLE_N_HEADS);
+        k::ngram_rows(hc.tokens, hc.prev, hc.n_tokens, C, got.data());
+        long long diff = 0;
+        for (size_t i = 0; i < got.size(); ++i)
+            if (got[i] != hc.rows[i]) ++diff;
+        std::printf("  %-46s %s (%lld of %zu differ)\n", hc.name, diff ? "*** WRONG ***" : "matches", diff,
+                    got.size());
+        if (diff) {
+            for (int t = 0; t < hc.n_tokens && diff; ++t) {
+                for (int h = 0; h < k::PLE_N_HEADS; ++h) {
+                    const uint32_t g = got[(size_t) t * 16 + h], w = hc.rows[(size_t) t * 16 + h];
+                    if (g != w) {
+                        std::printf("      first: t=%d h=%d got %u want %u\n", t, h, g, w);
+                        t = hc.n_tokens;
+                        break;
+                    }
+                }
+            }
+            ++bad;
+        }
+    }
+
+    // ---- the rival readings, each computed and required to DIFFER from the oracle -------------------
+    //
+    // Every one of these produces a 16-element vector of valid indices.  That is the whole reason the hash is
+    // transcribed property by property: no range check, no shape check and no summing test can see any of
+    // them, only an oracle can - and only a DELIBERATELY-WRONG fixture can show that the oracle comparison
+    // has the power to catch them.
+    {
+        const o::HashCase& hc = o::kHashCases[0];   // the window-direction case, 4 tokens
+        const int T = hc.n_tokens, np = k::NGRAM_SIZE - 1, n_heads = k::PLE_N_HEADS;
+        std::vector<uint32_t> xor_v((size_t) T * n_heads), sum_v((size_t) T * n_heads),
+            mask_v((size_t) T * n_heads), back_v((size_t) T * n_heads), zero_v((size_t) T * n_heads);
+        for (int i = 0; i < T; ++i) {
+            int64_t ctx[k::NGRAM_SIZE];
+            ctx[0] = hc.tokens[i];
+            for (int s = 1; s < k::NGRAM_SIZE; ++s) ctx[s] = hc.prev[i * np + (np - s)];
+            for (int n = 2; n <= k::NGRAM_SIZE; ++n) {
+                // (1) SUM instead of XOR
+                uint64_t sum = 0;
+                for (int j = 0; j < n; ++j) sum += (uint64_t) ctx[j] * C.mult[j];
+                // (2) mask instead of modulo: the vocab sizes are NOT powers of two
+                uint64_t xr = k::ngram_mixed(ctx, C.mult, n);
+                // (4) token 0 treated as "missing" the way -1 is
+                int64_t ctx0[k::NGRAM_SIZE];
+                for (int j = 0; j < k::NGRAM_SIZE; ++j)
+                    ctx0[j] = (ctx[j] == k::TOKEN_NULL || ctx[j] == 0) ? k::PLE_EOS_TOKEN_ID : ctx[j];
+                uint64_t xr0 = k::ngram_mixed(ctx0, C.mult, n);
+                // (3) the window read NEWEST-first instead of oldest-first: prev index (s-1)
+                int64_t ctxb[k::NGRAM_SIZE];
+                ctxb[0] = hc.tokens[i];
+                for (int s = 1; s < k::NGRAM_SIZE; ++s) ctxb[s] = hc.prev[i * np + (s - 1)];
+                uint64_t xrb = k::ngram_mixed(ctxb, C.mult, n);
+                const int base = (n - 2) * k::HEADS_PER_NGRAM;
+                for (int g = 0; g < k::HEADS_PER_NGRAM; ++g) {
+                    const int h = base + g;
+                    xor_v[(size_t) i * n_heads + h] = (uint32_t) (xr % C.vocab[h] + C.offset[h]);
+                    sum_v[(size_t) i * n_heads + h] = (uint32_t) (sum % C.vocab[h] + C.offset[h]);
+                    mask_v[(size_t) i * n_heads + h] =
+                        (uint32_t) ((xr & (C.vocab[h] - 1)) + C.offset[h]);
+                    back_v[(size_t) i * n_heads + h] = (uint32_t) (xrb % C.vocab[h] + C.offset[h]);
+                    zero_v[(size_t) i * n_heads + h] = (uint32_t) (xr0 % C.vocab[h] + C.offset[h]);
+                }
+            }
+        }
+        struct Rival { const char* name; const std::vector<uint32_t>* v; };
+        const Rival rivals[] = {{"XOR vs SUM", &sum_v},
+                                {"% vs & (vocab sizes are not powers of two)", &mask_v},
+                                {"window read newest-first, not oldest-first", &back_v},
+                                {"token id 0 treated as the NULL sentinel", &zero_v}};
+        for (const Rival& r : rivals) {
+            // A rival is observable if it disagrees with the ORACLE, which is what the test above compares.
+            long long d = 0;
+            for (size_t i = 0; i < r.v->size(); ++i)
+                if ((*r.v)[i] != hc.rows[i]) ++d;
+            const bool visible = d > 0;
+            std::printf("  %-46s %s (%lld of %zu rows differ from the oracle)\n", r.name,
+                        visible ? "yes" : "*** NO - the fixture cannot see this ***", d, r.v->size());
+            if (!visible) ++bad;
+        }
+        (void) xor_v;
+    }
+
+    // ---- the EOS cut DIRECTION, which needs a case where the two directions disagree ----------------
+    {
+        const o::HashCase& hc = o::kHashCases[1];   // [[N,N],[7,EOS],[EOS,7]]
+        const int T = hc.n_tokens, np = k::NGRAM_SIZE - 1, n_heads = k::PLE_N_HEADS;
+        std::vector<uint32_t> fwd((size_t) T * n_heads), bwd((size_t) T * n_heads);
+        for (int i = 0; i < T; ++i) {
+            int64_t f[k::NGRAM_SIZE], b[k::NGRAM_SIZE];
+            f[0] = b[0] = hc.tokens[i];
+            bool cf = false, cb = false;
+            for (int s = 1; s < k::NGRAM_SIZE; ++s) {
+                const int32_t fv = hc.prev[i * np + (np - s)];
+                cf = cf || fv < 0 || fv == k::PLE_EOS_TOKEN_ID;
+                f[s] = cf ? k::PLE_EOS_TOKEN_ID : fv;
+                // the BACKWARD reading: only the position that IS EOS becomes EOS
+                const int32_t bv = hc.prev[i * np + (np - s)];
+                b[s] = (bv < 0 || bv == k::PLE_EOS_TOKEN_ID) ? k::PLE_EOS_TOKEN_ID : bv;
+                (void) cb;
+            }
+            for (int n = 2; n <= k::NGRAM_SIZE; ++n) {
+                const uint64_t mf = k::ngram_mixed(f, C.mult, n), mb = k::ngram_mixed(b, C.mult, n);
+                const int base = (n - 2) * k::HEADS_PER_NGRAM;
+                for (int g = 0; g < k::HEADS_PER_NGRAM; ++g) {
+                    const int h = base + g;
+                    fwd[(size_t) i * n_heads + h] = (uint32_t) (mf % C.vocab[h] + C.offset[h]);
+                    bwd[(size_t) i * n_heads + h] = (uint32_t) (mb % C.vocab[h] + C.offset[h]);
+                }
+            }
+        }
+        long long d = 0;
+        for (size_t i = 0; i < fwd.size(); ++i)
+            if (fwd[i] != bwd[i]) ++d;
+        std::printf("  %-46s %s (%lld of %zu rows differ)\n",
+                    "cut propagates FORWARD vs only at the EOS position",
+                    d > 0 ? "yes" : "*** NO ***", d, fwd.size());
+        if (!d) ++bad;
+    }
+
+    // ============================ B. THE TABLE ============================
+    std::printf("\nB. the IQ4_NL table, against numpy reading the original GGUF\n");
+    if (!preflight_done && !table.open(gguf, err)) {
+        std::printf("  cannot open the PLE table: %s\n", err.c_str());
+        std::printf("\nple_parity: %d failures, TABLE AND BLOCK SKIPPED; partial diagnostic only\n", bad);
+        return selftest || bad ? 1 : 0;
+    }
+    std::printf("  %-46s %llu (expected %llu)\n", "rows", (unsigned long long) table.rows(),
+                (unsigned long long) o::kTableRows);
+    if (table.rows() != o::kTableRows) ++bad;
+
+    // The size identity is what makes the data offset FALSIFIABLE: the tensor must exactly fill the file from
+    // data_start.  Deriving the row count from the file size instead gives 320001538 rows and data_start 12,
+    // which is self-consistent and wrong.
+    {
+        const long long sz = file_size(gguf.c_str());
+        const long long need = (long long) o::kTableDataStart + (long long) table.rows() * k::PLE_ROW_BYTES;
+        const bool ok = sz == need;
+        std::printf("  %-46s %s (%lld vs %lld; data_start %llu)\n",
+                    "data_start + rows*90 == file size", ok ? "yes" : "*** NO ***", sz, need,
+                    (unsigned long long) o::kTableDataStart);
+        if (!ok) ++bad;
+    }
+
+    // Read the raw bytes through the mapped table by comparing against numpy's decode of the SAME offsets.
+    // 90 BYTES AT A TIME, not the whole file - see `file_size`'s note.
+    {
+        int probe_bad = 0;
+        for (int p = 0; p < o::kProbeCount; ++p) {
+            const uint32_t row = o::kProbeRows[p];
+            std::vector<float> got(k::PLE_HEAD_DIM);
+            table.read_row(row, got.data());
+            const std::vector<uint8_t> raw =
+                read_at(gguf.c_str(), (long long) o::kTableDataStart + (long long) row * k::PLE_ROW_BYTES,
+                        (size_t) k::PLE_ROW_BYTES);
+            if (raw.size() != (size_t) k::PLE_ROW_BYTES) { std::printf("  short read at row %u\n", row); ++probe_bad; continue; }
+            std::vector<float> ref(k::PLE_HEAD_DIM);
+            k::iq4nl_dequant_row(raw.data(), ref.data());
+            // the sampled values from the generator (numpy), which is the oracle proper.
+            // NOT `fmax`: it DISCARDS NaN, so a NaN element would leave these at 0 and the row would report
+            // a perfect match.  A plain comparison propagates the NaN into `ok`.
+            double head = 0, tail = 0, sum = 0;
+            for (int i = 0; i < 8; ++i) {
+                const double dh = std::fabs((double) got[i] - (double) o::kProbeHead[p][i]);
+                const double dt = std::fabs((double) got[k::PLE_HEAD_DIM - 8 + i] -
+                                            (double) o::kProbeTail[p][i]);
+                if (p == 0 && i == 0) { head = dh; tail = dt; }
+                else { head = (dh > head) ? dh : head; tail = (dt > tail) ? dt : tail; }
+            }
+            for (int i = 0; i < k::PLE_HEAD_DIM; ++i) sum += std::fabs((double) got[i]);
+            const long long nfg = nonfinite(got.data(), k::PLE_HEAD_DIM);
+            const bool ok = le(head, 0.0) && le(tail, 0.0) && le(std::fabs(sum - o::kProbeSum[p]), 1e-9) &&
+                            nfg == 0;
+            std::printf("  %-46s %s (row %u: head %.3e tail %.3e sum d %.3e, non-finite %lld)\n",
+                        p == 0 ? "row matches numpy's decode of the same bytes" : "  (same, another row)",
+                        ok ? "yes" : "*** NO ***", row, head, tail, std::fabs(sum - o::kProbeSum[p]), nfg);
+            if (!ok) ++probe_bad;
+            // and the two decoders must agree with each other bit for bit
+            for (int i = 0; i < k::PLE_HEAD_DIM; ++i)
+                if (got[i] != ref[i]) { std::printf("      byte-level decode differs at %d\n", i); ++probe_bad; break; }
+        }
+        bad += probe_bad;
+    }
+
+    // ---- the split-half nibble order must be observable ---------------------------------------------
+    {
+        const std::vector<uint8_t> raw =
+            read_at(gguf.c_str(), (long long) o::kTableDataStart +
+                                      (long long) o::kProbeRows[0] * k::PLE_ROW_BYTES,
+                    (size_t) k::PLE_ROW_BYTES);
+        std::vector<float> want(k::PLE_HEAD_DIM), inter(k::PLE_HEAD_DIM);
+        k::iq4nl_dequant_row(raw.data(), want.data());
+        deq_interleaved(raw.data(), inter.data());
+        const double rel = rel_l1(want.data(), inter.data(), k::PLE_HEAD_DIM);
+        const bool visible = gt(rel, 0.05);
+        std::printf("  %-46s %s (%.2f%% apart; generator says %.4f)\n",
+                    "split-half vs INTERLEAVED nibbles observable",
+                    visible ? "yes" : "*** NO ***", rel * 100, (double) o::kInterleavedSeparation);
+        if (!visible) ++bad;
+    }
+
+    // ---- and reading at file offset 0 instead of data_start must be observable ----------------------
+    {
+        const std::vector<uint8_t> at_ds = read_at(gguf.c_str(), (long long) o::kTableDataStart,
+                                                   (size_t) k::PLE_ROW_BYTES);
+        const std::vector<uint8_t> at_0 = read_at(gguf.c_str(), 0, (size_t) k::PLE_ROW_BYTES);
+        std::vector<float> ok_v(k::PLE_HEAD_DIM), at0(k::PLE_HEAD_DIM);
+        k::iq4nl_dequant_row(at_ds.data(), ok_v.data());
+        k::iq4nl_dequant_row(at_0.data(), at0.data());
+        const double rel = rel_l1(ok_v.data(), at0.data(), k::PLE_HEAD_DIM);
+        const bool visible = gt(rel, 0.05);
+        std::printf("  %-46s %s (%.2f%% apart)\n",
+                    "data_start 192 vs file offset 0 observable", visible ? "yes" : "*** NO ***", rel * 100);
+        if (!visible) ++bad;
+    }
+
+    // ---- head-slowest flatten ----------------------------------------------------------------------
+    {
+        const uint32_t rows16[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
+        std::vector<float> emb(k::NG_N_EMBD), one(k::PLE_HEAD_DIM);
+        table.gather(rows16, emb.data());
+        bool blockwise = true;
+        for (int h = 0; h < k::PLE_N_HEADS && blockwise; ++h) {
+            table.read_row((uint32_t) h, one.data());
+            for (int d = 0; d < k::PLE_HEAD_DIM; ++d)
+                if (emb[h * k::PLE_HEAD_DIM + d] != one[d]) { blockwise = false; break; }
+        }
+        // the rival: head-fastest, element (d,h) at d*16+h - a real transpose, not a reshape
+        std::vector<float> fast(k::NG_N_EMBD);
+        for (int d = 0; d < k::PLE_HEAD_DIM; ++d)
+            for (int h = 0; h < k::PLE_N_HEADS; ++h) fast[d * k::PLE_N_HEADS + h] = emb[h * k::PLE_HEAD_DIM + d];
+        long long diff = 0;
+        for (int i = 0; i < k::NG_N_EMBD; ++i)
+            if (fast[i] != emb[i]) ++diff;
+        std::printf("  %-46s %s (head h occupies [h*160,(h+1)*160))\n", "gather is head-slowest",
+                    blockwise ? "yes" : "*** NO ***");
+        std::printf("  %-46s %s (%lld of %d elements differ)\n", "head-fastest would differ",
+                    diff > 0 ? "yes" : "*** NO ***", diff, k::NG_N_EMBD);
+        if (!blockwise || !diff) ++bad;
+    }
+
+    // ============================ C. THE BLOCK ============================
+    std::printf("\nC. the PLE block, against ggml's own graph (ple_in.bin / ple_out.bin)\n");
+    if (!preflight_done && !load_capture(in_bin.c_str(), out_bin.c_str(), cap)) {
+        std::printf("  cannot load %s / %s\n", in_bin.c_str(), out_bin.c_str());
+        std::printf("\nple_parity: %d failures, BLOCK SKIPPED; partial diagnostic only\n", bad);
+        return selftest || bad ? 1 : 0;
+    }
+    std::printf("  capture: n_embd %d, hc %d, nt %d, kern %d, dil %d, eps %g\n", cap.n_embd, cap.hc, cap.nt,
+                cap.kern, cap.dil, (double) cap.eps);
+    if (cap.n_embd != k::NG_N_EMBD || cap.hc != k::NG_HC || cap.kern != k::PLE_CONV_KERNEL ||
+        cap.dil != k::NGRAM_SIZE) {
+        std::printf("  *** the capture's geometry is not the artifact's ***\n");
+        return 1;
+    }
+
+    if (!k::ple_block_available()) {
+        std::printf("  no CUDA device; the block SKIPPED, not passed.\n");
+        std::printf("\nple_parity: %d failures, BLOCK SKIPPED\n", bad);
+        return selftest || bad ? 1 : 0;
+    }
+
+    // ---- the two quantized weights, from the PACK, not from the capture.
+    //      The capture holds `w_key` already dequantized to f32; the kernel needs the CODES AND SCALES, and
+    //      re-quantizing the f32 would be a different tensor.  Reading the pack is right and it was checked:
+    //      the pack's decode of row 0 reproduces the capture's w_key row 0 exactly (see the round entry).
+    //      Only the two regions are read, not all 5.4 GB of `dense.bin`.
+    std::vector<uint8_t> key_codes =
+        read_at((pack + "/dense.bin").c_str(), (long long) o::kKeyCodesOffset, (size_t) o::kKeyCodesBytes);
+    const std::vector<uint8_t> raw_scales =
+        read_at((pack + "/dense.bin").c_str(), (long long) o::kKeyScalesOffset, (size_t) o::kKeyScalesBytes);
+    const std::vector<uint8_t> raw_value =
+        read_at((pack + "/dense.bin").c_str(), (long long) o::kValueOffset, (size_t) o::kValueBytes);
+    if (key_codes.empty() || raw_scales.empty() || raw_value.empty()) {
+        std::printf("  cannot read the ple_key/ple_value regions from %s/dense.bin\n", pack.c_str());
+        return 2;
+    }
+    // fp16 -> f32 for the scales, which is what every S-form kernel in this project expects
+    const size_t n_scales = raw_scales.size() / 2;
+    std::vector<float> key_scales(n_scales);
+    for (size_t i = 0; i < n_scales; ++i) {
+        uint16_t h;
+        std::memcpy(&h, raw_scales.data() + i * 2, 2);
+        key_scales[i] = k::f32_from_f16(h);
+    }
+    // ple_value is BF16 promoted to 32 bits in the pack; take the high half, which is exact
+    std::vector<uint16_t> value_bf16(raw_value.size() / 4);
+    for (size_t i = 0; i < value_bf16.size(); ++i) {
+        uint32_t u;
+        std::memcpy(&u, raw_value.data() + i * 4, 4);
+        value_bf16[i] = (uint16_t) (u >> 16);
+    }
+    // ple_conv1d is F16 in the pack; the capture holds it as f32 in ggml order, and the kernel wants F16
+    std::vector<uint16_t> conv1d_f16(cap.w_conv.size());
+    for (size_t i = 0; i < conv1d_f16.size(); ++i) conv1d_f16[i] = k::f16_from_f32(cap.w_conv[i]);
+
+    // ---- the check that the two sources describe the SAME weights ---------------------------------
+    {
+        // dequantize key row 0 with the canonical rule and compare to the capture's w_key row 0.
+        // NOT `fmax`, for the reason above: it discards NaN, so a NaN would leave `worst` at 0 and report a
+        // perfect match.
+        double worst = 0;
+        bool first = true;
+        long long nf = 0;
+        for (int d = 0; d < k::NG_N_EMBD; ++d) {
+            const uint8_t byte = key_codes[d / 4];
+            const int code = (byte >> ((d % 4) * 2)) & 3;
+            const float v = (float) (code + (-1)) * key_scales[d / 64];
+            if (!std::isfinite(v) || !std::isfinite(cap.w_key[d])) { ++nf; continue; }
+            const double diff = std::fabs((double) v - (double) cap.w_key[d]);
+            if (first) { worst = diff; first = false; }
+            else worst = (diff > worst) ? diff : worst;
+        }
+        std::printf("  %-46s %s (worst |d| %.3e, non-finite %lld)\n",
+                    "pack ple_key row 0 == the capture's w_key row 0",
+                    (le(worst, 0.0) && nf == 0) ? "yes" : "*** NO ***", worst, nf);
+        if (!le(worst, 0.0) || nf) ++bad;
+    }
+
+    // ---- run the block for both tokens of the capture ---------------------------------------------
+    const size_t hcd = (size_t) k::NG_HC_DIM, nd = (size_t) k::NG_N_EMBD;
+    std::vector<float> dev_key(hcd), dev_value(nd), dev_gate(k::NG_HC), dev_gated(hcd), dev_norm(hcd),
+        dev_conv(hcd), dev_res(hcd);
+    float *d_emb = nullptr, *d_hid = nullptr, *d_hist = nullptr, *d_nk = nullptr, *d_nq = nullptr,
+          *d_nc = nullptr, *d_ck = nullptr, *d_cv = nullptr, *d_cn = nullptr, *d_cr = nullptr;
+    uint8_t* d_kc = nullptr;
+    uint16_t *d_vb = nullptr, *d_c1 = nullptr;
+    float *d_g = nullptr, *d_v = nullptr, *d_gd = nullptr, *d_nm = nullptr, *d_co = nullptr;
+    ck(DPCT_CHECK_ERROR(d_emb = (float *)sycl::malloc_device(
+                            nd * 4, dpct::get_in_order_queue())),
+       "emb");
+    ck(DPCT_CHECK_ERROR(d_hid = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "hid");
+    ck(DPCT_CHECK_ERROR(
+           d_hist = (float *)sycl::malloc_device((size_t)k::NG_HIST * hcd * 4,
+                                                 dpct::get_in_order_queue())),
+       "hist");
+    ck(DPCT_CHECK_ERROR(d_nk = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "nk");
+    ck(DPCT_CHECK_ERROR(d_nq = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "nq");
+    ck(DPCT_CHECK_ERROR(d_nc = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "nc");
+    ck(DPCT_CHECK_ERROR(d_kc = (uint8_t *)sycl::malloc_device(
+                            key_codes.size(), dpct::get_in_order_queue())),
+       "kc");
+    ck(DPCT_CHECK_ERROR(d_vb = (uint16_t *)sycl::malloc_device(
+                            value_bf16.size() * 2, dpct::get_in_order_queue())),
+       "vb");
+    ck(DPCT_CHECK_ERROR(d_c1 = (uint16_t *)sycl::malloc_device(
+                            conv1d_f16.size() * 2, dpct::get_in_order_queue())),
+       "c1");
+    ck(DPCT_CHECK_ERROR(d_g = (float *)sycl::malloc_device(
+                            k::NG_HC * 4, dpct::get_in_order_queue())),
+       "g");
+    ck(DPCT_CHECK_ERROR(d_v = (float *)sycl::malloc_device(
+                            nd * 4, dpct::get_in_order_queue())),
+       "v");
+    ck(DPCT_CHECK_ERROR(d_gd = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "gd");
+    ck(DPCT_CHECK_ERROR(d_nm = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "nm");
+    ck(DPCT_CHECK_ERROR(d_co = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "co");
+    ck(DPCT_CHECK_ERROR(d_ck = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "ck");
+    ck(DPCT_CHECK_ERROR(d_cv = (float *)sycl::malloc_device(
+                            nd * 4, dpct::get_in_order_queue())),
+       "cv");
+    ck(DPCT_CHECK_ERROR(d_cn = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "cn");
+    ck(DPCT_CHECK_ERROR(d_cr = (float *)sycl::malloc_device(
+                            hcd * 4, dpct::get_in_order_queue())),
+       "cr");
+    /*
+    DPCT1114:947: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4)),
+       "cnk");
+    /*
+    DPCT1114:948: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4)),
+       "cnq");
+    /*
+    DPCT1114:949: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4)),
+       "cnc");
+    /*
+    DPCT1114:950: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_kc, key_codes.data(), key_codes.size())),
+       "ckc");
+    /*
+    DPCT1114:951: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_vb, value_bf16.data(), value_bf16.size() * 2)),
+       "cvb");
+    /*
+    DPCT1114:952: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_c1, conv1d_f16.data(), conv1d_f16.size() * 2)),
+       "cc1");
+
+    k::PleWeights w{};
+    w.key_codes = d_kc;
+    w.key_scales = key_scales.data();   // uploaded per call below so the pointer is a device one
+    w.value_bf16 = d_vb;
+    w.norm_key = d_nk;
+    w.norm_query = d_nq;
+    w.norm_conv = d_nc;
+    w.conv1d_f16 = d_c1;
+    float* d_ks = nullptr;
+    ck(DPCT_CHECK_ERROR(d_ks = (float *)sycl::malloc_device(
+                            key_scales.size() * 4, dpct::get_in_order_queue())),
+       "ks");
+    /*
+    DPCT1114:953: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d_ks, key_scales.data(), key_scales.size() * 4)),
+       "cks");
+    w.key_scales = d_ks;
+
+    // Per-stage comparison.  Each stage the oracle records is a separate line, so a mismatch says WHICH part
+    // of the block is wrong rather than only that the sum is.  The oracle writes each array token-major, so
+    // every slice is an explicit (offset, count) pair - deriving the offset from the stage's NAME, which the
+    // first version of this did, is a fixture that breaks the moment a name changes.
+    struct Stage { const char* name; const std::vector<float>* got; const std::vector<float>* all;
+                   size_t offset; size_t n; };
+    double worst_all = 0;
+
+    // THE CONV HISTORY ADVANCES BETWEEN TOKENS, and getting this wrong is why token 1 compared badly at
+    // first.  The capture is a TWO-TOKEN ubatch: ggml pads `[hist(9) | normalized(0..nt-1)]` ONCE and the conv
+    // reads rows `t+0, t+3, t+6, t+9` for output position t.  So token 1's window is rows 1,4,7 of the SAME
+    // history plus row 10 - which is token 1's own normalized - i.e. the state slides by one NORMALIZED row
+    // per token.  Feeding both tokens the original history compares my block's t=0 against ggml's t=1, and
+    // both my kernel and my host reference made the same mistake, so they agreed with each other and only the
+    // oracle could see it.
+    //
+    // ggml layout for the state is `ne=(hist, hc_dim)`: flat = row + NG_HIST*channel.
+    std::vector<float> hist_state = cap.hist;
+    for (int t = 0; t < cap.nt; ++t) {
+        /*
+        DPCT1114:954: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_emb, cap.emb.data() + (size_t)t * nd, nd * 4)),
+           "cemb");
+        /*
+        DPCT1114:955: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_hid, cap.hidden.data() + (size_t)t * hcd, hcd * 4)),
+           "chid");
+        /*
+        DPCT1114:956: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_hist, hist_state.data(), (size_t)k::NG_HIST * hcd * 4)),
+           "chist");
+        k::PleOut out{};
+        out.key = d_ck; out.value = d_cv; out.gate = d_g; out.gated = d_gd;
+        out.normalized = d_nm; out.conv = d_co; out.result = d_cr;
+        // the workspace is the caller's, and the sync the block used to do is now the caller's too
+    void* ple_ws = nullptr;
+    ck(DPCT_CHECK_ERROR(
+           ple_ws = (void *)sycl::malloc_device(k::ple_block_scratch_bytes(),
+                                                dpct::get_in_order_queue())),
+       "ple_block scratch");
+    if (t == 0) {
+        const size_t bytes = (size_t) k::ple_block_scratch_bytes();
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memset(ple_ws, 0xa5, bytes).wait()),
+           "PLE prelaunch guard sentinel");
+        const struct AliasCase { float* k::PleOut::* field; size_t offset; } cases[] = {
+            {&k::PleOut::key, 0}, {&k::PleOut::value, hcd}, {&k::PleOut::gate, hcd + nd},
+            {&k::PleOut::gated, hcd + nd + (size_t) k::NG_HC},
+            {&k::PleOut::normalized, 2 * hcd + nd + (size_t) k::NG_HC},
+            {&k::PleOut::conv, 3 * hcd + nd + (size_t) k::NG_HC}, {&k::PleOut::result, 0}
+        };
+        int refused = 0;
+        for (const auto& item : cases) {
+            k::PleOut invalid = out;
+            invalid.*(item.field) = static_cast<float*>(ple_ws) + item.offset;
+            try { k::ple_block(d_emb, d_hid, d_hist, w, invalid, ple_ws, nullptr); }
+            catch (const std::invalid_argument&) { ++refused; }
+        }
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "PLE guard no-launch sync");
+        std::vector<uint8_t> sentinel(bytes);
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(sentinel.data(), ple_ws, bytes)
+                                .wait()),
+           "PLE guard sentinel readback");
+        const bool unchanged = std::all_of(sentinel.begin(), sentinel.end(), [](uint8_t b) { return b == 0xa5; });
+        const bool rejected = refused == 7 && unchanged;
+        std::printf("  PLE old caller output offsets rejected before launch: %s (%d/7, scratch %s)\n",
+                    rejected ? "pass" : "FAIL", refused, unchanged ? "unchanged" : "CORRUPTED");
+        if (!rejected) ++bad;
+    }
+    k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "ple_block sync");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_key.data(), d_ck, hcd * 4)
+                                .wait()),
+           "rck");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_value.data(), d_cv, nd * 4)
+                                .wait()),
+           "rcv");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_gate.data(), d_g, k::NG_HC * 4)
+                                .wait()),
+           "rg");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_gated.data(), d_gd, hcd * 4)
+                                .wait()),
+           "rgd");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_norm.data(), d_nm, hcd * 4)
+                                .wait()),
+           "rnm");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_conv.data(), d_co, hcd * 4)
+                                .wait()),
+           "rco");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(dev_res.data(), d_cr, hcd * 4)
+                                .wait()),
+           "rcr");
+
+        const size_t ok_ = (size_t) t * hcd, ov = (size_t) t * nd, og = (size_t) t * (size_t) k::NG_HC;
+        const Stage stages[] = {
+            {"key        (grouped_norm of ple_key @ emb)", &dev_key, &cap.key, ok_, hcd},
+            {"value      (ple_value @ emb, BF16)", &dev_value, &cap.value, ov, nd},
+            {"gate       (signed sqrt, sigmoid)", &dev_gate, &cap.gate, og, (size_t) k::NG_HC},
+            {"gated      (value broadcast * gate)", &dev_gated, &cap.gated, ok_, hcd},
+            {"normalized (grouped_norm(gated, ple_norm_conv))", &dev_norm, &cap.normalized, ok_, hcd},
+            {"conv_out   (dilated conv, then SiLU)", &dev_conv, &cap.conv_out, ok_, hcd},
+            {"result     (hidden + gated + conv)", &dev_res, &cap.result, ok_, hcd},
+        };
+        for (const Stage& s : stages) {
+            std::vector<float> want(s.all->begin() + (long long) s.offset,
+                                    s.all->begin() + (long long) (s.offset + s.n));
+            double mag = 0;
+            long long nf = 0;
+            const double rel = rel_l1(want.data(), s.got->data(), s.n, &mag, &nf);
+            // NaN-SAFE: `rel > worst_all` is false for NaN, so `fmax` here would silently report a perfect
+            // score for a fixture full of NaNs - round 197's exact failure.
+            worst_all = (rel > worst_all) ? rel : worst_all;
+            if (nf) worst_all = std::nan("");
+            const bool last = (std::strncmp(s.name, "result", 6) == 0);
+            std::printf("  token %d %-46s rel %.3e   (mean |ref| %.4f, non-finite %lld)%s\n", t, s.name, rel,
+                        mag, nf, last && !le(rel, 1e-2) ? "   *** over 1e-2 ***" : "");
+            // TOLERANCE, and what sets it: this comparison is the GPU against a capture whose weights are
+            // F32, so ggml performed NO activation conversion while the kernel applies the CONTRACT (Q8_0
+            // for the Q2_0 weight, BF16 for the BF16 one).  The contract's per-element cost is 2^-9 = 1.95e-3
+            // for BF16 and ~0.4% for Q8_0, so the OUTPUT difference is ~2e-3 wherever there is no
+            // cancellation and larger where there is - `conv_out` cancels by ~77x and is the one stage that
+            // exceeds it.  `result` is the quantity that matters and 1e-2 is five times the contract's own
+            // per-element size, so it is a bound on "the contract and nothing else", not a judgement call.
+            // The HOST reference below uses the capture's own F32 weights and is asserted at 1e-4, which is
+            // what proves the difference here IS the contract.
+            if (last && !le(rel, 1e-2)) ++bad;
+        }
+
+        if (t == 0) {
+            // Deliberate BF16 halfway values make the value projection's activation precision visible.
+            // The scalar reference uses the actual packed BF16 weight bits and unrounded F32 inputs.
+            std::vector<float> witness(nd), reference_value(nd), native_value(nd), native_result(hcd), replay(hcd);
+            for (size_t i = 0; i < nd; ++i) witness[i] = i % 7 == 0 ? 1.00390625f : -0.501953125f;
+            for (size_t row = 0; row < nd; ++row) {
+                double sum = 0.0;
+                for (size_t col = 0; col < nd; ++col) {
+                    const uint32_t bits = uint32_t(value_bf16[row * nd + col]) << 16;
+                    float weight;
+                    std::memcpy(&weight, &bits, sizeof(weight));
+                    sum += double(weight) * witness[col];
+                }
+                reference_value[row] = float(sum);
+            }
+            /*
+            DPCT1114:957: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_emb, witness.data(), nd * sizeof(float))),
+               "native PLE witness");
+            k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()),
+               "legacy PLE witness sync");
+            std::vector<float> legacy_value(nd);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(legacy_value.data(), d_cv, nd * sizeof(float))
+                       .wait()),
+               "legacy PLE witness value");
+            dpct::queue_ptr stream;
+            /*
+            DPCT1025:958: The SYCL queue is created ignoring the flag and
+            priority options.
+            */
+            ck(DPCT_CHECK_ERROR(
+                   stream = dpct::get_current_device().create_queue(true)),
+               "native PLE stream");
+            k::ple_set_native_bf16(true);
+            k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, stream);
+            ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE sync");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(native_value.data(), d_cv, nd * sizeof(float))
+                       .wait()),
+               "native PLE value");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(native_result.data(), d_cr, hcd * sizeof(float))
+                       .wait()),
+               "native PLE result");
+            long long nf = 0;
+            const double rel = rel_l1(reference_value.data(), native_value.data(), nd, nullptr, &nf);
+            const double separation = rel_l1(native_value.data(), legacy_value.data(), nd);
+            const bool correct = le(rel, 2e-6) && nf == 0 && gt(separation, 1e-5);
+            std::printf("  native PLE value: %s (ref rel %.3e, BF16 separation %.3e)\n",
+                        correct ? "pass" : "FAIL", rel, separation);
+            if (!correct) ++bad;
+            dpct::experimental::command_graph_ptr graph;
+            dpct::experimental::command_graph_exec_ptr executable;
+            ck(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+               "native PLE capture");
+            k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, stream);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::experimental::end_recording(stream, &graph)),
+               "native PLE capture end");
+            ck(DPCT_CHECK_ERROR(
+                   executable =
+                       new sycl::ext::oneapi::experimental::command_graph<
+                           sycl::ext::oneapi::experimental::graph_state::
+                               executable>(graph->finalize())),
+               "native PLE instantiate");
+            k::ple_set_native_bf16(false);
+            ck(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
+               "native PLE replay");
+            ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE replay sync");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(replay.data(), d_cr, hcd * sizeof(float))
+                       .wait()),
+               "native PLE replay result");
+            const bool captured = std::memcmp(native_result.data(), replay.data(), hcd * sizeof(float)) == 0;
+            std::printf("  native PLE captured selection: %s\n", captured ? "byte-identical" : "FAIL");
+            if (!captured) ++bad;
+            ck(DPCT_CHECK_ERROR(delete (executable)),
+               "native PLE graph exec destroy");
+            ck(DPCT_CHECK_ERROR(delete (graph)), "native PLE graph destroy");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().destroy_queue(stream)),
+               "native PLE stream destroy");
+            /*
+            DPCT1114:959: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_emb, cap.emb.data(), nd * sizeof(float))),
+               "restore PLE embedding");
+            k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()),
+               "restored PLE sync");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(replay.data(), d_cr, hcd * sizeof(float))
+                       .wait()),
+               "restored PLE result");
+            const bool restored = std::memcmp(dev_res.data(), replay.data(), hcd * sizeof(float)) == 0;
+            std::printf("  restored PLE default: %s\n", restored ? "byte-identical" : "FAIL");
+            if (!restored) ++bad;
+        }
+
+        if (t == 0) {
+            // This checks native-projection wiring and graph lifetime, independently
+            // of the legacy CPU/F32 structural capture. Actual Q2_0 arithmetic is
+            // checked separately by native_mmvq_parity against the pinned CUDA DLL.
+            const size_t blocks = n_scales, native_bytes = blocks * 18, guard = 64;
+            const size_t qbytes = k::native_q8_1_bytes(k::NG_N_EMBD);
+            std::vector<uint8_t> native_key(native_bytes);
+            for (size_t b = 0; b < blocks; ++b) {
+                std::memcpy(native_key.data() + b * 18, raw_scales.data() + b * 2, 2);
+                std::memcpy(native_key.data() + b * 18 + 2, key_codes.data() + b * 16, 16);
+            }
+            void *native_storage = nullptr, *q_storage = nullptr;
+            float* raw_projection = nullptr;
+            ck(DPCT_CHECK_ERROR(
+                   native_storage = (void *)sycl::malloc_device(
+                       native_bytes + 2 * guard, dpct::get_in_order_queue())),
+               "native PLE weights");
+            ck(DPCT_CHECK_ERROR(
+                   q_storage = (void *)sycl::malloc_device(
+                       qbytes + 2 * guard, dpct::get_in_order_queue())),
+               "native PLE q8 scratch");
+            ck(DPCT_CHECK_ERROR(raw_projection = (float *)sycl::malloc_device(
+                                    hcd * 4, dpct::get_in_order_queue())),
+               "native PLE raw projection");
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memset(native_storage, 0xa5, native_bytes + 2 * guard)
+                       .wait()),
+               "native PLE weight guards");
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                    .memset(q_storage, 0xa5, qbytes + 2 * guard)
+                                    .wait()),
+               "native PLE q8 guards");
+            void* native_data = static_cast<uint8_t*>(native_storage) + guard;
+            void* native_q = static_cast<uint8_t*>(q_storage) + guard;
+            /*
+            DPCT1114:960: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   native_data, native_key.data(), native_bytes)),
+               "native PLE weights upload");
+            k::PleWeights nw = w;
+            nw.key_native_data = native_data; nw.key_native_type = 42; nw.key_native_q8_1 = native_q;
+            dpct::queue_ptr stream;
+            /*
+            DPCT1025:961: The SYCL queue is created ignoring the flag and
+            priority options.
+            */
+            ck(DPCT_CHECK_ERROR(
+                   stream = dpct::get_current_device().create_queue(true)),
+               "native PLE key stream");
+            const size_t workspace_bytes = (size_t) k::ple_block_scratch_bytes();
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                    .memset(ple_ws, 0xa5, workspace_bytes)
+                                    .wait()),
+               "native PLE no-launch sentinel");
+            int refused = 0;
+            for (int c = 0; c < 9; ++c) {
+                auto invalid = nw;
+                if (c == 0) invalid.key_native_type = 11;
+                if (c == 1) invalid.key_native_q8_1 = nullptr;
+                if (c == 3) invalid.key_native_q8_1 = ple_ws;
+                if (c == 4) invalid.key_native_q8_1 = d_emb;
+                if (c == 5) invalid.key_native_q8_1 = out.key;
+                if (c == 6) invalid.key_native_q8_1 = static_cast<uint8_t*>(native_q) + 1;
+                if (c == 7) invalid.key_native_data = static_cast<uint8_t*>(native_data) + 1;
+                if (c == 8) invalid.key_native_q8_1 = native_data;
+                try {
+                    k::ple_block(d_emb, d_hid, d_hist, invalid, out, ple_ws,
+                                 c == 2 ? &dpct::get_in_order_queue() : stream);
+                }
+                catch (const std::invalid_argument&) { ++refused; }
+            }
+            ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE refusal sync");
+            std::vector<uint8_t> sentinel(workspace_bytes);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(sentinel.data(), ple_ws, workspace_bytes)
+                       .wait()),
+               "native PLE refusal sentinel");
+            const bool untouched = std::all_of(sentinel.begin(), sentinel.end(), [](uint8_t x) { return x == 0xa5; });
+            std::printf("  native PLE key prelaunch guards: %s (%d/9, workspace %s)\n",
+                        refused == 9 && untouched ? "pass" : "FAIL", refused, untouched ? "unchanged" : "changed");
+            if (refused != 9 || !untouched) ++bad;
+            dpct::experimental::command_graph_ptr graph = nullptr;
+                dpct::experimental::command_graph_exec_ptr executable = nullptr;
+            std::vector<float> projected(hcd), normalized(hcd), actual_key(hcd), actual_result(hcd), replay(hcd);
+            for (int p = 0; p < std::min(cap.nt, 2); ++p) {
+                /*
+                DPCT1114:962: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
+                */
+                ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                       d_emb, cap.emb.data() + (size_t)p * nd, nd * 4)),
+                   "native PLE key input");
+                k::native_q2_0_f32(native_data, d_emb, native_q, raw_projection, k::NG_N_EMBD, k::NG_HC_DIM, 1, stream);
+                ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE raw key sync");
+                ck(DPCT_CHECK_ERROR(
+                       dpct::get_in_order_queue()
+                           .memcpy(projected.data(), raw_projection, hcd * 4)
+                           .wait()),
+                   "native PLE raw key read");
+                for (int c = 0; c < k::NG_HC; ++c) {
+                    double sum = 0;
+                    for (size_t j = 0; j < nd; ++j) { const float v = projected[(size_t) c * nd + j]; sum += double(v * v); }
+                    const float scale = 1.0f / std::sqrt(float(sum / double(nd)) + k::NG_RMS_EPS);
+                    for (size_t j = 0; j < nd; ++j) { const size_t i = (size_t) c * nd + j; normalized[i] = projected[i] * scale * cap.w_nk[i]; }
+                }
+                k::ple_block(d_emb, d_hid, d_hist, nw, out, ple_ws, stream);
+                ck(DPCT_CHECK_ERROR(stream->wait()),
+                   "native PLE key direct sync");
+                ck(DPCT_CHECK_ERROR(
+                       dpct::get_in_order_queue()
+                           .memcpy(actual_key.data(), d_ck, hcd * 4)
+                           .wait()),
+                   "native PLE key read");
+                ck(DPCT_CHECK_ERROR(
+                       dpct::get_in_order_queue()
+                           .memcpy(actual_result.data(), d_cr, hcd * 4)
+                           .wait()),
+                   "native PLE result read");
+                const double rel = rel_l1(normalized.data(), actual_key.data(), hcd);
+                const bool wired = le(rel, 2e-6) && nonfinite(actual_result.data(), hcd) == 0;
+                std::printf("  native PLE key projection->existing norm input %d: %s (rel %.3e)\n", p, wired ? "pass" : "FAIL", rel);
+                if (!wired) ++bad;
+                if (p == 0) {
+                    ck(DPCT_CHECK_ERROR(
+                           dpct::experimental::begin_recording(stream)),
+                       "native PLE key capture");
+                    k::ple_block(d_emb, d_hid, d_hist, nw, out, ple_ws, stream);
+                    ck(DPCT_CHECK_ERROR(
+                           dpct::experimental::end_recording(stream, &graph)),
+                       "native PLE key capture end");
+                    ck(DPCT_CHECK_ERROR(
+                           executable = new sycl::ext::oneapi::experimental::
+                               command_graph<sycl::ext::oneapi::experimental::
+                                                 graph_state::executable>(
+                                   graph->finalize())),
+                       "native PLE key instantiate");
+                }
+                nw.key_native_data = nullptr; // graph selection must survive descriptor changes
+                for (int repeat = 0; repeat < 2; ++repeat) {
+                    ck(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
+                       "native PLE key replay");
+                    ck(DPCT_CHECK_ERROR(stream->wait()),
+                       "native PLE key replay sync");
+                    ck(DPCT_CHECK_ERROR(
+                           dpct::get_in_order_queue()
+                               .memcpy(replay.data(), d_cr, hcd * 4)
+                               .wait()),
+                       "native PLE key replay read");
+                    if (std::memcmp(actual_result.data(), replay.data(), hcd * 4) != 0) ++bad;
+                }
+                nw.key_native_data = native_data;
+            }
+            ck(DPCT_CHECK_ERROR(delete (executable)),
+               "native PLE key executable destroy");
+            ck(DPCT_CHECK_ERROR(delete (graph)),
+               "native PLE key graph destroy");
+            for (int b = 0; b < 2; ++b) {
+                const void* storage = b == 0 ? native_storage : q_storage;
+                const size_t payload = b == 0 ? native_bytes : qbytes;
+                std::vector<uint8_t> ends(2 * guard);
+                ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                        .memcpy(ends.data(), storage, guard)
+                                        .wait()),
+                   "native PLE prefix guard");
+                ck(DPCT_CHECK_ERROR(
+                       dpct::get_in_order_queue()
+                           .memcpy(ends.data() + guard,
+                                   static_cast<const uint8_t *>(storage) +
+                                       guard + payload,
+                                   guard)
+                           .wait()),
+                   "native PLE suffix guard");
+                if (!std::all_of(ends.begin(), ends.end(), [](uint8_t x) { return x == 0xa5; })) ++bad;
+            }
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().destroy_queue(stream)),
+               "native PLE key stream destroy");
+            sycl::free(raw_projection, dpct::get_in_order_queue());
+                sycl::free(q_storage, dpct::get_in_order_queue());
+                sycl::free(native_storage, dpct::get_in_order_queue());
+            /*
+            DPCT1114:963: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_emb, cap.emb.data(), nd * 4)),
+               "native PLE restore input");
+            k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()),
+               "native PLE default restore sync");
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                    .memcpy(replay.data(), d_cr, hcd * 4)
+                                    .wait()),
+               "native PLE default restore read");
+            const bool restored = std::memcmp(dev_res.data(), replay.data(), hcd * 4) == 0;
+            std::printf("  native PLE key graph/repeat/buffer guards checked; restored default: %s\n", restored ? "byte-identical" : "FAIL");
+            if (!restored) ++bad;
+        }
+
+        if (t == 0) {
+            // The engine only needs result and normalized. Export normalized after the complete private
+            // workspace; result may overwrite hidden once its original values are no longer needed.
+            const size_t workspace_bytes = (size_t) k::ple_block_scratch_bytes();
+            void* compact_workspace = nullptr;
+            ck(DPCT_CHECK_ERROR(compact_workspace = (void *)sycl::malloc_device(
+                                    workspace_bytes + hcd * sizeof(float),
+                                    dpct::get_in_order_queue())),
+               "compact PLE workspace");
+            k::PleOut compact{};
+            compact.normalized = reinterpret_cast<float*>(static_cast<uint8_t*>(compact_workspace) + workspace_bytes);
+            compact.result = d_hid;
+            k::ple_block(d_emb, d_hid, d_hist, w, compact, compact_workspace, nullptr);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()),
+               "compact PLE sync");
+            std::vector<float> compact_norm(hcd), compact_result(hcd);
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                    .memcpy(compact_norm.data(),
+                                            compact.normalized,
+                                            hcd * sizeof(float))
+                                    .wait()),
+               "compact PLE normalized");
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                    .memcpy(compact_result.data(), d_hid,
+                                            hcd * sizeof(float))
+                                    .wait()),
+               "compact PLE result");
+            const bool equal = std::memcmp(compact_norm.data(), dev_norm.data(), hcd * sizeof(float)) == 0 &&
+                               std::memcmp(compact_result.data(), dev_res.data(), hcd * sizeof(float)) == 0;
+            std::printf("  PLE separate exports and in-place hidden result: %s\n", equal ? "byte-identical" : "FAIL");
+            if (!equal) ++bad;
+            /*
+            DPCT1114:964: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_hid, cap.hidden.data(), hcd * sizeof(float))),
+               "restore PLE hidden input");
+            sycl::free(compact_workspace, dpct::get_in_order_queue());
+        }
+
+        // slide the conv state by one NORMALIZED row, which is what the next token's window needs
+        for (size_t c = 0; c < hcd; ++c)
+            for (size_t r = 0; r + 1 < (size_t) k::NG_HIST; ++r)
+                hist_state[r + (size_t) k::NG_HIST * c] = hist_state[(r + 1) + (size_t) k::NG_HIST * c];
+        for (size_t c = 0; c < hcd; ++c)
+            hist_state[((size_t) k::NG_HIST - 1) + (size_t) k::NG_HIST * c] = dev_norm[c];
+        sycl::free(ple_ws, dpct::get_in_order_queue());
+    }
+
+    // ---- the trap that matters most: gated vs normalized as the conv input --------------------------
+    // `ref/ngram.py`'s docstring calls `terms` "the padded gated values"; the source pads `normalized`.
+    // Feeding the conv the gated values instead is a one-word change with every shape intact, so it is
+    // computed here and required to differ.
+    {
+        const double rel_norm_gated = rel_l1(cap.gated.data(), cap.normalized.data(), hcd);
+        std::printf("  %-52s %s (%.2f%% apart)\n", "normalized vs gated as the conv input is observable",
+                    rel_norm_gated > 0.05 ? "yes" : "*** NO ***", rel_norm_gated * 100);
+        if (!(rel_norm_gated > 0.05)) ++bad;
+    }
+
+    // ---- the conv TAP ORDER: tap 0 reads the furthest back, not the current row ---------------------
+    {
+        // Recompute the conv on the host with the taps reversed, from the ORACLE's own `normalized`, and
+        // require the result to differ from the oracle's conv_out.
+        const size_t hcd2 = hcd;
+        std::vector<float> rev(hcd2, 0.0f);
+        for (size_t c = 0; c < hcd2; ++c) {
+            float acc = 0;
+            for (int kk = 0; kk < k::PLE_CONV_KERNEL; ++kk) {
+                // THE RIVAL READING OF THE TAP CONVENTION.  ggml's is `t - (K-1-k)*d`, i.e. tap 0 reads the
+                // FURTHEST back; the natural misreading is `t - k*d`, i.e. tap 0 reads the CURRENT row.
+                //
+                // The first version of this trap wrote `row = kk*dil` for the rival - which is ALGEBRAICALLY
+                // THE SAME as the correct `hist - (K-1-kk)*dil` whenever `hist == (K-1)*dil`, because
+                // `9-(3-kk)*3 == 3kk` identically.  It reported "0.00% apart" and was measuring nothing.
+                // The rival has to REVERSE the row order: `(K-1-kk)*dil` gives 9,6,3,0 against the correct
+                // 0,3,6,9, so tap 0 pairs the kernel's first weight with the NEWEST row instead of the oldest.
+                const int row = (k::PLE_CONV_KERNEL - 1 - kk) * k::NGRAM_SIZE;
+                // ROW-FASTEST: the capture's history is ggml's `ne=(hist, hc_dim)`, flat = row + hist*channel
+                const float v = (row == k::NG_HIST) ? cap.normalized[c]
+                                                    : cap.hist[(size_t) row + (size_t) k::NG_HIST * c];
+                // GGML-NATIVE: `w_conv[k + kern*c]`, because the capture's tensor is ne=(kern, hc_dim) with
+                // ne0 = kern fast.  `w_conv[kk*hc_dim + c]` is the TRANSPOSE and is what this reference had
+                // first - it reported 115% on conv_out while the GPU kernel, which carries the layout note,
+                // was within 4.6e-02.  The oracle caught the reference, not the kernel, which is the whole
+                // reason for having one.
+                acc += cap.w_conv[(size_t) kk + (size_t) k::PLE_CONV_KERNEL * c] * v;
+            }
+            rev[c] = acc / (1.0f + std::exp(-acc));
+        }
+        const double rel = rel_l1(cap.conv_out.data(), rev.data(), hcd2);
+        std::printf("  %-52s %s (%.2f%% apart)\n", "reversed conv tap order is observable",
+                    gt(rel, 0.05) ? "yes" : "*** NO ***", rel * 100);
+        if (!gt(rel, 0.05)) ++bad;
+    }
+
+    // ---- THE HOST f32 REFERENCE, which is what makes the gaps above ATTRIBUTABLE rather than mysterious.
+    //
+    // `ple_layer_xcheck.cpp` builds ggml's graph with the weights as **F32 tensors** (`ggml_new_tensor_2d(...,
+    // GGML_TYPE_F32, ...)`).  `ggml_mul_mat` converts src1 to src0's `vec_dot_type`, so with an F32 weight
+    // ggml performs NO activation conversion at all - while the real `ple_key` is Q2_0 (contract Q8_0) and the
+    // real `ple_value` is BF16 (contract BF16).
+    //
+    // **The capture is therefore a valid oracle for the STRUCTURE and not for the ACTIVATION CONTRACT.**  This
+    // reference reproduces it exactly, in f32, using the capture's own weights - which proves every LAYOUT in
+    // the block (the conv kernel's `k + kern*c`, the row-fastest history, per-stream grouped norms, the
+    // head-slowest gather) independently of the GPU.  Whatever gap remains between the GPU and the capture is
+    // then exactly the contract, and nothing else.
+    // Hoisted out of the reference block below: the term-magnitude metric needs the state the LAST token
+    // used, and that block has already closed by the time it runs.
+    std::vector<float> hist_last;
+    {
+        const size_t H = hcd, N = nd;
+        std::vector<float> k_ref(H), q_ref(H), v_ref(N), gt_ref(k::NG_HC), gd_ref(H), nm_ref(H), cv_ref(H),
+            rs_ref(H);
+        auto gnorm = [&](const float* x, const float* w, float* y, int n) {
+            for (int c = 0; c < k::NG_HC; ++c) {
+                double sum = 0.0;
+                for (int d = 0; d < k::NG_N_EMBD; ++d) {
+                    const float xv = x[c * k::NG_N_EMBD + d];
+                    sum += (double) (xv * xv);                 // f32 product, widened - as ggml does
+                }
+                const float mean = (float) (sum / k::NG_N_EMBD);
+                const float scale = 1.0f / std::sqrt(mean + cap.eps);
+                for (int d = 0; d < k::NG_N_EMBD; ++d)
+                    y[c * k::NG_N_EMBD + d] = x[c * k::NG_N_EMBD + d] * scale * w[c * k::NG_N_EMBD + d];
+            }
+            (void) n;
+        };
+        // The SAME history advance as the GPU loop, so the two are compared on identical inputs.
+        std::vector<float> hist_ref = cap.hist;
+        for (int t = 0; t < cap.nt; ++t) {
+            const float* emb = cap.emb.data() + (size_t) t * N;
+            const float* hid = cap.hidden.data() + (size_t) t * H;
+            // key = w_key @ emb, with the capture's F32 weight and NO activation conversion
+            for (size_t o = 0; o < H; ++o) {
+                double a = 0;
+                for (size_t i = 0; i < N; ++i) a += (double) cap.w_key[o * N + i] * (double) emb[i];
+                k_ref[o] = (float) a;
+            }
+            gnorm(k_ref.data(), cap.w_nk.data(), k_ref.data(), k::NG_N_EMBD);
+            gnorm(hid, cap.w_nq.data(), q_ref.data(), k::NG_N_EMBD);
+            for (size_t o = 0; o < N; ++o) {
+                double a = 0;
+                for (size_t i = 0; i < N; ++i) a += (double) cap.w_value[o * N + i] * (double) emb[i];
+                v_ref[o] = (float) a;
+            }
+            for (int c = 0; c < k::NG_HC; ++c) {
+                double a = 0;
+                for (int d = 0; d < k::NG_N_EMBD; ++d)
+                    a += (double) k_ref[c * k::NG_N_EMBD + d] * (double) q_ref[c * k::NG_N_EMBD + d];
+                const float s = (float) (a / (double) 1.0) / std::sqrt((float) k::NG_N_EMBD);
+                const float mag = std::sqrt(std::fmax(std::fabs(s), 1e-6f));
+                const float sgn = (s > 0) ? 1.0f : ((s < 0) ? -1.0f : 0.0f);
+                gt_ref[c] = 1.0f / (1.0f + std::exp(-(sgn * mag)));
+            }
+            for (size_t i = 0; i < H; ++i)
+                gd_ref[i] = v_ref[i % N] * gt_ref[i / N];
+            gnorm(gd_ref.data(), cap.w_nc.data(), nm_ref.data(), k::NG_N_EMBD);
+            for (size_t c = 0; c < H; ++c) {
+                float acc = 0;
+                for (int kk = 0; kk < k::PLE_CONV_KERNEL; ++kk) {
+                    const int row = k::NG_HIST - (k::PLE_CONV_KERNEL - 1 - kk) * k::NGRAM_SIZE;
+                    // capture history is ggml `ne=(hist, hc_dim)`: flat = row + hist*channel.  `hist_ref` is
+                    // the ADVANCED state, so this reference sees exactly what the GPU call saw.
+                    const float vv = (row == k::NG_HIST) ? nm_ref[c]
+                                                        : hist_ref[(size_t) row + (size_t) k::NG_HIST * c];
+                    acc += cap.w_conv[(size_t) kk + (size_t) k::PLE_CONV_KERNEL * c] * vv;
+                }
+                cv_ref[c] = acc / (1.0f + std::exp(-acc));
+            }
+            for (size_t i = 0; i < H; ++i) rs_ref[i] = hid[i] + gd_ref[i] + cv_ref[i];
+
+            const size_t ok_ = (size_t) t * H, ov = (size_t) t * N, og = (size_t) t * (size_t) k::NG_HC;
+            struct HCmp { const char* name; const std::vector<float>* got; const std::vector<float>* all;
+                          size_t off; size_t n; };
+            const HCmp cmps[] = {
+                {"key", &k_ref, &cap.key, ok_, H},          {"value", &v_ref, &cap.value, ov, N},
+                {"gate", &gt_ref, &cap.gate, og, (size_t) k::NG_HC},
+                {"gated", &gd_ref, &cap.gated, ok_, H},     {"normalized", &nm_ref, &cap.normalized, ok_, H},
+                {"conv_out", &cv_ref, &cap.conv_out, ok_, H},
+                {"result", &rs_ref, &cap.result, ok_, H},
+            };
+            for (const HCmp& s : cmps) {
+                std::vector<float> want(s.all->begin() + (long long) s.off,
+                                        s.all->begin() + (long long) (s.off + s.n));
+                long long nf = 0;
+                const double rel = rel_l1(want.data(), s.got->data(), s.n, nullptr, &nf);
+                const bool ok = le(rel, 1e-4) && nf == 0;
+                std::printf("  host f32 reference, token %d %-12s rel %.3e (non-finite %lld)%s\n", t, s.name,
+                            rel, nf, ok ? "" : "   *** FAIL ***");
+                if (!ok) ++bad;
+            }
+
+            // save the state this token used, then slide it - identical to the GPU-side advance
+            if (t == cap.nt - 1) hist_last = hist_ref;
+            for (size_t c = 0; c < hcd; ++c)
+                for (size_t r = 0; r + 1 < (size_t) k::NG_HIST; ++r)
+                    hist_ref[r + (size_t) k::NG_HIST * c] = hist_ref[(r + 1) + (size_t) k::NG_HIST * c];
+            for (size_t c = 0; c < hcd; ++c)
+                hist_ref[((size_t) k::NG_HIST - 1) + (size_t) k::NG_HIST * c] = nm_ref[c];
+        }
+        // TOLERANCE: 1e-4.  Both sides are f32 (or f64-accumulated) sums of 2560 products, so the only
+        // difference is summation ORDER, which is ~n*eps = 2560*6e-8 = 1.5e-4 worst case and far less in
+        // practice.  A STRUCTURAL error - a transposed conv kernel, a channel-slow history, a head-fastest
+        // gather - is O(1), so the two are three orders apart and the bound is not a judgement call.
+    }
+
+    // ---- `conv_out`'s error must be measured against the TERMS, not the result ----------------------
+    //
+    // The dilated conv sums four terms and the sum CANCELS: `normalized` has mean |.| around 0.70 and the
+    // result's is around 0.009, a factor of ~77.  Dividing by the result therefore reports the CONDITION
+    // NUMBER and not the arithmetic - the same metric mistake this project has made four times (rounds 169,
+    // 189, 194, 196), and it is what made `conv_out` look like the worst stage at 4.55e-02.
+    {
+        // `dev_conv` holds the LAST token after the loop above, and the capture is token-major.
+        const float* oc = cap.conv_out.data() + (size_t) (cap.nt - 1) * hcd;
+        double num = 0, terms = 0, res = 0;
+        for (size_t c = 0; c < hcd; ++c) {
+            double t_sum = 0;
+            for (int kk = 0; kk < k::PLE_CONV_KERNEL; ++kk) {
+                const int row = k::NG_HIST - (k::PLE_CONV_KERNEL - 1 - kk) * k::NGRAM_SIZE;
+                const float v = (row == k::NG_HIST)
+                                    ? cap.normalized[(size_t) (cap.nt - 1) * hcd + c]
+                                    : hist_last[(size_t) row + (size_t) k::NG_HIST * c];
+                t_sum += std::fabs((double) cap.w_conv[(size_t) kk + (size_t) k::PLE_CONV_KERNEL * c] *
+                                   (double) v);
+            }
+            terms += t_sum;
+            res += std::fabs((double) oc[c]);
+            num += std::fabs((double) oc[c] - (double) dev_conv[c]);
+        }
+        std::printf("\n  conv_out (token %d) against the TERM magnitude, not the result: rel %.3e"
+                    "   (|result|/|terms| = %.4f)\n",
+                    cap.nt - 1, num / terms, res / terms);
+    }
+
+    std::printf("\nple_parity: %d failures (worst stage rel %.3e)\n", bad, worst_all);
+    if (bad) return 1;
+    if (selftest) std::printf("ple_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/qsa_parity.cpp b/sycl/src/kernels/qsa_parity.cpp
new file mode 100644
index 00000000000..9203750990b
--- /dev/null
+++ b/sycl/src/kernels/qsa_parity.cpp
@@ -0,0 +1,1459 @@
+// src/kernels/qsa_parity.cpp - P2.S2's test for the QSA cache, indexer, selection and attention.
+//
+// `ref/qsa.py` carries eleven PROPERTY checks and `ref/model.py::_qsa` is the layer as the model runs it.  The
+// readings a prose transcription gets WRONG, each of which produces a well-formed result of the right shape,
+// are computed here the wrong way round AND required to differ MATERIALLY before the kernel is judged against
+// the right one - a test that only does the second half passes against either reading:
+//
+//   1. `pooled[b]` is rotated at the block's FIRST cell.  The reference's PROPERTY 4 pins it against the
+//      block's LAST cell; both give a unit-norm vector and the same downstream shape.
+//   2. Pool THEN norm (`rms_norm(mean(x))`) and not norm THEN pool (`mean(rms_norm(x))`).  `ref/model.py` L358
+//      is explicit, and the two differ whenever the four cells have different magnitudes.
+//   3. The spare slot's key is `rms_norm(raw[0])` - cell ZERO - and not the last raw key, and the tail cells
+//      map to THAT slot and not to the last complete block.  A three-row raw tail cannot produce it unless
+//      cell 0's key is kept, which is what makes this a real design constraint rather than a detail.
+//   4. The indexer's Relu is PER HEAD, summed afterwards.  `relu(sum_h dot_h)` is the rival reading and
+//      differs whenever any head's dot is negative.
+//   5. The q -> kv head map is `q / 12` (integer division), NOT `q % 2`.  `ref/qsa.py` PROPERTY 7 tests the
+//      same thing; with 24 and 2 the two give [0 x12, 1 x12] and [0,1,0,1,...].
+//   6. The attention reads ONLY the selected cells.  The source writes -inf into the mask and zeros at the
+//      top-k indices, so an unselected cell has weight exactly zero even when it would score highest -
+//      PROPERTY 8's fixture, reproduced here with its own numbers.
+//   7. `attn *= sigmoid(gate)` with the gate taken from the SECOND half of each head's 2*head_dim block, and
+//      the rounding to fp16 happening AFTER the multiply (one rounding, not two).
+//   8. The KV cache is PAGED and the page table is not assumed to be the identity: the pool is written and
+//      read back at page_size 1, 4 and 512 with a REVERSED table, and the kernel's own reading of the layout
+//      is compared against two rivals (linear, i.e. the table ignored; and cell-major inside the page).
+//
+// THE METRIC.  Both sums here - the indexer's sum of four relu'd dots and the attention's weighted sum of
+// value rows - cancel, so a plain |want-got|/|want| reports the condition number instead of the arithmetic.
+// The project has made that mistake four times (rounds 169, 189, 194, 196); where a sum is compared below, the
+// denominator is the magnitude of the TERMS.
+//
+// WHAT SETS EACH TOLERANCE, because a tolerance nobody can explain is one nobody can tighten:
+//   * the fp16 converter, the pool contents, the gathered scratch and the spare indexer key: EXACT.  The only
+//     arithmetic is a conversion, and section 0 checks that conversion against numpy's float16 over 395
+//     vectors covering ties in both directions, subnormals and overflow - an oracle sharing no code with it -
+//     plus all 65,536 fp16 patterns in the reverse direction.
+//   * the pooled block keys: 1e-6.  The pooling and the norm are double on both sides and are bit-exact
+//     BEFORE the rotation; the residual is `rope_neox_apply` (f32, reused rather than re-implemented) against
+//     the reference's float64 rotation, the class round 189 measured at ~1e-7.
+//   * the indexer scores: 1e-6 against Sum|dot_h| + |bias|, set by the fp32 storage of the pooled keys -
+//     2^-24 per element over a 128-term dot.
+//   * the selected ids: EXACT.  `docs/capture-format.md` L127 gives `indexer_ids` no tolerance.
+//   * the attention against a reference reading the SAME fp16 cache: 1e-5, set by f32 accumulation over
+//     256-term dots plus `expf`'s 2 ulp.  This is the KERNEL's number.
+//   * the attention against a reference reading the f32 keys: REPORTED and then checked against the phase's
+//     1e-3 for FP16 paths.  That difference is the FP16 CACHE's cost, not the kernel's, and it is kept
+//     separate so a kernel bug cannot hide inside it.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/qsa.hpp"
+
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/rope.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <functional>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+using strata::kernels::f16_from_f32;
+using strata::kernels::f32_from_f16;
+
+void check(dpct::err0 e, const char *what) {
+}
+
+/// A device buffer with the boilerplate folded in.  A test that allocates twenty buffers by hand spends its
+/// attention on memcpy arguments instead of on the kernel.
+template <typename T>
+struct Dev {
+    T* p = nullptr;
+    Dev() = default;
+    explicit Dev(size_t n) { alloc(n); }
+    ~Dev() { if (p) sycl::free(p, dpct::get_in_order_queue()); }
+    Dev(const Dev&) = delete;
+    Dev& operator=(const Dev&) = delete;
+    void alloc(size_t n) {
+        if (p) { sycl::free(p, dpct::get_in_order_queue()); p = nullptr; }
+        if (n) check(
+            DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                                 n * sizeof(T), dpct::get_in_order_queue())),
+            "cudaMalloc");
+    }
+    void put(const std::vector<T>& v) {
+        if (!p) alloc(v.size());
+        /*
+        DPCT1114:1008: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  p, v.data(), v.size() * sizeof(T))),
+              "H2D");
+    }
+    std::vector<T> get(size_t n) const {
+        std::vector<T> v(n);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(v.data(), p, n * sizeof(T))
+                                   .wait()),
+              "D2H");
+        return v;
+    }
+};
+
+std::vector<double> as_d(const std::vector<float>& v) { return std::vector<double>(v.begin(), v.end()); }
+std::vector<float> as_f(const std::vector<double>& v) {
+    std::vector<float> o(v.size());
+    for (size_t i = 0; i < v.size(); ++i) o[i] = (float) v[i];
+    return o;
+}
+
+/// Relative error against the magnitude of the TERMS.  See the header comment.
+double rel_terms(double want, double got, double terms) {
+    return std::fabs(want - got) / (terms > 1e-30 ? terms : 1e-30);
+}
+
+double rel_l1(const std::vector<double>& a, const std::vector<double>& b) {
+    double d = 0, m = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs(a[i] - b[i]);
+        m += std::fabs(a[i]);
+    }
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+int g_bad = 0;
+std::string pct(double rel) {
+    char b[32];
+    std::snprintf(b, sizeof b, "%.2f%% apart", rel * 100.0);
+    return b;
+}
+void verdict(const std::string& name, bool ok, const std::string& detail = "") {
+    std::printf("  %-48s %-6s %s\n", name.c_str(), ok ? "yes" : "*** NO ***", detail.c_str());
+    if (!ok) ++g_bad;
+}
+void report(const std::string& name, double v, const char* unit) {
+    std::printf("  %-48s %s %.3e\n", name.c_str(), unit, v);
+}
+void require(const std::string& name, bool ok, const std::string& detail = "") {
+    std::printf("  %-48s %-6s %s\n", name.c_str(), ok ? "ok" : "*** BAD ***", detail.c_str());
+    if (!ok) ++g_bad;
+}
+
+// ================= the reference: ref/qsa.py + ref/model.py, in double =================
+
+/// Which of the rival readings to compute.  The defaults are the SOURCE's reading.
+struct Alt {
+    bool rotate_at_block_start = true;  ///< false: rotate at the block's LAST cell         (WRONG)
+    bool pool_then_norm = true;         ///< false: mean of the per-cell norms              (WRONG)
+    bool dead_from_first = true;        ///< false: the spare key from the LAST raw key     (WRONG)
+    bool rope_raw = false;              ///< true:  rotate the raw keys before pooling      (WRONG)
+    bool relu_per_head = true;          ///< false: relu(sum of the head dots)              (WRONG)
+    bool use_relu = true;               ///< false: no relu at all                          (WRONG)
+    bool use_bias = true;               ///< false: drop the per-block bias                 (WRONG)
+    bool kv_divide = true;              ///< false: q % n_head_kv instead of q / 12          (WRONG)
+    bool apply_scale = true;            ///< false: no 1/sqrt(head_dim)                      (WRONG)
+    bool gate_second_half = true;       ///< false: the gate from the FIRST half             (WRONG)
+    bool gate_sigmoid = true;           ///< false: silu instead of sigmoid                  (WRONG)
+};
+
+/// `x*y + z` with the product ROUNDED first, i.e. no FMA contraction.
+///
+/// MSVC contracts `ss += v*v` into an FMA even under /fp:precise, so the reference was MORE accurate than
+/// the kernel's explicit `__fadd_rn(__fmul_rn(v, v))` and the spare key came out one bit different in 7 of
+/// 128 components.  The kernel's arithmetic is what is under test, so the reference REPRODUCES it instead of
+/// beating it; `volatile` is what stops the compiler re-fusing the two operations.
+double mul_add_plain(double x, double y, double z) {
+    const volatile double p = x * y;
+    return z + p;
+}
+
+/// `ref/qsa.py::rms_norm` in double, in place.  `w` may be empty (w = None).
+void ref_rms_norm(std::vector<double>& x, const std::vector<float>& w, float eps) {
+    double ss = 0;
+    for (double v : x) ss = mul_add_plain(v, v, ss);
+    const double inv = 1.0 / std::sqrt(ss / (double) x.size() + (double) eps);
+    for (size_t i = 0; i < x.size(); ++i) x[i] = x[i] * inv * (w.empty() ? 1.0 : (double) w[i]);
+}
+
+/// `ref/qsa.py::rope_neox` in double: NEOX pairs (i, i + n_rot/2), partial over the first n_rot dims.
+///
+/// `terms`, when given, receives the magnitude of each component's TERMS - `|a c| + |b s|` where the
+/// rotation subtracts - so a comparison can divide by that instead of by the result, which cancels.
+void ref_rope_neox(std::vector<double>& x, double pos, int n_rot, double theta,
+                   std::vector<double>* terms = nullptr) {
+    const int half = n_rot / 2;
+    std::vector<double> a(x.begin(), x.begin() + half), b(x.begin() + half, x.begin() + n_rot);
+    if (terms) {
+        terms->assign(x.size(), 0.0);
+        for (size_t i = (size_t) n_rot; i < x.size(); ++i) (*terms)[i] = std::fabs(x[i]);
+    }
+    for (int i = 0; i < half; ++i) {
+        const double inv = std::pow(theta, -2.0 * (double) i / (double) n_rot);
+        const double ang = pos * inv, c = std::cos(ang), s = std::sin(ang);
+        x[i] = a[i] * c - b[i] * s;
+        x[half + i] = a[i] * s + b[i] * c;
+        if (terms) {
+            (*terms)[i] = std::fabs(a[i] * c) + std::fabs(b[i] * s);
+            (*terms)[half + i] = std::fabs(a[i] * s) + std::fabs(b[i] * c);
+        }
+    }
+}
+
+const int64_t REF_R = 4;    ///< IDX_BLOCK, checked against the shapes at the top of main
+
+/// `QsaCache`, holding f64 rows - the reference never sees an fp16 key.
+struct RefCache {
+    std::vector<std::vector<double>> k, v, raw;
+    std::vector<double> pos;
+    int64_t size() const { return (int64_t) pos.size(); }
+    void append(std::vector<double> kk, std::vector<double> vv, std::vector<double> rr, double p) {
+        k.push_back(std::move(kk));
+        v.push_back(std::move(vv));
+        raw.push_back(std::move(rr));
+        pos.push_back(p);
+    }
+};
+
+/// `QsaCache.pooled_raw(r)` - BEFORE the norm, which is the only place the 1/r divisor is observable.
+std::vector<double> ref_pooled_raw(const RefCache& c) {
+    const int64_t n_bid = c.size() / REF_R, dim = (int64_t) c.raw[0].size();
+    std::vector<double> out((size_t) n_bid * dim, 0.0);
+    for (int64_t b = 0; b < n_bid; ++b)
+        for (int64_t i = 0; i < REF_R; ++i)
+            for (int64_t d = 0; d < dim; ++d) out[(size_t) b * dim + d] += c.raw[(size_t) (b * REF_R + i)][(size_t) d];
+    for (auto& x : out) x /= (double) REF_R;
+    return out;
+}
+
+/// `pooled_keys` + `dead_pooled_key`, in the readback order `indexer_scores` uses: (n_bid + 1, idx_dim).
+std::vector<double> ref_pooled(const RefCache& c, const std::vector<float>& w_kn, float eps, int n_rot,
+                               double theta, const Alt& o,
+                               std::vector<double>* terms_out = nullptr) {
+    const int64_t n_bid = c.size() / REF_R, dim = (int64_t) c.raw[0].size();
+    std::vector<double> pooled((size_t) (n_bid + 1) * dim, 0.0);
+    std::vector<std::vector<double>> rows(c.raw);
+    if (o.rope_raw)
+        for (size_t j = 0; j < rows.size(); ++j) ref_rope_neox(rows[j], c.pos[j], n_rot, theta);
+
+    for (int64_t b = 0; b < n_bid; ++b) {
+        std::vector<double> m((size_t) dim, 0.0);
+        if (o.pool_then_norm) {
+            for (int64_t i = 0; i < REF_R; ++i)
+                for (int64_t d = 0; d < dim; ++d)
+                    m[(size_t) d] += rows[(size_t) (b * REF_R + i)][(size_t) d] / (double) REF_R;
+            ref_rms_norm(m, w_kn, eps);
+        } else {
+            for (int64_t i = 0; i < REF_R; ++i) {
+                std::vector<double> one = rows[(size_t) (b * REF_R + i)];
+                ref_rms_norm(one, w_kn, eps);
+                for (int64_t d = 0; d < dim; ++d) m[(size_t) d] += one[(size_t) d] / (double) REF_R;
+            }
+        }
+        std::vector<double> terms;
+        ref_rope_neox(m, o.rotate_at_block_start ? c.pos[(size_t) (b * REF_R)]
+                                                 : c.pos[(size_t) (b * REF_R + REF_R - 1)],
+                      n_rot, theta, terms_out ? &terms : nullptr);
+        for (int64_t d = 0; d < dim; ++d) pooled[(size_t) b * dim + d] = m[(size_t) d];
+        if (terms_out) {
+            if (b == 0) terms_out->assign((size_t) (n_bid + 1) * dim, 0.0);
+            for (int64_t d = 0; d < dim; ++d) (*terms_out)[(size_t) b * dim + d] = terms[(size_t) d];
+        }
+    }
+    std::vector<double> dead = rows[o.dead_from_first ? 0 : rows.size() - 1];
+    ref_rms_norm(dead, w_kn, eps);
+    ref_rope_neox(dead, 0.0, n_rot, theta);      // the identity, but computed the reference's way
+    for (int64_t d = 0; d < dim; ++d) pooled[(size_t) n_bid * dim + d] = dead[(size_t) d];
+    return pooled;
+}
+
+/// `ref/qsa.py::indexer_scores` - per CELL, after the `cell_block` mapping.
+std::vector<double> ref_indexer_scores(const std::vector<double>& pooled, int64_t n_bid,
+                                       const std::vector<double>& q_idx, int64_t idx_n_head, int64_t idx_dim,
+                                       const std::vector<float>& bias, int64_t n_kv, const Alt& o) {
+    std::vector<double> per_block((size_t) n_bid + 1, 0.0);
+    for (int64_t b = 0; b <= n_bid; ++b) {
+        double s = 0;
+        for (int64_t h = 0; h < idx_n_head; ++h) {
+            double dot = 0;
+            for (int64_t d = 0; d < idx_dim; ++d)
+                dot += pooled[(size_t) b * idx_dim + d] * q_idx[(size_t) h * idx_dim + d];
+            if (!o.use_relu) s += dot;
+            else if (o.relu_per_head) s += dot > 0 ? dot : 0.0;
+            else s += dot;
+        }
+        if (o.use_relu && !o.relu_per_head) s = s > 0 ? s : 0.0;
+        if (o.use_bias && !bias.empty()) s += (double) bias[(size_t) b];
+        if (b == n_bid && n_kv % REF_R != 0) s = (float) s + 1e9f;
+        per_block[(size_t) b] = s;
+    }
+    std::vector<double> cell((size_t) n_kv, 0.0);
+    for (int64_t j = 0; j < n_kv; ++j) cell[(size_t) j] = per_block[(size_t) (j / REF_R < n_bid ? j / REF_R : n_bid)];
+    return cell;
+}
+
+/// `ref/qsa.py::select_cells`, spelled with a stable sort rather than the kernel's threshold search, so the
+/// two are independent implementations of one rule: score DESCENDING, ties by ASCENDING index.
+std::vector<int32_t> ref_select(const std::vector<double>& scores, int64_t n_kv, int64_t top_k, bool dense) {
+    std::vector<int32_t> idx((size_t) n_kv);
+    for (int64_t j = 0; j < n_kv; ++j) idx[(size_t) j] = (int32_t) j;
+    if (dense) return idx;
+    const int64_t width = std::min<int64_t>(n_kv, top_k + REF_R - 1);
+    std::stable_sort(idx.begin(), idx.end(), [&](int32_t a, int32_t b) {
+        const double sa = scores[(size_t) a], sb = scores[(size_t) b];
+        if (sa != sb) return sa > sb;
+        return a < b;
+    });
+    idx.resize((size_t) width);
+    std::sort(idx.begin(), idx.end());
+    return idx;
+}
+
+/// `ref/qsa.py::qsa_attend` over an EXPLICIT selected set, reading K/V from whichever table the caller passes
+/// so that one piece of code runs on the f64 keys and on the fp16 cache's exact f32 values.
+std::vector<double> ref_attend(const std::vector<double>& q, int64_t n_head, int64_t n_head_kv, int64_t head_dim,
+                               const std::vector<int32_t>& ids, const std::vector<std::vector<double>>& k,
+                               const std::vector<std::vector<double>>& v, const Alt& o,
+                               std::vector<double>* weights_out) {
+    const double scale = o.apply_scale ? 1.0 / std::sqrt((double) head_dim) : 1.0;
+    std::vector<double> out((size_t) n_head * head_dim, 0.0);
+    if (weights_out) weights_out->assign((size_t) n_head * ids.size(), 0.0);
+    for (int64_t h = 0; h < n_head; ++h) {
+        const int64_t kv = o.kv_divide ? h / (n_head / n_head_kv) : h % n_head_kv;
+        std::vector<double> sc(ids.size());
+        for (size_t j = 0; j < ids.size(); ++j) {
+            double dot = 0;
+            for (int64_t d = 0; d < head_dim; ++d)
+                dot += k[(size_t) ids[j]][(size_t) (kv * head_dim + d)] * q[(size_t) (h * head_dim + d)];
+            sc[j] = dot * scale;
+        }
+        const double mx = *std::max_element(sc.begin(), sc.end());
+        double sum = 0;
+        for (auto& s : sc) { s = std::exp(s - mx); sum += s; }
+        for (auto& s : sc) s /= sum;
+        if (weights_out)
+            for (size_t j = 0; j < ids.size(); ++j) (*weights_out)[(size_t) h * ids.size() + j] = sc[j];
+        for (int64_t d = 0; d < head_dim; ++d) {
+            double acc = 0;
+            for (size_t j = 0; j < ids.size(); ++j) acc += sc[j] * v[(size_t) ids[j]][(size_t) (kv * head_dim + d)];
+            out[(size_t) (h * head_dim + d)] = acc;
+        }
+    }
+    return out;
+}
+
+/// `ref/model.py::_qsa`'s last two lines.
+std::vector<double> ref_gate(const std::vector<double>& attn, const std::vector<double>& q_full, int64_t n_head,
+                             int64_t head_dim, const Alt& o) {
+    std::vector<double> out((size_t) n_head * head_dim, 0.0);
+    for (int64_t h = 0; h < n_head; ++h)
+        for (int64_t d = 0; d < head_dim; ++d) {
+            const int64_t gi = o.gate_second_half ? h * 2 * head_dim + head_dim + d : h * 2 * head_dim + d;
+            const double g = q_full[(size_t) gi];
+            const double s = o.gate_sigmoid ? 1.0 / (1.0 + std::exp(-g)) : g / (1.0 + std::exp(-g));
+            out[(size_t) (h * head_dim + d)] = attn[(size_t) (h * head_dim + d)] * s;
+        }
+    return out;
+}
+
+/// {f32 bits, the fp16 bits numpy produces for it} interleaved.  Generated by
+/// `scripts/_gen_f16_oracle.py` from `np.float16(np.float32(x))`: an oracle that shares no code with
+/// f16_bits.hpp, which is the whole point of the table.
+const uint32_t kOracle[] = {
+#include "qsa_oracle_vectors.inc"
+};
+constexpr int kOracleN = (int) (sizeof(kOracle) / sizeof(kOracle[0])) / 2;
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    std::setvbuf(stdout, nullptr, _IONBF, 0);   // a crash must not swallow what was printed already
+    bool selftest = false, dense = false, bench = false;
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        if (a == "--selftest") selftest = true;
+        else if (a == "--qsa-dense") dense = true;
+        else if (a == "--bench") bench = true;
+        else {
+            std::fprintf(stderr, "usage: qsa_parity [--selftest] [--qsa-dense] [--bench]\n"
+                                 "  --qsa-dense  attend to EVERY cell instead of the indexer's selection\n"
+                                 "               (P1.S4's isolation switch; the sparse selection is still run\n"
+                                 "                and checked, against the reference's dense/sparse property)\n"
+                                 "  --bench      time the kernels at 32K of context\n");
+            return 2;
+        }
+    }
+
+    const strata::kernels::QsaShapes S = strata::kernels::qsa_real_shapes();
+    const int64_t NH = S.n_head, NKV = S.n_head_kv, HD = S.head_dim, IDXN = S.idx_n_head, IDXD = S.idx_dim,
+                  R = S.idx_block, TOPK = S.idx_top_k;
+    const int64_t MAXC = strata::kernels::kTopkMaxCells;
+    const float EPS = strata::kernels::qsa_rms_eps();
+    const double THETA = strata::kernels::qsa_freq_base();
+    std::mt19937 rng(20260916u);
+    std::normal_distribution<double> gauss(0.0, 1.0);
+    auto rnd = [&](double s) { return (float) (gauss(rng) * s); };
+
+    std::printf("qsa_parity: n_head %lld  n_head_kv %lld  head_dim %lld  indexer %lldx%lld r=%lld "
+                "top_k %lld  page (from the shapes) %lld   [%s]\n\n",
+                (long long) NH, (long long) NKV, (long long) HD, (long long) IDXN, (long long) IDXD,
+                (long long) R, (long long) TOPK, (long long) S.page_size, dense ? "DENSE" : "sparse");
+    require("the fixture's r is the artifact's IDX_BLOCK", R == REF_R, "r = " + std::to_string(R));
+
+    // ================= 0. the fp16 converter, against numpy =================
+    {
+        int mism = 0, subnormal = 0;
+        for (int i = 0; i < kOracleN; ++i) {
+            float f;
+            const uint32_t fb = kOracle[2 * i];
+            std::memcpy(&f, &fb, 4);
+            const uint16_t want = (uint16_t) kOracle[2 * i + 1];
+            const uint16_t got = f16_from_f32(f);
+            if (got != want) {
+                if (mism < 5) std::printf("    f32 0x%08X -> got 0x%04X, numpy says 0x%04X\n", fb, got, want);
+                ++mism;
+            }
+            if ((want & 0x7C00u) == 0u && (want & 0x3FFu) != 0u) ++subnormal;
+        }
+        require("f32->f16 matches numpy's float16 on every vector", mism == 0,
+                std::to_string(kOracleN) + " vectors, " + std::to_string(subnormal) + " subnormal");
+        int bad_rev = 0;
+        for (int h = 0; h < 65536; ++h) {
+            const int ex = (h >> 10) & 0x1F, man = h & 0x3FF;
+            if (ex == 31) continue;                    // inf/NaN come from the vector table above
+            const double mag = ex == 0 ? (double) man * std::ldexp(1.0, -24)
+                                       : (double) (1024 + man) * std::ldexp(1.0, ex - 25);
+            const double want = (h & 0x8000) ? -mag : mag;
+            if ((double) f32_from_f16((uint16_t) h) != want) {
+                if (bad_rev < 5) std::printf("    f16 0x%04X -> %.9g, want %.9g\n", h, (double) f32_from_f16((uint16_t) h), want);
+                ++bad_rev;
+            }
+        }
+        require("f16->f32 is exact on all 65,536 bit patterns", bad_rev == 0,
+                std::to_string(bad_rev) + " wrong");
+    }
+
+    // ================= 1. kv_append: the paged pool, three page granules =================
+    const int64_t TCELLS = 1100;                     // 275 indexer blocks, and 3 pages at page_size 512
+    std::vector<float> kcur_all((size_t) TCELLS * NKV * HD), vcur_all((size_t) TCELLS * NKV * HD);
+    for (auto& x : kcur_all) x = rnd(1.0);
+    for (auto& x : vcur_all) x = rnd(1.0);
+    // EVERY pointer this kernel set takes is a DEVICE pointer - the append sources, the indexer weights
+    // and the rope tables alike.  The first draft passed `&kcur_all[...]`, `w_kn.data()` and
+    // `cos_tab.data()` straight through, and every kernel that dereferenced one took an illegal access.
+    Dev<float> dkcur_all, dvcur_all;
+    dkcur_all.put(kcur_all);
+    dvcur_all.put(vcur_all);
+
+    struct PageCase {
+        int64_t page_size = 0, n_pages = 0;
+        std::vector<int32_t> table;
+    };
+    std::vector<PageCase> pages;
+    for (int64_t ps : {(int64_t) 1, (int64_t) 4, (int64_t) 512}) {
+        PageCase c;
+        c.page_size = ps;
+        c.n_pages = (TCELLS + ps - 1) / ps;
+        c.table.resize((size_t) c.n_pages);
+        for (int64_t i = 0; i < c.n_pages; ++i) c.table[(size_t) i] = (int32_t) (c.n_pages - 1 - i);   // REVERSED
+        pages.push_back(std::move(c));
+    }
+    const std::vector<int32_t> ids = {0, 1, 2, 3, 5, 8, 13, 21, 34, 39, 1099, 700};
+
+    for (PageCase& c : pages) {
+        // THE PAGE GRANULE IS A PROPERTY OF THE SHAPES, and the kernel takes it from there rather than from an
+        // argument.  The first version of this fixture left it at 512 while the table described 1-cell pages,
+        // so the kernel indexed a 1100-page table as if it had 3 pages and ran off the pool - which is what an
+        // illegal memory access reported.  A test that feeds one geometry and expects another is measuring
+        // itself; the fix is to build the shapes per case.
+        strata::kernels::QsaShapes Sc = S;
+        Sc.page_size = c.page_size;
+        const size_t pool_n = (size_t) c.n_pages * NKV * c.page_size * HD;
+        Dev<uint16_t> dk(pool_n), dv(pool_n);
+        Dev<int32_t> dtab;
+        dtab.put(c.table);
+        for (int64_t t = 0; t < TCELLS; ++t)
+            strata::kernels::kv_append(dk.p, dv.p, dtab.p, t, dkcur_all.p + (size_t) t * NKV * HD,
+                                       dvcur_all.p + (size_t) t * NKV * HD, Sc, nullptr);
+        const std::vector<uint16_t> hk = dk.get(pool_n), hv = dv.get(pool_n);
+
+        int mism = 0, mism_linear = 0, mism_head_major = 0;
+        const int64_t rows_avail = (int64_t) (pool_n / (size_t) HD);
+        // A rival layout's address is HYPOTHETICAL: where it would put the value may be outside the pool,
+        // and reading there is a host access violation rather than a mismatch.  Off the end counts as
+        // "the value is not where the rival would put it", which is the claim being tested.
+        auto elsewhere = [&](int64_t r) { return r < 0 || r >= rows_avail; };
+        for (int64_t cell = 0; cell < TCELLS; ++cell)
+            for (int64_t h = 0; h < NKV; ++h)
+                for (int64_t d = 0; d < HD; ++d) {
+                    const size_t src = (size_t) (cell * NKV + h) * HD + d;
+                    const uint16_t wk = f16_from_f32(kcur_all[src]), wv = f16_from_f32(vcur_all[src]);
+                    // the DECLARED layout: [page][kv_head][page_size][head_dim]
+                    const int64_t row = ((int64_t) c.table[(size_t) (cell / c.page_size)] * NKV + h) * c.page_size +
+                                        (cell % c.page_size);
+                    if (hk[(size_t) row * HD + d] != wk || hv[(size_t) row * HD + d] != wv) ++mism;
+                    // rival (a): the page table ignored, i.e. written at the logical address
+                    const int64_t rl = (cell * NKV + h) * c.page_size + (cell % c.page_size);
+                    if (elsewhere(rl) || hk[(size_t) rl * HD + d] != wk) ++mism_linear;
+                    // rival (b): cell-major inside the page instead of head-major
+                    const int64_t rh = ((int64_t) c.table[(size_t) (cell / c.page_size)] * c.page_size +
+                                        (cell % c.page_size)) * NKV + h;
+                    if (elsewhere(rh) || hk[(size_t) rh * HD + d] != wk) ++mism_head_major;
+                }
+        const double n_tot = (double) (TCELLS * NKV * HD);
+        require("kv_append at page_size " + std::to_string(c.page_size) + ": the pool is BIT-EXACT",
+                mism == 0, std::to_string(mism) + " of " + std::to_string((long long) n_tot) + " bits wrong");
+        verdict("  the page table is observable at page_size " + std::to_string(c.page_size),
+                (double) mism_linear / n_tot > 0.5,
+                pct((double) mism_linear / n_tot) + " (linear vs declared)");
+        // The head-major rival is IDENTICAL to the declared layout when page_size == 1 (both reduce to
+        // `cell * n_head_kv + h`), so the separation is only asserted where the layouts actually differ.
+        if (c.page_size >= 4) {
+            verdict("  head-major-in-page is observable at page_size " + std::to_string(c.page_size),
+                    (double) mism_head_major / n_tot > 0.5,
+                    pct((double) mism_head_major / n_tot) + " (cell-major vs head-major)");
+        }
+
+        Dev<int32_t> dids;
+        dids.put(ids);
+        const size_t scr_n = ids.size() * NKV * HD;
+        Dev<uint16_t> dks(scr_n), dvs(scr_n);
+        strata::kernels::kv_gather(dk.p, dv.p, dtab.p, dids.p, (int64_t) ids.size(), Sc, dks.p, dvs.p, nullptr);
+        const std::vector<uint16_t> gk = dks.get(scr_n), gv = dvs.get(scr_n);
+        int gm = 0;
+        for (size_t j = 0; j < ids.size(); ++j)
+            for (int64_t h = 0; h < NKV; ++h)
+                for (int64_t d = 0; d < HD; ++d) {
+                    const size_t src = (size_t) (ids[j] * NKV + h) * HD + d;
+                    if (gk[(size_t) (j * NKV + h) * HD + d] != f16_from_f32(kcur_all[src])) ++gm;
+                    if (gv[(size_t) (j * NKV + h) * HD + d] != f16_from_f32(vcur_all[src])) ++gm;
+                }
+        require("  kv_gather is BIT-EXACT at page_size " + std::to_string(c.page_size), gm == 0,
+                std::to_string(gm) + " wrong bits");
+    }
+
+    // ================= 2. indexer_key_append =================
+    const int64_t NT = 10;                           // 2 complete blocks + a 2-cell tail
+    // The cells sit at POSITIONS 100..109, not at 0..9: `QsaCache.pos` is what the reference rotates by,
+    // and a kernel that assumes position == cell index is wrong for any sequence that does not start at 0
+    // (prefix reuse, phase 5).  With base 100 the two readings are 514% apart, which is asserted below.
+    const int32_t POS_BASE = 100;
+    RefCache rc;
+    std::vector<float> raw_flat;
+    for (int64_t t = 0; t < NT; ++t) {
+        std::vector<double> kk((size_t) (NKV * HD)), vv((size_t) (NKV * HD)), rr((size_t) IDXD);
+        for (int64_t i = 0; i < NKV * HD; ++i) { kk[(size_t) i] = gauss(rng); vv[(size_t) i] = gauss(rng); }
+        // cell MAGNITUDES 1, 4, 16, 64 - for the same reason round 196 gave its residual streams different
+        // scales: four i.i.d. rows of normal noise have nearly the same norm by accident, so "pool then norm"
+        // and "norm then pool" would agree to within the noise and the fixture could not see its own trap.
+        for (int64_t d = 0; d < IDXD; ++d) rr[(size_t) d] = gauss(rng) * std::pow(4.0, (double) (t % 4));
+        for (int64_t d = 0; d < IDXD; ++d) raw_flat.push_back((float) rr[(size_t) d]);
+        // The reference gets the f32 PROMOTION of what the device gets, not the f64 original.  Feeding it
+        // the f64 values left a 6e-8 relative difference, which is invisible in a score but crosses an f32
+        // rounding boundary in one value in four - and the spare key is asserted BIT-EXACT.
+        for (int64_t d = 0; d < IDXD; ++d) rr[(size_t) d] = (double) raw_flat[(size_t) t * IDXD + d];
+        rc.append(kk, vv, rr, (double) (100 + t));
+    }
+    std::vector<float> w_kn((size_t) IDXD);
+    for (auto& x : w_kn) x = 1.0f + 0.1f * rnd(1.0);
+    std::vector<float> cos_tab((size_t) (2000 * S.n_rot / 2)), sin_tab(cos_tab.size());
+    strata::kernels::build_rope_table((int) S.n_rot, THETA, 2000, cos_tab.data(), sin_tab.data());
+    Dev<float> dw_kn, dcos, dsin;
+    dw_kn.put(w_kn);
+    dcos.put(cos_tab);
+    dsin.put(sin_tab);
+
+    const int64_t n_bid = NT / R;
+    const size_t pooled_n = (size_t) (n_bid + 1) * IDXD;
+    Dev<float> dpooled(pooled_n), ddead((size_t) IDXD), dtail((size_t) (R - 1) * IDXD);
+    Dev<int32_t> dblockpos(1);      // the rotation position, which only the DEVICE may read
+    // The POSITION is a device value now, because a host scalar would be baked into a captured graph.  One
+    // `cudaMemcpy` per cell here; the layer keeps this buffer and updates it per token.
+    Dev<int32_t> dpos(1);
+    {
+        strata::kernels::QsaIndexerBuffers bufs{dtail.p, ddead.p, dpooled.p, dblockpos.p};
+        Dev<float> draw((size_t) IDXD);
+        for (int64_t t = 0; t < NT; ++t) {      // one cell at a time: the tail is a ring and the spare row MOVES
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(draw.p,
+                                               &raw_flat[(size_t)t * IDXD],
+                                               (size_t)IDXD * 4)
+                                       .wait()),
+                  "raw");
+            const int32_t tpos = (int32_t) t;
+            check(
+                DPCT_CHECK_ERROR(
+                    dpct::get_in_order_queue().memcpy(dpos.p, &tpos, 4).wait()),
+                "pos");
+            strata::kernels::indexer_key_append(draw.p, dpos.p, POS_BASE, dw_kn.p, EPS, bufs, S, dcos.p, dsin.p,
+                                                nullptr);
+        }
+        const std::vector<float> got = dpooled.get(pooled_n), got_dead = ddead.get((size_t) IDXD);
+        std::vector<double> terms;
+        const std::vector<double> want = ref_pooled(rc, w_kn, EPS, (int) S.n_rot, THETA, Alt{}, &terms);
+        const std::vector<double> want_raw = ref_pooled_raw(rc);
+
+        // (a) the spare slot: BIT-EXACT, because rope at position 0 is the identity in both (cos = 1, sin = 0
+        //     exactly), so the residual the pooled rows carry from the f32 rope cannot appear here.
+        int dead_bad = 0;
+        for (int64_t d = 0; d < IDXD; ++d)
+            if (got_dead[(size_t) d] != (float) want[(size_t) n_bid * IDXD + d]) ++dead_bad;
+        require("the spare slot's key (rms_norm of cell 0) is BIT-EXACT", dead_bad == 0,
+                std::to_string(dead_bad) + " of " + std::to_string(IDXD) + " wrong");
+        require("the spare slot is at row n_bid and nowhere else", n_bid == 2,
+                "10 cells / r=4 -> 2 complete blocks");
+
+        // (b) the pooled blocks against the reference
+        // THE DENOMINATOR IS THE ROPE'S TERMS, not the result: `a*cos - b*sin` cancels, and the kernel's
+        // rotation runs in f32 over an f32 table (6e-8 per term) while the reference's runs in f64.  Dividing
+        // by the result reports the cancellation, which is what made this read 1.067e-06 against a 1e-6 bar.
+        double worst = 0;
+        for (int64_t b = 0; b < n_bid; ++b)
+            for (int64_t d = 0; d < IDXD; ++d) {
+                const double wv = want[(size_t) b * IDXD + d];
+                const double tm = terms[(size_t) b * IDXD + d];
+                worst = std::max(worst, rel_terms(wv, (double) got[(size_t) b * IDXD + d], tm));
+            }
+        report("pooled block keys vs the reference", worst, "rel/|rope terms|");
+        if (!(worst <= 1e-6)) { std::printf("    *** over 1e-6 ***\n"); ++g_bad; }
+
+        // (c) THE INCOMPLETE TAIL IS NOT POOLED: the two tail cells take the SPARE slot's score, which is cell
+        //     0's key - not their own mean.  A rival reading that pools them would still fill every row.
+        {
+            std::vector<double> tm((size_t) IDXD, 0.0);
+            for (int64_t i = n_bid * R; i < NT; ++i)
+                for (int64_t d = 0; d < IDXD; ++d) tm[(size_t) d] += rc.raw[(size_t) i][(size_t) d] / 2.0;
+            ref_rms_norm(tm, w_kn, EPS);
+            double num = 0, den = 0;
+            for (int64_t d = 0; d < IDXD; ++d) {
+                num += std::fabs(tm[(size_t) d] - (double) got_dead[(size_t) d]);
+                den += std::fabs(tm[(size_t) d]);
+            }
+            verdict("the incomplete tail is NOT pooled into the spare slot", num / den > 0.5, pct(num / den));
+        }
+
+        auto sep = [&](const std::string& name, const Alt& a) {
+            const std::vector<double> alt = ref_pooled(rc, w_kn, EPS, (int) S.n_rot, THETA, a);
+            double num = 0, den = 0;
+            // Rows 0..n_bid INCLUSIVE: the spare slot is row n_bid and three of the four rivals change
+            // nothing else, so leaving it out made "the spare key from the LAST raw key" separate 0.00%.
+            for (int64_t b = 0; b <= n_bid; ++b)
+                for (int64_t d = 0; d < IDXD; ++d) {
+                    num += std::fabs(alt[(size_t) b * IDXD + d] - want[(size_t) b * IDXD + d]);
+                    den += std::fabs(want[(size_t) b * IDXD + d]);
+                }
+            verdict(name, num / den > 0.05, pct(num / den));
+        };
+        Alt a1; a1.rotate_at_block_start = false;
+        sep("rotating at the block's LAST cell is observable", a1);
+        Alt a2; a2.pool_then_norm = false;
+        sep("norm-then-pool vs pool-then-norm is observable", a2);
+        Alt a3; a3.dead_from_first = false;
+        sep("the spare key from the LAST raw key is observable", a3);
+        Alt a4; a4.rope_raw = true;
+        sep("rotating the RAW indexer keys is observable", a4);
+        {   // THE POSITION BASE.  The same reference with the cells at 0..9 instead of 100..109 - i.e.
+            // what a kernel that equates a cell's position with its index would compute.
+            RefCache flat = rc;
+            for (int64_t j = 0; j < NT; ++j) flat.pos[(size_t) j] = (double) j;
+            const std::vector<double> alt = ref_pooled(flat, w_kn, EPS, (int) S.n_rot, THETA, Alt{});
+            double num = 0, den = 0;
+            for (int64_t b = 0; b <= n_bid; ++b)
+                for (int64_t d = 0; d < IDXD; ++d) {
+                    num += std::fabs(alt[(size_t) b * IDXD + d] - want[(size_t) b * IDXD + d]);
+                    den += std::fabs(want[(size_t) b * IDXD + d]);
+                }
+            verdict("the rotation's POSITION BASE (pos_base) is observable", num / den > 0.05,
+                    pct(num / den));
+        }
+
+        // (d) THE TRAP THIS FIXTURE CANNOT SEE, measured and reported rather than hidden.  `rms_norm` divides
+        //     by sqrt(mean(x^2) + eps), so the 1/r in the mean cancels EXCEPT through eps: mean and sum differ
+        //     by ~eps/(2*mean(x^2)) relative.  `ref/qsa.py` L463-465 makes the same point about its own test.
+        {
+            std::vector<double> psum = want_raw;
+            for (auto& x : psum) x *= (double) R;
+            std::vector<double> nm = want_raw, ns = psum;
+            for (int64_t b = 0; b < n_bid; ++b) {
+                std::vector<double> m(nm.begin() + (size_t) b * IDXD, nm.begin() + (size_t) (b + 1) * IDXD);
+                std::vector<double> s(ns.begin() + (size_t) b * IDXD, ns.begin() + (size_t) (b + 1) * IDXD);
+                ref_rms_norm(m, w_kn, EPS);
+                ref_rms_norm(s, w_kn, EPS);
+                for (int64_t d = 0; d < IDXD; ++d) {
+                    nm[(size_t) b * IDXD + d] = m[(size_t) d];
+                    ns[(size_t) b * IDXD + d] = s[(size_t) d];
+                }
+            }
+            double num = 0, den = 0;
+            for (size_t i = 0; i < want_raw.size(); ++i) {
+                num += std::fabs(psum[i] - want_raw[i]);
+                den += std::fabs(want_raw[i]);
+            }
+            verdict("the 1/r divisor IS observable in the RAW pooled value", num / den > 0.5,
+                    pct(num / den) + " (sum vs mean, before any norm)");
+            std::printf("  %-48s      %.3e  <-- below EVERY score tolerance; the divisor cannot be\n",
+                        "the same divisor AFTER the norm", rel_l1(ns, nm));
+            std::printf("  %-48s      %s\n", "", "checked downstream at all, which is why the raw value is the");
+            std::printf("  %-48s      %s\n", "", "only place the mean/sum question is answerable.");
+        }
+    }
+
+    // ================= 3. qsa_index =================
+    std::vector<float> q_idx((size_t) (IDXN * IDXD));
+    for (auto& x : q_idx) x = rnd(1.0);
+    // A bias of ~0.4 against scores of ~20 separates "applies the bias" from "drops it" by 3.4%, which
+    // is not a fixture that can see its own trap. This is a guard for the kernel's optional additional
+    // bias, separate from the mandatory incomplete-tail bias; it is sized to
+    // be comparable with the scores so that dropping it is material.
+    std::vector<float> bias((size_t) (n_bid + 1));
+    for (auto& x : bias) x = rnd(8.0f);
+    {
+        const std::vector<float> got_pooled = dpooled.get(pooled_n);
+        const std::vector<double> p64 = as_d(got_pooled);
+        const std::vector<double> q_idx64 = as_d(q_idx);
+        const int64_t n_kv = NT;
+        Dev<float> dp, dqi, dbias, dsc;
+        dp.put(got_pooled);
+        dqi.put(q_idx);
+        dbias.put(bias);
+        dsc.alloc((size_t) n_kv);
+        strata::kernels::qsa_index(dp.p, n_bid, dqi.p, dbias.p, S, n_kv, dsc.p, nullptr);
+        const std::vector<float> got = dsc.get((size_t) n_kv);
+        const std::vector<double> want =
+            ref_indexer_scores(p64, n_bid, q_idx64, IDXN, IDXD, bias, n_kv, Alt{});
+
+        // The score is a SUM of four relu'd dots plus the bias, so the denominator is the magnitude of the
+        // TERMS - |dot| bounds a relu'd dot from above and is what is used here.
+        double worst = 0;
+        for (int64_t j = 0; j < n_kv; ++j) {
+            const int64_t cb = std::min(j / R, n_bid);
+            double terms = std::fabs((double) bias[(size_t) cb]);
+            if (cb == n_bid && n_kv % R != 0) terms += 1e9;
+            for (int64_t h = 0; h < IDXN; ++h) {
+                double dot = 0;
+                for (int64_t d = 0; d < IDXD; ++d) dot += p64[(size_t) cb * IDXD + d] * q_idx64[(size_t) h * IDXD + d];
+                terms += std::fabs(dot);
+            }
+            worst = std::max(worst, rel_terms(want[(size_t) j], (double) got[(size_t) j], terms));
+        }
+        report("indexer cell scores vs the reference", worst, "rel/Sum|terms|");
+        if (!(worst <= 1e-6)) { std::printf("    *** over 1e-6 ***\n"); ++g_bad; }
+
+        require("cells of one block share its score (0..3)",
+                got[0] == got[1] && got[1] == got[2] && got[2] == got[3] && got[0] != got[4]);
+        require("cells 8,9 (the tail) take the SPARE slot's score, not block 1's",
+                got[8] == got[9] && got[9] != got[7], "got[8] == got[9] != got[7]");
+
+        auto sep_scores = [&](const std::string& name, const Alt& a) {
+            const std::vector<double> alt = ref_indexer_scores(p64, n_bid, q_idx64, IDXN, IDXD, bias, n_kv, a);
+            double num = 0, den = 0;
+            // The mandatory tail bias must not swamp the score-arithmetic fixture.
+            for (int64_t j = 0; j < n_bid * R; ++j) {
+                num += std::fabs(alt[(size_t) j] - want[(size_t) j]);
+                den += std::fabs(want[(size_t) j]);
+            }
+            verdict(name, num / den > 0.05, pct(num / den));
+        };
+        Alt a5; a5.relu_per_head = false;
+        sep_scores("relu PER HEAD vs relu(sum of heads) is observable", a5);
+        Alt a6; a6.use_relu = false;
+        sep_scores("dropping the relu is observable", a6);
+        Alt a7; a7.use_bias = false;
+        sep_scores("dropping the per-block bias is observable", a7);
+    }
+
+    // Causal decode's incomplete tail must survive even when its dot-product score
+    // ties every completed block. The oracle supplies +1e9 in set_input_qsa;
+    // without it, ascending-index top-k drops every tail after the sparse switch.
+    // Replay one captured graph across block/page boundaries to catch stale bias.
+    {
+        const int64_t max_n = 20480;
+        const int64_t max_blocks = max_n / R + 1;
+        const int64_t cap = strata::kernels::qsa_selection_width(max_n, S);
+        Dev<float> pooled, query, scores((size_t) max_n);
+        Dev<int32_t> ids((size_t) cap), step(strata::kernels::kStepCount);
+        pooled.put(std::vector<float>((size_t) max_blocks * IDXD, 0.0f));
+        query.put(std::vector<float>((size_t) IDXN * IDXD, 0.0f));
+
+        dpct::queue_ptr stream;
+        dpct::experimental::command_graph_ptr graph;
+        dpct::experimental::command_graph_exec_ptr exec;
+        check(DPCT_CHECK_ERROR(
+                  stream = dpct::get_current_device().create_queue(true)),
+              "tail stream");
+        check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+              "tail capture begin");
+        strata::kernels::qsa_index_step(pooled.p, query.p, nullptr, S, step.p, max_blocks, scores.p, stream);
+        strata::kernels::topk_512_step(scores.p, S, cap, step.p, ids.p, stream);
+        check(
+            DPCT_CHECK_ERROR(dpct::experimental::end_recording(stream, &graph)),
+            "tail capture end");
+        check(DPCT_CHECK_ERROR(
+                  exec = new sycl::ext::oneapi::experimental::command_graph<
+                      sycl::ext::oneapi::experimental::graph_state::executable>(
+                      graph->finalize())),
+              "tail instantiate");
+
+        const std::vector<int64_t> counts = {
+            1, 2, 3, 4, 511, 512, 513, 2046, 2047, 2048, 2049, 2050, 2051,
+            2052, 2053, 2054, 2055, 2056, 2057, 2058, 2059, 2060,
+            4095, 4096, 4097, 8191, 8192, 8193, 20477, 20478, 20479, 20480};
+        for (const int64_t n : counts) {
+            const int64_t width = strata::kernels::qsa_selection_width(n, S);
+            const int64_t tail = n % R;
+            std::vector<int32_t> want;
+            for (int64_t j = 0; j < width - tail; ++j) want.push_back((int32_t) j);
+            for (int64_t j = n - tail; j < n; ++j) want.push_back((int32_t) j);
+
+            strata::kernels::qsa_index(pooled.p, n / R, query.p, nullptr, S, n, scores.p, nullptr);
+            strata::kernels::topk_512(scores.p, n, S, cap, ids.p, nullptr);
+            require("tail static n=" + std::to_string(n), ids.get((size_t) width) == want);
+
+            std::vector<int32_t> values(strata::kernels::kStepCount);
+            strata::kernels::qsa_step_fill(values.data(), n - 1, S);
+            step.put(values);
+            check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*exec)),
+                  "tail replay");
+            check(DPCT_CHECK_ERROR(stream->wait()), "tail replay sync");
+            require("tail captured n=" + std::to_string(n), ids.get((size_t) width) == want);
+            const auto actual_scores = scores.get((size_t) n);
+            bool exact_scores = true;
+            for (int64_t j = 0; j < n; ++j) {
+                const float expected = j >= n - tail ? 1e9f : 0.0f;
+                exact_scores = exact_scores && actual_scores[(size_t) j] == expected;
+            }
+            require("  only incomplete cells receive the bias", exact_scores);
+        }
+        check(DPCT_CHECK_ERROR(delete (exec)), "tail exec destroy");
+        check(DPCT_CHECK_ERROR(delete (graph)), "tail graph destroy");
+        check(
+            DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+            "tail stream destroy");
+    }
+
+    // ================= 4. topk_512, against an independent sort =================
+    {
+        const int64_t CAP = strata::kernels::qsa_selection_width(MAXC, S);
+        Dev<float> dsc;
+        Dev<int32_t> dids;
+        dsc.alloc((size_t) MAXC);
+        dids.alloc((size_t) CAP);
+        std::vector<float> sc((size_t) MAXC);
+
+        auto one = [&](const std::string& name, int64_t n_kv) {
+            dsc.put(std::vector<float>(sc.begin(), sc.begin() + n_kv));
+            strata::kernels::topk_512(dsc.p, n_kv, S, CAP, dids.p, nullptr);
+            const int64_t width = strata::kernels::qsa_selection_width(n_kv, S);
+            const std::vector<int32_t> g = dids.get((size_t) width);
+            const std::vector<int32_t> want = ref_select(as_d(std::vector<float>(sc.begin(), sc.begin() + n_kv)),
+                                                         n_kv, TOPK, false);
+            const bool ok = g == want;
+            require(name, ok, std::to_string(width) + " ids, width = min(n_kv, top_k + r - 1)");
+            if (!ok) {
+                for (size_t i = 0; i < std::min(g.size(), want.size()); ++i)
+                    if (g[i] != want[i]) {
+                        std::printf("    first difference at %zu: got %d, want %d\n", i, g[i], want[i]);
+                        break;
+                    }
+            }
+            bool asc = true;
+            for (size_t i = 1; i < g.size(); ++i) if (g[i] <= g[i - 1]) asc = false;
+            require("  ...ascending and unique", asc);
+            return g;
+        };
+
+        for (auto& x : sc) x = rnd(1.0);
+        one("topk_512 n_kv = 1", 1);
+        one("topk_512 n_kv = 7 (random)", 7);
+        one("topk_512 n_kv = 2048 (the plan's threshold)", 2048);
+        one("topk_512 n_kv = 2051 (the reference's own bound)", 2051);
+        one("topk_512 n_kv = 2052 (two past the plan's number)", 2052);
+        one("topk_512 n_kv = 5000 (random)", 5000);
+        one("topk_512 n_kv = 32768 (= kTopkMaxCells)", MAXC);
+
+        // ALL-EQUAL scores: every cell ties, so the answer must be 0..width-1 and any other tie rule shows up
+        // on the first element.  ggml does not specify the rule; the reference and the kernel both say
+        // ascending index, and this is the case that distinguishes them.
+        std::fill(sc.begin(), sc.begin() + 2052, 0.25f);
+        one("topk_512 with 2052 EQUAL scores (every cell ties)", 2052);
+
+        // a tie BLOCK straddling the cut: 100 cells share the cut score and only some of them fit
+        for (int64_t j = 0; j < 5000; ++j) sc[(size_t) j] = (float) (-(double) j);
+        for (int64_t j = 2051 - 50; j < 2051 + 50; ++j) sc[(size_t) j] = -1000.0f;
+        one("topk_512 with a 100-cell tie straddling the cut", 5000);
+
+        // THE IDENTITY BELOW THE BOUND.  `select_cells` returns `arange` whenever width == n_kv, which is what
+        // "selection skipped when context <= 2,048" means - and it holds to 2,051, not 2,048.
+        for (int64_t n : {(int64_t) 2048, (int64_t) 2051}) {
+            for (int64_t j = 0; j < n; ++j) sc[(size_t) j] = rnd(1.0);
+            const std::vector<int32_t> g = one(std::string("topk_512 n_kv = ") + std::to_string(n) +
+                                                   " selects every cell (identity)",
+                                               n);
+            bool ident = (int64_t) g.size() == n;
+            for (int64_t j = 0; j < n && ident; ++j) if (g[(size_t) j] != j) ident = false;
+            require("  ...and it really is 0,1,2,...", ident);
+        }
+        {   // one past the bound the identity must FAIL, or the two checks above prove nothing
+            for (int64_t j = 0; j < 2052; ++j) sc[(size_t) j] = rnd(1.0);
+            const std::vector<int32_t> g = one("topk_512 n_kv = 2052 is NOT the identity", 2052);
+            std::vector<char> kept(2052, 0);
+            for (int32_t id : g) kept[(size_t) id] = 1;
+            int64_t missing = 0;
+            for (int64_t j = 0; j < 2052; ++j) if (!kept[(size_t) j]) ++missing;
+            int64_t argmin = 0;
+            for (int64_t j = 1; j < 2052; ++j) if (sc[(size_t) j] < sc[(size_t) argmin]) argmin = j;
+            require("  ...exactly one cell is dropped, and it is the smallest score",
+                    missing == 1 && !kept[(size_t) argmin], std::to_string(missing) + " dropped");
+        }
+    }
+
+    // ================= 5. qsa_attend on the loud-cell fixture =================
+    // `ref/qsa.py` PROPERTY 8's own numbers: a key with 100 in its first dim against zeros, a value of 10
+    // against 1, and q[:,0] = 1.  The logit gap is 100/sqrt(256) = 6.25, so the loud cell takes ~99% of its
+    // head's weight - and exactly zero when it is not in the selected set.
+    {
+        const int64_t N = 8;
+        std::vector<std::vector<double>> k2, v2;
+        std::vector<float> k2f, v2f;
+        for (int64_t j = 0; j < N; ++j) {
+            std::vector<double> kk((size_t) (NKV * HD), 0.0), vv((size_t) (NKV * HD), 0.0);
+            for (int64_t h = 0; h < NKV; ++h) vv[(size_t) (h * HD)] = 1.0;
+            kk[0] = j == N - 1 ? 100.0 : 0.0;
+            vv[0] = j == N - 1 ? 10.0 : 1.0;
+            for (int64_t i = 0; i < NKV * HD; ++i) { k2f.push_back((float) kk[(size_t) i]); v2f.push_back((float) vv[(size_t) i]); }
+            k2.push_back(kk);
+            v2.push_back(vv);
+        }
+        std::vector<double> q((size_t) (NH * HD), 0.0);
+        for (int64_t h = 0; h < NH; ++h) q[(size_t) (h * HD)] = 1.0;
+
+        Dev<float> dq;
+        dq.put(as_f(q));
+        const size_t scr = (size_t) N * NKV * HD;
+        std::vector<uint16_t> kbits(scr), vbits(scr);
+        for (size_t i = 0; i < scr; ++i) { kbits[i] = f16_from_f32(k2f[i]); vbits[i] = f16_from_f32(v2f[i]); }
+        Dev<uint16_t> dks(scr), dvs(scr);
+        dks.put(kbits);
+        dvs.put(vbits);
+        Dev<float> dattn((size_t) NH * HD), dwt((size_t) NH * N);
+
+        std::vector<int32_t> all(N), no_loud(N - 1);
+        for (int64_t j = 0; j < N; ++j) all[(size_t) j] = (int32_t) j;
+        for (int64_t j = 0; j < N - 1; ++j) no_loud[(size_t) j] = (int32_t) j;
+
+        // the scratch is written directly here (no pool), so this section is about the attention alone
+        strata::kernels::qsa_attend(dq.p, dks.p, dvs.p, N, S, dattn.p, dwt.p, nullptr);
+        const std::vector<double> out_all = as_d(dattn.get((size_t) NH * HD));
+        strata::kernels::qsa_attend(dq.p, dks.p, dvs.p, N - 1, S, dattn.p, nullptr, nullptr);
+        const std::vector<double> out_sel = as_d(dattn.get((size_t) NH * HD));
+        const std::vector<double> wts = as_d(dwt.get((size_t) NH * N));
+
+        verdict("with every cell selected the loud cell dominates its head 0", out_all[0] > 5.0,
+                "out[0][0] = " + std::to_string(out_all[0]).substr(0, 6));
+        require("with the loud cell unselected it contributes EXACTLY nothing",
+                std::fabs(out_sel[0] - 1.0) < 1e-6, "out[0][0] = " + std::to_string(out_sel[0]).substr(0, 8));
+        double worst_sum = 0;
+        for (int64_t h = 0; h < NH; ++h) {
+            double s = 0;
+            for (int64_t j = 0; j < N; ++j) s += wts[(size_t) (h * N + j)];
+            worst_sum = std::max(worst_sum, std::fabs(s - 1.0));
+        }
+        report("the returned weights sum to 1 per head", worst_sum, "max |1 - sum|");
+
+        auto sep_attend = [&](const std::string& name, const Alt& a) {
+            const std::vector<double> alt = ref_attend(q, NH, NKV, HD, all, k2, v2, a, nullptr);
+            double num = 0, den = 0;
+            for (size_t i = 0; i < alt.size(); ++i) {
+                num += std::fabs(alt[i] - out_all[i]);
+                den += std::fabs(alt[i]);
+            }
+            verdict(name, num / den > 0.05, pct(num / den));
+        };
+        Alt a8; a8.kv_divide = false;
+        sep_attend("q % 2 vs q / 12 for the kv head is observable", a8);
+        // The scale trap is NOT asserted on this fixture: its softmax is saturated (the loud cell holds 99%
+        // of the weight, so removing a 16x logit scale moves it to 100% and the output by 1.09%).  It is
+        // asserted on the random 2100-cell fixture below, where the logits are O(10) and the temperature
+        // actually matters.  This is round 196's lesson about a fixture that cannot see its own trap.
+        std::printf("  %-48s %-6s %s\n", "  (the scale trap is measured on the random fixture)", "--",
+                    "this fixture's softmax is saturated");
+        {   // the mask: the same reference with and without the loud cell in the selected set
+            const std::vector<double> with_loud = ref_attend(q, NH, NKV, HD, all, k2, v2, Alt{}, nullptr);
+            const std::vector<double> without = ref_attend(q, NH, NKV, HD, no_loud, k2, v2, Alt{}, nullptr);
+            double num = 0, den = 0;
+            for (size_t i = 0; i < with_loud.size(); ++i) {
+                num += std::fabs(with_loud[i] - without[i]);
+                den += std::fabs(with_loud[i]);
+            }
+            verdict("attending to the unselected cell is observable", num / den > 0.05, pct(num / den));
+        }
+    }
+
+    // ================= 6. the whole layer at n_kv = 2100, so the selection is genuinely sparse =============
+    int64_t width = 0;
+    {
+        const int64_t T = 2100;                      // > 2051, so `width` really truncates
+        width = strata::kernels::qsa_selection_width(T, S);
+        std::vector<float> pk((size_t) T * NKV * HD), pv((size_t) T * NKV * HD), praw((size_t) T * IDXD);
+        std::vector<std::vector<double>> k16((size_t) T), v16((size_t) T);
+        RefCache pc;
+        std::vector<float> q((size_t) NH * HD);
+        for (auto& x : q) x = rnd(1.0);
+        for (int64_t t = 0; t < T; ++t) {
+            std::vector<double> kk((size_t) (NKV * HD)), vv((size_t) (NKV * HD)), rr((size_t) IDXD);
+            for (int64_t i = 0; i < NKV * HD; ++i) {
+                kk[(size_t) i] = gauss(rng);
+                vv[(size_t) i] = gauss(rng);
+                pk[(size_t) t * NKV * HD + i] = (float) kk[(size_t) i];
+                pv[(size_t) t * NKV * HD + i] = (float) vv[(size_t) i];
+            }
+            for (int64_t d = 0; d < IDXD; ++d) {
+                rr[(size_t) d] = gauss(rng);
+                praw[(size_t) t * IDXD + d] = (float) rr[(size_t) d];
+            }
+            for (int64_t i = 0; i < NKV * HD; ++i) {
+                kk[(size_t) i] = (double) pk[(size_t) t * NKV * HD + i];       // the f32 the device got
+                vv[(size_t) i] = (double) pv[(size_t) t * NKV * HD + i];
+            }
+            for (int64_t d = 0; d < IDXD; ++d) rr[(size_t) d] = (double) praw[(size_t) t * IDXD + d];
+            pc.append(kk, vv, rr, (double) t);
+            k16[(size_t) t].resize((size_t) (NKV * HD));
+            v16[(size_t) t].resize((size_t) (NKV * HD));
+            for (int64_t i = 0; i < NKV * HD; ++i) {
+                k16[(size_t) t][(size_t) i] = (double) f32_from_f16(f16_from_f32(pk[(size_t) t * NKV * HD + i]));
+                v16[(size_t) t][(size_t) i] = (double) f32_from_f16(f16_from_f32(pv[(size_t) t * NKV * HD + i]));
+            }
+        }
+        const int64_t p_nbid = T / R;                // 525 complete blocks; the spare key sits at row 525
+        const int64_t page_size = 64, n_pages = (T + page_size - 1) / page_size;
+        strata::kernels::QsaShapes Sp = S;           // the granule lives in the shapes: see section 1
+        Sp.page_size = page_size;
+        std::vector<int32_t> table((size_t) n_pages);
+        for (int64_t i = 0; i < n_pages; ++i) table[(size_t) i] = (int32_t) (n_pages - 1 - i);   // REVERSED
+
+        Dev<int32_t> dtab;
+        dtab.put(table);
+        Dev<float> dpk_all, dpv_all;
+        dpk_all.put(pk);
+        dpv_all.put(pv);
+        Dev<uint16_t> dpk((size_t) n_pages * NKV * page_size * HD), dpv((size_t) n_pages * NKV * page_size * HD);
+        for (int64_t t = 0; t < T; ++t)
+            strata::kernels::kv_append(dpk.p, dpv.p, dtab.p, t, dpk_all.p + (size_t) t * NKV * HD,
+                                       dpv_all.p + (size_t) t * NKV * HD, Sp, nullptr);
+
+        const size_t ppooled_n = (size_t) (p_nbid + 1) * IDXD;
+        Dev<float> dpp((size_t) ppooled_n), dpdead((size_t) IDXD), dptail((size_t) (R - 1) * IDXD);
+        Dev<int32_t> dblockpos2(1);
+        Dev<int32_t> dpos2(1);
+        Dev<float> draw((size_t) IDXD);
+        strata::kernels::QsaIndexerBuffers bufs{dptail.p, dpdead.p, dpp.p, dblockpos2.p};
+        for (int64_t t = 0; t < T; ++t) {
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(draw.p, &praw[(size_t)t * IDXD],
+                                               (size_t)IDXD * 4)
+                                       .wait()),
+                  "raw");
+            const int32_t tpos = (int32_t) t;
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(dpos2.p, &tpos, 4)
+                                       .wait()),
+                  "pos2");
+            strata::kernels::indexer_key_append(draw.p, dpos2.p, 0, dw_kn.p, EPS, bufs, S, dcos.p, dsin.p,
+                                                nullptr);
+        }
+        Dev<float> dqidx, dsc;
+        dqidx.put(q_idx);
+        dsc.alloc((size_t) T);
+        strata::kernels::qsa_index(dpp.p, p_nbid, dqidx.p, nullptr, S, T, dsc.p, nullptr);
+
+        Dev<int32_t> dsel((size_t) T);
+        strata::kernels::topk_512(dsc.p, T, S, T, dsel.p, nullptr);
+        const std::vector<int32_t> sel_sparse = dsel.get((size_t) width);
+        const std::vector<float> pool32 = dpp.get(ppooled_n);
+        const std::vector<double> pool64 = as_d(pool32);
+        const std::vector<double> q_idx64 = as_d(q_idx);
+        const std::vector<double> sc_want =
+            ref_indexer_scores(pool64, p_nbid, q_idx64, IDXN, IDXD, {}, T, Alt{});
+        const std::vector<int32_t> sel_want = ref_select(sc_want, T, TOPK, false);
+        require("the selected set matches the reference (2100 cells, width 2051)", sel_sparse == sel_want,
+                std::to_string(width) + " ids");
+
+        // HOW CLOSE IS THE CUT?  `indexer_ids` is an EXACT capture key, so a boundary gap of a few fp32 ulp
+        // would make it sensitive to the accumulation order.  The gap is measured in ulp of the cut score.
+        {
+            std::vector<char> issel((size_t) T, 0);
+            for (int32_t id : sel_sparse) issel[(size_t) id] = 1;
+            double lo = 1e300, hi = -1e300;
+            for (int32_t id : sel_sparse) lo = std::min(lo, sc_want[(size_t) id]);
+            for (int64_t j = 0; j < T; ++j) if (!issel[(size_t) j]) hi = std::max(hi, sc_want[(size_t) j]);
+            if (lo == hi) {
+                // The cut sits inside a group of cells that all score exactly the same - here 0.0, a relu
+                // signal with all four head dots negative - so nothing but the ascending-index rule decides
+                // which of them survive.  A gap metric is undefined there; the tie is the finding.
+                int64_t tied_in = 0, tied_out = 0;
+                for (int32_t id : sel_sparse) if (sc_want[(size_t) id] == lo) ++tied_in;
+                for (int64_t j = 0; j < T; ++j) if (!issel[(size_t) j] && sc_want[(size_t) j] == lo) ++tied_out;
+                std::printf("  %-48s      THE CUT IS A TIE at %.6f: %lld selected, %lld rejected\n",
+                            "the cut", lo, (long long) tied_in, (long long) tied_out);
+                require("  ...and the kernel picks the same ones as the reference", sel_sparse == sel_want);
+            } else {
+                report("the selection boundary gap, in fp32 ulp of the cut",
+                       (lo - hi) / (std::fabs(lo) * 1.2e-7), "gap/ulp");
+                std::printf("  %-48s      last selected %.6f, first rejected %.6f\n", "the cut", lo, hi);
+            }
+        }
+
+        // the pipeline.  `--qsa-dense` swaps the SELECTION for every cell and keeps everything else; the sparse
+        // selection above is still compared against the reference either way.
+        std::vector<int32_t> sel = sel_sparse;
+        if (dense) {
+            sel.resize((size_t) T);
+            for (int64_t j = 0; j < T; ++j) sel[(size_t) j] = (int32_t) j;
+        }
+        Dev<int32_t> dsel2;
+        dsel2.put(sel);
+        const int64_t nsel = (int64_t) sel.size();
+        Dev<uint16_t> dks((size_t) nsel * NKV * HD), dvs((size_t) nsel * NKV * HD);
+        strata::kernels::kv_gather(dpk.p, dpv.p, dtab.p, dsel2.p, nsel, Sp, dks.p, dvs.p, nullptr);
+        Dev<float> dqq, dattn((size_t) NH * HD), dwt((size_t) NH * nsel);
+        dqq.put(q);
+        strata::kernels::qsa_attend(dqq.p, dks.p, dvs.p, nsel, S, dattn.p, dwt.p, nullptr);
+        const std::vector<double> attn = as_d(dattn.get((size_t) NH * HD));
+        const std::vector<double> wts = as_d(dwt.get((size_t) NH * nsel));
+
+        const std::vector<double> q64 = as_d(q);
+        const std::vector<double> attn_f64 = ref_attend(q64, NH, NKV, HD, sel, pc.k, pc.v, Alt{}, nullptr);
+        const std::vector<double> attn_f16 = ref_attend(q64, NH, NKV, HD, sel, k16, v16, Alt{}, nullptr);
+        double num = 0, den = 0;
+        for (size_t i = 0; i < attn.size(); ++i) {
+            num += std::fabs(attn[i] - attn_f16[i]);
+            den += std::fabs(attn_f16[i]);
+        }
+        report("qsa_attend vs the reference on the SAME fp16 cache", num / den, "rel");
+        {   // the SCALE trap, on data whose softmax is not saturated
+            Alt a; a.apply_scale = false;
+            const std::vector<double> alt = ref_attend(q64, NH, NKV, HD, sel, k16, v16, a, nullptr);
+            double n2 = 0, d2 = 0;
+            for (size_t i = 0; i < alt.size(); ++i) {
+                n2 += std::fabs(alt[i] - attn_f16[i]);
+                d2 += std::fabs(attn_f16[i]);
+            }
+            verdict("omitting 1/sqrt(head_dim) is observable (random fixture)", n2 / d2 > 0.05, pct(n2 / d2));
+        }
+        if (!(num / den <= 1e-5)) { std::printf("    *** over 1e-5 ***\n"); ++g_bad; }
+        const double fp16_cost = rel_l1(attn_f64, attn_f16);
+        report("the fp16 KV cache's OWN cost (f32 keys vs fp16 keys)", fp16_cost, "rel");
+        if (!(fp16_cost <= 1e-3)) {
+            std::printf("    *** the phase's 1e-3 for FP16 paths is exceeded by the CACHE ***\n");
+            ++g_bad;
+        }
+        {
+            std::vector<double> w_ref;
+            ref_attend(q64, NH, NKV, HD, sel, k16, v16, Alt{}, &w_ref);
+            double wn = 0, wd = 0;
+            for (int64_t j = 0; j < nsel; ++j) {
+                wn += std::fabs(wts[(size_t) j] - w_ref[(size_t) j]);
+                wd += std::fabs(w_ref[(size_t) j]);
+            }
+            report("the returned weights vs the reference (head 0)", wn / wd, "rel");
+        }
+
+        // the gate
+        std::vector<float> q_full((size_t) (NH * 2 * HD));
+        for (auto& x : q_full) x = rnd(2.0);
+        Dev<float> dqf, dattnf;
+        dqf.put(q_full);
+        dattnf.put(as_f(attn));
+        Dev<uint16_t> dgate((size_t) NH * HD);
+        strata::kernels::qsa_gate_apply(dattnf.p, dqf.p, S, dgate.p, nullptr);
+        const std::vector<uint16_t> gate16 = dgate.get((size_t) NH * HD);
+        const std::vector<double> qf64 = as_d(q_full);
+        const std::vector<double> gwant = ref_gate(attn, qf64, NH, HD, Alt{});
+        double gnum = 0, gden = 0;
+        int gbits = 0;
+        for (size_t i = 0; i < gwant.size(); ++i) {
+            gnum += std::fabs((double) f32_from_f16(gate16[i]) - gwant[i]);
+            gden += std::fabs(gwant[i]);
+            if (gate16[i] != f16_from_f32((float) gwant[i])) ++gbits;
+        }
+        report("qsa_gate_apply vs the double reference", gnum / gden, "rel (f16 out quant ~2.4e-4)");
+        if (!(gnum / gden <= 1e-3)) { std::printf("    *** over 1e-3 ***\n"); ++g_bad; }
+        std::printf("  %-48s      %d of %lld (CUDA's double exp vs libm's, in the last bits)\n",
+                    "fp16 gate bits differing from the reference", gbits, (long long) gwant.size());
+
+        auto sep_gate = [&](const std::string& name, const Alt& a) {
+            const std::vector<double> alt = ref_gate(attn, qf64, NH, HD, a);
+            double n2 = 0, d2 = 0;
+            for (size_t i = 0; i < alt.size(); ++i) {
+                n2 += std::fabs(alt[i] - gwant[i]);
+                d2 += std::fabs(gwant[i]);
+            }
+            verdict(name, n2 / d2 > 0.05, pct(n2 / d2));
+        };
+        Alt a10; a10.gate_second_half = false;
+        sep_gate("the gate from the FIRST half is observable", a10);
+        Alt a11; a11.gate_sigmoid = false;
+        sep_gate("silu instead of sigmoid on the QSA gate is observable", a11);
+
+        // DENSE vs SPARSE.  Below the bound the width IS n_kv, so the two paths must agree EXACTLY (P1.S4's
+        // isolation property, `ref/qsa.py` PROPERTY 9b); above it they must differ, or the switch is a no-op.
+        require("below the bound, dense and sparse are the SAME selection",
+                ref_select(sc_want, 2000, TOPK, false) == ref_select(sc_want, 2000, TOPK, true));
+        {
+            // BOTH SIDES COMPUTED HERE, from their own id lists and independently of `--qsa-dense`.  The first
+            // version compared against the pipeline's `attn`, which in dense mode IS the dense attention - so the
+            // switch silently turned the check into a comparison of a thing with itself and reported 0.00%.
+            const std::vector<int32_t> dense_all = ref_select(sc_want, T, TOPK, true);
+            auto attend_ids = [&](const std::vector<int32_t>& ids) {
+                Dev<int32_t> did;
+                did.put(ids);
+                Dev<uint16_t> dk2((size_t) ids.size() * NKV * HD), dv2((size_t) ids.size() * NKV * HD);
+                strata::kernels::kv_gather(dpk.p, dpv.p, dtab.p, did.p, (int64_t) ids.size(), Sp, dk2.p, dv2.p,
+                                           nullptr);
+                Dev<float> da((size_t) NH * HD);
+                strata::kernels::qsa_attend(dqq.p, dk2.p, dv2.p, (int64_t) ids.size(), S, da.p, nullptr, nullptr);
+                return as_d(da.get((size_t) NH * HD));
+            };
+            const std::vector<double> dense_attn = attend_ids(dense_all);
+            const std::vector<double> sparse_attn = attend_ids(sel_sparse);
+            double dn = 0, dd = 0;
+            for (size_t i = 0; i < sparse_attn.size(); ++i) {
+                dn += std::fabs(dense_attn[i] - sparse_attn[i]);
+                dd += std::fabs(sparse_attn[i]);
+            }
+            verdict("dense differs from sparse at n_kv = 2100 (> 2051)", dn / dd > 0.05, pct(dn / dd));
+        }
+    }
+
+    // ================= 7. the empty selection =================
+    {
+        Dev<float> dq((size_t) NH * HD), dattn((size_t) NH * HD);
+        dq.put(std::vector<float>((size_t) NH * HD, 1.0f));
+        dattn.put(std::vector<float>((size_t) NH * HD, 7.0f));
+        strata::kernels::qsa_attend(dq.p, nullptr, nullptr, 0, S, dattn.p, nullptr, nullptr);
+        const std::vector<float> got = dattn.get((size_t) NH * HD);
+        bool allz = true;
+        for (float x : got) if (x != 0.0f) allz = false;
+        require("an EMPTY selection gives a zero attention, not a NaN", allz, "all 6144 elements zero");
+    }
+
+    // ================= 8. --bench: what one QSA layer costs at 32K of context =================
+    if (bench) {
+        const int64_t T = MAXC;                      // 32,768 cells = 32K of context
+        const int64_t nbid = T / R;
+        const int64_t ps = S.page_size, n_pages = (T + ps - 1) / ps;
+        const int64_t w = strata::kernels::qsa_selection_width(T, S);
+        std::printf("\n  --bench at n_kv = %lld, page_size %lld, selection width %lld\n", (long long) T,
+                    (long long) ps, (long long) w);
+        std::vector<int32_t> table((size_t) n_pages);
+        for (int64_t i = 0; i < n_pages; ++i) table[(size_t) i] = (int32_t) i;
+        Dev<int32_t> dtab;
+        dtab.put(table);
+        Dev<uint16_t> dpk((size_t) n_pages * NKV * ps * HD), dpv((size_t) n_pages * NKV * ps * HD);
+        std::vector<float> kz((size_t) NKV * HD), vz((size_t) NKV * HD);
+        for (auto& x : kz) x = rnd(1.0);
+        for (auto& x : vz) x = rnd(1.0);
+        Dev<float> dkz, dvz;
+        dkz.put(kz);
+        dvz.put(vz);
+        strata::kernels::kv_append(dpk.p, dpv.p, dtab.p, 0, dkz.p, dvz.p, S, nullptr);
+
+        const size_t ppooled_n = (size_t) (nbid + 1) * IDXD;
+        Dev<float> dpp((size_t) ppooled_n), dsc((size_t) T);
+        std::vector<float> pz(ppooled_n), sz((size_t) T);
+        for (auto& x : pz) x = rnd(0.1f);
+        for (auto& x : sz) x = std::fabs(rnd(1.0f));
+        dpp.put(pz);
+        dsc.put(sz);
+        Dev<float> dqidx;
+        dqidx.put(q_idx);
+        Dev<int32_t> dsel((size_t) w);
+        Dev<uint16_t> dks((size_t) w * NKV * HD), dvs((size_t) w * NKV * HD);
+        Dev<float> dq((size_t) NH * HD), dattn((size_t) NH * HD), dwt((size_t) NH * w);
+        std::vector<float> qv((size_t) NH * HD);
+        for (auto& x : qv) x = rnd(1.0);
+        dq.put(qv);
+
+        auto timeit = [&](const std::string &name, int reps,
+                          const std::function<void()> &fn) {
+            try {
+        dpct::event_ptr a, b;
+            a = new sycl::event();
+            b = new sycl::event();
+            fn();
+            dpct::get_current_device().queues_wait_and_throw();
+            dpct::sync_barrier(a);
+            for (int i = 0; i < reps; ++i) fn();
+            dpct::sync_barrier(b);
+            b->wait_and_throw();
+            float ms = 0;
+            ms = (b->get_profiling_info<
+                      sycl::info::event_profiling::command_end>() -
+                  a->get_profiling_info<
+                      sycl::info::event_profiling::command_start>()) /
+                 1000000.0f;
+            std::printf("  %-48s %8.1f us\n", name.c_str(), ms * 1000.0f / (float) reps);
+            dpct::destroy_event(a);
+            dpct::destroy_event(b);
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        const int reps = 20;
+        timeit("qsa_index  (8193 pooled rows x 4 heads)", reps,
+               [&] { strata::kernels::qsa_index(dpp.p, nbid, dqidx.p, nullptr, S, T, dsc.p, nullptr); });
+        timeit("topk_512   (32768 cells)", reps,
+               [&] { strata::kernels::topk_512(dsc.p, T, S, w, dsel.p, nullptr); });
+        strata::kernels::topk_512(dsc.p, T, S, w, dsel.p, nullptr);
+        timeit("kv_gather  (2051 ids through the page table)", reps,
+               [&] { strata::kernels::kv_gather(dpk.p, dpv.p, dtab.p, dsel.p, w, S, dks.p, dvs.p, nullptr); });
+        timeit("qsa_attend (2051 selected, 24 heads)", reps,
+               [&] { strata::kernels::qsa_attend(dq.p, dks.p, dvs.p, w, S, dattn.p, dwt.p, nullptr); });
+        timeit("kv_append  (one cell, 2 heads x 256)", 200,
+               [&] { strata::kernels::kv_append(dpk.p, dpv.p, dtab.p, 0, dkz.p, dvz.p, S, nullptr); });
+        timeit("ONE QSA LAYER (index+topk+gather+attend)", reps, [&] {
+            strata::kernels::qsa_index(dpp.p, nbid, dqidx.p, nullptr, S, T, dsc.p, nullptr);
+            strata::kernels::topk_512(dsc.p, T, S, w, dsel.p, nullptr);
+            strata::kernels::kv_gather(dpk.p, dpv.p, dtab.p, dsel.p, w, S, dks.p, dvs.p, nullptr);
+            strata::kernels::qsa_attend(dq.p, dks.p, dvs.p, w, S, dattn.p, dwt.p, nullptr);
+        });
+    }
+
+    // ================= 6. indexer_key_append IS CAPTURABLE =================
+    //
+    // THE PROPERTY THE DEVICE-POSITION REFACTOR WAS FOR, TESTED DIRECTLY rather than argued.  `indexer_key_append`
+    // took `int64_t pos` as a host scalar, which a CUDA graph bakes in at capture time - so a captured call
+    // would replay the first token's position forever: `slot = pos % r` never advances, no block completes, and
+    // the indexer keeps pooling cells 0-3 for the whole sequence.
+    //
+    // The test captures ONE call, then replays the SAME graph twice with `pos_dev` and `raw` changed between
+    // them, and requires the second replay to land in a DIFFERENT pooled row with the reference's value.  If the
+    // position were still baked in, both replays would write row 0 and the pooled rows would be identical.
+    //
+    // That is the negative control built into the assertion: "row 1 is correct" alone could also pass for a
+    // graph that reread the position by accident, but "row 0 unchanged AND row 1 correct AND row 1 != row 0"
+    // cannot pass for a baked-in position.
+    {
+        std::printf("\n-- indexer_key_append under graph capture\n");
+        const int R2 = 4;
+        const int64_t NCELL = 8;                       // two complete blocks of r=4
+        const size_t IDXD2 = (size_t) IDXD;
+        std::vector<float> raw2((size_t) NCELL * IDXD2);
+        for (size_t i = 0; i < raw2.size(); ++i) raw2[i] = (float) std::sin((double) i * 0.013) * 2.0f - 0.3f;
+
+        const int64_t nb2 = NCELL / R2;
+        Dev<float> pooled2((size_t) (nb2 + 2) * IDXD2), dead2(IDXD2), tail2((size_t) (R2 - 1) * IDXD2);
+        Dev<int32_t> bpos2(1), pos2(1);
+        Dev<float> raw2d(IDXD2);
+        strata::kernels::QsaIndexerBuffers bufs2{tail2.p, dead2.p, pooled2.p, bpos2.p};
+
+        // capture ONE call, on its own stream
+        dpct::queue_ptr cs = &dpct::get_in_order_queue();
+        check(DPCT_CHECK_ERROR(
+                  cs = dpct::get_current_device().create_queue(true)),
+              "cs");
+        check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs)),
+              "begincap");
+        strata::kernels::indexer_key_append(raw2d.p, pos2.p, POS_BASE, dw_kn.p, EPS, bufs2, S, dcos.p, dsin.p,
+                                            (void*) cs);
+        dpct::experimental::command_graph_ptr g2 = nullptr;
+        check(DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &g2)),
+              "endcap");
+        check(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(cs)),
+              "csd");
+        size_t nodes2 = 0;
+        check(DPCT_CHECK_ERROR(
+                  dpct::experimental::get_nodes(g2, nullptr, &nodes2)),
+              "nodes");
+        dpct::experimental::command_graph_exec_ptr ex2 = nullptr;
+        check(DPCT_CHECK_ERROR(
+                  ex2 = new sycl::ext::oneapi::experimental::command_graph<
+                      sycl::ext::oneapi::experimental::graph_state::executable>(
+                      g2->finalize())),
+              "inst");
+
+        // replay A: cells 0..3, which completes block 0
+        for (int t = 0; t < 4; ++t) {
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(raw2d.p, &raw2[(size_t)t * IDXD2], IDXD2 * 4)
+                          .wait()),
+                  "r2");
+            const int32_t tp = t;
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue().memcpy(pos2.p, &tp, 4).wait()),
+                  "p2");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().ext_oneapi_graph(*ex2)),
+                  "launchA");
+        }
+        const std::vector<float> afterA = pooled2.get((size_t) (nb2 + 2) * IDXD2);
+
+        // replay B: cells 4..7 through the SAME graph, which completes block 1
+        for (int t = 4; t < 8; ++t) {
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(raw2d.p, &raw2[(size_t)t * IDXD2], IDXD2 * 4)
+                          .wait()),
+                  "r3");
+            const int32_t tp = t;
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue().memcpy(pos2.p, &tp, 4).wait()),
+                  "p3");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().ext_oneapi_graph(*ex2)),
+                  "launchB");
+        }
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_current_device().queues_wait_and_throw()),
+              "sync2");
+        const std::vector<float> afterB = pooled2.get((size_t) (nb2 + 2) * IDXD2);
+
+        std::printf("  %-44s %zu nodes for one call\n", "the pooled kernel is capturable", nodes2);
+
+        // row 0 must be UNTOUCHED by the second block's replays
+        int row0_same = 0;
+        for (size_t d = 0; d < IDXD2; ++d)
+            if (afterA[d] == afterB[d]) ++row0_same;
+        std::printf("  %-44s %d of %zu unchanged\n", "the first block's row survives replay B", row0_same,
+                    IDXD2);
+        if (row0_same != (int) IDXD2) ++g_bad;
+
+        // row 1 must now be FILLED by the captured graph - the whole point
+        int row1_nonzero = 0;
+        for (size_t d = 0; d < IDXD2; ++d)
+            if (afterB[IDXD2 + d] != 0.0f) ++row1_nonzero;
+        std::printf("  %-44s %d of %zu non-zero\n", "the SECOND block's row arrives through the same graph",
+                    row1_nonzero, IDXD2);
+        if (row1_nonzero != (int) IDXD2) ++g_bad;
+
+        // and the two rows must DIFFER, which a baked-in position cannot produce
+        int rows_differ = 0;
+        for (size_t d = 0; d < IDXD2; ++d)
+            if (afterB[d] != afterB[IDXD2 + d]) ++rows_differ;
+        std::printf("  %-44s %d of %zu differ\n", "the two pooled rows are different keys", rows_differ,
+                    IDXD2);
+        // A baked-in position would have written row 0 a second time and left row 1 at zero, so these two
+        // assertions together are the negative control for the refactor.
+        if (rows_differ != (int) IDXD2) ++g_bad;
+
+        check(DPCT_CHECK_ERROR(delete (ex2)), "exd");
+        check(DPCT_CHECK_ERROR(delete (g2)), "gd");
+    }
+
+    std::printf("\nqsa: %d failures\n", g_bad);
+    if (g_bad) return 1;
+    if (selftest) std::printf("qsa_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
new file mode 100644
index 00000000000..c865ca196bb
--- /dev/null
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -0,0 +1,263 @@
+// src/kernels/qsa_prompt_attn_parity.cpp - perf-review D-1: the tensor-core prompt attention (qsa_prompt_attn.hpp)
+// against the FP32 kernel it replaces (`qsa_decode_attn_batch`) and an FP64 host reference (GPU, synthetic, no model).
+//
+// Int8 and FP16 pools with random codes, scales and queries; selections shaped like the prompt path's (the 2,051
+// widest, a recent window plus older cells that drift slowly from one query to the next, so neighbours share most
+// of them as they do in a real prompt; short contexts take every cell). Checks:
+//   1. against FP64, the new kernel's error is no larger than a small multiple of the old kernel's (both FP32 math);
+//   2. the new and old outputs agree to a relative 1e-4 of the output scale;
+// then times both over a prompt chunk (the old one in batches of 32, as prefill.cpp calls it).
+// Usage: qsa_prompt_attn_parity [context=32768] [queries=2048] [reps=5]
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/qsa_prompt_attn.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009:788: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T> T* up(const std::vector<T>& h) {
+    T* d = nullptr;
+    ck(DPCT_CHECK_ERROR(
+           d = (T *)sycl::malloc_device(h.size() * sizeof(T) + 64,
+                                        dpct::get_in_order_queue())),
+       "malloc");
+    /*
+    DPCT1114:789: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d, h.data(), h.size() * sizeof(T))),
+       "upload");
+    return d;
+}
+float h2f(uint16_t b) {
+    sycl::half h; *reinterpret_cast<uint16_t *>(&h) = b;
+    return sycl::vec<sycl::half, 1>(h)
+        .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+uint16_t f2h(float f) {
+    sycl::half h =
+        sycl::vec<float, 1>(f)
+            .convert<sycl::half, sycl::rounding_mode::automatic>()[0];
+    return *reinterpret_cast<uint16_t *>(&h);
+}
+
+int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
+    const k::QsaShapes s = k::qsa_real_shapes();
+    const int64_t HD = s.head_dim, NKV = s.n_head_kv, NH = s.n_head, PS = s.page_size;
+    const int64_t pages = (ctx + PS - 1) / PS, rows = pages * NKV * PS;
+    std::mt19937 rng(1234 + fmt);
+    std::normal_distribution<float> nd(0.f, 1.f);
+    std::uniform_int_distribution<int> code(-127, 127);
+    std::uniform_real_distribution<float> sc(0.005f, 0.03f);
+    // pools; page table a shuffled permutation (the readers must follow it)
+    std::vector<int8_t> kq, vq;
+    std::vector<uint16_t> ks, vs, kh, vh;
+    if (fmt == 1) {
+        kq.resize(rows * HD); vq.resize(rows * HD); ks.resize(rows * 4); vs.resize(rows * 4);
+        for (auto& x : kq) x = (int8_t) code(rng);
+        for (auto& x : vq) x = (int8_t) code(rng);
+        for (auto& x : ks) x = f2h(sc(rng));
+        for (auto& x : vs) x = f2h(sc(rng));
+    } else {
+        kh.resize(rows * HD); vh.resize(rows * HD);
+        for (auto& x : kh) x = f2h(nd(rng) * 1.5f);
+        for (auto& x : vh) x = f2h(nd(rng));
+    }
+    std::vector<int32_t> table(pages);
+    for (int64_t i = 0; i < pages; ++i) table[i] = (int32_t) i;
+    std::shuffle(table.begin(), table.end(), rng);
+    // queries at positions ctx - nq .. ctx - 1
+    const int64_t cap = k::qsa_selection_width(ctx, s);
+    std::vector<int32_t> ids((size_t) (nq * cap), 0), steps((size_t) (nq * k::kStepCount), 0);
+    std::vector<float> q((size_t) (nq * NH * HD));
+    for (auto& x : q) x = nd(rng) * 2.0f;
+    std::vector<int32_t> old_cells;
+    for (int64_t i = 0; i < nq; ++i) {
+        const int64_t pos = ctx - nq + i, nkv = pos + 1;
+        const int64_t w = k::qsa_selection_width(nkv, s);
+        int32_t* sel = ids.data() + i * cap;
+        steps[i * k::kStepCount + k::kStepWidth] = (int32_t) w;
+        if (w == nkv) {
+            for (int64_t c = 0; c < w; ++c) sel[c] = (int32_t) c;
+            continue;
+        }
+        const int64_t recent = 512, older = w - recent;
+        if ((int64_t) old_cells.size() != older) {   // the older cells: a set that drifts ~3% per query
+            std::vector<int32_t> all((size_t) (nkv - recent));
+            for (int64_t c = 0; c < nkv - recent; ++c) all[c] = (int32_t) c;
+            std::shuffle(all.begin(), all.end(), rng);
+            old_cells.assign(all.begin(), all.begin() + older);
+        } else {
+            std::uniform_int_distribution<int64_t> pick(0, older - 1), any(0, nkv - recent - 1);
+            for (int r = 0; r < older / 32; ++r) {
+                const int32_t c = (int32_t) any(rng);
+                if (std::find(old_cells.begin(), old_cells.end(), c) == old_cells.end()) old_cells[pick(rng)] = c;
+            }
+        }
+        std::vector<int32_t> v(old_cells);
+        for (int64_t c = nkv - recent; c < nkv; ++c) v.push_back((int32_t) c);
+        std::sort(v.begin(), v.end());
+        std::copy(v.begin(), v.end(), sel);
+    }
+    k::QsaAttnPools pl;
+    if (fmt == 1) { pl.k_q = up(kq); pl.v_q = up(vq); pl.k_scale = up(ks); pl.v_scale = up(vs); }
+    else { pl.k_pool = up(kh); pl.v_pool = up(vh); }
+    pl.page_table = up(table);
+    const int32_t* d_ids = up(ids);
+    const int32_t* d_steps = up(steps);
+    const float* d_q = up(q);
+    float *d_old = nullptr, *d_new = nullptr, *scratch = nullptr;
+    const int64_t batch = 32;
+    ck(DPCT_CHECK_ERROR(d_old = (float *)sycl::malloc_device(
+                            nq * NH * HD * 4, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(d_new = (float *)sycl::malloc_device(
+                            nq * NH * HD * 4, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           scratch = (float *)sycl::malloc_device(
+               batch * k::qsa_decode_attn_scratch_floats(cap, s) * 4,
+               dpct::get_in_order_queue())),
+       "malloc");
+    auto old_run = [&]() {
+        for (int64_t t0 = 0; t0 < nq; t0 += batch)
+            k::qsa_decode_attn_batch(d_q + t0 * NH * HD, pl, d_ids + t0 * cap, d_steps + t0 * k::kStepCount, cap, s,
+                                     scratch, d_old + t0 * NH * HD, std::min(batch, nq - t0), nullptr);
+    };
+    auto new_run = [&]() {
+        if (!k::qsa_prompt_attn_batch(d_q, pl, d_ids, d_steps, cap, s, d_new, nq, nullptr)) {
+            std::fprintf(stderr, "qsa_prompt_attn_batch refused the pools\n");
+            std::exit(2);
+        }
+    };
+    old_run();
+    new_run();
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "run");
+    std::vector<float> o((size_t) (nq * NH * HD)), nw(o.size());
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(o.data(), d_old, o.size() * 4)
+                            .wait()),
+       "down");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(nw.data(), d_new, nw.size() * 4)
+                            .wait()),
+       "down");
+    // 1. FP64 reference on a sample of queries
+    double err_old = 0, err_new = 0, ref_scale = 0;
+    for (int64_t i = 0; i < nq; i += std::max<int64_t>(1, nq / 16)) {
+        const int64_t w = steps[i * k::kStepCount + k::kStepWidth];
+        const int32_t* sel = ids.data() + i * cap;
+        for (int64_t h = 0; h < NH; ++h) {
+            const int64_t kvh = h / (NH / NKV);
+            std::vector<double> sco((size_t) w);
+            double mx = -1e300;
+            for (int64_t c = 0; c < w; ++c) {
+                const int64_t cell = sel[c], row = ((int64_t) table[cell / PS] * NKV + kvh) * PS + cell % PS;
+                double a = 0;
+                for (int64_t d = 0; d < HD; ++d) {
+                    const double kv = fmt == 1 ? (double) kq[row * HD + d] * h2f(ks[row * 4 + d / 64]) : h2f(kh[row * HD + d]);
+                    a += (double) q[(i * NH + h) * HD + d] * kv;
+                }
+                sco[c] = a / 16.0;
+                mx = std::max(mx, sco[c]);
+            }
+            double l = 0;
+            for (auto& x : sco) { x = std::exp(x - mx); l += x; }
+            for (int64_t d = 0; d < HD; ++d) {
+                double a = 0;
+                for (int64_t c = 0; c < w; ++c) {
+                    const int64_t cell = sel[c], row = ((int64_t) table[cell / PS] * NKV + kvh) * PS + cell % PS;
+                    const double vv = fmt == 1 ? (double) vq[row * HD + d] * h2f(vs[row * 4 + d / 64]) : h2f(vh[row * HD + d]);
+                    a += sco[c] * vv;
+                }
+                const double r = a / l;
+                const size_t at = (size_t) ((i * NH + h) * HD + d);
+                ref_scale = std::max(ref_scale, std::fabs(r));
+                err_old = std::max(err_old, std::fabs(o[at] - r));
+                err_new = std::max(err_new, std::fabs(nw[at] - r));
+            }
+        }
+    }
+    // 2. new vs old everywhere
+    double diff = 0, scale = 0;
+    for (size_t i = 0; i < o.size(); ++i) {
+        diff = std::max(diff, (double) std::fabs(o[i] - nw[i]));
+        scale = std::max(scale, (double) std::fabs(o[i]));
+    }
+    // 3. speed
+    dpct::event_ptr e0, e1;
+    e0 = new sycl::event();
+    e1 = new sycl::event();
+    float ms_old = 0, ms_new = 0;
+    dpct::sync_barrier(e0);
+    for (int r = 0; r < reps; ++r) old_run();
+    dpct::sync_barrier(e1);
+    ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "time");
+    ms_old =
+        (e1->get_profiling_info<sycl::info::event_profiling::command_end>() -
+         e0->get_profiling_info<sycl::info::event_profiling::command_start>()) /
+        1000000.0f;
+    dpct::sync_barrier(e0);
+    for (int r = 0; r < reps; ++r) new_run();
+    dpct::sync_barrier(e1);
+    ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "time");
+    ms_new =
+        (e1->get_profiling_info<sycl::info::event_profiling::command_end>() -
+         e0->get_profiling_info<sycl::info::event_profiling::command_start>()) /
+        1000000.0f;
+    const bool ok1 = err_new <= std::max(4.0 * err_old, 1e-6 * ref_scale);
+    const bool ok2 = diff <= 1e-4 * scale;
+    std::printf("%s %s ctx %lld, %lld queries: vs FP64 old %.3g new %.3g (output scale %.3g); new vs old %.3g (%.2g of "
+                "scale); %.3f -> %.3f ms per chunk (%.2fx)\n",
+                ok1 && ok2 ? "PASS" : "FAIL", fmt == 1 ? "int8" : "fp16", (long long) ctx, (long long) nq, err_old,
+                err_new, ref_scale, diff, diff / scale, ms_old / reps, ms_new / reps, ms_old / ms_new);
+    sycl::free((void *)d_ids, dpct::get_in_order_queue());
+        sycl::free((void *)d_steps, dpct::get_in_order_queue());
+        sycl::free((void *)d_q, dpct::get_in_order_queue());
+        sycl::free((void *)d_old, dpct::get_in_order_queue());
+        sycl::free((void *)d_new, dpct::get_in_order_queue());
+    sycl::free((void *)scratch, dpct::get_in_order_queue());
+    sycl::free((void *)pl.k_q, dpct::get_in_order_queue());
+        sycl::free((void *)pl.v_q, dpct::get_in_order_queue());
+        sycl::free((void *)pl.k_scale, dpct::get_in_order_queue());
+        sycl::free((void *)pl.v_scale, dpct::get_in_order_queue());
+    sycl::free((void *)pl.k_pool, dpct::get_in_order_queue());
+        sycl::free((void *)pl.v_pool, dpct::get_in_order_queue());
+        sycl::free((void *)pl.page_table, dpct::get_in_order_queue());
+    return ok1 && ok2 ? 0 : 1;
+}
+}  // namespace
+
+int main(int argc, char** argv) {
+    const int64_t ctx = argc > 1 ? std::atoll(argv[1]) : 32768;
+    const int64_t nq = argc > 2 ? std::atoll(argv[2]) : 2048;
+    const int reps = argc > 3 ? std::atoi(argv[3]) : 5;
+    int fails = 0;
+    fails += run(1, ctx, nq, reps);
+    fails += run(0, ctx, nq, reps);
+    fails += run(1, 1500, std::min<int64_t>(nq, 1500), reps);   // short context: the selection is every cell
+    fails += run(1, 2100, std::min<int64_t>(nq, 256), reps);    // the identity-to-sparse edge
+    std::printf("FAILURES: %d\n", fails);
+    return fails;
+}
diff --git a/sycl/src/kernels/qsa_select_bench.cpp b/sycl/src/kernels/qsa_select_bench.cpp
new file mode 100644
index 00000000000..b73912e4530
--- /dev/null
+++ b/sycl/src/kernels/qsa_select_bench.cpp
@@ -0,0 +1,197 @@
+// src/kernels/qsa_select_bench.cpp - the prompt path's QSA selection (qsa_select.hpp) timed per stage, block scores
+// (the warp kernel and the tensor-core one) and top-k, for a batch of consecutive queries at a given context, and
+// the two scorers compared: score difference and how many selections differ (GPU, synthetic, no model).
+// Usage: qsa_select_bench [context=131072] [queries=256] [reps=10]
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_select.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009:603: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T> T* up(const std::vector<T>& h) {
+    T* d = nullptr;
+    ck(DPCT_CHECK_ERROR(
+           d = (T *)sycl::malloc_device(h.size() * sizeof(T) + 64,
+                                        dpct::get_in_order_queue())),
+       "malloc");
+    /*
+    DPCT1114:604: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d, h.data(), h.size() * sizeof(T))),
+       "upload");
+    return d;
+}
+}  // namespace
+
+int main(int argc, char** argv) {
+    const int64_t ctx = argc > 1 ? std::atoll(argv[1]) : 131072;
+    const int64_t nq = argc > 2 ? std::atoll(argv[2]) : 256;
+    const int reps = argc > 3 ? std::atoi(argv[3]) : 10;
+    const k::QsaShapes s = k::qsa_real_shapes();
+    const int64_t max_blocks = ctx / 4 + 1, cap = k::qsa_selection_width(k::kTopkMaxCells, s);
+    std::mt19937 rng(7);
+    std::normal_distribution<float> nd(0.f, 1.f);
+    // keys with a shared direction plus noise, so the scores have a spread like a real indexer's
+    std::vector<float> dir(128), pooled((size_t) (max_blocks * 128)), dead(128), q((size_t) (nq * 512));
+    for (auto& x : dir) x = nd(rng);
+    for (int64_t b = 0; b < max_blocks; ++b) {
+        const float a = nd(rng);
+        for (int d = 0; d < 128; ++d) pooled[(size_t) (b * 128 + d)] = 0.5f * a * dir[d] + nd(rng);
+    }
+    for (auto& x : dead) x = nd(rng);
+    for (int64_t i = 0; i < nq; ++i)
+        for (int d = 0; d < 512; ++d) q[(size_t) (i * 512 + d)] = 0.2f * dir[d % 128] + 0.1f * nd(rng);
+    std::vector<int32_t> steps((size_t) (nq * k::kStepCount));
+    for (int64_t i = 0; i < nq; ++i) {   // qsa_step_fill's arithmetic (kept here so the bench links only qsa_select)
+        int32_t* st = steps.data() + i * k::kStepCount;
+        const int64_t pos = ctx - nq + i;
+        st[k::kStepPos] = (int32_t) pos;
+        st[k::kStepNKv] = (int32_t) (pos + 1);
+        st[k::kStepNBid] = (int32_t) ((pos + 1) / s.idx_block);
+        st[k::kStepWidth] = (int32_t) k::qsa_selection_width(pos + 1, s);
+    }
+    const float* d_pooled = up(pooled);
+    const float* d_dead = up(dead);
+    const float* d_q = up(q);
+    const int32_t* d_steps = up(steps);
+    float *sc_old = nullptr, *sc_new = nullptr;
+    int32_t *ids_old = nullptr, *ids_new = nullptr;
+    ck(DPCT_CHECK_ERROR(
+           sc_old = (float *)sycl::malloc_device((size_t)(nq * max_blocks) * 4,
+                                                 dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           sc_new = (float *)sycl::malloc_device((size_t)(nq * max_blocks) * 4,
+                                                 dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           ids_old = (int32_t *)sycl::malloc_device(
+               (size_t)(nq * cap) * 4, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           ids_new = (int32_t *)sycl::malloc_device(
+               (size_t)(nq * cap) * 4, dpct::get_in_order_queue())),
+       "malloc");
+    const int64_t active = steps[(size_t) ((nq - 1) * k::kStepCount + k::kStepNBid)] + 1;
+    auto run_old = [&] { k::qsa_block_scores(d_pooled, d_dead, d_q, d_steps, nq, max_blocks, s, sc_old, nullptr, active); };
+    auto run_new = [&] {
+        if (!k::qsa_block_scores_tc(d_pooled, d_dead, d_q, d_steps, nq, max_blocks, s, sc_new, nullptr, active)) {
+            std::fprintf(stderr, "tc scorer refused\n");
+            std::exit(2);
+        }
+    };
+    run_old();
+    run_new();
+    k::qsa_block_topk_ref(sc_old, d_steps, nq, max_blocks, cap, s, ids_old, nullptr);
+    k::qsa_block_topk(sc_new, d_steps, nq, max_blocks, cap, s, ids_new, nullptr);
+    int32_t* ids_reg = nullptr;   // the register top-k on the OLD scores: must equal the reference exactly
+    ck(DPCT_CHECK_ERROR(
+           ids_reg = (int32_t *)sycl::malloc_device(
+               (size_t)(nq * cap) * 4, dpct::get_in_order_queue())),
+       "malloc");
+    k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "warm");
+    // compare
+    std::vector<float> a((size_t) (nq * max_blocks)), b(a.size());
+    std::vector<int32_t> ia((size_t) (nq * cap)), ib(ia.size());
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(a.data(), sc_old, a.size() * 4)
+                            .wait()),
+       "down");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(b.data(), sc_new, b.size() * 4)
+                            .wait()),
+       "down");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(ia.data(), ids_old, ia.size() * 4)
+                            .wait()),
+       "down");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(ib.data(), ids_new, ib.size() * 4)
+                            .wait()),
+       "down");
+    std::vector<int32_t> ir(ia.size());
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(ir.data(), ids_reg, ir.size() * 4)
+                            .wait()),
+       "down");
+    int64_t reg_same = 0;
+    for (int64_t i = 0; i < nq; ++i) {
+        const int64_t w = steps[(size_t) (i * k::kStepCount + k::kStepWidth)];
+        reg_same += std::equal(ia.begin() + i * cap, ia.begin() + i * cap + w, ir.begin() + i * cap);
+    }
+    double max_rel = 0, sum_rel = 0, n_rel = 0;
+    int64_t same_sel = 0, cells_diff = 0, cells_all = 0;
+    for (int64_t i = 0; i < nq; ++i) {
+        const int32_t* st = steps.data() + i * k::kStepCount;
+        for (int64_t j = 0; j <= st[k::kStepNBid]; ++j) {
+            const double x = a[(size_t) (i * max_blocks + j)], y = b[(size_t) (i * max_blocks + j)];
+            const double r = std::fabs(x - y) / std::max(1e-6, std::fabs(x));
+            max_rel = std::max(max_rel, r);
+            sum_rel += r;
+            n_rel += 1;
+        }
+        const int64_t w = st[k::kStepWidth];
+        std::vector<int32_t> x(ia.begin() + i * cap, ia.begin() + i * cap + w), y(ib.begin() + i * cap, ib.begin() + i * cap + w);
+        same_sel += x == y;
+        std::vector<int32_t> d;
+        std::set_symmetric_difference(x.begin(), x.end(), y.begin(), y.end(), std::back_inserter(d));
+        cells_diff += (int64_t) d.size() / 2;
+        cells_all += w;
+    }
+    // time
+    dpct::event_ptr e0, e1;
+    e0 = new sycl::event(); e1 = new sycl::event();
+    auto timed = [&](auto f) {
+        try {
+    dpct::sync_barrier(e0);
+        for (int r = 0; r < reps; ++r) f();
+        dpct::sync_barrier(e1);
+        ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "time");
+        float ms = 0;
+        ms = (e1->get_profiling_info<
+                  sycl::info::event_profiling::command_end>() -
+              e0->get_profiling_info<
+                  sycl::info::event_profiling::command_start>()) /
+             1000000.0f;
+        return ms / reps;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    const float t_old = timed(run_old), t_new = timed(run_new);
+    const float t_tk = timed([&] { k::qsa_block_topk_ref(sc_old, d_steps, nq, max_blocks, cap, s, ids_old, nullptr); });
+    const float t_tk2 = timed([&] { k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr); });
+    std::printf("top-k %.3f -> %.3f ms (%.1fx), register top-k identical to the reference %lld/%lld\n", t_tk, t_tk2,
+                t_tk / t_tk2, (long long) reg_same, (long long) nq);
+    std::printf("ctx %lld, %lld queries x %lld blocks: scores %.3f -> %.3f ms (%.1fx), top-k %.3f ms; score rel diff "
+                "mean %.2g max %.2g; selections identical %lld/%lld, cells differing %.4f%%\n", (long long) ctx,
+                (long long) nq, (long long) active, t_old, t_new, t_old / t_new, t_tk, sum_rel / std::max(1.0, n_rel),
+                max_rel, (long long) same_sel, (long long) nq, cells_all ? 100.0 * (double) cells_diff / (double) cells_all : 0.0);
+    return 0;
+}
diff --git a/sycl/src/kernels/quantize_act_parity.cpp b/sycl/src/kernels/quantize_act_parity.cpp
new file mode 100644
index 00000000000..a4a8222efdd
--- /dev/null
+++ b/sycl/src/kernels/quantize_act_parity.cpp
@@ -0,0 +1,450 @@
+// src/kernels/quantize_act_parity.cpp - P2.S2's parity test for the Q8_0 activation quantizer.
+//
+// THE CHECK IS ON THE BYTES, not on the round-tripped values.  `ref/quant.py::q8_0`'s central finding is that
+// dividing by the fp16-rounded scale instead of the fp32 one changed 18 of 80 blocks' quantized integers
+// while leaving the dequantized values within a rounding step - so a comparison of VALUES would have passed
+// and the engine would still have disagreed with ggml.  Comparing the 34-byte block catches that directly.
+//
+// The reference is a host transcription of `ref/quant.py::q8_0`:
+//
+//     d32 = amax / 127.0f                       (f32)
+//     d16 = fp16(d32)                           (stored, and used to DEQUANTIZE)
+//     q   = clip(rint(x / (double)d32), -128, 127)
+//     round trip = q * d16
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/f16_bits.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// THE CONVERSIONS COME FROM `f16_bits.hpp`, and this test used to carry its own.  The private `f16_bits_to_f32`
+// below flushed fp16 SUBNORMALS to zero, and the private encoder returned NaN for finite fp16 overflow - both
+// invisible with the O(1) fixture this file has.  Round 198 validated the shared pair against 395 numpy
+// float16 vectors and all 65,536 reverse patterns, so the test now shares the implementation it is checking
+// instead of guessing at it independently.  Thin aliases keep the body below unchanged.
+using strata::kernels::f16_from_f32;
+using strata::kernels::f32_from_f16;
+inline uint16_t f32_to_f16_bits(float f) { return f16_from_f32(f); }
+inline float f16_bits_to_f32(uint16_t h) { return f32_from_f16(h); }
+
+void reference_q8_0(const float* x, long long n, std::vector<uint8_t>& blocks, std::vector<float>& back) {
+    blocks.assign((size_t) (n / 32) * 34, 0);
+    back.assign((size_t) n, 0.0f);
+    for (long long b = 0; b < n / 32; ++b) {
+        const float* xb = x + b * 32;
+        float amax = 0.0f;
+        for (int i = 0; i < 32; ++i) amax = std::fmax(amax, std::fabs(xb[i]));
+        uint8_t* out = &blocks[(size_t) b * 34];
+        if (amax == 0.0f) continue;
+        const float d32 = amax / 127.0f;
+        const uint16_t dbits = f32_to_f16_bits(d32);
+        out[0] = (uint8_t) (dbits & 0xFF);
+        out[1] = (uint8_t) (dbits >> 8);
+        const float d16 = f16_bits_to_f32(dbits);
+        for (int i = 0; i < 32; ++i) {
+            double q = std::rint((double) xb[i] / (double) d32);
+            if (q > 127.0) q = 127.0;
+            if (q < -128.0) q = -128.0;
+            out[2 + i] = (uint8_t) (int8_t) q;
+            back[(size_t) (b * 32 + i)] = (float) (int8_t) out[2 + i] * d16;
+        }
+    }
+}
+
+int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
+    const long long n = (long long) x.size();
+    std::vector<uint8_t> r_blocks, g_blocks((size_t) (n / 32) * 34);
+    std::vector<float> r_back, g_back((size_t) n);
+    reference_q8_0(x.data(), n, r_blocks, r_back);
+
+    float* d_x = nullptr;
+    uint8_t* d_b = nullptr;
+    float* d_back = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<float>(
+                               (size_t)n, dpct::get_in_order_queue())),
+          "malloc x");
+    check(DPCT_CHECK_ERROR(d_b = (uint8_t *)sycl::malloc_device(
+                               g_blocks.size(), dpct::get_in_order_queue())),
+          "malloc blocks");
+    check(DPCT_CHECK_ERROR(d_back = sycl::malloc_device<float>(
+                               (size_t)n, dpct::get_in_order_queue())),
+          "malloc back");
+    /*
+    DPCT1114:1053: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), (size_t)n * sizeof(float))),
+          "copy x");
+    // PROBE: does the DEVICE hold what the host thinks it sent?  The scale byte differs with the SAME
+    // exponent and a zeroed mantissa, which says the kernel's amax differs from the host's on identical
+    // input - so the first thing to rule out is the copy itself.
+    {
+        std::vector<float> rt((size_t) n);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(rt.data(), d_x, (size_t)n * sizeof(float))
+                      .wait()),
+              "probe copy back");
+        long long diff = 0;
+        for (long long i = 0; i < n; ++i) if (std::memcmp(&rt[(size_t) i], &x[(size_t) i], 4) != 0) ++diff;
+        if (diff) std::printf("    PROBE: device x differs from host x in %lld of %lld elements\n", diff, n);
+    }
+    strata::kernels::quantize_q8_0(d_x, d_b, n, nullptr);
+    strata::kernels::dequant_q8_0(d_b, d_back, n, nullptr);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(g_blocks.data(), d_b, g_blocks.size())
+                               .wait()),
+          "back blocks");
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(g_back.data(), d_back, (size_t)n * sizeof(float))
+                  .wait()),
+          "back vals");
+
+    long long byte_bad = 0, val_bad = 0;
+    if (check_bytes) {
+        for (size_t i = 0; i < g_blocks.size(); ++i) if (g_blocks[i] != r_blocks[i]) ++byte_bad;
+    }
+    for (long long i = 0; i < n; ++i) {
+        const float a = r_back[(size_t) i], b = g_back[(size_t) i];
+        // the round trip is `q * d16`: both sides use the SAME fp16 d, so this is exact when q agrees
+        if (std::memcmp(&a, &b, sizeof(float)) != 0) ++val_bad;
+    }
+    if (byte_bad && check_bytes) {
+        for (size_t i = 0; i < g_blocks.size(); ++i) {
+            if (g_blocks[i] != r_blocks[i]) {
+                const size_t blk = i / 34;
+                const float amax = [&] { float m = 0; for (int k = 0; k < 32; ++k) m = std::fmax(m, std::fabs(x[(size_t)(blk*32+k)])); return m; }();
+                std::printf("    first bad byte: block %zu offset %zu  amax %.9g  d32 %.9g\n", blk, i % 34, amax, amax/127.0f);
+                std::printf("      ref scale bytes %02x %02x   got %02x %02x\n", r_blocks[blk*34], r_blocks[blk*34+1], g_blocks[blk*34], g_blocks[blk*34+1]);
+                std::printf("      ref[0..9]:"); for (int k = 0; k < 10; ++k) std::printf(" %02x", r_blocks[blk*34+k]);
+                std::printf("\n      got[0..9]:"); for (int k = 0; k < 10; ++k) std::printf(" %02x", g_blocks[blk*34+k]);
+                std::printf("\n      ref[10..17]:"); for (int k = 10; k < 18; ++k) std::printf(" %02x", r_blocks[blk*34+k]);
+                std::printf("\n      got[10..17]:"); for (int k = 10; k < 18; ++k) std::printf(" %02x", g_blocks[blk*34+k]);
+                std::printf("\n      x[0..3] = %.9g %.9g %.9g %.9g\n", (double)x[(size_t)(blk*32)], (double)x[(size_t)(blk*32+1)], (double)x[(size_t)(blk*32+2)], (double)x[(size_t)(blk*32+3)]);
+                break;
+            }
+        }
+    }
+    std::printf("  %-26s blocks %s (%lld bad bytes)   round trip %s (%lld differ)\n", name,
+                !check_bytes ? "not compared" : (byte_bad ? "*** WRONG ***" : "byte-exact"), byte_bad,
+                val_bad ? "*** WRONG ***" : "bit-exact", val_bad);
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_b, dpct::get_in_order_queue());
+    sycl::free(d_back, dpct::get_in_order_queue());
+    return (int) (byte_bad + val_bad);
+}
+
+// A host transcription of ggml's `quantize_row_q8_K_ref` (ggml-quants.c L2768), including `nearest_int`.
+//
+// NOTE WHICH REFERENCE THIS IS.  `ref/quant.py::q8_K` is the numpy transcription and it multiplies in
+// FLOAT64 (`iscale * blk.astype(np.float64)`), while ggml multiplies in FLOAT32 before `nearest_int`.  The
+// oracle is ggml, so this follows ggml.  The two agree except where an f32 product lands exactly on a tie or
+// a rounding boundary, which is exactly the regime the "exact ties" case below constructs.
+int nearest_int_host(float fval) {
+    const float val = fval + 12582912.0f;
+    int i;
+    std::memcpy(&i, &val, 4);
+    return (i & 0x007fffff) - 0x00400000;
+}
+
+void reference_q8_K(const float* x, long long n, std::vector<uint8_t>& blocks, std::vector<float>& back,
+                    float scale_num) {
+    const int QK = 256;
+    blocks.assign((size_t) (n / QK) * 292, 0);
+    back.assign((size_t) n, 0.0f);
+    for (long long b = 0; b < n / QK; ++b) {
+        const float* xb = x + b * QK;
+        uint8_t* out = &blocks[(size_t) b * 292];
+        float max = 0.0f, amax = 0.0f;
+        for (int j = 0; j < QK; ++j) {
+            const float ax = std::fabs(xb[j]);
+            if (ax > amax) { amax = ax; max = xb[j]; }     // STRICTLY greater: ties keep the FIRST maximum
+        }
+        if (amax == 0.0f) continue;                        // d = 0, qs = 0, bsums = 0 (see the kernel note)
+        const float iscale = scale_num / max;              // -127 by default; -128 is the rival reading
+        int8_t* qs = (int8_t*) (out + 4);
+        for (int j = 0; j < QK; ++j) {
+            const int v = nearest_int_host(iscale * xb[j]);
+            qs[j] = (int8_t) std::min(127, v);
+        }
+        int16_t* bsums = (int16_t*) (out + 4 + QK);
+        for (int j = 0; j < QK / 16; ++j) {
+            int sum = 0;
+            for (int ii = 0; ii < 16; ++ii) sum += qs[j * 16 + ii];
+            bsums[j] = (int16_t) sum;
+        }
+        const float d = 1.0f / iscale;
+        std::memcpy(out, &d, 4);
+        for (int j = 0; j < QK; ++j) back[(size_t) (b * QK + j)] = (float) qs[j] * d;
+    }
+}
+
+int run_case_k(const char* name, const std::vector<float>& x, bool check_bytes, float scale_num = -127.0f) {
+    const long long n = (long long) x.size();
+    std::vector<uint8_t> r_blocks, g_blocks((size_t) (n / 256) * 292);
+    std::vector<float> r_back, g_back((size_t) n);
+    reference_q8_K(x.data(), n, r_blocks, r_back, scale_num);
+
+    float* d_x = nullptr;
+    uint8_t* d_b = nullptr;
+    float* d_back = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<float>(
+                               (size_t)n, dpct::get_in_order_queue())),
+          "malloc x");
+    check(DPCT_CHECK_ERROR(d_b = (uint8_t *)sycl::malloc_device(
+                               g_blocks.size(), dpct::get_in_order_queue())),
+          "malloc blocks");
+    check(DPCT_CHECK_ERROR(d_back = sycl::malloc_device<float>(
+                               (size_t)n, dpct::get_in_order_queue())),
+          "malloc back");
+    /*
+    DPCT1114:1054: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), (size_t)n * sizeof(float))),
+          "copy x");
+    strata::kernels::quantize_q8_K(d_x, d_b, n, nullptr);
+    strata::kernels::dequant_q8_K(d_b, d_back, n, nullptr);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(g_blocks.data(), d_b, g_blocks.size())
+                               .wait()),
+          "back blocks");
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(g_back.data(), d_back, (size_t)n * sizeof(float))
+                  .wait()),
+          "back vals");
+
+    long long byte_bad = 0, val_bad = 0, first_bad = -1;
+    if (check_bytes)
+        for (size_t i = 0; i < g_blocks.size(); ++i)
+            if (g_blocks[i] != r_blocks[i]) { if (first_bad < 0) first_bad = (long long) i; ++byte_bad; }
+    for (long long i = 0; i < n; ++i)
+        if (std::memcmp(&r_back[(size_t) i], &g_back[(size_t) i], 4) != 0) ++val_bad;
+    std::printf("  %-26s blocks %s (%lld bad bytes)   round trip %s (%lld differ)\n", name,
+                !check_bytes ? "not compared" : (byte_bad ? "*** WRONG ***" : "byte-exact"), byte_bad,
+                val_bad ? "*** WRONG ***" : "bit-exact", val_bad);
+    if (first_bad >= 0) {
+        // Say WHERE and WHAT, because "1 element in 524288" is the signature of a rounding boundary and not
+        // of a wrong formula - and the two need completely different responses.
+        const size_t blk = (size_t) first_bad / 292, off = (size_t) first_bad % 292;
+        const char* where = off < 4 ? "d (the f32 scale)" : (off < 260 ? "qs (the quants)" : "bsums");
+        std::printf("      first bad byte: block %zu offset %zu = %s   ref %02x  got %02x\n", blk, off,
+                    where, r_blocks[(size_t) first_bad], g_blocks[(size_t) first_bad]);
+        if (off >= 4 && off < 260) {
+            const int j = (int) off - 4;
+            const float xv = x[(size_t) (blk * 256 + j)];
+            float mx = 0.0f;
+            for (int k = 0; k < 256; ++k) { const float ax = std::fabs(x[(size_t) (blk * 256 + k)]); if (ax > std::fabs(mx)) mx = x[(size_t) (blk * 256 + k)]; }
+            const float isc = -127.0f / mx;
+            const float prod = isc * xv;
+            std::printf("      element %d: x %.9g  max %.9g  iscale %.9g  iscale*x %.9g (frac %.6f)\n",
+                        j, (double) xv, (double) mx, (double) isc, (double) prod, (double) (prod - std::floor(prod)));
+        } else if (off < 4) {
+            float rd, gd;
+            std::memcpy(&rd, &r_blocks[(size_t) (blk * 292)], 4);
+            std::memcpy(&gd, &g_blocks[(size_t) (blk * 292)], 4);
+            std::printf("      d: ref %.9g  got %.9g\n", (double) rd, (double) gd);
+        }
+    }
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_b, dpct::get_in_order_queue());
+    sycl::free(d_back, dpct::get_in_order_queue());
+    return (int) (byte_bad + val_bad);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: quantize_act_parity [--selftest]\n"); return 2; }
+    }
+    std::mt19937 rng(7);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+    int bad = 0;
+    const long long N = 32 * 4096;
+
+    // ---- ordinary activations
+    std::vector<float> a((size_t) N);
+    for (auto& v : a) v = gauss(rng);
+    bad += run_case("random normal", a, true);
+
+    // ---- an activation with a very small dynamic range, where d32 is tiny and the fp16 rounding of d is a
+    // LARGE relative change - this is where dividing by d16 instead of d32 would show up in the bytes
+    std::vector<float> b((size_t) N);
+    for (auto& v : b) v = gauss(rng) * 1e-6f;
+    bad += run_case("small magnitude (1e-6)", b, true);
+
+    // ---- an all-zero block must produce a zeroed block, not a division by zero
+    std::vector<float> c((size_t) N, 0.0f);
+    bad += run_case("all zero", c, true);
+
+    // ---- values that land exactly on .5 boundaries, where rint's half-to-even and a float division's
+    // rounding both decide the result
+    std::vector<float> d((size_t) N);
+    for (long long i = 0; i < N; ++i) {
+        // construct so that x / d32 is very close to a .5 boundary: d32 = amax/127, so pick amax = 127.0 and
+        // x = k + 0.5 for integer k
+        d[(size_t) i] = ((i % 200) - 100) + 0.5f;
+    }
+    d[0] = 127.0f;
+    bad += run_case("exact .5 boundaries", d, true);
+
+    // ---- a single extreme value in each block, so d32 is set by it and every other quant is small
+    std::vector<float> e((size_t) N, 0.0f);
+    for (long long blk = 0; blk < N / 32; ++blk) e[(size_t) (blk * 32)] = 1000.0f + (float) (blk % 7);
+    bad += run_case("one extreme per block", e, true);
+
+    std::printf("\nquantize_q8_0: %d failures over 5 distributions x %lld elements\n", bad, N);
+
+    // ============================== Q8_K ==============================
+    //
+    // The K-quants' activation: 2.89 GiB of dense weights - the attention projections and `ssm_out`.  The
+    // oracle here is GGML's C reference, and the traps are the two the source comments warn about.
+    // ============================== the fp16 conversion itself ==============================
+    //
+    // REGRESSION CHECK FOR A BUG THAT SHIPPED.  The private encoder in `quantize_act.cu` - and the identical
+    // one in `shared_expert.cu` - tested `if (exp >= 31)` to catch an out-of-range exponent, which conflates
+    // an f32 INF/NAN (raw exponent 255) with a FINITE value too large for fp16.  Every finite overflow came
+    // back as a NaN instead of saturating to inf.  **Neither file's fixture could see it, because every value
+    // in both is O(1)** - the Q8_0 case above scales by a max that is never near 65504.  Round 198's
+    // numpy-generated oracle caught it on the first run.
+    //
+    // The decoder in this same test had the matching defect in the other direction: it flushed fp16
+    // SUBNORMALS to zero, so 0x0001 decoded as 0.0 instead of 2^-24.
+    //
+    // These are the exact values, asserted against what numpy's float16 says.  They are here rather than
+    // only in `qsa_parity` because this is the file that OWNS the Q8_0/Q8_K scales, and a scale that is NaN
+    // poisons a whole block silently.
+    {
+        struct F16Case { float in; uint16_t want; const char* what; };
+        const F16Case cases[] = {
+            {1e30f, 0x7C00u, "1e30 -> +inf (finite overflow)"},
+            {-1e30f, 0xFC00u, "-1e30 -> -inf"},
+            {65536.0f, 0x7C00u, "65536 -> +inf (just past fp16 max)"},
+            // FLT_MAX is 3.4028235e38, so `1e45f` is not even a legal literal; 3e38 is the largest finite
+            // f32 that still overflows fp16, which is what this case is for.
+            {3.0e38f, 0x7C00u, "3e38 (near FLT_MAX) -> +inf"},
+            {65504.0f, 0x7BFFu, "65504 -> the largest finite fp16, NOT inf"},
+            // The boundary, checked against numpy: 65520.0 is the exact tie between 65504 and the
+            // "next" fp16 (65536 = inf) and rounds to EVEN, i.e. to inf; 65519.996 is below it and stays
+            // finite.  The first version of this table asserted inf for 65519.996 - the FIXTURE was wrong and
+            // the kernel was right, which is why the expected bits are quoted from numpy rather than reasoned.
+            {65519.996f, 0x7BFFu, "65519.996 -> just below the boundary, still finite"},
+            {65520.0f, 0x7C00u, "65520.0 -> the exact tie, rounds to even = inf"},
+            {65536.0f, 0x7C00u, "65536 -> past fp16 max"},
+            {5.9604645e-8f, 0x0001u, "2^-24 -> the smallest subnormal, NOT zero"},
+            {1.0f, 0x3C00u, "1.0"},
+            {0.0f, 0x0000u, "0.0"},
+        };
+        int fp16_bad = 0;
+        for (const F16Case& c : cases) {
+            const uint16_t got = strata::kernels::f16_from_f32(c.in);
+            if (got != c.want) {
+                std::printf("    *** %s: want 0x%04X got 0x%04X\n", c.what, c.want, got);
+                ++fp16_bad;
+            }
+        }
+        // and the reverse direction on the pattern that was flushed
+        const float sub = strata::kernels::f32_from_f16(0x0001u);
+        const bool sub_ok = (sub == 5.9604645e-8f);
+        std::printf("  %-44s %s (%d of %d wrong)\n", "f32->f16 overflow saturates, not NaN",
+                    fp16_bad ? "*** NO ***" : "yes", fp16_bad, (int) (sizeof cases / sizeof cases[0]));
+        std::printf("  %-44s %s (0x0001 -> %.9g, want 2^-24)\n", "f16->f32 keeps subnormals",
+                    sub_ok ? "yes" : "*** NO ***", (double) sub);
+        if (fp16_bad) bad += fp16_bad;
+        if (!sub_ok) ++bad;
+    }
+
+    std::printf("\nQ8_K  (ggml block_q8_K: 292 bytes / 256 elements, {f32 d; i8 qs[256]; i16 bsums[16]})\n");
+    int bad_k = 0;
+    const long long NK = 256 * 2048;
+
+    std::vector<float> ka((size_t) NK);
+    for (auto& v : ka) v = gauss(rng);
+    bad_k += run_case_k("random normal", ka, true);
+
+    std::vector<float> kb((size_t) NK);
+    for (auto& v : kb) v = gauss(rng) * 1e-7f;      // tiny: the scale is far from fp16-representable
+    bad_k += run_case_k("small magnitude (1e-7)", kb, true);
+
+    std::vector<float> kc((size_t) NK, 0.0f);
+    bad_k += run_case_k("all zero", kc, true);
+
+    // EXACT TIES.  `nearest_int` is round-half-to-EVEN (the 12582912.0f magic number); `roundf` is
+    // half-AWAY-FROM-ZERO.  They differ only when `iscale*x` is exactly k+0.5, which never happens on real
+    // data - so this fixture MANUFACTURES it: with max = 127.0 and iscale = -1.0, x = -(k+0.5) gives exactly
+    // k+0.5, and the two rules disagree for every EVEN k.
+    std::vector<float> kd((size_t) NK, 0.0f);
+    for (long long blk = 0; blk < NK / 256; ++blk)
+        for (int j = 0; j < 256; ++j) kd[(size_t) (blk * 256 + j)] = -(float) ((j % 100) + 0.5f);
+    for (long long blk = 0; blk < NK / 256; ++blk) kd[(size_t) (blk * 256)] = 127.0f;   // fixes max = 127
+    bad_k += run_case_k("exact .5 ties (half-to-even)", kd, true);
+    {
+        // assert the tie fixture can SEE the difference before trusting the comparison above
+        std::vector<uint8_t> rb;
+        std::vector<float> rback;
+        reference_q8_K(kd.data(), NK, rb, rback, -127.0f);
+        long long ties = 0, differ = 0;
+        for (long long i = 0; i < NK; ++i) {
+            const float t = -kd[(size_t) i];
+            if (t - std::floor(t) == 0.5f) {
+                ++ties;
+                const int even = nearest_int_host(t);
+                const int away = (int) std::round(t);
+                if (even != away) ++differ;
+            }
+        }
+        std::printf("  %-26s %lld ties, %lld where half-to-even != half-away (%.1f%%)\n",
+                    "  tie fixture discriminates", ties, differ, ties ? 100.0 * (double) differ / ties : 0.0);
+        if (differ < ties / 3) { std::printf("    *** the tie fixture cannot see the rounding rule ***\n"); ++bad_k; }
+    }
+
+    // THE -127 TRAP.  ggml uses `-127/max`; the `-128` version sits COMMENTED OUT in the source, and using it
+    // is a 0.79% scaling error that leaves a working-looking activation.  Computed with the rival constant
+    // and required to differ.
+    {
+        std::vector<uint8_t> r127, r128;
+        std::vector<float> b127, b128;
+        reference_q8_K(ka.data(), NK, r127, b127, -127.0f);
+        reference_q8_K(ka.data(), NK, r128, b128, -128.0f);
+        double d = 0, m = 0;
+        long long qdiffer = 0;
+        for (long long i = 0; i < NK; ++i) { d += std::fabs(b127[(size_t) i] - b128[(size_t) i]); m += std::fabs(b127[(size_t) i]); }
+        for (size_t i = 4; i < r127.size(); ++i) if (r127[i] != r128[i]) ++qdiffer;
+        // The expected size of the effect is exactly (1 - 127/128) = 0.78% of the magnitude, so the floor is
+        // 0.5% - below what the rival constant must produce and far above any noise.  The byte count is the
+        // blunter evidence and is reported alongside it: 172,017 bytes differ, i.e. a third of the quants.
+        std::printf("  %-26s %-4s (%.3f%% of magnitude, %lld bytes differ)\n", "-127 vs -128 scale observable",
+                    d / m > 0.005 ? "yes" : "*** NO ***", 100.0 * d / m, qdiffer);
+        if (!(d / m > 0.005)) ++bad_k;
+    }
+
+    std::printf("\nquantize_act: %d failures over 5 Q8_0 + 4 Q8_K distributions\n", bad + bad_k);
+    if (bad + bad_k) return 1;
+    if (selftest) std::printf("quantize_act_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/rope_parity.cpp b/sycl/src/kernels/rope_parity.cpp
new file mode 100644
index 00000000000..c0aea5dd517
--- /dev/null
+++ b/sycl/src/kernels/rope_parity.cpp
@@ -0,0 +1,229 @@
+// src/kernels/rope_parity.cpp - P2.S2's parity test for NEOX partial RoPE.
+//
+// TWO CHECKS, deliberately separated so each can be tight:
+//
+//   1. THE TABLE against the float64 reference - `theta ** (-2i/n_rot)`, `pos * inv`, `cos`/`sin`, all in
+//      double exactly as `ref/qsa.py::rope_freqs` does.  Compared as float32 after the cast, so a mismatch
+//      here is a real arithmetic difference and not a formatting one.
+//   2. THE ROTATION against a host rotation written from `ref/qsa.py::rope_neox`, using the SAME table the
+//      kernel is given.  Both sides then perform identical float32 operations, so this is BIT-EXACT - and a
+//      bit-exact rotation plus a table that matches the reference means the composition matches too.
+//
+// A single end-to-end comparison would have had to carry one loose tolerance for both, and the interesting
+// failure - the NEOX pairing being wrong - is a PERMUTATION that a loose tolerance over all 256 dims would
+// happily accept.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/rope.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: rope_parity [--selftest]\n"); return 2; }
+    }
+
+    const int n_rot = 64;          // the artifact's rope.dimension_count
+    const double theta = 1.0e7;    // rope.freq_base
+    const int head_dim = 256;
+    const int rows = 24 * 8;       // 24 heads over 8 positions, so several positions exercise the table
+    const int max_pos = 32;
+    const int half = n_rot / 2;
+    int bad = 0;
+
+    // ---- 1. the table against the float64 reference
+    std::vector<float> hcos((size_t) max_pos * half), hsin((size_t) max_pos * half);
+    strata::kernels::build_rope_table(n_rot, theta, max_pos, hcos.data(), hsin.data());
+    long long table_bad = 0;
+    double table_worst = 0.0;
+    for (int p = 0; p < max_pos; ++p) {
+        for (int i = 0; i < half; ++i) {
+            const double inv = std::pow(theta, -2.0 * (double) i / (double) n_rot);
+            const double ang = (double) p * inv;
+            const float rc = (float) std::cos(ang), rs = (float) std::sin(ang);
+            if (std::memcmp(&rc, &hcos[(size_t) p * half + i], 4) != 0) ++table_bad;
+            if (std::memcmp(&rs, &hsin[(size_t) p * half + i], 4) != 0) ++table_bad;
+            table_worst = std::max(table_worst,
+                                   std::fabs((double) rc - (double) hcos[(size_t) p * half + i]));
+        }
+    }
+    std::printf("  rope table vs float64 reference   %s (%lld of %d entries differ, worst %.1e)\n",
+                table_bad ? "*** WRONG ***" : "bit-exact", table_bad, max_pos * half * 2, table_worst);
+    bad += (int) table_bad;
+
+    // ---- 2. the rotation, against the same spec in float32 with the SAME table
+    std::mt19937 rng(11);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+    std::vector<float> x((size_t) rows * head_dim);
+    for (auto& v : x) v = gauss(rng);
+    std::vector<int> pos((size_t) rows);
+    for (int r = 0; r < rows; ++r) pos[(size_t) r] = r % max_pos;
+
+    std::vector<float> ref(x.size());
+    for (int r = 0; r < rows; ++r) {
+        const float* xr = &x[(size_t) r * head_dim];
+        float* orow = &ref[(size_t) r * head_dim];
+        for (int d = 0; d < head_dim; ++d) orow[d] = xr[d];          // the tail passes through
+        for (int i = 0; i < half; ++i) {
+            const float c = hcos[(size_t) pos[(size_t) r] * half + i];
+            const float s = hsin[(size_t) pos[(size_t) r] * half + i];
+            const float a = xr[i], b = xr[half + i];
+            orow[i] = a * c - b * s;
+            orow[half + i] = a * s + b * c;
+        }
+    }
+
+    float *d_x = nullptr, *d_out = nullptr, *d_cos = nullptr, *d_sin = nullptr;
+    int* d_pos = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<float>(
+                               x.size(), dpct::get_in_order_queue())),
+          "malloc x");
+    check(DPCT_CHECK_ERROR(d_out = sycl::malloc_device<float>(
+                               ref.size(), dpct::get_in_order_queue())),
+          "malloc out");
+    check(DPCT_CHECK_ERROR(d_cos = sycl::malloc_device<float>(
+                               hcos.size(), dpct::get_in_order_queue())),
+          "malloc cos");
+    check(DPCT_CHECK_ERROR(d_sin = sycl::malloc_device<float>(
+                               hsin.size(), dpct::get_in_order_queue())),
+          "malloc sin");
+    check(DPCT_CHECK_ERROR(d_pos = sycl::malloc_device<int>(
+                               pos.size(), dpct::get_in_order_queue())),
+          "malloc pos");
+    /*
+    DPCT1114:309: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), x.size() * sizeof(float))),
+          "copy x");
+    /*
+    DPCT1114:310: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_cos, hcos.data(), hcos.size() * sizeof(float))),
+          "copy cos");
+    /*
+    DPCT1114:311: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_sin, hsin.data(), hsin.size() * sizeof(float))),
+          "copy sin");
+    /*
+    DPCT1114:312: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_pos, pos.data(), pos.size() * sizeof(int))),
+          "copy pos");
+    strata::kernels::rope_neox_apply(d_x, d_out, rows, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
+    std::vector<float> got(ref.size());
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(got.data(), d_out, got.size() * sizeof(float))
+                  .wait()),
+          "back");
+
+    // A RELATIVE TOLERANCE, NOT BIT EQUALITY.  *c - b*s is one of the expressions the compiler is free to
+    // contract into an FMA, and the host and device compilers choose differently - so a handful of values
+    // differ in the last bit.  Round 167 established this the hard way: a bit-equality expectation that a
+    // kernel cannot meet is a test that reports a correct kernel as broken.  The residual is reported, and if
+    // it were structural (a wrong pairing, a wrong table entry) it would be O(1), not O(1 ULP).
+    long long rot_bad = 0;
+    double worst = 0.0;
+    long long first_bad = -1;
+    // The denominator is the ROW'S INPUT MAGNITUDE, not the element's own value.  *c - b*s cancels, so an
+    // element whose result is near zero reports a large relative error for a 1-ULP absolute one - which is the
+    // same metric mistake round 169 found on Q4_K's dot products, where the fix was to measure against
+    // sum|term| instead of the result.  Here the natural scale of the computation is the largest input in the
+    // row, because every output element is a combination of two inputs with |cos|,|sin| <= 1.
+    std::vector<double> row_scale((size_t) rows, 0.0);
+    for (int r = 0; r < rows; ++r) {
+        double m = 0;
+        for (int d = 0; d < head_dim; ++d) m = std::max(m, (double) std::fabs(x[(size_t) r * head_dim + d]));
+        row_scale[(size_t) r] = m > 1e-30 ? m : 1e-30;
+    }
+    for (size_t i = 0; i < ref.size(); ++i) {
+        const double a = ref[i], b = got[i];
+        const double rel = std::fabs(a - b) / row_scale[i / (size_t) head_dim];
+        if (!(rel <= worst)) worst = rel;
+        if (!(rel <= 1e-6)) { if (first_bad < 0) first_bad = (long long) i; ++rot_bad; }
+    }
+    std::printf("  rope rotation vs host reference   %s (%lld of %zu over 1e-6, worst rel %.3e)\n",
+                rot_bad ? "*** WRONG ***" : "agrees", rot_bad, ref.size(), worst);
+    if (first_bad >= 0) std::printf("    first over-tolerance at element %lld\n", first_bad);
+    bad += (int) rot_bad;
+
+    // ---- 3. THE PAIRING, asserted structurally rather than as a tolerance.  NEOX pairs (i, i+half); the
+    // adjacent-pair convention would pair (2i, 2i+1).  Feed an input that is 1 at dim 0 and 0 elsewhere, and
+    // check WHICH dims move: under NEOX only dims 0 and half may change, under the adjacent convention only
+    // dims 0 and 1 may.  A tolerance over all 256 dims cannot tell the two apart.
+    {
+        std::vector<float> e((size_t) head_dim, 0.0f);
+        e[0] = 1.0f;
+        std::vector<float> o((size_t) head_dim, 0.0f);
+        /*
+        DPCT1114:313: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_x, e.data(), e.size() * sizeof(float))),
+              "copy e");
+        // position 7, NOT position 0: at pos 0 sin is exactly 0, so dim half legitimately does not move and
+        // the check would report the correct kernel as wrong.  The first version made exactly that mistake.
+        int p7 = 7;
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(d_pos, &p7, sizeof(int))
+                                   .wait()),
+              "copy p7");
+        strata::kernels::rope_neox_apply(d_x, d_out, 1, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(o.data(), d_out, o.size() * sizeof(float))
+                      .wait()),
+              "back e");
+        int moved[4] = {0, 0, 0, 0};       // dims 0, 1, half, half+1
+        const float* chk[4] = {&e[0], &e[1], &e[half], &e[half + 1]};
+        (void) chk;
+        moved[0] = (o[0] != 0.0f || o[half] != 0.0f) ? 1 : 0;
+        const bool adjacent_moved = (o[1] != 0.0f);
+        const bool neox_moved = (o[half] != 0.0f);
+        std::printf("  pairing: dim 0 set -> NEOX moves dim %d (o[half]=%.6f), adjacent would move dim 1 "
+                    "(o[1]=%.6f)   %s\n", half, (double) o[half], (double) o[1],
+                    (neox_moved && !adjacent_moved) ? "NEOX confirmed" : "*** WRONG CONVENTION ***");
+        if (!(neox_moved && !adjacent_moved)) ++bad;
+    }
+
+    std::printf("\nrope: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("rope_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/router_top10_parity.cpp b/sycl/src/kernels/router_top10_parity.cpp
new file mode 100644
index 00000000000..6fb0113c9b1
--- /dev/null
+++ b/sycl/src/kernels/router_top10_parity.cpp
@@ -0,0 +1,186 @@
+// src/kernels/router_top10_parity.cpp - P2.S2's parity test for the MoE router.
+//
+// The reference here is a HOST implementation of `ref/moe.py::router` written from the same specification the
+// kernel was written from - so this checks the kernel against the spec independently of the kernel, which is
+// the strongest thing available without running llama.cpp.  It is NOT a check against llama.cpp itself, and
+// that gap is stated rather than implied.
+//
+// WHAT THE TEST CAN AND CANNOT SEE.  It compares expert IDs exactly and weights to a tolerance, on several
+// logit distributions including ties (where the "smallest index wins" rule is the only thing that decides) and
+// near-ties (where a float difference decides).  It also asserts that the 2**-14 CLAMP CANNOT TRIGGER for this
+// model's geometry - see below - so the absence of a clamp test is a proven fact rather than an omission.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/router_top10.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <numeric>
+#include <random>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+constexpr double RENORM_CLAMP = 6.103515625e-05;      // 2**-14
+
+// The host reference: softmax over all experts, stable descending argsort, gather, clamp, renormalise.
+void reference(const float* logits, int n_expert, int k, int* ids, float* w) {
+    double mx = logits[0];
+    for (int e = 1; e < n_expert; ++e) mx = std::max(mx, (double) logits[e]);
+    double sum = 0;
+    std::vector<double> p((size_t) n_expert);
+    for (int e = 0; e < n_expert; ++e) {
+        p[(size_t) e] = std::exp((double) logits[e] - mx);
+        sum += p[(size_t) e];
+    }
+    for (int e = 0; e < n_expert; ++e) p[(size_t) e] /= sum;
+
+    // stable descending: std::stable_sort with a strict greater-than keeps equal elements in index order
+    std::vector<int> idx((size_t) n_expert);
+    std::iota(idx.begin(), idx.end(), 0);
+    std::stable_sort(idx.begin(), idx.end(),
+                     [&](int a, int b) { return p[(size_t) a] > p[(size_t) b]; });
+    double s = 0;
+    for (int i = 0; i < k; ++i) {
+        ids[i] = idx[(size_t) i];
+        w[i] = (float) p[(size_t) idx[(size_t) i]];
+        s += p[(size_t) idx[(size_t) i]];
+    }
+    s = std::max(s, RENORM_CLAMP);
+    for (int i = 0; i < k; ++i) w[i] = (float) ((double) w[i] / s);
+}
+
+int run_case(const char* name, const std::vector<float>& logits, int n_tokens, int n_expert, int k,
+             double tol) {
+    std::vector<int> h_ids((size_t) n_tokens * k);
+    std::vector<float> h_w((size_t) n_tokens * k);
+    std::vector<int> r_ids((size_t) n_tokens * k);
+    std::vector<float> r_w((size_t) n_tokens * k);
+    for (int t = 0; t < n_tokens; ++t) {
+        reference(&logits[(size_t) t * n_expert], n_expert, k, &r_ids[(size_t) t * k], &r_w[(size_t) t * k]);
+    }
+
+    float* d_l = nullptr;
+    int* d_ids = nullptr;
+    float* d_w = nullptr;
+    check(DPCT_CHECK_ERROR(d_l = sycl::malloc_device<float>(
+                               logits.size(), dpct::get_in_order_queue())),
+          "malloc logits");
+    check(DPCT_CHECK_ERROR(d_ids = sycl::malloc_device<int>(
+                               h_ids.size(), dpct::get_in_order_queue())),
+          "malloc ids");
+    check(DPCT_CHECK_ERROR(d_w = sycl::malloc_device<float>(
+                               h_w.size(), dpct::get_in_order_queue())),
+          "malloc w");
+    /*
+    DPCT1114:853: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_l, logits.data(), logits.size() * sizeof(float))),
+          "copy");
+    strata::kernels::router_top10(d_l, n_tokens, n_expert, k, d_ids, d_w, nullptr);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(h_ids.data(), d_ids, h_ids.size() * sizeof(int))
+                  .wait()),
+          "back ids");
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(h_w.data(), d_w, h_w.size() * sizeof(float))
+                  .wait()),
+          "back w");
+
+    long long id_bad = 0, w_bad = 0;
+    double worst = 0;
+    for (size_t i = 0; i < h_ids.size(); ++i) {
+        if (h_ids[i] != r_ids[i]) ++id_bad;
+        const double rel = std::fabs((double) h_w[i] - (double) r_w[i]) /
+                           (std::fabs((double) r_w[i]) > 1e-30 ? std::fabs((double) r_w[i]) : 1e-30);
+        worst = std::max(worst, rel);
+        if (!(rel <= tol)) ++w_bad;
+    }
+    // every token's weights must sum to 1 unless the clamp replaced the sum
+    double worst_sum = 0;
+    for (int t = 0; t < n_tokens; ++t) {
+        double s = 0;
+        for (int i = 0; i < k; ++i) s += (double) h_w[(size_t) t * k + i];
+        double raw = 0;
+        for (int i = 0; i < k; ++i) raw += (double) r_w[(size_t) t * k + i];
+        // both sides divide by the same clamped scale, so the ratios agree; check the kernel's own sum
+        worst_sum = std::max(worst_sum, std::fabs(s - 1.0));
+    }
+    std::printf("  %-26s ids %s (%lld bad)   weights worst rel %.3e (%lld over tol)   |sum-1| %.1e\n", name,
+                id_bad ? "*** WRONG ***" : "exact", id_bad, worst, w_bad, worst_sum);
+    sycl::free(d_l, dpct::get_in_order_queue());
+    sycl::free(d_ids, dpct::get_in_order_queue());
+    sycl::free(d_w, dpct::get_in_order_queue());
+    return (int) (id_bad + w_bad);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: router_top10_parity [--selftest]\n"); return 2; }
+    }
+
+    const int NE = 512;          // the real n_expert
+    const int K = 10;            // the real top-k
+    const int NT = 64;
+    std::mt19937 rng(2024);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+    int bad = 0;
+
+    // ---- random logits
+    std::vector<float> a((size_t) NT * NE);
+    for (auto& v : a) v = gauss(rng);
+    bad += run_case("random normal", a, NT, NE, K, 1e-5);
+
+    // ---- ALL-EQUAL logits: every expert ties, so the "smallest index wins" rule is the ONLY thing deciding
+    // the ids.  An unstable sort or a >= comparison in the maximum scan fails this and passes everything else.
+    std::vector<float> b((size_t) NT * NE, 0.5f);
+    bad += run_case("all equal (ties)", b, NT, NE, K, 1e-5);
+
+    // ---- a few exact ties among otherwise distinct values
+    std::vector<float> c((size_t) NT * NE);
+    for (int t = 0; t < NT; ++t) {
+        for (int e = 0; e < NE; ++e) c[(size_t) t * NE + e] = (e < 12) ? 2.0f : gauss(rng);
+    }
+    bad += run_case("12-way exact tie", c, NT, NE, K, 1e-5);
+
+    // ---- one dominant expert: the top-1 must be that expert and its weight must dominate
+    std::vector<float> d((size_t) NT * NE, 0.0f);
+    for (int t = 0; t < NT; ++t) d[(size_t) t * NE + (t % NE)] = 20.0f;
+    bad += run_case("dominant expert", d, NT, NE, K, 1e-5);
+
+    // ---- THE CLAMP CANNOT TRIGGER, and that is provable rather than untested.
+    // The sum of the top k of a probability vector over n outcomes is at least k/n (the minimum is the uniform
+    // distribution).  Here k/n = 10/512 = 0.01953125, which is 320x the 2**-14 = 6.1035e-05 clamp, so no input
+    // whatsoever can make this model's renormalisation clamp - not an extreme one, not an adversarial one.
+    // Asserting the bound is worth more than a test that cannot reach it.
+    const double min_possible = (double) K / (double) NE;
+    std::printf("  %-26s top-%d sum >= k/n = %.5f, clamp is %.3e -> margin %.0fx  %s\n", "clamp reachability",
+                K, min_possible, RENORM_CLAMP, min_possible / RENORM_CLAMP,
+                min_possible > RENORM_CLAMP ? "(CLAMP IS UNREACHABLE, asserted)" : "*** REACHABLE ***");
+    if (min_possible <= RENORM_CLAMP) {
+        std::fprintf(stderr, "the clamp CAN trigger, so it needs a test\n");
+        ++bad;
+    }
+
+    std::printf("\nrouter_top10: %d failures over 4 distributions x %d tokens x %d experts, top-%d\n", bad, NT, NE,
+                K);
+    if (bad) return 1;
+    if (selftest) std::printf("router_top10_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/s2_gemv_parity.cpp b/sycl/src/kernels/s2_gemv_parity.cpp
new file mode 100644
index 00000000000..3c2b16377ba
--- /dev/null
+++ b/sycl/src/kernels/s2_gemv_parity.cpp
@@ -0,0 +1,205 @@
+// src/kernels/s2_gemv_parity.cpp - P2.S2's parity test for the S2 GEMV.
+//
+// The reference is the same CHAIN as the decode test: `strata::dequantize_q2_0` is a scalar transcription that
+// `bench/micro/dequant_xcheck` checks against **ggml's own** dequantizer, so comparing the GPU GEMV against a
+// dot product built on that scalar decode compares against ggml through one proven hop.
+//
+// WHY A TOLERANCE AND NOT BIT EQUALITY.  The decode test is bit-exact because S2's decode is exact
+// integer-to-float arithmetic.  A dot product is not: the compiler is free to contract `a*b + acc` into an
+// FMA, which changes the result in the last bits, and nvcc does.  So this asserts a RELATIVE error, measures
+// what it actually is, and prints the number - the phase spec allows 1e-3 for FP16 paths, and if the measured
+// error were near that the tolerance would be hiding something rather than bounding rounding.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/dequant.hpp"
+#include "strata/kernels/s2_gemv.hpp"
+
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+constexpr int QK = 64;
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// FP16 patterns, and they are deliberately NOT all powers of two.
+//
+// The first version of this table was {1.0, 0.5, 0.25, ...} - every value a power of two.  The test then
+// reported a worst relative error of EXACTLY zero, which is not a property of the kernel: (code-1) is in
+// {-1,0,1,2} and a power-of-two times an fp16 is exact, so every product was exact and no rounding could
+// occur in either implementation.  A test whose arithmetic cannot round cannot exercise its own tolerance, and
+// it would have hidden an accumulation-order or contraction bug for ever.
+//
+// The added patterns have full 11-bit mantissas, so products round and the two implementations'
+// rounding/contraction behaviour actually matters.
+const uint16_t kScales[] = {
+    0x3C00, 0x3800, 0x3400, 0x3000, 0x2C00, 0x2800, 0x2000,          // 1, 0.5, 0.25, ... powers of two
+    0xBC00, 0xB800, 0xB400, 0xB000, 0xAC00, 0x1800, 0x1400,
+    0x3E00, 0x3555, 0x3C01, 0x4248, 0x4123, 0x2AAA, 0x4A2B,          // 1.75, 0.333.., 1.0009765625, ...
+    0xBE00, 0xB555, 0xC248, 0x2AAB, 0x4A2C, 0x2AAB};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    long long n_in = 2560;          // the real n_embd, so the row length is the engine's
+    long long n_out = 640;          // the real expert intermediate width
+    double tol = 1e-5;
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::strcmp(argv[i], "--selftest") == 0) selftest = true;
+        else if (std::strcmp(argv[i], "--n-in") == 0 && i + 1 < argc) n_in = std::atoll(argv[++i]);
+        else if (std::strcmp(argv[i], "--n-out") == 0 && i + 1 < argc) n_out = std::atoll(argv[++i]);
+        else if (std::strcmp(argv[i], "--tol") == 0 && i + 1 < argc) tol = std::atof(argv[++i]);
+        else {
+            std::fprintf(stderr, "usage: s2_gemv_parity [--selftest] [--n-in N] [--n-out N] [--tol T]\n");
+            return 2;
+        }
+    }
+    if (n_in % QK != 0) { std::fprintf(stderr, "--n-in must be a multiple of %d\n", QK); return 2; }
+    const long long nb = n_in / QK;
+
+    std::mt19937 rng(999);
+    const int n_scales = (int) (sizeof(kScales) / sizeof(kScales[0]));
+
+    // FP16 activations.  Patterns are drawn from the same finite/exact table as the decode test, because a
+    // random 16-bit pattern can be NaN and a NaN makes the comparison fail for the wrong reason.
+    std::vector<uint16_t> x((size_t) n_in);
+    for (long long i = 0; i < n_in; ++i) x[(size_t) i] = kScales[rng() % n_scales];
+
+    // S2 weight planes for an [n_in, n_out] matrix: row o occupies a contiguous run of nb blocks.
+    std::vector<uint8_t> codes((size_t) n_out * nb * 16);
+    std::vector<float> scales((size_t) n_out * nb);
+    for (size_t i = 0; i < codes.size(); ++i) codes[i] = (uint8_t) (rng() & 0xFF);
+    for (size_t i = 0; i < scales.size(); ++i) {
+        scales[i] = strata::fp16_to_fp32(kScales[rng() % n_scales]);
+    }
+
+    // CPU reference: rebuild each row's RAW Q2_0 blocks from the planes, decode with the scalar path that
+    // dequant_xcheck proved equal to ggml, and accumulate in the same order the kernel does.
+    std::vector<float> ref((size_t) n_out, 0.0f);
+    std::vector<uint8_t> raw(18);
+    std::vector<float> dec(QK);
+    for (long long o = 0; o < n_out; ++o) {
+        float acc = 0.0f;
+        for (long long b = 0; b < nb; ++b) {
+            const float d = scales[(size_t) (o * nb + b)];
+            // write `d` back as the fp16 pattern the plane came from: the plane stores a WIDENED fp16, so
+            // re-narrowing is exact and the scalar decoder sees the same value the kernel does
+            const uint16_t d_bits = (uint16_t) [&] {
+                for (uint16_t c : kScales) {
+                    if (strata::fp16_to_fp32(c) == d) return c;
+                }
+                return (uint16_t) 0x3C00;
+            }();
+            raw[0] = (uint8_t) (d_bits & 0xFF);
+            raw[1] = (uint8_t) (d_bits >> 8);
+            std::memcpy(&raw[2], &codes[(size_t) ((o * nb + b) * 16)], 16);
+            strata::dequantize_q2_0(raw.data(), dec.data());
+            for (int j = 0; j < QK; ++j) {
+                acc += dec[(size_t) j] * strata::fp16_to_fp32(x[(size_t) (b * QK + j)]);
+            }
+        }
+        ref[(size_t) o] = acc;
+    }
+
+    uint16_t* d_x = nullptr;
+    uint8_t* d_codes = nullptr;
+    float *d_scales = nullptr, *d_y = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<uint16_t>(
+                               x.size(), dpct::get_in_order_queue())),
+          "cudaMalloc x");
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "cudaMalloc codes");
+    check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                               scales.size(), dpct::get_in_order_queue())),
+          "cudaMalloc scales");
+    check(DPCT_CHECK_ERROR(d_y = sycl::malloc_device<float>(
+                               (size_t)n_out, dpct::get_in_order_queue())),
+          "cudaMalloc y");
+    /*
+    DPCT1114:482: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), x.size() * sizeof(uint16_t))),
+          "copy x");
+    /*
+    DPCT1114:483: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size())),
+          "copy codes");
+    /*
+    DPCT1114:484: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * sizeof(float))),
+          "copy scales");
+
+    strata::kernels::s2_gemv(d_x, d_codes, d_scales, d_y, n_in, n_out);
+
+    std::vector<float> got((size_t) n_out);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(got.data(), d_y, got.size() * sizeof(float))
+                  .wait()),
+          "copy back");
+
+    long long bad = 0, first_bad = -1;
+    double worst = 0.0;
+    for (long long o = 0; o < n_out; ++o) {
+        const double a = ref[(size_t) o], b = got[(size_t) o];
+        const double denom = std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30;
+        const double rel = std::fabs(a - b) / denom;
+        if (!(rel <= worst)) worst = rel;
+        if (!(rel <= tol)) {
+            if (first_bad < 0) first_bad = o;
+            ++bad;
+        }
+    }
+
+    // NON-VACUITY: a zero matrix and a zero activation vector agree at zero.  The reference must actually vary
+    // and its magnitudes must be non-trivial, or the comparison cannot distinguish anything.
+    double lo = ref[0], hi = ref[0];
+    for (float v : ref) {
+        lo = std::fmin(lo, v);
+        hi = std::fmax(hi, v);
+    }
+    const double spread = hi - lo;
+    std::printf("s2_gemv: n_in %lld, n_out %lld, %lld rows over tolerance, worst rel %.3e (tol %.1e)\n", n_in,
+                n_out, bad, worst, tol);
+    std::printf("  reference spread [%.4g, %.4g]\n", lo, hi);
+    if (spread <= 0.0) {
+        std::fprintf(stderr, "VACUOUS: the reference is constant, so agreement proves nothing\n");
+        return 1;
+    }
+    if (bad) {
+        std::printf("  first bad row %lld: ref %.9g got %.9g\n", first_bad, (double) ref[(size_t) first_bad],
+                    (double) got[(size_t) first_bad]);
+        return 1;
+    }
+    std::printf("  agrees with the scalar decode that dequant_xcheck proved equal to ggml\n");
+    if (selftest) std::printf("s2_gemv_parity OK\n");
+
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_codes, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+    return 0;
+}
diff --git a/sycl/src/kernels/s2_gemv_q8_parity.cpp b/sycl/src/kernels/s2_gemv_q8_parity.cpp
new file mode 100644
index 00000000000..66fc2834ad8
--- /dev/null
+++ b/sycl/src/kernels/s2_gemv_q8_parity.cpp
@@ -0,0 +1,236 @@
+// src/kernels/s2_gemv_q8_parity.cpp - the Q8_0-activation GEMV, and the size of the gap it closes.
+//
+// THREE CHECKS:
+//   1. The quantized-activation GEMV matches a host reference that quantizes the activation exactly as
+//      `ref/quant.py::q8_0` does and then dots it against the same weights.
+//   2. **The gap is REAL and MEASURABLE in this project's own kernels**: the same weights driven by an FP16
+//      activation and by a Q8_0 activation must DIFFER, by roughly the activation contract's ~1%.  Without this
+//      the first check would pass on a kernel that quietly used fp16 anyway, and the round-186 gap would look
+//      fixed without being fixed.
+//   3. The measured size of that difference is reported, so the number in the state file is one this test
+//      produces rather than one quoted from elsewhere.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s_gemv.hpp"
+#include "strata/kernels/s2_gemv_q8.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: s2_gemv_q8_parity [--selftest]\n"); return 2; }
+    }
+
+    const long long n_in = 2560, n_out = 64;
+    const int tpr = 32;
+    std::mt19937 rng(31);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+
+    std::vector<float> x((size_t) n_in);
+    for (auto& v : x) v = gauss(rng);
+    std::vector<uint8_t> codes((size_t) n_out * n_in / 4);
+    for (auto& v : codes) v = (uint8_t) (rng() & 0xFF);
+    std::vector<float> scales((size_t) n_out * (n_in / 64));
+    for (auto& v : scales) v = 0.001f + 0.0001f * (float) (rng() % 100);
+
+    // ---- device buffers
+    float* d_x = nullptr;
+    uint8_t* d_act = nullptr;
+    uint8_t* d_codes = nullptr;
+    float *d_scales = nullptr, *d_y_fp16 = nullptr, *d_y_q8 = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<float>(
+                               (size_t)n_in, dpct::get_in_order_queue())),
+          "m x");
+    check(DPCT_CHECK_ERROR(
+              d_act = (uint8_t *)sycl::malloc_device(
+                  (size_t)(n_in / 32) * 34, dpct::get_in_order_queue())),
+          "m act");
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "m codes");
+    check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                               scales.size(), dpct::get_in_order_queue())),
+          "m scales");
+    check(DPCT_CHECK_ERROR(d_y_fp16 = sycl::malloc_device<float>(
+                               (size_t)n_out, dpct::get_in_order_queue())),
+          "m y1");
+    check(DPCT_CHECK_ERROR(d_y_q8 = sycl::malloc_device<float>(
+                               (size_t)n_out, dpct::get_in_order_queue())),
+          "m y2");
+    /*
+    DPCT1114:931: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), x.size() * sizeof(float))),
+          "c x");
+    /*
+    DPCT1114:932: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size())),
+          "c codes");
+    /*
+    DPCT1114:933: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * sizeof(float))),
+          "c scales");
+
+    strata::kernels::quantize_q8_0(d_x, d_act, n_in, nullptr);
+
+    // ---- host reference: quantize the activation with the project's own rule, then dot
+    std::vector<uint8_t> h_act((size_t) (n_in / 32) * 34);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(h_act.data(), d_act, h_act.size())
+                               .wait()),
+          "c act back");
+    auto act_val = [&](long long i) {
+        const uint8_t* blk = &h_act[(size_t) (i / 32) * 34];
+        const uint16_t dbits = (uint16_t) (blk[0] | (blk[1] << 8));
+        // fp16 -> f32 without a CUDA header: 0x3C00 = 1.0, and the block scales here are normal
+        float d;
+        const uint32_t sign = (uint32_t) (dbits & 0x8000) << 16;
+        uint32_t ex = (dbits >> 10) & 0x1F, man = dbits & 0x3FF;
+        uint32_t out;
+        if (ex == 0) { out = sign; }
+        else { out = sign | ((ex - 15 + 127) << 23) | (man << 13); }
+        std::memcpy(&d, &out, 4);
+        return (float) ((int8_t) blk[2 + (i % 32)]) * d;
+    };
+    std::vector<float> ref((size_t) n_out, 0.0f);
+    for (long long o = 0; o < n_out; ++o) {
+        float acc = 0.0f;
+        for (long long g = 0; g < n_in / 64; ++g) {
+            const float d = scales[(size_t) (o * (n_in / 64) + g)];
+            for (int j = 0; j < 64; ++j) {
+                const long long i = g * 64 + j;
+                const uint8_t byte = codes[(size_t) (o * (n_in / 4) + i / 4)];
+                const int code = (byte >> ((i % 4) * 2)) & 3;
+                acc += (float) (code - 1) * d * act_val(i);
+            }
+        }
+        ref[(size_t) o] = acc;
+    }
+    strata::kernels::s2_gemv_q8(d_act, d_codes, d_scales, d_y_q8, n_in, n_out, tpr, nullptr);
+    std::vector<float> got((size_t) n_out);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(got.data(), d_y_q8, got.size() * sizeof(float))
+                  .wait()),
+          "c y2");
+
+    int bad = 0;
+    double worst = 0.0, sum_abs = 0.0;
+    for (long long o = 0; o < n_out; ++o) {
+        const double a = ref[(size_t) o], b = got[(size_t) o];
+        sum_abs += std::fabs(a);
+        // relative to the row magnitude is not needed here - these rows are not cancelling - but the metric is
+        // stated because round 169 and round 189 both showed the wrong denominator reads as a wrong kernel
+        const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+        if (!(rel <= worst)) worst = rel;
+        // 1e-4, not 1e-5: the measured worst is 1.479e-05, which is FMA contraction over 2560 terms rather
+        // than a structural error, and a threshold that passes 62 of 64 by luck is not a threshold.  The phase
+        // allows 1e-3 for FP16 paths, so this is ten times tighter than the spec and ten times looser than the
+        // measurement.
+        if (!(rel <= 1e-4)) ++bad;
+    }
+    std::printf("  %-38s %s (%d of %lld over 1e-4, worst rel %.3e, mean |ref| %.3f)\n",
+                "q8-activation GEMV vs host reference", bad ? "*** WRONG ***" : "matches", bad, n_out, worst,
+                sum_abs / (double) n_out);
+
+    // ---- CHECK 2: the gap is real.  The SAME weights driven by an fp16 activation must differ.
+    // The fp16 path wants fp16 activations, and `x` is f32, so it is converted exactly (the values are normal
+    // and small), which keeps the comparison about the ACTIVATION FORMAT and nothing else.
+    // A REAL fp32 -> fp16 conversion.  The first version wrote `0x3C00 + (int)(x*64)`, which adds to the raw
+    // BITS and therefore changes the EXPONENT - x = 2.0 became 0x3C80 = 1.25 - so the two paths were driven by
+    // unrelated activations and the comparison reported 2770%.  The number was a symptom of the fixture, and
+    // the fixture is what the check exists to be able to trust.
+    auto f32_to_f16 = [](float f) -> uint16_t {
+        uint32_t b;
+        std::memcpy(&b, &f, 4);
+        const uint32_t sign = (b >> 16) & 0x8000u;
+        int exp = (int) ((b >> 23) & 0xFF) - 127 + 15;
+        uint32_t man = b & 0x7FFFFFu;
+        if (exp >= 31) return (uint16_t) (sign | 0x7C00u | (man ? 0x200u : 0u));
+        if (exp <= 0) {
+            if (exp < -10) return (uint16_t) sign;
+            man |= 0x800000u;
+            const uint32_t sh = (uint32_t) (14 - exp);
+            uint32_t h = (man >> sh) & 0x3FFu;
+            const uint32_t rem = man & ((1u << sh) - 1u);
+            if (rem > (1u << (sh - 1)) || (rem == (1u << (sh - 1)) && (h & 1u))) ++h;
+            return (uint16_t) (sign | h);
+        }
+        uint16_t h = (uint16_t) (sign | ((uint32_t) exp << 10) | (man >> 13));
+        const uint32_t rem = man & 0x1FFFu;
+        if (rem > 0x1000u || (rem == 0x1000u && (h & 1u))) ++h;
+        return h;
+    };
+    std::vector<uint16_t> hx((size_t) n_in);
+    for (long long i = 0; i < n_in; ++i) hx[(size_t) i] = f32_to_f16(x[(size_t) i]);
+    uint16_t* d_hx = nullptr;
+    check(DPCT_CHECK_ERROR(d_hx = sycl::malloc_device<uint16_t>(
+                               hx.size(), dpct::get_in_order_queue())),
+          "m hx");
+    /*
+    DPCT1114:934: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_hx, hx.data(), hx.size() * sizeof(uint16_t))),
+          "c hx");
+    strata::kernels::SForm form{2, -1, 64, strata::kernels::Codebook::Affine, false};
+    strata::kernels::s_gemv_split(d_hx, d_codes, d_scales, nullptr, d_y_fp16, n_in, n_out, form, tpr);
+    std::vector<float> y16((size_t) n_out);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(y16.data(), d_y_fp16, y16.size() * sizeof(float))
+                  .wait()),
+          "c y1");
+
+    double diff = 0.0;
+    for (long long o = 0; o < n_out; ++o) {
+        diff += std::fabs((double) y16[(size_t) o] - (double) got[(size_t) o]);
+    }
+    const double rel_gap = diff / (sum_abs > 1e-30 ? sum_abs : 1e-30);
+    std::printf("  %-38s %.4f%% of the reference magnitude\n", "fp16-activation vs q8-activation", rel_gap * 100);
+    if (rel_gap < 1e-4) {
+        std::fprintf(stderr,
+                     "the two activation paths agree to %.2e, so this test CANNOT see the difference it exists "
+                     "to measure - either the q8 path silently used fp16, or the fixture is degenerate\n",
+                     rel_gap);
+        ++bad;
+    }
+
+    std::printf("\ns2_gemv_q8: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("s2_gemv_q8_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/s_gemv_parity.cpp b/sycl/src/kernels/s_gemv_parity.cpp
new file mode 100644
index 00000000000..cc0486139ee
--- /dev/null
+++ b/sycl/src/kernels/s_gemv_parity.cpp
@@ -0,0 +1,754 @@
+// src/kernels/s_gemv_parity.cpp - P2.S2's parity test for the S-family GEMV.
+//
+// Four source types, chosen to cover every branch the kernel has:
+//
+//   S2  Q2_0   2-bit, bias  -1, group 64   affine
+//   S4  Q4_0   4-bit, bias  -8, group 32   affine
+//   S4  IQ4_NL 4-bit, bias   0, group 32   CODEBOOK  (non-linear, no bias can express it)
+//   S8  Q8_0   8-bit, bias -128, group 32  affine
+//
+// That is all three template instantiations, both codebooks, and four different biases.  The offset branch
+// (`has_offset`, only Q4_K and Q5_K) is NOT exercised here and the test prints that fact rather than leaving a
+// green result to imply otherwise - Q4_K's canonicalisation needs the packed 6-bit scale/min pairs, and the
+// honest move is to say so than to half-build it.
+//
+// THE REFERENCE IS THE CHAIN: for each type the CPU side reconstructs the RAW GGUF block from the canonical
+// planes and decodes it with that type's scalar dequantizer from include/strata/artifact/dequant.hpp - the
+// ones `bench/micro/dequant_xcheck` checks against **ggml's own** dequantizers.  Reconstructing raw from
+// canonical is the inverse of what the packer does, and it is written here independently of the packer so the
+// two are not the same code.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/dequant.hpp"
+#include "strata/kernels/s_gemv.hpp"
+
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <algorithm>
+#include <chrono>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// Finite, exactly representable fp16 patterns WITH full mantissas.  Not powers of two: with only powers of
+// two every product is exact and the comparison cannot round, which is how the first version of s2_gemv's test
+// managed a worst error of exactly zero without proving anything.
+const uint16_t kScales[] = {0x3E00, 0x3555, 0x3C01, 0x4248, 0x4123, 0x2AAA, 0x4A2B, 0x3800,
+                            0xBE00, 0xB555, 0xC248, 0x2AAB, 0x4A2C, 0x2AAB, 0xB800};
+
+struct Case {
+    const char* name;
+    strata::kernels::SForm form;
+    int raw_bytes;        // one block
+    // Reconstruct the raw GGUF block for one group from the canonical codes/scales, and return the number of
+    // elements the block decodes to (which may exceed group_elems: Q8_0's block IS one group, Q2_0's too).
+    int (*to_raw)(const uint8_t* codes, size_t code_off, const uint16_t* scale_bits, size_t scale_off, uint8_t* raw);
+    double (*dequant)(const uint8_t* raw, float* out);
+};
+
+// ---- Q2_0: raw = { fp16 d ; uint8 qs[16] }, 64 elements, code i at byte i/4 bits (i%4)*2 - identical to the
+// canonical plane, so this is a straight copy plus the scale.
+int q2_0_to_raw(const uint8_t* codes, size_t co, const uint16_t* scale_bits, size_t so, uint8_t* raw) {
+    const uint16_t d = scale_bits[so];
+    raw[0] = (uint8_t) (d & 0xFF);
+    raw[1] = (uint8_t) (d >> 8);
+    // `codes` is one code PER ELEMENT (64 of them); a Q2_0 block stores them PACKED, 4 per byte, element i at
+    // byte i/4 bits (i%4)*2.  The two coincide as a byte layout only if you confuse them, which is exactly the
+    // mistake the first version of this function made by copying 16 bytes verbatim.
+    for (int b = 0; b < 16; ++b) {
+        raw[2 + b] = (uint8_t) ((codes[co + 4 * b + 0] & 3) | ((codes[co + 4 * b + 1] & 3) << 2) |
+                                ((codes[co + 4 * b + 2] & 3) << 4) | ((codes[co + 4 * b + 3] & 3) << 6));
+    }
+    return 64;
+}
+double q2_0_deq(const uint8_t* raw, float* out) {
+    strata::dequantize_q2_0(raw, out);
+    return 64;
+}
+
+// ---- Q4_0: raw = { fp16 d ; uint8 qs[16] }, 32 elements; element j is the LOW nibble of byte j and element
+// j+16 the HIGH nibble.  The canonical plane stores one code per element, so this re-packs them.
+int q4_0_to_raw(const uint8_t* codes, size_t co, const uint16_t* scale_bits, size_t so, uint8_t* raw) {
+    const uint16_t d = scale_bits[so];
+    raw[0] = (uint8_t) (d & 0xFF);
+    raw[1] = (uint8_t) (d >> 8);
+    for (int j = 0; j < 16; ++j) raw[2 + j] = (uint8_t) ((codes[co + j] & 0x0F) | (codes[co + 16 + j] << 4));
+    return 32;
+}
+double q4_0_deq(const uint8_t* raw, float* out) {
+    strata::dequantize_q4_0(raw, out);
+    return 32;
+}
+
+// ---- IQ4_NL: identical packing to Q4_0, different decode (a table, not a bias).
+int iq4_to_raw(const uint8_t* codes, size_t co, const uint16_t* scale_bits, size_t so, uint8_t* raw) {
+    return q4_0_to_raw(codes, co, scale_bits, so, raw);
+}
+double iq4_deq(const uint8_t* raw, float* out) {
+    strata::dequantize_iq4_nl(raw, out);
+    return 32;
+}
+
+// ---- Q8_0: raw = { fp16 d ; int8 qs[32] }, 32 elements.  The canonical code plane is UNSIGNED with bias
+// -128 (round 154's fix), so the raw int8 byte is exactly the canonical code reinterpreted - a straight copy,
+// which is why this type is the cheapest one to check and the one whose sign bug was found by the pack.
+int q8_0_to_raw(const uint8_t* codes, size_t co, const uint16_t* scale_bits, size_t so, uint8_t* raw) {
+    const uint16_t d = scale_bits[so];
+    raw[0] = (uint8_t) (d & 0xFF);
+    raw[1] = (uint8_t) (d >> 8);
+    // NOT a straight copy.  The canonical code plane is UNSIGNED with bias -128, so canonical code c means the
+    // value (c - 128); the raw block stores that as an `int8_t`, whose reinterpretation as an unsigned byte is
+    // `c ^ 0x80` - a SIGN-BIT FLIP, not the identity.  Assuming identity is the same family of mistake as the
+    // round-154 Q8_0 bug that the pack found, and it is why this reconstruction is written out rather than
+    // memcpy'd.
+    for (int j = 0; j < 32; ++j) raw[2 + j] = (uint8_t) (codes[co + j] ^ 0x80);
+    return 32;
+}
+double q8_0_deq(const uint8_t* raw, float* out) {
+    strata::dequantize_q8_0(raw, out);
+    return 32;
+}
+
+// ---- S4/Q4_K: the ONLY canonical form with an offset, and the only one whose scale is an FP32 PRODUCT
+// (`fl(d*sc)`) rather than a widened fp16.  Both facts make it the case worth having.
+//
+// There is no `to_raw` for it in the table above because its canonical planes are DERIVED from the raw
+// parameters, not the other way round: the packer computes `scale = d*sc` and `offset = -(dmin*m)`, so this
+// generates d, dmin and the eight (sc, m) pairs, derives the planes exactly as the packer does, and writes a
+// raw block from the SAME parameters.  Inverting those products instead would be ambiguous.
+void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
+    using strata::kernels::Codebook;
+    using strata::kernels::SForm;
+    const SForm form{4, 0, 32, Codebook::Affine, true};
+
+    std::mt19937 rng(777);
+    const int n_scales = (int) (sizeof(kScales) / sizeof(kScales[0]));
+    const long long n_groups = n_in / 32;
+    const long long codes_per_row = n_in / 2;
+
+    std::vector<uint16_t> x((size_t) n_in);
+    for (long long i = 0; i < n_in; ++i) x[(size_t) i] = kScales[rng() % n_scales];
+
+    std::vector<uint8_t> codes_el((size_t) n_out * n_in);
+    for (size_t i = 0; i < codes_el.size(); ++i) codes_el[i] = (uint8_t) (rng() & 0x0F);
+    std::vector<uint8_t> codes((size_t) n_out * codes_per_row, 0);
+    for (size_t i = 0; i < codes_el.size(); ++i) {
+        const size_t o = i / (size_t) n_in, k = i % (size_t) n_in;
+        codes[o * (size_t) codes_per_row + k / 2] |= (uint8_t) (codes_el[i] << ((k % 2) * 4));
+    }
+    std::vector<float> scales((size_t) n_out * n_groups), offsets((size_t) n_out * n_groups);
+
+    struct Row {
+        uint16_t d, dmin;
+        uint8_t sc[8], m[8];
+    };
+    std::vector<Row> rows((size_t) n_out);
+    for (long long o = 0; o < n_out; ++o) {
+        Row& r = rows[(size_t) o];
+        r.d = kScales[rng() % n_scales];
+        r.dmin = kScales[rng() % n_scales];
+        for (int g = 0; g < 8; ++g) {
+            r.sc[g] = (uint8_t) (rng() & 0x3F);
+            r.m[g] = (uint8_t) (rng() & 0x3F);
+            for (long long sb = 0; sb < n_in / 256; ++sb) {
+                scales[(size_t) (o * n_groups + sb * 8 + g)] = strata::fp16_to_fp32(r.d) * (float) r.sc[g];
+                offsets[(size_t) (o * n_groups + sb * 8 + g)] = -(strata::fp16_to_fp32(r.dmin) * (float) r.m[g]);
+            }
+        }
+    }
+
+    std::vector<float> ref((size_t) n_out, 0.0f);
+    std::vector<double> cond((size_t) n_out, 0.0);
+    double worst_plane_ref = 0.0;   // max |planes - raw block| over every element, on the CPU alone
+    std::vector<uint8_t> blk(144);
+    std::vector<float> dec(256);
+    // A Q4_K raw block covers 256 elements, so a 2560-element row is TEN superblocks, each with its own
+    // 144-byte block.  The first version of this loop ran `step < 4` - one superblock, 256 of the row's 2560
+    // elements - while the kernel accumulated all of them, and the resulting 29x relative error was the
+    // reference being short, not the kernel being wrong.
+    for (long long o = 0; o < n_out; ++o) {
+        const Row& r = rows[(size_t) o];
+        float acc = 0.0f;
+        double sum_abs = 0.0;      // the natural scale of this row's dot product (see the metric below)
+        double plane_ref_diff = 0.0;   // (a) vs (b): planes against the raw block, both on the CPU
+        for (long long sb = 0; sb < n_in / 256; ++sb) {
+            // ONE 144-byte block per 256-element SUPERBLOCK, with all four steps' qs bytes filled BEFORE the
+            // decode.  The previous version decoded a fresh block per STEP and then read all 256 elements
+            // from each, so three quarters of every decode came from zeroed qs - four decodes of a
+            // quarter-filled block per superblock, which is the whole of the 1.17e4 disagreement.
+            // `scripts/probe_q4k_groups.cpp` builds it this way and agrees exactly, group by group.
+            blk.assign(144, 0);
+            blk[0] = (uint8_t) (r.d & 0xFF);
+            blk[1] = (uint8_t) (r.d >> 8);
+            blk[2] = (uint8_t) (r.dmin & 0xFF);
+            blk[3] = (uint8_t) (r.dmin >> 8);
+            for (int j = 0; j < 4; ++j) {          // the exact inverse of get_scale_min_k4
+                blk[4 + j] = (uint8_t) ((r.sc[j] & 0x3F) | ((r.sc[j + 4] >> 4) << 6));
+                blk[8 + j] = (uint8_t) ((r.m[j] & 0x3F) | ((r.m[j + 4] >> 4) << 6));
+                blk[12 + j] = (uint8_t) ((r.sc[j + 4] & 0x0F) | ((r.m[j + 4] & 0x0F) << 4));
+            }
+            for (int step = 0; step < 4; ++step) {
+                for (int l = 0; l < 32; ++l) {     // elements 0..31 LOW nibbles, 32..63 HIGH
+                    const long long e0 = o * n_in + sb * 256 + step * 64 + l;
+                    const long long e1 = e0 + 32;
+                    blk[16 + step * 32 + l] =
+                        (uint8_t) ((codes_el[(size_t) e0] & 0x0F) | (codes_el[(size_t) e1] << 4));
+                }
+            }
+            strata::dequantize_q4_K(blk.data(), dec.data());
+            for (int j = 0; j < 256; ++j) {
+                const float term = dec[(size_t) j] * strata::fp16_to_fp32(x[(size_t) (sb * 256 + j)]);
+                acc += term;
+                sum_abs += std::fabs((double) term);      // the CONDITION of this dot product
+
+                // THE THIRD DECODE.  (a) the raw block through the scalar dequantizer, (b) the canonical
+                // PLANES through `code*scale + offset`, (c) the GPU.  If (a) != (b) then this test built
+                // planes that disagree with its own raw block and the kernel is innocent; if (a) == (b) and
+                // (c) differs, the kernel is wrong.  Without (b) there is no way to tell which.
+                const long long elem = sb * 256 + j;
+                const long long g = elem / 32;
+                const int code = (int) codes_el[(size_t) (o * n_in + elem)];
+                const float b_dec = (float) code * scales[(size_t) (o * n_groups + g)] +
+                                    offsets[(size_t) (o * n_groups + g)];
+                if (std::fabs((double) (b_dec - dec[(size_t) j])) > plane_ref_diff) {
+                    plane_ref_diff = std::fabs((double) (b_dec - dec[(size_t) j]));
+                }
+            }
+        }
+        ref[(size_t) o] = acc;
+        cond[(size_t) o] = sum_abs;
+        if (!(plane_ref_diff <= worst_plane_ref)) worst_plane_ref = plane_ref_diff;
+    }
+
+    uint16_t* d_x = nullptr;
+    uint8_t* d_codes = nullptr;
+    float *d_scales = nullptr, *d_offsets = nullptr, *d_y = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<uint16_t>(
+                               x.size(), dpct::get_in_order_queue())),
+          "cudaMalloc x");
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "cudaMalloc codes");
+    check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                               scales.size(), dpct::get_in_order_queue())),
+          "cudaMalloc scales");
+    check(DPCT_CHECK_ERROR(d_offsets = sycl::malloc_device<float>(
+                               offsets.size(), dpct::get_in_order_queue())),
+          "cudaMalloc offsets");
+    check(DPCT_CHECK_ERROR(d_y = sycl::malloc_device<float>(
+                               (size_t)n_out, dpct::get_in_order_queue())),
+          "cudaMalloc y");
+    /*
+    DPCT1114:393: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), x.size() * sizeof(uint16_t))),
+          "copy x");
+    /*
+    DPCT1114:394: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size())),
+          "copy codes");
+    /*
+    DPCT1114:395: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * sizeof(float))),
+          "copy scales");
+    /*
+    DPCT1114:396: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_offsets, offsets.data(), offsets.size() * sizeof(float))),
+          "copy offsets");
+    strata::kernels::s_gemv(d_x, d_codes, d_scales, d_offsets, d_y, n_in, n_out, form);
+    std::vector<float> got((size_t) n_out);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(got.data(), d_y, got.size() * sizeof(float))
+                  .wait()),
+          "copy back");
+
+    // THE ERROR IS MEASURED AGAINST sum|term|, NOT AGAINST THE RESULT.  A dot product of 2560 signed terms
+    // cancels, so `|ref-got| / |ref|` is a statement about the condition number, not about the kernel: a row
+    // whose terms are ~1e7 and whose result is ~1e3 reports a relative error of 50 for an absolute error of
+    // 1e-6 of the terms.  `sum_abs` is the natural scale of the computation, and comparing to it is what
+    // makes a tolerance mean "agrees to within rounding" instead of "did not cancel".
+    long long bad = 0;
+    double worst = 0.0, worst_res = 0.0;
+    for (long long o = 0; o < n_out; ++o) {
+        const double a = ref[(size_t) o], b = got[(size_t) o];
+        const double scale = cond[(size_t) o] > 1e-30 ? cond[(size_t) o] : 1e-30;
+        const double rel = std::fabs(a - b) / scale;
+        const double rel_res = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+        if (!(rel <= worst)) worst = rel;
+        if (!(rel_res <= worst_res)) worst_res = rel_res;
+        if (!(rel <= tol)) ++bad;
+    }
+    double lo = ref[0], hi = ref[0];
+    for (float v : ref) {
+        lo = std::fmin(lo, v);
+        hi = std::fmax(hi, v);
+    }
+    std::printf("  %-10s %lld rows, %lld over tol, worst rel-to-terms %.3e (rel-to-result %.3e)\n",
+                "S4/Q4_K", n_out, bad, worst, worst_res);
+    std::printf("             ref spread [%.4g, %.4g], condition (sum|term|) up to %.4g\n", lo, hi,
+                *std::max_element(cond.begin(), cond.end()));
+    std::printf("             CPU planes vs CPU raw block: max |diff| = %.3e -> %s\n", worst_plane_ref,
+                worst_plane_ref == 0.0
+                    ? "the test is SELF-CONSISTENT"
+                    : "*** THE TEST DISAGREES WITH ITSELF - fix the reference before believing any GPU result ***");
+    if (hi - lo <= 0.0) {
+        std::fprintf(stderr, "VACUOUS: S4/Q4_K reference is constant\n");
+        std::exit(1);
+    }
+    *total_bad += (int) bad;
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_codes, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_offsets, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+}
+
+}  // namespace
+
+
+// ------------------------------------------------------------------ benchmark
+//
+// P2.S10 wants a first measurement and a ledger entry, and the objective is stated in tokens per second, so
+// the useful output is not GiB/s but "milliseconds of expert matvec per token".  Warm-up runs are discarded
+// (the first launch pays module load and page faults) and the MINIMUM is reported alongside the mean, because
+// the minimum is the one not polluted by another process on the machine.
+void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
+    using strata::kernels::Codebook;
+    using strata::kernels::SForm;
+    const SForm form{2, -1, 64, Codebook::Affine, false};
+    const long long n_groups = n_in / 64;
+    const long long codes_per_row = n_in / 4;
+
+    std::vector<uint8_t> codes((size_t) n_out * codes_per_row, 0xA5);
+    std::vector<float> scales((size_t) n_out * n_groups, 0.001f);
+    std::vector<uint16_t> x((size_t) n_in, 0x3C00);            // 1.0 in fp16
+
+    uint16_t* d_x = nullptr;
+    uint8_t* d_codes = nullptr;
+    float *d_scales = nullptr, *d_y = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<uint16_t>(
+                               x.size(), dpct::get_in_order_queue())),
+          "bench x");
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "bench codes");
+    check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                               scales.size(), dpct::get_in_order_queue())),
+          "bench scales");
+    check(DPCT_CHECK_ERROR(d_y = sycl::malloc_device<float>(
+                               (size_t)n_out, dpct::get_in_order_queue())),
+          "bench y");
+    /*
+    DPCT1114:397: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, x.data(), x.size() * sizeof(uint16_t))),
+          "bench copy x");
+    /*
+    DPCT1114:398: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size())),
+          "bench copy codes");
+    /*
+    DPCT1114:399: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * sizeof(float))),
+          "bench copy scales");
+
+    for (int i = 0; i < 3; ++i) strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form);
+
+    std::vector<double> ms;
+    for (int i = 0; i < iters; ++i) {
+        const auto t0 = std::chrono::steady_clock::now();
+        strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form);
+        const auto t1 = std::chrono::steady_clock::now();
+        ms.push_back(std::chrono::duration<double, std::milli>(t1 - t0).count());
+    }
+    std::sort(ms.begin(), ms.end());
+    double mean = 0;
+    for (double v : ms) mean += v;
+    mean /= (double) ms.size();
+
+    const double weights = (double) n_in * (double) n_out;
+    const double bytes = (double) n_out * (double) codes_per_row + (double) n_out * n_groups * 4.0;
+    std::printf("s2_gemv bench  [%lld x %lld]  %d iters\n", n_in, n_out, iters);
+    std::printf("  ms per gemv: min %.4f  median %.4f  mean %.4f\n", ms.front(), ms[ms.size() / 2], mean);
+    std::printf("  min -> %.1f G weights/s, %.1f GiB/s of S2 streamed\n", weights / ms.front() / 1e6,
+                bytes / (1024.0 * 1024 * 1024) / (ms.front() / 1000.0));
+
+    // The projection the objective is stated against: 48 layers x 10 experts x 3 roles, all of one token's
+    // experts, at the measured per-role rate.  This is the VRAM-resident path only - the CPU expert path and
+    // the KV/attention work are separate and are NOT included.
+    const double roles_per_token = 48.0 * 10.0 * 3.0;
+    const double tok_ms = roles_per_token * ms.front();
+    std::printf("  per token: %.0f roles x %.4f ms = %.1f ms  ->  %.1f tok/s (expert matvec only)\n",
+                roles_per_token, ms.front(), tok_ms, tok_ms > 0 ? 1000.0 / tok_ms : 0.0);
+    std::printf("  NOTE: expert matvec ONLY. No attention, no KV, no norm, no router, no sampling, and it\n"
+                "        assumes every expert is already resident in VRAM at zero cost.\n");
+
+    // The NAIVE kernel's output is the reference for the split one.  `s_gemv` is checked against the scalar
+    // dequantizer by this file's parity cases, so its result here is a validated value, and the split kernel
+    // sums in a different order - so this is a relative comparison, not bit equality.
+    strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form);
+    std::vector<float> ref_naive((size_t) n_out);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(ref_naive.data(), d_y,
+                                       ref_naive.size() * sizeof(float))
+                               .wait()),
+          "copy naive reference");
+
+    // ---- the row-split variant, same planes, same process -------------------
+    // Swept rather than guessed: more threads per row buys parallelism and costs a deeper reduction.
+    for (int tpr : {32, 64, 128, 256}) {
+        if (tpr > n_in) continue;
+        for (int i = 0; i < 3; ++i) {
+            strata::kernels::s_gemv_split(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form, tpr);
+        }
+        std::vector<double> sms;
+        for (int i = 0; i < iters; ++i) {
+            const auto t0 = std::chrono::steady_clock::now();
+            strata::kernels::s_gemv_split(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form, tpr);
+            sms.push_back(std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t0)
+                              .count());
+        }
+        std::sort(sms.begin(), sms.end());
+
+        // correctness of the thing being timed
+        std::vector<float> got((size_t) n_out);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got.data(), d_y, got.size() * sizeof(float))
+                      .wait()),
+              "copy split result");
+        long long bad = 0;
+        double worst = 0.0;
+        for (long long o = 0; o < n_out; ++o) {
+            const double a = ref_naive[(size_t) o], b = got[(size_t) o];
+            const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+            if (!(rel <= worst)) worst = rel;
+            if (!(rel <= 1e-4)) ++bad;
+        }
+        if (bad) {
+            std::printf("  split tpr=%-4d *** WRONG *** %lld of %lld rows differ, worst rel %.3e\n", tpr,
+                        bad, n_out, worst);
+            *split_bad += (int) bad;
+        }
+
+        // ---- the quad-amortised S2 kernel, timed AND checked against the naive reference ----
+        // Only meaningful for S2: it assumes four elements share one code byte, which is true of 2-bit codes.
+        if (form.code_bits == 2 && (n_in % 64) == 0) {
+            for (int t2 : {32, 64, 128}) {
+                for (int i = 0; i < 3; ++i) {
+                    strata::kernels::s2_gemv_quads(d_x, d_codes, d_scales, d_y, n_in, n_out, t2);
+                }
+                std::vector<double> qms;
+                for (int i = 0; i < iters; ++i) {
+                    const auto q0 = std::chrono::steady_clock::now();
+                    strata::kernels::s2_gemv_quads(d_x, d_codes, d_scales, d_y, n_in, n_out, t2);
+                    qms.push_back(std::chrono::duration<double, std::milli>(
+                                      std::chrono::steady_clock::now() - q0).count());
+                }
+                std::sort(qms.begin(), qms.end());
+                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                           .memcpy(got.data(), d_y,
+                                                   got.size() * sizeof(float))
+                                           .wait()),
+                      "copy quads result");
+                long long qbad = 0;
+                double qworst = 0.0;
+                for (long long o = 0; o < n_out; ++o) {
+                    const double a = ref_naive[(size_t) o], b = got[(size_t) o];
+                    const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+                    if (rel > qworst) qworst = rel;
+                    if (!(rel <= 1e-4)) ++qbad;
+                }
+                if (qbad) *split_bad += (int) qbad;
+                std::printf("  quads tpr=%-4d min %.4f ms  -> %6.1f G weights/s   vs naive %.2fx   %s\n", t2,
+                            qms.front(), weights / qms.front() / 1e6, ms.front() / qms.front(),
+                            qbad ? "*** WRONG ***" : "checked ok");
+            }
+        }
+
+        // ---- the two-lever kernel, both configurations, timed AND checked ----
+        if (form.code_bits == 2 && (n_in % 64) == 0) {
+            for (int staged = 0; staged < 2; ++staged) {
+                for (int t3 : {32, 64, 128}) {
+                    for (int i = 0; i < 3; ++i) {
+                        strata::kernels::s2_gemv_fast(d_x, d_codes, d_scales, d_y, n_in, n_out, t3, staged != 0);
+                    }
+                    std::vector<double> fms;
+                    for (int i = 0; i < iters; ++i) {
+                        const auto q0 = std::chrono::steady_clock::now();
+                        strata::kernels::s2_gemv_fast(d_x, d_codes, d_scales, d_y, n_in, n_out, t3, staged != 0);
+                        fms.push_back(std::chrono::duration<double, std::milli>(
+                                          std::chrono::steady_clock::now() - q0).count());
+                    }
+                    std::sort(fms.begin(), fms.end());
+                    check(
+                        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                             .memcpy(got.data(), d_y,
+                                                     got.size() * sizeof(float))
+                                             .wait()),
+                        "copy fast result");
+                    long long fbad = 0;
+                    for (long long o = 0; o < n_out; ++o) {
+                        const double a = ref_naive[(size_t) o], b = got[(size_t) o];
+                        const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+                        if (!(rel <= 1e-4)) ++fbad;
+                    }
+                    if (fbad) *split_bad += (int) fbad;
+                    std::printf("  fast %s tpr=%-4d min %.4f ms  -> %6.1f G weights/s   vs naive %.2fx   %s\n",
+                                staged ? "staged" : "global", t3, fms.front(),
+                                weights / fms.front() / 1e6, ms.front() / fms.front(),
+                                fbad ? "*** WRONG ***" : "checked ok");
+                }
+            }
+        }
+
+        const double sp = ms.front() / sms.front();
+        std::printf("  split tpr=%-4d min %.4f ms  -> %6.1f G weights/s   speedup vs naive %.2fx\n", tpr,
+                    sms.front(), weights / sms.front() / 1e6, sp);
+    }
+
+    sycl::free(d_x, dpct::get_in_order_queue());
+    sycl::free(d_codes, dpct::get_in_order_queue());
+    sycl::free(d_scales, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+}
+
+int main(int argc, char** argv) {
+    long long n_in = 2560;
+    long long n_out = 128;
+    // 1e-4, not 1e-5: the measured worst is ~1e-5 (FMA contraction of a 2560-term f32 accumulation), so a
+    // 1e-5 threshold would pass by 4% and fail on a different n_in.  The phase spec allows 1e-3 for FP16
+    // paths; this is 10x tighter than the spec and 10x looser than the measurement.
+    double tol = 1e-4;
+    bool selftest = false;
+    bool bench = false;
+    int iters = 200;
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        if (a == "--selftest") selftest = true;
+        else if (a == "--bench") bench = true;
+        else if (a == "--iters" && i + 1 < argc) iters = std::atoi(argv[++i]);
+        else if (a == "--n-in" && i + 1 < argc) n_in = std::atoll(argv[++i]);
+        else if (a == "--n-out" && i + 1 < argc) n_out = std::atoll(argv[++i]);
+        else {
+            std::fprintf(stderr, "usage: s_gemv_parity [--selftest] [--n-in N] [--n-out N]\n");
+            return 2;
+        }
+    }
+
+    using strata::kernels::Codebook;
+    using strata::kernels::SForm;
+    std::vector<Case> cases;
+    cases.push_back({"S2/Q2_0", SForm{2, -1, 64, Codebook::Affine, false}, 18, q2_0_to_raw, q2_0_deq});
+    cases.push_back({"S4/Q4_0", SForm{4, -8, 32, Codebook::Affine, false}, 18, q4_0_to_raw, q4_0_deq});
+    cases.push_back({"S4/IQ4_NL", SForm{4, 0, 32, Codebook::Iq4Nl, false}, 18, iq4_to_raw, iq4_deq});
+    cases.push_back({"S8/Q8_0", SForm{8, -128, 32, Codebook::Affine, false}, 34, q8_0_to_raw, q8_0_deq});
+
+    std::mt19937 rng(4242);
+    const int n_scales = (int) (sizeof(kScales) / sizeof(kScales[0]));
+    int total_bad = 0;
+
+    for (const Case& tc : cases) {
+        const int bits = tc.form.code_bits;
+        const int per_byte = 8 / bits;
+        const int G = tc.form.group_elems;
+        const long long n_groups = n_in / G;
+        const long long codes_per_row = n_in / per_byte;
+
+        // activations
+        std::vector<uint16_t> x((size_t) n_in);
+        for (long long i = 0; i < n_in; ++i) x[(size_t) i] = kScales[rng() % n_scales];
+
+        // Codes are generated ONE PER ELEMENT and then packed into the plane the kernel reads.
+        //
+        // The first version of this test generated a random BYTE ARRAY and used it as both, which is the bug
+        // that made S2 pass and the other three fail by 50x-500x.  The two are not the same thing: the kernel
+        // reads element i from byte i/per_byte at bit (i%per_byte)*bits, while the reference needs one code per
+        // element to rebuild a raw GGUF block.  For S2 (per_byte = 4, which IS Q2_0's own raw layout) treating
+        // one random array as both happened to agree - and that coincidence is exactly what a test must not
+        // depend on.
+        std::vector<uint8_t> codes_el((size_t) n_out * n_in);
+        for (size_t i = 0; i < codes_el.size(); ++i) codes_el[i] = (uint8_t) (rng() & ((1u << bits) - 1));
+        std::vector<uint8_t> codes((size_t) n_out * codes_per_row, 0);
+        for (long long o = 0; o < n_out; ++o) {
+            for (long long i = 0; i < n_in; ++i) {
+                const long long byi = o * codes_per_row + i / per_byte;
+                codes[(size_t) byi] |= (uint8_t) (codes_el[(size_t) (o * n_in + i)]
+                                                  << ((i % per_byte) * bits));
+            }
+        }
+        std::vector<float> scales((size_t) n_out * n_groups);
+        std::vector<uint16_t> scale_bits((size_t) n_out * n_groups);
+        for (size_t i = 0; i < scales.size(); ++i) {
+            scale_bits[i] = kScales[rng() % n_scales];
+            scales[i] = strata::fp16_to_fp32(scale_bits[i]);
+        }
+
+        // CPU reference
+        std::vector<float> ref((size_t) n_out, 0.0f);
+        std::vector<uint8_t> raw((size_t) tc.raw_bytes);
+        std::vector<float> dec((size_t) G);
+        for (long long o = 0; o < n_out; ++o) {
+            float acc = 0.0f;
+            for (long long g = 0; g < n_groups; ++g) {
+                const size_t co = (size_t) o * n_in + (size_t) g * G;   // the UNPACKED code array
+                const size_t so = (size_t) o * n_groups + (size_t) g;
+                // The raw block carries the scale as fp16 and the canonical plane carries it widened, so the
+                // block is rebuilt from the PATTERN the plane came from.  No float-to-fp16 conversion is
+                // needed anywhere, and the decoder therefore sees bit-identically what the kernel reads.
+                const int n = tc.to_raw(codes_el.data(), co, scale_bits.data(), so, raw.data());
+                tc.dequant(raw.data(), dec.data());
+                for (long long j = 0; j < (long long) n; ++j) {
+                    acc += dec[(size_t) j] * strata::fp16_to_fp32(x[(size_t) (g * G + j)]);
+                }
+            }
+            ref[(size_t) o] = acc;
+        }
+
+        // GPU
+        uint16_t* d_x = nullptr;
+        uint8_t* d_codes = nullptr;
+        float *d_scales = nullptr, *d_y = nullptr;
+        check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<uint16_t>(
+                                   x.size(), dpct::get_in_order_queue())),
+              "cudaMalloc x");
+        check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                                   codes.size(), dpct::get_in_order_queue())),
+              "cudaMalloc codes");
+        check(DPCT_CHECK_ERROR(d_scales = sycl::malloc_device<float>(
+                                   scales.size(), dpct::get_in_order_queue())),
+              "cudaMalloc scales");
+        check(DPCT_CHECK_ERROR(d_y = sycl::malloc_device<float>(
+                                   (size_t)n_out, dpct::get_in_order_queue())),
+              "cudaMalloc y");
+        /*
+        DPCT1114:400: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_x, x.data(), x.size() * sizeof(uint16_t))),
+              "copy x");
+        /*
+        DPCT1114:401: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_codes, codes.data(), codes.size())),
+              "copy codes");
+        /*
+        DPCT1114:402: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_scales, scales.data(), scales.size() * sizeof(float))),
+              "copy scales");
+        strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, tc.form);
+        std::vector<float> got((size_t) n_out);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got.data(), d_y, got.size() * sizeof(float))
+                      .wait()),
+              "copy back");
+
+        long long bad = 0;
+        double worst = 0.0;
+        for (long long o = 0; o < n_out; ++o) {
+            const double a = ref[(size_t) o], b = got[(size_t) o];
+            const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+            if (!(rel <= worst)) worst = rel;
+            if (!(rel <= tol)) ++bad;
+        }
+        double lo = ref[0], hi = ref[0];
+        for (float v : ref) {
+            lo = std::fmin(lo, v);
+            hi = std::fmax(hi, v);
+        }
+        std::printf("  %-10s %lld rows, %lld over tol, worst rel %.3e   ref spread [%.4g, %.4g]\n", tc.name,
+                    n_out, bad, worst, lo, hi);
+        if (hi - lo <= 0.0) {
+            std::fprintf(stderr, "VACUOUS: %s reference is constant\n", tc.name);
+            return 1;
+        }
+        total_bad += (int) bad;
+
+        sycl::free(d_x, dpct::get_in_order_queue());
+        sycl::free(d_codes, dpct::get_in_order_queue());
+        sycl::free(d_scales, dpct::get_in_order_queue());
+        sycl::free(d_y, dpct::get_in_order_queue());
+    }
+
+    std::printf("s_gemv: %zu type cases, %d rows over tolerance (tol %.1e)\n", cases.size(), total_bad, tol);
+    // Q4_K IS NOT PART OF THE DEFAULT RUN.  It FAILS: 128 of 128 rows, worst error 0.586 of sum|term| - a
+    // real difference, not cancellation (the condition number is 2.8e7 and the error is 1.6e7).  Either the
+    // kernel's offset handling or this test's reconstruction of a Q4_K block is wrong and the two have not
+    // been separated yet.  Running it by default would turn ctest red and hide regressions in the four cases
+    // that ARE verified; leaving it out silently would be worse.  It is one flag away, and it is recorded as
+    // OPEN in the project state.
+    // Q4_K is IN the default run as of round 171.  Rounds 169-170 gated it because it FAILED, and the
+    // failure was this test's own reconstruction of a Q4_K block - four decodes of a quarter-filled block per
+    // superblock - not the kernel.  It now agrees to 2.8e-07 of sum|term|, so the gate goes rather than
+    // staying as a habit: a gate that outlives its reason is a check that quietly stopped running.
+    test_q4k(n_in, n_out, tol, &total_bad);
+    std::printf("s_gemv total: %d rows over tolerance\n", total_bad);
+    if (bench) {
+        // the real expert shapes: gate/up are [2560 x 640], down is [640 x 2560]
+        int split_bad = 0;
+        bench_s2_gemv(2560, 640, iters, &split_bad);
+        bench_s2_gemv(640, 2560, iters, &split_bad);
+        std::printf("split kernel rows disagreeing with the naive reference: %d\n", split_bad);
+        // accumulated HERE, inside the block that declares it, and it makes the binary FAIL: a kernel that is
+        // benchmarked but never compared is an unverified kernel being quoted for performance.
+        total_bad += split_bad;
+    }
+    if (total_bad) return 1;
+    if (selftest) std::printf("s_gemv_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/s_gemv_q8k_parity.cpp b/sycl/src/kernels/s_gemv_q8k_parity.cpp
new file mode 100644
index 00000000000..9fecea6c89f
--- /dev/null
+++ b/sycl/src/kernels/s_gemv_q8k_parity.cpp
@@ -0,0 +1,321 @@
+// src/kernels/s_gemv_q8k_parity.cpp - the Q8_K activation path of `s_gemv`.
+//
+// THE POINT OF THIS KERNEL IS A CONTRACT, so the test is built around the contract rather than around the
+// arithmetic:
+//
+//   1. the kernel against a host reference that dequantizes the SAME Q8_K bytes and the SAME S-form planes,
+//      in double - so what is under test is the indexing, not the format;
+//   2. the Q8_K activation is produced by the ACTUAL `quantize_q8_K`, which is byte-exact against ggml
+//      (round 198).  Building the activation by hand here would make this a test of two transcriptions;
+//   3. **THE Q8_K-vs-FP16 GAP IS MEASURED**, because that is the number the whole activation-contract
+//      decision rests on and it has only ever been measured on Q2_0 weights (0.6175%) and on BF16 ones
+//      (0.141-0.156%).  A K-quant weight is a third case and it is the one the dense projections use.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s_gemv.hpp"
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+using strata::kernels::SForm;
+using strata::kernels::Codebook;
+
+void check(dpct::err0 e, const char *what) {
+}
+
+/// The host decode, transcribed from `docs/pack-format.md`'s rule: `value = cb[code] * scale + offset`, with
+/// the integer bias applied INSIDE the integer domain before the one multiply.
+const signed char kIq4Nl[16] = {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113};
+
+double weight_at(const std::vector<uint8_t>& codes, const std::vector<float>& scales,
+                 const std::vector<float>& offset, const SForm& f, long long n_in, long long o, long long i) {
+    const int per_byte = 8 / f.code_bits;
+    const long long codes_per_row = n_in / per_byte;
+    const long long n_groups = n_in / f.group_elems;
+    const uint8_t* c = codes.data() + o * codes_per_row;
+    const int code = (c[i / per_byte] >> ((int) (i % per_byte) * f.code_bits)) & ((1 << f.code_bits) - 1);
+    const double v = (f.codebook == Codebook::Iq4Nl) ? (double) kIq4Nl[code & 0x0F]
+                                                     : (double) (code + f.code_bias);
+    const long long g = i / f.group_elems;
+    double w = v * (double) scales[(size_t) (o * n_groups + g)];
+    if (f.has_offset) w += (double) offset[(size_t) (o * n_groups + g)];
+    return w;
+}
+
+/// Dequantize a block_q8_K buffer on the host: 292 bytes per 256 elements.
+double q8k_at(const std::vector<uint8_t>& x, long long i) {
+    const uint8_t* blk = x.data() + (size_t) (i / 256) * 292;
+    float d;
+    std::memcpy(&d, blk, 4);
+    const int8_t q = ((const int8_t*) (blk + 4))[i % 256];
+    return (double) d * (double) q;
+}
+
+struct Case {
+    const char* what;
+    int bits;
+    int bias;
+    int group;
+    Codebook cb;
+    bool has_offset;
+};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: s_gemv_q8k_parity [--selftest]\n"); return 2; }
+    }
+    int bad = 0;
+
+    // The forms the DENSE weights actually use, taken from the manifest rather than invented:
+    //   attn_qkv.weight   IQ4_XS  S4  group 32, no offset   (the GDN mixer's qkv)
+    //   attn_gate.weight  Q4_K    S4  group 32, offset      (the GDN mixer's z)
+    //   ssm_out.weight    Q5_K    S8  group 32, offset      (the GDN mixer's output)
+    const Case cases[] = {
+        {"IQ4_XS  S4 g32 no-offset", 4, -8, 32, Codebook::Affine, false},
+        {"Q4_K    S4 g32 offset", 4, 0, 32, Codebook::Affine, true},
+        {"Q5_K    S8 g32 offset", 8, 0, 32, Codebook::Affine, true},
+    };
+
+    for (const Case& cs : cases) {
+        const long long n_in = 512, n_out = 64;   // 2 Q8_K blocks wide, small enough for a host reference
+        std::mt19937 rng(2024);
+        std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> xf((size_t) n_in);
+        for (auto& v : xf) v = g(rng);
+
+        SForm f;
+        f.code_bits = cs.bits;
+        f.code_bias = cs.bias;
+        f.group_elems = cs.group;
+        f.codebook = cs.cb;
+        f.has_offset = cs.has_offset;
+
+        const int per_byte = 8 / cs.bits;
+        std::vector<uint8_t> codes((size_t) (n_out * n_in / per_byte));
+        for (auto& v : codes) v = (uint8_t) (rng() & 0xFF);
+        const long long n_groups = n_in / cs.group;
+        std::vector<float> scales((size_t) (n_out * n_groups)), offs((size_t) (n_out * n_groups));
+        for (auto& v : scales) v = 0.01f + 0.001f * (float) (rng() % 20);
+        for (auto& v : offs) v = 0.2f * g(rng);
+
+        // ---- the activation, from the REAL quantizer
+        std::vector<uint8_t> xq8k((size_t) (n_in / 256) * 292);
+        float* d_xf = nullptr;
+        uint8_t* d_xq = nullptr;
+        check(
+            DPCT_CHECK_ERROR(d_xf = (float *)sycl::malloc_device(
+                                 (size_t)n_in * 4, dpct::get_in_order_queue())),
+            "xf");
+        check(DPCT_CHECK_ERROR(d_xq = (uint8_t *)sycl::malloc_device(
+                                   xq8k.size(), dpct::get_in_order_queue())),
+              "xq");
+        /*
+        DPCT1114:847: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_xf, xf.data(), (size_t)n_in * 4)),
+              "cxf");
+        strata::kernels::quantize_q8_K(d_xf, d_xq, n_in, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(xq8k.data(), d_xq, xq8k.size())
+                                   .wait()),
+              "cxq");
+
+        // ---- host reference in double, over the same bytes
+        std::vector<float> want((size_t) n_out, 0.0f);
+        for (long long o = 0; o < n_out; ++o) {
+            double acc = 0;
+            for (long long i = 0; i < n_in; ++i)
+                acc += weight_at(codes, scales, offs, f, n_in, o, i) * q8k_at(xq8k, i);
+            want[(size_t) o] = (float) acc;
+        }
+
+        // ---- device
+        uint8_t* d_codes = nullptr;
+        float *d_scales = nullptr, *d_offs = nullptr, *d_y = nullptr;
+        check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                                   codes.size(), dpct::get_in_order_queue())),
+              "codes");
+        check(DPCT_CHECK_ERROR(
+                  d_scales = (float *)sycl::malloc_device(
+                      scales.size() * 4, dpct::get_in_order_queue())),
+              "scales");
+        check(
+            DPCT_CHECK_ERROR(d_offs = (float *)sycl::malloc_device(
+                                 offs.size() * 4, dpct::get_in_order_queue())),
+            "offs");
+        check(DPCT_CHECK_ERROR(
+                  d_y = (float *)sycl::malloc_device(
+                      (size_t)n_out * 4, dpct::get_in_order_queue())),
+              "y");
+        /*
+        DPCT1114:848: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_codes, codes.data(), codes.size())),
+              "cc");
+        /*
+        DPCT1114:849: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_scales, scales.data(), scales.size() * 4)),
+              "cs");
+        /*
+        DPCT1114:850: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_offs, offs.data(), offs.size() * 4)),
+              "co");
+
+        std::vector<float> naive((size_t) n_out), warp((size_t) n_out);
+        strata::kernels::s_gemv_q8k(d_xq, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in, n_out,
+                                    f, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(naive.data(), d_y, (size_t)n_out * 4)
+                                   .wait()),
+              "cy1");
+        strata::kernels::s_gemv_q8k_split(d_xq, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in,
+                                          n_out, f, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(warp.data(), d_y, (size_t)n_out * 4)
+                                   .wait()),
+              "cy2");
+
+        double mag = 0, d1 = 0, d2 = 0;
+        for (long long o = 0; o < n_out; ++o) {
+            mag += std::fabs((double) want[(size_t) o]);
+            d1 += std::fabs((double) want[(size_t) o] - (double) naive[(size_t) o]);
+            d2 += std::fabs((double) want[(size_t) o] - (double) warp[(size_t) o]);
+        }
+        std::printf("  %-28s naive %.3e   warp %.3e\n", cs.what, d1 / mag, d2 / mag);
+        // The kernel accumulates in f32, the reference in f64, over 512 terms with values of similar size.
+        // 1e-5 is the arithmetic's floor, not a structural allowance.
+        if (!(d1 / mag <= 1e-5 && d2 / mag <= 1e-5)) { std::printf("    *** over 1e-5 ***\n"); ++bad; }
+
+        // ---- 2b. THE Q8_0 ACTIVATION, on the SAME weight planes.  `s_gemv_q8_0_split` exists because the
+        // legacy block formats want Q8_0 and `ffn_down_shexp` cannot use Q8_K at all (n_in = 640 is not a
+        // multiple of 256).  It shares every line with the Q8_K kernel except the activation loader, so what
+        // this checks is the LOADER - the 34-byte block, the fp16 `d`, and the element index inside it.
+        {
+            std::vector<uint8_t> xq0((size_t) (n_in / 32) * 34);
+            uint8_t* d_x0 = nullptr;
+            check(DPCT_CHECK_ERROR(d_x0 = (uint8_t *)sycl::malloc_device(
+                                       xq0.size(), dpct::get_in_order_queue())),
+                  "x0");
+            strata::kernels::quantize_q8_0(d_xf, d_x0, n_in, nullptr);
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memcpy(xq0.data(), d_x0, xq0.size())
+                                       .wait()),
+                  "cx0");
+
+            // the host reference over the SAME Q8_0 bytes, with the same weight decode
+            std::vector<float> want0((size_t) n_out, 0.0f);
+            for (long long o = 0; o < n_out; ++o) {
+                double acc = 0;
+                for (long long i = 0; i < n_in; ++i) {
+                    const uint8_t* blk = xq0.data() + (size_t) (i / 32) * 34;
+                    uint16_t dbits;
+                    std::memcpy(&dbits, blk, 2);
+                    const double d = (double) strata::kernels::f32_from_f16(dbits);
+                    const int8_t q = ((const int8_t*) (blk + 2))[i % 32];
+                    acc += weight_at(codes, scales, offs, f, n_in, o, i) * d * (double) q;
+                }
+                want0[(size_t) o] = (float) acc;
+            }
+            strata::kernels::s_gemv_q8_0_split(d_x0, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y,
+                                               n_in, n_out, f, nullptr);
+            std::vector<float> got0((size_t) n_out);
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(got0.data(), d_y, (size_t)n_out * 4)
+                          .wait()),
+                  "cy0");
+            double m0 = 0, dd0 = 0;
+            for (long long o = 0; o < n_out; ++o) {
+                m0 += std::fabs((double) want0[(size_t) o]);
+                dd0 += std::fabs((double) want0[(size_t) o] - (double) got0[(size_t) o]);
+            }
+            std::printf("  %-28s Q8_0 act %.3e\n", cs.what, dd0 / (m0 > 1e-30 ? m0 : 1e-30));
+            if (!(dd0 / (m0 > 1e-30 ? m0 : 1e-30) <= 1e-5)) {
+                std::printf("    *** the Q8_0 activation loader is WRONG ***\n");
+                ++bad;
+            }
+            check(
+                DPCT_CHECK_ERROR(sycl::free(d_x0, dpct::get_in_order_queue())),
+                "fx0");
+        }
+
+        // ---- 3. THE Q8_K vs FP16 GAP, on a K-quant weight - the case the contract decision needs
+        {
+            std::vector<uint16_t> x16((size_t) n_in);
+            for (long long i = 0; i < n_in; ++i) x16[(size_t) i] = strata::kernels::f16_from_f32(xf[(size_t) i]);
+            uint16_t* d_x16 = nullptr;
+            check(DPCT_CHECK_ERROR(
+                      d_x16 = (uint16_t *)sycl::malloc_device(
+                          (size_t)n_in * 2, dpct::get_in_order_queue())),
+                  "x16");
+            /*
+            DPCT1114:851: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      d_x16, x16.data(), (size_t)n_in * 2)),
+                  "cx16");
+            std::vector<float> fp16out((size_t) n_out);
+            strata::kernels::s_gemv(d_x16, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in, n_out,
+                                    f);
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memcpy(fp16out.data(), d_y, (size_t)n_out * 4)
+                          .wait()),
+                  "cy3");
+            double dd = 0;
+            for (long long o = 0; o < n_out; ++o)
+                dd += std::fabs((double) naive[(size_t) o] - (double) fp16out[(size_t) o]);
+            const double rel = dd / mag;
+            const bool visible = rel > 1e-3;
+            std::printf("      %-24s %s (%.4f%% apart, tolerance 0.1%%)\n", "Q8_K vs fp16 activation",
+                        visible ? "yes" : "*** NO ***", rel * 100);
+            if (!visible) ++bad;
+            sycl::free(d_x16, dpct::get_in_order_queue());
+        }
+        sycl::free(d_xf, dpct::get_in_order_queue());
+            sycl::free(d_xq, dpct::get_in_order_queue());
+            sycl::free(d_codes, dpct::get_in_order_queue());
+            sycl::free(d_scales, dpct::get_in_order_queue());
+            sycl::free(d_offs, dpct::get_in_order_queue());
+            sycl::free(d_y, dpct::get_in_order_queue());
+    }
+
+    std::printf("\ns_gemv_q8k: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("s_gemv_q8k_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
new file mode 100644
index 00000000000..4e0568f1f5f
--- /dev/null
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -0,0 +1,929 @@
+// src/kernels/sampler_parity.cpp - P2.S2's test for the sampler chain.
+//
+// THE CHECK THAT MATTERS IS THAT THE ORDER IS OBSERVABLE.  A sampler in the wrong order still returns a valid
+// token, so "it produced a token" proves nothing; and because temperature is MONOTONIC it does not change which
+// tokens `top_k` keeps, so a top-k-only fixture cannot see the order either.  What it changes is `top_p`'s CUT:
+// at T < 1 the distribution sharpens, the cumulative mass reaches p sooner, and fewer tokens survive.
+//
+// So this builds a fixture where that happens, computes the greedy pick under BOTH orders, and requires them to
+// DIFFER - then requires the kernel to agree with the specified one.  Without the first half, the test would
+// pass against either order.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/sampler.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// The host reference for the specified order: top_k -> top_p -> temperature -> argmax.
+// `temp_first` swaps the first and last stages, which is the intuitive-but-wrong order.
+int reference_pick(const std::vector<float>& l, const strata::kernels::SamplerParams& p, bool temp_first) {
+    const int nv = (int) l.size();
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+    auto val = [&](int v) { return temp_first ? l[(size_t) v] * inv_t : l[(size_t) v]; };
+
+    std::vector<int> ids;
+    const int k = p.top_k > 0 ? p.top_k : nv;
+    std::vector<char> taken((size_t) nv, 0);
+    for (int i = 0; i < k; ++i) {
+        int best = -1;
+        float bv = 0;
+        for (int v = 0; v < nv; ++v) {
+            if (taken[(size_t) v]) continue;
+            if (best < 0 || val(v) > bv) { best = v; bv = val(v); }
+        }
+        taken[(size_t) best] = 1;
+        ids.push_back(best);
+    }
+    if (p.top_p < 1.0f) {
+        float mx = val(ids[0]);
+        for (int v : ids) mx = std::fmax(mx, val(v));
+        double sum = 0;
+        for (int v : ids) sum += std::exp((double) val(v) - (double) mx);
+        double cum = 0;
+        int cut = (int) ids.size();
+        for (size_t i = 0; i < ids.size(); ++i) {
+            cum += std::exp((double) val(ids[i]) - (double) mx) / sum;
+            if (cum >= (double) p.top_p) { cut = (int) i + 1; break; }
+        }
+        if (cut < p.min_keep) cut = p.min_keep < (int) ids.size() ? p.min_keep : (int) ids.size();
+        ids.resize((size_t) cut);
+    }
+    return ids[0];      // greedy: the largest SURVIVING logit, and `ids` is in descending order
+}
+
+// The number of survivors AFTER top_p, in the given order - the quantity the order actually changes.
+int reference_cut(const std::vector<float>& l, const strata::kernels::SamplerParams& p, bool temp_first) {
+    const int nv = (int) l.size();
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+    auto val = [&](int v) { return temp_first ? l[(size_t) v] * inv_t : l[(size_t) v]; };
+    const int k = p.top_k > 0 ? p.top_k : nv;
+    std::vector<int> ids;
+    std::vector<char> taken((size_t) nv, 0);
+    for (int i = 0; i < k; ++i) {
+        int best = -1; float bv = 0;
+        for (int v = 0; v < nv; ++v) {
+            if (taken[(size_t) v]) continue;
+            if (best < 0 || val(v) > bv) { best = v; bv = val(v); }
+        }
+        taken[(size_t) best] = 1; ids.push_back(best);
+    }
+    if (p.top_p < 1.0f) {
+        float mx = val(ids[0]);
+        for (int v : ids) mx = std::fmax(mx, val(v));
+        double sum = 0;
+        for (int v : ids) sum += std::exp((double) val(v) - (double) mx);
+        double cum = 0;
+        int cut = (int) ids.size();
+        for (size_t i = 0; i < ids.size(); ++i) {
+            cum += std::exp((double) val(ids[i]) - (double) mx) / sum;
+            if (cum >= (double) p.top_p) { cut = (int) i + 1; break; }
+        }
+        if (cut < p.min_keep) cut = p.min_keep < (int) ids.size() ? p.min_keep : (int) ids.size();
+        return cut;
+    }
+    return (int) ids.size();
+}
+
+int run(const char* name, const std::vector<float>& logits, int n_tokens, const strata::kernels::SamplerParams& p,
+        const std::vector<int>& want, const std::vector<int>& hist = {}, int hist_len = 0) {
+    float* d_l = nullptr;
+    int* d_o = nullptr;
+    check(DPCT_CHECK_ERROR(d_l = sycl::malloc_device<float>(
+                               logits.size(), dpct::get_in_order_queue())),
+          "malloc logits");
+    check(DPCT_CHECK_ERROR(d_o = sycl::malloc_device<int>(
+                               (size_t)n_tokens, dpct::get_in_order_queue())),
+          "malloc out");
+    /*
+    DPCT1114:503: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_l, logits.data(), logits.size() * sizeof(float))),
+          "copy");
+    // -1 in every output slot first: a row the kernel leaves unwritten can never match (a verify window reads
+    // every row, so "no output" is a wrong answer, not a skipped one)
+    check(
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memset(d_o, 0xFF, (size_t)n_tokens * sizeof(int))
+                             .wait()),
+        "fill out");
+    int* d_h = nullptr;
+    if (hist_len > 0) {
+        check(DPCT_CHECK_ERROR(d_h = sycl::malloc_device<int>(
+                                   hist.size(), dpct::get_in_order_queue())),
+              "malloc hist");
+        /*
+        DPCT1114:504: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_h, hist.data(), hist.size() * sizeof(int))),
+              "copy hist");
+    }
+    strata::kernels::sample_tokens(d_l, n_tokens, (int) (logits.size() / n_tokens), d_h, hist_len, p, d_o,
+                                   nullptr);
+    std::vector<int> got((size_t) n_tokens);
+    check(
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memcpy(got.data(), d_o, got.size() * sizeof(int))
+                             .wait()),
+        "back");
+    int bad = 0;
+    for (int t = 0; t < n_tokens; ++t) if (got[(size_t) t] != want[(size_t) t]) ++bad;
+    std::printf("  %-34s %s (%d of %d differ)", name, bad ? "*** WRONG ***" : "matches", bad, n_tokens);
+    if (bad) std::printf("   first: want %d got %d", want[0], got[0]);
+    std::printf("\n");
+    sycl::free(d_l, dpct::get_in_order_queue());
+    sycl::free(d_o, dpct::get_in_order_queue());
+    if (d_h) sycl::free(d_h, dpct::get_in_order_queue());
+    return bad;
+}
+
+// The Philox draw, host side - a transcription of the kernel's `philox_uniform` so the SAMPLED pick (not
+// just the greedy argmax) can be pinned against a reference.  `__umulhi(a, b)` is the high half of a 32x32
+// multiply, spelled `(uint32_t)(((uint64_t) a * b) >> 32)` here.
+struct PhiloxRound {
+    uint32_t& c0; uint32_t& c1; uint32_t& c2; uint32_t& c3;
+    void step(uint32_t k0, uint32_t k1) const {
+        const uint32_t hi0 = (uint32_t) (((uint64_t) 0x9E3779B9u * c0) >> 32);
+        const uint32_t hi1 = (uint32_t) (((uint64_t) 0xBB67AE85u * c2) >> 32);
+        const uint32_t lo0 = 0x9E3779B9u * c0;
+        const uint32_t lo1 = 0xBB67AE85u * c2;
+        const uint32_t n0 = hi1 ^ c1 ^ k0;
+        const uint32_t n1 = lo1;
+        const uint32_t n2 = hi0 ^ c3 ^ k1;
+        const uint32_t n3 = lo0;
+        c0 = n0; c1 = n1; c2 = n2; c3 = n3;
+    }
+};
+
+float host_philox_uniform(uint64_t seed, uint64_t counter) {
+    uint32_t c0 = (uint32_t) counter, c1 = (uint32_t) (counter >> 32);
+    uint32_t c2 = (uint32_t) seed, c3 = (uint32_t) (seed >> 32);
+    PhiloxRound r{c0, c1, c2, c3};
+    for (int i = 0; i < 10; ++i) r.step((uint32_t) i, 0u);
+    return (float) (c0 >> 8) * (1.0f / 16777216.0f);
+}
+
+// The full SAMPLED chain, host side - the kernel's `sampler_kernel` in serial form, in llama.cpp's order:
+// penalties on the raw logits during the top_k selection (ties to the lowest index), top_p's cut in double over
+// the top_k list, the min_p prefix cut on its survivors, the temperature, and one Philox draw at
+// (seed, counter + row).  One penalties stage (issue #53: this reference used to repeat the kernel's second one).
+int sampled_reference(const std::vector<float>& l, const std::vector<int>& hist,
+                      const strata::kernels::SamplerParams& p, int row) {
+    auto penal = [&](float logit, int count) {
+        if (count <= 0) return logit;
+        if (logit <= 0.0f) logit *= p.penalty_repeat; else logit /= p.penalty_repeat;
+        logit -= (float) count * p.penalty_freq + (count > 0 ? 1.0f : 0.0f) * p.penalty_present;
+        return logit;
+    };
+    auto count = [&](int v) { int c = 0; for (int h : hist) if (h == v) ++c; return c; };
+    const int nv = (int) l.size();
+    const int KMAX = 64;                       // 1..64 as given; 0 (off) and wider keep the widest list, 64
+    const int k = std::min(nv, (p.top_k > 0 && p.top_k < KMAX) ? p.top_k : KMAX);
+    std::vector<int> sel_ids;
+    std::vector<float> sel_logit;
+    std::vector<char> taken((size_t) nv, 0);
+    for (int i = 0; i < k; ++i) {
+        int best = -1; float bv = 0;
+        for (int v = 0; v < nv; ++v) {
+            if (taken[(size_t) v]) continue;
+            const float s = penal(l[(size_t) v], count(v));
+            if (best < 0 || s > bv) { best = v; bv = s; }
+        }
+        taken[(size_t) best] = 1;
+        sel_ids.push_back(best); sel_logit.push_back(bv);
+    }
+    // llama.cpp's order (issue #53): top_p over the whole top_k list, then min_p on its survivors
+    const int n_sel = (int) sel_ids.size();
+    int n_keep = n_sel;
+    if (p.top_p < 1.0f) {
+        double sum = 0.0;
+        for (int i = 0; i < n_sel; ++i) sum += std::exp((double) sel_logit[(size_t) i] - (double) sel_logit[0]);
+        double cum = 0.0;
+        int cut = n_sel;
+        for (int i = 0; i < n_sel; ++i) {
+            cum += std::exp((double) sel_logit[(size_t) i] - (double) sel_logit[0]) / sum;
+            if (cum >= (double) p.top_p) { cut = i + 1; break; }
+        }
+        if (cut < p.min_keep) cut = p.min_keep < n_sel ? p.min_keep : n_sel;
+        n_keep = cut;
+    }
+    if (p.min_p > 0.0f) {
+        const float thresh = sel_logit[0] + std::log(p.min_p);
+        for (int i = 0; i < n_keep; ++i)
+            if (sel_logit[(size_t) i] < thresh) { n_keep = i; break; }
+    }
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+    auto scaled = [&](int i) { return sel_logit[(size_t) i] * inv_t; };   // one penalties stage, before (#53)
+    float smx = scaled(0);
+    for (int i = 1; i < n_keep; ++i) smx = std::fmax(smx, scaled(i));
+    double sum = 0.0;
+    for (int i = 0; i < n_keep; ++i) sum += std::exp((double) scaled(i) - (double) smx);
+    const float u = host_philox_uniform(p.seed, p.counter + (uint64_t) row);
+    double cum = 0.0;
+    int pick = sel_ids[(size_t) (n_keep - 1)];
+    for (int i = 0; i < n_keep; ++i) {
+        cum += std::exp((double) scaled(i) - (double) smx) / sum;
+        if ((double) u < cum) { pick = sel_ids[(size_t) i]; break; }
+    }
+    return pick;
+}
+
+// Survivors after the min_p + top_p cuts, in the sampled chain - the quantity an order or a threshold
+// actually changes, used to assert a fixture can SEE the feature before asserting the kernel matches.
+int sampled_cut(const std::vector<float>& l, const std::vector<int>& hist, const strata::kernels::SamplerParams& p) {
+    auto penal = [&](float logit, int count) {
+        if (count <= 0) return logit;
+        if (logit <= 0.0f) logit *= p.penalty_repeat; else logit /= p.penalty_repeat;
+        logit -= (float) count * p.penalty_freq + (count > 0 ? 1.0f : 0.0f) * p.penalty_present;
+        return logit;
+    };
+    auto count = [&](int v) { int c = 0; for (int h : hist) if (h == v) ++c; return c; };
+    const int nv = (int) l.size();
+    const int KMAX = 64;
+    const int k = std::min(nv, (p.top_k > 0 && p.top_k < KMAX) ? p.top_k : KMAX);
+    std::vector<float> sel;
+    std::vector<char> taken((size_t) nv, 0);
+    for (int i = 0; i < k; ++i) {
+        int best = -1; float bv = 0;
+        for (int v = 0; v < nv; ++v) {
+            if (taken[(size_t) v]) continue;
+            const float s = penal(l[(size_t) v], count(v));
+            if (best < 0 || s > bv) { best = v; bv = s; }
+        }
+        taken[(size_t) best] = 1; sel.push_back(bv);
+    }
+    int n_minp = (int) sel.size();
+    if (p.min_p > 0.0f) {
+        const float thresh = sel[0] + std::log(p.min_p);
+        for (int i = 0; i < (int) sel.size(); ++i)
+            if (sel[(size_t) i] < thresh) { n_minp = i; break; }
+    }
+    if (p.top_p >= 1.0f) return n_minp;
+    double sum = 0.0;
+    for (int i = 0; i < n_minp; ++i) sum += std::exp((double) sel[(size_t) i] - (double) sel[0]);
+    double cum = 0.0;
+    int cut = n_minp;
+    for (int i = 0; i < n_minp; ++i) {
+        cum += std::exp((double) sel[(size_t) i] - (double) sel[0]) / sum;
+        if (cum >= (double) p.top_p) { cut = i + 1; break; }
+    }
+    if (cut < p.min_keep) cut = p.min_keep < n_minp ? p.min_keep : n_minp;
+    return cut;
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: sampler_parity [--selftest]\n"); return 2; }
+    }
+    int bad = 0;
+    const int NV = 512, NT = 4;
+
+    // ---- fixture 1: plain greedy.  top_k = 0 (disabled), top_p = 1 (disabled), T = 1 -> argmax.
+    {
+        strata::kernels::SamplerParams p; p.top_k = 0; p.top_p = 1.0f; p.temperature = 1.0f; p.greedy = true;
+        std::mt19937 rng(3); std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> l((size_t) NV * NT);
+        for (auto& v : l) v = g(rng);
+        std::vector<int> want((size_t) NT);
+        for (int t = 0; t < NT; ++t) want[(size_t) t] = reference_pick({l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV}, p, false);
+        bad += run("greedy argmax", l, NT, p, want);
+    }
+
+    // ---- fixture 2: THE ORDER FIXTURE.  T = 0.5 sharpens the distribution enough that top_p = 0.5 cuts
+    // differently before and after the scaling, and the two orders then pick DIFFERENT tokens.
+    {
+        strata::kernels::SamplerParams p; p.top_k = 0; p.top_p = 0.5f; p.temperature = 0.5f;
+        p.min_keep = 1; p.greedy = true;
+        std::vector<float> l((size_t) NV * NT, -1000.0f);
+        for (int t = 0; t < NT; ++t) {
+            // a flat-ish head so the cumulative mass crosses 0.5 inside it, and one clear leader
+            l[(size_t) t * NV + 0] = 3.0f;
+            for (int v = 1; v < 8; ++v) l[(size_t) t * NV + v] = 2.6f - 0.05f * (float) v;
+        }
+        std::vector<int> want((size_t) NT), other((size_t) NT);
+        for (int t = 0; t < NT; ++t) {
+            const std::vector<float> row(l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV);
+            want[(size_t) t] = reference_pick(row, p, false);      // the SPECIFIED order
+            other[(size_t) t] = reference_pick(row, p, true);      // temperature first
+        }
+        // If the two orders agree on this fixture the test cannot see the order, and saying "the kernel
+        // matches the spec" would be vacuous.
+        // GREEDY CANNOT SEE THE ORDER, and saying otherwise would be a vacuous check: no filter removes the
+        // global argmax, and temperature is monotonic, so the greedy pick is order-independent by
+        // construction.  What the order changes is the top_p CUT, so the fixture is asserted to be
+        // order-SENSITIVE at the cut, which is a property of the fixture rather than of the kernel.
+        int cut_spec = 0, cut_alt = 0;
+        for (int t = 0; t < NT; ++t) {
+            const std::vector<float> row(l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV);
+            cut_spec += reference_cut(row, p, false);
+            cut_alt += reference_cut(row, p, true);
+        }
+        const bool distinguishable = (cut_spec != cut_alt);
+        std::printf("  %-34s %s (survivors: spec %d, temp-first %d)\n", "order is observable on this fixture",
+                    distinguishable ? "yes" : "*** NO - THE FIXTURE CANNOT SEE THE ORDER ***", cut_spec,
+                    cut_alt);
+        if (!distinguishable) ++bad;
+        // greedy is still checked here, but as an ARGMAX check, not an order check
+        bad += run("greedy over this fixture", l, NT, p, want);
+    }
+
+    // ---- fixture 3: greedy consumes NO random number.  Two runs with different seeds must agree, or the
+    // seeded streams diverge between greedy and sampled runs - which docs/sampling.md §3 calls out.
+    {
+        strata::kernels::SamplerParams a; a.top_k = 20; a.top_p = 0.95f; a.temperature = 1.0f; a.greedy = true; a.seed = 1;
+        strata::kernels::SamplerParams b = a; b.seed = 999999;
+        std::mt19937 rng(5); std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> l((size_t) NV * NT);
+        for (auto& v : l) v = g(rng);
+        std::vector<int> wa((size_t) NT);
+        for (int t = 0; t < NT; ++t) wa[(size_t) t] = reference_pick({l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV}, a, false);
+        float* d_l = nullptr; int *d_a = nullptr, *d_b = nullptr;
+        check(DPCT_CHECK_ERROR(d_l = sycl::malloc_device<float>(
+                                   l.size(), dpct::get_in_order_queue())),
+              "m1");
+        check(DPCT_CHECK_ERROR(d_a = sycl::malloc_device<int>(
+                                   (size_t)NT, dpct::get_in_order_queue())),
+              "m2");
+        check(DPCT_CHECK_ERROR(d_b = sycl::malloc_device<int>(
+                                   (size_t)NT, dpct::get_in_order_queue())),
+              "m3");
+        /*
+        DPCT1114:505: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_l, l.data(), l.size() * sizeof(float))),
+              "c1");
+        strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, a, d_a, nullptr);
+        strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, b, d_b, nullptr);
+        std::vector<int> ga((size_t) NT), gb((size_t) NT);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(ga.data(), d_a, ga.size() * sizeof(int))
+                      .wait()),
+              "g1");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(gb.data(), d_b, gb.size() * sizeof(int))
+                      .wait()),
+              "g2");
+        int mismatch = 0, wrong = 0;
+        for (int t = 0; t < NT; ++t) {
+            if (ga[(size_t) t] != gb[(size_t) t]) ++mismatch;
+            if (ga[(size_t) t] != wa[(size_t) t]) ++wrong;
+        }
+        std::printf("  %-34s %s (seed-independent: %d differ; vs reference: %d wrong)\n",
+                    "greedy ignores the seed", (!mismatch && !wrong) ? "matches" : "*** WRONG ***", mismatch,
+                    wrong);
+        bad += mismatch + wrong;
+        sycl::free(d_l, dpct::get_in_order_queue());
+            sycl::free(d_a, dpct::get_in_order_queue());
+            sycl::free(d_b, dpct::get_in_order_queue());
+    }
+
+
+    // ---- fixture 4: PENALTIES.  Two sub-cases, each built so the rule it tests decides the answer.
+    {
+        // host reference for the penalty stage, transcribed from llama_sampler_penalties_apply
+        auto penal = [](float logit, int count, const strata::kernels::SamplerParams& p) {
+            if (count <= 0) return logit;
+            if (logit <= 0.0f) logit *= p.penalty_repeat; else logit /= p.penalty_repeat;
+            logit -= (float) count * p.penalty_freq + (count > 0 ? 1.0f : 0.0f) * p.penalty_present;
+            return logit;
+        };
+        auto pick = [&](const std::vector<float>& l, const std::vector<int>& hist,
+                        const strata::kernels::SamplerParams& p, bool divide_unconditionally) {
+            int best = 0; float bv = 0; bool first = true;
+            for (int v = 0; v < (int) l.size(); ++v) {
+                int c = 0; for (int h : hist) if (h == v) ++c;
+                float s;
+                if (divide_unconditionally && c > 0) {
+                    s = l[(size_t) v] / p.penalty_repeat
+                        - (float) c * p.penalty_freq - (c > 0 ? 1.0f : 0.0f) * p.penalty_present;
+                } else {
+                    s = penal(l[(size_t) v], c, p);
+                }
+                if (first || s > bv) { bv = s; best = v; first = false; }
+            }
+            return best;
+        };
+
+        const int NV2 = 8, NT2 = 2;
+        strata::kernels::SamplerParams p; p.top_k = 0; p.top_p = 1.0f; p.temperature = 1.0f;
+        p.greedy = true; p.penalty_last_n = 4; p.penalty_repeat = 2.0f;
+
+        // A: ALL logits negative, so the multiply-or-divide rule decides the argmax
+        std::vector<float> la((size_t) NV2 * NT2, -8.0f);
+        for (int t = 0; t < NT2; ++t) {
+            la[(size_t) t * NV2 + 0] = -1.0f;      // in the history -> penalised
+            la[(size_t) t * NV2 + 1] = -1.2f;      // not penalised -> should win
+        }
+        std::vector<int> hist_a((size_t) NT2 * 4, -1);
+        for (int t = 0; t < NT2; ++t) hist_a[(size_t) t * 4 + 0] = 0;
+        std::vector<int> want_a((size_t) NT2), alt_a((size_t) NT2);
+        for (int t = 0; t < NT2; ++t) {
+            const std::vector<float> row(la.begin() + (size_t) t * NV2, la.begin() + (size_t) (t + 1) * NV2);
+            const std::vector<int> h(hist_a.begin() + (size_t) t * 4, hist_a.begin() + (size_t) (t + 1) * 4);
+            want_a[(size_t) t] = pick(row, h, p, false);
+            alt_a[(size_t) t] = pick(row, h, p, true);      // divide unconditionally
+        }
+        const bool A_visible = want_a[0] != alt_a[0];
+        std::printf("  %-34s %s (multiply-rule %d, divide-always %d)\n",
+                    "multiply-or-divide is observable", A_visible ? "yes" : "*** NO ***", want_a[0],
+                    alt_a[0]);
+        if (!A_visible) ++bad;
+        else bad += run("penalties: repeat on negatives", la, NT2, p, want_a, hist_a, 4);
+
+        // B: the PRESENCE penalty is a boolean, so two occurrences cost the same as one.  The runner's margin
+        // is inside the difference between one and two applications.
+        std::vector<float> lb((size_t) NV2 * NT2, -8.0f);
+        for (int t = 0; t < NT2; ++t) {
+            lb[(size_t) t * NV2 + 0] = 5.0f;       // seen twice -> penalised ONCE (presence) + freq*2
+            lb[(size_t) t * NV2 + 1] = 3.4f;       // unseen
+        }
+        std::vector<int> hist_b((size_t) NT2 * 4, -1);
+        for (int t = 0; t < NT2; ++t) {
+            hist_b[(size_t) t * 4 + 0] = 0;
+            hist_b[(size_t) t * 4 + 1] = 0;        // twice
+        }
+        strata::kernels::SamplerParams q = p; q.penalty_present = 1.5f; q.penalty_freq = 0.0f;
+        std::vector<int> want_b((size_t) NT2);
+        for (int t = 0; t < NT2; ++t) {
+            const std::vector<float> row(lb.begin() + (size_t) t * NV2, lb.begin() + (size_t) (t + 1) * NV2);
+            const std::vector<int> h(hist_b.begin() + (size_t) t * 4, hist_b.begin() + (size_t) (t + 1) * 4);
+            want_b[(size_t) t] = pick(row, h, q, false);
+        }
+        std::printf("  %-34s want token %d (with present=1.5, token 0 goes 5.0/2 - 1.5 = 1.0 vs token 1 at "
+                    "3.4)\n", "presence penalty is a boolean", want_b[0]);
+        bad += run("penalties: presence is boolean", lb, NT2, q, want_b, hist_b, 4);
+    }
+
+    // ---- fixture 5: TEMPERATURE 0 MUST STILL RETURN THE ARGMAX.  Regression test for a real bug.
+    //
+    // The greedy branch used to read `apply_penalties(l[v] * inv_t, ...)`.  `inv_t` is 0.0f whenever
+    // temperature <= 0, so at temperature 0 EVERY logit became 0.0f and the argmax returned index 0 - the
+    // sampler emitted token 0 forever, whatever the model predicted.  OpenAI clients send `temperature: 0`
+    // for greedy decoding, so this was reachable from any ordinary client.
+    //
+    // It survived because EVERY other greedy fixture in this file sets temperature = 1.0f, where inv_t = 1.0
+    // and the extra multiply is harmless.  The bug needs temperature <= 0 to appear, and no fixture used it.
+    // The fixture below makes token 0 the WORST token in every row, so returning 0 is unambiguously wrong.
+    {
+        const int NV3 = 512, NT3 = 4;
+        std::vector<float> l((size_t) NV3 * NT3, -5.0f);
+        std::vector<int> want((size_t) NT3);
+        for (int t = 0; t < NT3; ++t) {
+            const int best = 100 + t;                    // the argmax is never token 0
+            l[(size_t) t * NV3 + best] = 3.0f;
+            l[(size_t) t * NV3 + 0] = -9.0f;             // token 0 is the worst in the row
+            want[(size_t) t] = best;
+        }
+        strata::kernels::SamplerParams p0;
+        p0.top_k = 0; p0.top_p = 1.0f; p0.temperature = 0.0f; p0.greedy = false;
+        bad += run("T=0 greedy=false is the argmax", l, NT3, p0, want);
+
+        strata::kernels::SamplerParams p1 = p0; p1.greedy = true;
+        bad += run("T=0 greedy=true  is the argmax", l, NT3, p1, want);
+
+        strata::kernels::SamplerParams p2 = p0; p2.greedy = true; p2.temperature = 1.0f;
+        bad += run("T=1 greedy=true  is the argmax", l, NT3, p2, want);
+    }
+
+    // ---- fixture 6: PENALTIES IN THE SAMPLED CHAIN.  Fixture 4 pins the greedy (argmax) path; the sampled
+    // chain gets its own reference (the full chain with the host Philox) and its own observability check: with
+    // the penalties on, the history row's favourite must LOSE a pick it would win penalty-free.
+    {
+        const int NV2 = 8, NT2 = 2;
+        strata::kernels::SamplerParams p;
+        p.top_k = 5; p.top_p = 0.9f; p.temperature = 0.8f; p.seed = 9; p.counter = 0;
+        p.penalty_last_n = 4; p.penalty_repeat = 3.0f; p.penalty_freq = 0.2f; p.penalty_present = 0.6f;
+
+        std::vector<float> l((size_t) NV2 * NT2, -8.0f);
+        std::vector<int> hist((size_t) NT2 * 4, -1);
+        for (int t = 0; t < NT2; ++t) {
+            float* row = l.data() + (size_t) t * NV2;
+            row[0] = 9.0f; row[1] = 4.5f; row[2] = 4.4f; row[3] = 4.3f;   // token 0 leads clean (9 vs 4.5)
+            hist[(size_t) t * 4 + 0] = 0;                                  // and falls to 2.2/2.0 penalised
+            hist[(size_t) t * 4 + 1] = t == 1 ? 0 : -1;                    // (repeat 3, freq, presence)
+        }
+        std::vector<int> want((size_t) NT2), clean((size_t) NT2);
+        strata::kernels::SamplerParams clean_p = p;
+        clean_p.penalty_last_n = 0; clean_p.penalty_repeat = 1.0f;
+        clean_p.penalty_freq = 0.0f; clean_p.penalty_present = 0.0f;
+        for (int t = 0; t < NT2; ++t) {
+            const std::vector<float> row(l.begin() + (size_t) t * NV2, l.begin() + (size_t) (t + 1) * NV2);
+            const std::vector<int> h(hist.begin() + (size_t) t * 4, hist.begin() + (size_t) (t + 1) * 4);
+            want[(size_t) t] = sampled_reference(row, h, p, t);
+            clean[(size_t) t] = sampled_reference(row, h, clean_p, t);
+        }
+        const bool visible = want[0] != clean[0] || want[1] != clean[1];
+        std::printf("  %-34s %s (penalised picks %d/%d, clean %d/%d)\n",
+                    "sampled penalties are observable", visible ? "yes" : "*** NO ***", want[0], want[1],
+                    clean[0], clean[1]);
+        if (!visible) ++bad;
+        else bad += run("sampled chain: penalties + top_k/p", l, NT2, p, want, hist, 4);
+    }
+
+    // ---- fixture 7: MIN_P.  The cut is a PREFIX of the descending top_k list (logit >= max + log(min_p)),
+    // so the fixture asserts the survivor count moves with the threshold (the observability half) and that
+    // the kernel's pick equals the reference's through the full sampled chain (the correctness half).
+    {
+        const int NV3 = 8, NT3 = 2;
+        std::vector<float> l((size_t) NV3 * NT3, -8.0f);
+        for (int t = 0; t < NT3; ++t) {
+            float* row = l.data() + (size_t) t * NV3;
+            row[0] = 4.0f; row[1] = 3.5f; row[2] = 3.2f; row[3] = 3.1f;   // gaps keep the cut off the
+            row[4] = 2.0f;                                                // logf/rounding knife edge
+        }
+        strata::kernels::SamplerParams base;
+        base.top_k = 6; base.top_p = 1.0f; base.temperature = 0.9f; base.seed = 77;
+
+        int c0 = 0, c05 = 0, c09 = 0;
+        for (int t = 0; t < NT3; ++t) {
+            const std::vector<float> row(l.begin() + (size_t) t * NV3, l.begin() + (size_t) (t + 1) * NV3);
+            strata::kernels::SamplerParams q = base; q.min_p = 0.0f;
+            c0 += sampled_cut(row, {}, q);
+            q.min_p = 0.5f; c05 += sampled_cut(row, {}, q);
+            q.min_p = 0.9f; c09 += sampled_cut(row, {}, q);
+        }
+        const bool visible = c0 > c05 && c05 > c09 && c09 >= NT3;
+        std::printf("  %-34s %s (survivors: min_p 0 -> %d, 0.5 -> %d, 0.9 -> %d)\n",
+                    "min_p cut is observable", visible ? "yes" : "*** NO ***", c0, c05, c09);
+        if (!visible) ++bad;
+
+        for (float mp : {0.0f, 0.5f, 0.9f}) {
+            strata::kernels::SamplerParams q = base; q.min_p = mp;
+            std::vector<int> want((size_t) NT3);
+            for (int t = 0; t < NT3; ++t) {
+                const std::vector<float> row(l.begin() + (size_t) t * NV3, l.begin() + (size_t) (t + 1) * NV3);
+                want[(size_t) t] = sampled_reference(row, {}, q, t);
+            }
+            char name[64];
+            std::snprintf(name, sizeof name, "sampled chain: min_p=%.1f", (double) mp);
+            bad += run(name, l, NT3, q, want);
+        }
+    }
+
+    // ---- fixture 8: THE PENALTY WINDOW IS THE TAIL.  With an 8-entry history and penalty_last_n = 4, only
+    // the LAST four entries count: a token punished in the old half must come back to full strength, and one
+    // punished in the tail half stays down.  The reference counts the same tail; the observability check runs
+    // the reference once more WITHOUT the clamp (counting all 8) and requires the picks to differ.
+    {
+        const int NV4 = 8;
+        strata::kernels::SamplerParams p;
+        p.top_k = 0; p.top_p = 1.0f; p.temperature = 1.0f; p.greedy = true;
+        p.penalty_last_n = 4; p.penalty_repeat = 3.0f; p.penalty_freq = 0.3f; p.penalty_present = 0.5f;
+
+        std::vector<float> l((size_t) NV4, -8.0f);
+        l[0] = 6.0f; l[3] = 6.5f;                       // token 0 leads clean; token 3 is the tail offender
+        std::vector<int> hist = {0, 0, 0, 0, 3, 3, 3, 3};   // token 0 old (out), token 3 in the tail
+
+        auto pick_clamped = [&](bool clamp) {
+            int best = 0; float bv = 0; bool first = true;
+            for (int v = 0; v < NV4; ++v) {
+                int c = 0;
+                for (int i = 0; i < (clamp ? 4 : 8); ++i) if (hist[(size_t) (8 - (clamp ? 4 : 8) + i)] == v) ++c;
+                float logit = l[(size_t) v];
+                if (c > 0) { logit = logit <= 0.0f ? logit * p.penalty_repeat : logit / p.penalty_repeat;
+                             logit -= (float) c * p.penalty_freq + p.penalty_present; }
+                if (first || logit > bv) { bv = logit; best = v; first = false; }
+            }
+            return best;
+        };
+        const int want = pick_clamped(true), unclamped = pick_clamped(false);
+        const bool visible = want != unclamped;
+        std::printf("  %-34s %s (clamped pick %d, full-history pick %d)\n",
+                    "penalty window clamp is observable", visible ? "yes" : "*** NO ***", want, unclamped);
+        if (!visible) ++bad;
+        else bad += run("penalty window: tail only", {l.begin(), l.end()}, 1, p, {want}, hist, 8);
+    }
+
+    // ---- fixture 9: ONE PENALTIES STAGE (issue #53), against an independently computed distribution, not the
+    // reference above (which had copied the kernel's mistake).  Two tokens with equal logits, token 0 in the
+    // history, presence penalty 1.5, temperature 0.7: llama.cpp's chain gives token 0 the logit (0 - 1.5) / 0.7,
+    // P = 1 / (1 + exp(1.5 / 0.7)) = 0.1050; a second penalty after the temperature made it 0.0255.  Over 8,000
+    // draws the kernel's share of token 0 must be near 0.105 (4 sigma = 0.014), and its picks must equal the
+    // reference's draw for draw.
+    {
+        const int NT9 = 8000;
+        strata::kernels::SamplerParams p;
+        p.top_k = 2; p.top_p = 1.0f; p.min_p = 0.0f; p.temperature = 0.7f; p.seed = 53; p.counter = 0;
+        p.penalty_last_n = 1; p.penalty_repeat = 1.0f; p.penalty_freq = 0.0f; p.penalty_present = 1.5f;
+        std::vector<float> l((size_t) 2 * NT9, 0.0f);
+        std::vector<int> hist((size_t) NT9, 0);
+        std::vector<int> want((size_t) NT9);
+        int zeros = 0;
+        for (int t = 0; t < NT9; ++t) {
+            want[(size_t) t] = sampled_reference({0.0f, 0.0f}, {0}, p, t);
+            zeros += want[(size_t) t] == 0;
+        }
+        const double expect = 1.0 / (1.0 + std::exp(1.5 / 0.7)), share = (double) zeros / NT9;
+        const bool near = std::fabs(share - expect) < 0.014;
+        std::printf("  %-34s %s (token 0 drawn %.4f of %d, expected %.4f; twice-penalised would be 0.0255)\n",
+                    "one penalties stage (#53)", near ? "yes" : "*** NO ***", share, NT9, expect);
+        if (!near) ++bad;
+        bad += run("sampled chain: #53's example", l, NT9, p, want, hist, 1);
+    }
+
+    // ---- fixture 10: TOP_P BEFORE MIN_P (llama.cpp's order).  Probabilities 0.4 / 0.3 / 0.2 / 0.1, top_p 0.75,
+    // min_p 0.3 (keeps p >= 0.12): top_p over all four keeps three (0.4 + 0.3 < 0.75 <= 0.9) and min_p keeps them;
+    // min_p first would drop 0.1, renormalise, and top_p would then stop at two (0.444 + 0.333 >= 0.75).  So token
+    // 2 must be drawn sometimes - never in the old order - and every pick must equal the reference's.
+    {
+        const int NT10 = 256;
+        strata::kernels::SamplerParams p;
+        p.top_k = 4; p.top_p = 0.75f; p.min_p = 0.3f; p.temperature = 1.0f; p.seed = 10; p.counter = 0;
+        const float lp[4] = {std::log(0.4f), std::log(0.3f), std::log(0.2f), std::log(0.1f)};
+        std::vector<float> row = {lp[0], lp[1], lp[2], lp[3], -30.0f, -30.0f, -30.0f, -30.0f};
+        std::vector<float> l;
+        for (int t = 0; t < NT10; ++t) l.insert(l.end(), row.begin(), row.end());
+        std::vector<int> want((size_t) NT10);
+        int twos = 0;
+        for (int t = 0; t < NT10; ++t) {
+            want[(size_t) t] = sampled_reference(row, {}, p, t);
+            twos += want[(size_t) t] == 2;
+        }
+        std::printf("  %-34s %s (token 2 drawn %d of %d times)\n", "top_p before min_p is observable",
+                    twos > 0 ? "yes" : "*** NO ***", twos, NT10);
+        if (twos == 0) ++bad;
+        bad += run("sampled chain: top_p then min_p", l, NT10, p, want);
+    }
+
+    // ---- fixture 11: A STALE HISTORY WITH last_n = 0 IS INERT (PR #59).  A caller can hand over a history buffer
+    // from a previous penalised request while this request disables the penalties - the run must equal the
+    // no-history run in both kernels, and the bitmap the launch did not size must stay untouched.
+    {
+        std::mt19937 rng(11); std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> l((size_t) NV * NT);
+        for (auto& v : l) v = g(rng);
+        std::vector<int> hist((size_t) NT * 8, -1);
+        for (int t = 0; t < NT; ++t) hist[(size_t) t * 8] = 3;
+
+        strata::kernels::SamplerParams p;
+        p.top_k = 20; p.top_p = 0.95f; p.temperature = 0.8f; p.seed = 5;
+        std::vector<int> want((size_t) NT);
+        for (int t = 0; t < NT; ++t)
+            want[(size_t) t] = sampled_reference({l.begin() + (size_t) t * NV,
+                                                  l.begin() + (size_t) (t + 1) * NV}, {}, p, t);
+        bad += run("stale history, last_n=0 (sampled)", l, NT, p, want, hist, 8);
+
+        strata::kernels::SamplerParams gp = p; gp.greedy = true; gp.top_k = 0; gp.top_p = 1.0f;
+        std::vector<int> gwant((size_t) NT);
+        for (int t = 0; t < NT; ++t)
+            gwant[(size_t) t] = reference_pick({l.begin() + (size_t) t * NV,
+                                                l.begin() + (size_t) (t + 1) * NV}, gp, false);
+        bad += run("stale history, last_n=0 (greedy)", l, NT, gp, gwant, hist, 8);
+    }
+
+    // ---- fixture 12: ONE HISTORY PER ROW (engine 0.1.19).  A verify window samples T rows, and row t's pick
+    // follows the drafts 1..t: its penalties must count them.  The engine used to stage row 0 alone, so rows
+    // 1..T-1 read slots nobody wrote.  Here every row gets `penalty_rows`' history and is pinned against a
+    // per-row scalar reference; the fixture first asserts it can SEE the difference - with row 0's history
+    // copied to every row (the nearest well-defined stand-in for the old staging) some row must pick differently.
+    // Row t's own newest token (window[t]) is its favourite by a margin the presence penalty overturns.
+    {
+        auto greedy_pen = [](const std::vector<float>& l, const std::vector<int>& hist,
+                             const strata::kernels::SamplerParams& p) {
+            int best = 0; float bv = 0; bool first = true;
+            for (int v = 0; v < (int) l.size(); ++v) {
+                int c = 0; for (int h : hist) if (h == v) ++c;
+                float s = l[(size_t) v];
+                if (c > 0) {
+                    if (s <= 0.0f) s *= p.penalty_repeat; else s /= p.penalty_repeat;
+                    s -= (float) c * p.penalty_freq + p.penalty_present;
+                }
+                if (first || s > bv) { bv = s; best = v; first = false; }
+            }
+            return best;
+        };
+        std::mt19937 rng(12); std::normal_distribution<float> g(0.0f, 1.0f);
+        const int TAIL = 5000;                           // longer than the widest window below
+        std::vector<int32_t> tail((size_t) TAIL);
+        for (auto& v : tail) v = (int32_t) (rng() % NV);
+        int observable = 0, rows_checked = 0;
+        for (int T : {1, 2, 4, 8}) {
+            for (int H : {1, 64, 1024, 4096}) {
+                std::vector<int32_t> window((size_t) T);
+                for (int t = 0; t < T; ++t) window[(size_t) t] = (int32_t) (100 + 37 * t);   // distinct, in range
+                std::vector<int32_t> rows((size_t) T * H);
+                strata::kernels::penalty_rows(tail.data(), TAIL, window.data(), T, H, rows.data());
+                std::vector<float> l((size_t) T * NV);
+                for (auto& v : l) v = g(rng);
+                for (int t = 0; t < T; ++t) l[(size_t) t * NV + window[(size_t) t]] = 5.0f;
+                strata::kernels::SamplerParams gp;
+                gp.greedy = true; gp.temperature = 0.0f; gp.top_k = 0; gp.top_p = 1.0f;
+                gp.penalty_last_n = H; gp.penalty_present = 4.0f;
+                strata::kernels::SamplerParams sp2;
+                sp2.top_k = 20; sp2.top_p = 0.9f; sp2.temperature = 0.7f; sp2.seed = 1000 + (uint64_t) H;
+                sp2.counter = 77; sp2.penalty_last_n = H; sp2.penalty_present = 4.0f; sp2.penalty_repeat = 1.1f;
+                std::vector<int> gwant((size_t) T), swant((size_t) T), rows_int(rows.begin(), rows.end());
+                for (int t = 0; t < T; ++t) {
+                    const std::vector<float> lr(l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV);
+                    const std::vector<int> own(rows.begin() + (size_t) t * H, rows.begin() + (size_t) (t + 1) * H);
+                    const std::vector<int> row0(rows.begin(), rows.begin() + H);
+                    gwant[(size_t) t] = greedy_pen(lr, own, gp);
+                    swant[(size_t) t] = sampled_reference(lr, own, sp2, t);
+                    if (t > 0 && greedy_pen(lr, row0, gp) != gwant[(size_t) t]) ++observable;
+                    ++rows_checked;
+                }
+                char name[64];
+                std::snprintf(name, sizeof name, "per-row history T=%d H=%d greedy", T, H);
+                bad += run(name, l, T, gp, gwant, rows_int, H);
+                std::snprintf(name, sizeof name, "per-row history T=%d H=%d sampled", T, H);
+                bad += run(name, l, T, sp2, swant, rows_int, H);
+            }
+        }
+        std::printf("  %-34s %s (%d drafted rows pick differently with row 0's history, of %d rows)\n",
+                    "per-row histories are observable", observable > 0 ? "yes" : "*** NO ***", observable,
+                    rows_checked);
+        if (observable == 0) ++bad;
+    }
+
+    // ---- fixture 13: HISTORY IDS OUTSIDE THE VOCABULARY ARE IGNORED.  The bitmap is sized for n_vocab bits;
+    // an id >= n_vocab used to set a bit past its end (a shared-memory write out of bounds - compute-sanitizer
+    // memcheck reports it).  They can never be a candidate, so the result equals the reference without them.
+    {
+        std::mt19937 rng(13); std::normal_distribution<float> g(0.0f, 1.0f);
+        const int H = 16;
+        std::vector<float> l((size_t) NV * NT);
+        for (auto& v : l) v = g(rng);
+        std::vector<int> hist((size_t) NT * H, -1), valid_only((size_t) NT * H, -1);
+        const int junk[] = {NV, NV + 1000, 0x7fffffff, -5, 1 << 20};
+        for (int t = 0; t < NT; ++t) {
+            for (int j = 0; j < H; ++j) {
+                const bool bogus = j % 3 == 0;
+                const int v = bogus ? junk[(size_t) (j / 3) % 5] : (int) (rng() % NV);
+                hist[(size_t) t * H + j] = v;
+                if (!bogus) valid_only[(size_t) t * H + j] = v;
+            }
+            l[(size_t) t * NV + hist[(size_t) t * H + 1]] = 4.0f;     // a penalised favourite, so penalties matter
+        }
+        strata::kernels::SamplerParams gp;
+        gp.greedy = true; gp.temperature = 0.0f; gp.top_k = 0; gp.top_p = 1.0f;
+        gp.penalty_last_n = H; gp.penalty_present = 3.0f;
+        strata::kernels::SamplerParams sp2 = gp;
+        sp2.greedy = false; sp2.temperature = 0.8f; sp2.top_k = 20; sp2.top_p = 0.95f; sp2.seed = 13;
+        std::vector<int> gwant((size_t) NT), swant((size_t) NT);
+        for (int t = 0; t < NT; ++t) {
+            const std::vector<float> lr(l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV);
+            const std::vector<int> ok(valid_only.begin() + (size_t) t * H, valid_only.begin() + (size_t) (t + 1) * H);
+            {   // the greedy reference with the penalty (reference_pick has none)
+                int best = 0; float bv = 0; bool first = true;
+                for (int v = 0; v < NV; ++v) {
+                    int c = 0; for (int h : ok) if (h == v) ++c;
+                    float s = lr[(size_t) v];
+                    if (c > 0) { if (s <= 0.0f) s *= gp.penalty_repeat; else s /= gp.penalty_repeat; s -= gp.penalty_present; }
+                    if (first || s > bv) { bv = s; best = v; first = false; }
+                }
+                gwant[(size_t) t] = best;
+            }
+            swant[(size_t) t] = sampled_reference(lr, ok, sp2, t);
+        }
+        bad += run("out-of-vocab history ids (greedy)", l, NT, gp, gwant, hist, H);
+        bad += run("out-of-vocab history ids (sampled)", l, NT, sp2, swant, hist, H);
+    }
+
+    // ---- fixture 14: THE top_k CONTRACT.  1..64 as given; 0 ("off") and anything wider use the widest list the
+    // kernel keeps, 64 - and every row is written (the sampled kernel used to print an error for 0 and leave the
+    // row unwritten, which a verify window then read as a token; `run` pre-fills -1 so that fails here).
+    {
+        std::mt19937 rng(14); std::normal_distribution<float> g(0.0f, 1.0f);
+        std::vector<float> l((size_t) NV * NT);
+        for (auto& v : l) v = g(rng) * 0.3f;             // flat: the 64-wide list matters to the draw
+        strata::kernels::SamplerParams p64;
+        p64.top_k = 64; p64.top_p = 1.0f; p64.temperature = 1.5f; p64.seed = 14;
+        std::vector<int> want((size_t) NT);
+        for (int t = 0; t < NT; ++t)
+            want[(size_t) t] = sampled_reference({l.begin() + (size_t) t * NV, l.begin() + (size_t) (t + 1) * NV},
+                                                 {}, p64, t);
+        bad += run("sampled top_k=64", l, NT, p64, want);
+        strata::kernels::SamplerParams p0 = p64; p0.top_k = 0;
+        bad += run("sampled top_k=0 means 64", l, NT, p0, want);
+        strata::kernels::SamplerParams p100 = p64; p100.top_k = 100;
+        bad += run("sampled top_k=100 means 64", l, NT, p100, want);
+        strata::kernels::SamplerParams pneg = p64; pneg.top_k = -3;
+        bad += run("sampled top_k=-3 means 64", l, NT, pneg, want);
+    }
+
+    // ---- fixture 15: `penalty_rows`, host only, against the plain definition: row t = the last h tokens of
+    // tail + window[0..t], -1 padded in front.  Covers a tail shorter than, equal to and longer than h, and row 0
+    // equal to the single row the engine staged before 0.1.19.
+    {
+        int wrong = 0, cases = 0;
+        for (int n_tail : {0, 1, 5, 63, 64, 65, 300}) {
+            for (int T : {1, 3, 8}) {
+                for (int h : {1, 4, 64, 100}) {
+                    std::vector<int32_t> tail((size_t) n_tail), window((size_t) T);
+                    for (int i = 0; i < n_tail; ++i) tail[(size_t) i] = 1000 + i;
+                    for (int i = 0; i < T; ++i) window[(size_t) i] = 5000 + i;
+                    std::vector<int32_t> rows((size_t) T * h, 12345);
+                    strata::kernels::penalty_rows(tail.data(), n_tail, window.data(), T, h, rows.data());
+                    for (int t = 0; t < T; ++t) {
+                        std::vector<int32_t> seq(tail);
+                        seq.insert(seq.end(), window.begin(), window.begin() + t + 1);
+                        std::vector<int32_t> expect((size_t) h, -1);
+                        const int take = (int) std::min<size_t>((size_t) h, seq.size());
+                        for (int j = 0; j < take; ++j) expect[(size_t) (h - take + j)] = seq[seq.size() - take + j];
+                        if (!std::equal(expect.begin(), expect.end(), rows.begin() + (size_t) t * h)) ++wrong;
+                        ++cases;
+                    }
+                    // row 0 = the old single-row staging: consumed tail, then the fed-back head last
+                    std::vector<int32_t> old((size_t) h, -1);
+                    const int take0 = (int) std::min<int64_t>(h, (int64_t) n_tail + 1);
+                    for (int j = 0; j < take0 - 1; ++j) old[(size_t) (h - take0 + j)] = tail[(size_t) (n_tail - (take0 - 1) + j)];
+                    old[(size_t) (h - 1)] = window[0];
+                    if (!std::equal(old.begin(), old.end(), rows.begin())) ++wrong;
+                    ++cases;
+                }
+            }
+        }
+        std::printf("  %-34s %s (%d of %d rows differ)\n", "penalty_rows layout", wrong ? "*** WRONG ***" : "matches",
+                    wrong, cases);
+        bad += wrong;
+    }
+
+    // A continuous stream and individual decode calls consume the same draw counters.
+    {
+        constexpr int count = 32, vocab = 16;
+        std::vector<float> uniform(count * vocab, 0.0f);
+        float* input = nullptr;
+        int* output = nullptr;
+        check(DPCT_CHECK_ERROR(input = sycl::malloc_device<float>(
+                                   uniform.size(), dpct::get_in_order_queue())),
+              "counter logits");
+        check(DPCT_CHECK_ERROR(output = sycl::malloc_device<int>(
+                                   count, dpct::get_in_order_queue())),
+              "counter output");
+        /*
+        DPCT1114:506: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  input, uniform.data(), uniform.size() * sizeof(float))),
+              "counter upload");
+        strata::kernels::SamplerParams p;
+        p.top_k = vocab; p.top_p = 1.0f; p.seed = 123; p.counter = (uint64_t(1) << 32) + 7;
+        strata::kernels::sample_tokens(input, count, vocab, nullptr, 0, p, output, nullptr);
+        std::vector<int> batch(count), singles(count), repeated(count);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(batch.data(), output, count * sizeof(int))
+                      .wait()),
+              "counter batch");
+        for (int i = 0; i < count; ++i) {
+            auto one = p; one.counter += i;
+            strata::kernels::sample_tokens(input, 1, vocab, nullptr, 0, one, output + i, nullptr);
+        }
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(singles.data(), output, count * sizeof(int))
+                      .wait()),
+              "counter singles");
+        strata::kernels::sample_tokens(input, count, vocab, nullptr, 0, p, output, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(repeated.data(), output, count * sizeof(int))
+                      .wait()),
+              "counter repeated");
+        bool varies = false;
+        for (int i = 1; i < count; ++i) varies |= batch[i] != batch[0];
+        const bool valid = batch == singles && batch == repeated && varies;
+        std::printf("  sampler draw counter segmentation/repeat: %s\n", valid ? "PASS" : "FAIL");
+        bad += !valid;
+        sycl::free(input, dpct::get_in_order_queue());
+            sycl::free(output, dpct::get_in_order_queue());
+    }
+
+    std::printf("\nsampler: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("sampler_parity OK\n");
+    return 0;
+}
diff --git a/sycl/src/kernels/shared_expert_parity.cpp b/sycl/src/kernels/shared_expert_parity.cpp
new file mode 100644
index 00000000000..45aeeb8fa04
--- /dev/null
+++ b/sycl/src/kernels/shared_expert_parity.cpp
@@ -0,0 +1,740 @@
+// src/kernels/shared_expert_parity.cpp - P2.S2's test for the shared expert.
+//
+// WHAT THIS CAN AND CANNOT CHECK TIGHTLY.  The weights are driven with FP16 activations because Q8_K is not
+// implemented, and the SwiGLU intermediate is converted to fp16 before the down projection - so the tolerance
+// here is set by that conversion (~1e-3) and NOT by the structure.  Round 193 measured the activation-format
+// choice at 0.6175% against the reference, which is the floor this test inherits and states.
+//
+// WHAT IT PINS DOWN TIGHTLY IS THE STRUCTURE, which is what `docs/semantics.md` records as having been believed
+// wrong for many rounds:
+//
+//   1. SILU ON GATE, not on up.  Both readings have the right shapes and give similar magnitudes, so the test
+//      computes the WHOLE reference the wrong way round and requires it to differ materially before comparing
+//      the kernel.  A test that only did the second half would pass against either reading.
+//   2. THE SCALAR GATE.  `ffn_gate_inp_shexp` is (n_embd,) and yields ONE value per token; the two rival
+//      readings are a per-dimension elementwise gate and a per-expert gate.  The elementwise reading is
+//      checked the same way - it is computed and required to differ.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/bf16_bits.hpp"
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/s_gemv.hpp"
+#include "strata/kernels/shared_expert.hpp"
+
+#include <cmath>
+#include <stdexcept>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+
+void check(dpct::err0 e, const char *what) {
+}
+
+// THE CONVERSIONS COME FROM `f16_bits.hpp`, and this test used to carry its own copies.  The private
+// `f16_to_f32` here flushed fp16 SUBNORMALS to zero (`if (ex == 0) out = sign`), so 0x0001 decoded as 0.0
+// instead of 2^-24; and the private encoder returned NaN for finite fp16 overflow.  Neither is visible with
+// an O(1) fixture, which is exactly what this file had.  Using the shared, oracle-validated pair means the
+// test and the kernel cannot disagree about the conversion itself.
+// using-declarations rather than renames at the call sites, so the body below is untouched by the swap.
+using strata::kernels::f16_from_f32;
+using strata::kernels::f32_from_f16;
+inline uint16_t f32_to_f16(float f) { return f16_from_f32(f); }
+inline float f16_to_f32(uint16_t h) { return f32_from_f16(h); }
+
+// The S2 decode used from the host: one code per element, group 64, bias -1.
+// Normalised L1 difference, used by the moe_combine checks.  (The shared-expert checks above report worst
+// RELATIVE error per output instead, because there the question is per-element accuracy; here it is whether a
+// whole rival READING is distinguishable, which is a vector-level question.)
+double rel_l1(const std::vector<float>& a, const std::vector<float>& b) {
+    double d = 0, m = 0;
+    for (size_t i = 0; i < a.size(); ++i) {
+        d += std::fabs((double) a[i] - (double) b[i]);
+        m += std::fabs((double) a[i]);
+    }
+    return d / (m > 1e-30 ? m : 1e-30);
+}
+
+/// `block_q8_0` on the host: 34 bytes per 32 elements, `fp16 d` then `int8 qs[32]`.  Written from the LAYOUT
+/// rather than from the kernel, so it can disagree with it.
+double q8_0_host(const std::vector<uint8_t>& x, long long i) {
+    const uint8_t* blk = x.data() + (size_t) (i / 32) * 34;
+    uint16_t db;
+    std::memcpy(&db, blk, 2);
+    const int8_t q = ((const int8_t*) (blk + 2))[i % 32];
+    return (double) strata::kernels::f32_from_f16(db) * (double) q;
+}
+
+float s2_weight(const std::vector<uint8_t>& codes, const std::vector<float>& scales, long long row,                long long n_in, long long i) {
+    const uint8_t byte = codes[(size_t) (row * (n_in / 4) + i / 4)];
+    const int code = (byte >> ((i % 4) * 2)) & 3;
+    return (float) (code - 1) * scales[(size_t) (row * (n_in / 64) + i / 64)];
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool selftest = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::string(argv[i]) == "--selftest") selftest = true;
+        else { std::fprintf(stderr, "usage: shared_expert_parity [--selftest]\n"); return 2; }
+    }
+
+    const long long n_embd = 256, n_ff = 64;      // small, so the host reference can be a plain loop
+    const int tpr = 32;
+    std::mt19937 rng(77);
+    std::normal_distribution<float> gauss(0.0f, 1.0f);
+
+    // POSITIVE activations, so the sign of each projection is set by the sign of its weights.
+    std::vector<float> fx((size_t) n_embd);
+    for (auto& v : fx) v = std::fabs(gauss(rng)) + 0.5f;
+    std::vector<uint16_t> hx((size_t) n_embd);
+    std::vector<uint8_t> hx0;   // filled below, once the Q8_0 image exists; the reference reads it
+    for (long long i = 0; i < n_embd; ++i) hx[(size_t) i] = f32_to_f16(fx[(size_t) i]);
+
+    // GATE CODES ALL 3 (+2d) AND UP CODES ALL 0 (-d): with positive scales and positive activations the gate
+    // projection is strongly POSITIVE and the up projection strongly NEGATIVE, which is the configuration where
+    // `silu(g)*u` and `silu(u)*g` differ by orders of magnitude rather than by percent.
+    std::vector<uint8_t> gc((size_t) n_ff * n_embd / 4, 0xFF), uc((size_t) n_ff * n_embd / 4, 0x00),
+        dc((size_t) n_embd * n_ff / 4);
+    for (auto& v : dc) v = (uint8_t) (rng() & 0xFF);
+    std::vector<float> gs((size_t) n_ff * (n_embd / 64)), us((size_t) n_ff * (n_embd / 64)),
+        ds((size_t) n_embd * (n_ff / 64));
+    // GATE/UP SCALES ARE 10x SMALLER THAN THE DOWN SCALES, and that asymmetry is load-bearing.
+    //
+    // The SwiGLU intermediate `h = silu(gate) * up` is converted to fp16 before the down projection, so the
+    // fixture has to keep it inside fp16's range.  At 0.2..0.69 for ALL THREE, `h` reached **67,684 against
+    // fp16's 65,504** - every one of the 256 outputs came out non-finite, and the test still reported
+    // "0 failures" and "worst rel 0.000e+00" (see the note on the metric below).  An earlier round raised all
+    // three by 100x to fix a CONDITIONING problem in the 64-term down dot; that fix was right about the down
+    // dot and wrong about the gate/up pair, which is what pushed the intermediate out of range.
+    //
+    // Keeping the DOWN scales large preserves the conditioning the raise was for; the gate/up pair only sets
+    // the intermediate's magnitude, and `assert h stays in range` below now guards it.
+    auto fill_gu = [&](std::vector<float>& v) { for (auto& s : v) s = 0.02f + 0.001f * (float) (rng() % 50); };
+    auto fill_d = [&](std::vector<float>& v) { for (auto& s : v) s = 0.2f + 0.01f * (float) (rng() % 50); };
+    fill_gu(gs);
+    fill_gu(us);
+    fill_d(ds);
+    std::vector<float> ginp((size_t) n_embd);
+    for (auto& v : ginp) v = gauss(rng) * 0.05f;
+
+    // THE SCALAR GATE'S TWO OPERANDS ARE BF16, because `ffn_gate_inp_shexp` is a BF16 weight and ggml converts
+    // the activation to the weight's `vec_dot_type`.  The reference therefore dots the bf16 IMAGES of both, not
+    // the originals - and the kernel is handed the same bf16 images.  Rounding both here rather than only on
+    // the device is what keeps the comparison honest: rounding one side alone would show up as a fixed offset
+    // in the gate and be blamed on the kernel.
+    std::vector<uint16_t> hx_bf16((size_t) n_embd), hginp_bf16((size_t) n_embd);
+    for (long long i = 0; i < n_embd; ++i) {
+        hx_bf16[(size_t) i] = strata::kernels::bf16_from_f32(fx[(size_t) i]);
+        hginp_bf16[(size_t) i] = strata::kernels::bf16_from_f32(ginp[(size_t) i]);
+    }
+
+    // ---- host reference, exactly as ref/moe.py writes it
+    auto reference = [&](bool silu_on_up, bool elementwise_gate) {
+        std::vector<float> gp((size_t) n_ff, 0.0f), upp((size_t) n_ff, 0.0f);
+        for (long long r = 0; r < n_ff; ++r) {
+            double a = 0, b = 0;
+            for (long long i = 0; i < n_embd; ++i) {
+                const double xv = q8_0_host(hx0, i);
+                a += xv * (double) s2_weight(gc, gs, r, n_embd, i);
+                b += xv * (double) s2_weight(uc, us, r, n_embd, i);
+            }
+            gp[(size_t) r] = (float) a;
+            upp[(size_t) r] = (float) b;
+        }
+        std::vector<float> h((size_t) n_ff);
+        for (long long r = 0; r < n_ff; ++r) {
+            const double gv = silu_on_up ? upp[(size_t) r] : gp[(size_t) r];
+            const double other = silu_on_up ? gp[(size_t) r] : upp[(size_t) r];
+            h[(size_t) r] = (float) (gv / (1.0 + std::exp(-gv))) * (float) other;
+        }
+        // THE INTERMEDIATE IS QUANTIZED TO Q8_0, which is what the DOWN weight's contract asks for and what the
+        // kernel now does.  ggml's `quantize_row_q8_0`: `d = amax / 127`, `q = round(x / d)`, value `q * d`.
+        // Written out here rather than reused, so that it CAN disagree with the kernel.
+        std::vector<float> h16((size_t) n_ff);
+        for (long long b = 0; b < n_ff; b += 32) {
+            const long long e = (b + 32 < n_ff) ? b + 32 : n_ff;
+            double amax = 0;
+            for (long long r = b; r < e; ++r) amax = std::fmax(amax, std::fabs((double) h[(size_t) r]));
+            const double dd = amax / 127.0;
+            const double id = dd > 0 ? 1.0 / dd : 0.0;
+            for (long long r = b; r < e; ++r) {
+                double q = std::round((double) h[(size_t) r] * id);
+                q = std::fmax(-127.0, std::fmin(127.0, q));
+                h16[(size_t) r] = (float) (q * dd);
+            }
+        }
+        std::vector<float> out((size_t) n_embd, 0.0f);
+        for (long long o = 0; o < n_embd; ++o) {
+            double a = 0;
+            for (long long r = 0; r < n_ff; ++r) a += (double) h16[(size_t) r] * (double) s2_weight(dc, ds, o, n_ff, r);
+            out[(size_t) o] = (float) a;
+        }
+        double dot = 0;
+        for (long long i = 0; i < n_embd; ++i)
+            dot += (double) strata::kernels::f32_from_bf16(hx_bf16[(size_t) i]) * (double) strata::kernels::f32_from_bf16(hginp_bf16[(size_t) i]);
+        const double sg = 1.0 / (1.0 + std::exp(-dot));
+        for (long long o = 0; o < n_embd; ++o) {
+            out[(size_t) o] = elementwise_gate ? (float) ((double) out[(size_t) o] * sg)
+                                               : (float) ((double) out[(size_t) o] * sg);
+        }
+        return out;
+    };
+
+    // ---- device side
+    uint16_t* d_x = nullptr;
+    uint8_t* d_x_used = nullptr;   // the Q8_0 image the kernel now takes
+    uint16_t *d_xb = nullptr, *d_ginpb = nullptr;
+    uint8_t *d_gc = nullptr, *d_uc = nullptr, *d_dc = nullptr;
+    float *d_gs = nullptr, *d_us = nullptr, *d_ds = nullptr, *d_ginp = nullptr, *d_out = nullptr;
+    check(DPCT_CHECK_ERROR(d_x = sycl::malloc_device<uint16_t>(
+                               hx.size(), dpct::get_in_order_queue())),
+          "m x");
+    check(DPCT_CHECK_ERROR(d_gc = (uint8_t *)sycl::malloc_device(
+                               gc.size(), dpct::get_in_order_queue())),
+          "m gc");
+    check(DPCT_CHECK_ERROR(d_uc = (uint8_t *)sycl::malloc_device(
+                               uc.size(), dpct::get_in_order_queue())),
+          "m uc");
+    check(DPCT_CHECK_ERROR(d_dc = (uint8_t *)sycl::malloc_device(
+                               dc.size(), dpct::get_in_order_queue())),
+          "m dc");
+    check(DPCT_CHECK_ERROR(d_gs = sycl::malloc_device<float>(
+                               gs.size(), dpct::get_in_order_queue())),
+          "m gs");
+    check(DPCT_CHECK_ERROR(d_us = sycl::malloc_device<float>(
+                               us.size(), dpct::get_in_order_queue())),
+          "m us");
+    check(DPCT_CHECK_ERROR(d_ds = sycl::malloc_device<float>(
+                               ds.size(), dpct::get_in_order_queue())),
+          "m ds");
+    check(DPCT_CHECK_ERROR(d_ginp = sycl::malloc_device<float>(
+                               ginp.size(), dpct::get_in_order_queue())),
+          "m ginp");
+    check(DPCT_CHECK_ERROR(d_xb = sycl::malloc_device<uint16_t>(
+                               hx_bf16.size(), dpct::get_in_order_queue())),
+          "m xb");
+    check(DPCT_CHECK_ERROR(d_ginpb = sycl::malloc_device<uint16_t>(
+                               hginp_bf16.size(), dpct::get_in_order_queue())),
+          "m ginpb");
+    check(DPCT_CHECK_ERROR(d_out = sycl::malloc_device<float>(
+                               (size_t)n_embd, dpct::get_in_order_queue())),
+          "m out");
+    /*
+    DPCT1114:334: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+          "c x");
+    /*
+    DPCT1114:335: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue().memcpy(d_gc, gc.data(), gc.size())),
+          "c gc");
+    /*
+    DPCT1114:336: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue().memcpy(d_uc, uc.data(), uc.size())),
+          "c uc");
+    /*
+    DPCT1114:337: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue().memcpy(d_dc, dc.data(), dc.size())),
+          "c dc");
+    /*
+    DPCT1114:338: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_gs, gs.data(), gs.size() * sizeof(float))),
+          "c gs");
+    /*
+    DPCT1114:339: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_us, us.data(), us.size() * sizeof(float))),
+          "c us");
+    /*
+    DPCT1114:340: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_ds, ds.data(), ds.size() * sizeof(float))),
+          "c ds");
+    /*
+    DPCT1114:341: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_ginp, ginp.data(), ginp.size() * sizeof(float))),
+          "c ginp");
+    /*
+    DPCT1114:342: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t))),
+          "c xb");
+    /*
+    DPCT1114:343: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            d_ginpb, hginp_bf16.data(), hginp_bf16.size() * sizeof(uint16_t))),
+        "c ginpb");
+
+    const strata::kernels::SForm f{2, -1, 64, strata::kernels::Codebook::Affine, false, /*act_kind=*/0};
+    // **THE ACTIVATION IS Q8_0, NOT FP16, AND THE FIXTURE HAS TO MATCH THE CONTRACT.**  The kernel used to take
+    // an fp16 activation for all three projections, which was simply the wrong `vec_dot_type` - and the
+    // reference here computed with the fp16 values, so the two agreed on a number the reference model would not
+    // produce.  A fixture that agrees with the kernel about the wrong activation is not a check.
+    hx0.assign((size_t) (n_embd / 32) * 34, 0);
+    {
+        float* d_xf = nullptr;
+        uint8_t* d_x0 = nullptr;
+        check(DPCT_CHECK_ERROR(
+                  d_xf = (float *)sycl::malloc_device(
+                      (size_t)n_embd * 4, dpct::get_in_order_queue())),
+              "xf");
+        check(DPCT_CHECK_ERROR(d_x0 = (uint8_t *)sycl::malloc_device(
+                                   hx0.size(), dpct::get_in_order_queue())),
+              "x0");
+        /*
+        DPCT1114:344: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_xf, fx.data(), (size_t)n_embd * 4)),
+              "cxf");
+        strata::kernels::quantize_q8_0(d_xf, d_x0, n_embd, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(hx0.data(), d_x0, hx0.size())
+                                   .wait()),
+              "cx0");
+        d_x_used = d_x0;
+        sycl::free(d_xf, dpct::get_in_order_queue());
+    }
+    // THE SCRATCH IS THE CALLER'S NOW.  It used to be four `cudaMalloc`s inside the kernel - illegal during
+    // stream capture AND a token-path allocation that P2.T10 forbids.  The fixture owns it here, exactly as the
+    // layer does, so the test exercises the real contract instead of a private one.
+    float* d_scratch = nullptr;
+    check(
+        DPCT_CHECK_ERROR(d_scratch = (float *)sycl::malloc_device(
+                             strata::kernels::shared_expert_scratch_bytes(n_ff),
+                             dpct::get_in_order_queue())),
+        "m scratch");
+    strata::kernels::shared_expert(d_x_used, nullptr, d_xb, f, d_gc, d_gs, nullptr, f, d_uc, d_us, nullptr, f,
+                                   d_dc, d_ds, nullptr, d_ginpb, d_scratch, d_out, n_embd, n_ff, tpr, nullptr);
+    std::vector<float> got((size_t) n_embd);
+    check(DPCT_CHECK_ERROR(
+              dpct::get_in_order_queue()
+                  .memcpy(got.data(), d_out, got.size() * sizeof(float))
+                  .wait()),
+          "c out");
+
+    int bad = 0;
+    const std::vector<float> want = reference(false, false);
+    const std::vector<float> wrong_silu = reference(true, false);
+
+    // ---- the trap, asserted observable BEFORE the kernel is judged
+    double d_wrong = 0, mag = 0;
+    for (long long o = 0; o < n_embd; ++o) {
+        d_wrong += std::fabs((double) want[(size_t) o] - (double) wrong_silu[(size_t) o]);
+        mag += std::fabs((double) want[(size_t) o]);
+    }
+    const double rel_wrong = d_wrong / (mag > 1e-30 ? mag : 1e-30);
+    std::printf("  %-40s %s (%.2f%% apart)\n", "silu-on-gate vs silu-on-up is observable",
+                rel_wrong > 0.5 ? "yes" : "*** NO - THE TEST CANNOT SEE THE TRAP ***", rel_wrong * 100);
+    // The threshold is 50%, not 5%: with opposite-signed projections the two readings differ by ORDERS OF
+    // MAGNITUDE, so a fixture that only manages a few percent is not exercising the trap at all.
+    //
+    // **WRITTEN `!(x > floor)` AND NOT `x <= floor`.**  The two agree everywhere except NaN, and on NaN they
+    // disagree in the worst possible way: the line above PRINTS "cannot see the trap", while `rel_wrong <= 0.5`
+    // is FALSE for NaN and therefore counted no failure.  The test reported "0 failures" with a NaN fixture -
+    // a test that lies about the one thing it exists to check.  A comparison written `x <= t` is a check that
+    // NaN silently passes, and this project writes them by habit.
+    if (!(rel_wrong > 0.5)) ++bad;
+
+    // ---- the kernel against the correct reference
+    double worst = 0, sum = 0;
+    long long nonfinite = 0;
+    for (long long o = 0; o < n_embd; ++o) {
+        const double a = want[(size_t) o], b = got[(size_t) o];
+        sum += std::fabs(a);
+        if (!std::isfinite(a) || !std::isfinite(b)) ++nonfinite;
+        const double rel = std::fabs(a - b) / (std::fabs(a) > 1e-30 ? std::fabs(a) : 1e-30);
+        // `!(rel <= worst)` rather than `rel > worst`: with NaN, `rel > worst` never fires, `worst` stays at
+        // its initial 0, and the summary line reports **worst rel 0.000e+00** for a fixture that is entirely
+        // NaN.  That is how this check reported a clean pass while computing nothing.
+        if (!(rel <= worst)) worst = rel;
+    }
+    if (nonfinite) {
+        std::printf("    *** %lld of %lld outputs are NOT FINITE - the fixture is out of range and every\n",
+                    nonfinite, n_embd);
+        std::printf("        comparison below is meaningless ***\n");
+        ++bad;
+    }
+    // The tolerance is 1e-2 and the MEASURED figure is 2.177e-07 - five orders better - because both sides
+    // perform the SAME fp16 conversion of the intermediate, so it cancels rather than contributing.  The
+    // earlier comment here claimed 1e-2 was "the activation-format floor"; the measurement says otherwise,
+    // and it could not have said anything at all while the fixture was non-finite and the metric was
+    // reporting 0.000e+00 for it.
+    //
+    // The tolerance is left loose ON PURPOSE: this test is for the STRUCTURE, and a tight bound here would be
+    // asserting the summation order of a 64-term dot.  The number that matters is printed next to it.
+    std::printf("  %-40s worst rel %.3e over %lld outputs (mean |ref| %.4f)\n", "structure vs reference",
+                worst, n_embd, sum / (double) n_embd);
+    if (!(worst <= 1e-2)) {
+        std::printf("    *** over 1e-2 - that is beyond the activation-format floor, so it is structural ***\n");
+        ++bad;
+    }
+
+    // ---- THE FIXTURE MUST STAY INSIDE FP16, because that is the domain the kernel works in.
+    //
+    // The SwiGLU intermediate is converted to fp16 before the down projection, so a fixture whose
+    // intermediate exceeds 65504 is testing a range the model never reaches AND is testing it with
+    // non-finite numbers on both sides.  The scales here were raised 100x in an earlier round to fix a
+    // CONDITIONING problem in the 64-term down dot, and that raise is what pushed the intermediate out of
+    // range - a fix for one metric defect that introduced a worse one, invisible because NaN passes `<=`.
+    {
+        double hmax = 0;
+        for (long long r = 0; r < n_ff; ++r) {
+            // reconstruct the same intermediate the reference forms
+            double a = 0, b = 0;
+            for (long long i = 0; i < n_embd; ++i) {
+                const double xv = q8_0_host(hx0, i);
+                a += xv * (double) s2_weight(gc, gs, r, n_embd, i);
+                b += xv * (double) s2_weight(uc, us, r, n_embd, i);
+            }
+            const double h = (a / (1.0 + std::exp(-a))) * b;
+            hmax = std::fmax(hmax, std::fabs(h));
+        }
+        const bool in_range = hmax < 65504.0 && std::isfinite(hmax);
+        std::printf("  %-40s %s (max |h| %.1f, fp16 max 65504)\n", "the fixture's SwiGLU stays in fp16 range",
+                    in_range ? "yes" : "*** NO ***", hmax);
+        if (!in_range) ++bad;
+    }
+
+    // Isolate the BF16 scalar gate: keep the quantized expert inputs fixed and vary only its F32/BF16
+    // activation. A zero scalar weight first exposes half the ungated output without duplicating the GEMVs.
+    {
+        using namespace strata::kernels;
+        std::vector<uint16_t> zeros((size_t) n_embd, 0), basis(zeros);
+        basis[0] = bf16_from_f32(1.0f);
+        std::vector<float> witness((size_t) n_embd, 0.0f);
+        witness[0] = 1.00390625f;
+        std::vector<uint16_t> witness_bf16((size_t) n_embd, 0);
+        witness_bf16[0] = bf16_from_f32(witness[0]);
+        float* d_witness = nullptr;
+        check(DPCT_CHECK_ERROR(d_witness = sycl::malloc_device<float>(
+                                   witness.size(), dpct::get_in_order_queue())),
+              "native shared x");
+        /*
+        DPCT1114:345: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_witness, witness.data(), witness.size() * sizeof(float))),
+              "native shared upload x");
+        auto run = [&](void* stream, const float* x_float = nullptr) {
+            shared_expert(d_x_used, nullptr, d_xb, f, d_gc, d_gs, nullptr, f, d_uc, d_us, nullptr, f,
+                          d_dc, d_ds, nullptr, d_ginpb, d_scratch, d_out, n_embd, n_ff, tpr, stream, x_float);
+        };
+        /*
+        DPCT1114:346: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_ginpb, zeros.data(), zeros.size() * sizeof(uint16_t))),
+              "zero shared gate");
+        run(nullptr);
+        std::vector<float> half_output((size_t) n_embd), legacy((size_t) n_embd), native((size_t) n_embd), replay((size_t) n_embd);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(half_output.data(), d_out,
+                                           half_output.size() * sizeof(float))
+                                   .wait()),
+              "half shared output");
+        /*
+        DPCT1114:347: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_ginpb, basis.data(), basis.size() * sizeof(uint16_t))),
+              "basis shared gate");
+        /*
+        DPCT1114:348: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_xb, witness_bf16.data(),
+                  witness_bf16.size() * sizeof(uint16_t))),
+              "witness shared bf16");
+        run(nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(legacy.data(), d_out,
+                                           legacy.size() * sizeof(float))
+                                   .wait()),
+              "legacy witness output");
+        shared_expert_set_native_bf16(true);
+        bool refused_missing = false;
+        try { run(nullptr); } catch (const std::invalid_argument&) { refused_missing = true; }
+        if (!refused_missing) ++bad;
+        dpct::queue_ptr stream;
+        /*
+        DPCT1025:349: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        check(DPCT_CHECK_ERROR(
+                  stream = dpct::get_current_device().create_queue(true)),
+              "native shared stream");
+        run(stream, d_witness);
+        check(DPCT_CHECK_ERROR(stream->wait()), "native shared sync");
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(native.data(), d_out,
+                                           native.size() * sizeof(float))
+                                   .wait()),
+              "native witness output");
+        const float expected_gate = 1.0f / (1.0f + std::exp(-witness[0]));
+        double error = 0.0, magnitude = 0.0;
+        for (size_t i = 0; i < native.size(); ++i) {
+            const float expected = (half_output[i] * 2.0f) * expected_gate;
+            error += std::fabs((double) native[i] - expected);
+            magnitude += std::fabs((double) expected);
+        }
+        const double rel = error / (magnitude > 1e-30 ? magnitude : 1e-30);
+        const double visible = rel_l1(native, legacy);
+        const bool correct = std::isfinite(rel) && rel < 2e-6 && visible > 1e-5 && refused_missing;
+        std::printf("  native shared scalar gate: %s (ref rel %.3e, BF16 separation %.3e, missing input %s)\n",
+                    correct ? "pass" : "FAIL", rel, visible, refused_missing ? "refused" : "FAIL");
+        if (!correct) ++bad;
+        dpct::experimental::command_graph_ptr graph;
+        dpct::experimental::command_graph_exec_ptr executable;
+        check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+              "native shared capture");
+        run(stream, d_witness);
+        check(
+            DPCT_CHECK_ERROR(dpct::experimental::end_recording(stream, &graph)),
+            "native shared capture end");
+        check(
+            DPCT_CHECK_ERROR(
+                executable = new sycl::ext::oneapi::experimental::command_graph<
+                    sycl::ext::oneapi::experimental::graph_state::executable>(
+                    graph->finalize())),
+            "native shared graph instantiate");
+        shared_expert_set_native_bf16(false);
+        check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
+              "native shared graph replay");
+        check(DPCT_CHECK_ERROR(stream->wait()), "native shared graph sync");
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(replay.data(), d_out,
+                                           replay.size() * sizeof(float))
+                                   .wait()),
+              "native shared graph read");
+        const bool captured = std::memcmp(native.data(), replay.data(), native.size() * sizeof(float)) == 0;
+        std::printf("  native shared captured selection: %s\n", captured ? "byte-identical" : "FAIL");
+        if (!captured) ++bad;
+        check(DPCT_CHECK_ERROR(delete (executable)),
+              "native shared graph exec destroy");
+        check(DPCT_CHECK_ERROR(delete (graph)), "native shared graph destroy");
+        check(
+            DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+            "native shared stream destroy");
+        /*
+        DPCT1114:350: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_ginpb, hginp_bf16.data(),
+                  hginp_bf16.size() * sizeof(uint16_t))),
+              "restore shared gate");
+        /*
+        DPCT1114:351: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t))),
+              "restore shared bf16");
+        run(nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(replay.data(), d_out,
+                                           replay.size() * sizeof(float))
+                                   .wait()),
+              "restored shared output");
+        const bool restored = std::memcmp(got.data(), replay.data(), got.size() * sizeof(float)) == 0;
+        std::printf("  restored shared default: %s\n", restored ? "byte-identical" : "FAIL");
+        if (!restored) ++bad;
+        sycl::free(d_witness, dpct::get_in_order_queue());
+    }
+
+    // ================= moe_combine: the two readings it exists to pin =================
+    //
+    // `ref/moe.py` L156 is `routed + shared_expert(...)`, and the routed half is `out[t] += w[t,i] * g[0]`
+    // (L100).  Two rival readings both produce a plausible vector of the right shape:
+    //
+    //   A. the routed sum is UNWEIGHTED (a plain sum of the k expert outputs), and
+    //   B. the SHARED output is router-weighted like the routed ones.
+    //
+    // Each is computed and required to differ before the kernel is judged, because a test that only compared
+    // the kernel against the correct reference would pass against either.
+    {
+        const long long n_embd2 = 256, k2 = 10;
+        std::mt19937 rng2(31337);
+        std::normal_distribution<float> g2(0.0f, 1.0f);
+        std::vector<float> parts((size_t) (k2 * n_embd2)), w((size_t) k2), shared((size_t) n_embd2);
+        for (auto& v : parts) v = g2(rng2);
+        // Weights that genuinely VARY, and genuinely miss 1/k: with uniform weights the unweighted reading
+        // would coincide with the weighted one and the fixture could not see reading A.
+        double wsum = 0;
+        for (auto& v : w) { v = std::fabs(g2(rng2)) + 0.05f; wsum += v; }
+        for (auto& v : w) v = (float) (v / wsum);            // already renormalised, as router_top10 emits
+        for (auto& v : shared) v = g2(rng2) * 3.0f;
+
+        auto ref = [&](bool weight_routed, bool weight_shared) {
+            std::vector<float> y((size_t) n_embd2, 0.0f);
+            for (long long j = 0; j < n_embd2; ++j) {
+                double a = 0;
+                for (long long e = 0; e < k2; ++e)
+                    a += (weight_routed ? (double) w[(size_t) e] : 1.0) * (double) parts[(size_t) (e * n_embd2 + j)];
+                a += weight_shared ? (double) w[0] * (double) shared[(size_t) j] : (double) shared[(size_t) j];
+                y[(size_t) j] = (float) a;
+            }
+            return y;
+        };
+        const std::vector<float> want = ref(true, false);
+
+        float *d_p = nullptr, *d_w = nullptr, *d_s = nullptr, *d_y = nullptr;
+        check(
+            DPCT_CHECK_ERROR(d_p = (float *)sycl::malloc_device(
+                                 parts.size() * 4, dpct::get_in_order_queue())),
+            "mc p");
+        check(DPCT_CHECK_ERROR(d_w = (float *)sycl::malloc_device(
+                                   w.size() * 4, dpct::get_in_order_queue())),
+              "mc w");
+        check(DPCT_CHECK_ERROR(
+                  d_s = (float *)sycl::malloc_device(
+                      shared.size() * 4, dpct::get_in_order_queue())),
+              "mc s");
+        check(DPCT_CHECK_ERROR(
+                  d_y = (float *)sycl::malloc_device(
+                      (size_t)n_embd2 * 4, dpct::get_in_order_queue())),
+              "mc y");
+        /*
+        DPCT1114:352: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_p, parts.data(), parts.size() * 4)),
+              "mc cp");
+        /*
+        DPCT1114:353: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+                                                                 w.size() * 4)),
+              "mc cw");
+        /*
+        DPCT1114:354: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_s, shared.data(), shared.size() * 4)),
+              "mc cs");
+        strata::kernels::moe_combine(d_p, d_w, d_s, d_y, n_embd2, k2, nullptr);
+        std::vector<float> got((size_t) n_embd2);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_y, got.size() * 4)
+                                   .wait()),
+              "mc cy");
+
+        for (const auto& trap : {std::make_pair(false, false), std::make_pair(true, true)}) {
+            const std::vector<float> wrong = ref(trap.first, trap.second);
+            const double rel = rel_l1(want, wrong);
+            const char* what = (!trap.first && !trap.second) ? "routed sum left UNWEIGHTED is observable"
+                              : "shared output router-WEIGHTED is observable";
+            const bool visible = rel > 0.05;
+            std::printf("  %-42s %-4s (%.2f%% apart)\n", what, visible ? "yes" : "*** NO ***", rel * 100);
+            if (!visible) ++bad;
+        }
+
+        const double rel_k = rel_l1(want, got);
+        std::printf("  %-42s rel %.3e\n", "moe_combine vs reference", rel_k);
+        // Both sides accumulate in double over the same k terms, so this is order-only.
+        if (!(rel_k <= 1e-6)) { std::printf("    *** over 1e-6 ***\n"); ++bad; }
+
+        // a null `shared` must mean "no shared expert", not "add nothing but leave it undefined"
+        strata::kernels::moe_combine(d_p, d_w, nullptr, d_y, n_embd2, k2, nullptr);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), d_y, got.size() * 4)
+                                   .wait()),
+              "mc cy2");
+        const double rel_no_shared = rel_l1(want, got);
+        const bool differs = rel_no_shared > 0.05;
+        std::printf("  %-42s %s (%.2f%% apart - null shared really omits it)\n",
+                    "a null `shared` is observable", differs ? "yes" : "*** NO ***", rel_no_shared * 100);
+        if (!differs) ++bad;
+        sycl::free(d_p, dpct::get_in_order_queue());
+            sycl::free(d_w, dpct::get_in_order_queue());
+            sycl::free(d_s, dpct::get_in_order_queue());
+            sycl::free(d_y, dpct::get_in_order_queue());
+    }
+
+    std::printf("\nshared_expert: %d failures\n", bad);
+    if (bad) return 1;
+    if (selftest) std::printf("shared_expert_parity OK\n");
+    return 0;
+}
\ No newline at end of file
diff --git a/sycl/src/prefill/gemm.dp.cpp b/sycl/src/prefill/gemm.dp.cpp
new file mode 100644
index 00000000000..1f1f362ba96
--- /dev/null
+++ b/sycl/src/prefill/gemm.dp.cpp
@@ -0,0 +1,155 @@
+// src/prefill/gemm.cu - see include/strata/prefill/gemm.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/prefill/gemm.hpp"
+#include "strata/kernels/dequant_bf16.hpp"
+#include <dpct/blas_utils.hpp>
+
+#include <cstdio>
+#include <cstdlib>
+#include <dpct/lib_common_utils.hpp>
+
+namespace strata::prefill {
+namespace {
+
+void ck(int s, const char *what) {
+    if (s != 0) {
+        std::fprintf(stderr, "prefill gemm: %s: cuBLAS status %d\n", what, (int) s);
+        std::exit(1);
+    }
+}
+
+}  // namespace
+
+Gemm::~Gemm() {
+    if (handle_) delete ((dpct::blas::descriptor_ptr)handle_);
+    if (!external_) {
+        if (scratch_) sycl::free(scratch_, dpct::get_in_order_queue());
+        if (workspace_) sycl::free(workspace_, dpct::get_in_order_queue());
+    }
+}
+
+bool Gemm::init_external(void *stream, uint16_t *scratch, int64_t scratch_elems,
+                         void *workspace, size_t ws_bytes,
+                         std::string &err) try {
+    dpct::blas::descriptor_ptr h = nullptr;
+    if (DPCT_CHECK_ERROR(h = new dpct::blas::descriptor()) != 0) {
+        err = "prefill gemm: cublasCreate failed"; return false;
+    }
+    handle_ = h;
+    stream_ = stream;
+    external_ = true;
+    h->set_queue(strata::q_of(stream));
+    workspace_ = workspace;
+    /*
+    DPCT1026:1144: The call to cublasSetWorkspace was removed because this
+    functionality is redundant in SYCL.
+    */
+    h->set_math_mode(dpct::blas::math_mode::mm_default);
+    scratch_ = scratch;
+    scratch_elems_ = scratch_elems;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void Gemm::rebind(uint16_t* scratch, int64_t scratch_elems, void* workspace, size_t ws_bytes) {
+    scratch_ = scratch;
+    scratch_elems_ = scratch_elems;
+    workspace_ = workspace;
+    /*
+    DPCT1026:1145: The call to cublasSetWorkspace was removed because this
+    functionality is redundant in SYCL.
+    */
+}
+
+bool Gemm::init(void *stream, int64_t scratch_elems, std::string &err) try {
+    dpct::blas::descriptor_ptr h = nullptr;
+    if (DPCT_CHECK_ERROR(h = new dpct::blas::descriptor()) != 0) {
+        err = "prefill gemm: cublasCreate failed"; return false;
+    }
+    handle_ = h;
+    stream_ = stream;
+    h->set_queue(strata::q_of(stream));
+    // A fixed workspace so the handle never allocates on the way (and graphs could capture it later).
+    const size_t ws = 32u << 20;
+    if (DPCT_CHECK_ERROR(workspace_ = (void *)sycl::malloc_device(
+                             ws, dpct::get_in_order_queue())) != 0) {
+        err = "prefill gemm: workspace"; return false;
+    }
+    /*
+    DPCT1026:1146: The call to cublasSetWorkspace was removed because this
+    functionality is redundant in SYCL.
+    */
+    h->set_math_mode(dpct::blas::math_mode::mm_default);
+    if (scratch_elems > 0 &&
+        DPCT_CHECK_ERROR(
+            scratch_ = (uint16_t *)sycl::malloc_device(
+                (size_t)scratch_elems * 2, dpct::get_in_order_queue())) != 0) {
+        err = "prefill gemm: dequant scratch of " + std::to_string(scratch_elems * 2 >> 20) + " MiB";
+        return false;
+    }
+    scratch_elems_ = scratch_elems;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy,
+                float beta) {
+    if (T <= 0 || N <= 0) return;
+    if (ldy <= 0) ldy = N;
+    const float alpha = 1.0f;
+    // Column-major view: Y^T[N, T] = W[N, K] (stored K x N col-major, transposed) . X^T[K, T].
+    ck(DPCT_CHECK_ERROR(dpct::blas::gemm(
+           (dpct::blas::descriptor_ptr)handle_, oneapi::mkl::transpose::trans,
+           oneapi::mkl::transpose::nontrans, (int)N, (int)T, (int)K, &alpha, W,
+           dpct::library_data_t::real_bfloat16, (int)K, X,
+           dpct::library_data_t::real_bfloat16, (int)K, &beta, Y,
+           dpct::library_data_t::real_float, (int)ldy,
+           dpct::compute_type::f32)),
+       "cublasGemmEx");
+}
+
+void Gemm::f16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy,
+               float beta) {
+    if (T <= 0 || N <= 0) return;
+    if (ldy <= 0) ldy = N;
+    const float alpha = 1.0f;
+    ck(DPCT_CHECK_ERROR(dpct::blas::gemm(
+           (dpct::blas::descriptor_ptr)handle_, oneapi::mkl::transpose::trans,
+           oneapi::mkl::transpose::nontrans, (int)N, (int)T, (int)K, &alpha, W,
+           dpct::library_data_t::real_half, (int)K, X,
+           dpct::library_data_t::real_half, (int)K, &beta, Y,
+           dpct::library_data_t::real_float, (int)ldy,
+           dpct::compute_type::f32)),
+       "cublasGemmEx f16");
+}
+
+void Gemm::native(const uint16_t* X, int ggml_type, const void* W_blocks, float* Y, int64_t T, int64_t N, int64_t K,
+                  int64_t ldy, float beta) {
+    if (N * K > scratch_elems_) {
+        // Too large for the scratch at once: in row slices.
+        const int64_t rows = scratch_elems_ / K;
+        if (rows <= 0) { std::fprintf(stderr, "prefill gemm: scratch too small for K=%lld\n", (long long) K); std::exit(1); }
+        if (ldy <= 0) ldy = N;
+        for (int64_t r0 = 0; r0 < N; r0 += rows) {
+            const int64_t n = (N - r0 < rows) ? N - r0 : rows;
+            strata::kernels::dequant_f16(ggml_type, W_blocks, r0, n, K, scratch_, stream_);
+            f16(X, scratch_, Y + r0, T, n, K, ldy, beta);
+        }
+        return;
+    }
+    strata::kernels::dequant_f16(ggml_type, W_blocks, 0, N, K, scratch_, stream_);
+    f16(X, scratch_, Y, T, N, K, ldy, beta);
+}
+
+}  // namespace strata::prefill
diff --git a/sycl/src/prefill/ggml_cuda_host.dp.cpp b/sycl/src/prefill/ggml_cuda_host.dp.cpp
new file mode 100644
index 00000000000..480a6addd25
--- /dev/null
+++ b/sycl/src/prefill/ggml_cuda_host.dp.cpp
@@ -0,0 +1,104 @@
+// src/prefill/ggml_cuda_host.cu - prompt-speed plan step 2b: the host-side symbols of llama.cpp's ggml-cuda that its MMQ
+// and quantize code reference, for the MMQ kernels compiled into strata_mmq without the rest of ggml-cuda.cu.
+#include "common.cuh"
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdio>
+#include <cstdlib>
+#include <mutex>
+#include <vector>
+
+[[noreturn]] void ggml_cuda_error(const char * stmt, const char * func, const char * file, int line, const char * msg) {
+    std::fprintf(stderr, "ggml-cuda (strata mmq): %s: %s\n  in %s at %s:%d\n", msg, stmt, func, file, line);
+    std::abort();
+}
+
+int ggml_cuda_get_device() {
+    int id = 0;
+    CUDA_CHECK(DPCT_CHECK_ERROR(id = dpct::get_current_device_id()));
+    return id;
+}
+
+const ggml_cuda_device_info & ggml_cuda_info() {
+    static ggml_cuda_device_info info = [] {
+        ggml_cuda_device_info in = {};
+        int n = 0;
+        if (DPCT_CHECK_ERROR(n = dpct::device_count()) != 0) n = 0;
+        n = n > GGML_CUDA_MAX_DEVICES ? GGML_CUDA_MAX_DEVICES : n;
+        in.device_count = n;
+        in.physical_device_count = n;
+        for (int id = 0; id < n; ++id) {
+            dpct::device_info prop;
+            CUDA_CHECK(
+                DPCT_CHECK_ERROR(dpct::get_device(id).get_device_info(prop)));
+            auto & d = in.devices[id];
+            /*
+            DPCT1005:790: The SYCL device version is different from CUDA Compute
+            Compatibility. You may need to rewrite this code.
+            */
+            d.cc =
+                100 * prop.get_major_version() + 10 * prop.get_minor_version();
+            d.nsm(prop.set_max_compute_units);
+            /*
+            DPCT1019:791: local_mem_size in SYCL is not a complete equivalent of
+            sharedMemPerBlock in CUDA. You may need to adjust the code.
+            */
+            d.smpb(prop.set_local_mem_size);
+            /*
+            DPCT1019:792: local_mem_size in SYCL is not a complete equivalent of
+            sharedMemPerBlockOptin in CUDA. You may need to adjust the code.
+            */
+            d.smpbo(prop.set_local_mem_size);
+            /*
+            DPCT1006:793: SYCL does not provide a standard API to differentiate
+            between integrated and discrete GPU devices.
+            */
+            d.integrated = prop.get_integrated() != 0;
+            d.vmm = false;
+            d.total_vram(prop.set_global_mem_size);
+            d.warp_size(prop.set_max_sub_group_size);
+            d.supports_cooperative_launch = prop.cooperativeLaunch != 0;
+            d.physical_device = id;
+            d.physical_share_count = 1;
+            d.virtual_index = 0;
+        }
+        return in;
+    }();
+    return info;
+}
+
+namespace {
+// Buffers are kept and reused: MMQ asks for the same few sizes every launch (its stream-k fixup tiles).
+struct CachingPool : ggml_cuda_pool {
+    struct Buf { void * p; size_t size; bool used; };
+    std::vector<Buf> bufs;
+    std::mutex mu;
+    void * alloc(size_t size, size_t * actual_size) override {
+        std::lock_guard<std::mutex> lk(mu);
+        for (auto & b : bufs)
+            if (!b.used && b.size >= size) { b.used = true; *actual_size = b.size; return b.p; }
+        void * p = nullptr;
+        CUDA_CHECK(DPCT_CHECK_ERROR(
+            p = (void *)sycl::malloc_device(size, dpct::get_in_order_queue())));
+        bufs.push_back({p, size, true});
+        *actual_size = size;
+        return p;
+    }
+    void free(void * ptr, size_t) override {
+        std::lock_guard<std::mutex> lk(mu);
+        for (auto & b : bufs)
+            if (b.p == ptr) { b.used = false; return; }
+    }
+    ~CachingPool() override {
+        for (auto & b : bufs) cudaFree(b.p);
+    }
+};
+}  // namespace
+
+std::unique_ptr<ggml_cuda_pool> ggml_backend_cuda_context::new_pool_for_device(int, int) {
+    return std::unique_ptr<ggml_cuda_pool>(new CachingPool());
+}
+
+ggml_backend_cuda_context::~ggml_backend_cuda_context() {}
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
new file mode 100644
index 00000000000..17a4fe8f6ef
--- /dev/null
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -0,0 +1,1428 @@
+// src/prefill/kernels.cu - see include/strata/prefill/kernels.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/prefill/kernels.hpp"
+#include "strata/kernels/mrope.hpp"
+#include "strata/kernels/router_top10.hpp"
+
+#include <cfloat>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::prefill {
+namespace {
+
+constexpr int N = 2560, HC = 4, D = N * HC, LR = 320;
+constexpr int S = 128, HK = 16, HV = 48, C = 10240;
+
+__dpct_inline__ float warp_sum(float v) {
+#pragma unroll
+    /*
+    DPCT1108:247: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v +=
+        dpct::experimental::permute_sub_group_by_xor(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
+            o);
+    return v;
+}
+__dpct_inline__ float warp_max(float v) {
+#pragma unroll
+    /*
+    DPCT1108:248: '__shfl_xor_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
+    */
+    for (int o = 16; o > 0; o >>= 1) v = sycl::fmax(
+        v, dpct::experimental::permute_sub_group_by_xor(
+               0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+               v, o));
+    return v;
+}
+__dpct_inline__ uint16_t bf(float f) {
+    uint32_t u = sycl::bit_cast<unsigned int>(f);
+    u += 0x7fffu + ((u >> 16) & 1u);
+    return (uint16_t) (u >> 16);
+}
+__dpct_inline__ float sigm(float x) {
+    return 1.0f / (1.0f + sycl::native::exp(-x));
+}
+__dpct_inline__ uint16_t hf(float f) {
+    return sycl::bit_cast<unsigned short, sycl::half>(
+               sycl::vec<float, 1>(f)
+                   .convert<sycl::half, sycl::rounding_mode::rte>()[0]);
+}
+// block-wide sum for blockDim.x <= 1024, result broadcast
+inline float block_sum(float v, float *sh) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              w = item_ct1.get_local_id(2) >> 5;
+    v = warp_sum(v);
+    /*
+    DPCT1065:986: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (lane == 0) sh[w] = v;
+    /*
+    DPCT1065:987: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const int nw = (item_ct1.get_local_range(2) + 31) >> 5;
+    float t =
+        (item_ct1.get_local_id(2) < nw) ? sh[item_ct1.get_local_id(2)] : 0.0f;
+    if (w == 0) t = warp_sum(t);
+    if (item_ct1.get_local_id(2) == 0) sh[0] = t;
+    /*
+    DPCT1065:988: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    return sh[0];
+}
+void check(const char* what) {
+    /*
+    DPCT1010:989: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+    /*
+    DPCT1009:990: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+unsigned blocks_for(int64_t n, int t = 256) { return (unsigned) ((n + t - 1) / t); }
+
+// ---------------------------------------------------------------- hyper-connection
+__dpct_inline__ void gr_norm_kernel(const float *__restrict__ R,
+                                    const float *__restrict__ w, float eps,
+                                    float *__restrict__ xn,
+                                    uint16_t *__restrict__ xn16) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t row = item_ct1.get_group(2); // t * 4 + c
+    const int c = (int) (row % HC);
+    const float* r = R + row * N;
+    float ss = 0.0f;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < N;
+         d += item_ct1.get_local_range(2)) ss += r[d] * r[d];
+    const float rs = sycl::rsqrt(block_sum(ss, sh) / (float)N + eps);
+    for (int d = item_ct1.get_local_id(2); d < N;
+         d += item_ct1.get_local_range(2)) {
+        const float v = r[d] * rs * w[c * N + d];
+        xn[row * N + d] = v;
+        xn16[row * N + d] = bf(v);
+    }
+}
+__dpct_inline__ void gr_silu_kernel(const float *__restrict__ lo,
+                                    uint16_t *__restrict__ lo16, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    const float x = lo[i] / (float) HC;
+    lo16[i] = bf(x / (1.0f + sycl::native::exp(-x)));
+}
+__dpct_inline__ void gr_mix_kernel(const float *__restrict__ xn,
+                                   const float *__restrict__ g,
+                                   float *__restrict__ mixed,
+                                   uint16_t *__restrict__ mixed16, int64_t T,
+                                   uint16_t *__restrict__ mixed_h) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * N) return;
+    const int64_t t = i / N, d = i % N;
+    float s = 0.0f;
+#pragma unroll
+    for (int c = 0; c < HC; ++c) {
+        const int64_t j = t * D + c * N + d;
+        s = sycl::fma((float)(xn[j]), sigm(g[j]), s);
+    }
+    s /= (float) HC;
+    mixed[i] = s;
+    if (mixed16) mixed16[i] = bf(s);
+    if (mixed_h) mixed_h[i] = hf(s);
+}
+__dpct_inline__ void gr_write_kernel(float *__restrict__ R,
+                                     const float *__restrict__ bo,
+                                     const float *__restrict__ inj,
+                                     int64_t inj_ld, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * D) return;
+    const int64_t t = i / D, c = (i % D) / N, d = i % N;
+    R[i] = sycl::fma((float)(bo[t * N + d]),
+                     2.0f * sigm(inj[t * inj_ld + c] / (float)HC), R[i]);
+}
+__dpct_inline__ void gr_broadcast_kernel(const float *__restrict__ e,
+                                         float *__restrict__ R, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * D) return;
+    const int64_t t = i / D, d = i % N;
+    R[i] = e[t * N + d];
+}
+
+// ---------------------------------------------------------------- GDN
+__dpct_inline__ void gdn_gates_kernel(const float *__restrict__ ab,
+                                      const float *__restrict__ dt,
+                                      const float *__restrict__ ssm_a,
+                                      float *__restrict__ gate,
+                                      float *__restrict__ beta, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * HV) return;
+    const int64_t t = i / HV, h = i % HV;
+    const float v = ab[t * 2 * HV + h] + dt[h];
+    gate[i] = (v > 20.0f ? v : sycl::log1p(sycl::native::exp(v))) * ssm_a[h];
+    beta[i] = sigm(ab[t * 2 * HV + HV + h]);
+}
+// one thread per channel, walks the chunk; then a second kernel normalises
+__dpct_inline__ void gdn_conv_kernel(float *__restrict__ hist,
+                                     const float *__restrict__ qkv,
+                                     const float *__restrict__ w,
+                                     float *__restrict__ h, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= C) return;
+    float v0 = hist[c * 3], v1 = hist[c * 3 + 1], v2 = hist[c * 3 + 2];
+    const float w0 = w[c * 4], w1 = w[c * 4 + 1], w2 = w[c * 4 + 2], w3 = w[c * 4 + 3];
+    for (int64_t t = 0; t < T; ++t) {
+        const float x = qkv[t * C + c];
+        const float s = v0 * w0 + v1 * w1 + v2 * w2 + x * w3;
+        h[t * C + c] = s / (1.0f + sycl::native::exp(-s));
+        v0 = v1; v1 = v2; v2 = x;
+    }
+    hist[c * 3] = v0; hist[c * 3 + 1] = v1; hist[c * 3 + 2] = v2;
+}
+// C-3: the same 4-tap causal conv, tiled over tokens: thread (c, tile) reads its tile's 3 predecessors from the
+// chunk (or the history before it) instead of carrying them - the conv reads inputs, not its own outputs, so the
+// tiles are independent. The same expression per element (so the same bits); the history is written afterwards.
+constexpr int CONV_TILE = 64;
+__dpct_inline__ void gdn_conv_tiled_kernel(const float *__restrict__ hist,
+                                           const float *__restrict__ qkv,
+                                           const float *__restrict__ w,
+                                           float *__restrict__ h, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= C) return;
+    const int64_t t0 = (int64_t)item_ct1.get_group(1) * CONV_TILE;
+    if (t0 >= T) return;
+    const int64_t t1 = t0 + CONV_TILE < T ? t0 + CONV_TILE : T;
+    auto input = [&](int64_t t) -> float { return t >= 0 ? qkv[t * C + c] : hist[c * 3 + (int) (t + 3)]; };
+    float v0 = input(t0 - 3), v1 = input(t0 - 2), v2 = input(t0 - 1);
+    const float w0 = w[c * 4], w1 = w[c * 4 + 1], w2 = w[c * 4 + 2], w3 = w[c * 4 + 3];
+    for (int64_t t = t0; t < t1; ++t) {
+        const float x = qkv[t * C + c];
+        const float s = v0 * w0 + v1 * w1 + v2 * w2 + x * w3;
+        h[t * C + c] = s / (1.0f + sycl::native::exp(-s));
+        v0 = v1; v1 = v2; v2 = x;
+    }
+}
+// the history after the chunk: its last three inputs (the older history where the chunk is shorter than 3)
+__dpct_inline__ void gdn_conv_hist_kernel(float *__restrict__ hist,
+                                          const float *__restrict__ qkv,
+                                          int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int c = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+                  item_ct1.get_local_id(2);
+    if (c >= C) return;
+    float v[3];
+    for (int k = 0; k < 3; ++k) {
+        const int64_t t = T - 3 + k;
+        v[k] = t >= 0 ? qkv[t * C + c] : hist[c * 3 + (int) (t + 3)];
+    }
+    hist[c * 3] = v[0]; hist[c * 3 + 1] = v[1]; hist[c * 3 + 2] = v[2];
+}
+__dpct_inline__ void gdn_l2_kernel(float *__restrict__ h, float eps) {
+    // block (t, head) over the 32 q/k heads, 128 threads
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t t = item_ct1.get_group(1);
+    const int head = item_ct1.get_group(2);
+    float* x = h + t * C + head * S;
+    const float v = x[item_ct1.get_local_id(2)];
+    float sq = warp_sum(v * v);
+    auto &part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if ((item_ct1.get_local_id(2) & 31) == 0)
+        part[item_ct1.get_local_id(2) >> 5] = sq;
+    /*
+    DPCT1065:991: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float ss = part[0] + part[1] + part[2] + part[3];
+    x[item_ct1.get_local_id(2)] = v * sycl::rsqrt(ss + eps);
+}
+constexpr int RG = 4, RPG = S / RG;
+/*
+DPCT1110:249: The total declared local variable size in device function
+gdn_rec_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+gdn_rec_kernel(float *__restrict__ state, const float *__restrict__ h,
+               const float *__restrict__ gate, const float *__restrict__ beta,
+               const float *__restrict__ z, const float *__restrict__ gamma,
+               float eps, float *__restrict__ y, uint16_t *__restrict__ y16,
+               int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sq = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &red =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[RG][S]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &wsum =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[16]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int head = item_ct1.get_group(2), col = item_ct1.get_local_id(2),
+              rg = item_ct1.get_local_id(1), tid = rg * S + col;
+    const int qh = head % HK;
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * HV + head) * S + col;
+    const size_t rs = (size_t) HV * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * rs];
+    const float g_col = gamma[col];
+    for (int64_t t = 0; t < T; ++t) {
+        const float* ht = h + t * C;
+        /*
+        DPCT1118:250: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:992: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (tid < S) { sq[tid] = ht[qh * S + tid]; sk[tid] = ht[HK * S + qh * S + tid]; }
+        /*
+        DPCT1118:251: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:993: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float g = sycl::native::exp(gate[t * HV + head]);
+        float kv = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r)
+            kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
+        red[rg][col] = kv;
+        /*
+        DPCT1118:252: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:994: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float kv_col = red[0][col] + red[1][col] + red[2][col] + red[3][col];
+        const float delta = (ht[2 * HK * S + head * S + col] - g * kv_col) * beta[t * HV + head];
+        float o = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) {
+            s[r] = sycl::fma((float)g, s[r], sk[rg * RPG + r] * delta);
+            o = sycl::fma(s[r], sq[rg * RPG + r], o);
+        }
+        /*
+        DPCT1118:253: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:995: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        red[rg][col] = o;
+        /*
+        DPCT1118:254: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:996: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        float oc = 0.0f, sp = 0.0f;
+        if (rg == 0) {
+            oc = (red[0][col] + red[1][col] + red[2][col] + red[3][col]) *
+                 sycl::rsqrt((float)S);
+            sp = oc * oc;
+        }
+        sp = warp_sum(sp);
+        if ((tid & 31) == 0) wsum[tid >> 5] = sp;
+        /*
+        DPCT1118:255: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:997: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (rg == 0) {
+            const float ss = wsum[0] + wsum[1] + wsum[2] + wsum[3];
+            const float v = oc * sycl::rsqrt(ss / (float)S + eps) * g_col *
+                            sigm(z[t * HV * S + head * S + col]);
+            y[t * HV * S + head * S + col] = v;
+            y16[t * HV * S + head * S + col] = hf(v);
+        }
+    }
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) base[r * rs] = s[r];
+}
+
+// D-2: the recurrence with the value columns split over 4 blocks per head (4x the blocks of the kernel above, a
+// quarter of its threads per __syncthreads), and the output norm - the only step that couples the head's columns -
+// in its own kernel. Per column the same arithmetic in the same order (the 4 row-group partial sums added as
+// red[0] + red[1] + red[2] + red[3]; the norm's warp sums over the same 32-column warps): the same bits.
+constexpr int CB = 32, NCB = S / CB;
+/*
+DPCT1110:256: The total declared local variable size in device function
+gdn_rec_cols_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gdn_rec_cols_kernel(float *__restrict__ state,
+                                         const float *__restrict__ h,
+                                         const float *__restrict__ gate,
+                                         const float *__restrict__ beta,
+                                         float *__restrict__ oc_out,
+                                         int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sq = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &red =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[RG][CB]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int head = item_ct1.get_group(2) / NCB,
+              cb = item_ct1.get_group(2) % NCB;
+    const int c = item_ct1.get_local_id(2), rg = item_ct1.get_local_id(1),
+              tid = rg * CB + c, col = cb * CB + c;
+    const int qh = head % HK;
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * HV + head) * S + col;
+    const size_t rs = (size_t) HV * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * rs];
+    for (int64_t t = 0; t < T; ++t) {
+        const float* ht = h + t * C;
+        /*
+        DPCT1118:257: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:998: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (tid < S) { sq[tid] = ht[qh * S + tid]; sk[tid] = ht[HK * S + qh * S + tid]; }
+        /*
+        DPCT1118:258: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:999: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float g = sycl::native::exp(gate[t * HV + head]);
+        float kv = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r)
+            kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
+        red[rg][c] = kv;
+        /*
+        DPCT1118:259: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:1000: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float kv_col = red[0][c] + red[1][c] + red[2][c] + red[3][c];
+        const float delta = (ht[2 * HK * S + head * S + col] - g * kv_col) * beta[t * HV + head];
+        float o = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) {
+            s[r] = sycl::fma((float)g, s[r], sk[rg * RPG + r] * delta);
+            o = sycl::fma(s[r], sq[rg * RPG + r], o);
+        }
+        /*
+        DPCT1118:260: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:1001: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        red[rg][c] = o;
+        /*
+        DPCT1118:261: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065:1002: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (rg == 0) oc_out[t * HV * S + head * S + col] =
+            (red[0][c] + red[1][c] + red[2][c] + red[3][c]) *
+            sycl::rsqrt((float)S);
+    }
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) base[r * rs] = s[r];
+}
+__dpct_inline__ void gdn_out_norm_kernel(const float *__restrict__ z,
+                                         const float *__restrict__ gamma,
+                                         float eps, float *__restrict__ y,
+                                         uint16_t *__restrict__ y16) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t t = item_ct1.get_group(2);
+    const int head = item_ct1.get_group(1), col = item_ct1.get_local_id(2);
+    const size_t at = (size_t) t * HV * S + (size_t) head * S + col;
+    const float oc = y[at];
+    float sp = warp_sum(oc * oc);
+    if ((col & 31) == 0) wsum[col >> 5] = sp;
+    /*
+    DPCT1065:1003: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float ss = wsum[0] + wsum[1] + wsum[2] + wsum[3];
+    const float v = oc * sycl::rsqrt(ss / (float)S + eps) * gamma[col] *
+                    sigm(z[t * HV * S + head * S + col]);
+    y[at] = v;
+    y16[at] = hf(v);
+}
+
+// ---------------------------------------------------------------- MoE
+template <int REG>
+/*
+DPCT1110:264: The total declared local variable size in device function
+route_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void route_kernel(const float *__restrict__ logits,
+                                  int32_t *__restrict__ ids,
+                                  float *__restrict__ wout, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t t =
+        (int64_t)item_ct1.get_group(2) * (item_ct1.get_local_range(2) >> 5) +
+        (item_ct1.get_local_id(2) >> 5);
+    if (t >= T) return;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const float* lg = logits + t * (REG * 32);
+    float v[REG];
+#pragma unroll
+    for (int i = 0; i < REG; ++i) v[i] = lg[lane + i * 32];
+    float mx = -INFINITY;
+#pragma unroll
+    for (int i = 0; i < REG; ++i) mx = sycl::fmax(mx, v[i]);
+    mx = warp_max(mx);
+    float sum = 0.0f;
+#pragma unroll
+    for (int i = 0; i < REG; ++i) {
+        v[i] = sycl::native::exp(v[i] - mx); sum += v[i];
+    }
+    const float rcp = 1.0f / warp_sum(sum);
+#pragma unroll
+    for (int i = 0; i < REG; ++i) {
+        v[i] *= rcp; if (sycl::isnan(v[i])) v[i] = -FLT_MAX;
+    }
+    float selected = 0.0f, selected_sum = 0.0f;
+    for (int rank = 0; rank < 10; ++rank) {
+        float best = v[0];
+        int ex = lane;
+#pragma unroll
+        for (int i = 1; i < REG; ++i) if (v[i] > best) { best = v[i]; ex = lane + i * 32; }
+#pragma unroll
+        for (int m = 16; m; m >>= 1) {
+            /*
+            DPCT1108:262: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float ob = dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                best, m);
+            /*
+            DPCT1108:263: '__shfl_xor_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int oi = dpct::experimental::permute_sub_group_by_xor(
+                0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                ex, m);
+            if (ob > best || (ob == best && oi < ex)) { best = ob; ex = oi; }
+        }
+        if ((ex & 31) == lane) { v[ex / 32] = -INFINITY; selected_sum += best; }
+        if (lane == 0) ids[t * 10 + rank] = ex;
+        if (rank == lane) selected = best;
+    }
+    selected_sum = sycl::fmax(warp_sum(selected_sum), 6.103515625e-5f);
+    if (lane < 10) wout[t * 10 + lane] = selected / selected_sum;
+}
+// Strata blob: gate/up codes [1280][640 B], down codes [2560][160 B], gate/up scales [1280][40] f16, down scales [2560][10] f16
+template <bool HALF>
+/*
+DPCT1110:265: The total declared local variable size in device function
+blob_dequant_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void blob_dequant_kernel(const uint8_t *__restrict__ blob,
+                                         uint16_t *__restrict__ gu16,
+                                         uint16_t *__restrict__ d16) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr size_t O_D_CODES = (size_t)1280 * 640,
+                     O_GU_SC = O_D_CODES + (size_t)2560 * 160,
+                     O_D_SC = O_GU_SC + (size_t)1280 * 40 * 2;
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2); // one thread per 4 weights (one code byte)
+    const int64_t n_gu = 1280LL * 640, n_d = 2560LL * 160;
+    if (i < n_gu) {
+        const int64_t row = i / 640, byte = i % 640;
+        const uint8_t c = blob[row * 640 + byte];
+        const uint8_t* sp = blob + O_GU_SC + (size_t) (row * 40 + (byte * 4) / 64) * 2;
+        const float d =
+            sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(
+                                         (uint16_t)(sp[0] | (sp[1] << 8))))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        uint16_t* o = gu16 + row * 2560 + byte * 4;
+#pragma unroll
+        for (int k = 0; k < 4; ++k) { const float v = (float) (((c >> (2 * k)) & 3) - 1) * d; o[k] = HALF ? hf(v) : bf(v); }
+    } else if (i < n_gu + n_d) {
+        const int64_t j = i - n_gu, row = j / 160, byte = j % 160;
+        const uint8_t c = blob[O_D_CODES + row * 160 + byte];
+        const uint8_t* sp = blob + O_D_SC + (size_t) (row * 10 + (byte * 4) / 64) * 2;
+        const float d =
+            sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(
+                                         (uint16_t)(sp[0] | (sp[1] << 8))))
+                .convert<float, sycl::rounding_mode::automatic>()[0];
+        uint16_t* o = d16 + row * 640 + byte * 4;
+#pragma unroll
+        for (int k = 0; k < 4; ++k) { const float v = (float) (((c >> (2 * k)) & 3) - 1) * d; o[k] = HALF ? hf(v) : bf(v); }
+    }
+}
+__dpct_inline__ void swiglu_il_kernel(const float *__restrict__ gu,
+                                      uint16_t *__restrict__ h16, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n * 640) return;
+    const int64_t r = i / 640, k = i % 640;
+    const float g = gu[r * 1280 + 2 * k], u = gu[r * 1280 + 2 * k + 1];
+    h16[i] = hf(g / (1.0f + sycl::native::exp(-g)) * u);
+}
+__dpct_inline__ void swiglu_pair_kernel(const float *__restrict__ g,
+                                        const float *__restrict__ u,
+                                        uint16_t *__restrict__ h16, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n * 640) return;
+    const float a = g[i];
+    h16[i] = hf(a / (1.0f + sycl::native::exp(-a)) * u[i]);
+}
+__dpct_inline__ void gather_rows16_kernel(const uint16_t *__restrict__ x,
+                                          const int32_t *__restrict__ src,
+                                          uint16_t *__restrict__ dst, int64_t n,
+                                          int64_t width) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2); // one uint4 (8 bf16)
+    const int64_t per = width / 8;
+    if (i >= n * per) return;
+    const int64_t r = i / per, j = i % per;
+    reinterpret_cast<sycl::uint4 *>(dst)[r * per + j] =
+        reinterpret_cast<const sycl::uint4 *>(x)[(int64_t)src[r] * per + j];
+}
+__dpct_inline__ void moe_combine_kernel(const float *__restrict__ Dm,
+                                        const int32_t *__restrict__ slot,
+                                        const float *__restrict__ w,
+                                        const float *__restrict__ shared,
+                                        const float *__restrict__ sg,
+                                        float *__restrict__ bo, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * N) return;
+    const int64_t t = i / N, d = i % N;
+    float s = 0.0f;
+#pragma unroll
+    for (int k = 0; k < 10; ++k)
+        s = sycl::fma((float)(w[t * 10 + k]),
+                      (float)(Dm[(int64_t)slot[t * 10 + k] * N + d]), s);
+    bo[i] = s + shared[i] * sigm(sg[t]);
+}
+
+// ---------------------------------------------------------------- QSA helpers
+__dpct_inline__ void rms_rows_kernel(float *__restrict__ x,
+                                     const float *__restrict__ w, int64_t cols,
+                                     int64_t ld, float eps) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float *r = x + (int64_t)item_ct1.get_group(2) * ld;
+    float ss = 0.0f;
+#pragma unroll
+    for (int64_t c = item_ct1.get_local_id(2); c < cols;
+         c += item_ct1.get_local_range(2)) ss += r[c] * r[c];
+    const float s = sycl::rsqrt(block_sum(ss, sh) / (float)cols + eps);
+    /*
+    DPCT1065:1004: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+#pragma unroll
+    for (int64_t c = item_ct1.get_local_id(2); c < cols;
+         c += item_ct1.get_local_range(2)) r[c] = s * r[c] * w[c];
+}
+__dpct_inline__ void rope_kernel(float *__restrict__ x, int64_t heads,
+                                 int64_t dim, int64_t ld, int64_t pos0,
+                                 float theta_scale,
+                                 const int32_t *__restrict__ mtab) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t row = item_ct1.get_group(2); // t * heads + h
+    const int pair = item_ct1.get_local_id(2); // 0..31
+    const int64_t t = row / heads, h = row % heads;
+    float* p = x + t * ld + h * dim;
+    const float theta =
+        (float)strata::kernels::mrope_pos(mtab, (int)(pos0 + t), pair) *
+        dpct::pow(theta_scale, (float)pair);
+    const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+    const float a = p[pair], b = p[pair + 32];
+    p[pair] = a * c - b * s;
+    p[pair + 32] = a * s + b * c;
+}
+__dpct_inline__ void split_q_kernel(const float *__restrict__ qf,
+                                    float *__restrict__ q, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * 24 * 256) return;
+    const int64_t t = i / (24 * 256), h = (i / 256) % 24, d = i % 256;
+    q[i] = qf[t * 24 * 512 + h * 512 + d];
+}
+__dpct_inline__ void gate_attn_kernel(const float *__restrict__ a,
+                                      const float *__restrict__ qf,
+                                      uint16_t *__restrict__ o16, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * 24 * 256) return;
+    const int64_t t = i / (24 * 256), h = (i / 256) % 24, d = i % 256;
+    o16[i] =
+        hf(a[i] * (1.0f / (1.0f + sycl::native::exp(
+                                      -qf[t * 24 * 512 + h * 512 + 256 + d]))));
+}
+
+// one block per (token, kv head, 64-value group); 64 threads. KV streaming: the pool page only if the block is
+// resident (table >= 0), and the host copy and the prompt path's staging pool (both identity layout) when given.
+__dpct_inline__ void
+kv_append_kernel(const float *__restrict__ K, const float *__restrict__ V,
+                 int64_t pos0, const int32_t *__restrict__ table,
+                 int64_t page_size, uint16_t *k_pool, uint16_t *v_pool,
+                 int8_t *k_q, int8_t *v_q, uint16_t *k_scale, uint16_t *v_scale,
+                 strata::kernels::KvHostPools host,
+                 strata::kernels::KvHostPools stage) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t t = item_ct1.get_group(2);
+    const int kvh = item_ct1.get_group(1), g = item_ct1.get_group(0) >> 1;
+    const bool is_v = (item_ct1.get_group(0) & 1) != 0;
+    const int d = g * 64 + item_ct1.get_local_id(2);
+    const float x = (is_v ? V : K)[t * 512 + kvh * 256 + d];
+    const int64_t pos = pos0 + t;
+    const int64_t page = table[pos / page_size];
+    const int64_t row = (page * 2 + kvh) * page_size + pos % page_size;
+    const int64_t row_id = ((pos / page_size) * 2 + kvh) * page_size + pos % page_size;
+    if (k_pool != nullptr) {
+        const uint16_t h = hf(x);
+        if (page >= 0) (is_v ? v_pool : k_pool)[row * 256 + d] = h;
+        if (host.k_pool != nullptr) (is_v ? host.v_pool : host.k_pool)[row_id * 256 + d] = h;
+        if (stage.k_pool != nullptr) (is_v ? stage.v_pool : stage.k_pool)[row_id * 256 + d] = h;
+        return;
+    }
+    float a = sycl::fabs(x);
+    /*
+DPCT1108:266: '__shfl_xor_sync' was migrated with the experimental feature
+masked sub_group function which may not be supported by all compilers or
+runtimes. You may need to adjust the code.
+*/
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) a = sycl::fmax(
+        a, dpct::experimental::permute_sub_group_by_xor(
+               0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+               a, o));
+    auto &wm = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    if ((item_ct1.get_local_id(2) & 31) == 0)
+        wm[item_ct1.get_local_id(2) >> 5] = a;
+    /*
+    DPCT1065:1005: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float amax = sycl::fmax(wm[0], wm[1]);
+    const uint16_t sb = hf(amax / 127.0f);
+    const float sf =
+        sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(sb))
+            .convert<float, sycl::rounding_mode::automatic>()[0];
+    int q = 0;
+    if (sf > 0.0f) {
+        q = sycl::vec<float, 1>{(x / sf)}
+                .convert<int, sycl::rounding_mode::rte>()[0];
+        q = q < -127 ? -127 : (q > 127 ? 127 : q);
+    }
+    if (page >= 0) {
+        (is_v ? v_q : k_q)[row * 256 + d] = (int8_t) q;
+        if (item_ct1.get_local_id(2) == 0)(is_v ? v_scale
+                                                : k_scale)[row * 4 + g] = sb;
+    }
+    if (host.k_q != nullptr) {
+        (is_v ? host.v_q : host.k_q)[row_id * 256 + d] = (int8_t) q;
+        if (item_ct1.get_local_id(2) ==
+            0)(is_v ? host.v_scale : host.k_scale)[row_id * 4 + g] = sb;
+    }
+    if (stage.k_q != nullptr) {
+        (is_v ? stage.v_q : stage.k_q)[row_id * 256 + d] = (int8_t) q;
+        if (item_ct1.get_local_id(2) ==
+            0)(is_v ? stage.v_scale : stage.k_scale)[row_id * 4 + g] = sb;
+    }
+}
+__dpct_inline__ void to_f16_kernel(const float *__restrict__ x,
+                                   uint16_t *__restrict__ y, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (int64_t)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2))
+        y[i] = hf(x[i]);
+}
+__dpct_inline__ void round_f16_kernel(const float *__restrict__ x,
+                                      float *__restrict__ y, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (int64_t)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2))
+        y[i] = sycl::vec<sycl::half, 1>(
+                   sycl::vec<float, 1>(x[i])
+                       .convert<sycl::half, sycl::rounding_mode::rte>()[0])
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+__dpct_inline__ void to_bf16_kernel(const float *__restrict__ x,
+                                    uint16_t *__restrict__ y, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (int64_t)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2))
+        y[i] = bf(x[i]);
+}
+
+}  // namespace
+
+void kv_append(const float* K, const float* V, int64_t T, int64_t pos0, const int32_t* page_table, int64_t page_size,
+               uint16_t* k_pool, uint16_t* v_pool, int8_t* k_q, int8_t* v_q, uint16_t* k_scale, uint16_t* v_scale,
+               void* stream, const strata::kernels::KvHostPools* host, const strata::kernels::KvHostPools* stage) {
+    if (T <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                strata::kernels::KvHostPools
+                    host_host_strata_kernels_KvHostPools_ct11 =
+                        host ? *host : strata::kernels::KvHostPools{};
+                strata::kernels::KvHostPools
+                    stage_stage_strata_kernels_KvHostPools_ct12 =
+                        stage ? *stage : strata::kernels::KvHostPools{};
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class kv_append_kernel_7ad9e6>>(
+                    sycl::nd_range<3>(sycl::range(8, 2, (unsigned)T) *
+                                          sycl::range(1, 1, 64),
+                                      sycl::range(1, 1, 64)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            kv_append_kernel(
+                                K, V, pos0, page_table, page_size, k_pool,
+                                v_pool, k_q, v_q, k_scale, v_scale,
+                                host_host_strata_kernels_KvHostPools_ct11,
+                                stage_stage_strata_kernels_KvHostPools_ct12);
+                        });
+            });
+    }
+    check("kv_append");
+}
+void to_f16(const float* x, uint16_t* y, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class to_f16_kernel_a5739f>>(
+                sycl::nd_range<3>(sycl::range(1, 1,
+                                              (unsigned)((n + 255) / 256 < 4096
+                                                             ? (n + 255) / 256
+                                                             : 4096)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    to_f16_kernel(x, y, n);
+                });
+    }
+    check("to_f16");
+}
+void round_f16(const float* x, float* y, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class round_f16_kernel_52fbb2>>(
+                sycl::nd_range<3>(sycl::range(1, 1,
+                                              (unsigned)((n + 255) / 256 < 4096
+                                                             ? (n + 255) / 256
+                                                             : 4096)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    round_f16_kernel(x, y, n);
+                });
+    }
+    check("round_f16");
+}
+void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_265df0>>(
+                sycl::nd_range<3>(sycl::range(1, 1,
+                                              (unsigned)((n + 255) / 256 < 4096
+                                                             ? (n + 255) / 256
+                                                             : 4096)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    to_bf16_kernel(x, y, n);
+                });
+    }
+    check("to_bf16");
+}
+
+void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t* xn16, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_norm_kernel_f823fa>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_norm_kernel(R, w_norm, eps, xn, xn16);
+                    });
+    }
+    check("gr_norm");
+}
+void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto T_LR_ct2 = T * LR;
+
+                cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_73e336>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * LR)) *
+                                          sycl::range(1, 1, 256),
+                                      sycl::range(1, 1, 256)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gr_silu_kernel(lo, lo16, T_LR_ct2);
+                    });
+            });
+    }
+    check("gr_silu");
+}
+void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16, int64_t T, void* stream,
+            uint16_t* mixed_h) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_mix_kernel_97138e>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gr_mix_kernel(xn, gated, mixed, mixed16, T, mixed_h);
+                });
+    }
+    check("gr_mix");
+}
+void gr_write(float* R, const float* bo, const float* inj, int64_t inj_ld, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_write_kernel_b029eb>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gr_write_kernel(R, bo, inj, inj_ld, T);
+                });
+    }
+    check("gr_write");
+}
+void gr_broadcast(const float* e, float* R, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_broadcast_kernel_a3b6f7>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gr_broadcast_kernel(e, R, T);
+                });
+    }
+    check("gr_broadcast");
+}
+void gdn_gates(const float* ab, const float* dt, const float* ssm_a, float* gate, float* beta, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_gates_kernel_7a43f1>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * HV)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_gates_kernel(ab, dt, ssm_a, gate, beta, T);
+                });
+    }
+    check("gdn_gates");
+}
+void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, int64_t T, float eps, void* stream) {
+    static const bool serial = std::getenv("STRATA_GDN_CONV_SERIAL") != nullptr;   // the old walk (A/B)
+    if (serial || T <= CONV_TILE) {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_2ae161>>(
+                sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
+                                      sycl::range(1, 1, 128),
+                                  sycl::range(1, 1, 128)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gdn_conv_kernel(history, qkv, conv_w, h, T);
+                });
+    } else {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_conv_tiled_kernel_f8dcbd>>(
+                    sycl::nd_range<3>(
+                        sycl::range(1,
+                                    (unsigned)((T + CONV_TILE - 1) / CONV_TILE),
+                                    C / 128) *
+                            sycl::range(1, 1, 128),
+                        sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gdn_conv_tiled_kernel(history, qkv, conv_w, h, T);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_conv_hist_kernel_e10b4d>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
+                                          sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gdn_conv_hist_kernel(history, qkv, T);
+                    });
+        }
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_502355>>(
+                sycl::nd_range<3>(sycl::range(1, (unsigned)T, 2 * HK) *
+                                      sycl::range(1, 1, S),
+                                  sycl::range(1, 1, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_l2_kernel(h, eps);
+                    });
+    }
+    check("gdn_conv");
+}
+void gdn_recurrence(float* state, const float* h, const float* gate, const float* beta, const float* z,
+                    const float* gamma, float eps, float* y, uint16_t* y16, int64_t T, void* stream) {
+    static const bool serial = std::getenv("STRATA_GDN_REC_HEADS") != nullptr;   // the one-block-per-head kernel (A/B)
+    if (serial || T <= 0) {
+        /*
+        DPCT1049:267: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gdn_rec_kernel_8121c8>>(
+                sycl::nd_range<3>(sycl::range(1, 1, HV) * sycl::range(1, RG, S),
+                                  sycl::range(1, RG, S)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gdn_rec_kernel(state, h, gate, beta, z, gamma, eps, y,
+                                       y16, T);
+                    });
+    } else {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_rec_cols_kernel_fedac7>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, HV * NCB) *
+                                          sycl::range(1, RG, CB),
+                                      sycl::range(1, RG, CB)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gdn_rec_cols_kernel(state, h, gate, beta, y, T);
+                    });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_out_norm_kernel_f960df>>(
+                    sycl::nd_range<3>(sycl::range(1, HV, (unsigned)T) *
+                                          sycl::range(1, 1, S),
+                                      sycl::range(1, 1, S)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gdn_out_norm_kernel(z, gamma, eps, y, y16);
+                        });
+        }
+    }
+    check("gdn_recurrence");
+}
+void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t n_expert, void* stream) {
+    if (n_expert == 512)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class route_kernel_f2ae57,
+                                            dpct_kernel_scalar<16>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        route_kernel<16>(logits, ids, weights, T);
+                    });
+    } else if (n_expert == 256)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class route_kernel_687f3a,
+                                            dpct_kernel_scalar<8>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        route_kernel<8>(logits, ids, weights, T);
+                    });
+    } else
+        strata::kernels::router_top10(logits, (int) T, (int) n_expert, 10, ids, weights, stream);
+    check("route");
+}
+void blob_dequant(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_b87029,
+                                            dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    blob_dequant_kernel<false>(blob, gu16, down16);
+                });
+    }
+    check("blob_dequant");
+}
+void blob_dequant_f16(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_3b1437,
+                                            dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    blob_dequant_kernel<true>(blob, gu16, down16);
+                });
+    }
+    check("blob_dequant_f16");
+}
+void swiglu_interleaved(const float* gu, uint16_t* h16, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class swiglu_il_kernel_44cb02>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_il_kernel(gu, h16, n);
+                });
+    }
+    check("swiglu_interleaved");
+}
+void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class swiglu_pair_kernel_f34a2f>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_pair_kernel(g, u, h16, n);
+                });
+    }
+    check("swiglu_pair");
+}
+void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int64_t n, int64_t width, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gather_rows16_kernel_db6b85>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, blocks_for(n * (width / 8))) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gather_rows16_kernel(x16, src, dst16, n, width);
+                });
+    }
+    check("gather_rows16");
+}
+void moe_combine(const float* Dm, const int32_t* slot, const float* w, const float* shared, const float* sg, float* bo,
+                 int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class moe_combine_kernel_b1df11>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    moe_combine_kernel(Dm, slot, w, shared, sg, bo, T);
+                });
+    }
+    check("moe_combine");
+}
+void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld, float eps, void* stream) {
+    if (rows <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class rms_rows_kernel_38561f>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)rows) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        rms_rows_kernel(x, w, cols, ld, eps);
+                    });
+    }
+    check("rms_rows");
+}
+void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t pos0, float freq_base, void* stream) {
+    const float theta_scale = powf(freq_base, -2.0f / 64.0f);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto strata_kernels_mrope_table_ct6 =
+                    strata::kernels::mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class rope_kernel_fa611b>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * heads)) *
+                                          sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        rope_kernel(x, heads, dim, ld, pos0, theta_scale,
+                                    strata_kernels_mrope_table_ct6);
+                    });
+            });
+    }
+    check("rope");
+}
+void split_q(const float* q_full, float* q, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class split_q_kernel_fdb2a0>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    split_q_kernel(q_full, q, T);
+                });
+    }
+    check("split_q");
+}
+void gate_attn(const float* attn, const float* q_full, uint16_t* out16, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gate_attn_kernel_ee0b52>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gate_attn_kernel(attn, q_full, out16, T);
+                });
+    }
+    check("gate_attn");
+}
+
+}  // namespace strata::prefill
diff --git a/sycl/src/prefill/moe_mmq.dp.cpp b/sycl/src/prefill/moe_mmq.dp.cpp
new file mode 100644
index 00000000000..3f5f31fb7e8
--- /dev/null
+++ b/sycl/src/prefill/moe_mmq.dp.cpp
@@ -0,0 +1,311 @@
+// src/prefill/moe_mmq.cu - see include/strata/prefill/moe_mmq.hpp.  llama.cpp's MMQ (ggml-cuda, MIT) is compiled
+// from the pinned llama.cpp checkout the build already takes ggml from; src/prefill/ggml_cuda_host.cu supplies the
+// few host symbols of ggml-cuda.cu it references.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/prefill/moe_mmq.hpp"
+
+#include "common.cuh"
+#include "mmq.cuh"
+#include "quantize.cuh"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::prefill::mmq {
+namespace {
+
+void ck(dpct::err0 e, const char *what) {
+}
+
+int64_t pad512(int64_t n) { return (n + 511) / 512 * 512; }
+
+__dpct_inline__ void copy16_kernel(const sycl::uint4 *__restrict__ a,
+                                   int64_t na,
+                                   const sycl::uint4 *__restrict__ b,
+                                   int64_t nb, sycl::uint4 *__restrict__ ab_dst,
+                                   const sycl::uint4 *__restrict__ c,
+                                   int64_t nc,
+                                   sycl::uint4 *__restrict__ c_dst) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < na) ab_dst[i] = a[i];
+    else if (i < na + nb) ab_dst[i] = b[i - na];
+    else if (i < na + nb + nc) c_dst[i - na - nb] = c[i - na - nb];
+}
+__dpct_inline__ void copy1_kernel(const uint8_t *__restrict__ a, int64_t na,
+                                  const uint8_t *__restrict__ b, int64_t nb,
+                                  uint8_t *__restrict__ ab_dst,
+                                  const uint8_t *__restrict__ c, int64_t nc,
+                                  uint8_t *__restrict__ c_dst) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < na) ab_dst[i] = a[i];
+    else if (i < na + nb) ab_dst[i] = b[i - na];
+    else if (i < na + nb + nc) c_dst[i - na - nb] = c[i - na - nb];
+}
+
+// Strata blob: gate/up codes [1280][640 B], down codes [2560][160 B], gate/up scales [1280][40] f16, down scales
+// [2560][10] f16 (the layout of prefill/kernels.cu's blob_dequant_kernel).  A GGUF Q2_0 block is {f16 d; 16 code
+// bytes} with the same 2-bit codes in the same order, so a block is a scale and a 16-byte run of codes.
+/*
+DPCT1110:182: The total declared local variable size in device function
+strata_q2_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void strata_q2_kernel(const uint8_t *__restrict__ blob,
+                                      uint16_t *__restrict__ gu,
+                                      uint16_t *__restrict__ dn) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr size_t O_D_CODES = (size_t)1280 * 640,
+                     O_GU_SC = O_D_CODES + (size_t)2560 * 160,
+                     O_D_SC = O_GU_SC + (size_t)1280 * 40 * 2;
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2); // one GGUF block
+    const int64_t n_gu = 1280LL * 40, n_d = 2560LL * 10;
+    const uint8_t* codes;
+    const uint16_t* scale;
+    uint16_t* out;
+    if (i < n_gu) {
+        const int64_t row = i / 40, b = i % 40;
+        codes = blob + row * 640 + b * 16;
+        scale = (const uint16_t*) (blob + O_GU_SC) + row * 40 + b;
+        out = gu + i * 9;
+    } else if (i < n_gu + n_d) {
+        const int64_t j = i - n_gu, row = j / 10, b = j % 10;
+        codes = blob + O_D_CODES + row * 160 + b * 16;
+        scale = (const uint16_t*) (blob + O_D_SC) + row * 10 + b;
+        out = dn + j * 9;
+    } else {
+        return;
+    }
+    const sycl::uint4 q = *(const sycl::uint4 *)codes;
+    const uint16_t* qh = (const uint16_t*) &q;
+    out[0] = *scale;
+#pragma unroll
+    for (int k = 0; k < 8; ++k) out[1 + k] = qh[k];
+}
+
+__dpct_inline__ void swiglu_kernel(const float *__restrict__ gu,
+                                   float *__restrict__ h, int64_t rows,
+                                   int64_t n_ff, bool interleaved) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= rows * n_ff) return;
+    const int64_t r = i / n_ff, k = i % n_ff;
+    const float* row = gu + r * 2 * n_ff;
+    const float g = interleaved ? row[2 * k] : row[k], u = interleaved ? row[2 * k + 1] : row[n_ff + k];
+    h[i] = g / (1.0f + sycl::native::exp(-g)) * u;
+}
+
+__dpct_inline__ void iota_kernel(int32_t *dst, int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i < n) dst[i] = (int32_t) i;
+}
+
+unsigned blocks(int64_t n) { return (unsigned) ((n + 255) / 256); }
+
+}  // namespace
+
+bool built() { return true; }
+
+bool supported(int t) {
+    switch ((ggml_type) t) {
+        case GGML_TYPE_Q2_0: case GGML_TYPE_IQ2_XXS: case GGML_TYPE_IQ2_XS: case GGML_TYPE_IQ2_S:
+        case GGML_TYPE_IQ3_XXS: case GGML_TYPE_IQ3_S: case GGML_TYPE_IQ4_NL: case GGML_TYPE_IQ4_XS:
+            return true;
+        default:
+            return false;
+    }
+}
+
+size_t matrix_bytes(int t, int64_t rows, int64_t cols) {
+    return (size_t) rows * (size_t) (cols / ggml_blck_size((ggml_type) t)) * ggml_type_size((ggml_type) t);
+}
+
+size_t q8_bytes(int64_t rows, int64_t cols) {
+    return (size_t) rows * (size_t) pad512(cols) * sizeof(block_q8_1_mmq) / (4 * QK8_1) + 128 * sizeof(block_q8_1_mmq);
+}
+
+void quantize(const float* x, const int32_t* ids, void* xq, int t, int64_t cols, int64_t ld, int64_t rows, void* stream) {
+    if (rows <= 0) return;
+    quantize_mmq_q8_1_cuda(x, ids, xq, (ggml_type) t, cols, ld, rows * ld, rows * ld, pad512(cols), rows, 1, 1,
+                           (cudaStream_t) stream);
+    /*
+    DPCT1010:865: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "quantize");
+}
+
+Context::Context() {
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    ctx_ = new ggml_backend_cuda_context(dev);
+}
+Context::~Context() { delete (ggml_backend_cuda_context*) ctx_; }
+
+void Context::run(const Product& p, void* stream) {
+    if (p.n <= 0 || p.max_rows <= 0) return;
+    const ggml_type t = (ggml_type) p.type;
+    const int64_t qk = ggml_blck_size(t), bpr = p.w_cols / qk;
+    const mmq_args a = {(const char*) p.w, t, (const int*) p.xq, p.ids, p.bounds, p.dst, nullptr,
+                        p.w_cols, p.w_rows, p.total_rows, bpr, p.total_rows, p.ld_dst,
+                        p.n, p.n, (int64_t) (p.expert_bytes / ggml_type_size(t)), 0, 0,
+                        1, 1, 0, 0, 0,
+                        p.max_rows, p.max_rows};
+    auto& ctx = *(ggml_backend_cuda_context*) ctx_;
+    const dpct::queue_ptr s = strata::q_of(stream);
+    switch (t) {
+        case GGML_TYPE_Q2_0: mul_mat_q_case<GGML_TYPE_Q2_0>(ctx, a, s); break;
+        case GGML_TYPE_IQ2_XXS: mul_mat_q_case<GGML_TYPE_IQ2_XXS>(ctx, a, s); break;
+        case GGML_TYPE_IQ2_XS: mul_mat_q_case<GGML_TYPE_IQ2_XS>(ctx, a, s); break;
+        case GGML_TYPE_IQ2_S: mul_mat_q_case<GGML_TYPE_IQ2_S>(ctx, a, s); break;
+        case GGML_TYPE_IQ3_XXS: mul_mat_q_case<GGML_TYPE_IQ3_XXS>(ctx, a, s); break;
+        case GGML_TYPE_IQ3_S: mul_mat_q_case<GGML_TYPE_IQ3_S>(ctx, a, s); break;
+        case GGML_TYPE_IQ4_NL: mul_mat_q_case<GGML_TYPE_IQ4_NL>(ctx, a, s); break;
+        case GGML_TYPE_IQ4_XS: mul_mat_q_case<GGML_TYPE_IQ4_XS>(ctx, a, s); break;
+        default:
+            std::fprintf(stderr, "prefill mmq: type %d is not covered\n", (int) t);
+            std::exit(1);
+    }
+    /*
+    DPCT1010:866: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "mul_mat_q");
+}
+
+void gather_native(const void* gate, const void* up, size_t gu_half_bytes, const void* down, size_t d_bytes,
+                   void* gu_dst, void* d_dst, void* stream) {
+    const dpct::queue_ptr s = strata::q_of(stream);
+    const bool a16 = ((uintptr_t) gate | (uintptr_t) up | (uintptr_t) down | (uintptr_t) gu_dst | (uintptr_t) d_dst |
+                      gu_half_bytes | d_bytes) % 16 == 0;
+    if (a16) {
+        const int64_t na = (int64_t) gu_half_bytes / 16, nc = (int64_t) d_bytes / 16;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<dpct_kernel_name<class copy16_kernel_b12127>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks(2 * na + nc)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy16_kernel(
+                        (const sycl::uint4 *)gate, na, (const sycl::uint4 *)up,
+                        na, (sycl::uint4 *)gu_dst, (const sycl::uint4 *)down,
+                        nc, (sycl::uint4 *)d_dst);
+                });
+        }
+    } else {
+        const int64_t na = (int64_t) gu_half_bytes, nc = (int64_t) d_bytes;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<dpct_kernel_name<class copy1_kernel_c557f3>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks(2 * na + nc)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy1_kernel((const uint8_t *)gate, na, (const uint8_t *)up,
+                                 na, (uint8_t *)gu_dst, (const uint8_t *)down,
+                                 nc, (uint8_t *)d_dst);
+                });
+        }
+    }
+    /*
+    DPCT1010:867: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "gather_native");
+}
+
+void gather_strata_q2(const uint8_t* blob, void* gu_dst, void* d_dst, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class strata_q2_kernel_793a65>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, blocks(1280LL * 40 + 2560LL * 10)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    strata_q2_kernel(blob, (uint16_t *)gu_dst,
+                                     (uint16_t *)d_dst);
+                });
+    }
+    /*
+    DPCT1010:868: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "gather_strata_q2");
+}
+
+void swiglu(const float* gu, float* h, int64_t rows, int64_t n_ff, bool interleaved, void* stream) {
+    if (rows <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class swiglu_kernel_3f7a6f>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks(rows * n_ff)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_kernel(gu, h, rows, n_ff, interleaved);
+                });
+    }
+    /*
+    DPCT1010:869: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "swiglu");
+}
+
+void iota(int32_t* dst, int64_t n, void* stream) {
+    if (n <= 0) return;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class iota_kernel_9245a0>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks(n)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    iota_kernel(dst, n);
+                });
+    }
+    /*
+    DPCT1010:870: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    ck(0, "iota");
+}
+
+}  // namespace strata::prefill::mmq
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
new file mode 100644
index 00000000000..01d601fe2cc
--- /dev/null
+++ b/sycl/src/prefill/prefill.cpp
@@ -0,0 +1,2004 @@
+// src/prefill/prefill.cpp - see include/strata/prefill/prefill.hpp.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/prefill/prefill.hpp"
+#include "strata/core/progress.hpp"
+#include "strata/core/on_device.hpp"
+
+#include "strata/core/layout.hpp"
+#include "strata/kernels/cpu/expert.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/ngram.hpp"
+#include "strata/kernels/ple.hpp"
+#include "strata/kernels/native_ple_postops.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/kv_stream.hpp"
+#include "strata/kernels/cvec.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/core/layer.hpp"
+#include "strata/core/native_head.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/qsa_prompt_attn.hpp"
+#include "strata/kernels/qsa_select.hpp"
+#include "strata/prefill/gemm.hpp"
+#include "strata/prefill/moe_mmq.hpp"
+#include "strata/prefill/kernels.hpp"
+
+#include <algorithm>
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <atomic>
+#include <condition_variable>
+#include <cstring>
+#include <future>
+#include <memory>
+#include <mutex>
+#include <thread>
+#include <vector>
+
+#ifndef STRATA_PREFILL_MMQ
+// A build without the llama.cpp sources (no STRATA_NATIVE_EXPERTS): no MMQ, the FP16 expert path everywhere.
+namespace strata::prefill::mmq {
+bool built() { return false; }
+bool supported(int) { return false; }
+size_t matrix_bytes(int, int64_t, int64_t) { return 0; }
+size_t q8_bytes(int64_t, int64_t) { return 0; }
+void quantize(const float*, const int32_t*, void*, int, int64_t, int64_t, int64_t, void*) {}
+Context::Context() {}
+Context::~Context() {}
+void Context::run(const Product&, void*) {}
+void gather_native(const void*, const void*, size_t, const void*, size_t, void*, void*, void*) {}
+void gather_strata_q2(const uint8_t*, void*, void*, void*) {}
+void swiglu(const float*, float*, int64_t, int64_t, bool, void*) {}
+void iota(int32_t*, int64_t, void*) {}
+}  // namespace strata::prefill::mmq
+#endif
+
+namespace strata::prefill {
+namespace {
+
+using Clock = std::chrono::steady_clock;
+constexpr float EPS = 1e-6f;
+constexpr int64_t N = 2560, HC = 4, D = N * HC, LR = 320, K = 10, NE = 512;
+constexpr int64_t C = 10240, ZV = 6144, HV = 48;
+// plan v0.3 P6: staging holds the largest blob of the pack (a native pack's blobs differ per layer)
+inline int64_t MAXBLOB() { return (int64_t) strata::kernels::cpu::expert_layout().max_blob; }
+constexpr int STAGE = 8;           // host->device expert staging ring (chunks below STREAM_ALL_MIN)
+// Step 3: from this chunk size on, every non-resident expert of every layer streams in a fixed order through a
+// RING_MAX-slot ring (nearly all 512 are routed at such a chunk), so the copy engine keeps working through the
+// attention halves instead of waiting for each layer's routing.
+constexpr int RING_MAX = 512;           // the arrays; the ring itself is ring_slots()
+constexpr int64_t STREAM_ALL_MIN = 2048;
+double g_pinned_share = 1.0;
+// The streamed ring: 384 slots when (nearly) every streamed expert is DMA'd from pinned RAM - measured on Q2_0,
+// 8192-token chunks: 96 slots 1153 tok/s, 384 1294 (the next layer's experts arrive during its attention half) -
+// and 96 when a large share goes through host copies (IQ3_S on 64 GB, a third unpinned: 96 slots 1216, 256 1070 -
+// the host copies are the limit and the bigger ring only takes cache slots).  STRATA_PREFILL_RING overrides.
+inline int ring_slots(size_t T) {
+    const char* v = std::getenv("STRATA_PREFILL_RING");
+    const int r = v ? std::atoi(v) : (g_pinned_share >= 0.9 ? 384 : 96);
+    const int big = r < 16 ? 16 : r > RING_MAX ? RING_MAX : r;
+    return (int64_t) T >= STREAM_ALL_MIN ? big : STAGE;
+}
+constexpr int DQ = 2;              // dequantized-expert ring (FP16 gate/up + down)
+
+double ms_since(Clock::time_point t) { return std::chrono::duration<double, std::milli>(Clock::now() - t).count(); }
+
+// Either cudaMalloc (owned, freed with the object) or a bump allocation from a borrowed region; with no base and
+// no region it only counts, which is how `bytes_needed` sizes the region.
+struct Alloc {
+    uint8_t* base = nullptr;
+    uint64_t cap = 0, used = 0;
+    bool count_only = false;
+    std::vector<void*>* owned = nullptr;
+    template <typename T> T *take(size_t n, bool &ok) try {
+        const uint64_t bytes = ((uint64_t) n * sizeof(T) + 256 + 255) & ~255ull;
+        if (count_only) { used += bytes; return nullptr; }
+        if (base != nullptr) {
+            if (used + bytes > cap) { ok = false; return nullptr; }
+            T* p = (T*) (base + used);
+            used += bytes;
+            return p;
+        }
+        void* p = nullptr;
+        if (DPCT_CHECK_ERROR(p = (void *)sycl::malloc_device(
+                                 bytes, dpct::get_in_order_queue())) != 0) {
+            ok = false; return nullptr;
+        }
+        owned->push_back(p);
+        used += bytes;
+        return (T*) p;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+};
+
+}  // namespace
+
+// Step 4 of the prompt-speed plan: the experts the arena could not pin (a third of the streamed ones on IQ3_S) are
+// copied into pinned buffers by these threads, ahead of the launches.  Copied in line by the launching thread they
+// left the GPU without queued work while each ~2 MB memcpy ran (~15 s of a 32K prompt on IQ3_S).  Job j - a layer's
+// j-th unpinned expert, in launch order - lands in host buffer j % kRing, which is free again once the DMA of job
+// j - kRing (recorded by the launching thread, `issued`) is done.
+struct Stager {
+    // D-5: the pinned ring's depth (STRATA_STAGER_RING, default 16) - how far the host copies can run ahead of the
+    // DMAs of the unpinned experts' blobs
+    int kRing = 16;
+    struct Job { const uint8_t* src; size_t bytes; };
+    std::vector<uint8_t*> buf;
+    std::vector<char> pinned;
+    std::vector<std::vector<uint8_t>> pageable;   // the fallback when no more RAM can be pinned
+    std::vector<dpct::event_ptr> dma_done;
+    std::vector<Job> jobs;
+    std::unique_ptr<std::atomic<int>[]> ready;
+    size_t ready_cap = 0;
+    // gen << 32 | n << 16 | next index: a claim is a CAS on the generation it woke for (a thread late from the
+    // previous layer can never take a job of this one - the expert pool's issue #29 lesson)
+    std::atomic<uint64_t> head{0};
+    std::atomic<int> issued{0}, active{0};
+    uint32_t gen = 0;
+    bool quit = false;
+    std::mutex mu;
+    std::condition_variable cv;
+    std::vector<std::thread> threads;
+    int device = 0;
+
+    bool init(size_t blob_bytes, int nthreads) {
+        if (const char* v = std::getenv("STRATA_STAGER_RING")) kRing = std::clamp(std::atoi(v), 2, 256);
+        buf.assign((size_t) kRing, nullptr);
+        pinned.assign((size_t) kRing, 0);
+        dma_done.assign((size_t) kRing, nullptr);
+        pageable.resize(kRing);
+        for (int i = 0; i < kRing; ++i) {
+            /*
+            DPCT1048:14: The original value cudaHostAllocDefault is not
+            meaningful in the migrated code and was removed or replaced with 0.
+            You may need to check the migrated code.
+            */
+            pinned[i] = DPCT_CHECK_ERROR(
+                            buf[i] = (unsigned char *)sycl::malloc_host(
+                                blob_bytes, dpct::get_in_order_queue())) == 0;
+            if (!pinned[i]) {
+                /*
+                DPCT1026:1009: The call to cudaGetLastError was removed because
+                this functionality is redundant in SYCL.
+                */
+                pageable[(size_t)i].resize(blob_bytes);
+                buf[i] = pageable[(size_t) i].data();
+            }
+            if (DPCT_CHECK_ERROR(dma_done[i] = new sycl::event()) !=
+                0) return false;
+        }
+        device = dpct::get_current_device_id();
+        for (int t = 0; t < nthreads; ++t) threads.emplace_back([this] { work(); });
+        return true;
+    }
+    ~Stager() {
+        finish();
+        { std::lock_guard<std::mutex> lk(mu); quit = true; }
+        cv.notify_all();
+        for (auto& t : threads) t.join();
+        for (int i = 0; i < kRing; ++i) {
+            if (dma_done[i]) dpct::destroy_event(dma_done[i]);
+            if (buf[i] && pinned[i])
+                sycl::free(buf[i], dpct::get_in_order_queue());
+        }
+    }
+    void work() {
+        /*
+        DPCT1093:1010: The "device" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        dpct::select_device(device);
+        uint32_t seen = 0;
+        for (;;) {
+            {
+                std::unique_lock<std::mutex> lk(mu);
+                cv.wait(lk, [&] { return quit || gen != seen; });
+                if (quit) return;
+                seen = gen;
+            }
+            for (;;) {
+                active.fetch_add(1, std::memory_order_acq_rel);
+                const int j = claim(seen);
+                if (j < 0) { active.fetch_sub(1, std::memory_order_acq_rel); break; }
+                const int b = j % kRing;
+                if (j >= kRing) {
+                    while (issued.load(std::memory_order_acquire) <= j - kRing) std::this_thread::yield();
+                    dma_done[b]->wait_and_throw();
+                }
+                std::memcpy(buf[b], jobs[(size_t) j].src, jobs[(size_t) j].bytes);
+                ready[(size_t) j].store(1, std::memory_order_release);
+                active.fetch_sub(1, std::memory_order_acq_rel);
+            }
+        }
+    }
+    int claim(uint32_t g) {
+        uint64_t cur = head.load(std::memory_order_acquire);
+        for (;;) {
+            if ((uint32_t) (cur >> 32) != g) return -1;
+            const int n = (int) ((cur >> 16) & 0xffff), j = (int) (cur & 0xffff);
+            if (j >= n) return -1;
+            if (head.compare_exchange_weak(cur, cur + 1, std::memory_order_acq_rel, std::memory_order_acquire)) return j;
+        }
+    }
+    /// A layer's jobs; the previous layer's are finished (finish()).
+    void start(std::vector<Job>&& js) {
+        if (js.empty()) return;
+        std::lock_guard<std::mutex> lk(mu);
+        jobs = std::move(js);
+        if (ready_cap < jobs.size()) {
+            ready_cap = jobs.size() * 2;
+            ready.reset(new std::atomic<int>[ready_cap]);
+        }
+        for (size_t i = 0; i < jobs.size(); ++i) ready[i].store(0, std::memory_order_relaxed);
+        issued.store(0);
+        ++gen;
+        head.store((uint64_t) gen << 32 | (uint64_t) jobs.size() << 16, std::memory_order_release);
+        cv.notify_all();
+    }
+    /// Job j's bytes, in a pinned buffer (waits for the copy).
+    const uint8_t* wait(int j) {
+        while (!ready[(size_t) j].load(std::memory_order_acquire)) std::this_thread::yield();
+        return buf[j % kRing];
+    }
+    /// The launching thread queued job j's DMA on `copy`: its buffer is free once that is done.
+    void issued_one(int j, dpct::queue_ptr copy) {
+        dpct::sync_barrier(dma_done[j % kRing], copy);
+        issued.store(j + 1, std::memory_order_release);
+    }
+    /// No job is running after this (the end of a layer, or an early return in the middle of one).
+    void finish() {
+        head.store((uint64_t) gen << 32, std::memory_order_release);   // n = 0: nothing more to claim
+        issued.store(1 << 30, std::memory_order_release);
+        while (active.load(std::memory_order_acquire) != 0) std::this_thread::yield();
+    }
+};
+
+struct Prefill::Impl {
+    const core::WeightTable* wt = nullptr;
+    const core::ModelGeometry* g = nullptr;
+    core::SessionState* ss = nullptr;
+    core::ExpertSource* src = nullptr;
+    const core::ExpertCache* cache = nullptr;
+    const int32_t* host_res = nullptr;
+    int64_t T = 0, T_max = 0;
+    bool borrowed = false;
+    dpct::queue_ptr cs = &dpct::get_in_order_queue(),
+                    copy = &dpct::get_in_order_queue();
+    Gemm gemm;
+    std::vector<void*> owned;
+    // chunk buffers
+    float *emb = nullptr, *R = nullptr, *xn = nullptr, *lo = nullptr, *gated = nullptr, *inj = nullptr;
+    uint16_t *xn16 = nullptr, *lo16 = nullptr;
+    float* mixed = nullptr;
+    uint16_t *mixed_bf = nullptr, *mixed_h = nullptr;
+    float* bo = nullptr;
+    // GDN
+    float *qkv = nullptr, *z = nullptr, *ab = nullptr, *gate = nullptr, *beta = nullptr, *hbuf = nullptr, *y = nullptr;
+    uint16_t* y_h = nullptr;
+    // QSA
+    float *Kc = nullptr, *Vc = nullptr, *Qf = nullptr, *q = nullptr, *idx_raw = nullptr, *q_idx = nullptr, *attn = nullptr;
+    uint16_t* attn_h = nullptr;
+    int32_t* steps_dev = nullptr;
+    std::vector<int32_t> steps_host;
+    int32_t* sel_ids = nullptr;
+    float* sel_scores = nullptr;          // [sel_batch, max_blocks]
+    int64_t sel_batch = 256, max_blocks = 0;
+    float* attn_scratch = nullptr;
+    int64_t attn_batch = 32, cap = 0;
+    // MoE
+    float *logits = nullptr, *w = nullptr, *GU = nullptr, *Dm = nullptr, *sgate = nullptr, *sup = nullptr,
+          *shared = nullptr, *sg = nullptr;
+    int32_t *ids = nullptr, *slot_dev = nullptr, *src_dev = nullptr;
+    uint16_t *Xs = nullptr, *Hh = nullptr, *sh_h = nullptr;
+    // step 2b (MMQ): the activations quantized per layer, H in FP32 and its group's quantized rows, the identity
+    // row map, the group bounds, the group buffers of gathered experts
+    void *Xq = nullptr, *Hq = nullptr;
+    float* H = nullptr;
+    int32_t *ids_identity = nullptr, *bounds_dev = nullptr;
+    uint8_t *grp_gu = nullptr, *grp_d = nullptr;
+    std::vector<int32_t> bounds_host;
+    std::unique_ptr<mmq::Context> mmq_ctx;
+    std::vector<int32_t> ids_host, slot_host, src_host, cnt, off;
+    uint16_t* dq_gu[DQ] = {};
+    uint16_t* dq_d[DQ] = {};
+    uint8_t* stage_dev[RING_MAX] = {};
+    int ring = STAGE;                        // the slots of this layout's ring (ring_slots)
+    std::unique_ptr<Stager> stager;          // the unpinned experts' host copies (step 4)
+    dpct::event_ptr copied[RING_MAX] = {}, used[RING_MAX] = {};
+    bool stage_live[RING_MAX] = {};
+    // PLE
+    float* ple_emb = nullptr;
+    std::vector<float> ple_pageable[2];      // the fallback when no more RAM can be pinned
+    float* ple_emb_host[2] = {};             // pinned, double-buffered: the next chunk's rows are read while this
+    dpct::event_ptr ple_copied[2] =
+        {}; // one runs; the event marks that buffer's upload done
+    std::vector<uint32_t> ple_rows[2];
+    float* ple_norm = nullptr;
+    uint8_t* region = nullptr;               // the attention/MoE scratch region (idle while the PLE block runs)
+    uint64_t region_bytes = 0;
+    PrefillStats* stats = nullptr;
+    // KV streaming: one layer's whole K/V, staged from the host copy per layer and chunk (identity layout)
+    strata::kernels::KvHostPools stage;
+    int32_t* ident_table = nullptr;
+    // layer split: the device, and the hand-off to the next stage (two pinned chunk buffers, used in turn)
+    int device = -1;
+    float* hand[2] = {};
+    // C-4: the chunk's token ids on the device, for one batched embedding gather
+    int32_t* tok_dev = nullptr;
+    std::vector<int32_t> tok_host;
+};
+
+namespace {
+// the staging pool of a streamed session: every page of one layer (same sequence in init and bytes_needed)
+// STRATA_KV_STAGE_OWN (A/B only): the staging pool gets its own allocation instead of borrowed expert slots, so a
+// streamed run lends the prompt path exactly the slots a resident one does (a lent expert runs on the CPU, which
+// rounds differently: without this an A/B compares two expert placements as well as two KV placements)
+bool stage_own() { static const bool v = std::getenv("STRATA_KV_STAGE_OWN") != nullptr; return v; }
+void take_stage(Alloc& o_borrowed, const core::SessionState& ss, const strata::kernels::QsaShapes& s,
+                strata::kernels::KvHostPools& st, bool& ok) {
+    const core::QsaState& q0 = ss.qsa_states[0];
+    if (q0.kv_mode != 1) return;
+    if (stage_own() && o_borrowed.count_only) return;
+    Alloc own;
+    own.owned = o_borrowed.owned;
+    Alloc& o = stage_own() ? own : o_borrowed;
+    const size_t rows = (size_t) q0.n_pages * s.n_head_kv * s.page_size;
+    if (q0.kv_q4) {
+        st.k_q4 = o.take<uint8_t>(rows * strata::kernels::kv_q4_bytes_per_head((int) s.head_dim), ok);
+        st.v_q4 = o.take<uint8_t>(rows * strata::kernels::kv_q4_bytes_per_head((int) s.head_dim), ok);
+    } else if (q0.kv_int8) {
+        st.k_q = o.take<int8_t>(rows * s.head_dim, ok);
+        st.v_q = o.take<int8_t>(rows * s.head_dim, ok);
+        st.k_scale = o.take<uint16_t>(rows * (s.head_dim / 64), ok);
+        st.v_scale = o.take<uint16_t>(rows * (s.head_dim / 64), ok);
+    } else {
+        st.k_pool = o.take<uint16_t>(rows * s.head_dim, ok);
+        st.v_pool = o.take<uint16_t>(rows * s.head_dim, ok);
+    }
+}
+strata::kernels::QsaAttnPools pools_of(const strata::kernels::KvHostPools& h, const int32_t* table) {
+    strata::kernels::QsaAttnPools p;
+    p.k_pool = h.k_pool; p.v_pool = h.v_pool; p.k_q = h.k_q; p.v_q = h.v_q; p.k_scale = h.k_scale; p.v_scale = h.v_scale;
+    p.k_q4 = h.k_q4; p.v_q4 = h.v_q4;
+    p.page_table = table;
+    return p;
+}
+}  // namespace
+
+Prefill::Prefill() : impl_(new Impl) {}
+Prefill::~Prefill() {
+    if (!impl_) return;
+    if (impl_->cs) impl_->cs->wait();
+    for (int i = 0; i < RING_MAX; ++i) {
+        if (impl_->copied[i]) dpct::destroy_event(impl_->copied[i]);
+        if (impl_->used[i]) dpct::destroy_event(impl_->used[i]);
+    }
+    for (int b = 0; b < 2; ++b) {
+        if (impl_->hand[b])
+            sycl::free(impl_->hand[b], dpct::get_in_order_queue());
+        if (impl_->ple_copied[b]) dpct::destroy_event(impl_->ple_copied[b]);
+        if (impl_->ple_emb_host[b] && impl_->ple_pageable[b].empty())
+            sycl::free(impl_->ple_emb_host[b], dpct::get_in_order_queue());
+    }
+    if (impl_->copy) dpct::get_current_device().destroy_queue(impl_->copy);
+    for (void *p : impl_->owned)
+        DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
+}
+
+namespace {
+constexpr int64_t GEMM_SCRATCH = 32ll << 20;        // FP16 elements for the largest dequantized dense weight
+constexpr size_t GEMM_WS = 32u << 20;               // cuBLAS workspace
+
+// THE ATTENTION HALF AND THE MoE HALF SHARE THEIR BUFFERS.  A layer runs its attention (GDN or QSA), writes it back
+// into the residual, and only then its MoE, so the three sets of scratch are never live at once: one region the size
+// of the largest holds them all.  That is ~260 KB of the ~680 KB a prompt token cost - which is what lets a chunk
+// grow (every expert is streamed once per chunk, so a bigger chunk streams fewer bytes per token).  The sizes are
+// counted with the same `take` sequence `init` uses; a mismatch makes `init` fail with "do not fit", never overlap.
+uint64_t gdn_set_bytes(size_t T) {
+    Alloc a; a.count_only = true; bool ok = true;
+    a.take<float>(T * C, ok); a.take<float>(T * ZV, ok); a.take<float>(T * 2 * HV, ok); a.take<float>(T * HV, ok);
+    a.take<float>(T * HV, ok); a.take<float>(T * C, ok); a.take<float>(T * ZV, ok); a.take<uint16_t>(T * ZV, ok);
+    return a.used;
+}
+uint64_t qsa_set_bytes(size_t T, int64_t cap, int64_t max_blocks, int64_t sel_batch, int64_t attn_batch,
+                       const strata::kernels::QsaShapes& s) {
+    Alloc a; a.count_only = true; bool ok = true;
+    a.take<float>(T * 512, ok); a.take<float>(T * 512, ok); a.take<float>(T * 12288, ok); a.take<float>(T * ZV, ok);
+    a.take<float>(T * 128, ok); a.take<float>(T * 512, ok); a.take<float>(T * ZV, ok); a.take<uint16_t>(T * ZV, ok);
+    a.take<int32_t>(T * (size_t) cap, ok);
+    a.take<float>((size_t) sel_batch * (size_t) max_blocks, ok);
+    a.take<float>((size_t) attn_batch * strata::kernels::qsa_decode_attn_scratch_floats(cap, s), ok);
+    return a.used;
+}
+// Step 2b: which layers' experts go through MMQ (both weight types covered; the Strata Q2_0 pack always - its blob
+// is converted to GGUF Q2_0 blocks on the gather), whether any layer keeps the FP16 path (IQ1_M), and the largest
+// gate/up and down matrices a group buffer slot holds.  STRATA_PREFILL_MMQ=0: the FP16 path everywhere (the A/B).
+constexpr int MMQ_GROUP = 16;                  // experts per MMQ launch (the gather is per expert, as blobs arrive)
+// MMQ reads up to one 256-value tile past a matrix's last row when the row length is not a multiple of it (the down
+// product: 640 values).  Those bytes meet zero activations, which is harmless only if they decode to finite numbers -
+// llama.cpp zero-pads after every tensor, and so does a group buffer: this many zeroed bytes follow its last expert.
+constexpr size_t MMQ_TAIL = 4096;
+struct MmqPlan {
+    bool any = false, fallback = true;
+    std::vector<char> layer;                   // per layer: MMQ
+    size_t gu_max = 0, d_max = 0;
+};
+const MmqPlan& mmq_plan() {
+    static const MmqPlan plan = [] {
+        MmqPlan p;
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        const char* env = std::getenv("STRATA_PREFILL_MMQ");
+        const bool on = mmq::built() && (env == nullptr || std::atoi(env) != 0);
+        const int64_t layers = lay.native ? (int64_t) lay.fmt.size() : lay.n_layers;
+        p.layer.assign((size_t) std::max<int64_t>(layers, 0), 0);
+        p.fallback = !on || layers <= 0;
+        for (int64_t l = 0; on && l < layers; ++l) {
+            const int gt = lay.native ? lay.fmt[(size_t) l].gu_type : 42, dt = lay.native ? lay.fmt[(size_t) l].d_type : 42;
+            if (!mmq::supported(gt) || !mmq::supported(dt)) { p.fallback = true; continue; }
+            p.layer[(size_t) l] = 1;
+            p.any = true;
+            p.gu_max = std::max(p.gu_max, mmq::matrix_bytes(gt, 1280, N));
+            p.d_max = std::max(p.d_max, mmq::matrix_bytes(dt, N, 640));
+        }
+        return p;
+    }();
+    return plan;
+}
+uint64_t moe_set_bytes(size_t T, int64_t n_expert) {
+    const MmqPlan& mp = mmq_plan();
+    Alloc a; a.count_only = true; bool ok = true;
+    a.take<float>(T * n_expert, ok); a.take<float>(T * K, ok); a.take<int32_t>(T * K, ok); a.take<int32_t>(T * K, ok);
+    a.take<int32_t>(T * K, ok);
+    if (mp.fallback) a.take<uint16_t>(T * K * N, ok);
+    a.take<float>(T * K * 1280, ok);
+    if (mp.fallback) a.take<uint16_t>(T * K * 640, ok);
+    a.take<float>(T * K * N, ok); a.take<float>(T * 640, ok);
+    a.take<float>(T * 640, ok); a.take<uint16_t>(T * 640, ok); a.take<float>(T * N, ok); a.take<float>(T, ok);
+    if (mp.any) {
+        a.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), N), ok);
+        a.take<float>(T * K * 640, ok);
+        a.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), 640), ok);
+    }
+    return a.used;
+}
+}
+
+bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
+                   core::SessionState &ss, core::ExpertSource *src,
+                   const core::ExpertCache *cache, const int32_t *host_res,
+                   int64_t chunk, void *stream, std::string &err, void *borrow,
+                   uint64_t borrow_bytes) try {
+    Impl& m = *impl_;
+    m.wt = &wt; m.g = &g; m.ss = &ss; m.src = src; m.cache = cache; m.host_res = host_res;
+    m.T = chunk; m.cs = strata::q_of(stream); m.stats = &stats_;
+    if (g.n_embd != N || g.hc != HC || g.hc_lr != LR || g.n_expert < 1 || ss.k != K) {
+        err = "prefill: geometry differs from the artifact's"; return false;
+    }
+    m.device = dpct::get_current_device_id();
+    if (stage_le_ < 0) stage_le_ = g.n_layers;
+    if (stage_lb_ < 0 || stage_lb_ >= stage_le_ || stage_le_ > g.n_layers || (stage_le_ < g.n_layers) != (next_ != nullptr)) {
+        err = "prefill: the stage's layer range is wrong";
+        return false;
+    }
+    for (int b = 0; next_ != nullptr && b < 2; ++b)
+        /*
+        DPCT1048:15: The original value cudaHostAllocPortable is not meaningful
+        in the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        if (!m.hand[b] &&
+            DPCT_CHECK_ERROR(
+                m.hand[b] = (float *)sycl::malloc_host(
+                    (size_t)chunk * D * 4, dpct::get_in_order_queue())) != 0) {
+            err = "prefill: the layer split's hand-off buffers";
+            return false;
+        }
+    if (m.tok_dev == nullptr) {
+        if (DPCT_CHECK_ERROR(m.tok_dev = sycl::malloc_device<int32_t>(
+                                 (size_t)chunk, dpct::get_in_order_queue())) !=
+            0) {
+            err = "prefill: the token id buffer";
+            return false;
+        }
+        m.owned.push_back(m.tok_dev);
+        m.tok_host.resize((size_t) chunk);
+    }
+    /*
+    DPCT1025:1011: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    if (DPCT_CHECK_ERROR(
+            m.copy = dpct::get_current_device().create_queue(true)) != 0) {
+        err = "prefill: copy stream"; return false;
+    }
+    const size_t T = (size_t) chunk;
+    m.T_max = chunk;
+    m.borrowed = borrow != nullptr;
+    bool ok = true;
+    // one-time: events, the stager, the host buffers (for the largest chunk), the identity page table
+    for (int i = 0; i < RING_MAX; ++i) {
+        if (DPCT_CHECK_ERROR(m.copied[i] = new sycl::event()) != 0) ok = false;
+        if (DPCT_CHECK_ERROR(m.used[i] = new sycl::event()) != 0) ok = false;
+    }
+    if (!m.stager) {
+        m.stager = std::make_unique<Stager>();
+        const int hw = (int) std::thread::hardware_concurrency();
+        const char* stv = std::getenv("STRATA_STAGER_THREADS");   // D-5: the host copy threads of unpinned blobs
+        if (!m.stager->init((size_t) MAXBLOB(), stv ? std::clamp(std::atoi(stv), 1, 32) : std::max(2, std::min(4, hw / 4))))
+            ok = false;
+    }
+    m.steps_host.resize(T * strata::kernels::kStepCount);
+    m.ids_host.resize(T * K); m.slot_host.resize(T * K); m.src_host.resize(T * K); m.cnt.resize(m.g->n_expert); m.off.resize(m.g->n_expert + 1);
+    for (int b = 0; b < 2; ++b) {
+        if (!m.ple_emb_host[b] &&
+            /*
+            DPCT1048:16: The original value cudaHostAllocDefault is not
+            meaningful in the migrated code and was removed or replaced with 0.
+            You may need to check the migrated code.
+            */
+            DPCT_CHECK_ERROR(
+                m.ple_emb_host[b] = (float *)sycl::malloc_host(
+                    (size_t)T * N * 4, dpct::get_in_order_queue())) != 0) {
+            /*
+            DPCT1026:1012: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            m.ple_pageable[b].resize(
+                T * N); // pageable: the upload is staged before it returns
+            m.ple_emb_host[b] = m.ple_pageable[b].data();
+        }
+        if (!m.ple_copied[b] &&
+            DPCT_CHECK_ERROR(m.ple_copied[b] = new sycl::event()) != 0)
+            ok = false;
+        m.ple_rows[b].resize(T * strata::kernels::PLE_N_HEADS);
+    }
+    if (ss.qsa_states[0].kv_mode == 1) {   // KV streaming: the staging pool's identity page table
+        const int64_t pages = ss.qsa_states[0].n_pages;
+        std::vector<int32_t> ident((size_t) pages);
+        for (int64_t i = 0; i < pages; ++i) ident[(size_t) i] = (int32_t) i;
+        if (DPCT_CHECK_ERROR(
+                m.ident_table = (int32_t *)sycl::malloc_device(
+                    ident.size() * 4, dpct::get_in_order_queue())) != 0 ||
+            /*
+            DPCT1114:1013: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                m.ident_table, ident.data(), ident.size() * 4)) != 0)
+            ok = false;
+        else
+            m.owned.push_back(m.ident_table);
+    }
+    if (!ok) { err = "prefill: host buffers or events for a chunk of " + std::to_string(chunk) + " tokens"; return false; }
+    Alloc o;
+    o.base = (uint8_t*) borrow;
+    o.cap = borrow_bytes;
+    o.owned = &m.owned;
+    {
+        uint16_t* gs = o.take<uint16_t>((size_t) GEMM_SCRATCH, ok);
+        void* ws = o.take<uint8_t>(GEMM_WS, ok);
+        if (!ok) { err = "prefill: GEMM scratch does not fit"; return false; }
+        if (!m.gemm.init_external(stream, gs, GEMM_SCRATCH, ws, GEMM_WS, err)) return false;
+    }
+    if (!carve(T, &o)) {
+        err = "prefill: device buffers for a chunk of " + std::to_string(chunk) + " tokens do not fit";
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// Every device buffer of a chunk of T tokens, from the Alloc `alloc` (after the GEMM scratch and workspace): `init`
+// once, and `relayout` for a request's own chunk.  The order is `bytes_needed`'s.
+bool Prefill::carve(size_t T, void* alloc) {
+    Impl& m = *impl_;
+    Alloc& o = *static_cast<Alloc*>(alloc);
+    const core::ModelGeometry& g = *m.g;
+    core::SessionState& ss = *m.ss;
+    bool ok = true;
+    m.emb = o.take<float>(T * N, ok); m.R = o.take<float>(T * D, ok); m.xn = o.take<float>(T * D, ok);
+    m.xn16 = o.take<uint16_t>(T * D, ok); m.lo = o.take<float>(T * LR, ok); m.lo16 = o.take<uint16_t>(T * LR, ok);
+    m.gated = o.take<float>(T * D, ok); m.inj = o.take<float>(T * HC, ok);
+    m.mixed = o.take<float>(T * N, ok); m.mixed_bf = o.take<uint16_t>(T * N, ok);
+    m.mixed_h = o.take<uint16_t>(T * N, ok); m.bo = o.take<float>(T * N, ok);
+    m.steps_dev = o.take<int32_t>(T * strata::kernels::kStepCount, ok);
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    m.cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
+    m.max_blocks = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    {
+        // one region for the attention half's and the MoE half's scratch (see gdn_set_bytes)
+        const uint64_t region = std::max({gdn_set_bytes(T), qsa_set_bytes(T, m.cap, m.max_blocks, m.sel_batch,
+                                                                           m.attn_batch, s), moe_set_bytes(T, m.g->n_expert)});
+        uint8_t* base = o.take<uint8_t>((size_t) region, ok);
+        m.region = base;
+        m.region_bytes = region;
+        Alloc a;
+        a.base = base; a.cap = region; a.owned = &m.owned;
+        m.qkv = a.take<float>(T * C, ok); m.z = a.take<float>(T * ZV, ok); m.ab = a.take<float>(T * 2 * HV, ok);
+        m.gate = a.take<float>(T * HV, ok); m.beta = a.take<float>(T * HV, ok); m.hbuf = a.take<float>(T * C, ok);
+        m.y = a.take<float>(T * ZV, ok); m.y_h = a.take<uint16_t>(T * ZV, ok);
+        Alloc b;
+        b.base = base; b.cap = region; b.owned = &m.owned;
+        m.Kc = b.take<float>(T * 512, ok); m.Vc = b.take<float>(T * 512, ok); m.Qf = b.take<float>(T * 12288, ok);
+        m.q = b.take<float>(T * ZV, ok); m.idx_raw = b.take<float>(T * 128, ok); m.q_idx = b.take<float>(T * 512, ok);
+        m.attn = b.take<float>(T * ZV, ok); m.attn_h = b.take<uint16_t>(T * ZV, ok);
+        m.sel_ids = b.take<int32_t>(T * (size_t) m.cap, ok);
+        m.sel_scores = b.take<float>((size_t) m.sel_batch * (size_t) m.max_blocks, ok);
+        m.attn_scratch = b.take<float>((size_t) m.attn_batch * strata::kernels::qsa_decode_attn_scratch_floats(m.cap, s), ok);
+        Alloc c;
+        c.base = base; c.cap = region; c.owned = &m.owned;
+        m.logits = c.take<float>(T * m.g->n_expert, ok); m.w = c.take<float>(T * K, ok); m.ids = c.take<int32_t>(T * K, ok);
+        m.slot_dev = c.take<int32_t>(T * K, ok); m.src_dev = c.take<int32_t>(T * K, ok);
+        const MmqPlan& mp = mmq_plan();
+        m.Xs = mp.fallback ? c.take<uint16_t>(T * K * N, ok) : nullptr;
+        m.GU = c.take<float>(T * K * 1280, ok);
+        m.Hh = mp.fallback ? c.take<uint16_t>(T * K * 640, ok) : nullptr;
+        m.Dm = c.take<float>(T * K * N, ok);
+        m.sgate = c.take<float>(T * 640, ok); m.sup = c.take<float>(T * 640, ok); m.sh_h = c.take<uint16_t>(T * 640, ok);
+        m.shared = c.take<float>(T * N, ok); m.sg = c.take<float>(T, ok);
+        if (mp.any) {
+            m.Xq = c.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), N), ok);
+            m.H = c.take<float>(T * K * 640, ok);
+            m.Hq = c.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), 640), ok);
+        }
+        if (base == nullptr) ok = false;
+    }
+    for (int i = 0; i < DQ; ++i) { m.dq_gu[i] = o.take<uint16_t>(1280 * 2560, ok); m.dq_d[i] = o.take<uint16_t>(2560 * 640, ok); }
+    if (mmq_plan().any) {
+        const MmqPlan& mp = mmq_plan();
+        m.ids_identity = o.take<int32_t>(T * K, ok);
+        m.bounds_dev = o.take<int32_t>((size_t) (2 * (m.g->n_expert + m.g->n_expert / MMQ_GROUP + 2)), ok);
+        m.grp_gu = o.take<uint8_t>(MMQ_GROUP * mp.gu_max + MMQ_TAIL, ok);
+        m.grp_d = o.take<uint8_t>(MMQ_GROUP * mp.d_max + MMQ_TAIL, ok);
+        // (written at every run's start, not here: when serving, these are live expert-cache slots until a request
+        // lends them - a write now would corrupt a resident expert)
+        if (!m.mmq_ctx) m.mmq_ctx = std::make_unique<mmq::Context>();
+    }
+    m.ring = ring_slots(T);
+    for (int i = 0; i < m.ring; ++i) {
+        m.stage_dev[i] = o.take<uint8_t>((size_t) MAXBLOB(), ok);
+        m.stage_live[i] = false;                        // a new buffer: nothing of an earlier layout to wait for
+    }
+    m.ple_emb = o.take<float>(T * N, ok);
+    m.ple_norm = o.take<float>((size_t) strata::kernels::NG_HC_DIM, ok);
+    take_stage(o, ss, s, m.stage, ok);
+    m.T = (int64_t) T;
+    return ok;
+}
+
+bool Prefill::relayout(int64_t chunk, void *borrow, uint64_t borrow_bytes,
+                       std::string &err) try {
+    Impl& m = *impl_;
+    if (!m.borrowed || borrow == nullptr || chunk <= 0 || chunk > m.T_max) {
+        err = "prefill: relayout needs borrowed buffers and a chunk of at most " + std::to_string(m.T_max);
+        return false;
+    }
+    if (DPCT_CHECK_ERROR(m.cs->wait()) != 0 ||
+        DPCT_CHECK_ERROR(m.copy->wait()) != 0) {
+        err = "prefill: relayout: the stream failed";
+        return false;
+    }
+    bool ok = true;
+    Alloc o;
+    o.base = (uint8_t*) borrow;
+    o.cap = borrow_bytes;
+    o.owned = &m.owned;
+    uint16_t* gs = o.take<uint16_t>((size_t) GEMM_SCRATCH, ok);
+    void* ws = o.take<uint8_t>(GEMM_WS, ok);
+    if (ok) m.gemm.rebind(gs, GEMM_SCRATCH, ws, GEMM_WS);
+    if (!ok || !carve((size_t) chunk, &o)) {
+        err = "prefill: device buffers for a chunk of " + std::to_string(chunk) + " tokens do not fit";
+        return false;
+    }
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+int64_t Prefill::chunk() const { return impl_->T; }
+void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
+double Prefill::pinned_share() { return g_pinned_share; }
+
+uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk) {
+    // the same allocation sequence as `init`, counted
+    const size_t T = (size_t) chunk;
+    bool ok = true;
+    Alloc o;
+    o.count_only = true;
+    o.take<uint16_t>((size_t) GEMM_SCRATCH, ok);
+    o.take<uint8_t>(GEMM_WS, ok);
+    auto f = [&](size_t n) { o.take<float>(n, ok); };
+    f(T * N); f(T * D); f(T * D); o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
+    f(T * D); f(T * HC); f(T * N); o.take<uint16_t>(T * N, ok); o.take<uint16_t>(T * N, ok); f(T * N);
+    o.take<int32_t>(T * strata::kernels::kStepCount, ok);
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    const int64_t cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
+    const int64_t max_blocks = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    o.take<uint8_t>((size_t) std::max({gdn_set_bytes(T), qsa_set_bytes(T, cap, max_blocks, 256, 32, s),
+                                       moe_set_bytes(T, g.n_expert)}), ok);
+    for (int i = 0; i < DQ; ++i) { o.take<uint16_t>(1280 * 2560, ok); o.take<uint16_t>(2560 * 640, ok); }
+    if (mmq_plan().any) {
+        const MmqPlan& mp = mmq_plan();
+        o.take<int32_t>(T * K, ok);
+        o.take<int32_t>((size_t) (2 * (g.n_expert + g.n_expert / MMQ_GROUP + 2)), ok);
+        o.take<uint8_t>(MMQ_GROUP * mp.gu_max + MMQ_TAIL, ok);
+        o.take<uint8_t>(MMQ_GROUP * mp.d_max + MMQ_TAIL, ok);
+    }
+    for (int i = 0; i < ring_slots(T); ++i) o.take<uint8_t>((size_t) MAXBLOB(), ok);
+    f(T * N);
+    f((size_t) strata::kernels::NG_HC_DIM);
+    strata::kernels::KvHostPools stage;
+    take_stage(o, ss, s, stage, ok);
+    return o.used + (8u << 20);   // alignment slack
+}
+
+namespace {
+
+const core::WeightRef* need(const core::LayerView& v, const char* suffix, std::string& err) {
+    const core::WeightRef* r = v.get(suffix);
+    if (!r) err = v.name(suffix) + " is missing";
+    return r;
+}
+bool native_proj(Gemm& gm, const core::WeightRef* w, const uint16_t* X, float* Y, int64_t T, const std::string& name,
+                 std::string& err, int64_t ldy = 0) {
+    if (!w->native_data) { err = "prefill: " + name + " has no native GGUF blocks (run with --native)"; return false; }
+    gm.native(X, w->native_type, w->native_data, Y, T, w->ne1, w->ne0, ldy);
+    return true;
+}
+bool bf16_proj(Gemm& gm, const core::WeightRef* w, const uint16_t* X, float* Y, int64_t T, const std::string& name,
+               std::string& err, int64_t ldy = 0) {
+    if (w->kind != core::WeightKind::Bf16InF32 || !w->data) { err = "prefill: " + name + " is not a resident BF16 tensor"; return false; }
+    gm.bf16(X, (const uint16_t*) w->data, Y, T, w->ne1 > 0 ? w->ne1 : 1, w->ne0, ldy);
+    return true;
+}
+
+}  // namespace
+
+namespace {
+// STRATA_PREFILL_TIMING=1: the prompt path's GPU time by phase.  Events are recorded on the compute stream in order;
+// the time between two consecutive marks is charged to the phase of the first, so a gap where the GPU waits (for the
+// host's expert grouping, or for an expert's copy) lands on the phase that was waiting.  Events are reused: the marks
+// are folded at every MoE layer's host sync, after which all of them have completed.
+enum PfPhase { kPfStart, kPfHc, kPfGdn, kPfQsa, kPfQsaIdx, kPfQsaSel, kPfQsaAttn, kPfRouter, kPfHostGroup, kPfGather,
+               kPfWaitCopy, kPfDequant, kPfGemmGU, kPfGemmD, kPfCombine, kPfPle, kPfKvStage, kPfGdnConv, kPfGdnRec, kPfGdnOut,
+               kPfCount };
+const char* const kPfNames[kPfCount] = {"embed+steps", "hc read", "gdn", "qsa proj", "qsa indexer", "qsa select",
+                                        "qsa attn", "router+shared", "host grouping", "gather", "wait copy", "dequant",
+                                        "gemm gate/up", "gemm down", "combine", "ple", "kv stage", "gdn conv+gates",
+                                        "gdn recurrence", "gdn out proj"};
+struct PfTimer {
+    bool on = std::getenv("STRATA_PREFILL_TIMING") != nullptr;
+    std::vector<dpct::event_ptr> ev;
+    std::vector<int> ph;
+    size_t used = 0;
+    double ms[kPfCount] = {};
+    void mark(int phase, dpct::queue_ptr s) {
+        if (!on) return;
+        if (used == ev.size()) {
+            dpct::event_ptr e = nullptr;
+            e = new sycl::event();
+            ev.push_back(e);
+            ph.push_back(0);
+        }
+        ph[used] = phase;
+        dpct::sync_barrier(ev[used], s);
+        ++used;
+    }
+    // every recorded mark has completed (the stream was synchronized): charge the gaps, keep the last mark
+    void fold() try {
+        if (!on || used < 2) return;
+        for (size_t i = 0; i + 1 < used; ++i) {
+            float t = 0.0f;
+            if (DPCT_CHECK_ERROR(
+                    t = (ev[i + 1]
+                             ->get_profiling_info<
+                                 sycl::info::event_profiling::command_end>() -
+                         ev[i]
+                             ->get_profiling_info<sycl::info::event_profiling::
+                                                      command_start>()) /
+                        1000000.0f) == 0) ms[ph[i]] += t;
+        }
+        std::swap(ev[0], ev[used - 1]);
+        std::swap(ph[0], ph[used - 1]);
+        used = 1;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    ~PfTimer() {
+        for (dpct::event_ptr e : ev) DPCT_CHECK_ERROR(dpct::destroy_event(e));
+    }
+};
+}  // namespace
+
+bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err) {
+    Impl& m = *impl_;
+    const core::OnDevice on_device(m.device);
+    const core::ModelGeometry& g = *m.g;
+    core::SessionState& ss = *m.ss;
+    const auto t_start = Clock::now();
+    const int64_t LB = stage_lb_, LE = stage_le_;
+    // the next stage reads chunk c on a thread while this one reads chunk c + 1 (declared first: an early return
+    // waits for it before anything it reads goes away)
+    std::string next_err;
+    std::future<bool> next_run;
+    int hand_buf = 0;
+    double host_sync_ms = 0, host_chunk_ms = 0, host_setup_ms = 0;   // STRATA_PREFILL_TIMING: the host's share
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    const uint64_t gdn_floats = (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
+                                (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
+    int32_t prev[2] = {ss.ple_prev[0], ss.ple_prev[1]};
+    PfTimer pt;
+    const dpct::queue_ptr cs = strata::q_of(m.cs);
+    // the MMQ row table lives in the borrowed cache slots, which the refill after a prompt overwrites with experts:
+    // write it again for every prompt (a layout is reused as long as the chunk and the slots are the same)
+    if (m.ids_identity != nullptr) mmq::iota(m.ids_identity, m.T * K, m.cs);
+    // The PLE rows of a chunk are read from the model file on the host (an SSD read per missed row): the chunk
+    // after this one is read on a thread while the GPU runs this one, into the other of two buffers.  The rows
+    // depend only on the tokens (the two before a position name its n-grams), so this is the same data.
+    const bool ple_on = ss.ple.ready() && LB <= 1 && 1 < LE;
+    // the PLE block batched over the chunk: the pinned postops and a BF16 or GGUF-native key (else token by token);
+    // STRATA_PLE_BATCH=0 keeps the per-token block (the A/B)
+    static const bool ple_batch_env = [] {
+        const char* v = std::getenv("STRATA_PLE_BATCH");
+        return v == nullptr || std::atoi(v) != 0;
+    }();
+    const bool ple_batch = ple_on && ple_batch_env && strata::kernels::ple_native_postops_enabled() &&
+                           (ss.ple.w.key_bf16 != nullptr || ss.ple.w.key_native_data != nullptr) &&
+                           m.region_bytes / ((uint64_t) (3 * strata::kernels::NG_HC_DIM + N + 4) * 4 + (uint64_t) N * 2 + 4096) >= 64;
+    const int32_t prev0[2] = {prev[0], prev[1]};
+    auto ple_gather = [&m, &ss, tokens, n, prev0](int64_t c0, int buf, std::string& e) -> bool {
+        const int64_t T = std::min(m.T, n - c0);
+        auto at = [&](int64_t i) { return i < 2 ? prev0[i] : (int32_t) tokens[i - 2]; };   // prev0, then the tokens
+        int32_t pv[2] = {at(c0), at(c0 + 1)};
+        for (int64_t t = 0; t < T; ++t) {
+            const int32_t tok = (int32_t) tokens[c0 + t];
+            strata::kernels::ngram_rows(&tok, pv, 1, ss.ple.consts,
+                                        m.ple_rows[buf].data() + t * strata::kernels::PLE_N_HEADS);
+            pv[0] = pv[1];
+            pv[1] = tok;
+        }
+        return ss.ple.table->gather_batch(m.ple_rows[buf].data(), (size_t) T, m.ple_emb_host[buf], e);
+    };
+    std::string ple_next_err;
+    std::future<bool> ple_next;             // declared after everything it reads: an early return waits for it
+    int ple_buf = 0;
+
+    for (int64_t c0 = 0; c0 < n; c0 += m.T) {
+        if (should_stop && should_stop()) { err = "cancelled"; return false; }
+        if (std::getenv("STRATA_TRACE")) { std::fprintf(stderr, "strata trace: prompt chunk %lld of %lld\n", (long long) c0, (long long) n); std::fflush(stderr); }
+        const int64_t T = std::min(m.T, n - c0), p0 = pos0 + c0;
+        ++stats_.chunks;
+        pt.mark(kPfStart, cs);
+        const auto tsetup = Clock::now();
+        // ---- embeddings, broadcast to the four streams - or, in a later stage of a layer split, the rows the
+        // previous stage handed on
+        if (hand_in_ != nullptr) {
+            /*
+            DPCT1124:1015: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(m.cs->memcpy(m.R, hand_in_ + (size_t)c0 * D,
+                                              (size_t)T * D * 4)) != 0) {
+                err = "prefill: the layer split's hand-off upload failed";
+                return false;
+            }
+        }
+        // C-4: the whole chunk's rows in one gather (the same per-element arithmetic as the per-token path, so the
+        // same bits); a chunk with picture rows, or a token outside the table, takes the per-token path
+        bool batched = hand_in_ == nullptr && m.tok_dev != nullptr;
+        const core::NativeEmbed* nemb = core::native_embed();
+        const core::WeightRef* wemb = nemb ? nullptr : m.wt->find("token_embd.weight");
+        if (batched && nemb == nullptr &&
+            (wemb == nullptr || wemb->codebook_iq4nl || wemb->ne0 != g.n_embd || wemb->group_elems <= 0 ||
+             (wemb->code_bits != 2 && wemb->code_bits != 4 && wemb->code_bits != 8)))
+            batched = false;
+        for (int64_t t = 0; batched && t < T; ++t) {
+            const int64_t tok = tokens[c0 + t];
+            if ((embd_rows && embd_rows[p0 + t]) || tok < 0 || (wemb && tok >= wemb->ne1)) batched = false;
+            else m.tok_host[(size_t) t] = (int32_t) tok;
+        }
+        if (batched) {
+            /*
+            DPCT1124:1016: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(m.cs->memcpy(m.tok_dev, m.tok_host.data(),
+                                              (size_t)T * sizeof(int32_t))) !=
+                0) {
+                err = "prefill: the token id upload failed";
+                return false;
+            }
+            if (nemb) {
+                nemb->gather_dev(m.tok_dev, T, m.emb, m.cs);
+            } else {
+                const auto* codes = (const uint8_t*) wemb->data;
+                const auto* scales = (const float*) (codes + wemb->codes_bytes);
+                const auto* offsets = wemb->has_offset ? (const float*) (codes + wemb->codes_bytes + wemb->scales_bytes)
+                                                       : nullptr;
+                strata::kernels::embedding_gather_dev(codes, scales, offsets, m.tok_dev, (int) T, wemb->ne0,
+                                                      wemb->code_bits, wemb->code_bias, wemb->group_elems,
+                                                      (uint64_t) (wemb->ne0 / (8 / wemb->code_bits)),
+                                                      (uint64_t) (wemb->ne0 / wemb->group_elems), m.emb, m.cs);
+            }
+        }
+        for (int64_t t = 0; hand_in_ == nullptr && !batched && t < T; ++t) {
+            const float* row = embd_rows ? embd_rows[p0 + t] : nullptr;
+            if (row) {
+                /*
+                DPCT1124:1017: cudaMemcpyAsync is migrated to asynchronous
+                memcpy API. While the origin API might be synchronous, it
+                depends on the type of operand memory, so you may need to call
+                wait() on event return by memcpy API to ensure synchronization
+                behavior.
+                */
+                if (DPCT_CHECK_ERROR(
+                        m.cs->memcpy(m.emb + t * N, row, (size_t)N * 4)) != 0) {
+                    err = "prefill: the image embedding upload failed";
+                    return false;
+                }
+            } else if (!core::embed_row(*m.wt, g, tokens[c0 + t], m.emb + t * N, m.cs, err)) {
+                return false;
+            }
+        }
+        if (hand_in_ == nullptr) gr_broadcast(m.emb, m.R, T, m.cs);
+        // ---- the PLE rows of the whole chunk, one batched SSD request (read ahead on a thread, see ple_gather)
+        if (ple_on) {
+            const auto tp = Clock::now();
+            if (!ple_next.valid()) {
+                if (!ple_gather(c0, ple_buf, err)) return false;
+            } else if (!ple_next.get()) {
+                err = ple_next_err;
+                return false;
+            }
+            /*
+            DPCT1124:1018: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            m.cs->memcpy(m.ple_emb, m.ple_emb_host[ple_buf], (size_t)T * N * 4);
+            dpct::sync_barrier(m.ple_copied[ple_buf], m.cs);
+            if (c0 + m.T < n) {
+                m.ple_copied[ple_buf ^ 1]
+                    ->wait_and_throw(); // the other buffer's upload (a chunk
+                                        // ago) is done
+                ple_next = std::async(std::launch::async, [&ple_gather, &ple_next_err, c1 = c0 + m.T, b = ple_buf ^ 1] {
+                    return ple_gather(c1, b, ple_next_err);
+                });
+            }
+            ple_buf ^= 1;
+            stats_.ms_ple += ms_since(tp);
+        }
+        for (int64_t t = 0; t < T; ++t) { prev[0] = prev[1]; prev[1] = (int32_t) tokens[c0 + t]; }
+        // ---- the QSA step records of every position in the chunk
+        for (int64_t t = 0; t < T; ++t) strata::kernels::qsa_step_fill(m.steps_host.data() + t * strata::kernels::kStepCount, p0 + t, s);
+        /*
+        DPCT1124:1014: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        m.cs->memcpy(m.steps_dev, m.steps_host.data(),
+                     (size_t)T * strata::kernels::kStepCount * 4);
+
+        int64_t qsa_index = 0, gdn_index = 0;
+        for (int64_t l = 0; l < LB; ++l) (core::is_qsa_layer(g, l) ? qsa_index : gdn_index) += 1;
+        // step 3: this chunk's stream - every non-resident expert of every layer, layer by layer in id order (entry
+        // k lands in ring slot k % ring); a copy is issued once the entry `ring` before it is consumed (its slot's
+        // `used` event recorded), so the copy stream never waits on an event that is not queued yet
+        const strata::kernels::cpu::ExpertLayout& lay0 = strata::kernels::cpu::expert_layout();
+        const bool stream_all = m.ring > STAGE && T >= STREAM_ALL_MIN && m.src != nullptr;
+        struct StreamEntry { int32_t l, e; const uint8_t* blob; int job; };
+        std::vector<StreamEntry> seq;
+        std::vector<size_t> seq_start;
+        size_t issued = 0, consumed = 0;
+        if (stream_all) {
+            seq_start.assign((size_t) g.n_layers + 1, 0);
+            std::vector<Stager::Job> js;
+            for (int64_t l = LB; l < LE; ++l) {
+                seq_start[(size_t) l] = seq.size();
+                for (int32_t e = 0; e < m.g->n_expert; ++e) {
+                    if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
+                    const uint8_t* b = m.src->blob(l, e);
+                    if (!b) { err = "prefill: expert source has no blob"; return false; }
+                    int job = -1;
+                    if (!m.src->pinned(l, e)) {
+                        job = (int) js.size();
+                        js.push_back({b, (size_t) lay0.blob_bytes(l)});
+                    }
+                    seq.push_back({(int32_t) l, e, b, job});
+                }
+            }
+            for (int64_t l = LE; l <= g.n_layers; ++l) seq_start[(size_t) l] = seq.size();
+            m.stager->start(std::move(js));
+        }
+        struct StagerDone {
+            Stager* st;
+            ~StagerDone() { if (st) st->finish(); }
+        } chunk_stager_done{stream_all ? m.stager.get() : nullptr};
+        auto issue_until = [&](size_t limit) {
+            try {
+        limit = std::min(limit, seq.size());
+            while (issued < limit) {
+                const StreamEntry& en = seq[issued];
+                const int sl = (int) (issued % (size_t) m.ring);
+                const auto th = Clock::now();
+                const size_t bytes = (size_t) lay0.blob_bytes(en.l);
+                if (m.stage_live[sl])(m.copy)->ext_oneapi_submit_barrier(
+                    {*m.used[sl]});
+                if (en.job < 0) {
+                    /*
+                    DPCT1124:1019: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    m.copy->memcpy(m.stage_dev[sl], en.blob, bytes);
+                    ++stats_.experts_dma;
+                } else {
+                    const uint8_t* hb = m.stager->wait(en.job);
+                    /*
+                    DPCT1124:1020: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    m.copy->memcpy(m.stage_dev[sl], hb, bytes);
+                    m.stager->issued_one(en.job, m.copy);
+                }
+                dpct::sync_barrier(m.copied[sl], m.copy);
+                m.stage_live[sl] = true;
+                stats_.ms_experts_host += ms_since(th);
+                ++stats_.experts_streamed;
+                ++issued;
+            }
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        // D-5: the stream is issued by its own host thread, so the thread launching the layers' kernels never waits
+        // behind a host copy of an unpinned blob (that wait left the GPU idle: the 'wait copy' / 'dequant' time of the
+        // i-quant prompts).  The same copies in the same order into the same slots, and a slot is refilled only once
+        // the compute stream has recorded that it is done with it: the same results.  STRATA_PREFILL_ISSUER=0: inline.
+        static const bool issuer_on = [] {
+            const char* v = std::getenv("STRATA_PREFILL_ISSUER");
+            return v == nullptr || std::atoi(v) != 0;
+        }();
+        std::atomic<size_t> a_issued{0}, a_consumed{0};
+        std::atomic<bool> a_stop{false};
+        double iss_ms = 0;
+        int64_t iss_streamed = 0, iss_dma = 0;
+        std::thread issuer;
+        struct IssuerJoin {
+            std::atomic<bool>* stop;
+            std::thread* t;
+            ~IssuerJoin() { if (t->joinable()) { stop->store(true); t->join(); } }
+        } issuer_join{&a_stop, &issuer};
+        const bool threaded_issue = stream_all && issuer_on;
+        if (threaded_issue) {
+            issuer = std::thread([&] {
+                const core::OnDevice od(m.device);
+                for (size_t idx = 0; idx < seq.size(); ++idx) {
+                    while (idx >= a_consumed.load(std::memory_order_acquire) + (size_t) m.ring) {
+                        if (a_stop.load(std::memory_order_acquire)) return;
+                        std::this_thread::yield();
+                    }
+                    const StreamEntry& en = seq[idx];
+                    const int sl = (int) (idx % (size_t) m.ring);
+                    const auto th = Clock::now();
+                    const size_t bytes = (size_t) lay0.blob_bytes(en.l);
+                    if (m.stage_live[sl])(m.copy)->ext_oneapi_submit_barrier(
+                        {*m.used[sl]});
+                    if (en.job < 0) {
+                        /*
+                        DPCT1124:1021: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.copy->memcpy(m.stage_dev[sl], en.blob, bytes);
+                        ++iss_dma;
+                    } else {
+                        const uint8_t* hb = m.stager->wait(en.job);
+                        /*
+                        DPCT1124:1022: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.copy->memcpy(m.stage_dev[sl], hb, bytes);
+                        m.stager->issued_one(en.job, m.copy);
+                    }
+                    dpct::sync_barrier(m.copied[sl], m.copy);
+                    m.stage_live[sl] = true;
+                    iss_ms += ms_since(th);
+                    ++iss_streamed;
+                    a_issued.store(idx + 1, std::memory_order_release);
+                }
+            });
+        } else if (stream_all) {
+            issue_until((size_t) m.ring);   // layer 0's first experts, behind the embedding and the PLE
+        }
+        // the consumer's side: entry k's copy is on the copy stream (the thread issued it), then k is given back
+        auto wait_issued = [&](size_t k) {
+            if (!threaded_issue) return;
+            while (a_issued.load(std::memory_order_acquire) <= k) std::this_thread::yield();
+        };
+        auto give_back = [&](size_t upto) {
+            if (threaded_issue) a_consumed.store(upto, std::memory_order_release);
+            else issue_until(upto + (size_t) m.ring);
+        };
+        host_setup_ms += ms_since(tsetup);
+        for (int64_t l = LB; l < LE; ++l) {
+            core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
+            const core::LayerView v(*m.wt, l);
+            // ---- the PLE block at layer 1, token by token (its conv reads the previous tokens' rows)
+            if (l == 1 && ple_on && ple_batch) {
+                // the whole chunk at once, in sub-batches carved from the idle scratch region: the key and value
+                // projections as GEMMs (a token at a time they re-read ~52 MB of BF16 key per token on the IQ
+                // files), the rest with the per-token kernels' arithmetic (native_ple_postops_batch)
+                pt.mark(kPfPle, cs);
+                const auto tp = Clock::now();
+                const strata::kernels::PleWeights& pw = ss.ple.w;
+                constexpr int64_t HD = strata::kernels::NG_HC_DIM;
+                const uint64_t per_token = (uint64_t) (3 * HD + N + 4) * 4 + (uint64_t) N * 2 + 4096;
+                const int64_t SB = std::min<int64_t>(T, (int64_t) (m.region_bytes / per_token));
+                for (int64_t s0 = 0; s0 < T; s0 += SB) {
+                    const int64_t nb = std::min(SB, T - s0);
+                    uint8_t* q = m.region;
+                    auto carve_f = [&](size_t n) { float* p = (float*) q; q += (n * 4 + 255) & ~(size_t) 255; return p; };
+                    float* key = carve_f((size_t) nb * HD);
+                    float* qn = carve_f((size_t) nb * HD);
+                    float* gated = carve_f((size_t) nb * HD);
+                    float* val = carve_f((size_t) nb * N);
+                    float* gate = carve_f((size_t) nb * 4);
+                    uint16_t* e16 = (uint16_t*) carve_f((size_t) nb * N / 2);
+                    const float* emb = m.ple_emb + s0 * N;
+                    if (pw.key_bf16 != nullptr) {
+                        to_bf16(emb, e16, nb * N, m.cs);
+                        m.gemm.bf16(e16, pw.key_bf16, key, nb, HD, N);
+                    } else {
+                        to_f16(emb, e16, nb * N, m.cs);
+                        m.gemm.native(e16, pw.key_native_type, pw.key_native_data, key, nb, HD, N);
+                        to_bf16(emb, e16, nb * N, m.cs);
+                    }
+                    m.gemm.bf16(e16, pw.value_bf16, val, nb, N, N);
+                    try {
+                        strata::kernels::native_ple_postops_batch(key, m.R + s0 * D, val, ss.ple.hist, pw, qn, gated,
+                                                                  gate, (int) nb, m.cs);
+                    } catch (const std::exception& e) { err = std::string("prefill PLE: ") + e.what(); return false; }
+                }
+                stats_.ms_ple += ms_since(tp);
+            } else if (l == 1 && ple_on) {
+                pt.mark(kPfPle, cs);
+                const auto tp = Clock::now();
+                for (int64_t t = 0; t < T; ++t) {
+                    strata::kernels::PleOut po;
+                    po.normalized = m.ple_norm;
+                    po.result = m.R + t * D;
+                    try {
+                        strata::kernels::ple_block(m.ple_emb + t * N, m.R + t * D, ss.ple.hist, ss.ple.w, po,
+                                                   ss.ple.scratch, m.cs);
+                    } catch (const std::exception& e) { err = std::string("prefill PLE: ") + e.what(); return false; }
+                    strata::kernels::ple_history_advance(ss.ple.hist, m.ple_norm, m.cs);
+                }
+                stats_.ms_ple += ms_since(tp);
+            }
+            for (int half = 0; half < 2; ++half) {
+                // ---- the hyper-connection read of this half
+                const char* pre = half == 0 ? "hc_attn_" : "hc_ffn_";
+                const std::string sn = std::string(pre) + "norm.weight", sd = std::string(pre) + "down.weight",
+                                  su = std::string(pre) + "up.weight", si = std::string(pre) + "inject.weight";
+                const core::WeightRef *wn = need(v, sn.c_str(), err), *wd = need(v, sd.c_str(), err),
+                                      *wu = need(v, su.c_str(), err), *wi = need(v, si.c_str(), err);
+                if (!wn || !wd || !wu || !wi) return false;
+                pt.mark(kPfHc, cs);
+                gr_norm(m.R, (const float*) wn->data, EPS, m.xn, m.xn16, T, m.cs);
+                if (!bf16_proj(m.gemm, wd, m.xn16, m.lo, T, sd, err)) return false;
+                gr_silu(m.lo, m.lo16, T, m.cs);
+                if (!bf16_proj(m.gemm, wu, m.lo16, m.gated, T, su, err)) return false;
+                if (!bf16_proj(m.gemm, wi, m.xn16, m.inj, T, si, err)) return false;
+                gr_mix(m.xn, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
+
+                if (half == 0 && !core::is_qsa_layer(g, l)) {
+                    // ======================= GDN =======================
+                    const core::WeightRef *wqkv = need(v, "attn_qkv.weight", err), *wg = need(v, "attn_gate.weight", err),
+                                          *wo = need(v, "ssm_out.weight", err), *wa = need(v, "ssm_alpha.weight", err),
+                                          *wb = need(v, "ssm_beta.weight", err), *wc = need(v, "ssm_conv1d.weight", err),
+                                          *wnm = need(v, "ssm_norm.weight", err), *wdt = need(v, "ssm_dt.bias", err),
+                                          *wsa = need(v, "ssm_a", err);
+                    if (!wqkv || !wg || !wo || !wa || !wb || !wc || !wnm || !wdt || !wsa) return false;
+                    pt.mark(kPfGdn, cs);
+                    float* state = ss.gdn_state + (size_t) gdn_index * gdn_floats;
+                    float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+                    if (!native_proj(m.gemm, wqkv, m.mixed_h, m.qkv, T, v.name("attn_qkv.weight"), err)) return false;
+                    if (!native_proj(m.gemm, wg, m.mixed_h, m.z, T, v.name("attn_gate.weight"), err)) return false;
+                    if (!bf16_proj(m.gemm, wa, m.mixed_bf, m.ab, T, v.name("ssm_alpha.weight"), err, 2 * HV)) return false;
+                    if (!bf16_proj(m.gemm, wb, m.mixed_bf, m.ab + HV, T, v.name("ssm_beta.weight"), err, 2 * HV)) return false;
+                    pt.mark(kPfGdnConv, cs);   // "gdn" is the projections in; the rest on their own lines
+                    gdn_gates(m.ab, (const float*) wdt->data, (const float*) wsa->data, m.gate, m.beta, T, m.cs);
+                    gdn_conv(conv, m.qkv, (const float*) wc->data, m.hbuf, T, EPS, m.cs);
+                    pt.mark(kPfGdnRec, cs);
+                    gdn_recurrence(state, m.hbuf, m.gate, m.beta, m.z, (const float*) wnm->data, EPS, m.y, m.y_h, T, m.cs);
+                    pt.mark(kPfGdnOut, cs);
+                    if (!native_proj(m.gemm, wo, m.y_h, m.bo, T, v.name("ssm_out.weight"), err)) return false;
+                    ++gdn_index;
+                } else if (half == 0) {
+                    // ======================= QSA =======================
+                    const core::QsaState& st = ss.qsa_states[qsa_index];
+                    const core::WeightRef *wq = need(v, "attn_q.weight", err), *wk = need(v, "attn_k.weight", err),
+                                          *wv = need(v, "attn_v.weight", err), *wo = need(v, "attn_output.weight", err),
+                                          *wik = need(v, "indexer.k_proj.weight", err),
+                                          *wiq = need(v, "indexer.q_proj.weight", err),
+                                          *wqn = need(v, "attn_q_norm.weight", err), *wkn = need(v, "attn_k_norm.weight", err),
+                                          *wiqn = need(v, "indexer.q_norm.weight", err),
+                                          *wikn = need(v, "indexer.k_norm.weight", err);
+                    if (!wq || !wk || !wv || !wo || !wik || !wiq || !wqn || !wkn || !wiqn || !wikn) return false;
+                    pt.mark(kPfQsa, cs);
+                    if (!native_proj(m.gemm, wk, m.mixed_h, m.Kc, T, v.name("attn_k.weight"), err)) return false;
+                    if (!native_proj(m.gemm, wv, m.mixed_h, m.Vc, T, v.name("attn_v.weight"), err)) return false;
+                    if (!native_proj(m.gemm, wq, m.mixed_h, m.Qf, T, v.name("attn_q.weight"), err)) return false;
+                    if (!bf16_proj(m.gemm, wik, m.mixed_bf, m.idx_raw, T, v.name("indexer.k_proj.weight"), err)) return false;
+                    if (!bf16_proj(m.gemm, wiq, m.mixed_bf, m.q_idx, T, v.name("indexer.q_proj.weight"), err)) return false;
+                    rms_rows(m.Kc, (const float*) wkn->data, T * 2, 256, 256, EPS, m.cs);
+                    rope(m.Kc, T, 2, 256, 512, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    // KV streaming: this layer's cells [0, p0) come in from the host copy to the staging pool, and the
+                    // chunk's cells go to the host copy, the staging pool, and the VRAM slots of resident blocks
+                    const bool staged = st.kv_mode == 1;
+                    if (staged) {
+                        pt.mark(kPfKvStage, cs);
+                        strata::kernels::kv_stage_from_host(pools_of(m.stage, m.ident_table), st.host,
+                                                            core::qsa_kv_format(st),
+                                                            (p0 + s.page_size - 1) / s.page_size, s, m.cs);
+                        pt.mark(kPfQsa, cs);
+                    }
+                    if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V, the queries below too, the output back
+                        strata::kernels::fwht256_inplace_cuda(m.Kc, T * 2, m.cs);
+                        strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
+                        strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
+                                                      &st.host, staged ? &m.stage : nullptr);
+                    } else {
+                        kv_append(m.Kc, m.Vc, T, p0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
+                                  st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs,
+                                  &st.host, staged ? &m.stage : nullptr);
+                    }
+                    split_q(m.Qf, m.q, T, m.cs);
+                    rms_rows(m.q, (const float*) wqn->data, T * 24, 256, 256, EPS, m.cs);
+                    rope(m.q, T, 24, 256, 6144, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(m.q, T * 24, m.cs);
+                    rms_rows(m.q_idx, (const float*) wiqn->data, T * 4, 128, 128, EPS, m.cs);
+                    rope(m.q_idx, T, 4, 128, 512, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    // the indexer appends, token by token; then scores + selection for many queries at once:
+                    // a query reads completed blocks (final once completed) and `dead` for its own tail block
+                    const strata::kernels::QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
+                    pt.mark(kPfQsaIdx, cs);
+                    // C-2: the chunk's appends in three launches instead of one per token (the same end state:
+                    // the queries below read it only after the whole chunk is appended). STRATA_INDEXER_PER_TOKEN=1: the old
+                    try {
+                        static const bool per_token = std::getenv("STRATA_INDEXER_PER_TOKEN") != nullptr;
+                        if (!per_token) {
+                            strata::kernels::native_qsa_indexer_append_batch(m.idx_raw, T, p0, 0, (const float*) wikn->data,
+                                                                             EPS, ib, s, st.max_cells,
+                                                                             (float) strata::kernels::qsa_freq_base(), m.cs);
+                        }
+                        for (int64_t t = 0; per_token && t < T; ++t) {
+                            const int32_t* step_t = m.steps_dev + t * strata::kernels::kStepCount;
+                            strata::kernels::native_qsa_indexer_append(m.idx_raw + t * 128, step_t + strata::kernels::kStepPos, 0,
+                                                                       (const float*) wikn->data, EPS, ib, s, st.max_cells,
+                                                                       (float) strata::kernels::qsa_freq_base(), m.cs);
+                        }
+                    } catch (const std::exception& e) { err = std::string("prefill indexer: ") + e.what(); return false; }
+                    pt.mark(kPfQsaSel, cs);
+                    for (int64_t t0 = 0; t0 < T; t0 += m.sel_batch) {
+                        const int64_t nb = std::min(m.sel_batch, T - t0);
+                        const int32_t* steps0 = m.steps_dev + t0 * strata::kernels::kStepCount;
+                        // C-1: the grid reaches the batch's last query's n_bid (they rise with the position)
+                        const int64_t active = (int64_t) m.steps_host[(size_t) ((t0 + nb - 1) * strata::kernels::kStepCount +
+                                                                                strata::kernels::kStepNBid)] + 1;
+                        // the scores on tensor cores (3xTF32: FP32-level, not bitwise); STRATA_SELECT_OLD=1: the warp kernel
+                        static const bool old_sel = std::getenv("STRATA_SELECT_OLD") != nullptr;
+                        if (old_sel || !strata::kernels::qsa_block_scores_tc(st.idx_pooled, st.idx_dead, m.q_idx + t0 * 512,
+                                                                             steps0, nb, m.max_blocks, s, m.sel_scores,
+                                                                             m.cs, active))
+                            strata::kernels::qsa_block_scores(st.idx_pooled, st.idx_dead, m.q_idx + t0 * 512, steps0, nb,
+                                                              m.max_blocks, s, m.sel_scores, m.cs, active);
+                        strata::kernels::qsa_block_topk(m.sel_scores, steps0, nb, m.max_blocks, m.cap, s,
+                                                        m.sel_ids + t0 * m.cap, m.cs);
+                    }
+                    // STRATA_SEL_OVERLAP (debug, D-1's question): how much do neighbouring queries' selections share?
+                    // Per tile of 16 queries: the union of their selected cells against the sum of their widths.
+                    if (static const bool ovl = std::getenv("STRATA_SEL_OVERLAP") != nullptr; ovl && qsa_index == 0) {
+                        std::vector<int32_t> ids((size_t) (T * m.cap));
+                        /*
+                        DPCT1124:1023: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(ids.data(), m.sel_ids, ids.size() * 4);
+                        m.cs->wait();
+                        double sum_w = 0, sum_u = 0;
+                        for (int64_t t0 = 0; t0 + 16 <= T; t0 += 16) {
+                            std::vector<int32_t> u;
+                            for (int64_t t = t0; t < t0 + 16; ++t) {
+                                const int64_t w = m.steps_host[(size_t) (t * strata::kernels::kStepCount + strata::kernels::kStepWidth)];
+                                sum_w += (double) w;
+                                u.insert(u.end(), ids.begin() + t * m.cap, ids.begin() + t * m.cap + w);
+                            }
+                            std::sort(u.begin(), u.end());
+                            sum_u += (double) (std::unique(u.begin(), u.end()) - u.begin());
+                        }
+                        std::fprintf(stderr, "strata prefill: selection overlap at %lld: 16-query tiles read %.1f%% of the "
+                                             "cells one query at a time does\n", (long long) p0, sum_w > 0 ? 100.0 * sum_u / sum_w : 0.0);
+                    }
+                    // STRATA_IDX_FP16_CHECK: would FP16 pooled indexer keys select the same cells? (the KV-streaming
+                    // design's last question). Every query is selected again from the pooled keys and `dead` rounded
+                    // to fp16 (exactly what an fp16 store reads back); the agreement with the fp32 selection is
+                    // printed cumulatively after each chunk's last QSA layer. Debug: syncs per layer.
+                    if (static const bool f16chk = std::getenv("STRATA_IDX_FP16_CHECK") != nullptr; f16chk) {
+                        static float *pooled16 = nullptr, *dead16 = nullptr;
+                        static int32_t* ids16 = nullptr;
+                        static double shared = 0, cells = 0;
+                        static long long queries = 0, same = 0, sel_queries = 0;
+                        const int64_t rows = st.idx_pooled_rows;
+                        if (pooled16 == nullptr &&
+                            (DPCT_CHECK_ERROR(
+                                 pooled16 = (float *)sycl::malloc_device(
+                                     (size_t)rows * s.idx_dim * 4,
+                                     dpct::get_in_order_queue())) != 0 ||
+                             DPCT_CHECK_ERROR(
+                                 dead16 = (float *)sycl::malloc_device(
+                                     (size_t)s.idx_dim * 4,
+                                     dpct::get_in_order_queue())) != 0 ||
+                             DPCT_CHECK_ERROR(
+                                 ids16 = (int32_t *)sycl::malloc_device(
+                                     (size_t)(m.T * m.cap) * 4,
+                                     dpct::get_in_order_queue())) != 0)) {
+                            err = "STRATA_IDX_FP16_CHECK: no room for its buffers";
+                            return false;
+                        }
+                        round_f16(st.idx_pooled, pooled16, rows * s.idx_dim, m.cs);
+                        round_f16(st.idx_dead, dead16, s.idx_dim, m.cs);
+                        for (int64_t t0 = 0; t0 < T; t0 += m.sel_batch) {
+                            const int64_t nb = std::min(m.sel_batch, T - t0);
+                            const int32_t* steps0 = m.steps_dev + t0 * strata::kernels::kStepCount;
+                            strata::kernels::qsa_block_scores(pooled16, dead16, m.q_idx + t0 * 512, steps0, nb,
+                                                              m.max_blocks, s, m.sel_scores, m.cs);
+                            strata::kernels::qsa_block_topk(m.sel_scores, steps0, nb, m.max_blocks, m.cap, s,
+                                                            ids16 + t0 * m.cap, m.cs);
+                        }
+                        std::vector<int32_t> a((size_t) (T * m.cap)), b((size_t) (T * m.cap));
+                        /*
+                        DPCT1124:1024: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(a.data(), m.sel_ids, a.size() * 4);
+                        /*
+                        DPCT1124:1025: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(b.data(), ids16, b.size() * 4);
+                        m.cs->wait();
+                        for (int64_t t = 0; t < T; ++t) {
+                            const int64_t w = m.steps_host[(size_t) (t * strata::kernels::kStepCount + strata::kernels::kStepWidth)];
+                            const int32_t *x = a.data() + t * m.cap, *y = b.data() + t * m.cap;
+                            int64_t i = 0, j = 0, c = 0;
+                            while (i < w && j < w) {
+                                if (x[i] == y[j]) { ++c; ++i; ++j; } else if (x[i] < y[j]) ++i; else ++j;
+                            }
+                            ++queries;
+                            same += c == w;
+                            if (p0 + t + 1 > m.cap) { ++sel_queries; shared += (double) c; cells += (double) w; }
+                        }
+                        if (qsa_index + 1 == g.n_qsa_layers())
+                            std::fprintf(stderr, "strata prefill: FP16 indexer keys: %lld of %lld selections identical; "
+                                                 "where the selection is sparse, %.4f%% of cells shared (%lld queries)\n",
+                                         same, queries, cells > 0 ? 100.0 * shared / cells : 100.0, sel_queries);
+                    }
+                    // STRATA_QSA_DUMP=<file>: append every QSA layer's selected cells for the prompt's last
+                    // STRATA_QSA_DUMP_LAST (4096) positions - records of int32 {qsa layer, pos0, T, cap} + T*cap cells,
+                    // for tools/qsa_locality.py (how local the sparse attention's reads are: the KV-streaming question)
+                    if (static const char* dump = std::getenv("STRATA_QSA_DUMP"); dump != nullptr) {
+                        static const long long last = std::getenv("STRATA_QSA_DUMP_LAST")
+                                                          ? std::atoll(std::getenv("STRATA_QSA_DUMP_LAST")) : 4096;
+                        if (p0 + T > pos0 + n - last) {
+                            std::vector<int32_t> h((size_t) (T * m.cap));
+                            /*
+                            DPCT1124:1026: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            m.cs->memcpy(h.data(), m.sel_ids, h.size() * 4);
+                            m.cs->wait();
+                            if (std::FILE* f = std::fopen(dump, "ab")) {
+                                const int32_t hdr[4] = {(int32_t) qsa_index, (int32_t) p0, (int32_t) T, (int32_t) m.cap};
+                                std::fwrite(hdr, 4, 4, f);
+                                std::fwrite(h.data(), 4, h.size(), f);
+                                std::fclose(f);
+                            }
+                        }
+                    }
+                    const strata::kernels::QsaAttnPools pools = staged ? pools_of(m.stage, m.ident_table)
+                                                                       : core::qsa_attn_pools(st);
+                    pt.mark(kPfQsaAttn, cs);
+                    // perf-review D-1: the whole chunk on tensor cores, one block per (query, KV head), FP32-level
+                    // accuracy but not bitwise (qsa_prompt_attn.hpp). Q4_0 KV, or STRATA_PROMPT_ATTN_OLD=1: the
+                    // decode kernel, 32 queries at a time
+                    static const bool old_attn = std::getenv("STRATA_PROMPT_ATTN_OLD") != nullptr;
+                    if (old_attn || !strata::kernels::qsa_prompt_attn_batch(m.q, pools, m.sel_ids, m.steps_dev, m.cap, s,
+                                                                            m.attn, T, m.cs))
+                        for (int64_t t0 = 0; t0 < T; t0 += m.attn_batch) {
+                            const int64_t nb = std::min(m.attn_batch, T - t0);
+                            strata::kernels::qsa_decode_attn_batch(m.q + t0 * ZV, pools, m.sel_ids + t0 * m.cap,
+                                                                   m.steps_dev + t0 * strata::kernels::kStepCount, m.cap,
+                                                                   s, m.attn_scratch, m.attn + t0 * ZV, nb, m.cs);
+                        }
+                    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(m.attn, T * 24, m.cs);
+                    pt.mark(kPfQsa, cs);
+                    gate_attn(m.attn, m.Qf, m.attn_h, T, m.cs);
+                    if (!native_proj(m.gemm, wo, m.attn_h, m.bo, T, v.name("attn_output.weight"), err)) return false;
+                    ++qsa_index;
+                } else {
+                    // ======================= MoE =======================
+                    const core::WeightRef *wr = need(v, "ffn_gate_inp.weight", err),
+                                          *wgi = need(v, "ffn_gate_inp_shexp.weight", err),
+                                          *wsg = need(v, "ffn_gate_shexp.weight", err),
+                                          *wsu = need(v, "ffn_up_shexp.weight", err),
+                                          *wsd = need(v, "ffn_down_shexp.weight", err);
+                    if (!wr || !wgi || !wsg || !wsu || !wsd) return false;
+                    pt.mark(kPfRouter, cs);
+                    if (!bf16_proj(m.gemm, wr, m.mixed_bf, m.logits, T, v.name("ffn_gate_inp.weight"), err)) return false;
+                    route(m.logits, m.ids, m.w, T, m.g->n_expert, m.cs);
+                    // the shared expert and its scalar gate
+                    if (!native_proj(m.gemm, wsg, m.mixed_h, m.sgate, T, v.name("ffn_gate_shexp.weight"), err)) return false;
+                    if (!native_proj(m.gemm, wsu, m.mixed_h, m.sup, T, v.name("ffn_up_shexp.weight"), err)) return false;
+                    swiglu_pair(m.sgate, m.sup, m.sh_h, T, m.cs);
+                    if (!native_proj(m.gemm, wsd, m.sh_h, m.shared, T, v.name("ffn_down_shexp.weight"), err)) return false;
+                    if (wgi->kind != core::WeightKind::Bf16InF32) { err = "prefill: shared gate is not BF16"; return false; }
+                    m.gemm.bf16(m.mixed_bf, (const uint16_t*) wgi->data, m.sg, T, 1, N);
+                    // group the (token, k) pairs by expert on the host
+                    pt.mark(kPfHostGroup, cs);
+                    /*
+                    DPCT1124:1027: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    m.cs->memcpy(m.ids_host.data(), m.ids, (size_t)T * K * 4);
+                    m.cs->wait();
+                    pt.fold();
+                    std::fill(m.cnt.begin(), m.cnt.end(), 0);
+                    for (int64_t i = 0; i < T * K; ++i) {
+                        const int32_t e = m.ids_host[(size_t) i];
+                        if (e < 0 || e >= m.g->n_expert) { err = "prefill: routed id out of range"; return false; }
+                        ++m.cnt[(size_t) e];
+                    }
+                    m.off[0] = 0;
+                    for (int64_t e = 0; e < m.g->n_expert; ++e) m.off[(size_t) e + 1] = m.off[(size_t) e] + m.cnt[(size_t) e];
+                    std::vector<int32_t> fill(m.off.begin(), m.off.end() - 1);
+                    for (int64_t i = 0; i < T * K; ++i) {
+                        const int32_t e = m.ids_host[(size_t) i];
+                        const int32_t p = fill[(size_t) e]++;
+                        m.slot_host[(size_t) i] = p;
+                        m.src_host[(size_t) p] = (int32_t) (i / K);
+                    }
+                    /*
+                    DPCT1124:1028: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    m.cs->memcpy(m.slot_dev, m.slot_host.data(),
+                                 (size_t)T * K * 4);
+                    /*
+                    DPCT1124:1029: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    m.cs->memcpy(m.src_dev, m.src_host.data(),
+                                 (size_t)T * K * 4);
+                    // the experts, in id order: resident ones from VRAM, the others through the staging ring
+                    std::vector<int32_t> order;
+                    for (int32_t e = 0; e < m.g->n_expert; ++e) if (m.cnt[(size_t) e] > 0) order.push_back(e);
+                    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
+                    const bool use_mmq = mmq_plan().any && mmq_plan().layer[(size_t) l];
+                    const int mmq_gt = lay.native ? lay.fmt[(size_t) l].gu_type : 42;
+                    const int mmq_dt = lay.native ? lay.fmt[(size_t) l].d_type : 42;
+                    const size_t mmq_gub = use_mmq ? mmq::matrix_bytes(mmq_gt, 1280, N) : 0;
+                    const size_t mmq_db = use_mmq ? mmq::matrix_bytes(mmq_dt, N, 640) : 0;
+                    pt.mark(kPfGather, cs);
+                    if (use_mmq) {
+                        // step 2b: the layer's activations as q8_1 rows in expert order, straight from `mixed`
+                        mmq::quantize(m.mixed, m.src_dev, m.Xq, mmq_gt, N, N, T * K, m.cs);
+                        // each group's rows: absolute bounds (gate/up reads the layer's rows), relative ones (down
+                        // reads the group's own quantized H)
+                        const size_t n = order.size(), ng = (n + MMQ_GROUP - 1) / MMQ_GROUP;
+                        m.bounds_host.resize(n + 1 + ng * (MMQ_GROUP + 1));
+                        for (size_t j = 0; j < n; ++j) m.bounds_host[j] = m.off[(size_t) order[j]];
+                        m.bounds_host[n] = (int32_t) (T * K);
+                        for (size_t g = 0; g < ng; ++g)
+                            for (size_t i = 0; i <= MMQ_GROUP; ++i)
+                                m.bounds_host[n + 1 + g * (MMQ_GROUP + 1) + i] =
+                                    m.bounds_host[std::min(n, g * MMQ_GROUP + i)] - m.bounds_host[g * MMQ_GROUP];
+                        /*
+                        DPCT1124:1030: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(m.bounds_dev, m.bounds_host.data(),
+                                     m.bounds_host.size() * 4);
+                    } else {
+                        gather_rows16(m.mixed_h, m.src_dev, m.Xs, T * K, N, m.cs);
+                    }
+                    // Stage ahead: the copy stream moves blobs host -> device while the compute stream works.
+                    int stage_next = 0;
+                    std::vector<int> stage_of(order.size(), -1);
+                    // the unpinned ones are copied to pinned buffers by the stager's threads, in this order
+                    std::vector<int> job_of(order.size(), -1);
+                    if (!stream_all) {
+                        std::vector<Stager::Job> js;
+                        for (size_t j = 0; j < order.size(); ++j) {
+                            const int32_t e = order[j];
+                            if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
+                            if (m.src->pinned(l, e)) continue;
+                            const uint8_t* b = m.src->blob(l, e);
+                            if (!b) { err = "prefill: expert source has no blob"; return false; }
+                            job_of[j] = (int) js.size();
+                            js.push_back({b, (size_t) lay.blob_bytes(l)});
+                        }
+                        m.stager->start(std::move(js));
+                    }
+                    StagerDone stager_done{stream_all ? nullptr : m.stager.get()};
+                    auto stage_one = [&](size_t j) -> bool {
+                        try {
+                    const int32_t e = order[j];
+                        const bool resident = m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0;
+                        if (resident) return true;
+                        const int sl = stage_next;
+                        stage_next = (stage_next + 1) % STAGE;
+                        const auto th = Clock::now();
+                        const uint8_t* b = m.src->blob(l, e);
+                        if (!b) { err = "prefill: expert source has no blob"; return false; }
+                        if (m.src->pinned(l, e)) {
+                            // DMA straight from the page-locked arena: the copy stream only waits for the slot
+                            if (m.stage_live[sl])(m.copy)
+                                ->ext_oneapi_submit_barrier({*m.used[sl]});
+                            /*
+                            DPCT1124:1031: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            m.copy->memcpy(m.stage_dev[sl], b,
+                                           (size_t)lay.blob_bytes(l));
+                            ++stats_.experts_dma;
+                        } else {
+                            // copied to a pinned buffer by the stager (waits only if it is behind), then DMA
+                            const uint8_t* hb = m.stager->wait(job_of[j]);
+                            if (m.stage_live[sl])(m.copy)
+                                ->ext_oneapi_submit_barrier({*m.used[sl]});
+                            /*
+                            DPCT1124:1032: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            m.copy->memcpy(m.stage_dev[sl], hb,
+                                           (size_t)lay.blob_bytes(l));
+                            m.stager->issued_one(job_of[j], m.copy);
+                        }
+                        dpct::sync_barrier(m.copied[sl], m.copy);
+                        m.stage_live[sl] = true;
+                        stage_of[j] = sl;
+                        stats_.ms_experts_host += ms_since(th);
+                        ++stats_.experts_streamed;
+                        return true;
+                    }
+                    catch (sycl::exception const &exc) {
+                      std::cerr << exc.what()
+                                << "Exception caught at file:" << __FILE__
+                                << ", line:" << __LINE__ << std::endl;
+                      std::exit(1);
+                    }
+                    };
+                    // one expert's products from its blob on the device; `slot` (a ring slot, or -1 for a resident
+                    // expert) is released once the blob is read
+                    auto compute = [&](size_t j, const uint8_t *blob_dev,
+                                       int slot) -> bool {
+                        try {
+                    const int32_t e = order[j];
+                        pt.mark(kPfDequant, cs);
+                        if (use_mmq) {
+                            // gather the expert into its group slot (GGUF blocks, unchanged or converted)
+                            const size_t q = j % MMQ_GROUP;
+                            if (lay.native) {
+                                const auto& f = lay.fmt[(size_t) l];
+                                mmq::gather_native(blob_dev, blob_dev + f.up_off, mmq_gub / 2, blob_dev + f.down_off,
+                                                   mmq_db, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                            } else {
+                                mmq::gather_strata_q2(blob_dev, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                            }
+                            if (slot >= 0)
+                                dpct::sync_barrier(m.used[slot], m.cs);
+                            if (q + 1 < MMQ_GROUP && j + 1 < order.size()) return true;
+                            // the group's products: gate/up, swiglu, the group's H to q8_1, down
+                            const size_t j0 = j - q, g = j0 / MMQ_GROUP, n = order.size();
+                            const int ngx = (int) (q + 1);
+                            const int64_t r0 = m.bounds_host[j0], nr = m.bounds_host[j + 1] - r0;
+                            int64_t maxr = 0;
+                            for (size_t i = j0; i <= j; ++i) maxr = std::max<int64_t>(maxr, m.cnt[(size_t) order[i]]);
+                            pt.mark(kPfGemmGU, cs);
+                            // the zeroed tail after the group's last expert (see MMQ_TAIL)
+                            m.cs->memset(m.grp_gu + (size_t)ngx * mmq_gub, 0,
+                                         MMQ_TAIL);
+                            m.cs->memset(m.grp_d + (size_t)ngx * mmq_db, 0,
+                                         MMQ_TAIL);
+                            mmq::Product gu;
+                            gu.w = m.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
+                            gu.n = ngx; gu.xq = m.Xq; gu.bounds = m.bounds_dev + j0; gu.ids = m.ids_identity;
+                            gu.total_rows = T * K; gu.max_rows = maxr; gu.dst = m.GU; gu.ld_dst = 1280;
+                            m.mmq_ctx->run(gu, m.cs);
+                            mmq::swiglu(m.GU + r0 * 1280, m.H + r0 * 640, nr, 640, !lay.native, m.cs);
+                            pt.mark(kPfGemmD, cs);
+                            mmq::quantize(m.H + r0 * 640, nullptr, m.Hq, mmq_dt, 640, 640, nr, m.cs);
+                            mmq::Product dn;
+                            dn.w = m.grp_d; dn.type = mmq_dt; dn.w_rows = N; dn.w_cols = 640; dn.expert_bytes = mmq_db;
+                            dn.n = ngx; dn.xq = m.Hq; dn.bounds = m.bounds_dev + n + 1 + g * (MMQ_GROUP + 1);
+                            dn.ids = m.ids_identity; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = m.Dm + r0 * N;
+                            dn.ld_dst = N;
+                            m.mmq_ctx->run(dn, m.cs);
+                            return true;
+                        }
+                        const int q = (int) (j % DQ);
+                        if (lay.native) {
+                            // plan v0.3 P6: a native pack's layer, dequantized by llama.cpp's own formulas
+                            const auto& f = lay.fmt[(size_t) l];
+                            strata::kernels::iq_dequant_gu_f16(f.gu_type, blob_dev, blob_dev + f.up_off, f.n_ff, f.n_embd,
+                                                               m.dq_gu[q], m.cs);
+                            strata::kernels::iq_dequant_f16(f.d_type, blob_dev + f.down_off, f.n_embd * f.n_ff, m.dq_d[q], m.cs);
+                        } else {
+                            blob_dequant_f16(blob_dev, m.dq_gu[q], m.dq_d[q], m.cs);
+                        }
+                        if (slot >= 0) dpct::sync_barrier(m.used[slot], m.cs);
+                        const int64_t o0 = m.off[(size_t) e], ne = m.cnt[(size_t) e];
+                        pt.mark(kPfGemmGU, cs);
+                        m.gemm.f16(m.Xs + o0 * N, m.dq_gu[q], m.GU + o0 * 1280, ne, 1280, N);
+                        swiglu_interleaved(m.GU + o0 * 1280, m.Hh + o0 * 640, ne, m.cs);
+                        pt.mark(kPfGemmD, cs);
+                        m.gemm.f16(m.Hh + o0 * 640, m.dq_d[q], m.Dm + o0 * N, ne, N, 640);
+                        return true;
+                    }
+                    catch (sycl::exception const &exc) {
+                      std::cerr << exc.what()
+                                << "Exception caught at file:" << __FILE__
+                                << ", line:" << __LINE__ << std::endl;
+                      std::exit(1);
+                    }
+                    };
+                    if (!stream_all) {
+                        size_t staged = 0;
+                        const size_t lookahead = STAGE - 1;
+                        for (size_t j = 0; j < order.size(); ++j) {
+                            while (staged < order.size() && staged <= j + lookahead) {
+                                if (!stage_one(staged)) return false;
+                                ++staged;
+                            }
+                            const int32_t e = order[j];
+                            if (stage_of[j] < 0) {
+                                ++stats_.experts_resident;
+                                if (!compute(j, m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]), -1)) return false;
+                            } else {
+                                pt.mark(kPfWaitCopy, cs);
+                                (m.cs)->ext_oneapi_submit_barrier(
+                                    {*m.copied[stage_of[j]]});
+                                if (!compute(j, m.stage_dev[stage_of[j]], stage_of[j])) return false;
+                            }
+                        }
+                    } else {
+                        // the streamed walk: this layer's entries [k, kend) in id order; an entry the routing did not
+                        // pick only gives its slot back
+                        size_t k = seq_start[(size_t) l];
+                        const size_t kend = seq_start[(size_t) l + 1];
+                        auto release_to = [&](int32_t e_stop) {
+                            try {
+                        while (k < kend && seq[k].e < e_stop) {
+                                dpct::sync_barrier(m.used[k % (size_t)m.ring],
+                                                   m.cs);
+                                consumed = ++k;
+                                give_back(consumed);
+                            }
+                        }
+                        catch (sycl::exception const &exc) {
+                          std::cerr << exc.what()
+                                    << "Exception caught at file:" << __FILE__
+                                    << ", line:" << __LINE__ << std::endl;
+                          std::exit(1);
+                        }
+                        };
+                        for (size_t j = 0; j < order.size(); ++j) {
+                            const int32_t e = order[j];
+                            release_to(e);
+                            if (k < kend && seq[k].e == e) {
+                                const int sl = (int) (k % (size_t) m.ring);
+                                pt.mark(kPfWaitCopy, cs);
+                                wait_issued(k);
+                                (m.cs)->ext_oneapi_submit_barrier(
+                                    {*m.copied[sl]});
+                                if (!compute(j, m.stage_dev[sl], sl)) return false;
+                                consumed = ++k;
+                                give_back(consumed);
+                            } else {
+                                ++stats_.experts_resident;
+                                if (!compute(j, m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]), -1)) return false;
+                            }
+                        }
+                        release_to(m.g->n_expert);
+                    }
+                    pt.mark(kPfCombine, cs);
+                    moe_combine(m.Dm, m.slot_dev, m.w, m.shared, m.sg, m.bo, T, m.cs);
+                    // debug: STRATA_DBG_NAN=1 reports the first layer of a chunk whose MoE produced non-finite values
+                    if (static const bool dbg = std::getenv("STRATA_DBG_NAN") != nullptr; dbg) {
+                        m.cs->wait();
+                        auto bad = [&](const float *d, int64_t n) {
+                            try {
+                        std::vector<float> h((size_t)n);
+                            dpct::get_in_order_queue()
+                                .memcpy(h.data(), d, (size_t)n * 4)
+                                .wait();
+                            int64_t c = 0;
+                            for (float v : h) c += !std::isfinite(v);
+                            return c;
+                        }
+                        catch (sycl::exception const &exc) {
+                          std::cerr << exc.what()
+                                    << "Exception caught at file:" << __FILE__
+                                    << ", line:" << __LINE__ << std::endl;
+                          std::exit(1);
+                        }
+                        };
+                        const int64_t bgu = bad(m.GU, T * K * 1280), bdm = bad(m.Dm, T * K * N), bbo = bad(m.bo, T * N);
+                        const int64_t bh = m.H ? bad(m.H, T * K * 640) : -1;
+                        static int64_t reported = -1;
+                        if ((bgu || bdm || bbo || bh > 0) && reported != stats_.chunks) {
+                            reported = stats_.chunks;
+                            std::fprintf(stderr, "strata dbg: layer %lld (mmq %d, types %d/%d, %zu experts): non-finite GU %lld "
+                                         "H %lld Dm %lld bo %lld of T %lld\n", (long long) l, (int) use_mmq, mmq_gt, mmq_dt,
+                                         order.size(), (long long) bgu, (long long) bh, (long long) bdm, (long long) bbo,
+                                         (long long) T);
+                        }
+                    }
+                }
+                // ---- the hyper-connection write of this half
+                gr_write(m.R, m.bo, m.inj, HC, T, m.cs);
+                if (half == 1 && strata::kernels::cvec().covers(l))   // --control-vector-scaled
+                    strata::kernels::cvec_apply(m.R, l, T, D, nullptr, 0, nullptr, 0, false, m.cs);
+            }
+        }
+        if (issuer.joinable()) {
+            issuer.join();
+            stats_.ms_experts_host += iss_ms;
+            stats_.experts_streamed += iss_streamed;
+            stats_.experts_dma += iss_dma;
+        }
+        stats_.tokens += T;
+        pt.mark(kPfStart, cs);
+        if (next_ != nullptr) {
+            // the rows to the host buffer the next stage read two chunks ago (it has finished: waited below)
+            float* h = m.hand[hand_buf];
+            /*
+            DPCT1124:1033: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            if (DPCT_CHECK_ERROR(m.cs->memcpy(h, m.R, (size_t)T * D * 4)) !=
+                    0 ||
+                DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
+                /*
+                DPCT1009:1034: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010:1035: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                err = std::string("prefill: the layer split's hand-off: ") +
+                      dpct::get_error_string_dummy(0);
+                return false;
+            }
+            // this stage's state is at the chunk's end now (synced) and moves on with the next chunk below
+            if (on_stage_chunk && !on_stage_chunk(p0 + T, err)) return false;
+            if (next_run.valid() && !next_run.get()) { err = next_err; return false; }
+            next_->hand_in_ = h;
+            next_run = std::async(std::launch::async, [this, tokens, c0, T, p0, &next_err] {
+                return next_->run(tokens + c0, T, p0, next_err);
+            });
+            hand_buf ^= 1;
+            continue;   // the last stage reports the chunk (on_chunk)
+        }
+        if (const char* dump = std::getenv("STRATA_PREFILL_DUMP_R")) {   // debug: the final residuals, every 64th
+            m.cs->wait(); // position (A/B quality of this path)
+            if (std::FILE* f = std::fopen(dump, c0 == 0 ? "wb" : "ab")) {
+                std::vector<float> row((size_t) D);
+                for (int64_t t = (64 - p0 % 64) % 64; t < T; t += 64) {
+                    dpct::get_in_order_queue()
+                        .memcpy(row.data(), m.R + t * D, (size_t)D * 4)
+                        .wait();
+                    const int64_t pos = p0 + t;
+                    std::fwrite(&pos, sizeof pos, 1, f);
+                    std::fwrite(row.data(), 4, row.size(), f);
+                }
+                std::fclose(f);
+            }
+        }
+        if (on_chunk || on_stage_chunk) {
+            const auto toc = Clock::now();
+            if (DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
+                /*
+                DPCT1009:1036: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010:1037: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                err =
+                    std::string("prefill: ") + dpct::get_error_string_dummy(0);
+                return false;
+            }
+            const auto toc2 = Clock::now();
+            if (on_stage_chunk && !on_stage_chunk(p0 + T, err)) return false;
+            if (on_chunk && !on_chunk(m.R, T, p0, err)) return false;
+            host_sync_ms += std::chrono::duration<double, std::milli>(toc2 - toc).count();
+            host_chunk_ms += ms_since(toc2);
+        }
+    }
+    if (next_run.valid() && !next_run.get()) { err = next_err; return false; }
+    ss.ple_prev[0] = prev[0];
+    ss.ple_prev[1] = prev[1];
+    if (std::getenv("STRATA_DBG_NAN") != nullptr) {   // debug: the state the prompt leaves for the token path
+        m.cs->wait();
+        auto bad = [&](const float *d, int64_t n) {
+            try {
+        std::vector<float> h((size_t)n);
+            dpct::get_in_order_queue()
+                .memcpy(h.data(), d, (size_t)n * 4)
+                .wait();
+            int64_t c = 0;
+            double mx = 0;
+            for (float v : h) { c += !std::isfinite(v); if (std::isfinite(v)) mx = std::max(mx, (double) std::fabs(v)); }
+            std::fprintf(stderr, " %lld non-finite (max |x| %.3g)", (long long) c, mx);
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        const int64_t last = (n - 1) % m.T;
+        std::fprintf(stderr, "strata dbg: prompt end: last residual row");
+        bad(m.R + last * D, D);
+        if (ss.ple.ready()) { std::fprintf(stderr, "; PLE history"); bad(ss.ple.hist, (int64_t) strata::kernels::NG_HIST * strata::kernels::NG_HC_DIM); }
+        std::fprintf(stderr, "; GDN state 0");
+        bad(ss.gdn_state, 64 * 1024);
+        std::fprintf(stderr, "\n");
+    }
+    if (DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
+        /*
+        DPCT1009:1038: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1010:1039: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
+        */
+        err = std::string("prefill: ") + dpct::get_error_string_dummy(0);
+        return false;
+    }
+    stats_.ms_total += ms_since(t_start);
+    if (pt.on) {
+        pt.fold();
+        double total = 0.0;
+        for (double v : pt.ms) total += v;
+        std::string line;
+        char b[96];
+        for (int i = 0; i < kPfCount; ++i) {
+            if (pt.ms[i] <= 0.0) continue;
+            std::snprintf(b, sizeof b, " %s %.0f (%.1f%%)", kPfNames[i], pt.ms[i], total > 0 ? 100.0 * pt.ms[i] / total : 0.0);
+            line += b;
+        }
+        std::fprintf(stderr, "strata prefill timing: %lld tokens, GPU timeline %.0f ms, wall %.0f ms, host staging %.0f ms:%s\n",
+                     (long long) n, total, ms_since(t_start), stats_.ms_experts_host, line.c_str());
+        std::fprintf(stderr, "strata prefill timing: host: chunk setup (PLE rows, the expert stream plan) %.0f ms, "
+                             "waiting for each chunk %.0f ms, after each chunk (the draft layer, progress) %.0f ms, "
+                             "PLE %.0f ms\n", host_setup_ms, host_sync_ms, host_chunk_ms, stats_.ms_ple);
+    }
+    if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr) {   // debug: the GDN states as the prompt path leaves them
+        m.cs->wait();
+        std::vector<uint8_t> b((size_t) gdn_floats * 4);
+        std::string line;
+        char h[8];
+        for (int64_t i = 0; i < g.n_gdn_layers(); ++i) {
+            dpct::get_in_order_queue()
+                .memcpy(b.data(), ss.gdn_state + (size_t)i * gdn_floats,
+                        b.size())
+                .wait();
+            uint64_t x = 1469598103934665603ull;
+            for (uint8_t c : b) x = (x ^ c) * 1099511628211ull;
+            std::snprintf(h, sizeof(h), "%04llx ", (unsigned long long) (x & 0xffff));
+            line += h;
+        }
+        std::fprintf(stderr, "strata prefill: GDN_HASH %s\n", line.c_str());
+    }
+    return true;
+}
+
+}  // namespace strata::prefill
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
new file mode 100644
index 00000000000..01844c9987e
--- /dev/null
+++ b/sycl/src/program/generate.cpp
@@ -0,0 +1,5561 @@
+// src/program/generate.cpp - P2.S6: `strata generate`.
+//
+// THE DRIVER, and the first program in this project that answers a question.  Everything below it is a
+// component; this is the thing that composes them into a token:
+//
+//     embed_row(token)  ->  48 captured layer graphs (the CPU expert pool behind the doorbell)  ->
+//     lm_head(R)        ->  sample        ->  embed_row(next)  ->  ...
+//
+// WHAT IT IS NOT.  There is no tokenizer here.  `pack/full/tokenizer/` and `tools/strata_tokenizer.py` exist,
+// and a C++ BPE is Phase 1's deliverable rather than this program's, so the prompt arrives as IDS via
+// `--tokens`.  That is not a placeholder: it is exactly what Gate C1 needs, because C1 compares logits against
+// llama.cpp on the SAME ids, and a tokenizer on only one side of that comparison is a second variable.
+//
+// AND IT IS PHASE 2, so hit rate is `h = 0` and the number it prints is slow on purpose
+// (`phase-2-correct-engine.md:5-9`).  What it is FOR is the honest tok/s figure and the logit dump.
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/sycl_queue.hpp"
+#include "strata/core/expert_cache.hpp"
+#include "strata/core/expert_source.hpp"
+#include "strata/core/remote_experts.hpp"
+#include "strata/core/on_device.hpp"
+#include "strata/core/layer.hpp"
+#include "strata/core/layout.hpp"
+#include "strata/core/session.hpp"
+#include "strata/core/weights.hpp"
+#include "strata/kernels/cpu/expert.hpp"
+#include "strata/kernels/cpu/pool.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/ngram.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/sampler.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+#include "strata/kernels/shared_expert.hpp"
+#include "strata/kernels/native_moe.hpp"
+#include "strata/kernels/native_gdn.hpp"
+#include "strata/kernels/native_router.hpp"
+#include "strata/kernels/native_qsa.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/native_rope.hpp"
+#include "strata/kernels/mrope.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/core/native_head.hpp"
+#include "strata/core/verify.hpp"
+#include "strata/core/mtp.hpp"
+#include "strata/prefill/prefill.hpp"
+#include "strata/core/native_dense.hpp"
+#include "strata/program/logits_selection.hpp"
+#include "strata/program/conv_cache.hpp"
+#include "strata/spec/draft_policy.hpp"
+#include "strata/spec/suffix_drafter.hpp"
+#include "strata/kernels/cvec.hpp"
+#include "strata/core/progress.hpp"
+#ifndef NOMINMAX
+#define NOMINMAX   // gguf_reader.hpp includes windows.h
+#endif
+#include "strata/artifact/gguf_reader.hpp"
+#if defined(_WIN32)
+#include <windows.h>
+#include <psapi.h>
+#include <io.h>
+#else
+#include <unistd.h>
+#include <cerrno>
+#endif
+
+#include <array>
+#include <chrono>
+#include <algorithm>
+#include <iostream>
+#include <thread>
+#include <atomic>
+#include <condition_variable>
+#include <deque>
+#include <map>
+#include <mutex>
+#include <charconv>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <fstream>
+#include <sstream>
+#include <string>
+#include <set>
+#include <vector>
+
+namespace {
+// perf-review D-4: the lent slots are refilled with queued copies and one wait; STRATA_REFILL_BLOCKING=1 waits on each
+bool refill_blocking() {
+    static const bool v = std::getenv("STRATA_REFILL_BLOCKING") != nullptr;
+    return v;
+}
+
+using Clock = std::chrono::steady_clock;
+
+struct Options {
+    std::string pack = "pack/full";
+    std::vector<int64_t> tokens;      // the prompt, PRE-TOKENIZED
+    int64_t max_new = 16;
+    int64_t max_context = 4096;
+    bool greedy = true;
+    uint64_t seed = 0;
+    int top_k = 20;
+    float top_p = 0.95f;
+    float temperature = 1.0f;
+    std::string dump_logits;          // one line of logits per generated position
+    int64_t logits_stride = 1;        // storage selection; all prompt tokens remain conditioned
+    /// **THE RESIDUAL, SO THE HEAD CAN BE CHECKED WITHOUT THE LAYERS.**
+    ///
+    /// C1 fails (LEDGER L116) and the pipeline is `embed -> 48 layers -> head`.  Dumping `R` splits it in half:
+    /// the head is one norm, two bf16 projections and one 794 MB GEMV, all of which can be recomputed in Python
+    /// from the manifest.  If Python agrees with the engine on the same `R`, the head is right and the layers
+    /// are wrong; if it disagrees, the head is wrong.  Nothing else in the engine can be split that cheaply.
+    std::string ple_gguf;              // the ORIGINAL second GGUF shard: the PLE table is not in the pack
+    bool no_ple = false;              // explicit diagnostic ablation; never a normal inference default
+    bool stream_token = false;        // R2.6 experiment: ordered work on the session stream
+    bool check_logits = false;        // optional full-vocabulary finite scan
+    bool gr_fp32_activations = false;  // pinned CUDA single-token BF16 activation contract
+    bool gr_native_mmvf = false;       // pinned projection reduction tree as well as FP32 inputs
+    bool native_bf16 = false;          // SSM gates, router and indexer projections only
+    bool native_bf16_extra = false;    // PLE value and shared expert scalar gate
+    bool native_ple_key = false;       // unchanged Q2_0 key and CUDA Q8_1 activations
+    bool native_moe_combine = false;   // pinned fused CUDA weighted reduction
+    bool native_gdn = false;          // pinned CUDA recurrence and preprocessing
+    bool native_flash_attn_short = false; // diagnostic pinned attention, context <=256
+    bool native_qsa_indexer = false;  // pinned F16 key cache and F32 pooling
+    bool native_qsa = false;          // pinned F32 QSA norms and gate
+    bool native_rope = false;         // pinned text-only CUDA rotary arithmetic
+    bool native_ple_postops = false;  // pinned PLE postprojection arithmetic
+    bool native_router = false;       // pinned fused 512-expert top-10 router
+    bool cpu_oracle_q8_0 = false;      // pinned x86 activation scales/codes at both expert stages
+    std::string native_head_gguf;      // native output.weight experiment; same model shard as the pack
+    std::vector<std::string> native_dense_gguf; // repeat for native GDN/QSA projection shards
+    /// Plan v0.3 P1: the whole native arithmetic set as ONE switch (model shard 1). It enables exactly the
+    /// combination recorded in bench/results/2026-09-23-attention-ple plus the native indexer, and never the
+    /// <=256-token attention adapter. It becomes the default once P0 shows it is not slower.
+    std::string native_preset;
+    /// Plan v0.3 P2: how the n-gram table is read. Direct (default) = unbuffered SSD reads, table never in RAM.
+    std::string ple_io = "direct";
+    int64_t ple_row_cache = 1 << 20;   ///< bounded row cache (rows of 90 B); 0 disables
+    int ple_inflight = 64;
+    double ple_delay_us = 0;           ///< fault injection: every row read completes no earlier than this
+    bool ple_sync_submit = false;      ///< A/B arm: submit reads on the token thread, no I/O worker
+    std::string kv = "fp16";           ///< plan v0.3 P7: KV storage, fp16 (default) or int8 (half the VRAM)
+    int64_t kv_resident = 0;           ///< KV streaming: resident cells per QSA layer (0: all in VRAM)
+    std::string dump_residual;
+    /// The head input, `bb.mixed`.  It exists so the head can be SPLIT: steps 1-4 (the per-stream norm, the two
+    /// bf16 projections and the stream mean) recompute cheaply in Python, and only the 794 MB GEMV does not.
+    std::string dump_mixed;
+    /// One residual snapshot per layer per position: `n_layers * hc * n_embd` floats per position, appended in
+    /// position order.  This is the C1 BISECTION LADDER - it is what `llama-debug --tensor-filter l_last` prints
+    /// for the reference, so the first layer whose `sum` diverges is the layer that holds the bug.  It needs the
+    /// captured path (the expert pool only exists there), so it is refused with `--no-capture`.
+    std::string dump_layers;
+    /// `2 * n_embd + 2 * hc` floats per layer per position: the attention half's block output, the MoE half's,
+    /// and the two injection vectors.  It separates `linear_attn_out-<l>` from `ffn_out-<l>`, which the residual
+    /// ladder cannot.  **CAPTURED INTO THE LAYER GRAPHS**, so it must be armed before `session_capture`.
+    std::string dump_halves;
+    /// P0.S8's routing trace, and a prerequisite the Phase 3 plan names explicitly.  One record per layer per
+    /// position: `int32 layer, int32 k, k int32 ids, k float weights`.  It is what a hit-rate curve for a
+    /// candidate VRAM expert cache is computed from, and it needs no new kernels - the doorbell already
+    /// publishes exactly this much to pinned memory.
+    std::string dump_routing;
+    bool no_capture = false;          // run the layers directly instead of replaying graphs
+    bool no_pool = false;             // skip the CPU expert pool: the GPU-only floor
+    bool sync_every_layer = false;
+    /// Per-stage CUDA-event timings inside the layer halves.  `--no-capture` only: an event recorded inside a
+    /// stream capture is silently dropped, so the captured path cannot carry this.
+    bool stage_timing = false;
+    /// Launch the 48 captured `pre` graphs back to back with no host work between them and report the pure GPU
+    /// time per token.  This is the only measurement that separates host-bound from GPU-bound, because the
+    /// stage events include every gap where the GPU waited for the host.
+    bool graph_only = false;
+    bool gpu_only_full = false;   ///< R0.3: pre + post + head, the true per-token GPU floor
+    int pool_workers = 0;         ///< R2.2: 0 = "all physical cores minus the host's"; >0 overrides
+    /// R2.2's first half, as an A/B arm.  **ON by default**, because the measurement that justifies it is the
+    /// pool's own drain: 33.7 GB/s against 5/6 x 44.14 = 36.8 for five workers, on a machine whose sixth core
+    /// is reserved for a host thread that has nothing to do while the drain runs.
+    bool no_host_worker = false;
+    bool mmap_experts = false;    ///< R2.1: opt OUT of the resident arena, back to MapViewOfFile
+    /// R4: slots of VRAM-resident experts.  **0 = off, and off is the default.**
+    /// **THE COMMENT THAT USED TO BE HERE WAS FALSE AND ROUND 328 MEASURED IT.**  It said "the cache has no
+    /// consumer yet - `moe_hit_grouped_s2` does not exist - so switching it on costs the fill traffic and
+    /// saves nothing".  The kernel exists (`src/kernels/cuda/s2_expert_grouped.cu`), it is wired at line ~660
+    /// via `expert_hit_run`, and switching the cache on **does** move work off the CPU pool: the drain fell
+    /// **19.076 -> 10.312 ms/token** at 4096 per-layer slots, for **-2.7 ms/token** end to end.  What was
+    /// true is that the ADMISSION POLICY gave every slot to the first position, which is why the earlier
+    /// measurement found nothing - see `expert_cache_per_layer`.
+    int expert_cache = 0;
+    std::array<int, 3> expert_cache_remote{}; ///< CUDA1..3 slots; CUDA0 keeps dense/state/MTP
+    std::string expert_cache_remote_placement = "stripe"; ///< stripe experts or assign complete layers to CUDA1..3
+    bool expert_cache_cpu_order = false;
+    /// **R4.2g.  ROUND 328 MEASURED THAT THE GLOBAL ADMISSION POLICY CANNOT WORK, AND THIS IS THE FIX.**
+    /// The default policy hands out slots in arrival order from one counter shared by all 48 layers, so the
+    /// first `n_slots` distinct pairs - about 26 LAYERS OF POSITION 0 - take every slot and hits are confined
+    /// to them.  Measured at 256 slots: **1781 of 60000 = 2.97%**, against **21.4%** for 8 slots per layer and
+    /// **70.4%** for 64, from `Memory/cache_allocation.py` on the same run's routing.  Off by default.
+    bool expert_cache_per_layer = false;
+    /// The PLE gather's prefetch, as an A/B arm.  The gather measured 2.10-2.61 ms/token because its sixteen
+    /// row reads are sixteen SEPARATE page faults into a 26.8 GB mapping; see `ple_prefetch_enable`.
+    bool no_ple_prefetch = false;
+    /// R4.2e: a `profile.bin` from `tools/make_profile.py`.  **When given, it decides residency instead of the
+    /// compulsory-miss policy**, which is the whole point: a profile ranked by routing frequency over a whole
+    /// trace is what the plan's `h = 0.6447` refers to, and compulsory-miss measured 0.4864 because it fills
+    /// with whatever the prompt touched FIRST.  Empty means no profile.
+    std::string expert_profile;
+    /// R4.2d: **ON by default**, because the measurement is unambiguous and the alternative is known-broken.
+    /// Without it, 17 of 10,562 layers had the hit work done when the pool returned; with it, 9,190.  The
+    /// A/B arm is `--no-hit-poke`.
+    bool no_hit_poke = false;
+    /// R0.9: capture each layer as THREE graphs and time them from outside the capture, which is the only
+    /// valid way to get a per-stage table on the real graph.  Prints and exits; it is a measurement, not a run.
+    bool gpu_stages = false;
+    bool stats = false;
+    bool shared_late = false;          ///< plan v0.3 P3 A/B: shared expert inside post[l] (old order)
+    bool keep_canonical = false;       ///< plan v0.3 P1 A/B: load canonical copies of natively served tensors
+    bool no_token_graph = false;       ///< plan v0.3 P3 A/B: two graphs per layer instead of one per token
+    bool no_fused_gr = false;          ///< plan v0.3 P3 A/B: the six-kernel native gr_read + separate gr_write
+    bool no_fast_attn = false;         ///< plan v0.3 P3 A/B: gather + one-block-per-head QSA attention
+    bool no_publish_kernel = false;    ///< plan v0.3 P3 A/B: memcpy nodes for the doorbell and QSA step
+    bool no_fused_gdn = false;         ///< plan v0.3 P3 A/B: llama.cpp-layout GDN step + separate out norm
+    bool no_fast_select = false;       ///< plan v0.3 P7 A/B: FP64 row scores + bit-serial cell top-k
+    /// Plan v0.3 P4: `--expert-cache auto` sizes the VRAM tier from what is free after the weights, the session
+    /// and the KV state, minus this reserve for the graphs, the hit scratch and the head.
+    int vram_reserve_mib = 700;
+    /// Plan v0.3 P5: batched prompt processing in chunks of this many tokens (0 = the token path).
+    int64_t prefill_chunk = 0;
+    /// `--prefill auto`: the largest chunk (up to 8192) whose buffers the expert cache can lend.  Every expert a chunk
+    /// routes to is streamed once per chunk, so a bigger chunk streams fewer bytes per token (the "ubatch" effect).
+    bool prefill_auto = false;
+    bool no_split_rows = false;        ///< plan v0.3 P4 A/B: one whole expert per pool thread
+    /// Plan v0.3 P5: the prompt path borrows the top expert-cache slots for its buffers and refills them after
+    /// the prompt (default); `--no-prefill-borrow` reserves the buffers' VRAM for the whole session instead.
+    bool no_prefill_borrow = false;
+    /// Plan v0.3 P5 validation: batch only positions [0, P) and run the rest of the prompt through the token path
+    /// (teacher-forced), so the logits of positions >= P - which depend on the batched state - can be scored
+    /// against the oracle at many positions.  0 = the whole prompt but the last position.
+    int64_t prefill_until = 0;
+    /// Plan v0.3 P6: after every processed position, append the residual after the last layer (hc x n_embd
+    /// floats, the MTP draft head's input) to this file.  Token path only.
+    std::string dump_final_r;
+    /// Plan v0.3 P6: speculative decoding with a verify window of this many tokens (the last accepted token and
+    /// spec-1 drafts); 0 = plain decode.  `spec_oracle` drafts from a token file (the expected continuation, for
+    /// the exactness test); `spec_corrupt` N > 0 replaces every Nth draft with a wrong token.
+    int spec = 0;
+    std::string spec_oracle;
+    int spec_corrupt = 0;
+    /// Plan v0.3 P6: the MTP draft layer's runtime directory (tools/mtp_rt.py); drafts come from it.
+    std::string mtp;
+    int64_t mtp_window = 32768;   ///< the draft layer attends to the last N cells (0 = every cell)
+    /// Plan v0.3 P6: the share (0..1) of each layer's distinct missed experts the GPU reads over PCIe from the
+    /// pinned arena while the CPU computes the rest (verify windows).
+    double pcie_frac = -1.0;   ///< < 0: the model's default (0.2 direct for the Q2_0 pack, 0.55 DMA for native packs)
+    std::string pcie_mode = "auto";   ///< auto | dma | kernel | direct
+    /// Plan v0.3 P6: every `adapt_every` rounds, swap up to `adapt_swaps` of the most-routed missing experts into
+    /// the VRAM tier in place of the least-routed resident ones (decayed counts).  0 = static residency.
+    int adapt_every = 4;
+    /// Plan v0.3 P6: a draft enters the verify window only while every draft before it (and itself) has at least
+    /// this probability under the draft layer; 0 = always --spec-1 drafts.
+    double spec_min_p = 0.0;
+    /// Stop when the model emits an end-of-turn token (<|endoftext|> 248044, <|im_end|> 248046, or --eos-ids).
+    bool stop_eos = false;
+    std::vector<int64_t> eos_ids = {248044, 248046};
+    bool spec_split = false;   ///< opt-in split verify window (the overlap study: exact, ~7% slower)
+    /// --serve, multi-GPU layer split: "K" or "K1,K2,.." (the first layer of each later stage) or "auto" (placed
+    /// from each GPU's free VRAM); empty = one GPU
+    std::string layer_split;
+    /// the later stages' devices "D1,D2,.." (default: the next visible GPUs; "0" with one K: both stages on this
+    /// GPU, sharing everything - the bit-exact A/B of the hand-off)
+    std::string split_device;
+    /// Plan v0.3 P8: stay resident and take requests on stdin (see the --serve block in main).
+    bool serve = false;
+    /// The vision path: keep a per-cell (t, h, w) rotary position table so --serve can take GENI requests.
+    bool vision = false;
+    int adapt_swaps = 96;
+    /// --serve: how many conversation checkpoints to keep between requests (0 = every request reads its whole
+    /// prompt again, the v0.1.2 behaviour).  One is the GDN recurrence of the 36 layers, the QSA indexer tails and
+    /// the PLE history (~118 MB of host RAM); the KV cache itself is positional and stays where it is.
+    int prompt_cache = 6;
+    /// --serve: also keep a checkpoint every N freshly read prompt tokens (0 = only at the last turn boundary)
+    int64_t prompt_cache_every = 16384;
+    /// --serve: a prompt read from token 0 is also checkpointed at its first turn boundary - the end of the system
+    /// prompt, which every chat of the same client shares - when that is at least N tokens (0 = never)
+    int64_t prompt_cache_root = 2048;
+    /// --serve: the token that opens a chat turn (<|im_start|>).  The last one in a prompt is where the chat's
+    /// history ends and the new assistant turn begins, which is the checkpoint the next request can reuse.
+    int64_t turn_token = 248045;
+    /// --serve: a text part of the prompt of at most N tokens (a chat message, the assistant header, a short tool
+    /// result) goes through the verify windows, S tokens at a time, instead of the batched prompt path (0 = always
+    /// the batched path)
+    int64_t short_read = 64;
+    /// The suffix drafter (prompt lookup): when the text being written repeats an earlier stretch of the context (code
+    /// edits, quoted input, tool-call JSON) by at least this many tokens, the window may be filled with what followed
+    /// it there instead of the MTP's drafts, where the MTP's own first guess agrees and the draft policy expects it to
+    /// pay (strata/spec/draft_policy.hpp).  On by default; 0 = MTP only.
+    int suffix_draft = 3;
+    /// The MTP's own window cap (0 = --spec): with --spec 6 --mtp-max-t 4 the long windows come from suffix matches.
+    int mtp_max_t = 0;
+    /// A control vector on the residual stream (strata/kernels/cvec.hpp), with llama.cpp's flags: the
+    /// `experimental-speed-projection` profile passes `--control-vector-scaled FILE:1.0 --control-vector-layer-range
+    /// 4 44 --cvec-mode project --cvec-dir per-layer`.  None by default; --serve switches a loaded one per request.
+    std::vector<std::pair<std::string, float>> cvec_files;
+    int cvec_first = -1, cvec_last = -1;   ///< llama.cpp's defaults: 1 .. the last layer
+    int cvec_mode = 1;                     ///< 0 = project, 1 = add (llama.cpp's default)
+    int cvec_single = -1;                  ///< --cvec-dir single:L (project mode): layer L's direction everywhere
+};
+
+void usage() {
+    std::fprintf(stderr,
+                 "strata generate --pack DIR --tokens \"1,2,3\" [options]\n"
+                 "\n"
+                 "  --pack DIR           the pack directory (default pack/full)\n"
+                 "  --tokens LIST        the prompt as comma-separated token IDS (required)\n"
+                 "  --tokens-file PATH   pretokenized prompt, commas or whitespace (alternative to --tokens)\n"
+                 "  --ple-gguf PATH      required PLE table (original second GGUF shard)\n"
+                 "  --no-ple             explicit diagnostic ablation of the PLE layer\n"
+                 "  --ple-io direct|mmap  n-gram table reads (plan v0.3 P2). direct (default): unbuffered SSD\n"
+                 "                       reads, the table never enters RAM or the file cache; mmap: A/B arm\n"
+                 "  --ple-row-cache N    bounded cache of fetched rows, 90 B each (default 1048576; 0 = off)\n"
+                 "  --ple-inflight N     outstanding SSD reads (default 64)\n"
+                 "  --ple-delay-us U     fault injection: each row read completes no earlier than U us\n"
+                 "  --ple-sync-submit    A/B arm: submit table reads on the token thread (default: an I/O thread)\n"
+                 "  --kv fp16|int8       KV storage (plan v0.3 P7): int8 codes + fp16 scale per 64 values, half the\n"
+                 "                       VRAM; default fp16 until gate G-C accepts int8\n"
+                 "  --kv q4_0            4-bit K/V after a Hadamard rotation (PR #21): half of int8's memory,\n"
+                 "                       slightly lower precision (see bench/results/2026-09-27-kv-q4)\n"
+                 "  --kv-resident N      KV streaming: keep N cells of each QSA layer in VRAM (min 20480) and the\n"
+                 "                       whole K/V in pinned RAM; the freed VRAM goes to expert slots. 0 (default):\n"
+                 "                       all of it in VRAM. A context of N cells or fewer is not streamed\n"
+                 "  --stream-token       enqueue token work on the session stream (experimental)\n"
+                 "  --check-logits       copy and check all logits in the stream-token path\n"
+                 "  --gr-fp32-activations  experimental CUDA-oracle GR activation precision\n"
+                 "  --gr-native-mmvf      experimental pinned GR norm/projections; implies FP32 activations\n"
+                 "  --native-bf16         experimental CUDA-oracle SSM/router/indexer BF16 projections\n"
+                 "  --native-bf16-extra   experimental CUDA-oracle PLE/shared gate BF16 projections\n"
+                 "  --native-ple-key      experimental native PLE key; requires --native-dense-gguf\n"
+                 "  --native-moe-combine  experimental pinned CUDA routed/shared combination\n"
+                 "  --native-gdn          experimental pinned CUDA GDN norms/gates/recurrence\n"
+                 "  --native-flash-attn-short  diagnostic pinned vector attention; --max-context <=256\n"
+                 "  --native-qsa-indexer  experimental pinned indexer key cache and pooling\n"
+                 "  --native-qsa          experimental pinned QSA normalization and output gate\n"
+                 "  --native-rope         experimental pinned text-only CUDA rotary arithmetic\n"
+                 "  --native-ple-postops  experimental pinned PLE postprojection arithmetic\n"
+                 "  --native-router       experimental pinned CUDA 512-expert top-10 routing\n"
+                 "  --cpu-oracle-q8-0     experimental pinned CPU expert quantization and dot reduction\n"
+                 "  --native SHARD1      every full-context native path at once (plan v0.3 P1): stream-token,\n"
+                 "                       GR MMVF, BF16, head, dense + PLE key, MoE combine, GDN, router, QSA,\n"
+                 "                       indexer, RoPE, PLE postops, and the CPU q8_0 contract unless the\n"
+                 "                       expert cache is on. Individual --native-* flags stay for A/B.\n"
+                 "  --native-head-gguf PATH  native Q5_K head from model shard 1; requires --stream-token\n"
+                 "  --native-dense-gguf PATH native GDN/QSA/shared projections; repeat for each source model shard\n"
+                 "  --expert-cache-cpu-order  experimental GPU expert reduction matching CPU order\n"
+                 "  --max-new N          tokens to generate (default 16)\n"
+                 "  --max-context N      KV/state capacity (default 4096)\n"
+                 "  --greedy             argmax (the default)\n"
+                 "  --seed S             enable sampling with this Philox seed\n"
+                 "  --top-k N --top-p F --temperature F\n"
+                 "  --dump-logits PATH   write one line of raw logits per position\n"
+                 "  --logits-stride N    store every Nth row plus final input (default 1); N>1 requires --max-new 1\n"
+                 "  --dump-residual PATH write the final R (hc x n_embd, f32) for head bisection\n"
+                 "  --dump-layers PATH   write R after EVERY layer, per position: the C1 bisection ladder\n"
+                 "  --dump-halves PATH   write both halves' block_out and inject per layer: the half bisection\n"
+                 "  --dump-routing PATH  write the routed expert ids and weights per layer per position (P0.S8)\n"
+                 "  --no-capture         run the layers directly instead of replaying graphs\n"
+                 "  --shared-late        A/B: shared expert after the CPU pool (default: overlapped with it)\n"
+                 "  --keep-canonical     A/B: also load canonical copies of natively served tensors (more VRAM)\n"
+                 "  --vision             --serve takes images too (GENI requests; embeddings from strata-vision)\n"
+                 "  --prompt-cache N     --serve: keep N conversation checkpoints between requests (default 6, ~118 MB\n"
+                 "                       of RAM each; 0 = read every prompt from the start)\n"
+                 "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
+                 "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
+                 "  --short-read N       --serve: read at most N fresh text tokens through the decode windows instead\n"
+                 "                       of the batched prompt path (default 64, 0 = off)\n"
+                 "  --suffix-draft N     prompt lookup: draft from an earlier repeat of the last N+ tokens of context\n"
+                 "                       when it pays (default 3; 0 = MTP only)\n"
+                 "  --mtp-max-t M        cap the MTP's windows at M tokens (0 = --spec; longer ones come from suffixes)\n"
+                 "  --control-vector-scaled FILE:SCALE[,...]  a control vector GGUF on the residual stream (llama.cpp's\n"
+                 "                       format; --control-vector FILE = scale 1).  --serve: requests switch it (cvec=0|1)\n"
+                 "  --control-vector-layer-range A B  the layers it follows (inclusive; default 1 .. the last)\n"
+                 "  --cvec-mode add|project  h += s v (default) or h -= s (h.v) v with v unit\n"
+                 "  --cvec-dir per-layer|single:L  each layer's own direction (default) or layer L's everywhere (project)\n"
+                 "  --no-token-graph     A/B: two graphs per layer (the host launches each) instead of one per token\n"
+                 "  --no-fused-gr        A/B: the six-kernel hyper-connection read and a separate write (native)\n"
+                 "  --prefill CHUNK      batched prompt processing in chunks of CHUNK tokens (needs --native); auto =\n"
+                 "                       the largest chunk up to 8192 whose buffers the expert cache can lend\n"
+                 "  --no-pool            skip the CPU expert pool (the GPU-only floor)\n"
+                 "  --sync-every-layer   debug: synchronise after every layer\n"
+                 "  --ple-gguf PATH      the n-gram/PLE shard.  WITHOUT IT LAYER 1's PLE IS SILENTLY SKIPPED,\n"
+                 "                       which changes every number downstream - pass it for any real run\n"
+                 "  --dump-mixed PATH    write the post-attention residual (n_embd, f32)\n"
+                 "  --stage-timing       per-stage KERNEL-COUNT shares.  NOT a time profile: an uncaptured\n"
+                 "                       event interval includes host gaps, so run with --gpu-only-full first\n"
+                 "  --graph-only         MEASURE: replay the 48 `pre` graphs only.  OMITS the 48 `post` graphs\n"
+                 "                       and the LM head, so it is NOT the GPU floor (R0.3, Memory/ERRORS.md A4)\n"
+                 "  --gpu-only-full      MEASURE: replay pre+post for all 48 layers plus the LM head, no pool.\n"
+                 "                       THE TRUE PER-TOKEN GPU FLOOR.  Quote this one, not --graph-only.\n"
+                 "  --stats              print the per-stage breakdown\n"
+                 "  --gpu-stages         R0.9: capture the layer as three graphs (mixer / ffn+router / post)\n"
+                 "                       and time them from OUTSIDE the capture.  The per-stage table on the\n"
+                 "                       real graph that --stage-timing cannot give.  Prints and exits.\n"
+                 "  --expert-profile P   R4.2e: pre-load the VRAM tier from a `profile.bin` (see\n"
+                 "                       tools/make_profile.py) instead of admitting on first use.\n"
+                 "  --no-hit-poke        R4.2d's A/B arm.  The hit path pokes the driver once right after its\n"
+                 "                       launch so the GPU starts while the CPU pool runs; without it the work\n"
+                 "                       waits for the next driver entry and does not overlap at all.\n"
+                 "  --no-ple-prefetch     A/B arm: read the PLE table's sixteen rows one at a time, instead of\n"
+                 "                       issuing them in one PrefetchVirtualMemory call.\n"
+                 "  --expert-cache N     R4: keep N expert blobs resident in VRAM and compute their rows on the\n"
+                 "                       GPU via `moe_hit_grouped_s2`.  DEFAULT 0.  Measured at 4096 slots\n"
+                 "                       with --expert-cache-per-layer: 54.4%% hits, CPU pool drain 19.1 -> 10.3\n"
+                 "                       ms/token, -2.7 ms/token end to end.\n"
+                 "  --expert-cache-device1 N  pre-fill N experts on CUDA1 (experimental)\n"
+                 "  --expert-cache-device2 N  pre-fill N more experts on CUDA2\n"
+                 "  --expert-cache-device3 N  pre-fill N more experts on CUDA3\n"
+                 "  --expert-cache-remote-placement stripe|layer  distribute expert ranks or whole\n"
+                 "                       layers across CUDA1..3 (default: stripe)\n"
+                 "  --expert-cache-per-layer  R4.2g: give each layer its OWN slots instead of letting the first\n"
+                 "                       position take all of them.  The default policy fills in arrival order\n"
+                 "                       from one shared counter, so 256 slots went to ~26 layers of position 0\n"
+                 "                       and measured **2.97%%**.  Per-layer, the same routing gives 21.4%% at 8\n"
+                 "                       slots/layer and 70.4%% at 64.\n"
+                 "  --no-host-worker     R2.2: the A/B arm.  By default the HOST THREAD joins the drain, so the\n"
+                 "                       pool is six threads on six cores instead of five plus an idle core;\n"
+                 "                       this flag restores the five-worker form for comparison on `pool phases`.\n"
+                 "  --pool-workers N     R2.2: CPU expert pool worker count.  Default 0 = every physical core\n"
+                 "                       except the one the host loop spins on.  A sweep is how the pool's\n"
+                 "                       deviation from `cpu_s2` is attributed.\n"
+                 "  --mmap-experts       R2.1: opt OUT of the resident expert arena, back to MapViewOfFile.\n"
+                 "                       The A/B arm: the mmap's rate depends on the OS page cache holding\n"
+                 "                       34 GB, and measured 71.97 vs 34.78 ms/token cold vs warm.\n");
+}
+
+/// All shards of a split GGUF, from shard 1's path ("...-00001-of-00002.gguf"); just the path when it is not split.
+std::vector<std::string> model_shards(const std::string& first) {
+    const std::string tag = "-00001-of-";
+    const size_t at = first.rfind(tag);
+    if (at == std::string::npos || first.size() < at + tag.size() + 10) return {first};
+    const int total = std::atoi(first.substr(at + tag.size(), 5).c_str());
+    std::vector<std::string> out;
+    for (int i = 1; i <= total && i <= 99; ++i) {
+        char num[8];
+        std::snprintf(num, sizeof num, "%05d", i);
+        std::string p = first;
+        p.replace(at + 1, 5, num);
+        if (std::ifstream(p, std::ios::binary)) out.push_back(p);
+    }
+    return out.empty() ? std::vector<std::string>{first} : out;
+}
+
+bool parse_i64_list(const char* s, std::vector<int64_t>& out, std::string& err) {
+    out.clear();
+    std::string text(s);
+    for (char& c : text) if (c == ',') c = ' ';
+    std::istringstream input(text);
+    std::string token;
+    while (input >> token) {
+        int32_t id = 0;
+        const auto parsed = std::from_chars(token.data(), token.data() + token.size(), id);
+        if (parsed.ec != std::errc{} || parsed.ptr != token.data() + token.size() || id < 0) {
+            err = "invalid token id: expected an integer in [0, 2147483647]";
+            out.clear();
+            return false;
+        }
+        out.push_back(id);
+    }
+    if (out.empty()) { err = "token list was empty"; return false; }
+    return true;
+}
+
+/// The pool's adapter plus the wall-clock it spent, so the report can say how much of the token was the CPU.
+struct Drive {
+    strata::core::ExpertDispatch d;
+    double cpu_ms = 0;
+    int64_t calls = 0;
+    /// THE ROUTING TRACE, which is P0.S8 and a stated prerequisite of Phase 3.  `drive_pool` is called once
+    /// per layer from the main loop - the workers live inside `expert_pool_dispatch` - so a single FILE* here
+    /// needs no locking.  `d.layers` is the CURRENT layer on entry (the adapter increments it as it walks the
+    /// blob), which is why the layer index comes from there rather than from a counter of our own.
+    std::FILE* routing = nullptr;
+};
+
+void drive_pool(void* user, const float* x_f, const int32_t* ids, const float* weights, int64_t n_embd, int64_t k,
+                float* out) {
+    Drive* t = (Drive*) user;
+    const Clock::time_point a = Clock::now();
+    strata::core::expert_pool_dispatch(&t->d, x_f, ids, weights, n_embd, k, out);
+    t->cpu_ms += std::chrono::duration<double, std::milli>(Clock::now() - a).count();
+    ++t->calls;
+    // THE ROUTING TRACE.  Written AFTER the dispatch so the layer index is still this layer's: `d.layers` is
+    // advanced by the adapter as it consumes the blob, and reading it after the call is the same value the
+    // dispatch used.  Record = int32 layer, int32 k, k int32 ids, k float weights.
+    if (t->routing != nullptr) {
+        // **`d.layers` HAS ALREADY BEEN ADVANCED BY THE TIME THIS RUNS, AND THE FIRST TRACE WAS OFF BY ONE
+        // BECAUSE OF IT.**  The adapter walks the blob by incrementing `d.layers` as it consumes each layer's
+        // experts, so after the dispatch it holds the NEXT layer's index.  `tools/make_profile.py` caught it
+        // with a bounds check when the trace turned out to span 1..48 instead of 0..47.  The hit-rate CURVE was
+        // unaffected - it is a per-layer split, and shifting every layer by one preserves both metrics - but
+        // anything keyed on the layer index, which is exactly what a cache profile is, would have been wrong.
+        const int32_t layer_idx = (int32_t) (t->d.layers - 1);
+        if (layer_idx < 0 || layer_idx >= 48) {
+            std::fprintf(stderr, "strata generate: the routing trace saw layer %d, outside 0..47\n", layer_idx);
+            return;
+        }
+        const int32_t rec[2] = {layer_idx, (int32_t) k};
+        std::fwrite(rec, sizeof rec, 1, t->routing);
+        std::fwrite(ids, sizeof(int32_t), (size_t) k, t->routing);
+        std::fwrite(weights, sizeof(float), (size_t) k, t->routing);
+    }
+}
+
+/// Plan v0.3 P6: the pool for a verify window.
+void drive_pool_multi(void* user, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k, float* out,
+                      int64_t layer) {
+    Drive* t = (Drive*) user;
+    t->d.layers = layer;
+    const Clock::time_point a = Clock::now();
+    strata::core::expert_pool_dispatch_multi(t->d, x_f, ids, n_tok, k, out);
+    t->cpu_ms += std::chrono::duration<double, std::milli>(Clock::now() - a).count();
+    ++t->calls;
+    // the routing trace for the serve path: the same record format drive_pool writes (layer, k, ids, weights),
+    // one record per token.  The multi dispatch fuses the router weights into the kernel and does not surface
+    // them, so records carry unit weights: tools/make_profile.py ranks pairs by routed frequency, which is the
+    // signal that matters; a one-shot --dump-routing run records true weights if a weighted ranking is wanted.
+    if (t->routing != nullptr && layer >= 0 && layer < 48) {
+        for (int64_t tok = 0; tok < n_tok; ++tok) {
+            const int32_t rec[2] = {(int32_t) layer, (int32_t) k};
+            std::fwrite(rec, sizeof rec, 1, t->routing);
+            std::fwrite(ids + tok * k, sizeof(int32_t), (size_t) k, t->routing);
+            static const float one[64] = {};   // k <= 64 in a verify window; zeros read as unit weights
+            std::fwrite(one, sizeof(float), (size_t) k, t->routing);
+        }
+    }
+}
+
+/// Layer split: every verify stage shares one Drive (its counters, usage and failure flags); the GPU plan, the expert
+/// cache and the PCIe share the pool uses for a layer are those of the stage that runs it.
+struct SplitDrive {
+    static constexpr int kMax = 8;
+    Drive* base = nullptr;
+    int n = 0;                                    ///< stages
+    int64_t end[kMax] = {};                       ///< stage i runs the layers from end[i - 1] (0) below end[i]
+    strata::core::GpuPlanSink* plan[kMax] = {};
+    const uint8_t* cache_base[kMax] = {};
+    const uint64_t* cache_slot_off[kMax] = {};
+    int pcie_num[kMax] = {};
+};
+void drive_pool_split(void* user, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k, float* out,
+                      int64_t layer) {
+    SplitDrive* s = (SplitDrive*) user;
+    int st = 0;
+    while (st + 1 < s->n && layer >= s->end[st]) ++st;
+    Drive& d = *s->base;
+    d.d.plan = s->plan[st];
+    d.d.cache_base = s->cache_base[st];
+    d.d.cache_slot_off = s->cache_slot_off[st];
+    d.d.pcie_num = s->pcie_num[st];
+    drive_pool_multi(s->base, x_f, ids, n_tok, k, out, layer);
+}
+
+/// Layer split across GPUs: a later stage on its own device, with its own copy of the dense weights, a session, an
+/// expert cache for its layers, a verify window and a prompt path; the last one also holds the head (the drafter
+/// lives on its device too).
+struct GpuStage {
+    int dev = 0;
+    int64_t lb = 0, le = 0;
+    double pcie_frac = 0.0;
+    strata::core::WeightTable wt;
+    strata::core::NativeDense dense;
+    strata::core::NativeHead head;
+    strata::core::SessionState ss;
+    dpct::queue_ptr stream = &dpct::get_in_order_queue();
+    strata::core::ExpertCache cache;
+    std::vector<std::pair<int32_t, int32_t>> profile;   ///< its layers' share of the profile, hottest first
+    int32_t* d_res = nullptr;                            ///< the residency table on its device
+    strata::core::Verifier ver;
+    strata::prefill::Prefill sp;
+    dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
+    dpct::event_ptr adapt_ev = nullptr;
+    bool adapt_live = false;                             ///< swaps of this request are in flight on it
+    int32_t* mrope = nullptr;                            ///< --vision: the image-position table on its device
+};
+
+// ---- issue #31: what the watchdog prints before it stops a stalled engine
+struct MemSample {
+    unsigned long long faults = 0, rss_mib = 0, avail_mib = 0, commit_mib = 0;   // faults: hard (Linux) / all (Windows)
+};
+MemSample mem_sample() {
+    MemSample m;
+#if defined(_WIN32)
+    PROCESS_MEMORY_COUNTERS pmc{};
+    if (K32GetProcessMemoryInfo(GetCurrentProcess(), &pmc, sizeof pmc)) {
+        m.faults = pmc.PageFaultCount;
+        m.rss_mib = pmc.WorkingSetSize >> 20;
+        m.commit_mib = pmc.PagefileUsage >> 20;
+    }
+    MEMORYSTATUSEX ms{};
+    ms.dwLength = sizeof ms;
+    if (GlobalMemoryStatusEx(&ms)) m.avail_mib = ms.ullAvailPhys >> 20;
+#else
+    if (std::FILE* f = std::fopen("/proc/self/stat", "r")) {
+        char buf[4096];
+        const size_t n = std::fread(buf, 1, sizeof buf - 1, f);
+        buf[n] = 0;
+        std::fclose(f);
+        const char* s = std::strrchr(buf, ')');   // fields after the command name: 3 state ... 12 majflt
+        for (int field = 2; s && field < 12; ++field) s = std::strchr(s + 1, ' ');
+        if (s) m.faults = std::strtoull(s + 1, nullptr, 10);
+    }
+    auto kb = [](const char* path, const char* key) -> unsigned long long {
+        unsigned long long v = 0;
+        if (std::FILE* f = std::fopen(path, "r")) {
+            char line[256];
+            const size_t kl = std::strlen(key);
+            while (std::fgets(line, sizeof line, f))
+                if (std::strncmp(line, key, kl) == 0) { v = std::strtoull(line + kl, nullptr, 10); break; }
+            std::fclose(f);
+        }
+        return v;
+    };
+    m.rss_mib = kb("/proc/self/status", "VmRSS:") >> 10;
+    m.commit_mib = kb("/proc/self/status", "VmSwap:") >> 10;
+    m.avail_mib = kb("/proc/meminfo", "MemAvailable:") >> 10;
+#endif
+    return m;
+}
+
+void stall_report(std::FILE* f, uint64_t layers_during) {
+    strata::core::Progress& p = strata::core::progress();
+    std::fprintf(f, "strata serve: stall report (engine %s): stage \"%s %lld\" for %lld s; %llu layers served since the "
+                    "last finished step (0 = stopped, more = slow)\n", STRATA_VERSION, p.where.load(),
+                 (long long) p.detail.load(), (long long) ((strata::core::progress_now_ms() - p.since_ms.load()) / 1000),
+                 (unsigned long long) layers_during);
+    for (int pass = 0; pass < 2; ++pass) {
+        if (pass == 1) {
+            std::this_thread::sleep_for(std::chrono::seconds(2));
+            std::fprintf(f, "  2 s later:\n");
+        }
+        if (auto fn = strata::core::diag_pool_fn().load()) fn(f);
+        if (auto fn = strata::core::diag_verify_fn().load()) fn(f);
+        const MemSample m = mem_sample();
+        std::fprintf(f, "  memory: %llu MiB resident, %llu MiB %s, %llu MiB RAM available; %llu %s\n", m.rss_mib,
+                     m.commit_mib,
+#if defined(_WIN32)
+                     "committed", m.avail_mib, m.faults, "page faults so far"
+#else
+                     "in swap", m.avail_mib, m.faults, "major page faults so far"
+#endif
+        );
+        std::fflush(f);
+    }
+#if defined(_WIN32)
+    // every thread's stack, to read against this build's PDB: a few MB beside the engine's working directory
+    if (HMODULE dbg = LoadLibraryA("dbghelp.dll")) {
+        using Fn = BOOL(WINAPI*)(HANDLE, DWORD, HANDLE, int, void*, void*, void*);
+        if (auto write = (Fn) GetProcAddress(dbg, "MiniDumpWriteDump")) {
+            char path[64];
+            std::snprintf(path, sizeof path, "strata-stall-%lu.dmp", (unsigned long) GetCurrentProcessId());
+            HANDLE h = CreateFileA(path, GENERIC_WRITE, 0, nullptr, CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL, nullptr);
+            if (h != INVALID_HANDLE_VALUE) {
+                const int kThreadInfo = 0x1000;   // MiniDumpWithThreadInfo; MiniDumpNormal = 0
+                const BOOL ok = write(GetCurrentProcess(), GetCurrentProcessId(), h, kThreadInfo, nullptr, nullptr, nullptr);
+                CloseHandle(h);
+                char full[MAX_PATH];
+                if (!GetFullPathNameA(path, MAX_PATH, full, nullptr)) std::snprintf(full, sizeof full, "%s", path);
+                std::fprintf(f, "  %s the thread stacks to %s (attach it to the issue)\n", ok ? "wrote" : "could not write",
+                             full);
+            }
+        }
+    }
+#endif
+}
+
+/// STRATA_TRACE=1: the VRAM left at a step of the startup (finds what fills the card after the cache is sized)
+void mem_mark(const char* where) {
+    static const bool on = std::getenv("STRATA_TRACE") != nullptr;
+    if (!on) return;
+    size_t free_b = 0, total_b = 0;
+    /*
+    DPCT1106:666: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    dpct::get_current_device().get_memory_info(free_b, total_b);
+    std::fprintf(stderr, "strata trace: %lld MiB free after %s\n", (long long) (free_b >> 20), where);
+}
+
+int argmax(const std::vector<float>& v) {
+    int best = 0;
+    for (size_t i = 1; i < v.size(); ++i)
+        if (v[i] > v[best]) best = (int) i;
+    return best;
+}
+
+// ---- --serve's conversation cache.  A chat or an agent sends the whole conversation again with every request, and
+// reading it again is what made a long session wait minutes for every turn.  What a sequence leaves behind splits in
+// two, and only one half needs copying:
+//   * POSITIONAL state - the KV cache of the 12 QSA layers and their pooled indexer keys, the draft layer's KV.  A
+//     cell is written once for its position and read only by later positions (the block scores take `dead` for the
+//     block being filled, never its pooled row), so rewinding to a position just means writing from there again.
+//   * RUNNING state - the 36 GDN recurrences and conv histories, each QSA layer's indexer tail (the unfinished
+//     block's raw keys) and the PLE's normalized history.  Each describes "everything so far" and cannot be
+//     rewound, so a checkpoint is a copy of exactly these: ~118 MB, the same set the verifier snapshots to roll
+//     back rejected drafts.
+// A checkpoint is only valid while the positional cells below it still hold ITS tokens, so the serve loop keeps
+// just the checkpoints that are prefixes of the tokens the session holds now.
+struct ImgKey {
+    int64_t start = 0;      ///< the image's first <|image_pad|> position
+    uint64_t hash = 0;      ///< its embeddings and grid: the pad tokens alone are the same for every picture
+    bool operator==(const ImgKey& o) const { return start == o.start && hash == o.hash; }
+};
+
+struct ConvCheckpoint {
+    std::vector<int32_t> ids;     ///< the tokens this state has consumed
+    std::vector<ImgKey> imgs;     ///< the images among them
+    std::vector<uint8_t> gdn, ple, tails;
+    uint64_t used = 0;            ///< last-use stamp for the retention policy (conv_cache.hpp)
+    std::vector<ConvCheckpoint> stage_parts;   ///< a layer split's later stages: their sessions' running state
+};
+
+uint64_t fnv1a(const void* data, size_t n, uint64_t h = 1469598103934665603ull) {
+    const uint8_t* p = (const uint8_t*) data;
+    for (size_t i = 0; i < n; ++i) { h ^= p[i]; h *= 1099511628211ull; }
+    return h;
+}
+
+struct ConvStateSizes {
+    size_t gdn = 0, ple = 0, tail = 0;
+};
+
+ConvStateSizes conv_state_sizes(const strata::core::ModelGeometry& g) {
+    ConvStateSizes z;
+    z.gdn = (size_t) g.n_gdn_layers() *
+            ((size_t) g.ssm_state_size * (size_t) g.ssm_v_heads * (size_t) g.ssm_state_size +
+             (size_t) g.ssm_conv_channels * (size_t) (g.ssm_d_conv - 1)) * sizeof(float);
+    z.ple = (size_t) strata::kernels::NG_HIST * (size_t) strata::kernels::NG_HC_DIM * sizeof(float);
+    z.tail = (size_t) (strata::kernels::qsa_real_shapes().idx_block - 1) * (size_t) g.idx_key_dim * sizeof(float);
+    return z;
+}
+
+/// Copies the running state out.  The caller has synchronized the device.
+bool checkpoint_save(ConvCheckpoint &c, const strata::core::SessionState &ss,
+                     const strata::core::ModelGeometry &g) try {
+    const ConvStateSizes z = conv_state_sizes(g);
+    c.gdn.resize(z.gdn);
+    c.ple.resize(ss.ple_hist != nullptr ? z.ple : 0);
+    c.tails.resize(z.tail * (size_t) g.n_qsa_layers());
+    if (DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memcpy(c.gdn.data(), ss.gdn_state, z.gdn)
+                             .wait()) != 0) return false;
+    if (!c.ple.empty() &&
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memcpy(c.ple.data(), ss.ple_hist, z.ple)
+                             .wait()) != 0)
+        return false;
+    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
+        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                 .memcpy(c.tails.data() + (size_t)i * z.tail,
+                                         ss.qsa_states[i].idx_tail, z.tail)
+                                 .wait()) != 0)
+            return false;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+/// Puts a checkpoint's running state back; the positional cells below it are the caller's to guarantee.
+bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
+                        const strata::core::ModelGeometry &g) try {
+    const ConvStateSizes z = conv_state_sizes(g);
+    if (c.gdn.size() != z.gdn || c.tails.size() != z.tail * (size_t) g.n_qsa_layers()) return false;
+    /*
+    DPCT1114:667: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ss.gdn_state, c.gdn.data(), z.gdn)) != 0) return false;
+    /*
+    DPCT1114:668: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    if (!c.ple.empty() && DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                              ss.ple_hist, c.ple.data(), z.ple)) != 0)
+        return false;
+    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
+        /*
+        DPCT1114:669: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                ss.qsa_states[i].idx_tail, c.tails.data() + (size_t)i * z.tail,
+                z.tail)) != 0)
+            return false;
+    // the PLE's token window is the last two tokens, OLDEST FIRST, -1 where there is none (as session_zero leaves it)
+    const size_t L = c.ids.size();
+    ss.ple_prev[0] = L >= 2 ? c.ids[L - 2] : -1;
+    ss.ple_prev[1] = L >= 1 ? c.ids[L - 1] : -1;
+    return DPCT_CHECK_ERROR(
+               dpct::get_current_device().queues_wait_and_throw()) == 0;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// --control-vector-scaled: llama.cpp's `common_control_vector_load` (every file's `direction.<l>` times its scale,
+// summed; layer 0 has none) and `llama_adapter_cvec::apply` with the projection-mode patch (project: the unit
+// direction and its norm as the scale), into the tables `cvec_upload` takes.  `summary` is what INFO reports.
+bool load_control_vectors(const Options& o, const strata::core::ModelGeometry& g, std::string& summary, std::string& err) {
+    const int64_t L = g.n_layers, N = g.n_embd;
+    std::vector<float> data((size_t) (L * N), 0.0f);
+    std::vector<bool> have((size_t) L, false);
+    for (const auto& [path, scale] : o.cvec_files) {
+        try {
+            strata::GgufFile f(path);
+            const strata::MetaValue* arch = f.get("general.architecture");
+            if (arch == nullptr || arch->s != "controlvector") {
+                err = path + ": not a control vector GGUF (general.architecture is not 'controlvector')";
+                return false;
+            }
+            const strata::MetaValue* hint = f.get("controlvector.model_hint");
+            if (hint != nullptr && hint->s != "qwen4exp")
+                std::fprintf(stderr, "strata generate: %s was made for '%s', not qwen4exp\n", path.c_str(), hint->s.c_str());
+            int found = 0;
+            for (const strata::TensorInfo& t : f.tensors()) {
+                if (t.name.rfind("direction.", 0) != 0) continue;
+                const long l = std::strtol(t.name.c_str() + 10, nullptr, 10);
+                if (l < 1 || l >= L) continue;   // layer 0 has no vector; past the model is ignored, as in llama.cpp
+                if (t.type != 0 || t.elements() != (uint64_t) N) {
+                    err = path + ": " + t.name + " must be " + std::to_string((long long) N) + " f32";
+                    return false;
+                }
+                const float* src = reinterpret_cast<const float*>(f.tensor_data(t));
+                for (int64_t j = 0; j < N; ++j) data[(size_t) (l * N + j)] += scale * src[j];
+                have[(size_t) l] = true;
+                ++found;
+            }
+            if (found == 0) { err = path + ": no direction.<layer> tensors"; return false; }
+        } catch (const std::exception& e) {
+            err = e.what();
+            return false;
+        }
+    }
+    const int first = o.cvec_first <= 0 ? 1 : o.cvec_first;
+    const int last = (o.cvec_last <= 0 || o.cvec_last >= L) ? (int) L - 1 : o.cvec_last;
+    const int single = o.cvec_mode == 0 ? o.cvec_single : -1;
+    if (single >= 0 && (single >= L || !have[(size_t) single])) {
+        err = "--cvec-dir single:" + std::to_string(single) + ": the vector has no direction for that layer";
+        return false;
+    }
+    std::vector<float> dir((size_t) (L * N), 0.0f), s((size_t) L, 0.0f);
+    int steered = 0;
+    for (int64_t l = first; l <= last; ++l) {
+        const int64_t src = single >= 0 ? single : l;
+        if (!have[(size_t) src]) continue;
+        const float* d = data.data() + (size_t) (src * N);
+        if (o.cvec_mode == 0) {
+            double nrm = 0.0;
+            for (int64_t j = 0; j < N; ++j) nrm += (double) d[j] * d[j];
+            nrm = std::sqrt(nrm);
+            if (nrm <= 0.0) continue;
+            s[(size_t) l] = (float) nrm;
+            for (int64_t j = 0; j < N; ++j) dir[(size_t) (l * N + j)] = (float) (d[j] / nrm);
+        } else {
+            s[(size_t) l] = 1.0f;
+            std::copy(d, d + N, dir.begin() + (size_t) (l * N));
+        }
+        ++steered;
+    }
+    if (steered == 0) { err = "the control vector has no direction in layers " + std::to_string(first) + ".." + std::to_string(last); return false; }
+    if (!strata::kernels::cvec_upload(dir, s, o.cvec_mode, first, last, N, g.hc, err)) return false;
+    summary = std::string(o.cvec_mode == 0 ? "project" : "add") + ":" + std::to_string(first) + "-" + std::to_string(last) +
+              (single >= 0 ? ":single" + std::to_string(single) : "");
+    // the line llama.cpp's patched build prints, so a log shows the same thing
+    std::fprintf(stderr, "strata generate: control vector mode = %s, dir = %s, layers %d..%d (%d steered)\n",
+                 o.cvec_mode == 0 ? "project" : "add", single >= 0 ? "single" : "per-layer", first, last, steered);
+    return true;
+}
+
+// The effective host->device bandwidth of the PCIe link: copies from pinned host memory, as the expert arena's
+// reads are.  The native default share (0.55) was measured on x16 links (~26-28 GB/s); a x8 card in a x8 slot
+// carries about half of that.  Returns < 0 when the probe cannot run (then the caller keeps the default).
+double probe_pcie_h2d_gbps() try {
+    constexpr size_t kBytes = 256ull << 20;
+    constexpr int kIters = 4;
+    void* h = nullptr;
+    void* d = nullptr;
+    dpct::event_ptr ev0, ev1;
+    if (DPCT_CHECK_ERROR(h = (void *)malloc(kBytes)) != 0) return -1.0;
+    if (DPCT_CHECK_ERROR(d = (void *)sycl::malloc_device(
+                             kBytes, dpct::get_in_order_queue())) != 0 ||
+        DPCT_CHECK_ERROR(ev0 = new sycl::event()) != 0 ||
+        DPCT_CHECK_ERROR(ev1 = new sycl::event()) != 0) {
+        if (d != nullptr) sycl::free(d, dpct::get_in_order_queue());
+        free(h);
+        return -1.0;
+    }
+    std::memset(h, 0, kBytes);   // fault the pages in before timing
+    /*
+    DPCT1124:670: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    dpct::get_in_order_queue().memcpy(
+        d, h, kBytes); // warmup: context up, copy engine primed
+    dpct::sync_barrier(ev0);
+    /*
+    DPCT1124:671: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    for (int i = 0; i < kIters; ++i) dpct::get_in_order_queue().memcpy(d, h,
+                                                                       kBytes);
+    dpct::sync_barrier(ev1);
+    const bool ok = DPCT_CHECK_ERROR(ev1->wait_and_throw()) == 0;
+    float ms = 0.f;
+    const bool timed =
+        ok &&
+        DPCT_CHECK_ERROR(
+            ms = (ev1->get_profiling_info<
+                      sycl::info::event_profiling::command_end>() -
+                  ev0->get_profiling_info<
+                      sycl::info::event_profiling::command_start>()) /
+                 1000000.0f) == 0 &&
+        ms > 0.01f;
+    const double bw = timed ? ((double) kIters * (double) kBytes / (ms * 1e-3)) / 1e9 : -1.0;
+    dpct::destroy_event(ev0);
+    dpct::destroy_event(ev1);
+    sycl::free(d, dpct::get_in_order_queue());
+    free(h);
+    return bw;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    // **UNBUFFERED, BECAUSE THE INTERESTING OUTPUT IS THE OUTPUT BEFORE A CRASH.**  `stdout` redirected to a
+    // pipe or a file is block-buffered, so a program that dies loses every line it had already printed - which
+    // turns "it crashed at step 7" into "it crashed somewhere", and the difference is a debugging session.
+    std::setvbuf(stdout, nullptr, _IONBF, 0);
+    // Load every CUDA kernel when the context is created, before the expert cache takes the free VRAM.  With the
+    // default lazy loading, a kernel first used mid-prompt (MMQ for IQ3_XXS at 64K+ on a 12 GB card) found no VRAM
+    // left for its code and the engine ended ("out of memory: cudaFuncSetAttribute").  Costs ~30 MB of VRAM.
+    if (std::getenv("CUDA_MODULE_LOADING") == nullptr) {
+#if defined(_WIN32)
+        _putenv_s("CUDA_MODULE_LOADING", "EAGER");
+#else
+        setenv("CUDA_MODULE_LOADING", "EAGER", 0);
+#endif
+    }
+    Options o;
+    bool have_tokens = false;
+    bool have_logits_stride = false;
+    for (int i = 1; i < argc; ++i) {
+        const std::string a = argv[i];
+        auto next = [&](const char* what) -> const char* {
+            if (i + 1 >= argc) { std::fprintf(stderr, "%s needs a value\n", what); std::exit(2); }
+            return argv[++i];
+        };
+        if (a == "--help" || a == "-h") { usage(); return 0; }
+        else if (a == "--pack") o.pack = next("--pack");
+        else if (a == "--tokens") {
+            if (have_tokens) { std::fprintf(stderr, "supply one token input only\n"); return 2; }
+            std::string e;
+            if (!parse_i64_list(next("--tokens"), o.tokens, e)) { std::fprintf(stderr, "%s\n", e.c_str()); return 2; }
+            have_tokens = true;
+        }
+        else if (a == "--tokens-file") {
+            if (have_tokens) { std::fprintf(stderr, "supply one token input only\n"); return 2; }
+            std::ifstream input(next("--tokens-file"));
+            if (!input) { std::fprintf(stderr, "cannot open token file\n"); return 2; }
+            std::string text((std::istreambuf_iterator<char>(input)), std::istreambuf_iterator<char>());
+            if (input.bad()) { std::fprintf(stderr, "cannot read token file\n"); return 2; }
+            std::string error;
+            if (text.find('\0') != std::string::npos || !parse_i64_list(text.c_str(), o.tokens, error)) {
+                std::fprintf(stderr, "malformed token file: %s\n", error.c_str()); return 2;
+            }
+            have_tokens = true;
+        }
+        else if (a == "--max-new") o.max_new = std::atoll(next("--max-new"));
+        else if (a == "--max-context") o.max_context = std::atoll(next("--max-context"));
+        else if (a == "--greedy") o.greedy = true;
+        else if (a == "--seed") { o.seed = (uint64_t) std::atoll(next("--seed")); o.greedy = false; }
+        else if (a == "--top-k") o.top_k = std::atoi(next("--top-k"));
+        else if (a == "--top-p") o.top_p = (float) std::atof(next("--top-p"));
+        else if (a == "--temperature") o.temperature = (float) std::atof(next("--temperature"));
+        else if (a == "--dump-logits") o.dump_logits = next("--dump-logits");
+        else if (a == "--logits-stride") {
+            if (have_logits_stride) { std::fprintf(stderr, "--logits-stride must be supplied only once\n"); return 2; }
+            if (!strata::program::logits_selection::parse_stride(next("--logits-stride"), o.logits_stride)) {
+                std::fprintf(stderr, "--logits-stride requires a positive decimal int64\n"); return 2;
+            }
+            have_logits_stride = true;
+        }
+        else if (a == "--dump-residual") o.dump_residual = next("--dump-residual");
+        else if (a == "--dump-mixed") o.dump_mixed = next("--dump-mixed");
+        else if (a == "--dump-layers") o.dump_layers = next("--dump-layers");
+        else if (a == "--dump-halves") o.dump_halves = next("--dump-halves");
+        else if (a == "--dump-routing") o.dump_routing = next("--dump-routing");
+        else if (a == "--ple-gguf") o.ple_gguf = next("--ple-gguf");
+        else if (a == "--no-ple") o.no_ple = true;
+        else if (a == "--ple-io") o.ple_io = next("--ple-io");
+        else if (a == "--ple-row-cache") o.ple_row_cache = std::atoll(next("--ple-row-cache"));
+        else if (a == "--ple-inflight") o.ple_inflight = std::atoi(next("--ple-inflight"));
+        else if (a == "--ple-delay-us") o.ple_delay_us = std::atof(next("--ple-delay-us"));
+        else if (a == "--ple-sync-submit") o.ple_sync_submit = true;
+        else if (a == "--kv") o.kv = next("--kv");
+        else if (a == "--kv-resident") o.kv_resident = std::atoll(next("--kv-resident"));
+        else if (a == "--stream-token") o.stream_token = true;
+        else if (a == "--check-logits") o.check_logits = true;
+        else if (a == "--gr-fp32-activations") o.gr_fp32_activations = true;
+        else if (a == "--gr-native-mmvf") o.gr_native_mmvf = true;
+        else if (a == "--native-bf16") o.native_bf16 = true;
+        else if (a == "--native-bf16-extra") o.native_bf16_extra = true;
+        else if (a == "--native-ple-key") o.native_ple_key = true;
+        else if (a == "--native-moe-combine") o.native_moe_combine = true;
+        else if (a == "--native-gdn") o.native_gdn = true;
+        else if (a == "--native-flash-attn-short") o.native_flash_attn_short = true;
+        else if (a == "--native-qsa-indexer") o.native_qsa_indexer = true;
+        else if (a == "--native-qsa") o.native_qsa = true;
+        else if (a == "--native-rope") o.native_rope = true;
+        else if (a == "--native-ple-postops") o.native_ple_postops = true;
+        else if (a == "--native-router") o.native_router = true;
+        else if (a == "--cpu-oracle-q8-0") o.cpu_oracle_q8_0 = true;
+        else if (a == "--native") o.native_preset = next("--native");
+        else if (a == "--native-head-gguf") o.native_head_gguf = next("--native-head-gguf");
+        else if (a == "--native-dense-gguf") o.native_dense_gguf.push_back(next("--native-dense-gguf"));
+        else if (a == "--no-capture") o.no_capture = true;
+        else if (a == "--no-pool") o.no_pool = true;
+        else if (a == "--sync-every-layer") o.sync_every_layer = true;
+        else if (a == "--stage-timing") o.stage_timing = true;
+        else if (a == "--graph-only") o.graph_only = true;
+        else if (a == "--gpu-only-full") o.gpu_only_full = true;
+        else if (a == "--pool-workers") o.pool_workers = std::atoi(next("--pool-workers"));
+        else if (a == "--no-host-worker") o.no_host_worker = true;
+        else if (a == "--no-ple-prefetch") o.no_ple_prefetch = true;
+        else if (a == "--expert-cache") {
+            const std::string v = next("--expert-cache");
+            o.expert_cache = (v == "auto") ? -1 : std::atoi(v.c_str());
+        }
+        else if (a == "--expert-cache-device1") o.expert_cache_remote[0] = std::atoi(next("--expert-cache-device1"));
+        else if (a == "--expert-cache-device2") o.expert_cache_remote[1] = std::atoi(next("--expert-cache-device2"));
+        else if (a == "--expert-cache-device3") o.expert_cache_remote[2] = std::atoi(next("--expert-cache-device3"));
+        else if (a == "--expert-cache-remote-placement")
+            o.expert_cache_remote_placement = next("--expert-cache-remote-placement");
+        else if (a == "--vram-reserve-mib") o.vram_reserve_mib = std::atoi(next("--vram-reserve-mib"));
+        else if (a == "--prefill") {
+            const std::string v = next("--prefill");
+            o.prefill_auto = v == "auto";
+            o.prefill_chunk = o.prefill_auto ? 8192 : std::atoll(v.c_str());
+        }
+        else if (a == "--no-split-rows") o.no_split_rows = true;
+        else if (a == "--no-prefill-borrow") o.no_prefill_borrow = true;
+        else if (a == "--prefill-until") o.prefill_until = std::atoll(next("--prefill-until"));
+        else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
+        else if (a == "--spec") o.spec = std::atoi(next("--spec"));
+        else if (a == "--spec-oracle") o.spec_oracle = next("--spec-oracle");
+        else if (a == "--spec-corrupt") o.spec_corrupt = std::atoi(next("--spec-corrupt"));
+        else if (a == "--mtp") o.mtp = next("--mtp");
+        else if (a == "--mtp-window") o.mtp_window = std::atoll(next("--mtp-window"));
+        else if (a == "--pcie-frac") o.pcie_frac = std::atof(next("--pcie-frac"));
+        else if (a == "--adapt-every") o.adapt_every = std::atoi(next("--adapt-every"));
+        else if (a == "--spec-min-p") o.spec_min_p = std::atof(next("--spec-min-p"));
+        else if (a == "--stop-eos") o.stop_eos = true;
+        else if (a == "--spec-split") o.spec_split = true;
+        else if (a == "--layer-split") o.layer_split = next("--layer-split");
+        else if (a == "--split-device") o.split_device = next("--split-device");
+        else if (a == "--pcie-mode") o.pcie_mode = next("--pcie-mode");
+        else if (a == "--serve") o.serve = true;
+        else if (a == "--vision") o.vision = true;
+        else if (a == "--prompt-cache") o.prompt_cache = std::max(0, std::atoi(next("--prompt-cache")));
+        else if (a == "--prompt-cache-every") o.prompt_cache_every = std::max(0LL, std::atoll(next("--prompt-cache-every")));
+        else if (a == "--prompt-cache-root") o.prompt_cache_root = std::max(0LL, std::atoll(next("--prompt-cache-root")));
+        else if (a == "--turn-token") o.turn_token = std::atoll(next("--turn-token"));
+        else if (a == "--short-read") o.short_read = std::max(0LL, std::atoll(next("--short-read")));
+        else if (a == "--suffix-draft") o.suffix_draft = std::max(0, std::atoi(next("--suffix-draft")));
+        else if (a == "--mtp-max-t") o.mtp_max_t = std::max(0, std::atoi(next("--mtp-max-t")));
+        else if (a == "--control-vector") o.cvec_files.push_back({next("--control-vector"), 1.0f});
+        else if (a == "--control-vector-scaled") {
+            // FILE:SCALE, comma-separated; the LAST colon splits, so a Windows path (C:\...) keeps its drive
+            std::stringstream list(next("--control-vector-scaled"));
+            std::string item;
+            while (std::getline(list, item, ',')) {
+                const size_t colon = item.rfind(':');
+                char* end = nullptr;
+                const float sc = colon == std::string::npos ? 0.0f : std::strtof(item.c_str() + colon + 1, &end);
+                if (colon == std::string::npos || colon == 0 || end == item.c_str() + colon + 1 || *end != '\0') {
+                    std::fprintf(stderr, "--control-vector-scaled: expected FILE:SCALE, got '%s'\n", item.c_str());
+                    return 2;
+                }
+                o.cvec_files.push_back({item.substr(0, colon), sc});
+            }
+        }
+        else if (a == "--control-vector-layer-range") {
+            o.cvec_first = std::atoi(next("--control-vector-layer-range"));
+            o.cvec_last = std::atoi(next("--control-vector-layer-range"));
+        }
+        else if (a == "--cvec-mode") {
+            const std::string m = next("--cvec-mode");
+            if (m == "project") o.cvec_mode = 0;
+            else if (m == "add") o.cvec_mode = 1;
+            else { std::fprintf(stderr, "--cvec-mode: add or project, got '%s'\n", m.c_str()); return 2; }
+        }
+        else if (a == "--cvec-dir") {
+            const std::string d = next("--cvec-dir");
+            if (d == "per-layer") o.cvec_single = -1;
+            else if (d.rfind("single:", 0) == 0) o.cvec_single = std::atoi(d.c_str() + 7);
+            else { std::fprintf(stderr, "--cvec-dir: per-layer or single:L, got '%s'\n", d.c_str()); return 2; }
+        }
+        else if (a == "--no-spec-split") o.spec_split = false;
+        else if (a == "--eos-ids") {
+            std::string e;
+            if (!parse_i64_list(next("--eos-ids"), o.eos_ids, e)) { std::fprintf(stderr, "--eos-ids: %s\n", e.c_str()); return 2; }
+            o.stop_eos = true;
+        }
+        else if (a == "--adapt-swaps") o.adapt_swaps = std::atoi(next("--adapt-swaps"));
+        else if (a == "--expert-cache-cpu-order") o.expert_cache_cpu_order = true;
+        else if (a == "--expert-cache-per-layer") o.expert_cache_per_layer = true;
+        else if (a == "--no-hit-poke") o.no_hit_poke = true;
+        else if (a == "--expert-profile") o.expert_profile = next("--expert-profile");
+        else if (a == "--gpu-stages") o.gpu_stages = true;
+        else if (a == "--mmap-experts") o.mmap_experts = true;
+        else if (a == "--stats") o.stats = true;
+        else if (a == "--shared-late") o.shared_late = true;
+        else if (a == "--keep-canonical") o.keep_canonical = true;
+        else if (a == "--no-token-graph") o.no_token_graph = true;
+        else if (a == "--no-fused-gr") o.no_fused_gr = true;
+        else if (a == "--no-fast-attn") o.no_fast_attn = true;
+        else if (a == "--no-publish-kernel") o.no_publish_kernel = true;
+        else if (a == "--no-fused-gdn") o.no_fused_gdn = true;
+        else if (a == "--no-fast-select") o.no_fast_select = true;
+        else {
+            // An unknown flag is an ERROR and not a warning: a typo'd `--max-neww` that silently generated 16
+            // tokens would look like a working run.
+            std::fprintf(stderr, "unknown argument: %s\n", a.c_str());
+            usage();
+            return 2;
+        }
+    }
+    // Layer split (multi-GPU): the later stages run layers [K_i, K_i+1) on their own GPUs (--split-device, default
+    // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  Across
+    // GPUs, not yet: KV streaming, images, control vectors, the helper caches (--expert-cache-remote), and lending
+    // cache slots to the prompt path (each stage's prompt path has its own buffers).
+    const bool pcie_given = o.pcie_frac >= 0.0;
+    std::vector<int64_t> split_at;
+    std::vector<int> split_devs;
+    bool split_auto = false, split_same = false;
+    if (!o.layer_split.empty()) {
+        int n_dev = 1;
+        if (DPCT_CHECK_ERROR(n_dev = dpct::device_count()) != 0 || n_dev < 1)
+            n_dev = 1;
+        /*
+        DPCT1026:672: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        auto ints = [](const std::string &str, auto &out) -> bool {
+            using V = typename std::decay_t<decltype(out)>::value_type;
+            size_t a = 0;
+            while (a < str.size()) {
+                size_t b = str.find(',', a);
+                if (b == std::string::npos) b = str.size();
+                const std::string t = str.substr(a, b - a);
+                if (t.empty() || t.find_first_not_of("0123456789") != std::string::npos) return false;
+                out.push_back((V) std::atoll(t.c_str()));
+                a = b + 1;
+            }
+            return !out.empty();
+        };
+        split_auto = o.layer_split == "auto";
+        bool ok = o.serve && (split_auto || ints(o.layer_split, split_at));
+        if (ok && !o.split_device.empty()) ok = ints(o.split_device, split_devs);
+        else if (ok)
+            for (int d = 1; d < n_dev && (split_auto || split_devs.size() < split_at.size()); ++d) split_devs.push_back(d);
+        if (ok && !split_auto && split_devs.empty() && split_at.size() == 1) split_devs.push_back(0);   // one GPU
+        split_same = ok && split_devs.size() == 1 && split_devs[0] == 0 && !split_auto;
+        if (ok && split_auto && split_devs.empty()) {
+            std::fprintf(stderr, "strata generate: --layer-split auto: one GPU visible, so no split\n");
+            o.layer_split.clear();
+            split_auto = false;
+        } else if (ok) {
+            ok = (split_auto || split_at.size() == split_devs.size()) && split_devs.size() < (size_t) SplitDrive::kMax;
+            for (size_t i = 0; ok && i < split_at.size(); ++i) ok = split_at[i] >= 2 && (i == 0 || split_at[i] > split_at[i - 1]);
+            for (size_t i = 0; ok && !split_same && i < split_devs.size(); ++i) {
+                ok = split_devs[i] > 0 && split_devs[i] < n_dev;
+                for (size_t j = 0; ok && j < i; ++j) ok = split_devs[i] != split_devs[j];
+            }
+        }
+        if (!ok) {
+            std::fprintf(stderr, "strata generate: --layer-split K[,K2..]|auto needs --serve, rising K from 2, and one "
+                                 "distinct GPU per K in --split-device (1..%d; or 0 with one K: the same GPU)\n", n_dev - 1);
+            return 2;
+        }
+    }
+    const bool multi_gpu = !split_devs.empty() && !split_same;
+    // the helper-GPU expert caches (--expert-cache-remote, docs/SECOND_GPU.md): CUDA1..3 on one GPU; with a layer
+    // split, the visible GPUs no stage runs on, in order
+    int remote_dev[3] = {1, 2, 3};
+    if (multi_gpu) {
+        if (o.expert_profile.empty()) {
+            std::fprintf(stderr, "strata generate: a layer split across GPUs needs --expert-profile\n");
+            return 2;
+        }
+        o.no_prefill_borrow = true;   // each stage's prompt path has its own buffers
+        int n_vis = 1;
+        if (DPCT_CHECK_ERROR(n_vis = dpct::device_count()) != 0 || n_vis < 1)
+            n_vis = 1;
+        /*
+        DPCT1026:673: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        int next_free = 1;
+        for (int r = 0; r < 3; ++r) {
+            if (o.expert_cache_remote[(size_t) r] <= 0) continue;
+            while (next_free < n_vis &&
+                   std::find(split_devs.begin(), split_devs.end(), next_free) != split_devs.end()) ++next_free;
+            if (next_free >= n_vis) {
+                std::fprintf(stderr, "strata generate: --expert-cache-remote with a layer split needs a GPU that runs no "
+                                     "stage (%d visible, %zu used by the split)\n", n_vis, split_devs.size() + 1);
+                return 2;
+            }
+            remote_dev[r] = next_free++;
+        }
+        std::string devs;
+        for (const int d : split_devs) devs += (devs.empty() ? "" : ",") + std::to_string(d);
+        std::fprintf(stderr, "strata generate: layer split across %zu GPUs: CUDA0, then CUDA%s (split %s)\n",
+                     split_devs.size() + 1, devs.c_str(), o.layer_split.c_str());
+    }
+    if (o.prefill_auto && (o.no_prefill_borrow || o.expert_profile.empty())) {
+        o.prefill_auto = false;       // nothing to lend from: the buffers are reserved for the session, so keep them small
+        o.prefill_chunk = 2048;
+    }
+    if (!have_tokens && o.serve) {   // plan v0.3 P8: requests bring their own tokens
+        o.tokens = {248045};
+        o.max_new = 1;
+        have_tokens = true;
+        o.stop_eos = true;
+    }
+    if (!have_tokens) {
+        std::fprintf(stderr, "strata generate: --tokens is required (this build has no tokenizer; see the "
+                             "header of src/program/generate.cpp)\n");
+        usage();
+        return 2;
+    }
+
+    if ((o.ple_io != "direct" && o.ple_io != "mmap") || o.ple_row_cache < 0 || o.ple_inflight < 1 ||
+        o.ple_inflight > 1024 || !(o.ple_delay_us >= 0)) {
+        std::fprintf(stderr, "strata generate: invalid --ple-io/--ple-row-cache/--ple-inflight/--ple-delay-us\n");
+        return 2;
+    }
+    if (o.kv == "q4") o.kv = "q4_0";
+    if (o.kv != "fp16" && o.kv != "int8" && o.kv != "q4_0") {
+        std::fprintf(stderr, "strata generate: --kv must be fp16, int8 or q4_0\n");
+        return 2;
+    }
+    strata::core::qsa_set_kv_int8(o.kv == "int8");
+    strata::core::qsa_set_kv_q4(o.kv == "q4_0");   // PR #21: 4-bit codes after a Hadamard rotation (kv_q4.hpp)
+    if (o.kv_resident < 0) {
+        std::fprintf(stderr, "strata generate: --kv-resident must be >= 0\n");
+        return 2;
+    }
+    strata::core::qsa_set_kv_resident(o.kv_resident);
+    // Prompt lookup (the suffix drafter, on by default): the MTP keeps its --spec windows and a lookup window may be
+    // up to 2 tokens longer; the draft policy (strata/spec/draft_policy.hpp) takes one only where it pays. Code
+    // edits +6-11%, ordinary text unchanged (bench/results/2026-09-27-spec). --suffix-draft 0 turns it off.
+    if (o.suffix_draft > 0 && o.spec >= 2 && o.mtp_max_t == 0) {
+        o.mtp_max_t = o.spec;
+        o.spec = std::min(o.spec + 2, 8);   // kVerifyMaxT
+    }
+    strata::core::layer_set_shared_early(!o.shared_late);
+    if (!o.native_preset.empty()) {
+        if (o.no_ple || o.ple_gguf.empty()) {
+            std::fprintf(stderr, "strata generate: --native requires --ple-gguf (the PLE key is native too)\n");
+            return 2;
+        }
+        o.stream_token = true;
+        o.gr_native_mmvf = true;
+        o.native_bf16 = o.native_bf16_extra = true;
+        o.native_ple_key = o.native_moe_combine = o.native_gdn = o.native_router = true;
+        o.native_qsa = o.native_qsa_indexer = o.native_rope = o.native_ple_postops = true;
+        if (o.native_head_gguf.empty()) o.native_head_gguf = o.native_preset;
+        if (o.native_dense_gguf.empty()) {
+            // every shard of the model (<name>-0000N-of-0000M.gguf beside --native), then the PLE shard: a split
+            // may put any layer in any shard (Swift's GGUFs: layers 13-47 in shard 2, the PLE table in shard 1)
+            o.native_dense_gguf = model_shards(o.native_preset);
+            if (std::find(o.native_dense_gguf.begin(), o.native_dense_gguf.end(), o.ple_gguf) == o.native_dense_gguf.end())
+                o.native_dense_gguf.push_back(o.ple_gguf);
+        }
+        // Plan v0.3 (24 Sep): the CPU experts stay on the VNNI kernel.  The llama.cpp-CPU-exact q8_0 contract
+        // cost 27.0 vs 17.2 ms/token of pool time and G-C does not need it; `--cpu-oracle-q8-0` still selects it.
+    }
+    if (o.logits_stride > 1 && (o.max_new != 1 || o.dump_logits.empty())) {
+        std::fprintf(stderr, "strata generate: --logits-stride > 1 requires --max-new 1 and --dump-logits\n");
+        return 2;
+    }
+    if (o.no_ple && !o.ple_gguf.empty()) {
+        std::fprintf(stderr, "strata generate: --no-ple and --ple-gguf are mutually exclusive\n");
+        return 2;
+    }
+    if (o.native_ple_postops && o.no_ple) {
+        std::fprintf(stderr, "strata generate: --native-ple-postops requires PLE enabled\n");
+        return 2;
+    }
+    if (!o.no_ple && o.ple_gguf.empty()) {
+        std::fprintf(stderr, "strata generate: --ple-gguf is required; --no-ple explicitly enables a diagnostic ablation\n");
+        return 2;
+    }
+    // P7 audit: positions, cells and pooled-block indices are cast to int32 on the device path.
+    if (o.max_context > 2147483647LL - 8) {
+        std::fprintf(stderr, "strata generate: --max-context must be below 2^31\n");
+        return 2;
+    }
+    if (o.max_new <= 0 || o.max_context <= 0 || o.max_new > o.max_context ||
+        o.tokens.size() > (size_t) (o.max_context - o.max_new)) {
+        std::fprintf(stderr, "strata generate: positive --max-new and --max-context must fit the prompt and generation\n");
+        return 2;
+    }
+    if (!std::isfinite(o.temperature) || o.temperature < 0 || !std::isfinite(o.top_p) ||
+        o.top_p <= 0 || o.top_p > 1 || o.top_k < 0 || o.expert_cache < -1 ||
+        o.pool_workers < 0 || std::any_of(o.expert_cache_remote.begin(), o.expert_cache_remote.end(),
+                                           [](int slots) { return slots < 0; }) ||
+        (o.expert_cache_remote[1] > 0 && o.expert_cache_remote[0] == 0) ||
+        (o.expert_cache_remote[2] > 0 && o.expert_cache_remote[1] == 0)) {
+        std::fprintf(stderr, "strata generate: invalid sampling or resource parameter\n");
+        return 2;
+    }
+    if (o.expert_cache_remote_placement != "stripe" && o.expert_cache_remote_placement != "layer") {
+        std::fprintf(stderr, "strata generate: --expert-cache-remote-placement must be stripe or layer\n");
+        return 2;
+    }
+
+    if (o.native_flash_attn_short && o.max_context > 256) {
+        std::fprintf(stderr, "strata generate: --native-flash-attn-short requires --max-context <=256\n");
+        return 2;
+    }
+    if (o.native_flash_attn_short && (o.gpu_only_full || o.graph_only || o.gpu_stages)) {
+        std::fprintf(stderr, "strata generate: --native-flash-attn-short requires the normal decode loop for status validation\n");
+        return 2;
+    }
+    if (o.native_ple_key && (o.native_dense_gguf.empty() || o.no_ple)) {
+        std::fprintf(stderr, "strata generate: --native-ple-key requires PLE and --native-dense-gguf\n");
+        return 2;
+    }
+    if (o.cpu_oracle_q8_0 && (o.expert_cache != 0 || !o.expert_profile.empty())) {
+        std::fprintf(stderr, "strata generate: --cpu-oracle-q8-0 cannot be combined with --expert-cache or --expert-profile until the GPU expert contract matches\n");
+        return 2;
+    }
+
+    // **BEFORE ANYTHING ELSE.**  The CPU expert kernel is AVX-512 (VNNI + VBMI) and its translation unit is
+    // compiled `/arch:AVX512`, so on a CPU without those features it does not fail - it executes an illegal
+    // instruction at some unpredictable token.  Refusing at second zero is the whole point of P2.S3's check.
+    strata::kernels::cpu::expert_set_oracle_q8_0(o.cpu_oracle_q8_0);
+
+    std::string err;
+    if (!o.native_head_gguf.empty() && !o.stream_token) {
+        std::fprintf(stderr, "--native-head-gguf requires --stream-token\n");
+        return 2;
+    }
+    // Plan v0.3 P6: where the experts live.  A native pack (tools/iq_pack.py: the IQ2_XS / IQ3_XXS files) keeps
+    // every quantized tensor in its GGUF form, so it needs --native (the dense projections, head and embedding
+    // come from the model file) and runs its experts in verify windows only (--spec).
+    {
+        const strata::core::ModelGeometry g0;
+        if (!strata::kernels::cpu::expert_layout_load(o.pack, g0.n_layers, g0.n_expert, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+    }
+    const bool native_pack = strata::kernels::cpu::expert_layout().native;
+    if (o.expert_cache_remote[0] > 0) {
+        // Keep CUDA1's proven startup order: initialise its context before
+        // allocating GPU0 weights or mapping the large host expert arena.
+        double free_gib = 0;
+        if (!strata::core::RemoteExperts::preflight(remote_dev[0], free_gib, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: CUDA%d context ready, %.2f GiB free before expert arena registration\n",
+                     remote_dev[0], free_gib);
+    }
+    // plan v0.3 P6: the PCIe share of the missed experts, measured per kind of pack (the paper, finding on PCIe).
+    // PR #44: a x8 link carries half of what the native default assumes - the GPU's SMs read that share over the
+    // link (the copy kernel, since 0.1.14), so on a slower link it must shrink or the window waits for it.  The
+    // real H2D bandwidth is probed once; from 20 GB/s up (x16 PCIe 4/5) the measured default stays.  The canonical
+    // pack's 0.2 was never measured against the link, so it is left alone.  `--calibrate` measures it outright.
+    if (o.pcie_frac < 0.0) {
+        const double base = native_pack ? 0.55 : 0.2;
+        const double bw = native_pack ? probe_pcie_h2d_gbps() : -1.0;
+        if (!native_pack) {
+            o.pcie_frac = base;
+        } else if (bw > 0.0) {
+            // below ~4 GB/s (an x1 link: ~0.9 GB/s) a missed expert's 1.4 MB takes longer to cross than the CPU
+            // pool takes to compute it, so none of them go over the link
+            o.pcie_frac = bw >= 20.0 ? base : bw < 4.0 ? 0.0 : std::min(base, std::max(0.05, base * (bw / 26.0)));
+            std::fprintf(stderr, "strata generate: PCIe probe: %.1f GB/s host->device -> pcie_frac %.2f (default %.2f)\n",
+                         bw, o.pcie_frac, base);
+        } else {
+            o.pcie_frac = base;
+            std::fprintf(stderr, "strata generate: PCIe probe failed -> pcie_frac default %.2f\n", base);
+        }
+    }
+    // the canonical Q2_0 pack's CPU kernels are AVX-512 only; a native pack runs on AVX2 CPUs as well
+    if (!native_pack) strata::kernels::cpu::cpu_require_expert_support();
+    else if (!strata::kernels::cpu::cpu_avx512_ok())
+        std::fprintf(stderr, "strata generate: this CPU has no AVX-512: the expert kernels run on %s "
+                             "(multi-token for the i-quant gate/up rows)\n",
+                     std::getenv("STRATA_NO_IQ256") == nullptr ? "AVX-2" : "ggml-cpu vec_dot (STRATA_NO_IQ256 set)");
+    strata::core::NativeEmbed native_embed;
+    if (native_pack) {
+        if (o.native_preset.empty() || o.spec < 2 || o.keep_canonical ||
+            (o.prefill_chunk <= 0 && o.tokens.size() > 1)) {
+            std::fprintf(stderr, "strata generate: %s is a native (IQ) pack: it needs --native SHARD1, --spec T (T >= 2) "
+                                 "and --prefill CHUNK\n", o.pack.c_str());
+            return 2;
+        }
+        const strata::core::ModelGeometry g0;
+        if (!native_embed.load(o.native_preset, g0.n_embd, 248320, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        strata::core::set_native_embed(&native_embed);
+        std::fprintf(stderr, "strata generate: native pack: %s experts (largest blob %.2f MB), token embedding "
+                             "type %d in mapped host memory (%.0f MiB)\n",
+                     o.pack.c_str(), (double) strata::kernels::cpu::expert_layout().max_blob / 1e6,
+                     native_embed.type(), (double) native_embed.bytes() / 1048576.0);
+    }
+    // Plan v0.3 P1: tensors served in native form are not also loaded in canonical form (~2.7 GB of VRAM back
+    // to the expert cache with --native).  `--keep-canonical` loads both, as before.
+    std::set<std::string> skip;
+    if (!o.keep_canonical) {
+        if (!o.native_dense_gguf.empty() &&
+            !strata::core::NativeDense::served_names(o.native_dense_gguf, o.native_ple_key, skip, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        if (!o.native_head_gguf.empty()) skip.insert("output.weight");
+        // the PLE module validates its canonical key at construction (8 MB); a native pack has none to load
+        if (!native_pack) skip.erase("blk.1.ple_key.weight");
+        if (native_pack) skip.insert("token_embd.weight");
+    }
+    uint64_t pool_bytes = 0;
+    if (!strata::core::WeightTable::pool_bytes(o.pack, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+        std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+        return 1;
+    }
+    void* arena = nullptr;
+    if (DPCT_CHECK_ERROR(arena = (void *)sycl::malloc_device(
+                             pool_bytes, dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "strata generate: cudaMalloc(%llu) for the weight arena failed\n",
+                     (unsigned long long) pool_bytes);
+        return 1;
+    }
+    strata::core::WeightTable wt;
+    if (!wt.load(o.pack, arena, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+        std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+        return 1;
+    }
+    std::fprintf(stderr, "strata generate: %llu MiB of weights loaded from %s (%zu canonical tensors skipped: "
+                         "served natively)\n",
+                 (unsigned long long) (pool_bytes >> 20), o.pack.c_str(), skip.size());
+
+    strata::core::NativeDense native_dense;
+    if (!o.native_dense_gguf.empty()) {
+        if (!native_dense.load(o.native_dense_gguf, wt, err, o.native_ple_key)) {
+            std::fprintf(stderr, "strata generate: native dense projections: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: %zu native projection matrices, %.2f MiB of weights\n",
+                     native_dense.tensor_count(), (double) native_dense.weight_bytes() / (1024.0 * 1024.0));
+    }
+
+    strata::kernels::gr_set_fp32_activations(o.gr_fp32_activations);
+    strata::kernels::gr_set_native_mmvf(o.gr_native_mmvf);
+    // Plan v0.3 P3: the fused hyper-connection read rides the native (FP32-activation) contract; the per-stage
+    // and dump measurements need the unfused layout of R, so they keep the old kernels.
+    strata::core::layer_set_fast_attn(!o.no_fast_attn);
+    strata::core::layer_set_publish_kernel(!o.no_publish_kernel);
+    strata::core::layer_set_fused_gdn(!o.no_fused_gdn);
+    strata::core::layer_set_fast_select(!o.no_fast_select);
+    strata::core::layer_set_fused_gr(o.gr_native_mmvf && !o.no_fused_gr && !o.gpu_stages && o.dump_layers.empty() &&
+                                     o.dump_halves.empty() && !o.stage_timing);
+    strata::core::layer_set_native_bf16(o.native_bf16);
+    strata::core::layer_set_native_flash_attn_short(o.native_flash_attn_short);
+    strata::kernels::ple_set_native_bf16(o.native_bf16_extra);
+    strata::kernels::shared_expert_set_native_bf16(o.native_bf16_extra);
+    strata::kernels::native_moe_combine_set_enabled(o.native_moe_combine);
+    strata::kernels::native_gdn_set_enabled(o.native_gdn);
+    strata::kernels::native_router_set_enabled(o.native_router);
+    strata::kernels::native_qsa_set_enabled(o.native_qsa);
+    strata::kernels::native_qsa_indexer_set_enabled(o.native_qsa_indexer);
+    strata::kernels::native_rope_set_enabled(o.native_rope);
+    // The vision path: every rope kernel reads a cell's (t, h, w) from this table (strata/kernels/mrope.hpp).  It is
+    // the identity until an image request, and it is set here, before any CUDA graph captures a rope kernel.
+    int32_t* d_mrope = nullptr;
+    std::vector<int32_t> mrope_host;
+    if (o.vision) {
+        const int64_t cells = o.max_context + 64;
+        mrope_host.resize((size_t) cells * 3);
+        for (int64_t c = 0; c < cells; ++c)
+            mrope_host[(size_t) c * 3] = mrope_host[(size_t) c * 3 + 1] = mrope_host[(size_t) c * 3 + 2] = (int32_t) c;
+        if (DPCT_CHECK_ERROR(
+                d_mrope = sycl::malloc_device<int32_t>(
+                    mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
+            /*
+            DPCT1114:674: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                d_mrope, mrope_host.data(),
+                mrope_host.size() * sizeof(int32_t))) != 0) {
+            std::fprintf(stderr, "strata generate: cannot allocate the image position table\n");
+            return 1;
+        }
+        strata::kernels::mrope_table_set(d_mrope);
+    }
+    strata::kernels::ple_set_native_postops(o.native_ple_postops);
+    strata::core::ModelGeometry g;   // canonical defaults; the model file overrides the MoE shape below
+    int64_t K = 10;
+    if (!o.native_preset.empty()) {
+        // a pruned variant (GSQ-RCO Coder) ships fewer experts than the canonical 512x10; the model file
+        // is the authority on its own MoE shape - everything else in the geometry is unchanged
+        try {
+            strata::GgufFile model_gguf(o.native_preset);
+            if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_count")) g.n_expert = (int64_t) v->u;
+            if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_used_count")) K = (int64_t) v->u;
+        } catch (const std::exception& e) {
+            std::fprintf(stderr, "strata generate: reading the model's expert shape from %s: %s\n",
+                         o.native_preset.c_str(), e.what());
+            return 1;
+        }
+    }
+    // before session_init: every graph captured from here on has the vector's kernels where it applies
+    std::string cvec_summary = "0";
+    if (!o.cvec_files.empty()) {
+        std::string ce;
+        if (!load_control_vectors(o, g, cvec_summary, ce)) {
+            std::fprintf(stderr, "strata generate: control vector: %s\n", ce.c_str());
+            return 2;
+        }
+    }
+    if (o.max_context < (int64_t) o.tokens.size() + o.max_new) {
+        std::fprintf(stderr, "strata generate: --max-context %lld cannot hold %zu prompt + %lld new tokens\n",
+                     (long long) o.max_context, o.tokens.size(), (long long) o.max_new);
+        return 2;
+    }
+
+    void* sbuf = nullptr;
+    if (DPCT_CHECK_ERROR(sbuf = (void *)sycl::malloc_device(
+                             strata::core::session_bytes(g, o.max_context, K),
+                             dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "strata generate: session state allocation failed\n");
+        return 1;
+    }
+    strata::core::SessionState ss;
+    // **THE ENGINE RAN ON THE LEGACY DEFAULT STREAM, WHICH ON WDDM IS THE SLOW PATH.**  All four session
+    // calls - `session_capture`, `session_replay`, `session_token` and `session_loop` - were handed `nullptr`,
+    // i.e. stream 0.  `bench/micro/kernel_costs.cu` measures what that costs: EVERY kernel it launches through
+    // a wrapper comes back at 28-31 us REGARDLESS OF SIZE, `scale_inplace` on 2,048 floats and `silu_inplace`
+    // on 10,240 floats being indistinguishable, which is a fixed per-launch cost and not execution.
+    // `bench/micro/graph_node_cost.cu` measures the same kernels on a real stream at 3.63 us ungrapped and
+    // 0.805 us inside a graph.  **That is an ~8x penalty on every launch in the engine.**
+    dpct::queue_ptr main_stream = &dpct::get_in_order_queue();
+    /*
+    DPCT1025:675: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    if (DPCT_CHECK_ERROR(
+            main_stream = dpct::get_current_device().create_queue(true)) != 0) {
+        std::fprintf(stderr, "strata generate: cannot create the main stream\n");
+        return 1;
+    }
+    void* const main_cs = (void*) main_stream;
+    if (strata::core::session_init(g, o.max_context, K, sbuf, ss) == 0) {
+        std::fprintf(stderr, "strata generate: session_init failed\n");
+        return 1;
+    }
+    if (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1)
+        std::fprintf(stderr, "strata generate: KV streaming: %lld of %lld cells per QSA layer in VRAM, the K/V in "
+                             "%.2f GiB of pinned RAM\n", (long long) (ss.qsa_states[0].n_slots * 4),
+                     (long long) o.max_context, (double) strata::core::qsa_kv_host_bytes() / 1073741824.0);
+
+    // ---- **THE HALF-LEVEL DUMP HAS TO BE ARMED BEFORE `session_capture`, AND THE LADDER MUST NOT BE.**  The
+    // half copies are issued from inside `block_layer_pre`/`block_layer_post`, so they are only ever enqueued
+    // while a graph is being CAPTURED - arming `ss.block.dump` afterwards would produce a file of zeros that
+    // reads exactly like a wrong answer.  The ladder is the opposite: `session_loop` enqueues it per token on
+    // the replay stream, so it must be armed after capture to stay out of the graph.
+    const uint64_t half_stride = (uint64_t) 2 * g.n_embd + (uint64_t) 2 * g.hc +
+                                 (uint64_t) g.n_head * g.head_dim +
+                                 (uint64_t) 5 * g.n_head_kv * g.head_dim + 8;
+    std::FILE* half_dump = nullptr;
+    float* half_stage = nullptr;
+    if (!o.dump_halves.empty()) {
+        half_dump = std::fopen(o.dump_halves.c_str(), "wb");
+        if (half_dump == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_halves.c_str());
+            return 1;
+        }
+        const size_t n = (size_t) g.n_layers * (size_t) half_stride;
+        /*
+        DPCT1048:2: The original value cudaHostAllocDefault is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        if (DPCT_CHECK_ERROR(half_stage = sycl::malloc_host<float>(
+                                 n, dpct::get_in_order_queue())) != 0) {
+            std::fprintf(stderr, "strata generate: cannot pin the half-dump staging buffer\n");
+            return 1;
+        }
+        ss.block.dump = half_stage;
+    }
+
+    strata::core::Doorbell db;
+    if (strata::core::doorbell_init(g, K, db) == 0) {
+        std::fprintf(stderr, "strata generate: doorbell_init failed\n");
+        return 1;
+    }
+    ss.db = &db;
+
+    // ================================ THE PLE ================================
+    //
+    // **ITS ABSENCE IS WHY GATE C1 FAILED** (LEDGER L123): layer 1 carries six `blk.1.ple_*` tensors, the whole
+    // module was built and parity-tested, and nothing called it.  Everything below is construction - the table
+    // is a mapping of the ORIGINAL second GGUF shard, the six weights are already loaded in the arena, and the
+    // three buffers are the only allocation.
+    strata::kernels::PleTable ple_table;
+    std::vector<float> ple_emb_host((size_t) strata::kernels::NG_N_EMBD);
+    float* ple_emb_dev = nullptr;
+    float* ple_scratch = nullptr;
+    if (!o.ple_gguf.empty()) {
+        strata::kernels::PleIoOptions pio;
+        pio.mode = o.ple_io == "mmap" ? strata::kernels::PleIo::Mmap : strata::kernels::PleIo::Direct;
+        pio.max_inflight = (uint32_t) o.ple_inflight;
+        pio.cache_rows = (uint64_t) o.ple_row_cache;
+        pio.io_thread = !o.ple_sync_submit;
+        if (!ple_table.open(o.ple_gguf, err, pio)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        const strata::core::WeightRef* wk = wt.find("blk.1.ple_key.weight");
+        const strata::core::WeightRef* wv = wt.find("blk.1.ple_value.weight");
+        const strata::core::WeightRef* wnk = wt.find("blk.1.ple_norm_key.weight");
+        const strata::core::WeightRef* wnq = wt.find("blk.1.ple_norm_query.weight");
+        const strata::core::WeightRef* wnc = wt.find("blk.1.ple_norm_conv.weight");
+        const strata::core::WeightRef* wc = wt.find("blk.1.ple_conv1d.weight");
+        if (!wk || !wv || !wnk || !wnq || !wnc || !wc) {
+            std::fprintf(stderr, "strata generate: the pack has no blk.1.ple_* tensors, so the PLE cannot be "
+                                 "wired - and running without it is a DIFFERENT MODEL (LEDGER L123)\n");
+            return 1;
+        }
+        // `ple_key` is S2 and the loader has already widened its scales to f32, so the two planes are located
+        // by the sizes the `WeightRef` records rather than re-derived - the same rule `plane_ptrs` follows.
+        if (!wk->quantized()) {
+            // plan v0.3 P6: the IQ model files' BF16 key (the pack's extra.bin, raw BF16)
+            ss.ple.w.key_bf16 = (const uint16_t*) wk->data;
+        } else if (wk->data != nullptr) {
+            ss.ple.w.key_codes = (const uint8_t*) wk->data;
+            ss.ple.w.key_scales = (const float*) ((const uint8_t*) wk->data + wk->codes_bytes);
+        }
+        if (o.native_ple_key && wk->quantized()) {
+            if (!wk->native_data || wk->native_type != 42 || !wk->native_q8_1) {
+                std::fprintf(stderr, "strata generate: native PLE key is absent or incompatible\n");
+                return 1;
+            }
+            ss.ple.w.key_native_data = wk->native_data;
+            ss.ple.w.key_native_type = wk->native_type;
+            ss.ple.w.key_native_q8_1 = wk->native_q8_1;
+        }
+        ss.ple.w.value_bf16 = (const uint16_t*) wv->data;
+        ss.ple.w.norm_key = (const float*) wnk->data;
+        ss.ple.w.norm_query = (const float*) wnq->data;
+        ss.ple.w.norm_conv = (const float*) wnc->data;
+        ss.ple.w.conv1d_f16 = (const uint16_t*) wc->data;
+        ss.ple.consts = strata::kernels::ple_artifact_consts();
+        if (o.ple_delay_us > 0) ple_table.set_injected_delay_us(o.ple_delay_us);
+        ss.ple.table = &ple_table;
+        ss.ple.token = &ss.ple_token;
+        ss.ple.prev = ss.ple_prev;
+        ss.ple.hist = ss.ple_hist;
+        ss.ple.emb_host = ple_emb_host.data();
+        if (DPCT_CHECK_ERROR(ple_emb_dev = (float *)sycl::malloc_device(
+                                 (size_t)strata::kernels::NG_N_EMBD * 4,
+                                 dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(ple_scratch = (float *)sycl::malloc_device(
+                                 strata::core::ple_run_scratch_bytes(),
+                                 dpct::get_in_order_queue())) != 0) {
+            std::fprintf(stderr, "strata generate: the PLE buffers failed\n");
+            return 1;
+        }
+        ss.ple.emb_dev = ple_emb_dev;
+        ss.ple.scratch = ple_scratch;
+        if (!ss.ple.ready()) {
+            std::fprintf(stderr, "strata generate: the PLE run is not ready after construction\n");
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: PLE on, table %llu rows of %s\n",
+                     (unsigned long long) ple_table.rows(), o.ple_gguf.c_str());
+    } else {
+        std::fprintf(stderr,
+                     "strata generate: PLE OFF by explicit --no-ple diagnostic request.\n"
+                     "  The tokens below are NOT this model's; this is only useful for A/B measurement.\n");
+    }
+
+    float* d_parts = nullptr;
+    if (DPCT_CHECK_ERROR(
+            d_parts = (float *)sycl::malloc_device(
+                (size_t)K * g.n_embd * 4, dpct::get_in_order_queue())) != 0 ||
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                             .memset(d_parts, 0, (size_t)K * g.n_embd * 4)
+                             .wait()) != 0) {
+        std::fprintf(stderr, "strata generate: the parts buffer failed\n");
+        return 1;
+    }
+
+    // ---- layer split across GPUs: each later stage's own copy of the dense weights, its session and (the last) the
+    // head, made on its device before the host arena is mapped (as the drafter below, for the same WDDM reason)
+    std::vector<std::unique_ptr<GpuStage>> stages;
+    for (size_t i = 0; multi_gpu && i < split_devs.size(); ++i) {
+        stages.push_back(std::make_unique<GpuStage>());
+        GpuStage& st = *stages.back();
+        st.dev = split_devs[i];
+        const bool last = i + 1 == split_devs.size();
+        double free_gib = 0;
+        if (!strata::core::RemoteExperts::preflight(st.dev, free_gib, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        const strata::core::OnDevice on(st.dev);
+        void* arena_s = nullptr;
+        if (DPCT_CHECK_ERROR(arena_s = (void *)sycl::malloc_device(
+                                 pool_bytes, dpct::get_in_order_queue())) !=
+                0 ||
+            !st.wt.load(o.pack, arena_s, pool_bytes, err,
+                        skip.empty() ? nullptr : &skip)) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s\n", st.dev,
+                         err.empty() ? "the weight arena does not fit" : err.c_str());
+            return 1;
+        }
+        if (!o.native_dense_gguf.empty() && !st.dense.load(o.native_dense_gguf, st.wt, err, o.native_ple_key)) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d native dense projections: %s\n", st.dev,
+                         err.c_str());
+            return 1;
+        }
+        void* sbuf_s = nullptr;
+        if (DPCT_CHECK_ERROR(
+                sbuf_s = (void *)sycl::malloc_device(
+                    strata::core::session_bytes(g, o.max_context, K),
+                    dpct::get_in_order_queue())) != 0 ||
+            strata::core::session_init(g, o.max_context, K, sbuf_s, st.ss) ==
+                0 ||
+            /*
+            DPCT1025:677: The SYCL queue is created ignoring the flag and
+            priority options.
+            */
+            DPCT_CHECK_ERROR(
+                st.stream = dpct::get_current_device().create_queue(true)) !=
+                0 ||
+            /*
+            DPCT1025:678: The SYCL queue is created ignoring the flag and
+            priority options.
+            */
+            DPCT_CHECK_ERROR(
+                st.adapt_stream =
+                    dpct::get_current_device().create_queue(true)) != 0 ||
+            DPCT_CHECK_ERROR(st.adapt_ev = new sycl::event()) != 0) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: the session state failed\n", st.dev);
+            return 1;
+        }
+        const strata::core::WeightRef* wo_s = st.wt.find("output.weight");
+        if (wo_s == nullptr ||
+            (last && !o.native_head_gguf.empty() && !st.head.load(o.native_head_gguf, g.n_embd, wo_s->ne1, err))) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s\n", st.dev,
+                         wo_s == nullptr ? "output.weight is missing" : err.c_str());
+            return 1;
+        }
+        // a control vector (the speed projection): its tables on this device too - the stage's layers apply it here
+        if (!strata::kernels::cvec_replicate(err)) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: %s\n", st.dev, err.c_str());
+            return 1;
+        }
+        // --vision: this device's image-position table (the identity until a picture request), read by every rope
+        // kernel its stage runs - set before any of its graphs is captured
+        if (o.vision) {
+            if (DPCT_CHECK_ERROR(
+                    st.mrope = sycl::malloc_device<int32_t>(
+                        mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
+                /*
+                DPCT1114:679: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                    st.mrope, mrope_host.data(),
+                    mrope_host.size() * sizeof(int32_t))) != 0) {
+                std::fprintf(stderr, "strata generate: layer split, CUDA%d: the image position table failed\n", st.dev);
+                return 1;
+            }
+            strata::kernels::mrope_table_set(st.mrope);
+        }
+        // its own PCIe share of the missed experts (the same rule as CUDA0's above: its link is probed)
+        st.pcie_frac = o.pcie_frac;
+        if (!pcie_given && native_pack) {
+            const double bw = probe_pcie_h2d_gbps();
+            if (bw > 0.0) st.pcie_frac = bw >= 20.0 ? 0.55 : bw < 4.0 ? 0.0 : std::min(0.55, std::max(0.05, 0.55 * (bw / 26.0)));
+            std::fprintf(stderr, "strata generate: layer split: CUDA%d PCIe probe %.1f GB/s -> pcie_frac %.2f\n", st.dev,
+                         bw, st.pcie_frac);
+        }
+        size_t fb = 0, tb = 0;
+        /*
+        DPCT1106:676: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(fb, tb);
+        std::fprintf(stderr, "strata generate: layer split: CUDA%d holds its weights, session%s; %.2f GiB free\n",
+                     st.dev, last ? " and head" : "", (double) fb / 1073741824.0);
+    }
+    GpuStage* const last_st = stages.empty() ? nullptr : stages.back().get();
+
+    // Secure MTP's CUDA0 allocations before the large host arena is registered with both CUDA contexts.
+    // In particular WDDM can refuse the draft weights after mapping tens of GiB of host pages.
+    strata::core::MtpDrafter mtp;
+    if (!o.mtp.empty()) {
+        if (o.spec < 2) {
+            std::fprintf(stderr, "strata generate: --mtp is ignored without --spec T (T >= 2)\n");
+            o.mtp.clear();
+        }
+        if (!o.mtp.empty()) mtp.set_prompt_len((int64_t) o.tokens.size());
+        // the draft layer is the canonical model's MTP head (512 experts) even when the target is pruned,
+        // so it always sees the canonical geometry; `static` because MtpDrafter keeps a reference
+        static const strata::core::ModelGeometry draft_geometry{};
+        // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
+        const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
+        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
+    }
+    // Create the additional contexts after MTP has secured CUDA0 memory, but
+    // before the host arena maps its expert pages into their address spaces.
+    for (int r = 1; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0) {
+        double free_gib = 0;
+        if (!strata::core::RemoteExperts::preflight(remote_dev[r], free_gib, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: CUDA%d context ready, %.2f GiB free before expert arena registration\n",
+                     remote_dev[r], free_gib);
+    }
+
+    // ---- the CPU expert pool
+    //
+    // R2.1: the experts are loaded into a RESIDENT ARENA by default.  The mmap path is kept behind
+    // `--mmap-experts` because it is the A/B arm, not because it is competitive.
+    //
+    // The reasoning is the review's C1 and it is now measured on both sides.  `FileExpertSource` maps the 34 GB
+    // file, and mapped file pages are the first thing the OS reclaims; the engine's rate then depends on whether
+    // the standby list happens to hold `experts.bin`, which is why two consecutive runs of the SAME BINARY with
+    // the SAME FLAGS measured 71.97 and 34.78 ms/token in the pool (7.54 vs 12.18 tok/s).  The arena is
+    // anonymous memory the engine owns, and the pool runs at 19.41 ms/token - 1.79x better than the warm mmap
+    // and 3.7x better than the cold one.
+    //
+    // IT IS NOT PINNED, and that is reported rather than hidden: `cudaHostRegister` on 31.64 GiB fails with
+    // "out of memory" (you cannot pin 34 of 63 GB) and the arena falls back to 4 KB anonymous pages.  That is
+    // fine for the CPU pool - which is all that exists today - and NOT fine for Phase 3, whose cache fills and
+    // CPU/PCIe miss split need the GPU to DMA out of this arena.  Read `note()` when that lands.
+    //
+    // The earlier "the arena does not fit" conclusion was WRONG and is worth recording: the failure was a stale
+    // CUDA error left set by the failed `cudaHostRegister` and read later by `gr_read`'s launch check.  See the
+    // note in `pinned.cu`.
+    strata::core::FileExpertSource src;
+    strata::core::ArenaExpertSource arena_src;
+    strata::core::ExpertSource* srcp = nullptr;
+    if (o.mmap_experts) {
+        if (native_pack) {   // FileExpertSource maps the canonical pack's experts.bin; a native pack has none
+            std::fprintf(stderr, "strata generate: --mmap-experts needs a canonical pack (experts.bin); %s is a native "
+                                 "(IQ) pack, whose experts are loaded into the arena\n", o.pack.c_str());
+            return 2;
+        }
+        if (!src.open(o.pack, g.n_layers, g.n_expert, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experts via mmap (--mmap-experts; the A/B arm of R2.1)\n");
+        srcp = &src;
+    } else {
+        arena_src.set_gguf(o.native_preset);   // plan v0.3 P6: a native pack may take its experts from shard 1
+        // On the multi-GPU Windows experiment, start with at most 8 GiB of mapped host pages.
+        // Unregistered layers remain in the resident arena and use the CPU expert path.
+        // (a layer split across GPUs too: pinning all of it into two contexts leaves WDDM refusing every later
+        // allocation - measured on the 5080 + 3090 rig: cudaMemGetInfo and the next cudaMalloc fail)
+        const uint64_t pin_limit = (o.expert_cache_remote[0] > 0 || multi_gpu) ? (8ull << 30) : 0;
+        if (!arena_src.open(o.pack, g.n_layers, g.n_expert, /*threads=*/6, err, pin_limit)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: expert arena: %s\n", arena_src.note().c_str());
+        std::fprintf(stderr, "strata generate: loaded %.2f GiB at %.2f GiB/s\n",
+                     (double) strata::kernels::cpu::expert_layout().total / (1024.0 * 1024 * 1024),
+                     arena_src.load_gib_per_second());
+        // A rate under ~0.2 GiB/s is not the hardware.  Task Scheduler / service contexts throttle this
+        // read+fill about 24x (measured 0.05 vs 1.42 GiB/s for the same binary, args and cache state; the
+        // scheduler's defaults - Below normal priority and a least-privilege token - were the only
+        // difference between the runs).  Say so instead of letting the user blame the disk; see
+        // docs/DETAILS.md, "Running it at startup (Task Scheduler)".
+#ifdef _WIN32   // a Windows launch context; elsewhere a load this slow is the disk
+        if (arena_src.load_gib_per_second() > 0.0 && arena_src.load_gib_per_second() < 0.2) {
+            std::fprintf(stderr,
+                         "strata generate: hint: ~24x below what this hardware streams from a normal "
+                         "launch. If Strata is started by Task Scheduler or a service, register the task "
+                         "with Priority 4 (Normal) and 'Run with highest privileges' - the scheduler's "
+                         "defaults (Below normal + a least-privilege token) throttle the load. See "
+                         "docs/DETAILS.md ('Running it at startup').\n");
+        }
+#endif
+        srcp = &arena_src;
+    }
+    strata::kernels::cpu::ExpertPool pool(o.pool_workers, /*pin=*/true, /*host_works=*/!o.no_host_worker);
+    if (o.no_ple_prefetch) strata::kernels::ple_prefetch_enable(false);
+    // ---- R4's slot storage.  Allocated AFTER the weights and the session, so `cudaMemGetInfo` inside `open`
+    // sees the memory this process actually has left rather than the card's idle figure - and refuses with both
+    // numbers if the slots do not fit, instead of handing back a cache smaller than it was asked for.
+    mem_mark("the weights, the session and the drafter");
+    strata::core::ExpertCache xcache;
+    std::vector<std::pair<int32_t, int32_t>> profile;
+    if (!o.expert_profile.empty()) {
+        int64_t pslots = 0;
+        if (!strata::core::read_expert_profile(o.expert_profile, g.n_layers, g.n_expert, profile, pslots, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        // An explicit number truncates the ranked list ("what would 2,000 slots give" without rebuilding the
+        // file).  `--expert-cache 0` used to take the count the profile was built for; the profile now ranks
+        // every pair (issue #46: a card that holds more than the old 8,000 used to stop there), so it means auto.
+        if (o.expert_cache == 0) o.expert_cache = -1;
+        std::fprintf(stderr, "strata generate: profile %s: %zu ranked pairs, built for %lld slots\n",
+                     o.expert_profile.c_str(), profile.size(), (long long) pslots);
+    }
+    // ---- layer split across GPUs: "auto" places the split points by a cost model of one decode window, measured on
+    // the 5080 + 3090 rig (bench/results/2026-09-29-layer-split):
+    //   - every layer costs its GPU a time inversely proportional to SMs x clock (0.33 ms on an RTX 5080, 0.50 on a
+    //     3090: the per-layer round trip and kernels, not the bytes - both cards have ~950 GB/s);
+    //   - an expert no cache holds costs ~190 ms per unit of routed mass: the CPU pool in decode and the PCIe stream
+    //     in prompts (fitted: the sweep's best K, 26-28, is where one more layer on the faster card stops paying
+    //     for the ~0.1% of the mass it pushes out of its cache);
+    //   - which experts a cache holds: its layers' profiled pairs, hottest first, until its free VRAM (less the
+    //     reserve, the prompt path's buffers and, on a later GPU, 1 GiB for its windows and the drafter) is used;
+    //     the routed mass of rank r is taken as (r+1)^-1.2 (fits the sweep's hit rates: K=24/26/28 predicted
+    //     99.53/99.34/99.15%, measured 99.5/99.4/99.0%).
+    // Up to 3 GPUs every placement is tried; beyond, the layers are shared in proportion to speed.
+    // STRATA_SPLIT_MISS_MS tunes the miss cost (a slower CPU: higher).
+    const int64_t split_pf_mib = o.prefill_chunk > 0 ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+    auto stage_room = [&](int dev, bool later) -> int64_t {
+        try {
+    const strata::core::OnDevice on(dev);
+        size_t fb = 0, tb = 0;
+        /*
+        DPCT1106:680: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+
+        const int64_t reserve = ((int64_t) o.vram_reserve_mib + split_pf_mib + (later ? 1024 : 0)) << 20;
+        return std::max<int64_t>((int64_t) fb - reserve, 0);
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    if (multi_gpu && split_auto) {
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        const int ns = (int) stages.size() + 1;
+        std::vector<int64_t> cap((size_t) ns), used((size_t) ns);
+        std::vector<double> layer_ms((size_t) ns);
+        for (int i = 0; i < ns; ++i) {
+            const int dev = i == 0 ? 0 : stages[(size_t) i - 1]->dev;
+            cap[(size_t) i] = stage_room(i == 0 ? -1 : dev, i > 0);
+            int sms = 0, khz = 0;
+            sms = dpct::get_device(dev).get_max_compute_units();
+            if (DPCT_CHECK_ERROR(
+                    khz = dpct::get_device(dev).get_max_clock_frequency()) !=
+                    0 ||
+                khz <= 0) khz = 1800000;
+            /*
+            DPCT1026:682: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            const double speed =
+                std::max(1.0, (double)sms * (double)khz / 1e6); // SMs x GHz
+            layer_ms[(size_t) i] = 0.33 * (84.0 * 2.617) / speed;
+            std::fprintf(stderr, "strata generate: layer split auto: CUDA%d %d SMs at %.2f GHz -> %.2f ms per layer, "
+                                 "%.2f GiB for experts\n", dev, sms, khz / 1e6, layer_ms[(size_t) i],
+                         (double) cap[(size_t) i] / 1073741824.0);
+        }
+        const double miss_ms = std::getenv("STRATA_SPLIT_MISS_MS") ? std::atof(std::getenv("STRATA_SPLIT_MISS_MS")) : 190.0;
+        std::vector<double> mass(profile.size());
+        double total_mass = 0;
+        for (size_t r = 0; r < profile.size(); ++r) total_mass += (mass[r] = std::pow((double) r + 1.0, -1.2));
+        auto cost = [&](int64_t l) -> int64_t {
+            return native_pack ? ((int64_t) lay.blob_bytes(l) + 255) / 256 * 256 : (int64_t) lay.max_blob;
+        };
+        // the predicted window time (ms) of a placement, and the routed mass its caches hold
+        auto predict = [&](const std::vector<int64_t>& at, double& held_mass, int64_t& held) -> double {
+            std::fill(used.begin(), used.end(), 0);
+            held_mass = 0;
+            held = 0;
+            std::vector<bool> full((size_t) ns, false);
+            for (size_t r = 0; r < profile.size(); ++r) {
+                const int64_t l = profile[r].first;
+                int st = 0;
+                while (st + 1 < ns && l >= at[(size_t) st]) ++st;
+                if (full[(size_t) st]) continue;
+                if (used[(size_t) st] + cost(l) > cap[(size_t) st]) { full[(size_t) st] = true; continue; }   // as the fill
+                used[(size_t) st] += cost(l);
+                held_mass += mass[r];
+                ++held;
+            }
+            held_mass /= std::max(total_mass, 1e-9);
+            double ms = miss_ms * (1.0 - held_mass);
+            for (int i = 0; i < ns; ++i) {
+                const int64_t lb = i == 0 ? 0 : at[(size_t) i - 1], le = i + 1 < ns ? at[(size_t) i] : g.n_layers;
+                ms += (double) (le - lb) * layer_ms[(size_t) i];
+            }
+            return ms;
+        };
+        std::vector<int64_t> best, at((size_t) ns - 1);
+        double best_ms = 1e30, best_mass = 0;
+        int64_t best_held = 0;
+        auto consider = [&]() {
+            double hm = 0;
+            int64_t held = 0;
+            const double ms = predict(at, hm, held);
+            if (ms < best_ms) { best = at; best_ms = ms; best_mass = hm; best_held = held; }
+        };
+        const int64_t L = g.n_layers;
+        if (ns == 2) {
+            for (int64_t k = 2; k < L; ++k) { at[0] = k; consider(); }
+        } else if (ns == 3) {
+            for (int64_t k1 = 2; k1 + 1 < L; ++k1)
+                for (int64_t k2 = k1 + 1; k2 < L; ++k2) { at[0] = k1; at[1] = k2; consider(); }
+        } else {
+            double total = 0;
+            for (const double c : layer_ms) total += 1.0 / c;
+            double acc = 0;
+            for (int i = 0; i + 1 < ns; ++i) {
+                acc += 1.0 / layer_ms[(size_t) i];
+                at[(size_t) i] = std::clamp<int64_t>((int64_t) std::llround(acc / total * (double) L),
+                                                    i == 0 ? 2 : at[(size_t) i - 1] + 1, L - (ns - 1 - i));
+            }
+            consider();
+        }
+        split_at = best;
+        std::string ks;
+        for (const int64_t k : split_at) ks += (ks.empty() ? "" : ",") + std::to_string(k);
+        std::fprintf(stderr, "strata generate: layer split auto: K=%s - predicted %.1f ms per decode window; the caches "
+                             "hold %lld of %zu profiled pairs (~%.1f%% of the routed mass)\n", ks.c_str(), best_ms,
+                     (long long) best_held, profile.size(), 100.0 * best_mass);
+    }
+    for (size_t i = 0; i < split_at.size(); ++i)
+        if (split_at[i] >= g.n_layers) {
+            std::fprintf(stderr, "strata generate: --layer-split: layer %lld is past the last (%lld)\n",
+                         (long long) split_at[i], (long long) (g.n_layers - 1));
+            return 2;
+        }
+    // the stage that runs a layer (0: CUDA0's)
+    auto stage_of = [&](int64_t l) -> int {
+        int st = 0;
+        while (st < (int) split_at.size() && l >= split_at[(size_t) st]) ++st;
+        return st;
+    };
+    if (multi_gpu) {
+        std::vector<std::pair<int32_t, int32_t>> mine;
+        for (const auto& pr : profile) {
+            const int st = stage_of(pr.first);
+            (st == 0 ? mine : stages[(size_t) st - 1]->profile).push_back(pr);
+        }
+        profile.swap(mine);
+        for (size_t i = 0; i < stages.size(); ++i) {
+            stages[i]->lb = split_at[i];
+            stages[i]->le = i + 1 < stages.size() ? split_at[i + 1] : g.n_layers;
+        }
+    }
+    // THE HEAD BEFORE THE CACHE.  The expert cache takes what is free minus the reserve, so everything allocated
+    // after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after it and ate most of
+    // the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for good at its first
+    // verify window.  Loaded first, the cache is sized around it.
+    const strata::core::WeightRef* wo = wt.find("output.weight");
+    if (wo == nullptr) { std::fprintf(stderr, "strata generate: output.weight is missing\n"); return 1; }
+    const int64_t n_vocab = wo->ne1;
+    strata::core::NativeHead native_head;
+    if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
+        if (!native_head.load(o.native_head_gguf, g.n_embd, n_vocab, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experimental native Q5_K head, %llu bytes\n",
+                     (unsigned long long) native_head.weight_bytes());
+    }
+    std::vector<float> logits((size_t) n_vocab);
+    float* d_logits = nullptr;
+    if (DPCT_CHECK_ERROR(
+            d_logits = (float *)sycl::malloc_device(
+                (size_t)n_vocab * 4, dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "strata generate: the logits buffer failed\n");
+        return 1;
+    }
+    const bool auto_cache = o.expert_cache < 0;
+    if (o.expert_cache < 0) {
+        size_t free_b = 0, total_b = 0;
+        /*
+        DPCT1106:683: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(free_b, total_b);
+        // Plan v0.3 P5: the batched prompt path's chunk buffers are allocated later, so they are reserved here -
+        // under WDDM an over-subscribed allocation does not fail, it pages to system memory and crawls.
+        // (with borrowing - the default with a profile - the prompt path lends cache slots instead)
+        const bool borrow = !o.no_prefill_borrow && !o.expert_profile.empty();
+        const int64_t prefill_mib = (o.prefill_chunk > 0 && !borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+        const int64_t reserve = ((int64_t) o.vram_reserve_mib + prefill_mib) << 20;
+        int64_t slots = ((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+        if (!profile.empty()) slots = std::min<int64_t>(slots, (int64_t) profile.size());
+        o.expert_cache = (int) std::max<int64_t>(slots, 0);
+        std::fprintf(stderr, "strata generate: expert cache auto: %.2f GiB free, %d MiB reserved -> %d slots\n",
+                     (double) free_b / 1073741824.0, o.vram_reserve_mib, o.expert_cache);
+    } else if (multi_gpu && o.expert_cache > 0) {
+        // a layer split's prompt path has its own buffers (it borrows no slots): an explicit cache size leaves room
+        // for them and the reserve, or the first prompt fails with "device buffers ... do not fit"
+        size_t free_b = 0, total_b = 0;
+        /*
+        DPCT1106:684: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(free_b, total_b);
+        const int64_t prefill_mib = o.prefill_chunk > 0 ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+        const int64_t reserve = ((int64_t) o.vram_reserve_mib + prefill_mib) << 20;
+        const int64_t fit = std::max<int64_t>(((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob, 0);
+        if (o.expert_cache > fit) {
+            std::fprintf(stderr, "strata generate: layer split: --expert-cache %d leaves no room for the prompt path's "
+                                 "buffers (%lld MiB) on CUDA0: %lld slots\n", o.expert_cache, (long long) prefill_mib,
+                         (long long) fit);
+            o.expert_cache = (int) fit;
+        }
+    }
+    // plan v0.3 P6: a native pack's blobs differ per layer, so with a profile its slots are sized per pair: the
+    // same VRAM holds ~30% more IQ3_XXS experts than slots of the largest blob would
+    std::vector<int64_t> sized_slots;
+    if (native_pack && o.expert_cache > 0 && !profile.empty()) {
+        size_t free_b = 0, total_b = 0;
+        /*
+        DPCT1106:685: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(free_b, total_b);
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        const uint64_t budget = (uint64_t) o.expert_cache * lay.max_blob;   // what the uniform sizing granted
+        uint64_t used = 0;
+        size_t free_room = free_b > ((size_t) o.vram_reserve_mib << 20) ? free_b - ((size_t) o.vram_reserve_mib << 20) : 0;
+        const uint64_t cap = std::min<uint64_t>(budget, (uint64_t) free_room);
+        for (const auto& pr : profile) {
+            const uint64_t b = (lay.blob_bytes(pr.first) + 255) / 256 * 256;
+            if (used + b > cap) break;
+            used += b;
+            sized_slots.push_back((int64_t) lay.blob_bytes(pr.first));
+        }
+        o.expert_cache = (int) sized_slots.size();
+    }
+    if (o.expert_cache > 0) {
+        // keep the first `keep_bytes` of the cache (the profile's hottest experts first); false when nothing is left
+        auto shrink_to = [&](int64_t keep_bytes) -> bool {
+            if (keep_bytes <= 0) { o.expert_cache = 0; sized_slots.clear(); return false; }
+            if (!sized_slots.empty()) {
+                int64_t used = 0;
+                size_t keep = 0;
+                while (keep < sized_slots.size() && used + (sized_slots[keep] + 255) / 256 * 256 <= keep_bytes)
+                    used += (sized_slots[keep++] + 255) / 256 * 256;
+                sized_slots.resize(keep);
+                o.expert_cache = (int) keep;
+            } else {
+                o.expert_cache = (int) (keep_bytes / (int64_t) strata::kernels::cpu::expert_layout().max_blob);
+            }
+            if (o.expert_cache <= 0) { o.expert_cache = 0; sized_slots.clear(); return false; }
+            return true;
+        };
+        auto cache_bytes = [&]() -> int64_t {
+            if (sized_slots.empty()) return (int64_t) o.expert_cache * (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+            int64_t b = 0;
+            for (const int64_t s : sized_slots) b += (s + 255) / 256 * 256;
+            return b;
+        };
+        // With `--expert-cache auto` the reserve must still be free once the slots are WRITTEN: under WDDM an
+        // allocation is not resident until it is touched, and the free figure read before it can be ~1 GB too
+        // high.  A cache sized from it filled the card to 0 MiB, the driver then paged, and a request that needed a
+        // page back while the verify graph spun on a host flag never finished.  So the slots are zeroed and the
+        // free figure read again; while it is short of the reserve the cache is reopened smaller.
+        // STRATA_TEST_CACHE_FAIL=N: the first N opens fail as an out-of-commit cudaMalloc does (tests the retry)
+        int fake_fails = std::getenv("STRATA_TEST_CACHE_FAIL") ? std::atoi(std::getenv("STRATA_TEST_CACHE_FAIL")) : 0;
+        int failed = 0;
+        for (int attempt = 0;; ++attempt) {
+            bool ok = false;
+            if (fake_fails > 0) {
+                --fake_fails;
+                err = "ExpertCache: cudaMalloc failed: out of memory (STRATA_TEST_CACHE_FAIL)";
+            } else {
+                ok = sized_slots.empty()
+                    ? xcache.open(o.expert_cache, g.n_layers, g.n_expert, (int64_t) strata::kernels::cpu::expert_layout().max_blob, err)
+                    : xcache.open_sized(sized_slots, g.n_layers, g.n_expert, err);
+            }
+            if (!ok) {
+                // Issue #60: on Windows a device allocation is also charged to the system commit (RAM + page file),
+                // so with a small page file the cache's one big cudaMalloc fails while the VRAM is free.  An auto
+                // cache then tries three quarters of the size, a few times, instead of stopping the engine.
+                char commit[96] = "";
+#if defined(_WIN32)
+                MEMORYSTATUSEX ms{};
+                ms.dwLength = sizeof ms;
+                if (GlobalMemoryStatusEx(&ms))
+                    std::snprintf(commit, sizeof commit, " (Windows has %.1f GiB of commit left: RAM + page file)",
+                                  (double) ms.ullAvailPageFile / 1073741824.0);
+#endif
+                if (auto_cache && failed < 8 && shrink_to(cache_bytes() / 4 * 3)) {
+                    ++failed;
+                    std::fprintf(stderr, "strata generate: %s%s; trying a smaller expert cache: %d slots\n", err.c_str(),
+                                 commit, o.expert_cache);
+                    continue;
+                }
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+#if defined(_WIN32)
+                std::fprintf(stderr, "strata generate: on Windows the graphics card's memory also needs room in the page "
+                                     "file: set it to \"System managed\" (System > About > Advanced system settings > "
+                                     "Performance > Advanced > Virtual memory), or lower --expert-cache\n");
+#endif
+                return 1;
+            }
+            if (!auto_cache || attempt - failed >= 6) break;
+            dpct::get_in_order_queue()
+                .memset(xcache.device_slot(0), 0, (size_t)xcache.bytes())
+                .wait();
+            dpct::get_current_device().queues_wait_and_throw();
+            size_t free_b = 0, total_b = 0;
+            /*
+            DPCT1106:686: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            const int64_t want = (int64_t) o.vram_reserve_mib << 20;
+            if ((int64_t) free_b >= want - (64ll << 20)) break;
+            // short by (want - free); a figure of 0 only says "at least", so then give back a quarter as well
+            int64_t give = want - (int64_t) free_b + (64ll << 20);
+            if (free_b < ((size_t) 16 << 20)) give = std::max<int64_t>(give, xcache.bytes() / 4);
+            const int64_t keep_bytes = xcache.bytes() - give;
+            std::fprintf(stderr, "strata generate: only %lld MiB free once the slots are written (reserve %d MiB); "
+                                 "shrinking the expert cache\n", (long long) (free_b >> 20), o.vram_reserve_mib);
+            xcache.close();
+            if (!shrink_to(keep_bytes)) break;
+        }
+        if (failed > 0 && o.expert_cache > 0)
+            std::fprintf(stderr, "strata generate: expert cache: %d slots (%.2f GiB) after %d smaller tries - a bigger "
+                                 "page file lets it use more of the free VRAM\n",
+                         o.expert_cache, (double) xcache.bytes() / 1073741824.0, failed);
+    }
+    if (o.expert_cache > 0) {
+        std::fprintf(stderr, "strata generate: expert cache %lld slots, %.2f GiB of VRAM; policy is\n",
+                     (long long) xcache.slots(), xcache.gib());
+        mem_mark("opening the expert cache");
+        xcache.set_per_layer_admission(o.expert_cache_per_layer);
+        // Round 328 warned here that the GPU hit path was wrong (tokens diverged from a cache-off run from
+        // token 0). That fault was fixed long since (native_expert_parity, expert_parity, the grouped kernels'
+        // tests), and the warning outlived it (issue #23). What remains is rounding: a GPU expert and the CPU's
+        // compute the same quantized expert with different float order, so a near-tie can flip. Measured teacher-
+        // forced on 2,557 tokens (bench/results/2026-09-27-cache-parity): 95-98% same top-1, and perplexity equal
+        // (on - off = -0.005 +- 0.005 nats). Neither output is more correct than the other.
+        std::fprintf(stderr,
+                     "strata generate: the GPU computes the experts in the cache; it rounds differently from the CPU,\n"
+                     "                 so a reply can differ slightly from a run without the cache (same quality:\n"
+                     "                 bench/results/2026-09-27-cache-parity).\n");
+        if (o.expert_cache_per_layer) {
+            int64_t lo = 0, hi = 0;
+            xcache.layer_slot_range(0, lo, hi);
+            std::fprintf(stderr, "                 R4.2g PER-LAYER: each layer owns %lld slots (%lld..%lld).\n",
+                         (long long) (hi - lo), (long long) lo, (long long) (hi - 1));
+        } else if (profile.empty()) {
+            std::fprintf(stderr, "                 compulsory-miss (fills with whatever the run routes first).\n");
+        } else {
+            std::fprintf(stderr, "                 PROFILE, ranked by routing frequency, no eviction.\n");
+        }
+    }
+    // ---- R4.2e: fill the tier from the profile.  This is the only place the plan is applied, and it runs
+    // ONCE: with `slots` pairs and `slots` slots the cache is full when this returns, so the decode-time
+    // admission finds no room and every non-profiled expert stays a CPU miss.  That is what makes the profile
+    // the policy rather than a hint.
+    int64_t prefilled = 0;
+    if (!profile.empty() && srcp != nullptr) {
+        const int64_t want = std::min<int64_t>((int64_t) profile.size(), xcache.slots());
+        for (int64_t i = 0; i < want; ++i) {
+            const int32_t slot = xcache.admit(profile[(size_t) i].first, profile[(size_t) i].second);
+            if (slot == strata::core::kNotResident) break;
+            const uint8_t* b = srcp->blob(profile[(size_t) i].first, profile[(size_t) i].second);
+            if (b == nullptr || !xcache.fill_slot_blocking(slot, b, err,
+                    (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(profile[(size_t) i].first))) {
+                std::fprintf(stderr, "strata generate: the profile fill failed at pair %lld: %s\n",
+                             (long long) i, err.c_str());
+                return 1;
+            }
+            ++prefilled;
+        }
+        // **AND ONE SLOT IS READ BACK AND COMPARED.**  A residency table that is right about indices and wrong
+        // about bytes produces a plausible token, which is this project's most expensive failure mode; the
+        // cache's own `verify_slot` is the check and it costs one 1.38 MB D2H at startup.
+        if (prefilled > 0 && !xcache.verify_slot(xcache.slot_of(profile[0].first, profile[0].second),
+                                srcp->blob(profile[0].first, profile[0].second), err,
+                                (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(profile[0].first))) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        mem_mark("the profile fill");
+        std::fprintf(stderr, "strata generate: pre-filled %lld of %lld slots from the profile; slot 0 verified\n",
+                     (long long) prefilled, (long long) want);
+    }
+
+    for (auto& stp : stages) {
+        GpuStage& st = *stp;
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        const int64_t room = stage_room(st.dev, true);
+        const strata::core::OnDevice on(st.dev);
+        std::vector<int64_t> sized;
+        int64_t used = 0;
+        for (const auto& pr : st.profile) {
+            const int64_t b = native_pack ? ((int64_t) lay.blob_bytes(pr.first) + 255) / 256 * 256 : (int64_t) lay.max_blob;
+            if (used + b > room) break;
+            used += b;
+            sized.push_back((int64_t) lay.blob_bytes(pr.first));
+        }
+        if (sized.empty() ||
+            !(native_pack ? st.cache.open_sized(sized, g.n_layers, g.n_expert, err)
+                          : st.cache.open((int64_t) sized.size(), g.n_layers, g.n_expert, (int64_t) lay.max_blob, err))) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d expert cache: %s\n", st.dev,
+                         sized.empty() ? "no room" : err.c_str());
+            return 1;
+        }
+        int64_t filled = 0;
+        for (const auto& pr : st.profile) {
+            if (filled >= st.cache.slots()) break;
+            const int32_t slot = st.cache.admit(pr.first, pr.second);
+            if (slot == strata::core::kNotResident) break;
+            const uint8_t* b = srcp->blob(pr.first, pr.second);
+            if (b == nullptr || !st.cache.fill_slot_blocking(slot, b, err, (int64_t) lay.blob_bytes(pr.first))) {
+                std::fprintf(stderr, "strata generate: layer split, CUDA%d profile fill failed at pair %lld: %s\n",
+                             st.dev, (long long) filled, err.c_str());
+                return 1;
+            }
+            ++filled;
+        }
+        if (filled == 0 || !st.cache.verify_slot(st.cache.slot_of(st.profile[0].first, st.profile[0].second),
+                                                 srcp->blob(st.profile[0].first, st.profile[0].second), err,
+                                                 (int64_t) lay.blob_bytes(st.profile[0].first))) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d expert cache: %s\n", st.dev,
+                         filled == 0 ? "nothing filled" : err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: layer split: CUDA%d runs layers %lld-%lld, expert cache %lld slots "
+                             "(%.2f GiB), %lld of its %zu profiled pairs; slot 0 verified\n",
+                     st.dev, (long long) st.lb, (long long) (st.le - 1), (long long) st.cache.slots(), st.cache.gib(),
+                     (long long) filled, st.profile.size());
+    }
+    if (multi_gpu)
+        std::fprintf(stderr, "strata generate: layer split: CUDA0 runs layers 0-%lld\n", (long long) (split_at[0] - 1));
+
+    std::array<strata::core::RemoteExperts, 3> remote_experts;
+    const bool multi_remote = o.expert_cache_remote[1] > 0 || o.expert_cache_remote[2] > 0;
+    if (o.expert_cache_remote[0] > 0) {
+        if (o.expert_cache <= 0 || profile.empty() || o.no_pool) {
+            std::fprintf(stderr, "strata generate: remote experts need --expert-profile, "
+                                 "a CUDA0 expert cache and the expert pool\n");
+            return 2;
+        }
+        std::vector<std::pair<int32_t, int32_t>> ranked = profile;
+        if (!stages.empty()) {   // a layer split: CUDA0's share of the profile, then the later stages' pairs no cache holds
+            for (auto& st : stages)
+                for (const auto& pr : st->profile)
+                    if (st->cache.slot_of(pr.first, pr.second) < 0) ranked.push_back(pr);
+        }
+        if (multi_remote) {
+            // The shipped frequency profile names only 8000 of 24576 experts. Once exhausted,
+            // fill remaining VRAM from unranked pairs in expert-then-layer order: this spreads
+            // the tail across all layers instead of concentrating it on layer zero.
+            std::vector<uint8_t> seen((size_t) g.n_layers * (size_t) g.n_expert, 0);
+            for (const auto& pair : ranked)
+                if (pair.first >= 0 && pair.first < g.n_layers && pair.second >= 0 && pair.second < g.n_expert)
+                    seen[(size_t) pair.first * (size_t) g.n_expert + (size_t) pair.second] = 1;
+            for (int64_t e = 0; e < g.n_expert; ++e)
+                for (int64_t l = 0; l < g.n_layers; ++l)
+                    if (!seen[(size_t) l * (size_t) g.n_expert + (size_t) e])
+                        ranked.emplace_back((int32_t) l, (int32_t) e);
+            std::fprintf(stderr, "strata generate: remote ranking: %zu profiled pairs, "
+                                 "%zu other pairs to fill CUDA1..3\n", profile.size(), ranked.size() - profile.size());
+        }
+        std::array<std::vector<std::pair<int32_t, int32_t>>, 3> by_device;
+        if (multi_remote) {
+            // Either stripe experts for parallel GPU work, or give each layer one
+            // secondary GPU to reduce switches and transfers over shared USB4.
+            std::vector<uint8_t> assigned((size_t) g.n_layers * (size_t) g.n_expert, 0);
+            const int devices = 1 + (o.expert_cache_remote[1] > 0) + (o.expert_cache_remote[2] > 0);
+            int next = 0;
+            for (const auto& pair : ranked) {
+                if (pair.first < 0 || pair.first >= g.n_layers || pair.second < 0 || pair.second >= g.n_expert ||
+                    xcache.slot_of(pair.first, pair.second) >= 0) continue;
+                const size_t index = (size_t) pair.first * (size_t) g.n_expert + (size_t) pair.second;
+                if (assigned[index]) continue;
+                int target = -1;
+                if (o.expert_cache_remote_placement == "layer") {
+                    target = pair.first % devices;
+                    // Other layers' owners may still have room: keep scanning ranks.
+                    if (by_device[(size_t) target].size() >=
+                        (size_t) o.expert_cache_remote[(size_t) target]) continue;
+                } else {
+                    for (int i = 0; i < devices; ++i) {
+                        const int r = (next + i) % devices;
+                        if (by_device[(size_t) r].size() < (size_t) o.expert_cache_remote[(size_t) r]) {
+                            target = r;
+                            break;
+                        }
+                    }
+                    if (target < 0) break;
+                }
+                assigned[index] = 1;
+                by_device[(size_t) target].push_back(pair);
+                next = (target + 1) % devices;
+            }
+            std::fprintf(stderr, "strata generate: remote ranks %s across %d CUDA devices\n",
+                         o.expert_cache_remote_placement == "layer" ? "grouped by layer" : "striped", devices);
+        } else {
+            by_device[0] = std::move(ranked);
+        }
+        std::vector<uint8_t> claimed((size_t) g.n_layers * (size_t) g.n_expert, 0);
+        for (auto& st : stages)   // a layer split: what a stage's cache holds is no helper's
+            for (const auto& pr : st->profile)
+                if (st->cache.slot_of(pr.first, pr.second) >= 0)
+                    claimed[(size_t) pr.first * (size_t) g.n_expert + (size_t) pr.second] = 1;
+        for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0) {
+            if (!remote_experts[(size_t) r].open(remote_dev[r], o.expert_cache_remote[(size_t) r],
+                     g.n_layers, g.n_expert, by_device[(size_t) r], xcache, *srcp, claimed, err)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            std::fprintf(stderr, "strata generate: CUDA%d: %lld additional experts, %.2f GiB; "
+                                 "results return through pinned host rows\n", remote_dev[r],
+                         (long long) remote_experts[(size_t) r].resident(), remote_experts[(size_t) r].gib());
+        }
+    }
+
+    Drive drive;
+    for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
+        drive.d.remote[drive.d.remote_count++] = &remote_experts[(size_t) r];
+    drive.d.hit_cpu_order = o.expert_cache_cpu_order;
+    drive.d.split_rows = !o.no_split_rows;
+    drive.d.pool = &pool;
+    drive.d.src = srcp;
+    drive.d.n_expert = g.n_expert;
+    drive.d.jobs.resize((size_t) K);
+    // ---- R4.2c: THE HIT PATH.  Every one of these is required for `hits_ready()`, which is all-or-nothing on
+    // purpose: a half-configured hit path would compute some experts twice and others not at all, and a token
+    // built on that is wrong rather than refused.
+    void* hit_scratch = nullptr;
+    int32_t* d_hit_slot = nullptr;
+    int32_t* d_hit_dst = nullptr;
+    uint8_t* d_hit_q8 = nullptr;
+    float* d_hit_q8_scale = nullptr;   ///< R4.2h: the fp32 activation scales the CPU path also uses
+    float* d_hit_out = nullptr;
+    if (o.expert_cache > 0 && !o.no_pool) {
+        const uint64_t sb = strata::kernels::moe_hit_grouped_scratch_bytes(K, g.n_embd, strata::kernels::cpu::FF);
+        if (DPCT_CHECK_ERROR(hit_scratch = (void *)sycl::malloc_device(
+                                 (size_t)sb, dpct::get_in_order_queue())) !=
+                0 ||
+            DPCT_CHECK_ERROR(d_hit_slot = sycl::malloc_device<int32_t>(
+                                 (size_t)K, dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(d_hit_dst = sycl::malloc_device<int32_t>(
+                                 (size_t)K, dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(d_hit_q8 = (uint8_t *)sycl::malloc_device(
+                                 (size_t)(g.n_embd / 32) * 34,
+                                 dpct::get_in_order_queue())) != 0 ||
+            // R4.2h: the fp32 activation scales.  Without this the GPU's hits
+            // use the block's fp16 `d` while the CPU's misses use
+            // `ActQ::scale`, which is fp32 - a 4.761e-04 relative disagreement
+            // on every chunk, and the reason enabling the cache changed the
+            // tokens.
+            DPCT_CHECK_ERROR(d_hit_q8_scale = sycl::malloc_device<float>(
+                                 (size_t)(g.n_embd / 32),
+                                 dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(d_hit_out = (float *)sycl::malloc_device(
+                                 (size_t)K * g.n_embd * 4,
+                                 dpct::get_in_order_queue())) != 0) {
+            std::fprintf(stderr, "strata generate: the R4 hit path could not allocate its device buffers\n");
+            return 1;
+        }
+        drive.d.cache = &xcache;
+        drive.d.cache_stream = main_cs;
+        drive.d.cache_base = (const uint8_t*) xcache.device_slot(0);
+        drive.d.cache_blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+        drive.d.cache_slot_off = xcache.slot_offsets();
+        drive.d.hit_scratch = hit_scratch;
+        drive.d.parts_out = d_parts;
+        drive.d.hit_out = d_hit_out;
+        drive.d.parts_elems = K * g.n_embd;
+        drive.d.mixed = ss.block.mixed;
+        drive.d.x_q8_0_hit = d_hit_q8;
+        drive.d.x_q8_0_hit_scale = d_hit_q8_scale;
+        drive.d.d_slot = d_hit_slot;
+        drive.d.d_dst = d_hit_dst;
+        drive.d.h_slot.resize((size_t) K);
+        dpct::event_ptr hit_done = nullptr;
+        if (DPCT_CHECK_ERROR(hit_done = new sycl::event()) != 0) {
+            std::fprintf(stderr, "strata generate: the hit path could not create its probe event\n");
+            return 1;
+        }
+        drive.d.hit_done = (void*) hit_done;
+        drive.d.hit_poke = !o.no_hit_poke;
+        drive.d.h_dst.resize((size_t) K);
+        mem_mark("the R4 hit path");
+        std::fprintf(stderr, "strata generate: R4 hit path ON - resident experts are computed on the GPU\n");
+    }
+    // ---- P0.S8: the routing trace.  Only meaningful with the pool running, because the ids arrive through
+    // the doorbell that the pool consumes - so `--no-pool` is refused rather than silently producing an empty
+    // file that would read as "the router selected nothing".
+    // ---- PER-STAGE TIMING.  `--no-capture` only: an event recorded inside a stream capture is silently
+    // dropped, so a captured graph cannot carry these events and the numbers would be zeros that read as
+    // "every stage is free".  Refusing is the fix.
+    if (o.stage_timing) {
+        if (!o.no_capture) {
+            std::fprintf(stderr, "strata generate: --stage-timing records CUDA events inside the layer path, "
+                                 "and an event record inside a stream capture is silently dropped. Pass "
+                                 "--no-capture as well.\n");
+            return 2;
+        }
+        if (!strata::core::stage_timing_enable()) {
+            std::fprintf(stderr, "strata generate: stage_timing_enable failed\n");
+            return 1;
+        }
+        strata::core::stage_timing_name(0, "gr_read (attn)");
+        strata::core::stage_timing_name(1, "attention block");
+        strata::core::stage_timing_name(2, "gr_write (attn)");
+        strata::core::stage_timing_name(3, "gr_read (ffn)");
+        strata::core::stage_timing_name(4, "moe_route");
+        strata::core::stage_timing_name(5, "moe_finish");
+        strata::core::stage_timing_name(6, "gr_write (ffn)");
+        // The GDN block's internals.  It is 36 of the 48 layers, 0.96 ms each, and its entire weight traffic
+        // is ~26 MB - so ~0.11 ms at the measured read rate.  ~13 tiny latency-bound launches live in it and
+        // a single "attention block" number cannot say which one costs anything.
+        strata::core::stage_timing_name(8, "  gdn: quantize x");
+        strata::core::stage_timing_name(9, "  gdn: qkv gemv");
+        strata::core::stage_timing_name(10, "  gdn: conv+silu");
+        strata::core::stage_timing_name(11, "  gdn: l2 norms");
+        strata::core::stage_timing_name(12, "  gdn: alpha/beta/gate");
+        strata::core::stage_timing_name(13, "  gdn: gdn_step");
+        strata::core::stage_timing_name(14, "  gdn: z + out_norm");
+        strata::core::stage_timing_name(15, "  gdn: out gemv");
+    }
+    std::FILE* routing = nullptr;
+    if (!o.dump_routing.empty()) {
+        if (o.no_pool) {
+            std::fprintf(stderr, "strata generate: --dump-routing needs the expert pool; the routed ids reach "
+                                 "the host through the doorbell the pool reads. Drop --no-pool.\n");
+            return 2;
+        }
+        routing = std::fopen(o.dump_routing.c_str(), "wb");
+        if (routing == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_routing.c_str());
+            return 1;
+        }
+        drive.routing = routing;
+    }
+    strata::core::PoolFn pool_fn = o.no_pool ? nullptr : &drive_pool;
+    // The hit hook rides the same switch as the pool: with no pool there is no `parts` staging to
+    // write into, and a hit path with nowhere to write is a wrong token rather than an error.
+    strata::core::HitFn hit_fn =
+        (o.no_pool || o.expert_cache <= 0) ? nullptr : &strata::core::expert_hit_run;
+    void* pool_user = o.no_pool ? nullptr : (void*) &drive;
+    std::fprintf(stderr, "strata generate: %d expert-pool workers%s%s\n", pool.workers(),
+                 pool.host_works() ? " + the host thread" : "",
+                 o.no_pool ? " (UNUSED: --no-pool)" : "");
+
+    // **THE MISALIGNMENT WARNING THAT STOOD HERE IS GONE, BECAUSE THE MISALIGNMENT IS FIXED.**
+    //
+    // It said the tokens were not the model's, and it was true: `session_loop` handed layer `l`'s expert
+    // outputs to layer `l+1`, which multiplied them by layer `l+1`'s router weights (LEDGER L100).  The loop
+    // now runs a captured PAIR per layer - `pre[l]` ending with the router and the doorbell, then the CPU
+    // pool, then `post[l]` which combines those experts with THAT layer's weights - so layer `l`'s experts meet
+    // layer `l`'s routing.  The generated ids changed the moment it landed, which is what a correctness fix
+    // looks like from the outside.
+    //
+    // The cost is real and is recorded rather than hidden: the window for the CPU pool is now whatever GPU
+    // work follows the ring inside `pre[l]`, which is the shared expert and nothing else - 0.038 ms against
+    // 0.514 ms of CPU work per layer.  A per-layer CPU expert pool cannot be hidden behind a strictly serial
+    // residual chain; the CPU term is answered by Phase 3's VRAM expert cache, not by this pipeline.
+
+    // ---- the graphs
+    strata::core::SessionGraphs gr;
+    if (!o.no_capture && !native_pack) {   // plan v0.3 P6: a native pack runs verify windows only
+        if (!strata::core::session_capture(wt, g, ss, d_parts, gr, err, /*split=*/o.gpu_stages)) {
+            std::fprintf(stderr, "strata generate: session_capture: %s\n", err.c_str());
+            return 1;
+        }
+    }
+
+    // **`--no-capture` AND THE EXPERTS ARE MUTUALLY EXCLUSIVE, AND SILENTLY SO.**
+    //
+    // The CPU expert pool is wired into `session_loop` - the host loop around the captured graphs - and
+    // `session_token` has no pool hook at all.  So `--no-capture` did not merely change HOW the layers were
+    // launched: it ran the whole model with `parts` left at whatever the buffer held, which is ZERO, and the
+    // only symptom was `expert blobs 0` in a stats line nobody had to read.  A run that silently omits the
+    // routed experts is not a slow measurement of this model, it is a measurement of a different model.
+    //
+    // Refusing is the fix.  `--no-pool` is the explicit way to say "I want the GPU-only floor".
+    if (o.no_capture && !o.no_pool) {
+        std::fprintf(stderr,
+                     "strata generate: --no-capture runs `session_token`, which has NO CPU expert pool hook, so "
+                     "the routed experts would silently contribute nothing. Pass --no-pool as well if the "
+                     "GPU-only floor is what you want.\n");
+        return 2;
+    }
+    // The ladder is written by `session_loop`, and `session_token` does not touch the staging buffer at all - so
+    // accepting the flag there would produce a file of uninitialised memory, which reads as a wrong answer rather
+    // than as a mistake.  `--no-capture` without `--no-pool` is already refused above, so this catches the pair.
+    if (o.no_capture && !o.dump_layers.empty()) {
+        std::fprintf(stderr,
+                     "strata generate: --dump-layers is written by `session_loop`; `--no-capture` runs "
+                     "`session_token` instead, which never fills the staging buffer. Drop one of the two.\n");
+        return 2;
+    }
+    if (o.no_capture && !o.dump_halves.empty()) {
+        std::fprintf(stderr,
+                     "strata generate: --dump-halves is CAPTURED into the layer graphs, so it needs the "
+                     "captured path; `--no-capture` never records it. Drop one of the two.\n");
+        return 2;
+    }
+
+    mem_mark("the expert cache and the graphs");
+    std::fprintf(stderr, "strata generate: session is up (engine %s)\n", STRATA_VERSION);
+    auto run_head = [&](void* stream) -> bool {
+        if (!native_head.loaded())
+            return strata::core::lm_head(wt, g, ss.block, d_logits, stream, err);
+        return strata::core::lm_head_mix(wt, g, ss.block, stream, err) &&
+               native_head.run(ss.block.mixed, d_logits, stream, err);
+    };
+    float* d_emb = nullptr;
+    if (DPCT_CHECK_ERROR(
+            d_emb = (float *)sycl::malloc_device(
+                (size_t)g.n_embd * 4, dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "strata generate: the embedding buffer failed\n");
+        return 1;
+    }
+    // **`sample_tokens` TAKES DEVICE POINTERS.**  It is a kernel launch; `logits` and `out` are both read and
+    // written on the device.  Passing `logits.data()` - the host vector - faults inside the kernel and the
+    // error surfaces at the NEXT synchronising call, which here was the next token's `embed_row`, reporting an
+    // illegal access on a weight plane.  Nothing in the parameter names said device.
+    int* d_next = nullptr;
+    if (DPCT_CHECK_ERROR(d_next = sycl::malloc_device<int>(
+                             1, dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "strata generate: the sampler output buffer failed\n");
+        return 1;
+    }
+
+    // **`R` IS BOTH THE INPUT AND THE OUTPUT, SO THE NEW TOKEN'S EMBEDDING HAS TO REPLACE THE OLD RESIDUAL.**
+    // At `pos == 0` that is `session_zero`, which is the reference's own initial condition - the embedding
+    // broadcast to all `hc` streams.  After that `session_zero` would also wipe the recurrence, so the
+    // broadcast is done directly.  Getting this wrong is invisible for exactly one token.
+    void* token_stream = o.stream_token ? main_cs : nullptr;
+    auto put_input = [&](int64_t tok, int64_t pos) -> bool {
+        try {
+    if (!strata::core::embed_row(wt, g, tok, d_emb, token_stream, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return false;
+        }
+        if (pos == 0) {
+            strata::core::session_zero(ss, g, d_emb, token_stream);
+        } else {
+            for (int64_t c = 0; c < g.hc; ++c)
+                /*
+                DPCT1124:687: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                if (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
+                        ss.R + (size_t)c * g.n_embd, d_emb,
+                        (size_t)g.n_embd * 4)) != 0) {
+                    std::fprintf(stderr, "strata generate: the residual broadcast failed\n");
+                    return false;
+                }
+        }
+        return o.stream_token ||
+               DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()) == 0;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+
+    strata::kernels::SamplerParams sp;
+    sp.greedy = o.greedy;
+    sp.seed = o.seed;
+    sp.top_k = o.top_k;
+    sp.top_p = o.top_p;
+    sp.temperature = o.temperature;
+    // what this run actually samples with (the speculative loop below gets the same parameters); serve samples
+    // per request instead
+    if (!o.serve) {
+        if (sp.greedy || sp.temperature <= 0.0f)
+            std::fprintf(stderr, "strata generate: sampling greedy\n");
+        else
+            std::fprintf(stderr, "strata generate: sampling temperature=%g top_k=%d top_p=%g seed=%llu\n",
+                         (double) sp.temperature, sp.top_k > 0 && sp.top_k < 64 ? sp.top_k : 64, (double) sp.top_p,
+                         (unsigned long long) sp.seed);
+    }
+
+    std::FILE* dump = nullptr;
+    const int64_t dump_positions = (int64_t) o.tokens.size() - 1 + o.max_new;
+    if (!o.dump_logits.empty()) {
+        if (dump_positions > INT32_MAX || n_vocab > INT32_MAX) {
+            std::fprintf(stderr, "strata generate: logits dump dimensions exceed int32\n");
+            return 2;
+        }
+        dump = std::fopen(o.dump_logits.c_str(), "wb");
+        if (dump == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_logits.c_str());
+            return 1;
+        }
+        // **THE COUNT IS `n_prompt - 1 + max_new`, NOT `n_prompt + max_new`.**  The loop writes one row per
+        // position from 0, and it stops once `produced` holds `max_new` tokens - and `produced` only starts
+        // receiving at position `n_prompt - 1`.  So a 5-token prompt with `--max-new 6` writes 10 rows, and the
+        // header used to claim 11.  A header that describes a different file from the one written is the same
+        // class of defect as a self-check that verifies the wrong invariant: anything reading the count instead
+        // of the size gets a wrong answer that looks authoritative.  `tools/logits_identical.py` caught it by
+        // parsing the header and refusing the file.
+        const int32_t n_rows = (int32_t) strata::program::logits_selection::row_count(dump_positions, o.logits_stride);
+        const int32_t hdr[2] = {(int32_t) n_vocab, n_rows};
+        if (std::fwrite(hdr, sizeof hdr, 1, dump) != 1) {
+            std::fprintf(stderr, "strata generate: cannot write logits header\n");
+            std::fclose(dump);
+            return 1;
+        }
+    }
+
+    // ---- THE C1 ORACLE: ONE RESIDUAL SNAPSHOT PER LAYER PER POSITION, so the engine can be bisected against
+    // `llama-debug`'s `l_last-<il>` node instead of against a single end-to-end perplexity.  The buffer is
+    // PINNED because `session_loop` enqueues a device-to-host copy into it after every layer and the transfer
+    // would otherwise be staged through a pageable bounce buffer on the critical path.
+    std::FILE* layer_dump = nullptr;
+    float* layer_stage = nullptr;
+    const size_t layer_floats = (size_t) (g.n_layers + 1) * (size_t) g.hc * (size_t) g.n_embd;
+    if (!o.dump_layers.empty()) {
+        layer_dump = std::fopen(o.dump_layers.c_str(), "wb");
+        if (layer_dump == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_layers.c_str());
+            return 1;
+        }
+        /*
+        DPCT1048:3: The original value cudaHostAllocDefault is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        if (DPCT_CHECK_ERROR(layer_stage = sycl::malloc_host<float>(
+                                 layer_floats, dpct::get_in_order_queue())) !=
+            0) {
+            std::fprintf(stderr, "strata generate: cannot pin the layer-dump staging buffer\n");
+            return 1;
+        }
+    }
+
+    // ---- prefill is the DECODE PATH ONE TOKEN AT A TIME, which `phase-2-correct-engine.md:12-13` says is
+    // fine here: "process the prompt through the decode-style graphs in small batches; a 19K-token prompt will
+    // take minutes".  A real batched prefill is P2.S6's other half and is not this.
+    //
+    // **THE LOOP IS `feed -> 48 layers -> head -> sample -> feed`, AND THE FIRST GENERATED TOKEN COMES FROM THE
+    // LAST *PROMPT* POSITION.**  The first version sampled only on the decode positions, so `produced` was
+    // still empty when the first generated position asked for `produced.back()` - an out-of-bounds read on an
+    // empty vector.  Teacher forcing below is what makes the distinction unnecessary to special-case: for every
+    // position before the last prompt one, the next input is the PROMPT's next token, and after that it is the
+    // sampled one.
+    std::vector<int64_t> produced;
+    double total_ms = 0;
+    double prefill_ms = 0;   // positions 0 .. n_prompt-2: prompt tokens that only condition
+    const Clock::time_point t_start = Clock::now();
+    double ttft_ms = 0;
+    const int64_t n_prompt = (int64_t) o.tokens.size();
+    int64_t tok = o.tokens[0];
+
+    // ---- THE PURE-GPU MEASUREMENT.  `session_replay` launches all 48 `pre` graphs back to back on one stream
+    // with NO host work between them - no doorbell poll, no pool, no parts copy - so what it times is the GPU
+    // executing the layer sequence and nothing else.  It had been declared, defined and never called since the
+    // day it was written.
+    //
+    // **THIS IS THE MEASUREMENT THAT SAYS WHETHER THE ENGINE IS HOST-BOUND OR GPU-BOUND**, and the stage table
+    // cannot answer it: those events measure the interval between two marks on a stream, which includes every
+    // gap where the GPU sat idle waiting for the host to enqueue the next kernel.  In `--no-capture` those gaps
+    // are the host's launch latency and they are proportional to the KERNEL COUNT rather than to any work, so
+    // the no-capture stage shares are shares of kernel count - which is why the attention block, with the most
+    // kernels, looks like 55% of the token there.
+    // ---- R0.9: THE PER-STAGE TABLE ON THE CAPTURED GRAPH.
+    if (o.gpu_stages) {
+        strata::core::doorbell_reset(db);
+        double mix = 0, ffn = 0, post = 0;
+        if (!strata::core::session_replay_stages(g, 0, 0, ss, gr, main_cs, mix, ffn, post, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        const int reps = 20;
+        double t_mix = 0, t_ffn = 0, t_post = 0;
+        for (int r = 0; r < reps; ++r) {
+            if (!strata::core::session_replay_stages(g, 0, 0, ss, gr, main_cs, mix, ffn, post, err)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            t_mix += mix;
+            t_ffn += ffn;
+            t_post += post;
+        }
+        const double tot = t_mix + t_ffn + t_post;
+        std::printf("\nper-stage GPU time on the CAPTURED graph, one token over %lld layers\n",
+                    (long long) g.n_layers);
+        std::printf("  %-22s %9.3f ms/token  %8.3f ms/layer  %6.1f%%\n", "mixer (gr_read+attn+gr_write)",
+                    t_mix / reps, t_mix / reps / (double) g.n_layers, 100.0 * t_mix / tot);
+        std::printf("  %-22s %9.3f ms/token  %8.3f ms/layer  %6.1f%%\n", "ffn front + router",
+                    t_ffn / reps, t_ffn / reps / (double) g.n_layers, 100.0 * t_ffn / tot);
+        std::printf("  %-22s %9.3f ms/token  %8.3f ms/layer  %6.1f%%\n", "post (moe_finish+gr_write)",
+                    t_post / reps, t_post / reps / (double) g.n_layers, 100.0 * t_post / tot);
+        std::printf("  %-22s %9.3f ms/token\n", "sum of the three", tot / reps);
+
+        // ---- AND THE MIXER BY LAYER KIND, because 36 of the 48 are GDN and 12 are QSA and a total cannot
+        // separate them.  Round 309's uncaptured table put GDN at 10.88 ms for 36 layers against QSA's 4.56 for
+        // 12, which would make the recurrence the largest single R3 target - and that table had `moe_finish`
+        // wrong by 4x, so the ratio is re-derived here from the captured graph rather than inherited.
+        {
+            // **ACCUMULATED OVER `reps`, NOT MEASURED ONCE AND THEN DIVIDED.**  The first version called the
+            // per-layer replay a single time and printed `gdn / reps`, which reported GDN at 0.480 ms/token
+            // against a mixer total of 14.039 - a factor of exactly `reps`, and the tell was that
+            // 0.480 + 0.220 = 0.700 = 14.039 / 20.
+            std::vector<double> acc((size_t) g.n_layers, 0.0), per;
+            double f2 = 0, p2 = 0;
+            for (int r = 0; r < reps; ++r) {
+                if (!strata::core::session_replay_stages_per_layer(g, 0, 0, ss, gr, main_cs, per, f2, p2, err)) {
+                    std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                    return 1;
+                }
+                for (int64_t l = 0; l < g.n_layers; ++l) acc[(size_t) l] += per[(size_t) l];
+            }
+            double gdn = 0, qsa = 0, worst = 0;
+            int64_t ng = 0, nq = 0, worst_l = 0;
+            for (int64_t l = 0; l < g.n_layers; ++l) {
+                const double v = acc[(size_t) l] / reps;
+                if (strata::core::is_qsa_layer(g, l)) { qsa += v; ++nq; }
+                else { gdn += v; ++ng; }
+                if (v > worst) { worst = v; worst_l = l; }
+            }
+            std::printf("\n  the mixer by layer kind, averaged over %d runs\n", reps);
+            std::printf("  %-22s %9.3f ms/token  %8.3f ms/layer  (%lld layers)\n", "GDN layers",
+                        gdn, ng ? gdn / (double) ng : 0.0, (long long) ng);
+            std::printf("  %-22s %9.3f ms/token  %8.3f ms/layer  (%lld layers)\n", "QSA layers",
+                        qsa, nq ? qsa / (double) nq : 0.0, (long long) nq);
+            std::printf("  %-22s layer %lld at %.3f ms\n", "worst mixer layer", (long long) worst_l, worst);
+            std::printf("  %-22s %9.3f ms/token (must equal the mixer above)\n", "GDN + QSA", gdn + qsa);
+        }
+
+        // ================================ R0.11: THE FIVE STAGES SEPARATELY ================================
+        //
+        // Prefixes 1..5 are replayed per layer with the residual restored between them, and consecutive
+        // differences are the per-stage times.  **THE CHECK IS THAT THE FIVE SUM TO THE THREE-GRAPH TOTAL** -
+        // the same independent-restatement test that caught round 320's divide-by-reps bug, and it is the only
+        // reason to believe a table built out of differences.
+        {
+            std::vector<double> acc5(5, 0.0), per, s5;
+            for (int r = 0; r < reps; ++r) {
+                if (!strata::core::session_replay_stage_prefixes(g, 0, 0, ss, gr, main_cs, s5, per, err)) {
+                    std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                    return 1;
+                }
+                for (int k = 0; k < 5; ++k) acc5[(size_t) k] += s5[(size_t) k];
+            }
+            static const char* sn[5] = {"0 gr_read (attn)", "1 attention", "2 gr_write (attn)",
+                                        "3 gr_read (ffn)", "4 moe_route (router)"};
+            const char* kind[5] = {"GR", "ATTN", "GR", "GR", "ROUTER"};
+            double tot5 = 0, gr_ms = 0;
+            std::printf("\n  the five stages separately, by differencing prefixes\n");
+            std::printf("  %-24s %-8s %10s %10s %8s\n", "stage", "kind", "ms/token", "ms/layer", "share");
+            for (int k = 0; k < 5; ++k) {
+                const double v = acc5[(size_t) k] / reps;
+                tot5 += v;
+                if (k != 1 && k != 4) gr_ms += v;
+                std::printf("  %-24s %-8s %10.3f %10.4f %7.1f%%\n", sn[k], kind[k], v,
+                            v / (double) g.n_layers, 0.0);
+            }
+            for (int k = 0; k < 5; ++k) {
+                const double v = acc5[(size_t) k] / reps;
+                (void) v;
+            }
+            std::printf("  %-24s %-8s %10.3f\n", "sum of the five", "", tot5);
+            std::printf("  %-24s %-8s %10.3f   <- R3.3's target is <= 3 ms for all four passes\n",
+                        "GR passes (0,2,3)", "GR", gr_ms);
+            std::printf("\n  the three-graph total above was %.3f ms/token; the five must account for it.\n",
+                        tot / reps);
+
+            // ================================ R3.5c: THE SAME TABLE, A DIFFERENT WAY ================================
+            //
+            // The differencing table above mixes five graphs per layer, so stage 4's interval carries the launch
+            // of the FULL five-stage graph while stage 3's carries a four-stage one.  This sweep launches ONE
+            // graph type per layer and nothing else, so that bias cannot exist.  **If the two disagree, the
+            // difference IS the bias and this one is right** - and stage 4 is the router, so it is exactly the
+            // number that must not be wrong.
+            {
+                double sweep[6] = {0, 0, 0, 0, 0, 0};
+                for (int k = 1; k <= 5; ++k) {
+                    double acc = 0, one = 0;
+                    for (int r = 0; r < reps; ++r) {
+                        if (!strata::core::session_replay_stage_sweep(g, 0, 0, ss, gr, main_cs, k, one, err)) {
+                            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                            return 1;
+                        }
+                        acc += one;
+                    }
+                    sweep[k] = acc / reps;
+                }
+                std::printf("\n  the same five stages, by SWEEPING each prefix back to back (no graph switching)\n");
+                std::printf("  %-24s %10s %10s %12s\n", "stage", "prefix sweep", "difference", "bias");
+                static const char* sn2[5] = {"0 gr_read (attn)", "1 attention", "2 gr_write (attn)",
+                                             "3 gr_read (ffn)", "4 moe_route (router)"};
+                for (int k = 0; k < 5; ++k) {
+                    const double sw = sweep[k + 1] - sweep[k];
+                    const double df = acc5[(size_t) k] / reps;
+                    std::printf("  %-24s %10.3f %10.3f %11.1f%%\n", sn2[k], sw, df,
+                                sw != 0.0 ? 100.0 * (df / sw - 1.0) : 0.0);
+                }
+                std::printf("  %-24s %10.3f   (full pre, 48 layers)\n", "prefix 5 total", sweep[5]);
+            }
+        }
+        std::printf("\n  compare `--gpu-only-full`, which replays the same work as TWO graphs per layer.  The\n");
+        std::printf("  three sum slightly above it because each launch carries the driver's gap.\n");
+        strata::core::session_graphs_free(gr);
+        strata::core::doorbell_free(db);
+        sycl::free(d_next, dpct::get_in_order_queue());
+        return 0;
+    }
+
+    if (o.graph_only) {
+        strata::core::doorbell_reset(db);
+        // one warm pass so the first launch does not pay for page mapping
+        if (!strata::core::session_replay(g, 0, 0, ss, gr, main_cs, err)) {
+            std::fprintf(stderr, "strata generate: session_replay warm: %s\n", err.c_str());
+            return 1;
+        }
+        if (DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()) != 0) {
+            std::fprintf(stderr, "strata generate: session_replay warm faulted\n");
+            return 1;
+        }
+        const int reps = 20;
+        const Clock::time_point t0 = Clock::now();
+        for (int r = 0; r < reps; ++r) {
+            if (!strata::core::session_replay(g, 0, 0, ss, gr, main_cs, err)) {
+                std::fprintf(stderr, "strata generate: session_replay: %s\n", err.c_str());
+                return 1;
+            }
+        }
+        if (DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()) != 0) {
+            /*
+            DPCT1009:688: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1010:689: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            std::fprintf(stderr,
+                         "strata generate: session_replay faulted: %s\n",
+                         dpct::get_error_string_dummy(0));
+            return 1;
+        }
+        const double ms = std::chrono::duration<double, std::milli>(Clock::now() - t0).count() / (double) reps;
+        std::printf("pre graphs only   %8.2f ms per token over %lld layers  ->  %.2f tok/s of GPU work\n", ms,
+                    (long long) g.n_layers, ms > 0 ? 1000.0 / ms : 0.0);
+        std::printf("                  %8.3f ms per layer\n", ms / (double) g.n_layers);
+        return 0;
+    }
+
+    // ---- R0.3: THE TRUE PER-TOKEN GPU FLOOR.
+    //
+    // `--graph-only` above launches ONLY `gr.execs[l]`, the `pre` graphs.  It omits the 48 `post` graphs - the
+    // shared expert, the combine and the second `gr_write` - and the LM head.  Everything this project published
+    // as "39.8 ms pure GPU" came from that loop while being described as the whole GPU, which also made the
+    // "host's share = 49.4 - 39.8 = 9.6 ms" figure wrong by however much the missing work costs.  See
+    // Memory/ERRORS.md A4/A5.
+    //
+    // This flag is what "pure GPU" has to mean, and it replaces that number everywhere.  No pool runs, so
+    // `parts` keeps whatever the buffer holds and the timing is GPU work alone.
+    if (o.gpu_only_full) {
+        strata::core::doorbell_reset(db);
+        const int reps = 20;
+        double ms_layers = 0, ms_head = 0;
+        for (int r = -1; r < reps; ++r) {          // r == -1 is the warm pass, not counted
+            const Clock::time_point t0 = Clock::now();
+            if (!strata::core::session_replay_full(g, 0, 0, ss, gr, main_cs, err)) {
+                std::fprintf(stderr, "strata generate: session_replay_full: %s\n", err.c_str());
+                return 1;
+            }
+            // The sync is INSIDE the interval on purpose: it is the wait for the GPU, so t1 - t0 is GPU time.
+            if (DPCT_CHECK_ERROR(strata::q_of(main_cs)->wait()) != 0) {
+                std::fprintf(
+                    stderr,
+                    "strata generate: gpu-only-full layers faulted: %s\n",
+                    /*
+                    DPCT1009:690: SYCL reports errors using exceptions and does
+                    not use error codes. Please replace the
+                    "get_error_string_dummy(...)" with a real error-handling
+                    function.
+                    */
+                    /*
+                    DPCT1010:691: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
+                    */
+                    dpct::get_error_string_dummy(0));
+                return 1;
+            }
+            const Clock::time_point t1 = Clock::now();
+            if (!run_head(main_cs)) {
+                std::fprintf(stderr, "strata generate: gpu-only-full lm_head: %s\n", err.c_str());
+                return 1;
+            }
+            if (DPCT_CHECK_ERROR(strata::q_of(main_cs)->wait()) != 0) {
+                std::fprintf(
+                    stderr, "strata generate: gpu-only-full head faulted: %s\n",
+                    /*
+                    DPCT1009:692: SYCL reports errors using exceptions and does
+                    not use error codes. Please replace the
+                    "get_error_string_dummy(...)" with a real error-handling
+                    function.
+                    */
+                    /*
+                    DPCT1010:693: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
+                    */
+                    dpct::get_error_string_dummy(0));
+                return 1;
+            }
+            const Clock::time_point t2 = Clock::now();
+            if (r < 0) continue;
+            ms_layers += std::chrono::duration<double, std::milli>(t1 - t0).count();
+            ms_head += std::chrono::duration<double, std::milli>(t2 - t1).count();
+        }
+        ms_layers /= (double) reps;
+        ms_head /= (double) reps;
+        const double ms = ms_layers + ms_head;
+        std::printf("GPU floor pre+post+head %7.2f ms per token  ->  %.2f tok/s of GPU work\n", ms,
+                    ms > 0 ? 1000.0 / ms : 0.0);
+        std::printf("                  %8.3f ms layers (%lld x pre+post)\n", ms_layers, (long long) g.n_layers);
+        std::printf("                  %8.3f ms per layer\n", ms_layers / (double) g.n_layers);
+        std::printf("                  %8.3f ms LM head\n", ms_head);
+        return 0;
+    }
+
+    // ---- **THE TOKEN PATH ALLOCATES NOTHING (P2.T10, review finding H3).**
+    //
+    // `session_loop` used to allocate its pinned staging buffer, its probe event and its host pin ON EVERY
+    // TOKEN, and `cudaFreeHost` at the end of each call implicitly synchronises the device - so every token
+    // finished with a device-wide sync nobody asked for.  The scratch is created once here and reused; it also
+    // owns the host pin for the whole session rather than taking and releasing it per token.
+    strata::core::SessionLoopScratch loop_scratch;
+    struct ScratchFree {
+        strata::core::SessionLoopScratch* p;
+        ~ScratchFree() { if (p != nullptr) p->free(); }
+    } scratch_free{&loop_scratch};
+    // Initialised unconditionally, including under --no-pool: the loop validates the scratch it is handed, so
+    // passing a default-constructed one is an error rather than a fallback.  (It was, and the guard caught it -
+    // which is the point of the guard.)  One allocation at setup either way.
+    if (!loop_scratch.init((size_t) K * g.n_embd * 4, err)) {
+        std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+        return 1;
+    }
+    // Plan v0.3 P3: the whole token as ONE graph whenever nothing needs a host step between the ring and post[l]
+    // (the VRAM expert tier and the per-layer dumps do).  `--no-token-graph` keeps two graphs per layer.
+    strata::core::TokenGraph tgraph;
+    struct TokenGraphFree {
+        strata::core::TokenGraph* p;
+        ~TokenGraphFree() { strata::core::token_graph_free(*p); }
+    } tgraph_free{&tgraph};
+    // Plan v0.3 P4: with a PROFILE-filled cache the residency is static, so the hit decision moves onto the
+    // device and the token graph keeps it.  (A cache filled on demand still needs the per-layer host path.)
+    std::vector<int32_t> host_res;
+    int32_t* d_res = nullptr;
+    int32_t* d_hit_count = nullptr;
+    strata::core::TokenHits thits;
+    const bool graph_hits = hit_fn != nullptr && !profile.empty() && !o.no_pool;
+    if (graph_hits && !o.no_capture && !o.no_token_graph && layer_dump == nullptr && half_dump == nullptr) {
+        host_res.assign((size_t) (g.n_layers * g.n_expert), strata::core::kNotResident);
+        int64_t resident = 0;
+        for (int64_t l = 0; l < g.n_layers; ++l)
+            for (int64_t e = 0; e < g.n_expert; ++e) {
+                const int st = multi_gpu ? stage_of(l) : 0;
+                const int32_t slot = st > 0 ? stages[(size_t) st - 1]->cache.slot_of(l, e) : xcache.slot_of(l, e);
+                host_res[(size_t) (l * g.n_expert + e)] = slot;
+                if (slot != strata::core::kNotResident) ++resident;
+            }
+        if (DPCT_CHECK_ERROR(
+                d_res = sycl::malloc_device<int32_t>(
+                    host_res.size(), dpct::get_in_order_queue())) != 0 ||
+            DPCT_CHECK_ERROR(d_hit_count = sycl::malloc_device<int32_t>(
+                                 1, dpct::get_in_order_queue())) != 0 ||
+            /*
+            DPCT1114:694: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                d_res, host_res.data(), host_res.size() * sizeof(int32_t))) !=
+                0) {
+            std::fprintf(stderr, "strata generate: the device residency table could not be staged\n");
+            return 1;
+        }
+        thits.d_res = d_res;
+        thits.n_expert = g.n_expert;
+        for (auto& st : stages) {   // layer split across GPUs: the same table on every device
+            const strata::core::OnDevice on(st->dev);
+            if (DPCT_CHECK_ERROR(
+                    st->d_res = sycl::malloc_device<int32_t>(
+                        host_res.size(), dpct::get_in_order_queue())) != 0 ||
+                /*
+                DPCT1114:695: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                    st->d_res, host_res.data(),
+                    host_res.size() * sizeof(int32_t))) != 0) {
+                std::fprintf(stderr, "strata generate: layer split: CUDA%d residency table failed\n", st->dev);
+                return 1;
+            }
+        }
+        thits.cache_base = drive.d.cache_base;
+        thits.blob = drive.d.cache_blob;
+        thits.d_slot = drive.d.d_slot;
+        thits.d_dst = drive.d.d_dst;
+        thits.d_count = d_hit_count;
+        thits.x_q8 = drive.d.x_q8_0_hit;
+        thits.x_scale = drive.d.x_q8_0_hit_scale;
+        thits.scratch = drive.d.hit_scratch;
+        thits.hit_out = drive.d.hit_out;
+        drive.d.host_res = host_res.data();
+        std::fprintf(stderr, "strata generate: token graph hit path: %lld resident experts, decided on the device\n",
+                     (long long) resident);
+    }
+    if (!o.no_capture && !o.no_token_graph && layer_dump == nullptr && half_dump == nullptr &&
+        (hit_fn == nullptr || thits.on()) && !native_pack) {
+        if (!strata::core::session_capture_token(wt, g, ss, d_parts, loop_scratch.y_miss, loop_scratch.parts_bytes,
+                                                 tgraph, err, thits.on() ? &thits : nullptr)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: token graph captured (48 layers, one launch per token)\n");
+    }
+
+    // ================================ WHERE THE HOST TERM GOES, PER TOKEN ================================
+    //
+    // **`--gpu-only-full` MEASURES THE 48 LAYER GRAPHS AND THE LM HEAD AND NOTHING ELSE.**  It never enters
+    // this loop, so it does not run `ple_stage_token`, `embed_row`, the whole-vocabulary logits readback, the
+    // NaN scan or the sampler - and `--no-pool --stats` against that floor was being read as "the per-layer
+    // round trip costs 12.4 ms" when an unknown part of it is per TOKEN, not per layer.  That is the same error
+    // the review catalogued as A4/A5, one level down: a difference between two measurements attributed to a
+    // mechanism that neither of them isolates.
+    //
+    // Six accumulators, because the six have different fixes.  Reported in `--stats` as ms/token.  **The
+    // boundary after the layer loop is the one that matters**: without it the head's interval swallows all 48
+    // layers and the report reads as "head = 50 ms", which is not a thing that can happen to 1.4 ms of GPU
+    // work.  That is not hypothetical - it is what the first version of this printed.
+    double ms_ple = 0, ms_embed = 0, ms_layers = 0, ms_head = 0, ms_readback = 0, ms_sample = 0;
+    int64_t phase_tokens = 0;
+
+    // ================================ plan v0.3 P8: THE PERSISTENT ENGINE (--serve) ================================
+    //
+    // The weights, the expert arena and the VRAM tier load once; then requests arrive on stdin, one per line,
+    //
+    //     GEN <max_new> <id,id,...>
+    //
+    // and each generated token is written to stdout as `T <id>` as soon as its verify window is done, followed by
+    //
+    //     DONE <generated> <prompt_tokens> <prompt_ms> <decode_ms> <stop|length|cancel> <drafts accepted>
+    //          <drafts offered> <prompt tokens reused>
+    //
+    // Before that, `RESUME <n>` (n prompt tokens are not read again), `PP <position> <prompt_tokens> <ms> <tok/s>`
+    // after every prompt chunk, and `REUSED <n>` once the prompt is read.  (`ERR <message>` instead when a request
+    // cannot run; `STOP` ends the running request at its next step; `QUIT` ends the process.)  A request continues
+    // from the live session or the longest conversation checkpoint its prompt starts with (see ConvCheckpoint),
+    // otherwise from an empty sequence (`session_zero`); the rest of the prompt goes through the batched prompt path
+    // and its last token through the first verify window - the path all three model files share.  Decoding is greedy.
+    // The expert-cache slots (from the end of the cache) that hold the prompt path's buffers for a chunk, and the
+    // bytes from the first of them to the end.
+    // the share of expert bytes the arena could pin (sizes the prompt path's streamed ring and its lend cap)
+    if (srcp != nullptr && o.prefill_chunk > 0) {
+        uint64_t pinned = 0, total = 0;
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        for (int64_t l = 0; l < g.n_layers; ++l)
+            for (int64_t e = 0; e < g.n_expert; ++e) {
+                const uint64_t b = lay.blob_bytes(l);
+                total += b;
+                if (srcp->pinned(l, e)) pinned += b;
+            }
+        strata::prefill::Prefill::set_pinned_share(total ? (double) pinned / (double) total : 1.0);
+    }
+    auto lend_slots = [&](int64_t c) -> int64_t {
+        const uint64_t need = strata::prefill::Prefill::bytes_needed(g, ss, c);
+        const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+        int64_t k = (int64_t) ((need + (uint64_t) blob - 1) / (uint64_t) blob);
+        if (xcache.slot_offsets() != nullptr) {   // sized slots: take slots from the end until they hold `need`
+            k = 0;
+            while (k < xcache.slots() &&
+                   (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[xcache.slots() - k]) < need) ++k;
+        }
+        return k;
+    };
+    auto lend_bytes = [&](int32_t first) -> uint64_t {
+        return xcache.slot_offsets() ? (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[first])
+                                     : (uint64_t) (xcache.slots() - first) *
+                                           (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
+    };
+    // The prompt path's chunk and the slots it borrows for its buffers: the requested chunk halved until it fits,
+    // or with --prefill auto the largest of kAutoChunks whose buffers take at most kAutoLendPct % of the slots (a
+    // lent slot's expert is streamed during the prompt and refilled after it; measured on a 12 GB card, 32K Q2_0
+    // prompt: 4096 791 tok/s, 6144 878, 8192 973 with 69% of the slots lent).  A request lends only what its own
+    // prompt needs (Prefill::relayout), so a big chunk costs short prompts nothing.  0 = none fits.
+    auto plan_lend = [&](int64_t& chunk) -> int64_t {
+        static constexpr int64_t kAutoChunks[] = {8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
+        // at 8192-token chunks nearly every expert streams anyway, so a lent slot costs little: 90% when the
+        // copies are DMA from pinned RAM (Q2_0 8192 + a 384-slot ring: 1283 tok/s), 85% when host copies are the
+        // limit (lending more only streams more through them).  STRATA_PREFILL_LEND_PCT overrides (tuning).
+        const int64_t kAutoLendPct = [] {
+            const char* v = std::getenv("STRATA_PREFILL_LEND_PCT");
+            return v ? (int64_t) std::atoi(v)
+                     : (int64_t) (strata::prefill::Prefill::pinned_share() >= 0.9 ? 90 : 85);
+        }();
+        auto slots_for = lend_slots;
+        if (o.prefill_auto) {
+            for (const int64_t c : kAutoChunks) {
+                const int64_t k = slots_for(c);
+                if (k + 128 <= xcache.slots() && k * 100 <= kAutoLendPct * xcache.slots()) { chunk = c; return k; }
+            }
+            return 0;
+        }
+        for (int64_t c = chunk; c >= 256; c /= 2) {
+            const int64_t k = slots_for(c);
+            if (k + 128 <= xcache.slots()) { chunk = c; return k; }
+        }
+        return 0;
+    };
+    if (o.serve) {
+        if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||
+            (graph_hits && (thits.d_res == nullptr || host_res.empty()))) {
+            std::fprintf(stderr, "strata serve: needs --spec T, --mtp DIR and --prefill CHUNK (and a fillable "
+                                 "--expert-cache; the graphed hit path additionally needs --expert-profile P)\n");
+            return 2;
+        }
+        strata::prefill::Prefill sp;
+        void* borrow = nullptr;
+        uint64_t borrow_bytes = 0;
+        int32_t lend_first = -1;          // the first slot the prompt path may borrow (its largest chunk)
+        int32_t lend_first_now = -1;      // where its buffers are laid out now
+        // a cache too small to lend the prompt path its buffers would make it allocate them on top - on a card the
+        // cache already filled to its reserve, that is the over-subscription the auto sizing avoids - so the
+        // prompt chunk is halved until its buffers fit in the lendable slots (a smaller chunk only reads slower)
+        if (!o.no_prefill_borrow && d_res != nullptr) {
+            int64_t chunk = o.prefill_chunk;
+            if (const int64_t k = plan_lend(chunk); k > 0) {
+                if (o.prefill_auto)
+                    std::fprintf(stderr, "strata serve: prompt chunk auto: %lld tokens\n", (long long) chunk);
+                else if (chunk != o.prefill_chunk)
+                    std::fprintf(stderr, "strata serve: prompt chunk %lld -> %lld tokens so its buffers fit in the "
+                                         "expert cache\n", (long long) o.prefill_chunk, (long long) chunk);
+                o.prefill_chunk = chunk;
+                lend_first = (int32_t) (xcache.slots() - k);
+                lend_first_now = lend_first;
+                borrow = xcache.device_slot(lend_first);
+                borrow_bytes = xcache.slot_offsets()
+                                   ? (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[lend_first])
+                                   : (uint64_t) k * (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
+            } else if (o.prefill_auto) {
+                o.prefill_chunk = 1024;   // nothing lendable: small buffers of its own
+            }
+        } else if (o.prefill_auto && d_res == nullptr) {
+            o.prefill_chunk = 1024;       // #85: no expert cache at all (a full 8 GB card): small buffers of its own
+        }
+        if (borrow != nullptr)
+            std::fprintf(stderr, "strata serve: the prompt path borrows %lld cache slots (%.2f GiB)\n",
+                         (long long) (xcache.slots() - lend_first), (double) borrow_bytes / 1073741824.0);
+        else
+            std::fprintf(stderr, "strata serve: the prompt path allocates its own buffers (too few cache slots to borrow)\n");
+        // layer split across GPUs: a prompt path per stage, each handing its chunk's rows to the next
+        for (size_t i = 0; i < stages.size(); ++i) {
+            GpuStage& st = *stages[i];
+            st.sp.set_stage(st.lb, i + 1 < stages.size() ? st.le : -1, i + 1 < stages.size() ? &stages[i + 1]->sp : nullptr);
+            const strata::core::OnDevice on(st.dev);
+            if (!st.sp.init(st.wt, g, st.ss, srcp, &st.cache, host_res.data(), o.prefill_chunk, (void*) st.stream, err)) {
+                std::fprintf(stderr, "strata serve: layer split, CUDA%d prompt path: %s\n", st.dev, err.c_str());
+                return 1;
+            }
+        }
+        if (multi_gpu) sp.set_stage(0, split_at[0], &stages[0]->sp);
+        if (!sp.init(wt, g, ss, srcp, &xcache, host_res.data(), o.prefill_chunk, main_cs, err, borrow, borrow_bytes)) {
+            std::fprintf(stderr, "strata serve: %s\n", err.c_str());
+            if (err.find("fit") != std::string::npos)   // #85: say what frees VRAM
+                std::fprintf(stderr, "strata serve: the GPU has too little free VRAM for the prompt path: turn images "
+                                     "off (setup: --vision no), close other programs using the GPU, use a shorter "
+                                     "context, or read prompts in smaller chunks (--prefill 512)\n");
+            return 1;
+        }
+        mem_mark("the head and the prompt path");
+        // the penalty-history buffer: one row per verify-window row (`penalty_rows`), each the last
+        // `penalty_last_n` tokens that row's pick follows, -1 padded in front.  Allocated once at the cap for
+        // the widest window; a request without penalties gets a null buffer and takes the byte-for-byte
+        // neutral path (no upload, no buffer handed to the sampler).
+        constexpr int kPenaltyWindowCap = 4096;
+        constexpr size_t kHistSlots = (size_t) kPenaltyWindowCap * (size_t) strata::kernels::kVerifyMaxT;
+        int32_t* d_hist = nullptr;
+        std::vector<int32_t> hist_stage(kHistSlots, -1);
+        const int hist_dev = last_st ? last_st->dev : -1;   // with the head: the last stage's device
+        if (const strata::core::OnDevice on_h(hist_dev);
+            DPCT_CHECK_ERROR(d_hist = sycl::malloc_device<int32_t>(
+                                 kHistSlots, dpct::get_in_order_queue())) !=
+            0) {
+            std::fprintf(stderr, "strata serve: the penalty-history allocation failed\n");
+            return 1;
+        }
+        strata::core::Verifier ver;
+        strata::core::VerifyHits vh;
+        vh.d_res = thits.d_res;
+        vh.cache_base = thits.cache_base;
+        vh.blob = thits.blob;
+        vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers
+        vh.n_slots = xcache.slots();
+        // Layer split: `ver` runs layers [0, K1) and hands its residual to the next stage's verifier, and so on; the
+        // last runs the head.  The hand-offs are mapped pinned memory, portable: a stage on another GPU reads it.
+        // (--split-device 0: the second stage on this GPU, sharing its weights, session and cache - the A/B.)
+        strata::core::Verifier ver_same;
+        SplitDrive split_drive;
+        auto stage_ver = [&](int st) -> strata::core::Verifier& {
+            return st == 0 ? ver : split_same ? ver_same : stages[(size_t) st - 1]->ver;
+        };
+        auto pcie_num_of = [](double f) { return std::max(0, std::min(256, (int) (f * 256.0 + 0.5))); };
+        const int n_stages = split_devs.empty() ? 1 : (int) split_at.size() + 1;
+        if (n_stages > 1) {
+            const size_t hb = (size_t) strata::kernels::kVerifyMaxT *
+                              (size_t) strata::core::Verifier::handoff_floats(g) * sizeof(float);
+            std::vector<float*> hand((size_t) n_stages - 1, nullptr);
+            for (float*& h : hand) {
+                float* hh = nullptr;
+                /*
+                DPCT1048:4: The original value cudaHostAllocMapped is not
+                meaningful in the migrated code and was removed or replaced with
+                0. You may need to check the migrated code.
+                */
+                /*
+                DPCT1048:5: The original value cudaHostAllocPortable is not
+                meaningful in the migrated code and was removed or replaced with
+                0. You may need to check the migrated code.
+                */
+                if (DPCT_CHECK_ERROR(hh = (float *)sycl::malloc_host(
+                                         hb, dpct::get_in_order_queue())) !=
+                        0 ||
+                    DPCT_CHECK_ERROR(*(void **)&h = (float *)hh) != 0) {
+                    std::fprintf(stderr, "strata serve: the layer-split hand-off allocation failed\n");
+                    return 1;
+                }
+                std::memset(hh, 0, hb);
+            }
+            split_drive.base = &drive;
+            split_drive.n = n_stages;
+            for (int st = 0; st < n_stages; ++st) {
+                stage_ver(st).set_stage(st == 0 ? 0 : split_at[(size_t) st - 1], st + 1 < n_stages ? split_at[(size_t) st] : -1,
+                                        st == 0 ? nullptr : hand[(size_t) st - 1], st + 1 < n_stages ? hand[(size_t) st] : nullptr);
+                split_drive.end[st] = st + 1 < n_stages ? split_at[(size_t) st] : g.n_layers;
+                split_drive.cache_base[st] = drive.d.cache_base;
+                split_drive.cache_slot_off[st] = drive.d.cache_slot_off;
+                split_drive.pcie_num[st] = pcie_num_of(o.pcie_frac);
+            }
+            for (int st = 1; st < n_stages; ++st) {
+                bool ok_s = false;
+                if (split_same) {
+                    ok_s = ver_same.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err);
+                } else {
+                    GpuStage& gs = *stages[(size_t) st - 1];
+                    const strata::core::OnDevice on(gs.dev);
+                    strata::core::VerifyHits vs;
+                    vs.d_res = gs.d_res;
+                    vs.cache_base = gs.cache.device_slot(0);
+                    vs.blob = thits.blob;
+                    vs.slot_off = gs.cache.slot_offsets();
+                    vs.n_slots = gs.cache.slots();
+                    ok_s = gs.ver.init(gs.wt, g, gs.ss, vs, gs.head.loaded() ? &gs.head : nullptr, o.spec, err);
+                    split_drive.cache_base[st] = gs.cache.device_slot(0);
+                    split_drive.cache_slot_off[st] = gs.cache.slot_offsets();
+                    split_drive.pcie_num[st] = pcie_num_of(gs.pcie_frac);
+                }
+                if (!ok_s) {
+                    std::fprintf(stderr, "strata serve: layer split, stage %d: %s\n", st + 1, err.c_str());
+                    return 1;
+                }
+            }
+            for (int st = 0; st + 1 < n_stages; ++st) stage_ver(st).set_next(&stage_ver(st + 1), &split_drive);
+            std::string plan_s = "0-" + std::to_string(split_at[0] - 1) + " (CUDA0)";
+            for (int st = 1; st < n_stages; ++st)
+                plan_s += ", " + std::to_string(split_at[(size_t) st - 1]) + "-" + std::to_string(split_drive.end[st] - 1) +
+                          " (CUDA" + std::to_string(split_same ? 0 : stages[(size_t) st - 1]->dev) + ")";
+            std::fprintf(stderr, "strata serve: layer split: layers %s, one hand-off per window\n", plan_s.c_str());
+        }
+        if (!ver.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err) ||
+            !mtp.bind(last_st ? last_st->wt : wt, last_st ? &last_st->head : &native_head, ver.final_R_all(), err)) {
+            std::fprintf(stderr, "strata serve: %s\n", err.c_str());
+            return 1;
+        }
+        for (int st = 0; st < n_stages && n_stages > 1; ++st) {
+            split_drive.plan[st] = stage_ver(st).plan_sink();
+            if (st > 0) {
+                stage_ver(st).set_split(o.spec_split);
+                stage_ver(st).set_pcie_mode(o.pcie_mode == "dma" ? 0 : o.pcie_mode == "direct" ? 1 : 2);
+            }
+        }
+        // the pool the verify windows call: with a layer split, the wrapper that routes each layer to its stage
+        const strata::core::PoolMultiFn win_pool_fn = n_stages > 1 ? &drive_pool_split : &drive_pool_multi;
+        void* const win_pool_user = n_stages > 1 ? (void*) &split_drive : (void*) &drive;
+        mem_mark("the verifier and the drafter's binding");
+        ver.set_split(o.spec_split);
+        // auto: the copy kernel for every pack.  DMA (the native packs' default until 0.1.13) has the host call
+        // cudaMemcpyAsync + cudaLaunchHostFunc inside a verify window while the GPU spins on the flag they raise;
+        // issue #31's thread dumps show the host stuck in that cudaMemcpyAsync on a driver lock for good.  The copy
+        // kernel needs no host CUDA call there, and costs ~1-3% decode on IQ3_S (45.3 -> 44.8 tok/s, 8 requests).
+        ver.set_pcie_mode(o.pcie_mode == "dma" ? 0 : o.pcie_mode == "direct" ? 1 : 2);
+        std::vector<int64_t> cur;
+        // ---- the conversation cache (see ConvCheckpoint).  `live` is what the session holds right now: the tokens
+        // it has consumed, so a request that starts with exactly them continues without any copy.  `checks` are the
+        // saved points; every one of them is a prefix of `live` (the loop drops the rest), so they form a chain -
+        // the radix cache's tree collapsed onto the one branch of history whose cells the session holds.  The
+        // chain's root is the deepest point every request so far shared (the end of the system prompt, in
+        // practice); the retention policy pins it and rotates the rest LRU (conv_cache.hpp), so a NEW chat that
+        // shares that prefix mounts through it instead of reading it again.
+        std::vector<int32_t> live;
+        std::vector<ImgKey> live_imgs, req_imgs;
+        bool live_ok = false;
+        std::vector<ConvCheckpoint> checks;
+        uint64_t check_clock = 0;   // the checkpoints' LRU clock; creation and every use advance it
+        bool cvec_cached = true;   // the control vector's state the live session and the checkpoints were read with
+        int64_t pp_total = 0, pp_from = 0, pp_next_check = 0;
+        Clock::time_point pp_t0 = Clock::now();
+        auto imgs_below = [&](const std::vector<ImgKey>& all, int64_t L) {
+            std::vector<ImgKey> v;
+            for (const ImgKey& k : all) if (k.start < L) v.push_back(k);
+            return v;
+        };
+        // a checkpoint of the state after `cur[0, L)`; false only when the copy itself failed
+        // A layer split's mid-prompt checkpoints: when the last stage reports a chunk, the earlier ones already read
+        // the next, so each stage saves its own part when IT reaches a checkpoint position (the same rule as below:
+        // every `prompt_cache_every` tokens from where the request resumed), and the last stage puts them together.
+        std::mutex part_mu;
+        std::map<int64_t, std::vector<ConvCheckpoint>> part_at;   // position -> one part per stage
+        std::vector<int64_t> part_next(stages.size() + 1, INT64_MAX);
+        // a checkpoint of the state after `cur[0, L)`; false only when the copy itself failed.  `parts`: the stages'
+        // states saved at L (a split's mid-prompt checkpoint); without, they are read now (everything is at L)
+        auto checkpoint_at = [&](int64_t L, std::vector<ConvCheckpoint> *parts =
+                                                nullptr) -> bool {
+            try {
+        if (o.prompt_cache <= 0 || L < 1) return true;
+            for (ConvCheckpoint& c : checks)
+                if ((int64_t) c.ids.size() == L) { c.used = ++check_clock; return true; }
+            ConvCheckpoint c;
+            c.ids.assign(cur.begin(), cur.begin() + L);
+            c.imgs = imgs_below(req_imgs, L);
+            if (parts != nullptr) {
+                if (parts->size() != stages.size() + 1) return false;
+                c.gdn = std::move((*parts)[0].gdn);
+                c.ple = std::move((*parts)[0].ple);
+                c.tails = std::move((*parts)[0].tails);
+                for (size_t i = 1; i < parts->size(); ++i) c.stage_parts.push_back(std::move((*parts)[i]));
+            } else {
+                if (DPCT_CHECK_ERROR(
+                        dpct::get_current_device().queues_wait_and_throw()) !=
+                        0 ||
+                    !checkpoint_save(c, ss, g)) return false;
+                for (auto& st : stages) {   // a layer split's later stages: their sessions' part
+                    const strata::core::OnDevice on(st->dev);
+                    ConvCheckpoint part;
+                    if (DPCT_CHECK_ERROR(dpct::get_current_device()
+                                             .queues_wait_and_throw()) != 0 ||
+                        !checkpoint_save(part, st->ss, g)) return false;
+                    c.stage_parts.push_back(std::move(part));
+                }
+            }
+            c.used = ++check_clock;
+            checks.push_back(std::move(c));
+            while ((int) checks.size() > o.prompt_cache) {
+                std::vector<uint64_t> stamps;
+                stamps.reserve(checks.size());
+                for (const ConvCheckpoint& k : checks) stamps.push_back(k.used);
+                const size_t victim = strata::program::conv_cache::eviction_victim(stamps.data(), stamps.size(),
+                                                                                   o.prompt_cache);
+                checks.erase(checks.begin() + (std::ptrdiff_t) victim);
+            }
+            return true;
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        sp.on_chunk = [&](const float* R_rows, int64_t T, int64_t p0, std::string& e) -> bool {
+            std::vector<int32_t> nxt((size_t) T);
+            for (int64_t t = 0; t < T; ++t) nxt[(size_t) t] = (int32_t) cur[(size_t) (p0 + t + 1)];
+            if (!mtp.prefill(R_rows, nxt.data(), T, p0, e)) return false;
+            // progress for the server window: PP <position reached> <prompt tokens> <ms> <fresh tokens/s>
+            const int64_t done = p0 + T;
+            const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
+            std::printf("PP %lld %lld %.0f %.1f\n", (long long) done, (long long) pp_total, ms,
+                        ms > 0.0 ? 1000.0 * (double) (done - pp_from) / ms : 0.0);
+            strata::core::progress_at("reading the prompt (batched), done up to token", done);
+            strata::core::progress_beat();
+            std::fflush(stdout);
+            if (o.prompt_cache_every > 0 && done >= pp_next_check) {
+                bool saved = false;
+                if (multi_gpu) {   // the stages' parts, saved when each of them read this chunk
+                    std::vector<ConvCheckpoint> parts;
+                    {
+                        std::lock_guard<std::mutex> lk(part_mu);
+                        auto it = part_at.find(done);
+                        if (it != part_at.end()) parts = std::move(it->second);
+                        part_at.erase(part_at.begin(), part_at.upper_bound(done));
+                    }
+                    bool complete = parts.size() == stages.size() + 1;
+                    for (const ConvCheckpoint& k : parts) complete = complete && !k.gdn.empty();
+                    saved = !complete || checkpoint_at(done, &parts);   // an incomplete set: no checkpoint here
+                } else {
+                    saved = checkpoint_at(done);
+                }
+                if (!saved) { e = "saving a conversation checkpoint failed"; return false; }
+                pp_next_check = done + o.prompt_cache_every;
+            }
+            return true;
+        };
+        if (multi_gpu) {   // the batched prompt is reported by its last stage (the drafter's rows are there)
+            stages.back()->sp.on_chunk = std::move(sp.on_chunk);
+            sp.on_chunk = nullptr;
+            for (size_t i = 0; i <= stages.size(); ++i) {
+                strata::prefill::Prefill& stage_sp = i == 0 ? sp : stages[i - 1]->sp;
+                strata::core::SessionState& stage_ss = i == 0 ? ss : stages[i - 1]->ss;
+                stage_sp.on_stage_chunk = [&, i](int64_t done, std::string& e) -> bool {
+                    if (o.prompt_cache <= 0 || o.prompt_cache_every <= 0 || done < part_next[i]) return true;
+                    part_next[i] = done + o.prompt_cache_every;
+                    ConvCheckpoint part;   // this stage's state at `done` (its stream is synchronized)
+                    if (!checkpoint_save(part, stage_ss, g)) { e = "saving a checkpoint part failed"; return false; }
+                    std::lock_guard<std::mutex> lk(part_mu);
+                    auto& v = part_at[done];
+                    v.resize(stages.size() + 1);
+                    v[i] = std::move(part);
+                    return true;
+                };
+            }
+        }
+        drive.d.plan = ver.plan_sink();
+        drive.d.pcie_num = std::max(0, std::min(256, (int) (o.pcie_frac * 256.0 + 0.5)));
+        if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
+        dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
+        /*
+        DPCT1025:696: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        if (DPCT_CHECK_ERROR(
+                adapt_stream = dpct::get_current_device().create_queue(true)) !=
+            0) {
+            std::fprintf(stderr, "strata serve: cannot create the refill stream\n");
+            return 1;
+        }
+        // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
+        std::vector<std::pair<int32_t, int32_t>> pending;
+        dpct::event_ptr adapt_ev = nullptr;
+        adapt_ev = new sycl::event();
+        // a layer split's later stages keep a copy of the residency table on their devices, and swap on their own
+        auto res_upload = [&]() {
+            try {
+        if (d_res != nullptr)
+                /*
+                DPCT1114:697: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
+                */
+                dpct::get_in_order_queue().memcpy(
+                    d_res, host_res.data(), host_res.size() * sizeof(int32_t));
+            for (auto& st : stages) {
+                const strata::core::OnDevice on(st->dev);
+                dpct::get_in_order_queue()
+                    .memcpy(st->d_res, host_res.data(),
+                            host_res.size() * sizeof(int32_t))
+                    .wait();
+            }
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        auto apply_pending = [&](bool wait) {
+            try {
+        if (pending.empty()) return;
+            if (wait) adapt_ev->wait_and_throw();
+            else if (adapt_ev->get_info<
+                         sycl::info::event::command_execution_status>() !=
+                     sycl::info::event_command_status::complete) return;
+            for (auto& st : stages)
+                if (st->adapt_live) {
+                    if (wait) st->adapt_ev->wait_and_throw();
+                    else if ((st->adapt_ev)
+                                 ->get_info<sycl::info::event::
+                                                command_execution_status>() !=
+                             sycl::info::event_command_status::complete) return;
+                }
+            for (auto& st : stages) st->adapt_live = false;
+            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            pending.clear();
+            res_upload();
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        // the VRAM tier follows the conversation (the same rule as the speculative loop below)
+        auto adapt = [&]() -> bool {
+            if (!pending.empty()) return true;   // the previous swaps are still in flight
+            struct Swap { float gain; int32_t layer, in, out; };
+            std::vector<Swap> swaps;
+            std::vector<std::pair<float, int32_t>> cand, vict;
+            for (int64_t l = 0; l < g.n_layers; ++l) {
+                cand.clear();
+                vict.clear();
+                const float* u = drive.d.usage.data() + l * g.n_expert;
+                const int32_t* r = host_res.data() + l * g.n_expert;
+                for (int32_t e = 0; e < (int32_t) g.n_expert; ++e) {
+                    if (r[e] < 0) { if (u[e] >= 2.0f) cand.emplace_back(u[e], e); }
+                    else vict.emplace_back(u[e], e);
+                }
+                if (cand.empty() || vict.empty()) continue;
+                std::sort(cand.begin(), cand.end(), [](auto& a, auto& b) { return a.first > b.first; });
+                const size_t nc = std::min(cand.size(), vict.size());
+                std::partial_sort(vict.begin(), vict.begin() + (ptrdiff_t) nc, vict.end(),
+                                  [](auto& a, auto& b) { return a.first < b.first; });
+                for (size_t i = 0; i < nc; ++i) {
+                    if (cand[i].first < vict[i].first + 1.5f) break;
+                    swaps.push_back({cand[i].first - vict[i].first, (int32_t) l, cand[i].second, vict[i].second});
+                }
+            }
+            std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
+            if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
+            bool main_live = false;
+            for (const Swap& s : swaps) {
+                const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
+                const int32_t slot = host_res[out];
+                const uint8_t* b = srcp->blob(s.layer, s.in);
+                const int stn = multi_gpu ? stage_of(s.layer) : 0;   // the swap stays in the layer's own cache
+                GpuStage* gs = stn > 0 ? stages[(size_t) stn - 1].get() : nullptr;
+                const strata::core::OnDevice on(gs ? gs->dev : -1);
+                if (slot < 0 || b == nullptr ||
+                    /*
+                    DPCT1124:698: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    DPCT_CHECK_ERROR(
+                        (gs ? gs->adapt_stream : adapt_stream)->memcpy(
+                                 gs ? gs->cache.device_slot(slot)
+                                    : xcache.device_slot(slot),
+                                 b,
+                                 (size_t)strata::kernels::cpu::expert_layout()
+                                     .blob_bytes(s.layer))) != 0)
+                    return false;
+                if (gs) gs->adapt_live = true;
+                else main_live = true;
+                host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
+            }
+            if (!swaps.empty()) dpct::sync_barrier(adapt_ev, adapt_stream);
+            (void) main_live;
+            for (auto& st : stages)
+                if (st->adapt_live) {
+                    const strata::core::OnDevice on(st->dev);
+                    dpct::sync_barrier(st->adapt_ev, st->adapt_stream);
+                }
+            for (float& v : drive.d.usage) v *= 0.7f;
+            return true;
+        };
+        // stdin is read on its own thread, so a STOP line reaches a request that is still running (the client went
+        // away, or pressed Esc): the flag is checked between prompt chunks and between verify windows.
+        std::atomic<bool> stop_req{false};
+        std::mutex in_mu;
+        std::condition_variable in_cv;
+        std::deque<std::string> in_lines;
+        bool in_eof = false;
+        std::thread([&] {
+            // read(2) on the descriptor, not std::cin: glibc's exit() flushes every stdio stream and waits for
+            // stdin's lock, which getline holds while it waits for input - an engine ending on an error (every
+            // std::exit) would hang in exit() on Linux, and the server would wait for it forever
+            std::string l, buf;
+            char chunk[4096];
+            auto getline_fd = [&](std::string& out) -> bool {
+                for (;;) {
+                    const size_t nlpos = buf.find('\n');
+                    if (nlpos != std::string::npos) {
+                        out.assign(buf, 0, nlpos);
+                        buf.erase(0, nlpos + 1);
+                        return true;
+                    }
+#if defined(_WIN32)
+                    const int n = _read(0, chunk, (unsigned) sizeof chunk);
+#else
+                    const ssize_t n = ::read(0, chunk, sizeof chunk);
+                    if (n < 0 && errno == EINTR) continue;
+#endif
+                    if (n <= 0) {
+                        if (buf.empty()) return false;
+                        out.swap(buf);
+                        buf.clear();
+                        return true;
+                    }
+                    buf.append(chunk, (size_t) n);
+                }
+            };
+            while (getline_fd(l)) {
+                if (!l.empty() && l.back() == '\r') l.pop_back();
+                if (l == "STOP") { stop_req.store(true); continue; }
+                std::lock_guard<std::mutex> lk(in_mu);
+                in_lines.push_back(l);
+                in_cv.notify_one();
+            }
+            std::lock_guard<std::mutex> lk(in_mu);
+            in_eof = true;
+            in_cv.notify_one();
+        }).detach();
+        auto next_line = [&](std::string& out) -> bool {
+            std::unique_lock<std::mutex> lk(in_mu);
+            in_cv.wait(lk, [&] { return !in_lines.empty() || in_eof; });
+            if (in_lines.empty()) return false;
+            out = std::move(in_lines.front());
+            in_lines.pop_front();
+            return true;
+        };
+        sp.should_stop = [&] { return stop_req.load(); };
+        // STRATA_TRACE=1: one stderr line per step of a request (the log shows where a request stops)
+        const bool trace = std::getenv("STRATA_TRACE") != nullptr;
+        auto tr = [&](const char* what, long long a = -1, long long b = -1) {
+            if (!trace) return;
+            std::fprintf(stderr, "strata trace: %s %lld %lld\n", what, a, b);
+            std::fflush(stderr);
+        };
+        {
+            // what is left once everything is allocated: under WDDM a GPU filled to the brim does not fail, it pages -
+            // and a page-in while the verify graph spins on a host flag stalls the request for good
+            size_t free_b = 0, total_b = 0;
+            /*
+            DPCT1106:699: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            // below ~256 MiB a later allocation (a first-used window's buffers, the desktop, another program) can make
+            // the driver page GPU memory, and a verify graph spinning on a host flag then never finishes
+            const int64_t free_mib = (int64_t) (free_b >> 20);
+            if (free_mib >= 256) {
+                std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded\n", (long long) free_mib);
+            } else {
+                std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded - LOW: requests may stall;"
+                                     " add --vram-reserve-mib %lld to the config's args (or lower --max-context)\n",
+                             (long long) free_mib, (long long) (o.vram_reserve_mib + 512 - free_mib));
+            }
+        }
+        // what the server's Monitor tab shows (servers before 0.1.8 skip unknown lines until READY)
+        {
+            size_t free_b = 0, total_b = 0;
+            /*
+            DPCT1106:700: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            std::printf("INFO context=%lld kv=%s kv_resident=%lld expert_slots=%lld expert_cache_mib=%lld spec=%d "
+                        "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
+                        "spec_min_p=%.2f engine=" STRATA_VERSION "\n",
+                        (long long) o.max_context, o.kv.c_str(),
+                        (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1
+                                         ? ss.qsa_states[0].n_slots * 4 : 0),
+                        (long long) xcache.slots(), (long long) (xcache.bytes() >> 20), o.spec, o.mtp_max_t,
+                        o.suffix_draft, (long long) (free_b >> 20), cvec_summary.c_str(),
+                        (long long) (strata::kernels::cpu::expert_layout().total >> 20), pool.workers(), o.pcie_frac,
+                        o.spec_min_p);
+        }
+        // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
+        // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
+        // GPU spinning forever.  STRATA_WATCHDOG_S=0 turns it off.  Issue #31: before it does, it reports what every
+        // part was doing (stall_report), so one occurrence says where the wait is.
+        {
+            const char* ws = std::getenv("STRATA_WATCHDOG_S");
+            const int limit = ws ? std::atoi(ws) : 60;   // one step (a prompt layer, a verify window) takes seconds
+            if (limit > 0)
+                std::thread([limit] {
+                    strata::core::Progress& p = strata::core::progress();
+                    uint64_t last = p.beats.load(), ticks_at = p.ticks.load();
+                    auto since = std::chrono::steady_clock::now();
+                    for (;;) {
+                        std::this_thread::sleep_for(std::chrono::seconds(1));
+                        const auto now = std::chrono::steady_clock::now();
+                        const uint64_t b = p.beats.load();
+                        if (!p.busy.load() || b != last) { last = b; ticks_at = p.ticks.load(); since = now; continue; }
+                        if (now - since < std::chrono::seconds(limit)) continue;
+                        std::fprintf(stderr, "strata serve: no progress for %d s during a request (%s %lld) - stopping "
+                                             "the engine so the server starts it again (issue #29)\n",
+                                     limit, p.where.load(), (long long) p.detail.load());
+                        stall_report(stderr, p.ticks.load() - ticks_at);
+                        std::fflush(stderr);
+                        std::abort();
+                    }
+                }).detach();
+        }
+        std::printf("READY %lld stop\n", (long long) o.max_context);   // "stop": this engine honours STOP
+        std::fflush(stdout);
+        std::string line;
+        int64_t rounds = 0;
+        const int S = o.spec;
+        const int S_mtp = o.mtp_max_t > 0 ? std::min(o.mtp_max_t, S) : S;   // the MTP's windows; suffixes go up to S
+        if (S_mtp < S) mtp.set_max_drafts(S_mtp - 1);
+        strata::spec::SuffixDrafter sfx(std::max(1, o.suffix_draft), 64, (size_t) o.max_context + 4096);
+        strata::spec::DraftPolicy policy(S);   // MTP or lookup window, learned over the whole process
+        // The vision path (--vision): GENI <max_new> <embeddings file> <id,id,...> carries images.  The file is one
+        // or more strata-vision records (int32 'SVE1', n, nx, ny, n_embd, then n x n_embd floats) in prompt order;
+        // each image's rows go to its run of <|image_pad|> tokens, whose M-RoPE positions are mtmd's: t = p,
+        // h = p + y, w = p + x, and the text after the image continues at p + max(nx, ny).
+        constexpr int64_t kImagePad = 248056;   // qwen4exp.ple.image_token_id: the PLE hash reads it for image cells
+        bool mrope_identity = true;
+        std::vector<float> img_rows;
+        std::vector<const float*> row_ptr;
+        while (next_line(line)) {
+            if (line == "QUIT") break;
+            // the watchdog watches a request from here until this iteration ends, whichever way it ends
+            struct BusyScope {
+                BusyScope() { strata::core::progress().busy.store(true); strata::core::progress_at("request"); }
+                ~BusyScope() { strata::core::progress().busy.store(false); strata::core::progress_at("idle"); }
+            } busy_scope;
+            stop_req.store(false);   // a STOP that arrived between requests is stale
+            const bool geni = line.rfind("GENI ", 0) == 0;
+            if (!geni && line.rfind("GEN ", 0) != 0) {
+                std::printf("ERR expected: GEN <max_new> <id,id,...> or GENI <max_new> <file> <id,id,...>\n");
+                continue;
+            }
+            char* endp = nullptr;
+            const long long max_new = std::strtoll(line.c_str() + (geni ? 5 : 4), &endp, 10);
+            // optional sampling keys between max_new and the ids: temperature=F, top_p=F, top_k=N, min_p=F,
+            // penalty_last_n=N, penalty_repeat=F, penalty_freq=F, penalty_present=F, seed=N (text requests
+            // only).  Absent keys keep today's behavior: greedy, no penalties.
+            float req_temperature = 0.0f, req_top_p = 1.0f;
+            int req_top_k = 20;   // the sampler's own default; the sampled path REQUIRES top_k in 1..64
+            unsigned long long req_seed = 0;
+            float req_min_p = 0.0f, req_penalty_repeat = 1.0f, req_penalty_freq = 0.0f, req_penalty_present = 0.0f;
+            int req_penalty_last_n = 0;
+            int req_cvec = 1;   // cvec=0|1: a loaded control vector for this request (on when absent)
+            // tuning keys (setup's calibration measures settings without restarting the engine): the PCIe share of
+            // the missed experts and the draft-probability floor, for this request only
+            double req_pcie_frac = o.pcie_frac, req_spec_min_p = o.spec_min_p;
+            if (endp != nullptr) {   // GENI takes the same keys (#75: image requests were always greedy); its
+                                     // embedding file path is the first token without an =
+                for (;;) {
+                    while (*endp == ' ') ++endp;
+                    const char* start = endp;
+                    while (*endp != '\0' && *endp != ' ') ++endp;
+                    if (endp == start) break;
+                    const std::string tok(start, (size_t) (endp - start));
+                    const size_t eq = tok.find('=');
+                    if (eq == std::string::npos) { endp = const_cast<char*>(start); break; }
+                    const std::string key = tok.substr(0, eq);
+                    const float fv = std::strtof(tok.c_str() + eq + 1, nullptr);
+                    if (key == "cvec") req_cvec = std::atoi(tok.c_str() + eq + 1);
+                    else if (key == "temperature") req_temperature = fv;
+                    else if (key == "top_p") req_top_p = fv;
+                    else if (key == "top_k") req_top_k = std::atoi(tok.c_str() + eq + 1);
+                    else if (key == "min_p") req_min_p = fv;
+                    else if (key == "penalty_last_n") req_penalty_last_n = std::atoi(tok.c_str() + eq + 1);
+                    else if (key == "penalty_repeat") req_penalty_repeat = fv;
+                    else if (key == "penalty_freq") req_penalty_freq = fv;
+                    else if (key == "penalty_present") req_penalty_present = fv;
+                    else if (key == "seed") req_seed = std::strtoull(tok.c_str() + eq + 1, nullptr, 10);
+                    else if (key == "pcie_frac") req_pcie_frac = std::clamp((double) fv, 0.0, 1.0);
+                    else if (key == "spec_min_p") req_spec_min_p = std::clamp((double) fv, 0.0, 1.0);
+                    // unknown keys are skipped: the ids start at the first token without '='
+                }
+            }
+            std::string emb_path;
+            if (geni && endp != nullptr) {
+                while (*endp == ' ') ++endp;
+                char* gap = std::strchr(endp, ' ');
+                if (gap != nullptr) { emb_path.assign(endp, (size_t) (gap - endp)); endp = gap; }
+            }
+            std::vector<int64_t> ids;
+            std::string pe;
+            if (max_new < 1 || endp == nullptr || (geni && emb_path.empty()) || !parse_i64_list(endp, ids, pe)) {
+                std::printf("ERR bad request: %s\n", pe.empty() ? "max_new" : pe.c_str());
+                continue;
+            }
+            const int64_t n = (int64_t) ids.size();
+            req_imgs.clear();
+            if (geni && !o.vision) { std::printf("ERR this engine was started without --vision\n"); continue; }
+            if (geni || !mrope_identity) {
+                // positions for every cell this request can reach; the identity again for a text request
+                std::string ve;
+                row_ptr.assign((size_t) n, nullptr);
+                const int64_t cells = (int64_t) mrope_host.size() / 3;
+                auto put = [&](int64_t c, int64_t t, int64_t h, int64_t w) {
+                    mrope_host[(size_t) c * 3] = (int32_t) t;
+                    mrope_host[(size_t) c * 3 + 1] = (int32_t) h;
+                    mrope_host[(size_t) c * 3 + 2] = (int32_t) w;
+                };
+                if (!geni) {
+                    for (int64_t c = 0; c < cells; ++c) put(c, c, c, c);
+                } else {
+                    struct Img { int64_t n, nx, ny; size_t off; };
+                    std::vector<Img> imgs;
+                    img_rows.clear();
+                    std::FILE* f = std::fopen(emb_path.c_str(), "rb");
+                    if (!f) ve = "cannot open " + emb_path;
+                    while (f && ve.empty()) {
+                        int32_t hdr[5];
+                        const size_t got = std::fread(hdr, sizeof(int32_t), 5, f);
+                        if (got == 0) break;
+                        if (got != 5 || hdr[0] != 0x31455653 || hdr[1] < 1 || hdr[2] < 1 || hdr[3] < 1 ||
+                            (int64_t) hdr[2] * hdr[3] != hdr[1] || hdr[4] != (int32_t) g.n_embd) {
+                            ve = "bad embeddings file (expected strata-vision records of width " +
+                                 std::to_string((long long) g.n_embd) + ")";
+                            break;
+                        }
+                        const size_t off = img_rows.size(), cnt = (size_t) hdr[1] * (size_t) hdr[4];
+                        img_rows.resize(off + cnt);
+                        if (std::fread(img_rows.data() + off, sizeof(float), cnt, f) != cnt) { ve = "short embeddings file"; break; }
+                        imgs.push_back({hdr[1], hdr[2], hdr[3], off});
+                    }
+                    if (f) std::fclose(f);
+                    int64_t p = 0, i = 0;
+                    size_t k = 0;
+                    while (ve.empty() && i < n) {
+                        if (ids[(size_t) i] != kImagePad) { put(i, p, p, p); ++p; ++i; continue; }
+                        if (k >= imgs.size()) { ve = "the prompt has more images than the embeddings file"; break; }
+                        const Img& im = imgs[k++];
+                        {   // what the conversation cache compares: a picture is its grid and its embeddings
+                            const int64_t grid[3] = {im.n, im.nx, im.ny};
+                            uint64_t h = fnv1a(grid, sizeof grid);
+                            h = fnv1a(img_rows.data() + im.off, (size_t) im.n * (size_t) g.n_embd * sizeof(float), h);
+                            req_imgs.push_back({i, h});
+                        }
+                        for (int64_t j = 0; j < im.n && ve.empty(); ++j)
+                            if (i + j >= n || ids[(size_t) (i + j)] != kImagePad)
+                                ve = "image " + std::to_string(k) + " has " + std::to_string((long long) im.n) +
+                                     " rows but fewer <|image_pad|> tokens";
+                        for (int64_t j = 0; j < im.n && ve.empty(); ++j) {
+                            const int64_t y = j / im.nx, x = j % im.nx;
+                            put(i + j, p, p + y, p + x);
+                            row_ptr[(size_t) (i + j)] = img_rows.data() + im.off + (size_t) j * (size_t) g.n_embd;
+                        }
+                        i += im.n;
+                        p += std::max(im.nx, im.ny);
+                    }
+                    if (ve.empty() && k != imgs.size()) ve = "the embeddings file has more images than the prompt";
+                    if (ve.empty() && n > 0 && ids[(size_t) (n - 1)] == kImagePad) ve = "the prompt cannot end in an image";
+                    for (int64_t c = n; ve.empty() && c < cells; ++c) put(c, p + (c - n), p + (c - n), p + (c - n));
+                }
+                tr("positions built", (long long) img_rows.size());
+                dpct::get_current_device().queues_wait_and_throw();
+                tr("device idle");
+                // CUDA0's table and, with a layer split, every later stage's (each device reads its own)
+                auto upload_mrope = [&]() -> bool {
+                    try {
+                bool ok = DPCT_CHECK_ERROR(
+                              dpct::get_in_order_queue()
+                                  .memcpy(d_mrope, mrope_host.data(),
+                                          mrope_host.size() * sizeof(int32_t))
+                                  .wait()) == 0;
+                    for (auto& st : stages) {
+                        const strata::core::OnDevice on(st->dev);
+                        dpct::get_current_device().queues_wait_and_throw();
+                        ok =
+                            ok &&
+                            DPCT_CHECK_ERROR(
+                                dpct::get_in_order_queue()
+                                    .memcpy(st->mrope, mrope_host.data(),
+                                            mrope_host.size() * sizeof(int32_t))
+                                    .wait()) == 0;
+                    }
+                    return ok;
+                }
+                catch (sycl::exception const &exc) {
+                  std::cerr << exc.what()
+                            << "Exception caught at file:" << __FILE__
+                            << ", line:" << __LINE__ << std::endl;
+                  std::exit(1);
+                }
+                };
+                if (ve.empty() && !upload_mrope()) ve = "the image position upload failed";
+                if (!ve.empty()) {
+                    // leave the table as the identity so the next text request is untouched
+                    for (int64_t c = 0; c < cells; ++c) put(c, c, c, c);
+                    upload_mrope();
+                    mrope_identity = true;
+                    std::printf("ERR %s\n", ve.c_str());
+                    std::fflush(stdout);
+                    continue;
+                }
+                mrope_identity = !geni;
+            }
+            sp.embd_rows = geni ? row_ptr.data() : nullptr;
+            if (n + max_new + 8 > o.max_context) {
+                std::printf("ERR prompt (%lld tokens) + max_new (%lld) exceeds the context (%lld)\n", (long long) n,
+                            (long long) max_new, (long long) o.max_context);
+                continue;
+            }
+            bool bad = false;
+            for (int64_t t : ids) bad = bad || t < 0 || t >= n_vocab;
+            if (bad) { std::printf("ERR a token id is outside the vocabulary\n"); continue; }
+            std::array<int64_t, 3> remote_before{};
+            std::array<int64_t, 3> launches_before{};
+            std::array<uint64_t, 3> compact_before{}, full_before{};
+            for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
+            {
+                remote_before[(size_t) r] = remote_experts[(size_t) r].computed();
+                launches_before[(size_t) r] = remote_experts[(size_t) r].launched_layers();
+                compact_before[(size_t) r] = remote_experts[(size_t) r].returned_bytes();
+                full_before[(size_t) r] = remote_experts[(size_t) r].full_row_bytes();
+            }
+            cur = ids;
+            const Clock::time_point r0 = Clock::now();
+            // ---- where this request starts reading: the live session, or a checkpoint, whose tokens AND pictures are
+            // exactly the start of this prompt - at most n - 1 of them, the last token is always the first window
+            auto starts_with = [&](const std::vector<int32_t>& pre, const std::vector<ImgKey>& pre_imgs) -> bool {
+                const int64_t L = (int64_t) pre.size();
+                if (L < 1 || L > n - 1) return false;
+                for (int64_t i = 0; i < L; ++i)
+                    if ((int32_t) ids[(size_t) i] != pre[(size_t) i]) return false;
+                return imgs_below(req_imgs, L) == pre_imgs;
+            };
+            // the control vector for this request.  The live session and the checkpoints were read one way, so a
+            // switch reads the prompt again from the start
+            if (strata::kernels::cvec().loaded()) {
+                const bool want = req_cvec != 0;
+                if (want != cvec_cached) {
+                    live_ok = false;
+                    checks.clear();
+                    cvec_cached = want;
+                }
+                strata::kernels::cvec_set_enabled(want);
+            }
+            int64_t resume = 0;
+            bool from_live = false;
+            if (o.prompt_cache > 0) {
+                if (live_ok && starts_with(live, live_imgs)) { resume = (int64_t) live.size(); from_live = true; }
+                for (const ConvCheckpoint& c : checks)
+                    if ((int64_t) c.ids.size() > resume && starts_with(c.ids, c.imgs)) {
+                        resume = (int64_t) c.ids.size();
+                        from_live = false;
+                    }
+            }
+            // this request rewrites every cell from `resume` on, so a checkpoint past it (or not on this prompt's
+            // path) no longer has its cells; the ones kept are prefixes of both the old tokens and the new
+            checks.erase(std::remove_if(checks.begin(), checks.end(), [&](const ConvCheckpoint& c) {
+                             return (int64_t) c.ids.size() > resume || !starts_with(c.ids, c.imgs);
+                         }), checks.end());
+            live_ok = false;   // until this request has finished, the session is in between
+            int64_t reread_to = -1;   // STRATA_CKPT_REREAD only: read [0, reread_to) again instead of restoring
+            if (resume == 0) {
+                strata::core::session_zero(ss, g, nullptr, main_cs);
+                main_stream->wait();
+                for (auto& st : stages) {
+                    const strata::core::OnDevice on(st->dev);
+                    strata::core::session_zero(st->ss, g, nullptr, (void*) st->stream);
+                    st->stream->wait();
+                }
+                checks.clear();
+            } else if (!from_live) {
+                ConvCheckpoint* c = nullptr;
+                for (ConvCheckpoint& k : checks) if ((int64_t) k.ids.size() == resume) c = &k;
+                if (c != nullptr) c->used = ++check_clock;   // mounting through it is the use LRU counts
+                static const bool reread = std::getenv("STRATA_CKPT_REREAD") != nullptr;
+                if (reread && c != nullptr) {
+                    // THE CHECK OF THE CHECKPOINT: instead of restoring it, read its tokens again from position 0 in
+                    // one run (below, with the prompt path's slots lent like any read) - the same chunks the request
+                    // that saved it read them in, when that request started at 0.  With the VRAM expert set fixed
+                    // (--adapt-swaps 0) the answer must match the restored one token for token; anything the
+                    // checkpoint missed shows up as a difference.
+                    strata::core::session_zero(ss, g, nullptr, main_cs);
+                    main_stream->wait();
+                    for (auto& st : stages) {
+                        const strata::core::OnDevice on(st->dev);
+                        strata::core::session_zero(st->ss, g, nullptr, (void*) st->stream);
+                        st->stream->wait();
+                    }
+                    reread_to = resume;
+                    std::fprintf(stderr, "strata serve: STRATA_CKPT_REREAD: reading %lld tokens again instead of "
+                                         "restoring\n", (long long) resume);
+                } else if (c == nullptr || !checkpoint_restore(*c, ss, g) || c->stage_parts.size() != stages.size() ||
+                           [&] {
+                               for (size_t i = 0; i < stages.size(); ++i) {
+                                   const strata::core::OnDevice on(stages[i]->dev);
+                                   if (!checkpoint_restore(c->stage_parts[i], stages[i]->ss, g)) return true;
+                               }
+                               return false;
+                           }()) {
+                    std::printf("ERR restoring a conversation checkpoint failed\n");
+                    return 1;
+                }
+            }
+            // KV streaming: the drafter's ring may hold cells past `resume` from a longer turn; the main layers'
+            // host copies and slots are always current (every writer writes both), so they need nothing
+            if (resume > 0 && reread_to <= 0) mtp.kv_restore(resume);
+            tr("request", n, geni ? 1 : 0);
+            mtp.set_prompt_len(n);
+            const int64_t read_from = reread_to > 0 ? 0 : resume;
+            pp_total = n;
+            pp_from = read_from;
+            pp_t0 = r0;
+            pp_next_check = reread_to > 0 ? INT64_MAX : resume + o.prompt_cache_every;
+            {
+                std::lock_guard<std::mutex> lk(part_mu);
+                part_at.clear();
+                std::fill(part_next.begin(), part_next.end(), pp_next_check);
+            }
+            std::printf("RESUME %lld\n", (long long) resume);   // before reading: this many prompt tokens are reused
+            strata::core::progress_at("reading the prompt, from token", read_from);
+            std::fflush(stdout);
+            // A SHORT PART OF THE PROMPT - the new message of a chat that continues from a checkpoint, the assistant
+            // header - goes through the verify windows, S tokens at a time, as decode reads them.  The batched path
+            // costs ~300 ms per run however few tokens it has (it streams every expert the chunk routes to that is
+            // not in VRAM over PCIe), and it borrows slots it must refill after (~180 ms); a window costs ~16 ms a
+            // token, with the misses on the CPU.  Each part below is decided on its own, so a long first message is
+            // read batched and its header still goes through the windows.  Picture rows need the batched path.
+            // STRATA_CKPT_REREAD compares a restored checkpoint with a batched re-read, so it keeps every read batched.
+            static const bool no_short = std::getenv("STRATA_CKPT_REREAD") != nullptr;
+            auto windows_ok = [&](int64_t a, int64_t b) -> bool {
+                if (no_short || b - a > o.short_read) return false;
+                if (sp.embd_rows != nullptr)
+                    for (int64_t i = a; i < b; ++i)
+                        if (sp.embd_rows[i] != nullptr) return false;
+                return true;
+            };
+            // tokens [a, b) through the windows: commit all of them, then give the draft layer their residuals
+            auto read_windows = [&](int64_t a, int64_t b, std::string& e) -> bool {
+                // every token is committed and the picks are discarded: no head sampling (see set_head_sampling)
+                struct NoHeadSampling {
+                    strata::core::Verifier& v;
+                    explicit NoHeadSampling(strata::core::Verifier& x) : v(x) { v.set_head_sampling(false); }
+                    ~NoHeadSampling() { v.set_head_sampling(true); }
+                } no_head_sampling(ver);
+                std::vector<int32_t> win((size_t) S), outw((size_t) S), nxt((size_t) S);
+                for (int64_t q = a; q < b;) {
+                    if (stop_req.load()) { e = "cancelled"; return false; }
+                    const int T = (int) std::min<int64_t>(S, b - q);
+                    for (int t = 0; t < T; ++t) {
+                        win[(size_t) t] = (int32_t) cur[(size_t) (q + t)];
+                        nxt[(size_t) t] = (int32_t) cur[(size_t) (q + t + 1)];
+                    }
+                    drive.d.layers = 0;
+                    drive.d.experts = 0;
+                    drive.d.failed = false;
+                    if (!ver.run(T, win.data(), q, win_pool_fn, win_pool_user, outw.data(), e) || drive.d.failed) {
+                        if (drive.d.failed && drive.d.fail) e = drive.d.fail;
+                        return false;
+                    }
+                    if (!ver.commit(T, e) || !mtp.prefill(ver.final_R_all(), nxt.data(), T, q, e)) return false;
+                    q += T;
+                }
+                const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
+                std::printf("PP %lld %lld %.0f %.1f\n", (long long) b, (long long) pp_total, ms,
+                            ms > 0.0 ? 1000.0 * (double) (b - pp_from) / ms : 0.0);
+                strata::core::progress_beat();
+                std::fflush(stdout);
+                return true;
+            };
+            // the batched path's slots are lent just before its first run and given back (refilled) before a window
+            // reads - so the windows always see the whole expert cache - or once the prompt is read
+            std::vector<std::pair<int32_t, int32_t>> lent_now;
+            int64_t lent_chunk = 0;   // the chunk the lent slots hold the prompt path's buffers for
+            auto refill = [&](std::string &e) -> bool {
+                try {
+            if (lent_now.empty()) return true;
+                tr("refill start", (long long) lent_now.size());
+                for (const auto& [i, slot] : lent_now) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
+                    const uint8_t* b = srcp->blob(i / g.n_expert, i % g.n_expert);
+                    const int64_t nb = (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(i / g.n_expert);
+                    if (b == nullptr || !(refill_blocking() ? xcache.fill_slot_blocking(slot, b, e, nb)
+                                                            : xcache.fill_slot_queued(slot, b, e, nb)))
+                        return false;
+                    host_res[(size_t) i] = slot;
+                }
+                if (!xcache.sync_queued(e)) return false;
+                dpct::get_in_order_queue()
+                    .memcpy(d_res, host_res.data(),
+                            host_res.size() * sizeof(int32_t))
+                    .wait();
+                lent_now.clear();
+                lent_chunk = 0;
+                return true;
+            }
+            catch (sycl::exception const &exc) {
+              std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                        << ", line:" << __LINE__ << std::endl;
+              std::exit(1);
+            }
+            };
+            // lend the slots `tokens` batched prompt tokens need: the prompt path's buffers for min(chunk, tokens
+            // rounded up to 256), laid out in the last of the slots it may borrow
+            auto lend = [&](int64_t tokens, std::string &e) -> bool {
+                try {
+            if (lend_first < 0) return true; // its own buffers: nothing to lend
+                const int64_t want = std::min<int64_t>(o.prefill_chunk, (tokens + 255) / 256 * 256);
+                if (!lent_now.empty()) {
+                    if (want <= lent_chunk) return true;
+                    if (!refill(e)) return false;
+                }
+                const int32_t first = std::max<int32_t>(lend_first, (int32_t) (xcache.slots() - lend_slots(want)));
+                if (want != sp.chunk() || first != lend_first_now) {
+                    if (!sp.relayout(want, xcache.device_slot(first), lend_bytes(first), e)) return false;
+                    lend_first_now = first;
+                }
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] >= first) {
+                        lent_now.emplace_back((int32_t) i, host_res[i]);
+                        host_res[i] = strata::core::kNotResident;
+                    }
+                dpct::get_in_order_queue()
+                    .memcpy(d_res, host_res.data(),
+                            host_res.size() * sizeof(int32_t))
+                    .wait();
+                lent_chunk = want;
+                return true;
+            }
+            catch (sycl::exception const &exc) {
+              std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                        << ", line:" << __LINE__ << std::endl;
+              std::exit(1);
+            }
+            };
+            apply_pending(true);
+            // per-request sampling for the verify window's head (greedy when temperature is absent)
+            strata::kernels::SamplerParams req_sp;
+            req_sp.greedy = req_temperature <= 0.0f;
+            req_sp.temperature = req_temperature;
+            req_sp.top_p = req_top_p;
+            req_sp.top_k = req_top_k;
+            req_sp.seed = req_seed ? req_seed
+                                   : (unsigned long long) std::chrono::steady_clock::now().time_since_epoch().count();
+            req_sp.min_p = std::clamp(req_min_p, 0.0f, 1.0f);
+            req_sp.penalty_last_n = std::max(req_penalty_last_n, 0);
+            req_sp.penalty_repeat = req_penalty_repeat;
+            req_sp.penalty_freq = req_penalty_freq;
+            req_sp.penalty_present = req_penalty_present;
+            req_sp.counter = 0;
+            ver.set_sampling(req_sp);
+            drive.d.pcie_num = std::max(0, std::min(256, (int) (req_pcie_frac * 256.0 + 0.5)));
+            // a layer split: CUDA0's share as asked; a later GPU keeps its own (its link) unless the request sets one
+            for (int st = 0; st < split_drive.n; ++st)
+                split_drive.pcie_num[st] = (st == 0 || split_same || req_pcie_frac != o.pcie_frac)
+                                               ? drive.d.pcie_num : pcie_num_of(stages[(size_t) st - 1]->pcie_frac);
+            const int hist_n = std::min(req_sp.penalty_last_n, kPenaltyWindowCap);
+            ver.set_history(hist_n > 0 ? d_hist : nullptr, hist_n);
+            bool cancelled = false;
+            tr("prompt start", n - 1);
+            // The prompt is read in two parts when it has a turn boundary past `resume`: up to the last <|im_start|>
+            // (the conversation so far), a checkpoint there, then the new turn's header.  The next request of the same
+            // chat renders the same history - but not always the same header or the thinking of this reply - so that
+            // checkpoint is the one it reuses.
+            int64_t turn_at = -1;
+            if (o.prompt_cache > 0 && o.turn_token >= 0)
+                for (int64_t i = n - 1; i > resume; --i)
+                    if (ids[(size_t) i] == o.turn_token) { turn_at = i; break; }
+            // A prompt read from token 0 also stops at its FIRST turn boundary: the end of the system prompt (with
+            // the tools), which every new chat of the same client shares.  That checkpoint becomes the chain's root,
+            // which the retention policy pins (conv_cache.hpp), so the next new chat reads only what comes after it.
+            // (PR #65, code-martin.)  Only for a system prompt of --prompt-cache-root tokens or more: a small one
+            // is cheaper to read again than the extra part costs (~0.3 s).
+            int64_t root_at = -1;
+            if (o.prompt_cache > 0 && o.turn_token >= 0 && o.prompt_cache_root > 0 && read_from == 0)
+                for (int64_t i = 1; i < turn_at; ++i)
+                    if (ids[(size_t) i] == o.turn_token) {
+                        if (i >= o.prompt_cache_root) root_at = i;
+                        break;
+                    }
+            int64_t at = read_from;
+            for (const int64_t to : {reread_to, root_at, turn_at, n - 1}) {
+                if (to <= at) continue;
+                const bool win = windows_ok(at, to);
+                if (win && !refill(err)) {
+                    std::printf("ERR refilling a lent slot failed: %s\n", err.c_str());
+                    return 1;
+                }
+                if (!win && !lend(to - at, err)) {
+                    std::printf("ERR lending the prompt path its slots failed: %s\n", err.c_str());
+                    return 1;
+                }
+                const auto tsp = Clock::now();
+                const bool sp_ok = win ? read_windows(at, to, err) : sp.run(ids.data() + at, to - at, at, err);
+                if (trace) {
+                    std::fprintf(stderr, "strata trace: read %lld tokens (%s) in %.1f ms\n", (long long) (to - at),
+                                 win ? "windows" : "batched",
+                                 std::chrono::duration<double, std::milli>(Clock::now() - tsp).count());
+                    std::fflush(stderr);
+                }
+                if (!sp_ok) {
+                    if (!stop_req.load()) {
+                        std::fprintf(stderr, "strata serve: %s\n", err.c_str());
+                        std::printf("ERR %s\n", err.c_str());
+                        return 1;
+                    }
+                    cancelled = true;   // stopped while reading the prompt: refill the lent slots below, then DONE cancel
+                    break;
+                }
+                at = to;
+                if ((to == turn_at || to == root_at) && !checkpoint_at(to)) {
+                    std::printf("ERR saving a conversation checkpoint failed\n");
+                    return 1;
+                }
+            }
+            if (!refill(err)) {
+                std::printf("ERR refilling a lent slot failed: %s\n", err.c_str());
+                return 1;
+            }
+            tr("prompt done (slots refilled)");
+            const double prompt_ms = std::chrono::duration<double, std::milli>(Clock::now() - r0).count();
+            std::printf("REUSED %lld\n", (long long) resume);   // the prompt is read; the first window comes next
+            std::fflush(stdout);
+            // the verify windows: the first holds the last prompt token alone
+            int64_t p = n - 1;
+            int32_t x = (int32_t) ids[(size_t) (n - 1)];
+            std::vector<int32_t> drafts((size_t) S, 0), window((size_t) S), outv((size_t) S);
+            std::vector<float> dprob((size_t) S, 0.0f);
+            std::vector<int32_t> sbuf((size_t) S, 0);
+            if (o.suffix_draft > 0) {
+                sfx.reset();
+                for (int64_t t : ids) sfx.append((int32_t) t);
+            }
+            bool first_window = true;
+            int64_t produced_n = 0, sfx_windows = 0, sfx_drafts = 0, sfx_ok = 0;
+            int64_t draft_offered = 0, draft_accepted = 0;
+            // what the session holds once this request is done: the prompt read so far, then every committed token
+            std::vector<int32_t> consumed;
+            consumed.reserve((size_t) (n + max_new + S));
+            for (int64_t i = 0; i < n - 1; ++i) consumed.push_back((int32_t) ids[(size_t) i]);
+            const char* finish = "length";
+            const Clock::time_point d0 = Clock::now();
+            // STRATA_DECODE_TIMING=1: where a request's decode time goes (one line per request)
+            static const bool dec_timing = std::getenv("STRATA_DECODE_TIMING") != nullptr;
+            struct DecSnap {
+                double wait, pool, host, plan, actq, jobs, run;
+                int64_t misses, entries, hits, pcie;
+            };
+            auto dec_snap = [&]() {
+                return DecSnap{ver.ms_wait, ver.ms_pool, ver.ms_host, drive.d.ms_plan, drive.d.ms_actq, drive.d.ms_jobs,
+                               drive.d.ms_run, drive.d.multi_misses, drive.d.multi_entries, drive.d.cache_hits,
+                               drive.d.pcie_experts};
+            };
+            const DecSnap ds0 = dec_snap();
+            double dt_run = 0, dt_commit = 0, dt_draft = 0;
+            int64_t dec_windows = 0, dec_T = 0;
+            const int64_t decode_hits0 = drive.d.cache_hits;
+            const int64_t decode_look0 = drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused;
+            if (cancelled) finish = "cancel";
+            while (!cancelled && produced_n < max_new) {
+                int T = S_mtp;
+                if (req_spec_min_p > 0.0) {
+                    T = 1;
+                    while (T < S_mtp && dprob[(size_t) T - 1] >= (float) req_spec_min_p) ++T;
+                }
+                if (first_window) T = 1;
+                // a repeat of earlier context (prompt lookup) where the MTP's own first guess agrees: the policy takes it
+                // when its expected tokens per ms, from the measured acceptance and window costs, beat the MTP window's
+                bool from_sfx = false;
+                int sfx_match = 0;
+                if (o.suffix_draft > 0 && !first_window) {
+                    const int k = sfx.propose(S - 1, sbuf.data());
+                    sfx_match = sfx.last_match();
+                    if (k > 0 && sbuf[0] == drafts[0]) {
+                        const strata::spec::DraftPolicy::Pick pk = policy.choose(T, k, sfx_match);
+                        if (pk.lookup) { T = pk.t; from_sfx = true; }
+                    }
+                }
+                const bool timed_round = !first_window;
+                const Clock::time_point round0 = Clock::now();
+                if (p + T > o.max_context) break;
+                window[0] = x;
+                for (int i = 1; i < T; ++i) window[(size_t) i] = from_sfx ? sbuf[(size_t) i - 1] : drafts[(size_t) i - 1];
+                drive.d.layers = 0;
+                drive.d.experts = 0;
+                drive.d.failed = false;
+                apply_pending(false);
+                if (hist_n > 0) {
+                    // the tails the penalties count over, ONE PER ROW: the tokens the state has consumed, the
+                    // fed-back head `x` (it joins `consumed` only after this window commits), then the drafts
+                    // before that row - what plain decode would have counted there.  (Until 0.1.19 only row 0
+                    // was staged, and the drafted rows read unwritten slots.)
+                    strata::kernels::penalty_rows(consumed.data(), (int64_t) consumed.size(), window.data(), T,
+                                                  hist_n, hist_stage.data());
+                    const strata::core::OnDevice on_h(hist_dev);
+                    dpct::get_in_order_queue()
+                        .memcpy(d_hist, hist_stage.data(),
+                                (size_t)T * (size_t)hist_n * sizeof(int32_t))
+                        .wait();
+                }
+                tr("window", p, T);
+                const Clock::time_point tw0 = Clock::now();
+                if (!ver.run(T, window.data(), p, win_pool_fn, win_pool_user, outv.data(), err) || drive.d.failed) {
+                    std::printf("ERR %s\n", drive.d.failed && drive.d.fail ? drive.d.fail : err.c_str());
+                    return 1;
+                }
+                int a = 0;
+                while (a < T - 1 && window[(size_t) a + 1] == outv[(size_t) a]) ++a;
+                if (from_sfx) { ++sfx_windows; sfx_drafts += T - 1; sfx_ok += a; }
+                const Clock::time_point tw1 = Clock::now();
+                std::thread adapt_thr;   // the adaptive tier beside the commit and the draft (as in generate)
+                bool adapt_ok = true;
+                if (!drive.d.usage.empty() && ((rounds + 1) % o.adapt_every) == 0)
+                    adapt_thr = std::thread([&] { adapt_ok = adapt(); });
+                if (!ver.commit(a + 1, err)) {
+                    if (adapt_thr.joinable()) adapt_thr.join();
+                    std::printf("ERR %s\n", err.c_str());
+                    return 1;
+                }
+                // the window's first a + 1 tokens are in the session now (the last output is not: it is next x)
+                for (int i = 0; i <= a; ++i) consumed.push_back(window[(size_t) i]);
+                draft_offered += T - 1;
+                draft_accepted += a;
+                first_window = false;
+                bool eos = false;
+                for (int i = 0; i <= a && produced_n < max_new && !eos; ++i) {
+                    std::printf("T %d\n", (int) outv[(size_t) i]);
+                    strata::core::progress_beat();
+                    ++produced_n;
+                    if (o.suffix_draft > 0) sfx.append(outv[(size_t) i]);
+                    eos = std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) outv[(size_t) i]) != o.eos_ids.end();
+                }
+                std::fflush(stdout);
+                ++rounds;
+                const Clock::time_point tw2 = Clock::now();
+                const bool drafted = eos || produced_n >= max_new ||
+                                     mtp.draft(T, outv.data(), p, a, drafts.data(), err, dprob.data(), (float) req_spec_min_p);
+                {
+                    const Clock::time_point tw3 = Clock::now();
+                    auto msd = [](Clock::time_point a0, Clock::time_point b0) { return std::chrono::duration<double, std::milli>(b0 - a0).count(); };
+                    dt_run += msd(tw0, tw1); dt_commit += msd(tw1, tw2); dt_draft += msd(tw2, tw3);
+                    ++dec_windows; dec_T += T;
+                }
+                if (adapt_thr.joinable()) adapt_thr.join();
+                if (!adapt_ok) {
+                    std::printf("ERR an adaptive refill failed\n");
+                    return 1;
+                }
+                if (!drafted) {
+                    std::printf("ERR %s\n", err.c_str());
+                    return 1;
+                }
+                if (timed_round && !eos)
+                    policy.observe(from_sfx, T, a, sfx_match,
+                                   std::chrono::duration<double, std::milli>(Clock::now() - round0).count());
+                if (eos) { finish = "stop"; break; }
+                if (stop_req.load()) { finish = "cancel"; break; }
+                x = outv[(size_t) a];
+                p += a + 1;
+            }
+            const double decode_ms = std::chrono::duration<double, std::milli>(Clock::now() - d0).count();
+            if (dec_timing && dec_windows > 0) {
+                const DecSnap d1 = dec_snap();
+                const double w = (double) dec_windows, L = (double) g.n_layers;
+                std::fprintf(stderr, "strata decode timing: %lld windows, avg T %.2f, %.2f tokens/window, %.2f ms/window = "
+                                     "verify %.2f (GPU-reach wait %.2f + per-layer host %.2f [plan %.2f actq %.2f jobs %.2f "
+                                     "CPU %.2f] + stage %.2f) + commit/emit %.2f + draft %.2f; per layer-window: CPU experts "
+                                     "%.2f (%.2f entries), VRAM hits %.2f, PCIe %.2f\n",
+                             (long long) dec_windows, dec_T / w, produced_n / w, decode_ms / w, dt_run / w,
+                             (d1.wait - ds0.wait) / w, (d1.pool - ds0.pool) / w, (d1.plan - ds0.plan) / w,
+                             (d1.actq - ds0.actq) / w, (d1.jobs - ds0.jobs) / w, (d1.run - ds0.run) / w,
+                             (d1.host - ds0.host) / w, dt_commit / w, dt_draft / w, (d1.misses - ds0.misses) / (w * L),
+                             (d1.entries - ds0.entries) / (w * L), (d1.hits - ds0.hits) / (w * L), (d1.pcie - ds0.pcie) / (w * L));
+                const std::string pr = ver.profile_report();
+                if (!pr.empty()) std::fprintf(stderr, "strata decode GPU stages (ms/window):%s\n", pr.c_str());
+            }
+            if (!cancelled) {
+                // a prompt stopped halfway leaves the session somewhere between two chunks: nothing to continue from
+                // (the checkpoints taken while reading it are still good)
+                live.swap(consumed);
+                live_imgs = imgs_below(req_imgs, (int64_t) live.size());
+                live_ok = o.prompt_cache > 0;
+            }
+            static const bool state_hash = std::getenv("STRATA_STATE_HASH") != nullptr;
+            if (state_hash && live_ok) {
+                // DEBUG: a fingerprint of every part of the session over the positions it holds ([0, L)), and
+                // separately of what lies past them in the last KV page (stale cells, fine unless something reads them)
+                dpct::get_current_device().queues_wait_and_throw();
+                const int64_t L = (int64_t) live.size();
+                const strata::kernels::QsaShapes qs = [&] {
+                    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+                    s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_dim = g.idx_key_dim;
+                    return s;
+                }();
+                auto hash_dev = [&](const void *p, size_t bytes, uint64_t h) {
+                    try {
+                std::vector<uint8_t> b(bytes);
+                    if (bytes) dpct::get_in_order_queue()
+                        .memcpy(b.data(), p, bytes)
+                        .wait(); // VRAM or a streamed host copy
+                    return fnv1a(b.data(), b.size(), h);
+                }
+                catch (sycl::exception const &exc) {
+                  std::cerr << exc.what()
+                            << "Exception caught at file:" << __FILE__
+                            << ", line:" << __LINE__ << std::endl;
+                  std::exit(1);
+                }
+                };
+                // the cells [c0, c1) of one int8 K or V pool ([page][kv_head][page_size][head_dim]), bytes per value `w`
+                auto hash_cells = [&](const void* pool, int64_t per_cell, int64_t c0, int64_t c1, uint64_t h) {
+                    const int64_t ps = qs.page_size;
+                    for (int64_t pg = c0 / ps; pg * ps < c1; ++pg)
+                        for (int64_t hd = 0; hd < qs.n_head_kv; ++hd) {
+                            const int64_t a = std::max(c0, pg * ps) - pg * ps, e = std::min(c1, (pg + 1) * ps) - pg * ps;
+                            const size_t off = (size_t) (((pg * qs.n_head_kv + hd) * ps + a) * per_cell);
+                            h = hash_dev((const uint8_t*) pool + off, (size_t) ((e - a) * per_cell), h);
+                        }
+                    return h;
+                };
+                const ConvStateSizes z = conv_state_sizes(g);
+                uint64_t h_gdn = hash_dev(ss.gdn_state, z.gdn, 1469598103934665603ull);
+                if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr) {   // per GDN layer: which one differs first
+                    const size_t per = z.gdn / (size_t) g.n_gdn_layers();
+                    std::string s;
+                    char b[8];
+                    for (int64_t i = 0; i < g.n_gdn_layers(); ++i) {
+                        std::snprintf(b, sizeof(b), "%04llx ", (unsigned long long) (hash_dev((const uint8_t*) ss.gdn_state + i * per, per, 1469598103934665603ull) & 0xffff));
+                        s += b;
+                    }
+                    std::fprintf(stderr, "strata serve: STATE_HASH_GDN %s\n", s.c_str());
+                }
+                uint64_t h_ple = hash_dev(ss.ple_hist, z.ple, 1469598103934665603ull);
+                uint64_t h_tail = 1469598103934665603ull, h_pool = h_tail, h_kv = h_tail, h_stale = h_tail;
+                const int64_t kvb = qs.head_dim, scb = (qs.head_dim / 64) * 2;
+                // a state's K/V arrays and their bytes per (cell, head) row: the host copy when it has one
+                auto kv_arrays = [&](const strata::core::QsaState& st) {
+                    const bool h = st.kv_mode != 0;
+                    std::vector<std::pair<const void*, int64_t>> a;
+                    if (st.kv_q4) {
+                        const int64_t q4b = (int64_t) strata::kernels::kv_q4_bytes_per_head((int) qs.head_dim);
+                        a = {{h ? st.host.k_q4 : st.k_q4, q4b}, {h ? st.host.v_q4 : st.v_q4, q4b}};
+                    } else {
+                        a = {{h ? st.host.k_q : st.k_q, kvb}, {h ? st.host.v_q : st.v_q, kvb},
+                             {h ? st.host.k_scale : st.k_scale, scb}, {h ? st.host.v_scale : st.v_scale, scb}};
+                    }
+                    return a;
+                };
+                const int64_t end_cell = std::min<int64_t>(((L + qs.page_size - 1) / qs.page_size) * qs.page_size,
+                                                           ss.qsa_states[0].max_cells);
+                for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
+                    const strata::core::QsaState& st = ss.qsa_states[i];
+                    h_tail = hash_dev(st.idx_tail, z.tail, h_tail);
+                    h_pool = hash_dev(st.idx_pooled, (size_t) (L / qs.idx_block) * qs.idx_dim * 4, h_pool);
+                    // KV streaming: the host copy is the identity layout and holds every cell
+                    for (const auto& [pool, w] : kv_arrays(st)) {
+                        h_kv = hash_cells(pool, w, 0, L, h_kv);
+                        h_stale = hash_cells(pool, w, L, end_cell, h_stale);
+                    }
+                }
+                const strata::core::QsaState& ms = mtp.kv_state();
+                uint64_t h_mtp = 1469598103934665603ull;
+                const int64_t mL = std::min<int64_t>(L, ms.max_cells);
+                for (const auto& [pool, w] : kv_arrays(ms))
+                    if (pool != nullptr) h_mtp = hash_cells(pool, w, 0, mL, h_mtp);
+                std::fprintf(stderr, "strata serve: STATE_HASH L=%lld gdn=%016llx ple=%016llx tail=%016llx pooled=%016llx "
+                                     "kv=%016llx mtp=%016llx stale=%016llx ple_prev=%d,%d\n", (long long) L,
+                             (unsigned long long) h_gdn, (unsigned long long) h_ple, (unsigned long long) h_tail,
+                             (unsigned long long) h_pool, (unsigned long long) h_kv, (unsigned long long) h_mtp,
+                             (unsigned long long) h_stale, ss.ple_prev[0], ss.ple_prev[1]);
+            }
+            const int64_t req_hits = drive.d.cache_hits - decode_hits0;
+            const int64_t req_look = (drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused) - decode_look0;
+            // DONE <generated> <prompt> <prompt ms> <decode ms> <finish> <drafts accepted> <drafts offered> <reused> [hits] [lookups]
+            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld\n", (long long) produced_n, (long long) n, prompt_ms,
+                        decode_ms, finish, (long long) draft_accepted, (long long) draft_offered, (long long) resume,
+                        (long long) req_hits, (long long) req_look);
+            std::fflush(stdout);
+            if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
+            const int64_t fresh = n - resume;
+            std::fprintf(stderr, "strata serve: prompt %lld tokens = %lld reused + %lld read in %.0f ms (%.1f tok/s), "
+                                 "%lld generated in %.0f ms (%.1f tok/s), drafts accepted %lld of %lld, %zu checkpoints%s\n",
+                         (long long) n, (long long) resume, (long long) fresh, prompt_ms,
+                         prompt_ms > 0 ? 1000.0 * fresh / prompt_ms : 0.0, (long long) produced_n, decode_ms,
+                         decode_ms > 0 ? 1000.0 * produced_n / decode_ms : 0.0, (long long) draft_accepted,
+                         (long long) draft_offered, checks.size(), cancelled ? " (cancelled)" : "");
+            // the VRAM share of the experts the pool looked up while decoding; experts it sent over PCIe for the GPU
+            // to read (--pcie-frac) are in neither count
+            if (req_look > 0) {
+                std::fprintf(stderr, "strata serve: decode expert cache hit rate: %.1f%% (%lld hits / %lld lookups)\n",
+                             100.0 * (double) req_hits / (double) req_look,
+                             (long long) req_hits, (long long) req_look);
+            }
+            // STRATA_SPLIT_TIMING: where each verify stage's host time went, cumulative per window since the start
+            // (waiting for its GPU to ring a layer, the CPU pool and plan per layer, staging the window)
+            if (static const bool st_timing = std::getenv("STRATA_SPLIT_TIMING") != nullptr; st_timing)
+                for (int st = 0; st < n_stages; ++st) {
+                    const strata::core::Verifier& v = stage_ver(st);
+                    const double w = v.windows > 0 ? (double) v.windows : 1.0;
+                    std::fprintf(stderr, "strata serve: stage %d: %lld windows; per window: wait for the GPU %.3f ms, "
+                                         "pool + plan %.3f ms, host staging %.3f ms, commit %.3f ms\n", st,
+                                 (long long) v.windows, v.ms_wait / w, v.ms_pool / w, v.ms_host / w, v.ms_commit / w);
+                }
+            if (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1) {
+                // KV streaming, cumulative over the process: blocks the selections named vs blocks read from RAM
+                uint64_t miss = 0, look = 0;
+                bool over = false;
+                for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
+                    const strata::kernels::KvStreamCounters c = strata::kernels::kv_stream_counters(ss.qsa_states[i].map);
+                    miss += c.misses; look += c.lookups; over = over || c.overflow;
+                }
+                std::fprintf(stderr, "strata serve: KV streaming: %.2f%% of %llu block reads hit VRAM, %.1f MiB read "
+                                     "from RAM%s\n", look ? 100.0 * (double) (look - miss) / (double) look : 100.0,
+                             (unsigned long long) look, (double) miss * 4224.0 / 1048576.0,
+                             over ? " - OVERFLOW (too few resident cells)" : "");
+            }
+            if (sfx_windows > 0)
+                std::fprintf(stderr, "strata serve: suffix drafts: %lld windows, %lld of %lld drafts accepted\n",
+                             (long long) sfx_windows, (long long) sfx_ok, (long long) sfx_drafts);
+            for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
+                std::fprintf(stderr, "strata serve: CUDA%d: %lld expert entries, %lld active layer launches, %.1f MiB returned "
+                                     "(%.1f MiB with full rows) in this request; host %.0f ms staging+launching, %.0f ms "
+                                     "waiting for it (since start)\n", r + 1,
+                             (long long) (remote_experts[(size_t) r].computed() - remote_before[(size_t) r]),
+                             (long long) (remote_experts[(size_t) r].launched_layers() - launches_before[(size_t) r]),
+                             (double) (remote_experts[(size_t) r].returned_bytes() - compact_before[(size_t) r]) / 1048576.0,
+                             (double) (remote_experts[(size_t) r].full_row_bytes() - full_before[(size_t) r]) / 1048576.0,
+                             remote_experts[(size_t) r].ms_begin(), remote_experts[(size_t) r].ms_wait());
+        }
+        return 0;
+    }
+
+    // ---- plan v0.3 P5: the prompt's conditioning positions [0, n_prompt - 1) in batched chunks.  The token loop
+    // then starts at the last prompt position, whose prediction is the first generated token.
+    int64_t pos_start = 0;
+    int64_t spec_pos = 0;   // plan v0.3 P6: where the speculative loop starts (0 = not used)
+    strata::prefill::Prefill prefill;
+    double prefill_batched_ms = 0;
+    std::FILE* final_r = o.dump_final_r.empty() ? nullptr : std::fopen(o.dump_final_r.c_str(), "wb");
+    std::vector<float> final_r_host(final_r ? (size_t) (g.hc * g.n_embd) : 0);
+    std::vector<std::pair<int32_t, int32_t>> lent;     // (residency index, slot) lent to the prompt path
+    if (o.prefill_chunk > 0 && n_prompt > 1) {
+        void* borrow = nullptr;
+        uint64_t borrow_bytes = 0;
+        if (!o.no_prefill_borrow && !host_res.empty() && d_res != nullptr) {
+            int64_t chunk = o.prefill_chunk;
+            int64_t k = plan_lend(chunk);             // auto: the largest chunk that fits; fixed: halved to fit
+            if (k > 0 && chunk > (n_prompt - 1 + 255) / 256 * 256) {   // no bigger than the prompt needs
+                chunk = std::max<int64_t>(256, (n_prompt - 1 + 255) / 256 * 256);
+                k = lend_slots(chunk);
+                if (!o.prefill_auto) o.prefill_chunk = chunk;
+            }
+            if (o.prefill_auto) {
+                o.prefill_chunk = k > 0 ? chunk : 1024;
+                std::fprintf(stderr, "strata generate: prompt chunk auto: %lld tokens\n", (long long) o.prefill_chunk);
+            } else if (chunk != o.prefill_chunk) {
+                k = 0;                                 // a fixed chunk that does not fit: its own buffers, as before
+            }
+            const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+            if (k > 0) {   // the lent slots are refilled after the prompt
+                const int32_t first = (int32_t) (xcache.slots() - k);
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] >= first) {
+                        lent.emplace_back((int32_t) i, host_res[i]);
+                        host_res[i] = strata::core::kNotResident;
+                    }
+                dpct::get_in_order_queue()
+                    .memcpy(d_res, host_res.data(),
+                            host_res.size() * sizeof(int32_t))
+                    .wait();
+                borrow = xcache.device_slot(first);
+                borrow_bytes = xcache.slot_offsets() ? (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[first])
+                                                     : (uint64_t) k * (uint64_t) blob;
+                std::fprintf(stderr, "strata generate: prompt path borrows %lld cache slots (%.2f GiB)\n", (long long) k,
+                             (double) borrow_bytes / 1073741824.0);
+            }
+        }
+        if (borrow == nullptr)
+            std::fprintf(stderr, "strata generate: prompt path allocates its own buffers (no cache slots to borrow)\n");
+        if (!prefill.init(wt, g, ss, srcp, o.expert_cache > 0 ? &xcache : nullptr,
+                          host_res.empty() ? nullptr : host_res.data(), o.prefill_chunk, main_cs, err, borrow,
+                          borrow_bytes)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        if (!o.mtp.empty()) {
+            if (!mtp.bind(wt, &native_head, nullptr, err)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            prefill.on_chunk = [&](const float* R_rows, int64_t T, int64_t p0, std::string& e) -> bool {
+                // cell i pairs R_i with the token at i + 1 (every such token is in the prompt)
+                std::vector<int32_t> nxt((size_t) T);
+                for (int64_t t = 0; t < T; ++t) nxt[(size_t) t] = (int32_t) o.tokens[(size_t) (p0 + t + 1)];
+                return mtp.prefill(R_rows, nxt.data(), T, p0, e);
+            };
+        }
+        const Clock::time_point tp0 = Clock::now();
+        const int64_t n_batched = (o.prefill_until > 0 && o.prefill_until < n_prompt - 1) ? o.prefill_until : n_prompt - 1;
+        if (!prefill.run(o.tokens.data(), n_batched, 0, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        // refill the lent slots from the arena and give them back to the decode tier
+        if (!lent.empty()) {
+            const Clock::time_point tr = Clock::now();
+            for (const auto& [i, slot] : lent) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
+                const uint8_t* b = srcp->blob(i / g.n_expert, i % g.n_expert);
+                const int64_t nb = (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(i / g.n_expert);
+                if (b == nullptr || !(refill_blocking() ? xcache.fill_slot_blocking(slot, b, err, nb)
+                                                        : xcache.fill_slot_queued(slot, b, err, nb))) {
+                    std::fprintf(stderr, "strata generate: refilling a lent slot failed: %s\n", err.c_str());
+                    return 1;
+                }
+                host_res[(size_t) i] = slot;
+            }
+            if (!xcache.sync_queued(err)) {
+                std::fprintf(stderr, "strata generate: refilling the lent slots failed: %s\n", err.c_str());
+                return 1;
+            }
+            dpct::get_in_order_queue()
+                .memcpy(d_res, host_res.data(),
+                        host_res.size() * sizeof(int32_t))
+                .wait();
+            std::fprintf(stderr, "strata generate: %zu lent slots refilled in %.1f ms\n", lent.size(),
+                         std::chrono::duration<double, std::milli>(Clock::now() - tr).count());
+        }
+        prefill_batched_ms = std::chrono::duration<double, std::milli>(Clock::now() - tp0).count();
+        prefill_ms += prefill_batched_ms;
+        pos_start = n_batched;
+        tok = o.tokens[(size_t) pos_start];
+        // the PLE window of the token path: the two tokens before `pos_start`
+        ss.ple_prev[0] = pos_start >= 2 ? (int32_t) o.tokens[(size_t) (pos_start - 2)] : -1;
+        ss.ple_prev[1] = pos_start >= 1 ? (int32_t) o.tokens[(size_t) (pos_start - 1)] : -1;
+        const strata::prefill::PrefillStats& ps = prefill.stats();
+        std::fprintf(stderr, "strata generate: prefill %lld tokens in %lld chunks, %.1f ms (%.1f tok/s); experts "
+                             "streamed %lld (%lld by DMA, host %.1f ms), resident %lld; PLE %.1f ms\n",
+                     (long long) ps.tokens, (long long) ps.chunks, ps.ms_total,
+                     ps.ms_total > 0 ? 1000.0 * (double) ps.tokens / ps.ms_total : 0.0, (long long) ps.experts_streamed,
+                     (long long) ps.experts_dma, ps.ms_experts_host, (long long) ps.experts_resident, ps.ms_ple);
+    }
+
+    for (int64_t pos = pos_start;; ++pos) {
+        // plan v0.3 P6: a native pack's last prompt token is the first verify window (T = 1)
+        if (native_pack) { spec_pos = pos; break; }
+        if (pos >= o.max_context) {
+            std::fprintf(stderr, "strata generate: ran out of context at position %lld\n", (long long) pos);
+            return 2;
+        }
+        // **THE TOKEN TIMER STARTS HERE, BEFORE ANY OF THE TOKEN'S WORK (A7).**  It used to start after
+        // `put_input`/`embed_row`, which excluded the embedding and the PLE window advance from the reported
+        // rate, and it stopped before the NaN scan, the logits dump and the sampler.  The published tok/s
+        // figure is a WALL-CLOCK rate: everything one token costs, PLE advance to sampled id.  A rate that
+        // excludes real per-token work is not a rate anyone can plan against.
+        const Clock::time_point t0 = Clock::now();
+        // **THE PLE'S TOKEN WINDOW ADVANCES HERE, ONCE PER TOKEN, AND `ple_stage_token` RUNS OUTSIDE THE
+        // CAPTURE.**  Both are the driver's job: `ngram_rows` is a host hash over the last three tokens and the
+        // table gather is a host read, so either one inside a captured graph would run once at capture time and
+        // replay forever.  `ple_prev` is OLDEST FIRST and `-1` means "no predecessor", which `ngram_rows`
+        // treats as the EOS cut - a sequence boundary.
+        ss.ple_token = (int32_t) tok;
+        Clock::time_point tp = Clock::now();
+        // Plan v0.3 P2: the 16 SSD reads start here and complete while the embedding is staged; `ms_ple` is
+        // the issue plus the time still spent WAITING afterwards, i.e. the part the embedding did not hide.
+        if (ss.ple.ready() && !strata::core::ple_issue_token(ss.ple, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        {
+            const Clock::time_point n = Clock::now();
+            ms_ple += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+        if (!put_input(tok, pos)) return 1;
+        {
+            const Clock::time_point n = Clock::now();
+            ms_embed += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+        if (ss.ple.ready() && !strata::core::ple_finish_token(ss.ple, token_stream, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        {
+            const Clock::time_point n = Clock::now();
+            ms_ple += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+
+        if (pos % 256 == 0 || pos + 1 >= n_prompt - 1)
+            std::fprintf(stderr, "strata generate: position %lld, token %lld%s\n", (long long) pos, (long long) tok,
+                         pos < n_prompt ? " (prompt)" : "");
+        // **`d.layers` IS THE BLOB'S LAYER AXIS, NOT A COUNTER.**  The adapter uses it to index
+        // `experts.bin` as `layer * n_expert + expert`, so it MUST restart at 0 for every token.  Leaving it
+        // running across tokens asks for layer 48 of a 48-layer file on the second token - which
+        // `FileExpertSource` REFUSES rather than wrapping into layer 0's experts, and that refusal is the only
+        // reason this was a clean error instead of a silently wrong second token.
+        drive.d.layers = 0;
+        drive.d.experts = 0;
+        drive.d.failed = false;
+        err.clear();
+        if (o.no_capture) {
+            if (!strata::core::session_token(wt, g, pos, /*pos_base=*/0, ss, d_parts, main_cs,
+                                             o.sync_every_layer, err)) {
+                std::fprintf(stderr, "strata generate: session_token: %s\n", err.c_str());
+                return 1;
+            }
+        } else {
+            strata::core::doorbell_reset(db);
+            if (tgraph.captured) {
+                if (!strata::core::session_run_token(g, pos, /*pos_base=*/0, ss, tgraph, pool_fn, pool_user,
+                                                     loop_scratch.y_miss, main_cs, err)) {
+                    std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                    return 1;
+                }
+            } else if (!strata::core::session_loop(g, pos, /*pos_base=*/0, ss, gr, pool_fn, hit_fn, pool_user, /*overlap=*/true, main_cs,
+                                        err, layer_stage, &loop_scratch)) {
+                std::fprintf(stderr, "strata generate: session_loop: %s\n", err.c_str());
+                return 1;
+            }
+        }
+        if (final_r != nullptr) {
+            dpct::get_in_order_queue()
+                .memcpy(final_r_host.data(), ss.R,
+                        final_r_host.size() * sizeof(float))
+                .wait();
+            const int64_t posrec[2] = {pos, tok};
+            std::fwrite(posrec, sizeof posrec, 1, final_r);
+            std::fwrite(final_r_host.data(), sizeof(float), final_r_host.size(), final_r);
+        }
+        if (drive.d.failed) {
+            std::fprintf(stderr, "strata generate: the expert pool failed at layer %lld expert %lld: %s\n",
+                         (long long) drive.d.fail_layer, (long long) drive.d.fail_expert,
+                         drive.d.fail ? drive.d.fail : "(no message)");
+            return 1;
+        }
+        {
+            // **THE LAYER LOOP ITSELF, WHICH IS WHAT `--gpu-only-full` HAS TO BE COMPARED AGAINST.**
+            const Clock::time_point n = Clock::now();
+            ms_layers += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+        // ---- the ladder for THIS position, in the order `session_loop` filled it: layer 0 first.
+        if (layer_dump != nullptr) std::fwrite(layer_stage, sizeof(float), layer_floats, layer_dump);
+        if (half_dump != nullptr) {
+            std::fwrite(half_stage, sizeof(float), (size_t) g.n_layers * (size_t) half_stride, half_dump);
+        }
+        if (!run_head(token_stream)) {
+            std::fprintf(stderr, "strata generate: lm_head: %s\n", err.c_str());
+            return 1;
+        }
+        // **A CHECKPOINT AFTER THE HEAD, BECAUSE AN ASYNC FAULT IS STICKY AND LIES ABOUT WHERE IT HAPPENED.**
+        // Measured, and it cost an hour: without this, `embed_row`'s D2H on the NEXT token reported "an illegal
+        // memory access" at a plane offset that has nothing to do with the fault, and the layer that actually
+        // faulted had completed its own error checks successfully - because its kernels had not run yet.  A
+        // sticky error surfaces at the next SYNCHRONISING call, which is whatever happens to come next.
+        if (!o.stream_token &&
+            DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()) != 0) {
+            std::fprintf(
+                stderr,
+                "strata generate: the device faulted in lm_head at position "
+                "%lld: %s\n",
+                /*
+                DPCT1009:701: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010:702: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                (long long)pos, dpct::get_error_string_dummy(0));
+            return 1;
+        }
+        {
+            const Clock::time_point n = Clock::now();
+            ms_head += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+        const bool emit_logits = dump != nullptr &&
+            strata::program::logits_selection::selected(pos, dump_positions, o.logits_stride);
+        const bool read_logits = !o.stream_token || o.check_logits || emit_logits;
+        /*
+        DPCT1124:703: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (read_logits &&
+            (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
+                 logits.data(), d_logits, (size_t)n_vocab * 4)) != 0 ||
+             DPCT_CHECK_ERROR(strata::q_of(token_stream)->wait()) != 0)) {
+            std::fprintf(stderr, "strata generate: reading the logits back failed\n");
+            return 1;
+        }
+        int bad = 0;
+        if (read_logits) for (float v : logits) if (!std::isfinite(v)) ++bad;
+        if (bad != 0) {
+            std::fprintf(stderr, "strata generate: %d of %lld logits are not finite at position %lld\n", bad,
+                         (long long) n_vocab, (long long) pos);
+            return 1;
+        }
+        if (emit_logits && std::fwrite(logits.data(), sizeof(float), (size_t) n_vocab, dump) != (size_t) n_vocab) {
+            std::fprintf(stderr, "strata generate: cannot write logits at position %lld\n", (long long) pos);
+            std::fclose(dump);
+            return 1;
+        }
+        {
+            // **993 KB OF SYNCHRONOUS D2H AND A 248,320-FLOAT HOST SCAN, EVERY TOKEN.**  (The review's notes
+            // say 151,936 floats; the artifact's `output.weight` is 248,320 rows, so the real figure is 1.6x
+            // that - a number nobody had checked because nothing measured this term.)  R2.6 asks for the dump
+            // and the scan to be behind flags; round 36 did exactly that and measured it SLOWER, because on
+            // this driver a large blocking readback is also what flushes the pipeline for the sampler that
+            // follows.  Timed so the claim can be re-checked rather than remembered.
+            const Clock::time_point n = Clock::now();
+            ms_readback += std::chrono::duration<double, std::milli>(n - tp).count();
+            tp = n;
+        }
+
+        int next = 0;
+        // The draw is Philox(seed, position), as in a verify window (row t at pos0 draws pos0 + t): a seed gives
+        // the same text whether a token comes from this path or from the speculative loop below.
+        sp.counter = (uint64_t) pos;
+        strata::kernels::sample_tokens(d_logits, 1, (int) n_vocab, nullptr, 0, sp, d_next, token_stream);
+        /*
+        DPCT1124:704: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
+                &next, d_next, sizeof(int))) != 0 ||
+            DPCT_CHECK_ERROR(strata::q_of(token_stream)->wait()) != 0) {
+            std::fprintf(
+                stderr,
+                "strata generate: reading the sampled token back failed: %s\n",
+                /*
+                DPCT1009:705: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010:706: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                dpct::get_error_string_dummy(0));
+            return 1;
+        }
+        // The sampled-token synchronization also completes every captured QSA
+        // status readback. Retain one status per layer so a later layer cannot
+        // hide an earlier failure; no extra synchronization or token allocation.
+        if (o.native_flash_attn_short) for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
+            const int32_t status = ss.qsa_states[i].host_step[strata::kernels::kStepCount];
+            if (status != 0) {
+                std::fprintf(stderr, "strata generate: native attention status %d at QSA layer %lld, position %lld\n",
+                             status, (long long) i, (long long) pos);
+                return 1;
+            }
+        }
+        if (next < 0 || next >= n_vocab) {
+            std::fprintf(stderr, "strata generate: the sampler returned %d, outside 0..%lld\n", next,
+                         (long long) (n_vocab - 1));
+            return 1;
+        }
+        {
+            // **TWO DEVICE-WIDE SYNCS FOR FOUR BYTES.**  `sample_tokens(nullptr)` ends in
+            // `cudaDeviceSynchronize()` (`sampler.cu:245`) and the blocking 4-byte read below is the second.
+            const Clock::time_point n = Clock::now();
+            ms_sample += std::chrono::duration<double, std::milli>(n - tp).count();
+            ++phase_tokens;
+        }
+        // CHARGED HERE, AFTER THE SAMPLER, so the wall-clock rate covers the whole token including the embedding,
+        // the NaN scan, the logits readback and the sample (A7).  Only DECODE positions count; prefill is
+        // measured separately.
+        if (pos >= n_prompt - 1) total_ms += std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
+        else prefill_ms += std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
+        if (pos == n_prompt - 1) ttft_ms = std::chrono::duration<double, std::milli>(Clock::now() - t_start).count();
+        // **THE PREDICTION AT THE LAST PROMPT POSITION *IS* THE FIRST GENERATED TOKEN.**  Sampling on every
+        // position and recording only from `n_prompt - 1` onward is what keeps the two cases from needing
+        // separate handling - and the version that "obviously" only samples after the prompt loses exactly one
+        // token's worth of conditioning.
+        if (pos >= n_prompt - 1) produced.push_back(next);
+        if ((int64_t) produced.size() >= o.max_new) break;
+        if (o.stop_eos && pos >= n_prompt - 1 &&
+            std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) next) != o.eos_ids.end()) break;
+        // TEACHER FORCING while the prompt lasts: the next input is the prompt's own next token, not the
+        // model's guess.  Feeding the guess would make the run depend on the model's own errors from position
+        // 1, which is a different (and worse) measurement of the same prompt.
+        // and the window advances: the token just decoded becomes the newest predecessor.
+        ss.ple_prev[0] = ss.ple_prev[1];
+        ss.ple_prev[1] = (int32_t) tok;
+        tok = (pos + 1 < n_prompt) ? o.tokens[(size_t) (pos + 1)] : next;
+        // Plan v0.3 P6: from the first generated token on, the speculative loop below takes over.
+        if (o.spec > 0 && pos >= n_prompt - 1) { spec_pos = pos + 1; break; }
+    }
+
+    // ================================ plan v0.3 P6: SPECULATIVE DECODING ================================
+    //
+    // Each round verifies [the last emitted token, drafts...] in one window; the window's argmax after token t
+    // is exactly what greedy decode would emit there, so the first draft that differs ends the round and the
+    // round emits (accepted drafts + 1) tokens.  `commit` keeps the state of the tokens that were emitted.
+    const bool ended = o.stop_eos && !produced.empty() &&
+                       std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) produced.back()) != o.eos_ids.end();
+    if (spec_pos > 0 && (int64_t) produced.size() < o.max_new && !ended) {
+        std::vector<int64_t> oracle;
+        if (!o.spec_oracle.empty()) {
+            std::ifstream in(o.spec_oracle);
+            std::string text((std::istreambuf_iterator<char>(in)), std::istreambuf_iterator<char>());
+            std::string e;
+            if (!in || !parse_i64_list(text.c_str(), oracle, e)) {
+                std::fprintf(stderr, "strata generate: cannot read --spec-oracle %s\n", o.spec_oracle.c_str());
+                return 2;
+            }
+        }
+        if (thits.d_res == nullptr) {
+            std::fprintf(stderr, "strata generate: --spec needs the device residency table (--expert-profile, "
+                                 "--expert-cache and the token graph)\n");
+            return 2;
+        }
+        mem_mark("the head and the prompt path");
+        strata::core::Verifier ver;
+        strata::core::VerifyHits vh;
+        vh.d_res = thits.d_res;
+        vh.cache_base = thits.cache_base;
+        vh.blob = thits.blob;
+        vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers
+        vh.n_slots = xcache.slots();
+        if (!ver.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        const bool use_mtp = !o.mtp.empty();
+        if (use_mtp && !mtp.bind(wt, &native_head, ver.final_R_all(), err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        mem_mark("the verifier and the drafter's binding");
+        ver.set_sampling(sp);   // the CLI's own sampling (until 0.1.19 this loop was always greedy); no penalties here
+        ver.set_split(o.spec_split);
+        // auto: the copy kernel for every pack.  DMA (the native packs' default until 0.1.13) has the host call
+        // cudaMemcpyAsync + cudaLaunchHostFunc inside a verify window while the GPU spins on the flag they raise;
+        // issue #31's thread dumps show the host stuck in that cudaMemcpyAsync on a driver lock for good.  The copy
+        // kernel needs no host CUDA call there, and costs ~1-3% decode on IQ3_S (45.3 -> 44.8 tok/s, 8 requests).
+        ver.set_pcie_mode(o.pcie_mode == "dma" ? 0 : o.pcie_mode == "direct" ? 1 : 2);
+        drive.d.plan = ver.plan_sink();
+        drive.d.pcie_num = (int) (o.pcie_frac * 256.0 + 0.5);
+        if (drive.d.pcie_num < 0) drive.d.pcie_num = 0;
+        if (drive.d.pcie_num > 256) drive.d.pcie_num = 256;
+        const int64_t pcie0 = drive.d.pcie_experts;
+        if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
+        int64_t swaps_total = 0;
+        double ms_adapt = 0;
+        dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
+        /*
+        DPCT1025:707: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        if (!drive.d.usage.empty() &&
+            DPCT_CHECK_ERROR(
+                adapt_stream = dpct::get_current_device().create_queue(true)) !=
+                0) {
+            std::fprintf(stderr, "strata generate: cannot create the refill stream\n");
+            return 1;
+        }
+        // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
+        std::vector<std::pair<int32_t, int32_t>> pending;
+        dpct::event_ptr adapt_ev = nullptr;
+        adapt_ev = new sycl::event();
+        auto apply_pending = [&](bool wait) {
+            try {
+        if (pending.empty()) return;
+            if (wait) adapt_ev->wait_and_throw();
+            else if (adapt_ev->get_info<
+                         sycl::info::event::command_execution_status>() !=
+                     sycl::info::event_command_status::complete) return;
+            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            pending.clear();
+            if (d_res != nullptr)
+                /*
+                DPCT1114:708: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
+                */
+                dpct::get_in_order_queue().memcpy(
+                    d_res, host_res.data(), host_res.size() * sizeof(int32_t));
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        // Plan v0.3 P6: the VRAM tier follows the conversation.  Candidates are missing experts routed at least
+        // twice (decayed); each is paired with its layer's least-routed resident expert and swapped when it was
+        // routed clearly more often.  Copies run between rounds, when the GPU is idle.
+        auto adapt = [&]() -> bool {
+            const Clock::time_point ta = Clock::now();
+            if (!pending.empty()) return true;   // the previous swaps are still in flight
+            struct Swap { float gain; int32_t layer, in, out; };
+            std::vector<Swap> swaps;
+            std::vector<std::pair<float, int32_t>> cand, vict;
+            for (int64_t l = 0; l < g.n_layers; ++l) {
+                cand.clear();
+                vict.clear();
+                const float* u = drive.d.usage.data() + l * g.n_expert;
+                const int32_t* r = host_res.data() + l * g.n_expert;
+                for (int32_t e = 0; e < (int32_t) g.n_expert; ++e) {
+                    if (r[e] < 0) { if (u[e] >= 2.0f) cand.emplace_back(u[e], e); }
+                    else vict.emplace_back(u[e], e);
+                }
+                if (cand.empty() || vict.empty()) continue;
+                std::sort(cand.begin(), cand.end(), [](auto& a, auto& b) { return a.first > b.first; });
+                const size_t nc = std::min(cand.size(), vict.size());
+                std::partial_sort(vict.begin(), vict.begin() + (ptrdiff_t) nc, vict.end(),
+                                  [](auto& a, auto& b) { return a.first < b.first; });
+                for (size_t i = 0; i < nc; ++i) {
+                    if (cand[i].first < vict[i].first + 1.5f) break;
+                    swaps.push_back({cand[i].first - vict[i].first, (int32_t) l, cand[i].second, vict[i].second});
+                }
+            }
+            std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
+            if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
+            for (const Swap& s : swaps) {
+                const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
+                const int32_t slot = host_res[out];
+                const uint8_t* b = srcp->blob(s.layer, s.in);
+                // asynchronous: the copies run while the MTP drafts; the next window waits for them
+                if (slot < 0 || b == nullptr ||
+                    /*
+                    DPCT1124:709: cudaMemcpyAsync is migrated to asynchronous
+                    memcpy API. While the origin API might be synchronous, it
+                    depends on the type of operand memory, so you may need to
+                    call wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    DPCT_CHECK_ERROR(adapt_stream->memcpy(
+                        xcache.device_slot(slot), b,
+                        (size_t)strata::kernels::cpu::expert_layout()
+                            .blob_bytes(s.layer))) != 0) {
+                    std::fprintf(stderr, "strata generate: an adaptive refill failed\n");
+                    return false;
+                }
+                host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
+            }
+            if (!swaps.empty()) dpct::sync_barrier(adapt_ev, adapt_stream);
+            for (float& v : drive.d.usage) v *= 0.7f;
+            swaps_total += (int64_t) swaps.size();
+            ms_adapt += std::chrono::duration<double, std::milli>(Clock::now() - ta).count();
+            return true;
+        };
+        int64_t p = spec_pos;
+        int32_t x = (int32_t) tok;
+        std::vector<int32_t> drafts((size_t) o.spec, 0);
+        std::vector<float> dprob((size_t) o.spec, 1.0f);
+        std::vector<int64_t> window_hist((size_t) o.spec + 1, 0);
+        // plan v0.3 P6: with a native pack the first window is the last prompt token alone (it produces the first
+        // generated token and the MTP's first cell); otherwise the token loop already did that.
+        bool first_window = native_pack;
+        if (use_mtp && !first_window &&
+            !mtp.draft_first(o.spec, ss.R, x, p - 1, drafts.data(), err, dprob.data(), (float) o.spec_min_p)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::vector<int32_t> window((size_t) o.spec), outv((size_t) o.spec);
+        std::vector<int64_t> accepted_hist((size_t) o.spec, 0);
+        int64_t rounds = 0, drafts_total = 0, drafts_ok = 0, corrupt_counter = 0;
+        const int S_mtp = o.mtp_max_t > 0 ? std::min(o.mtp_max_t, o.spec) : o.spec;
+        if (use_mtp && S_mtp < o.spec) mtp.set_max_drafts(S_mtp - 1);
+        strata::spec::SuffixDrafter sfx(std::max(1, o.suffix_draft), 64, (size_t) o.max_context + 4096);
+        strata::spec::DraftPolicy policy(o.spec);   // MTP or lookup window (see draft_policy.hpp)
+        std::vector<int32_t> sbuf((size_t) o.spec, 0);
+        int64_t sfx_windows = 0, sfx_drafts = 0, sfx_ok = 0;
+        if (o.suffix_draft > 0) {
+            for (int64_t t : o.tokens) sfx.append((int32_t) t);
+            for (int64_t t : produced) sfx.append((int32_t) t);
+        }
+        const double pool_ms0 = drive.cpu_ms;
+        const int64_t misses0 = drive.d.multi_misses, entries0 = drive.d.multi_entries;
+        while ((int64_t) produced.size() < o.max_new) {
+            const Clock::time_point t0 = Clock::now();
+            int T = S_mtp;
+            if (use_mtp && o.spec_min_p > 0.0) {
+                T = 1;
+                while (T < S_mtp && dprob[(size_t) T - 1] >= (float) o.spec_min_p) ++T;
+            }
+            if (first_window) T = 1;
+            bool from_sfx = false;
+            int sfx_match = 0;
+            if (o.suffix_draft > 0 && !first_window) {
+                const int k = sfx.propose(o.spec - 1, sbuf.data());
+                sfx_match = sfx.last_match();
+                if (k > 0 && (!use_mtp || sbuf[0] == drafts[0])) {
+                    const strata::spec::DraftPolicy::Pick pk = policy.choose(T, k, sfx_match);
+                    if (pk.lookup) { T = pk.t; from_sfx = true; }
+                }
+            }
+            const bool timed_round = !first_window;
+            ++window_hist[(size_t) T];
+            if (p + T > o.max_context) {
+                std::fprintf(stderr, "strata generate: ran out of context at position %lld\n", (long long) p);
+                return 2;
+            }
+            window[0] = x;
+            for (int i = 1; i < T; ++i) {
+                const size_t at = produced.size() - 1 + (size_t) i;
+                int32_t d = from_sfx ? sbuf[(size_t) i - 1] : use_mtp ? drafts[(size_t) i - 1]
+                                                    : at < oracle.size() ? (int32_t) oracle[at] : 0;
+                if (o.spec_corrupt > 0 && (++corrupt_counter % o.spec_corrupt) == 0) d = (d + 1) % (int32_t) n_vocab;
+                window[(size_t) i] = d;
+            }
+            drive.d.layers = 0;
+            drive.d.experts = 0;
+            drive.d.failed = false;
+            apply_pending(false);
+            if (!ver.run(T, window.data(), p, &drive_pool_multi, &drive, outv.data(), err)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            if (drive.d.failed) {
+                std::fprintf(stderr, "strata generate: the expert pool failed at layer %lld expert %lld: %s\n",
+                             (long long) drive.d.fail_layer, (long long) drive.d.fail_expert,
+                             drive.d.fail ? drive.d.fail : "(no message)");
+                return 1;
+            }
+            int a = 0;
+            while (a < T - 1 && window[(size_t) a + 1] == outv[(size_t) a]) ++a;
+            if (first_window) {
+                first_window = false;
+                ttft_ms = std::chrono::duration<double, std::milli>(Clock::now() - t_start).count();
+            }
+            // plan v0.3 P6: the adaptive tier's host work (ranking, copy submission) runs on its own thread while the
+            // GPU commits and drafts; it touches only the residency tables, which nothing reads until the next window
+            std::thread adapt_thr;
+            bool adapt_ok = true;
+            if (!drive.d.usage.empty() && ((rounds + 1) % o.adapt_every) == 0)
+                adapt_thr = std::thread([&] { adapt_ok = adapt(); });
+            if (!ver.commit(a + 1, err)) {
+                if (adapt_thr.joinable()) adapt_thr.join();
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            ++rounds;
+            drafts_total += T - 1;
+            drafts_ok += a;
+            ++accepted_hist[(size_t) a];
+            if (from_sfx) { ++sfx_windows; sfx_drafts += T - 1; sfx_ok += a; }
+            bool eos = false;
+            for (int i = 0; i <= a && (int64_t) produced.size() < o.max_new && !eos; ++i) {
+                produced.push_back(outv[(size_t) i]);
+                if (o.suffix_draft > 0) sfx.append(outv[(size_t) i]);
+                eos = o.stop_eos && std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) outv[(size_t) i]) != o.eos_ids.end();
+            }
+            if (eos) {
+                if (adapt_thr.joinable()) adapt_thr.join();
+                total_ms += std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
+                break;
+            }
+            const bool drafted = !use_mtp || (int64_t) produced.size() >= o.max_new ||
+                                 mtp.draft(T, outv.data(), p, a, drafts.data(), err, dprob.data(), (float) o.spec_min_p);
+            if (adapt_thr.joinable()) adapt_thr.join();
+            if (!adapt_ok) return 1;
+            if (!drafted) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            x = outv[(size_t) a];
+            p += a + 1;
+            const double round_ms = std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
+            total_ms += round_ms;
+            if (timed_round) policy.observe(from_sfx, T, a, sfx_match, round_ms);
+            if (rounds % 64 == 0)
+                std::fprintf(stderr, "strata generate: position %lld, %lld tokens, %lld rounds\n", (long long) p,
+                             (long long) produced.size(), (long long) rounds);
+        }
+        std::printf("%-24s %lld rounds of %d, drafts accepted %lld of %lld (%.3f), %.2f tokens per round\n",
+                    "speculation", (long long) rounds, o.spec, (long long) drafts_ok, (long long) drafts_total,
+                    drafts_total > 0 ? (double) drafts_ok / (double) drafts_total : 0.0,
+                    rounds > 0 ? (double) (drafts_ok + rounds) / (double) rounds : 0.0);
+        if (o.spec_min_p > 0.0) {
+            std::printf("%-24s", "window sizes");
+            for (size_t i = 1; i < window_hist.size(); ++i) std::printf(" T%zu:%lld", i, (long long) window_hist[i]);
+            std::printf("  (min draft probability %.2f)\n", o.spec_min_p);
+        }
+        if (o.suffix_draft > 0)
+            std::printf("%-24s %lld windows, drafts accepted %lld of %lld\n", "suffix drafts", (long long) sfx_windows,
+                        (long long) sfx_ok, (long long) sfx_drafts);
+        std::printf("%-24s", "accepted per round");
+        for (size_t i = 0; i < accepted_hist.size(); ++i) std::printf(" %zu:%lld", i, (long long) accepted_hist[i]);
+        std::printf("\n");
+        if (rounds > 0)
+            std::printf("%-24s wait for rings %.3f  pool %.3f  host %.3f  commit %.3f ms/round; CPU experts %.2f "
+                        "distinct / %.2f routed per layer\n",
+                        "verify window", ver.ms_wait / rounds, ver.ms_pool / rounds, ver.ms_host / rounds,
+                        ver.ms_commit / rounds,
+                        (double) (drive.d.multi_misses - misses0) / (double) (rounds * g.n_layers),
+                        (double) (drive.d.multi_entries - entries0) / (double) (rounds * g.n_layers));
+        if (rounds > 0)
+            std::printf("%-24s gate/up %.3f  quantize %.3f  down %.3f ms/round; %.1f GB/s over the rows phases; "
+                        "CPU pool call %.3f ms/round\n", "pool multi", pool.ms_multi_gu / rounds,
+                        pool.ms_multi_q / rounds, pool.ms_multi_down / rounds,
+                        (double) pool.multi_bytes / 1e6 / std::max(1e-9, pool.ms_multi_gu + pool.ms_multi_down),
+                        (drive.cpu_ms - pool_ms0) / rounds);
+        if (rounds > 0)
+            std::printf("%-24s plan %.3f  activation quantize %.3f  jobs %.3f  run %.3f ms/round\n", "dispatch",
+                        drive.d.ms_plan / rounds, drive.d.ms_actq / rounds, drive.d.ms_jobs / rounds,
+                        drive.d.ms_run / rounds);
+        if (rounds > 0 && !drive.d.usage.empty())
+            std::printf("%-24s %lld experts swapped into the VRAM tier (every %d rounds, %.3f ms/round)\n", "adaptive tier",
+                        (long long) swaps_total, o.adapt_every, ms_adapt / rounds);
+        if (rounds > 0 && drive.d.pcie_num > 0)
+            std::printf("%-24s %.2f distinct experts per layer read over PCIe (share %d/256 of the misses)\n",
+                        "pcie experts", (double) (drive.d.pcie_experts - pcie0) / (double) (rounds * g.n_layers),
+                        drive.d.pcie_num);
+        (void) pool_ms0;
+        if (use_mtp && rounds > 0)
+            std::printf("%-24s %.3f ms/round drafting (%lld rounds), MTP prompt %.1f ms, %.0f MiB of VRAM\n", "mtp",
+                        mtp.ms_draft / (double) mtp.rounds, (long long) mtp.rounds, mtp.ms_prefill,
+                        (double) mtp.vram_bytes() / 1048576.0);
+    }
+
+    if (dump != nullptr && std::fclose(dump) != 0) {
+        std::fprintf(stderr, "strata generate: cannot finish logits dump\n");
+        return 1;
+    }
+    if (layer_dump != nullptr) {
+        std::fclose(layer_dump);
+        sycl::free(layer_stage, dpct::get_in_order_queue());
+        std::printf("%-24s %s (%lld layers + the input x %d streams x %lld per position)\n", "layers dumped",
+                    o.dump_layers.c_str(), (long long) g.n_layers, (int) g.hc, (long long) g.n_embd);
+    }
+    if (half_dump != nullptr) {
+        std::fclose(half_dump);
+        sycl::free(half_stage, dpct::get_in_order_queue());
+        std::printf("%-24s %s (%lld layers x %llu per position)\n", "halves dumped", o.dump_halves.c_str(),
+                    (long long) g.n_layers, (unsigned long long) half_stride);
+    }
+    if (routing != nullptr) {
+        std::fclose(routing);
+        drive.routing = nullptr;
+        std::printf("%-24s %s (%lld records of layer, k, ids, weights)\n", "routing dumped",
+                    o.dump_routing.c_str(), (long long) drive.calls);
+    }
+    if (o.stage_timing) strata::core::stage_timing_report(g.n_layers);
+
+    const int64_t decoded = (int64_t) produced.size();
+    std::printf("prompt  :");
+    for (int64_t t : o.tokens) std::printf(" %lld", (long long) t);
+    std::printf("\noutput  :");
+    for (int64_t t : produced) std::printf(" %lld", (long long) t);
+    std::printf("\n");
+    const double decode_ms = decoded > 0 ? total_ms / (double) decoded : 0.0;
+    std::printf("%-24s %lld tokens in %.1f ms  ->  %.2f tok/s\n", "decode", (long long) decoded, total_ms,
+                decode_ms > 0.0 ? 1000.0 / decode_ms : 0.0);
+    if (n_prompt > 1)
+        std::printf("%-24s %lld tokens in %.1f ms  ->  %.2f tok/s  (time to first token %.1f ms)\n", "prefill",
+                    (long long) (n_prompt - 1), prefill_ms,
+                    prefill_ms > 0 ? 1000.0 * (double) (n_prompt - 1) / prefill_ms : 0.0, ttft_ms);
+    if (!o.dump_mixed.empty()) {
+        std::vector<float> mx((size_t) g.n_embd);
+        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                 .memcpy(mx.data(), ss.block.mixed,
+                                         mx.size() * sizeof(float))
+                                 .wait()) != 0) {
+            std::fprintf(stderr, "strata generate: reading mixed back failed\n");
+            return 1;
+        }
+        std::FILE* mf = std::fopen(o.dump_mixed.c_str(), "wb");
+        if (mf == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_mixed.c_str());
+            return 1;
+        }
+        std::fwrite(mx.data(), sizeof(float), mx.size(), mf);
+        std::fclose(mf);
+        double s2 = 0, mag = 0;
+        for (float v : mx) { s2 += (double) v * (double) v; mag += std::fabs((double) v); }
+        std::printf("%-24s %s (n_embd %lld, rms %.5g, mean|.| %.5g)\n", "mixed dumped", o.dump_mixed.c_str(),
+                    (long long) g.n_embd, std::sqrt(s2 / (double) mx.size()), mag / (double) mx.size());
+    }
+
+    // ---- the residual, for bisecting the head against the layers (see `dump_residual`'s note)
+    if (!o.dump_residual.empty()) {
+        std::vector<float> R((size_t) g.hc * g.n_embd);
+        if (DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue()
+                    .memcpy(R.data(), ss.R, R.size() * sizeof(float))
+                    .wait()) != 0) {
+            std::fprintf(stderr, "strata generate: reading R back failed\n");
+            return 1;
+        }
+        std::FILE* rf = std::fopen(o.dump_residual.c_str(), "wb");
+        if (rf == nullptr) {
+            std::fprintf(stderr, "strata generate: cannot write %s\n", o.dump_residual.c_str());
+            return 1;
+        }
+        const int32_t hdr[2] = {(int32_t) g.hc, (int32_t) g.n_embd};
+        std::fwrite(hdr, sizeof hdr, 1, rf);
+        std::fwrite(R.data(), sizeof(float), R.size(), rf);
+        std::fclose(rf);
+        double mag = 0, mx = 0;
+        int bad = 0;
+        for (float v : R) {
+            if (!std::isfinite(v)) ++bad;
+            else { mag += std::fabs((double) v); mx = std::max(mx, (double) std::fabs((double) v)); }
+        }
+        std::printf("%-24s %s (%d x %lld, nonfinite %d, mean|.| %.4g, max|.| %.4g)\n", "residual dumped",
+                    o.dump_residual.c_str(), (int) g.hc, (long long) g.n_embd, bad, mag / (double) R.size(), mx);
+    }
+
+    if (o.stats) {
+        std::printf("%-24s %.3f ms/token (WALL CLOCK: embed, layers, head, sample)\n", "  per token", decode_ms);
+        // **THE PER-TOKEN HOST TERM, WHICH `--gpu-only-full` CANNOT SEE.**  That measurement never enters the
+        // token loop, so it excludes all six of these.  On the 78-token fixture + 200 generated tokens the six
+        // sum to ~9 ms of non-layer work against ~1.5 ms of actual head GPU work - 16% of the token, and it is
+        // not the pool.
+        if (phase_tokens > 0) {
+            const double pt = (double) phase_tokens;
+            std::printf("%-24s PLE %.3f  embed %.3f  LAYERS %.3f  head %.3f  readback %.3f  sample %.3f  "
+                        "(sum %.3f of %.3f ms)\n",
+                        "  token host phases", ms_ple / pt, ms_embed / pt, ms_layers / pt, ms_head / pt,
+                        ms_readback / pt, ms_sample / pt,
+                        (ms_ple + ms_embed + ms_layers + ms_head + ms_readback + ms_sample) / pt, decode_ms);
+        }
+        if (const std::string io = ple_table.io_report(); !io.empty()) std::printf("  %s\n", io.c_str());
+        // **THE DENOMINATOR IS THE POSITIONS THE POOL ACTUALLY RAN ON, NOT THE DECODED TOKENS (A6).**
+        // `drive_pool` is called once per layer per position and PREFILL runs the loop too, so accumulating
+        // `cpu_ms` over prefill and then dividing by `decoded` inflates this figure.  `drive.calls / n_layers`
+        // is the number of positions - the same correction the ring counters below already received, which is
+        // why they print "of 192" rather than "240 of 192".
+        const double pool_positions = g.n_layers > 0 ? (double) drive.calls / (double) g.n_layers : 0.0;
+        std::printf("%-24s %.3f ms/token over %lld layers (%.0f positions, %lld dispatches)\n",
+                    "  the CPU expert pool", pool_positions > 0.0 ? drive.cpu_ms / pool_positions : 0.0,
+                    (long long) g.n_layers, pool_positions, (long long) drive.calls);
+        // **AND WHERE INSIDE `run()` IT WENT.**  Three phases per layer and they were one number, which cannot
+        // tell a pool that is slow at the WORK from one that is slow at the SYNCHRONISATION - opposite fixes.
+        // Wait-for-park is expected to be ~0 (the workers re-parked at the end of the previous layer); the
+        // question is whether the time is in the drain or in the re-park barrier.
+        if (pool_positions > 0.0) {
+            double wp = 0, dr = 0, rp = 0;
+            pool.phase_ms(wp, dr, rp);
+            const double per = pool_positions;
+            std::printf("%-24s   wait-park %.3f  drain %.3f  re-park %.3f  ms/token\n",
+                        "  pool phases", wp / per, dr / per, rp / per);
+        }
+        std::printf("%-24s %lld blobs read\n", "  expert blobs", (long long) srcp->reads());
+        for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
+            std::printf("  CUDA%d experts           %lld routed entries computed\n",
+                        r + 1, (long long) remote_experts[(size_t) r].computed());
+        // ---- **R4's DISPATCH MEASUREMENT: h, ON THE ENGINE'S OWN ROUTING.**  No offline trace, no corpus
+        // question, no k-fold - these are the ids the router actually produced on this run.  Reported as
+        // hits/lookups so it can be read directly as the h the cache would deliver, and alongside `refused`
+        // so a full cache is visible rather than silently capping the rate.
+        if (o.expert_cache > 0) {
+            const int64_t look = drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused;
+            const int64_t hl = drive.d.hit_ready + drive.d.hit_late;
+            std::printf("%-24s %lld of %lld layers the hit work was DONE when the pool returned\n",
+                        "  R4 overlap", (long long) drive.d.hit_ready, (long long) hl);
+            std::printf("%-24s %lld of %lld = %.4f      (%lld admitted, %lld refused, cache %.4f%% full)\n",
+                        "  R4 expert-cache hits", (long long) drive.d.cache_hits, (long long) look,
+                        look > 0 ? (double) drive.d.cache_hits / (double) look : 0.0,
+                        (long long) drive.d.cache_admitted, (long long) drive.d.cache_refused,
+                        100.0 * (double) (drive.d.cache_admitted + drive.d.cache_hits > 0
+                                              ? (double) xcache.resident() / (double) xcache.slots()
+                                              : 0.0));
+        }
+        if (tgraph.captured && tgraph.calls > 0) {
+            const double per = (double) tgraph.calls;
+            std::printf("%-24s wait for rings %.3f  pool %.3f ms/token  (%lld flushes over %lld positions)\n",
+                        "  token graph", tgraph.ms_wait / per, tgraph.ms_pool / per, (long long) tgraph.flushes,
+                        (long long) tgraph.calls);
+        }
+        if (gr.captured && gr.calls_total > 0) {
+            // The counters are CUMULATIVE over every `session_loop` call, and PREFILL runs the loop too - so
+            // the denominator is the number of positions, not the number of generated tokens.  Dividing by
+            // `n_layers * decoded` printed "240 of 192", which is a reporting bug that looks like a ring
+            // firing more often than it should.
+            const int64_t positions = gr.calls_total;
+            std::printf("%-24s %lld of %lld over %lld positions\n", "  rings seen MID-GRAPH",
+                        (long long) gr.rings_mid_graph, (long long) (g.n_layers * positions),
+                        (long long) positions);
+            std::printf("%-24s %.3f ms of a %.3f ms layer\n", "  ring latency",
+                        gr.ms_to_ring / (double) (g.n_layers * positions), decode_ms / (double) g.n_layers);
+            // **THE ROUND TRIP, SPLIT AT THE RING.**  `ring latency` is the first half and stops when the ring
+            // is seen; this is the second half - the driver calls after it, during which the GPU is IDLE
+            // because `post[l]` has not been launched yet.  `--no-pool` is the arm that isolates it: 38.73
+            // ms/token against a 26.32 ms pure-GPU floor is 12.4 ms of round trip with no expert work at all.
+            //
+            // Same denominator as the pool line above (the positions the loop actually ran on), so the two can
+            // be added without one of them being inflated by prefill.
+            const double perlap = (double) (g.n_layers * positions);
+            std::printf("%-24s %.3f ms/token over %.0f positions (%.3f ms/layer, after the ring)\n",
+                        "  host after ring", pool_positions > 0.0 ? gr.ms_host / pool_positions : 0.0,
+                        pool_positions, gr.ms_host / perlap);
+        }
+    }
+
+    if (dump != nullptr) std::printf("%-24s %s\n", "logits dumped", o.dump_logits.c_str());
+
+    strata::core::session_graphs_free(gr);
+    strata::core::doorbell_free(db);
+    sycl::free(d_next, dpct::get_in_order_queue());
+    sycl::free(d_logits, dpct::get_in_order_queue());
+    sycl::free(d_emb, dpct::get_in_order_queue());
+    sycl::free(d_parts, dpct::get_in_order_queue());
+    sycl::free(sbuf, dpct::get_in_order_queue());
+    sycl::free(arena, dpct::get_in_order_queue());
+    return 0;
+}
diff --git a/sycl/third_party/ggml/ggml-common.h b/sycl/third_party/ggml/ggml-common.h
new file mode 100644
index 00000000000..7f68b692b0d
--- /dev/null
+++ b/sycl/third_party/ggml/ggml-common.h
@@ -0,0 +1,2193 @@
+#ifndef GGML_COMMON_DECL
+
+#if defined(GGML_COMMON_DECL_C)
+#include <stdint.h>
+
+typedef uint16_t ggml_half;
+typedef uint32_t ggml_half2;
+
+#define GGML_COMMON_AGGR_U
+#define GGML_COMMON_AGGR_S
+
+#define GGML_COMMON_DECL
+#elif defined(GGML_COMMON_DECL_CPP)
+#include <cstdint>
+
+typedef uint16_t ggml_half;
+typedef uint32_t ggml_half2;
+
+// std-c++ allow anonymous unions but some compiler warn on it
+#define GGML_COMMON_AGGR_U data
+// std-c++ do not allow it.
+#define GGML_COMMON_AGGR_S data
+
+#define GGML_COMMON_DECL
+#elif defined(GGML_COMMON_DECL_METAL)
+#include <metal_stdlib>
+
+typedef half  ggml_half;
+typedef half2 ggml_half2;
+
+#define GGML_COMMON_AGGR_U
+#define GGML_COMMON_AGGR_S
+
+#define GGML_COMMON_DECL
+#elif defined(GGML_COMMON_DECL_CUDA)
+#if defined(GGML_COMMON_DECL_MUSA)
+#include <musa_fp16.h>
+#else
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#endif
+#include <cstdint>
+
+typedef sycl::half ggml_half;
+typedef sycl::half2 ggml_half2;
+
+#define GGML_COMMON_AGGR_U
+#define GGML_COMMON_AGGR_S data
+
+#define GGML_COMMON_DECL
+#elif defined(GGML_COMMON_DECL_HIP)
+#include <hip/hip_fp16.h>
+#include <cstdint>
+
+typedef half  ggml_half;
+typedef half2 ggml_half2;
+
+#define GGML_COMMON_AGGR_U
+#define GGML_COMMON_AGGR_S data
+
+#define GGML_COMMON_DECL
+#elif defined(GGML_COMMON_DECL_SYCL)
+#include <sycl/half_type.hpp>
+#include <cstdint>
+
+typedef sycl::half  ggml_half;
+typedef sycl::half2 ggml_half2;
+
+#define GGML_COMMON_AGGR_U
+#define GGML_COMMON_AGGR_S data
+
+#define GGML_COMMON_DECL
+#endif
+
+#if defined(GGML_COMMON_DECL)
+
+#ifndef __cplusplus
+#ifndef static_assert
+#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201100L)
+#define static_assert(cond, msg) _Static_assert(cond, msg)
+#else
+#define static_assert(cond, msg) struct global_scope_noop_trick
+#endif
+#endif
+#endif // __cplusplus
+
+// QK = number of values after dequantization
+// QK_K = super-block size
+
+#define QK_K 256
+#define K_SCALE_SIZE 12
+
+#if defined(GGML_COMMON_DECL_CUDA) || defined(GGML_COMMON_DECL_HIP) || defined(GGML_COMMON_DECL_SYCL)
+// QR = QK / number of values before dequantization
+// QI = number of 32 bit integers before dequantization
+
+#define QI1_0 (QK1_0 / 32)
+#define QR1_0 1
+
+#define QI2_0 (QK2_0 / 32)
+#define QR2_0 1
+
+
+#define QI4_0 (QK4_0 / (4 * QR4_0))
+#define QR4_0 2
+
+#define QI4_1 (QK4_1 / (4 * QR4_1))
+#define QR4_1 2
+
+#define QI_MXFP4 (QK_MXFP4 / (4 * QR_MXFP4))
+#define QR_MXFP4 2
+
+#define QI_NVFP4 (QK_NVFP4 / (4 * QR_NVFP4))
+#define QR_NVFP4 2
+
+#define QI5_0 (QK5_0 / (4 * QR5_0))
+#define QR5_0 2
+
+#define QI5_1 (QK5_1 / (4 * QR5_1))
+#define QR5_1 2
+
+#define QI8_0 (QK8_0 / (4 * QR8_0))
+#define QR8_0 1
+
+#define QI8_1 (QK8_1 / (4 * QR8_1))
+#define QR8_1 1
+
+#define QI2_K (QK_K / (4*QR2_K))
+#define QR2_K 4
+
+#define QI3_K (QK_K / (4*QR3_K))
+#define QR3_K 4
+
+#define QI4_K (QK_K / (4*QR4_K))
+#define QR4_K 2
+
+#define QI5_K (QK_K / (4*QR5_K))
+#define QR5_K 2
+
+#define QI6_K (QK_K / (4*QR6_K))
+#define QR6_K 2
+
+#define QI2_XXS (QK_K / (4*QR2_XXS))
+#define QR2_XXS 4
+
+#define QI2_XS (QK_K / (4*QR2_XS))
+#define QR2_XS 4
+
+#define QI2_S (QK_K / (4*QR2_S))
+#define QR2_S 4
+
+#define QI3_XXS (QK_K / (4*QR3_XXS))
+#define QR3_XXS 4
+
+#define QI3_XS (QK_K / (4*QR3_XS))
+#define QR3_XS 4
+
+#define QI1_S (QK_K / (4*QR1_S))
+#define QR1_S 8
+
+#define QI1_M (QK_K / (4*QR1_M))
+#define QR1_M 8
+
+#define QI4_NL (QK4_NL / (4*QR4_NL))
+#define QR4_NL 2
+
+#define QI4_XS (QK_K / (4*QR4_XS))
+#define QR4_XS 2
+
+#define QI3_S (QK_K / (4*QR3_S))
+#define QR3_S 4
+
+#endif // GGML_COMMON_DECL_CUDA || GGML_COMMON_DECL_HIP
+
+#ifdef _MSC_VER
+#define GGML_EXTENSION
+#else // _MSC_VER
+#define GGML_EXTENSION __extension__
+#endif // _MSC_VER
+
+#define QK1_0 128
+typedef struct dpct_type_176557 {
+    ggml_half d;           // delta
+    uint8_t qs[QK1_0 / 8]; // bits / quants
+} block_q1_0;
+static_assert(sizeof(block_q1_0) == sizeof(ggml_half) + QK1_0 / 8, "wrong q1_0 block size/padding");
+
+#define QK2_0 64
+typedef struct dpct_type_169569 {
+    ggml_half d;              // delta (scale)
+    uint8_t qs[QK2_0 / 4];   // 2 bits per element
+} block_q2_0;
+static_assert(sizeof(block_q2_0) == sizeof(ggml_half) + QK2_0 / 4, "wrong q2_0 block size/padding");
+
+#define QK4_0 32
+typedef struct dpct_type_270674 {
+    ggml_half d;           // delta
+    uint8_t qs[QK4_0 / 2]; // nibbles / quants
+} block_q4_0;
+static_assert(sizeof(block_q4_0) == sizeof(ggml_half) + QK4_0 / 2, "wrong q4_0 block size/padding");
+
+#define QK4_1 32
+typedef struct dpct_type_161308 {
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d; // delta
+            ggml_half m; // min
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 dm;
+    } GGML_COMMON_AGGR_U;
+    uint8_t qs[QK4_1 / 2]; // nibbles / quants
+} block_q4_1;
+static_assert(sizeof(block_q4_1) == 2 * sizeof(ggml_half) + QK4_1 / 2, "wrong q4_1 block size/padding");
+
+#define QK_MXFP4 32
+typedef struct dpct_type_632229 {
+    uint8_t e; // E8M0
+    uint8_t qs[QK_MXFP4/2];
+} block_mxfp4;
+static_assert(sizeof(block_mxfp4) == sizeof(uint8_t) + QK_MXFP4/2, "wrong mxfp4 block size/padding");
+
+#define QK_NVFP4 64
+#define QK_NVFP4_SUB 16  // sub-block size for per-group scales
+typedef struct dpct_type_129888 {
+    uint8_t d[QK_NVFP4/QK_NVFP4_SUB]; // UE4M3 scales (4 bytes, one per 16-element sub-block)
+    uint8_t qs[QK_NVFP4/2];           // packed 4-bit E2M1 values (32 bytes)
+} block_nvfp4;
+static_assert(sizeof(block_nvfp4) == sizeof(uint8_t)*(QK_NVFP4/QK_NVFP4_SUB) + QK_NVFP4/2, "wrong nvfp4 block size/padding");
+
+#define QK5_0 32
+typedef struct dpct_type_150588 {
+    ggml_half d;           // delta
+    uint8_t qh[4];         // 5-th bit of quants
+    uint8_t qs[QK5_0 / 2]; // nibbles / quants
+} block_q5_0;
+static_assert(sizeof(block_q5_0) == sizeof(ggml_half) + sizeof(uint32_t) + QK5_0 / 2, "wrong q5_0 block size/padding");
+
+#define QK5_1 32
+typedef struct dpct_type_101666 {
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d; // delta
+            ggml_half m; // min
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 dm;
+    } GGML_COMMON_AGGR_U;
+    uint8_t qh[4];         // 5-th bit of quants
+    uint8_t qs[QK5_1 / 2]; // nibbles / quants
+} block_q5_1;
+static_assert(sizeof(block_q5_1) == 2 * sizeof(ggml_half) + sizeof(uint32_t) + QK5_1 / 2, "wrong q5_1 block size/padding");
+
+#define QK8_0 32
+typedef struct dpct_type_629246 {
+    ggml_half d;       // delta
+    int8_t  qs[QK8_0]; // quants
+} block_q8_0;
+static_assert(sizeof(block_q8_0) == sizeof(ggml_half) + QK8_0, "wrong q8_0 block size/padding");
+
+#define QK8_1 32
+typedef struct dpct_type_105592 {
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d; // delta
+            ggml_half s; // d * sum(qs[i])
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 ds;
+    } GGML_COMMON_AGGR_U;
+    int8_t qs[QK8_1]; // quants
+} block_q8_1;
+static_assert(sizeof(block_q8_1) == 2*sizeof(ggml_half) + QK8_1, "wrong q8_1 block size/padding");
+
+//
+// Ternary quantization
+//
+
+// 1.6875 bpw
+typedef struct dpct_type_176150 {
+    uint8_t qs[(QK_K - 4 * QK_K / 64) / 5]; // 5 elements per byte (3^5 = 243 < 256)
+    uint8_t qh[QK_K/64]; // 4 elements per byte
+    ggml_half d;
+} block_tq1_0;
+static_assert(sizeof(block_tq1_0) == sizeof(ggml_half) + QK_K / 64 + (QK_K - 4 * QK_K / 64) / 5, "wrong tq1_0 block size/padding");
+
+// 2.0625 bpw
+typedef struct dpct_type_684670 {
+    uint8_t qs[QK_K/4]; // 2 bits per element
+    ggml_half d;
+} block_tq2_0;
+static_assert(sizeof(block_tq2_0) == sizeof(ggml_half) + QK_K / 4, "wrong tq2_0 block size/padding");
+
+//
+// Super-block quantization structures
+//
+
+// 2-bit quantization
+// weight is represented as x = a * q + b
+// 16 blocks of 16 elements each
+// Effectively 2.625 bits per weight
+typedef struct dpct_type_101745 {
+    uint8_t scales[QK_K/16]; // scales and mins, quantized with 4 bits
+    uint8_t qs[QK_K/4];      // quants
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d;    // super-block scale for quantized scales
+            ggml_half dmin; // super-block scale for quantized mins
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 dm;
+    } GGML_COMMON_AGGR_U;
+} block_q2_K;
+static_assert(sizeof(block_q2_K) == 2*sizeof(ggml_half) + QK_K/16 + QK_K/4, "wrong q2_K block size/padding");
+
+// 3-bit quantization
+// weight is represented as x = a * q
+// 16 blocks of 16 elements each
+// Effectively 3.4375 bits per weight
+typedef struct dpct_type_118557 {
+    uint8_t hmask[QK_K/8]; // quants - high bit
+    uint8_t qs[QK_K/4];    // quants - low 2 bits
+    uint8_t scales[12];    // scales, quantized with 6 bits
+    ggml_half d;           // super-block scale
+} block_q3_K;
+static_assert(sizeof(block_q3_K) == sizeof(ggml_half) + QK_K / 4 + QK_K / 8 + 12, "wrong q3_K block size/padding");
+
+// 4-bit quantization
+// 8 blocks of 32 elements each
+// weight is represented as x = a * q + b
+// Effectively 4.5 bits per weight
+typedef struct dpct_type_897602 {
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d;    // super-block scale for quantized scales
+            ggml_half dmin; // super-block scale for quantized mins
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 dm;
+    } GGML_COMMON_AGGR_U;
+    uint8_t scales[K_SCALE_SIZE]; // scales and mins, quantized with 6 bits
+    uint8_t qs[QK_K/2];           // 4--bit quants
+} block_q4_K;
+static_assert(sizeof(block_q4_K) == 2*sizeof(ggml_half) + K_SCALE_SIZE + QK_K/2, "wrong q4_K block size/padding");
+
+// 5-bit quantization
+// 8 blocks of 32 elements each
+// weight is represented as x = a * q + b
+// Effectively 5.5 bits per weight
+typedef struct dpct_type_156099 {
+    GGML_EXTENSION union {
+        struct {
+            ggml_half d;    // super-block scale for quantized scales
+            ggml_half dmin; // super-block scale for quantized mins
+        } GGML_COMMON_AGGR_S;
+        ggml_half2 dm;
+    } GGML_COMMON_AGGR_U;
+    uint8_t scales[K_SCALE_SIZE]; // scales and mins, quantized with 6 bits
+    uint8_t qh[QK_K/8];           // quants, high bit
+    uint8_t qs[QK_K/2];           // quants, low 4 bits
+} block_q5_K;
+static_assert(sizeof(block_q5_K) == 2*sizeof(ggml_half) + K_SCALE_SIZE + QK_K/2 + QK_K/8, "wrong q5_K block size/padding");
+
+// 6-bit quantization
+// weight is represented as x = a * q
+// 16 blocks of 16 elements each
+// Effectively 6.5625 bits per weight
+typedef struct dpct_type_161410 {
+    uint8_t ql[QK_K/2];      // quants, lower 4 bits
+    uint8_t qh[QK_K/4];      // quants, upper 2 bits
+    int8_t  scales[QK_K/16]; // scales, quantized with 8 bits
+    ggml_half d;             // super-block scale
+} block_q6_K;
+static_assert(sizeof(block_q6_K) == sizeof(ggml_half) + QK_K / 16 + 3*QK_K/4, "wrong q6_K block size/padding");
+
+// This is only used for intermediate quantization and dot products
+typedef struct dpct_type_137016 {
+    float   d;              // delta
+    int8_t  qs[QK_K];       // quants
+    int16_t bsums[QK_K/16]; // sum of quants in groups of 16
+} block_q8_K;
+static_assert(sizeof(block_q8_K) == sizeof(float) + QK_K + QK_K/16*sizeof(int16_t), "wrong q8_K block size/padding");
+
+// (Almost) "true" 2-bit quantization.
+// Due to the need to use blocks as per ggml design, it ends up using
+// 2.0625 bpw because of the 16-bit scale for each block of 256.
+typedef struct dpct_type_101609 {
+    ggml_half d;
+    uint16_t qs[QK_K/8];
+} block_iq2_xxs;
+static_assert(sizeof(block_iq2_xxs) == sizeof(ggml_half) + QK_K/8*sizeof(uint16_t), "wrong iq2_xxs block size/padding");
+
+// 2.3125 bpw quants
+typedef struct dpct_type_549418 {
+    ggml_half d;
+    uint16_t qs[QK_K/8];
+    uint8_t  scales[QK_K/32];
+} block_iq2_xs;
+static_assert(sizeof(block_iq2_xs) == sizeof(ggml_half) + QK_K/8*sizeof(uint16_t) + QK_K/32, "wrong iq2_xs block size/padding");
+
+// 2.5625 bpw quants
+typedef struct dpct_type_129269 {
+    ggml_half d;
+    uint8_t qs[QK_K/4];
+    uint8_t qh[QK_K/32];
+    uint8_t scales[QK_K/32];
+} block_iq2_s;
+static_assert(sizeof(block_iq2_s) == sizeof(ggml_half) + QK_K/4 + QK_K/16, "wrong iq2_s block size/padding");
+
+// (Almost) "true" 3-bit quantization.
+// Due to the need to use blocks as per ggml design, it ends up using
+// 3.0625 bpw because of the 16-bit scale for each block of 256.
+typedef struct dpct_type_889699 {
+    ggml_half d;
+    uint8_t qs[3*QK_K/8];
+} block_iq3_xxs;
+static_assert(sizeof(block_iq3_xxs) == sizeof(ggml_half) + 3*(QK_K/8), "wrong iq3_xxs block size/padding");
+
+// 3.4375 bpw
+#define IQ3S_N_SCALE QK_K/64
+typedef struct dpct_type_497741 {
+    ggml_half d;
+    uint8_t qs[QK_K/4];
+    uint8_t qh[QK_K/32];
+    uint8_t signs[QK_K/8];
+    uint8_t scales[IQ3S_N_SCALE];
+} block_iq3_s;
+static_assert(sizeof(block_iq3_s) == sizeof(ggml_half) + 13*(QK_K/32) + IQ3S_N_SCALE, "wrong iq3_s block size/padding");
+
+// 1.5625 bpw
+typedef struct dpct_type_174130 {
+    ggml_half d;
+    uint8_t  qs[QK_K/8];
+    uint16_t qh[QK_K/32];
+} block_iq1_s;
+static_assert(sizeof(block_iq1_s) == sizeof(ggml_half) + QK_K/8 + QK_K/16, "wrong iq1_s block size/padding");
+
+// 1.75 bpw
+typedef struct dpct_type_758813 {
+    uint8_t  qs[QK_K/8];      // grid index, low 8 bits
+    uint8_t  qh[QK_K/16];     // grid index, high 3 bits + grid shift bit (for two groups of 8)
+    uint8_t  scales[QK_K/32]; // 3-bit block scales (4-bit if QK_K == 64)
+} block_iq1_m;
+static_assert(sizeof(block_iq1_m) == QK_K/8 + QK_K/16 + QK_K/32, "wrong iq1_m block size/padding");
+
+// Used by IQ1_M quants
+typedef union dpct_type_145009 {
+    ggml_half f16;
+    uint16_t  u16;
+} iq1m_scale_t;
+
+// Non-linear quants
+#define QK4_NL 32
+typedef struct dpct_type_105897 {
+    ggml_half d;
+    uint8_t qs[QK4_NL/2];
+} block_iq4_nl;
+static_assert(sizeof(block_iq4_nl) == sizeof(ggml_half) + QK4_NL/2, "wrong iq4_nl block size/padding");
+
+typedef struct dpct_type_754545 {
+    ggml_half d;
+    uint16_t scales_h;
+    uint8_t  scales_l[QK_K/64];
+    uint8_t  qs[QK_K/2];
+} block_iq4_xs;
+static_assert(sizeof(block_iq4_xs) == sizeof(ggml_half) + sizeof(uint16_t) + QK_K/64 + QK_K/2, "wrong iq4_xs block size/padding");
+
+#endif // GGML_COMMON_DECL
+#endif // GGML_COMMON_DECL
+
+////////////////////////////////////////////////////////////////////////////////
+
+#ifndef GGML_COMMON_IMPL
+
+#if defined(GGML_COMMON_IMPL_C)
+#include <stdint.h>
+
+#define GGML_TABLE_BEGIN(type, name, size) static const type name[size] = {
+#define GGML_TABLE_END() };
+
+#define GGML_COMMON_IMPL
+#elif defined(GGML_COMMON_IMPL_CPP)
+#include <cstdint>
+
+#define GGML_TABLE_BEGIN(type, name, size) static const type name[size] = {
+#define GGML_TABLE_END() };
+
+#define GGML_COMMON_IMPL
+#elif defined(GGML_COMMON_IMPL_METAL)
+#include <metal_stdlib>
+
+#define GGML_TABLE_BEGIN(type, name, size) static const constant type name[size] = {
+#define GGML_TABLE_END() };
+
+#define GGML_COMMON_IMPL
+#elif defined(GGML_COMMON_IMPL_CUDA) || defined(GGML_COMMON_IMPL_HIP) || defined(GGML_COMMON_IMPL_MUSA)
+#include <cstdint>
+
+#define GGML_TABLE_BEGIN(type, name, size) static const type name[size] = {
+#define GGML_TABLE_END() };
+
+#define GGML_COMMON_IMPL
+#elif defined(GGML_COMMON_IMPL_SYCL)
+
+#include <cstdint>
+
+#define GGML_TABLE_BEGIN(type, name, size) static const type name[size] = {
+#define GGML_TABLE_END() };
+
+#define GGML_COMMON_IMPL
+#endif
+
+#if defined(GGML_COMMON_IMPL)
+
+static dpct::global_memory<const uint8_t, 1>
+    kmask_iq2xs(sycl::range(8), {1, 2, 4, 8, 16, 32, 64, 128});
+
+static dpct::global_memory<const uint8_t, 1> ksigns_iq2xs(
+    sycl::range(128),
+    {0,   129, 130, 3,   132, 5,   6,   135, 136, 9,   10,  139, 12,  141, 142,
+     15,  144, 17,  18,  147, 20,  149, 150, 23,  24,  153, 154, 27,  156, 29,
+     30,  159, 160, 33,  34,  163, 36,  165, 166, 39,  40,  169, 170, 43,  172,
+     45,  46,  175, 48,  177, 178, 51,  180, 53,  54,  183, 184, 57,  58,  187,
+     60,  189, 190, 63,  192, 65,  66,  195, 68,  197, 198, 71,  72,  201, 202,
+     75,  204, 77,  78,  207, 80,  209, 210, 83,  212, 85,  86,  215, 216, 89,
+     90,  219, 92,  221, 222, 95,  96,  225, 226, 99,  228, 101, 102, 231, 232,
+     105, 106, 235, 108, 237, 238, 111, 240, 113, 114, 243, 116, 245, 246, 119,
+     120, 249, 250, 123, 252, 125, 126, 255});
+
+static dpct::global_memory<const uint64_t, 1>
+    ksigns64(sycl::range(128),
+             {0x0000000000000000, 0xff000000000000ff, 0xff0000000000ff00,
+              0x000000000000ffff, 0xff00000000ff0000, 0x0000000000ff00ff,
+              0x0000000000ffff00, 0xff00000000ffffff, 0xff000000ff000000,
+              0x00000000ff0000ff, 0x00000000ff00ff00, 0xff000000ff00ffff,
+              0x00000000ffff0000, 0xff000000ffff00ff, 0xff000000ffffff00,
+              0x00000000ffffffff, 0xff0000ff00000000, 0x000000ff000000ff,
+              0x000000ff0000ff00, 0xff0000ff0000ffff, 0x000000ff00ff0000,
+              0xff0000ff00ff00ff, 0xff0000ff00ffff00, 0x000000ff00ffffff,
+              0x000000ffff000000, 0xff0000ffff0000ff, 0xff0000ffff00ff00,
+              0x000000ffff00ffff, 0xff0000ffffff0000, 0x000000ffffff00ff,
+              0x000000ffffffff00, 0xff0000ffffffffff, 0xff00ff0000000000,
+              0x0000ff00000000ff, 0x0000ff000000ff00, 0xff00ff000000ffff,
+              0x0000ff0000ff0000, 0xff00ff0000ff00ff, 0xff00ff0000ffff00,
+              0x0000ff0000ffffff, 0x0000ff00ff000000, 0xff00ff00ff0000ff,
+              0xff00ff00ff00ff00, 0x0000ff00ff00ffff, 0xff00ff00ffff0000,
+              0x0000ff00ffff00ff, 0x0000ff00ffffff00, 0xff00ff00ffffffff,
+              0x0000ffff00000000, 0xff00ffff000000ff, 0xff00ffff0000ff00,
+              0x0000ffff0000ffff, 0xff00ffff00ff0000, 0x0000ffff00ff00ff,
+              0x0000ffff00ffff00, 0xff00ffff00ffffff, 0xff00ffffff000000,
+              0x0000ffffff0000ff, 0x0000ffffff00ff00, 0xff00ffffff00ffff,
+              0x0000ffffffff0000, 0xff00ffffffff00ff, 0xff00ffffffffff00,
+              0x0000ffffffffffff, 0xffff000000000000, 0x00ff0000000000ff,
+              0x00ff00000000ff00, 0xffff00000000ffff, 0x00ff000000ff0000,
+              0xffff000000ff00ff, 0xffff000000ffff00, 0x00ff000000ffffff,
+              0x00ff0000ff000000, 0xffff0000ff0000ff, 0xffff0000ff00ff00,
+              0x00ff0000ff00ffff, 0xffff0000ffff0000, 0x00ff0000ffff00ff,
+              0x00ff0000ffffff00, 0xffff0000ffffffff, 0x00ff00ff00000000,
+              0xffff00ff000000ff, 0xffff00ff0000ff00, 0x00ff00ff0000ffff,
+              0xffff00ff00ff0000, 0x00ff00ff00ff00ff, 0x00ff00ff00ffff00,
+              0xffff00ff00ffffff, 0xffff00ffff000000, 0x00ff00ffff0000ff,
+              0x00ff00ffff00ff00, 0xffff00ffff00ffff, 0x00ff00ffffff0000,
+              0xffff00ffffff00ff, 0xffff00ffffffff00, 0x00ff00ffffffffff,
+              0x00ffff0000000000, 0xffffff00000000ff, 0xffffff000000ff00,
+              0x00ffff000000ffff, 0xffffff0000ff0000, 0x00ffff0000ff00ff,
+              0x00ffff0000ffff00, 0xffffff0000ffffff, 0xffffff00ff000000,
+              0x00ffff00ff0000ff, 0x00ffff00ff00ff00, 0xffffff00ff00ffff,
+              0x00ffff00ffff0000, 0xffffff00ffff00ff, 0xffffff00ffffff00,
+              0x00ffff00ffffffff, 0xffffffff00000000, 0x00ffffff000000ff,
+              0x00ffffff0000ff00, 0xffffffff0000ffff, 0x00ffffff00ff0000,
+              0xffffffff00ff00ff, 0xffffffff00ffff00, 0x00ffffff00ffffff,
+              0x00ffffffff000000, 0xffffffffff0000ff, 0xffffffffff00ff00,
+              0x00ffffffff00ffff, 0xffffffffffff0000, 0x00ffffffffff00ff,
+              0x00ffffffffffff00, 0xffffffffffffffff});
+
+static dpct::global_memory<const uint64_t, 1>
+    iq2xxs_grid(sycl::range(256),
+                {0x0808080808080808, 0x080808080808082b, 0x0808080808081919,
+                 0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819,
+                 0x0808080808191908, 0x08080808082b0808, 0x08080808082b082b,
+                 0x08080808082b2b08, 0x08080808082b2b2b, 0x0808080819080819,
+                 0x0808080819081908, 0x0808080819190808, 0x0808080819192b08,
+                 0x08080808192b0819, 0x08080808192b1908, 0x080808082b080808,
+                 0x080808082b08082b, 0x080808082b082b2b, 0x080808082b2b082b,
+                 0x0808081908080819, 0x0808081908081908, 0x0808081908190808,
+                 0x0808081908191919, 0x0808081919080808, 0x080808192b081908,
+                 0x080808192b192b08, 0x0808082b08080808, 0x0808082b0808082b,
+                 0x0808082b082b082b, 0x0808082b2b08082b, 0x0808190808080819,
+                 0x0808190808081908, 0x0808190808190808, 0x08081908082b0819,
+                 0x08081908082b1908, 0x0808190819080808, 0x080819081908082b,
+                 0x0808190819082b08, 0x08081908192b0808, 0x080819082b080819,
+                 0x080819082b081908, 0x080819082b190808, 0x080819082b2b1908,
+                 0x0808191908080808, 0x080819190808082b, 0x0808191908082b08,
+                 0x08081919082b0808, 0x080819191908192b, 0x08081919192b2b19,
+                 0x080819192b080808, 0x080819192b190819, 0x0808192b08082b19,
+                 0x0808192b08190808, 0x0808192b19080808, 0x0808192b2b081908,
+                 0x0808192b2b2b1908, 0x08082b0808080808, 0x08082b0808081919,
+                 0x08082b0808082b08, 0x08082b0808191908, 0x08082b08082b2b08,
+                 0x08082b0819080819, 0x08082b0819081908, 0x08082b0819190808,
+                 0x08082b081919082b, 0x08082b082b082b08, 0x08082b1908081908,
+                 0x08082b1919080808, 0x08082b2b0808082b, 0x08082b2b08191908,
+                 0x0819080808080819, 0x0819080808081908, 0x0819080808190808,
+                 0x08190808082b0819, 0x0819080819080808, 0x08190808192b0808,
+                 0x081908082b081908, 0x081908082b190808, 0x081908082b191919,
+                 0x0819081908080808, 0x0819081908082b08, 0x08190819082b0808,
+                 0x0819081919190808, 0x0819081919192b2b, 0x081908192b080808,
+                 0x0819082b082b1908, 0x0819082b19081919, 0x0819190808080808,
+                 0x0819190808082b08, 0x08191908082b0808, 0x08191908082b1919,
+                 0x0819190819082b19, 0x081919082b080808, 0x0819191908192b08,
+                 0x08191919192b082b, 0x0819192b08080808, 0x0819192b0819192b,
+                 0x08192b0808080819, 0x08192b0808081908, 0x08192b0808190808,
+                 0x08192b0819080808, 0x08192b082b080819, 0x08192b1908080808,
+                 0x08192b1908081919, 0x08192b192b2b0808, 0x08192b2b19190819,
+                 0x082b080808080808, 0x082b08080808082b, 0x082b080808082b2b,
+                 0x082b080819081908, 0x082b0808192b0819, 0x082b08082b080808,
+                 0x082b08082b08082b, 0x082b0819082b2b19, 0x082b081919082b08,
+                 0x082b082b08080808, 0x082b082b0808082b, 0x082b190808080819,
+                 0x082b190808081908, 0x082b190808190808, 0x082b190819080808,
+                 0x082b19081919192b, 0x082b191908080808, 0x082b191919080819,
+                 0x082b1919192b1908, 0x082b192b2b190808, 0x082b2b0808082b08,
+                 0x082b2b08082b0808, 0x082b2b082b191908, 0x082b2b2b19081908,
+                 0x1908080808080819, 0x1908080808081908, 0x1908080808190808,
+                 0x1908080808192b08, 0x19080808082b0819, 0x19080808082b1908,
+                 0x1908080819080808, 0x1908080819082b08, 0x190808081919192b,
+                 0x19080808192b0808, 0x190808082b080819, 0x190808082b081908,
+                 0x190808082b190808, 0x1908081908080808, 0x19080819082b0808,
+                 0x19080819192b0819, 0x190808192b080808, 0x190808192b081919,
+                 0x1908082b08080819, 0x1908082b08190808, 0x1908082b19082b08,
+                 0x1908082b1919192b, 0x1908082b192b2b08, 0x1908190808080808,
+                 0x1908190808082b08, 0x19081908082b0808, 0x190819082b080808,
+                 0x190819082b192b19, 0x190819190819082b, 0x19081919082b1908,
+                 0x1908192b08080808, 0x19082b0808080819, 0x19082b0808081908,
+                 0x19082b0808190808, 0x19082b0819080808, 0x19082b0819081919,
+                 0x19082b1908080808, 0x19082b1919192b08, 0x19082b19192b0819,
+                 0x19082b192b08082b, 0x19082b2b19081919, 0x19082b2b2b190808,
+                 0x1919080808080808, 0x1919080808082b08, 0x1919080808190819,
+                 0x1919080808192b19, 0x19190808082b0808, 0x191908082b080808,
+                 0x191908082b082b08, 0x1919081908081908, 0x191908191908082b,
+                 0x191908192b2b1908, 0x1919082b2b190819, 0x191919082b190808,
+                 0x191919082b19082b, 0x1919191908082b2b, 0x1919192b08080819,
+                 0x1919192b19191908, 0x19192b0808080808, 0x19192b0808190819,
+                 0x19192b0808192b19, 0x19192b08192b1908, 0x19192b1919080808,
+                 0x19192b2b08082b08, 0x192b080808081908, 0x192b080808190808,
+                 0x192b080819080808, 0x192b0808192b2b08, 0x192b081908080808,
+                 0x192b081919191919, 0x192b082b08192b08, 0x192b082b192b0808,
+                 0x192b190808080808, 0x192b190808081919, 0x192b191908190808,
+                 0x192b19190819082b, 0x192b19192b081908, 0x192b2b081908082b,
+                 0x2b08080808080808, 0x2b0808080808082b, 0x2b08080808082b2b,
+                 0x2b08080819080819, 0x2b0808082b08082b, 0x2b08081908081908,
+                 0x2b08081908192b08, 0x2b08081919080808, 0x2b08082b08190819,
+                 0x2b08190808080819, 0x2b08190808081908, 0x2b08190808190808,
+                 0x2b08190808191919, 0x2b08190819080808, 0x2b081908192b0808,
+                 0x2b08191908080808, 0x2b0819191908192b, 0x2b0819192b191908,
+                 0x2b08192b08082b19, 0x2b08192b19080808, 0x2b08192b192b0808,
+                 0x2b082b080808082b, 0x2b082b1908081908, 0x2b082b2b08190819,
+                 0x2b19080808081908, 0x2b19080808190808, 0x2b190808082b1908,
+                 0x2b19080819080808, 0x2b1908082b2b0819, 0x2b1908190819192b,
+                 0x2b1908192b080808, 0x2b19082b19081919, 0x2b19190808080808,
+                 0x2b191908082b082b, 0x2b19190819081908, 0x2b19191919190819,
+                 0x2b192b082b080819, 0x2b192b19082b0808, 0x2b2b08080808082b,
+                 0x2b2b080819190808, 0x2b2b08082b081919, 0x2b2b081908082b19,
+                 0x2b2b082b08080808, 0x2b2b190808192b08, 0x2b2b2b0819190808,
+                 0x2b2b2b1908081908});
+
+static dpct::global_memory<const uint64_t, 1>
+    iq2xs_grid(sycl::range(512),
+               {0x0808080808080808, 0x080808080808082b, 0x0808080808081919,
+                0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819,
+                0x0808080808191908, 0x080808080819192b, 0x0808080808192b19,
+                0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919,
+                0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908,
+                0x080808081908192b, 0x0808080819082b19, 0x0808080819190808,
+                0x080808081919082b, 0x0808080819191919, 0x0808080819192b08,
+                0x08080808192b0819, 0x08080808192b1908, 0x080808082b080808,
+                0x080808082b08082b, 0x080808082b081919, 0x080808082b082b08,
+                0x080808082b190819, 0x080808082b191908, 0x080808082b192b19,
+                0x080808082b2b0808, 0x0808081908080819, 0x0808081908081908,
+                0x080808190808192b, 0x0808081908082b19, 0x0808081908190808,
+                0x080808190819082b, 0x0808081908191919, 0x0808081908192b08,
+                0x0808081908192b2b, 0x08080819082b0819, 0x08080819082b1908,
+                0x0808081919080808, 0x080808191908082b, 0x0808081919081919,
+                0x0808081919082b08, 0x0808081919190819, 0x0808081919191908,
+                0x08080819192b0808, 0x08080819192b2b08, 0x080808192b080819,
+                0x080808192b081908, 0x080808192b190808, 0x0808082b08080808,
+                0x0808082b0808082b, 0x0808082b08081919, 0x0808082b08082b08,
+                0x0808082b08190819, 0x0808082b08191908, 0x0808082b082b0808,
+                0x0808082b19080819, 0x0808082b19081908, 0x0808082b19190808,
+                0x0808082b19191919, 0x0808082b2b080808, 0x0808082b2b082b2b,
+                0x0808190808080819, 0x0808190808081908, 0x080819080808192b,
+                0x0808190808082b19, 0x0808190808190808, 0x080819080819082b,
+                0x0808190808191919, 0x0808190808192b08, 0x08081908082b0819,
+                0x08081908082b1908, 0x0808190819080808, 0x080819081908082b,
+                0x0808190819081919, 0x0808190819082b08, 0x0808190819190819,
+                0x0808190819191908, 0x080819081919192b, 0x08081908192b0808,
+                0x080819082b080819, 0x080819082b081908, 0x080819082b190808,
+                0x0808191908080808, 0x080819190808082b, 0x0808191908081919,
+                0x0808191908082b08, 0x0808191908190819, 0x0808191908191908,
+                0x08081919082b0808, 0x0808191919080819, 0x0808191919081908,
+                0x0808191919190808, 0x08081919192b0819, 0x080819192b080808,
+                0x0808192b08080819, 0x0808192b08081908, 0x0808192b08190808,
+                0x0808192b082b192b, 0x0808192b19080808, 0x0808192b1908082b,
+                0x0808192b2b081908, 0x08082b0808080808, 0x08082b080808082b,
+                0x08082b0808081919, 0x08082b0808082b08, 0x08082b0808082b2b,
+                0x08082b0808190819, 0x08082b0808191908, 0x08082b08082b0808,
+                0x08082b08082b1919, 0x08082b0819080819, 0x08082b0819081908,
+                0x08082b0819190808, 0x08082b0819192b08, 0x08082b082b080808,
+                0x08082b082b2b0808, 0x08082b082b2b2b2b, 0x08082b1908080819,
+                0x08082b1908081908, 0x08082b1908190808, 0x08082b1919080808,
+                0x08082b192b080819, 0x08082b192b082b19, 0x08082b2b08080808,
+                0x08082b2b082b0808, 0x08082b2b082b2b08, 0x08082b2b2b19192b,
+                0x08082b2b2b2b0808, 0x0819080808080819, 0x0819080808081908,
+                0x081908080808192b, 0x0819080808082b19, 0x0819080808190808,
+                0x081908080819082b, 0x0819080808191919, 0x0819080808192b08,
+                0x08190808082b0819, 0x08190808082b1908, 0x0819080819080808,
+                0x081908081908082b, 0x0819080819081919, 0x0819080819082b08,
+                0x0819080819190819, 0x0819080819191908, 0x08190808192b0808,
+                0x08190808192b2b2b, 0x081908082b080819, 0x081908082b081908,
+                0x081908082b190808, 0x0819081908080808, 0x081908190808082b,
+                0x0819081908081919, 0x0819081908082b08, 0x0819081908190819,
+                0x0819081908191908, 0x08190819082b0808, 0x0819081919080819,
+                0x0819081919081908, 0x0819081919190808, 0x081908192b080808,
+                0x081908192b191908, 0x081908192b19192b, 0x0819082b08080819,
+                0x0819082b08081908, 0x0819082b0808192b, 0x0819082b08190808,
+                0x0819082b19080808, 0x0819082b192b0808, 0x0819190808080808,
+                0x081919080808082b, 0x0819190808081919, 0x0819190808082b08,
+                0x0819190808190819, 0x0819190808191908, 0x08191908082b0808,
+                0x0819190819080819, 0x0819190819081908, 0x0819190819082b19,
+                0x0819190819190808, 0x08191908192b1908, 0x081919082b080808,
+                0x0819191908080819, 0x0819191908081908, 0x0819191908190808,
+                0x0819191919080808, 0x0819192b08080808, 0x0819192b08191908,
+                0x0819192b19082b19, 0x08192b0808080819, 0x08192b0808081908,
+                0x08192b0808190808, 0x08192b080819082b, 0x08192b0819080808,
+                0x08192b0819191908, 0x08192b082b08192b, 0x08192b1908080808,
+                0x08192b1908081919, 0x08192b19192b192b, 0x08192b2b19190819,
+                0x08192b2b2b2b2b19, 0x082b080808080808, 0x082b08080808082b,
+                0x082b080808081919, 0x082b080808082b08, 0x082b080808082b2b,
+                0x082b080808190819, 0x082b080808191908, 0x082b0808082b0808,
+                0x082b080819080819, 0x082b080819081908, 0x082b080819190808,
+                0x082b08082b080808, 0x082b08082b2b0808, 0x082b081908080819,
+                0x082b081908081908, 0x082b081908190808, 0x082b081919080808,
+                0x082b081919082b08, 0x082b0819192b1919, 0x082b082b08080808,
+                0x082b082b082b082b, 0x082b082b2b080808, 0x082b082b2b2b2b08,
+                0x082b190808080819, 0x082b190808081908, 0x082b190808190808,
+                0x082b1908082b2b19, 0x082b190819080808, 0x082b191908080808,
+                0x082b191919080819, 0x082b19191919082b, 0x082b19192b192b19,
+                0x082b192b08080819, 0x082b192b08192b2b, 0x082b192b2b2b192b,
+                0x082b2b0808080808, 0x082b2b0808082b08, 0x082b2b0808082b2b,
+                0x082b2b08082b0808, 0x082b2b0819191919, 0x082b2b082b082b08,
+                0x082b2b082b2b082b, 0x082b2b19192b2b08, 0x082b2b192b190808,
+                0x082b2b2b08082b08, 0x082b2b2b082b0808, 0x082b2b2b2b08082b,
+                0x082b2b2b2b082b08, 0x082b2b2b2b082b2b, 0x1908080808080819,
+                0x1908080808081908, 0x190808080808192b, 0x1908080808082b19,
+                0x1908080808190808, 0x190808080819082b, 0x1908080808191919,
+                0x1908080808192b08, 0x19080808082b0819, 0x19080808082b1908,
+                0x1908080819080808, 0x190808081908082b, 0x1908080819081919,
+                0x1908080819082b08, 0x1908080819082b2b, 0x1908080819190819,
+                0x1908080819191908, 0x19080808192b0808, 0x19080808192b1919,
+                0x190808082b080819, 0x190808082b081908, 0x190808082b190808,
+                0x1908081908080808, 0x190808190808082b, 0x1908081908081919,
+                0x1908081908082b08, 0x1908081908190819, 0x1908081908191908,
+                0x19080819082b0808, 0x1908081919080819, 0x1908081919081908,
+                0x1908081919190808, 0x190808192b080808, 0x190808192b081919,
+                0x190808192b2b082b, 0x1908082b08080819, 0x1908082b08081908,
+                0x1908082b08190808, 0x1908082b0819082b, 0x1908082b082b2b19,
+                0x1908082b19080808, 0x1908190808080808, 0x190819080808082b,
+                0x1908190808081919, 0x1908190808082b08, 0x1908190808190819,
+                0x1908190808191908, 0x1908190808192b19, 0x19081908082b0808,
+                0x1908190819080819, 0x1908190819081908, 0x1908190819190808,
+                0x190819082b080808, 0x190819082b191908, 0x1908191908080819,
+                0x1908191908081908, 0x1908191908190808, 0x19081919082b1908,
+                0x1908191919080808, 0x190819192b192b2b, 0x1908192b08080808,
+                0x1908192b08082b2b, 0x1908192b19081908, 0x1908192b19190808,
+                0x19082b0808080819, 0x19082b0808081908, 0x19082b0808190808,
+                0x19082b0819080808, 0x19082b0819081919, 0x19082b0819191908,
+                0x19082b08192b082b, 0x19082b1908080808, 0x19082b1908190819,
+                0x19082b1919081908, 0x19082b1919190808, 0x19082b19192b2b19,
+                0x19082b2b08081908, 0x1919080808080808, 0x191908080808082b,
+                0x1919080808081919, 0x1919080808082b08, 0x1919080808190819,
+                0x1919080808191908, 0x19190808082b0808, 0x19190808082b2b08,
+                0x1919080819080819, 0x1919080819081908, 0x1919080819190808,
+                0x191908082b080808, 0x1919081908080819, 0x1919081908081908,
+                0x1919081908190808, 0x1919081908191919, 0x1919081919080808,
+                0x191908191908082b, 0x1919082b08080808, 0x1919082b19081908,
+                0x1919082b2b2b2b2b, 0x1919190808080819, 0x1919190808081908,
+                0x1919190808190808, 0x19191908082b0819, 0x1919190819080808,
+                0x19191908192b0808, 0x191919082b080819, 0x191919082b2b0819,
+                0x1919191908080808, 0x1919191908082b08, 0x191919192b080808,
+                0x191919192b082b08, 0x1919192b082b0819, 0x1919192b192b2b08,
+                0x1919192b2b2b0819, 0x19192b0808080808, 0x19192b0808191908,
+                0x19192b0819080819, 0x19192b0819190808, 0x19192b082b192b19,
+                0x19192b1908192b2b, 0x19192b1919080808, 0x19192b191908082b,
+                0x19192b2b2b081919, 0x192b080808080819, 0x192b080808081908,
+                0x192b080808190808, 0x192b080819080808, 0x192b080819191908,
+                0x192b0808192b082b, 0x192b08082b08192b, 0x192b08082b2b2b19,
+                0x192b081908080808, 0x192b082b082b1908, 0x192b082b19082b2b,
+                0x192b082b2b19082b, 0x192b190808080808, 0x192b19080819192b,
+                0x192b191908190808, 0x192b191919080808, 0x192b191919081919,
+                0x192b19192b2b1908, 0x192b2b0808080819, 0x192b2b08192b2b2b,
+                0x192b2b19082b1919, 0x192b2b2b0808192b, 0x192b2b2b19191908,
+                0x192b2b2b192b082b, 0x2b08080808080808, 0x2b0808080808082b,
+                0x2b08080808081919, 0x2b08080808082b08, 0x2b08080808190819,
+                0x2b08080808191908, 0x2b080808082b0808, 0x2b080808082b2b2b,
+                0x2b08080819080819, 0x2b08080819081908, 0x2b08080819190808,
+                0x2b0808082b080808, 0x2b0808082b08082b, 0x2b0808082b2b2b08,
+                0x2b0808082b2b2b2b, 0x2b08081908080819, 0x2b08081908081908,
+                0x2b0808190808192b, 0x2b08081908190808, 0x2b08081919080808,
+                0x2b08081919190819, 0x2b08081919192b19, 0x2b08082b08080808,
+                0x2b08082b082b0808, 0x2b08082b2b080808, 0x2b08082b2b08082b,
+                0x2b08082b2b2b0808, 0x2b08082b2b2b2b08, 0x2b08190808080819,
+                0x2b08190808081908, 0x2b08190808190808, 0x2b0819080819082b,
+                0x2b08190808191919, 0x2b08190819080808, 0x2b081908192b0808,
+                0x2b0819082b082b19, 0x2b08191908080808, 0x2b08191919081908,
+                0x2b0819192b2b1919, 0x2b08192b08192b08, 0x2b08192b192b2b2b,
+                0x2b082b0808080808, 0x2b082b0808082b08, 0x2b082b08082b1919,
+                0x2b082b0819192b2b, 0x2b082b082b080808, 0x2b082b082b08082b,
+                0x2b082b082b2b2b08, 0x2b082b190808192b, 0x2b082b2b082b082b,
+                0x2b082b2b2b080808, 0x2b082b2b2b082b08, 0x2b082b2b2b19192b,
+                0x2b082b2b2b2b2b08, 0x2b19080808080819, 0x2b19080808081908,
+                0x2b19080808190808, 0x2b19080819080808, 0x2b1908081919192b,
+                0x2b1908082b081908, 0x2b19081908080808, 0x2b190819082b082b,
+                0x2b190819192b1908, 0x2b19082b1919192b, 0x2b19082b2b082b19,
+                0x2b19190808080808, 0x2b19190808081919, 0x2b19190819081908,
+                0x2b19190819190808, 0x2b19190819192b08, 0x2b191919082b2b19,
+                0x2b1919192b190808, 0x2b1919192b19082b, 0x2b19192b19080819,
+                0x2b192b0819190819, 0x2b192b082b2b192b, 0x2b192b1919082b19,
+                0x2b192b2b08191919, 0x2b192b2b192b0808, 0x2b2b080808080808,
+                0x2b2b08080808082b, 0x2b2b080808082b08, 0x2b2b080808082b2b,
+                0x2b2b0808082b0808, 0x2b2b0808082b2b2b, 0x2b2b08082b2b0808,
+                0x2b2b081919190819, 0x2b2b081919192b19, 0x2b2b08192b2b192b,
+                0x2b2b082b08080808, 0x2b2b082b0808082b, 0x2b2b082b08082b08,
+                0x2b2b082b082b2b2b, 0x2b2b082b2b080808, 0x2b2b082b2b2b0808,
+                0x2b2b190819080808, 0x2b2b19082b191919, 0x2b2b192b192b1919,
+                0x2b2b192b2b192b08, 0x2b2b2b0808082b2b, 0x2b2b2b08082b0808,
+                0x2b2b2b08082b082b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b0808,
+                0x2b2b2b082b2b2b08, 0x2b2b2b1908081908, 0x2b2b2b192b081908,
+                0x2b2b2b192b08192b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b082b2b2b,
+                0x2b2b2b2b2b190819, 0x2b2b2b2b2b2b2b2b});
+
+static dpct::global_memory<const uint64_t, 1>
+    iq2s_grid(sycl::range(1024),
+              {0x0808080808080808, 0x080808080808082b, 0x0808080808081919,
+               0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819,
+               0x0808080808191908, 0x080808080819192b, 0x0808080808192b19,
+               0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919,
+               0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908,
+               0x080808081908192b, 0x0808080819082b19, 0x0808080819190808,
+               0x080808081919082b, 0x0808080819191919, 0x0808080819192b08,
+               0x08080808192b0819, 0x08080808192b1908, 0x08080808192b192b,
+               0x08080808192b2b19, 0x080808082b080808, 0x080808082b08082b,
+               0x080808082b081919, 0x080808082b082b08, 0x080808082b190819,
+               0x080808082b191908, 0x080808082b2b0808, 0x080808082b2b1919,
+               0x080808082b2b2b2b, 0x0808081908080819, 0x0808081908081908,
+               0x080808190808192b, 0x0808081908082b19, 0x0808081908190808,
+               0x080808190819082b, 0x0808081908191919, 0x0808081908192b08,
+               0x08080819082b0819, 0x08080819082b1908, 0x0808081919080808,
+               0x080808191908082b, 0x0808081919081919, 0x0808081919082b08,
+               0x0808081919190819, 0x0808081919191908, 0x080808191919192b,
+               0x0808081919192b19, 0x08080819192b0808, 0x08080819192b1919,
+               0x08080819192b2b08, 0x080808192b080819, 0x080808192b081908,
+               0x080808192b190808, 0x080808192b19082b, 0x080808192b191919,
+               0x080808192b2b0819, 0x080808192b2b1908, 0x0808082b08080808,
+               0x0808082b0808082b, 0x0808082b08081919, 0x0808082b08082b08,
+               0x0808082b08190819, 0x0808082b08191908, 0x0808082b082b0808,
+               0x0808082b082b2b2b, 0x0808082b19080819, 0x0808082b19081908,
+               0x0808082b1908192b, 0x0808082b19082b19, 0x0808082b19190808,
+               0x0808082b19191919, 0x0808082b2b080808, 0x0808082b2b081919,
+               0x0808082b2b082b2b, 0x0808082b2b191908, 0x0808082b2b2b082b,
+               0x0808190808080819, 0x0808190808081908, 0x080819080808192b,
+               0x0808190808082b19, 0x0808190808190808, 0x080819080819082b,
+               0x0808190808191919, 0x0808190808192b08, 0x08081908082b0819,
+               0x08081908082b1908, 0x08081908082b192b, 0x08081908082b2b19,
+               0x0808190819080808, 0x080819081908082b, 0x0808190819081919,
+               0x0808190819082b08, 0x0808190819082b2b, 0x0808190819190819,
+               0x0808190819191908, 0x080819081919192b, 0x0808190819192b19,
+               0x08081908192b0808, 0x08081908192b082b, 0x08081908192b1919,
+               0x080819082b080819, 0x080819082b081908, 0x080819082b08192b,
+               0x080819082b082b19, 0x080819082b190808, 0x080819082b191919,
+               0x080819082b192b08, 0x080819082b2b0819, 0x080819082b2b1908,
+               0x0808191908080808, 0x080819190808082b, 0x0808191908081919,
+               0x0808191908082b08, 0x0808191908082b2b, 0x0808191908190819,
+               0x0808191908191908, 0x080819190819192b, 0x0808191908192b19,
+               0x08081919082b0808, 0x08081919082b1919, 0x08081919082b2b08,
+               0x0808191919080819, 0x0808191919081908, 0x080819191908192b,
+               0x0808191919082b19, 0x0808191919190808, 0x080819191919082b,
+               0x0808191919191919, 0x0808191919192b08, 0x08081919192b0819,
+               0x08081919192b1908, 0x080819192b080808, 0x080819192b08082b,
+               0x080819192b081919, 0x080819192b082b08, 0x080819192b190819,
+               0x080819192b191908, 0x080819192b2b0808, 0x0808192b08080819,
+               0x0808192b08081908, 0x0808192b0808192b, 0x0808192b08082b19,
+               0x0808192b08190808, 0x0808192b08191919, 0x0808192b19080808,
+               0x0808192b19081919, 0x0808192b19082b08, 0x0808192b19190819,
+               0x0808192b19191908, 0x0808192b192b0808, 0x0808192b2b080819,
+               0x0808192b2b081908, 0x0808192b2b190808, 0x08082b0808080808,
+               0x08082b080808082b, 0x08082b0808081919, 0x08082b0808082b08,
+               0x08082b0808190819, 0x08082b0808191908, 0x08082b080819192b,
+               0x08082b0808192b19, 0x08082b08082b0808, 0x08082b08082b1919,
+               0x08082b08082b2b2b, 0x08082b0819080819, 0x08082b0819081908,
+               0x08082b081908192b, 0x08082b0819082b19, 0x08082b0819190808,
+               0x08082b081919082b, 0x08082b0819191919, 0x08082b0819192b08,
+               0x08082b08192b0819, 0x08082b08192b1908, 0x08082b082b080808,
+               0x08082b082b081919, 0x08082b082b191908, 0x08082b082b2b2b2b,
+               0x08082b1908080819, 0x08082b1908081908, 0x08082b1908190808,
+               0x08082b190819082b, 0x08082b1908191919, 0x08082b1908192b08,
+               0x08082b19082b0819, 0x08082b1919080808, 0x08082b1919081919,
+               0x08082b1919082b08, 0x08082b1919190819, 0x08082b1919191908,
+               0x08082b19192b0808, 0x08082b192b080819, 0x08082b192b190808,
+               0x08082b2b08080808, 0x08082b2b08190819, 0x08082b2b08191908,
+               0x08082b2b082b082b, 0x08082b2b082b2b08, 0x08082b2b082b2b2b,
+               0x08082b2b19190808, 0x08082b2b2b192b19, 0x0819080808080819,
+               0x0819080808081908, 0x081908080808192b, 0x0819080808082b19,
+               0x0819080808190808, 0x081908080819082b, 0x0819080808191919,
+               0x0819080808192b08, 0x08190808082b0819, 0x08190808082b1908,
+               0x08190808082b192b, 0x0819080819080808, 0x081908081908082b,
+               0x0819080819081919, 0x0819080819082b08, 0x0819080819190819,
+               0x0819080819191908, 0x081908081919192b, 0x0819080819192b19,
+               0x08190808192b0808, 0x08190808192b082b, 0x08190808192b1919,
+               0x08190808192b2b08, 0x081908082b080819, 0x081908082b081908,
+               0x081908082b08192b, 0x081908082b190808, 0x081908082b191919,
+               0x081908082b192b08, 0x081908082b2b0819, 0x081908082b2b1908,
+               0x0819081908080808, 0x081908190808082b, 0x0819081908081919,
+               0x0819081908082b08, 0x0819081908082b2b, 0x0819081908190819,
+               0x0819081908191908, 0x081908190819192b, 0x0819081908192b19,
+               0x08190819082b0808, 0x08190819082b082b, 0x08190819082b1919,
+               0x08190819082b2b08, 0x0819081919080819, 0x0819081919081908,
+               0x081908191908192b, 0x0819081919082b19, 0x0819081919190808,
+               0x081908191919082b, 0x0819081919191919, 0x0819081919192b08,
+               0x08190819192b0819, 0x08190819192b1908, 0x081908192b080808,
+               0x081908192b08082b, 0x081908192b081919, 0x081908192b082b08,
+               0x081908192b190819, 0x081908192b191908, 0x0819082b08080819,
+               0x0819082b08081908, 0x0819082b08082b19, 0x0819082b08190808,
+               0x0819082b08191919, 0x0819082b082b0819, 0x0819082b082b1908,
+               0x0819082b19080808, 0x0819082b19081919, 0x0819082b19190819,
+               0x0819082b19191908, 0x0819082b2b080819, 0x0819082b2b081908,
+               0x0819082b2b190808, 0x0819190808080808, 0x081919080808082b,
+               0x0819190808081919, 0x0819190808082b08, 0x0819190808190819,
+               0x0819190808191908, 0x081919080819192b, 0x0819190808192b19,
+               0x08191908082b0808, 0x08191908082b1919, 0x08191908082b2b08,
+               0x0819190819080819, 0x0819190819081908, 0x081919081908192b,
+               0x0819190819082b19, 0x0819190819190808, 0x081919081919082b,
+               0x0819190819191919, 0x0819190819192b08, 0x08191908192b0819,
+               0x08191908192b1908, 0x081919082b080808, 0x081919082b08082b,
+               0x081919082b081919, 0x081919082b082b08, 0x081919082b190819,
+               0x081919082b191908, 0x081919082b2b0808, 0x0819191908080819,
+               0x0819191908081908, 0x081919190808192b, 0x0819191908082b19,
+               0x0819191908190808, 0x081919190819082b, 0x0819191908191919,
+               0x0819191908192b08, 0x08191919082b0819, 0x08191919082b1908,
+               0x0819191919080808, 0x081919191908082b, 0x0819191919081919,
+               0x0819191919082b08, 0x0819191919190819, 0x0819191919191908,
+               0x08191919192b0808, 0x081919192b080819, 0x081919192b081908,
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+               0x2b2b080808191908, 0x2b2b0808082b082b, 0x2b2b0808082b2b2b,
+               0x2b2b080819080819, 0x2b2b080819081908, 0x2b2b080819190808,
+               0x2b2b08082b2b082b, 0x2b2b08082b2b2b2b, 0x2b2b081919080808,
+               0x2b2b0819192b1919, 0x2b2b082b0808082b, 0x2b2b082b08082b2b,
+               0x2b2b082b082b082b, 0x2b2b082b082b2b08, 0x2b2b082b082b2b2b,
+               0x2b2b082b2b08082b, 0x2b2b082b2b082b08, 0x2b2b082b2b082b2b,
+               0x2b2b082b2b2b2b08, 0x2b2b190808080819, 0x2b2b190808081908,
+               0x2b2b190808190808, 0x2b2b190819080808, 0x2b2b19082b082b19,
+               0x2b2b19082b2b1908, 0x2b2b191908080808, 0x2b2b191908192b19,
+               0x2b2b192b19190819, 0x2b2b2b0808082b2b, 0x2b2b2b08082b2b08,
+               0x2b2b2b082b2b082b, 0x2b2b2b1919191908, 0x2b2b2b192b08192b,
+               0x2b2b2b2b08082b08, 0x2b2b2b2b08082b2b, 0x2b2b2b2b082b0808,
+               0x2b2b2b2b082b082b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b2b082b08,
+               0x2b2b2b2b2b2b2b2b});
+
+static dpct::global_memory<const uint32_t, 1> iq3xxs_grid(
+    sycl::range(256),
+    {0x04040404, 0x04040414, 0x04040424, 0x04040c0c, 0x04040c1c, 0x04040c3e,
+     0x04041404, 0x04041414, 0x04041c0c, 0x04042414, 0x04043e1c, 0x04043e2c,
+     0x040c040c, 0x040c041c, 0x040c0c04, 0x040c0c14, 0x040c140c, 0x040c142c,
+     0x040c1c04, 0x040c1c14, 0x040c240c, 0x040c2c24, 0x040c3e04, 0x04140404,
+     0x04140414, 0x04140424, 0x04140c0c, 0x04141404, 0x04141414, 0x04141c0c,
+     0x04141c1c, 0x04141c3e, 0x04142c0c, 0x04142c3e, 0x04143e2c, 0x041c040c,
+     0x041c043e, 0x041c0c04, 0x041c0c14, 0x041c142c, 0x041c3e04, 0x04240c1c,
+     0x04241c3e, 0x04242424, 0x04242c3e, 0x04243e1c, 0x04243e2c, 0x042c040c,
+     0x042c043e, 0x042c1c14, 0x042c2c14, 0x04341c2c, 0x04343424, 0x043e0c04,
+     0x043e0c24, 0x043e0c34, 0x043e241c, 0x043e340c, 0x0c04040c, 0x0c04041c,
+     0x0c040c04, 0x0c040c14, 0x0c04140c, 0x0c04141c, 0x0c041c04, 0x0c041c14,
+     0x0c041c24, 0x0c04243e, 0x0c042c04, 0x0c0c0404, 0x0c0c0414, 0x0c0c0c0c,
+     0x0c0c1404, 0x0c0c1414, 0x0c14040c, 0x0c14041c, 0x0c140c04, 0x0c140c14,
+     0x0c14140c, 0x0c141c04, 0x0c143e14, 0x0c1c0404, 0x0c1c0414, 0x0c1c1404,
+     0x0c1c1c0c, 0x0c1c2434, 0x0c1c3434, 0x0c24040c, 0x0c24042c, 0x0c242c04,
+     0x0c2c1404, 0x0c2c1424, 0x0c2c2434, 0x0c2c3e0c, 0x0c34042c, 0x0c3e1414,
+     0x0c3e2404, 0x14040404, 0x14040414, 0x14040c0c, 0x14040c1c, 0x14041404,
+     0x14041414, 0x14041434, 0x14041c0c, 0x14042414, 0x140c040c, 0x140c041c,
+     0x140c042c, 0x140c0c04, 0x140c0c14, 0x140c140c, 0x140c1c04, 0x140c341c,
+     0x140c343e, 0x140c3e04, 0x14140404, 0x14140414, 0x14140c0c, 0x14140c3e,
+     0x14141404, 0x14141414, 0x14141c3e, 0x14142404, 0x14142c2c, 0x141c040c,
+     0x141c0c04, 0x141c0c24, 0x141c3e04, 0x141c3e24, 0x14241c2c, 0x14242c1c,
+     0x142c041c, 0x142c143e, 0x142c240c, 0x142c3e24, 0x143e040c, 0x143e041c,
+     0x143e0c34, 0x143e242c, 0x1c04040c, 0x1c040c04, 0x1c040c14, 0x1c04140c,
+     0x1c04141c, 0x1c042c04, 0x1c04342c, 0x1c043e14, 0x1c0c0404, 0x1c0c0414,
+     0x1c0c1404, 0x1c0c1c0c, 0x1c0c2424, 0x1c0c2434, 0x1c14040c, 0x1c14041c,
+     0x1c140c04, 0x1c14142c, 0x1c142c14, 0x1c143e14, 0x1c1c0c0c, 0x1c1c1c1c,
+     0x1c241c04, 0x1c24243e, 0x1c243e14, 0x1c2c0404, 0x1c2c0434, 0x1c2c1414,
+     0x1c2c2c2c, 0x1c340c24, 0x1c341c34, 0x1c34341c, 0x1c3e1c1c, 0x1c3e3404,
+     0x24040424, 0x24040c3e, 0x24041c2c, 0x24041c3e, 0x24042c1c, 0x24042c3e,
+     0x240c3e24, 0x24141404, 0x24141c3e, 0x24142404, 0x24143404, 0x24143434,
+     0x241c043e, 0x241c242c, 0x24240424, 0x24242c0c, 0x24243424, 0x242c142c,
+     0x242c241c, 0x242c3e04, 0x243e042c, 0x243e0c04, 0x243e0c14, 0x243e1c04,
+     0x2c040c14, 0x2c04240c, 0x2c043e04, 0x2c0c0404, 0x2c0c0434, 0x2c0c1434,
+     0x2c0c2c2c, 0x2c140c24, 0x2c141c14, 0x2c143e14, 0x2c1c0414, 0x2c1c2c1c,
+     0x2c240c04, 0x2c24141c, 0x2c24143e, 0x2c243e14, 0x2c2c0414, 0x2c2c1c0c,
+     0x2c342c04, 0x2c3e1424, 0x2c3e2414, 0x34041424, 0x34042424, 0x34042434,
+     0x34043424, 0x340c140c, 0x340c340c, 0x34140c3e, 0x34143424, 0x341c1c04,
+     0x341c1c34, 0x34242424, 0x342c042c, 0x342c2c14, 0x34341c1c, 0x343e041c,
+     0x343e140c, 0x3e04041c, 0x3e04042c, 0x3e04043e, 0x3e040c04, 0x3e041c14,
+     0x3e042c14, 0x3e0c1434, 0x3e0c2404, 0x3e140c14, 0x3e14242c, 0x3e142c14,
+     0x3e1c0404, 0x3e1c0c2c, 0x3e1c1c1c, 0x3e1c3404, 0x3e24140c, 0x3e24240c,
+     0x3e2c0404, 0x3e2c0414, 0x3e2c1424, 0x3e341c04});
+
+static dpct::global_memory<const uint32_t, 1> iq3s_grid(
+    sycl::range(512),
+    {0x01010101, 0x01010103, 0x01010105, 0x0101010b, 0x0101010f, 0x01010301,
+     0x01010303, 0x01010305, 0x01010309, 0x0101030d, 0x01010501, 0x01010503,
+     0x0101050b, 0x01010707, 0x01010901, 0x01010905, 0x0101090b, 0x0101090f,
+     0x01010b03, 0x01010b07, 0x01010d01, 0x01010d05, 0x01010f03, 0x01010f09,
+     0x01010f0f, 0x01030101, 0x01030103, 0x01030105, 0x01030109, 0x01030301,
+     0x01030303, 0x0103030b, 0x01030501, 0x01030507, 0x0103050f, 0x01030703,
+     0x0103070b, 0x01030909, 0x01030d03, 0x01030d0b, 0x01030f05, 0x01050101,
+     0x01050103, 0x0105010b, 0x0105010f, 0x01050301, 0x01050307, 0x0105030d,
+     0x01050503, 0x0105050b, 0x01050701, 0x01050709, 0x01050905, 0x0105090b,
+     0x0105090f, 0x01050b03, 0x01050b07, 0x01050f01, 0x01050f07, 0x01070107,
+     0x01070303, 0x0107030b, 0x01070501, 0x01070505, 0x01070703, 0x01070707,
+     0x0107070d, 0x01070909, 0x01070b01, 0x01070b05, 0x01070d0f, 0x01070f03,
+     0x01070f0b, 0x01090101, 0x01090307, 0x0109030f, 0x01090503, 0x01090509,
+     0x01090705, 0x01090901, 0x01090907, 0x01090b03, 0x01090f01, 0x010b0105,
+     0x010b0109, 0x010b0501, 0x010b0505, 0x010b050d, 0x010b0707, 0x010b0903,
+     0x010b090b, 0x010b090f, 0x010b0d0d, 0x010b0f07, 0x010d010d, 0x010d0303,
+     0x010d0307, 0x010d0703, 0x010d0b05, 0x010d0f03, 0x010f0101, 0x010f0105,
+     0x010f0109, 0x010f0501, 0x010f0505, 0x010f050d, 0x010f0707, 0x010f0b01,
+     0x010f0b09, 0x03010101, 0x03010103, 0x03010105, 0x03010109, 0x03010301,
+     0x03010303, 0x03010307, 0x0301030b, 0x0301030f, 0x03010501, 0x03010505,
+     0x03010703, 0x03010709, 0x0301070d, 0x03010b09, 0x03010b0d, 0x03010d03,
+     0x03010f05, 0x03030101, 0x03030103, 0x03030107, 0x0303010d, 0x03030301,
+     0x03030309, 0x03030503, 0x03030701, 0x03030707, 0x03030903, 0x03030b01,
+     0x03030b05, 0x03030f01, 0x03030f0d, 0x03050101, 0x03050305, 0x0305030b,
+     0x0305030f, 0x03050501, 0x03050509, 0x03050705, 0x03050901, 0x03050907,
+     0x03050b0b, 0x03050d01, 0x03050f05, 0x03070103, 0x03070109, 0x0307010f,
+     0x03070301, 0x03070307, 0x03070503, 0x0307050f, 0x03070701, 0x03070709,
+     0x03070903, 0x03070d05, 0x03070f01, 0x03090107, 0x0309010b, 0x03090305,
+     0x03090309, 0x03090703, 0x03090707, 0x03090905, 0x0309090d, 0x03090b01,
+     0x03090b09, 0x030b0103, 0x030b0301, 0x030b0307, 0x030b0503, 0x030b0701,
+     0x030b0705, 0x030b0b03, 0x030d0501, 0x030d0509, 0x030d050f, 0x030d0909,
+     0x030d090d, 0x030f0103, 0x030f0107, 0x030f0301, 0x030f0305, 0x030f0503,
+     0x030f070b, 0x030f0903, 0x030f0d05, 0x030f0f01, 0x05010101, 0x05010103,
+     0x05010107, 0x0501010b, 0x0501010f, 0x05010301, 0x05010305, 0x05010309,
+     0x0501030d, 0x05010503, 0x05010507, 0x0501050f, 0x05010701, 0x05010705,
+     0x05010903, 0x05010907, 0x0501090b, 0x05010b01, 0x05010b05, 0x05010d0f,
+     0x05010f01, 0x05010f07, 0x05010f0b, 0x05030101, 0x05030105, 0x05030301,
+     0x05030307, 0x0503030f, 0x05030505, 0x0503050b, 0x05030703, 0x05030709,
+     0x05030905, 0x05030b03, 0x05050103, 0x05050109, 0x0505010f, 0x05050503,
+     0x05050507, 0x05050701, 0x0505070f, 0x05050903, 0x05050b07, 0x05050b0f,
+     0x05050f03, 0x05050f09, 0x05070101, 0x05070105, 0x0507010b, 0x05070303,
+     0x05070505, 0x05070509, 0x05070703, 0x05070707, 0x05070905, 0x05070b01,
+     0x05070d0d, 0x05090103, 0x0509010f, 0x05090501, 0x05090507, 0x05090705,
+     0x0509070b, 0x05090903, 0x05090f05, 0x05090f0b, 0x050b0109, 0x050b0303,
+     0x050b0505, 0x050b070f, 0x050b0901, 0x050b0b07, 0x050b0f01, 0x050d0101,
+     0x050d0105, 0x050d010f, 0x050d0503, 0x050d0b0b, 0x050d0d03, 0x050f010b,
+     0x050f0303, 0x050f050d, 0x050f0701, 0x050f0907, 0x050f0b01, 0x07010105,
+     0x07010303, 0x07010307, 0x0701030b, 0x0701030f, 0x07010505, 0x07010703,
+     0x07010707, 0x0701070b, 0x07010905, 0x07010909, 0x0701090f, 0x07010b03,
+     0x07010d07, 0x07010f03, 0x07030103, 0x07030107, 0x0703010b, 0x07030309,
+     0x07030503, 0x07030507, 0x07030901, 0x07030d01, 0x07030f05, 0x07030f0d,
+     0x07050101, 0x07050305, 0x07050501, 0x07050705, 0x07050709, 0x07050b01,
+     0x07070103, 0x07070301, 0x07070309, 0x07070503, 0x07070507, 0x0707050f,
+     0x07070701, 0x07070903, 0x07070907, 0x0707090f, 0x07070b0b, 0x07070f07,
+     0x07090107, 0x07090303, 0x0709030d, 0x07090505, 0x07090703, 0x07090b05,
+     0x07090d01, 0x07090d09, 0x070b0103, 0x070b0301, 0x070b0305, 0x070b050b,
+     0x070b0705, 0x070b0909, 0x070b0b0d, 0x070b0f07, 0x070d030d, 0x070d0903,
+     0x070f0103, 0x070f0107, 0x070f0501, 0x070f0505, 0x070f070b, 0x09010101,
+     0x09010109, 0x09010305, 0x09010501, 0x09010509, 0x0901050f, 0x09010705,
+     0x09010903, 0x09010b01, 0x09010f01, 0x09030105, 0x0903010f, 0x09030303,
+     0x09030307, 0x09030505, 0x09030701, 0x0903070b, 0x09030907, 0x09030b03,
+     0x09030b0b, 0x09050103, 0x09050107, 0x09050301, 0x0905030b, 0x09050503,
+     0x09050707, 0x09050901, 0x09050b0f, 0x09050d05, 0x09050f01, 0x09070109,
+     0x09070303, 0x09070307, 0x09070501, 0x09070505, 0x09070703, 0x0907070b,
+     0x09090101, 0x09090105, 0x09090509, 0x0909070f, 0x09090901, 0x09090f03,
+     0x090b010b, 0x090b010f, 0x090b0503, 0x090b0d05, 0x090d0307, 0x090d0709,
+     0x090d0d01, 0x090f0301, 0x090f030b, 0x090f0701, 0x090f0907, 0x090f0b03,
+     0x0b010105, 0x0b010301, 0x0b010309, 0x0b010505, 0x0b010901, 0x0b010909,
+     0x0b01090f, 0x0b010b05, 0x0b010d0d, 0x0b010f09, 0x0b030103, 0x0b030107,
+     0x0b03010b, 0x0b030305, 0x0b030503, 0x0b030705, 0x0b030f05, 0x0b050101,
+     0x0b050303, 0x0b050507, 0x0b050701, 0x0b05070d, 0x0b050b07, 0x0b070105,
+     0x0b07010f, 0x0b070301, 0x0b07050f, 0x0b070909, 0x0b070b03, 0x0b070d0b,
+     0x0b070f07, 0x0b090103, 0x0b090109, 0x0b090501, 0x0b090705, 0x0b09090d,
+     0x0b0b0305, 0x0b0b050d, 0x0b0b0b03, 0x0b0b0b07, 0x0b0d0905, 0x0b0f0105,
+     0x0b0f0109, 0x0b0f0505, 0x0d010303, 0x0d010307, 0x0d01030b, 0x0d010703,
+     0x0d010707, 0x0d010d01, 0x0d030101, 0x0d030501, 0x0d03050f, 0x0d030d09,
+     0x0d050305, 0x0d050709, 0x0d050905, 0x0d050b0b, 0x0d050d05, 0x0d050f01,
+     0x0d070101, 0x0d070309, 0x0d070503, 0x0d070901, 0x0d09050b, 0x0d090907,
+     0x0d090d05, 0x0d0b0101, 0x0d0b0107, 0x0d0b0709, 0x0d0b0d01, 0x0d0d010b,
+     0x0d0d0901, 0x0d0f0303, 0x0d0f0307, 0x0f010101, 0x0f010109, 0x0f01010f,
+     0x0f010501, 0x0f010505, 0x0f01070d, 0x0f010901, 0x0f010b09, 0x0f010d05,
+     0x0f030105, 0x0f030303, 0x0f030509, 0x0f030907, 0x0f03090b, 0x0f050103,
+     0x0f050109, 0x0f050301, 0x0f05030d, 0x0f050503, 0x0f050701, 0x0f050b03,
+     0x0f070105, 0x0f070705, 0x0f07070b, 0x0f070b07, 0x0f090103, 0x0f09010b,
+     0x0f090307, 0x0f090501, 0x0f090b01, 0x0f0b0505, 0x0f0b0905, 0x0f0d0105,
+     0x0f0d0703, 0x0f0f0101});
+
+// TODO: fix name to kvalues_iq4_nl
+static dpct::global_memory<const int8_t, 1>
+    kvalues_iq4nl(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1,
+                                    13, 25, 38, 53, 69, 89, 113});
+
+// e2m1 values (doubled), shared by MXFP4 and NVFP4
+// ref: https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf
+static dpct::global_memory<const int8_t, 1>
+    kvalues_fp4(sycl::range(16),
+                {0, 1, 2, 3, 4, 6, 8, 12, 0, -1, -2, -3, -4, -6, -8, -12});
+#define kvalues_mxfp4 kvalues_fp4
+
+#define NGRID_IQ1S 2048
+#define IQ1S_DELTA 0.125f
+#define IQ1M_DELTA 0.125f
+#if defined(GGML_COMMON_IMPL_C) || defined(GGML_COMMON_IMPL_CPP)
+GGML_TABLE_BEGIN(uint64_t, iq1s_grid, NGRID_IQ1S)
+    0xffffffffffffffff, 0xffffffffffffff01, 0xffffffffffff0000, 0xffffffffffff01ff,
+    0xffffffffffff0101, 0xffffffffff00ff00, 0xffffffffff000000, 0xffffffffff01ffff,
+    0xffffffffff01ff01, 0xffffffffff0101ff, 0xffffffffff010101, 0xffffffff00ff0000,
+    0xffffffff0000ff00, 0xffffffff000000ff, 0xffffffff00000001, 0xffffffff00010000,
+    0xffffffff01ffffff, 0xffffffff01ffff01, 0xffffffff01ff01ff, 0xffffffff01ff0101,
+    0xffffffff01000000, 0xffffffff0101ffff, 0xffffffff0101ff01, 0xffffffff010101ff,
+    0xffffffff01010101, 0xffffff00ffff00ff, 0xffffff00ffff0000, 0xffffff00ff00ff00,
+    0xffffff00ff0000ff, 0xffffff00ff000001, 0xffffff00ff000100, 0xffffff00ff000101,
+    0xffffff00ff010000, 0xffffff0000ffff00, 0xffffff0000ff0001, 0xffffff0000ff0100,
+    0xffffff000000ff01, 0xffffff0000000000, 0xffffff0000000101, 0xffffff000001ff00,
+    0xffffff00000100ff, 0xffffff0000010001, 0xffffff00000101ff, 0xffffff0001ff0000,
+    0xffffff000100ff00, 0xffffff00010000ff, 0xffffff0001000001, 0xffffff0001010000,
+    0xffffff01ffffffff, 0xffffff01ffffff01, 0xffffff01ffff01ff, 0xffffff01ffff0101,
+    0xffffff01ff000000, 0xffffff01ff01ffff, 0xffffff01ff01ff01, 0xffffff01ff0101ff,
+    0xffffff01ff010101, 0xffffff0100ff0000, 0xffffff010000ff00, 0xffffff0100000100,
+    0xffffff01000100ff, 0xffffff0100010100, 0xffffff0101ffffff, 0xffffff0101ffff01,
+    0xffffff0101ff01ff, 0xffffff0101ff0101, 0xffffff010100ff00, 0xffffff0101000000,
+    0xffffff0101000100, 0xffffff010101ffff, 0xffffff010101ff01, 0xffffff01010101ff,
+    0xffffff0101010101, 0xffff00ffff00ff00, 0xffff00ffff0000ff, 0xffff00ffff000001,
+    0xffff00ffff010000, 0xffff00ff00ffff00, 0xffff00ff00ff0100, 0xffff00ff00000000,
+    0xffff00ff00000101, 0xffff00ff000100ff, 0xffff00ff00010000, 0xffff00ff0100ff00,
+    0xffff00ff01000100, 0xffff00ff01010000, 0xffff0000ffffff00, 0xffff0000ffff00ff,
+    0xffff0000ffff0000, 0xffff0000ffff0001, 0xffff0000ff000000, 0xffff0000ff0001ff,
+    0xffff0000ff000101, 0xffff0000ff010100, 0xffff000000ffffff, 0xffff000000ff0000,
+    0xffff000000ff0101, 0xffff00000000ffff, 0xffff00000000ff00, 0xffff0000000000ff,
+    0xffff000000000000, 0xffff000000000001, 0xffff000000000100, 0xffff00000001ffff,
+    0xffff00000001ff01, 0xffff000000010000, 0xffff0000000101ff, 0xffff000000010101,
+    0xffff000001ffff00, 0xffff00000100ff00, 0xffff000001000000, 0xffff0000010001ff,
+    0xffff000001000101, 0xffff00000101ff00, 0xffff0000010100ff, 0xffff000001010000,
+    0xffff000001010001, 0xffff000001010100, 0xffff0001ff0000ff, 0xffff0001ff000100,
+    0xffff000100ffff00, 0xffff000100ff00ff, 0xffff00010000ffff, 0xffff00010000ff01,
+    0xffff000100000000, 0xffff0001000001ff, 0xffff00010001ffff, 0xffff00010001ff00,
+    0xffff000100010001, 0xffff000100010100, 0xffff000101ff0000, 0xffff00010100ff00,
+    0xffff0001010000ff, 0xffff000101000100, 0xffff01ffffffffff, 0xffff01ffffffff01,
+    0xffff01ffffff01ff, 0xffff01ffffff0101, 0xffff01ffff000000, 0xffff01ffff01ffff,
+    0xffff01ffff01ff01, 0xffff01ffff0101ff, 0xffff01ffff010101, 0xffff01ff00ff0000,
+    0xffff01ff0000ff00, 0xffff01ff00000001, 0xffff01ff00010000, 0xffff01ff01ffffff,
+    0xffff01ff01ffff01, 0xffff01ff01ff01ff, 0xffff01ff01ff0101, 0xffff01ff01000000,
+    0xffff01ff0101ffff, 0xffff01ff0101ff01, 0xffff01ff010101ff, 0xffff01ff01010101,
+    0xffff0100ffff0000, 0xffff0100ff00ff00, 0xffff0100ff0000ff, 0xffff0100ff000100,
+    0xffff0100ff0100ff, 0xffff0100ff010000, 0xffff010000ffff00, 0xffff01000000ffff,
+    0xffff01000000ff00, 0xffff010000000000, 0xffff01000001ff00, 0xffff0100000100ff,
+    0xffff010000010100, 0xffff01000100ff00, 0xffff0100010000ff, 0xffff010001000001,
+    0xffff010001000100, 0xffff010001010000, 0xffff0101ffffffff, 0xffff0101ffffff01,
+    0xffff0101ffff01ff, 0xffff0101ffff0101, 0xffff0101ff000000, 0xffff0101ff01ffff,
+    0xffff0101ff01ff01, 0xffff0101ff0101ff, 0xffff0101ff010101, 0xffff010100ff0000,
+    0xffff01010000ff00, 0xffff010100000100, 0xffff01010001ff00, 0xffff010100010000,
+    0xffff010101ffffff, 0xffff010101ffff01, 0xffff010101ff0000, 0xffff010101ff01ff,
+    0xffff010101ff0101, 0xffff010101000000, 0xffff01010101ffff, 0xffff01010101ff01,
+    0xffff0101010101ff, 0xffff010101010101, 0xff00ffffff00ffff, 0xff00ffffff00ff00,
+    0xff00ffffff0000ff, 0xff00ffffff000100, 0xff00ffffff0100ff, 0xff00ffffff010000,
+    0xff00ffff00ffff00, 0xff00ffff00ff00ff, 0xff00ffff0000ffff, 0xff00ffff00000000,
+    0xff00ffff000001ff, 0xff00ffff0001ff00, 0xff00ffff000100ff, 0xff00ffff00010000,
+    0xff00ffff00010100, 0xff00ffff0100ff00, 0xff00ffff010000ff, 0xff00ffff01000001,
+    0xff00ffff0101ff00, 0xff00ffff01010000, 0xff00ff00ffffff00, 0xff00ff00ffff00ff,
+    0xff00ff00ffff0001, 0xff00ff00ffff0100, 0xff00ff00ff00ffff, 0xff00ff00ff00ff01,
+    0xff00ff00ff000000, 0xff00ff00ff0001ff, 0xff00ff00ff01ff00, 0xff00ff00ff0100ff,
+    0xff00ff00ff010100, 0xff00ff0000ff0000, 0xff00ff0000ff0101, 0xff00ff000000ffff,
+    0xff00ff000000ff00, 0xff00ff000000ff01, 0xff00ff00000000ff, 0xff00ff0000000000,
+    0xff00ff0000000001, 0xff00ff0000000100, 0xff00ff000001ffff, 0xff00ff0000010000,
+    0xff00ff0001ff00ff, 0xff00ff000100ff01, 0xff00ff0001000000, 0xff00ff000101ff00,
+    0xff00ff00010100ff, 0xff00ff01ff00ff00, 0xff00ff01ff0000ff, 0xff00ff01ff000001,
+    0xff00ff01ff010000, 0xff00ff0100ffffff, 0xff00ff0100ff0001, 0xff00ff0100ff0100,
+    0xff00ff010000ff01, 0xff00ff0100000000, 0xff00ff01000001ff, 0xff00ff0100000101,
+    0xff00ff01000100ff, 0xff00ff0100010001, 0xff00ff0101ff0000, 0xff00ff010100ff00,
+    0xff00ff01010000ff, 0xff00ff0101000001, 0xff00ff0101010000, 0xff0000ffffffff00,
+    0xff0000ffffff0001, 0xff0000ffffff0100, 0xff0000ffff0000ff, 0xff0000ffff000000,
+    0xff0000ffff0001ff, 0xff0000ffff000100, 0xff0000ffff01ff00, 0xff0000ffff010001,
+    0xff0000ff00ffff00, 0xff0000ff00ff0000, 0xff0000ff00ff0001, 0xff0000ff00ff01ff,
+    0xff0000ff00ff0101, 0xff0000ff0000ff00, 0xff0000ff000000ff, 0xff0000ff00000000,
+    0xff0000ff00000001, 0xff0000ff00000100, 0xff0000ff0001ff01, 0xff0000ff00010000,
+    0xff0000ff000101ff, 0xff0000ff01ff00ff, 0xff0000ff01ff0100, 0xff0000ff0100ffff,
+    0xff0000ff010000ff, 0xff0000ff01000000, 0xff0000ff010001ff, 0xff0000ff01000100,
+    0xff0000ff01000101, 0xff0000ff0101ff00, 0xff0000ff010100ff, 0xff0000ff01010000,
+    0xff0000ff01010100, 0xff000000ffffff01, 0xff000000ffff0000, 0xff000000ffff0101,
+    0xff000000ff00ff00, 0xff000000ff0000ff, 0xff000000ff000000, 0xff000000ff000001,
+    0xff000000ff000100, 0xff000000ff01ffff, 0xff000000ff01ff01, 0xff000000ff010000,
+    0xff000000ff0101ff, 0xff000000ff010101, 0xff00000000ffff00, 0xff00000000ff00ff,
+    0xff00000000ff0000, 0xff00000000ff0001, 0xff0000000000ff00, 0xff0000000000ff01,
+    0xff000000000000ff, 0xff00000000000000, 0xff00000000000001, 0xff00000000000100,
+    0xff00000000000101, 0xff0000000001ff00, 0xff000000000100ff, 0xff00000000010000,
+    0xff00000000010001, 0xff00000000010100, 0xff00000001ffffff, 0xff00000001ffff01,
+    0xff00000001ff00ff, 0xff00000001ff0000, 0xff00000001ff01ff, 0xff00000001ff0101,
+    0xff0000000100ffff, 0xff0000000100ff00, 0xff000000010000ff, 0xff00000001000000,
+    0xff00000001000001, 0xff00000001000100, 0xff00000001000101, 0xff0000000101ffff,
+    0xff0000000101ff01, 0xff00000001010000, 0xff000001ffffff00, 0xff000001ffff00ff,
+    0xff000001ffff0000, 0xff000001ffff0001, 0xff000001ff000000, 0xff000001ff000001,
+    0xff000001ff0001ff, 0xff000001ff000101, 0xff000001ff01ff00, 0xff000001ff010001,
+    0xff00000100ffffff, 0xff00000100ffff01, 0xff00000100ff00ff, 0xff00000100ff0000,
+    0xff00000100ff01ff, 0xff00000100ff0101, 0xff0000010000ff00, 0xff00000100000000,
+    0xff00000100000001, 0xff000001000001ff, 0xff00000100000100, 0xff0000010001ff00,
+    0xff000001000100ff, 0xff00000100010000, 0xff000001000101ff, 0xff00000100010100,
+    0xff00000100010101, 0xff00000101ff0001, 0xff00000101ff0101, 0xff0000010100ff01,
+    0xff00000101000000, 0xff000001010100ff, 0xff00000101010100, 0xff0001ffff00ff00,
+    0xff0001ffff000001, 0xff0001ffff010000, 0xff0001ff00ffff00, 0xff0001ff00ff00ff,
+    0xff0001ff00ff0001, 0xff0001ff00ff0100, 0xff0001ff0000ffff, 0xff0001ff00000000,
+    0xff0001ff000001ff, 0xff0001ff00000101, 0xff0001ff0001ffff, 0xff0001ff0001ff00,
+    0xff0001ff000100ff, 0xff0001ff00010001, 0xff0001ff00010100, 0xff0001ff01ff0000,
+    0xff0001ff0100ff00, 0xff0001ff010000ff, 0xff0001ff01010000, 0xff000100ff00ffff,
+    0xff000100ff00ff01, 0xff000100ff000000, 0xff000100ff000101, 0xff000100ff01ff00,
+    0xff000100ff010000, 0xff00010000ffff01, 0xff00010000ff00ff, 0xff00010000ff0000,
+    0xff00010000ff01ff, 0xff0001000000ff00, 0xff000100000000ff, 0xff00010000000000,
+    0xff00010000000001, 0xff00010000000100, 0xff00010000000101, 0xff0001000001ffff,
+    0xff00010000010000, 0xff00010000010101, 0xff00010001ff0100, 0xff0001000100ff00,
+    0xff0001000100ff01, 0xff00010001000000, 0xff000100010001ff, 0xff0001000101ff00,
+    0xff00010001010001, 0xff00010001010100, 0xff000101ffff0100, 0xff000101ff000001,
+    0xff000101ff0100ff, 0xff000101ff010001, 0xff00010100ff00ff, 0xff00010100ff0001,
+    0xff00010100ff0100, 0xff0001010000ffff, 0xff0001010000ff01, 0xff00010100000000,
+    0xff000101000001ff, 0xff0001010001ff00, 0xff00010100010001, 0xff00010100010100,
+    0xff00010101ff0000, 0xff0001010100ff00, 0xff00010101000001, 0xff00010101000101,
+    0xff01ffffffffffff, 0xff01ffffffffff01, 0xff01ffffffff01ff, 0xff01ffffffff0101,
+    0xff01ffffff000000, 0xff01ffffff01ffff, 0xff01ffffff01ff01, 0xff01ffffff010000,
+    0xff01ffffff0101ff, 0xff01ffffff010101, 0xff01ffff00ff0000, 0xff01ffff0000ff00,
+    0xff01ffff00000100, 0xff01ffff0001ff00, 0xff01ffff00010000, 0xff01ffff01ffffff,
+    0xff01ffff01ffff01, 0xff01ffff01ff01ff, 0xff01ffff01ff0101, 0xff01ffff01000000,
+    0xff01ffff0101ffff, 0xff01ffff0101ff01, 0xff01ffff01010000, 0xff01ffff010101ff,
+    0xff01ffff01010101, 0xff01ff00ffff0000, 0xff01ff00ff00ff00, 0xff01ff00ff0000ff,
+    0xff01ff00ff000100, 0xff01ff00ff010000, 0xff01ff0000ffff01, 0xff01ff0000ff00ff,
+    0xff01ff0000ff0100, 0xff01ff0000000000, 0xff01ff00000001ff, 0xff01ff0000000101,
+    0xff01ff000001ff00, 0xff01ff00000100ff, 0xff01ff0000010000, 0xff01ff0000010001,
+    0xff01ff0001ff0000, 0xff01ff000100ffff, 0xff01ff0001000001, 0xff01ff0001000100,
+    0xff01ff0001010000, 0xff01ff01ffffff00, 0xff01ff01ffff01ff, 0xff01ff01ffff0101,
+    0xff01ff01ff00ff00, 0xff01ff01ff000000, 0xff01ff01ff01ffff, 0xff01ff01ff01ff01,
+    0xff01ff01ff0101ff, 0xff01ff01ff010101, 0xff01ff0100ff0000, 0xff01ff010000ff00,
+    0xff01ff0100000001, 0xff01ff0100000100, 0xff01ff0100010000, 0xff01ff0101ffff00,
+    0xff01ff0101ff01ff, 0xff01ff0101ff0101, 0xff01ff010100ff00, 0xff01ff0101000000,
+    0xff01ff010101ffff, 0xff01ff010101ff01, 0xff01ff01010101ff, 0xff01ff0101010101,
+    0xff0100ffffff0000, 0xff0100ffff0000ff, 0xff0100ffff000001, 0xff0100ffff000100,
+    0xff0100ffff010000, 0xff0100ff00ff00ff, 0xff0100ff00ff0000, 0xff0100ff00ff0001,
+    0xff0100ff00ff0100, 0xff0100ff0000ff01, 0xff0100ff00000000, 0xff0100ff000001ff,
+    0xff0100ff00000101, 0xff0100ff00010001, 0xff0100ff01ff0000, 0xff0100ff0100ff00,
+    0xff0100ff010000ff, 0xff0100ff01000100, 0xff0100ff0101ff00, 0xff0100ff01010000,
+    0xff010000ffff0100, 0xff010000ff000000, 0xff010000ff01ff00, 0xff010000ff010100,
+    0xff01000000ffffff, 0xff01000000ff0000, 0xff01000000ff01ff, 0xff0100000000ff00,
+    0xff010000000000ff, 0xff01000000000000, 0xff01000000000100, 0xff0100000001ff01,
+    0xff01000000010000, 0xff010000000101ff, 0xff01000001ff0100, 0xff0100000100ffff,
+    0xff010000010000ff, 0xff01000001000000, 0xff010000010001ff, 0xff01000001000101,
+    0xff0100000101ff00, 0xff010000010100ff, 0xff01000001010001, 0xff01000001010100,
+    0xff010001ffff0000, 0xff010001ff00ffff, 0xff010001ff00ff01, 0xff010001ff000100,
+    0xff010001ff010000, 0xff01000100ffff00, 0xff01000100ff0100, 0xff01000100000000,
+    0xff0100010001ffff, 0xff0100010001ff00, 0xff01000100010100, 0xff01000101ff00ff,
+    0xff01000101ff0001, 0xff0100010100ffff, 0xff01000101000101, 0xff0101ffffffffff,
+    0xff0101ffffffff01, 0xff0101ffffff01ff, 0xff0101ffffff0101, 0xff0101ffff000000,
+    0xff0101ffff01ffff, 0xff0101ffff01ff01, 0xff0101ffff0101ff, 0xff0101ffff010101,
+    0xff0101ff00ff0000, 0xff0101ff0000ff00, 0xff0101ff000000ff, 0xff0101ff00010000,
+    0xff0101ff01ffffff, 0xff0101ff01ffff01, 0xff0101ff01ff01ff, 0xff0101ff01ff0101,
+    0xff0101ff0101ffff, 0xff0101ff0101ff01, 0xff0101ff010101ff, 0xff0101ff01010101,
+    0xff010100ffff0100, 0xff010100ff00ff00, 0xff010100ff0000ff, 0xff010100ff000100,
+    0xff010100ff010000, 0xff01010000ff0001, 0xff01010000ff0100, 0xff0101000000ff01,
+    0xff01010000000000, 0xff0101000001ff00, 0xff010100000100ff, 0xff01010000010001,
+    0xff01010000010100, 0xff01010001ff0000, 0xff0101000100ffff, 0xff01010001000001,
+    0xff01010001000100, 0xff010100010100ff, 0xff01010001010000, 0xff010101ffffffff,
+    0xff010101ffffff01, 0xff010101ffff01ff, 0xff010101ffff0101, 0xff010101ff01ffff,
+    0xff010101ff01ff01, 0xff010101ff0101ff, 0xff010101ff010101, 0xff01010100ff0000,
+    0xff0101010000ff00, 0xff01010100000001, 0xff01010100000100, 0xff01010100010000,
+    0xff01010101ffffff, 0xff01010101ffff01, 0xff01010101ff01ff, 0xff01010101ff0101,
+    0xff01010101000000, 0xff0101010101ffff, 0xff0101010101ff01, 0xff010101010101ff,
+    0xff01010101010101, 0x00ffffffffff0000, 0x00ffffffff00ff00, 0x00ffffffff000001,
+    0x00ffffffff010000, 0x00ffffff00ff0100, 0x00ffffff0000ff01, 0x00ffffff00000000,
+    0x00ffffff000001ff, 0x00ffffff00000101, 0x00ffffff0001ff00, 0x00ffffff000100ff,
+    0x00ffffff00010001, 0x00ffffff010000ff, 0x00ffffff01000100, 0x00ffffff0101ff00,
+    0x00ffffff01010001, 0x00ffff00ffffffff, 0x00ffff00ffffff00, 0x00ffff00ffff00ff,
+    0x00ffff00ffff0001, 0x00ffff00ffff0100, 0x00ffff00ff00ff01, 0x00ffff00ff000000,
+    0x00ffff00ff000001, 0x00ffff00ff0001ff, 0x00ffff00ff000101, 0x00ffff00ff01ff00,
+    0x00ffff00ff010001, 0x00ffff00ff010100, 0x00ffff0000ff0000, 0x00ffff0000ff01ff,
+    0x00ffff0000ff0101, 0x00ffff000000ff00, 0x00ffff00000000ff, 0x00ffff0000000000,
+    0x00ffff0000000001, 0x00ffff0000000100, 0x00ffff0000000101, 0x00ffff0000010000,
+    0x00ffff00000101ff, 0x00ffff0000010101, 0x00ffff0001ffff00, 0x00ffff0001ff00ff,
+    0x00ffff0001ff0001, 0x00ffff000100ffff, 0x00ffff000100ff01, 0x00ffff0001000000,
+    0x00ffff000101ffff, 0x00ffff000101ff00, 0x00ffff000101ff01, 0x00ffff01ffff0000,
+    0x00ffff01ff00ff00, 0x00ffff01ff0000ff, 0x00ffff01ff000001, 0x00ffff01ff010000,
+    0x00ffff0100ffff00, 0x00ffff010000ff01, 0x00ffff0100000000, 0x00ffff0100000101,
+    0x00ffff01000100ff, 0x00ffff0100010100, 0x00ffff0101ff0100, 0x00ffff01010000ff,
+    0x00ffff0101010000, 0x00ff00ffffffff00, 0x00ff00ffff000000, 0x00ff00ffff000100,
+    0x00ff00ffff010100, 0x00ff00ff00ff0000, 0x00ff00ff00ff01ff, 0x00ff00ff00ff0101,
+    0x00ff00ff0000ff00, 0x00ff00ff000000ff, 0x00ff00ff00000000, 0x00ff00ff00000001,
+    0x00ff00ff0001ff00, 0x00ff00ff0001ff01, 0x00ff00ff00010000, 0x00ff00ff000101ff,
+    0x00ff00ff00010101, 0x00ff00ff01ffff00, 0x00ff00ff01ff0001, 0x00ff00ff01ff0100,
+    0x00ff00ff0100ffff, 0x00ff00ff0100ff01, 0x00ff00ff01000000, 0x00ff00ff0101ffff,
+    0x00ff00ff0101ff00, 0x00ff00ff01010100, 0x00ff0000ffffff00, 0x00ff0000ffffff01,
+    0x00ff0000ffff0000, 0x00ff0000ffff0101, 0x00ff0000ff00ff00, 0x00ff0000ff0000ff,
+    0x00ff0000ff000000, 0x00ff0000ff000001, 0x00ff0000ff000100, 0x00ff0000ff01ffff,
+    0x00ff0000ff010000, 0x00ff0000ff010101, 0x00ff000000ffff00, 0x00ff000000ff00ff,
+    0x00ff000000ff0000, 0x00ff000000ff0001, 0x00ff000000ff0100, 0x00ff00000000ffff,
+    0x00ff00000000ff00, 0x00ff0000000000ff, 0x00ff000000000000, 0x00ff000000000001,
+    0x00ff0000000001ff, 0x00ff000000000100, 0x00ff00000001ff00, 0x00ff0000000100ff,
+    0x00ff000000010000, 0x00ff000000010001, 0x00ff000000010100, 0x00ff000001ffff01,
+    0x00ff000001ff00ff, 0x00ff000001ff0000, 0x00ff000001ff01ff, 0x00ff00000100ff00,
+    0x00ff0000010000ff, 0x00ff000001000000, 0x00ff000001000001, 0x00ff000001000100,
+    0x00ff000001000101, 0x00ff000001010000, 0x00ff0000010101ff, 0x00ff000001010101,
+    0x00ff0001ffffff00, 0x00ff0001ffff0000, 0x00ff0001ffff0100, 0x00ff0001ff0000ff,
+    0x00ff0001ff000000, 0x00ff0001ff0001ff, 0x00ff0001ff000101, 0x00ff0001ff01ff00,
+    0x00ff0001ff0100ff, 0x00ff0001ff010100, 0x00ff000100ffffff, 0x00ff000100ffff01,
+    0x00ff000100ff0000, 0x00ff000100ff01ff, 0x00ff00010000ffff, 0x00ff00010000ff00,
+    0x00ff00010000ff01, 0x00ff000100000000, 0x00ff000100000001, 0x00ff000100000100,
+    0x00ff00010001ff01, 0x00ff000100010000, 0x00ff0001000101ff, 0x00ff000101ffff00,
+    0x00ff000101ff0000, 0x00ff000101ff0101, 0x00ff0001010000ff, 0x00ff000101000000,
+    0x00ff00010101ff00, 0x00ff0001010100ff, 0x00ff000101010001, 0x00ff01ffffff0000,
+    0x00ff01ffff00ff00, 0x00ff01ffff000000, 0x00ff01ffff000101, 0x00ff01ffff010000,
+    0x00ff01ff00ffff01, 0x00ff01ff00ff0100, 0x00ff01ff0000ffff, 0x00ff01ff00000000,
+    0x00ff01ff000001ff, 0x00ff01ff0001ff00, 0x00ff01ff000100ff, 0x00ff01ff00010001,
+    0x00ff01ff00010100, 0x00ff01ff01ff0000, 0x00ff01ff0100ff00, 0x00ff01ff010000ff,
+    0x00ff01ff01000001, 0x00ff01ff01000100, 0x00ff01ff01010000, 0x00ff0100ffffff00,
+    0x00ff0100ffff0000, 0x00ff0100ffff0001, 0x00ff0100ffff0101, 0x00ff0100ff00ffff,
+    0x00ff0100ff0000ff, 0x00ff0100ff000000, 0x00ff0100ff0001ff, 0x00ff0100ff01ff00,
+    0x00ff0100ff0100ff, 0x00ff0100ff010001, 0x00ff010000ffffff, 0x00ff010000ff0000,
+    0x00ff010000ff0101, 0x00ff01000000ff00, 0x00ff01000000ff01, 0x00ff0100000000ff,
+    0x00ff010000000000, 0x00ff010000000001, 0x00ff010000000100, 0x00ff01000001ffff,
+    0x00ff01000001ff01, 0x00ff010000010000, 0x00ff010000010001, 0x00ff010000010101,
+    0x00ff010001ff0001, 0x00ff010001ff0100, 0x00ff01000100ff01, 0x00ff010001000000,
+    0x00ff010001000001, 0x00ff0100010001ff, 0x00ff01000101ff00, 0x00ff0100010100ff,
+    0x00ff010001010001, 0x00ff010001010100, 0x00ff0101ff000001, 0x00ff010100ff00ff,
+    0x00ff010100ff0001, 0x00ff010100ff0100, 0x00ff010100000000, 0x00ff0101000001ff,
+    0x00ff010100000101, 0x00ff0101000100ff, 0x00ff010100010100, 0x00ff0101010000ff,
+    0x00ff010101010000, 0x0000ffffffffff00, 0x0000ffffffff00ff, 0x0000ffffffff0000,
+    0x0000ffffffff0001, 0x0000ffffffff0100, 0x0000ffffff00ff01, 0x0000ffffff000000,
+    0x0000ffffff000101, 0x0000ffffff01ff00, 0x0000ffffff0100ff, 0x0000ffffff010100,
+    0x0000ffff00ffffff, 0x0000ffff00ff0000, 0x0000ffff00ff01ff, 0x0000ffff0000ff00,
+    0x0000ffff000000ff, 0x0000ffff00000000, 0x0000ffff00000001, 0x0000ffff00000100,
+    0x0000ffff00010000, 0x0000ffff000101ff, 0x0000ffff01ff0001, 0x0000ffff01ff0100,
+    0x0000ffff01000000, 0x0000ffff010001ff, 0x0000ffff0101ffff, 0x0000ffff0101ff00,
+    0x0000ffff01010001, 0x0000ffff01010100, 0x0000ff00ffff0000, 0x0000ff00ffff01ff,
+    0x0000ff00ffff0100, 0x0000ff00ffff0101, 0x0000ff00ff00ff00, 0x0000ff00ff0000ff,
+    0x0000ff00ff000000, 0x0000ff00ff000001, 0x0000ff00ff0001ff, 0x0000ff00ff000100,
+    0x0000ff00ff01ffff, 0x0000ff00ff010000, 0x0000ff00ff010001, 0x0000ff00ff0101ff,
+    0x0000ff00ff010101, 0x0000ff0000ffff00, 0x0000ff0000ff00ff, 0x0000ff0000ff0000,
+    0x0000ff0000ff0001, 0x0000ff0000ff0100, 0x0000ff000000ffff, 0x0000ff000000ff00,
+    0x0000ff000000ff01, 0x0000ff00000000ff, 0x0000ff0000000000, 0x0000ff0000000001,
+    0x0000ff00000001ff, 0x0000ff0000000100, 0x0000ff0000000101, 0x0000ff000001ff00,
+    0x0000ff00000100ff, 0x0000ff0000010000, 0x0000ff0000010001, 0x0000ff0000010100,
+    0x0000ff0001ffff01, 0x0000ff0001ff0000, 0x0000ff000100ff00, 0x0000ff00010000ff,
+    0x0000ff0001000000, 0x0000ff0001000001, 0x0000ff0001000100, 0x0000ff000101ffff,
+    0x0000ff0001010000, 0x0000ff0001010101, 0x0000ff01ffffff00, 0x0000ff01ffff0001,
+    0x0000ff01ff00ff01, 0x0000ff01ff000000, 0x0000ff01ff000101, 0x0000ff01ff01ff00,
+    0x0000ff01ff0100ff, 0x0000ff0100ffff01, 0x0000ff0100ff0000, 0x0000ff0100ff0101,
+    0x0000ff010000ff00, 0x0000ff01000000ff, 0x0000ff0100000000, 0x0000ff0100000001,
+    0x0000ff0100000100, 0x0000ff010001ff01, 0x0000ff0100010000, 0x0000ff0101ff0000,
+    0x0000ff010100ffff, 0x0000ff010100ff01, 0x0000ff0101000000, 0x0000ff0101000100,
+    0x0000ff0101000101, 0x0000ff01010100ff, 0x000000ffffff00ff, 0x000000ffffff0000,
+    0x000000ffff00ff00, 0x000000ffff0000ff, 0x000000ffff000000, 0x000000ffff000001,
+    0x000000ffff0001ff, 0x000000ffff000100, 0x000000ffff01ff00, 0x000000ffff010000,
+    0x000000ffff0101ff, 0x000000ffff010101, 0x000000ff00ffff00, 0x000000ff00ff00ff,
+    0x000000ff00ff0000, 0x000000ff00ff0001, 0x000000ff00ff0100, 0x000000ff00ff0101,
+    0x000000ff0000ffff, 0x000000ff0000ff00, 0x000000ff000000ff, 0x000000ff00000000,
+    0x000000ff00000001, 0x000000ff000001ff, 0x000000ff00000100, 0x000000ff00000101,
+    0x000000ff0001ff00, 0x000000ff0001ff01, 0x000000ff000100ff, 0x000000ff00010000,
+    0x000000ff00010001, 0x000000ff00010100, 0x000000ff01ffffff, 0x000000ff01ff01ff,
+    0x000000ff01ff0101, 0x000000ff0100ff00, 0x000000ff010000ff, 0x000000ff01000000,
+    0x000000ff01000001, 0x000000ff01000100, 0x000000ff0101ff00, 0x000000ff010100ff,
+    0x000000ff01010000, 0x000000ff01010101, 0x00000000ffffff00, 0x00000000ffffff01,
+    0x00000000ffff00ff, 0x00000000ffff0000, 0x00000000ffff0001, 0x00000000ffff0100,
+    0x00000000ff00ffff, 0x00000000ff00ff00, 0x00000000ff00ff01, 0x00000000ff0000ff,
+    0x00000000ff000000, 0x00000000ff000001, 0x00000000ff000100, 0x00000000ff000101,
+    0x00000000ff01ff00, 0x00000000ff0100ff, 0x00000000ff010000, 0x00000000ff010001,
+    0x00000000ff010100, 0x0000000000ffffff, 0x0000000000ffff00, 0x0000000000ffff01,
+    0x0000000000ff00ff, 0x0000000000ff0000, 0x0000000000ff0001, 0x0000000000ff01ff,
+    0x0000000000ff0100, 0x000000000000ffff, 0x000000000000ff00, 0x000000000000ff01,
+    0x00000000000000ff, 0x0000000000000000, 0x0000000000000001, 0x00000000000001ff,
+    0x0000000000000100, 0x0000000000000101, 0x000000000001ffff, 0x000000000001ff00,
+    0x00000000000100ff, 0x0000000000010000, 0x0000000000010001, 0x00000000000101ff,
+    0x0000000000010100, 0x0000000000010101, 0x0000000001ffff00, 0x0000000001ff00ff,
+    0x0000000001ff0000, 0x0000000001ff0100, 0x0000000001ff0101, 0x000000000100ffff,
+    0x000000000100ff00, 0x00000000010000ff, 0x0000000001000000, 0x0000000001000001,
+    0x00000000010001ff, 0x0000000001000100, 0x000000000101ff00, 0x00000000010100ff,
+    0x0000000001010000, 0x0000000001010001, 0x0000000001010100, 0x00000001ffffffff,
+    0x00000001ffffff00, 0x00000001ffffff01, 0x00000001ffff00ff, 0x00000001ffff0001,
+    0x00000001ffff01ff, 0x00000001ffff0100, 0x00000001ff00ff00, 0x00000001ff0000ff,
+    0x00000001ff000000, 0x00000001ff0001ff, 0x00000001ff000100, 0x00000001ff01ffff,
+    0x00000001ff01ff00, 0x00000001ff01ff01, 0x00000001ff0100ff, 0x00000001ff010000,
+    0x00000001ff010001, 0x00000001ff0101ff, 0x00000001ff010100, 0x0000000100ffff00,
+    0x0000000100ff0000, 0x0000000100ff0001, 0x0000000100ff01ff, 0x0000000100ff0100,
+    0x0000000100ff0101, 0x000000010000ffff, 0x000000010000ff00, 0x000000010000ff01,
+    0x00000001000000ff, 0x0000000100000000, 0x0000000100000001, 0x00000001000001ff,
+    0x0000000100000100, 0x0000000100000101, 0x000000010001ff00, 0x00000001000100ff,
+    0x0000000100010000, 0x0000000100010100, 0x0000000101ffff01, 0x0000000101ff0000,
+    0x0000000101ff0001, 0x0000000101ff01ff, 0x0000000101ff0100, 0x0000000101ff0101,
+    0x000000010100ff00, 0x0000000101000000, 0x0000000101000101, 0x000000010101ff01,
+    0x0000000101010000, 0x0000000101010001, 0x00000001010101ff, 0x0000000101010100,
+    0x000001ffffff00ff, 0x000001ffffff0000, 0x000001ffffff0001, 0x000001ffffff0100,
+    0x000001ffff00ffff, 0x000001ffff000000, 0x000001ffff0001ff, 0x000001ffff01ff00,
+    0x000001ffff010101, 0x000001ff00ff0000, 0x000001ff00ff01ff, 0x000001ff00ff0101,
+    0x000001ff0000ff00, 0x000001ff000000ff, 0x000001ff00000000, 0x000001ff00000001,
+    0x000001ff000001ff, 0x000001ff00000100, 0x000001ff0001ffff, 0x000001ff0001ff01,
+    0x000001ff000100ff, 0x000001ff00010000, 0x000001ff01ffff01, 0x000001ff01ff0100,
+    0x000001ff0100ffff, 0x000001ff0100ff01, 0x000001ff01000000, 0x000001ff010001ff,
+    0x000001ff0101ff00, 0x000001ff01010100, 0x00000100ffffff00, 0x00000100ffffff01,
+    0x00000100ffff0000, 0x00000100ffff0101, 0x00000100ff00ff00, 0x00000100ff0000ff,
+    0x00000100ff000000, 0x00000100ff000001, 0x00000100ff000100, 0x00000100ff010000,
+    0x0000010000ffff00, 0x0000010000ff00ff, 0x0000010000ff0000, 0x0000010000ff0001,
+    0x0000010000ff0100, 0x000001000000ffff, 0x000001000000ff00, 0x000001000000ff01,
+    0x00000100000000ff, 0x0000010000000000, 0x0000010000000001, 0x00000100000001ff,
+    0x0000010000000100, 0x0000010000000101, 0x000001000001ff00, 0x00000100000100ff,
+    0x0000010000010000, 0x0000010000010001, 0x0000010000010100, 0x0000010001ffff00,
+    0x0000010001ff0000, 0x0000010001ff0100, 0x000001000100ff00, 0x00000100010000ff,
+    0x0000010001000000, 0x0000010001000001, 0x00000100010001ff, 0x0000010001000100,
+    0x0000010001010000, 0x00000101ffff00ff, 0x00000101ffff01ff, 0x00000101ff000000,
+    0x00000101ff000101, 0x00000101ff01ffff, 0x00000101ff010000, 0x00000101ff010001,
+    0x00000101ff010100, 0x0000010100ff0000, 0x0000010100ff01ff, 0x0000010100ff0100,
+    0x000001010000ff00, 0x0000010100000000, 0x0000010100000001, 0x00000101000001ff,
+    0x0000010100000100, 0x000001010001ff01, 0x0000010100010000, 0x00000101000101ff,
+    0x0000010100010101, 0x0000010101ffff00, 0x0000010101ff0101, 0x000001010100ff01,
+    0x0000010101000000, 0x0000010101000001, 0x00000101010001ff, 0x0000010101000101,
+    0x000001010101ff00, 0x0001ffffffff0000, 0x0001ffffff0000ff, 0x0001ffffff000001,
+    0x0001ffffff000100, 0x0001ffffff010000, 0x0001ffff00ff00ff, 0x0001ffff0000ffff,
+    0x0001ffff00000000, 0x0001ffff00000001, 0x0001ffff000001ff, 0x0001ffff00000101,
+    0x0001ffff0001ff00, 0x0001ffff000100ff, 0x0001ffff00010001, 0x0001ffff00010100,
+    0x0001ffff01ffff00, 0x0001ffff01000001, 0x0001ffff01010000, 0x0001ff00ffffff00,
+    0x0001ff00ffff00ff, 0x0001ff00ffff0001, 0x0001ff00ffff0100, 0x0001ff00ff00ff01,
+    0x0001ff00ff000000, 0x0001ff00ff01ff00, 0x0001ff00ff01ff01, 0x0001ff00ff010001,
+    0x0001ff00ff010100, 0x0001ff0000ff0000, 0x0001ff0000ff0100, 0x0001ff000000ff00,
+    0x0001ff0000000000, 0x0001ff0000000001, 0x0001ff0000000100, 0x0001ff0000010000,
+    0x0001ff0000010001, 0x0001ff0000010101, 0x0001ff0001ff00ff, 0x0001ff0001ff0101,
+    0x0001ff000100ff01, 0x0001ff0001000000, 0x0001ff000101ff00, 0x0001ff0001010001,
+    0x0001ff0001010100, 0x0001ff01ff00ff00, 0x0001ff01ff000001, 0x0001ff01ff000100,
+    0x0001ff0100ffffff, 0x0001ff0100ffff00, 0x0001ff0100ff0001, 0x0001ff0100000000,
+    0x0001ff0100000001, 0x0001ff01000001ff, 0x0001ff010001ffff, 0x0001ff0101ff0000,
+    0x0001ff010100ff00, 0x0001ff0101000001, 0x0001ff0101010000, 0x000100ffff00ff00,
+    0x000100ffff00ff01, 0x000100ffff000000, 0x000100ffff000001, 0x000100ffff000101,
+    0x000100ffff01ff00, 0x000100ffff010001, 0x000100ffff010100, 0x000100ff00ffffff,
+    0x000100ff00ffff01, 0x000100ff00ff0000, 0x000100ff00ff01ff, 0x000100ff00ff0101,
+    0x000100ff0000ff00, 0x000100ff000000ff, 0x000100ff00000000, 0x000100ff00000001,
+    0x000100ff00000100, 0x000100ff00000101, 0x000100ff0001ffff, 0x000100ff0001ff01,
+    0x000100ff00010000, 0x000100ff01ff00ff, 0x000100ff01ff0000, 0x000100ff01ff0100,
+    0x000100ff0100ffff, 0x000100ff0100ff01, 0x000100ff010000ff, 0x000100ff01000000,
+    0x000100ff01000001, 0x000100ff010001ff, 0x000100ff01000101, 0x000100ff0101ff00,
+    0x000100ff010100ff, 0x000100ff01010100, 0x00010000ffff0000, 0x00010000ffff01ff,
+    0x00010000ffff0101, 0x00010000ff00ff00, 0x00010000ff000000, 0x00010000ff000001,
+    0x00010000ff000100, 0x0001000000ff00ff, 0x0001000000ff0000, 0x0001000000ff0001,
+    0x0001000000ff0100, 0x000100000000ffff, 0x000100000000ff00, 0x00010000000000ff,
+    0x0001000000000000, 0x0001000000000001, 0x0001000000000100, 0x000100000001ff00,
+    0x00010000000100ff, 0x0001000000010000, 0x0001000000010001, 0x0001000000010100,
+    0x0001000001ff0001, 0x0001000001ff0100, 0x0001000001ff0101, 0x000100000100ff00,
+    0x0001000001000000, 0x0001000001000001, 0x0001000001000100, 0x0001000001000101,
+    0x000100000101ff01, 0x0001000001010000, 0x0001000001010001, 0x00010000010101ff,
+    0x00010001ffffff01, 0x00010001ffff0100, 0x00010001ff000000, 0x00010001ff01ffff,
+    0x00010001ff010001, 0x00010001ff0101ff, 0x00010001ff010100, 0x0001000100ffffff,
+    0x0001000100ff0000, 0x0001000100ff01ff, 0x0001000100ff0101, 0x000100010000ff00,
+    0x00010001000000ff, 0x0001000100000000, 0x0001000100000001, 0x00010001000001ff,
+    0x0001000100000101, 0x000100010001ffff, 0x0001000100010000, 0x00010001000101ff,
+    0x0001000101ffffff, 0x0001000101ffff01, 0x0001000101ff0000, 0x0001000101ff0101,
+    0x00010001010000ff, 0x0001000101000001, 0x00010001010001ff, 0x0001000101000100,
+    0x000100010101ffff, 0x00010001010100ff, 0x0001000101010001, 0x0001000101010101,
+    0x000101ffff000001, 0x000101ffff000100, 0x000101ffff010000, 0x000101ff00ffff00,
+    0x000101ff0000ff01, 0x000101ff00000000, 0x000101ff00000101, 0x000101ff0001ff00,
+    0x000101ff00010100, 0x000101ff01ff0000, 0x000101ff0100ff00, 0x000101ff010001ff,
+    0x000101ff01010001, 0x00010100ffffff00, 0x00010100ffff00ff, 0x00010100ff00ffff,
+    0x00010100ff000000, 0x00010100ff01ff00, 0x00010100ff0100ff, 0x00010100ff010001,
+    0x00010100ff010100, 0x0001010000ffffff, 0x0001010000ffff00, 0x0001010000ff0000,
+    0x0001010000ff0001, 0x0001010000ff01ff, 0x000101000000ff00, 0x00010100000000ff,
+    0x0001010000000000, 0x0001010000000001, 0x0001010000000100, 0x000101000001ffff,
+    0x0001010000010000, 0x0001010000010101, 0x0001010001ffff01, 0x0001010001ff00ff,
+    0x0001010001ff0101, 0x0001010001000000, 0x000101000101ff00, 0x00010100010100ff,
+    0x0001010001010000, 0x0001010001010100, 0x00010101ff00ff00, 0x00010101ff000001,
+    0x00010101ff0001ff, 0x0001010100ffff00, 0x0001010100ff00ff, 0x0001010100ff0100,
+    0x000101010000ffff, 0x0001010100000000, 0x00010101000001ff, 0x0001010100000101,
+    0x00010101000100ff, 0x0001010100010000, 0x0001010100010100, 0x0001010101ff0001,
+    0x00010101010000ff, 0x00010101010001ff, 0x0001010101000101, 0x0001010101010001,
+    0x01ffffffffffffff, 0x01ffffffffffff01, 0x01ffffffffff01ff, 0x01ffffffffff0101,
+    0x01ffffffff01ffff, 0x01ffffffff01ff01, 0x01ffffffff0101ff, 0x01ffffffff010101,
+    0x01ffffff00ff0000, 0x01ffffff0000ffff, 0x01ffffff0000ff00, 0x01ffffff000000ff,
+    0x01ffffff00000001, 0x01ffffff00000100, 0x01ffffff00010000, 0x01ffffff01ffffff,
+    0x01ffffff01ffff01, 0x01ffffff01ff01ff, 0x01ffffff01ff0101, 0x01ffffff01000000,
+    0x01ffffff0101ffff, 0x01ffffff0101ff01, 0x01ffffff010101ff, 0x01ffffff01010101,
+    0x01ffff00ffff0000, 0x01ffff00ff00ff00, 0x01ffff00ff0000ff, 0x01ffff00ff000001,
+    0x01ffff00ff000100, 0x01ffff00ff010000, 0x01ffff0000ffff00, 0x01ffff0000ff00ff,
+    0x01ffff0000ff0100, 0x01ffff000000ffff, 0x01ffff000000ff01, 0x01ffff0000000000,
+    0x01ffff0000000001, 0x01ffff00000001ff, 0x01ffff0000000100, 0x01ffff00000100ff,
+    0x01ffff0000010001, 0x01ffff0000010100, 0x01ffff0001ff0000, 0x01ffff0001ff0100,
+    0x01ffff00010000ff, 0x01ffff0001000001, 0x01ffff0001000100, 0x01ffff0001010000,
+    0x01ffff01ffffffff, 0x01ffff01ffffff01, 0x01ffff01ffff01ff, 0x01ffff01ffff0101,
+    0x01ffff01ff000000, 0x01ffff01ff01ffff, 0x01ffff01ff01ff01, 0x01ffff01ff0101ff,
+    0x01ffff01ff010101, 0x01ffff010000ff00, 0x01ffff01000000ff, 0x01ffff0100000100,
+    0x01ffff0100010000, 0x01ffff0101ffffff, 0x01ffff0101ffff01, 0x01ffff0101ff01ff,
+    0x01ffff0101ff0101, 0x01ffff0101000000, 0x01ffff010101ffff, 0x01ffff010101ff01,
+    0x01ffff01010101ff, 0x01ffff0101010101, 0x01ff00ffff0000ff, 0x01ff00ffff000100,
+    0x01ff00ff00ffff00, 0x01ff00ff00ff00ff, 0x01ff00ff0000ff00, 0x01ff00ff00000000,
+    0x01ff00ff00000101, 0x01ff00ff0001ff00, 0x01ff00ff000100ff, 0x01ff00ff00010100,
+    0x01ff00ff010000ff, 0x01ff00ff01000100, 0x01ff0000ffffff00, 0x01ff0000ffff0100,
+    0x01ff0000ff00ff01, 0x01ff0000ff000000, 0x01ff0000ff000101, 0x01ff0000ff010001,
+    0x01ff0000ff010100, 0x01ff000000ffffff, 0x01ff000000ffff00, 0x01ff000000ff0000,
+    0x01ff000000ff01ff, 0x01ff00000000ff00, 0x01ff0000000000ff, 0x01ff000000000000,
+    0x01ff000000000001, 0x01ff000000000100, 0x01ff000000000101, 0x01ff000000010000,
+    0x01ff000000010001, 0x01ff0000000101ff, 0x01ff000000010101, 0x01ff000001ffff00,
+    0x01ff000001ff00ff, 0x01ff000001ff0001, 0x01ff000001ff0100, 0x01ff00000100ffff,
+    0x01ff00000100ff01, 0x01ff000001000000, 0x01ff0000010001ff, 0x01ff000001010001,
+    0x01ff0001ff00ff00, 0x01ff0001ff000001, 0x01ff0001ff000100, 0x01ff0001ff010000,
+    0x01ff000100ffff00, 0x01ff000100ff00ff, 0x01ff000100ff0100, 0x01ff000100ff0101,
+    0x01ff00010000ffff, 0x01ff000100000000, 0x01ff000100000100, 0x01ff000100000101,
+    0x01ff00010001ff00, 0x01ff000100010001, 0x01ff000100010101, 0x01ff000101ff0000,
+    0x01ff00010100ff00, 0x01ff000101000101, 0x01ff0001010100ff, 0x01ff01ffffffffff,
+    0x01ff01ffffffff01, 0x01ff01ffffff01ff, 0x01ff01ffffff0101, 0x01ff01ffff000000,
+    0x01ff01ffff01ffff, 0x01ff01ffff01ff01, 0x01ff01ffff0101ff, 0x01ff01ffff010101,
+    0x01ff01ff00ffff00, 0x01ff01ff00ff0000, 0x01ff01ff0000ff00, 0x01ff01ff000000ff,
+    0x01ff01ff00000100, 0x01ff01ff00010000, 0x01ff01ff00010100, 0x01ff01ff01ffffff,
+    0x01ff01ff01ffff01, 0x01ff01ff01ff01ff, 0x01ff01ff01ff0101, 0x01ff01ff01000000,
+    0x01ff01ff0101ffff, 0x01ff01ff0101ff01, 0x01ff01ff010101ff, 0x01ff01ff01010101,
+    0x01ff0100ffff0000, 0x01ff0100ffff0001, 0x01ff0100ff00ff00, 0x01ff0100ff0000ff,
+    0x01ff0100ff000001, 0x01ff0100ff010000, 0x01ff010000ffff00, 0x01ff010000ff00ff,
+    0x01ff010000ff0001, 0x01ff010000ff0100, 0x01ff01000000ffff, 0x01ff01000000ff01,
+    0x01ff010000000000, 0x01ff010000000101, 0x01ff01000001ff00, 0x01ff0100000100ff,
+    0x01ff010001ff0000, 0x01ff010001000001, 0x01ff010001000100, 0x01ff010001010000,
+    0x01ff0101ffffffff, 0x01ff0101ffffff01, 0x01ff0101ffff01ff, 0x01ff0101ffff0101,
+    0x01ff0101ff000000, 0x01ff0101ff01ffff, 0x01ff0101ff01ff01, 0x01ff0101ff0101ff,
+    0x01ff0101ff010101, 0x01ff010100ff0000, 0x01ff01010000ff00, 0x01ff0101000000ff,
+    0x01ff010100000001, 0x01ff010101ffffff, 0x01ff010101ffff01, 0x01ff010101ff01ff,
+    0x01ff010101ff0101, 0x01ff010101000000, 0x01ff01010101ffff, 0x01ff01010101ff01,
+    0x01ff0101010101ff, 0x01ff010101010101, 0x0100ffffffff0000, 0x0100ffffff00ff00,
+    0x0100ffffff000001, 0x0100ffffff0001ff, 0x0100ffffff000100, 0x0100ffffff010000,
+    0x0100ffff00ffff00, 0x0100ffff00ff0001, 0x0100ffff00ff0100, 0x0100ffff00000000,
+    0x0100ffff000001ff, 0x0100ffff00000101, 0x0100ffff00010100, 0x0100ffff00010101,
+    0x0100ffff01ff0000, 0x0100ffff0100ff00, 0x0100ffff010000ff, 0x0100ffff01000001,
+    0x0100ffff01000100, 0x0100ffff01010000, 0x0100ff00ffffff00, 0x0100ff00ffff00ff,
+    0x0100ff00ffff0001, 0x0100ff00ffff0100, 0x0100ff00ff00ffff, 0x0100ff00ff000000,
+    0x0100ff00ff0001ff, 0x0100ff00ff000101, 0x0100ff00ff01ff00, 0x0100ff00ff0100ff,
+    0x0100ff00ff010001, 0x0100ff00ff010100, 0x0100ff0000ffffff, 0x0100ff0000ff0000,
+    0x0100ff000000ffff, 0x0100ff000000ff00, 0x0100ff00000000ff, 0x0100ff0000000000,
+    0x0100ff0000000001, 0x0100ff0000000100, 0x0100ff000001ff01, 0x0100ff0000010000,
+    0x0100ff0001ff00ff, 0x0100ff0001ff0001, 0x0100ff000100ff01, 0x0100ff0001000000,
+    0x0100ff00010001ff, 0x0100ff000101ff00, 0x0100ff00010100ff, 0x0100ff0001010001,
+    0x0100ff0001010100, 0x0100ff01ffff0000, 0x0100ff01ff00ff00, 0x0100ff01ff0000ff,
+    0x0100ff01ff000100, 0x0100ff01ff010000, 0x0100ff0100ff00ff, 0x0100ff0100ff0001,
+    0x0100ff0100ff0100, 0x0100ff010000ffff, 0x0100ff010000ff01, 0x0100ff0100000000,
+    0x0100ff01000001ff, 0x0100ff0100010001, 0x0100ff0100010100, 0x0100ff0101ff0000,
+    0x0100ff01010000ff, 0x0100ff0101000001, 0x0100ff0101010100, 0x010000ffffffff00,
+    0x010000ffffff00ff, 0x010000ffffff0001, 0x010000ffff00ffff, 0x010000ffff000000,
+    0x010000ffff0001ff, 0x010000ffff010001, 0x010000ff00ffffff, 0x010000ff00ff0101,
+    0x010000ff0000ff00, 0x010000ff000000ff, 0x010000ff00000000, 0x010000ff00000001,
+    0x010000ff000001ff, 0x010000ff00000100, 0x010000ff0001ffff, 0x010000ff0001ff00,
+    0x010000ff0001ff01, 0x010000ff00010000, 0x010000ff01ff00ff, 0x010000ff01ff0001,
+    0x010000ff0100ff01, 0x010000ff010000ff, 0x010000ff01000000, 0x010000ff010001ff,
+    0x010000ff0101ff00, 0x010000ff01010100, 0x01000000ffffffff, 0x01000000ffff0000,
+    0x01000000ffff01ff, 0x01000000ffff0101, 0x01000000ff00ffff, 0x01000000ff00ff00,
+    0x01000000ff0000ff, 0x01000000ff000000, 0x01000000ff000001, 0x01000000ff000100,
+    0x01000000ff01ff00, 0x01000000ff010000, 0x01000000ff010100, 0x01000000ff010101,
+    0x0100000000ffff00, 0x0100000000ff00ff, 0x0100000000ff0000, 0x0100000000ff0001,
+    0x0100000000ff0100, 0x010000000000ffff, 0x010000000000ff00, 0x010000000000ff01,
+    0x01000000000000ff, 0x0100000000000000, 0x0100000000000001, 0x01000000000001ff,
+    0x0100000000000100, 0x0100000000000101, 0x010000000001ff00, 0x01000000000100ff,
+    0x0100000000010000, 0x0100000000010001, 0x0100000000010100, 0x0100000001ffff00,
+    0x0100000001ff0000, 0x0100000001ff01ff, 0x010000000100ff00, 0x010000000100ff01,
+    0x01000000010000ff, 0x0100000001000000, 0x0100000001000001, 0x0100000001000100,
+    0x0100000001000101, 0x010000000101ffff, 0x010000000101ff01, 0x0100000001010000,
+    0x01000000010101ff, 0x0100000001010101, 0x01000001ffffff00, 0x01000001ffff00ff,
+    0x01000001ff00ffff, 0x01000001ff000000, 0x01000001ff000100, 0x01000001ff01ffff,
+    0x01000001ff010001, 0x01000001ff010100, 0x0100000100ff0000, 0x0100000100ff01ff,
+    0x0100000100ff0100, 0x010000010000ff00, 0x010000010000ff01, 0x0100000100000000,
+    0x0100000100000001, 0x0100000100000100, 0x0100000100010000, 0x01000001000101ff,
+    0x0100000101ffff01, 0x0100000101ff00ff, 0x0100000101ff0100, 0x0100000101ff0101,
+    0x010000010100ff01, 0x01000001010000ff, 0x0100000101000000, 0x01000001010100ff,
+    0x0100000101010001, 0x0100000101010100, 0x010001ffffff0000, 0x010001ffff000001,
+    0x010001ffff000100, 0x010001ffff010000, 0x010001ff00ffff00, 0x010001ff00ff0001,
+    0x010001ff0000ffff, 0x010001ff0000ff01, 0x010001ff00000000, 0x010001ff00000001,
+    0x010001ff00000101, 0x010001ff000100ff, 0x010001ff00010000, 0x010001ff01ff0000,
+    0x010001ff0100ff00, 0x010001ff01000001, 0x010001ff01000100, 0x010001ff01010000,
+    0x01000100ffff00ff, 0x01000100ffff0001, 0x01000100ffff0100, 0x01000100ff00ffff,
+    0x01000100ff00ff01, 0x01000100ff000000, 0x01000100ff0001ff, 0x01000100ff000101,
+    0x01000100ff01ffff, 0x01000100ff01ff00, 0x01000100ff0100ff, 0x01000100ff010001,
+    0x0100010000ffffff, 0x0100010000ffff01, 0x0100010000ff0000, 0x0100010000ff01ff,
+    0x0100010000ff0101, 0x010001000000ff00, 0x01000100000000ff, 0x0100010000000000,
+    0x0100010000000001, 0x0100010000000100, 0x010001000001ff01, 0x0100010000010000,
+    0x0100010000010001, 0x0100010000010101, 0x0100010001ffff00, 0x0100010001ff00ff,
+    0x010001000100ffff, 0x010001000100ff01, 0x0100010001000000, 0x0100010001000101,
+    0x010001000101ff00, 0x0100010001010001, 0x01000101ffff0000, 0x01000101ff000000,
+    0x01000101ff010000, 0x0100010100ff00ff, 0x0100010100ff0001, 0x0100010100ff0100,
+    0x010001010000ffff, 0x0100010100000000, 0x01000101000001ff, 0x010001010001ff00,
+    0x0100010101ff0000, 0x010001010100ff00, 0x01000101010000ff, 0x0100010101000000,
+    0x0100010101000001, 0x0101ffffffffffff, 0x0101ffffffffff01, 0x0101ffffffff01ff,
+    0x0101ffffffff0101, 0x0101ffffff000000, 0x0101ffffff01ffff, 0x0101ffffff01ff01,
+    0x0101ffffff0101ff, 0x0101ffffff010101, 0x0101ffff00ff0000, 0x0101ffff0000ff00,
+    0x0101ffff000000ff, 0x0101ffff00000001, 0x0101ffff00000100, 0x0101ffff01ffffff,
+    0x0101ffff01ffff01, 0x0101ffff01ff01ff, 0x0101ffff01ff0101, 0x0101ffff01000000,
+    0x0101ffff0101ffff, 0x0101ffff0101ff01, 0x0101ffff010101ff, 0x0101ffff01010101,
+    0x0101ff00ffff0000, 0x0101ff00ffff0100, 0x0101ff00ff00ff00, 0x0101ff00ff0000ff,
+    0x0101ff00ff000001, 0x0101ff00ff000100, 0x0101ff00ff000101, 0x0101ff0000ff0001,
+    0x0101ff0000ff0100, 0x0101ff000000ff00, 0x0101ff0000000000, 0x0101ff00000001ff,
+    0x0101ff0000000101, 0x0101ff000001ff00, 0x0101ff00000100ff, 0x0101ff0001ff0000,
+    0x0101ff000100ffff, 0x0101ff000100ff01, 0x0101ff0001000001, 0x0101ff0001000100,
+    0x0101ff01ffffff01, 0x0101ff01ffff01ff, 0x0101ff01ffff0101, 0x0101ff01ff00ffff,
+    0x0101ff01ff000100, 0x0101ff01ff01ff01, 0x0101ff01ff0101ff, 0x0101ff01ff010101,
+    0x0101ff0100ff0000, 0x0101ff010000ff00, 0x0101ff0100000001, 0x0101ff0100000100,
+    0x0101ff0100010000, 0x0101ff0101ffffff, 0x0101ff0101ffff01, 0x0101ff0101ff01ff,
+    0x0101ff0101ff0101, 0x0101ff0101000000, 0x0101ff010101ffff, 0x0101ff010101ff01,
+    0x0101ff01010101ff, 0x0101ff0101010101, 0x010100ffff000100, 0x010100ffff010000,
+    0x010100ff00ffff00, 0x010100ff00ff00ff, 0x010100ff0000ffff, 0x010100ff000000ff,
+    0x010100ff00000000, 0x010100ff000001ff, 0x010100ff00000101, 0x010100ff0001ff00,
+    0x010100ff00010000, 0x010100ff00010001, 0x010100ff000101ff, 0x010100ff00010100,
+    0x010100ff01ff0000, 0x01010000ffff0001, 0x01010000ffff0100, 0x01010000ff00ffff,
+    0x01010000ff00ff01, 0x01010000ff000000, 0x01010000ff0001ff, 0x01010000ff010001,
+    0x01010000ff010100, 0x0101000000ffff01, 0x0101000000ff0000, 0x010100000000ff00,
+    0x01010000000000ff, 0x0101000000000000, 0x0101000000000001, 0x0101000000000100,
+    0x0101000000010000, 0x0101000000010101, 0x0101000001ffff00, 0x0101000001ff00ff,
+    0x0101000001ff0000, 0x0101000001ff0001, 0x0101000001ff0100, 0x010100000100ff01,
+    0x0101000001000000, 0x01010000010001ff, 0x01010001ffff0000, 0x01010001ff00ff00,
+    0x01010001ff000001, 0x01010001ff000101, 0x01010001ff01ff00, 0x01010001ff010000,
+    0x0101000100ff00ff, 0x0101000100ff0001, 0x0101000100ff0101, 0x010100010000ff01,
+    0x0101000100000000, 0x0101000100000001, 0x01010001000001ff, 0x010100010001ffff,
+    0x010100010001ff01, 0x0101000101ff0001, 0x010100010100ffff, 0x0101000101000000,
+    0x0101000101000001, 0x0101000101000100, 0x010100010101ff00, 0x01010001010100ff,
+    0x0101000101010001, 0x010101ffffffffff, 0x010101ffffffff01, 0x010101ffffff01ff,
+    0x010101ffffff0101, 0x010101ffff01ffff, 0x010101ffff01ff01, 0x010101ffff0101ff,
+    0x010101ffff010101, 0x010101ff0000ff00, 0x010101ff000000ff, 0x010101ff00000001,
+    0x010101ff00000100, 0x010101ff01ffffff, 0x010101ff01ffff01, 0x010101ff01ff01ff,
+    0x010101ff01ff0101, 0x010101ff01000000, 0x010101ff0101ffff, 0x010101ff0101ff01,
+    0x010101ff010101ff, 0x010101ff01010101, 0x01010100ffff0000, 0x01010100ff0000ff,
+    0x01010100ff000100, 0x01010100ff01ff00, 0x01010100ff010000, 0x0101010000ffff00,
+    0x010101000000ffff, 0x0101010000000000, 0x0101010000000101, 0x010101000001ff00,
+    0x0101010000010001, 0x0101010000010100, 0x010101000100ffff, 0x0101010001000001,
+    0x01010101ffffffff, 0x01010101ffffff01, 0x01010101ffff01ff, 0x01010101ffff0101,
+    0x01010101ff01ffff, 0x01010101ff01ff01, 0x01010101ff0101ff, 0x01010101ff010101,
+    0x010101010000ff00, 0x01010101000000ff, 0x0101010100000001, 0x0101010101ffffff,
+    0x0101010101ffff01, 0x0101010101ff01ff, 0x0101010101ff0101, 0x0101010101000000,
+    0x010101010101ffff, 0x010101010101ff01, 0x01010101010101ff, 0x0101010101010101,
+GGML_TABLE_END()
+#else
+static dpct::global_memory<const uint32_t, 1> iq1s_grid_gpu(
+    sycl::range(NGRID_IQ1S),
+    {0x00000000, 0x00000002, 0x00000101, 0x00000200, 0x00000202, 0x00010001,
+     0x00010101, 0x00020000, 0x00020002, 0x00020200, 0x00020202, 0x01000101,
+     0x01010001, 0x01010100, 0x01010102, 0x01020101, 0x02000000, 0x02000002,
+     0x02000200, 0x02000202, 0x02010101, 0x02020000, 0x02020002, 0x02020200,
+     0x02020202, 0x00000110, 0x00000111, 0x00010011, 0x00010110, 0x00010112,
+     0x00010211, 0x00010212, 0x00020111, 0x01000011, 0x01000112, 0x01000211,
+     0x01010012, 0x01010111, 0x01010212, 0x01020011, 0x01020110, 0x01020112,
+     0x01020210, 0x02000111, 0x02010011, 0x02010110, 0x02010112, 0x02020111,
+     0x00000020, 0x00000022, 0x00000220, 0x00000222, 0x00010121, 0x00020020,
+     0x00020022, 0x00020220, 0x00020222, 0x01000121, 0x01010021, 0x01010221,
+     0x01020120, 0x01020221, 0x02000020, 0x02000022, 0x02000220, 0x02000222,
+     0x02010021, 0x02010121, 0x02010221, 0x02020020, 0x02020022, 0x02020220,
+     0x02020222, 0x00011001, 0x00011100, 0x00011102, 0x00021101, 0x01001001,
+     0x01001201, 0x01011101, 0x01011202, 0x01021100, 0x01021101, 0x02011001,
+     0x02011201, 0x02021101, 0x00001011, 0x00001110, 0x00001111, 0x00001112,
+     0x00011111, 0x00011210, 0x00011212, 0x00021211, 0x01001010, 0x01001111,
+     0x01001212, 0x01011010, 0x01011011, 0x01011110, 0x01011111, 0x01011112,
+     0x01011211, 0x01021010, 0x01021012, 0x01021111, 0x01021210, 0x01021212,
+     0x02001011, 0x02011011, 0x02011111, 0x02011210, 0x02011212, 0x02021011,
+     0x02021110, 0x02021111, 0x02021112, 0x02021211, 0x00011120, 0x00011221,
+     0x01001021, 0x01001120, 0x01011020, 0x01011022, 0x01011121, 0x01011220,
+     0x01021020, 0x01021021, 0x01021122, 0x01021221, 0x02001121, 0x02011021,
+     0x02011120, 0x02011221, 0x00002000, 0x00002002, 0x00002200, 0x00002202,
+     0x00012101, 0x00022000, 0x00022002, 0x00022200, 0x00022202, 0x01002101,
+     0x01012001, 0x01012102, 0x01022101, 0x02002000, 0x02002002, 0x02002200,
+     0x02002202, 0x02012101, 0x02022000, 0x02022002, 0x02022200, 0x02022202,
+     0x00002111, 0x00012011, 0x00012110, 0x00012211, 0x00022110, 0x00022111,
+     0x01002011, 0x01012010, 0x01012011, 0x01012111, 0x01022011, 0x01022110,
+     0x01022211, 0x02012011, 0x02012110, 0x02012112, 0x02012211, 0x02022111,
+     0x00002020, 0x00002022, 0x00002220, 0x00002222, 0x00012121, 0x00022020,
+     0x00022022, 0x00022220, 0x00022222, 0x01002121, 0x01012021, 0x01012221,
+     0x01022021, 0x01022121, 0x02002020, 0x02002022, 0x02002121, 0x02002220,
+     0x02002222, 0x02012121, 0x02022020, 0x02022022, 0x02022220, 0x02022222,
+     0x00110000, 0x00110001, 0x00110100, 0x00110201, 0x00120100, 0x00120101,
+     0x01100001, 0x01100100, 0x01110000, 0x01110101, 0x01110200, 0x01120001,
+     0x01120100, 0x01120101, 0x01120201, 0x02110001, 0x02110100, 0x02110102,
+     0x02120001, 0x02120101, 0x00100011, 0x00100110, 0x00100112, 0x00100211,
+     0x00110010, 0x00110012, 0x00110111, 0x00110210, 0x00120011, 0x00120110,
+     0x00120211, 0x01100111, 0x01100212, 0x01110010, 0x01110011, 0x01110012,
+     0x01110110, 0x01110111, 0x01110112, 0x01110211, 0x01120010, 0x01120111,
+     0x02100110, 0x02110012, 0x02110111, 0x02120011, 0x02120110, 0x00110021,
+     0x00110120, 0x00110122, 0x00120121, 0x01100020, 0x01100122, 0x01100221,
+     0x01110022, 0x01110121, 0x01110220, 0x01110222, 0x01120120, 0x01120122,
+     0x02100121, 0x02110021, 0x02110120, 0x02110122, 0x02120121, 0x00101001,
+     0x00101102, 0x00101201, 0x00111100, 0x00111101, 0x00111200, 0x00111201,
+     0x00121001, 0x00121102, 0x01101001, 0x01101101, 0x01101102, 0x01101200,
+     0x01101202, 0x01111001, 0x01111100, 0x01111101, 0x01111102, 0x01111201,
+     0x01121002, 0x01121101, 0x01121200, 0x02101100, 0x02101201, 0x02111000,
+     0x02111100, 0x02111101, 0x02111200, 0x02111201, 0x02111202, 0x02121001,
+     0x02121100, 0x02121101, 0x02121201, 0x00101012, 0x00101111, 0x00101212,
+     0x00111011, 0x00111110, 0x00111111, 0x00111112, 0x00111211, 0x00121010,
+     0x00121012, 0x00121111, 0x00121210, 0x00121212, 0x01101011, 0x01101110,
+     0x01101111, 0x01101112, 0x01111011, 0x01111012, 0x01111110, 0x01111111,
+     0x01111112, 0x01111211, 0x01111212, 0x01121011, 0x01121110, 0x01121111,
+     0x01121112, 0x01121211, 0x02101010, 0x02101012, 0x02101110, 0x02101111,
+     0x02101210, 0x02101212, 0x02111010, 0x02111011, 0x02111110, 0x02111111,
+     0x02111112, 0x02111211, 0x02111212, 0x02121010, 0x02121012, 0x02121111,
+     0x00101021, 0x00101120, 0x00101121, 0x00101122, 0x00111121, 0x00111122,
+     0x00111220, 0x00111222, 0x00121021, 0x00121122, 0x01101020, 0x01101022,
+     0x01101120, 0x01101121, 0x01101220, 0x01101222, 0x01111021, 0x01111121,
+     0x01111122, 0x01111220, 0x01111221, 0x01121021, 0x01121120, 0x01121121,
+     0x01121220, 0x01121221, 0x01121222, 0x02101122, 0x02101222, 0x02111022,
+     0x02111121, 0x02121120, 0x02121221, 0x00112001, 0x00112102, 0x00122101,
+     0x01102001, 0x01102100, 0x01102102, 0x01102201, 0x01112000, 0x01112101,
+     0x01112200, 0x01112202, 0x01122000, 0x01122001, 0x01122100, 0x01122102,
+     0x01122201, 0x02102101, 0x02112001, 0x02112100, 0x02122101, 0x00112010,
+     0x00112012, 0x00112111, 0x00112212, 0x00122011, 0x00122111, 0x01102012,
+     0x01102110, 0x01102111, 0x01102210, 0x01112011, 0x01112110, 0x01112111,
+     0x01112112, 0x01112211, 0x01112212, 0x01122010, 0x01122111, 0x01122212,
+     0x02102211, 0x02112011, 0x02112012, 0x02112111, 0x02112210, 0x02122011,
+     0x02122112, 0x02122211, 0x00102221, 0x00112122, 0x00122120, 0x00122122,
+     0x01102120, 0x01102122, 0x01102221, 0x01112020, 0x01112022, 0x01112121,
+     0x01112220, 0x01122021, 0x01122122, 0x01122221, 0x02102121, 0x02112021,
+     0x02112122, 0x02112222, 0x00200000, 0x00200002, 0x00200200, 0x00200202,
+     0x00210101, 0x00220000, 0x00220002, 0x00220101, 0x00220200, 0x00220202,
+     0x01200101, 0x01210001, 0x01210201, 0x01220001, 0x01220101, 0x02200000,
+     0x02200002, 0x02200200, 0x02200202, 0x02210101, 0x02220000, 0x02220002,
+     0x02220101, 0x02220200, 0x02220202, 0x00200111, 0x00210011, 0x00210110,
+     0x00210211, 0x00220111, 0x01200012, 0x01200110, 0x01200211, 0x01210111,
+     0x01210210, 0x01210212, 0x01220011, 0x01220110, 0x01220111, 0x01220112,
+     0x02200111, 0x02210010, 0x02210112, 0x02210211, 0x02220111, 0x00200021,
+     0x00200220, 0x00200222, 0x00210021, 0x00210121, 0x00220020, 0x00220022,
+     0x00220220, 0x00220222, 0x01200121, 0x01210021, 0x01210122, 0x01210221,
+     0x01220121, 0x02200021, 0x02200220, 0x02200222, 0x02210021, 0x02210121,
+     0x02220020, 0x02220022, 0x02220220, 0x02220222, 0x00201101, 0x00211100,
+     0x00211102, 0x00211201, 0x00221101, 0x01201100, 0x01201101, 0x01201102,
+     0x01201201, 0x01211002, 0x01211101, 0x01211200, 0x01211202, 0x01221102,
+     0x02201101, 0x02211001, 0x02211100, 0x02211201, 0x02221001, 0x02221101,
+     0x00201211, 0x00211111, 0x00221011, 0x00221211, 0x01201010, 0x01201111,
+     0x01201210, 0x01211011, 0x01211110, 0x01211111, 0x01211211, 0x01221012,
+     0x01221111, 0x01221210, 0x02201211, 0x02211010, 0x02211110, 0x02211111,
+     0x02211210, 0x02211212, 0x02221011, 0x02221110, 0x02221112, 0x02221211,
+     0x00201121, 0x00211020, 0x00211022, 0x00211221, 0x00221121, 0x01201021,
+     0x01201221, 0x01211121, 0x01221020, 0x01221021, 0x01221221, 0x02201120,
+     0x02201122, 0x02211020, 0x02211222, 0x00202000, 0x00202002, 0x00202200,
+     0x00202202, 0x00212101, 0x00222000, 0x00222002, 0x00222200, 0x00222202,
+     0x01202101, 0x01212001, 0x01212100, 0x01222101, 0x02202000, 0x02202002,
+     0x02202200, 0x02202202, 0x02222000, 0x02222002, 0x02222200, 0x02222202,
+     0x00202211, 0x00212011, 0x00212110, 0x00212211, 0x00222111, 0x01202112,
+     0x01202211, 0x01212012, 0x01212111, 0x01222011, 0x01222110, 0x01222112,
+     0x01222211, 0x02202111, 0x02212010, 0x02212112, 0x02212211, 0x02222110,
+     0x02222111, 0x00202020, 0x00202022, 0x00202220, 0x00202222, 0x00222020,
+     0x00222022, 0x00222220, 0x00222222, 0x01202121, 0x01212021, 0x01212122,
+     0x01212221, 0x01222121, 0x02202020, 0x02202022, 0x02202220, 0x02202222,
+     0x02212121, 0x02222020, 0x02222022, 0x02222220, 0x02222222, 0x10000101,
+     0x10010001, 0x10010102, 0x10020101, 0x11000201, 0x11010002, 0x11010101,
+     0x11010200, 0x11010202, 0x11020001, 0x11020100, 0x11020102, 0x12010100,
+     0x12010201, 0x12020001, 0x12020102, 0x10000010, 0x10000011, 0x10000110,
+     0x10000112, 0x10000211, 0x10010012, 0x10010111, 0x10010112, 0x10010210,
+     0x10010212, 0x10020011, 0x10020112, 0x10020211, 0x11000111, 0x11000210,
+     0x11000212, 0x11010011, 0x11010110, 0x11010111, 0x11010112, 0x11010211,
+     0x11010212, 0x11020111, 0x11020210, 0x11020212, 0x12000011, 0x12000110,
+     0x12000112, 0x12010010, 0x12010012, 0x12010111, 0x12020010, 0x12020011,
+     0x12020012, 0x10000121, 0x10010021, 0x10010120, 0x10010122, 0x10020121,
+     0x11000021, 0x11010022, 0x11010121, 0x11010222, 0x11020120, 0x11020221,
+     0x12000221, 0x12010120, 0x12020121, 0x10001001, 0x10011101, 0x10011201,
+     0x10021201, 0x11001101, 0x11001200, 0x11001202, 0x11011001, 0x11011100,
+     0x11011101, 0x11011102, 0x11021001, 0x11021002, 0x11021101, 0x11021200,
+     0x11021202, 0x12001001, 0x12001102, 0x12001201, 0x12011000, 0x12011002,
+     0x12011101, 0x12021000, 0x12021001, 0x12021201, 0x10001011, 0x10001012,
+     0x10001111, 0x10001212, 0x10011011, 0x10011110, 0x10011111, 0x10011112,
+     0x10011211, 0x10021010, 0x10021111, 0x10021212, 0x11001011, 0x11001110,
+     0x11001111, 0x11001112, 0x11001211, 0x11011010, 0x11011011, 0x11011110,
+     0x11011111, 0x11011112, 0x11011210, 0x11011211, 0x11021011, 0x11021110,
+     0x11021111, 0x11021112, 0x11021211, 0x12001012, 0x12001110, 0x12001111,
+     0x12001210, 0x12011011, 0x12011110, 0x12011111, 0x12011112, 0x12011211,
+     0x12011212, 0x12021111, 0x12021210, 0x12021212, 0x10001021, 0x10001121,
+     0x10001221, 0x10011120, 0x10011121, 0x10011220, 0x10011222, 0x10021021,
+     0x10021120, 0x10021221, 0x11001020, 0x11001022, 0x11001121, 0x11001220,
+     0x11011020, 0x11011021, 0x11011022, 0x11011121, 0x11011122, 0x11011221,
+     0x11021022, 0x11021121, 0x11021220, 0x12001021, 0x12001121, 0x12001222,
+     0x12011120, 0x12011121, 0x12021021, 0x12021120, 0x12021122, 0x10002101,
+     0x10012001, 0x10012101, 0x10012202, 0x10022101, 0x11002002, 0x11002201,
+     0x11012000, 0x11012101, 0x11012200, 0x11022001, 0x11022100, 0x11022102,
+     0x11022201, 0x12002101, 0x12012001, 0x12012100, 0x12012102, 0x12012201,
+     0x12022101, 0x10002011, 0x10002111, 0x10002112, 0x10002212, 0x10012010,
+     0x10012110, 0x10012111, 0x10012210, 0x10022011, 0x10022110, 0x10022112,
+     0x11002010, 0x11002111, 0x11002212, 0x11012011, 0x11012012, 0x11012110,
+     0x11012111, 0x11012112, 0x11012211, 0x11022010, 0x11022012, 0x11022111,
+     0x11022112, 0x11022212, 0x12002112, 0x12002211, 0x12012012, 0x12012111,
+     0x12012112, 0x12012210, 0x12022011, 0x12022110, 0x12022112, 0x12022211,
+     0x10012122, 0x11002120, 0x11002122, 0x11002221, 0x11012121, 0x11012220,
+     0x11012222, 0x11022120, 0x11022221, 0x12012120, 0x12022121, 0x10100001,
+     0x10100100, 0x10100101, 0x10100102, 0x10100201, 0x10110002, 0x10110101,
+     0x10110202, 0x10120001, 0x10120100, 0x10120201, 0x11100000, 0x11100101,
+     0x11100200, 0x11110001, 0x11110100, 0x11110101, 0x11110102, 0x11110201,
+     0x11120101, 0x11120200, 0x12100102, 0x12100201, 0x12110101, 0x12110200,
+     0x12120000, 0x12120001, 0x12120102, 0x12120201, 0x10100111, 0x10100210,
+     0x10100211, 0x10100212, 0x10110011, 0x10110110, 0x10110111, 0x10110112,
+     0x10110210, 0x10110211, 0x10120010, 0x10120111, 0x10120112, 0x10120210,
+     0x10120212, 0x11100011, 0x11100110, 0x11100111, 0x11100112, 0x11100211,
+     0x11110010, 0x11110011, 0x11110012, 0x11110110, 0x11110111, 0x11110112,
+     0x11110210, 0x11110211, 0x11110212, 0x11120011, 0x11120110, 0x11120111,
+     0x11120112, 0x11120211, 0x12100012, 0x12100111, 0x12110011, 0x12110110,
+     0x12110111, 0x12110112, 0x12110211, 0x12120010, 0x12120111, 0x12120212,
+     0x10100021, 0x10100122, 0x10110022, 0x10110121, 0x10110222, 0x10120021,
+     0x10120120, 0x11100022, 0x11100121, 0x11100222, 0x11110021, 0x11110120,
+     0x11110121, 0x11110122, 0x11110221, 0x11120022, 0x11120121, 0x12100121,
+     0x12110020, 0x12110022, 0x12110121, 0x12110221, 0x12110222, 0x12120120,
+     0x10101100, 0x10101101, 0x10111001, 0x10111100, 0x10111101, 0x10111102,
+     0x10111200, 0x10111201, 0x10121001, 0x10121101, 0x10121200, 0x10121202,
+     0x11101001, 0x11101100, 0x11101101, 0x11101102, 0x11101201, 0x11101202,
+     0x11111000, 0x11111001, 0x11111100, 0x11111101, 0x11111102, 0x11111200,
+     0x11111201, 0x11111202, 0x11121001, 0x11121002, 0x11121100, 0x11121101,
+     0x11121102, 0x11121201, 0x12101000, 0x12101200, 0x12101202, 0x12111001,
+     0x12111100, 0x12111101, 0x12111102, 0x12111201, 0x12121001, 0x12121100,
+     0x12121101, 0x12121202, 0x10101011, 0x10101012, 0x10101110, 0x10101111,
+     0x10101112, 0x10101211, 0x10111010, 0x10111011, 0x10111012, 0x10111110,
+     0x10111111, 0x10111112, 0x10111211, 0x10111212, 0x10121011, 0x10121110,
+     0x10121111, 0x10121112, 0x10121211, 0x11101010, 0x11101011, 0x11101012,
+     0x11101110, 0x11101111, 0x11101112, 0x11101210, 0x11101211, 0x11111010,
+     0x11111011, 0x11111012, 0x11111110, 0x11111111, 0x11111112, 0x11111210,
+     0x11111211, 0x11111212, 0x11121010, 0x11121011, 0x11121110, 0x11121111,
+     0x11121112, 0x11121210, 0x11121211, 0x11121212, 0x12101011, 0x12101110,
+     0x12101111, 0x12101211, 0x12101212, 0x12111010, 0x12111011, 0x12111110,
+     0x12111111, 0x12111112, 0x12111210, 0x12111211, 0x12121011, 0x12121110,
+     0x12121111, 0x12121112, 0x12121211, 0x10101020, 0x10101021, 0x10101022,
+     0x10101120, 0x10101122, 0x10101220, 0x10101221, 0x10111021, 0x10111120,
+     0x10111121, 0x10111220, 0x10111221, 0x10121020, 0x10121021, 0x10121022,
+     0x10121120, 0x10121121, 0x10121122, 0x10121220, 0x10121221, 0x11101021,
+     0x11101121, 0x11101122, 0x11101220, 0x11101221, 0x11101222, 0x11111020,
+     0x11111021, 0x11111022, 0x11111120, 0x11111121, 0x11111122, 0x11111220,
+     0x11111221, 0x11111222, 0x11121021, 0x11121120, 0x11121121, 0x11121221,
+     0x12101022, 0x12101121, 0x12101122, 0x12101220, 0x12101221, 0x12101222,
+     0x12111021, 0x12111121, 0x12111222, 0x12121022, 0x12121121, 0x12121122,
+     0x12121220, 0x12121221, 0x10102100, 0x10102101, 0x10102102, 0x10102201,
+     0x10112000, 0x10112101, 0x10112200, 0x10122001, 0x10122202, 0x11102101,
+     0x11102200, 0x11102202, 0x11112001, 0x11112100, 0x11112101, 0x11112102,
+     0x11112200, 0x11112201, 0x11122000, 0x11122002, 0x11122100, 0x11122101,
+     0x12102002, 0x12102201, 0x12112000, 0x12112002, 0x12112101, 0x12112200,
+     0x12122001, 0x12122201, 0x10102011, 0x10102012, 0x10102111, 0x10102212,
+     0x10112011, 0x10112110, 0x10112111, 0x10112112, 0x10112211, 0x10122111,
+     0x11102011, 0x11102110, 0x11102111, 0x11102112, 0x11102211, 0x11112010,
+     0x11112011, 0x11112012, 0x11112110, 0x11112111, 0x11112112, 0x11112210,
+     0x11112211, 0x11112212, 0x11122011, 0x11122110, 0x11122111, 0x11122112,
+     0x11122211, 0x12102011, 0x12102111, 0x12102211, 0x12112011, 0x12112110,
+     0x12112111, 0x12112112, 0x12112210, 0x12112211, 0x12122111, 0x10102120,
+     0x10102220, 0x10112121, 0x10112222, 0x10122020, 0x10122121, 0x10122122,
+     0x10122221, 0x11102121, 0x11102220, 0x11102221, 0x11112021, 0x11112121,
+     0x11112122, 0x11112220, 0x11112221, 0x11122022, 0x11122121, 0x11122220,
+     0x11122222, 0x12102021, 0x12102222, 0x12112022, 0x12112121, 0x12112122,
+     0x12112220, 0x12112222, 0x12122021, 0x10200101, 0x10210100, 0x10210102,
+     0x10210201, 0x10220101, 0x11200100, 0x11210000, 0x11210101, 0x11210102,
+     0x11210200, 0x11210202, 0x11220001, 0x11220100, 0x11220102, 0x11220201,
+     0x12200001, 0x12210102, 0x12220101, 0x10200011, 0x10200110, 0x10200112,
+     0x10200211, 0x10210012, 0x10210111, 0x10220011, 0x10220012, 0x10220112,
+     0x10220211, 0x11200111, 0x11200211, 0x11210011, 0x11210111, 0x11210112,
+     0x11210211, 0x11220111, 0x11220112, 0x11220212, 0x12200110, 0x12200212,
+     0x12210012, 0x12210111, 0x12220011, 0x12220112, 0x12220211, 0x10210021,
+     0x10210122, 0x10210221, 0x11200020, 0x11200021, 0x11200122, 0x11210121,
+     0x11210122, 0x11210220, 0x11220020, 0x12200121, 0x12210021, 0x12210122,
+     0x12220121, 0x10211001, 0x10211002, 0x10211101, 0x10211102, 0x10211202,
+     0x10221001, 0x10221102, 0x10221201, 0x11201000, 0x11201002, 0x11201101,
+     0x11201200, 0x11201202, 0x11211001, 0x11211100, 0x11211101, 0x11211102,
+     0x11211201, 0x11211202, 0x11221000, 0x11221002, 0x11221101, 0x12201100,
+     0x12201101, 0x12201201, 0x12211000, 0x12211002, 0x12211100, 0x12211101,
+     0x12211102, 0x12211200, 0x12211202, 0x12221001, 0x12221100, 0x12221201,
+     0x10201111, 0x10201210, 0x10201212, 0x10211011, 0x10211111, 0x10211112,
+     0x10211211, 0x11201110, 0x11201111, 0x11201112, 0x11201211, 0x11211010,
+     0x11211011, 0x11211110, 0x11211111, 0x11211112, 0x11211211, 0x11221011,
+     0x11221110, 0x11221111, 0x11221112, 0x11221211, 0x12201112, 0x12201211,
+     0x12201212, 0x12211011, 0x12211111, 0x12211112, 0x12211211, 0x12211212,
+     0x12221012, 0x12221111, 0x12221112, 0x12221210, 0x10201022, 0x10201221,
+     0x10211121, 0x10221020, 0x10221122, 0x10221220, 0x10221221, 0x11201020,
+     0x11201121, 0x11201220, 0x11201222, 0x11211021, 0x11211120, 0x11211121,
+     0x11211122, 0x11211220, 0x11211222, 0x11221020, 0x11221121, 0x11221220,
+     0x12201020, 0x12201022, 0x12201121, 0x12201222, 0x12211120, 0x12211122,
+     0x12211220, 0x12211221, 0x12221020, 0x12221120, 0x12221122, 0x12221222,
+     0x10212102, 0x10212201, 0x10222101, 0x11202001, 0x11212002, 0x11212101,
+     0x11212202, 0x11222001, 0x11222201, 0x12202101, 0x12212001, 0x12212200,
+     0x12222102, 0x10202011, 0x10202110, 0x10212010, 0x10212111, 0x10222011,
+     0x10222110, 0x10222112, 0x10222211, 0x11202010, 0x11202011, 0x11202111,
+     0x11202112, 0x11202210, 0x11212011, 0x11212110, 0x11212111, 0x11212112,
+     0x11212211, 0x11222010, 0x11222111, 0x11222212, 0x12202012, 0x12202110,
+     0x12202212, 0x12212111, 0x12222011, 0x12222110, 0x12222111, 0x12222211,
+     0x10212021, 0x10212122, 0x10212220, 0x11202021, 0x11202120, 0x11202221,
+     0x11212020, 0x11212121, 0x11212220, 0x11212222, 0x11222120, 0x11222121,
+     0x11222221, 0x12202122, 0x12212120, 0x12212220, 0x12212222, 0x12222122,
+     0x20000000, 0x20000002, 0x20000200, 0x20000202, 0x20020000, 0x20020002,
+     0x20020200, 0x20020202, 0x21000101, 0x21010000, 0x21010001, 0x21010100,
+     0x21010102, 0x21010201, 0x21020101, 0x22000000, 0x22000002, 0x22000200,
+     0x22000202, 0x22010101, 0x22020000, 0x22020002, 0x22020200, 0x22020202,
+     0x20000111, 0x20010011, 0x20010110, 0x20010112, 0x20010211, 0x20020111,
+     0x21000011, 0x21000110, 0x21000211, 0x21010010, 0x21010012, 0x21010111,
+     0x21010112, 0x21010210, 0x21010211, 0x21020110, 0x21020112, 0x21020211,
+     0x22000111, 0x22000211, 0x22010110, 0x22010112, 0x22010211, 0x22020111,
+     0x20000020, 0x20000022, 0x20000220, 0x20000222, 0x20010121, 0x20020020,
+     0x20020022, 0x20020220, 0x20020222, 0x21010021, 0x21010120, 0x21010221,
+     0x21020121, 0x22000020, 0x22000022, 0x22000220, 0x22000222, 0x22010121,
+     0x22020020, 0x22020022, 0x22020220, 0x22020222, 0x20011100, 0x20011201,
+     0x21001001, 0x21001100, 0x21011001, 0x21011101, 0x21011202, 0x21021001,
+     0x21021100, 0x21021201, 0x22011100, 0x22011201, 0x20001011, 0x20001211,
+     0x20011012, 0x20011111, 0x20011212, 0x20021112, 0x20021211, 0x21001010,
+     0x21001011, 0x21001111, 0x21001210, 0x21011011, 0x21011110, 0x21011111,
+     0x21011112, 0x21011211, 0x21011212, 0x21021111, 0x21021112, 0x21021210,
+     0x21021212, 0x22001011, 0x22001110, 0x22001112, 0x22001211, 0x22011010,
+     0x22011012, 0x22011111, 0x22011210, 0x22021112, 0x20011021, 0x20011122,
+     0x20011221, 0x20021121, 0x21001021, 0x21001120, 0x21001221, 0x21001222,
+     0x21011020, 0x21011121, 0x21011221, 0x21011222, 0x21021021, 0x21021122,
+     0x21021222, 0x22001121, 0x22011021, 0x22011222, 0x22021120, 0x20002000,
+     0x20002002, 0x20002200, 0x20002202, 0x20012101, 0x20022000, 0x20022002,
+     0x20022200, 0x20022202, 0x21002001, 0x21002101, 0x21012001, 0x21012100,
+     0x21012201, 0x21022101, 0x21022201, 0x22002000, 0x22002002, 0x22002200,
+     0x22002202, 0x22012101, 0x22022000, 0x22022002, 0x22022200, 0x22022202,
+     0x20002111, 0x20002112, 0x20012011, 0x20012110, 0x20012112, 0x20022111,
+     0x21002011, 0x21002110, 0x21002112, 0x21002211, 0x21012010, 0x21012012,
+     0x21012111, 0x21012212, 0x21022011, 0x21022110, 0x22002111, 0x22012112,
+     0x22012211, 0x22022111, 0x20002020, 0x20002022, 0x20002220, 0x20002222,
+     0x20012121, 0x20022020, 0x20022022, 0x20022220, 0x20022222, 0x21002121,
+     0x21012021, 0x21012120, 0x21012122, 0x22002020, 0x22002022, 0x22002220,
+     0x22002222, 0x22012121, 0x22022020, 0x22022022, 0x22022220, 0x22022222,
+     0x20100101, 0x20110001, 0x20110102, 0x20110200, 0x20110201, 0x20120101,
+     0x21100001, 0x21100102, 0x21100201, 0x21110101, 0x21110200, 0x21110202,
+     0x21120201, 0x21120202, 0x22100101, 0x22110001, 0x22110100, 0x22110102,
+     0x22110201, 0x22120101, 0x20100011, 0x20100110, 0x20100112, 0x20100211,
+     0x20110010, 0x20110111, 0x20110210, 0x20110212, 0x20120011, 0x20120110,
+     0x20120112, 0x20120211, 0x21100010, 0x21100111, 0x21110010, 0x21110011,
+     0x21110110, 0x21110111, 0x21110112, 0x21110211, 0x21120012, 0x21120111,
+     0x22100110, 0x22100112, 0x22110012, 0x22110111, 0x22110210, 0x22120011,
+     0x22120110, 0x22120112, 0x22120211, 0x20100121, 0x20110021, 0x20110120,
+     0x20110221, 0x20120121, 0x21100120, 0x21100122, 0x21100221, 0x21110020,
+     0x21110022, 0x21110121, 0x21110220, 0x21120122, 0x21120221, 0x22100121,
+     0x22110120, 0x22110122, 0x22120221, 0x20101001, 0x20101100, 0x20101102,
+     0x20111000, 0x20111101, 0x20111200, 0x20121102, 0x21101000, 0x21101202,
+     0x21111001, 0x21111100, 0x21111101, 0x21111102, 0x21111200, 0x21111201,
+     0x21121000, 0x21121001, 0x21121002, 0x21121101, 0x22101100, 0x22101102,
+     0x22111002, 0x22111100, 0x22111101, 0x22111200, 0x22121001, 0x22121201,
+     0x20101010, 0x20101111, 0x20101210, 0x20101212, 0x20111010, 0x20111011,
+     0x20111110, 0x20111111, 0x20111112, 0x20111211, 0x20121011, 0x20121111,
+     0x20121211, 0x20121212, 0x21101011, 0x21101110, 0x21101111, 0x21101112,
+     0x21101211, 0x21111010, 0x21111011, 0x21111012, 0x21111110, 0x21111111,
+     0x21111112, 0x21111210, 0x21111211, 0x21111212, 0x21121011, 0x21121110,
+     0x21121111, 0x21121112, 0x21121211, 0x22101011, 0x22101111, 0x22101210,
+     0x22111011, 0x22111012, 0x22111110, 0x22111111, 0x22111112, 0x22111211,
+     0x22111212, 0x22121010, 0x22121012, 0x22121111, 0x22121210, 0x22121212,
+     0x20101021, 0x20101120, 0x20111020, 0x20111121, 0x20111221, 0x20121020,
+     0x20121122, 0x20121221, 0x21101121, 0x21101220, 0x21101221, 0x21111021,
+     0x21111022, 0x21111121, 0x21111122, 0x21111221, 0x21121121, 0x21121220,
+     0x22101022, 0x22101120, 0x22101221, 0x22101222, 0x22111022, 0x22111120,
+     0x22111121, 0x22121120, 0x22121122, 0x22121221, 0x20102101, 0x20112102,
+     0x20112201, 0x20122101, 0x21102001, 0x21102102, 0x21112000, 0x21112002,
+     0x21112101, 0x21112102, 0x21112202, 0x21122100, 0x21122101, 0x22102101,
+     0x22112001, 0x22112102, 0x22112201, 0x22122101, 0x20102110, 0x20102112,
+     0x20102211, 0x20112010, 0x20112012, 0x20112111, 0x20112210, 0x20112212,
+     0x20122010, 0x20122011, 0x20122110, 0x20122112, 0x21102010, 0x21102012,
+     0x21102111, 0x21102210, 0x21102212, 0x21112011, 0x21112110, 0x21112111,
+     0x21112112, 0x21112211, 0x21122012, 0x21122111, 0x21122112, 0x21122212,
+     0x22102011, 0x22102110, 0x22112010, 0x22112012, 0x22112111, 0x22112212,
+     0x22122011, 0x22122112, 0x20102121, 0x20112121, 0x20122121, 0x21102120,
+     0x21102122, 0x21102221, 0x21112020, 0x21112121, 0x21112220, 0x21122021,
+     0x22102121, 0x22112021, 0x22112120, 0x22112121, 0x22112122, 0x20200000,
+     0x20200002, 0x20200200, 0x20200202, 0x20210101, 0x20220000, 0x20220002,
+     0x20220200, 0x20220202, 0x21200101, 0x21210001, 0x21210100, 0x21210102,
+     0x21210201, 0x22200000, 0x22200002, 0x22200200, 0x22200202, 0x22210101,
+     0x22220000, 0x22220002, 0x22220200, 0x22220202, 0x20200111, 0x20200211,
+     0x20210011, 0x20210110, 0x20210112, 0x20210211, 0x20210212, 0x21200112,
+     0x21200211, 0x21210011, 0x21210111, 0x21210210, 0x21210212, 0x21220011,
+     0x21220110, 0x22200111, 0x22210010, 0x22210012, 0x22210112, 0x22210211,
+     0x20200022, 0x20200220, 0x20200222, 0x20210020, 0x20210221, 0x20220022,
+     0x20220220, 0x20220222, 0x21200121, 0x21210021, 0x21210122, 0x21210221,
+     0x21220121, 0x22200020, 0x22200022, 0x22200220, 0x22200222, 0x22210121,
+     0x22220020, 0x22220022, 0x22220220, 0x22220222, 0x20211201, 0x20221101,
+     0x21201001, 0x21201100, 0x21211000, 0x21211100, 0x21211101, 0x21211200,
+     0x21211202, 0x21221001, 0x21221101, 0x21221102, 0x21221200, 0x21221201,
+     0x22201101, 0x20201112, 0x20201211, 0x20211010, 0x20211012, 0x20211111,
+     0x20211210, 0x20221112, 0x20221211, 0x21201012, 0x21201111, 0x21211011,
+     0x21211110, 0x21211111, 0x21211112, 0x21211211, 0x21221111, 0x21221212,
+     0x22201011, 0x22201110, 0x22201111, 0x22201112, 0x22201211, 0x22211012,
+     0x22211111, 0x22211210, 0x20201121, 0x20211021, 0x20211122, 0x20211222,
+     0x20221021, 0x20221121, 0x21201120, 0x21201122, 0x21201222, 0x21211022,
+     0x21211121, 0x21211122, 0x21211220, 0x21221020, 0x21221022, 0x22201122,
+     0x22211020, 0x22211121, 0x22211122, 0x22211221, 0x22221021, 0x22221120,
+     0x22221122, 0x20202000, 0x20202002, 0x20202200, 0x20202202, 0x20222000,
+     0x20222002, 0x20222200, 0x20222202, 0x21212001, 0x21212100, 0x21212102,
+     0x21212201, 0x22202000, 0x22202002, 0x22202200, 0x22202202, 0x22212101,
+     0x22222000, 0x22222002, 0x22222200, 0x22222202, 0x20202111, 0x20212110,
+     0x20212211, 0x20222011, 0x20222111, 0x21202011, 0x21212010, 0x21212111,
+     0x21212212, 0x21222011, 0x21222112, 0x21222211, 0x22212010, 0x22212112,
+     0x20202020, 0x20202022, 0x20202220, 0x20202222, 0x20222020, 0x20222022,
+     0x20222220, 0x20222222, 0x21212021, 0x21212120, 0x21212122, 0x22202020,
+     0x22202022, 0x22202220, 0x22202222, 0x22212121, 0x22222020, 0x22222022,
+     0x22222220, 0x22222222});
+#endif
+
+#endif // GGML_COMMON_IMPL
+#endif // GGML_COMMON_IMPL
diff --git a/sycl/third_party/ggml/ggml-common.h.yaml b/sycl/third_party/ggml/ggml-common.h.yaml
new file mode 100644
index 00000000000..a5643b94c31
--- /dev/null
+++ b/sycl/third_party/ggml/ggml-common.h.yaml
@@ -0,0 +1,468 @@
+---
+MainSourceFile:  '/work/Strata_B70/sycl/third_party/ggml/ggml-common.h'
+Replacements:
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          808
+    Length:          23
+    ReplacementText: "#define DPCT_PROFILING_ENABLED\n#include <sycl/sycl.hpp>\n#include <dpct/dpct.hpp>\n"
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          866
+    Length:          4
+    ReplacementText: 'sycl::half'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          891
+    Length:          5
+    ReplacementText: 'sycl::half2'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          3603
+    Length:          0
+    ReplacementText: ' dpct_type_176557'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          3833
+    Length:          0
+    ReplacementText: ' dpct_type_169569'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          4081
+    Length:          0
+    ReplacementText: ' dpct_type_270674'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          4314
+    Length:          0
+    ReplacementText: ' dpct_type_161308'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          4707
+    Length:          0
+    ReplacementText: ' dpct_type_632229'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          4977
+    Length:          0
+    ReplacementText: ' dpct_type_129888'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          5324
+    Length:          0
+    ReplacementText: ' dpct_type_150588'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          5625
+    Length:          0
+    ReplacementText: ' dpct_type_101666'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          6083
+    Length:          0
+    ReplacementText: ' dpct_type_629246'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          6294
+    Length:          0
+    ReplacementText: ' dpct_type_105592'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          6702
+    Length:          0
+    ReplacementText: ' dpct_type_176150'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          7031
+    Length:          0
+    ReplacementText: ' dpct_type_684670'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
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+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          14610
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+    ReplacementText: 'static dpct::global_memory<const uint8_t, 1> kmask_iq2xs(sycl::range(8), {1, 2, 4, 8, 16, 32, 64, 128});'
+    ConstantFlag:    ''
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+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          14702
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+    ReplacementText: 'static dpct::global_memory<const uint8_t, 1> ksigns_iq2xs(sycl::range(128), {0, 129, 130, 3, 132, 5, 6, 135, 136, 9, 10, 139, 12, 141, 142, 15, 144, 17, 18, 147, 20, 149, 150, 23, 24, 153, 154, 27, 156, 29, 30, 159, 160, 33, 34, 163, 36, 165, 166, 39, 40, 169, 170, 43, 172, 45, 46, 175, 48, 177, 178, 51, 180, 53, 54, 183, 184, 57, 58, 187, 60, 189, 190, 63, 192, 65, 66, 195, 68, 197, 198, 71, 72, 201, 202, 75, 204, 77, 78, 207, 80, 209, 210, 83, 212, 85, 86, 215, 216, 89, 90, 219, 92, 221, 222, 95, 96, 225, 226, 99, 228, 101, 102, 231, 232, 105, 106, 235, 108, 237, 238, 111, 240, 113, 114, 243, 116, 245, 246, 119, 120, 249, 250, 123, 252, 125, 126, 255});'
+    ConstantFlag:    ''
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+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          15437
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+    ReplacementText: 'static dpct::global_memory<const uint64_t, 1> ksigns64(sycl::range(128), {0x0000000000000000, 0xff000000000000ff, 0xff0000000000ff00, 0x000000000000ffff, 0xff00000000ff0000, 0x0000000000ff00ff, 0x0000000000ffff00, 0xff00000000ffffff, 0xff000000ff000000, 0x00000000ff0000ff, 0x00000000ff00ff00, 0xff000000ff00ffff, 0x00000000ffff0000, 0xff000000ffff00ff, 0xff000000ffffff00, 0x00000000ffffffff, 0xff0000ff00000000, 0x000000ff000000ff, 0x000000ff0000ff00, 0xff0000ff0000ffff, 0x000000ff00ff0000, 0xff0000ff00ff00ff, 0xff0000ff00ffff00, 0x000000ff00ffffff, 0x000000ffff000000, 0xff0000ffff0000ff, 0xff0000ffff00ff00, 0x000000ffff00ffff, 0xff0000ffffff0000, 0x000000ffffff00ff, 0x000000ffffffff00, 0xff0000ffffffffff, 0xff00ff0000000000, 0x0000ff00000000ff, 0x0000ff000000ff00, 0xff00ff000000ffff, 0x0000ff0000ff0000, 0xff00ff0000ff00ff, 0xff00ff0000ffff00, 0x0000ff0000ffffff, 0x0000ff00ff000000, 0xff00ff00ff0000ff, 0xff00ff00ff00ff00, 0x0000ff00ff00ffff, 0xff00ff00ffff0000, 0x0000ff00ffff00ff, 0x0000ff00ffffff00, 0xff00ff00ffffffff, 0x0000ffff00000000, 0xff00ffff000000ff, 0xff00ffff0000ff00, 0x0000ffff0000ffff, 0xff00ffff00ff0000, 0x0000ffff00ff00ff, 0x0000ffff00ffff00, 0xff00ffff00ffffff, 0xff00ffffff000000, 0x0000ffffff0000ff, 0x0000ffffff00ff00, 0xff00ffffff00ffff, 0x0000ffffffff0000, 0xff00ffffffff00ff, 0xff00ffffffffff00, 0x0000ffffffffffff, 0xffff000000000000, 0x00ff0000000000ff, 0x00ff00000000ff00, 0xffff00000000ffff, 0x00ff000000ff0000, 0xffff000000ff00ff, 0xffff000000ffff00, 0x00ff000000ffffff, 0x00ff0000ff000000, 0xffff0000ff0000ff, 0xffff0000ff00ff00, 0x00ff0000ff00ffff, 0xffff0000ffff0000, 0x00ff0000ffff00ff, 0x00ff0000ffffff00, 0xffff0000ffffffff, 0x00ff00ff00000000, 0xffff00ff000000ff, 0xffff00ff0000ff00, 0x00ff00ff0000ffff, 0xffff00ff00ff0000, 0x00ff00ff00ff00ff, 0x00ff00ff00ffff00, 0xffff00ff00ffffff, 0xffff00ffff000000, 0x00ff00ffff0000ff, 0x00ff00ffff00ff00, 0xffff00ffff00ffff, 0x00ff00ffffff0000, 0xffff00ffffff00ff, 0xffff00ffffffff00, 0x00ff00ffffffffff, 0x00ffff0000000000, 0xffffff00000000ff, 0xffffff000000ff00, 0x00ffff000000ffff, 0xffffff0000ff0000, 0x00ffff0000ff00ff, 0x00ffff0000ffff00, 0xffffff0000ffffff, 0xffffff00ff000000, 0x00ffff00ff0000ff, 0x00ffff00ff00ff00, 0xffffff00ff00ffff, 0x00ffff00ffff0000, 0xffffff00ffff00ff, 0xffffff00ffffff00, 0x00ffff00ffffffff, 0xffffffff00000000, 0x00ffffff000000ff, 0x00ffffff0000ff00, 0xffffffff0000ffff, 0x00ffffff00ff0000, 0xffffffff00ff00ff, 0xffffffff00ffff00, 0x00ffffff00ffffff, 0x00ffffffff000000, 0xffffffffff0000ff, 0xffffffffff00ff00, 0x00ffffffff00ffff, 0xffffffffffff0000, 0x00ffffffffff00ff, 0x00ffffffffffff00, 0xffffffffffffffff});'
+    ConstantFlag:    ''
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+    Offset:          18186
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+    ReplacementText: 'static dpct::global_memory<const uint64_t, 1> iq2xxs_grid(sycl::range(256), {0x0808080808080808, 0x080808080808082b, 0x0808080808081919, 0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819, 0x0808080808191908, 0x08080808082b0808, 0x08080808082b082b, 0x08080808082b2b08, 0x08080808082b2b2b, 0x0808080819080819, 0x0808080819081908, 0x0808080819190808, 0x0808080819192b08, 0x08080808192b0819, 0x08080808192b1908, 0x080808082b080808, 0x080808082b08082b, 0x080808082b082b2b, 0x080808082b2b082b, 0x0808081908080819, 0x0808081908081908, 0x0808081908190808, 0x0808081908191919, 0x0808081919080808, 0x080808192b081908, 0x080808192b192b08, 0x0808082b08080808, 0x0808082b0808082b, 0x0808082b082b082b, 0x0808082b2b08082b, 0x0808190808080819, 0x0808190808081908, 0x0808190808190808, 0x08081908082b0819, 0x08081908082b1908, 0x0808190819080808, 0x080819081908082b, 0x0808190819082b08, 0x08081908192b0808, 0x080819082b080819, 0x080819082b081908, 0x080819082b190808, 0x080819082b2b1908, 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0x1908081908080808, 0x19080819082b0808, 0x19080819192b0819, 0x190808192b080808, 0x190808192b081919, 0x1908082b08080819, 0x1908082b08190808, 0x1908082b19082b08, 0x1908082b1919192b, 0x1908082b192b2b08, 0x1908190808080808, 0x1908190808082b08, 0x19081908082b0808, 0x190819082b080808, 0x190819082b192b19, 0x190819190819082b, 0x19081919082b1908, 0x1908192b08080808, 0x19082b0808080819, 0x19082b0808081908, 0x19082b0808190808, 0x19082b0819080808, 0x19082b0819081919, 0x19082b1908080808, 0x19082b1919192b08, 0x19082b19192b0819, 0x19082b192b08082b, 0x19082b2b19081919, 0x19082b2b2b190808, 0x1919080808080808, 0x1919080808082b08, 0x1919080808190819, 0x1919080808192b19, 0x19190808082b0808, 0x191908082b080808, 0x191908082b082b08, 0x1919081908081908, 0x191908191908082b, 0x191908192b2b1908, 0x1919082b2b190819, 0x191919082b190808, 0x191919082b19082b, 0x1919191908082b2b, 0x1919192b08080819, 0x1919192b19191908, 0x19192b0808080808, 0x19192b0808190819, 0x19192b0808192b19, 0x19192b08192b1908, 0x19192b1919080808, 0x19192b2b08082b08, 0x192b080808081908, 0x192b080808190808, 0x192b080819080808, 0x192b0808192b2b08, 0x192b081908080808, 0x192b081919191919, 0x192b082b08192b08, 0x192b082b192b0808, 0x192b190808080808, 0x192b190808081919, 0x192b191908190808, 0x192b19190819082b, 0x192b19192b081908, 0x192b2b081908082b, 0x2b08080808080808, 0x2b0808080808082b, 0x2b08080808082b2b, 0x2b08080819080819, 0x2b0808082b08082b, 0x2b08081908081908, 0x2b08081908192b08, 0x2b08081919080808, 0x2b08082b08190819, 0x2b08190808080819, 0x2b08190808081908, 0x2b08190808190808, 0x2b08190808191919, 0x2b08190819080808, 0x2b081908192b0808, 0x2b08191908080808, 0x2b0819191908192b, 0x2b0819192b191908, 0x2b08192b08082b19, 0x2b08192b19080808, 0x2b08192b192b0808, 0x2b082b080808082b, 0x2b082b1908081908, 0x2b082b2b08190819, 0x2b19080808081908, 0x2b19080808190808, 0x2b190808082b1908, 0x2b19080819080808, 0x2b1908082b2b0819, 0x2b1908190819192b, 0x2b1908192b080808, 0x2b19082b19081919, 0x2b19190808080808, 0x2b191908082b082b, 0x2b19190819081908, 0x2b19191919190819, 0x2b192b082b080819, 0x2b192b19082b0808, 0x2b2b08080808082b, 0x2b2b080819190808, 0x2b2b08082b081919, 0x2b2b081908082b19, 0x2b2b082b08080808, 0x2b2b190808192b08, 0x2b2b2b0819190808, 0x2b2b2b1908081908});'
+    ConstantFlag:    ''
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+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          23625
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+    ReplacementText: 'static dpct::global_memory<const uint64_t, 1> iq2xs_grid(sycl::range(512), {0x0808080808080808, 0x080808080808082b, 0x0808080808081919, 0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819, 0x0808080808191908, 0x080808080819192b, 0x0808080808192b19, 0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919, 0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908, 0x080808081908192b, 0x0808080819082b19, 0x0808080819190808, 0x080808081919082b, 0x0808080819191919, 0x0808080819192b08, 0x08080808192b0819, 0x08080808192b1908, 0x080808082b080808, 0x080808082b08082b, 0x080808082b081919, 0x080808082b082b08, 0x080808082b190819, 0x080808082b191908, 0x080808082b192b19, 0x080808082b2b0808, 0x0808081908080819, 0x0808081908081908, 0x080808190808192b, 0x0808081908082b19, 0x0808081908190808, 0x080808190819082b, 0x0808081908191919, 0x0808081908192b08, 0x0808081908192b2b, 0x08080819082b0819, 0x08080819082b1908, 0x0808081919080808, 0x080808191908082b, 0x0808081919081919, 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0x2b082b082b080808, 0x2b082b082b08082b, 0x2b082b082b2b2b08, 0x2b082b190808192b, 0x2b082b2b082b082b, 0x2b082b2b2b080808, 0x2b082b2b2b082b08, 0x2b082b2b2b19192b, 0x2b082b2b2b2b2b08, 0x2b19080808080819, 0x2b19080808081908, 0x2b19080808190808, 0x2b19080819080808, 0x2b1908081919192b, 0x2b1908082b081908, 0x2b19081908080808, 0x2b190819082b082b, 0x2b190819192b1908, 0x2b19082b1919192b, 0x2b19082b2b082b19, 0x2b19190808080808, 0x2b19190808081919, 0x2b19190819081908, 0x2b19190819190808, 0x2b19190819192b08, 0x2b191919082b2b19, 0x2b1919192b190808, 0x2b1919192b19082b, 0x2b19192b19080819, 0x2b192b0819190819, 0x2b192b082b2b192b, 0x2b192b1919082b19, 0x2b192b2b08191919, 0x2b192b2b192b0808, 0x2b2b080808080808, 0x2b2b08080808082b, 0x2b2b080808082b08, 0x2b2b080808082b2b, 0x2b2b0808082b0808, 0x2b2b0808082b2b2b, 0x2b2b08082b2b0808, 0x2b2b081919190819, 0x2b2b081919192b19, 0x2b2b08192b2b192b, 0x2b2b082b08080808, 0x2b2b082b0808082b, 0x2b2b082b08082b08, 0x2b2b082b082b2b2b, 0x2b2b082b2b080808, 0x2b2b082b2b2b0808, 0x2b2b190819080808, 0x2b2b19082b191919, 0x2b2b192b192b1919, 0x2b2b192b2b192b08, 0x2b2b2b0808082b2b, 0x2b2b2b08082b0808, 0x2b2b2b08082b082b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b0808, 0x2b2b2b082b2b2b08, 0x2b2b2b1908081908, 0x2b2b2b192b081908, 0x2b2b2b192b08192b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b082b2b2b, 0x2b2b2b2b2b190819, 0x2b2b2b2b2b2b2b2b});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          34439
+    Length:          21564
+    ReplacementText: 'static dpct::global_memory<const uint64_t, 1> iq2s_grid(sycl::range(1024), {0x0808080808080808, 0x080808080808082b, 0x0808080808081919, 0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819, 0x0808080808191908, 0x080808080819192b, 0x0808080808192b19, 0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919, 0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908, 0x080808081908192b, 0x0808080819082b19, 0x0808080819190808, 0x080808081919082b, 0x0808080819191919, 0x0808080819192b08, 0x08080808192b0819, 0x08080808192b1908, 0x08080808192b192b, 0x08080808192b2b19, 0x080808082b080808, 0x080808082b08082b, 0x080808082b081919, 0x080808082b082b08, 0x080808082b190819, 0x080808082b191908, 0x080808082b2b0808, 0x080808082b2b1919, 0x080808082b2b2b2b, 0x0808081908080819, 0x0808081908081908, 0x080808190808192b, 0x0808081908082b19, 0x0808081908190808, 0x080808190819082b, 0x0808081908191919, 0x0808081908192b08, 0x08080819082b0819, 0x08080819082b1908, 0x0808081919080808, 0x080808191908082b, 0x0808081919081919, 0x0808081919082b08, 0x0808081919190819, 0x0808081919191908, 0x080808191919192b, 0x0808081919192b19, 0x08080819192b0808, 0x08080819192b1919, 0x08080819192b2b08, 0x080808192b080819, 0x080808192b081908, 0x080808192b190808, 0x080808192b19082b, 0x080808192b191919, 0x080808192b2b0819, 0x080808192b2b1908, 0x0808082b08080808, 0x0808082b0808082b, 0x0808082b08081919, 0x0808082b08082b08, 0x0808082b08190819, 0x0808082b08191908, 0x0808082b082b0808, 0x0808082b082b2b2b, 0x0808082b19080819, 0x0808082b19081908, 0x0808082b1908192b, 0x0808082b19082b19, 0x0808082b19190808, 0x0808082b19191919, 0x0808082b2b080808, 0x0808082b2b081919, 0x0808082b2b082b2b, 0x0808082b2b191908, 0x0808082b2b2b082b, 0x0808190808080819, 0x0808190808081908, 0x080819080808192b, 0x0808190808082b19, 0x0808190808190808, 0x080819080819082b, 0x0808190808191919, 0x0808190808192b08, 0x08081908082b0819, 0x08081908082b1908, 0x08081908082b192b, 0x08081908082b2b19, 0x0808190819080808, 0x080819081908082b, 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0x2b0819192b080808, 0x2b0819192b082b2b, 0x2b08192b08080819, 0x2b08192b08081908, 0x2b08192b08190808, 0x2b08192b082b2b19, 0x2b08192b19080808, 0x2b082b0808080808, 0x2b082b0808081919, 0x2b082b0808190819, 0x2b082b0808191908, 0x2b082b0819080819, 0x2b082b0819081908, 0x2b082b0819190808, 0x2b082b082b2b082b, 0x2b082b1908080819, 0x2b082b1908081908, 0x2b082b1919080808, 0x2b082b19192b1919, 0x2b082b2b082b082b, 0x2b082b2b19192b08, 0x2b082b2b19192b2b, 0x2b082b2b2b08082b, 0x2b082b2b2b2b082b, 0x2b19080808080819, 0x2b19080808081908, 0x2b19080808082b19, 0x2b19080808190808, 0x2b1908080819082b, 0x2b19080808191919, 0x2b19080808192b08, 0x2b190808082b1908, 0x2b19080819080808, 0x2b1908081908082b, 0x2b19080819081919, 0x2b19080819082b08, 0x2b19080819190819, 0x2b19080819191908, 0x2b190808192b0808, 0x2b1908082b080819, 0x2b1908082b081908, 0x2b1908082b190808, 0x2b19081908080808, 0x2b19081908081919, 0x2b19081908190819, 0x2b19081908191908, 0x2b19081919080819, 0x2b19081919081908, 0x2b19081919190808, 0x2b19081919192b2b, 0x2b19082b08080819, 0x2b19082b08081908, 0x2b19082b08190808, 0x2b19082b19080808, 0x2b19082b2b2b192b, 0x2b19190808080808, 0x2b1919080808082b, 0x2b19190808081919, 0x2b19190808082b08, 0x2b19190808190819, 0x2b19190808191908, 0x2b191908082b0808, 0x2b19190819080819, 0x2b19190819081908, 0x2b19190819190808, 0x2b1919082b080808, 0x2b1919082b19192b, 0x2b19191908080819, 0x2b19191908081908, 0x2b19191908190808, 0x2b19191919080808, 0x2b1919192b192b08, 0x2b1919192b2b0819, 0x2b19192b08080808, 0x2b19192b1908192b, 0x2b19192b192b1908, 0x2b192b0808080819, 0x2b192b0808081908, 0x2b192b0808190808, 0x2b192b08082b192b, 0x2b192b0819080808, 0x2b192b082b2b2b19, 0x2b192b1908080808, 0x2b192b1919082b19, 0x2b192b191919082b, 0x2b192b2b2b190808, 0x2b2b080808080808, 0x2b2b080808081919, 0x2b2b080808082b2b, 0x2b2b080808191908, 0x2b2b0808082b082b, 0x2b2b0808082b2b2b, 0x2b2b080819080819, 0x2b2b080819081908, 0x2b2b080819190808, 0x2b2b08082b2b082b, 0x2b2b08082b2b2b2b, 0x2b2b081919080808, 0x2b2b0819192b1919, 0x2b2b082b0808082b, 0x2b2b082b08082b2b, 0x2b2b082b082b082b, 0x2b2b082b082b2b08, 0x2b2b082b082b2b2b, 0x2b2b082b2b08082b, 0x2b2b082b2b082b08, 0x2b2b082b2b082b2b, 0x2b2b082b2b2b2b08, 0x2b2b190808080819, 0x2b2b190808081908, 0x2b2b190808190808, 0x2b2b190819080808, 0x2b2b19082b082b19, 0x2b2b19082b2b1908, 0x2b2b191908080808, 0x2b2b191908192b19, 0x2b2b192b19190819, 0x2b2b2b0808082b2b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b082b, 0x2b2b2b1919191908, 0x2b2b2b192b08192b, 0x2b2b2b2b08082b08, 0x2b2b2b2b08082b2b, 0x2b2b2b2b082b0808, 0x2b2b2b2b082b082b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b2b082b08, 0x2b2b2b2b2b2b2b2b});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          56005
+    Length:          3261
+    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq3xxs_grid(sycl::range(256), {0x04040404, 0x04040414, 0x04040424, 0x04040c0c, 0x04040c1c, 0x04040c3e, 0x04041404, 0x04041414, 0x04041c0c, 0x04042414, 0x04043e1c, 0x04043e2c, 0x040c040c, 0x040c041c, 0x040c0c04, 0x040c0c14, 0x040c140c, 0x040c142c, 0x040c1c04, 0x040c1c14, 0x040c240c, 0x040c2c24, 0x040c3e04, 0x04140404, 0x04140414, 0x04140424, 0x04140c0c, 0x04141404, 0x04141414, 0x04141c0c, 0x04141c1c, 0x04141c3e, 0x04142c0c, 0x04142c3e, 0x04143e2c, 0x041c040c, 0x041c043e, 0x041c0c04, 0x041c0c14, 0x041c142c, 0x041c3e04, 0x04240c1c, 0x04241c3e, 0x04242424, 0x04242c3e, 0x04243e1c, 0x04243e2c, 0x042c040c, 0x042c043e, 0x042c1c14, 0x042c2c14, 0x04341c2c, 0x04343424, 0x043e0c04, 0x043e0c24, 0x043e0c34, 0x043e241c, 0x043e340c, 0x0c04040c, 0x0c04041c, 0x0c040c04, 0x0c040c14, 0x0c04140c, 0x0c04141c, 0x0c041c04, 0x0c041c14, 0x0c041c24, 0x0c04243e, 0x0c042c04, 0x0c0c0404, 0x0c0c0414, 0x0c0c0c0c, 0x0c0c1404, 0x0c0c1414, 0x0c14040c, 0x0c14041c, 0x0c140c04, 0x0c140c14, 0x0c14140c, 0x0c141c04, 0x0c143e14, 0x0c1c0404, 0x0c1c0414, 0x0c1c1404, 0x0c1c1c0c, 0x0c1c2434, 0x0c1c3434, 0x0c24040c, 0x0c24042c, 0x0c242c04, 0x0c2c1404, 0x0c2c1424, 0x0c2c2434, 0x0c2c3e0c, 0x0c34042c, 0x0c3e1414, 0x0c3e2404, 0x14040404, 0x14040414, 0x14040c0c, 0x14040c1c, 0x14041404, 0x14041414, 0x14041434, 0x14041c0c, 0x14042414, 0x140c040c, 0x140c041c, 0x140c042c, 0x140c0c04, 0x140c0c14, 0x140c140c, 0x140c1c04, 0x140c341c, 0x140c343e, 0x140c3e04, 0x14140404, 0x14140414, 0x14140c0c, 0x14140c3e, 0x14141404, 0x14141414, 0x14141c3e, 0x14142404, 0x14142c2c, 0x141c040c, 0x141c0c04, 0x141c0c24, 0x141c3e04, 0x141c3e24, 0x14241c2c, 0x14242c1c, 0x142c041c, 0x142c143e, 0x142c240c, 0x142c3e24, 0x143e040c, 0x143e041c, 0x143e0c34, 0x143e242c, 0x1c04040c, 0x1c040c04, 0x1c040c14, 0x1c04140c, 0x1c04141c, 0x1c042c04, 0x1c04342c, 0x1c043e14, 0x1c0c0404, 0x1c0c0414, 0x1c0c1404, 0x1c0c1c0c, 0x1c0c2424, 0x1c0c2434, 0x1c14040c, 0x1c14041c, 0x1c140c04, 0x1c14142c, 0x1c142c14, 0x1c143e14, 0x1c1c0c0c, 0x1c1c1c1c, 0x1c241c04, 0x1c24243e, 0x1c243e14, 0x1c2c0404, 0x1c2c0434, 0x1c2c1414, 0x1c2c2c2c, 0x1c340c24, 0x1c341c34, 0x1c34341c, 0x1c3e1c1c, 0x1c3e3404, 0x24040424, 0x24040c3e, 0x24041c2c, 0x24041c3e, 0x24042c1c, 0x24042c3e, 0x240c3e24, 0x24141404, 0x24141c3e, 0x24142404, 0x24143404, 0x24143434, 0x241c043e, 0x241c242c, 0x24240424, 0x24242c0c, 0x24243424, 0x242c142c, 0x242c241c, 0x242c3e04, 0x243e042c, 0x243e0c04, 0x243e0c14, 0x243e1c04, 0x2c040c14, 0x2c04240c, 0x2c043e04, 0x2c0c0404, 0x2c0c0434, 0x2c0c1434, 0x2c0c2c2c, 0x2c140c24, 0x2c141c14, 0x2c143e14, 0x2c1c0414, 0x2c1c2c1c, 0x2c240c04, 0x2c24141c, 0x2c24143e, 0x2c243e14, 0x2c2c0414, 0x2c2c1c0c, 0x2c342c04, 0x2c3e1424, 0x2c3e2414, 0x34041424, 0x34042424, 0x34042434, 0x34043424, 0x340c140c, 0x340c340c, 0x34140c3e, 0x34143424, 0x341c1c04, 0x341c1c34, 0x34242424, 0x342c042c, 0x342c2c14, 0x34341c1c, 0x343e041c, 0x343e140c, 0x3e04041c, 0x3e04042c, 0x3e04043e, 0x3e040c04, 0x3e041c14, 0x3e042c14, 0x3e0c1434, 0x3e0c2404, 0x3e140c14, 0x3e14242c, 0x3e142c14, 0x3e1c0404, 0x3e1c0c2c, 0x3e1c1c1c, 0x3e1c3404, 0x3e24140c, 0x3e24240c, 0x3e2c0404, 0x3e2c0414, 0x3e2c1424, 0x3e341c04});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          59268
+    Length:          6459
+    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq3s_grid(sycl::range(512), {0x01010101, 0x01010103, 0x01010105, 0x0101010b, 0x0101010f, 0x01010301, 0x01010303, 0x01010305, 0x01010309, 0x0101030d, 0x01010501, 0x01010503, 0x0101050b, 0x01010707, 0x01010901, 0x01010905, 0x0101090b, 0x0101090f, 0x01010b03, 0x01010b07, 0x01010d01, 0x01010d05, 0x01010f03, 0x01010f09, 0x01010f0f, 0x01030101, 0x01030103, 0x01030105, 0x01030109, 0x01030301, 0x01030303, 0x0103030b, 0x01030501, 0x01030507, 0x0103050f, 0x01030703, 0x0103070b, 0x01030909, 0x01030d03, 0x01030d0b, 0x01030f05, 0x01050101, 0x01050103, 0x0105010b, 0x0105010f, 0x01050301, 0x01050307, 0x0105030d, 0x01050503, 0x0105050b, 0x01050701, 0x01050709, 0x01050905, 0x0105090b, 0x0105090f, 0x01050b03, 0x01050b07, 0x01050f01, 0x01050f07, 0x01070107, 0x01070303, 0x0107030b, 0x01070501, 0x01070505, 0x01070703, 0x01070707, 0x0107070d, 0x01070909, 0x01070b01, 0x01070b05, 0x01070d0f, 0x01070f03, 0x01070f0b, 0x01090101, 0x01090307, 0x0109030f, 0x01090503, 0x01090509, 0x01090705, 0x01090901, 0x01090907, 0x01090b03, 0x01090f01, 0x010b0105, 0x010b0109, 0x010b0501, 0x010b0505, 0x010b050d, 0x010b0707, 0x010b0903, 0x010b090b, 0x010b090f, 0x010b0d0d, 0x010b0f07, 0x010d010d, 0x010d0303, 0x010d0307, 0x010d0703, 0x010d0b05, 0x010d0f03, 0x010f0101, 0x010f0105, 0x010f0109, 0x010f0501, 0x010f0505, 0x010f050d, 0x010f0707, 0x010f0b01, 0x010f0b09, 0x03010101, 0x03010103, 0x03010105, 0x03010109, 0x03010301, 0x03010303, 0x03010307, 0x0301030b, 0x0301030f, 0x03010501, 0x03010505, 0x03010703, 0x03010709, 0x0301070d, 0x03010b09, 0x03010b0d, 0x03010d03, 0x03010f05, 0x03030101, 0x03030103, 0x03030107, 0x0303010d, 0x03030301, 0x03030309, 0x03030503, 0x03030701, 0x03030707, 0x03030903, 0x03030b01, 0x03030b05, 0x03030f01, 0x03030f0d, 0x03050101, 0x03050305, 0x0305030b, 0x0305030f, 0x03050501, 0x03050509, 0x03050705, 0x03050901, 0x03050907, 0x03050b0b, 0x03050d01, 0x03050f05, 0x03070103, 0x03070109, 0x0307010f, 0x03070301, 0x03070307, 0x03070503, 0x0307050f, 0x03070701, 0x03070709, 0x03070903, 0x03070d05, 0x03070f01, 0x03090107, 0x0309010b, 0x03090305, 0x03090309, 0x03090703, 0x03090707, 0x03090905, 0x0309090d, 0x03090b01, 0x03090b09, 0x030b0103, 0x030b0301, 0x030b0307, 0x030b0503, 0x030b0701, 0x030b0705, 0x030b0b03, 0x030d0501, 0x030d0509, 0x030d050f, 0x030d0909, 0x030d090d, 0x030f0103, 0x030f0107, 0x030f0301, 0x030f0305, 0x030f0503, 0x030f070b, 0x030f0903, 0x030f0d05, 0x030f0f01, 0x05010101, 0x05010103, 0x05010107, 0x0501010b, 0x0501010f, 0x05010301, 0x05010305, 0x05010309, 0x0501030d, 0x05010503, 0x05010507, 0x0501050f, 0x05010701, 0x05010705, 0x05010903, 0x05010907, 0x0501090b, 0x05010b01, 0x05010b05, 0x05010d0f, 0x05010f01, 0x05010f07, 0x05010f0b, 0x05030101, 0x05030105, 0x05030301, 0x05030307, 0x0503030f, 0x05030505, 0x0503050b, 0x05030703, 0x05030709, 0x05030905, 0x05030b03, 0x05050103, 0x05050109, 0x0505010f, 0x05050503, 0x05050507, 0x05050701, 0x0505070f, 0x05050903, 0x05050b07, 0x05050b0f, 0x05050f03, 0x05050f09, 0x05070101, 0x05070105, 0x0507010b, 0x05070303, 0x05070505, 0x05070509, 0x05070703, 0x05070707, 0x05070905, 0x05070b01, 0x05070d0d, 0x05090103, 0x0509010f, 0x05090501, 0x05090507, 0x05090705, 0x0509070b, 0x05090903, 0x05090f05, 0x05090f0b, 0x050b0109, 0x050b0303, 0x050b0505, 0x050b070f, 0x050b0901, 0x050b0b07, 0x050b0f01, 0x050d0101, 0x050d0105, 0x050d010f, 0x050d0503, 0x050d0b0b, 0x050d0d03, 0x050f010b, 0x050f0303, 0x050f050d, 0x050f0701, 0x050f0907, 0x050f0b01, 0x07010105, 0x07010303, 0x07010307, 0x0701030b, 0x0701030f, 0x07010505, 0x07010703, 0x07010707, 0x0701070b, 0x07010905, 0x07010909, 0x0701090f, 0x07010b03, 0x07010d07, 0x07010f03, 0x07030103, 0x07030107, 0x0703010b, 0x07030309, 0x07030503, 0x07030507, 0x07030901, 0x07030d01, 0x07030f05, 0x07030f0d, 0x07050101, 0x07050305, 0x07050501, 0x07050705, 0x07050709, 0x07050b01, 0x07070103, 0x07070301, 0x07070309, 0x07070503, 0x07070507, 0x0707050f, 0x07070701, 0x07070903, 0x07070907, 0x0707090f, 0x07070b0b, 0x07070f07, 0x07090107, 0x07090303, 0x0709030d, 0x07090505, 0x07090703, 0x07090b05, 0x07090d01, 0x07090d09, 0x070b0103, 0x070b0301, 0x070b0305, 0x070b050b, 0x070b0705, 0x070b0909, 0x070b0b0d, 0x070b0f07, 0x070d030d, 0x070d0903, 0x070f0103, 0x070f0107, 0x070f0501, 0x070f0505, 0x070f070b, 0x09010101, 0x09010109, 0x09010305, 0x09010501, 0x09010509, 0x0901050f, 0x09010705, 0x09010903, 0x09010b01, 0x09010f01, 0x09030105, 0x0903010f, 0x09030303, 0x09030307, 0x09030505, 0x09030701, 0x0903070b, 0x09030907, 0x09030b03, 0x09030b0b, 0x09050103, 0x09050107, 0x09050301, 0x0905030b, 0x09050503, 0x09050707, 0x09050901, 0x09050b0f, 0x09050d05, 0x09050f01, 0x09070109, 0x09070303, 0x09070307, 0x09070501, 0x09070505, 0x09070703, 0x0907070b, 0x09090101, 0x09090105, 0x09090509, 0x0909070f, 0x09090901, 0x09090f03, 0x090b010b, 0x090b010f, 0x090b0503, 0x090b0d05, 0x090d0307, 0x090d0709, 0x090d0d01, 0x090f0301, 0x090f030b, 0x090f0701, 0x090f0907, 0x090f0b03, 0x0b010105, 0x0b010301, 0x0b010309, 0x0b010505, 0x0b010901, 0x0b010909, 0x0b01090f, 0x0b010b05, 0x0b010d0d, 0x0b010f09, 0x0b030103, 0x0b030107, 0x0b03010b, 0x0b030305, 0x0b030503, 0x0b030705, 0x0b030f05, 0x0b050101, 0x0b050303, 0x0b050507, 0x0b050701, 0x0b05070d, 0x0b050b07, 0x0b070105, 0x0b07010f, 0x0b070301, 0x0b07050f, 0x0b070909, 0x0b070b03, 0x0b070d0b, 0x0b070f07, 0x0b090103, 0x0b090109, 0x0b090501, 0x0b090705, 0x0b09090d, 0x0b0b0305, 0x0b0b050d, 0x0b0b0b03, 0x0b0b0b07, 0x0b0d0905, 0x0b0f0105, 0x0b0f0109, 0x0b0f0505, 0x0d010303, 0x0d010307, 0x0d01030b, 0x0d010703, 0x0d010707, 0x0d010d01, 0x0d030101, 0x0d030501, 0x0d03050f, 0x0d030d09, 0x0d050305, 0x0d050709, 0x0d050905, 0x0d050b0b, 0x0d050d05, 0x0d050f01, 0x0d070101, 0x0d070309, 0x0d070503, 0x0d070901, 0x0d09050b, 0x0d090907, 0x0d090d05, 0x0d0b0101, 0x0d0b0107, 0x0d0b0709, 0x0d0b0d01, 0x0d0d010b, 0x0d0d0901, 0x0d0f0303, 0x0d0f0307, 0x0f010101, 0x0f010109, 0x0f01010f, 0x0f010501, 0x0f010505, 0x0f01070d, 0x0f010901, 0x0f010b09, 0x0f010d05, 0x0f030105, 0x0f030303, 0x0f030509, 0x0f030907, 0x0f03090b, 0x0f050103, 0x0f050109, 0x0f050301, 0x0f05030d, 0x0f050503, 0x0f050701, 0x0f050b03, 0x0f070105, 0x0f070705, 0x0f07070b, 0x0f070b07, 0x0f090103, 0x0f09010b, 0x0f090307, 0x0f090501, 0x0f090b01, 0x0f0b0505, 0x0f0b0905, 0x0f0d0105, 0x0f0d0703, 0x0f0f0101});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          65765
+    Length:          138
+    ReplacementText: 'static dpct::global_memory<const int8_t, 1> kvalues_iq4nl(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          66051
+    Length:          119
+    ReplacementText: 'static dpct::global_memory<const int8_t, 1> kvalues_fp4(sycl::range(16), {0, 1, 2, 3, 4, 6, 8, 12, 0, -1, -2, -3, -4, -6, -8, -12});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
+    Offset:          109428
+    Length:          25670
+    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq1s_grid_gpu(sycl::range(NGRID_IQ1S), {0x00000000, 0x00000002, 0x00000101, 0x00000200, 0x00000202, 0x00010001, 0x00010101, 0x00020000, 0x00020002, 0x00020200, 0x00020202, 0x01000101, 0x01010001, 0x01010100, 0x01010102, 0x01020101, 0x02000000, 0x02000002, 0x02000200, 0x02000202, 0x02010101, 0x02020000, 0x02020002, 0x02020200, 0x02020202, 0x00000110, 0x00000111, 0x00010011, 0x00010110, 0x00010112, 0x00010211, 0x00010212, 0x00020111, 0x01000011, 0x01000112, 0x01000211, 0x01010012, 0x01010111, 0x01010212, 0x01020011, 0x01020110, 0x01020112, 0x01020210, 0x02000111, 0x02010011, 0x02010110, 0x02010112, 0x02020111, 0x00000020, 0x00000022, 0x00000220, 0x00000222, 0x00010121, 0x00020020, 0x00020022, 0x00020220, 0x00020222, 0x01000121, 0x01010021, 0x01010221, 0x01020120, 0x01020221, 0x02000020, 0x02000022, 0x02000220, 0x02000222, 0x02010021, 0x02010121, 0x02010221, 0x02020020, 0x02020022, 0x02020220, 0x02020222, 0x00011001, 0x00011100, 0x00011102, 0x00021101, 0x01001001, 0x01001201, 0x01011101, 0x01011202, 0x01021100, 0x01021101, 0x02011001, 0x02011201, 0x02021101, 0x00001011, 0x00001110, 0x00001111, 0x00001112, 0x00011111, 0x00011210, 0x00011212, 0x00021211, 0x01001010, 0x01001111, 0x01001212, 0x01011010, 0x01011011, 0x01011110, 0x01011111, 0x01011112, 0x01011211, 0x01021010, 0x01021012, 0x01021111, 0x01021210, 0x01021212, 0x02001011, 0x02011011, 0x02011111, 0x02011210, 0x02011212, 0x02021011, 0x02021110, 0x02021111, 0x02021112, 0x02021211, 0x00011120, 0x00011221, 0x01001021, 0x01001120, 0x01011020, 0x01011022, 0x01011121, 0x01011220, 0x01021020, 0x01021021, 0x01021122, 0x01021221, 0x02001121, 0x02011021, 0x02011120, 0x02011221, 0x00002000, 0x00002002, 0x00002200, 0x00002202, 0x00012101, 0x00022000, 0x00022002, 0x00022200, 0x00022202, 0x01002101, 0x01012001, 0x01012102, 0x01022101, 0x02002000, 0x02002002, 0x02002200, 0x02002202, 0x02012101, 0x02022000, 0x02022002, 0x02022200, 0x02022202, 0x00002111, 0x00012011, 0x00012110, 0x00012211, 0x00022110, 0x00022111, 0x01002011, 0x01012010, 0x01012011, 0x01012111, 0x01022011, 0x01022110, 0x01022211, 0x02012011, 0x02012110, 0x02012112, 0x02012211, 0x02022111, 0x00002020, 0x00002022, 0x00002220, 0x00002222, 0x00012121, 0x00022020, 0x00022022, 0x00022220, 0x00022222, 0x01002121, 0x01012021, 0x01012221, 0x01022021, 0x01022121, 0x02002020, 0x02002022, 0x02002121, 0x02002220, 0x02002222, 0x02012121, 0x02022020, 0x02022022, 0x02022220, 0x02022222, 0x00110000, 0x00110001, 0x00110100, 0x00110201, 0x00120100, 0x00120101, 0x01100001, 0x01100100, 0x01110000, 0x01110101, 0x01110200, 0x01120001, 0x01120100, 0x01120101, 0x01120201, 0x02110001, 0x02110100, 0x02110102, 0x02120001, 0x02120101, 0x00100011, 0x00100110, 0x00100112, 0x00100211, 0x00110010, 0x00110012, 0x00110111, 0x00110210, 0x00120011, 0x00120110, 0x00120211, 0x01100111, 0x01100212, 0x01110010, 0x01110011, 0x01110012, 0x01110110, 0x01110111, 0x01110112, 0x01110211, 0x01120010, 0x01120111, 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0x01121111, 0x01121112, 0x01121211, 0x02101010, 0x02101012, 0x02101110, 0x02101111, 0x02101210, 0x02101212, 0x02111010, 0x02111011, 0x02111110, 0x02111111, 0x02111112, 0x02111211, 0x02111212, 0x02121010, 0x02121012, 0x02121111, 0x00101021, 0x00101120, 0x00101121, 0x00101122, 0x00111121, 0x00111122, 0x00111220, 0x00111222, 0x00121021, 0x00121122, 0x01101020, 0x01101022, 0x01101120, 0x01101121, 0x01101220, 0x01101222, 0x01111021, 0x01111121, 0x01111122, 0x01111220, 0x01111221, 0x01121021, 0x01121120, 0x01121121, 0x01121220, 0x01121221, 0x01121222, 0x02101122, 0x02101222, 0x02111022, 0x02111121, 0x02121120, 0x02121221, 0x00112001, 0x00112102, 0x00122101, 0x01102001, 0x01102100, 0x01102102, 0x01102201, 0x01112000, 0x01112101, 0x01112200, 0x01112202, 0x01122000, 0x01122001, 0x01122100, 0x01122102, 0x01122201, 0x02102101, 0x02112001, 0x02112100, 0x02122101, 0x00112010, 0x00112012, 0x00112111, 0x00112212, 0x00122011, 0x00122111, 0x01102012, 0x01102110, 0x01102111, 0x01102210, 0x01112011, 0x01112110, 0x01112111, 0x01112112, 0x01112211, 0x01112212, 0x01122010, 0x01122111, 0x01122212, 0x02102211, 0x02112011, 0x02112012, 0x02112111, 0x02112210, 0x02122011, 0x02122112, 0x02122211, 0x00102221, 0x00112122, 0x00122120, 0x00122122, 0x01102120, 0x01102122, 0x01102221, 0x01112020, 0x01112022, 0x01112121, 0x01112220, 0x01122021, 0x01122122, 0x01122221, 0x02102121, 0x02112021, 0x02112122, 0x02112222, 0x00200000, 0x00200002, 0x00200200, 0x00200202, 0x00210101, 0x00220000, 0x00220002, 0x00220101, 0x00220200, 0x00220202, 0x01200101, 0x01210001, 0x01210201, 0x01220001, 0x01220101, 0x02200000, 0x02200002, 0x02200200, 0x02200202, 0x02210101, 0x02220000, 0x02220002, 0x02220101, 0x02220200, 0x02220202, 0x00200111, 0x00210011, 0x00210110, 0x00210211, 0x00220111, 0x01200012, 0x01200110, 0x01200211, 0x01210111, 0x01210210, 0x01210212, 0x01220011, 0x01220110, 0x01220111, 0x01220112, 0x02200111, 0x02210010, 0x02210112, 0x02210211, 0x02220111, 0x00200021, 0x00200220, 0x00200222, 0x00210021, 0x00210121, 0x00220020, 0x00220022, 0x00220220, 0x00220222, 0x01200121, 0x01210021, 0x01210122, 0x01210221, 0x01220121, 0x02200021, 0x02200220, 0x02200222, 0x02210021, 0x02210121, 0x02220020, 0x02220022, 0x02220220, 0x02220222, 0x00201101, 0x00211100, 0x00211102, 0x00211201, 0x00221101, 0x01201100, 0x01201101, 0x01201102, 0x01201201, 0x01211002, 0x01211101, 0x01211200, 0x01211202, 0x01221102, 0x02201101, 0x02211001, 0x02211100, 0x02211201, 0x02221001, 0x02221101, 0x00201211, 0x00211111, 0x00221011, 0x00221211, 0x01201010, 0x01201111, 0x01201210, 0x01211011, 0x01211110, 0x01211111, 0x01211211, 0x01221012, 0x01221111, 0x01221210, 0x02201211, 0x02211010, 0x02211110, 0x02211111, 0x02211210, 0x02211212, 0x02221011, 0x02221110, 0x02221112, 0x02221211, 0x00201121, 0x00211020, 0x00211022, 0x00211221, 0x00221121, 0x01201021, 0x01201221, 0x01211121, 0x01221020, 0x01221021, 0x01221221, 0x02201120, 0x02201122, 0x02211020, 0x02211222, 0x00202000, 0x00202002, 0x00202200, 0x00202202, 0x00212101, 0x00222000, 0x00222002, 0x00222200, 0x00222202, 0x01202101, 0x01212001, 0x01212100, 0x01222101, 0x02202000, 0x02202002, 0x02202200, 0x02202202, 0x02222000, 0x02222002, 0x02222200, 0x02222202, 0x00202211, 0x00212011, 0x00212110, 0x00212211, 0x00222111, 0x01202112, 0x01202211, 0x01212012, 0x01212111, 0x01222011, 0x01222110, 0x01222112, 0x01222211, 0x02202111, 0x02212010, 0x02212112, 0x02212211, 0x02222110, 0x02222111, 0x00202020, 0x00202022, 0x00202220, 0x00202222, 0x00222020, 0x00222022, 0x00222220, 0x00222222, 0x01202121, 0x01212021, 0x01212122, 0x01212221, 0x01222121, 0x02202020, 0x02202022, 0x02202220, 0x02202222, 0x02212121, 0x02222020, 0x02222022, 0x02222220, 0x02222222, 0x10000101, 0x10010001, 0x10010102, 0x10020101, 0x11000201, 0x11010002, 0x11010101, 0x11010200, 0x11010202, 0x11020001, 0x11020100, 0x11020102, 0x12010100, 0x12010201, 0x12020001, 0x12020102, 0x10000010, 0x10000011, 0x10000110, 0x10000112, 0x10000211, 0x10010012, 0x10010111, 0x10010112, 0x10010210, 0x10010212, 0x10020011, 0x10020112, 0x10020211, 0x11000111, 0x11000210, 0x11000212, 0x11010011, 0x11010110, 0x11010111, 0x11010112, 0x11010211, 0x11010212, 0x11020111, 0x11020210, 0x11020212, 0x12000011, 0x12000110, 0x12000112, 0x12010010, 0x12010012, 0x12010111, 0x12020010, 0x12020011, 0x12020012, 0x10000121, 0x10010021, 0x10010120, 0x10010122, 0x10020121, 0x11000021, 0x11010022, 0x11010121, 0x11010222, 0x11020120, 0x11020221, 0x12000221, 0x12010120, 0x12020121, 0x10001001, 0x10011101, 0x10011201, 0x10021201, 0x11001101, 0x11001200, 0x11001202, 0x11011001, 0x11011100, 0x11011101, 0x11011102, 0x11021001, 0x11021002, 0x11021101, 0x11021200, 0x11021202, 0x12001001, 0x12001102, 0x12001201, 0x12011000, 0x12011002, 0x12011101, 0x12021000, 0x12021001, 0x12021201, 0x10001011, 0x10001012, 0x10001111, 0x10001212, 0x10011011, 0x10011110, 0x10011111, 0x10011112, 0x10011211, 0x10021010, 0x10021111, 0x10021212, 0x11001011, 0x11001110, 0x11001111, 0x11001112, 0x11001211, 0x11011010, 0x11011011, 0x11011110, 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0x20121211, 0x20121212, 0x21101011, 0x21101110, 0x21101111, 0x21101112, 0x21101211, 0x21111010, 0x21111011, 0x21111012, 0x21111110, 0x21111111, 0x21111112, 0x21111210, 0x21111211, 0x21111212, 0x21121011, 0x21121110, 0x21121111, 0x21121112, 0x21121211, 0x22101011, 0x22101111, 0x22101210, 0x22111011, 0x22111012, 0x22111110, 0x22111111, 0x22111112, 0x22111211, 0x22111212, 0x22121010, 0x22121012, 0x22121111, 0x22121210, 0x22121212, 0x20101021, 0x20101120, 0x20111020, 0x20111121, 0x20111221, 0x20121020, 0x20121122, 0x20121221, 0x21101121, 0x21101220, 0x21101221, 0x21111021, 0x21111022, 0x21111121, 0x21111122, 0x21111221, 0x21121121, 0x21121220, 0x22101022, 0x22101120, 0x22101221, 0x22101222, 0x22111022, 0x22111120, 0x22111121, 0x22121120, 0x22121122, 0x22121221, 0x20102101, 0x20112102, 0x20112201, 0x20122101, 0x21102001, 0x21102102, 0x21112000, 0x21112002, 0x21112101, 0x21112102, 0x21112202, 0x21122100, 0x21122101, 0x22102101, 0x22112001, 0x22112102, 0x22112201, 0x22122101, 0x20102110, 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0x21210212, 0x21220011, 0x21220110, 0x22200111, 0x22210010, 0x22210012, 0x22210112, 0x22210211, 0x20200022, 0x20200220, 0x20200222, 0x20210020, 0x20210221, 0x20220022, 0x20220220, 0x20220222, 0x21200121, 0x21210021, 0x21210122, 0x21210221, 0x21220121, 0x22200020, 0x22200022, 0x22200220, 0x22200222, 0x22210121, 0x22220020, 0x22220022, 0x22220220, 0x22220222, 0x20211201, 0x20221101, 0x21201001, 0x21201100, 0x21211000, 0x21211100, 0x21211101, 0x21211200, 0x21211202, 0x21221001, 0x21221101, 0x21221102, 0x21221200, 0x21221201, 0x22201101, 0x20201112, 0x20201211, 0x20211010, 0x20211012, 0x20211111, 0x20211210, 0x20221112, 0x20221211, 0x21201012, 0x21201111, 0x21211011, 0x21211110, 0x21211111, 0x21211112, 0x21211211, 0x21221111, 0x21221212, 0x22201011, 0x22201110, 0x22201111, 0x22201112, 0x22201211, 0x22211012, 0x22211111, 0x22211210, 0x20201121, 0x20211021, 0x20211122, 0x20211222, 0x20221021, 0x20221121, 0x21201120, 0x21201122, 0x21201222, 0x21211022, 0x21211121, 0x21211122, 0x21211220, 0x21221020, 0x21221022, 0x22201122, 0x22211020, 0x22211121, 0x22211122, 0x22211221, 0x22221021, 0x22221120, 0x22221122, 0x20202000, 0x20202002, 0x20202200, 0x20202202, 0x20222000, 0x20222002, 0x20222200, 0x20222202, 0x21212001, 0x21212100, 0x21212102, 0x21212201, 0x22202000, 0x22202002, 0x22202200, 0x22202202, 0x22212101, 0x22222000, 0x22222002, 0x22222200, 0x22222202, 0x20202111, 0x20212110, 0x20212211, 0x20222011, 0x20222111, 0x21202011, 0x21212010, 0x21212111, 0x21212212, 0x21222011, 0x21222112, 0x21222211, 0x22212010, 0x22212112, 0x20202020, 0x20202022, 0x20202220, 0x20202222, 0x20222020, 0x20222022, 0x20222220, 0x20222222, 0x21212021, 0x21212120, 0x21212122, 0x22202020, 0x22202022, 0x22202220, 0x22202222, 0x22212121, 0x22222020, 0x22222022, 0x22222220, 0x22222222});'
+    ConstantFlag:    ''
+    ConstantOffset:  0
+    InitStr:         ''
+    NewHostVarName:  ''
+    BlockLevelFormatFlag: false
+MainSourceFilesDigest:
+  - MainSourceFile:  ''
+    Digest:          ''
+    HasCUDASyntax:   false
+DpctVersion:     2025.3.0
+SDKVersionMajor: '12'
+SDKVersionMinor: '8'
+MainHelperFileName: ''
+USMLevel:        ''
+FeatureMap:      {}
+CompileTargets:  {}
+OptionMap:
+  AnalysisScopePath:
+    Value:           ''
+    ValueVec:
+      - '/work/Strata_B70'
+    Specified:       false
+  AsyncHandler:
+    Value:           'true'
+    Specified:       true
+  BuildScript:
+    Value:           '0'
+    Specified:       false
+  CodePinEnabled:
+    Value:           'false'
+    Specified:       false
+  CommentsEnabled:
+    Value:           'false'
+    Specified:       false
+  CompilationsDir:
+    Value:           '/work/Strata_B70'
+    Specified:       true
+  CtadEnabled:
+    Value:           'true'
+    Specified:       true
+  EnablepProfiling:
+    Value:           'false'
+    Specified:       false
+  ExperimentalFlag:
+    Value:           '47966'
+    Specified:       true
+  ExplicitNamespace:
+    Value:           '20'
+    Specified:       false
+  ExtensionDDFlag:
+    Value:           '0'
+    Specified:       false
+  ExtensionDEFlag:
+    Value:           '4294967295'
+    Specified:       false
+  HelperFuncPreferenceFlag:
+    Value:           '0'
+    Specified:       false
+  NDRangeDim:
+    Value:           '3'
+    Specified:       true
+  NoDRYPattern:
+    Value:           'false'
+    Specified:       false
+  OptimizeMigration:
+    Value:           'true'
+    Specified:       true
+  ProcessAll:
+    Value:           'false'
+    Specified:       false
+  RuleFile:
+    Value:           ''
+    Specified:       false
+  SyclNamedLambda:
+    Value:           'true'
+    Specified:       true
+  UseSYCLCompat:
+    Value:           'false'
+    Specified:       false
+  UsmLevel:
+    Value:           '1'
+    Specified:       false
+...
diff --git a/sycl/tools/Dockerfile b/sycl/tools/Dockerfile
new file mode 100644
index 00000000000..397a88405e6
--- /dev/null
+++ b/sycl/tools/Dockerfile
@@ -0,0 +1,9 @@
+# Strata SYCL port - development image for the Intel Arc path.
+# Base: the llama.cpp SYCL image already on the box (oneAPI 2026.1 compiler, MKL, Level Zero for Xe2).
+# Adds SYCLomatic (dpct, "Intel DPC++ Compatibility Tool") for the CUDA -> SYCL migration, and the build tools.
+FROM ghcr.io/snailium/llama.cpp-sycl-intel-b70/llama-sycl-b70:stable
+RUN apt-get update -qq && DEBIAN_FRONTEND=noninteractive apt-get install -y -qq --no-install-recommends \
+      intel-oneapi-dpcpp-ct ninja-build unzip python3-pip python3-venv rsync \
+    && rm -rf /var/lib/apt/lists/*
+ENV ONEAPI_DEVICE_SELECTOR=level_zero:0 SYCL_CACHE_PERSISTENT=0 ZES_ENABLE_SYSMAN=1
+ENTRYPOINT ["/bin/bash", "-lc"]
diff --git a/sycl/tools/build.sh b/sycl/tools/build.sh
new file mode 100644
index 00000000000..5afd559fd66
--- /dev/null
+++ b/sycl/tools/build.sh
@@ -0,0 +1,12 @@
+#!/usr/bin/env bash
+# Configure + build the SYCL port inside strata-sycl-dev.  sycl/build.sh [target...]
+set -uo pipefail
+source /opt/intel/oneapi/setvars.sh >/dev/null 2>&1 || true
+repo=${REPO:-/work/Strata_B70}
+b=$repo/build-sycl
+[ -f $b/build.ninja ] || cmake -S $repo/sycl -B $b -G Ninja -DCMAKE_C_COMPILER=icx -DCMAKE_CXX_COMPILER=icpx \
+    -DSTRATA_SYCL_AOT="${AOT:-}" 2>&1 | tail -15
+cmake --build $b -j ${JOBS:-12} "$@" -- -k 0 2>&1 | tee $b/build.log | grep -E '^FAILED|error:|^ninja: build stopped|Linking|^\[[0-9]+/[0-9]+\] Linking' | tail -40
+echo "BUILD EXIT ${PIPESTATUS[0]}"
+grep -c 'error:' $b/build.log | sed 's/^/errors: /'
+grep -E '^FAILED' $b/build.log | sed 's#.*/##' | sort | uniq | head -60
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
new file mode 100644
index 00000000000..6b09af3aed2
--- /dev/null
+++ b/sycl/tools/fixups.py
@@ -0,0 +1,172 @@
+#!/usr/bin/env python3
+"""Hand fixes on top of the SYCLomatic output (sycl/migrate.sh). Idempotent: re-run after a re-migration.
+
+Each entry is a thing dpct 2025.3 got wrong or could not do, with the reason. Upstream files are never touched.
+"""
+import re, sys, pathlib
+root = pathlib.Path(__file__).resolve().parents[1]
+changed = 0
+
+def edit(rel, fn):
+    global changed
+    p = root / rel
+    if not p.exists():
+        print("  (absent)", rel); return
+    s = p.read_text(); t = fn(s)
+    if t != s:
+        p.write_text(t); changed += 1; print("  fixed", rel)
+
+def sub(pattern, repl, flags=0):
+    return lambda s: re.sub(pattern, repl, s, flags=flags)
+
+def all_sources():
+    return [p.relative_to(root) for p in (root / "src").rglob("*.cpp")]
+
+# 1. dpct's helper headers predate the 2026.1 compiler: the non-uniform group API was renamed.
+edit("include/dpct/util.hpp", lambda s: s.replace("experimental::get_tangle_group(", "experimental::entangle(")
+     .replace("experimental::get_fixed_size_group<", "experimental::chunked_partition<"))
+
+for rel in all_sources():
+    rel = str(rel)
+    # 2. `(dpct::queue_ptr)stream->memcpy(...)`: the cast binds to the member call result, not the pointer.
+    edit(rel, sub(r"\(dpct::queue_ptr\)\s*(\w+)\s*->", r"((dpct::queue_ptr)\1)->"))
+    # 3. cudaStreamSynchronize(x) came out as `(cudaStream_t)x->wait()`; a null stream is the default queue.
+    edit(rel, sub(r"\(cudaStream_t\)0->wait\(\)", "dpct::get_in_order_queue().wait()"))
+    edit(rel, sub(r"\(cudaStream_t\)(\w+)->wait\(\)", r"((dpct::queue_ptr)\1)->wait()"))
+    edit(rel, sub(r"DPCT_CHECK_ERROR\((main_cs|token_stream)->wait\(\)\)", r"DPCT_CHECK_ERROR(((dpct::queue_ptr)\1)->wait())"))
+    # a null stream: the default in-order queue
+    edit(rel, lambda s: s.replace("(nullptr)->ext_oneapi_graph(", "dpct::get_in_order_queue().ext_oneapi_graph("))
+    # cudaGraphUpload has no SYCL counterpart (an executable command_graph is ready when finalized).
+    edit(rel, sub(r"const dpct::err0 ue = cudaGraphUpload\(\w+(\[\w+\])?, \w+\);", "const dpct::err0 ue = 0;   // no cudaGraphUpload on SYCL: a finalized command_graph is already resident"))
+    edit(rel, sub(r"^(\s*)cudaGraphUpload\(\w+, \w+\);", r"\1// no cudaGraphUpload on SYCL: a finalized command_graph is already resident", re.M))
+    # __fadd_rn / __float_as_uint spellings
+    for _ in range(3):   # nested __fadd_rn(__fadd_rn(a, b), c)
+        edit(rel, sub(r"__fadd_rn\((\([^()]*\)|[^,()]+),\s*([^()]+)\)", r"(\1 + \2)"))
+    edit(rel, lambda s: s.replace("__float_as_uint(", "sycl::bit_cast<uint32_t>("))
+    # 4. volatile casts on kernel arguments (the kernels take plain pointers).
+    edit(rel, lambda s: s.replace("(const volatile sycl::float4 *)", "(const sycl::float4 *)"))
+    # 5. CUDA math intrinsics with no SYCL spelling.
+    edit(rel, lambda s: s.replace("__isnanf(", "sycl::isnan(").replace("__isinff(", "sycl::isinf("))
+    # 6. __nanosleep inside a doorbell spin: spin without the nap.
+    edit(rel, sub(r"__nanosleep\(\d+\);", "/* spin (no __nanosleep on SYCL) */;"))
+    # 7. `__fadd_rn(a, b ? c : d)` lost its parentheses.
+    edit(rel, sub(r"= (\w+) \+ (\w+) \? (\w+\[\w+\]) : 0\.0f;", r"= \1 + (\2 ? \3 : 0.0f);"))
+
+# 2b. every `(dpct::queue_ptr) stream` cast goes through strata::q_of(), which maps CUDA's null stream to the
+#     default in-order queue instead of dereferencing a null sycl::queue* (include/strata/sycl_queue.hpp).
+def q_of(s):
+    t = re.sub(r"\(\(sycl::queue \*\)\(\(dpct::queue_ptr\)\s*(\w+)\)\)", r"strata::q_of(\1)", s)
+    t = re.sub(r"(?<!\w)\(\(dpct::queue_ptr\)\s*(\w+)\)", r"strata::q_of(\1)", t)   # not a call's own paren
+    t = re.sub(r"\(dpct::queue_ptr\)\s*((?:\w+(?:->|\.))*\w+)\b", r"strata::q_of(\1)", t)
+    t = re.sub(r"static_cast<dpct::queue_ptr>\((\w+)\)", r"strata::q_of(\1)", t)
+    if t != s and '#include "strata/sycl_queue.hpp"' not in t:
+        t = t.replace("#include <dpct/dpct.hpp>\n", '#include <dpct/dpct.hpp>\n#include "strata/sycl_queue.hpp"\n', 1)
+    return t
+for rel in all_sources():
+    edit(str(rel), q_of)
+
+# 7b. `__ldg((const float*) p)` lost its cast: dpct rewrote it as `*p`, reading one byte of the scale.
+edit("src/kernels/cuda/s_gemv.dp.cpp", lambda s: s.replace("const float d = *blk;", "const float d = *(const float*) blk;")
+     .replace("Q8K ? *xb", "Q8K ? *(const float*) xb"))
+
+# 8. ggml-common.h has a SYCL declaration mode (sycl::half instead of cuda_fp16.h).
+edit("src/kernels/cuda/iq_kernels.dp.cpp", lambda s: s.replace("#define GGML_COMMON_DECL_CUDA", "#define GGML_COMMON_DECL_SYCL")
+     .replace("#define GGML_COMMON_IMPL_CUDA", "#define GGML_COMMON_IMPL_SYCL"))
+
+# 8b. with the SYCL declaration mode the ggml tables are plain arrays, not dpct::global_memory objects.
+edit("src/kernels/cuda/iq_kernels.dp.cpp", sub(r"\b(\w+)\.get_ptr\(\)", r"\1"))
+
+edit("src/kernels/cuda/iq_kernels.dp.cpp", sub(r"^\s*\w+\.init\([^;]*\);\n", "", re.M))
+#     ...and the kernels receive them as const pointers (dpct declared the parameters non-const).
+TABLES = r"(iq2xxs_grid|iq2xs_grid|iq2s_grid|iq3xxs_grid|iq3s_grid|iq1s_grid_gpu|kmask_iq2xs|ksigns_iq2xs|ksigns64|kvalues_iq4nl)"
+edit("src/kernels/cuda/iq_kernels.dp.cpp", sub(r"(?<!const )\b(uint64_t|uint32_t|uint8_t|int8_t) \*" + TABLES + r"\b", r"const \1 *\2"))
+# 8c. one nested __fadd_rn the generic rewrite above does not reach
+edit("src/kernels/cuda/native_qsa_score.dp.cpp", lambda s: s.replace(
+    "float sum=__fadd_rn(((h[0] + h[1]) + h[2]),h[3]);", "float sum=(((h[0] + h[1]) + h[2]) + h[3]);"))
+
+# 8d. dpct threaded every ggml table through kernel parameters, one name per template regardless of which table
+#     that quant type needs. With plain `static const` arrays (usable from device code, as ggml-sycl does) the
+#     device functions read the globals directly: drop the parameters, the arguments and the capture copies.
+def untangle_tables(s):
+    s = re.sub(r"^\s*auto \w+_ptr_ct\d+ = \w+;\n", "", s, flags=re.M)
+    s = re.sub(r",\s*const (uint64_t|uint32_t|uint8_t|int8_t) \*" + TABLES + r"\b", "", s)
+    s = re.sub(r"\(\s*const (uint64_t|uint32_t|uint8_t|int8_t) \*" + TABLES + r"\s*\)", "()", s)
+    s = re.sub(r",\s*" + TABLES + r"(_ptr_ct\d+)?\b(?![\[\w(])", "", s)
+    s = re.sub(r"\(\s*" + TABLES + r"(_ptr_ct\d+)?\s*\)(?![\[\w])", "()", s)
+    return s
+edit("src/kernels/cuda/iq_kernels.dp.cpp", untangle_tables)
+#     the one helper that took the table under another name keeps its parameter; the callers name the table
+edit("src/kernels/cuda/iq_kernels.dp.cpp", lambda s: s.replace("get_int_from_table_16(aux_q4);", "get_int_from_table_16(aux_q4, kvalues_iq4nl);"))
+
+# 9. a ternary on the stream argument of cudaMemcpyAsync was migrated around the wrong operand.
+edit("src/program/generate.cpp", lambda s: s.replace(
+    "gs ? gs->adapt_stream\n                           : adapt_stream->memcpy(",
+    "(gs ? gs->adapt_stream : adapt_stream)->memcpy("))
+
+# 10. %globaltimer: there is no device-side wall clock in SPIR-V; the verify-window stage profiler reads zeros.
+edit("src/kernels/cuda/verify_kernels.dp.cpp", lambda s: s.replace(
+    'asm volatile("mov.u64 %0, %%globaltimer;" : "=l"(t));',
+    "t = 0;   // SYCL: no %globaltimer equivalent; the stage profiler is inert on this backend"))
+
+# 11. The three tensor-core kernels (inline PTX: mma.sync, ldmatrix, cp.async). dpct cannot migrate assembly.
+#     dpct.hpp defines DPCT_COMPATIBILITY_TEMP as 900, which selects the sm_80 path; select the other one, and
+#     make the launchers that have no in-kernel fallback refuse the device (their callers then use the older
+#     kernels, exactly as on a pre-Ampere card). The XMX joint_matrix versions are phase-4 follow-up work.
+OFF = "#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py"
+ON = "#if 1   // SYCL: the scalar path (the PTX one above is not ported yet)"
+for rel in ["src/kernels/cuda/qsa_prompt_attn.dp.cpp", "src/kernels/cuda/qsa_select.dp.cpp",
+            "src/kernels/cuda/native_qsa_score.dp.cpp"]:
+    edit(rel, lambda s: s.replace("#if !defined(DPCT_COMPATIBILITY_TEMP) || DPCT_COMPATIBILITY_TEMP >= 800", OFF)
+         .replace("#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP < 800", ON)
+         .replace("    __trap();", "    /* unreachable on SYCL: the launcher refuses this device */"))
+for rel in ["src/kernels/cuda/qsa_prompt_attn.dp.cpp", "src/kernels/cuda/qsa_select.dp.cpp"]:
+    edit(rel, lambda s: s.replace("        if (cc_major[dev] < 8) return false;",
+         "        (void) cc_major[dev];\n        return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel"))
+
+# 12. IQ4_XS: dpct turned the __constant__ table into a kernel argument and gave that trait a 3-argument load(),
+#     which the shared multi-column kernel cannot call. A constexpr copy of the table restores the 2-argument form.
+def mmvq(s):
+    if "kIq4nlTable" in s: return s   # already applied (the table is the marker)
+    m = re.search(r"iq4nl_values\(sycl::range\(16\), \{([^}]*)\}", s, re.S)
+    vals = " ".join(m.group(1).split())
+    table = "static constexpr int8_t kIq4nlTable[16] = {%s};\n" % vals
+    s = s.replace("__dpct_inline__ sycl::int2 iq4_table_lookup(", table + "__dpct_inline__ sycl::int2 iq4_table_lookup(", 1)
+    s = s.replace("    static float apply(const W &r, const Q81Block *__restrict__ x, int k,\n                       int8_t *iq4nl_values) {",
+                  "    static float apply(const W &r, const Q81Block *__restrict__ x, int k) { return apply(r, x, k, const_cast<int8_t*>(kIq4nlTable)); }\n"
+                  "    static float apply(const W &r, const Q81Block *__restrict__ x, int k,\n                       int8_t *iq4nl_values) {", 1)
+    s = s.replace("    static W load(const Block* __restrict__ w, int iqs, int8_t *iq4nl_values) {",
+                  "    static W load(const Block* __restrict__ w, int iqs) { return load(w, iqs, const_cast<int8_t*>(kIq4nlTable)); }\n"
+                  "    static W load(const Block* __restrict__ w, int iqs, int8_t *iq4nl_values) {", 1)
+    return s
+edit("src/kernels/cuda/native_mmvq.dp.cpp", mmvq)
+
+# 13. sycl::free takes void*; the parity harness frees const device pointers.
+edit("src/kernels/qsa_prompt_attn_parity.cpp", sub(r"sycl::free\(([\w.]+),", r"sycl::free((void *)\1,"))
+
+# 14. verify.cpp: graph introspection (kernel names, a debug print) has no SYCL API; the node count stays.
+def verify(s):
+    a = s.find("            if (ty == sycl::ext::oneapi::experimental::node_type::kernel) {")
+    b = s.find("            } else if (ty == sycl::ext::oneapi::experimental::node_type::memcpy)")
+    if a > 0 and b > a:
+        s = s[:a] + "            if (ty == sycl::ext::oneapi::experimental::node_type::kernel) {\n                name = \"kernel\";   // SYCL: no kernel-name introspection on graph nodes\n" + s[b:]
+    # cudaLaunchHostFunc(stream, fn, &fs): the flag set lives in a ring on the verifier, so a pointer to it is safe
+    s = s.replace("""  v->copy_->submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() {
+      [](void *p) {
+        FlagSet *s = (FlagSet *)p; raise_flag(s->flag, s->value);
+      }(&fs);
+    });
+  });""", """  FlagSet* fsp = &fs;
+  v->copy_->submit([&](sycl::handler &cgh) {
+    cgh.host_task([=]() { raise_flag(fsp->flag, fsp->value); });
+  });""")
+    return s
+edit("src/core/verify.cpp", verify)
+# 15. cudaInitDevice(spin-wait scheduling, mapped host memory): device flags with no SYCL equivalent.
+edit("src/core/remote_experts.cpp", lambda s: s.replace(
+    "    if (!(spin && spin[0] == '0'))\n        cudaInitDevice(device, cudaDeviceScheduleSpin | cudaDeviceMapHost, 0);",
+    "    (void) spin;   // SYCL: no cudaInitDevice scheduling flags; the runtime picks its own wait policy"))
+# 16. graph.hpp: the event's timestamp is written from a const launch(); dpct added the member without `mutable`.
+edit("include/strata/core/graph.hpp", lambda s: s.replace(
+    "    std::chrono::time_point<std::chrono::steady_clock> done__ct1;", "    mutable std::chrono::time_point<std::chrono::steady_clock> done__ct1;"))
+print("files changed:", changed)
diff --git a/sycl/tools/get-cuda-headers.sh b/sycl/tools/get-cuda-headers.sh
new file mode 100755
index 00000000000..65d6e7fdf98
--- /dev/null
+++ b/sycl/tools/get-cuda-headers.sh
@@ -0,0 +1,28 @@
+#!/usr/bin/env bash
+# SYCLomatic needs CUDA SDK headers to parse the sources (no GPU, no toolkit). The pip wheels carry them.
+set -euo pipefail
+out=${1:-$PWD/cuda-headers}      # mount this at /cuda-headers in the dev image
+py=${PYTHON:-python3}          # needs pip
+mkdir -p "$out/wheels" "$out/include"
+$py -m pip download -q --no-deps -d "$out/wheels" \
+  nvidia-cuda-runtime-cu12==12.8.90 nvidia-cuda-nvcc-cu12==12.8.93 nvidia-cublas-cu12==12.8.4.1 nvidia-cuda-cccl-cu12==12.8.90 nvidia-curand-cu12==10.3.9.90
+for w in "$out"/wheels/*.whl; do
+  $py - "$w" "$out/include" <<'PY'
+import sys, zipfile, os
+w, dst = sys.argv[1], sys.argv[2]
+z = zipfile.ZipFile(w)
+n = 0
+for m in z.namelist():
+    if "/include/" in m and not m.endswith("/"):
+        rel = m.split("/include/", 1)[1]
+        p = os.path.join(dst, rel)
+        os.makedirs(os.path.dirname(p), exist_ok=True)
+        with open(p, "wb") as f: f.write(z.read(m))
+        n += 1
+print(os.path.basename(w), n, "headers")
+PY
+done
+ls "$out/include" | head -50
+for h in cuda.h cuda_runtime.h cuda_runtime_api.h crt/host_defines.h cuda_fp16.h cuda_bf16.h cublas_v2.h; do
+  [ -f "$out/include/$h" ] && echo "ok   $h" || echo "MISS $h"; done
+grep -m1 CUDA_VERSION "$out/include/cuda.h" || true
diff --git a/sycl/tools/migrate.sh b/sycl/tools/migrate.sh
new file mode 100755
index 00000000000..6be754d8524
--- /dev/null
+++ b/sycl/tools/migrate.sh
@@ -0,0 +1,45 @@
+#!/usr/bin/env bash
+# CUDA -> SYCL migration of the Strata engine with SYCLomatic (dpct), run inside strata-sycl-dev.
+#   sycl/migrate.sh [repo] [out]      repo defaults to the Strata_B70 checkout beside this dir
+# Writes a compilation database first (there is no nvcc here, so CMake cannot make one), then migrates every
+# CUDA-touching source into <out> mirroring the tree. Files dpct leaves alone are not copied - the port's
+# CMake falls back to the original for those, so the diff against upstream stays the port itself.
+set -euo pipefail
+repo=${1:-/work/Strata_B70}
+out=${2:-$repo/sycl}
+hdr=${CUDA_HEADERS:-/cuda-headers/include}
+source /opt/intel/oneapi/setvars.sh >/dev/null 2>&1 || true
+export PATH=/opt/intel/oneapi/dpcpp-ct/latest/bin:$PATH
+cd "$repo"
+# the compilation database: every .cu plus every .cpp/.hpp that includes a CUDA header
+python3 - "$repo" "$hdr" <<'PY'
+import json, os, re, sys, subprocess
+repo, hdr = sys.argv[1], sys.argv[2]
+files = subprocess.check_output(["bash", "-c",
+    r"find src -name '*.cu'; grep -rl 'cuda_runtime\|cublas_v2\|cuda_fp16\|cuda\.h' src --include='*.cpp'"],
+    cwd=repo, text=True).split()
+db = []
+# not in this tree: the optional ggml MMQ prefill path needs llama.cpp's ggml-cuda sources, and one parity test needs
+# ggml-cpu.h. Both stay CUDA-only for now.
+skip = {"src/prefill/moe_mmq.cu", "src/prefill/ggml_cuda_host.cu", "src/kernels/native_expert_parity.cpp"}
+for f in sorted(set(files) - skip):
+    tool = "nvcc" if f.endswith(".cu") else "g++"
+    cmd = [tool, "-std=c++20", "-Iinclude", "-Ithird_party/ggml", "-I" + hdr, "-DSTRATA_VERSION=\"port\""]
+    if tool == "nvcc": cmd += ["--cuda-gpu-arch=sm_80", "-x", "cuda"]
+    cmd += ["-c", f, "-o", f + ".o"]
+    db.append({"directory": repo, "file": os.path.join(repo, f), "arguments": cmd})
+json.dump(db, open(os.path.join(repo, "compile_commands.json"), "w"), indent=1)
+print(len(db), "translation units")
+PY
+mkdir -p "$out"
+# --use-experimental-features: graph (cudaGraph -> sycl_ext_oneapi_graph), matrix (mma -> joint_matrix)
+# --gen-helper-function: copy the dpct helper headers next to the output so the port builds without the tool
+dpct -p "$repo" --in-root="$repo" --out-root="$out" \
+     --cuda-include-path="$hdr" \
+     --use-experimental-features=graph,matrix,logical-group,masked-sub-group-operation,occupancy-calculation,free-function-queries,local-memory-kernel-scope-allocation,bindless_images,virtual_mem,root-group,non-uniform-groups \
+     --gen-helper-function --always-use-async-handler --sycl-named-lambda \
+     --enable-ctad --optimize-migration --assume-nd-range-dim=3 \
+     --report-type=all --report-file-prefix=dpct_report --report-format=csv \
+     --stop-on-parse-err=false ${DPCT_EXTRA:-} 2>&1 | tee "$out/../sycl-migrate.log" | tail -40
+echo "MIGRATE EXIT ${PIPESTATUS[0]}"
+find "$out" -type f | wc -l

From 35b58f94e9ae8db03a8269eba16220762f63e436 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 17:40:54 -0500
Subject: [PATCH 009/201] sycl: first light - the SYCL engine generates correct
 text on the Arc Pro B70

--stream-experts (GgufExpertSource): every expert goes straight from the GGUF into the VRAM cache through a
small ring of staging buffers; no resident host arena, so the engine runs on a 23 GiB machine.

What it took to get from "loads" to "<think>\nThe user wants a Python function":
- the doorbell handshake through host-mapped memory: volatile device loads do not bypass the caches on
  Intel; system-scope atomics (strata::sys_load/sys_store) do. A device-side spin is bounded (kSpinMax): an
  unbounded one wedged the GT twice when its process died.
- STRATA_VERIFY_NO_HOST=1 + STRATA_VERIFY_DEVICE_PLAN=1: with every expert resident the GPU plans each
  layer itself and the host waits for the whole window graph; per-layer ring visibility inside a graph is
  not reliable on this platform (measured with sycl/probe).
- -fsycl-default-sub-group-size=32: the kernels are written for 32-lane warps; dpct pinned only 134 of 289.
- cudaMemcpy is synchronous; dpct's default-queue memcpy had no wait, and the streaming ring reuses its
  buffers - the expert cache filled from overwritten memory (non-deterministic residuals, NaN by layer 5).
- native_expert_parity hand-ported (dpct cannot parse it without ggml-cpu.h): the GPU native expert
  kernel matches the float reference on real IQ1_M rows.
- verify.cpp debug readbacks (STRATA_VERIFY_DEBUG): the per-layer residual ladder that found all of it.

Not yet: speed (0.17 tok/s - the spin budgets), the segfault at exit, the tensor-core kernels.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/CMakeLists.txt                           | 12 ++-
 .../strata/core/gguf_expert_source.hpp        | 52 +++++++++++
 sycl/include/strata/core/verify.hpp           |  2 +
 sycl/include/strata/sycl_doorbell.hpp         | 29 ++++++
 sycl/src/core/concurrent_main.cpp             |  4 +-
 sycl/src/core/expert_cache.cpp                |  4 +-
 sycl/src/core/gguf_expert_source.cpp          | 88 +++++++++++++++++++
 sycl/src/core/mtp.cpp                         |  6 +-
 sycl/src/core/overlap_main.cpp                |  6 +-
 sycl/src/core/verify.cpp                      | 74 +++++++++++++++-
 sycl/src/core/weights.cpp                     |  2 +-
 sycl/src/kernels/bf16_gemv_parity.cpp         |  6 +-
 sycl/src/kernels/cuda/cvec.dp.cpp             |  4 +-
 sycl/src/kernels/cuda/elementwise.dp.cpp      |  9 +-
 sycl/src/kernels/cuda/qsa.dp.cpp              |  2 +-
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   | 11 +--
 sycl/src/kernels/cvec_parity.cpp              |  2 +-
 sycl/src/kernels/dequant_bf16_test.cpp        |  2 +-
 sycl/src/kernels/dequant_s2_parity.cpp        |  4 +-
 sycl/src/kernels/elementwise_parity.cpp       | 16 ++--
 sycl/src/kernels/gdn_parity.cpp               | 32 +++----
 sycl/src/kernels/gr_parity.cpp                | 38 ++++----
 sycl/src/kernels/iq_parity.cpp                |  4 +-
 sycl/src/kernels/kv_q4_parity.cpp             | 14 +--
 sycl/src/kernels/kv_q8_parity.cpp             | 12 +--
 sycl/src/kernels/kv_stream_parity.cpp         | 18 ++--
 sycl/src/kernels/native_expert_parity.cpp     | 51 ++++++-----
 sycl/src/kernels/ple_parity.cpp               | 34 +++----
 sycl/src/kernels/qsa_parity.cpp               |  2 +-
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |  2 +-
 sycl/src/kernels/qsa_select_bench.cpp         |  2 +-
 sycl/src/kernels/quantize_act_parity.cpp      |  4 +-
 sycl/src/kernels/rope_parity.cpp              | 10 +--
 sycl/src/kernels/router_top10_parity.cpp      |  2 +-
 sycl/src/kernels/s2_gemv_parity.cpp           |  6 +-
 sycl/src/kernels/s2_gemv_q8_parity.cpp        |  8 +-
 sycl/src/kernels/s_gemv_parity.cpp            | 20 ++---
 sycl/src/kernels/s_gemv_q8k_parity.cpp        | 10 +--
 sycl/src/kernels/sampler_parity.cpp           |  8 +-
 sycl/src/kernels/shared_expert_parity.cpp     | 40 ++++-----
 sycl/src/prefill/prefill.cpp                  |  2 +-
 sycl/src/program/generate.cpp                 | 43 ++++++---
 sycl/tools/build.sh                           |  2 +-
 sycl/tools/fixups.py                          | 49 +++++++++++
 44 files changed, 536 insertions(+), 212 deletions(-)
 create mode 100644 sycl/include/strata/core/gguf_expert_source.hpp
 create mode 100644 sycl/include/strata/sycl_doorbell.hpp
 create mode 100644 sycl/src/core/gguf_expert_source.cpp

diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 01698a51d43..eda1ff0d486 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -36,6 +36,9 @@ list(APPEND _sycl_link "-Xsycl-target-backend=spir64" "-cl-fp32-correctly-rounde
 # Every translation unit gets -fsycl: the migrated host files construct queues and USM, not only the kernels.
 # icpx defaults to a fast floating-point model (reciprocal approximations, reassociation); the kernels are
 # compared byte-for-byte against ggml's, which nvcc built value-safe, so ask for the same here.
+# Every kernel was written for 32-lane warps (lane = tid & 31, warp-synchronous reductions). dpct pins the
+# sub-group size only where it saw a shuffle; the rest would get Xe2's default of 16 and race. Force 32 everywhere.
+list(APPEND _sycl_flags -fsycl-default-sub-group-size=32)
 add_compile_options("$<$<COMPILE_LANGUAGE:CXX>:${_sycl_flags}>" -fp-model=precise -Wno-unused-parameter
                     -Wno-unused-variable -Wno-deprecated-declarations)
 add_link_options(${_sycl_link})
@@ -141,7 +144,7 @@ target_link_libraries(strata_kernels PUBLIC strata_core)
 strata_resolve(_engine src/core/layer.cpp src/core/session.cpp src/core/expert_source.cpp src/core/remote_experts.cpp
                        src/core/expert_cache.cpp src/core/native_head.cpp src/core/native_dense.cpp src/core/verify.cpp
                        src/core/mtp.cpp)
-add_library(strata_engine STATIC ${_engine})
+add_library(strata_engine STATIC ${_engine} ${CMAKE_CURRENT_SOURCE_DIR}/src/core/gguf_expert_source.cpp)
 target_link_libraries(strata_engine PUBLIC strata_core strata_kernels strata_kernels_cpu)
 
 # cuBLAS -> oneMKL through dpct::blas (needs the MKL SYCL BLAS domain)
@@ -172,4 +175,11 @@ if(STRATA_SYCL_PARITY)
   strata_resolve(_src src/kernels/qsa_prompt_attn_parity.cpp)
   add_executable(qsa_prompt_attn_parity ${_src})
   target_link_libraries(qsa_prompt_attn_parity PRIVATE strata_kernels)
+  # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
+  #   native_expert_parity <shard1.gguf> [layer ...]
+  if(STRATA_NATIVE_EXPERTS)
+    add_executable(native_expert_parity ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/native_expert_parity.cpp)
+    target_include_directories(native_expert_parity PRIVATE ${STRATA_ROOT}/third_party/ggml)
+    target_link_libraries(native_expert_parity PRIVATE strata_kernels strata_kernels_cpu)
+  endif()
 endif()
diff --git a/sycl/include/strata/core/gguf_expert_source.hpp b/sycl/include/strata/core/gguf_expert_source.hpp
new file mode 100644
index 00000000000..a08a0a21b25
--- /dev/null
+++ b/sycl/include/strata/core/gguf_expert_source.hpp
@@ -0,0 +1,52 @@
+// include/strata/core/gguf_expert_source.hpp - the SYCL port: experts read from the GGUF on demand, no host arena.
+//
+// **WHY.** `ArenaExpertSource` keeps every expert as a resident host copy (R2.1): 23.4 GiB for the Coder, which
+// the CPU pool computes misses from. On a card that holds every expert (12,288 slots on a 32 GB Arc) nothing is
+// ever computed from that copy after the fill, and on a 23 GiB machine the copy cannot exist at all. This source
+// gathers one blob at a time straight from the model's shard - the same three tensor slices the arena loader
+// concatenates - into a small ring of staging buffers. The pointer is valid until the ring wraps, which is the
+// `ExpertSource` contract ("until the next `blob()` call") with slack.
+//
+// It is slow per blob (three reads, ~2.7 MB) and that is fine: the profile fill reads each expert once at start,
+// the prefill's lent slots are refilled a few hundred at a time, and with every expert resident the pool never
+// asks. `pinned()` is false and `device_alias()` null, so nothing tries to DMA from it.
+#pragma once
+
+#include "strata/core/expert_source.hpp"
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+namespace strata::core {
+
+class GgufExpertSource : public ExpertSource {
+public:
+    GgufExpertSource() = default;
+    ~GgufExpertSource() override;
+    GgufExpertSource(const GgufExpertSource&) = delete;
+    GgufExpertSource& operator=(const GgufExpertSource&) = delete;
+
+    /// Needs `expert_layout()` loaded from a native pack (`native_experts.txt` with the tensor offsets) and the
+    /// `--native` shard. Refuses a canonical pack: that one has experts.bin and the arena is the right source.
+    bool open(const std::string& shard1, int64_t n_layers, int64_t n_expert, std::string& err);
+    void close();
+
+    const uint8_t* blob(int64_t layer, int64_t expert) override;
+    int64_t reads() const override { return reads_; }
+
+private:
+    int fd_of(int64_t layer, std::string& err);
+
+    std::string shard_;
+    std::string dir_;
+    std::vector<int> fds_;              ///< per distinct file name, opened once
+    std::vector<std::string> names_;
+    std::vector<int> layer_fd_;         ///< per layer: index into fds_
+    std::vector<std::vector<uint8_t>> ring_;
+    size_t ring_next_ = 0;
+    int64_t n_layers_ = 0, n_expert_ = 0;
+    int64_t reads_ = 0;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index f6f7835c771..dd90e57cfce 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -174,6 +174,8 @@ class Verifier {
     int32_t last_tokens_[8] = {};
     int64_t n_vocab_ = 0;
     dpct::queue_ptr cs_ = &dpct::get_in_order_queue();
+    float* dbgR_ = nullptr;   ///< SYCL port debug: R (token 0) after every layer, n_layers x n_embd
+    float* dbgM_ = nullptr;   ///< SYCL port debug: mixed_ (token 0) after every layer
     dpct::experimental::command_graph_exec_ptr exec_[9] = {};
     dpct::experimental::command_graph_exec_ptr commit_exec_ = nullptr;
 
diff --git a/sycl/include/strata/sycl_doorbell.hpp b/sycl/include/strata/sycl_doorbell.hpp
new file mode 100644
index 00000000000..1ba27301bb0
--- /dev/null
+++ b/sycl/include/strata/sycl_doorbell.hpp
@@ -0,0 +1,29 @@
+// include/strata/sycl_doorbell.hpp - the SYCL port: host<->device flag traffic that must bypass the GPU's caches.
+//
+// Strata's decode loop is a handshake through host-mapped memory: the GPU rings a sequence number the host polls,
+// and a one-thread kernel spins on a flag the host writes. In CUDA those are `volatile` loads and stores, which
+// nvcc turns into cache-bypassing accesses. A `volatile` in SYCL device code carries no such meaning on Intel
+// GPUs: the spin read its first value from L3 forever (measured: the GPU at 100% and the host seeing no ring).
+// Atomic loads and stores with system scope are the accesses that go to memory, so every side of the handshake
+// goes through these two.
+#pragma once
+#include <sycl/sycl.hpp>
+#include <cstdint>
+
+namespace strata {
+using sys_atomic_u32 = sycl::atomic_ref<uint32_t, sycl::memory_order::relaxed, sycl::memory_scope::system>;
+
+inline uint32_t sys_load(const volatile uint32_t* p) {
+    return sys_atomic_u32(*const_cast<uint32_t*>(p)).load();
+}
+inline void sys_store(volatile uint32_t* p, uint32_t v) {
+    sys_atomic_u32(*const_cast<uint32_t*>(p)).store(v);
+    sycl::atomic_fence(sycl::memory_order::release, sycl::memory_scope::system);
+}
+
+// Every device spin is bounded. An unbounded spin that never sees its flag is not a hang of one process: the
+// xe driver times the queue out, resets the GT node by node (a window graph has 2,366 of them), and the card
+// stays wedged until a reboot - measured twice. With a bound the failure is a wrong window instead, which the
+// verifier's checks catch. ~2 M host-memory reads is a few seconds at PCIe latency.
+inline constexpr uint32_t kSpinMax = 2u * 1000u * 1000u;
+}  // namespace strata
diff --git a/sycl/src/core/concurrent_main.cpp b/sycl/src/core/concurrent_main.cpp
index 845615e545f..599e98be187 100644
--- a/sycl/src/core/concurrent_main.cpp
+++ b/sycl/src/core/concurrent_main.cpp
@@ -117,7 +117,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+              d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
     DPCT1114:923: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -126,7 +126,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, hs.data(), hs.size() * sizeof(float))),
+              d_scales, hs.data(), hs.size() * sizeof(float)).wait()),
           "copy scales");
     dpct::queue_ptr s_copy{}, s_comp{};
     check(DPCT_CHECK_ERROR(s_copy =
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
index c6a4ca9f474..752bebab2e4 100644
--- a/sycl/src/core/expert_cache.cpp
+++ b/sycl/src/core/expert_cache.cpp
@@ -316,7 +316,7 @@ bool ExpertCache::fill_slot_blocking(int32_t slot, const uint8_t *host_blob,
     synchronization behavior.
     */
     const dpct::err0 e =
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n));
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n).wait());
     /*
     DPCT1000:767: Error handling if-stmt was detected but could not be
     rewritten.
@@ -359,7 +359,7 @@ bool ExpertCache::fill_slot_queued(int32_t slot, const uint8_t *host_blob,
     ensure synchronization behavior.
     */
     const dpct::err0 e =
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n));
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n).wait());
     /*
     DPCT1000:771: Error handling if-stmt was detected but could not be
     rewritten.
diff --git a/sycl/src/core/gguf_expert_source.cpp b/sycl/src/core/gguf_expert_source.cpp
new file mode 100644
index 00000000000..ae059587441
--- /dev/null
+++ b/sycl/src/core/gguf_expert_source.cpp
@@ -0,0 +1,88 @@
+// src/core/gguf_expert_source.cpp - see the header. Plain C++, no device code.
+#include "strata/core/gguf_expert_source.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+
+#include <cstring>
+#include <fcntl.h>
+#include <unistd.h>
+
+namespace strata::core {
+
+namespace {
+constexpr size_t kRing = 8;   // blobs alive at once: the fill holds one, verify_slot a second; the rest is slack
+}
+
+GgufExpertSource::~GgufExpertSource() { close(); }
+
+void GgufExpertSource::close() {
+    for (int fd : fds_) if (fd >= 0) ::close(fd);
+    fds_.clear(); names_.clear(); layer_fd_.clear(); ring_.clear();
+    ring_next_ = 0;
+}
+
+bool GgufExpertSource::open(const std::string& shard1, int64_t n_layers, int64_t n_expert, std::string& err) {
+    close();
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    if (!lay.native || lay.gguf_off.size() < (size_t) (3 * n_layers)) {
+        err = "--stream-experts needs a native (IQ) pack whose native_experts.txt carries the GGUF tensor offsets";
+        return false;
+    }
+    for (int64_t l = 0; l < n_layers; ++l)
+        for (int r = 0; r < 3; ++r)
+            if (lay.gguf_off[(size_t) (3 * l + r)] == 0) {
+                err = "--stream-experts: layer " + std::to_string(l) + " has no GGUF offset for its experts";
+                return false;
+            }
+    shard_ = shard1;
+    const size_t cut = shard1.find_last_of("/\\");
+    dir_ = cut == std::string::npos ? std::string() : shard1.substr(0, cut + 1);
+    n_layers_ = n_layers;
+    n_expert_ = n_expert;
+    layer_fd_.assign((size_t) n_layers, -1);
+    for (int64_t l = 0; l < n_layers; ++l)
+        if (fd_of(l, err) < 0) { close(); return false; }
+    ring_.resize(kRing);
+    for (auto& b : ring_) b.resize((size_t) lay.max_blob);
+    return true;
+}
+
+int GgufExpertSource::fd_of(int64_t layer, std::string& err) {
+    if (layer_fd_[(size_t) layer] >= 0) return fds_[(size_t) layer_fd_[(size_t) layer]];
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    std::string name = shard_;
+    if (!lay.gguf_file.empty() && !lay.gguf_file[(size_t) layer].empty()) name = dir_ + lay.gguf_file[(size_t) layer];
+    for (size_t i = 0; i < names_.size(); ++i)
+        if (names_[i] == name) { layer_fd_[(size_t) layer] = (int) i; return fds_[i]; }
+    const int fd = ::open(name.c_str(), O_RDONLY | O_CLOEXEC);
+    if (fd < 0) { err = "--stream-experts: cannot open " + name; return -1; }
+    names_.push_back(name);
+    fds_.push_back(fd);
+    layer_fd_[(size_t) layer] = (int) fds_.size() - 1;
+    return fd;
+}
+
+const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
+    if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_ || ring_.empty()) return nullptr;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const auto& fm = lay.fmt[(size_t) layer];
+    const uint64_t blob = lay.bytes[(size_t) layer];
+    // the arena loader's gather, for one expert: [gate | up | down] from the three tensors
+    const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
+    const uint64_t at[3] = {0, fm.up_off, fm.down_off};
+    const int fd = fds_[(size_t) layer_fd_[(size_t) layer]];
+    std::vector<uint8_t>& buf = ring_[ring_next_];
+    ring_next_ = (ring_next_ + 1) % ring_.size();
+    for (int r = 0; r < 3; ++r) {
+        const uint64_t src = lay.gguf_off[(size_t) (3 * layer + r)] + per[r] * (uint64_t) expert;
+        uint64_t done = 0;
+        while (done < per[r]) {
+            const ssize_t n = ::pread(fd, buf.data() + at[r] + done, (size_t) (per[r] - done), (off_t) (src + done));
+            if (n <= 0) return nullptr;
+            done += (uint64_t) n;
+        }
+    }
+    ++reads_;
+    return buf.data();
+}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index 8c90e6c30c1..ec52da5b032 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -212,7 +212,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         memory is not pageable, call wait() on event return by memcpy API to
         ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(dense_, blob.data(), blob.size());
+        dpct::get_in_order_queue().memcpy(dense_, blob.data(), blob.size()).wait();
         vram_ += blob.size();
     }
     // ---- the 512 routed experts, one blob each
@@ -342,7 +342,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         memory is not pageable, call wait() on event return by memcpy API to
         ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(ident_, id.data(), id.size() * 4);
+        dpct::get_in_order_queue().memcpy(ident_, id.data(), id.size() * 4).wait();
     }
     /*
     DPCT1025:16: The SYCL queue is created ignoring the flag and priority
@@ -981,7 +981,7 @@ bool MtpDrafter::draft_first(int T, const float *R_row, int32_t token,
     for (int t = 0; t < T; ++t)
         if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                 (void *)(window_R_ + (size_t)t * HCN), R_row,
-                (size_t)HCN * sizeof(float))) != 0) {
+                (size_t)HCN * sizeof(float)).wait()) != 0) {
             err = "mtp: staging the first residual failed";
             return false;
         }
diff --git a/sycl/src/core/overlap_main.cpp b/sycl/src/core/overlap_main.cpp
index c49f1a6592d..3297a2e5f2e 100644
--- a/sycl/src/core/overlap_main.cpp
+++ b/sycl/src/core/overlap_main.cpp
@@ -110,7 +110,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+              d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
     DPCT1114:658: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -119,7 +119,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, hs.data(), hs.size() * sizeof(float))),
+              d_scales, hs.data(), hs.size() * sizeof(float)).wait()),
           "copy scales");
 
     dpct::queue_ptr s_copy{}, s_comp{};
@@ -149,7 +149,7 @@ int main(int argc, char** argv) {
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                   d_codes[0], arena.data() + (uint64_t)i * role_codes,
-                  role_codes)),
+                  role_codes).wait()),
               "serial copy");
         strata::kernels::s_gemv_split_async(
             d_x, d_codes[0], d_scales, nullptr, d_y, n_in, n_out, form,
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 05b753ed9db..8d3856a9d26 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -354,6 +354,10 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
         */
         if (!ok2) {; device_plan_ = false; }
     }
+    if (std::getenv("STRATA_VERIFY_DEBUG") != nullptr) {   // SYCL port: the per-layer residual ladder (token 0)
+        dbgR_ = (float*) sycl::malloc_device((size_t) g.n_layers * g.n_embd * 4, dpct::get_in_order_queue());
+        dbgM_ = (float*) sycl::malloc_device((size_t) g.n_layers * g.n_embd * 4, dpct::get_in_order_queue());
+    }
     std::fprintf(stderr, "strata verify: window up to %d tokens, %.1f MiB of device buffers\n", max_t,
                  (double) count.used / 1048576.0);
     return true;
@@ -813,6 +817,10 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
     for (int64_t l = lb_; l < le_; ++l)
         for (int grp = 0; grp < G; ++grp) {
             if (!post(l, grp)) return false;
+            if (dbgR_ && grp == 0) {   // recorded into the window graph as memcpy nodes
+                cs->memcpy(dbgR_ + (size_t) l * N, Rt(0), (size_t) N * 4);
+                cs->memcpy(dbgM_ + (size_t) l * N, mixed_, (size_t) N * 4);
+            }
             if (l + 1 < le_ && !pre(l + 1, grp)) return false;
         }
     if (le_ < g.n_layers) {   // a layer split's earlier stage: hand the residual on, no head
@@ -1133,7 +1141,13 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     volatile uint32_t* const flag = h_flag_;
     const int G = groups_[T] > 0 ? groups_[T] : 1;
     const int gtb[2] = {0, (T + 1) / 2}, gte[2] = {G == 2 ? (T + 1) / 2 : T, T};
-    for (int64_t k = 0; k < (le_ - lb_) * G; ++k) {
+    // SYCL port: with every routed expert resident the GPU takes its own plan (`device_plan_`) and skips every
+    // host flag, so the host has nothing to do per layer - and on this platform a kernel's writes to host-mapped
+    // memory are not reliably visible while the graph runs (measured: the ring is seen late or not at all),
+    // so waiting on them per layer fails. STRATA_VERIFY_NO_HOST=1 waits for the whole window instead. Only for
+    // an all-resident cache: a missed expert would leave the GPU waiting for a plan that never comes.
+    static const bool no_host = std::getenv("STRATA_VERIFY_NO_HOST") != nullptr;
+    for (int64_t k = 0; !no_host && k < (le_ - lb_) * G; ++k) {
         const int64_t l = lb_ + k / G;
         const int grp = (int) (k % G);
         const uint32_t want = (uint32_t) (k + 1);
@@ -1211,6 +1225,64 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
         err = std::string("verify: ") + dpct::get_error_string_dummy(se);
         return false;
     }
+    if (no_host && std::getenv("STRATA_VERIFY_DEBUG") != nullptr) {   // SYCL port: what the window left behind
+        const int Gd = groups_[T] > 0 ? groups_[T] : 1;
+        std::vector<uint32_t> sk((size_t) Gd, 0);
+        std::vector<int32_t> id0((size_t) ss.k, 0);
+        std::vector<int32_t> res0((size_t) 16, 0);
+        cs_->memcpy(sk.data(), skip_, sk.size() * 4).wait();
+        cs_->memcpy(id0.data(), ids_, id0.size() * 4).wait();
+        cs_->memcpy(res0.data(), hits_.d_res, res0.size() * 4).wait();
+        std::fprintf(stderr, "verify dbg: window T=%d: host seq=%u (expected %lld), skip[]=", T, *(volatile uint32_t*) h_seq_,
+                     (long long) ((le_ - lb_) * Gd));
+        for (int i = 0; i < Gd; ++i) std::fprintf(stderr, " %u", sk[(size_t) i]);
+        std::vector<float> w0((size_t) ss.k, 0.f);
+        cs_->memcpy(w0.data(), w_, w0.size() * 4).wait();
+        std::fprintf(stderr, "; layer-0 weights:");
+        for (size_t i = 0; i < w0.size(); ++i) std::fprintf(stderr, " %.3g", w0[i]);
+        std::fprintf(stderr, "; layer-0 ids:");
+        for (size_t i = 0; i < id0.size(); ++i) std::fprintf(stderr, " %d", id0[i]);
+        std::fprintf(stderr, "; d_res[0..15]:");
+        for (size_t i = 0; i < res0.size(); ++i) std::fprintf(stderr, " %d", res0[i]);
+        std::fprintf(stderr, "; out[0..3]: %d %d %d %d\n", ((volatile int32_t*) h_out_)[0], ((volatile int32_t*) h_out_)[1],
+                     ((volatile int32_t*) h_out_)[2], ((volatile int32_t*) h_out_)[3]);
+        auto stat = [&](const char* what, const float* dev, size_t n) {   // token 0's vector: where do the zeros begin?
+            std::vector<float> v(n, 0.f);
+            cs_->memcpy(v.data(), dev, n * 4).wait();
+            double sum = 0, mx = 0; size_t nonfinite = 0;
+            for (float x : v) { if (!std::isfinite(x)) { ++nonfinite; continue; } sum += std::fabs(x); mx = std::max(mx, (double) std::fabs(x)); }
+            std::fprintf(stderr, "verify dbg:   %-8s n=%zu mean|.|=%.4g max|.|=%.4g nonfinite=%zu first4=%g %g %g %g\n", what, n,
+                         sum / (double) n, mx, nonfinite, v[0], v[1], v[2], v[3]);
+        };
+        if (dbgR_) {
+            const size_t N = (size_t) g.n_embd;
+            std::vector<float> r((size_t) g.n_layers * N), m((size_t) g.n_layers * N);
+            cs_->memcpy(r.data(), dbgR_, r.size() * 4).wait();
+            cs_->memcpy(m.data(), dbgM_, m.size() * 4).wait();
+            for (int64_t l = 0; l < g.n_layers; ++l) {
+                double sr = 0, sm = 0; size_t nr = 0, nm = 0;
+                for (size_t i = 0; i < N; ++i) {
+                    const float x = r[(size_t) l * N + i], y = m[(size_t) l * N + i];
+                    if (std::isfinite(x)) sr += std::fabs(x); else ++nr;
+                    if (std::isfinite(y)) sm += std::fabs(y); else ++nm;
+                }
+                std::fprintf(stderr, "verify dbg:   layer %2lld %s  R mean|.|=%.4g nonfinite=%zu   mixed mean|.|=%.4g nonfinite=%zu\n",
+                             (long long) l, is_qsa_layer(g, l) ? "QSA" : "GDN", sr / N, nr, sm / N, nm);
+            }
+        }
+        {   // the device plan of the last layer group and the MoE parts it produced (token 0)
+            std::vector<int32_t> pc(4, 0);
+            cs_->memcpy(pc.data(), plan_, 16).wait();
+            std::fprintf(stderr, "verify dbg:   plan (last layer, grp 0): groups=%d entries=%d pcie=%d\n", pc[0], pc[1], pc[2]);
+        }
+        stat("parts_", parts_, (size_t) ss.k * g.n_embd);
+        stat("hit_out_", hit_out_, (size_t) ss.k * g.n_embd);
+        stat("shared_", shared_, (size_t) g.n_embd);
+        stat("emb_", emb_, (size_t) g.n_embd);
+        stat("ple_", ple_, (size_t) g.n_embd);
+        stat("R_", R_, (size_t) g.n_embd);
+        stat("mixed_", mixed_, (size_t) g.n_embd);
+    }
     progress_at("verify window: waiting for the expert copies", (int64_t) T);
     copy_->wait(); // no host function of this window may raise flag B in the
                    // next one
diff --git a/sycl/src/core/weights.cpp b/sycl/src/core/weights.cpp
index 3ab7f2feed0..e4119797b49 100644
--- a/sycl/src/core/weights.cpp
+++ b/sycl/src/core/weights.cpp
@@ -437,7 +437,7 @@ bool WeightTable::load(const std::string &pack_dir, void *arena_base,
                 event return by memcpy API to ensure synchronization behavior.
                 */
                 if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                        dst_base + r.dst_off + out_at, host_src, out_bytes)) !=
+                        dst_base + r.dst_off + out_at, host_src, out_bytes).wait()) !=
                     0) {
                     err = "cudaMemcpy failed for " + r.name;
                     sycl::free(stage_in, dpct::get_in_order_queue());
diff --git a/sycl/src/kernels/bf16_gemv_parity.cpp b/sycl/src/kernels/bf16_gemv_parity.cpp
index b01f3bed228..18c579345d0 100644
--- a/sycl/src/kernels/bf16_gemv_parity.cpp
+++ b/sycl/src/kernels/bf16_gemv_parity.cpp
@@ -109,7 +109,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
-                                                                 x.size() * 2)),
+                                                                 x.size() * 2).wait()),
               "cx");
         /*
         DPCT1114:1142: cudaMemcpy is migrated to asynchronization memcpy,
@@ -118,7 +118,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
-                                                                 w.size() * 2)),
+                                                                 w.size() * 2).wait()),
               "cw");
 
         std::vector<float> naive((size_t) s.n_out), warp((size_t) s.n_out), split((size_t) s.n_out);
@@ -164,7 +164,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                      d_x, x.data(), x.size() * 2)),
+                      d_x, x.data(), x.size() * 2).wait()),
                   "cx2");
             std::vector<float> rival((size_t) s.n_out);
             strata::kernels::bf16_gemv(d_x, d_w, d_y, s.n_in, s.n_out, nullptr);
diff --git a/sycl/src/kernels/cuda/cvec.dp.cpp b/sycl/src/kernels/cuda/cvec.dp.cpp
index 346f0e78fd4..246fe5ca3b5 100644
--- a/sycl/src/kernels/cuda/cvec.dp.cpp
+++ b/sycl/src/kernels/cuda/cvec.dp.cpp
@@ -50,7 +50,7 @@ bool upload_here(std::string &err) try {
         to ensure synchronization behavior.
         */
         DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            t.dir, g_dir_host.data(), g_dir_host.size() * sizeof(float))) !=
+            t.dir, g_dir_host.data(), g_dir_host.size() * sizeof(float)).wait()) !=
             0 ||
         /*
         DPCT1114:508: cudaMemcpy is migrated to asynchronization memcpy,
@@ -59,7 +59,7 @@ bool upload_here(std::string &err) try {
         to ensure synchronization behavior.
         */
         DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            t.s, g_s_host.data(), g_s_host.size() * sizeof(float))) != 0 ||
+            t.s, g_s_host.data(), g_s_host.size() * sizeof(float)).wait()) != 0 ||
         DPCT_CHECK_ERROR(dpct::get_in_order_queue()
                              .memcpy(t.on, &flag, sizeof(int))
                              .wait()) != 0) {
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
index 6cc4f490173..377de2cbf5e 100644
--- a/sycl/src/kernels/cuda/elementwise.dp.cpp
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -3,6 +3,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/sycl_doorbell.hpp"
 #include "strata/kernels/elementwise.hpp"
 
 #include "strata/kernels/bf16_bits.hpp"
@@ -369,18 +370,18 @@ __dpct_inline__ void doorbell_ring_kernel(uint32_t *seq) {
     are needed.
     */
     sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
-    *seq = *seq + 1u;
+    strata::sys_store(seq, strata::sys_load(seq) + 1u);
 }
 
 __dpct_inline__ void doorbell_wait_kernel(const volatile uint32_t *flag,
                                           const volatile uint32_t *seq) {
-    const uint32_t want = *seq;
+    const uint32_t want = strata::sys_load(seq);
     /*
     DPCT1008:1061: __nanosleep function is not defined in SYCL. This is a
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
-    while (*flag != want) /* spin (no __nanosleep on SYCL) */;
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) {}
     /*
     DPCT1078:278: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
@@ -555,7 +556,7 @@ __dpct_inline__ void doorbell_publish_kernel(const float *__restrict__ x,
         */
         sycl::atomic_fence(sycl::memory_order::acq_rel,
                            sycl::memory_scope::system);
-        *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;
+        strata::sys_store(seq, strata::sys_load(seq) + 1u);
     }
 }
 
diff --git a/sycl/src/kernels/cuda/qsa.dp.cpp b/sycl/src/kernels/cuda/qsa.dp.cpp
index 87641aa06ec..767417f3534 100644
--- a/sycl/src/kernels/cuda/qsa.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa.dp.cpp
@@ -805,7 +805,7 @@ void step_upload_raw(const int32_t *h_step) try {
     synchronization behavior.
     */
     if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            d, h_step, qsa_step_bytes())) != 0) {
+            d, h_step, qsa_step_bytes()).wait()) != 0) {
         std::fprintf(stderr, "qsa: step upload: cudaMemcpy failed\n");
         std::exit(1);
     }
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index a71a7eaca0f..bdc70090605 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -6,6 +6,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/sycl_doorbell.hpp"
 #include "strata/kernels/verify_kernels.hpp"
 
 #include <cstdio>
@@ -911,7 +912,7 @@ __dpct_inline__ void wait_flag_ge_kernel(const volatile uint32_t *flag,
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
-    while (*flag < value) /* spin (no __nanosleep on SYCL) */;
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
     /*
     DPCT1078:199: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
@@ -971,18 +972,18 @@ __dpct_inline__ void resident_plan_kernel(
     are needed.
     */
     sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
-    *skip = ring;
+    strata::sys_store(skip, ring);
 }
 __dpct_inline__ void wait_flag_ge_or_kernel(const volatile uint32_t *flag,
                                             uint32_t value,
                                             const volatile uint32_t *skip) {
-    if (*skip == value) return;
+    if (strata::sys_load(skip) == value) return;
     /*
     DPCT1008:884: __nanosleep function is not defined in SYCL. This is a
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
-    while (*flag < value) /* spin (no __nanosleep on SYCL) */;
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
     /*
     DPCT1078:201: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
@@ -995,7 +996,7 @@ __dpct_inline__ void copy_i32_unless_kernel(int32_t *__restrict__ dst,
                                             const uint32_t *skip,
                                             uint32_t value) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    if (*skip == value) return;
+    if (strata::sys_load(skip) == value) return;
 #pragma unroll
     for (int i = item_ct1.get_local_id(2); i < n;
          i += item_ct1.get_local_range(2)) dst[i] = src[i];
diff --git a/sycl/src/kernels/cvec_parity.cpp b/sycl/src/kernels/cvec_parity.cpp
index 856f1d80a7b..239a1a3531f 100644
--- a/sycl/src/kernels/cvec_parity.cpp
+++ b/sycl/src/kernels/cvec_parity.cpp
@@ -45,7 +45,7 @@ behavior.
 */
 void up(T *d, const std::vector<T> &h) {
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d, h.data(), h.size() * sizeof(T))),
+           d, h.data(), h.size() * sizeof(T)).wait()),
        "up");
 }
 template <typename T>
diff --git a/sycl/src/kernels/dequant_bf16_test.cpp b/sycl/src/kernels/dequant_bf16_test.cpp
index a84bc9da3e5..7e100c3150e 100644
--- a/sycl/src/kernels/dequant_bf16_test.cpp
+++ b/sycl/src/kernels/dequant_bf16_test.cpp
@@ -81,7 +81,7 @@ int main(int argc, char** argv) {
             strata::kernels::dequant_bf16(type, d_blocks, 0, rows, cols, d_h, nullptr);
             std::vector<float> gf((size_t) (rows * cols));
             std::vector<uint16_t> gh((size_t) (rows * cols));
-            dpct::get_in_order_queue().memcpy(gf.data(), d_f, gf.size() * 4);
+            dpct::get_in_order_queue().memcpy(gf.data(), d_f, gf.size() * 4).wait();
             dpct::get_in_order_queue()
                 .memcpy(gh.data(), d_h, gh.size() * 2)
                 .wait();
diff --git a/sycl/src/kernels/dequant_s2_parity.cpp b/sycl/src/kernels/dequant_s2_parity.cpp
index b5984e0bb74..a1f6680ea46 100644
--- a/sycl/src/kernels/dequant_s2_parity.cpp
+++ b/sycl/src/kernels/dequant_s2_parity.cpp
@@ -93,7 +93,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_codes, codes.data(), codes.size())),
+              d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
     DPCT1114:371: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -102,7 +102,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, scales.data(), scales.size() * sizeof(float))),
+              d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
 
     strata::kernels::dequant_s2(d_codes, d_scales, d_out, n_blocks);
diff --git a/sycl/src/kernels/elementwise_parity.cpp b/sycl/src/kernels/elementwise_parity.cpp
index 5d61559fffc..dc086e62d9e 100644
--- a/sycl/src/kernels/elementwise_parity.cpp
+++ b/sycl/src/kernels/elementwise_parity.cpp
@@ -114,7 +114,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_a, alpha.data(), n * 4)),
+                  dpct::get_in_order_queue().memcpy(d_a, alpha.data(), n * 4).wait()),
               "ca");
         /*
         DPCT1114:713: cudaMemcpy is migrated to asynchronization memcpy,
@@ -123,7 +123,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_dt, dt.data(), n * 4)),
+                  dpct::get_in_order_queue().memcpy(d_dt, dt.data(), n * 4).wait()),
               "cd");
         /*
         DPCT1114:714: cudaMemcpy is migrated to asynchronization memcpy,
@@ -132,7 +132,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_sa, a.data(), n * 4)),
+                  dpct::get_in_order_queue().memcpy(d_sa, a.data(), n * 4).wait()),
               "cs");
         strata::kernels::gdn_gate(d_a, d_dt, d_sa, d_g, 1, H_V, nullptr);
         std::vector<float> got((size_t) n);
@@ -211,7 +211,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4)),
+                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4).wait()),
               "csx");
         strata::kernels::silu_inplace(d_x, n, nullptr);
         std::vector<float> got((size_t) n);
@@ -248,7 +248,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4)),
+                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4).wait()),
               "cex");
         strata::kernels::scale_inplace(d_x, n, s, nullptr);
         std::vector<float> got((size_t) n);
@@ -344,7 +344,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
-                                                                 x.size() * 4)),
+                                                                 x.size() * 4).wait()),
               "c rmsx");
         /*
         DPCT1114:718: cudaMemcpy is migrated to asynchronization memcpy,
@@ -353,7 +353,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
-                                                                 w.size() * 4)),
+                                                                 w.size() * 4).wait()),
               "c rmsw");
         strata::kernels::rms_norm_weighted(d_x, d_w, rows, cols, eps, nullptr);
         std::vector<float> got((size_t) (rows * cols));
@@ -392,7 +392,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
-                                                                 x.size() * 4)),
+                                                                 x.size() * 4).wait()),
               "c rmsx2");
         strata::kernels::rms_norm_weighted(d_x, nullptr, rows, cols, eps, nullptr);
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
diff --git a/sycl/src/kernels/gdn_parity.cpp b/sycl/src/kernels/gdn_parity.cpp
index 06e15a0ddb5..5df2e2816e4 100644
--- a/sycl/src/kernels/gdn_parity.cpp
+++ b/sycl/src/kernels/gdn_parity.cpp
@@ -189,7 +189,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_st, st_dev.data(), st_dev.size() * 4)),
+                  d_st, st_dev.data(), st_dev.size() * 4).wait()),
               "cst");
         /*
         DPCT1114:487: cudaMemcpy is migrated to asynchronization memcpy,
@@ -198,7 +198,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_q, q.data(),
-                                                                 q.size() * 4)),
+                                                                 q.size() * 4).wait()),
               "cq");
         /*
         DPCT1114:488: cudaMemcpy is migrated to asynchronization memcpy,
@@ -207,7 +207,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_k, k.data(),
-                                                                 k.size() * 4)),
+                                                                 k.size() * 4).wait()),
               "ck");
         /*
         DPCT1114:489: cudaMemcpy is migrated to asynchronization memcpy,
@@ -216,7 +216,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_v, v.data(),
-                                                                 v.size() * 4)),
+                                                                 v.size() * 4).wait()),
               "cv");
         /*
         DPCT1114:490: cudaMemcpy is migrated to asynchronization memcpy,
@@ -225,7 +225,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_g, gate.data(), gate.size() * 4)),
+                  d_g, gate.data(), gate.size() * 4).wait()),
               "cg");
         /*
         DPCT1114:491: cudaMemcpy is migrated to asynchronization memcpy,
@@ -234,7 +234,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_b, beta.data(), beta.size() * 4)),
+                  d_b, beta.data(), beta.size() * 4).wait()),
               "cb");
 
         strata::kernels::GdnShapes sh{S, h_k, h_v};
@@ -281,7 +281,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                      d_st, zero.data(), zero.size() * 4)),
+                      d_st, zero.data(), zero.size() * 4).wait()),
                   "z0");
             /*
             DPCT1114:493: cudaMemcpy is migrated to asynchronization memcpy,
@@ -290,7 +290,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                      d_g, zg.data(), zg.size() * 4)),
+                      d_g, zg.data(), zg.size() * 4).wait()),
                   "z1");
             /*
             DPCT1114:494: cudaMemcpy is migrated to asynchronization memcpy,
@@ -299,7 +299,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                      d_b, zb.data(), zb.size() * 4)),
+                      d_b, zb.data(), zb.size() * 4).wait()),
                   "z2");
             strata::kernels::gdn_step(d_st, d_q, d_k, d_v, d_g, d_b, d_o, sh, nullptr);
             std::vector<float> zz(zero.size());
@@ -402,7 +402,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_cs, cs.data(), cs.size() * 4)),
+                  d_cs, cs.data(), cs.size() * 4).wait()),
               "ccs");
         /*
         DPCT1114:496: cudaMemcpy is migrated to asynchronization memcpy,
@@ -411,7 +411,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
-                                                                 x.size() * 4)),
+                                                                 x.size() * 4).wait()),
               "ccx");
         /*
         DPCT1114:497: cudaMemcpy is migrated to asynchronization memcpy,
@@ -420,7 +420,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_w, kW.data(), kW.size() * 4)),
+                  d_w, kW.data(), kW.size() * 4).wait()),
               "ccw");
         strata::kernels::gdn_conv_step(d_cs, d_x, d_w, d_o, C, dc, nullptr);
         std::vector<float> got((size_t) C), got_cs(cs.size());
@@ -484,7 +484,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
-                                                                 x.size() * 4)),
+                                                                 x.size() * 4).wait()),
               "lcx");
         strata::kernels::gdn_l2_norm(d_x, rows, cols, eps, nullptr);
         std::vector<float> got(x.size());
@@ -535,7 +535,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_o, o.data(),
-                                                                 o.size() * 4)),
+                                                                 o.size() * 4).wait()),
               "nco");
         /*
         DPCT1114:500: cudaMemcpy is migrated to asynchronization memcpy,
@@ -544,7 +544,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_z, z.data(),
-                                                                 z.size() * 4)),
+                                                                 z.size() * 4).wait()),
               "ncz");
         /*
         DPCT1114:501: cudaMemcpy is migrated to asynchronization memcpy,
@@ -553,7 +553,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_sn, sn.data(), sn.size() * 4)),
+                  d_sn, sn.data(), sn.size() * 4).wait()),
               "ncs");
         strata::kernels::gdn_out_norm(d_o, d_z, d_sn, d_y, hv2, S2, eps, nullptr);
         std::vector<float> got(y_ref.size());
diff --git a/sycl/src/kernels/gr_parity.cpp b/sycl/src/kernels/gr_parity.cpp
index 742fdae7182..86f6900c724 100644
--- a/sycl/src/kernels/gr_parity.cpp
+++ b/sycl/src/kernels/gr_parity.cpp
@@ -202,7 +202,7 @@ int scalar_activation_contract() {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_R, ones, sizeof(ones))),
+              dpct::get_in_order_queue().memcpy(d_R, ones, sizeof(ones)).wait()),
           "scalar upload R");
     /*
     DPCT1114:967: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -211,7 +211,7 @@ int scalar_activation_contract() {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_weights, weights,
-                                                             sizeof(weights))),
+                                                             sizeof(weights)).wait()),
           "scalar upload weights");
     dpct::queue_ptr stream;
     /*
@@ -231,7 +231,7 @@ int scalar_activation_contract() {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_norm, gammas, sizeof(gammas))),
+                  d_norm, gammas, sizeof(gammas)).wait()),
               "scalar upload norm");
         float mixed_by_mode[3][2] = {}, inject_by_mode[3] = {};
         for (int mode = 0; mode < 3; ++mode) {
@@ -428,7 +428,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_R, R.data(), R.size() * sizeof(float))),
+              d_R, R.data(), R.size() * sizeof(float)).wait()),
           "c R");
     /*
     DPCT1114:971: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -437,7 +437,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_norm, w_norm.data(), w_norm.size() * sizeof(float))),
+              d_norm, w_norm.data(), w_norm.size() * sizeof(float)).wait()),
           "c norm");
     /*
     DPCT1114:972: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -446,7 +446,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_down, q_down.data(), q_down.size() * sizeof(uint16_t))),
+              d_down, q_down.data(), q_down.size() * sizeof(uint16_t)).wait()),
           "c down");
     /*
     DPCT1114:973: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -455,7 +455,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_up, q_up.data(), q_up.size() * sizeof(uint16_t))),
+              d_up, q_up.data(), q_up.size() * sizeof(uint16_t)).wait()),
           "c up");
     /*
     DPCT1114:974: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -464,7 +464,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_inj, q_inject.data(), q_inject.size() * sizeof(uint16_t))),
+              d_inj, q_inject.data(), q_inject.size() * sizeof(uint16_t)).wait()),
           "c inj");
 
     const strata::kernels::GrShapes sh{n_embd, hc, hc_lr};
@@ -611,7 +611,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_down_bad, tr_down.data(), tr_down.size() * 2)),
+                  d_down_bad, tr_down.data(), tr_down.size() * 2).wait()),
               "cb d");
         /*
         DPCT1114:976: cudaMemcpy is migrated to asynchronization memcpy,
@@ -620,7 +620,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_up_bad, tr_up.data(), tr_up.size() * 2)),
+                  d_up_bad, tr_up.data(), tr_up.size() * 2).wait()),
               "cb u");
         std::vector<float> bad_mixed((size_t) n_embd);
         float* d_bad = nullptr;
@@ -685,7 +685,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_Rw, R.data(), R.size() * sizeof(float))),
+              d_Rw, R.data(), R.size() * sizeof(float)).wait()),
           "c Rw");
     /*
     DPCT1114:978: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -694,7 +694,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_bo, block_out.data(), block_out.size() * sizeof(float))),
+              d_bo, block_out.data(), block_out.size() * sizeof(float)).wait()),
           "c bo");
     /*
     DPCT1114:979: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -703,7 +703,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_zi, zero_inj.data(), zero_inj.size() * sizeof(float))),
+              d_zi, zero_inj.data(), zero_inj.size() * sizeof(float)).wait()),
           "c zi");
 
     strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
@@ -760,7 +760,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_zi, inj.data(), inj.size() * sizeof(float))),
+              d_zi, inj.data(), inj.size() * sizeof(float)).wait()),
           "c inj2");
     strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
@@ -841,7 +841,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  dR, rR.data(), rR.size() * 4)),
+                  dR, rR.data(), rR.size() * 4).wait()),
               "crR");
         /*
         DPCT1114:982: cudaMemcpy is migrated to asynchronization memcpy,
@@ -850,7 +850,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  dN, rnorm.data(), rnorm.size() * 4)),
+                  dN, rnorm.data(), rnorm.size() * 4).wait()),
               "crN");
         /*
         DPCT1114:983: cudaMemcpy is migrated to asynchronization memcpy,
@@ -859,7 +859,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  dD, qd.data(), qd.size() * 2)),
+                  dD, qd.data(), qd.size() * 2).wait()),
               "crD");
         /*
         DPCT1114:984: cudaMemcpy is migrated to asynchronization memcpy,
@@ -868,7 +868,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  dU, qu.data(), qu.size() * 2)),
+                  dU, qu.data(), qu.size() * 2).wait()),
               "crU");
         /*
         DPCT1114:985: cudaMemcpy is migrated to asynchronization memcpy,
@@ -877,7 +877,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  dJ, qi.data(), qi.size() * 2)),
+                  dJ, qi.data(), qi.size() * 2).wait()),
               "crJ");
 
         const strata::kernels::GrShapes rsh{rn, rhc, rlr};
diff --git a/sycl/src/kernels/iq_parity.cpp b/sycl/src/kernels/iq_parity.cpp
index 0f957d55ba5..3311bacb813 100644
--- a/sycl/src/kernels/iq_parity.cpp
+++ b/sycl/src/kernels/iq_parity.cpp
@@ -47,7 +47,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(dw, raw.data(), raw.size());
+        dpct::get_in_order_queue().memcpy(dw, raw.data(), raw.size()).wait();
         double dq_err = 0.0;
         if (strata::kernels::iq_supported(type) && ((size_t) rows * cols) % 256 == 0) {
             strata::kernels::iq_dequant_f32(type, dw, (int64_t) rows * cols, dq, s);
@@ -79,7 +79,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4);
+        dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait();
         strata::kernels::quantize_q8_1_rows(dx, 2, cols, xq, s);
         try {
             strata::kernels::native_mmvq(type, dw, xq, dy, cols, rows, 2, s);
diff --git a/sycl/src/kernels/kv_q4_parity.cpp b/sycl/src/kernels/kv_q4_parity.cpp
index 854f8993393..adb24e7de23 100644
--- a/sycl/src/kernels/kv_q4_parity.cpp
+++ b/sycl/src/kernels/kv_q4_parity.cpp
@@ -122,7 +122,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_src, h_in.data(), h_in.size() * sizeof(float))),
+           d_src, h_in.data(), h_in.size() * sizeof(float)).wait()),
        "memcpy H2D");
 
     k::fwht256_cuda(d_src, d_dst, n_vectors, nullptr);
@@ -219,7 +219,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_table, table.data(), pages * sizeof(int32_t))),
+           d_table, table.data(), pages * sizeof(int32_t)).wait()),
        "memcpy table");
 
     const size_t pool_bytes = (size_t) pages * H * P * k::kv_q4_bytes_per_head(D);
@@ -257,7 +257,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep))),
+               dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep)).wait()),
            "memcpy step");
         /*
         DPCT1114:784: cudaMemcpy is migrated to asynchronization memcpy,
@@ -266,7 +266,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-               d_kcur, kv.data(), kv.size() * sizeof(float))),
+               d_kcur, kv.data(), kv.size() * sizeof(float)).wait()),
            "memcpy k");
         /*
         DPCT1114:785: cudaMemcpy is migrated to asynchronization memcpy,
@@ -275,7 +275,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-               d_vcur, vv.data(), vv.size() * sizeof(float))),
+               d_vcur, vv.data(), vv.size() * sizeof(float)).wait()),
            "memcpy v");
 
         k::kv_append_q4_step(d_k_q4, d_v_q4, d_table, d_step, d_kcur, d_vcur, s, nullptr);
@@ -357,7 +357,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_ids, ids.data(), max_ids * sizeof(int32_t))),
+           d_ids, ids.data(), max_ids * sizeof(int32_t)).wait()),
        "memcpy ids");
 
     int32_t hstep[k::kStepCount] = {0, 0, 0, max_ids};
@@ -368,7 +368,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep))),
+           dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep)).wait()),
        "memcpy step");
 
     k::kv_gather_q4_step(d_k_q4, d_v_q4, d_table, d_ids, d_step, max_ids, s, d_k_scratch, d_v_scratch, nullptr);
diff --git a/sycl/src/kernels/kv_q8_parity.cpp b/sycl/src/kernels/kv_q8_parity.cpp
index 4d6e117777f..7865de8eb7e 100644
--- a/sycl/src/kernels/kv_q8_parity.cpp
+++ b/sycl/src/kernels/kv_q8_parity.cpp
@@ -60,7 +60,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4)),
+           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4).wait()),
        "table");
     int8_t *kq = dalloc<int8_t>((size_t) cells * H * D), *vq = dalloc<int8_t>((size_t) cells * H * D);
     uint16_t *ks = dalloc<uint16_t>((size_t) cells * H * G), *vs = dalloc<uint16_t>((size_t) cells * H * G);
@@ -89,7 +89,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep)),
+               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep).wait()),
            "step");
         /*
         DPCT1114:426: cudaMemcpy is migrated to asynchronization memcpy,
@@ -98,7 +98,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(kcur, kv.data(),
-                                                              kv.size() * 4)),
+                                                              kv.size() * 4).wait()),
            "k");
         /*
         DPCT1114:427: cudaMemcpy is migrated to asynchronization memcpy,
@@ -107,7 +107,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(vcur, vv.data(),
-                                                              vv.size() * 4)),
+                                                              vv.size() * 4).wait()),
            "v");
         k::kv_append_q8_step(kq, vq, ks, vs, d_table, step, kcur, vcur, s, nullptr);
         k::kv_append_step(kp, vp, d_table, step, kcur, vcur, s, nullptr);
@@ -171,7 +171,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_ids, ids.data(), n_ids * 4)),
+               dpct::get_in_order_queue().memcpy(d_ids, ids.data(), n_ids * 4).wait()),
            "ids");
         int32_t hstep[k::kStepCount] = {0, 0, 0, n_ids};
         /*
@@ -181,7 +181,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep)),
+               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep).wait()),
            "step");
         k::kv_gather_q8_step(kq, vq, ks, vs, d_table, d_ids, step, max_ids, s, k8, v8, nullptr);
         k::kv_gather_step(kp, vp, d_table, d_ids, step, max_ids, s, k16, v16, nullptr);
diff --git a/sycl/src/kernels/kv_stream_parity.cpp b/sycl/src/kernels/kv_stream_parity.cpp
index 81c19f08abe..8c178d437c8 100644
--- a/sycl/src/kernels/kv_stream_parity.cpp
+++ b/sycl/src/kernels/kv_stream_parity.cpp
@@ -142,7 +142,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ident, t.data(),
-                                                              n_blocks * 4)),
+                                                              n_blocks * 4).wait()),
            "ident");
     }
     k::KvStreamMap m;
@@ -178,7 +178,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(kc, hk.data(), hk.size() * 4)),
+               dpct::get_in_order_queue().memcpy(kc, hk.data(), hk.size() * 4).wait()),
            "k");
         /*
         DPCT1114:889: cudaMemcpy is migrated to asynchronization memcpy,
@@ -187,7 +187,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(vc, hv.data(), hv.size() * 4)),
+               dpct::get_in_order_queue().memcpy(vc, hv.data(), hv.size() * 4).wait()),
            "v");
         /*
         DPCT1114:890: cudaMemcpy is migrated to asynchronization memcpy,
@@ -196,7 +196,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, st, sizeof(st))),
+               dpct::get_in_order_queue().memcpy(step, st, sizeof(st)).wait()),
            "step");
         append(ref, ident, step, kc, vc, s, fmt, nullptr);
         append(slots, m.page_table, step, kc, vc, s, fmt, &host.p);
@@ -221,7 +221,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
-                                                              hids.size() * 4)),
+                                                              hids.size() * 4).wait()),
            "ids");
         /*
         DPCT1114:892: cudaMemcpy is migrated to asynchronization memcpy,
@@ -230,7 +230,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(steps, hst.data(),
-                                                              hst.size() * 4)),
+                                                              hst.size() * 4).wait()),
            "steps");
         /*
         DPCT1114:893: cudaMemcpy is migrated to asynchronization memcpy,
@@ -239,7 +239,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(q, hq.data(), hq.size() * 4)),
+               dpct::get_in_order_queue().memcpy(q, hq.data(), hq.size() * 4).wait()),
            "q");
         k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, n_q, nullptr);
         k::kv_stream_resolve(m, slots.attn(m.page_table), host.p, fmt, ids, steps, n_q, cap, s, nullptr);
@@ -304,7 +304,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
-                                                              hids.size() * 4)),
+                                                              hids.size() * 4).wait()),
            "ids");
         /*
         DPCT1114:895: cudaMemcpy is migrated to asynchronization memcpy,
@@ -313,7 +313,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(steps, hst.data(), 16)),
+               dpct::get_in_order_queue().memcpy(steps, hst.data(), 16).wait()),
            "steps");
         k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, 1, nullptr);
         k::qsa_decode_attn_batch(q, ring.attn(rt), ids, steps, cap, s, scratch, out_str, 1, nullptr);
diff --git a/sycl/src/kernels/native_expert_parity.cpp b/sycl/src/kernels/native_expert_parity.cpp
index ac6b6f786ee..5552aceb087 100644
--- a/sycl/src/kernels/native_expert_parity.cpp
+++ b/sycl/src/kernels/native_expert_parity.cpp
@@ -5,9 +5,6 @@
 // (a) float reference: ggml's own dequantizer (`to_float`) and a float SwiGLU expert, (b) the CPU path
 // (ggml-cpu vec_dot with its quantized activations), (c) the GPU path (`native_expert_grouped`, q8_1
 // activations).  (b) and (c) each differ from (a) by their activation rounding only (a few 1e-3 relative).
-#define DPCT_PROFILING_ENABLED
-#include <sycl/sycl.hpp>
-#include <dpct/dpct.hpp>
 #include "strata/artifact/gguf_reader.hpp"
 #include "strata/kernels/cpu/native_expert.hpp"
 #include "strata/kernels/cpu/expert.hpp"
@@ -19,6 +16,9 @@
 
 #include "ggml.h"
 
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>   // SYCL port: hand-ported (dpct needs ggml-cpu.h to parse this file)
+
 #include <chrono>
 #include <cmath>
 #include <cstdio>
@@ -45,8 +45,7 @@ int main(int argc, char** argv) {
     const int NT = 3, E = 7;
     const int64_t H = 2560, FF = 640;
     int failures = 0;
-    dpct::queue_ptr s;
-    s = dpct::get_current_device().create_queue(true);
+    sycl::queue* s = &dpct::get_in_order_queue();
     for (int l : layers) {
         const strata::TensorInfo* t[3] = {};
         const char* roles[3] = {"gate", "up", "down"};
@@ -224,31 +223,31 @@ int main(int argc, char** argv) {
             float* dout;
             unsigned long long* dptr;
             int32_t *dstart, *dn, *ddst, *dtok;
-            cudaMalloc(&dblob, blob.size());
-            cudaMalloc(&dx, x.size() * 4);
-            cudaMalloc(&dxq, (size_t) NT * H / 32 * 36);
-            cudaMalloc(&dscr, strata::kernels::native_expert_scratch_bytes(NT, FF));
-            cudaMalloc((void**) &dout, (size_t) NT * H * 4);
-            cudaMalloc((void**) &dptr, 8);
-            cudaMalloc((void**) &dstart, 8);
-            cudaMalloc((void**) &dn, 4);
-            cudaMalloc((void**) &ddst, NT * 4);
-            cudaMalloc((void**) &dtok, NT * 4);
-            cudaMemcpy(dblob, blob.data(), blob.size(), cudaMemcpyHostToDevice);
-            cudaMemcpy(dx, x.data(), x.size() * 4, cudaMemcpyHostToDevice);
+            dblob = (decltype(dblob)) sycl::malloc_device(blob.size(), *s);
+            dx = (decltype(dx)) sycl::malloc_device(x.size() * 4, *s);
+            dxq = (decltype(dxq)) sycl::malloc_device((size_t) NT * H / 32 * 36, *s);
+            dscr = (decltype(dscr)) sycl::malloc_device(strata::kernels::native_expert_scratch_bytes(NT, FF), *s);
+            dout = (decltype(dout)) sycl::malloc_device((size_t) NT * H * 4, *s);
+            dptr = (decltype(dptr)) sycl::malloc_device(8, *s);
+            dstart = (decltype(dstart)) sycl::malloc_device(8, *s);
+            dn = (decltype(dn)) sycl::malloc_device(4, *s);
+            ddst = (decltype(ddst)) sycl::malloc_device(NT * 4, *s);
+            dtok = (decltype(dtok)) sycl::malloc_device(NT * 4, *s);
+            s->memcpy(dblob, blob.data(), blob.size()).wait();
+            s->memcpy(dx, x.data(), x.size() * 4).wait();
             const unsigned long long p = (unsigned long long) dblob;
             const int32_t st[2] = {0, NT}, one = 1, idx[NT] = {0, 1, 2};
-            cudaMemcpy(dptr, &p, 8, cudaMemcpyHostToDevice);
-            cudaMemcpy(dstart, st, 8, cudaMemcpyHostToDevice);
-            cudaMemcpy(dn, &one, 4, cudaMemcpyHostToDevice);
-            cudaMemcpy(ddst, idx, NT * 4, cudaMemcpyHostToDevice);
-            cudaMemcpy(dtok, idx, NT * 4, cudaMemcpyHostToDevice);
+            s->memcpy(dptr, &p, 8).wait();
+            s->memcpy(dstart, st, 8).wait();
+            s->memcpy(dn, &one, 4).wait();
+            s->memcpy(ddst, idx, NT * 4).wait();
+            s->memcpy(dtok, idx, NT * 4).wait();
             strata::kernels::quantize_q8_1_rows((const float*) dx, NT, H, dxq, s);
             strata::kernels::native_expert_grouped(L, dptr, dstart, dn, ddst, dtok, 1, NT, dxq, dscr, dout, s);
-            cudaStreamSynchronize(s);
-            cudaMemcpy(got_g.data(), dout, got_g.size() * 4, cudaMemcpyDeviceToHost);
-            cudaFree(dblob); cudaFree(dx); cudaFree(dxq); cudaFree(dscr); cudaFree(dout); cudaFree(dptr);
-            cudaFree(dstart); cudaFree(dn); cudaFree(ddst); cudaFree(dtok);
+            s->wait();
+            s->memcpy(got_g.data(), dout, got_g.size() * 4).wait();
+            sycl::free(dblob, *s); sycl::free(dx, *s); sycl::free(dxq, *s); sycl::free(dscr, *s); sycl::free(dout, *s); sycl::free(dptr, *s);
+            sycl::free(dstart, *s); sycl::free(dn, *s); sycl::free(ddst, *s); sycl::free(dtok, *s);
         }
         const double ec = rel(got_c, ref), eg = rel(got_g, ref), ecg = rel(got_c, got_g);
         const bool ok = ec < 3e-2 && eg < 3e-2 && std::isfinite(ec) && std::isfinite(eg);
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
index 4f0c3c21a4a..79aede9c19c 100644
--- a/sycl/src/kernels/ple_parity.cpp
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -215,7 +215,7 @@ int history_advance_regression() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           history, expected.data(), count * sizeof(float))),
+           history, expected.data(), count * sizeof(float)).wait()),
        "history initial values");
     dpct::queue_ptr stream;
     dpct::experimental::command_graph_ptr graph;
@@ -770,7 +770,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4)),
+           dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
        "cnk");
     /*
     DPCT1114:948: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -779,7 +779,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4)),
+           dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
        "cnq");
     /*
     DPCT1114:949: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -788,7 +788,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4)),
+           dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
        "cnc");
     /*
     DPCT1114:950: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -797,7 +797,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_kc, key_codes.data(), key_codes.size())),
+           d_kc, key_codes.data(), key_codes.size()).wait()),
        "ckc");
     /*
     DPCT1114:951: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -806,7 +806,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_vb, value_bf16.data(), value_bf16.size() * 2)),
+           d_vb, value_bf16.data(), value_bf16.size() * 2).wait()),
        "cvb");
     /*
     DPCT1114:952: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -815,7 +815,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_c1, conv1d_f16.data(), conv1d_f16.size() * 2)),
+           d_c1, conv1d_f16.data(), conv1d_f16.size() * 2).wait()),
        "cc1");
 
     k::PleWeights w{};
@@ -837,7 +837,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d_ks, key_scales.data(), key_scales.size() * 4)),
+           d_ks, key_scales.data(), key_scales.size() * 4).wait()),
        "cks");
     w.key_scales = d_ks;
 
@@ -867,7 +867,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-               d_emb, cap.emb.data() + (size_t)t * nd, nd * 4)),
+               d_emb, cap.emb.data() + (size_t)t * nd, nd * 4).wait()),
            "cemb");
         /*
         DPCT1114:955: cudaMemcpy is migrated to asynchronization memcpy,
@@ -876,7 +876,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-               d_hid, cap.hidden.data() + (size_t)t * hcd, hcd * 4)),
+               d_hid, cap.hidden.data() + (size_t)t * hcd, hcd * 4).wait()),
            "chid");
         /*
         DPCT1114:956: cudaMemcpy is migrated to asynchronization memcpy,
@@ -885,7 +885,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-               d_hist, hist_state.data(), (size_t)k::NG_HIST * hcd * 4)),
+               d_hist, hist_state.data(), (size_t)k::NG_HIST * hcd * 4).wait()),
            "chist");
         k::PleOut out{};
         out.key = d_ck; out.value = d_cv; out.gate = d_g; out.gated = d_gd;
@@ -1016,7 +1016,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                   d_emb, witness.data(), nd * sizeof(float))),
+                   d_emb, witness.data(), nd * sizeof(float)).wait()),
                "native PLE witness");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
             ck(DPCT_CHECK_ERROR(
@@ -1095,7 +1095,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                   d_emb, cap.emb.data(), nd * sizeof(float))),
+                   d_emb, cap.emb.data(), nd * sizeof(float)).wait()),
                "restore PLE embedding");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
             ck(DPCT_CHECK_ERROR(
@@ -1153,7 +1153,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                   native_data, native_key.data(), native_bytes)),
+                   native_data, native_key.data(), native_bytes).wait()),
                "native PLE weights upload");
             k::PleWeights nw = w;
             nw.key_native_data = native_data; nw.key_native_type = 42; nw.key_native_q8_1 = native_q;
@@ -1209,7 +1209,7 @@ int main(int argc, char** argv) {
                 return by memcpy API to ensure synchronization behavior.
                 */
                 ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                       d_emb, cap.emb.data() + (size_t)p * nd, nd * 4)),
+                       d_emb, cap.emb.data() + (size_t)p * nd, nd * 4).wait()),
                    "native PLE key input");
                 k::native_q2_0_f32(native_data, d_emb, native_q, raw_projection, k::NG_N_EMBD, k::NG_HC_DIM, 1, stream);
                 ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE raw key sync");
@@ -1306,7 +1306,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                   d_emb, cap.emb.data(), nd * 4)),
+                   d_emb, cap.emb.data(), nd * 4).wait()),
                "native PLE restore input");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
             ck(DPCT_CHECK_ERROR(
@@ -1360,7 +1360,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                   d_hid, cap.hidden.data(), hcd * sizeof(float))),
+                   d_hid, cap.hidden.data(), hcd * sizeof(float)).wait()),
                "restore PLE hidden input");
             sycl::free(compact_workspace, dpct::get_in_order_queue());
         }
diff --git a/sycl/src/kernels/qsa_parity.cpp b/sycl/src/kernels/qsa_parity.cpp
index 9203750990b..e4c3df23b15 100644
--- a/sycl/src/kernels/qsa_parity.cpp
+++ b/sycl/src/kernels/qsa_parity.cpp
@@ -98,7 +98,7 @@ struct Dev {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  p, v.data(), v.size() * sizeof(T))),
+                  p, v.data(), v.size() * sizeof(T)).wait()),
               "H2D");
     }
     std::vector<T> get(size_t n) const {
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index c865ca196bb..5746b6c8a4b 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -45,7 +45,7 @@ template <typename T> T* up(const std::vector<T>& h) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d, h.data(), h.size() * sizeof(T))),
+           d, h.data(), h.size() * sizeof(T)).wait()),
        "upload");
     return d;
 }
diff --git a/sycl/src/kernels/qsa_select_bench.cpp b/sycl/src/kernels/qsa_select_bench.cpp
index b73912e4530..6287a804bab 100644
--- a/sycl/src/kernels/qsa_select_bench.cpp
+++ b/sycl/src/kernels/qsa_select_bench.cpp
@@ -38,7 +38,7 @@ template <typename T> T* up(const std::vector<T>& h) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-           d, h.data(), h.size() * sizeof(T))),
+           d, h.data(), h.size() * sizeof(T)).wait()),
        "upload");
     return d;
 }
diff --git a/sycl/src/kernels/quantize_act_parity.cpp b/sycl/src/kernels/quantize_act_parity.cpp
index a4a8222efdd..8f3a15b1791 100644
--- a/sycl/src/kernels/quantize_act_parity.cpp
+++ b/sycl/src/kernels/quantize_act_parity.cpp
@@ -90,7 +90,7 @@ int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), (size_t)n * sizeof(float))),
+              d_x, x.data(), (size_t)n * sizeof(float)).wait()),
           "copy x");
     // PROBE: does the DEVICE hold what the host thinks it sent?  The scale byte differs with the SAME
     // exponent and a zeroed mantissa, which says the kernel's amax differs from the host's on identical
@@ -222,7 +222,7 @@ int run_case_k(const char* name, const std::vector<float>& x, bool check_bytes,
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), (size_t)n * sizeof(float))),
+              d_x, x.data(), (size_t)n * sizeof(float)).wait()),
           "copy x");
     strata::kernels::quantize_q8_K(d_x, d_b, n, nullptr);
     strata::kernels::dequant_q8_K(d_b, d_back, n, nullptr);
diff --git a/sycl/src/kernels/rope_parity.cpp b/sycl/src/kernels/rope_parity.cpp
index c0aea5dd517..0b7e5ad3b2b 100644
--- a/sycl/src/kernels/rope_parity.cpp
+++ b/sycl/src/kernels/rope_parity.cpp
@@ -113,7 +113,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), x.size() * sizeof(float))),
+              d_x, x.data(), x.size() * sizeof(float)).wait()),
           "copy x");
     /*
     DPCT1114:310: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -122,7 +122,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_cos, hcos.data(), hcos.size() * sizeof(float))),
+              d_cos, hcos.data(), hcos.size() * sizeof(float)).wait()),
           "copy cos");
     /*
     DPCT1114:311: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -131,7 +131,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_sin, hsin.data(), hsin.size() * sizeof(float))),
+              d_sin, hsin.data(), hsin.size() * sizeof(float)).wait()),
           "copy sin");
     /*
     DPCT1114:312: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -140,7 +140,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_pos, pos.data(), pos.size() * sizeof(int))),
+              d_pos, pos.data(), pos.size() * sizeof(int)).wait()),
           "copy pos");
     strata::kernels::rope_neox_apply(d_x, d_out, rows, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
     std::vector<float> got(ref.size());
@@ -195,7 +195,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_x, e.data(), e.size() * sizeof(float))),
+                  d_x, e.data(), e.size() * sizeof(float)).wait()),
               "copy e");
         // position 7, NOT position 0: at pos 0 sin is exactly 0, so dim half legitimately does not move and
         // the check would report the correct kernel as wrong.  The first version made exactly that mistake.
diff --git a/sycl/src/kernels/router_top10_parity.cpp b/sycl/src/kernels/router_top10_parity.cpp
index 6fb0113c9b1..f492bd74dfb 100644
--- a/sycl/src/kernels/router_top10_parity.cpp
+++ b/sycl/src/kernels/router_top10_parity.cpp
@@ -85,7 +85,7 @@ int run_case(const char* name, const std::vector<float>& logits, int n_tokens, i
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_l, logits.data(), logits.size() * sizeof(float))),
+              d_l, logits.data(), logits.size() * sizeof(float)).wait()),
           "copy");
     strata::kernels::router_top10(d_l, n_tokens, n_expert, k, d_ids, d_w, nullptr);
     check(DPCT_CHECK_ERROR(
diff --git a/sycl/src/kernels/s2_gemv_parity.cpp b/sycl/src/kernels/s2_gemv_parity.cpp
index 3c2b16377ba..1f4bd0c2530 100644
--- a/sycl/src/kernels/s2_gemv_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_parity.cpp
@@ -131,7 +131,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), x.size() * sizeof(uint16_t))),
+              d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
     DPCT1114:483: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -140,7 +140,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_codes, codes.data(), codes.size())),
+              d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
     DPCT1114:484: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -149,7 +149,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, scales.data(), scales.size() * sizeof(float))),
+              d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
 
     strata::kernels::s2_gemv(d_x, d_codes, d_scales, d_y, n_in, n_out);
diff --git a/sycl/src/kernels/s2_gemv_q8_parity.cpp b/sycl/src/kernels/s2_gemv_q8_parity.cpp
index 66fc2834ad8..53a5b0ad73a 100644
--- a/sycl/src/kernels/s2_gemv_q8_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_q8_parity.cpp
@@ -80,7 +80,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), x.size() * sizeof(float))),
+              d_x, x.data(), x.size() * sizeof(float)).wait()),
           "c x");
     /*
     DPCT1114:932: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -89,7 +89,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_codes, codes.data(), codes.size())),
+              d_codes, codes.data(), codes.size()).wait()),
           "c codes");
     /*
     DPCT1114:933: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -98,7 +98,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, scales.data(), scales.size() * sizeof(float))),
+              d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "c scales");
 
     strata::kernels::quantize_q8_0(d_x, d_act, n_in, nullptr);
@@ -204,7 +204,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_hx, hx.data(), hx.size() * sizeof(uint16_t))),
+              d_hx, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "c hx");
     strata::kernels::SForm form{2, -1, 64, strata::kernels::Codebook::Affine, false};
     strata::kernels::s_gemv_split(d_hx, d_codes, d_scales, nullptr, d_y_fp16, n_in, n_out, form, tpr);
diff --git a/sycl/src/kernels/s_gemv_parity.cpp b/sycl/src/kernels/s_gemv_parity.cpp
index cc0486139ee..9cd4972a01b 100644
--- a/sycl/src/kernels/s_gemv_parity.cpp
+++ b/sycl/src/kernels/s_gemv_parity.cpp
@@ -253,7 +253,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), x.size() * sizeof(uint16_t))),
+              d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
     DPCT1114:394: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -262,7 +262,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_codes, codes.data(), codes.size())),
+              d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
     DPCT1114:395: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -271,7 +271,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, scales.data(), scales.size() * sizeof(float))),
+              d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
     /*
     DPCT1114:396: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -280,7 +280,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_offsets, offsets.data(), offsets.size() * sizeof(float))),
+              d_offsets, offsets.data(), offsets.size() * sizeof(float)).wait()),
           "copy offsets");
     strata::kernels::s_gemv(d_x, d_codes, d_scales, d_offsets, d_y, n_in, n_out, form);
     std::vector<float> got((size_t) n_out);
@@ -373,7 +373,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, x.data(), x.size() * sizeof(uint16_t))),
+              d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "bench copy x");
     /*
     DPCT1114:398: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -382,7 +382,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_codes, codes.data(), codes.size())),
+              d_codes, codes.data(), codes.size()).wait()),
           "bench copy codes");
     /*
     DPCT1114:399: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -391,7 +391,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_scales, scales.data(), scales.size() * sizeof(float))),
+              d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "bench copy scales");
 
     for (int i = 0; i < 3; ++i) strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form);
@@ -670,7 +670,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_x, x.data(), x.size() * sizeof(uint16_t))),
+                  d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
               "copy x");
         /*
         DPCT1114:401: cudaMemcpy is migrated to asynchronization memcpy,
@@ -679,7 +679,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_codes, codes.data(), codes.size())),
+                  d_codes, codes.data(), codes.size()).wait()),
               "copy codes");
         /*
         DPCT1114:402: cudaMemcpy is migrated to asynchronization memcpy,
@@ -688,7 +688,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_scales, scales.data(), scales.size() * sizeof(float))),
+                  d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
               "copy scales");
         strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, tc.form);
         std::vector<float> got((size_t) n_out);
diff --git a/sycl/src/kernels/s_gemv_q8k_parity.cpp b/sycl/src/kernels/s_gemv_q8k_parity.cpp
index 9fecea6c89f..9f572cf90b3 100644
--- a/sycl/src/kernels/s_gemv_q8k_parity.cpp
+++ b/sycl/src/kernels/s_gemv_q8k_parity.cpp
@@ -129,7 +129,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_xf, xf.data(), (size_t)n_in * 4)),
+                  d_xf, xf.data(), (size_t)n_in * 4).wait()),
               "cxf");
         strata::kernels::quantize_q8_K(d_xf, d_xq, n_in, nullptr);
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
@@ -171,7 +171,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_codes, codes.data(), codes.size())),
+                  d_codes, codes.data(), codes.size()).wait()),
               "cc");
         /*
         DPCT1114:849: cudaMemcpy is migrated to asynchronization memcpy,
@@ -180,7 +180,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_scales, scales.data(), scales.size() * 4)),
+                  d_scales, scales.data(), scales.size() * 4).wait()),
               "cs");
         /*
         DPCT1114:850: cudaMemcpy is migrated to asynchronization memcpy,
@@ -189,7 +189,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_offs, offs.data(), offs.size() * 4)),
+                  d_offs, offs.data(), offs.size() * 4).wait()),
               "co");
 
         std::vector<float> naive((size_t) n_out), warp((size_t) n_out);
@@ -286,7 +286,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                      d_x16, x16.data(), (size_t)n_in * 2)),
+                      d_x16, x16.data(), (size_t)n_in * 2).wait()),
                   "cx16");
             std::vector<float> fp16out((size_t) n_out);
             strata::kernels::s_gemv(d_x16, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in, n_out,
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
index 4e0568f1f5f..46e140a5ba7 100644
--- a/sycl/src/kernels/sampler_parity.cpp
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -114,7 +114,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_l, logits.data(), logits.size() * sizeof(float))),
+              d_l, logits.data(), logits.size() * sizeof(float)).wait()),
           "copy");
     // -1 in every output slot first: a row the kernel leaves unwritten can never match (a verify window reads
     // every row, so "no output" is a wrong answer, not a skipped one)
@@ -135,7 +135,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_h, hist.data(), hist.size() * sizeof(int))),
+                  d_h, hist.data(), hist.size() * sizeof(int)).wait()),
               "copy hist");
     }
     strata::kernels::sample_tokens(d_l, n_tokens, (int) (logits.size() / n_tokens), d_h, hist_len, p, d_o,
@@ -378,7 +378,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_l, l.data(), l.size() * sizeof(float))),
+                  d_l, l.data(), l.size() * sizeof(float)).wait()),
               "c1");
         strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, a, d_a, nullptr);
         strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, b, d_b, nullptr);
@@ -887,7 +887,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  input, uniform.data(), uniform.size() * sizeof(float))),
+                  input, uniform.data(), uniform.size() * sizeof(float)).wait()),
               "counter upload");
         strata::kernels::SamplerParams p;
         p.top_k = vocab; p.top_p = 1.0f; p.seed = 123; p.counter = (uint64_t(1) << 32) + 7;
diff --git a/sycl/src/kernels/shared_expert_parity.cpp b/sycl/src/kernels/shared_expert_parity.cpp
index 45aeeb8fa04..e6bd2654612 100644
--- a/sycl/src/kernels/shared_expert_parity.cpp
+++ b/sycl/src/kernels/shared_expert_parity.cpp
@@ -233,7 +233,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_x, hx.data(), hx.size() * sizeof(uint16_t))),
+              d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "c x");
     /*
     DPCT1114:335: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -242,7 +242,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_gc, gc.data(), gc.size())),
+              dpct::get_in_order_queue().memcpy(d_gc, gc.data(), gc.size()).wait()),
           "c gc");
     /*
     DPCT1114:336: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -251,7 +251,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_uc, uc.data(), uc.size())),
+              dpct::get_in_order_queue().memcpy(d_uc, uc.data(), uc.size()).wait()),
           "c uc");
     /*
     DPCT1114:337: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -260,7 +260,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_dc, dc.data(), dc.size())),
+              dpct::get_in_order_queue().memcpy(d_dc, dc.data(), dc.size()).wait()),
           "c dc");
     /*
     DPCT1114:338: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -269,7 +269,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_gs, gs.data(), gs.size() * sizeof(float))),
+              d_gs, gs.data(), gs.size() * sizeof(float)).wait()),
           "c gs");
     /*
     DPCT1114:339: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -278,7 +278,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_us, us.data(), us.size() * sizeof(float))),
+              d_us, us.data(), us.size() * sizeof(float)).wait()),
           "c us");
     /*
     DPCT1114:340: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -287,7 +287,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_ds, ds.data(), ds.size() * sizeof(float))),
+              d_ds, ds.data(), ds.size() * sizeof(float)).wait()),
           "c ds");
     /*
     DPCT1114:341: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -296,7 +296,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_ginp, ginp.data(), ginp.size() * sizeof(float))),
+              d_ginp, ginp.data(), ginp.size() * sizeof(float)).wait()),
           "c ginp");
     /*
     DPCT1114:342: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -305,7 +305,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-              d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t))),
+              d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t)).wait()),
           "c xb");
     /*
     DPCT1114:343: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -315,7 +315,7 @@ int main(int argc, char** argv) {
     */
     check(
         DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            d_ginpb, hginp_bf16.data(), hginp_bf16.size() * sizeof(uint16_t))),
+            d_ginpb, hginp_bf16.data(), hginp_bf16.size() * sizeof(uint16_t)).wait()),
         "c ginpb");
 
     const strata::kernels::SForm f{2, -1, 64, strata::kernels::Codebook::Affine, false, /*act_kind=*/0};
@@ -341,7 +341,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_xf, fx.data(), (size_t)n_embd * 4)),
+                  d_xf, fx.data(), (size_t)n_embd * 4).wait()),
               "cxf");
         strata::kernels::quantize_q8_0(d_xf, d_x0, n_embd, nullptr);
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
@@ -473,7 +473,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_witness, witness.data(), witness.size() * sizeof(float))),
+                  d_witness, witness.data(), witness.size() * sizeof(float)).wait()),
               "native shared upload x");
         auto run = [&](void* stream, const float* x_float = nullptr) {
             shared_expert(d_x_used, nullptr, d_xb, f, d_gc, d_gs, nullptr, f, d_uc, d_us, nullptr, f,
@@ -486,7 +486,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_ginpb, zeros.data(), zeros.size() * sizeof(uint16_t))),
+                  d_ginpb, zeros.data(), zeros.size() * sizeof(uint16_t)).wait()),
               "zero shared gate");
         run(nullptr);
         std::vector<float> half_output((size_t) n_embd), legacy((size_t) n_embd), native((size_t) n_embd), replay((size_t) n_embd);
@@ -502,7 +502,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_ginpb, basis.data(), basis.size() * sizeof(uint16_t))),
+                  d_ginpb, basis.data(), basis.size() * sizeof(uint16_t)).wait()),
               "basis shared gate");
         /*
         DPCT1114:348: cudaMemcpy is migrated to asynchronization memcpy,
@@ -512,7 +512,7 @@ int main(int argc, char** argv) {
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                   d_xb, witness_bf16.data(),
-                  witness_bf16.size() * sizeof(uint16_t))),
+                  witness_bf16.size() * sizeof(uint16_t)).wait()),
               "witness shared bf16");
         run(nullptr);
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
@@ -592,7 +592,7 @@ int main(int argc, char** argv) {
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                   d_ginpb, hginp_bf16.data(),
-                  hginp_bf16.size() * sizeof(uint16_t))),
+                  hginp_bf16.size() * sizeof(uint16_t)).wait()),
               "restore shared gate");
         /*
         DPCT1114:351: cudaMemcpy is migrated to asynchronization memcpy,
@@ -601,7 +601,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t))),
+                  d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t)).wait()),
               "restore shared bf16");
         run(nullptr);
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
@@ -674,7 +674,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_p, parts.data(), parts.size() * 4)),
+                  d_p, parts.data(), parts.size() * 4).wait()),
               "mc cp");
         /*
         DPCT1114:353: cudaMemcpy is migrated to asynchronization memcpy,
@@ -683,7 +683,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
-                                                                 w.size() * 4)),
+                                                                 w.size() * 4).wait()),
               "mc cw");
         /*
         DPCT1114:354: cudaMemcpy is migrated to asynchronization memcpy,
@@ -692,7 +692,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                  d_s, shared.data(), shared.size() * 4)),
+                  d_s, shared.data(), shared.size() * 4).wait()),
               "mc cs");
         strata::kernels::moe_combine(d_p, d_w, d_s, d_y, n_embd2, k2, nullptr);
         std::vector<float> got((size_t) n_embd2);
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 01d601fe2cc..aee620fe7f4 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -577,7 +577,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
             by memcpy API to ensure synchronization behavior.
             */
             DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                m.ident_table, ident.data(), ident.size() * 4)) != 0)
+                m.ident_table, ident.data(), ident.size() * 4).wait()) != 0)
             ok = false;
         else
             m.owned.push_back(m.ident_table);
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 01844c9987e..49f7d05db35 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -20,6 +20,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/core/expert_cache.hpp"
 #include "strata/core/expert_source.hpp"
+#include "strata/core/gguf_expert_source.hpp"
 #include "strata/core/remote_experts.hpp"
 #include "strata/core/on_device.hpp"
 #include "strata/core/layer.hpp"
@@ -182,6 +183,7 @@ struct Options {
     /// is reserved for a host thread that has nothing to do while the drain runs.
     bool no_host_worker = false;
     bool mmap_experts = false;    ///< R2.1: opt OUT of the resident arena, back to MapViewOfFile
+    bool stream_experts = false;  ///< SYCL port: no host arena; blobs read from the GGUF on demand (all experts in VRAM)
     /// R4: slots of VRAM-resident experts.  **0 = off, and off is the default.**
     /// **THE COMMENT THAT USED TO BE HERE WAS FALSE AND ROUND 328 MEASURED IT.**  It said "the cache has no
     /// consumer yet - `moe_hit_grouped_s2` does not exist - so switching it on costs the fill traffic and
@@ -430,6 +432,8 @@ void usage() {
                  "                       except the one the host loop spins on.  A sweep is how the pool's\n"
                  "                       deviation from `cpu_s2` is attributed.\n"
                  "  --mmap-experts       R2.1: opt OUT of the resident expert arena, back to MapViewOfFile.\n"
+                 "  --stream-experts     no host arena: experts read from the GGUF on demand (needs a native pack and\n"
+                 "                       a VRAM cache that holds every expert; for machines with less RAM than experts)\n"
                  "                       The A/B arm: the mmap's rate depends on the OS page cache holding\n"
                  "                       34 GB, and measured 71.97 vs 34.78 ms/token cold vs warm.\n");
 }
@@ -782,7 +786,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
     synchronization behavior.
     */
     if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            ss.gdn_state, c.gdn.data(), z.gdn)) != 0) return false;
+            ss.gdn_state, c.gdn.data(), z.gdn).wait()) != 0) return false;
     /*
     DPCT1114:668: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
@@ -790,7 +794,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
     synchronization behavior.
     */
     if (!c.ple.empty() && DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                              ss.ple_hist, c.ple.data(), z.ple)) != 0)
+                              ss.ple_hist, c.ple.data(), z.ple).wait()) != 0)
         return false;
     for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
         /*
@@ -801,7 +805,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
         */
         if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                 ss.qsa_states[i].idx_tail, c.tails.data() + (size_t)i * z.tail,
-                z.tail)) != 0)
+                z.tail).wait()) != 0)
             return false;
     // the PLE's token window is the last two tokens, OLDEST FIRST, -1 where there is none (as session_zero leaves it)
     const size_t L = c.ids.size();
@@ -916,7 +920,7 @@ double probe_pcie_h2d_gbps() try {
     ensure synchronization behavior.
     */
     dpct::get_in_order_queue().memcpy(
-        d, h, kBytes); // warmup: context up, copy engine primed
+        d, h, kBytes).wait(); // warmup: context up, copy engine primed
     dpct::sync_barrier(ev0);
     /*
     DPCT1124:671: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
@@ -925,7 +929,7 @@ double probe_pcie_h2d_gbps() try {
     ensure synchronization behavior.
     */
     for (int i = 0; i < kIters; ++i) dpct::get_in_order_queue().memcpy(d, h,
-                                                                       kBytes);
+                                                                       kBytes).wait();
     dpct::sync_barrier(ev1);
     const bool ok = DPCT_CHECK_ERROR(ev1->wait_and_throw()) == 0;
     float ms = 0.f;
@@ -1140,6 +1144,7 @@ int main(int argc, char** argv) {
         else if (a == "--expert-profile") o.expert_profile = next("--expert-profile");
         else if (a == "--gpu-stages") o.gpu_stages = true;
         else if (a == "--mmap-experts") o.mmap_experts = true;
+        else if (a == "--stream-experts") o.stream_experts = true;
         else if (a == "--stats") o.stats = true;
         else if (a == "--shared-late") o.shared_late = true;
         else if (a == "--keep-canonical") o.keep_canonical = true;
@@ -1528,7 +1533,7 @@ int main(int argc, char** argv) {
             */
             DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                 d_mrope, mrope_host.data(),
-                mrope_host.size() * sizeof(int32_t))) != 0) {
+                mrope_host.size() * sizeof(int32_t)).wait()) != 0) {
             std::fprintf(stderr, "strata generate: cannot allocate the image position table\n");
             return 1;
         }
@@ -1812,7 +1817,7 @@ int main(int argc, char** argv) {
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st.mrope, mrope_host.data(),
-                    mrope_host.size() * sizeof(int32_t))) != 0) {
+                    mrope_host.size() * sizeof(int32_t)).wait()) != 0) {
                 std::fprintf(stderr, "strata generate: layer split, CUDA%d: the image position table failed\n", st.dev);
                 return 1;
             }
@@ -1888,6 +1893,7 @@ int main(int argc, char** argv) {
     // note in `pinned.cu`.
     strata::core::FileExpertSource src;
     strata::core::ArenaExpertSource arena_src;
+    strata::core::GgufExpertSource gguf_src;
     strata::core::ExpertSource* srcp = nullptr;
     if (o.mmap_experts) {
         if (native_pack) {   // FileExpertSource maps the canonical pack's experts.bin; a native pack has none
@@ -1901,6 +1907,21 @@ int main(int argc, char** argv) {
         }
         std::fprintf(stderr, "strata generate: experts via mmap (--mmap-experts; the A/B arm of R2.1)\n");
         srcp = &src;
+    } else if (o.stream_experts) {
+        // the SYCL port: a card that holds every expert needs no host copy of them, and a 23 GiB machine cannot
+        // hold one. The profile fill reads each blob once from the shard; nothing reads from here afterwards
+        // unless a slot is lent to the prefill and refilled.
+        if (!native_pack || o.native_preset.empty()) {
+            std::fprintf(stderr, "strata generate: --stream-experts needs a native (IQ) pack and --native SHARD1\n");
+            return 2;
+        }
+        if (!gguf_src.open(o.native_preset, g.n_layers, g.n_expert, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experts streamed from the GGUF on demand (--stream-experts): no host "
+                             "arena; every expert must fit the VRAM cache\n");
+        srcp = &gguf_src;
     } else {
         arena_src.set_gguf(o.native_preset);   // plan v0.3 P6: a native pack may take its experts from shard 1
         // On the multi-GPU Windows experiment, start with at most 8 GiB of mapped host pages.
@@ -3142,7 +3163,7 @@ int main(int argc, char** argv) {
             by memcpy API to ensure synchronization behavior.
             */
             DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                d_res, host_res.data(), host_res.size() * sizeof(int32_t))) !=
+                d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait()) !=
                 0) {
             std::fprintf(stderr, "strata generate: the device residency table could not be staged\n");
             return 1;
@@ -3162,7 +3183,7 @@ int main(int argc, char** argv) {
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st->d_res, host_res.data(),
-                    host_res.size() * sizeof(int32_t))) != 0) {
+                    host_res.size() * sizeof(int32_t)).wait()) != 0) {
                 std::fprintf(stderr, "strata generate: layer split: CUDA%d residency table failed\n", st->dev);
                 return 1;
             }
@@ -3621,7 +3642,7 @@ int main(int argc, char** argv) {
                 return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
-                    d_res, host_res.data(), host_res.size() * sizeof(int32_t));
+                    d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
             for (auto& st : stages) {
                 const strata::core::OnDevice on(st->dev);
                 dpct::get_in_order_queue()
@@ -5135,7 +5156,7 @@ int main(int argc, char** argv) {
                 return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
-                    d_res, host_res.data(), host_res.size() * sizeof(int32_t));
+                    d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
         }
         catch (sycl::exception const &exc) {
           std::cerr << exc.what() << "Exception caught at file:" << __FILE__
diff --git a/sycl/tools/build.sh b/sycl/tools/build.sh
index 5afd559fd66..1858bd51bfc 100644
--- a/sycl/tools/build.sh
+++ b/sycl/tools/build.sh
@@ -6,7 +6,7 @@ repo=${REPO:-/work/Strata_B70}
 b=$repo/build-sycl
 [ -f $b/build.ninja ] || cmake -S $repo/sycl -B $b -G Ninja -DCMAKE_C_COMPILER=icx -DCMAKE_CXX_COMPILER=icpx \
     -DSTRATA_SYCL_AOT="${AOT:-}" 2>&1 | tail -15
-cmake --build $b -j ${JOBS:-12} "$@" -- -k 0 2>&1 | tee $b/build.log | grep -E '^FAILED|error:|^ninja: build stopped|Linking|^\[[0-9]+/[0-9]+\] Linking' | tail -40
+cmake --build $b -j ${JOBS:-12} ${1:+--target "$@"} -- -k 0 2>&1 | tee $b/build.log | grep -E '^FAILED|error:|^ninja: build stopped|Linking|^\[[0-9]+/[0-9]+\] Linking' | tail -40
 echo "BUILD EXIT ${PIPESTATUS[0]}"
 grep -c 'error:' $b/build.log | sed 's/^/errors: /'
 grep -E '^FAILED' $b/build.log | sed 's#.*/##' | sort | uniq | head -60
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 6b09af3aed2..96a5300ea0b 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -69,6 +69,55 @@ def q_of(s):
 edit("src/kernels/cuda/s_gemv.dp.cpp", lambda s: s.replace("const float d = *blk;", "const float d = *(const float*) blk;")
      .replace("Q8K ? *xb", "Q8K ? *(const float*) xb"))
 
+# 7c. the doorbell: `volatile` device loads/stores of host-mapped flags do not bypass the GPU caches on Intel
+#     (the spin never saw the host's write). System-scope atomic load/store do (include/strata/sycl_doorbell.hpp).
+def doorbell(s):
+    if "sycl_doorbell.hpp" not in s:
+        s = s.replace('#include "strata/sycl_queue.hpp"\n', '#include "strata/sycl_queue.hpp"\n#include "strata/sycl_doorbell.hpp"\n', 1)
+    s = s.replace("    *seq = *seq + 1u;", "    strata::sys_store(seq, strata::sys_load(seq) + 1u);")
+    s = s.replace("    const uint32_t want = *seq;\n", "    const uint32_t want = strata::sys_load(seq);\n")
+    s = s.replace("    while (*flag != want) /* spin (no __nanosleep on SYCL) */;", "    while (strata::sys_load(flag) != want) /* spin (no __nanosleep on SYCL) */;")
+    s = s.replace("    while (*flag < value) /* spin (no __nanosleep on SYCL) */;", "    while (strata::sys_load(flag) < value) /* spin (no __nanosleep on SYCL) */;")
+    s = s.replace("    if (*skip == value) return;", "    if (strata::sys_load(skip) == value) return;")
+    s = s.replace("    *skip = ring;\n}", "    strata::sys_store(skip, ring);\n}")
+    s = s.replace("        *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;", "        strata::sys_store(seq, strata::sys_load(seq) + 1u);")
+    # bounded spins (see kSpinMax in sycl_doorbell.hpp)
+    s = s.replace("    while (strata::sys_load(flag) != want) /* spin (no __nanosleep on SYCL) */;",
+                  "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) {}")
+    s = s.replace("    while (strata::sys_load(flag) < value) /* spin (no __nanosleep on SYCL) */;",
+                  "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}")
+    return s
+edit("src/kernels/cuda/elementwise.dp.cpp", doorbell)
+edit("src/kernels/cuda/verify_kernels.dp.cpp", doorbell)
+
+# 7d. cudaMemcpy / cudaMemset are synchronous; dpct emitted `get_in_order_queue().memcpy(...)` with no wait where
+#     the source was pageable ("call wait() if needed"). The streaming expert source hands out ring-buffer blobs,
+#     so an unwaited fill copies from a buffer that has already been reused (measured: non-deterministic experts).
+#     Every default-queue memcpy/memset that is not already waited on gets its .wait() back.
+def wait_default_queue_copies(s):
+    out = []; i = 0; n = 0
+    key = "dpct::get_in_order_queue()."
+    while True:
+        j = s.find(key, i)
+        if j < 0: out.append(s[i:]); break
+        k = j + len(key)
+        if not (s.startswith("memcpy(", k) or s.startswith("memset(", k)):
+            out.append(s[i:k]); i = k; continue
+        p0 = s.find("(", k); depth = 0; q = p0
+        while q < len(s):
+            if s[q] == "(": depth += 1
+            elif s[q] == ")":
+                depth -= 1
+                if depth == 0: break
+            q += 1
+        tail = s[q + 1:q + 8]
+        if tail.startswith(".wait()"):
+            out.append(s[i:q + 1]); i = q + 1; continue
+        out.append(s[i:q + 1]); out.append(".wait()"); i = q + 1; n += 1
+    return "".join(out)
+for rel in all_sources():
+    edit(str(rel), wait_default_queue_copies)
+
 # 8. ggml-common.h has a SYCL declaration mode (sycl::half instead of cuda_fp16.h).
 edit("src/kernels/cuda/iq_kernels.dp.cpp", lambda s: s.replace("#define GGML_COMMON_DECL_CUDA", "#define GGML_COMMON_DECL_SYCL")
      .replace("#define GGML_COMMON_IMPL_CUDA", "#define GGML_COMMON_IMPL_SYCL"))

From 8c789e62ecbf56c9f3c69170a00f282ef2816b67 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 18:04:13 -0500
Subject: [PATCH 010/201] sycl: ~13 tok/s steady state, coherent 64-token
 output; window timing, eager stage profiler, docs

Measured on the B70: 64 tokens in 52.0 s, of which ~47 s is the first window (the runtime JIT-compiles
every kernel on first use: 6 tokens take 47.5 s, 64 take 52.0 s). The output is the model's real answer.

Debug tooling kept in the port: STRATA_VERIFY_EAGER=1 runs the window on the queue instead of as a graph
and turns the stage stamps into host clocks, so STRATA_VERIFY_PROFILE=1 prints ms per stage without a
device timer; STRATA_VERIFY_DEBUG=1 prints the residual after every layer and the round's phase times.
build.sh takes BUILD_DIR and AOT (an ahead-of-time bmg-g31 build removes the JIT cost).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md                             |  2 +-
 docs/INTEL.md                         | 58 ++++++++++++++++++++++-----
 sycl/include/strata/sycl_doorbell.hpp |  2 +-
 sycl/src/core/verify.cpp              | 33 ++++++++++++---
 sycl/tools/build.sh                   |  2 +-
 5 files changed, 78 insertions(+), 19 deletions(-)

diff --git a/README.md b/README.md
index d706bea01ec..8bbceb1709c 100644
--- a/README.md
+++ b/README.md
@@ -33,7 +33,7 @@ of a word): faster than you can read.
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
 > | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
-> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL, builds and links with oneAPI; 19 of 22 kernel parity tests pass on the B70. Not yet generating: the engine's resident host copy of the experts (23.4 GiB) needs more RAM than this rig has - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
+> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL and **generating correct text on the B70** at ~13 tok/s steady state (kernels untuned, tensor-core paths still scalar); `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index 681432bce48..346a74aed40 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -152,17 +152,53 @@ need model fixtures (`iq_parity`, `ple_parity`) or the tensor-core kernel below
 | iq_parity, ple_parity | need fixtures (a `logs/iq_fixture` directory, a Q2_0 shard) |
 | qsa_prompt_attn_parity | needs the tensor-core kernel (below) |
 
-**The engine end to end.** `build-sycl/strata` starts on the card, measures the PCIe link (5.3 GB/s
-host-to-device through SYCL), loads the dense weights (1.4 GiB), the 300 native projection matrices
-(2.0 GiB), maps the 28.8 GB PLE table and reads the 23.4 GiB expert arena at 0.89 GiB/s - and is then
-stopped by the test rig's memory guard, because Strata keeps that arena as a resident host copy (its
-"R2.1" design: the CPU computes cache misses from it) and the rig has 23 GiB of RAM. That is upstream's
-own requirement (`ram_gb: 32` for IQ1_M in `setup.py`), not a port defect, and on a 32 GB card it is
-pure redundancy: every one of the 12,288 experts fits in the VRAM cache (23.4 GiB of 32), so nothing
-would ever be computed from the host copy. The missing piece is a streaming fill - load each layer's
-experts from the GGUF into the VRAM slots through a small staging buffer and keep no host arena - which
-is the next piece of engine work for machines with less RAM than experts. No token has been generated by
-the SYCL engine yet; the kernels have been validated one by one.
+**The engine end to end (2026-09-29, later the same day).** It generates. Prompt "Write a Python function
+that returns the n-th Fibonacci number", greedy, 64 tokens:
+
+> `<think>` The user wants a Python function that returns the n-th Fibonacci number. Let me consider the
+> options: 1. **Recursive approach** - Simple but O(2^n) time complexity, very slow for large n. 2.
+> **Iterative approach** - O(n) time, O(1) ...
+
+Measured: **~13 tok/s steady state** (64 tokens in 52.0 s of which ~47 s is the first window: the SYCL
+runtime JIT-compiles every kernel on first use; 6 tokens take 47.5 s, 64 take 52.0 s). llama.cpp's SYCL
+build does 23-25 tok/s on the same card; Strata's kernels have had no tuning for Xe2 yet and its
+tensor-core paths are still the scalar fallbacks. Prompt reading is 2 tok/s and unoptimised.
+
+How to run it (all of this is what `coderiq1/sycl/run-engine-test.sh` does):
+
+```
+STRATA_VERIFY_DEVICE_PLAN=1 STRATA_VERIFY_NO_HOST=1 \
+build-sycl/strata --pack <iq pack> --native <shard1> --ple-gguf <shard2> \
+    --expert-profile data/expert-profile-coder.bin --expert-cache auto --stream-experts \
+    --prefill auto --spec 4 --spec-min-p 0.5 --max-context 8192 --tokens <ids> --max-new 64 --greedy
+```
+
+- `--stream-experts` (this port): no resident host copy of the experts; every one of the 12,288 goes from
+  the GGUF into the VRAM cache through a small staging ring (`GgufExpertSource`). Upstream needs 32 GB of
+  RAM for this model; with the flag the engine runs on 23 GiB.
+- `STRATA_VERIFY_DEVICE_PLAN=1`: the GPU plans each layer itself (upstream's E-6; off by default there).
+- `STRATA_VERIFY_NO_HOST=1` (this port): the host waits for the whole window graph instead of per-layer
+  rings. Only valid with every expert resident, which is the case on a 32 GB card.
+
+What the port had to get right beyond compiling (each is an entry in `sycl/tools/fixups.py` or a flag):
+
+- **Host-mapped flags.** Strata's decode is a GPU/CPU handshake through host-mapped memory. `volatile`
+  device loads do not bypass the caches on Intel; system-scope atomics do, and they are the only thing
+  measured to work (`sycl/probe/doorbell.cpp`, six variants). Host-to-device visibility *during* a kernel
+  stays unreliable on this platform, which is why the all-resident path waits for the window instead.
+- **Bounded spins.** A device spin that never sees its flag is not a hang of one process: the xe driver
+  times the queue out and resets the GT node by node - a window graph has 2,400 - and the card stays
+  wedged until a reboot (twice). Every spin is capped (`kSpinMax`).
+- **32-lane sub-groups.** The kernels are written for warps; dpct pinned 134 of 289 launches, the rest
+  would run at Xe2's default 16 (`-fsycl-default-sub-group-size=32`).
+- **Synchronous copies.** `cudaMemcpy` blocks; dpct's default-queue `memcpy` did not wait. With the
+  streaming ring that filled the expert cache from overwritten buffers: non-deterministic residuals, NaN by
+  layer 5. Found with the per-layer residual ladder (`STRATA_VERIFY_DEBUG=1` prints R after every layer).
+- `native_expert_parity` hand-ported: the GPU native expert kernel matches ggml's float reference on real
+  IQ1_M rows (rel 1.1e-2, the same class as the CPU path).
+
+Known: the process segfaults at exit (teardown order; the output is complete by then), and the first
+window's JIT (an AOT build with `-DSTRATA_SYCL_AOT=bmg-g31` is the fix, in progress).
 
 **Not ported yet.**
 
diff --git a/sycl/include/strata/sycl_doorbell.hpp b/sycl/include/strata/sycl_doorbell.hpp
index 1ba27301bb0..d801c54e071 100644
--- a/sycl/include/strata/sycl_doorbell.hpp
+++ b/sycl/include/strata/sycl_doorbell.hpp
@@ -25,5 +25,5 @@ inline void sys_store(volatile uint32_t* p, uint32_t v) {
 // xe driver times the queue out, resets the GT node by node (a window graph has 2,366 of them), and the card
 // stays wedged until a reboot - measured twice. With a bound the failure is a wrong window instead, which the
 // verifier's checks catch. ~2 M host-memory reads is a few seconds at PCIe latency.
-inline constexpr uint32_t kSpinMax = 2u * 1000u * 1000u;
+inline constexpr uint32_t kSpinMax = 20u * 1000u;   // experiment: 100x smaller
 }  // namespace strata
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 8d3856a9d26..6a4cf2ed753 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -398,7 +398,14 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
     auto Rt = [&](int t) { return R_ + (size_t) t * HC * N; };
     const int G = (split_ && T >= 2) ? 2 : 1;
     static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
-    auto stamp = [&](int64_t l, int i, int grp) { if (prof_on_ && grp == 0) gpu_stamp(prof_, (int) (l * kProfPer + i), cs); };
+    // SYCL port, STRATA_VERIFY_EAGER=1: the window runs on the queue instead of as a graph, and each stage stamp is
+    // a host-side wait + clock (there is no %globaltimer here), so the existing stage profiler reports ms per stage.
+    static const bool eager = std::getenv("STRATA_VERIFY_EAGER") != nullptr;
+    auto stamp = [&](int64_t l, int i, int grp) {
+        if (!prof_on_ || grp != 0) return;
+        if (eager) { cs->wait(); prof_h_[(size_t) (l * kProfPer + i)] = (unsigned long long) std::chrono::steady_clock::now().time_since_epoch().count(); }
+        else gpu_stamp(prof_, (int) (l * kProfPer + i), cs);
+    };
     const int tb_[2] = {0, (T + 1) / 2}, te_[2] = {G == 2 ? (T + 1) / 2 : T, T};
     groups_[T] = G;
 
@@ -897,6 +904,7 @@ std::string Verifier::profile_report() {
 
 bool Verifier::capture(int T, std::string &err) try {
     if (exec_[T] != nullptr) return true;
+    if (std::getenv("STRATA_VERIFY_EAGER") != nullptr) return true;   // SYCL port: no graph, run() replays the body
     if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
         err = "verify: begin capture failed";
         return false;
@@ -1118,7 +1126,11 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
     ms_host += ms_since(t0);
     VDBG("staged; launching\n");
-    const dpct::err0 le = DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*exec_[T]));
+    static Clock::time_point t_prev_end;   // SYCL port timing: where does a round's wall clock go?
+    const Clock::time_point t_launch = Clock::now();
+    const dpct::err0 le = (std::getenv("STRATA_VERIFY_EAGER") != nullptr)
+                              ? (record_window(T, cs_, err) ? 0 : 1)   // SYCL port: eager replay of the window body
+                              : DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*exec_[T]));
     /*
     DPCT1009:58: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
@@ -1210,6 +1222,14 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     }
     progress_at("verify window: waiting for the GPU to finish the window (flags A/B/M raised)", (int64_t) T);
     const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
+    if (std::getenv("STRATA_VERIFY_DEBUG") != nullptr) {
+        const Clock::time_point t_done = Clock::now();
+        std::fprintf(stderr, "verify dbg: T=%d window: since previous window %.1f ms, staging %.1f ms, gpu %.1f ms\n", T,
+                     t_prev_end.time_since_epoch().count() ? std::chrono::duration<double, std::milli>(t0 - t_prev_end).count() : 0.0,
+                     std::chrono::duration<double, std::milli>(t_launch - t0).count(),
+                     std::chrono::duration<double, std::milli>(t_done - t_launch).count());
+        t_prev_end = t_done;
+    }
     /*
     DPCT1009:60: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
@@ -1287,9 +1307,10 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     copy_->wait(); // no host function of this window may raise flag B in the
                    // next one
     if (prof_on_ && G == 1) {       // the window's GPU stage stamps
-        dpct::get_in_order_queue()
-            .memcpy(prof_h_.data(), prof_, prof_h_.size() * 8)
-            .wait();
+        if (std::getenv("STRATA_VERIFY_EAGER") == nullptr)   // eager: prof_h_ already holds the host clocks
+            dpct::get_in_order_queue()
+                .memcpy(prof_h_.data(), prof_, prof_h_.size() * 8)
+                .wait();
         const int64_t L = g.n_layers;
         auto at = [&](int64_t l, int i) { return prof_h_[(size_t) (l * kProfPer + i)]; };
         for (int64_t l = 0; l < L; ++l) {
@@ -1309,6 +1330,8 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
         }
         prof_sum_[0][26] += (double) (at(L, 1) - at(L, 0));
         ++prof_windows_;
+        if (std::getenv("STRATA_VERIFY_EAGER") != nullptr)   // SYCL port: the stage table per window, host-clocked
+            std::fprintf(stderr, "verify stages T=%d (ms/window):%s\n", T, profile_report().c_str());
     }
     // ---- a sampled or penalized request: the head's sampling again, host-side so its parameters are this call's
     // own (a captured kernel would replay the same draws forever).  Row t's draw is Philox(seed, pos0 + t): tied to
diff --git a/sycl/tools/build.sh b/sycl/tools/build.sh
index 1858bd51bfc..c6e877f64c2 100644
--- a/sycl/tools/build.sh
+++ b/sycl/tools/build.sh
@@ -3,7 +3,7 @@
 set -uo pipefail
 source /opt/intel/oneapi/setvars.sh >/dev/null 2>&1 || true
 repo=${REPO:-/work/Strata_B70}
-b=$repo/build-sycl
+b=${BUILD_DIR:-$repo/build-sycl}
 [ -f $b/build.ninja ] || cmake -S $repo/sycl -B $b -G Ninja -DCMAKE_C_COMPILER=icx -DCMAKE_CXX_COMPILER=icpx \
     -DSTRATA_SYCL_AOT="${AOT:-}" 2>&1 | tail -15
 cmake --build $b -j ${JOBS:-12} ${1:+--target "$@"} -- -k 0 2>&1 | tee $b/build.log | grep -E '^FAILED|error:|^ninja: build stopped|Linking|^\[[0-9]+/[0-9]+\] Linking' | tail -40

From 3600536dd3d92f2754bfaf0259723532a03d5113 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 18:14:41 -0500
Subject: [PATCH 011/201] sycl: AOT build (bmg-g31) - 15.2 tok/s decode, 28.8
 tok/s prompt, first token in 0.85 s, no JIT

The -Xs device flag was mis-quoted; fixed. Measured on the B70 with the same 19-token prompt, 32 tokens:
decode 15.17 tok/s, prefill 28.79 tok/s, a 4-token window 73 ms on the card. The persistent JIT cache
(SYCL_CACHE_PERSISTENT=1) is the alternative for the JIT build: 15 MB, second start 15.6 tok/s.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md           |  2 +-
 docs/INTEL.md       | 15 +++++++++------
 sycl/CMakeLists.txt |  2 +-
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/README.md b/README.md
index 8bbceb1709c..8dfe18649a2 100644
--- a/README.md
+++ b/README.md
@@ -33,7 +33,7 @@ of a word): faster than you can read.
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
 > | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
-> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL and **generating correct text on the B70** at ~13 tok/s steady state (kernels untuned, tensor-core paths still scalar); `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
+> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL and **generating correct text on the B70** at 15 tok/s decode, 29 tok/s prompt reading (AOT build; kernels untuned, tensor-core paths still scalar); `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index 346a74aed40..5ea707f4cbc 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -159,10 +159,14 @@ that returns the n-th Fibonacci number", greedy, 64 tokens:
 > options: 1. **Recursive approach** - Simple but O(2^n) time complexity, very slow for large n. 2.
 > **Iterative approach** - O(n) time, O(1) ...
 
-Measured: **~13 tok/s steady state** (64 tokens in 52.0 s of which ~47 s is the first window: the SYCL
-runtime JIT-compiles every kernel on first use; 6 tokens take 47.5 s, 64 take 52.0 s). llama.cpp's SYCL
-build does 23-25 tok/s on the same card; Strata's kernels have had no tuning for Xe2 yet and its
-tensor-core paths are still the scalar fallbacks. Prompt reading is 2 tok/s and unoptimised.
+Measured, ahead-of-time build (`-DSTRATA_SYCL_AOT=bmg-g31`): **15.2 tok/s decode** (32 tokens in 2.1 s,
+1.23 tokens per speculative round of 6), **28.8 tok/s prompt reading**, first token 0.85 s after the
+prompt. A window of 4 tokens through all 48 layers takes 73 ms on the card. llama.cpp's SYCL build does
+23-25 tok/s on the same card; Strata's kernels have had no tuning for Xe2 yet and its tensor-core paths
+are still the scalar fallbacks. Without AOT the runtime JIT-compiles every kernel on first use, ~47 s the
+first time a process runs; `SYCL_CACHE_PERSISTENT=1 SYCL_CACHE_DIR=<dir>` keeps that across runs (15 MB,
+second start 15.6 tok/s from the first token) - the segfault llama.cpp's build has with the persistent
+cache did not show up here.
 
 How to run it (all of this is what `coderiq1/sycl/run-engine-test.sh` does):
 
@@ -197,8 +201,7 @@ What the port had to get right beyond compiling (each is an entry in `sycl/tools
 - `native_expert_parity` hand-ported: the GPU native expert kernel matches ggml's float reference on real
   IQ1_M rows (rel 1.1e-2, the same class as the CPU path).
 
-Known: the process segfaults at exit (teardown order; the output is complete by then), and the first
-window's JIT (an AOT build with `-DSTRATA_SYCL_AOT=bmg-g31` is the fix, in progress).
+Known: the process segfaults at exit (teardown order; the output is complete by then).
 
 **Not ported yet.**
 
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index eda1ff0d486..2214bb01f50 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -24,7 +24,7 @@ set(STRATA_SYCL_AOT "" CACHE STRING "AOT device for the GPU code, e.g. bmg-g31 (
 set(_sycl_flags -fsycl)
 if(STRATA_SYCL_AOT)
   list(APPEND _sycl_flags -fsycl-targets=spir64_gen)
-  set(_sycl_link -fsycl -fsycl-targets=spir64_gen "-Xs=-device ${STRATA_SYCL_AOT}")
+  set(_sycl_link -fsycl -fsycl-targets=spir64_gen -Xsycl-target-backend=spir64_gen "-device ${STRATA_SYCL_AOT}")
 else()
   set(_sycl_link -fsycl)
 endif()

From 21c3f4841b4a9f3292b133a7582e3d52b79449d0 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 18:30:57 -0500
Subject: [PATCH 012/201] sycl: multi-entry expert dots - the resident-expert
 kernels 2.3x faster on iq3_xxs layers

A window routes the same expert for up to 6 tokens; the grouped kernels recomputed the dequantised weights
(grid lookups, sign unpacking, the byte-wise compare/xor/subtract emulations) once per token. Multi<TY>
splits each of the five formats this model uses (iq2_s, iq3_xxs, iq3_s gate/up; iq4_nl, q2_0 down) into
prep (once) and acts + finish (per token); the kernels take entries four at a time. Lanes per row is a
compile-time constant (STRATA_EXPERT_LANES, 8): 32 lanes on an 80-call row was mostly reduction.

Measured with the new NATIVE_BENCH=1 mode of native_expert_parity (10 experts x 4 entries, one layer):
iq3_xxs/iq4_nl 1.467 -> 0.649 ms, iq2_s/q2_0 ~0.68 -> 0.579 ms, iq3_s/iq4_nl 0.750 ms; parity unchanged.
strata::dp4a wraps dpct::dp4a (sycl::ext::oneapi::dot_acc is the same emulation with a header that breaks
the link across translation units).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/include/strata/sycl_math.hpp             |  15 +
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       | 285 ++++++++++++++++--
 sycl/src/kernels/cuda/native_mmvq.dp.cpp      |  47 +--
 .../src/kernels/cuda/s2_expert_grouped.dp.cpp |  11 +-
 sycl/src/kernels/native_expert_parity.cpp     |  39 +++
 sycl/tools/fixups.py                          |  10 +
 6 files changed, 362 insertions(+), 45 deletions(-)
 create mode 100644 sycl/include/strata/sycl_math.hpp

diff --git a/sycl/include/strata/sycl_math.hpp b/sycl/include/strata/sycl_math.hpp
new file mode 100644
index 00000000000..58ccd2caec8
--- /dev/null
+++ b/sycl/include/strata/sycl_math.hpp
@@ -0,0 +1,15 @@
+// include/strata/sycl_math.hpp - the SYCL port's device math that dpct emulates but the hardware has.
+#pragma once
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+
+namespace strata {
+// CUDA's __dp4a(int, int, int): four signed byte products summed into c. One place to change it: the byte
+// unpack + multiply-add form is what IGC pattern-matches into the DP4A instruction (sycl::ext::oneapi::dot_acc is
+// the same emulation and its header defines non-inline functions, which breaks the link across TUs).
+template <typename A, typename B, typename C>
+inline int32_t dp4a(A a, B b, C c) {
+    return dpct::dp4a((int32_t) a, (int32_t) b, (int32_t) c);
+}
+}  // namespace strata
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 4e629c998ac..2c7eab3299c 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -7,6 +7,7 @@
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
+#include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 
@@ -67,7 +68,7 @@ __dpct_inline__ sycl::int2 get_int_from_table_16(const int &q4,
     return sycl::int2(dpct::byte_level_permute(tmp[0], tmp[1], 0x6420),
                       dpct::byte_level_permute(tmp[0], tmp[1], 0x7531));
 }
-#define ggml_cuda_dp4a(a, b, c) dpct::dp4a((a), (b), (c))
+#define ggml_cuda_dp4a(a, b, c) strata::dp4a((a), (b), (c))
 
 // ---------------------------------------------------------------- the dot products (vecdotq.cuh)
 __dpct_inline__ float vec_dot_q2_0_q8_1(const void *__restrict__ vbq,
@@ -403,6 +404,32 @@ __dpct_inline__ float warp_sum(float v) {
     return v;
 }
 
+// SYCL port: lanes per row for the grouped expert kernels. A 2560-wide row is 80 (block, part) calls; over 32
+// lanes that is 2.5 calls each and a 5-step reduction - the work per sub-group is too small for the fixed cost.
+// STRATA_EXPERT_LANES (compile time) lanes share a row; 256 / that many rows per work-group.
+#ifndef STRATA_EXPERT_LANES
+#define STRATA_EXPERT_LANES 8
+#endif
+constexpr int kExpertLanes = STRATA_EXPERT_LANES;
+constexpr int kExpertRows = 256 / kExpertLanes;
+template <int LANES>
+__dpct_inline__ float lanes_sum(float v) {
+#pragma unroll
+    for (int o = LANES / 2; o > 0; o >>= 1)
+        v += dpct::experimental::permute_sub_group_by_xor(0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), v, o);
+    return v;
+}
+template <int TY, int LANES>
+__dpct_inline__ float row_dot_lanes(const uint8_t *row, const block_q8_1 *x, int nb, int sub) {
+    using F = Fmt<TY>;
+    float s = 0.0f;
+    for (int k = sub; k < nb * F::ipb; k += LANES) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        s += F::dot(row, x + kbx * (F::qk / 32), kbx, iqs);
+    }
+    return lanes_sum<LANES>(s);
+}
+
 // One row against one q8_1 activation, the whole warp: call k = (block, part) is lane-strided.
 template <int TY>
 __dpct_inline__ float row_dot(const uint8_t *row, const block_q8_1 *x, int nb,
@@ -440,6 +467,213 @@ mmvq_kernel(const uint8_t *__restrict__ w, size_t row_bytes,
 }
 
 // ---------------------------------------------------------------- grouped native experts
+
+// ---------------------------------------------------------------- SYCL port: multi-entry dots
+//
+// A window routes the same expert for several tokens (up to 6). The single-entry dot above recomputes the
+// dequantised weights - grid lookups, sign unpacking, the byte-wise compare/xor/subtract emulations - once per
+// token; only the dp4a against the activation and the scale differ. Multi<TY> splits each format into `prep`
+// (weights, once) and `acts` + `finish` (per token). NW packed int32s of weights per call.
+struct MultiW { int w[8]; int a = 0, b = 0; float d = 0.f; };
+
+template <int TY> struct Multi { static constexpr bool has = false; static constexpr int NW = 0; };
+
+template <> struct Multi<18> {   // iq3_xxs
+    static constexpr bool has = true; static constexpr int NW = 8;
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+        const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
+        const sycl::int2 q3_packed = sycl::int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
+        const uint8_t* q3 = (const uint8_t*) &q3_packed;
+        const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const sycl::int2 grid_pos = sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
+            const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(signs & 0x08040201, 0, std::not_equal_to<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(signs & 0x80402010, 0, std::not_equal_to<>());
+            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.x() ^ signs0, signs0, std::minus<>());
+            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        m.a = (int) (aux32 >> 28);
+        m.d = sycl::vec<sycl::half, 1>(bq3->d).convert<float, sycl::rounding_mode::automatic>()[0];
+    }
+    __dpct_inline__ static void acts(const block_q8_1* y, int iqs, int* u, float& ds) {
+#pragma unroll
+        for (int j = 0; j < 8; ++j) u[j] = get_int_b4(y[iqs / 2].qs, j);
+        ds = y[iqs / 2].ds[0];
+    }
+    __dpct_inline__ static float finish(int s0, int s1, const MultiW& m, float ds) {
+        const int sumi = s0 + s1;
+        return m.d * ds * (float) ((m.a * sumi + sumi / 2) / 2);
+    }
+};
+
+template <> struct Multi<22> {   // iq2_s
+    static constexpr bool has = true; static constexpr int NW = 8;
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+        const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
+        const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
+        const uint8_t* qs = (const uint8_t*) &qs_packed;
+        const int qh = bq2->qh[iqs / 2];
+        const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
+        const uint8_t* sp = (const uint8_t*) &signs_packed_32;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21), 0, std::not_equal_to<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17), 0, std::not_equal_to<>());
+            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos[0] ^ signs0, signs0, std::minus<>());
+            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos[1] ^ signs1, signs1, std::minus<>());
+        }
+        m.a = bq2->scales[iqs / 2] & 0x0F;
+        m.b = bq2->scales[iqs / 2] >> 4;
+        m.d = sycl::vec<sycl::half, 1>(bq2->d).convert<float, sycl::rounding_mode::automatic>()[0];
+    }
+    __dpct_inline__ static void acts(const block_q8_1* y, int iqs, int* u, float& ds) {
+#pragma unroll
+        for (int j = 0; j < 8; ++j) u[j] = get_int_b4(y[iqs / 2].qs, j);
+        ds = y[iqs / 2].ds[0];
+    }
+    __dpct_inline__ static float finish(int s0, int s1, const MultiW& m, float ds) {
+        return m.d * ds * (float) ((s0 * m.a + s1 * m.b + (s0 + s1) / 2) / 4);
+    }
+};
+
+template <> struct Multi<21> {   // iq3_s
+    static constexpr bool has = true; static constexpr int NW = 8;
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+        const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
+        const sycl::int2 qs_packed = sycl::int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
+        const uint8_t* qs = (const uint8_t*) &qs_packed;
+        const int qh = bq3->qh[iqs / 2];
+        const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
+        const uint8_t* sp = (const uint8_t*) &signs_packed_32;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const sycl::int2 grid_pos = sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                                                   iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21), 0, std::not_equal_to<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17), 0, std::not_equal_to<>());
+            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.x() ^ signs0, signs0, std::minus<>());
+            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        m.a = 1 + 2 * ((bq3->scales[iqs / 4] >> ((iqs << 1) & 0x04)) & 0x0F);
+        m.d = sycl::vec<sycl::half, 1>(bq3->d).convert<float, sycl::rounding_mode::automatic>()[0];
+    }
+    __dpct_inline__ static void acts(const block_q8_1* y, int iqs, int* u, float& ds) {
+#pragma unroll
+        for (int j = 0; j < 8; ++j) u[j] = get_int_b4(y[iqs / 2].qs, j);
+        ds = y[iqs / 2].ds[0];
+    }
+    __dpct_inline__ static float finish(int s0, int s1, const MultiW& m, float ds) {
+        return m.d * ds * (float) ((s0 + s1) * m.a);
+    }
+};
+
+template <> struct Multi<20> {   // iq4_nl (down)
+    static constexpr bool has = true; static constexpr int NW = 4;
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+        const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
+#pragma unroll
+        for (int l = 0; l < 2; ++l) {
+            const int aux_q4 = get_int_b2(bq4->qs, iqs + l);
+            const sycl::int2 v = get_int_from_table_16(aux_q4, kvalues_iq4nl);
+            m.w[2 * l + 0] = v.x();
+            m.w[2 * l + 1] = v.y();
+        }
+        m.d = sycl::vec<sycl::half, 1>(bq4->d).convert<float, sycl::rounding_mode::automatic>()[0];
+    }
+    __dpct_inline__ static void acts(const block_q8_1* y, int iqs, int* u, float& ds) {
+        const int* q8 = (const int*) y->qs + iqs;
+#pragma unroll
+        for (int l = 0; l < 2; ++l) { u[2 * l + 0] = q8[l + 0]; u[2 * l + 1] = q8[l + 4]; }
+        ds = y->ds[0];
+    }
+    __dpct_inline__ static float finish(int s0, int s1, const MultiW& m, float ds) { return m.d * ds * (float) (s0 + s1); }
+};
+
+template <> struct Multi<42> {   // q2_0 (down)
+    static constexpr bool has = true; static constexpr int NW = 8;
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+        const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
+        const int16_t* qs = (const int16_t*) bq2_0->qs + iqs * 4;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int q = qs[j];
+            const int qe = dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 0);
+            const int qo = dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 2);
+            m.w[2 * j + 0] = dpct::byte_level_permute(qe, qo, 0x5140);
+            m.w[2 * j + 1] = dpct::byte_level_permute(qe, qo, 0x7362);
+        }
+        m.d = bq2_0->d;
+    }
+    __dpct_inline__ static void acts(const block_q8_1* y, int iqs, int* u, float& ds) {
+        const block_q8_1* chunk = y + iqs;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) { u[2 * j + 0] = get_int_b4(chunk->qs, j * 2 + 0); u[2 * j + 1] = get_int_b4(chunk->qs, j * 2 + 1); }
+        ds = chunk->ds[0];
+    }
+    __dpct_inline__ static float finish(int s0, int s1, const MultiW& m, float ds) { return m.d * ds * (float) (s0 + s1); }
+};
+
+// One row against E activations at once, LANES lanes per row.
+template <int TY, int LANES, int E>
+__dpct_inline__ void row_dot_multi(const uint8_t* row, const block_q8_1* const* xs, int nb, int sub, float* out) {
+    using F = Fmt<TY>;
+    using M = Multi<TY>;
+    float s[E];
+#pragma unroll
+    for (int e = 0; e < E; ++e) s[e] = 0.f;
+    for (int k = sub; k < nb * F::ipb; k += LANES) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        MultiW m;
+        M::prep(row, kbx, iqs, m);
+#pragma unroll
+        for (int e = 0; e < E; ++e) {
+            int u[8];
+            float ds;
+            M::acts(xs[e] + kbx * (F::qk / 32), iqs, u, ds);
+            int s0 = 0, s1 = 0;
+#pragma unroll
+            for (int j = 0; j < M::NW / 2; ++j) s0 = ggml_cuda_dp4a(m.w[j], u[j], s0);
+#pragma unroll
+            for (int j = M::NW / 2; j < M::NW; ++j) s1 = ggml_cuda_dp4a(m.w[j], u[j], s1);
+            s[e] += M::finish(s0, s1, m, ds);
+        }
+    }
+#pragma unroll
+    for (int e = 0; e < E; ++e) out[e] = lanes_sum<LANES>(s[e]);
+}
+
+// The entries e0..e1 of one row: chunks of 4 through the multi-entry dot, the rest one at a time.
+template <int TY, int LANES>
+__dpct_inline__ void row_entries(const uint8_t* wr, const block_q8_1* x, int x_stride, const int32_t* ent_idx,
+                                 int e0, int e1, int nb, int sub, float* dst, size_t dst_stride) {
+    int e = e0;
+    if constexpr (Multi<TY>::has) {
+        for (; e + 4 <= e1; e += 4) {
+            const block_q8_1* xs[4] = {x + (size_t) ent_idx[e] * x_stride, x + (size_t) ent_idx[e + 1] * x_stride,
+                                       x + (size_t) ent_idx[e + 2] * x_stride, x + (size_t) ent_idx[e + 3] * x_stride};
+            float o[4];
+            row_dot_multi<TY, LANES, 4>(wr, xs, nb, sub, o);
+            if (sub == 0)
+#pragma unroll
+                for (int i = 0; i < 4; ++i) dst[(size_t) (e + i) * dst_stride] = o[i];
+        }
+        if (e + 2 <= e1) {
+            const block_q8_1* xs[2] = {x + (size_t) ent_idx[e] * x_stride, x + (size_t) ent_idx[e + 1] * x_stride};
+            float o[2];
+            row_dot_multi<TY, LANES, 2>(wr, xs, nb, sub, o);
+            if (sub == 0) { dst[(size_t) e * dst_stride] = o[0]; dst[(size_t) (e + 1) * dst_stride] = o[1]; }
+            e += 2;
+        }
+    }
+    for (; e < e1; ++e) {
+        const float v = row_dot_lanes<TY, LANES>(wr, x + (size_t) ent_idx[e] * x_stride, nb, sub);
+        if (sub == 0) dst[(size_t) e * dst_stride] = v;
+    }
+}
+
 constexpr int GU_ROWS = 8;     // rows per block (one warp each)
 
 template <int TG>
@@ -451,9 +685,9 @@ __dpct_inline__ void native_gu_kernel(
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int g = item_ct1.get_group(1);
     if (g >= *n_groups) return;
-    const int warp = item_ct1.get_local_id(2) >> 5,
-              lane = item_ct1.get_local_id(2) & 31;
-    const int row = item_ct1.get_group(2) * GU_ROWS + warp; // 0 .. 2*n_ff
+    const int rib = item_ct1.get_local_id(2) / kExpertLanes,
+              sub = item_ct1.get_local_id(2) % kExpertLanes;
+    const int row = item_ct1.get_group(2) * kExpertRows + rib; // 0 .. 2*n_ff
     if (row >= 2 * L.n_ff) return;
     const bool is_up = row >= L.n_ff;
     const int r = is_up ? row - (int) L.n_ff : row;
@@ -461,10 +695,7 @@ __dpct_inline__ void native_gu_kernel(
     const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
     const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    for (int e = e0; e < e1; ++e) {
-        const float s = row_dot<TG>(wr, xq + (size_t)ent_tok[e] * xb, nb, lane);
-        if (lane == 0) (is_up ? up : gate)[(size_t) e * L.n_ff + r] = s;
-    }
+    row_entries<TG, kExpertLanes>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff);
 }
 
 __dpct_inline__ void swiglu_entries_kernel(const float *__restrict__ gate,
@@ -488,18 +719,38 @@ __dpct_inline__ void native_down_kernel(
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int g = item_ct1.get_group(1);
     if (g >= *n_groups) return;
-    const int warp = item_ct1.get_local_id(2) >> 5,
-              lane = item_ct1.get_local_id(2) & 31;
-    const int r = item_ct1.get_group(2) * 8 + warp;
+    const int rib = item_ct1.get_local_id(2) / kExpertLanes,
+              sub = item_ct1.get_local_id(2) % kExpertLanes;
+    const int r = item_ct1.get_group(2) * kExpertRows + rib;
     if (r >= L.n_embd) return;
     const uint8_t* blob = (const uint8_t*) grp_ptr[g];
     const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
     const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
     const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    for (int e = e0; e < e1; ++e) {
-        const float s =
-            row_dot<TD>(wr, hq + (size_t)e * hb, nb, lane);
-        if (lane == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = s;
+    // down: entry e's activation is row e of hq (identity index), its output row is ent_dst[e]
+    {
+        int e = e0;
+        if constexpr (Multi<TD>::has) {
+            for (; e + 4 <= e1; e += 4) {
+                const block_q8_1* xs[4] = {hq + (size_t) e * hb, hq + (size_t) (e + 1) * hb, hq + (size_t) (e + 2) * hb, hq + (size_t) (e + 3) * hb};
+                float o[4];
+                row_dot_multi<TD, kExpertLanes, 4>(wr, xs, nb, sub, o);
+                if (sub == 0)
+#pragma unroll
+                    for (int i = 0; i < 4; ++i) out[(size_t) ent_dst[e + i] * L.n_embd + r] = o[i];
+            }
+            if (e + 2 <= e1) {
+                const block_q8_1* xs[2] = {hq + (size_t) e * hb, hq + (size_t) (e + 1) * hb};
+                float o[2];
+                row_dot_multi<TD, kExpertLanes, 2>(wr, xs, nb, sub, o);
+                if (sub == 0) { out[(size_t) ent_dst[e] * L.n_embd + r] = o[0]; out[(size_t) ent_dst[e + 1] * L.n_embd + r] = o[1]; }
+                e += 2;
+            }
+        }
+        for (; e < e1; ++e) {
+            const float v = row_dot_lanes<TD, kExpertLanes>(wr, hq + (size_t) e * hb, nb, sub);
+            if (sub == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = v;
+        }
     }
 }
 
@@ -1150,7 +1401,7 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     float* h = (float*) ((uint8_t*) scratch + 2 * fa);
     block_q8_1* hq = (block_q8_1*) ((uint8_t*) scratch + 3 * fa);
     const auto* X = (const block_q8_1*) x_q8_1;
-    const dpct::dim3 ggu((unsigned)((2 * L.n_ff + GU_ROWS - 1) / GU_ROWS),
+    const dpct::dim3 ggu((unsigned)((2 * L.n_ff + kExpertRows - 1) / kExpertRows),
                          (unsigned)cap_groups);
     switch (L.gu_type) {
     case 16: {
@@ -1334,7 +1585,7 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
                 quantize_q8_1_kernel(h, hq, nh);
             });
     }
-    const dpct::dim3 gd((unsigned)((L.n_embd + 7) / 8), (unsigned)cap_groups);
+    const dpct::dim3 gd((unsigned)((L.n_embd + kExpertRows - 1) / kExpertRows), (unsigned)cap_groups);
     switch (L.d_type) {
     case 20: {
 
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index b30b4723081..7bce59c22a7 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -26,6 +26,7 @@
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
+#include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/native_mmvq.hpp"
 #include "strata/kernels/iq_kernels.hpp"
@@ -187,9 +188,9 @@ q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
         const int v0i = vl0i | vh0i;
         const int v1i = vl1i | vh1i;
         const int dot1 =
-            dpct::dp4a(v0i, u[2 * i], dpct::dp4a(v1i, u[2 * i + 1], 0));
-        const int dot2 = dpct::dp4a(0x01010101, u[2 * i],
-                                    dpct::dp4a(0x01010101, u[2 * i + 1], 0));
+            strata::dp4a(v0i, u[2 * i], strata::dp4a(v1i, u[2 * i + 1], 0));
+        const int dot2 = strata::dp4a(0x01010101, u[2 * i],
+                                    strata::dp4a(0x01010101, u[2 * i + 1], 0));
         sumf_d += d8[i] * (dot1 * sc[i]);
         sumf_m += d8[i] * (dot2 * m[i]);
     }
@@ -317,8 +318,8 @@ __dpct_inline__ float q2_q8_dot(const Q20Block *__restrict__ w,
         const int qo = dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 2);
         const int qx = dpct::byte_level_permute(qe, qo, 0x5140);
         const int qy = dpct::byte_level_permute(qe, qo, 0x7362);
-        sumi = dpct::dp4a(u, qx, sumi);
-        sumi = dpct::dp4a(v, qy, sumi);
+        sumi = strata::dp4a(u, qx, sumi);
+        sumi = strata::dp4a(v, qy, sumi);
     }
     const float d8 = chunk->ds[0];
     return d2 * d8 * sumi;
@@ -405,7 +406,7 @@ __dpct_inline__ float q3_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
         const int vih = ((vh >> i) << 2) & 0x04040404;
         const int vi =
             dpct::vectorized_binary<sycl::char4>(vil, vih, dpct::sub_sat());
-        sumf += d8[i] * (dpct::dp4a(vi, u[i], 0) * sc);
+        sumf += d8[i] * (strata::dp4a(vi, u[i], 0) * sc);
     }
     return d3 * sumf;
 }
@@ -517,8 +518,8 @@ __dpct_inline__ float iq4_xs_q8_dot(const IQ4XSBlock *__restrict__ w,
         const sycl::int2 v = iq4_table_lookup(aux_q4, iq4nl_values);
         const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
         const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
-        sumi = dpct::dp4a(v.x(), u0, sumi);
-        sumi = dpct::dp4a(v.y(), u1, sumi);
+        sumi = strata::dp4a(v.x(), u0, sumi);
+        sumi = strata::dp4a(v.y(), u1, sumi);
     }
     const int ls = ((w->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0f) |
                    (((w->scales_h >> (iqs / 2)) & 0x03) << 4);
@@ -593,9 +594,9 @@ q4_q8_dot_impl(const int *__restrict__ v, const int *__restrict__ u,
         const int v0i = (v[0] >> (4 * i)) & 0x0f0f0f0f;
         const int v1i = (v[1] >> (4 * i)) & 0x0f0f0f0f;
         const int dot1 =
-            dpct::dp4a(v1i, u[2 * i + 1], dpct::dp4a(v0i, u[2 * i], 0));
-        const int dot2 = dpct::dp4a(0x01010101, u[2 * i + 1],
-                                    dpct::dp4a(0x01010101, u[2 * i], 0));
+            strata::dp4a(v1i, u[2 * i + 1], strata::dp4a(v0i, u[2 * i], 0));
+        const int dot2 = strata::dp4a(0x01010101, u[2 * i + 1],
+                                    strata::dp4a(0x01010101, u[2 * i], 0));
         sumf_d += d8[i] * (dot1 * sc[i]);
         sumf_m += d8[i] * (dot2 * m[i]);
     }
@@ -707,7 +708,7 @@ __dpct_inline__ float q6_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
         const int vih = ((vh >> (4 * i)) << 4) & 0x30303030;
         const int vi = dpct::vectorized_binary<sycl::char4>(
             vil | vih, 0x20202020, dpct::sub_sat());
-        sumf += d8[i] * (dpct::dp4a(vi, u[i], 0) * sc);
+        sumf += d8[i] * (strata::dp4a(vi, u[i], 0) * sc);
     }
     return d * sumf;
 }
@@ -793,9 +794,9 @@ __dpct_inline__ float small_q8_dot(const Q40Block *__restrict__ w,
         const int v = load_int_b2(w->qs, iqs + i);
         const int vi0 = (v >> 0) & 0x0f0f0f0f;
         const int vi1 = (v >> 4) & 0x0f0f0f0f;
-        sumi = dpct::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
+        sumi = strata::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
                           sumi);
-        sumi = dpct::dp4a(
+        sumi = strata::dp4a(
             vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
     }
     const sycl::float2 ds =
@@ -817,14 +818,14 @@ __dpct_inline__ float small_q8_dot(const Q50Block *__restrict__ w,
         vi0 |= (vh << 11) & 0x00001000;
         vi0 |= (vh << 18) & 0x00100000;
         vi0 |= (vh << 25) & 0x10000000;
-        sumi = dpct::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
+        sumi = strata::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
                           sumi);
         int vi1 = (vl >> 4) & 0x0f0f0f0f;
         vi1 |= (vh >> 12) & 0x00000010;
         vi1 |= (vh >> 5) & 0x00001000;
         vi1 |= (vh << 2) & 0x00100000;
         vi1 |= (vh << 9) & 0x10000000;
-        sumi = dpct::dp4a(
+        sumi = strata::dp4a(
             vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
     }
     const sycl::float2 ds =
@@ -841,7 +842,7 @@ __dpct_inline__ float small_q8_dot(const Q80Block *__restrict__ w,
     for (int i = 0; i < 2; ++i) {
         const int v = load_int_b2(w->qs, iqs + i);
         const int u = reinterpret_cast<const int*>(x->qs)[iqs + i];
-        sumi = dpct::dp4a(v, u, sumi);
+        sumi = strata::dp4a(v, u, sumi);
     }
     const float d0 = w->d;
     const float d1 = x->ds[0];
@@ -857,8 +858,8 @@ __dpct_inline__ float small_q8_dot(const IQ4NLBlock *__restrict__ w,
     for (int i = 0; i < 2; ++i) {
         const sycl::int2 v =
             iq4_table_lookup(load_int_b2(w->qs, iqs + i), iq4nl_values);
-        sumi = dpct::dp4a(v.x(), q8[i], sumi);
-        sumi = dpct::dp4a(v.y(), q8[i + 4], sumi);
+        sumi = strata::dp4a(v.x(), q8[i], sumi);
+        sumi = strata::dp4a(v.y(), q8[i + 4], sumi);
     }
     const float d = sycl::vec<sycl::half, 1>(w->d)
                         .convert<float, sycl::rounding_mode::automatic>()[0] *
@@ -1041,8 +1042,8 @@ struct Q20Traits {
         int sumi = 0;
 #pragma unroll
         for (int j = 0; j < 4; ++j) {
-            sumi = dpct::dp4a(q8[j * 2], r.qx[j], sumi);
-            sumi = dpct::dp4a(q8[j * 2 + 1], r.qy[j], sumi);
+            sumi = strata::dp4a(q8[j * 2], r.qx[j], sumi);
+            sumi = strata::dp4a(q8[j * 2 + 1], r.qy[j], sumi);
         }
         const float d8 = chunk->ds[0];
         return r.d2 * d8 * sumi;
@@ -1123,8 +1124,8 @@ struct IQ4XSTraits {
         for (int j = 0; j < 4; ++j) {
             const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
             const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
-            sumi = dpct::dp4a(r.v[j].x(), u0, sumi);
-            sumi = dpct::dp4a(r.v[j].y(), u1, sumi);
+            sumi = strata::dp4a(r.v[j].x(), u0, sumi);
+            sumi = strata::dp4a(r.v[j].y(), u1, sumi);
         }
         sumi *= r.ls - 32;
         const float d = r.dw * x[iqs / 4].ds[0];
diff --git a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
index e2f8804cf37..7b1e587ba40 100644
--- a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
@@ -16,6 +16,7 @@
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
+#include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/s2_expert_grouped.hpp"
 
@@ -92,8 +93,8 @@ row_dot_s2_q8(const uint8_t *__restrict__ codes,
             // it rather than reasoning about which cast happens to work.
             int xw;
             memcpy(&xw, xq + 4 * j, 4);
-            s = dpct::dp4a(cw, xw, s);
-            hx = dpct::dp4a(ones, xw, hx);
+            s = strata::dp4a(cw, xw, s);
+            hx = strata::dp4a(ones, xw, hx);
         }
         // One weight scale per 64 elements, so per TWO 32-element chunks.
         const float dw = f16_at(scales + (size_t) (c >> 1) * 2);
@@ -250,7 +251,7 @@ __dpct_inline__ int dot4(const uint8_t *codes, const int8_t *q) {
                           (((c >> 4) & 3u) << 16) | (((c >> 6) & 3u) << 24));
     int xw;
     memcpy(&xw, q, sizeof xw);
-    return dpct::dp4a(cw, xw, 0);
+    return strata::dp4a(cw, xw, 0);
 }
 
 __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
@@ -885,8 +886,8 @@ __dpct_inline__ float chunk_dot(sycl::uint2 cb, const int *xw, float dw,
         const unsigned cbyte = cbytes[j];
         const int cw = (int) ((cbyte & 3u) | (((cbyte >> 2) & 3u) << 8) | (((cbyte >> 4) & 3u) << 16) |
                               (((cbyte >> 6) & 3u) << 24));
-        s = dpct::dp4a(cw, xw[j], s);
-        hx = dpct::dp4a(ones, xw[j], hx);
+        s = strata::dp4a(cw, xw[j], s);
+        hx = strata::dp4a(ones, xw[j], hx);
     }
     return dw * dx * (float) (s - hx);
 }
diff --git a/sycl/src/kernels/native_expert_parity.cpp b/sycl/src/kernels/native_expert_parity.cpp
index 5552aceb087..2b064f29f2b 100644
--- a/sycl/src/kernels/native_expert_parity.cpp
+++ b/sycl/src/kernels/native_expert_parity.cpp
@@ -246,6 +246,45 @@ int main(int argc, char** argv) {
             strata::kernels::native_expert_grouped(L, dptr, dstart, dn, ddst, dtok, 1, NT, dxq, dscr, dout, s);
             s->wait();
             s->memcpy(got_g.data(), dout, got_g.size() * 4).wait();
+            if (std::getenv("NATIVE_BENCH") != nullptr) {   // SYCL port: one layer's worth of hits, timed
+                // G distinct experts (copies of this blob at different addresses), E entries each = a T-token window
+                const int G = 10, E = 4, NE = G * E, iters = 20;
+                std::vector<void*> blobs((size_t) G);
+                std::vector<unsigned long long> ptrs((size_t) G);
+                for (int g = 0; g < G; ++g) {
+                    blobs[(size_t) g] = sycl::malloc_device(blob.size(), *s);
+                    s->memcpy(blobs[(size_t) g], blob.data(), blob.size()).wait();
+                    ptrs[(size_t) g] = (unsigned long long) blobs[(size_t) g];
+                }
+                std::vector<int32_t> starts((size_t) G + 1), dst((size_t) NE), tokv((size_t) NE);
+                for (int g = 0; g <= G; ++g) starts[(size_t) g] = g * E;
+                for (int e = 0; e < NE; ++e) { dst[(size_t) e] = e; tokv[(size_t) e] = e % NT; }
+                unsigned long long* bptr = sycl::malloc_device<unsigned long long>((size_t) G, *s);
+                int32_t* bstart = sycl::malloc_device<int32_t>((size_t) G + 1, *s);
+                int32_t* bn = sycl::malloc_device<int32_t>(1, *s);
+                int32_t* bdst = sycl::malloc_device<int32_t>((size_t) NE, *s);
+                int32_t* btok = sycl::malloc_device<int32_t>((size_t) NE, *s);
+                void* bscr = sycl::malloc_device(strata::kernels::native_expert_scratch_bytes(NE, FF), *s);
+                float* bout = sycl::malloc_device<float>((size_t) NE * H, *s);
+                const int32_t gn = G;
+                s->memcpy(bptr, ptrs.data(), (size_t) G * 8).wait();
+                s->memcpy(bstart, starts.data(), ((size_t) G + 1) * 4).wait();
+                s->memcpy(bn, &gn, 4).wait();
+                s->memcpy(bdst, dst.data(), (size_t) NE * 4).wait();
+                s->memcpy(btok, tokv.data(), (size_t) NE * 4).wait();
+                strata::kernels::native_expert_grouped(L, bptr, bstart, bn, bdst, btok, G, NE, dxq, bscr, bout, s);
+                s->wait();
+                const auto b0 = std::chrono::steady_clock::now();
+                for (int i = 0; i < iters; ++i)
+                    strata::kernels::native_expert_grouped(L, bptr, bstart, bn, bdst, btok, G, NE, dxq, bscr, bout, s);
+                s->wait();
+                const double ms = std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - b0).count() / iters;
+                std::printf("          GPU grouped: %d experts x %d entries: %.3f ms per layer call  (%.1f GB/s of expert bytes)\n",
+                            G, E, ms, (double) G * (double) blob.size() / ms / 1e6);
+                for (int g = 0; g < G; ++g) sycl::free(blobs[(size_t) g], *s);
+                sycl::free(bptr, *s); sycl::free(bstart, *s); sycl::free(bn, *s); sycl::free(bdst, *s); sycl::free(btok, *s);
+                sycl::free(bscr, *s); sycl::free(bout, *s);
+            }
             sycl::free(dblob, *s); sycl::free(dx, *s); sycl::free(dxq, *s); sycl::free(dscr, *s); sycl::free(dout, *s); sycl::free(dptr, *s);
             sycl::free(dstart, *s); sycl::free(dn, *s); sycl::free(ddst, *s); sycl::free(dtok, *s);
         }
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 96a5300ea0b..4d7d5092817 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -118,6 +118,16 @@ def wait_default_queue_copies(s):
 for rel in all_sources():
     edit(str(rel), wait_default_queue_copies)
 
+# 7e. dpct::dp4a is emulation (eight integer ops); sycl::ext::oneapi::dot_acc is the DP4A instruction on Xe.
+def native_dp4a(s):
+    if "dpct::dp4a(" not in s: return s
+    s = s.replace("dpct::dp4a(", "strata::dp4a(")
+    if "sycl_math.hpp" not in s:
+        s = s.replace("#include <dpct/dpct.hpp>\n", '#include <dpct/dpct.hpp>\n#include "strata/sycl_math.hpp"\n', 1)
+    return s
+for rel in all_sources():
+    edit(str(rel), native_dp4a)
+
 # 8. ggml-common.h has a SYCL declaration mode (sycl::half instead of cuda_fp16.h).
 edit("src/kernels/cuda/iq_kernels.dp.cpp", lambda s: s.replace("#define GGML_COMMON_DECL_CUDA", "#define GGML_COMMON_DECL_SYCL")
      .replace("#define GGML_COMMON_IMPL_CUDA", "#define GGML_COMMON_IMPL_SYCL"))

From 36aa5bcac64bb66ba6c10f0d623e8ea7917eb296 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 21:53:31 -0500
Subject: [PATCH 013/201] sycl: fused multi-token router for 256 experts (was
 512-only); 16.95 tok/s decode

route<NE> templated on the expert count; native_router_top10_multi_ne dispatches 256/512. Both call sites
(the verify window and the per-token moe_route) take it for the Coder. 64 tokens: 16.25 -> 16.95 tok/s,
same output. Also: Dockerfile.unitrace (per-kernel Level Zero profiling image).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/include/strata/kernels/native_router.hpp | 21 +++++++++++++
 sycl/src/core/layer.cpp                       |  4 +--
 sycl/src/core/verify.cpp                      |  6 ++--
 sycl/src/kernels/cuda/native_router.dp.cpp    | 30 +++++++++++++------
 sycl/tools/Dockerfile.unitrace                |  8 +++++
 5 files changed, 55 insertions(+), 14 deletions(-)
 create mode 100644 sycl/include/strata/kernels/native_router.hpp
 create mode 100644 sycl/tools/Dockerfile.unitrace

diff --git a/sycl/include/strata/kernels/native_router.hpp b/sycl/include/strata/kernels/native_router.hpp
new file mode 100644
index 00000000000..4edfea614e8
--- /dev/null
+++ b/sycl/include/strata/kernels/native_router.hpp
@@ -0,0 +1,21 @@
+#pragma once
+#include <cstdint>
+
+namespace strata::kernels {
+// Configure before session capture. Existing graphs retain their selected kernels.
+// This experiment is off by default and does not modify the legacy router.
+void native_router_set_enabled(bool enabled);
+bool native_router_enabled();
+
+// Pinned CUDA topk-moe contract for ONE token, 512 experts, top 10, softmax,
+// no selection bias, lower normalization clamp 2^-14, and scale 1.
+// Reads 512 finite F32 logits; writes 10 I32 IDs and 10 F32 weights. Equal
+// computed probabilities select the lower expert index. All spans must be
+// four-byte aligned and outputs disjoint from each other and the input.
+// Requires a nonnull ordered CUDA stream. No allocation or synchronization.
+void native_router_top10(const float* logits, int32_t* ids, float* weights, void* stream);
+/// n_tok rows at once (logits [n,512], ids/weights [n,10]); each row exactly as the single call.
+void native_router_top10_multi(const float* logits, int32_t* ids, float* weights, int n_tok, void* stream);
+/// SYCL port: the same for 256 experts (the Coder) as well as 512; logits [n, n_expert].
+void native_router_top10_multi_ne(const float* logits, int32_t* ids, float* weights, int n_tok, int n_expert, void* stream);
+}
diff --git a/sycl/src/core/layer.cpp b/sycl/src/core/layer.cpp
index 5e68553c3cd..15fabdb0073 100644
--- a/sycl/src/core/layer.cpp
+++ b/sycl/src/core/layer.cpp
@@ -405,8 +405,8 @@ if (!native_bf16_projections) f32_to_bf16_bulk(x, b.x_bf16, g.n_embd, stream);
 project_bf16(x, b.x_bf16, (const uint16_t*) w_router->data, b.logits, g.n_embd, g.n_expert, true, stream);
 // ---- routing: softmax over ALL experts, stable descending argsort with ties by index, gather, renormalise
 // the native fused router is canonical-512x10 only; anything else takes the generic top-k kernel
-if (native_router_enabled() && g.n_expert == 512 && k == 10) {
-    try { native_router_top10(b.logits, b.ids, b.weights, stream); }
+if (native_router_enabled() && (g.n_expert == 512 || g.n_expert == 256) && k == 10) {   // SYCL port: 256 too
+    try { native_router_top10_multi_ne(b.logits, b.ids, b.weights, 1, (int) g.n_expert, stream); }
     catch (const std::exception& error) { err = v.name("router") + ": " + error.what(); return false; }
 } else router_top10(b.logits, 1, (int) g.n_expert, (int) k, b.ids, b.weights, stream);
 // ---- THE DOORBELL, AND IT IS THE WHOLE POINT OF THE PROTOCOL.  The routed experts' INPUT (`x`) and the
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 6a4cf2ed753..02d2af22471 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -685,11 +685,11 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
         // the window's rows routed in 2 launches (one router GEMV reading the weight once, one
         // top-10) instead of 2 per token; every row's arithmetic is the single-token call's (STRATA_DEC_BATCH=0: old)
         const WeightRef* w_router = v.get("ffn_gate_inp.weight");
-        if (dec_batch && n > 1 && w_router != nullptr && native_router_enabled() && NE == 512 && K == 10) {
-            try {
+        if (dec_batch && n > 1 && w_router != nullptr && native_router_enabled() && (NE == 512 || NE == 256) && K == 10) {
+            try {   // SYCL port: the fused multi-token router for 256 experts as well (it was 512-only)
                 bf16_gemv_fp32_mmvf_multi(mixed_ + tb * N, N, (const uint16_t*) w_router->data, logits_ + tb * NE, NE, N,
                                           NE, n, cs);
-                native_router_top10_multi(logits_ + tb * NE, ids_ + tb * K, w_ + tb * K, n, cs);
+                native_router_top10_multi_ne(logits_ + tb * NE, ids_ + tb * K, w_ + tb * K, n, (int) NE, cs);
             } catch (const std::exception& e) { err = "verify router: " + std::string(e.what()); return false; }
         } else
         for (int t = tb; t < te; ++t) {
diff --git a/sycl/src/kernels/cuda/native_router.dp.cpp b/sycl/src/kernels/cuda/native_router.dp.cpp
index 4be5d9bdeab..fe28562c15f 100644
--- a/sycl/src/kernels/cuda/native_router.dp.cpp
+++ b/sycl/src/kernels/cuda/native_router.dp.cpp
@@ -67,34 +67,35 @@ exceeds 128 bytes and may cause high register pressure. Consult with your
 hardware vendor to find the total register size available and adjust the code,
 or use smaller sub-group size to avoid high register pressure.
 */
+template <int NE>   // SYCL port: 512 (canonical) or 256 (the Coder) experts, 32 lanes x NE/32 values
 __dpct_inline__ void route(const float *__restrict__ logits,
                            int32_t *__restrict__ ids,
                            float *__restrict__ weights) {
     // Preserve the pinned 32x8 block geometry; only row zero is active here.
     // blockIdx.x = the token (a multi-token launch; 0 for the single one)
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    logits += (size_t)item_ct1.get_group(2) * 512;
+    logits += (size_t)item_ct1.get_group(2) * NE;
         ids += (size_t)item_ct1.get_group(2) * 10;
         weights += (size_t)item_ct1.get_group(2) * 10;
     if (item_ct1.get_local_id(1) != 0) return;
     const int lane = item_ct1.get_local_id(2);
-    float values[16];
+    float values[NE / 32];
 #pragma unroll
-    for (int i = 0; i < 16; ++i) values[i] = logits[lane + i * 32];
+    for (int i = 0; i < NE / 32; ++i) values[i] = logits[lane + i * 32];
     item_ct1.barrier(sycl::access::fence_space::local_space);
     float maximum = -INFINITY;
 #pragma unroll
-    for (int i = 0; i < 16; ++i) maximum = sycl::max(maximum, values[i]);
+    for (int i = 0; i < NE / 32; ++i) maximum = sycl::max(maximum, values[i]);
     maximum = warp_max(maximum);
     float sum = 0.0f;
 #pragma unroll
-    for (int i = 0; i < 16; ++i) {
+    for (int i = 0; i < NE / 32; ++i) {
         values[i] = sycl::native::exp(values[i] - maximum);
         sum += values[i];
     }
     const float reciprocal = 1.0f / warp_sum(sum);
 #pragma unroll
-    for (int i = 0; i < 16; ++i) {
+    for (int i = 0; i < NE / 32; ++i) {
         values[i] *= reciprocal;
         if (sycl::isnan(values[i])) values[i] = -FLT_MAX;
     }
@@ -103,7 +104,7 @@ __dpct_inline__ void route(const float *__restrict__ logits,
         float best = values[0];
         int expert = lane;
 #pragma unroll
-        for (int i = 1; i < 16; ++i) {
+        for (int i = 1; i < NE / 32; ++i) {
             if (values[i] > best) { best = values[i]; expert = lane + i * 32; }
         }
 #pragma unroll
@@ -165,7 +166,7 @@ void native_router_top10(const float* logits, int32_t* ids, float* weights, void
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        route(logits, ids, weights);
+                        route<512>(logits, ids, weights);
                     });
     }
     /*
@@ -205,7 +206,7 @@ void native_router_top10_multi(const float* logits, int32_t* ids, float* weights
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        route(logits, ids, weights);
+                        route<512>(logits, ids, weights);
                     });
     }
     /*
@@ -229,4 +230,15 @@ void native_router_top10_multi(const float* logits, int32_t* ids, float* weights
     if (error !=
         0) throw std::runtime_error(dpct::get_error_string_dummy(error));
 }
+
+void native_router_top10_multi_ne(const float* logits, int32_t* ids, float* weights, int n_tok, int n_expert, void* stream) {
+    if (n_expert == 512) { native_router_top10_multi(logits, ids, weights, n_tok, stream); return; }
+    if (!stream || n_tok < 1 || n_expert != 256 || !valid(logits, (size_t) n_tok * 256 * 4) || !valid(ids, (size_t) n_tok * 10 * 4) ||
+        !valid(weights, (size_t) n_tok * 10 * 4))
+        throw std::invalid_argument("native router (multi, 256): a stream, 256 experts and aligned [n,256]/[n,10] buffers");
+    ((sycl::queue *)(strata::q_of(stream)))
+        ->parallel_for<dpct_kernel_name<class route_256_multi>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned) n_tok) * sycl::range(1, 8, 32), sycl::range(1, 8, 32)),
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] { route<256>(logits, ids, weights); });
+}
 }
diff --git a/sycl/tools/Dockerfile.unitrace b/sycl/tools/Dockerfile.unitrace
new file mode 100644
index 00000000000..586c75c3ed5
--- /dev/null
+++ b/sycl/tools/Dockerfile.unitrace
@@ -0,0 +1,8 @@
+# strata-sycl-dev + Intel pti-gpu unitrace (per-kernel Level Zero profiling). Build:
+#   docker build -t strata-sycl-dev:unitrace -f sycl/tools/Dockerfile.unitrace sycl/tools
+FROM strata-sycl-dev
+RUN . /opt/intel/oneapi/setvars.sh --force >/dev/null 2>&1; \
+    git clone --depth 1 https://github.com/intel/pti-gpu.git /opt/pti-gpu && \
+    cd /opt/pti-gpu/tools/unitrace && mkdir build && cd build && \
+    cmake -DCMAKE_BUILD_TYPE=Release .. >/dev/null && make -j"$(nproc)" >/dev/null 2>&1 && ./unitrace --version
+ENV PATH=/opt/pti-gpu/tools/unitrace/build:$PATH

From c382f84541dbfb3f5a74fac1255c5e04d856a4aa Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 22:35:48 -0500
Subject: [PATCH 014/201] sycl: clean exit, per-kernel profiling, Q6_K unpack
 hoisted; measured: the mmvq kernels run at 110-130 GB/s warm

- exit segfault: dpct's static global_memory/constant_memory objects destructed after the default queue
  (queue::get_device in the core); heap-allocated, never freed. Exit code 0; unitrace can write its table.
- Dockerfile.unitrace (pti-gpu unitrace in the dev image) + sycl/rank_kernels.py: per-kernel device time.
- Q6KTraits: the column-independent unpack (shifts, masks, saturating byte subtract) moved into load();
  acts()/dot() split; a row-blocked kernel (native_mmvq_rowwarp_kernel, STRATA_MMVQ_RPW) kept but off:
  with a 300 ms warm-up the shared kernel already does 2560x2560x4 in 48 us (110 GB/s) and the variants tie.
- mmvq_bench: the dense kernel timing harness (warm-up + 400 iterations; a 5 ms run measures the clock ramp).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/CMakeLists.txt                       |   2 +
 sycl/src/kernels/cuda/native_mmvq.dp.cpp  | 120 +++++++++++++++++++---
 sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp |   2 +-
 sycl/src/kernels/mmvq_bench.cpp           |  39 +++++++
 sycl/tools/fixups.py                      |   9 ++
 5 files changed, 156 insertions(+), 16 deletions(-)
 create mode 100644 sycl/src/kernels/mmvq_bench.cpp

diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 2214bb01f50..5b260f1e9ef 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -175,6 +175,8 @@ if(STRATA_SYCL_PARITY)
   strata_resolve(_src src/kernels/qsa_prompt_attn_parity.cpp)
   add_executable(qsa_prompt_attn_parity ${_src})
   target_link_libraries(qsa_prompt_attn_parity PRIVATE strata_kernels)
+  add_executable(mmvq_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_bench.cpp)   # dense mmvq timing
+  target_link_libraries(mmvq_bench PRIVATE strata_kernels)
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
   #   native_expert_parity <shard1.gguf> [layer ...]
   if(STRATA_NATIVE_EXPERTS)
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 7bce59c22a7..cc78c0c4041 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -32,6 +32,7 @@
 #include "strata/kernels/iq_kernels.hpp"
 
 #include <cstdint>
+#include <cstdlib>
 #include <limits>
 #include <stdexcept>
 #include <string>
@@ -482,8 +483,7 @@ __dpct_inline__ void native_q3_k_mmvq_kernel(const Q3KBlock *__restrict__ w,
 
 // The pinned nonlinear IQ4 codebook and its CUDA two-stage byte lookup. The
 // explicit alignment satisfies the four 32-bit table loads; values are unchanged.
-inline dpct::global_memory<int8_t, 1>
-    iq4nl_values(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1,
+inline dpct::global_memory<int8_t, 1>& iq4nl_values = *new dpct::global_memory<int8_t, 1>(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1,
                                    13, 25, 38, 53, 69, 89, 113});
 
 static constexpr int8_t kIq4nlTable[16] = {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113};
@@ -1079,27 +1079,51 @@ struct Q6KTraits {
     using Block = Q6KBlock;
     static constexpr int DIV = 256, T = 32, KBY = 8, BPI = WARPS * WARP / 32;
     static int kqs(int tid) { return tid % 32; }
-    struct W { int vl, vh; float d; const int8_t* scales; int bq8_offset; };
+    // SYCL port: the weight unpack (shifts, masks, the saturating byte subtract) is column-independent, so it is
+    // done once in load(); apply() is two dp4a and two fmas per column.
+    struct W { int vi[2]; float dsc[2]; int bq8_offset; };
     static W load(const Block* __restrict__ w, int iqs) {
         W r;
         r.bq8_offset = 4 * (iqs / 16) + (iqs % 16) / 8;
         const int scale_offset = 8 * (iqs / 16) + (iqs % 16) / 4;
         const int vh_shift = 2 * ((iqs % 16) / 8);
-        r.vl = load_int_b2(w->ql, iqs);
-        r.vh = load_int_b2(w->qh, 8 * (iqs / 16) + iqs % 8) >> vh_shift;
-        r.scales = w->scales + scale_offset;
-        r.d = w->d;
+        const int vl = load_int_b2(w->ql, iqs);
+        const int vh = load_int_b2(w->qh, 8 * (iqs / 16) + iqs % 8) >> vh_shift;
+        const float d = w->d;
+#pragma unroll
+        for (int i = 0; i < 2; ++i) {
+            const int vil = (vl >> (4 * i)) & 0x0f0f0f0f;
+            const int vih = ((vh >> (4 * i)) << 4) & 0x30303030;
+            r.vi[i] = dpct::vectorized_binary<sycl::char4>(vil | vih, 0x20202020, dpct::sub_sat());
+            r.dsc[i] = d * (float) w->scales[scale_offset + 4 * i];
+        }
         return r;
     }
     static float apply(const W& r, const Q81Block* __restrict__ x, int iqs) {
-        int u[2];
-        float d8[2];
+        float sumf = 0.0f;
+#pragma unroll
+        for (int i = 0; i < 2; ++i) {
+            const int u = reinterpret_cast<const int*>(x[r.bq8_offset + 2 * i].qs)[iqs % 8];
+            sumf += x[r.bq8_offset + 2 * i].ds[0] * r.dsc[i] * (float) strata::dp4a(r.vi[i], u, 0);
+        }
+        return sumf;
+    }
+    // SYCL port, row-blocked kernel: the activation's part for this (block, lane), loaded once per column and
+    // reused across the warp's rows.
+    struct A { int u[2]; float ds[2]; };
+    static A acts(const Q81Block* __restrict__ x, int iqs) {
+        A a;
+        const int bq8_offset = 4 * (iqs / 16) + (iqs % 16) / 8;
 #pragma unroll
         for (int i = 0; i < 2; ++i) {
-            u[i] = reinterpret_cast<const int*>(x[r.bq8_offset + 2 * i].qs)[iqs % 8];
-            d8[i] = x[r.bq8_offset + 2 * i].ds[0];
+            a.u[i] = reinterpret_cast<const int*>(x[bq8_offset + 2 * i].qs)[iqs % 8];
+            a.ds[i] = x[bq8_offset + 2 * i].ds[0];
         }
-        return q6_q8_dot_impl(r.vl, r.vh, u, r.scales, r.d, d8);
+        return a;
+    }
+    static float dot(const W& r, const A& a) {
+        return a.ds[0] * r.dsc[0] * (float) strata::dp4a(r.vi[0], a.u[0], 0) +
+               a.ds[1] * r.dsc[1] * (float) strata::dp4a(r.vi[1], a.u[1], 0);
     }
 };
 struct IQ4XSTraits {
@@ -1233,6 +1257,61 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
     }
 }
 
+// ---------------------------------------------------------------- SYCL port: row-blocked mmvq
+//
+// Measured on the B70 (mmvq_bench): the shared kernel above spends its time re-reading the activation - every
+// row's work-group loads all NCOLS columns of it again, and a 4-warp work-group per row ends in a barrier and an
+// SLM reduction for ten blocks of work. Here each warp owns RPW rows outright: per 256-block it loads the
+// activation parts once for all columns and the RPW weight parts once, does RPW x NCOLS dots, and reduces its
+// own lanes at the end. No barrier, no SLM. Only for traits with acts()/dot() (Q6_K so far).
+template <typename F, int NCOLS, int RPW>
+void native_mmvq_rowwarp_kernel(const typename F::Block* __restrict__ w, const Q81Block* __restrict__ x,
+                                float* __restrict__ y, int n_in, int n_out) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
+    const int row0 = (int(item.get_group(2)) * WARPS + warp) * RPW;
+    const int blocks_per_row = n_in / F::DIV, x_stride = n_in / Q8K;
+    const int kqs = F::kqs(lane);
+    float tmp[RPW][NCOLS] = {};
+    for (int kbx = lane / F::T; kbx < blocks_per_row; kbx += WARP / F::T) {
+        const int kby = kbx * F::KBY;
+        typename F::A a[NCOLS];
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) a[j] = F::acts(x + std::size_t(j) * x_stride + kby, kqs);
+#pragma unroll
+        for (int r = 0; r < RPW; ++r) {
+            if (row0 + r >= n_out) break;
+            const typename F::W wv = F::load(w + std::size_t(row0 + r) * blocks_per_row + kbx, kqs);
+#pragma unroll
+            for (int j = 0; j < NCOLS; ++j) tmp[r][j] += F::dot(wv, a[j]);
+        }
+    }
+    auto sg = item.get_sub_group();
+#pragma unroll
+    for (int r = 0; r < RPW; ++r)
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) {
+            float v = tmp[r][j];
+#pragma unroll
+            for (int o = WARP / 2; o > 0; o >>= 1) v += dpct::experimental::permute_sub_group_by_xor(0xffffffffu, sg, v, o);
+            if (lane == 0 && row0 + r < n_out) y[std::size_t(j) * n_out + row0 + r] = v;
+        }
+}
+
+template <typename F, int NCOLS, int RPW>
+void launch_rowwarp(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const typename F::Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const unsigned blocks = unsigned((std::size_t(n_out) + WARPS * RPW - 1) / (WARPS * RPW));
+    s->parallel_for<dpct_kernel_name<class native_mmvq_rowwarp, F, dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<RPW>>>(
+        sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_rowwarp_kernel<F, NCOLS, RPW>(w, x, y, n_in, n_out); });
+}
+inline int rowwarp_rpw() {   // STRATA_MMVQ_RPW: 0 = the shared kernel, 1/2/4 = rows per warp (bench knob)
+    static const int v = std::getenv("STRATA_MMVQ_RPW") ? std::atoi(std::getenv("STRATA_MMVQ_RPW")) : 0;   // default: the shared kernel (measured equal at warm clocks)
+    return v;
+}
+
 template <typename F, int NCOLS>
 void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
                     int n_out, dpct::queue_ptr s) {
@@ -1240,7 +1319,8 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
     const auto* x = static_cast<const Q81Block*>(x_q8_1);
     if (!g_multi_exact) {
         constexpr int NW = NCOLS <= 4 ? 4 : 2;
-        const unsigned blocks = unsigned((std::size_t(n_out) + 1) / 2);
+        constexpr int ROWS = 1;   // SYCL port: one row per work-group (more groups: the kernel is latency-bound here)
+        const unsigned blocks = unsigned((std::size_t(n_out) + ROWS - 1) / ROWS);
         /*
         DPCT1049:207: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
@@ -1261,8 +1341,8 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        native_mmvq_multi_kernel<F, NCOLS, NW, 2>(w, x, y, n_in,
-                                                                  n_out);
+                        native_mmvq_multi_kernel<F, NCOLS, NW, ROWS>(w, x, y, n_in,
+                                                                     n_out);
                     });
         }
         return;
@@ -1884,6 +1964,16 @@ void native_q4_k_f32(const void* weights, const float* x, void* scratch_q8_1,
 
 void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
                       int n_in, int n_out, int ncols, void* stream) {
+    // SYCL port: the row-blocked kernel for the decode shapes (ncols <= 4)
+    if (ncols >= 1 && ncols <= 4 && rowwarp_rpw() > 0 && n_in % 256 == 0) {
+        dpct::queue_ptr s = strata::q_of(stream);
+        const int rpw = rowwarp_rpw();
+#define STRATA_RW(NC, RP) if (ncols == NC && rpw == RP) { launch_rowwarp<Q6KTraits, NC, RP>(weights, x_q8_1, y, n_in, n_out, s); return; }
+        STRATA_RW(1, 1) STRATA_RW(1, 2) STRATA_RW(1, 4) STRATA_RW(2, 1) STRATA_RW(2, 2) STRATA_RW(2, 4)
+        STRATA_RW(3, 1) STRATA_RW(3, 2) STRATA_RW(3, 4) STRATA_RW(4, 1) STRATA_RW(4, 2) STRATA_RW(4, 4)
+#undef STRATA_RW
+    }
+
     validate_shape(n_in, ncols, 256);
     if (n_out <= 0) throw std::invalid_argument("native MMVQ requires n_out > 0");
     validate_pointer(weights);
diff --git a/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
index 4db6c40a7bf..4014fdfb65b 100644
--- a/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
@@ -41,7 +41,7 @@ constexpr int QK_S2 = 64;
 constexpr int MAX_SHARED_HALVES = 4096;      // 8 KB of shared for x; n_embd 2560 fits with room
 
 // byte -> the four code values with the -1 bias already applied, in element order (bits 0,2,4,6).
-inline dpct::constant_memory<float, 2> c_codes(256, 4);
+inline dpct::constant_memory<float, 2>& c_codes = *new dpct::constant_memory<float, 2>(256, 4);   // never freed: exit-order safe
 
 bool g_lut_ready[64] = {};   // per device: __constant__ memory is per device (a layer split runs on two)
 
diff --git a/sycl/src/kernels/mmvq_bench.cpp b/sycl/src/kernels/mmvq_bench.cpp
new file mode 100644
index 00000000000..828b3bae70c
--- /dev/null
+++ b/sycl/src/kernels/mmvq_bench.cpp
@@ -0,0 +1,39 @@
+// sycl/src/kernels/mmvq_bench.cpp - SYCL port: time the dense native_mmvq kernels on random weights.
+//   mmvq_bench [n_in] [n_out] [ncols]      (weights are random bytes: dequant cost is data-independent)
+#include "strata/kernels/native_mmvq.hpp"
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <chrono>
+#include <cstdio>
+#include <cstdlib>
+#include <vector>
+int main(int argc, char** argv) {
+    const int n_in = argc > 1 ? std::atoi(argv[1]) : 2560, n_out = argc > 2 ? std::atoi(argv[2]) : 2560, ncols = argc > 3 ? std::atoi(argv[3]) : 4;
+    sycl::queue* s = &dpct::get_in_order_queue();
+    // Q6_K: 210 bytes per 256 weights
+    const size_t wbytes = (size_t) n_out * (n_in / 256) * 210;
+    std::vector<uint8_t> hw(wbytes);
+    for (size_t i = 0; i < wbytes; ++i) hw[i] = (uint8_t) (i * 2654435761u >> 13);
+    std::vector<float> hx((size_t) ncols * n_in);
+    for (size_t i = 0; i < hx.size(); ++i) hx[i] = (float) ((i * 7919) % 1000) / 500.f - 1.f;
+    void* w = sycl::malloc_device(wbytes, *s);
+    float* x = sycl::malloc_device<float>(hx.size(), *s);
+    void* xq = sycl::malloc_device((size_t) ncols * (n_in / 32) * 36, *s);
+    float* y = sycl::malloc_device<float>((size_t) ncols * n_out, *s);
+    s->memcpy(w, hw.data(), wbytes).wait(); s->memcpy(x, hx.data(), hx.size() * 4).wait();
+    strata::kernels::native_quantize_q8_1(x, xq, n_in, ncols, s);
+    {   // warm up until the clocks are up (~300 ms of work), then time
+        const auto w0 = std::chrono::steady_clock::now();
+        while (std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count() < 300) {
+            for (int i = 0; i < 20; ++i) strata::kernels::native_q6_k_mmvq(w, xq, y, n_in, n_out, ncols, s);
+            s->wait();
+        }
+    }
+    const int it = 400;
+    const auto t0 = std::chrono::steady_clock::now();
+    for (int i = 0; i < it; ++i) strata::kernels::native_q6_k_mmvq(w, xq, y, n_in, n_out, ncols, s);
+    s->wait();
+    const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count() / it;
+    std::printf("q6_k mmvq %d x %d, %d cols: %.1f us  (%.1f GB/s of weights)\n", n_in, n_out, ncols, us, wbytes / us / 1e3);
+    return 0;
+}
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 4d7d5092817..f46dc1507f8 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -128,6 +128,15 @@ def native_dp4a(s):
 for rel in all_sources():
     edit(str(rel), native_dp4a)
 
+# 7f. dpct's static global_memory/constant_memory objects destruct after the default queue at exit and segfault
+#     in queue::get_device(). Heap-allocate them and never delete: the process is exiting anyway.
+edit("src/kernels/cuda/native_mmvq.dp.cpp", lambda s: s.replace(
+    "inline dpct::global_memory<int8_t, 1>\n    iq4nl_values(sycl::range(16), {",
+    "inline dpct::global_memory<int8_t, 1>& iq4nl_values = *new dpct::global_memory<int8_t, 1>(sycl::range(16), {"))
+edit("src/kernels/cuda/s2_gemv_fast.dp.cpp", lambda s: s.replace(
+    "inline dpct::constant_memory<float, 2> c_codes(256, 4);",
+    "inline dpct::constant_memory<float, 2>& c_codes = *new dpct::constant_memory<float, 2>(256, 4);   // never freed: exit-order safe"))
+
 # 8. ggml-common.h has a SYCL declaration mode (sycl::half instead of cuda_fp16.h).
 edit("src/kernels/cuda/iq_kernels.dp.cpp", lambda s: s.replace("#define GGML_COMMON_DECL_CUDA", "#define GGML_COMMON_DECL_SYCL")
      .replace("#define GGML_COMMON_IMPL_CUDA", "#define GGML_COMMON_IMPL_SYCL"))

From 6e02addc42a8f7bf5fb56033ec0dbb940662dac3 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 23:19:30 -0500
Subject: [PATCH 015/201] sycl: long prompts - 693 tok/s at 2k tokens; the
 streaming source is a thread-safe 512-slot keyed cache

The prompt path collects hundreds of blob pointers per layer and copies from them on other threads later;
the 8-slot ring handed back pointers that were overwritten by then, and its index was not thread-safe.
Slots are now keyed by (layer, expert), reused oldest-first among 512 (~1.4 GB), under a mutex.

Long prompts also hung in the prompt path's streamed-expert handshake (lent cache slots make experts
non-resident, the host supplies them behind a flag the GPU wait kernel does not see). --no-prefill-borrow
keeps every expert resident and removes the handshake: 2,000 tokens 693 tok/s, 2,185 tokens 560 tok/s,
300 tokens 180 tok/s (llama.cpp on the same card: 150 short, 424 at 105k).

Rig: watchdog reports and kills a hung run at the expected time (EXPECT_S/QUIET_S); --spec 2 default
(20.75 tok/s decode vs 16.95 at spec 4: the suffix drafter accepts 9%).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 .../strata/core/gguf_expert_source.hpp        |  5 +++++
 sycl/src/core/gguf_expert_source.cpp          | 22 ++++++++++++++-----
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/sycl/include/strata/core/gguf_expert_source.hpp b/sycl/include/strata/core/gguf_expert_source.hpp
index a08a0a21b25..b5c4df43030 100644
--- a/sycl/include/strata/core/gguf_expert_source.hpp
+++ b/sycl/include/strata/core/gguf_expert_source.hpp
@@ -15,7 +15,9 @@
 #include "strata/core/expert_source.hpp"
 
 #include <cstdint>
+#include <mutex>
 #include <string>
+#include <unordered_map>
 #include <vector>
 
 namespace strata::core {
@@ -44,7 +46,10 @@ class GgufExpertSource : public ExpertSource {
     std::vector<std::string> names_;
     std::vector<int> layer_fd_;         ///< per layer: index into fds_
     std::vector<std::vector<uint8_t>> ring_;
+    std::vector<int64_t> ring_key_;                 ///< (layer << 20 | expert) held by each slot, -1 = empty
+    std::unordered_map<int64_t, size_t> where_;     ///< key -> slot
     size_t ring_next_ = 0;
+    std::mutex mu_;
     int64_t n_layers_ = 0, n_expert_ = 0;
     int64_t reads_ = 0;
 };
diff --git a/sycl/src/core/gguf_expert_source.cpp b/sycl/src/core/gguf_expert_source.cpp
index ae059587441..c6cb56b9946 100644
--- a/sycl/src/core/gguf_expert_source.cpp
+++ b/sycl/src/core/gguf_expert_source.cpp
@@ -9,14 +9,14 @@
 namespace strata::core {
 
 namespace {
-constexpr size_t kRing = 8;   // blobs alive at once: the fill holds one, verify_slot a second; the rest is slack
+constexpr size_t kRing = 512;   // blobs alive at once: the prompt path holds a layer's worth of streamed experts
 }
 
 GgufExpertSource::~GgufExpertSource() { close(); }
 
 void GgufExpertSource::close() {
     for (int fd : fds_) if (fd >= 0) ::close(fd);
-    fds_.clear(); names_.clear(); layer_fd_.clear(); ring_.clear();
+    fds_.clear(); names_.clear(); layer_fd_.clear(); ring_.clear(); ring_key_.clear(); where_.clear();
     ring_next_ = 0;
 }
 
@@ -43,6 +43,7 @@ bool GgufExpertSource::open(const std::string& shard1, int64_t n_layers, int64_t
         if (fd_of(l, err) < 0) { close(); return false; }
     ring_.resize(kRing);
     for (auto& b : ring_) b.resize((size_t) lay.max_blob);
+    ring_key_.assign(kRing, -1);
     return true;
 }
 
@@ -70,14 +71,25 @@ const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
     const uint64_t at[3] = {0, fm.up_off, fm.down_off};
     const int fd = fds_[(size_t) layer_fd_[(size_t) layer]];
-    std::vector<uint8_t>& buf = ring_[ring_next_];
-    ring_next_ = (ring_next_ + 1) % ring_.size();
+    const int64_t key = ((int64_t) layer << 20) | expert;
+    size_t slot;
+    {
+        std::lock_guard<std::mutex> lk(mu_);
+        auto it = where_.find(key);
+        if (it != where_.end()) { ++reads_; return ring_[it->second].data(); }   // still resident
+        slot = ring_next_;
+        ring_next_ = (ring_next_ + 1) % ring_.size();
+        if (ring_key_[slot] >= 0) where_.erase(ring_key_[slot]);
+        ring_key_[slot] = key;
+        where_[key] = slot;
+    }
+    std::vector<uint8_t>& buf = ring_[slot];
     for (int r = 0; r < 3; ++r) {
         const uint64_t src = lay.gguf_off[(size_t) (3 * layer + r)] + per[r] * (uint64_t) expert;
         uint64_t done = 0;
         while (done < per[r]) {
             const ssize_t n = ::pread(fd, buf.data() + at[r] + done, (size_t) (per[r] - done), (off_t) (src + done));
-            if (n <= 0) return nullptr;
+            if (n <= 0) { std::lock_guard<std::mutex> lk(mu_); where_.erase(key); ring_key_[slot] = -1; return nullptr; }
             done += (uint64_t) n;
         }
     }

From 20e5b1a966f8de6343bda0d3d96a4a33ae3bef60 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 23:51:36 -0500
Subject: [PATCH 016/201] sycl: Q6_K 16-byte-load kernel (wide projections
 only), mmvq bench correctness check; bandwidth probe

bw probe (incompressible data): 4-byte loads stream at 395 GB/s, 16-byte at 596. The Q6_K matvec sits at
130-160 GB/s in every variant tried (lanes per row, rows per warp, unroll, 16-byte loads, software
pipelining): latency-bound on a dependent load->unpack->dp4a chain, not ALU or bandwidth. The 16-byte
kernel is kept for n_out >= 4096 (+13% there, slower on small shapes); rel 5e-8 against the shared one.
Decode 20.80 tok/s (spec 2). The drafter is the lever now: MTP fetch + pack running.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/include/strata/kernels/native_mmvq.hpp | 113 ++++++++++++++++++++
 sycl/src/kernels/cuda/native_mmvq.dp.cpp    | 113 ++++++++++++++++++++
 sycl/src/kernels/mmvq_bench.cpp             |  12 +++
 3 files changed, 238 insertions(+)
 create mode 100644 sycl/include/strata/kernels/native_mmvq.hpp

diff --git a/sycl/include/strata/kernels/native_mmvq.hpp b/sycl/include/strata/kernels/native_mmvq.hpp
new file mode 100644
index 00000000000..a49412449ec
--- /dev/null
+++ b/sycl/include/strata/kernels/native_mmvq.hpp
@@ -0,0 +1,113 @@
+#pragma once
+
+#include <cstddef>
+
+namespace strata::kernels {
+
+// Native GGUF Q2_0, Q4_0, Q5_0, Q8_0, Q3_K, Q4_K, Q5_K, Q6_K, IQ4_NL
+// and IQ4_XS / CUDA Q8_1 adapters, pinned to llama.cpp
+// 3cf03257f219afbe7334045ff7c6a06ac68c627d, sm_120 generic MMVQ.
+// All pointers are device pointers, at least 4-byte aligned, with no overlap.
+// All calls enqueue on the explicit non-null CUDA stream; no allocation or wait.
+// The translation unit must use --use_fast_math, as the pinned CUDA oracle does.
+//
+// Shapes use GGUF order: n_in is the contiguous reduction dimension, n_out is
+// the weight row count, and ncols is the activation column/token count, 1..8
+// (plan v0.3 P3). Columns are contiguous: activation column j is x + j * n_in
+// (its Q8_1 blocks at j * n_in / 32) and output column j is y + j * n_out. See
+// native_mmvq_set_multi_exact for how ncols > 1 relates to ncols == 1.
+// n_in must be a positive multiple of 32 for quantization/Q4_0/Q5_0/Q8_0/IQ4_NL,
+// 64 for Q2_0, or 256 for the other formats. n_out must be positive. Weights remain
+// unmodified row-major GGUF blocks: Q3_K=110, Q4_K=144, Q5_K=176, Q6_K=210 and
+// IQ4_XS=136 bytes per 256 elements; Q2_0 is 18 bytes per 64 elements.
+// Q4_0/IQ4_NL=18, Q5_0=22, Q8_0=34 bytes per 32 elements.
+// Q8_1 scratch has 36 bytes per 32 elements, with no extra row padding here.
+// Input floats must be finite, and their block scales/sums representable in FP16.
+std::size_t native_q8_1_bytes(int n_in, int ncols = 1);
+
+// Layout for ncols > 1. false: llama.cpp's generic multi-column table (upstream), equal to ncols == 1 to
+// float rounding, speed not yet measured. true (default): the ncols == 1 layout, every column bitwise equal to a
+// single-column call. Set before
+// graph capture; captured graphs keep the kernels they captured.
+void native_mmvq_set_multi_exact(bool exact);
+void native_mmvq_set_q6k_wide(bool on);   // SYCL port: the 16-byte-load Q6_K kernel (default on)
+bool native_mmvq_multi_exact();
+
+// One quantization may serve multiple weight matrices sharing the same input.
+// Q8_1 stores FP16 scale and FP16 warp sum of the ORIGINAL float inputs; it does
+// not reconstruct that sum from the quantized integers.
+void native_quantize_q8_1(const float* x, void* x_q8_1, int n_in, int ncols,
+                          void* stream);
+
+void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream);
+
+// Convenience composition: caller owns scratch sized by native_q8_1_bytes.
+void native_q5_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q2_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream);
+
+void native_q2_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q3_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream);
+
+void native_q3_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream);
+
+void native_iq4_xs_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream);
+
+void native_q4_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
+                      int n_in, int n_out, int ncols, void* stream);
+
+void native_q6_k_f32(const void* weights, const float* x, void* scratch_q8_1,
+                     float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q4_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream);
+
+void native_q4_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q5_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream);
+
+void native_q5_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_q8_0_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream);
+
+void native_q8_0_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream);
+
+void native_iq4_nl_mmvq(const void* weights, const void* x_q8_1, float* y,
+                       int n_in, int n_out, int ncols, void* stream);
+
+void native_iq4_nl_f32(const void* weights, const float* x, void* scratch_q8_1,
+                      float* y, int n_in, int n_out, int ncols, void* stream);
+
+// Storage/dispatch helpers take stable GGML type IDs, avoiding a ggml runtime
+// dependency in the engine: Q4_0=2, Q5_0=6, Q8_0=8, Q3_K=11, Q4_K=12, Q5_K=13,
+// Q6_K=14, IQ4_NL=20, IQ4_XS=23, Q2_0=42. Unsupported IDs throw in the byte-count
+// and launch helpers; only the
+// capability query returns false.
+bool native_mmvq_supported(int ggml_type) noexcept;
+std::size_t native_mmvq_weight_bytes(int ggml_type, int n_in, int n_out);
+void native_mmvq(int ggml_type, const void* weights, const void* x_q8_1, float* y,
+                 int n_in, int n_out, int ncols, void* stream);
+
+} // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index cc78c0c4041..61ad826db21 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -41,6 +41,9 @@
 namespace strata::kernels {
 namespace {
 
+#ifndef STRATA_MMVQ_UNROLL
+#define STRATA_MMVQ_UNROLL 2
+#endif
 constexpr int QK = 256;
 constexpr int Q8K = 32;
 constexpr int QI = 32;
@@ -1198,6 +1201,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
     const int blocks_per_row = n_in / F::DIV;
     const int x_stride = n_in / Q8K;                   // Q8_1 blocks per activation column
     float tmp[NCOLS][ROWS] = {};
+#pragma unroll STRATA_MMVQ_UNROLL   // SYCL port: several 256-blocks' loads in flight per warp (bytes in flight, not ALU)
     for (int kbx = tid / F::T; kbx < blocks_per_row; kbx += BPI) {
         const int kby = kbx * F::KBY;
         const int kqs = F::kqs(tid);
@@ -1298,6 +1302,104 @@ void native_mmvq_rowwarp_kernel(const typename F::Block* __restrict__ w, const Q
         }
 }
 
+// ---------------------------------------------------------------- SYCL port: Q6_K with 16-byte loads
+//
+// bw probe on the B70: 4-byte loads per lane stream at 395 GB/s, 16-byte at 596; the shared kernel above does
+// 4-byte loads and measures 130-140 GB/s on the 8192-wide Q6_K projections. Here 8 lanes share a 256-block:
+// lane g takes positions iqs = 4g..4g+3, so its ql (16 B), qh (16 B) and each column's q8 ints (16 B) are one
+// vector load each; a 32-lane sub-group has four blocks in flight. One row per warp, WARPS rows per group.
+template <int NCOLS, int RPW>
+void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block* __restrict__ x,
+                                 float* __restrict__ y, int n_in, int n_out) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
+    const int row0 = (int(item.get_group(2)) * WARPS + warp) * RPW;
+    if (row0 >= n_out) return;
+    const int blocks_per_row = n_in / QK, x_stride = n_in / Q8K;
+    const int g = lane & 7, sub = lane >> 3;            // position group within the block, block within the iteration
+    const int vh_shift = 2 * ((g & 3) >> 1);
+    const int qh4_idx = 2 * (g >> 2) + (g & 1);
+    const int scale_offset = 8 * (g >> 2) + (g & 3);
+    const int bq8_offset = 4 * (g >> 2) + ((g & 3) >> 1);
+    const int u_int4 = g & 1;                           // ints 4(g%2)..+3 of the q8 block = one int4
+    float acc[RPW][NCOLS] = {};
+    for (int kbx = sub; kbx < blocks_per_row; kbx += 4) {
+        const int kby = kbx * (QK / Q8K);
+        sycl::int4 ql4[RPW], qh4[RPW]; float dsc0[RPW], dsc1[RPW];
+#pragma unroll
+        for (int r = 0; r < RPW; ++r) {
+            const Q6KBlock* b = w + std::size_t(row0 + (row0 + r < n_out ? r : 0)) * blocks_per_row + kbx;
+            ql4[r] = reinterpret_cast<const sycl::int4*>(b->ql)[g];
+            qh4[r] = reinterpret_cast<const sycl::int4*>(b->qh)[qh4_idx];
+            const float d = b->d;
+            dsc0[r] = d * (float) b->scales[scale_offset]; dsc1[r] = d * (float) b->scales[scale_offset + 4];
+        }
+        // the activations once per column, shared by the RPW rows
+        sycl::int4 u0[NCOLS], u1[NCOLS];
+        float ds0[NCOLS], ds1[NCOLS];
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) {
+            const Q81Block* xb = x + std::size_t(j) * x_stride + kby + bq8_offset;
+            u0[j] = reinterpret_cast<const sycl::int4*>(xb[0].qs)[u_int4];
+            u1[j] = reinterpret_cast<const sycl::int4*>(xb[2].qs)[u_int4];
+            ds0[j] = xb[0].ds[0]; ds1[j] = xb[2].ds[0];
+        }
+#pragma unroll
+        for (int r = 0; r < RPW; ++r) {
+            const int vl[4] = {ql4[r].x(), ql4[r].y(), ql4[r].z(), ql4[r].w()};
+            const int vh[4] = {qh4[r].x() >> vh_shift, qh4[r].y() >> vh_shift, qh4[r].z() >> vh_shift, qh4[r].w() >> vh_shift};
+            int vi0[4], vi1[4];
+#pragma unroll
+            for (int p = 0; p < 4; ++p) {
+                vi0[p] = dpct::vectorized_binary<sycl::char4>((vl[p] & 0x0f0f0f0f) | ((vh[p] << 4) & 0x30303030), 0x20202020, dpct::sub_sat());
+                vi1[p] = dpct::vectorized_binary<sycl::char4>(((vl[p] >> 4) & 0x0f0f0f0f) | (((vh[p] >> 4) << 4) & 0x30303030), 0x20202020, dpct::sub_sat());
+            }
+#pragma unroll
+            for (int j = 0; j < NCOLS; ++j) {
+                int s0 = 0, s1 = 0;
+                s0 = strata::dp4a(vi0[0], u0[j].x(), s0); s0 = strata::dp4a(vi0[1], u0[j].y(), s0);
+                s0 = strata::dp4a(vi0[2], u0[j].z(), s0); s0 = strata::dp4a(vi0[3], u0[j].w(), s0);
+                s1 = strata::dp4a(vi1[0], u1[j].x(), s1); s1 = strata::dp4a(vi1[1], u1[j].y(), s1);
+                s1 = strata::dp4a(vi1[2], u1[j].z(), s1); s1 = strata::dp4a(vi1[3], u1[j].w(), s1);
+                acc[r][j] += ds0[j] * dsc0[r] * (float) s0 + ds1[j] * dsc1[r] * (float) s1;
+            }
+        }
+    }
+    auto sg = item.get_sub_group();
+#pragma unroll
+    for (int r = 0; r < RPW; ++r)
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) {
+            float v = acc[r][j];
+#pragma unroll
+            for (int o = WARP / 2; o > 0; o >>= 1) v += dpct::experimental::permute_sub_group_by_xor(0xffffffffu, sg, v, o);
+            if (lane == 0 && row0 + r < n_out) y[std::size_t(j) * n_out + row0 + r] = v;
+        }
+}
+inline int q6k_wide_rpw() {
+    static const int v = std::getenv("STRATA_MMVQ_WIDE_RPW") ? std::atoi(std::getenv("STRATA_MMVQ_WIDE_RPW")) : 1;
+    return v;
+}
+template <int NCOLS>
+void launch_q6k_wide(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const Q6KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const int rpw = q6k_wide_rpw();
+#define STRATA_Q6W(RP) if (rpw == RP) { \
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS * RP - 1) / (WARPS * RP)); \
+        s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide, dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<RP>>>( \
+            sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)), \
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_wide_kernel<NCOLS, RP>(w, x, y, n_in, n_out); }); \
+        return; }
+    STRATA_Q6W(1) STRATA_Q6W(2) STRATA_Q6W(4)
+#undef STRATA_Q6W
+    const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+    s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide1, dpct_kernel_scalar<NCOLS>>>(
+        sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_wide_kernel<NCOLS, 1>(w, x, y, n_in, n_out); });
+}
+bool g_q6k_wide = std::getenv("STRATA_MMVQ_WIDE") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_WIDE")) != 0;
+
 template <typename F, int NCOLS, int RPW>
 void launch_rowwarp(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
     const auto* w = static_cast<const typename F::Block*>(weights);
@@ -1544,6 +1646,7 @@ void small_f32(const void* weights, const float* x, void* scratch_q8_1,
 } // namespace
 
 void native_mmvq_set_multi_exact(bool exact) { g_multi_exact = exact; }
+void native_mmvq_set_q6k_wide(bool on) { g_q6k_wide = on; }
 bool native_mmvq_multi_exact() { return g_multi_exact; }
 
 std::size_t native_q8_1_bytes(int n_in, int ncols) {
@@ -1964,6 +2067,16 @@ void native_q4_k_f32(const void* weights, const float* x, void* scratch_q8_1,
 
 void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
                       int n_in, int n_out, int ncols, void* stream) {
+    // SYCL port: 16-byte-load kernel for the decode shapes (ncols <= 4)
+    if (g_q6k_wide && ncols >= 1 && ncols <= 4 && n_in % 256 == 0 && n_out >= 4096) {   // measured: wins only on the wide projections
+        dpct::queue_ptr s = strata::q_of(stream);
+        switch (ncols) {
+            case 1: launch_q6k_wide<1>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 2: launch_q6k_wide<2>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 3: launch_q6k_wide<3>(weights, x_q8_1, y, n_in, n_out, s); return;
+            default: launch_q6k_wide<4>(weights, x_q8_1, y, n_in, n_out, s); return;
+        }
+    }
     // SYCL port: the row-blocked kernel for the decode shapes (ncols <= 4)
     if (ncols >= 1 && ncols <= 4 && rowwarp_rpw() > 0 && n_in % 256 == 0) {
         dpct::queue_ptr s = strata::q_of(stream);
diff --git a/sycl/src/kernels/mmvq_bench.cpp b/sycl/src/kernels/mmvq_bench.cpp
index 828b3bae70c..6bc370a160b 100644
--- a/sycl/src/kernels/mmvq_bench.cpp
+++ b/sycl/src/kernels/mmvq_bench.cpp
@@ -7,6 +7,7 @@
 #include <cstdio>
 #include <cstdlib>
 #include <vector>
+#include <cmath>
 int main(int argc, char** argv) {
     const int n_in = argc > 1 ? std::atoi(argv[1]) : 2560, n_out = argc > 2 ? std::atoi(argv[2]) : 2560, ncols = argc > 3 ? std::atoi(argv[3]) : 4;
     sycl::queue* s = &dpct::get_in_order_queue();
@@ -14,6 +15,7 @@ int main(int argc, char** argv) {
     const size_t wbytes = (size_t) n_out * (n_in / 256) * 210;
     std::vector<uint8_t> hw(wbytes);
     for (size_t i = 0; i < wbytes; ++i) hw[i] = (uint8_t) (i * 2654435761u >> 13);
+    for (size_t b = 0; b < wbytes / 210; ++b) { hw[b * 210 + 208] = 0x00; hw[b * 210 + 209] = 0x3c; }   // d = 1.0 (finite)
     std::vector<float> hx((size_t) ncols * n_in);
     for (size_t i = 0; i < hx.size(); ++i) hx[i] = (float) ((i * 7919) % 1000) / 500.f - 1.f;
     void* w = sycl::malloc_device(wbytes, *s);
@@ -22,6 +24,16 @@ int main(int argc, char** argv) {
     float* y = sycl::malloc_device<float>((size_t) ncols * n_out, *s);
     s->memcpy(w, hw.data(), wbytes).wait(); s->memcpy(x, hx.data(), hx.size() * 4).wait();
     strata::kernels::native_quantize_q8_1(x, xq, n_in, ncols, s);
+    {   // correctness: the 16-byte kernel against the shared one
+        std::vector<float> y0((size_t) ncols * n_out), y1(y0.size());
+        strata::kernels::native_mmvq_set_q6k_wide(false);
+        strata::kernels::native_q6_k_mmvq(w, xq, y, n_in, n_out, ncols, s); s->wait(); s->memcpy(y0.data(), y, y0.size() * 4).wait();
+        strata::kernels::native_mmvq_set_q6k_wide(true);
+        strata::kernels::native_q6_k_mmvq(w, xq, y, n_in, n_out, ncols, s); s->wait(); s->memcpy(y1.data(), y, y1.size() * 4).wait();
+        double num = 0, den = 0; for (size_t i = 0; i < y0.size(); ++i) { num += std::fabs((double) y0[i] - y1[i]); den += std::fabs((double) y0[i]); }
+        std::printf("wide vs shared: rel %.3e over %zu outputs (first %g vs %g)\n", num / (den > 0 ? den : 1), y0.size(), y0[0], y1[0]);
+        strata::kernels::native_mmvq_set_q6k_wide(std::getenv("STRATA_MMVQ_WIDE") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_WIDE")) != 0);
+    }
     {   // warm up until the clocks are up (~300 ms of work), then time
         const auto w0 = std::chrono::steady_clock::now();
         while (std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count() < 300) {

From 8303db20c4db7d47d0e9531994489587defb5a1c Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 23:53:00 -0500
Subject: [PATCH 017/201] docs: like-for-like against llama.cpp on the same
 prompt - prompt 560 vs 138-319 tok/s, decode 20.8 vs 24-26

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md     |  2 +-
 docs/INTEL.md | 34 +++++++++++++++++++++++++---------
 2 files changed, 26 insertions(+), 10 deletions(-)

diff --git a/README.md b/README.md
index 8dfe18649a2..6fbd3fa48af 100644
--- a/README.md
+++ b/README.md
@@ -33,7 +33,7 @@ of a word): faster than you can read.
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
 > | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
-> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL and **generating correct text on the B70** at 15 tok/s decode, 29 tok/s prompt reading (AOT build; kernels untuned, tensor-core paths still scalar); `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
+> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL, generating correct text on the B70. Same prompt, same card vs llama.cpp: **prompt 560 vs 138-319 tok/s**, decode 20.8 vs 24-26 tok/s. `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index 5ea707f4cbc..f2b6794cd57 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -159,14 +159,25 @@ that returns the n-th Fibonacci number", greedy, 64 tokens:
 > options: 1. **Recursive approach** - Simple but O(2^n) time complexity, very slow for large n. 2.
 > **Iterative approach** - O(n) time, O(1) ...
 
-Measured, ahead-of-time build (`-DSTRATA_SYCL_AOT=bmg-g31`): **15.2 tok/s decode** (32 tokens in 2.1 s,
-1.23 tokens per speculative round of 6), **28.8 tok/s prompt reading**, first token 0.85 s after the
-prompt. A window of 4 tokens through all 48 layers takes 73 ms on the card. llama.cpp's SYCL build does
-23-25 tok/s on the same card; Strata's kernels have had no tuning for Xe2 yet and its tensor-core paths
-are still the scalar fallbacks. Without AOT the runtime JIT-compiles every kernel on first use, ~47 s the
-first time a process runs; `SYCL_CACHE_PERSISTENT=1 SYCL_CACHE_DIR=<dir>` keeps that across runs (15 MB,
-second start 15.6 tok/s from the first token) - the segfault llama.cpp's build has with the persistent
-cache did not show up here.
+Measured on the same card, same 2,185-token prompt, 64 greedy tokens (AOT build, `--spec 2`,
+`--no-prefill-borrow`), against llama.cpp's SYCL build serving the same GGUF:
+
+| | llama.cpp SYCL | Strata SYCL port |
+|---|---|---|
+| prompt reading | 138-319 tok/s | **560 tok/s** (693 at 2,000 tokens, 180 at 300) |
+| decode | 24.2-26.0 tok/s | 20.2-20.8 tok/s |
+
+Prompt reading is where Strata's design pays (oneMKL GEMM over dequantised experts, the whole model on
+the card). Decode is at ~80%: a speculative round costs ~53 ms whatever its size and the suffix drafter
+is accepted 9% of the time, so nearly every round yields one token; `--spec 4` (16.9 tok/s) was worse
+than `--spec 2` (20.8) for that reason. The kernels themselves run at 130-160 GB/s of weights on a card
+that streams 600 GB/s (`sycl/probe/bw.cpp`, incompressible data) - the same class llama.cpp reaches -
+and five variants of the hot Q6_K matvec (lanes per row, rows per warp, unroll, 16-byte loads, software
+pipelining; `mmvq_bench`) all landed in that band. The lever left for decode is the draft source: the
+base model's MTP layer (`tools/mtp_fetch.py` + `mtp_pack.py`) is being tried.
+
+Without AOT the runtime JIT-compiles every kernel on first use, ~47 s the first time a process runs;
+`SYCL_CACHE_PERSISTENT=1 SYCL_CACHE_DIR=<dir>` keeps that across runs (15 MB).
 
 How to run it (all of this is what `coderiq1/sycl/run-engine-test.sh` does):
 
@@ -183,6 +194,8 @@ build-sycl/strata --pack <iq pack> --native <shard1> --ple-gguf <shard2> \
 - `STRATA_VERIFY_DEVICE_PLAN=1`: the GPU plans each layer itself (upstream's E-6; off by default there).
 - `STRATA_VERIFY_NO_HOST=1` (this port): the host waits for the whole window graph instead of per-layer
   rings. Only valid with every expert resident, which is the case on a 32 GB card.
+- `--no-prefill-borrow`: the prompt path must not lend expert slots (a lent expert is served from the host
+  behind a flag the GPU does not see reliably here; long prompts hung without it).
 
 What the port had to get right beyond compiling (each is an entry in `sycl/tools/fixups.py` or a flag):
 
@@ -201,7 +214,10 @@ What the port had to get right beyond compiling (each is an entry in `sycl/tools
 - `native_expert_parity` hand-ported: the GPU native expert kernel matches ggml's float reference on real
   IQ1_M rows (rel 1.1e-2, the same class as the CPU path).
 
-Known: the process segfaults at exit (teardown order; the output is complete by then).
+Profiling: `sycl/tools/Dockerfile.unitrace` builds the dev image with Intel's unitrace; `unitrace -d` around
+the engine plus `sycl/rank_kernels.py` gives device time per kernel. `mmvq_bench` and `native_expert_parity
+NATIVE_BENCH=1` time the two hot kernel families in isolation (warm the clocks first: a 5 ms run measures
+the ramp, not the kernel).
 
 **Not ported yet.**
 

From 511ae759e2e2ae0c10612cfb6b2b868ecd54ce98 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 23:58:26 -0500
Subject: [PATCH 018/201] docs: 45.3 tok/s decode with the base model's MTP
 draft layer (87% accepted) - 1.8x llama.cpp on the same card

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 README.md     |  2 +-
 docs/INTEL.md | 10 +++++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index 6fbd3fa48af..b77fadfc36b 100644
--- a/README.md
+++ b/README.md
@@ -33,7 +33,7 @@ of a word): faster than you can read.
 > | Engine | llama.cpp 0.4.1-dev (b29c606), community SYCL build for the B70, oneAPI 2026.1, `ghcr.io/snailium/llama.cpp-sycl-intel-b70` |
 > | Model | Qwen3.8-Flash-Next GSQ-RCO **Coder**, IQ1_M: all 29.6 GB of shard 1 on the card |
 > | Measured | 23-25 tok/s decode (GPU-bound); prompt reading 150 tok/s on short prompts, 424 tok/s at 105k tokens; 128k context fits on the card; correct code; see [docs/INTEL.md](docs/INTEL.md) |
-> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL, generating correct text on the B70. Same prompt, same card vs llama.cpp: **prompt 560 vs 138-319 tok/s**, decode 20.8 vs 24-26 tok/s. `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
+> | SYCL port of the engine | `sycl/`: the CUDA engine migrated to SYCL, generating correct text on the B70. Same prompt, same card vs llama.cpp: **prompt 560 vs 138-319 tok/s, decode 45 vs 24-26 tok/s** (with the base model's MTP draft layer). `--stream-experts` fills the VRAM cache straight from the GGUF, so it runs on 23 GiB of RAM - [details](docs/INTEL.md#the-engine-itself-on-intel-the-sycl-port-sycl) |
 >
 > No CUDA, no compiler: `./setup.sh` detects the Arc and does the rest. Not yet on this path: images
 > and MTP speculative decoding. Everything below this box is the original README for NVIDIA cards.
diff --git a/docs/INTEL.md b/docs/INTEL.md
index f2b6794cd57..33c5ff47380 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -165,7 +165,8 @@ Measured on the same card, same 2,185-token prompt, 64 greedy tokens (AOT build,
 | | llama.cpp SYCL | Strata SYCL port |
 |---|---|---|
 | prompt reading | 138-319 tok/s | **560 tok/s** (693 at 2,000 tokens, 180 at 300) |
-| decode | 24.2-26.0 tok/s | 20.2-20.8 tok/s |
+| decode, suffix drafter only (`--spec 2`) | 24.2-26.0 tok/s | 20.2-20.8 tok/s |
+| decode with the MTP draft layer (`--spec 4 --mtp`) | - | **45.3 tok/s** (drafts accepted 87%, 3.4 tokens per round) |
 
 Prompt reading is where Strata's design pays (oneMKL GEMM over dequantised experts, the whole model on
 the card). Decode is at ~80%: a speculative round costs ~53 ms whatever its size and the suffix drafter
@@ -173,8 +174,11 @@ is accepted 9% of the time, so nearly every round yields one token; `--spec 4` (
 than `--spec 2` (20.8) for that reason. The kernels themselves run at 130-160 GB/s of weights on a card
 that streams 600 GB/s (`sycl/probe/bw.cpp`, incompressible data) - the same class llama.cpp reaches -
 and five variants of the hot Q6_K matvec (lanes per row, rows per warp, unroll, 16-byte loads, software
-pipelining; `mmvq_bench`) all landed in that band. The lever left for decode is the draft source: the
-base model's MTP layer (`tools/mtp_fetch.py` + `mtp_pack.py`) is being tried.
+pipelining; `mmvq_bench`) all landed in that band. The draft source was the lever: the base
+Qwen3.8-Flash-Next checkpoint's MTP layer (`tools/mtp_fetch.py fetch`, `mtp_pack.py --experts q2_0`,
+`mtp_rt.py`; 4.9 GB downloaded, 809 MiB of VRAM) drafts for the Coder fine-tune at 87% acceptance:
+3.4 tokens per 53 ms round, 45 tok/s, the same greedy tokens. The `mtp.cpp` path ran on the first try
+under the same flags.
 
 Without AOT the runtime JIT-compiles every kernel on first use, ~47 s the first time a process runs;
 `SYCL_CACHE_PERSISTENT=1 SYCL_CACHE_DIR=<dir>` keeps that across runs (15 MB).

From 52fb6386d8cb8c8af3fa68759ed1c24f3d029a41 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Tue, 29 Sep 2026 23:59:36 -0500
Subject: [PATCH 019/201] docs: 42.7 tok/s decode at the 2,185-token context
 with MTP (prompt 475 tok/s in the same run)

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 33c5ff47380..c8e3e8ffac7 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -166,7 +166,7 @@ Measured on the same card, same 2,185-token prompt, 64 greedy tokens (AOT build,
 |---|---|---|
 | prompt reading | 138-319 tok/s | **560 tok/s** (693 at 2,000 tokens, 180 at 300) |
 | decode, suffix drafter only (`--spec 2`) | 24.2-26.0 tok/s | 20.2-20.8 tok/s |
-| decode with the MTP draft layer (`--spec 4 --mtp`) | - | **45.3 tok/s** (drafts accepted 87%, 3.4 tokens per round) |
+| decode with the MTP draft layer (`--spec 4 --mtp`) | - | **42.7 tok/s** at the 2,185-token context (81% accepted, 2.9 tokens/round); 45.3 on a short prompt |
 
 Prompt reading is where Strata's design pays (oneMKL GEMM over dequantised experts, the whole model on
 the card). Decode is at ~80%: a speculative round costs ~53 ms whatever its size and the suffix drafter

From c3bb85bd6a281eeafce71b4f5520ae8d596da2e1 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 01:01:25 -0500
Subject: [PATCH 020/201] sycl: refresh the port for upstream 0.1.25-0.1.27
 (re-migration merge), AOT divide rounding, hybrid K8V4 KV

The merge of upstream main (a790805) left 28 migrated copies behind. They are refreshed by re-migration:
dpct over the old and the merged tree, sycl/tools/normalize.sh (dpct's names, unchanged files, message
serials, fixups.py) on both, then a 3-way merge per file. Copies dpct never produced (verify.cpp, mtp.cpp)
take upstream's K8V4 diff by hand. The PTX gate fixup follows upstream's new __HIPCC__ guard (#elif).

The AOT build never received -cl-fp32-correctly-rounded-divide-sqrt (it went to the spir64 backend, which
an AOT build does not have): quantize_act_parity had its 303k mismatches back. The option now reaches
ocloc through -device "... -options ...". 19 of 22 parity tests pass again; kv_hybrid_parity (new) passes
all but its tensor-core step and is built, not registered.

B70, merged engine, AOT, --stream-experts --no-prefill-borrow --spec 4 --mtp: 2,184-token prompt 566.5
tok/s (was 475), decode 38.3 tok/s at that context (was 42.7; 77% draft acceptance on this text), MTP
prompt pass 38.6 ms (E-9 batched).

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  18 +
 sycl/CMakeLists.txt                           |  17 +-
 sycl/include/strata/core/mtp.hpp              |  20 +
 sycl/include/strata/core/on_device.hpp        |   4 +-
 sycl/include/strata/kernels/bf16_bits.hpp     |  10 +-
 sycl/include/strata/kernels/f16_bits.hpp      |  10 +-
 sycl/include/strata/kernels/mrope.hpp         |   4 +-
 sycl/include/strata/kernels/rope.hpp          |   2 +-
 sycl/src/core/concurrent_main.cpp             |  12 +-
 sycl/src/core/device.dp.cpp                   |  49 +-
 sycl/src/core/expert_cache.cpp                |  86 ++-
 sycl/src/core/expert_source.cpp               | 609 +++++++++++++++++-
 sycl/src/core/graph.cpp                       |  40 +-
 sycl/src/core/layer.cpp                       |  98 ++-
 sycl/src/core/mtp.cpp                         |  64 +-
 sycl/src/core/native_dense.cpp                |  18 +-
 sycl/src/core/native_head.cpp                 |  18 +-
 sycl/src/core/overlap_main.cpp                |  14 +-
 sycl/src/core/pinned.dp.cpp                   |  22 +-
 sycl/src/core/remote_experts.cpp              |  36 +-
 sycl/src/core/session.cpp                     | 118 ++--
 sycl/src/core/verify.cpp                      |  71 +-
 sycl/src/core/weights.cpp                     |   6 +-
 sycl/src/kernels/bf16_gemv_parity.cpp         |   6 +-
 sycl/src/kernels/cuda/bf16_gemv.dp.cpp        |  10 +-
 sycl/src/kernels/cuda/cvec.dp.cpp             |  28 +-
 sycl/src/kernels/cuda/dequant_bf16.dp.cpp     |   6 +-
 sycl/src/kernels/cuda/elementwise.dp.cpp      |  30 +-
 sycl/src/kernels/cuda/fused_gdn.dp.cpp        |  36 +-
 sycl/src/kernels/cuda/fused_gr.dp.cpp         | 132 ++--
 sycl/src/kernels/cuda/gdn.dp.cpp              |   8 +-
 sycl/src/kernels/cuda/gr.dp.cpp               |  36 +-
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       |  30 +-
 sycl/src/kernels/cuda/kv_q4.dp.cpp            |  14 +-
 sycl/src/kernels/cuda/kv_q8.dp.cpp            |  10 +-
 sycl/src/kernels/cuda/kv_stream.dp.cpp        |  34 +-
 sycl/src/kernels/cuda/native_bf16.dp.cpp      |  26 +-
 .../src/kernels/cuda/native_flash_attn.dp.cpp |  34 +-
 sycl/src/kernels/cuda/native_gdn.dp.cpp       |  10 +-
 .../kernels/cuda/native_gdn_preprocess.dp.cpp |  22 +-
 sycl/src/kernels/cuda/native_gr_norm.dp.cpp   |  12 +-
 .../src/kernels/cuda/native_gr_postops.dp.cpp |  18 +-
 sycl/src/kernels/cuda/native_mmvq.dp.cpp      |  70 +-
 sycl/src/kernels/cuda/native_moe.dp.cpp       |  16 +-
 .../kernels/cuda/native_ple_postops.dp.cpp    |  44 +-
 sycl/src/kernels/cuda/native_qsa.dp.cpp       |  12 +-
 .../kernels/cuda/native_qsa_indexer.dp.cpp    |  38 +-
 sycl/src/kernels/cuda/native_qsa_score.dp.cpp |  72 ++-
 sycl/src/kernels/cuda/native_rope.dp.cpp      |   8 +-
 sycl/src/kernels/cuda/native_router.dp.cpp    |  26 +-
 sycl/src/kernels/cuda/ple.dp.cpp              |  53 +-
 sycl/src/kernels/cuda/qsa.dp.cpp              |  86 +--
 sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp  | 177 +++--
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp  | 296 +++++----
 sycl/src/kernels/cuda/qsa_select.dp.cpp       | 119 ++--
 sycl/src/kernels/cuda/quantize_act.dp.cpp     |  12 +-
 sycl/src/kernels/cuda/rope.dp.cpp             |   2 +-
 sycl/src/kernels/cuda/router_top10.dp.cpp     |  42 +-
 .../src/kernels/cuda/s2_expert_grouped.dp.cpp |  44 +-
 sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp     |  12 +-
 sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp       |   8 +-
 sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp    |   6 +-
 sycl/src/kernels/cuda/s_gemv.dp.cpp           |  22 +-
 sycl/src/kernels/cuda/sampler.dp.cpp          |  38 +-
 sycl/src/kernels/cuda/shared_expert.dp.cpp    |  20 +-
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   |  76 +--
 sycl/src/kernels/cvec_parity.cpp              |   2 +-
 sycl/src/kernels/dequant_s2_parity.cpp        |   4 +-
 sycl/src/kernels/elementwise_parity.cpp       |  30 +-
 sycl/src/kernels/gdn_parity.cpp               |  32 +-
 sycl/src/kernels/gr_parity.cpp                | 296 ++++++++-
 sycl/src/kernels/iq_parity.cpp                |   4 +-
 sycl/src/kernels/kv_hybrid_parity.cpp         | 478 ++++++++++++++
 sycl/src/kernels/kv_q4_parity.cpp             |  14 +-
 sycl/src/kernels/kv_q8_parity.cpp             |  14 +-
 sycl/src/kernels/kv_stream_parity.cpp         |  22 +-
 sycl/src/kernels/ple_parity.cpp               |  42 +-
 sycl/src/kernels/qsa_parity.cpp               |   2 +-
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |   4 +-
 sycl/src/kernels/qsa_select_bench.cpp         |   4 +-
 sycl/src/kernels/quantize_act_parity.cpp      |   4 +-
 sycl/src/kernels/rope_parity.cpp              |  10 +-
 sycl/src/kernels/router_top10_parity.cpp      |   2 +-
 sycl/src/kernels/s2_gemv_parity.cpp           |   6 +-
 sycl/src/kernels/s2_gemv_q8_parity.cpp        |   8 +-
 sycl/src/kernels/s_gemv_parity.cpp            |  20 +-
 sycl/src/kernels/s_gemv_q8k_parity.cpp        |  10 +-
 sycl/src/kernels/sampler_parity.cpp           |   8 +-
 sycl/src/kernels/shared_expert_parity.cpp     |  42 +-
 sycl/src/prefill/gemm.dp.cpp                  | 285 +++++++-
 sycl/src/prefill/ggml_cuda_host.dp.cpp        |   8 +-
 sycl/src/prefill/kernels.dp.cpp               | 309 +++++++--
 sycl/src/prefill/moe_mmq.dp.cpp               |  14 +-
 sycl/src/prefill/prefill.cpp                  | 441 ++++++++++---
 sycl/src/program/generate.cpp                 | 185 ++++--
 sycl/tools/fixups.py                          |   3 +-
 sycl/tools/normalize.sh                       |  26 +
 97 files changed, 3988 insertions(+), 1488 deletions(-)
 create mode 100644 sycl/src/kernels/kv_hybrid_parity.cpp
 create mode 100755 sycl/tools/normalize.sh

diff --git a/docs/INTEL.md b/docs/INTEL.md
index c8e3e8ffac7..6d5e7e03722 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -151,6 +151,7 @@ need model fixtures (`iq_parity`, `ple_parity`) or the tensor-core kernel below
 | bf16_gemv, cvec, dequant_s2, elementwise, gdn, gr, kv_q4, kv_q8, kv_stream, qsa, quantize_act, rope, router_top10, s2_gemv, s2_gemv_q8, s_gemv, s_gemv_q8k, sampler, shared_expert | pass |
 | iq_parity, ple_parity | need fixtures (a `logs/iq_fixture` directory, a Q2_0 shard) |
 | qsa_prompt_attn_parity | needs the tensor-core kernel (below) |
+| kv_hybrid_parity (0.1.27, hybrid K8V4 KV) | appends, gathers and attention pass; its last step is that same tensor-core kernel |
 
 **The engine end to end (2026-09-29, later the same day).** It generates. Prompt "Write a Python function
 that returns the n-th Fibonacci number", greedy, 64 tokens:
@@ -223,6 +224,23 @@ the engine plus `sycl/rank_kernels.py` gives device time per kernel. `mmvq_bench
 NATIVE_BENCH=1` time the two hot kernel families in isolation (warm the clocks first: a 5 ms run measures
 the ramp, not the kernel).
 
+**Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
+wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
+0.1.25-0.1.27, 2026-09-30):
+
+1. Merge upstream into `b70` and resolve `setup.py` (the Intel path lives beside upstream's AMD one).
+2. Migrate the *old* upstream tree (a `git archive` of the pre-merge commit) with `migrate.sh` into
+   `sycl-base`, and the merged tree into `sycl-new`; about 3 minutes each in the dev image.
+3. `sycl/tools/normalize.sh <dir> <commit>` on both: dpct's file names, the unchanged files, the
+   message serials, then `fixups.py`. Two runs of dpct on the same source now differ only in the kernel
+   name hashes it generates.
+4. For every file present in both: `git merge-file sycl/F sycl-base/F sycl-new/F`. Files upstream did not
+   change are left alone. Copies dpct never produced (`verify.cpp`, `mtp.cpp`, `remote_experts.cpp`
+   include no CUDA header directly) take upstream's diff by hand; new parity tests are copied in and
+   listed in `sycl/CMakeLists.txt`.
+5. A fixup whose pattern upstream changed shows up as a compile error (the PTX gate became an `#elif`
+   under upstream's `__HIPCC__` guard); extend the fixup, re-run it, rebuild.
+
 **Not ported yet.**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 5b260f1e9ef..2ab04dda0ec 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -24,15 +24,20 @@ set(STRATA_SYCL_AOT "" CACHE STRING "AOT device for the GPU code, e.g. bmg-g31 (
 set(_sycl_flags -fsycl)
 if(STRATA_SYCL_AOT)
   list(APPEND _sycl_flags -fsycl-targets=spir64_gen)
-  set(_sycl_link -fsycl -fsycl-targets=spir64_gen -Xsycl-target-backend=spir64_gen "-device ${STRATA_SYCL_AOT}")
+  # the divide/sqrt rounding option (below) must reach ocloc here: an AOT build has no spir64 backend to take it
+  set(_sycl_link -fsycl -fsycl-targets=spir64_gen -Xsycl-target-backend=spir64_gen
+      "-device ${STRATA_SYCL_AOT} -options -cl-fp32-correctly-rounded-divide-sqrt")
 else()
   set(_sycl_link -fsycl)
 endif()
 # The Intel GPU's fp32 divide is not correctly rounded by default (OpenCL allows 2.5 ulp). Strata's quantizers
 # are byte-exact against ggml through `amax / 127`, so the device compiler is told to round divides and sqrt
 # properly; measured: quantize_act_parity goes from 303k mismatches to byte-exact. (Same as
-# SYCL_PROGRAM_COMPILE_OPTIONS=-cl-fp32-correctly-rounded-divide-sqrt at run time.)
-list(APPEND _sycl_link "-Xsycl-target-backend=spir64" "-cl-fp32-correctly-rounded-divide-sqrt")
+# SYCL_PROGRAM_COMPILE_OPTIONS=-cl-fp32-correctly-rounded-divide-sqrt at run time.) The AOT build passes it to
+# ocloc above; without that the 303k mismatches came back on 2026-09-30, unnoticed since the AOT switch.
+if(NOT STRATA_SYCL_AOT)
+  list(APPEND _sycl_link "-Xsycl-target-backend=spir64" "-cl-fp32-correctly-rounded-divide-sqrt")
+endif()
 # Every translation unit gets -fsycl: the migrated host files construct queues and USM, not only the kernels.
 # icpx defaults to a fast floating-point model (reciprocal approximations, reassociation); the kernels are
 # compared byte-for-byte against ggml's, which nvcc built value-safe, so ask for the same here.
@@ -175,6 +180,12 @@ if(STRATA_SYCL_PARITY)
   strata_resolve(_src src/kernels/qsa_prompt_attn_parity.cpp)
   add_executable(qsa_prompt_attn_parity ${_src})
   target_link_libraries(qsa_prompt_attn_parity PRIVATE strata_kernels)
+  # the hybrid K8V4 KV test (upstream 0.1.27) passes its appends, gathers and attention here and fails only its
+  # last step, the same tensor-core prompt kernel. Built, not registered, until that kernel is ported.
+  strata_resolve(_src src/kernels/kv_hybrid_parity.cpp)
+  add_executable(kv_hybrid_parity ${_src})
+  target_include_directories(kv_hybrid_parity PRIVATE ${STRATA_ROOT}/src/kernels)
+  target_link_libraries(kv_hybrid_parity PRIVATE strata_kernels)
   add_executable(mmvq_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_bench.cpp)   # dense mmvq timing
   target_link_libraries(mmvq_bench PRIVATE strata_kernels)
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
diff --git a/sycl/include/strata/core/mtp.hpp b/sycl/include/strata/core/mtp.hpp
index 6469dbb524d..52847e1d8c4 100644
--- a/sycl/include/strata/core/mtp.hpp
+++ b/sycl/include/strata/core/mtp.hpp
@@ -73,6 +73,26 @@ class MtpDrafter {
     double ms_draft = 0, ms_prefill = 0;
     int64_t rounds = 0;
 
+    /// E-9: the prompt path computes this layer's prompt K/V in batches (Prefill::draft_kv): its tensors, its K/V
+    /// state, the first cell a round can still read, its device, and a wait for its own stream.
+    const float* tensor_f32(const char* name) const { return f32(name); }
+    const uint16_t* tensor_bf16(const char* name) const { return bf16(name); }
+    const void* tensor_q8(const char* name) const { return q8(name); }
+    QsaState& kv_state_rw() { return st_; }
+    int64_t first_needed() const { return (window_ > 0 && prompt_len_ > 0) ? prompt_len_ - window_ - 64 : 0; }
+    int device() const { return device_; }
+    bool idle(std::string &err) try {
+        if (cs_ && DPCT_CHECK_ERROR(cs_->wait()) != 0) {
+            err = "mtp: its stream failed"; return false;
+        }
+        return true;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+
 private:
     bool record_forward(int T, int step_row0, dpct::queue_ptr cs,
                         std::string &err);
diff --git a/sycl/include/strata/core/on_device.hpp b/sycl/include/strata/core/on_device.hpp
index b6c620bb805..ee2d7b3b38e 100644
--- a/sycl/include/strata/core/on_device.hpp
+++ b/sycl/include/strata/core/on_device.hpp
@@ -13,7 +13,7 @@ struct OnDevice {
     explicit OnDevice(int device) try {
         int cur = 0;
         /*
-        DPCT1093:7: The "device" device may be not the one intended for use.
+        DPCT1093: The "device" device may be not the one intended for use.
         Adjust the selected device if needed.
         */
         if (device >= 0 &&
@@ -27,7 +27,7 @@ struct OnDevice {
       std::exit(1);
     }
     /*
-    DPCT1093:8: The "previous" device may be not the one intended for use.
+    DPCT1093: The "previous" device may be not the one intended for use.
     Adjust the selected device if needed.
     */
     ~OnDevice() { if (previous >= 0) dpct::select_device(previous); }
diff --git a/sycl/include/strata/kernels/bf16_bits.hpp b/sycl/include/strata/kernels/bf16_bits.hpp
index 11a85f28b1a..a315a8343f4 100644
--- a/sycl/include/strata/kernels/bf16_bits.hpp
+++ b/sycl/include/strata/kernels/bf16_bits.hpp
@@ -22,7 +22,7 @@
 #include <cstdint>
 #include <cstring>
 
-#if defined(SYCL_LANGUAGE_VERSION)
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 #define STRATA_BF16_HD 
 #else
 #define STRATA_BF16_HD
@@ -33,7 +33,11 @@ namespace strata::kernels {
 /// Round-to-nearest-even f32 -> bf16, returned as raw bits in the LOW half of the uint16.
 STRATA_BF16_HD inline uint16_t bf16_from_f32(float f) {
     uint32_t i;
+#if defined(__HIP_DEVICE_COMPILE__)
+    __builtin_memcpy(&i, &f, 4);
+#else
     std::memcpy(&i, &f, 4);
+#endif
     i = (i + ((i >> 16) & 1u) + 0x7FFFu) & 0xFFFF0000u;
     return (uint16_t) (i >> 16);
 }
@@ -42,7 +46,11 @@ STRATA_BF16_HD inline uint16_t bf16_from_f32(float f) {
 STRATA_BF16_HD inline float f32_from_bf16(uint16_t h) {
     const uint32_t i = (uint32_t) h << 16;
     float f;
+#if defined(__HIP_DEVICE_COMPILE__)
+    __builtin_memcpy(&f, &i, 4);
+#else
     std::memcpy(&f, &i, 4);
+#endif
     return f;
 }
 
diff --git a/sycl/include/strata/kernels/f16_bits.hpp b/sycl/include/strata/kernels/f16_bits.hpp
index 3ac2a52457e..cd5625f699c 100644
--- a/sycl/include/strata/kernels/f16_bits.hpp
+++ b/sycl/include/strata/kernels/f16_bits.hpp
@@ -28,7 +28,7 @@
 #include <cstdint>
 #include <cstring>
 
-#if defined(SYCL_LANGUAGE_VERSION)
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 #define STRATA_HD 
 #else
 #define STRATA_HD
@@ -39,7 +39,11 @@ namespace strata::kernels {
 /// Round-to-nearest-even f32 -> fp16, returned as raw bits.
 STRATA_HD inline uint16_t f16_from_f32(float f) {
     uint32_t x;
+#if defined(__HIP_DEVICE_COMPILE__)
+    __builtin_memcpy(&x, &f, 4);
+#else
     std::memcpy(&x, &f, 4);
+#endif
     const uint32_t sign = (x >> 16) & 0x8000u;
     const uint32_t rawexp = (x >> 23) & 0xFFu;
     int exp = (int) rawexp - 127 + 15;
@@ -92,7 +96,11 @@ STRATA_HD inline float f32_from_f16(uint16_t h) {
         out = sign | ((ex - 15 + 127) << 23) | (man << 13);
     }
     float f;
+#if defined(__HIP_DEVICE_COMPILE__)
+    __builtin_memcpy(&f, &out, 4);
+#else
     std::memcpy(&f, &out, 4);
+#endif
     return f;
 }
 
diff --git a/sycl/include/strata/kernels/mrope.hpp b/sycl/include/strata/kernels/mrope.hpp
index 11fcfe1e078..fecd3737857 100644
--- a/sycl/include/strata/kernels/mrope.hpp
+++ b/sycl/include/strata/kernels/mrope.hpp
@@ -25,12 +25,12 @@ namespace strata::kernels {
 void mrope_table_set(const int32_t* device_table);
 const int32_t* mrope_table();
 
-#if defined(SYCL_LANGUAGE_VERSION)
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 /// ggml rope_multi, is_imrope, sections {11, 11, 10, 0}: sector = pair % 32; sector % 3 == 1 -> h (sector < 33),
 /// == 2 -> w (sector < 30), == 0 -> t (sector < 33).  For pairs 0..31 all three bounds hold, so it is pair % 3.
 __dpct_inline__ int mrope_pos(const int32_t *tab, int pos, int pair) {
     /*
-    DPCT1098:387: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
diff --git a/sycl/include/strata/kernels/rope.hpp b/sycl/include/strata/kernels/rope.hpp
index 5b262748797..be6a53bdca4 100644
--- a/sycl/include/strata/kernels/rope.hpp
+++ b/sycl/include/strata/kernels/rope.hpp
@@ -13,7 +13,7 @@
 #include <dpct/dpct.hpp>
 #include <cstdint>
 
-#if defined(SYCL_LANGUAGE_VERSION)
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 #define STRATA_ROPE_HD 
 #else
 #define STRATA_ROPE_HD
diff --git a/sycl/src/core/concurrent_main.cpp b/sycl/src/core/concurrent_main.cpp
index 599e98be187..8fb792b0769 100644
--- a/sycl/src/core/concurrent_main.cpp
+++ b/sycl/src/core/concurrent_main.cpp
@@ -111,7 +111,7 @@ int main(int argc, char** argv) {
     std::vector<uint16_t> hx((size_t) n_in, 0x3C00);
     std::vector<float> hs((size_t) n_out * (size_t) (n_in / 64), 0.001f);
     /*
-    DPCT1114:922: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -120,7 +120,7 @@ int main(int argc, char** argv) {
               d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
-    DPCT1114:923: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -158,7 +158,7 @@ int main(int argc, char** argv) {
             check(DPCT_CHECK_ERROR(ev[b] = new sycl::event()), "event");
         uint8_t* buf[2] = {d_codes, d_codes};      // one buffer is enough: the timing is what is measured
         /*
-        DPCT1124:924: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -167,7 +167,7 @@ int main(int argc, char** argv) {
             DPCT_CHECK_ERROR(s_copy->memcpy(buf[0], arena.data(), role_codes)),
             "prologue");
         /*
-        DPCT1024:925: The original code returned the error code that was further
+        DPCT1024: The original code returned the error code that was further
         consumed by the program logic. This original code was replaced with 0.
         You may need to rewrite the program logic consuming the error code.
         */
@@ -177,7 +177,7 @@ int main(int argc, char** argv) {
             const int cur = i & 1, nxt = (i + 1) & 1;
             if (i + 1 < roles) {
                 /*
-                DPCT1124:926: cudaMemcpyAsync is migrated to asynchronous memcpy
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
                 API. While the origin API might be synchronous, it depends on
                 the type of operand memory, so you may need to call wait() on
                 event return by memcpy API to ensure synchronization behavior.
@@ -189,7 +189,7 @@ int main(int argc, char** argv) {
                           role_codes)),
                       "copy");
                 /*
-                DPCT1024:927: The original code returned the error code that was
+                DPCT1024: The original code returned the error code that was
                 further consumed by the program logic. This original code was
                 replaced with 0. You may need to rewrite the program logic
                 consuming the error code.
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
index ce679dd6c08..d72b556a5ce 100644
--- a/sycl/src/core/device.dp.cpp
+++ b/sycl/src/core/device.dp.cpp
@@ -13,17 +13,17 @@ namespace {
 
 void check(dpct::err0 e, const char *what) {
     /*
-    DPCT1000:1125: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:1126: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:1124: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw CudaError(
             std::string(what) + ": " + dpct::get_error_string_dummy(e), (int)e);
@@ -47,7 +47,11 @@ DeviceInfo device_info(int ordinal) {
     int count = 0;
     check(DPCT_CHECK_ERROR(count = dpct::device_count()), "cudaGetDeviceCount");
     if (count == 0) {
-        throw CudaError("no CUDA device is present; Strata needs an NVIDIA GPU of compute capability 8.0 or newer", -1);
+#if defined(STRATA_USE_HIP)
+        throw CudaError("no HIP device is present; this backend targets gfx1100 wave32", -1);
+#else
+        throw CudaError("no CUDA device is present; Strata needs an NVIDIA GPU (RTX 20 series or newer)", -1);
+#endif
     }
     if (ordinal < 0 || ordinal >= count) {
         throw CudaError("device ordinal " + std::to_string(ordinal) + " is out of range (have " +
@@ -57,7 +61,7 @@ DeviceInfo device_info(int ordinal) {
     DeviceInfo d;
     d.ordinal = ordinal;
     /*
-    DPCT1093:1127: The "ordinal" device may be not the one intended for use.
+    DPCT1093: The "ordinal" device may be not the one intended for use.
     Adjust the selected device if needed.
     */
     check(DPCT_CHECK_ERROR(dpct::select_device(ordinal)), "cudaSetDevice");
@@ -67,12 +71,12 @@ DeviceInfo device_info(int ordinal) {
           "cudaGetDeviceProperties");
     d.name = p.get_name();
     /*
-    DPCT1005:1128: The SYCL device version is different from CUDA Compute
+    DPCT1005: The SYCL device version is different from CUDA Compute
     Compatibility. You may need to rewrite this code.
     */
     d.cc_major = p.get_major_version();
     /*
-    DPCT1005:1129: The SYCL device version is different from CUDA Compute
+    DPCT1005: The SYCL device version is different from CUDA Compute
     Compatibility. You may need to rewrite this code.
     */
     d.cc_minor = p.get_minor_version();
@@ -80,7 +84,7 @@ DeviceInfo device_info(int ordinal) {
 
     size_t free_b = 0, total_b = 0;
     /*
-    DPCT1106:1130: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
     device information which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
@@ -91,30 +95,37 @@ DeviceInfo device_info(int ordinal) {
     d.total_bytes = total_b;
 
     /*
-    DPCT1043:1131: The version-related API is different in SYCL. An initial code
+    DPCT1043: The version-related API is different in SYCL. An initial code
     was generated, but you need to adjust it.
     */
     check(DPCT_CHECK_ERROR(d.driver_version = dpct::get_major_version(
                                dpct::get_current_device())),
           "cudaDriverGetVersion");
     /*
-    DPCT1043:1132: The version-related API is different in SYCL. An initial code
+    DPCT1043: The version-related API is different in SYCL. An initial code
     was generated, but you need to adjust it.
     */
     check(DPCT_CHECK_ERROR(d.runtime_version = dpct::get_major_version(
                                dpct::get_current_device())),
           "cudaRuntimeGetVersion");
 
-    // The kernels need sm_80 or newer (tf32 mma in the attention scorer, bf16 math) - the same floor the
-    // arch guard in CMakeLists enforces at build time (RTX 30 / 40 / 50).  Anything older is caught here,
-    // because a binary can be carried to a machine with an older card and would otherwise silently take
-    // whatever path the driver chose.  Pre-Blackwell is untested by the author; trust, then verify.
-    if (d.cc_major < 8) {
+    // The engine supports compute capability 7.5 and newer (Turing: the QSA scorer's tf32 mma has a portable
+    // fp32-FMA fallback below sm_80, the tensor-core prompt kernels refuse and fall back).  Compiling for a
+    // supported arch is enforced by CMake; RUNNING on an older card is caught here, because a binary can be carried
+    // to a machine with an older card and would otherwise silently take whatever path the driver chose.  The HIP
+    // backend is validated on gfx1100 (wave32) only.
+#if defined(STRATA_USE_HIP)
+    if (std::strncmp(p.gcnArchName, "gfx1100", 7) != 0 || p.warpSize != 32) {
+        throw CudaError("HIP backend requires validated gfx1100 wave32 hardware", -1);
+    }
+#else
+    if (d.cc_major * 10 + d.cc_minor < 75) {
         throw CudaError("device " + d.name + " reports compute capability " + std::to_string(d.cc_major) +
                             "." + std::to_string(d.cc_minor) +
-                            "; Strata needs an NVIDIA GPU of compute capability 8.0 or newer (RTX 30 / 40 / 50)",
+                            "; Strata needs compute capability 7.5 or newer (RTX 20 / 30 / 40 / 50 series)",
                         -1);
     }
+#endif
     return d;
 }
 
@@ -122,7 +133,7 @@ DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
     : capacity_(bytes), ordinal_(ordinal), poison_(poison) {
     if (bytes == 0) throw CudaError("DeviceArena of 0 bytes", -1);
     /*
-    DPCT1093:1133: The "ordinal" device may be not the one intended for use.
+    DPCT1093: The "ordinal" device may be not the one intended for use.
     Adjust the selected device if needed.
     */
     check(DPCT_CHECK_ERROR(dpct::select_device(ordinal)), "cudaSetDevice");
@@ -150,7 +161,7 @@ DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
                     auto n_b_threads_ct1 = n - b * threads;
 
                     cgh.parallel_for<
-                        dpct_kernel_name<class poison_kernel_cca729>>(
+                        dpct_kernel_name<class poison_kernel_58fc0a>>(
                         sycl::nd_range<3>(sycl::range(1, 1, (unsigned)chunk) *
                                               sycl::range(1, 1, threads),
                                           sycl::range(1, 1, threads)),
@@ -161,7 +172,7 @@ DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
                 });
             }
             /*
-            DPCT1010:1134: SYCL uses exceptions to report errors and does not
+            DPCT1010: SYCL uses exceptions to report errors and does not
             use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
index 752bebab2e4..32e167307a5 100644
--- a/sycl/src/core/expert_cache.cpp
+++ b/sycl/src/core/expert_cache.cpp
@@ -71,6 +71,22 @@ bool read_expert_profile(const std::string& path, int64_t n_layers, int64_t n_ex
 
 ExpertCache::~ExpertCache() { close(); }
 
+#if defined(STRATA_USE_HIP)
+bool ExpertCache::ensure_blocking_staging(std::size_t bytes, std::string& err) {
+    if (bytes <= blocking_staging_bytes_) return true;
+    void* next = nullptr;
+    const cudaError_t status = cudaHostAlloc(&next, bytes, cudaHostAllocDefault);
+    if (status != cudaSuccess) {
+        err = std::string("ExpertCache: HIP blocking staging allocation: ") + cudaGetErrorString(status);
+        return false;
+    }
+    if (blocking_staging_) (void) cudaFreeHost(blocking_staging_);
+    blocking_staging_ = static_cast<uint8_t*>(next);
+    blocking_staging_bytes_ = bytes;
+    return true;
+}
+#endif
+
 bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
                        int64_t blob_bytes, std::string &err) try {
     close();
@@ -93,7 +109,7 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
     // and the two numbers are named in the refusal.
     size_t free_b = 0, total_b = 0;
     /*
-    DPCT1106:759: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
     device information which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
@@ -119,12 +135,12 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
         std::snprintf(
             buf, sizeof buf, "ExpertCache: cudaMalloc(%.2f GiB) failed: %s",
             /*
-            DPCT1009:760: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1010:761: SYCL uses exceptions to report errors and does not use
+            DPCT1010: SYCL uses exceptions to report errors and does not use
             the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
@@ -147,6 +163,12 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
     n_layers_ = n_layers;
     n_expert_ = n_expert;
     blob_ = blob_bytes;
+#if defined(STRATA_USE_HIP)
+    if (!ensure_blocking_staging((std::size_t) blob_, err)) {
+        close();
+        return false;
+    }
+#endif
     next_free_ = 0;
     fills_ = 0;
     admitted_ = 0;
@@ -181,11 +203,22 @@ bool ExpertCache::open_sized(const std::vector<int64_t>& slot_bytes, int64_t n_l
     slots_ = (int64_t) slot_bytes.size();
     blob_ = mx;
     off_ = std::move(off);
+#if defined(STRATA_USE_HIP)
+    if (!ensure_blocking_staging((std::size_t) blob_, err)) {
+        close();
+        return false;
+    }
+#endif
     layer_next_.assign((size_t) (n_layers > 0 ? n_layers : 0), 0);
     return true;
 }
 
 void ExpertCache::close() {
+#if defined(STRATA_USE_HIP)
+    if (blocking_staging_) (void) cudaFreeHost(blocking_staging_);
+    blocking_staging_ = nullptr;
+    blocking_staging_bytes_ = 0;
+#endif
     off_.clear();
     if (base_ != nullptr) {
         sycl::free(base_, dpct::get_in_order_queue());
@@ -264,7 +297,7 @@ bool ExpertCache::fill_slot(int32_t slot, const uint8_t *host_blob,
         return false;
     }
     /*
-    DPCT1124:764: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -272,17 +305,17 @@ bool ExpertCache::fill_slot(int32_t slot, const uint8_t *host_blob,
     const dpct::err0 e =
         DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(dst, host_blob, n));
     /*
-    DPCT1000:763: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:765: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:762: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("ExpertCache::fill_slot: ") +
               dpct::get_error_string_dummy(e);
@@ -309,26 +342,37 @@ bool ExpertCache::fill_slot_blocking(int32_t slot, const uint8_t *host_blob,
         err = "ExpertCache::fill_slot_blocking: the host blob is null";
         return false;
     }
+#if defined(STRATA_USE_HIP)
+    // Bound HIP's pageable-source staging to one expert instead of repeatedly
+    // registering regions of the mmap. The blocking copy completes before reuse.
+    if (!blocking_staging_ || n > blocking_staging_bytes_) {
+        err = "ExpertCache::fill_slot_blocking: HIP staging buffer is too small";
+        return false;
+    }
+    std::memcpy(blocking_staging_, host_blob, n);
+    const cudaError_t e = cudaMemcpy(dst, blocking_staging_, n, cudaMemcpyHostToDevice);
+#else
     /*
-    DPCT1114:768: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     const dpct::err0 e =
         DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n).wait());
+#endif
     /*
-    DPCT1000:767: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:769: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:766: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("ExpertCache::fill_slot_blocking: ") +
               dpct::get_error_string_dummy(e);
@@ -353,7 +397,7 @@ bool ExpertCache::fill_slot_queued(int32_t slot, const uint8_t *host_blob,
         return false;
     }
     /*
-    DPCT1124:772: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -361,17 +405,17 @@ bool ExpertCache::fill_slot_queued(int32_t slot, const uint8_t *host_blob,
     const dpct::err0 e =
         DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, host_blob, n).wait());
     /*
-    DPCT1000:771: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:773: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:770: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("ExpertCache::fill_slot_queued: ") +
               dpct::get_error_string_dummy(e);
@@ -389,17 +433,17 @@ catch (sycl::exception const &exc) {
 bool ExpertCache::sync_queued(std::string &err) try {
     const dpct::err0 e = DPCT_CHECK_ERROR(dpct::get_in_order_queue().wait());
     /*
-    DPCT1000:775: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:776: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:774: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("ExpertCache::sync_queued: ") +
               dpct::get_error_string_dummy(e);
@@ -428,17 +472,17 @@ bool ExpertCache::verify_slot(int32_t slot, const uint8_t *host_blob,
     const dpct::err0 e = DPCT_CHECK_ERROR(
         dpct::get_in_order_queue().memcpy(got.data(), src, (size_t)nb).wait());
     /*
-    DPCT1000:778: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) {
         /*
-        DPCT1009:779: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:777: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("ExpertCache::verify_slot: ") +
               dpct::get_error_string_dummy(e);
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index 8beed71d6a7..c617370249c 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -19,11 +19,18 @@
 #include <cstdlib>
 #include <cstring>
 #include <fstream>
+#include <filesystem>
+#include <sstream>
+#include <limits>
 #include <thread>
+#include <utility>
 #include <vector>
 
 #if defined(_WIN32)
 #define WIN32_LEAN_AND_MEAN
+#ifndef NOMINMAX
+#define NOMINMAX   // std::numeric_limits<T>::max() below
+#endif
 #include <windows.h>
 #else
 #include <fcntl.h>
@@ -34,6 +41,213 @@
 
 namespace strata::core {
 
+namespace detail {
+
+bool cgroup_available_bytes(uint64_t limit, const CgroupMemoryStat& stat, uint64_t& bytes) {
+    bytes = 0;
+    if (!stat.valid) return false;
+
+    // memory.stat's inactive_file can race memory.current, so bound it to charged usage first.
+    uint64_t reclaimable = std::min(stat.inactive_file, stat.current);
+    reclaimable = stat.file_dirty >= reclaimable ? 0 : reclaimable - stat.file_dirty;
+    reclaimable = stat.file_writeback >= reclaimable ? 0 : reclaimable - stat.file_writeback;
+
+    // Reclaiming clean file pages reduces usage; saturating subtraction also handles a transient over-limit read.
+    const uint64_t usage_after_reclaim = stat.current - reclaimable;
+    bytes = usage_after_reclaim < limit ? limit - usage_after_reclaim : 0;
+    return true;
+}
+
+bool make_cache_complement_plan(
+    int64_t n_layers, int64_t n_expert, const std::vector<uint64_t>& layer_blob_bytes,
+    const std::vector<std::pair<int32_t, int32_t>>& primary_gpu_pairs,
+    const std::vector<std::pair<int32_t, int32_t>>& additional_gpu_pairs,
+    std::vector<uint64_t>& offsets, uint64_t& bytes, std::string& err) {
+    offsets.clear();
+    bytes = 0;
+    err.clear();
+    if (n_layers <= 0 || n_expert <= 0 || layer_blob_bytes.size() != (size_t) n_layers) {
+        err = "FileExpertSource: invalid geometry for the cache complement plan";
+        return false;
+    }
+    if ((uint64_t) n_layers > (uint64_t) std::numeric_limits<size_t>::max() / (uint64_t) n_expert) {
+        err = "FileExpertSource: cache complement index table is too large";
+        return false;
+    }
+    const size_t count = (size_t) n_layers * (size_t) n_expert;
+    std::vector<uint8_t> omitted(count, 0);
+    auto mark_pairs = [&](const std::vector<std::pair<int32_t, int32_t>>& pairs, uint8_t bit,
+                          const char* label) -> bool {
+        for (const auto& pair : pairs) {
+            if (pair.first < 0 || pair.second < 0 || pair.first >= n_layers || pair.second >= n_expert) {
+                err = std::string("FileExpertSource: ") + label + " pair is outside the expert geometry";
+                return false;
+            }
+            const size_t index = (size_t) pair.first * (size_t) n_expert + (size_t) pair.second;
+            if ((omitted[index] & bit) != 0) {
+                err = std::string("FileExpertSource: duplicate ") + label + " pair in the cache complement plan";
+                return false;
+            }
+            if (bit == 2 && (omitted[index] & 1) != 0) {
+                err = "FileExpertSource: the primary and additional GPU expert tiers overlap";
+                return false;
+            }
+            omitted[index] |= bit;
+        }
+        return true;
+    };
+    if (!mark_pairs(primary_gpu_pairs, 1, "primary GPU") ||
+        !mark_pairs(additional_gpu_pairs, 2, "additional GPU")) return false;
+    for (uint64_t blob_bytes : layer_blob_bytes) {
+        if (blob_bytes == 0) {
+            err = "FileExpertSource: cache complement layer has zero-sized expert blobs";
+            return false;
+        }
+    }
+
+    offsets.assign(count, kNoCacheComplement);
+    for (int64_t layer = 0; layer < n_layers; ++layer) {
+        const uint64_t blob_bytes = layer_blob_bytes[(size_t) layer];
+        for (int64_t expert = 0; expert < n_expert; ++expert) {
+            const size_t index = (size_t) layer * (size_t) n_expert + (size_t) expert;
+            if (omitted[index] != 0) continue;
+            if (bytes > std::numeric_limits<uint64_t>::max() - blob_bytes) {
+                offsets.clear();
+                bytes = 0;
+                err = "FileExpertSource: cache complement size overflows";
+                return false;
+            }
+            offsets[index] = bytes;
+            bytes += blob_bytes;
+        }
+    }
+    if (bytes > (uint64_t) std::numeric_limits<size_t>::max()) {
+        offsets.clear();
+        bytes = 0;
+        err = "FileExpertSource: cache complement exceeds the host address space";
+        return false;
+    }
+    return true;
+}
+
+const uint8_t* cache_complement_blob_or_fallback(
+    size_t index, const std::vector<uint64_t>& offsets, const uint8_t* complement_host,
+    const uint8_t* mapped_fallback) {
+    if (complement_host != nullptr && index < offsets.size() && offsets[index] != kNoCacheComplement)
+        return complement_host + (size_t) offsets[index];
+    return mapped_fallback;
+}
+
+}  // namespace detail
+
+namespace {
+constexpr uint64_t kPinnedMemoryHeadroom = 8ull << 30;
+
+#if defined(__linux__)
+bool read_cgroup_memory_stat(const std::filesystem::path& path, uint64_t current,
+                             detail::CgroupMemoryStat& stat) {
+    std::ifstream input(path / "memory.stat");
+    if (!input) return false;
+
+    bool inactive_file = false, file_dirty = false, file_writeback = false;
+    std::string line;
+    while (std::getline(input, line)) {
+        std::istringstream fields(line);
+        std::string key;
+        uint64_t value = 0;
+        if (!(fields >> key >> value)) return false;
+        fields >> std::ws;
+        if (!fields.eof()) return false;
+
+        if (key == "inactive_file") {
+            if (inactive_file) return false;
+            inactive_file = true;
+            stat.inactive_file = value;
+        } else if (key == "file_dirty") {
+            if (file_dirty) return false;
+            file_dirty = true;
+            stat.file_dirty = value;
+        } else if (key == "file_writeback") {
+            if (file_writeback) return false;
+            file_writeback = true;
+            stat.file_writeback = value;
+        }
+    }
+    if (!input.eof() || !inactive_file || !file_dirty || !file_writeback) return false;
+    stat.current = current;
+    stat.valid = true;
+    return true;
+}
+#endif
+
+bool available_memory_bytes(uint64_t& bytes) {
+#if defined(_WIN32)
+    MEMORYSTATUSEX status{};
+    status.dwLength = sizeof(status);
+    if (!GlobalMemoryStatusEx(&status)) return false;
+    bytes = (uint64_t) status.ullAvailPhys;
+    return bytes > 0;
+#elif defined(__linux__)
+    // MemAvailable includes reclaimable page cache, unlike _SC_AVPHYS_PAGES.
+    std::ifstream info("/proc/meminfo");
+    std::string line;
+    bytes = 0;
+    while (std::getline(info, line)) {
+        std::istringstream fields(line);
+        std::string key, unit;
+        uint64_t value = 0;
+        if (fields >> key >> value >> unit && key == "MemAvailable:" && unit == "kB" &&
+            value <= std::numeric_limits<uint64_t>::max() / 1024) bytes = value * 1024;
+    }
+    if (bytes == 0) return false;
+    // Account for the tightest cgroup-v2 ancestor limit when its normal mount is visible.
+    // This is a point-in-time guard, not a reservation against concurrent allocations.
+    std::ifstream groups("/proc/self/cgroup");
+    if (!groups) return false;
+    bool resolved_v2 = false;
+    while (std::getline(groups, line)) {
+        if (line.rfind("0::/", 0) != 0) continue;
+        const std::filesystem::path root("/sys/fs/cgroup");
+        auto path = (root / line.substr(4)).lexically_normal();
+        if (path.string().rfind(root.string(), 0) != 0 || !std::filesystem::is_directory(path)) return false;
+        resolved_v2 = true;
+        while (path.string().rfind(root.string(), 0) == 0) {
+            std::ifstream limit_file(path / "memory.max"), current_file(path / "memory.current");
+            std::string limit;
+            uint64_t current = 0;
+            const bool readable = bool(limit_file >> limit) && bool(current_file >> current);
+            // The host's root cgroup has no memory.max; ordinary child groups must expose their limits.
+            if (!readable && !(path == root && !std::filesystem::exists(path / "memory.max") &&
+                               std::filesystem::exists(path / "cgroup.controllers"))) return false;
+            if (readable && limit != "max") {
+                try {
+                    size_t consumed = 0;
+                    const uint64_t cap = std::stoull(limit, &consumed);
+                    if (consumed != limit.size()) return false;
+                    detail::CgroupMemoryStat stat;
+                    if (!read_cgroup_memory_stat(path, current, stat)) return false;
+                    uint64_t cgroup_available = 0;
+                    if (!detail::cgroup_available_bytes(cap, stat, cgroup_available)) return false;
+                    bytes = std::min(bytes, cgroup_available);
+                } catch (...) { return false; }
+            }
+            if (path == root) break;
+            path = path.parent_path();
+        }
+    }
+    return resolved_v2;
+#else
+    const long pages = sysconf(_SC_AVPHYS_PAGES);
+    const long page_bytes = sysconf(_SC_PAGESIZE);
+    if (pages <= 0 || page_bytes <= 0 ||
+        (uint64_t) pages > std::numeric_limits<uint64_t>::max() / (uint64_t) page_bytes) return false;
+    bytes = (uint64_t) pages * (uint64_t) page_bytes;
+    return bytes > 0;
+#endif
+}
+
+}  // namespace
+
 // ================================ THE FILE-BACKED SOURCE ================================
 
 FileExpertSource::~FileExpertSource() { close(); }
@@ -41,9 +255,74 @@ FileExpertSource::~FileExpertSource() { close(); }
 bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64_t n_expert, std::string& err) {
     close();
     if (n_layers <= 0 || n_expert <= 0) { err = "FileExpertSource: the geometry is empty"; return false; }
-    n_expert_ = n_expert;
-    blobs_ = n_layers * n_expert;
-    const uint64_t want = (uint64_t) blobs_ * (uint64_t) strata::kernels::cpu::BLOB;
+    const auto& layout = strata::kernels::cpu::expert_layout();
+    if (layout.n_layers != n_layers || layout.n_expert != n_expert) {
+        err = "FileExpertSource: the requested geometry does not match the loaded expert layout";
+        return false;
+    }
+    if ((uint64_t) n_layers > (uint64_t) std::numeric_limits<int64_t>::max() / (uint64_t) n_expert) {
+        err = "FileExpertSource: the expert count overflows";
+        return false;
+    }
+    const uint64_t blob_count = (uint64_t) n_layers * (uint64_t) n_expert;
+    if (blob_count > (uint64_t) std::numeric_limits<int64_t>::max() ||
+        (uint64_t) n_layers > (uint64_t) std::numeric_limits<size_t>::max()) {
+        err = "FileExpertSource: the expert count overflows";
+        return false;
+    }
+
+    std::vector<uint64_t> layer_offsets((size_t) n_layers), layer_blob_bytes((size_t) n_layers);
+    const uint64_t want = layout.total;
+    if (want == 0 || want > (uint64_t) std::numeric_limits<size_t>::max()) {
+        err = "FileExpertSource: the loaded expert layout has an invalid size";
+        return false;
+    }
+    if (!layout.native) {
+        if (blob_count > std::numeric_limits<uint64_t>::max() / (uint64_t) strata::kernels::cpu::BLOB) {
+            err = "FileExpertSource: the canonical expert size overflows";
+            return false;
+        }
+        const uint64_t canonical_size = blob_count * (uint64_t) strata::kernels::cpu::BLOB;
+        if (want != canonical_size) {
+            err = "FileExpertSource: the canonical expert layout has an inconsistent size";
+            return false;
+        }
+        const uint64_t bytes = (uint64_t) strata::kernels::cpu::BLOB;
+        const uint64_t layer_bytes = (uint64_t) n_expert * bytes;
+        for (int64_t layer = 0; layer < n_layers; ++layer) {
+            layer_offsets[(size_t) layer] = (uint64_t) layer * layer_bytes;
+            layer_blob_bytes[(size_t) layer] = bytes;
+        }
+    } else {
+        if (layout.offset.size() != (size_t) n_layers || layout.bytes.size() != (size_t) n_layers ||
+            layout.fmt.size() != (size_t) n_layers) {
+            err = "FileExpertSource: the native expert layout is incomplete";
+            return false;
+        }
+        uint64_t at = 0;
+        for (int64_t layer = 0; layer < n_layers; ++layer) {
+            const size_t i = (size_t) layer;
+            const uint64_t bytes = (uint64_t) layout.fmt[i].bytes;
+            if (layout.offset[i] != at || bytes == 0 || layout.bytes[i] != bytes ||
+                bytes > std::numeric_limits<uint64_t>::max() / (uint64_t) n_expert) {
+                err = "FileExpertSource: the native expert layout is invalid at layer " + std::to_string(layer);
+                return false;
+            }
+            const uint64_t layer_bytes = bytes * (uint64_t) n_expert;
+            if (at > want || layer_bytes > want - at) {
+                err = "FileExpertSource: the native expert layout exceeds its declared size at layer " +
+                      std::to_string(layer);
+                return false;
+            }
+            layer_offsets[i] = layout.offset[i];
+            layer_blob_bytes[i] = bytes;
+            at += layer_bytes;
+        }
+        if (at != want) {
+            err = "FileExpertSource: the native expert layout has an inconsistent size";
+            return false;
+        }
+    }
     const std::string path = pack_dir + "/experts.bin";
 
 #if defined(_WIN32)
@@ -78,10 +357,9 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
     if ((uint64_t) sz.QuadPart != want) {
         char buf[400];
         std::snprintf(buf, sizeof buf,
-                      "FileExpertSource: %s is %llu B but %lld layers x %lld experts x %d B is %llu B - this "
-                      "is not the pack this geometry came from",
-                      path.c_str(), (unsigned long long) sz.QuadPart, (long long) n_layers,
-                      (long long) n_expert, (int) strata::kernels::cpu::BLOB, (unsigned long long) want);
+                      "FileExpertSource: %s is %llu B but the loaded expert layout requires %llu B - this is not "
+                      "the pack this geometry came from",
+                      path.c_str(), (unsigned long long) sz.QuadPart, (unsigned long long) want);
         CloseHandle(f);
         err = buf;
         return false;
@@ -107,13 +385,13 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
     if (fd < 0) { err = "FileExpertSource: cannot open " + path; return false; }
     struct stat st{};
     if (fstat(fd, &st) != 0) { ::close(fd); err = "FileExpertSource: cannot stat " + path; return false; }
-    if ((uint64_t) st.st_size != want) {
+    if (st.st_size < 0 || (uint64_t) st.st_size != want) {
         char buf[400];
         std::snprintf(buf, sizeof buf,
-                      "FileExpertSource: %s is %llu B but %lld layers x %lld experts x %d B is %llu B - this "
-                      "is not the pack this geometry came from",
-                      path.c_str(), (unsigned long long) st.st_size, (long long) n_layers, (long long) n_expert,
-                      (int) strata::kernels::cpu::BLOB, (unsigned long long) want);
+                      "FileExpertSource: %s is %llu B but the loaded expert layout requires %llu B - this is not "
+                      "the pack this geometry came from",
+                      path.c_str(), (unsigned long long) (st.st_size < 0 ? 0 : st.st_size),
+                      (unsigned long long) want);
         ::close(fd);
         err = buf;
         return false;
@@ -123,10 +401,28 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
     fd_ = fd;
     base_ = (const uint8_t*) view;
 #endif
+    blobs_ = (int64_t) blob_count;
+    n_layers_ = n_layers;
+    n_expert_ = n_expert;
+    mapped_bytes_ = want;
+    layer_offsets_ = std::move(layer_offsets);
+    layer_blob_bytes_ = std::move(layer_blob_bytes);
     return true;
 }
 
 void FileExpertSource::close() {
+    if (complement_arena_ != nullptr) {
+        if (complement_pinned_)(void) DPCT_CHECK_ERROR(
+            sycl::free(complement_arena_, dpct::get_in_order_queue()));
+        else std::free(complement_arena_);
+    }
+    complement_arena_ = nullptr;
+    complement_host_ = nullptr;
+    complement_device_ = nullptr;
+    complement_bytes_ = 0;
+    complement_offsets_.clear();
+    complement_pinned_ = false;
+    complement_ready_ = false;
 #if defined(_WIN32)
     if (base_ != nullptr) UnmapViewOfFile((LPCVOID) base_);
     if (mapping_ != nullptr) CloseHandle((HANDLE) mapping_);
@@ -134,27 +430,286 @@ void FileExpertSource::close() {
     mapping_ = nullptr;
     file_ = nullptr;
 #else
-    if (base_ != nullptr) munmap((void*) base_, (size_t) blobs_ * (size_t) strata::kernels::cpu::BLOB);
+    if (base_ != nullptr) munmap((void*) base_, (size_t) mapped_bytes_);
     if (fd_ >= 0) ::close(fd_);
     fd_ = -1;
 #endif
     base_ = nullptr;
     blobs_ = 0;
+    n_layers_ = 0;
+    n_expert_ = 0;
+    mapped_bytes_ = 0;
+    layer_offsets_.clear();
+    layer_blob_bytes_.clear();
     reads_ = 0;
 }
 
+const uint8_t* FileExpertSource::mapped_blob(int64_t layer, int64_t expert) const {
+    if (base_ == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return nullptr;
+    const size_t i = (size_t) layer;
+    if (i >= layer_offsets_.size() || i >= layer_blob_bytes_.size()) return nullptr;
+    const uint64_t blob_bytes = layer_blob_bytes_[i];
+    if (blob_bytes == 0 || (uint64_t) expert > std::numeric_limits<uint64_t>::max() / blob_bytes) return nullptr;
+    const uint64_t expert_offset = (uint64_t) expert * blob_bytes;
+    const uint64_t layer_offset = layer_offsets_[i];
+    if (layer_offset > mapped_bytes_ || expert_offset > mapped_bytes_ - layer_offset) return nullptr;
+    const uint64_t offset = layer_offset + expert_offset;
+    if (blob_bytes > mapped_bytes_ - offset) return nullptr;
+    return base_ + (size_t) offset;
+}
+
+bool FileExpertSource::pin_cache_complement(
+    const ExpertCache &cache, std::string &err, bool pin,
+    const std::vector<std::pair<int32_t, int32_t>> &additional_gpu_pairs) try {
+    err.clear();
+    if (base_ == nullptr) { err = "FileExpertSource: open the mapped experts before pinning a complement"; return false; }
+    if (complement_ready_) { err = "FileExpertSource: the cache complement is already pinned"; return false; }
+    if (!cache.valid()) { err = "FileExpertSource: the GPU expert cache is not open"; return false; }
+    if (cache.fills() != cache.resident()) {
+        err = "FileExpertSource: the GPU expert cache is not fully filled";
+        return false;
+    }
+    const dpct::err0 sync =
+        DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw());
+    /*
+    DPCT1000: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (sync != 0) {
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001: The statement could not be removed.
+        */
+        err = std::string("FileExpertSource: GPU expert cache is not ready: ") +
+              dpct::get_error_string_dummy(sync);
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        return false;
+    }
+
+    std::vector<std::pair<int32_t, int32_t>> primary_gpu_pairs;
+    primary_gpu_pairs.reserve((size_t) cache.resident());
+    for (int64_t layer = 0; layer < n_layers_; ++layer) {
+        for (int64_t expert = 0; expert < n_expert_; ++expert) {
+            if (cache.slot_of(layer, expert) != kNotResident)
+                primary_gpu_pairs.emplace_back((int32_t) layer, (int32_t) expert);
+        }
+    }
+    std::vector<uint64_t> offsets;
+    uint64_t bytes = 0;
+    if (!detail::make_cache_complement_plan(n_layers_, n_expert_, layer_blob_bytes_, primary_gpu_pairs,
+                                            additional_gpu_pairs, offsets, bytes, err)) return false;
+
+    if (bytes > 0) {
+        uint64_t physical = 0;
+        if (!available_memory_bytes(physical)) {
+            err = "FileExpertSource: cannot determine available RAM for the resident-memory safety check";
+            return false;
+        }
+        if (physical <= kPinnedMemoryHeadroom || bytes > physical - kPinnedMemoryHeadroom) {
+            char message[256];
+            std::snprintf(message, sizeof message,
+                          "FileExpertSource: resident complement %.2f GiB exceeds available RAM minus the 8 GiB safety headroom",
+                          (double) bytes / 1073741824.0);
+            err = message;
+            return false;
+        }
+    }
+
+    void* arena = nullptr;
+    const uint8_t* host = nullptr;
+    const uint8_t* device = nullptr;
+    if (bytes > 0) {
+        std::fprintf(stderr, "FileExpertSource: allocating %.2f GiB %s cache complement\n",
+                     (double) bytes / 1073741824.0, pin ? "mapped pinned" : "pageable resident");
+        std::fflush(stderr);
+        if (pin) {
+            const dpct::err0 allocated = DPCT_CHECK_ERROR(
+                arena = (void *)sycl::malloc_host((size_t)bytes,
+                                                  dpct::get_in_order_queue()));
+            /*
+            DPCT1000: Error handling if-stmt was detected but could not be
+            rewritten.
+            */
+            if (allocated != 0) {
+                /*
+                DPCT1001: The statement could not be removed.
+                */
+                err = std::string("FileExpertSource: mapped pinned complement "
+                                  "allocation failed: ") +
+                      /*
+                      DPCT1009: SYCL reports errors using exceptions and
+                      does not use error codes. Please replace the
+                      "get_error_string_dummy(...)" with a real error-handling
+                      function.
+                      */
+                      dpct::get_error_string_dummy(allocated);
+                std::fprintf(stderr, "%s\n", err.c_str());
+                std::fflush(stderr);
+                /*
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                (void)0;
+                return false;
+            }
+            host = (const uint8_t*) arena;
+            void* alias = nullptr;
+            const dpct::err0 aliased = DPCT_CHECK_ERROR(alias = (void *)arena);
+            if (aliased != 0 || alias == nullptr) {
+                err = std::string("FileExpertSource: mapped pinned complement "
+                                  "device alias failed: ") +
+                      /*
+                      DPCT1009: SYCL reports errors using exceptions and
+                      does not use error codes. Please replace the
+                      "get_error_string_dummy(...)" with a real error-handling
+                      function.
+                      */
+                      dpct::get_error_string_dummy(aliased);
+                std::fprintf(stderr, "%s\n", err.c_str());
+                std::fflush(stderr);
+                /*
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                (void)0;
+                (void)DPCT_CHECK_ERROR(
+                    sycl::free(arena, dpct::get_in_order_queue()));
+                return false;
+            }
+            device = (const uint8_t*) alias;
+        } else {
+            arena = std::malloc((size_t) bytes);
+            if (arena == nullptr) {
+                err = "FileExpertSource: pageable resident complement allocation failed";
+                return false;
+            }
+            host = (const uint8_t*) arena;
+        }
+    }
+
+    uint64_t copied = 0;
+    for (int64_t layer = 0; layer < n_layers_; ++layer) {
+        const uint64_t blob_bytes = layer_blob_bytes_[(size_t) layer];
+        for (int64_t expert = 0; expert < n_expert_; ++expert) {
+            const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+            const uint64_t offset = offsets[index];
+            if (offset == kNoComplement) continue;
+            const uint8_t* source = mapped_blob(layer, expert);
+            if (source == nullptr || offset > bytes || blob_bytes > bytes - offset) {
+                err = "FileExpertSource: invalid blob bounds while building the cache complement";
+                if (arena != nullptr) {
+                    if (pin)(void) DPCT_CHECK_ERROR(
+                        sycl::free(arena, dpct::get_in_order_queue()));
+                    else std::free(arena);
+                }
+                return false;
+            }
+            std::memcpy((uint8_t*) host + (size_t) offset, source, (size_t) blob_bytes);
+            copied += blob_bytes;
+        }
+#if !defined(_WIN32)
+        const uint64_t layer_offset = layer_offsets_[(size_t) layer];
+        const uint64_t layer_bytes = blob_bytes * (uint64_t) n_expert_;
+        const uint64_t layer_end = layer_offset + layer_bytes;
+        const long page_bytes = sysconf(_SC_PAGESIZE);
+        if (page_bytes <= 0) {
+            err = "FileExpertSource: cannot determine page size for mapped-page release";
+            if (arena != nullptr) {
+                if (pin)(void) DPCT_CHECK_ERROR(
+                    sycl::free(arena, dpct::get_in_order_queue()));
+                else std::free(arena);
+            }
+            return false;
+        }
+        const uint64_t page = (uint64_t) page_bytes;
+        const uint64_t advice_start = layer_offset - layer_offset % page;
+        const uint64_t end_remainder = layer_end % page;
+        const uint64_t extra = end_remainder == 0 ? 0 : page - end_remainder;
+        const uint64_t advice_end = extra > mapped_bytes_ - layer_end ? mapped_bytes_ : layer_end + extra;
+        if (advice_end > advice_start &&
+            madvise((void*) (base_ + (size_t) advice_start), (size_t) (advice_end - advice_start), MADV_DONTNEED) != 0) {
+            err = "FileExpertSource: madvise could not release mapped expert layer " + std::to_string(layer);
+            if (arena != nullptr) {
+                if (pin)(void) DPCT_CHECK_ERROR(
+                    sycl::free(arena, dpct::get_in_order_queue()));
+                else std::free(arena);
+            }
+            return false;
+        }
+        const int advice = posix_fadvise(fd_, (off_t) layer_offset, (off_t) layer_bytes, POSIX_FADV_DONTNEED);
+        if (advice != 0) {
+            err = "FileExpertSource: posix_fadvise could not release expert layer " + std::to_string(layer);
+            if (arena != nullptr) {
+                if (pin)(void) DPCT_CHECK_ERROR(
+                    sycl::free(arena, dpct::get_in_order_queue()));
+                else std::free(arena);
+            }
+            return false;
+        }
+#endif
+        if ((layer + 1) % 8 == 0 || layer + 1 == n_layers_) {
+            std::fprintf(stderr, "FileExpertSource: copied cache complement through layer %lld/%lld (%.2f GiB)\n",
+                         (long long) (layer + 1), (long long) n_layers_, (double) copied / 1073741824.0);
+            std::fflush(stderr);
+        }
+    }
+
+    complement_arena_ = arena;
+    complement_host_ = host;
+    complement_device_ = device;
+    complement_bytes_ = bytes;
+    complement_offsets_ = std::move(offsets);
+    complement_pinned_ = pin && bytes > 0;
+    complement_ready_ = true;
+    std::fprintf(stderr, "FileExpertSource: %s cache complement ready: resident %.2f GiB, pinned %.2f GiB\n",
+                 complement_pinned_ ? "mapped pinned" : "pageable resident",
+                 (double) resident_bytes() / 1073741824.0, (double) pinned_bytes() / 1073741824.0);
+    if (!additional_gpu_pairs.empty()) {
+        std::fprintf(stderr, "FileExpertSource: %zu verified additional-GPU experts remain on the mmap fallback\n",
+                     additional_gpu_pairs.size());
+    }
+    std::fflush(stderr);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 const uint8_t* FileExpertSource::blob(int64_t layer, int64_t expert) {
-    if (base_ == nullptr) return nullptr;
-    if (layer < 0 || expert < 0) return nullptr;
-    // **`expert >= n_expert_` IS CHECKED SEPARATELY, AND THE FLAT INDEX ALONE DOES NOT CATCH IT.**  The blob
-    // index is `layer * n_expert + expert`, so `blob(0, 512)` has flat index 512 - which is in range, and is
-    // `blob(1, 0)`.  A router id one past the end of a layer would then read the NEXT LAYER's first expert:
-    // finite, correctly sized, and wrong.  Layer and expert are separate axes and are validated as such.
-    if (expert >= n_expert_) return nullptr;
-    const int64_t i = layer * n_expert_ + expert;
-    if (i >= blobs_) return nullptr;
-    ++reads_;
-    return base_ + (size_t) i * strata::kernels::cpu::BLOB;
+    if (base_ == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return nullptr;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    const uint8_t* mapped_fallback = mapped_blob(layer, expert);
+    const uint8_t* result = complement_ready_
+        ? detail::cache_complement_blob_or_fallback(index, complement_offsets_, complement_host_, mapped_fallback)
+        : mapped_fallback;
+    if (result != nullptr) ++reads_;
+    return result;
+}
+
+bool FileExpertSource::pinned(int64_t layer, int64_t expert) const {
+    if (!complement_ready_ || !complement_pinned_ || complement_host_ == nullptr || layer < 0 || expert < 0 ||
+        layer >= n_layers_ || expert >= n_expert_) return false;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    return index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement;
+}
+
+const uint8_t* FileExpertSource::device_alias(int64_t layer, int64_t expert) const {
+    if (!pinned(layer, expert) || complement_device_ == nullptr) return nullptr;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    return complement_device_ + (size_t) complement_offsets_[index];
 }
 
 // ================================ THE ADAPTER ================================
@@ -546,7 +1101,7 @@ void expert_hit_run(void *user, void *stream, HitPhase phase,
         if (DPCT_CHECK_ERROR(cs->memset(
                 d.hit_out, 0, (size_t)d.parts_elems * sizeof(float))) != 0 ||
             /*
-            DPCT1124:653: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -554,7 +1109,7 @@ void expert_hit_run(void *user, void *stream, HitPhase phase,
             DPCT_CHECK_ERROR(
                 cs->memcpy(d.d_slot, d.h_slot.data(), list_bytes)) != 0 ||
             /*
-            DPCT1124:654: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -764,7 +1319,7 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
             void* d = nullptr;
             if (DPCT_CHECK_ERROR(d = (void *)(void *)(base_ + off)) != 0) {
                 /*
-                DPCT1010:655: SYCL uses exceptions to report errors and does not
+                DPCT1010: SYCL uses exceptions to report errors and does not
                 use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
diff --git a/sycl/src/core/graph.cpp b/sycl/src/core/graph.cpp
index eab5afa0e9e..5d4550224c5 100644
--- a/sycl/src/core/graph.cpp
+++ b/sycl/src/core/graph.cpp
@@ -17,7 +17,7 @@ namespace {
 /// site is the least useful error this API can produce and the easiest to avoid.
 bool fail(std::string &err, const char *what, dpct::err0 e) {
     /*
-    DPCT1009:68: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -58,10 +58,10 @@ bool CapturedGraph::begin(void *stream, std::string &err) try {
     const dpct::err0 e = DPCT_CHECK_ERROR(
         dpct::experimental::begin_recording(strata::q_of(stream)));
     /*
-    DPCT1001:69: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:70: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaStreamBeginCapture", e);
     return true;
@@ -76,10 +76,10 @@ bool CapturedGraph::end(void *stream, std::string &err) try {
     dpct::err0 e = DPCT_CHECK_ERROR(
         dpct::experimental::end_recording(strata::q_of(stream), &graph_));
     /*
-    DPCT1001:71: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:72: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) {
         graph_ = nullptr; return fail(err, "cudaStreamEndCapture", e);
@@ -89,10 +89,10 @@ bool CapturedGraph::end(void *stream, std::string &err) try {
     e = DPCT_CHECK_ERROR(
         dpct::experimental::get_nodes(graph_, nullptr, &nodes_));
     /*
-    DPCT1001:73: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:74: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaGraphGetNodes", e);
     // A capture that recorded NOTHING is a wiring mistake, and a graph that replays nothing produces no error
@@ -104,10 +104,10 @@ bool CapturedGraph::end(void *stream, std::string &err) try {
             sycl::ext::oneapi::experimental::graph_state::executable>(
             (graph_)->finalize()));
     /*
-    DPCT1001:75: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:76: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaGraphInstantiate", e);
 
@@ -115,10 +115,10 @@ bool CapturedGraph::end(void *stream, std::string &err) try {
     // what makes `wait_ms` a query rather than a sync.
     e = DPCT_CHECK_ERROR(done_ = new sycl::event());
     /*
-    DPCT1001:77: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:78: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaEventCreateWithFlags", e);
     return true;
@@ -134,19 +134,19 @@ bool CapturedGraph::launch(void *stream, std::string &err) const try {
     dpct::err0 e =
         DPCT_CHECK_ERROR(strata::q_of(stream)->ext_oneapi_graph(*exec_));
     /*
-    DPCT1001:79: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:80: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaGraphLaunch", e);
     /*
-    DPCT1012:83: Detected kernel execution time measurement pattern and
+    DPCT1012: Detected kernel execution time measurement pattern and
     generated an initial code for time measurements in SYCL. You can change the
     way time is measured depending on your goals.
     */
     /*
-    DPCT1024:84: The original code returned the error code that was further
+    DPCT1024: The original code returned the error code that was further
     consumed by the program logic. This original code was replaced with 0. You
     may need to rewrite the program logic consuming the error code.
     */
@@ -154,10 +154,10 @@ bool CapturedGraph::launch(void *stream, std::string &err) const try {
     e = DPCT_CHECK_ERROR(*done_ = strata::q_of(stream)
                                       ->ext_oneapi_submit_barrier());
     /*
-    DPCT1001:81: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:82: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (e != 0) return fail(err, "cudaEventRecord", e);
     return true;
@@ -203,19 +203,19 @@ bool GraphRegistry::record(LayerType type, int n_tokens, const std::function<voi
     // The body must not have failed silently.  An error state left on the stream would make EndCapture
     // succeed with a broken graph, so it is checked and cleared first.
     /*
-    DPCT1010:87: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 body_err = 0;
     /*
-    DPCT1000:86: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (body_err != 0) {
         // Abandon the capture without instantiating anything.
         dpct::experimental::command_graph_ptr junk = nullptr;
         /*
-        DPCT1001:85: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         dpct::experimental::end_recording(strata::q_of(stream_), &junk);
         if (junk) delete (junk);
diff --git a/sycl/src/core/layer.cpp b/sycl/src/core/layer.cpp
index 15fabdb0073..f80a8573753 100644
--- a/sycl/src/core/layer.cpp
+++ b/sycl/src/core/layer.cpp
@@ -175,11 +175,13 @@ if (!w.wants_q8k()) {        s_gemv_q8_0_split(x80, p.codes, p.scales, p.offset,
 // namespace
 void layer_set_native_bf16(bool enabled) { native_bf16_projections = enabled; }
 void layer_set_native_flash_attn_short(bool enabled) { native_flash_attn_short = enabled; }
-namespace { bool g_kv_int8 = false, g_kv_q4 = false; }
+namespace { bool g_kv_int8 = false, g_kv_q4 = false, g_kv_hybrid = false; }
 void qsa_set_kv_int8(bool enabled) { g_kv_int8 = enabled; }
 bool qsa_kv_int8() { return g_kv_int8; }
 void qsa_set_kv_q4(bool enabled) { g_kv_q4 = enabled; }
 bool qsa_kv_q4() { return g_kv_q4; }
+void qsa_set_kv_hybrid(bool enabled) { g_kv_hybrid = enabled; }
+bool qsa_kv_hybrid() { return g_kv_hybrid; }
 uint64_t gdn_buffers_bytes(const ModelGeometry& g) {    const int64_t C = g.ssm_conv_channels;    const int64_t V = g.ssm_value_dim;    const uint64_t parts[] = {        q8k_bytes(g.n_embd),
 // x_q8k
 (uint64_t) (g.n_embd / 32) * 34,
@@ -277,7 +279,7 @@ try {
     else {
         gdn_conv_step(b.conv_state, b.qkv, conv_kernel, b.conv_out, C, g.ssm_d_conv, stream);
         /*
-        DPCT1124:794: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -418,7 +420,7 @@ if (db != nullptr && g_publish_kernel) {
     strata::kernels::doorbell_publish(x, b.ids, b.weights, g.n_embd, k, db->d_x_f, db->d_ids, db->d_weights, db->d_seq,
                                       stream);
 /*
-DPCT1124:795: cudaMemcpyAsync is migrated to asynchronous memcpy API. While the
+DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While the
 origin API might be synchronous, it depends on the type of operand memory, so
 you may need to call wait() on event return by memcpy API to ensure
 synchronization behavior.
@@ -568,10 +570,15 @@ KvPlan kv_plan(const QsaShapes& s, int64_t max_cells, int64_t ring_cells) {
     }
     return p;
 }
-uint64_t kv_pool_bytes(const QsaShapes& s, int64_t pages) {
+uint64_t kv_pool_bytes(const QsaShapes& s, int64_t pages, bool hybrid, bool int8) {
+    if (hybrid) {   // K8V4: the INT8 K half (codes + scales) plus the Q4_0 V half (kv_q4.hpp's rotation)
+        const uint64_t rows = (uint64_t) pages * s.page_size * s.n_head_kv;
+        return rows * (uint64_t) s.head_dim + rows * (uint64_t) (s.head_dim / strata::kernels::KV_Q8_GROUP) * 2 +
+               rows * strata::kernels::kv_q4_bytes_per_head((int) s.head_dim) + 64;
+    }
     if (g_kv_q4) return (uint64_t) pages * s.page_size * strata::kernels::kv_q4_bytes_per_cell(s) + 64;
-    return g_kv_int8 ? (uint64_t) pages * s.page_size * strata::kernels::kv_q8_bytes_per_cell(s) + 64
-                     : (uint64_t) pages * s.n_head_kv * s.page_size * s.head_dim * 2 * 2;
+    return int8 ? (uint64_t) pages * s.page_size * strata::kernels::kv_q8_bytes_per_cell(s) + 64
+                : (uint64_t) pages * s.n_head_kv * s.page_size * s.head_dim * 2 * 2;
 }
 }  // namespace
 
@@ -584,7 +591,8 @@ uint64_t qsa_state_bytes(const ModelGeometry& g, int64_t max_cells, bool with_ro
     const QsaShapes s = qsa_shapes(g);
     const KvPlan p = kv_plan(s, max_cells, ring_cells);
     uint64_t n = 0;
-    n += kv_pool_bytes(s, p.slots) + 4 * 16;                                   // K/V pools (the VRAM slots)
+    n += kv_pool_bytes(s, p.slots, g_kv_hybrid && ring_cells <= 0,
+                       g_kv_int8 || g_kv_hybrid) + 4 * 16;   // K/V pools (the VRAM slots)
     n += (uint64_t) p.pages * 4;                                               // page_table
     if (p.mode == 1) n += strata::kernels::kv_stream_map_bytes(p.slots) + 6 * 16;   // the residency map
     n += (uint64_t) (s.idx_block - 1) * s.idx_dim * 4;                         // tail
@@ -606,14 +614,29 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
     Cursor c{(uint8_t*) base};
     st.kv_int8 = g_kv_int8 && !g_kv_q4;
     st.kv_q4 = g_kv_q4;
+    // Hybrid K8V4, main layers only (the drafter's state is created with the globals toggled to INT8 -
+    // mtp.cpp). Streamed mode is refused outright; generate.cpp validates it too, this is the backstop.
+    if (g_kv_hybrid && ring_cells <= 0) {
+        if (p.mode == 1) {
+            std::fprintf(stderr, "strata: hybrid K8V4 KV does not support --kv-resident streaming\n");
+            return 0;
+        }
+        st.kv_hybrid = true;
+        st.kv_int8 = false;
+        st.kv_q4 = false;
+    }
     st.kv_mode = p.mode;
     st.n_slots = p.slots;
     const uint64_t rows = (uint64_t) p.slots * s.n_head_kv * s.page_size;   // VRAM rows: the slots
     const uint64_t q4_row = strata::kernels::kv_q4_bytes_per_head((int) s.head_dim);
-    if (st.kv_q4) {
+    if (st.kv_hybrid) {
+        st.k_q = c.take<int8_t>(rows * s.head_dim);
+        st.k_scale = c.take<uint16_t>(rows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
+        st.v_q4 = c.take<uint8_t>(rows * q4_row);
+    } else if (st.kv_q4) {
         st.k_q4 = c.take<uint8_t>(rows * q4_row);
         st.v_q4 = c.take<uint8_t>(rows * q4_row);
-    } else if (g_kv_int8) {
+    } else if (st.kv_int8) {   // st, not the global: the drafter's ring is INT8 under --kv k8v4 too
         st.k_q = c.take<int8_t>(rows * s.head_dim);
         st.v_q = c.take<int8_t>(rows * s.head_dim);
         st.k_scale = c.take<uint16_t>(rows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
@@ -658,12 +681,12 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
                 strata::kernels::qsa_step_bytes() + sizeof(int32_t),
                 dpct::get_in_order_queue())) != 0 ||
         /*
-        DPCT1048:8: The original value cudaHostAllocMapped is not meaningful in
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
         /*
-        DPCT1048:9: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -681,12 +704,12 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
         uint8_t* h = nullptr;
         uint8_t* d = nullptr;
         /*
-        DPCT1048:10: The original value cudaHostAllocMapped is not meaningful in
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
         /*
-        DPCT1048:11: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -705,7 +728,7 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
         if (st.kv_q4) {
             st.host.k_q4 = hc.take<uint8_t>(hrows * q4_row);
             st.host.v_q4 = hc.take<uint8_t>(hrows * q4_row);
-        } else if (g_kv_int8) {
+        } else if (st.kv_int8) {
             st.host.k_q = hc.take<int8_t>(hrows * s.head_dim);
             st.host.v_q = hc.take<int8_t>(hrows * s.head_dim);
             st.host.k_scale = hc.take<uint16_t>(hrows * (s.head_dim / strata::kernels::KV_Q8_GROUP));
@@ -755,7 +778,14 @@ void qsa_state_zero(const QsaState& st, const ModelGeometry& g, void* stream) {
     const QsaShapes s = qsa_shapes(g);
     dpct::queue_ptr cs = strata::q_of(stream);
     const size_t rows = (size_t) st.n_slots * s.n_head_kv * s.page_size;
-    if (st.kv_q4) {
+    if (st.kv_hybrid) {
+        cs->memset(st.k_q, 0, rows * s.head_dim);
+        cs->memset(st.k_scale, 0,
+                   rows * (s.head_dim / strata::kernels::KV_Q8_GROUP) * 2);
+        cs->memset(st.v_q4, 0,
+                   rows *
+                       strata::kernels::kv_q4_bytes_per_head((int)s.head_dim));
+    } else if (st.kv_q4) {
         cs->memset(st.k_q4, 0,
                    rows *
                        strata::kernels::kv_q4_bytes_per_head((int)s.head_dim));
@@ -785,7 +815,8 @@ void qsa_state_zero(const QsaState& st, const ModelGeometry& g, void* stream) {
 strata::kernels::QsaAttnPools qsa_attn_pools(const QsaState& st) {
     strata::kernels::QsaAttnPools pools;
     pools.page_table = st.page_table;
-    if (st.kv_q4) { pools.k_q4 = st.k_q4; pools.v_q4 = st.v_q4; }
+    if (st.kv_hybrid) { pools.k_q = st.k_q; pools.k_scale = st.k_scale; pools.v_q4 = st.v_q4; }
+    else if (st.kv_q4) { pools.k_q4 = st.k_q4; pools.v_q4 = st.v_q4; }
     else if (st.kv_int8) { pools.k_q = st.k_q; pools.v_q = st.v_q; pools.k_scale = st.k_scale; pools.v_scale = st.v_scale; }
     else { pools.k_pool = st.k_pool; pools.v_pool = st.v_pool; }
     return pools;
@@ -984,7 +1015,7 @@ if (!w_attnk->native_data || !w_attnv->native_data || !w_attnq->native_data) {
             strata::kernels::copy_i32_from_mapped(st.pos_dev, m_pos, g.n_head, stream);
         } else
         /*
-        DPCT1124:796: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -1002,11 +1033,18 @@ if (!gemv_quantized(*w_attnk, p_k, f_k, b.x_q8_0, b.x_q8k, b.kcur, g.n_embd, g.n
 // EVERY ENTRY POINT FROM HERE ON IS THE CAPTURABLE ONE: the per-token counts come from `st.step` and every
 // launch is sized from a capacity in `st`/`b`, so this sequence can be captured and replayed.  The
 // host-scalar wrappers would be correct here today and silently wrong in a graph.
-if (st.kv_q4) {
+if (st.kv_hybrid) {
+    // K8V4: only V is rotated (kv_q4.hpp's H); the scores pair unrotated q with unrotated INT8 K, and the
+    // output - a mix of rotated values - is rotated back after attention. Each append/gather call folds the
+    // unused half's lanes onto the used pool (a bit-identical duplicate write), so no kernel variants exist.
+    strata::kernels::fwht256_inplace_cuda(b.vcur, g.n_head_kv, stream);
+    kv_append_q8_step(st.k_q, st.k_q, st.k_scale, st.k_scale, st.page_table, st.step, b.kcur, b.kcur, s, stream, nullptr);   // mode 0: no host mirror
+    strata::kernels::kv_append_q4_step(st.v_q4, st.v_q4, st.page_table, st.step, b.vcur, b.vcur, s, stream, nullptr);
+} else if (st.kv_q4) {
     strata::kernels::fwht256_inplace_cuda(b.kcur, g.n_head_kv, stream);   // Q4_0: rotated K and V (kv_q4.hpp)
     strata::kernels::fwht256_inplace_cuda(b.vcur, g.n_head_kv, stream);
     strata::kernels::kv_append_q4_step(st.k_q4, st.v_q4, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);
-} else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
+} else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
     try {
         native_qsa_indexer_append(b.idx_raw, st.step + kStepPos, pos_base,
             (const float*) w_ikn->data, RMS_EPS, ib, s, st.max_cells, (float) qsa_freq_base(), stream);
@@ -1024,7 +1062,7 @@ if (!gemv_quantized(*w_attnq, p_q, f_q, b.x_q8_0, b.x_q8k, b.q_full, g.n_embd, g
 // the norm and the rotation see whole rows.  A 2-D copy is a memcpy node, which captures (`pinned_capture`
 // case A) and needs no kernel.
 /*
-DPCT1124:797: cudaMemcpy2DAsync is migrated to asynchronous memcpy API. While
+DPCT1124: cudaMemcpy2DAsync is migrated to asynchronous memcpy API. While
 the origin API might be synchronous, it depends on the type of operand memory,
 so you may need to call wait() on event return by memcpy API to ensure
 synchronization behavior.
@@ -1057,7 +1095,13 @@ int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
         const strata::kernels::QsaAttnPools pools = qsa_attn_pools(st);
         strata::kernels::qsa_decode_attn_step(b.qcur, pools, b.ids, st.step, cap, s, b.attn_scratch, b.attn, stream);
     } else {
-    if (st.kv_q4) strata::kernels::kv_gather_q4_step(st.k_q4, st.v_q4, st.page_table, b.ids, st.step, cap, s, b.k_scratch, b.v_scratch, stream);
+    if (st.kv_hybrid) {
+        kv_gather_q8_step(st.k_q, st.k_q, st.k_scale, st.k_scale, st.page_table, b.ids, st.step, cap, s,
+                          b.k_scratch, b.k_scratch, stream);
+        strata::kernels::kv_gather_q4_step(st.v_q4, st.v_q4, st.page_table, b.ids, st.step, cap, s,
+                                           b.v_scratch, b.v_scratch, stream);
+    }
+    else if (st.kv_q4) strata::kernels::kv_gather_q4_step(st.k_q4, st.v_q4, st.page_table, b.ids, st.step, cap, s, b.k_scratch, b.v_scratch, stream);
     else if (st.kv_int8) kv_gather_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, b.ids, st.step, cap, s,                                 b.k_scratch, b.v_scratch, stream);    else kv_gather_step(st.k_pool, st.v_pool, st.page_table, b.ids, st.step, cap, s, b.k_scratch, b.v_scratch,                   stream);    if (native_flash_attn_short) {
     if (st.max_cells < 1 || st.max_cells > 256 || !st.attention_status || !st.host_step) {
         err = v.name("native_flash_attn") + ": short adapter requires context <=256 and persistent status storage";
@@ -1068,7 +1112,7 @@ int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
             (int) st.max_cells, s, b.attn, st.attention_status, nullptr, stream);
     } catch (const std::exception& error) { err = v.name("native_flash_attn") + ": " + error.what(); return false; }
     /*
-    DPCT1124:798: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -1080,7 +1124,7 @@ int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
     }
 } else qsa_attend_step(b.qcur, b.k_scratch, b.v_scratch, st.step, cap, s, b.attn, nullptr, stream);
     }
-    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(b.attn, g.n_head, stream);   // the output back: H is self-inverse
+    if (st.kv_q4 || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(b.attn, g.n_head, stream);   // the output back: H is self-inverse
     dump_slot(dump, g, layer, b.attn, (uint64_t) 2 * g.n_embd + 2 * g.hc,                            (uint64_t) g.n_head * g.head_dim, stream);    {        const uint64_t vs = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim +                            (uint64_t) 2 * g.n_head_kv * g.head_dim;        dump_slot(dump, g, layer, (const float*) b.v_scratch, vs,                            (uint64_t) g.n_head_kv * g.head_dim / 2, stream);        dump_slot(dump, g, layer, (const float*) b.ids, vs + (uint64_t) g.n_head_kv * g.head_dim / 2, 4, stream);        dump_slot(dump, g, layer, (const float*) st.step,                            vs + (uint64_t) g.n_head_kv * g.head_dim / 2 + 4, 4, stream);    }
 // ---- 9. Gate the attention output before its projection. Native CUDA keeps F32
 // sigmoid/multiply arithmetic and uses Q8_1 for the native quantized projection.
@@ -1103,7 +1147,7 @@ uint64_t doorbell_init(const ModelGeometry& g, int64_t k, Doorbell& db) {    db.
 // ONE region per field, each MAPPED PINNED, so the device and the host have different pointers to the same
 // bytes and no copy is needed to publish them.
 /*
-DPCT1048:12: The original value cudaHostAllocMapped is not meaningful in the
+DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
 migrated code and was removed or replaced with 0. You may need to check the
 migrated code.
 */
@@ -1260,7 +1304,7 @@ static void dump_slot(float* dump, const ModelGeometry& g, int64_t layer, const
                       uint64_t n, void* stream) {
     if (dump == nullptr || src == nullptr || n == 0) return;
     /*
-    DPCT1124:799: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -1332,7 +1376,7 @@ bool block_layer_pre(const WeightTable &tables, const ModelGeometry &g,
         // would be the natural reading and would scramble the channels.
         strata::kernels::ple_history_advance(ple->hist, po.normalized, stream);
         /*
-        DPCT1010:800: SYCL uses exceptions to report errors and does not use the
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
         error codes. The cudaPeekAtLastError function call was replaced with 0.
         You need to rewrite this code.
         */
@@ -1420,7 +1464,7 @@ bool ple_finish_token(const PleRun &p, void *stream, std::string &err) try {
     if (!p.ready()) { err = "ple_finish_token: the PLE run is not ready"; return false; }
     if (!p.table->collect(p.emb_host, err)) { err = "ple_finish_token: " + err; return false; }
     /*
-    DPCT1124:801: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index ec52da5b032..6f0f9eee784 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -57,7 +57,7 @@ struct Bump {
 
 bool mapped(size_t bytes, void **h, void **d) try {
     /*
-    DPCT1048:0: The original value cudaHostAllocMapped is not meaningful in the
+    DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
     migrated code and was removed or replaced with 0. You may need to check the
     migrated code.
     */
@@ -177,13 +177,13 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
             DPCT_CHECK_ERROR(dense_ = (uint8_t *)sycl::malloc_device(
                                  blob.size(), dpct::get_in_order_queue()));
         /*
-        DPCT1000:10: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (alloc != 0) {
             size_t free_bytes = 0, total_bytes = 0;
             /*
-            DPCT1106:12: 'cudaMemGetInfo' was migrated with the Intel extensions
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
             for device information which may not be supported by all compilers
             or runtimes. You may need to adjust the code.
             */
@@ -191,12 +191,12 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
                 DPCT_CHECK_ERROR(dpct::get_current_device().get_memory_info(
                     free_bytes, total_bytes));
             /*
-            DPCT1009:13: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:9: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "mtp: dense weights allocation failed (" +
                   std::string(dpct::get_error_string_dummy(alloc)) +
@@ -207,7 +207,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
             return false;
         }
         /*
-        DPCT1114:11: cudaMemcpy is migrated to asynchronization memcpy, assuming
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
         in the original code the source host memory is pageable memory. If the
         memory is not pageable, call wait() on event return by memcpy API to
         ensure synchronization behavior.
@@ -253,6 +253,12 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
     // window (plus the cells a round writes ahead of its queries) over a host copy, refilled on a resume. The host copy
     // is pinned after the expert arena has pinned what it could: if it does not fit, the K/V stays whole in VRAM.
     int64_t ring = (window > 0 && window < max_cells) ? window + 4 * (int64_t) max_t + 64 : 0;
+    // K8V4 never applies to the drafter: its own attention paths (below, and verify.cpp) handle whole formats
+    // only, whatever ring shape it takes (0, a window, or the -1 fully-resident fallback).
+    const bool kv_hybrid_was = qsa_kv_hybrid();
+    const bool kv_int8_was = qsa_kv_int8();
+    qsa_set_kv_hybrid(false);
+    if (kv_hybrid_was) qsa_set_kv_int8(true);   // the drafter under --kv k8v4: plain INT8
     uint64_t sb = qsa_state_bytes(g, max_cells, false, ring);
     if (DPCT_CHECK_ERROR(state_arena_ = (void *)sycl::malloc_device(
                              sb, dpct::get_in_order_queue())) != 0) {
@@ -262,7 +268,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         if (st_.kv_mode == 0) { err = "mtp: state init failed"; return false; }
         std::fprintf(stderr, "strata mtp: no pinned RAM left for the draft layer's K/V copy; keeping it in VRAM\n");
         /*
-        DPCT1026:14: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         sycl::free(state_arena_, dpct::get_in_order_queue());
@@ -275,6 +281,8 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         }
         if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[0], ring) == 0) { err = "mtp: state init failed"; return false; }
     }
+    qsa_set_kv_int8(kv_int8_was);
+    qsa_set_kv_hybrid(kv_hybrid_was);
     qsa_state_zero(st_, g, nullptr);
     dpct::get_current_device().queues_wait_and_throw();
     vram_ += sb;
@@ -337,7 +345,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         for (uint64_t t = 0; t < T; ++t)
             for (int64_t i = 0; i < cap_; ++i) id[(size_t) (t * (uint64_t) cap_ + (uint64_t) i)] = (int32_t) i;
         /*
-        DPCT1114:15: cudaMemcpy is migrated to asynchronization memcpy, assuming
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
         in the original code the source host memory is pageable memory. If the
         memory is not pageable, call wait() on event return by memcpy API to
         ensure synchronization behavior.
@@ -345,7 +353,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
         dpct::get_in_order_queue().memcpy(ident_, id.data(), id.size() * 4).wait();
     }
     /*
-    DPCT1025:16: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     if (DPCT_CHECK_ERROR(cs_ = dpct::get_current_device().create_queue(true)) !=
@@ -496,7 +504,7 @@ bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
         for (int t = 0; t < T; ++t) {
             float* qc = qcur_ + t * NH * HD;
             /*
-            DPCT1124:17: cudaMemcpy2DAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpy2DAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -603,7 +611,7 @@ bool finish_capture(dpct::queue_ptr cs, bool ok,
                 graph->finalize())) != 0) {
         if (graph) delete (graph);
         /*
-        DPCT1009:19: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
@@ -614,7 +622,7 @@ bool finish_capture(dpct::queue_ptr cs, bool ok,
     delete (graph);
     // an explicit upload: the first launch's implicit one blocked behind a device-side spin (verify.cpp)
     /*
-    DPCT1007:18: Migration of cudaGraphUpload is not supported.
+    DPCT1007: Migration of cudaGraphUpload is not supported.
     */
     // no cudaGraphUpload on SYCL: a finalized command_graph is already resident
     cs->wait();
@@ -764,7 +772,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
             for (int64_t h = 0; h < NHp; ++h) ps[i * NHp + h] = (int32_t) cell;
         }
         /*
-        DPCT1124:20: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -782,7 +790,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
             if (cell0 + c + T <= first_needed) continue;
             if (!capture_prefill_dev(T, err)) return false;
             /*
-            DPCT1124:21: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
             While the origin API might be synchronous, it depends on the type of
             operand memory, so you may need to call wait() on event return by
             memcpy API to ensure synchronization behavior.
@@ -790,7 +798,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
             if (DPCT_CHECK_ERROR(cs_->memcpy(tok_, d_tk + c, (size_t)T * 4)) !=
                     0 ||
                 /*
-                DPCT1124:22: cudaMemcpyAsync is migrated to asynchronous memcpy
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
                 API. While the origin API might be synchronous, it depends on
                 the type of operand memory, so you may need to call wait() on
                 event return by memcpy API to ensure synchronization behavior.
@@ -798,7 +806,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
                 DPCT_CHECK_ERROR(
                     cs_->memcpy(step_, d_stp + c * 4, (size_t)T * 16)) != 0 ||
                 /*
-                DPCT1124:23: cudaMemcpyAsync is migrated to asynchronous memcpy
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
                 API. While the origin API might be synchronous, it depends on
                 the type of operand memory, so you may need to call wait() on
                 event return by memcpy API to ensure synchronization behavior.
@@ -806,7 +814,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
                 DPCT_CHECK_ERROR(cs_->memcpy(pos_, d_ps + c * NHp,
                                              (size_t)(T * NHp) * 4)) != 0 ||
                 /*
-                DPCT1124:24: cudaMemcpyAsync is migrated to asynchronous memcpy
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
                 API. While the origin API might be synchronous, it depends on
                 the type of operand memory, so you may need to call wait() on
                 event return by memcpy API to ensure synchronization behavior.
@@ -817,13 +825,13 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
                 DPCT_CHECK_ERROR(
                     (cs_)->ext_oneapi_graph(*prefill_dev_exec_[T])) != 0) {
                 /*
-                DPCT1009:25: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1010:26: SYCL uses exceptions to report errors and does not
+                DPCT1010: SYCL uses exceptions to report errors and does not
                 use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
@@ -834,12 +842,12 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
         }
         if (DPCT_CHECK_ERROR(cs_->wait()) != 0) {
             /*
-            DPCT1009:27: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1010:28: SYCL uses exceptions to report errors and does not use
+            DPCT1010: SYCL uses exceptions to report errors and does not use
             the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
@@ -864,7 +872,7 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
             for (int64_t h = 0; h < g_->n_head; ++h) h_pos_[t * g_->n_head + h] = (int32_t) cell;
         }
         /*
-        DPCT1124:29: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -875,12 +883,12 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
             DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*prefill_exec_[T])) != 0 ||
             DPCT_CHECK_ERROR(cs_->wait()) != 0) {
             /*
-            DPCT1009:30: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1010:31: SYCL uses exceptions to report errors and does not use
+            DPCT1010: SYCL uses exceptions to report errors and does not use
             the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
@@ -923,12 +931,12 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
     if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*round_exec_[T])) != 0 ||
         DPCT_CHECK_ERROR(cs_->wait()) != 0) {
         /*
-        DPCT1009:32: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
         /*
-        DPCT1010:33: SYCL uses exceptions to report errors and does not use the
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
         error codes. The cudaGetLastError function call was replaced with 0. You
         need to rewrite this code.
         */
@@ -947,12 +955,12 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
         if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*step_exec_[j])) != 0 ||
             DPCT_CHECK_ERROR(cs_->wait()) != 0) {
             /*
-            DPCT1009:34: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1010:35: SYCL uses exceptions to report errors and does not use
+            DPCT1010: SYCL uses exceptions to report errors and does not use
             the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
diff --git a/sycl/src/core/native_dense.cpp b/sycl/src/core/native_dense.cpp
index 51c2ca9703e..1d7da714235 100644
--- a/sycl/src/core/native_dense.cpp
+++ b/sycl/src/core/native_dense.cpp
@@ -18,9 +18,9 @@ namespace {
 bool eligible(const strata::TensorInfo& tensor, bool include_ple_key) {
     const auto& name = tensor.name;
     if (name.rfind("blk.", 0) != 0) return false;
-    // The native PLE kernel accepts Q2_0. Other quantized keys can be converted to BF16 by iq_pack;
-    // keep their packed bytes resident instead of overriding them with an unsupported native key.
-    if (name == "blk.1.ple_key.weight") return include_ple_key && tensor.type == 42;   // 42 = Q2_0
+    // Match the native PLE kernel: Q2_0, IQ3_XXS and IQ4_XS. Other keys retain the packed BF16 fallback.
+    if (name == "blk.1.ple_key.weight")
+        return include_ple_key && (tensor.type == 42 || tensor.type == 18 || tensor.type == 23);
     static const char* suffixes[] = {".attn_qkv.weight", ".attn_gate.weight", ".ssm_out.weight",
         ".attn_q.weight", ".attn_k.weight", ".attn_v.weight", ".attn_output.weight",
         ".ffn_gate_shexp.weight", ".ffn_up_shexp.weight", ".ffn_down_shexp.weight"};
@@ -165,18 +165,18 @@ bool NativeDense::load(const std::vector<std::string> &shards,
                             .memcpy(data.get(), gguf.tensor_data(tensor), bytes)
                             .wait());
                 /*
-                DPCT1000:420: Error handling if-stmt was detected but could not
+                DPCT1000: Error handling if-stmt was detected but could not
                 be rewritten.
                 */
                 if (status != 0) {
                     /*
-                    DPCT1009:421: SYCL reports errors using exceptions and does
+                    DPCT1009: SYCL reports errors using exceptions and does
                     not use error codes. Please replace the
                     "get_error_string_dummy(...)" with a real error-handling
                     function.
                     */
                     /*
-                    DPCT1001:419: The statement could not be removed.
+                    DPCT1001: The statement could not be removed.
                     */
                     err = "native dense upload " + tensor.name + ": " +
                           dpct::get_error_string_dummy(status);
@@ -195,15 +195,15 @@ bool NativeDense::load(const std::vector<std::string> &shards,
                                  dpct::get_in_order_queue()));
         DevicePtr scratch(allocation);
         /*
-        DPCT1009:422: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:417: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         /*
-        DPCT1000:418: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (status != 0) {
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
index 5c8566a8094..a3924b65c99 100644
--- a/sycl/src/core/native_head.cpp
+++ b/sycl/src/core/native_head.cpp
@@ -61,19 +61,19 @@ bool NativeHead::load(const std::string &path, int64_t n_in, int64_t n_out,
                     .memcpy(weights, gguf.tensor_data(*tensor), bytes)
                     .wait());
         /*
-        DPCT1000:1107: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (status != 0) {
             if (scratch) sycl::free(scratch, dpct::get_in_order_queue());
             if (weights) sycl::free(weights, dpct::get_in_order_queue());
             /*
-            DPCT1009:1108: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:1106: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = std::string("native head upload: ") +
                   dpct::get_error_string_dummy(status);
@@ -115,23 +115,23 @@ bool NativeHead::run(const float *mixed, float *logits, void *stream,
         return false;
     }
     /*
-    DPCT1010:1111: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaPeekAtLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 status = 0;
     /*
-    DPCT1000:1110: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (status != 0) {
         /*
-        DPCT1009:1112: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:1109: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("native head launch: ") +
               dpct::get_error_string_dummy(status);
@@ -173,12 +173,12 @@ bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
         row_ = strata::kernels::iq_row_bytes((int) t->type, n_embd);
         bytes_ = (uint64_t) row_ * (uint64_t) n_vocab;
         /*
-        DPCT1048:19: The original value cudaHostAllocMapped is not meaningful in
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
         /*
-        DPCT1048:20: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
diff --git a/sycl/src/core/overlap_main.cpp b/sycl/src/core/overlap_main.cpp
index 3297a2e5f2e..31d0a88eda3 100644
--- a/sycl/src/core/overlap_main.cpp
+++ b/sycl/src/core/overlap_main.cpp
@@ -104,7 +104,7 @@ int main(int argc, char** argv) {
     std::vector<uint16_t> hx((size_t) n_in, 0x3C00);
     std::vector<float> hs((size_t) n_out * (size_t) (n_in / 64), 0.001f);
     /*
-    DPCT1114:657: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -113,7 +113,7 @@ int main(int argc, char** argv) {
               d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
-    DPCT1114:658: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -142,7 +142,7 @@ int main(int argc, char** argv) {
     auto t0 = std::chrono::steady_clock::now();
     for (int i = 0; i < experts; ++i) {
         /*
-        DPCT1124:659: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -167,7 +167,7 @@ int main(int argc, char** argv) {
         check(DPCT_CHECK_ERROR(ev[b] = new sycl::event()), "event");
     t0 = std::chrono::steady_clock::now();
     /*
-    DPCT1124:660: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -176,7 +176,7 @@ int main(int argc, char** argv) {
         DPCT_CHECK_ERROR(s_copy->memcpy(d_codes[0], arena.data(), role_codes)),
         "prologue");
     /*
-    DPCT1024:661: The original code returned the error code that was further
+    DPCT1024: The original code returned the error code that was further
     consumed by the program logic. This original code was replaced with 0. You
     may need to rewrite the program logic consuming the error code.
     */
@@ -186,7 +186,7 @@ int main(int argc, char** argv) {
         const int cur = i & 1, nxt = (i + 1) & 1;
         if (i + 1 < experts) {
             /*
-            DPCT1124:662: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -197,7 +197,7 @@ int main(int argc, char** argv) {
                     role_codes)),
                 "overlap copy");
             /*
-            DPCT1024:663: The original code returned the error code that was
+            DPCT1024: The original code returned the error code that was
             further consumed by the program logic. This original code was
             replaced with 0. You may need to rewrite the program logic consuming
             the error code.
diff --git a/sycl/src/core/pinned.dp.cpp b/sycl/src/core/pinned.dp.cpp
index 86c84dbb555..5b5d33da102 100644
--- a/sycl/src/core/pinned.dp.cpp
+++ b/sycl/src/core/pinned.dp.cpp
@@ -122,7 +122,7 @@ uint64_t fnv1a64(const uint8_t* p, uint64_t n, uint64_t seed) {
 
 namespace {
 /*
-DPCT1010:1113: SYCL uses exceptions to report errors and does not use the error
+DPCT1010: SYCL uses exceptions to report errors and does not use the error
 codes. The cudaGetLastError function call was replaced with 0. You need to
 rewrite this code.
 */
@@ -156,7 +156,7 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
         const dpct::err0 e =
             capped ? 0 :
                    /*
-                   DPCT1027:1114: The call to cudaHostRegister was replaced with
+                   DPCT1027: The call to cudaHostRegister was replaced with
                    0 because SYCL currently does not support registering of
                    existing host memory for use by device. Use USM to allocate
                    memory for use by host and device.
@@ -173,14 +173,14 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
                 const uint64_t off = bounds[i], n = bounds[i + 1] - bounds[i];
                 if (capped && (off > max_pinned_bytes || n > max_pinned_bytes - off)) break;
                 /*
-                DPCT1027:1115: The call to cudaHostRegister was replaced with 0
+                DPCT1027: The call to cudaHostRegister was replaced with 0
                 because SYCL currently does not support registering of existing
                 host memory for use by device. Use USM to allocate memory for
                 use by host and device.
                 */
                 if (0 != 0) {
                     /*
-                    DPCT1010:1116: SYCL uses exceptions to report errors and
+                    DPCT1010: SYCL uses exceptions to report errors and
                     does not use the error codes. The cudaGetLastError function
                     call was replaced with 0. You need to rewrite this code.
                     */
@@ -197,7 +197,7 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
                               " GiB for CUDA1; "
                         :
                         /*
-                        DPCT1009:1117: SYCL reports errors using exceptions and
+                        DPCT1009: SYCL reports errors using exceptions and
                         does not use error codes. Please replace the
                         "get_error_string_dummy(...)" with a real error-handling
                         function.
@@ -217,7 +217,7 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
             }
         } else {
             /*
-            DPCT1009:1118: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
@@ -237,7 +237,7 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
             // It is the same trap `gr.cu` warns about for ASYNC faults, in the other direction: a synchronous
             // failure is sticky too, and it lies about where it happened just as convincingly.
             /*
-            DPCT1010:1119: SYCL uses exceptions to report errors and does not
+            DPCT1010: SYCL uses exceptions to report errors and does not
             use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
@@ -267,7 +267,7 @@ PinnedArena::~PinnedArena() {
         if (locked_bytes) strata::platform::unlock_resident((uint8_t*) base + (slice_bytes ? registered_bytes : 0), locked_bytes);
         if (slice_bytes) {
             /*
-            DPCT1027:1120: The call to cudaHostUnregister was replaced with 0
+            DPCT1027: The call to cudaHostUnregister was replaced with 0
             because SYCL currently does not support registering of existing host
             memory for use by device. Use USM to allocate memory for use by host
             and device.
@@ -275,7 +275,7 @@ PinnedArena::~PinnedArena() {
             for (uint64_t off : slice_starts) 0;
         } else {
             /*
-            DPCT1026:1121: The call to cudaHostUnregister was removed because
+            DPCT1026: The call to cudaHostUnregister was removed because
             SYCL currently does not support registering of existing host memory
             for use by device. Use USM to allocate memory for use by host and
             device.
@@ -411,7 +411,7 @@ StreamStats stream_bandwidth(const uint8_t *src, uint64_t bytes, uint64_t chunk,
     // one untimed pass so the first transfer's page-fault and setup cost is not in the measurement
     for (uint64_t off = 0; off + chunk <= bytes; off += chunk) {
         /*
-        DPCT1124:1122: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -424,7 +424,7 @@ StreamStats stream_bandwidth(const uint8_t *src, uint64_t bytes, uint64_t chunk,
     for (int it = 0; it < iters; ++it) {
         for (uint64_t off = 0; off + chunk <= bytes; off += chunk) {
             /*
-            DPCT1124:1123: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
diff --git a/sycl/src/core/remote_experts.cpp b/sycl/src/core/remote_experts.cpp
index 2cec2f1be40..5d198b0fb0c 100644
--- a/sycl/src/core/remote_experts.cpp
+++ b/sycl/src/core/remote_experts.cpp
@@ -41,7 +41,7 @@ struct DeviceScope {
             return;
         }
         /*
-        DPCT1093:88: The "device" device may be not the one intended for use.
+        DPCT1093: The "device" device may be not the one intended for use.
         Adjust the selected device if needed.
         */
         status = DPCT_CHECK_ERROR(dpct::select_device(device));
@@ -52,7 +52,7 @@ struct DeviceScope {
         ok = true;
     }
     /*
-    DPCT1093:89: The "previous" device may be not the one intended for use.
+    DPCT1093: The "previous" device may be not the one intended for use.
     Adjust the selected device if needed.
     */
     ~DeviceScope() { if (previous >= 0) dpct::select_device(previous); }
@@ -60,7 +60,7 @@ struct DeviceScope {
         return std::string("CUDA") + std::to_string(device) +
                " experts: " + (failed_step ? failed_step : "device switch") +
                /*
-               DPCT1009:90: SYCL reports errors using exceptions and does not
+               DPCT1009: SYCL reports errors using exceptions and does not
                use error codes. Please replace the "get_error_string_dummy(...)"
                with a real error-handling function.
                */
@@ -74,7 +74,7 @@ struct DeviceScope {
 bool check(dpct::err0 result, const char *what, std::string &err, int device) {
     if (result == 0) return true;
     /*
-    DPCT1009:91: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -100,18 +100,18 @@ bool RemoteExperts::preflight(int device, double &free_gib,
     // before the device's context exists, so first thing; STRATA_REMOTE_SPIN=0 keeps the driver's default.
     const char* spin = std::getenv("STRATA_REMOTE_SPIN");
     /*
-    DPCT1007:93: Migration of cudaInitDevice is not supported.
+    DPCT1007: Migration of cudaInitDevice is not supported.
     */
     (void) spin;   // SYCL: no cudaInitDevice scheduling flags; the runtime picks its own wait policy
     /*
-    DPCT1026:92: The call to cudaGetLastError was removed because this
+    DPCT1026: The call to cudaGetLastError was removed because this
     functionality is redundant in SYCL.
     */
     DeviceScope scope(device);
     if (!scope.ok) { err = scope.error(device); return false; }
     size_t free_bytes = 0, total_bytes = 0;
     /*
-    DPCT1106:94: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
     device information which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
@@ -195,7 +195,7 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
     }
     size_t free_bytes = 0, total_bytes = 0;
     /*
-    DPCT1106:96: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
     device information which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
@@ -237,19 +237,19 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
         strata::kernels::native_expert_scratch_bytes(CAP, FF));
     const bool allocated =
         /*
-        DPCT1025:97: The SYCL queue is created ignoring the flag and priority
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
         options.
         */
         check(DPCT_CHECK_ERROR(
                   stream_ = dpct::get_current_device().create_queue(true)),
               "stream", err, device) &&
         /*
-        DPCT1048:2: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
         /*
-        DPCT1048:3: The original value cudaHostAllocMapped is not meaningful in
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -258,12 +258,12 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
                                  (size_t)CAP * H, dpct::get_in_order_queue())),
             "input staging", err, device) &&
         /*
-        DPCT1048:4: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
         /*
-        DPCT1048:5: The original value cudaHostAllocMapped is not meaningful in
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -272,7 +272,7 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
                                  (size_t)CAP * H, dpct::get_in_order_queue())),
             "result staging", err, device) &&
         /*
-        DPCT1048:6: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -311,7 +311,7 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
                  DPCT_CHECK_ERROR(*(void **)&z_x_ = (float *)h_x_) == 0 &&
                  DPCT_CHECK_ERROR(*(void **)&z_out_ = (float *)h_out_) == 0;
     /*
-    DPCT1026:95: The call to cudaGetLastError was removed because this
+    DPCT1026: The call to cudaGetLastError was removed because this
     functionality is redundant in SYCL.
     */
     auto *meta = (RemoteMeta *)d_meta_;
@@ -405,7 +405,7 @@ bool RemoteExperts::begin(int64_t layer, const float *x, const int32_t *ids,
     const dpct::queue_ptr s = stream_;
     const bool staged =
         /*
-        DPCT1124:98: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -415,7 +415,7 @@ bool RemoteExperts::begin(int64_t layer, const float *x, const int32_t *ids,
                    s->memcpy(d_x_, h_x_, (size_t)n_tok * H * sizeof(float))),
                "copy input", err, device_)) &&
         /*
-        DPCT1124:99: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -437,7 +437,7 @@ bool RemoteExperts::begin(int64_t layer, const float *x, const int32_t *ids,
     }
     const uint64_t compact_bytes = (uint64_t) dst_.size() * H * sizeof(float);
     /*
-    DPCT1124:100: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
diff --git a/sycl/src/core/session.cpp b/sycl/src/core/session.cpp
index f23b4a0a37c..1b3bd74052e 100644
--- a/sycl/src/core/session.cpp
+++ b/sycl/src/core/session.cpp
@@ -116,7 +116,7 @@ void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init,
     if (R_init != nullptr) {
         for (int64_t c = 0; c < g.hc; ++c)
             /*
-            DPCT1124:538: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -234,17 +234,17 @@ bool session_capture(const WeightTable& tables, const ModelGeometry& g, SessionS
                 DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &graph));
             dpct::get_current_device().destroy_queue(cs);
             /*
-            DPCT1000:540: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (ce != 0) {
                 /*
-                DPCT1001:539: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = "session_capture: " + std::string(what) + " layer " +
                       std::to_string(l) + ": " +
                       /*
-                      DPCT1009:541: SYCL reports errors using exceptions and
+                      DPCT1009: SYCL reports errors using exceptions and
                       does not use error codes. Please replace the
                       "get_error_string_dummy(...)" with a real error-handling
                       function.
@@ -301,17 +301,17 @@ bool session_replay(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         const dpct::err0 e =
             DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l]));
         /*
-        DPCT1000:543: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (e != 0) {
             /*
-            DPCT1009:544: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:542: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "session_replay: layer " + std::to_string(l) + ": " +
                   dpct::get_error_string_dummy(e);
@@ -340,17 +340,17 @@ bool session_replay_full(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         // `post[l]` reads what `pre[l]` wrote, so they cannot be reordered or run concurrently.
         dpct::err0 e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l]));
         /*
-        DPCT1000:546: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (e != 0) {
             /*
-            DPCT1009:549: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:545: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "session_replay_full: pre[" + std::to_string(l) +
                   "]: " + dpct::get_error_string_dummy(e);
@@ -358,17 +358,17 @@ bool session_replay_full(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         }
         e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.posts[l]));
         /*
-        DPCT1000:548: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (e != 0) {
             /*
-            DPCT1009:550: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:547: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "session_replay_full: post[" + std::to_string(l) +
                   "]: " + dpct::get_error_string_dummy(e);
@@ -491,17 +491,17 @@ bool session_replay_stage_sweep(const ModelGeometry &g, int64_t pos,
         const dpct::err0 e =
             DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.preP[k - 1][l]));
         /*
-        DPCT1000:552: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (e != 0) {
             /*
-            DPCT1001:551: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             dpct::destroy_event(a);
             dpct::destroy_event(b);
             /*
-            DPCT1009:553: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
@@ -578,7 +578,7 @@ bool session_replay_stage_prefixes(const ModelGeometry &g, int64_t pos,
     for (int64_t l = 0; l < n; ++l) {
         // The residual as this layer receives it, before any prefix has advanced it.
         /*
-        DPCT1124:554: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -586,7 +586,7 @@ bool session_replay_stage_prefixes(const ModelGeometry &g, int64_t pos,
         cs->memcpy(saved, s.block.R, r_floats * sizeof(float));
         for (int k = 1; k <= 5; ++k) {
             /*
-            DPCT1124:557: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -597,18 +597,18 @@ bool session_replay_stage_prefixes(const ModelGeometry &g, int64_t pos,
                 (k == 5) ? gr.execs[l] : gr.preP[k - 1][l];
             const dpct::err0 e = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*ge));
             /*
-            DPCT1000:556: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (e != 0) {
                 /*
-                DPCT1001:555: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = std::string(
                           "session_replay_stage_prefixes: launch prefix ") +
                       std::to_string(k) + ": " +
                       /*
-                      DPCT1009:558: SYCL reports errors using exceptions and
+                      DPCT1009: SYCL reports errors using exceptions and
                       does not use error codes. Please replace the
                       "get_error_string_dummy(...)" with a real error-handling
                       function.
@@ -723,12 +723,12 @@ bool SessionLoopScratch::init(size_t parts_bytes_in, std::string &err) try {
     parts_bytes = parts_bytes_in;
     // MAPPED as well as pinned: the token graph's handoff kernel reads it through its device pointer.
     /*
-    DPCT1048:0: The original value cudaHostAllocMapped is not meaningful in the
+    DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
     migrated code and was removed or replaced with 0. You may need to check the
     migrated code.
     */
     /*
-    DPCT1048:1: The original value cudaHostAllocPortable is not meaningful in
+    DPCT1048: The original value cudaHostAllocPortable is not meaningful in
     the migrated code and was removed or replaced with 0. You may need to check
     the migrated code.
     */
@@ -844,7 +844,7 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
     // the first layer has no previous layer's experts: `y_miss` starts at zero, which is what "hits are empty
     // in this phase" means once every miss has been computed
     /*
-    DPCT1124:559: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -862,7 +862,7 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
     if (dump_layers != nullptr) {
         const size_t n = (size_t) g.hc * (size_t) g.n_embd;
         /*
-        DPCT1124:562: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -870,17 +870,17 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         const dpct::err0 de =
             DPCT_CHECK_ERROR(cs->memcpy(dump_layers, s.R, n * sizeof(float)));
         /*
-        DPCT1000:561: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (de != 0) {
             /*
-            DPCT1009:563: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:560: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "session_loop: dump the input residual: " +
                   std::string(dpct::get_error_string_dummy(de));
@@ -892,17 +892,17 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         const dpct::err0 le =
             DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[0]));
         /*
-        DPCT1000:565: Error handling if-stmt was detected but could not be
+        DPCT1000: Error handling if-stmt was detected but could not be
         rewritten.
         */
         if (le != 0) {
             /*
-            DPCT1009:566: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1001:564: The statement could not be removed.
+            DPCT1001: The statement could not be removed.
             */
             err = "session_loop: launch pre[0]: " +
                   std::string(dpct::get_error_string_dummy(le));
@@ -940,7 +940,7 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
             if (q == 0) break; // the graph has ended
             if (q != 1) {
                 /*
-                DPCT1009:568: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
@@ -980,7 +980,7 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         // the weights were current.  It produced finite, fluent, deterministic tokens that were not the
         // model's, and no timing test could see it.
         /*
-        DPCT1124:567: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -994,18 +994,18 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
             const dpct::err0 pe =
                 DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.posts[l]));
             /*
-            DPCT1000:570: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (pe != 0) {
                 /*
-                DPCT1009:571: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1001:569: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = "session_loop: launch post[" + std::to_string(l) +
                       "]: " + dpct::get_error_string_dummy(pe);
@@ -1019,7 +1019,7 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
         if (dump_layers != nullptr) {
             const size_t n = (size_t) g.hc * (size_t) g.n_embd;
             /*
-            DPCT1124:574: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -1027,18 +1027,18 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
             const dpct::err0 de = DPCT_CHECK_ERROR(cs->memcpy(
                 dump_layers + (size_t)(l + 1) * n, s.R, n * sizeof(float)));
             /*
-            DPCT1000:573: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (de != 0) {
                 /*
-                DPCT1009:575: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1001:572: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = "session_loop: dump layer " + std::to_string(l) + ": " +
                       dpct::get_error_string_dummy(de);
@@ -1060,18 +1060,18 @@ bool session_loop(const ModelGeometry &g, int64_t pos, int32_t pos_base,
             const dpct::err0 ne =
                 DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*gr.execs[l + 1]));
             /*
-            DPCT1000:577: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (ne != 0) {
                 /*
-                DPCT1009:578: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1001:576: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = "session_loop: launch pre[" + std::to_string(l + 1) +
                       "]: " + dpct::get_error_string_dummy(ne);
@@ -1138,18 +1138,18 @@ bool session_token(const WeightTable &tables, const ModelGeometry &g,
             // IT, instead of a wrong number 40 layers later or at the end of the token.
             const dpct::err0 e = DPCT_CHECK_ERROR(cs->wait());
             /*
-            DPCT1000:580: Error handling if-stmt was detected but could not be
+            DPCT1000: Error handling if-stmt was detected but could not be
             rewritten.
             */
             if (e != 0) {
                 /*
-                DPCT1009:581: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1001:579: The statement could not be removed.
+                DPCT1001: The statement could not be removed.
                 */
                 err = "layer " + std::to_string(l) + ": " +
                       dpct::get_error_string_dummy(e);
@@ -1235,17 +1235,17 @@ bool session_capture_token(const WeightTable &tables, const ModelGeometry &g,
     dpct::get_current_device().destroy_queue(cs);
     if (!ok) { if (graph) delete (graph); return false; }
     /*
-    DPCT1000:583: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (ce != 0) {
         /*
-        DPCT1009:586: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:582: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("session_capture_token: end capture: ") +
               dpct::get_error_string_dummy(ce);
@@ -1257,17 +1257,17 @@ bool session_capture_token(const WeightTable &tables, const ModelGeometry &g,
             graph->finalize()));
     delete (graph);
     /*
-    DPCT1000:585: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (ie != 0) {
         /*
-        DPCT1009:587: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:584: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("session_capture_token: instantiate: ") +
               dpct::get_error_string_dummy(ie);
@@ -1296,15 +1296,15 @@ bool session_run_token(const ModelGeometry &g, int64_t pos, int32_t pos_base,
     doorbell_reset(*s.db);
     const dpct::err0 le = DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*tg.exec));
     /*
-    DPCT1009:592: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:588: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:589: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (le != 0) {
@@ -1340,7 +1340,7 @@ bool session_run_token(const ModelGeometry &g, int64_t pos, int32_t pos_base,
                     err = "session_run_token: layer " + std::to_string(l) +
                           " never rang (" +
                           /*
-                          DPCT1009:593: SYCL reports errors using exceptions and
+                          DPCT1009: SYCL reports errors using exceptions and
                           does not use error codes. Please replace the
                           "get_error_string_dummy(...)" with a real
                           error-handling function.
@@ -1370,15 +1370,15 @@ bool session_run_token(const ModelGeometry &g, int64_t pos, int32_t pos_base,
     progress_at("token: waiting for the GPU to finish the token");
     const dpct::err0 se = DPCT_CHECK_ERROR(cs->wait());
     /*
-    DPCT1009:594: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:590: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:591: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (se != 0) {
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 02d2af22471..ba0c9ca423a 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -71,7 +71,7 @@ struct Bump {
 
 bool mapped(size_t bytes, void **h, void **d) try {
     /*
-    DPCT1048:1: The original value cudaHostAllocMapped is not meaningful in the
+    DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
     migrated code and was removed or replaced with 0. You may need to check the
     migrated code.
     */
@@ -290,7 +290,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
     if (prof_on_) {
         const size_t np = (size_t) g.n_layers * kProfPer + 4;
         /*
-        DPCT1026:36: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         if (DPCT_CHECK_ERROR(prof_ = (unsigned long long *)sycl::malloc_device(
@@ -308,7 +308,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
     sink_.staging_cap = kStagingBlobs;
     (void) TS;
     /*
-    DPCT1025:37: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     if (DPCT_CHECK_ERROR(
@@ -317,7 +317,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
         return false;
     }
     /*
-    DPCT1025:38: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     if (DPCT_CHECK_ERROR(cs_ = dpct::get_current_device().create_queue(true)) !=
@@ -349,7 +349,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
                                        .wait()) == 0;
         }
         /*
-        DPCT1026:39: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         if (!ok2) {; device_plan_ = false; }
@@ -579,12 +579,19 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): K and V rotated before they are stored
                     fwht256_inplace_cuda(kcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
                     fwht256_inplace_cuda(vcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
+                } else if (st.kv_hybrid) {   // K8V4: only V is rotated
+                    fwht256_inplace_cuda(vcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
                 }
                 stamp(l, 8, grp);
                 if (grp == 0) copy_from_mapped(tail_snap_ + (size_t) qi * TS, st.idx_tail, TS, cs);
                 for (int t = tb; t < te; ++t) {
                     const int32_t* step_t = step_ + t * kStepCount;
-                    if (st.kv_q4)
+                    if (st.kv_hybrid) {   // K8V4: the unused half's lanes folded onto the used pool (layer.cpp)
+                        kv_append_q8_step(st.k_q, st.k_q, st.k_scale, st.k_scale, st.page_table, step_t,
+                                          kcur_ + t * NKV * HD, kcur_ + t * NKV * HD, s, cs, nullptr);
+                        kv_append_q4_step(st.v_q4, st.v_q4, st.page_table, step_t, vcur_ + t * NKV * HD,
+                                          vcur_ + t * NKV * HD, s, cs, nullptr);
+                    } else if (st.kv_q4)
                         kv_append_q4_step(st.k_q4, st.v_q4, st.page_table, step_t, kcur_ + t * NKV * HD,
                                           vcur_ + t * NKV * HD, s, cs, &st.host);
                     else if (st.kv_int8)
@@ -604,7 +611,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                             n, cs);
                 if (qb) {
                     /*
-                    DPCT1124:40: cudaMemcpy2DAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpy2DAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -626,7 +633,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 for (int t = tb; t < te; ++t) {
                     float* qc = qcur_ + t * NH * HD;
                     /*
-                    DPCT1124:41: cudaMemcpy2DAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpy2DAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -661,7 +668,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 qsa_decode_attn_batch(qcur_ + tb * NH * HD, pools, sel_ + (size_t) tb * cap_, step_ + tb * kStepCount, cap_,
                                       s, attn_scratch_ + (size_t) tb * attn_scratch_floats_, attn_ + tb * NH * HD, n, cs);
                 stamp(l, 13, grp);
-                if (st.kv_q4) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
+                if (st.kv_q4 || st.kv_hybrid) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
                 if (qb) native_qsa_gate_apply(attn_ + tb * NH * HD, qfull_ + tb * NH * 2 * HD, attn32_ + tb * NH * HD,
                                               (int) (n * NH), (int) HD, cs);
                 else
@@ -920,16 +927,16 @@ bool Verifier::capture(int T, std::string &err) try {
         return false;
     }
     /*
-    DPCT1000:43: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (ce != 0) {
         /*
-        DPCT1009:46: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
         /*
-        DPCT1001:42: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("verify: end capture: ") +
               dpct::get_error_string_dummy(ce);
@@ -966,23 +973,23 @@ bool Verifier::capture(int T, std::string &err) try {
             graph->finalize()));
     delete (graph);
     /*
-    DPCT1000:45: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (ie != 0) {
         /*
-        DPCT1009:50: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
         /*
-        DPCT1001:44: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         err = std::string("verify: instantiate: ") +
               dpct::get_error_string_dummy(ie);
         return false;
     }
     /*
-    DPCT1007:51: Migration of cudaGraphUpload is not supported.
+    DPCT1007: Migration of cudaGraphUpload is not supported.
     */
     const dpct::err0 ue = 0;   // no cudaGraphUpload on SYCL: a finalized command_graph is already resident
     const dpct::err0 us = DPCT_CHECK_ERROR(cs_->wait());
@@ -990,7 +997,7 @@ bool Verifier::capture(int T, std::string &err) try {
         stderr,
         "strata verify: captured the %d-token window (upload %s, sync %s)\n", T,
         /*
-        DPCT1009:52: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
@@ -1068,7 +1075,7 @@ bool Verifier::capture_commit(std::string &err) try {
                 graph->finalize())) != 0) {
         if (graph) delete (graph);
         /*
-        DPCT1009:53: SYCL reports errors using exceptions and does not use error
+        DPCT1009: SYCL reports errors using exceptions and does not use error
         codes. Please replace the "get_error_string_dummy(...)" with a real
         error-handling function.
         */
@@ -1132,15 +1139,15 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                               ? (record_window(T, cs_, err) ? 0 : 1)   // SYCL port: eager replay of the window body
                               : DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*exec_[T]));
     /*
-    DPCT1009:58: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:54: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:55: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (le != 0) {
         err =
@@ -1179,7 +1186,7 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                     err = "verify: layer " + std::to_string(l) +
                           " never rang (" +
                           /*
-                          DPCT1009:59: SYCL reports errors using exceptions and
+                          DPCT1009: SYCL reports errors using exceptions and
                           does not use error codes. Please replace the
                           "get_error_string_dummy(...)" with a real
                           error-handling function.
@@ -1231,15 +1238,15 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
         t_prev_end = t_done;
     }
     /*
-    DPCT1009:60: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:56: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:57: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (se != 0) {
         err = std::string("verify: ") + dpct::get_error_string_dummy(se);
@@ -1426,7 +1433,7 @@ void Verifier::fetch_dma(void* ctx, const uint8_t* const* src, int n, size_t byt
     if (n <= 0) { raise_flag(v->h_flagB_, want); return; }
     uint8_t* stage = (uint8_t*) v->sink_.staging;                  // this group's half in a split window
     /*
-    DPCT1124:61: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -1459,15 +1466,15 @@ bool Verifier::commit(int n_keep, std::string &err) try {
     const dpct::err0 le =
         DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*commit_exec_));
     /*
-    DPCT1009:66: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:62: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:63: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (le != 0) {
         err = std::string("verify: commit launch: ") +
@@ -1476,15 +1483,15 @@ bool Verifier::commit(int n_keep, std::string &err) try {
     }
     const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
     /*
-    DPCT1009:67: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:64: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:65: Error handling if-stmt was detected but could not be rewritten.
+    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
     if (se != 0) {
         err =
diff --git a/sycl/src/core/weights.cpp b/sycl/src/core/weights.cpp
index e4119797b49..e09aa13cfd9 100644
--- a/sycl/src/core/weights.cpp
+++ b/sycl/src/core/weights.cpp
@@ -202,14 +202,14 @@ bool WeightTable::load(const std::string &pack_dir, void *arena_base,
     void* stage_in = nullptr;
     void* stage_out = nullptr;
     /*
-    DPCT1048:17: The original value cudaHostAllocDefault is not meaningful in
+    DPCT1048: The original value cudaHostAllocDefault is not meaningful in
     the migrated code and was removed or replaced with 0. You may need to check
     the migrated code.
     */
     if (DPCT_CHECK_ERROR(stage_in = (void *)sycl::malloc_host(
                              CHUNK, dpct::get_in_order_queue())) != 0 ||
         /*
-        DPCT1048:18: The original value cudaHostAllocDefault is not meaningful
+        DPCT1048: The original value cudaHostAllocDefault is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -431,7 +431,7 @@ bool WeightTable::load(const std::string &pack_dir, void *arena_base,
 
                 const double u0 = now_ms();
                 /*
-                DPCT1114:1055: cudaMemcpy is migrated to asynchronization
+                DPCT1114: cudaMemcpy is migrated to asynchronization
                 memcpy, assuming in the original code the source host memory is
                 pageable memory. If the memory is not pageable, call wait() on
                 event return by memcpy API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/bf16_gemv_parity.cpp b/sycl/src/kernels/bf16_gemv_parity.cpp
index 18c579345d0..519c7618cfe 100644
--- a/sycl/src/kernels/bf16_gemv_parity.cpp
+++ b/sycl/src/kernels/bf16_gemv_parity.cpp
@@ -103,7 +103,7 @@ int main(int argc, char** argv) {
                       (size_t)s.n_out * 4, dpct::get_in_order_queue())),
               "y");
         /*
-        DPCT1114:1141: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -112,7 +112,7 @@ int main(int argc, char** argv) {
                                                                  x.size() * 2).wait()),
               "cx");
         /*
-        DPCT1114:1142: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -158,7 +158,7 @@ int main(int argc, char** argv) {
             // fp16.  That is the whole difference between the two contracts at this call site.
             for (size_t i = 0; i < fp16_as_f32.size(); ++i) x[i] = bf16_from_f32(fp16_as_f32[i]);
             /*
-            DPCT1114:1143: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/cuda/bf16_gemv.dp.cpp b/sycl/src/kernels/cuda/bf16_gemv.dp.cpp
index 9ed03958773..42996b23ff3 100644
--- a/sycl/src/kernels/cuda/bf16_gemv.dp.cpp
+++ b/sycl/src/kernels/cuda/bf16_gemv.dp.cpp
@@ -53,7 +53,7 @@ __dpct_inline__ void bf16_gemv_warp_kernel(const uint16_t *__restrict__ x,
     for (long long i = lane; i < n_in; i += 32)
         acc += f32_from_bf16(x[i]) * f32_from_bf16(row[i]);
     /*
-DPCT1108:171: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -89,7 +89,7 @@ __dpct_inline__ void bf16_gemv_split_kernel(const uint16_t *__restrict__ x,
     for (int off = tpr >> 1; off > 0; off >>= 1) {
         if (t < off) scratch[t] += scratch[t + off];
         /*
-        DPCT1118:172: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -99,7 +99,7 @@ __dpct_inline__ void bf16_gemv_split_kernel(const uint16_t *__restrict__ x,
 
 inline void finish(void *stream, const char *what) try {
     /*
-    DPCT1010:839: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -213,7 +213,7 @@ void bf16_gemv_split(const uint16_t* x, const uint16_t* w, float* y, int64_t n_i
     }
     const unsigned grid = (unsigned) n_out;
     /*
-    DPCT1049:173: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -224,7 +224,7 @@ void bf16_gemv_split(const uint16_t* x, const uint16_t* w, float* y, int64_t n_i
         strata::q_of(stream)
             ->submit([&](sycl::handler &cgh) {
                 /*
-                DPCT1083:1164: The size of local memory in the migrated code may
+                DPCT1083: The size of local memory in the migrated code may
                 be different from the original code. Check that the allocated
                 memory size in the migrated code is correct.
                 */
diff --git a/sycl/src/kernels/cuda/cvec.dp.cpp b/sycl/src/kernels/cuda/cvec.dp.cpp
index 246fe5ca3b5..8d0a4be4a7c 100644
--- a/sycl/src/kernels/cuda/cvec.dp.cpp
+++ b/sycl/src/kernels/cuda/cvec.dp.cpp
@@ -44,7 +44,7 @@ bool upload_here(std::string &err) try {
         DPCT_CHECK_ERROR(t.on = sycl::malloc_device<int>(
                              1, dpct::get_in_order_queue())) != 0 ||
         /*
-        DPCT1114:507: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -53,7 +53,7 @@ bool upload_here(std::string &err) try {
             t.dir, g_dir_host.data(), g_dir_host.size() * sizeof(float)).wait()) !=
             0 ||
         /*
-        DPCT1114:508: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -82,7 +82,7 @@ __dpct_inline__ float sigmoidf_(float x) {
 
 // one block per (stream, token): the pending write, then h . v over the stream, then the update
 /*
-DPCT1110:95: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 cvec_kernel exceeds 128 bytes and may cause high register pressure. Consult with
 your hardware vendor to find the total register size available and adjust the
 code, or use smaller sub-group size to avoid high register pressure.
@@ -121,7 +121,7 @@ cvec_kernel(float *__restrict__ R, const float *__restrict__ dir,
             sycl::ext::oneapi::this_work_item::get_work_group<3>());
 #pragma unroll
         /*
-        DPCT1108:98: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -132,11 +132,11 @@ cvec_kernel(float *__restrict__ R, const float *__restrict__ dir,
         if ((item_ct1.get_local_id(2) & 31) == 0)
             part[item_ct1.get_local_id(2) >> 5] = dot;
         /*
-        DPCT1118:96: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:509: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -147,7 +147,7 @@ cvec_kernel(float *__restrict__ R, const float *__restrict__ dir,
                           : 0.0f;
 #pragma unroll
             /*
-            DPCT1108:99: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -158,11 +158,11 @@ cvec_kernel(float *__restrict__ R, const float *__restrict__ dir,
             if (item_ct1.get_local_id(2) == 0) part[0] = p;
         }
         /*
-        DPCT1118:97: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:510: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -194,7 +194,7 @@ bool cvec_upload(const std::vector<float>& dir, const std::vector<float>& s, int
     for (int d = 0; d < kDevices; ++d) {
         if (g_dev[d].dir == nullptr) continue;
         /*
-        DPCT1093:512: The "d" device may be not the one intended for use. Adjust
+        DPCT1093: The "d" device may be not the one intended for use. Adjust
         the selected device if needed.
         */
         dpct::select_device(d);
@@ -205,7 +205,7 @@ bool cvec_upload(const std::vector<float>& dir, const std::vector<float>& s, int
         g_dev[d] = DevTables{};
     }
     /*
-    DPCT1093:511: The "prev" device may be not the one intended for use. Adjust
+    DPCT1093: The "prev" device may be not the one intended for use. Adjust
     the selected device if needed.
     */
     dpct::select_device(prev);
@@ -237,7 +237,7 @@ void cvec_set_enabled(bool on) {
     for (int d = 0; d < kDevices; ++d) {
         if (g_dev[d].on == nullptr) continue;
         /*
-        DPCT1093:514: The "d" device may be not the one intended for use. Adjust
+        DPCT1093: The "d" device may be not the one intended for use. Adjust
         the selected device if needed.
         */
         dpct::select_device(d);
@@ -247,7 +247,7 @@ void cvec_set_enabled(bool on) {
         dpct::get_in_order_queue().memcpy(g_dev[d].on, &v, sizeof(int)).wait();
     }
     /*
-    DPCT1093:513: The "prev" device may be not the one intended for use. Adjust
+    DPCT1093: The "prev" device may be not the one intended for use. Adjust
     the selected device if needed.
     */
     dpct::select_device(prev);
@@ -287,7 +287,7 @@ void cvec_apply(float *R, int64_t layer, int64_t T, int64_t r_ld,
             });
     }
     /*
-    DPCT1010:515: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaPeekAtLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
index bfdb54fc2c0..14da1e84533 100644
--- a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
+++ b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
@@ -45,7 +45,7 @@ __dpct_inline__ void scale_min_k4(int j, const uint8_t *q, int &d, int &m) {
 // One 32-element group `g` (row-major over the whole slice); `out` points at that group's 32 outputs.
 template <int TYPE, typename T>
 /*
-DPCT1110:176: The total declared local variable size in device function group32
+DPCT1110: The total declared local variable size in device function group32
 exceeds 128 bytes and may cause high register pressure. Consult with your
 hardware vendor to find the total register size available and adjust the code,
 or use smaller sub-group size to avoid high register pressure.
@@ -251,13 +251,13 @@ void launch(int type, const void* blocks, int64_t row0, int64_t rows, int64_t co
     }
 #undef STRATA_DQ
     /*
-    DPCT1010:854: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:855: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
index 377de2cbf5e..731c6fbd10d 100644
--- a/sycl/src/kernels/cuda/elementwise.dp.cpp
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -35,14 +35,14 @@ __dpct_inline__ void embedding_gather_kernel(const uint8_t *__restrict__ codes,
     const int code = (codes[i / per_byte] >> ((i % per_byte) * code_bits)) & mask;
     const int64_t group = i / group_elems;
     /*
-    DPCT1013:1056: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
     */
     const float product = (float)(code + code_bias) * scales[group];
     /*
-    DPCT1013:1057: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -151,7 +151,7 @@ __dpct_inline__ void rms_norm_weighted_kernel(float *__restrict__ x,
 #pragma unroll
     for (int64_t c = lane; c < cols; c += 32) acc += r[c] * r[c];
     /*
-DPCT1108:275: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -166,7 +166,7 @@ runtimes. You may need to adjust the code.
     float inv = 0.0f;
     if (lane == 0) inv = sycl::rsqrt(acc / (float)cols + eps);
     /*
-    DPCT1108:276: '__shfl_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -191,7 +191,7 @@ catch (sycl::exception const &exc) {
 
 bool check_launch(const char* what) {
     /*
-    DPCT1010:1059: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -365,7 +365,7 @@ void silu_inplace(float* x, int64_t n, void* stream) {
 /// very expensive substitute for one fence instruction.
 __dpct_inline__ void doorbell_ring_kernel(uint32_t *seq) {
     /*
-    DPCT1078:277: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
@@ -377,13 +377,13 @@ __dpct_inline__ void doorbell_wait_kernel(const volatile uint32_t *flag,
                                           const volatile uint32_t *seq) {
     const uint32_t want = strata::sys_load(seq);
     /*
-    DPCT1008:1061: __nanosleep function is not defined in SYCL. This is a
+    DPCT1008: __nanosleep function is not defined in SYCL. This is a
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
     for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) {}
     /*
-    DPCT1078:278: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
@@ -407,7 +407,7 @@ void doorbell_wait(const uint32_t* d_flag, const uint32_t* d_seq, void* stream)
 }
 
 /*
-DPCT1052:1062: SYCL does not support the member access for a volatile qualified
+DPCT1052: SYCL does not support the member access for a volatile qualified
 vector type. The volatile qualifier was removed. You may need to rewrite the
 code.
 */
@@ -428,7 +428,7 @@ __dpct_inline__ void copy_from_mapped_kernel(sycl::float4 *__restrict__ dst,
 // the CPU rows of a verify window, skipping the rows the GPU plan computes itself (the
 // pool writes +0.0 into those, so this writes +0.0 too): block = row, the plan's hit rows `dst[0, *count)`.
 /*
-DPCT1052:1063: SYCL does not support the member access for a volatile qualified
+DPCT1052: SYCL does not support the member access for a volatile qualified
 vector type. The volatile qualifier was removed. You may need to rewrite the
 code.
 */
@@ -455,7 +455,7 @@ __dpct_inline__ void copy_rows_from_mapped_kernel(
             d[i] = sycl::float4(0.0f, 0.0f, 0.0f, 0.0f);
     } else {
         /*
-        DPCT1052:1064: SYCL does not support the member access for a volatile
+        DPCT1052: SYCL does not support the member access for a volatile
         qualified vector type. The volatile qualifier was removed. You may need
         to rewrite the code.
         */
@@ -537,20 +537,20 @@ __dpct_inline__ void doorbell_publish_kernel(const float *__restrict__ x,
         w_out[item_ct1.get_local_id(2)] = w[item_ct1.get_local_id(2)];
     }
     /*
-    DPCT1078:279: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
     sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
     /*
-    DPCT1065:1065: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     if (item_ct1.get_local_id(2) == 0) {
         /*
-        DPCT1078:280: Consider replacing memory_order::acq_rel with
+        DPCT1078: Consider replacing memory_order::acq_rel with
         memory_order::seq_cst for correctness if strong memory order
         restrictions are needed.
         */
@@ -564,7 +564,7 @@ void doorbell_publish(const float* x, const int32_t* ids, const float* weights,
                       int32_t* ids_out, float* weights_out, uint32_t* d_seq, void* stream) {
     if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }
     /*
-    DPCT1049:281: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
diff --git a/sycl/src/kernels/cuda/fused_gdn.dp.cpp b/sycl/src/kernels/cuda/fused_gdn.dp.cpp
index 0e587e88e1a..eca2bab0eaa 100644
--- a/sycl/src/kernels/cuda/fused_gdn.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gdn.dp.cpp
@@ -16,7 +16,7 @@ constexpr int RG = 4;           // row groups
 constexpr int RPG = S / RG;     // 32 rows per thread
 
 /*
-DPCT1110:292: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gdn_step_norm_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -50,7 +50,7 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
 #pragma unroll
     for (int r = 0; r < RPG; ++r) s[r] = base[r * row_stride];
     /*
-    DPCT1065:1151: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -61,7 +61,7 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
     for (int r = 0; r < RPG; ++r) kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
     red[rg][col] = kv;
     /*
-    DPCT1065:1152: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -76,14 +76,14 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
         base[r * row_stride] = s[r];
     }
     /*
-    DPCT1065:1153: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier(); // every thread has read red[] for kv_col
     red[rg][col] = o;
     /*
-    DPCT1065:1154: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -96,7 +96,7 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
     }
     // RMS over the head's 128 outputs: warps of row group 0 are threads 0..127.
     /*
-DPCT1108:293: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -107,7 +107,7 @@ runtimes. You may need to adjust the code.
             sq_part, o2);
     if ((tid & 31) == 0) wsum[tid >> 5] = sq_part;
     /*
-    DPCT1065:1155: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -140,7 +140,7 @@ auto &part =
     if ((int)item_ct1.get_group(2) < qk_heads) {
         float sq = y * y;
         /*
-DPCT1108:295: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -152,11 +152,11 @@ runtimes. You may need to adjust the code.
         if ((item_ct1.get_local_id(2) & 31) == 0)
             part[item_ct1.get_local_id(2) >> 5] = sq;
         /*
-        DPCT1118:294: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:1156: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -183,7 +183,7 @@ gdn_ab_kernel(const float *__restrict__ x, const uint16_t *__restrict__ wa,
     float acc = 0.0f;
     for (int j = lane; j < n / 8; j += 32) {
         /*
-        DPCT1098:1157: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -210,7 +210,7 @@ gdn_ab_kernel(const float *__restrict__ x, const uint16_t *__restrict__ wa,
                             (float)(xb.w()), acc);
     }
     /*
-DPCT1108:296: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -254,13 +254,13 @@ void fused_gdn_conv_l2(float* history, const float* qkv, const float* conv_w, fl
                     });
     }
     /*
-    DPCT1010:1158: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:1159: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -290,13 +290,13 @@ void fused_gdn_ab(const float* x, const uint16_t* w_alpha, const uint16_t* w_bet
                     });
     }
     /*
-    DPCT1010:1160: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:1161: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -310,7 +310,7 @@ void fused_gdn_step_norm(float* state, const float* q, const float* k, const flo
         std::exit(1);
     }
     /*
-    DPCT1049:297: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -331,7 +331,7 @@ void fused_gdn_step_norm(float* state, const float* q, const float* k, const flo
                     });
     }
     /*
-    DPCT1010:1162: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 431e90b5fa4..86375f1d584 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -26,7 +26,7 @@ constexpr int UP_BLOCKS = N / UP_COLS;           // 80
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
     /*
-    DPCT1108:88: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -55,7 +55,7 @@ __dpct_inline__ float dot8(const sycl::uint4 w, const float *x) {
 }
 
 /*
-DPCT1110:89: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gr_down_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -102,7 +102,7 @@ auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
         if (lane == 0) part[warp][c] = v;
     }
     /*
-    DPCT1065:457: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -115,7 +115,7 @@ auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
         if (item_ct1.get_group(2) == 0) a.rs[t] = s_rs[t];
     }
     /*
-    DPCT1065:458: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -123,7 +123,7 @@ auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
 #pragma unroll
     for (int i = t; i < D; i += THREADS) xn[i] *= s_rs[i / N];
     /*
-    DPCT1065:459: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -137,7 +137,7 @@ auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
     float acc = 0.0f;
 #pragma unroll 4
     /*
-    DPCT1098:460: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -164,7 +164,7 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[LR]>(
 #pragma unroll
     for (int k = t; k < LR; k += THREADS) lo[k] = a.lo[k];
     /*
-    DPCT1065:461: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -175,13 +175,13 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[LR]>(
         const sycl::uint4 *w4 =
             reinterpret_cast<const sycl::uint4 *>(a.w_up + (size_t)i * LR);
         /*
-        DPCT1098:463: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
         float acc = dot8(*(w4 + lane), lo + lane * 8);
         /*
-        DPCT1098:464: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -200,7 +200,7 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[LR]>(
         }
     }
     /*
-    DPCT1065:462: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -222,7 +222,7 @@ struct GrMulti {
 
 // Step 1 of `gr_down_kernel`, one block per token, same threads and reduction order: rs[t] and xn[t] to global.
 /*
-DPCT1110:90: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gr_norm_multi_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -268,7 +268,7 @@ auto &part =
         if (lane == 0) part[warp][c] = v;
     }
     /*
-    DPCT1065:465: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -281,7 +281,7 @@ auto &part =
         a.rs[t] = s_rs[t];
     }
     /*
-    DPCT1065:466: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -290,14 +290,18 @@ auto &part =
     for (int i = t; i < D; i += THREADS) xn[i] *= s_rs[i / N];
 }
 
+#if defined(__HIPCC__)
+constexpr int TILE = 1280;             // eight-token tile fits gfx1100's 64 KiB LDS limit
+#else
 constexpr int TILE = 2560;             // xn floats per token staged at a time: 320 chunks of 8, 10 per lane
+#endif
 constexpr int TQ = TILE / 8 / 32;      // uint4 weight chunks per lane per tile
 
 // Step 2 of `gr_down_kernel` for T tokens.  One warp per row (so each lane accumulates the same chunks in the
 // same order as the single-token kernel); per tile the lane's 10 weight chunks are loaded BEFORE the activation
 // tile is staged, so the DRAM and L2 traffic are in flight together.
 /*
-DPCT1110:91: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gr_down_multi_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -320,7 +324,7 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
         if (active) {
 #pragma unroll
             /*
-            DPCT1098:469: The '*' expression is used instead of the __ldg call.
+            DPCT1098: The '*' expression is used instead of the __ldg call.
             These two expressions do not provide the exact same functionality.
             Check the generated code for potential precision and/or performance
             issues.
@@ -329,11 +333,11 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
                 wv[q] = *(w4 + base / 8 + lane + 32 * q);
         }
         /*
-        DPCT1118:92: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:467: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -345,11 +349,11 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
             tile4[i] = src4[((size_t) k * D + base) / 4 + off];
         }
         /*
-        DPCT1118:93: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:468: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -386,7 +390,7 @@ constexpr int UPM_BLOCKS = N / UPM_COLS;          // 160
 // `gr_up_kernel` for T tokens: each row of w_up read once; the T dots reduced by xor so every lane holds every
 // sum, and lane k runs token k's epilogue - the T epilogues in parallel instead of one after another.
 /*
-DPCT1110:94: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gr_up_multi_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -406,7 +410,7 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
     for (int i = t; i < T * LR; i += THREADS)
         lo[i / LR][i % LR] = m.a[i / LR].lo[i % LR];
     /*
-    DPCT1065:470: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -416,13 +420,13 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
         const sycl::uint4 *w4 =
             reinterpret_cast<const sycl::uint4 *>(m.a[0].w_up + (size_t)i * LR);
         /*
-        DPCT1098:472: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
         const sycl::uint4 wa = *(w4 + lane);
         /*
-        DPCT1098:473: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -458,7 +462,7 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
         }
     }
     /*
-    DPCT1065:471: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -498,7 +502,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_bf1e13>>(
+        st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_2f4d92>>(
             sycl::nd_range<3>(sycl::range(1, 1, n_tok) *
                                   sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -511,13 +515,14 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
     // the shared-memory opt-in is a per-DEVICE setting: once per device, not once per process (a layer split
     // runs this kernel on two cards)
     static bool attr[64] = {};
+    static int chunk[64] = {};   // Turing port: tokens the down kernel may carry in one launch on this card
     int dev = 0;
     dev = dpct::get_current_device_id();
-    if (dev < 0 || dev >= 64 || !attr[dev]) {
+    if (dev >= 0 && dev < 64 && !attr[dev]) {
         // at most what the card allows (Turing: 64 KB - enough for windows of up to 6 tokens)
         int optin = 0;
         /*
-        DPCT1019:474: local_mem_size in SYCL is not a complete equivalent of
+        DPCT1019: local_mem_size in SYCL is not a complete equivalent of
         cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
         the code.
         */
@@ -525,30 +530,40 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         int want = (int) (kFusedGrMaxT * TILE * sizeof(float));
         if (optin > 0 && want > optin) want = optin;
         /*
-        DPCT1026:475: The call to cudaFuncSetAttribute was removed because SYCL
+        DPCT1026: The call to cudaFuncSetAttribute was removed because SYCL
         currently does not support corresponding setting.
         */
         /*
-        DPCT1026:476: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
-        if (dev >= 0 && dev < 64) attr[dev] = true;
+; // drop any error the attempt left behind
+        // Turing port: the down kernel stages n_tok*TILE floats of dynamic shared memory - 80 KB at the full
+        // 8 tokens.  A card whose opt-in is below that (Turing: 64 KB, so 7+ tokens fail to launch as
+        // "invalid argument") processes the tokens in slices that fit; a card that reports no opt-in gets what
+        // fits the 48 KB default (4 tokens of the CUDA tile; all 8 of HIP's smaller tile).  The down kernel's
+        // outputs (lo, inject_out) are strictly per-token, so the chunk boundaries are safe, and the up kernel
+        // below still sees every token of the batch in one launch.
+        const int capacity = (optin > 0 ? optin : 48 * 1024) / (int) (TILE * sizeof(float));
+        chunk[dev] = capacity < 1 ? 1 : (capacity > kFusedGrMaxT ? kFusedGrMaxT : capacity);
+        attr[dev] = true;
     }
-    {
+    const int chunk_tok = (dev >= 0 && dev < 64 && chunk[dev]) ? chunk[dev] : kFusedGrMaxT;
+    if (chunk_tok >= n_tok) {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         st->submit([&](sycl::handler &cgh) {
             /*
-            DPCT1083:1166: The size of local memory in the migrated code may be
-            different from the original code. Check that the allocated memory
-            size in the migrated code is correct.
+            DPCT1083: The size of local memory in the migrated code may
+            be different from the original code. Check that the allocated
+            memory size in the migrated code is correct.
             */
             sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
                 sycl::range((size_t)n_tok * TILE * sizeof(float)), cgh);
 
             cgh.parallel_for<
-                dpct_kernel_name<class gr_down_multi_kernel_e2a6b0>>(
+                dpct_kernel_name<class gr_down_multi_kernel_7f5820>>(
                 sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
                                       sycl::range(1, 1, THREADS),
                                   sycl::range(1, 1, THREADS)),
@@ -561,13 +576,50 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
                                    .get());
                     });
         });
+    } else {
+        for (int c0 = 0; c0 < n_tok; c0 += chunk_tok) {
+            const int ct = n_tok - c0 < chunk_tok ? n_tok - c0 : chunk_tok;
+            GrMulti c{};
+            c.xn = xn_scratch + (size_t) c0 * D;
+            c.T = ct;
+            for (int k = 0; k < ct; ++k) c.a[k] = a[c0 + k];
+            {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    /*
+                    DPCT1083: The size of local memory in the migrated code
+                    may be different from the original code. Check that the
+                    allocated memory size in the migrated code is correct.
+                    */
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range((size_t)ct * TILE * sizeof(float)), cgh);
+
+                    cgh.parallel_for<
+                        dpct_kernel_name<class gr_down_multi_kernel_88cb86>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_multi_kernel(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            }
+        }
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class gr_up_multi_kernel_e2528e>>(
+        st->parallel_for<dpct_kernel_name<class gr_up_multi_kernel_1a727f>>(
             sycl::nd_range<3>(sycl::range(1, 1, UPM_BLOCKS) *
                                   sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -577,7 +629,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
             });
     }
     /*
-    DPCT1010:477: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -600,7 +652,7 @@ void fused_gr_read(const FusedGrArgs& a, void* stream) {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class gr_down_kernel_5d714c>>(
+        st->parallel_for<dpct_kernel_name<class gr_down_kernel_a5fa71>>(
             sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
                                   sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -613,7 +665,7 @@ void fused_gr_read(const FusedGrArgs& a, void* stream) {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class gr_up_kernel_86511f>>(
+        st->parallel_for<dpct_kernel_name<class gr_up_kernel_fe3258>>(
             sycl::nd_range<3>(sycl::range(1, 1, UP_BLOCKS) *
                                   sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -623,7 +675,7 @@ void fused_gr_read(const FusedGrArgs& a, void* stream) {
             });
     }
     /*
-    DPCT1010:479: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/gdn.dp.cpp b/sycl/src/kernels/cuda/gdn.dp.cpp
index b56c96294c7..3373560adfd 100644
--- a/sycl/src/kernels/cuda/gdn.dp.cpp
+++ b/sycl/src/kernels/cuda/gdn.dp.cpp
@@ -84,7 +84,7 @@ auto &ks =
         }
     }
     /*
-    DPCT1065:326: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -155,7 +155,7 @@ __dpct_inline__ void gdn_l2_kernel(float *__restrict__ x, int cols, float eps) {
          i += item_ct1.get_local_range(2)) acc += (double)p[i] * (double)p[i];
     // warp reduction
     /*
-DPCT1108:35: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -168,7 +168,7 @@ runtimes. You may need to adjust the code.
         sycl::ext::oneapi::this_work_item::get_work_group<3>());
     if (item_ct1.get_local_id(2) == 0) ssum = acc;
     /*
-    DPCT1065:327: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -195,7 +195,7 @@ __dpct_inline__ void gdn_out_norm_kernel(const float *__restrict__ o,
     for (int i = item_ct1.get_local_id(2); i < S;
          i += item_ct1.get_local_range(2)) acc += (double)po[i] * (double)po[i];
     /*
-DPCT1108:36: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
diff --git a/sycl/src/kernels/cuda/gr.dp.cpp b/sycl/src/kernels/cuda/gr.dp.cpp
index 4091f3f967c..fd8f809b160 100644
--- a/sycl/src/kernels/cuda/gr.dp.cpp
+++ b/sycl/src/kernels/cuda/gr.dp.cpp
@@ -76,12 +76,12 @@ __dpct_inline__ float sigmoid_f(float x) {
 
 __dpct_inline__ double warp_sum(double v) {
     /*
-DPCT1108:37: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
     /*
-DPCT1121:38: Make sure that the "v" which is used in the SYCL group
+DPCT1121: Make sure that the "v" which is used in the SYCL group
 function/algorithm is initialized.
 */
 #pragma unroll
@@ -90,12 +90,12 @@ function/algorithm is initialized.
             0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
             off);
     /*
-    DPCT1108:39: '__shfl_sync' was migrated with the experimental feature masked
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature masked
     sub_group function which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
     /*
-    DPCT1121:40: Make sure that the "v" which is used in the SYCL group
+    DPCT1121: Make sure that the "v" which is used in the SYCL group
     function/algorithm is initialized.
     */
     return dpct::experimental::select_from_sub_group(
@@ -104,12 +104,12 @@ function/algorithm is initialized.
 
 __dpct_inline__ float warp_sumf(float v) {
     /*
-DPCT1108:41: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
     /*
-DPCT1121:42: Make sure that the "v" which is used in the SYCL group
+DPCT1121: Make sure that the "v" which is used in the SYCL group
 function/algorithm is initialized.
 */
 #pragma unroll
@@ -118,12 +118,12 @@ function/algorithm is initialized.
             0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
             off);
     /*
-    DPCT1108:43: '__shfl_sync' was migrated with the experimental feature masked
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature masked
     sub_group function which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
     /*
-    DPCT1121:44: Make sure that the "v" which is used in the SYCL group
+    DPCT1121: Make sure that the "v" which is used in the SYCL group
     function/algorithm is initialized.
     */
     return dpct::experimental::select_from_sub_group(
@@ -143,7 +143,7 @@ inline float block_sumf(float v, double *scratch_raw) {
     // of `scratch[0]` by every thread and a later call reuses the array, so without it a fast thread can
     // overwrite `scratch[0]` before a slow one has read the previous result.
     /*
-    DPCT1065:355: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -153,7 +153,7 @@ inline float block_sumf(float v, double *scratch_raw) {
     v = warp_sumf(v);
     if (lane == 0) scratch[warp] = v;
     /*
-    DPCT1065:356: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -164,7 +164,7 @@ inline float block_sumf(float v, double *scratch_raw) {
     if (warp == 0) v = warp_sumf(v);
     if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
     /*
-    DPCT1065:357: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -183,7 +183,7 @@ inline float block_sumf(float v, double *scratch_raw) {
 /// `scratch[0]` before a slow one has read the previous result - a race that is invisible in most runs.
 double block_sum(double v, double* scratch) {
     /*
-    DPCT1065:358: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -194,7 +194,7 @@ double block_sum(double v, double* scratch) {
     v = warp_sum(v);
     if (lane == 0) scratch[warp] = v;
     /*
-    DPCT1065:359: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -205,7 +205,7 @@ double block_sum(double v, double* scratch) {
     if (warp == 0) v = warp_sum(v);
     if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
     /*
-    DPCT1065:360: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -624,7 +624,7 @@ void gr_read(const float *R, const float *w_norm, const uint16_t *w_down,
             bf16_gemv_fp32_mmvf(ws.xn, w_inject, inject, hc_dim, hc, stream);
         else if (use_fp32)
             /*
-            DPCT1049:45: The work-group size passed to the SYCL kernel may
+            DPCT1049: The work-group size passed to the SYCL kernel may
             exceed the limit. To get the device limit, query
             info::device::max_work_group_size. Adjust the work-group size if
             needed.
@@ -645,7 +645,7 @@ void gr_read(const float *R, const float *w_norm, const uint16_t *w_down,
                     });
         } else
         /*
-        DPCT1049:46: The work-group size passed to the SYCL kernel may
+        DPCT1049: The work-group size passed to the SYCL kernel may
         exceed the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if
         needed.
@@ -668,7 +668,7 @@ void gr_read(const float *R, const float *w_norm, const uint16_t *w_down,
     }
 
     /*
-    DPCT1010:361: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -699,7 +699,7 @@ void gr_write(const float *R, const float *block_out, const float *inject,
         strata::q_of(stream)
             ->submit([&](sycl::handler &cgh) {
                 /*
-                DPCT1083:1165: The size of local memory in the migrated code may
+                DPCT1083: The size of local memory in the migrated code may
                 be different from the original code. Check that the allocated
                 memory size in the migrated code is correct.
                 */
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 2c7eab3299c..5a30fe7bdd9 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -23,13 +23,13 @@ namespace {
 
 void check(const char* what) {
     /*
-    DPCT1010:928: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:929: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -393,7 +393,7 @@ template<> struct Fmt<42> { static constexpr int qk = 64, ipb = 2, step = 1;
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
     /*
-    DPCT1108:230: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -439,7 +439,7 @@ __dpct_inline__ float row_dot(const uint8_t *row, const block_q8_1 *x, int nb,
     for (int k = lane; k < nb * F::ipb; k += 32) {
         const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
         /*
-        DPCT1084:298: The function call "Fmt::dot" has multiple migration
+        DPCT1084: The function call "Fmt::dot" has multiple migration
         results in different template instantiations that could not be unified.
         You may need to adjust the code.
         */
@@ -768,7 +768,7 @@ __dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
 #pragma unroll
     for (int o = 16; o > 0; o >>= 1) {
         /*
-        DPCT1108:231: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -778,7 +778,7 @@ __dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
                 0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 amax, o));
         /*
-        DPCT1108:232: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -1052,7 +1052,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
     const auto* X = (const block_q8_1*) x_q8_1;
     switch (t) {
         /*
-        DPCT1049:233: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1073,7 +1073,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:234: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1094,7 +1094,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:235: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1115,7 +1115,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:236: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1136,7 +1136,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:237: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1157,7 +1157,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:238: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1178,7 +1178,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:239: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1199,7 +1199,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:240: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1220,7 +1220,7 @@ void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n
         });
     } break;
         /*
-        DPCT1049:241: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
diff --git a/sycl/src/kernels/cuda/kv_q4.dp.cpp b/sycl/src/kernels/cuda/kv_q4.dp.cpp
index 8834a75fb36..630fe2e9f38 100644
--- a/sycl/src/kernels/cuda/kv_q4.dp.cpp
+++ b/sycl/src/kernels/cuda/kv_q4.dp.cpp
@@ -16,7 +16,7 @@ namespace {
 
 void check(const char* what) {
     /*
-    DPCT1010:430: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -54,7 +54,7 @@ __dpct_inline__ void fwht256_kernel(const float *__restrict__ src,
         for (int j = 0; j < el_w; ++j) {
             const float val = reg[j];
             /*
-            DPCT1108:77: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -92,7 +92,7 @@ __dpct_inline__ uint16_t q4_group(float x, int lane, uint8_t &byte) {
 #pragma unroll
     for (int o = 16; o > 0; o >>= 1) {
         /*
-        DPCT1108:78: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -100,7 +100,7 @@ __dpct_inline__ uint16_t q4_group(float x, int lane, uint8_t &byte) {
             0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
             amax, o);
         /*
-        DPCT1108:79: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -115,7 +115,7 @@ __dpct_inline__ uint16_t q4_group(float x, int lane, uint8_t &byte) {
                 .convert<int, sycl::rounding_mode::rtz>()[0];
     const uint8_t qc = (uint8_t) (q < 0 ? 0 : (q > 15 ? 15 : q));
     /*
-    DPCT1108:80: '__shfl_down_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -142,7 +142,7 @@ __dpct_inline__ void kv_append_q4_kernel(
     const float *__restrict__ kcur, const float *__restrict__ vcur,
     int kv_heads, int head_dim, int page_size, KvHostPools host) {
     /*
-    DPCT1098:432: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -191,7 +191,7 @@ __dpct_inline__ void kv_gather_q4_kernel(
     const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
     uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
     /*
-    DPCT1098:433: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
diff --git a/sycl/src/kernels/cuda/kv_q8.dp.cpp b/sycl/src/kernels/cuda/kv_q8.dp.cpp
index 952d40ad937..215ea943f51 100644
--- a/sycl/src/kernels/cuda/kv_q8.dp.cpp
+++ b/sycl/src/kernels/cuda/kv_q8.dp.cpp
@@ -14,7 +14,7 @@ namespace {
 
 void check(const char* what) {
     /*
-    DPCT1010:1135: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -37,7 +37,7 @@ __dpct_inline__ void kv_append_q8_kernel(
     const float *__restrict__ kcur, const float *__restrict__ vcur,
     int kv_heads, int head_dim, int page_size, KvHostPools host) {
     /*
-    DPCT1098:1138: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -51,7 +51,7 @@ __dpct_inline__ void kv_append_q8_kernel(
     // max |x| over the 64 values: two warps, then combine through shared memory in a fixed order
     float a = sycl::fabs(x);
     /*
-DPCT1108:289: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -65,7 +65,7 @@ runtimes. You may need to adjust the code.
             sycl::ext::oneapi::this_work_item::get_work_group<3>());
     if ((t & 31) == 0) warp_max[t >> 5] = a;
     /*
-    DPCT1065:1137: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -101,7 +101,7 @@ __dpct_inline__ void kv_gather_q8_kernel(
     const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
     uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
     /*
-    DPCT1098:1139: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
diff --git a/sycl/src/kernels/cuda/kv_stream.dp.cpp b/sycl/src/kernels/cuda/kv_stream.dp.cpp
index fe1769d1b81..d8118d42b88 100644
--- a/sycl/src/kernels/cuda/kv_stream.dp.cpp
+++ b/sycl/src/kernels/cuda/kv_stream.dp.cpp
@@ -17,7 +17,7 @@ namespace {
 
 void check(const char* what) {
     /*
-    DPCT1010:314: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -66,7 +66,7 @@ inline int block_scan(int v, int *warp_sums, int &total) {
     int x = v;
     for (int o = 1; o < 32; o <<= 1) {
         /*
-        DPCT1108:29: '__shfl_up_sync' was migrated with the experimental feature
+        DPCT1108: '__shfl_up_sync' was migrated with the experimental feature
         masked sub_group function which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -77,7 +77,7 @@ inline int block_scan(int v, int *warp_sums, int &total) {
     }
     if (lane == 31) warp_sums[w] = x;
     /*
-    DPCT1065:316: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -86,7 +86,7 @@ inline int block_scan(int v, int *warp_sums, int &total) {
         int t = warp_sums[lane];
         for (int o = 1; o < 32; o <<= 1) {
             /*
-            DPCT1108:30: '__shfl_up_sync' was migrated with the experimental
+            DPCT1108: '__shfl_up_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -98,7 +98,7 @@ inline int block_scan(int v, int *warp_sums, int &total) {
         warp_sums[lane] = t;
     }
     /*
-    DPCT1065:317: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -106,7 +106,7 @@ inline int block_scan(int v, int *warp_sums, int &total) {
     total = warp_sums[31];
     const int excl = x - v + (w > 0 ? warp_sums[w - 1] : 0);
     /*
-    DPCT1065:318: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -131,7 +131,7 @@ auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
     const int epoch = m.ctl[0] + 1;
     if (item_ct1.get_local_id(2) == 0) { s_nmiss = 0; s_lookups = 0; }
     /*
-    DPCT1065:319: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -162,7 +162,7 @@ auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
     dpct::atomic_fetch_add<sycl::access::address_space::generic_space>(
         &s_lookups, lookups);
     /*
-    DPCT1065:320: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -180,11 +180,11 @@ auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
         const int want = need - got;
         if (item_ct1.get_local_id(2) == 0) s_cut = RT;
         /*
-        DPCT1118:31: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:321: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -193,11 +193,11 @@ auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
             item_ct1.get_local_id(2) +
             1; // the hand stops just past the last slot taken
         /*
-        DPCT1118:32: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:322: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -212,11 +212,11 @@ auto &s_nmiss = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
         got += total < want ? total : want;
         hand = (int) (((long long) hand + cut) % n);
         /*
-        DPCT1118:33: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:323: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -331,7 +331,7 @@ void kv_stream_resolve(const KvStreamMap& m, const QsaAttnPools& slots, const Kv
         std::exit(1);
     }
     /*
-    DPCT1049:34: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -396,7 +396,7 @@ void kv_ring_restore(const QsaAttnPools &slots, const KvHostPools &host,
         const int64_t sl = b % n_slots, run = std::min<int64_t>(b1 - b, n_slots - sl);   // up to the ring's end
         for (int a = 0; a < r.n; ++a)
             /*
-            DPCT1124:324: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -421,7 +421,7 @@ void kv_stage_from_host(const QsaAttnPools &stage, const KvHostPools &host,
     const Runs r = runs_of(stage, host, fmt, s);
     for (int a = 0; a < r.n; ++a)
         /*
-        DPCT1124:325: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/cuda/native_bf16.dp.cpp b/sycl/src/kernels/cuda/native_bf16.dp.cpp
index 6745f079811..61f05901559 100644
--- a/sycl/src/kernels/cuda/native_bf16.dp.cpp
+++ b/sycl/src/kernels/cuda/native_bf16.dp.cpp
@@ -41,7 +41,7 @@ __dpct_inline__ float mmvf_warp_sum(float value) {
 #pragma unroll
     for (int offset = 16; offset > 0; offset >>= 1)
         /*
-        DPCT1108:288: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -73,14 +73,14 @@ __dpct_inline__ void bf16_f32_mmvf_kernel(const float *__restrict__ x,
         const sycl::float2 input = inputs2[pair];
         // Match the two ordered multiply-adds in ggml_cuda_mad, not a pair sum followed by one add.
         /*
-        DPCT1013:1094: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
         */
         acc = sycl::fma(f32_from_bf16((uint16_t)weight), input.x(), acc);
         /*
-        DPCT1013:1095: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
@@ -131,14 +131,14 @@ __dpct_inline__ void bf16_f32_mmvf_multi_kernel(
                     reinterpret_cast<const sycl::float2 *>(x + (size_t)k *
                                                                    ldx)[pair];
                 /*
-                DPCT1013:1096: The rounding mode could not be specified and the
+                DPCT1013: The rounding mode could not be specified and the
                 generated code may have different accuracy than the original
                 code. Verify the correctness. SYCL math built-in function
                 rounding mode is aligned with OpenCL C 1.2 standard.
                 */
                 acc[k] = sycl::fma(w0, input.x(), acc[k]);
                 /*
-                DPCT1013:1097: The rounding mode could not be specified and the
+                DPCT1013: The rounding mode could not be specified and the
                 generated code may have different accuracy than the original
                 code. Verify the correctness. SYCL math built-in function
                 rounding mode is aligned with OpenCL C 1.2 standard.
@@ -249,23 +249,23 @@ void bf16_gemv_fp32_mmvf_multi(const float* x, int64_t ldx, const uint16_t* w, f
     }
 #undef STRATA_MMVF_M
     /*
-    DPCT1010:1100: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 result = 0;
     /*
-    DPCT1000:1099: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (result != 0)
         /*
-        DPCT1009:1101: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:1098: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(
             std::string("bf16_gemv_fp32_mmvf_multi launch: ") +
@@ -319,23 +319,23 @@ void bf16_gemv_fp32_mmvf(const float* x, const uint16_t* w, float* y,
     }
 #undef STRATA_MMVF_CASE
     /*
-    DPCT1010:1104: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 result = 0;
     /*
-    DPCT1000:1103: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (result != 0)
         /*
-        DPCT1009:1105: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:1102: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("bf16_gemv_fp32_mmvf launch: ") +
                                  dpct::get_error_string_dummy(result));
diff --git a/sycl/src/kernels/cuda/native_flash_attn.dp.cpp b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
index 55c204a19c1..4b2d2951223 100644
--- a/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
@@ -37,7 +37,7 @@ template <int Width> __dpct_inline__ float warp_sum(float x) {
 #pragma unroll
     for (int offset = Width / 2; offset; offset >>= 1)
         /*
-        DPCT1108:81: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -50,7 +50,7 @@ __dpct_inline__ float warp_max(float x) {
 #pragma unroll
     for (int offset = 16; offset; offset >>= 1)
         /*
-        DPCT1108:82: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -66,7 +66,7 @@ __dpct_inline__ float warp_max(float x) {
 // four values (float2) per load, four V columns per iteration. Padded length256
 // gives ntiles_KV=ceil(256/D)=1, so the pinned launcher selects grid.y=1.
 /*
-DPCT1110:83: The total declared local variable size in device function attend
+DPCT1110: The total declared local variable size in device function attend
 exceeds 128 bytes and may cause high register pressure. Consult with your
 hardware vendor to find the total register size available and adjust the code,
 or use smaller sub-group size to avoid high register pressure.
@@ -156,7 +156,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
 #pragma unroll
         for (int offset = 8; offset < 32; offset <<= 1)
             /*
-            DPCT1108:84: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -202,7 +202,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
                     // that order despite this adapter's masked-load branches.
                     if (k0 == 0) {
                         /*
-                        DPCT1013:437: The rounding mode could not be specified
+                        DPCT1013: The rounding mode could not be specified
                         and the generated code may have different accuracy than
                         the original code. Verify the correctness. SYCL math
                         built-in function rounding mode is aligned with OpenCL
@@ -211,7 +211,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
                         vkq[i0 / 8 + j].x() =
                             sycl::fma(rescale, vkq[i0 / 8 + j].x(), a * weight);
                         /*
-                        DPCT1013:438: The rounding mode could not be specified
+                        DPCT1013: The rounding mode could not be specified
                         and the generated code may have different accuracy than
                         the original code. Verify the correctness. SYCL math
                         built-in function rounding mode is aligned with OpenCL
@@ -221,7 +221,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
                             sycl::fma(rescale, vkq[i0 / 8 + j].y(), b * weight);
                     } else {
                         /*
-                        DPCT1013:439: The rounding mode could not be specified
+                        DPCT1013: The rounding mode could not be specified
                         and the generated code may have different accuracy than
                         the original code. Verify the correctness. SYCL math
                         built-in function rounding mode is aligned with OpenCL
@@ -230,7 +230,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
                         vkq[i0 / 8 + j].x() =
                             sycl::fma(a, weight, vkq[i0 / 8 + j].x());
                         /*
-                        DPCT1013:440: The rounding mode could not be specified
+                        DPCT1013: The rounding mode could not be specified
                         and the generated code may have different accuracy than
                         the original code. Verify the correctness. SYCL math
                         built-in function rounding mode is aligned with OpenCL
@@ -245,14 +245,14 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
     }
     if (warp == 0) { max_shared[lane] = -FLT_MAX / 2.0f; sum_shared[lane] = 0.0f; }
     /*
-    DPCT1065:434: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     if (lane == 0) max_shared[warp] = maximum;
     /*
-    DPCT1065:435: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -262,14 +262,14 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
 #pragma unroll
     for (int i = 0; i < 16; ++i) {
         /*
-        DPCT1013:441: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         vkq[i].x() = vkq[i].x() * rescale;
         /*
-        DPCT1013:442: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -289,7 +289,7 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
     sum = warp_sum<32>(sum);
     if (lane == 0) sum_shared[warp] = sum;
     /*
-    DPCT1065:436: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -358,23 +358,23 @@ void native_flash_attn_short_step(const float* q, const uint16_t* k, const uint1
                     });
     }
     /*
-    DPCT1010:445: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto result = 0;
     /*
-    DPCT1000:444: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (result != 0)
         /*
-        DPCT1009:446: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:443: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("native FlashAttention launch: ") +
                                  dpct::get_error_string_dummy(result));
diff --git a/sycl/src/kernels/cuda/native_gdn.dp.cpp b/sycl/src/kernels/cuda/native_gdn.dp.cpp
index c4309722fa7..4faf25a36d3 100644
--- a/sycl/src/kernels/cuda/native_gdn.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gdn.dp.cpp
@@ -43,7 +43,7 @@ __dpct_inline__ float warp_sum(float value) {
 #pragma unroll
     for (int offset = 16; offset > 0; offset >>= 1)
         /*
-        DPCT1108:157: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -144,21 +144,21 @@ void native_gdn_step(float* state, const float* q, const float* k, const float*
                     });
     }
     /*
-    DPCT1010:804: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:805: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:802: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:803: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
index f0bd4ed3966..d9f3b1f9db6 100644
--- a/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
@@ -41,7 +41,7 @@ __dpct_inline__ float warp_sum(float value) {
 #pragma unroll
     for (int offset = 16; offset > 0; offset >>= 1)
         /*
-        DPCT1108:100: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -56,7 +56,7 @@ __dpct_inline__ float norm_sum(float value, float *sums) {
     value = warp_sum(value);
     if (lane == 0) sums[item_ct1.get_local_id(2) / 32] = value;
     /*
-    DPCT1065:516: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -83,7 +83,7 @@ __dpct_inline__ void conv_silu(float *__restrict__ history,
     for (int tap = 0; tap < 4; ++tap) sum += values[tap] * weights[c * 4 + tap];
     // The native SSM kernel adds its zero bias even when there is no bias input.
     /*
-    DPCT1013:517: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -110,14 +110,14 @@ __dpct_inline__ void l2_norm(float *input, float epsilon, float scale_after) {
     if (col < S) {
         // Preserve the FP32 store boundary between RMSNorm and ggml_scale.
         /*
-        DPCT1013:518: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         const float normalized = scale * value;
         /*
-        DPCT1013:519: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -141,7 +141,7 @@ __dpct_inline__ void gate_softplus(const float *__restrict__ alpha,
                   item_ct1.get_local_id(2);
     if (i >= count) return;
     /*
-    DPCT1013:520: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -170,7 +170,7 @@ __dpct_inline__ void out_norm(const float *__restrict__ input,
     if (col < S) {
         // RMSNorm+gamma is one pinned fused operator, followed by sigmoid*mul.
         /*
-        DPCT1013:521: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -202,21 +202,21 @@ void norm_geometry(int64_t rows, int64_t cols, float epsilon, void* stream) {
 }
 void check_launch() {
     /*
-    DPCT1010:524: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:525: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:522: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:523: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_gr_norm.dp.cpp b/sycl/src/kernels/cuda/native_gr_norm.dp.cpp
index 6bc15c6e8c3..63258c37542 100644
--- a/sycl/src/kernels/cuda/native_gr_norm.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gr_norm.dp.cpp
@@ -41,7 +41,7 @@ __dpct_inline__ float norm_warp_sum(float value) {
 #pragma unroll
     for (int offset = 16; offset > 0; offset >>= 1) {
         /*
-        DPCT1108:290: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -121,7 +121,7 @@ void native_gr_rms_norm_weighted(const float* input, const float* gamma, float*
             });
     } else
     /*
-    DPCT1049:291: The work-group size passed to the SYCL kernel may exceed
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed
     the limit. To get the device limit, query
     info::device::max_work_group_size. Adjust the work-group size if needed.
     */
@@ -140,23 +140,23 @@ void native_gr_rms_norm_weighted(const float* input, const float* gamma, float*
             });
     }
     /*
-    DPCT1010:1149: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1000:1148: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error != 0)
         /*
-        DPCT1009:1150: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:1147: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("native GR RMSNorm launch: ") +
                                  dpct::get_error_string_dummy(error));
diff --git a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
index a758831fdde..436af20f36c 100644
--- a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
@@ -44,7 +44,7 @@ __dpct_inline__ float sigmoid(float x) {
 // explicitly so compile-time zero does not change signed-zero behavior.
 __dpct_inline__ float scale_zero_bias(float x, float scale) {
     /*
-    DPCT1013:908: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -74,7 +74,7 @@ pre_gated(const float *__restrict__ xn, float *__restrict__ gate,
         const std::size_t i = std::size_t(c) * n_embd + d;
         const float x = xn[i], w = sigmoid(gate[i]);
         /*
-        DPCT1013:909: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -82,14 +82,14 @@ pre_gated(const float *__restrict__ xn, float *__restrict__ gate,
         const float product = x * w;
         gate[i] = product;
         /*
-        DPCT1013:910: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         if constexpr (Fused) sum = sycl::fma(x, w, sum);
         /*
-        DPCT1013:911: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -112,7 +112,7 @@ __dpct_inline__ void post(const float *residual,
     const float weight = scale_zero_bias(sigmoid(scale_zero_bias(inject[c], scale)), 2.0f);
     // Exact residual/output alias is supported; no other thread reads residual[i].
     /*
-    DPCT1013:912: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -130,23 +130,23 @@ void check_shape(int n, int hc) {
 unsigned blocks(std::size_t n) { return unsigned((n + THREADS - 1) / THREADS); }
 void check_launch() {
     /*
-    DPCT1010:915: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1000:914: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error != 0)
         /*
-        DPCT1009:916: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:913: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("native GR postops launch: ") +
                                  dpct::get_error_string_dummy(error));
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 61ad826db21..3d05318d690 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -131,7 +131,7 @@ __dpct_inline__ float warp_sum(float x) {
 #pragma unroll
     for (int offset = WARP / 2; offset > 0; offset >>= 1) {
         /*
-        DPCT1108:203: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -146,7 +146,7 @@ __dpct_inline__ float warp_max(float x) {
 #pragma unroll
     for (int offset = WARP / 2; offset > 0; offset >>= 1) {
         /*
-        DPCT1108:204: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -204,7 +204,7 @@ q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
 }
 
 /*
-DPCT1110:205: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 q5_q8_dot exceeds 128 bytes and may cause high register pressure. Consult with
 your hardware vendor to find the total register size available and adjust the
 code, or use smaller sub-group size to avoid high register pressure.
@@ -286,7 +286,7 @@ __dpct_inline__ void native_q5_k_mmvq_kernel(const Q5KBlock *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:896: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -365,7 +365,7 @@ __dpct_inline__ void native_q2_0_mmvq_kernel(const Q20Block *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:897: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -467,7 +467,7 @@ __dpct_inline__ void native_q3_k_mmvq_kernel(const Q3KBlock *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:898: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -568,7 +568,7 @@ native_iq4_xs_mmvq_kernel(const IQ4XSBlock *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:899: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -681,7 +681,7 @@ __dpct_inline__ void native_q4_k_mmvq_kernel(const Q4KBlock *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:900: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -768,7 +768,7 @@ __dpct_inline__ void native_q6_k_mmvq_kernel(const Q6KBlock *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:901: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -905,7 +905,7 @@ __dpct_inline__ void native_small_mmvq_kernel(const Weight *__restrict__ w,
                 tmp[i];
     }
     /*
-    DPCT1065:902: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -1183,7 +1183,7 @@ bool g_multi_exact = true;   // until the upstream layout is timed on an idle GP
 
 template <typename F, int NCOLS, int NW, int ROWS>
 /*
-DPCT1110:206: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 native_mmvq_multi_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -1210,7 +1210,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
             if (row0 + i < n_out) {
                 const std::size_t block = std::size_t(row0 + i) * blocks_per_row + kbx;
                 /*
-                DPCT1084:299: The function call "Q5KTraits::load" has multiple
+                DPCT1084: The function call "Q5KTraits::load" has multiple
                 migration results in different template instantiations that
                 could not be unified. You may need to adjust the code.
                 */
@@ -1219,7 +1219,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
 #pragma unroll
                 for (int j = 0; j < NCOLS; ++j)                         // then per column
                     /*
-                    DPCT1084:300: The function call "Q5KTraits::apply" has
+                    DPCT1084: The function call "Q5KTraits::apply" has
                     multiple migration results in different template
                     instantiations that could not be unified. You may need to
                     adjust the code.
@@ -1241,7 +1241,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
                        [item_ct1.get_local_id(2)] = tmp[j][i];
     }
     /*
-    DPCT1065:903: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -1424,7 +1424,7 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
         constexpr int ROWS = 1;   // SYCL port: one row per work-group (more groups: the kernel is latency-bound here)
         const unsigned blocks = unsigned((std::size_t(n_out) + ROWS - 1) / ROWS);
         /*
-        DPCT1049:207: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1453,7 +1453,7 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
     if (n_in / F::DIV < F::BPI) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:208: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1476,7 +1476,7 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
         }
     } else {
         /*
-        DPCT1049:209: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1529,23 +1529,23 @@ void validate_stream(void* stream) {
 }
 void launch_check() {
     /*
-    DPCT1010:906: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1000:905: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error != 0) {
         /*
-        DPCT1009:907: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:904: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("native MMVQ launch: ") +
                                  dpct::get_error_string_dummy(error));
@@ -1573,7 +1573,7 @@ void small_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 32 < 2 * WARPS * WARP / Qi) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:210: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1601,7 +1601,7 @@ void small_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:211: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1703,7 +1703,7 @@ void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / QK < VDR * WARPS * WARP / QI) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:212: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1724,7 +1724,7 @@ void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:213: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1778,7 +1778,7 @@ void native_q2_0_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 64 < WARPS * WARP / 2) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:214: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1798,7 +1798,7 @@ void native_q2_0_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:215: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1850,7 +1850,7 @@ void native_q3_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 256 < WARPS * WARP / 16) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:216: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1870,7 +1870,7 @@ void native_q3_k_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:217: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1922,7 +1922,7 @@ void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 256 < 4 * WARPS * WARP / 32) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:218: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1950,7 +1950,7 @@ void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:219: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -2011,7 +2011,7 @@ void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 256 < WARPS * WARP / 16) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:220: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -2032,7 +2032,7 @@ void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:221: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -2105,7 +2105,7 @@ void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     if (n_in / 256 < WARPS * WARP / 32) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
         /*
-        DPCT1049:222: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -2125,7 +2125,7 @@ void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
         }
     } else {
         /*
-        DPCT1049:223: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
diff --git a/sycl/src/kernels/cuda/native_moe.dp.cpp b/sycl/src/kernels/cuda/native_moe.dp.cpp
index b94b5f850da..3212e3ceddd 100644
--- a/sycl/src/kernels/cuda/native_moe.dp.cpp
+++ b/sycl/src/kernels/cuda/native_moe.dp.cpp
@@ -94,21 +94,21 @@ void native_moe_combine(const float* parts, const float* weights, const float* s
                 });
     }
     /*
-    DPCT1010:597: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:598: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:595: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:596: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
@@ -133,21 +133,21 @@ void native_moe_combine_multi(const float* parts, const float* weights, const fl
                 });
     }
     /*
-    DPCT1010:601: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:602: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:599: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:600: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_ple_postops.dp.cpp b/sycl/src/kernels/cuda/native_ple_postops.dp.cpp
index d90b7a458c4..a55748bd89b 100644
--- a/sycl/src/kernels/cuda/native_ple_postops.dp.cpp
+++ b/sycl/src/kernels/cuda/native_ple_postops.dp.cpp
@@ -37,7 +37,7 @@ namespace {
 constexpr int N = 2560, H = 4, D = N * H, HISTORY = 9;
 inline float warp_sum(float x) {
     /*
-DPCT1108:50: '__shfl_xor_sync' was migrated with the experimental feature masked
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature masked
 sub_group function which may not be supported by all compilers or runtimes. You
 may need to adjust the code.
 */
@@ -58,7 +58,7 @@ __dpct_inline__ void gate_kernel(const float *key, const float *query,
     for (int j = 0; j < 8; ++j) {
         const int d = item_ct1.get_local_id(2) + j * 512;
         /*
-        DPCT1013:372: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -82,7 +82,7 @@ __dpct_inline__ void gate_kernel(const float *key, const float *query,
     sum = warp_sum(sum);
     if (item_ct1.get_local_id(2) == 0) {
         /*
-        DPCT1013:373: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -91,7 +91,7 @@ __dpct_inline__ void gate_kernel(const float *key, const float *query,
         const float mag = sycl::sqrt(sycl::fmax(sycl::fabs(s), 1e-6f));
         const float sign = float((s > 0.0f) - (s < 0.0f));
         /*
-        DPCT1013:374: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -106,7 +106,7 @@ __dpct_inline__ void broadcast_kernel(const float *value, const float *gate,
     const int i = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
                   item_ct1.get_local_id(2);
     /*
-    DPCT1013:375: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -130,14 +130,14 @@ conv_residual_kernel(const float *history, const float *normalized,
                 sycl::bit_cast<sycl::half, unsigned short>(weights[c * 4 + k]))
                 .convert<float, sycl::rounding_mode::automatic>()[0];
         /*
-        DPCT1013:376: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         const float term = x * w;
         /*
-        DPCT1013:377: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -148,7 +148,7 @@ conv_residual_kernel(const float *history, const float *normalized,
     conv[c] = activation;
     // Exact hidden/result alias is safe: each thread owns one element.
     /*
-    DPCT1013:378: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -160,7 +160,7 @@ conv_residual_kernel(const float *history, const float *normalized,
 inline float norm_warp_sum(float value) {
 #pragma unroll
     /*
-    DPCT1108:51: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -212,7 +212,7 @@ __dpct_inline__ void broadcast_batch_kernel(const float *value,
     if (i >= size_t(T) * D) return;
     const size_t t = i / D, d = i % D;
     /*
-    DPCT1013:379: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -241,14 +241,14 @@ __dpct_inline__ void conv_residual_batch_kernel(const float *history,
                 sycl::bit_cast<sycl::half, unsigned short>(weights[c * 4 + k]))
                 .convert<float, sycl::rounding_mode::automatic>()[0];
         /*
-        DPCT1013:380: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         const float term = x * wk;
         /*
-        DPCT1013:381: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -257,7 +257,7 @@ __dpct_inline__ void conv_residual_batch_kernel(const float *history,
     }
     const float activation = sum / (1.0f + sycl::native::exp(-sum));
     /*
-    DPCT1013:382: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -293,21 +293,21 @@ void validate(Span span) {
 }
 void launch_check() {
     /*
-    DPCT1010:385: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:386: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:383: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:384: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
@@ -339,7 +339,7 @@ void native_ple_postops(const float* projected_key, const float* hidden,
     native_gr_rms_norm_weighted(hidden,w.norm_query,b.query,N,H,NG_RMS_EPS,stream);
     auto st = strata::q_of(stream);
     /*
-    DPCT1049:52: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -399,7 +399,7 @@ void native_ple_postops_batch(float* key, float* hidden, const float* value, flo
     const unsigned rows = unsigned(T) * H;
     const unsigned blocks = unsigned((size_t(T) * D + 255) / 256);
     /*
-    DPCT1049:53: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -416,7 +416,7 @@ void native_ple_postops_batch(float* key, float* hidden, const float* value, flo
             });
     }
     /*
-    DPCT1049:54: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -433,7 +433,7 @@ void native_ple_postops_batch(float* key, float* hidden, const float* value, flo
             });
     }
     /*
-    DPCT1049:55: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -469,7 +469,7 @@ void native_ple_postops_batch(float* key, float* hidden, const float* value, flo
             });
     }
     /*
-    DPCT1049:56: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
diff --git a/sycl/src/kernels/cuda/native_qsa.dp.cpp b/sycl/src/kernels/cuda/native_qsa.dp.cpp
index f0c4c0f9122..22183145910 100644
--- a/sycl/src/kernels/cuda/native_qsa.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa.dp.cpp
@@ -42,7 +42,7 @@ __dpct_inline__ float warp_sum(float value) {
 #pragma unroll
     for (int offset = 16; offset; offset >>= 1)
         /*
-        DPCT1108:174: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -114,23 +114,23 @@ void buffers(const float* input, std::size_t in_bytes, const float* weight, std:
 }
 void check_launch() {
     /*
-    DPCT1010:844: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto result = 0;
     /*
-    DPCT1000:843: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (result != 0)
         /*
-        DPCT1009:845: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1001:842: The statement could not be removed.
+        DPCT1001: The statement could not be removed.
         */
         throw std::runtime_error(std::string("native QSA launch: ") +
                                  dpct::get_error_string_dummy(result));
@@ -164,7 +164,7 @@ void native_qsa_rms_norm_weighted(const float* input, const float* gamma, float*
                     });
     } else
     /*
-    DPCT1049:175: The work-group size passed to the SYCL kernel may exceed
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed
     the limit. To get the device limit, query
     info::device::max_work_group_size. Adjust the work-group size if needed.
     */
diff --git a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
index bda43e8bc66..c216b8d5ead 100644
--- a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
@@ -39,7 +39,7 @@ inline float warp_sum(float x) {
 #pragma unroll
     for (int offset = 16; offset; offset >>= 1)
         /*
-        DPCT1108:133: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -82,14 +82,14 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
 #pragma unroll
         for (int j = 1; j < R; ++j)
             /*
-            DPCT1013:637: The rounding mode could not be specified and the
+            DPCT1013: The rounding mode could not be specified and the
             generated code may have different accuracy than the original code.
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
             */
             sum = sum + pos == 0 || j == R - 1 ? incoming : tail[j * D + d];
         /*
-        DPCT1013:638: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -102,7 +102,7 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
     const int lane = d % 32;
     if (lane == 0) partials[d / 32] = square_sum;
     /*
-    DPCT1065:635: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -112,7 +112,7 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
     const float scale = sycl::rsqrt(square_sum / D + epsilon);
     if (d < D) values[d] = scale * mean * gamma[d];
     /*
-    DPCT1065:636: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -159,7 +159,7 @@ __dpct_inline__ float norm_scale(float mean, float *partials, int d) {
     const int lane = d % 32;
     if (lane == 0) partials[d / 32] = square_sum;
     /*
-    DPCT1065:639: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -192,14 +192,14 @@ __dpct_inline__ void append_first(const float *__restrict__ raw,
         float sum = incoming;
 #pragma unroll
         /*
-        DPCT1013:641: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         for (int j = 1; j < R; ++j) sum = sum + incoming;
         /*
-        DPCT1013:642: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -210,7 +210,7 @@ __dpct_inline__ void append_first(const float *__restrict__ raw,
     const float scale = sycl::rsqrt(square_sum / D + epsilon);
     if (d < D) values[d] = scale * mean * gamma[d];
     /*
-    DPCT1113:640: Consider replacing
+    DPCT1113: Consider replacing
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) with
     sycl::nd_item::barrier() if function "append_first" is called in a
     multidimensional kernel.
@@ -253,14 +253,14 @@ append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
         float sum = key(0);
 #pragma unroll
         /*
-        DPCT1013:643: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         for (int j = 1; j < R; ++j) sum = sum + key(j);
         /*
-        DPCT1013:644: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -344,21 +344,21 @@ void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_dev
             });
     }
     /*
-    DPCT1010:647: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:648: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:645: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:646: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
@@ -419,21 +419,21 @@ void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, in
             });
     }
     /*
-    DPCT1010:651: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:652: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:649: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:650: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
index d544e2e626f..fe57d98afdc 100644
--- a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
@@ -35,6 +35,7 @@ constexpr int D=128, HEADS=4, R=4, ROWS=32, WARPS=2, STRIDE=36, COMBINE=68;
 struct TileA { uint32_t x[4]; };
 struct TileB { uint32_t x[2]; };
 struct TileC { float x[4]={0.0f,0.0f,0.0f,0.0f}; };
+#if !defined(__HIPCC__)
 #if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
 __dpct_inline__ void load_a(TileA &a, const float *p) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -64,7 +65,7 @@ __dpct_inline__ void load_b(TileB &b, const float *p) {
 __dpct_inline__ void mma(TileC &c, const TileA &a, const TileB &b) {
     // Deliberately no cvt.rn.tf32: pinned mma.cuh passes raw F32 bits directly.
     /*
-    DPCT1053:75: Migration of device assembly code is not supported.
+    DPCT1053: Migration of device assembly code is not supported.
     */
     asm("mma.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {%0,%1,%2,%3}, "
         "{%4,%5,%6,%7}, {%8,%9}, {%0,%1,%2,%3};"
@@ -74,7 +75,7 @@ __dpct_inline__ void mma(TileC &c, const TileA &a, const TileB &b) {
 }
 #endif
 /*
-DPCT1110:76: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 score_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -143,7 +144,7 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
         }
     }
     /*
-    DPCT1065:405: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -158,7 +159,7 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
         }
     }
     /*
-    DPCT1065:406: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -172,14 +173,14 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
 #pragma unroll
         for(int j=0;j<HEADS;++j){
             /*
-            DPCT1013:407: The rounding mode could not be specified and the
+            DPCT1013: The rounding mode could not be specified and the
             generated code may have different accuracy than the original code.
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
             */
             float v = 0.0f + shared[j * COMBINE + lane];
             /*
-            DPCT1013:408: The rounding mode could not be specified and the
+            DPCT1013: The rounding mode could not be specified and the
             generated code may have different accuracy than the original code.
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
@@ -188,21 +189,21 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
             h[j] = sycl::fmax(v, 0.0f);
         }
         /*
-        DPCT1013:409: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         float sum = h[0] + h[1] + h[2] + h[3];
         /*
-        DPCT1013:410: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
         if (bias) sum = sum + bias[row];
         /*
-        DPCT1013:411: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -210,7 +211,7 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
         sum = sum + row == full && n % R ? 1e9f : 0.0f;
         // The live causal mask is +0. Invalid/padded cells are never exported.
         /*
-        DPCT1013:412: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -221,6 +222,42 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
     }
 #endif
 }
+#else
+// gfx1100 has no CUDA ldmatrix/mma instruction sequence. Keep the same entry point and
+// score contract with an ordered scalar F32 dot for each indexer head. The four heads
+// run independently; their ReLU'd scores are then added in the documented head order.
+// This path favors a well-defined fallback over pretending the CUDA PTX is portable.
+__global__ void scalar_score_kernel(
+        const float* __restrict__ pooled,const float* __restrict__ query,
+        const float* __restrict__ bias,const int32_t* __restrict__ step,
+        int max_cells,float* __restrict__ cells) {
+    const int n=step[kStepNKv],full=step[kStepNBid];
+    if(n<1||n>max_cells||step[kStepPos]!=n-1||full!=n/R||
+       step[kStepWidth]!=(n<2051?n:2051))return;
+    const int row=blockIdx.x;
+    if(row>full)return;
+    __shared__ float head_score[HEADS];
+    const int head=threadIdx.x;
+    if(head<HEADS){
+        float dot=0.0f;
+#pragma unroll
+        for(int d=0;d<D;++d)
+            dot=__fmaf_rn(pooled[size_t(row)*D+d],query[size_t(head)*D+d],dot);
+        head_score[head]=dot>0.0f?dot:0.0f;
+    }
+    __syncthreads();
+    if(head==0){
+        float sum=(0.0f + head_score[0]);
+        sum=(sum + head_score[1]);
+        sum=(sum + head_score[2]);
+        sum=(sum + head_score[3]);
+        if(bias)sum=(sum + bias[row]);
+        sum=(sum + row==full&&n%R?1e9f:0.0f);
+        sum=(sum + 0.0f);
+        for(int i=row*R;i<n&&i<(row+1)*R;++i)cells[i]=sum;
+    }
+}
+#endif
 struct Span{const void* p;size_t n;};
 void validate(Span s){
     const auto p=reinterpret_cast<uintptr_t>(s.p);
@@ -245,12 +282,16 @@ void native_qsa_score(const float* pooled,const float* query,const float* bias,
     for(int i=0;i<count;++i)validate(spans[i]);
     for(int i=0;i<count;++i)for(int j=i+1;j<count;++j)
         if(overlaps(spans[i],spans[j]))throw std::invalid_argument("native QSA score spans overlap");
+#if defined(__HIPCC__)
+    scalar_score_kernel<<<unsigned(max_blocks),128,0,static_cast<cudaStream_t>(stream)>>>(
+        pooled,query,bias,step,int(max_cells),cells);
+#else
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         ((sycl::queue *)(strata::q_of(stream)))
-            ->parallel_for<dpct_kernel_name<class score_kernel_8b4dbe>>(
+            ->parallel_for<dpct_kernel_name<class score_kernel_59cd1b>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1,
                                 unsigned((max_blocks + ROWS - 1) / ROWS)) *
@@ -263,22 +304,23 @@ void native_qsa_score(const float* pooled,const float* query,const float* bias,
                                      cells);
                     });
     }
+#endif
     /*
-    DPCT1010:415: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:416: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:413: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:414: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_rope.dp.cpp b/sycl/src/kernels/cuda/native_rope.dp.cpp
index 8c809bb3a67..fa30f027ed3 100644
--- a/sycl/src/kernels/cuda/native_rope.dp.cpp
+++ b/sycl/src/kernels/cuda/native_rope.dp.cpp
@@ -122,21 +122,21 @@ void native_rope_apply(const float* x, float* out, int rows, int head_dim,
             });
     }
     /*
-    DPCT1010:390: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:391: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:388: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:389: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/native_router.dp.cpp b/sycl/src/kernels/cuda/native_router.dp.cpp
index fe28562c15f..d0d3616247b 100644
--- a/sycl/src/kernels/cuda/native_router.dp.cpp
+++ b/sycl/src/kernels/cuda/native_router.dp.cpp
@@ -37,7 +37,7 @@ std::atomic<bool> enabled{false};
 __dpct_inline__ float warp_sum(float value) {
 #pragma unroll
     /*
-    DPCT1108:177: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -50,7 +50,7 @@ __dpct_inline__ float warp_sum(float value) {
 __dpct_inline__ float warp_max(float value) {
 #pragma unroll
     /*
-    DPCT1108:178: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -62,7 +62,7 @@ __dpct_inline__ float warp_max(float value) {
     return value;
 }
 /*
-DPCT1110:179: The total declared local variable size in device function route
+DPCT1110: The total declared local variable size in device function route
 exceeds 128 bytes and may cause high register pressure. Consult with your
 hardware vendor to find the total register size available and adjust the code,
 or use smaller sub-group size to avoid high register pressure.
@@ -110,7 +110,7 @@ __dpct_inline__ void route(const float *__restrict__ logits,
 #pragma unroll
         for (int mask = 16; mask; mask >>= 1) {
             /*
-            DPCT1108:180: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -118,7 +118,7 @@ __dpct_inline__ void route(const float *__restrict__ logits,
                 0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 best, mask);
             /*
-            DPCT1108:181: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -170,21 +170,21 @@ void native_router_top10(const float* logits, int32_t* ids, float* weights, void
                     });
     }
     /*
-    DPCT1010:858: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:859: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:856: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:857: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
@@ -210,21 +210,21 @@ void native_router_top10_multi(const float* logits, int32_t* ids, float* weights
                     });
     }
     /*
-    DPCT1010:862: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const auto error = 0;
     /*
-    DPCT1009:863: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:860: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:861: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (error !=
diff --git a/sycl/src/kernels/cuda/ple.dp.cpp b/sycl/src/kernels/cuda/ple.dp.cpp
index b8d46677269..a6c06b8760c 100644
--- a/sycl/src/kernels/cuda/ple.dp.cpp
+++ b/sycl/src/kernels/cuda/ple.dp.cpp
@@ -82,7 +82,7 @@ __dpct_inline__ float silu_f(float x) {
 /// fires.
 inline double block_sum(double v, double *scratch) {
     /*
-    DPCT1065:1040: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -91,12 +91,12 @@ inline double block_sum(double v, double *scratch) {
     const int lane = item_ct1.get_local_id(2) & 31,
               warp = item_ct1.get_local_id(2) >> 5;
     /*
-DPCT1108:271: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
     /*
-DPCT1121:272: Make sure that the "v" which is used in the SYCL group
+DPCT1121: Make sure that the "v" which is used in the SYCL group
 function/algorithm is initialized.
 */
 #pragma unroll
@@ -106,7 +106,7 @@ function/algorithm is initialized.
             off);
     if (lane == 0) scratch[warp] = v;
     /*
-    DPCT1065:1041: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -116,12 +116,12 @@ function/algorithm is initialized.
                                         : 0.0;
     if (warp == 0)
         /*
-DPCT1108:273: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
         /*
-DPCT1121:274: Make sure that the "v" which is used in the SYCL group
+DPCT1121: Make sure that the "v" which is used in the SYCL group
 function/algorithm is initialized.
 */
 #pragma unroll
@@ -131,7 +131,7 @@ function/algorithm is initialized.
                 v, off);
     if (item_ct1.get_local_id(2) == 0) scratch[0] = v;
     /*
-    DPCT1065:1042: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -306,7 +306,7 @@ void ple_history_advance(float* hist, const float* normalized, void* stream) {
                 });
     }
     /*
-    DPCT1010:1044: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -336,8 +336,9 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
                PleOut& out, void* scratch, void* stream) {
     const bool native_key = w.key_native_data != nullptr && w.key_bf16 == nullptr;
     if (native_key && (!emb || !hidden || !hist_rows || !out.result || !scratch || !stream ||
-                       !w.key_native_q8_1 || w.key_native_type != 42))
-        throw std::invalid_argument("ple_block: native key requires Q2_0 weights, input/output, private scratch and explicit stream");
+                       !w.key_native_q8_1 ||
+                       (w.key_native_type != 42 && w.key_native_type != 18 && w.key_native_type != 23)))
+        throw std::invalid_argument("ple_block: native key requires Q2_0, IQ3_XXS or IQ4_XS weights, input/output, private scratch and explicit stream");
     if (emb == nullptr || hidden == nullptr || hist_rows == nullptr || out.result == nullptr) return;
     const int n_embd = NG_N_EMBD, hc = NG_HC, hc_dim = NG_HC_DIM;
     static_assert(NG_N_EMBD == 2560 && NG_HC_DIM == 10240, "native PLE key geometry changed");
@@ -429,7 +430,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             st->submit([&](sycl::handler &cgh) {
                 auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
 
-                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_cf1ead>>(
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_2584bb>>(
                     sycl::nd_range<3>(sycl::range(1, 1, hc) *
                                           sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
@@ -450,7 +451,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             st->submit([&](sycl::handler &cgh) {
                 auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
 
-                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_2584bb>>(
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_e3be1c>>(
                     sycl::nd_range<3>(sycl::range(1, 1, hc) *
                                           sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
@@ -472,7 +473,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            st->parallel_for<dpct_kernel_name<class to_bf16_kernel_e8b7a8>>(
+            st->parallel_for<dpct_kernel_name<class to_bf16_kernel_ab93ff>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (n_embd + THREADS - 1) / THREADS) *
                         sycl::range(1, 1, THREADS),
@@ -487,7 +488,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             dpct::has_capability_or_fail(st->get_device(),
                                          {sycl::aspect::fp64});
 
-            st->parallel_for<dpct_kernel_name<class bf16_gemv_kernel_ab93ff>>(
+            st->parallel_for<dpct_kernel_name<class bf16_gemv_kernel_47d04d>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (n_embd + THREADS - 1) / THREADS) *
                         sycl::range(1, 1, THREADS),
@@ -516,7 +517,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             st->submit([&](sycl::handler &cgh) {
                 auto sqrtf_float_n_embd_ct4 = 1.0f / sqrtf((float)n_embd);
 
-                cgh.parallel_for<dpct_kernel_name<class gate_kernel_2da4a8>>(
+                cgh.parallel_for<dpct_kernel_name<class gate_kernel_ce83eb>>(
                     sycl::nd_range<3>(sycl::range(1, 1, hc) *
                                           sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
@@ -532,7 +533,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            st->parallel_for<dpct_kernel_name<class bcast_kernel_ce83eb>>(
+            st->parallel_for<dpct_kernel_name<class bcast_kernel_79d1c2>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
                         sycl::range(1, 1, THREADS),
@@ -550,7 +551,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             st->submit([&](sycl::handler &cgh) {
                 auto NG_RMS_EPS_ct4 = NG_RMS_EPS;
 
-                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_79d1c2>>(
+                cgh.parallel_for<dpct_kernel_name<class gnorm_kernel_cb94da>>(
                     sycl::nd_range<3>(sycl::range(1, 1, hc) *
                                           sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
@@ -571,7 +572,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
                 auto NGRAM_SIZE_ct6 = NGRAM_SIZE;
                 auto NG_HIST_ct7 = NG_HIST;
 
-                cgh.parallel_for<dpct_kernel_name<class conv_kernel_cb94da>>(
+                cgh.parallel_for<dpct_kernel_name<class conv_kernel_f83a85>>(
                     sycl::nd_range<3>(
                         sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
                             sycl::range(1, 1, THREADS),
@@ -587,7 +588,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            st->parallel_for<dpct_kernel_name<class add3_kernel_ba9359>>(
+            st->parallel_for<dpct_kernel_name<class add3_kernel_26c4c6>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (hc_dim + THREADS - 1) / THREADS) *
                         sycl::range(1, 1, THREADS),
@@ -602,7 +603,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
     //      `cb(key, ...)` capture is after `gnorm`; `value` is the projection before the gate.  Each stage the
     //      oracle records is reproduced here so a mismatch can be attributed instead of guessed at.
     /*
-    DPCT1124:1045: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -612,7 +613,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
                     "key");
     if (out.value)
         /*
-        DPCT1124:1046: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -621,7 +622,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
                st->memcpy(out.value, d_value, n_embd * sizeof(float))),
            "value");
     /*
-    DPCT1124:1047: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -631,7 +632,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
            "gate");
     if (out.gated)
         /*
-        DPCT1124:1048: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -641,7 +642,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
            "gated");
     if (out.normalized)
         /*
-        DPCT1124:1049: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -651,7 +652,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
            "norm");
     if (out.conv)
         /*
-        DPCT1124:1050: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -661,7 +662,7 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
            "conv");
 
     /*
-    DPCT1010:1051: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/qsa.dp.cpp b/sycl/src/kernels/cuda/qsa.dp.cpp
index 767417f3534..09ccaff8ca6 100644
--- a/sycl/src/kernels/cuda/qsa.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa.dp.cpp
@@ -69,7 +69,7 @@ void fail(const char* what) {
 
 void check_launch(const char* what) {
     /*
-    DPCT1010:806: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -130,7 +130,7 @@ kv_append_kernel(uint16_t *__restrict__ k_pool, uint16_t *__restrict__ v_pool,
                  const float *__restrict__ kcur, const float *__restrict__ vcur,
                  int kv_heads, int head_dim, int page_size, KvHostPools host) {
     /*
-    DPCT1098:809: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -177,7 +177,7 @@ __dpct_inline__ void indexer_key_append_kernel(
     auto s_mean = (double *)dpct_local; // idx_dim doubles
     const int d = item_ct1.get_local_id(2);
     /*
-    DPCT1098:813: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -204,7 +204,7 @@ __dpct_inline__ void indexer_key_append_kernel(
         for (int i = 0; i < idx_dim; ++i) {
             const double v = (double) raw[i];
             /*
-            DPCT1013:814: The rounding mode could not be specified and the
+            DPCT1013: The rounding mode could not be specified and the
             generated code may have different accuracy than the original code.
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
@@ -212,7 +212,7 @@ __dpct_inline__ void indexer_key_append_kernel(
             ss = ss + v * v;
         }
         /*
-        DPCT1013:815: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -226,7 +226,7 @@ __dpct_inline__ void indexer_key_append_kernel(
 
     if (slot != r - 1) return;
     /*
-    DPCT1065:810: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -238,7 +238,7 @@ __dpct_inline__ void indexer_key_append_kernel(
     // but the order of the SUM OF SQUARES below can, and it is fixed to d ascending on both sides.
     double m = 0.0;
     /*
-DPCT1013:816: The rounding mode could not be specified and the generated code
+DPCT1013: The rounding mode could not be specified and the generated code
 may have different accuracy than the original code. Verify the correctness. SYCL
 math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
 */
@@ -246,7 +246,7 @@ math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
     for (int j = 0; j < r - 1; ++j)
         m = m + (double)tail[(size_t)j * idx_dim + d];
     /*
-    DPCT1013:817: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -255,7 +255,7 @@ math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
     m = m / (double) r;
     s_mean[d] = m;
     /*
-    DPCT1065:811: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -263,14 +263,14 @@ math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
 
     double ss = 0.0;
     /*
-DPCT1013:818: The rounding mode could not be specified and the generated code
+DPCT1013: The rounding mode could not be specified and the generated code
 may have different accuracy than the original code. Verify the correctness. SYCL
 math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
 */
 #pragma unroll
     for (int i = 0; i < idx_dim; ++i) ss = ss + s_mean[i] * s_mean[i];
     /*
-    DPCT1013:819: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -285,7 +285,7 @@ math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
     // block's first cell's POSITION, `pos_base + b*r`, and NOT the cell index `b*r`.
     if (d == 0) *block_pos = (int32_t) (pos_base + b * r);
     /*
-    DPCT1065:812: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -320,14 +320,14 @@ __dpct_inline__ void qsa_index_kernel(const float *__restrict__ pooled,
                                       const int32_t *__restrict__ step,
                                       float *__restrict__ cell_scores) {
     /*
-    DPCT1098:820: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const long long n_bid = (long long)*(step + kStepNBid);
     /*
-    DPCT1098:821: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -351,7 +351,7 @@ __dpct_inline__ void qsa_index_kernel(const float *__restrict__ pooled,
 #pragma unroll
     for (int d = lane; d < idx_dim; d += 32)
         /*
-        DPCT1013:822: The rounding mode could not be specified and the generated
+        DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
@@ -359,12 +359,12 @@ __dpct_inline__ void qsa_index_kernel(const float *__restrict__ pooled,
         acc = acc + (double)pooled[(size_t)b * idx_dim + d] *
                         (double)q_idx[(size_t)wid * idx_dim + d];
     /*
-DPCT1108:158: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
     /*
-DPCT1013:823: The rounding mode could not be specified and the generated code
+DPCT1013: The rounding mode could not be specified and the generated code
 may have different accuracy than the original code. Verify the correctness. SYCL
 math built-in function rounding mode is aligned with OpenCL C 1.2 standard.
 */
@@ -412,7 +412,7 @@ __dpct_inline__ uint32_t order_key(float s) {
 constexpr int TOPK_THREADS = 256;
 
 /*
-DPCT1110:159: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 topk_kernel exceeds 128 bytes and may cause high register pressure. Consult with
 your hardware vendor to find the total register size available and adjust the
 code, or use smaller sub-group size to avoid high register pressure.
@@ -421,14 +421,14 @@ __dpct_inline__ void topk_kernel(const float *__restrict__ scores,
                                  const int32_t *__restrict__ step,
                                  int *__restrict__ out_ids) {
     /*
-    DPCT1098:824: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const long long n_kv = (long long)*(step + kStepNKv);
     /*
-    DPCT1098:825: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -459,7 +459,7 @@ __dpct_inline__ void topk_kernel(const float *__restrict__ scores,
              ++j) if (order_key(scores[j]) >= cand)++ c;
         s_a[t] = c;
         /*
-        DPCT1118:160: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -467,7 +467,7 @@ __dpct_inline__ void topk_kernel(const float *__restrict__ scores,
         for (int s = TOPK_THREADS / 2; s > 0; s >>= 1) {
             if (t < s) s_a[t] += s_a[t + s];
             /*
-            DPCT1118:162: SYCL group functions and algorithms must be
+            DPCT1118: SYCL group functions and algorithms must be
             encountered in converged control flow. You may need to adjust the
             code.
             */
@@ -475,7 +475,7 @@ __dpct_inline__ void topk_kernel(const float *__restrict__ scores,
         }
         const int tot = s_a[0];
         /*
-        DPCT1118:161: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(
@@ -558,7 +558,7 @@ __dpct_inline__ void kv_gather_kernel(
     const int32_t *__restrict__ step, int kv_heads, int head_dim, int page_size,
     uint16_t *__restrict__ k_scratch, uint16_t *__restrict__ v_scratch) {
     /*
-    DPCT1098:826: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -587,7 +587,7 @@ __dpct_inline__ void kv_gather_kernel(
 
 __dpct_inline__ float warp_max(float v) {
     /*
-DPCT1108:163: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -601,7 +601,7 @@ runtimes. You may need to adjust the code.
 
 __dpct_inline__ float warp_sum(float v) {
     /*
-DPCT1108:164: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -615,7 +615,7 @@ runtimes. You may need to adjust the code.
 
 /// One block per query head.  `s` holds the scores, which are then overwritten with the softmax weights.
 /*
-DPCT1110:165: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 qsa_attend_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -626,7 +626,7 @@ __dpct_inline__ void qsa_attend_kernel(
     int n_head, int n_head_kv, int head_dim, float *__restrict__ attn,
     float *__restrict__ weights, uint8_t *dpct_local) {
     /*
-    DPCT1098:834: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -663,7 +663,7 @@ __dpct_inline__ void qsa_attend_kernel(
         w[j] = acc * scale;
     }
     /*
-    DPCT1065:827: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -676,7 +676,7 @@ __dpct_inline__ void qsa_attend_kernel(
     mx = warp_max(mx);
     if (lane == 0) red[wid] = mx;
     /*
-    DPCT1065:828: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -687,14 +687,14 @@ __dpct_inline__ void qsa_attend_kernel(
         if (lane == 0) red[0] = mx;
     }
     /*
-    DPCT1065:829: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     mx = red[0];
     /*
-    DPCT1065:830: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -709,7 +709,7 @@ __dpct_inline__ void qsa_attend_kernel(
     sum = warp_sum(sum);
     if (lane == 0) red[wid] = sum;
     /*
-    DPCT1065:831: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -720,14 +720,14 @@ __dpct_inline__ void qsa_attend_kernel(
         if (lane == 0) red[0] = 1.0f / sum;
     }
     /*
-    DPCT1065:832: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     const float inv = red[0];
     /*
-    DPCT1065:833: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -799,7 +799,7 @@ catch (sycl::exception const &exc) {
 void step_upload_raw(const int32_t *h_step) try {
     int32_t* d = step_scratch();
     /*
-    DPCT1114:835: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -894,7 +894,7 @@ void qsa_index_step(const float* pooled, const float* q_idx, const float* bias,
     // `b > n_bid`, so the surplus blocks cost a launch and nothing else.
     const int threads = 32 * (int) s.idx_n_head;
     /*
-    DPCT1049:166: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -992,7 +992,7 @@ void qsa_attend_step(const float *q, const uint16_t *k_scratch,
     // then index past it at token 500.  The kernel reads the real count from `step`, so a larger allocation is
     // exactly what it wants.  The opt-in therefore happens once, for the capacity.
     /*
-    DPCT1083:168: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -1006,7 +1006,7 @@ void qsa_attend_step(const float *q, const uint16_t *k_scratch,
         int dev = 0, max_shared = 0;
         dev = dpct::get_current_device_id();
         /*
-        DPCT1019:836: local_mem_size in SYCL is not a complete equivalent of
+        DPCT1019: local_mem_size in SYCL is not a complete equivalent of
         cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
         the code.
         */
@@ -1018,7 +1018,7 @@ void qsa_attend_step(const float *q, const uint16_t *k_scratch,
         }
         const dpct::err0 e =
             /*
-            DPCT1027:837: The call to cudaFuncSetAttribute was replaced with 0
+            DPCT1027: The call to cudaFuncSetAttribute was replaced with 0
             because SYCL currently does not support corresponding setting.
             */
             0;
@@ -1026,7 +1026,7 @@ void qsa_attend_step(const float *q, const uint16_t *k_scratch,
         s_configured = smem;
     }
     /*
-    DPCT1049:167: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -1100,7 +1100,7 @@ void indexer_key_append(const float* raw, const int32_t* pos_dev, int32_t pos_ba
         fail("indexer_key_append: the indexer buffers are not all set (tail/dead/pooled/block_pos)");
     const int threads = (int) s.idx_dim;
     /*
-    DPCT1083:170: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -1109,7 +1109,7 @@ void indexer_key_append(const float* raw, const int32_t* pos_dev, int32_t pos_ba
     // arguments here are identical for every token, which is the property a CUDA graph needs: this function can
     // be captured and replayed, and the position arrives through `pos_dev` like every other kernel's data.
     /*
-    DPCT1049:169: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
diff --git a/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
index b1ce2fb3541..0caac0219a2 100644
--- a/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
@@ -24,7 +24,7 @@ constexpr int WARPS = THREADS / 32;
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
     /*
-    DPCT1108:85: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -37,7 +37,7 @@ __dpct_inline__ float warp_sum(float v) {
 __dpct_inline__ float warp_max(float v) {
 #pragma unroll
     /*
-    DPCT1108:86: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -49,55 +49,67 @@ __dpct_inline__ float warp_max(float v) {
 }
 
 // 8 consecutive values of one cell's key or value row for KV head `kvh`, dimensions [d0, d0+8).
-template <int KV_MODE>
-__dpct_inline__ void load8(const QsaAttnPools &p, bool value, long long row,
-                           int d0, float *out) {
-    if constexpr (KV_MODE == 0) {
-        const uint16_t* base = (value ? p.v_pool : p.k_pool) + row * HD + d0;
-        const sycl::uint4 raw = *reinterpret_cast<const sycl::uint4 *>(base);
-        const sycl::half2 *h2 = reinterpret_cast<const sycl::half2 *>(&raw);
+// Per-format bodies; `load8` below is the KV_MODE dispatcher. value=false is the K side, true the V side.
+__dpct_inline__ void load8_f16(const QsaAttnPools &p, bool value, long long row,
+                               int d0, float *out) {
+    const uint16_t* base = (value ? p.v_pool : p.k_pool) + row * HD + d0;
+    const sycl::uint4 raw = *reinterpret_cast<const sycl::uint4 *>(base);
+    const sycl::half2 *h2 = reinterpret_cast<const sycl::half2 *>(&raw);
 #pragma unroll
-        for (int j = 0; j < 4; ++j) {
-            const sycl::float2 f =
-                h2[j].template convert<float, sycl::rounding_mode::automatic>();
-            out[2 * j] = f.x();
-            out[2 * j + 1] = f.y();
-        }
-    } else if constexpr (KV_MODE == 1) {
-        const int8_t* codes = (value ? p.v_q : p.k_q) + row * HD + d0;
-        const uint16_t sbits = (value ? p.v_scale : p.k_scale)[row * (HD / KV_Q8_GROUP) + d0 / KV_Q8_GROUP];
-        const float sc =
-            sycl::vec<sycl::half, 1>(
-                sycl::bit_cast<sycl::half, unsigned short>(sbits))
-                .convert<float, sycl::rounding_mode::automatic>()[0];
-        const sycl::uint2 raw = *reinterpret_cast<const sycl::uint2 *>(codes);
-        const int8_t* c = reinterpret_cast<const int8_t*>(&raw);
+    for (int j = 0; j < 4; ++j) {
+        const sycl::float2 f =
+            h2[j].template convert<float, sycl::rounding_mode::automatic>();
+        out[2 * j] = f.x();
+        out[2 * j + 1] = f.y();
+    }
+}
+__dpct_inline__ void load8_q8(const QsaAttnPools &p, bool value, long long row,
+                              int d0, float *out) {
+    const int8_t* codes = (value ? p.v_q : p.k_q) + row * HD + d0;
+    const uint16_t sbits = (value ? p.v_scale : p.k_scale)[row * (HD / KV_Q8_GROUP) + d0 / KV_Q8_GROUP];
+    const float sc = sycl::vec<sycl::half, 1>(
+                         sycl::bit_cast<sycl::half, unsigned short>(sbits))
+                         .convert<float, sycl::rounding_mode::automatic>()[0];
+    const sycl::uint2 raw = *reinterpret_cast<const sycl::uint2 *>(codes);
+    const int8_t* c = reinterpret_cast<const int8_t*>(&raw);
 #pragma unroll
-        for (int j = 0; j < 8; ++j) out[j] = (float) c[j] * sc;
-    } else {
-        constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
-        const int b = d0 / QK4_0;
-        const int rem = d0 % QK4_0;
-        const block_q4_0* blk = reinterpret_cast<const block_q4_0*>((value ? p.v_q4 : p.k_q4) + row * bytes_per_head) + b;
-        const float d =
-            sycl::vec<sycl::half, 1>(
-                sycl::bit_cast<sycl::half, unsigned short>(blk->d))
-                .convert<float, sycl::rounding_mode::automatic>()[0];
-        const int j = (rem == 0 || rem == 16) ? 0 : 8;
-        const uint8_t* bytes = blk->qs + j;
-        if (rem < 16) {
+    for (int j = 0; j < 8; ++j) out[j] = (float) c[j] * sc;
+}
+__dpct_inline__ void load8_q4(const QsaAttnPools &p, bool value, long long row,
+                              int d0, float *out) {
+    constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
+    const int b = d0 / QK4_0;
+    const int rem = d0 % QK4_0;
+    const block_q4_0* blk = reinterpret_cast<const block_q4_0*>((value ? p.v_q4 : p.k_q4) + row * bytes_per_head) + b;
+    const float d = sycl::vec<sycl::half, 1>(
+                        sycl::bit_cast<sycl::half, unsigned short>(blk->d))
+                        .convert<float, sycl::rounding_mode::automatic>()[0];
+    const int j = (rem == 0 || rem == 16) ? 0 : 8;
+    const uint8_t* bytes = blk->qs + j;
+    if (rem < 16) {
 #pragma unroll
-            for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] & 0x0F) - 8) * d;
-        } else {
+        for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] & 0x0F) - 8) * d;
+    } else {
 #pragma unroll
-            for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] >> 4) - 8) * d;
-        }
+        for (int k = 0; k < 8; ++k) out[k] = (float) ((int)(bytes[k] >> 4) - 8) * d;
     }
 }
+template <int KV_MODE>
+__dpct_inline__ void load8(const QsaAttnPools &p, bool value, long long row,
+                           int d0, float *out) {
+    if constexpr (KV_MODE == 0) load8_f16(p, value, row, d0, out);
+    else if constexpr (KV_MODE == 1) load8_q8(p, value, row, d0, out);
+    else if constexpr (KV_MODE == 3) {
+        // hybrid K8V4: both sides are defined - K unrotated INT8, V rotated Q4_0 - so a value=true call
+        // reads the Q4_0 pool instead of dereferencing the null v_q (no call site does today; PR review)
+        if (value) load8_q4(p, value, row, d0, out);
+        else load8_q8(p, value, row, d0, out);
+    } else load8_q4(p, value, row, d0, out);
+}
 
 template <int KV_MODE>
 /*
-DPCT1110:87: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 attn_chunk_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -130,7 +142,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
             sycl::ext::oneapi::this_work_item::get_work_group<
                 3>()); // pool row of each cell (page, kv head, slot)
     /*
-    DPCT1098:447: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -157,7 +169,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
         srow[t] = r;
     }
     /*
-    DPCT1065:448: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -184,7 +196,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
         }
     }
     /*
-    DPCT1065:449: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -201,7 +213,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
         if (lane == 0) { part_m[slot * G + h] = m; part_l[slot * G + h] = l; }
     }
     /*
-    DPCT1065:450: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -225,7 +237,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
                                   t / KV_Q8_GROUP]))
                     .convert<float, sycl::rounding_mode::automatic>()[0];
             v = (float) p.v_q[srow[c] * HD + t] * sc;
-        } else {
+        } else {   // modes 2 and 3: V is rotated Q4_0 (kv_q4.hpp); the caller rotates the output back
             constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
             const int b = t / QK4_0;
             const int rem = t % QK4_0;
@@ -284,13 +296,11 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
     if (n_q <= 0) return;
     if (s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !scratch || !ids || !steps ||
         !pools.page_table || n_q > 65535) {
-        std::fprintf(stderr, "qsa_decode_attn_batch: unsupported geometry or missing buffers (head_dim %lld want %d, "
-                     "n_head %lld, n_head_kv %lld, cap %lld, n_q %lld, scratch %d ids %d steps %d page_table %d)\n",
-                     (long long) s.head_dim, HD, (long long) s.n_head, (long long) s.n_head_kv, (long long) cap,
-                     (long long) n_q, scratch != nullptr, ids != nullptr, steps != nullptr, pools.page_table != nullptr);
+        std::fprintf(stderr, "qsa_decode_attn_batch: unsupported geometry or missing buffers\n");
         std::exit(1);
     }
-    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr ? 1 : 0);
+    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr && pools.v_q4 != nullptr ? 3
+                        : (pools.k_q != nullptr ? 1 : 0));
     const int n_chunks = (int) ((cap + CHUNK - 1) / CHUNK);
     // per query: [acc: n_chunks*n_head*HD][m: n_chunks*n_head][l: n_chunks*n_head], all offsets from one stride
     const long long stride = (long long) qsa_decode_attn_scratch_floats(cap, s);
@@ -301,13 +311,29 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
     const dpct::dim3 grid((unsigned)n_chunks, (unsigned)s.n_head_kv,
                           (unsigned)n_q);
     dpct::queue_ptr st = strata::q_of(stream);
-    if (kv_mode == 2)
+    if (kv_mode == 3)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_b8af5b,
+                                          dpct_kernel_scalar<3>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<3>(q, pools, ids, steps, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, (int)cap, stride);
+            });
+    } else if (kv_mode == 2)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_411f11,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_dfacfc,
                                           dpct_kernel_scalar<2>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -323,7 +349,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_5a54ec,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_b0d448,
                                           dpct_kernel_scalar<1>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -338,7 +364,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_d59020,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_2ad0a4,
                                           dpct_kernel_scalar<0>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -353,7 +379,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_ed01b1>>(
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_b5c617>>(
             sycl::nd_range<3>(
                 sycl::range(1, (unsigned)n_q, (unsigned)s.n_head) *
                     sycl::range(1, 1, HD),
@@ -364,7 +390,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             });
     }
     /*
-    DPCT1010:451: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -383,8 +409,11 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
         std::fprintf(stderr, "qsa_decode_attn: unsupported geometry or missing buffers\n");
         std::exit(1);
     }
-    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr ? 1 : 0);
-    if (kv_mode == 2 ? (!pools.v_q4) : (kv_mode == 1 ? (!pools.v_q || !pools.k_scale || !pools.v_scale) : (!pools.k_pool || !pools.v_pool))) {
+    const int kv_mode = pools.k_q4 != nullptr ? 2 : (pools.k_q != nullptr && pools.v_q4 != nullptr ? 3
+                        : (pools.k_q != nullptr ? 1 : 0));
+    if (kv_mode == 3 ? (!pools.k_scale || !pools.v_q4)
+                     : (kv_mode == 2 ? (!pools.v_q4) : (kv_mode == 1 ? (!pools.v_q || !pools.k_scale || !pools.v_scale)
+                                                                     : (!pools.k_pool || !pools.v_pool)))) {
         std::fprintf(stderr, "qsa_decode_attn: incomplete KV pools\n");
         std::exit(1);
     }
@@ -395,13 +424,29 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
     const float scale = 1.0f / sqrtf((float) HD);
     const dpct::dim3 grid((unsigned)n_chunks, (unsigned)s.n_head_kv);
     dpct::queue_ptr st = strata::q_of(stream);
-    if (kv_mode == 2)
+    if (kv_mode == 3)
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
+
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_61a169,
+                                          dpct_kernel_scalar<3>>>(
+            sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                attn_chunk_kernel<3>(q, pools, ids, step, (int)s.n_head_kv,
+                                     (int)s.page_size, scale, part_acc, part_m,
+                                     part_l, n_chunks, 0, 0);
+            });
+    } else if (kv_mode == 2)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_bd420a,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f262e6,
                                           dpct_kernel_scalar<2>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -417,7 +462,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_19615d,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_4fd923,
                                           dpct_kernel_scalar<1>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -432,7 +477,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_bf0626,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f6855e,
                                           dpct_kernel_scalar<0>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -447,7 +492,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_814186>>(
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_a9568f>>(
             sycl::nd_range<3>(sycl::range(1, 1, (unsigned)s.n_head) *
                                   sycl::range(1, 1, HD),
                               sycl::range(1, 1, HD)),
@@ -456,7 +501,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             });
     }
     /*
-    DPCT1010:453: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index ea2c21be4d4..1f38376b0ba 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -5,11 +5,13 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/qsa_prompt_attn.hpp"
 #include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/kv_q4.hpp"
+
+#include <cmath>
 
 #include <cstdio>
 #include <cstdlib>
 #include <type_traits>
-#include <cmath>
 
 namespace strata::kernels {
 namespace {
@@ -25,7 +27,9 @@ constexpr int QS = HD + 8;        // q row stride in halves (bank-conflict-free
 
 // The MMA and cp.async below need sm_80. Builds for older cards (the experimental sm_75 one) compile them to a trap;
 // qsa_prompt_attn_batch refuses such a device at run time, so the old kernel runs there.
-#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
+#if defined(__HIPCC__)          // AMD: no mma.sync / cp.async; the host keeps the old kernel (below)
+#define STRATA_PA_SM80 0
+#elif 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
 #define STRATA_PA_SM80 1
 #else
 #define STRATA_PA_SM80 0
@@ -77,15 +81,20 @@ __dpct_inline__ uint32_t pack_h2(float lo_k,
 }
 
 // KV_MODE 1: int8 codes + fp16 scale per 64 values. KV_MODE 0: fp16 values (scales 1).
+// KV_MODE 3 (hybrid K8V4): K as mode 1, V as mode 0 - the row's q4_0 blocks are dequantized to fp16 at
+// gather, so everything downstream of the load is the mode-0 V path; the caller un-rotates the output.
 template <int KV_MODE>
 struct Smem {
-    using Elem =
+    using KElem =
+        typename std::conditional<KV_MODE == 0, sycl::half, int8_t>::type;
+    using VElem =
         typename std::conditional<KV_MODE == 1, int8_t, sycl::half>::type;
-    static constexpr int ROW = KV_MODE == 1 ? HD + 16 : HD + 8;   // elements; 16-byte aligned rows, banks spread
+    static constexpr int KROW = KV_MODE == 0 ? HD + 8 : HD + 16;   // elements; 16-byte aligned rows, banks spread
+    static constexpr int VROW = KV_MODE == 1 ? HD + 16 : HD + 8;
     sycl::half qh[16][QS];
     sycl::half ql[16][QS];
-    Elem k[CH][ROW];
-    Elem v[CH][ROW];
+    KElem k[CH][KROW];
+    VElem v[CH][VROW];
     float ks[CH][4];
     float vs[CH][4];
     float s[16][CH + 1];
@@ -98,7 +107,7 @@ struct Smem {
 
 template <int KV_MODE>
 /*
-DPCT1110:134: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 prompt_attn_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -118,7 +127,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
     attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
     ids += (size_t) qi * cap;
     /*
-    DPCT1098:727: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -134,7 +143,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
         qm = sycl::fmax(qm, sycl::fabs(q[i]));
 #pragma unroll
     /*
-    DPCT1108:135: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -144,7 +153,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                 qm, o));
     if (lane == 0) S.qmax[warp] = qm;
     /*
-    DPCT1065:733: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -153,7 +162,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017:728: The sycl::frexp call is used instead of the frexpf call. These
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
     two calls do not provide exactly the same functionality. Check the potential
     precision and/or performance issues for the generated code.
     */
@@ -176,9 +185,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                         .convert<float, sycl::rounding_mode::automatic>()[0])
                 .convert<sycl::half, sycl::rounding_mode::rte>()[0];
     }
-    if (t < 16) {
-        S.mrow[t] = -sycl::bit_cast<float, int>(0x7f800000U); S.lsum[t] = 0.0f;
-    }
+    if (t < 16) { S.mrow[t] = -INFINITY; S.lsum[t] = 0.0f; }
 
     float acc[8][4];
 #pragma unroll
@@ -196,46 +203,28 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
             S.row[t] = r;
         }
         /*
-        DPCT1118:136: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:735: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier(); // rows ready; the previous chunk's p.v is done with
                             // k, v, s
-        // gather the chunk's K and V rows (16-byte pieces) and their scales
+        // gather the chunk's K and V rows (16-byte pieces; K8V4's V as q4_0 blocks dequantized to fp16)
+        // and their scales
         {
-            constexpr int PIECES = HD * (int) sizeof(typename Smem<KV_MODE>::Elem) / 16;   // per row
-            for (int i = t; i < CH * PIECES; i += THREADS) {
-                const int c = i / PIECES, pc = i % PIECES;
+            constexpr int KPIECES = HD * (int) sizeof(typename Smem<KV_MODE>::KElem) / 16;   // per K row
+            for (int i = t; i < CH * KPIECES; i += THREADS) {
+                const int c = i / KPIECES, pc = i % KPIECES;
                 const long long r = S.row[c];
-                sycl::uint4 kx = sycl::uint4(0, 0, 0, 0), vx = kx;
+                sycl::uint4 kx = sycl::uint4(0, 0, 0, 0);
                 if (r >= 0) {
-                    if constexpr (KV_MODE == 1) {
-                        /*
-                        DPCT1098:729: The '*' expression is used instead of the
-                        __ldg call. These two expressions do not provide the
-                        exact same functionality. Check the generated code for
-                        potential precision and/or performance issues.
-                        */
-                        kx = *(reinterpret_cast<const sycl::uint4 *>(p.k_q +
-                                                                     r * HD) +
-                               pc);
-                        /*
-                        DPCT1098:730: The '*' expression is used instead of the
-                        __ldg call. These two expressions do not provide the
-                        exact same functionality. Check the generated code for
-                        potential precision and/or performance issues.
-                        */
-                        vx = *(reinterpret_cast<const sycl::uint4 *>(p.v_q +
-                                                                     r * HD) +
-                               pc);
-                    } else {
+                    if constexpr (KV_MODE == 0)
                         /*
-                        DPCT1098:731: The '*' expression is used instead of the
+                        DPCT1098: The '*' expression is used instead of the
                         __ldg call. These two expressions do not provide the
                         exact same functionality. Check the generated code for
                         potential precision and/or performance issues.
@@ -243,23 +232,87 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                         kx = *(reinterpret_cast<const sycl::uint4 *>(p.k_pool +
                                                                      r * HD) +
                                pc);
+                    else   // modes 1 and 3: the K side is INT8
                         /*
-                        DPCT1098:732: The '*' expression is used instead of the
+                        DPCT1098: The '*' expression is used instead of the
                         __ldg call. These two expressions do not provide the
                         exact same functionality. Check the generated code for
                         potential precision and/or performance issues.
                         */
-                        vx = *(reinterpret_cast<const sycl::uint4 *>(p.v_pool +
+                        kx = *(reinterpret_cast<const sycl::uint4 *>(p.k_q +
                                                                      r * HD) +
                                pc);
-                    }
                 }
                 *reinterpret_cast<sycl::uint4 *>(
                     reinterpret_cast<unsigned char *>(&S.k[c][0]) + pc * 16) =
                     kx;
-                *reinterpret_cast<sycl::uint4 *>(
-                    reinterpret_cast<unsigned char *>(&S.v[c][0]) + pc * 16) =
-                    vx;
+            }
+            if constexpr (KV_MODE == 3) {   // V: dequantize the row's q4_0 blocks straight into the fp16 V row
+                constexpr int BLKS = HD / QK4_0;
+                constexpr int BYTES = BLKS * (int) sizeof(block_q4_0);
+                for (int i = t; i < CH * BLKS; i += THREADS) {
+                    const int c = i / BLKS, b = i % BLKS;
+                    const long long r = S.row[c];
+#pragma unroll
+                    for (int j = 0; j < QK4_0; ++j)
+                        S.v[c][b * QK4_0 + j] = sycl::half(0);
+                    if (r >= 0) {
+                        const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + r * BYTES) + b;
+                        const float d =
+                            sycl::vec<sycl::half, 1>(
+                                sycl::bit_cast<sycl::half, unsigned short>(
+                                    blk->d))
+                                .convert<float,
+                                         sycl::rounding_mode::automatic>()[0];
+#pragma unroll
+                        for (int j = 0; j < QK4_0 / 2; ++j) {
+                            S.v[c][b * QK4_0 + j] =
+                                sycl::vec<float, 1>(
+                                    (float)((int)(blk->qs[j] & 0x0F) - 8) * d)
+                                    .convert<sycl::half,
+                                             sycl::rounding_mode::rte>()[0];
+                            S.v[c][b * QK4_0 + j + QK4_0 / 2] =
+                                sycl::vec<float, 1>(
+                                    (float)((int)(blk->qs[j] >> 4) - 8) * d)
+                                    .convert<sycl::half,
+                                             sycl::rounding_mode::rte>()[0];
+                        }
+                    }
+                }
+            } else {
+                constexpr int VPIECES = HD * (int) sizeof(typename Smem<KV_MODE>::VElem) / 16;   // per V row
+                for (int i = t; i < CH * VPIECES; i += THREADS) {
+                    const int c = i / VPIECES, pc = i % VPIECES;
+                    const long long r = S.row[c];
+                    sycl::uint4 vx = sycl::uint4(0, 0, 0, 0);
+                    if (r >= 0) {
+                        if constexpr (KV_MODE == 1)
+                            /*
+                            DPCT1098: The '*' expression is used instead of
+                            the __ldg call. These two expressions do not provide
+                            the exact same functionality. Check the generated
+                            code for potential precision and/or performance
+                            issues.
+                            */
+                            vx = *(reinterpret_cast<const sycl::uint4 *>(
+                                       p.v_q + r * HD) +
+                                   pc);
+                        else
+                            /*
+                            DPCT1098: The '*' expression is used instead of
+                            the __ldg call. These two expressions do not provide
+                            the exact same functionality. Check the generated
+                            code for potential precision and/or performance
+                            issues.
+                            */
+                            vx = *(reinterpret_cast<const sycl::uint4 *>(
+                                       p.v_pool + r * HD) +
+                                   pc);
+                    }
+                    *reinterpret_cast<sycl::uint4 *>(
+                        reinterpret_cast<unsigned char *>(&S.v[c][0]) +
+                        pc * 16) = vx;
+                }
             }
             for (int i = t; i < CH * 4; i += THREADS) {
                 const int c = i / 4, g = i % 4;
@@ -277,6 +330,13 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                                     p.v_scale[r * (HD / KV_Q8_GROUP) + g]))
                                 .convert<float,
                                          sycl::rounding_mode::automatic>()[0];
+                    } else if constexpr (KV_MODE == 3) {   // K as int8, V dequantized to fp16 (scale 1)
+                        a = sycl::vec<sycl::half, 1>(
+                                sycl::bit_cast<sycl::half, unsigned short>(
+                                    p.k_scale[r * (HD / KV_Q8_GROUP) + g]))
+                                .convert<float,
+                                         sycl::rounding_mode::automatic>()[0];
+                        b = 1.0f;
                     } else {
                         a = b = 1.0f;
                     }
@@ -286,11 +346,11 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
             }
         }
         /*
-        DPCT1118:137: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:736: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -315,7 +375,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                     al[1] = *reinterpret_cast<const uint32_t*>(&S.ql[gid + 8][k0 + 2 * tig]);
                     al[2] = *reinterpret_cast<const uint32_t*>(&S.ql[gid][k0 + 2 * tig + 8]);
                     al[3] = *reinterpret_cast<const uint32_t*>(&S.ql[gid + 8][k0 + 2 * tig + 8]);
-                    if constexpr (KV_MODE == 1) {
+                    if constexpr (KV_MODE != 0) {   // modes 1 and 3: the K side is INT8 codes
                         b[0] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(&S.k[cb + gid][k0 + 2 * tig]));
                         b[1] = i8x2_to_h2(*reinterpret_cast<const uint16_t*>(&S.k[cb + gid][k0 + 2 * tig + 8]));
                     } else {
@@ -334,23 +394,17 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                 sc[3] = sycl::fma(tg[3], (float)s1, sc[3]);
             }
             const int c = cb + 2 * tig;
-            S.s[gid][c] = c < nh ? sc[0] * qdown
-                                 : -sycl::bit_cast<float, int>(0x7f800000U);
-            S.s[gid][c + 1] = c + 1 < nh
-                                  ? sc[1] * qdown
-                                  : -sycl::bit_cast<float, int>(0x7f800000U);
-            S.s[gid + 8][c] = c < nh ? sc[2] * qdown
-                                     : -sycl::bit_cast<float, int>(0x7f800000U);
-            S.s[gid + 8][c + 1] =
-                c + 1 < nh ? sc[3] * qdown
-                           : -sycl::bit_cast<float, int>(0x7f800000U);
+            S.s[gid][c] = c < nh ? sc[0] * qdown : -INFINITY;
+            S.s[gid][c + 1] = c + 1 < nh ? sc[1] * qdown : -INFINITY;
+            S.s[gid + 8][c] = c < nh ? sc[2] * qdown : -INFINITY;
+            S.s[gid + 8][c + 1] = c + 1 < nh ? sc[3] * qdown : -INFINITY;
         }
         /*
-        DPCT1118:138: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:737: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -359,14 +413,14 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
         {
             constexpr int PER = CH / 8;
             const int r = t >> 3, sub = t & 7;
-            float x[PER], mx = -sycl::bit_cast<float, int>(0x7f800000U);
+            float x[PER], mx = -INFINITY;
 #pragma unroll
             for (int j = 0; j < PER; ++j) {
                 x[j] = S.s[r][sub * PER + j]; mx = sycl::fmax(mx, x[j]);
             }
 #pragma unroll
             /*
-            DPCT1108:140: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -380,15 +434,14 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
             float sum = 0.0f;
 #pragma unroll
             for (int j = 0; j < PER; ++j) {
-                const float e = x[j] == -sycl::bit_cast<float, int>(0x7f800000U)
-                                    ? 0.0f
-                                    : sycl::exp2(x[j] - m_new);
+                const float e =
+                    x[j] == -INFINITY ? 0.0f : sycl::exp2(x[j] - m_new);
                 S.s[r][sub * PER + j] = e;
                 sum += e;
             }
 #pragma unroll
             /*
-            DPCT1108:141: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -400,20 +453,18 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                 sycl::ext::oneapi::this_work_item::get_sub_group());
             if (sub == 0) {
                 const float a =
-                    m_old == -sycl::bit_cast<float, int>(0x7f800000U)
-                        ? 0.0f
-                        : sycl::exp2(m_old - m_new);
+                    m_old == -INFINITY ? 0.0f : sycl::exp2(m_old - m_new);
                 S.alpha[r] = a;
                 S.lsum[r] = sycl::fma(S.lsum[r], (float)a, sum);
                 S.mrow[r] = m_new;
             }
         }
         /*
-        DPCT1118:139: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:738: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -428,7 +479,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                 vmax = sycl::fmax(vmax, S.vs[c][warp]);
 #pragma unroll
             /*
-            DPCT1108:142: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -506,7 +557,7 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
         }
     }
     /*
-    DPCT1065:734: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -552,7 +603,7 @@ __dpct_inline__ void cp_async16(void *smem, const void *gmem, bool valid) {
 #else
     auto sa = smem;
     /*
-    DPCT1053:143: Migration of device assembly code is not supported.
+    DPCT1053: Migration of device assembly code is not supported.
     */
     asm volatile("cp.async.cg.shared.global [%0], [%1], 16, %2;\n" ::"r"(sa),
                  "l"(gmem), "r"(valid ? 16 : 0));
@@ -578,7 +629,7 @@ __dpct_inline__ void cp_async_wait1() {
 }
 
 /*
-DPCT1110:146: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 prompt_attn_i8_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -598,7 +649,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
     attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
     ids += (size_t) qi * cap;
     /*
-    DPCT1098:741: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -614,7 +665,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
         qm = sycl::fmax(qm, sycl::fabs(q[i]));
 #pragma unroll
     /*
-    DPCT1108:147: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -623,11 +674,9 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                 0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 qm, o));
     if (lane == 0) S.qmax[warp] = qm;
-    if (t < 16) {
-        S.mrow[t] = -sycl::bit_cast<float, int>(0x7f800000U); S.lsum[t] = 0.0f;
-    }
+    if (t < 16) { S.mrow[t] = -INFINITY; S.lsum[t] = 0.0f; }
     /*
-    DPCT1065:739: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -636,7 +685,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017:742: The sycl::frexp call is used instead of the frexpf call. These
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
     two calls do not provide exactly the same functionality. Check the potential
     precision and/or performance issues for the generated code.
     */
@@ -672,7 +721,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
     // the chunk pipeline: cells two chunks ahead, their pool rows one chunk ahead, the data (cp.async) one ahead
     const int n_chunks = (n + CH2 - 1) / CH2;
     /*
-    DPCT1098:743: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -682,7 +731,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
     auto row_of = [&](int cell) -> long long {
         if (cell < 0) return -1;
         /*
-        DPCT1098:744: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -694,12 +743,12 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
         for (int j = 0; j < 4; ++j) {
             const int idx = lane + 32 * j, cell = idx >> 2, pc = idx & 3;
             /*
-            DPCT1108:148: '__shfl_sync' was migrated with the experimental
+            DPCT1108: '__shfl_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
             /*
-            DPCT1121:149: Make sure that the "r" which is used in the SYCL group
+            DPCT1121: Make sure that the "r" which is used in the SYCL group
             function/algorithm is initialized.
             */
             const long long rr = dpct::experimental::select_from_sub_group(
@@ -711,7 +760,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
             cp_async16(&S.kv[st][warp][1][0][0] + swz(cell, pc * 16), p.v_q + off, ok);
         }
         /*
-        DPCT1098:745: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -721,7 +770,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                            .convert<float, sycl::rounding_mode::automatic>()[0]
                      : 0.0f;
         /*
-        DPCT1098:746: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -775,11 +824,11 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
             S.part[warp][gid + 8][c + 1] = tg[3] * s1;
         }
         /*
-        DPCT1118:150: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:747: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -787,20 +836,17 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
         // online softmax over the four groups' sum (fixed order): row t/8, 4 cells per thread
         {
             const int r = t >> 3, sub = t & 7;
-            float x[4], mx = -sycl::bit_cast<float, int>(0x7f800000U);
+            float x[4], mx = -INFINITY;
 #pragma unroll
             for (int j = 0; j < 4; ++j) {
                 const int c = sub * 4 + j;
-                x[j] = c0 + c < n ? (((S.part[0][r][c] + S.part[1][r][c]) +
-                                      S.part[2][r][c]) +
-                                     S.part[3][r][c]) *
-                                        qdown
-                                  : -sycl::bit_cast<float, int>(0x7f800000U);
+                x[j] = c0 + c < n ? (((S.part[0][r][c] + S.part[1][r][c]) + S.part[2][r][c]) + S.part[3][r][c]) * qdown
+                                  : -INFINITY;
                 mx = sycl::fmax(mx, x[j]);
             }
 #pragma unroll
             /*
-            DPCT1108:152: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -814,15 +860,14 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
             float sum = 0.0f;
 #pragma unroll
             for (int j = 0; j < 4; ++j) {
-                const float e = x[j] == -sycl::bit_cast<float, int>(0x7f800000U)
-                                    ? 0.0f
-                                    : sycl::exp2(x[j] - m_new);
+                const float e =
+                    x[j] == -INFINITY ? 0.0f : sycl::exp2(x[j] - m_new);
                 S.p[r][sub * 4 + j] = e;
                 sum += e;
             }
 #pragma unroll
             /*
-            DPCT1108:153: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -834,20 +879,18 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                 sycl::ext::oneapi::this_work_item::get_sub_group());
             if (sub == 0) {
                 const float a =
-                    m_old == -sycl::bit_cast<float, int>(0x7f800000U)
-                        ? 0.0f
-                        : sycl::exp2(m_old - m_new);
+                    m_old == -INFINITY ? 0.0f : sycl::exp2(m_old - m_new);
                 S.alpha[r] = a;
                 S.lsum[r] = sycl::fma(S.lsum[r], (float)a, sum);
                 S.mrow[r] = m_new;
             }
         }
         /*
-        DPCT1118:151: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:748: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -857,7 +900,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
             float vmax = S.sc[st][warp][1][lane];
 #pragma unroll
             /*
-            DPCT1108:154: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -929,7 +972,7 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
         sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
     }
     /*
-    DPCT1065:740: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -955,7 +998,7 @@ bool launch_i8(const float *q, const QsaAttnPools &pools, const int32_t *ids,
     int dev = 0;
     dev = dpct::get_current_device_id();
     /*
-    DPCT1083:155: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -963,12 +1006,12 @@ bool launch_i8(const float *q, const QsaAttnPools &pools, const int32_t *ids,
     if (dev < 0 || dev >= 64) return false;
     if (!attr[dev]) {
         /*
-        DPCT1027:749: The call to cudaFuncSetAttribute was replaced with 0
+        DPCT1027: The call to cudaFuncSetAttribute was replaced with 0
         because SYCL currently does not support corresponding setting.
         */
         if (0 != 0) {
             /*
-            DPCT1026:750: The call to cudaGetLastError was removed because this
+            DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
             */
             return false;
@@ -994,7 +1037,7 @@ bool launch_i8(const float *q, const QsaAttnPools &pools, const int32_t *ids,
                 auto attn_q0_s_n_head_HD_ct7 = attn + q0 * s.n_head * HD;
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class prompt_attn_i8_kernel_4540c2>>(
+                    dpct_kernel_name<class prompt_attn_i8_kernel_c3d463>>(
                     sycl::nd_range<3>(
                         sycl::range(1, (unsigned)s.n_head_kv, (unsigned)nb) *
                             sycl::range(1, 1, THREADS),
@@ -1015,7 +1058,7 @@ bool launch_i8(const float *q, const QsaAttnPools &pools, const int32_t *ids,
         }
     }
     /*
-    DPCT1010:751: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -1037,7 +1080,7 @@ bool launch(const float *q, const QsaAttnPools &pools, const int32_t *ids,
     int dev = 0;
     dev = dpct::get_current_device_id();
     /*
-    DPCT1083:156: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -1045,12 +1088,12 @@ bool launch(const float *q, const QsaAttnPools &pools, const int32_t *ids,
     if (dev < 0 || dev >= 64) return false;
     if (!attr[dev]) {
         /*
-        DPCT1027:756: The call to cudaFuncSetAttribute was replaced with 0
+        DPCT1027: The call to cudaFuncSetAttribute was replaced with 0
         because SYCL currently does not support corresponding setting.
         */
         if (0 != 0) {
             /*
-            DPCT1026:753: The call to cudaGetLastError was removed because this
+            DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
             */
             return false;
@@ -1076,7 +1119,7 @@ bool launch(const float *q, const QsaAttnPools &pools, const int32_t *ids,
                 auto attn_q0_s_n_head_HD_ct7 = attn + q0 * s.n_head * HD;
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class prompt_attn_kernel_410441,
+                    dpct_kernel_name<class prompt_attn_kernel_e09b15,
                                      dpct_kernel_scalar<KV_MODE>>>(
                     sycl::nd_range<3>(
                         sycl::range(1, (unsigned)s.n_head_kv, (unsigned)nb) *
@@ -1098,7 +1141,7 @@ bool launch(const float *q, const QsaAttnPools &pools, const int32_t *ids,
         }
     }
     /*
-    DPCT1010:754: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -1123,7 +1166,7 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
         static int cc_major[64] = {};
         int dev = 0;
         /*
-        DPCT1026:757: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 ||
@@ -1135,7 +1178,7 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
             if (DPCT_CHECK_ERROR(
                     major = dpct::get_device(dev).get_major_version()) != 0) {
                 /*
-                DPCT1026:758: The call to cudaGetLastError was removed because
+                DPCT1026: The call to cudaGetLastError was removed because
                 this functionality is redundant in SYCL.
                 */
                 return false;
@@ -1145,10 +1188,17 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
         (void) cc_major[dev];
         return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
     }
+#if defined(__HIPCC__)
+    return false;   // the tensor-core kernel is compiled out on AMD (its major version is not a CUDA sm)
+#endif
     if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids ||
         !steps || !pools.page_table)
         return false;
     dpct::queue_ptr st = strata::q_of(stream);
+    if (pools.k_q != nullptr && pools.v_q4 != nullptr) {   // hybrid K8V4: int8 K + dequantized-q4 V
+        if (!pools.k_scale) return false;
+        return launch<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
     if (pools.k_q != nullptr) {
         if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
         // STRATA_PROMPT_ATTN_V1=1 (debug): the first version, same accuracy, another summation order - the control
diff --git a/sycl/src/kernels/cuda/qsa_select.dp.cpp b/sycl/src/kernels/cuda/qsa_select.dp.cpp
index 676a89930a6..91ef8f69502 100644
--- a/sycl/src/kernels/cuda/qsa_select.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_select.dp.cpp
@@ -50,7 +50,7 @@ __dpct_inline__ void block_scores_kernel(const float *__restrict__ pooled,
                   k4.w() * q4.w();
 #pragma unroll
         /*
-        DPCT1108:112: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -67,7 +67,7 @@ __dpct_inline__ void block_scores_kernel(const float *__restrict__ pooled,
 }
 
 /*
-DPCT1110:113: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 block_topk_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -111,11 +111,11 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
 #pragma unroll
         for (int i = t; i < 256; i += TOPK_T) hist[i] = 0;
         /*
-        DPCT1118:114: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:610: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -130,11 +130,11 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
                 &hist[(k >> shift) & 255], w);
         }
         /*
-        DPCT1118:115: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:611: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -150,11 +150,11 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
             s_above = cum;
         }
         /*
-        DPCT1118:116: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:612: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -162,11 +162,11 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
         prefix |= (uint32_t) s_digit << shift;
         above = s_above;
         /*
-        DPCT1118:117: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:613: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -186,7 +186,7 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
     s_a[t] = gt;
     s_b[t] = eq;
     /*
-    DPCT1065:605: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -200,7 +200,7 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
         }
     }
     /*
-    DPCT1065:606: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -211,14 +211,14 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
     if (my_eq > eq) my_eq = eq;
     const int sel = gt + (int) my_eq;
     /*
-    DPCT1065:607: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     s_a[t] = sel;
     /*
-    DPCT1065:608: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -228,7 +228,7 @@ auto &hist = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[256]>(
         for (int i = 0; i < TOPK_T; ++i) { const int c = s_a[i]; s_a[i] = a; a += c; }
     }
     /*
-    DPCT1065:609: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -263,7 +263,9 @@ constexpr int TC_QS = IDX_HEADS * IDX_DIM + 4;   // query row stride in floats
 constexpr int TC_KS = IDX_DIM + 4;               // key row stride
 
 // TF32 conversion and MMA need sm_80: below it they compile to a trap and qsa_block_scores_tc refuses the device
-#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
+#if defined(__HIPCC__)          // AMD: no mma.sync / cp.async; the host keeps the warp kernel (below)
+#define STRATA_SEL_SM80 0
+#elif 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
 #define STRATA_SEL_SM80 1
 #else
 #define STRATA_SEL_SM80 0
@@ -272,7 +274,7 @@ __dpct_inline__ uint32_t tf32_hi(float x) {
 #if STRATA_SEL_SM80
     uint32_t r;
     /*
-    DPCT1053:118: Migration of device assembly code is not supported.
+    DPCT1053: Migration of device assembly code is not supported.
     */
     asm("cvt.rna.tf32.f32 %0, %1;" : "=r"(r) : "f"(x));
     return r;
@@ -285,7 +287,7 @@ __dpct_inline__ void mma_tf32(float *c, const uint32_t *a, const uint32_t *b) {
     /* unreachable on SYCL: the launcher refuses this device */
 #else
     /*
-    DPCT1053:119: Migration of device assembly code is not supported.
+    DPCT1053: Migration of device assembly code is not supported.
     */
     asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 "
                  "{%0,%1,%2,%3}, {%4,%5,%6,%7}, {%8,%9}, "
@@ -297,7 +299,7 @@ __dpct_inline__ void mma_tf32(float *c, const uint32_t *a, const uint32_t *b) {
 }
 
 /*
-DPCT1110:120: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 block_scores_tc_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -337,11 +339,11 @@ __dpct_inline__ void block_scores_tc_kernel(
             ((int64_t)item_ct1.get_group(2) * TC_ITER + it) * TC_NB;
         if (b0 >= reach || b0 >= hi_nbid) break;      // blocks >= every query's n_bid: nothing to score
         /*
-        DPCT1118:121: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:614: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -354,11 +356,11 @@ __dpct_inline__ void block_scores_tc_kernel(
             *reinterpret_cast<sycl::float4 *>(sK + r * TC_KS + c * 4) = v;
         }
         /*
-        DPCT1118:122: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:615: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -439,7 +441,7 @@ __dpct_inline__ void block_scores_tail_kernel(const float *__restrict__ dead,
                   k4.w() * q4.w();
 #pragma unroll
         /*
-        DPCT1108:123: '__shfl_xor_sync' was migrated with the experimental
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -469,7 +471,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
 #pragma unroll
     for (int o = 1; o < 32; o <<= 1) {
         /*
-        DPCT1108:124: '__shfl_up_sync' was migrated with the experimental
+        DPCT1108: '__shfl_up_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -480,7 +482,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
     }
     if (lane == 31) s_warp[warp] = x;
     /*
-    DPCT1065:616: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -491,7 +493,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
 #pragma unroll
         for (int o = 1; o < 32; o <<= 1) {
             /*
-            DPCT1108:125: '__shfl_up_sync' was migrated with the experimental
+            DPCT1108: '__shfl_up_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -504,7 +506,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
         if (lane == 31) s_warp[32] = z;     // total
     }
     /*
-    DPCT1065:617: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -512,7 +514,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
     const int r = s_warp[warp] + x - v;
     total = s_warp[32];
     /*
-    DPCT1065:618: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -521,7 +523,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
 }
 
 /*
-DPCT1110:126: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 block_topk_reg_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -578,11 +580,11 @@ auto &hist =
                     &hist[warp][(key[j] >> shift) & 255], w);
         }
         /*
-        DPCT1118:127: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:619: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -594,11 +596,11 @@ auto &hist =
             hist[0][t] = s;
         }
         /*
-        DPCT1118:128: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:620: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -614,11 +616,11 @@ auto &hist =
             s_above = cum;
         }
         /*
-        DPCT1118:129: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:621: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -626,11 +628,11 @@ auto &hist =
         prefix |= (uint32_t) s_digit << shift;
         above = s_above;
         /*
-        DPCT1118:130: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:622: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -691,7 +693,7 @@ void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class block_scores_kernel_8916c5>>(
+            ->parallel_for<dpct_kernel_name<class block_scores_kernel_6f5935>>(
                 sycl::nd_range<3>(grid * sycl::range(1, 1, SCORE_WARPS * 32),
                                   sycl::range(1, 1, SCORE_WARPS * 32)),
                 exp_props,
@@ -702,13 +704,13 @@ void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx
                     });
     }
     /*
-    DPCT1010:623: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:624: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -724,7 +726,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
         static int cc_major[64] = {};
         int dev = 0;
         /*
-        DPCT1026:625: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 ||
@@ -736,7 +738,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
             if (DPCT_CHECK_ERROR(
                     major = dpct::get_device(dev).get_major_version()) != 0) {
                 /*
-                DPCT1026:626: The call to cudaGetLastError was removed because
+                DPCT1026: The call to cudaGetLastError was removed because
                 this functionality is redundant in SYCL.
                 */
                 return false;
@@ -746,23 +748,26 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
         (void) cc_major[dev];
         return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
     }
+#if defined(__HIPCC__)
+    return false;   // the tensor-core kernel is compiled out on AMD (its major version is not a CUDA sm)
+#endif
     static bool attr[64] = {};   // the shared-memory opt-in is per device (a layer split runs it on several)
     int adev = 0;
     adev = dpct::get_current_device_id();
     /*
-    DPCT1083:131: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
     const int bytes = (TC_QT * TC_QS + TC_NB * TC_KS) * (int)sizeof(float);
     if (!attr[adev]) {
         /*
-        DPCT1027:627: The call to cudaFuncSetAttribute was replaced with 0
+        DPCT1027: The call to cudaFuncSetAttribute was replaced with 0
         because SYCL currently does not support corresponding setting.
         */
         if (0 != 0) {
             /*
-            DPCT1026:628: The call to cudaGetLastError was removed because this
+            DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
             */
             return false;
@@ -783,7 +788,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
                     sycl::range(bytes), cgh);
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class block_scores_tc_kernel_236d56>>(
+                    dpct_kernel_name<class block_scores_tc_kernel_f08b24>>(
                     sycl::nd_range<3>(grid * sycl::range(1, 1, 128),
                                       sycl::range(1, 1, 128)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
@@ -801,7 +806,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class block_scores_tail_kernel_79a8ce>>(
+                dpct_kernel_name<class block_scores_tail_kernel_8303e7>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, 32),
                                   sycl::range(1, 1, 32)),
@@ -813,13 +818,13 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
                     });
     }
     /*
-    DPCT1010:629: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:630: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -844,7 +849,7 @@ void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class block_topk_kernel_52e176>>(
+            ->parallel_for<dpct_kernel_name<class block_topk_kernel_409264>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, TOPK_T),
                                   sycl::range(1, 1, TOPK_T)),
@@ -853,13 +858,13 @@ void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, i
                 });
     }
     /*
-    DPCT1010:631: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:632: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -880,7 +885,7 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
         std::exit(1);
     }
     /*
-    DPCT1049:132: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -890,7 +895,7 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class block_topk_reg_kernel_f7046a>>(
+                dpct_kernel_name<class block_topk_reg_kernel_a867d1>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, TK_T),
                                   sycl::range(1, 1, TK_T)),
@@ -902,13 +907,13 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
                     });
     }
     /*
-    DPCT1010:633: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:634: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
diff --git a/sycl/src/kernels/cuda/quantize_act.dp.cpp b/sycl/src/kernels/cuda/quantize_act.dp.cpp
index 480da5b78bb..ec13c7dd449 100644
--- a/sycl/src/kernels/cuda/quantize_act.dp.cpp
+++ b/sycl/src/kernels/cuda/quantize_act.dp.cpp
@@ -221,7 +221,7 @@ __dpct_inline__ void quantize_q8_K_kernel(const float *__restrict__ x,
         // from the reference in 1 element of 524,288 for exactly this reason, and `__fmul_rn` pins the
         // rounding step the source actually performs.
         /*
-        DPCT1013:1066: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
@@ -284,7 +284,7 @@ void quantize_q8_0(const float* x, uint8_t* blocks, int64_t n, void* stream) {
                 });
     }
     /*
-    DPCT1010:1067: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -324,7 +324,7 @@ void quantize_q8_0_scaled(const float* x, uint8_t* blocks, float* scales, int64_
                 });
     }
     /*
-    DPCT1010:1069: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -352,7 +352,7 @@ void dequant_q8_0(const uint8_t* blocks, float* x, int64_t n, void* stream) {
                 });
     }
     /*
-    DPCT1010:1071: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -384,7 +384,7 @@ void quantize_q8_K(const float* x, uint8_t* blocks, int64_t n, void* stream) {
                 });
     }
     /*
-    DPCT1010:1073: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -412,7 +412,7 @@ void dequant_q8_K(const uint8_t* blocks, float* x, int64_t n, void* stream) {
                 });
     }
     /*
-    DPCT1010:1075: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/rope.dp.cpp b/sycl/src/kernels/cuda/rope.dp.cpp
index dfb8847269e..b11777b96e0 100644
--- a/sycl/src/kernels/cuda/rope.dp.cpp
+++ b/sycl/src/kernels/cuda/rope.dp.cpp
@@ -112,7 +112,7 @@ void rope_neox_apply(const float* x, float* out, int64_t rows, int head_dim, int
             });
     }
     /*
-    DPCT1010:455: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/router_top10.dp.cpp b/sycl/src/kernels/cuda/router_top10.dp.cpp
index 3bdaf09d0f0..b91748e729d 100644
--- a/sycl/src/kernels/cuda/router_top10.dp.cpp
+++ b/sycl/src/kernels/cuda/router_top10.dp.cpp
@@ -69,7 +69,7 @@ constexpr int RT_MAX_THREADS = 512;
 /// One BLOCK per token, so the reductions have somewhere to happen.  `n_tokens` is 1 in decode; the grid keeps
 /// the batch case working without a second code path.
 /*
-DPCT1110:101: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 router_top10_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -107,7 +107,7 @@ __dpct_inline__ void router_top10_kernel(const float *__restrict__ logits,
 #pragma unroll
     for (int e = tid; e < n_expert; e += nt) mx = sycl::fmax(mx, l[e]);
     /*
-DPCT1108:102: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -118,7 +118,7 @@ runtimes. You may need to adjust the code.
                 mx, off));
     if ((tid & 31) == 0) s_red[tid >> 5] = mx;
     /*
-    DPCT1065:526: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -127,7 +127,7 @@ runtimes. You may need to adjust the code.
         const int nw = (nt + 31) >> 5;
         float v = (tid < nw) ? s_red[tid] : -INFINITY;
         /*
-DPCT1108:103: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -139,7 +139,7 @@ runtimes. You may need to adjust the code.
         if (tid == 0) s_red[0] = v;
     }
     /*
-    DPCT1065:527: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -152,7 +152,7 @@ runtimes. You may need to adjust the code.
     for (int e = tid; e < n_expert; e += nt)
         s_ex[e] = sycl::exp((double)l[e] - (double)mx);
     /*
-    DPCT1065:528: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -166,7 +166,7 @@ runtimes. You may need to adjust the code.
         s_sum = sum;
     }
     /*
-    DPCT1065:529: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -186,7 +186,7 @@ runtimes. You may need to adjust the code.
 #pragma unroll
     for (int e = tid; e < n_expert; e += nt) s_p[e] = (float)(s_ex[e] * inv);
     /*
-    DPCT1065:530: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -207,7 +207,7 @@ runtimes. You may need to adjust the code.
 #pragma unroll
     for (int e = tid; e < n_expert; e += nt) s_taken[e] = 0;
     /*
-    DPCT1065:531: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -223,7 +223,7 @@ runtimes. You may need to adjust the code.
         }
         for (int off = 16; off > 0; off >>= 1) {
             /*
-            DPCT1108:106: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -231,7 +231,7 @@ runtimes. You may need to adjust the code.
                 0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 bv, off);
             /*
-            DPCT1108:107: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -242,11 +242,11 @@ runtimes. You may need to adjust the code.
         }
         if ((tid & 31) == 0) { s_red[tid >> 5] = bv; s_rid[tid >> 5] = bi; }
         /*
-        DPCT1118:104: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:533: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -257,7 +257,7 @@ runtimes. You may need to adjust the code.
             int ix = (tid < nw) ? s_rid[tid] : n_expert;
             for (int off = 16; off > 0; off >>= 1) {
                 /*
-                DPCT1108:108: '__shfl_down_sync' was migrated with the
+                DPCT1108: '__shfl_down_sync' was migrated with the
                 experimental feature masked sub_group function which may not be
                 supported by all compilers or runtimes. You may need to adjust
                 the code.
@@ -266,7 +266,7 @@ runtimes. You may need to adjust the code.
                     0xffffffffu,
                     sycl::ext::oneapi::this_work_item::get_sub_group(), v, off);
                 /*
-                DPCT1108:109: '__shfl_down_sync' was migrated with the
+                DPCT1108: '__shfl_down_sync' was migrated with the
                 experimental feature masked sub_group function which may not be
                 supported by all compilers or runtimes. You may need to adjust
                 the code.
@@ -284,18 +284,18 @@ runtimes. You may need to adjust the code.
             }
         }
         /*
-        DPCT1118:105: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:534: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
     }
     /*
-    DPCT1065:532: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -334,14 +334,14 @@ void router_top10(const float *logits, int n_tokens, int n_expert, int k,
     const size_t taken_bytes = ((size_t) n_expert + 15u) & ~(size_t) 15u;
     const size_t smem =
         /*
-        DPCT1083:111: The size of local memory in the migrated code may be
+        DPCT1083: The size of local memory in the migrated code may be
         different from the original code. Check that the allocated memory size
         in the migrated code is correct.
         */
         taken_bytes + (size_t)n_expert * sizeof(double) +
         (size_t)n_expert * sizeof(float);
     /*
-    DPCT1049:110: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -374,7 +374,7 @@ void router_top10(const float *logits, int n_tokens, int n_expert, int k,
             });
     }
     /*
-    DPCT1010:535: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
index 7b1e587ba40..0098de164a9 100644
--- a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
@@ -106,12 +106,12 @@ row_dot_s2_q8(const uint8_t *__restrict__ codes,
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
     /*
-    DPCT1108:282: '__shfl_down_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
     /*
-    DPCT1121:283: Make sure that the "v" which is used in the SYCL group
+    DPCT1121: Make sure that the "v" which is used in the SYCL group
     function/algorithm is initialized.
     */
     for (int off = 16; off > 0; off >>= 1) v +=
@@ -237,7 +237,7 @@ __dpct_inline__ void activation_correction_kernel(const uint8_t *q8,
 #pragma unroll
     for (int j = 0; j < 32; ++j) sum += q[j];
     /*
-    DPCT1013:1077: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -267,14 +267,14 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
         const int hi = dot4(codes + b * 16 + 8 + lane,
                            (const int8_t*) (xq + (size_t) (2 * b + 1) * 34 + 2) + lane * 4);
         /*
-        DPCT1013:1078: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
         */
         acc = sycl::fma(d * xs[2 * b], (float)lo, acc);
         /*
-        DPCT1013:1079: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
@@ -282,7 +282,7 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
         acc = sycl::fma(d * xs[2 * b + 1], (float)hi, acc);
         if (lane == 0)
             /*
-            DPCT1013:1080: The rounding mode could not be specified and the
+            DPCT1013: The rounding mode could not be specified and the
             generated code may have different accuracy than the original code.
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
@@ -293,12 +293,12 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
     // a standard shuffle tree in the order 4, 2, 1 is a different floating-point expression.
     constexpr unsigned mask = 0xffffffffu;
     /*
-    DPCT1108:284: '__shfl_down_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
     /*
-    DPCT1013:1081: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -307,12 +307,12 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
                     mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
                     acc, 4, 8);
     /*
-    DPCT1108:285: '__shfl_down_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
     /*
-    DPCT1013:1082: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -321,12 +321,12 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
                     mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
                     acc, 1, 8);
     /*
-    DPCT1108:286: '__shfl_down_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
     /*
-    DPCT1013:1083: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -335,7 +335,7 @@ __dpct_inline__ float row_dot_cpu_order(const uint8_t *codes,
                     mask, sycl::ext::oneapi::this_work_item::get_sub_group(),
                     acc, 2, 8);
     /*
-    DPCT1013:1084: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -380,7 +380,7 @@ __dpct_inline__ void cpu_order_swiglu_kernel(float *gu, int pairs) {
     // CPU/GPU libc last-bit differences are diagnosed separately by the micro, not hidden with FP64 here.
     const float eg = sycl::native::exp(-g);
     /*
-    DPCT1013:1085: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -401,14 +401,14 @@ __dpct_inline__ void cpu_order_quantize_kernel(const float *x, uint8_t *blocks,
 #pragma unroll
     for (int j = 0; j < 32; ++j) amax = sycl::fmax(amax, sycl::fabs(xb[j]));
     /*
-    DPCT1013:1086: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
     */
     const float s = amax > 0.0f ? amax / 127.0f : 0.0f;
     /*
-    DPCT1013:1087: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -423,14 +423,14 @@ __dpct_inline__ void cpu_order_quantize_kernel(const float *x, uint8_t *blocks,
     int sum = 0;
     for (int j = 0; j < 32; ++j) {
         /*
-        DPCT1013:1088: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
         */
         const float t = xb[j] * inv;
         /*
-        DPCT1013:1089: The rounding mode could not be specified and the
+        DPCT1013: The rounding mode could not be specified and the
         generated code may have different accuracy than the original code.
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
@@ -441,7 +441,7 @@ __dpct_inline__ void cpu_order_quantize_kernel(const float *x, uint8_t *blocks,
         sum += v;
     }
     /*
-    DPCT1013:1090: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -453,7 +453,7 @@ constexpr int THREADS = 256;
 
 void check(const char* who, void* stream) {
     /*
-    DPCT1010:1091: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -896,7 +896,7 @@ __dpct_inline__ float chunk_dot(sycl::uint2 cb, const int *xw, float dw,
 // its fp32 scales) are staged once into shared memory as aligned words; each warp then walks its rows, loading
 // each lane's code chunks once and dotting them with every entry.
 /*
-DPCT1110:287: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gu_grouped_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -1269,7 +1269,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
     check("cpu_order/gate_up", stream);
     if (gate_up_trace != nullptr &&
         /*
-        DPCT1124:1093: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
index 4014fdfb65b..0da3d67c93e 100644
--- a/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_gemv_fast.dp.cpp
@@ -73,7 +73,7 @@ catch (sycl::exception const &exc) {
 // configurations and the bench can measure them against each other with nothing else changed.
 template <bool STAGE_X>
 /*
-DPCT1110:224: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 s2_gemv_fast_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -98,7 +98,7 @@ __dpct_inline__ void s2_gemv_fast_kernel(
 #pragma unroll
         for (long long i = tid; i < n_in; i += threads_per_row) sx[i] = xh[i];
         /*
-        DPCT1118:225: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -142,7 +142,7 @@ __dpct_inline__ void s2_gemv_fast_kernel(
     for (int step = threads_per_row / 2; step > 0; step >>= 1) {
         if (tid < step) partial[tid] += partial[tid + step];
         /*
-        DPCT1118:226: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -167,7 +167,7 @@ void s2_gemv_fast(const uint16_t *x, const uint8_t *codes, const float *scales,
         std::exit(1);
     }
     /*
-    DPCT1083:228: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -175,7 +175,7 @@ void s2_gemv_fast(const uint16_t *x, const uint8_t *codes, const float *scales,
                         (size_t)threads_per_row * sizeof(float);
     if (stage_x) {
         /*
-        DPCT1049:227: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -207,7 +207,7 @@ void s2_gemv_fast(const uint16_t *x, const uint8_t *codes, const float *scales,
         });
     } else {
         /*
-        DPCT1049:229: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
diff --git a/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
index 0be7d4ce58a..f8cf26fe338 100644
--- a/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_gemv_q8.dp.cpp
@@ -77,7 +77,7 @@ __dpct_inline__ void s2_gemv_q8_kernel(const uint8_t *__restrict__ act,
     for (int step = threads_per_row / 2; step > 0; step >>= 1) {
         if (tid < step) partial[tid] += partial[tid + step];
         /*
-        DPCT1118:47: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -95,13 +95,13 @@ void s2_gemv_q8(const uint8_t* act, const uint8_t* codes, const float* scales, f
         std::exit(1);
     }
     /*
-    DPCT1083:49: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
     const size_t smem = (size_t)threads_per_row * sizeof(float);
     /*
-    DPCT1049:48: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -129,7 +129,7 @@ void s2_gemv_q8(const uint8_t* act, const uint8_t* codes, const float* scales, f
             });
     }
     /*
-    DPCT1010:367: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp b/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
index 3a267ad4cb9..1e4a5a5d04c 100644
--- a/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_gemv_quads.dp.cpp
@@ -73,7 +73,7 @@ __dpct_inline__ void s2_gemv_quads_kernel(const uint16_t *__restrict__ x,
     for (int step = threads_per_row / 2; step > 0; step >>= 1) {
         if (tid < step) partial[tid] += partial[tid + step];
         /*
-        DPCT1118:268: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -92,13 +92,13 @@ void s2_gemv_quads(const uint16_t *x, const uint8_t *codes, const float *scales,
         std::exit(1);
     }
     /*
-    DPCT1083:270: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
     const size_t smem = (size_t)threads_per_row * sizeof(float);
     /*
-    DPCT1049:269: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
diff --git a/sycl/src/kernels/cuda/s_gemv.dp.cpp b/sycl/src/kernels/cuda/s_gemv.dp.cpp
index d61cd144bed..64eb51317eb 100644
--- a/sycl/src/kernels/cuda/s_gemv.dp.cpp
+++ b/sycl/src/kernels/cuda/s_gemv.dp.cpp
@@ -62,7 +62,7 @@ constexpr int Q8K_BLOCK_ELEMS = 256;
 __dpct_inline__ float q8k_at(const uint8_t *__restrict__ x, long long i) {
     const uint8_t* blk = x + (i / Q8K_BLOCK_ELEMS) * Q8K_BLOCK_BYTES;
     /*
-    DPCT1098:301: The '*' expression is used instead of the __ldg call. These
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
     two expressions do not provide the exact same functionality. Check the
     generated code for potential precision and/or performance issues.
     */
@@ -160,7 +160,7 @@ auto &s_iq4nl =
 /// decode, the quad loop, the shared codebook and the reduction are identical.
 template <int CODE_BITS, bool Q8K>
 /*
-DPCT1110:21: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 s_gemv_q8_split_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -272,7 +272,7 @@ __dpct_inline__ void s_gemv_q8_split_kernel(
         const uint8_t* xb = x + (i / blk_elems) * (Q8K ? Q8K_BLOCK_BYTES : Q8_0_BLOCK_BYTES);
         const int xi = (int) (i % blk_elems);
         /*
-        DPCT1098:302: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -329,7 +329,7 @@ __dpct_inline__ void s_gemv_q8_split_kernel(
     float acc = (((acc0 + acc1) + (acc2 + acc3)) + ((acc4 + acc5) + (acc6 + acc7))) +
                 (((acc8 + acc9) + (acc10 + acc11)) + ((acc12 + acc13) + (acc14 + acc15)));
     /*
-DPCT1108:22: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -488,7 +488,7 @@ namespace {
 // non-power-of-two group rather than silently computing a wrong index.
 template <int CODE_BITS>
 /*
-DPCT1110:23: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 s_gemv_split_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -594,7 +594,7 @@ __dpct_inline__ void s_gemv_split_kernel(
     for (int step = threads_per_row / 2; step > 0; step >>= 1) {
         if (tid < step) partial[tid] += partial[tid + step];
         /*
-        DPCT1118:24: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -631,7 +631,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
     int group_shift = 0;
     while ((1 << group_shift) < form.group_elems) ++group_shift;
     /*
-    DPCT1083:26: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -640,7 +640,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
     switch (form.code_bits) {
         case 2:
             /*
-            DPCT1049:25: The work-group size passed to the SYCL kernel may
+            DPCT1049: The work-group size passed to the SYCL kernel may
             exceed the limit. To get the device limit, query
             info::device::max_work_group_size. Adjust the work-group size if
             needed.
@@ -674,7 +674,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
             break;
         case 4:
             /*
-            DPCT1049:27: The work-group size passed to the SYCL kernel may
+            DPCT1049: The work-group size passed to the SYCL kernel may
             exceed the limit. To get the device limit, query
             info::device::max_work_group_size. Adjust the work-group size if
             needed.
@@ -708,7 +708,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
             break;
         case 8:
             /*
-            DPCT1049:28: The work-group size passed to the SYCL kernel may
+            DPCT1049: The work-group size passed to the SYCL kernel may
             exceed the limit. To get the device limit, query
             info::device::max_work_group_size. Adjust the work-group size if
             needed.
@@ -790,7 +790,7 @@ bool q8k_form_ok(const SForm& form, int64_t n_in, const char* who) {
 
 void finish(const char *who, void *stream) try {
     /*
-    DPCT1010:305: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/sampler.dp.cpp b/sycl/src/kernels/cuda/sampler.dp.cpp
index 00f279ae490..df94e4afa5a 100644
--- a/sycl/src/kernels/cuda/sampler.dp.cpp
+++ b/sycl/src/kernels/cuda/sampler.dp.cpp
@@ -126,7 +126,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
         for (int w = item_ct1.get_local_id(2); w < bits_words;
              w += item_ct1.get_local_range(2)) penal_bits[w] = 0u;
         /*
-        DPCT1118:57: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -138,7 +138,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
                     sycl::access::address_space::generic_space>(
                     &penal_bits[hrow[i] >> 5], 1u << (hrow[i] & 31));
         /*
-        DPCT1118:58: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -159,7 +159,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
     }
     for (int off = 16; off > 0; off >>= 1) {
         /*
-        DPCT1108:59: '__shfl_down_sync' was migrated with the experimental
+        DPCT1108: '__shfl_down_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -167,7 +167,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
             0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), bv,
             off);
         /*
-        DPCT1108:60: '__shfl_down_sync' was migrated with the experimental
+        DPCT1108: '__shfl_down_sync' was migrated with the experimental
         feature masked sub_group function which may not be supported by all
         compilers or runtimes. You may need to adjust the code.
         */
@@ -191,7 +191,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
         int wi = lane < nw ? si[lane] : n_vocab;
         for (int off = 16; off > 0; off >>= 1) {
             /*
-            DPCT1108:61: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -199,7 +199,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
                 0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 wv, off);
             /*
-            DPCT1108:62: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -227,7 +227,7 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
 /// order - is unchanged; `top_p`'s cut reads that order in double arithmetic as before; temperature and the
 /// Philox draw apply after the cut.  `sampler_parity` pins all of it against the host reference.
 /*
-DPCT1110:63: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 sampler_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -268,7 +268,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
         for (int w = item_ct1.get_local_id(2); w < bits_words;
              w += item_ct1.get_local_range(2)) penal_bits[w] = 0u;
         /*
-        DPCT1118:64: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -280,7 +280,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
                     sycl::access::address_space::generic_space>(
                     &penal_bits[hrow[i] >> 5], 1u << (hrow[i] & 31));
         /*
-        DPCT1118:65: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -327,7 +327,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
         }
         for (int off = 16; off > 0; off >>= 1) {
             /*
-            DPCT1108:68: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -335,7 +335,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
                 0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 bv, off);
             /*
-            DPCT1108:69: '__shfl_down_sync' was migrated with the experimental
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -348,7 +348,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
                   lane = (int)(item_ct1.get_local_id(2) & 31);
         if (lane == 0) { sv[warp] = bv; si[warp] = best; }
         /*
-        DPCT1118:66: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -359,7 +359,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
             int wi = lane < nw ? si[lane] : n_vocab;
             for (int off = 16; off > 0; off >>= 1) {
                 /*
-                DPCT1108:70: '__shfl_down_sync' was migrated with the
+                DPCT1108: '__shfl_down_sync' was migrated with the
                 experimental feature masked sub_group function which may not be
                 supported by all compilers or runtimes. You may need to adjust
                 the code.
@@ -369,7 +369,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
                     sycl::ext::oneapi::this_work_item::get_sub_group(), wv,
                     off);
                 /*
-                DPCT1108:71: '__shfl_down_sync' was migrated with the
+                DPCT1108: '__shfl_down_sync' was migrated with the
                 experimental feature masked sub_group function which may not be
                 supported by all compilers or runtimes. You may need to adjust
                 the code.
@@ -383,7 +383,7 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
             if (lane == 0) { sel_ids[i] = (wi < n_vocab) ? wi : 0; sel_logit[i] = wv; }
         }
         /*
-        DPCT1118:67: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -454,7 +454,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
         std::exit(1);
     }
     /*
-    DPCT1083:73: The size of local memory in the migrated code may be different
+    DPCT1083: The size of local memory in the migrated code may be different
     from the original code. Check that the allocated memory size in the migrated
     code is correct.
     */
@@ -467,7 +467,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
         // One block per token, 1,024 threads over the vocabulary.  See `sampler_greedy_kernel`.
         const int gthreads = 1024;
         /*
-        DPCT1049:72: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -503,7 +503,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
         // The same block-per-token shape: the selection's k argmax rounds reduce inside the block.  See
         // `sampler_kernel`'s header for what the old one-thread-per-token launch cost.
         /*
-        DPCT1049:74: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -535,7 +535,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
             });
     }
     /*
-    DPCT1010:403: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/kernels/cuda/shared_expert.dp.cpp b/sycl/src/kernels/cuda/shared_expert.dp.cpp
index 95a95e58136..654105163f4 100644
--- a/sycl/src/kernels/cuda/shared_expert.dp.cpp
+++ b/sycl/src/kernels/cuda/shared_expert.dp.cpp
@@ -113,12 +113,12 @@ void to_f16_kernel(const float* __restrict__ in, uint16_t* __restrict__ out, int
 // 0.5 and reads 1.0 scales the shared expert by 2x and produces perfectly finite, perfectly plausible logits.
 __dpct_inline__ double warp_sum_d(double v) {
     /*
-DPCT1108:242: '__shfl_down_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_down_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
     /*
-DPCT1121:243: Make sure that the "v" which is used in the SYCL group
+DPCT1121: Make sure that the "v" which is used in the SYCL group
 function/algorithm is initialized.
 */
 #pragma unroll
@@ -127,12 +127,12 @@ function/algorithm is initialized.
             0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(), v,
             off);
     /*
-    DPCT1108:244: '__shfl_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
     /*
-    DPCT1121:245: Make sure that the "v" which is used in the SYCL group
+    DPCT1121: Make sure that the "v" which is used in the SYCL group
     function/algorithm is initialized.
     */
     return dpct::experimental::select_from_sub_group(
@@ -184,7 +184,7 @@ __dpct_inline__ void native_scalar_sigmoid_kernel(float *gate) {
 __dpct_inline__ void native_scalar_sigmoid_multi_kernel(
     float *gate) { // thread t = token t, same expression
     /*
-    DPCT1064:936: Migrated __expf call is used in a macro/template definition
+    DPCT1064: Migrated __expf call is used in a macro/template definition
     and may not be valid for all macro/template uses. Adjust the code.
     */
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -257,7 +257,7 @@ void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, cons
     if (native_bf16 && batch && n_tok > 1) {   // one gemv for all rows (outputs identical), one sigmoid launch
         bf16_gemv_fp32_mmvf_multi(x, n_embd, gate_inp_bf16, g, 1, n_embd, 1, n_tok, stream);
         /*
-        DPCT1049:246: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -334,21 +334,21 @@ void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, cons
             });
     }
     /*
-    DPCT1010:939: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:940: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
     /*
-    DPCT1001:937: The statement could not be removed.
+    DPCT1001: The statement could not be removed.
     */
     /*
-    DPCT1000:938: Error handling if-stmt was detected but could not be
+    DPCT1000: Error handling if-stmt was detected but could not be
     rewritten.
     */
     if (e != 0) throw std::runtime_error(std::string("shared_expert_multi: ") +
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index bdc70090605..402b0e2af27 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -22,13 +22,13 @@ constexpr int RPG = S / RG;
 
 void check(const char* what) {
     /*
-    DPCT1010:871: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:872: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -59,7 +59,7 @@ auto &part =
     if ((int)item_ct1.get_group(2) < qk_heads) {
         float sq = y * y;
         /*
-DPCT1108:184: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -71,7 +71,7 @@ runtimes. You may need to adjust the code.
         if ((item_ct1.get_local_id(2) & 31) == 0)
             part[item_ct1.get_local_id(2) >> 5] = sq;
         /*
-        DPCT1118:183: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         item_ct1.barrier(sycl::access::fence_space::local_space);
@@ -102,7 +102,7 @@ gdn_conv_commit_kernel(float *__restrict__ hist, const float *__restrict__ qkv,
 }
 
 /*
-DPCT1110:185: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gdn_ab_multi_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -125,7 +125,7 @@ __dpct_inline__ void gdn_ab_multi_kernel(
     for (int t = 0; t < kVerifyMaxT; ++t) acc[t] = 0.0f;
     for (int j = lane; j < n / 8; j += 32) {
         /*
-        DPCT1098:873: The '*' expression is used instead of the __ldg call.
+        DPCT1098: The '*' expression is used instead of the __ldg call.
         These two expressions do not provide the exact same functionality. Check
         the generated code for potential precision and/or performance issues.
         */
@@ -163,7 +163,7 @@ __dpct_inline__ void gdn_ab_multi_kernel(
         if (t >= T) break;
         float a = acc[t];
         /*
-DPCT1108:186: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -184,7 +184,7 @@ runtimes. You may need to adjust the code.
 }
 
 /*
-DPCT1110:187: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gdn_step_norm_multi_kernel exceeds 128 bytes and may cause high register
 pressure. Consult with your hardware vendor to find the total register size
 available and adjust the code, or use smaller sub-group size to avoid high
@@ -223,22 +223,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
     for (int t = 0; t < n; ++t) {
         const float* ht = hbuf + (size_t) t * C;
         /*
-        DPCT1118:188: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:874: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier(); // the previous token is done with sk/sq/red/wsum
         if (tid < S) { sk[tid] = ht[qk + qh * S + tid]; sq[tid] = ht[qh * S + tid]; }
         /*
-        DPCT1118:189: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:875: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -250,11 +250,11 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
         red[rg][col] = kv;
         /*
-        DPCT1118:190: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:876: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -268,22 +268,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             o = sycl::fma(s[r], sq[rg * RPG + r], o);
         }
         /*
-        DPCT1118:191: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:877: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
         red[rg][col] = o;
         /*
-        DPCT1118:192: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:878: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -296,7 +296,7 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
         }
         if (t < t_out_begin) continue;   // a replayed token: its state update is needed, its output is not
         /*
-DPCT1108:194: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -307,11 +307,11 @@ runtimes. You may need to adjust the code.
                 sq_part, o2);
         if ((tid & 31) == 0) wsum[tid >> 5] = sq_part;
         /*
-        DPCT1118:193: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:879: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -352,14 +352,14 @@ __dpct_inline__ void embedding_gather_dev_kernel(
     const int code = (c[i / per_byte] >> ((i % per_byte) * code_bits)) & mask;
     const int64_t group = i / group_elems;
     /*
-    DPCT1013:880: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
     */
     const float product = (float)(code + code_bias) * sc[group];
     /*
-    DPCT1013:881: The rounding mode could not be specified and the generated
+    DPCT1013: The rounding mode could not be specified and the generated
     code may have different accuracy than the original code. Verify the
     correctness. SYCL math built-in function rounding mode is aligned with
     OpenCL C 1.2 standard.
@@ -484,7 +484,7 @@ auto &part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     for (int i = item_ct1.get_local_id(2); i < n_vocab;
          i += item_ct1.get_local_range(2)) s += sycl::native::exp(l[i] - m);
     /*
-DPCT1108:195: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -607,7 +607,7 @@ void add_streams_broadcast(const float* h, const float* e, float* R, int64_t n_e
 void ident_hits(const int32_t* ids, int n, int32_t* slot, int32_t* dst, int32_t* count, void* stream) {
     if (n < 1 || n > 1024) { std::fprintf(stderr, "ident_hits: n out of range\n"); std::exit(1); }
     /*
-    DPCT1049:196: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -716,7 +716,7 @@ void map_ids(int32_t* ids, const int32_t* table, int n, void* stream) {
 
 void row_top_prob(const float* logits, int n_rows, int n_vocab, const int32_t* ids, float* probs, void* stream) {
     /*
-    DPCT1049:197: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -754,7 +754,7 @@ __dpct_inline__ void window_ids_kernel(int32_t *steps, int window, int32_t *ids,
          j += item_ct1.get_group_range(2) * item_ct1.get_local_range(2))
         ids[q * stride + j] = start + j;
     /*
-    DPCT1065:882: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -879,7 +879,7 @@ void gdn_step_norm_multi(float* state, const float* h, int conv_channels, const
         std::exit(1);
     }
     /*
-    DPCT1049:198: The work-group size passed to the SYCL kernel may exceed the
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
     Adjust the work-group size if needed.
     */
@@ -908,13 +908,13 @@ namespace {
 __dpct_inline__ void wait_flag_ge_kernel(const volatile uint32_t *flag,
                                          uint32_t value) {
     /*
-    DPCT1008:883: __nanosleep function is not defined in SYCL. This is a
+    DPCT1008: __nanosleep function is not defined in SYCL. This is a
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
     for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
     /*
-    DPCT1078:199: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
@@ -967,7 +967,7 @@ __dpct_inline__ void resident_plan_kernel(
     counts[1] = entries;
     counts[2] = 0;
     /*
-    DPCT1078:200: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
@@ -979,13 +979,13 @@ __dpct_inline__ void wait_flag_ge_or_kernel(const volatile uint32_t *flag,
                                             const volatile uint32_t *skip) {
     if (strata::sys_load(skip) == value) return;
     /*
-    DPCT1008:884: __nanosleep function is not defined in SYCL. This is a
+    DPCT1008: __nanosleep function is not defined in SYCL. This is a
     hardware-specific feature. Consult with your hardware vendor to find a
     replacement.
     */
     for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
     /*
-    DPCT1078:201: Consider replacing memory_order::acq_rel with
+    DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
     are needed.
     */
@@ -1002,7 +1002,7 @@ __dpct_inline__ void copy_i32_unless_kernel(int32_t *__restrict__ dst,
          i += item_ct1.get_local_range(2)) dst[i] = src[i];
 }
 /*
-DPCT1052:885: SYCL does not support the member access for a volatile qualified
+DPCT1052: SYCL does not support the member access for a volatile qualified
 vector type. The volatile qualifier was removed. You may need to rewrite the
 code.
 */
@@ -1177,10 +1177,14 @@ void copy_indexed(float* dst, const float* src, int64_t stride, const int32_t* i
 namespace {
     __dpct_inline__ void gpu_stamp_kernel(unsigned long long *buf, int i) {
     unsigned long long t;
+#if defined(__HIPCC__)
+    t = wall_clock64() * 10ull;   // gfx11: a constant 100 MHz counter, in ns
+#else
     /*
-    DPCT1053:202: Migration of device assembly code is not supported.
+    DPCT1053: Migration of device assembly code is not supported.
     */
     t = 0;   // SYCL: no %globaltimer equivalent; the stage profiler is inert on this backend
+#endif
     buf[i] = t;
 } }
 void gpu_stamp(unsigned long long* buf, int i, void* stream) {
@@ -1188,7 +1192,7 @@ void gpu_stamp(unsigned long long* buf, int i, void* stream) {
         sycl::ext::oneapi::experimental::use_root_sync};
 
     strata::q_of(stream)
-        ->parallel_for<dpct_kernel_name<class gpu_stamp_kernel_596fa5>>(
+        ->parallel_for<dpct_kernel_name<class gpu_stamp_kernel_76ad79>>(
             sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
             exp_props, [=](sycl::nd_item<3> item_ct1) {
                 gpu_stamp_kernel(buf, i);
diff --git a/sycl/src/kernels/cvec_parity.cpp b/sycl/src/kernels/cvec_parity.cpp
index 239a1a3531f..c944913800c 100644
--- a/sycl/src/kernels/cvec_parity.cpp
+++ b/sycl/src/kernels/cvec_parity.cpp
@@ -38,7 +38,7 @@ T* dalloc(size_t n) {
 
 template <typename T>
 /*
-DPCT1114:920: cudaMemcpy is migrated to asynchronization memcpy, assuming in the
+DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in the
 original code the source host memory is pageable memory. If the memory is not
 pageable, call wait() on event return by memcpy API to ensure synchronization
 behavior.
diff --git a/sycl/src/kernels/dequant_s2_parity.cpp b/sycl/src/kernels/dequant_s2_parity.cpp
index a1f6680ea46..0d43eaa074e 100644
--- a/sycl/src/kernels/dequant_s2_parity.cpp
+++ b/sycl/src/kernels/dequant_s2_parity.cpp
@@ -87,7 +87,7 @@ int main(int argc, char** argv) {
                                cpu.size(), dpct::get_in_order_queue())),
           "cudaMalloc out");
     /*
-    DPCT1114:370: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -96,7 +96,7 @@ int main(int argc, char** argv) {
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
-    DPCT1114:371: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/elementwise_parity.cpp b/sycl/src/kernels/elementwise_parity.cpp
index dc086e62d9e..594b4598028 100644
--- a/sycl/src/kernels/elementwise_parity.cpp
+++ b/sycl/src/kernels/elementwise_parity.cpp
@@ -108,7 +108,7 @@ int main(int argc, char** argv) {
                                    n * 4, dpct::get_in_order_queue())),
               "g");
         /*
-        DPCT1114:712: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -117,7 +117,7 @@ int main(int argc, char** argv) {
                   dpct::get_in_order_queue().memcpy(d_a, alpha.data(), n * 4).wait()),
               "ca");
         /*
-        DPCT1114:713: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -126,7 +126,7 @@ int main(int argc, char** argv) {
                   dpct::get_in_order_queue().memcpy(d_dt, dt.data(), n * 4).wait()),
               "cd");
         /*
-        DPCT1114:714: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -205,7 +205,7 @@ int main(int argc, char** argv) {
                                    n * 4, dpct::get_in_order_queue())),
               "sx");
         /*
-        DPCT1114:715: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -242,7 +242,7 @@ int main(int argc, char** argv) {
                                    n * 2, dpct::get_in_order_queue())),
               "eh");
         /*
-        DPCT1114:716: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -338,7 +338,7 @@ int main(int argc, char** argv) {
                                    w.size() * 4, dpct::get_in_order_queue())),
               "m rmsw");
         /*
-        DPCT1114:717: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -347,7 +347,7 @@ int main(int argc, char** argv) {
                                                                  x.size() * 4).wait()),
               "c rmsx");
         /*
-        DPCT1114:718: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -386,7 +386,7 @@ int main(int argc, char** argv) {
         // sides were never looking at the same input.
         const std::vector<float> want_null = ref(false, false);
         /*
-        DPCT1114:719: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -414,7 +414,7 @@ int main(int argc, char** argv) {
     {
         dpct::queue_ptr stream;
         /*
-        DPCT1025:720: The SYCL queue is created ignoring the flag and priority
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
         options.
         */
         check(DPCT_CHECK_ERROR(
@@ -463,7 +463,7 @@ int main(int argc, char** argv) {
                                   ((size_t)n + 2), dpct::get_in_order_queue())),
                           "embedding output");
                     /*
-                    DPCT1124:721: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -473,7 +473,7 @@ int main(int argc, char** argv) {
                               stream->memcpy(dc, codes.data(), codes.size())),
                           "embedding codes upload");
                     /*
-                    DPCT1124:722: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -484,7 +484,7 @@ int main(int argc, char** argv) {
                             ds, scales.data(), scales.size() * sizeof(float))),
                         "embedding scales upload");
                     /*
-                    DPCT1124:723: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -510,7 +510,7 @@ int main(int argc, char** argv) {
                                 if (std::memcmp(&fused, &want[(size_t) i], sizeof(float)) != 0) ++fma_diff;
                             }
                             /*
-                            DPCT1124:724: cudaMemcpyAsync is migrated to
+                            DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
@@ -526,7 +526,7 @@ int main(int argc, char** argv) {
                                 with_offset ? dof + (size_t) row * row_groups : nullptr,
                                 n, bits, bias, group, out + 1, stream);
                             /*
-                            DPCT1124:725: cudaMemcpyAsync is migrated to
+                            DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
@@ -576,7 +576,7 @@ int main(int argc, char** argv) {
                                           stream->ext_oneapi_graph(*exec)),
                                       "embedding replay");
                                 /*
-                                DPCT1124:726: cudaMemcpyAsync is migrated to
+                                DPCT1124: cudaMemcpyAsync is migrated to
                                 asynchronous memcpy API. While the origin API
                                 might be synchronous, it depends on the type of
                                 operand memory, so you may need to call wait()
diff --git a/sycl/src/kernels/gdn_parity.cpp b/sycl/src/kernels/gdn_parity.cpp
index 5df2e2816e4..c749c07f14e 100644
--- a/sycl/src/kernels/gdn_parity.cpp
+++ b/sycl/src/kernels/gdn_parity.cpp
@@ -183,7 +183,7 @@ int main(int argc, char** argv) {
                       (size_t)h_v * S * 4, dpct::get_in_order_queue())),
               "o");
         /*
-        DPCT1114:486: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -192,7 +192,7 @@ int main(int argc, char** argv) {
                   d_st, st_dev.data(), st_dev.size() * 4).wait()),
               "cst");
         /*
-        DPCT1114:487: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -201,7 +201,7 @@ int main(int argc, char** argv) {
                                                                  q.size() * 4).wait()),
               "cq");
         /*
-        DPCT1114:488: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -210,7 +210,7 @@ int main(int argc, char** argv) {
                                                                  k.size() * 4).wait()),
               "ck");
         /*
-        DPCT1114:489: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -219,7 +219,7 @@ int main(int argc, char** argv) {
                                                                  v.size() * 4).wait()),
               "cv");
         /*
-        DPCT1114:490: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -228,7 +228,7 @@ int main(int argc, char** argv) {
                   d_g, gate.data(), gate.size() * 4).wait()),
               "cg");
         /*
-        DPCT1114:491: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -275,7 +275,7 @@ int main(int argc, char** argv) {
         {
             std::vector<float> zero(st_dev.size(), 0.0f), zg((size_t) h_v, 0.0f), zb((size_t) h_v, 0.0f);
             /*
-            DPCT1114:492: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -284,7 +284,7 @@ int main(int argc, char** argv) {
                       d_st, zero.data(), zero.size() * 4).wait()),
                   "z0");
             /*
-            DPCT1114:493: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -293,7 +293,7 @@ int main(int argc, char** argv) {
                       d_g, zg.data(), zg.size() * 4).wait()),
                   "z1");
             /*
-            DPCT1114:494: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -396,7 +396,7 @@ int main(int argc, char** argv) {
                                    (size_t)C * 4, dpct::get_in_order_queue())),
               "co");
         /*
-        DPCT1114:495: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -405,7 +405,7 @@ int main(int argc, char** argv) {
                   d_cs, cs.data(), cs.size() * 4).wait()),
               "ccs");
         /*
-        DPCT1114:496: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -414,7 +414,7 @@ int main(int argc, char** argv) {
                                                                  x.size() * 4).wait()),
               "ccx");
         /*
-        DPCT1114:497: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -478,7 +478,7 @@ int main(int argc, char** argv) {
                                    x.size() * 4, dpct::get_in_order_queue())),
               "lx");
         /*
-        DPCT1114:498: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -529,7 +529,7 @@ int main(int argc, char** argv) {
                                  y_ref.size() * 4, dpct::get_in_order_queue())),
             "ny");
         /*
-        DPCT1114:499: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -538,7 +538,7 @@ int main(int argc, char** argv) {
                                                                  o.size() * 4).wait()),
               "nco");
         /*
-        DPCT1114:500: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -547,7 +547,7 @@ int main(int argc, char** argv) {
                                                                  z.size() * 4).wait()),
               "ncz");
         /*
-        DPCT1114:501: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/gr_parity.cpp b/sycl/src/kernels/gr_parity.cpp
index 86f6900c724..3df9764c73b 100644
--- a/sycl/src/kernels/gr_parity.cpp
+++ b/sycl/src/kernels/gr_parity.cpp
@@ -23,6 +23,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/kernels/gr.hpp"
+#include "strata/kernels/fused_gr.hpp"
 
 #include <cmath>
 #include <cstdio>
@@ -196,7 +197,7 @@ int scalar_activation_contract() {
         bf16_bits(2.0f), 0                     // injection: 2*xn[0]
     };
     /*
-    DPCT1114:966: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -205,7 +206,7 @@ int scalar_activation_contract() {
               dpct::get_in_order_queue().memcpy(d_R, ones, sizeof(ones)).wait()),
           "scalar upload R");
     /*
-    DPCT1114:967: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -215,7 +216,7 @@ int scalar_activation_contract() {
           "scalar upload weights");
     dpct::queue_ptr stream;
     /*
-    DPCT1025:968: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     check(DPCT_CHECK_ERROR(stream =
@@ -225,7 +226,7 @@ int scalar_activation_contract() {
     for (float gamma : {1.0f, 1.00390625f}) {
         const float gammas[] = {gamma, gamma};
         /*
-        DPCT1114:969: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -348,6 +349,260 @@ int scalar_activation_contract() {
     return bad;
 }
 
+int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const uint16_t* d_up,
+                           const uint16_t* d_inject, float eps) {
+    using namespace strata::kernels;
+    constexpr int N = 2560, HC = 4, LR = 320, D = N * HC, T = kFusedGrMaxT;
+    std::mt19937 rng(0x6f8a);
+    std::normal_distribution<float> normal(0.0f, 0.3f);
+    std::vector<float> r((size_t) T * D), bo((size_t) T * N), inj((size_t) T * HC);
+    for (auto& x : r) x = normal(rng);
+    for (auto& x : bo) x = normal(rng);
+    for (auto& x : inj) x = normal(rng);
+
+    float *d_r = nullptr, *d_r_out = nullptr, *d_bo = nullptr, *d_inj = nullptr;
+    float *d_lo = nullptr, *d_rs = nullptr, *d_inj_out = nullptr, *d_mixed = nullptr, *d_xn = nullptr;
+    check(DPCT_CHECK_ERROR(d_r = sycl::malloc_device<float>(
+                               r.size(), dpct::get_in_order_queue())),
+          "multi R");
+    check(DPCT_CHECK_ERROR(d_r_out = sycl::malloc_device<float>(
+                               r.size(), dpct::get_in_order_queue())),
+          "multi R_out");
+    check(DPCT_CHECK_ERROR(d_bo = sycl::malloc_device<float>(
+                               bo.size(), dpct::get_in_order_queue())),
+          "multi bo");
+    check(DPCT_CHECK_ERROR(d_inj = sycl::malloc_device<float>(
+                               inj.size(), dpct::get_in_order_queue())),
+          "multi inj");
+    check(DPCT_CHECK_ERROR(d_lo = sycl::malloc_device<float>(
+                               (size_t)T * LR, dpct::get_in_order_queue())),
+          "multi lo");
+    check(DPCT_CHECK_ERROR(d_rs = sycl::malloc_device<float>(
+                               (size_t)T * HC, dpct::get_in_order_queue())),
+          "multi rs");
+    check(DPCT_CHECK_ERROR(d_inj_out = sycl::malloc_device<float>(
+                               (size_t)T * HC, dpct::get_in_order_queue())),
+          "multi injection");
+    check(DPCT_CHECK_ERROR(d_mixed = sycl::malloc_device<float>(
+                               (size_t)T * N, dpct::get_in_order_queue())),
+          "multi mixed");
+    check(DPCT_CHECK_ERROR(d_xn = sycl::malloc_device<float>(
+                               (size_t)T * D, dpct::get_in_order_queue())),
+          "multi xn");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_r, r.data(), r.size() * sizeof(float)).wait()),
+          "multi copy R");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_bo, bo.data(), bo.size() * sizeof(float)).wait()),
+          "multi copy bo");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_inj, inj.data(), inj.size() * sizeof(float)).wait()),
+          "multi copy inj");
+
+    std::vector<FusedGrArgs> args(T);
+    for (int t = 0; t < T; ++t) {
+        auto& a = args[t];
+        a.R = d_r + (size_t) t * D;
+        a.R_out = d_r_out + (size_t) t * D;
+        a.apply = true;
+        a.bo_prev = d_bo + (size_t) t * N;
+        a.inj_prev = d_inj + (size_t) t * HC;
+        a.w_norm = d_norm;
+        a.w_down = d_down;
+        a.w_up = d_up;
+        a.w_inject = d_inject;
+        a.eps = eps;
+        a.lo = d_lo + (size_t) t * LR;
+        a.rs = d_rs + (size_t) t * HC;
+        a.inject_out = d_inj_out + (size_t) t * HC;
+        a.mixed = d_mixed + (size_t) t * N;
+    }
+
+    struct Snapshot {
+        std::vector<float> r_out, lo, rs, inject, mixed;
+    };
+    auto snapshot = [&]() {
+        try {
+    Snapshot s;
+        s.r_out.resize((size_t) T * D);
+        s.lo.resize((size_t) T * LR);
+        s.rs.resize((size_t) T * HC);
+        s.inject.resize((size_t) T * HC);
+        s.mixed.resize((size_t) T * N);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(s.r_out.data(), d_r_out,
+                                           s.r_out.size() * sizeof(float))
+                                   .wait()),
+              "multi read R_out");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(s.lo.data(), d_lo, s.lo.size() * sizeof(float))
+                      .wait()),
+              "multi read lo");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(s.rs.data(), d_rs, s.rs.size() * sizeof(float))
+                      .wait()),
+              "multi read rs");
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(s.inject.data(), d_inj_out,
+                                           s.inject.size() * sizeof(float))
+                                   .wait()),
+              "multi read inject");
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(s.mixed.data(), d_mixed,
+                                           s.mixed.size() * sizeof(float))
+                                   .wait()),
+              "multi read mixed");
+        return s;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    auto same = [](const Snapshot& a, const Snapshot& b) {
+        return std::memcmp(a.r_out.data(), b.r_out.data(), a.r_out.size() * sizeof(float)) == 0 &&
+               std::memcmp(a.lo.data(), b.lo.data(), a.lo.size() * sizeof(float)) == 0 &&
+               std::memcmp(a.rs.data(), b.rs.data(), a.rs.size() * sizeof(float)) == 0 &&
+               std::memcmp(a.inject.data(), b.inject.data(), a.inject.size() * sizeof(float)) == 0 &&
+               std::memcmp(a.mixed.data(), b.mixed.data(), a.mixed.size() * sizeof(float)) == 0;
+    };
+
+    dpct::queue_ptr stream = &dpct::get_in_order_queue();
+    /*
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    check(DPCT_CHECK_ERROR(stream =
+                               dpct::get_current_device().create_queue(true)),
+          "multi stream");
+    // Max T forces the HIP kernel's full dynamic-LDS request: 8 * 1280 * sizeof(float) = 40 KiB.
+    fused_gr_read_multi(args.data(), T, d_xn, stream);
+    check(DPCT_CHECK_ERROR(stream->wait()), "multi max-T sync");
+    const Snapshot multi = snapshot();
+    for (int t = 0; t < T; ++t) fused_gr_read(args[t], stream);
+    check(DPCT_CHECK_ERROR(stream->wait()), "single reference sync");
+    const Snapshot single = snapshot();
+    int bad = 0;
+    if (!same(multi, single)) {
+        std::printf("  fused GR multi max-T differs from single-token calls\n");
+        ++bad;
+    }
+
+    dpct::experimental::command_graph_ptr graph = nullptr;
+    dpct::experimental::command_graph_exec_ptr graph_exec = nullptr;
+    check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(stream)),
+          "multi graph begin");
+    fused_gr_read_multi(args.data(), T, d_xn, stream);
+    check(DPCT_CHECK_ERROR(dpct::experimental::end_recording(stream, &graph)),
+          "multi graph end");
+    check(DPCT_CHECK_ERROR(
+              graph_exec = new sycl::ext::oneapi::experimental::command_graph<
+                  sycl::ext::oneapi::experimental::graph_state::executable>(
+                  graph->finalize())),
+          "multi graph instantiate");
+    check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*graph_exec)),
+          "multi graph initial replay");
+    check(DPCT_CHECK_ERROR(stream->wait()), "multi graph initial sync");
+    const Snapshot captured = snapshot();
+    if (!same(multi, captured)) {
+        std::printf("  fused GR multi captured graph differs from direct max-T call\n");
+        ++bad;
+    }
+
+    // Reuse the same captured pointers with new payloads; then independently run the single-token path again.
+    for (size_t i = 0; i < r.size(); ++i) r[i] = -0.7f * r[i] + 0.001f * (float) (i % 17);
+    for (size_t i = 0; i < bo.size(); ++i) bo[i] = -0.4f * bo[i] + 0.02f;
+    for (size_t i = 0; i < inj.size(); ++i) inj[i] += 0.3f;
+    /*
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              stream->memcpy(d_r, r.data(), r.size() * sizeof(float))),
+          "multi replay R");
+    /*
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              stream->memcpy(d_bo, bo.data(), bo.size() * sizeof(float))),
+          "multi replay bo");
+    /*
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    the origin API might be synchronous, it depends on the type of operand
+    memory, so you may need to call wait() on event return by memcpy API to
+    ensure synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(
+              stream->memcpy(d_inj, inj.data(), inj.size() * sizeof(float))),
+          "multi replay inj");
+    check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*graph_exec)),
+          "multi graph changed replay");
+    check(DPCT_CHECK_ERROR(stream->wait()), "multi graph changed sync");
+    const Snapshot replay = snapshot();
+    if (std::memcmp(multi.mixed.data(), replay.mixed.data(), multi.mixed.size() * sizeof(float)) == 0) {
+        std::printf("  fused GR graph replay ignored changed inputs\n");
+        ++bad;
+    }
+    for (int t = 0; t < T; ++t) fused_gr_read(args[t], stream);
+    check(DPCT_CHECK_ERROR(stream->wait()), "changed single reference sync");
+    if (!same(replay, snapshot())) {
+        std::printf("  fused GR changed graph replay differs from single-token calls\n");
+        ++bad;
+    }
+
+    std::printf("  fused GR multi max-T=8 LDS launch and changing graph replay %s\n",
+                bad == 0 ? "pass" : "FAIL");
+    check(DPCT_CHECK_ERROR(delete (graph_exec)), "multi graph exec destroy");
+    check(DPCT_CHECK_ERROR(delete (graph)), "multi graph destroy");
+    check(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
+          "multi stream destroy");
+    check(DPCT_CHECK_ERROR(sycl::free(d_xn, dpct::get_in_order_queue())),
+          "free multi xn");
+    check(DPCT_CHECK_ERROR(sycl::free(d_mixed, dpct::get_in_order_queue())),
+          "free multi mixed");
+    check(DPCT_CHECK_ERROR(sycl::free(d_inj_out, dpct::get_in_order_queue())),
+          "free multi injection");
+    check(DPCT_CHECK_ERROR(sycl::free(d_rs, dpct::get_in_order_queue())),
+          "free multi rs");
+    check(DPCT_CHECK_ERROR(sycl::free(d_lo, dpct::get_in_order_queue())),
+          "free multi lo");
+    check(DPCT_CHECK_ERROR(sycl::free(d_inj, dpct::get_in_order_queue())),
+          "free multi inj");
+    check(DPCT_CHECK_ERROR(sycl::free(d_bo, dpct::get_in_order_queue())),
+          "free multi bo");
+    check(DPCT_CHECK_ERROR(sycl::free(d_r_out, dpct::get_in_order_queue())),
+          "free multi R_out");
+    check(DPCT_CHECK_ERROR(sycl::free(d_r, dpct::get_in_order_queue())),
+          "free multi R");
+    return bad;
+}
+
 }  // namespace
 
 int main(int argc, char** argv) {
@@ -422,7 +677,7 @@ int main(int argc, char** argv) {
                                (size_t)hc, dpct::get_in_order_queue())),
           "m inject");
     /*
-    DPCT1114:970: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -431,7 +686,7 @@ int main(int argc, char** argv) {
               d_R, R.data(), R.size() * sizeof(float)).wait()),
           "c R");
     /*
-    DPCT1114:971: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -440,7 +695,7 @@ int main(int argc, char** argv) {
               d_norm, w_norm.data(), w_norm.size() * sizeof(float)).wait()),
           "c norm");
     /*
-    DPCT1114:972: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -449,7 +704,7 @@ int main(int argc, char** argv) {
               d_down, q_down.data(), q_down.size() * sizeof(uint16_t)).wait()),
           "c down");
     /*
-    DPCT1114:973: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -458,7 +713,7 @@ int main(int argc, char** argv) {
               d_up, q_up.data(), q_up.size() * sizeof(uint16_t)).wait()),
           "c up");
     /*
-    DPCT1114:974: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -605,7 +860,7 @@ int main(int argc, char** argv) {
             for (long long k = 0; k < hc_lr; ++k)
                 tr_up[(size_t) (k * hc_dim + i)] = q_up[(size_t) (i * hc_lr + k)];
         /*
-        DPCT1114:975: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -614,7 +869,7 @@ int main(int argc, char** argv) {
                   d_down_bad, tr_down.data(), tr_down.size() * 2).wait()),
               "cb d");
         /*
-        DPCT1114:976: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -679,7 +934,7 @@ int main(int argc, char** argv) {
                                R.size(), dpct::get_in_order_queue())),
           "m outw");
     /*
-    DPCT1114:977: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -688,7 +943,7 @@ int main(int argc, char** argv) {
               d_Rw, R.data(), R.size() * sizeof(float)).wait()),
           "c Rw");
     /*
-    DPCT1114:978: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -697,7 +952,7 @@ int main(int argc, char** argv) {
               d_bo, block_out.data(), block_out.size() * sizeof(float)).wait()),
           "c bo");
     /*
-    DPCT1114:979: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -754,7 +1009,7 @@ int main(int argc, char** argv) {
     std::vector<float> inj((size_t) hc);
     for (auto& x : inj) x = gauss(rng) * 3.0f;
     /*
-    DPCT1114:980: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -835,7 +1090,7 @@ int main(int argc, char** argv) {
                                  (size_t)rhc * 4, dpct::get_in_order_queue())),
             "rI");
         /*
-        DPCT1114:981: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -844,7 +1099,7 @@ int main(int argc, char** argv) {
                   dR, rR.data(), rR.size() * 4).wait()),
               "crR");
         /*
-        DPCT1114:982: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -853,7 +1108,7 @@ int main(int argc, char** argv) {
                   dN, rnorm.data(), rnorm.size() * 4).wait()),
               "crN");
         /*
-        DPCT1114:983: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -862,7 +1117,7 @@ int main(int argc, char** argv) {
                   dD, qd.data(), qd.size() * 2).wait()),
               "crD");
         /*
-        DPCT1114:984: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -871,7 +1126,7 @@ int main(int argc, char** argv) {
                   dU, qu.data(), qu.size() * 2).wait()),
               "crU");
         /*
-        DPCT1114:985: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -911,6 +1166,7 @@ int main(int argc, char** argv) {
                         activation_mode_name(mode), ok ? "pass" : "*** FAIL ***", rm, ri);
             if (!ok) ++bad;
         }
+        bad += fused_multi_lds_parity(dN, dD, dU, dJ, eps);
         select_activation_mode(0);
         sycl::free(rws_raw, dpct::get_in_order_queue());
         sycl::free(dR, dpct::get_in_order_queue());
diff --git a/sycl/src/kernels/iq_parity.cpp b/sycl/src/kernels/iq_parity.cpp
index 3311bacb813..9adfcb5779d 100644
--- a/sycl/src/kernels/iq_parity.cpp
+++ b/sycl/src/kernels/iq_parity.cpp
@@ -42,7 +42,7 @@ int main(int argc, char** argv) {
         dq = (float *)sycl::malloc_device(ref.size() * 4,
                                           dpct::get_in_order_queue());
         /*
-        DPCT1114:365: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -74,7 +74,7 @@ int main(int argc, char** argv) {
         dy = (float *)sycl::malloc_device((size_t)2 * rows * 4,
                                           dpct::get_in_order_queue());
         /*
-        DPCT1114:366: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/kv_hybrid_parity.cpp b/sycl/src/kernels/kv_hybrid_parity.cpp
new file mode 100644
index 00000000000..73ea80caa4c
--- /dev/null
+++ b/sycl/src/kernels/kv_hybrid_parity.cpp
@@ -0,0 +1,478 @@
+// src/kernels/kv_hybrid_parity.cpp - hybrid K8V4 KV against host references (GPU, no model).
+//
+// Exercises the EXACT composed calls the engine's hybrid path makes (layer.cpp / prefill.cpp): the q8/q4
+// append and gather kernels invoked with the unused half's pointers folded onto the used pool, and the
+// fused decode attention's KV_MODE 3 (INT8 K, rotated Q4_0 V) followed by the output's inverse Hadamard.
+//   1. K: INT8 codes + FP16 scales bitwise vs the host reference (kv_q8.hpp's rules);
+//   2. V: after fwht256, Q4_0 blocks bitwise vs the host reference (kv_q4.hpp's rules, PR #21);
+//   3. the composed gathers bitwise vs the host dequantization of those codes;
+//   4. qsa_decode_attn<3> + output fwht vs a host attention over the SAME dequantized K/V (fp32 math), and
+//      bounded against the fp32-true attention from the unquantized K/V.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/qsa_prompt_attn.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+int g_fail = 0;
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T> T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 64, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+       "memset");
+    return p;
+}
+
+// kv_q4_parity.cpp's exact CPU references.
+void fwht256_host_reference(float* x) {
+    constexpr int n = 256;
+    for (int s = 1; s < n; s *= 2) {
+        for (int i = 0; i < n; i += 2 * s) {
+            for (int j = 0; j < s; ++j) {
+                const float u = x[i + j];
+                const float v = x[i + j + s];
+                x[i + j]     = u + v;
+                x[i + j + s] = u - v;
+            }
+        }
+    }
+    const float scale = 1.0f / 16.0f;
+    for (int i = 0; i < n; ++i) x[i] *= scale;
+}
+void quantize_block_q4_0_host(const float* x, k::block_q4_0& blk) {
+    float amax = 0.0f, max_val = 0.0f;
+    for (int i = 0; i < 32; ++i) {
+        const float v = x[i];
+        if (amax < std::fabs(v)) { amax = std::fabs(v); max_val = v; }
+    }
+    const float d = max_val / -8.0f;
+    const float id = d != 0.0f ? 1.0f / d : 0.0f;
+    blk.d = k::f16_from_f32(d);
+    for (int i = 0; i < 16; ++i) {
+        const int q0 = (int) (x[i] * id + 8.5f);
+        const int q1 = (int) (x[i + 16] * id + 8.5f);
+        const uint8_t xi0 = (uint8_t) std::min(15, std::max(0, q0));
+        const uint8_t xi1 = (uint8_t) std::min(15, std::max(0, q1));
+        blk.qs[i] = xi0 | (xi1 << 4);
+    }
+}
+}  // namespace
+
+int main() {
+    std::printf("=== Running kv_hybrid_parity test ===\n");
+    k::QsaShapes s = k::qsa_real_shapes();
+    s.page_size = 64;
+    const int H = (int) s.n_head_kv, D = (int) s.head_dim, P = (int) s.page_size, G = D / k::KV_Q8_GROUP;
+    const int QH = (int) s.n_head, PER = QH / H;   // query heads per KV head
+    const int pages = 24, cells = pages * P;   // n_chunks >= n_head: the batched merge overlaps queries below that
+    std::mt19937 rng(17);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+
+    std::vector<int32_t> table(pages);
+    for (int i = 0; i < pages; ++i) table[i] = (i * 5 + 3) % pages;
+    int32_t* d_table = dalloc<int32_t>(pages);
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4).wait()),
+       "table");
+
+    std::vector<float> K((size_t) cells * H * D), V((size_t) cells * H * D);
+    for (auto& x : K) x = nd(rng) * 0.5f;
+    for (auto& x : V) x = nd(rng) * 0.5f;
+
+    // ---- host reference: K in INT8 (kv_q8.hpp), rotated V in Q4_0 (kv_q4.hpp)
+    std::vector<int8_t> rk((size_t) cells * H * D);
+    std::vector<uint16_t> rk_s((size_t) cells * H * G);
+    for (int c = 0; c < cells; ++c)
+        for (int h = 0; h < H; ++h)
+            for (int g = 0; g < G; ++g) {
+                float amax = 0.0f;
+                for (int t = 0; t < k::KV_Q8_GROUP; ++t)
+                    amax = std::max(amax, std::fabs(K[((size_t) c * H + h) * D + g * k::KV_Q8_GROUP + t]));
+                const uint16_t sb = k::f16_from_f32(amax / 127.0f);
+                const float sf = k::f32_from_f16(sb);
+                for (int t = 0; t < k::KV_Q8_GROUP; ++t) {
+                    int q = 0;
+                    if (sf > 0.0f) {
+                        q = (int) std::nearbyint(K[((size_t) c * H + h) * D + g * k::KV_Q8_GROUP + t] / sf);   // rn: ties to even, as the kernel
+                        q = std::max(-127, std::min(127, q));
+                    }
+                    rk[((size_t) c * H + h) * D + g * k::KV_Q8_GROUP + t] = (int8_t) q;
+                }
+                rk_s[((size_t) c * H + h) * G + g] = sb;
+            }
+    std::vector<float> Vrot((size_t) cells * H * D);
+    std::memcpy(Vrot.data(), V.data(), V.size() * 4);
+    for (int c = 0; c < cells * H; ++c) fwht256_host_reference(Vrot.data() + (size_t) c * D);
+    std::vector<k::block_q4_0> rv4((size_t) cells * H * (D / 32));
+    for (int c = 0; c < cells; ++c)
+        for (int h = 0; h < H; ++h)
+            for (int b = 0; b < D / 32; ++b)
+                quantize_block_q4_0_host(&Vrot[((size_t) c * H + h) * D + b * 32],
+                                         rv4[((size_t) c * H + h) * (D / 32) + b]);
+
+    // ---- device: one cell appended through the COMPOSED hybrid calls, then gathered
+    const int64_t q4_row = (int64_t) k::kv_q4_bytes_per_head(D);
+    int8_t* d_kq = dalloc<int8_t>((size_t) cells * H * D);
+    uint16_t* d_ks = dalloc<uint16_t>((size_t) cells * H * G);
+    uint8_t* d_v4 = dalloc<uint8_t>((size_t) cells * H * q4_row);
+    float *d_kcur = dalloc<float>((size_t) H * D), *d_vcur = dalloc<float>((size_t) H * D);
+    int32_t* d_step = dalloc<int32_t>(k::kStepCount);
+
+    int append_bad = 0, gather_bad = 0;
+    for (int c = 0; c < cells; ++c) {
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(d_kcur, &K[(size_t)c * H * D], (size_t)H * D * 4)
+                   .wait()),
+           "kcur");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memcpy(d_vcur, &V[(size_t)c * H * D], (size_t)H * D * 4)
+                   .wait()),
+           "vcur");
+        int32_t step[k::kStepCount];
+        k::qsa_step_fill(step, c, s);
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(d_step, step, sizeof step).wait()),
+           "step");
+        // exactly what qsa_layer's hybrid branch does
+        k::fwht256_inplace_cuda(d_vcur, H, nullptr);
+        k::kv_append_q8_step(d_kq, d_kq, d_ks, d_ks, d_table, d_step, d_kcur, d_kcur, s, nullptr, nullptr);
+        k::kv_append_q4_step(d_v4, d_v4, d_table, d_step, d_vcur, d_vcur, s, nullptr, nullptr);
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        ck(0 != 0 ? 0 : 0, "append");
+    }
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "append sync");
+
+    std::vector<int8_t> hk((size_t) cells * H * D);
+    std::vector<uint16_t> hks((size_t) cells * H * G);
+    std::vector<uint8_t> hv4((size_t) cells * H * q4_row);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hk.data(), d_kq, hk.size())
+                            .wait()),
+       "kq");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hks.data(), d_ks, hks.size() * 2)
+                            .wait()),
+       "ks");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(hv4.data(), d_v4, hv4.size())
+                            .wait()),
+       "v4");
+    // the pools are PHYSICAL (page, head, slot); the reference is by LOGICAL cell - compare through the table
+    const k::block_q4_0* hv4b = reinterpret_cast<const k::block_q4_0*>(hv4.data());
+    for (int c = 0; c < cells; ++c) {
+        const long long row = ((long long) table[c / P] * H);
+        for (int h = 0; h < H; ++h) {
+            const long long r = (row + h) * P + c % P;
+            for (int d = 0; d < D; ++d)
+                if (hk[(size_t) r * D + d] != rk[((size_t) c * H + h) * D + d]) ++append_bad;
+            for (int g = 0; g < G; ++g)
+                if (hks[(size_t) r * G + g] != rk_s[((size_t) c * H + h) * G + g]) ++append_bad;
+            for (int b = 0; b < D / 32; ++b) {
+                const k::block_q4_0& got = hv4b[(size_t) r * (D / 32) + b];
+                if (got.d != rv4[((size_t) c * H + h) * (D / 32) + b].d ||
+                    std::memcmp(got.qs, rv4[((size_t) c * H + h) * (D / 32) + b].qs, 16) != 0) ++append_bad;
+            }
+        }
+    }
+    std::printf("[1/3] composed appends: %s (%d bad values of %zu K / %zu V)\n",
+                append_bad == 0 ? "PASS" : "FAIL", append_bad, hk.size(), rv4.size());
+
+    // gather every cell (ids = all, ascending - the identity selection for width = cells)
+    std::vector<int32_t> ids(cells);
+    for (int i = 0; i < cells; ++i) ids[i] = i;
+    int32_t* d_ids = dalloc<int32_t>(cells);
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_ids, ids.data(), cells * 4).wait()),
+       "ids");
+    int32_t step[k::kStepCount];
+    k::qsa_step_fill(step, cells - 1, s);
+    step[k::kStepWidth] = cells;   // select everything
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_step, step, sizeof step).wait()),
+       "step2");
+    uint16_t *d_ksc = dalloc<uint16_t>((size_t) cells * H * D), *d_vsc = dalloc<uint16_t>((size_t) cells * H * D);
+    k::kv_gather_q8_step(d_kq, d_kq, d_ks, d_ks, d_table, d_ids, d_step, cells, s, d_ksc, d_ksc, nullptr);
+    k::kv_gather_q4_step(d_v4, d_v4, d_table, d_ids, d_step, cells, s, d_vsc, d_vsc, nullptr);
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "gather sync");
+    std::vector<uint16_t> h_ksc((size_t) cells * H * D), h_vsc((size_t) cells * H * D);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_ksc.data(), d_ksc, h_ksc.size() * 2)
+                            .wait()),
+       "ksc");
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_vsc.data(), d_vsc, h_vsc.size() * 2)
+                            .wait()),
+       "vsc");
+    for (int c = 0; c < cells; ++c)
+        for (int h = 0; h < H; ++h)
+            for (int d = 0; d < D; ++d) {
+                const float kref = k::f32_from_f16(k::f16_from_f32(
+                    (float) rk[((size_t) c * H + h) * D + d] * k::f32_from_f16(rk_s[((size_t) c * H + h) * G + d / k::KV_Q8_GROUP])));
+                if (k::f32_from_f16(h_ksc[((size_t) c * H + h) * D + d]) != kref) ++gather_bad;
+                const k::block_q4_0& b = rv4[((size_t) c * H + h) * (D / 32) + d / 32];
+                const int nib = d % 32 < 16 ? (b.qs[d % 32] & 0x0F) - 8 : ((b.qs[d % 32 - 16] >> 4) - 8);
+                const float vref = k::f32_from_f16(k::f16_from_f32((float) nib * k::f32_from_f16(b.d)));
+                if (k::f32_from_f16(h_vsc[((size_t) c * H + h) * D + d]) != vref) ++gather_bad;
+            }
+    std::printf("[2/3] composed gathers: %s (%d bad of %zu)\n",
+                gather_bad == 0 ? "PASS" : "FAIL", gather_bad, h_ksc.size());
+
+    // ---- attention: qsa_decode_attn KV_MODE 3 over the hybrid pools + output fwht, vs fp32 references
+    std::vector<float> q((size_t) QH * D);
+    for (auto& x : q) x = nd(rng);
+    float* d_q = dalloc<float>(q.size());
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(d_q, q.data(), q.size() * 4).wait()),
+       "q");
+    k::QsaAttnPools pools;
+    pools.k_q = d_kq; pools.k_scale = d_ks; pools.v_q4 = d_v4; pools.page_table = d_table;
+    float* d_scr = dalloc<float>(k::qsa_decode_attn_scratch_floats(cells, s) + 16);
+    float* d_attn = dalloc<float>((size_t) QH * D);
+    k::qsa_decode_attn_step(d_q, pools, d_ids, d_step, cells, s, d_scr, d_attn, nullptr);
+    k::fwht256_inplace_cuda(d_attn, QH, nullptr);   // the engine's inverse rotation of the output
+    ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+       "attn sync");
+    std::vector<float> h_attn((size_t) QH * D);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h_attn.data(), d_attn, h_attn.size() * 4)
+                            .wait()),
+       "attn");
+
+    // reference A: attention over the SAME dequantized K/V (isolates the kernel; fp32 host math)
+    // reference B: attention over the TRUE unquantized K/V (bounds the format's error)
+    auto host_attn = [&](const std::vector<float>& Keq, const std::vector<float>& Veq, std::vector<float>& out) {
+        out.assign((size_t) QH * D, 0.0f);
+        for (int h = 0; h < QH; ++h) {
+            const int kvh = h / PER;
+            std::vector<float> sc(cells);
+            float m = -1e30f;
+            for (int c = 0; c < cells; ++c) {
+                float d_ = 0.0f;
+                for (int t = 0; t < D; ++t)
+                    d_ += q[(size_t) h * D + t] * Keq[((size_t) c * H + kvh) * D + t];
+                sc[c] = d_ / std::sqrt((float) D);
+                m = std::max(m, sc[c]);
+            }
+            float l = 0.0f;
+            for (int c = 0; c < cells; ++c) { sc[c] = std::exp(sc[c] - m); l += sc[c]; }
+            for (int c = 0; c < cells; ++c)
+                for (int t = 0; t < D; ++t) out[(size_t) h * D + t] += sc[c] / l * Veq[((size_t) c * H + kvh) * D + t];
+        }
+    };
+    std::vector<float> Kdq((size_t) cells * H * D), Vdq((size_t) cells * H * D);
+    for (int c = 0; c < cells; ++c)
+        for (int h = 0; h < H; ++h)
+            for (int d = 0; d < D; ++d) {
+                Kdq[((size_t) c * H + h) * D + d] =
+                    (float) rk[((size_t) c * H + h) * D + d] * k::f32_from_f16(rk_s[((size_t) c * H + h) * G + d / k::KV_Q8_GROUP]);
+                const k::block_q4_0& b = rv4[((size_t) c * H + h) * (D / 32) + d / 32];
+                const int nib = d % 32 < 16 ? (b.qs[d % 32] & 0x0F) - 8 : ((b.qs[d % 32 - 16] >> 4) - 8);
+                Vdq[((size_t) c * H + h) * D + d] = (float) nib * k::f32_from_f16(b.d);
+            }
+    // un-rotate the dequantized V (the kernel returns the output in the UNROTATED domain)
+    std::vector<float> Vdq_un(Vdq.size());
+    std::memcpy(Vdq_un.data(), Vdq.data(), Vdq.size() * 4);
+    for (int c = 0; c < cells * H; ++c) fwht256_host_reference(Vdq_un.data() + (size_t) c * D);
+
+    // ---- batched form with TWO queries and per-query step arrays (the verify.cpp window's exact call)
+    {
+        const int nq = 2;
+        std::vector<float> q2((size_t) nq * QH * D);
+        for (auto& x : q2) x = nd(rng);
+        float* d_q2 = dalloc<float>(q2.size());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_q2, q2.data(),
+                                                              q2.size() * 4).wait()),
+           "q2");
+        // the batched kernel indexes ids[z * cap + ...]: one FULL selection per query
+        std::vector<int32_t> ids2((size_t) nq * cells);
+        for (int i = 0; i < nq; ++i) for (int c = 0; c < cells; ++c) ids2[(size_t) i * cells + c] = c;
+        int32_t* d_ids2 = dalloc<int32_t>((size_t) nq * cells);
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               d_ids2, ids2.data(), ids2.size() * 4).wait()),
+           "ids2");
+        int32_t* d_steps2 = dalloc<int32_t>(nq * k::kStepCount);
+        for (int i = 0; i < nq; ++i) {
+            int32_t st2[k::kStepCount];
+            k::qsa_step_fill(st2, cells - 1 - i, s);
+            st2[k::kStepWidth] = cells - i;   // slightly different widths, as verify's windows have
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_steps2 + i * k::kStepCount, st2, sizeof st2).wait()),
+               "steps2");
+        }
+        float* d_scr2 = dalloc<float>(k::qsa_decode_attn_scratch_floats(cells, s) * nq + 64);
+        float* d_at2 = dalloc<float>((size_t) nq * QH * D);
+        k::qsa_decode_attn_batch(d_q2, pools, d_ids2, d_steps2, cells, s, d_scr2, d_at2, nq, nullptr);
+        k::fwht256_inplace_cuda(d_at2, (int64_t) nq * QH, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "attn2 sync");
+        std::vector<float> h_at2((size_t) nq * QH * D);
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(h_at2.data(), d_at2, h_at2.size() * 4)
+                                .wait()),
+           "at2");
+        double max_b = 0.0;
+        double per_q[2] = {0.0, 0.0};
+        for (int i = 0; i < nq; ++i)
+            for (int h = 0; h < QH; ++h) {
+                // reference over the cells this query's width selects (ids are ascending: the first width)
+                const int w = cells - i;
+                std::vector<float> sc(w);
+                float m = -1e30f;
+                for (int c = 0; c < w; ++c) {
+                    float d_ = 0.0f;
+                    for (int t = 0; t < D; ++t)
+                        d_ += q2[((size_t) i * QH + h) * D + t] * Kdq[((size_t) c * H + h / PER) * D + t];
+                    sc[c] = d_ / std::sqrt((float) D);
+                    m = std::max(m, sc[c]);
+                }
+                float l = 0.0f;
+                for (int c = 0; c < w; ++c) { sc[c] = std::exp(sc[c] - m); l += sc[c]; }
+                for (int d = 0; d < D; ++d) {
+                    float acc = 0.0f;
+                    for (int c = 0; c < w; ++c)
+                        acc += sc[c] / l * Vdq_un[((size_t) c * H + h / PER) * D + d];   // dim d only
+                    const double e = (double) std::fabs(h_at2[((size_t) i * QH + h) * D + d] - acc);
+                    max_b = std::max(max_b, e);
+                    per_q[i] = std::max(per_q[i], e);
+                }
+            }
+        const bool bok = max_b < 5e-3;
+        std::printf("       (per-query max: q0 %.2e, q1 %.2e)\n", per_q[0], per_q[1]);
+        std::printf("[4/4] mode-3 BATCHED attention (verify's form): %s (vs dequant ref %.2e)\n",
+                    bok ? "PASS" : "FAIL", max_b);
+        if (!bok) g_fail = 1;
+    }
+
+    std::vector<float> ref_deq, ref_true;
+    host_attn(Kdq, Vdq_un, ref_deq);
+    host_attn(K, V, ref_true);
+    double max_deq = 0.0, max_true = 0.0;
+    for (size_t i = 0; i < h_attn.size(); ++i) {
+        max_deq = std::max(max_deq, (double) std::fabs(h_attn[i] - ref_deq[i]));
+        max_true = std::max(max_true, (double) std::fabs(h_attn[i] - ref_true[i]));
+    }
+    // The tensor-core prompt path (qsa_prompt_attn, 0.1.22+) takes hybrid pools as KV_MODE 3: INT8 K, and V
+    // dequantized from its q4_0 blocks to fp16 at gather. Its summation order differs from the old kernel's
+    // (accuracy-level, not bitwise - qsa_prompt_attn.hpp says the same of its int8 mode), so: tolerance check
+    // against the SAME dequant reference, output un-rotated exactly as prefill.cpp does.
+    {
+        float* d_at4 = dalloc<float>((size_t) QH * D);
+        const bool took = k::qsa_prompt_attn_batch(d_q, pools, d_ids, d_step, cells, s, d_at4, 1, nullptr);
+        if (!took) {
+#if defined(STRATA_USE_HIP)
+            // AMD: the tensor-core prompt path is CUDA-only, so it refuses every pool and the old kernel runs
+            std::printf("[5/5] qsa_prompt_attn mode 3: PASS (refused on HIP - the old kernel runs)\n");
+#else
+            std::printf("[5/5] qsa_prompt_attn mode 3: FAIL (refused the hybrid pools)\n");
+            g_fail = 1;
+#endif
+        } else {
+            k::fwht256_inplace_cuda(d_at4, QH, nullptr);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_current_device().queues_wait_and_throw()),
+               "at4 sync");
+            std::vector<float> h_at4((size_t) QH * D);
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue()
+                       .memcpy(h_at4.data(), d_at4, h_at4.size() * 4)
+                       .wait()),
+               "at4");
+            double max_p = 0.0;
+            for (size_t i = 0; i < h_at4.size(); ++i)
+                max_p = std::max(max_p, (double) std::fabs(h_at4[i] - ref_deq[i]));
+            const bool pok = max_p < 1e-2;
+            std::printf("[5/5] qsa_prompt_attn mode 3 (tensor cores): %s (vs dequant ref %.2e)\n",
+                        pok ? "PASS" : "FAIL", max_p);
+            if (!pok) g_fail = 1;
+        }
+    }
+
+    const bool attn_ok = max_deq < 5e-3;   // fp32 kernel math vs fp64-ish host accumulation
+    std::printf("[3/3] mode-3 attention + output fwht: %s (vs dequant ref %.2e, vs true fp32 %.2e)\n",
+                attn_ok ? "PASS" : "FAIL", max_deq, max_true);
+
+    const bool ok = append_bad == 0 && gather_bad == 0 && attn_ok && g_fail == 0;
+    std::printf("=== kv_hybrid_parity: %s ===\n", ok ? "ALL PASS" : "FAILED");
+    return ok ? 0 : 1;
+}
diff --git a/sycl/src/kernels/kv_q4_parity.cpp b/sycl/src/kernels/kv_q4_parity.cpp
index adb24e7de23..13d823f152d 100644
--- a/sycl/src/kernels/kv_q4_parity.cpp
+++ b/sycl/src/kernels/kv_q4_parity.cpp
@@ -116,7 +116,7 @@ int main() {
     float* d_src = dalloc<float>(n_vectors * 256);
     float* d_dst = dalloc<float>(n_vectors * 256);
     /*
-    DPCT1114:781: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -213,7 +213,7 @@ int main() {
     for (int i = 0; i < pages; ++i) table[i] = (i * 3 + 5) % pages; // permutation
     int32_t* d_table = dalloc<int32_t>(pages);
     /*
-    DPCT1114:782: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -251,7 +251,7 @@ int main() {
 
         int32_t hstep[k::kStepCount] = {pos, pos + 1, 0, 0};
         /*
-        DPCT1114:783: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -260,7 +260,7 @@ int main() {
                dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep)).wait()),
            "memcpy step");
         /*
-        DPCT1114:784: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -269,7 +269,7 @@ int main() {
                d_kcur, kv.data(), kv.size() * sizeof(float)).wait()),
            "memcpy k");
         /*
-        DPCT1114:785: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -351,7 +351,7 @@ int main() {
         ids[i] = positions[rng() % n_fill];
     }
     /*
-    DPCT1114:786: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -362,7 +362,7 @@ int main() {
 
     int32_t hstep[k::kStepCount] = {0, 0, 0, max_ids};
     /*
-    DPCT1114:787: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/kv_q8_parity.cpp b/sycl/src/kernels/kv_q8_parity.cpp
index 7865de8eb7e..2655b6df4cd 100644
--- a/sycl/src/kernels/kv_q8_parity.cpp
+++ b/sycl/src/kernels/kv_q8_parity.cpp
@@ -26,7 +26,7 @@ namespace {
 int g_fail = 0;
 void ck(dpct::err0 e, const char *w) {
     /*
-    DPCT1009:423: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -54,7 +54,7 @@ int main() {
     for (int i = 0; i < pages; ++i) table[i] = (i * 5 + 3) % pages;            // a non-identity permutation
     int32_t* d_table = dalloc<int32_t>(pages);
     /*
-    DPCT1114:424: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -83,7 +83,7 @@ int main() {
         hk[pos] = kv; hv[pos] = vv;
         int32_t hstep[k::kStepCount] = {pos, pos + 1, 0, 0};
         /*
-        DPCT1114:425: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -92,7 +92,7 @@ int main() {
                dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep).wait()),
            "step");
         /*
-        DPCT1114:426: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -101,7 +101,7 @@ int main() {
                                                               kv.size() * 4).wait()),
            "k");
         /*
-        DPCT1114:427: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -165,7 +165,7 @@ int main() {
         std::vector<int32_t> ids(n_ids);
         for (auto& id : ids) id = positions[rng() % n_fill];
         /*
-        DPCT1114:428: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -175,7 +175,7 @@ int main() {
            "ids");
         int32_t hstep[k::kStepCount] = {0, 0, 0, n_ids};
         /*
-        DPCT1114:429: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/kv_stream_parity.cpp b/sycl/src/kernels/kv_stream_parity.cpp
index 8c178d437c8..1c5e087b0ee 100644
--- a/sycl/src/kernels/kv_stream_parity.cpp
+++ b/sycl/src/kernels/kv_stream_parity.cpp
@@ -32,7 +32,7 @@ namespace {
 int g_fail = 0;
 void ck(dpct::err0 e, const char *w) {
     /*
-    DPCT1009:886: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -51,7 +51,7 @@ template <typename T> T* halloc(size_t n) {   // pinned, mapped; returns the dev
     void* h = nullptr;
     void* d = nullptr;
     /*
-    DPCT1048:13: The original value cudaHostAllocMapped is not meaningful in the
+    DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
     migrated code and was removed or replaced with 0. You may need to check the
     migrated code.
     */
@@ -136,7 +136,7 @@ bool run(int fmt) {
         std::vector<int32_t> t(n_blocks);
         for (int64_t i = 0; i < n_blocks; ++i) t[i] = (int32_t) i;
         /*
-        DPCT1114:887: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -172,7 +172,7 @@ bool run(int fmt) {
         for (auto& x : hv) x = nd(rng);
         const int32_t st[4] = {(int32_t) pos, (int32_t) (pos + 1), (int32_t) ((pos + 1) / 4), 0};
         /*
-        DPCT1114:888: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -181,7 +181,7 @@ bool run(int fmt) {
                dpct::get_in_order_queue().memcpy(kc, hk.data(), hk.size() * 4).wait()),
            "k");
         /*
-        DPCT1114:889: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -190,7 +190,7 @@ bool run(int fmt) {
                dpct::get_in_order_queue().memcpy(vc, hv.data(), hv.size() * 4).wait()),
            "v");
         /*
-        DPCT1114:890: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -215,7 +215,7 @@ bool run(int fmt) {
         }
         for (auto& x : hq) x = nd(rng);
         /*
-        DPCT1114:891: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -224,7 +224,7 @@ bool run(int fmt) {
                                                               hids.size() * 4).wait()),
            "ids");
         /*
-        DPCT1114:892: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -233,7 +233,7 @@ bool run(int fmt) {
                                                               hst.size() * 4).wait()),
            "steps");
         /*
-        DPCT1114:893: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -298,7 +298,7 @@ bool run(int fmt) {
         std::vector<int32_t> hids((size_t) cap), hst = {(int32_t) (N - 1), (int32_t) N, (int32_t) (N / 4), (int32_t) width};
         for (int64_t i = 0; i < width; ++i) hids[i] = (int32_t) (N - width + i);   // the window's last cells
         /*
-        DPCT1114:894: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -307,7 +307,7 @@ bool run(int fmt) {
                                                               hids.size() * 4).wait()),
            "ids");
         /*
-        DPCT1114:895: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
index 79aede9c19c..5679df58a97 100644
--- a/sycl/src/kernels/ple_parity.cpp
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -209,7 +209,7 @@ int history_advance_regression() {
     float* history = history_storage + guard;
     float* norm = norm_storage + guard;
     /*
-    DPCT1114:944: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -221,7 +221,7 @@ int history_advance_regression() {
     dpct::experimental::command_graph_ptr graph;
     dpct::experimental::command_graph_exec_ptr executable;
     /*
-    DPCT1025:945: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     ck(DPCT_CHECK_ERROR(stream = dpct::get_current_device().create_queue(true)),
@@ -244,7 +244,7 @@ int history_advance_regression() {
             expected[c * rows + rows - 1] = normalized[c];
         }
         /*
-        DPCT1124:946: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -764,7 +764,7 @@ int main(int argc, char** argv) {
                             hcd * 4, dpct::get_in_order_queue())),
        "cr");
     /*
-    DPCT1114:947: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -773,7 +773,7 @@ int main(int argc, char** argv) {
            dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
        "cnk");
     /*
-    DPCT1114:948: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -782,7 +782,7 @@ int main(int argc, char** argv) {
            dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
        "cnq");
     /*
-    DPCT1114:949: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -791,7 +791,7 @@ int main(int argc, char** argv) {
            dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
        "cnc");
     /*
-    DPCT1114:950: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -800,7 +800,7 @@ int main(int argc, char** argv) {
            d_kc, key_codes.data(), key_codes.size()).wait()),
        "ckc");
     /*
-    DPCT1114:951: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -809,7 +809,7 @@ int main(int argc, char** argv) {
            d_vb, value_bf16.data(), value_bf16.size() * 2).wait()),
        "cvb");
     /*
-    DPCT1114:952: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -831,7 +831,7 @@ int main(int argc, char** argv) {
                             key_scales.size() * 4, dpct::get_in_order_queue())),
        "ks");
     /*
-    DPCT1114:953: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -861,7 +861,7 @@ int main(int argc, char** argv) {
     std::vector<float> hist_state = cap.hist;
     for (int t = 0; t < cap.nt; ++t) {
         /*
-        DPCT1114:954: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -870,7 +870,7 @@ int main(int argc, char** argv) {
                d_emb, cap.emb.data() + (size_t)t * nd, nd * 4).wait()),
            "cemb");
         /*
-        DPCT1114:955: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -879,7 +879,7 @@ int main(int argc, char** argv) {
                d_hid, cap.hidden.data() + (size_t)t * hcd, hcd * 4).wait()),
            "chid");
         /*
-        DPCT1114:956: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -1010,7 +1010,7 @@ int main(int argc, char** argv) {
                 reference_value[row] = float(sum);
             }
             /*
-            DPCT1114:957: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -1030,7 +1030,7 @@ int main(int argc, char** argv) {
                "legacy PLE witness value");
             dpct::queue_ptr stream;
             /*
-            DPCT1025:958: The SYCL queue is created ignoring the flag and
+            DPCT1025: The SYCL queue is created ignoring the flag and
             priority options.
             */
             ck(DPCT_CHECK_ERROR(
@@ -1089,7 +1089,7 @@ int main(int argc, char** argv) {
                    dpct::get_current_device().destroy_queue(stream)),
                "native PLE stream destroy");
             /*
-            DPCT1114:959: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -1147,7 +1147,7 @@ int main(int argc, char** argv) {
             void* native_data = static_cast<uint8_t*>(native_storage) + guard;
             void* native_q = static_cast<uint8_t*>(q_storage) + guard;
             /*
-            DPCT1114:960: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -1159,7 +1159,7 @@ int main(int argc, char** argv) {
             nw.key_native_data = native_data; nw.key_native_type = 42; nw.key_native_q8_1 = native_q;
             dpct::queue_ptr stream;
             /*
-            DPCT1025:961: The SYCL queue is created ignoring the flag and
+            DPCT1025: The SYCL queue is created ignoring the flag and
             priority options.
             */
             ck(DPCT_CHECK_ERROR(
@@ -1203,7 +1203,7 @@ int main(int argc, char** argv) {
             std::vector<float> projected(hcd), normalized(hcd), actual_key(hcd), actual_result(hcd), replay(hcd);
             for (int p = 0; p < std::min(cap.nt, 2); ++p) {
                 /*
-                DPCT1114:962: cudaMemcpy is migrated to asynchronization memcpy,
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
                 assuming in the original code the source host memory is pageable
                 memory. If the memory is not pageable, call wait() on event
                 return by memcpy API to ensure synchronization behavior.
@@ -1300,7 +1300,7 @@ int main(int argc, char** argv) {
                 sycl::free(q_storage, dpct::get_in_order_queue());
                 sycl::free(native_storage, dpct::get_in_order_queue());
             /*
-            DPCT1114:963: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -1354,7 +1354,7 @@ int main(int argc, char** argv) {
             std::printf("  PLE separate exports and in-place hidden result: %s\n", equal ? "byte-identical" : "FAIL");
             if (!equal) ++bad;
             /*
-            DPCT1114:964: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/qsa_parity.cpp b/sycl/src/kernels/qsa_parity.cpp
index e4c3df23b15..efbb202a202 100644
--- a/sycl/src/kernels/qsa_parity.cpp
+++ b/sycl/src/kernels/qsa_parity.cpp
@@ -92,7 +92,7 @@ struct Dev {
     void put(const std::vector<T>& v) {
         if (!p) alloc(v.size());
         /*
-        DPCT1114:1008: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index 5746b6c8a4b..645f21f878c 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -27,7 +27,7 @@ namespace k = strata::kernels;
 namespace {
 void ck(dpct::err0 e, const char *w) {
     /*
-    DPCT1009:788: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -39,7 +39,7 @@ template <typename T> T* up(const std::vector<T>& h) {
                                         dpct::get_in_order_queue())),
        "malloc");
     /*
-    DPCT1114:789: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/qsa_select_bench.cpp b/sycl/src/kernels/qsa_select_bench.cpp
index 6287a804bab..533237f9475 100644
--- a/sycl/src/kernels/qsa_select_bench.cpp
+++ b/sycl/src/kernels/qsa_select_bench.cpp
@@ -20,7 +20,7 @@ namespace k = strata::kernels;
 namespace {
 void ck(dpct::err0 e, const char *w) {
     /*
-    DPCT1009:603: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -32,7 +32,7 @@ template <typename T> T* up(const std::vector<T>& h) {
                                         dpct::get_in_order_queue())),
        "malloc");
     /*
-    DPCT1114:604: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/quantize_act_parity.cpp b/sycl/src/kernels/quantize_act_parity.cpp
index 8f3a15b1791..bc11b854085 100644
--- a/sycl/src/kernels/quantize_act_parity.cpp
+++ b/sycl/src/kernels/quantize_act_parity.cpp
@@ -84,7 +84,7 @@ int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
                                (size_t)n, dpct::get_in_order_queue())),
           "malloc back");
     /*
-    DPCT1114:1053: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
     in the original code the source host memory is pageable memory. If the
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -216,7 +216,7 @@ int run_case_k(const char* name, const std::vector<float>& x, bool check_bytes,
                                (size_t)n, dpct::get_in_order_queue())),
           "malloc back");
     /*
-    DPCT1114:1054: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
     in the original code the source host memory is pageable memory. If the
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/rope_parity.cpp b/sycl/src/kernels/rope_parity.cpp
index 0b7e5ad3b2b..ccb1df64080 100644
--- a/sycl/src/kernels/rope_parity.cpp
+++ b/sycl/src/kernels/rope_parity.cpp
@@ -107,7 +107,7 @@ int main(int argc, char** argv) {
                                pos.size(), dpct::get_in_order_queue())),
           "malloc pos");
     /*
-    DPCT1114:309: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -116,7 +116,7 @@ int main(int argc, char** argv) {
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "copy x");
     /*
-    DPCT1114:310: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -125,7 +125,7 @@ int main(int argc, char** argv) {
               d_cos, hcos.data(), hcos.size() * sizeof(float)).wait()),
           "copy cos");
     /*
-    DPCT1114:311: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -134,7 +134,7 @@ int main(int argc, char** argv) {
               d_sin, hsin.data(), hsin.size() * sizeof(float)).wait()),
           "copy sin");
     /*
-    DPCT1114:312: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -189,7 +189,7 @@ int main(int argc, char** argv) {
         e[0] = 1.0f;
         std::vector<float> o((size_t) head_dim, 0.0f);
         /*
-        DPCT1114:313: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/router_top10_parity.cpp b/sycl/src/kernels/router_top10_parity.cpp
index f492bd74dfb..b94e243a18a 100644
--- a/sycl/src/kernels/router_top10_parity.cpp
+++ b/sycl/src/kernels/router_top10_parity.cpp
@@ -79,7 +79,7 @@ int run_case(const char* name, const std::vector<float>& logits, int n_tokens, i
                                h_w.size(), dpct::get_in_order_queue())),
           "malloc w");
     /*
-    DPCT1114:853: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/s2_gemv_parity.cpp b/sycl/src/kernels/s2_gemv_parity.cpp
index 1f4bd0c2530..2f60eb51387 100644
--- a/sycl/src/kernels/s2_gemv_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_parity.cpp
@@ -125,7 +125,7 @@ int main(int argc, char** argv) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "cudaMalloc y");
     /*
-    DPCT1114:482: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -134,7 +134,7 @@ int main(int argc, char** argv) {
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
-    DPCT1114:483: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -143,7 +143,7 @@ int main(int argc, char** argv) {
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
-    DPCT1114:484: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/s2_gemv_q8_parity.cpp b/sycl/src/kernels/s2_gemv_q8_parity.cpp
index 53a5b0ad73a..4f2f89805e9 100644
--- a/sycl/src/kernels/s2_gemv_q8_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_q8_parity.cpp
@@ -74,7 +74,7 @@ int main(int argc, char** argv) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "m y2");
     /*
-    DPCT1114:931: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -83,7 +83,7 @@ int main(int argc, char** argv) {
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "c x");
     /*
-    DPCT1114:932: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -92,7 +92,7 @@ int main(int argc, char** argv) {
               d_codes, codes.data(), codes.size()).wait()),
           "c codes");
     /*
-    DPCT1114:933: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -198,7 +198,7 @@ int main(int argc, char** argv) {
                                hx.size(), dpct::get_in_order_queue())),
           "m hx");
     /*
-    DPCT1114:934: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
diff --git a/sycl/src/kernels/s_gemv_parity.cpp b/sycl/src/kernels/s_gemv_parity.cpp
index 9cd4972a01b..6ebbb46a700 100644
--- a/sycl/src/kernels/s_gemv_parity.cpp
+++ b/sycl/src/kernels/s_gemv_parity.cpp
@@ -247,7 +247,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "cudaMalloc y");
     /*
-    DPCT1114:393: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -256,7 +256,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
-    DPCT1114:394: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -265,7 +265,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
-    DPCT1114:395: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -274,7 +274,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
     /*
-    DPCT1114:396: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -367,7 +367,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "bench y");
     /*
-    DPCT1114:397: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -376,7 +376,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "bench copy x");
     /*
-    DPCT1114:398: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -385,7 +385,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
               d_codes, codes.data(), codes.size()).wait()),
           "bench copy codes");
     /*
-    DPCT1114:399: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -664,7 +664,7 @@ int main(int argc, char** argv) {
                                    (size_t)n_out, dpct::get_in_order_queue())),
               "cudaMalloc y");
         /*
-        DPCT1114:400: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -673,7 +673,7 @@ int main(int argc, char** argv) {
                   d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
               "copy x");
         /*
-        DPCT1114:401: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -682,7 +682,7 @@ int main(int argc, char** argv) {
                   d_codes, codes.data(), codes.size()).wait()),
               "copy codes");
         /*
-        DPCT1114:402: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/s_gemv_q8k_parity.cpp b/sycl/src/kernels/s_gemv_q8k_parity.cpp
index 9f572cf90b3..95f2894218c 100644
--- a/sycl/src/kernels/s_gemv_q8k_parity.cpp
+++ b/sycl/src/kernels/s_gemv_q8k_parity.cpp
@@ -123,7 +123,7 @@ int main(int argc, char** argv) {
                                    xq8k.size(), dpct::get_in_order_queue())),
               "xq");
         /*
-        DPCT1114:847: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -165,7 +165,7 @@ int main(int argc, char** argv) {
                       (size_t)n_out * 4, dpct::get_in_order_queue())),
               "y");
         /*
-        DPCT1114:848: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -174,7 +174,7 @@ int main(int argc, char** argv) {
                   d_codes, codes.data(), codes.size()).wait()),
               "cc");
         /*
-        DPCT1114:849: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -183,7 +183,7 @@ int main(int argc, char** argv) {
                   d_scales, scales.data(), scales.size() * 4).wait()),
               "cs");
         /*
-        DPCT1114:850: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -280,7 +280,7 @@ int main(int argc, char** argv) {
                           (size_t)n_in * 2, dpct::get_in_order_queue())),
                   "x16");
             /*
-            DPCT1114:851: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
index 46e140a5ba7..0ea1460803c 100644
--- a/sycl/src/kernels/sampler_parity.cpp
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -108,7 +108,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
                                (size_t)n_tokens, dpct::get_in_order_queue())),
           "malloc out");
     /*
-    DPCT1114:503: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -129,7 +129,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
                                    hist.size(), dpct::get_in_order_queue())),
               "malloc hist");
         /*
-        DPCT1114:504: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -372,7 +372,7 @@ int main(int argc, char** argv) {
                                    (size_t)NT, dpct::get_in_order_queue())),
               "m3");
         /*
-        DPCT1114:505: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -881,7 +881,7 @@ int main(int argc, char** argv) {
                                    count, dpct::get_in_order_queue())),
               "counter output");
         /*
-        DPCT1114:506: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/kernels/shared_expert_parity.cpp b/sycl/src/kernels/shared_expert_parity.cpp
index e6bd2654612..08e9a44d15d 100644
--- a/sycl/src/kernels/shared_expert_parity.cpp
+++ b/sycl/src/kernels/shared_expert_parity.cpp
@@ -227,7 +227,7 @@ int main(int argc, char** argv) {
                                (size_t)n_embd, dpct::get_in_order_queue())),
           "m out");
     /*
-    DPCT1114:334: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -236,7 +236,7 @@ int main(int argc, char** argv) {
               d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "c x");
     /*
-    DPCT1114:335: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -245,7 +245,7 @@ int main(int argc, char** argv) {
               dpct::get_in_order_queue().memcpy(d_gc, gc.data(), gc.size()).wait()),
           "c gc");
     /*
-    DPCT1114:336: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -254,7 +254,7 @@ int main(int argc, char** argv) {
               dpct::get_in_order_queue().memcpy(d_uc, uc.data(), uc.size()).wait()),
           "c uc");
     /*
-    DPCT1114:337: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -263,7 +263,7 @@ int main(int argc, char** argv) {
               dpct::get_in_order_queue().memcpy(d_dc, dc.data(), dc.size()).wait()),
           "c dc");
     /*
-    DPCT1114:338: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -272,7 +272,7 @@ int main(int argc, char** argv) {
               d_gs, gs.data(), gs.size() * sizeof(float)).wait()),
           "c gs");
     /*
-    DPCT1114:339: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -281,7 +281,7 @@ int main(int argc, char** argv) {
               d_us, us.data(), us.size() * sizeof(float)).wait()),
           "c us");
     /*
-    DPCT1114:340: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -290,7 +290,7 @@ int main(int argc, char** argv) {
               d_ds, ds.data(), ds.size() * sizeof(float)).wait()),
           "c ds");
     /*
-    DPCT1114:341: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -299,7 +299,7 @@ int main(int argc, char** argv) {
               d_ginp, ginp.data(), ginp.size() * sizeof(float)).wait()),
           "c ginp");
     /*
-    DPCT1114:342: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -308,7 +308,7 @@ int main(int argc, char** argv) {
               d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t)).wait()),
           "c xb");
     /*
-    DPCT1114:343: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -335,7 +335,7 @@ int main(int argc, char** argv) {
                                    hx0.size(), dpct::get_in_order_queue())),
               "x0");
         /*
-        DPCT1114:344: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -467,7 +467,7 @@ int main(int argc, char** argv) {
                                    witness.size(), dpct::get_in_order_queue())),
               "native shared x");
         /*
-        DPCT1114:345: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -480,7 +480,7 @@ int main(int argc, char** argv) {
                           d_dc, d_ds, nullptr, d_ginpb, d_scratch, d_out, n_embd, n_ff, tpr, stream, x_float);
         };
         /*
-        DPCT1114:346: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -496,7 +496,7 @@ int main(int argc, char** argv) {
                                    .wait()),
               "half shared output");
         /*
-        DPCT1114:347: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -505,7 +505,7 @@ int main(int argc, char** argv) {
                   d_ginpb, basis.data(), basis.size() * sizeof(uint16_t)).wait()),
               "basis shared gate");
         /*
-        DPCT1114:348: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -526,7 +526,7 @@ int main(int argc, char** argv) {
         if (!refused_missing) ++bad;
         dpct::queue_ptr stream;
         /*
-        DPCT1025:349: The SYCL queue is created ignoring the flag and priority
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
         options.
         */
         check(DPCT_CHECK_ERROR(
@@ -585,7 +585,7 @@ int main(int argc, char** argv) {
             DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(stream)),
             "native shared stream destroy");
         /*
-        DPCT1114:350: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -595,7 +595,7 @@ int main(int argc, char** argv) {
                   hginp_bf16.size() * sizeof(uint16_t)).wait()),
               "restore shared gate");
         /*
-        DPCT1114:351: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -668,7 +668,7 @@ int main(int argc, char** argv) {
                       (size_t)n_embd2 * 4, dpct::get_in_order_queue())),
               "mc y");
         /*
-        DPCT1114:352: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -677,7 +677,7 @@ int main(int argc, char** argv) {
                   d_p, parts.data(), parts.size() * 4).wait()),
               "mc cp");
         /*
-        DPCT1114:353: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -686,7 +686,7 @@ int main(int argc, char** argv) {
                                                                  w.size() * 4).wait()),
               "mc cw");
         /*
-        DPCT1114:354: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
diff --git a/sycl/src/prefill/gemm.dp.cpp b/sycl/src/prefill/gemm.dp.cpp
index 1f1f362ba96..3a683a7a8a8 100644
--- a/sycl/src/prefill/gemm.dp.cpp
+++ b/sycl/src/prefill/gemm.dp.cpp
@@ -7,10 +7,34 @@
 #include "strata/kernels/dequant_bf16.hpp"
 #include <dpct/blas_utils.hpp>
 
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+// The HIP compatibility shim maps CUDA shuffle spellings to Strata helpers.
+// hipBLASLt's public headers declare native HIP shuffle functions, so keep
+// those declarations from being macro-expanded in this translation unit.
+#undef __shfl_xor_sync
+#undef __shfl_down_sync
+#undef __shfl_up_sync
+#undef __shfl_sync
+#undef __ballot_sync
+#endif
+
+#include <climits>
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
+#include <memory>
 #include <dpct/lib_common_utils.hpp>
 
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+#include "hipblaslt_tuning.hpp"
+#include <hip/hip_runtime_api.h>
+#include <hipblaslt/hipblaslt.h>
+#include <hipblaslt/hipblaslt-ext.hpp>
+#include <map>
+#include <set>
+#include <tuple>
+#endif
+
 namespace strata::prefill {
 namespace {
 
@@ -21,9 +45,239 @@ void ck(int s, const char *what) {
     }
 }
 
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+struct HipLtCallKey {
+    strata::prefill::hipblaslt::InputType type;
+    int t;
+    int n;
+    int k;
+    int ldy;
+    uint32_t beta_bits;
+
+    bool operator<(const HipLtCallKey& other) const {
+        return std::tie(type, n, k, ldy, t, beta_bits) <
+               std::tie(other.type, other.n, other.k, other.ldy, other.t, other.beta_bits);
+    }
+};
+
+struct HipLtCachedAlgo {
+    bool supported = false;
+    hipblasLtMatmulAlgo_t algo{};
+    size_t workspace_bytes = 0;
+};
+
+struct HipLtState {
+    hipblasLtHandle_t handle = nullptr;
+    void* workspace = nullptr;
+    size_t workspace_bytes = 0;
+    strata::prefill::hipblaslt::TuningTable table;
+    std::map<HipLtCallKey, HipLtCachedAlgo> cache;
+    uint64_t lt_launches = 0;
+    uint64_t fallbacks = 0;
+    std::set<std::tuple<strata::prefill::hipblaslt::InputType, int, int, int, int>> fallback_shapes;
+
+    ~HipLtState() {
+        if (std::getenv("STRATA_HIPBLASLT_VERBOSE")) {
+            std::fprintf(stderr, "prefill gemm: hipBLASLt summary launches=%llu fallbacks=%llu unique_fallback_shapes=%zu\n",
+                         (unsigned long long) lt_launches, (unsigned long long) fallbacks, fallback_shapes.size());
+            for (const auto& shape : fallback_shapes) {
+                const auto type = std::get<0>(shape);
+                std::fprintf(stderr, "prefill gemm: fallback shape dtype=%s T=%d N=%d K=%d ldy=%d\n",
+                             type == strata::prefill::hipblaslt::InputType::bf16 ? "bf16" : "f16",
+                             std::get<1>(shape), std::get<2>(shape), std::get<3>(shape), std::get<4>(shape));
+            }
+        }
+        if (handle) hipblasLtDestroy(handle);
+    }
+};
+
+struct HipLtDescriptors {
+    hipblasLtMatmulDesc_t op = nullptr;
+    hipblasLtMatrixLayout_t a = nullptr;
+    hipblasLtMatrixLayout_t b = nullptr;
+    hipblasLtMatrixLayout_t c = nullptr;
+
+    ~HipLtDescriptors() {
+        if (op) hipblasLtMatmulDescDestroy(op);
+        if (a) hipblasLtMatrixLayoutDestroy(a);
+        if (b) hipblasLtMatrixLayoutDestroy(b);
+        if (c) hipblasLtMatrixLayoutDestroy(c);
+    }
+
+    bool init(hipDataType type, int t, int n, int k, int ldy) {
+        const hipblasOperation_t trans_a = HIPBLAS_OP_T;
+        const hipblasOperation_t trans_b = HIPBLAS_OP_N;
+        if (hipblasLtMatmulDescCreate(&op, HIPBLAS_COMPUTE_32F, HIP_R_32F) != HIPBLAS_STATUS_SUCCESS ||
+            hipblasLtMatmulDescSetAttribute(op, HIPBLASLT_MATMUL_DESC_TRANSA, &trans_a, sizeof(trans_a)) !=
+                HIPBLAS_STATUS_SUCCESS ||
+            hipblasLtMatmulDescSetAttribute(op, HIPBLASLT_MATMUL_DESC_TRANSB, &trans_b, sizeof(trans_b)) !=
+                HIPBLAS_STATUS_SUCCESS ||
+            hipblasLtMatrixLayoutCreate(&a, type, k, n, k) != HIPBLAS_STATUS_SUCCESS ||
+            hipblasLtMatrixLayoutCreate(&b, type, k, t, k) != HIPBLAS_STATUS_SUCCESS ||
+            hipblasLtMatrixLayoutCreate(&c, HIP_R_32F, n, t, ldy) != HIPBLAS_STATUS_SUCCESS) {
+            return false;
+        }
+        return true;
+    }
+};
+
+std::unique_ptr<HipLtState> create_hipblaslt_state(void* workspace, size_t workspace_bytes) {
+    const char* path = std::getenv("STRATA_HIPBLASLT_TUNING");
+    if (!path || !*path) return nullptr;
+
+    auto state = std::make_unique<HipLtState>();
+    state->workspace = workspace;
+    state->workspace_bytes = workspace_bytes;
+    if (hipblasLtCreate(&state->handle) != HIPBLAS_STATUS_SUCCESS) {
+        std::fprintf(stderr, "prefill gemm: hipBLASLt handle creation failed; using hipBLASEx\n");
+        return nullptr;
+    }
+
+    int version = 0;
+    if (hipblasLtGetVersion(state->handle, &version) != HIPBLAS_STATUS_SUCCESS) {
+        std::fprintf(stderr, "prefill gemm: hipBLASLt version query failed; using hipBLASEx\n");
+        return nullptr;
+    }
+    int device = 0;
+    hipDeviceProp_t properties{};
+    if (hipGetDevice(&device) != hipSuccess || hipGetDeviceProperties(&properties, device) != hipSuccess) {
+        std::fprintf(stderr, "prefill gemm: HIP device query failed; using hipBLASEx\n");
+        return nullptr;
+    }
+    std::string arch(properties.gcnArchName);
+    const auto suffix = arch.find(':');
+    if (suffix != std::string::npos) arch.resize(suffix);
+
+    std::string error;
+    if (!state->table.load(path, arch, version, error)) {
+        std::fprintf(stderr, "prefill gemm: %s; using hipBLASEx\n", error.c_str());
+        return nullptr;
+    }
+    std::fprintf(stderr, "prefill gemm: hipBLASLt tuning enabled (%zu rows, %s, version %d)\n",
+                 state->table.rows().size(), arch.c_str(), version);
+    return state;
+}
+
+HipLtCachedAlgo resolve_hipblaslt_algo(HipLtState& state, strata::prefill::hipblaslt::InputType type, int t,
+                                       int n, int k, int ldy, float beta) {
+    uint32_t beta_bits = 0;
+    static_assert(sizeof(beta_bits) == sizeof(beta));
+    std::memcpy(&beta_bits, &beta, sizeof(beta));
+    const HipLtCallKey key{type, t, n, k, ldy, beta_bits};
+    const auto cached = state.cache.find(key);
+    if (cached != state.cache.end()) return cached->second;
+
+    HipLtCachedAlgo resolved;
+    const bool verbose = std::getenv("STRATA_HIPBLASLT_VERBOSE") != nullptr;
+    const auto* row = state.table.closest(type, n, k, ldy, t);
+    if (!row) {
+        if (verbose) {
+            std::fprintf(stderr, "prefill gemm: Lt fallback; no calibration for dtype=%s T=%d N=%d K=%d ldy=%d\n",
+                         type == strata::prefill::hipblaslt::InputType::bf16 ? "bf16" : "f16", t, n, k, ldy);
+        }
+        return state.cache.emplace(key, resolved).first->second;
+    }
+
+    HipLtDescriptors desc;
+    const hipDataType input_type = type == strata::prefill::hipblaslt::InputType::bf16 ? HIP_R_16BF : HIP_R_16F;
+    if (!desc.init(input_type, t, n, k, ldy)) {
+        return state.cache.emplace(key, resolved).first->second;
+    }
+
+    std::vector<int> solution_ids{row->solution_id};
+    std::vector<hipblasLtMatmulHeuristicResult_t> candidates;
+    if (hipblaslt_ext::getAlgosFromIndex(state.handle, solution_ids, candidates) != HIPBLAS_STATUS_SUCCESS ||
+        candidates.empty() || candidates.front().state != HIPBLAS_STATUS_SUCCESS ||
+        hipblaslt_ext::getIndexFromAlgo(candidates.front().algo) != row->solution_id) {
+        if (verbose) {
+            std::fprintf(stderr, "prefill gemm: Lt fallback; solution %d unavailable for T=%d N=%d K=%d ldy=%d\n",
+                         row->solution_id, t, n, k, ldy);
+        }
+        return state.cache.emplace(key, resolved).first->second;
+    }
+
+    const float alpha = 1.0f;
+    size_t required_workspace = 0;
+    auto algo = candidates.front().algo;
+    if (hipblaslt_ext::matmulIsAlgoSupported(state.handle, desc.op, &alpha, desc.a, desc.b, &beta, desc.c, desc.c,
+                                             algo, required_workspace) != HIPBLAS_STATUS_SUCCESS) {
+        if (verbose) {
+            std::fprintf(stderr, "prefill gemm: Lt fallback; solution %d rejects actual T=%d N=%d K=%d ldy=%d beta=%.9g\n",
+                         row->solution_id, t, n, k, ldy, beta);
+        }
+        return state.cache.emplace(key, resolved).first->second;
+    }
+
+    resolved.supported = true;
+    resolved.algo = algo;
+    resolved.workspace_bytes = required_workspace;
+    if (verbose) {
+        std::fprintf(stderr,
+                     "prefill gemm: Lt solution=%d dtype=%s T=%d N=%d K=%d ldy=%d beta=%.9g workspace=%zu\n",
+                     row->solution_id, type == strata::prefill::hipblaslt::InputType::bf16 ? "bf16" : "f16", t, n,
+                     k, ldy, beta, required_workspace);
+    }
+    return state.cache.emplace(key, resolved).first->second;
+}
+
+bool try_hipblaslt(void* opaque_state, strata::prefill::hipblaslt::InputType type, const uint16_t* x,
+                   const uint16_t* w, float* y, int64_t t, int64_t n, int64_t k, int64_t ldy, float beta,
+                   void* stream) {
+    auto* state = static_cast<HipLtState*>(opaque_state);
+    if (!state || t <= 0 || n <= 0 || k <= 0 || t > INT_MAX || n > INT_MAX || k > INT_MAX || ldy > INT_MAX ||
+        ldy < n) {
+        return false;
+    }
+    const auto resolved = resolve_hipblaslt_algo(*state, type, (int) t, (int) n, (int) k, (int) ldy, beta);
+    if (!resolved.supported) {
+        ++state->fallbacks;
+        state->fallback_shapes.emplace(type, (int) t, (int) n, (int) k, (int) ldy);
+        return false;
+    }
+    if (resolved.workspace_bytes > state->workspace_bytes) {
+        ++state->fallbacks;
+        state->fallback_shapes.emplace(type, (int) t, (int) n, (int) k, (int) ldy);
+        if (std::getenv("STRATA_HIPBLASLT_VERBOSE")) {
+            std::fprintf(stderr, "prefill gemm: Lt fallback; solution needs %zu workspace bytes, have %zu\n",
+                         resolved.workspace_bytes, state->workspace_bytes);
+        }
+        return false;
+    }
+
+    HipLtDescriptors desc;
+    const hipDataType input_type = type == strata::prefill::hipblaslt::InputType::bf16 ? HIP_R_16BF : HIP_R_16F;
+    if (!desc.init(input_type, (int) t, (int) n, (int) k, (int) ldy)) return false;
+    const float alpha = 1.0f;
+    const hipblasStatus_t status = hipblasLtMatmul(state->handle, desc.op, &alpha, w, desc.a, x, desc.b, &beta, y,
+                                                   desc.c, y, desc.c, &resolved.algo, state->workspace,
+                                                   state->workspace_bytes, (hipStream_t) stream);
+    if (status == HIPBLAS_STATUS_SUCCESS) {
+        ++state->lt_launches;
+        return true;
+    }
+
+    std::fprintf(stderr, "prefill gemm: hipBLASLt launch failed with status %d\n", (int) status);
+    if (beta != 0.0f) {
+        std::fprintf(stderr, "prefill gemm: refusing a fallback after hipBLASLt failed with nonzero beta\n");
+        std::exit(1);
+    }
+    auto* mutable_state = static_cast<HipLtState*>(opaque_state);
+    uint32_t beta_bits = 0;
+    std::memcpy(&beta_bits, &beta, sizeof(beta_bits));
+    auto cached = mutable_state->cache.find(HipLtCallKey{type, (int) t, (int) n, (int) k, (int) ldy, beta_bits});
+    if (cached != mutable_state->cache.end()) cached->second.supported = false;
+    ++mutable_state->fallbacks;
+    mutable_state->fallback_shapes.emplace(type, (int) t, (int) n, (int) k, (int) ldy);
+    return false;
+}
+#endif
+
 }  // namespace
 
 Gemm::~Gemm() {
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    delete static_cast<HipLtState*>(hipblaslt_state_);
+#endif
     if (handle_) delete ((dpct::blas::descriptor_ptr)handle_);
     if (!external_) {
         if (scratch_) sycl::free(scratch_, dpct::get_in_order_queue());
@@ -44,12 +298,15 @@ bool Gemm::init_external(void *stream, uint16_t *scratch, int64_t scratch_elems,
     h->set_queue(strata::q_of(stream));
     workspace_ = workspace;
     /*
-    DPCT1026:1144: The call to cublasSetWorkspace was removed because this
+    DPCT1026: The call to cublasSetWorkspace was removed because this
     functionality is redundant in SYCL.
     */
     h->set_math_mode(dpct::blas::math_mode::mm_default);
     scratch_ = scratch;
     scratch_elems_ = scratch_elems;
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    hipblaslt_state_ = create_hipblaslt_state(workspace_, ws_bytes).release();
+#endif
     return true;
 }
 catch (sycl::exception const &exc) {
@@ -63,9 +320,16 @@ void Gemm::rebind(uint16_t* scratch, int64_t scratch_elems, void* workspace, siz
     scratch_elems_ = scratch_elems;
     workspace_ = workspace;
     /*
-    DPCT1026:1145: The call to cublasSetWorkspace was removed because this
+    DPCT1026: The call to cublasSetWorkspace was removed because this
     functionality is redundant in SYCL.
     */
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    if (hipblaslt_state_) {
+        auto* state = static_cast<HipLtState*>(hipblaslt_state_);
+        state->workspace = workspace_;
+        state->workspace_bytes = ws_bytes;
+    }
+#endif
 }
 
 bool Gemm::init(void *stream, int64_t scratch_elems, std::string &err) try {
@@ -83,10 +347,13 @@ bool Gemm::init(void *stream, int64_t scratch_elems, std::string &err) try {
         err = "prefill gemm: workspace"; return false;
     }
     /*
-    DPCT1026:1146: The call to cublasSetWorkspace was removed because this
+    DPCT1026: The call to cublasSetWorkspace was removed because this
     functionality is redundant in SYCL.
     */
     h->set_math_mode(dpct::blas::math_mode::mm_default);
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    hipblaslt_state_ = create_hipblaslt_state(workspace_, ws).release();
+#endif
     if (scratch_elems > 0 &&
         DPCT_CHECK_ERROR(
             scratch_ = (uint16_t *)sycl::malloc_device(
@@ -108,6 +375,12 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
     if (T <= 0 || N <= 0) return;
     if (ldy <= 0) ldy = N;
     const float alpha = 1.0f;
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    if (try_hipblaslt(hipblaslt_state_, strata::prefill::hipblaslt::InputType::bf16, X, W, Y, T, N, K, ldy,
+                      beta, stream_)) {
+        return;
+    }
+#endif
     // Column-major view: Y^T[N, T] = W[N, K] (stored K x N col-major, transposed) . X^T[K, T].
     ck(DPCT_CHECK_ERROR(dpct::blas::gemm(
            (dpct::blas::descriptor_ptr)handle_, oneapi::mkl::transpose::trans,
@@ -124,6 +397,12 @@ void Gemm::f16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_
     if (T <= 0 || N <= 0) return;
     if (ldy <= 0) ldy = N;
     const float alpha = 1.0f;
+#if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
+    if (try_hipblaslt(hipblaslt_state_, strata::prefill::hipblaslt::InputType::f16, X, W, Y, T, N, K, ldy,
+                      beta, stream_)) {
+        return;
+    }
+#endif
     ck(DPCT_CHECK_ERROR(dpct::blas::gemm(
            (dpct::blas::descriptor_ptr)handle_, oneapi::mkl::transpose::trans,
            oneapi::mkl::transpose::nontrans, (int)N, (int)T, (int)K, &alpha, W,
diff --git a/sycl/src/prefill/ggml_cuda_host.dp.cpp b/sycl/src/prefill/ggml_cuda_host.dp.cpp
index 480a6addd25..257d1784790 100644
--- a/sycl/src/prefill/ggml_cuda_host.dp.cpp
+++ b/sycl/src/prefill/ggml_cuda_host.dp.cpp
@@ -35,24 +35,24 @@ const ggml_cuda_device_info & ggml_cuda_info() {
                 DPCT_CHECK_ERROR(dpct::get_device(id).get_device_info(prop)));
             auto & d = in.devices[id];
             /*
-            DPCT1005:790: The SYCL device version is different from CUDA Compute
+            DPCT1005: The SYCL device version is different from CUDA Compute
             Compatibility. You may need to rewrite this code.
             */
             d.cc =
                 100 * prop.get_major_version() + 10 * prop.get_minor_version();
             d.nsm(prop.set_max_compute_units);
             /*
-            DPCT1019:791: local_mem_size in SYCL is not a complete equivalent of
+            DPCT1019: local_mem_size in SYCL is not a complete equivalent of
             sharedMemPerBlock in CUDA. You may need to adjust the code.
             */
             d.smpb(prop.set_local_mem_size);
             /*
-            DPCT1019:792: local_mem_size in SYCL is not a complete equivalent of
+            DPCT1019: local_mem_size in SYCL is not a complete equivalent of
             sharedMemPerBlockOptin in CUDA. You may need to adjust the code.
             */
             d.smpbo(prop.set_local_mem_size);
             /*
-            DPCT1006:793: SYCL does not provide a standard API to differentiate
+            DPCT1006: SYCL does not provide a standard API to differentiate
             between integrated and discrete GPU devices.
             */
             d.integrated = prop.get_integrated() != 0;
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index 17a4fe8f6ef..81c0523da9e 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -21,7 +21,7 @@ constexpr int S = 128, HK = 16, HV = 48, C = 10240;
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
     /*
-    DPCT1108:247: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -34,7 +34,7 @@ __dpct_inline__ float warp_sum(float v) {
 __dpct_inline__ float warp_max(float v) {
 #pragma unroll
     /*
-    DPCT1108:248: '__shfl_xor_sync' was migrated with the experimental feature
+    DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
     masked sub_group function which may not be supported by all compilers or
     runtimes. You may need to adjust the code.
     */
@@ -64,14 +64,14 @@ inline float block_sum(float v, float *sh) {
               w = item_ct1.get_local_id(2) >> 5;
     v = warp_sum(v);
     /*
-    DPCT1065:986: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
     item_ct1.barrier();
     if (lane == 0) sh[w] = v;
     /*
-    DPCT1065:987: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -82,7 +82,7 @@ inline float block_sum(float v, float *sh) {
     if (w == 0) t = warp_sum(t);
     if (item_ct1.get_local_id(2) == 0) sh[0] = t;
     /*
-    DPCT1065:988: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -91,13 +91,13 @@ inline float block_sum(float v, float *sh) {
 }
 void check(const char* what) {
     /*
-    DPCT1010:989: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
     const dpct::err0 e = 0;
     /*
-    DPCT1009:990: SYCL reports errors using exceptions and does not use error
+    DPCT1009: SYCL reports errors using exceptions and does not use error
     codes. Please replace the "get_error_string_dummy(...)" with a real
     error-handling function.
     */
@@ -127,6 +127,85 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
         xn16[row * N + d] = bf(v);
     }
 }
+// F-1: the row scale only (and the BF16 image); gr_mix_r_kernel recomputes r * rs * w itself, in the same order,
+// so the FP32 copy of the normalized rows (T x 10240 floats) is neither written nor read
+__dpct_inline__ void gr_norm_rs_kernel(const float *__restrict__ R,
+                                       const float *__restrict__ w, float eps,
+                                       float *__restrict__ rs_out,
+                                       uint16_t *__restrict__ xn16) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t row = item_ct1.get_group(2); // t * 4 + c
+    const int c = (int) (row % HC);
+    const float* r = R + row * N;
+    float ss = 0.0f;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < N;
+         d += item_ct1.get_local_range(2)) ss += r[d] * r[d];
+    const float rs = sycl::rsqrt(block_sum(ss, sh) / (float)N + eps);
+    if (item_ct1.get_local_id(2) == 0) rs_out[row] = rs;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < N;
+         d += item_ct1.get_local_range(2))
+        xn16[row * N + d] = bf(r[d] * rs * w[c * N + d]);
+}
+__dpct_inline__ void
+gr_mix_r_kernel(const float *__restrict__ R, const float *__restrict__ rs,
+                const float *__restrict__ w, const float *__restrict__ g,
+                float *__restrict__ mixed, uint16_t *__restrict__ mixed16,
+                int64_t T, uint16_t *__restrict__ mixed_h) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t i =
+        (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= T * N) return;
+    const int64_t t = i / N, d = i % N;
+    float s = 0.0f;
+#pragma unroll
+    for (int c = 0; c < HC; ++c) {
+        const int64_t j = t * D + c * N + d;
+        const float x = R[j] * rs[t * HC + c] * w[c * N + d];   // gr_norm_kernel's value, bit for bit
+        s = sycl::fma((float)x, sigm(g[j]), s);
+    }
+    s /= (float) HC;
+    mixed[i] = s;
+    if (mixed16) mixed16[i] = bf(s);
+    if (mixed_h) mixed_h[i] = hf(s);
+}
+// F-2: gr_write_kernel for one row (t, c), then gr_norm_rs_kernel's reduction over it with the next half's norm
+// weights - the same thread-to-element mapping (256 threads, stride 256) and block_sum, so rs and the BF16 image are
+// the same bits, and R is not read back
+constexpr int GRW_PER = (N + 255) / 256;
+__dpct_inline__ void gr_write_norm_rs_kernel(
+    float *__restrict__ R, const float *__restrict__ bo,
+    const float *__restrict__ inj, int64_t inj_ld, const float *__restrict__ w,
+    float eps, float *__restrict__ rs_out, uint16_t *__restrict__ xn16) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int64_t row = item_ct1.get_group(2); // t * 4 + c
+    const int64_t t = row / HC;
+    const int c = (int) (row % HC);
+    float* r = R + row * N;
+    const float sc = 2.0f * sigm(inj[t * inj_ld + c] / (float) HC);
+    float v[GRW_PER];
+    float ss = 0.0f;
+    int k = 0;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < N; d += 256, ++k) {
+        const float x = sycl::fma((float)(bo[t * N + d]), (float)sc, r[d]);
+        r[d] = x;
+        v[k] = x;
+        ss += x * x;
+    }
+    const float rs = sycl::rsqrt(block_sum(ss, sh) / (float)N + eps);
+    if (item_ct1.get_local_id(2) == 0) rs_out[row] = rs;
+    k = 0;
+#pragma unroll
+    for (int d = item_ct1.get_local_id(2); d < N; d += 256, ++k)
+        xn16[row * N + d] = bf(v[k] * rs * w[c * N + d]);
+}
 __dpct_inline__ void gr_silu_kernel(const float *__restrict__ lo,
                                     uint16_t *__restrict__ lo16, int64_t n) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -271,7 +350,7 @@ __dpct_inline__ void gdn_l2_kernel(float *__restrict__ h, float eps) {
     if ((item_ct1.get_local_id(2) & 31) == 0)
         part[item_ct1.get_local_id(2) >> 5] = sq;
     /*
-    DPCT1065:991: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -281,7 +360,7 @@ __dpct_inline__ void gdn_l2_kernel(float *__restrict__ h, float eps) {
 }
 constexpr int RG = 4, RPG = S / RG;
 /*
-DPCT1110:249: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gdn_rec_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -315,22 +394,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
     for (int64_t t = 0; t < T; ++t) {
         const float* ht = h + t * C;
         /*
-        DPCT1118:250: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:992: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
         if (tid < S) { sq[tid] = ht[qh * S + tid]; sk[tid] = ht[HK * S + qh * S + tid]; }
         /*
-        DPCT1118:251: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:993: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -342,11 +421,11 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
         red[rg][col] = kv;
         /*
-        DPCT1118:252: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:994: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -360,22 +439,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             o = sycl::fma(s[r], sq[rg * RPG + r], o);
         }
         /*
-        DPCT1118:253: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:995: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
         red[rg][col] = o;
         /*
-        DPCT1118:254: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:996: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -389,11 +468,11 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
         sp = warp_sum(sp);
         if ((tid & 31) == 0) wsum[tid >> 5] = sp;
         /*
-        DPCT1118:255: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:997: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -416,7 +495,7 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
 // red[0] + red[1] + red[2] + red[3]; the norm's warp sums over the same 32-column warps): the same bits.
 constexpr int CB = 32, NCB = S / CB;
 /*
-DPCT1110:256: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 gdn_rec_cols_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -448,22 +527,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
     for (int64_t t = 0; t < T; ++t) {
         const float* ht = h + t * C;
         /*
-        DPCT1118:257: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:998: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
         if (tid < S) { sq[tid] = ht[qh * S + tid]; sk[tid] = ht[HK * S + qh * S + tid]; }
         /*
-        DPCT1118:258: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:999: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -475,11 +554,11 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
         red[rg][c] = kv;
         /*
-        DPCT1118:259: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:1000: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -493,22 +572,22 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
             o = sycl::fma(s[r], sq[rg * RPG + r], o);
         }
         /*
-        DPCT1118:260: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:1001: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
         red[rg][c] = o;
         /*
-        DPCT1118:261: SYCL group functions and algorithms must be encountered in
+        DPCT1118: SYCL group functions and algorithms must be encountered in
         converged control flow. You may need to adjust the code.
         */
         /*
-        DPCT1065:1002: Consider replacing sycl::nd_item::barrier() with
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
         sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
         better performance if there is no access to global memory.
         */
@@ -534,7 +613,7 @@ auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
     float sp = warp_sum(oc * oc);
     if ((col & 31) == 0) wsum[col >> 5] = sp;
     /*
-    DPCT1065:1003: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -549,7 +628,7 @@ auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
 // ---------------------------------------------------------------- MoE
 template <int REG>
 /*
-DPCT1110:264: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 route_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -590,7 +669,7 @@ __dpct_inline__ void route_kernel(const float *__restrict__ logits,
 #pragma unroll
         for (int m = 16; m; m >>= 1) {
             /*
-            DPCT1108:262: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -598,7 +677,7 @@ __dpct_inline__ void route_kernel(const float *__restrict__ logits,
                 0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
                 best, m);
             /*
-            DPCT1108:263: '__shfl_xor_sync' was migrated with the experimental
+            DPCT1108: '__shfl_xor_sync' was migrated with the experimental
             feature masked sub_group function which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -617,7 +696,7 @@ __dpct_inline__ void route_kernel(const float *__restrict__ logits,
 // Strata blob: gate/up codes [1280][640 B], down codes [2560][160 B], gate/up scales [1280][40] f16, down scales [2560][10] f16
 template <bool HALF>
 /*
-DPCT1110:265: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 blob_dequant_kernel exceeds 128 bytes and may cause high register pressure.
 Consult with your hardware vendor to find the total register size available and
 adjust the code, or use smaller sub-group size to avoid high register pressure.
@@ -727,7 +806,7 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
          c += item_ct1.get_local_range(2)) ss += r[c] * r[c];
     const float s = sycl::rsqrt(block_sum(ss, sh) / (float)cols + eps);
     /*
-    DPCT1065:1004: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -805,7 +884,7 @@ kv_append_kernel(const float *__restrict__ K, const float *__restrict__ V,
     }
     float a = sycl::fabs(x);
     /*
-DPCT1108:266: '__shfl_xor_sync' was migrated with the experimental feature
+DPCT1108: '__shfl_xor_sync' was migrated with the experimental feature
 masked sub_group function which may not be supported by all compilers or
 runtimes. You may need to adjust the code.
 */
@@ -819,7 +898,7 @@ runtimes. You may need to adjust the code.
     if ((item_ct1.get_local_id(2) & 31) == 0)
         wm[item_ct1.get_local_id(2) >> 5] = a;
     /*
-    DPCT1065:1005: Consider replacing sycl::nd_item::barrier() with
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
     performance if there is no access to global memory.
     */
@@ -908,7 +987,7 @@ void kv_append(const float* K, const float* V, int64_t T, int64_t pos0, const in
                         stage ? *stage : strata::kernels::KvHostPools{};
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class kv_append_kernel_7ad9e6>>(
+                    dpct_kernel_name<class kv_append_kernel_c8a7c1>>(
                     sycl::nd_range<3>(sycl::range(8, 2, (unsigned)T) *
                                           sycl::range(1, 1, 64),
                                       sycl::range(1, 1, 64)),
@@ -932,7 +1011,7 @@ void to_f16(const float* x, uint16_t* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class to_f16_kernel_a5739f>>(
+            ->parallel_for<dpct_kernel_name<class to_f16_kernel_286314>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -952,7 +1031,7 @@ void round_f16(const float* x, float* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class round_f16_kernel_52fbb2>>(
+            ->parallel_for<dpct_kernel_name<class round_f16_kernel_3fea66>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -972,7 +1051,7 @@ void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_265df0>>(
+            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_b87029>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -992,7 +1071,7 @@ void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_norm_kernel_f823fa>>(
+            ->parallel_for<dpct_kernel_name<class gr_norm_kernel_7ac11f>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1004,6 +1083,63 @@ void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t
     }
     check("gr_norm");
 }
+void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint16_t* xn16, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_norm_rs_kernel_44cb02>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_norm_rs_kernel(R, w_norm, eps, rs, xn16);
+                    });
+    }
+    check("gr_norm_rs");
+}
+void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float* gated, float* mixed, uint16_t* mixed16,
+              int64_t T, void* stream, uint16_t* mixed_h) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class gr_mix_r_kernel_c2a1de>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    gr_mix_r_kernel(R, rs, w_norm, gated, mixed, mixed16, T,
+                                    mixed_h);
+                });
+    }
+    check("gr_mix_r");
+}
+void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_ld, const float* w_norm_next, float eps,
+                      float* rs, uint16_t* xn16, int64_t T, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class gr_write_norm_rs_kernel_d03793>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
+                                      sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_write_norm_rs_kernel(R, bo, inj, inj_ld, w_norm_next,
+                                                eps, rs, xn16);
+                    });
+    }
+    check("gr_write_norm_rs");
+}
 void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
@@ -1013,7 +1149,7 @@ void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream) {
             ->submit([&](sycl::handler &cgh) {
                 auto T_LR_ct2 = T * LR;
 
-                cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_73e336>>(
+                cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_61274c>>(
                     sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * LR)) *
                                           sycl::range(1, 1, 256),
                                       sycl::range(1, 1, 256)),
@@ -1031,7 +1167,7 @@ void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_mix_kernel_97138e>>(
+            ->parallel_for<dpct_kernel_name<class gr_mix_kernel_9ba6d6>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1047,7 +1183,7 @@ void gr_write(float* R, const float* bo, const float* inj, int64_t inj_ld, int64
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_write_kernel_b029eb>>(
+            ->parallel_for<dpct_kernel_name<class gr_write_kernel_24cfed>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1063,7 +1199,7 @@ void gr_broadcast(const float* e, float* R, int64_t T, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_broadcast_kernel_a3b6f7>>(
+            ->parallel_for<dpct_kernel_name<class gr_broadcast_kernel_73ae1d>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1079,7 +1215,7 @@ void gdn_gates(const float* ab, const float* dt, const float* ssm_a, float* gate
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_gates_kernel_7a43f1>>(
+            ->parallel_for<dpct_kernel_name<class gdn_gates_kernel_850222>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * HV)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1096,7 +1232,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_2ae161>>(
+            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_8fa65c>>(
                 sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
                                       sycl::range(1, 1, 128),
                                   sycl::range(1, 1, 128)),
@@ -1110,7 +1246,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_conv_tiled_kernel_f8dcbd>>(
+                    dpct_kernel_name<class gdn_conv_tiled_kernel_915839>>(
                     sycl::nd_range<3>(
                         sycl::range(1,
                                     (unsigned)((T + CONV_TILE - 1) / CONV_TILE),
@@ -1127,7 +1263,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_conv_hist_kernel_e10b4d>>(
+                    dpct_kernel_name<class gdn_conv_hist_kernel_1d17e3>>(
                     sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
                                           sycl::range(1, 1, 128),
                                       sycl::range(1, 1, 128)),
@@ -1141,7 +1277,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_502355>>(
+            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_877aa1>>(
                 sycl::nd_range<3>(sycl::range(1, (unsigned)T, 2 * HK) *
                                       sycl::range(1, 1, S),
                                   sycl::range(1, 1, S)),
@@ -1158,7 +1294,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
     static const bool serial = std::getenv("STRATA_GDN_REC_HEADS") != nullptr;   // the one-block-per-head kernel (A/B)
     if (serial || T <= 0) {
         /*
-        DPCT1049:267: The work-group size passed to the SYCL kernel may exceed
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
         the limit. To get the device limit, query
         info::device::max_work_group_size. Adjust the work-group size if needed.
         */
@@ -1166,7 +1302,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_rec_kernel_8121c8>>(
+            ->parallel_for<dpct_kernel_name<class gdn_rec_kernel_6a2bf0>>(
                 sycl::nd_range<3>(sycl::range(1, 1, HV) * sycl::range(1, RG, S),
                                   sycl::range(1, RG, S)),
                 exp_props,
@@ -1182,7 +1318,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_rec_cols_kernel_fedac7>>(
+                    dpct_kernel_name<class gdn_rec_cols_kernel_64239d>>(
                     sycl::nd_range<3>(sycl::range(1, 1, HV * NCB) *
                                           sycl::range(1, RG, CB),
                                       sycl::range(1, RG, CB)),
@@ -1196,7 +1332,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_out_norm_kernel_f960df>>(
+                    dpct_kernel_name<class gdn_out_norm_kernel_237731>>(
                     sycl::nd_range<3>(sycl::range(1, HV, (unsigned)T) *
                                           sycl::range(1, 1, S),
                                       sycl::range(1, 1, S)),
@@ -1216,7 +1352,7 @@ void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class route_kernel_f2ae57,
+            ->parallel_for<dpct_kernel_name<class route_kernel_a33365,
                                             dpct_kernel_scalar<16>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
                                       sycl::range(1, 1, 256),
@@ -1232,7 +1368,7 @@ void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class route_kernel_687f3a,
+            ->parallel_for<dpct_kernel_name<class route_kernel_f9493d,
                                             dpct_kernel_scalar<8>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
                                       sycl::range(1, 1, 256),
@@ -1252,7 +1388,7 @@ void blob_dequant(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* s
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_b87029,
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_1db2df,
                                             dpct_kernel_scalar<false>>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
@@ -1270,7 +1406,7 @@ void blob_dequant_f16(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, voi
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_3b1437,
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_ee9bfb,
                                             dpct_kernel_scalar<true>>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
@@ -1289,7 +1425,7 @@ void swiglu_interleaved(const float* gu, uint16_t* h16, int64_t n, void* stream)
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class swiglu_il_kernel_44cb02>>(
+            ->parallel_for<dpct_kernel_name<class swiglu_il_kernel_458d6e>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1305,7 +1441,7 @@ void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class swiglu_pair_kernel_f34a2f>>(
+            ->parallel_for<dpct_kernel_name<class swiglu_pair_kernel_ddbac5>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1315,6 +1451,39 @@ void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void*
     }
     check("swiglu_pair");
 }
+namespace {
+__dpct_inline__ void copy_i32_kernel(int32_t *__restrict__ dst,
+                                     const int32_t *__restrict__ src,
+                                     int64_t n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int64_t i =
+             (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < n; i += (int64_t)item_ct1.get_group_range(2) *
+                     item_ct1.get_local_range(2))
+        dst[i] = src[i];
+}
+}  // namespace
+void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream) {
+    if (n <= 0) return;
+    const int64_t b = (n + 255) / 256;
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class copy_i32_kernel_7676d1>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)(b < 256 ? b : 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    copy_i32_kernel(dst, src, n);
+                });
+    }
+    check("copy_i32");
+}
 void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int64_t n, int64_t width, void* stream) {
     if (n <= 0) return;
     {
@@ -1322,7 +1491,7 @@ void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gather_rows16_kernel_db6b85>>(
+            ->parallel_for<dpct_kernel_name<class gather_rows16_kernel_225b7e>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(n * (width / 8))) *
                         sycl::range(1, 1, 256),
@@ -1340,7 +1509,7 @@ void moe_combine(const float* Dm, const int32_t* slot, const float* w, const flo
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class moe_combine_kernel_b1df11>>(
+            ->parallel_for<dpct_kernel_name<class moe_combine_kernel_d82250>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1357,7 +1526,7 @@ void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class rms_rows_kernel_38561f>>(
+            ->parallel_for<dpct_kernel_name<class rms_rows_kernel_c94646>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)rows) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1380,7 +1549,7 @@ void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t p
                 auto strata_kernels_mrope_table_ct6 =
                     strata::kernels::mrope_table();
 
-                cgh.parallel_for<dpct_kernel_name<class rope_kernel_fa611b>>(
+                cgh.parallel_for<dpct_kernel_name<class rope_kernel_dccc17>>(
                     sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * heads)) *
                                           sycl::range(1, 1, 32),
                                       sycl::range(1, 1, 32)),
@@ -1398,7 +1567,7 @@ void split_q(const float* q_full, float* q, int64_t T, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class split_q_kernel_fdb2a0>>(
+            ->parallel_for<dpct_kernel_name<class split_q_kernel_d499e3>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1414,7 +1583,7 @@ void gate_attn(const float* attn, const float* q_full, uint16_t* out16, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gate_attn_kernel_ee0b52>>(
+            ->parallel_for<dpct_kernel_name<class gate_attn_kernel_f391fd>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
diff --git a/sycl/src/prefill/moe_mmq.dp.cpp b/sycl/src/prefill/moe_mmq.dp.cpp
index 3f5f31fb7e8..bf74e77b927 100644
--- a/sycl/src/prefill/moe_mmq.dp.cpp
+++ b/sycl/src/prefill/moe_mmq.dp.cpp
@@ -55,7 +55,7 @@ __dpct_inline__ void copy1_kernel(const uint8_t *__restrict__ a, int64_t na,
 // [2560][10] f16 (the layout of prefill/kernels.cu's blob_dequant_kernel).  A GGUF Q2_0 block is {f16 d; 16 code
 // bytes} with the same 2-bit codes in the same order, so a block is a scale and a 16-byte run of codes.
 /*
-DPCT1110:182: The total declared local variable size in device function
+DPCT1110: The total declared local variable size in device function
 strata_q2_kernel exceeds 128 bytes and may cause high register pressure. Consult
 with your hardware vendor to find the total register size available and adjust
 the code, or use smaller sub-group size to avoid high register pressure.
@@ -145,7 +145,7 @@ void quantize(const float* x, const int32_t* ids, void* xq, int t, int64_t cols,
     quantize_mmq_q8_1_cuda(x, ids, xq, (ggml_type) t, cols, ld, rows * ld, rows * ld, pad512(cols), rows, 1, 1,
                            (cudaStream_t) stream);
     /*
-    DPCT1010:865: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -184,7 +184,7 @@ void Context::run(const Product& p, void* stream) {
             std::exit(1);
     }
     /*
-    DPCT1010:866: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -231,7 +231,7 @@ void gather_native(const void* gate, const void* up, size_t gu_half_bytes, const
         }
     }
     /*
-    DPCT1010:867: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -255,7 +255,7 @@ void gather_strata_q2(const uint8_t* blob, void* gu_dst, void* d_dst, void* stre
                 });
     }
     /*
-    DPCT1010:868: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -278,7 +278,7 @@ void swiglu(const float* gu, float* h, int64_t rows, int64_t n_ff, bool interlea
                 });
     }
     /*
-    DPCT1010:869: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
@@ -301,7 +301,7 @@ void iota(int32_t* dst, int64_t n, void* stream) {
                 });
     }
     /*
-    DPCT1010:870: SYCL uses exceptions to report errors and does not use the
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
     error codes. The cudaGetLastError function call was replaced with 0. You
     need to rewrite this code.
     */
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index aee620fe7f4..b9d04cb2877 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -4,6 +4,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/prefill/prefill.hpp"
+#include "strata/core/mtp.hpp"
 #include "strata/core/progress.hpp"
 #include "strata/core/on_device.hpp"
 
@@ -88,6 +89,12 @@ inline int ring_slots(size_t T) {
 }
 constexpr int DQ = 2;              // dequantized-expert ring (FP16 gate/up + down)
 
+// F-1: STRATA_GR_UNFUSED=1 keeps the FP32 copy of the normalized rows (gr_norm + gr_mix), the A/B arm
+inline bool gr_unfused() {
+    static const bool v = [] { const char* e = std::getenv("STRATA_GR_UNFUSED"); return e && e[0] == '1'; }();
+    return v;
+}
+
 double ms_since(Clock::time_point t) { return std::chrono::duration<double, std::milli>(Clock::now() - t).count(); }
 
 // Either cudaMalloc (owned, freed with the object) or a bump allocation from a borrowed region; with no base and
@@ -160,7 +167,7 @@ struct Stager {
         pageable.resize(kRing);
         for (int i = 0; i < kRing; ++i) {
             /*
-            DPCT1048:14: The original value cudaHostAllocDefault is not
+            DPCT1048: The original value cudaHostAllocDefault is not
             meaningful in the migrated code and was removed or replaced with 0.
             You may need to check the migrated code.
             */
@@ -169,7 +176,7 @@ struct Stager {
                                 blob_bytes, dpct::get_in_order_queue())) == 0;
             if (!pinned[i]) {
                 /*
-                DPCT1026:1009: The call to cudaGetLastError was removed because
+                DPCT1026: The call to cudaGetLastError was removed because
                 this functionality is redundant in SYCL.
                 */
                 pageable[(size_t)i].resize(blob_bytes);
@@ -195,7 +202,7 @@ struct Stager {
     }
     void work() {
         /*
-        DPCT1093:1010: The "device" device may be not the one intended for use.
+        DPCT1093: The "device" device may be not the one intended for use.
         Adjust the selected device if needed.
         */
         dpct::select_device(device);
@@ -279,6 +286,7 @@ struct Prefill::Impl {
     std::vector<void*> owned;
     // chunk buffers
     float *emb = nullptr, *R = nullptr, *xn = nullptr, *lo = nullptr, *gated = nullptr, *inj = nullptr;
+    float* grs = nullptr;                    // F-1: the hyper-connection read's row scales (T x 4)
     uint16_t *xn16 = nullptr, *lo16 = nullptr;
     float* mixed = nullptr;
     uint16_t *mixed_bf = nullptr, *mixed_h = nullptr;
@@ -310,6 +318,13 @@ struct Prefill::Impl {
     std::vector<int32_t> bounds_host;
     std::unique_ptr<mmq::Context> mmq_ctx;
     std::vector<int32_t> ids_host, slot_host, src_host, cnt, off;
+    // The grouping tables in mapped pinned memory, [ids | slot | src] of T_max * K each, then the MMQ bounds: kernels
+    // read and write them in place.  A cudaMemcpyAsync of them queues behind the expert blobs the copy stream already
+    // holds (up to `ring` of them, ~70 us each), and the GPU idles meanwhile - measured 4.2 s of a 128K prompt's
+    // 70 s at the default ring, 0.7 s with a 16-slot one.  STRATA_GROUP_COPY=1: the copies (the A/B arm).
+    int32_t* grp_host = nullptr;
+    int32_t* grp_dev = nullptr;          // its device alias
+    size_t grp_n = 0, grp_tk = 0;        // int32s allocated; T_max * K (the offset of slot, and of src past it)
     uint16_t* dq_gu[DQ] = {};
     uint16_t* dq_d[DQ] = {};
     uint8_t* stage_dev[RING_MAX] = {};
@@ -380,6 +395,7 @@ Prefill::Prefill() : impl_(new Impl) {}
 Prefill::~Prefill() {
     if (!impl_) return;
     if (impl_->cs) impl_->cs->wait();
+    if (impl_->copy) impl_->copy->wait();
     for (int i = 0; i < RING_MAX; ++i) {
         if (impl_->copied[i]) dpct::destroy_event(impl_->copied[i]);
         if (impl_->used[i]) dpct::destroy_event(impl_->used[i]);
@@ -392,6 +408,8 @@ Prefill::~Prefill() {
             sycl::free(impl_->ple_emb_host[b], dpct::get_in_order_queue());
     }
     if (impl_->copy) dpct::get_current_device().destroy_queue(impl_->copy);
+    if (impl_->grp_host)
+        sycl::free(impl_->grp_host, dpct::get_in_order_queue());
     for (void *p : impl_->owned)
         DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
 }
@@ -493,7 +511,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
     }
     for (int b = 0; next_ != nullptr && b < 2; ++b)
         /*
-        DPCT1048:15: The original value cudaHostAllocPortable is not meaningful
+        DPCT1048: The original value cudaHostAllocPortable is not meaningful
         in the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -515,7 +533,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
         m.tok_host.resize((size_t) chunk);
     }
     /*
-    DPCT1025:1011: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     if (DPCT_CHECK_ERROR(
@@ -540,10 +558,40 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
     }
     m.steps_host.resize(T * strata::kernels::kStepCount);
     m.ids_host.resize(T * K); m.slot_host.resize(T * K); m.src_host.resize(T * K); m.cnt.resize(m.g->n_expert); m.off.resize(m.g->n_expert + 1);
+    {
+        const size_t need = 3 * T * K + (size_t) (2 * (m.g->n_expert + m.g->n_expert / MMQ_GROUP + 2));
+        const char* gc = std::getenv("STRATA_GROUP_COPY");
+        if (m.grp_n < need && !(gc && gc[0] == '1')) {
+            if (m.grp_host) sycl::free(m.grp_host, dpct::get_in_order_queue());
+            m.grp_host = m.grp_dev = nullptr;
+            m.grp_n = m.grp_tk = 0;
+            void *h = nullptr, *d = nullptr;
+            /*
+            DPCT1048: The original value cudaHostAllocMapped is not
+            meaningful in the migrated code and was removed or replaced with 0.
+            You may need to check the migrated code.
+            */
+            if (DPCT_CHECK_ERROR(h = (void *)sycl::malloc_host(
+                                     need * 4, dpct::get_in_order_queue())) ==
+                    0 &&
+                DPCT_CHECK_ERROR(d = (void *)h) == 0) {
+                m.grp_host = (int32_t*) h;
+                m.grp_dev = (int32_t*) d;
+                m.grp_n = need;
+                m.grp_tk = T * K;
+            } else {                              // the copies, as before
+                if (h) sycl::free(h, dpct::get_in_order_queue());
+                /*
+                DPCT1026: The call to cudaGetLastError was removed because
+                this functionality is redundant in SYCL.
+                */
+            }
+        }
+    }
     for (int b = 0; b < 2; ++b) {
         if (!m.ple_emb_host[b] &&
             /*
-            DPCT1048:16: The original value cudaHostAllocDefault is not
+            DPCT1048: The original value cudaHostAllocDefault is not
             meaningful in the migrated code and was removed or replaced with 0.
             You may need to check the migrated code.
             */
@@ -551,7 +599,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
                 m.ple_emb_host[b] = (float *)sycl::malloc_host(
                     (size_t)T * N * 4, dpct::get_in_order_queue())) != 0) {
             /*
-            DPCT1026:1012: The call to cudaGetLastError was removed because this
+            DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
             */
             m.ple_pageable[b].resize(
@@ -571,7 +619,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
                 m.ident_table = (int32_t *)sycl::malloc_device(
                     ident.size() * 4, dpct::get_in_order_queue())) != 0 ||
             /*
-            DPCT1114:1013: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -613,7 +661,9 @@ bool Prefill::carve(size_t T, void* alloc) {
     const core::ModelGeometry& g = *m.g;
     core::SessionState& ss = *m.ss;
     bool ok = true;
-    m.emb = o.take<float>(T * N, ok); m.R = o.take<float>(T * D, ok); m.xn = o.take<float>(T * D, ok);
+    m.emb = o.take<float>(T * N, ok); m.R = o.take<float>(T * D, ok);
+    m.xn = gr_unfused() ? o.take<float>(T * D, ok) : nullptr;   // F-1: not needed (gr_mix_r reads R)
+    m.grs = o.take<float>(T * HC, ok);
     m.xn16 = o.take<uint16_t>(T * D, ok); m.lo = o.take<float>(T * LR, ok); m.lo16 = o.take<uint16_t>(T * LR, ok);
     m.gated = o.take<float>(T * D, ok); m.inj = o.take<float>(T * HC, ok);
     m.mixed = o.take<float>(T * N, ok); m.mixed_bf = o.take<uint16_t>(T * N, ok);
@@ -718,6 +768,181 @@ catch (sycl::exception const &exc) {
 }
 
 int64_t Prefill::chunk() const { return impl_->T; }
+
+bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t* next_tokens, int64_t n, int64_t cell0,
+                       std::string& err) {
+    Impl& m = *impl_;
+    static const bool off = [] { const char* v = std::getenv("STRATA_MTP_BATCH"); return v != nullptr && v[0] == '0'; }();
+    core::QsaState& st = mtp.kv_state_rw();
+    if (off || n <= 0 || m.g == nullptr || m.region == nullptr || st.kv_mode != 0 || st.kv_hybrid ||
+        mtp.device() != m.device)
+        return false;
+    const auto t0 = Clock::now();
+    const core::ModelGeometry& g = *m.g;
+    const int64_t Nn = g.n_embd, HCN = g.hc * g.n_embd, KV = g.n_head_kv * g.head_dim;
+    constexpr int kQ8_0 = 8;   // GGML_TYPE_Q8_0
+    const float* w_ne = mtp.tensor_f32("pre_fc_norm_embedding.weight");
+    const void* w_fe = mtp.tensor_q8("fc_embedding.weight");
+    const float* w_nh = mtp.tensor_f32("pre_fc_norm_hidden.weight");
+    const void* w_fh = mtp.tensor_q8("fc_hidden.weight");
+    const float* w_hn = mtp.tensor_f32("attn_hyper_connection.hc_norm.weight");
+    const uint16_t* w_dn = mtp.tensor_bf16("attn_hyper_connection.input_mix_weight_down.weight");
+    const uint16_t* w_up = mtp.tensor_bf16("attn_hyper_connection.input_mix_weight_up.weight");
+    const void* w_k = mtp.tensor_q8("self_attn.k_proj.weight");
+    const void* w_v = mtp.tensor_q8("self_attn.v_proj.weight");
+    const float* w_kn = mtp.tensor_f32("self_attn.k_norm.weight");
+    if (!w_ne || !w_fe || !w_nh || !w_fh || !w_hn || !w_dn || !w_up || !w_k || !w_v || !w_kn) return false;
+    const core::NativeEmbed* nemb = core::native_embed();
+    const core::WeightRef* wemb = nemb ? nullptr : m.wt->find("token_embd.weight");
+    if (!nemb && (wemb == nullptr || wemb->codebook_iq4nl || wemb->ne0 != g.n_embd || wemb->group_elems <= 0 ||
+                  (wemb->code_bits != 2 && wemb->code_bits != 4 && wemb->code_bits != 8)))
+        return false;
+    // the cells the drafter's window can still reach
+    const int64_t r0 = std::max<int64_t>(0, mtp.first_needed() - cell0);
+    if (r0 >= n) return true;
+    // per row: emb/e2 (N), en16 (N half), hn/h2/Rm/gated (HCN), hn16/xn16 (HCN half), lo (LR) + lo16, grs, mixed (N) +
+    // mixed_h, K and V (KV each), the token id
+    // E-9: the drafter's Q8_0 matrices through Q8_1 x Q8_0 MMQ - its own pass's integer dot products (mmvq), so
+    // its K/V stay close to what the drafter computes itself; STRATA_MTP_BATCH_F16=1: FP16 GEMMs (the A/B)
+    static const bool f16_only = [] { const char* v = std::getenv("STRATA_MTP_BATCH_F16"); return v && v[0] == '1'; }();
+    const bool q8 = !f16_only && mmq::built() && mmq::supported(kQ8_0);
+    const uint64_t per_row = 4 * (2 * Nn + 4 * HCN + LR + HC + Nn + 2 * KV + 1) + 2 * (Nn + 2 * HCN + LR + Nn) + 64 +
+                             (q8 ? (uint64_t) mmq::q8_bytes(g.hc, Nn) + 4 * g.hc : 0);
+    const int64_t B = std::min<int64_t>(n - r0, (int64_t) (m.region_bytes / per_row) & ~(int64_t) 63);
+    if (B < 64) return false;
+    uint8_t* q = m.region;
+    auto carve = [&](size_t bytes) { void* p = q; q += (bytes + 255) & ~(size_t) 255; return p; };
+    float* emb = (float*) carve((size_t) B * Nn * 4);
+    float* e2 = (float*) carve((size_t) B * Nn * 4);
+    uint16_t* en16 = (uint16_t*) carve((size_t) B * Nn * 2);
+    float* hn = (float*) carve((size_t) B * HCN * 4);
+    float* h2 = (float*) carve((size_t) B * HCN * 4);
+    float* Rm = (float*) carve((size_t) B * HCN * 4);
+    float* gated = (float*) carve((size_t) B * HCN * 4);
+    uint16_t* hn16 = (uint16_t*) carve((size_t) B * HCN * 2);
+    uint16_t* xn16 = (uint16_t*) carve((size_t) B * HCN * 2);
+    float* lo = (float*) carve((size_t) B * LR * 4);
+    uint16_t* lo16 = (uint16_t*) carve((size_t) B * LR * 2);
+    float* grs = (float*) carve((size_t) B * HC * 4);
+    float* mixed = (float*) carve((size_t) B * Nn * 4);
+    uint16_t* mixed_h = (uint16_t*) carve((size_t) B * Nn * 2);
+    float* Kc = (float*) carve((size_t) B * KV * 4);
+    float* Vc = (float*) carve((size_t) B * KV * 4);
+    int32_t* tok = (int32_t*) carve((size_t) B * 4);
+    void* xq = q8 ? carve(mmq::q8_bytes(B * g.hc, Nn)) : nullptr;
+    int32_t* ident = q8 ? (int32_t*) carve((size_t) B * g.hc * 4) : nullptr;
+    int32_t* bnd = q8 ? (int32_t*) carve(16) : nullptr;
+    if ((uint64_t) (q - m.region) > m.region_bytes) return false;
+    if (!mtp.idle(err)) return false;   // the drafter's own stream (its graph uploads) before this writes its K/V
+    strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
+    s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
+    s.idx_dim = g.idx_key_dim;
+    std::vector<int32_t> tk((size_t) B);
+    if (q8) {
+        if (!m.mmq_ctx) m.mmq_ctx = std::make_unique<mmq::Context>();
+        mmq::iota(ident, B * g.hc, m.cs);
+    }
+    // y[rows, n_out] = x[rows, k] . w^T for a Q8_0 matrix: MMQ from the FP32 rows (bounds slot 0: rows, 1: rows*hc)
+    auto proj = [&](const float* x, const uint16_t* x16, const void* w, float* y, int64_t rows, int64_t n_out,
+                    int64_t k, int slot) {
+        if (!q8) { m.gemm.native(x16, kQ8_0, w, y, rows, n_out, k); return; }
+        mmq::quantize(x, nullptr, xq, kQ8_0, k, k, rows, m.cs);
+        mmq::Product p;
+        p.w = w; p.type = kQ8_0; p.w_rows = n_out; p.w_cols = k; p.expert_bytes = mmq::matrix_bytes(kQ8_0, n_out, k);
+        p.n = 1; p.xq = xq; p.bounds = bnd + 2 * slot; p.ids = ident; p.total_rows = rows; p.max_rows = rows;
+        p.dst = y; p.ld_dst = n_out;
+        m.mmq_ctx->run(p, m.cs);
+    };
+    for (int64_t b0 = r0; b0 < n; b0 += B) {
+        const int64_t nb = std::min(B, n - b0), c0 = cell0 + b0;
+        for (int64_t i = 0; i < nb; ++i) tk[(size_t) i] = next_tokens[b0 + i];
+        const int32_t bh[4] = {0, (int32_t) nb, 0, (int32_t) (nb * g.hc)};
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (q8 && DPCT_CHECK_ERROR(m.cs->memcpy(bnd, bh, sizeof bh)) != 0) {
+            err = "prefill: the draft bounds' upload failed";
+            return false;
+        }
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(m.cs->memcpy(tok, tk.data(), (size_t)nb * 4)) !=
+            0) {
+            err = "prefill: the draft tokens' upload failed";
+            return false;
+        }
+        // the input branches: the next token's embedding, and this cell's final residual rows
+        if (nemb) {
+            nemb->gather_dev(tok, nb, emb, m.cs);
+        } else {
+            const auto* codes = (const uint8_t*) wemb->data;
+            const auto* scales = (const float*) (codes + wemb->codes_bytes);
+            const auto* offsets = wemb->has_offset ? (const float*) (codes + wemb->codes_bytes + wemb->scales_bytes)
+                                                   : nullptr;
+            strata::kernels::embedding_gather_dev(codes, scales, offsets, tok, (int) nb, wemb->ne0, wemb->code_bits,
+                                                  wemb->code_bias, wemb->group_elems,
+                                                  (uint64_t) (wemb->ne0 / (8 / wemb->code_bits)),
+                                                  (uint64_t) (wemb->ne0 / wemb->group_elems), emb, m.cs);
+        }
+        rms_rows(emb, w_ne, nb, Nn, Nn, EPS, m.cs);
+        if (!q8) to_f16(emb, en16, nb * Nn, m.cs);
+        proj(emb, en16, w_fe, e2, nb, Nn, Nn, 0);
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        m.cs->memcpy(hn, R_rows + (size_t)b0 * HCN, (size_t)nb * HCN * 4);
+        rms_rows(hn, w_nh, nb, HCN, HCN, EPS, m.cs);
+        if (!q8) to_f16(hn, hn16, nb * HCN, m.cs);
+        proj(hn, hn16, w_fh, h2, nb * g.hc, Nn, Nn, 1);   // every stream through fc_hidden
+        strata::kernels::add_streams_broadcast(h2, e2, Rm, Nn, (int) g.hc, (int) nb, m.cs);
+        // the attention hyper-connection's read (its mixed input only: this pass writes nothing back)
+        gr_norm_rs(Rm, w_hn, EPS, grs, xn16, nb, m.cs);
+        m.gemm.bf16(xn16, w_dn, lo, nb, LR, HCN);
+        gr_silu(lo, lo16, nb, m.cs);
+        m.gemm.bf16(lo16, w_up, gated, nb, HCN, LR);
+        gr_mix_r(Rm, grs, w_hn, gated, mixed, nullptr, nb, m.cs, mixed_h);
+        // K and V into the drafter's cache, as the prompt path's QSA layers append theirs
+        proj(mixed, mixed_h, w_k, Kc, nb, KV, Nn, 0);
+        proj(mixed, mixed_h, w_v, Vc, nb, KV, Nn, 0);
+        rms_rows(Kc, w_kn, nb * g.n_head_kv, g.head_dim, g.head_dim, EPS, m.cs);
+        rope(Kc, nb, g.n_head_kv, g.head_dim, KV, c0, (float) strata::kernels::qsa_freq_base(), m.cs);
+        if (st.kv_q4) {
+            strata::kernels::fwht256_inplace_cuda(Kc, nb * g.n_head_kv, m.cs);
+            strata::kernels::fwht256_inplace_cuda(Vc, nb * g.n_head_kv, m.cs);
+            strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, c0, nb, Kc, Vc, s, m.cs, &st.host);
+        } else {
+            kv_append(Kc, Vc, nb, c0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
+                      st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs, &st.host);
+        }
+    }
+    if (DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
+        */
+        err = std::string("prefill: the draft layer's K/V: ") +
+              dpct::get_error_string_dummy(0);
+        return false;
+    }
+    mtp.ms_prefill += ms_since(t0);
+    return true;
+}
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
 double Prefill::pinned_share() { return g_pinned_share; }
 
@@ -837,7 +1062,8 @@ struct PfTimer {
 };
 }  // namespace
 
-bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err) {
+bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
+                  std::string &err) try {
     Impl& m = *impl_;
     const core::OnDevice on_device(m.device);
     const core::ModelGeometry& g = *m.g;
@@ -903,7 +1129,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
         // previous stage handed on
         if (hand_in_ != nullptr) {
             /*
-            DPCT1124:1015: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -930,7 +1156,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
         }
         if (batched) {
             /*
-            DPCT1124:1016: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -958,7 +1184,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
             const float* row = embd_rows ? embd_rows[p0 + t] : nullptr;
             if (row) {
                 /*
-                DPCT1124:1017: cudaMemcpyAsync is migrated to asynchronous
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                 memcpy API. While the origin API might be synchronous, it
                 depends on the type of operand memory, so you may need to call
                 wait() on event return by memcpy API to ensure synchronization
@@ -984,7 +1210,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                 return false;
             }
             /*
-            DPCT1124:1018: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -1006,7 +1232,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
         // ---- the QSA step records of every position in the chunk
         for (int64_t t = 0; t < T; ++t) strata::kernels::qsa_step_fill(m.steps_host.data() + t * strata::kernels::kStepCount, p0 + t, s);
         /*
-        DPCT1124:1014: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -1061,7 +1287,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     {*m.used[sl]});
                 if (en.job < 0) {
                     /*
-                    DPCT1124:1019: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -1072,7 +1298,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                 } else {
                     const uint8_t* hb = m.stager->wait(en.job);
                     /*
-                    DPCT1124:1020: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -1129,7 +1355,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         {*m.used[sl]});
                     if (en.job < 0) {
                         /*
-                        DPCT1124:1021: cudaMemcpyAsync is migrated to
+                        DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
                         synchronous, it depends on the type of operand memory,
                         so you may need to call wait() on event return by memcpy
@@ -1140,7 +1366,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     } else {
                         const uint8_t* hb = m.stager->wait(en.job);
                         /*
-                        DPCT1124:1022: cudaMemcpyAsync is migrated to
+                        DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
                         synchronous, it depends on the type of operand memory,
                         so you may need to call wait() on event return by memcpy
@@ -1169,6 +1395,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
             else issue_until(upto + (size_t) m.ring);
         };
         host_setup_ms += ms_since(tsetup);
+        bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
         for (int64_t l = LB; l < LE; ++l) {
             core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
             const core::LayerView v(*m.wt, l);
@@ -1233,12 +1460,15 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                                       *wu = need(v, su.c_str(), err), *wi = need(v, si.c_str(), err);
                 if (!wn || !wd || !wu || !wi) return false;
                 pt.mark(kPfHc, cs);
-                gr_norm(m.R, (const float*) wn->data, EPS, m.xn, m.xn16, T, m.cs);
+                if (gr_unfused()) gr_norm(m.R, (const float*) wn->data, EPS, m.xn, m.xn16, T, m.cs);
+                else if (!normed) gr_norm_rs(m.R, (const float*) wn->data, EPS, m.grs, m.xn16, T, m.cs);
+                normed = false;
                 if (!bf16_proj(m.gemm, wd, m.xn16, m.lo, T, sd, err)) return false;
                 gr_silu(m.lo, m.lo16, T, m.cs);
                 if (!bf16_proj(m.gemm, wu, m.lo16, m.gated, T, su, err)) return false;
                 if (!bf16_proj(m.gemm, wi, m.xn16, m.inj, T, si, err)) return false;
-                gr_mix(m.xn, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
+                if (gr_unfused()) gr_mix(m.xn, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
+                else gr_mix_r(m.R, m.grs, (const float*) wn->data, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
 
                 if (half == 0 && !core::is_qsa_layer(g, l)) {
                     // ======================= GDN =======================
@@ -1292,7 +1522,14 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                                                             (p0 + s.page_size - 1) / s.page_size, s, m.cs);
                         pt.mark(kPfQsa, cs);
                     }
-                    if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V, the queries below too, the output back
+                    if (st.kv_hybrid) {   // K8V4: K INT8 unrotated, V rotated Q4_0 (only V and the output rotate)
+                        strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
+                        kv_append(m.Kc, m.Kc, T, p0, st.page_table, s.page_size, nullptr, nullptr,
+                                  st.k_q, st.k_q, st.k_scale, st.k_scale, m.cs, nullptr,   // mode 0: no host mirror
+                                  staged ? &m.stage : nullptr);
+                        strata::kernels::kv_append_q4(st.v_q4, st.v_q4, st.page_table, p0, T, m.Vc, m.Vc, s, m.cs,
+                                                      nullptr, staged ? &m.stage : nullptr);
+                    } else if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V, the queries below too, the output back
                         strata::kernels::fwht256_inplace_cuda(m.Kc, T * 2, m.cs);
                         strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
                         strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
@@ -1350,7 +1587,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     if (static const bool ovl = std::getenv("STRATA_SEL_OVERLAP") != nullptr; ovl && qsa_index == 0) {
                         std::vector<int32_t> ids((size_t) (T * m.cap));
                         /*
-                        DPCT1124:1023: cudaMemcpyAsync is migrated to
+                        DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
                         synchronous, it depends on the type of operand memory,
                         so you may need to call wait() on event return by memcpy
@@ -1410,7 +1647,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         }
                         std::vector<int32_t> a((size_t) (T * m.cap)), b((size_t) (T * m.cap));
                         /*
-                        DPCT1124:1024: cudaMemcpyAsync is migrated to
+                        DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
                         synchronous, it depends on the type of operand memory,
                         so you may need to call wait() on event return by memcpy
@@ -1418,7 +1655,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         */
                         m.cs->memcpy(a.data(), m.sel_ids, a.size() * 4);
                         /*
-                        DPCT1124:1025: cudaMemcpyAsync is migrated to
+                        DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
                         synchronous, it depends on the type of operand memory,
                         so you may need to call wait() on event return by memcpy
@@ -1451,7 +1688,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         if (p0 + T > pos0 + n - last) {
                             std::vector<int32_t> h((size_t) (T * m.cap));
                             /*
-                            DPCT1124:1026: cudaMemcpyAsync is migrated to
+                            DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
@@ -1473,7 +1710,8 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     pt.mark(kPfQsaAttn, cs);
                     // perf-review D-1: the whole chunk on tensor cores, one block per (query, KV head), FP32-level
                     // accuracy but not bitwise (qsa_prompt_attn.hpp). Q4_0 KV, or STRATA_PROMPT_ATTN_OLD=1: the
-                    // decode kernel, 32 queries at a time
+                    // decode kernel, 32 queries at a time (K8V4 runs the tensor kernel's mode 3: INT8 K,
+                    // V dequantized from its q4_0 blocks to fp16 at gather)
                     static const bool old_attn = std::getenv("STRATA_PROMPT_ATTN_OLD") != nullptr;
                     if (old_attn || !strata::kernels::qsa_prompt_attn_batch(m.q, pools, m.sel_ids, m.steps_dev, m.cap, s,
                                                                             m.attn, T, m.cs))
@@ -1483,7 +1721,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                                                                    m.steps_dev + t0 * strata::kernels::kStepCount, m.cap,
                                                                    s, m.attn_scratch, m.attn + t0 * ZV, nb, m.cs);
                         }
-                    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(m.attn, T * 24, m.cs);
+                    if (st.kv_q4 || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(m.attn, T * 24, m.cs);
                     pt.mark(kPfQsa, cs);
                     gate_attn(m.attn, m.Qf, m.attn_h, T, m.cs);
                     if (!native_proj(m.gemm, wo, m.attn_h, m.bo, T, v.name("attn_output.weight"), err)) return false;
@@ -1508,19 +1746,27 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     m.gemm.bf16(m.mixed_bf, (const uint16_t*) wgi->data, m.sg, T, 1, N);
                     // group the (token, k) pairs by expert on the host
                     pt.mark(kPfHostGroup, cs);
+                    // (the sync below also orders this layer's writes of slot/src/bounds after the previous
+                    // layer's kernels that read them)
+                    const bool grp_mapped = m.grp_host != nullptr;
+                    int32_t* ids_h = grp_mapped ? m.grp_host : m.ids_host.data();
+                    int32_t* slot_h = grp_mapped ? m.grp_host + m.grp_tk : m.slot_host.data();
+                    int32_t* src_h = grp_mapped ? m.grp_host + 2 * m.grp_tk : m.src_host.data();
+                    if (grp_mapped) copy_i32(m.grp_dev, m.ids, T * K, m.cs);
                     /*
-                    DPCT1124:1027: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
                     synchronization behavior.
                     */
-                    m.cs->memcpy(m.ids_host.data(), m.ids, (size_t)T * K * 4);
+                    else m.cs->memcpy(m.ids_host.data(), m.ids,
+                                      (size_t)T * K * 4);
                     m.cs->wait();
                     pt.fold();
                     std::fill(m.cnt.begin(), m.cnt.end(), 0);
                     for (int64_t i = 0; i < T * K; ++i) {
-                        const int32_t e = m.ids_host[(size_t) i];
+                        const int32_t e = ids_h[(size_t) i];
                         if (e < 0 || e >= m.g->n_expert) { err = "prefill: routed id out of range"; return false; }
                         ++m.cnt[(size_t) e];
                     }
@@ -1528,29 +1774,34 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     for (int64_t e = 0; e < m.g->n_expert; ++e) m.off[(size_t) e + 1] = m.off[(size_t) e] + m.cnt[(size_t) e];
                     std::vector<int32_t> fill(m.off.begin(), m.off.end() - 1);
                     for (int64_t i = 0; i < T * K; ++i) {
-                        const int32_t e = m.ids_host[(size_t) i];
+                        const int32_t e = ids_h[(size_t) i];
                         const int32_t p = fill[(size_t) e]++;
-                        m.slot_host[(size_t) i] = p;
-                        m.src_host[(size_t) p] = (int32_t) (i / K);
+                        slot_h[(size_t) i] = p;
+                        src_h[(size_t) p] = (int32_t) (i / K);
+                    }
+                    if (grp_mapped) {
+                        copy_i32(m.slot_dev, m.grp_dev + m.grp_tk, T * K, m.cs);
+                        copy_i32(m.src_dev, m.grp_dev + 2 * m.grp_tk, T * K, m.cs);
+                    } else {
+                        /*
+                        DPCT1124: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(m.slot_dev, m.slot_host.data(),
+                                     (size_t)T * K * 4);
+                        /*
+                        DPCT1124: cudaMemcpyAsync is migrated to
+                        asynchronous memcpy API. While the origin API might be
+                        synchronous, it depends on the type of operand memory,
+                        so you may need to call wait() on event return by memcpy
+                        API to ensure synchronization behavior.
+                        */
+                        m.cs->memcpy(m.src_dev, m.src_host.data(),
+                                     (size_t)T * K * 4);
                     }
-                    /*
-                    DPCT1124:1028: cudaMemcpyAsync is migrated to asynchronous
-                    memcpy API. While the origin API might be synchronous, it
-                    depends on the type of operand memory, so you may need to
-                    call wait() on event return by memcpy API to ensure
-                    synchronization behavior.
-                    */
-                    m.cs->memcpy(m.slot_dev, m.slot_host.data(),
-                                 (size_t)T * K * 4);
-                    /*
-                    DPCT1124:1029: cudaMemcpyAsync is migrated to asynchronous
-                    memcpy API. While the origin API might be synchronous, it
-                    depends on the type of operand memory, so you may need to
-                    call wait() on event return by memcpy API to ensure
-                    synchronization behavior.
-                    */
-                    m.cs->memcpy(m.src_dev, m.src_host.data(),
-                                 (size_t)T * K * 4);
                     // the experts, in id order: resident ones from VRAM, the others through the staging ring
                     std::vector<int32_t> order;
                     for (int32_t e = 0; e < m.g->n_expert; ++e) if (m.cnt[(size_t) e] > 0) order.push_back(e);
@@ -1574,15 +1825,22 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                             for (size_t i = 0; i <= MMQ_GROUP; ++i)
                                 m.bounds_host[n + 1 + g * (MMQ_GROUP + 1) + i] =
                                     m.bounds_host[std::min(n, g * MMQ_GROUP + i)] - m.bounds_host[g * MMQ_GROUP];
-                        /*
-                        DPCT1124:1030: cudaMemcpyAsync is migrated to
-                        asynchronous memcpy API. While the origin API might be
-                        synchronous, it depends on the type of operand memory,
-                        so you may need to call wait() on event return by memcpy
-                        API to ensure synchronization behavior.
-                        */
-                        m.cs->memcpy(m.bounds_dev, m.bounds_host.data(),
-                                     m.bounds_host.size() * 4);
+                        if (grp_mapped) {
+                            int32_t* bh = m.grp_host + 3 * m.grp_tk;
+                            std::memcpy(bh, m.bounds_host.data(), m.bounds_host.size() * 4);
+                            copy_i32(m.bounds_dev, m.grp_dev + 3 * m.grp_tk, (int64_t) m.bounds_host.size(), m.cs);
+                        } else {
+                            /*
+                            DPCT1124: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            m.cs->memcpy(m.bounds_dev, m.bounds_host.data(),
+                                         m.bounds_host.size() * 4);
+                        }
                     } else {
                         gather_rows16(m.mixed_h, m.src_dev, m.Xs, T * K, N, m.cs);
                     }
@@ -1620,7 +1878,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                             if (m.stage_live[sl])(m.copy)
                                 ->ext_oneapi_submit_barrier({*m.used[sl]});
                             /*
-                            DPCT1124:1031: cudaMemcpyAsync is migrated to
+                            DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
@@ -1636,7 +1894,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                             if (m.stage_live[sl])(m.copy)
                                 ->ext_oneapi_submit_barrier({*m.used[sl]});
                             /*
-                            DPCT1124:1032: cudaMemcpyAsync is migrated to
+                            DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
@@ -1828,8 +2086,24 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         }
                     }
                 }
-                // ---- the hyper-connection write of this half
-                gr_write(m.R, m.bo, m.inj, HC, T, m.cs);
+                // ---- the hyper-connection write of this half; F-2: fused with the next half's norm when nothing else
+                // touches R in between (not the stage's last half, not before the PLE block of layer 1, not under a
+                // control vector)
+                const int64_t nl = half == 0 ? l : l + 1;
+                const bool fuse = !gr_unfused() && nl < LE && !(half == 1 && nl == 1 && ple_on) &&
+                                  !(half == 1 && strata::kernels::cvec().covers(l));
+                const core::WeightRef* wnn = nullptr;
+                if (fuse) {
+                    const core::LayerView vn(*m.wt, nl);
+                    wnn = need(vn, half == 0 ? "hc_ffn_norm.weight" : "hc_attn_norm.weight", err);
+                    if (!wnn) return false;
+                }
+                if (wnn) {
+                    gr_write_norm_rs(m.R, m.bo, m.inj, HC, (const float*) wnn->data, EPS, m.grs, m.xn16, T, m.cs);
+                    normed = true;
+                } else {
+                    gr_write(m.R, m.bo, m.inj, HC, T, m.cs);
+                }
                 if (half == 1 && strata::kernels::cvec().covers(l))   // --control-vector-scaled
                     strata::kernels::cvec_apply(m.R, l, T, D, nullptr, 0, nullptr, 0, false, m.cs);
             }
@@ -1846,7 +2120,7 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
             // the rows to the host buffer the next stage read two chunks ago (it has finished: waited below)
             float* h = m.hand[hand_buf];
             /*
-            DPCT1124:1033: cudaMemcpyAsync is migrated to asynchronous memcpy
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
             API. While the origin API might be synchronous, it depends on the
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
@@ -1855,13 +2129,13 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                     0 ||
                 DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
                 /*
-                DPCT1009:1034: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1010:1035: SYCL uses exceptions to report errors and does
+                DPCT1010: SYCL uses exceptions to report errors and does
                 not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
@@ -1898,13 +2172,13 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
             const auto toc = Clock::now();
             if (DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
                 /*
-                DPCT1009:1036: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1010:1037: SYCL uses exceptions to report errors and does
+                DPCT1010: SYCL uses exceptions to report errors and does
                 not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
@@ -1951,18 +2225,36 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
     }
     if (DPCT_CHECK_ERROR(m.cs->wait()) != 0) {
         /*
-        DPCT1009:1038: SYCL reports errors using exceptions and does not use
+        DPCT1009: SYCL reports errors using exceptions and does not use
         error codes. Please replace the "get_error_string_dummy(...)" with a
         real error-handling function.
         */
         /*
-        DPCT1010:1039: SYCL uses exceptions to report errors and does not use
+        DPCT1010: SYCL uses exceptions to report errors and does not use
         the error codes. The cudaGetLastError function call was replaced with 0.
         You need to rewrite this code.
         */
         err = std::string("prefill: ") + dpct::get_error_string_dummy(0);
         return false;
     }
+    // (PR #121) an expert copy that failed on the copy stream surfaces here, not in the next request
+    /*
+    DPCT1000: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (const dpct::err0 cst = DPCT_CHECK_ERROR(m.copy->wait()); cst != 0) {
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001: The statement could not be removed.
+        */
+        err = std::string("prefill: expert copy stream: ") +
+              dpct::get_error_string_dummy(cst);
+        return false;
+    }
     stats_.ms_total += ms_since(t_start);
     if (pt.on) {
         pt.fold();
@@ -2000,5 +2292,10 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
     }
     return true;
 }
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
 
 }  // namespace strata::prefill
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 49f7d05db35..6f89035c9c1 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -80,9 +80,11 @@
 #include <mutex>
 #include <charconv>
 #include <cmath>
+#include <limits>
 #include <cstdio>
 #include <cstdlib>
 #include <cstring>
+#include <filesystem>
 #include <fstream>
 #include <sstream>
 #include <string>
@@ -183,6 +185,7 @@ struct Options {
     /// is reserved for a host thread that has nothing to do while the drain runs.
     bool no_host_worker = false;
     bool mmap_experts = false;    ///< R2.1: opt OUT of the resident arena, back to MapViewOfFile
+    bool resident_cpu_experts = false; ///< mmap-backed static-cache misses copied into ordinary RAM
     bool stream_experts = false;  ///< SYCL port: no host arena; blobs read from the GGUF on demand (all experts in VRAM)
     /// R4: slots of VRAM-resident experts.  **0 = off, and off is the default.**
     /// **THE COMMENT THAT USED TO BE HERE WAS FALSE AND ROUND 328 MEASURED IT.**  It said "the cache has no
@@ -330,6 +333,8 @@ void usage() {
                  "                       VRAM; default fp16 until gate G-C accepts int8\n"
                  "  --kv q4_0            4-bit K/V after a Hadamard rotation (PR #21): half of int8's memory,\n"
                  "                       slightly lower precision (see bench/results/2026-09-27-kv-q4)\n"
+                 "  --kv k8v4            hybrid: INT8 K (exact attention scores) + rotated Q4_0 V, 816 B/cell\n"
+                 "                       (vs int8's 1,056); not with --kv-resident\n"
                  "  --kv-resident N      KV streaming: keep N cells of each QSA layer in VRAM (min 20480) and the\n"
                  "                       whole K/V in pinned RAM; the freed VRAM goes to expert slots. 0 (default):\n"
                  "                       all of it in VRAM. A context of N cells or fewer is not streamed\n"
@@ -435,7 +440,9 @@ void usage() {
                  "  --stream-experts     no host arena: experts read from the GGUF on demand (needs a native pack and\n"
                  "                       a VRAM cache that holds every expert; for machines with less RAM than experts)\n"
                  "                       The A/B arm: the mmap's rate depends on the OS page cache holding\n"
-                 "                       34 GB, and measured 71.97 vs 34.78 ms/token cold vs warm.\n");
+                 "                       34 GB, and measured 71.97 vs 34.78 ms/token cold vs warm.\n"
+                 "  --resident-cpu-experts  with mmap and a static profile, keep CPU misses resident in ordinary RAM.\n"
+                 "                       Borrowed GPU-cache entries may read from mmap during prompt prefill.\n");
 }
 
 /// All shards of a split GGUF, from shard 1's path ("...-00001-of-00002.gguf"); just the path when it is not split.
@@ -684,7 +691,7 @@ void mem_mark(const char* where) {
     if (!on) return;
     size_t free_b = 0, total_b = 0;
     /*
-    DPCT1106:666: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
     device information which may not be supported by all compilers or runtimes.
     You may need to adjust the code.
     */
@@ -780,7 +787,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
     const ConvStateSizes z = conv_state_sizes(g);
     if (c.gdn.size() != z.gdn || c.tails.size() != z.tail * (size_t) g.n_qsa_layers()) return false;
     /*
-    DPCT1114:667: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -788,7 +795,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
     if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
             ss.gdn_state, c.gdn.data(), z.gdn).wait()) != 0) return false;
     /*
-    DPCT1114:668: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
     the original code the source host memory is pageable memory. If the memory
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
@@ -798,7 +805,7 @@ bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
         return false;
     for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
         /*
-        DPCT1114:669: cudaMemcpy is migrated to asynchronization memcpy,
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
         assuming in the original code the source host memory is pageable memory.
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
@@ -914,7 +921,7 @@ double probe_pcie_h2d_gbps() try {
     }
     std::memset(h, 0, kBytes);   // fault the pages in before timing
     /*
-    DPCT1124:670: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -923,7 +930,7 @@ double probe_pcie_h2d_gbps() try {
         d, h, kBytes).wait(); // warmup: context up, copy engine primed
     dpct::sync_barrier(ev0);
     /*
-    DPCT1124:671: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
+    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
     the origin API might be synchronous, it depends on the type of operand
     memory, so you may need to call wait() on event return by memcpy API to
     ensure synchronization behavior.
@@ -1144,6 +1151,7 @@ int main(int argc, char** argv) {
         else if (a == "--expert-profile") o.expert_profile = next("--expert-profile");
         else if (a == "--gpu-stages") o.gpu_stages = true;
         else if (a == "--mmap-experts") o.mmap_experts = true;
+        else if (a == "--resident-cpu-experts") o.resident_cpu_experts = true;
         else if (a == "--stream-experts") o.stream_experts = true;
         else if (a == "--stats") o.stats = true;
         else if (a == "--shared-late") o.shared_late = true;
@@ -1175,7 +1183,7 @@ int main(int argc, char** argv) {
         if (DPCT_CHECK_ERROR(n_dev = dpct::device_count()) != 0 || n_dev < 1)
             n_dev = 1;
         /*
-        DPCT1026:672: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         auto ints = [](const std::string &str, auto &out) -> bool {
@@ -1217,6 +1225,16 @@ int main(int argc, char** argv) {
         }
     }
     const bool multi_gpu = !split_devs.empty() && !split_same;
+    if (o.resident_cpu_experts && (!o.mmap_experts || o.expert_profile.empty() || o.adapt_every != 0)) {
+        std::fprintf(stderr, "strata generate: --resident-cpu-experts requires --mmap-experts, a static --expert-profile and --adapt-every 0\n");
+        return 2;
+    }
+    if (o.resident_cpu_experts &&
+        (!o.layer_split.empty() || o.expert_cache_remote[0] > 0 || o.expert_cache_remote[1] > 0 ||
+         o.expert_cache_remote[2] > 0)) {
+        std::fprintf(stderr, "strata generate: --resident-cpu-experts does not support layer splits or remote expert caches\n");
+        return 2;
+    }
     // the helper-GPU expert caches (--expert-cache-remote, docs/SECOND_GPU.md): CUDA1..3 on one GPU; with a layer
     // split, the visible GPUs no stage runs on, in order
     int remote_dev[3] = {1, 2, 3};
@@ -1230,7 +1248,7 @@ int main(int argc, char** argv) {
         if (DPCT_CHECK_ERROR(n_vis = dpct::device_count()) != 0 || n_vis < 1)
             n_vis = 1;
         /*
-        DPCT1026:673: The call to cudaGetLastError was removed because this
+        DPCT1026: The call to cudaGetLastError was removed because this
         functionality is redundant in SYCL.
         */
         int next_free = 1;
@@ -1273,16 +1291,21 @@ int main(int argc, char** argv) {
         return 2;
     }
     if (o.kv == "q4") o.kv = "q4_0";
-    if (o.kv != "fp16" && o.kv != "int8" && o.kv != "q4_0") {
-        std::fprintf(stderr, "strata generate: --kv must be fp16, int8 or q4_0\n");
+    if (o.kv != "fp16" && o.kv != "int8" && o.kv != "q4_0" && o.kv != "k8v4") {
+        std::fprintf(stderr, "strata generate: --kv must be fp16, int8, q4_0 or k8v4\n");
         return 2;
     }
     strata::core::qsa_set_kv_int8(o.kv == "int8");
     strata::core::qsa_set_kv_q4(o.kv == "q4_0");   // PR #21: 4-bit codes after a Hadamard rotation (kv_q4.hpp)
+    strata::core::qsa_set_kv_hybrid(o.kv == "k8v4");   // K8V4: INT8 K + rotated Q4_0 V, 816 B/cell
     if (o.kv_resident < 0) {
         std::fprintf(stderr, "strata generate: --kv-resident must be >= 0\n");
         return 2;
     }
+    if (o.kv == "k8v4" && o.kv_resident > 0) {
+        std::fprintf(stderr, "strata generate: --kv k8v4 does not support --kv-resident streaming (yet)\n");
+        return 2;
+    }
     strata::core::qsa_set_kv_resident(o.kv_resident);
     // Prompt lookup (the suffix drafter, on by default): the MTP keeps its --spec windows and a lookup window may be
     // up to 2 tokens longer; the draft policy (strata/spec/draft_policy.hpp) takes one only where it pays. Code
@@ -1526,7 +1549,7 @@ int main(int argc, char** argv) {
                 d_mrope = sycl::malloc_device<int32_t>(
                     mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
             /*
-            DPCT1114:674: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -1587,7 +1610,7 @@ int main(int argc, char** argv) {
     // 0.805 us inside a graph.  **That is an ~8x penalty on every launch in the engine.**
     dpct::queue_ptr main_stream = &dpct::get_in_order_queue();
     /*
-    DPCT1025:675: The SYCL queue is created ignoring the flag and priority
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
     options.
     */
     if (DPCT_CHECK_ERROR(
@@ -1623,7 +1646,7 @@ int main(int argc, char** argv) {
         }
         const size_t n = (size_t) g.n_layers * (size_t) half_stride;
         /*
-        DPCT1048:2: The original value cudaHostAllocDefault is not meaningful in
+        DPCT1048: The original value cudaHostAllocDefault is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -1683,7 +1706,7 @@ int main(int argc, char** argv) {
             ss.ple.w.key_scales = (const float*) ((const uint8_t*) wk->data + wk->codes_bytes);
         }
         if (o.native_ple_key && wk->quantized()) {
-            if (!wk->native_data || wk->native_type != 42 || !wk->native_q8_1) {
+            if (!wk->native_data || (wk->native_type != 42 && wk->native_type != 18 && wk->native_type != 23) || !wk->native_q8_1) {
                 std::fprintf(stderr, "strata generate: native PLE key is absent or incompatible\n");
                 return 1;
             }
@@ -1774,14 +1797,14 @@ int main(int argc, char** argv) {
             strata::core::session_init(g, o.max_context, K, sbuf_s, st.ss) ==
                 0 ||
             /*
-            DPCT1025:677: The SYCL queue is created ignoring the flag and
+            DPCT1025: The SYCL queue is created ignoring the flag and
             priority options.
             */
             DPCT_CHECK_ERROR(
                 st.stream = dpct::get_current_device().create_queue(true)) !=
                 0 ||
             /*
-            DPCT1025:678: The SYCL queue is created ignoring the flag and
+            DPCT1025: The SYCL queue is created ignoring the flag and
             priority options.
             */
             DPCT_CHECK_ERROR(
@@ -1810,7 +1833,7 @@ int main(int argc, char** argv) {
                     st.mrope = sycl::malloc_device<int32_t>(
                         mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114:679: cudaMemcpy is migrated to asynchronization memcpy,
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
                 assuming in the original code the source host memory is pageable
                 memory. If the memory is not pageable, call wait() on event
                 return by memcpy API to ensure synchronization behavior.
@@ -1833,7 +1856,7 @@ int main(int argc, char** argv) {
         }
         size_t fb = 0, tb = 0;
         /*
-        DPCT1106:676: 'cudaMemGetInfo' was migrated with the Intel extensions
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -1896,9 +1919,14 @@ int main(int argc, char** argv) {
     strata::core::GgufExpertSource gguf_src;
     strata::core::ExpertSource* srcp = nullptr;
     if (o.mmap_experts) {
-        if (native_pack) {   // FileExpertSource maps the canonical pack's experts.bin; a native pack has none
-            std::fprintf(stderr, "strata generate: --mmap-experts needs a canonical pack (experts.bin); %s is a native "
-                                 "(IQ) pack, whose experts are loaded into the arena\n", o.pack.c_str());
+        // FileExpertSource maps the pack's experts.bin: a canonical pack has it; a native (IQ) pack has it when
+        // built with `tools/iq_pack.py --experts-bin` (the per-layer blob sizes of its layout, PR #121).  The low-RAM
+        // mode: the experts come from the file through the OS cache instead of a pinned copy in RAM, for a PC whose
+        // GPU holds most of them but whose RAM cannot hold them all.
+        if (native_pack && !std::filesystem::exists(std::filesystem::path(o.pack) / "experts.bin")) {
+            std::fprintf(stderr, "strata generate: --mmap-experts needs the pack's experts.bin; %s is a native (IQ) pack "
+                                 "built without it: python tools/iq_pack.py --gguf <shard 1> --out %s --experts-bin\n",
+                         o.pack.c_str(), o.pack.c_str());
             return 2;
         }
         if (!src.open(o.pack, g.n_layers, g.n_expert, err)) {
@@ -1994,7 +2022,7 @@ int main(int argc, char** argv) {
     const strata::core::OnDevice on(dev);
         size_t fb = 0, tb = 0;
         /*
-        DPCT1106:680: 'cudaMemGetInfo' was migrated with the Intel extensions
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -2023,7 +2051,7 @@ int main(int argc, char** argv) {
                     0 ||
                 khz <= 0) khz = 1800000;
             /*
-            DPCT1026:682: The call to cudaGetLastError was removed because this
+            DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
             */
             const double speed =
@@ -2149,7 +2177,7 @@ int main(int argc, char** argv) {
     if (o.expert_cache < 0) {
         size_t free_b = 0, total_b = 0;
         /*
-        DPCT1106:683: 'cudaMemGetInfo' was migrated with the Intel extensions
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -2170,7 +2198,7 @@ int main(int argc, char** argv) {
         // for them and the reserve, or the first prompt fails with "device buffers ... do not fit"
         size_t free_b = 0, total_b = 0;
         /*
-        DPCT1106:684: 'cudaMemGetInfo' was migrated with the Intel extensions
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -2191,7 +2219,7 @@ int main(int argc, char** argv) {
     if (native_pack && o.expert_cache > 0 && !profile.empty()) {
         size_t free_b = 0, total_b = 0;
         /*
-        DPCT1106:685: 'cudaMemGetInfo' was migrated with the Intel extensions
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
         runtimes. You may need to adjust the code.
         */
@@ -2283,7 +2311,7 @@ int main(int argc, char** argv) {
             dpct::get_current_device().queues_wait_and_throw();
             size_t free_b = 0, total_b = 0;
             /*
-            DPCT1106:686: 'cudaMemGetInfo' was migrated with the Intel
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
             extensions for device information which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -2363,6 +2391,14 @@ int main(int argc, char** argv) {
                      (long long) prefilled, (long long) want);
     }
 
+    if (o.resident_cpu_experts) {
+        if (!src.pin_cache_complement(xcache, err, /*pin=*/false)) {
+            std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: steady-state CPU cache misses are resident in ordinary RAM; borrowed cache entries may use mmap during prompt prefill\n");
+    }
+
     for (auto& stp : stages) {
         GpuStage& st = *stp;
         const auto& lay = strata::kernels::cpu::expert_layout();
@@ -2721,7 +2757,7 @@ int main(int argc, char** argv) {
         } else {
             for (int64_t c = 0; c < g.hc; ++c)
                 /*
-                DPCT1124:687: cudaMemcpyAsync is migrated to asynchronous memcpy
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
                 API. While the origin API might be synchronous, it depends on
                 the type of operand memory, so you may need to call wait() on
                 event return by memcpy API to ensure synchronization behavior.
@@ -2803,7 +2839,7 @@ int main(int argc, char** argv) {
             return 1;
         }
         /*
-        DPCT1048:3: The original value cudaHostAllocDefault is not meaningful in
+        DPCT1048: The original value cudaHostAllocDefault is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
         check the migrated code.
         */
@@ -3011,12 +3047,12 @@ int main(int argc, char** argv) {
         if (DPCT_CHECK_ERROR(
                 dpct::get_current_device().queues_wait_and_throw()) != 0) {
             /*
-            DPCT1009:688: SYCL reports errors using exceptions and does not use
+            DPCT1009: SYCL reports errors using exceptions and does not use
             error codes. Please replace the "get_error_string_dummy(...)" with a
             real error-handling function.
             */
             /*
-            DPCT1010:689: SYCL uses exceptions to report errors and does not use
+            DPCT1010: SYCL uses exceptions to report errors and does not use
             the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
@@ -3058,13 +3094,13 @@ int main(int argc, char** argv) {
                     stderr,
                     "strata generate: gpu-only-full layers faulted: %s\n",
                     /*
-                    DPCT1009:690: SYCL reports errors using exceptions and does
+                    DPCT1009: SYCL reports errors using exceptions and does
                     not use error codes. Please replace the
                     "get_error_string_dummy(...)" with a real error-handling
                     function.
                     */
                     /*
-                    DPCT1010:691: SYCL uses exceptions to report errors and does
+                    DPCT1010: SYCL uses exceptions to report errors and does
                     not use the error codes. The cudaGetLastError function call
                     was replaced with 0. You need to rewrite this code.
                     */
@@ -3080,13 +3116,13 @@ int main(int argc, char** argv) {
                 std::fprintf(
                     stderr, "strata generate: gpu-only-full head faulted: %s\n",
                     /*
-                    DPCT1009:692: SYCL reports errors using exceptions and does
+                    DPCT1009: SYCL reports errors using exceptions and does
                     not use error codes. Please replace the
                     "get_error_string_dummy(...)" with a real error-handling
                     function.
                     */
                     /*
-                    DPCT1010:693: SYCL uses exceptions to report errors and does
+                    DPCT1010: SYCL uses exceptions to report errors and does
                     not use the error codes. The cudaGetLastError function call
                     was replaced with 0. You need to rewrite this code.
                     */
@@ -3157,7 +3193,7 @@ int main(int argc, char** argv) {
             DPCT_CHECK_ERROR(d_hit_count = sycl::malloc_device<int32_t>(
                                  1, dpct::get_in_order_queue())) != 0 ||
             /*
-            DPCT1114:694: cudaMemcpy is migrated to asynchronization memcpy,
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
             assuming in the original code the source host memory is pageable
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
@@ -3176,7 +3212,7 @@ int main(int argc, char** argv) {
                     st->d_res = sycl::malloc_device<int32_t>(
                         host_res.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114:695: cudaMemcpy is migrated to asynchronization memcpy,
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
                 assuming in the original code the source host memory is pageable
                 memory. If the memory is not pageable, call wait() on event
                 return by memcpy API to ensure synchronization behavior.
@@ -3274,6 +3310,13 @@ int main(int argc, char** argv) {
                                      : (uint64_t) (xcache.slots() - first) *
                                            (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
     };
+    auto request_chunk = [](int64_t tokens, int64_t max_chunk) -> int64_t {
+        if (tokens <= 0 || max_chunk <= 0) return 0;
+        const int64_t rounded = tokens > std::numeric_limits<int64_t>::max() - 255
+                                    ? tokens
+                                    : ((tokens + 255) / 256) * 256;
+        return std::min(max_chunk, rounded);
+    };
     // The prompt path's chunk and the slots it borrows for its buffers: the requested chunk halved until it fits,
     // or with --prefill auto the largest of kAutoChunks whose buffers take at most kAutoLendPct % of the slots (a
     // lent slot's expert is streamed during the prompt and refilled after it; measured on a 12 GB card, 32K Q2_0
@@ -3404,12 +3447,12 @@ int main(int argc, char** argv) {
             for (float*& h : hand) {
                 float* hh = nullptr;
                 /*
-                DPCT1048:4: The original value cudaHostAllocMapped is not
+                DPCT1048: The original value cudaHostAllocMapped is not
                 meaningful in the migrated code and was removed or replaced with
                 0. You may need to check the migrated code.
                 */
                 /*
-                DPCT1048:5: The original value cudaHostAllocPortable is not
+                DPCT1048: The original value cudaHostAllocPortable is not
                 meaningful in the migrated code and was removed or replaced with
                 0. You may need to check the migrated code.
                 */
@@ -3564,7 +3607,9 @@ int main(int argc, char** argv) {
         sp.on_chunk = [&](const float* R_rows, int64_t T, int64_t p0, std::string& e) -> bool {
             std::vector<int32_t> nxt((size_t) T);
             for (int64_t t = 0; t < T; ++t) nxt[(size_t) t] = (int32_t) cur[(size_t) (p0 + t + 1)];
-            if (!mtp.prefill(R_rows, nxt.data(), T, p0, e)) return false;
+            // E-9: batched through the prompt path when it can (one GPU: a layer split's drafter is on the last stage)
+            const bool batched = !multi_gpu && sp.draft_kv(mtp, R_rows, nxt.data(), T, p0, e);
+            if (!e.empty() || (!batched && !mtp.prefill(R_rows, nxt.data(), T, p0, e))) return false;
             // progress for the server window: PP <position reached> <prompt tokens> <ms> <fresh tokens/s>
             const int64_t done = p0 + T;
             const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
@@ -3618,7 +3663,7 @@ int main(int argc, char** argv) {
         if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
         dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
         /*
-        DPCT1025:696: The SYCL queue is created ignoring the flag and priority
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
         options.
         */
         if (DPCT_CHECK_ERROR(
@@ -3636,7 +3681,7 @@ int main(int argc, char** argv) {
             try {
         if (d_res != nullptr)
                 /*
-                DPCT1114:697: cudaMemcpy is migrated to asynchronization memcpy,
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
                 assuming in the original code the source host memory is pageable
                 memory. If the memory is not pageable, call wait() on event
                 return by memcpy API to ensure synchronization behavior.
@@ -3720,7 +3765,7 @@ int main(int argc, char** argv) {
                 const strata::core::OnDevice on(gs ? gs->dev : -1);
                 if (slot < 0 || b == nullptr ||
                     /*
-                    DPCT1124:698: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
@@ -3817,7 +3862,7 @@ int main(int argc, char** argv) {
             // and a page-in while the verify graph spins on a host flag stalls the request for good
             size_t free_b = 0, total_b = 0;
             /*
-            DPCT1106:699: 'cudaMemGetInfo' was migrated with the Intel
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
             extensions for device information which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -3837,7 +3882,7 @@ int main(int argc, char** argv) {
         {
             size_t free_b = 0, total_b = 0;
             /*
-            DPCT1106:700: 'cudaMemGetInfo' was migrated with the Intel
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
             extensions for device information which may not be supported by all
             compilers or runtimes. You may need to adjust the code.
             */
@@ -4273,12 +4318,21 @@ int main(int argc, char** argv) {
             auto lend = [&](int64_t tokens, std::string &e) -> bool {
                 try {
             if (lend_first < 0) return true; // its own buffers: nothing to lend
-                const int64_t want = std::min<int64_t>(o.prefill_chunk, (tokens + 255) / 256 * 256);
+                const int64_t want = request_chunk(tokens, o.prefill_chunk);
+                if (want <= 0) {
+                    e = "prefill: cannot lend buffers for an empty request segment";
+                    return false;
+                }
                 if (!lent_now.empty()) {
                     if (want <= lent_chunk) return true;
                     if (!refill(e)) return false;
                 }
-                const int32_t first = std::max<int32_t>(lend_first, (int32_t) (xcache.slots() - lend_slots(want)));
+                const int64_t slots = lend_slots(want);
+                if (slots <= 0 || slots > xcache.slots() - lend_first) {
+                    e = "prefill: request-sized buffers exceed the configured lend region";
+                    return false;
+                }
+                const int32_t first = std::max<int32_t>(lend_first, (int32_t) (xcache.slots() - slots));
                 if (want != sp.chunk() || first != lend_first_now) {
                     if (!sp.relayout(want, xcache.device_slot(first), lend_bytes(first), e)) return false;
                     lend_first_now = first;
@@ -4608,6 +4662,10 @@ int main(int argc, char** argv) {
                     if (st.kv_q4) {
                         const int64_t q4b = (int64_t) strata::kernels::kv_q4_bytes_per_head((int) qs.head_dim);
                         a = {{h ? st.host.k_q4 : st.k_q4, q4b}, {h ? st.host.v_q4 : st.v_q4, q4b}};
+                    } else if (st.kv_hybrid) {
+                        const int64_t q4b = (int64_t) strata::kernels::kv_q4_bytes_per_head((int) qs.head_dim);
+                        a = {{h ? st.host.k_q : st.k_q, kvb}, {h ? st.host.v_q4 : st.v_q4, q4b},
+                             {h ? st.host.k_scale : st.k_scale, scb}};
                     } else {
                         a = {{h ? st.host.k_q : st.k_q, kvb}, {h ? st.host.v_q : st.v_q, kvb},
                              {h ? st.host.k_scale : st.k_scale, scb}, {h ? st.host.v_scale : st.v_scale, scb}};
@@ -4707,19 +4765,22 @@ int main(int argc, char** argv) {
     std::FILE* final_r = o.dump_final_r.empty() ? nullptr : std::fopen(o.dump_final_r.c_str(), "wb");
     std::vector<float> final_r_host(final_r ? (size_t) (g.hc * g.n_embd) : 0);
     std::vector<std::pair<int32_t, int32_t>> lent;     // (residency index, slot) lent to the prompt path
+    const int64_t n_batched = (o.prefill_until > 0 && o.prefill_until < n_prompt - 1) ? o.prefill_until : n_prompt - 1;
     if (o.prefill_chunk > 0 && n_prompt > 1) {
         void* borrow = nullptr;
         uint64_t borrow_bytes = 0;
         if (!o.no_prefill_borrow && !host_res.empty() && d_res != nullptr) {
             int64_t chunk = o.prefill_chunk;
             int64_t k = plan_lend(chunk);             // auto: the largest chunk that fits; fixed: halved to fit
-            if (k > 0 && chunk > (n_prompt - 1 + 255) / 256 * 256) {   // no bigger than the prompt needs
-                chunk = std::max<int64_t>(256, (n_prompt - 1 + 255) / 256 * 256);
+            const int64_t request_sized = request_chunk(n_batched, chunk);
+            if (k > 0 && request_sized < chunk) {                     // no bigger than this prompt segment needs
+                chunk = request_sized;
                 k = lend_slots(chunk);
+                if (k + 128 > xcache.slots()) k = 0;
                 if (!o.prefill_auto) o.prefill_chunk = chunk;
             }
             if (o.prefill_auto) {
-                o.prefill_chunk = k > 0 ? chunk : 1024;
+                o.prefill_chunk = k > 0 ? chunk : request_chunk(n_batched, 1024);
                 std::fprintf(stderr, "strata generate: prompt chunk auto: %lld tokens\n", (long long) o.prefill_chunk);
             } else if (chunk != o.prefill_chunk) {
                 k = 0;                                 // a fixed chunk that does not fit: its own buffers, as before
@@ -4760,11 +4821,11 @@ int main(int argc, char** argv) {
                 // cell i pairs R_i with the token at i + 1 (every such token is in the prompt)
                 std::vector<int32_t> nxt((size_t) T);
                 for (int64_t t = 0; t < T; ++t) nxt[(size_t) t] = (int32_t) o.tokens[(size_t) (p0 + t + 1)];
-                return mtp.prefill(R_rows, nxt.data(), T, p0, e);
+                if (prefill.draft_kv(mtp, R_rows, nxt.data(), T, p0, e)) return true;   // E-9
+                return e.empty() && mtp.prefill(R_rows, nxt.data(), T, p0, e);
             };
         }
         const Clock::time_point tp0 = Clock::now();
-        const int64_t n_batched = (o.prefill_until > 0 && o.prefill_until < n_prompt - 1) ? o.prefill_until : n_prompt - 1;
         if (!prefill.run(o.tokens.data(), n_batched, 0, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
@@ -4930,13 +4991,13 @@ int main(int argc, char** argv) {
                 "strata generate: the device faulted in lm_head at position "
                 "%lld: %s\n",
                 /*
-                DPCT1009:701: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1010:702: SYCL uses exceptions to report errors and does not
+                DPCT1010: SYCL uses exceptions to report errors and does not
                 use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
@@ -4952,7 +5013,7 @@ int main(int argc, char** argv) {
             strata::program::logits_selection::selected(pos, dump_positions, o.logits_stride);
         const bool read_logits = !o.stream_token || o.check_logits || emit_logits;
         /*
-        DPCT1124:703: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -4994,7 +5055,7 @@ int main(int argc, char** argv) {
         sp.counter = (uint64_t) pos;
         strata::kernels::sample_tokens(d_logits, 1, (int) n_vocab, nullptr, 0, sp, d_next, token_stream);
         /*
-        DPCT1124:704: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
         While the origin API might be synchronous, it depends on the type of
         operand memory, so you may need to call wait() on event return by memcpy
         API to ensure synchronization behavior.
@@ -5006,13 +5067,13 @@ int main(int argc, char** argv) {
                 stderr,
                 "strata generate: reading the sampled token back failed: %s\n",
                 /*
-                DPCT1009:705: SYCL reports errors using exceptions and does not
+                DPCT1009: SYCL reports errors using exceptions and does not
                 use error codes. Please replace the
                 "get_error_string_dummy(...)" with a real error-handling
                 function.
                 */
                 /*
-                DPCT1010:706: SYCL uses exceptions to report errors and does not
+                DPCT1010: SYCL uses exceptions to report errors and does not
                 use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
@@ -5125,7 +5186,7 @@ int main(int argc, char** argv) {
         double ms_adapt = 0;
         dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
         /*
-        DPCT1025:707: The SYCL queue is created ignoring the flag and priority
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
         options.
         */
         if (!drive.d.usage.empty() &&
@@ -5150,7 +5211,7 @@ int main(int argc, char** argv) {
             pending.clear();
             if (d_res != nullptr)
                 /*
-                DPCT1114:708: cudaMemcpy is migrated to asynchronization memcpy,
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
                 assuming in the original code the source host memory is pageable
                 memory. If the memory is not pageable, call wait() on event
                 return by memcpy API to ensure synchronization behavior.
@@ -5201,7 +5262,7 @@ int main(int argc, char** argv) {
                 // asynchronous: the copies run while the MTP drafts; the next window waits for them
                 if (slot < 0 || b == nullptr ||
                     /*
-                    DPCT1124:709: cudaMemcpyAsync is migrated to asynchronous
+                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
                     memcpy API. While the origin API might be synchronous, it
                     depends on the type of operand memory, so you may need to
                     call wait() on event return by memcpy API to ensure
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index f46dc1507f8..3a75c1a56e7 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -185,6 +185,7 @@ def untangle_tables(s):
 for rel in ["src/kernels/cuda/qsa_prompt_attn.dp.cpp", "src/kernels/cuda/qsa_select.dp.cpp",
             "src/kernels/cuda/native_qsa_score.dp.cpp"]:
     edit(rel, lambda s: s.replace("#if !defined(DPCT_COMPATIBILITY_TEMP) || DPCT_COMPATIBILITY_TEMP >= 800", OFF)
+         .replace("#elif !defined(DPCT_COMPATIBILITY_TEMP) || DPCT_COMPATIBILITY_TEMP >= 800", OFF.replace("#if 0", "#elif 0"))   # after upstream's __HIPCC__ guard (0.1.27)
          .replace("#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP < 800", ON)
          .replace("    __trap();", "    /* unreachable on SYCL: the launcher refuses this device */"))
 for rel in ["src/kernels/cuda/qsa_prompt_attn.dp.cpp", "src/kernels/cuda/qsa_select.dp.cpp"]:
@@ -195,7 +196,7 @@ def untangle_tables(s):
 #     which the shared multi-column kernel cannot call. A constexpr copy of the table restores the 2-argument form.
 def mmvq(s):
     if "kIq4nlTable" in s: return s   # already applied (the table is the marker)
-    m = re.search(r"iq4nl_values\(sycl::range\(16\), \{([^}]*)\}", s, re.S)
+    m = re.search(r"iq4nl_values[^;{]*\(sycl::range\(16\), \{([^}]*)\}", s, re.S)   # also after 8c's heap allocation
     vals = " ".join(m.group(1).split())
     table = "static constexpr int8_t kIq4nlTable[16] = {%s};\n" % vals
     s = s.replace("__dpct_inline__ sycl::int2 iq4_table_lookup(", table + "__dpct_inline__ sycl::int2 iq4_table_lookup(", 1)
diff --git a/sycl/tools/normalize.sh b/sycl/tools/normalize.sh
new file mode 100755
index 00000000000..4d248897c8e
--- /dev/null
+++ b/sycl/tools/normalize.sh
@@ -0,0 +1,26 @@
+#!/usr/bin/env bash
+# normalize.sh <dpct-out-dir> <upstream-commit>: a fresh migrate.sh output in the port's shape, for a 3-way merge.
+#   - dpct's `X.cpp.dp.cpp` becomes `X.cpp` (the .cu -> .dp.cpp names stay), its .yaml/report files go
+#   - files dpct left byte-identical to the upstream original go too (sycl/CMakeLists.txt falls back to them)
+#   - the DPCTnnnn:<serial> message numbers are dropped (they renumber on every run and would be pure noise)
+#   - fixups.py runs on the result
+# Updating the port after an upstream merge (docs/INTEL.md "Keeping up with upstream"):
+#   migrate the OLD upstream tree to sycl-base and the merged tree to sycl-new, normalize both with their
+#   commits, then for every file in both:  git merge-file sycl/F sycl-base/F sycl-new/F
+set -euo pipefail
+d=$(cd "$1" && pwd); rev=$2; repo=$(cd "$(dirname "$0")/../.." && pwd)
+cd "$d"
+find . -name '*.yaml' -delete; rm -f dpct_report.*
+find . -name '*.cpp.dp.cpp' | while read -r f; do mv "$f" "${f%.cpp.dp.cpp}.cpp"; done
+n=0
+while read -r f; do
+  rel=${f#./}; orig=$rel; [[ $rel == *.dp.cpp ]] && orig=${rel%.dp.cpp}.cu
+  if git -C "$repo" cat-file -e "$rev:$orig" 2>/dev/null && cmp -s "$f" <(git -C "$repo" show "$rev:$orig"); then
+    rm "$f"; n=$((n+1))
+  fi
+done < <(find src include third_party -type f 2>/dev/null)
+find . -type d -empty -delete
+find src include -type f -exec sed -i -E 's/DPCT([0-9]{4}):[0-9]+:/DPCT\1:/' {} +
+mkdir -p tools && cp "$repo/sycl/tools/fixups.py" tools/
+python3 tools/fixups.py > fixups.log 2>&1 || { tail -5 fixups.log; exit 1; }
+echo "$d: dropped $n unchanged files, $(find src include -type f | wc -l) remain, fixups applied: $(grep -c fixed fixups.log)"

From b7d88b93087c949383576a6478bb489e4daa35d9 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 01:03:42 -0500
Subject: [PATCH 021/201] docs: INTEL.md - the merged port's numbers on the B70
 (46.5 / 38.3 tok/s decode, 566 tok/s prompt)

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 6d5e7e03722..0948f1cb8b9 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -224,6 +224,11 @@ the engine plus `sycl/rank_kernels.py` gives device time per kernel. `mmvq_bench
 NATIVE_BENCH=1` time the two hot kernel families in isolation (warm the clocks first: a 5 ms run measures
 the ramp, not the kernel).
 
+**After the 0.1.25-0.1.27 merge (2026-09-30, same card, same flags, AOT).** Fibonacci prompt (19 tokens),
+64 greedy tokens: decode 46.5 tok/s (85% of drafts accepted). The 2,184-token prompt: 566 tok/s prompt,
+38.3 tok/s decode (77% accepted on that text); the draft layer's prompt pass is now upstream's batched one
+(38.6 ms for 2,184 tokens, from 105 ms for 19 before it). Parity: 19 of 22, byte-exact `quantize_act` back.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):

From bf804a19675f1edbb32cf784486c66219a1b6359 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 07:47:11 -0500
Subject: [PATCH 022/201] sycl: the speed round - warm-up captures,
 commit/draft overlap, vector-store dequant, XMX kernels (opt-in), profiles

Measured on the B70, outputs identical before and after each change (docs/INTEL.md "Speed work"):
- every window graph and the drafter's graphs captured at load (STRATA_WARM_GRAPHS=0 restores first-use capture)
- the commit graph is left running while the drafter's round runs on its own queue: decode 38.3 -> 43.1 tok/s at
  the 2,184-token context, 46.5 -> 49.7 on a short prompt
- the draft layer's batched prompt pass takes prompts under 64 rows (106 -> 16 ms on 19 tokens)
- one device module per kernel: the first launch in the prompt path 245 -> 1 ms
- the expert dequant writes each thread's run as one vector store: 0.085 -> 0.030 ms per expert; the 2,184-token
  prompt 566 -> 682 tok/s, 8,000 tokens 720 -> 841
- SWAR sign compare/subtract in the expert dots, a local-memory resident-plan kernel, a split-K fused down kernel
  (bit-identical to the single-token kernel, gr_parity): parity-clean, no measurable decode change

XMX: oneMKL's FP16 GEMMs already run on the XMX units (30-60 TFLOP/s). Two joint_matrix kernels are in the tree,
correct and opt-in because both lose to the paths they would replace on this card: xmx_gemm_iq (fused dequant +
GEMM from the quantized rows; xmx_gemm_bench) and qsa_prompt_attn_xmx (the mma.sync prompt attention's port;
qsa_prompt_attn_parity passes at 1e-6 of scale; STRATA_PROMPT_ATTN_XMX=1).

Profiling: unitrace -q needs Intel's metrics libraries (Dockerfile.metrics) and dev.xe.observation_paranoid=0;
the per-kernel table is in INTEL.md. A trap recorded there: --prefill-until with a native pack drops the prompt
tail (the token loop is skipped), so a "windows for short prompts" routing was invalid and is not in this commit.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  30 ++
 sycl/CMakeLists.txt                           |   7 +
 sycl/include/strata/core/mtp.hpp              |   9 +
 sycl/include/strata/core/verify.hpp           |  11 +-
 .../strata/kernels/qsa_prompt_attn_xmx.hpp    |  11 +
 sycl/include/strata/kernels/xmx_gemm.hpp      |  11 +
 sycl/src/core/verify.cpp                      |  48 ++-
 sycl/src/kernels/cuda/fused_gr.dp.cpp         |  84 +++--
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       | 342 +++++++++++++----
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp  |   5 +-
 .../kernels/cuda/qsa_prompt_attn_xmx.dp.cpp   | 357 ++++++++++++++++++
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   |  48 ++-
 sycl/src/kernels/xmx_gemm_bench.cpp           |  93 +++++
 sycl/src/prefill/prefill.cpp                  |  18 +-
 sycl/src/program/generate.cpp                 |  20 +-
 15 files changed, 967 insertions(+), 127 deletions(-)
 create mode 100644 sycl/include/strata/kernels/qsa_prompt_attn_xmx.hpp
 create mode 100644 sycl/include/strata/kernels/xmx_gemm.hpp
 create mode 100644 sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
 create mode 100644 sycl/src/kernels/xmx_gemm_bench.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 0948f1cb8b9..e5701e80509 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -229,6 +229,36 @@ the ramp, not the kernel).
 38.3 tok/s decode (77% accepted on that text); the draft layer's prompt pass is now upstream's batched one
 (38.6 ms for 2,184 tokens, from 105 ms for 19 before it). Parity: 19 of 22, byte-exact `quantize_act` back.
 
+**Speed work, 2026-09-30 (after the 0.1.27 merge).** What moved the numbers, measured on the B70 with the
+same prompts as above (outputs identical before and after each change):
+
+| change | effect |
+|---|---|
+| every window graph and the drafter's graphs captured at load (`STRATA_WARM_GRAPHS=0`: as before) | the first request no longer pays 250-290 ms of captures |
+| the commit graph left running while the drafter's round runs on its own queue (`Verifier::commit(wait=false)` + `commit_finish`) | decode 38.3 -> 43.0 tok/s at the 2,184-token context, 46.5 -> 49.8 short |
+| the draft layer's batched prompt pass takes prompts under 64 rows (it fell back to per-6-token graphs) | its prompt cost on 19 tokens 106 -> 16 ms |
+| one device module per kernel (`-fsycl-device-code-split=per_kernel`) | the first launch in the prompt path (the embedding gather) 245 -> 1 ms |
+| the expert dequant writes each thread's run of FP16 values as one vector store (it wrote them one 2-byte store at a time) | dequant per expert 0.085 -> 0.030 ms; prompt 496 -> 575 tok/s at 2,184 tokens, 720 -> 841 at 8,000 |
+| SWAR sign compare/subtract in the expert dots, a local-memory resident-plan kernel, a split-K fused down kernel (bit-identical to the single-token one) | parity-clean, no measurable decode change; kept |
+
+Draft policy sweep (2,184-token prompt, 128 tokens): windows of 6 (`--spec 4`) at 41.6-43.5 tok/s; `--spec 2`
+33.6, `--spec 6` 35-37; `--spec-min-p` 0.3-0.7 within noise. Profiles (unitrace, `strata-sycl-dev:metrics` with
+Intel's metrics libraries and `dev.xe.observation_paranoid=0`): the expert dot kernels are ALU-bound (77% XVE
+active), the dense projections memory-latency bound (92-128 GB/s at 84-93% occupancy), a decode round is 80-85%
+kernel time and ~5 us of launch gap per node over 2,400-2,600 nodes.
+
+**XMX.** oneMKL's FP16 GEMMs already run on the XMX units (30-60 TFLOP/s in `xmx_gemm_bench`); the prompt path is
+bound by the dequant that feeds them, not by the products. Two joint_matrix kernels were written and are correct
+but lose to the existing paths on this card, so both stay opt-in: `xmx_gemm_iq` (a fused dequant + GEMM straight
+from the quantized rows, 4-5x slower than dequant + oneMKL) and `qsa_prompt_attn_xmx` (the port of the mma.sync
+prompt attention; `qsa_prompt_attn_parity` passes at 1e-6 of scale, 3x slower than the FP32 fallback per chunk;
+`STRATA_PROMPT_ATTN_XMX=1`). Where the prompt time goes now (2,184 / 8,000 tokens): dequant 28% / 27%, GEMMs
+22% / 20%, the per-layer host grouping 9.5% / 9%, attention 7% / 14%, embeddings + PLE rows 13% / 5%.
+
+A trap worth knowing: with a native pack `--prefill-until N` does not feed the rest of the prompt through the
+token loop (it is skipped for native packs), so the tokens after N are dropped and the model free-runs. Compare
+output tokens between paths, never only timings.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 2ab04dda0ec..682a6ed68a6 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -44,6 +44,10 @@ endif()
 # Every kernel was written for 32-lane warps (lane = tid & 31, warp-synchronous reductions). dpct pins the
 # sub-group size only where it saw a shuffle; the rest would get Xe2's default of 16 and race. Force 32 everywhere.
 list(APPEND _sycl_flags -fsycl-default-sub-group-size=32)
+# One device module per kernel: the first launch of a kernel then loads only its own module. With the default
+# split the first launch in the prompt path (the embedding gather) paid 245 ms for the image it shared (2026-09-30).
+list(APPEND _sycl_link -fsycl-device-code-split=per_kernel)
+list(APPEND _sycl_flags -fsycl-device-code-split=per_kernel)
 add_compile_options("$<$<COMPILE_LANGUAGE:CXX>:${_sycl_flags}>" -fp-model=precise -Wno-unused-parameter
                     -Wno-unused-variable -Wno-deprecated-declarations)
 add_link_options(${_sycl_link})
@@ -142,6 +146,7 @@ foreach(k IN LISTS _kernel_cu)
   list(APPEND _kernel_files src/kernels/cuda/${k}.cu)
 endforeach()
 strata_resolve(_kernels ${_kernel_files} src/kernels/ngram.cpp src/ngram/ple_reader.cpp src/platform/direct_file.cpp)
+list(APPEND _kernels ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp)   # port-only: the XMX prompt attention
 add_library(strata_kernels STATIC ${_kernels})
 target_include_directories(strata_kernels PRIVATE ${STRATA_ROOT}/third_party/ggml)
 target_link_libraries(strata_kernels PUBLIC strata_core)
@@ -188,6 +193,8 @@ if(STRATA_SYCL_PARITY)
   target_link_libraries(kv_hybrid_parity PRIVATE strata_kernels)
   add_executable(mmvq_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_bench.cpp)   # dense mmvq timing
   target_link_libraries(mmvq_bench PRIVATE strata_kernels)
+  add_executable(xmx_gemm_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/xmx_gemm_bench.cpp)   # XMX quantized GEMM vs dequant+oneMKL
+  target_link_libraries(xmx_gemm_bench PRIVATE strata_kernels strata_prefill)   # -qmkl for the oneMKL reference
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
   #   native_expert_parity <shard1.gguf> [layer ...]
   if(STRATA_NATIVE_EXPERTS)
diff --git a/sycl/include/strata/core/mtp.hpp b/sycl/include/strata/core/mtp.hpp
index 52847e1d8c4..1426a610a74 100644
--- a/sycl/include/strata/core/mtp.hpp
+++ b/sycl/include/strata/core/mtp.hpp
@@ -25,6 +25,7 @@
 #include "strata/core/session.hpp"
 
 #include <cstdint>
+#include <algorithm>
 #include <string>
 #include <vector>
 
@@ -47,6 +48,14 @@ class MtpDrafter {
     void set_prompt_len(int64_t n) { prompt_len_ = n; }
     /// At most this many drafts per round (below max_t - 1): a window longer than the MTP's comes from elsewhere.
     void set_max_drafts(int k) { max_drafts_ = k; }
+    /// SYCL port: capture the round, step and prompt graphs at load rather than on first use (see Verifier::warm)
+    bool warm(std::string& err) {
+        for (int T = 1; T <= max_t_; ++T)
+            if (!capture_round(T, err) || !capture_prefill(T, err)) return false;
+        for (int j = 1; j < std::min(max_t_ - 1, max_drafts_); ++j)
+            if (!capture_step(j, err)) return false;
+        return true;
+    }
     uint64_t vram_bytes() const { return vram_; }
     /// The draft layer's K/V state (read-only: --serve's STRATA_STATE_HASH check hashes it)
     const QsaState& kv_state() const { return st_; }
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index dd90e57cfce..ff53fe58626 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -31,6 +31,7 @@
 #include "strata/kernels/sampler.hpp"
 
 #include <cstdint>
+#include <chrono>
 #include <string>
 #include <vector>
 
@@ -108,7 +109,13 @@ class Verifier {
     static int64_t handoff_floats(const ModelGeometry& g) { return (int64_t) g.hc * g.n_embd + g.n_embd + g.hc; }
 
     /// Keep the first `n_keep` (1..T) tokens of the last window; advances `ss.ple_prev` by them.
-    bool commit(int n_keep, std::string& err);
+    /// `wait = false` (SYCL port, single stage only): the commit graph is launched and left running so the drafter's
+    /// round (its own queue, reads only the window's residuals) overlaps it; `commit_finish()` before the next run.
+    bool commit(int n_keep, std::string& err, bool wait = true);
+    bool commit_finish(std::string& err);
+    /// SYCL port: capture every window graph now (one per window size) instead of on first use, so the first
+    /// request does not pay for them (a 2,400-node graph takes tens of ms to finalize on this backend).
+    bool warm(std::string& err);
 
     /// Token t's residual after the last layer, (hc, n_embd) on the device, valid until the next `run`.
     const float* final_R(int t) const;
@@ -155,6 +162,8 @@ class Verifier {
     void* next_user_ = nullptr;
     bool ple_stage() const { return lb_ <= 1 && 1 < le_; }   ///< holds layer 1, where the PLE block runs
     bool capture_commit(std::string& err);
+    int pending_commit_ = 0;                  ///< n_keep of a launched, unfinished commit (0: none)
+    std::chrono::steady_clock::time_point pending_commit_t0_{};
     bool record_window(int T, dpct::queue_ptr cs, std::string &err);
     static constexpr int kProfPer = 32;              // stamps per layer
     bool prof_on_ = false;
diff --git a/sycl/include/strata/kernels/qsa_prompt_attn_xmx.hpp b/sycl/include/strata/kernels/qsa_prompt_attn_xmx.hpp
new file mode 100644
index 00000000000..2536387fb96
--- /dev/null
+++ b/sycl/include/strata/kernels/qsa_prompt_attn_xmx.hpp
@@ -0,0 +1,11 @@
+// SYCL port: the prompt attention (QSA, selected cells) on XMX joint_matrix - see qsa_prompt_attn_xmx.dp.cpp.
+#pragma once
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include <cstdint>
+namespace strata::kernels {
+/// The same contract as qsa_prompt_attn_batch; returns false (nothing launched) when the shape, pools or device are not
+/// handled, so the caller keeps its fallback. Off by default (slower than the fallback): STRATA_PROMPT_ATTN_XMX=1 enables it.
+bool qsa_prompt_attn_xmx(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+                         const QsaShapes& s, float* attn, int64_t n_q, void* stream);
+}
diff --git a/sycl/include/strata/kernels/xmx_gemm.hpp b/sycl/include/strata/kernels/xmx_gemm.hpp
new file mode 100644
index 00000000000..a4b31b94deb
--- /dev/null
+++ b/sycl/include/strata/kernels/xmx_gemm.hpp
@@ -0,0 +1,11 @@
+// SYCL port: XMX (joint_matrix) GEMM straight from a ggml-quantized weight matrix - see iq_kernels.dp.cpp.
+#pragma once
+#include <cstdint>
+namespace strata::kernels {
+/// Y[M][n_out] (FP32, row stride ldy) = X[M][K] (FP16, row stride K) . W[n_out][K]^T with W's rows quantized as ggml
+/// type `ty` (18 IQ3_XXS, 20 IQ4_NL, 21 IQ3_S, 22 IQ2_S, 42 Q2_0). `up` non-null: the gate/up pair, virtual rows
+/// interleaved gate/up as iq_dequant_gu_f16 lays them out (n_out = 2 * n_ff). Returns false when the shape or type is
+/// not handled (the caller keeps its dequant + oneMKL path).
+bool xmx_gemm_iq(int ty, const void* gate, const void* up, int64_t K, int n_out, const uint16_t* X, int M, float* Y,
+                 int64_t ldy, void* stream);
+}
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index ba0c9ca423a..67805949979 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -1455,9 +1455,10 @@ void Verifier::publish_plan(void* ctx) {
     *(volatile uint32_t*) v->h_flagA_ = v->cur_layer_ + 1;
 }
 
-bool Verifier::commit(int n_keep, std::string &err) try {
+bool Verifier::commit(int n_keep, std::string &err, bool wait) try {
     const OnDevice on_device(device_);
     if (n_keep < 1 || n_keep > last_t_) { err = "verify: commit count out of range"; return false; }
+    if (pending_commit_ != 0 && !commit_finish(err)) return false;
     const Clock::time_point t0 = Clock::now();
     h_commit_[0] = n_keep;
     h_commit_[1] = n_keep - 1;
@@ -1481,21 +1482,36 @@ bool Verifier::commit(int n_keep, std::string &err) try {
               dpct::get_error_string_dummy(le);
         return false;
     }
+    if (!wait && next_ == nullptr) {   // left running: commit_finish() collects it (the drafter overlaps it)
+        pending_commit_ = n_keep;
+        pending_commit_t0_ = t0;
+        return true;
+    }
+    pending_commit_ = n_keep;
+    pending_commit_t0_ = t0;
+    if (!commit_finish(err)) return false;
+    return next_ == nullptr || next_->commit(n_keep, err);
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool Verifier::warm(std::string &err) {
+    for (int T = 1; T <= max_t_; ++T)
+        if (!capture(T, err)) return false;
+    return true;
+}
+
+bool Verifier::commit_finish(std::string &err) try {
+    if (pending_commit_ == 0) return true;
+    const OnDevice on_device(device_);
+    const int n_keep = pending_commit_;
+    pending_commit_ = 0;
     const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
-    /*
-    DPCT1009: SYCL reports errors using exceptions and does not use error
-    codes. Please replace the "get_error_string_dummy(...)" with a real
-    error-handling function.
-    */
-    /*
-    DPCT1001: The statement could not be removed.
-    */
-    /*
-    DPCT1000: Error handling if-stmt was detected but could not be rewritten.
-    */
     if (se != 0) {
-        err =
-            std::string("verify: commit: ") + dpct::get_error_string_dummy(se);
+        err = std::string("verify: commit: ") + dpct::get_error_string_dummy(se);
         return false;
     }
     if (ple_stage())   // stages that share one session must advance it once
@@ -1503,8 +1519,8 @@ bool Verifier::commit(int n_keep, std::string &err) try {
             ss_->ple_prev[0] = ss_->ple_prev[1];
             ss_->ple_prev[1] = last_tokens_[t];
         }
-    ms_commit += ms_since(t0);
-    return next_ == nullptr || next_->commit(n_keep, err);
+    ms_commit += ms_since(pending_commit_t0_);
+    return true;
 }
 catch (sycl::exception const &exc) {
   std::cerr << exc.what() << "Exception caught at file:" << __FILE__
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 86375f1d584..27b912c624d 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -1,5 +1,7 @@
 // src/kernels/cuda/fused_gr.cu - see include/strata/kernels/fused_gr.hpp.
 #define DPCT_PROFILING_ENABLED
+#include <mutex>
+#include <unordered_map>
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
@@ -19,6 +21,19 @@ constexpr int D = N * HC;       // 10240
 constexpr int LR = 320;         // hc_lr
 constexpr int THREADS = 256;
 constexpr int WARPS = THREADS / 32;
+#if defined(__HIPCC__)
+constexpr int TILE = 1280;             // eight-token tile fits gfx1100's 64 KiB LDS limit
+#else
+constexpr int TILE = 2560;             // xn floats per token staged at a time: 320 chunks of 8, 10 per lane
+#endif
+constexpr int TQ = TILE / 8 / 32;      // uint4 weight chunks per lane per tile
+// SYCL port: the down kernel's 41 work-groups filled 15% of the B70's threads (metrics 2026-09-30); each row's
+// D = 4 tiles are split over DOWN_SPLIT work-groups that write partial sums, summed in a fixed order by the up
+// kernel (deterministic, unlike atomics) before the row's nonlinearity.
+#ifndef STRATA_GR_DOWN_SPLIT
+#define STRATA_GR_DOWN_SPLIT (D / TILE)   // 4: one tile per split (1: the unsplit order, for A/B)
+#endif
+constexpr int DOWN_SPLIT = STRATA_GR_DOWN_SPLIT;
 constexpr int DOWN_BLOCKS = LR / WARPS;          // 40 blocks of 8 rows; one more for the inject rows
 constexpr int UP_COLS = 32;                      // columns d per `up` block (x 4 streams = 128 rows)
 constexpr int UP_BLOCKS = N / UP_COLS;           // 80
@@ -134,15 +149,21 @@ auto &xn = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[D]>(
     if (inject_block && (a.w_inject == nullptr || warp >= HC)) return;
     const uint16_t* wrow = (inject_block ? a.w_inject : a.w_down) + (size_t) row * D;
     const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
+    // SYCL port: the multi kernel's order - per-tile partial sums for the split rows (gr_parity: bit-identical),
+    // the inject rows still one accumulation over the whole row (their block is not split there)
     float acc = 0.0f;
+    if (inject_block) {
 #pragma unroll 4
-    /*
-    DPCT1098: The '*' expression is used instead of the __ldg call. These
-    two expressions do not provide the exact same functionality. Check the
-    generated code for potential precision and/or performance issues.
-    */
-    for (int j = lane; j < D / 8; j += 32) acc += dot8(*(w4 + j), xn + j * 8);
-    acc = warp_sum(acc);
+        for (int j = lane; j < D / 8; j += 32) acc += dot8(*(w4 + j), xn + j * 8);
+        acc = warp_sum(acc);
+    } else {
+        for (int sp = 0; sp < DOWN_SPLIT; ++sp) {
+            float part = 0.0f;
+#pragma unroll 5
+            for (int j = lane + sp * (TILE / 8); j < (sp + 1) * (TILE / 8); j += 32) part += dot8(*(w4 + j), xn + j * 8);
+            acc += warp_sum(part);
+        }
+    }
     if (lane != 0) return;
     if (inject_block) {
         a.inject_out[row] = acc;
@@ -218,6 +239,7 @@ struct GrMulti {
     FusedGrArgs a[kFusedGrMaxT];
     float* xn;
     int T;
+    float* part;   ///< [DOWN_SPLIT][kFusedGrMaxT][LR] partial row sums of the down kernel
 };
 
 // Step 1 of `gr_down_kernel`, one block per token, same threads and reduction order: rs[t] and xn[t] to global.
@@ -290,12 +312,6 @@ auto &part =
     for (int i = t; i < D; i += THREADS) xn[i] *= s_rs[i / N];
 }
 
-#if defined(__HIPCC__)
-constexpr int TILE = 1280;             // eight-token tile fits gfx1100's 64 KiB LDS limit
-#else
-constexpr int TILE = 2560;             // xn floats per token staged at a time: 320 chunks of 8, 10 per lane
-#endif
-constexpr int TQ = TILE / 8 / 32;      // uint4 weight chunks per lane per tile
 
 // Step 2 of `gr_down_kernel` for T tokens.  One warp per row (so each lane accumulates the same chunks in the
 // same order as the single-token kernel); per tile the lane's 10 weight chunks are loaded BEFORE the activation
@@ -311,15 +327,17 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
     auto tile = (float *)dpct_local; // [T][TILE]
     const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
     const int T = m.T;
-    const bool inject_block = item_ct1.get_group(2) == DOWN_BLOCKS;
-    const int row = inject_block ? warp : item_ct1.get_group(2) * WARPS + warp;
+    const int gid = (int) item_ct1.get_group(2);
+    const bool inject_block = gid == DOWN_BLOCKS * DOWN_SPLIT;
+    const int split = inject_block ? 0 : gid % DOWN_SPLIT, rb = inject_block ? 0 : gid / DOWN_SPLIT;
+    const int row = inject_block ? warp : rb * WARPS + warp;
     const bool active = !(inject_block && (m.a[0].w_inject == nullptr || warp >= HC));
     const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
     const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
     float acc[kFusedGrMaxT];
 #pragma unroll
     for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
-    for (int base = 0; base < D; base += TILE) {
+    for (int base = inject_block ? 0 : split * TILE; base < D; base += inject_block ? TILE : TILE * DOWN_SPLIT) {
         sycl::uint4 wv[TQ];
         if (active) {
 #pragma unroll
@@ -378,8 +396,7 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
         if (inject_block) {
             m.a[k].inject_out[row] = s[k];
         } else {
-            const float x = s[k] / (float) HC;
-            m.a[k].lo[row] = x / (1.0f + sycl::native::exp(-x));
+            m.part[((size_t) split * kFusedGrMaxT + k) * LR + row] = s[k];   // the up kernel sums the splits
         }
     }
 }
@@ -407,8 +424,16 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
     const int T = m.T;
     const int d0 = item_ct1.get_group(2) * UPM_COLS;
 #pragma unroll
-    for (int i = t; i < T * LR; i += THREADS)
-        lo[i / LR][i % LR] = m.a[i / LR].lo[i % LR];
+    for (int i = t; i < T * LR; i += THREADS) {   // the down kernel's partial sums, in split order, then silu
+        const int k = i / LR, r = i % LR;
+        float x = 0.0f;
+#pragma unroll
+        for (int sp = 0; sp < DOWN_SPLIT; ++sp) x += m.part[((size_t) sp * kFusedGrMaxT + k) * LR + r];
+        x /= (float) HC;
+        const float v = x / (1.0f + sycl::native::exp(-x));
+        lo[k][r] = v;
+        m.a[k].lo[r] = v;
+    }
     /*
     DPCT1065: Consider replacing sycl::nd_item::barrier() with
     sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
@@ -478,6 +503,19 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
 
 }  // namespace
 
+// one partials buffer per queue (the verifier's and the drafter's launches never share a queue; within a queue the
+// launches are ordered, and a graph capture records the pointer)
+static float* down_partials(sycl::queue* q) {
+    static std::mutex mu;
+    static std::unordered_map<sycl::queue*, float*> bufs;
+    std::lock_guard<std::mutex> lk(mu);
+    auto it = bufs.find(q);
+    if (it != bufs.end()) return it->second;
+    float* p = sycl::malloc_device<float>((size_t) DOWN_SPLIT * kFusedGrMaxT * LR, *q);
+    bufs[q] = p;
+    return p;
+}
+
 void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, void* stream, unsigned long long* stamp_buf,
                          int stamp_i0) {
     if (n_tok < 1 || n_tok > kFusedGrMaxT || xn_scratch == nullptr) {
@@ -498,6 +536,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
     m.xn = xn_scratch;
     m.T = n_tok;
     dpct::queue_ptr st = strata::q_of(stream);
+    m.part = down_partials(st);
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -564,7 +603,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
 
             cgh.parallel_for<
                 dpct_kernel_name<class gr_down_multi_kernel_7f5820>>(
-                sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) *
                                       sycl::range(1, 1, THREADS),
                                   sycl::range(1, 1, THREADS)),
                 exp_props,
@@ -583,6 +622,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
             c.xn = xn_scratch + (size_t) c0 * D;
             c.T = ct;
             for (int k = 0; k < ct; ++k) c.a[k] = a[c0 + k];
+            c.part = m.part;
             {
                 auto exp_props = sycl::ext::oneapi::experimental::properties{
                     sycl::ext::oneapi::experimental::use_root_sync};
@@ -598,7 +638,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
 
                     cgh.parallel_for<
                         dpct_kernel_name<class gr_down_multi_kernel_88cb86>>(
-                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) *
                                               sycl::range(1, 1, THREADS),
                                           sycl::range(1, 1, THREADS)),
                         exp_props,
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 5a30fe7bdd9..a58d483a6de 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -15,6 +15,9 @@
 #define GGML_COMMON_IMPL_SYCL
 #include "ggml-common.h"
 
+#include <sycl/ext/oneapi/matrix/matrix.hpp>
+#include <algorithm>
+#include <type_traits>
 #include <cstdio>
 #include <cstdlib>
 
@@ -95,6 +98,29 @@ __dpct_inline__ float vec_dot_q2_0_q8_1(const void *__restrict__ vbq,
     return d2 * d8 * sumi;
 }
 
+// SYCL port: ggml's __vcmpne4 / __vsub4 came out of dpct as per-byte loops (extract, compare, insert, x4); on Xe the
+// expert dot kernels were ALU-bound with them (77% XVE active, metrics 2026-09-30). SWAR forms of the two uses:
+//   swar_ne4(x): 0xFF in every byte of x that is non-zero (the sign masks: at most one bit per byte)
+//   swar_sub4(a, s) with s from swar_ne4: per byte a - s, i.e. a + 1 where the sign byte is set (two's complement
+//   of the grid value after the xor: the same bits as __vsub4(a, s) for s in {0x00, 0xFF})
+#ifndef STRATA_SWAR
+#define STRATA_SWAR 1   // 1: the SWAR forms; 0: dpct's per-byte loops (A/B 2026-09-30: both correct)
+#endif
+#if STRATA_SWAR
+__dpct_inline__ int swar_ne4(unsigned x) {
+    x = (x | (x >> 4)) & 0x0F0F0F0Fu;
+    x = (x | (x >> 2)) & 0x03030303u;
+    x = (x | (x >> 1)) & 0x01010101u;
+    return (int) (x * 0xFFu);
+}
+__dpct_inline__ int swar_sub4(unsigned a, unsigned s) {
+    return (int) (((a & 0x7F7F7F7Fu) + (s & 0x01010101u)) ^ (a & 0x80808080u));
+}
+#else
+__dpct_inline__ int swar_ne4(unsigned x) { return dpct::vectorized_binary<sycl::uchar4>(x, 0, std::not_equal_to<>()); }
+__dpct_inline__ int swar_sub4(unsigned a, unsigned s) { return dpct::vectorized_binary<sycl::uchar4>(a, s, std::minus<>()); }
+#endif
+
 __dpct_inline__ float vec_dot_iq2_xxs_q8_1(const void *__restrict__ vbq,
                                            const block_q8_1 *__restrict__ bq8_1,
                                            const int &kbx, const int &iqs) {
@@ -108,16 +134,12 @@ __dpct_inline__ float vec_dot_iq2_xxs_q8_1(const void *__restrict__ vbq,
         const sycl::uint2 grid_pos =
             ((const sycl::uint2 *)iq2xxs_grid)[aux8[k0 / 2]];
         const uint32_t signs = unpack_ksigns(aux32 >> (7 * k0 / 2));
-        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x08040201, 0, std::not_equal_to<>());
-        const int grid0 = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int signs0 = swar_ne4(signs & 0x08040201);
+        const int grid0 = swar_sub4(grid_pos.x() ^ signs0, signs0);
         const int u0 = get_int_b4(bq8_1[iqs / 2].qs, k0 + 0);
         sumi = ggml_cuda_dp4a(grid0, u0, sumi);
-        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x80402010, 0, std::not_equal_to<>());
-        const int grid1 = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int signs1 = swar_ne4(signs & 0x80402010);
+        const int grid1 = swar_sub4(grid_pos.y() ^ signs1, signs1);
         const int u1 = get_int_b4(bq8_1[iqs / 2].qs, k0 + 1);
         sumi = ggml_cuda_dp4a(grid1, u1, sumi);
     }
@@ -144,15 +166,11 @@ __dpct_inline__ float vec_dot_iq2_xs_q8_1(const void *__restrict__ vbq,
         const sycl::uint2 grid_pos =
             ((const sycl::uint2 *)iq2xs_grid)[q2[l0 / 2] & 0x1FF];
         const uint32_t signs = unpack_ksigns(q2[l0 / 2] >> 9);
-        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x08040201, 0, std::not_equal_to<>());
-        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int signs0 = swar_ne4(signs & 0x08040201);
+        const int grid_l = swar_sub4(grid_pos.x() ^ signs0, signs0);
         const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
-        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x80402010, 0, std::not_equal_to<>());
-        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int signs1 = swar_ne4(signs & 0x80402010);
+        const int grid_h = swar_sub4(grid_pos.y() ^ signs1, signs1);
         const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
         if (l0 < 4) {
             sumi0 = ggml_cuda_dp4a(grid_l, u0, sumi0);
@@ -184,18 +202,12 @@ __dpct_inline__ float vec_dot_iq2_s_q8_1(const void *__restrict__ vbq,
 #pragma unroll
     for (int l0 = 0; l0 < 8; l0 += 2) {
         const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
-        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
-            ((signs_packed_8[l0 / 2] & 0x03) << 7) |
-                ((signs_packed_8[l0 / 2] & 0x0C) << 21),
-            0x00000000, std::not_equal_to<>());
-        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
-            ((signs_packed_8[l0 / 2] & 0x30) << 3) |
-                ((signs_packed_8[l0 / 2] & 0xC0) << 17),
-            0x00000000, std::not_equal_to<>());
-        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos[0] ^ signs0, signs0, std::minus<>());
-        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos[1] ^ signs1, signs1, std::minus<>());
+        const int signs0 = swar_ne4(((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                ((signs_packed_8[l0 / 2] & 0x0C) << 21));
+        const int signs1 = swar_ne4(((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                ((signs_packed_8[l0 / 2] & 0xC0) << 17));
+        const int grid_l = swar_sub4(grid_pos[0] ^ signs0, signs0);
+        const int grid_h = swar_sub4(grid_pos[1] ^ signs1, signs1);
         const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
         const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
         if (l0 < 4) {
@@ -227,15 +239,11 @@ __dpct_inline__ float vec_dot_iq3_xxs_q8_1(const void *__restrict__ vbq,
         const sycl::int2 grid_pos =
             sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
         const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
-        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x08040201, 0, std::not_equal_to<>());
-        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.x() ^ signs0, signs0, std::minus<>());
+        const int signs0 = swar_ne4(signs & 0x08040201);
+        const int grid_l = swar_sub4(grid_pos.x() ^ signs0, signs0);
         const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
-        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
-            signs & 0x80402010, 0, std::not_equal_to<>());
-        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int signs1 = swar_ne4(signs & 0x80402010);
+        const int grid_h = swar_sub4(grid_pos.y() ^ signs1, signs1);
         const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
         sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
         sumi = ggml_cuda_dp4a(grid_h, u1, sumi);
@@ -264,18 +272,12 @@ __dpct_inline__ float vec_dot_iq3_s_q8_1(const void *__restrict__ vbq,
         const sycl::int2 grid_pos =
             sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
                        iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
-        const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
-            ((signs_packed_8[l0 / 2] & 0x03) << 7) |
-                ((signs_packed_8[l0 / 2] & 0x0C) << 21),
-            0x00000000, std::not_equal_to<>());
-        const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
-            ((signs_packed_8[l0 / 2] & 0x30) << 3) |
-                ((signs_packed_8[l0 / 2] & 0xC0) << 17),
-            0x00000000, std::not_equal_to<>());
-        const int grid_l = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.x() ^ signs0, signs0, std::minus<>());
-        const int grid_h = dpct::vectorized_binary<sycl::uchar4>(
-            grid_pos.y() ^ signs1, signs1, std::minus<>());
+        const int signs0 = swar_ne4(((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                ((signs_packed_8[l0 / 2] & 0x0C) << 21));
+        const int signs1 = swar_ne4(((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                ((signs_packed_8[l0 / 2] & 0xC0) << 17));
+        const int grid_l = swar_sub4(grid_pos.x() ^ signs0, signs0);
+        const int grid_h = swar_sub4(grid_pos.y() ^ signs1, signs1);
         const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
         const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
         sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
@@ -370,7 +372,8 @@ __dpct_inline__ float vec_dot_iq4_xs_q8_1(const void *__restrict__ vbq,
 
 // ---------------------------------------------------------------- the formats
 // qk = values per block, ipb = dot calls per block (qi / vdr), step = the iqs stride between calls.
-template<int TY> struct Fmt;
+template<int TY> 
+struct Fmt;
 template<> struct Fmt<16> { static constexpr int qk = 256, ipb = 8, step = 2;
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq2_xxs_q8_1(v, y, kbx, iqs); } };
 template<> struct Fmt<17> { static constexpr int qk = 256, ipb = 8, step = 2;
@@ -489,10 +492,10 @@ template <> struct Multi<18> {   // iq3_xxs
         for (int l0 = 0; l0 < 8; l0 += 2) {
             const sycl::int2 grid_pos = sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
             const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
-            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(signs & 0x08040201, 0, std::not_equal_to<>());
-            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(signs & 0x80402010, 0, std::not_equal_to<>());
-            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.x() ^ signs0, signs0, std::minus<>());
-            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.y() ^ signs1, signs1, std::minus<>());
+            const int signs0 = swar_ne4(signs & 0x08040201);
+            const int signs1 = swar_ne4(signs & 0x80402010);
+            m.w[l0 + 0] = swar_sub4(grid_pos.x() ^ signs0, signs0);
+            m.w[l0 + 1] = swar_sub4(grid_pos.y() ^ signs1, signs1);
         }
         m.a = (int) (aux32 >> 28);
         m.d = sycl::vec<sycl::half, 1>(bq3->d).convert<float, sycl::rounding_mode::automatic>()[0];
@@ -520,10 +523,10 @@ template <> struct Multi<22> {   // iq2_s
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
             const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
-            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21), 0, std::not_equal_to<>());
-            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17), 0, std::not_equal_to<>());
-            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos[0] ^ signs0, signs0, std::minus<>());
-            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos[1] ^ signs1, signs1, std::minus<>());
+            const int signs0 = swar_ne4(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21));
+            const int signs1 = swar_ne4(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17));
+            m.w[l0 + 0] = swar_sub4(grid_pos[0] ^ signs0, signs0);
+            m.w[l0 + 1] = swar_sub4(grid_pos[1] ^ signs1, signs1);
         }
         m.a = bq2->scales[iqs / 2] & 0x0F;
         m.b = bq2->scales[iqs / 2] >> 4;
@@ -552,10 +555,10 @@ template <> struct Multi<21> {   // iq3_s
         for (int l0 = 0; l0 < 8; l0 += 2) {
             const sycl::int2 grid_pos = sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
                                                    iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
-            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21), 0, std::not_equal_to<>());
-            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17), 0, std::not_equal_to<>());
-            m.w[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.x() ^ signs0, signs0, std::minus<>());
-            m.w[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(grid_pos.y() ^ signs1, signs1, std::minus<>());
+            const int signs0 = swar_ne4(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21));
+            const int signs1 = swar_ne4(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17));
+            m.w[l0 + 0] = swar_sub4(grid_pos.x() ^ signs0, signs0);
+            m.w[l0 + 1] = swar_sub4(grid_pos.y() ^ signs1, signs1);
         }
         m.a = 1 + 2 * ((bq3->scales[iqs / 4] >> ((iqs << 1) & 0x04)) & 0x0F);
         m.d = sycl::vec<sycl::half, 1>(bq3->d).convert<float, sycl::rounding_mode::automatic>()[0];
@@ -802,6 +805,21 @@ __dpct_inline__ sycl::half cvt<sycl::half>(float v) {
         .convert<sycl::half, sycl::rounding_mode::automatic>()[0];
 }
 
+// SYCL port: the dequant functions below wrote one 2-byte value at a time (dq_* = llama.cpp's per-thread loops); on Xe
+// the FP16 expert dequant ran at ~80 GB/s of writes, 40% of the prompt path. Each thread's run of values goes out as one
+// vector store instead (the offsets are multiples of the run length, so the stores are aligned).
+template <typename dst_t, int N>
+__dpct_inline__ void store_run(dst_t* y, const float* v) {
+    if constexpr (std::is_same_v<dst_t, sycl::half> && (N == 4 || N == 8)) {
+        sycl::vec<sycl::half, N> h;
+#pragma unroll
+        for (int j = 0; j < N; ++j) h[j] = sycl::half(v[j]);
+        *reinterpret_cast<sycl::vec<sycl::half, N>*>(y) = h;
+    } else {
+#pragma unroll
+        for (int j = 0; j < N; ++j) y[j] = cvt<dst_t>(v[j]);
+    }
+}
 template <typename dst_t>
 inline void dq_iq2_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const block_iq2_xxs* x = (const block_iq2_xxs*) vx;
@@ -813,9 +831,10 @@ inline void dq_iq2_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const uint32_t aux32 = q2[2] | (q2[3] << 16);
     const float d = (float) x[ibs].d * (0.5f + (aux32 >> 28)) * 0.25f;
     const uint8_t signs = ksigns_iq2xs[(aux32 >> 7 * il) & 127];
+    float v[8];
 #pragma unroll
-    for (int j = 0; j < 8; ++j)
-        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+    for (int j = 0; j < 8; ++j) v[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
+    store_run<dst_t, 8>(y, v);
 }
 template <typename dst_t>
 inline void dq_iq2_xs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -826,9 +845,10 @@ inline void dq_iq2_xs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const uint8_t* grid = (const uint8_t*) (iq2xs_grid + (q2[il] & 511));
     const float d = (float) x[ibs].d * (0.5f + ((x[ibs].scales[ib] >> 4 * (il / 2)) & 0xf)) * 0.25f;
     const uint8_t signs = ksigns_iq2xs[q2[il] >> 9];
+    float v[8];
 #pragma unroll
-    for (int j = 0; j < 8; ++j)
-        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+    for (int j = 0; j < 8; ++j) v[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
+    store_run<dst_t, 8>(y, v);
 }
 template <typename dst_t>
 inline void dq_iq2_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -838,9 +858,10 @@ inline void dq_iq2_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const uint8_t* grid = (const uint8_t*) (iq2s_grid + (x[ibs].qs[4 * ib + il] | ((x[ibs].qh[ib] << (8 - 2 * il)) & 0x300)));
     const float d = (float) x[ibs].d * (0.5f + ((x[ibs].scales[ib] >> 4 * (il / 2)) & 0xf)) * 0.25f;
     const uint8_t signs = x[ibs].qs[QK_K / 8 + 4 * ib + il];
+    float v[8];
 #pragma unroll
-    for (int j = 0; j < 8; ++j)
-        y[j] = cvt<dst_t>(d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f));
+    for (int j = 0; j < 8; ++j) v[j] = d * grid[j] * (signs & kmask_iq2xs[j] ? -1.f : 1.f);
+    store_run<dst_t, 8>(y, v);
 }
 template <typename dst_t>
 inline void dq_iq3_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -854,11 +875,13 @@ inline void dq_iq3_xxs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const uint32_t aux32 = gas[0] | (gas[1] << 16);
     const float d = (float) x[ibs].d * (0.5f + (aux32 >> 28)) * 0.5f;
     const uint8_t signs = ksigns_iq2xs[(aux32 >> 7 * il) & 127];
+    float v[8];
 #pragma unroll
     for (int j = 0; j < 4; ++j) {
-        y[j + 0] = cvt<dst_t>(d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f));
-        y[j + 4] = cvt<dst_t>(d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f));
+        v[j + 0] = d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f);
+        v[j + 4] = d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f);
     }
+    store_run<dst_t, 8>(y, v);
 }
 template <typename dst_t>
 inline void dq_iq3_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -870,11 +893,13 @@ inline void dq_iq3_s(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const uint8_t* grid2 = (const uint8_t*) (iq3s_grid + (qs[2 * il + 1] | ((x[ibs].qh[ib] << (7 - 2 * il)) & 256)));
     const float d = (float) x[ibs].d * (1 + 2 * ((x[ibs].scales[ib / 2] >> 4 * (ib % 2)) & 0xf));
     const uint8_t signs = x[ibs].signs[4 * ib + il];
+    float v[8];
 #pragma unroll
     for (int j = 0; j < 4; ++j) {
-        y[j + 0] = cvt<dst_t>(d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f));
-        y[j + 4] = cvt<dst_t>(d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f));
+        v[j + 0] = d * grid1[j] * (signs & kmask_iq2xs[j + 0] ? -1.f : 1.f);
+        v[j + 4] = d * grid2[j] * (signs & kmask_iq2xs[j + 4] ? -1.f : 1.f);
     }
+    store_run<dst_t, 8>(y, v);
 }
 template <typename dst_t>
 inline void dq_iq1_m(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -902,11 +927,14 @@ inline void dq_iq4_nl(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     dst_t* y = yy + 32 * ib + 4 * il;
     const uint8_t* q4 = x[ib].qs + 4 * il;
     const float d = (float) x[ib].d;
+    float lo[4], hi[4];
 #pragma unroll
     for (int j = 0; j < 4; ++j) {
-        y[j + 0] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] & 0xf]);
-        y[j + 16] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] >> 4]);
+        lo[j] = d * kvalues_iq4nl[q4[j] & 0xf];
+        hi[j] = d * kvalues_iq4nl[q4[j] >> 4];
     }
+    store_run<dst_t, 4>(y, lo);
+    store_run<dst_t, 4>(y + 16, hi);
 }
 // Q3_K (the Q2_0 file's token_embd): llama.cpp's dequantize_block_q3_K, its 64 threads folded onto 32
 template <typename dst_t>
@@ -939,11 +967,14 @@ inline void dq_iq4_xs(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     dst_t* y = yy + 32 * ib + 4 * il;
     const uint8_t* q4 = x->qs + 16 * ib + 4 * il;
     const float d = (float) x->d * ((((x->scales_l[ib / 2] >> 4 * (ib % 2)) & 0xf) | (((x->scales_h >> 2 * ib) & 3) << 4)) - 32);
+    float lo[4], hi[4];
 #pragma unroll
     for (int j = 0; j < 4; ++j) {
-        y[j + 0] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] & 0xf]);
-        y[j + 16] = cvt<dst_t>(d * kvalues_iq4nl[q4[j] >> 4]);
+        lo[j] = d * kvalues_iq4nl[q4[j] & 0xf];
+        hi[j] = d * kvalues_iq4nl[q4[j] >> 4];
     }
+    store_run<dst_t, 4>(y, lo);
+    store_run<dst_t, 4>(y + 16, hi);
 }
 template <typename dst_t>
 inline void dq_q2_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
@@ -951,11 +982,14 @@ inline void dq_q2_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const block_q2_0* x = (const block_q2_0*) vx + ibs * 4;
     const int b = tid / 8, part = tid % 8;          // block 0..3, 8 values each
     const float d = (float) x[b].d;
+    float v[8];
+#pragma unroll
     for (int j = 0; j < 8; ++j) {
         const int i = part * 8 + j;
         const int code = (x[b].qs[i / 4] >> ((i % 4) * 2)) & 3;
-        yy[b * 64 + i] = cvt<dst_t>(d * (float) (code - 1));
+        v[j] = d * (float) (code - 1);
     }
+    store_run<dst_t, 8>(yy + b * 64 + part * 8, v);
 }
 
 template <typename dst_t>
@@ -1649,4 +1683,160 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     check("native_expert_grouped/down");
 }
 
+
+// ================================================================ SYCL port: XMX GEMM straight from the quantized rows
+//
+// The prompt path dequantizes every routed expert to FP16 (8 MB written, then read back by oneMKL) before its GEMMs:
+// 39-41% of the prompt time on the B70 (2026-09-30), the GEMMs themselves another 16%. This kernel dequantizes a
+// 16-feature strip of the weight matrix into local memory, packs it for the XMX B operand and multiplies it against
+// every activation row with joint_matrix (16x16x16, FP16 in, FP32 out; sub-group 16 as XMX wants). The FP16 weights
+// never touch global memory.
+//
+//   Y[M][n_out] = X[M][K] . W[n_out][K]^T      X FP16 row-major (lda K), Y FP32 (ldy), W quantized rows (a ggml IQ type)
+//
+// Gate/up: `up != nullptr`, virtual row 2r = gate row r, 2r+1 = up row r (the order iq_dequant_gu_f16 produces, which
+// swiglu_interleaved expects). K must be a multiple of 256 (a QK_K block per slab) or the whole row must fit a slab
+// (K = 640: 16 rows are 40 blocks, block-aligned since 16 * 640 / 256 = 40).
+namespace xmx {
+namespace jm = sycl::ext::oneapi::experimental::matrix;
+constexpr int SG = 16;                 // XMX sub-group size
+constexpr int NSG = 8;                 // sub-groups per work-group
+constexpr int WG = SG * NSG;
+constexpr int NT = 16;                 // features per work-group: one B tile
+constexpr int MAXT = 4;                // C tiles per sub-group -> 512 rows per chunk
+constexpr int APAD = 8;                // halves of padding on the staged A tile rows
+struct Src { const uint8_t* gate; const uint8_t* up; int ty; int64_t per_row; };
+struct Smem { sycl::half* stage; sycl::half* packed; sycl::half* atile; float* ctile; };
+
+// the block index (x[ibs] in dq_dispatch) of virtual row v's k-range [k0, k0 + 256) - rows are per_row blocks long
+__dpct_inline__ const void* block_of(const Src& s, int v, int cblk, int64_t& ibs) {
+    if (s.up != nullptr) { ibs = (int64_t) (v >> 1) * s.per_row + cblk; return (v & 1) ? s.up : s.gate; }
+    ibs = (int64_t) v * s.per_row + cblk;
+    return s.gate;
+}
+
+// one work-group: features [f0, f0 + 16) of the weight matrix against all M rows; slab_k halves of K per pass
+void gemm_kernel(Src src, const sycl::half* X, int K, int slab_k, float* Y, int64_t ldy, int M, int n_out, Smem sm) {
+    auto it = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto sg = it.get_sub_group();
+    const int sgid = (int) sg.get_group_id()[0], lane = (int) sg.get_local_id()[0], t = (int) it.get_local_id(2);
+    const int f0 = (int) it.get_group(2) * NT;
+    const int per_slab = slab_k / 256;                    // blocks of one row per slab (K % 256 == 0), or
+    const int whole = (slab_k == K) ? 1 : 0;              // the whole 16-row strip as NT * K / 256 flat blocks
+    const int nblk = whole ? NT * K / 256 : NT * per_slab;
+    auto gptr = [](auto* p) { return sycl::address_space_cast<sycl::access::address_space::global_space, sycl::access::decorated::no>(p); };
+    auto lptr = [](auto* p) { return sycl::address_space_cast<sycl::access::address_space::local_space, sycl::access::decorated::no>(p); };
+    sycl::half* atile = sm.atile + (size_t) sgid * 16 * (16 + APAD);
+    float* ctile = sm.ctile + (size_t) sgid * 256;
+    for (int m_base = 0; m_base < M; m_base += MAXT * NSG * 16) {
+        jm::joint_matrix<sycl::sub_group, float, jm::use::accumulator, 16, 16> C[MAXT];
+#pragma unroll
+        for (int k = 0; k < MAXT; ++k) jm::joint_matrix_fill(sg, C[k], 0.0f);
+        const int tiles = std::min((M - m_base + 15) / 16, MAXT * NSG);
+        for (int k0 = 0; k0 < K; k0 += slab_k) {
+            it.barrier(sycl::access::fence_space::local_space);
+            // dequantize the strip's blocks of this slab into stage[NT][slab_k] (flat, row-major): 32 "threads" per
+            // block in dq_dispatch's terms, two calls per lane
+            for (int b = sgid; b < nblk; b += NSG) {
+                int v, kk;
+                if (whole) { v = (b * 256) / K; kk = (b * 256) % K; }
+                else { v = b / per_slab; kk = (b % per_slab) * 256; }
+                sycl::half* dst = sm.stage + (size_t) v * slab_k + kk;
+                const int row = f0 + v;
+                if (row < n_out) {
+                    int64_t ibs;
+                    const void* blk = src.gate;
+                    if (whole) ibs = ((int64_t) f0 * K) / 256 + b;   // flat blocks of the [n_out][K] matrix
+                    else blk = block_of(src, row, k0 / 256 + b % per_slab, ibs);
+                    dq_dispatch<sycl::half>(src.ty, blk, ibs, dst, lane);
+                    dq_dispatch<sycl::half>(src.ty, blk, ibs, dst, lane + 16);
+                } else {
+                    for (int i = lane; i < 256; i += SG) dst[i] = sycl::half(0.0f);
+                }
+            }
+            it.barrier(sycl::access::fence_space::local_space);
+            // pack for the XMX B operand: element (k, n) at packed[(k / 2) * (NT * 2) + n * 2 + (k & 1)]
+            for (int i = t; i < NT * slab_k; i += WG) {
+                const int n = i / slab_k, k = i - n * slab_k;
+                sm.packed[(k >> 1) * (NT * 2) + n * 2 + (k & 1)] = sm.stage[i];
+            }
+            it.barrier(sycl::access::fence_space::local_space);
+            for (int ks = 0; ks < slab_k; ks += 16) {
+                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
+                jm::joint_matrix_load(sg, B, lptr(sm.packed + (ks >> 1) * (NT * 2)), NT * 2);
+#pragma unroll
+                for (int tt = 0; tt < MAXT; ++tt) {
+                    const int tile = sgid + tt * NSG;
+                    if (tile >= tiles) break;
+                    const int m0 = m_base + tile * 16;
+                    jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> A;
+                    if (m0 + 16 <= M) {
+                        jm::joint_matrix_load(sg, A, gptr(X + (size_t) m0 * K + k0 + ks), (size_t) K);
+                    } else {   // the tail tile: valid rows staged, the rest zero
+                        for (int i = lane; i < 16 * 16; i += SG) {
+                            const int r = i >> 4, c = i & 15;
+                            atile[r * (16 + APAD) + c] = (m0 + r < M) ? X[(size_t) (m0 + r) * K + k0 + ks + c] : sycl::half(0.0f);
+                        }
+                        sycl::group_barrier(sg);
+                        jm::joint_matrix_load(sg, A, lptr(atile), (size_t) (16 + APAD));
+                        sycl::group_barrier(sg);
+                    }
+                    jm::joint_matrix_mad(sg, C[tt], A, B, C[tt]);
+                }
+            }
+        }
+        // the chunk's results
+#pragma unroll
+        for (int tt = 0; tt < MAXT; ++tt) {
+            const int tile = sgid + tt * NSG;
+            if (tile >= tiles) break;
+            const int m0 = m_base + tile * 16;
+            if (m0 + 16 <= M && f0 + NT <= n_out) {
+                jm::joint_matrix_store(sg, C[tt], gptr(Y + (size_t) m0 * ldy + f0), (size_t) ldy, jm::layout::row_major);
+            } else {
+                jm::joint_matrix_store(sg, C[tt], lptr(ctile), (size_t) 16, jm::layout::row_major);
+                sycl::group_barrier(sg);
+                for (int i = lane; i < 256; i += SG) {
+                    const int r = i >> 4, c = i & 15;
+                    if (m0 + r < M && f0 + c < n_out) Y[(size_t) (m0 + r) * ldy + f0 + c] = ctile[i];
+                }
+                sycl::group_barrier(sg);
+            }
+        }
+    }
+}
+}  // namespace xmx
+
+bool xmx_gemm_iq(int ty, const void* gate, const void* up, int64_t K, int n_out, const uint16_t* X, int M, float* Y,
+                 int64_t ldy, void* stream) {
+    if (!is_iq(ty) || ty == 16 || ty == 17 || ty == 29 || ty == 23 || ty == 11) return false;   // dq_dispatch covers these; the rest untested here
+    if (M <= 0 || n_out <= 0 || n_out % xmx::NT != 0 || K <= 0) return false;
+    const bool by_block = (K % 256) == 0;
+    const bool whole = !by_block && ((int64_t) xmx::NT * K) % 256 == 0 && K % 16 == 0;
+    if (!by_block && !whole) return false;
+    const int slab_k = by_block ? 256 : (int) K;
+    if (up != nullptr && !by_block) return false;   // gate/up rows are per_row blocks each
+    const size_t stage_halves = (size_t) xmx::NT * slab_k;
+    const size_t bytes = stage_halves * 2 /*stage*/ + stage_halves * 2 /*packed*/ + (size_t) xmx::NSG * 16 * (16 + xmx::APAD) * 2 +
+                         (size_t) xmx::NSG * 256 * 4;
+    if (bytes > 96 * 1024) return false;
+    dpct::queue_ptr q = strata::q_of(stream);
+    xmx::Src src{(const uint8_t*) gate, (const uint8_t*) up, ty, by_block ? K / 256 : 0};
+    const int groups = n_out / xmx::NT;
+    q->submit([&](sycl::handler& cgh) {
+        sycl::local_accessor<uint8_t, 1> slm(sycl::range<1>(bytes), cgh);
+        cgh.parallel_for(
+            sycl::nd_range<3>(sycl::range<3>(1, 1, (size_t) groups * xmx::WG), sycl::range<3>(1, 1, xmx::WG)),
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] {
+                uint8_t* base = slm.get_multi_ptr<sycl::access::decorated::no>().get();
+                xmx::Smem sm;
+                sm.stage = (sycl::half*) base;
+                sm.packed = sm.stage + stage_halves;
+                sm.atile = sm.packed + stage_halves;
+                sm.ctile = (float*) (sm.atile + (size_t) xmx::NSG * 16 * (16 + xmx::APAD));
+                xmx::gemm_kernel(src, (const sycl::half*) X, (int) K, slab_k, Y, ldy, M, n_out, sm);
+            });
+    });
+    return true;
+}
 }  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index 1f38376b0ba..dd9d198523a 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -4,6 +4,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/qsa_prompt_attn.hpp"
+#include "strata/kernels/qsa_prompt_attn_xmx.hpp"
 #include "strata/kernels/kv_q8.hpp"
 #include "strata/kernels/kv_q4.hpp"
 
@@ -1186,7 +1187,9 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
             cc_major[dev] = major;
         }
         (void) cc_major[dev];
-        return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
+        // SYCL: the mma.sync kernel below is not ported; its XMX port takes the same arguments
+        if (qsa_prompt_attn_xmx(q, pools, ids, steps, cap, s, attn, n_q, stream)) return true;
+        return false;   // the caller takes the older kernel
     }
 #if defined(__HIPCC__)
     return false;   // the tensor-core kernel is compiled out on AMD (its major version is not a CUDA sm)
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
new file mode 100644
index 00000000000..9d3aa4dfb61
--- /dev/null
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
@@ -0,0 +1,357 @@
+// SYCL port: the prompt attention on XMX (joint_matrix) - the port of qsa_prompt_attn.cu's tensor-core kernel.
+//
+// One work-group per (query position, KV head): 16 query rows (the 12 heads of the group, 4 zero rows) against the
+// position's selected cells, 16 cells per chunk. Scores S = Q K^T and the update O += P V run on joint_matrix
+// (FP16 x FP16 -> FP32, 16x16x16, sub-group 16); Q and P are split into hi + lo FP16 halves exactly as the CUDA kernel
+// does, and the per-64-dim INT8 scales of K and V are applied outside the matrix products the same way (K's after the
+// group's product, V's folded into P). The online softmax and the accumulator merge are scalar over local memory.
+// KV modes: 0 FP16 K/V, 1 INT8 K/V with scales, 3 INT8 K + q4_0 V dequantized to FP16.
+#include "strata/kernels/qsa_prompt_attn_xmx.hpp"
+#include "strata/kernels/qsa_decode_attn.hpp"
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/kv_q8.hpp"
+#include "strata/sycl_queue.hpp"
+#include <sycl/sycl.hpp>
+#include <sycl/ext/oneapi/matrix/matrix.hpp>
+#include <dpct/dpct.hpp>
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+
+namespace strata::kernels {
+namespace {
+namespace jm = sycl::ext::oneapi::experimental::matrix;
+constexpr int HD = 256, G = 12, CH = 16, SG = 16, NSG = 8, THREADS = SG * NSG, QS = HD + 8, PS = CH + 8;
+constexpr int QK4_0 = 32;
+struct q4_0_block { uint16_t d; uint8_t qs[QK4_0 / 2]; };
+
+struct Smem {
+    sycl::half* qh;      // [16][QS]
+    sycl::half* ql;      // [16][QS]
+    sycl::half* kp;      // packed K^T: (k/2)*(CH*2) + c*2 + (k&1), k < HD, c < CH
+    sycl::half* vp;      // packed V:   (c/2)*(HD*2) + d*2 + (c&1)
+    sycl::half* pv;      // [4 groups][2 hi/lo][16][PS] P tiles
+    float* ks;           // [CH][4]
+    float* vs;           // [CH][4]
+    float* s;            // [16][PS] scores, then probabilities
+    float* acc;          // [16][HD]
+    float* tmp;          // [NSG][16][16]
+    float* misc;         // qmax[8], mrow[16], lsum[16], alpha[16], vup[4], vdown[4]
+    long long* row;      // [CH]
+};
+constexpr size_t kSmemBytes = (size_t) 2 * 16 * QS * 2 + (size_t) 2 * CH * HD * 2 + (size_t) 4 * 2 * 16 * PS * 2 +
+                              (size_t) 2 * CH * 4 * 4 + (size_t) 16 * PS * 4 + (size_t) 16 * HD * 4 + (size_t) NSG * 256 * 4 +
+                              (size_t) 72 * 4 + (size_t) CH * 8 + 64;
+
+__dpct_inline__ Smem carve(uint8_t* base) {
+    Smem m;
+    uint8_t* p = base;
+    auto take = [&](size_t bytes) { uint8_t* r = p; p += (bytes + 15) & ~(size_t) 15; return r; };
+    m.qh = (sycl::half*) take(16 * QS * 2);
+    m.ql = (sycl::half*) take(16 * QS * 2);
+    m.kp = (sycl::half*) take((size_t) CH * HD * 2);
+    m.vp = (sycl::half*) take((size_t) CH * HD * 2);
+    m.pv = (sycl::half*) take((size_t) 4 * 2 * 16 * PS * 2);
+    m.ks = (float*) take(CH * 4 * 4);
+    m.vs = (float*) take(CH * 4 * 4);
+    m.s = (float*) take(16 * PS * 4);
+    m.acc = (float*) take((size_t) 16 * HD * 4);
+    m.tmp = (float*) take((size_t) NSG * 256 * 4);
+    m.misc = (float*) take(72 * 4);
+    m.row = (long long*) take(CH * 8);
+    return m;
+}
+
+template <typename T>
+__dpct_inline__ auto lptr(T* p) {
+    return sycl::address_space_cast<sycl::access::address_space::local_space, sycl::access::decorated::no>(p);
+}
+
+__dpct_inline__ float sg_max(sycl::sub_group sg, float v) {
+    return sycl::reduce_over_group(sg, v, sycl::maximum<float>());
+}
+
+template <int KV_MODE>
+void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const int32_t* __restrict__ ids,
+                            const int32_t* __restrict__ steps, int n_kv_heads, int page_size, float scale_log2,
+                            float* __restrict__ attn, int cap, uint8_t* smem) {
+    auto it = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto sg = it.get_sub_group();
+    Smem S = carve(smem);
+    const int qi = (int) it.get_group(2), kvh = (int) it.get_group(1);
+    const int n_head = n_kv_heads * G;
+    q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    ids += (size_t) qi * cap;
+    const int n = steps[(size_t) qi * kStepCount + kStepWidth];
+    const int t = (int) it.get_local_id(2), lane = (int) sg.get_local_id()[0], sgid = (int) sg.get_group_id()[0];
+    float* qmax = S.misc;
+    float* mrow = S.misc + 8;
+    float* lsum = S.misc + 24;
+    float* alpha = S.misc + 40;
+    float* vup = S.misc + 56;
+    float* vdown = S.misc + 60;
+    // q: 12 heads + 4 zero rows, scaled so its largest value sits near 2^14 (exact), split into hi + lo halves
+    float qm = 0.0f;
+    for (int i = t; i < G * HD; i += THREADS) qm = sycl::fmax(qm, sycl::fabs(q[i]));
+    qm = sg_max(sg, qm);
+    if (lane == 0) qmax[sgid] = qm;
+    it.barrier(sycl::access::fence_space::local_space);
+    qm = 0.0f;
+    for (int i = 0; i < NSG; ++i) qm = sycl::fmax(qm, qmax[i]);
+    int qe = 0;   // frexp's exponent (qm < 2^qe) from the float's bits: normal numbers only, qm > 0 is
+    if (qm > 0.0f) qe = (int) ((sycl::bit_cast<uint32_t>(qm) >> 23) & 0xFFu) - 126;
+    const float qup = sycl::ldexp(1.0f, 14 - qe), qdown = sycl::ldexp(scale_log2, qe - 14);
+    for (int i = t; i < 16 * HD; i += THREADS) {
+        const int h = i / HD, d = i % HD;
+        const float x = h < G ? q[(size_t) h * HD + d] * qup : 0.0f;
+        const sycl::half hi = sycl::half(x);
+        S.qh[h * QS + d] = hi;
+        S.ql[h * QS + d] = sycl::half(x - (float) hi);
+    }
+    for (int i = t; i < 16 * HD; i += THREADS) S.acc[i] = 0.0f;
+    if (t < 16) { mrow[t] = -INFINITY; lsum[t] = 0.0f; }
+    // the K^T tile is the same for every chunk position: B(k, c) packed by k pairs
+    for (int c0 = 0; c0 < n; c0 += CH) {
+        const int nh = sycl::min(CH, n - c0);
+        it.barrier(sycl::access::fence_space::local_space);   // the previous chunk is done with kp, vp, s, tmp
+        if (t < CH) {
+            long long r = -1;
+            if (t < nh) {
+                const int cell = ids[c0 + t];
+                const long long page = (long long) p.page_table[cell / page_size];
+                r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+            }
+            S.row[t] = r;
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        // K rows -> packed K^T (raw INT8 codes as halves in modes 1 and 3; the scale comes after the product)
+        for (int i = t; i < CH * (HD / 8); i += THREADS) {
+            const int c = i / (HD / 8), piece = i % (HD / 8);
+            const long long r = S.row[c];
+            sycl::half h[8];
+            if (r < 0) {
+                for (int j = 0; j < 8; ++j) h[j] = sycl::half(0.0f);
+            } else if constexpr (KV_MODE == 0) {
+                const sycl::vec<uint16_t, 8> v = *reinterpret_cast<const sycl::vec<uint16_t, 8>*>(p.k_pool + r * HD + piece * 8);
+                for (int j = 0; j < 8; ++j) h[j] = sycl::bit_cast<sycl::half>(v[j]);
+            } else {
+                const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.k_q + r * HD + piece * 8);
+                for (int j = 0; j < 8; ++j) h[j] = sycl::half((float) v[j]);
+            }
+            for (int j = 0; j < 8; j += 2) {
+                const int k = piece * 8 + j;
+                sycl::half2* dst = reinterpret_cast<sycl::half2*>(S.kp + (k >> 1) * (CH * 2) + c * 2);
+                *dst = sycl::half2(h[j], h[j + 1]);
+            }
+        }
+        // V rows -> packed V (pairs of cells)
+        if constexpr (KV_MODE == 3) {
+            constexpr int BLKS = HD / QK4_0;
+            constexpr int BYTES = BLKS * (int) sizeof(q4_0_block);
+            for (int i = t; i < CH * BLKS; i += THREADS) {
+                const int c = i / BLKS, b = i % BLKS;
+                const long long r = S.row[c];
+                float d = 0.0f;
+                const q4_0_block* blk = nullptr;
+                if (r >= 0) {
+                    blk = reinterpret_cast<const q4_0_block*>(p.v_q4 + r * BYTES) + b;
+                    d = (float) sycl::bit_cast<sycl::half>(blk->d);
+                }
+                for (int j = 0; j < QK4_0 / 2; ++j) {
+                    const float lo = blk ? (float) ((int) (blk->qs[j] & 0x0F) - 8) * d : 0.0f;
+                    const float hi = blk ? (float) ((int) (blk->qs[j] >> 4) - 8) * d : 0.0f;
+                    const int d0 = b * QK4_0 + j, d1 = d0 + QK4_0 / 2;
+                    S.vp[(c >> 1) * (HD * 2) + d0 * 2 + (c & 1)] = sycl::half(lo);
+                    S.vp[(c >> 1) * (HD * 2) + d1 * 2 + (c & 1)] = sycl::half(hi);
+                }
+            }
+        } else {
+            for (int i = t; i < CH * (HD / 8); i += THREADS) {
+                const int c = i / (HD / 8), piece = i % (HD / 8);
+                const long long r = S.row[c];
+                sycl::half h[8];
+                if (r < 0) {
+                    for (int j = 0; j < 8; ++j) h[j] = sycl::half(0.0f);
+                } else if constexpr (KV_MODE == 1) {
+                    const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.v_q + r * HD + piece * 8);
+                    for (int j = 0; j < 8; ++j) h[j] = sycl::half((float) v[j]);
+                } else {
+                    const sycl::vec<uint16_t, 8> v = *reinterpret_cast<const sycl::vec<uint16_t, 8>*>(p.v_pool + r * HD + piece * 8);
+                    for (int j = 0; j < 8; ++j) h[j] = sycl::bit_cast<sycl::half>(v[j]);
+                }
+                for (int j = 0; j < 8; ++j) S.vp[(c >> 1) * (HD * 2) + (piece * 8 + j) * 2 + (c & 1)] = h[j];
+            }
+        }
+        for (int i = t; i < CH * 4; i += THREADS) {
+            const int c = i / 4, g = i % 4;
+            const long long r = S.row[c];
+            float a = 0.0f, b = 0.0f;
+            if (r >= 0) {
+                if constexpr (KV_MODE == 1) {
+                    a = (float) sycl::bit_cast<sycl::half>(p.k_scale[r * (HD / KV_Q8_GROUP) + g]);
+                    b = (float) sycl::bit_cast<sycl::half>(p.v_scale[r * (HD / KV_Q8_GROUP) + g]);
+                } else if constexpr (KV_MODE == 3) {
+                    a = (float) sycl::bit_cast<sycl::half>(p.k_scale[r * (HD / KV_Q8_GROUP) + g]);
+                    b = 1.0f;
+                } else {
+                    a = b = 1.0f;
+                }
+            }
+            S.ks[c * 4 + g] = a;
+            S.vs[c * 4 + g] = b;
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        // scores: sub-group sg takes dim group g = sg & 3 with the hi (sg < 4) or lo (sg >= 4) half of q
+        {
+            const int g = sgid & 3;
+            const sycl::half* qa = (sgid < 4 ? S.qh : S.ql);
+            jm::joint_matrix<sycl::sub_group, float, jm::use::accumulator, 16, 16> C;
+            jm::joint_matrix_fill(sg, C, 0.0f);
+            for (int kk = 0; kk < 4; ++kk) {
+                const int k0 = (g * 4 + kk) * 16;
+                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> A;
+                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
+                jm::joint_matrix_load(sg, A, lptr(qa + k0), (size_t) QS);
+                jm::joint_matrix_load(sg, B, lptr(S.kp + (k0 >> 1) * (CH * 2)), (size_t) (CH * 2));
+                jm::joint_matrix_mad(sg, C, A, B, C);
+            }
+            jm::joint_matrix_store(sg, C, lptr(S.tmp + sgid * 256), (size_t) 16, jm::layout::row_major);
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        for (int i = t; i < 16 * CH; i += THREADS) {
+            const int r = i / CH, c = i % CH;
+            float v = 0.0f;
+            for (int g = 0; g < 4; ++g) v += (S.tmp[g * 256 + r * 16 + c] + S.tmp[(g + 4) * 256 + r * 16 + c]) * S.ks[c * 4 + g];
+            S.s[r * PS + c] = c < nh ? v * qdown : -INFINITY;
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        // online softmax: row t/8, 2 cells per thread, 8 lanes per row (within one sub-group)
+        {
+            constexpr int PER = CH / 8;
+            const int r = t >> 3, sub = t & 7;
+            float x[PER], mx = -INFINITY;
+            for (int j = 0; j < PER; ++j) { x[j] = S.s[r * PS + sub * PER + j]; mx = sycl::fmax(mx, x[j]); }
+            for (int o = 1; o < 8; o <<= 1) mx = sycl::fmax(mx, sycl::permute_group_by_xor(sg, mx, o));
+            const float m_old = mrow[r];
+            const float m_new = sycl::fmax(m_old, mx);
+            float sum = 0.0f;
+            for (int j = 0; j < PER; ++j) {
+                const float e = x[j] == -INFINITY ? 0.0f : sycl::exp2(x[j] - m_new);
+                S.s[r * PS + sub * PER + j] = e;
+                sum += e;
+            }
+            for (int o = 1; o < 8; o <<= 1) sum += sycl::permute_group_by_xor(sg, sum, o);
+            if (sub == 0) {
+                const float a = m_old == -INFINITY ? 0.0f : sycl::exp2(m_old - m_new);
+                alpha[r] = a;
+                lsum[r] = sycl::fma(lsum[r], a, sum);
+                mrow[r] = m_new;
+            }
+        }
+        // the V scale per dim group, folded into P relative to the chunk's largest (times 2^14, as in CUDA)
+        if (t < 4) {
+            float vmax = 0.0f;
+            for (int c = 0; c < CH; ++c) vmax = sycl::fmax(vmax, S.vs[c * 4 + t]);
+            vup[t] = vmax > 0.0f ? 16384.0f / vmax : 0.0f;
+            vdown[t] = vmax * (1.0f / 16384.0f);
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        // P tiles: pv[g][hi/lo][r][c] = s[r][c] * vs[c][g] * vup[g], split into hi + lo halves
+        for (int i = t; i < 4 * 16 * CH; i += THREADS) {
+            const int g = i / (16 * CH), rc = i % (16 * CH), r = rc / CH, c = rc % CH;
+            const float pw = S.s[r * PS + c] * S.vs[c * 4 + g] * vup[g];
+            const sycl::half hi = sycl::half(pw);
+            S.pv[((g * 2 + 0) * 16 + r) * PS + c] = hi;
+            S.pv[((g * 2 + 1) * 16 + r) * PS + c] = sycl::half(pw - (float) hi);
+        }
+        it.barrier(sycl::access::fence_space::local_space);
+        // p.v: sub-group sg owns dims [32 sg, 32 sg + 32) = two B tiles of scale group sg / 2
+        {
+            const int g = sgid >> 1;
+            const sycl::half* ah = S.pv + ((g * 2 + 0) * 16) * PS;
+            const sycl::half* al = S.pv + ((g * 2 + 1) * 16) * PS;
+            jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> Ah, Al;
+            jm::joint_matrix_load(sg, Ah, lptr(ah), (size_t) PS);
+            jm::joint_matrix_load(sg, Al, lptr(al), (size_t) PS);
+            const float a_vdown = vdown[g];
+            for (int dt = 0; dt < 2; ++dt) {
+                const int d0 = sgid * 32 + dt * 16;
+                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
+                jm::joint_matrix_load(sg, B, lptr(S.vp + d0 * 2), (size_t) (HD * 2));
+                jm::joint_matrix<sycl::sub_group, float, jm::use::accumulator, 16, 16> C;
+                jm::joint_matrix_fill(sg, C, 0.0f);
+                jm::joint_matrix_mad(sg, C, Ah, B, C);
+                jm::joint_matrix_mad(sg, C, Al, B, C);
+                jm::joint_matrix_store(sg, C, lptr(S.tmp + sgid * 256), (size_t) 16, jm::layout::row_major);
+                sycl::group_barrier(sg);
+                for (int i = lane; i < 256; i += SG) {
+                    const int r = i >> 4, c = i & 15;
+                    float* a = S.acc + r * HD + d0 + c;
+                    *a = sycl::fma(*a, alpha[r], S.tmp[sgid * 256 + i] * a_vdown);
+                }
+                sycl::group_barrier(sg);
+            }
+        }
+    }
+    it.barrier(sycl::access::fence_space::local_space);
+    for (int i = t; i < G * HD; i += THREADS) {
+        const int h = i / HD, d = i % HD;
+        const float l = lsum[h];
+        attn[(size_t) h * HD + d] = l > 0.0f ? S.acc[h * HD + d] / l : 0.0f;
+    }
+}
+
+template <int KV_MODE>
+bool launch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+            const QsaShapes& s, float* attn, int64_t n_q, dpct::queue_ptr st) {
+    const float scale_log2 = 1.4426950408889634f / std::sqrt((float) HD);
+    for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
+        const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
+        const float* qq = q + q0 * s.n_head * HD;
+        const int32_t* idq = ids + q0 * cap;
+        const int32_t* stq = steps + q0 * kStepCount;
+        float* aq = attn + q0 * s.n_head * HD;
+        const int nkv = (int) s.n_head_kv, ps = (int) s.page_size, capi = (int) cap;
+        st->submit([&](sycl::handler& cgh) {
+            sycl::local_accessor<uint8_t, 1> slm(sycl::range<1>(kSmemBytes), cgh);
+            cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, (size_t) nkv, (size_t) nb * THREADS), sycl::range<3>(1, 1, THREADS)),
+                             [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] {
+                                 prompt_attn_xmx_kernel<KV_MODE>(qq, pools, idq, stq, nkv, ps, scale_log2, aq, capi,
+                                                                 slm.get_multi_ptr<sycl::access::decorated::no>().get());
+                             });
+        });
+    }
+    return true;
+}
+}  // namespace
+
+bool qsa_prompt_attn_xmx(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+                         const QsaShapes& s, float* attn, int64_t n_q, void* stream) {
+    // Off unless asked for: correct (qsa_prompt_attn_parity: 1e-6 of scale, like the CUDA kernel) but 3x slower than the
+    // FP32 fallback on the B70 (18.7 vs 5.5 ms per chunk at 32k context, 2026-09-30) - the chunk staging and packing
+    // dominate, not the products. Kept as the base for a tuned version (bigger chunks, vector packing).
+    static const bool on = std::getenv("STRATA_PROMPT_ATTN_XMX") && std::getenv("STRATA_PROMPT_ATTN_XMX")[0] == '1';
+    if (!on || n_q <= 0) return false;
+    if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids || !steps ||
+        !pools.page_table)
+        return false;
+    dpct::queue_ptr st = strata::q_of(stream);
+    static const bool fits = [&] {
+        const size_t have = st->get_device().get_info<sycl::info::device::local_mem_size>();
+        if (have < kSmemBytes) std::fprintf(stderr, "strata: prompt attention on XMX needs %zu bytes of local memory, the device has %zu\n", kSmemBytes, have);
+        return have >= kSmemBytes;
+    }();
+    if (!fits) return false;
+    if (pools.k_q != nullptr && pools.v_q4 != nullptr) {
+        if (!pools.k_scale) return false;
+        return launch<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
+    if (pools.k_q != nullptr) {
+        if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
+        return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
+    if (!pools.k_pool || !pools.v_pool) return false;
+    return launch<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
+}
+}  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index 402b0e2af27..b556c82a136 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -13,6 +13,9 @@
 #include <cstdlib>
 #include <time.h>
 
+#ifndef STRATA_PLAN_LOCAL
+#define STRATA_PLAN_LOCAL 1   // 0: the original one-thread plan kernel (A/B)
+#endif
 namespace strata::kernels {
 namespace {
 
@@ -928,11 +931,40 @@ __dpct_inline__ void resident_plan_kernel(
     const int32_t *__restrict__ res, int n_expert, const uint8_t *cache_base,
     const unsigned long long *slot_off, long long blob,
     int32_t *__restrict__ pl, long long capx, uint32_t *skip, uint32_t ring) {
-    // one thread: at most kVerifyMaxT * 10 entries, the host's exact loop
+#if STRATA_PLAN_LOCAL
+    // SYCL port: the host's exact loop, but over a local copy of the ids and their slots. One thread reading global
+    // memory for every compare (n^2 of them) took 87 us per layer on the B70 - 4% of a decode round; a work-group
+    // of 64 loads the n <= 60 entries once, then thread 0 groups them from local memory.
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto &s_ids = *sycl::ext::oneapi::group_local_memory_for_overwrite<int32_t[64]>(item.get_group());
+    auto &s_res = *sycl::ext::oneapi::group_local_memory_for_overwrite<int32_t[64]>(item.get_group());
+    auto &s_bad = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(item.get_group());
+    const int tid = (int) item.get_local_id(2);
+    if (tid == 0) s_bad = 0;
+    item.barrier(sycl::access::fence_space::local_space);
+    for (int i = tid; i < n && i < 64; i += 64) {
+        const int32_t e = ids[i];
+        const bool ok = e >= 0 && e < n_expert && res[e] >= 0;
+        s_ids[i] = e;
+        s_res[i] = ok ? res[e] : -1;
+        if (!ok) s_bad = 1;
+    }
+    item.barrier(sycl::access::fence_space::local_space);
+    if (tid != 0) return;
+    if (s_bad || n > 64) { *skip = 0; return; }   // n > 64 never happens (kVerifyMaxT * 10 = 60); refuse rather than read past
+#else
+    // the original: one thread, the host's exact loop over global memory
     for (int i = 0; i < n; ++i) {
         const int32_t e = ids[i];
         if (e < 0 || e >= n_expert || res[e] < 0) { *skip = 0; return; }
     }
+#endif
+#if !STRATA_PLAN_LOCAL
+#define s_ids ids
+#define S_RES(i) res[ids[i]]
+#else
+#define S_RES(i) s_res[i]
+#endif
     int32_t* counts = pl;
     int32_t* start = pl + 4;
     int32_t* dst = start + capx + 1;
@@ -943,17 +975,15 @@ __dpct_inline__ void resident_plan_kernel(
     int groups = 0, entries = 0;
     for (int i0 = 0; i0 < n; ++i0) {
         bool first = true;
-#pragma unroll
-        for (int j = 0; j < i0; ++j) if (ids[j] == ids[i0]) {
+        for (int j = 0; j < i0; ++j) if (s_ids[j] == s_ids[i0]) {
             first = false; break;
         }
         if (!first) continue;
-        const int32_t slot = res[ids[i0]];
+        const int32_t slot = S_RES(i0);
         ptr[groups] = (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob));
         start[groups] = entries;
-#pragma unroll
         for (int i = i0; i < n; ++i)
-            if (ids[i] == ids[i0]) {
+            if (s_ids[i] == s_ids[i0]) {
                 // an entry belongs to i0's group when its first occurrence is i0: the same expert id
                 dst[entries] = i;
                 tok[entries] = i / k;
@@ -973,6 +1003,8 @@ __dpct_inline__ void resident_plan_kernel(
     */
     sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
     strata::sys_store(skip, ring);
+#undef s_ids
+#undef S_RES
 }
 __dpct_inline__ void wait_flag_ge_or_kernel(const volatile uint32_t *flag,
                                             uint32_t value,
@@ -1031,8 +1063,8 @@ void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_
 
         strata::q_of(stream)
             ->parallel_for<dpct_kernel_name<class resident_plan_kernel_db6b7a>>(
-                sycl::nd_range<3>(sycl::range(1, 1, 1), sycl::range(1, 1, 1)),
-                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                sycl::nd_range<3>(sycl::range(1, 1, STRATA_PLAN_LOCAL ? 64 : 1), sycl::range(1, 1, STRATA_PLAN_LOCAL ? 64 : 1)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
                     resident_plan_kernel(ids, n_entries, k, res_layer, n_expert,
                                          cache_base, slot_off, blob, plan, capx,
                                          skip, ring);
diff --git a/sycl/src/kernels/xmx_gemm_bench.cpp b/sycl/src/kernels/xmx_gemm_bench.cpp
new file mode 100644
index 00000000000..d332cd1ec37
--- /dev/null
+++ b/sycl/src/kernels/xmx_gemm_bench.cpp
@@ -0,0 +1,93 @@
+// xmx_gemm_bench: the XMX quantized GEMM against dequant + oneMKL on random experts.
+//   xmx_gemm_bench [ty=18] [M=96] [mode=gu|down] [reps=50]
+#include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/xmx_gemm.hpp"
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <dpct/blas_utils.hpp>
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+static float h2f(uint16_t h) { return (float) sycl::bit_cast<sycl::half>(h); }
+static uint16_t f2h(float f) { return sycl::bit_cast<uint16_t>(sycl::half(f)); }
+int main(int argc, char** argv) {
+    const int ty = argc > 1 ? std::atoi(argv[1]) : 18;
+    const int M = argc > 2 ? std::atoi(argv[2]) : 96;
+    const std::string mode = argc > 3 ? argv[3] : "gu";
+    const int reps = argc > 4 ? std::atoi(argv[4]) : 50;
+    const bool gu = mode == "gu";
+    const int64_t K = gu ? 2560 : 640, n_out = gu ? 1280 : 2560, n_ff = 640;
+    const int blk_elems = (ty == 20) ? 32 : (ty == 42) ? 64 : 256;
+    const size_t blk_bytes = strata::kernels::iq_row_bytes(ty, blk_elems);
+    const size_t row_bytes = strata::kernels::iq_row_bytes(ty, K);
+    if (row_bytes == 0) { std::printf("type %d not supported\n", ty); return 2; }
+    const int64_t rows_per_blob = gu ? n_ff : n_out;
+    std::mt19937 rng(7);
+    auto blob = [&]() {
+        std::vector<uint8_t> b(rows_per_blob * row_bytes);
+        for (auto& x : b) x = (uint8_t) rng();
+        for (size_t o = 0; o + 1 < b.size(); o += blk_bytes) { b[o] = 0x00; b[o + 1] = 0x3C; }   // d = 1.0 in every block
+        return b;
+    };
+    std::vector<uint8_t> hg = blob(), hu = gu ? blob() : std::vector<uint8_t>();
+    std::vector<uint16_t> hx((size_t) M * K);
+    std::normal_distribution<float> nd(0.f, 1.f);
+    for (auto& x : hx) x = f2h(nd(rng));
+    sycl::queue* q = &dpct::get_in_order_queue();
+    uint8_t* dg = sycl::malloc_device<uint8_t>(hg.size(), *q);
+    uint8_t* du = gu ? sycl::malloc_device<uint8_t>(hu.size(), *q) : nullptr;
+    uint16_t* dx = sycl::malloc_device<uint16_t>(hx.size(), *q);
+    uint16_t* dw = sycl::malloc_device<uint16_t>((size_t) n_out * K, *q);
+    float* y_ref = sycl::malloc_device<float>((size_t) M * n_out, *q);
+    float* y_xmx = sycl::malloc_device<float>((size_t) M * n_out, *q);
+    q->memcpy(dg, hg.data(), hg.size()).wait();
+    if (gu) q->memcpy(du, hu.data(), hu.size()).wait();
+    q->memcpy(dx, hx.data(), hx.size() * 2).wait();
+    // the reference path: the engine's dequant kernels + oneMKL (what prefill.cpp runs today)
+    dpct::blas::descriptor_ptr h = new dpct::blas::descriptor();
+    h->set_queue(q);
+    auto dequant = [&]() {
+        if (gu) strata::kernels::iq_dequant_gu_f16(ty, dg, du, n_ff, K, dw, q);
+        else strata::kernels::iq_dequant_f16(ty, dg, n_out * K, dw, q);
+    };
+    auto mkl = [&]() {
+        const float alpha = 1.0f, beta = 0.0f;
+        dpct::blas::gemm(h, oneapi::mkl::transpose::trans, oneapi::mkl::transpose::nontrans, (int) n_out, M, (int) K, &alpha, dw,
+                         dpct::library_data_t::real_half, (int) K, dx, dpct::library_data_t::real_half, (int) K, &beta, y_ref,
+                         dpct::library_data_t::real_float, (int) n_out, dpct::compute_type::f32);
+    };
+    dequant(); mkl(); q->wait();
+    if (!strata::kernels::xmx_gemm_iq(ty, dg, du, K, (int) n_out, dx, M, y_xmx, n_out, q)) { std::printf("xmx_gemm_iq refused\n"); return 3; }
+    q->wait();
+    std::vector<float> r((size_t) M * n_out), x((size_t) M * n_out);
+    q->memcpy(r.data(), y_ref, r.size() * 4).wait();
+    q->memcpy(x.data(), y_xmx, x.size() * 4).wait();
+    double maxref = 0, maxerr = 0, sumerr = 0; size_t bad = 0, nonfinite = 0;
+    for (size_t i = 0; i < r.size(); ++i) {
+        if (!std::isfinite(r[i]) || !std::isfinite(x[i])) { ++nonfinite; continue; }
+        maxref = std::max(maxref, (double) std::fabs(r[i]));
+        const double e = std::fabs((double) r[i] - x[i]);
+        maxerr = std::max(maxerr, e); sumerr += e;
+        if (e > 1e-2 * (1.0 + std::fabs(r[i]))) ++bad;
+    }
+    std::printf("ty %d %s M %d: max |ref| %.3g, max err %.3g, mean err %.3g, %zu of %zu outside 1%% (nonfinite %zu)\n", ty,
+                mode.c_str(), M, maxref, maxerr, sumerr / r.size(), bad, r.size(), nonfinite);
+    auto time = [&](auto&& fn) {
+        for (int i = 0; i < 3; ++i) fn(); q->wait();
+        const auto t0 = std::chrono::steady_clock::now();
+        for (int i = 0; i < reps; ++i) fn();
+        q->wait();
+        return std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t0).count() / reps;
+    };
+    const double t_dq = time([&] { dequant(); }), t_mkl = time([&] { mkl(); }), t_both = time([&] { dequant(); mkl(); });
+    const double t_xmx = time([&] { strata::kernels::xmx_gemm_iq(ty, dg, du, K, (int) n_out, dx, M, y_xmx, n_out, q); });
+    const double flop = 2.0 * M * n_out * K;
+    std::printf("dequant %.3f ms + mkl %.3f ms = %.3f ms (%.0f GFLOP/s on the GEMM)  |  xmx %.3f ms (%.0f GFLOP/s, %.2fx)\n", t_dq,
+                t_mkl, t_both, flop / t_mkl / 1e6, t_xmx, flop / t_xmx / 1e6, t_both / t_xmx);
+    return bad > r.size() / 1000 ? 1 : 0;
+}
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index b9d04cb2877..83da4dffce8 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -808,8 +808,11 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
     const bool q8 = !f16_only && mmq::built() && mmq::supported(kQ8_0);
     const uint64_t per_row = 4 * (2 * Nn + 4 * HCN + LR + HC + Nn + 2 * KV + 1) + 2 * (Nn + 2 * HCN + LR + Nn) + 64 +
                              (q8 ? (uint64_t) mmq::q8_bytes(g.hc, Nn) + 4 * g.hc : 0);
-    const int64_t B = std::min<int64_t>(n - r0, (int64_t) (m.region_bytes / per_row) & ~(int64_t) 63);
-    if (B < 64) return false;
+    // SYCL port: B is the batch buffers' capacity, not the row count (each batch uses nb <= B rows), so a short
+    // prompt gets 64-row buffers instead of the per-6-token fallback (19 tokens: 106 ms there, a few ms here)
+    const int64_t cap = (int64_t) (m.region_bytes / per_row) & ~(int64_t) 63;
+    if (cap < 64) return false;
+    const int64_t B = std::min<int64_t>(std::max<int64_t>(n - r0, 64), cap);
     uint8_t* q = m.region;
     auto carve = [&](size_t bytes) { void* p = q; q += (bytes + 255) & ~(size_t) 255; return p; };
     float* emb = (float*) carve((size_t) B * Nn * 4);
@@ -1125,6 +1128,11 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         ++stats_.chunks;
         pt.mark(kPfStart, cs);
         const auto tsetup = Clock::now();
+        auto tlap = tsetup;   // STRATA_PREFILL_TIMING=1: where the host's chunk setup goes
+        auto lap = [&](const char* what) {
+            if (pt.on) { std::fprintf(stderr, "strata prefill timing: setup %s %.1f ms\n", what, ms_since(tlap)); tlap = Clock::now(); }
+        };
+        if (pt.on) { m.cs->wait(); lap("work queued before the chunk"); }
         // ---- embeddings, broadcast to the four streams - or, in a later stage of a layer split, the rows the
         // previous stage handed on
         if (hand_in_ != nullptr) {
@@ -1167,8 +1175,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 err = "prefill: the token id upload failed";
                 return false;
             }
+            lap("token ids uploaded");
             if (nemb) {
                 nemb->gather_dev(m.tok_dev, T, m.emb, m.cs);
+                if (pt.on) { m.cs->wait(); lap("embedding gather (waited)"); }
             } else {
                 const auto* codes = (const uint8_t*) wemb->data;
                 const auto* scales = (const float*) (codes + wemb->codes_bytes);
@@ -1200,6 +1210,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             }
         }
         if (hand_in_ == nullptr) gr_broadcast(m.emb, m.R, T, m.cs);
+        lap("embeddings");
         // ---- the PLE rows of the whole chunk, one batched SSD request (read ahead on a thread, see ple_gather)
         if (ple_on) {
             const auto tp = Clock::now();
@@ -1229,6 +1240,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             stats_.ms_ple += ms_since(tp);
         }
         for (int64_t t = 0; t < T; ++t) { prev[0] = prev[1]; prev[1] = (int32_t) tokens[c0 + t]; }
+        lap("PLE rows");
         // ---- the QSA step records of every position in the chunk
         for (int64_t t = 0; t < T; ++t) strata::kernels::qsa_step_fill(m.steps_host.data() + t * strata::kernels::kStepCount, p0 + t, s);
         /*
@@ -1242,6 +1254,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
 
         int64_t qsa_index = 0, gdn_index = 0;
         for (int64_t l = 0; l < LB; ++l) (core::is_qsa_layer(g, l) ? qsa_index : gdn_index) += 1;
+        lap("step records");
         // step 3: this chunk's stream - every non-resident expert of every layer, layer by layer in id order (entry
         // k lands in ring slot k % ring); a copy is issued once the entry `ring` before it is consumed (its slot's
         // `used` event recorded), so the copy stream never waits on an event that is not queued yet
@@ -1394,6 +1407,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             if (threaded_issue) a_consumed.store(upto, std::memory_order_release);
             else issue_until(upto + (size_t) m.ring);
         };
+        lap("expert stream plan");
         host_setup_ms += ms_since(tsetup);
         bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
         for (int64_t l = LB; l < LE; ++l) {
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 6f89035c9c1..e26a005c97b 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -5292,6 +5292,20 @@ int main(int argc, char** argv) {
         // plan v0.3 P6: with a native pack the first window is the last prompt token alone (it produces the first
         // generated token and the MTP's first cell); otherwise the token loop already did that.
         bool first_window = native_pack;
+        // SYCL port: every window graph and the drafter's graphs are captured here, once, instead of on first use in
+        // the loop below (STRATA_WARM_GRAPHS=0: as before). A server pays this once per process, not per request.
+        {
+            static const bool warm_on = [] { const char* v = std::getenv("STRATA_WARM_GRAPHS"); return !(v && v[0] == '0'); }();
+            if (warm_on) {
+                const Clock::time_point tw = Clock::now();
+                if (!ver.warm(err) || (use_mtp && !mtp.warm(err))) {
+                    std::fprintf(stderr, "strata generate: warm-up capture: %s\n", err.c_str());
+                    return 1;
+                }
+                std::fprintf(stderr, "strata generate: window and draft graphs captured in %.0f ms\n",
+                             std::chrono::duration<double, std::milli>(Clock::now() - tw).count());
+            }
+        }
         if (use_mtp && !first_window &&
             !mtp.draft_first(o.spec, ss.R, x, p - 1, drafts.data(), err, dprob.data(), (float) o.spec_min_p)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -5370,7 +5384,9 @@ int main(int argc, char** argv) {
             bool adapt_ok = true;
             if (!drive.d.usage.empty() && ((rounds + 1) % o.adapt_every) == 0)
                 adapt_thr = std::thread([&] { adapt_ok = adapt(); });
-            if (!ver.commit(a + 1, err)) {
+            // SYCL port: the commit graph is left running while the drafter's round (its own queue) runs; collected
+            // below, before anything reads the committed state
+            if (!ver.commit(a + 1, err, /*wait=*/!use_mtp)) {
                 if (adapt_thr.joinable()) adapt_thr.join();
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());
                 return 1;
@@ -5388,6 +5404,7 @@ int main(int argc, char** argv) {
             }
             if (eos) {
                 if (adapt_thr.joinable()) adapt_thr.join();
+                if (!ver.commit_finish(err)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
                 total_ms += std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
                 break;
             }
@@ -5399,6 +5416,7 @@ int main(int argc, char** argv) {
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());
                 return 1;
             }
+            if (!ver.commit_finish(err)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
             x = outv[(size_t) a];
             p += a + 1;
             const double round_ms = std::chrono::duration<double, std::milli>(Clock::now() - t0).count();

From 3249953c2148844aa7fb87d3ca380106c5c8a9de Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 08:05:57 -0500
Subject: [PATCH 023/201] sycl: iq4_nl dequant as runs of 8 (0.024 -> 0.017 ms
 per expert), host timers around the prompt path's per-layer grouping

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/src/kernels/cuda/iq_kernels.dp.cpp | 19 +++++++++++--------
 sycl/src/prefill/prefill.cpp            |  8 +++++++-
 2 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index a58d483a6de..51f081b0e0e 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -923,18 +923,21 @@ inline void dq_iq1_m(const void *vx, int64_t ibs, dst_t *yy, int tid) {
 template <typename dst_t>
 inline void dq_iq4_nl(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const block_iq4_nl* x = (const block_iq4_nl*) vx + ibs * (QK_K / QK4_NL);
+    // SYCL port: thread (ib, il) writes the block's values [8 il, 8 il + 8) as one run: il < 2 the low nibbles of
+    // qs[8 il ..], il >= 2 the high nibbles of qs[8 (il - 2) ..] (the same values as llama.cpp's 4 + 4 split)
     const int64_t il = tid / 8, ib = tid % 8;
-    dst_t* y = yy + 32 * ib + 4 * il;
-    const uint8_t* q4 = x[ib].qs + 4 * il;
+    dst_t* y = yy + 32 * ib + 8 * il;
+    const uint8_t* q4 = x[ib].qs + 8 * (il & 1);
     const float d = (float) x[ib].d;
-    float lo[4], hi[4];
+    float v[8];
+    if (il < 2) {
 #pragma unroll
-    for (int j = 0; j < 4; ++j) {
-        lo[j] = d * kvalues_iq4nl[q4[j] & 0xf];
-        hi[j] = d * kvalues_iq4nl[q4[j] >> 4];
+        for (int j = 0; j < 8; ++j) v[j] = d * kvalues_iq4nl[q4[j] & 0xf];
+    } else {
+#pragma unroll
+        for (int j = 0; j < 8; ++j) v[j] = d * kvalues_iq4nl[q4[j] >> 4];
     }
-    store_run<dst_t, 4>(y, lo);
-    store_run<dst_t, 4>(y + 16, hi);
+    store_run<dst_t, 8>(y, v);
 }
 // Q3_K (the Q2_0 file's token_embd): llama.cpp's dequantize_block_q3_K, its 64 threads folded onto 32
 template <typename dst_t>
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 83da4dffce8..b5e4f5862b5 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -1079,6 +1079,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
     std::future<bool> next_run;
     int hand_buf = 0;
     double host_sync_ms = 0, host_chunk_ms = 0, host_setup_ms = 0;   // STRATA_PREFILL_TIMING: the host's share
+    double grp_wait_ms = 0, grp_cpu_ms = 0;   // the per-layer grouping: the drain wait, the host's loops
     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
     s.idx_dim = g.idx_key_dim;
@@ -1762,6 +1763,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     pt.mark(kPfHostGroup, cs);
                     // (the sync below also orders this layer's writes of slot/src/bounds after the previous
                     // layer's kernels that read them)
+                    const auto tg0 = Clock::now();
                     const bool grp_mapped = m.grp_host != nullptr;
                     int32_t* ids_h = grp_mapped ? m.grp_host : m.ids_host.data();
                     int32_t* slot_h = grp_mapped ? m.grp_host + m.grp_tk : m.slot_host.data();
@@ -1778,6 +1780,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                       (size_t)T * K * 4);
                     m.cs->wait();
                     pt.fold();
+                    const auto tg1 = Clock::now();
                     std::fill(m.cnt.begin(), m.cnt.end(), 0);
                     for (int64_t i = 0; i < T * K; ++i) {
                         const int32_t e = ids_h[(size_t) i];
@@ -1816,6 +1819,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         m.cs->memcpy(m.src_dev, m.src_host.data(),
                                      (size_t)T * K * 4);
                     }
+                    grp_wait_ms += std::chrono::duration<double, std::milli>(tg1 - tg0).count();
+                    grp_cpu_ms += std::chrono::duration<double, std::milli>(Clock::now() - tg1).count();
                     // the experts, in id order: resident ones from VRAM, the others through the staging ring
                     std::vector<int32_t> order;
                     for (int32_t e = 0; e < m.g->n_expert; ++e) if (m.cnt[(size_t) e] > 0) order.push_back(e);
@@ -2285,7 +2290,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                      (long long) n, total, ms_since(t_start), stats_.ms_experts_host, line.c_str());
         std::fprintf(stderr, "strata prefill timing: host: chunk setup (PLE rows, the expert stream plan) %.0f ms, "
                              "waiting for each chunk %.0f ms, after each chunk (the draft layer, progress) %.0f ms, "
-                             "PLE %.0f ms\n", host_setup_ms, host_sync_ms, host_chunk_ms, stats_.ms_ple);
+                             "PLE %.0f ms; grouping: drain wait %.0f ms, host loops + uploads %.0f ms\n", host_setup_ms, host_sync_ms,
+                     host_chunk_ms, stats_.ms_ple, grp_wait_ms, grp_cpu_ms);
     }
     if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr) {   // debug: the GDN states as the prompt path leaves them
         m.cs->wait();

From cbb4728f5b6b9e49c708bcbdb645c778d0ee23f1 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 08:30:18 -0500
Subject: [PATCH 024/201] sycl: PLE rows - a 64-deep read queue and a short
 first prompt chunk (2,184 tokens 711 -> 765 tok/s, 8,000 857 -> 986)

The rows of a 2,184-token prompt are 27k random 4 KB O_DIRECT reads (114 MB for ~7 MB of rows), all before the
first kernel: 466 ms with the reader's 16 blocking threads. 64 threads (the port's default now, a copy of
src/platform/direct_file.cpp; STRATA_IO_THREADS still overrides) give 330 ms and 128 / 256 the same - the drive
tops out near 85k IOPS. A 256-token first chunk (STRATA_PREFILL_FIRST, 0: off) lets the GPU start while the
rest of the rows are read behind it: 2,184 tokens 3,075 -> 2,860 ms, time to first token ~150 ms less; 8,000
tokens 986 tok/s. The chunk boundary moves rounding in the expert GEMMs, so a long greedy continuation can
diverge late (token 45 of 64 on the test prompt); short prompts are bit-identical.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                     |   2 +
 sycl/src/platform/direct_file.cpp | 369 ++++++++++++++++++++++++++++++
 sycl/src/prefill/prefill.cpp      |  20 +-
 3 files changed, 385 insertions(+), 6 deletions(-)
 create mode 100644 sycl/src/platform/direct_file.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index e5701e80509..5193d7b0c69 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -240,6 +240,8 @@ same prompts as above (outputs identical before and after each change):
 | one device module per kernel (`-fsycl-device-code-split=per_kernel`) | the first launch in the prompt path (the embedding gather) 245 -> 1 ms |
 | the expert dequant writes each thread's run of FP16 values as one vector store (it wrote them one 2-byte store at a time) | dequant per expert 0.085 -> 0.030 ms; prompt 496 -> 575 tok/s at 2,184 tokens, 720 -> 841 at 8,000 |
 | SWAR sign compare/subtract in the expert dots, a local-memory resident-plan kernel, a split-K fused down kernel (bit-identical to the single-token one) | parity-clean, no measurable decode change; kept |
+| the PLE row reader's default queue depth 16 -> 64 blocking O_DIRECT threads (`STRATA_IO_THREADS`; 128 and 256 change nothing: the drive tops out near 85k IOPS on the 27k random 4 KB reads a 2,184-token prompt needs) | the rows of that prompt 466 -> 330 ms |
+| a short first prompt chunk (`STRATA_PREFILL_FIRST`, default 256 tokens) so the GPU starts while the remaining rows are still being read | 2,184 tokens: 711 -> 765 tok/s, 8,000: 857 -> 986; time to first token about 150 ms less. The chunk boundary moves rounding in the expert GEMMs, so a long greedy continuation can diverge late (token 45 of 64 on the test prompt) |
 
 Draft policy sweep (2,184-token prompt, 128 tokens): windows of 6 (`--spec 4`) at 41.6-43.5 tok/s; `--spec 2`
 33.6, `--spec 6` 35-37; `--spec-min-p` 0.3-0.7 within noise. Profiles (unitrace, `strata-sycl-dev:metrics` with
diff --git a/sycl/src/platform/direct_file.cpp b/sycl/src/platform/direct_file.cpp
new file mode 100644
index 00000000000..a1c16f24051
--- /dev/null
+++ b/sycl/src/platform/direct_file.cpp
@@ -0,0 +1,369 @@
+// SYCL port: upstream's src/platform/direct_file.cpp with a deeper default read queue on Linux (see io_threads below).
+// src/platform/direct_file.cpp - see include/strata/platform/direct_file.hpp.
+#include "strata/platform/direct_file.hpp"
+
+#include <algorithm>
+#include <chrono>
+#include <condition_variable>
+#include <cstdlib>
+#include <cstring>
+#include <deque>
+#include <mutex>
+#include <thread>
+#include <vector>
+
+#if defined(_WIN32)
+#define WIN32_LEAN_AND_MEAN
+#define NOMINMAX
+#include <windows.h>
+#else
+#include <fcntl.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#endif
+
+namespace strata::platform {
+
+double now_us() {
+    using namespace std::chrono;
+    return (double) duration_cast<nanoseconds>(steady_clock::now().time_since_epoch()).count() / 1000.0;
+}
+
+void* DirectFile::alloc_aligned(size_t bytes) {
+#if defined(_WIN32)
+    return VirtualAlloc(nullptr, bytes, MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE);
+#else
+    void* p = nullptr;
+    return posix_memalign(&p, alignment(), bytes) == 0 ? p : nullptr;
+#endif
+}
+
+void DirectFile::free_aligned(void* p) {
+    if (p == nullptr) return;
+#if defined(_WIN32)
+    VirtualFree(p, 0, MEM_RELEASE);
+#else
+    std::free(p);
+#endif
+}
+
+namespace {
+/// A queued read: `submit` only queues it; the pool's threads issue it (perf-review C-4 / F-2).  One thread
+/// issuing every read was the limit of the n-gram table's prompt reads: ~12 us of kernel time per read, ~80K
+/// reads/s, while an NVMe drive serves several times that at depth.
+struct Pending {
+    uint64_t offset;
+    void* buffer;
+    uint32_t length;
+    uint64_t tag;
+};
+
+/// The number of issuing threads: STRATA_IO_THREADS, else 4 (Windows: overlapped submits) / 16 (Linux: each
+/// thread does one blocking pread, so the thread count is the queue depth).
+int io_threads(int dflt) {
+    const char* v = std::getenv("STRATA_IO_THREADS");
+    const int n = v ? std::atoi(v) : dflt;
+    return std::clamp(n, 1, 64);
+}
+}  // namespace
+
+#if defined(_WIN32)
+// ------------------------------------------------------------------------------------------------ Windows
+namespace {
+/// One in-flight request. The OVERLAPPED must be the first member so a completion packet's OVERLAPPED*
+/// converts back to the request.
+struct Req {
+    OVERLAPPED ov;
+    uint64_t tag;
+};
+}  // namespace
+
+struct DirectFile::Impl {
+    HANDLE file = INVALID_HANDLE_VALUE;
+    HANDLE port = nullptr;
+    uint64_t size = 0;
+    std::mutex mu;                      // everything below
+    std::deque<Req*> free_reqs;
+    std::vector<Req*> all_reqs;
+    std::deque<Completion> immediate;   // requests that completed without a port packet (EOF) or failed
+    std::deque<Pending> queue;          // submitted, not yet issued
+    std::condition_variable cv;
+    bool stop = false;
+    std::vector<std::thread> pool;
+
+    Req* take() {
+        if (free_reqs.empty()) {
+            Req* r = new Req();
+            all_reqs.push_back(r);
+            return r;
+        }
+        Req* r = free_reqs.front();
+        free_reqs.pop_front();
+        return r;
+    }
+
+    void issue(const Pending& p) {
+        Req* r;
+        {
+            std::lock_guard<std::mutex> lk(mu);
+            r = take();
+        }
+        std::memset(&r->ov, 0, sizeof r->ov);
+        r->ov.Offset = (DWORD) (p.offset & 0xFFFFFFFFull);
+        r->ov.OffsetHigh = (DWORD) (p.offset >> 32);
+        r->tag = p.tag;
+        if (!ReadFile(file, p.buffer, p.length, nullptr, &r->ov)) {
+            const DWORD e = GetLastError();
+            if (e != ERROR_IO_PENDING) {
+                std::lock_guard<std::mutex> lk(mu);
+                free_reqs.push_back(r);
+                // at or past end of file: a zero-byte completion; anything else: a failed one
+                immediate.push_back(Completion{p.tag, 0, e == ERROR_HANDLE_EOF});
+                PostQueuedCompletionStatus(port, 0, 0, nullptr);   // wake a waiter to collect it
+            }
+        }
+    }
+
+    void worker() {
+        std::unique_lock<std::mutex> lk(mu);
+        for (;;) {
+            cv.wait(lk, [&] { return stop || !queue.empty(); });
+            if (stop && queue.empty()) return;
+            const Pending p = queue.front();
+            queue.pop_front();
+            lk.unlock();
+            issue(p);
+            lk.lock();
+        }
+    }
+
+    void stop_pool() {
+        {
+            std::lock_guard<std::mutex> lk(mu);
+            stop = true;
+        }
+        cv.notify_all();
+        for (std::thread& t : pool) t.join();
+        pool.clear();
+        stop = false;
+    }
+};
+
+DirectFile::DirectFile() : impl_(new Impl) {}
+DirectFile::~DirectFile() {
+    close();
+    for (Req* r : impl_->all_reqs) delete r;
+    delete impl_;
+}
+
+bool DirectFile::open(const std::string& path, std::string& err) {
+    close();
+    const int wlen = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
+    std::wstring wpath((size_t) (wlen > 0 ? wlen : 1), L'\0');
+    MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, wpath.data(), wlen);
+    // NO_BUFFERING: the cache manager never holds these pages, so the table cannot grow into RAM.
+    // RANDOM_ACCESS: no read-ahead. OVERLAPPED: many reads in flight, completed through the port below.
+    impl_->file = CreateFileW(wpath.c_str(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                              FILE_FLAG_NO_BUFFERING | FILE_FLAG_OVERLAPPED | FILE_FLAG_RANDOM_ACCESS, nullptr);
+    if (impl_->file == INVALID_HANDLE_VALUE) {
+        err = "DirectFile: cannot open " + path + " (error " + std::to_string(GetLastError()) + ")";
+        return false;
+    }
+    LARGE_INTEGER sz;
+    if (!GetFileSizeEx(impl_->file, &sz)) {
+        err = "DirectFile: cannot size " + path;
+        close();
+        return false;
+    }
+    impl_->size = (uint64_t) sz.QuadPart;
+    impl_->port = CreateIoCompletionPort(impl_->file, nullptr, 0, 1);
+    if (impl_->port == nullptr) {
+        err = "DirectFile: CreateIoCompletionPort failed (error " + std::to_string(GetLastError()) + ")";
+        close();
+        return false;
+    }
+    // Completions of reads that finish synchronously are still queued to the port, so every issued read
+    // produces exactly one packet; `wait` is the only completion path.
+    const int n = io_threads(4);
+    for (int i = 0; i < n; ++i) impl_->pool.emplace_back([this] { impl_->worker(); });
+    return true;
+}
+
+void DirectFile::close() {
+    impl_->stop_pool();
+    if (impl_->port != nullptr) CloseHandle(impl_->port);
+    if (impl_->file != INVALID_HANDLE_VALUE) CloseHandle(impl_->file);
+    impl_->port = nullptr;
+    impl_->file = INVALID_HANDLE_VALUE;
+    impl_->size = 0;
+    impl_->immediate.clear();
+    impl_->queue.clear();
+}
+
+bool DirectFile::is_open() const { return impl_->file != INVALID_HANDLE_VALUE; }
+uint64_t DirectFile::size() const { return impl_->size; }
+
+bool DirectFile::submit(uint64_t offset, void* buffer, uint32_t length, uint64_t tag, std::string& err) {
+    if (!is_open()) { err = "DirectFile: not open"; return false; }
+    if (offset % alignment() || length % alignment() || ((uintptr_t) buffer) % alignment() || length == 0) {
+        err = "DirectFile: unaligned request";
+        return false;
+    }
+    {
+        std::lock_guard<std::mutex> lk(impl_->mu);
+        impl_->queue.push_back(Pending{offset, buffer, length, tag});
+    }
+    impl_->cv.notify_one();
+    return true;
+}
+
+int DirectFile::wait(Completion* out, int max, int timeout_ms) {
+    int n = 0;
+    {
+        std::lock_guard<std::mutex> lk(impl_->mu);
+        while (n < max && !impl_->immediate.empty()) {
+            out[n++] = impl_->immediate.front();
+            impl_->immediate.pop_front();
+        }
+    }
+    if (n == max || !is_open()) return n;
+    OVERLAPPED_ENTRY entries[64];
+    const ULONG want = (ULONG) (max - n < 64 ? max - n : 64);
+    ULONG got = 0;
+    const DWORD t = timeout_ms < 0 ? INFINITE : (DWORD) timeout_ms;
+    if (!GetQueuedCompletionStatusEx(impl_->port, entries, want, &got, n > 0 ? 0 : t, FALSE)) return n;
+    std::lock_guard<std::mutex> lk(impl_->mu);
+    for (ULONG i = 0; i < got; ++i) {
+        if (entries[i].lpOverlapped == nullptr) {          // a wake() packet (or an immediate completion's nudge)
+            while (n < max && !impl_->immediate.empty()) {
+                out[n++] = impl_->immediate.front();
+                impl_->immediate.pop_front();
+            }
+            if (n < max) out[n++] = Completion{WAKE_TAG, 0, true};
+            continue;
+        }
+        Req* r = (Req*) entries[i].lpOverlapped;
+        const uint32_t status = (uint32_t) r->ov.Internal;   // an NTSTATUS
+        Completion c;
+        c.tag = r->tag;
+        c.bytes = entries[i].dwNumberOfBytesTransferred;
+        // STATUS_END_OF_FILE (0xC0000011) is a legal short read at the table's last page.
+        c.ok = status == 0 || status == 0xC0000011u;
+        out[n++] = c;
+        impl_->free_reqs.push_back(r);
+    }
+    return n;
+}
+
+void DirectFile::wake() {
+    if (impl_->port != nullptr) PostQueuedCompletionStatus(impl_->port, 0, 0, nullptr);
+}
+
+#else
+// ------------------------------------------------------------------------------------------------ POSIX
+// perf-review F-2: a pool of threads, each doing blocking O_DIRECT preads, so reads run in parallel (the thread
+// count is the queue depth).  It replaced one synchronous pread inside `submit`, which read the n-gram table's
+// rows one at a time.
+struct DirectFile::Impl {
+    int fd = -1;
+    uint64_t size = 0;
+    std::mutex mu;
+    std::condition_variable cv_work, cv_done;
+    std::deque<Pending> queue;
+    std::deque<Completion> done;
+    bool stop = false;
+    std::vector<std::thread> pool;
+
+    void worker() {
+        std::unique_lock<std::mutex> lk(mu);
+        for (;;) {
+            cv_work.wait(lk, [&] { return stop || !queue.empty(); });
+            if (stop && queue.empty()) return;
+            const Pending p = queue.front();
+            queue.pop_front();
+            lk.unlock();
+            const ssize_t got = pread(fd, p.buffer, p.length, (off_t) p.offset);
+            lk.lock();
+            done.push_back(Completion{p.tag, got < 0 ? 0u : (uint32_t) got, got >= 0});
+            cv_done.notify_all();
+        }
+    }
+
+    void stop_pool() {
+        {
+            std::lock_guard<std::mutex> lk(mu);
+            stop = true;
+        }
+        cv_work.notify_all();
+        for (std::thread& t : pool) t.join();
+        pool.clear();
+        stop = false;
+    }
+};
+
+DirectFile::DirectFile() : impl_(new Impl) {}
+DirectFile::~DirectFile() { close(); delete impl_; }
+
+bool DirectFile::open(const std::string& path, std::string& err) {
+    close();
+    impl_->fd = ::open(path.c_str(), O_RDONLY | O_DIRECT);
+    if (impl_->fd < 0) { err = "DirectFile: cannot open " + path; return false; }
+    struct stat st;
+    if (fstat(impl_->fd, &st) != 0) { err = "DirectFile: cannot size " + path; close(); return false; }
+    impl_->size = (uint64_t) st.st_size;
+    // SYCL port (the B70 box, 2026-09-30): the PLE rows of a 2,184-token prompt are ~27k random 4 KB O_DIRECT reads; with
+    // 16 threads they took 466 ms (p50 1.0 ms per read), with 64 332 ms (0.7 ms) - the drive wants a deeper queue than
+    // 16 blocking threads give it. STRATA_IO_THREADS still overrides.
+    const int n = io_threads(64);
+    for (int i = 0; i < n; ++i) impl_->pool.emplace_back([this] { impl_->worker(); });
+    return true;
+}
+
+void DirectFile::close() {
+    impl_->stop_pool();
+    if (impl_->fd >= 0) ::close(impl_->fd);
+    impl_->fd = -1;
+    impl_->size = 0;
+    impl_->done.clear();
+    impl_->queue.clear();
+}
+
+bool DirectFile::is_open() const { return impl_->fd >= 0; }
+uint64_t DirectFile::size() const { return impl_->size; }
+
+bool DirectFile::submit(uint64_t offset, void* buffer, uint32_t length, uint64_t tag, std::string& err) {
+    if (offset % alignment() || length % alignment() || ((uintptr_t) buffer) % alignment() || length == 0) {
+        err = "DirectFile: unaligned request";
+        return false;
+    }
+    {
+        std::lock_guard<std::mutex> lk(impl_->mu);
+        impl_->queue.push_back(Pending{offset, buffer, length, tag});
+    }
+    impl_->cv_work.notify_one();
+    return true;
+}
+
+void DirectFile::wake() {
+    std::lock_guard<std::mutex> lk(impl_->mu);
+    impl_->done.push_back(Completion{WAKE_TAG, 0, true});
+    impl_->cv_done.notify_all();
+}
+
+int DirectFile::wait(Completion* out, int max, int timeout_ms) {
+    std::unique_lock<std::mutex> lk(impl_->mu);
+    if (impl_->done.empty() && timeout_ms != 0) {
+        auto ready = [&] { return !impl_->done.empty(); };
+        if (timeout_ms < 0) impl_->cv_done.wait(lk, ready);
+        else impl_->cv_done.wait_for(lk, std::chrono::milliseconds(timeout_ms), ready);
+    }
+    int n = 0;
+    while (n < max && !impl_->done.empty()) {
+        out[n++] = impl_->done.front();
+        impl_->done.pop_front();
+    }
+    return n;
+}
+#endif
+
+}  // namespace strata::platform
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index b5e4f5862b5..f7e43059cab 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -1105,8 +1105,16 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                            (ss.ple.w.key_bf16 != nullptr || ss.ple.w.key_native_data != nullptr) &&
                            m.region_bytes / ((uint64_t) (3 * strata::kernels::NG_HC_DIM + N + 4) * 4 + (uint64_t) N * 2 + 4096) >= 64;
     const int32_t prev0[2] = {prev[0], prev[1]};
-    auto ple_gather = [&m, &ss, tokens, n, prev0](int64_t c0, int buf, std::string& e) -> bool {
-        const int64_t T = std::min(m.T, n - c0);
+    // SYCL port: a short first chunk so the GPU starts while the rest of the prompt's PLE rows are still being read
+    // (27k random 4 KB reads per 2k tokens, 330 ms at the drive's ~85k IOPS, otherwise all before the first kernel).
+    // STRATA_PREFILL_FIRST=<tokens> (0: off), default 256 when the prompt is longer than twice that.
+    static const int64_t first_chunk = [] { const char* v = std::getenv("STRATA_PREFILL_FIRST"); return v ? std::atoll(v) : 256; }();
+    auto chunk_len = [&](int64_t c0) {
+        if (c0 == 0 && first_chunk > 0 && first_chunk < m.T && n > 2 * first_chunk) return first_chunk;
+        return std::min(m.T, n - c0);
+    };
+    auto ple_gather = [&m, &ss, tokens, n, prev0, &chunk_len](int64_t c0, int buf, std::string& e) -> bool {
+        const int64_t T = chunk_len(c0);
         auto at = [&](int64_t i) { return i < 2 ? prev0[i] : (int32_t) tokens[i - 2]; };   // prev0, then the tokens
         int32_t pv[2] = {at(c0), at(c0 + 1)};
         for (int64_t t = 0; t < T; ++t) {
@@ -1122,10 +1130,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
     std::future<bool> ple_next;             // declared after everything it reads: an early return waits for it
     int ple_buf = 0;
 
-    for (int64_t c0 = 0; c0 < n; c0 += m.T) {
+    for (int64_t c0 = 0; c0 < n; c0 += chunk_len(c0)) {
         if (should_stop && should_stop()) { err = "cancelled"; return false; }
         if (std::getenv("STRATA_TRACE")) { std::fprintf(stderr, "strata trace: prompt chunk %lld of %lld\n", (long long) c0, (long long) n); std::fflush(stderr); }
-        const int64_t T = std::min(m.T, n - c0), p0 = pos0 + c0;
+        const int64_t T = chunk_len(c0), p0 = pos0 + c0;
         ++stats_.chunks;
         pt.mark(kPfStart, cs);
         const auto tsetup = Clock::now();
@@ -1229,11 +1237,11 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             */
             m.cs->memcpy(m.ple_emb, m.ple_emb_host[ple_buf], (size_t)T * N * 4);
             dpct::sync_barrier(m.ple_copied[ple_buf], m.cs);
-            if (c0 + m.T < n) {
+            if (c0 + T < n) {
                 m.ple_copied[ple_buf ^ 1]
                     ->wait_and_throw(); // the other buffer's upload (a chunk
                                         // ago) is done
-                ple_next = std::async(std::launch::async, [&ple_gather, &ple_next_err, c1 = c0 + m.T, b = ple_buf ^ 1] {
+                ple_next = std::async(std::launch::async, [&ple_gather, &ple_next_err, c1 = c0 + T, b = ple_buf ^ 1] {
                     return ple_gather(c1, b, ple_next_err);
                 });
             }

From 66699fb2a688a8f0cbacb669fbf9626991cacf63 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 09:12:52 -0500
Subject: [PATCH 025/201] docs: INTEL.md - the 80,000-token prompt: the VRAM
 plan trap, expert streaming per chunk, where the 77 s go

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 5193d7b0c69..640ccc23dcd 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -261,6 +261,27 @@ A trap worth knowing: with a native pack `--prefill-until N` does not feed the r
 token loop (it is skipped for native packs), so the tokens after N are dropped and the model free-runs. Compare
 output tokens between paths, never only timings.
 
+**An 80,000-token prompt (2026-09-30).** Where the time goes changes completely at this scale, and the first
+attempt did not finish at all:
+
+- **The VRAM plan.** `--expert-cache auto` fills the card down to `--vram-reserve-mib` *before* the KV state
+  (about 1 GB in INT8 at 81,920 cells) and the prompt chunk buffers (about 2 GB at `--prefill 8192`) exist. With
+  the 1,536 MiB default that put 30.95 of the B70's 32.6 GB in use, the driver started migrating buffers, the GPU
+  read 100% busy at 2,800 MHz with nothing finishing, and the rig's watchdog killed the run after 25 minutes
+  (one copy-engine reset, the GT recovered by itself). For long contexts pass a reserve that covers both:
+  `--max-context 81920 --kv int8 --vram-reserve-mib 3072 --prefill 4096` peaks at 28.8 GB. Until the auto
+  formula accounts for them itself, watch `vram_used_mb` on such runs. (80k ids also exceed Linux's 128 KB
+  single-argument limit: `--tokens-file`.)
+- **Expert streaming decides the speed.** The reserve costs cache slots (10,348 of 12,288 at 3 GB), and the
+  prompt path streams every non-resident expert from the GGUF *once per chunk*. 2,048-token chunks: 40 chunks,
+  62,942 blob reads (~125 GB), 278 s = 288 tok/s, the GPU idle 75% of the time. 4,096-token chunks: 21 chunks,
+  37,678 reads, **77 s = 1,037 tok/s**, close to the 8k-token rate. The bigger chunk costs 0.5 GB more VRAM; the
+  host copy threads (`STRATA_STAGER_THREADS`, default 4) are being measured next.
+- **Compute at 80k** (of the 77 s): attention 14.0 s, QSA block selection 9.9 s (it was 0.2 s at 8k: it scans
+  every block of the context per query), GDN recurrence 6.1 s, the streaming's remaining wait 17 s + 5.6 s, the
+  per-layer grouping sync 4.9 s, GEMMs 4.6 s, dequant 1.4 s. The PLE rows are no longer a cost: 1.28 M row
+  lookups with a 97.6% row-cache hit rate, 90 ms.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):

From 51a924947c56f4738a85f9d4a1e1a2fec00ae80a Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 09:15:09 -0500
Subject: [PATCH 026/201] docs: INTEL.md - 80k tokens at 1,065 tok/s with 12
 staging threads; the SSD is the floor of the streamed experts

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 640ccc23dcd..2563426a78f 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -275,11 +275,13 @@ attempt did not finish at all:
 - **Expert streaming decides the speed.** The reserve costs cache slots (10,348 of 12,288 at 3 GB), and the
   prompt path streams every non-resident expert from the GGUF *once per chunk*. 2,048-token chunks: 40 chunks,
   62,942 blob reads (~125 GB), 278 s = 288 tok/s, the GPU idle 75% of the time. 4,096-token chunks: 21 chunks,
-  37,678 reads, **77 s = 1,037 tok/s**, close to the 8k-token rate. The bigger chunk costs 0.5 GB more VRAM; the
-  host copy threads (`STRATA_STAGER_THREADS`, default 4) are being measured next.
-- **Compute at 80k** (of the 77 s): attention 14.0 s, QSA block selection 9.9 s (it was 0.2 s at 8k: it scans
-  every block of the context per query), GDN recurrence 6.1 s, the streaming's remaining wait 17 s + 5.6 s, the
-  per-layer grouping sync 4.9 s, GEMMs 4.6 s, dequant 1.4 s. The PLE rows are no longer a cost: 1.28 M row
+  37,678 reads, **77 s = 1,037 tok/s**, close to the 8k-token rate. The bigger chunk costs 0.5 GB more VRAM.
+  Twelve host copy threads instead of the default four (`STRATA_STAGER_THREADS`) take it to 75 s (1,065
+  tok/s): they empty the copy wait (5.6 s to 0.05 s) but the 52 s of host staging is the SSD delivering
+  ~70 GB of blobs, and 16 s of chunk setup remains where the GPU waits for each chunk's stream plan.
+- **Compute at 80k** (of the 75 s): attention 13.9 s, QSA block selection 9.9 s (it was 0.2 s at 8k: it scans
+  every block of the context per query), GDN recurrence 6.1 s, the chunk setup wait 16 s, the per-layer
+  grouping sync 4.6 s, GEMMs 4.6 s, dequant 1.4 s. The PLE rows are no longer a cost: 1.28 M row
   lookups with a 97.6% row-cache hit rate, 90 ms.
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind

From e3e97c90cf94426d2bb4d756894e0cbd2aa1e52b Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 14:07:02 -0500
Subject: [PATCH 027/201] sycl: refresh for upstream 0.1.28-0.1.29, fix the
 streamed-expert prompt path (stale ring pointers, stream-all hang)

- Re-migration merge of upstream a790805..d6708a4 (GDN recurrence pipelining, block scores read once per window,
  the GPU-wide sampler, the draft head's VRAM reserve, correctness fixes); verify.cpp/mtp.cpp ported by hand; two
  new fixups (a cudaStream_t cast in the sampler, a const sycl::free in native_head). Parity unchanged (19 of 21).
  B70: 2,184-token prompt 765 -> 792 tok/s, decode at that context 43.1 -> 45.2 tok/s, outputs identical.
- The prompt path's stream plan kept GgufExpertSource::blob() pointers for ~1,900 experts per chunk against a
  512-slot ring, so blobs were overwritten before they were copied (the first 80k measurement was partly wrong
  experts). The stager threads now read (layer, expert) themselves via GgufExpertSource::read_into.
- The stream-all walk hangs in its first large chunk on this card (copy engine stuck on a barrier, any ring size,
  either issuer; the old read path too). The port defaults to the per-layer routed-only walk (upstream cf0d12c's
  STRATA_PREFILL_RING=8, included); STRATA_PREFILL_STREAM_ALL=1 restores it for debugging.
- The PLE reader copy keeps its 64-deep queue. 80,000 tokens now complete: 101 s = 790 tok/s.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  37 +-
 .../strata/core/gguf_expert_source.hpp        |   4 +
 sycl/include/strata/core/mtp.hpp              |   3 +
 sycl/include/strata/kernels/bf16_bits.hpp     |   7 +
 sycl/src/core/expert_source.cpp               |  20 +-
 sycl/src/core/gguf_expert_source.cpp          |  21 +
 sycl/src/core/mtp.cpp                         |  13 +
 sycl/src/core/native_head.cpp                 |  52 +-
 sycl/src/core/verify.cpp                      |   3 +-
 sycl/src/kernels/cuda/dequant_bf16.dp.cpp     |   5 +-
 sycl/src/kernels/cuda/kv_stream.dp.cpp        |  14 +-
 sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp  |  35 +-
 sycl/src/kernels/cuda/qsa_select.dp.cpp       | 127 ++-
 .../src/kernels/cuda/s2_expert_grouped.dp.cpp |  46 +-
 sycl/src/kernels/cuda/s_gemv.dp.cpp           |  38 +-
 sycl/src/kernels/cuda/sampler.dp.cpp          | 751 +++++++++++++++++-
 sycl/src/kernels/elementwise_parity.cpp       |  94 +++
 sycl/src/kernels/s_gemv_q8k_parity.cpp        | 179 +++++
 sycl/src/kernels/sampler_parity.cpp           | 528 +++++++++++-
 sycl/src/prefill/kernels.dp.cpp               | 206 ++++-
 sycl/src/prefill/prefill.cpp                  |  41 +-
 sycl/src/program/generate.cpp                 |  87 +-
 sycl/tools/fixups.py                          |   6 +
 23 files changed, 2165 insertions(+), 152 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 2563426a78f..bf4c1dbaffd 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -236,6 +236,7 @@ same prompts as above (outputs identical before and after each change):
 |---|---|
 | every window graph and the drafter's graphs captured at load (`STRATA_WARM_GRAPHS=0`: as before) | the first request no longer pays 250-290 ms of captures |
 | the commit graph left running while the drafter's round runs on its own queue (`Verifier::commit(wait=false)` + `commit_finish`) | decode 38.3 -> 43.0 tok/s at the 2,184-token context, 46.5 -> 49.8 short |
+| upstream 0.1.29 merged (GDN recurrence pipelining, the block-scores read, sampler) | 2,184-token prompt 765 -> 792 tok/s, decode at that context 43.1 -> 45.2 |
 | the draft layer's batched prompt pass takes prompts under 64 rows (it fell back to per-6-token graphs) | its prompt cost on 19 tokens 106 -> 16 ms |
 | one device module per kernel (`-fsycl-device-code-split=per_kernel`) | the first launch in the prompt path (the embedding gather) 245 -> 1 ms |
 | the expert dequant writes each thread's run of FP16 values as one vector store (it wrote them one 2-byte store at a time) | dequant per expert 0.085 -> 0.030 ms; prompt 496 -> 575 tok/s at 2,184 tokens, 720 -> 841 at 8,000 |
@@ -261,28 +262,26 @@ A trap worth knowing: with a native pack `--prefill-until N` does not feed the r
 token loop (it is skipped for native packs), so the tokens after N are dropped and the model free-runs. Compare
 output tokens between paths, never only timings.
 
-**An 80,000-token prompt (2026-09-30).** Where the time goes changes completely at this scale, and the first
-attempt did not finish at all:
+**An 80,000-token prompt (2026-09-30).** Where the time goes changes completely at this scale:
 
 - **The VRAM plan.** `--expert-cache auto` fills the card down to `--vram-reserve-mib` *before* the KV state
   (about 1 GB in INT8 at 81,920 cells) and the prompt chunk buffers (about 2 GB at `--prefill 8192`) exist. With
-  the 1,536 MiB default that put 30.95 of the B70's 32.6 GB in use, the driver started migrating buffers, the GPU
-  read 100% busy at 2,800 MHz with nothing finishing, and the rig's watchdog killed the run after 25 minutes
-  (one copy-engine reset, the GT recovered by itself). For long contexts pass a reserve that covers both:
-  `--max-context 81920 --kv int8 --vram-reserve-mib 3072 --prefill 4096` peaks at 28.8 GB. Until the auto
-  formula accounts for them itself, watch `vram_used_mb` on such runs. (80k ids also exceed Linux's 128 KB
-  single-argument limit: `--tokens-file`.)
-- **Expert streaming decides the speed.** The reserve costs cache slots (10,348 of 12,288 at 3 GB), and the
-  prompt path streams every non-resident expert from the GGUF *once per chunk*. 2,048-token chunks: 40 chunks,
-  62,942 blob reads (~125 GB), 278 s = 288 tok/s, the GPU idle 75% of the time. 4,096-token chunks: 21 chunks,
-  37,678 reads, **77 s = 1,037 tok/s**, close to the 8k-token rate. The bigger chunk costs 0.5 GB more VRAM.
-  Twelve host copy threads instead of the default four (`STRATA_STAGER_THREADS`) take it to 75 s (1,065
-  tok/s): they empty the copy wait (5.6 s to 0.05 s) but the 52 s of host staging is the SSD delivering
-  ~70 GB of blobs, and 16 s of chunk setup remains where the GPU waits for each chunk's stream plan.
-- **Compute at 80k** (of the 75 s): attention 13.9 s, QSA block selection 9.9 s (it was 0.2 s at 8k: it scans
-  every block of the context per query), GDN recurrence 6.1 s, the chunk setup wait 16 s, the per-layer
-  grouping sync 4.6 s, GEMMs 4.6 s, dequant 1.4 s. The PLE rows are no longer a cost: 1.28 M row
-  lookups with a 97.6% row-cache hit rate, 90 ms.
+  the 1,536 MiB default that put 30.95 of the B70's 32.6 GB in use, the driver started migrating buffers and the
+  run never finished. `--max-context 81920 --kv int8 --vram-reserve-mib 3072 --prefill 4096` peaks at 28.8 GB.
+  (80k ids also exceed Linux's 128 KB single-argument limit: `--tokens-file`.)
+- **Streamed experts.** The reserve costs cache slots (10,348 of 12,288 at 3 GB), and the prompt path streams the
+  missing experts from the GGUF for every chunk. Two port bugs sat on this path and are fixed: the stream plan
+  held `GgufExpertSource::blob()` pointers across ~1,900 reads of a 512-slot ring (so blobs were overwritten
+  before they were copied: the 75 s / 1,065 tok/s measured first was computed partly with the wrong experts), and
+  the stream-all walk hangs on this card in its first large chunk (the copy engine stops on a barrier). The stager
+  threads now read the blobs themselves, and the port uses the per-layer routed-only walk (`STRATA_PREFILL_RING=8`
+  upstream, the port's default; `STRATA_PREFILL_STREAM_ALL=1` restores the other for debugging).
+- **Correct result: 80,000 tokens in 101 s = 790 tok/s.** GPU time: expert down GEMM 26.0 s, attention 15.4 s,
+  dequant 12.7 s, QSA block selection 9.3 s (0.2 s at 8k: it scans every block of the context per query), gate/up
+  GEMM 8.9 s, gather 6.1 s, the per-layer grouping sync 5.2 s, GDN recurrence 4.8 s. The PLE rows are free at this
+  scale (97.6% row-cache hits).
+- **Open: decode after such a prompt runs at 2-3 tok/s**, because the experts the reserve pushed out of the cache
+  stay out; the prompt buffers should give their VRAM back to the cache when the prompt ends.
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
diff --git a/sycl/include/strata/core/gguf_expert_source.hpp b/sycl/include/strata/core/gguf_expert_source.hpp
index b5c4df43030..1e88fcb90d7 100644
--- a/sycl/include/strata/core/gguf_expert_source.hpp
+++ b/sycl/include/strata/core/gguf_expert_source.hpp
@@ -35,6 +35,10 @@ class GgufExpertSource : public ExpertSource {
     void close();
 
     const uint8_t* blob(int64_t layer, int64_t expert) override;
+    /// The blob gathered straight into `dst` (bytes = the layer's blob size), from any thread: no ring slot, so the
+    /// prompt path's stager threads read the streamed experts themselves instead of holding ring pointers that a
+    /// later blob() call overwrites (the 80k-token run of 2026-09-30 streamed ~1,900 blobs per chunk through 512 slots).
+    bool read_into(int64_t layer, int64_t expert, uint8_t* dst, size_t bytes) const;
     int64_t reads() const override { return reads_; }
 
 private:
diff --git a/sycl/include/strata/core/mtp.hpp b/sycl/include/strata/core/mtp.hpp
index 1426a610a74..cfd2896c1a5 100644
--- a/sycl/include/strata/core/mtp.hpp
+++ b/sycl/include/strata/core/mtp.hpp
@@ -62,6 +62,9 @@ class MtpDrafter {
     /// KV streaming: refill the ring of the drafter's window from its host copy for a sequence that continues at
     /// `upto` (a conversation-cache resume). No-op unless the drafter's K/V is a ring.
     void kv_restore(int64_t upto);
+    /// The VRAM bind() will allocate for a native head of `head_row_bytes` per vocabulary row: the draft logits and
+    /// the draft head over rt/draft_vocab.bin's subset.  The expert cache is sized before bind(), so it reserves this.
+    uint64_t bind_bytes(uint64_t head_row_bytes, int64_t n_vocab) const;
     /// The main model's embedding and head, and the verify window's final residuals (T rows, hc*n_embd each).
     bool bind(const WeightTable& wt, const NativeHead* head, const float* window_R, std::string& err);
 
diff --git a/sycl/include/strata/kernels/bf16_bits.hpp b/sycl/include/strata/kernels/bf16_bits.hpp
index a315a8343f4..84fe011b0bd 100644
--- a/sycl/include/strata/kernels/bf16_bits.hpp
+++ b/sycl/include/strata/kernels/bf16_bits.hpp
@@ -31,6 +31,12 @@
 namespace strata::kernels {
 
 /// Round-to-nearest-even f32 -> bf16, returned as raw bits in the LOW half of the uint16.
+///
+/// **A NaN IS PASSED THROUGH, QUIETED, AS `ggml_compute_fp32_to_bf16` DOES.**  The rounding add alone
+/// carries out of the mantissa for a NaN: 0x7FFFFFFF became 0x8000 (-0) and 0x7F800001 became 0x7F80 (+inf), so
+/// a NaN upstream was masked instead of propagated.  The test is on the magnitude bits, the result keeps the
+/// sign and the top mantissa bits and sets the quiet bit (64 = bit 6 of the bf16).  Every non-NaN input,
+/// infinities included, rounds exactly as before.
 STRATA_BF16_HD inline uint16_t bf16_from_f32(float f) {
     uint32_t i;
 #if defined(__HIP_DEVICE_COMPILE__)
@@ -38,6 +44,7 @@ STRATA_BF16_HD inline uint16_t bf16_from_f32(float f) {
 #else
     std::memcpy(&i, &f, 4);
 #endif
+    if ((i & 0x7FFFFFFFu) > 0x7F800000u) return (uint16_t) ((i >> 16) | 64u);
     i = (i + ((i >> 16) & 1u) + 0x7FFFu) & 0xFFFF0000u;
     return (uint16_t) (i >> 16);
 }
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index c617370249c..c2886a1540f 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -836,6 +836,14 @@ void expert_pool_dispatch(void* user, const float* x_f, const int32_t* ids, cons
     d.experts += k;
 }
 
+namespace {
+// the verify window's per-entry tables in `expert_pool_dispatch_multi` (`kind`, `distinct`, `first_of`)
+// are fixed arrays of this many entries: MAXT tokens of the model's 10 routed experts must fit, and a larger k is
+// refused at run time rather than written past them.
+constexpr int64_t kMaxWindowEntries = 128;
+static_assert(strata::kernels::cpu::MAXT * 10 <= kMaxWindowEntries, "a verify window's entries overflow the tables");
+}  // namespace
+
 void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k,
                                 float* out) {
     using namespace strata::kernels::cpu;
@@ -846,6 +854,12 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         d.fail_layer = d.layers;
         return;
     }
+    if (k < 1 || n_tok * k > kMaxWindowEntries) {
+        d.failed = true;
+        d.fail = "a verify window routes more entries than the expert pool's window tables hold";
+        d.fail_layer = d.layers;
+        return;
+    }
     if ((int64_t) d.act_multi.size() < n_tok) d.act_multi.resize((size_t) MAXT);
     const ExpertLayout& lay = expert_layout();
     const bool native = lay.native;
@@ -866,9 +880,9 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
     // ---- plan v0.3 P6: the GPU's share, decided and published FIRST so the GPU starts while the CPU works.
     // Distinct experts in routing order; resident ones and the last pcie_num/256 of the missed ones go to the GPU.
     const int64_t n = n_tok * k;
-    int32_t kind[128];                     // per entry: -1 CPU, 0 VRAM, 1 PCIe
-    if (d.plan != nullptr && n <= 128 && n <= d.plan->cap) {
-        int64_t distinct[128], first_of[128];
+    int32_t kind[kMaxWindowEntries];       // per entry: -1 CPU, 0 VRAM, 1 PCIe
+    if (d.plan != nullptr && n <= kMaxWindowEntries && n <= d.plan->cap) {
+        int64_t distinct[kMaxWindowEntries], first_of[kMaxWindowEntries];
         int nd = 0, nmiss = 0;
         for (int64_t i = 0; i < n; ++i) {
             first_of[i] = i;
diff --git a/sycl/src/core/gguf_expert_source.cpp b/sycl/src/core/gguf_expert_source.cpp
index c6cb56b9946..99c34dcf396 100644
--- a/sycl/src/core/gguf_expert_source.cpp
+++ b/sycl/src/core/gguf_expert_source.cpp
@@ -97,4 +97,25 @@ const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     return buf.data();
 }
 
+bool GgufExpertSource::read_into(int64_t layer, int64_t expert, uint8_t* dst, size_t bytes) const {
+    if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_ || dst == nullptr) return false;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const auto& fm = lay.fmt[(size_t) layer];
+    const uint64_t blob = lay.bytes[(size_t) layer];
+    if (bytes < blob) return false;
+    const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
+    const uint64_t at[3] = {0, fm.up_off, fm.down_off};
+    const int fd = fds_[(size_t) layer_fd_[(size_t) layer]];
+    for (int r = 0; r < 3; ++r) {
+        const uint64_t src = lay.gguf_off[(size_t) (3 * layer + r)] + per[r] * (uint64_t) expert;
+        uint64_t done = 0;
+        while (done < per[r]) {
+            const ssize_t n = ::pread(fd, dst + at[r] + done, (size_t) (per[r] - done), (off_t) (src + done));
+            if (n <= 0) return false;
+            done += (uint64_t) n;
+        }
+    }
+    return true;
+}
+
 }  // namespace strata::core
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index 6f0f9eee784..bdd56dea406 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -374,6 +374,19 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+uint64_t MtpDrafter::bind_bytes(uint64_t head_row_bytes, int64_t n_vocab) const {
+    uint64_t bytes = head_logits_ ? 0 : (uint64_t) max_t_ * (uint64_t) n_vocab * sizeof(float);
+    if (dhead_ == nullptr) {
+        if (FILE* f = std::fopen((rt_dir_ + "/draft_vocab.bin").c_str(), "rb")) {
+            std::fseek(f, 0, SEEK_END);
+            const long size = std::ftell(f);
+            std::fclose(f);
+            if (size >= 4 && size % 4 == 0) bytes += (uint64_t) (size / 4) * head_row_bytes + (uint64_t) size;
+        }
+    }
+    return bytes;
+}
+
 bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
                       const float *window_R, std::string &err) try {
     const OnDevice on_device(device_);
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
index a3924b65c99..d03f972c91e 100644
--- a/sycl/src/core/native_head.cpp
+++ b/sycl/src/core/native_head.cpp
@@ -7,6 +7,7 @@
 #include "strata/kernels/native_mmvq.hpp"
 
 #include <climits>
+#include <cstdio>
 #include <cstring>
 #include <exception>
 
@@ -155,6 +156,8 @@ const NativeEmbed* native_embed() { return g_embed; }
 
 NativeEmbed::~NativeEmbed() {
     if (host_) sycl::free(host_, dpct::get_in_order_queue());
+    else if (dev_)
+        sycl::free((void *) dev_, dpct::get_in_order_queue()); // the VRAM fallback below
 }
 
 bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
@@ -184,17 +187,48 @@ bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
         */
         if (DPCT_CHECK_ERROR(host_ = (void *)sycl::malloc_host(
                                  bytes_, dpct::get_in_order_queue())) != 0) {
+            // Under WSL2 the driver's pinned/mapped host budget (~1 GiB) can be spent by the GPU contexts
+            // themselves (three cards). The table is only gathered from, so keep it in the current device's VRAM
+            // instead: it costs its size there and reads faster than over PCIe.
+            /*
+            DPCT1026: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
             host_ = nullptr;
-            err = "native embedding: cannot pin " + std::to_string(bytes_ >> 20) + " MiB";
-            return false;
-        }
-        std::memcpy(host_, gguf.tensor_data(*t), bytes_);
-        void* d = nullptr;
-        if (DPCT_CHECK_ERROR(d = (void *)host_) != 0) {
-            err = "native embedding: no device alias for the mapped table";
-            return false;
+            void* d = nullptr;
+            if (DPCT_CHECK_ERROR(d = (void *)sycl::malloc_device(
+                                     bytes_, dpct::get_in_order_queue())) !=
+                    0 ||
+                /*
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                    d, gguf.tensor_data(*t), bytes_).wait()) != 0) {
+                if (d) sycl::free(d, dpct::get_in_order_queue());
+                /*
+                DPCT1026: The call to cudaGetLastError was removed because
+                this functionality is redundant in SYCL.
+                */
+                err = "native embedding: cannot pin " +
+                      std::to_string(bytes_ >> 20) +
+                      " MiB, nor place it in VRAM";
+                return false;
+            }
+            std::fprintf(stderr, "strata: native embedding: cannot pin %llu MiB, kept in VRAM instead\n",
+                         (unsigned long long) (bytes_ >> 20));
+            dev_ = d;
+        } else {
+            std::memcpy(host_, gguf.tensor_data(*t), bytes_);
+            void* d = nullptr;
+            if (DPCT_CHECK_ERROR(d = (void *)host_) != 0) {
+                err = "native embedding: no device alias for the mapped table";
+                return false;
+            }
+            dev_ = d;
         }
-        dev_ = d;
         type_ = (int) t->type;
         n_embd_ = n_embd;
         n_vocab_ = n_vocab;
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 67805949979..78124c78d17 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -167,7 +167,8 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
         return false;
     }
     if (hits.d_res == nullptr || hits.cache_base == nullptr || hits.blob <= 0) {
-        err = "verify: needs the profile-filled VRAM expert tier (--expert-profile and --expert-cache)";
+        err = "verify: needs the profile-filled VRAM expert tier (--expert-profile and --expert-cache); with "
+              "--expert-cache auto, no VRAM was left for it: lower --max-context, use --kv k8v4 or images on the CPU";
         return false;
     }
     std::string why;
diff --git a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
index 14da1e84533..3f4e68a4ff0 100644
--- a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
+++ b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
@@ -22,6 +22,9 @@ __dpct_inline__ float h2f(const uint8_t *p) {
 }
 __dpct_inline__ uint16_t f2bf(float f) {
     uint32_t u = sycl::bit_cast<unsigned int>(f);
+    // a NaN (a NaN scale in the block) stays a quiet NaN, as in ggml_compute_fp32_to_bf16 and `bf16_from_f32`:
+    // the rounding add below would carry it into -0 or inf
+    if ((u & 0x7fffffffu) > 0x7f800000u) return (uint16_t) ((u >> 16) | 64u);
     u += 0x7fffu + ((u >> 16) & 1u);          // round to nearest even
     return (uint16_t) (u >> 16);
 }
@@ -226,7 +229,7 @@ void launch(int type, const void* blocks, int64_t row0, int64_t rows, int64_t co
             auto gpr_ct4 = gpr;                                                \
             auto out_ct5 = out;                                                \
                                                                                \
-            cgh.parallel_for<dpct_kernel_name<class dequant_kernel_c70bbf,     \
+            cgh.parallel_for<dpct_kernel_name<class dequant_kernel_ec9311,     \
                                               dpct_kernel_scalar<TY>, T>>(     \
                 sycl::nd_range<3>(sycl::range(1, 1, grid) *                    \
                                       sycl::range(1, 1, 256),                  \
diff --git a/sycl/src/kernels/cuda/kv_stream.dp.cpp b/sycl/src/kernels/cuda/kv_stream.dp.cpp
index d8118d42b88..c3cc23f0b9d 100644
--- a/sycl/src/kernels/cuda/kv_stream.dp.cpp
+++ b/sycl/src/kernels/cuda/kv_stream.dp.cpp
@@ -330,6 +330,14 @@ void kv_stream_resolve(const KvStreamMap& m, const QsaAttnPools& slots, const Kv
         std::fprintf(stderr, "kv_stream: a block's scale run must be a multiple of 16 bytes\n");
         std::exit(1);
     }
+    // one sweep step looks at RT consecutive slots `(hand + thread) % n_slots`; with fewer slots than RT two
+    // threads see the same slot and may both take it for two different misses.  The engine never streams with fewer
+    // than qsa_kv_resident_min() / page_size = 5,120 slots, so this is a guard, not a limit.
+    if (m.n_slots < RT) {
+        std::fprintf(stderr, "kv_stream: %lld slots is fewer than the resolve block (%d): the clock sweep would take a "
+                             "slot twice\n", (long long) m.n_slots, RT);
+        std::exit(1);
+    }
     /*
     DPCT1049: The work-group size passed to the SYCL kernel may exceed the
     limit. To get the device limit, query info::device::max_work_group_size.
@@ -340,7 +348,7 @@ void kv_stream_resolve(const KvStreamMap& m, const QsaAttnPools& slots, const Kv
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class resolve_kernel_d27792>>(
+            ->parallel_for<dpct_kernel_name<class resolve_kernel_148a81>>(
                 sycl::nd_range<3>(sycl::range(1, 1, RT), sycl::range(1, 1, RT)),
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
@@ -359,7 +367,7 @@ void kv_stream_resolve(const KvStreamMap& m, const QsaAttnPools& slots, const Kv
                 auto runs_of_slots_host_fmt_s_ct1 =
                     runs_of(slots, host, fmt, s);
 
-                cgh.parallel_for<dpct_kernel_name<class copy_kernel_e47935>>(
+                cgh.parallel_for<dpct_kernel_name<class copy_kernel_4bb253>>(
                     sycl::nd_range<3>(sycl::range(1, 1, 96) *
                                           sycl::range(1, 1, 128),
                                       sycl::range(1, 1, 128)),
@@ -377,7 +385,7 @@ void kv_ring_table(int32_t* page_table, int64_t n_blocks, int64_t n_slots, void*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class ring_kernel_728502>>(
+            ->parallel_for<dpct_kernel_name<class ring_kernel_f9df1d>>(
                 sycl::nd_range<3>(sycl::range(1, 1, 64) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
diff --git a/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
index 0caac0219a2..39981a32c8b 100644
--- a/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_decode_attn.dp.cpp
@@ -164,7 +164,9 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
         if (t < n_here) {
             const int cell = ids[c0 + t];
             const long long page = (long long) p.page_table[cell / page_size];
-            r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+            // a block the KV streaming could not make resident keeps page -1 (ctl[3]); its cells are masked
+            // (score -FLT_MAX, weight 0) instead of being read from before the pool.
+            if (page >= 0) r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
         }
         srow[t] = r;
     }
@@ -176,7 +178,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
     item_ct1.barrier();
     // scores: each warp takes cells warp, warp+8, ...; each lane holds 8 of the 256 dimensions.
     for (int c = warp; c < CHUNK; c += WARPS) {
-        if (c >= n_here) {
+        if (c >= n_here || srow[c] < 0) {
             if (lane < G) sp[lane][c] = -FLT_MAX;
             continue;
         }
@@ -205,8 +207,12 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
     for (int h = warp; h < G; h += WARPS) {
         const float a = sp[h][lane], b = sp[h][lane + 32];
         const float m = warp_max(sycl::fmax(a, b));
-        const float ea = (lane < n_here) ? sycl::native::exp(a - m) : 0.0f;
-        const float eb = (lane + 32 < n_here) ? sycl::native::exp(b - m) : 0.0f;
+        const float ea = (lane < n_here && srow[lane] >= 0)
+                             ? sycl::native::exp(a - m)
+                             : 0.0f;
+        const float eb = (lane + 32 < n_here && srow[lane + 32] >= 0)
+                             ? sycl::native::exp(b - m)
+                             : 0.0f;
         sp[h][lane] = ea;
         sp[h][lane + 32] = eb;
         const float l = warp_sum(ea + eb);
@@ -223,6 +229,7 @@ attn_chunk_kernel(const float *__restrict__ q, QsaAttnPools p,
 #pragma unroll
     for (int h = 0; h < G; ++h) acc[h] = 0.0f;
     for (int c = 0; c < n_here; ++c) {
+        if (srow[c] < 0) continue;   // masked above, weight 0
         float v;
         if constexpr (KV_MODE == 0) {
             v = sycl::vec<sycl::half, 1>(
@@ -317,7 +324,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_b8af5b,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_dfacfc,
                                           dpct_kernel_scalar<3>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -333,7 +340,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_dfacfc,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_b0d448,
                                           dpct_kernel_scalar<2>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -349,7 +356,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_b0d448,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_2ad0a4,
                                           dpct_kernel_scalar<1>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -364,7 +371,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_2ad0a4,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_5c04f7,
                                           dpct_kernel_scalar<0>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -379,7 +386,7 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_b5c617>>(
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_2cdaf7>>(
             sycl::nd_range<3>(
                 sycl::range(1, (unsigned)n_q, (unsigned)s.n_head) *
                     sycl::range(1, 1, HD),
@@ -430,7 +437,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_61a169,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f262e6,
                                           dpct_kernel_scalar<3>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -446,7 +453,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f262e6,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_4fd923,
                                           dpct_kernel_scalar<2>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -462,7 +469,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_4fd923,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f6855e,
                                           dpct_kernel_scalar<1>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -477,7 +484,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
             sycl::ext::oneapi::experimental::use_root_sync};
         dpct::has_capability_or_fail(st->get_device(), {sycl::aspect::fp16});
 
-        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_f6855e,
+        st->parallel_for<dpct_kernel_name<class attn_chunk_kernel_7c8e09,
                                           dpct_kernel_scalar<0>>>(
             sycl::nd_range<3>(grid * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
@@ -492,7 +499,7 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_a9568f>>(
+        st->parallel_for<dpct_kernel_name<class attn_merge_kernel_4bb902>>(
             sycl::nd_range<3>(sycl::range(1, 1, (unsigned)s.n_head) *
                                   sycl::range(1, 1, HD),
                               sycl::range(1, 1, HD)),
diff --git a/sycl/src/kernels/cuda/qsa_select.dp.cpp b/sycl/src/kernels/cuda/qsa_select.dp.cpp
index 91ef8f69502..9a195a20d4e 100644
--- a/sycl/src/kernels/cuda/qsa_select.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_select.dp.cpp
@@ -675,6 +675,89 @@ auto &hist =
     }
 }
 
+
+// Block scores with every key block read ONCE for all of a call's queries (block_scores_kernel's grid is
+// (max_blocks / 8) x nq: ~24,600 mostly-idle blocks per layer at a decode window, each key re-read per query).  A fixed
+// grid strides over the blocks; per (block, query) the same arithmetic in the same order as block_scores_kernel.
+// qsa_block_scores takes it for every call without an active-block count and at most MQ queries: the captured decode
+// window, the uncaptured decode, and prefill's pooled16 call.
+constexpr int MQ = 8;
+/*
+DPCT1110: The total declared local variable size in device function
+block_scores_multi_kernel exceeds 128 bytes and may cause high register
+pressure. Consult with your hardware vendor to find the total register size
+available and adjust the code, or use smaller sub-group size to avoid high
+register pressure.
+*/
+__dpct_inline__ void block_scores_multi_kernel(
+    const float *__restrict__ pooled, const float *__restrict__ dead,
+    const float *__restrict__ q_idx, const int32_t *__restrict__ steps, int nq,
+    int64_t max_blocks, float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &qs = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+    float[MQ * IDX_HEADS * IDX_DIM]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_nkv =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int64_t[MQ]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_nbid =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int64_t[MQ]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < nq * IDX_HEADS * IDX_DIM;
+         i += item_ct1.get_local_range(2)) qs[i] = q_idx[i];
+    if (item_ct1.get_local_id(2) < nq) {
+        s_nkv[item_ct1.get_local_id(2)] =
+            steps[item_ct1.get_local_id(2) * kStepCount + kStepNKv];
+        s_nbid[item_ct1.get_local_id(2)] =
+            steps[item_ct1.get_local_id(2) * kStepCount + kStepNBid];
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    int64_t top = 0;
+#pragma unroll
+    for (int q = 0; q < nq; ++q) top = s_nbid[q] > top ? s_nbid[q] : top;
+    const int lane = item_ct1.get_local_id(2) & 31;
+    const int64_t wstride = (int64_t)item_ct1.get_group_range(2) * SCORE_WARPS;
+    for (int64_t b = (int64_t)item_ct1.get_group(2) * SCORE_WARPS +
+                     (item_ct1.get_local_id(2) >> 5);
+         b <= top && b < max_blocks; b += wstride) {
+        const sycl::float4 kp = *reinterpret_cast<const sycl::float4 *>(
+            pooled + b * IDX_DIM + lane * 4);
+        const sycl::float4 kd =
+            *reinterpret_cast<const sycl::float4 *>(dead + lane * 4);
+        for (int qi = 0; qi < nq; ++qi) {
+            const int64_t n_bid = s_nbid[qi];
+            if (b > n_bid) continue;
+            const sycl::float4 k4 = (b == n_bid) ? kd : kp;
+            const float* q = qs + qi * IDX_HEADS * IDX_DIM + lane * 4;
+            float score = 0.0f;
+#pragma unroll
+            for (int h = 0; h < IDX_HEADS; ++h) {
+                const sycl::float4 q4 =
+                    *reinterpret_cast<const sycl::float4 *>(q + h * IDX_DIM);
+                float d = k4.x() * q4.x() + k4.y() * q4.y() + k4.z() * q4.z() +
+                          k4.w() * q4.w();
+#pragma unroll
+                /*
+                DPCT1108: '__shfl_xor_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                for (int o = 16; o > 0; o >>= 1) d +=
+                    dpct::experimental::permute_sub_group_by_xor(
+                        0xffffffffu,
+                        sycl::ext::oneapi::this_work_item::get_sub_group(), d,
+                        o);
+                score += d > 0.0f ? d : 0.0f;
+            }
+            if (lane == 0) {
+                if (b == n_bid && s_nkv[qi] % R != 0) score += 1e9f;
+                out[qi * max_blocks + b] = score;
+            }
+        }
+    }
+}
 }  // namespace
 
 void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx, const int32_t* steps, int64_t nq,
@@ -685,6 +768,40 @@ void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx
         std::exit(1);
     }
     // a block past a query's n_bid returns at once: the grid need only reach the batch's largest n_bid (C-1)
+    static const bool multi = [] { const char* v = std::getenv("STRATA_SCORES_MULTI"); return v == nullptr || std::atoi(v) != 0; }();
+    if (multi && nq <= MQ && active_blocks <= 0) {   // no active count: decode (captured or not) and prefill's pooled16
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class block_scores_multi_kernel_dea7d4>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, 256) *
+                                          sycl::range(1, 1, SCORE_WARPS * 32),
+                                      sycl::range(1, 1, SCORE_WARPS * 32)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            block_scores_multi_kernel(pooled, dead, q_idx,
+                                                      steps, (int)nq,
+                                                      max_blocks, scores);
+                        });
+        }
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        const dpct::err0 e = 0;
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+
+        return;
+    }
     const int64_t reach = active_blocks > 0 && active_blocks < max_blocks ? active_blocks : max_blocks;
     const dpct::dim3 grid((unsigned)((reach + SCORE_WARPS - 1) / SCORE_WARPS),
                           (unsigned)nq);
@@ -693,7 +810,7 @@ void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class block_scores_kernel_6f5935>>(
+            ->parallel_for<dpct_kernel_name<class block_scores_kernel_925c9d>>(
                 sycl::nd_range<3>(grid * sycl::range(1, 1, SCORE_WARPS * 32),
                                   sycl::range(1, 1, SCORE_WARPS * 32)),
                 exp_props,
@@ -788,7 +905,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
                     sycl::range(bytes), cgh);
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class block_scores_tc_kernel_f08b24>>(
+                    dpct_kernel_name<class block_scores_tc_kernel_bc5f07>>(
                     sycl::nd_range<3>(grid * sycl::range(1, 1, 128),
                                       sycl::range(1, 1, 128)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
@@ -806,7 +923,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class block_scores_tail_kernel_8303e7>>(
+                dpct_kernel_name<class block_scores_tail_kernel_70dfaa>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, 32),
                                   sycl::range(1, 1, 32)),
@@ -849,7 +966,7 @@ void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class block_topk_kernel_409264>>(
+            ->parallel_for<dpct_kernel_name<class block_topk_kernel_213104>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, TOPK_T),
                                   sycl::range(1, 1, TOPK_T)),
@@ -895,7 +1012,7 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class block_topk_reg_kernel_a867d1>>(
+                dpct_kernel_name<class block_topk_reg_kernel_652097>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, TK_T),
                                   sycl::range(1, 1, TK_T)),
diff --git a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
index 0098de164a9..5b76ff016fe 100644
--- a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
@@ -21,6 +21,7 @@
 #include "strata/kernels/s2_expert_grouped.hpp"
 
 #include "strata/kernels/quantize_act.hpp"
+#include "strata/kernels/verify_kernels.hpp"
 
 #include <cstdio>
 #include <cstdlib>
@@ -499,7 +500,7 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_feb5f7>>(
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_7c8537>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
                                       sycl::range(1, 1, THREADS),
                                   sycl::range(1, 1, THREADS)),
@@ -521,7 +522,7 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_6bd648>>(
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_30a435>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
                                       sycl::range(1, 1, THREADS),
                                   sycl::range(1, 1, THREADS)),
@@ -550,7 +551,7 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
                 const float *x_scales_nullptr_h_scales_nullptr_ct5 =
                     x_scales != nullptr ? h_scales : nullptr;
 
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_6b2ba9>>(
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_b856bc>>(
                     sycl::nd_range<3>(sycl::range(1, 1, blocks) *
                                           sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
@@ -666,7 +667,7 @@ void moe_hit_select(const int32_t* ids, const int32_t* res_row, int k, int n_exp
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class hit_select_kernel_62d6cd>>(
+            ->parallel_for<dpct_kernel_name<class hit_select_kernel_f87f42>>(
                 sycl::nd_range<3>(sycl::range(1, 1, 32), sycl::range(1, 1, 32)),
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
@@ -695,7 +696,7 @@ void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index,
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_fd0f96>>(
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_e0f313>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
                         sycl::range(1, 1, THREADS),
@@ -716,7 +717,7 @@ void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index,
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_40adf2>>(
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_e17ecb>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1,
                                 (unsigned)((pairs + THREADS - 1) / THREADS)) *
@@ -740,7 +741,7 @@ void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index,
                 const float *x_scales_nullptr_h_scales_nullptr_ct5 =
                     x_scales != nullptr ? h_scales : nullptr;
 
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_e2a4a9>>(
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_bd8167>>(
                     sycl::nd_range<3>(
                         sycl::range(1, 1,
                                     (unsigned)((rows + warps - 1) / warps)) *
@@ -769,7 +770,7 @@ void moe_hit_select_multi(const int32_t* ids, const int32_t* res_row, int n, int
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class hit_select_multi_kernel_a381b5>>(
+                dpct_kernel_name<class hit_select_multi_kernel_4749ea>>(
                 sycl::nd_range<3>(sycl::range(1, 1, 128),
                                   sycl::range(1, 1, 128)),
                 exp_props,
@@ -799,7 +800,7 @@ void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_inde
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_583c8a>>(
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_30a25d>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
                         sycl::range(1, 1, THREADS),
@@ -820,7 +821,7 @@ void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_inde
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_f4e4db>>(
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_3a6551>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1,
                                 (unsigned)((pairs + THREADS - 1) / THREADS)) *
@@ -844,7 +845,7 @@ void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_inde
                 const float *x_scales_nullptr_h_scales_nullptr_ct5 =
                     x_scales != nullptr ? h_scales : nullptr;
 
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_1ae146>>(
+                cgh.parallel_for<dpct_kernel_name<class down_kernel_a919b8>>(
                     sycl::nd_range<3>(
                         sycl::range(1, 1,
                                     (unsigned)((rows + warps - 1) / warps)) *
@@ -871,6 +872,9 @@ namespace {
 // hit kernel's.
 constexpr int GU_CHUNKS = (H / 32 + 31) / 32;   // 3: chunks of a gate/up row per lane (80 chunks / 32 lanes)
 constexpr int GMAX = 8;                          // entries per group (tokens routed to one expert in a window)
+// a group holds one entry per token of the window routed to its expert, and the kernels below keep at
+// most GMAX of them (`min(..., GMAX)`): a longer window would drop entries without a word.
+static_assert(GMAX >= kVerifyMaxT, "a verify window's group can exceed GMAX entries");
 constexpr int GU_ROWS = 32;                      // gate/up rows per block: 4 per warp
 constexpr int D_ROWS = 64;                       // down rows per block: 8 per warp
 
@@ -1094,7 +1098,7 @@ void moe_group_resident(const int32_t* ids, int n, int k_per_tok, const uint8_t*
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class group_resident_kernel_937b58>>(
+                dpct_kernel_name<class group_resident_kernel_5c38b8>>(
                 sycl::nd_range<3>(sycl::range(1, 1, 128),
                                   sycl::range(1, 1, 128)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) {
@@ -1121,7 +1125,7 @@ void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start,
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class gu_grouped_kernel_393d46>>(
+            cs->parallel_for<dpct_kernel_name<class gu_grouped_kernel_c9eb4d>>(
                 sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
                                               (unsigned)(2 * FF / GU_ROWS)) *
                                       sycl::range(1, 1, 256),
@@ -1142,7 +1146,7 @@ void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start,
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_2292bf>>(
+            cs->parallel_for<dpct_kernel_name<class swiglu_kernel_5018f2>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1,
                                 (unsigned)((pairs + THREADS - 1) / THREADS)) *
@@ -1166,7 +1170,7 @@ void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start,
                     x_scales != nullptr ? h_scales : nullptr;
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class down_grouped_kernel_f03334>>(
+                    dpct_kernel_name<class down_grouped_kernel_ea4417>>(
                     sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
                                                   (unsigned)(H / D_ROWS)) *
                                           sycl::range(1, 1, 256),
@@ -1195,7 +1199,7 @@ void moe_hit_add(float* parts, const float* hit_out, const int32_t* dst, const i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class add_hits_kernel_9d7642>>(
+            ->parallel_for<dpct_kernel_name<class add_hits_kernel_50cbcb>>(
                 sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) {
@@ -1234,7 +1238,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
             auto H_ct3 = H / 32;
 
             cgh.parallel_for<
-                dpct_kernel_name<class activation_correction_kernel_f8a161>>(
+                dpct_kernel_name<class activation_correction_kernel_ca15a9>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (H / 32 + THREADS - 1) / THREADS) *
                         sycl::range(1, 1, THREADS),
@@ -1251,7 +1255,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         cs->parallel_for<
-            dpct_kernel_name<class cpu_order_projection_kernel_ca15a9,
+            dpct_kernel_name<class cpu_order_projection_kernel_6ed29b,
                              dpct_kernel_scalar<false>>>(
             sycl::nd_range<3>(
                 sycl::range(1, 1,
@@ -1287,7 +1291,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
             auto int_n_hits_FF_ct1 = (int)n_hits * FF;
 
             cgh.parallel_for<
-                dpct_kernel_name<class cpu_order_swiglu_kernel_883f7b>>(
+                dpct_kernel_name<class cpu_order_swiglu_kernel_4d84ce>>(
                 sycl::nd_range<3>(
                     sycl::range(
                         1, 1,
@@ -1308,7 +1312,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
             auto int_n_hits_FF_ct4 = (int)n_hits * (FF / 32);
 
             cgh.parallel_for<
-                dpct_kernel_name<class cpu_order_quantize_kernel_813a16>>(
+                dpct_kernel_name<class cpu_order_quantize_kernel_7d1393>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1,
                                 (unsigned)((n_hits * (FF / 32) + THREADS - 1) /
@@ -1327,7 +1331,7 @@ void moe_hit_grouped_s2_cpu_order(const uint8_t *blob_base,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         cs->parallel_for<
-            dpct_kernel_name<class cpu_order_projection_kernel_7f4897,
+            dpct_kernel_name<class cpu_order_projection_kernel_c67875,
                              dpct_kernel_scalar<true>>>(
             sycl::nd_range<3>(
                 sycl::range(1, 1,
diff --git a/sycl/src/kernels/cuda/s_gemv.dp.cpp b/sycl/src/kernels/cuda/s_gemv.dp.cpp
index 64eb51317eb..98b4d00cf0d 100644
--- a/sycl/src/kernels/cuda/s_gemv.dp.cpp
+++ b/sycl/src/kernels/cuda/s_gemv.dp.cpp
@@ -175,17 +175,23 @@ __dpct_inline__ void s_gemv_q8_split_kernel(
     const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
     const long long o = (long long)item_ct1.get_group(2) * warps_per_block +
                         (item_ct1.get_local_id(2) >> 5);
-    if (o >= n_out) return;
     const int lane = item_ct1.get_local_id(2) & 31;
 
     // THE CODEBOOK, IN SHARED MEMORY.  16 bytes, loaded once per block by the first 16 threads, instead of a
     // divergent constant read per element - measured at 2.12x of this whole kernel (see the note on `kIq4Nl`).
+    //
+    // THE LOAD AND THE BARRIER COME BEFORE THE EARLY RETURN, as in `s_gemv_q8k_kernel`.  The return used to
+    // sit above them, so whenever `n_out % 8 != 0` the last block's surplus warps left before a barrier the
+    // others still waited at - undefined behaviour that every shape in the pack (a multiple of 8) happened to
+    // avoid.  `o` is per-WARP, so the return below keeps whole warps together and the shuffle reduction's
+    // full mask stays valid.
     auto &s_iq4nl =
         *sycl::ext::oneapi::group_local_memory_for_overwrite<signed char[16]>(
             sycl::ext::oneapi::this_work_item::get_work_group<3>());
     if (item_ct1.get_local_id(2) < 16) s_iq4nl[item_ct1.get_local_id(2)] =
         kIq4Nl[item_ct1.get_local_id(2)];
     item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (o >= n_out) return;
 
     const long long n_groups = n_in >> group_shift;
     const long long codes_per_row = n_in / PER_BYTE;
@@ -416,7 +422,7 @@ void s_gemv(const uint16_t *x, const uint8_t *codes, const float *scales,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         dpct::get_in_order_queue()
-            .parallel_for<dpct_kernel_name<class s_gemv_kernel_2c435c,
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_4f63f9,
                                            dpct_kernel_scalar<2>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
                                       sycl::range(1, 1, threads),
@@ -432,7 +438,7 @@ void s_gemv(const uint16_t *x, const uint8_t *codes, const float *scales,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         dpct::get_in_order_queue()
-            .parallel_for<dpct_kernel_name<class s_gemv_kernel_1b4b21,
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_9c529a,
                                            dpct_kernel_scalar<4>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
                                       sycl::range(1, 1, threads),
@@ -448,7 +454,7 @@ void s_gemv(const uint16_t *x, const uint8_t *codes, const float *scales,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         dpct::get_in_order_queue()
-            .parallel_for<dpct_kernel_name<class s_gemv_kernel_c5017e,
+            .parallel_for<dpct_kernel_name<class s_gemv_kernel_e40e1f,
                                            dpct_kernel_scalar<8>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)blocks) *
                                       sycl::range(1, 1, threads),
@@ -656,7 +662,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
                     sycl::range(smem), cgh);
 
                 cgh.parallel_for<dpct_kernel_name<
-                    class s_gemv_split_kernel_51319d, dpct_kernel_scalar<2>>>(
+                    class s_gemv_split_kernel_8538ef, dpct_kernel_scalar<2>>>(
                     sycl::nd_range<3>(sycl::range(1, 1, grid) *
                                           sycl::range(1, 1, threads_per_row),
                                       sycl::range(1, 1, threads_per_row)),
@@ -690,7 +696,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
                     sycl::range(smem), cgh);
 
                 cgh.parallel_for<dpct_kernel_name<
-                    class s_gemv_split_kernel_36431d, dpct_kernel_scalar<4>>>(
+                    class s_gemv_split_kernel_6cb7af, dpct_kernel_scalar<4>>>(
                     sycl::nd_range<3>(sycl::range(1, 1, grid) *
                                           sycl::range(1, 1, threads_per_row),
                                       sycl::range(1, 1, threads_per_row)),
@@ -724,7 +730,7 @@ static void s_gemv_split_impl(const uint16_t *x, const uint8_t *codes,
                     sycl::range(smem), cgh);
 
                 cgh.parallel_for<dpct_kernel_name<
-                    class s_gemv_split_kernel_377b5e, dpct_kernel_scalar<8>>>(
+                    class s_gemv_split_kernel_63886c, dpct_kernel_scalar<8>>>(
                     sycl::nd_range<3>(sycl::range(1, 1, grid) *
                                           sycl::range(1, 1, threads_per_row),
                                       sycl::range(1, 1, threads_per_row)),
@@ -822,7 +828,7 @@ void s_gemv_q8k(const uint8_t* x_q8k, const uint8_t* codes, const float* scales,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_6a05ad,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_9b1637,
                                             dpct_kernel_scalar<4>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
                                       sycl::range(1, 1, threads),
@@ -838,7 +844,7 @@ void s_gemv_q8k(const uint8_t* x_q8k, const uint8_t* codes, const float* scales,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_c8cb93,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8k_kernel_adeed5,
                                             dpct_kernel_scalar<8>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
                                       sycl::range(1, 1, threads),
@@ -889,7 +895,7 @@ void s_gemv_q8k_split(const uint8_t* x_q8k, const uint8_t* codes, const float* s
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_c3278e,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_19ad26,
                                             dpct_kernel_scalar<4>,
                                             dpct_kernel_scalar<true>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
@@ -908,7 +914,7 @@ void s_gemv_q8k_split(const uint8_t* x_q8k, const uint8_t* codes, const float* s
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_7d9a26,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_4da4f5,
                                             dpct_kernel_scalar<8>,
                                             dpct_kernel_scalar<true>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
@@ -946,8 +952,10 @@ void s_gemv_q8_0_split(const uint8_t* x_q8_0, const uint8_t* codes, const float*
                      form.group_elems);
         std::exit(1);
     }
-    if (form.group_elems % 4 != 0) {
-        std::fprintf(stderr, "s_gemv_q8_0_split: group_elems %d is not a multiple of 4\n", form.group_elems);
+    // SIXTEEN, NOT FOUR: a lane-iteration takes QE = 16 consecutive elements under ONE scale (see the kernel),
+    // so a group of 4 or 8 would read the wrong scale for most of them.  The Q8_K launcher already said 16.
+    if (form.group_elems % 16 != 0) {
+        std::fprintf(stderr, "s_gemv_q8_0_split: group_elems %d is not a multiple of 16\n", form.group_elems);
         std::exit(1);
     }
     int group_shift = 0;
@@ -964,7 +972,7 @@ void s_gemv_q8_0_split(const uint8_t* x_q8_0, const uint8_t* codes, const float*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_ee83d2,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_147ee4,
                                             dpct_kernel_scalar<4>,
                                             dpct_kernel_scalar<false>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
@@ -983,7 +991,7 @@ void s_gemv_q8_0_split(const uint8_t* x_q8_0, const uint8_t* codes, const float*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_47112d,
+            ->parallel_for<dpct_kernel_name<class s_gemv_q8_split_kernel_bac5c0,
                                             dpct_kernel_scalar<8>,
                                             dpct_kernel_scalar<false>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks) *
diff --git a/sycl/src/kernels/cuda/sampler.dp.cpp b/sycl/src/kernels/cuda/sampler.dp.cpp
index df94e4afa5a..e438ca877a9 100644
--- a/sycl/src/kernels/cuda/sampler.dp.cpp
+++ b/sycl/src/kernels/cuda/sampler.dp.cpp
@@ -10,9 +10,14 @@
 // produces a valid token, so only a comparison at the distribution level can tell them apart; the parity test
 // does that against an independently computed distribution.
 //
-// Both kernels put ONE BLOCK per token over the vocabulary: `sampler_greedy_kernel` is the plain argmax,
-// `sampler_kernel` runs the sampled chain as `top_k` block-argmax rounds followed by the top_p / temperature /
-// draw chain (its header says why the selection must be parallel and why the tie rule keeps the semantics).
+// `sampler_greedy_kernel` is the plain argmax, one block per token over the vocabulary.  The sampled chain has
+// three implementations that pick the same token, bit for bit:
+//   - the SPLIT top_k (default): `sampler_split_part_kernel` cuts each row into 4,096-logit blocks over the whole
+//     GPU, each keeps its own top_k, and `sampler_split_merge_kernel` merges those lists and runs the tail;
+//   - `sampler_one_block_kernel` (`STRATA_SAMPLER_ONE_BLOCK=1`, and the fallback when the split cannot run): one
+//     block per token, `top_k` block-argmax rounds, each over the logits after the previous pick;
+//   - `sampler_kernel` (`STRATA_OLD_SAMPLER=1`), the kernel of engine 0.1.20, kept as the reference.
+// The two new ones share `sampled_tail_warp` (top_p / min_p / temperature / draw on one warp).
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
@@ -22,6 +27,9 @@
 #include <cmath>
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
+#include <mutex>
+#include <vector>
 
 namespace strata::kernels {
 namespace {
@@ -226,6 +234,11 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
 /// serial scan's strict `>` keeps the first maximum it meets), so the kept sequence - both its set and its
 /// order - is unchanged; `top_p`'s cut reads that order in double arithmetic as before; temperature and the
 /// Philox draw apply after the cut.  `sampler_parity` pins all of it against the host reference.
+///
+/// **KEPT AS THE REFERENCE, BEHIND `STRATA_OLD_SAMPLER=1`.**  Two costs remain in it: the `taken`
+/// sweep is O(k) per logit per round, O(k^2 x n_vocab) per row (47 M shared-memory compares at k = 20, 500 M at
+/// 64), and the double-precision tail runs on all 1,024 threads where one warp suffices - GeForce issues FP64 at
+/// 1/64 of FP32.  The kernels after this one remove both and select the same list in the same order.
 /*
 DPCT1110: The total declared local variable size in device function
 sampler_kernel exceeds 128 bytes and may cause high register pressure. Consult
@@ -443,6 +456,641 @@ __dpct_inline__ void sampler_kernel(const float *__restrict__ logits,
     if (item_ct1.get_local_id(2) == 0) out[t] = pick;
 }
 
+// ---- the same list, in the same order, without the `taken` sweep ----
+//
+// THE SELECTION ORDER.  `sampler_kernel`'s rounds rank a candidate (value, id) before (value', id') when value >
+// value', or value == value' and id < id' - each thread's ascending scan keeps the first maximum it meets (strict
+// `>`), and the reductions resolve a tie to the lower id.  That is a strict total order (-0 and +0 compare equal and
+// fall to the id, as there), so round i picks the i-th logit of the order.  NaN and -inf are never picked (`s > bv`
+// from -inf fails); a round that finds nothing yields the SENTINEL (-inf, n_vocab), stored as id 0.
+
+constexpr int kSelMax = 64;               // the widest top_k list, `sampler_kernel`'s KMAX
+constexpr unsigned kFullMask = 0xFFFFFFFFu;
+
+// top_k 1..64 as given; 0 ("off") and anything wider keep 64; never more than the vocabulary
+__dpct_inline__ int sampled_k(int top_k, int n_vocab) {
+    int k = (top_k > 0 && top_k < kSelMax) ? top_k : kSelMax;
+    return k > n_vocab ? n_vocab : k;
+}
+
+// (bv, bi) <- the first of (bv, bi) and (ov, oi) in the selection order
+__dpct_inline__ void take_first(float &bv, int &bi, float ov, int oi) {
+    if (ov > bv || (ov == bv && oi < bi)) { bv = ov; bi = oi; }
+}
+
+// The first of the warp's 32 candidates, left in EVERY lane.  An XOR butterfly is exact here: "the first of two" is
+// associative and commutative in a strict total order (two lanes never hold different candidates that compare
+// equal - an id is in one lane at most, and two sentinels are the same pair), so every lane ends with the same pair.
+__dpct_inline__ void warp_first(float &bv, int &bi) {
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1) {
+        /*
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const float ov = dpct::experimental::permute_sub_group_by_xor(
+            kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), bv,
+            off);
+        /*
+        DPCT1108: '__shfl_xor_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        const int oi = dpct::experimental::permute_sub_group_by_xor(
+            kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), bi,
+            off);
+        take_first(bv, bi, ov, oi);
+    }
+}
+
+/// **THE TAIL ON ONE WARP, WITH `sampler_kernel`'S ARITHMETIC.**  `sel_ids` / `sel_logit` (shared, `k` entries) are
+/// the top_k list in selection order; the 32 lanes of one warp call this and lane 0 writes `out[t]`.  The old tail
+/// ran on all 1,024 threads, each computing the same ~4k double `exp`s - FP64 issues at 1/64 of FP32 on GeForce.
+/// Here the lanes share the `exp`s (one per entry, into `ex`) and then the quotients, and lane 0 alone runs the two
+/// ORDERED sums and the two cumulative scans.  Every double is the one the old chain computed: the same `exp` of
+/// the same argument, the sums in the same order, `cum += e / sum` with the same correctly rounded quotient - so
+/// the cut, the survivors and the pick are the same.  (`n_keep == 0`, reachable only with min_p > 1, which the
+/// callers clamp, read `sel_ids[-1]` in the old tail; it reads `sel_ids[0]` here.)
+inline void sampled_tail_warp(const int *sel_ids, const float *sel_logit, int k,
+                              const SamplerParams &p, int t,
+                              int *__restrict__ out, double *ex) {
+    const int lane =
+        (int)(sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(
+                  2) &
+              31);
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+    int n_keep = k;
+    float mx = sel_logit[0];
+#pragma unroll
+    for (int i = 1; i < k; ++i) mx = sycl::fmax(mx, sel_logit[i]);
+    if (p.top_p < 1.0f) {
+#pragma unroll
+        for (int i = lane; i < k; i += 32)
+            ex[i] = sycl::exp((double)sel_logit[i] - (double)mx);
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+        double sum = 0.0;
+        if (lane == 0)
+#pragma unroll
+            for (int i = 0; i < k; ++i) sum += ex[i];
+        /*
+        DPCT1108: '__shfl_sync' was migrated with the experimental feature
+        masked sub_group function which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        sum = dpct::experimental::select_from_sub_group(
+            kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), sum,
+            0);
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::
+                                get_sub_group()); // lane 0 has read every `ex`
+                                                  // before it is overwritten
+#pragma unroll
+        for (int i = lane; i < k; i += 32) ex[i] = ex[i] / sum;
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+        int cut = k;
+        if (lane == 0) {
+            double cum = 0.0;
+#pragma unroll
+            for (int i = 0; i < k; ++i) {
+                cum += ex[i];
+                if (cum >= (double) p.top_p) { cut = i + 1; break; }
+            }
+        }
+        /*
+        DPCT1108: '__shfl_sync' was migrated with the experimental feature
+        masked sub_group function which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        cut = dpct::experimental::select_from_sub_group(
+            kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), cut,
+            0);
+        if (cut < p.min_keep) cut = p.min_keep < k ? p.min_keep : k;
+        n_keep = cut;
+        sycl::group_barrier(sycl::ext::oneapi::this_work_item::
+                                get_sub_group()); // `ex` is written again below
+    }
+    // min_p on top_p's survivors, as in `sampler_kernel` (every lane, the same float arithmetic)
+    if (p.min_p > 0.0f) {
+        const float thresh = sel_logit[0] + sycl::log((float)(p.min_p));
+#pragma unroll
+        for (int i = 0; i < n_keep; ++i)
+            if (sel_logit[i] < thresh) { n_keep = i; break; }
+    }
+    // temperature, then one Philox draw
+    float smx = sel_logit[0] * inv_t;
+#pragma unroll
+    for (int i = 1; i < n_keep; ++i)
+        smx = sycl::fmax(smx, sel_logit[i] * inv_t);
+#pragma unroll
+    for (int i = lane; i < n_keep; i += 32)
+        ex[i] = sycl::exp((double)(sel_logit[i] * inv_t) - (double)smx);
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    double sum = 0.0;
+    if (lane == 0)
+#pragma unroll
+        for (int i = 0; i < n_keep; ++i) sum += ex[i];
+    /*
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature masked
+    sub_group function which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    sum = dpct::experimental::select_from_sub_group(
+        kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), sum, 0);
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+#pragma unroll
+    for (int i = lane; i < n_keep; i += 32) ex[i] = ex[i] / sum;
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    if (lane == 0) {
+        const float u = philox_uniform(p.seed, p.counter + (uint64_t) t);
+        double cum = 0.0;
+        int pick = sel_ids[n_keep > 0 ? n_keep - 1 : 0];
+#pragma unroll
+        for (int i = 0; i < n_keep; ++i) {
+            cum += ex[i];
+            if ((double) u < cum) { pick = sel_ids[i]; break; }
+        }
+        out[t] = pick;
+    }
+}
+
+/// **THE ONE-BLOCK SAMPLED PATH: `sampler_kernel` WITHOUT THE `taken` SWEEP.**  Round i's candidates are the logits
+/// strictly AFTER round i-1's pick in the selection order, `s < prev_v || (s == prev_v && v > prev_i)`, which is
+/// exactly the set `taken` left: the picks so far are the first i of the order, so what comes after the last one is
+/// what has not been picked.  The round is then the same block argmax with the same tie rule, so the list is the
+/// same list in the same order.  An empty round leaves (-inf, id 0) as before, and every round after it is empty
+/// in both versions (nothing after -inf beats -inf).  O(k x n_vocab) per row instead of O(k^2 x n_vocab), then warp
+/// 0 runs the tail.  `STRATA_SAMPLER_ONE_BLOCK=1`, and the fallback when the split path cannot run.
+/*
+DPCT1110: The total declared local variable size in device function
+sampler_one_block_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+sampler_one_block_kernel(const float *__restrict__ logits, int n_vocab,
+                         const int *__restrict__ history, int history_len,
+                         const SamplerParams p, int *__restrict__ out,
+                         uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(2);
+    const float* l = logits + (size_t) t * n_vocab;
+
+    // the penalty window and its membership bitmap, exactly as in `sampler_kernel`
+    const int* hrow = history ? history + (size_t) t * history_len : nullptr;
+    int hlen = 0;
+    if (hrow) {
+        hlen = p.penalty_last_n < history_len ? p.penalty_last_n : history_len;
+        if (hlen < 0) hlen = 0;
+        hrow += history_len - hlen;          // the window is the TAIL
+    }
+    auto penal_bits = (unsigned int *)dpct_local;
+    const int bits_words = (int) ((n_vocab + 31) / 32);
+    const bool use_bits = hrow != nullptr && hlen > 0 && bits_words > 0;
+    if (use_bits) {
+#pragma unroll
+        for (int w = item_ct1.get_local_id(2); w < bits_words;
+             w += item_ct1.get_local_range(2)) penal_bits[w] = 0u;
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+#pragma unroll
+        for (int i = item_ct1.get_local_id(2); i < hlen;
+             i += item_ct1.get_local_range(2))
+            if (hrow[i] >= 0 && hrow[i] < n_vocab)   // an id outside the vocabulary is never a candidate
+                dpct::atomic_fetch_or<
+                    sycl::access::address_space::generic_space>(
+                    &penal_bits[hrow[i] >> 5], 1u << (hrow[i] & 31));
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+    auto hit_count = [&](int v, uint8_t *dpct_local) -> int {
+        if (!use_bits || !(penal_bits[v >> 5] & (1u << (v & 31)))) return 0;
+        return history_count(hrow, hlen, v);
+    };
+
+    const int k = sampled_k(p.top_k, n_vocab);
+    auto &sel_ids =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_logit =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &ex =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<double[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sv = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &si = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int warp = (int)(item_ct1.get_local_id(2) >> 5),
+              lane = (int)(item_ct1.get_local_id(2) & 31);
+    float prev_v = sycl::bit_cast<float>(
+        0x7f800000); // +inf and id -1: round 0 takes every logit
+    int prev_i = -1;
+    for (int i = 0; i < k; ++i) {
+        float bv = sycl::bit_cast<float, int>(0xff800000); // -inf
+        int best = n_vocab;
+        for (int v = item_ct1.get_local_id(2); v < n_vocab;
+             v += item_ct1.get_local_range(2)) {
+            const float s = apply_penalties(l[v], hit_count(v, dpct_local), p);
+            if ((s < prev_v || (s == prev_v && v > prev_i)) && s > bv) { bv = s; best = v; }
+        }
+        for (int off = 16; off > 0; off >>= 1) {
+            /*
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const float ov = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                bv, off);
+            /*
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const int oi = dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                best, off);
+            if (ov > bv || (ov == bv && oi < best)) { bv = ov; best = oi; }
+        }
+        if (lane == 0) { sv[warp] = bv; si[warp] = best; }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        if (warp == 0) {
+            const int nw = (int)((item_ct1.get_local_range(2) + 31) >> 5);
+            float wv =
+                lane < nw ? sv[lane] : sycl::bit_cast<float, int>(0xff800000);
+            int wi = lane < nw ? si[lane] : n_vocab;
+            for (int off = 16; off > 0; off >>= 1) {
+                /*
+                DPCT1108: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const float ov = dpct::experimental::shift_sub_group_left(
+                    0xFFFFFFFFu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), wv,
+                    off);
+                /*
+                DPCT1108: '__shfl_down_sync' was migrated with the
+                experimental feature masked sub_group function which may not be
+                supported by all compilers or runtimes. You may need to adjust
+                the code.
+                */
+                const int oi = dpct::experimental::shift_sub_group_left(
+                    0xFFFFFFFFu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), wi,
+                    off);
+                if (ov > wv || (ov == wv && oi < wi)) { wv = ov; wi = oi; }
+            }
+            if (lane == 0) { sel_ids[i] = (wi < n_vocab) ? wi : 0; sel_logit[i] = wv; }
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        // An empty round leaves (-inf, 0): nothing comes after it, as nothing was left untaken.
+        prev_v = sel_logit[i];
+        prev_i = sel_ids[i];
+    }
+    if (warp != 0) return;
+    sampled_tail_warp(sel_ids, sel_logit, k, p, t, out, ex);
+}
+
+// ---- THE SPLIT top_k.  `sampler_kernel` and the one-block kernel keep a row on ONE SM of 170 (5090) and walk its
+// 248,320 logits k times.  Here a warp keeps the top_k of 1,024 logits held in registers, four warps make a block of
+// 4,096 logits that merges their lists, and a row is 61 such blocks over the whole GPU; one warp per row then
+// merges the 61 lists and runs the tail.  Exact, because the first k of a union are within the first k of each part
+// and a merge of ordered lists is ordered - the selection order being a strict total order (above).
+constexpr int kSplitPerLane = 32;                               // logits per lane, in registers
+constexpr int kSplitWarpSpan = 32 * kSplitPerLane;              // 1,024 logits per warp
+constexpr int kSplitWarps = 4;
+constexpr int kSplitBlockSpan = kSplitWarps * kSplitWarpSpan;   // 4,096 logits per block
+constexpr int kSplitMaxBlocks = 64;                             // lists the merge holds: n_vocab <= 262,144
+constexpr int kSplitMaxRows = 64;                               // rows per split launch (the scratch's bound)
+
+/// Merge `nl` (<= 64) lists of `k` candidates - list L at `lists[L * stride]`, each in the selection order and
+/// padded with sentinels - into their first `k`: `sink(i, value, id)` runs in every lane for i = 0..k-1 with the
+/// same pair.  Lane owns lists `lane` and `lane + 32`; a round takes the first of all heads and advances the list
+/// it came from.  An id is in one list at most (the lists cover disjoint logits), so exactly one head matches.
+template <typename Sink>
+__dpct_inline__ void warp_merge_lists(const sycl::int2 *lists, int nl,
+                                      int stride, int k, int n_vocab,
+                                      Sink &&sink) {
+    const int lane =
+        (int)(sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(
+                  2) &
+              31);
+    float hv[2];
+    int hi[2], pos[2];
+#pragma unroll
+    for (int m = 0; m < 2; ++m) {
+        const int L = lane + 32 * m;
+        pos[m] = 0;
+        hv[m] = sycl::bit_cast<float, int>(0xff800000);
+        hi[m] = n_vocab;
+        if (L < nl) {
+            const sycl::int2 c = lists[(size_t)L * stride];
+            hi[m] = c.x();
+            hv[m] = sycl::bit_cast<float>(c.y());
+        }
+    }
+    for (int i = 0; i < k; ++i) {
+        float bv = hv[0];
+        int bi = hi[0];
+        take_first(bv, bi, hv[1], hi[1]);
+        warp_first(bv, bi);
+        sink(i, bv, bi);
+        if (bi < n_vocab) {
+#pragma unroll
+            for (int m = 0; m < 2; ++m) {
+                if (hi[m] != bi) continue;
+                if (++pos[m] < k) {
+                    const sycl::int2 c =
+                        lists[(size_t)(lane + 32 * m) * stride + pos[m]];
+                    hi[m] = c.x();
+                    hv[m] = sycl::bit_cast<float>(c.y());
+                } else {
+                    hi[m] = n_vocab;
+                    hv[m] = sycl::bit_cast<float, int>(0xff800000);
+                }
+            }
+        }
+    }
+}
+
+/// **SPLIT STAGE 1: THE top_k OF EACH 4,096-LOGIT BLOCK.**  Grid (blocks per row, rows), 128 threads.  Each warp
+/// loads its 1,024 penalised logits once into registers (lane + 32 j: every load is one coalesced 128-byte line)
+/// and runs `k` warp-argmax rounds over them with the threshold of `sampler_one_block_kernel` - no shared memory
+/// and no block barrier per round.  Warp 0 then merges the four warp lists into the block's list in `cand`
+/// (row-major: row t, block b, entry i at `(t * n_blocks + b) * k + i`, as (id, value bits)).
+/*
+DPCT1110: The total declared local variable size in device function
+sampler_split_part_kernel exceeds 128 bytes and may cause high register
+pressure. Consult with your hardware vendor to find the total register size
+available and adjust the code, or use smaller sub-group size to avoid high
+register pressure.
+*/
+__dpct_inline__ void
+sampler_split_part_kernel(const float *__restrict__ logits, int n_vocab,
+                          const int *__restrict__ history, int history_len,
+                          const SamplerParams p, int k, int n_blocks,
+                          sycl::int2 *__restrict__ cand) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(1);
+    const float* l = logits + (size_t) t * n_vocab;
+    const int warp = (int)(item_ct1.get_local_id(2) >> 5),
+              lane = (int)(item_ct1.get_local_id(2) & 31);
+    const int blo = (int)item_ct1.get_group(2) * kSplitBlockSpan;
+
+    const int* hrow = history ? history + (size_t) t * history_len : nullptr;
+    int hlen = 0;
+    if (hrow) {
+        hlen = p.penalty_last_n < history_len ? p.penalty_last_n : history_len;
+        if (hlen < 0) hlen = 0;
+        hrow += history_len - hlen;          // the window is the TAIL
+    }
+    // The membership bitmap of THIS BLOCK'S 4,096 logits (512 bytes, not the vocabulary's 31 KB): the same test,
+    // and a hit pays the same exact count over the whole window.
+    auto &bits = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        unsigned int[kSplitBlockSpan / 32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const bool use_bits = hrow != nullptr && hlen > 0;
+    if (use_bits) {
+#pragma unroll
+        for (int w = item_ct1.get_local_id(2); w < kSplitBlockSpan / 32;
+             w += item_ct1.get_local_range(2)) bits[w] = 0u;
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        for (int i = item_ct1.get_local_id(2); i < hlen;
+             i += item_ct1.get_local_range(2)) {
+            const int h = hrow[i];
+            if (h >= 0 && h < n_vocab && h >= blo && h - blo < kSplitBlockSpan)
+                dpct::atomic_fetch_or<
+                    sycl::access::address_space::generic_space>(
+                    &bits[(h - blo) >> 5], 1u << ((h - blo) & 31));
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+    }
+
+    // This warp's logits, penalised: `apply_penalties` with a zero count returns the logit unchanged, so only the
+    // bitmap's hits go through it.  Past the vocabulary: -inf, which no round picks.
+    const int lo = blo + warp * kSplitWarpSpan;
+    float s[kSplitPerLane];
+#pragma unroll
+    for (int j = 0; j < kSplitPerLane; ++j) {
+        const int v = lo + 32 * j + lane;
+        s[j] = v < n_vocab ? l[v] : sycl::bit_cast<float, int>(0xff800000);
+    }
+    if (use_bits) {
+#pragma unroll
+        for (int j = 0; j < kSplitPerLane; ++j) {
+            const int v = lo + 32 * j + lane, b = v - blo;
+            if (v < n_vocab && (bits[b >> 5] & (1u << (b & 31))))
+                s[j] = apply_penalties(s[j], history_count(hrow, hlen, v), p);
+        }
+    }
+
+    auto &wl = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        sycl::int2[kSplitWarps][kSelMax]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    float prev_v = sycl::bit_cast<float>(
+        0x7f800000); // +inf and id -1: round 0 takes every logit
+    int prev_i = -1;
+    int i = 0;
+    for (; i < k; ++i) {
+        // two chains (even and odd j), each walked in ascending id with a strict `>`, so each keeps its first in
+        // the order; `take_first` then orders the two
+        float b0 = sycl::bit_cast<float, int>(0xff800000),
+              b1 = sycl::bit_cast<float, int>(0xff800000);
+        int i0 = n_vocab, i1 = n_vocab;
+#pragma unroll
+        for (int j = 0; j < kSplitPerLane; j += 2) {
+            const int v0 = lo + 32 * j + lane, v1 = v0 + 32;
+            const float x0 = s[j], x1 = s[j + 1];
+            if ((x0 < prev_v || (x0 == prev_v && v0 > prev_i)) && x0 > b0) { b0 = x0; i0 = v0; }
+            if ((x1 < prev_v || (x1 == prev_v && v1 > prev_i)) && x1 > b1) { b1 = x1; i1 = v1; }
+        }
+        take_first(b0, i0, b1, i1);
+        warp_first(b0, i0);
+        if (i0 >= n_vocab) break;                // the same in every lane: nothing left in these 1,024 logits
+        if (lane == 0) wl[warp][i] = sycl::int2(i0, sycl::bit_cast<int>(b0));
+        prev_v = b0;
+        prev_i = i0;
+    }
+#pragma unroll
+    for (int r = i + lane; r < k; r += 32)
+        wl[warp][r] = sycl::int2(n_vocab, (int)0xff800000u); // sentinels
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (warp == 0) {
+        sycl::int2 *dst =
+            cand + ((size_t)t * n_blocks + item_ct1.get_group(2)) * k;
+        warp_merge_lists(&wl[0][0], kSplitWarps, kSelMax, k, n_vocab, [&](int r, float v, int id) {
+            if (lane == 0) dst[r] = sycl::int2(id, sycl::bit_cast<int>(v));
+        });
+    }
+}
+
+/// **SPLIT STAGE 2: ONE WARP PER ROW MERGES THE BLOCK LISTS, THEN RUNS THE TAIL.**  The row's lists (at most 64 x
+/// 64 entries, 32 KB) are copied to shared memory, merged into the row's top_k list, and `sampled_tail_warp` picks.
+__dpct_inline__ void
+sampler_split_merge_kernel(const sycl::int2 *__restrict__ cand, int n_blocks,
+                           int n_vocab, const SamplerParams p, int k,
+                           int *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_group(2);
+    const int lane = (int)item_ct1.get_local_id(2);
+    auto &lists = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        sycl::int2[kSplitMaxBlocks * kSelMax]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_ids =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_logit =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &ex =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<double[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const sycl::int2 *src = cand + (size_t)t * n_blocks * k;
+#pragma unroll
+    for (int e = lane; e < n_blocks * k; e += 32) lists[e] = src[e];
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    warp_merge_lists(lists, n_blocks, k, k, n_vocab, [&](int i, float v, int id) {
+        if (lane == 0) { sel_ids[i] = id < n_vocab ? id : 0; sel_logit[i] = v; }
+    });
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    sampled_tail_warp(sel_ids, sel_logit, k, p, t, out, ex);
+}
+
+// Which sampled path runs, read once: `STRATA_OLD_SAMPLER=1` is `sampler_kernel` (engine 0.1.20),
+// `STRATA_SAMPLER_ONE_BLOCK=1` the one-block kernel; by default the split top_k wherever it applies.
+enum class SampledPath { Split, OneBlock, Old };
+
+bool env_flag(const char* name) {
+    const char* e = std::getenv(name);
+    return e != nullptr && *e != '\0' && std::strcmp(e, "0") != 0;
+}
+
+SampledPath sampled_path() {
+    static const SampledPath path = env_flag("STRATA_OLD_SAMPLER")         ? SampledPath::Old
+                                    : env_flag("STRATA_SAMPLER_ONE_BLOCK") ? SampledPath::OneBlock
+                                                                           : SampledPath::Split;
+    return path;
+}
+
+// A stream being captured into a graph must not reach `split_scratch` (cudaMalloc): it
+// gets the one-block kernel, which needs no memory of its own.  The legacy stream cannot be captured.
+bool stream_capturing(void *stream) try {
+    if (stream == nullptr) return false;
+    sycl::ext::oneapi::experimental::queue_state st =
+        sycl::ext::oneapi::experimental::queue_state::executing;
+    if (DPCT_CHECK_ERROR(
+            (st = strata::q_of(stream)->ext_oneapi_get_state())) != 0) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        return true;
+    }
+    return st != sycl::ext::oneapi::experimental::queue_state::executing;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+// The split's block lists, one buffer per (device, stream): launches on one stream run in order, so a stream reuses
+// its buffer with no sync, and two streams never share one.  Grown on demand (at least doubling, up to the size of
+// `kSplitMaxRows` rows at the widest vocabulary: 2 MB), never shrunk.  A grown-out buffer is retired, not freed: a
+// pointer handed out earlier (to another host thread on the same stream, say) may still be waiting for its launch,
+// and freeing it would need a sync that proves nothing about that thread.  Doubling keeps a slot's retired buffers
+// smaller than its live one, so a slot holds about 4 MB at most (0.5 MB for the engine's <= 16 rows).  nullptr
+// when the memory cannot be had, and the caller falls back to the one-block kernel; a failed grow is remembered, so
+// later calls of that size do not retry cudaMalloc each time.
+sycl::int2 *split_scratch(void *stream, size_t entries) {
+    struct Slot {
+        int device;
+        void* stream;
+        sycl::int2 *ptr;
+        size_t entries;
+        size_t failed;                       // the smallest size cudaMalloc refused (0: none)
+    };
+    static std::mutex mu;
+    static std::vector<Slot> slots;
+    static std::vector<sycl::int2 *> retired;
+    int device = 0;
+    if (DPCT_CHECK_ERROR(device = dpct::get_current_device_id()) != 0) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        return nullptr;
+    }
+    std::lock_guard<std::mutex> lock(mu);
+    Slot* slot = nullptr;
+    for (Slot& s : slots)
+        if (s.device == device && s.stream == stream) slot = &s;
+    if (slot == nullptr) {
+        slots.push_back({device, stream, nullptr, 0, 0});
+        slot = &slots.back();
+    }
+    if (slot->entries >= entries) return slot->ptr;
+    if (slot->failed != 0 && entries >= slot->failed) return nullptr;
+    constexpr size_t kCap = (size_t) kSplitMaxRows * kSplitMaxBlocks * kSelMax;
+    size_t want = 2 * slot->entries < kCap ? 2 * slot->entries : kCap;
+    if (want < entries) want = entries;
+    sycl::int2 *ptr = nullptr;
+    if (DPCT_CHECK_ERROR(ptr = sycl::malloc_device<sycl::int2>(
+                             want, dpct::get_in_order_queue())) != 0) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        want = entries;
+        if (DPCT_CHECK_ERROR(ptr = sycl::malloc_device<sycl::int2>(
+                                 want, dpct::get_in_order_queue())) != 0) {
+            /*
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            (void)0;
+            slot->failed = entries;
+            return nullptr;
+        }
+    }
+    if (slot->ptr != nullptr) retired.push_back(slot->ptr);
+    slot->ptr = ptr;
+    slot->entries = want;
+    return ptr;
+}
+
 }  // namespace
 
 void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
@@ -481,7 +1129,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
                         sycl::range(shmem), cgh);
 
                     cgh.parallel_for<
-                        dpct_kernel_name<class sampler_greedy_kernel_eacb1a>>(
+                        dpct_kernel_name<class sampler_greedy_kernel_5b2c3f>>(
                         sycl::nd_range<3>(
                             sycl::range(1, 1, (unsigned)n_tokens) *
                                 sycl::range(1, 1, gthreads),
@@ -499,7 +1147,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
                             });
                 });
         }
-    } else {
+    } else if (sampled_path() == SampledPath::Old) {
         // The same block-per-token shape: the selection's k argmax rounds reduce inside the block.  See
         // `sampler_kernel`'s header for what the old one-thread-per-token launch cost.
         /*
@@ -518,7 +1166,7 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
                 sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
                     sycl::range(shmem), cgh);
 
-                cgh.parallel_for<dpct_kernel_name<class sampler_kernel_9f529a>>(
+                cgh.parallel_for<dpct_kernel_name<class sampler_kernel_ebb5aa>>(
                     sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n_tokens) *
                                           sycl::range(1, 1, 1024),
                                       sycl::range(1, 1, 1024)),
@@ -533,6 +1181,97 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
                                 .get());
                     });
             });
+    } else {
+        // The split top_k by default: stage 1 over (61 blocks x rows) for 248,320 logits, stage 2 one warp per
+        // row.  The one-block kernel when asked for, or when the split cannot run: a wider vocabulary than the merge
+        // holds, more than `kSplitMaxRows` rows (the engine samples at most a verify window), a stream under capture,
+        // no scratch.
+        const int k = sampled_k(p.top_k, n_vocab);
+        const int n_blocks = (n_vocab + kSplitBlockSpan - 1) / kSplitBlockSpan;
+        sycl::int2 *scratch = nullptr;
+        if (sampled_path() == SampledPath::Split && n_blocks <= kSplitMaxBlocks && n_tokens <= kSplitMaxRows &&
+            !stream_capturing(stream))
+            // sized for 16 rows and 64 entries at least, so a verify window or a wider top_k does not regrow it
+            scratch = split_scratch(stream, (size_t) (n_tokens > 16 ? n_tokens : 16) * n_blocks * kSelMax);
+        if (scratch != nullptr) {
+            {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                strata::q_of(stream)
+                    ->parallel_for<dpct_kernel_name<
+                        class sampler_split_part_kernel_cc5673>>(
+                        sycl::nd_range<3>(
+                            sycl::range(1, (unsigned)n_tokens,
+                                        (unsigned)n_blocks) *
+                                sycl::range(1, 1, kSplitWarps * 32),
+                            sycl::range(1, 1, kSplitWarps * 32)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                sampler_split_part_kernel(
+                                    logits, n_vocab, history, history_len, p, k,
+                                    n_blocks, scratch);
+                            });
+            }
+            {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+                dpct::has_capability_or_fail(
+                    strata::q_of(stream)->get_device(),
+                    {sycl::aspect::fp64});
+
+                strata::q_of(stream)
+                    ->parallel_for<dpct_kernel_name<
+                        class sampler_split_merge_kernel_b17bd4>>(
+                        sycl::nd_range<3>(
+                            sycl::range(1, 1, (unsigned)n_tokens) *
+                                sycl::range(1, 1, 32),
+                            sycl::range(1, 1, 32)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                sampler_split_merge_kernel(scratch, n_blocks,
+                                                           n_vocab, p, k, out);
+                            });
+            }
+        } else {
+            /*
+            DPCT1049: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            dpct::has_capability_or_fail(
+                strata::q_of(stream)->get_device(),
+                {sycl::aspect::fp64});
+
+            strata::q_of(stream)
+                ->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(shmem), cgh);
+
+                    cgh.parallel_for<dpct_kernel_name<
+                        class sampler_one_block_kernel_79fa88>>(
+                        sycl::nd_range<3>(
+                            sycl::range(1, 1, (unsigned)n_tokens) *
+                                sycl::range(1, 1, 1024),
+                            sycl::range(1, 1, 1024)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                sampler_one_block_kernel(
+                                    logits, n_vocab, history, history_len, p,
+                                    out,
+                                    dpct_local_acc_ct1
+                                        .get_multi_ptr<
+                                            sycl::access::decorated::no>()
+                                        .get());
+                            });
+                });
+        }
     }
     /*
     DPCT1010: SYCL uses exceptions to report errors and does not use the
diff --git a/sycl/src/kernels/elementwise_parity.cpp b/sycl/src/kernels/elementwise_parity.cpp
index 594b4598028..85f7493d43c 100644
--- a/sycl/src/kernels/elementwise_parity.cpp
+++ b/sycl/src/kernels/elementwise_parity.cpp
@@ -15,6 +15,7 @@
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
+#include "strata/kernels/dequant_bf16.hpp"
 #include "strata/kernels/elementwise.hpp"
 #include "strata/kernels/f16_bits.hpp"
 
@@ -616,6 +617,99 @@ int main(int argc, char** argv) {
         if (mismatches || guards || fma_diff == 0) ++bad;
     }
 
+    // ---- THE f32 -> bf16 CONVERSIONS KEEP A NaN A NaN.  `f32_to_bf16_bulk` (the header's `bf16_from_f32`
+    // on the device) and the prompt path's dequantizer (its own `f2bf`) against ggml_compute_fp32_to_bf16's rule;
+    // before the fix 0x7FFFFFFF came back as -0 and 0x7F800001 as +inf.  `bf16_bits_test` covers every f32 on
+    // the host; this is the same header compiled by nvcc, plus the second copy in dequant_bf16.cu.
+    {
+        auto ggml_bf16 = [](uint32_t u) -> uint16_t {
+            if ((u & 0x7fffffffu) > 0x7f800000u) return (uint16_t) ((u >> 16) | 64);
+            return (uint16_t) ((u + (0x7fffu + ((u >> 16) & 1u))) >> 16);
+        };
+        std::vector<uint32_t> bits = {0x7FFFFFFFu, 0xFFFFFFFFu, 0x7F800001u, 0xFF800001u, 0x7FC00000u, 0x7FBFFFFFu,
+                                      0x7F800000u, 0xFF800000u, 0x7F7FFFFFu, 0x00000000u, 0x80000000u, 0x3F808000u,
+                                      0x3F818000u, 0x00008000u, 0x7F7F8000u};
+        std::mt19937 rng(13);
+        while (bits.size() < 4096) bits.push_back((uint32_t) rng());
+        const size_t n = bits.size();
+        float* dx = nullptr;
+        uint16_t* dy = nullptr;
+        check(DPCT_CHECK_ERROR(dx = (float *)sycl::malloc_device(
+                                   n * 4, dpct::get_in_order_queue())),
+              "bf16 x");
+        check(DPCT_CHECK_ERROR(dy = (uint16_t *)sycl::malloc_device(
+                                   n * 2, dpct::get_in_order_queue())),
+              "bf16 y");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(dx, bits.data(), n * 4).wait()),
+              "bf16 cx");
+        strata::kernels::f32_to_bf16_bulk(dx, dy, (int64_t) n, nullptr);
+        std::vector<uint16_t> got(n);
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                   .memcpy(got.data(), dy, n * 2)
+                                   .wait()),
+              "bf16 cy");
+        int wrong = 0;
+        for (size_t i = 0; i < n; ++i) wrong += got[i] != ggml_bf16(bits[i]);
+
+        // A Q8_0 block (type 8) whose fp16 scale is a NaN: every dequantized value is NaN * q, a NaN, and it must
+        // still be one in BF16.  A second block with an ordinary scale checks the finite path did not move.
+        std::vector<uint8_t> blk(2 * 34, 0);
+        blk[0] = 0x00; blk[1] = 0x7E;                        // fp16 quiet NaN
+        blk[34] = 0x00; blk[35] = 0x3C;                      // fp16 1.0
+        for (int j = 0; j < 32; ++j) {
+            blk[(size_t) (2 + j)] = (uint8_t) (int8_t) (j - 16);
+            blk[(size_t) (36 + j)] = (uint8_t) (int8_t) (3 * j - 50);
+        }
+        uint8_t* db = nullptr;
+        uint16_t* dq = nullptr;
+        check(DPCT_CHECK_ERROR(db = (uint8_t *)sycl::malloc_device(
+                                   blk.size(), dpct::get_in_order_queue())),
+              "q8 blk");
+        check(DPCT_CHECK_ERROR(dq = (uint16_t *)sycl::malloc_device(
+                                   64 * 2, dpct::get_in_order_queue())),
+              "q8 out");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(db, blk.data(),
+                                                                 blk.size()).wait()),
+              "q8 cblk");
+        strata::kernels::dequant_bf16(8, db, 0, 2, 32, dq, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_current_device().queues_wait_and_throw()),
+              "dequant_bf16");
+        std::vector<uint16_t> q(64);
+        check(
+            DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue().memcpy(q.data(), dq, 64 * 2).wait()),
+            "q8 cout");
+        int dq_wrong = 0;
+        for (int j = 0; j < 32; ++j) {
+            if (!((q[(size_t) j] & 0x7FFFu) > 0x7F80u)) ++dq_wrong;           // row 0: NaN scale -> NaN
+            const float v = (float) (3 * j - 50);                                // row 1: d = 1.0 -> the integer
+            uint32_t vb;
+            std::memcpy(&vb, &v, 4);
+            if (q[(size_t) (32 + j)] != ggml_bf16(vb)) ++dq_wrong;
+        }
+        std::printf("  f32 -> bf16 (NaN kept): bulk %d of %zu differ from ggml, dequant_bf16 %d of 64 wrong\n",
+                    wrong, n, dq_wrong);
+        if (wrong || dq_wrong) ++bad;
+        sycl::free(dx, dpct::get_in_order_queue());
+            sycl::free(dy, dpct::get_in_order_queue());
+            sycl::free(db, dpct::get_in_order_queue());
+            sycl::free(dq, dpct::get_in_order_queue());
+    }
+
     std::printf("\nelementwise: %d failures\n", bad);
     if (bad) return 1;
     if (selftest) std::printf("elementwise_parity OK\n");
diff --git a/sycl/src/kernels/s_gemv_q8k_parity.cpp b/sycl/src/kernels/s_gemv_q8k_parity.cpp
index 95f2894218c..315bab4b5cf 100644
--- a/sycl/src/kernels/s_gemv_q8k_parity.cpp
+++ b/sycl/src/kernels/s_gemv_q8k_parity.cpp
@@ -69,6 +69,180 @@ struct Case {
     bool has_offset;
 };
 
+/// THE RAGGED LAST BLOCK.  The split kernels give each warp one row and a block eight warps, so with
+/// `n_out % 8 != 0` the last block holds warps that have no row.  Those warps used to return BEFORE the
+/// codebook barrier - undefined behaviour that every real shape (a multiple of 8) avoided.  Here `n_out` is
+/// deliberately ragged, every row is checked against the host reference over the same bytes, and a guard
+/// band past `n_out` must come back untouched: a warp without a row must neither hang the block nor write.
+/// (`compute-sanitizer --tool synccheck` on this binary is the direct check of the barrier itself.)
+int ragged_rows(const Case& cs, long long n_out) {
+    const long long n_in = 512;
+    const long long guard = 64;
+    std::mt19937 rng(77 + (unsigned) n_out);
+    std::normal_distribution<float> g(0.0f, 1.0f);
+    std::vector<float> xf((size_t) n_in);
+    for (auto& v : xf) v = g(rng);
+    SForm f;
+    f.code_bits = cs.bits;
+    f.code_bias = cs.bias;
+    f.group_elems = cs.group;
+    f.codebook = cs.cb;
+    f.has_offset = cs.has_offset;
+    const int per_byte = 8 / cs.bits;
+    std::vector<uint8_t> codes((size_t) (n_out * n_in / per_byte));
+    for (auto& v : codes) v = (uint8_t) (rng() & 0xFF);
+    const long long n_groups = n_in / cs.group;
+    std::vector<float> scales((size_t) (n_out * n_groups)), offs((size_t) (n_out * n_groups));
+    for (auto& v : scales) v = 0.01f + 0.001f * (float) (rng() % 20);
+    for (auto& v : offs) v = 0.2f * g(rng);
+
+    float* d_xf = nullptr;
+    uint8_t *d_xk = nullptr, *d_x0 = nullptr, *d_codes = nullptr;
+    float *d_scales = nullptr, *d_offs = nullptr, *d_y = nullptr;
+    std::vector<uint8_t> xk((size_t) (n_in / 256) * 292), x0((size_t) (n_in / 32) * 34);
+    check(DPCT_CHECK_ERROR(d_xf = (float *)sycl::malloc_device(
+                               (size_t)n_in * 4, dpct::get_in_order_queue())),
+          "rxf");
+    check(DPCT_CHECK_ERROR(d_xk = (uint8_t *)sycl::malloc_device(
+                               xk.size(), dpct::get_in_order_queue())),
+          "rxk");
+    check(DPCT_CHECK_ERROR(d_x0 = (uint8_t *)sycl::malloc_device(
+                               x0.size(), dpct::get_in_order_queue())),
+          "rx0");
+    check(DPCT_CHECK_ERROR(d_codes = (uint8_t *)sycl::malloc_device(
+                               codes.size(), dpct::get_in_order_queue())),
+          "rcodes");
+    check(DPCT_CHECK_ERROR(d_scales = (float *)sycl::malloc_device(
+                               scales.size() * 4, dpct::get_in_order_queue())),
+          "rscales");
+    check(DPCT_CHECK_ERROR(d_offs = (float *)sycl::malloc_device(
+                               offs.size() * 4, dpct::get_in_order_queue())),
+          "roffs");
+    check(DPCT_CHECK_ERROR(
+              d_y = (float *)sycl::malloc_device((size_t)(n_out + guard) * 4,
+                                                 dpct::get_in_order_queue())),
+          "ry");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_xf, xf.data(),
+                                                             (size_t)n_in * 4).wait()),
+          "rcxf");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_codes, codes.data(), codes.size()).wait()),
+          "rcc");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_scales, scales.data(), scales.size() * 4).wait()),
+          "rcs");
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+              d_offs, offs.data(), offs.size() * 4).wait()),
+          "rco");
+    strata::kernels::quantize_q8_K(d_xf, d_xk, n_in, nullptr);
+    strata::kernels::quantize_q8_0(d_xf, d_x0, n_in, nullptr);
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(xk.data(), d_xk, xk.size())
+                               .wait()),
+          "rcxk");
+    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                               .memcpy(x0.data(), d_x0, x0.size())
+                               .wait()),
+          "rcx0");
+
+    int bad = 0;
+    for (int kind = 0; kind < 2; ++kind) {           // 0: Q8_K activation, 1: Q8_0 activation
+        std::vector<float> want((size_t) n_out);
+        std::vector<double> mag((size_t) n_out);   // sum |w_i a_i| per row: a row whose sum cancels near 0
+        for (long long o = 0; o < n_out; ++o) {    // must not turn f32 rounding into a relative failure
+            double acc = 0, am = 0;
+            for (long long i = 0; i < n_in; ++i) {
+                double a;
+                if (kind == 0) {
+                    a = q8k_at(xk, i);
+                } else {
+                    const uint8_t* blk = x0.data() + (size_t) (i / 32) * 34;
+                    uint16_t dbits;
+                    std::memcpy(&dbits, blk, 2);
+                    a = (double) strata::kernels::f32_from_f16(dbits) * (double) ((const int8_t*) (blk + 2))[i % 32];
+                }
+                const double wa = weight_at(codes, scales, offs, f, n_in, o, i) * a;
+                acc += wa;
+                am += std::fabs(wa);
+            }
+            want[(size_t) o] = (float) acc;
+            mag[(size_t) o] = am;
+        }
+        // the guard band holds a NaN pattern; any write there shows up as a changed bit
+        std::vector<uint32_t> sentinel((size_t) (n_out + guard), 0x7FC0DEADu);
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_y, sentinel.data(), sentinel.size() * 4).wait()),
+              "rsent");
+        if (kind == 0)
+            strata::kernels::s_gemv_q8k_split(d_xk, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in,
+                                              n_out, f, nullptr);
+        else
+            strata::kernels::s_gemv_q8_0_split(d_x0, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in,
+                                               n_out, f, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_current_device().queues_wait_and_throw()),
+              "ragged split");
+        std::vector<uint32_t> got_bits(sentinel.size());
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got_bits.data(), d_y, got_bits.size() * 4)
+                      .wait()),
+              "rcy");
+        double m = 0, d = 0;
+        for (long long o = 0; o < n_out; ++o) {
+            float v;
+            std::memcpy(&v, &got_bits[(size_t) o], 4);
+            m += mag[(size_t) o];
+            d += std::fabs((double) want[(size_t) o] - (double) v);
+        }
+        long long touched = 0;
+        for (long long o = n_out; o < n_out + guard; ++o) touched += got_bits[(size_t) o] != 0x7FC0DEADu;
+        const double rel = d / (m > 1e-30 ? m : 1e-30);
+        const bool ok = rel <= 1e-5 && touched == 0;
+        std::printf("  %-28s %s n_out %3lld: rel %.3e, guard words written %lld  %s\n", cs.what,
+                    kind == 0 ? "Q8_K" : "Q8_0", n_out, rel, touched, ok ? "ok" : "*** WRONG ***");
+        if (!ok) ++bad;
+    }
+    sycl::free(d_xf, dpct::get_in_order_queue());
+        sycl::free(d_xk, dpct::get_in_order_queue());
+        sycl::free(d_x0, dpct::get_in_order_queue());
+        sycl::free(d_codes, dpct::get_in_order_queue());
+        sycl::free(d_scales, dpct::get_in_order_queue());
+        sycl::free(d_offs, dpct::get_in_order_queue());
+    sycl::free(d_y, dpct::get_in_order_queue());
+    return bad;
+}
+
 }  // namespace
 
 int main(int argc, char** argv) {
@@ -314,6 +488,11 @@ int main(int argc, char** argv) {
             sycl::free(d_y, dpct::get_in_order_queue());
     }
 
+    // ---- 4. output widths that are NOT a multiple of the eight rows per block
+    std::printf("\n");
+    for (const Case& cs : cases)
+        for (long long n_out : {1LL, 7LL, 9LL, 61LL}) bad += ragged_rows(cs, n_out);
+
     std::printf("\ns_gemv_q8k: %d failures\n", bad);
     if (bad) return 1;
     if (selftest) std::printf("s_gemv_q8k_parity OK\n");
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
index 0ea1460803c..08fef003092 100644
--- a/sycl/src/kernels/sampler_parity.cpp
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -18,6 +18,7 @@
 #include <cstdio>
 #include <cstdlib>
 #include <cstring>
+#include <limits>
 #include <random>
 #include <string>
 #include <vector>
@@ -291,13 +292,256 @@ int sampled_cut(const std::vector<float>& l, const std::vector<int>& hist, const
     return cut;
 }
 
+// ---- the kernel's own semantics, for the fixtures ----
+//
+// `sampled_reference` picks the first unpicked logit even when it is -inf or NaN; the kernels never pick either, and
+// a round that finds nothing stores id 0 with a -inf logit (and later rounds treat id 0 as taken, as `sampler_kernel`
+// does).  The mirror below follows the kernels, so rows with -inf, NaN, +inf and more requested than finite logits
+// can be pinned exactly.  On rows without those it is `sampled_reference`.
+struct SelList {
+    std::vector<int> ids;
+    std::vector<float> logit;
+};
+
+// The top_k list of `sampler_kernel` for one row: `window` is the counted history (the row's last penalty_last_n).
+SelList mirror_select(const float* l, int nv, const std::vector<int>& window, const strata::kernels::SamplerParams& p,
+                      int k) {
+    std::vector<float> s((size_t) nv);
+    for (int v = 0; v < nv; ++v) {
+        int c = 0;
+        for (int h : window) c += h == v;
+        float x = l[v];
+        if (c > 0) {
+            if (x <= 0.0f) x *= p.penalty_repeat; else x /= p.penalty_repeat;
+            x -= (float) c * p.penalty_freq + (c > 0 ? 1.0f : 0.0f) * p.penalty_present;
+        }
+        s[(size_t) v] = x;
+    }
+    SelList out;
+    std::vector<char> taken((size_t) nv, 0);
+    for (int i = 0; i < k; ++i) {
+        int best = nv;
+        float bv = -std::numeric_limits<float>::infinity();
+        for (int v = 0; v < nv; ++v)
+            if (!taken[(size_t) v] && s[(size_t) v] > bv) { bv = s[(size_t) v]; best = v; }
+        const int id = best < nv ? best : 0;
+        taken[(size_t) id] = 1;
+        out.ids.push_back(id);
+        out.logit.push_back(bv);
+    }
+    return out;
+}
+
+// The tail of `sampler_kernel` over a list (its first `k` entries): top_p, min_p, temperature, the Philox draw.
+int mirror_pick(const SelList& sel, int k, const strata::kernels::SamplerParams& p, int row) {
+    int n_keep = k;
+    float mx = sel.logit[0];
+    for (int i = 1; i < k; ++i) mx = std::fmax(mx, sel.logit[(size_t) i]);
+    if (p.top_p < 1.0f) {
+        double sum = 0.0;
+        for (int i = 0; i < k; ++i) sum += std::exp((double) sel.logit[(size_t) i] - (double) mx);
+        double cum = 0.0;
+        int cut = k;
+        for (int i = 0; i < k; ++i) {
+            cum += std::exp((double) sel.logit[(size_t) i] - (double) mx) / sum;
+            if (cum >= (double) p.top_p) { cut = i + 1; break; }
+        }
+        if (cut < p.min_keep) cut = p.min_keep < k ? p.min_keep : k;
+        n_keep = cut;
+    }
+    if (p.min_p > 0.0f) {
+        const float thresh = sel.logit[0] + std::log(p.min_p);
+        for (int i = 0; i < n_keep; ++i)
+            if (sel.logit[(size_t) i] < thresh) { n_keep = i; break; }
+    }
+    const float inv_t = p.temperature > 0.0f ? 1.0f / p.temperature : 0.0f;
+    auto scaled = [&](int i) { return sel.logit[(size_t) i] * inv_t; };
+    float smx = scaled(0);
+    for (int i = 1; i < n_keep; ++i) smx = std::fmax(smx, scaled(i));
+    double sum = 0.0;
+    for (int i = 0; i < n_keep; ++i) sum += std::exp((double) scaled(i) - (double) smx);
+    const float u = host_philox_uniform(p.seed, p.counter + (uint64_t) row);
+    double cum = 0.0;
+    int pick = sel.ids[(size_t) (n_keep > 0 ? n_keep - 1 : 0)];
+    for (int i = 0; i < n_keep; ++i) {
+        cum += std::exp((double) scaled(i) - (double) smx) / sum;
+        if ((double) u < cum) { pick = sel.ids[(size_t) i]; break; }
+    }
+    return pick;
+}
+
+int sampled_k(int top_k, int nv) { return std::min(nv, (top_k > 0 && top_k < 64) ? top_k : 64); }
+
+// Rows uploaded once and sampled under many parameter sets: `sample` returns the picks of one launch on `stream`
+// (nullptr: the legacy stream), -1 prefilled as in `run`.
+struct DeviceRows {
+    float* l = nullptr;
+    int* h = nullptr;
+    int* o = nullptr;
+    int n_tokens = 0, nv = 0, hist_len = 0;
+    DeviceRows(const std::vector<float>& logits, int n_tokens_, const std::vector<int>& hist, int hist_len_)
+        : n_tokens(n_tokens_), nv((int) (logits.size() / (size_t) n_tokens_)), hist_len(hist_len_) {
+        check(DPCT_CHECK_ERROR(l = sycl::malloc_device<float>(
+                                   logits.size(), dpct::get_in_order_queue())),
+              "malloc logits");
+        check(
+            DPCT_CHECK_ERROR(o = sycl::malloc_device<int>(
+                                 (size_t)n_tokens, dpct::get_in_order_queue())),
+            "malloc out");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  l, logits.data(), logits.size() * sizeof(float)).wait()),
+              "copy");
+        if (hist_len > 0) {
+            check(
+                DPCT_CHECK_ERROR(h = sycl::malloc_device<int>(
+                                     hist.size(), dpct::get_in_order_queue())),
+                "malloc hist");
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                      h, hist.data(), hist.size() * sizeof(int)).wait()),
+                  "copy hist");
+        }
+    }
+    DeviceRows(const DeviceRows&) = delete;
+    DeviceRows& operator=(const DeviceRows&) = delete;
+    ~DeviceRows() {
+        sycl::free(l, dpct::get_in_order_queue());
+        sycl::free(o, dpct::get_in_order_queue());
+        if (h) sycl::free(h, dpct::get_in_order_queue());
+    }
+    std::vector<int> sample(const strata::kernels::SamplerParams &p,
+                            dpct::queue_ptr stream) {
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memset(o, 0xFF, (size_t)n_tokens * sizeof(int))
+                      .wait()),
+              "fill out");
+        strata::kernels::sample_tokens(l, n_tokens, nv, h, hist_len, p, o, stream);
+        if (stream != &dpct::get_in_order_queue())
+            check(DPCT_CHECK_ERROR(stream->wait()), "stream sync");
+        std::vector<int> got((size_t) n_tokens);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got.data(), o, got.size() * sizeof(int))
+                      .wait()),
+              "back");
+        return got;
+    }
+};
+
+// The counted window of row t: the last min(penalty_last_n, hist_len) entries (none without penalties).
+std::vector<int> window_of(const std::vector<int>& hist, int hist_len, int t, int last_n) {
+    if (hist_len <= 0 || last_n <= 0) return {};
+    const int h = std::min(last_n, hist_len);
+    const int* row = hist.data() + (size_t) t * hist_len;
+    return std::vector<int>(row + (hist_len - h), row + hist_len);
+}
+
+// `--bench`: the sampled path alone at the engine's vocabulary, per call, on the path the environment selects.
+void bench_sampled() {
+    const int NV = 248320;
+    dpct::queue_ptr s = &dpct::get_in_order_queue();
+    check(DPCT_CHECK_ERROR(s = dpct::get_current_device().create_queue(true)),
+          "stream");
+    std::mt19937 rng(20);
+    std::normal_distribution<float> g(0.0f, 3.0f);
+    for (int T : {1, 4, 8}) {
+        std::vector<float> l((size_t) NV * T);
+        for (auto& v : l) v = g(rng);
+        float* d_l = nullptr;
+        int* d_o = nullptr;
+        check(DPCT_CHECK_ERROR(d_l = sycl::malloc_device<float>(
+                                   l.size(), dpct::get_in_order_queue())),
+              "bench logits");
+        check(DPCT_CHECK_ERROR(d_o = sycl::malloc_device<int>(
+                                   (size_t)T, dpct::get_in_order_queue())),
+              "bench out");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_l, l.data(), l.size() * sizeof(float)).wait()),
+              "bench copy");
+        for (int k : {20, 64}) {
+            strata::kernels::SamplerParams p;
+            p.top_k = k; p.top_p = 0.95f; p.temperature = 0.7f; p.seed = 1;
+            for (int w = 0; w < 3; ++w) strata::kernels::sample_tokens(d_l, T, NV, nullptr, 0, p, d_o, s);
+            check(DPCT_CHECK_ERROR(s->wait()), "bench warmup");
+            dpct::event_ptr e0, e1;
+            check(DPCT_CHECK_ERROR(e0 = new sycl::event()), "event");
+            check(DPCT_CHECK_ERROR(e1 = new sycl::event()), "event");
+            const int iters = 50;
+            /*
+            DPCT1024: The original code returned the error code that was
+            further consumed by the program logic. This original code was
+            replaced with 0. You may need to rewrite the program logic consuming
+            the error code.
+            */
+            check(DPCT_CHECK_ERROR(dpct::sync_barrier(e0, s)), "record");
+            for (int it = 0; it < iters; ++it) {
+                p.counter = (uint64_t) it;
+                strata::kernels::sample_tokens(d_l, T, NV, nullptr, 0, p, d_o, s);
+            }
+            /*
+            DPCT1024: The original code returned the error code that was
+            further consumed by the program logic. This original code was
+            replaced with 0. You may need to rewrite the program logic consuming
+            the error code.
+            */
+            check(DPCT_CHECK_ERROR(dpct::sync_barrier(e1, s)), "record");
+            check(DPCT_CHECK_ERROR(e1->wait_and_throw()), "bench sync");
+            float ms = 0.0f;
+            check(DPCT_CHECK_ERROR(
+                      ms = (e1->get_profiling_info<
+                                sycl::info::event_profiling::command_end>() -
+                            e0->get_profiling_info<
+                                sycl::info::event_profiling::command_start>()) /
+                           1000000.0f),
+                  "elapsed");
+            std::printf("  bench: n_vocab %d, rows %d, top_k %2d, top_p 0.95: %8.1f us per call\n", NV, T, k,
+                        1000.0 * (double) ms / iters);
+            dpct::destroy_event(e0);
+            dpct::destroy_event(e1);
+        }
+        sycl::free(d_l, dpct::get_in_order_queue());
+        sycl::free(d_o, dpct::get_in_order_queue());
+    }
+    dpct::get_current_device().destroy_queue(s);
+}
+
 }  // namespace
 
 int main(int argc, char** argv) {
-    bool selftest = false;
+    bool selftest = false, bench = false;
     for (int i = 1; i < argc; ++i) {
         if (std::string(argv[i]) == "--selftest") selftest = true;
-        else { std::fprintf(stderr, "usage: sampler_parity [--selftest]\n"); return 2; }
+        else if (std::string(argv[i]) == "--bench") bench = true;
+        else { std::fprintf(stderr, "usage: sampler_parity [--selftest] [--bench]\n"); return 2; }
+    }
+    {
+        // the sampled path under test; ctest runs this binary once per path
+        auto on = [](const char* n) { const char* e = std::getenv(n); return e && *e && std::strcmp(e, "0") != 0; };
+        std::printf("  sampled path: %s\n", on("STRATA_OLD_SAMPLER")         ? "sampler_kernel (STRATA_OLD_SAMPLER)"
+                                            : on("STRATA_SAMPLER_ONE_BLOCK") ? "one block (STRATA_SAMPLER_ONE_BLOCK)"
+                                                                             : "split top_k (default)");
+    }
+    if (bench) {
+        bench_sampled();
+        return 0;
     }
     int bad = 0;
     const int NV = 512, NT = 4;
@@ -922,6 +1166,286 @@ int main(int argc, char** argv) {
             sycl::free(output, dpct::get_in_order_queue());
     }
 
+    // ---- fixture 16: THE WHOLE top_k LIST, POSITION BY POSITION, UNDER TIES.  A pick shows the list
+    // through one draw; this reads the list itself.  Every row holds a +inf logit, so the tail's arithmetic is NaN
+    // (inf - inf), no cut fires and no draw lands: the chain returns its LAST kept entry, sel_ids[k - 1].  Launching
+    // top_k = 1..64 then reads the list one position at a time - its set and its order.  The rows make the order
+    // rest on the tie rule: hundreds of logits share the top finite values, spread over every split block, warp and
+    // lane; -0 and +0 tie; -inf and NaN are mixed in; a row has fewer finite logits than 64 (the sentinel id 0 must
+    // come out); a penalised row lands its penalised tokens exactly on other tokens' values.  Vocabularies: the
+    // engine's 248,320 (a partial last split block), 100,003, 262,144 (the widest split), 262,145 (one more: the
+    // one-block fallback) and 1,000.
+    {
+        const float inf = std::numeric_limits<float>::infinity();
+        const float qnan = std::numeric_limits<float>::quiet_NaN();
+        int wrong = 0, probes = 0, sentinels = 0;
+        for (int nv : {248320, 100003, 262144, 262145, 1000}) {
+            const int T = 4, H = 64;
+            std::mt19937 rng((unsigned) (1600 + nv));
+            std::normal_distribution<float> g(0.0f, 1.0f);
+            std::vector<float> l((size_t) nv * T);
+            for (auto& v : l) v = std::floor(g(rng) * 4.0f) / 4.0f;          // quarter steps: ties everywhere
+            auto spread = [&](int j) { return (int) (((int64_t) j * 7919 + 13) % nv); };
+            // row 0: 20 logits at 6.25 and 300 at 6.0 over the whole row, two +inf
+            float* r0 = l.data();
+            for (int j = 0; j < 320; ++j) r0[spread(j)] = j < 20 ? 6.25f : 6.0f;
+            r0[nv / 2] = inf;
+            r0[nv - 1] = inf;
+            // row 1: nothing above 0, every zero signed by its id's parity (-0 at even ids), one +inf
+            float* r1 = l.data() + (size_t) nv;
+            for (int v = 0; v < nv; ++v) {
+                r1[v] = -std::fabs(r1[v]);
+                if (r1[v] == 0.0f) r1[v] = (v & 1) ? 0.0f : -0.0f;
+            }
+            r1[3] = inf;
+            // row 2: -inf everywhere but ten finite logits (two values), two NaN and a +inf: 11 candidates in all
+            float* r2 = l.data() + (size_t) 2 * nv;
+            for (int v = 0; v < nv; ++v) r2[v] = -inf;
+            for (int j = 0; j < 10; ++j) r2[spread(j + 400)] = j < 5 ? 1.0f : 0.5f;
+            r2[spread(500)] = qnan;
+            r2[spread(501)] = qnan;
+            r2[spread(502)] = inf;
+            // row 3: penalties.  Window ids on block and warp edges, repeats, and ids outside the vocabulary; the
+            // penalised tokens sit at 9.0, which repeat 2 / freq 0.25 / present 0.5 turns into 4.0 - 0.25 x count
+            // (3.75, 3.5, ...), values the quarter-step logits share.
+            float* r3 = l.data() + (size_t) 3 * nv;
+            std::vector<int> hist((size_t) T * H, -1);
+            int* h3 = hist.data() + (size_t) 3 * H;
+            const int edges[] = {0, 1023, 1024, 4095, 4096, 8191, 8192, 12345, nv / 2 + 1, nv - 2};
+            int hn = 0;
+            for (int e : edges)
+                if (e < nv && e != nv / 2) {
+                    h3[hn++] = e;
+                    if (hn % 3 == 0) h3[hn++] = e;                              // counted twice
+                    r3[e] = 9.0f;
+                }
+            h3[hn++] = nv;                                                      // ignored: outside
+            h3[hn++] = nv + 77;
+            h3[hn++] = -5;
+            for (int j = 0; j < 30; ++j) r3[spread(j + 600)] = j < 15 ? 3.75f : 3.5f;
+            r3[nv / 2] = inf;                                                   // not in the window
+
+            strata::kernels::SamplerParams base;
+            base.top_p = 1.0f; base.min_p = 0.0f; base.temperature = 0.8f; base.seed = 16;
+            base.penalty_last_n = H; base.penalty_repeat = 2.0f; base.penalty_freq = 0.25f;
+            base.penalty_present = 0.5f;
+            const int kmax = sampled_k(64, nv);
+            std::vector<SelList> lists;
+            for (int t = 0; t < T; ++t)
+                lists.push_back(mirror_select(l.data() + (size_t) t * nv, nv, window_of(hist, H, t, H), base, kmax));
+            DeviceRows rows(l, T, hist, H);
+            for (int top_k = 0; top_k <= 66; ++top_k) {
+                strata::kernels::SamplerParams p = base;
+                p.top_k = top_k == 65 ? 100 : top_k == 66 ? -3 : top_k;       // 0, 100 and -3 mean 64
+                p.top_p = (top_k & 1) ? 0.5f : 1.0f;                            // both tail branches (NaN: no cut)
+                p.counter = (uint64_t) top_k;
+                const int k = sampled_k(p.top_k, nv);
+                const std::vector<int> got =
+                    rows.sample(p, &dpct::get_in_order_queue());
+                for (int t = 0; t < T; ++t) {
+                    const int want = lists[(size_t) t].ids[(size_t) (k - 1)];
+                    sentinels += (t == 2 && k > 11);
+                    ++probes;
+                    if (got[(size_t) t] != want) {
+                        if (wrong < 8)
+                            std::printf("    n_vocab %d row %d top_k %d: position %d want id %d got %d\n", nv, t,
+                                        p.top_k, k - 1, want, got[(size_t) t]);
+                        ++wrong;
+                    }
+                }
+            }
+        }
+        // the fixture must reach the sentinel (row 2 has 11 candidates) or it cannot see the "nothing left" rule
+        std::printf("  %-34s %s (%d of %d positions differ; %d sentinel positions)\n", "top_k list under ties",
+                    wrong || !sentinels ? "*** WRONG ***" : "matches", wrong, probes, sentinels);
+        bad += wrong + (sentinels == 0);
+    }
+
+    // ---- fixture 17: SAMPLED DRAWS UNDER TIES.  The realistic chain - finite logits on half steps,
+    // so dozens of tokens share each value near the top - through every stage: top_k 1 / 20 / 64, top_p 0.9 / 1,
+    // min_p 0 / 0.05, a hot temperature that spreads the draws over the whole list, penalties off and on (half of
+    // each window on the row's head, so they reorder it).  17 rows (the split's scratch is first sized for 16: this
+    // regrows it), on the legacy stream and on a created one.  Observability: some picks must be tokens that tie
+    // with another kept token, or the tie rule would go untested.
+    {
+        const int T = 17, H = 64;
+        dpct::queue_ptr cs = &dpct::get_in_order_queue();
+        check(DPCT_CHECK_ERROR(
+                  cs = dpct::get_current_device().create_queue(true)),
+              "fixture 17 stream");
+        int wrong = 0, draws = 0, tied = 0;
+        for (int nv : {248320, 512}) {
+            std::mt19937 rng((unsigned) (1700 + nv));
+            std::normal_distribution<float> g(0.0f, 1.5f);
+            std::vector<float> l((size_t) nv * T);
+            for (auto& v : l) v = std::floor(g(rng) * 2.0f) / 2.0f;
+            if (nv == 512)
+                for (auto& v : l) v = std::floor(v / 2.0f);                    // whole steps: a few big tie groups
+            std::vector<int> hist((size_t) T * H);
+            for (int t = 0; t < T; ++t) {
+                const float* row = l.data() + (size_t) t * nv;
+                const float mx = *std::max_element(row, row + nv);
+                std::vector<int> head;
+                for (int v = 0; v < nv; ++v)
+                    if (row[v] >= mx - 1.0f) head.push_back(v);
+                for (int j = 0; j < H; ++j)
+                    hist[(size_t) t * H + j] = (j & 1) ? (int) (rng() % (unsigned) nv)
+                                                       : head[(size_t) (rng() % (unsigned) head.size())];
+            }
+            DeviceRows rows(l, T, hist, H);
+            int config = 0;
+            for (int pen = 0; pen < 2; ++pen) {
+                strata::kernels::SamplerParams base;
+                base.temperature = 2.5f; base.seed = 17;
+                base.penalty_last_n = pen ? H : 0;
+                base.penalty_repeat = 1.25f; base.penalty_freq = 0.25f; base.penalty_present = 0.5f;
+                const int kmax = sampled_k(64, nv);
+                std::vector<SelList> lists;
+                for (int t = 0; t < T; ++t)
+                    lists.push_back(mirror_select(l.data() + (size_t) t * nv, nv, window_of(hist, H, t, base.penalty_last_n),
+                                                  base, kmax));
+                for (int top_k : {1, 20, 64})
+                    for (float top_p : {0.9f, 1.0f})
+                        for (float min_p : {0.0f, 0.05f})
+                            for (dpct::queue_ptr st :
+                                 {(dpct::queue_ptr)&dpct::get_in_order_queue(),
+                                  cs}) {
+                                strata::kernels::SamplerParams p = base;
+                                p.top_k = top_k; p.top_p = top_p; p.min_p = min_p;
+                                p.counter = (uint64_t) (1000 * ++config);
+                                const int k = sampled_k(top_k, nv);
+                                const std::vector<int> got = rows.sample(p, st);
+                                for (int t = 0; t < T; ++t) {
+                                    const SelList& sl = lists[(size_t) t];
+                                    const int want = mirror_pick(sl, k, p, t);
+                                    ++draws;
+                                    int same = 0;
+                                    for (int i = 0; i < k; ++i) {
+                                        if (sl.ids[(size_t) i] != want) continue;
+                                        for (int j = 0; j < k; ++j) same += sl.logit[(size_t) j] == sl.logit[(size_t) i];
+                                        break;
+                                    }
+                                    tied += same > 1;
+                                    if (got[(size_t) t] != want) {
+                                        if (wrong < 8)
+                                            std::printf("    n_vocab %d row %d top_k %d top_p %.2f min_p %.2f pen %d: "
+                                                        "want %d got %d\n", nv, t, top_k, (double) top_p,
+                                                        (double) min_p, pen, want, got[(size_t) t]);
+                                        ++wrong;
+                                    }
+                                }
+                            }
+            }
+        }
+        dpct::get_current_device().destroy_queue(cs);
+        std::printf("  %-34s %s (%d of %d draws differ; %d picks tie with another kept token)\n",
+                    "sampled draws under ties", wrong || !tied ? "*** WRONG ***" : "matches", wrong, draws, tied);
+        bad += wrong + (tied == 0);
+    }
+
+    // ---- fixture 18: THE DEFAULT PATH'S AUTOMATIC FALLBACKS.  (a) A stream under graph capture
+    // (ThreadLocal mode) gets the one-block kernel, penalty bitmap in dynamic shared memory, inside the graph: the
+    // capture must succeed and the replayed graph (twice) must pick the mirror's tokens; the same stream uncaptured
+    // then takes the split path (its scratch is first allocated after the capture) and picks the same.  (b) More
+    // rows than a split launch takes (64) fall back to one block; exactly 64 stay split.
+    {
+        int wrong = 0, draws = 0;
+        const int H = 64;
+        auto compare = [&](const char* what, const std::vector<int>& got, const std::vector<SelList>& lists, int k,
+                           const strata::kernels::SamplerParams& p) {
+            for (size_t t = 0; t < got.size(); ++t) {
+                const int want = mirror_pick(lists[t], k, p, (int) t);
+                ++draws;
+                if (got[t] != want) {
+                    if (wrong < 8) std::printf("    %s row %zu: want %d got %d\n", what, t, want, got[t]);
+                    ++wrong;
+                }
+            }
+        };
+        auto make = [&](int nv, int T, unsigned seed, std::vector<float>& l, std::vector<int>& hist) {
+            std::mt19937 rng(seed);
+            std::normal_distribution<float> g(0.0f, 1.5f);
+            l.assign((size_t) nv * T, 0.0f);
+            for (auto& v : l) v = std::floor(g(rng) * 2.0f) / 2.0f;
+            hist.assign((size_t) T * H, 0);
+            for (auto& h : hist) h = (int) (rng() % (unsigned) nv);
+        };
+        {
+            const int nv = 248320, T = 3;
+            std::vector<float> l;
+            std::vector<int> hist;
+            make(nv, T, 1800u, l, hist);
+            strata::kernels::SamplerParams p;
+            p.top_k = 20; p.top_p = 0.9f; p.temperature = 2.5f; p.seed = 18; p.counter = 77;
+            p.penalty_last_n = H; p.penalty_repeat = 1.25f; p.penalty_freq = 0.25f; p.penalty_present = 0.5f;
+            const int k = sampled_k(p.top_k, nv);
+            std::vector<SelList> lists;
+            for (int t = 0; t < T; ++t)
+                lists.push_back(mirror_select(l.data() + (size_t) t * nv, nv, window_of(hist, H, t, H), p, k));
+            DeviceRows rows(l, T, hist, H);
+            dpct::queue_ptr cs = &dpct::get_in_order_queue();
+            check(DPCT_CHECK_ERROR(
+                      cs = dpct::get_current_device().create_queue(true)),
+                  "fixture 18 stream");
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue()
+                          .memset(rows.o, 0xFF, (size_t)T * sizeof(int))
+                          .wait()),
+                  "fixture 18 fill");
+            dpct::experimental::command_graph_ptr graph = nullptr;
+            dpct::experimental::command_graph_exec_ptr exec = nullptr;
+            check(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs)),
+                  "begin capture");
+            strata::kernels::sample_tokens(rows.l, T, nv, rows.h, H, p, rows.o, cs);
+            check(
+                DPCT_CHECK_ERROR(dpct::experimental::end_recording(cs, &graph)),
+                "end capture");
+            check(DPCT_CHECK_ERROR(
+                      exec = new sycl::ext::oneapi::experimental::command_graph<
+                          sycl::ext::oneapi::experimental::graph_state::
+                              executable>(graph->finalize())),
+                  "instantiate");
+            for (int replay = 0; replay < 2; ++replay) {
+                check(DPCT_CHECK_ERROR(
+                          dpct::get_in_order_queue()
+                              .memset(rows.o, 0xFF, (size_t)T * sizeof(int))
+                              .wait()),
+                      "fixture 18 refill");
+                check(DPCT_CHECK_ERROR(cs->ext_oneapi_graph(*exec)),
+                      "graph launch");
+                check(DPCT_CHECK_ERROR(cs->wait()), "graph sync");
+                std::vector<int> got((size_t) T);
+                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                           .memcpy(got.data(), rows.o,
+                                                   got.size() * sizeof(int))
+                                           .wait()),
+                      "back");
+                compare("captured graph", got, lists, k, p);
+            }
+            delete (exec);
+            delete (graph);
+            compare("same stream, uncaptured", rows.sample(p, cs), lists, k, p);
+            dpct::get_current_device().destroy_queue(cs);
+        }
+        for (int T : {64, 70}) {
+            const int nv = 512;
+            std::vector<float> l;
+            std::vector<int> hist;
+            make(nv, T, 1810u + (unsigned) T, l, hist);
+            strata::kernels::SamplerParams p;
+            p.top_k = 64; p.top_p = 1.0f; p.temperature = 2.5f; p.seed = 18; p.counter = (uint64_t) T;
+            const int k = sampled_k(p.top_k, nv);
+            std::vector<SelList> lists;
+            for (int t = 0; t < T; ++t) lists.push_back(mirror_select(l.data() + (size_t) t * nv, nv, {}, p, k));
+            DeviceRows rows(l, T, hist, 0);
+            compare(T > 64 ? "70 rows (one block)" : "64 rows (split)",
+                    rows.sample(p, &dpct::get_in_order_queue()), lists, k, p);
+        }
+        std::printf("  %-34s %s (%d of %d draws differ)\n", "fallbacks: graph capture, row cap",
+                    wrong ? "*** WRONG ***" : "matches", wrong, draws);
+        bad += wrong;
+    }
+
     std::printf("\nsampler: %d failures\n", bad);
     if (bad) return 1;
     if (selftest) std::printf("sampler_parity OK\n");
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index 81c0523da9e..cfafd1f103b 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -599,6 +599,131 @@ auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
 #pragma unroll
     for (int r = 0; r < RPG; ++r) base[r * rs] = s[r];
 }
+// gdn_rec_cols_kernel with the next token's inputs (q/k rows, v, gate, beta) loaded into registers while this token
+// computes (software pipelining).  The same arithmetic in the same order: the same bits, and the same CB-column split.
+// STRATA_GDN_PIPELINE=0: gdn_rec_cols_kernel.
+/*
+DPCT1110: The total declared local variable size in device function
+gdn_rec_cols_pipe_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gdn_rec_cols_pipe_kernel(float *__restrict__ state,
+                                              const float *__restrict__ h,
+                                              const float *__restrict__ gate,
+                                              const float *__restrict__ beta,
+                                              float *__restrict__ oc_out,
+                                              int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int NT = CB * RG,
+                  LPT = S / NT; // threads, q/k rows loaded per thread
+    auto &sk = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sq = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[S]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &red =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[RG][CB]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int head = item_ct1.get_group(2) / NCB,
+              cb = item_ct1.get_group(2) % NCB;
+    const int c = item_ct1.get_local_id(2), rg = item_ct1.get_local_id(1),
+              tid = rg * CB + c, col = cb * CB + c;
+    const int qh = head % HK;
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * HV + head) * S + col;
+    const size_t rs = (size_t) HV * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * rs];
+    float nq[LPT], nk[LPT], nv = 0.0f, ng = 0.0f, nb = 0.0f;
+    auto fetch = [&](int64_t t) {
+        const float* ht = h + t * C;
+#pragma unroll
+        for (int u = 0; u < LPT; ++u) { nq[u] = ht[qh * S + tid + u * NT]; nk[u] = ht[HK * S + qh * S + tid + u * NT]; }
+        nv = ht[2 * HK * S + head * S + col];
+        ng = gate[t * HV + head];
+        nb = beta[t * HV + head];
+    };
+    if (T > 0) fetch(0);
+    for (int64_t t = 0; t < T; ++t) {
+        float cq[LPT], ck[LPT];
+#pragma unroll
+        for (int u = 0; u < LPT; ++u) { cq[u] = nq[u]; ck[u] = nk[u]; }
+        const float cv = nv, cg = ng, cbt = nb;
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+#pragma unroll
+        for (int u = 0; u < LPT; ++u) { sq[tid + u * NT] = cq[u]; sk[tid + u * NT] = ck[u]; }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (t + 1 < T) fetch(t + 1);
+        const float g = sycl::native::exp(cg);
+        float kv = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r)
+            kv = sycl::fma(s[r], sk[rg * RPG + r], kv);
+        red[rg][c] = kv;
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const float kv_col = red[0][c] + red[1][c] + red[2][c] + red[3][c];
+        const float delta = (cv - g * kv_col) * cbt;
+        float o = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) {
+            s[r] = sycl::fma((float)g, s[r], sk[rg * RPG + r] * delta);
+            o = sycl::fma(s[r], sq[rg * RPG + r], o);
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        red[rg][c] = o;
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (rg == 0) oc_out[t * HV * S + head * S + col] =
+            (red[0][c] + red[1][c] + red[2][c] + red[3][c]) *
+            sycl::rsqrt((float)S);
+    }
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) base[r * rs] = s[r];
+}
 __dpct_inline__ void gdn_out_norm_kernel(const float *__restrict__ z,
                                          const float *__restrict__ gamma,
                                          float eps, float *__restrict__ y,
@@ -987,7 +1112,7 @@ void kv_append(const float* K, const float* V, int64_t T, int64_t pos0, const in
                         stage ? *stage : strata::kernels::KvHostPools{};
 
                 cgh.parallel_for<
-                    dpct_kernel_name<class kv_append_kernel_c8a7c1>>(
+                    dpct_kernel_name<class kv_append_kernel_850222>>(
                     sycl::nd_range<3>(sycl::range(8, 2, (unsigned)T) *
                                           sycl::range(1, 1, 64),
                                       sycl::range(1, 1, 64)),
@@ -1011,7 +1136,7 @@ void to_f16(const float* x, uint16_t* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class to_f16_kernel_286314>>(
+            ->parallel_for<dpct_kernel_name<class to_f16_kernel_c8575f>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -1031,7 +1156,7 @@ void round_f16(const float* x, float* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class round_f16_kernel_3fea66>>(
+            ->parallel_for<dpct_kernel_name<class round_f16_kernel_877aa1>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -1051,7 +1176,7 @@ void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_b87029>>(
+            ->parallel_for<dpct_kernel_name<class to_bf16_kernel_44d81a>>(
                 sycl::nd_range<3>(sycl::range(1, 1,
                                               (unsigned)((n + 255) / 256 < 4096
                                                              ? (n + 255) / 256
@@ -1071,7 +1196,7 @@ void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_norm_kernel_7ac11f>>(
+            ->parallel_for<dpct_kernel_name<class gr_norm_kernel_f38542>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1089,7 +1214,7 @@ void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint1
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_norm_rs_kernel_44cb02>>(
+            ->parallel_for<dpct_kernel_name<class gr_norm_rs_kernel_6c01ba>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1108,7 +1233,7 @@ void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_mix_r_kernel_c2a1de>>(
+            ->parallel_for<dpct_kernel_name<class gr_mix_r_kernel_a64dc1>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1127,7 +1252,7 @@ void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_l
 
         strata::q_of(stream)
             ->parallel_for<
-                dpct_kernel_name<class gr_write_norm_rs_kernel_d03793>>(
+                dpct_kernel_name<class gr_write_norm_rs_kernel_85f8e9>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * HC)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1149,7 +1274,7 @@ void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream) {
             ->submit([&](sycl::handler &cgh) {
                 auto T_LR_ct2 = T * LR;
 
-                cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_61274c>>(
+                cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_f26d34>>(
                     sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * LR)) *
                                           sycl::range(1, 1, 256),
                                       sycl::range(1, 1, 256)),
@@ -1167,7 +1292,7 @@ void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_mix_kernel_9ba6d6>>(
+            ->parallel_for<dpct_kernel_name<class gr_mix_kernel_d9dd98>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1183,7 +1308,7 @@ void gr_write(float* R, const float* bo, const float* inj, int64_t inj_ld, int64
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_write_kernel_24cfed>>(
+            ->parallel_for<dpct_kernel_name<class gr_write_kernel_b96cec>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1199,7 +1324,7 @@ void gr_broadcast(const float* e, float* R, int64_t T, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gr_broadcast_kernel_73ae1d>>(
+            ->parallel_for<dpct_kernel_name<class gr_broadcast_kernel_3dedc6>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * D)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1215,7 +1340,7 @@ void gdn_gates(const float* ab, const float* dt, const float* ssm_a, float* gate
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_gates_kernel_850222>>(
+            ->parallel_for<dpct_kernel_name<class gdn_gates_kernel_e66d35>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * HV)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1232,7 +1357,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_8fa65c>>(
+            ->parallel_for<dpct_kernel_name<class gdn_conv_kernel_df787b>>(
                 sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
                                       sycl::range(1, 1, 128),
                                   sycl::range(1, 1, 128)),
@@ -1246,7 +1371,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_conv_tiled_kernel_915839>>(
+                    dpct_kernel_name<class gdn_conv_tiled_kernel_532f01>>(
                     sycl::nd_range<3>(
                         sycl::range(1,
                                     (unsigned)((T + CONV_TILE - 1) / CONV_TILE),
@@ -1263,7 +1388,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_conv_hist_kernel_1d17e3>>(
+                    dpct_kernel_name<class gdn_conv_hist_kernel_e391a1>>(
                     sycl::nd_range<3>(sycl::range(1, 1, C / 128) *
                                           sycl::range(1, 1, 128),
                                       sycl::range(1, 1, 128)),
@@ -1277,7 +1402,7 @@ void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, i
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_877aa1>>(
+            ->parallel_for<dpct_kernel_name<class gdn_l2_kernel_d82250>>(
                 sycl::nd_range<3>(sycl::range(1, (unsigned)T, 2 * HK) *
                                       sycl::range(1, 1, S),
                                   sycl::range(1, 1, S)),
@@ -1302,7 +1427,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gdn_rec_kernel_6a2bf0>>(
+            ->parallel_for<dpct_kernel_name<class gdn_rec_kernel_923fed>>(
                 sycl::nd_range<3>(sycl::range(1, 1, HV) * sycl::range(1, RG, S),
                                   sycl::range(1, RG, S)),
                 exp_props,
@@ -1312,13 +1437,28 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
                                        y16, T);
                     });
     } else {
+        static const bool pipe = [] { const char* v = std::getenv("STRATA_GDN_PIPELINE"); return v == nullptr || std::atoi(v) != 0; }();
+        if (pipe)   // the software-pipelined loads (same bits)
         {
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_rec_cols_kernel_64239d>>(
+                    dpct_kernel_name<class gdn_rec_cols_pipe_kernel_c6cea3>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, HV * NCB) *
+                                          sycl::range(1, RG, CB),
+                                      sycl::range(1, RG, CB)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gdn_rec_cols_pipe_kernel(state, h, gate, beta, y, T);
+                    });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_rec_cols_kernel_496541>>(
                     sycl::nd_range<3>(sycl::range(1, 1, HV * NCB) *
                                           sycl::range(1, RG, CB),
                                       sycl::range(1, RG, CB)),
@@ -1332,7 +1472,7 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
 
             strata::q_of(stream)
                 ->parallel_for<
-                    dpct_kernel_name<class gdn_out_norm_kernel_237731>>(
+                    dpct_kernel_name<class gdn_out_norm_kernel_43e92c>>(
                     sycl::nd_range<3>(sycl::range(1, HV, (unsigned)T) *
                                           sycl::range(1, 1, S),
                                       sycl::range(1, 1, S)),
@@ -1352,7 +1492,7 @@ void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class route_kernel_a33365,
+            ->parallel_for<dpct_kernel_name<class route_kernel_4f80f3,
                                             dpct_kernel_scalar<16>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
                                       sycl::range(1, 1, 256),
@@ -1368,7 +1508,7 @@ void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class route_kernel_f9493d,
+            ->parallel_for<dpct_kernel_name<class route_kernel_c02f30,
                                             dpct_kernel_scalar<8>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((T + 7) / 8)) *
                                       sycl::range(1, 1, 256),
@@ -1388,7 +1528,7 @@ void blob_dequant(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* s
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_1db2df,
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_50ffea,
                                             dpct_kernel_scalar<false>>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
@@ -1406,7 +1546,7 @@ void blob_dequant_f16(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, voi
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_ee9bfb,
+            ->parallel_for<dpct_kernel_name<class blob_dequant_kernel_cd530c,
                                             dpct_kernel_scalar<true>>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(1280LL * 640 + 2560LL * 160)) *
@@ -1425,7 +1565,7 @@ void swiglu_interleaved(const float* gu, uint16_t* h16, int64_t n, void* stream)
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class swiglu_il_kernel_458d6e>>(
+            ->parallel_for<dpct_kernel_name<class swiglu_il_kernel_98d495>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1441,7 +1581,7 @@ void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void*
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class swiglu_pair_kernel_ddbac5>>(
+            ->parallel_for<dpct_kernel_name<class swiglu_pair_kernel_ab28da>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(n * 640)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1473,7 +1613,7 @@ void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class copy_i32_kernel_7676d1>>(
+            ->parallel_for<dpct_kernel_name<class copy_i32_kernel_1c95ea>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (unsigned)(b < 256 ? b : 256)) *
                         sycl::range(1, 1, 256),
@@ -1491,7 +1631,7 @@ void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gather_rows16_kernel_225b7e>>(
+            ->parallel_for<dpct_kernel_name<class gather_rows16_kernel_d9d697>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, blocks_for(n * (width / 8))) *
                         sycl::range(1, 1, 256),
@@ -1509,7 +1649,7 @@ void moe_combine(const float* Dm, const int32_t* slot, const float* w, const flo
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class moe_combine_kernel_d82250>>(
+            ->parallel_for<dpct_kernel_name<class moe_combine_kernel_60f865>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * N)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1526,7 +1666,7 @@ void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld,
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class rms_rows_kernel_c94646>>(
+            ->parallel_for<dpct_kernel_name<class rms_rows_kernel_c88408>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)rows) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1549,7 +1689,7 @@ void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t p
                 auto strata_kernels_mrope_table_ct6 =
                     strata::kernels::mrope_table();
 
-                cgh.parallel_for<dpct_kernel_name<class rope_kernel_dccc17>>(
+                cgh.parallel_for<dpct_kernel_name<class rope_kernel_4d58b9>>(
                     sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * heads)) *
                                           sycl::range(1, 1, 32),
                                       sycl::range(1, 1, 32)),
@@ -1567,7 +1707,7 @@ void split_q(const float* q_full, float* q, int64_t T, void* stream) {
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class split_q_kernel_d499e3>>(
+            ->parallel_for<dpct_kernel_name<class split_q_kernel_83c16c>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
@@ -1583,7 +1723,7 @@ void gate_attn(const float* attn, const float* q_full, uint16_t* out16, int64_t
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class gate_attn_kernel_f391fd>>(
+            ->parallel_for<dpct_kernel_name<class gate_attn_kernel_3fc329>>(
                 sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * 24 * 256)) *
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index f7e43059cab..20cd884445a 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -4,6 +4,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/prefill/prefill.hpp"
+#include "strata/core/gguf_expert_source.hpp"
 #include "strata/core/mtp.hpp"
 #include "strata/core/progress.hpp"
 #include "strata/core/on_device.hpp"
@@ -84,6 +85,13 @@ double g_pinned_share = 1.0;
 inline int ring_slots(size_t T) {
     const char* v = std::getenv("STRATA_PREFILL_RING");
     const int r = v ? std::atoi(v) : (g_pinned_share >= 0.9 ? 384 : 96);
+    if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
+    // SYCL port: routed-only staging by default. The stream-all walk (every non-resident expert of every layer, copied
+    // ahead across layers) hangs on the B70 in its first large chunk - the copy engine stops on a barrier (xe resets bcs
+    // on kill) - with any ring size and either issuer, while the per-layer walk streams correctly (8,000 tokens with
+    // 4,051 streamed experts, 2026-09-30). STRATA_PREFILL_STREAM_ALL=1 restores it for debugging.
+    static const bool stream_all_ok = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_ALL"); return e && e[0] == '1'; }();
+    if (!stream_all_ok) return STAGE;
     const int big = r < 16 ? 16 : r > RING_MAX ? RING_MAX : r;
     return (int64_t) T >= STREAM_ALL_MIN ? big : STAGE;
 }
@@ -140,7 +148,8 @@ struct Stager {
     // D-5: the pinned ring's depth (STRATA_STAGER_RING, default 16) - how far the host copies can run ahead of the
     // DMAs of the unpinned experts' blobs
     int kRing = 16;
-    struct Job { const uint8_t* src; size_t bytes; };
+    // SYCL port: a job may name the expert instead of a host pointer - the thread reads it from the GGUF itself
+    struct Job { const uint8_t* src; size_t bytes; int64_t layer = -1; int64_t expert = -1; const core::GgufExpertSource* gsrc = nullptr; };
     std::vector<uint8_t*> buf;
     std::vector<char> pinned;
     std::vector<std::vector<uint8_t>> pageable;   // the fallback when no more RAM can be pinned
@@ -223,7 +232,15 @@ struct Stager {
                     while (issued.load(std::memory_order_acquire) <= j - kRing) std::this_thread::yield();
                     dma_done[b]->wait_and_throw();
                 }
-                std::memcpy(buf[b], jobs[(size_t) j].src, jobs[(size_t) j].bytes);
+                if (jobs[(size_t) j].gsrc != nullptr) {
+                    if (!jobs[(size_t) j].gsrc->read_into(jobs[(size_t) j].layer, jobs[(size_t) j].expert, buf[b], jobs[(size_t) j].bytes)) {
+                        std::fprintf(stderr, "prefill: reading expert %lld of layer %lld from the GGUF failed\n",
+                                     (long long) jobs[(size_t) j].expert, (long long) jobs[(size_t) j].layer);
+                        std::memset(buf[b], 0, jobs[(size_t) j].bytes);
+                    }
+                } else {
+                    std::memcpy(buf[b], jobs[(size_t) j].src, jobs[(size_t) j].bytes);
+                }
                 ready[(size_t) j].store(1, std::memory_order_release);
                 active.fetch_sub(1, std::memory_order_acq_rel);
             }
@@ -1067,6 +1084,7 @@ struct PfTimer {
 
 bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                   std::string &err) try {
+    err.clear();
     Impl& m = *impl_;
     const core::OnDevice on_device(m.device);
     const core::ModelGeometry& g = *m.g;
@@ -1273,6 +1291,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         std::vector<StreamEntry> seq;
         std::vector<size_t> seq_start;
         size_t issued = 0, consumed = 0;
+        static const bool plan_reads = [] { const char* v = std::getenv("STRATA_GGUF_PLAN_READ"); return v && v[0] == '1'; }();
+        const core::GgufExpertSource* gsrc = plan_reads ? nullptr : dynamic_cast<const core::GgufExpertSource*>(m.src);
         if (stream_all) {
             seq_start.assign((size_t) g.n_layers + 1, 0);
             std::vector<Stager::Job> js;
@@ -1280,12 +1300,18 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 seq_start[(size_t) l] = seq.size();
                 for (int32_t e = 0; e < m.g->n_expert; ++e) {
                     if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
-                    const uint8_t* b = m.src->blob(l, e);
-                    if (!b) { err = "prefill: expert source has no blob"; return false; }
+                    const uint8_t* b = nullptr;
                     int job = -1;
-                    if (!m.src->pinned(l, e)) {
+                    if (gsrc != nullptr) {   // read by the stager's thread when its turn comes (see Stager::Job)
                         job = (int) js.size();
-                        js.push_back({b, (size_t) lay0.blob_bytes(l)});
+                        js.push_back({nullptr, (size_t) lay0.blob_bytes(l), l, e, gsrc});
+                    } else {
+                        b = m.src->blob(l, e);
+                        if (!b) { err = "prefill: expert source has no blob"; return false; }
+                        if (!m.src->pinned(l, e)) {
+                            job = (int) js.size();
+                            js.push_back({b, (size_t) lay0.blob_bytes(l)});
+                        }
                     }
                     seq.push_back({(int32_t) l, e, b, job});
                 }
@@ -1882,9 +1908,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             const int32_t e = order[j];
                             if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
                             if (m.src->pinned(l, e)) continue;
+                            job_of[j] = (int) js.size();
+                            if (gsrc != nullptr) { js.push_back({nullptr, (size_t) lay.blob_bytes(l), l, e, gsrc}); continue; }
                             const uint8_t* b = m.src->blob(l, e);
                             if (!b) { err = "prefill: expert source has no blob"; return false; }
-                            job_of[j] = (int) js.size();
                             js.push_back({b, (size_t) lay.blob_bytes(l)});
                         }
                         m.stager->start(std::move(js));
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index e26a005c97b..a4309092420 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -323,8 +323,9 @@ void usage() {
                  "  --tokens-file PATH   pretokenized prompt, commas or whitespace (alternative to --tokens)\n"
                  "  --ple-gguf PATH      required PLE table (original second GGUF shard)\n"
                  "  --no-ple             explicit diagnostic ablation of the PLE layer\n"
-                 "  --ple-io direct|mmap  n-gram table reads (plan v0.3 P2). direct (default): unbuffered SSD\n"
-                 "                       reads, the table never enters RAM or the file cache; mmap: A/B arm\n"
+                 "  --ple-io direct|mmap|ram  n-gram table reads (plan v0.3 P2). direct (default): unbuffered SSD\n"
+                 "                       reads, the table never enters RAM or the file cache; mmap: A/B arm;\n"
+                 "                       ram: mmap with the whole table locked in RAM at start (Linux/macOS)\n"
                  "  --ple-row-cache N    bounded cache of fetched rows, 90 B each (default 1048576; 0 = off)\n"
                  "  --ple-inflight N     outstanding SSD reads (default 64)\n"
                  "  --ple-delay-us U     fault injection: each row read completes no earlier than U us\n"
@@ -1285,11 +1286,17 @@ int main(int argc, char** argv) {
         return 2;
     }
 
-    if ((o.ple_io != "direct" && o.ple_io != "mmap") || o.ple_row_cache < 0 || o.ple_inflight < 1 ||
+    if ((o.ple_io != "direct" && o.ple_io != "mmap" && o.ple_io != "ram") || o.ple_row_cache < 0 || o.ple_inflight < 1 ||
         o.ple_inflight > 1024 || !(o.ple_delay_us >= 0)) {
         std::fprintf(stderr, "strata generate: invalid --ple-io/--ple-row-cache/--ple-inflight/--ple-delay-us\n");
         return 2;
     }
+#if defined(_WIN32)
+    if (o.ple_io == "ram") {
+        std::fprintf(stderr, "strata generate: --ple-io ram is not available on Windows (no mlock); use --ple-io mmap\n");
+        return 2;
+    }
+#endif
     if (o.kv == "q4") o.kv = "q4_0";
     if (o.kv != "fp16" && o.kv != "int8" && o.kv != "q4_0" && o.kv != "k8v4") {
         std::fprintf(stderr, "strata generate: --kv must be fp16, int8, q4_0 or k8v4\n");
@@ -1414,16 +1421,21 @@ int main(int argc, char** argv) {
         }
     }
     const bool native_pack = strata::kernels::cpu::expert_layout().native;
-    if (o.expert_cache_remote[0] > 0) {
+    // STRATA_EARLY_REMOTE_CONTEXTS=1: create EVERY secondary context here, like CUDA1's.  Under WSL2 the driver's
+    // pinned/mapped host budget (dxg gpadl, ~1 GiB) is spent by CUDA0's weights and MTP before the later loop runs,
+    // and a new context then fails with cudaErrorMemoryAllocation (CUDA2: "cudaSetDevice(2) failed: out of memory").
+    const char* early_env = std::getenv("STRATA_EARLY_REMOTE_CONTEXTS");
+    const bool early_remote = early_env && early_env[0] == '1';
+    for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0 && (r == 0 || early_remote)) {
         // Keep CUDA1's proven startup order: initialise its context before
         // allocating GPU0 weights or mapping the large host expert arena.
         double free_gib = 0;
-        if (!strata::core::RemoteExperts::preflight(remote_dev[0], free_gib, err)) {
+        if (!strata::core::RemoteExperts::preflight(remote_dev[r], free_gib, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
         std::fprintf(stderr, "strata generate: CUDA%d context ready, %.2f GiB free before expert arena registration\n",
-                     remote_dev[0], free_gib);
+                     remote_dev[r], free_gib);
     }
     // plan v0.3 P6: the PCIe share of the missed experts, measured per kind of pack (the paper, finding on PCIe).
     // PR #44: a x8 link carries half of what the native default assumes - the GPU's SMs read that share over the
@@ -1623,6 +1635,22 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: session_init failed\n");
         return 1;
     }
+    // **A GENERATE RUN ON A NATIVE PACK NEVER ZEROED THE SESSION STATE.**  The canonical path zeroes it from
+    // `put_input` at position 0 (`session_zero`, with the embedding as `R`), but a native pack breaks out of that
+    // loop before the first `put_input` - it runs verify windows instead - and neither the batched prompt path
+    // nor the verifier zeroes anything.  `sbuf` is `cudaMalloc`'d, so the GDN recurrence, the QSA KV/indexer
+    // state, the PLE history and `R` all started from whatever the allocator last held: finite on a fresh
+    // allocation and overflow/NaN after reuse, which surfaced as the whole layer stack saturating and every
+    // prompt decoding to the same token.  `--serve` zeroes exactly this state when `resume == 0`; generate mode
+    // always starts from an empty sequence, so it must too.
+    // (#167) Every pack, not only a native one: a canonical pack whose prompt goes through the batched prompt path
+    // (--prefill) starts at position 0 without a put_input, so it never zeroed the state either.
+    strata::core::session_zero(ss, g, nullptr, main_cs);
+    if (DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()) !=
+        0) {
+        std::fprintf(stderr, "strata generate: zeroing the session state failed\n");
+        return 1;
+    }
     if (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1)
         std::fprintf(stderr, "strata generate: KV streaming: %lld of %lld cells per QSA layer in VRAM, the K/V in "
                              "%.2f GiB of pinned RAM\n", (long long) (ss.qsa_states[0].n_slots * 4),
@@ -1677,7 +1705,9 @@ int main(int argc, char** argv) {
     float* ple_scratch = nullptr;
     if (!o.ple_gguf.empty()) {
         strata::kernels::PleIoOptions pio;
-        pio.mode = o.ple_io == "mmap" ? strata::kernels::PleIo::Mmap : strata::kernels::PleIo::Direct;
+        pio.mode = o.ple_io == "mmap" || o.ple_io == "ram" ? strata::kernels::PleIo::Mmap : strata::kernels::PleIo::Direct;
+        pio.lock = o.ple_io == "ram";
+        const auto tpl = Clock::now();
         pio.max_inflight = (uint32_t) o.ple_inflight;
         pio.cache_rows = (uint64_t) o.ple_row_cache;
         pio.io_thread = !o.ple_sync_submit;
@@ -1685,6 +1715,10 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+        if (pio.lock)
+            std::fprintf(stderr, "strata generate: PLE table %s (--ple-io ram) in %.1f s\n",
+                         ple_table.locked() ? "locked in RAM" : "loaded (not locked)",
+                         std::chrono::duration<double>(Clock::now() - tpl).count());
         const strata::core::WeightRef* wk = wt.find("blk.1.ple_key.weight");
         const strata::core::WeightRef* wv = wt.find("blk.1.ple_value.weight");
         const strata::core::WeightRef* wnk = wt.find("blk.1.ple_norm_key.weight");
@@ -1884,7 +1918,7 @@ int main(int argc, char** argv) {
     }
     // Create the additional contexts after MTP has secured CUDA0 memory, but
     // before the host arena maps its expert pages into their address spaces.
-    for (int r = 1; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0) {
+    for (int r = 1; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0 && !early_remote) {
         double free_gib = 0;
         if (!strata::core::RemoteExperts::preflight(remote_dev[r], free_gib, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -2187,12 +2221,20 @@ int main(int argc, char** argv) {
         // (with borrowing - the default with a profile - the prompt path lends cache slots instead)
         const bool borrow = !o.no_prefill_borrow && !o.expert_profile.empty();
         const int64_t prefill_mib = (o.prefill_chunk > 0 && !borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
-        const int64_t reserve = ((int64_t) o.vram_reserve_mib + prefill_mib) << 20;
+        // the draft layer's head and logits are allocated when it binds, after this: 0.1.27's CJK subset made them
+        // ~110-180 MiB larger, and out of the reserve they left 16 GB cards below the stall line (#199)
+        const int64_t mtp_bind = (!o.mtp.empty() && native_head.loaded())
+                                     ? (int64_t) mtp.bind_bytes(native_head.row_bytes(), n_vocab) : 0;
+        const int64_t reserve = (((int64_t) o.vram_reserve_mib + prefill_mib) << 20) + mtp_bind;
         int64_t slots = ((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob;
         if (!profile.empty()) slots = std::min<int64_t>(slots, (int64_t) profile.size());
         o.expert_cache = (int) std::max<int64_t>(slots, 0);
-        std::fprintf(stderr, "strata generate: expert cache auto: %.2f GiB free, %d MiB reserved -> %d slots\n",
-                     (double) free_b / 1073741824.0, o.vram_reserve_mib, o.expert_cache);
+        std::fprintf(stderr, "strata generate: expert cache auto: %.2f GiB free, %d MiB reserved (+%lld MiB for the "
+                             "draft head) -> %d slots\n",
+                     (double) free_b / 1073741824.0, o.vram_reserve_mib, (long long) (mtp_bind >> 20), o.expert_cache);
+        if (o.expert_cache == 0)   // the verify window cannot start without it (#174): say what makes room
+            std::fprintf(stderr, "strata generate: no VRAM is left for the expert cache: lower --max-context, use "
+                                 "--kv k8v4, run images on the CPU, or close other programs that use the GPU\n");
     } else if (multi_gpu && o.expert_cache > 0) {
         // a layer split's prompt path has its own buffers (it borrows no slots): an explicit cache size leaves room
         // for them and the reserve, or the first prompt fails with "device buffers ... do not fit"
@@ -2268,6 +2310,7 @@ int main(int argc, char** argv) {
         // STRATA_TEST_CACHE_FAIL=N: the first N opens fail as an out-of-commit cudaMalloc does (tests the retry)
         int fake_fails = std::getenv("STRATA_TEST_CACHE_FAIL") ? std::atoi(std::getenv("STRATA_TEST_CACHE_FAIL")) : 0;
         int failed = 0;
+        int zero_reads = 0;
         for (int attempt = 0;; ++attempt) {
             bool ok = false;
             if (fake_fails > 0) {
@@ -2318,9 +2361,11 @@ int main(int argc, char** argv) {
             dpct::get_current_device().get_memory_info(free_b, total_b);
             const int64_t want = (int64_t) o.vram_reserve_mib << 20;
             if ((int64_t) free_b >= want - (64ll << 20)) break;
-            // short by (want - free); a figure of 0 only says "at least", so then give back a quarter as well
+            // short by (want - free); a figure of 0 only says "at least": the first two such reads give back 1 GiB
+            // each (under WDDM the free figure read before the allocation runs ~0.7 GiB high), later ones a quarter
             int64_t give = want - (int64_t) free_b + (64ll << 20);
-            if (free_b < ((size_t) 16 << 20)) give = std::max<int64_t>(give, xcache.bytes() / 4);
+            if (free_b < ((size_t) 16 << 20))
+                give = std::max<int64_t>(give, ++zero_reads <= 2 ? 1ll << 30 : xcache.bytes() / 4);
             const int64_t keep_bytes = xcache.bytes() - give;
             std::fprintf(stderr, "strata generate: only %lld MiB free once the slots are written (reserve %d MiB); "
                                  "shrinking the expert cache\n", (long long) (free_b >> 20), o.vram_reserve_mib);
@@ -3950,6 +3995,7 @@ int main(int argc, char** argv) {
                 ~BusyScope() { strata::core::progress().busy.store(false); strata::core::progress_at("idle"); }
             } busy_scope;
             stop_req.store(false);   // a STOP that arrived between requests is stale
+            err.clear();
             const bool geni = line.rfind("GENI ", 0) == 0;
             if (!geni && line.rfind("GEN ", 0) != 0) {
                 std::printf("ERR expected: GEN <max_new> <id,id,...> or GENI <max_new> <file> <id,id,...>\n");
@@ -4251,6 +4297,7 @@ int main(int argc, char** argv) {
             };
             // tokens [a, b) through the windows: commit all of them, then give the draft layer their residuals
             auto read_windows = [&](int64_t a, int64_t b, std::string& e) -> bool {
+                strata::core::progress_at("reading the prompt (verify windows), from token", a);   // #217: not "batched"
                 // every token is committed and the picks are discarded: no head sampling (see set_head_sampling)
                 struct NoHeadSampling {
                     strata::core::Verifier& v;
@@ -4403,6 +4450,7 @@ int main(int argc, char** argv) {
             int64_t at = read_from;
             for (const int64_t to : {reread_to, root_at, turn_at, n - 1}) {
                 if (to <= at) continue;
+                err.clear();
                 const bool win = windows_ok(at, to);
                 if (win && !refill(err)) {
                     std::printf("ERR refilling a lent slot failed: %s\n", err.c_str());
@@ -4424,6 +4472,19 @@ int main(int argc, char** argv) {
                     if (!stop_req.load()) {
                         std::fprintf(stderr, "strata serve: %s\n", err.c_str());
                         std::printf("ERR %s\n", err.c_str());
+                        // #224: a CUDA fault (an illegal address) poisons the context for the whole process, and
+                        // unwinding the destructors on it could hang until the 60 s watchdog: leave at once
+                        /*
+                        DPCT1010: SYCL uses exceptions to report errors and
+                        does not use the error codes. The cudaPeekAtLastError
+                        function call was replaced with 0. You need to rewrite
+                        this code.
+                        */
+                        if (0 != 0) {
+                            std::fflush(stdout);
+                            std::fflush(stderr);
+                            std::_Exit(1);
+                        }
                         return 1;
                     }
                     cancelled = true;   // stopped while reading the prompt: refill the lent slots below, then DONE cancel
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 3a75c1a56e7..17ebf1dd9ed 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -239,3 +239,9 @@ def verify(s):
 edit("include/strata/core/graph.hpp", lambda s: s.replace(
     "    std::chrono::time_point<std::chrono::steady_clock> done__ct1;", "    mutable std::chrono::time_point<std::chrono::steady_clock> done__ct1;"))
 print("files changed:", changed)
+
+# 0.1.29: a stream cast dpct leaves as cudaStream_t (sampler's capture check): the port's queue lookup.
+for rel in all_sources():
+    edit(str(rel), sub(r"\(\(cudaStream_t\)(\w+)\)->", r"strata::q_of(\1)->"))
+# 0.1.29: sycl::free takes void*; NativeEmbed frees a const device pointer.
+edit("src/core/native_head.cpp", lambda s: s.replace("sycl::free(dev_, dpct::get_in_order_queue())", "sycl::free((void *) dev_, dpct::get_in_order_queue())"))

From fc8a4dedb5cef2870a266f19006429d193ad5a9f Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 14:25:02 -0500
Subject: [PATCH 028/201] sycl: lend cache slots to the prompt path above a 32K
 context - 80,000 tokens at 1,062 tok/s, decode 35-40 after

Without borrowing, the VRAM reserve for the KV state and the chunk buffers evicts ~1,900 experts, the prompt
streams them (790 tok/s at 80,000 tokens) and decode after it runs at 2 tok/s. Borrowing lends ~940 slots and
refills them in ~1 s: 1,062 tok/s and 35-40 tok/s decode. It costs ~1 s per prompt at short contexts (2,184
tokens 610 vs 792 tok/s), so the default is by context: borrow above 32K. --prefill-borrow / --no-prefill-borrow
decide explicitly; layer splits keep their own buffers as before.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 |  8 ++++++--
 sycl/src/program/generate.cpp | 10 +++++++++-
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index bf4c1dbaffd..70f39066656 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -280,8 +280,12 @@ output tokens between paths, never only timings.
   dequant 12.7 s, QSA block selection 9.3 s (0.2 s at 8k: it scans every block of the context per query), gate/up
   GEMM 8.9 s, gather 6.1 s, the per-layer grouping sync 5.2 s, GDN recurrence 4.8 s. The PLE rows are free at this
   scale (97.6% row-cache hits).
-- **Open: decode after such a prompt runs at 2-3 tok/s**, because the experts the reserve pushed out of the cache
-  stay out; the prompt buffers should give their VRAM back to the cache when the prompt ends.
+- **Decode after such a prompt, and the fix.** Without lending cache slots to the prompt path (`--no-prefill-borrow`,
+  which the port used from the start) the reserve evicts ~1,900 experts for good and decode after the prompt runs at
+  2 tok/s. Borrowing lends ~940 slots to the prompt path and refills them in about a second afterwards: 80,000
+  tokens in 75 s = **1,062 tok/s, decode 35-40 tok/s** after it, at `--vram-reserve-mib 2048 --prefill 4096`.
+  It costs ~1 s on short prompts (2,184 tokens: 610 vs 792 tok/s), so the port borrows by default only above a
+  32K context (`--prefill-borrow` / `--no-prefill-borrow` decide explicitly).
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index a4309092420..dbef109df20 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -981,6 +981,7 @@ int main(int argc, char** argv) {
 #endif
     }
     Options o;
+    bool borrow_explicit = false;   // SYCL port: --prefill-borrow / --no-prefill-borrow given (else chosen by context)
     bool have_tokens = false;
     bool have_logits_stride = false;
     for (int i = 1; i < argc; ++i) {
@@ -1082,7 +1083,8 @@ int main(int argc, char** argv) {
             o.prefill_chunk = o.prefill_auto ? 8192 : std::atoll(v.c_str());
         }
         else if (a == "--no-split-rows") o.no_split_rows = true;
-        else if (a == "--no-prefill-borrow") o.no_prefill_borrow = true;
+        else if (a == "--no-prefill-borrow") { o.no_prefill_borrow = true; borrow_explicit = true; }
+        else if (a == "--prefill-borrow") { o.no_prefill_borrow = false; borrow_explicit = true; }
         else if (a == "--prefill-until") o.prefill_until = std::atoll(next("--prefill-until"));
         else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
         else if (a == "--spec") o.spec = std::atoi(next("--spec"));
@@ -1245,6 +1247,7 @@ int main(int argc, char** argv) {
             return 2;
         }
         o.no_prefill_borrow = true;   // each stage's prompt path has its own buffers
+        borrow_explicit = true;
         int n_vis = 1;
         if (DPCT_CHECK_ERROR(n_vis = dpct::device_count()) != 0 || n_vis < 1)
             n_vis = 1;
@@ -1269,6 +1272,11 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: layer split across %zu GPUs: CUDA0, then CUDA%s (split %s)\n",
                      split_devs.size() + 1, devs.c_str(), o.layer_split.c_str());
     }
+    // SYCL port (the B70, 2026-09-30): lending cache slots to the prompt path costs ~1 s per prompt (2,184 tokens:
+    // 610 vs 792 tok/s) but is what keeps every expert in VRAM at a long context - 80,000 tokens without it: the
+    // reserve for the KV and the chunk buffers evicts ~1,900 experts, prompt 790 tok/s and decode 2 tok/s after it;
+    // with it: 1,062 tok/s and 39.5 tok/s. So by default only above a 32K context; the flags still decide.
+    if (!borrow_explicit) o.no_prefill_borrow = o.max_context <= 32768;
     if (o.prefill_auto && (o.no_prefill_borrow || o.expert_profile.empty())) {
         o.prefill_auto = false;       // nothing to lend from: the buffers are reserved for the session, so keep them small
         o.prefill_chunk = 2048;

From 80be39e0a03460ae5e5290ac8ae6fd0b0cb9ed2d Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 15:02:17 -0500
Subject: [PATCH 029/201] sycl: XMX prompt attention v2 (1.5x v1, k8v4 parity
 complete), long-context x KV-type table

v2: 64-cell chunks, V packed two cells at a time as 32-byte stores, K^T as 4-byte pairs with INT8 converted on
the load, hi+lo Q in one accumulator per scale group, one accumulator update per chunk. qsa_prompt_attn_parity
passes in every mode and kv_hybrid_parity passes completely with it (its last step needs a tensor-core-class
prompt kernel). 13.4 ms per chunk vs v1's 18.7 and the FP32 fallback's 5.5: the attention is gather-bound, so
it stays opt-in (STRATA_PROMPT_ATTN_XMX=1, or =32 for 32-cell chunks).

INTEL.md: 128K and 256K prompts with int8, q4_0 and k8v4 KV on the B70. All complete; q4_0 keeps every expert
in VRAM at 128K (decode 32.7 tok/s after the prompt); at 256K all three evict experts and decode drops to 4-5.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  24 ++
 .../kernels/cuda/qsa_prompt_attn_xmx.dp.cpp   | 408 ++++++++++--------
 2 files changed, 242 insertions(+), 190 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 70f39066656..8b2a64290e7 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -287,6 +287,30 @@ output tokens between paths, never only timings.
   It costs ~1 s on short prompts (2,184 tokens: 610 vs 792 tok/s), so the port borrows by default only above a
   32K context (`--prefill-borrow` / `--no-prefill-borrow` decide explicitly).
 
+**Long contexts by KV type (2026-09-30, borrowing on, `--vram-reserve-mib 2048 --prefill 4096`).** Same text
+repeated to length, 64 greedy tokens after it:
+
+| context | KV | prompt | decode after | peak VRAM | experts in VRAM (of 12,288) |
+|---|---|---|---|---|---|
+| 128K | int8 | 960 tok/s | 8.5 tok/s | 30.9 GB | 12,002 |
+| 128K | q4_0 | 951 tok/s | 32.7 tok/s | 30.4 GB | 12,288 |
+| 128K | k8v4 | 983 tok/s | 23.4 tok/s | 30.7 GB | 12,241 |
+| 256K | q4_0 | 778 tok/s | 5.0 tok/s | 30.9 GB | 11,814 |
+| 256K | k8v4 | 752 tok/s | 3.8 tok/s | 30.7 GB | 11,294 |
+| 256K | int8 | 718 tok/s | 3.7 tok/s | 30.7 GB | 10,923 |
+
+Every configuration completes and answers coherently; decode after the prompt is set by how many experts the KV
+leaves room for. At 128K use `--kv q4_0`. At 256K all three evict 470-1,400 experts; KV streaming
+(`--kv-resident`) is the next thing to try there. k8v4 works through the FP32 attention fallback; its dedicated
+prompt kernel is the XMX one below.
+
+**XMX prompt attention v2.** 64-cell chunks, vector-packed K^T and V, hi+lo Q in one accumulator per scale group,
+one accumulator update per chunk: 1.4-1.5x faster than v1 and correct in all modes (`qsa_prompt_attn_parity`,
+and `kv_hybrid_parity` passes completely with it), but still ~2x slower than the FP32 fallback (13.4 vs 5.5 ms per
+chunk, INT8, 32K context). This attention is gather-bound: each query position selects its own ~2,000 cells, so
+the K/V fetch dominates and only 12 of the 16 matrix rows are real heads. Opt-in: `STRATA_PROMPT_ATTN_XMX=1`
+(64-cell chunks, 120 KB of local memory) or `=32`.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
index 9d3aa4dfb61..15516ee72dd 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn_xmx.dp.cpp
@@ -1,11 +1,17 @@
-// SYCL port: the prompt attention on XMX (joint_matrix) - the port of qsa_prompt_attn.cu's tensor-core kernel.
+// SYCL port: the prompt attention on XMX (joint_matrix) - the port of qsa_prompt_attn.cu's tensor-core kernel, v2.
 //
-// One work-group per (query position, KV head): 16 query rows (the 12 heads of the group, 4 zero rows) against the
-// position's selected cells, 16 cells per chunk. Scores S = Q K^T and the update O += P V run on joint_matrix
-// (FP16 x FP16 -> FP32, 16x16x16, sub-group 16); Q and P are split into hi + lo FP16 halves exactly as the CUDA kernel
-// does, and the per-64-dim INT8 scales of K and V are applied outside the matrix products the same way (K's after the
-// group's product, V's folded into P). The online softmax and the accumulator merge are scalar over local memory.
-// KV modes: 0 FP16 K/V, 1 INT8 K/V with scales, 3 INT8 K + q4_0 V dequantized to FP16.
+// One work-group per (query position, KV head): 16 query rows (the group's 12 heads + 4 zero rows) against the
+// position's selected cells, CH cells per chunk. Scores S = Q K^T and the update O += P V run on joint_matrix (FP16 x
+// FP16 -> FP32, 16x16x16, sub-group 16). Q and P are split into hi + lo FP16 halves exactly as the CUDA kernel does, and
+// the per-64-dim INT8 scales of K and V are applied outside the products the same way (K's after each scale group's
+// product, V's folded into P relative to the chunk's largest). KV modes: 0 FP16 K/V, 1 INT8 K/V with scales, 3 hybrid
+// K8V4 (INT8 K + Q4_0 V dequantized to FP16).
+//
+// v1 (16 cells per chunk) was correct but 3x slower than the FP32 fallback: its time went to staging (2-byte scattered
+// stores into the packed B layouts) and to 5 barriers + a softmax pass + an accumulator read-modify-write per 16 cells.
+// v2: 64-cell chunks (a quarter of the per-cell overhead), V packed two cells at a time as 32-byte contiguous stores,
+// K^T packed as 4-byte pairs with INT8 converted on the load, hi and lo halves of Q accumulated into one accumulator per
+// scale group, and one accumulator update per chunk after the whole P.V product has run in registers.
 #include "strata/kernels/qsa_prompt_attn_xmx.hpp"
 #include "strata/kernels/qsa_decode_attn.hpp"
 #include "strata/kernels/qsa.hpp"
@@ -17,67 +23,69 @@
 #include <cmath>
 #include <cstdint>
 #include <cstdio>
+#include <cstdlib>
 
 namespace strata::kernels {
 namespace {
 namespace jm = sycl::ext::oneapi::experimental::matrix;
-constexpr int HD = 256, G = 12, CH = 16, SG = 16, NSG = 8, THREADS = SG * NSG, QS = HD + 8, PS = CH + 8;
+constexpr int HD = 256, G = 12, SG = 16, NSG = 8, THREADS = SG * NSG, QS = HD + 8;
 constexpr int QK4_0 = 32;
 struct q4_0_block { uint16_t d; uint8_t qs[QK4_0 / 2]; };
 
-struct Smem {
-    sycl::half* qh;      // [16][QS]
-    sycl::half* ql;      // [16][QS]
-    sycl::half* kp;      // packed K^T: (k/2)*(CH*2) + c*2 + (k&1), k < HD, c < CH
-    sycl::half* vp;      // packed V:   (c/2)*(HD*2) + d*2 + (c&1)
-    sycl::half* pv;      // [4 groups][2 hi/lo][16][PS] P tiles
-    float* ks;           // [CH][4]
-    float* vs;           // [CH][4]
-    float* s;            // [16][PS] scores, then probabilities
-    float* acc;          // [16][HD]
-    float* tmp;          // [NSG][16][16]
-    float* misc;         // qmax[8], mrow[16], lsum[16], alpha[16], vup[4], vdown[4]
-    long long* row;      // [CH]
+// local memory layout for CH cells per chunk; the P tiles reuse the K^T region (K is done once the scores are)
+template <int CH>
+struct Layout {
+    static constexpr int PS = CH + 8;                        // P / score row stride
+    static constexpr int NT = CH / 16;                       // cell tiles
+    static constexpr int UNITS = NT * 4;                     // (cell tile, scale group) score units
+    static constexpr size_t q = 2 * 16 * QS * 2;             // Q hi, Q lo (halves)
+    static constexpr size_t kp = (size_t) CH * HD * 2;       // packed K^T, then the P tiles
+    static constexpr size_t pv = (size_t) 4 * 2 * 16 * PS * 2;
+    static constexpr size_t kp_or_pv = kp > pv ? kp : pv;
+    static constexpr size_t vp = (size_t) CH * HD * 2;       // packed V
+    static constexpr size_t parts = (size_t) (UNITS > 16 ? UNITS : 16) * 256 * 4;   // score units, then P.V tiles
+    static constexpr size_t s = (size_t) 16 * PS * 4;        // probabilities
+    static constexpr size_t acc = (size_t) 16 * HD * 4;
+    static constexpr size_t scal = (size_t) CH * 4 * 4 * 2;  // ks, vs
+    static constexpr size_t misc = 80 * 4;
+    static constexpr size_t row = (size_t) CH * 8;
+    static constexpr size_t bytes = q + kp_or_pv + vp + parts + s + acc + scal + misc + row + 16 * 12;
 };
-constexpr size_t kSmemBytes = (size_t) 2 * 16 * QS * 2 + (size_t) 2 * CH * HD * 2 + (size_t) 4 * 2 * 16 * PS * 2 +
-                              (size_t) 2 * CH * 4 * 4 + (size_t) 16 * PS * 4 + (size_t) 16 * HD * 4 + (size_t) NSG * 256 * 4 +
-                              (size_t) 72 * 4 + (size_t) CH * 8 + 64;
-
-__dpct_inline__ Smem carve(uint8_t* base) {
-    Smem m;
-    uint8_t* p = base;
-    auto take = [&](size_t bytes) { uint8_t* r = p; p += (bytes + 15) & ~(size_t) 15; return r; };
-    m.qh = (sycl::half*) take(16 * QS * 2);
-    m.ql = (sycl::half*) take(16 * QS * 2);
-    m.kp = (sycl::half*) take((size_t) CH * HD * 2);
-    m.vp = (sycl::half*) take((size_t) CH * HD * 2);
-    m.pv = (sycl::half*) take((size_t) 4 * 2 * 16 * PS * 2);
-    m.ks = (float*) take(CH * 4 * 4);
-    m.vs = (float*) take(CH * 4 * 4);
-    m.s = (float*) take(16 * PS * 4);
-    m.acc = (float*) take((size_t) 16 * HD * 4);
-    m.tmp = (float*) take((size_t) NSG * 256 * 4);
-    m.misc = (float*) take(72 * 4);
-    m.row = (long long*) take(CH * 8);
-    return m;
-}
 
 template <typename T>
 __dpct_inline__ auto lptr(T* p) {
     return sycl::address_space_cast<sycl::access::address_space::local_space, sycl::access::decorated::no>(p);
 }
 
-__dpct_inline__ float sg_max(sycl::sub_group sg, float v) {
-    return sycl::reduce_over_group(sg, v, sycl::maximum<float>());
-}
-
-template <int KV_MODE>
-void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const int32_t* __restrict__ ids,
-                            const int32_t* __restrict__ steps, int n_kv_heads, int page_size, float scale_log2,
-                            float* __restrict__ attn, int cap, uint8_t* smem) {
+template <int KV_MODE, int CH>
+void prompt_attn_xmx2(const float* __restrict__ q, QsaAttnPools p, const int32_t* __restrict__ ids,
+                      const int32_t* __restrict__ steps, int n_kv_heads, int page_size, float scale_log2,
+                      float* __restrict__ attn, int cap, uint8_t* smem) {
+    using L = Layout<CH>;
+    constexpr int PS = L::PS, NT = L::NT, UNITS = L::UNITS;
     auto it = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     auto sg = it.get_sub_group();
-    Smem S = carve(smem);
+    uint8_t* at = smem;
+    auto take = [&](size_t b) { uint8_t* r = at; at += (b + 15) & ~(size_t) 15; return r; };
+    sycl::half* qh = (sycl::half*) take(L::q / 2);
+    sycl::half* ql = (sycl::half*) take(L::q / 2);
+    sycl::half* kp = (sycl::half*) take(L::kp_or_pv);
+    sycl::half* ptile = kp;                                   // [g][hi/lo][16][PS], after the scores
+    sycl::half* vp = (sycl::half*) take(L::vp);
+    float* parts = (float*) take(L::parts);
+    float* sp = (float*) take(L::s);
+    float* acc = (float*) take(L::acc);
+    float* ks = (float*) take(L::scal / 2);
+    float* vs = (float*) take(L::scal / 2);
+    float* misc = (float*) take(L::misc);
+    long long* rows = (long long*) take(L::row);
+    float* qmax = misc;            // [8]
+    float* mrow = misc + 8;        // [16]
+    float* lsum = misc + 24;       // [16]
+    float* alpha = misc + 40;      // [16]
+    float* vup = misc + 56;        // [4]
+    float* vdown = misc + 60;      // [4]
+
     const int qi = (int) it.get_group(2), kvh = (int) it.get_group(1);
     const int n_head = n_kv_heads * G;
     q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
@@ -85,36 +93,31 @@ void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const i
     ids += (size_t) qi * cap;
     const int n = steps[(size_t) qi * kStepCount + kStepWidth];
     const int t = (int) it.get_local_id(2), lane = (int) sg.get_local_id()[0], sgid = (int) sg.get_group_id()[0];
-    float* qmax = S.misc;
-    float* mrow = S.misc + 8;
-    float* lsum = S.misc + 24;
-    float* alpha = S.misc + 40;
-    float* vup = S.misc + 56;
-    float* vdown = S.misc + 60;
-    // q: 12 heads + 4 zero rows, scaled so its largest value sits near 2^14 (exact), split into hi + lo halves
+
+    // q: scaled so its largest value sits near 2^14 (exact), split into hi + lo halves (as the CUDA kernel)
     float qm = 0.0f;
     for (int i = t; i < G * HD; i += THREADS) qm = sycl::fmax(qm, sycl::fabs(q[i]));
-    qm = sg_max(sg, qm);
+    qm = sycl::reduce_over_group(sg, qm, sycl::maximum<float>());
     if (lane == 0) qmax[sgid] = qm;
     it.barrier(sycl::access::fence_space::local_space);
     qm = 0.0f;
     for (int i = 0; i < NSG; ++i) qm = sycl::fmax(qm, qmax[i]);
-    int qe = 0;   // frexp's exponent (qm < 2^qe) from the float's bits: normal numbers only, qm > 0 is
+    int qe = 0;   // frexp's exponent from the bits (qm < 2^qe); qm > 0 is a normal number here
     if (qm > 0.0f) qe = (int) ((sycl::bit_cast<uint32_t>(qm) >> 23) & 0xFFu) - 126;
     const float qup = sycl::ldexp(1.0f, 14 - qe), qdown = sycl::ldexp(scale_log2, qe - 14);
     for (int i = t; i < 16 * HD; i += THREADS) {
         const int h = i / HD, d = i % HD;
         const float x = h < G ? q[(size_t) h * HD + d] * qup : 0.0f;
         const sycl::half hi = sycl::half(x);
-        S.qh[h * QS + d] = hi;
-        S.ql[h * QS + d] = sycl::half(x - (float) hi);
+        qh[h * QS + d] = hi;
+        ql[h * QS + d] = sycl::half(x - (float) hi);
     }
-    for (int i = t; i < 16 * HD; i += THREADS) S.acc[i] = 0.0f;
+    for (int i = t; i < 16 * HD; i += THREADS) acc[i] = 0.0f;
     if (t < 16) { mrow[t] = -INFINITY; lsum[t] = 0.0f; }
-    // the K^T tile is the same for every chunk position: B(k, c) packed by k pairs
+
     for (int c0 = 0; c0 < n; c0 += CH) {
         const int nh = sycl::min(CH, n - c0);
-        it.barrier(sycl::access::fence_space::local_space);   // the previous chunk is done with kp, vp, s, tmp
+        // the chunk's rows (the previous chunk's P.V only reads vp/ptile, not rows)
         if (t < CH) {
             long long r = -1;
             if (t < nh) {
@@ -122,70 +125,79 @@ void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const i
                 const long long page = (long long) p.page_table[cell / page_size];
                 r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
             }
-            S.row[t] = r;
+            rows[t] = r;
         }
-        it.barrier(sycl::access::fence_space::local_space);
-        // K rows -> packed K^T (raw INT8 codes as halves in modes 1 and 3; the scale comes after the product)
+        it.barrier(sycl::access::fence_space::local_space);   // rows ready; the previous chunk is done with kp/vp/parts
+        // K rows -> packed K^T: element (dim k, cell c) at kp[(k/2)*(CH*2) + c*2 + (k&1)]; one item = 8 dims of a cell
         for (int i = t; i < CH * (HD / 8); i += THREADS) {
             const int c = i / (HD / 8), piece = i % (HD / 8);
-            const long long r = S.row[c];
-            sycl::half h[8];
-            if (r < 0) {
-                for (int j = 0; j < 8; ++j) h[j] = sycl::half(0.0f);
-            } else if constexpr (KV_MODE == 0) {
-                const sycl::vec<uint16_t, 8> v = *reinterpret_cast<const sycl::vec<uint16_t, 8>*>(p.k_pool + r * HD + piece * 8);
-                for (int j = 0; j < 8; ++j) h[j] = sycl::bit_cast<sycl::half>(v[j]);
-            } else {
-                const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.k_q + r * HD + piece * 8);
-                for (int j = 0; j < 8; ++j) h[j] = sycl::half((float) v[j]);
-            }
-            for (int j = 0; j < 8; j += 2) {
-                const int k = piece * 8 + j;
-                sycl::half2* dst = reinterpret_cast<sycl::half2*>(S.kp + (k >> 1) * (CH * 2) + c * 2);
-                *dst = sycl::half2(h[j], h[j + 1]);
+            const long long r = rows[c];
+            uint32_t w[4] = {0u, 0u, 0u, 0u};
+            if (r >= 0) {
+                if constexpr (KV_MODE == 0) {
+                    const sycl::vec<uint32_t, 4> v = *reinterpret_cast<const sycl::vec<uint32_t, 4>*>(p.k_pool + r * HD + piece * 8);
+                    for (int j = 0; j < 4; ++j) w[j] = v[j];
+                } else {
+                    const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.k_q + r * HD + piece * 8);
+                    for (int j = 0; j < 4; ++j) {
+                        const sycl::half2 h2((float) v[2 * j], (float) v[2 * j + 1]);
+                        w[j] = sycl::bit_cast<uint32_t>(h2);
+                    }
+                }
             }
+            uint32_t* dst = reinterpret_cast<uint32_t*>(kp);
+            for (int j = 0; j < 4; ++j) dst[(size_t) (piece * 4 + j) * CH + c] = w[j];
         }
-        // V rows -> packed V (pairs of cells)
+        // V rows -> packed V: element (cell c, dim d) at vp[(c/2)*(HD*2) + d*2 + (c&1)]; one item = a cell pair x 8 dims,
+        // written as 8 contiguous uint32 (32 bytes)
         if constexpr (KV_MODE == 3) {
             constexpr int BLKS = HD / QK4_0;
             constexpr int BYTES = BLKS * (int) sizeof(q4_0_block);
-            for (int i = t; i < CH * BLKS; i += THREADS) {
-                const int c = i / BLKS, b = i % BLKS;
-                const long long r = S.row[c];
-                float d = 0.0f;
-                const q4_0_block* blk = nullptr;
-                if (r >= 0) {
-                    blk = reinterpret_cast<const q4_0_block*>(p.v_q4 + r * BYTES) + b;
-                    d = (float) sycl::bit_cast<sycl::half>(blk->d);
+            for (int i = t; i < (CH / 2) * BLKS; i += THREADS) {
+                const int cp = i / BLKS, b = i % BLKS;
+                float v0[QK4_0], v1[QK4_0];
+                for (int e = 0; e < 2; ++e) {
+                    const long long r = rows[2 * cp + e];
+                    float* v = e ? v1 : v0;
+                    if (r < 0) { for (int j = 0; j < QK4_0; ++j) v[j] = 0.0f; continue; }
+                    const q4_0_block* blk = reinterpret_cast<const q4_0_block*>(p.v_q4 + r * BYTES) + b;
+                    const float d = (float) sycl::bit_cast<sycl::half>(blk->d);
+                    for (int j = 0; j < QK4_0 / 2; ++j) {
+                        v[j] = (float) ((int) (blk->qs[j] & 0x0F) - 8) * d;
+                        v[j + QK4_0 / 2] = (float) ((int) (blk->qs[j] >> 4) - 8) * d;
+                    }
                 }
-                for (int j = 0; j < QK4_0 / 2; ++j) {
-                    const float lo = blk ? (float) ((int) (blk->qs[j] & 0x0F) - 8) * d : 0.0f;
-                    const float hi = blk ? (float) ((int) (blk->qs[j] >> 4) - 8) * d : 0.0f;
-                    const int d0 = b * QK4_0 + j, d1 = d0 + QK4_0 / 2;
-                    S.vp[(c >> 1) * (HD * 2) + d0 * 2 + (c & 1)] = sycl::half(lo);
-                    S.vp[(c >> 1) * (HD * 2) + d1 * 2 + (c & 1)] = sycl::half(hi);
+                uint32_t* dst = reinterpret_cast<uint32_t*>(vp) + (size_t) cp * HD + b * QK4_0;
+                for (int j = 0; j < QK4_0; j += 8) {
+                    sycl::vec<uint32_t, 8> o;
+                    for (int u = 0; u < 8; ++u) o[u] = sycl::bit_cast<uint32_t>(sycl::half2(v0[j + u], v1[j + u]));
+                    *reinterpret_cast<sycl::vec<uint32_t, 8>*>(dst + j) = o;
                 }
             }
         } else {
-            for (int i = t; i < CH * (HD / 8); i += THREADS) {
-                const int c = i / (HD / 8), piece = i % (HD / 8);
-                const long long r = S.row[c];
-                sycl::half h[8];
-                if (r < 0) {
-                    for (int j = 0; j < 8; ++j) h[j] = sycl::half(0.0f);
-                } else if constexpr (KV_MODE == 1) {
-                    const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.v_q + r * HD + piece * 8);
-                    for (int j = 0; j < 8; ++j) h[j] = sycl::half((float) v[j]);
-                } else {
-                    const sycl::vec<uint16_t, 8> v = *reinterpret_cast<const sycl::vec<uint16_t, 8>*>(p.v_pool + r * HD + piece * 8);
-                    for (int j = 0; j < 8; ++j) h[j] = sycl::bit_cast<sycl::half>(v[j]);
+            for (int i = t; i < (CH / 2) * (HD / 8); i += THREADS) {
+                const int cp = i / (HD / 8), piece = i % (HD / 8);
+                sycl::half h0[8], h1[8];
+                for (int e = 0; e < 2; ++e) {
+                    const long long r = rows[2 * cp + e];
+                    sycl::half* h = e ? h1 : h0;
+                    if (r < 0) { for (int j = 0; j < 8; ++j) h[j] = sycl::half(0.0f); continue; }
+                    if constexpr (KV_MODE == 1) {
+                        const sycl::vec<int8_t, 8> v = *reinterpret_cast<const sycl::vec<int8_t, 8>*>(p.v_q + r * HD + piece * 8);
+                        for (int j = 0; j < 8; ++j) h[j] = sycl::half((float) v[j]);
+                    } else {
+                        const sycl::vec<uint16_t, 8> v = *reinterpret_cast<const sycl::vec<uint16_t, 8>*>(p.v_pool + r * HD + piece * 8);
+                        for (int j = 0; j < 8; ++j) h[j] = sycl::bit_cast<sycl::half>(v[j]);
+                    }
                 }
-                for (int j = 0; j < 8; ++j) S.vp[(c >> 1) * (HD * 2) + (piece * 8 + j) * 2 + (c & 1)] = h[j];
+                sycl::vec<uint32_t, 8> o;
+                for (int j = 0; j < 8; ++j) o[j] = sycl::bit_cast<uint32_t>(sycl::half2(h0[j], h1[j]));
+                *reinterpret_cast<sycl::vec<uint32_t, 8>*>(reinterpret_cast<uint32_t*>(vp) + (size_t) cp * HD + piece * 8) = o;
             }
         }
         for (int i = t; i < CH * 4; i += THREADS) {
             const int c = i / 4, g = i % 4;
-            const long long r = S.row[c];
+            const long long r = rows[c];
             float a = 0.0f, b = 0.0f;
             if (r >= 0) {
                 if constexpr (KV_MODE == 1) {
@@ -198,50 +210,58 @@ void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const i
                     a = b = 1.0f;
                 }
             }
-            S.ks[c * 4 + g] = a;
-            S.vs[c * 4 + g] = b;
+            ks[c * 4 + g] = a;
+            vs[c * 4 + g] = b;
         }
         it.barrier(sycl::access::fence_space::local_space);
-        // scores: sub-group sg takes dim group g = sg & 3 with the hi (sg < 4) or lo (sg >= 4) half of q
-        {
-            const int g = sgid & 3;
-            const sycl::half* qa = (sgid < 4 ? S.qh : S.ql);
+        // scores: unit u = (cell tile u / 4, scale group u % 4); hi and lo of Q into one accumulator (same K scale)
+        for (int u = sgid; u < UNITS; u += NSG) {
+            const int nt = u / 4, g = u % 4;
             jm::joint_matrix<sycl::sub_group, float, jm::use::accumulator, 16, 16> C;
             jm::joint_matrix_fill(sg, C, 0.0f);
             for (int kk = 0; kk < 4; ++kk) {
                 const int k0 = (g * 4 + kk) * 16;
-                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> A;
                 jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
-                jm::joint_matrix_load(sg, A, lptr(qa + k0), (size_t) QS);
-                jm::joint_matrix_load(sg, B, lptr(S.kp + (k0 >> 1) * (CH * 2)), (size_t) (CH * 2));
+                jm::joint_matrix_load(sg, B, lptr(kp + (k0 >> 1) * (CH * 2) + nt * 16 * 2), (size_t) (CH * 2));
+                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> A;
+                jm::joint_matrix_load(sg, A, lptr(qh + k0), (size_t) QS);
+                jm::joint_matrix_mad(sg, C, A, B, C);
+                jm::joint_matrix_load(sg, A, lptr(ql + k0), (size_t) QS);
                 jm::joint_matrix_mad(sg, C, A, B, C);
             }
-            jm::joint_matrix_store(sg, C, lptr(S.tmp + sgid * 256), (size_t) 16, jm::layout::row_major);
+            jm::joint_matrix_store(sg, C, lptr(parts + (size_t) u * 256), (size_t) 16, jm::layout::row_major);
         }
-        it.barrier(sycl::access::fence_space::local_space);
-        for (int i = t; i < 16 * CH; i += THREADS) {
-            const int r = i / CH, c = i % CH;
-            float v = 0.0f;
-            for (int g = 0; g < 4; ++g) v += (S.tmp[g * 256 + r * 16 + c] + S.tmp[(g + 4) * 256 + r * 16 + c]) * S.ks[c * 4 + g];
-            S.s[r * PS + c] = c < nh ? v * qdown : -INFINITY;
+        // the V scale per group, folded into P relative to the chunk's largest (times 2^14, as in CUDA)
+        if (t < 4) {
+            float vmax = 0.0f;
+            for (int c = 0; c < CH; ++c) vmax = sycl::fmax(vmax, vs[c * 4 + t]);
+            vup[t] = vmax > 0.0f ? 16384.0f / vmax : 0.0f;
+            vdown[t] = vmax * (1.0f / 16384.0f);
         }
         it.barrier(sycl::access::fence_space::local_space);
-        // online softmax: row t/8, 2 cells per thread, 8 lanes per row (within one sub-group)
+        // online softmax: row r = t / 8, CH / 8 cells per thread, the 8 lanes of a row in one sub-group
         {
             constexpr int PER = CH / 8;
             const int r = t >> 3, sub = t & 7;
             float x[PER], mx = -INFINITY;
-            for (int j = 0; j < PER; ++j) { x[j] = S.s[r * PS + sub * PER + j]; mx = sycl::fmax(mx, x[j]); }
+            for (int j = 0; j < PER; ++j) {
+                const int c = sub * PER + j, nt = c >> 4, cc = c & 15;
+                float v = 0.0f;
+                for (int g = 0; g < 4; ++g) v += parts[(size_t) (nt * 4 + g) * 256 + r * 16 + cc] * ks[c * 4 + g];
+                x[j] = c < nh ? v * qdown : -INFINITY;
+                mx = sycl::fmax(mx, x[j]);
+            }
             for (int o = 1; o < 8; o <<= 1) mx = sycl::fmax(mx, sycl::permute_group_by_xor(sg, mx, o));
             const float m_old = mrow[r];
             const float m_new = sycl::fmax(m_old, mx);
             float sum = 0.0f;
             for (int j = 0; j < PER; ++j) {
                 const float e = x[j] == -INFINITY ? 0.0f : sycl::exp2(x[j] - m_new);
-                S.s[r * PS + sub * PER + j] = e;
+                sp[r * PS + sub * PER + j] = e;
                 sum += e;
             }
             for (int o = 1; o < 8; o <<= 1) sum += sycl::permute_group_by_xor(sg, sum, o);
+            sycl::group_barrier(sg);   // every lane of the row read m_old before lane 0 moves it
             if (sub == 0) {
                 const float a = m_old == -INFINITY ? 0.0f : sycl::exp2(m_old - m_new);
                 alpha[r] = a;
@@ -249,48 +269,47 @@ void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const i
                 mrow[r] = m_new;
             }
         }
-        // the V scale per dim group, folded into P relative to the chunk's largest (times 2^14, as in CUDA)
-        if (t < 4) {
-            float vmax = 0.0f;
-            for (int c = 0; c < CH; ++c) vmax = sycl::fmax(vmax, S.vs[c * 4 + t]);
-            vup[t] = vmax > 0.0f ? 16384.0f / vmax : 0.0f;
-            vdown[t] = vmax * (1.0f / 16384.0f);
-        }
         it.barrier(sycl::access::fence_space::local_space);
-        // P tiles: pv[g][hi/lo][r][c] = s[r][c] * vs[c][g] * vup[g], split into hi + lo halves
-        for (int i = t; i < 4 * 16 * CH; i += THREADS) {
-            const int g = i / (16 * CH), rc = i % (16 * CH), r = rc / CH, c = rc % CH;
-            const float pw = S.s[r * PS + c] * S.vs[c * 4 + g] * vup[g];
-            const sycl::half hi = sycl::half(pw);
-            S.pv[((g * 2 + 0) * 16 + r) * PS + c] = hi;
-            S.pv[((g * 2 + 1) * 16 + r) * PS + c] = sycl::half(pw - (float) hi);
+        // P tiles into the K^T region: groups share one pair when V carries no per-group scale (modes 0 and 3)
+        constexpr int NGP = KV_MODE == 1 ? 4 : 1;
+        for (int i = t; i < NGP * 16 * (CH / 2); i += THREADS) {
+            const int g = i / (16 * (CH / 2)), rc = i % (16 * (CH / 2)), r = rc / (CH / 2), c = (rc % (CH / 2)) * 2;
+            const float w0 = vs[c * 4 + g] * vup[g], w1 = vs[(c + 1) * 4 + g] * vup[g];
+            const float p0 = sp[r * PS + c] * w0, p1 = sp[r * PS + c + 1] * w1;
+            const sycl::half h0 = sycl::half(p0), h1 = sycl::half(p1);
+            *reinterpret_cast<sycl::half2*>(ptile + ((size_t) (g * 2 + 0) * 16 + r) * PS + c) = sycl::half2(h0, h1);
+            *reinterpret_cast<sycl::half2*>(ptile + ((size_t) (g * 2 + 1) * 16 + r) * PS + c) =
+                sycl::half2(sycl::half(p0 - (float) h0), sycl::half(p1 - (float) h1));
         }
         it.barrier(sycl::access::fence_space::local_space);
-        // p.v: sub-group sg owns dims [32 sg, 32 sg + 32) = two B tiles of scale group sg / 2
+        // P.V: sub-group sg owns dims [32 sg, 32 sg + 32) (two B tiles) = V scale group sg / 2; the whole chunk's product
+        // in registers, then one update of its own accumulator columns
         {
-            const int g = sgid >> 1;
-            const sycl::half* ah = S.pv + ((g * 2 + 0) * 16) * PS;
-            const sycl::half* al = S.pv + ((g * 2 + 1) * 16) * PS;
-            jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> Ah, Al;
-            jm::joint_matrix_load(sg, Ah, lptr(ah), (size_t) PS);
-            jm::joint_matrix_load(sg, Al, lptr(al), (size_t) PS);
-            const float a_vdown = vdown[g];
+            const int g = sgid >> 1, gp = KV_MODE == 1 ? g : 0;
+            const sycl::half* ah = ptile + (size_t) (gp * 2 + 0) * 16 * PS;
+            const sycl::half* al = ptile + (size_t) (gp * 2 + 1) * 16 * PS;
+            float* tmp = parts + (size_t) sgid * 512;
             for (int dt = 0; dt < 2; ++dt) {
                 const int d0 = sgid * 32 + dt * 16;
-                jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
-                jm::joint_matrix_load(sg, B, lptr(S.vp + d0 * 2), (size_t) (HD * 2));
                 jm::joint_matrix<sycl::sub_group, float, jm::use::accumulator, 16, 16> C;
                 jm::joint_matrix_fill(sg, C, 0.0f);
-                jm::joint_matrix_mad(sg, C, Ah, B, C);
-                jm::joint_matrix_mad(sg, C, Al, B, C);
-                jm::joint_matrix_store(sg, C, lptr(S.tmp + sgid * 256), (size_t) 16, jm::layout::row_major);
-                sycl::group_barrier(sg);
-                for (int i = lane; i < 256; i += SG) {
-                    const int r = i >> 4, c = i & 15;
-                    float* a = S.acc + r * HD + d0 + c;
-                    *a = sycl::fma(*a, alpha[r], S.tmp[sgid * 256 + i] * a_vdown);
+                for (int ks16 = 0; ks16 < CH; ks16 += 16) {
+                    jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::b, 16, 16, jm::layout::ext_intel_packed> B;
+                    jm::joint_matrix_load(sg, B, lptr(vp + (size_t) (ks16 >> 1) * (HD * 2) + d0 * 2), (size_t) (HD * 2));
+                    jm::joint_matrix<sycl::sub_group, sycl::half, jm::use::a, 16, 16, jm::layout::row_major> A;
+                    jm::joint_matrix_load(sg, A, lptr(ah + ks16), (size_t) PS);
+                    jm::joint_matrix_mad(sg, C, A, B, C);
+                    jm::joint_matrix_load(sg, A, lptr(al + ks16), (size_t) PS);
+                    jm::joint_matrix_mad(sg, C, A, B, C);
                 }
-                sycl::group_barrier(sg);
+                jm::joint_matrix_store(sg, C, lptr(tmp + dt * 256), (size_t) 16, jm::layout::row_major);
+            }
+            sycl::group_barrier(sg);
+            const float vd = vdown[g];
+            for (int i = lane; i < 512; i += SG) {
+                const int dt = i >> 8, rc = i & 255, r = rc >> 4, cc = rc & 15;
+                float* a = acc + r * HD + sgid * 32 + dt * 16 + cc;
+                *a = sycl::fma(*a, alpha[r], tmp[i] * vd);
             }
         }
     }
@@ -298,14 +317,15 @@ void prompt_attn_xmx_kernel(const float* __restrict__ q, QsaAttnPools p, const i
     for (int i = t; i < G * HD; i += THREADS) {
         const int h = i / HD, d = i % HD;
         const float l = lsum[h];
-        attn[(size_t) h * HD + d] = l > 0.0f ? S.acc[h * HD + d] / l : 0.0f;
+        attn[(size_t) h * HD + d] = l > 0.0f ? acc[h * HD + d] / l : 0.0f;
     }
 }
 
-template <int KV_MODE>
+template <int KV_MODE, int CH>
 bool launch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
             const QsaShapes& s, float* attn, int64_t n_q, dpct::queue_ptr st) {
     const float scale_log2 = 1.4426950408889634f / std::sqrt((float) HD);
+    constexpr size_t bytes = Layout<CH>::bytes;
     for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
         const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
         const float* qq = q + q0 * s.n_head * HD;
@@ -314,44 +334,52 @@ bool launch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const
         float* aq = attn + q0 * s.n_head * HD;
         const int nkv = (int) s.n_head_kv, ps = (int) s.page_size, capi = (int) cap;
         st->submit([&](sycl::handler& cgh) {
-            sycl::local_accessor<uint8_t, 1> slm(sycl::range<1>(kSmemBytes), cgh);
+            sycl::local_accessor<uint8_t, 1> slm(sycl::range<1>(bytes), cgh);
             cgh.parallel_for(sycl::nd_range<3>(sycl::range<3>(1, (size_t) nkv, (size_t) nb * THREADS), sycl::range<3>(1, 1, THREADS)),
                              [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] {
-                                 prompt_attn_xmx_kernel<KV_MODE>(qq, pools, idq, stq, nkv, ps, scale_log2, aq, capi,
-                                                                 slm.get_multi_ptr<sycl::access::decorated::no>().get());
+                                 prompt_attn_xmx2<KV_MODE, CH>(qq, pools, idq, stq, nkv, ps, scale_log2, aq, capi,
+                                                               slm.get_multi_ptr<sycl::access::decorated::no>().get());
                              });
         });
     }
     return true;
 }
+
+template <int CH>
+bool dispatch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+              const QsaShapes& s, float* attn, int64_t n_q, dpct::queue_ptr st) {
+    if (pools.k_q != nullptr && pools.v_q4 != nullptr) {
+        if (!pools.k_scale) return false;
+        return launch<3, CH>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
+    if (pools.k_q != nullptr) {
+        if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
+        return launch<1, CH>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
+    if (!pools.k_pool || !pools.v_pool) return false;
+    return launch<0, CH>(q, pools, ids, steps, cap, s, attn, n_q, st);
+}
 }  // namespace
 
 bool qsa_prompt_attn_xmx(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
                          const QsaShapes& s, float* attn, int64_t n_q, void* stream) {
-    // Off unless asked for: correct (qsa_prompt_attn_parity: 1e-6 of scale, like the CUDA kernel) but 3x slower than the
-    // FP32 fallback on the B70 (18.7 vs 5.5 ms per chunk at 32k context, 2026-09-30) - the chunk staging and packing
-    // dominate, not the products. Kept as the base for a tuned version (bigger chunks, vector packing).
-    static const bool on = std::getenv("STRATA_PROMPT_ATTN_XMX") && std::getenv("STRATA_PROMPT_ATTN_XMX")[0] == '1';
-    if (!on || n_q <= 0) return false;
+    // STRATA_PROMPT_ATTN_XMX=1 (64-cell chunks) or =32 (32-cell chunks); unset or 0: the caller's fallback
+    static const int mode = [] { const char* v = std::getenv("STRATA_PROMPT_ATTN_XMX"); return v ? std::atoi(v) : 0; }();
+    if (mode == 0 || n_q <= 0) return false;
     if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids || !steps ||
         !pools.page_table)
         return false;
     dpct::queue_ptr st = strata::q_of(stream);
-    static const bool fits = [&] {
-        const size_t have = st->get_device().get_info<sycl::info::device::local_mem_size>();
-        if (have < kSmemBytes) std::fprintf(stderr, "strata: prompt attention on XMX needs %zu bytes of local memory, the device has %zu\n", kSmemBytes, have);
-        return have >= kSmemBytes;
-    }();
-    if (!fits) return false;
-    if (pools.k_q != nullptr && pools.v_q4 != nullptr) {
-        if (!pools.k_scale) return false;
-        return launch<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    const size_t have = st->get_device().get_info<sycl::info::device::local_mem_size>();
+    const bool ch64 = mode != 32 && have >= Layout<64>::bytes;
+    static bool told = false;
+    if (!told) {
+        told = true;
+        std::fprintf(stderr, "strata: prompt attention on XMX, %d-cell chunks (%zu of %zu bytes of local memory)\n",
+                     ch64 ? 64 : 32, ch64 ? Layout<64>::bytes : Layout<32>::bytes, have);
     }
-    if (pools.k_q != nullptr) {
-        if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
-        return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
-    }
-    if (!pools.k_pool || !pools.v_pool) return false;
-    return launch<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    if (!ch64 && have < Layout<32>::bytes) return false;
+    return ch64 ? dispatch<64>(q, pools, ids, steps, cap, s, attn, n_q, st)
+                : dispatch<32>(q, pools, ids, steps, cap, s, attn, n_q, st);
 }
 }  // namespace strata::kernels

From 7f9a502e77771b3664a0ab438bd240771f126831 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 16:02:40 -0500
Subject: [PATCH 030/201] sycl: STRATA_DUMP_SEL (the prompt path's selected
 cells); INTEL.md - XMX v2 in the full matrix, selection overlap

The selection dump measured how much neighbouring prompt positions' QSA selections overlap at 80K tokens: the
union of 8 is 3.3x one selection (16: 5.1x), 12% shared by all 8, so a grouped-gather attention kernel would buy
at most 5-8 s of an 80K prompt. XMX v2 across the 128K/256K matrix: 23-33% slower prompts than the FP32 attention.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                |  8 ++++++++
 sycl/src/prefill/prefill.cpp | 19 +++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 8b2a64290e7..ccb55d64d3b 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -311,6 +311,14 @@ chunk, INT8, 32K context). This attention is gather-bound: each query position s
 the K/V fetch dominates and only 12 of the 16 matrix rows are real heads. Opt-in: `STRATA_PROMPT_ATTN_XMX=1`
 (64-cell chunks, 120 KB of local memory) or `=32`.
 
+**XMX v2 in the full matrix, and why a grouped kernel is not next (2026-09-30).** With `STRATA_PROMPT_ATTN_XMX=1`
+(stage timing on, ~8-10% overhead) the long prompts run 23-33% slower than with the FP32 attention: 128K int8 666 vs
+960 tok/s, k8v4 596 vs 983; 256K k8v4 506 vs 752, int8 536 vs 718 (q4_0 does not use the XMX kernel). The obvious
+fix, gathering the union of neighbouring positions' cells once, depends on how much their selections overlap.
+Measured on the last chunk of an 80K prompt (first QSA layer, `STRATA_DUMP_SEL=<file>`): the union of 8 consecutive
+positions is 3.3x one position's 2,051 cells (16: 5.1x), and only 12% of a selection is shared by all 8. Grouping
+would cut the K/V gather to ~40% but multiply the arithmetic by 3-5x: at best 5-8 s of an 80K prompt. Not built.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 20cd884445a..348167925bb 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -1762,6 +1762,25 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     // decode kernel, 32 queries at a time (K8V4 runs the tensor kernel's mode 3: INT8 K,
                     // V dequantized from its q4_0 blocks to fp16 at gather)
                     static const bool old_attn = std::getenv("STRATA_PROMPT_ATTN_OLD") != nullptr;
+                    // STRATA_DUMP_SEL=<file>: the selected cells of every prompt position of the first QSA layer of the
+                    // last chunk (int32 T, cap, then T*cap ids and T widths) - the input to the grouped-gather study
+                    if (static const char* dsel = std::getenv("STRATA_DUMP_SEL"); dsel && c0 + T >= n && qsa_index == 0) {
+                        m.cs->wait();
+                        std::vector<int32_t> ids_h((size_t) T * m.cap), st_h((size_t) T * strata::kernels::kStepCount);
+                        m.cs->memcpy(ids_h.data(), m.sel_ids, ids_h.size() * 4).wait();
+                        m.cs->memcpy(st_h.data(), m.steps_dev, st_h.size() * 4).wait();
+                        if (FILE* f = std::fopen(dsel, "wb")) {
+                            const int32_t hdr[2] = {(int32_t) T, (int32_t) m.cap};
+                            std::fwrite(hdr, 4, 2, f);
+                            std::fwrite(ids_h.data(), 4, ids_h.size(), f);
+                            for (int64_t t = 0; t < T; ++t) {
+                                const int32_t w = st_h[(size_t) t * strata::kernels::kStepCount + strata::kernels::kStepWidth];
+                                std::fwrite(&w, 4, 1, f);
+                            }
+                            std::fclose(f);
+                            std::fprintf(stderr, "strata: selection of %lld positions dumped to %s\n", (long long) T, dsel);
+                        }
+                    }
                     if (old_attn || !strata::kernels::qsa_prompt_attn_batch(m.q, pools, m.sel_ids, m.steps_dev, m.cap, s,
                                                                             m.attn, T, m.cs))
                         for (int64_t t0 = 0; t0 < T; t0 += m.attn_batch) {

From 4fa86aa9c18b1db6f975f0c4de7ae4c06b5f7f02 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 16:15:45 -0500
Subject: [PATCH 031/201] sycl: serve the port - strata-sycl.sh runs the engine
 in the oneAPI image as server.py's exe (36 tok/s sampled)

The Coder on the B70 now runs Strata's own engine behind serve/server.py --engine strata: the wrapper starts
build-sycl-aot/strata inside strata-sycl-dev with the serve pipes attached and the port's run-time switches set.
Through the OpenAI API with temperature 0.6 / top-p 0.95 / top-k 20 / repetition penalty 1.05: 36 tok/s decode
on a first turn, 33 on a follow-up (conversation cache reused), vs 24-26 for llama.cpp on the same card. The
expert reserve has to leave every expert in VRAM (--stream-experts has no host copy): 1,024 MiB at 32K context.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md             | 20 ++++++++++++++++++++
 sycl/serve/strata-sycl.sh | 23 +++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100755 sycl/serve/strata-sycl.sh

diff --git a/docs/INTEL.md b/docs/INTEL.md
index ccb55d64d3b..a659b890434 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -319,6 +319,26 @@ Measured on the last chunk of an 80K prompt (first QSA layer, `STRATA_DUMP_SEL=<
 positions is 3.3x one position's 2,051 cells (16: 5.1x), and only 12% of a selection is shared by all 8. Grouping
 would cut the K/V gather to ~40% but multiply the arithmetic by 3-5x: at best 5-8 s of an 80K prompt. Not built.
 
+**Serving the port (2026-09-30).** `serve/server.py --engine strata` runs the SYCL engine unchanged through
+`sycl/serve/strata-sycl.sh`, an `exe` that starts the binary inside the oneAPI runtime image with the serve pipes
+attached (paths in the config's `args` are the container's, the data root mounted at `/work`). A config:
+
+```json
+{"engine": "strata", "exe": "<repo>/sycl/serve/strata-sycl.sh",
+ "args": ["--pack", "/work/pack", "--native", "<shard 1>", "--ple-gguf", "<shard 2>",
+          "--expert-profile", "data/expert-profile-coder.bin", "--expert-cache", "auto", "--stream-experts",
+          "--prefill", "auto", "--spec", "4", "--spec-min-p", "0.5", "--mtp", "/work/mtp/rt",
+          "--max-context", "32768", "--kv", "int8", "--vram-reserve-mib", "1024"],
+ "sampling": {"temperature": 0.6, "top_p": 0.95, "top_k": 20, "repetition_penalty": 1.05}, ...}
+```
+
+Measured through the OpenAI API with those sampling defaults: 36 tok/s decode on a first turn, 33 on a follow-up
+(which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. The reserve matters:
+with `--stream-experts` there is no host copy of the experts, so any expert left out of VRAM is read from the SSD
+and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
+5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free. `setup.py` still writes the llama.cpp config
+for Intel cards; generating this one is the next step.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):
diff --git a/sycl/serve/strata-sycl.sh b/sycl/serve/strata-sycl.sh
new file mode 100755
index 00000000000..7819a585437
--- /dev/null
+++ b/sycl/serve/strata-sycl.sh
@@ -0,0 +1,23 @@
+#!/usr/bin/env bash
+# strata-sycl.sh: the SYCL-built engine as a drop-in `exe` for serve/server.py (--engine strata). The port's binary
+# needs the oneAPI runtime of the dev image, so this runs it there with stdin/stdout attached (the serve protocol is
+# lines on those pipes) and stderr going to the server's log. Paths in the config's args are the container's:
+# the data root is mounted at /work.
+#   STRATA_SYCL_ROOT   host directory mounted at /work        (default: two levels above this script's repo)
+#   STRATA_SYCL_IMAGE  the runtime image                      (default: strata-sycl-dev)
+#   STRATA_SYCL_BIN    the engine binary, relative to the repo (default: build-sycl-aot/strata)
+#   STRATA_SYCL_NAME   the container's name                   (default: strata-sycl-serve)
+set -euo pipefail
+here=$(cd "$(dirname "$0")/../.." && pwd)                 # the repo
+root=${STRATA_SYCL_ROOT:-$(dirname "$here")}
+repo_in=/work/$(basename "$here")
+name=${STRATA_SYCL_NAME:-strata-sycl-serve}
+docker rm -f "$name" >/dev/null 2>&1 || true              # a container left behind by a killed server
+args=""
+for a in "$@"; do args+=" $(printf '%q' "$a")"; done
+# the port's run-time switches: the device-built verify plan without host handshakes (docs/INTEL.md)
+exec docker run --rm -i --name "$name" --device /dev/dri --oom-score-adj 1000 --stop-timeout 30 \
+    -v "$root:/work" \
+    -e STRATA_VERIFY_DEVICE_PLAN=1 -e STRATA_VERIFY_NO_HOST=1 -e STRATA_STAGER_THREADS=12 \
+    "${STRATA_SYCL_IMAGE:-strata-sycl-dev}" \
+    "cd $repo_in && exec ${STRATA_SYCL_BIN:-build-sycl-aot/strata}$args"

From b40bf7b9b6621f1e503282eccbf08fdcbd6f6779 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 17:11:08 -0500
Subject: [PATCH 032/201] setup: Strata's SYCL engine on Intel cards when it is
 built; sycl: clean exit in serve mode

setup.py gets a third backend, sycl: on an Intel Arc with build-sycl-aot/strata and the strata-sycl-dev image
present (or --intel-engine strata; --intel-engine llama keeps llama.cpp), it builds the native pack and the
MTP draft layer (reusing an mtp-q2_0.gguf that is already there), writes the engine's arguments with the
container's paths through sycl/serve/strata-sycl.sh, --stream-experts with a reserve that keeps every expert in
VRAM (1,024 MiB up to 32K, 2,048 MiB and 4,096-token chunks above), Q4_0 KV above 64K, and keeps the sampling
block of an earlier config. start() checks the model files through the config's sycl_root; upgrade_config
leaves the SYCL config alone (the wrapper has no version, which read as 0.1.12 and downgraded --prefill).
Tested on the B70: the Coder's config regenerated by setup serves at 38.9 / 30.3 tok/s (first turn / follow-up)
with all 12,288 experts in VRAM.

The serve loop used to abort at exit (139): the Verifier's destructor waited on its queue after the Level
Zero context had begun tearing down. The destructor is now exception-safe and serve mode exits directly once
its requests are done: exit 0.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 |  14 +++-
 setup.py                      | 132 +++++++++++++++++++++++++++-------
 sycl/src/core/verify.cpp      |   6 +-
 sycl/src/program/generate.cpp |   7 +-
 4 files changed, 131 insertions(+), 28 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index a659b890434..6ddf2e17b88 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -336,8 +336,18 @@ Measured through the OpenAI API with those sampling defaults: 36 tok/s decode on
 (which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. The reserve matters:
 with `--stream-experts` there is no host copy of the experts, so any expert left out of VRAM is read from the SSD
 and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
-5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free. `setup.py` still writes the llama.cpp config
-for Intel cards; generating this one is the next step.
+5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free.
+
+`setup.py` writes this config by itself on an Intel card once the SYCL engine is built (`build-sycl-aot/strata`
+and the `strata-sycl-dev` image): a native pack, the MTP draft layer (from an existing `mtp-q2_0.gguf` without the
+5 GB download), the container's paths, the reserve (1,024 MiB up to 32K, 2,048 with 4,096-token chunks above),
+Q4_0 KV above 64K, and the `sampling` block of an earlier config kept. `--intel-engine llama` keeps llama.cpp.
+
+**Speed depends on the text.** Decode with speculative decoding tracks how often the draft layer guesses right.
+The served engine at 32K context: 45-51 tok/s on the rig's test prompt (continuing a Fibonacci function, 77-85%
+of drafts accepted), 30-39 tok/s on a chat answer with prose (55-72%); sampling and the repetition penalty cost
+nothing measurable. The engine used to abort at exit in serve mode (a queue wait in a destructor after the
+runtime's teardown began); it now exits directly once its requests are done.
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
diff --git a/setup.py b/setup.py
index e5320f70cd4..ebd446888e2 100644
--- a/setup.py
+++ b/setup.py
@@ -360,6 +360,44 @@ def intel_gpus():
     return found
 
 
+SYCL_WRAPPER = ROOT / "sycl" / "serve" / "strata-sycl.sh"
+SYCL_IMAGE = "strata-sycl-dev"
+
+
+def sycl_engine():
+    """Strata's own engine for an Intel Arc (the SYCL port): (binary, why-not). The binary runs inside the oneAPI
+    runtime image through sycl/serve/strata-sycl.sh; building both is described in docs/INTEL.md."""
+    if WIN:
+        return None, "the SYCL port runs on Linux only"
+    if not SYCL_WRAPPER.exists():
+        return None, "sycl/serve/strata-sycl.sh is missing"
+    exe = next((b for b in (ROOT / "build-sycl-aot" / "strata", ROOT / "build-sycl" / "strata") if b.exists()), None)
+    if exe is None:
+        return None, "it is not built (sycl/tools/build.sh; docs/INTEL.md)"
+    if not shutil.which("docker"):
+        return None, "docker is not installed (the engine runs in the oneAPI image)"
+    r = subprocess.run(["docker", "image", "inspect", SYCL_IMAGE], capture_output=True)
+    if r.returncode != 0:
+        return None, f"the runtime image {SYCL_IMAGE} is missing (sycl/tools/Dockerfile)"
+    return exe, None
+
+
+def sycl_path(path) -> str:
+    """A host path as the SYCL engine's container sees it: the folder above the Strata checkout is mounted at /work."""
+    p, root = Path(path).resolve(), ROOT.parent.resolve()
+    try:
+        return "/work/" + p.relative_to(root).as_posix()
+    except ValueError:
+        fail(f"{p} is outside {root}, which the SYCL engine's container mounts",
+             f"keep the models and the data folder under {root} (--models-dir / --data-dir), or use --intel-engine llama")
+
+
+def sycl_host_path(cfg: dict, path: str) -> str:
+    """The reverse of sycl_path for a config's argument (start's check that the model files exist)."""
+    root = cfg.get("sycl_root")
+    return str(Path(root) / path[len("/work/"):]) if root and path.startswith("/work/") else path
+
+
 def llama_block(kind, server, gguf, context, port):
     """The config's "llama" block: how serve/engine_llama.py gets its llama-server.
 
@@ -1509,6 +1547,8 @@ def upgrade_config(cfg_path: Path, cfg: dict) -> dict:
     """Configs written before v0.1.13 read prompts in fixed 2048-token chunks; the engine now picks the chunk
     itself (`--prefill auto`: up to 8192, as the free VRAM allows - about 2x faster on long prompts).  Under WSL,
     KV streaming is dropped: its RAM copy must be pinned, and the driver pins only about 1 GB there."""
+    if cfg.get("backend") == "sycl":                   # the SYCL port's config: nothing here applies to it
+        return cfg
     a = cfg.get("args", [])
     changed = False
     ver = engine_version(cfg["exe"]) if "--prefill" in a else (0, 0, 0)
@@ -1534,7 +1574,8 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
           layer_split=None, keep=None) -> int:
     """keep: settings given on this start that the model keeps from now on (--host, --api-key, --draft-vocab)."""
     cfg = upgrade_config(cfg_path, json.loads(cfg_path.read_text(encoding="utf-8-sig")))
-    missing = [p for p in [cfg["exe"], *[a for a in cfg["args"] if a.endswith(".gguf")]] if not Path(p).exists()]
+    missing = [p for p in [cfg["exe"], *[sycl_host_path(cfg, a) for a in cfg["args"] if a.endswith(".gguf")]]
+               if not Path(p).exists()]
     if missing:
         fail(f"{cfg_path.name} refers to missing files: {missing[0]}", "run it again with --setup to repair")
     keep = {k: v for k, v in (keep or {}).items() if v is not None}
@@ -1678,6 +1719,8 @@ def main() -> int:
     ap.add_argument("--kv", choices=["int8", "q4_0", "k8v4"],
                     help="KV cache precision above 8K context: int8 (default), q4_0 (half the memory, a little less "
                          "precise) or k8v4 (hybrid: INT8 K + 4-bit V, 816 B/cell)")
+    ap.add_argument("--intel-engine", choices=["auto", "strata", "llama"], default="auto",
+                    help="Intel Arc only: Strata's own engine built for the card (the SYCL port in sycl/, faster: docs/INTEL.md) or llama.cpp's SYCL backend; auto = Strata's when it is built, else llama.cpp")
     ap.add_argument("--llama-server", metavar="PATH|IMAGE",
                     help="Intel Arc only: the llama-server to run the model with (a binary built with -DGGML_SYCL=ON, "
                          "or a container image); default: one on PATH, else the B70 image via docker")
@@ -1799,11 +1842,19 @@ def main() -> int:
     hip = a.backend == "hip" or (a.backend is None and not nv_ok and bool(amd_ok))
     intel = [] if found or a.backend == "hip" or WIN else intel_gpus()   # no NVIDIA card: an Intel Arc runs llama.cpp
     if intel:
-        backend = "llama"
         g = max(intel, key=lambda x: x["vram_gb"])
-        ok(f"Intel {g['name']} ({g['vram_gb']:.0f} GB): using llama.cpp's SYCL backend instead of the CUDA engine")
+        sycl_exe, sycl_why = sycl_engine() if a.intel_engine != "llama" else (None, "--intel-engine llama")
+        if sycl_exe is not None:
+            backend = "sycl"
+            ok(f"Intel {g['name']} ({g['vram_gb']:.0f} GB): Strata's own engine, built for the card ({sycl_exe})")
+        else:
+            if a.intel_engine == "strata":
+                fail(f"Strata's SYCL engine cannot be used: {sycl_why}", "build it (docs/INTEL.md) or use --intel-engine llama")
+            backend = "llama"
+            ok(f"Intel {g['name']} ({g['vram_gb']:.0f} GB): using llama.cpp's SYCL backend instead of the CUDA engine"
+               + ("" if a.intel_engine == "llama" else f" (Strata's SYCL engine: {sycl_why})"))
         if a.vision not in (None, "no", "none"):
-            warn("images are not wired on the llama.cpp engine yet: continuing without vision")
+            warn("images are not wired on the Intel engines yet: continuing without vision")
         a.vision = "none"
         found = intel
     if a.backend is None and nv_ok and amd_ok:
@@ -1838,7 +1889,7 @@ def main() -> int:
         sel, multi, chosen = [gpu["index"]], [], [gpu]
         a.gpu = gpu["index"] if len(amd) > 1 else a.gpu
         ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, {gpu['arch']} (AMD, experimental: docs/AMD_HIP.md)")
-    elif backend == "llama":
+    elif backend in ("llama", "sycl"):
         sel, multi = [found[0]["index"]], []
         a.gpu = sel[0]
         GPU_PICK = a.gpu
@@ -1860,8 +1911,9 @@ def main() -> int:
         gpu["archs"] = sorted({x["arch"] for x in chosen})  # the engine needs code for every one of them
         if multi:
             ok("GPUs: " + " + ".join(gpu_name(x) for x in chosen) + " together (the model's layers are split across them)")
-    if backend == "llama":
-        ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, {gpu['driver']} driver, SYCL via llama.cpp")
+    if backend in ("llama", "sycl"):
+        ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, {gpu['driver']} driver, SYCL "
+           + ("(Strata's engine)" if backend == "sycl" else "via llama.cpp"))
     elif not hip:
         ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, compute capability {cc(gpu)}, driver {gpu['driver']}")
         if driver_major(gpu) < MIN_DRIVER:
@@ -1872,7 +1924,7 @@ def main() -> int:
     ram = ram_gb()
     cpu, avx2, avx512 = cpu_info()
     need = min(d["ram_gb"] for d in MODELS.values())
-    if backend == "llama":
+    if backend in ("llama", "sycl"):
         # The CUDA engine keeps every expert in RAM. llama.cpp puts the whole first shard on the card and only
         # the second shard's lookup table (28.8 GB, read by row) in host memory as page cache, so the fit is a
         # VRAM question: shard 1 = the download minus that table. Below that, experts spill to RAM (slower).
@@ -1885,7 +1937,7 @@ def main() -> int:
         else:
             warn(f"VRAM: {gpu['vram_gb']:.0f} GB is less than any shard 1 (" +
                  ", ".join(f"{m} {g} GB" for m, g in fit.items()) + "): experts will spill to RAM and it will be slow")
-    low_ok = backend != "llama" and low_ram_fits("IQ1_M", ram, gpu["vram_gb"]) and a.low_ram != "off"   # the smallest model, mapped
+    low_ok = backend not in ("llama", "sycl") and low_ram_fits("IQ1_M", ram, gpu["vram_gb"]) and a.low_ram != "off"   # the smallest model, mapped
     if ram < need - 4 and not a.check and not low_ok:
         # every model keeps ALL its experts in RAM (23+ GB); VRAM only holds a copy of the most-used ones, so a
         # bigger GPU does not lower this
@@ -1933,13 +1985,13 @@ def main() -> int:
         fail(f"{fam['title']} has no {a.model} model file", "choose one of: " + ", ".join(names))
     for i, m in enumerate(names, 1):
         d = MODELS[m]
-        fit = "" if ram >= d["ram_gb"] or backend == "llama" else f"   <- needs {d['ram_gb']} GB RAM, you have {ram:.0f}"
-        if backend != "llama" and low_ram_needed(m, ram) and low_ram_fits(m, ram, gpu["vram_gb"]) and a.low_ram != "off":
+        fit = "" if ram >= d["ram_gb"] or backend in ("llama", "sycl") else f"   <- needs {d['ram_gb']} GB RAM, you have {ram:.0f}"
+        if backend not in ("llama", "sycl") and low_ram_needed(m, ram) and low_ram_fits(m, ram, gpu["vram_gb"]) and a.low_ram != "off":
             fit = f"   <- fits in the low-RAM mode (the GPU holds ~{100 * low_ram_gpu_share(m, gpu['vram_gb']):.0f}%)"
         say(f"  {i}) {m:8s} {d['about']}; download {d['download_gb']:.0f} GB, uses ~{d['arena_gb']:.0f} GB of RAM{fit}")
     rec = str(names.index("IQ3_XXS") + 1) if ram >= 60 and "IQ3_XXS" in names else "1"
     model = a.model or names[int(ask("Which size?", [str(i) for i in range(1, len(names) + 1)], rec, a.yes)) - 1]
-    low_ram = backend != "llama" and (a.low_ram == "on" or (a.low_ram == "auto" and low_ram_needed(model, ram)))
+    low_ram = backend not in ("llama", "sycl") and (a.low_ram == "on" or (a.low_ram == "auto" and low_ram_needed(model, ram)))
     if low_ram and multi:
         warn("the low-RAM mode runs on one GPU: using " + gpu_name(gpu) + " only")
         multi, sel, chosen = [], [gpu["index"]], [gpu]
@@ -1950,7 +2002,7 @@ def main() -> int:
         if share < 0.6:
             warn("most of the experts are read from the SSD while it answers: expect it to be much slower than with "
                  "enough RAM (a faster SSD and a smaller size help)")
-    elif backend != "llama" and ram < MODELS[model]["ram_gb"] - 4:   # the CUDA engine's experts-in-RAM rule; on llama.cpp the fit is VRAM (step 1)
+    elif backend not in ("llama", "sycl") and ram < MODELS[model]["ram_gb"] - 4:   # the CUDA engine's experts-in-RAM rule; on llama.cpp the fit is VRAM (step 1)
         # #125: a warning and a question, not a stop: the user may accept paging (asked, "no" by default, so an
         # unattended --yes install still stops here)
         need_gb, arena = MODELS[model]["ram_gb"], MODELS[model]["arena_gb"]
@@ -1986,14 +2038,15 @@ def main() -> int:
         ctx = 131072
     ok(f"context: {ctx} tokens")
     # the KV cache (the model's memory of the conversation): 8-bit, or 4-bit after a Hadamard rotation (PR #21)
-    kv = "fp16" if ctx <= 8192 else (a.kv or "int8")
+    kv = "fp16" if ctx <= 8192 else (a.kv or ("q4_0" if backend == "sycl" and ctx > 65536 else "int8"))
+    # (the B70 at 128K: only 4-bit KV leaves every expert in VRAM - decode 33 vs 8.5 tok/s with INT8, docs/INTEL.md)
     if ctx > 8192 and not a.kv and not a.yes:
         say()
         say("  KV cache precision (the model's memory of the conversation):")
         say("  1) 8-bit   (recommended: what every published number was measured with)")
         say("  2) 4-bit   half the memory (about 4% faster at 128K), but measurably less precise on long")
         say("             documents; long-context lookups (needle tests) still pass")
-        kv = ["int8", "q4_0"][int(ask("KV cache?", ["1", "2"], "1", a.yes)) - 1]
+        kv = ["int8", "q4_0"][int(ask("KV cache?", ["1", "2"], "2" if kv == "q4_0" else "1", a.yes)) - 1]
     if ctx > 8192:
         ok(f"KV cache: {'8-bit' if kv == 'int8' else '4-bit (Hadamard-rotated)'}")
     if hip:
@@ -2062,6 +2115,10 @@ def main() -> int:
                  f"or install docker so the image {LLAMA_IMAGE} can run it")
         ok(f"engine: llama-server ({'container ' if kind == 'image' else ''}{server})")
         eng, lib_dirs = None, []
+    elif backend == "sycl":                          # Strata's SYCL build, run in its image (sycl/serve/strata-sycl.sh)
+        kind = server = None
+        eng, lib_dirs = None, []
+        ok(f"engine: {sycl_exe} (in the {SYCL_IMAGE} image)")
     else:
         kind = server = None
         eng = None if a.build or hip else get_prebuilt(a.prebuilt, gpu, vision)
@@ -2076,7 +2133,7 @@ def main() -> int:
             if va and int(gpu["arch"]) not in va and not (m.get("ptx") and int(gpu["arch"]) > max(va)):
                 warn(f"the ready-made image encoder has no code for your GPU (sm_{gpu['arch']}): compiling it")
                 eng = None
-    if backend != "llama":
+    if backend not in ("llama", "sycl"):
         if eng is None:
             eng = build_engine_hip(gpu, llama) if hip else build_engine(gpu, vision, a.yes, llama)
         meta = json.loads((eng / "BUILD.json").read_text())
@@ -2146,11 +2203,12 @@ def main() -> int:
         mtp = (find_in(roots, "mtp/rt/experts.bin") or data / "mtp/rt/experts.bin").parent.parent
         rt = mtp / "rt"
         if not (rt / "experts.bin").exists():
-            say("  The MTP draft layer (speculative decoding, ~2x faster output) comes from the original Qwen checkpoint:")
-            say("  only its ~5 GB of MTP tensors are downloaded.")
-            run([sys.executable, str(ROOT / "tools" / "mtp_fetch.py"), "fetch", "--out", str(mtp)], env=env)
-            run([sys.executable, str(ROOT / "tools" / "mtp_pack.py"), "--src", str(mtp), "--experts", "q2_0",
-                 "--out", str(mtp / "mtp-q2_0.gguf")], env=env)
+            if not (mtp / "mtp-q2_0.gguf").exists():     # packed earlier: only the run-time files are missing
+                say("  The MTP draft layer (speculative decoding, ~2x faster output) comes from the original Qwen checkpoint:")
+                say("  only its ~5 GB of MTP tensors are downloaded.")
+                run([sys.executable, str(ROOT / "tools" / "mtp_fetch.py"), "fetch", "--out", str(mtp)], env=env)
+                run([sys.executable, str(ROOT / "tools" / "mtp_pack.py"), "--src", str(mtp), "--experts", "q2_0",
+                     "--out", str(mtp / "mtp-q2_0.gguf")], env=env)
             run([sys.executable, str(ROOT / "tools" / "mtp_rt.py"), "--gguf", str(mtp / "mtp-q2_0.gguf"), "--out", str(rt)],
                 env=env)
         refresh_draft_vocab(rt, a.draft_vocab or "cjk")
@@ -2193,7 +2251,26 @@ def main() -> int:
             # the package's profile, with llama.cpp's flags (the engine takes the same ones)
             args += ["--control-vector-scaled", f"{esp}:1.0", "--control-vector-layer-range", "4", "44",
                      "--cvec-mode", "project", "--cvec-dir", "per-layer"]
-    if backend == "llama":
+    if backend == "sycl":
+        # the container's paths, experts read from the GGUF (no host copy: every expert must fit VRAM, so the reserve
+        # is the smallest that leaves the KV and the prompt buffers room - docs/INTEL.md), no KV streaming (untested)
+        if "--kv-resident" in args:
+            i = args.index("--kv-resident")
+            del args[i:i + 2]
+        for flag in ("--pack", "--native", "--ple-gguf", "--expert-profile", "--mtp"):
+            if flag in args:
+                args[args.index(flag) + 1] = sycl_path(args[args.index(flag) + 1])
+        args += ["--stream-experts", "--vram-reserve-mib", "1024" if ctx <= 32768 else "2048"]
+        if ctx > 32768:
+            args += ["--prefill", "4096"] if "--prefill" not in args else []
+            args[args.index("--prefill") + 1] = "4096"   # long contexts: 4096-token chunks keep the borrowed slots small
+        cfg = {"engine": "strata", "backend": "sycl", "exe": str(SYCL_WRAPPER), "args": args, "cwd": str(ROOT),
+               "sycl_root": str(ROOT.parent), "tokenizer": str(pack / "tokenizer"),
+               "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
+               "port": port}
+        if sycl_exe != ROOT / "build-sycl-aot" / "strata":
+            cfg["env"] = {"STRATA_SYCL_BIN": str(sycl_exe.relative_to(ROOT))}
+    elif backend == "llama":
         cfg = {"engine": "llama", "cwd": str(ROOT), "tokenizer": str(pack / "tokenizer"),
                "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
                "port": port, "llama": llama_block(kind, server, shards[0], a.context or 32768, port + 1)}
@@ -2227,7 +2304,14 @@ def main() -> int:
         if vision == "cpu":
             cfg["vision"]["threads"] = max(1, (os.cpu_count() or 8) // 2)
     cfg_path = ROOT / f"strata-{tag.lower()}.json"
-    cal = None if backend == "llama" or hip else saved_calibration(cfg)   # tools/calibrate.py is NVIDIA-only for now
+    try:                                               # the sampling defaults set by hand in an earlier config are kept
+        old = json.loads(cfg_path.read_text(encoding="utf-8-sig")) if cfg_path.exists() else {}
+        if old.get("sampling") and "sampling" not in cfg:
+            cfg["sampling"] = old["sampling"]
+            ok("kept the sampling defaults of the earlier config: " + ", ".join(f"{k}={v}" for k, v in old["sampling"].items()))
+    except (OSError, ValueError):
+        pass
+    cal = None if backend in ("llama", "sycl") or hip else saved_calibration(cfg)   # tools/calibrate.py is NVIDIA-only for now
     if cal is not None:
         sys.path.insert(0, str(ROOT / "tools"))
         import calibrate as CAL
@@ -2236,7 +2320,7 @@ def main() -> int:
     cfg_path.write_text(json.dumps(cfg, indent=1), encoding="utf-8")
     script = write_run_script(tag, cfg_path, port, engine="llama" if backend == "llama" else "strata")
     # offered only when someone answers: --yes installs and adopted earlier installs are not held up by it
-    if cal is None and backend != "llama" and not hip and not a.no_start and not a.yes and ask(
+    if cal is None and backend not in ("llama", "sycl") and not hip and not a.no_start and not a.yes and ask(
             "Tune Strata for this PC now? It measures a few engine settings (about 5-10 minutes; the PC is busy "
             "meanwhile; later: START-HERE --calibrate)", ["y", "n"], "y", a.yes) == "y":
         calibrate_config(cfg_path)
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 78124c78d17..5e8f933de9a 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -128,7 +128,9 @@ void Verifier::diag(std::FILE* f) const {
                  rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
 }
 
-Verifier::~Verifier() {
+Verifier::~Verifier() try {
+    // SYCL port: at process exit the Level Zero context can already be gone (serve mode's end), and a destructor
+    // that throws aborts the process (exit 139); the waits and frees below are best-effort then.
     const Verifier* self = this;
     g_diag_verifier.compare_exchange_strong(self, nullptr);
     if (cs_) cs_->wait();
@@ -144,8 +146,10 @@ Verifier::~Verifier() {
                      h_flagA_, h_plan_, h_flagB_};
     for (void* h : hosts)
         if (h) sycl::free(h, dpct::get_in_order_queue());
+} catch (...) {
 }
 
+
 bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
                     SessionState &ss, const VerifyHits &hits,
                     const NativeHead *head, int max_t, std::string &err) try {
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index dbef109df20..9f5ac4b842d 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -4822,7 +4822,12 @@ int main(int argc, char** argv) {
                              (double) (remote_experts[(size_t) r].full_row_bytes() - full_before[(size_t) r]) / 1048576.0,
                              remote_experts[(size_t) r].ms_begin(), remote_experts[(size_t) r].ms_wait());
         }
-        return 0;
+        // SYCL port: the requests are done and their output written; leave without unwinding the GPU objects (the OS
+        // reclaims them). Their destructors ran against a runtime already shutting down and aborted (exit 139).
+        try { dpct::get_current_device().queues_wait_and_throw(); } catch (...) {}
+        std::fflush(stdout);
+        std::fflush(stderr);
+        std::_Exit(0);
     }
 
     // ---- plan v0.3 P5: the prompt's conditioning positions [0, n_prompt - 1) in batched chunks.  The token loop

From a574bff4e864f31db1e28a02eda8b56ef6e1ef9b Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 17:41:04 -0500
Subject: [PATCH 033/201] setup/docs: KV streaming for the SYCL engine from 64K
 - 256K context decodes at 31 tok/s (from 4-5)

--kv-resident 32768 keeps the whole KV in pinned host memory and only the attended window in VRAM, so every
expert stays in VRAM at long contexts. B70, decode after the prompt: 128K int8 8.5 -> 38.7 tok/s, 128K q4_0
32.7 -> 35.3, 256K int8 3.7 -> 31.3, 256K q4_0 5.0 -> 31.5; the prompt pays 5-13%. setup.py now turns it on
from 64K for the SYCL engine (its RAM check counts only the KV copy and the engine, the experts being in VRAM)
and keeps INT8 KV, which is the faster of the two with streaming.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 19 +++++++++++++++++--
 setup.py      | 14 ++++++++------
 2 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 6ddf2e17b88..38973b4ba79 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -300,8 +300,10 @@ repeated to length, 64 greedy tokens after it:
 | 256K | int8 | 718 tok/s | 3.7 tok/s | 30.7 GB | 10,923 |
 
 Every configuration completes and answers coherently; decode after the prompt is set by how many experts the KV
-leaves room for. At 128K use `--kv q4_0`. At 256K all three evict 470-1,400 experts; KV streaming
-(`--kv-resident`) is the next thing to try there. k8v4 works through the FP32 attention fallback; its dedicated
+leaves room for. **KV streaming fixes it** (`--kv-resident 32768`: the whole KV in pinned host memory, only the
+attended window in VRAM): every expert stays in VRAM and decode after the prompt is 38.7 tok/s at 128K int8
+(from 8.5), 35.3 at 128K q4_0, 31.3 at 256K int8 (from 3.7) and 31.5 at 256K q4_0 (from 5.0); the prompt pays
+5-13% (725-860 tok/s). setup.py turns it on from 64K up for the SYCL engine and keeps INT8. k8v4 works through the FP32 attention fallback; its dedicated
 prompt kernel is the XMX one below.
 
 **XMX prompt attention v2.** 64-cell chunks, vector-packed K^T and V, hi+lo Q in one accumulator per scale group,
@@ -349,6 +351,19 @@ of drafts accepted), 30-39 tok/s on a chat answer with prose (55-72%); sampling
 nothing measurable. The engine used to abort at exit in serve mode (a queue wait in a destructor after the
 runtime's teardown began); it now exits directly once its requests are done.
 
+**Planned (2026-09-30), in order.** Ranked by payoff on this card; the first three are in progress.
+
+1. Expert dot products on XMX in integer mode: a decode window (up to 6 tokens) fits one INT8 DPAS (1-8 rows), the
+   i-quant grids decode to small integers, the activations are already INT8. Today: scalar dp4a, ALU-bound (77%).
+2. Experts missing from VRAM read from pinned host memory over PCIe instead of the SSD (the 256K decode collapse).
+3. KV streaming (`--kv-resident`) from 64K up: only the attended window of the KV in VRAM. **Done**: 256K decodes at
+   31 tok/s (from 4-5).
+4. QSA block selection on XMX: every query against every pooled block, a dense product that grows with the context.
+5. The hot decode kernels re-tuned for Xe2's native 16-wide sub-groups (twice the registers per thread).
+6. INT8 prompt GEMMs: experts dequantized to INT8, oneMKL/oneDNN INT8 on XMX (half the dequant bytes, 2x rate).
+7. Fewer graph nodes per decode round (~2,500 at ~5 us): norm+rope, scores+top-k, gate+quantize fused.
+8. Wider speculation (two draft branches per verify window): the kernels are latency-bound, so it is nearly free.
+
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for
 0.1.25-0.1.27, 2026-09-30):
diff --git a/setup.py b/setup.py
index ebd446888e2..194f797e406 100644
--- a/setup.py
+++ b/setup.py
@@ -2038,8 +2038,7 @@ def main() -> int:
         ctx = 131072
     ok(f"context: {ctx} tokens")
     # the KV cache (the model's memory of the conversation): 8-bit, or 4-bit after a Hadamard rotation (PR #21)
-    kv = "fp16" if ctx <= 8192 else (a.kv or ("q4_0" if backend == "sycl" and ctx > 65536 else "int8"))
-    # (the B70 at 128K: only 4-bit KV leaves every expert in VRAM - decode 33 vs 8.5 tok/s with INT8, docs/INTEL.md)
+    kv = "fp16" if ctx <= 8192 else (a.kv or "int8")
     if ctx > 8192 and not a.kv and not a.yes:
         say()
         say("  KV cache precision (the model's memory of the conversation):")
@@ -2253,10 +2252,13 @@ def main() -> int:
                      "--cvec-mode", "project", "--cvec-dir", "per-layer"]
     if backend == "sycl":
         # the container's paths, experts read from the GGUF (no host copy: every expert must fit VRAM, so the reserve
-        # is the smallest that leaves the KV and the prompt buffers room - docs/INTEL.md), no KV streaming (untested)
-        if "--kv-resident" in args:
-            i = args.index("--kv-resident")
-            del args[i:i + 2]
+        # is the smallest that leaves the KV and the prompt buffers room - docs/INTEL.md). KV streaming from 64K up
+        # keeps them all there: the B70 at 256K decodes at 31 tok/s with it, 4-5 without. Its RAM check above is the
+        # CUDA engine's (experts in RAM); here the experts are in VRAM, so only the KV copy and the engine count.
+        kv_ram = ctx * (13 * (576 if kv == "q4_0" else 1056)) / 1e9
+        if kv != "k8v4" and ctx >= 65536 and "--kv-resident" not in args and ram >= kv_ram + 6:
+            args += ["--kv-resident", "32768"]
+            ok(f"KV streaming on: the context's KV cache lives in RAM ({kv_ram:.1f} GB), every expert stays in VRAM")
         for flag in ("--pack", "--native", "--ple-gguf", "--expert-profile", "--mtp"):
             if flag in args:
                 args[args.index(flag) + 1] = sycl_path(args[args.index(flag) + 1])

From 1f790449b4ca5602be561bd71af80601a501799e Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 18:54:06 -0500
Subject: [PATCH 034/201] sycl: pinned host mirror for experts missing from
 VRAM, read by the device plan

Experts without a VRAM slot are read once into pinned host memory and the
device-built verify plan points the expert kernels at them over PCIe. The
plan used to drop non-resident experts, so output with misses diverged.
Forced 1,879-expert miss: decode 2.6 -> 40.9 tok/s, output identical.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 | 10 ++-
 .../strata/core/gguf_expert_source.hpp        | 17 ++++
 .../strata/kernels/resident_plan_mirror.hpp   | 10 +++
 sycl/src/core/gguf_expert_source.cpp          | 79 +++++++++++++++++++
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   | 32 ++++++--
 sycl/src/program/generate.cpp                 | 55 +++++++++++++
 6 files changed, 197 insertions(+), 6 deletions(-)
 create mode 100644 sycl/include/strata/kernels/resident_plan_mirror.hpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 38973b4ba79..c961b89da17 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -351,11 +351,19 @@ of drafts accepted), 30-39 tok/s on a chat answer with prose (55-72%); sampling
 nothing measurable. The engine used to abort at exit in serve mode (a queue wait in a destructor after the
 runtime's teardown began); it now exits directly once its requests are done.
 
-**Planned (2026-09-30), in order.** Ranked by payoff on this card; the first three are in progress.
+**Planned (2026-09-30), in order.** Ranked by payoff on this card; the first three were taken first.
 
 1. Expert dot products on XMX in integer mode: a decode window (up to 6 tokens) fits one INT8 DPAS (1-8 rows), the
    i-quant grids decode to small integers, the activations are already INT8. Today: scalar dp4a, ALU-bound (77%).
+   **Parked**: three `joint_matrix` versions (opt-in `STRATA_EXPERT_XMX=1`, do not enable) were 1.4x and 2-3x slower
+   than dp4a, and the third (B filled in place with `joint_matrix_apply`) hung the GPU. At 1-6 rows the grid decode
+   and the packed-B layout cost more than the DPAS saves.
 2. Experts missing from VRAM read from pinned host memory over PCIe instead of the SSD (the 256K decode collapse).
+   **Done**: at start-up every expert without a VRAM slot is read into a pinned host mirror (`STRATA_MIRROR_MIB`, by
+   default free RAM less 4 GiB), and the device-built verify plan points the expert kernels straight at it. Before,
+   that plan dropped non-resident experts, so output with misses was wrong. Forced test (`--expert-cache 8000`,
+   1,879 experts / 3.6 GiB out of VRAM): decode 2.6 -> 40.9 tok/s (full cache 43.3), prompt 451 -> 640 tok/s
+   (776), output tokens identical to the full-cache run. About 3.6 GiB of VRAM can go to context for ~6% of decode.
 3. KV streaming (`--kv-resident`) from 64K up: only the attended window of the KV in VRAM. **Done**: 256K decodes at
    31 tok/s (from 4-5).
 4. QSA block selection on XMX: every query against every pooled block, a dense product that grows with the context.
diff --git a/sycl/include/strata/core/gguf_expert_source.hpp b/sycl/include/strata/core/gguf_expert_source.hpp
index 1e88fcb90d7..7ae36b53a35 100644
--- a/sycl/include/strata/core/gguf_expert_source.hpp
+++ b/sycl/include/strata/core/gguf_expert_source.hpp
@@ -41,6 +41,19 @@ class GgufExpertSource : public ExpertSource {
     bool read_into(int64_t layer, int64_t expert, uint8_t* dst, size_t bytes) const;
     int64_t reads() const override { return reads_; }
 
+    /// SYCL port, plan item 2: the experts that did not fit the VRAM cache, read once into pinned host memory the
+    /// GPU can address (USM host). They are then `pinned()` with a `device_alias()`: the verify window reads them over
+    /// PCIe on the GPU (its "direct" mode) and the prompt path DMAs them, instead of an SSD read each time they are
+    /// routed - what made decode collapse to 4-5 tok/s at 256K (docs/INTEL.md). At most `cap` bytes; returns the
+    /// number mirrored. Threads read in parallel.
+    int64_t mirror(const std::vector<std::pair<int64_t, int64_t>>& pairs, uint64_t cap, int threads, std::string& err);
+    bool pinned(int64_t layer, int64_t expert) const override;
+    /// The mirrored blob's address, which the device can read. For a layer that has any mirrored expert, an
+    /// unmirrored one answers that layer's first mirrored blob: the verify plan asks `device_alias(layer, 0)` only as
+    /// "does this source have device-readable experts", and dereferences an alias only for `pinned()` experts.
+    const uint8_t* device_alias(int64_t layer, int64_t expert) const override;
+    uint64_t mirrored_bytes() const { return mirror_bytes_; }
+
 private:
     int fd_of(int64_t layer, std::string& err);
 
@@ -56,6 +69,10 @@ class GgufExpertSource : public ExpertSource {
     std::mutex mu_;
     int64_t n_layers_ = 0, n_expert_ = 0;
     int64_t reads_ = 0;
+    uint8_t* mirror_ = nullptr;                    ///< USM host (pinned, device-readable)
+    uint64_t mirror_bytes_ = 0;
+    std::vector<int64_t> mirror_off_;              ///< per (layer, expert): offset in mirror_, -1 = not mirrored
+    std::vector<int64_t> layer_first_;             ///< per layer: offset of its first mirrored blob, -1 = none
 };
 
 }  // namespace strata::core
diff --git a/sycl/include/strata/kernels/resident_plan_mirror.hpp b/sycl/include/strata/kernels/resident_plan_mirror.hpp
new file mode 100644
index 00000000000..b28a089a3fc
--- /dev/null
+++ b/sycl/include/strata/kernels/resident_plan_mirror.hpp
@@ -0,0 +1,10 @@
+// SYCL port: experts mirrored in pinned host memory (GgufExpertSource::mirror) in the device-built verify plan.
+#pragma once
+#include <cstdint>
+namespace strata::kernels {
+/// From now on (and in every graph captured after this call) the device-built plan (resident_plan) treats an expert
+/// that is not in the VRAM cache but has a non-zero entry in `mirror_table` ([n_layers][n_expert] device-readable
+/// addresses, 0 = none) as planned: the expert kernels read it from that address, over PCIe. `d_res` is the residency
+/// table whose per-layer slices resident_plan receives, so the layer of a call is found from its pointer.
+void resident_plan_set_mirror(const int32_t* d_res, const unsigned long long* mirror_table);
+}
diff --git a/sycl/src/core/gguf_expert_source.cpp b/sycl/src/core/gguf_expert_source.cpp
index 99c34dcf396..70ba763c4bc 100644
--- a/sycl/src/core/gguf_expert_source.cpp
+++ b/sycl/src/core/gguf_expert_source.cpp
@@ -5,6 +5,10 @@
 #include <cstring>
 #include <fcntl.h>
 #include <unistd.h>
+#include <dpct/dpct.hpp>
+#include <sycl/sycl.hpp>
+#include <thread>
+#include <atomic>
 
 namespace strata::core {
 
@@ -15,6 +19,8 @@ constexpr size_t kRing = 512;   // blobs alive at once: the prompt path holds a
 GgufExpertSource::~GgufExpertSource() { close(); }
 
 void GgufExpertSource::close() {
+    if (mirror_) { sycl::free(mirror_, dpct::get_in_order_queue()); mirror_ = nullptr; }
+    mirror_bytes_ = 0; mirror_off_.clear(); layer_first_.clear();
     for (int fd : fds_) if (fd >= 0) ::close(fd);
     fds_.clear(); names_.clear(); layer_fd_.clear(); ring_.clear(); ring_key_.clear(); where_.clear();
     ring_next_ = 0;
@@ -64,6 +70,10 @@ int GgufExpertSource::fd_of(int64_t layer, std::string& err) {
 
 const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_ || ring_.empty()) return nullptr;
+    if (mirror_ != nullptr) {
+        const int64_t o = mirror_off_[(size_t) (layer * n_expert_ + expert)];
+        if (o >= 0) return mirror_ + o;
+    }
     const auto& lay = strata::kernels::cpu::expert_layout();
     const auto& fm = lay.fmt[(size_t) layer];
     const uint64_t blob = lay.bytes[(size_t) layer];
@@ -97,6 +107,75 @@ const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     return buf.data();
 }
 
+int64_t GgufExpertSource::mirror(const std::vector<std::pair<int64_t, int64_t>>& pairs, uint64_t cap, int threads,
+                                 std::string& err) {
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    std::vector<std::pair<int64_t, int64_t>> take;
+    std::vector<uint64_t> offs;
+    uint64_t total = 0;
+    for (const auto& [l, e] : pairs) {
+        if (l < 0 || l >= n_layers_ || e < 0 || e >= n_expert_) continue;
+        const uint64_t b = (lay.bytes[(size_t) l] + 255) / 256 * 256;
+        if (total + b > cap) break;
+        take.push_back({l, e});
+        offs.push_back(total);
+        total += b;
+    }
+    if (take.empty()) return 0;
+    uint8_t* base = nullptr;
+    try {
+        base = (uint8_t*) sycl::malloc_host(total, dpct::get_in_order_queue());
+    } catch (const sycl::exception& ex) {
+        err = std::string("mirror: ") + ex.what();
+    }
+    if (base == nullptr) {
+        if (err.empty()) err = "mirror: no pinned host memory for " + std::to_string(total >> 20) + " MiB";
+        return -1;
+    }
+    std::atomic<size_t> next{0};
+    std::atomic<bool> bad{false};
+    std::vector<std::thread> ts;
+    for (int i = 0; i < std::max(1, threads); ++i)
+        ts.emplace_back([&] {
+            for (size_t j; (j = next.fetch_add(1)) < take.size() && !bad.load();) {
+                const auto [l, e] = take[j];
+                if (!read_into(l, e, base + offs[j], (size_t) lay.bytes[(size_t) l])) bad.store(true);
+            }
+        });
+    for (auto& th : ts) th.join();
+    if (bad.load()) {
+        sycl::free(base, dpct::get_in_order_queue());
+        err = "mirror: reading an expert from the GGUF failed";
+        return -1;
+    }
+    if (mirror_) sycl::free(mirror_, dpct::get_in_order_queue());
+    mirror_ = base;
+    mirror_bytes_ = total;
+    mirror_off_.assign((size_t) (n_layers_ * n_expert_), -1);
+    layer_first_.assign((size_t) n_layers_, -1);
+    for (size_t j = 0; j < take.size(); ++j) {
+        const auto [l, e] = take[j];
+        mirror_off_[(size_t) (l * n_expert_ + e)] = (int64_t) offs[j];
+        if (layer_first_[(size_t) l] < 0) layer_first_[(size_t) l] = (int64_t) offs[j];
+    }
+    return (int64_t) take.size();
+}
+
+bool GgufExpertSource::pinned(int64_t layer, int64_t expert) const {
+    if (mirror_ == nullptr || layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_) return false;
+    return mirror_off_[(size_t) (layer * n_expert_ + expert)] >= 0;
+}
+
+const uint8_t* GgufExpertSource::device_alias(int64_t layer, int64_t expert) const {
+    if (mirror_ == nullptr || layer < 0 || layer >= n_layers_) return nullptr;
+    if (expert >= 0 && expert < n_expert_) {
+        const int64_t o = mirror_off_[(size_t) (layer * n_expert_ + expert)];
+        if (o >= 0) return mirror_ + o;
+    }
+    const int64_t f = layer_first_[(size_t) layer];
+    return f >= 0 ? mirror_ + f : nullptr;
+}
+
 bool GgufExpertSource::read_into(int64_t layer, int64_t expert, uint8_t* dst, size_t bytes) const {
     if (layer < 0 || layer >= n_layers_ || expert < 0 || expert >= n_expert_ || dst == nullptr) return false;
     const auto& lay = strata::kernels::cpu::expert_layout();
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index b556c82a136..9d51ecee0da 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -8,6 +8,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/sycl_doorbell.hpp"
 #include "strata/kernels/verify_kernels.hpp"
+#include "strata/kernels/resident_plan_mirror.hpp"
 
 #include <cstdio>
 #include <cstdlib>
@@ -930,7 +931,8 @@ __dpct_inline__ void resident_plan_kernel(
     const int32_t *__restrict__ ids, int n, int k,
     const int32_t *__restrict__ res, int n_expert, const uint8_t *cache_base,
     const unsigned long long *slot_off, long long blob,
-    int32_t *__restrict__ pl, long long capx, uint32_t *skip, uint32_t ring) {
+    int32_t *__restrict__ pl, long long capx, uint32_t *skip, uint32_t ring,
+    const unsigned long long *__restrict__ mir) {
 #if STRATA_PLAN_LOCAL
     // SYCL port: the host's exact loop, but over a local copy of the ids and their slots. One thread reading global
     // memory for every compare (n^2 of them) took 87 us per layer on the B70 - 4% of a decode round; a work-group
@@ -939,15 +941,19 @@ __dpct_inline__ void resident_plan_kernel(
     auto &s_ids = *sycl::ext::oneapi::group_local_memory_for_overwrite<int32_t[64]>(item.get_group());
     auto &s_res = *sycl::ext::oneapi::group_local_memory_for_overwrite<int32_t[64]>(item.get_group());
     auto &s_bad = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(item.get_group());
+    auto &s_mir = *sycl::ext::oneapi::group_local_memory_for_overwrite<unsigned long long[64]>(item.get_group());
     const int tid = (int) item.get_local_id(2);
     if (tid == 0) s_bad = 0;
     item.barrier(sycl::access::fence_space::local_space);
     for (int i = tid; i < n && i < 64; i += 64) {
         const int32_t e = ids[i];
-        const bool ok = e >= 0 && e < n_expert && res[e] >= 0;
+        const bool valid = e >= 0 && e < n_expert;
+        const int32_t sl = valid ? res[e] : -1;
+        const unsigned long long ma = (valid && sl < 0 && mir != nullptr) ? mir[e] : 0ull;   // mirrored in host memory
         s_ids[i] = e;
-        s_res[i] = ok ? res[e] : -1;
-        if (!ok) s_bad = 1;
+        s_res[i] = sl;
+        s_mir[i] = ma;
+        if (!valid || (sl < 0 && ma == 0)) s_bad = 1;
     }
     item.barrier(sycl::access::fence_space::local_space);
     if (tid != 0) return;
@@ -980,7 +986,12 @@ __dpct_inline__ void resident_plan_kernel(
         }
         if (!first) continue;
         const int32_t slot = S_RES(i0);
+#if STRATA_PLAN_LOCAL
+        ptr[groups] = slot >= 0 ? (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob))
+                                : s_mir[i0];   // not in VRAM: its pinned host mirror, read by the expert kernels over PCIe
+#else
         ptr[groups] = (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob));
+#endif
         start[groups] = entries;
         for (int i = i0; i < n; ++i)
             if (s_ids[i] == s_ids[i0]) {
@@ -1054,9 +1065,20 @@ __dpct_inline__ void copy_or_zero_kernel(sycl::float4 *__restrict__ dst,
 }
 }  // namespace
 
+namespace {
+const int32_t* g_mirror_res = nullptr;
+const unsigned long long* g_mirror_table = nullptr;
+}
+void resident_plan_set_mirror(const int32_t* d_res, const unsigned long long* mirror_table) {
+    g_mirror_res = d_res;
+    g_mirror_table = mirror_table;
+}
 void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_layer, int n_expert,
                    const uint8_t* cache_base, const unsigned long long* slot_off, long long blob, int32_t* plan,
                    long long capx, uint32_t* skip, uint32_t ring, void* stream) {
+    const unsigned long long* mir = nullptr;   // SYCL port: the layer's slice of the host-mirror table, if any
+    if (g_mirror_table != nullptr && g_mirror_res != nullptr && res_layer >= g_mirror_res)
+        mir = g_mirror_table + (res_layer - g_mirror_res);
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1067,7 +1089,7 @@ void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_
                 exp_props, [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
                     resident_plan_kernel(ids, n_entries, k, res_layer, n_expert,
                                          cache_base, slot_off, blob, plan, capx,
-                                         skip, ring);
+                                         skip, ring, mir);
                 });
     }
     check("resident_plan");
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 9f5ac4b842d..34a60598964 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -21,6 +21,7 @@
 #include "strata/core/expert_cache.hpp"
 #include "strata/core/expert_source.hpp"
 #include "strata/core/gguf_expert_source.hpp"
+#include "strata/kernels/resident_plan_mirror.hpp"
 #include "strata/core/remote_experts.hpp"
 #include "strata/core/on_device.hpp"
 #include "strata/core/layer.hpp"
@@ -2443,6 +2444,58 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: pre-filled %lld of %lld slots from the profile; slot 0 verified\n",
                      (long long) prefilled, (long long) want);
     }
+    // SYCL port, plan item 2: the experts that did not fit VRAM, mirrored once in pinned host memory the GPU reads
+    // over PCIe (--stream-experts has no host copy otherwise: each routed miss was an SSD read). The share of misses
+    // the GPU takes is --pcie-frac; STRATA_MIRROR_MIB caps the mirror (default: MemAvailable less 4 GiB), 0 = off.
+    unsigned long long* mirror_table_d = nullptr;   // [n_layers][n_expert] device-readable mirror addresses (0 = none)
+    int64_t unmirrored_misses = 0;
+    if (o.stream_experts && srcp == &gguf_src && o.expert_cache > 0) {
+        std::vector<std::pair<int64_t, int64_t>> miss;
+        for (const auto& pr : profile)   // the profile's order: the most-routed misses first, if the cap is reached
+            if (xcache.slot_of(pr.first, pr.second) == strata::core::kNotResident) miss.push_back({pr.first, pr.second});
+        for (int64_t l = 0; l < g.n_layers; ++l)                     // pairs the profile does not list at all
+            for (int64_t e = 0; e < g.n_expert; ++e)
+                if (xcache.slot_of(l, e) == strata::core::kNotResident &&
+                    std::find(miss.begin(), miss.end(), std::pair<int64_t, int64_t>{l, e}) == miss.end())
+                    miss.push_back({l, e});
+        uint64_t avail = 0;
+        if (FILE* f = std::fopen("/proc/meminfo", "r")) {
+            char key[64]; unsigned long long kb = 0;
+            while (std::fscanf(f, "%63s %llu kB", key, &kb) == 2)
+                if (std::strcmp(key, "MemAvailable:") == 0) { avail = kb << 10; break; }
+            std::fclose(f);
+        }
+        const char* mv = std::getenv("STRATA_MIRROR_MIB");
+        const uint64_t cap = mv ? (uint64_t) std::atoll(mv) << 20 : (avail > (4ull << 30) ? avail - (4ull << 30) : 0);
+        if (!miss.empty() && cap > 0) {
+            const auto tm = Clock::now();
+            const int64_t got = gguf_src.mirror(miss, cap, 8, err);
+            if (got < 0) {
+                std::fprintf(stderr, "strata generate: mirroring the experts missing from VRAM: %s (they stay on the SSD)\n",
+                             err.c_str());
+                err.clear();
+            } else {
+                std::fprintf(stderr, "strata generate: %lld of %zu experts missing from VRAM mirrored in pinned host memory "
+                                     "(%.2f GiB, %.1f s); the GPU reads them over PCIe\n", (long long) got, miss.size(),
+                             (double) gguf_src.mirrored_bytes() / 1073741824.0,
+                             std::chrono::duration<double>(Clock::now() - tm).count());
+                // the device-built verify plan's view of it: each (layer, expert) -> its mirror address, 0 = none
+                std::vector<unsigned long long> tab((size_t) (g.n_layers * g.n_expert), 0ull);
+                for (int64_t l = 0; l < g.n_layers; ++l)
+                    for (int64_t e = 0; e < g.n_expert; ++e)
+                        if (gguf_src.pinned(l, e))
+                            tab[(size_t) (l * g.n_expert + e)] = (unsigned long long) gguf_src.device_alias(l, e);
+                mirror_table_d = sycl::malloc_device<unsigned long long>(tab.size(), dpct::get_in_order_queue());
+                dpct::get_in_order_queue().memcpy(mirror_table_d, tab.data(), tab.size() * sizeof(unsigned long long)).wait();
+            }
+        }
+        unmirrored_misses = (int64_t) miss.size() - (int64_t) (gguf_src.mirrored_bytes() ? std::count_if(miss.begin(), miss.end(),
+            [&](const std::pair<int64_t, int64_t>& pr) { return gguf_src.pinned(pr.first, pr.second); }) : 0);
+        if (unmirrored_misses > 0 && std::getenv("STRATA_VERIFY_NO_HOST") != nullptr)
+            std::fprintf(stderr, "strata generate: WARNING: %lld experts are neither in VRAM nor mirrored; with STRATA_VERIFY_NO_HOST "
+                                 "the device plan cannot run them and their layers' windows fall back slowly - raise "
+                                 "STRATA_MIRROR_MIB or the free RAM, or lower --max-context\n", (long long) unmirrored_misses);
+    }
 
     if (o.resident_cpu_experts) {
         if (!src.pin_cache_complement(xcache, err, /*pin=*/false)) {
@@ -3479,6 +3532,7 @@ int main(int argc, char** argv) {
         strata::core::Verifier ver;
         strata::core::VerifyHits vh;
         vh.d_res = thits.d_res;
+        if (mirror_table_d) strata::kernels::resident_plan_set_mirror(thits.d_res, mirror_table_d);
         vh.cache_base = thits.cache_base;
         vh.blob = thits.blob;
         vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers
@@ -5229,6 +5283,7 @@ int main(int argc, char** argv) {
         strata::core::Verifier ver;
         strata::core::VerifyHits vh;
         vh.d_res = thits.d_res;
+        if (mirror_table_d) strata::kernels::resident_plan_set_mirror(thits.d_res, mirror_table_d);
         vh.cache_base = thits.cache_base;
         vh.blob = thits.blob;
         vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers

From 8aca6c88e459080c6e428e4842e7d2026e70624b Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 19:52:32 -0500
Subject: [PATCH 035/201] sycl: SIMD16 variants of the decode mmvq kernels
 (opt-in STRATA_MMVQ_SG), mmvq_sg_bench

SIMD16 wins in isolation on IQ4_XS and short outputs, but no setting beats
the 32-lane default in the engine beyond noise; kept opt-in.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                            |  6 +++
 sycl/CMakeLists.txt                      |  2 +
 sycl/src/kernels/cuda/native_mmvq.dp.cpp | 66 ++++++++++++++++++++----
 sycl/src/kernels/mmvq_sg_bench.cpp       | 54 +++++++++++++++++++
 4 files changed, 119 insertions(+), 9 deletions(-)
 create mode 100644 sycl/src/kernels/mmvq_sg_bench.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index c961b89da17..57a0acf9877 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -368,6 +368,12 @@ runtime's teardown began); it now exits directly once its requests are done.
    31 tok/s (from 4-5).
 4. QSA block selection on XMX: every query against every pooled block, a dense product that grows with the context.
 5. The hot decode kernels re-tuned for Xe2's native 16-wide sub-groups (twice the registers per thread).
+   **Tried, no gain**: SIMD16 builds of the multi-column mmvq and the wide Q6_K kernel (`STRATA_MMVQ_SG`: 16 all,
+   1 IQ4_XS only, 2 short outputs only; default 32). Alone (`mmvq_sg_bench`) SIMD16 is up to 1.45x faster on IQ4_XS
+   and 1.3x on the 640-row shared-expert projections, 10-25% slower on the large K-quant ones; in the engine no
+   setting beats SIMD32 beyond run-to-run noise (SIMD32 itself lands at 39 or 45 tok/s). Output tokens identical.
+   The same bench shows the real headroom: the dense decode kernels stream 100-280 GB/s of a 608 GB/s card
+   (Q6_K, the most common type, ~146 GB/s at 2-4 columns).
 6. INT8 prompt GEMMs: experts dequantized to INT8, oneMKL/oneDNN INT8 on XMX (half the dequant bytes, 2x rate).
 7. Fewer graph nodes per decode round (~2,500 at ~5 us): norm+rope, scores+top-k, gate+quantize fused.
 8. Wider speculation (two draft branches per verify window): the kernels are latency-bound, so it is nearly free.
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 682a6ed68a6..f4392de3eb0 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -193,6 +193,8 @@ if(STRATA_SYCL_PARITY)
   target_link_libraries(kv_hybrid_parity PRIVATE strata_kernels)
   add_executable(mmvq_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_bench.cpp)   # dense mmvq timing
   target_link_libraries(mmvq_bench PRIVATE strata_kernels)
+  add_executable(mmvq_sg_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_sg_bench.cpp)   # SIMD16 vs 32 decode mmvq
+  target_link_libraries(mmvq_sg_bench PRIVATE strata_kernels)
   add_executable(xmx_gemm_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/xmx_gemm_bench.cpp)   # XMX quantized GEMM vs dequant+oneMKL
   target_link_libraries(xmx_gemm_bench PRIVATE strata_kernels strata_prefill)   # -qmkl for the oneMKL reference
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 3d05318d690..8abf247596e 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -35,6 +35,7 @@
 #include <cstdlib>
 #include <limits>
 #include <stdexcept>
+#include <type_traits>
 #include <string>
 #include <cmath>
 
@@ -142,6 +143,25 @@ __dpct_inline__ float warp_sum(float x) {
     return x;
 }
 
+template <int SG> __dpct_inline__ float sg_sum(float x) {   // SYCL port: warp_sum for a SG-wide sub-group
+#pragma unroll
+    for (int offset = SG / 2; offset > 0; offset >>= 1)
+        x += sycl::permute_group_by_xor(sycl::ext::oneapi::this_work_item::get_sub_group(), x, offset);
+    return x;
+}
+// SYCL port: the decode mmvq kernels as Xe2-native SIMD16 sub-groups (twice the registers per lane, same 128
+// threads per group) or as the CUDA-shaped 32-lane warp (default). STRATA_MMVQ_SG: 16 = all SIMD16, 1 = IQ4_XS
+// only, 2 = short outputs (n_out <= 1024) only, 3 = both. mmvq_sg_bench alone: SIMD16 wins on IQ4_XS (up to
+// 1.45x) and short outputs (up to 1.3x), loses 10-25% on the large K-quant projections.
+inline int mmvq_sg() {
+    static const int v = std::getenv("STRATA_MMVQ_SG") ? std::atoi(std::getenv("STRATA_MMVQ_SG")) : 32;
+    return v;
+}
+inline bool mmvq_sg16(bool iq4xs, int n_out) {
+    const int v = mmvq_sg();
+    return v == 16 || ((v & 1) && v < 4 && iq4xs) || ((v & 2) && v < 4 && n_out <= 1024);
+}
+
 __dpct_inline__ float warp_max(float x) {
 #pragma unroll
     for (int offset = WARP / 2; offset > 0; offset >>= 1) {
@@ -1181,7 +1201,7 @@ struct SmallTraits {
 // equal to ncols = 1 only to float rounding (the cross-warp reduction groups partial sums differently).
 bool g_multi_exact = true;   // until the upstream layout is timed on an idle GPU (plan rule: default only what is measured)
 
-template <typename F, int NCOLS, int NW, int ROWS>
+template <typename F, int NCOLS, int NW, int ROWS, int SG = WARP>
 /*
 DPCT1110: The total declared local variable size in device function
 native_mmvq_multi_kernel exceeds 128 bytes and may cause high register pressure.
@@ -1194,9 +1214,9 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
                          int n_in, int n_out) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     constexpr int BPI =
-        F::BPI * NW / WARPS; // blocks per iteration scale with the warp count
+        F::BPI * NW * SG / (WARPS * WARP); // blocks per iteration scale with the thread count
     const int tid =
-        WARP * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
+        SG * int(item_ct1.get_local_id(1)) + int(item_ct1.get_local_id(2));
     const int row0 = ROWS * int(item_ct1.get_group(2));
     const int blocks_per_row = n_in / F::DIV;
     const int x_stride = n_in / Q8K;                   // Q8_1 blocks per activation column
@@ -1230,7 +1250,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
         }
     }
     auto &partial = *sycl::ext::oneapi::group_local_memory_for_overwrite<
-        float[NW - 1 > 0 ? NW - 1 : 1][NCOLS][ROWS][WARP]>(
+        float[NW - 1 > 0 ? NW - 1 : 1][NCOLS][ROWS][SG]>(
         sycl::ext::oneapi::this_work_item::get_work_group<3>());
     if (item_ct1.get_local_id(1) > 0) {
 #pragma unroll
@@ -1254,7 +1274,7 @@ native_mmvq_multi_kernel(const typename F::Block *__restrict__ w,
 #pragma unroll
             for (int l = 0; l < NW - 1; ++l) tmp[j][i] +=
                 partial[l][j][i][item_ct1.get_local_id(2)];
-            tmp[j][i] = warp_sum(tmp[j][i]);
+            tmp[j][i] = sg_sum<SG>(tmp[j][i]);
             if (item_ct1.get_local_id(2) == i && row0 + i < n_out)
                 y[std::size_t(j) * n_out + row0 + i] = tmp[j][i];
         }
@@ -1308,12 +1328,13 @@ void native_mmvq_rowwarp_kernel(const typename F::Block* __restrict__ w, const Q
 // 4-byte loads and measures 130-140 GB/s on the 8192-wide Q6_K projections. Here 8 lanes share a 256-block:
 // lane g takes positions iqs = 4g..4g+3, so its ql (16 B), qh (16 B) and each column's q8 ints (16 B) are one
 // vector load each; a 32-lane sub-group has four blocks in flight. One row per warp, WARPS rows per group.
-template <int NCOLS, int RPW>
+template <int NCOLS, int RPW, int SG = WARP>
 void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block* __restrict__ x,
                                  float* __restrict__ y, int n_in, int n_out) {
     auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
-    const int row0 = (int(item.get_group(2)) * WARPS + warp) * RPW;
+    constexpr int NWG = WARPS * WARP / SG;              // sub-groups per work-group
+    const int row0 = (int(item.get_group(2)) * NWG + warp) * RPW;
     if (row0 >= n_out) return;
     const int blocks_per_row = n_in / QK, x_stride = n_in / Q8K;
     const int g = lane & 7, sub = lane >> 3;            // position group within the block, block within the iteration
@@ -1323,7 +1344,7 @@ void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block*
     const int bq8_offset = 4 * (g >> 2) + ((g & 3) >> 1);
     const int u_int4 = g & 1;                           // ints 4(g%2)..+3 of the q8 block = one int4
     float acc[RPW][NCOLS] = {};
-    for (int kbx = sub; kbx < blocks_per_row; kbx += 4) {
+    for (int kbx = sub; kbx < blocks_per_row; kbx += SG / 8) {
         const int kby = kbx * (QK / Q8K);
         sycl::int4 ql4[RPW], qh4[RPW]; float dsc0[RPW], dsc1[RPW];
 #pragma unroll
@@ -1372,7 +1393,7 @@ void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block*
         for (int j = 0; j < NCOLS; ++j) {
             float v = acc[r][j];
 #pragma unroll
-            for (int o = WARP / 2; o > 0; o >>= 1) v += dpct::experimental::permute_sub_group_by_xor(0xffffffffu, sg, v, o);
+            for (int o = SG / 2; o > 0; o >>= 1) v += sycl::permute_group_by_xor(sg, v, o);
             if (lane == 0 && row0 + r < n_out) y[std::size_t(j) * n_out + row0 + r] = v;
         }
 }
@@ -1385,6 +1406,14 @@ void launch_q6k_wide(const void* weights, const void* x_q8_1, float* y, int n_in
     const auto* w = static_cast<const Q6KBlock*>(weights);
     const auto* x = static_cast<const Q81Block*>(x_q8_1);
     const int rpw = q6k_wide_rpw();
+    if (rpw == 1 && mmvq_sg16(false, n_out)) {
+        constexpr int NWG = WARPS * WARP / 16;
+        const unsigned blocks = unsigned((std::size_t(n_out) + NWG - 1) / NWG);
+        s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide16, dpct_kernel_scalar<NCOLS>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, NWG, 16), sycl::range(1, NWG, 16)),
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] { native_mmvq_q6k_wide_kernel<NCOLS, 1, 16>(w, x, y, n_in, n_out); });
+        return;
+    }
 #define STRATA_Q6W(RP) if (rpw == RP) { \
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS * RP - 1) / (WARPS * RP)); \
         s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide, dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<RP>>>( \
@@ -1449,6 +1478,25 @@ void launch_multi_n(const void *weights, const void *x_q8_1, float *y, int n_in,
         }
         return;
     }
+    if (mmvq_sg16(std::is_same_v<F, IQ4XSTraits>, n_out)) {   // same 128 threads as 8 SIMD16 sub-groups
+        constexpr int NW16 = WARPS * WARP / 16;
+        const sycl::range<3> t16(1, NW16, 16);
+        if (n_in / F::DIV < F::BPI) {
+            const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+            s->parallel_for<dpct_kernel_name<class native_mmvq_multi16_small, F, dpct_kernel_scalar<NCOLS>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * t16, t16),
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] {
+                    native_mmvq_multi_kernel<F, NCOLS, NW16, WARPS, 16>(w, x, y, n_in, n_out);
+                });
+        } else {
+            s->parallel_for<dpct_kernel_name<class native_mmvq_multi16, F, dpct_kernel_scalar<NCOLS>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, unsigned(n_out)) * t16, t16),
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(16)]] {
+                    native_mmvq_multi_kernel<F, NCOLS, NW16, 1, 16>(w, x, y, n_in, n_out);
+                });
+        }
+        return;
+    }
     const dpct::dim3 threads(WARP, WARPS);
     if (n_in / F::DIV < F::BPI) {
         const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
diff --git a/sycl/src/kernels/mmvq_sg_bench.cpp b/sycl/src/kernels/mmvq_sg_bench.cpp
new file mode 100644
index 00000000000..91ddd99bb84
--- /dev/null
+++ b/sycl/src/kernels/mmvq_sg_bench.cpp
@@ -0,0 +1,54 @@
+// sycl/src/kernels/mmvq_sg_bench.cpp - SYCL port: the decode mmvq kernels on the Coder's dense shapes and types.
+//   mmvq_sg_bench   (run with STRATA_MMVQ_SG=16 and =32; prints us per call and a checksum of the outputs)
+#include "strata/kernels/native_mmvq.hpp"
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <cstring>
+#include <vector>
+int main() {
+    sycl::queue* s = &dpct::get_in_order_queue();
+    struct T { const char* name; int type, bytes; };   // ggml type, bytes per 256 weights
+    const T types[] = {{"q6_k", 14, 210}, {"q5_k", 13, 176}, {"q4_k", 12, 144}, {"iq4_xs", 23, 136}};
+    const int shapes[][2] = {{2560, 10240}, {2560, 12288}, {6144, 2560}, {2560, 640}};
+    const int cols[] = {2, 4, 6};
+    for (const T& t : types)
+        for (auto& sh : shapes) {
+            const int n_in = sh[0], n_out = sh[1];
+            const size_t wbytes = (size_t) n_out * (n_in / 256) * t.bytes;
+            std::vector<uint8_t> hw(wbytes);
+            for (size_t i = 0; i < wbytes; ++i) hw[i] = (uint8_t) (i * 2654435761u >> 13) & 0x3b;   // keeps fp16 fields finite
+            void* w = sycl::malloc_device(wbytes, *s);
+            s->memcpy(w, hw.data(), wbytes).wait();
+            for (int nc : cols) {
+                std::vector<float> hx((size_t) nc * n_in);
+                for (size_t i = 0; i < hx.size(); ++i) hx[i] = (float) ((i * 7919) % 1000) / 500.f - 1.f;
+                float* x = sycl::malloc_device<float>(hx.size(), *s);
+                void* xq = sycl::malloc_device((size_t) nc * (n_in / 32) * 36, *s);
+                float* y = sycl::malloc_device<float>((size_t) nc * n_out, *s);
+                s->memcpy(x, hx.data(), hx.size() * 4).wait();
+                strata::kernels::native_quantize_q8_1(x, xq, n_in, nc, s);
+                auto run = [&] { strata::kernels::native_mmvq(t.type, w, xq, y, n_in, n_out, nc, s); };
+                const auto w0 = std::chrono::steady_clock::now();
+                while (std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count() < 150) {
+                    for (int i = 0; i < 20; ++i) run();
+                    s->wait();
+                }
+                const int it = 300;
+                const auto t0 = std::chrono::steady_clock::now();
+                for (int i = 0; i < it; ++i) run();
+                s->wait();
+                const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count() / it;
+                std::vector<float> hy((size_t) nc * n_out);
+                s->memcpy(hy.data(), y, hy.size() * 4).wait();
+                double cs = 0; for (float v : hy) cs += std::isfinite(v) ? std::fabs((double) v) : 1e30;
+                std::printf("%-7s %5d x %5d  cols %d  %7.1f us  %6.1f GB/s  sum %.6e\n", t.name, n_in, n_out, nc, us,
+                            wbytes / us / 1e3, cs);
+                sycl::free(x, *s); sycl::free(xq, *s); sycl::free(y, *s);
+            }
+            sycl::free(w, *s);
+        }
+    return 0;
+}

From 38a979d824b4cb90bfecf3343b0d69b1b5497fda Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 21:43:56 -0500
Subject: [PATCH 036/201] sycl: aligned loads for the Q6_K decode kernel
 (decode 45 -> 54 tok/s); PLE gather trace

Q6_K blocks are 210 bytes, so the wide kernel's 16-byte ql/qh loads were
2-byte aligned and the B70 split them: 145 GB/s against 640 GB/s for the
same blocks at a 224-byte stride. load16_a2 does two aligned loads and a
shift; with it the wide kernel takes every Q6_K shape and up to 8 columns
(2.6-3.4x in q6k_align_bench). Output tokens identical.

Also a port copy of ple_reader.cpp with STRATA_PLE_TRACE=1, which showed
the 45/39 tok/s two-speed runs are one 226 ms PLE stall landing in either
the prompt or the first decode round (TTFT + decode is the same).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                               |  16 +
 sycl/CMakeLists.txt                         |   2 +
 sycl/include/strata/kernels/native_mmvq.hpp |   2 +
 sycl/src/kernels/cuda/native_mmvq.dp.cpp    | 168 ++++++-
 sycl/src/kernels/q6k_align_bench.cpp        |  59 +++
 sycl/src/ngram/ple_reader.cpp               | 477 ++++++++++++++++++++
 6 files changed, 717 insertions(+), 7 deletions(-)
 create mode 100644 sycl/src/kernels/q6k_align_bench.cpp
 create mode 100644 sycl/src/ngram/ple_reader.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 57a0acf9877..14093b67179 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -374,6 +374,22 @@ runtime's teardown began); it now exits directly once its requests are done.
    setting beats SIMD32 beyond run-to-run noise (SIMD32 itself lands at 39 or 45 tok/s). Output tokens identical.
    The same bench shows the real headroom: the dense decode kernels stream 100-280 GB/s of a 608 GB/s card
    (Q6_K, the most common type, ~146 GB/s at 2-4 columns).
+   **Found and fixed: misaligned loads.** A Q6_K block is 210 bytes, so every block's `ql`/`qh` runs start only
+   2-byte aligned, and the B70 splits a misaligned 16-byte load into pieces. The same weights repacked at a
+   224-byte stride ran 2.3-4.7x faster (`q6k_align_bench`). Without changing the layout, the wide Q6_K kernel now
+   does two aligned 16-byte loads and a shift (`load16_a2`; both stay inside the block) and takes every Q6_K
+   shape and window width (it used to be gated to n_out >= 4096, 1-4 columns): 2560->10240 at 1/2/4/6 columns
+   160/145/141/101 -> 493/432/331/273 GB/s, the 248K-row head 150 -> 407 GB/s at 1 column. Output tokens
+   identical. **Coder decode 44.9 -> 54 tok/s** (2k prompt, greedy). `STRATA_MMVQ_A2=0` restores the old path.
+   Still misaligned: IQ4_XS (136 B, 8-aligned, ~100 GB/s), IQ4_NL (18 B), Q8_0 (34 B); Q4_K/Q5_K are aligned
+   but use 4-byte loads in the multi kernel (230-280 GB/s).
+
+**Two-speed runs, explained (2026-09-30).** Identical greedy runs decode at either ~45 or ~39 tok/s. A per-gather
+trace of the PLE reader (`STRATA_PLE_TRACE=1`) shows the slow runs pay one 226 ms PLE read stall in the first
+decode round, after the window graphs are captured; every other read and round matches the fast runs. Prompt time
+plus decode time is the same in both modes (4.95-5.17 s): the stall lands either in the prompt's PLE wait or in the
+first decode round, so it is a once-per-process cost, not lost throughput. Ruled out: NVMe APST, the I/O scheduler
+(`none`), CPU starvation (93% idle during decode), I/O thread count. Compare runs on time to first token + decode.
 6. INT8 prompt GEMMs: experts dequantized to INT8, oneMKL/oneDNN INT8 on XMX (half the dequant bytes, 2x rate).
 7. Fewer graph nodes per decode round (~2,500 at ~5 us): norm+rope, scores+top-k, gate+quantize fused.
 8. Wider speculation (two draft branches per verify window): the kernels are latency-bound, so it is nearly free.
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index f4392de3eb0..949aa17b280 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -195,6 +195,8 @@ if(STRATA_SYCL_PARITY)
   target_link_libraries(mmvq_bench PRIVATE strata_kernels)
   add_executable(mmvq_sg_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/mmvq_sg_bench.cpp)   # SIMD16 vs 32 decode mmvq
   target_link_libraries(mmvq_sg_bench PRIVATE strata_kernels)
+  add_executable(q6k_align_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/q6k_align_bench.cpp)   # Q6_K block alignment
+  target_link_libraries(q6k_align_bench PRIVATE strata_kernels)
   add_executable(xmx_gemm_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/xmx_gemm_bench.cpp)   # XMX quantized GEMM vs dequant+oneMKL
   target_link_libraries(xmx_gemm_bench PRIVATE strata_kernels strata_prefill)   # -qmkl for the oneMKL reference
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
diff --git a/sycl/include/strata/kernels/native_mmvq.hpp b/sycl/include/strata/kernels/native_mmvq.hpp
index a49412449ec..4b3e82a6f39 100644
--- a/sycl/include/strata/kernels/native_mmvq.hpp
+++ b/sycl/include/strata/kernels/native_mmvq.hpp
@@ -31,6 +31,8 @@ std::size_t native_q8_1_bytes(int n_in, int ncols = 1);
 // graph capture; captured graphs keep the kernels they captured.
 void native_mmvq_set_multi_exact(bool exact);
 void native_mmvq_set_q6k_wide(bool on);   // SYCL port: the 16-byte-load Q6_K kernel (default on)
+void native_q6_k_mmvq_stride224(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols,
+                                void* stream);   // SYCL port: experiment, Q6_K blocks at a 224-byte stride
 bool native_mmvq_multi_exact();
 
 // One quantization may serve multiple weight matrices sharing the same input.
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 8abf247596e..f6d4fe6ac34 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -1328,7 +1328,33 @@ void native_mmvq_rowwarp_kernel(const typename F::Block* __restrict__ w, const Q
 // 4-byte loads and measures 130-140 GB/s on the 8192-wide Q6_K projections. Here 8 lanes share a 256-block:
 // lane g takes positions iqs = 4g..4g+3, so its ql (16 B), qh (16 B) and each column's q8 ints (16 B) are one
 // vector load each; a 32-lane sub-group has four blocks in flight. One row per warp, WARPS rows per group.
-template <int NCOLS, int RPW, int SG = WARP>
+// SYCL port: a 16-byte load from a 2-byte aligned address as two aligned 16-byte loads and a shift. A Q6_K block
+// is 210 bytes, so its ql/qh runs start 2-byte aligned, and the B70 splits a misaligned vector load into pieces:
+// the wide kernel streamed 145 GB/s that way against 640 GB/s for the same blocks repacked at a 16-byte stride.
+// Both aligned loads stay inside the 210-byte block for the ql and qh runs (last byte read <= block + 207).
+__dpct_inline__ sycl::int4 load16_a2(const void* p) {
+    const uintptr_t a = reinterpret_cast<uintptr_t>(p);
+    const sycl::int4* q = reinterpret_cast<const sycl::int4*>(a & ~uintptr_t(15));
+    const int k = int(a >> 2) & 3;          // dword offset within the first aligned chunk
+    const bool half = (a & 2) != 0;          // and a 2-byte shift (the address is always 2-byte aligned)
+    const sycl::int4 lo = q[0], hi = q[1];
+    const uint32_t d[8] = {(uint32_t) lo.x(), (uint32_t) lo.y(), (uint32_t) lo.z(), (uint32_t) lo.w(),
+                           (uint32_t) hi.x(), (uint32_t) hi.y(), (uint32_t) hi.z(), (uint32_t) hi.w()};
+    uint32_t w[5];
+#pragma unroll
+    for (int i = 0; i < 5; ++i)              // w = d[k .. k+4] by selects (no indexed register access)
+        w[i] = k == 0 ? d[i] : k == 1 ? d[i + 1] : k == 2 ? d[i + 2] : d[(i + 3) & 7];
+    uint32_t o[4];
+#pragma unroll
+    for (int i = 0; i < 4; ++i) o[i] = half ? (w[i] >> 16) | (w[i + 1] << 16) : w[i];
+    return sycl::int4((int) o[0], (int) o[1], (int) o[2], (int) o[3]);
+}
+inline bool q6k_a2() {   // STRATA_MMVQ_A2=0 turns the aligned-load path off
+    static const bool v = std::getenv("STRATA_MMVQ_A2") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_A2")) != 0;
+    return v;
+}
+
+template <int NCOLS, int RPW, int SG = WARP, int BS = (int) sizeof(Q6KBlock), bool A2 = false>   // BS: block stride
 void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block* __restrict__ x,
                                  float* __restrict__ y, int n_in, int n_out) {
     auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -1349,9 +1375,15 @@ void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block*
         sycl::int4 ql4[RPW], qh4[RPW]; float dsc0[RPW], dsc1[RPW];
 #pragma unroll
         for (int r = 0; r < RPW; ++r) {
-            const Q6KBlock* b = w + std::size_t(row0 + (row0 + r < n_out ? r : 0)) * blocks_per_row + kbx;
-            ql4[r] = reinterpret_cast<const sycl::int4*>(b->ql)[g];
-            qh4[r] = reinterpret_cast<const sycl::int4*>(b->qh)[qh4_idx];
+            const Q6KBlock* b = reinterpret_cast<const Q6KBlock*>(reinterpret_cast<const uint8_t*>(w) +
+                (std::size_t(row0 + (row0 + r < n_out ? r : 0)) * blocks_per_row + kbx) * BS);
+            if constexpr (A2) {
+                ql4[r] = load16_a2(b->ql + 16 * g);
+                qh4[r] = load16_a2(b->qh + 16 * qh4_idx);
+            } else {
+                ql4[r] = reinterpret_cast<const sycl::int4*>(b->ql)[g];
+                qh4[r] = reinterpret_cast<const sycl::int4*>(b->qh)[qh4_idx];
+            }
             const float d = b->d;
             dsc0[r] = d * (float) b->scales[scale_offset]; dsc1[r] = d * (float) b->scales[scale_offset + 4];
         }
@@ -1397,6 +1429,78 @@ void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block*
             if (lane == 0 && row0 + r < n_out) y[std::size_t(j) * n_out + row0 + r] = v;
         }
 }
+// SYCL port: the wide Q6_K kernel with its weight loads issued U steps ahead. The wide kernel's 2560-wide rows
+// are ~3 steps of load -> wait -> dot per sub-group, so each sub-group has one 16-byte load per lane in flight
+// at a time and the kernel is latency-bound (~146 GB/s). Here a sub-group first issues the ql/qh/scale loads
+// of U steps (4U blocks), then does their dots; the activation reads stay inline (they are L1 hits, shared by
+// every row). One row per sub-group, WARPS rows per group.
+template <int NCOLS, int U>
+void native_mmvq_q6k_pf_kernel(const Q6KBlock* __restrict__ w, const Q81Block* __restrict__ x,
+                               float* __restrict__ y, int n_in, int n_out) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
+    const int row = int(item.get_group(2)) * WARPS + warp;
+    if (row >= n_out) return;
+    const int blocks_per_row = n_in / QK, x_stride = n_in / Q8K;
+    const int g = lane & 7, sub = lane >> 3;
+    const int vh_shift = 2 * ((g & 3) >> 1);
+    const int qh4_idx = 2 * (g >> 2) + (g & 1);
+    const int scale_offset = 8 * (g >> 2) + (g & 3);
+    const int bq8_offset = 4 * (g >> 2) + ((g & 3) >> 1);
+    const int u_int4 = g & 1;
+    const Q6KBlock* wr = w + std::size_t(row) * blocks_per_row;
+    float acc[NCOLS] = {};
+    for (int kb0 = 0; kb0 < blocks_per_row; kb0 += 4 * U) {
+        sycl::int4 ql4[U], qh4[U]; float dsc0[U], dsc1[U]; bool ok[U];
+#pragma unroll
+        for (int u = 0; u < U; ++u) {      // all U steps' weight loads first
+            const int kbx = kb0 + 4 * u + sub;
+            ok[u] = kbx < blocks_per_row;
+            const Q6KBlock* b = wr + (ok[u] ? kbx : 0);
+            ql4[u] = reinterpret_cast<const sycl::int4*>(b->ql)[g];
+            qh4[u] = reinterpret_cast<const sycl::int4*>(b->qh)[qh4_idx];
+            const float d = b->d;
+            dsc0[u] = d * (float) b->scales[scale_offset]; dsc1[u] = d * (float) b->scales[scale_offset + 4];
+        }
+#pragma unroll
+        for (int u = 0; u < U; ++u) {
+            if (!ok[u]) continue;
+            const int kby = (kb0 + 4 * u + sub) * (QK / Q8K);
+            const int vl[4] = {ql4[u].x(), ql4[u].y(), ql4[u].z(), ql4[u].w()};
+            const int vh[4] = {qh4[u].x() >> vh_shift, qh4[u].y() >> vh_shift, qh4[u].z() >> vh_shift, qh4[u].w() >> vh_shift};
+            int vi0[4], vi1[4];
+#pragma unroll
+            for (int p = 0; p < 4; ++p) {
+                vi0[p] = dpct::vectorized_binary<sycl::char4>((vl[p] & 0x0f0f0f0f) | ((vh[p] << 4) & 0x30303030), 0x20202020, dpct::sub_sat());
+                vi1[p] = dpct::vectorized_binary<sycl::char4>(((vl[p] >> 4) & 0x0f0f0f0f) | (((vh[p] >> 4) << 4) & 0x30303030), 0x20202020, dpct::sub_sat());
+            }
+#pragma unroll
+            for (int j = 0; j < NCOLS; ++j) {
+                const Q81Block* xb = x + std::size_t(j) * x_stride + kby + bq8_offset;
+                const sycl::int4 a0 = reinterpret_cast<const sycl::int4*>(xb[0].qs)[u_int4];
+                const sycl::int4 a1 = reinterpret_cast<const sycl::int4*>(xb[2].qs)[u_int4];
+                int s0 = 0, s1 = 0;
+                s0 = strata::dp4a(vi0[0], a0.x(), s0); s0 = strata::dp4a(vi0[1], a0.y(), s0);
+                s0 = strata::dp4a(vi0[2], a0.z(), s0); s0 = strata::dp4a(vi0[3], a0.w(), s0);
+                s1 = strata::dp4a(vi1[0], a1.x(), s1); s1 = strata::dp4a(vi1[1], a1.y(), s1);
+                s1 = strata::dp4a(vi1[2], a1.z(), s1); s1 = strata::dp4a(vi1[3], a1.w(), s1);
+                acc[j] += (float) xb[0].ds[0] * dsc0[u] * (float) s0 + (float) xb[2].ds[0] * dsc1[u] * (float) s1;
+            }
+        }
+    }
+    auto sg = item.get_sub_group();
+#pragma unroll
+    for (int j = 0; j < NCOLS; ++j) {
+        float v = acc[j];
+#pragma unroll
+        for (int o = WARP / 2; o > 0; o >>= 1) v += sycl::permute_group_by_xor(sg, v, o);
+        if (lane == 0) y[std::size_t(j) * n_out + row] = v;
+    }
+}
+inline int q6k_pf() {   // STRATA_MMVQ_PF: weight-load steps issued ahead in the wide Q6_K kernel (0 = off)
+    static const int v = std::getenv("STRATA_MMVQ_PF") ? std::atoi(std::getenv("STRATA_MMVQ_PF")) : 0;
+    return v;
+}
 inline int q6k_wide_rpw() {
     static const int v = std::getenv("STRATA_MMVQ_WIDE_RPW") ? std::atoi(std::getenv("STRATA_MMVQ_WIDE_RPW")) : 1;
     return v;
@@ -1406,6 +1510,26 @@ void launch_q6k_wide(const void* weights, const void* x_q8_1, float* y, int n_in
     const auto* w = static_cast<const Q6KBlock*>(weights);
     const auto* x = static_cast<const Q81Block*>(x_q8_1);
     const int rpw = q6k_wide_rpw();
+    if (const int pf = q6k_pf(); pf > 0) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        const sycl::range<3> t(1, WARPS, WARP);
+#define STRATA_Q6PF(UU) if (pf == UU) { \
+            s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_pf, dpct_kernel_scalar<NCOLS>, dpct_kernel_scalar<UU>>>( \
+                sycl::nd_range<3>(sycl::range(1, 1, blocks) * t, t), \
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_pf_kernel<NCOLS, UU>(w, x, y, n_in, n_out); }); \
+            return; }
+        STRATA_Q6PF(2) STRATA_Q6PF(3) STRATA_Q6PF(4) STRATA_Q6PF(6)
+#undef STRATA_Q6PF
+    }
+    if (rpw == 1 && q6k_a2()) {
+        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+        s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide_a2, dpct_kernel_scalar<NCOLS>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] {
+                native_mmvq_q6k_wide_kernel<NCOLS, 1, WARP, (int) sizeof(Q6KBlock), true>(w, x, y, n_in, n_out);
+            });
+        return;
+    }
     if (rpw == 1 && mmvq_sg16(false, n_out)) {
         constexpr int NWG = WARPS * WARP / 16;
         const unsigned blocks = unsigned((std::size_t(n_out) + NWG - 1) / NWG);
@@ -1427,6 +1551,16 @@ void launch_q6k_wide(const void* weights, const void* x_q8_1, float* y, int n_in
         sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
         [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_wide_kernel<NCOLS, 1>(w, x, y, n_in, n_out); });
 }
+// SYCL port: alignment experiment - Q6_K blocks repacked at a 224-byte stride (every block 16-byte aligned).
+template <int NCOLS>
+void launch_q6k_wide224(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const Q6KBlock*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+    s->parallel_for<dpct_kernel_name<class native_mmvq_q6k_wide224, dpct_kernel_scalar<NCOLS>>>(
+        sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_wide_kernel<NCOLS, 1, WARP, 224>(w, x, y, n_in, n_out); });
+}
 bool g_q6k_wide = std::getenv("STRATA_MMVQ_WIDE") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_WIDE")) != 0;
 
 template <typename F, int NCOLS, int RPW>
@@ -1695,6 +1829,17 @@ void small_f32(const void* weights, const float* x, void* scratch_q8_1,
 
 void native_mmvq_set_multi_exact(bool exact) { g_multi_exact = exact; }
 void native_mmvq_set_q6k_wide(bool on) { g_q6k_wide = on; }
+void native_q6_k_mmvq_stride224(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols,
+                                void* stream) {
+    const auto s = strata::q_of(stream);
+    switch (ncols) {
+        case 1: launch_q6k_wide224<1>(weights, x_q8_1, y, n_in, n_out, s); return;
+        case 2: launch_q6k_wide224<2>(weights, x_q8_1, y, n_in, n_out, s); return;
+        case 3: launch_q6k_wide224<3>(weights, x_q8_1, y, n_in, n_out, s); return;
+        case 4: launch_q6k_wide224<4>(weights, x_q8_1, y, n_in, n_out, s); return;
+        default: launch_q6k_wide224<6>(weights, x_q8_1, y, n_in, n_out, s); return;
+    }
+}
 bool native_mmvq_multi_exact() { return g_multi_exact; }
 
 std::size_t native_q8_1_bytes(int n_in, int ncols) {
@@ -2116,13 +2261,22 @@ void native_q4_k_f32(const void* weights, const float* x, void* scratch_q8_1,
 void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
                       int n_in, int n_out, int ncols, void* stream) {
     // SYCL port: 16-byte-load kernel for the decode shapes (ncols <= 4)
-    if (g_q6k_wide && ncols >= 1 && ncols <= 4 && n_in % 256 == 0 && n_out >= 4096) {   // measured: wins only on the wide projections
-        dpct::queue_ptr s = strata::q_of(stream);
+    // With the aligned loads (load16_a2) the wide kernel wins on every Q6_K shape and window width: 2.6-3.4x the
+    // misaligned-load kernels in q6k_align_bench, decode 44.9 -> 54 tok/s on the Coder, output tokens identical.
+    // Without them (STRATA_MMVQ_A2=0) it won only on n_out >= 4096 at 1-4 columns, the old gate.
+    static const int wide_min = std::getenv("STRATA_MMVQ_WIDE_MIN") ? std::atoi(std::getenv("STRATA_MMVQ_WIDE_MIN")) : q6k_a2() ? 0 : 4096;
+    static const int wide_maxc = std::getenv("STRATA_MMVQ_WIDE_MAXC") ? std::atoi(std::getenv("STRATA_MMVQ_WIDE_MAXC")) : q6k_a2() ? 8 : 4;
+    if (g_q6k_wide && ncols >= 1 && ncols <= wide_maxc && n_in % 256 == 0 && n_out >= wide_min) {
+        const auto s = strata::q_of(stream);
         switch (ncols) {
             case 1: launch_q6k_wide<1>(weights, x_q8_1, y, n_in, n_out, s); return;
             case 2: launch_q6k_wide<2>(weights, x_q8_1, y, n_in, n_out, s); return;
             case 3: launch_q6k_wide<3>(weights, x_q8_1, y, n_in, n_out, s); return;
-            default: launch_q6k_wide<4>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 4: launch_q6k_wide<4>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 5: launch_q6k_wide<5>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 6: launch_q6k_wide<6>(weights, x_q8_1, y, n_in, n_out, s); return;
+            case 7: launch_q6k_wide<7>(weights, x_q8_1, y, n_in, n_out, s); return;
+            default: launch_q6k_wide<8>(weights, x_q8_1, y, n_in, n_out, s); return;
         }
     }
     // SYCL port: the row-blocked kernel for the decode shapes (ncols <= 4)
diff --git a/sycl/src/kernels/q6k_align_bench.cpp b/sycl/src/kernels/q6k_align_bench.cpp
new file mode 100644
index 00000000000..e68149e3b72
--- /dev/null
+++ b/sycl/src/kernels/q6k_align_bench.cpp
@@ -0,0 +1,59 @@
+// sycl/src/kernels/q6k_align_bench.cpp - SYCL port: does Q6_K's 210-byte (2-byte aligned) block stride cost the wide
+// mmvq kernel its bandwidth? Same weights at stride 210 and repacked at 224 (16-byte aligned); outputs must match.
+#include "strata/kernels/native_mmvq.hpp"
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <chrono>
+#include <cmath>
+#include <cstdio>
+#include <cstring>
+#include <functional>
+#include <vector>
+int main() {
+    sycl::queue* s = &dpct::get_in_order_queue();
+    const int shapes[][2] = {{2560, 10240}, {2560, 12288}, {6144, 2560}, {2560, 248320}};
+    for (auto& sh : shapes) {
+        const int n_in = sh[0], n_out = sh[1];
+        const size_t nb = (size_t) n_out * (n_in / 256);
+        std::vector<uint8_t> hw(nb * 210), hp(nb * 224, 0);
+        for (size_t i = 0; i < hw.size(); ++i) hw[i] = (uint8_t) (i * 2654435761u >> 13) & 0x3b;
+        for (size_t b = 0; b < nb; ++b) std::memcpy(&hp[b * 224], &hw[b * 210], 210);
+        void* w = sycl::malloc_device(hw.size(), *s);
+        void* wp = sycl::malloc_device(hp.size(), *s);
+        s->memcpy(w, hw.data(), hw.size()).wait(); s->memcpy(wp, hp.data(), hp.size()).wait();
+        for (int nc : {1, 2, 4, 6}) {
+            std::vector<float> hx((size_t) nc * n_in);
+            for (size_t i = 0; i < hx.size(); ++i) hx[i] = (float) ((i * 7919) % 1000) / 500.f - 1.f;
+            float* x = sycl::malloc_device<float>(hx.size(), *s);
+            void* xq = sycl::malloc_device((size_t) nc * (n_in / 32) * 36, *s);
+            float* y = sycl::malloc_device<float>((size_t) nc * n_out, *s);
+            s->memcpy(x, hx.data(), hx.size() * 4).wait();
+            strata::kernels::native_quantize_q8_1(x, xq, n_in, nc, s);
+            auto time = [&](const std::function<void()>& run, std::vector<float>& out) {
+                const auto w0 = std::chrono::steady_clock::now();
+                while (std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count() < 150) {
+                    for (int i = 0; i < 10; ++i) run();
+                    s->wait();
+                }
+                const int it = 200;
+                const auto t0 = std::chrono::steady_clock::now();
+                for (int i = 0; i < it; ++i) run();
+                s->wait();
+                out.resize((size_t) nc * n_out);
+                s->memcpy(out.data(), y, out.size() * 4).wait();
+                return std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count() / it;
+            };
+            std::vector<float> y0, y1;
+            const double a = time([&] { strata::kernels::native_q6_k_mmvq(w, xq, y, n_in, n_out, nc, s); }, y0);
+            const double b = time([&] { strata::kernels::native_q6_k_mmvq_stride224(wp, xq, y, n_in, n_out, nc, s); }, y1);
+            double num = 0, den = 0;
+            for (size_t i = 0; i < y0.size(); ++i) { num += std::fabs((double) y0[i] - y1[i]); den += std::fabs((double) y0[i]); }
+            const double gb = nb * 210.0 / 1e3;
+            std::printf("q6_k %5d x %6d cols %d: stride 210 %7.1f us %6.1f GB/s | stride 224 %7.1f us %6.1f GB/s (%.2fx) | rel diff %.1e\n",
+                        n_in, n_out, nc, a, gb / a, b, gb / b, a / b, num / (den > 0 ? den : 1));
+            sycl::free(x, *s); sycl::free(xq, *s); sycl::free(y, *s);
+        }
+        sycl::free(w, *s); sycl::free(wp, *s);
+    }
+    return 0;
+}
diff --git a/sycl/src/ngram/ple_reader.cpp b/sycl/src/ngram/ple_reader.cpp
new file mode 100644
index 00000000000..19e017b4d5c
--- /dev/null
+++ b/sycl/src/ngram/ple_reader.cpp
@@ -0,0 +1,477 @@
+// sycl/src/ngram/ple_reader.cpp - SYCL port: upstream src/ngram/ple_reader.cpp plus a per-gather timing trace
+// (STRATA_PLE_TRACE=1: where a decode round's PLE wait goes). See include/strata/ngram/ple_reader.hpp.
+#include <cstdio>
+#include <cstdlib>
+#include "strata/ngram/ple_reader.hpp"
+
+#include <algorithm>
+#include <condition_variable>
+#include <cstring>
+#include <deque>
+#include <exception>
+#include <mutex>
+#include <thread>
+#include <unordered_map>
+
+namespace strata::ngram {
+
+using platform::Completion;
+using platform::DirectFile;
+using platform::now_us;
+
+double ReaderStats::percentile(double q) const {
+    if (read_us.empty()) return 0.0;
+    std::vector<float> v(read_us);
+    const size_t k = std::min(v.size() - 1, (size_t) (q * (double) (v.size() - 1) + 0.5));
+    std::nth_element(v.begin(), v.begin() + (ptrdiff_t) k, v.end());
+    return v[k];
+}
+
+namespace {
+
+constexpr size_t LATENCY_RING = 65536;
+constexpr uint32_t WAYS = 8;
+constexpr uint32_t EMPTY = 0xFFFFFFFFu;
+
+/// Set-associative row cache: 8 ways per set, round-robin replacement inside a set. Bounded by construction.
+struct RowCache {
+    uint64_t sets = 0;
+    std::vector<uint32_t> keys;     // sets * WAYS
+    std::vector<uint8_t> data;      // sets * WAYS * ROW_BYTES
+    std::vector<uint8_t> next;      // per-set replacement pointer
+    uint64_t used = 0;
+
+    void init(uint64_t rows) {
+        sets = rows / WAYS;
+        keys.assign(sets * WAYS, EMPTY);
+        data.assign(sets * WAYS * ROW_BYTES, 0);
+        next.assign(sets, 0);
+        used = 0;
+    }
+    static uint64_t mix(uint32_t r) {
+        uint64_t x = r * 0x9E3779B97F4A7C15ull;
+        return x ^ (x >> 29);
+    }
+    const uint8_t* find(uint32_t row) const {
+        if (sets == 0) return nullptr;
+        const uint64_t s = mix(row) % sets;
+        for (uint32_t w = 0; w < WAYS; ++w)
+            if (keys[s * WAYS + w] == row) return &data[(s * WAYS + w) * ROW_BYTES];
+        return nullptr;
+    }
+    void insert(uint32_t row, const uint8_t* bytes) {
+        if (sets == 0 || find(row) != nullptr) return;
+        const uint64_t s = mix(row) % sets;
+        uint32_t w = next[s];
+        next[s] = (uint8_t) ((w + 1) % WAYS);
+        if (keys[s * WAYS + w] == EMPTY) ++used;
+        keys[s * WAYS + w] = row;
+        std::memcpy(&data[(s * WAYS + w) * ROW_BYTES], bytes, ROW_BYTES);
+    }
+};
+
+struct Use {
+    uint32_t row;
+    uint32_t in_page;      // byte offset of the row inside the read buffer
+    uint8_t* dst;
+};
+
+struct Job {
+    uint64_t offset = 0;   // aligned file offset
+    uint32_t length = 0;   // PAGE or 2 * PAGE (a row that straddles a page boundary)
+    uint32_t ticket = 0;
+    std::vector<Use> uses;
+    double issued_us = 0;
+};
+
+struct TicketState {
+    uint32_t pending = 0;  // jobs not yet completed
+    uint32_t jobs = 0;     // SYCL port trace: jobs issued, and when it was issued / first submitted / last completed
+    double t_issue = 0, t_first = 0, t_last = 0;
+};
+bool ple_trace() {
+    static const bool v = std::getenv("STRATA_PLE_TRACE") != nullptr;
+    return v;
+}
+
+}  // namespace
+
+// THREADING. With `io_thread` (the default) one worker thread owns every DirectFile call: it submits queued jobs
+// and reaps completions, so `issue` on the caller's thread only builds jobs and wakes it (~11 us per ReadFile
+// no longer lands on the host loop). `mu` guards everything below except `file`, which only the worker touches
+// (plus `wake`, which is thread-safe). Without `io_thread` the caller does all of it, as before.
+struct PleReader::Impl {
+    DirectFile file;
+    uint64_t table_offset = 0;
+    uint64_t n_rows = 0;
+    uint32_t max_inflight = 0;
+    uint8_t* slab = nullptr;              // max_inflight slots of 2 pages
+    std::vector<uint32_t> free_slots;
+    std::vector<Job> inflight;            // indexed by slot
+    std::vector<Completion> delayed;      // completed but held back by fault injection
+    std::deque<Job> queue;                // not yet submitted
+    std::unordered_map<uint32_t, TicketState> tickets;
+    uint32_t next_ticket = 1;
+    RowCache cache;
+    ReaderStats stats;
+    size_t ring_pos = 0;
+    double delay_us = 0;
+    std::string error;
+
+    bool threaded = false;
+    bool stop = false;
+    std::mutex mu;
+    std::condition_variable cv_work;      // worker: there is something to submit
+    std::condition_variable cv_done;      // collectors: a ticket may have completed
+    std::thread worker;
+
+    uint8_t* slot_buf(uint32_t s) { return slab + (size_t) s * 2 * PAGE; }
+    bool busy() const { return free_slots.size() < max_inflight || !delayed.empty(); }
+
+    void cancel_queued() {
+        for (const Job& job : queue) {
+            auto it = tickets.find(job.ticket);
+            if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
+        }
+        queue.clear();
+    }
+
+    void record_latency(double us) {
+        stats.read_us_sum += us;
+        if (stats.read_us.size() < LATENCY_RING) stats.read_us.push_back((float) us);
+        else stats.read_us[ring_pos++ % LATENCY_RING] = (float) us;
+    }
+
+    bool pump() {
+        while (!queue.empty() && !free_slots.empty()) {
+            const uint32_t s = free_slots.back();
+            free_slots.pop_back();
+            inflight[s] = std::move(queue.front());
+            queue.pop_front();
+            Job& j = inflight[s];
+            j.issued_us = now_us();
+            if (ple_trace()) {
+                auto tt = tickets.find(j.ticket);
+                if (tt != tickets.end() && tt->second.t_first == 0) tt->second.t_first = j.issued_us;
+            }
+            if (!file.submit(j.offset, slot_buf(s), j.length, s, error)) {
+                j.uses.clear();
+                auto it = tickets.find(j.ticket);
+                if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
+                free_slots.push_back(s);
+                cancel_queued();
+                return false;
+            }
+            stats.submit_us += now_us() - j.issued_us;
+            ++stats.reads;
+        }
+        return true;
+    }
+
+    bool finish(const Completion& c) {
+        const uint32_t s = (uint32_t) c.tag;
+        if (s >= inflight.size()) {
+            error = "PleReader: invalid table-read completion";
+            cancel_queued();
+            return false;
+        }
+        Job& j = inflight[s];
+        if (!c.ok) {
+            error = "PleReader: a table read failed";
+            cancel_queued();
+            j.uses.clear();
+            auto it = tickets.find(j.ticket);
+            if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
+            free_slots.push_back(s);
+            return false;
+        }
+        record_latency(now_us() - j.issued_us);
+        stats.bytes += c.bytes;
+        const uint8_t* buf = slot_buf(s);
+        for (const Use& u : j.uses) {
+            if (u.in_page + ROW_BYTES > c.bytes) {
+                error = "PleReader: short read inside the table";
+                cancel_queued();
+                j.uses.clear();
+                auto it = tickets.find(j.ticket);
+                if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
+                free_slots.push_back(s);
+                return false;
+            }
+        }
+        for (const Use& u : j.uses) {
+            std::memcpy(u.dst, buf + u.in_page, ROW_BYTES);
+            cache.insert(u.row, buf + u.in_page);
+        }
+        auto it = tickets.find(j.ticket);
+        if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
+        if (ple_trace() && it != tickets.end()) it->second.t_last = now_us();
+        j.uses.clear();
+        free_slots.push_back(s);
+        return error.empty() ? pump() : true;
+    }
+
+    /// Completions (or wake packets) just returned by `file.wait`, applying fault injection.
+    bool process(const Completion* got, int n) {
+        bool ok = true;
+        for (int i = 0; i < n; ++i) {
+            if (got[i].tag == DirectFile::WAKE_TAG) continue;
+            if (got[i].tag >= inflight.size()) {
+                error = "PleReader: invalid table-read completion";
+                cancel_queued();
+                ok = false;
+                continue;
+            }
+            if (delay_us > 0 && now_us() - inflight[(uint32_t) got[i].tag].issued_us < delay_us) {
+                delayed.push_back(got[i]);
+                ++stats.late_injected;
+                continue;
+            }
+            if (!finish(got[i])) ok = false;   // drain the rest of this batch so no completed slot is stranded
+        }
+        return ok;
+    }
+
+    bool release_delayed() {
+        const double now = now_us();
+        for (size_t i = 0; i < delayed.size();) {
+            if (now - inflight[(uint32_t) delayed[i].tag].issued_us >= delay_us) {
+                const Completion c = delayed[i];
+                delayed.erase(delayed.begin() + (ptrdiff_t) i);
+                if (!finish(c)) return false;
+            } else {
+                ++i;
+            }
+        }
+        return true;
+    }
+
+    /// Caller-thread mode: process whatever has completed; blocks up to `timeout_ms` for the first completion.
+    bool drain(int timeout_ms) {
+        Completion got[64];
+        if (!delayed.empty()) {
+            if (!release_delayed()) return false;
+            timeout_ms = 0;                        // keep polling the held completions
+        }
+        const int n = file.wait(got, 64, timeout_ms);
+        return process(got, n);
+    }
+
+    void worker_loop() {
+        std::unique_lock<std::mutex> lk(mu);
+        for (;;) {
+            cv_work.wait(lk, [&] { return stop || !queue.empty() || busy(); });
+            if (stop && !busy()) break;
+            if (error.empty() && !pump() && error.empty()) error = "PleReader: submit failed";
+            if (!delayed.empty() && !release_delayed() && error.empty()) error = "PleReader: read failed";
+            if (!error.empty()) {
+                cv_done.notify_all();
+                if (!busy()) { cv_work.wait(lk, [&] { return stop; }); break; }
+            }
+            if (!busy()) { cv_done.notify_all(); continue; }
+            // Block in the port WITHOUT the lock, so `issue` can queue work; `issue` wakes us with a packet.
+            const int timeout = delayed.empty() ? -1 : 0;
+            lk.unlock();
+            Completion got[64];
+            const int n = file.wait(got, 64, timeout);
+            lk.lock();
+            if (!process(got, n) && error.empty()) error = "PleReader: read failed";
+            cv_done.notify_all();
+        }
+    }
+};
+
+PleReader::PleReader() : impl_(new Impl) {}
+PleReader::~PleReader() {
+    close();
+    delete impl_;
+}
+
+bool PleReader::open(const std::string& path, uint64_t table_offset, uint64_t n_rows, uint32_t max_inflight,
+                     uint64_t cache_rows, std::string& err, bool io_thread) {
+    close();
+    if (max_inflight == 0 || max_inflight > 1024) { err = "PleReader: max_inflight must be 1..1024"; return false; }
+    if (!impl_->file.open(path, err)) return false;
+    if (table_offset + n_rows * (uint64_t) ROW_BYTES > impl_->file.size()) {
+        err = "PleReader: the table extends past the end of " + path;
+        close();
+        return false;
+    }
+    impl_->table_offset = table_offset;
+    impl_->n_rows = n_rows;
+    impl_->max_inflight = max_inflight;
+    impl_->slab = (uint8_t*) DirectFile::alloc_aligned((size_t) max_inflight * 2 * PAGE);
+    if (impl_->slab == nullptr) { err = "PleReader: cannot allocate read buffers"; close(); return false; }
+    impl_->inflight.assign(max_inflight, Job{});
+    impl_->free_slots.clear();
+    for (uint32_t s = max_inflight; s-- > 0;) impl_->free_slots.push_back(s);
+    impl_->cache.init(cache_rows);
+    impl_->error.clear();
+    reset_stats();
+    impl_->stop = false;
+    impl_->threaded = io_thread;
+    if (io_thread) {
+        try {
+            impl_->worker = std::thread([this] { impl_->worker_loop(); });
+        } catch (const std::exception& e) {
+            err = std::string("PleReader: cannot create I/O worker: ") + e.what();
+            close();
+            return false;
+        } catch (...) {
+            err = "PleReader: cannot create I/O worker";
+            close();
+            return false;
+        }
+    }
+    return true;
+}
+
+void PleReader::close() {
+    Impl& m = *impl_;
+    if (m.worker.joinable()) {
+        {
+            std::lock_guard<std::mutex> lk(m.mu);
+            m.stop = true;
+            m.queue.clear();                       // unsubmitted work is dropped; in-flight reads still drain
+        }
+        m.cv_work.notify_all();
+        m.file.wake();
+        m.worker.join();
+    }
+    // Outstanding reads must finish before their buffers are released (caller-thread mode, or a worker that
+    // stopped on an error).
+    if (m.file.is_open()) {
+        while (m.free_slots.size() < m.max_inflight) {
+            Completion c[64];
+            const int n = m.file.wait(c, 64, -1);
+            if (n == 0) break;
+            for (int i = 0; i < n; ++i)
+                if (c[i].tag != DirectFile::WAKE_TAG) m.free_slots.push_back((uint32_t) c[i].tag);
+        }
+    }
+    m.file.close();
+    DirectFile::free_aligned(m.slab);
+    m.slab = nullptr;
+    m.queue.clear();
+    m.tickets.clear();
+    m.delayed.clear();
+    m.inflight.clear();
+    m.free_slots.clear();
+    m.cache.init(0);
+    m.threaded = false;
+    m.stop = false;
+}
+
+bool PleReader::is_open() const { return impl_->file.is_open(); }
+
+PleReader::Ticket PleReader::issue(const uint32_t* rows, size_t n, uint8_t* out_raw) {
+    Impl& m = *impl_;
+    std::unique_lock<std::mutex> lk(m.mu, std::defer_lock);
+    if (m.threaded) lk.lock();
+    const uint32_t id = m.next_ticket++;
+    if (m.next_ticket == 0) m.next_ticket = 1;
+    TicketState& ts = m.tickets[id];
+    std::unordered_map<uint64_t, size_t> by_page;     // aligned offset -> index in `jobs`
+    std::vector<Job> jobs;
+    for (size_t i = 0; i < n; ++i) {
+        uint8_t* dst = out_raw + i * ROW_BYTES;
+        ++m.stats.requests;
+        if (rows[i] >= m.n_rows) {
+            std::memset(dst, 0, ROW_BYTES);
+            continue;
+        }
+        if (const uint8_t* hit = m.cache.find(rows[i])) {
+            std::memcpy(dst, hit, ROW_BYTES);
+            ++m.stats.cache_hits;
+            continue;
+        }
+        const uint64_t at = m.table_offset + (uint64_t) rows[i] * ROW_BYTES;
+        const uint64_t first = at / PAGE * PAGE;
+        const uint32_t length = (uint32_t) ((at + ROW_BYTES - 1) / PAGE * PAGE - first + PAGE);
+        auto f = by_page.find(first);
+        if (f != by_page.end()) {
+            Job& j = jobs[f->second];
+            j.length = std::max(j.length, length);
+            j.uses.push_back(Use{rows[i], (uint32_t) (at - first), dst});
+            ++m.stats.dedup_rows;
+            continue;
+        }
+        by_page.emplace(first, jobs.size());
+        Job j;
+        j.offset = first;
+        j.length = length;
+        j.ticket = id;
+        j.uses.push_back(Use{rows[i], (uint32_t) (at - first), dst});
+        jobs.push_back(std::move(j));
+    }
+    // Sorted by offset: prefill chunks then read the SSD in near-sequential order.
+    std::sort(jobs.begin(), jobs.end(), [](const Job& a, const Job& b) { return a.offset < b.offset; });
+    ts.pending = (uint32_t) jobs.size();
+    ts.jobs = ts.pending;
+    ts.t_issue = now_us();
+    const bool has_jobs = ts.pending > 0;
+    for (Job& j : jobs) m.queue.push_back(std::move(j));
+    if (m.threaded) {
+        lk.unlock();
+        if (has_jobs) {
+            m.cv_work.notify_one();
+            m.file.wake();                         // in case the worker is blocked in the port
+        }
+    } else if (!m.pump() && m.error.empty()) {
+        m.error = "PleReader: submit failed";
+    }
+    return Ticket{id};
+}
+
+bool PleReader::collect(Ticket t, std::string& err) {
+    Impl& m = *impl_;
+    const double start = now_us();
+    if (m.threaded) {
+        std::unique_lock<std::mutex> lk(m.mu);
+        auto it = m.tickets.find(t.id);
+        if (it == m.tickets.end()) { err = "PleReader: unknown ticket"; return false; }
+        m.cv_done.wait(lk, [&] {
+            const auto current = m.tickets.find(t.id);
+            return current == m.tickets.end() || current->second.pending == 0;
+        });
+        it = m.tickets.find(t.id);
+        if (it == m.tickets.end()) { err = "PleReader: unknown ticket"; return false; }
+        if (!m.error.empty()) { err = m.error; return false; }
+        m.stats.wait_us += now_us() - start;
+        if (ple_trace() && it->second.jobs > 0 && it->second.jobs < 200) {
+            const TicketState& ts = it->second;
+            const double now = now_us();
+            std::fprintf(stderr, "ple trace: %3u jobs  issue->submit %8.1f  submit->last %8.1f  last->return %8.1f  "
+                         "collect wait %8.1f us\n", ts.jobs, ts.t_first - ts.t_issue, ts.t_last - ts.t_first,
+                         now - ts.t_last, now - start);
+        }
+        m.tickets.erase(it);
+        return true;
+    }
+    auto it = m.tickets.find(t.id);
+    if (it == m.tickets.end()) { err = "PleReader: unknown ticket"; return false; }
+    while (it->second.pending > 0) {
+        const bool drained = m.drain(-1);
+        if (!drained && m.error.empty()) m.error = "PleReader: read failed";
+        it = m.tickets.find(t.id);
+        if (it == m.tickets.end()) { err = "PleReader: unknown ticket"; return false; }
+    }
+    if (!m.error.empty()) { err = m.error; return false; }
+    m.stats.wait_us += now_us() - start;
+    m.tickets.erase(it);
+    return true;
+}
+
+void PleReader::set_injected_delay_us(double delay_us) {
+    std::lock_guard<std::mutex> lk(impl_->mu);
+    impl_->delay_us = delay_us < 0 ? 0 : delay_us;
+}
+const ReaderStats& PleReader::stats() const { return impl_->stats; }
+void PleReader::reset_stats() {
+    impl_->stats = ReaderStats{};
+    impl_->ring_pos = 0;
+}
+uint64_t PleReader::cache_capacity() const { return impl_->cache.sets * WAYS; }
+uint64_t PleReader::cache_size() const { return impl_->cache.used; }
+
+}  // namespace strata::ngram

From 882764de7408afc748f1cc8a51eeb8f064bdfe4f Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 22:46:56 -0500
Subject: [PATCH 037/201] sycl: decode 54 -> 62.6 tok/s: parallel resident
 plan, untiled GR down, wide Q4_K/Q5_K/IQ4_XS

- resident_plan groups the entries with one thread per entry (thread 0
  alone took 73 us per layer); the plan is the host loop's exactly
- the GR down kernel reads xn from global memory instead of a 60 KB SLM
  tile per work-group (occupancy); outputs bitwise equal (gr_bench)
- 16-byte-load wide kernels for Q4_K, Q5_K and IQ4_XS (IQ4 codebook in
  registers): IQ4_XS 107 -> 323 GB/s, Q4_K/Q5_K 1.3-1.6x
Output tokens identical in every engine run.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                               |  15 ++
 sycl/CMakeLists.txt                         |   2 +
 sycl/src/kernels/cuda/fused_gr.dp.cpp       |  59 +++++++-
 sycl/src/kernels/cuda/native_mmvq.dp.cpp    | 150 ++++++++++++++++++++
 sycl/src/kernels/cuda/verify_kernels.dp.cpp |  62 +++++++-
 sycl/src/kernels/gr_bench.cpp               |  57 ++++++++
 6 files changed, 341 insertions(+), 4 deletions(-)
 create mode 100644 sycl/src/kernels/gr_bench.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 14093b67179..c7b1aa5d26a 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -384,6 +384,21 @@ runtime's teardown began); it now exits directly once its requests are done.
    Still misaligned: IQ4_XS (136 B, 8-aligned, ~100 GB/s), IQ4_NL (18 B), Q8_0 (34 B); Q4_K/Q5_K are aligned
    but use 4-byte loads in the multi kernel (230-280 GB/s).
 
+**Decode round 2 (2026-09-30), from a unitrace of 256 decoded tokens.** Each step measured on its own, 19-token prompt,
+256 tokens, two runs each, output tokens identical throughout:
+
+| | decode |
+|---|---|
+| after the Q6_K alignment fix | 53.9 tok/s |
+| + `resident_plan` grouping in parallel (thread 0 alone took 73 us per layer, ~3.5 ms a round) | 57.1 |
+| + the GR down kernel reads the activations directly (the 60 KB SLM tile per group capped occupancy) | 58.7 |
+| + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | **62.6** |
+
+Kernel level: IQ4_XS 107 -> 323 GB/s at 2 columns (61 -> 212 at 6), Q4_K/Q5_K 1.3-1.6x; the GR read 135 -> 110 us at
+6 tokens (bitwise equal). Switches to the old paths: `STRATA_PLAN_PARALLEL=0`, `STRATA_GR_DOWN_DIRECT=0`,
+`STRATA_MMVQ_WIDE_K=0`. (`iq_parity` reports 10 "missing fixture" failures with and without the change: the oracle
+fixtures are not in the port's tree.)
+
 **Two-speed runs, explained (2026-09-30).** Identical greedy runs decode at either ~45 or ~39 tok/s. A per-gather
 trace of the PLE reader (`STRATA_PLE_TRACE=1`) shows the slow runs pay one 226 ms PLE read stall in the first
 decode round, after the window graphs are captured; every other read and round matches the fast runs. Prompt time
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 949aa17b280..11be21cab35 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -197,6 +197,8 @@ if(STRATA_SYCL_PARITY)
   target_link_libraries(mmvq_sg_bench PRIVATE strata_kernels)
   add_executable(q6k_align_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/q6k_align_bench.cpp)   # Q6_K block alignment
   target_link_libraries(q6k_align_bench PRIVATE strata_kernels)
+  add_executable(gr_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/gr_bench.cpp)   # fused GR read timing
+  target_link_libraries(gr_bench PRIVATE strata_kernels)
   add_executable(xmx_gemm_bench ${CMAKE_CURRENT_SOURCE_DIR}/src/kernels/xmx_gemm_bench.cpp)   # XMX quantized GEMM vs dequant+oneMKL
   target_link_libraries(xmx_gemm_bench PRIVATE strata_kernels strata_prefill)   # -qmkl for the oneMKL reference
   # one native expert three ways on real GGUF rows (ggml reference, CPU path, GPU native_expert_grouped):
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 27b912c624d..8e6daf385b5 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -401,6 +401,58 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
     }
 }
 
+// SYCL port: gr_down_multi_kernel without the shared-memory tile. The tiled kernel stages T x 2560 floats per
+// work-group (60 KB at T = 6) for 8 rows (40 KB of weights): the copy outweighs the weights and the SLM caps the
+// B70 at ~2 groups per Xe core (unitrace: 64 us per call, ~100 GB/s). Here each lane reads its 8 xn floats per
+// token straight from global memory (T x 40 KB in all, L1/L2-resident, shared by every group). Same per-lane
+// order of the sums, so the outputs are bitwise the tiled kernel's.
+__dpct_inline__ void gr_down_multi_direct_kernel(GrMulti m) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    const int gid = (int) item_ct1.get_group(2);
+    const bool inject_block = gid == DOWN_BLOCKS * DOWN_SPLIT;
+    const int split = inject_block ? 0 : gid % DOWN_SPLIT, rb = inject_block ? 0 : gid / DOWN_SPLIT;
+    const int row = inject_block ? warp : rb * WARPS + warp;
+    const bool active = !(inject_block && (m.a[0].w_inject == nullptr || warp >= HC));
+    if (!active) return;
+    const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) row * D;
+    const sycl::uint4* w4 = reinterpret_cast<const sycl::uint4*>(wrow);
+    float acc[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+    for (int base = inject_block ? 0 : split * TILE; base < D; base += inject_block ? TILE : TILE * DOWN_SPLIT) {
+        sycl::uint4 wv[TQ];
+#pragma unroll
+        for (int q = 0; q < TQ; ++q) wv[q] = *(w4 + base / 8 + lane + 32 * q);
+#pragma unroll
+        for (int q = 0; q < TQ; ++q) {
+            const int j = lane + 32 * q;
+#pragma unroll
+            for (int k = 0; k < kFusedGrMaxT; ++k)
+                if (k < T) {
+                    const sycl::float4* x4 = reinterpret_cast<const sycl::float4*>(m.xn + (size_t) k * D + base + j * 8);
+                    const sycl::float4 a0 = x4[0], a1 = x4[1];
+                    const float xv[8] = {a0.x(), a0.y(), a0.z(), a0.w(), a1.x(), a1.y(), a1.z(), a1.w()};
+                    acc[k] += dot8(wv[q], xv);
+                }
+        }
+    }
+    float s[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        if (k >= T || lane != k) continue;
+        if (inject_block) m.a[k].inject_out[row] = s[k];
+        else m.part[((size_t) split * kFusedGrMaxT + k) * LR + row] = s[k];
+    }
+}
+bool gr_down_direct() {   // default; STRATA_GR_DOWN_DIRECT=0: the tiled kernel (gr_bench: 13-19% slower at 3-6 tokens)
+    static const bool v = std::getenv("STRATA_GR_DOWN_DIRECT") == nullptr || std::atoi(std::getenv("STRATA_GR_DOWN_DIRECT")) != 0;
+    return v;
+}
+
 constexpr int UPM_COLS = 16;                      // columns per block (x 4 streams = 64 rows, 8 per warp)
 constexpr int UPM_BLOCKS = N / UPM_COLS;          // 160
 
@@ -588,7 +640,12 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         attr[dev] = true;
     }
     const int chunk_tok = (dev >= 0 && dev < 64 && chunk[dev]) ? chunk[dev] : kFusedGrMaxT;
-    if (chunk_tok >= n_tok) {
+    if (gr_down_direct()) {
+        st->parallel_for<dpct_kernel_name<class gr_down_multi_direct>>(
+            sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) * sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { gr_down_multi_direct_kernel(m); });
+    } else if (chunk_tok >= n_tok) {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index f6d4fe6ac34..82ea141107a 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -1551,6 +1551,153 @@ void launch_q6k_wide(const void* weights, const void* x_q8_1, float* y, int n_in
         sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
         [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_q6k_wide_kernel<NCOLS, 1>(w, x, y, n_in, n_out); });
 }
+// ---------------------------------------------------------------- SYCL port: wide kernels for Q4_K, Q5_K, IQ4_XS
+//
+// The Q6_K wide kernel's shape for the other 256-element formats: 8 lanes share a block, each lane's weights are one
+// or two 16-byte loads, a 32-lane sub-group has four blocks in flight, one row per sub-group. The multi kernel these
+// replace does 4-byte loads (Q4_K/Q5_K, 230-280 GB/s) or global-memory codebook lookups (IQ4_XS, ~100 GB/s).
+// Lane g of a block: Q4_K/Q5_K take qs bytes [16g, 16g+16) = sub-blocks 2(g/2) (low nibbles) and 2(g/2)+1 (high
+// nibbles) at positions 16(g%2)..+15; IQ4_XS takes sub-block g (16 bytes, low nibbles = positions 0-15).
+__dpct_inline__ sycl::int4 ld_q8_16(const Q81Block* b, int half) {   // Q8_1 qs is 4-byte aligned: four int loads
+    const int* q = reinterpret_cast<const int*>(b->qs) + 4 * half;
+    return sycl::int4(q[0], q[1], q[2], q[3]);
+}
+__dpct_inline__ int dp4a4(const sycl::int4 a, const sycl::int4 b, int acc) {
+    acc = strata::dp4a(a.x(), b.x(), acc); acc = strata::dp4a(a.y(), b.y(), acc);
+    acc = strata::dp4a(a.z(), b.z(), acc); return strata::dp4a(a.w(), b.w(), acc);
+}
+__dpct_inline__ void k4_scale_min(const uint8_t* sc, int j, float& s, float& m) {   // ggml get_scale_min_k4
+    if (j < 4) { s = (float) (sc[j] & 63); m = (float) (sc[j + 4] & 63); }
+    else { s = (float) ((sc[j + 4] & 0xF) | ((sc[j - 4] >> 6) << 4)); m = (float) ((sc[j + 4] >> 4) | ((sc[j] >> 6) << 4)); }
+}
+struct WideQ4K {
+    using Block = Q4KBlock;
+    struct W { sycl::int4 lo, hi; float dl, dh, ml, mh; int sb, half; };
+    static W load(const Block* b, int g) {
+        W r; r.sb = 2 * (g >> 1); r.half = g & 1;
+        const sycl::int4 q = reinterpret_cast<const sycl::int4*>(b->qs)[g];          // 16-byte aligned (144 = 9 x 16)
+        r.lo = sycl::int4(q.x() & 0x0f0f0f0f, q.y() & 0x0f0f0f0f, q.z() & 0x0f0f0f0f, q.w() & 0x0f0f0f0f);
+        r.hi = sycl::int4((q.x() >> 4) & 0x0f0f0f0f, (q.y() >> 4) & 0x0f0f0f0f, (q.z() >> 4) & 0x0f0f0f0f, (q.w() >> 4) & 0x0f0f0f0f);
+        const sycl::float2 dm = b->dm.convert<float, sycl::rounding_mode::automatic>();
+        float s0, m0, s1, m1; k4_scale_min(b->scales, r.sb, s0, m0); k4_scale_min(b->scales, r.sb + 1, s1, m1);
+        r.dl = dm.x() * s0; r.ml = dm.y() * m0; r.dh = dm.x() * s1; r.mh = dm.y() * m1;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* xb) {   // xb = this column's Q8_1 blocks of the 256-block
+        const Q81Block* a = xb + r.sb; const Q81Block* c = xb + r.sb + 1;
+        const sycl::int4 ua = ld_q8_16(a, r.half), uc = ld_q8_16(c, r.half);
+        const sycl::int4 ones(0x01010101, 0x01010101, 0x01010101, 0x01010101);
+        const float da = (float) a->ds[0], dc = (float) c->ds[0];
+        return da * (r.dl * (float) dp4a4(r.lo, ua, 0) - r.ml * (float) dp4a4(ones, ua, 0)) +
+               dc * (r.dh * (float) dp4a4(r.hi, uc, 0) - r.mh * (float) dp4a4(ones, uc, 0));
+    }
+};
+struct WideQ5K {
+    using Block = Q5KBlock;
+    using W = WideQ4K::W;
+    static W load(const Block* b, int g) {
+        W r; r.sb = 2 * (g >> 1); r.half = g & 1;
+        const sycl::int4 q = reinterpret_cast<const sycl::int4*>(b->qs)[g];          // qs at 48, 176 = 11 x 16
+        const sycl::int4 h = reinterpret_cast<const sycl::int4*>(b->qh)[r.half];     // qh bytes of positions 16h..+15
+        const int sl = r.sb, sh = r.sb + 1;
+        auto hb = [](int v, int bit) { return ((v >> bit) & 0x01010101) << 4; };
+        r.lo = sycl::int4((q.x() & 0x0f0f0f0f) | hb(h.x(), sl), (q.y() & 0x0f0f0f0f) | hb(h.y(), sl),
+                          (q.z() & 0x0f0f0f0f) | hb(h.z(), sl), (q.w() & 0x0f0f0f0f) | hb(h.w(), sl));
+        r.hi = sycl::int4(((q.x() >> 4) & 0x0f0f0f0f) | hb(h.x(), sh), ((q.y() >> 4) & 0x0f0f0f0f) | hb(h.y(), sh),
+                          ((q.z() >> 4) & 0x0f0f0f0f) | hb(h.z(), sh), ((q.w() >> 4) & 0x0f0f0f0f) | hb(h.w(), sh));
+        const sycl::float2 dm = b->dm.convert<float, sycl::rounding_mode::automatic>();
+        float s0, m0, s1, m1; k4_scale_min(b->scales, r.sb, s0, m0); k4_scale_min(b->scales, r.sb + 1, s1, m1);
+        r.dl = dm.x() * s0; r.ml = dm.y() * m0; r.dh = dm.x() * s1; r.mh = dm.y() * m1;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* xb) { return WideQ4K::apply(r, xb); }
+};
+__dpct_inline__ uint32_t iq4_lut4(uint32_t q4) {   // four nibbles -> four codebook bytes, codebook in registers
+    constexpr uint32_t t0 = 0xBFAD9881u, t1 = 0xF6EADDCFu, t2 = 0x26190D01u, t3 = 0x71594535u;
+    uint32_t r = 0;
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        const uint32_t n = (q4 >> (8 * i)) & 0xF;
+        const uint32_t t = n < 4 ? t0 : n < 8 ? t1 : n < 12 ? t2 : t3;
+        r |= ((t >> (8 * (n & 3))) & 0xFF) << (8 * i);
+    }
+    return r;
+}
+struct WideIQ4XS {
+    using Block = IQ4XSBlock;
+    struct W { sycl::int4 lo, hi; float d; int sb; };
+    static W load(const Block* b, int g) {
+        W r; r.sb = g;
+        const sycl::int2* q2 = reinterpret_cast<const sycl::int2*>(b->qs + 16 * g);   // 8-byte aligned (136 = 17 x 8)
+        const sycl::int2 qa = q2[0], qb = q2[1];
+        const uint32_t v[4] = {(uint32_t) qa.x(), (uint32_t) qa.y(), (uint32_t) qb.x(), (uint32_t) qb.y()};
+        int lo[4], hi[4];
+#pragma unroll
+        for (int i = 0; i < 4; ++i) { lo[i] = (int) iq4_lut4(v[i] & 0x0f0f0f0f); hi[i] = (int) iq4_lut4((v[i] >> 4) & 0x0f0f0f0f); }
+        r.lo = sycl::int4(lo[0], lo[1], lo[2], lo[3]); r.hi = sycl::int4(hi[0], hi[1], hi[2], hi[3]);
+        const int ls = ((b->scales_l[g / 2] >> (4 * (g & 1))) & 0x0f) | (((b->scales_h >> (2 * g)) & 0x03) << 4);
+        r.d = (float) b->d * (float) (ls - 32);
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* xb) {
+        const Q81Block* a = xb + r.sb;
+        return r.d * (float) a->ds[0] * (float) dp4a4(r.hi, ld_q8_16(a, 1), dp4a4(r.lo, ld_q8_16(a, 0), 0));
+    }
+};
+template <typename F, int NCOLS>
+void native_mmvq_wide_kernel(const typename F::Block* __restrict__ w, const Q81Block* __restrict__ x,
+                             float* __restrict__ y, int n_in, int n_out) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
+    const int row = int(item.get_group(2)) * WARPS + warp;
+    if (row >= n_out) return;
+    const int blocks_per_row = n_in / QK, x_stride = n_in / Q8K;
+    const int g = lane & 7, sub = lane >> 3;
+    const typename F::Block* wr = w + std::size_t(row) * blocks_per_row;
+    float acc[NCOLS] = {};
+    for (int kbx = sub; kbx < blocks_per_row; kbx += 4) {
+        const typename F::W wv = F::load(wr + kbx, g);
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) acc[j] += F::apply(wv, x + std::size_t(j) * x_stride + kbx * (QK / Q8K));
+    }
+    auto sg = item.get_sub_group();
+#pragma unroll
+    for (int j = 0; j < NCOLS; ++j) {
+        float v = acc[j];
+#pragma unroll
+        for (int o = WARP / 2; o > 0; o >>= 1) v += sycl::permute_group_by_xor(sg, v, o);
+        if (lane == 0) y[std::size_t(j) * n_out + row] = v;
+    }
+}
+template <typename F, int NCOLS>
+void launch_wide(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const typename F::Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+    s->parallel_for<dpct_kernel_name<class native_mmvq_wide, F, dpct_kernel_scalar<NCOLS>>>(
+        sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_wide_kernel<F, NCOLS>(w, x, y, n_in, n_out); });
+}
+inline bool wide_k() {   // STRATA_MMVQ_WIDE_K=0: Q4_K/Q5_K/IQ4_XS through the multi kernel (the old path)
+    static const bool v = std::getenv("STRATA_MMVQ_WIDE_K") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_WIDE_K")) != 0;
+    return v;
+}
+template <typename F>
+bool try_wide(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+    if (!wide_k() || ncols < 1 || ncols > 8 || n_in % QK != 0) return false;
+    const auto s = strata::q_of(stream);
+    switch (ncols) {
+        case 1: launch_wide<F, 1>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 2: launch_wide<F, 2>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 3: launch_wide<F, 3>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 4: launch_wide<F, 4>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 5: launch_wide<F, 5>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 6: launch_wide<F, 6>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 7: launch_wide<F, 7>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        default: launch_wide<F, 8>(weights, x_q8_1, y, n_in, n_out, s); return true;
+    }
+}
+
 // SYCL port: alignment experiment - Q6_K blocks repacked at a 224-byte stride (every block 16-byte aligned).
 template <int NCOLS>
 void launch_q6k_wide224(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
@@ -1884,6 +2031,7 @@ void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    if (try_wide<WideQ5K>(weights, x_q8_1, y, n_in, n_out, ncols, stream)) { launch_check(); return; }
     if (ncols > 1) {
         launch_multi<Q5KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -2103,6 +2251,7 @@ void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    if (try_wide<WideIQ4XS>(weights, x_q8_1, y, n_in, n_out, ncols, stream)) { launch_check(); return; }
     if (ncols > 1) {
         launch_multi<IQ4XSTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -2192,6 +2341,7 @@ void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    if (try_wide<WideQ4K>(weights, x_q8_1, y, n_in, n_out, ncols, stream)) { launch_check(); return; }
     if (ncols > 1) {
         launch_multi<Q4KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index 9d51ecee0da..25f05990e7c 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -927,12 +927,16 @@ __dpct_inline__ void wait_flag_ge_kernel(const volatile uint32_t *flag,
 }  // namespace
 
 namespace {
+inline bool plan_parallel() {   // STRATA_PLAN_PARALLEL=0: thread 0 groups the entries alone (the old way)
+    static const bool v = std::getenv("STRATA_PLAN_PARALLEL") == nullptr || std::atoi(std::getenv("STRATA_PLAN_PARALLEL")) != 0;
+    return v;
+}
 __dpct_inline__ void resident_plan_kernel(
     const int32_t *__restrict__ ids, int n, int k,
     const int32_t *__restrict__ res, int n_expert, const uint8_t *cache_base,
     const unsigned long long *slot_off, long long blob,
     int32_t *__restrict__ pl, long long capx, uint32_t *skip, uint32_t ring,
-    const unsigned long long *__restrict__ mir) {
+    const unsigned long long *__restrict__ mir, bool par) {
 #if STRATA_PLAN_LOCAL
     // SYCL port: the host's exact loop, but over a local copy of the ids and their slots. One thread reading global
     // memory for every compare (n^2 of them) took 87 us per layer on the B70 - 4% of a decode round; a work-group
@@ -956,8 +960,59 @@ __dpct_inline__ void resident_plan_kernel(
         if (!valid || (sl < 0 && ma == 0)) s_bad = 1;
     }
     item.barrier(sycl::access::fence_space::local_space);
+    if (s_bad || n > 64) { if (tid == 0) *skip = 0; return; }   // n > 64 never happens (kVerifyMaxT * 10 = 60); refuse rather than read past
+    if (par) {
+        // SYCL port: the grouping in parallel, one thread per entry (unitrace: thread 0 alone took 73 us per layer,
+        // ~3.5 ms of a decode round). The plan is the host loop's exactly: groups in order of first occurrence,
+        // entries in a group in index order. Entry i: L = its expert's first index; its group = the number of
+        // first occurrences before L; the group starts at the number of entries whose leader is before L; its
+        // place in the group = the number of earlier entries with the same leader.
+        auto &s_lead = *sycl::ext::oneapi::group_local_memory_for_overwrite<int32_t[64]>(item.get_group());
+        if (tid < n) {
+            int L = tid;
+            for (int j = 0; j < tid; ++j) if (s_ids[j] == s_ids[tid]) { L = j; break; }
+            s_lead[tid] = L;
+        }
+        item.barrier(sycl::access::fence_space::local_space);
+        int32_t* counts = pl;
+        int32_t* start = pl + 4;
+        int32_t* dst = start + capx + 1;
+        int32_t* tok = dst + capx;
+        const long long ptr_off = ((4 + (capx + 1) + 2 * capx) + 1) & ~1ll;
+        unsigned long long* ptr = (unsigned long long*) (pl + ptr_off);
+        int32_t* start2 = pl + ptr_off + 4 * capx;
+        if (tid < n) {
+            const int L = s_lead[tid];
+            int g = 0, gstart = 0, pos = 0;
+            for (int j = 0; j < n; ++j) {
+                const int Lj = s_lead[j];
+                if (j < L && Lj == j) ++g;           // first occurrences before L
+                if (Lj < L) ++gstart;                // entries of earlier groups
+                if (j < tid && Lj == L) ++pos;       // earlier entries of this group
+            }
+            dst[gstart + pos] = tid;
+            tok[gstart + pos] = tid / k;
+            if (L == tid) {
+                const int32_t slot = s_res[tid];
+                ptr[g] = slot >= 0 ? (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob))
+                                   : s_mir[tid];
+                start[g] = gstart;
+            }
+        }
+        item.barrier(sycl::access::fence_space::global_and_local);
+        if (tid != 0) return;
+        int groups = 0;
+        for (int i = 0; i < n; ++i) groups += s_lead[i] == i;
+        start[groups] = n;
+        start2[0] = n;
+        counts[0] = groups;
+        counts[1] = n;
+        counts[2] = 0;
+        sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
+        strata::sys_store(skip, ring);
+        return;
+    }
     if (tid != 0) return;
-    if (s_bad || n > 64) { *skip = 0; return; }   // n > 64 never happens (kVerifyMaxT * 10 = 60); refuse rather than read past
 #else
     // the original: one thread, the host's exact loop over global memory
     for (int i = 0; i < n; ++i) {
@@ -1083,13 +1138,14 @@ void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
+        const bool par = plan_parallel();
         strata::q_of(stream)
             ->parallel_for<dpct_kernel_name<class resident_plan_kernel_db6b7a>>(
                 sycl::nd_range<3>(sycl::range(1, 1, STRATA_PLAN_LOCAL ? 64 : 1), sycl::range(1, 1, STRATA_PLAN_LOCAL ? 64 : 1)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
                     resident_plan_kernel(ids, n_entries, k, res_layer, n_expert,
                                          cache_base, slot_off, blob, plan, capx,
-                                         skip, ring, mir);
+                                         skip, ring, mir, par);
                 });
     }
     check("resident_plan");
diff --git a/sycl/src/kernels/gr_bench.cpp b/sycl/src/kernels/gr_bench.cpp
new file mode 100644
index 00000000000..7abeda91c87
--- /dev/null
+++ b/sycl/src/kernels/gr_bench.cpp
@@ -0,0 +1,57 @@
+// sycl/src/kernels/gr_bench.cpp - SYCL port: time fused_gr_read_multi (norm + down + up) for 1-6 tokens on random
+// weights at the Coder's shapes; prints a checksum of every output so two builds/switches can be compared bitwise.
+#include "strata/kernels/fused_gr.hpp"
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <chrono>
+#include <cstdio>
+#include <cstring>
+#include <vector>
+int main() {
+    using namespace strata::kernels;
+    sycl::queue* s = &dpct::get_in_order_queue();
+    constexpr int N = 2560, HC = 4, D = N * HC, LR = 320, TM = kFusedGrMaxT;
+    auto bf16 = [](float f) { uint32_t u; std::memcpy(&u, &f, 4); return (uint16_t) (u >> 16); };
+    std::vector<uint16_t> wd((size_t) LR * D), wu((size_t) D * LR), wi((size_t) HC * D);
+    uint32_t r = 12345;
+    auto rnd = [&] { r = r * 1664525u + 1013904223u; return ((r >> 8) & 0xffff) / 65536.0f - 0.5f; };
+    for (auto& v : wd) v = bf16(rnd() * 0.05f);
+    for (auto& v : wu) v = bf16(rnd() * 0.05f);
+    for (auto& v : wi) v = bf16(rnd() * 0.05f);
+    std::vector<float> hR((size_t) TM * D), hn(D);
+    for (auto& v : hR) v = rnd();
+    for (auto& v : hn) v = 1.0f + 0.1f * rnd();
+    auto dev = [&](const void* h, size_t b) { void* p = sycl::malloc_device(b, *s); s->memcpy(p, h, b).wait(); return p; };
+    auto* d_wd = (uint16_t*) dev(wd.data(), wd.size() * 2);
+    auto* d_wu = (uint16_t*) dev(wu.data(), wu.size() * 2);
+    auto* d_wi = (uint16_t*) dev(wi.data(), wi.size() * 2);
+    auto* d_R = (float*) dev(hR.data(), hR.size() * 4);
+    auto* d_n = (float*) dev(hn.data(), hn.size() * 4);
+    float* xn = sycl::malloc_device<float>((size_t) TM * D, *s);
+    float* out = sycl::malloc_device<float>((size_t) TM * (LR + HC + HC + N), *s);
+    FusedGrArgs a[TM];
+    for (int t = 0; t < TM; ++t) {
+        float* o = out + (size_t) t * (LR + HC + HC + N);
+        a[t].R = d_R + (size_t) t * D; a[t].w_norm = d_n; a[t].w_down = d_wd; a[t].w_up = d_wu; a[t].w_inject = d_wi;
+        a[t].lo = o; a[t].rs = o + LR; a[t].inject_out = o + LR + HC; a[t].mixed = o + LR + 2 * HC;
+    }
+    for (int T = 1; T <= 6; ++T) {
+        const auto w0 = std::chrono::steady_clock::now();
+        while (std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count() < 150) {
+            for (int i = 0; i < 20; ++i) fused_gr_read_multi(a, T, xn, s);
+            s->wait();
+        }
+        const int it = 500;
+        const auto t0 = std::chrono::steady_clock::now();
+        for (int i = 0; i < it; ++i) fused_gr_read_multi(a, T, xn, s);
+        s->wait();
+        const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count() / it;
+        std::vector<float> h((size_t) T * (LR + HC + HC + N));
+        s->memcpy(h.data(), out, h.size() * 4).wait();
+        uint64_t cs = 1469598103934665603ull;
+        for (float v : h) { uint32_t u; std::memcpy(&u, &v, 4); cs = (cs ^ u) * 1099511628211ull; }
+        std::printf("fused GR read, %d tokens: %7.1f us (%.0f GB/s of weights)  checksum %016llx\n", T, us,
+                    (wd.size() + wu.size() + wi.size()) * 2.0 / us / 1e3, (unsigned long long) cs);
+    }
+    return 0;
+}

From d119113e6522a6bd4a49e0c1f1d500c6ede50c83 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 23:12:42 -0500
Subject: [PATCH 038/201] sycl: wide Q8_0/IQ4_NL decode kernels, aligned Q6_K
 activation loads (decode 63.4 -> 65.6 tok/s)

Q8_0 and IQ4_NL blocks (34/18 bytes) are 2-byte aligned: the wide kernels
load them through load16_a2, now page-safe (the second chunk only when the
address is unaligned). Q8_0 4-6x, IQ4_NL 640->2560 4x. Q6_K's Q8_1 activation
int4 loads were 4-byte aligned: four int loads instead.
Output identical for 146 of 256 tokens, then a near-tie flips (summation
order); STRATA_MMVQ_WIDE_32=0 restores the old kernels.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                            |   9 +-
 sycl/src/kernels/cuda/native_mmvq.dp.cpp | 106 ++++++++++++++++++++++-
 sycl/src/kernels/mmvq_sg_bench.cpp       |  10 ++-
 3 files changed, 117 insertions(+), 8 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index c7b1aa5d26a..f42621eeaee 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -392,7 +392,14 @@ runtime's teardown began); it now exits directly once its requests are done.
 | after the Q6_K alignment fix | 53.9 tok/s |
 | + `resident_plan` grouping in parallel (thread 0 alone took 73 us per layer, ~3.5 ms a round) | 57.1 |
 | + the GR down kernel reads the activations directly (the 60 KB SLM tile per group capped occupancy) | 58.7 |
-| + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | **62.6** |
+| + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | 62.6 |
+| + wide kernels for Q8_0 (MTP dense, shexp down of layer 0) and IQ4_NL (shexp down); Q6_K's activation loads aligned | **65.6** |
+
+The last step changes the output: identical for 146 tokens, then a near-tie after a comma goes the other way (the new
+kernels sum in a different order). Q8_0 kernels 4-6x (189 -> 31 us at 2560 x 10240, 2 columns), IQ4_NL 640 -> 2560
+28 -> 6.6 us. The aligned-load helper only loads its second chunk when the address is unaligned, so it never reads a
+16-byte chunk without a needed byte and cannot cross a page at the end of an allocation. `STRATA_MMVQ_WIDE_32=0`
+restores the old Q8_0/IQ4_NL kernels.
 
 Kernel level: IQ4_XS 107 -> 323 GB/s at 2 columns (61 -> 212 at 6), Q4_K/Q5_K 1.3-1.6x; the GR read 135 -> 110 us at
 6 tokens (bitwise equal). Switches to the old paths: `STRATA_PLAN_PARALLEL=0`, `STRATA_GR_DOWN_DIRECT=0`,
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 82ea141107a..40671122276 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -1337,7 +1337,9 @@ __dpct_inline__ sycl::int4 load16_a2(const void* p) {
     const sycl::int4* q = reinterpret_cast<const sycl::int4*>(a & ~uintptr_t(15));
     const int k = int(a >> 2) & 3;          // dword offset within the first aligned chunk
     const bool half = (a & 2) != 0;          // and a 2-byte shift (the address is always 2-byte aligned)
-    const sycl::int4 lo = q[0], hi = q[1];
+    // the second chunk only when the address is unaligned: then it holds needed bytes, so (16-byte chunks never
+    // straddle a page) it cannot fault even at the very end of an allocation
+    const sycl::int4 lo = q[0], hi = (a & 15) ? q[1] : lo;
     const uint32_t d[8] = {(uint32_t) lo.x(), (uint32_t) lo.y(), (uint32_t) lo.z(), (uint32_t) lo.w(),
                            (uint32_t) hi.x(), (uint32_t) hi.y(), (uint32_t) hi.z(), (uint32_t) hi.w()};
     uint32_t w[5];
@@ -1393,8 +1395,15 @@ void native_mmvq_q6k_wide_kernel(const Q6KBlock* __restrict__ w, const Q81Block*
 #pragma unroll
         for (int j = 0; j < NCOLS; ++j) {
             const Q81Block* xb = x + std::size_t(j) * x_stride + kby + bq8_offset;
-            u0[j] = reinterpret_cast<const sycl::int4*>(xb[0].qs)[u_int4];
-            u1[j] = reinterpret_cast<const sycl::int4*>(xb[2].qs)[u_int4];
+            if constexpr (A2) {   // Q8_1 qs sits at offset 4 of a 36-byte block: 4-byte aligned, so four int loads
+                const int* p0 = reinterpret_cast<const int*>(xb[0].qs) + 4 * u_int4;
+                const int* p1 = reinterpret_cast<const int*>(xb[2].qs) + 4 * u_int4;
+                u0[j] = sycl::int4(p0[0], p0[1], p0[2], p0[3]);
+                u1[j] = sycl::int4(p1[0], p1[1], p1[2], p1[3]);
+            } else {
+                u0[j] = reinterpret_cast<const sycl::int4*>(xb[0].qs)[u_int4];
+                u1[j] = reinterpret_cast<const sycl::int4*>(xb[2].qs)[u_int4];
+            }
             ds0[j] = xb[0].ds[0]; ds1[j] = xb[2].ds[0];
         }
 #pragma unroll
@@ -1698,6 +1707,95 @@ bool try_wide(const void* weights, const void* x_q8_1, float* y, int n_in, int n
     }
 }
 
+// SYCL port: wide kernels for the 32-element formats Q8_0 (34-byte blocks) and IQ4_NL (18). Both are only 2-byte
+// aligned, so the weights come through load16_a2 (page-safe). Q8_0: 2 lanes per block (16 quants each), 16 blocks
+// per sub-group step; IQ4_NL: 1 lane per block (its 16 bytes = 32 nibbles), 32 blocks per step. One row per
+// sub-group. The multi/small kernels these replace measured 26 GB/s (IQ4_NL 640 -> 2560) to ~300 GB/s.
+struct Wide32Q8 {
+    using Block = Q80Block;
+    static constexpr int LPB = 2;
+    struct W { sycl::int4 q; float d; int half; };
+    static W load(const Block* b, int l) {
+        W r; r.half = l; r.q = load16_a2(b->qs + 16 * l); r.d = (float) b->d; return r;
+    }
+    static float apply(const W& r, const Q81Block* xb) {
+        return r.d * (float) xb->ds[0] * (float) dp4a4(r.q, ld_q8_16(xb, r.half), 0);
+    }
+};
+struct Wide32IQ4NL {
+    using Block = IQ4NLBlock;
+    static constexpr int LPB = 1;
+    struct W { sycl::int4 lo, hi; float d; };
+    static W load(const Block* b, int) {
+        W r;
+        const sycl::int4 q = load16_a2(b->qs);
+        const uint32_t v[4] = {(uint32_t) q.x(), (uint32_t) q.y(), (uint32_t) q.z(), (uint32_t) q.w()};
+        int lo[4], hi[4];
+#pragma unroll
+        for (int i = 0; i < 4; ++i) { lo[i] = (int) iq4_lut4(v[i] & 0x0f0f0f0f); hi[i] = (int) iq4_lut4((v[i] >> 4) & 0x0f0f0f0f); }
+        r.lo = sycl::int4(lo[0], lo[1], lo[2], lo[3]); r.hi = sycl::int4(hi[0], hi[1], hi[2], hi[3]);
+        r.d = (float) b->d;
+        return r;
+    }
+    static float apply(const W& r, const Q81Block* xb) {
+        return r.d * (float) xb->ds[0] * (float) dp4a4(r.hi, ld_q8_16(xb, 1), dp4a4(r.lo, ld_q8_16(xb, 0), 0));
+    }
+};
+template <typename F, int NCOLS>
+void native_mmvq_wide32_kernel(const typename F::Block* __restrict__ w, const Q81Block* __restrict__ x,
+                               float* __restrict__ y, int n_in, int n_out) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = int(item.get_local_id(2)), warp = int(item.get_local_id(1));
+    const int row = int(item.get_group(2)) * WARPS + warp;
+    if (row >= n_out) return;
+    constexpr int BPS = WARP / F::LPB;                  // blocks per sub-group step
+    const int blocks_per_row = n_in / 32;
+    const int l = lane % F::LPB, sub = lane / F::LPB;
+    const typename F::Block* wr = w + std::size_t(row) * blocks_per_row;
+    float acc[NCOLS] = {};
+    for (int kb = sub; kb < blocks_per_row; kb += BPS) {
+        const typename F::W wv = F::load(wr + kb, l);
+#pragma unroll
+        for (int j = 0; j < NCOLS; ++j) acc[j] += F::apply(wv, x + std::size_t(j) * blocks_per_row + kb);
+    }
+    auto sg = item.get_sub_group();
+#pragma unroll
+    for (int j = 0; j < NCOLS; ++j) {
+        float v = acc[j];
+#pragma unroll
+        for (int o = WARP / 2; o > 0; o >>= 1) v += sycl::permute_group_by_xor(sg, v, o);
+        if (lane == 0) y[std::size_t(j) * n_out + row] = v;
+    }
+}
+template <typename F, int NCOLS>
+void launch_wide32(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
+    const auto* w = static_cast<const typename F::Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
+    s->parallel_for<dpct_kernel_name<class native_mmvq_wide32, F, dpct_kernel_scalar<NCOLS>>>(
+        sycl::nd_range<3>(sycl::range(1, 1, blocks) * sycl::range(1, WARPS, WARP), sycl::range(1, WARPS, WARP)),
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { native_mmvq_wide32_kernel<F, NCOLS>(w, x, y, n_in, n_out); });
+}
+inline bool wide_32() {   // STRATA_MMVQ_WIDE_32=0: Q8_0/IQ4_NL through the small/multi kernels (the old path)
+    static const bool v = std::getenv("STRATA_MMVQ_WIDE_32") == nullptr || std::atoi(std::getenv("STRATA_MMVQ_WIDE_32")) != 0;
+    return v;
+}
+template <typename F>
+bool try_wide32(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+    if (!wide_32() || ncols < 1 || ncols > 8 || n_in % 32 != 0) return false;
+    const auto s = strata::q_of(stream);
+    switch (ncols) {
+        case 1: launch_wide32<F, 1>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 2: launch_wide32<F, 2>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 3: launch_wide32<F, 3>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 4: launch_wide32<F, 4>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 5: launch_wide32<F, 5>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 6: launch_wide32<F, 6>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        case 7: launch_wide32<F, 7>(weights, x_q8_1, y, n_in, n_out, s); return true;
+        default: launch_wide32<F, 8>(weights, x_q8_1, y, n_in, n_out, s); return true;
+    }
+}
+
 // SYCL port: alignment experiment - Q6_K blocks repacked at a 224-byte stride (every block 16-byte aligned).
 template <int NCOLS>
 void launch_q6k_wide224(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, dpct::queue_ptr s) {
@@ -2531,6 +2629,7 @@ void native_q5_0_f32(const void* weights, const float* x, void* scratch_q8_1,
 
 void native_q8_0_mmvq(const void* weights, const void* x_q8_1, float* y,
                        int n_in, int n_out, int ncols, void* stream) {
+    if (try_wide32<Wide32Q8>(weights, x_q8_1, y, n_in, n_out, ncols, stream)) { launch_check(); return; }
     small_mmvq<Q80Block, 8>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
 }
 
@@ -2541,6 +2640,7 @@ void native_q8_0_f32(const void* weights, const float* x, void* scratch_q8_1,
 
 void native_iq4_nl_mmvq(const void* weights, const void* x_q8_1, float* y,
                        int n_in, int n_out, int ncols, void* stream) {
+    if (try_wide32<Wide32IQ4NL>(weights, x_q8_1, y, n_in, n_out, ncols, stream)) { launch_check(); return; }
     small_mmvq<IQ4NLBlock, 4>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
 }
 
diff --git a/sycl/src/kernels/mmvq_sg_bench.cpp b/sycl/src/kernels/mmvq_sg_bench.cpp
index 91ddd99bb84..a7043c1a867 100644
--- a/sycl/src/kernels/mmvq_sg_bench.cpp
+++ b/sycl/src/kernels/mmvq_sg_bench.cpp
@@ -10,14 +10,16 @@
 #include <vector>
 int main() {
     sycl::queue* s = &dpct::get_in_order_queue();
-    struct T { const char* name; int type, bytes; };   // ggml type, bytes per 256 weights
-    const T types[] = {{"q6_k", 14, 210}, {"q5_k", 13, 176}, {"q4_k", 12, 144}, {"iq4_xs", 23, 136}};
-    const int shapes[][2] = {{2560, 10240}, {2560, 12288}, {6144, 2560}, {2560, 640}};
+    struct T { const char* name; int type, bytes, elems; };   // ggml type, bytes per block of `elems` weights
+    const T types[] = {{"q6_k", 14, 210, 256}, {"q5_k", 13, 176, 256}, {"q4_k", 12, 144, 256}, {"iq4_xs", 23, 136, 256},
+                        {"q8_0", 8, 34, 32}, {"iq4_nl", 20, 18, 32}};
+    const int shapes[][2] = {{2560, 10240}, {2560, 12288}, {6144, 2560}, {2560, 640}, {640, 2560}, {2560, 2560}};
     const int cols[] = {2, 4, 6};
     for (const T& t : types)
         for (auto& sh : shapes) {
             const int n_in = sh[0], n_out = sh[1];
-            const size_t wbytes = (size_t) n_out * (n_in / 256) * t.bytes;
+            if (n_in % t.elems != 0) continue;   // 640 wide: the 32-element formats only
+            const size_t wbytes = (size_t) n_out * (n_in / t.elems) * t.bytes;
             std::vector<uint8_t> hw(wbytes);
             for (size_t i = 0; i < wbytes; ++i) hw[i] = (uint8_t) (i * 2654435761u >> 13) & 0x3b;   // keeps fp16 fields finite
             void* w = sycl::malloc_device(wbytes, *s);

From dcf251caae635b040595544682f2783cc0428426 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Wed, 30 Sep 2026 23:25:20 -0500
Subject: [PATCH 039/201] sycl: GR down projection sliced by columns (decode
 65.5 -> 70.6 tok/s)

Each work-group owns a 128-column slice of all 324 rows, stages that
slice of xn once (<= 4 KB SLM) and streams the rows through it, 4 lanes
per row; a reduce kernel sums the 80 slice partials in a fixed order.
GR read 108.6 -> 76.5 us at 6 tokens. STRATA_GR_DOWN_SLICED=0 restores
the direct kernel.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                         |  6 +-
 sycl/src/kernels/cuda/fused_gr.dp.cpp | 91 ++++++++++++++++++++++++++-
 sycl/src/kernels/gr_bench.cpp         |  7 ++-
 3 files changed, 97 insertions(+), 7 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index f42621eeaee..4e7ae943499 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -393,13 +393,15 @@ runtime's teardown began); it now exits directly once its requests are done.
 | + `resident_plan` grouping in parallel (thread 0 alone took 73 us per layer, ~3.5 ms a round) | 57.1 |
 | + the GR down kernel reads the activations directly (the 60 KB SLM tile per group capped occupancy) | 58.7 |
 | + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | 62.6 |
-| + wide kernels for Q8_0 (MTP dense, shexp down of layer 0) and IQ4_NL (shexp down); Q6_K's activation loads aligned | **65.6** |
+| + wide kernels for Q8_0 (MTP dense, shexp down of layer 0) and IQ4_NL (shexp down); Q6_K's activation loads aligned | 65.6 |
+| + the GR down projection sliced by columns (each group stages one 128-column slice of xn, 4 lanes per row) + a fixed-order reduce | **70.6** |
 
 The last step changes the output: identical for 146 tokens, then a near-tie after a comma goes the other way (the new
 kernels sum in a different order). Q8_0 kernels 4-6x (189 -> 31 us at 2560 x 10240, 2 columns), IQ4_NL 640 -> 2560
 28 -> 6.6 us. The aligned-load helper only loads its second chunk when the address is unaligned, so it never reads a
 16-byte chunk without a needed byte and cannot cross a page at the end of an allocation. `STRATA_MMVQ_WIDE_32=0`
-restores the old Q8_0/IQ4_NL kernels.
+restores the old Q8_0/IQ4_NL kernels. The sliced GR down kernel (GR read 108.6 -> 76.5 us at 6 tokens, sums equal to
+~1e-7) flips that near-tie back: its output is the original one. `STRATA_GR_DOWN_SLICED=0` restores the direct kernel.
 
 Kernel level: IQ4_XS 107 -> 323 GB/s at 2 columns (61 -> 212 at 6), Q4_K/Q5_K 1.3-1.6x; the GR read 135 -> 110 us at
 6 tokens (bitwise equal). Switches to the old paths: `STRATA_PLAN_PARALLEL=0`, `STRATA_GR_DOWN_DIRECT=0`,
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 8e6daf385b5..c21dea9c487 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -240,6 +240,8 @@ struct GrMulti {
     float* xn;
     int T;
     float* part;   ///< [DOWN_SPLIT][kFusedGrMaxT][LR] partial row sums of the down kernel
+    int nsplit = DOWN_SPLIT;   ///< SYCL port: splits the up kernel sums (1 after the sliced down kernel's reduce)
+    float* part2 = nullptr;    ///< SYCL port: [GRS_SLICES][kFusedGrMaxT][LR + HC] slice partials of the sliced kernel
 };
 
 // Step 1 of `gr_down_kernel`, one block per token, same threads and reduction order: rs[t] and xn[t] to global.
@@ -448,6 +450,76 @@ __dpct_inline__ void gr_down_multi_direct_kernel(GrMulti m) {
         else m.part[((size_t) split * kFusedGrMaxT + k) * LR + row] = s[k];
     }
 }
+// SYCL port: the down projection sliced by columns. The direct kernel above has each warp read T x 32 bytes of
+// activations (L2) per 16 bytes of weights - 12x the weight traffic at 6 tokens, ~134 GB/s. Here work-group s owns
+// columns [128 s, 128 s + 128) of all 324 rows (320 down + 4 inject): it stages that slice of xn for the T tokens
+// once (<= 4 KB of SLM) and streams the rows through it, 4 lanes per row (one 64-byte line per step), reducing over
+// those 4 lanes once per row. gr_down_reduce then sums the 80 slice partials in a fixed order.
+constexpr int GRS_COLS = 128, GRS_SLICES = D / GRS_COLS, GRS_ROWS = LR + HC;   // 80 slices, 324 rows
+__dpct_inline__ void gr_down_sliced_kernel(GrMulti m, float* tile) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int t = (int) item.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T, sl = (int) item.get_group(2), c0 = sl * GRS_COLS;
+    for (int i = t; i < T * GRS_COLS; i += THREADS) {
+        const int k = i / GRS_COLS, c = i - k * GRS_COLS;
+        tile[i] = m.xn[(size_t) k * D + c0 + c];
+    }
+    item.barrier(sycl::access::fence_space::local_space);
+    const int rsub = lane >> 2, q = lane & 3;
+    const bool inj = m.a[0].w_inject != nullptr;
+    for (int r0 = 0; r0 < GRS_ROWS; r0 += WARPS * 8) {
+        const int r = r0 + warp * 8 + rsub;
+        const bool ok = r < LR || (r < GRS_ROWS && inj);
+        const uint16_t* wrow = r < LR ? m.a[0].w_down + (size_t) r * D : m.a[0].w_inject + (size_t) (ok ? r - LR : 0) * D;
+        sycl::uint4 wv[4];
+#pragma unroll
+        for (int cc = 0; cc < 4; ++cc)
+            wv[cc] = ok ? reinterpret_cast<const sycl::uint4*>(wrow + c0)[q + 4 * cc] : sycl::uint4(0, 0, 0, 0);
+        float acc[kFusedGrMaxT];
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            acc[k] = 0.0f;
+            if (k < T) {
+#pragma unroll
+                for (int cc = 0; cc < 4; ++cc) acc[k] += dot8(wv[cc], tile + k * GRS_COLS + (q + 4 * cc) * 8);
+            }
+        }
+        auto sg = item.get_sub_group();
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            if (k >= T) break;
+            float v = acc[k];
+            v += sycl::permute_group_by_xor(sg, v, 1);
+            v += sycl::permute_group_by_xor(sg, v, 2);
+            if (q == 0 && ok) m.part2[((size_t) sl * kFusedGrMaxT + k) * GRS_ROWS + r] = v;
+        }
+    }
+}
+__dpct_inline__ void gr_down_reduce_kernel(GrMulti m) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int i = (int) item.get_global_id(2);
+    if (i >= m.T * GRS_ROWS) return;
+    const int k = i / GRS_ROWS, r = i - k * GRS_ROWS;
+    if (r >= LR && m.a[0].w_inject == nullptr) return;
+    float x = 0.0f;
+    for (int sl = 0; sl < GRS_SLICES; ++sl) x += m.part2[((size_t) sl * kFusedGrMaxT + k) * GRS_ROWS + r];
+    if (r < LR) m.part[(size_t) k * LR + r] = x;   // split 0
+    else m.a[k].inject_out[r - LR] = x;
+}
+bool gr_down_sliced() {   // default (gr_bench: GR read 108.6 -> 76.5 us at 6 tokens); STRATA_GR_DOWN_SLICED=0: direct
+    static const bool v = std::getenv("STRATA_GR_DOWN_SLICED") == nullptr || std::atoi(std::getenv("STRATA_GR_DOWN_SLICED")) != 0;
+    return v;
+}
+float* slice_partials(sycl::queue* q) {
+    static std::mutex mu;
+    static std::unordered_map<sycl::queue*, float*> bufs;
+    std::lock_guard<std::mutex> lk(mu);
+    auto it = bufs.find(q);
+    if (it != bufs.end()) return it->second;
+    float* p = sycl::malloc_device<float>((size_t) GRS_SLICES * kFusedGrMaxT * GRS_ROWS, *q);
+    bufs[q] = p;
+    return p;
+}
 bool gr_down_direct() {   // default; STRATA_GR_DOWN_DIRECT=0: the tiled kernel (gr_bench: 13-19% slower at 3-6 tokens)
     static const bool v = std::getenv("STRATA_GR_DOWN_DIRECT") == nullptr || std::atoi(std::getenv("STRATA_GR_DOWN_DIRECT")) != 0;
     return v;
@@ -480,7 +552,7 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
         const int k = i / LR, r = i % LR;
         float x = 0.0f;
 #pragma unroll
-        for (int sp = 0; sp < DOWN_SPLIT; ++sp) x += m.part[((size_t) sp * kFusedGrMaxT + k) * LR + r];
+        for (int sp = 0; sp < DOWN_SPLIT; ++sp) if (sp < m.nsplit) x += m.part[((size_t) sp * kFusedGrMaxT + k) * LR + r];
         x /= (float) HC;
         const float v = x / (1.0f + sycl::native::exp(-x));
         lo[k][r] = v;
@@ -640,7 +712,22 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         attr[dev] = true;
     }
     const int chunk_tok = (dev >= 0 && dev < 64 && chunk[dev]) ? chunk[dev] : kFusedGrMaxT;
-    if (gr_down_direct()) {
+    if (gr_down_sliced()) {
+        m.part2 = slice_partials(st);
+        m.nsplit = 1;
+        st->submit([&](sycl::handler& cgh) {
+            sycl::local_accessor<float, 1> tl(sycl::range<1>((size_t) kFusedGrMaxT * GRS_COLS), cgh);
+            cgh.parallel_for<dpct_kernel_name<class gr_down_sliced_k>>(
+                sycl::nd_range<3>(sycl::range(1, 1, GRS_SLICES) * sycl::range(1, 1, THREADS), sycl::range(1, 1, THREADS)),
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] {
+                    gr_down_sliced_kernel(m, tl.get_multi_ptr<sycl::access::decorated::no>().get());
+                });
+        });
+        const unsigned nred = unsigned((n_tok * GRS_ROWS + 127) / 128);
+        st->parallel_for<dpct_kernel_name<class gr_down_reduce_k>>(
+            sycl::nd_range<3>(sycl::range(1, 1, nred) * sycl::range(1, 1, 128), sycl::range(1, 1, 128)),
+            [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { gr_down_reduce_kernel(m); });
+    } else if (gr_down_direct()) {
         st->parallel_for<dpct_kernel_name<class gr_down_multi_direct>>(
             sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) * sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
diff --git a/sycl/src/kernels/gr_bench.cpp b/sycl/src/kernels/gr_bench.cpp
index 7abeda91c87..cbe78cbb1e7 100644
--- a/sycl/src/kernels/gr_bench.cpp
+++ b/sycl/src/kernels/gr_bench.cpp
@@ -49,9 +49,10 @@ int main() {
         std::vector<float> h((size_t) T * (LR + HC + HC + N));
         s->memcpy(h.data(), out, h.size() * 4).wait();
         uint64_t cs = 1469598103934665603ull;
-        for (float v : h) { uint32_t u; std::memcpy(&u, &v, 4); cs = (cs ^ u) * 1099511628211ull; }
-        std::printf("fused GR read, %d tokens: %7.1f us (%.0f GB/s of weights)  checksum %016llx\n", T, us,
-                    (wd.size() + wu.size() + wi.size()) * 2.0 / us / 1e3, (unsigned long long) cs);
+        double sum = 0;
+        for (float v : h) { uint32_t u; std::memcpy(&u, &v, 4); cs = (cs ^ u) * 1099511628211ull; sum += v; }
+        std::printf("fused GR read, %d tokens: %7.1f us (%.0f GB/s of weights)  checksum %016llx  sum %.9e\n", T, us,
+                    (wd.size() + wu.size() + wi.size()) * 2.0 / us / 1e3, (unsigned long long) cs, sum);
     }
     return 0;
 }

From 0800340507d7b3c9ea2833f7234533c27145aac3 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 03:27:17 -0500
Subject: [PATCH 040/201] serve: log each request's client; SYCL wrapper
 without the image's health check

A disconnect in the log now names the client that closed it. The
strata-sycl-dev image inherits a health check on port 8080 (llama.cpp's)
that marked the serving container unhealthy forever.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 serve/server.py           | 4 ++++
 sycl/serve/strata-sycl.sh | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/serve/server.py b/serve/server.py
index a11ebd1d91b..f51fc174bca 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -1378,6 +1378,10 @@ def do_POST(self):
                 return
             try:
                 req = json.loads(self.rfile.read(int(self.headers.get("Content-Length", 0))) or b"{}")
+                if path in ("/v1/chat/completions", "/v1/messages"):   # who asked: a later "disconnect" names its client
+                    print(f"[strata] request {path} from {self.client_address[0]} "
+                          f"({self.headers.get('User-Agent', '?')[:60]}), stream={bool(req.get('stream'))}, "
+                          f"max_tokens={req.get('max_tokens') or req.get('max_completion_tokens')}", flush=True)
                 if path == "/v1/chat/completions":
                     self._openai(req)
                 elif path == "/v1/messages":
diff --git a/sycl/serve/strata-sycl.sh b/sycl/serve/strata-sycl.sh
index 7819a585437..b64eb21f8a7 100755
--- a/sycl/serve/strata-sycl.sh
+++ b/sycl/serve/strata-sycl.sh
@@ -16,7 +16,7 @@ docker rm -f "$name" >/dev/null 2>&1 || true              # a container left beh
 args=""
 for a in "$@"; do args+=" $(printf '%q' "$a")"; done
 # the port's run-time switches: the device-built verify plan without host handshakes (docs/INTEL.md)
-exec docker run --rm -i --name "$name" --device /dev/dri --oom-score-adj 1000 --stop-timeout 30 \
+exec docker run --rm -i --name "$name" --device /dev/dri --oom-score-adj 1000 --stop-timeout 30 --no-healthcheck \
     -v "$root:/work" \
     -e STRATA_VERIFY_DEVICE_PLAN=1 -e STRATA_VERIFY_NO_HOST=1 -e STRATA_STAGER_THREADS=12 \
     "${STRATA_SYCL_IMAGE:-strata-sycl-dev}" \

From 288d57be40322935155c2aaabcc29d3baf2c125d Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 03:35:41 -0500
Subject: [PATCH 041/201] docs/INTEL.md: current numbers up front (SYCL port
 70.8 tok/s decode, 799 tok/s prompt)

The summary still described llama.cpp as the Intel engine at 23-25 tok/s.
It now compares NVIDIA, the SYCL port (setup's default once built) and
llama.cpp; the stale 'not ported'/'not done' items, setup's KV choice and
the served speed are corrected, and the long-context table is marked as
measured before the decode work.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 93 +++++++++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 36 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 4e7ae943499..41357bb57d4 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -1,35 +1,43 @@
 # Strata on an Intel Arc
 
-Strata's engine is CUDA. On an Intel Arc the same model runs behind the same Strata server, with
-llama.cpp's SYCL backend doing the arithmetic. Everything above the engine - the OpenAI and Anthropic
-APIs, streaming, tool calls, MCP, the web app - is unchanged.
+Strata's engine is CUDA. On an Intel Arc there are two ways to run the same model behind the same Strata
+server (OpenAI and Anthropic APIs, streaming, tool calls, MCP, the web app all unchanged):
 
-Written for and measured on an **Arc Pro B70 (32 GB)** running the Coder (IQ1_M) on Ubuntu 24.04.
+- **Strata's own engine, ported to SYCL** (`sycl/`, the section "The engine itself on Intel" below). The
+  default once it is built: setup.py picks it on an Intel card when `build-sycl-aot/strata` and the
+  `strata-sycl-dev` image exist.
+- **llama.cpp's SYCL backend** (`--intel-engine llama`, or when the port is not built). Simpler to set
+  up, about a third of the speed.
 
-## What you get
+Written for and measured on an **Arc Pro B70 (32 GB)** running the Coder (IQ1_M) on Ubuntu 24.04, in a
+PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
-| | NVIDIA (Strata engine) | Intel Arc (llama.cpp engine) |
-|---|---|---|
-| model files | the same GGUFs | the same GGUFs |
-| where the model lives | experts in RAM, hot ones on the card | **all of shard 1 on the card** (it fits a 32 GB card); shard 2's lookup table paged from disk |
-| RAM needed | 32-64 GB | little: the model is on the card (23 GB was fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | 23-25 tok/s on the B70 |
-| prompt reading | ~1,870 tok/s | ~150 tok/s |
-| speculative decoding (MTP) | yes | no (the GGUF carries no draft layer llama.cpp can use) |
-| images | yes | not yet |
-| context | up to 262K | 32K by default; 131K is the measured ceiling on a 32 GB card (see below); 262K does not fit |
-
-The speed gap is the SYCL backend's known state on Battlemage: general matrix multiplies do not use
-the XMX units yet (only the oneDNN flash-attention path does). It is upstream llama.cpp work, not
-something in Strata. Decode is GPU-bound at 90%+ busy, so nothing is falling back to the CPU.
+## What you get (2026-10-01)
+
+| | NVIDIA (Strata engine) | Intel Arc, Strata SYCL port | Intel Arc, llama.cpp |
+|---|---|---|---|
+| model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
+| where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
+| RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **70.8 tok/s** (19-token prompt, 256 greedy tokens), **63.6** after a 2,184-token prompt; ~56 through the API on a chat request | 23-25 tok/s |
+| prompt reading | ~1,870 tok/s | **799 tok/s** at 2,184 tokens, 1,062 at 80K | ~150 tok/s (424 at 105K) |
+| speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
+| images | yes | not yet | not yet |
+| context | up to 262K | 256K measured (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
+
+Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
+on the text"). The SYCL numbers are greedy runs of the engine test rig on the final 2026-09-30 build (commit
+ccdae3e); "Decode round 2" below lists what each change bought.
 
 ## Setup
 
     ./setup.sh
 
 Setup notices the Arc (no `nvidia-smi`; an Intel GPU under the `xe` or `i915` driver in sysfs), says
-so, and takes the Intel path: no compiler, no CUDA toolkit. It downloads the model, exports the
-tokenizer, finds a `llama-server`, and writes a config with a `"llama"` block and a start script.
+so, and takes the Intel path: no CUDA toolkit. With the SYCL port built it writes a `"strata"` config for it
+(see "Serving the port" below); otherwise, or with `--intel-engine llama`, it finds a `llama-server` and writes a
+config with a `"llama"` block and a start script. The rest of this section and the next two are that llama.cpp
+path.
 
 Where the `llama-server` comes from, in order:
 
@@ -299,8 +307,9 @@ repeated to length, 64 greedy tokens after it:
 | 256K | k8v4 | 752 tok/s | 3.8 tok/s | 30.7 GB | 11,294 |
 | 256K | int8 | 718 tok/s | 3.7 tok/s | 30.7 GB | 10,923 |
 
-Every configuration completes and answers coherently; decode after the prompt is set by how many experts the KV
-leaves room for. **KV streaming fixes it** (`--kv-resident 32768`: the whole KV in pinned host memory, only the
+(Measured before the 2026-09-30 decode work in "Decode round 2"; decode after a long prompt is higher now, not
+re-measured.) Every configuration completes and answers coherently; decode after the prompt is set by how many
+experts the KV leaves room for. **KV streaming fixes it** (`--kv-resident 32768`: the whole KV in pinned host memory, only the
 attended window in VRAM): every expert stays in VRAM and decode after the prompt is 38.7 tok/s at 128K int8
 (from 8.5), 35.3 at 128K q4_0, 31.3 at 256K int8 (from 3.7) and 31.5 at 256K q4_0 (from 5.0); the prompt pays
 5-13% (725-860 tok/s). setup.py turns it on from 64K up for the SYCL engine and keeps INT8. k8v4 works through the FP32 attention fallback; its dedicated
@@ -335,7 +344,8 @@ attached (paths in the config's `args` are the container's, the data root mounte
 ```
 
 Measured through the OpenAI API with those sampling defaults: 36 tok/s decode on a first turn, 33 on a follow-up
-(which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. The reserve matters:
+(which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. After the 2026-09-30
+decode work: 55.7 tok/s on a 300-token answer (prompt included), 55-59 tok/s over 5,000-18,000-token answers. The reserve matters:
 with `--stream-experts` there is no host copy of the experts, so any expert left out of VRAM is read from the SSD
 and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
 5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free.
@@ -343,7 +353,8 @@ and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 12
 `setup.py` writes this config by itself on an Intel card once the SYCL engine is built (`build-sycl-aot/strata`
 and the `strata-sycl-dev` image): a native pack, the MTP draft layer (from an existing `mtp-q2_0.gguf` without the
 5 GB download), the container's paths, the reserve (1,024 MiB up to 32K, 2,048 with 4,096-token chunks above),
-Q4_0 KV above 64K, and the `sampling` block of an earlier config kept. `--intel-engine llama` keeps llama.cpp.
+INT8 KV with `--kv-resident 32768` from 64K up (when the RAM holds the KV), and the `sampling` block of an earlier
+config kept. `--intel-engine llama` keeps llama.cpp.
 
 **Speed depends on the text.** Decode with speculative decoding tracks how often the draft layer guesses right.
 The served engine at 32K context: 45-51 tok/s on the rig's test prompt (continuing a Fibonacci function, 77-85%
@@ -435,24 +446,34 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 5. A fixup whose pattern upstream changed shows up as a compile error (the PTX gate became an `#elif`
    under upstream's `__HIPCC__` guard); extend the fixup, re-run it, rebuild.
 
-**Not ported yet.**
+**Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
-  `qsa_prompt_attn`, `qsa_select`'s block scores, `native_qsa_score`. Each already has the "older card"
-  fallback the CUDA build uses below sm_80, and the SYCL build takes that path: the launchers refuse the
-  device and their callers use the older kernels. The XMX versions (`joint_matrix`, bf16/f16 on Xe2; no
-  tf32) are the next piece of work and the one that decides prompt speed.
+  `qsa_prompt_attn`, `qsa_select`'s block scores, `native_qsa_score`. The SYCL build takes the "older card"
+  fallback the CUDA build uses below sm_80. `qsa_prompt_attn` also has an XMX version (`joint_matrix`, opt-in
+  `STRATA_PROMPT_ATTN_XMX=1`): correct, but slower than the fallback (see "XMX prompt attention v2").
 - The ggml MMQ prefill path (`moe_mmq.cu`) needs llama.cpp's ggml-cuda sources; not built.
-- AOT device code (`-DSTRATA_SYCL_AOT=bmg-g31`) is wired but untested; the port JITs from SPIR-V.
+- AOT device code is what runs: `AOT=bmg-g31 BUILD_DIR=.../build-sycl-aot` (the JIT build costs ~47 s of
+  compiling on the first window).
 
 ## Not done
 
-- Images. Strata's vision path encodes with `strata-vision` into embeddings the CUDA engine reads;
-  llama-server takes the image itself (`--mmproj`). Wiring that is the next piece.
-- Speculative decoding. Strata's MTP draft is its own packed format; the GGUF has none.
-- The expert-residency profile and n-gram lookup: moot with the model on the card.
+- Images, on both Intel engines. Strata's vision path encodes with `strata-vision` into embeddings the CUDA
+  engine reads; neither the SYCL port nor the llama.cpp config wires it yet.
+- Speculative decoding on the llama.cpp path (the GGUF carries no draft layer llama.cpp can use). The SYCL
+  port has it (MTP draft layer, `--mtp`).
+
+## Measured, 2026-09-30, Arc Pro B70, Coder IQ1_M, 32K context, INT8 KV: the SYCL port
+
+| | |
+|---|---|
+| decode | 70.8 tok/s on a 19-token prompt, 63.6 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
+| prompt | 799 tok/s on 2,184 tokens |
+| through the API | 55.7 tok/s on a 300-token chat answer, prompt included |
+| VRAM | all 12,288 experts resident, ~1.9 GB free with everything loaded (`--vram-reserve-mib 1024`) |
+| RAM | no host copy of the experts (`--stream-experts`) |
 
-## Measured, 2026-09-29, Arc Pro B70, Coder IQ1_M, 32K context, q8_0 KV
+## Measured, 2026-09-29, Arc Pro B70, Coder IQ1_M, 32K context, q8_0 KV: llama.cpp
 
 | | |
 |---|---|

From 20a2ccffdf3157f79a8fa023f604bc5291204342 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 03:38:25 -0500
Subject: [PATCH 042/201] sycl: IQ4_NL expert dots with the codebook in
 registers and aligned loads (decode 70.8 -> 76.1 tok/s)

The expert down projection (IQ4_NL in 39 of 48 layers) was the largest
expert kernel: ggml reads four uint32 of the codebook from global memory
per lookup and each weight int as two 16-bit loads. Register constants
and aligned 4-byte loads (the third only when unaligned, so page-safe)
produce the same ints: 80.8 -> 43.1 us per call, output tokens identical.
-DSTRATA_IQ4NL_FAST=0 restores ggml's path.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                           |  7 ++--
 sycl/src/kernels/cuda/iq_kernels.dp.cpp | 44 +++++++++++++++++++++++++
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 41357bb57d4..3a3103fcf38 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -19,7 +19,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **70.8 tok/s** (19-token prompt, 256 greedy tokens), **63.6** after a 2,184-token prompt; ~56 through the API on a chat request | 23-25 tok/s |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **76.1 tok/s** (19-token prompt, 256 greedy tokens), 63.6 after a 2,184-token prompt (before the IQ4_NL change); ~56 through the API on a chat request | 23-25 tok/s |
 | prompt reading | ~1,870 tok/s | **799 tok/s** at 2,184 tokens, 1,062 at 80K | ~150 tok/s (424 at 105K) |
 | speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
 | images | yes | not yet | not yet |
@@ -405,7 +405,8 @@ runtime's teardown began); it now exits directly once its requests are done.
 | + the GR down kernel reads the activations directly (the 60 KB SLM tile per group capped occupancy) | 58.7 |
 | + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | 62.6 |
 | + wide kernels for Q8_0 (MTP dense, shexp down of layer 0) and IQ4_NL (shexp down); Q6_K's activation loads aligned | 65.6 |
-| + the GR down projection sliced by columns (each group stages one 128-column slice of xn, 4 lanes per row) + a fixed-order reduce | **70.6** |
+| + the GR down projection sliced by columns (each group stages one 128-column slice of xn, 4 lanes per row) + a fixed-order reduce | 70.6 |
+| + IQ4_NL expert dots (the down projection in 39 of 48 layers): codebook in registers, weights as aligned 4-byte loads, bitwise the same ints (2026-10-01) | **76.1** |
 
 The last step changes the output: identical for 146 tokens, then a near-tie after a comma goes the other way (the new
 kernels sum in a different order). Q8_0 kernels 4-6x (189 -> 31 us at 2560 x 10240, 2 columns), IQ4_NL 640 -> 2560
@@ -467,7 +468,7 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 
 | | |
 |---|---|
-| decode | 70.8 tok/s on a 19-token prompt, 63.6 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
+| decode | 76.1 tok/s on a 19-token prompt (2026-10-01); 63.6 after a 2,184-token prompt before the IQ4_NL change (256 greedy tokens, MTP + suffix drafts) |
 | prompt | 799 tok/s on 2,184 tokens |
 | through the API | 55.7 tok/s on a 300-token chat answer, prompt included |
 | VRAM | all 12,288 experts resident, ~1.9 GB free with everything loaded (`--vram-reserve-mib 1024`) |
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 51f081b0e0e..0b116b406c8 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -326,16 +326,53 @@ __dpct_inline__ float vec_dot_iq1_m_q8_1(const void *__restrict__ vbq,
     return d * ((sumi[0] + sumf[0]) * sc0 + (sumi[1] + sumf[1]) * sc1);
 }
 
+// SYCL port: the IQ4_NL codebook in registers and its 2-byte-aligned weights as aligned loads. ggml reads 4 uint32 of
+// the codebook from global memory per lookup and each weight int as two 16-bit loads (block_iq4_nl is 18 bytes, its
+// qs 2-byte aligned); the expert down projection (IQ4_NL in 39 of 48 layers) was the largest expert kernel. Same ints
+// out, so the dots are bitwise unchanged.
+__dpct_inline__ uint32_t iq4nl_lut4(uint32_t q4) {   // four nibbles -> four kvalues_iq4nl bytes
+    constexpr uint32_t t0 = 0xBFAD9881u, t1 = 0xF6EADDCFu, t2 = 0x26190D01u, t3 = 0x71594535u;
+    uint32_t r = 0;
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        const uint32_t n = (q4 >> (8 * i)) & 0xF;
+        const uint32_t t = n < 4 ? t0 : n < 8 ? t1 : n < 12 ? t2 : t3;
+        r |= ((t >> (8 * (n & 3))) & 0xFF) << (8 * i);
+    }
+    return r;
+}
+__dpct_inline__ sycl::int2 iq4nl_pair(int aux) {   // = get_int_from_table_16(aux, kvalues_iq4nl)
+    return sycl::int2((int) iq4nl_lut4((uint32_t) aux & 0x0f0f0f0fu), (int) iq4nl_lut4(((uint32_t) aux >> 4) & 0x0f0f0f0fu));
+}
+__dpct_inline__ sycl::int2 load8_a2(const uint8_t* p) {   // 8 bytes at a 2-byte-aligned address, as two ints
+    const uintptr_t a = reinterpret_cast<uintptr_t>(p);
+    const uint32_t* q = reinterpret_cast<const uint32_t*>(a & ~uintptr_t(3));
+    const uint32_t w0 = q[0], w1 = q[1];
+    if (!(a & 2)) return sycl::int2((int) w0, (int) w1);
+    const uint32_t w2 = q[2];   // only when unaligned: it then holds needed bytes, so it cannot cross a page
+    return sycl::int2((int) ((w0 >> 16) | (w1 << 16)), (int) ((w1 >> 16) | (w2 << 16)));
+}
+#ifndef STRATA_IQ4NL_FAST
+#define STRATA_IQ4NL_FAST 1   // compile-time: -DSTRATA_IQ4NL_FAST=0 for ggml's table/16-bit-load path
+#endif
+
 __dpct_inline__ float vec_dot_iq4_nl_q8_1(const void *__restrict__ vbq,
                                           const block_q8_1 *__restrict__ bq8_1,
                                           const int &kbx, const int &iqs) {
     const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
     const int* q8 = (const int*) bq8_1->qs + iqs;
     int sumi = 0;
+#if STRATA_IQ4NL_FAST
+    const sycl::int2 qq = load8_a2(bq4->qs + 4 * iqs);
+#endif
 #pragma unroll
     for (int l = 0; l < 2; ++l) {
+#if STRATA_IQ4NL_FAST
+        const sycl::int2 v = iq4nl_pair(l ? qq.y() : qq.x());
+#else
         const int aux_q4 = get_int_b2(bq4->qs, iqs + l);
         const sycl::int2 v = get_int_from_table_16(aux_q4, kvalues_iq4nl);
+#endif
         sumi = ggml_cuda_dp4a(v.x(), q8[l + 0], sumi);
         sumi = ggml_cuda_dp4a(v.y(), q8[l + 4], sumi);
     }
@@ -577,10 +614,17 @@ template <> struct Multi<20> {   // iq4_nl (down)
     static constexpr bool has = true; static constexpr int NW = 4;
     __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
         const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
+#if STRATA_IQ4NL_FAST
+        const sycl::int2 qq = load8_a2(bq4->qs + 4 * iqs);
+#endif
 #pragma unroll
         for (int l = 0; l < 2; ++l) {
+#if STRATA_IQ4NL_FAST
+            const sycl::int2 v = iq4nl_pair(l ? qq.y() : qq.x());
+#else
             const int aux_q4 = get_int_b2(bq4->qs, iqs + l);
             const sycl::int2 v = get_int_from_table_16(aux_q4, kvalues_iq4nl);
+#endif
             m.w[2 * l + 0] = v.x();
             m.w[2 * l + 1] = v.y();
         }

From 89e4de45ab9221fdefe87da85b1703d898fa966e Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 04:01:03 -0500
Subject: [PATCH 043/201] docs/INTEL.md: planned item 9, the original IQ2_XS
 with the expert overflow in the host mirror

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 3a3103fcf38..91113229a39 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -429,6 +429,11 @@ first decode round, so it is a once-per-process cost, not lost throughput. Ruled
 6. INT8 prompt GEMMs: experts dequantized to INT8, oneMKL/oneDNN INT8 on XMX (half the dequant bytes, 2x rate).
 7. Fewer graph nodes per decode round (~2,500 at ~5 us): norm+rope, scores+top-k, gate+quantize fused.
 8. Wider speculation (two draft branches per verify window): the kernels are latency-bound, so it is nearly free.
+9. A model bigger than VRAM: the original Qwen3.8-Flash-Next IQ2_XS (35.5 GB of experts; the same path suits Q2_0
+   and Swift 1.5) on the B70 with 23 GB of RAM. ~24 GB of experts in VRAM, the rest (~10-12 GB) in the pinned host
+   mirror the device plan reads over PCIe (item 2). The port has the IQ2_XS/IQ3_XXS/Q2_0 expert kernels. Open: whether
+   a 10+ GB pinned mirror fits beside everything else in 23 GB, and decode with that share of experts on a Gen3 x8
+   link (3.6 GB mirrored measured 40.9 tok/s; expect less). Needs the 68 GB download.
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for

From 03c034edeb8a0bca0e6fc602ed6e41989b2f9ec3 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 04:22:27 -0500
Subject: [PATCH 044/201] sycl: GR norm per (token, stream), aligned loads in
 the IQ3_XXS/IQ3_S/IQ2_S expert dots

- the GR norm ran one work-group per token; one per (token, stream) visits
  every element in the same order, so rs and xn are bitwise unchanged
  (gr_bench checksums equal), GR read 76.7 -> 71.4 us at 6 tokens
- the gate/up expert dots read their 2-byte-aligned weights as aligned
  4-byte loads (page-safe) instead of 16-bit pairs; same ints
- grids in local memory (STRATA_GRID_SLM=1) measured slower: off
Decode 77.9 tok/s (19-token prompt), output tokens unchanged.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/src/kernels/cuda/fused_gr.dp.cpp   | 62 +++++++++++++++++
 sycl/src/kernels/cuda/iq_kernels.dp.cpp | 88 +++++++++++++++++++------
 2 files changed, 131 insertions(+), 19 deletions(-)

diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index c21dea9c487..5e17d4df84c 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -315,6 +315,63 @@ auto &part =
 }
 
 
+// SYCL port: gr_norm_multi_kernel with one work-group per (token, stream) instead of per token: T groups left the
+// B70 nearly idle (16 us a call). rs is per stream, so a group owns its stream outright. Thread t visits the same
+// elements of stream c in the same order as in the per-token kernel (i = 4t + 1024k), and the warp and cross-warp
+// sums run in the same order, so rs and xn are bitwise the old kernel's. The scaled values stay in registers
+// (at most 3 float4 per thread) instead of a second pass over global memory.
+__dpct_inline__ void gr_norm_split_kernel(GrMulti m) {
+    auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto& part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS]>(item.get_group());
+    auto& s_rs = *sycl::ext::oneapi::group_local_memory_for_overwrite<float>(item.get_group());
+    const int tok = (int) item.get_group(2) / HC, c = (int) item.get_group(2) % HC;
+    const FusedGrArgs& a = m.a[tok];
+    float* xn = m.xn + (size_t) tok * D;
+    const int t = (int) item.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const float gw = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+    constexpr int MAXK = (N + THREADS * 4 - 1) / (THREADS * 4) + 1;   // 3: float4s of one stream per thread
+    sycl::float4 keep[MAXK];
+    int kept = 0;
+    float ss = 0.0f;
+    for (int i = t * 4; i < D; i += THREADS * 4) {
+        if (i / N != c) continue;
+        const int d = i - c * N;
+        sycl::float4 r = *reinterpret_cast<const sycl::float4*>(a.R + i);
+        if (a.apply) {
+            const sycl::float4 b = *reinterpret_cast<const sycl::float4*>(a.bo_prev + d);
+            r.x() = sycl::fma((float) (b.x()), gw, r.x());
+            r.y() = sycl::fma((float) (b.y()), gw, r.y());
+            r.z() = sycl::fma((float) (b.z()), gw, r.z());
+            r.w() = sycl::fma((float) (b.w()), gw, r.w());
+        }
+        const sycl::float4 g = *reinterpret_cast<const sycl::float4*>(a.w_norm + i);
+        ss += r.x() * r.x() + r.y() * r.y() + r.z() * r.z() + r.w() * r.w();
+        if (kept < MAXK) keep[kept++] = sycl::float4(r.x() * g.x(), r.y() * g.y(), r.z() * g.z(), r.w() * g.w());
+    }
+    const float v = warp_sum(ss);
+    if (lane == 0) part[warp] = v;
+    item.barrier(sycl::access::fence_space::local_space);
+    if (t == 0) {
+        float sum = 0.0f;
+#pragma unroll
+        for (int w = 0; w < WARPS; ++w) sum += part[w];
+        s_rs = sycl::rsqrt(sum / (float) N + a.eps);
+        a.rs[c] = s_rs;
+    }
+    item.barrier(sycl::access::fence_space::local_space);
+    const float rs = s_rs;
+    int k = 0;
+    for (int i = t * 4; i < D && k < kept; i += THREADS * 4) {
+        if (i / N != c) continue;
+        const sycl::float4 x = keep[k++];
+        *reinterpret_cast<sycl::float4*>(xn + i) = sycl::float4(x.x() * rs, x.y() * rs, x.z() * rs, x.w() * rs);
+    }
+}
+bool gr_norm_split() {   // default; STRATA_GR_NORM_SPLIT=0: one work-group per token
+    static const bool v = std::getenv("STRATA_GR_NORM_SPLIT") == nullptr || std::atoi(std::getenv("STRATA_GR_NORM_SPLIT")) != 0;
+    return v;
+}
+
 // Step 2 of `gr_down_kernel` for T tokens.  One warp per row (so each lane accumulates the same chunks in the
 // same order as the single-token kernel); per tile the lane's 10 weight chunks are loaded BEFORE the activation
 // tile is staged, so the DRAM and L2 traffic are in flight together.
@@ -665,6 +722,11 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
+        if (gr_norm_split())
+            st->parallel_for<dpct_kernel_name<class gr_norm_split_k>>(
+                sycl::nd_range<3>(sycl::range(1, 1, n_tok * HC) * sycl::range(1, 1, THREADS), sycl::range(1, 1, THREADS)),
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { gr_norm_split_kernel(m); });
+        else
         st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_2f4d92>>(
             sycl::nd_range<3>(sycl::range(1, 1, n_tok) *
                                   sycl::range(1, 1, THREADS),
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 0b116b406c8..535fbb3191c 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -352,6 +352,19 @@ __dpct_inline__ sycl::int2 load8_a2(const uint8_t* p) {   // 8 bytes at a 2-byte
     const uint32_t w2 = q[2];   // only when unaligned: it then holds needed bytes, so it cannot cross a page
     return sycl::int2((int) ((w0 >> 16) | (w1 << 16)), (int) ((w1 >> 16) | (w2 << 16)));
 }
+__dpct_inline__ int load4_a2(const uint8_t* p) {   // 4 bytes at a 2-byte-aligned address (= get_int_b2)
+    const uintptr_t a = reinterpret_cast<uintptr_t>(p);
+    const uint32_t* q = reinterpret_cast<const uint32_t*>(a & ~uintptr_t(3));
+    const uint32_t w0 = q[0];
+    if (!(a & 2)) return (int) w0;
+    return (int) ((w0 >> 16) | (q[1] << 16));   // the second word holds needed bytes: page-safe
+}
+// SYCL port: the gate/up kernels can stage their format's codebook grid in local memory (STRATA_GRID_SLM=1, compile
+// time). Measured slower and off: copying the grid into each of ~1,200 work-groups per call costs more than the
+// lookups save (IQ2_S 52.5 -> 62.7 us, IQ3_S 60.8 -> 70.0, IQ3_XXS 60.3 -> 62.1 per call; unitrace 2026-10-01).
+#ifndef STRATA_GRID_SLM
+#define STRATA_GRID_SLM 0
+#endif
 #ifndef STRATA_IQ4NL_FAST
 #define STRATA_IQ4NL_FAST 1   // compile-time: -DSTRATA_IQ4NL_FAST=0 for ggml's table/16-bit-load path
 #endif
@@ -520,14 +533,21 @@ template <int TY> struct Multi { static constexpr bool has = false; static const
 
 template <> struct Multi<18> {   // iq3_xxs
     static constexpr bool has = true; static constexpr int NW = 8;
-    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m, const void* grid = nullptr) {
         const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
+#if STRATA_IQ4NL_FAST
+        const sycl::int2 q3_packed = load8_a2(bq3->qs + 4 * iqs);
+        const uint32_t aux32 = (uint32_t) load4_a2(bq3->qs + 4 * (QK_K / 16 + iqs / 2));
+#else
         const sycl::int2 q3_packed = sycl::int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
-        const uint8_t* q3 = (const uint8_t*) &q3_packed;
         const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+#endif
+        const uint8_t* q3 = (const uint8_t*) &q3_packed;
+        const uint32_t* G = (const uint32_t*) grid;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const sycl::int2 grid_pos = sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
+            const sycl::int2 grid_pos = G ? sycl::int2(G[q3[l0 + 0]], G[q3[l0 + 1]])
+                                          : sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
             const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
             const int signs0 = swar_ne4(signs & 0x08040201);
             const int signs1 = swar_ne4(signs & 0x80402010);
@@ -550,16 +570,23 @@ template <> struct Multi<18> {   // iq3_xxs
 
 template <> struct Multi<22> {   // iq2_s
     static constexpr bool has = true; static constexpr int NW = 8;
-    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m, const void* grid = nullptr) {
         const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
+#if STRATA_IQ4NL_FAST
+        const int qs_packed = load4_a2(bq2->qs + 4 * (iqs / 2));
+        const int signs_packed_32 = load4_a2(bq2->qs + 4 * (QK_K / 32 + iqs / 2));
+#else
         const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
+        const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
+#endif
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq2->qh[iqs / 2];
-        const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
         const uint8_t* sp = (const uint8_t*) &signs_packed_32;
+        const uint64_t* G = (const uint64_t*) grid;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+            const int gi = qs[l0 / 2] | ((qh << (8 - l0)) & 0x300);
+            const int* grid_pos = G ? (const int*) (G + gi) : (const int*) (iq2s_grid + gi);
             const int signs0 = swar_ne4(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21));
             const int signs1 = swar_ne4(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17));
             m.w[l0 + 0] = swar_sub4(grid_pos[0] ^ signs0, signs0);
@@ -581,17 +608,23 @@ template <> struct Multi<22> {   // iq2_s
 
 template <> struct Multi<21> {   // iq3_s
     static constexpr bool has = true; static constexpr int NW = 8;
-    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m, const void* grid = nullptr) {
         const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
+#if STRATA_IQ4NL_FAST
+        const sycl::int2 qs_packed = load8_a2(bq3->qs + 4 * iqs);
+        const int signs_packed_32 = load4_a2(bq3->signs + 4 * (iqs / 2));
+#else
         const sycl::int2 qs_packed = sycl::int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
+        const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
+#endif
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq3->qh[iqs / 2];
-        const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
         const uint8_t* sp = (const uint8_t*) &signs_packed_32;
+        const uint32_t* G = (const uint32_t*) grid;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const sycl::int2 grid_pos = sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
-                                                   iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+            const int i0 = qs[l0 + 0] | ((qh << (8 - l0)) & 0x100), i1 = qs[l0 + 1] | ((qh << (7 - l0)) & 0x100);
+            const sycl::int2 grid_pos = G ? sycl::int2(G[i0], G[i1]) : sycl::int2(iq3s_grid[i0], iq3s_grid[i1]);
             const int signs0 = swar_ne4(((sp[l0 / 2] & 0x03) << 7) | ((sp[l0 / 2] & 0x0C) << 21));
             const int signs1 = swar_ne4(((sp[l0 / 2] & 0x30) << 3) | ((sp[l0 / 2] & 0xC0) << 17));
             m.w[l0 + 0] = swar_sub4(grid_pos.x() ^ signs0, signs0);
@@ -612,7 +645,7 @@ template <> struct Multi<21> {   // iq3_s
 
 template <> struct Multi<20> {   // iq4_nl (down)
     static constexpr bool has = true; static constexpr int NW = 4;
-    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m, const void* = nullptr) {
         const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
 #if STRATA_IQ4NL_FAST
         const sycl::int2 qq = load8_a2(bq4->qs + 4 * iqs);
@@ -641,7 +674,7 @@ template <> struct Multi<20> {   // iq4_nl (down)
 
 template <> struct Multi<42> {   // q2_0 (down)
     static constexpr bool has = true; static constexpr int NW = 8;
-    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m) {
+    __dpct_inline__ static void prep(const void* vbq, int kbx, int iqs, MultiW& m, const void* = nullptr) {
         const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
         const int16_t* qs = (const int16_t*) bq2_0->qs + iqs * 4;
 #pragma unroll
@@ -665,7 +698,8 @@ template <> struct Multi<42> {   // q2_0 (down)
 
 // One row against E activations at once, LANES lanes per row.
 template <int TY, int LANES, int E>
-__dpct_inline__ void row_dot_multi(const uint8_t* row, const block_q8_1* const* xs, int nb, int sub, float* out) {
+__dpct_inline__ void row_dot_multi(const uint8_t* row, const block_q8_1* const* xs, int nb, int sub, float* out,
+                                   const void* grid = nullptr) {
     using F = Fmt<TY>;
     using M = Multi<TY>;
     float s[E];
@@ -674,7 +708,7 @@ __dpct_inline__ void row_dot_multi(const uint8_t* row, const block_q8_1* const*
     for (int k = sub; k < nb * F::ipb; k += LANES) {
         const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
         MultiW m;
-        M::prep(row, kbx, iqs, m);
+        M::prep(row, kbx, iqs, m, grid);
 #pragma unroll
         for (int e = 0; e < E; ++e) {
             int u[8];
@@ -695,14 +729,15 @@ __dpct_inline__ void row_dot_multi(const uint8_t* row, const block_q8_1* const*
 // The entries e0..e1 of one row: chunks of 4 through the multi-entry dot, the rest one at a time.
 template <int TY, int LANES>
 __dpct_inline__ void row_entries(const uint8_t* wr, const block_q8_1* x, int x_stride, const int32_t* ent_idx,
-                                 int e0, int e1, int nb, int sub, float* dst, size_t dst_stride) {
+                                 int e0, int e1, int nb, int sub, float* dst, size_t dst_stride,
+                                 const void* grid = nullptr) {
     int e = e0;
     if constexpr (Multi<TY>::has) {
         for (; e + 4 <= e1; e += 4) {
             const block_q8_1* xs[4] = {x + (size_t) ent_idx[e] * x_stride, x + (size_t) ent_idx[e + 1] * x_stride,
                                        x + (size_t) ent_idx[e + 2] * x_stride, x + (size_t) ent_idx[e + 3] * x_stride};
             float o[4];
-            row_dot_multi<TY, LANES, 4>(wr, xs, nb, sub, o);
+            row_dot_multi<TY, LANES, 4>(wr, xs, nb, sub, o, grid);
             if (sub == 0)
 #pragma unroll
                 for (int i = 0; i < 4; ++i) dst[(size_t) (e + i) * dst_stride] = o[i];
@@ -710,7 +745,7 @@ __dpct_inline__ void row_entries(const uint8_t* wr, const block_q8_1* x, int x_s
         if (e + 2 <= e1) {
             const block_q8_1* xs[2] = {x + (size_t) ent_idx[e] * x_stride, x + (size_t) ent_idx[e + 1] * x_stride};
             float o[2];
-            row_dot_multi<TY, LANES, 2>(wr, xs, nb, sub, o);
+            row_dot_multi<TY, LANES, 2>(wr, xs, nb, sub, o, grid);
             if (sub == 0) { dst[(size_t) e * dst_stride] = o[0]; dst[(size_t) (e + 1) * dst_stride] = o[1]; }
             e += 2;
         }
@@ -731,7 +766,22 @@ __dpct_inline__ void native_gu_kernel(
     NativeExpertLayout L, float *__restrict__ gate, float *__restrict__ up) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int g = item_ct1.get_group(1);
-    if (g >= *n_groups) return;
+    if (g >= *n_groups) return;   // uniform over the work-group: before the barrier below is fine
+    const void* grid = nullptr;
+#if STRATA_GRID_SLM
+    if constexpr (TG == 18 || TG == 21 || TG == 22) {
+        using GT = std::conditional_t<TG == 22, uint64_t, uint32_t>;
+        constexpr int GN = TG == 22 ? 1024 : TG == 21 ? 512 : 256;
+        auto& sg = *sycl::ext::oneapi::group_local_memory_for_overwrite<GT[GN]>(item_ct1.get_group());
+        for (int i = (int) item_ct1.get_local_id(2); i < GN; i += (int) item_ct1.get_local_range(2)) {
+            if constexpr (TG == 22) sg[i] = iq2s_grid[i];
+            else if constexpr (TG == 21) sg[i] = iq3s_grid[i];
+            else sg[i] = iq3xxs_grid[i];
+        }
+        item_ct1.barrier(sycl::access::fence_space::local_space);
+        grid = &sg[0];
+    }
+#endif
     const int rib = item_ct1.get_local_id(2) / kExpertLanes,
               sub = item_ct1.get_local_id(2) % kExpertLanes;
     const int row = item_ct1.get_group(2) * kExpertRows + rib; // 0 .. 2*n_ff
@@ -742,7 +792,7 @@ __dpct_inline__ void native_gu_kernel(
     const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
     const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    row_entries<TG, kExpertLanes>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff);
+    row_entries<TG, kExpertLanes>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff, grid);
 }
 
 __dpct_inline__ void swiglu_entries_kernel(const float *__restrict__ gate,

From 381373c3c7bde5fb1cbc62d339cce0f5415789f5 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 04:23:15 -0500
Subject: [PATCH 045/201] docs/INTEL.md: re-measured on the current build, long
 contexts included

Summary 77.9 tok/s (19-token prompt) / 74.2 after 2,184 tokens; long
contexts with setup's KV streaming: 66.1 tok/s decode after 128K, 54.1
after 256K (all experts in VRAM). The 'not re-measured' caveat is gone.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 47 ++++++++++++++++++++++-------------------------
 1 file changed, 22 insertions(+), 25 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 91113229a39..7ca4fd83242 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -19,15 +19,15 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **76.1 tok/s** (19-token prompt, 256 greedy tokens), 63.6 after a 2,184-token prompt (before the IQ4_NL change); ~56 through the API on a chat request | 23-25 tok/s |
-| prompt reading | ~1,870 tok/s | **799 tok/s** at 2,184 tokens, 1,062 at 80K | ~150 tok/s (424 at 105K) |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **77.9 tok/s** (19-token prompt, 256 greedy tokens), **74.2** after a 2,184-token prompt, **66.1** after 128K, 54.1 after 256K | 23-25 tok/s |
+| prompt reading | ~1,870 tok/s | **787 tok/s** at 2,184 tokens, 856 at 128K, 740 at 256K | ~150 tok/s (424 at 105K) |
 | speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
 | images | yes | not yet | not yet |
-| context | up to 262K | 256K measured (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
+| context | up to 262K | 256K measured, 54 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
-on the text"). The SYCL numbers are greedy runs of the engine test rig on the final 2026-09-30 build (commit
-ccdae3e); "Decode round 2" below lists what each change bought.
+on the text"). The SYCL numbers are greedy runs of the engine test rig on the 2026-10-01 build (commit 6b0d7a9);
+"Decode round 2" below lists what each change bought.
 
 ## Setup
 
@@ -295,25 +295,21 @@ output tokens between paths, never only timings.
   It costs ~1 s on short prompts (2,184 tokens: 610 vs 792 tok/s), so the port borrows by default only above a
   32K context (`--prefill-borrow` / `--no-prefill-borrow` decide explicitly).
 
-**Long contexts by KV type (2026-09-30, borrowing on, `--vram-reserve-mib 2048 --prefill 4096`).** Same text
-repeated to length, 64 greedy tokens after it:
+**Long contexts (2026-10-01, the current build, setup's flags: `--kv-resident 32768 --vram-reserve-mib 2048
+--prefill 4096`, prompt-slot borrowing on).** Same text repeated to length, then 256 greedy tokens:
 
 | context | KV | prompt | decode after | peak VRAM | experts in VRAM (of 12,288) |
 |---|---|---|---|---|---|
-| 128K | int8 | 960 tok/s | 8.5 tok/s | 30.9 GB | 12,002 |
-| 128K | q4_0 | 951 tok/s | 32.7 tok/s | 30.4 GB | 12,288 |
-| 128K | k8v4 | 983 tok/s | 23.4 tok/s | 30.7 GB | 12,241 |
-| 256K | q4_0 | 778 tok/s | 5.0 tok/s | 30.9 GB | 11,814 |
-| 256K | k8v4 | 752 tok/s | 3.8 tok/s | 30.7 GB | 11,294 |
-| 256K | int8 | 718 tok/s | 3.7 tok/s | 30.7 GB | 10,923 |
-
-(Measured before the 2026-09-30 decode work in "Decode round 2"; decode after a long prompt is higher now, not
-re-measured.) Every configuration completes and answers coherently; decode after the prompt is set by how many
-experts the KV leaves room for. **KV streaming fixes it** (`--kv-resident 32768`: the whole KV in pinned host memory, only the
-attended window in VRAM): every expert stays in VRAM and decode after the prompt is 38.7 tok/s at 128K int8
-(from 8.5), 35.3 at 128K q4_0, 31.3 at 256K int8 (from 3.7) and 31.5 at 256K q4_0 (from 5.0); the prompt pays
-5-13% (725-860 tok/s). setup.py turns it on from 64K up for the SYCL engine and keeps INT8. k8v4 works through the FP32 attention fallback; its dedicated
-prompt kernel is the XMX one below.
+| 128K | int8 | 856 tok/s (150 s) | **66.1 tok/s** | 29.9 GB | 12,288 |
+| 128K | q4_0 | 834 tok/s (153 s) | 62.4 tok/s | 29.7 GB | 12,288 |
+| 256K | int8 | 740 tok/s (346 s) | **54.1 tok/s** | 30.2 GB | 12,288 |
+| 256K | q4_0 | 726 tok/s (353 s) | 52.5 tok/s | 29.9 GB | 12,288 |
+
+KV streaming (`--kv-resident`) keeps the whole KV in pinned host memory and only the attended window in VRAM, so
+every expert stays on the card at any context; setup.py turns it on from 64K up and keeps INT8 (the faster of the
+two at every size here). Without it the KV pushes experts out and decode after the prompt fell to 4-9 tok/s at
+128K-256K (2026-09-30). `--kv k8v4` does not support streaming yet: setup keeps its KV in VRAM, and it works through
+the FP32 attention fallback (its dedicated prompt kernel is the XMX one below).
 
 **XMX prompt attention v2.** 64-cell chunks, vector-packed K^T and V, hi+lo Q in one accumulator per scale group,
 one accumulator update per chunk: 1.4-1.5x faster than v1 and correct in all modes (`qsa_prompt_attn_parity`,
@@ -406,7 +402,8 @@ runtime's teardown began); it now exits directly once its requests are done.
 | + wide 16-byte-load kernels for Q4_K, Q5_K, IQ4_XS (codebook in registers) | 62.6 |
 | + wide kernels for Q8_0 (MTP dense, shexp down of layer 0) and IQ4_NL (shexp down); Q6_K's activation loads aligned | 65.6 |
 | + the GR down projection sliced by columns (each group stages one 128-column slice of xn, 4 lanes per row) + a fixed-order reduce | 70.6 |
-| + IQ4_NL expert dots (the down projection in 39 of 48 layers): codebook in registers, weights as aligned 4-byte loads, bitwise the same ints (2026-10-01) | **76.1** |
+| + IQ4_NL expert dots (the down projection in 39 of 48 layers): codebook in registers, weights as aligned 4-byte loads, bitwise the same ints (2026-10-01) | 76.1 |
+| + GR norm per (token, stream), bitwise the same; aligned weight loads in the IQ3_XXS/IQ3_S/IQ2_S gate/up dots | **77.9** |
 
 The last step changes the output: identical for 146 tokens, then a near-tie after a comma goes the other way (the new
 kernels sum in a different order). Q8_0 kernels 4-6x (189 -> 31 us at 2560 x 10240, 2 columns), IQ4_NL 640 -> 2560
@@ -469,12 +466,12 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 - Speculative decoding on the llama.cpp path (the GGUF carries no draft layer llama.cpp can use). The SYCL
   port has it (MTP draft layer, `--mtp`).
 
-## Measured, 2026-09-30, Arc Pro B70, Coder IQ1_M, 32K context, INT8 KV: the SYCL port
+## Measured, 2026-10-01, Arc Pro B70, Coder IQ1_M, 32K context, INT8 KV: the SYCL port
 
 | | |
 |---|---|
-| decode | 76.1 tok/s on a 19-token prompt (2026-10-01); 63.6 after a 2,184-token prompt before the IQ4_NL change (256 greedy tokens, MTP + suffix drafts) |
-| prompt | 799 tok/s on 2,184 tokens |
+| decode | 77.9 tok/s on a 19-token prompt, 74.2 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
+| prompt | 787 tok/s on 2,184 tokens; 856 tok/s at 128K, 740 at 256K |
 | through the API | 55.7 tok/s on a 300-token chat answer, prompt included |
 | VRAM | all 12,288 experts resident, ~1.9 GB free with everything loaded (`--vram-reserve-mib 1024`) |
 | RAM | no host copy of the experts (`--stream-experts`) |

From 6e6ca04c284b9e0d4f66cd364f4c71199c4de9b1 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 04:52:51 -0500
Subject: [PATCH 046/201] docs/INTEL.md: k8v4 long-context rows and the API
 figure on the current build

k8v4 (KV in VRAM, no streaming): 995 tok/s prompt / 65.8 decode at 128K,
804 / 51.2 at 256K with 994 experts served from the host mirror.
API: 48-72 tok/s on a short chat answer, prompt included.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 7ca4fd83242..8a74eff1e10 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -19,7 +19,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **77.9 tok/s** (19-token prompt, 256 greedy tokens), **74.2** after a 2,184-token prompt, **66.1** after 128K, 54.1 after 256K | 23-25 tok/s |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **77.9 tok/s** (19-token prompt, 256 greedy tokens), **74.2** after a 2,184-token prompt, **66.1** after 128K, 54.1 after 256K; 48-72 through the API | 23-25 tok/s |
 | prompt reading | ~1,870 tok/s | **787 tok/s** at 2,184 tokens, 856 at 128K, 740 at 256K | ~150 tok/s (424 at 105K) |
 | speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
 | images | yes | not yet | not yet |
@@ -304,12 +304,16 @@ output tokens between paths, never only timings.
 | 128K | q4_0 | 834 tok/s (153 s) | 62.4 tok/s | 29.7 GB | 12,288 |
 | 256K | int8 | 740 tok/s (346 s) | **54.1 tok/s** | 30.2 GB | 12,288 |
 | 256K | q4_0 | 726 tok/s (353 s) | 52.5 tok/s | 29.9 GB | 12,288 |
+| 128K | k8v4, KV in VRAM | **995 tok/s** (129 s) | 65.8 tok/s | 30.7 GB | 12,241 (47 in the host mirror) |
+| 256K | k8v4, KV in VRAM | **804 tok/s** (318 s) | 51.2 tok/s | 30.6 GB | 11,294 (994, 1.9 GB, in the host mirror) |
 
 KV streaming (`--kv-resident`) keeps the whole KV in pinned host memory and only the attended window in VRAM, so
 every expert stays on the card at any context; setup.py turns it on from 64K up and keeps INT8 (the faster of the
 two at every size here). Without it the KV pushes experts out and decode after the prompt fell to 4-9 tok/s at
-128K-256K (2026-09-30). `--kv k8v4` does not support streaming yet: setup keeps its KV in VRAM, and it works through
-the FP32 attention fallback (its dedicated prompt kernel is the XMX one below).
+128K-256K (2026-09-30). `--kv k8v4` does not support streaming yet: setup keeps its KV in VRAM, which pushes up to
+~1,000 experts out at 256K; those come from the pinned host mirror over PCIe (planned item 2), so decode holds at
+51 tok/s (it was 3.8 before the mirror). k8v4 reads prompts fastest (no streaming copies) and works through the FP32
+attention fallback (its dedicated prompt kernel is the XMX one below).
 
 **XMX prompt attention v2.** 64-cell chunks, vector-packed K^T and V, hi+lo Q in one accumulator per scale group,
 one accumulator update per chunk: 1.4-1.5x faster than v1 and correct in all modes (`qsa_prompt_attn_parity`,
@@ -340,8 +344,9 @@ attached (paths in the config's `args` are the container's, the data root mounte
 ```
 
 Measured through the OpenAI API with those sampling defaults: 36 tok/s decode on a first turn, 33 on a follow-up
-(which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. After the 2026-09-30
-decode work: 55.7 tok/s on a 300-token answer (prompt included), 55-59 tok/s over 5,000-18,000-token answers. The reserve matters:
+(which reuses the conversation's cached prompt), against 24-26 for llama.cpp on the same card. After the decode work
+(2026-10-01 build): 48-72 tok/s on a ~190-token answer, prompt included (the first request after a start is the slower
+one); 55-59 tok/s over 5,000-18,000-token answers on the 2026-09-30 build. The reserve matters:
 with `--stream-experts` there is no host copy of the experts, so any expert left out of VRAM is read from the SSD
 and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
 5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free.
@@ -472,7 +477,7 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 |---|---|
 | decode | 77.9 tok/s on a 19-token prompt, 74.2 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
 | prompt | 787 tok/s on 2,184 tokens; 856 tok/s at 128K, 740 at 256K |
-| through the API | 55.7 tok/s on a 300-token chat answer, prompt included |
+| through the API | 48-72 tok/s on a ~190-token chat answer, prompt included (the first request after a start is the slower one) |
 | VRAM | all 12,288 experts resident, ~1.9 GB free with everything loaded (`--vram-reserve-mib 1024`) |
 | RAM | no host copy of the experts (`--stream-experts`) |
 

From d9ebe6e7d4543b5d7b30b53d2015f7160d54a928 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 06:07:55 -0500
Subject: [PATCH 047/201] docs/INTEL.md: the original Qwen3.8-Flash-Next IQ2_XS
 runs on the B70 (51-61 tok/s)

6,247 of its 24,576 experts live in the pinned host mirror (8.4 GiB) and
are read over PCIe by the device plan; RAM stays above 12 GB free.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 8a74eff1e10..a1b3791fe44 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -16,6 +16,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
 | | NVIDIA (Strata engine) | Intel Arc, Strata SYCL port | Intel Arc, llama.cpp |
 |---|---|---|---|
+| models | all four | the Coder IQ1_M; the original IQ2_XS too (experts beyond VRAM in the host mirror: 51-61 tok/s) | the Coder (fits VRAM) |
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
@@ -436,6 +437,12 @@ first decode round, so it is a once-per-process cost, not lost throughput. Ruled
    mirror the device plan reads over PCIe (item 2). The port has the IQ2_XS/IQ3_XXS/Q2_0 expert kernels. Open: whether
    a 10+ GB pinned mirror fits beside everything else in 23 GB, and decode with that share of experts on a Gen3 x8
    link (3.6 GB mirrored measured 40.9 tok/s; expect less). Needs the 68 GB download.
+   **Done (2026-10-01)**: shard 1 downloaded (39.2 GB; shard 2 is byte-identical to the Coder's, so a hard link),
+   a native pack (`tools/iq_pack.py`, 6 s), the original model's expert profile, the same MTP draft layer. 18,329 of
+   24,576 experts in VRAM (24.6 GiB), 6,247 in the pinned host mirror (8.4 GiB, 9 s to fill), host RAM never below
+   12 GB free. **Decode 50.8 tok/s** on the 19-token prompt and **60.6** after 2,184 tokens, prompt 549 tok/s;
+   coherent, correct answers on both. Q2_0 and Swift 1.5 (similar size) should behave the same; IQ3_XXS/IQ3_S
+   (43-50 GB of experts) would need 19-26 GB mirrored, more than 23 GB of RAM allows.
 
 **Keeping up with upstream.** A merge of upstream `main` into `b70` leaves the copies in `sycl/` behind
 wherever upstream touched a file they mirror. They are refreshed by re-migration, not by hand (done for

From 717e7e891a5a1ff477309d3e59eaa2d31b62277e Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 06:55:20 -0500
Subject: [PATCH 048/201] serve: Intel Arc readings in the Monitor tab; a model
 menu for hosts that swap models

- telemetry: on an Intel Arc (xe) the GPU readings come from a root
  sampler's /run/gpustat.json (load, VRAM: xe exposes them to root only)
  and sysfs (temperature, power, cap, the PCIe link the card trained at,
  capped by the slot). NVML stays first; nothing changes on NVIDIA.
- a run config may name a model_switcher RPC (one model at a time on a
  shared GPU): GET/POST /switcher report and request a swap, and the web
  app shows a Model menu with the models served on this port; it waits
  for /health to name the new model, then reloads. setup.py keeps the
  setting when it rewrites a config.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 serve/server.py      |  34 +++++++++++++++
 serve/telemetry.py   | 100 ++++++++++++++++++++++++++++++++++++++++++-
 serve/web/app.css    |   7 +++
 serve/web/app.js     |  55 +++++++++++++++++++++++-
 serve/web/index.html |   5 +++
 setup.py             |   3 ++
 6 files changed, 201 insertions(+), 3 deletions(-)

diff --git a/serve/server.py b/serve/server.py
index f51fc174bca..4dbf76c06fc 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -562,6 +562,28 @@ def push(self, t: int) -> str:
         return delta
 
 
+def model_switcher(svc, mode: str = "") -> dict:
+    """The host's model swapper (config `model_switcher`, an RPC taking {"mode": m}): the models it serves on THIS
+    port, which one holds the card, whether one is loading. With `mode`, asks for that one first; this server is
+    then usually the one stopped, so the web app waits for /health to name the new model."""
+    url = getattr(svc, "switcher", None)
+    if not url:
+        return {"enabled": False}
+    try:
+        body = json.dumps({"mode": mode} if mode else {}).encode()
+        req = urllib.request.Request(url, body, {"Content-Type": "application/json"})
+        with urllib.request.urlopen(req, timeout=10) as r:
+            res = json.load(r)
+        st = res.get("result", res)
+    except (OSError, ValueError) as e:
+        return {"enabled": True, "error": f"the model switcher did not answer ({e})"}
+    port = f":{getattr(svc, 'port', '')}"
+    urls = st.get("urls") or {}
+    mine = {k: v for k, v in (st.get("choices") or {}).items() if not urls or str(urls.get(k, "")).endswith(port)}
+    return {"enabled": True, "mode": st.get("mode"), "up": st.get("up"), "starting": st.get("starting"),
+            "choices": mine, "model": svc.model}
+
+
 class Service:
     def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name: str = "qwen3.8-flash-next",
                  vision: Vision | None = None, sampling_defaults: dict | None = None,
@@ -1316,6 +1338,10 @@ def do_GET(self):
                 if self._authorized():
                     self._json(200, {"shared": bool(svc.shared), "defaults": svc.shared})
                 return
+            if path == "/switcher":
+                if self._authorized():
+                    self._json(200, model_switcher(svc))
+                return
             if path == "/mcp":
                 # the MCP servers, their state and tools (the web app's switch and Monitor card)
                 if self._authorized():
@@ -1376,6 +1402,10 @@ def do_POST(self):
             if path == "/settings":
                 self._settings()
                 return
+            if path == "/switcher":                     # the web app's model menu: ask the host to swap models
+                req = json.loads(self.rfile.read(int(self.headers.get("Content-Length", 0))) or b"{}")
+                self._json(200, model_switcher(svc, str(req.get("mode") or "")))
+                return
             try:
                 req = json.loads(self.rfile.read(int(self.headers.get("Content-Length", 0))) or b"{}")
                 if path in ("/v1/chat/completions", "/v1/messages"):   # who asked: a later "disconnect" names its client
@@ -1780,6 +1810,10 @@ def main() -> int:
               file=sys.stderr)
         return 2
     svc.api_key = a.api_key or cfg.get("api_key", "")
+    # A host that runs one model at a time and swaps them (a GPU shared with other work) can name the RPC that does
+    # the swap: the web app then offers the models served on this port. {"mode": m} switches, {} only reports.
+    svc.switcher = cfg.get("model_switcher") or None
+    svc.port = a.port
     svc.gpu_index = (gpu_list(cfg) or [0])[0]           # the Monitor reads the card the engine runs on (issue #51)
     svc.gpu_indices = gpu_list(cfg)                     # ... or every card of a layer split (issue #112)
     if a.config:                                        # the Chat settings shared with other apps, from last time
diff --git a/serve/telemetry.py b/serve/telemetry.py
index 6cfd0e3be44..640792cc263 100644
--- a/serve/telemetry.py
+++ b/serve/telemetry.py
@@ -2,7 +2,9 @@
 
 A background thread samples once a second and keeps the last 60 readings of each series for the sparklines:
 - GPU: NVIDIA's own NVML library (nvml.dll / libnvidia-ml.so.1, installed with every driver) through ctypes, so no
-  pip package is needed: load, VRAM, temperature, power, PCIe link and throughput.
+  pip package is needed: load, VRAM, temperature, power, PCIe link and throughput.  On an Intel Arc (xe driver) the
+  same readings come from a root sampler's /run/gpustat.json when one runs (load and VRAM need root: per-client
+  fdinfo), else from sysfs directly (temperature, power, PCIe link).
 - CPU, RAM, disk: `psutil` when it is installed (setup installs it); without it the CPU and RAM readings fall back to
   the OS (Windows GlobalMemoryStatusEx / GetSystemTimes, Linux /proc) and the disk rate is absent.
 Anything that cannot be read is None; nothing here can stop the server.
@@ -103,6 +105,98 @@ def read(self):
         return out
 
 
+# ------------------------------------------------------------------------------------------------ Intel Arc (xe)
+class _XeGpu:
+    """The Intel Arc readings in NVML's shape. Load and VRAM come from /run/gpustat.json (a root sampler: the only
+    VRAM accounting xe exposes is per-client fdinfo, readable by root only); temperature, power and the PCIe link are
+    read from sysfs too, so they show without the sampler."""
+    STAT = "/run/gpustat.json"
+
+    def __init__(self):
+        import glob
+        self.dev = None
+        for d in sorted(glob.glob("/sys/class/drm/card[0-9]*/device")):
+            try:
+                if open(f"{d}/vendor").read().strip() == "0x8086" and os.path.isdir(f"{d}/tile0"):
+                    self.dev = os.path.realpath(d)
+                    break
+            except OSError:
+                continue
+        self.hwmon = None
+        for n in glob.glob(f"{self.dev}/hwmon/hwmon*/name") if self.dev else []:
+            self.hwmon = os.path.dirname(n)
+        self._e = None                          # (t, card energy uJ) for power without the sampler
+
+    def ok(self):
+        return self.dev is not None and sys.platform.startswith("linux")
+
+    def name(self):
+        st = self._stat()
+        return (st or {}).get("name") or "Intel Arc GPU"
+
+    def _stat(self):
+        try:
+            import json
+            with open(self.STAT) as f:
+                st = json.load(f)
+            return st if time.time() - float(st.get("ts", 0)) < 15 else None
+        except (OSError, ValueError):
+            return None
+
+    def _rd(self, p):
+        try:
+            return open(p).read().strip()
+        except OSError:
+            return None
+
+    def _link(self):
+        """The link the card trained at: its own functions sit behind an internal x1 switch, so the first port up
+        the path wider than x1; the max is what card AND slot allow (the root port caps it)."""
+        gen = {"2.5": 1, "5.0": 2, "8.0": 3, "16.0": 4, "32.0": 5, "64.0": 6}
+        d, chain = self.dev, []
+        while d and d.startswith("/sys/devices/pci") and os.path.exists(f"{d}/current_link_speed"):
+            chain.append(d)
+            d = os.path.dirname(d)
+        for p in chain:
+            w = int(self._rd(f"{p}/current_link_width") or 0)
+            if w > 1:
+                g = lambda q, k: gen.get((self._rd(f"{q}/{k}_link_speed") or "").split(" ")[0])
+                card, slot = g(p, "max"), g(chain[-1], "max")
+                return g(p, "current"), min(x for x in (card, slot) if x) if (card or slot) else None, w
+        return None, None, None
+
+    def read(self):
+        out = {}
+        st = self._stat()
+        if st:
+            out["util"] = st.get("busy_pct")
+            if st.get("vram_used_mb") is not None:
+                out["mem_used"] = st["vram_used_mb"] * 2**20
+                out["mem_total"] = st.get("vram_total_mb", 0) * 2**20 or None
+            out["temp"] = st.get("temp_pkg")
+            out["power"] = st.get("power_w")
+            out["power_limit"] = st.get("power_cap_w")
+            out["vram_temp"] = st.get("temp_vram_max") or st.get("temp_vram")
+        if self.hwmon:
+            if out.get("temp") is None:
+                for lab in os.listdir(self.hwmon):
+                    if lab.endswith("_label") and self._rd(f"{self.hwmon}/{lab}") == "pkg":
+                        v = self._rd(f"{self.hwmon}/{lab[:-6]}_input")
+                        out["temp"] = int(v) / 1000 if v else None
+            if out.get("power") is None:
+                e, t = self._rd(f"{self.hwmon}/energy1_input"), time.time()
+                if e and e.isdigit():
+                    if self._e and t > self._e[0] and int(e) >= self._e[1]:
+                        out["power"] = (int(e) - self._e[1]) / 1e6 / (t - self._e[0])
+                    self._e = (t, int(e))
+            if out.get("power_limit") is None:
+                cap = self._rd(f"{self.hwmon}/power1_cap")
+                out["power_limit"] = int(cap) / 1e6 if cap and cap.isdigit() and int(cap) > 0 else None
+        out["pcie_gen"], out["pcie_gen_max"], out["pcie_width"] = self._link()
+        out["pcie_rx_mb"] = out["pcie_tx_mb"] = None    # xe exposes no PCIe traffic counters
+        return out
+
+
 # ------------------------------------------------------------------------------------------------ CPU / RAM
 def _cpu_name():
     if os.name == "nt":
@@ -181,6 +275,10 @@ def __init__(self, extra=None, gpu_index=0, gpu_indices=None):
         idx = list(gpu_indices) if gpu_indices and len(gpu_indices) > 1 else [gpu_index]
         self.gpus = [(i, _Nvml(i)) for i in idx]
         self.gpus = [(i, g) for i, g in self.gpus if g.ok()] or self.gpus[:1]
+        if not self.gpus[0][1].ok():           # no NVIDIA card: an Intel Arc on the xe driver?
+            xe = _XeGpu()
+            if xe.ok():
+                self.gpus = [(0, xe)]
         self.gpu = self.gpus[0][1]
         try:
             import psutil  # noqa: F401
diff --git a/serve/web/app.css b/serve/web/app.css
index 4e8363d4a6c..77ff60beb02 100644
--- a/serve/web/app.css
+++ b/serve/web/app.css
@@ -168,3 +168,10 @@ main { flex: 1; min-height: 0; display: flex; }
   .facts { grid-template-columns: 1fr; gap: 2px; }
   .facts dd { margin-bottom: var(--st-s-2); }
 }
+/* the model menu (a host that swaps models: config model_switcher) */
+.model-switch{display:flex;align-items:center;gap:var(--st-s-2);font-size:var(--st-fs-sm);color:var(--st-ink-muted)}
+.model-switch[hidden]{display:none}
+.model-switch select{font:inherit;color:var(--st-ink);background:var(--st-surface-2);border:1px solid var(--st-line);
+  border-radius:var(--st-r-md);padding:4px 8px;max-width:340px}
+.model-switch select:focus{outline:2px solid var(--st-focus);outline-offset:1px}
+@media (max-width:640px){.model-switch__k{display:none}.model-switch select{max-width:150px}}
diff --git a/serve/web/app.js b/serve/web/app.js
index 6e8fa6b293a..eb501612be5 100644
--- a/serve/web/app.js
+++ b/serve/web/app.js
@@ -107,6 +107,55 @@ async function loadHealth() {
   }
 }
 
+// ------------------------------------------------------------------ the model menu
+// A host that swaps models on one GPU (config model_switcher): this page offers the ones served here. Switching
+// stops THIS server and starts the other on the same port, so the page waits for /health to name the new model.
+let switching = null;
+async function loadSwitcher() {
+  let sw;
+  try { sw = await (await fetch("switcher", {headers: headers()})).json(); } catch (e) { return; }
+  const keys = Object.keys(sw.choices || {});
+  if (!sw.enabled || sw.error || keys.length < 2) { $("model-switch").hidden = true; return; }
+  const sel = $("model-select");
+  sel.replaceChildren(...keys.map((k) => {
+    const o = document.createElement("option");
+    o.value = k;
+    o.textContent = sw.choices[k].replace(/ \(Strata SYCL engine\)$/, "");
+    o.selected = k === (sw.starting || sw.mode);
+    return o;
+  }));
+  sel.disabled = !!sw.starting || !!switching;
+  $("model-switch").hidden = false;
+  if (sw.starting && !switching) setPill("reading", `Loading ${sw.choices[sw.starting] || sw.starting}…`);
+}
+$("model-select").onchange = async () => {
+  const mode = $("model-select").value, name = $("model-select").selectedOptions[0].textContent;
+  if (!confirm(`Load ${name}? The current model is unloaded first; it takes about 2 minutes and stops any answer in progress.`)) {
+    loadSwitcher();
+    return;
+  }
+  switching = {mode, from: health.model, t0: Date.now()};
+  $("model-select").disabled = true;
+  setPill("reading", `Switching to ${name}… (about 2 minutes)`, true);
+  try {
+    await fetch("switcher", {method: "POST", headers: headers(true), body: JSON.stringify({mode})});
+  } catch (e) { /* this server may already be going down */ }
+  const wait = async () => {
+    try {
+      const h = await (await fetch("health", {cache: "no-store"})).json();
+      if (h.model && h.model !== switching.from) { location.reload(); return; }
+    } catch (e) { /* down while the models swap */ }
+    if (Date.now() - switching.t0 > 6 * 60 * 1000) {
+      setPill("error", `${name} did not come up in 6 minutes`, true);
+      switching = null;
+      return;
+    }
+    setPill("reading", `Switching to ${name}… ${Math.round((Date.now() - switching.t0) / 1000)} s`, true);
+    setTimeout(wait, 3000);
+  };
+  setTimeout(wait, 5000);
+};
+
 // ------------------------------------------------------------------ Monitor
 const METRICS = [
   {key: "speed", label: "Speed", icon: "gauge", unit: "t/s", series: "tok_s"},
@@ -171,7 +220,8 @@ async function poll() {
   setTimeout(poll, 1000);
 }
 
-function setPill(state, text) {
+function setPill(state, text, force = false) {
+  if (switching && !force) return;   // while the models swap, the menu owns the pill
   $("pill").dataset.state = state === "error" ? "queued" : state;
   $("pill-text").textContent = text;
 }
@@ -975,6 +1025,7 @@ setBusy(false);
 renderChat();
 const startQuestion = new URLSearchParams(location.search).get("q");   // /?q=... starts a chat (a shortcut)
 if (startQuestion) history.replaceState(null, "", location.pathname + location.hash);
-loadHealth().then(loadMcp).then(() => { if (startQuestion) { $("input").value = startQuestion; send(); } });
+loadHealth().then(loadSwitcher).then(loadMcp).then(() => { if (startQuestion) { $("input").value = startQuestion; send(); } });
 showTab(location.hash.slice(1) || "chat");
 poll();
+setInterval(() => { if (!switching) loadSwitcher(); }, 15000);   // a switch started elsewhere shows here too
diff --git a/serve/web/index.html b/serve/web/index.html
index d858d2f08ab..c4ecf325b3c 100644
--- a/serve/web/index.html
+++ b/serve/web/index.html
@@ -19,6 +19,11 @@
 <body>
 <header class="st-header">
   <span class="st-header__brand">Strata</span>
+  <!-- the model on the GPU, when the host swaps models (config model_switcher); hidden otherwise -->
+  <label class="model-switch" id="model-switch" hidden title="Which model is loaded. Only one fits on the GPU at a time: switching unloads this one and loads the other (about 2 minutes).">
+    <span class="model-switch__k">Model</span>
+    <select id="model-select" aria-label="Model on the GPU"></select>
+  </label>
   <nav class="st-tabs" role="tablist" aria-label="Views">
     <button class="st-tab" role="tab" id="tab-btn-chat" aria-controls="view-chat" aria-selected="true" data-tab="chat">
       <svg class="st-icon st-icon--sm"><use href="web/sprite.svg#i-chat"/></svg>Chat</button>
diff --git a/setup.py b/setup.py
index 194f797e406..c0431365dfb 100644
--- a/setup.py
+++ b/setup.py
@@ -2311,6 +2311,9 @@ def main() -> int:
         if old.get("sampling") and "sampling" not in cfg:
             cfg["sampling"] = old["sampling"]
             ok("kept the sampling defaults of the earlier config: " + ", ".join(f"{k}={v}" for k, v in old["sampling"].items()))
+        if old.get("model_switcher") and "model_switcher" not in cfg:   # the web app's model menu (a host swapping models)
+            cfg["model_switcher"] = old["model_switcher"]
+            ok("kept the model switcher of the earlier config: " + old["model_switcher"])
     except (OSError, ValueError):
         pass
     cal = None if backend in ("llama", "sycl") or hip else saved_calibration(cfg)   # tools/calibrate.py is NVIDIA-only for now

From 8bbefacb3c6224cf725a76ff6128160f1a5895fd Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 07:15:36 -0500
Subject: [PATCH 049/201] PR hygiene: licenses for the vendored code, a generic
 Intel GPU sampler, no generated files

- sycl/include/dpct/LICENSE.TXT: the SYCLomatic helper headers' license
  (Apache-2.0 WITH LLVM-exception; their SPDX notices already name it)
- sycl/third_party/ggml/LICENSE: ggml's MIT notice beside the migrated copy
- tools/intel/gpustat.py + gpustat.service: the root sampler the Monitor
  tab reads load and VRAM from on xe (finds the card, sizes VRAM from its
  BAR; GPUSTAT_PCI / GPUSTAT_VRAM_MB override)
- dpct reports and .yaml sidecars removed and ignored
- docs/INTEL.md: no references to a private test rig; the sampler and the
  model_switcher setting documented

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 .gitignore                               |   4 +
 docs/INTEL.md                            |  14 +-
 sycl/dpct_report.apis.csv                | 167 --------
 sycl/dpct_report.stats.csv               | 101 -----
 sycl/include/dpct/LICENSE.TXT            | 236 ++++++++++++
 sycl/third_party/ggml/LICENSE            |  21 +
 sycl/third_party/ggml/ggml-common.h.yaml | 468 -----------------------
 tools/intel/gpustat.py                   | 182 +++++++++
 tools/intel/gpustat.service              |  10 +
 9 files changed, 464 insertions(+), 739 deletions(-)
 delete mode 100644 sycl/dpct_report.apis.csv
 delete mode 100644 sycl/dpct_report.stats.csv
 create mode 100644 sycl/include/dpct/LICENSE.TXT
 create mode 100644 sycl/third_party/ggml/LICENSE
 delete mode 100644 sycl/third_party/ggml/ggml-common.h.yaml
 create mode 100644 tools/intel/gpustat.py
 create mode 100644 tools/intel/gpustat.service

diff --git a/.gitignore b/.gitignore
index 5c0aab26029..ae7124c6047 100644
--- a/.gitignore
+++ b/.gitignore
@@ -56,3 +56,7 @@ build-vision.bat
 /compile_commands.json
 /sycl-migrate.log
 /sycl/migrate.log
+
+# SYCL port: dpct output that is not part of the port
+sycl/dpct_report.*
+sycl/**/*.yaml
diff --git a/docs/INTEL.md b/docs/INTEL.md
index a1b3791fe44..00a63a397fd 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -27,7 +27,8 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 | context | up to 262K | 256K measured, 54 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
-on the text"). The SYCL numbers are greedy runs of the engine test rig on the 2026-10-01 build (commit 6b0d7a9);
+on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
+tokens) on the 2026-10-01 build;
 "Decode round 2" below lists what each change bought.
 
 ## Setup
@@ -193,7 +194,8 @@ under the same flags.
 Without AOT the runtime JIT-compiles every kernel on first use, ~47 s the first time a process runs;
 `SYCL_CACHE_PERSISTENT=1 SYCL_CACHE_DIR=<dir>` keeps that across runs (15 MB).
 
-How to run it (all of this is what `coderiq1/sycl/run-engine-test.sh` does):
+How to run it by hand (a greedy test run, the way every number in this section was measured; inside the
+`strata-sycl-dev` image, AOT build in `build-sycl-aot/`):
 
 ```
 STRATA_VERIFY_DEVICE_PLAN=1 STRATA_VERIFY_NO_HOST=1 \
@@ -352,6 +354,12 @@ with `--stream-experts` there is no host copy of the experts, so any expert left
 and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
 5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free.
 
+**The Monitor tab on Intel.** `serve/telemetry.py` reads the Arc through sysfs (temperature, power and its cap,
+the PCIe link the card trained at) and, for load and VRAM, from `/run/gpustat.json`: xe reports those per client in
+`/proc/*/fdinfo`, which only root can read, so a small root sampler writes them (`tools/intel/gpustat.py`, install
+with its `gpustat.service` as its header says). A run config may also name a `model_switcher` (an RPC taking
+`{"mode": m}`) for a host that swaps models on one card: the web app then shows a Model menu.
+
 `setup.py` writes this config by itself on an Intel card once the SYCL engine is built (`build-sycl-aot/strata`
 and the `strata-sycl-dev` image): a native pack, the MTP draft layer (from an existing `mtp-q2_0.gguf` without the
 5 GB download), the container's paths, the reserve (1,024 MiB up to 32K, 2,048 with 4,096-token chunks above),
@@ -359,7 +367,7 @@ INT8 KV with `--kv-resident 32768` from 64K up (when the RAM holds the KV), and
 config kept. `--intel-engine llama` keeps llama.cpp.
 
 **Speed depends on the text.** Decode with speculative decoding tracks how often the draft layer guesses right.
-The served engine at 32K context: 45-51 tok/s on the rig's test prompt (continuing a Fibonacci function, 77-85%
+The served engine at 32K context: 45-51 tok/s on the test prompt (continuing a Fibonacci function, 77-85%
 of drafts accepted), 30-39 tok/s on a chat answer with prose (55-72%); sampling and the repetition penalty cost
 nothing measurable. The engine used to abort at exit in serve mode (a queue wait in a destructor after the
 runtime's teardown began); it now exits directly once its requests are done.
diff --git a/sycl/dpct_report.apis.csv b/sycl/dpct_report.apis.csv
deleted file mode 100644
index 2f07be623bc..00000000000
--- a/sycl/dpct_report.apis.csv
+++ /dev/null
@@ -1,167 +0,0 @@
- API name, Frequency 
-"_Bool isnan(float __x)",1
-"__half",18
-"__half __float2half(const float a)",4
-"__half __float2half_rn(const float a)",10
-"__half __ushort_as_half(const unsigned short i)",22
-"__half2",27
-"__half2 __floats2half2_rn(const float a,const float b)",3
-"__half2 __halves2half2(const __half a,const __half b)",3
-"__half2 __hsub2(const __half2 a,const __half2 b)",1
-"__half2 make_half2(const __half x,const __half y)",2
-"char4",4
-"const char * cudaGetErrorString(cudaError_t error)",142
-"cublasHandle_t",6
-"cublasStatus_t",1
-"cublasStatus_t cublasCreate_v2(cublasHandle_t * handle)",2
-"cublasStatus_t cublasDestroy_v2(cublasHandle_t handle)",1
-"cublasStatus_t cublasGemmEx(cublasHandle_t handle,cublasOperation_t transa,cublasOperation_t transb,int m,int n,int k,const void * alpha,const void * A,cudaDataType Atype,int lda,const void * B,cudaDataType Btype,int ldb,const void * beta,void * C,cudaDataType Ctype,int ldc,cublasComputeType_t computeType,cublasGemmAlgo_t algo)",2
-"cublasStatus_t cublasSetMathMode(cublasHandle_t handle,cublasMath_t mode)",2
-"cublasStatus_t cublasSetStream_v2(cublasHandle_t handle,cudaStream_t streamId)",2
-"cublasStatus_t cublasSetWorkspace_v2(cublasHandle_t handle,void * workspace,size_t workspaceSizeInBytes)",3
-"cudaDeviceProp",2
-"cudaError_t",113
-"cudaError_t cudaDeviceGetAttribute(int * value,enum cudaDeviceAttr attr,int device)",6
-"cudaError_t cudaDeviceSynchronize()",70
-"cudaError_t cudaDriverGetVersion(int * driverVersion)",1
-"cudaError_t cudaEventCreate(cudaEvent_t * event)",17
-"cudaError_t cudaEventCreateWithFlags(cudaEvent_t * event,unsigned int flags)",9
-"cudaError_t cudaEventDestroy(cudaEvent_t event)",21
-"cudaError_t cudaEventElapsedTime(float * ms,cudaEvent_t start,cudaEvent_t end)",17
-"cudaError_t cudaEventQuery(cudaEvent_t event)",6
-"cudaError_t cudaEventRecord(cudaEvent_t event,cudaStream_t stream)",39
-"cudaError_t cudaEventSynchronize(cudaEvent_t event)",10
-"cudaError_t cudaFree(void * devPtr)",176
-"cudaError_t cudaFreeHost(void * ptr)",32
-"cudaError_t cudaFuncSetAttribute(void (*)(const float *, const float *, const int *, long, long, long, float *) func,enum cudaFuncAttribute attr,int value)",1
-"cudaError_t cudaFuncSetAttribute(void (*)(const float *, const unsigned short *, const unsigned short *, const int *, int, int, int, float *, float *) func,enum cudaFuncAttribute attr,int value)",1
-"cudaError_t cudaFuncSetAttribute(void (*)(const float *, struct strata::kernels::QsaAttnPools, const int *, const int *, int, int, float, float *, int) func,enum cudaFuncAttribute attr,int value)",2
-"cudaError_t cudaFuncSetAttribute(void (*)(struct strata::kernels::(anonymous namespace)::GrMulti) func,enum cudaFuncAttribute attr,int value)",1
-"cudaError_t cudaGetDevice(int * device)",19
-"cudaError_t cudaGetDeviceCount(int * count)",5
-"cudaError_t cudaGetDeviceProperties_v2(struct cudaDeviceProp * prop,int device)",2
-"cudaError_t cudaGetLastError()",89
-"cudaError_t cudaGraphDestroy(cudaGraph_t graph)",11
-"cudaError_t cudaGraphExecDestroy(cudaGraphExec_t graphExec)",14
-"cudaError_t cudaGraphGetNodes(cudaGraph_t graph,cudaGraphNode_t * nodes,size_t * numNodes)",1
-"cudaError_t cudaGraphInstantiate(cudaGraphExec_t * pGraphExec,cudaGraph_t graph,cudaGraphNode_t * pErrorNode,char * pLogBuffer,size_t bufferSize)",5
-"cudaError_t cudaGraphInstantiate(cudaGraphExec_t * pGraphExec,cudaGraph_t graph,unsigned long long flags)",5
-"cudaError_t cudaGraphLaunch(cudaGraphExec_t graphExec,cudaStream_t stream)",21
-"cudaError_t cudaHostAlloc(void ** pHost,size_t size,unsigned int flags)",15
-"cudaError_t cudaHostGetDevicePointer(void ** pDevice,void * pHost,unsigned int flags)",9
-"cudaError_t cudaHostRegister(void * ptr,size_t size,unsigned int flags)",2
-"cudaError_t cudaHostUnregister(void * ptr)",2
-"cudaError_t cudaMalloc(float ** devPtr,size_t size)",130
-"cudaError_t cudaMalloc(int ** devPtr,size_t size)",17
-"cudaError_t cudaMalloc(signed char ** devPtr,size_t size)",1
-"cudaError_t cudaMalloc(unsigned char ** devPtr,size_t size)",22
-"cudaError_t cudaMalloc(unsigned short ** devPtr,size_t size)",26
-"cudaError_t cudaMalloc(void ** devPtr,size_t size)",42
-"cudaError_t cudaMallocHost(void ** ptr,size_t size)",1
-"cudaError_t cudaMemGetInfo(size_t * free,size_t * total)",11
-"cudaError_t cudaMemcpy(void * dst,const void * src,size_t count,enum cudaMemcpyKind kind)",339
-"cudaError_t cudaMemcpy2DAsync(void * dst,size_t dpitch,const void * src,size_t spitch,size_t width,size_t height,enum cudaMemcpyKind kind,cudaStream_t stream)",1
-"cudaError_t cudaMemcpyAsync(void * dst,const void * src,size_t count,enum cudaMemcpyKind kind,cudaStream_t stream)",70
-"cudaError_t cudaMemcpyToSymbol(const float &[256][4] symbol,const void * src,size_t count,size_t offset,enum cudaMemcpyKind kind)",1
-"cudaError_t cudaMemset(void * devPtr,int value,size_t count)",13
-"cudaError_t cudaMemsetAsync(void * devPtr,int value,size_t count,cudaStream_t stream)",22
-"cudaError_t cudaPeekAtLastError()",3
-"cudaError_t cudaRuntimeGetVersion(int * runtimeVersion)",1
-"cudaError_t cudaSetDevice(int device)",11
-"cudaError_t cudaStreamBeginCapture(cudaStream_t stream,enum cudaStreamCaptureMode mode)",10
-"cudaError_t cudaStreamCreate(cudaStream_t * pStream)",11
-"cudaError_t cudaStreamCreateWithFlags(cudaStream_t * pStream,unsigned int flags)",12
-"cudaError_t cudaStreamDestroy(cudaStream_t stream)",17
-"cudaError_t cudaStreamEndCapture(cudaStream_t stream,cudaGraph_t * pGraph)",10
-"cudaError_t cudaStreamQuery(cudaStream_t stream)",2
-"cudaError_t cudaStreamSynchronize(cudaStream_t stream)",57
-"cudaError_t cudaStreamWaitEvent(cudaStream_t stream,cudaEvent_t event,unsigned int flags)",8
-"cudaEvent_t",30
-"cudaStream_t",306
-"dim3",55
-"double __dadd_rn(double __a,double __b)",6
-"double __ddiv_rn(double __a,double __b)",2
-"double __dmul_rn(double __a,double __b)",3
-"double __dsqrt_rn(double __a)",2
-"double __shfl_down_sync(unsigned int __mask,double __val,unsigned int __offset,int __width)",6
-"double __shfl_sync(unsigned int __mask,double __val,int __offset,int __width)",2
-"double __shfl_xor_sync(unsigned int __mask,double __val,int __offset,int __width)",1
-"double exp(double __a)",10
-"double fmax(double __a,double __b)",1
-"double rint(double __a)",1
-"double sqrt(double __a)",2
-"float __expf(float __a)",33
-"float __fadd_rn(float __a,float __b)",29
-"float __fdiv_rn(float __a,float __b)",3
-"float __fdividef(float __a,float __b)",3
-"float __fmaf_rn(float __a,float __b,float __c)",18
-"float __fmul_rn(float __a,float __b)",24
-"float __fsub_rn(float __a,float __b)",1
-"float __half2float(const __half a)",45
-"float __high2float(const __half2 a)",6
-"float __int_as_float(int __a)",21
-"float __ldg(const float * ptr)",2
-"float __low2float(const __half2 a)",29
-"float __shfl_down_sync(unsigned int __mask,float __val,unsigned int __offset,int __width)",16
-"float __shfl_sync(unsigned int __mask,float __val,int __offset,int __width)",2
-"float __shfl_xor_sync(unsigned int __mask,float __val,int __offset,int __width)",51
-"float __uint_as_float(unsigned int __a)",24
-"float cosf(float __a)",4
-"float exp2f(float __a)",4
-"float expf(float __a)",26
-"float fabsf(float __a)",13
-"float fmaf(float __a,float __b,float __c)",63
-"float fmaxf(float __a,float __b)",48
-"float frexpf(float __a,int * __b)",2
-"float ldexpf(float __a,int __b)",4
-"float log1pf(float __a)",5
-"float logf(float __a)",2
-"float max(const float a,const float b)",2
-"float powf(float __a,float __b)",4
-"float roundf(float __a)",2
-"float rsqrtf(float __a)",25
-"float sinf(float __a)",4
-"float sqrtf(float __a)",4
-"float2",23
-"float2 __half22float2(const __half2 a)",16
-"float2 make_float2(float x,float y)",6
-"float4",64
-"float4 make_float4(float x,float y,float z,float w)",6
-"half",15
-"half2",8
-"int __dp4a(int srcA,int srcB,int c)",54
-"int __float2int_rn(float __a)",2
-"int __float2int_rz(float __a)",1
-"int __ldg(const int * ptr)",22
-"int __popc(unsigned int __a)",5
-"int __shfl_down_sync(unsigned int __mask,int __val,unsigned int __offset,int __width)",7
-"int __shfl_up_sync(unsigned int __mask,int __val,unsigned int __offset,int __width)",4
-"int __shfl_xor_sync(unsigned int __mask,int __val,int __offset,int __width)",2
-"int atomicAdd(int * address,int val)",4
-"int atomicCAS(int * address,int compare,int val)",1
-"int max(int __a,int __b)",1
-"int min(int __a,int __b)",7
-"int2",12
-"int2 make_int2(int x,int y)",7
-"long long __shfl_sync(unsigned int __mask,long long __val,int __offset,int __width)",1
-"size_t __cvta_generic_to_shared(const void * p)",1
-"uint2",19
-"uint2 make_uint2(unsigned int x,unsigned int y)",1
-"uint4",50
-"uint4 __ldg(const uint4 * ptr)",12
-"uint4 make_uint4(unsigned int x,unsigned int y,unsigned int z,unsigned int w)",2
-"unsigned int __ballot_sync(unsigned int mask,int pred)",2
-"unsigned int __byte_perm(unsigned int __a,unsigned int __b,unsigned int __c)",22
-"unsigned int __float_as_uint(float __a)",3
-"unsigned int __umulhi(unsigned int __a,unsigned int __b)",2
-"unsigned int __vcmpne4(unsigned int __a,unsigned int __b)",10
-"unsigned int __vsub4(unsigned int __a,unsigned int __b)",10
-"unsigned int __vsubss4(unsigned int __a,unsigned int __b)",2
-"unsigned int atomicOr(unsigned int * address,unsigned int val)",2
-"unsigned short __half_as_ushort(const __half h)",3
-"unsigned short __ldg(const unsigned short * ptr)",2
-"ushort4",3
-"void __nanosleep(unsigned int ns)",3
-"void __syncwarp(unsigned int mask)",10
-"void __threadfence()",1
-"void __threadfence_system()",6
diff --git a/sycl/dpct_report.stats.csv b/sycl/dpct_report.stats.csv
deleted file mode 100644
index 8bee6c52d6e..00000000000
--- a/sycl/dpct_report.stats.csv
+++ /dev/null
@@ -1,101 +0,0 @@
-
-File name, LOC migrated to SYCL, LOC migrated to helper functions, LOC not needed to migrate, LOC not able to migrate
-/work/Strata_B70/src/core/session.cpp, 68, 91, 781, 0
-/work/Strata_B70/src/kernels/cuda/native_gdn_preprocess.cu, 43, 2, 155, 0
-/work/Strata_B70/src/kernels/cuda/rope.cu, 14, 4, 78, 0
-/work/Strata_B70/src/kernels/cuda/kv_q4.cu, 49, 12, 171, 0
-/work/Strata_B70/src/kernels/kv_q8_parity.cpp, 2, 18, 122, 0
-/work/Strata_B70/src/kernels/s_gemv_parity.cpp, 6, 44, 585, 0
-/work/Strata_B70/src/kernels/cuda/native_qsa_score.cu, 33, 5, 134, 0
-/work/Strata_B70/src/kernels/cuda/gdn.cu, 75, 15, 159, 0
-/work/Strata_B70/src/kernels/shared_expert_parity.cpp, 12, 60, 411, 0
-/work/Strata_B70/src/kernels/cuda/sampler.cu, 64, 15, 259, 0
-/work/Strata_B70/src/kernels/cuda/qsa_select.cu, 105, 17, 399, 0
-/work/Strata_B70/src/kernels/cuda/native_flash_attn.cu, 47, 5, 161, 0
-/work/Strata_B70/src/kernels/router_top10_parity.cpp, 6, 11, 151, 0
-/work/Strata_B70/src/kernels/bf16_gemv_parity.cpp, 6, 13, 130, 0
-/work/Strata_B70/src/kernels/qsa_prompt_attn_parity.cpp, 11, 18, 181, 0
-/work/Strata_B70/src/kernels/sampler_parity.cpp, 6, 26, 822, 0
-/work/Strata_B70/src/kernels/cuda/router_top10.cu, 35, 11, 181, 0
-/work/Strata_B70/src/kernels/cuda/native_qsa_indexer.cu, 63, 5, 176, 0
-/work/Strata_B70/src/kernels/cuda/qsa_decode_attn.cu, 94, 11, 170, 0
-/work/Strata_B70/src/kernels/cuda/fused_gr.cu, 97, 9, 262, 0
-/work/Strata_B70/src/kernels/cuda/quantize_act.cu, 53, 15, 246, 0
-/work/Strata_B70/src/kernels/cuda/native_gr_postops.cu, 27, 2, 87, 0
-/work/Strata_B70/src/core/expert_source.cpp, 6, 4, 783, 0
-/work/Strata_B70/src/kernels/kv_stream_parity.cpp, 3, 21, 211, 0
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-/work/Strata_B70/src/core/concurrent_main.cpp, 13, 22, 163, 0
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-/work/Strata_B70/src/kernels/kv_q4_parity.cpp, 6, 32, 309, 0
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-/work/Strata_B70/third_party/ggml/ggml-common.h, 4, 865, 1043, 0
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-/work/Strata_B70/src/kernels/cuda/native_gr_norm.cu, 15, 3, 85, 0
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-/work/Strata_B70/src/kernels/rope_parity.cpp, 6, 15, 151, 0
-/work/Strata_B70/src/prefill/prefill.cpp, 60, 52, 1542, 0
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-/work/Strata_B70/src/kernels/cuda/qsa_prompt_attn.cu, 159, 26, 485, 0
-/work/Strata_B70/src/kernels/cuda/ple.cu, 73, 6, 288, 0
-/work/Strata_B70/src/kernels/s2_gemv_q8_parity.cpp, 6, 16, 160, 0
-/work/Strata_B70/src/kernels/cuda/cvec.cu, 25, 22, 120, 0
-/work/Strata_B70/src/kernels/cuda/dequant_s2.cu, 10, 2, 40, 0
-/work/Strata_B70/src/kernels/cuda/native_gdn.cu, 15, 2, 106, 0
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-
-Total migration time: 179566.969000 ms
-
diff --git a/sycl/include/dpct/LICENSE.TXT b/sycl/include/dpct/LICENSE.TXT
new file mode 100644
index 00000000000..a209b428a67
--- /dev/null
+++ b/sycl/include/dpct/LICENSE.TXT
@@ -0,0 +1,236 @@
+==============================================================================
+The SYCLomatic (dpct) helper headers in this directory, vendored from Intel oneAPI DPC++ Compatibility Tool
+2025.3 (https://github.com/oneapi-src/SYCLomatic), are under the Apache License v2.0 with LLVM Exceptions
+(SPDX: Apache-2.0 WITH LLVM-exception; Copyright (C) Intel Corporation):
+==============================================================================
+
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diff --git a/sycl/third_party/ggml/LICENSE b/sycl/third_party/ggml/LICENSE
new file mode 100644
index 00000000000..e7dca554bcb
--- /dev/null
+++ b/sycl/third_party/ggml/LICENSE
@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2023-2026 The ggml authors
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
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+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
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+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
diff --git a/sycl/third_party/ggml/ggml-common.h.yaml b/sycl/third_party/ggml/ggml-common.h.yaml
deleted file mode 100644
index a5643b94c31..00000000000
--- a/sycl/third_party/ggml/ggml-common.h.yaml
+++ /dev/null
@@ -1,468 +0,0 @@
----
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-    ReplacementText: 'static dpct::global_memory<const uint8_t, 1> kmask_iq2xs(sycl::range(8), {1, 2, 4, 8, 16, 32, 64, 128});'
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0x1908190808080808, 0x190819080808082b, 0x1908190808081919, 0x1908190808082b08, 0x1908190808190819, 0x1908190808191908, 0x1908190808192b19, 0x19081908082b0808, 0x1908190819080819, 0x1908190819081908, 0x1908190819190808, 0x190819082b080808, 0x190819082b191908, 0x1908191908080819, 0x1908191908081908, 0x1908191908190808, 0x19081919082b1908, 0x1908191919080808, 0x190819192b192b2b, 0x1908192b08080808, 0x1908192b08082b2b, 0x1908192b19081908, 0x1908192b19190808, 0x19082b0808080819, 0x19082b0808081908, 0x19082b0808190808, 0x19082b0819080808, 0x19082b0819081919, 0x19082b0819191908, 0x19082b08192b082b, 0x19082b1908080808, 0x19082b1908190819, 0x19082b1919081908, 0x19082b1919190808, 0x19082b19192b2b19, 0x19082b2b08081908, 0x1919080808080808, 0x191908080808082b, 0x1919080808081919, 0x1919080808082b08, 0x1919080808190819, 0x1919080808191908, 0x19190808082b0808, 0x19190808082b2b08, 0x1919080819080819, 0x1919080819081908, 0x1919080819190808, 0x191908082b080808, 0x1919081908080819, 0x1919081908081908, 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0x2b082b082b080808, 0x2b082b082b08082b, 0x2b082b082b2b2b08, 0x2b082b190808192b, 0x2b082b2b082b082b, 0x2b082b2b2b080808, 0x2b082b2b2b082b08, 0x2b082b2b2b19192b, 0x2b082b2b2b2b2b08, 0x2b19080808080819, 0x2b19080808081908, 0x2b19080808190808, 0x2b19080819080808, 0x2b1908081919192b, 0x2b1908082b081908, 0x2b19081908080808, 0x2b190819082b082b, 0x2b190819192b1908, 0x2b19082b1919192b, 0x2b19082b2b082b19, 0x2b19190808080808, 0x2b19190808081919, 0x2b19190819081908, 0x2b19190819190808, 0x2b19190819192b08, 0x2b191919082b2b19, 0x2b1919192b190808, 0x2b1919192b19082b, 0x2b19192b19080819, 0x2b192b0819190819, 0x2b192b082b2b192b, 0x2b192b1919082b19, 0x2b192b2b08191919, 0x2b192b2b192b0808, 0x2b2b080808080808, 0x2b2b08080808082b, 0x2b2b080808082b08, 0x2b2b080808082b2b, 0x2b2b0808082b0808, 0x2b2b0808082b2b2b, 0x2b2b08082b2b0808, 0x2b2b081919190819, 0x2b2b081919192b19, 0x2b2b08192b2b192b, 0x2b2b082b08080808, 0x2b2b082b0808082b, 0x2b2b082b08082b08, 0x2b2b082b082b2b2b, 0x2b2b082b2b080808, 0x2b2b082b2b2b0808, 0x2b2b190819080808, 0x2b2b19082b191919, 0x2b2b192b192b1919, 0x2b2b192b2b192b08, 0x2b2b2b0808082b2b, 0x2b2b2b08082b0808, 0x2b2b2b08082b082b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b0808, 0x2b2b2b082b2b2b08, 0x2b2b2b1908081908, 0x2b2b2b192b081908, 0x2b2b2b192b08192b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b082b2b2b, 0x2b2b2b2b2b190819, 0x2b2b2b2b2b2b2b2b});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          34439
-    Length:          21564
-    ReplacementText: 'static dpct::global_memory<const uint64_t, 1> iq2s_grid(sycl::range(1024), {0x0808080808080808, 0x080808080808082b, 0x0808080808081919, 0x0808080808082b08, 0x0808080808082b2b, 0x0808080808190819, 0x0808080808191908, 0x080808080819192b, 0x0808080808192b19, 0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919, 0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908, 0x080808081908192b, 0x0808080819082b19, 0x0808080819190808, 0x080808081919082b, 0x0808080819191919, 0x0808080819192b08, 0x08080808192b0819, 0x08080808192b1908, 0x08080808192b192b, 0x08080808192b2b19, 0x080808082b080808, 0x080808082b08082b, 0x080808082b081919, 0x080808082b082b08, 0x080808082b190819, 0x080808082b191908, 0x080808082b2b0808, 0x080808082b2b1919, 0x080808082b2b2b2b, 0x0808081908080819, 0x0808081908081908, 0x080808190808192b, 0x0808081908082b19, 0x0808081908190808, 0x080808190819082b, 0x0808081908191919, 0x0808081908192b08, 0x08080819082b0819, 0x08080819082b1908, 0x0808081919080808, 0x080808191908082b, 0x0808081919081919, 0x0808081919082b08, 0x0808081919190819, 0x0808081919191908, 0x080808191919192b, 0x0808081919192b19, 0x08080819192b0808, 0x08080819192b1919, 0x08080819192b2b08, 0x080808192b080819, 0x080808192b081908, 0x080808192b190808, 0x080808192b19082b, 0x080808192b191919, 0x080808192b2b0819, 0x080808192b2b1908, 0x0808082b08080808, 0x0808082b0808082b, 0x0808082b08081919, 0x0808082b08082b08, 0x0808082b08190819, 0x0808082b08191908, 0x0808082b082b0808, 0x0808082b082b2b2b, 0x0808082b19080819, 0x0808082b19081908, 0x0808082b1908192b, 0x0808082b19082b19, 0x0808082b19190808, 0x0808082b19191919, 0x0808082b2b080808, 0x0808082b2b081919, 0x0808082b2b082b2b, 0x0808082b2b191908, 0x0808082b2b2b082b, 0x0808190808080819, 0x0808190808081908, 0x080819080808192b, 0x0808190808082b19, 0x0808190808190808, 0x080819080819082b, 0x0808190808191919, 0x0808190808192b08, 0x08081908082b0819, 0x08081908082b1908, 0x08081908082b192b, 0x08081908082b2b19, 0x0808190819080808, 0x080819081908082b, 0x0808190819081919, 0x0808190819082b08, 0x0808190819082b2b, 0x0808190819190819, 0x0808190819191908, 0x080819081919192b, 0x0808190819192b19, 0x08081908192b0808, 0x08081908192b082b, 0x08081908192b1919, 0x080819082b080819, 0x080819082b081908, 0x080819082b08192b, 0x080819082b082b19, 0x080819082b190808, 0x080819082b191919, 0x080819082b192b08, 0x080819082b2b0819, 0x080819082b2b1908, 0x0808191908080808, 0x080819190808082b, 0x0808191908081919, 0x0808191908082b08, 0x0808191908082b2b, 0x0808191908190819, 0x0808191908191908, 0x080819190819192b, 0x0808191908192b19, 0x08081919082b0808, 0x08081919082b1919, 0x08081919082b2b08, 0x0808191919080819, 0x0808191919081908, 0x080819191908192b, 0x0808191919082b19, 0x0808191919190808, 0x080819191919082b, 0x0808191919191919, 0x0808191919192b08, 0x08081919192b0819, 0x08081919192b1908, 0x080819192b080808, 0x080819192b08082b, 0x080819192b081919, 0x080819192b082b08, 0x080819192b190819, 0x080819192b191908, 0x080819192b2b0808, 0x0808192b08080819, 0x0808192b08081908, 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0x2b2b082b08082b2b, 0x2b2b082b082b082b, 0x2b2b082b082b2b08, 0x2b2b082b082b2b2b, 0x2b2b082b2b08082b, 0x2b2b082b2b082b08, 0x2b2b082b2b082b2b, 0x2b2b082b2b2b2b08, 0x2b2b190808080819, 0x2b2b190808081908, 0x2b2b190808190808, 0x2b2b190819080808, 0x2b2b19082b082b19, 0x2b2b19082b2b1908, 0x2b2b191908080808, 0x2b2b191908192b19, 0x2b2b192b19190819, 0x2b2b2b0808082b2b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b082b, 0x2b2b2b1919191908, 0x2b2b2b192b08192b, 0x2b2b2b2b08082b08, 0x2b2b2b2b08082b2b, 0x2b2b2b2b082b0808, 0x2b2b2b2b082b082b, 0x2b2b2b2b082b2b08, 0x2b2b2b2b2b082b08, 0x2b2b2b2b2b2b2b2b});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          56005
-    Length:          3261
-    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq3xxs_grid(sycl::range(256), {0x04040404, 0x04040414, 0x04040424, 0x04040c0c, 0x04040c1c, 0x04040c3e, 0x04041404, 0x04041414, 0x04041c0c, 0x04042414, 0x04043e1c, 0x04043e2c, 0x040c040c, 0x040c041c, 0x040c0c04, 0x040c0c14, 0x040c140c, 0x040c142c, 0x040c1c04, 0x040c1c14, 0x040c240c, 0x040c2c24, 0x040c3e04, 0x04140404, 0x04140414, 0x04140424, 0x04140c0c, 0x04141404, 0x04141414, 0x04141c0c, 0x04141c1c, 0x04141c3e, 0x04142c0c, 0x04142c3e, 0x04143e2c, 0x041c040c, 0x041c043e, 0x041c0c04, 0x041c0c14, 0x041c142c, 0x041c3e04, 0x04240c1c, 0x04241c3e, 0x04242424, 0x04242c3e, 0x04243e1c, 0x04243e2c, 0x042c040c, 0x042c043e, 0x042c1c14, 0x042c2c14, 0x04341c2c, 0x04343424, 0x043e0c04, 0x043e0c24, 0x043e0c34, 0x043e241c, 0x043e340c, 0x0c04040c, 0x0c04041c, 0x0c040c04, 0x0c040c14, 0x0c04140c, 0x0c04141c, 0x0c041c04, 0x0c041c14, 0x0c041c24, 0x0c04243e, 0x0c042c04, 0x0c0c0404, 0x0c0c0414, 0x0c0c0c0c, 0x0c0c1404, 0x0c0c1414, 0x0c14040c, 0x0c14041c, 0x0c140c04, 0x0c140c14, 0x0c14140c, 0x0c141c04, 0x0c143e14, 0x0c1c0404, 0x0c1c0414, 0x0c1c1404, 0x0c1c1c0c, 0x0c1c2434, 0x0c1c3434, 0x0c24040c, 0x0c24042c, 0x0c242c04, 0x0c2c1404, 0x0c2c1424, 0x0c2c2434, 0x0c2c3e0c, 0x0c34042c, 0x0c3e1414, 0x0c3e2404, 0x14040404, 0x14040414, 0x14040c0c, 0x14040c1c, 0x14041404, 0x14041414, 0x14041434, 0x14041c0c, 0x14042414, 0x140c040c, 0x140c041c, 0x140c042c, 0x140c0c04, 0x140c0c14, 0x140c140c, 0x140c1c04, 0x140c341c, 0x140c343e, 0x140c3e04, 0x14140404, 0x14140414, 0x14140c0c, 0x14140c3e, 0x14141404, 0x14141414, 0x14141c3e, 0x14142404, 0x14142c2c, 0x141c040c, 0x141c0c04, 0x141c0c24, 0x141c3e04, 0x141c3e24, 0x14241c2c, 0x14242c1c, 0x142c041c, 0x142c143e, 0x142c240c, 0x142c3e24, 0x143e040c, 0x143e041c, 0x143e0c34, 0x143e242c, 0x1c04040c, 0x1c040c04, 0x1c040c14, 0x1c04140c, 0x1c04141c, 0x1c042c04, 0x1c04342c, 0x1c043e14, 0x1c0c0404, 0x1c0c0414, 0x1c0c1404, 0x1c0c1c0c, 0x1c0c2424, 0x1c0c2434, 0x1c14040c, 0x1c14041c, 0x1c140c04, 0x1c14142c, 0x1c142c14, 0x1c143e14, 0x1c1c0c0c, 0x1c1c1c1c, 0x1c241c04, 0x1c24243e, 0x1c243e14, 0x1c2c0404, 0x1c2c0434, 0x1c2c1414, 0x1c2c2c2c, 0x1c340c24, 0x1c341c34, 0x1c34341c, 0x1c3e1c1c, 0x1c3e3404, 0x24040424, 0x24040c3e, 0x24041c2c, 0x24041c3e, 0x24042c1c, 0x24042c3e, 0x240c3e24, 0x24141404, 0x24141c3e, 0x24142404, 0x24143404, 0x24143434, 0x241c043e, 0x241c242c, 0x24240424, 0x24242c0c, 0x24243424, 0x242c142c, 0x242c241c, 0x242c3e04, 0x243e042c, 0x243e0c04, 0x243e0c14, 0x243e1c04, 0x2c040c14, 0x2c04240c, 0x2c043e04, 0x2c0c0404, 0x2c0c0434, 0x2c0c1434, 0x2c0c2c2c, 0x2c140c24, 0x2c141c14, 0x2c143e14, 0x2c1c0414, 0x2c1c2c1c, 0x2c240c04, 0x2c24141c, 0x2c24143e, 0x2c243e14, 0x2c2c0414, 0x2c2c1c0c, 0x2c342c04, 0x2c3e1424, 0x2c3e2414, 0x34041424, 0x34042424, 0x34042434, 0x34043424, 0x340c140c, 0x340c340c, 0x34140c3e, 0x34143424, 0x341c1c04, 0x341c1c34, 0x34242424, 0x342c042c, 0x342c2c14, 0x34341c1c, 0x343e041c, 0x343e140c, 0x3e04041c, 0x3e04042c, 0x3e04043e, 0x3e040c04, 0x3e041c14, 0x3e042c14, 0x3e0c1434, 0x3e0c2404, 0x3e140c14, 0x3e14242c, 0x3e142c14, 0x3e1c0404, 0x3e1c0c2c, 0x3e1c1c1c, 0x3e1c3404, 0x3e24140c, 0x3e24240c, 0x3e2c0404, 0x3e2c0414, 0x3e2c1424, 0x3e341c04});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          59268
-    Length:          6459
-    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq3s_grid(sycl::range(512), {0x01010101, 0x01010103, 0x01010105, 0x0101010b, 0x0101010f, 0x01010301, 0x01010303, 0x01010305, 0x01010309, 0x0101030d, 0x01010501, 0x01010503, 0x0101050b, 0x01010707, 0x01010901, 0x01010905, 0x0101090b, 0x0101090f, 0x01010b03, 0x01010b07, 0x01010d01, 0x01010d05, 0x01010f03, 0x01010f09, 0x01010f0f, 0x01030101, 0x01030103, 0x01030105, 0x01030109, 0x01030301, 0x01030303, 0x0103030b, 0x01030501, 0x01030507, 0x0103050f, 0x01030703, 0x0103070b, 0x01030909, 0x01030d03, 0x01030d0b, 0x01030f05, 0x01050101, 0x01050103, 0x0105010b, 0x0105010f, 0x01050301, 0x01050307, 0x0105030d, 0x01050503, 0x0105050b, 0x01050701, 0x01050709, 0x01050905, 0x0105090b, 0x0105090f, 0x01050b03, 0x01050b07, 0x01050f01, 0x01050f07, 0x01070107, 0x01070303, 0x0107030b, 0x01070501, 0x01070505, 0x01070703, 0x01070707, 0x0107070d, 0x01070909, 0x01070b01, 0x01070b05, 0x01070d0f, 0x01070f03, 0x01070f0b, 0x01090101, 0x01090307, 0x0109030f, 0x01090503, 0x01090509, 0x01090705, 0x01090901, 0x01090907, 0x01090b03, 0x01090f01, 0x010b0105, 0x010b0109, 0x010b0501, 0x010b0505, 0x010b050d, 0x010b0707, 0x010b0903, 0x010b090b, 0x010b090f, 0x010b0d0d, 0x010b0f07, 0x010d010d, 0x010d0303, 0x010d0307, 0x010d0703, 0x010d0b05, 0x010d0f03, 0x010f0101, 0x010f0105, 0x010f0109, 0x010f0501, 0x010f0505, 0x010f050d, 0x010f0707, 0x010f0b01, 0x010f0b09, 0x03010101, 0x03010103, 0x03010105, 0x03010109, 0x03010301, 0x03010303, 0x03010307, 0x0301030b, 0x0301030f, 0x03010501, 0x03010505, 0x03010703, 0x03010709, 0x0301070d, 0x03010b09, 0x03010b0d, 0x03010d03, 0x03010f05, 0x03030101, 0x03030103, 0x03030107, 0x0303010d, 0x03030301, 0x03030309, 0x03030503, 0x03030701, 0x03030707, 0x03030903, 0x03030b01, 0x03030b05, 0x03030f01, 0x03030f0d, 0x03050101, 0x03050305, 0x0305030b, 0x0305030f, 0x03050501, 0x03050509, 0x03050705, 0x03050901, 0x03050907, 0x03050b0b, 0x03050d01, 0x03050f05, 0x03070103, 0x03070109, 0x0307010f, 0x03070301, 0x03070307, 0x03070503, 0x0307050f, 0x03070701, 0x03070709, 0x03070903, 0x03070d05, 0x03070f01, 0x03090107, 0x0309010b, 0x03090305, 0x03090309, 0x03090703, 0x03090707, 0x03090905, 0x0309090d, 0x03090b01, 0x03090b09, 0x030b0103, 0x030b0301, 0x030b0307, 0x030b0503, 0x030b0701, 0x030b0705, 0x030b0b03, 0x030d0501, 0x030d0509, 0x030d050f, 0x030d0909, 0x030d090d, 0x030f0103, 0x030f0107, 0x030f0301, 0x030f0305, 0x030f0503, 0x030f070b, 0x030f0903, 0x030f0d05, 0x030f0f01, 0x05010101, 0x05010103, 0x05010107, 0x0501010b, 0x0501010f, 0x05010301, 0x05010305, 0x05010309, 0x0501030d, 0x05010503, 0x05010507, 0x0501050f, 0x05010701, 0x05010705, 0x05010903, 0x05010907, 0x0501090b, 0x05010b01, 0x05010b05, 0x05010d0f, 0x05010f01, 0x05010f07, 0x05010f0b, 0x05030101, 0x05030105, 0x05030301, 0x05030307, 0x0503030f, 0x05030505, 0x0503050b, 0x05030703, 0x05030709, 0x05030905, 0x05030b03, 0x05050103, 0x05050109, 0x0505010f, 0x05050503, 0x05050507, 0x05050701, 0x0505070f, 0x05050903, 0x05050b07, 0x05050b0f, 0x05050f03, 0x05050f09, 0x05070101, 0x05070105, 0x0507010b, 0x05070303, 0x05070505, 0x05070509, 0x05070703, 0x05070707, 0x05070905, 0x05070b01, 0x05070d0d, 0x05090103, 0x0509010f, 0x05090501, 0x05090507, 0x05090705, 0x0509070b, 0x05090903, 0x05090f05, 0x05090f0b, 0x050b0109, 0x050b0303, 0x050b0505, 0x050b070f, 0x050b0901, 0x050b0b07, 0x050b0f01, 0x050d0101, 0x050d0105, 0x050d010f, 0x050d0503, 0x050d0b0b, 0x050d0d03, 0x050f010b, 0x050f0303, 0x050f050d, 0x050f0701, 0x050f0907, 0x050f0b01, 0x07010105, 0x07010303, 0x07010307, 0x0701030b, 0x0701030f, 0x07010505, 0x07010703, 0x07010707, 0x0701070b, 0x07010905, 0x07010909, 0x0701090f, 0x07010b03, 0x07010d07, 0x07010f03, 0x07030103, 0x07030107, 0x0703010b, 0x07030309, 0x07030503, 0x07030507, 0x07030901, 0x07030d01, 0x07030f05, 0x07030f0d, 0x07050101, 0x07050305, 0x07050501, 0x07050705, 0x07050709, 0x07050b01, 0x07070103, 0x07070301, 0x07070309, 0x07070503, 0x07070507, 0x0707050f, 0x07070701, 0x07070903, 0x07070907, 0x0707090f, 0x07070b0b, 0x07070f07, 0x07090107, 0x07090303, 0x0709030d, 0x07090505, 0x07090703, 0x07090b05, 0x07090d01, 0x07090d09, 0x070b0103, 0x070b0301, 0x070b0305, 0x070b050b, 0x070b0705, 0x070b0909, 0x070b0b0d, 0x070b0f07, 0x070d030d, 0x070d0903, 0x070f0103, 0x070f0107, 0x070f0501, 0x070f0505, 0x070f070b, 0x09010101, 0x09010109, 0x09010305, 0x09010501, 0x09010509, 0x0901050f, 0x09010705, 0x09010903, 0x09010b01, 0x09010f01, 0x09030105, 0x0903010f, 0x09030303, 0x09030307, 0x09030505, 0x09030701, 0x0903070b, 0x09030907, 0x09030b03, 0x09030b0b, 0x09050103, 0x09050107, 0x09050301, 0x0905030b, 0x09050503, 0x09050707, 0x09050901, 0x09050b0f, 0x09050d05, 0x09050f01, 0x09070109, 0x09070303, 0x09070307, 0x09070501, 0x09070505, 0x09070703, 0x0907070b, 0x09090101, 0x09090105, 0x09090509, 0x0909070f, 0x09090901, 0x09090f03, 0x090b010b, 0x090b010f, 0x090b0503, 0x090b0d05, 0x090d0307, 0x090d0709, 0x090d0d01, 0x090f0301, 0x090f030b, 0x090f0701, 0x090f0907, 0x090f0b03, 0x0b010105, 0x0b010301, 0x0b010309, 0x0b010505, 0x0b010901, 0x0b010909, 0x0b01090f, 0x0b010b05, 0x0b010d0d, 0x0b010f09, 0x0b030103, 0x0b030107, 0x0b03010b, 0x0b030305, 0x0b030503, 0x0b030705, 0x0b030f05, 0x0b050101, 0x0b050303, 0x0b050507, 0x0b050701, 0x0b05070d, 0x0b050b07, 0x0b070105, 0x0b07010f, 0x0b070301, 0x0b07050f, 0x0b070909, 0x0b070b03, 0x0b070d0b, 0x0b070f07, 0x0b090103, 0x0b090109, 0x0b090501, 0x0b090705, 0x0b09090d, 0x0b0b0305, 0x0b0b050d, 0x0b0b0b03, 0x0b0b0b07, 0x0b0d0905, 0x0b0f0105, 0x0b0f0109, 0x0b0f0505, 0x0d010303, 0x0d010307, 0x0d01030b, 0x0d010703, 0x0d010707, 0x0d010d01, 0x0d030101, 0x0d030501, 0x0d03050f, 0x0d030d09, 0x0d050305, 0x0d050709, 0x0d050905, 0x0d050b0b, 0x0d050d05, 0x0d050f01, 0x0d070101, 0x0d070309, 0x0d070503, 0x0d070901, 0x0d09050b, 0x0d090907, 0x0d090d05, 0x0d0b0101, 0x0d0b0107, 0x0d0b0709, 0x0d0b0d01, 0x0d0d010b, 0x0d0d0901, 0x0d0f0303, 0x0d0f0307, 0x0f010101, 0x0f010109, 0x0f01010f, 0x0f010501, 0x0f010505, 0x0f01070d, 0x0f010901, 0x0f010b09, 0x0f010d05, 0x0f030105, 0x0f030303, 0x0f030509, 0x0f030907, 0x0f03090b, 0x0f050103, 0x0f050109, 0x0f050301, 0x0f05030d, 0x0f050503, 0x0f050701, 0x0f050b03, 0x0f070105, 0x0f070705, 0x0f07070b, 0x0f070b07, 0x0f090103, 0x0f09010b, 0x0f090307, 0x0f090501, 0x0f090b01, 0x0f0b0505, 0x0f0b0905, 0x0f0d0105, 0x0f0d0703, 0x0f0f0101});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          65765
-    Length:          138
-    ReplacementText: 'static dpct::global_memory<const int8_t, 1> kvalues_iq4nl(sycl::range(16), {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          66051
-    Length:          119
-    ReplacementText: 'static dpct::global_memory<const int8_t, 1> kvalues_fp4(sycl::range(16), {0, 1, 2, 3, 4, 6, 8, 12, 0, -1, -2, -3, -4, -6, -8, -12});'
-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-  - FilePath:        '/work/Strata_B70/third_party/ggml/ggml-common.h'
-    Offset:          109428
-    Length:          25670
-    ReplacementText: 'static dpct::global_memory<const uint32_t, 1> iq1s_grid_gpu(sycl::range(NGRID_IQ1S), {0x00000000, 0x00000002, 0x00000101, 0x00000200, 0x00000202, 0x00010001, 0x00010101, 0x00020000, 0x00020002, 0x00020200, 0x00020202, 0x01000101, 0x01010001, 0x01010100, 0x01010102, 0x01020101, 0x02000000, 0x02000002, 0x02000200, 0x02000202, 0x02010101, 0x02020000, 0x02020002, 0x02020200, 0x02020202, 0x00000110, 0x00000111, 0x00010011, 0x00010110, 0x00010112, 0x00010211, 0x00010212, 0x00020111, 0x01000011, 0x01000112, 0x01000211, 0x01010012, 0x01010111, 0x01010212, 0x01020011, 0x01020110, 0x01020112, 0x01020210, 0x02000111, 0x02010011, 0x02010110, 0x02010112, 0x02020111, 0x00000020, 0x00000022, 0x00000220, 0x00000222, 0x00010121, 0x00020020, 0x00020022, 0x00020220, 0x00020222, 0x01000121, 0x01010021, 0x01010221, 0x01020120, 0x01020221, 0x02000020, 0x02000022, 0x02000220, 0x02000222, 0x02010021, 0x02010121, 0x02010221, 0x02020020, 0x02020022, 0x02020220, 0x02020222, 0x00011001, 0x00011100, 0x00011102, 0x00021101, 0x01001001, 0x01001201, 0x01011101, 0x01011202, 0x01021100, 0x01021101, 0x02011001, 0x02011201, 0x02021101, 0x00001011, 0x00001110, 0x00001111, 0x00001112, 0x00011111, 0x00011210, 0x00011212, 0x00021211, 0x01001010, 0x01001111, 0x01001212, 0x01011010, 0x01011011, 0x01011110, 0x01011111, 0x01011112, 0x01011211, 0x01021010, 0x01021012, 0x01021111, 0x01021210, 0x01021212, 0x02001011, 0x02011011, 0x02011111, 0x02011210, 0x02011212, 0x02021011, 0x02021110, 0x02021111, 0x02021112, 0x02021211, 0x00011120, 0x00011221, 0x01001021, 0x01001120, 0x01011020, 0x01011022, 0x01011121, 0x01011220, 0x01021020, 0x01021021, 0x01021122, 0x01021221, 0x02001121, 0x02011021, 0x02011120, 0x02011221, 0x00002000, 0x00002002, 0x00002200, 0x00002202, 0x00012101, 0x00022000, 0x00022002, 0x00022200, 0x00022202, 0x01002101, 0x01012001, 0x01012102, 0x01022101, 0x02002000, 0x02002002, 0x02002200, 0x02002202, 0x02012101, 0x02022000, 0x02022002, 0x02022200, 0x02022202, 0x00002111, 0x00012011, 0x00012110, 0x00012211, 0x00022110, 0x00022111, 0x01002011, 0x01012010, 0x01012011, 0x01012111, 0x01022011, 0x01022110, 0x01022211, 0x02012011, 0x02012110, 0x02012112, 0x02012211, 0x02022111, 0x00002020, 0x00002022, 0x00002220, 0x00002222, 0x00012121, 0x00022020, 0x00022022, 0x00022220, 0x00022222, 0x01002121, 0x01012021, 0x01012221, 0x01022021, 0x01022121, 0x02002020, 0x02002022, 0x02002121, 0x02002220, 0x02002222, 0x02012121, 0x02022020, 0x02022022, 0x02022220, 0x02022222, 0x00110000, 0x00110001, 0x00110100, 0x00110201, 0x00120100, 0x00120101, 0x01100001, 0x01100100, 0x01110000, 0x01110101, 0x01110200, 0x01120001, 0x01120100, 0x01120101, 0x01120201, 0x02110001, 0x02110100, 0x02110102, 0x02120001, 0x02120101, 0x00100011, 0x00100110, 0x00100112, 0x00100211, 0x00110010, 0x00110012, 0x00110111, 0x00110210, 0x00120011, 0x00120110, 0x00120211, 0x01100111, 0x01100212, 0x01110010, 0x01110011, 0x01110012, 0x01110110, 0x01110111, 0x01110112, 0x01110211, 0x01120010, 0x01120111, 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0x01121111, 0x01121112, 0x01121211, 0x02101010, 0x02101012, 0x02101110, 0x02101111, 0x02101210, 0x02101212, 0x02111010, 0x02111011, 0x02111110, 0x02111111, 0x02111112, 0x02111211, 0x02111212, 0x02121010, 0x02121012, 0x02121111, 0x00101021, 0x00101120, 0x00101121, 0x00101122, 0x00111121, 0x00111122, 0x00111220, 0x00111222, 0x00121021, 0x00121122, 0x01101020, 0x01101022, 0x01101120, 0x01101121, 0x01101220, 0x01101222, 0x01111021, 0x01111121, 0x01111122, 0x01111220, 0x01111221, 0x01121021, 0x01121120, 0x01121121, 0x01121220, 0x01121221, 0x01121222, 0x02101122, 0x02101222, 0x02111022, 0x02111121, 0x02121120, 0x02121221, 0x00112001, 0x00112102, 0x00122101, 0x01102001, 0x01102100, 0x01102102, 0x01102201, 0x01112000, 0x01112101, 0x01112200, 0x01112202, 0x01122000, 0x01122001, 0x01122100, 0x01122102, 0x01122201, 0x02102101, 0x02112001, 0x02112100, 0x02122101, 0x00112010, 0x00112012, 0x00112111, 0x00112212, 0x00122011, 0x00122111, 0x01102012, 0x01102110, 0x01102111, 0x01102210, 0x01112011, 0x01112110, 0x01112111, 0x01112112, 0x01112211, 0x01112212, 0x01122010, 0x01122111, 0x01122212, 0x02102211, 0x02112011, 0x02112012, 0x02112111, 0x02112210, 0x02122011, 0x02122112, 0x02122211, 0x00102221, 0x00112122, 0x00122120, 0x00122122, 0x01102120, 0x01102122, 0x01102221, 0x01112020, 0x01112022, 0x01112121, 0x01112220, 0x01122021, 0x01122122, 0x01122221, 0x02102121, 0x02112021, 0x02112122, 0x02112222, 0x00200000, 0x00200002, 0x00200200, 0x00200202, 0x00210101, 0x00220000, 0x00220002, 0x00220101, 0x00220200, 0x00220202, 0x01200101, 0x01210001, 0x01210201, 0x01220001, 0x01220101, 0x02200000, 0x02200002, 0x02200200, 0x02200202, 0x02210101, 0x02220000, 0x02220002, 0x02220101, 0x02220200, 0x02220202, 0x00200111, 0x00210011, 0x00210110, 0x00210211, 0x00220111, 0x01200012, 0x01200110, 0x01200211, 0x01210111, 0x01210210, 0x01210212, 0x01220011, 0x01220110, 0x01220111, 0x01220112, 0x02200111, 0x02210010, 0x02210112, 0x02210211, 0x02220111, 0x00200021, 0x00200220, 0x00200222, 0x00210021, 0x00210121, 0x00220020, 0x00220022, 0x00220220, 0x00220222, 0x01200121, 0x01210021, 0x01210122, 0x01210221, 0x01220121, 0x02200021, 0x02200220, 0x02200222, 0x02210021, 0x02210121, 0x02220020, 0x02220022, 0x02220220, 0x02220222, 0x00201101, 0x00211100, 0x00211102, 0x00211201, 0x00221101, 0x01201100, 0x01201101, 0x01201102, 0x01201201, 0x01211002, 0x01211101, 0x01211200, 0x01211202, 0x01221102, 0x02201101, 0x02211001, 0x02211100, 0x02211201, 0x02221001, 0x02221101, 0x00201211, 0x00211111, 0x00221011, 0x00221211, 0x01201010, 0x01201111, 0x01201210, 0x01211011, 0x01211110, 0x01211111, 0x01211211, 0x01221012, 0x01221111, 0x01221210, 0x02201211, 0x02211010, 0x02211110, 0x02211111, 0x02211210, 0x02211212, 0x02221011, 0x02221110, 0x02221112, 0x02221211, 0x00201121, 0x00211020, 0x00211022, 0x00211221, 0x00221121, 0x01201021, 0x01201221, 0x01211121, 0x01221020, 0x01221021, 0x01221221, 0x02201120, 0x02201122, 0x02211020, 0x02211222, 0x00202000, 0x00202002, 0x00202200, 0x00202202, 0x00212101, 0x00222000, 0x00222002, 0x00222200, 0x00222202, 0x01202101, 0x01212001, 0x01212100, 0x01222101, 0x02202000, 0x02202002, 0x02202200, 0x02202202, 0x02222000, 0x02222002, 0x02222200, 0x02222202, 0x00202211, 0x00212011, 0x00212110, 0x00212211, 0x00222111, 0x01202112, 0x01202211, 0x01212012, 0x01212111, 0x01222011, 0x01222110, 0x01222112, 0x01222211, 0x02202111, 0x02212010, 0x02212112, 0x02212211, 0x02222110, 0x02222111, 0x00202020, 0x00202022, 0x00202220, 0x00202222, 0x00222020, 0x00222022, 0x00222220, 0x00222222, 0x01202121, 0x01212021, 0x01212122, 0x01212221, 0x01222121, 0x02202020, 0x02202022, 0x02202220, 0x02202222, 0x02212121, 0x02222020, 0x02222022, 0x02222220, 0x02222222, 0x10000101, 0x10010001, 0x10010102, 0x10020101, 0x11000201, 0x11010002, 0x11010101, 0x11010200, 0x11010202, 0x11020001, 0x11020100, 0x11020102, 0x12010100, 0x12010201, 0x12020001, 0x12020102, 0x10000010, 0x10000011, 0x10000110, 0x10000112, 0x10000211, 0x10010012, 0x10010111, 0x10010112, 0x10010210, 0x10010212, 0x10020011, 0x10020112, 0x10020211, 0x11000111, 0x11000210, 0x11000212, 0x11010011, 0x11010110, 0x11010111, 0x11010112, 0x11010211, 0x11010212, 0x11020111, 0x11020210, 0x11020212, 0x12000011, 0x12000110, 0x12000112, 0x12010010, 0x12010012, 0x12010111, 0x12020010, 0x12020011, 0x12020012, 0x10000121, 0x10010021, 0x10010120, 0x10010122, 0x10020121, 0x11000021, 0x11010022, 0x11010121, 0x11010222, 0x11020120, 0x11020221, 0x12000221, 0x12010120, 0x12020121, 0x10001001, 0x10011101, 0x10011201, 0x10021201, 0x11001101, 0x11001200, 0x11001202, 0x11011001, 0x11011100, 0x11011101, 0x11011102, 0x11021001, 0x11021002, 0x11021101, 0x11021200, 0x11021202, 0x12001001, 0x12001102, 0x12001201, 0x12011000, 0x12011002, 0x12011101, 0x12021000, 0x12021001, 0x12021201, 0x10001011, 0x10001012, 0x10001111, 0x10001212, 0x10011011, 0x10011110, 0x10011111, 0x10011112, 0x10011211, 0x10021010, 0x10021111, 0x10021212, 0x11001011, 0x11001110, 0x11001111, 0x11001112, 0x11001211, 0x11011010, 0x11011011, 0x11011110, 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-    ConstantFlag:    ''
-    ConstantOffset:  0
-    InitStr:         ''
-    NewHostVarName:  ''
-    BlockLevelFormatFlag: false
-MainSourceFilesDigest:
-  - MainSourceFile:  ''
-    Digest:          ''
-    HasCUDASyntax:   false
-DpctVersion:     2025.3.0
-SDKVersionMajor: '12'
-SDKVersionMinor: '8'
-MainHelperFileName: ''
-USMLevel:        ''
-FeatureMap:      {}
-CompileTargets:  {}
-OptionMap:
-  AnalysisScopePath:
-    Value:           ''
-    ValueVec:
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-    Specified:       false
-  AsyncHandler:
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-  BuildScript:
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-  CodePinEnabled:
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-    Specified:       false
-  CommentsEnabled:
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-    Specified:       false
-  CompilationsDir:
-    Value:           '/work/Strata_B70'
-    Specified:       true
-  CtadEnabled:
-    Value:           'true'
-    Specified:       true
-  EnablepProfiling:
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-  ExperimentalFlag:
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-    Specified:       true
-  ExplicitNamespace:
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-  ExtensionDDFlag:
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-  ExtensionDEFlag:
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-  HelperFuncPreferenceFlag:
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-  NDRangeDim:
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-  NoDRYPattern:
-    Value:           'false'
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-  OptimizeMigration:
-    Value:           'true'
-    Specified:       true
-  ProcessAll:
-    Value:           'false'
-    Specified:       false
-  RuleFile:
-    Value:           ''
-    Specified:       false
-  SyclNamedLambda:
-    Value:           'true'
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-  UseSYCLCompat:
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-  UsmLevel:
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-...
diff --git a/tools/intel/gpustat.py b/tools/intel/gpustat.py
new file mode 100644
index 00000000000..db80e637aeb
--- /dev/null
+++ b/tools/intel/gpustat.py
@@ -0,0 +1,182 @@
+#!/usr/bin/env python3
+"""GPU telemetry sampler for an Intel Arc on the xe driver (runs as root: tools/intel/gpustat.service).
+Writes /run/gpustat.json every INTERVAL s; Strata's web app (serve/telemetry.py) shows it in the Monitor tab:
+  name, vram_used_mb / vram_total_mb (sum of drm-resident-vram0 over unique drm
+  clients from /proc/*/fdinfo - the only VRAM accounting xe exposes; root-only),
+  busy_pct (compute/render cycle deltas), temp_pkg/temp_vram (hwmon 'xe'),
+  power_w / pkg_power_w (energy counter deltas over a POWER_WINDOW s window: the counters update in
+  bursts, so a 3 s delta swings 0.6 <-> 48 W), power_cap_w, fan_rpm, freq_mhz, the PCIe link the card
+  trained at (the first upstream port wider than x1 - the card's own functions sit behind an internal
+  x1 switch), the hottest VRAM channel, and the host's 1-minute load. Device totals only.
+Without it the Monitor tab still shows temperature, power and the PCIe link (sysfs), but not load or VRAM: xe
+reports those per client in /proc/*/fdinfo, which only root can read.
+Install:  sudo install -m 755 tools/intel/gpustat.py /usr/local/sbin/
+          sudo install -m 644 tools/intel/gpustat.service /etc/systemd/system/ && sudo systemctl enable --now gpustat
+Env: GPUSTAT_INTERVAL (s), GPUSTAT_POWER_WINDOW (s), GPUSTAT_PCI (the card, e.g. 0000:03:00.0; default the first
+Intel GPU on xe), GPUSTAT_VRAM_MB (the total; default the card's largest PCI BAR, which maps all of VRAM with
+resizable BAR - a little above what the runtime reports as usable).
+"""
+import collections, glob, json, os, subprocess, time
+
+OUT = "/run/gpustat.json"
+INTERVAL = float(os.environ.get("GPUSTAT_INTERVAL", "3"))   # each sample scans /proc/*/fd; keep it modest
+NAMES = {"e223": "Intel(R) Arc(TM) Pro B70 Graphics"}
+
+
+def find_card():
+    """The first Intel GPU on the xe driver (it has tile*/gt*), as a PCI address."""
+    for d in sorted(glob.glob("/sys/class/drm/card[0-9]*/device")):
+        try:
+            if open(f"{d}/vendor").read().strip() == "0x8086" and glob.glob(f"{d}/tile*/gt*"):
+                return os.path.basename(os.path.realpath(d))
+        except OSError:
+            continue
+    return None
+
+
+PCI = os.environ.get("GPUSTAT_PCI") or find_card() or "0000:00:00.0"
+
+
+def vram_total_mb():
+    if os.environ.get("GPUSTAT_VRAM_MB"):
+        return int(os.environ["GPUSTAT_VRAM_MB"])
+    try:                                   # with resizable BAR the largest BAR maps all of VRAM
+        sizes = [int(e, 16) - int(s, 16) + 1 for s, e, _ in
+                 (l.split() for l in open(f"/sys/bus/pci/devices/{PCI}/resource") if l.strip())]
+        return max(sizes) // 2**20
+    except (OSError, ValueError):
+        return 0
+
+
+def card_name(dev_id):
+    if dev_id in NAMES:
+        return NAMES[dev_id]
+    try:
+        out = subprocess.run(["lspci", "-mm", "-s", PCI], capture_output=True, text=True, timeout=5).stdout
+        parts = [p.strip('"') for p in out.split('" "')]
+        if len(parts) >= 3 and parts[2]:
+            return parts[2]
+    except (OSError, subprocess.SubprocessError):
+        pass
+    return f"Intel GPU 8086:{dev_id}"
+
+
+TOTAL_MB = vram_total_mb()
+POWER_WINDOW = float(os.environ.get("GPUSTAT_POWER_WINDOW", "15"))
+GEN = {"2.5": 1, "5.0": 2, "8.0": 3, "16.0": 4, "32.0": 5, "64.0": 6}
+
+def pcie_link():
+    """The link the card trained at: walk up from the GPU function to the first port wider than x1."""
+    d = os.path.realpath(f"/sys/bus/pci/devices/{PCI}")
+    chain = []
+    while d.startswith("/sys/devices/pci") and os.path.exists(f"{d}/current_link_speed"):
+        chain.append(d); d = os.path.dirname(d)
+    def link(p, kind):
+        sp = (rd(f"{p}/{kind}_link_speed", "") or "").split(" ")[0]
+        return {"gen": GEN.get(sp), "gts": sp, "width": int(rd(f"{p}/{kind}_link_width", "0") or 0)}
+    for i, p in enumerate(chain):
+        cur = link(p, "current")
+        if cur["width"] > 1:
+            root = chain[-1]                                  # the CPU's root port: what the slot can do
+            return {"cur": cur, "card_max": link(p, "max"), "slot_max": link(root, "max")}
+    return None
+
+def hwmon_dir():
+    for n in glob.glob("/sys/class/hwmon/hwmon*/name"):
+        if open(n).read().strip() == "xe":
+            return os.path.dirname(n)
+    return None
+
+def rd(p, default=None):
+    try:
+        return open(p).read().strip()
+    except Exception:
+        return default
+
+def hw_temps(h):
+    t = {}
+    for lab in glob.glob(f"{h}/temp*_label"):
+        name = rd(lab); v = rd(lab.replace("_label", "_input"))
+        if name and v: t[name] = int(v) / 1000
+    return t
+
+def clients():
+    """{client_id: {pid, comm, vram_kb, cycles, total_cycles}} across all processes."""
+    res = {}
+    for pdir in glob.glob("/proc/[0-9]*"):
+        try:
+            fds = os.listdir(f"{pdir}/fd")
+        except Exception:
+            continue
+        for fd in fds:
+            try:
+                if not os.readlink(f"{pdir}/fd/{fd}").startswith("/dev/dri/"):
+                    continue
+                info = dict(l.split(":\t", 1) for l in open(f"{pdir}/fdinfo/{fd}").read().splitlines() if l.startswith("drm-"))
+            except Exception:
+                continue
+            cid = info.get("drm-client-id")
+            if not cid or cid in res:
+                continue
+            kb = lambda k: int(info.get(k, "0").split()[0] or 0)
+            cyc = max(kb("drm-cycles-rcs"), kb("drm-cycles-ccs"))
+            tot = max(kb("drm-total-cycles-rcs"), kb("drm-total-cycles-ccs"))
+            res[cid] = {"pid": int(pdir[6:]), "comm": rd(f"{pdir}/comm", "?"),
+                        "cg": rd(f"{pdir}/cgroup", ""), "vram_kb": kb("drm-resident-vram0"), "cycles": cyc, "total": tot}
+    return res
+
+def main():
+    h = hwmon_dir()
+    dev_id = (rd(f"/sys/bus/pci/devices/{PCI}/device", "0x0") or "0x0")[2:]
+    name = card_name(dev_id)
+    prev = {}; t_prev = time.time()
+    ring = collections.deque()                  # (t, card uJ, pkg uJ) over the last POWER_WINDOW s
+    link = pcie_link(); link_t = time.time()
+    while True:
+        now = time.time(); dt = max(now - t_prev, 1e-3)
+        cl = clients()
+        busy = 0.0
+        for cid, c in cl.items():
+            p = prev.get(cid)
+            if p and c["total"] > p["total"]:
+                busy += (c["cycles"] - p["cycles"]) / (c["total"] - p["total"]) * 100
+        e = int(rd(f"{h}/energy1_input", "0") or 0) if h else 0
+        e2 = int(rd(f"{h}/energy2_input", "0") or 0) if h else 0
+        ring.append((now, e, e2))
+        while len(ring) > 2 and now - ring[1][0] >= POWER_WINDOW:
+            ring.popleft()
+        t0, ea, eb = ring[0]
+        span = now - t0
+        power = (e - ea) / 1e6 / span if span >= 2.5 and e >= ea else None
+        pkg_power = (e2 - eb) / 1e6 / span if span >= 2.5 and e2 >= eb else None
+        if now - link_t > 30:                   # the link can retrain (power saving, errors): re-read it
+            link = pcie_link(); link_t = now
+        temps = hw_temps(h) if h else {}
+        vram_ch = [v for k, v in temps.items() if k.startswith("vram_ch_")]
+        cap = rd(f"{h}/power1_cap") if h else None
+        used_mb = sum(c["vram_kb"] for c in cl.values()) // 1024
+        out = {
+            "name": name, "pci": PCI, "ts": now,
+            "vram_used_mb": used_mb, "vram_total_mb": TOTAL_MB,
+            "busy_pct": round(min(busy, 100), 1),
+            "temp_pkg": temps.get("pkg"), "temp_vram": temps.get("vram"),
+            "power_w": None if power is None else round(power, 1),
+            "pkg_power_w": None if pkg_power is None else round(pkg_power, 1),
+            "power_cap_w": round(int(cap) / 1e6) if cap and cap.isdigit() and int(cap) > 0 else None,
+            "temp_vram_max": max(vram_ch) if vram_ch else None,
+            "temp_pcie": temps.get("pcie"), "temp_mctrl": temps.get("mctrl"),
+            "pcie": link,
+            "host_load1": round(os.getloadavg()[0], 2), "host_cpus": os.cpu_count(),
+            "energy_j": round(e / 1e6, 1),           # cumulative card energy (hwmon energy1 = "card", uJ)
+            "fan_rpm": int(rd(f"{h}/fan1_input", "0") or 0) if h else None,
+            "freq_mhz": int(rd(glob.glob(f"/sys/bus/pci/devices/{PCI}/tile0/gt0/freq0/act_freq")[0], "0") or 0)
+                        if glob.glob(f"/sys/bus/pci/devices/{PCI}/tile0/gt0/freq0/act_freq") else None,
+        }
+        tmp = OUT + ".tmp"
+        with open(tmp, "w") as f: json.dump(out, f)
+        os.chmod(tmp, 0o644); os.replace(tmp, OUT)
+        prev, t_prev = cl, now
+        time.sleep(INTERVAL)
+
+if __name__ == "__main__":
+    main()
diff --git a/tools/intel/gpustat.service b/tools/intel/gpustat.service
new file mode 100644
index 00000000000..70796280372
--- /dev/null
+++ b/tools/intel/gpustat.service
@@ -0,0 +1,10 @@
+[Unit]
+Description=Intel Arc telemetry sampler -> /run/gpustat.json (Strata's Monitor tab: GPU load and VRAM)
+
+[Service]
+ExecStart=/usr/bin/python3 -u /usr/local/sbin/gpustat.py
+Restart=always
+RestartSec=5
+
+[Install]
+WantedBy=multi-user.target

From 4951fd05b4c45ca562889af19bca3356eee5f8d3 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 11:05:32 -0500
Subject: [PATCH 050/201] sycl: refresh the port to upstream 0.1.31

Re-migrated (dpct of 0.1.29 and 0.1.31, 3-way merge per file): 45 files
changed upstream, 38 conflicts resolved; verify.cpp, mtp.cpp and the new
conversation_state.cpp ported by hand; 7 new upstream files.

Fixed on the way:
- the port's grouped expert kernels stay the default: upstream's new multi
  kernels (8 rows a group) ran on the port's 32-row grid and wrote a quarter
  of each expert (end-of-text output); STRATA_EXPERT_SPLIT=1 runs them with
  their own grid. Lanes per row now selectable (STRATA_GU/DOWN_LANES)
- dpct's unparenthesised __fadd_rn: the native QSA indexer's per-token
  pooled key (decode), the native QSA scores and the s2 activation rounding
  replaced instead of added - from the first migration; fixups.py fixed
- doorbell waits: fixups.py bounds upstream's new spin spelling again
- prompt-slot borrowing hangs since upstream's rework: off by default
- the Turing PTX branch in qsa_prompt_attn, dp4a.hpp's __nanosleep, the
  coupled-draft capture signature, a duplicate kernel name
- gr_parity: the single-token GR read runs the multi kernels (bitwise)
- qsa_parity: a cross-queue copy race in the test itself

Decode 78.2 / 75.7 tok/s (Coder), 58.6 / 64.2 (IQ2_XS); 128K-256K complete.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |   72 +-
 sycl/CMakeLists.txt                           |   27 +-
 sycl/include/strata/core/coupled_draft.hpp    |   85 +
 sycl/include/strata/core/mtp.hpp              |   30 +-
 sycl/include/strata/core/session.hpp          |   29 +-
 sycl/include/strata/core/verify.hpp           |   17 +
 sycl/include/strata/kernels/dp4a.hpp          |   51 +
 sycl/include/strata/kernels/rope.hpp          |   14 +
 sycl/include/strata/kernels/rope_scaling.hpp  |  196 ++
 sycl/include/strata/kernels/sampler.hpp       |   18 +
 sycl/src/core/conversation_snapshot.cpp       |  289 +++
 sycl/src/core/conversation_snapshot_test.cpp  |  326 +++
 sycl/src/core/conversation_state.cpp          |  316 +++
 sycl/src/core/device.dp.cpp                   |   89 +-
 sycl/src/core/expert_source.cpp               | 1352 +++++++++--
 sycl/src/core/layer.cpp                       |    7 +-
 sycl/src/core/mtp.cpp                         |  122 +-
 sycl/src/core/native_dense.cpp                |    5 +-
 sycl/src/core/native_head.cpp                 |   40 +-
 sycl/src/core/pinned.dp.cpp                   |  222 +-
 sycl/src/core/session.cpp                     |   87 +-
 sycl/src/core/verify.cpp                      |  139 +-
 sycl/src/kernels/cuda/elementwise.dp.cpp      |   13 +-
 sycl/src/kernels/cuda/fused_gr.dp.cpp         |  526 ++++-
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       | 1380 +++++++++---
 .../src/kernels/cuda/native_flash_attn.dp.cpp |   16 +-
 .../src/kernels/cuda/native_gr_postops.dp.cpp |   24 +-
 sycl/src/kernels/cuda/native_mmvq.dp.cpp      |   59 +-
 .../kernels/cuda/native_qsa_indexer.dp.cpp    |   92 +-
 sycl/src/kernels/cuda/native_qsa_score.dp.cpp |    6 +-
 sycl/src/kernels/cuda/native_rope.dp.cpp      |   26 +-
 sycl/src/kernels/cuda/ple.dp.cpp              |    5 +-
 sycl/src/kernels/cuda/qsa.dp.cpp              |   16 +-
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp  |   36 +-
 sycl/src/kernels/cuda/rope.dp.cpp             |   41 +
 .../src/kernels/cuda/s2_expert_grouped.dp.cpp |  750 +++++--
 sycl/src/kernels/cuda/sampler.dp.cpp          |  249 ++-
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   |   18 +-
 sycl/src/kernels/iq_multi_parity.cpp          |  480 ++++
 sycl/src/kernels/iq_parity.cpp                |   80 +-
 sycl/src/kernels/ple_parity.cpp               |   56 +-
 sycl/src/kernels/qsa_parity.cpp               |  225 ++
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |    6 +-
 sycl/src/kernels/rope_parity.cpp              |  409 +++-
 sycl/src/kernels/s2_expert_grouped_parity.cpp |  790 +++++++
 sycl/src/prefill/gemm.dp.cpp                  |   93 +-
 sycl/src/prefill/kernels.dp.cpp               |   28 +-
 sycl/src/prefill/prefill.cpp                  |  121 +-
 sycl/src/program/generate.cpp                 | 1992 ++++++++++++-----
 sycl/tools/fixups.py                          |   19 +-
 50 files changed, 9438 insertions(+), 1651 deletions(-)
 create mode 100644 sycl/include/strata/core/coupled_draft.hpp
 create mode 100644 sycl/include/strata/kernels/dp4a.hpp
 create mode 100644 sycl/include/strata/kernels/rope_scaling.hpp
 create mode 100644 sycl/src/core/conversation_snapshot.cpp
 create mode 100644 sycl/src/core/conversation_snapshot_test.cpp
 create mode 100644 sycl/src/core/conversation_state.cpp
 create mode 100644 sycl/src/kernels/iq_multi_parity.cpp
 create mode 100644 sycl/src/kernels/s2_expert_grouped_parity.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 00a63a397fd..0fb6d97abbb 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -16,19 +16,19 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
 | | NVIDIA (Strata engine) | Intel Arc, Strata SYCL port | Intel Arc, llama.cpp |
 |---|---|---|---|
-| models | all four | the Coder IQ1_M; the original IQ2_XS too (experts beyond VRAM in the host mirror: 51-61 tok/s) | the Coder (fits VRAM) |
+| models | all four | the Coder IQ1_M; the original IQ2_XS too (experts beyond VRAM in the host mirror: 58-64 tok/s) | the Coder (fits VRAM) |
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **77.9 tok/s** (19-token prompt, 256 greedy tokens), **74.2** after a 2,184-token prompt, **66.1** after 128K, 54.1 after 256K; 48-72 through the API | 23-25 tok/s |
-| prompt reading | ~1,870 tok/s | **787 tok/s** at 2,184 tokens, 856 at 128K, 740 at 256K | ~150 tok/s (424 at 105K) |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **78.2 tok/s** (19-token prompt, 256 greedy tokens), **75.7** after a 2,184-token prompt, 59.5 after 128K, 48.7 after 256K; 48-72 through the API | 23-25 tok/s |
+| prompt reading | ~1,870 tok/s | **780 tok/s** at 2,184 tokens, 1,189 at 40K, 934 at 128K, 784 at 256K | ~150 tok/s (424 at 105K) |
 | speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
 | images | yes | not yet | not yet |
-| context | up to 262K | 256K measured, 54 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
+| context | up to 262K | 256K measured, 49 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
 on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
-tokens) on the 2026-10-01 build;
+tokens) on engine 0.1.31-sycl (2026-10-01);
 "Decode round 2" below lists what each change bought.
 
 ## Setup
@@ -298,24 +298,29 @@ output tokens between paths, never only timings.
   It costs ~1 s on short prompts (2,184 tokens: 610 vs 792 tok/s), so the port borrows by default only above a
   32K context (`--prefill-borrow` / `--no-prefill-borrow` decide explicitly).
 
-**Long contexts (2026-10-01, the current build, setup's flags: `--kv-resident 32768 --vram-reserve-mib 2048
---prefill 4096`, prompt-slot borrowing on).** Same text repeated to length, then 256 greedy tokens:
+**Long contexts (2026-10-01, engine 0.1.31-sycl, setup's flags: `--kv-resident 32768 --vram-reserve-mib 2048
+--prefill 4096`, prompt-slot borrowing off - see the 0.1.31 merge below).** Same text repeated to length, then 256
+greedy tokens:
 
-| context | KV | prompt | decode after | peak VRAM | experts in VRAM (of 12,288) |
+| context | KV | prompt | decode after | peak VRAM | experts in the host mirror |
 |---|---|---|---|---|---|
-| 128K | int8 | 856 tok/s (150 s) | **66.1 tok/s** | 29.9 GB | 12,288 |
-| 128K | q4_0 | 834 tok/s (153 s) | 62.4 tok/s | 29.7 GB | 12,288 |
-| 256K | int8 | 740 tok/s (346 s) | **54.1 tok/s** | 30.2 GB | 12,288 |
-| 256K | q4_0 | 726 tok/s (353 s) | 52.5 tok/s | 29.9 GB | 12,288 |
-| 128K | k8v4, KV in VRAM | **995 tok/s** (129 s) | 65.8 tok/s | 30.7 GB | 12,241 (47 in the host mirror) |
-| 256K | k8v4, KV in VRAM | **804 tok/s** (318 s) | 51.2 tok/s | 30.6 GB | 11,294 (994, 1.9 GB, in the host mirror) |
+| 128K | int8 | 934 tok/s (137 s) | **59.5 tok/s** | 29.7 GB | 1,040 (2.0 GB) |
+| 128K | q4_0 | 887 tok/s (144 s) | 53.4 tok/s | 29.3 GB | 1,073 |
+| 128K | k8v4, KV in VRAM | **1,026 tok/s** (125 s) | 54.4 tok/s | 29.5 GB | 1,523 (2.9 GB) |
+| 256K | int8 | 784 tok/s (327 s) | **48.7 tok/s** | 29.7 GB | 1,288 (2.5 GB) |
+| 256K | q4_0 | 763 tok/s (336 s) | 43.2 tok/s | 29.6 GB | 1,188 |
+| 256K | k8v4, KV in VRAM | 838 tok/s (305 s) | 42.3 tok/s | 29.5 GB | 2,327 (4.5 GB) |
+
+Before the merge, with borrowing (every expert in VRAM): 128K int8 856 / 66.1, 256K int8 740 / 54.1 tok/s. Without
+borrowing the prompt buffers keep their own VRAM, ~1,000-2,300 experts move to the pinned host mirror (planned item
+2) and decode pays ~10-17% for reading them over PCIe; the prompt is 4-9% faster.
 
 KV streaming (`--kv-resident`) keeps the whole KV in pinned host memory and only the attended window in VRAM, so
-every expert stays on the card at any context; setup.py turns it on from 64K up and keeps INT8 (the faster of the
+the KV pushes no experts out; setup.py turns it on from 64K up and keeps INT8 (the faster of the
 two at every size here). Without it the KV pushes experts out and decode after the prompt fell to 4-9 tok/s at
 128K-256K (2026-09-30). `--kv k8v4` does not support streaming yet: setup keeps its KV in VRAM, which pushes up to
-~1,000 experts out at 256K; those come from the pinned host mirror over PCIe (planned item 2), so decode holds at
-51 tok/s (it was 3.8 before the mirror). k8v4 reads prompts fastest (no streaming copies) and works through the FP32
+more experts out; those come from the pinned host mirror over PCIe (planned item 2), so decode holds at 42 tok/s at
+256K (it was 3.8 before the mirror). k8v4 reads prompts fastest (no streaming copies) and works through the FP32
 attention fallback (its dedicated prompt kernel is the XMX one below).
 
 **XMX prompt attention v2.** 64-cell chunks, vector-packed K^T and V, hi+lo Q in one accumulator per scale group,
@@ -469,6 +474,33 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 5. A fixup whose pattern upstream changed shows up as a compile error (the PTX gate became an `#elif`
    under upstream's `__HIPCC__` guard); extend the fixup, re-run it, rebuild.
 
+**The 0.1.31 merge (2026-10-01).** Upstream 0.1.29 -> 0.1.31 (132 commits) by the steps above: 45 migrated files
+changed for real (27 more only in dpct's kernel-name hashes), 38 conflicts resolved, verify.cpp/mtp.cpp/
+conversation_state.cpp ported by hand. A symbol audit (the port's feature identifiers counted before and after) is
+part of the procedure now: it caught a dropped mirror hook and four doorbell waits that had lost their spin bound
+(upstream renamed the loops; `fixups.py` covers both spellings). What the merge needed beyond conflicts:
+
+- **The expert kernels.** Upstream sends the i-quant experts to new multi kernels (one warp per row, 8 rows a
+  group); the port's grid is sized for its own kernels (8 lanes a row, 32 rows a group), so only a quarter of each
+  expert's rows were written and the output was end-of-text tokens. The port's kernels stay the default (they also
+  serve upstream's new Q4_K/Q5_K/Q5_1/Q8_0 experts); `STRATA_EXPERT_SPLIT=1` runs upstream's, with their grid.
+- **Prompt-slot borrowing hangs** in the first chunk of any prompt with it on (40K, 128K; GPU busy, no chunk ends)
+  since upstream's borrow rework. Off by default on SYCL (`--prefill-borrow` opts in); long prompts are faster
+  without it, decode after them ~10-17% slower (the table above). Open.
+- **Upstream's new tests found three dpct mistranslations from the first migration.** dpct writes `__fadd_rn(a, b)`
+  as `a + b` without parentheses, so `__fadd_rn(sum, c ? x : y)` became `sum + c ? x : y` (replaced, not added): in
+  the native QSA indexer's per-token pooled key (the decode path: blocks completed while generating got wrong
+  pooled keys; prompt blocks come from the batched kernel and were right), in the native QSA scores (an opt-in
+  path) and in the s2 activation rounding (every value 0; the Q2_0 s2 pack, unused here). Fixed, and `fixups.py`
+  now parenthesises. `qsa_parity`'s batch-vs-sequential test passes; decode output after long prompts changed.
+- **Upstream's new kernels against the port's on the B70** (decode tok/s, Coder 19 / 2,184-token prompts, IQ2_XS
+  19): port defaults 78.1 / 75.7 / 58.6; `STRATA_EXPERT_SPLIT=1` 65.6-69.5 / 67.2 / 49.1 (-11 to -16%);
+  `STRATA_GR_V3=1` 73.2 / 72.4 (-4 to -6%). Both stay opt-in.
+- **Speed after the merge:** Coder 78.2 / 75.7 tok/s (as before), IQ2_XS 58.6 / 64.2 (from 50.8 / 60.6).
+- **Still failing:** `iq_multi_parity` on IQ2_XS (type 17: the port's mmvq disagrees with the reference, old and new
+  kernel alike; no model here uses it), `s2_expert_grouped_parity` (the s2 path), `kv_hybrid_parity`'s last step
+  (needs the unported tensor-core prompt kernel). `ple_parity` and `native_expert_parity` need model files.
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
@@ -486,12 +518,12 @@ wherever upstream touched a file they mirror. They are refreshed by re-migration
 - Speculative decoding on the llama.cpp path (the GGUF carries no draft layer llama.cpp can use). The SYCL
   port has it (MTP draft layer, `--mtp`).
 
-## Measured, 2026-10-01, Arc Pro B70, Coder IQ1_M, 32K context, INT8 KV: the SYCL port
+## Measured, 2026-10-01, Arc Pro B70, Coder IQ1_M, 32K context, INT8 KV: the SYCL port (engine 0.1.31-sycl)
 
 | | |
 |---|---|
-| decode | 77.9 tok/s on a 19-token prompt, 74.2 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
-| prompt | 787 tok/s on 2,184 tokens; 856 tok/s at 128K, 740 at 256K |
+| decode | 78.2 tok/s on a 19-token prompt, 75.7 after a 2,184-token prompt (256 greedy tokens, MTP + suffix drafts) |
+| prompt | 780 tok/s on 2,184 tokens; 934 tok/s at 128K, 784 at 256K |
 | through the API | 48-72 tok/s on a ~190-token chat answer, prompt included (the first request after a start is the slower one) |
 | VRAM | all 12,288 experts resident, ~1.9 GB free with everything loaded (`--vram-reserve-mib 1024`) |
 | RAM | no host copy of the experts (`--stream-experts`) |
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 11be21cab35..c7e3697a368 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.24 LANGUAGES C CXX)
+project(strata_sycl VERSION 0.1.31 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
@@ -120,12 +120,14 @@ if(STRATA_NATIVE_EXPERTS)
     endif()
     add_subdirectory(${strata_llamacpp_SOURCE_DIR}/ggml ${CMAKE_BINARY_DIR}/ggml EXCLUDE_FROM_ALL)
   endif()
-  strata_resolve(_cpu_native src/kernels/cpu/native_expert.cpp src/kernels/cpu/iq_avx512.cpp src/kernels/cpu/iq_avx2.cpp)
+  strata_resolve(_cpu_native src/kernels/cpu/native_expert.cpp src/kernels/cpu/iq_avx512.cpp src/kernels/cpu/iq_avx2.cpp
+                             src/kernels/cpu/kq_avx2.cpp)   # 0.1.31: the Q4_K/Q5_K/Q5_1/Q8_0 expert rows
   target_sources(strata_kernels_cpu PRIVATE ${_cpu_native})
   target_include_directories(strata_kernels_cpu PRIVATE ${STRATA_ROOT}/third_party/ggml)
   set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/iq_avx512.cpp PROPERTIES COMPILE_OPTIONS
     "-mavx512f;-mavx512bw;-mavx512vl;-mavx512dq;-mavx512vnni;-mavx512vbmi;-mf16c;-mfma")
   set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/iq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
+  set_source_files_properties(${STRATA_ROOT}/src/kernels/cpu/kq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
   target_link_libraries(strata_kernels_cpu PUBLIC ggml-cpu ggml-base)
   target_compile_definitions(strata_kernels_cpu PUBLIC STRATA_NATIVE_EXPERTS=1)
 endif()
@@ -153,8 +155,10 @@ target_link_libraries(strata_kernels PUBLIC strata_core)
 
 strata_resolve(_engine src/core/layer.cpp src/core/session.cpp src/core/expert_source.cpp src/core/remote_experts.cpp
                        src/core/expert_cache.cpp src/core/native_head.cpp src/core/native_dense.cpp src/core/verify.cpp
-                       src/core/mtp.cpp)
+                       src/core/mtp.cpp src/core/conversation_snapshot.cpp src/core/conversation_state.cpp
+                       src/core/conversation_memory.cpp)   # 0.1.31: the conversation snapshots (#216)
 add_library(strata_engine STATIC ${_engine} ${CMAKE_CURRENT_SOURCE_DIR}/src/core/gguf_expert_source.cpp)
+target_include_directories(strata_engine PRIVATE ${STRATA_ROOT}/src/core)   # conversation_checked.hpp (#include "...")
 target_link_libraries(strata_engine PUBLIC strata_core strata_kernels strata_kernels_cpu)
 
 # cuBLAS -> oneMKL through dpct::blas (needs the MKL SYCL BLAS domain)
@@ -180,6 +184,23 @@ if(STRATA_SYCL_PARITY)
     target_link_libraries(${p}_parity PRIVATE strata_kernels)
     add_test(NAME ${p}_parity COMMAND ${p}_parity --selftest)
   endforeach()
+  # 0.1.31: the IQ kernels that decode a weight part once for every column/entry, bitwise vs the per-column ones
+  # (no --selftest flag: it runs its checks by default), and the rewritten per-hit/grouped expert kernels vs the
+  # previous ones, bitwise
+  strata_resolve(_src src/kernels/iq_multi_parity.cpp)
+  add_executable(iq_multi_parity ${_src})
+  target_link_libraries(iq_multi_parity PRIVATE strata_kernels)
+  add_test(NAME iq_multi_parity COMMAND iq_multi_parity)
+  strata_resolve(_src src/kernels/s2_expert_grouped_parity.cpp)
+  add_executable(s2_expert_grouped_parity ${_src})
+  target_link_libraries(s2_expert_grouped_parity PRIVATE strata_kernels)
+  add_test(NAME s2_expert_grouped_parity COMMAND s2_expert_grouped_parity --selftest)
+  # the conversation snapshots (#216) against the engine, as upstream's STRATA_BUILD_CONVERSATION_TESTS
+  strata_resolve(_src src/core/conversation_snapshot_test.cpp)
+  add_executable(conversation_snapshot_test ${_src})
+  target_link_libraries(conversation_snapshot_test PRIVATE strata_engine)
+  add_test(NAME conversation_snapshot_test COMMAND conversation_snapshot_test)
+  set_tests_properties(conversation_snapshot_test PROPERTIES SKIP_RETURN_CODE 77 TIMEOUT 120)
   # the prompt-attention parity takes a context length, not --selftest, and needs the tensor-core kernel (not
   # ported yet: it reports "refused the pools" here). Built, not registered.
   strata_resolve(_src src/kernels/qsa_prompt_attn_parity.cpp)
diff --git a/sycl/include/strata/core/coupled_draft.hpp b/sycl/include/strata/core/coupled_draft.hpp
new file mode 100644
index 00000000000..78e6c9390d0
--- /dev/null
+++ b/sycl/include/strata/core/coupled_draft.hpp
@@ -0,0 +1,85 @@
+// include/strata/core/coupled_draft.hpp - COUPLED DRAFT SAMPLING (STRATA_SPEC_COUPLED=1, off by default).
+//
+// Under sampling the verify window samples row t of a window at position pos0 as Philox(seed, pos0 + t) over the
+// sampler chain (penalties -> top_k -> top_p -> min_p -> temperature -> inverse-CDF pick; verify.cpp run(),
+// sampler.cu), and a draft is kept only when it EQUALS that row's pick.  The output is therefore a function of the
+// seed alone, whatever the drafts are: drafts only decide how many tokens a window yields.
+//
+// The MTP draft layer used to propose its ARGMAX.  In coupled mode it SAMPLES instead, with the target's own chain
+// (the request's top_k / top_p / min_p / temperature and penalties over the same history) and the SAME uniform the
+// target will draw for the row that verifies the draft.  When the draft's distribution is close to the target's,
+// the two inverse-CDF picks from one uniform agree far more often than an argmax agrees with a sample; the target's
+// pick - and so the text - does not change, because verification is still exact-match against the target's sample.
+//
+// THE COUNTER ARITHMETIC (all positions are sequence indices; a window's row t holds the token at pos0 + t and its
+// pick is the token at pos0 + t + 1, drawn with counter pos0 + t):
+//   * MTP cell c pairs the main model's residual at position c with the token at c + 1 and predicts the token at
+//     c + 2 (mtp.hpp).
+//   * After a window at p with a drafts accepted, the next window starts at p' = p + a + 1 (its row 0 is the token
+//     the window picked at row a).  Chain step j (j = 0 ..) runs at cell p + a + j and predicts the token at
+//     p + a + j + 2 = p' + j + 1: row j + 1 of the next window, VERIFIED BY ROW j's pick, counter p' + j.
+//   * So a draft made at cell c is verified with counter c + 1 - whatever the window size T, the accepted count, a
+//     suffix-drafter window in between (its drafts are then simply not used), or `draft_first` (cell p - 1, a = 0 for
+//     a window at p).  The kernel reads c from the step record the host already stages for the cell (device memory,
+//     so the captured graphs replay with each round's own counter), and the seed and chain from a device copy of the
+//     request's SamplerParams, refreshed at the start of every round graph.
+//
+// THE PENALTY HISTORY.  The verify row j of the next window counts penalties over penalty_rows(consumed', window')
+// row j: the last h of (consumed', x', drafts 0 .. j-1), where consumed' is what the session holds after the commit
+// and x' the window's pick at row a.  The drafter keeps a device RING of kCoupledHistCap + max_t slots: the host
+// stages the base (the last h of consumed' + x', -1 padded in front) in [cap - h, cap) before the round, and draft j
+// writes its token to cap + j - so draft j's window is [cap + j - h, cap + j), exactly the row the target will use.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/sampler.hpp"
+
+#include <algorithm>
+#include <cstdint>
+#include <cstdlib>
+#include <cstring>
+
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
+#define STRATA_COUPLED_HD 
+#else
+#define STRATA_COUPLED_HD
+#endif
+
+namespace strata::core {
+
+/// The longest penalty window the coupled drafter mirrors (serve's kPenaltyWindowCap).
+inline constexpr int kCoupledHistCap = 4096;
+
+/// STRATA_SPEC_COUPLED=1 (any value but empty or "0"): read once.
+inline bool coupled_draft_env() {
+    static const bool on = [] {
+        const char* e = std::getenv("STRATA_SPEC_COUPLED");
+        return e != nullptr && *e != '\0' && std::strcmp(e, "0") != 0;
+    }();
+    return on;
+}
+
+/// The MTP cell of chain step j after a window at `p` with `a` drafts accepted (draft() runs step j there).
+STRATA_COUPLED_HD inline int64_t coupled_draft_cell(int64_t p, int a, int j) { return p + a + j; }
+
+/// The Philox counter the verify window will draw for the row that checks the draft made at MTP cell `cell`.
+STRATA_COUPLED_HD inline uint64_t coupled_draft_counter(int64_t cell) { return (uint64_t) (cell + 1); }
+
+/// The penalty window the draft layer and the target use: min(penalty_last_n, cap), 0 when penalties are off.
+STRATA_COUPLED_HD inline int coupled_hist_len(int penalty_last_n, int cap) {
+    return penalty_last_n <= 0 ? 0 : (penalty_last_n < cap ? penalty_last_n : cap);
+}
+
+/// Where draft j's penalty window starts in the ring (base in [cap - h, cap), draft i at cap + i).
+STRATA_COUPLED_HD inline int coupled_hist_start(int cap, int j, int h) { return cap + j - h; }
+
+/// The ring's base on the host: the last `h` tokens of (tail[0..n_tail), next), -1 padded in front, into
+/// out[0..h) - row 0 of `penalty_rows` for the one-token window [next].
+inline void coupled_hist_base(const int32_t* tail, int64_t n_tail, int32_t next, int h, int32_t* out) {
+    if (h <= 0) return;
+    strata::kernels::penalty_rows(tail, n_tail, &next, 1, h, out);
+}
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/core/mtp.hpp b/sycl/include/strata/core/mtp.hpp
index cfd2896c1a5..c5726b461f9 100644
--- a/sycl/include/strata/core/mtp.hpp
+++ b/sycl/include/strata/core/mtp.hpp
@@ -23,6 +23,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/core/layer.hpp"
 #include "strata/core/session.hpp"
+#include "strata/kernels/sampler.hpp"
 
 #include <cstdint>
 #include <algorithm>
@@ -51,9 +52,9 @@ class MtpDrafter {
     /// SYCL port: capture the round, step and prompt graphs at load rather than on first use (see Verifier::warm)
     bool warm(std::string& err) {
         for (int T = 1; T <= max_t_; ++T)
-            if (!capture_round(T, err) || !capture_prefill(T, err)) return false;
+            if (!capture_round(T, false, err) || !capture_prefill(T, err)) return false;
         for (int j = 1; j < std::min(max_t_ - 1, max_drafts_); ++j)
-            if (!capture_step(j, err)) return false;
+            if (!capture_step(j, false, err)) return false;
         return true;
     }
     uint64_t vram_bytes() const { return vram_; }
@@ -82,6 +83,16 @@ class MtpDrafter {
     bool draft_first(int T, const float* R_row, int32_t token, int64_t cell, int32_t* drafts, std::string& err,
                      float* probs = nullptr, float min_p = 0.0f, int* n_drafts = nullptr);
 
+    /// COUPLED DRAFT SAMPLING (core/coupled_draft.hpp; STRATA_SPEC_COUPLED=1, set up by bind()): the request's
+    /// sampling.  A sampled request (temperature > 0, not greedy) then drafts by SAMPLING with the target's chain and
+    /// the target's Philox draw for the verifying row, and `probs` is the draft's probability under that chain; a
+    /// greedy one keeps the argmax drafts and their graphs.  A no-op when the switch is off.
+    void set_draft_sampling(const strata::kernels::SamplerParams& sp);
+    /// Coupled mode with penalties: the history the next draft() chain starts from - what the session holds after the
+    /// window's commit (`tail`) and the window's pick at its last accepted row (`next`, the next window's row 0).
+    void set_draft_history(const int32_t* tail, int64_t n_tail, int32_t next);
+    bool coupled() const { return coupled_active_; }
+
     double ms_draft = 0, ms_prefill = 0;
     int64_t rounds = 0;
 
@@ -110,9 +121,20 @@ class MtpDrafter {
                         std::string &err);
     bool capture_prefill(int T, std::string& err);
     bool capture_prefill_dev(int T, std::string& err);   ///< E-4: without the mapped staging (inputs copied on device)
-    bool capture_round(int T, std::string& err);
-    bool capture_step(int j, std::string& err);
+    bool capture_round(int T, bool coupled, std::string& err);
+    bool capture_step(int j, bool coupled, std::string& err);
     dpct::experimental::command_graph_exec_ptr step_exec_[9] = {};
+    // coupled draft sampling: its own round/step graphs (the argmax ones stay as they were), the request's
+    // parameters and the penalty ring (mapped staging + device copies), the split scratch, token id -> subset index
+    bool setup_coupled(std::string& err);
+    dpct::experimental::command_graph_exec_ptr round_exec_c_[9] = {};
+    dpct::experimental::command_graph_exec_ptr step_exec_c_[9] = {};
+    bool coupled_ok_ = false, coupled_active_ = false;
+    bool coupled_rec_ = false;   ///< record_forward: the full layer ends in the coupled sampler (draft coupled_j_)
+    int coupled_j_ = 0;
+    strata::kernels::SamplerParams *h_cparams_ = nullptr, *m_cparams_ = nullptr, *cparams_ = nullptr;
+    int32_t *h_chist_ = nullptr, *m_chist_ = nullptr, *cring_ = nullptr, *dinv_ = nullptr;
+    void* cscratch_ = nullptr;
     const float* f32(const char* name) const;
     const uint16_t* bf16(const char* name) const;
     const void* q8(const char* name) const;
diff --git a/sycl/include/strata/core/session.hpp b/sycl/include/strata/core/session.hpp
index 633a62d5c96..526dc3dfff9 100644
--- a/sycl/include/strata/core/session.hpp
+++ b/sycl/include/strata/core/session.hpp
@@ -45,6 +45,20 @@ struct SessionState {
 
     float* R = nullptr;             ///< alias of `block.R`, named for what it means at this level
     int64_t k = 10;                 ///< experts per token
+
+    // **THE LAYER-RANGE CARVE (multi-GPU).**  A split stage's session used to carve state for ALL 48 layers
+    // (every QSA KV pool at max_cells, every GDN recurrence) while running only its slice - the same
+    // whole-model-sized-buffer disease the QSA chunked-prefill PR cured upstream.  A session now owns
+    // [layer_lo, layer_hi): `qsa_states`/`gdn_state` keep GLOBAL ordinal indexing, the arrays simply hold
+    // fewer rows, so per-layer consumers subtract `gdn_ord0`, and every old model-level `qsa_states[0]` use
+    // (the shared RoPE table, the prefill staging identity, the MTP rope borrow) reads `qsa_states[primary]`.
+    // A range with no QSA layer still carves ONE primary state so those model-level uses stay valid.
+    int64_t layer_lo = 0, layer_hi = 0;   ///< resolved by `session_init` (hi = n_layers for the full range)
+    int64_t qsa_ord0 = 0;                 ///< global QSA ordinal of the first allocated state
+    int64_t qsa_alloc = 0;                ///< allocated QSA states (>= 1 whenever the model has any)
+    int64_t gdn_ord0 = 0;                 ///< global GDN ordinal of `gdn_state` row 0
+    int64_t gdn_alloc = 0;                ///< allocated GDN rows
+    int qsa_primary() const { return (int) qsa_ord0; }
     /// The doorbell the host loop polls.  Null until a caller provides one - the engine runs without it, and
     /// neither `session_token` nor `session_replay` looks at it.
     const Doorbell* db = nullptr;
@@ -76,9 +90,15 @@ struct SessionState {
 /// Bytes for a whole session at `max_cells` of context.  Every layer's state is sized at once, because P2.T10
 /// requires ZERO token-path allocations - a `cudaMalloc` that happened on the first token of a longer sequence
 /// would satisfy every test here and fail that one.
-uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k);
-/// Carves `base` (DEVICE memory) into `s`.  Returns the bytes used.
-uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s);
+///
+/// [layer_lo, layer_hi) carves only that range's per-layer state (a split stage runs a slice of the model);
+/// the default full range is byte-identical to the old whole-model carve.  Pure arithmetic - safe to call for
+/// a candidate range before anything is allocated, which is how the layer-split search prices a placement.
+uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k, int64_t layer_lo = 0,
+                       int64_t layer_hi = -1);
+/// Carves `base` (DEVICE memory) into `s`.  Returns the bytes used.  Same range convention as `session_bytes`.
+uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s,
+                      int64_t layer_lo = 0, int64_t layer_hi = -1);
 /// Zeroes every layer's state - the residual to `R_init`, everything else to zero, so a fresh sequence starts
 /// from the reference's own `zeros()`.
 void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init, void* stream);
@@ -213,7 +233,8 @@ struct SessionGraphs {
 /// replay re-reads every token - so the position is data, not an argument.  That is the whole reason rounds
 /// 211-214 moved the per-token counts into device buffers.
 bool session_capture(const WeightTable& tables, const ModelGeometry& g, SessionState& s, const float* parts,
-                     SessionGraphs& gr, std::string& err, bool split = false);
+                     SessionGraphs& gr, std::string& err, bool split = false, int64_t layer_lo = 0,
+                     int64_t layer_hi = -1);
 
 /// One token by REPLAYING the captured graphs.  Identical arithmetic to `session_token`; the only difference is
 /// that ~2,000 kernel launches become 48 graph launches.
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index ff53fe58626..7d8bfb0d576 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -30,6 +30,7 @@
 #include "strata/core/session.hpp"
 #include "strata/kernels/sampler.hpp"
 
+#include <atomic>
 #include <cstdint>
 #include <chrono>
 #include <string>
@@ -61,6 +62,12 @@ class Verifier {
     /// The watchdog's view of the window in flight (issue #31): the layer, the GPU's sequence, the flags.
     void diag(std::FILE* f) const;
 
+    /// #267: raise every flag the window's spin kernels wait on past any ring (UINT32_MAX), so a window the GPU
+    /// cannot finish drains instead of staying resident, then wait up to `timeout_ms` for its streams.  For the
+    /// paths that give up on the engine (a timed-out window, the serve watchdog): the window then ran on whatever
+    /// the flags guarded, so this verifier refuses every later window.  True when the streams finished.
+    bool release_gpu_waits(int timeout_ms);
+
     /// `max_t` <= kVerifyMaxT.  `head` may be null (the canonical head is then run per token).
     bool init(const WeightTable& wt, const ModelGeometry& g, SessionState& ss, const VerifyHits& hits,
               const NativeHead* head, int max_t, std::string& err);
@@ -117,6 +124,15 @@ class Verifier {
     /// request does not pay for them (a 2,400-node graph takes tens of ms to finalize on this backend).
     bool warm(std::string& err);
 
+    /// Measurement hook (STRATA_LOGPOS): after run(), write one line per row t of the last window's head -
+    /// "pos target logprob top top_logprob hit extra_logprob target_logprob_without_extra" - where row t is the
+    /// distribution at pos0 + t, targets[t] is the token at pos0 + t + 1, extra_logprob is the log-probability of
+    /// `extra_id` in the same row, and the last column is the target's log-probability in that row renormalized
+    /// over every token but `extra_id` (both nan when they do not apply).  A layer split's earlier stage forwards
+    /// to the stage that holds the head.
+    bool window_logprobs(const int32_t* targets, int T, int64_t pos0, int32_t extra_id, std::FILE* out,
+                         std::string& err);
+
     /// Token t's residual after the last layer, (hc, n_embd) on the device, valid until the next `run`.
     const float* final_R(int t) const;
     const float* final_R_all() const { return next_ ? next_->final_R_all() : R_; }
@@ -152,6 +168,7 @@ class Verifier {
     int hist_len_ = 0;
     bool head_sampling_ = true;          ///< set_head_sampling
     int device_ = -1;                    ///< the device `init` ran on: run/commit switch to it (layer split)
+    std::atomic<bool> released_{false};  ///< #267: release_gpu_waits ran (maybe on the watchdog thread): no more windows
     bool device_plan_ = false;            ///< E-6: resident-only layers planned on the device (STRATA_VERIFY_DEVICE_PLAN)
     uint32_t* skip_ = nullptr;            ///< E-6: per group, the ring whose plan the device built (0: the host's)
     unsigned long long* slot_off_d_ = nullptr;   ///< E-6: the slot offsets on the device
diff --git a/sycl/include/strata/kernels/dp4a.hpp b/sycl/include/strata/kernels/dp4a.hpp
new file mode 100644
index 00000000000..89f7ba86aae
--- /dev/null
+++ b/sycl/include/strata/kernels/dp4a.hpp
@@ -0,0 +1,51 @@
+// include/strata/kernels/dp4a.hpp - the two instructions the kernels use that Pascal (sm_60) does not have.
+//
+// The engine is written for compute capability 7.5 and newer and refuses older cards at CMake configure time
+// (a Pascal build passes -DSTRATA_EXPERIMENTAL_SM60=ON).  A GP100-class card is compute capability 6.0, which is
+// missing exactly two things the i-quant kernels rely on:
+//
+//   * `__dp4a`, a byte-wise dot product, available from 6.1 (Pascal GP10x/GV11x).  Its fallback below is
+//     llama.cpp's own (`ggml/src/ggml-cuda/common.cuh`), which is the reference for the kernels in this
+//     directory: they are transcribed from llama.cpp's vecdotq.cuh, and that wrapper's operands are the same
+//     sites.  It reinterprets the operands as SIGNED bytes and accumulates in int32, which is what `__dp4a`
+//     does for these calls, so the fallback is bit-exact rather than merely close.
+//   * `__nanosleep`, available from 7.0 (Volta).  It only paces single-thread doorbell waits, so a loop that
+//     spins without it is correct, merely busier.
+//
+// Both are compile-time selections on `__CUDA_ARCH__`, so one source tree builds for Pascal and for RTX
+// 20/30/40/50 without a #define at the call sites.  A HIP build never takes either fallback: `__CUDA_ARCH__` is
+// undefined there, so `STRATA_DP4A` is `__dp4a` (which `hip_compat/intrinsics.hpp` provides) and the pause is
+// HIP's own `__nanosleep`.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cstdint>
+#include <time.h>
+
+#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP < 610
+__device__ __forceinline__ int strata_dp4a(const int a, const int b, const int c) {
+    const int8_t* a8 = (const int8_t*) &a;
+    const int8_t* b8 = (const int8_t*) &b;
+    return c + a8[0] * b8[0] + a8[1] * b8[1] + a8[2] * b8[2] + a8[3] * b8[3];
+}
+#define STRATA_DP4A(a, b, c) strata_dp4a((a), (b), (c))
+#else
+#define STRATA_DP4A(a, b, c) dpct::dp4a((a), (b), (c))
+#endif
+
+/// Yield the thread while a doorbell flag is being polled.  The length of the pause is a backoff hint, not a
+/// contract, and only pre-Volta CUDA has no `__nanosleep` at all.
+__dpct_inline__ void strata_spin_pause() {
+#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP < 700
+    // sm_6x: the loop spins.  Every call site is a single-thread doorbell wait, so nothing else is delayed.
+#else
+    /*
+    DPCT1008: __nanosleep function is not defined in SYCL. This is a
+    hardware-specific feature. Consult with your hardware vendor to find a
+    replacement.
+    */
+    // SYCL port: no __nanosleep; the doorbell waits are bounded by strata::kSpinMax instead
+#endif
+}
diff --git a/sycl/include/strata/kernels/rope.hpp b/sycl/include/strata/kernels/rope.hpp
index be6a53bdca4..34adf305914 100644
--- a/sycl/include/strata/kernels/rope.hpp
+++ b/sycl/include/strata/kernels/rope.hpp
@@ -6,6 +6,12 @@
 // The cos/sin table is built on the HOST in float64 (see src/kernels/cuda/rope.cu for why) and the kernel is
 // a pure rotation over it.  The table depends on (n_rot, theta, position) and not on the token, so it is worth
 // caching; `build_rope_table` fills `max_pos` positions of `n_rot/2` pairs each.
+//
+// ROPE SCALING RIDES IN THE TABLE, NOT IN THE KERNEL.  The kernels below read cos/sin values and
+// cannot tell a scaled table from an unscaled one - with scaling on, the scaled angles (and YaRN's
+// mscale magnitude correction, folded into the same values) simply ARE the table.  That is why
+// neither `rope_neox_apply` nor the indexer's pooling kernel takes any scaling argument: the config
+// enters once, here, at build time (`rope_scaling.hpp`).
 #pragma once
 
 #define DPCT_PROFILING_ENABLED
@@ -13,6 +19,8 @@
 #include <dpct/dpct.hpp>
 #include <cstdint>
 
+#include "strata/kernels/rope_scaling.hpp"
+
 #if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 #define STRATA_ROPE_HD 
 #else
@@ -41,6 +49,12 @@ STRATA_ROPE_HD inline void rope_neox_pair(float a, float b, float c, float s, fl
 
 void build_rope_table(int n_rot, double theta, int max_pos, float* cos_tab, float* sin_tab);
 
+/// The same table under the process's rope scaling (rope_scaling.hpp).  For `RopeScalingType::None`
+/// this IS the five-argument builder above - the parity test holds the two to be bit-identical - and
+/// for linear/YaRN the scaled angles (YaRN's mscale included) replace them.  The math is ggml's,
+/// transcribed; see the header of `rope_scaling.hpp` for what arrives from where.
+void build_rope_table(int n_rot, const RopeScaling& scaling, int max_pos, float* cos_tab, float* sin_tab);
+
 // `x` and `out` are (rows, head_dim) and `pos` is (rows,) - one position per row, so a batch of heads at
 // different sequence positions is one call.  `cos_tab`/`sin_tab` are (max_pos, n_rot/2).  `out` may equal `x`.
 //
diff --git a/sycl/include/strata/kernels/rope_scaling.hpp b/sycl/include/strata/kernels/rope_scaling.hpp
new file mode 100644
index 00000000000..5512e59b339
--- /dev/null
+++ b/sycl/include/strata/kernels/rope_scaling.hpp
@@ -0,0 +1,196 @@
+// include/strata/kernels/rope_scaling.hpp - rope scaling: extending the context past the trained one.
+//
+// WHAT IT IS.  The artifact's RoPE is trained over `orig_ctx` positions (the artifact ships no
+// `rope.scaling` keys, so this is a pure runtime feature).  Scaling re-uses positions past that by
+// rescaling the rotation angles.  Three types, the llama.cpp set:
+//
+//   none    freq_scale 1, no correction                      - today's behaviour, exactly
+//   linear  Position Interpolation: angles shrunk by 1/factor - every position fits again, all
+//           frequencies compressed uniformly
+//   yarn    YaRN: high-frequency pairs keep their trained angles (extrapolate), low-frequency
+//           pairs are interpolated, and the pairs in between blend - plus a magnitude correction
+//           `mscale` that keeps the attention temperature where training put it
+//
+// THE MATH IS GGML'S, TRANSCRIBED, NOT RE-DERIVED.  `third_party/llama.cpp` is vendored and is the
+// numerical contract (the same standing `native_rope.cu` declares): ramp, correction dims, the
+// interpolation mix and the mscale formula below are line-for-line that source, with the MIT
+// attribution at each helper.  The one deliberate deviation is bookkeeping: ggml's device kernel
+// speaks in even dim indices (`i0`) and halves them inside the ramp, while every Strata rope kernel
+// speaks in PAIR indices - so `rope_yarn_ramp` here takes the pair index and compares it against
+// `corr_dims` directly.  Same numbers, one less division per call site.
+//
+// HOW IT REACHES THE ROPE.  Two forms, one config:
+//
+//   - the TABLE path (the default decode path, the indexer's pooled key) never changes its kernels:
+//     scaling is baked into the cos/sin contents by `build_rope_table`, which the parity test checks
+//     bit-exactly against a float64 reference;
+//   - the ANALYTIC paths (`--native-rope`, the native indexer, prefill) get the resolved constants
+//     as kernel arguments.
+//
+// **PROCESS CONSTANTS, SET ONCE BEFORE CAPTURE.**  A CUDA graph bakes kernel ARGUMENTS at capture
+// time, so the scaling must be fixed before `session_init` captures the layers - which is exactly
+// the constraint the per-token values already respect by living in device memory (`st.pos_dev`).
+// `rope_scaling_set()` is called once from the engine's startup, after CLI and GGUF defaults meet,
+// before any graph exists.  There is deliberately no way to change it mid-process: the K already in
+// the cache is stored POST-RoPE, so a mid-run change would mix two scalings in one cache.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include <cmath>
+
+#if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
+#define STRATA_ROPE_SCALING_HD 
+#else
+#define STRATA_ROPE_SCALING_HD
+#endif
+
+namespace strata::kernels {
+
+enum class RopeScalingType { None, Linear, YaRN };
+
+/// The float32 constants the ANALYTIC rotation kernels take (`rope_scaled_angle`'s arguments).  The defaults are
+/// the identity: freq_scale 1, no correction, magnitude 1 - with them the helper computes `cosf(theta) * 1.0f`
+/// on `1.0f * theta`, which is exactly today's unscaled `cosf(theta)` bit for bit.
+struct RopeKernelArgs {
+    float freq_scale = 1.0f;
+    float corr_low = 0.0f;
+    float corr_high = 0.0f;
+    float ext_factor = 0.0f;
+    float attn_factor = 1.0f;
+};
+
+/// The one rope configuration, as the CLI flag family and the (future) GGUF rope keys resolve to.
+///
+/// Default-constructed this is EXACTLY today's engine: freq_scale 1, mscale 1, no correction.  That
+/// identity is a regression gate, not a coincidence - the parity test compares the default's table
+/// against the pre-scaling builder bit for bit.
+struct RopeScaling {
+    RopeScalingType type = RopeScalingType::None;
+    double freq_base = 1e7;    ///< `rope.freq_base` (the value pinned by `qsa_freq_base()`)
+    double factor = 1.0;       ///< `--rope-scale`: how far past the trained context the run goes
+    double freq_scale_in = 0;  ///< `--rope-freq-scale`: the raw ggml knob; 0 = 1/factor
+    double orig_ctx = 262144;  ///< `--yarn-orig-ctx`: the context the model was trained over
+    double ext_factor = 0;     ///< `--yarn-ext-factor`: correction depth; 0 = off, 1 = full YaRN
+    double attn_factor = 1.0;  ///< `--yarn-attn-factor`: extra magnitude scale (ggml's attn_factor)
+    double beta_fast = 32.0;   ///< `--yarn-beta-fast`
+    double beta_slow = 1.0;    ///< `--yarn-beta-slow`
+
+    /// The angle shrink.  ggml's `freq_scale`: 1 means "the trained angles", 1/factor squeezes
+    /// `factor` positions into the trained range.
+    double freq_scale() const {
+        if (type == RopeScalingType::None) return 1.0;
+        return freq_scale_in > 0 ? freq_scale_in : 1.0 / factor;
+    }
+
+    /// The magnitude correction.  ggml's `rope_yarn` multiplies cos and sin by this; the log term
+    /// rides on `ext_factor != 0` (not on the type), exactly as that source has it.  With the
+    /// default knobs YaRN factor F gives `1 + 0.1*ln(F)` - YaRN's temperature correction.
+    double mscale() const {
+        if (ext_factor == 0) return attn_factor;
+        return attn_factor * (1.0 + 0.1 * std::log(1.0 / freq_scale()));
+    }
+
+    /// The correction window, in PAIR indices: below `out[0]` pairs extrapolate (keep the trained
+    /// angles), above `out[1]` they interpolate, in between they blend.  Transcribed from ggml's
+    /// `ggml_rope_yarn_corr_dims` (see the derivation comment at `rope_yarn_corr_dim` below).
+    void corr_dims(int n_rot, double out[2]) const {
+        const double start = std::floor(rope_yarn_corr_dim(n_rot, orig_ctx, beta_fast, freq_base));
+        const double end = std::ceil(rope_yarn_corr_dim(n_rot, orig_ctx, beta_slow, freq_base));
+        out[0] = start < 0 ? 0 : start;
+        out[1] = end > (double) (n_rot - 1) ? (double) (n_rot - 1) : end;
+    }
+
+    /// The analytic kernels' constants.  `none` returns the identity constants WHATEVER the other knobs hold -
+    /// the table builder ignores them for `none` too, so the two rotation forms cannot disagree there, and an
+    /// unscaled run computes exactly what it computed before scaling existed.  Linear/YaRN: ggml's `rope_yarn`
+    /// arguments (`attn_factor` is the raw knob; the helper applies the log term when correcting).
+    RopeKernelArgs kernel_args(int n_rot) const {
+        RopeKernelArgs a;
+        if (type == RopeScalingType::None) return a;
+        double cd[2];
+        corr_dims(n_rot, cd);
+        a.freq_scale = (float) freq_scale();
+        a.corr_low = (float) cd[0];
+        a.corr_high = (float) cd[1];
+        a.ext_factor = (float) ext_factor;
+        a.attn_factor = (float) attn_factor;
+        return a;
+    }
+
+private:
+    /// ggml/src/ggml.c: "Apparently solving `n_rot = 2pi * x * base^((2 * max_pos_emb) / n_dims)`
+    /// for x, we get `corr_dim(n_rot) = n_dims * log(max_pos_emb / (n_rot * 2pi)) / (2 * log(base))`".
+    /// float64 rather than ggml's float32: the table path computes in float64 and is held to a
+    /// bit-exact float64 reference, so its inputs are float64 too.
+    static double rope_yarn_corr_dim(int n_dims, double n_ctx_orig, double n_rot, double base) {
+        return (double) n_dims * std::log(n_ctx_orig / (n_rot * 2.0 * 3.14159265358979323846)) /
+               (2.0 * std::log(base));
+    }
+};
+
+/// The ramp between extrapolation (1) and interpolation (0).
+///
+/// ggml/src/ggml-cuda/rope.cu `rope_yarn_ramp`: `1 - clamp(y, 0, 1)` with
+/// `y = (i0 / 2 - low) / max(0.001, high - low)`.  ggml passes the even dim index `i0`; this takes
+/// the pair index (ggml's `i0/2`) so Strata's pair-indexed kernels don't re-derive the mapping.  The
+/// 0.001 floor on the denominator is ggml's, kept verbatim: `corr_dims` can produce low == high.
+STRATA_ROPE_SCALING_HD inline float rope_yarn_ramp(float low, float high, int pair) {
+    const float y = ((float) pair - low) / (high - low > 0.001f ? high - low : 0.001f);
+    const float clamped = y < 0.0f ? 0.0f : (y > 1.0f ? 1.0f : y);
+    return 1.0f - clamped;
+}
+
+/// The scaled angle for one pair, float32, the ANALYTIC paths' contract (pinned ggml arithmetic).
+///
+/// Takes `theta_extrap` - the position times that pair's trained `inv_freq` - and returns the angle
+/// to take cos/sin of, with ggml's mscale already folded in.  `mscale_in` must be `attn_factor`
+/// (ggml's kernels receive the raw knob and apply the log term here, where it is per-pair constant;
+/// this helper keeps that shape so the native path reads against ggml line by line).
+STRATA_ROPE_SCALING_HD inline void rope_scaled_angle(float theta_extrap, float freq_scale, float corr_low,
+                                                     float corr_high, float ext_factor, float mscale_in,
+                                                     int pair, float& cos_out, float& sin_out) {
+    // The interpolation, always applied; the correction mixed in on top (ggml-cuda/rope.cu rope_yarn).
+    float theta = freq_scale * theta_extrap;
+    float mscale = mscale_in;
+    if (ext_factor != 0.0f) {
+        const float ramp_mix = rope_yarn_ramp(corr_low, corr_high, pair) * ext_factor;
+        theta = theta * (1.0f - ramp_mix) + theta_extrap * ramp_mix;
+        // "Get n-d magnitude scaling corrected for interpolation" - the log term only when correcting.
+        mscale *= 1.0f + 0.1f * sycl::log(1.0f / freq_scale);
+    }
+    cos_out = sycl::cos(theta) * mscale;
+    sin_out = sycl::sin(theta) * mscale;
+}
+
+/// The ONE validity rule for a resolved configuration, shared by the engine's startup check and every rotation
+/// site that takes the struct, so a bad knob cannot pass one site and trip (or silently NaN) another.  Returns
+/// nullptr when the configuration is usable, else what is wrong.  Every value is tested with `std::isfinite`
+/// FIRST: a NaN passes every `<`/`<=` range comparison, which is how a `--rope-scale nan` would otherwise slip
+/// through.  `none` passes with any knob values - the knobs are inert there (the resolution resets them).
+inline const char* rope_scaling_invalid(const RopeScaling& s) {
+    if (!std::isfinite(s.freq_base) || s.freq_base <= 1.0) return "the frequency base must be a finite value above 1";
+    if (s.type == RopeScalingType::None) return nullptr;
+    if (!std::isfinite(s.factor) || s.factor < 1.0) return "the scaling factor must be a finite value >= 1";
+    if (!std::isfinite(s.freq_scale_in) || s.freq_scale_in < 0.0)
+        return "the frequency scale must be finite and positive (0 = 1/factor)";
+    const double fs = s.freq_scale();
+    if (!std::isfinite(fs) || fs <= 0.0) return "the resolved frequency scale must be a finite positive value";
+    if (!std::isfinite(s.orig_ctx) || s.orig_ctx < 1.0) return "the original (trained) context must be finite and > 0";
+    if (!std::isfinite(s.ext_factor) || s.ext_factor < 0.0) return "the YaRN ext factor must be finite and >= 0";
+    if (!std::isfinite(s.attn_factor) || s.attn_factor <= 0.0) return "the attention factor must be finite and > 0";
+    if (!std::isfinite(s.beta_fast) || s.beta_fast <= 0.0 || !std::isfinite(s.beta_slow) || s.beta_slow <= 0.0)
+        return "the YaRN betas must be finite and > 0";
+    if (!std::isfinite(s.mscale()) || s.mscale() <= 0.0) return "the resolved magnitude correction must be finite and > 0";
+    return nullptr;
+}
+
+/// The process's one rope configuration.  Set it ONCE at startup, after the CLI and the model file
+/// have agreed on the values and BEFORE `session_init` (which builds the rope table and captures the
+/// graphs); read it at table build time and when launching the analytic kernels.  Plain storage, no
+/// atomics: one writer on the startup thread, every reader after it.
+void rope_scaling_set(const RopeScaling& scaling);
+const RopeScaling& rope_scaling();
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/sampler.hpp b/sycl/include/strata/kernels/sampler.hpp
index b247f15e9b2..6bbc16d5a83 100644
--- a/sycl/include/strata/kernels/sampler.hpp
+++ b/sycl/include/strata/kernels/sampler.hpp
@@ -43,6 +43,24 @@ struct SamplerParams {
 void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
                    const SamplerParams& p, int* out, void* stream);
 
+// ---- COUPLED DRAFT SAMPLING (include/strata/core/coupled_draft.hpp, STRATA_SPEC_COUPLED=1).  Device pointers
+// throughout; every per-request / per-round value comes from device memory, so the calls can be captured.
+//
+// The scratch `coupled_draft_sample` needs for `nv` logits (0: too wide for the split merge, coupled cannot run).
+size_t coupled_draft_scratch_bytes(int nv);
+// A round's inputs: `*params` <- `*mapped_params`, ring[cap - h, cap) <- mapped_hist[cap - h, cap) with h =
+// coupled_hist_len(penalty_last_n, cap).  `mapped_*` are mapped host memory.
+void coupled_draft_stage(const SamplerParams* mapped_params, const int32_t* mapped_hist, SamplerParams* params,
+                         int32_t* ring, int cap, void* stream);
+// Draft j of the chain from ONE row of `nv` logits (modified in place: the penalties): the target's chain with
+// `*params`, the penalty window ring[cap + j - h, cap + j), Philox counter coupled_draft_counter(step_rec[0]).
+// `sub_to_id` / `id_to_sub` map the draft head's subset to token ids and back (null: the whole vocabulary,
+// `id_vocab` ids).  Writes the token id to *out_id, its probability under the final distribution to *out_prob, and
+// the id to ring[cap + j].
+void coupled_draft_sample(float* logits, int nv, const int32_t* sub_to_id, const int32_t* id_to_sub, int id_vocab,
+                          const SamplerParams* params, int32_t* ring, int cap, int j, const int32_t* step_rec,
+                          void* scratch, int32_t* out_id, float* out_prob, void* stream);
+
 // The penalty-history rows of a verify window, on the host: row t of `out` (T rows of `h` slots) is the last `h`
 // tokens of `tail[0..n_tail)` followed by `window[0..t]`, most recent LAST, -1 in the unused front slots.
 // `tail` is what the state consumed before the window, `window[0]` the fed-back token and `window[1..]` the
diff --git a/sycl/src/core/conversation_snapshot.cpp b/sycl/src/core/conversation_snapshot.cpp
new file mode 100644
index 00000000000..74ea5dcfc37
--- /dev/null
+++ b/sycl/src/core/conversation_snapshot.cpp
@@ -0,0 +1,289 @@
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/conversation_snapshot.hpp"
+#include "strata/kernels/kv_q4.hpp"
+#include "conversation_checked.hpp"
+
+#include <array>
+#include <cstring>
+#include <limits>
+
+namespace strata::core {
+namespace {
+struct Layout {
+    int format;
+    int64_t cells, pooled_rows, page_size;
+    size_t data, scales, pooled, value_data, value_scales;
+};
+
+bool valid_extent(const QsaState& st, int64_t upto, std::string& error) {
+    const int64_t page = strata::kernels::qsa_real_shapes().page_size;
+    if (upto < 0 || upto > st.max_cells || upto > std::numeric_limits<int64_t>::max() - (page - 1)) {
+        error = "conversation snapshot: invalid K/V extent";
+        return false;
+    }
+    return true;
+}
+
+bool layout(const QsaState& st, const ModelGeometry& g, int64_t upto, bool index, Layout& l, std::string& error) {
+    if (!valid_extent(st, upto, error)) return false;
+    if (st.kv_hybrid && (st.kv_mode != 0 || st.kv_q4 || st.kv_int8)) {
+        error = "conversation snapshot: hybrid K8V4 requires an identity layout and distinct format flags";
+        return false;
+    }
+    const auto s = strata::kernels::qsa_real_shapes();
+    const bool int8_keys = st.kv_int8 || st.kv_hybrid;
+    if (g.n_head_kv <= 0 || g.head_dim <= 0 || g.head_dim > INT32_MAX || g.idx_key_dim <= 0 ||
+        (st.kv_q4 && g.head_dim % 32) || (int8_keys && !st.kv_q4 && g.head_dim % 64)) {
+        error = "conversation snapshot: invalid K/V geometry";
+        return false;
+    }
+    const int64_t cells = ((upto + s.page_size - 1) / s.page_size) * s.page_size;
+    const size_t per = st.kv_q4 ? (size_t) strata::kernels::kv_q4_bytes_per_head((int) g.head_dim)
+                              : (size_t) g.head_dim * (int8_keys ? 1 : 2);
+    // Include the moving spare row, not only completed blocks. The checkpoint
+    // restore reconstructs that row when rewinding to an earlier prefix.
+    const int64_t pooled = index && upto > 0 ? upto / s.idx_block + 1 : 0;
+    // Format 3 identifies snapshot K8V4 only; never pass it to the block movers.
+    l = {st.kv_hybrid ? 3 : qsa_kv_format(st), cells, pooled, s.page_size, 0, 0, 0, 0, 0};
+    using conversation_detail::product;
+    if (!product(l.data, {(uint64_t) cells, (uint64_t) g.n_head_kv, per}) ||
+        !product(l.scales, {(uint64_t) cells, (uint64_t) g.n_head_kv,
+                           int8_keys && !st.kv_q4 ? (uint64_t) (g.head_dim / 64) * 2 : 0}) ||
+        !product(l.pooled, {(uint64_t) pooled, (uint64_t) g.idx_key_dim, sizeof(float)})) {
+        error = "conversation snapshot: K/V byte count overflow";
+        return false;
+    }
+    l.value_data = l.data;
+    l.value_scales = l.scales;
+    if (st.kv_hybrid) {
+        if (!product(l.value_data, {(uint64_t) cells, (uint64_t) g.n_head_kv,
+                                   (uint64_t) strata::kernels::kv_q4_bytes_per_head((int) g.head_dim)})) {
+            error = "conversation snapshot: hybrid V byte count overflow";
+            return false;
+        }
+        l.value_scales = 0;
+    }
+    return true;
+}
+
+std::array<void*, 5> pools(const QsaState& st, bool resident = false) {
+    const bool host = st.kv_mode != 0 && !resident;
+    if (st.kv_hybrid) return {st.k_q, st.v_q4, st.k_scale, nullptr, st.idx_pooled};
+    if (st.kv_q4)
+        return {host ? st.host.k_q4 : st.k_q4, host ? st.host.v_q4 : st.v_q4, nullptr, nullptr, st.idx_pooled};
+    if (st.kv_int8)
+        return {host ? st.host.k_q : st.k_q, host ? st.host.v_q : st.v_q,
+                host ? st.host.k_scale : st.k_scale, host ? st.host.v_scale : st.v_scale, st.idx_pooled};
+    return {host ? st.host.k_pool : st.k_pool, host ? st.host.v_pool : st.v_pool, nullptr, nullptr, st.idx_pooled};
+}
+
+bool valid(const QsaState& st, const Layout& l, int64_t upto, std::string& error) {
+    if (upto < 0 || upto > st.max_cells || st.n_pages < 0 || l.cells / l.page_size > st.n_pages ||
+        st.kv_mode < 0 || st.kv_mode > 2 || st.n_slots <= 0 ||
+        (st.kv_mode == 0 && st.n_slots < st.n_pages) ||
+        l.pooled_rows > st.idx_pooled_rows || (st.kv_mode != 0 && !st.host.present())) {
+        error = "conversation snapshot: invalid K/V extent or missing authoritative host pool";
+        return false;
+    }
+    if (st.kv_mode == 1) {
+        const auto& m = st.map;
+        if (m.n_blocks != st.n_pages || m.n_slots != st.n_slots || !m.page_table || !m.slot_block ||
+            !m.slot_stamp || !m.slot_ref || !m.ctl || !m.miss_block || !m.miss_slot) {
+            error = "conversation snapshot: invalid streaming map";
+            return false;
+        }
+    }
+    if (st.kv_mode == 2 && (!st.page_table ||
+        (st.kv_q4 ? !st.k_q4 || !st.v_q4 : st.kv_int8 ? !st.k_q || !st.v_q || !st.k_scale || !st.v_scale
+                                                    : !st.k_pool || !st.v_pool))) {
+        error = "conversation snapshot: invalid draft ring";
+        return false;
+    }
+    return true;
+}
+
+bool transfer(void *dst, const void *src, size_t n, std::string &error) try {
+    if (!n) return true;
+    if (!src || !dst) { error = "conversation snapshot: missing state buffer"; return false; }
+    // Default handles both device allocations and device-mapped host pool aliases.
+    const dpct::err0 e =
+        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dst, src, n).wait());
+    if (e == 0) return true;
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    error = std::string("conversation snapshot copy: ") +
+            dpct::get_error_string_dummy(e);
+    return false;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+} // namespace
+
+bool conversation_kv_capture_bytes(const ConversationKv& image, const QsaState& st, const ModelGeometry& g,
+                                   int64_t upto, bool index, size_t& bytes, std::string& error) {
+    Layout l{};
+    if (!layout(st, g, upto, index, l, error) || !valid(st, l, upto, error)) return false;
+    const std::array<size_t,5> sizes = {l.data, l.value_data, l.scales, l.value_scales, l.pooled};
+    const std::array<const ConversationBuffer*,5> buffers = {&image.k, &image.v, &image.k_scale, &image.v_scale, &image.pooled};
+    bytes = 0;
+    for (size_t i = 0; i < buffers.size(); ++i) {
+        const size_t n = buffers[i]->allocation_peak(sizes[i]);
+        if (n == SIZE_MAX || !conversation_detail::add(bytes, n)) {
+            error = "conversation snapshot: segmented K/V allocation overflow";
+            return false;
+        }
+    }
+    return true;
+}
+
+size_t conversation_kv_bytes(const QsaState& st, const ModelGeometry& g, int64_t upto, bool index) {
+    size_t bytes = 0;
+    std::string error;
+    return conversation_kv_capture_bytes({}, st, g, upto, index, bytes, error) ? bytes : 0;
+}
+
+bool conversation_kv_save(ConversationKv& image, const QsaState& st, const ModelGeometry& g,
+                          int64_t upto, bool index, std::string& error,
+                          int64_t unchanged_tokens, size_t* reused_bytes) {
+    Layout l{};
+    if (!layout(st, g, upto, index, l, error)) return false;
+    if (!valid(st, l, upto, error)) return false;
+    if (unchanged_tokens < 0 || unchanged_tokens > upto || unchanged_tokens > image.cells) {
+        error = "conversation snapshot: invalid unchanged prefix";
+        return false;
+    }
+    const int64_t whole_cells = (unchanged_tokens / l.page_size) * l.page_size;
+    image.format = l.format;
+    image.cells = l.cells;
+    image.heads = g.n_head_kv;
+    image.head_dim = g.head_dim;
+    image.page_size = l.page_size;
+    image.pooled_rows = l.pooled_rows;
+    image.idx_dim = g.idx_key_dim;
+    const auto src = pools(st);
+    const std::array<size_t,5> sizes = {l.data, l.value_data, l.scales, l.value_scales, l.pooled};
+    const std::array<ConversationBuffer*,5> dst = {&image.k, &image.v, &image.k_scale, &image.v_scale, &image.pooled};
+    for (size_t i = 0; i < dst.size(); ++i) {
+        // Recopy the partial page and the indexer's moving spare row. Completed
+        // pages/rows strictly before the first rewritten token remain identical.
+        const size_t keep = i == 4 ? (index ? size_t(unchanged_tokens / strata::kernels::qsa_real_shapes().idx_block) * g.idx_key_dim * 4 : 0)
+                                  : l.cells ? (sizes[i] / size_t(l.cells)) * size_t(whole_cells) : 0;
+        if (keep > dst[i]->size()) { error = "conversation snapshot: missing reusable prefix"; return false; }
+        dst[i]->resize(sizes[i]);
+        if (!dst[i]->visit(keep, sizes[i] - keep, [&](uint8_t* p, size_t n, size_t at) {
+                return transfer(p, src[i] ? static_cast<const uint8_t*>(src[i]) + at : nullptr, n, error);
+            })) return false;
+        if (reused_bytes) *reused_bytes += keep;
+    }
+    return true;
+}
+
+bool conversation_kv_validate(const ConversationKv& image, const QsaState& st, const ModelGeometry& g,
+                              int64_t upto, bool index, std::string& error) {
+    Layout l{};
+    if (!layout(st, g, upto, index, l, error)) return false;
+    if (!valid(st, l, upto, error)) return false;
+    const std::array<size_t,5> sizes = {l.data, l.value_data, l.scales, l.value_scales, l.pooled};
+    const std::array<const ConversationBuffer*,5> src = {&image.k, &image.v, &image.k_scale, &image.v_scale, &image.pooled};
+    if (image.format != l.format || image.cells != l.cells || image.heads != g.n_head_kv ||
+        image.head_dim != g.head_dim || image.page_size != l.page_size || image.pooled_rows != l.pooled_rows ||
+        image.idx_dim != g.idx_key_dim) {
+        error = "conversation snapshot: incompatible K/V geometry";
+        return false;
+    }
+    for (size_t i = 0; i < src.size(); ++i)
+        if (src[i]->size() != sizes[i]) { error = "conversation snapshot: invalid K/V payload size"; return false; }
+    const auto dst = pools(st);
+    for (size_t i = 0; i < src.size(); ++i)
+        if (sizes[i] && !dst[i]) { error = "conversation snapshot: missing target state buffer"; return false; }
+    return true;
+}
+
+bool conversation_kv_restore(const ConversationKv& image, const QsaState& st, const ModelGeometry& g,
+                             int64_t upto, bool index, std::string& error) {
+    if (!conversation_kv_validate(image, st, g, upto, index, error)) return false;
+    const std::array<const ConversationBuffer*,5> src = {&image.k, &image.v, &image.k_scale, &image.v_scale, &image.pooled};
+    const auto dst = pools(st);
+    for (size_t i = 0; i < src.size(); ++i)
+        if (!src[i]->visit(0, src[i]->size(), [&](const uint8_t* p, size_t n, size_t at) {
+                return transfer(static_cast<uint8_t*>(dst[i]) + at, p, n, error);
+            })) return false;
+    // VRAM slots still contain the outgoing conversation. Resolve must refill
+    // them from the restored authoritative pools before any attention reads.
+    if (st.kv_mode == 1) strata::kernels::kv_stream_reset(st.map, nullptr);
+    if (st.kv_mode == 2 && upto > 0) {
+        auto shapes = strata::kernels::qsa_real_shapes();
+        shapes.n_head_kv = g.n_head_kv; shapes.head_dim = g.head_dim;
+        const int64_t end = (upto + shapes.page_size - 1) / shapes.page_size;
+        strata::kernels::kv_ring_restore(qsa_attn_pools(st), st.host, qsa_kv_format(st),
+                                        std::max<int64_t>(0, end - st.n_slots), end, st.n_slots, shapes, nullptr);
+    }
+    /*
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const auto status = 0;
+    if (status == 0) return true;
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    error = std::string("conversation snapshot residency restore: ") +
+            dpct::get_error_string_dummy(status);
+    return false;
+}
+
+bool conversation_kv_verify(const ConversationKv& image, const QsaState& st, const ModelGeometry& g,
+                            int64_t upto, bool index, uint64_t& fingerprint, std::string& error) {
+    if (!conversation_kv_validate(image, st, g, upto, index, error)) return false;
+    std::array<uint8_t, 65536> buffer;
+    uint64_t hash = 1469598103934665603ull;
+    auto compare = [&](const void* device, const uint8_t* expected, size_t bytes, bool include_hash) {
+        for (size_t offset = 0; offset < bytes;) {
+            const size_t n = std::min(buffer.size(), bytes - offset);
+            if (!transfer(buffer.data(), static_cast<const uint8_t*>(device) + offset, n, error)) return false;
+            if (std::memcmp(buffer.data(), expected + offset, n) != 0) {
+                error = "conversation snapshot: restored K/V bytes differ";
+                return false;
+            }
+            if (include_hash) for (size_t i = 0; i < n; ++i) { hash ^= buffer[i]; hash *= 1099511628211ull; }
+            offset += n;
+        }
+        return true;
+    };
+    const std::array<const ConversationBuffer*, 5> saved = {&image.k, &image.v, &image.k_scale, &image.v_scale, &image.pooled};
+    const auto authoritative = pools(st);
+    for (size_t i = 0; i < saved.size(); ++i)
+        if (!saved[i]->visit(0, saved[i]->size(), [&](const uint8_t* p, size_t n, size_t at) {
+                return compare(static_cast<const uint8_t*>(authoritative[i]) + at, p, n, true);
+            })) return false;
+    if (st.kv_mode == 2 && image.cells > 0) {
+        const auto resident = pools(st, true);
+        const int64_t end = image.cells / image.page_size;
+        const int64_t begin = std::max<int64_t>(0, end - st.n_slots);
+        for (size_t i = 0; i < 4; ++i) {
+            if (saved[i]->empty()) continue;
+            const size_t page_bytes = saved[i]->size() / size_t(end);
+            for (int64_t page = begin; page < end; ++page)
+                if (!saved[i]->visit(size_t(page) * page_bytes, page_bytes,
+                        [&](const uint8_t* p, size_t n, size_t at) {
+                            const size_t offset = size_t(page % st.n_slots) * page_bytes + at - size_t(page) * page_bytes;
+                            return compare(static_cast<const uint8_t*>(resident[i]) + offset, p, n, false);
+                        })) return false;
+        }
+    }
+    fingerprint = hash;
+    return true;
+}
+
+} // namespace strata::core
diff --git a/sycl/src/core/conversation_snapshot_test.cpp b/sycl/src/core/conversation_snapshot_test.cpp
new file mode 100644
index 00000000000..7544df2abda
--- /dev/null
+++ b/sycl/src/core/conversation_snapshot_test.cpp
@@ -0,0 +1,326 @@
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/conversation_snapshot.hpp"
+#include "strata/kernels/kv_q4.hpp"
+
+#include <array>
+#include <cstdio>
+#include <cstdlib>
+#include <limits>
+#include <vector>
+
+using namespace strata::core;
+using namespace strata::kernels;
+
+namespace {
+int checks = 0;
+void check(bool ok, const char* label) {
+    ++checks;
+    if (!ok) { std::fprintf(stderr, "FAIL: %s\n", label); std::exit(1); }
+}
+void cuda_check(dpct::err0 e) {
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+struct Fixture {
+    ModelGeometry g;
+    QsaState state;
+    std::vector<void*> device, host;
+    std::array<void*,5> sources{};
+    std::array<size_t,5> sizes{};
+
+    template<class T> void alloc(T*& p, size_t n, bool pinned = false) {
+        if (!n) return;
+        void* raw = nullptr;
+        if (pinned) {
+            /*
+            DPCT1048: The original value cudaHostAllocMapped is not
+            meaningful in the migrated code and was removed or replaced with 0.
+            You may need to check the migrated code.
+            */
+            cuda_check(DPCT_CHECK_ERROR(raw = (void *)sycl::malloc_host(
+                                            n, dpct::get_in_order_queue())));
+            host.push_back(raw);
+            void* mapped = nullptr;
+            cuda_check(DPCT_CHECK_ERROR(mapped = (void *)raw));
+            p = static_cast<T*>(mapped);
+        } else {
+            cuda_check(DPCT_CHECK_ERROR(raw = (void *)sycl::malloc_device(
+                                            n, dpct::get_in_order_queue())));
+                device.push_back(raw); p = static_cast<T *>(raw);
+        }
+    }
+    Fixture(int fmt, int mode) {
+        auto& st = state;
+        st.kv_mode = mode; st.kv_int8 = fmt==kKvInt8; st.kv_q4 = fmt==kKvQ4; st.kv_hybrid = fmt==3;
+        st.n_pages = 24; st.n_slots = mode ? 4 : st.n_pages;
+        st.max_cells = st.n_pages * 4; st.idx_pooled_rows = mode==2 ? 2 : st.max_cells/4+2;
+        const size_t per = fmt==kKvQ4 ? kv_q4_bytes_per_head((int)g.head_dim) : g.head_dim*((st.kv_int8 || st.kv_hybrid) ? 1:2);
+        const size_t rows = st.max_cells*g.n_head_kv, slot_rows = st.n_slots*4*g.n_head_kv;
+        sizes = {rows*per, rows*per, fmt==kKvInt8 ? rows*(g.head_dim/64)*2:0,
+                 fmt==kKvInt8 ? rows*(g.head_dim/64)*2:0, (size_t)st.idx_pooled_rows*g.idx_key_dim*4};
+        if (fmt==3) {
+            sizes = {rows*per, rows*kv_q4_bytes_per_head((int)g.head_dim), rows*(g.head_dim/64)*2, 0,
+                     (size_t)st.idx_pooled_rows*g.idx_key_dim*4};
+            alloc(st.k_q,sizes[0]); alloc(st.v_q4,sizes[1]); alloc(st.k_scale,sizes[2]);
+            sources[0]=st.k_q; sources[1]=st.v_q4; sources[2]=st.k_scale;
+        } else if (fmt==kKvQ4) {
+            alloc(st.k_q4,slot_rows*per); alloc(st.v_q4,slot_rows*per);
+            if (mode) {alloc(st.host.k_q4,sizes[0],true); alloc(st.host.v_q4,sizes[1],true);}
+            sources[0]=mode?st.host.k_q4:st.k_q4; sources[1]=mode?st.host.v_q4:st.v_q4;
+        } else if (fmt==kKvInt8) {
+            alloc(st.k_q,slot_rows*per); alloc(st.v_q,slot_rows*per);
+            alloc(st.k_scale,slot_rows*(g.head_dim/64)*2); alloc(st.v_scale,slot_rows*(g.head_dim/64)*2);
+            if (mode) {
+                alloc(st.host.k_q,sizes[0],true); alloc(st.host.v_q,sizes[1],true);
+                alloc(st.host.k_scale,sizes[2],true); alloc(st.host.v_scale,sizes[3],true);
+            }
+            sources[0]=mode?st.host.k_q:st.k_q; sources[1]=mode?st.host.v_q:st.v_q;
+            sources[2]=mode?st.host.k_scale:st.k_scale; sources[3]=mode?st.host.v_scale:st.v_scale;
+        } else {
+            alloc(st.k_pool,slot_rows*per); alloc(st.v_pool,slot_rows*per);
+            if (mode) {alloc(st.host.k_pool,sizes[0],true); alloc(st.host.v_pool,sizes[1],true);}
+            sources[0]=mode?st.host.k_pool:st.k_pool; sources[1]=mode?st.host.v_pool:st.v_pool;
+        }
+        alloc(st.idx_pooled,sizes[4]); sources[4]=st.idx_pooled;
+        alloc(st.page_table,st.n_pages*4);
+        if (mode==1) {
+            auto& m=st.map;
+            m.page_table=st.page_table; m.n_blocks=st.n_pages; m.n_slots=st.n_slots;
+            alloc(m.slot_block,st.n_slots*4); alloc(m.slot_stamp,st.n_slots*4); alloc(m.slot_ref,st.n_slots*4);
+            alloc(m.miss_block,st.n_slots*4); alloc(m.miss_slot,st.n_slots*4); alloc(m.ctl,kKvCtlInts*4);
+        } else if (mode==2) {
+            kv_ring_table(st.page_table,st.n_pages,st.n_slots,nullptr);
+        }
+    }
+    void fill(uint8_t salt) {
+        for (size_t i=0;i<sources.size();++i) {
+            std::vector<uint8_t> data(sizes[i]);
+            for (size_t j=0;j<data.size();++j) data[j]=(uint8_t)(salt+i*31+j*7+j/257);
+            if (!data.empty()) cuda_check(DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue()
+                    .memcpy(sources[i], data.data(), data.size())
+                    .wait()));
+        }
+    }
+    void fill_after(uint8_t salt, int64_t first_dirty) {
+        for (size_t i=0;i<sources.size();++i) {
+            const size_t offset = i == 4 ? size_t(first_dirty/4)*g.idx_key_dim*4
+                                         : (sizes[i]/size_t(state.max_cells))*size_t((first_dirty/4)*4);
+            if (sizes[i] > offset)
+                cuda_check(DPCT_CHECK_ERROR(
+                    dpct::get_in_order_queue()
+                        .memset(static_cast<uint8_t *>(sources[i]) + offset,
+                                salt, sizes[i] - offset)
+                        .wait()));
+        }
+    }
+    ~Fixture() {
+        for (void *p : device)
+            DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
+        for (void *p : host) DPCT_CHECK_ERROR(free(p));
+    }
+};
+bool equal(const ConversationKv& a,const ConversationKv& b) {
+    return a.k==b.k && a.v==b.v && a.k_scale==b.k_scale && a.v_scale==b.v_scale && a.pooled==b.pooled;
+}
+
+void full_session(int fmt, int mode, int experts) {
+    Fixture main(fmt,mode), draft(fmt==3?kKvInt8:fmt,2);
+    auto& g=main.g;
+    g.n_layers=4; g.n_expert=experts;
+    g.ssm_state_size=2; g.ssm_v_heads=2; g.ssm_conv_channels=8;
+    SessionState ss;
+    ss.max_cells=96; ss.qsa_states=&main.state;
+    ss.layer_hi=g.n_layers; ss.gdn_alloc=g.n_gdn_layers(); ss.qsa_alloc=g.n_qsa_layers();   // the whole-model carve
+    std::string err;
+    ConversationStateSizes sizes;
+    check(conversation_state_sizes(g,sizes,err),"whole-session geometry sizes");
+    main.alloc(ss.gdn_state,sizes.gdn); main.alloc(ss.ple_hist,sizes.ple);
+    main.alloc(main.state.idx_tail,sizes.tail); main.alloc(main.state.idx_dead,sizes.dead);
+    main.alloc(main.state.idx_block_pos,sizes.block_pos);
+    std::vector<int32_t> ids(65);
+    for (size_t i=0;i<ids.size();++i) ids[i]=(int32_t)i+1;
+    std::vector<ConversationImageKey> images;
+    std::vector<ConversationCheckpoint> checkpoints;
+    auto fill = [&](uint8_t salt) {
+        try {
+    main.fill(salt); draft.fill(salt);
+        for (const auto& [p,n] : std::vector<std::pair<void*,size_t>>{
+                 {ss.gdn_state,sizes.gdn},{ss.ple_hist,sizes.ple},{main.state.idx_tail,sizes.tail},
+                 {main.state.idx_dead,sizes.dead},{main.state.idx_block_pos,sizes.block_pos}})
+            cuda_check(DPCT_CHECK_ERROR(
+                dpct::get_in_order_queue().memset(p, salt, n).wait()));
+        // A real indexer maintains its spare pooled row as a copy of idx_dead.
+        cuda_check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            main.state.idx_pooled + (ids.size() / 4) * g.idx_key_dim,
+            main.state.idx_dead, sizes.dead).wait()));
+        cuda_check(DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw()));
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    fill(13);
+    ConversationCheckpoint checkpoint;
+    checkpoint.ids.assign(ids.begin(),ids.begin()+3);
+    check(conversation_checkpoint_save(checkpoint,ss,g,err),"save complete running checkpoint");
+    checkpoint.used = 17;
+    checkpoints.push_back(std::move(checkpoint));
+    const ConversationView view{ids,images,checkpoints,true};
+    SavedConversation a,b,restored;
+    check(conversation_snapshot_save(a,view,ss,g,draft.state,err),"capture complete A");
+    check(a.checkpoints[0].used == 17,"upstream checkpoint LRU stamp survives capture");
+    fill(177);
+    check(conversation_snapshot_save(b,view,ss,g,draft.state,err),"capture complete B");
+    check(a.live.dead!=b.live.dead,"different opening-state spare keys in regression fixture");
+    auto bad=a; bad.kv.back().k.pop_back();
+    check(conversation_snapshot_restore(bad,ss,g,draft.state,err)==ConversationRestore::invalid,
+          "reject invalid late draft before any main-layer write");
+    check(conversation_snapshot_save(restored,view,ss,g,draft.state,err),"capture B after refused restore");
+    check(restored.live.gdn==b.live.gdn && restored.live.dead==b.live.dead &&
+          equal(restored.kv[0],b.kv[0]) && equal(restored.kv[1],b.kv[1]),"refusal preserves all tested state");
+    check(conversation_snapshot_restore(a,ss,g,draft.state,err)==ConversationRestore::restored,"restore complete A");
+    check(conversation_snapshot_save(restored,view,ss,g,draft.state,err),"capture restored A");
+    check(restored.live.gdn==a.live.gdn && restored.live.ple==a.live.ple && restored.live.tails==a.live.tails &&
+          restored.live.dead==a.live.dead && restored.live.block_pos==a.live.block_pos &&
+          equal(restored.kv[0],a.kv[0]) && equal(restored.kv[1],a.kv[1]),"whole-session A/B/A exactness including spare key");
+    check(ss.ple_prev[0]==64 && ss.ple_prev[1]==65,"PLE token window reconstructed");
+    for (int64_t dirty : {65, 3, 0}) {
+        check(conversation_snapshot_restore(a,ss,g,draft.state,err)==ConversationRestore::restored,"restore growth fixture base");
+        ConversationKvReuse reuse{a.kv,65,dirty};
+        const uint8_t* original = nullptr;
+        reuse.kv[0].k.visit(0,1,[&](const uint8_t* p,size_t,size_t){original=p;return true;});
+        main.fill_after(91,dirty); draft.fill_after(91,std::max<int64_t>(0,dirty-1));
+        cuda_check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                        .memset(ss.gdn_state, 91, sizes.gdn)
+                                        .wait()));
+        ids.resize(70);
+        for (size_t i=65;i<ids.size();++i) ids[i]=int32_t(i+1);
+        cuda_check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            main.state.idx_pooled + (ids.size() / 4) * g.idx_key_dim,
+            main.state.idx_dead, sizes.dead).wait()));
+        SavedConversation fresh,incremental;
+        check(conversation_snapshot_save(fresh,view,ss,g,draft.state,err),"full capture reference after growth or rewind");
+        size_t peak=0,reused=0;
+        check(conversation_snapshot_capture_bytes(reuse,view,ss,g,draft.state,peak,err),"admit incremental capture peak");
+        check(conversation_snapshot_save(incremental,view,ss,g,draft.state,err,std::move(reuse),&reused),"capture with retained pages");
+        check(incremental.bytes() <= peak,"incremental allocation stays within admitted bound");
+        check(incremental.live.gdn==fresh.live.gdn && incremental.live.ple==fresh.live.ple &&
+              incremental.live.dead==fresh.live.dead && equal(incremental.kv[0],fresh.kv[0]) &&
+              equal(incremental.kv[1],fresh.kv[1]),"incremental capture equals full capture after growth or rewind");
+        check((dirty>=4)==(reused>0),"only complete unchanged pages or rows are retained");
+        incremental.kv[0].k.visit(0,1,[&](const uint8_t* p,size_t,size_t){
+            check(p==original,"growth never reallocates the retained payload");return true;
+        });
+        check(conversation_snapshot_restore(incremental,ss,g,draft.state,err)==ConversationRestore::restored,"restore segmented incremental snapshot");
+        uint64_t fingerprint=0;
+        check(conversation_kv_verify(incremental.kv.back(),draft.state,g,70,false,fingerprint,err),"incremental draft authoritative and ring read-back");
+        ids.resize(65);
+    }
+    check(conversation_checkpoint_restore(a.checkpoints[0],ss,g,err),"restore early running checkpoint");
+    std::vector<uint8_t> spare(sizes.dead);
+    cuda_check(DPCT_CHECK_ERROR(
+        dpct::get_in_order_queue()
+            .memcpy(spare.data(), main.state.idx_pooled, sizes.dead)
+            .wait()));
+    check(spare==a.checkpoints[0].dead,"checkpoint rebuilds spare row over a later completed block");
+    check(ss.ple_prev[0]==2 && ss.ple_prev[1]==3,"checkpoint PLE token window");
+}
+}
+
+int main() {
+    int devices=0;
+    if (DPCT_CHECK_ERROR(devices = dpct::device_count()) != 0 ||
+        !devices) return 77;
+    for (int fmt : std::array<int,4>{kKvF16,kKvInt8,kKvQ4,3}) for (int mode : {0,1,2}) {
+        if (fmt==3 && mode!=0) continue;
+        Fixture f(fmt,mode);
+        if (fmt==3) {
+            std::string err;
+            ConversationKv invalid;
+            for (int unsupported : {1,2}) {
+                f.state.kv_mode=unsupported;
+                check(conversation_kv_bytes(f.state,f.g,9,true)==0,"hybrid streaming/ring rejected without block-mover abort");
+                check(!conversation_kv_save(invalid,f.state,f.g,9,true,err),"hybrid streaming/ring capture fails closed");
+            }
+            f.state.kv_mode=0;
+        }
+        {
+            std::string err;
+            ConversationKv invalid;
+            for (const int64_t bad : {-1LL, 97LL, (long long) std::numeric_limits<int64_t>::max()}) {
+                check(!conversation_kv_save(invalid,f.state,f.g,bad,mode!=2,err),"reject invalid save extent before allocation");
+                check(!conversation_kv_restore(invalid,f.state,f.g,bad,mode!=2,err),"reject invalid restore extent before copying");
+                check(conversation_kv_bytes(f.state,f.g,bad,mode!=2)==0,"invalid extent cannot overflow byte estimate");
+            }
+        }
+        for (int64_t upto : {0,1,3,4,5,63,64,65,96}) {
+            const bool index=mode!=2;
+            std::string err;
+            f.fill(13);
+            ConversationKv a,b,restored;
+            cuda_check(DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()));
+            check(conversation_kv_save(a,f.state,f.g,upto,index,err),"save A");
+            check(a.bytes()==conversation_kv_bytes(f.state,f.g,upto,index),"size estimate equals snapshot payload");
+            f.fill(177);
+            check(conversation_kv_save(b,f.state,f.g,upto,index,err),"save B");
+            check(upto==0 || !equal(a,b),"fixture changes state");
+            check(conversation_kv_restore(a,f.state,f.g,upto,index,err),"restore A over B");
+            cuda_check(DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()));
+            check(conversation_kv_save(restored,f.state,f.g,upto,index,err),"read back restored A");
+            check(equal(a,restored),"A/B/A byte-exact K/V and indexer state");
+            uint64_t fingerprint = 0;
+            check(conversation_kv_verify(a,f.state,f.g,upto,index,fingerprint,err),"verify restored authoritative and resident bytes without rewriting them");
+            if (mode==1) {
+                std::vector<int32_t> table((size_t)f.state.n_pages);
+                cuda_check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                                .memcpy(table.data(),
+                                                        f.state.page_table,
+                                                        table.size() * 4)
+                                                .wait()));
+                check(std::all_of(table.begin(),table.end(),[](int32_t x){return x==-1;}),"stale VRAM pages invalidated");
+            }
+            if (mode==2 && upto>0) {
+                const auto s=qsa_real_shapes();
+                const int64_t b1=(upto+s.page_size-1)/s.page_size,b0=std::max<int64_t>(0,b1-f.state.n_slots);
+                const size_t block=kv_block_bytes(s,fmt)/2;
+                // Codes and scales are separate in INT8; check code bytes here.
+                const size_t code_block=fmt==kKvInt8 ? s.page_size*s.n_head_kv*s.head_dim : block;
+                const void* slots=fmt==kKvQ4?(void*)f.state.k_q4:fmt==kKvInt8?(void*)f.state.k_q:(void*)f.state.k_pool;
+                std::vector<uint8_t> got(code_block);
+                for (int64_t page=b0;page<b1;++page) {
+                    cuda_check(DPCT_CHECK_ERROR(
+                        dpct::get_in_order_queue()
+                            .memcpy(got.data(),
+                                    (const uint8_t *)slots +
+                                        (page % f.state.n_slots) * code_block,
+                                    code_block)
+                            .wait()));
+                    std::vector<uint8_t> expected(code_block);
+                    check(a.k.read(expected.data(), page*code_block, code_block),"read segmented expected draft page");
+                    check(got == expected,"draft ring contains restored pages");
+                }
+            }
+            auto bad=a; bad.head_dim++;
+            check(!conversation_kv_restore(bad,f.state,f.g,upto,index,err),"reject incompatible geometry");
+            if (!a.k.empty()) {
+                bad=a; bad.k.pop_back();
+                check(!conversation_kv_restore(bad,f.state,f.g,upto,index,err),"reject malformed payload");
+            }
+        }
+    }
+    for (int fmt : {kKvF16,kKvInt8,kKvQ4}) for (int mode : {0,1}) for (int experts : {256,512})
+        full_session(fmt,mode,experts);
+    for (int experts : {256,512}) full_session(3,0,experts);
+    std::printf("conversation_snapshot_test: %d checks passed\n",checks);
+}
diff --git a/sycl/src/core/conversation_state.cpp b/sycl/src/core/conversation_state.cpp
new file mode 100644
index 00000000000..584fc3ab205
--- /dev/null
+++ b/sycl/src/core/conversation_state.cpp
@@ -0,0 +1,316 @@
+// sycl/src/core/conversation_state.cpp - SYCL port of src/core/conversation_state.cpp (two CUDA calls, by hand).
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/conversation_snapshot.hpp"
+#include "conversation_checked.hpp"
+
+#include <algorithm>
+#include <array>
+#include <limits>
+
+namespace strata::core {
+namespace {
+using conversation_detail::add;
+using conversation_detail::product;
+
+std::array<int64_t, 18> geometry_key(const ModelGeometry& g) {
+    return {g.n_embd, g.n_layers, g.qsa_interval, g.ssm_state_size, g.ssm_k_heads,
+            g.ssm_v_heads, g.ssm_d_conv, g.ssm_conv_channels, g.ssm_value_dim,
+            g.n_head, g.n_head_kv, g.head_dim, g.idx_q_heads, g.idx_key_dim,
+            g.hc, g.hc_lr, g.n_expert, g.n_ff};
+}
+
+bool fail(std::string& error, const char* message) {
+    error = std::string("conversation snapshot: ") + message;
+    return false;
+}
+
+// SYCL port (hand-ported: no CUDA header is included here, so dpct never saw this file): the device-wide sync and
+// the any-direction copy as SYCL queue operations; errors arrive as exceptions instead of status codes.
+bool sync(std::string& error) {
+    try {
+        dpct::get_current_device().queues_wait_and_throw();
+        return true;
+    } catch (sycl::exception const& e) {
+        error = std::string("conversation snapshot synchronize: ") + e.what();
+        return false;
+    }
+}
+
+bool copy(void* dst, const void* src, size_t bytes, std::string& error) {
+    if (!bytes) return true;
+    if (!dst || !src) return fail(error, "missing running-state buffer");
+    try {
+        dpct::get_in_order_queue().memcpy(dst, src, bytes).wait();
+        return true;
+    } catch (sycl::exception const& e) {
+        error = std::string("conversation snapshot running-state copy: ") + e.what();
+        return false;
+    }
+}
+
+// The session's carve (#216): `qsa_states` keeps global ordinals and holds the owned ones
+// [qsa_ord0, qsa_ord0 + qsa_alloc); `gdn_state` holds `gdn_alloc` rows. A whole-model session owns every layer.
+size_t owned_qsa(const SessionState& ss) { return (size_t) std::max<int64_t>(ss.qsa_alloc, 0); }
+const QsaState& owned(const SessionState& ss, size_t j) { return ss.qsa_states[(size_t) ss.qsa_ord0 + j]; }
+
+bool image_keys(const std::vector<ConversationImageKey>& images, size_t tokens) {
+    int64_t previous = -1;
+    for (const auto& image : images) {
+        if (image.start <= previous || image.start < 0 || (uint64_t) image.start >= tokens) return false;
+        previous = image.start;
+    }
+    return true;
+}
+
+bool checkpoint_targets(const SessionState& ss, const ModelGeometry& g, size_t tokens,
+                        ConversationStateSizes& z, std::string& error) {
+    if (!conversation_session_sizes(g, ss, z, error)) return false;
+    if (ss.max_cells < 0 || tokens > (uint64_t) ss.max_cells || (z.gdn && !ss.gdn_state) ||
+        (owned_qsa(ss) && !ss.qsa_states)) return fail(error, "invalid session running-state targets");
+    for (size_t j = 0; j < owned_qsa(ss); ++j) {
+        const auto& st = owned(ss, j);
+        const auto block = strata::kernels::qsa_real_shapes().idx_block;
+        size_t pooled_bytes = 0;
+        if (!st.idx_tail || !st.idx_dead || !st.idx_block_pos || !st.idx_pooled ||
+            st.max_cells < 0 || tokens > (uint64_t) st.max_cells ||
+            (tokens && tokens / (uint64_t) block >= (uint64_t) std::max<int64_t>(0, st.idx_pooled_rows)) ||
+            !product(pooled_bytes, {tokens / (uint64_t) block + 1, (uint64_t) g.idx_key_dim, sizeof(float)}))
+            return fail(error, "invalid indexer running-state target");
+    }
+    return true;
+}
+
+bool view_validate(const ConversationView& view, const SessionState& ss,
+                   const ModelGeometry& g, std::string& error) {
+    ConversationStateSizes z;
+    if (!checkpoint_targets(ss, g, view.ids.size(), z, error)) return false;
+    if (view.ids.empty() || !image_keys(view.images, view.ids.size()) ||
+        std::any_of(view.ids.begin(), view.ids.end(), [](int32_t id) { return id < 0; }))
+        return fail(error, "invalid live token/image metadata");
+    for (const auto& c : view.checkpoints) {
+        if (!c.stage_parts.empty() || c.ids.empty() || c.ids.size() > view.ids.size() ||
+            !std::equal(c.ids.begin(), c.ids.end(), view.ids.begin()))
+            return fail(error, "checkpoint is not a live token prefix");
+        if (!conversation_checkpoint_validate(c, ss, g, error)) return false;
+        size_t image = 0;
+        for (const auto& key : view.images) {
+            if ((uint64_t) key.start >= c.ids.size()) break;
+            if (image >= c.imgs.size() || !(c.imgs[image++] == key))
+                return fail(error, "checkpoint image identity differs");
+        }
+        if (image != c.imgs.size()) return fail(error, "checkpoint image prefix differs");
+    }
+    return true;
+}
+
+bool metadata_bytes(const ConversationCheckpoint& c, size_t& total) {
+    size_t ids = 0, images = 0;
+    if (!product(ids, {c.ids.size(), sizeof(int32_t)}) ||
+        !product(images, {c.imgs.size(), sizeof(ConversationImageKey)})) return false;
+    for (size_t n : {ids, images, c.gdn.size(), c.ple.size(), c.tails.size(), c.dead.size(), c.block_pos.size()})
+        if (!add(total, n)) return false;
+    return true;
+}
+} // namespace
+
+bool conversation_state_sizes(const ModelGeometry& g, ConversationStateSizes& z, std::string& error) {
+    z = {};
+    const auto key = geometry_key(g);
+    for (size_t i = 0; i < key.size(); ++i)
+        if (key[i] < 0 || (i != 1 && key[i] == 0)) return fail(error, "invalid model geometry");
+    size_t recurrence = 0, convolution = 0;
+    if (!product(recurrence, {(uint64_t) g.ssm_state_size, (uint64_t) g.ssm_v_heads, (uint64_t) g.ssm_state_size}) ||
+        !product(convolution, {(uint64_t) g.ssm_conv_channels, (uint64_t) (g.ssm_d_conv - 1)}) ||
+        !add(recurrence, convolution) ||
+        !product(z.gdn, {(uint64_t) g.n_gdn_layers(), recurrence, sizeof(float)}) ||
+        !product(z.ple, {strata::kernels::NG_HIST, strata::kernels::NG_HC_DIM, sizeof(float)}) ||
+        !product(z.tail, {(uint64_t) (strata::kernels::qsa_real_shapes().idx_block - 1),
+                          (uint64_t) g.idx_key_dim, sizeof(float)}) ||
+        !product(z.dead, {(uint64_t) g.idx_key_dim, sizeof(float)}))
+        return fail(error, "running-state byte count overflow");
+    z.block_pos = sizeof(int32_t);
+    size_t total = 0;
+    if (!product(total, {(uint64_t) g.n_qsa_layers(), z.tail}) ||
+        !product(total, {(uint64_t) g.n_qsa_layers(), z.dead}) ||
+        !product(total, {(uint64_t) g.n_qsa_layers(), z.block_pos}))
+        return fail(error, "indexer byte count overflow");
+    return true;
+}
+
+bool conversation_session_sizes(const ModelGeometry& g, const SessionState& ss, ConversationStateSizes& z,
+                                std::string& error) {
+    if (!conversation_state_sizes(g, z, error)) return false;
+    const int64_t n_gdn = g.n_gdn_layers(), n_qsa = g.n_qsa_layers();
+    if (ss.gdn_alloc < 0 || ss.gdn_alloc > n_gdn || ss.qsa_ord0 < 0 || ss.qsa_alloc < 0 ||
+        ss.qsa_ord0 > n_qsa || ss.qsa_alloc > n_qsa - ss.qsa_ord0)
+        return fail(error, "invalid session layer carve");
+    // z.gdn is n_gdn whole rows; the session holds gdn_alloc of them (all of them for the default full range)
+    z.gdn = n_gdn > 0 ? z.gdn / (size_t) n_gdn * (size_t) ss.gdn_alloc : 0;
+    return true;
+}
+
+bool conversation_checkpoint_validate(const ConversationCheckpoint& c, const SessionState& ss,
+                                      const ModelGeometry& g, std::string& error) {
+    ConversationStateSizes z;
+    if (!checkpoint_targets(ss, g, c.ids.size(), z, error)) return false;
+    const size_t layers = owned_qsa(ss);
+    if (c.gdn.size() != z.gdn || c.ple.size() != (ss.ple_hist ? z.ple : 0) ||
+        c.tails.size() != layers * z.tail || c.dead.size() != layers * z.dead ||
+        c.block_pos.size() != layers * z.block_pos || !image_keys(c.imgs, c.ids.size()))
+        return fail(error, "invalid checkpoint running-state payload");
+    return true;
+}
+
+bool conversation_checkpoint_save(ConversationCheckpoint& c, const SessionState& ss,
+                                  const ModelGeometry& g, std::string& error) {
+    ConversationStateSizes z;
+    if (!checkpoint_targets(ss, g, c.ids.size(), z, error)) return false;
+    const size_t layers = owned_qsa(ss);
+    c.gdn.resize(z.gdn); c.ple.resize(ss.ple_hist ? z.ple : 0);
+    c.tails.resize(layers * z.tail); c.dead.resize(layers * z.dead); c.block_pos.resize(layers * z.block_pos);
+    if (!copy(c.gdn.data(), ss.gdn_state, c.gdn.size(), error) ||
+        !copy(c.ple.data(), ss.ple_hist, c.ple.size(), error)) return false;
+    for (size_t j = 0; j < layers; ++j) {
+        const auto& st = owned(ss, j);
+        if (!copy(c.tails.data() + j * z.tail, st.idx_tail, z.tail, error) ||
+            !copy(c.dead.data() + j * z.dead, st.idx_dead, z.dead, error) ||
+            !copy(c.block_pos.data() + j * z.block_pos, st.idx_block_pos, z.block_pos, error)) return false;
+    }
+    return true;
+}
+
+bool conversation_checkpoint_restore(const ConversationCheckpoint& c, SessionState& ss,
+                                     const ModelGeometry& g, std::string& error) {
+    if (!conversation_checkpoint_validate(c, ss, g, error)) return false;
+    ConversationStateSizes z;
+    if (!conversation_session_sizes(g, ss, z, error)) return false;
+    if (!copy(ss.gdn_state, c.gdn.data(), c.gdn.size(), error) ||
+        !copy(ss.ple_hist, c.ple.data(), c.ple.size(), error)) return false;
+    for (size_t j = 0; j < owned_qsa(ss); ++j) {
+        const auto& st = owned(ss, j);
+        if (!copy(st.idx_tail, c.tails.data() + j * z.tail, z.tail, error) ||
+            !copy(st.idx_dead, c.dead.data() + j * z.dead, z.dead, error) ||
+            !copy(st.idx_block_pos, c.block_pos.data() + j * z.block_pos, z.block_pos, error)) return false;
+        if (!c.ids.empty()) {
+            const size_t row = c.ids.size() / strata::kernels::qsa_real_shapes().idx_block;
+            if (!copy(st.idx_pooled + row * g.idx_key_dim, c.dead.data() + j * z.dead, z.dead, error)) return false;
+        }
+    }
+    const size_t tokens = c.ids.size();
+    ss.ple_prev[0] = tokens >= 2 ? c.ids[tokens - 2] : -1;
+    ss.ple_prev[1] = tokens >= 1 ? c.ids[tokens - 1] : -1;
+    return sync(error);
+}
+
+bool conversation_snapshot_bytes(const ConversationView& view, const SessionState& ss,
+                                 const ModelGeometry& g, const QsaState& draft, size_t& bytes, std::string& error) {
+    bytes = 0;
+    if (!view_validate(view, ss, g, error)) return false;
+    ConversationStateSizes z;
+    if (!conversation_session_sizes(g, ss, z, error)) return false;
+    size_t ids = 0, images = 0, checkpoints = 0, layers = 0, tails = 0, dead = 0, positions = 0;
+    const auto qsa = (uint64_t) owned_qsa(ss);
+    if (!product(ids, {view.ids.size(), sizeof(int32_t)}) ||
+        !product(images, {view.images.size(), sizeof(ConversationImageKey)}) ||
+        !product(checkpoints, {view.checkpoints.size(), sizeof(ConversationCheckpoint)}) ||
+        !product(layers, {qsa + 1, sizeof(ConversationKv)}) ||
+        !product(tails, {qsa, z.tail}) || !product(dead, {qsa, z.dead}) ||
+        !product(positions, {qsa, z.block_pos})) return fail(error, "snapshot metadata byte count overflow");
+    for (size_t n : {ids, images, checkpoints, layers, tails, dead, positions, z.gdn, ss.ple_hist ? z.ple : 0})
+        if (!add(bytes, n)) return fail(error, "snapshot byte count overflow");
+    for (const auto& c : view.checkpoints)
+        if (!metadata_bytes(c, bytes)) return fail(error, "checkpoint byte count overflow");
+    const int64_t upto = (int64_t) view.ids.size(); // view_validate bounds this by signed max_cells
+    for (uint64_t i = 0; i <= qsa; ++i) {
+        const auto& st = i == qsa ? draft : owned(ss, (size_t) i);
+        const size_t n = conversation_kv_bytes(st, g, upto, i != qsa);
+        if (!n || !add(bytes, n)) return fail(error, "invalid or overflowing K/V byte estimate");
+    }
+    return true;
+}
+
+bool conversation_snapshot_capture_bytes(const ConversationKvReuse& reuse, const ConversationView& view,
+                                         const SessionState& ss, const ModelGeometry& g,
+                                         const QsaState& draft, size_t& bytes, std::string& error) {
+    if (!conversation_snapshot_bytes(view, ss, g, draft, bytes, error)) return false;
+    if (reuse.kv.empty()) return true;
+    const size_t layers = owned_qsa(ss) + 1;
+    if (reuse.kv.size() != layers || reuse.unchanged_tokens < 0 ||
+        reuse.unchanged_tokens > reuse.captured_tokens || reuse.unchanged_tokens > int64_t(view.ids.size()))
+        return fail(error, "invalid retained K/V prefix");
+    for (size_t i = 0; i < layers; ++i) {
+        const bool index = i + 1 != layers;
+        const auto& st = index ? owned(ss, i) : draft;
+        if (!conversation_kv_validate(reuse.kv[i], st, g, reuse.captured_tokens, index, error)) return false;
+        const size_t fresh = conversation_kv_bytes(st, g, int64_t(view.ids.size()), index);
+        size_t retained = 0;
+        if (!conversation_kv_capture_bytes(reuse.kv[i], st, g, int64_t(view.ids.size()), index, retained, error)) return false;
+        bytes -= fresh;
+        if (!add(bytes, retained)) return fail(error, "retained K/V allocation overflow");
+    }
+    size_t directory = 0;
+    if (!product(directory, {reuse.kv.capacity() - layers, sizeof(ConversationKv)}) || !add(bytes, directory))
+        return fail(error, "retained K/V directory overflow");
+    return true;
+}
+
+bool conversation_snapshot_save(SavedConversation& image, const ConversationView& view,
+                                const SessionState& ss, const ModelGeometry& g,
+                                const QsaState& draft, std::string& error,
+                                ConversationKvReuse reuse, size_t* reused_bytes) {
+    size_t estimate = 0;
+    if (!conversation_snapshot_capture_bytes(reuse, view, ss, g, draft, estimate, error) || !sync(error)) return false;
+    // Build into a new object so a failure cannot publish a partial snapshot.
+    SavedConversation captured;
+    captured.geometry = geometry_key(g);
+    captured.layer_lo = ss.layer_lo; captured.layer_hi = ss.layer_hi;
+    captured.live.ids = view.ids; captured.live.imgs = view.images;
+    captured.cvec = view.cvec; captured.checkpoints = view.checkpoints;
+    const int64_t unchanged = reuse.kv.empty() ? 0 : reuse.unchanged_tokens;
+    captured.kv = std::move(reuse.kv);
+    const size_t layers = owned_qsa(ss);
+    captured.kv.resize(layers + 1);
+    if (!conversation_checkpoint_save(captured.live, ss, g, error)) return false;
+    const int64_t upto = (int64_t) view.ids.size();
+    for (size_t j = 0; j < layers; ++j)
+        if (!conversation_kv_save(captured.kv[j], owned(ss, j), g, upto, true, error,
+                                  unchanged, reused_bytes)) return false;
+    // The draft's final cell may not have been computed when the output cap was
+    // reached. Refresh that page even when the main prefix continued unchanged.
+    if (!conversation_kv_save(captured.kv.back(), draft, g, upto, false, error,
+                              std::max<int64_t>(0, unchanged - 1), reused_bytes)) return false;
+    image = std::move(captured);
+    return true;
+}
+
+bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& ss,
+                                    const ModelGeometry& g, const QsaState& draft, std::string& error) {
+    if (!image.live.stage_parts.empty()) return fail(error, "layer-split parking is not supported");
+    if (image.geometry != geometry_key(g)) return fail(error, "incompatible runtime geometry");
+    // an image holds exactly one carve's running state and K/V: same layer range or nothing
+    if (image.layer_lo != ss.layer_lo || image.layer_hi != ss.layer_hi)
+        return fail(error, "snapshot from another session layer range");
+    const ConversationView view{image.live.ids, image.live.imgs, image.checkpoints, image.cvec};
+    if (!view_validate(view, ss, g, error) || !conversation_checkpoint_validate(image.live, ss, g, error)) return false;
+    const size_t layers = owned_qsa(ss);
+    if (image.kv.size() != layers + 1) return fail(error, "invalid K/V layer count");
+    const int64_t upto = (int64_t) image.live.ids.size();
+    for (size_t j = 0; j < layers; ++j)
+        if (!conversation_kv_validate(image.kv[j], owned(ss, j), g, upto, true, error)) return false;
+    return conversation_kv_validate(image.kv.back(), draft, g, upto, false, error);
+}
+
+ConversationRestore conversation_snapshot_restore(const SavedConversation& image, SessionState& ss,
+                                                   const ModelGeometry& g, const QsaState& draft, std::string& error) {
+    if (!conversation_snapshot_validate(image, ss, g, draft, error)) return ConversationRestore::invalid;
+    if (!sync(error)) return ConversationRestore::transfer_failed;
+    const int64_t upto = (int64_t) image.live.ids.size();
+    for (size_t j = 0; j < owned_qsa(ss); ++j)
+        if (!conversation_kv_restore(image.kv[j], owned(ss, j), g, upto, true, error))
+            return ConversationRestore::transfer_failed;
+    if (!conversation_kv_restore(image.kv.back(), draft, g, upto, false, error) ||
+        !conversation_checkpoint_restore(image.live, ss, g, error)) return ConversationRestore::transfer_failed;
+    return ConversationRestore::restored;
+}
+} // namespace strata::core
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
index d72b556a5ce..5804ed88c21 100644
--- a/sycl/src/core/device.dp.cpp
+++ b/sycl/src/core/device.dp.cpp
@@ -41,14 +41,80 @@ __dpct_inline__ void poison_kernel(float *p, uint64_t n_floats) {
     if (i < n_floats) p[i] = sycl::bit_cast<float>(0x7fc00000);
 }
 
+#if defined(STRATA_USE_HIP)
+#if !defined(STRATA_HIP_ARCHS)
+#error "STRATA_HIP_ARCHS (the compiled HIP architectures) is set by cmake/hip_backend.cmake"
+#endif
+// "gfx1201:sramecc-:xnack-" -> "gfx1201"
+std::string base_arch(const char* gcn_arch_name) {
+    std::string arch(gcn_arch_name);
+    const size_t colon = arch.find(':');
+    if (colon != std::string::npos) arch.resize(colon);
+    return arch;
+}
+
+bool compiled_for(const std::string& arch) {
+    const std::string list = STRATA_HIP_ARCHS;
+    size_t a = 0;
+    while (a <= list.size()) {
+        size_t b = list.find(',', a);
+        if (b == std::string::npos) b = list.size();
+        if (!arch.empty() && list.compare(a, b - a, arch) == 0 && b - a == arch.size()) return true;
+        a = b + 1;
+    }
+    return false;
+}
+
+std::string arch_problem(const cudaDeviceProp& p, int ordinal) {
+    const std::string arch = base_arch(p.gcnArchName);
+    const std::string card = "GPU " + std::to_string(ordinal) + " (" + p.name + ", " + arch + ")";
+    if (!compiled_for(arch)) {
+        return card + " is not an architecture this Strata engine was compiled for (" + STRATA_HIP_ARCHS +
+               "); compile it for this card (./setup.sh --backend hip, or -DCMAKE_HIP_ARCHITECTURES=" + arch +
+               ", docs/AMD_HIP.md) or choose another GPU with HIP_VISIBLE_DEVICES";
+    }
+    if (p.warpSize != 32) {
+        return card + " runs wave" + std::to_string(p.warpSize) + "; Strata's HIP kernels need wave32";
+    }
+    return "";
+}
+#endif
+
 }  // namespace
 
+const char* compiled_gpu_archs() {
+#if defined(STRATA_USE_HIP)
+    return STRATA_HIP_ARCHS;
+#else
+    return "";
+#endif
+}
+
+std::string gpu_arch_problem(int ordinal) {
+#if defined(STRATA_USE_HIP)
+    int count = 0;
+    if (cudaGetDeviceCount(&count) != cudaSuccess || ordinal < 0 || ordinal >= count) {
+        cudaGetLastError();
+        return "";
+    }
+    cudaDeviceProp p{};
+    if (cudaGetDeviceProperties(&p, ordinal) != cudaSuccess) {
+        cudaGetLastError();
+        return "";
+    }
+    return arch_problem(p, ordinal);
+#else
+    (void) ordinal;
+    return "";
+#endif
+}
+
 DeviceInfo device_info(int ordinal) {
     int count = 0;
     check(DPCT_CHECK_ERROR(count = dpct::device_count()), "cudaGetDeviceCount");
     if (count == 0) {
 #if defined(STRATA_USE_HIP)
-        throw CudaError("no HIP device is present; this backend targets gfx1100 wave32", -1);
+        throw CudaError(std::string("no HIP device is present; this engine was compiled for ") + STRATA_HIP_ARCHS, -1);
 #else
         throw CudaError("no CUDA device is present; Strata needs an NVIDIA GPU (RTX 20 series or newer)", -1);
 #endif
@@ -113,16 +179,23 @@ DeviceInfo device_info(int ordinal) {
     // fp32-FMA fallback below sm_80, the tensor-core prompt kernels refuse and fall back).  Compiling for a
     // supported arch is enforced by CMake; RUNNING on an older card is caught here, because a binary can be carried
     // to a machine with an older card and would otherwise silently take whatever path the driver chose.  The HIP
-    // backend is validated on gfx1100 (wave32) only.
+    // backend checks the card against the architectures the binary was compiled for (and wave32).
 #if defined(STRATA_USE_HIP)
-    if (std::strncmp(p.gcnArchName, "gfx1100", 7) != 0 || p.warpSize != 32) {
-        throw CudaError("HIP backend requires validated gfx1100 wave32 hardware", -1);
-    }
+    d.arch = base_arch(p.gcnArchName);
+    if (const std::string why = arch_problem(p, ordinal); !why.empty()) throw CudaError(why, -1);
+#else
+    // #236: the experimental build (-DSTRATA_EXPERIMENTAL_SM60=ON: Pascal sm_60, Volta sm_70) runs on the cards it
+    // was built for - refusing them below 7.5 there made the flag useless; the release engine keeps 7.5
+#if defined(STRATA_EXPERIMENTAL_SM60)
+    constexpr int kMinCc = 60;
+    const char* const kNeed = "6.0 or newer (this is the experimental Pascal / Volta build)";
 #else
-    if (d.cc_major * 10 + d.cc_minor < 75) {
+    constexpr int kMinCc = 75;
+    const char* const kNeed = "7.5 or newer (RTX 20 / 30 / 40 / 50 series)";
+#endif
+    if (d.cc_major * 10 + d.cc_minor < kMinCc) {
         throw CudaError("device " + d.name + " reports compute capability " + std::to_string(d.cc_major) +
-                            "." + std::to_string(d.cc_minor) +
-                            "; Strata needs compute capability 7.5 or newer (RTX 20 / 30 / 40 / 50 series)",
+                            "." + std::to_string(d.cc_minor) + "; Strata needs compute capability " + kNeed,
                         -1);
     }
 #endif
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index c2886a1540f..efab717c96c 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -6,11 +6,14 @@
 #include "strata/core/expert_source.hpp"
 #include "strata/core/remote_experts.hpp"
 #include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/artifact/gguf_reader.hpp"
 
 #include "strata/core/pinned.hpp"
+#include "strata/platform/memory.hpp"
 #include "strata/kernels/elementwise.hpp"
 #include "strata/kernels/quantize_act.hpp"
 #include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/cpu/kq_avx2.hpp"
 
 #include <algorithm>
 #include <atomic>
@@ -22,6 +25,9 @@
 #include <filesystem>
 #include <sstream>
 #include <limits>
+#include <map>
+#include <memory>
+#include <mutex>
 #include <thread>
 #include <utility>
 #include <vector>
@@ -39,6 +45,15 @@
 #include <unistd.h>
 #endif
 
+// a 64-bit seek (as in pinned.cu): the 32-bit `fseek` wraps past 4 GiB, and the spelling differs per platform
+#ifndef STRATA_FSEEK64
+#ifdef _WIN32
+#define STRATA_FSEEK64(f, o) _fseeki64((f), (long long) (o), SEEK_SET)
+#else
+#define STRATA_FSEEK64(f, o) fseeko((f), (off_t) (o), SEEK_SET)
+#endif
+#endif
+
 namespace strata::core {
 
 namespace detail {
@@ -138,10 +153,33 @@ const uint8_t* cache_complement_blob_or_fallback(
     return mapped_fallback;
 }
 
+int64_t choose_resident_keep_from(const std::vector<uint64_t>& slot_bytes, uint64_t base_bytes, uint64_t budget,
+                                  int64_t lend_from) {
+    if (base_bytes > budget) return -1;
+    const int64_t slots = (int64_t) slot_bytes.size();
+    if (lend_from < 0 || lend_from > slots) lend_from = slots;   // no lend region: only the experts no slot holds
+    int64_t keep = slots;
+    uint64_t bytes = base_bytes;
+    while (keep > lend_from) {
+        const uint64_t b = slot_bytes[(size_t) keep - 1];
+        if (b > budget - bytes) break;
+        bytes += b;
+        --keep;
+    }
+    return keep;
+}
+
+bool exchange_cache_complement(std::vector<uint64_t>& offsets, size_t in, size_t out) {
+    if (in == out || in >= offsets.size() || out >= offsets.size() || offsets[in] == kNoCacheComplement ||
+        offsets[out] != kNoCacheComplement) return false;
+    offsets[out] = offsets[in];
+    offsets[in] = kNoCacheComplement;
+    return true;
+}
+
 }  // namespace detail
 
 namespace {
-constexpr uint64_t kPinnedMemoryHeadroom = 8ull << 30;
 
 #if defined(__linux__)
 bool read_cgroup_memory_stat(const std::filesystem::path& path, uint64_t current,
@@ -324,6 +362,16 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
         }
     }
     const std::string path = pack_dir + "/experts.bin";
+    if (layout.native && !gguf_.empty() && !std::filesystem::exists(path)) {
+        // CS-T: no experts.bin - the model's GGUF shards, read in place
+        blobs_ = (int64_t) blob_count;
+        n_layers_ = n_layers;
+        n_expert_ = n_expert;
+        layer_offsets_ = std::move(layer_offsets);
+        layer_blob_bytes_ = std::move(layer_blob_bytes);
+        if (!open_gguf(err)) { close(); return false; }
+        return true;
+    }
 
 #if defined(_WIN32)
     // UTF-8 -> UTF-16: the pack may live under a path with non-ASCII characters, and `CreateFileA` would
@@ -412,17 +460,83 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
 
 void FileExpertSource::close() {
     if (complement_arena_ != nullptr) {
-        if (complement_pinned_)(void) DPCT_CHECK_ERROR(
+        if (complement_pinned_ && !complement_partial_)(void) DPCT_CHECK_ERROR(
             sycl::free(complement_arena_, dpct::get_in_order_queue()));
-        else std::free(complement_arena_);
+        else {
+            /*
+            DPCT1027: The call to cudaHostUnregister was replaced with 0
+            because SYCL currently does not support registering of existing host
+            memory for use by device. Use USM to allocate memory for use by host
+            and device.
+            */
+            if (complement_partial_)(void) 0;
+            if (complement_locked_ > 0)
+                strata::platform::unlock_resident((uint8_t*) complement_arena_ + complement_lock_off_, complement_locked_);
+            std::free(complement_arena_);
+        }
     }
+    if (xstage_ != nullptr) {
+        if (xstage_pinned_)(void)
+            DPCT_CHECK_ERROR(sycl::free(xstage_, dpct::get_in_order_queue()));
+        else std::free(xstage_);
+    }
+    xstage_ = nullptr;
+    xstage_pinned_ = false;
+    xstage_cap_ = 0;
+    xstage_blob_ = 0;
+    override_.clear();
+    staged_.clear();
+    exchanges_ = 0;
+    file_reads_.store(0);
     complement_arena_ = nullptr;
     complement_host_ = nullptr;
     complement_device_ = nullptr;
     complement_bytes_ = 0;
     complement_offsets_.clear();
     complement_pinned_ = false;
+    complement_partial_ = false;
+    complement_pin_limit_ = 0;
+    complement_lock_off_ = 0;
     complement_ready_ = false;
+    complement_locked_ = 0;
+    complement_lent_slots_ = 0;
+    if (!maps_.empty()) {
+        for (Map& m : maps_) {
+#if defined(_WIN32)
+            if (m.base != nullptr) UnmapViewOfFile((LPCVOID) m.base);
+            if (m.mapping != nullptr) CloseHandle((HANDLE) m.mapping);
+            if (m.file != nullptr) CloseHandle((HANDLE) m.file);
+#else
+            if (m.base != nullptr) munmap((void*) m.base, (size_t) m.bytes);
+            if (m.fd >= 0) ::close(m.fd);
+#endif
+        }
+        maps_.clear();
+        base_ = nullptr;   // one of the views above
+    }
+    role_ptr_.clear();
+    role_bytes_.clear();
+    {
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        stage_buf_.clear();
+        stage_key_.clear();
+        stage_epoch_.clear();
+        stage_used_.clear();
+        stage_busy_.clear();
+        stage_of_.clear();
+        stage_blob_ = 0;
+        stage_seq_ = 0;
+        epoch_ = 0;
+        last_layer_ = -1;
+        stage_grew_ = false;
+    }
+    ram_reads_.store(0);
+    warm_stamp_.reset();
+    warm_hits_.store(0);
+    warm_count_.store(0);
+    file_read_bytes_.store(0);
+    file_blob_bytes_.store(0);
+    file_us_.store(0);
 #if defined(_WIN32)
     if (base_ != nullptr) UnmapViewOfFile((LPCVOID) base_);
     if (mapping_ != nullptr) CloseHandle((HANDLE) mapping_);
@@ -444,7 +558,430 @@ void FileExpertSource::close() {
     reads_ = 0;
 }
 
+
+bool ExpertSource::copy_blob(int64_t layer, int64_t expert, uint8_t* dst) {
+    const uint8_t* b = blob(layer, expert);
+    if (b == nullptr || dst == nullptr) return false;
+    std::memcpy(dst, b, (size_t) strata::kernels::cpu::expert_layout().blob_bytes(layer));
+    return true;
+}
+
+// ================================ CS-T: THE GGUF SHARDS IN PLACE ================================
+//
+// A native pack without experts.bin: every file native_experts.txt names is mapped (MapViewOfFile / mmap, no
+// flag - the same retention argument as experts.bin above), and an expert's blob [gate rows | up rows | down rows]
+// is three slices of three tensors, possibly in two shards (UD-Q4_K_XL's layer 11).  Nothing is read at open; a
+// blob is assembled when it is asked for (`blob`, into a small pool of buffers) or copied where it is needed
+// (`copy_blob`: the RAM copy, the prompt path's pinned stager buffers).
+bool FileExpertSource::open_gguf(std::string& err) {
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    if (!check_experts_gguf(gguf_, lay, err)) { err = "FileExpertSource: " + err; return false; }
+    const size_t cut = gguf_.find_last_of("/\\");
+    const std::string dir = cut == std::string::npos ? std::string() : gguf_.substr(0, cut + 1);
+    std::map<std::string, size_t> index;
+    role_ptr_.assign((size_t) (3 * n_layers_), nullptr);
+    role_bytes_.assign((size_t) (3 * n_layers_), 0);
+    for (int64_t l = 0; l < n_layers_; ++l) {
+        const auto& fm = lay.fmt[(size_t) l];
+        const uint64_t per[3] = {fm.up_off, fm.up_off, lay.bytes[(size_t) l] - fm.down_off};
+        for (int r = 0; r < 3; ++r) {
+            const size_t i = (size_t) (3 * l + r);
+            const std::string path = lay.gguf_file.size() > i && !lay.gguf_file[i].empty() ? dir + lay.gguf_file[i]
+                                                                                            : gguf_;
+            auto it = index.find(path);
+            if (it == index.end()) {
+                Map m;
+#if defined(_WIN32)
+                const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
+                std::vector<wchar_t> wpath((size_t) (wide > 0 ? wide : 1));
+                if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, wpath.data(), wide);
+                HANDLE f = CreateFileW(wpath.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                                       FILE_ATTRIBUTE_NORMAL, nullptr);
+                LARGE_INTEGER sz{};
+                if (f == INVALID_HANDLE_VALUE || !GetFileSizeEx(f, &sz)) {
+                    if (f != INVALID_HANDLE_VALUE) CloseHandle(f);
+                    err = "FileExpertSource: cannot open " + path;
+                    return false;
+                }
+                HANDLE mh = CreateFileMappingW(f, nullptr, PAGE_READONLY, 0, 0, nullptr);
+                void* view = mh != nullptr ? MapViewOfFile(mh, FILE_MAP_READ, 0, 0, 0) : nullptr;
+                if (view == nullptr) {
+                    if (mh != nullptr) CloseHandle(mh);
+                    CloseHandle(f);
+                    err = "FileExpertSource: cannot map " + path;
+                    return false;
+                }
+                m.file = f;
+                m.mapping = mh;
+                m.bytes = (uint64_t) sz.QuadPart;
+                m.base = (const uint8_t*) view;
+#else
+                const int fd = ::open(path.c_str(), O_RDONLY);
+                struct stat st{};
+                if (fd < 0 || fstat(fd, &st) != 0 || st.st_size <= 0) {
+                    if (fd >= 0) ::close(fd);
+                    err = "FileExpertSource: cannot open " + path;
+                    return false;
+                }
+                void* view = mmap(nullptr, (size_t) st.st_size, PROT_READ, MAP_SHARED, fd, 0);
+                if (view == MAP_FAILED) { ::close(fd); err = "FileExpertSource: cannot map " + path; return false; }
+                m.fd = fd;
+                m.bytes = (uint64_t) st.st_size;
+                m.base = (const uint8_t*) view;
+#endif
+                maps_.push_back(m);
+                it = index.emplace(path, maps_.size() - 1).first;
+            }
+            const Map& m = maps_[it->second];
+            const uint64_t at = lay.gguf_off[i], bytes = per[r] * (uint64_t) n_expert_;
+            if (at > m.bytes || bytes > m.bytes - at) {   // check_experts_gguf proved it; the mapping must agree
+                err = "FileExpertSource: an expert span runs past the end of " + path;
+                return false;
+            }
+            role_ptr_[i] = m.base + (size_t) at;
+            role_bytes_[i] = per[r];
+        }
+    }
+    base_ = maps_.front().base;       // "opened"; mapped_blob answers nullptr in this mode
+    warm_stamp_.reset(new std::atomic<uint32_t>[(size_t) (n_layers_ * n_expert_)]());
+    for (uint64_t b : layer_blob_bytes_) stage_blob_ = std::max(stage_blob_, b);
+    return true;
+}
+
+bool FileExpertSource::copy_from_files(int64_t layer, int64_t expert, uint8_t* dst) const {
+    if (dst == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
+    if (!role_ptr_.empty()) {
+        uint64_t at = 0;
+        for (int r = 0; r < 3; ++r) {
+            const size_t i = (size_t) (3 * layer + r);
+            const uint64_t per = role_bytes_[i];
+            std::memcpy(dst + at, role_ptr_[i] + (size_t) ((uint64_t) expert * per), (size_t) per);
+            at += per;
+        }
+        return true;
+    }
+    const uint8_t* b = mapped_blob(layer, expert);
+    if (b == nullptr) return false;
+    std::memcpy(dst, b, (size_t) layer_blob_bytes_[(size_t) layer]);
+    return true;
+}
+
+// A blob assembled from the three role slices.  The buffer of a (layer, expert) is reused for another only once
+// its blob has not been asked for during `kStageAge` layers (begin_layer) or 256 assemblies, whichever comes
+// first, and never while it is being filled: the pool computes a layer's misses before it starts the next, and a
+// fill (the GPU cache at startup, an adaptive swap, a helper GPU) copies the blob right away.
+//
+// `claim_stage` finds or reserves the buffer of `key` (stage_mu_ held): true when the blob is already there (or
+// being filled by another thread - the caller then waits), false when the caller must fill buffer `v`.
+bool FileExpertSource::claim_stage(int64_t key, size_t& v, bool& fill) {
+    constexpr uint64_t kStageSeq = 256;
+    const uint64_t seq = ++stage_seq_;
+    auto it = stage_of_.find(key);
+    fill = false;
+    if (it != stage_of_.end()) {
+        v = it->second;
+        stage_epoch_[v] = epoch_;
+        stage_used_[v] = seq;
+        return true;
+    }
+    v = stage_buf_.size();
+    uint64_t oldest = std::numeric_limits<uint64_t>::max();
+    for (size_t i = 0; i < stage_buf_.size(); ++i)
+        if (!stage_busy_[i] && (stage_epoch_[i] + kStageAge <= epoch_ || stage_used_[i] + kStageSeq <= seq) &&
+            stage_used_[i] < oldest) {
+            oldest = stage_used_[i];
+            v = i;
+        }
+    if (v == stage_buf_.size()) {
+        stage_buf_.emplace_back(new (std::nothrow) uint8_t[(size_t) stage_blob_]);
+        if (!stage_buf_.back()) { stage_buf_.pop_back(); return false; }
+        stage_key_.push_back(-1);
+        stage_epoch_.push_back(0);
+        stage_used_.push_back(0);
+        stage_busy_.push_back(0);
+        if (stage_buf_.size() == 512 && !stage_grew_) {
+            stage_grew_ = true;
+            std::fprintf(stderr, "FileExpertSource: %zu blobs assembled from the GGUF are in use at once (%.2f GiB)\n",
+                         stage_buf_.size(), (double) stage_buf_.size() * (double) stage_blob_ / 1073741824.0);
+        }
+    } else {
+        stage_of_.erase(stage_key_[v]);
+    }
+    stage_key_[v] = key;
+    stage_epoch_[v] = epoch_;
+    stage_used_[v] = seq;
+    stage_busy_[v] = 1;
+    stage_of_[key] = v;
+    fill = true;
+    return false;
+}
+
+// Fills buffer `v` (reserved by claim_stage) outside the lock, then publishes it.
+bool FileExpertSource::fill_stage(size_t v, int64_t layer, int64_t expert, uint8_t* dst) {
+    const auto t0 = std::chrono::steady_clock::now();
+    const bool ok = copy_from_files(layer, expert, dst);
+    const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count();
+    file_us_.fetch_add((uint64_t) us, std::memory_order_relaxed);
+    if (ok) {
+        file_read_bytes_.fetch_add(layer_blob_bytes_[(size_t) layer], std::memory_order_relaxed);
+        file_blob_bytes_.fetch_add(layer_blob_bytes_[(size_t) layer], std::memory_order_relaxed);
+    }
+    {
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        stage_busy_[v] = 0;
+        if (!ok) {
+            stage_of_.erase(stage_key_[v]);
+            stage_key_[v] = -1;
+        }
+    }
+    stage_cv_.notify_all();
+    return ok;
+}
+
+const uint8_t* FileExpertSource::staged_blob(int64_t layer, int64_t expert) {
+    const int64_t key = layer * n_expert_ + expert;
+    size_t v = 0;
+    bool fill = false;
+    uint8_t* dst = nullptr;
+    {
+        std::unique_lock<std::mutex> lk(stage_mu_);
+        const bool have = claim_stage(key, v, fill);
+        if (!have && !fill) return nullptr;
+        dst = stage_buf_[v].get();
+        if (have) {
+            // another thread (a prefetch, the adaptive tier) is filling it: wait for that
+            stage_cv_.wait(lk, [&] { return !stage_busy_[v] || stage_key_[v] != key; });
+            if (stage_key_[v] != key) return nullptr;   // its fill failed
+            return dst;
+        }
+    }
+    return fill_stage(v, layer, expert, dst) ? dst : nullptr;
+}
+
+void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n) {
+    if (role_ptr_.empty() || n <= 0 || layer < 0 || layer >= n_layers_) return;
+    struct Fill { size_t v; int64_t e; uint8_t* dst; };
+    std::vector<Fill> todo;
+    {
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        for (int64_t i = 0; i < n; ++i) {
+            const int64_t e = experts[i];
+            if (e < 0 || e >= n_expert_) continue;
+            const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) e;
+            if (complement_ready_ && index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement)
+                continue;                                     // in the RAM copy
+            if (!override_.empty() && override_[index] != nullptr) continue;
+            size_t v = 0;
+            bool fill = false;
+            if (!claim_stage(layer * n_expert_ + e, v, fill) && fill) {
+                todo.push_back({v, e, stage_buf_[v].get()});
+                if (warm_stamp_) {
+                    const uint32_t s = warm_stamp_[index].load(std::memory_order_relaxed);
+                    if (s != 0 && (uint64_t) s + 3 >= epoch_ + 1) warm_hits_.fetch_add(1, std::memory_order_relaxed);
+                }
+            }
+        }
+    }
+    if (todo.empty()) return;
+#if defined(_WIN32)
+    // One PrefetchVirtualMemory call for every slice about to be copied: the memory manager reads them in large
+    // requests, all queued at once, where the copies' page faults would read a few clusters each.  The copies below
+    // then find the pages resident (or in flight).  STRATA_FETCH_PVM=0 is the A/B arm.
+    {
+        using Pvm = BOOL(WINAPI*)(HANDLE, ULONG_PTR, PWIN32_MEMORY_RANGE_ENTRY, ULONG);
+        static const Pvm pvm = [] {
+            const char* v = std::getenv("STRATA_FETCH_PVM");
+            if (v != nullptr && std::atoi(v) == 0) return (Pvm) nullptr;
+            return (Pvm) (void*) GetProcAddress(GetModuleHandleW(L"kernel32.dll"), "PrefetchVirtualMemory");
+        }();
+        if (pvm != nullptr) {
+            std::vector<WIN32_MEMORY_RANGE_ENTRY> ranges;
+            ranges.reserve(todo.size() * 3);
+            for (const Fill& f : todo)
+                for (int r = 0; r < 3; ++r) {
+                    const size_t i = (size_t) (3 * layer + r);
+                    ranges.push_back({(PVOID) (role_ptr_[i] + (size_t) ((uint64_t) f.e * role_bytes_[i])),
+                                      (SIZE_T) role_bytes_[i]});
+                }
+            (void) pvm(GetCurrentProcess(), (ULONG_PTR) ranges.size(), ranges.data(), 0);
+        }
+    }
+#endif
+    // the page faults of a mapped read are one outstanding request each: several threads keep the SSD's queue full
+    std::atomic<size_t> next{0};
+    auto work = [&] {
+        for (size_t i; (i = next.fetch_add(1)) < todo.size();)
+            (void) fill_stage(todo[i].v, layer, todo[i].e, todo[i].dst);
+    };
+    const size_t nt = std::min<size_t>(todo.size(), (size_t) fetch_threads_);
+    std::vector<std::thread> th;
+    for (size_t t = 1; t < nt; ++t) th.emplace_back(work);
+    work();
+    for (auto& t : th) t.join();
+}
+
+
+void FileExpertSource::warm(int64_t layer, const int64_t* experts, int64_t n) {
+    if (role_ptr_.empty() || n <= 0 || layer < 0 || layer >= n_layers_) return;
+    uint32_t stamp;
+    {
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        stamp = (uint32_t) epoch_ + 1;
+    }
+#if defined(_WIN32)
+    using Pvm = BOOL(WINAPI*)(HANDLE, ULONG_PTR, PWIN32_MEMORY_RANGE_ENTRY, ULONG);
+    static const Pvm pvm = (Pvm) (void*) GetProcAddress(GetModuleHandleW(L"kernel32.dll"), "PrefetchVirtualMemory");
+    std::vector<WIN32_MEMORY_RANGE_ENTRY> ranges;
+#endif
+    for (int64_t j = 0; j < n; ++j) {
+        const int64_t e = experts[j];
+        if (e < 0 || e >= n_expert_) continue;
+        const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) e;
+        if (complement_ready_ && index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement)
+            continue;                                                    // in the RAM copy
+        if (warm_stamp_) warm_stamp_[index].store(stamp, std::memory_order_relaxed);
+        warm_count_.fetch_add(1, std::memory_order_relaxed);
+        for (int r = 0; r < 3; ++r) {
+            const size_t i = (size_t) (3 * layer + r);
+            const uint8_t* p = role_ptr_[i] + (size_t) ((uint64_t) e * role_bytes_[i]);
+#if defined(_WIN32)
+            ranges.push_back({(PVOID) p, (SIZE_T) role_bytes_[i]});
+#else
+            const uintptr_t pg = 4096, a = (uintptr_t) p & ~(pg - 1);
+            (void) madvise((void*) a, (size_t) ((uintptr_t) p + role_bytes_[i] - a), MADV_WILLNEED);
+#endif
+        }
+    }
+#if defined(_WIN32)
+    if (pvm != nullptr && !ranges.empty()) (void) pvm(GetCurrentProcess(), (ULONG_PTR) ranges.size(), ranges.data(), 0);
+#endif
+}
+
+RouterLookahead::~RouterLookahead() {
+    {
+        std::lock_guard<std::mutex> lk(mu_);
+        quit_ = true;
+    }
+    cv_.notify_all();
+    if (thread_.joinable()) thread_.join();
+}
+
+bool RouterLookahead::start(std::vector<std::vector<uint16_t>> routers, int64_t n_embd, int64_t n_expert, int k,
+                            ExpertSource* src, std::string& err) {
+    if (src == nullptr || !src->warms()) { err = "RouterLookahead: the expert source does not warm"; return false; }
+    if (n_embd % 8 != 0) { err = "RouterLookahead: n_embd is not a multiple of 8"; return false; }
+    for (const auto& r : routers)
+        if (r.size() != (size_t) (n_embd * n_expert)) { err = "RouterLookahead: a router of another shape"; return false; }
+    routers_ = std::move(routers);
+    n_embd_ = n_embd;
+    n_expert_ = n_expert;
+    k_ = k < 1 ? 1 : k > (int) n_expert ? (int) n_expert : k;
+    src_ = src;
+    x_.assign((size_t) (8 * n_embd), 0.f);
+    thread_ = std::thread([this] { run(); });
+    return true;
+}
+
+void RouterLookahead::submit(int64_t layer, const float* x, int64_t n_tok, const int32_t* host_res) {
+    if (layer + 1 >= (int64_t) routers_.size() || n_tok <= 0 || x == nullptr) return;
+    {
+        std::lock_guard<std::mutex> lk(mu_);
+        if (busy_ || pending_) { skipped_.fetch_add(1, std::memory_order_relaxed); return; }
+        n_tok_ = std::min<int64_t>(n_tok, 8);
+        std::memcpy(x_.data(), x, (size_t) (n_tok_ * n_embd_) * sizeof(float));
+        layer_ = layer + 1;
+        host_res_ = host_res;
+        pending_ = true;
+    }
+    cv_.notify_one();
+}
+
+void RouterLookahead::run() {
+    std::vector<float> logits((size_t) (8 * n_expert_));
+    std::vector<int32_t> order((size_t) n_expert_);
+    std::vector<int64_t> want;
+    for (;;) {
+        int64_t layer, nt;
+        const int32_t* host_res;
+        {
+            std::unique_lock<std::mutex> lk(mu_);
+            cv_.wait(lk, [&] { return quit_ || pending_; });
+            if (quit_) return;
+            pending_ = false;
+            busy_ = true;
+            layer = layer_;
+            nt = n_tok_;
+            host_res = host_res_;
+        }
+        const auto t0 = std::chrono::steady_clock::now();
+        want.clear();
+        strata::kernels::cpu::bf16_rows_dot_multi(routers_[(size_t) layer].data(), (int) n_expert_, (int) n_embd_,
+                                                  x_.data(), (int) nt, logits.data());
+        for (int64_t t = 0; t < nt; ++t) {
+            const float* lt = logits.data() + (size_t) (t * n_expert_);
+            for (int64_t e = 0; e < n_expert_; ++e) order[(size_t) e] = (int32_t) e;
+            std::partial_sort(order.begin(), order.begin() + k_, order.end(),
+                              [&](int32_t a, int32_t b) { return lt[(size_t) a] > lt[(size_t) b]; });
+            for (int j = 0; j < k_; ++j) {
+                const int64_t e = order[(size_t) j];
+                if (host_res != nullptr && host_res[(size_t) (layer * n_expert_ + e)] >= 0) continue;   // on the GPU
+                if (std::find(want.begin(), want.end(), e) == want.end()) want.push_back(e);
+            }
+        }
+        src_->warm(layer, want.data(), (int64_t) want.size());
+        predicted_.fetch_add((int64_t) want.size(), std::memory_order_relaxed);
+        busy_us_.fetch_add((uint64_t) std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count(),
+                           std::memory_order_relaxed);
+        {
+            std::lock_guard<std::mutex> lk(mu_);
+            busy_ = false;
+        }
+    }
+}
+
+void FileExpertSource::begin_layer(int64_t layer, const int32_t* ids, int64_t k) {
+    (void) ids;
+    (void) k;
+    if (role_ptr_.empty()) return;
+    std::lock_guard<std::mutex> lk(stage_mu_);
+    if (layer != last_layer_) {
+        ++epoch_;
+        last_layer_ = layer;
+    }
+}
+
+bool FileExpertSource::transient(int64_t layer, int64_t expert) const {
+    if (role_ptr_.empty() || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    if (complement_ready_ && index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement)
+        return false;
+    return override_.empty() || override_[index] == nullptr;
+}
+
+bool FileExpertSource::copy_blob(int64_t layer, int64_t expert, uint8_t* dst) {
+    if (base_ == nullptr || dst == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_)
+        return false;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    const uint64_t bytes = layer_blob_bytes_[(size_t) layer];
+    if (complement_ready_) {
+        const uint8_t* held =
+            detail::cache_complement_blob_or_fallback(index, complement_offsets_, complement_host_, nullptr);
+        if (held == nullptr && !override_.empty()) held = override_[index];
+        if (held != nullptr) {
+            std::memcpy(dst, held, (size_t) bytes);
+            return true;
+        }
+    }
+    const auto t0 = std::chrono::steady_clock::now();
+    if (!copy_from_files(layer, expert, dst)) return false;
+    file_us_.fetch_add((uint64_t) std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count(),
+                       std::memory_order_relaxed);
+    file_read_bytes_.fetch_add(bytes, std::memory_order_relaxed);
+    return true;
+}
+
 const uint8_t* FileExpertSource::mapped_blob(int64_t layer, int64_t expert) const {
+    if (!role_ptr_.empty()) return nullptr;   // the GGUF in place: no contiguous blob in any file
     if (base_ == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return nullptr;
     const size_t i = (size_t) layer;
     if (i >= layer_offsets_.size() || i >= layer_blob_bytes_.size()) return nullptr;
@@ -460,7 +997,9 @@ const uint8_t* FileExpertSource::mapped_blob(int64_t layer, int64_t expert) cons
 
 bool FileExpertSource::pin_cache_complement(
     const ExpertCache &cache, std::string &err, bool pin,
-    const std::vector<std::pair<int32_t, int32_t>> &additional_gpu_pairs) try {
+    const std::vector<std::pair<int32_t, int32_t>> &additional_gpu_pairs,
+    int64_t lend_from_slot, uint64_t headroom_bytes, uint64_t budget_bytes,
+    const std::vector<std::pair<int32_t, int32_t>> *rank) try {
     err.clear();
     if (base_ == nullptr) { err = "FileExpertSource: open the mapped experts before pinning a complement"; return false; }
     if (complement_ready_) { err = "FileExpertSource: the cache complement is already pinned"; return false; }
@@ -495,186 +1034,383 @@ bool FileExpertSource::pin_cache_complement(
         return false;
     }
 
+    // The GPU cache's experts, and the bytes each slot's expert takes here (for the lend region below).
+    const int64_t n_slots = cache.slots();
     std::vector<std::pair<int32_t, int32_t>> primary_gpu_pairs;
+    std::vector<int32_t> pair_slot;
+    std::vector<uint64_t> slot_bytes((size_t) std::max<int64_t>(n_slots, 0), 0);
     primary_gpu_pairs.reserve((size_t) cache.resident());
+    pair_slot.reserve((size_t) cache.resident());
     for (int64_t layer = 0; layer < n_layers_; ++layer) {
         for (int64_t expert = 0; expert < n_expert_; ++expert) {
-            if (cache.slot_of(layer, expert) != kNotResident)
-                primary_gpu_pairs.emplace_back((int32_t) layer, (int32_t) expert);
+            const int32_t slot = cache.slot_of(layer, expert);
+            if (slot == kNotResident) continue;
+            primary_gpu_pairs.emplace_back((int32_t) layer, (int32_t) expert);
+            pair_slot.push_back(slot);
+            if (slot >= 0 && slot < n_slots) slot_bytes[(size_t) slot] = layer_blob_bytes_[(size_t) layer];
         }
     }
     std::vector<uint64_t> offsets;
     uint64_t bytes = 0;
     if (!detail::make_cache_complement_plan(n_layers_, n_expert_, layer_blob_bytes_, primary_gpu_pairs,
                                             additional_gpu_pairs, offsets, bytes, err)) return false;
+    if (budget_bytes > 0) {
+        // CS-T: a RAM budget.  The complement's experts in `rank` order (the expert profile, hottest first) while
+        // they fit, the rest left on the mapped files; clamped to what the RAM has room for.
+        uint64_t physical = 0;
+        if (!available_memory_bytes(physical)) {
+            err = "FileExpertSource: cannot determine available RAM for --resident-budget-gib";
+            return false;
+        }
+        const uint64_t room = physical > headroom_bytes ? physical - headroom_bytes : 0;
+        if (budget_bytes > room) {
+            std::fprintf(stderr, "FileExpertSource: --resident-budget-gib %.2f is more than the RAM has room for "
+                                 "(%.2f GiB available minus %.0f GiB headroom): %.2f GiB\n",
+                         (double) budget_bytes / 1073741824.0, (double) physical / 1073741824.0,
+                         (double) headroom_bytes / 1073741824.0, (double) room / 1073741824.0);
+            budget_bytes = room;
+        }
+        std::vector<uint64_t> ranked(offsets.size(), kNoComplement);
+        uint64_t at = 0;
+        int64_t held = 0;
+        if (rank != nullptr)
+            for (const auto& pr : *rank) {
+                if (pr.first < 0 || pr.second < 0 || pr.first >= n_layers_ || pr.second >= n_expert_) continue;
+                const size_t i = (size_t) pr.first * (size_t) n_expert_ + (size_t) pr.second;
+                if (offsets[i] == kNoComplement || ranked[i] != kNoComplement) continue;   // on a GPU, or twice
+                const uint64_t b = layer_blob_bytes_[(size_t) pr.first];
+                if (b > budget_bytes - at) continue;
+                ranked[i] = at;
+                at += b;
+                ++held;
+            }
+        std::fprintf(stderr, "FileExpertSource: RAM budget %.2f GiB: %lld of the %.2f GiB of experts the GPU cache does "
+                             "not hold, by profile rank; the rest are read from the files\n",
+                     (double) budget_bytes / 1073741824.0, (long long) held, (double) bytes / 1073741824.0);
+        offsets.swap(ranked);
+        bytes = at;
+        lend_from_slot = -1;
+    }
 
-    if (bytes > 0) {
+    const bool lend = lend_from_slot >= 0 && lend_from_slot < n_slots && additional_gpu_pairs.empty();
+    uint64_t budget = std::numeric_limits<uint64_t>::max();
+    if (bytes > 0 || lend) {
         uint64_t physical = 0;
         if (!available_memory_bytes(physical)) {
             err = "FileExpertSource: cannot determine available RAM for the resident-memory safety check";
             return false;
         }
-        if (physical <= kPinnedMemoryHeadroom || bytes > physical - kPinnedMemoryHeadroom) {
-            char message[256];
+        budget = physical > headroom_bytes ? physical - headroom_bytes : 0;
+        if (bytes > budget) {
+            char message[320];
             std::snprintf(message, sizeof message,
-                          "FileExpertSource: resident complement %.2f GiB exceeds available RAM minus the 8 GiB safety headroom",
-                          (double) bytes / 1073741824.0);
+                          "FileExpertSource: resident complement %.2f GiB exceeds available RAM (%.2f GiB) minus the "
+                          "%.0f GiB safety headroom",
+                          (double) bytes / 1073741824.0, (double) physical / 1073741824.0,
+                          (double) headroom_bytes / 1073741824.0);
             err = message;
             return false;
         }
     }
+    // The prompt path's lend region: its slots' experts are streamed from here during a prompt and copied back into
+    // their slots after it, so the ones that fit are kept here too (from the last slot down: a short prompt lends
+    // only the last few).  The rest keep the mapped-file fallback.
+    int64_t keep_from = n_slots;
+    if (lend) {
+        keep_from = detail::choose_resident_keep_from(slot_bytes, bytes, budget, lend_from_slot);
+        if (keep_from < 0) keep_from = n_slots;
+        if (keep_from < n_slots) {
+            std::vector<std::pair<int32_t, int32_t>> core;
+            core.reserve(primary_gpu_pairs.size());
+            for (size_t i = 0; i < primary_gpu_pairs.size(); ++i)
+                if (pair_slot[i] < keep_from) core.push_back(primary_gpu_pairs[i]);
+            if (!detail::make_cache_complement_plan(n_layers_, n_expert_, layer_blob_bytes_, core,
+                                                    additional_gpu_pairs, offsets, bytes, err)) return false;
+        }
+    }
 
     void* arena = nullptr;
     const uint8_t* host = nullptr;
     const uint8_t* device = nullptr;
+    bool pinned_ok = false;
+    uint64_t locked = 0;
+    uint64_t partial_pin = 0;   ///< CS-T: a registered prefix of a locked arena
+    uint64_t lock_off = 0;      ///< where the working-set lock starts (after the registered prefix)
+    std::string note;
+    auto release = [&]() {
+        try {
+    if (arena == nullptr) return;
+        if (pinned_ok)(void)
+            DPCT_CHECK_ERROR(sycl::free(arena, dpct::get_in_order_queue()));
+        else {
+            /*
+            DPCT1027: The call to cudaHostUnregister was replaced with 0
+            because SYCL currently does not support registering of existing host
+            memory for use by device. Use USM to allocate memory for use by host
+            and device.
+            */
+            if (partial_pin > 0)(void) 0;
+            if (locked > 0) strata::platform::unlock_resident((uint8_t*) arena + lock_off, locked);
+            std::free(arena);
+        }
+        arena = nullptr;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
     if (bytes > 0) {
         std::fprintf(stderr, "FileExpertSource: allocating %.2f GiB %s cache complement\n",
-                     (double) bytes / 1073741824.0, pin ? "mapped pinned" : "pageable resident");
+                     (double) bytes / 1073741824.0, pin ? "page-locked" : "pageable resident");
         std::fflush(stderr);
         if (pin) {
             const dpct::err0 allocated = DPCT_CHECK_ERROR(
                 arena = (void *)sycl::malloc_host((size_t)bytes,
                                                   dpct::get_in_order_queue()));
-            /*
-            DPCT1000: Error handling if-stmt was detected but could not be
-            rewritten.
-            */
-            if (allocated != 0) {
-                /*
-                DPCT1001: The statement could not be removed.
-                */
-                err = std::string("FileExpertSource: mapped pinned complement "
-                                  "allocation failed: ") +
-                      /*
-                      DPCT1009: SYCL reports errors using exceptions and
-                      does not use error codes. Please replace the
-                      "get_error_string_dummy(...)" with a real error-handling
-                      function.
-                      */
-                      dpct::get_error_string_dummy(allocated);
-                std::fprintf(stderr, "%s\n", err.c_str());
-                std::fflush(stderr);
+            if (allocated == 0) {
+                void* alias = nullptr;
+                const dpct::err0 aliased =
+                    DPCT_CHECK_ERROR(alias = (void *)arena);
+                if (aliased == 0 && alias != nullptr) {
+                    device = (const uint8_t*) alias;
+                    pinned_ok = true;
+                    note = "page-locked and mapped";
+                } else {
+                    /*
+                    DPCT1009: SYCL reports errors using exceptions and does
+                    not use error codes. Please replace the
+                    "get_error_string_dummy(...)" with a real error-handling
+                    function.
+                    */
+                    note = std::string("no device alias (") +
+                           dpct::get_error_string_dummy(aliased) + ")";
+                    /*
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
+                    */
+                    (void)0;
+                    (void)DPCT_CHECK_ERROR(
+                        sycl::free(arena, dpct::get_in_order_queue()));
+                    arena = nullptr;
+                }
+            } else {
+                // Refused (the driver's page-locked limit): the same bytes in ordinary memory, locked in the working
+                // set instead, as the arena does - resident either way, only copied by the CPU instead of by DMA.
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
-                replaced with 0. You need to rewrite this code.
+                DPCT1009: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
                 */
-                (void)0;
-                return false;
-            }
-            host = (const uint8_t*) arena;
-            void* alias = nullptr;
-            const dpct::err0 aliased = DPCT_CHECK_ERROR(alias = (void *)arena);
-            if (aliased != 0 || alias == nullptr) {
-                err = std::string("FileExpertSource: mapped pinned complement "
-                                  "device alias failed: ") +
-                      /*
-                      DPCT1009: SYCL reports errors using exceptions and
-                      does not use error codes. Please replace the
-                      "get_error_string_dummy(...)" with a real error-handling
-                      function.
-                      */
-                      dpct::get_error_string_dummy(aliased);
-                std::fprintf(stderr, "%s\n", err.c_str());
-                std::fflush(stderr);
+                note = std::string("page-locking refused (") +
+                       dpct::get_error_string_dummy(allocated) + ")";
                 /*
                 DPCT1010: SYCL uses exceptions to report errors and does not
                 use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
-                (void)DPCT_CHECK_ERROR(
-                    sycl::free(arena, dpct::get_in_order_queue()));
-                return false;
+                arena = nullptr;
             }
-            device = (const uint8_t*) alias;
-        } else {
+        }
+        if (arena == nullptr) {
             arena = std::malloc((size_t) bytes);
             if (arena == nullptr) {
                 err = "FileExpertSource: pageable resident complement allocation failed";
                 return false;
             }
-            host = (const uint8_t*) arena;
+            if (pin) {
+                // CS-T, a RAM budget: its bytes are in profile order, hottest first, so the driver is asked to
+                // register the largest prefix it takes (from the cap down in 2 GiB steps).  Those experts can be
+                // read by the GPU over PCIe (--pcie-frac) and copied by DMA; only the rest is locked in the working
+                // set (the registered prefix is page-locked by the driver already - locking it twice made the next
+                // device allocation fail).
+                // opt-in (STRATA_PARTIAL_PIN=1): on the RTX 5070 PC the GPU's PCIe share of the misses measured no
+                // faster than the CPU computing them (7.30 / 7.44 tok/s with 24 / 16 GiB registered against 7.05-7.74
+                // unpinned at a 40 GiB budget), and registering adds startup time and driver memory pressure
+                static const bool partial_on = [] {
+                    const char* v = std::getenv("STRATA_PARTIAL_PIN");
+                    return v != nullptr && std::atoi(v) != 0;
+                }();
+                // at most STRATA_PARTIAL_PIN_GIB (default 24): registering 30 GiB of a 40 GiB arena left the driver
+                // unable to page-lock the prompt path's small buffers afterwards (RTX 5070, WDDM)
+                static const uint64_t pin_cap = [] {
+                    const char* v = std::getenv("STRATA_PARTIAL_PIN_GIB");
+                    return (uint64_t) ((v != nullptr && std::atof(v) > 0 ? std::atof(v) : 24.0) * 1073741824.0);
+                }();
+                if (budget_bytes > 0 && partial_on) {
+                    const uint64_t step = 2ull << 30;
+                    for (uint64_t want = std::min(bytes, pin_cap); want >= step; want = want > step ? want - step : 0) {
+                        // cut at an expert boundary: a blob that started inside the registered range and ran past it
+                        // would be taken as page-locked by a cudaMemcpyAsync and refused ("adaptive refill failed")
+                        uint64_t w = want;
+                        for (size_t i = 0; i < offsets.size(); ++i) {
+                            if (offsets[i] == kNoComplement) continue;
+                            const uint64_t b = layer_blob_bytes_[i / (size_t) n_expert_];
+                            if (offsets[i] < want && offsets[i] + b > want) { w = offsets[i]; break; }
+                        }
+                        if (w == 0) break;
+                        /*
+                        DPCT1027: The call to cudaHostRegister was replaced
+                        with 0 because SYCL currently does not support
+                        registering of existing host memory for use by device.
+                        Use USM to allocate memory for use by host and device.
+                        */
+                        if (0 == 0) {
+                            void* alias = nullptr;
+                            if (DPCT_CHECK_ERROR(alias = (void *)arena) == 0 &&
+                                alias != nullptr) {
+                                device = (const uint8_t*) alias;
+                                partial_pin = w;
+                            } else {
+                                /*
+                                DPCT1010: SYCL uses exceptions to report
+                                errors and does not use the error codes. The
+                                cudaGetLastError function call was replaced with
+                                0. You need to rewrite this code.
+                                */
+                                (void)0;
+                                /*
+                                DPCT1027: The call to cudaHostUnregister was
+                                replaced with 0 because SYCL currently does not
+                                support registering of existing host memory for
+                                use by device. Use USM to allocate memory for
+                                use by host and device.
+                                */
+                                (void)0;
+                            }
+                            break;
+                        }
+                        /*
+                        DPCT1010: SYCL uses exceptions to report errors and
+                        does not use the error codes. The cudaGetLastError
+                        function call was replaced with 0. You need to rewrite
+                        this code.
+                        */
+                        (void)0;
+                        if (want <= step) break;
+                    }
+                    char msg[160];
+                    std::snprintf(msg, sizeof msg, "%.2f GiB of it registered for the GPU (the hottest)",
+                                  (double) partial_pin / 1073741824.0);
+                    note += std::string("; ") + msg;
+                }
+                lock_off = partial_pin;
+                const strata::platform::LockResult lr =
+                    strata::platform::lock_resident((uint8_t*) arena + lock_off, bytes - lock_off);
+                locked = lr.locked_bytes;
+                note += (note.empty() ? "" : "; ") + lr.note;
+            }
         }
+        host = (const uint8_t*) arena;
     }
 
-    uint64_t copied = 0;
-    for (int64_t layer = 0; layer < n_layers_; ++layer) {
-        const uint64_t blob_bytes = layer_blob_bytes_[(size_t) layer];
-        for (int64_t expert = 0; expert < n_expert_; ++expert) {
-            const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
-            const uint64_t offset = offsets[index];
-            if (offset == kNoComplement) continue;
-            const uint8_t* source = mapped_blob(layer, expert);
-            if (source == nullptr || offset > bytes || blob_bytes > bytes - offset) {
-                err = "FileExpertSource: invalid blob bounds while building the cache complement";
-                if (arena != nullptr) {
-                    if (pin)(void) DPCT_CHECK_ERROR(
-                        sycl::free(arena, dpct::get_in_order_queue()));
-                    else std::free(arena);
+    // Copied layer by layer on a few threads: the page faults of the mapped file are the cost, and they overlap.
+#if !defined(_WIN32)
+    const long page_size = sysconf(_SC_PAGESIZE);
+    if (page_size <= 0) {
+        err = "FileExpertSource: cannot determine page size for mapped-page release";
+        release();
+        return false;
+    }
+#endif
+    std::atomic<int64_t> next_layer{0}, layers_done{0};
+    std::atomic<uint64_t> copied{0};
+    std::atomic<bool> failed{false};
+    std::mutex fail_mu;
+    std::string fail_msg;
+    auto fail = [&](const std::string& m) {
+        std::lock_guard<std::mutex> lock(fail_mu);
+        if (fail_msg.empty()) fail_msg = m;
+        failed.store(true);
+    };
+    auto worker = [&]() {
+        for (;;) {
+            const int64_t layer = next_layer.fetch_add(1);
+            if (layer >= n_layers_ || failed.load()) return;
+            const uint64_t blob_bytes = layer_blob_bytes_[(size_t) layer];
+            for (int64_t expert = 0; expert < n_expert_; ++expert) {
+                const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+                const uint64_t offset = offsets[index];
+                if (offset == kNoComplement) continue;
+                if (offset > bytes || blob_bytes > bytes - offset ||
+                    !copy_from_files(layer, expert, (uint8_t*) host + (size_t) offset)) {
+                    fail("FileExpertSource: invalid blob bounds while building the cache complement");
+                    return;
                 }
-                return false;
+                copied.fetch_add(blob_bytes);
             }
-            std::memcpy((uint8_t*) host + (size_t) offset, source, (size_t) blob_bytes);
-            copied += blob_bytes;
-        }
 #if !defined(_WIN32)
-        const uint64_t layer_offset = layer_offsets_[(size_t) layer];
-        const uint64_t layer_bytes = blob_bytes * (uint64_t) n_expert_;
-        const uint64_t layer_end = layer_offset + layer_bytes;
-        const long page_bytes = sysconf(_SC_PAGESIZE);
-        if (page_bytes <= 0) {
-            err = "FileExpertSource: cannot determine page size for mapped-page release";
-            if (arena != nullptr) {
-                if (pin)(void) DPCT_CHECK_ERROR(
-                    sycl::free(arena, dpct::get_in_order_queue()));
-                else std::free(arena);
+            if (role_ptr_.empty()) {   // experts.bin; the GGUF in place leaves its pages to the OS
+            const uint64_t layer_offset = layer_offsets_[(size_t) layer];
+            const uint64_t layer_bytes = blob_bytes * (uint64_t) n_expert_;
+            const uint64_t layer_end = layer_offset + layer_bytes;
+            const uint64_t page = (uint64_t) page_size;
+            const uint64_t advice_start = layer_offset - layer_offset % page;
+            const uint64_t end_remainder = layer_end % page;
+            const uint64_t extra = end_remainder == 0 ? 0 : page - end_remainder;
+            const uint64_t advice_end = extra > mapped_bytes_ - layer_end ? mapped_bytes_ : layer_end + extra;
+            if (advice_end > advice_start &&
+                madvise((void*) (base_ + (size_t) advice_start), (size_t) (advice_end - advice_start), MADV_DONTNEED) != 0) {
+                fail("FileExpertSource: madvise could not release mapped expert layer " + std::to_string(layer));
+                return;
             }
-            return false;
-        }
-        const uint64_t page = (uint64_t) page_bytes;
-        const uint64_t advice_start = layer_offset - layer_offset % page;
-        const uint64_t end_remainder = layer_end % page;
-        const uint64_t extra = end_remainder == 0 ? 0 : page - end_remainder;
-        const uint64_t advice_end = extra > mapped_bytes_ - layer_end ? mapped_bytes_ : layer_end + extra;
-        if (advice_end > advice_start &&
-            madvise((void*) (base_ + (size_t) advice_start), (size_t) (advice_end - advice_start), MADV_DONTNEED) != 0) {
-            err = "FileExpertSource: madvise could not release mapped expert layer " + std::to_string(layer);
-            if (arena != nullptr) {
-                if (pin)(void) DPCT_CHECK_ERROR(
-                    sycl::free(arena, dpct::get_in_order_queue()));
-                else std::free(arena);
+            if (posix_fadvise(fd_, (off_t) layer_offset, (off_t) layer_bytes, POSIX_FADV_DONTNEED) != 0) {
+                fail("FileExpertSource: posix_fadvise could not release expert layer " + std::to_string(layer));
+                return;
             }
-            return false;
-        }
-        const int advice = posix_fadvise(fd_, (off_t) layer_offset, (off_t) layer_bytes, POSIX_FADV_DONTNEED);
-        if (advice != 0) {
-            err = "FileExpertSource: posix_fadvise could not release expert layer " + std::to_string(layer);
-            if (arena != nullptr) {
-                if (pin)(void) DPCT_CHECK_ERROR(
-                    sycl::free(arena, dpct::get_in_order_queue()));
-                else std::free(arena);
             }
-            return false;
-        }
 #endif
-        if ((layer + 1) % 8 == 0 || layer + 1 == n_layers_) {
-            std::fprintf(stderr, "FileExpertSource: copied cache complement through layer %lld/%lld (%.2f GiB)\n",
-                         (long long) (layer + 1), (long long) n_layers_, (double) copied / 1073741824.0);
-            std::fflush(stderr);
+            const int64_t done = layers_done.fetch_add(1) + 1;
+            if (done % 8 == 0 || done == n_layers_)
+                std::fprintf(stderr, "FileExpertSource: copied cache complement through layer %lld/%lld (%.2f GiB)\n",
+                             (long long) done, (long long) n_layers_, (double) copied.load() / 1073741824.0);
         }
+    };
+    {
+        const int threads = (int) std::max<int64_t>(1, std::min<int64_t>(6, n_layers_));
+        std::vector<std::thread> pool;
+        for (int i = 1; i < threads; ++i) pool.emplace_back(worker);
+        worker();
+        for (auto& t : pool) t.join();
     }
+    std::fflush(stderr);
+    if (failed.load()) {
+        err = fail_msg;
+        release();
+        return false;
+    }
+#if defined(_WIN32)
+    // The mapped pages this process touched (the GPU cache's fill and this copy) leave its working set for the
+    // standby list: VirtualUnlock on pages that are not locked does exactly that (it then reports ERROR_NOT_LOCKED).
+    if (maps_.empty()) (void) VirtualUnlock((LPVOID) base_, (SIZE_T) mapped_bytes_);
+    for (const Map& m : maps_) (void) VirtualUnlock((LPVOID) m.base, (SIZE_T) m.bytes);
+#endif
 
     complement_arena_ = arena;
     complement_host_ = host;
     complement_device_ = device;
     complement_bytes_ = bytes;
     complement_offsets_ = std::move(offsets);
-    complement_pinned_ = pin && bytes > 0;
+    complement_pinned_ = (pinned_ok || partial_pin > 0) && bytes > 0;
+    complement_pin_limit_ = pinned_ok ? bytes : partial_pin;
+    complement_partial_ = !pinned_ok && partial_pin > 0;
+    complement_locked_ = locked;
+    complement_lock_off_ = lock_off;
+    complement_lent_slots_ = lend ? n_slots - keep_from : 0;
     complement_ready_ = true;
-    std::fprintf(stderr, "FileExpertSource: %s cache complement ready: resident %.2f GiB, pinned %.2f GiB\n",
-                 complement_pinned_ ? "mapped pinned" : "pageable resident",
-                 (double) resident_bytes() / 1073741824.0, (double) pinned_bytes() / 1073741824.0);
+    std::fprintf(stderr, "FileExpertSource: %s cache complement ready: resident %.2f GiB, pinned %.2f GiB%s%s\n",
+                 complement_pinned_ ? "mapped pinned" : pin ? "locked resident" : "pageable resident",
+                 (double) resident_bytes() / 1073741824.0, (double) pinned_bytes() / 1073741824.0,
+                 note.empty() ? "" : "; ", note.c_str());
+    if (lend)
+        std::fprintf(stderr, "FileExpertSource: %lld of the prompt path's %lld lendable slots keep their experts in RAM "
+                             "too%s\n", (long long) complement_lent_slots_, (long long) (n_slots - lend_from_slot),
+                     complement_lent_slots_ < n_slots - lend_from_slot
+                         ? " (the others are read from the file when lent: not enough RAM for them)" : "");
     if (!additional_gpu_pairs.empty()) {
         std::fprintf(stderr, "FileExpertSource: %zu verified additional-GPU experts remain on the mmap fallback\n",
                      additional_gpu_pairs.size());
@@ -688,13 +1424,119 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+bool FileExpertSource::has_resident(int64_t layer, int64_t expert) const {
+    if (!complement_ready_ || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
+    const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
+    return index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement;
+}
+
+bool FileExpertSource::reserve_exchanges(int64_t n, std::string &err) try {
+    err.clear();
+    if (n <= xstage_cap_) return true;
+    if (!staged_.empty()) { err = "FileExpertSource: exchange buffers are in use"; return false; }
+    uint64_t blob = 0;
+    for (const uint64_t b : layer_blob_bytes_) blob = std::max(blob, b);
+    if (blob == 0 || n <= 0) { err = "FileExpertSource: no expert geometry for the exchange buffers"; return false; }
+    if (xstage_ != nullptr) {
+        if (xstage_pinned_)(void)
+            DPCT_CHECK_ERROR(sycl::free(xstage_, dpct::get_in_order_queue()));
+        else std::free(xstage_);
+        xstage_ = nullptr;
+        xstage_cap_ = 0;
+    }
+    const size_t total = (size_t) n * (size_t) blob;
+    void* p = nullptr;
+    /*
+    DPCT1048: The original value cudaHostAllocDefault is not meaningful in
+    the migrated code and was removed or replaced with 0. You may need to check
+    the migrated code.
+    */
+    if (DPCT_CHECK_ERROR(p = (void *)sycl::malloc_host(
+                             total, dpct::get_in_order_queue())) == 0 &&
+        p != nullptr) {
+        xstage_pinned_ = true;
+    } else {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        p = std::malloc(total);
+        xstage_pinned_ = false;
+        if (p == nullptr) { err = "FileExpertSource: cannot allocate the exchange buffers"; return false; }
+    }
+    xstage_ = (uint8_t*) p;
+    xstage_cap_ = n;
+    xstage_blob_ = blob;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+uint8_t* FileExpertSource::exchange_buffer(int64_t q) const {
+    if (xstage_ == nullptr || q < 0 || q >= xstage_cap_) return nullptr;
+    return xstage_ + (size_t) q * (size_t) xstage_blob_;
+}
+
+bool FileExpertSource::stage_exchange(int64_t layer, int64_t in, int64_t out, int64_t q) {
+    if (!has_resident(layer, in) || has_resident(layer, out) || exchange_buffer(q) == nullptr) return false;
+    const size_t i_in = (size_t) layer * (size_t) n_expert_ + (size_t) in;
+    const size_t i_out = (size_t) layer * (size_t) n_expert_ + (size_t) out;
+    if (override_.empty()) override_.assign((size_t) blobs_, nullptr);
+    if (override_[i_out] != nullptr) return false;
+    for (const Exchange& x : staged_)
+        if (x.in == i_in || x.q == q) return false;
+    override_[i_out] = exchange_buffer(q);
+    staged_.push_back({i_in, i_out, q, layer_blob_bytes_[(size_t) layer]});
+    return true;
+}
+
+int64_t FileExpertSource::commit_exchanges() {
+    int64_t n = 0;
+    for (const Exchange& x : staged_) {
+        const uint8_t* src = override_[x.out];
+        const uint64_t at = complement_offsets_[x.in];
+        if (src != nullptr && at != kNoComplement && at <= complement_bytes_ && x.bytes <= complement_bytes_ - at &&
+            complement_host_ != nullptr) {
+            std::memcpy((uint8_t*) complement_host_ + (size_t) at, src, (size_t) x.bytes);
+            if (detail::exchange_cache_complement(complement_offsets_, x.in, x.out)) ++n;
+        }
+        override_[x.out] = nullptr;
+    }
+    staged_.clear();
+    exchanges_ += n;
+    return n;
+}
+
 const uint8_t* FileExpertSource::blob(int64_t layer, int64_t expert) {
     if (base_ == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return nullptr;
     const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
-    const uint8_t* mapped_fallback = mapped_blob(layer, expert);
-    const uint8_t* result = complement_ready_
-        ? detail::cache_complement_blob_or_fallback(index, complement_offsets_, complement_host_, mapped_fallback)
-        : mapped_fallback;
+    const uint8_t* result = nullptr;
+    bool from_files = true;
+    if (complement_ready_) {
+        result = detail::cache_complement_blob_or_fallback(index, complement_offsets_, complement_host_, nullptr);
+        if (result != nullptr) {
+            ram_reads_.fetch_add(1, std::memory_order_relaxed);
+            from_files = false;
+        } else if (!override_.empty() && override_[index] != nullptr) {
+            result = override_[index];
+            from_files = false;
+        }
+    }
+    if (from_files) {
+        if (!role_ptr_.empty()) {
+            result = staged_blob(layer, expert);          // counts its bytes
+        } else {
+            result = mapped_blob(layer, expert);
+            if (result != nullptr)
+                file_read_bytes_.fetch_add(layer_blob_bytes_[(size_t) layer], std::memory_order_relaxed);
+        }
+        if (complement_ready_ && result != nullptr) file_reads_.fetch_add(1, std::memory_order_relaxed);
+    }
     if (result != nullptr) ++reads_;
     return result;
 }
@@ -703,7 +1545,10 @@ bool FileExpertSource::pinned(int64_t layer, int64_t expert) const {
     if (!complement_ready_ || !complement_pinned_ || complement_host_ == nullptr || layer < 0 || expert < 0 ||
         layer >= n_layers_ || expert >= n_expert_) return false;
     const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
-    return index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement;
+    if (index >= complement_offsets_.size() || complement_offsets_[index] == kNoComplement) return false;
+    // a partial pin (CS-T): only the registered prefix
+    return !complement_partial_ ||
+           complement_offsets_[index] + layer_blob_bytes_[(size_t) layer] <= complement_pin_limit_;
 }
 
 const uint8_t* FileExpertSource::device_alias(int64_t layer, int64_t expert) const {
@@ -712,6 +1557,12 @@ const uint8_t* FileExpertSource::device_alias(int64_t layer, int64_t expert) con
     return complement_device_ + (size_t) complement_offsets_[index];
 }
 
+bool FileExpertSource::pcie_layer(int64_t layer) const {
+    if (complement_ready_ && complement_pinned_ && complement_device_ != nullptr)
+        return layer >= 0 && layer < n_layers_;
+    return device_alias(layer, 0) != nullptr;
+}
+
 // ================================ THE ADAPTER ================================
 
 void expert_pool_dispatch(void* user, const float* x_f, const int32_t* ids, const float* weights, int64_t n_embd,
@@ -854,6 +1705,7 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         d.fail_layer = d.layers;
         return;
     }
+    if (d.lookahead != nullptr) d.lookahead->submit(d.layers, x_f, n_tok, d.host_res);   // CS-T: warm layer + 1
     if (k < 1 || n_tok * k > kMaxWindowEntries) {
         d.failed = true;
         d.fail = "a verify window routes more entries than the expert pool's window tables hold";
@@ -894,7 +1746,7 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                 if (e >= 0 && e < d.n_expert && d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] < 0) ++nmiss;
             }
         }
-        const bool pcie_ok = d.pcie_num > 0 && d.src->device_alias(d.layers, 0) != nullptr;
+        const bool pcie_ok = d.pcie_num > 0 && d.src->pcie_layer(d.layers);
         const int m = pcie_ok ? (nmiss * d.pcie_num) >> 8 : 0;
         int miss_rank = 0, groups = 0, entries = 0, fetches = 0;
         GpuPlanSink& P = *d.plan;
@@ -913,8 +1765,8 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                                                                                  : (size_t) slot * (size_t) d.cache_blob));
                 } else {
                     if (miss_rank >= nmiss - m && fetches < P.staging_cap && fetches < 64) {
-                        const uint8_t* src = d.src->blob(d.layers, e);
-                        if (src != nullptr && d.src->pinned(d.layers, e)) {
+                        const uint8_t* src = d.src->pinned(d.layers, e) ? d.src->blob(d.layers, e) : nullptr;
+                        if (src != nullptr) {
                             kd = 1;
                             dma_src[fetches] = src;
                             pcie_i0[fetches] = i0;
@@ -986,6 +1838,15 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
     else
         for (int64_t t = 0; t < n_tok; ++t) act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
     const auto c2 = std::chrono::steady_clock::now();
+    {   // CS-T: the experts the CPU computes, fetched together (the GGUF in place reads them on several threads)
+        static thread_local std::vector<int64_t> miss;
+        miss.clear();
+        for (int64_t i = 0; i < n_tok * k; ++i)
+            if (kind[i] < 0 && ids[i] >= 0 && ids[i] < d.n_expert &&
+                std::find(miss.begin(), miss.end(), (int64_t) ids[i]) == miss.end())
+                miss.push_back(ids[i]);
+        d.src->prefetch(d.layers, miss.data(), (int64_t) miss.size());
+    }
     int njobs = 0;
     for (int64_t t = 0; t < n_tok; ++t)
         for (int64_t j = 0; j < k; ++j) {
@@ -1189,9 +2050,180 @@ catch (sycl::exception const &exc) {
 
 // ================================ THE RESIDENT ARENA (R2.1) ================================
 
-// Plan v0.3 P6: the arena from the model's shard 1.  Each layer's gate, up and down tensors hold the 512 experts
-// one after another; they are read in chunks and each expert's slice lands at its place in the blob
-// [gate rows | up rows | down rows] - the layout tools/iq_pack.py would have written to experts.bin.
+namespace {
+
+void hash_u64(uint64_t& h, uint64_t v) {
+    h = fnv1a64((const uint8_t*) &v, sizeof v, h);
+}
+
+void hash_text(uint64_t& h, const std::string& s) {
+    h = fnv1a64((const uint8_t*) s.data(), (uint64_t) s.size(), h);
+}
+
+bool hash_small_file(const std::filesystem::path& path, uint64_t& h, std::string& err) {
+    hash_text(h, path.filename().string());
+    std::ifstream f(path, std::ios::binary);
+    if (!f) {
+        hash_u64(h, 0);
+        return true;
+    }
+    hash_u64(h, 1);
+    std::vector<uint8_t> buf(64u << 10);
+    for (;;) {
+        f.read((char*) buf.data(), (std::streamsize) buf.size());
+        const std::streamsize n = f.gcount();
+        if (n > 0) h = fnv1a64(buf.data(), (uint64_t) n, h);
+        if (f.eof()) break;
+        if (!f) {
+            err = "ArenaExpertSource: cannot hash pack metadata " + path.string();
+            return false;
+        }
+    }
+    return true;
+}
+
+bool hash_sampled_file(const std::filesystem::path& path, uint64_t& h, std::string& err) {
+    std::ifstream f(path, std::ios::binary | std::ios::ate);
+    if (!f) {
+        err = "ArenaExpertSource: cannot sample pack source " + path.string();
+        return false;
+    }
+    const std::streamoff end = f.tellg();
+    if (end < 0) {
+        err = "ArenaExpertSource: cannot size pack source " + path.string();
+        return false;
+    }
+    const uint64_t bytes = (uint64_t) end;
+    hash_text(h, path.filename().string());
+    hash_u64(h, bytes);
+    constexpr uint64_t sample = 64u << 10;
+    const uint64_t starts[3] = {0, bytes / 2, bytes > sample ? bytes - sample : 0};
+    std::vector<uint8_t> buf((size_t) std::min<uint64_t>(sample, bytes));
+    for (uint64_t off : starts) {
+        if (buf.empty()) break;
+        const uint64_t at = std::min<uint64_t>(off, bytes - (uint64_t) buf.size());
+        f.clear();
+        f.seekg((std::streamoff) at);
+        f.read((char*) buf.data(), (std::streamsize) buf.size());
+        if ((size_t) f.gcount() != buf.size()) {
+            err = "ArenaExpertSource: short read while hashing pack source " + path.string();
+            return false;
+        }
+        hash_u64(h, at);
+        h = fnv1a64(buf.data(), (uint64_t) buf.size(), h);
+    }
+    return true;
+}
+
+bool shared_arena_pack_hash(const std::string& pack_dir, const std::string& experts_path,
+                            const std::string& gguf, const strata::kernels::cpu::ExpertLayout& lay,
+                            uint64_t& out, std::string& err) {
+    uint64_t h = 1469598103934665603ull;
+    hash_text(h, "strata-shared-expert-arena-pack-v1");
+    hash_u64(h, (uint64_t) lay.n_layers);
+    hash_u64(h, (uint64_t) lay.n_expert);
+    hash_u64(h, lay.total);
+    hash_u64(h, lay.max_blob);
+    hash_u64(h, lay.native ? 1 : 0);
+
+    const std::filesystem::path pack(pack_dir);
+    for (const char* name : {"manifest.json", "index.txt", "native_experts.txt"}) {
+        if (!hash_small_file(pack / name, h, err)) return false;
+    }
+
+    if (std::filesystem::exists(experts_path)) {
+        if (!hash_sampled_file(experts_path, h, err)) return false;
+    } else if (!gguf.empty()) {
+        // Native packs may read experts straight from one or more GGUF shards.  Sample every distinct source
+        // file named by native_experts.txt; this keeps the fingerprint cheap while still tying it to the model
+        // bytes rather than only to an equal-size layout.
+        const std::filesystem::path first(gguf);
+        std::vector<std::filesystem::path> sources{first};
+        for (const std::string& name : lay.gguf_file) {
+            if (name.empty()) continue;
+            const std::filesystem::path p = first.parent_path() / name;
+            if (std::find(sources.begin(), sources.end(), p) == sources.end()) sources.push_back(p);
+        }
+        for (const auto& p : sources) {
+            if (!hash_sampled_file(p, h, err)) return false;
+        }
+    }
+
+    out = h == 0 ? 1 : h;
+    return true;
+}
+
+}  // namespace
+
+namespace {
+/// The GGUF file that holds role `r` (0 gate, 1 up, 2 down) of layer `l`: a name beside the --native shard
+/// (native_experts.txt v3 per layer, v4 per role), or the --native shard itself.
+std::string expert_gguf_file(const std::string& gguf, const strata::kernels::cpu::ExpertLayout& lay, int64_t l, int r) {
+    const size_t i = (size_t) (3 * l + r);
+    if (lay.gguf_file.size() <= i || lay.gguf_file[i].empty()) return gguf;
+    const size_t cut = gguf.find_last_of("/\\");
+    return (cut == std::string::npos ? std::string() : gguf.substr(0, cut + 1)) + lay.gguf_file[i];
+}
+}  // namespace
+
+bool check_experts_gguf(const std::string& gguf, const strata::kernels::cpu::ExpertLayout& lay, std::string& err) {
+    static const char* roles[3] = {"gate", "up", "down"};
+    if (lay.gguf_off.size() != (size_t) (3 * lay.n_layers)) {
+        err = "native_experts.txt has no GGUF offsets (a pack older than v2): repack it with tools/iq_pack.py";
+        return false;
+    }
+    try {
+        std::map<std::string, std::unique_ptr<strata::GgufFile>> files;
+        for (int64_t l = 0; l < lay.n_layers; ++l) {
+            const auto& fm = lay.fmt[(size_t) l];
+            const uint64_t blob = lay.bytes[(size_t) l];
+            const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
+            for (int r = 0; r < 3; ++r) {
+                const std::string path = expert_gguf_file(gguf, lay, l, r);
+                auto& f = files[path];
+                if (!f) f = std::make_unique<strata::GgufFile>(path);
+                const std::string name = "blk." + std::to_string(l) + ".ffn_" + roles[r] + "_exps.weight";
+                const strata::TensorInfo* t = f->find(name);
+                const uint64_t want_type = (uint64_t) (r < 2 ? fm.gu_type : fm.d_type);
+                // GGUF order: dim 0 is the row (the input), dim 1 the rows, dim 2 the experts
+                const uint64_t cols = (uint64_t) (r < 2 ? fm.n_embd : fm.n_ff);
+                const uint64_t rows = (uint64_t) (r < 2 ? fm.n_ff : fm.n_embd);
+                const uint64_t bytes = per[r] * (uint64_t) lay.n_expert;
+                const uint64_t payload = f->file_size() - f->data_start();
+                std::string why;
+                if (t == nullptr) why = "is not in it";
+                else if (t->type != want_type)
+                    why = std::string("is ") + t->type_name() + ", the pack says type " + std::to_string(want_type);
+                else if (t->shape.size() != 3 || t->shape[0] != cols || t->shape[1] != rows ||
+                         t->shape[2] != (uint64_t) lay.n_expert)
+                    why = "is not [" + std::to_string(cols) + ", " + std::to_string(rows) + ", " +
+                          std::to_string(lay.n_expert) + "]";
+                else if (strata::tensor_payload_bytes(*t) != bytes)
+                    why = "is not " + std::to_string(per[r]) + " B per expert";
+                else if (f->data_start() + t->offset != lay.gguf_off[(size_t) (3 * l + r)])
+                    why = "starts at byte " + std::to_string(f->data_start() + t->offset) + ", the pack says " +
+                          std::to_string(lay.gguf_off[(size_t) (3 * l + r)]);
+                else if (t->offset > payload || bytes > payload - t->offset)
+                    why = "runs past the end of the file (a truncated shard?)";
+                if (!why.empty()) {
+                    err = "the pack's native_experts.txt does not match the model: " + name + " in " + path + " " +
+                          why + " - repack with tools/iq_pack.py from this model's shards";
+                    return false;
+                }
+            }
+        }
+        return true;
+    } catch (const std::exception& e) {
+        err = std::string("native experts from the GGUF: ") + e.what();
+        return false;
+    }
+}
+
+// Plan v0.3 P6: the arena from the model's GGUF shards.  Each layer's gate, up and down tensors hold the 512
+// experts one after another; they are read in chunks and each expert's slice lands at its place in the blob
+// [gate rows | up rows | down rows] - the layout tools/iq_pack.py would have written to experts.bin.  Each role
+// is read from its own file (native_experts.txt v4: a shard boundary can fall inside a layer; per role as in
+// #255, gopinath87607).  The caller checks the spans first (check_experts_gguf).
 LoadStats load_experts_gguf(const std::string& gguf, uint8_t* dst, const strata::kernels::cpu::ExpertLayout& lay,
                             int threads) {
     LoadStats st;
@@ -1199,42 +2231,42 @@ LoadStats load_experts_gguf(const std::string& gguf, uint8_t* dst, const strata:
     const auto t0 = std::chrono::steady_clock::now();
     std::atomic<int64_t> next{0};
     std::atomic<bool> bad{false};
-    // a layer's experts may sit in another shard of the model (native_experts.txt v3): a name beside `gguf`
-    const size_t cut = gguf.find_last_of("/\\");
-    const std::string dir = cut == std::string::npos ? std::string() : gguf.substr(0, cut + 1);
-    auto file_of = [&](int64_t l) -> std::string {
-        if (lay.gguf_file.empty() || lay.gguf_file[(size_t) l].empty()) return gguf;
-        return dir + lay.gguf_file[(size_t) l];
-    };
     auto worker = [&]() {
-        std::ifstream f;
+        // #230: `fread` on a `FILE*`, as load_experts_ranges (#89): MSVC's `std::ifstream::read` splits a request
+        // into 4095-byte freads, which took this path to 0.02 GiB/s on a Windows install without experts.bin.
+        // The guard closes the handle on every return.
+        struct Closer {
+            FILE* f = nullptr;
+            ~Closer() { if (f != nullptr) std::fclose(f); }
+        } file;
         std::string open_name;
         std::vector<uint8_t> buf;
         for (;;) {
             const int64_t l = next.fetch_add(1);
             if (l >= lay.n_layers || bad) break;
-            const std::string name = file_of(l);
-            if (name != open_name) {
-                f.close();
-                f.clear();
-                f.open(name, std::ios::binary);
-                if (!f) { bad = true; return; }
-                open_name = name;
-            }
             const auto& fm = lay.fmt[(size_t) l];
             const uint64_t blob = lay.bytes[(size_t) l];
             const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
             const uint64_t at[3] = {0, fm.up_off, fm.down_off};
             for (int r = 0; r < 3; ++r) {
+                // the handle is kept while consecutive roles share a file (every layer of a v3 pack)
+                const std::string name = expert_gguf_file(gguf, lay, l, r);
+                if (name != open_name) {
+                    if (file.f != nullptr) std::fclose(file.f);
+                    file.f = std::fopen(name.c_str(), "rb");
+                    if (file.f == nullptr) { bad = true; return; }
+                    open_name = name;
+                }
+                FILE* const f = file.f;
                 const uint64_t src = lay.gguf_off[(size_t) (3 * l + r)];
                 const uint64_t total = per[r] * (uint64_t) lay.n_expert;
                 const uint64_t chunk = per[r] * 16;           // 16 experts per read
                 buf.resize((size_t) chunk);
                 for (uint64_t done = 0; done < total; done += chunk) {
                     const uint64_t n = std::min<uint64_t>(chunk, total - done);
-                    f.seekg((std::streamoff) (src + done));
-                    f.read((char*) buf.data(), (std::streamsize) n);
-                    if ((uint64_t) f.gcount() != n) { bad = true; return; }
+                    // 64-bit seek: a shard is tens of GB
+                    if (STRATA_FSEEK64(f, src + done) != 0) { bad = true; return; }
+                    if (std::fread(buf.data(), 1, (size_t) n, f) != (size_t) n) { bad = true; return; }
                     for (uint64_t k = 0; k < n / per[r]; ++k) {
                         const uint64_t e = done / per[r] + k;
                         std::memcpy(dst + lay.blob_offset(l, (int64_t) e) + at[r], buf.data() + k * per[r], (size_t) per[r]);
@@ -1262,7 +2294,8 @@ ArenaExpertSource::~ArenaExpertSource() { close(); }
 
 bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
                              int64_t n_expert, int threads, std::string &err,
-                             uint64_t max_pinned_bytes) try {
+                             uint64_t max_pinned_bytes,
+                             const std::string &shared_arena_file) try {
     close();
     const std::string path = pack_dir + "/experts.bin";
     // plan v0.3 P6: the layout (canonical, or a native pack's per-layer blobs) was loaded by the driver
@@ -1278,7 +2311,12 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
     const bool from_gguf = !std::ifstream(path, std::ios::binary) && lay.native && !lay.gguf_off.empty() && !gguf_.empty();
     // SIZE CHECK BEFORE THE ALLOCATION, not after.  A wrong pack should name the two numbers rather than spend
     // 34 GB and a minute of loading first.
-    if (!from_gguf) {
+    if (from_gguf) {
+        // every (file, offset) of native_experts.txt must be the tensor it claims, of the pack's type and
+        // dimensions and inside its file - before the allocation, so a pack of another model or a truncated
+        // shard is a message rather than an arena of plausible wrong experts
+        if (!check_experts_gguf(gguf_, lay, err)) { err = "ArenaExpertSource: " + err; return false; }
+    } else {
         std::ifstream f(path, std::ios::binary | std::ios::ate);
         if (!f) { err = "ArenaExpertSource: cannot open " + path; return false; }
         const uint64_t got = (uint64_t) f.tellg();
@@ -1294,6 +2332,10 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
         }
     }
 
+    uint64_t pack_hash = 0;
+    if (!shared_arena_file.empty() &&
+        !shared_arena_pack_hash(pack_dir, path, gguf_, lay, pack_hash, err)) return false;
+
     // one layer per registration slice, so no expert straddles two registrations.  The arena is one blob
     // longer than the file: a copy of a whole VRAM slot (the largest blob) may then start at any expert.
     std::vector<uint64_t> bounds, loff, lbytes;
@@ -1303,10 +2345,14 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
         lbytes.push_back(lay.blob_bytes(l) * (uint64_t) n_expert);
     }
     bounds.push_back(want);
-    PinnedArena* a = new PinnedArena(want + (uint64_t) blob, bounds, max_pinned_bytes);
+    PinnedArena* a = new PinnedArena(want + (uint64_t) blob, bounds, max_pinned_bytes,
+                                     shared_arena_file, pack_hash);
     if (!a->valid()) {
+        const std::string why = a->note;
         delete a;
-        err = "ArenaExpertSource: the arena could not be reserved (" + std::to_string(want) + " B)";
+        err = "ArenaExpertSource: the arena could not be reserved (" +
+              std::to_string(want + (uint64_t) blob) + " B)" +
+              (why.empty() ? std::string{} : ": " + why);
         return false;
     }
     const LoadStats st = from_gguf ? load_experts_gguf(gguf_, a->data(), lay, threads)
diff --git a/sycl/src/core/layer.cpp b/sycl/src/core/layer.cpp
index f80a8573753..0ac8fb1e75e 100644
--- a/sycl/src/core/layer.cpp
+++ b/sycl/src/core/layer.cpp
@@ -741,9 +741,10 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
     // THE ROPE TABLE IS BUILT ON THE HOST IN FLOAT64 and uploaded once, because the reference computes its
     // frequencies in float64 and reproducing that on device means double-precision `pow`/`cos` that need not
     // agree with the host's libm.  A table shorter than the sequence would have the rotation read past it.
+    // The process's rope scaling (none by default) is INSIDE the table - the rotation kernels cannot tell.
     if (share_rope == nullptr) {
         std::vector<float> hc((size_t) max_cells * (s.n_rot / 2)), hs((size_t) max_cells * (s.n_rot / 2));
-        strata::kernels::build_rope_table((int) s.n_rot, strata::kernels::qsa_freq_base(), (int) max_cells,
+        strata::kernels::build_rope_table((int) s.n_rot, strata::kernels::rope_scaling(), (int) max_cells,
                                           hc.data(), hs.data());
         dpct::get_in_order_queue()
             .memcpy(st.cos_tab, hc.data(), hc.size() * 4)
@@ -977,7 +978,7 @@ const auto normalize_rotate = [&](float* data, const WeightRef* norm, int rows,
     try {
         if (native_qsa_enabled()) native_qsa_rms_norm_weighted(data, (const float*) norm->data, data, cols, rows, RMS_EPS, stream);
         else rms_norm_weighted(data, (const float*) norm->data, rows, cols, RMS_EPS, stream);
-        if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), st.pos_dev, stream);
+        if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, rope_scaling(), st.pos_dev, stream);
         else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st.cos_tab, st.sin_tab, st.pos_dev, stream);
         return true;
     } catch (const std::exception& error) {
@@ -1047,7 +1048,7 @@ if (st.kv_hybrid) {
 } else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
     try {
         native_qsa_indexer_append(b.idx_raw, st.step + kStepPos, pos_base,
-            (const float*) w_ikn->data, RMS_EPS, ib, s, st.max_cells, (float) qsa_freq_base(), stream);
+            (const float*) w_ikn->data, RMS_EPS, ib, s, st.max_cells, rope_scaling(), stream);
     } catch (const std::exception& error) { err = v.name("native_indexer") + ": " + error.what(); return false; }
 } else indexer_key_append(b.idx_raw, st.pos_dev, pos_base, (const float*) w_ikn->data, RMS_EPS, ib, s,
                           st.cos_tab, st.sin_tab, stream);    }
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index bdd56dea406..4e9a013c09e 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -2,6 +2,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/core/mtp.hpp"
+#include "strata/core/coupled_draft.hpp"
 #include "strata/core/on_device.hpp"
 
 #include "strata/core/native_head.hpp"
@@ -119,6 +120,14 @@ MtpDrafter::~MtpDrafter() {
     if (pf_dev_) sycl::free(pf_dev_, dpct::get_in_order_queue());
     for (auto &e : round_exec_) if (e) delete (e);
     for (auto &e : step_exec_) if (e) delete (e);
+    for (auto &e : round_exec_c_) if (e) delete (e);
+    for (auto &e : step_exec_c_) if (e) delete (e);
+    if (cparams_) sycl::free(cparams_, dpct::get_in_order_queue());
+    if (cring_) sycl::free(cring_, dpct::get_in_order_queue());
+    if (dinv_) sycl::free(dinv_, dpct::get_in_order_queue());
+    if (cscratch_) sycl::free(cscratch_, dpct::get_in_order_queue());
+    if (h_cparams_) sycl::free(h_cparams_, dpct::get_in_order_queue());
+    if (h_chist_) sycl::free(h_chist_, dpct::get_in_order_queue());
     if (cs_) dpct::get_current_device().destroy_queue(cs_);
     if (dense_) sycl::free(dense_, dpct::get_in_order_queue());
     if (experts_) sycl::free(experts_, dpct::get_in_order_queue());
@@ -248,7 +257,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
 
     // ---- the layer's own K/V (dense attention: no indexer state is read)
     const strata::kernels::QsaShapes s = shapes_of(g);
-    const int64_t max_cells = ss.qsa_states[0].max_cells;
+    const int64_t max_cells = ss.qsa_states[ss.qsa_primary()].max_cells;
     // KV streaming: the drafter only reads its last `window` cells, so with streaming on its K/V is a ring of the
     // window (plus the cells a round writes ahead of its queries) over a host copy, refilled on a resume. The host copy
     // is pinned after the expert arena has pinned what it could: if it does not fit, the K/V stays whole in VRAM.
@@ -264,7 +273,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
                              sb, dpct::get_in_order_queue())) != 0) {
         err = "mtp: the K/V state does not fit"; return false;
     }
-    if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[0], ring) == 0) {
+    if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[ss.qsa_primary()], ring) == 0) {
         if (st_.kv_mode == 0) { err = "mtp: state init failed"; return false; }
         std::fprintf(stderr, "strata mtp: no pinned RAM left for the draft layer's K/V copy; keeping it in VRAM\n");
         /*
@@ -279,7 +288,7 @@ bool MtpDrafter::load(const std::string &rt_dir, const ModelGeometry &g,
                                  sb, dpct::get_in_order_queue())) != 0) {
             err = "mtp: the K/V state does not fit"; return false;
         }
-        if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[0], ring) == 0) { err = "mtp: state init failed"; return false; }
+        if (qsa_state_init(g, max_cells, state_arena_, st_, &ss.qsa_states[ss.qsa_primary()], ring) == 0) { err = "mtp: state init failed"; return false; }
     }
     qsa_set_kv_int8(kv_int8_was);
     qsa_set_kv_hybrid(kv_hybrid_was);
@@ -384,9 +393,71 @@ uint64_t MtpDrafter::bind_bytes(uint64_t head_row_bytes, int64_t n_vocab) const
             if (size >= 4 && size % 4 == 0) bytes += (uint64_t) (size / 4) * head_row_bytes + (uint64_t) size;
         }
     }
+    // coupled draft sampling (STRATA_SPEC_COUPLED=1 only): an upper bound - the id -> subset map, the penalty ring,
+    // the split scratch (64 lists of 64 entries at most) and the parameters
+    if (coupled_draft_env() && cparams_ == nullptr)
+        bytes += (uint64_t) n_vocab * 4 + (uint64_t) (kCoupledHistCap + max_t_) * 4 + 64ull * 64ull * 8ull + 4096;
     return bytes;
 }
 
+bool MtpDrafter::setup_coupled(std::string& err) try {
+    const int64_t nv = dhead_ != nullptr ? n_dvocab_ : n_vocab_;
+    const size_t scratch = strata::kernels::coupled_draft_scratch_bytes((int) nv);
+    if (scratch == 0) {
+        std::fprintf(stderr, "strata mtp: STRATA_SPEC_COUPLED: %lld draft logits are too wide for the coupled sampler; "
+                             "argmax drafts\n", (long long) nv);
+        return true;
+    }
+    sycl::queue& q = dpct::get_in_order_queue();
+    const size_t ring = (size_t) (kCoupledHistCap + max_t_) * sizeof(int32_t);
+    cparams_ = sycl::malloc_device<strata::kernels::SamplerParams>(1, q);
+    cring_ = (int32_t*) sycl::malloc_device(ring, q);
+    cscratch_ = sycl::malloc_device(scratch, q);
+    if (cparams_ == nullptr || cring_ == nullptr || cscratch_ == nullptr ||
+        !mapped(sizeof(strata::kernels::SamplerParams), (void**) &h_cparams_, (void**) &m_cparams_) ||
+        !mapped((size_t) kCoupledHistCap * sizeof(int32_t), (void**) &h_chist_, (void**) &m_chist_)) {
+        err = "mtp: the coupled draft sampler's buffers do not fit";
+        return false;
+    }
+    q.memset(cring_, 0xff, ring).wait();   // -1: no token
+    std::fill(h_chist_, h_chist_ + kCoupledHistCap, -1);
+    vram_ += sizeof(strata::kernels::SamplerParams) + ring + scratch;
+    if (dhead_ != nullptr) {   // token id -> subset index (-1: not in the draft head), for the penalties
+        std::vector<int32_t> sub((size_t) n_dvocab_), inv((size_t) n_vocab_, -1);
+        q.memcpy(sub.data(), dvocab_, sub.size() * sizeof(int32_t)).wait();
+        for (size_t i = 0; i < sub.size(); ++i)
+            if (sub[i] >= 0 && sub[i] < n_vocab_ && inv[(size_t) sub[i]] < 0) inv[(size_t) sub[i]] = (int32_t) i;
+        dinv_ = (int32_t*) sycl::malloc_device(inv.size() * sizeof(int32_t), q);
+        if (dinv_ == nullptr) {
+            err = "mtp: the coupled draft sampler's token map does not fit";
+            return false;
+        }
+        q.memcpy(dinv_, inv.data(), inv.size() * sizeof(int32_t)).wait();
+        vram_ += inv.size() * sizeof(int32_t);
+    }
+    dpct::get_current_device().queues_wait_and_throw();
+    coupled_ok_ = true;
+    std::fprintf(stderr, "strata mtp: coupled draft sampling on (STRATA_SPEC_COUPLED): sampled requests draft with the "
+                         "target's chain and Philox draw over %lld tokens\n", (long long) nv);
+    return true;
+} catch (sycl::exception const& e) {
+    err = std::string("mtp: coupled setup: ") + e.what();
+    return false;
+}
+
+void MtpDrafter::set_draft_sampling(const strata::kernels::SamplerParams& sp) {
+    coupled_active_ = coupled_ok_ && !sp.greedy && sp.temperature > 0.0f;
+    if (!coupled_active_) return;
+    *h_cparams_ = sp;   // read by the next round graph (after the previous one has synced)
+    std::fill(h_chist_, h_chist_ + kCoupledHistCap, -1);
+}
+
+void MtpDrafter::set_draft_history(const int32_t* tail, int64_t n_tail, int32_t next) {
+    if (!coupled_active_) return;
+    const int h = coupled_hist_len(h_cparams_->penalty_last_n, kCoupledHistCap);
+    coupled_hist_base(tail, n_tail, next, h, h_chist_ + (kCoupledHistCap - h));
+}
+
 bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
                       const float *window_R, std::string &err) try {
     const OnDevice on_device(device_);
@@ -429,6 +500,7 @@ bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
                          (double) (n_dvocab_ * row_bytes) / 1048576.0);
         }
     }
+    if (coupled_draft_env() && cparams_ == nullptr && !setup_coupled(err)) return false;
     return true;
 }
 catch (sycl::exception const &exc) {
@@ -492,7 +564,7 @@ bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
         // ---- attention: K/V into the layer's own cache, then (full) dense attention over every cell
         auto norm_rope = [&](float* data, const float* gamma, int rows, int cols, const int32_t* p) {
             native_qsa_rms_norm_weighted(data, gamma, data, cols, rows, EPS, cs);
-            if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), p, cs);
+            if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, rope_scaling(), p, cs);
             else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st_.cos_tab, st_.sin_tab, p, cs);
         };
         native_quantize_q8_1(mixed_, xq_, (int) N, T, cs);
@@ -593,6 +665,13 @@ bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
         const bool sub = dhead_ != nullptr;
         const int64_t nv = sub ? n_dvocab_ : n_vocab_;
         native_mmvq(head_->type(), sub ? dhead_ : head_->weights(), xq_, head_logits_, (int) N, (int) nv, T, cs);
+        if (coupled_rec_) {
+            // coupled draft sampling: the target's chain and Philox draw for the row that will verify this draft
+            // (counter = this cell + 1, from its step record), penalties over the ring; T == 1 (full layer)
+            coupled_draft_sample(head_logits_, (int) nv, sub ? dvocab_ : nullptr, sub ? dinv_ : nullptr, (int) n_vocab_,
+                                 cparams_, cring_, kCoupledHistCap, coupled_j_, step, cscratch_, out_ids_, probs_, cs);
+            return true;
+        }
         SamplerParams sp;
         sp.greedy = true;
         sp.temperature = 0.0f;
@@ -680,14 +759,17 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
-bool MtpDrafter::capture_round(int T, std::string &err) try {
-    if (round_exec_[T]) return true;
+bool MtpDrafter::capture_round(int T, bool coupled, std::string &err) try {
+    dpct::experimental::command_graph_exec_ptr& exec = coupled ? round_exec_c_[T] : round_exec_[T];
+    if (exec) return true;
     using namespace strata::kernels;
     const int64_t HCN = g_->hc * g_->n_embd;
     if (DPCT_CHECK_ERROR(dpct::experimental::begin_recording(cs_)) != 0) {
         err = "mtp: begin capture"; return false;
     }
     bool ok = true;
+    // coupled: the request's chain and the penalty history's base, for this round's drafts
+    if (coupled) coupled_draft_stage(m_cparams_, m_chist_, cparams_, cring_, kCoupledHistCap, cs_);
     copy_i32_from_mapped(tok_, m_tok_, T, cs_);
     copy_i32_from_mapped(step_, m_step_, (int64_t) 2 * T * 4, cs_);
     copy_i32_from_mapped(pos_, m_pos_, (int64_t) 2 * T * g_->n_head, cs_);
@@ -702,10 +784,13 @@ bool MtpDrafter::capture_round(int T, std::string &err) try {
     if (ok) {
         copy_i32_from_mapped(step_ + ra * 4, m_step_ + ra * 4, 4, cs_);
         copy_i32_from_mapped(pos_ + ra * g_->n_head, m_pos_ + ra * g_->n_head, g_->n_head, cs_);
+        coupled_rec_ = coupled;
+        coupled_j_ = 0;
         ok = record_forward(1, ra, cs_, err);
+        coupled_rec_ = false;
     }
     if (ok) mtp_select(R_, HCN, out_ids_, row_ + 1, Rin_, tok_, m_out_, 0, cs_, probs_, m_prob_);
-    return finish_capture(cs_, ok, round_exec_[T], "round", err);
+    return finish_capture(cs_, ok, exec, coupled ? "round (coupled)" : "round", err);
 }
 catch (sycl::exception const &exc) {
   std::cerr << exc.what() << "Exception caught at file:" << __FILE__
@@ -715,8 +800,9 @@ catch (sycl::exception const &exc) {
 
 // Chain step j (1..max_t-2): one row at the cell staged in step row `max_t + j - 1`, from the previous step's
 // residual and token (left in Rin_[0] / tok_[0] by mtp_select); draft j and its probability to the mapped outputs.
-bool MtpDrafter::capture_step(int j, std::string &err) try {
-    if (step_exec_[j]) return true;
+bool MtpDrafter::capture_step(int j, bool coupled, std::string &err) try {
+    dpct::experimental::command_graph_exec_ptr& exec = coupled ? step_exec_c_[j] : step_exec_[j];
+    if (exec) return true;
     using namespace strata::kernels;
     const int64_t HCN = g_->hc * g_->n_embd;
     const int row = max_t_ + j - 1;
@@ -725,9 +811,12 @@ bool MtpDrafter::capture_step(int j, std::string &err) try {
     }
     copy_i32_from_mapped(step_ + row * 4, m_step_ + row * 4, 4, cs_);
     copy_i32_from_mapped(pos_ + row * g_->n_head, m_pos_ + row * g_->n_head, g_->n_head, cs_);
+    coupled_rec_ = coupled;
+    coupled_j_ = j;
     bool ok = record_forward(1, row, cs_, err);
+    coupled_rec_ = false;
     if (ok) mtp_select(R_, HCN, out_ids_, row_ + 1, Rin_, tok_, m_out_, j, cs_, probs_, m_prob_);
-    return finish_capture(cs_, ok, step_exec_[j], "step", err);
+    return finish_capture(cs_, ok, exec, coupled ? "step (coupled)" : "step", err);
 }
 catch (sycl::exception const &exc) {
   std::cerr << exc.what() << "Exception caught at file:" << __FILE__
@@ -923,7 +1012,8 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
                        float* probs, float min_p, int* n_drafts) {
     const OnDevice on_device(device_);
     if (T < 1 || T > max_t_ || a < 0 || a >= T) { err = "mtp: draft arguments out of range"; return false; }
-    if (!capture_round(T, err)) return false;
+    const bool cp = coupled_active_;   // coupled draft sampling for this request: its own graphs
+    if (!capture_round(T, cp, err)) return false;
     const Clock::time_point t0 = Clock::now();
     const int64_t NH = g_->n_head;
     auto put = [&](int row, int64_t cell) {
@@ -937,11 +1027,11 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
         h_tok_[t] = tokens[t];
         put(t, p + t);
     }
-    put(2 * max_t_ - 1, p + a);
+    put(2 * max_t_ - 1, coupled_draft_cell(p, a, 0));   // p + a: draft 0's cell
     h_row_[0] = a;
     h_row_[1] = 0;
     std::atomic_thread_fence(std::memory_order_seq_cst);
-    if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*round_exec_[T])) != 0 ||
+    if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*(cp ? round_exec_c_[T] : round_exec_[T]))) != 0 ||
         DPCT_CHECK_ERROR(cs_->wait()) != 0) {
         /*
         DPCT1009: SYCL reports errors using exceptions and does not use error
@@ -962,10 +1052,10 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
     int n = 1;
     // the chain continues while the last draft is likely enough to be verified
     for (int j = 1; j < std::min(max_t_ - 1, max_drafts_) && pj >= min_p; ++j) {
-        if (!capture_step(j, err)) return false;
-        put(max_t_ + j - 1, p + a + j);
+        if (!capture_step(j, cp, err)) return false;
+        put(max_t_ + j - 1, coupled_draft_cell(p, a, j));   // p + a + j; coupled: drawn at counter cell + 1
         std::atomic_thread_fence(std::memory_order_seq_cst);
-        if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*step_exec_[j])) != 0 ||
+        if (DPCT_CHECK_ERROR((cs_)->ext_oneapi_graph(*(cp ? step_exec_c_[j] : step_exec_[j]))) != 0 ||
             DPCT_CHECK_ERROR(cs_->wait()) != 0) {
             /*
             DPCT1009: SYCL reports errors using exceptions and does not use
diff --git a/sycl/src/core/native_dense.cpp b/sycl/src/core/native_dense.cpp
index 1d7da714235..7b0ff4a312e 100644
--- a/sycl/src/core/native_dense.cpp
+++ b/sycl/src/core/native_dense.cpp
@@ -18,9 +18,10 @@ namespace {
 bool eligible(const strata::TensorInfo& tensor, bool include_ple_key) {
     const auto& name = tensor.name;
     if (name.rfind("blk.", 0) != 0) return false;
-    // Match the native PLE kernel: Q2_0, IQ3_XXS and IQ4_XS. Other keys retain the packed BF16 fallback.
+    // Match the native PLE kernel: Q2_0, IQ3_XXS, IQ4_XS and Q8_0 (UD-Q4_K_XL). Other keys retain the packed BF16
+    // fallback.
     if (name == "blk.1.ple_key.weight")
-        return include_ple_key && (tensor.type == 42 || tensor.type == 18 || tensor.type == 23);
+        return include_ple_key && (tensor.type == 42 || tensor.type == 18 || tensor.type == 23 || tensor.type == 8);
     static const char* suffixes[] = {".attn_qkv.weight", ".attn_gate.weight", ".ssm_out.weight",
         ".attn_q.weight", ".attn_k.weight", ".attn_v.weight", ".attn_output.weight",
         ".ffn_gate_shexp.weight", ".ffn_up_shexp.weight", ".ffn_down_shexp.weight"};
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
index d03f972c91e..3ebfe6389ac 100644
--- a/sycl/src/core/native_head.cpp
+++ b/sycl/src/core/native_head.cpp
@@ -18,23 +18,22 @@ NativeHead::~NativeHead() {
     if (weights_) sycl::free(weights_, dpct::get_in_order_queue());
 }
 
-bool NativeHead::load(const std::string &path, int64_t n_in, int64_t n_out,
-                      std::string &err) try {
+bool NativeHead::load(const std::vector<std::string> &shards, int64_t n_in,
+                      int64_t n_out, std::string &err) try {
     if (loaded()) { err = "native head is already loaded"; return false; }
     if (n_in <= 0 || n_out <= 0 || n_in > INT_MAX || n_out > INT_MAX || n_in % 256) {
         err = "native head requires positive int32 dimensions and whole 256-value rows";
         return false;
     }
     try {
-        strata::GgufFile gguf(path);
-        err = strata::check_architecture(gguf);
+        // The architecture is the metadata shard's; output.weight comes from whichever shard holds it (shard 2
+        // of Unsloth's UD-Q4_K_XL, whose shard 1 holds no tensor).  GgufModel refuses a duplicate across shards.
+        const strata::GgufModel model(shards);
+        err = strata::check_architecture(model.meta());
         if (!err.empty()) return false;
-        const strata::TensorInfo* tensor = nullptr;
-        for (const auto& candidate : gguf.tensors()) {
-            if (candidate.name != "output.weight") continue;
-            if (tensor) { err = "native head: duplicate output.weight"; return false; }
-            tensor = &candidate;
-        }
+        size_t at = 0;
+        const strata::TensorInfo* tensor = model.find("output.weight", &at);
+        const strata::GgufFile& gguf = model.shard(at);
         if (!tensor || !strata::kernels::native_mmvq_supported((int) tensor->type) || tensor->shape.size() != 2 ||
             tensor->shape[0] != (uint64_t) n_in || tensor->shape[1] != (uint64_t) n_out) {
             err = "native head: expected a natively supported output.weight with the canonical head dimensions";
@@ -160,13 +159,15 @@ NativeEmbed::~NativeEmbed() {
         sycl::free((void *) dev_, dpct::get_in_order_queue()); // the VRAM fallback below
 }
 
-bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
-                       std::string &err) try {
+bool NativeEmbed::load(const std::vector<std::string> &shards, int64_t n_embd,
+                       int64_t n_vocab, std::string &err) try {
     try {
-        strata::GgufFile gguf(path);
-        const strata::TensorInfo* t = nullptr;
-        for (const auto& c : gguf.tensors())
-            if (c.name == "token_embd.weight") t = &c;
+        const strata::GgufModel model(shards);
+        err = strata::check_architecture(model.meta());
+        if (!err.empty()) { err = "native embedding: " + err; return false; }
+        size_t at = 0;
+        const strata::TensorInfo* t = model.find("token_embd.weight", &at);
+        const strata::GgufFile& gguf = model.shard(at);
         if (!t || t->shape.size() != 2 || t->shape[0] != (uint64_t) n_embd || t->shape[1] != (uint64_t) n_vocab ||
             !strata::kernels::iq_supported((int) t->type) || n_embd % 256) {
             err = "native embedding: token_embd.weight is absent, of another shape, or of a type without a GPU "
@@ -175,6 +176,13 @@ bool NativeEmbed::load(const std::string &path, int64_t n_embd, int64_t n_vocab,
         }
         row_ = strata::kernels::iq_row_bytes((int) t->type, n_embd);
         bytes_ = (uint64_t) row_ * (uint64_t) n_vocab;
+        // the table is copied out of the mapping below: a truncated shard must be an error, not a read past EOF
+        if (!model.in_bounds(*t, at) || strata::tensor_payload_bytes(*t) != bytes_) {
+            err = "native embedding: token_embd.weight's payload is truncated or not " + std::to_string(bytes_) +
+                  " B (" + gguf.path() + ")";
+            bytes_ = 0;
+            return false;
+        }
         /*
         DPCT1048: The original value cudaHostAllocMapped is not meaningful in
         the migrated code and was removed or replaced with 0. You may need to
diff --git a/sycl/src/core/pinned.dp.cpp b/sycl/src/core/pinned.dp.cpp
index 5b5d33da102..517163788b0 100644
--- a/sycl/src/core/pinned.dp.cpp
+++ b/sycl/src/core/pinned.dp.cpp
@@ -6,6 +6,7 @@
 #include "strata/platform/memory.hpp"
 
 #include <atomic>
+#include <cerrno>
 #include <cstdlib>
 #include <cstdio>
 #include <cstring>
@@ -24,7 +25,10 @@
 #ifdef _WIN32
 #include <windows.h>
 #else
+#include <fcntl.h>
 #include <sys/mman.h>
+#include <sys/stat.h>
+#include <unistd.h>
 #include <linux/mman.h>
 #ifndef MAP_HUGE_2MB
 #define MAP_HUGE_2MB (21 << 26)
@@ -35,9 +39,32 @@ namespace strata::core {
 
 namespace {
 
+constexpr uint64_t kSharedArenaHeaderBytes = 4096;
+constexpr char kSharedArenaMagic[16] = "STRATA-ARENA-V1";
+
+struct SharedArenaHeader {
+    char magic[16];
+    uint32_t version;
+    uint32_t header_bytes;
+    uint64_t arena_bytes;
+    uint64_t pack_hash;
+    uint64_t reserved[4];
+};
+static_assert(sizeof(SharedArenaHeader) <= kSharedArenaHeaderBytes);
+
 // A 2 MB-aligned reservation.  Large pages first, then the largest alignment the OS will give us for free.
-void* reserve(uint64_t bytes, PageBacking& got, std::string& note) {
+// A non-empty shared_file instead maps one file whose first 4 KiB identify the pack and whose remaining bytes
+// are the resident arena.  This shared-file layout is intended for tmpfs (/dev/shm); hugetlbfs would need
+// hugepage-aligned file size and arena offset rather than the 4 KiB header layout used here.
+void* reserve(uint64_t bytes, PageBacking& got, std::string& note, const std::string& shared_file,
+              uint64_t shared_pack_hash, void*& mapping_base, uint64_t& mapping_bytes) {
+    mapping_base = nullptr;
+    mapping_bytes = 0;
 #ifdef _WIN32
+    if (!shared_file.empty()) {
+        note = "shared-file arena backing is not implemented on Windows";
+        return nullptr;
+    }
     // MEM_LARGE_PAGES needs SeLockMemoryPrivilege.  Having it assigned to the account is not enough: the
     // PROCESS must enable it in its own token (AdjustTokenPrivileges) before VirtualAlloc, or the call fails.
     // An account without the assignment, or a failure to enable, leaves the process as it was: VirtualAlloc
@@ -85,6 +112,94 @@ void* reserve(uint64_t bytes, PageBacking& got, std::string& note) {
     got = PageBacking::NormalPages;
     return p;
 #else
+    if (!shared_file.empty()) {
+        if (shared_pack_hash == 0) {
+            note = "shared arena requires a nonzero pack hash";
+            return nullptr;
+        }
+        if (bytes > UINT64_MAX - kSharedArenaHeaderBytes) {
+            note = "shared arena size overflows its header";
+            return nullptr;
+        }
+        const uint64_t file_bytes = kSharedArenaHeaderBytes + bytes;
+        const int fd = open(shared_file.c_str(), O_RDWR | O_CREAT | O_CLOEXEC, 0600);
+        if (fd < 0) {
+            note = "cannot open shared arena " + shared_file + ": " + std::strerror(errno);
+            return nullptr;
+        }
+        struct stat st{};
+        if (fstat(fd, &st) != 0) {
+            const int e = errno;
+            close(fd);
+            note = "cannot stat shared arena " + shared_file + ": " + std::strerror(e);
+            return nullptr;
+        }
+
+        const bool fresh = st.st_size == 0;
+        if (fresh) {
+            if (ftruncate(fd, (off_t) file_bytes) != 0) {
+                const int e = errno;
+                close(fd);
+                note = "cannot size shared arena " + shared_file + ": " + std::strerror(e);
+                return nullptr;
+            }
+            SharedArenaHeader hdr{};
+            std::memcpy(hdr.magic, kSharedArenaMagic, sizeof hdr.magic);
+            hdr.version = 1;
+            hdr.header_bytes = (uint32_t) kSharedArenaHeaderBytes;
+            hdr.arena_bytes = bytes;
+            hdr.pack_hash = shared_pack_hash;
+            const ssize_t written = pwrite(fd, &hdr, sizeof hdr, 0);
+            if (written != (ssize_t) sizeof hdr) {
+                const int e = errno;
+                close(fd);
+                note = "cannot write shared arena header " + shared_file + ": " +
+                       (written < 0 ? std::string(std::strerror(e)) : std::string("short write"));
+                return nullptr;
+            }
+        } else {
+            if (st.st_size < 0 || (uint64_t) st.st_size != file_bytes) {
+                close(fd);
+                note = "shared arena " + shared_file + " is " +
+                       std::to_string((unsigned long long) st.st_size) + " B, expected " +
+                       std::to_string((unsigned long long) file_bytes) + " B including its header";
+                return nullptr;
+            }
+            SharedArenaHeader hdr{};
+            const ssize_t got_header = pread(fd, &hdr, sizeof hdr, 0);
+            if (got_header != (ssize_t) sizeof hdr ||
+                std::memcmp(hdr.magic, kSharedArenaMagic, sizeof hdr.magic) != 0 ||
+                hdr.version != 1 || hdr.header_bytes != kSharedArenaHeaderBytes || hdr.arena_bytes != bytes) {
+                close(fd);
+                note = "shared arena " + shared_file + " has an incompatible or missing header";
+                return nullptr;
+            }
+            if (hdr.pack_hash != shared_pack_hash) {
+                close(fd);
+                char b[256];
+                std::snprintf(b, sizeof b,
+                              "shared arena %s was written for pack hash %016llx, expected %016llx",
+                              shared_file.c_str(), (unsigned long long) hdr.pack_hash,
+                              (unsigned long long) shared_pack_hash);
+                note = b;
+                return nullptr;
+            }
+        }
+
+        void* map = mmap(nullptr, (size_t) file_bytes, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
+        const int e = errno;
+        close(fd);
+        if (map == MAP_FAILED) {
+            note = "cannot map shared arena " + shared_file + ": " + std::strerror(e);
+            return nullptr;
+        }
+        mapping_base = map;
+        mapping_bytes = file_bytes;
+        got = PageBacking::NormalPages;
+        note = "MAP_SHARED file " + shared_file + " (pack hash checked)";
+        return (uint8_t*) map + kSharedArenaHeaderBytes;
+    }
+
     void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE,
                    MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_HUGE_2MB, -1, 0);
     if (p != MAP_FAILED) {
@@ -129,6 +244,47 @@ rewrite this code.
 bool clear_error() {(void)0; return true; }
 }  // namespace
 
+int arena_pin_cap_gib() {
+    const char* e = std::getenv("STRATA_ARENA_PIN_GIB");
+    if (e == nullptr || *e == '\0') return -1;
+    if (std::string(e) == "auto") return -2;   // #243: the Windows shared-memory budget sets the sliced pin's cap
+    const int v = std::atoi(e);
+    return v < 0 ? -1 : v;
+}
+
+namespace {
+#ifdef _WIN32
+// #243: how much of the arena the sliced registration may pin on Windows when the whole arena was refused.
+// Page-locked memory the GPU maps is charged to its shared (non-local) WDDM segment; pinned slice by slice until
+// the driver refused one (28 GiB of a 63 GB PC), that segment was left full and every later cudaMalloc failed
+// "out of memory".  4 GiB of the budget stay free for what the engine allocates after the arena; without the DXGI
+// numbers, RAM/2 - 8 GiB (the budget is about half the RAM).  False: no limit could be worked out.
+bool sliced_pin_limit(uint64_t& limit, std::string& why) {
+    constexpr uint64_t GiB = 1ull << 30;
+    char buf[256];
+    int dev = 0;
+    cudaDeviceProp p{};
+    uint64_t budget = 0, usage = 0;
+    std::string err = "no CUDA device properties";
+    if (cudaGetDevice(&dev) == cudaSuccess && cudaGetDeviceProperties(&p, dev) == cudaSuccess &&
+        strata::platform::gpu_shared_memory_budget(p.luid, budget, usage, err)) {
+        limit = budget > usage + 4 * GiB ? budget - usage - 4 * GiB : 0;
+        std::snprintf(buf, sizeof buf, "the GPU's shared-memory budget %.1f GiB - %.1f GiB in use - 4 GiB",
+                      (double) budget / GiB, (double) usage / GiB);
+        why = buf;
+        return true;
+    }
+    (void) cudaGetLastError();
+    const uint64_t ram = strata::platform::total_physical_memory();
+    if (ram == 0) return false;
+    limit = ram / 2 > 8 * GiB ? ram / 2 - 8 * GiB : 0;
+    std::snprintf(buf, sizeof buf, "%s: RAM/2 - 8 GiB of %.1f GiB", err.c_str(), (double) ram / GiB);
+    why = buf;
+    return true;
+}
+#endif
+}  // namespace
+
 namespace {
 std::vector<uint64_t> uniform_bounds(uint64_t bytes, uint64_t slice) {
     std::vector<uint64_t> b;
@@ -144,15 +300,29 @@ PinnedArena::PinnedArena(uint64_t bytes, uint64_t slice) : PinnedArena(bytes, un
 }
 
 PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
-                         uint64_t max_pinned_bytes) try
+                         uint64_t max_pinned_bytes,
+                         const std::string &shared_file,
+                         uint64_t shared_pack_hash) try
     : capacity(bytes) {
     if (bytes == 0) return;
-    base = reserve(bytes, backing, note);
+    base = reserve(bytes, backing, note, shared_file, shared_pack_hash, mapping_base, mapping_bytes);
+    if (base != nullptr && mapping_base == nullptr) {
+        mapping_base = base;
+        mapping_bytes = bytes;
+    }
 
     // Register with CUDA BEFORE any page is touched: cudaHostRegister pins what is resident now, and a region
     // that has already been faulted in page by page is far more expensive to register and may fail outright.
     if (base) {
-        const bool capped = max_pinned_bytes > 0 && max_pinned_bytes < bytes && bounds.size() >= 2;
+        // #243: STRATA_ARENA_PIN_GIB=N caps the registration from the start where the caller set no cap
+        const int env_gib = arena_pin_cap_gib();
+        uint64_t cap = max_pinned_bytes;
+        std::string cap_why = "by the engine (multi-GPU under WDDM, or remote experts)";
+        if (cap == 0 && env_gib > 0) {
+            cap = (uint64_t) env_gib << 30;
+            cap_why = "by STRATA_ARENA_PIN_GIB";
+        }
+        const bool capped = cap > 0 && cap < bytes && bounds.size() >= 2;
         const dpct::err0 e =
             capped ? 0 :
                    /*
@@ -169,9 +339,18 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
             // Plan v0.3 P5: the whole range is refused, so pin it slice by slice from the start.  The rest stays
             // resident through the working-set lock below.  (P6: slices may differ in size, one per layer.)
             slice_bytes = 1;   // sliced; the uniform constructor records the size
+            bool limited = capped;
+            uint64_t limit = cap;
+            std::string limit_why;
+#ifdef _WIN32
+            // #243 (opt-in, STRATA_ARENA_PIN_GIB=auto): not up to the driver's refusal but below the shared-memory
+            // budget, for a PC where the full sliced pin leaves WDDM refusing later allocations.  Not the default: a
+            // 64 GB PC pins 30 GiB past that budget without trouble, and capping it at 26 cost ~20% prompt speed.
+            if (!capped && env_gib == -2) limited = sliced_pin_limit(limit, limit_why);
+#endif
             for (size_t i = 0; i + 1 < bounds.size(); ++i) {
                 const uint64_t off = bounds[i], n = bounds[i + 1] - bounds[i];
-                if (capped && (off > max_pinned_bytes || n > max_pinned_bytes - off)) break;
+                if (limited && (off > limit || n > limit - off)) break;
                 /*
                 DPCT1027: The call to cudaHostRegister was replaced with 0
                 because SYCL currently does not support registering of existing
@@ -191,19 +370,26 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
                 registered_bytes = off + n;
                 ++registered_slices;
             }
+            char gib[32];
+            std::snprintf(gib, sizeof gib, "%.1f", (double) limit / (double) (1ull << 30));
             note =
-                (capped ? "cudaHostRegister limited to " +
-                              std::to_string(max_pinned_bytes >> 30) +
-                              " GiB for CUDA1; "
-                        :
-                        /*
-                        DPCT1009: SYCL reports errors using exceptions and
-                        does not use error codes. Please replace the
-                        "get_error_string_dummy(...)" with a real error-handling
-                        function.
-                        */
+                (capped
+                     ? "cudaHostRegister limited to " +
+                           std::to_string(cap >> 30) + " GiB " + cap_why + "; "
+                     :
+                     /*
+                     DPCT1009: SYCL reports errors using exceptions and does
+                     not use error codes. Please replace the
+                     "get_error_string_dummy(...)" with a real error-handling
+                     function.
+                     */
                      "cudaHostRegister of the whole arena FAILED (" +
-                         std::string(dpct::get_error_string_dummy(e)) + "); ") +
+                         std::string(dpct::get_error_string_dummy(e)) + "); " +
+                         (limited ? "slices capped at " + std::string(gib) +
+                                        " GiB (" + limit_why +
+                                        "; STRATA_ARENA_PIN_GIB=auto; N sets a "
+                                        "cap; #243); "
+                                  : std::string())) +
                 std::to_string(registered_slices) + " slices pinned (" +
                 std::to_string(registered_bytes >> 30) + " GiB); " + note;
             if (registered_bytes < bytes) {
@@ -281,8 +467,10 @@ PinnedArena::~PinnedArena() {
             device.
             */
         }
-        release(base, capacity);
+        release(mapping_base ? mapping_base : base, mapping_bytes ? mapping_bytes : capacity);
         base = nullptr;
+        mapping_base = nullptr;
+        mapping_bytes = 0;
     }
 }
 
diff --git a/sycl/src/core/session.cpp b/sycl/src/core/session.cpp
index 1b3bd74052e..c4e7cf86d88 100644
--- a/sycl/src/core/session.cpp
+++ b/sycl/src/core/session.cpp
@@ -52,13 +52,20 @@ static uint64_t ple_hist_bytes() {
     return (uint64_t) strata::kernels::NG_HIST * strata::kernels::NG_HC_DIM * sizeof(float);
 }
 
-uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k) {
+uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k, int64_t layer_lo, int64_t layer_hi) {
+    if (layer_hi < 0 || layer_hi > g.n_layers) layer_hi = g.n_layers;
+    if (layer_lo < 0) layer_lo = 0;
+    // QSA layers are `l % interval == interval-1`, so exactly `bound / interval` of them live below `bound`
+    const int64_t I = std::max<int64_t>(g.qsa_interval, 1);
+    const int64_t q_lo = layer_lo / I, q_hi = layer_hi / I;
+    const int64_t q_n = std::max<int64_t>(q_hi - q_lo, g.n_qsa_layers() > 0 ? 1 : 0);
+    const int64_t gdn_n = std::max<int64_t>((layer_hi - layer_lo) - std::max<int64_t>(q_hi - q_lo, 0), 0);
     uint64_t n = 0;
     n += gdn_buffers_bytes(g);
-    n += (uint64_t) g.n_gdn_layers() * gdn_state_floats(g) * 4;
+    n += (uint64_t) gdn_n * gdn_state_floats(g) * 4;
     // One QSA state carries the RoPE table; the others borrow it (P7: 64 MiB per layer at 262K).
     if (g.n_qsa_layers() > 0)
-        n += qsa_state_bytes(g, max_cells, true) + (uint64_t) (g.n_qsa_layers() - 1) * qsa_state_bytes(g, max_cells, false);
+        n += qsa_state_bytes(g, max_cells, true) + (uint64_t) (q_n - 1) * qsa_state_bytes(g, max_cells, false);
     n += qsa_buffers_bytes(g, max_cells);
     n += moe_buffers_bytes(g, k);
     n += block_buffers_bytes(g);
@@ -66,7 +73,10 @@ uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k) {
     return align_up(n, SESSION_STATE_ALIGN) + 4096;
 }
 
-uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s) {
+uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s,
+                      int64_t layer_lo, int64_t layer_hi) {
+    if (layer_hi < 0 || layer_hi > g.n_layers) layer_hi = g.n_layers;
+    if (layer_lo < 0) layer_lo = 0;
     uint8_t* p = (uint8_t*) base;
     uint64_t used = 0;
     auto take = [&](uint64_t bytes) {
@@ -77,24 +87,34 @@ uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void
 
     s.max_cells = max_cells;
     s.k = k;
+    s.layer_lo = layer_lo;
+    s.layer_hi = layer_hi;
+    const int64_t I = std::max<int64_t>(g.qsa_interval, 1);
+    const int64_t q_n_range = layer_hi / I - layer_lo / I;
+    s.qsa_ord0 = layer_lo / I;
+    s.qsa_alloc = std::max<int64_t>(q_n_range, g.n_qsa_layers() > 0 ? 1 : 0);
+    s.gdn_ord0 = layer_lo - layer_lo / I;
+    s.gdn_alloc = std::max<int64_t>((layer_hi - layer_lo) - q_n_range, 0);
 
     gdn_buffers_init(g, take(gdn_buffers_bytes(g)), s.gdn);
-    s.gdn_state = (float*) take((uint64_t) g.n_gdn_layers() * gdn_state_floats(g) * 4);
+    s.gdn_state = (float*) take((uint64_t) s.gdn_alloc * gdn_state_floats(g) * 4);
 
-    // the 12 QSA states are separate allocations carved from one arena, because `QsaState` is a struct of
+    // the QSA states are separate allocations carved from one arena, because `QsaState` is a struct of
     // pointers and `qsa_state_init` writes them - a contiguous array would need the arena to be laid out the
-    // same way, which is a coupling with nothing to gain.
+    // same way, which is a coupling with nothing to gain.  Only the range's ordinals are initialized; the
+    // rest stay value-initialized nulls.  The FIRST ALLOCATED one (the session's primary, ordinal qsa_ord0)
+    // owns the RoPE table that the others - and the prefill staging identity, and the MTP drafter - borrow.
     const uint64_t first = qsa_state_bytes(g, max_cells, true), rest = qsa_state_bytes(g, max_cells, false);
-    s.qsa_state_arena = take(g.n_qsa_layers() > 0 ? first + (uint64_t) (g.n_qsa_layers() - 1) * rest : 0);
-    s.qsa_states = new QsaState[(size_t) g.n_qsa_layers()];
+    s.qsa_state_arena = take(g.n_qsa_layers() > 0 ? first + (uint64_t) (s.qsa_alloc - 1) * rest : 0);
+    s.qsa_states = new QsaState[(size_t) g.n_qsa_layers()]();
     s.qsa_buf_arena = take(qsa_buffers_bytes(g, max_cells));
 
     uint8_t* qp = (uint8_t*) s.qsa_state_arena;
     // a layer whose pinned RAM could not be had (KV streaming's host copy) is half-built: going on would have the
     // attention read null host pointers at the first request ("illegal memory access"), so the session fails here
-    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
-        if (qsa_state_init(g, max_cells, qp + (i == 0 ? 0 : first + (uint64_t) (i - 1) * rest), s.qsa_states[i],
-                           i == 0 ? nullptr : &s.qsa_states[0]) == 0)
+    for (int64_t j = 0; j < s.qsa_alloc; ++j)
+        if (qsa_state_init(g, max_cells, qp + (j == 0 ? 0 : first + (uint64_t) (j - 1) * rest),
+                           s.qsa_states[s.qsa_ord0 + j], j == 0 ? nullptr : &s.qsa_states[s.qsa_ord0]) == 0)
             return 0;
     qsa_buffers_init(g, max_cells, s.qsa_buf_arena, s.qsa_bufs);
 
@@ -126,11 +146,10 @@ void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init,
     } else {
         cs->memset(s.block.R, 0, (size_t)g.hc * g.n_embd * 4);
     }
-    // every GDN layer's recurrence and conv history
-    cs->memset(s.gdn_state, 0,
-               (size_t)g.n_gdn_layers() * gdn_state_floats(g) * 4);
-    // and every QSA layer's cache and indexer
-    for (int64_t i = 0; i < g.n_qsa_layers(); ++i) qsa_state_zero(s.qsa_states[i], g, stream);
+    // every owned GDN layer's recurrence and conv history
+    cs->memset(s.gdn_state, 0, (size_t)s.gdn_alloc * gdn_state_floats(g) * 4);
+    // and every owned QSA layer's cache and indexer
+    for (int64_t j = 0; j < s.qsa_alloc; ++j) qsa_state_zero(s.qsa_states[s.qsa_ord0 + j], g, stream);
     // **AND THE PLE'S CONV HISTORY AND TOKEN WINDOW.**  A sequence that started with a warm history would
     // convolve over rows belonging to a different sequence - the conv reads NG_HIST previous NORMALIZED rows,
     // so a stale one is a real contribution and not a zero.  The token window resets to `NG_HIST`-many nulls
@@ -148,7 +167,7 @@ void gdn_point_at(const ModelGeometry& g, int64_t layer, SessionState& s) {
     if (is_qsa_layer(g, layer)) return;
     int64_t gdn_index = 0;
     for (int64_t l = 0; l < layer; ++l) if (!is_qsa_layer(g, l)) ++gdn_index;
-    s.gdn.state = s.gdn_state + (size_t) gdn_index * gdn_state_floats(g);
+    s.gdn.state = s.gdn_state + (size_t) (gdn_index - s.gdn_ord0) * gdn_state_floats(g);
     s.gdn.conv_state = s.gdn.state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
 }
 
@@ -161,42 +180,46 @@ void stage_token(const ModelGeometry& g, int64_t pos, int32_t pos_base, SessionS
     sh.head_dim = g.head_dim;
     sh.idx_n_head = g.idx_q_heads;
     sh.idx_dim = g.idx_key_dim;
-    for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
-        QsaState& q = s.qsa_states[i];
+    for (int64_t j = 0; j < s.qsa_alloc; ++j) {
+        QsaState& q = s.qsa_states[s.qsa_ord0 + j];
         qsa_step_fill(q.host_step, pos, sh);
         for (int64_t h = 0; h < g.n_head; ++h) q.host_pos[h] = (int32_t) (pos_base + pos);
     }
 }
 
 bool session_capture(const WeightTable& tables, const ModelGeometry& g, SessionState& s, const float* parts,
-                     SessionGraphs& gr, std::string& err, bool split) {
+                     SessionGraphs& gr, std::string& err, bool split, int64_t layer_lo, int64_t layer_hi) {
     if (gr.captured) return true;
+    if (layer_hi < 0 || layer_hi > g.n_layers) layer_hi = g.n_layers;
+    if (layer_lo < 0) layer_lo = 0;
     gr.execs =
-        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers]();
     gr.posts =
-        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+        new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers]();
     for (int64_t i = 0; i < g.n_layers; ++i) gr.posts[i] = nullptr;
     if (split) {
         gr.preA =
-            new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+            new dpct::experimental::command_graph_exec_ptr[(size_t)
+                                                               g.n_layers]();
         gr.preB =
-            new dpct::experimental::command_graph_exec_ptr[(size_t)g.n_layers];
+            new dpct::experimental::command_graph_exec_ptr[(size_t)
+                                                               g.n_layers]();
         for (int64_t i = 0; i < g.n_layers; ++i) { gr.preA[i] = nullptr; gr.preB[i] = nullptr; }
         for (int k = 0; k < 5; ++k) {
             gr.preP[k] =
-                new dpct::experimental::command_graph_exec_ptr[(size_t)
-                                                                   g.n_layers];
+                new dpct::experimental::command_graph_exec_ptr[(size_t)g
+                                                                   .n_layers]();
             for (int64_t i = 0; i < g.n_layers; ++i) gr.preP[k][i] = nullptr;
         }
     }
     gr.split_captured = split;
     gr.n = 0;
 
-    int64_t qsa_index = 0;
-    for (int64_t l = 0; l < g.n_layers; ++l) {
+    int64_t qsa_index = s.qsa_ord0;
+    for (int64_t l = layer_lo; l < layer_hi; ++l) {
         gdn_point_at(g, l, s);
         const bool qsa = is_qsa_layer(g, l);
-        QsaState& qst = qsa ? s.qsa_states[qsa_index] : s.qsa_states[0];
+        QsaState& qst = qsa ? s.qsa_states[qsa_index] : s.qsa_states[s.qsa_primary()];
 
         // **TWO GRAPHS PER LAYER, SPLIT AT THE ROUTER.**  `pre` ends with the doorbell rung; the host then runs
         // the CPU pool on what it published; `post` combines those experts with THIS layer's weights.  Capturing
@@ -1340,8 +1363,8 @@ bool session_run_token(const ModelGeometry &g, int64_t pos, int32_t pos_base,
                     err = "session_run_token: layer " + std::to_string(l) +
                           " never rang (" +
                           /*
-                          DPCT1009: SYCL reports errors using exceptions and
-                          does not use error codes. Please replace the
+                          DPCT1009: SYCL reports errors using exceptions
+                          and does not use error codes. Please replace the
                           "get_error_string_dummy(...)" with a real
                           error-handling function.
                           */
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 5e8f933de9a..1fdb4e07b30 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -41,6 +41,7 @@
 #include <atomic>
 #include <map>
 #include <string>
+#include <thread>
 #include <vector>
 #include <chrono>
 #include <cmath>
@@ -119,13 +120,65 @@ std::atomic<const Verifier*> g_diag_verifier{nullptr};
 void diag_active_verifier(std::FILE* f) {
     if (const Verifier* v = g_diag_verifier.load()) v->diag(f);
 }
+// #267: every live verifier (a layer split has one per stage), for the release before the engine ends
+constexpr int kLiveMax = 16;
+std::atomic<Verifier*> g_live[kLiveMax];
+void release_live_verifiers(std::FILE* f) {
+    for (auto& slot : g_live)
+        if (Verifier* v = slot.load()) {
+            const Clock::time_point t0 = Clock::now();
+            const bool done = v->release_gpu_waits(5000);
+            if (f != nullptr)
+                std::fprintf(f, "strata: released the verify window's GPU waits (#267): the GPU %s\n",
+                             done ? ("finished in " + std::to_string((long long) ms_since(t0)) + " ms").c_str()
+                                  : "did not finish within 5 s");
+        }
+    if (f != nullptr) std::fflush(f);
+}
+std::string released_note(bool drained) {
+    return drained ? "; its GPU waits were released and the GPU finished (#267)"
+                   : "; its GPU waits were released but the GPU did not finish within 5 s (#267)";
+}
+// #267 test hook: STRATA_TEST_VERIFY_STALL=N withholds the last layer's flag in the N-th window (1-based), so the
+// GPU spins on a flag nobody raises - the bounded window wait and the release are then what ends it.  Unset: never.
+const int64_t g_test_stall = [] {
+    const char* e = std::getenv("STRATA_TEST_VERIFY_STALL");
+    return e != nullptr ? (int64_t) std::atoll(e) : (int64_t) 0;
+}();
 }  // namespace
 
+bool Verifier::release_gpu_waits(int timeout_ms) try {
+    released_.store(true);
+    // the words the spin kernels read (wait_flag_ge, wait_flag_ge_or) are mapped host memory, so a store here
+    // reaches them with no API call; UINT32_MAX is past every ring.  (E-6's skip words are device memory, but
+    // wait_flag_ge_or also returns on its flag.)  A host function raising flag B later only raises.
+    for (uint32_t* p : {h_flag_, h_flagA_, h_flagB_})
+        if (p != nullptr) *(volatile uint32_t*) p = UINT32_MAX;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    _mm_sfence();
+    const OnDevice on_device(device_);
+    const Clock::time_point t0 = Clock::now();
+    // SYCL port: no cudaStreamQuery; a queue with nothing left to run reports ext_oneapi_empty()
+    for (dpct::queue_ptr q : {cs_, copy_}) {
+        if (q == nullptr) continue;
+        while (!q->ext_oneapi_empty()) {
+            if (ms_since(t0) > timeout_ms) return false;
+            std::this_thread::sleep_for(std::chrono::milliseconds(1));
+        }
+    }
+    return true;
+} catch (...) {
+    return false;   // the runtime may already be tearing down (the watchdog's path ends the engine)
+}
+
 void Verifier::diag(std::FILE* f) const {
     auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
-    std::fprintf(f, "  verify window: %d tokens at position %lld, host at layer step %u; the GPU rang %u; flags: "
-                    "served %u, plan (A) %u, copies (B) %u\n", last_t_, (long long) last_pos0_, cur_layer_ + 1,
-                 rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
+    // #251: outside a verify stage these are the LAST window's numbers (it finished), not the stalled work's
+    const char* where = progress().where.load();
+    const bool current = where != nullptr && std::strncmp(where, "verify window", 13) == 0;
+    std::fprintf(f, "  verify window%s: %d tokens at position %lld, host at layer step %u; the GPU rang %u; flags: "
+                    "served %u, plan (A) %u, copies (B) %u\n", current ? "" : " (last window, not the current stage)",
+                 last_t_, (long long) last_pos0_, cur_layer_ + 1, rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
 }
 
 Verifier::~Verifier() try {
@@ -133,6 +186,10 @@ Verifier::~Verifier() try {
     // that throws aborts the process (exit 139); the waits and frees below are best-effort then.
     const Verifier* self = this;
     g_diag_verifier.compare_exchange_strong(self, nullptr);
+    for (auto& slot : g_live) {
+        Verifier* me = this;
+        slot.compare_exchange_strong(me, nullptr);
+    }
     if (cs_) cs_->wait();
     for (auto& e : exec_)
         if (e) delete (e);
@@ -155,6 +212,11 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
                     const NativeHead *head, int max_t, std::string &err) try {
     g_diag_verifier.store(this);
     diag_verify_fn().store(&diag_active_verifier);
+    for (auto& slot : g_live) {
+        Verifier* none = nullptr;
+        if (slot.load() == this || slot.compare_exchange_strong(none, this)) break;
+    }
+    release_gpu_fn().store(&release_live_verifiers);
     device_ = dpct::get_current_device_id(); // a layer split's stage on another
                                              // GPU: its streams, graphs and
                                              // buffers live there
@@ -197,7 +259,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
 
     const strata::kernels::QsaShapes s = shapes_of(g);
     cap_ = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
-    max_blocks_ = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    max_blocks_ = ss.qsa_states[ss.qsa_primary()].max_cells / s.idx_block + 2;
     attn_scratch_floats_ = (int64_t) strata::kernels::qsa_decode_attn_scratch_floats(cap_, s);
 
     const uint64_t T = (uint64_t) max_t, N = (uint64_t) g.n_embd, HC = (uint64_t) g.hc, K = (uint64_t) ss.k;
@@ -526,7 +588,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                     !native_of(wout, v.name("ssm_out.weight"), err))
                     return false;
                 const int64_t gi = gdn_idx[(size_t) l];
-                float* state = ss.gdn_state + (size_t) gi * gdn_floats;
+                float* state = ss.gdn_state + (size_t) (gi - ss.gdn_ord0) * gdn_floats;
                 float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
                 float* qkv = qkv_L_ + (size_t) gi * MT * C;
                 float* hb = h_L_ + (size_t) gi * MT * C;
@@ -565,7 +627,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 auto norm_rope = [&](float* data, const WeightRef* norm, int rows, int cols, const int32_t* pos) {
                     if (native_qsa_enabled()) native_qsa_rms_norm_weighted(data, (const float*) norm->data, data, cols, rows, EPS, cs);
                     else rms_norm_weighted(data, (const float*) norm->data, rows, cols, EPS, cs);
-                    if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, (float) qsa_freq_base(), pos, cs);
+                    if (native_rope_enabled()) native_rope_apply(data, data, rows, cols, (int) s.n_rot, rope_scaling(), pos, cs);
                     else rope_neox_apply(data, data, rows, cols, (int) s.n_rot, st.cos_tab, st.sin_tab, pos, cs);
                 };
                 float* idx_raw = idx_raw_L_ + (size_t) qi * MT * ID;
@@ -610,7 +672,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 for (int t = tb; t < te; ++t)
                     native_qsa_indexer_append(idx_raw + t * ID, step_ + t * kStepCount + kStepPos, 0,
                                               (const float*) wikn->data, EPS, ib, s, st.max_cells,
-                                              (float) qsa_freq_base(), cs);
+                                              rope_scaling(), cs);
                 stamp(l, 9, grp);
                 native_mmvq(wq->native_type, wq->native_data, xq_, qfull_ + tb * NH * 2 * HD, (int) N, (int) (NH * 2 * HD),
                             n, cs);
@@ -1040,7 +1102,7 @@ bool Verifier::capture_commit(std::string &err) try {
             if (!is_qsa_layer(g, l)) {
                 const WeightRef* wnm = need(v, "ssm_norm.weight", err);
                 if (!wnm) { ok = false; break; }
-                float* state = ss.gdn_state + (size_t) gdn_index * gdn_floats;
+                float* state = ss.gdn_state + (size_t) (gdn_index - ss.gdn_ord0) * gdn_floats;
                 float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
                 const float* qkv = qkv_L_ + (size_t) gdn_index * MT * C;
                 gdn_conv_commit(conv, qkv, (int) C, commit_, cs_);
@@ -1057,7 +1119,7 @@ bool Verifier::capture_commit(std::string &err) try {
                 for (int64_t t = 0; t < MT; ++t)
                     native_qsa_indexer_append(idx_raw_L_ + (size_t) (qsa_index * MT + t) * ID, commit_ + 2 + t, 0,
                                               (const float*) wikn->data, EPS, ib, s, st.max_cells,
-                                              (float) qsa_freq_base(), cs_);
+                                              rope_scaling(), cs_);
                 ++qsa_index;
             }
         }
@@ -1104,7 +1166,8 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     if (T < 1 || T > max_t_) { err = "verify: window size out of range"; return false; }
     const ModelGeometry& g = *g_;
     SessionState& ss = *ss_;
-    if (pos0 + T > ss.qsa_states[0].max_cells) { err = "verify: the window runs past the context"; return false; }
+    if (released_.load()) { err = "verify: an earlier window never finished on the GPU (#267); restart the engine"; return false; }
+    if (pos0 + T > ss.qsa_states[ss.qsa_primary()].max_cells) { err = "verify: the window runs past the context"; return false; }
     if (!capture(T, err) || !capture_commit(err)) return false;
     VDBG("captured; staging\n");
     const Clock::time_point t0 = Clock::now();
@@ -1171,7 +1234,9 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     // so waiting on them per layer fails. STRATA_VERIFY_NO_HOST=1 waits for the whole window instead. Only for
     // an all-resident cache: a missed expert would leave the GPU waiting for a plan that never comes.
     static const bool no_host = std::getenv("STRATA_VERIFY_NO_HOST") != nullptr;
-    for (int64_t k = 0; !no_host && k < (le_ - lb_) * G; ++k) {
+    const int64_t steps = (le_ - lb_) * G;
+    const bool test_stall = g_test_stall > 0 && windows + 1 == g_test_stall;   // #267 test hook (off: false)
+    for (int64_t k = 0; !no_host && k < steps; ++k) {
         const int64_t l = lb_ + k / G;
         const int grp = (int) (k % G);
         const uint32_t want = (uint32_t) (k + 1);
@@ -1203,7 +1268,11 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                     return false;
                 }
             }
-            if (now - a > std::chrono::seconds(20)) { err = "verify: timed out at layer " + std::to_string(l); return false; }
+            if (now - a > std::chrono::seconds(20)) {
+                // #267: the caller ends the engine; no spin kernel may outlive it
+                err = "verify: timed out at layer " + std::to_string(l) + released_note(release_gpu_waits(5000));
+                return false;
+            }
         }
         const Clock::time_point b = Clock::now();
         VDBG("layer %lld rang\n", (long long) l);
@@ -1228,11 +1297,14 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
             *(volatile uint32_t*) h_flagA_ = want;
             raise_flag(h_flagB_, want);
         }
-        *flag = want;
+        if (!(test_stall && k + 1 == steps)) *flag = want;
         ms_wait += std::chrono::duration<double, std::milli>(b - a).count();
         ms_pool += ms_since(b);
     }
     progress_at("verify window: waiting for the GPU to finish the window (flags A/B/M raised)", (int64_t) T);
+    // #267: a window the GPU never finishes (a spin kernel that never sees its flag) holds the host here; the stall
+    // watchdog then releases every verifier's GPU waits (release_live_verifiers) before it ends the engine, so no
+    // spin kernel outlives the process.  The wait itself stays a blocking sync (a polling wait cost decode upstream).
     const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
     if (std::getenv("STRATA_VERIFY_DEBUG") != nullptr) {
         const Clock::time_point t_done = Clock::now();
@@ -1460,6 +1532,47 @@ void Verifier::publish_plan(void* ctx) {
     *(volatile uint32_t*) v->h_flagA_ = v->cur_layer_ + 1;
 }
 
+bool Verifier::window_logprobs(const int32_t* targets, int T, int64_t pos0, int32_t extra_id, std::FILE* out,
+                               std::string& err) try {
+    if (next_ != nullptr) return next_->window_logprobs(targets, T, pos0, extra_id, out, err);
+    const OnDevice on_device(device_);
+    if (head_logits_ == nullptr || n_vocab_ <= 0 || T <= 0 || targets == nullptr || out == nullptr) {
+        err = "window_logprobs: no head logits for this window";
+        return false;
+    }
+    // run() synchronized cs_ before returning, so the head of this window is complete
+    std::vector<float> h((size_t) T * (size_t) n_vocab_);
+    cs_->memcpy(h.data(), head_logits_, h.size() * sizeof(float)).wait();
+    for (int t = 0; t < T; ++t) {
+        const float* row = h.data() + (size_t) t * (size_t) n_vocab_;
+        const int32_t tgt = targets[t];
+        if (tgt < 0 || (int64_t) tgt >= n_vocab_) continue;
+        int64_t top = 0;
+        for (int64_t v = 1; v < n_vocab_; ++v)
+            if (row[v] > row[top]) top = v;
+        const double maxv = row[top];
+        const bool has_extra = extra_id >= 0 && (int64_t) extra_id < n_vocab_;
+        double sum = 0.0, sum_without = 0.0;   // the second skips extra_id: no cancellation when it holds ~all mass
+        for (int64_t v = 0; v < n_vocab_; ++v) {
+            const double e = std::exp((double) row[v] - maxv);
+            sum += e;
+            if (v != (int64_t) extra_id) sum_without += e;
+        }
+        const double lse = maxv + std::log(sum);
+        const double extra = has_extra ? (double) row[extra_id] - lse : NAN;
+        const double without = has_extra && tgt != extra_id && sum_without > 0.0
+                                   ? (double) row[tgt] - (maxv + std::log(sum_without)) : NAN;
+        std::fprintf(out, "%lld\t%d\t%.9f\t%lld\t%.9f\t%d\t%.9f\t%.9f\n", (long long) (pos0 + t), (int) tgt,
+                     (double) row[tgt] - lse, (long long) top, maxv - lse, (int) (top == (int64_t) tgt), extra,
+                     without);
+    }
+    std::fflush(out);
+    return true;
+} catch (sycl::exception const& e) {
+    err = std::string("window_logprobs: ") + e.what();
+    return false;
+}
+
 bool Verifier::commit(int n_keep, std::string &err, bool wait) try {
     const OnDevice on_device(device_);
     if (n_keep < 1 || n_keep > last_t_) { err = "verify: commit count out of range"; return false; }
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
index 731c6fbd10d..ea4de6bd0f0 100644
--- a/sycl/src/kernels/cuda/elementwise.dp.cpp
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -5,6 +5,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/sycl_doorbell.hpp"
 #include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/dp4a.hpp"
 
 #include "strata/kernels/bf16_bits.hpp"
 #include "strata/kernels/f16_bits.hpp"
@@ -12,7 +13,6 @@
 #include <cmath>
 #include <cstdio>
 #include <cstdlib>
-#include <time.h>
 
 namespace strata::kernels {
 namespace {
@@ -363,6 +363,10 @@ void silu_inplace(float* x, int64_t n, void* stream) {
 /// the write was not ordered into host-visible memory, so no amount of reading it would show it, and the driver
 /// call was flushing the whole pipeline enough to make it appear.  A 10-22 us driver call per iteration is a
 /// very expensive substitute for one fence instruction.
+///
+/// **THE STORE IS VOLATILE**, like `doorbell_publish_kernel`'s.  On RDNA4 (gfx1201) a plain store to mapped pinned
+/// memory stays in the GPU's L2 until the stream is synchronized - the host never saw the ring (tests/hip/handoff:
+/// 0 of 100 rings seen without a sync; volatile, a system-scope atomic store or a fence after the store: 100 of 100).
 __dpct_inline__ void doorbell_ring_kernel(uint32_t *seq) {
     /*
     DPCT1078: Consider replacing memory_order::acq_rel with
@@ -376,12 +380,7 @@ __dpct_inline__ void doorbell_ring_kernel(uint32_t *seq) {
 __dpct_inline__ void doorbell_wait_kernel(const volatile uint32_t *flag,
                                           const volatile uint32_t *seq) {
     const uint32_t want = strata::sys_load(seq);
-    /*
-    DPCT1008: __nanosleep function is not defined in SYCL. This is a
-    hardware-specific feature. Consult with your hardware vendor to find a
-    replacement.
-    */
-    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) {}
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) strata_spin_pause();
     /*
     DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 5e17d4df84c..3421c8398e7 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -373,8 +373,17 @@ bool gr_norm_split() {   // default; STRATA_GR_NORM_SPLIT=0: one work-group per
 }
 
 // Step 2 of `gr_down_kernel` for T tokens.  One warp per row (so each lane accumulates the same chunks in the
-// same order as the single-token kernel); per tile the lane's 10 weight chunks are loaded BEFORE the activation
+// same order as the single-token kernel); per tile the lane's weight chunks are loaded BEFORE the activation
 // tile is staged, so the DRAM and L2 traffic are in flight together.
+//
+// TILEV = xn floats per token staged at a time.  The tile only changes the staging granularity: the lane's chunk
+// order (lane + 32*q within the tile, tiles ascending) is strictly increasing for either value, so the results are
+// bitwise identical to `gr_down_kernel` for both.  2560 stages 320 chunks of 8 per tile (10 per lane); cards whose
+// opt-in below 8 * 2560 * 4 B slices the tokens - sm_75 (64 KiB) carries 6 tokens of it - run TILEV 1280 instead,
+// which fits all eight tokens in one 40 KiB launch and stages 160 chunks of 8 (5 per lane, half the registers held
+// for the weight prefetch); smaller tiles raise how many blocks share an SM (the 41-block grid), e.g. three blocks
+// of four tokens instead of one on sm_75.
+template <int TILEV>
 /*
 DPCT1110: The total declared local variable size in device function
 gr_down_multi_kernel exceeds 128 bytes and may cause high register pressure.
@@ -383,7 +392,8 @@ adjust the code, or use smaller sub-group size to avoid high register pressure.
 */
 __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    auto tile = (float *)dpct_local; // [T][TILE]
+    constexpr int TQ = TILEV / 8 / 32; // uint4 weight chunks per lane per tile
+    auto tile = (float *)dpct_local;   // [T][TILEV]
     const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
     const int T = m.T;
     const int gid = (int) item_ct1.get_group(2);
@@ -396,7 +406,7 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
     float acc[kFusedGrMaxT];
 #pragma unroll
     for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
-    for (int base = inject_block ? 0 : split * TILE; base < D; base += inject_block ? TILE : TILE * DOWN_SPLIT) {
+    for (int base = inject_block ? 0 : split * TILEV; base < D; base += inject_block ? TILEV : TILEV * DOWN_SPLIT) {
         sycl::uint4 wv[TQ];
         if (active) {
 #pragma unroll
@@ -421,8 +431,8 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
         item_ct1.barrier(); // the previous tile is consumed
         const sycl::float4 *src4 = reinterpret_cast<const sycl::float4 *>(m.xn);
         sycl::float4 *tile4 = reinterpret_cast<sycl::float4 *>(tile);
-        for (int i = t; i < T * (TILE / 4); i += THREADS) {
-            const int k = i / (TILE / 4), off = i - k * (TILE / 4);
+        for (int i = t; i < T * (TILEV / 4); i += THREADS) {
+            const int k = i / (TILEV / 4), off = i - k * (TILEV / 4);
             tile4[i] = src4[((size_t) k * D + base) / 4 + off];
         }
         /*
@@ -441,7 +451,7 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
             const int j = lane + 32 * q;
 #pragma unroll
             for (int k = 0; k < kFusedGrMaxT; ++k)
-                if (k < T) acc[k] += dot8(wv[q], tile + k * TILE + j * 8);
+                if (k < T) acc[k] += dot8(wv[q], tile + k * TILEV + j * 8);
         }
     }
     if (!active) return;
@@ -682,6 +692,266 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
     }
 }
 
+
+// ================================ hc read v3 (opt-in: STRATA_GR_V3=1) - two kernels, stream-split ================
+// The norm kernel runs on only T blocks (~16 us of pure latency per call) and `down` on 41 blocks (~280 GB/s).
+// v3: `down` is split over (row group, stream[, column half]) = 164 or 328 blocks; each block stages its slice of
+// R' * w_norm for the T tokens, reduces that slice's sum of squares itself, and writes UNSCALED partial dots.  The
+// rms scale is per stream, so  w_down . xn = sum_c rs[c] * (w_down[:, c] . (R'[c] * w_norm[c]))  - `up` applies it
+// in its prologue (lo, inject, rs).  Same maths, ANOTHER SUMMATION ORDER: not bitwise the default kernels, hence
+// opt-in.  Dynamic shared memory is T * (N / S) floats: S (1 or 2 column halves) is the smallest that fits the
+// card's opt-in limit at kFusedGrMaxT tokens (Ampere 99 KB: S = 1; Turing / HIP 64 KB: S = 2); a card where
+// neither fits keeps the default kernels.
+constexpr int PR = LR + HC;                        // partial rows per (token, stream): 320 down + 4 inject
+constexpr int TQ3 = N / 8 / 32;                    // uint4 weight chunks per lane in one stream's slice (10)
+
+template <int S>
+/*
+DPCT1110: The total declared local variable size in device function
+gr_down_v3_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_down_v3_kernel(GrMulti m, float *__restrict__ part,
+                                       float *__restrict__ ssg,
+                                       uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto xs = (float *)dpct_local;                 // [T][N / S]
+    constexpr int R2 = 1;                          // down rows per warp
+    auto &red = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[WARPS][kFusedGrMaxT]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    // S = 2: each stream's 2560 columns in two halves (blockIdx.y = stream * S + half): twice the blocks
+    constexpr int SL = N / S, TQS = SL / 8 / 32;
+    const int rg = item_ct1.get_group(2), c = item_ct1.get_group(1) / S,
+              h = item_ct1.get_group(1) - (item_ct1.get_group(1) / S) * S;
+    constexpr int NDB = LR / (WARPS * R2);          // down row blocks per stream; block NDB = the inject rows
+    const bool inject_block = rg == NDB;
+    // warp w owns rows row0 + w * R2 + r (r < R2); the inject block: warps 0-3, one row each
+    const int row0 = inject_block ? warp : (rg * WARPS + warp) * R2;
+    const int nrows = inject_block ? ((m.a[0].w_inject != nullptr && warp < HC) ? 1 : 0) : R2;
+    const bool active = nrows > 0;
+    const uint16_t* wbase = inject_block ? m.a[0].w_inject : m.a[0].w_down;
+    sycl::uint4 wv[R2][TQS];
+#pragma unroll
+    for (int r = 0; r < R2; ++r) {
+        if (r >= nrows) break;
+        const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(
+            wbase + (size_t)(row0 + r) * D + (size_t)c * N + (size_t)h * SL);
+#pragma unroll
+        /*
+        DPCT1098: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        for (int q = 0; q < TQS; ++q) wv[r][q] = *(w4 + lane + 32 * q);
+    }
+    float ssp[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        ssp[k] = 0.0f;
+        if (k >= T) continue;
+        const FusedGrArgs& a = m.a[k];
+        const float gw = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+        const sycl::float4 *R4 = reinterpret_cast<const sycl::float4 *>(
+            a.R + (size_t)c * N + (size_t)h * SL);
+        const sycl::float4 *G4 = reinterpret_cast<const sycl::float4 *>(
+            a.w_norm + (size_t)c * N + (size_t)h * SL);
+        const sycl::float4 *B4 =
+            reinterpret_cast<const sycl::float4 *>(a.bo_prev + (size_t)h * SL);
+        sycl::float4 *X4 =
+            reinterpret_cast<sycl::float4 *>(xs + (size_t)k * SL);
+        for (int i = t; i < SL / 4; i += THREADS) {
+            sycl::float4 r = R4[i];
+            if (a.apply) {
+                const sycl::float4 b = B4[i];
+                r.x() = sycl::fma((float)(b.x()), (float)gw, r.x());
+                    r.y() = sycl::fma((float)(b.y()), (float)gw, r.y());
+                r.z() = sycl::fma((float)(b.z()), (float)gw, r.z());
+                    r.w() = sycl::fma((float)(b.w()), (float)gw, r.w());
+            }
+            const sycl::float4 g = G4[i];
+            ssp[k] +=
+                r.x() * r.x() + r.y() * r.y() + r.z() * r.z() + r.w() * r.w();
+            X4[i] = sycl::float4(r.x() * g.x(), r.y() * g.y(), r.z() * g.z(),
+                                 r.w() * g.w());
+        }
+    }
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        if (k >= T) break;
+        const float v = warp_sum(ssp[k]);
+        if (lane == 0) red[warp][k] = v;
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (rg == 0 && t < T) {
+        float sum = 0.0f;
+#pragma unroll
+        for (int w = 0; w < WARPS; ++w) sum += red[w][t];
+        ssg[(t * HC + c) * S + h] = sum;
+    }
+    if (!active) return;
+#pragma unroll
+    for (int r = 0; r < R2; ++r) {
+        if (r >= nrows) break;
+        float acc[kFusedGrMaxT];
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+#pragma unroll
+        for (int q = 0; q < TQS; ++q) {
+            const int j = lane + 32 * q;
+#pragma unroll
+            for (int k = 0; k < kFusedGrMaxT; ++k)
+                if (k < T) acc[k] += dot8(wv[r][q], xs + (size_t) k * SL + j * 8);
+        }
+        const int prow = inject_block ? LR + warp : row0 + r;
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            if (k >= T) break;
+            const float v = warp_sum(acc[k]);
+            if (lane == 0) part[(((size_t) k * HC + c) * S + h) * PR + prow] = v;
+        }
+    }
+}
+
+template <int S>
+/*
+DPCT1110: The total declared local variable size in device function
+gr_up_v3_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_up_v3_kernel(GrMulti m, const float *__restrict__ part,
+                                     const float *__restrict__ ssg) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+    float[kFusedGrMaxT][LR]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &rsS = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[kFusedGrMaxT][HC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &g = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[kFusedGrMaxT][HC][UPM_COLS]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    const int d0 = item_ct1.get_group(2) * UPM_COLS;
+    constexpr int RPW = HC * UPM_COLS / WARPS;     // 8 rows per warp
+    if (t < T * HC) {
+        const int k = t / HC, c = t - k * HC;
+        float ss = 0.0f;
+#pragma unroll
+        for (int h = 0; h < S; ++h) ss += ssg[t * S + h];
+        const float r = sycl::rsqrt(ss / (float)N + m.a[k].eps);
+        rsS[k][c] = r;
+        if (item_ct1.get_group(2) == 0) m.a[k].rs[c] = r;
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    for (int i = t; i < T * LR; i += THREADS) {
+        const int k = i / LR, r = i - k * LR;
+        float sum = 0.0f;
+#pragma unroll
+        for (int c = 0; c < HC; ++c) {
+            float p = 0.0f;
+#pragma unroll
+            for (int h = 0; h < S; ++h) p += part[(((size_t) k * HC + c) * S + h) * PR + r];
+            sum = sycl::fma(rsS[k][c], p, sum);
+        }
+        const float x = sum / (float) HC;
+        lo[k][r] = x / (1.0f + sycl::native::exp(-x));
+    }
+    if (item_ct1.get_group(2) == 0 && t < T * HC) {
+        const int k = t / HC, cc = t - k * HC;
+        if (m.a[k].w_inject != nullptr) {
+            float sum = 0.0f;
+#pragma unroll
+            for (int c = 0; c < HC; ++c) {
+                float p = 0.0f;
+#pragma unroll
+                for (int h = 0; h < S; ++h) p += part[(((size_t) k * HC + c) * S + h) * PR + LR + cc];
+                sum = sycl::fma(rsS[k][c], p, sum);
+            }
+            m.a[k].inject_out[cc] = sum;
+        }
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+#pragma unroll
+    for (int q = 0; q < RPW; ++q) {
+        const int r = warp + q * WARPS;
+        const int c = r / UPM_COLS, dd = r - c * UPM_COLS, i = c * N + d0 + dd;
+        const sycl::uint4 *w4 =
+            reinterpret_cast<const sycl::uint4 *>(m.a[0].w_up + (size_t)i * LR);
+        /*
+        DPCT1098: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wa = *(w4 + lane);
+        /*
+        DPCT1098: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        const sycl::uint4 wb =
+            lane < LR / 8 - 32 ? *(w4 + 32 + lane) : sycl::uint4(0, 0, 0, 0);
+        float rv = 0.0f, wn = 0.0f, bo = 0.0f, ip = 0.0f;
+        bool apply = false;
+        if (lane < T) {
+            const FusedGrArgs& a = m.a[lane];
+            rv = a.R[i];
+            wn = a.w_norm[i];
+            apply = a.apply;
+            if (apply) { bo = a.bo_prev[d0 + dd]; ip = a.inj_prev[c]; }
+        }
+        float mine = 0.0f;
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            if (k >= T) break;
+            float acc = dot8(wa, lo[k] + lane * 8);
+            if (lane < LR / 8 - 32) acc += dot8(wb, lo[k] + (32 + lane) * 8);
+            acc = warp_sum(acc);
+            if (lane == k) mine = acc;
+        }
+        if (lane < T) {
+            if (apply) {
+                rv = sycl::fma(bo, 2.0f * sigmoidf_(ip / (float)HC), rv);
+                m.a[lane].R_out[i] = rv;
+            }
+            const float x = rv * wn * rsS[lane][c];
+            g[lane][c][dd] = x * sigmoidf_(mine);
+        }
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    for (int i = t; i < T * UPM_COLS; i += THREADS) {
+        const int k = i / UPM_COLS, col = i - k * UPM_COLS;
+        float sum = 0.0f;
+#pragma unroll
+        for (int c = 0; c < HC; ++c) sum += g[k][c][col];
+        m.a[k].mixed[d0 + col] = sum / (float) HC;
+    }
+}
 }  // namespace
 
 // one partials buffer per queue (the verifier's and the drafter's launches never share a queue; within a queue the
@@ -717,6 +987,139 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
     m.xn = xn_scratch;
     m.T = n_tok;
     dpct::queue_ptr st = strata::q_of(stream);
+    // STRATA_GR_V3=1: the two-kernel read above (another summation order - opt-in)
+    static const bool v3 = [] { const char* v = std::getenv("STRATA_GR_V3"); return v != nullptr && std::atoi(v) != 0; }();
+    static int split3[64] = {};   // per device: 0 = not decided yet, 1 / 2 = column halves S, -1 = does not fit
+    int dev3 = 0;
+    if (v3) {
+        dev3 = dpct::get_current_device_id();
+        if (dev3 >= 0 && dev3 < 64 && split3[dev3] == 0) {
+            int optin = 0;
+            // SYCL port: the device's local memory is the limit (no per-kernel opt-in to raise)
+            optin = (int) dpct::get_device(dev3).get_local_mem_size();
+            const int limit = optin > 0 ? optin : 48 * 1024;
+            const int need1 = (int) (kFusedGrMaxT * N * sizeof(float)), need2 = need1 / 2;
+            int split = -1;
+            if (need1 <= limit &&
+                /*
+                DPCT1027: The call to cudaFuncSetAttribute was replaced with
+                0 because SYCL currently does not support corresponding setting.
+                */
+                0 == 0)
+                split = 1;
+            else if (need2 <= limit &&
+                     /*
+                     DPCT1027: The call to cudaFuncSetAttribute was replaced
+                     with 0 because SYCL currently does not support
+                     corresponding setting.
+                     */
+                     0 == 0)
+                split = 2;
+            /*
+            DPCT1026: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+; // drop any error the attempts left behind
+            split3[dev3] = split;
+        }
+    }
+    const int split = v3 && dev3 >= 0 && dev3 < 64 ? split3[dev3] : -1;
+    if (split > 0) {   // 2 kernels; scratch = partials + sums of squares
+        float* part = xn_scratch;
+        float* ssg = xn_scratch + (size_t) n_tok * HC * 2 * PR;   // room for S = 2
+        /*
+        DPCT1083: The size of local memory in the migrated code may be
+        different from the original code. Check that the allocated memory size
+        in the migrated code is correct.
+        */
+        const size_t sm = (size_t)n_tok * (N / split) * sizeof(float);
+        if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, stream);
+        if (split == 2) {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(sm), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class gr_down_v3_kernel_c14ff7, dpct_kernel_scalar<2>>>(
+                    sycl::nd_range<3>(sycl::range(1, HC * 2, LR / WARPS + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        gr_down_v3_kernel<2>(
+                            m, part, ssg,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(sm), cgh);
+
+                cgh.parallel_for<dpct_kernel_name<
+                    class gr_down_v3_kernel_88bc89, dpct_kernel_scalar<1>>>(
+                    sycl::nd_range<3>(sycl::range(1, HC, LR / WARPS + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        gr_down_v3_kernel<1>(
+                            m, part, ssg,
+                            dpct_local_acc_ct1
+                                .get_multi_ptr<sycl::access::decorated::no>()
+                                .get());
+                    });
+            });
+        }
+        if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
+        if (split == 2) {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class gr_up_v3_kernel_6e945c,
+                                              dpct_kernel_scalar<2>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, UPM_BLOCKS) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_up_v3_kernel<2>(m, part, ssg);
+                    });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class gr_up_v3_kernel_716779,
+                                              dpct_kernel_scalar<1>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, UPM_BLOCKS) *
+                                      sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gr_up_v3_kernel<1>(m, part, ssg);
+                    });
+        }
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        const dpct::err0 e3 = 0;
+
+        return;
+    }
     m.part = down_partials(st);
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
@@ -737,38 +1140,17 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
             });
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, stream);
-    // the shared-memory opt-in is a per-DEVICE setting: once per device, not once per process (a layer split
-    // runs this kernel on two cards)
+    // the local-memory capacity is a per-DEVICE property: once per device (a layer split runs this on two cards).
+    // SYCL port: upstream picks TILEV 1280 on sm_75 and takes the per-block limit below sm_70 (CUDA compute
+    // capabilities, cudaFuncSetAttribute opt-ins); here the tile is the port's TILE and the device's local memory is
+    // the only limit. The tiled kernel is the fallback (STRATA_GR_DOWN_SLICED=0 STRATA_GR_DOWN_DIRECT=0); the
+    // default is the sliced kernel below.
     static bool attr[64] = {};
-    static int chunk[64] = {};   // Turing port: tokens the down kernel may carry in one launch on this card
+    static int chunk[64] = {};   // tokens the tiled down kernel may carry in one launch on this card
     int dev = 0;
     dev = dpct::get_current_device_id();
     if (dev >= 0 && dev < 64 && !attr[dev]) {
-        // at most what the card allows (Turing: 64 KB - enough for windows of up to 6 tokens)
-        int optin = 0;
-        /*
-        DPCT1019: local_mem_size in SYCL is not a complete equivalent of
-        cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
-        the code.
-        */
-        optin = dpct::get_device(dev).get_local_mem_size();
-        int want = (int) (kFusedGrMaxT * TILE * sizeof(float));
-        if (optin > 0 && want > optin) want = optin;
-        /*
-        DPCT1026: The call to cudaFuncSetAttribute was removed because SYCL
-        currently does not support corresponding setting.
-        */
-        /*
-        DPCT1026: The call to cudaGetLastError was removed because this
-        functionality is redundant in SYCL.
-        */
-; // drop any error the attempt left behind
-        // Turing port: the down kernel stages n_tok*TILE floats of dynamic shared memory - 80 KB at the full
-        // 8 tokens.  A card whose opt-in is below that (Turing: 64 KB, so 7+ tokens fail to launch as
-        // "invalid argument") processes the tokens in slices that fit; a card that reports no opt-in gets what
-        // fits the 48 KB default (4 tokens of the CUDA tile; all 8 of HIP's smaller tile).  The down kernel's
-        // outputs (lo, inject_out) are strictly per-token, so the chunk boundaries are safe, and the up kernel
-        // below still sees every token of the batch in one launch.
+        const int optin = (int) dpct::get_device(dev).get_local_mem_size();
         const int capacity = (optin > 0 ? optin : 48 * 1024) / (int) (TILE * sizeof(float));
         chunk[dev] = capacity < 1 ? 1 : (capacity > kFusedGrMaxT ? kFusedGrMaxT : capacity);
         attr[dev] = true;
@@ -797,25 +1179,18 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
     } else if (chunk_tok >= n_tok) {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
-
         st->submit([&](sycl::handler &cgh) {
-            /*
-            DPCT1083: The size of local memory in the migrated code may
-            be different from the original code. Check that the allocated
-            memory size in the migrated code is correct.
-            */
             sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
                 sycl::range((size_t)n_tok * TILE * sizeof(float)), cgh);
-
             cgh.parallel_for<
-                dpct_kernel_name<class gr_down_multi_kernel_7f5820>>(
+                dpct_kernel_name<class gr_down_multi_kernel_7f5820, dpct_kernel_scalar<TILE>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) *
                                       sycl::range(1, 1, THREADS),
                                   sycl::range(1, 1, THREADS)),
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        gr_down_multi_kernel(
+                        gr_down_multi_kernel<TILE>(
                             m, dpct_local_acc_ct1
                                    .get_multi_ptr<sycl::access::decorated::no>()
                                    .get());
@@ -829,35 +1204,25 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
             c.T = ct;
             for (int k = 0; k < ct; ++k) c.a[k] = a[c0 + k];
             c.part = m.part;
-            {
-                auto exp_props = sycl::ext::oneapi::experimental::properties{
-                    sycl::ext::oneapi::experimental::use_root_sync};
-
-                st->submit([&](sycl::handler &cgh) {
-                    /*
-                    DPCT1083: The size of local memory in the migrated code
-                    may be different from the original code. Check that the
-                    allocated memory size in the migrated code is correct.
-                    */
-                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
-                        sycl::range((size_t)ct * TILE * sizeof(float)), cgh);
-
-                    cgh.parallel_for<
-                        dpct_kernel_name<class gr_down_multi_kernel_88cb86>>(
-                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) *
-                                              sycl::range(1, 1, THREADS),
-                                          sycl::range(1, 1, THREADS)),
-                        exp_props,
-                        [=](sycl::nd_item<3> item_ct1)
-                            [[sycl::reqd_sub_group_size(32)]] {
-                                gr_down_multi_kernel(
-                                    c, dpct_local_acc_ct1
-                                           .get_multi_ptr<
-                                               sycl::access::decorated::no>()
-                                           .get());
-                            });
-                });
-            }
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range((size_t)ct * TILE * sizeof(float)), cgh);
+                cgh.parallel_for<
+                    dpct_kernel_name<class gr_down_multi_kernel_88cb86, dpct_kernel_scalar<TILE>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS * DOWN_SPLIT + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            gr_down_multi_kernel<TILE>(
+                                c, dpct_local_acc_ct1
+                                       .get_multi_ptr<sycl::access::decorated::no>()
+                                       .get());
+                        });
+            });
         }
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
@@ -894,6 +1259,23 @@ void fused_gr_read(const FusedGrArgs& a, void* stream) {
         std::exit(1);
     }
     dpct::queue_ptr st = strata::q_of(stream);
+    // SYCL port: the multi-token read's sliced down kernel and per-(token, stream) norm sum in their own orders, so a
+    // window's token would differ in its last bits from this kernel's. The header promises "every token's outputs
+    // are bitwise fused_gr_read(a[t])" (gr_parity checks it): with those paths on, the single read IS the multi read
+    // of one token (each token's sums run in the same order whatever the window size).
+    if (gr_down_sliced() || gr_norm_split() || gr_down_direct()) {
+        static std::mutex mu;
+        static std::unordered_map<sycl::queue*, float*> xn;
+        float* scratch;
+        {
+            std::lock_guard<std::mutex> lk(mu);
+            float*& p = xn[st];
+            if (!p) p = sycl::malloc_device<float>((size_t) D, *st);
+            scratch = p;
+        }
+        fused_gr_read_multi(&a, 1, scratch, stream);
+        return;
+    }
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 535fbb3191c..37551736755 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -10,6 +10,7 @@
 #include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/dp4a.hpp"
 
 #define GGML_COMMON_DECL_SYCL
 #define GGML_COMMON_IMPL_SYCL
@@ -71,7 +72,7 @@ __dpct_inline__ sycl::int2 get_int_from_table_16(const int &q4,
     return sycl::int2(dpct::byte_level_permute(tmp[0], tmp[1], 0x6420),
                       dpct::byte_level_permute(tmp[0], tmp[1], 0x7531));
 }
-#define ggml_cuda_dp4a(a, b, c) strata::dp4a((a), (b), (c))
+#define ggml_cuda_dp4a(a, b, c) strata::dp4a((a), (b), (c))   // SYCL port: the one dp4a (strata/sycl_math.hpp)
 
 // ---------------------------------------------------------------- the dot products (vecdotq.cuh)
 __dpct_inline__ float vec_dot_q2_0_q8_1(const void *__restrict__ vbq,
@@ -341,7 +342,7 @@ __dpct_inline__ uint32_t iq4nl_lut4(uint32_t q4) {   // four nibbles -> four kva
     }
     return r;
 }
-__dpct_inline__ sycl::int2 iq4nl_pair(int aux) {   // = get_int_from_table_16(aux, kvalues_iq4nl)
+__dpct_inline__ sycl::int2 iq4nl_pair(int aux) {   // = get_int_from_table_16(aux)
     return sycl::int2((int) iq4nl_lut4((uint32_t) aux & 0x0f0f0f0fu), (int) iq4nl_lut4(((uint32_t) aux >> 4) & 0x0f0f0f0fu));
 }
 __dpct_inline__ sycl::int2 load8_a2(const uint8_t* p) {   // 8 bytes at a 2-byte-aligned address, as two ints
@@ -420,6 +421,170 @@ __dpct_inline__ float vec_dot_iq4_xs_q8_1(const void *__restrict__ vbq,
     return d * sumi;
 }
 
+// ---------------------------------------------------------------- Unsloth's UD-Q4_K_XL experts
+// Q4_K / Q5_K gate/up and Q5_1 / Q8_0 down: llama.cpp's vec_dot_*_q8_1 (vecdotq.cuh, VDR 2 each), transcribed; the
+// Q5_1 min term is the one departure (below).  Via eddoursul/Strata 8029fa9 (iq_dot.cuh) and #255 (Q8_0,
+// gopinath87607), which agree with llama.cpp and with each other.
+constexpr int VDR_Q4_K = 2, VDR_Q5_K = 2, VDR_Q5_1 = 2, VDR_Q8_0 = 2;
+
+__dpct_inline__ float vec_dot_q4_K_q8_1_impl_vmmq(
+    const int *__restrict__ v, const int *__restrict__ u,
+    const uint8_t *__restrict__ sc, const uint8_t *__restrict__ m,
+    const sycl::half2 &dm4, const float *__restrict__ d8) {
+    float sumf_d = 0.0f;
+    float sumf_m = 0.0f;
+#pragma unroll
+    for (int i = 0; i < QR4_K; ++i) {
+        const int v0i = (v[0] >> (4 * i)) & 0x0F0F0F0F;
+        const int v1i = (v[1] >> (4 * i)) & 0x0F0F0F0F;
+        const int dot1 = ggml_cuda_dp4a(v1i, u[2 * i + 1], ggml_cuda_dp4a(v0i, u[2 * i + 0], 0));
+        const int dot2 = ggml_cuda_dp4a(0x01010101, u[2 * i + 1], ggml_cuda_dp4a(0x01010101, u[2 * i + 0], 0));
+        sumf_d += d8[i] * (dot1 * sc[i]);
+        sumf_m += d8[i] * (dot2 * m[i]);   // the min times the sum of the QUANTIZED activations
+    }
+    const sycl::float2 dm4f =
+        dm4.template convert<float, sycl::rounding_mode::automatic>();
+    return dm4f.x() * sumf_d - dm4f.y() * sumf_m;
+}
+__dpct_inline__ float vec_dot_q5_K_q8_1_impl_vmmq(
+    const int *__restrict__ vl, const int *__restrict__ vh,
+    const int *__restrict__ u, const uint8_t *__restrict__ sc,
+    const uint8_t *__restrict__ m, const sycl::half2 &dm5,
+    const float *__restrict__ d8) {
+    float sumf_d = 0.0f;
+    float sumf_m = 0.0f;
+#pragma unroll
+    for (int i = 0; i < QR5_K; ++i) {
+        const int vl0i = (vl[0] >> (4 * i)) & 0x0F0F0F0F;
+        const int vl1i = (vl[1] >> (4 * i)) & 0x0F0F0F0F;
+        const int vh0i = ((vh[0] >> i) << 4) & 0x10101010;
+        const int vh1i = ((vh[1] >> i) << 4) & 0x10101010;
+        const int v0i = vl0i | vh0i;
+        const int v1i = vl1i | vh1i;
+        const int dot1 = ggml_cuda_dp4a(v0i, u[2 * i + 0], ggml_cuda_dp4a(v1i, u[2 * i + 1], 0));
+        const int dot2 = ggml_cuda_dp4a(0x01010101, u[2 * i + 0], ggml_cuda_dp4a(0x01010101, u[2 * i + 1], 0));
+        sumf_d += d8[i] * (dot1 * sc[i]);
+        sumf_m += d8[i] * (dot2 * m[i]);
+    }
+    const sycl::float2 dm5f =
+        dm5.template convert<float, sycl::rounding_mode::automatic>();
+    return dm5f.x() * sumf_d - dm5f.y() * sumf_m;
+}
+// the 6-bit scales and mins of the 32-value group pair bq8_offset / 2, branchless (llama.cpp; shared by Q4_K, Q5_K)
+__dpct_inline__ void k_scale_min(const uint8_t *scales8, int bq8_offset,
+                                 uint16_t aux[2]) {
+    const uint16_t* scales = (const uint16_t*) scales8;
+    const int j = bq8_offset / 2;
+    const int jm = j & 1;
+    const uint32_t s0 = scales[jm + 0];
+    const uint32_t s2 = scales[jm + 2];
+    const uint32_t s4 = scales[jm + 4];
+    const uint32_t hi = (uint32_t) -(int32_t) (j >= 2);
+    aux[0] = (uint16_t) (((s0 & 0x3f3f) & ~hi) | ((((s4 >> 0) & 0x0f0f) | ((s0 & 0xc0c0) >> 2)) & hi));
+    aux[1] = (uint16_t) (((s2 & 0x3f3f) & ~hi) | ((((s4 >> 4) & 0x0f0f) | ((s2 & 0xc0c0) >> 2)) & hi));
+}
+__dpct_inline__ float vec_dot_q4_K_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q4_K* bq4_K = (const block_q4_K*) vbq + kbx;
+    int v[2];
+    int u[2 * QR4_K];
+    float d8[QR4_K];
+    const int bq8_offset = QR4_K * ((iqs / 2) / (QI8_1 / 2));
+    const int* q4 = (const int*) (bq4_K->qs + 16 * bq8_offset + 4 * ((iqs / 2) % 4));
+    v[0] = q4[0];
+    v[1] = q4[4];
+    uint16_t aux[2];
+    k_scale_min(bq4_K->scales, bq8_offset, aux);
+    const uint8_t* sc = (const uint8_t*) aux;
+    const uint8_t* m = sc + 2;
+#pragma unroll
+    for (int i = 0; i < QR4_K; ++i) {
+        const block_q8_1* bq8i = bq8_1 + bq8_offset + i;
+        d8[i] = bq8i->ds[0];
+        const int* q8 = (const int*) bq8i->qs + ((iqs / 2) % 4);
+        u[2 * i + 0] = q8[0];
+        u[2 * i + 1] = q8[4];
+    }
+    return vec_dot_q4_K_q8_1_impl_vmmq(v, u, sc, m, bq4_K->dm, d8);
+}
+__dpct_inline__ float vec_dot_q5_K_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q5_K* bq5_K = (const block_q5_K*) vbq + kbx;
+    int vl[2];
+    int vh[2];
+    int u[2 * QR5_K];
+    float d8[QR5_K];
+    const int bq8_offset = QR5_K * ((iqs / 2) / (QI8_1 / 2));
+    const int* ql = (const int*) (bq5_K->qs + 16 * bq8_offset + 4 * ((iqs / 2) % 4));
+    const int* qh = (const int*) (bq5_K->qh + 4 * ((iqs / 2) % 4));
+    vl[0] = ql[0];
+    vl[1] = ql[4];
+    vh[0] = qh[0] >> bq8_offset;
+    vh[1] = qh[4] >> bq8_offset;
+    uint16_t aux[2];
+    k_scale_min(bq5_K->scales, bq8_offset, aux);
+    const uint8_t* sc = (const uint8_t*) aux;
+    const uint8_t* m = sc + 2;
+#pragma unroll
+    for (int i = 0; i < QR5_K; ++i) {
+        const block_q8_1* bq8i = bq8_1 + bq8_offset + i;
+        d8[i] = bq8i->ds[0];
+        const int* q8 = (const int*) bq8i->qs + ((iqs / 2) % 4);
+        u[2 * i + 0] = q8[0];
+        u[2 * i + 1] = q8[4];
+    }
+    return vec_dot_q5_K_q8_1_impl_vmmq(vl, vh, u, sc, m, bq5_K->dm, d8);
+}
+// Q5_1: llama.cpp's integer chain, but the min term multiplies the sum of the QUANTIZED activations (dp4a with
+// 0x01010101, times d8) instead of the q8_1 block's `ds.y`, which our quantizer (like llama.cpp's) fills with the sum
+// of the ORIGINAL activations.  That is ggml-cpu's convention (its q8_1 `s` is d * sum(q)) and the one the K-quant
+// mins above use; the scaled and the min term then see the same activation (eddoursul/Strata measured 1.1-1.2%
+// against 1.9% relative error per expert).  Result: sumi * (d5 * d8) + sumu * (m5 * d8).
+__dpct_inline__ float vec_dot_q5_1_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q5_1* bq5_1 = (const block_q5_1*) vbq + kbx;
+    int sumi = 0, sumu = 0;
+#pragma unroll
+    for (int i = 0; i < VDR_Q5_1; ++i) {
+        const int vl = get_int_b4(bq5_1->qs, iqs + i);
+        const int vh = get_int_b4(bq5_1->qh, 0) >> (4 * (iqs + i));
+        const int u0 = get_int_b4(bq8_1->qs, iqs + i), u1 = get_int_b4(bq8_1->qs, iqs + i + QI5_1);
+        int vi0 = (vl >> 0) & 0x0F0F0F0F;
+        vi0 |= (vh << 4) & 0x00000010;
+        vi0 |= (vh << 11) & 0x00001000;
+        vi0 |= (vh << 18) & 0x00100000;
+        vi0 |= (vh << 25) & 0x10000000;
+        sumi = ggml_cuda_dp4a(vi0, u0, sumi);
+        int vi1 = (vl >> 4) & 0x0F0F0F0F;
+        vi1 |= (vh >> 12) & 0x00000010;
+        vi1 |= (vh >> 5) & 0x00001000;
+        vi1 |= (vh << 2) & 0x00100000;
+        vi1 |= (vh << 9) & 0x10000000;
+        sumi = ggml_cuda_dp4a(vi1, u1, sumi);
+        sumu = ggml_cuda_dp4a(0x01010101, u1, ggml_cuda_dp4a(0x01010101, u0, sumu));
+    }
+    const sycl::float2 dm5 =
+        (bq5_1->dm).template convert<float, sycl::rounding_mode::automatic>();
+    const float d8 = bq8_1->ds[0];
+    return sumi * (dm5.x() * d8) + sumu * (dm5.y() * d8);
+}
+__dpct_inline__ float vec_dot_q8_0_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q8_0* bq8_0 = (const block_q8_0*) vbq + kbx;
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < VDR_Q8_0; ++i)
+        sumi = ggml_cuda_dp4a(get_int_b2(bq8_0->qs, iqs + i), get_int_b4(bq8_1->qs, iqs + i), sumi);
+    const float d8_0 = sycl::vec<sycl::half, 1>(bq8_0->d)
+                           .convert<float, sycl::rounding_mode::automatic>()[0],
+                d8_1 = bq8_1->ds[0];
+    return d8_0 * d8_1 * ((float) sumi);
+}
+
 // ---------------------------------------------------------------- the formats
 // qk = values per block, ipb = dot calls per block (qi / vdr), step = the iqs stride between calls.
 template<int TY> 
@@ -442,6 +607,20 @@ template<> struct Fmt<29> { static constexpr int qk = 256, ipb = 8, step = 1;
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_iq1_m_q8_1(v, y, kbx, iqs); } };
 template<> struct Fmt<42> { static constexpr int qk = 64, ipb = 2, step = 1;
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q2_0_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<12> { static constexpr int qk = 256, ipb = QI4_K / VDR_Q4_K, step = VDR_Q4_K;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q4_K_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<13> { static constexpr int qk = 256, ipb = QI5_K / VDR_Q5_K, step = VDR_Q5_K;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q5_K_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<7> { static constexpr int qk = 32, ipb = QI5_1 / VDR_Q5_1, step = VDR_Q5_1;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q5_1_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<8> { static constexpr int qk = 32, ipb = QI8_0 / VDR_Q8_0, step = VDR_Q8_0;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q8_0_q8_1(v, y, kbx, iqs); } };
+
+// The formats of each role, one list each so a type cannot be in one switch and missing from another.  Every
+// entry is a kernel template for each CUDA architecture of the build, hence two lists rather than one.
+#define STRATA_GU_FMTS(X) X(16) X(17) X(18) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(8)
+#define STRATA_D_FMTS(X) X(20) X(23) X(42) X(7) X(8)
+#define STRATA_MMVQ_FMTS(X) X(16) X(17) X(18) X(20) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(7) X(8)
 
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
@@ -519,6 +698,398 @@ mmvq_kernel(const uint8_t *__restrict__ w, size_t row_bytes,
     }
 }
 
+// ---------------------------------------------------------------- decode once, apply to every column
+// The kernels above call Fmt<TY>::dot once per (call, column): each column re-reads the weight words and redoes
+// the grid lookups and sign unpacking.  Here each dot is split, as native_mmvq.cu's multi-column traits are, into
+// `load` (everything that depends only on the weight: the signed grid words, the integer scales, the fp16 block
+// scale as a float) and `apply` (the activation loads, the dp4a chain in the same order, the same integer scale
+// step and the same float expression).  `apply(load(...))` does the dot's integer and float operations in the same
+// order on the same values, so a column of the kernels below is BITWISE equal to the same column of mmvq_kernel /
+// native_gu_kernel / native_down_kernel (iq_multi_parity checks it; STRATA_OLD_IQ_MMVQ=1 keeps the old kernels).
+template<int TY> struct Split;
+// Formats with a Split below take the decode-once kernels; the others (Q4_K, Q5_K, Q5_1, Q8_0: UD-Q4_K_XL) the
+// per-entry ones, which call Fmt<TY>::dot per column exactly as before #242 (the launchers test kSplit at compile
+// time, so the multi kernels are never instantiated for a type without a Split).
+template<int TY> inline constexpr bool kSplit = false;
+template<> inline constexpr bool kSplit<16> = true;
+template<> struct Split<16> {   // IQ2_XXS
+    struct W { int g[8]; int ls; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq2_xxs* bq2 = (const block_iq2_xxs*) vbq + kbx;
+        const int q2 = get_int_b2(bq2->qs, iqs);
+        const uint8_t* aux8 = (const uint8_t*) &q2;
+        const uint32_t aux32 = get_int_b2(bq2->qs, iqs + 1);
+        W r;
+#pragma unroll
+        for (int k0 = 0; k0 < 8; k0 += 2) {
+            const sycl::uint2 grid_pos =
+                ((const sycl::uint2 *)iq2xxs_grid)[aux8[k0 / 2]];
+            const uint32_t signs = unpack_ksigns(aux32 >> (7 * k0 / 2));
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x08040201, 0, std::not_equal_to<>());
+            r.g[k0 + 0] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.x() ^ signs0, signs0, std::minus<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x80402010, 0, std::not_equal_to<>());
+            r.g[k0 + 1] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        r.ls = aux32 >> 27 | 1;
+        r.dw = sycl::vec<sycl::half, 1>(bq2->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 8; ++j) sumi = ggml_cuda_dp4a(r.g[j], get_int_b4(bq8_1[iqs / 2].qs, j), sumi);
+        sumi = sumi * r.ls / 8;
+        const float d = r.dw * bq8_1[iqs / 2].ds[0];
+        return d * sumi;
+    }
+};
+// IQ2_XS and IQ2_S share the apply: two half sums, two 4-bit scales
+struct SplitLs2 {
+    struct W { int g[8]; int ls0, ls1; float dw; };
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi0 = 0, sumi1 = 0;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) sumi0 = ggml_cuda_dp4a(r.g[j], get_int_b4(bq8_1[iqs / 2].qs, j), sumi0);
+#pragma unroll
+        for (int j = 4; j < 8; ++j) sumi1 = ggml_cuda_dp4a(r.g[j], get_int_b4(bq8_1[iqs / 2].qs, j), sumi1);
+        const int sumi = (sumi0 * r.ls0 + sumi1 * r.ls1 + (sumi0 + sumi1) / 2) / 4;
+        const float d = r.dw * bq8_1[iqs / 2].ds[0];
+        return d * sumi;
+    }
+};
+template<> inline constexpr bool kSplit<17> = true;
+template<> struct Split<17> : SplitLs2 {   // IQ2_XS
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
+        const sycl::int2 q2_packed = sycl::int2(get_int_b2(bq2->qs, iqs + 0),
+                                                get_int_b2(bq2->qs, iqs + 1));
+        const uint16_t* q2 = (const uint16_t*) &q2_packed;
+        W r;
+        r.ls0 = bq2->scales[iqs / 2] & 0x0F;
+        r.ls1 = bq2->scales[iqs / 2] >> 4;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const sycl::uint2 grid_pos =
+                ((const sycl::uint2 *)iq2xs_grid)[q2[l0 / 2] & 0x1FF];
+            const uint32_t signs = unpack_ksigns(q2[l0 / 2] >> 9);
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x08040201, 0, std::not_equal_to<>());
+            r.g[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.x() ^ signs0, signs0, std::minus<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x80402010, 0, std::not_equal_to<>());
+            r.g[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        r.dw = sycl::vec<sycl::half, 1>(bq2->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+};
+template<> inline constexpr bool kSplit<22> = true;
+template<> struct Split<22> : SplitLs2 {   // IQ2_S
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
+        const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
+        const uint8_t* qs = (const uint8_t*) &qs_packed;
+        const int qh = bq2->qh[iqs / 2];
+        const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
+        const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+        W r;
+        r.ls0 = bq2->scales[iqs / 2] & 0x0F;
+        r.ls1 = bq2->scales[iqs / 2] >> 4;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+                ((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                    ((signs_packed_8[l0 / 2] & 0x0C) << 21),
+                0x00000000, std::not_equal_to<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+                ((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                    ((signs_packed_8[l0 / 2] & 0xC0) << 17),
+                0x00000000, std::not_equal_to<>());
+            r.g[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos[0] ^ signs0, signs0, std::minus<>());
+            r.g[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos[1] ^ signs1, signs1, std::minus<>());
+        }
+        r.dw = sycl::vec<sycl::half, 1>(bq2->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+};
+template<> inline constexpr bool kSplit<18> = true;
+template<> struct Split<18> {   // IQ3_XXS
+    struct W { int g[8]; int ls; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
+        const sycl::int2 q3_packed =
+            sycl::int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
+        const uint8_t* q3 = (const uint8_t*) &q3_packed;
+        const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+        W r;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const sycl::int2 grid_pos =
+                sycl::int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
+            const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x08040201, 0, std::not_equal_to<>());
+            r.g[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.x() ^ signs0, signs0, std::minus<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+                signs & 0x80402010, 0, std::not_equal_to<>());
+            r.g[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        r.ls = aux32 >> 28;
+        r.dw = sycl::vec<sycl::half, 1>(bq3->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 8; ++j) sumi = ggml_cuda_dp4a(r.g[j], get_int_b4(bq8_1[iqs / 2].qs, j), sumi);
+        sumi = (r.ls * sumi + sumi / 2) / 2;
+        const float d = r.dw * bq8_1[iqs / 2].ds[0];
+        return d * sumi;
+    }
+};
+template<> inline constexpr bool kSplit<21> = true;
+template<> struct Split<21> {   // IQ3_S
+    struct W { int g[8]; int ls; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
+        const sycl::int2 qs_packed = sycl::int2(get_int_b2(bq3->qs, iqs + 0),
+                                                get_int_b2(bq3->qs, iqs + 1));
+        const uint8_t* qs = (const uint8_t*) &qs_packed;
+        const int qh = bq3->qh[iqs / 2];
+        const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
+        const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+        W r;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const sycl::int2 grid_pos =
+                sycl::int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                           iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+            const int signs0 = dpct::vectorized_binary<sycl::uchar4>(
+                ((signs_packed_8[l0 / 2] & 0x03) << 7) |
+                    ((signs_packed_8[l0 / 2] & 0x0C) << 21),
+                0x00000000, std::not_equal_to<>());
+            const int signs1 = dpct::vectorized_binary<sycl::uchar4>(
+                ((signs_packed_8[l0 / 2] & 0x30) << 3) |
+                    ((signs_packed_8[l0 / 2] & 0xC0) << 17),
+                0x00000000, std::not_equal_to<>());
+            r.g[l0 + 0] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.x() ^ signs0, signs0, std::minus<>());
+            r.g[l0 + 1] = dpct::vectorized_binary<sycl::uchar4>(
+                grid_pos.y() ^ signs1, signs1, std::minus<>());
+        }
+        r.ls = 1 + 2 * ((bq3->scales[iqs / 4] >> ((iqs << 1) & 0x04)) & 0x0F);
+        r.dw = sycl::vec<sycl::half, 1>(bq3->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 8; ++j) sumi = ggml_cuda_dp4a(r.g[j], get_int_b4(bq8_1[iqs / 2].qs, j), sumi);
+        sumi *= r.ls;
+        const float d = r.dw * bq8_1[iqs / 2].ds[0];
+        return d * sumi;
+    }
+};
+template<> inline constexpr bool kSplit<29> = true;
+template<> struct Split<29> {   // IQ1_M
+    struct W { int g[8]; float delta[4]; int sc0, sc1; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq1_m* bq1 = (const block_iq1_m*) vbq + kbx;
+        const int qs_packed = get_int_b4(bq1->qs, iqs);
+        const uint8_t* qs = (const uint8_t*) &qs_packed;
+        W r;
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const int qhl = bq1->qh[2 * iqs + l0 / 4] >> (4 * ((l0 / 2) % 2));
+            const int grid = iq1s_grid_gpu[qs[l0 / 2] | ((qhl & 0x07) << 8)];
+            r.g[l0 + 0] = (grid >> 0) & 0x0F0F0F0F;
+            r.g[l0 + 1] = (grid >> 4) & 0x0F0F0F0F;
+            r.delta[l0 / 2] = -1.0f + IQ1M_DELTA - (qhl & 0x08) * (2.0f * IQ1M_DELTA / 0x08);
+        }
+        const uint16_t* sc = (const uint16_t*) bq1->scales;
+        iq1m_scale_t scale;
+        scale.u16 = (sc[0] >> 12) | ((sc[1] >> 8) & 0x00F0) | ((sc[2] >> 4) & 0x0F00) | (sc[3] & 0xF000);
+        r.dw = sycl::vec<sycl::half, 1>(scale.f16)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        const int tmp = sc[iqs / 2] >> (6 * (iqs % 2));
+        r.sc0 = 2 * ((tmp >> 0) & 0x07) + 1;
+        r.sc1 = 2 * ((tmp >> 3) & 0x07) + 1;
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi[2] = {0, 0};
+        float sumf[2] = {0.0f, 0.0f};
+#pragma unroll
+        for (int l0 = 0; l0 < 8; l0 += 2) {
+            const int u0 = get_int_b4(bq8_1[iqs].qs, l0 + 0);
+            const int u1 = get_int_b4(bq8_1[iqs].qs, l0 + 1);
+            sumi[l0 / 4] = ggml_cuda_dp4a(r.g[l0 + 0], u0, sumi[l0 / 4]);
+            sumi[l0 / 4] = ggml_cuda_dp4a(r.g[l0 + 1], u1, sumi[l0 / 4]);
+            int sumy = 0;
+            sumy = ggml_cuda_dp4a(u0, 0x01010101, sumy);
+            sumy = ggml_cuda_dp4a(u1, 0x01010101, sumy);
+            sumf[l0 / 4] += r.delta[l0 / 2] * sumy;
+        }
+        const float d = r.dw * bq8_1[iqs].ds[0];
+        return d * ((sumi[0] + sumf[0]) * r.sc0 + (sumi[1] + sumf[1]) * r.sc1);
+    }
+};
+template<> inline constexpr bool kSplit<20> = true;
+template<> struct Split<20> {   // IQ4_NL
+    struct W { sycl::int2 v[2]; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
+        W r;
+#pragma unroll
+        for (int l = 0; l < 2; ++l) r.v[l] = iq4nl_pair(get_int_b2(bq4->qs, iqs + l));   // SYCL port: = get_int_from_table_16(q)
+        r.dw = sycl::vec<sycl::half, 1>(bq4->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        const int* q8 = (const int*) bq8_1->qs + iqs;
+        int sumi = 0;
+#pragma unroll
+        for (int l = 0; l < 2; ++l) {
+            sumi = ggml_cuda_dp4a(r.v[l].x(), q8[l + 0], sumi);
+            sumi = ggml_cuda_dp4a(r.v[l].y(), q8[l + 4], sumi);
+        }
+        const float d = r.dw * bq8_1->ds[0];
+        return d * sumi;
+    }
+};
+template<> inline constexpr bool kSplit<23> = true;
+template<> struct Split<23> {   // IQ4_XS
+    struct W { sycl::int2 v[4]; int ls; float dw; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_iq4_xs* bq4 = (const block_iq4_xs*) vbq + kbx;
+        W r;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) r.v[j] = iq4nl_pair(get_int_b4(bq4->qs, iqs + j));   // SYCL port: = get_int_from_table_16(q)
+        r.ls = ((bq4->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0F) | (((bq4->scales_h >> (iqs / 2)) & 0x03) << 4);
+        r.dw = sycl::vec<sycl::half, 1>(bq4->d)
+                   .convert<float, sycl::rounding_mode::automatic>()[0];
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int u0 = get_int_b4(bq8_1[iqs / 4].qs, j + 0);
+            const int u1 = get_int_b4(bq8_1[iqs / 4].qs, j + 4);
+            sumi = ggml_cuda_dp4a(r.v[j].x(), u0, sumi);
+            sumi = ggml_cuda_dp4a(r.v[j].y(), u1, sumi);
+        }
+        sumi *= r.ls - 32;
+        const float d = r.dw * bq8_1[iqs / 4].ds[0];
+        return d * sumi;
+    }
+};
+template<> inline constexpr bool kSplit<42> = true;
+template<> struct Split<42> {   // Q2_0
+    struct W { int qx[4], qy[4]; float d2; };
+    static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+        const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
+        W r;
+        r.d2 = bq2_0->d;
+        const int16_t* qs = (const int16_t*) bq2_0->qs + iqs * 4;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int q = qs[j];
+            const int qe =
+                dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 0);
+            const int qo =
+                dpct::byte_level_permute(0x020100FF, 0x020100FF, q >> 2);
+            r.qx[j] = dpct::byte_level_permute(qe, qo, 0x5140);
+            r.qy[j] = dpct::byte_level_permute(qe, qo, 0x7362);
+        }
+        return r;
+    }
+    static float apply(const W& r, const block_q8_1* __restrict__ bq8_1, int iqs) {
+        const block_q8_1* bq8_1_chunk = bq8_1 + iqs;
+        int sumi = 0;
+#pragma unroll
+        for (int j = 0; j < 4; ++j) {
+            const int u = get_int_b4(bq8_1_chunk->qs, j * 2 + 0);
+            const int v = get_int_b4(bq8_1_chunk->qs, j * 2 + 1);
+            sumi = ggml_cuda_dp4a(u, r.qx[j], sumi);
+            sumi = ggml_cuda_dp4a(v, r.qy[j], sumi);
+        }
+        const float d8 = bq8_1_chunk->ds[0];
+        return r.d2 * d8 * sumi;
+    }
+};
+
+// One row against the n <= NC activations x + off[0..n) (n >= 1, warp-uniform; offsets in q8_1 blocks, 32-bit to
+// spare registers), the whole warp.  Per activation this is row_dot: the same calls k, lane-strided the same way,
+// summed in the same order, then the same warp_sum.  Only the weight side moves out of the per-activation loop.
+template <int TY, int NC>
+__dpct_inline__ void row_dot_multi(const uint8_t *row, const block_q8_1 *x,
+                                   const int (&off)[NC], int n, int nb,
+                                   int lane, float (&s)[NC]) {
+    using F = Fmt<TY>;
+    using S = Split<TY>;
+#pragma unroll
+    for (int c = 0; c < NC; ++c) s[c] = 0.0f;
+    for (int k = lane; k < nb * F::ipb; k += 32) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        /*
+        DPCT1084: The function call "Split::load" has multiple migration
+        results in different template instantiations that could not be unified.
+        You may need to adjust the code.
+        */
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+    }
+#pragma unroll
+    for (int c = 0; c < NC; ++c)
+        if (c < n) s[c] = warp_sum(s[c]);
+}
+
+// mmvq_kernel with the columns taken NC at a time.  After warp_sum every lane holds the same sum, so lane c stores
+// column c.
+template <int TY, int NC>
+__dpct_inline__ void
+mmvq_multi_kernel(const uint8_t *__restrict__ w, size_t row_bytes,
+                  const block_q8_1 *__restrict__ x, float *__restrict__ y,
+                  int n_in, int n_out, int ncols) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int row = item_ct1.get_group(2) * 4 + item_ct1.get_local_id(1);
+    if (row >= n_out) return;
+    const int lane = item_ct1.get_local_id(2);
+    const int nb = n_in / Fmt<TY>::qk, xb = n_in / 32;
+    const uint8_t* wr = w + (size_t) row * row_bytes;
+    for (int c0 = 0; c0 < ncols; c0 += NC) {
+        const int n = sycl::min(NC, ncols - c0);
+        int off[NC];
+#pragma unroll
+        for (int c = 0; c < NC; ++c) off[c] = (c0 + sycl::min(c, n - 1)) * xb;
+        float s[NC];
+        row_dot_multi<TY, NC>(wr, x, off, n, nb, lane, s);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (c < n && lane == c) y[(size_t) (c0 + c) * n_out + row] = s[c];
+    }
+}
+
 // ---------------------------------------------------------------- grouped native experts
 
 // ---------------------------------------------------------------- SYCL port: multi-entry dots
@@ -758,7 +1329,7 @@ __dpct_inline__ void row_entries(const uint8_t* wr, const block_q8_1* x, int x_s
 
 constexpr int GU_ROWS = 8;     // rows per block (one warp each)
 
-template <int TG>
+template <int TG, int LN = kExpertLanes>
 __dpct_inline__ void native_gu_kernel(
     const unsigned long long *__restrict__ grp_ptr,
     const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
@@ -782,9 +1353,36 @@ __dpct_inline__ void native_gu_kernel(
         grid = &sg[0];
     }
 #endif
-    const int rib = item_ct1.get_local_id(2) / kExpertLanes,
-              sub = item_ct1.get_local_id(2) % kExpertLanes;
-    const int row = item_ct1.get_group(2) * kExpertRows + rib; // 0 .. 2*n_ff
+    const int rib = item_ct1.get_local_id(2) / LN,
+              sub = item_ct1.get_local_id(2) % LN;
+    const int row = item_ct1.get_group(2) * (256 / LN) + rib; // 0 .. 2*n_ff
+    if (row >= 2 * L.n_ff) return;
+    const bool is_up = row >= L.n_ff;
+    const int r = is_up ? row - (int) L.n_ff : row;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
+    const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    row_entries<TG, LN>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff, grid);
+}
+
+// native_gu_kernel with the group's entries taken GRP_NC at a time, each weight part decoded once per pass.
+// A group has at most one entry per token of the window (kVerifyMaxT = 8; setup writes --spec 4, and a split window
+// has halves of <= 4), so 4 takes such windows in one pass; 8 would take ~64-80 registers against ~48 (ptxas -v).
+constexpr int GRP_NC = 4;
+
+template <int TG>
+__dpct_inline__ void native_gu_multi_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_tok, const block_q8_1 *__restrict__ xq,
+    NativeExpertLayout L, float *__restrict__ gate, float *__restrict__ up) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int warp = item_ct1.get_local_id(2) >> 5,
+              lane = item_ct1.get_local_id(2) & 31;
+    const int row = item_ct1.get_group(2) * GU_ROWS + warp; // 0 .. 2*n_ff
     if (row >= 2 * L.n_ff) return;
     const bool is_up = row >= L.n_ff;
     const int r = is_up ? row - (int) L.n_ff : row;
@@ -792,7 +1390,19 @@ __dpct_inline__ void native_gu_kernel(
     const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
     const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    row_entries<TG, kExpertLanes>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff, grid);
+    float* dst = is_up ? up : gate;
+    for (int e = e0; e < e1; e += GRP_NC) {
+        const int n = sycl::min(GRP_NC, e1 - e);
+        int off[GRP_NC];
+#pragma unroll
+        for (int c = 0; c < GRP_NC; ++c)
+            off[c] = ent_tok[e + sycl::min(c, n - 1)] * xb;
+        float s[GRP_NC];
+        row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s);
+#pragma unroll
+        for (int c = 0; c < GRP_NC; ++c)
+            if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
+    }
 }
 
 __dpct_inline__ void swiglu_entries_kernel(const float *__restrict__ gate,
@@ -807,7 +1417,7 @@ __dpct_inline__ void swiglu_entries_kernel(const float *__restrict__ gate,
     h[i] = (g / (1.0f + sycl::native::exp(-g))) * up[i];
 }
 
-template <int TD>
+template <int TD, int LN = kExpertLanes>
 __dpct_inline__ void native_down_kernel(
     const unsigned long long *__restrict__ grp_ptr,
     const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
@@ -816,9 +1426,9 @@ __dpct_inline__ void native_down_kernel(
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int g = item_ct1.get_group(1);
     if (g >= *n_groups) return;
-    const int rib = item_ct1.get_local_id(2) / kExpertLanes,
-              sub = item_ct1.get_local_id(2) % kExpertLanes;
-    const int r = item_ct1.get_group(2) * kExpertRows + rib;
+    const int rib = item_ct1.get_local_id(2) / LN,
+              sub = item_ct1.get_local_id(2) % LN;
+    const int r = item_ct1.get_group(2) * (256 / LN) + rib;
     if (r >= L.n_embd) return;
     const uint8_t* blob = (const uint8_t*) grp_ptr[g];
     const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
@@ -831,7 +1441,7 @@ __dpct_inline__ void native_down_kernel(
             for (; e + 4 <= e1; e += 4) {
                 const block_q8_1* xs[4] = {hq + (size_t) e * hb, hq + (size_t) (e + 1) * hb, hq + (size_t) (e + 2) * hb, hq + (size_t) (e + 3) * hb};
                 float o[4];
-                row_dot_multi<TD, kExpertLanes, 4>(wr, xs, nb, sub, o);
+                row_dot_multi<TD, LN, 4>(wr, xs, nb, sub, o);
                 if (sub == 0)
 #pragma unroll
                     for (int i = 0; i < 4; ++i) out[(size_t) ent_dst[e + i] * L.n_embd + r] = o[i];
@@ -839,18 +1449,50 @@ __dpct_inline__ void native_down_kernel(
             if (e + 2 <= e1) {
                 const block_q8_1* xs[2] = {hq + (size_t) e * hb, hq + (size_t) (e + 1) * hb};
                 float o[2];
-                row_dot_multi<TD, kExpertLanes, 2>(wr, xs, nb, sub, o);
+                row_dot_multi<TD, LN, 2>(wr, xs, nb, sub, o);
                 if (sub == 0) { out[(size_t) ent_dst[e] * L.n_embd + r] = o[0]; out[(size_t) ent_dst[e + 1] * L.n_embd + r] = o[1]; }
                 e += 2;
             }
         }
         for (; e < e1; ++e) {
-            const float v = row_dot_lanes<TD, kExpertLanes>(wr, hq + (size_t) e * hb, nb, sub);
+            const float v = row_dot_lanes<TD, LN>(wr, hq + (size_t) e * hb, nb, sub);
             if (sub == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = v;
         }
     }
 }
 
+// native_down_kernel with the entries taken GRP_NC at a time
+template <int TD>
+__dpct_inline__ void native_down_multi_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_dst, const block_q8_1 *__restrict__ hq,
+    NativeExpertLayout L, float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int warp = item_ct1.get_local_id(2) >> 5,
+              lane = item_ct1.get_local_id(2) & 31;
+    const int r = item_ct1.get_group(2) * 8 + warp;
+    if (r >= L.n_embd) return;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
+    const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    for (int e = e0; e < e1; e += GRP_NC) {
+        const int n = sycl::min(GRP_NC, e1 - e);
+        int off[GRP_NC];
+#pragma unroll
+        for (int c = 0; c < GRP_NC; ++c)
+            off[c] = (e + sycl::min(c, n - 1)) * hb;
+        float s[GRP_NC];
+        row_dot_multi<TD, GRP_NC>(wr, hq, off, n, nb, lane, s);
+#pragma unroll
+        for (int c = 0; c < GRP_NC; ++c)
+            if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+    }
+}
+
 // ---------------------------------------------------------------- q8_1 (quantize.cu)
 __dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
                                           block_q8_1 *__restrict__ y,
@@ -1089,6 +1731,92 @@ inline void dq_q2_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     store_run<dst_t, 8>(yy + b * 64 + part * 8, v);
 }
 
+// llama.cpp's dequantize_q4_K / dequantize_q5_K (dequantize.cuh; q5_K's 64 threads folded onto 32) and the 32-value
+// blocks of Q5_1 / Q8_0, 8 of them per 256-value "superblock" (thread tid writes 8 values of block tid % 8).
+__dpct_inline__ void get_scale_min_k4(int j, const uint8_t *q, uint8_t &d,
+                                      uint8_t &m) {
+    if (j < 4) {
+        d = q[j] & 63; m = q[j + 4] & 63;
+    } else {
+        d = (q[j + 4] & 0xF) | ((q[j - 4] >> 6) << 4);
+        m = (q[j + 4] >> 4) | ((q[j - 0] >> 6) << 4);
+    }
+}
+template <typename dst_t>
+inline void dq_q4_k(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_q4_K* x = (const block_q4_K*) vx;
+    const int64_t il = tid / 8, ir = tid % 8, is = 2 * il;
+    const int n = 4;
+    dst_t* y = yy + 64 * il + n * ir;
+    const float dall = x[ibs].dm[0];
+    const float dmin = x[ibs].dm[1];
+    const uint8_t* q = x[ibs].qs + 32 * il + n * ir;
+    uint8_t sc, m;
+    get_scale_min_k4((int) is + 0, x[ibs].scales, sc, m);
+    const float d1 = dall * sc, m1 = dmin * m;
+    get_scale_min_k4((int) is + 1, x[ibs].scales, sc, m);
+    const float d2 = dall * sc, m2 = dmin * m;
+#pragma unroll
+    for (int l = 0; l < n; ++l) {
+        y[l + 0] = cvt<dst_t>(d1 * (q[l] & 0xF) - m1);
+        y[l + 32] = cvt<dst_t>(d2 * (q[l] >> 4) - m2);
+    }
+}
+template <typename dst_t>
+inline void dq_q5_k(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_q5_K* x = (const block_q5_K*) vx;
+    for (int tt = tid; tt < 64; tt += 32) {
+        const int il = tt / 16, ir = tt % 16, is = 2 * il;
+        dst_t* y = yy + 64 * il + 2 * ir;
+        const float dall = x[ibs].dm[0];
+        const float dmin = x[ibs].dm[1];
+        const uint8_t* ql = x[ibs].qs + 32 * il + 2 * ir;
+        const uint8_t* qh = x[ibs].qh + 2 * ir;
+        uint8_t sc, m;
+        get_scale_min_k4(is + 0, x[ibs].scales, sc, m);
+        const float d1 = dall * sc, m1 = dmin * m;
+        get_scale_min_k4(is + 1, x[ibs].scales, sc, m);
+        const float d2 = dall * sc, m2 = dmin * m;
+        uint8_t hm = (uint8_t) (1 << (2 * il));
+        y[0] = cvt<dst_t>(d1 * ((ql[0] & 0xF) + (qh[0] & hm ? 16 : 0)) - m1);
+        y[1] = cvt<dst_t>(d1 * ((ql[1] & 0xF) + (qh[1] & hm ? 16 : 0)) - m1);
+        hm <<= 1;
+        y[32] = cvt<dst_t>(d2 * ((ql[0] >> 4) + (qh[0] & hm ? 16 : 0)) - m2);
+        y[33] = cvt<dst_t>(d2 * ((ql[1] >> 4) + (qh[1] & hm ? 16 : 0)) - m2);
+    }
+}
+template <typename dst_t>
+inline void dq_q5_1(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_q5_1* x = (const block_q5_1*) vx + ibs * (QK_K / QK5_1);
+    const int ib = tid % 8, il = tid / 8;
+    const sycl::float2 dm =
+        (x[ib].dm).template convert<float, sycl::rounding_mode::automatic>();
+    uint32_t qh;
+    memcpy(&qh, x[ib].qh, sizeof(qh));
+    dst_t* y = yy + 32 * ib;
+    for (int j = 0; j < 4; ++j) {
+        const int iqs = 4 * il + j;                   // llama.cpp's dequantize_q5_1 for value pairs iqs, iqs + 16
+        const int xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
+        const int xh_1 = ((qh >> (iqs + 12))) & 0x10;
+        y[iqs] =
+            cvt<dst_t>((float)((x[ib].qs[iqs] & 0xf) | xh_0) * dm.x() + dm.y());
+        y[iqs + 16] =
+            cvt<dst_t>((float)((x[ib].qs[iqs] >> 4) | xh_1) * dm.x() + dm.y());
+    }
+}
+template <typename dst_t>
+inline void dq_q8_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const block_q8_0* x = (const block_q8_0*) vx + ibs * (QK_K / QK8_0);
+    const int ib = tid % 8, il = tid / 8;
+    const float d = sycl::vec<sycl::half, 1>(x[ib].d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0];
+    dst_t* y = yy + 32 * ib + 8 * il;
+#pragma unroll
+    for (int j = 0; j < 8; ++j)
+        y[j] = cvt<dst_t>((float)x[ib].qs[8 * il + j] * d);
+}
+
+// Every type below must also be in is_iq(): the host entry points refuse the others, so the default is unreachable.
 template <typename dst_t>
 __dpct_inline__ void
 dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
@@ -1106,6 +1834,10 @@ dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
         case 23: dq_iq4_xs(vx, ibs, y, tid); break;
         case 11: dq_q3_k(vx, ibs, y, tid); break;
         case 42: dq_q2_0(vx, ibs, y, tid); break;
+        case 12: dq_q4_k(vx, ibs, y, tid); break;
+        case 13: dq_q5_k(vx, ibs, y, tid); break;
+        case 7: dq_q5_1(vx, ibs, y, tid); break;
+        case 8: dq_q8_0(vx, ibs, y, tid); break;
         default: break;
     }
 }
@@ -1131,246 +1863,365 @@ __dpct_inline__ void dequant_gu_kernel(
                             item_ct1.get_local_id(2));
 }
 
-bool is_iq(int t) { return t == 16 || t == 17 || t == 18 || t == 20 || t == 21 || t == 22 || t == 23 || t == 29 || t == 42 || t == 11; }
-
-}  // namespace
-
-bool iq_supported(int t) noexcept { return is_iq(t); }
-
-size_t iq_row_bytes(int t, int64_t n) noexcept {
+// the types dq_dispatch dequantizes
+bool is_iq(int t) {
+    return t == 16 || t == 17 || t == 18 || t == 20 || t == 21 || t == 22 || t == 23 || t == 29 || t == 42 || t == 11 ||
+           t == 12 || t == 13 || t == 7 || t == 8;
+}
+// values per block of the types the grouped expert kernels take (0 = none)
+int gu_qk(int t) {
     switch (t) {
-        case 16: return (size_t) (n / 256) * sizeof(block_iq2_xxs);
-        case 17: return (size_t) (n / 256) * sizeof(block_iq2_xs);
-        case 18: return (size_t) (n / 256) * sizeof(block_iq3_xxs);
-        case 20: return (size_t) (n / 32) * sizeof(block_iq4_nl);
-        case 21: return (size_t) (n / 256) * sizeof(block_iq3_s);
-        case 22: return (size_t) (n / 256) * sizeof(block_iq2_s);
-        case 29: return (size_t) (n / 256) * sizeof(block_iq1_m);
-        case 23: return (size_t) (n / 256) * sizeof(block_iq4_xs);
-        case 11: return (size_t) (n / 256) * sizeof(block_q3_K);
-        case 42: return (size_t) (n / 64) * sizeof(block_q2_0);
+#define STRATA_QK(T) case T: return Fmt<T>::qk;
+        STRATA_GU_FMTS(STRATA_QK)
+#undef STRATA_QK
         default: return 0;
     }
 }
-
-void quantize_q8_1_rows(const float* x, int64_t n_rows, int64_t n_cols, void* y, void* stream) {
-    const long long n = (long long) n_rows * n_cols;
-    if (n <= 0) return;
-    {
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        strata::q_of(stream)
-            ->parallel_for<dpct_kernel_name<class quantize_q8_1_kernel_a566ca>>(
-                sycl::nd_range<3>(
-                    sycl::range(1, 1, (unsigned)((n + 255) / 256)) *
-                        sycl::range(1, 1, 256),
-                    sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        quantize_q8_1_kernel(x, (block_q8_1 *)y, n);
-                    });
+int d_qk(int t) {
+    switch (t) {
+#define STRATA_QK(T) case T: return Fmt<T>::qk;
+        STRATA_D_FMTS(STRATA_QK)
+#undef STRATA_QK
+        default: return 0;
     }
-    check("quantize_q8_1_rows");
 }
 
-void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+bool env_on(const char* name) {
+    const char* v = std::getenv(name);
+    return v != nullptr && v[0] != '\0' && v[0] != '0';
+}
+// STRATA_OLD_IQ_MMVQ=1 keeps the per-column kernels (bitwise equal to the new ones; kept for A/B timing)
+bool g_old_kernels = env_on("STRATA_OLD_IQ_MMVQ");
+// SYCL port (0.1.31 merge): upstream sends the split formats (the i-quants) to native_gu/down_multi_kernel, one warp
+// per row, 8 rows a group. On the B70 the port's grouped kernels (8 lanes a row, 32 rows a group, the multi-entry
+// dots with aligned loads and the IQ4 codebook in registers) are the measured ones, so they stay the default for
+// every format; STRATA_EXPERT_SPLIT=1 takes upstream's multi kernels, launched with their own grid (GU_ROWS rows).
+bool g_split_multi = env_on("STRATA_EXPERT_SPLIT");
+
+template <int TY>
+void launch_mmvq(const uint8_t *W, size_t rb, const block_q8_1 *X, float *y,
+                 int n_in, int n_out, int ncols, dpct::queue_ptr s) {
     const dpct::dim3 grid((unsigned)((n_out + 3) / 4)), block(32, 4);
-    const size_t rb = iq_row_bytes(t, n_in);
-    dpct::queue_ptr s = strata::q_of(stream);
-    const auto* W = (const uint8_t*) w;
-    const auto* X = (const block_q8_1*) x_q8_1;
-    switch (t) {
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 16: {
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    if constexpr (!kSplit<TY>) {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_2769e1,
-                                              dpct_kernel_scalar<16>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_87549a,
+                                              dpct_kernel_scalar<TY>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<16>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_kernel<TY>(W, rb, X, y, n_in, n_out, ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 17: {
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    else if (g_old_kernels) {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_4ee329,
-                                              dpct_kernel_scalar<17>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_f617b1,
+                                              dpct_kernel_scalar<TY>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<17>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_kernel<TY>(W, rb, X, y, n_in, n_out, ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 18: {
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    else if (ncols <= 1) {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_34dcfe,
-                                              dpct_kernel_scalar<18>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_multi_kernel_77d6d0,
+                                              dpct_kernel_scalar<TY>,
+                                              dpct_kernel_scalar<1>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<18>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_multi_kernel<TY, 1>(W, rb, X, y, n_in, n_out,
+                                                 ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 20: {
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    else if (ncols == 2) {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_dfe57c,
-                                              dpct_kernel_scalar<20>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_multi_kernel_7ba01c,
+                                              dpct_kernel_scalar<TY>,
+                                              dpct_kernel_scalar<2>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<20>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_multi_kernel<TY, 2>(W, rb, X, y, n_in, n_out,
+                                                 ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 21: {
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    else if (ncols <= 4) {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_9d8f61,
-                                              dpct_kernel_scalar<21>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_multi_kernel_6fd6d9,
+                                              dpct_kernel_scalar<TY>,
+                                              dpct_kernel_scalar<4>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<21>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_multi_kernel<TY, 4>(W, rb, X, y, n_in, n_out,
+                                                 ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 22: {
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    else {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_979367,
-                                              dpct_kernel_scalar<22>>>(
+            cgh.parallel_for<dpct_kernel_name<class mmvq_multi_kernel_6e0f6e,
+                                              dpct_kernel_scalar<TY>,
+                                              dpct_kernel_scalar<8>>>(
                 sycl::nd_range<3>(grid * block, block), exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<22>(W, rb, X, y, n_in, n_out, ncols);
+                        mmvq_multi_kernel<TY, 8>(W, rb, X, y, n_in, n_out,
+                                                 ncols);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 23: {
+    } // 8 at a time past 8
+}
+
+// SYCL port: lanes per row of the port's grouped expert kernels at run time (STRATA_GU_LANES / STRATA_DOWN_LANES:
+// 4, 8, 16 or 32; default STRATA_EXPERT_LANES), 256 / lanes rows per work-group. Gate/up rows are 80 dot calls
+// (2560 wide), the IQ4_NL down rows 40 (640 wide), so the best split can differ by role.
+inline int lanes_env(const char* name) {
+    const char* v = std::getenv(name);
+    const int n = v ? std::atoi(v) : kExpertLanes;
+    return n == 4 || n == 8 || n == 16 || n == 32 ? n : kExpertLanes;
+}
+inline int gu_lanes() { static const int v = lanes_env("STRATA_GU_LANES"); return v; }
+inline int down_lanes() { static const int v = lanes_env("STRATA_DOWN_LANES"); return v; }
+template <int TG, int LN>
+void launch_gu_port(unsigned groups, dpct::queue_ptr s, const unsigned long long *grp_ptr, const int32_t *grp_start,
+                    const int32_t *n_groups, const int32_t *ent_tok, const block_q8_1 *X,
+                    const NativeExpertLayout &L, float *gate, float *up) {
+    constexpr int ROWS = 256 / LN;
+    const unsigned gx = (unsigned) ((2 * L.n_ff + ROWS - 1) / ROWS);
+    auto exp_props = sycl::ext::oneapi::experimental::properties{sycl::ext::oneapi::experimental::use_root_sync};
+    s->parallel_for<dpct_kernel_name<class native_gu_port, dpct_kernel_scalar<TG>, dpct_kernel_scalar<LN>>>(
+        sycl::nd_range<3>(sycl::range<3>(1, groups, (size_t) gx * 256), sycl::range<3>(1, 1, 256)), exp_props,
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] {
+            native_gu_kernel<TG, LN>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+        });
+}
+template <int TG>
+void launch_gu_lanes(dpct::dim3 grid, dpct::queue_ptr s, const unsigned long long *grp_ptr, const int32_t *grp_start,
+                     const int32_t *n_groups, const int32_t *ent_tok, const block_q8_1 *X,
+                     const NativeExpertLayout &L, float *gate, float *up) {
+    switch (gu_lanes()) {
+        case 4: launch_gu_port<TG, 4>(grid.y, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+        case 16: launch_gu_port<TG, 16>(grid.y, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+        case 32: launch_gu_port<TG, 32>(grid.y, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+        default: launch_gu_port<TG, 8>(grid.y, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+    }
+}
+template <int TD, int LN>
+void launch_down_port(unsigned groups, dpct::queue_ptr s, const unsigned long long *grp_ptr, const int32_t *grp_start,
+                      const int32_t *n_groups, const int32_t *ent_dst, const block_q8_1 *hq,
+                      const NativeExpertLayout &L, float *out) {
+    constexpr int ROWS = 256 / LN;
+    const unsigned gx = (unsigned) ((L.n_embd + ROWS - 1) / ROWS);
+    auto exp_props = sycl::ext::oneapi::experimental::properties{sycl::ext::oneapi::experimental::use_root_sync};
+    s->parallel_for<dpct_kernel_name<class native_down_port, dpct_kernel_scalar<TD>, dpct_kernel_scalar<LN>>>(
+        sycl::nd_range<3>(sycl::range<3>(1, groups, (size_t) gx * 256), sycl::range<3>(1, 1, 256)), exp_props,
+        [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] {
+            native_down_kernel<TD, LN>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out);
+        });
+}
+template <int TD>
+void launch_down_lanes(dpct::dim3 grid, dpct::queue_ptr s, const unsigned long long *grp_ptr, const int32_t *grp_start,
+                       const int32_t *n_groups, const int32_t *ent_dst, const block_q8_1 *hq,
+                       const NativeExpertLayout &L, float *out) {
+    switch (down_lanes()) {
+        case 4: launch_down_port<TD, 4>(grid.y, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+        case 16: launch_down_port<TD, 16>(grid.y, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+        case 32: launch_down_port<TD, 32>(grid.y, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+        default: launch_down_port<TD, 8>(grid.y, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+    }
+}
+
+template <int TG>
+void launch_gu(dpct::dim3 grid, dpct::queue_ptr s,
+               const unsigned long long *grp_ptr, const int32_t *grp_start,
+               const int32_t *n_groups, const int32_t *ent_tok,
+               const block_q8_1 *X, const NativeExpertLayout &L, float *gate,
+               float *up) {
+    if constexpr (!kSplit<TG>) {
+
+        launch_gu_lanes<TG>(grid, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+    } else if (g_old_kernels || !g_split_multi) {
+
+        launch_gu_lanes<TG>(grid, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+    } else {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_15e579,
-                                              dpct_kernel_scalar<23>>>(
-                sycl::nd_range<3>(grid * block, block), exp_props,
+            cgh.parallel_for<dpct_kernel_name<
+                class native_gu_multi_kernel_37f479, dpct_kernel_scalar<TG>>>(
+                sycl::nd_range<3>(dpct::dim3((unsigned) ((2 * L.n_ff + GU_ROWS - 1) / GU_ROWS), grid.y) * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<23>(W, rb, X, y, n_in, n_out, ncols);
+                        native_gu_multi_kernel<TG>(grp_ptr, grp_start, n_groups,
+                                                   ent_tok, X, L, gate, up);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 29: {
+    }
+}
+
+template <int TD>
+void launch_down(dpct::dim3 grid, dpct::queue_ptr s,
+                 const unsigned long long *grp_ptr, const int32_t *grp_start,
+                 const int32_t *n_groups, const int32_t *ent_dst,
+                 const block_q8_1 *hq, const NativeExpertLayout &L,
+                 float *out) {
+    if constexpr (!kSplit<TD>) {
+
+        launch_down_lanes<TD>(grid, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out);
+    } else if (g_old_kernels || !g_split_multi) {
+
+        launch_down_lanes<TD>(grid, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out);
+    } else {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         s->submit([&](sycl::handler &cgh) {
 
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_bc4076,
-                                              dpct_kernel_scalar<29>>>(
-                sycl::nd_range<3>(grid * block, block), exp_props,
+            cgh.parallel_for<dpct_kernel_name<
+                class native_down_multi_kernel_490cef, dpct_kernel_scalar<TD>>>(
+                sycl::nd_range<3>(dpct::dim3((unsigned) ((L.n_embd + GU_ROWS - 1) / GU_ROWS), grid.y) * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<29>(W, rb, X, y, n_in, n_out, ncols);
+                        native_down_multi_kernel<TD>(grp_ptr, grp_start,
+                                                     n_groups, ent_dst, hq, L,
+                                                     out);
                     });
         });
-    } break;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
-    case 42: {
+    }
+}
+
+}  // namespace
+
+void iq_set_old_kernels(bool old) { g_old_kernels = old; }
+bool iq_old_kernels() { return g_old_kernels; }
+
+bool iq_supported(int t) noexcept { return is_iq(t); }
 
+size_t iq_row_bytes(int t, int64_t n) noexcept {
+    switch (t) {
+        case 16: return (size_t) (n / 256) * sizeof(block_iq2_xxs);
+        case 17: return (size_t) (n / 256) * sizeof(block_iq2_xs);
+        case 18: return (size_t) (n / 256) * sizeof(block_iq3_xxs);
+        case 20: return (size_t) (n / 32) * sizeof(block_iq4_nl);
+        case 21: return (size_t) (n / 256) * sizeof(block_iq3_s);
+        case 22: return (size_t) (n / 256) * sizeof(block_iq2_s);
+        case 29: return (size_t) (n / 256) * sizeof(block_iq1_m);
+        case 23: return (size_t) (n / 256) * sizeof(block_iq4_xs);
+        case 11: return (size_t) (n / 256) * sizeof(block_q3_K);
+        case 42: return (size_t) (n / 64) * sizeof(block_q2_0);
+        case 12: return (size_t) (n / 256) * sizeof(block_q4_K);
+        case 13: return (size_t) (n / 256) * sizeof(block_q5_K);
+        case 7: return (size_t) (n / 32) * sizeof(block_q5_1);
+        case 8: return (size_t) (n / 32) * sizeof(block_q8_0);
+        default: return 0;
+    }
+}
+
+void quantize_q8_1_rows(const float* x, int64_t n_rows, int64_t n_cols, void* y, void* stream) {
+    const long long n = (long long) n_rows * n_cols;
+    if (n <= 0) return;
+    {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class mmvq_kernel_2c3d4c,
-                                              dpct_kernel_scalar<42>>>(
-                sycl::nd_range<3>(grid * block, block), exp_props,
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class quantize_q8_1_kernel_9d62b4>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((n + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        mmvq_kernel<42>(W, rb, X, y, n_in, n_out, ncols);
+                        quantize_q8_1_kernel(x, (block_q8_1 *)y, n);
                     });
-        });
-    } break;
+    }
+    check("quantize_q8_1_rows");
+}
+
+void iq_mmvq(int t, const void* w, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+    const size_t rb = iq_row_bytes(t, n_in);
+    dpct::queue_ptr s = strata::q_of(stream);
+    const auto* W = (const uint8_t*) w;
+    const auto* X = (const block_q8_1*) x_q8_1;
+    switch (t) {
+#define STRATA_MMVQ(T) case T: launch_mmvq<T>(W, rb, X, y, n_in, n_out, ncols, s); break;
+        STRATA_MMVQ_FMTS(STRATA_MMVQ)
+#undef STRATA_MMVQ
         default: std::fprintf(stderr, "iq_mmvq: type %d is not supported\n", t); std::exit(1);
     }
     check("iq_mmvq");
@@ -1475,6 +2326,8 @@ void iq_dequant_f32(int t, const void* src, int64_t n, float* dst, void* stream)
 }
 
 void iq_dequant_gu_f16(int t, const void* gate, const void* up, int64_t n_ff, int64_t n_embd, uint16_t* dst, void* stream) {
+    // checked like the other entry points: an unknown type used to leave `dst` unwritten, a wrong prompt and no error
+    if (n_embd % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_dequant_gu_f16: type %d / %lld\n", t, (long long) n_embd); std::exit(1); }
     const int64_t per_row = n_embd / 256;
     {
 
@@ -1502,6 +2355,12 @@ void iq_dequant_gu_f16(int t, const void* gate, const void* up, int64_t n_ff, in
     check("iq_dequant_gu_f16");
 }
 
+bool native_expert_supported(int gu_type, int d_type, int64_t n_embd, int64_t n_ff) noexcept {
+    const int qg = gu_qk(gu_type), qd = d_qk(d_type);
+    return qg > 0 && qd > 0 && is_iq(gu_type) && is_iq(d_type) && n_embd % qg == 0 && n_ff % qd == 0 &&
+           n_embd % 256 == 0 && (n_ff * n_embd) % 256 == 0;
+}
+
 NativeExpertLayout native_expert_layout(int gu_type, int d_type, int64_t n_embd, int64_t n_ff) {
     NativeExpertLayout L;
     L.gu_type = gu_type;
@@ -1535,158 +2394,9 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     const dpct::dim3 ggu((unsigned)((2 * L.n_ff + kExpertRows - 1) / kExpertRows),
                          (unsigned)cap_groups);
     switch (L.gu_type) {
-    case 16: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_472f9a,
-                                              dpct_kernel_scalar<16>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<16>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 17: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_3af217,
-                                              dpct_kernel_scalar<17>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<17>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 18: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_17c573,
-                                              dpct_kernel_scalar<18>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<18>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 21: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_1f1e65,
-                                              dpct_kernel_scalar<21>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<21>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 22: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_5b900c,
-                                              dpct_kernel_scalar<22>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<22>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 23: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_ca9850,
-                                              dpct_kernel_scalar<23>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<23>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 29: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_5ad3a4,
-                                              dpct_kernel_scalar<29>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<29>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
-    case 42: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_gu_kernel_331601,
-                                              dpct_kernel_scalar<42>>>(
-                sycl::nd_range<3>(ggu * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_gu_kernel<42>(grp_ptr, grp_start, n_groups,
-                                             ent_tok, X, L, gate, up);
-                    });
-        });
-    } break;
+#define STRATA_GU(T) case T: launch_gu<T>(ggu, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+        STRATA_GU_FMTS(STRATA_GU)
+#undef STRATA_GU
         default: std::fprintf(stderr, "native_expert_grouped: gate/up type %d\n", L.gu_type); std::exit(1);
     }
     check("native_expert_grouped/gu");
@@ -1718,63 +2428,9 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     }
     const dpct::dim3 gd((unsigned)((L.n_embd + kExpertRows - 1) / kExpertRows), (unsigned)cap_groups);
     switch (L.d_type) {
-    case 20: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_f2a0ef,
-                                              dpct_kernel_scalar<20>>>(
-                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_down_kernel<20>(grp_ptr, grp_start, n_groups,
-                                               ent_dst, hq, L, out);
-                    });
-        });
-    } break;
-    case 23: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_cf19c8,
-                                              dpct_kernel_scalar<23>>>(
-                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_down_kernel<23>(grp_ptr, grp_start, n_groups,
-                                               ent_dst, hq, L, out);
-                    });
-        });
-    } break;
-    case 42: {
-
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
-
-        s->submit([&](sycl::handler &cgh) {
-
-            cgh.parallel_for<dpct_kernel_name<class native_down_kernel_57a5b9,
-                                              dpct_kernel_scalar<42>>>(
-                sycl::nd_range<3>(gd * sycl::range(1, 1, 256),
-                                  sycl::range(1, 1, 256)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        native_down_kernel<42>(grp_ptr, grp_start, n_groups,
-                                               ent_dst, hq, L, out);
-                    });
-        });
-    } break;
+#define STRATA_DOWN(T) case T: launch_down<T>(gd, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+        STRATA_D_FMTS(STRATA_DOWN)
+#undef STRATA_DOWN
         default: std::fprintf(stderr, "native_expert_grouped: down type %d\n", L.d_type); std::exit(1);
     }
     check("native_expert_grouped/down");
diff --git a/sycl/src/kernels/cuda/native_flash_attn.dp.cpp b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
index 4b2d2951223..33e19c8947d 100644
--- a/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/native_flash_attn.dp.cpp
@@ -262,17 +262,17 @@ attend(const float *__restrict__ q, const sycl::half *__restrict__ k,
 #pragma unroll
     for (int i = 0; i < 16; ++i) {
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         vkq[i].x() = vkq[i].x() * rescale;
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         vkq[i].y() = vkq[i].y() * rescale;
     }
diff --git a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
index 436af20f36c..48d9be4257e 100644
--- a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
@@ -74,25 +74,25 @@ pre_gated(const float *__restrict__ xn, float *__restrict__ gate,
         const std::size_t i = std::size_t(c) * n_embd + d;
         const float x = xn[i], w = sigmoid(gate[i]);
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         const float product = x * w;
         gate[i] = product;
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         if constexpr (Fused) sum = sycl::fma(x, w, sum);
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         else sum = c == 0 ? product : sum + product;
     }
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 40671122276..177fa97d0a9 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -29,6 +29,7 @@
 #include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/native_mmvq.hpp"
+#include "strata/kernels/dp4a.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 
 #include <cstdint>
@@ -211,10 +212,8 @@ q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
         const int vh1i = ((vh[1] >> i) << 4) & 0x10101010;
         const int v0i = vl0i | vh0i;
         const int v1i = vl1i | vh1i;
-        const int dot1 =
-            strata::dp4a(v0i, u[2 * i], strata::dp4a(v1i, u[2 * i + 1], 0));
-        const int dot2 = strata::dp4a(0x01010101, u[2 * i],
-                                    strata::dp4a(0x01010101, u[2 * i + 1], 0));
+        const int dot1 = STRATA_DP4A(v0i, u[2 * i], STRATA_DP4A(v1i, u[2 * i + 1], 0));
+        const int dot2 = STRATA_DP4A(0x01010101, u[2 * i], STRATA_DP4A(0x01010101, u[2 * i + 1], 0));
         sumf_d += d8[i] * (dot1 * sc[i]);
         sumf_m += d8[i] * (dot2 * m[i]);
     }
@@ -224,10 +223,10 @@ q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
 }
 
 /*
-DPCT1110: The total declared local variable size in device function
-q5_q8_dot exceeds 128 bytes and may cause high register pressure. Consult with
-your hardware vendor to find the total register size available and adjust the
-code, or use smaller sub-group size to avoid high register pressure.
+DPCT1110: The total declared local variable size in device function q5_q8_dot
+exceeds 128 bytes and may cause high register pressure. Consult with your
+hardware vendor to find the total register size available and adjust the code,
+or use smaller sub-group size to avoid high register pressure.
 */
 __dpct_inline__ float q5_q8_dot(const Q5KBlock *__restrict__ bq5,
                                 const Q81Block *__restrict__ bq8, int iqs) {
@@ -342,8 +341,8 @@ __dpct_inline__ float q2_q8_dot(const Q20Block *__restrict__ w,
         const int qo = dpct::byte_level_permute(0x020100ff, 0x020100ff, q >> 2);
         const int qx = dpct::byte_level_permute(qe, qo, 0x5140);
         const int qy = dpct::byte_level_permute(qe, qo, 0x7362);
-        sumi = strata::dp4a(u, qx, sumi);
-        sumi = strata::dp4a(v, qy, sumi);
+        sumi = STRATA_DP4A(u, qx, sumi);
+        sumi = STRATA_DP4A(v, qy, sumi);
     }
     const float d8 = chunk->ds[0];
     return d2 * d8 * sumi;
@@ -430,7 +429,7 @@ __dpct_inline__ float q3_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
         const int vih = ((vh >> i) << 2) & 0x04040404;
         const int vi =
             dpct::vectorized_binary<sycl::char4>(vil, vih, dpct::sub_sat());
-        sumf += d8[i] * (strata::dp4a(vi, u[i], 0) * sc);
+        sumf += d8[i] * (STRATA_DP4A(vi, u[i], 0) * sc);
     }
     return d3 * sumf;
 }
@@ -541,8 +540,8 @@ __dpct_inline__ float iq4_xs_q8_dot(const IQ4XSBlock *__restrict__ w,
         const sycl::int2 v = iq4_table_lookup(aux_q4, iq4nl_values);
         const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
         const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
-        sumi = strata::dp4a(v.x(), u0, sumi);
-        sumi = strata::dp4a(v.y(), u1, sumi);
+        sumi = STRATA_DP4A(v.x(), u0, sumi);
+        sumi = STRATA_DP4A(v.y(), u1, sumi);
     }
     const int ls = ((w->scales_l[iqs / 8] >> (iqs & 0x04)) & 0x0f) |
                    (((w->scales_h >> (iqs / 2)) & 0x03) << 4);
@@ -616,10 +615,8 @@ q4_q8_dot_impl(const int *__restrict__ v, const int *__restrict__ u,
     for (int i = 0; i < 2; ++i) {
         const int v0i = (v[0] >> (4 * i)) & 0x0f0f0f0f;
         const int v1i = (v[1] >> (4 * i)) & 0x0f0f0f0f;
-        const int dot1 =
-            strata::dp4a(v1i, u[2 * i + 1], strata::dp4a(v0i, u[2 * i], 0));
-        const int dot2 = strata::dp4a(0x01010101, u[2 * i + 1],
-                                    strata::dp4a(0x01010101, u[2 * i], 0));
+        const int dot1 = STRATA_DP4A(v1i, u[2 * i + 1], STRATA_DP4A(v0i, u[2 * i], 0));
+        const int dot2 = STRATA_DP4A(0x01010101, u[2 * i + 1], STRATA_DP4A(0x01010101, u[2 * i], 0));
         sumf_d += d8[i] * (dot1 * sc[i]);
         sumf_m += d8[i] * (dot2 * m[i]);
     }
@@ -731,7 +728,7 @@ __dpct_inline__ float q6_q8_dot_impl(int vl, int vh, const int *__restrict__ u,
         const int vih = ((vh >> (4 * i)) << 4) & 0x30303030;
         const int vi = dpct::vectorized_binary<sycl::char4>(
             vil | vih, 0x20202020, dpct::sub_sat());
-        sumf += d8[i] * (strata::dp4a(vi, u[i], 0) * sc);
+        sumf += d8[i] * (STRATA_DP4A(vi, u[i], 0) * sc);
     }
     return d * sumf;
 }
@@ -817,10 +814,8 @@ __dpct_inline__ float small_q8_dot(const Q40Block *__restrict__ w,
         const int v = load_int_b2(w->qs, iqs + i);
         const int vi0 = (v >> 0) & 0x0f0f0f0f;
         const int vi1 = (v >> 4) & 0x0f0f0f0f;
-        sumi = strata::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
-                          sumi);
-        sumi = strata::dp4a(
-            vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
+        sumi = STRATA_DP4A(vi0, reinterpret_cast<const int*>(x->qs)[iqs + i], sumi);
+        sumi = STRATA_DP4A(vi1, reinterpret_cast<const int*>(x->qs)[iqs + i + 4], sumi);
     }
     const sycl::float2 ds =
         (x->ds).template convert<float, sycl::rounding_mode::automatic>();
@@ -841,15 +836,13 @@ __dpct_inline__ float small_q8_dot(const Q50Block *__restrict__ w,
         vi0 |= (vh << 11) & 0x00001000;
         vi0 |= (vh << 18) & 0x00100000;
         vi0 |= (vh << 25) & 0x10000000;
-        sumi = strata::dp4a(vi0, reinterpret_cast<const int *>(x->qs)[iqs + i],
-                          sumi);
+        sumi = STRATA_DP4A(vi0, reinterpret_cast<const int*>(x->qs)[iqs + i], sumi);
         int vi1 = (vl >> 4) & 0x0f0f0f0f;
         vi1 |= (vh >> 12) & 0x00000010;
         vi1 |= (vh >> 5) & 0x00001000;
         vi1 |= (vh << 2) & 0x00100000;
         vi1 |= (vh << 9) & 0x10000000;
-        sumi = strata::dp4a(
-            vi1, reinterpret_cast<const int *>(x->qs)[iqs + i + 4], sumi);
+        sumi = STRATA_DP4A(vi1, reinterpret_cast<const int*>(x->qs)[iqs + i + 4], sumi);
     }
     const sycl::float2 ds =
         (x->ds).template convert<float, sycl::rounding_mode::automatic>();
@@ -865,7 +858,7 @@ __dpct_inline__ float small_q8_dot(const Q80Block *__restrict__ w,
     for (int i = 0; i < 2; ++i) {
         const int v = load_int_b2(w->qs, iqs + i);
         const int u = reinterpret_cast<const int*>(x->qs)[iqs + i];
-        sumi = strata::dp4a(v, u, sumi);
+        sumi = STRATA_DP4A(v, u, sumi);
     }
     const float d0 = w->d;
     const float d1 = x->ds[0];
@@ -881,8 +874,8 @@ __dpct_inline__ float small_q8_dot(const IQ4NLBlock *__restrict__ w,
     for (int i = 0; i < 2; ++i) {
         const sycl::int2 v =
             iq4_table_lookup(load_int_b2(w->qs, iqs + i), iq4nl_values);
-        sumi = strata::dp4a(v.x(), q8[i], sumi);
-        sumi = strata::dp4a(v.y(), q8[i + 4], sumi);
+        sumi = STRATA_DP4A(v.x(), q8[i], sumi);
+        sumi = STRATA_DP4A(v.y(), q8[i + 4], sumi);
     }
     const float d = sycl::vec<sycl::half, 1>(w->d)
                         .convert<float, sycl::rounding_mode::automatic>()[0] *
@@ -1065,8 +1058,8 @@ struct Q20Traits {
         int sumi = 0;
 #pragma unroll
         for (int j = 0; j < 4; ++j) {
-            sumi = strata::dp4a(q8[j * 2], r.qx[j], sumi);
-            sumi = strata::dp4a(q8[j * 2 + 1], r.qy[j], sumi);
+            sumi = STRATA_DP4A(q8[j * 2], r.qx[j], sumi);
+            sumi = STRATA_DP4A(q8[j * 2 + 1], r.qy[j], sumi);
         }
         const float d8 = chunk->ds[0];
         return r.d2 * d8 * sumi;
@@ -1171,8 +1164,8 @@ struct IQ4XSTraits {
         for (int j = 0; j < 4; ++j) {
             const int u0 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j];
             const int u1 = reinterpret_cast<const int*>(x[iqs / 4].qs)[j + 4];
-            sumi = strata::dp4a(r.v[j].x(), u0, sumi);
-            sumi = strata::dp4a(r.v[j].y(), u1, sumi);
+            sumi = STRATA_DP4A(r.v[j].x(), u0, sumi);
+            sumi = STRATA_DP4A(r.v[j].y(), u1, sumi);
         }
         sumi *= r.ls - 32;
         const float d = r.dw * x[iqs / 4].ds[0];
diff --git a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
index c216b8d5ead..3c3c062c07e 100644
--- a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
@@ -48,12 +48,15 @@ inline float warp_sum(float x) {
             offset);
     return x;
 }
-__dpct_inline__ void
-append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
-       int pos_base, const float *__restrict__ gamma, float epsilon,
-       float *__restrict__ tail, float *__restrict__ dead,
-       float *__restrict__ pooled, int32_t *__restrict__ block_pos,
-       int max_cells, float theta_scale, const int32_t *__restrict__ mtab) {
+__dpct_inline__ void append(const float *__restrict__ raw,
+                            const int32_t *__restrict__ pos_dev, int pos_base,
+                            const float *__restrict__ gamma, float epsilon,
+                            float *__restrict__ tail, float *__restrict__ dead,
+                            float *__restrict__ pooled,
+                            int32_t *__restrict__ block_pos, int max_cells,
+                            float theta_scale, float freq_scale, float corr_low,
+                            float corr_high, float ext_factor, float mscale,
+                            const int32_t *__restrict__ mtab) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int pos = *pos_dev, d = item_ct1.get_local_id(2);
     if (pos < 0 || pos >= max_cells) return;
@@ -87,7 +90,7 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
             Verify the correctness. SYCL math built-in function rounding mode is
             aligned with OpenCL C 1.2 standard.
             */
-            sum = sum + pos == 0 || j == R - 1 ? incoming : tail[j * D + d];
+            sum = sum + (pos == 0 || j == R - 1 ? incoming : tail[j * D + d]);
         /*
         DPCT1013: The rounding mode could not be specified and the generated
         code may have different accuracy than the original code. Verify the
@@ -123,9 +126,13 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
     float y = values[d];
     if (d < ROT) {
         const int pair = d % (ROT / 2);
-        const float theta = (pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair)) *
-                            dpct::pow(theta_scale, float(pair));
-        const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+        // The spare (pos == 0) keeps its zero angle; under YaRN the mscale magnitude still rides in
+        // through cos(0) - which is exactly what the queries are scaled by, so the top-k is unmoved.
+        const float theta_extrap =
+            (pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+            dpct::pow(theta_scale, float(pair));
+        float c, s;
+        rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
         const float a = values[pair], z = values[pair + ROT / 2];
         y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
     }
@@ -140,14 +147,21 @@ append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
 // (cell >= p0) or the tail the previous batch left (cell < p0).  Only the batch's last completed block writes the
 // spare after it (every earlier one's is overwritten by the next block in order).
 __dpct_inline__ float pooled_value(const float *values, int d, int rope_pos,
-                                   float theta_scale, const int32_t *mtab,
-                                   bool zero_pos) {
+                                   float theta_scale, float freq_scale,
+                                   float corr_low, float corr_high,
+                                   float ext_factor, float mscale,
+                                   const int32_t *mtab, bool zero_pos) {
     float y = values[d];
     if (d < ROT) {
         const int pair = d % (ROT / 2);
-        const float theta = (zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair)) *
-                            dpct::pow(theta_scale, float(pair));
-        const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+        // The same rotation the single append applies, rope_scaling.hpp's helper shared: under none this is
+        // today's cosf/sinf; under linear/YaRN the pooled keys move with the cache's K, and the spare's zero
+        // angle carries the mscale magnitude through cos(0) exactly as the single append's does.
+        const float theta_extrap =
+            (zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+            dpct::pow(theta_scale, float(pair));
+        float c, s;
+        rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
         const float a = values[pair], z = values[pair + ROT / 2];
         y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
     }
@@ -169,11 +183,12 @@ __dpct_inline__ float norm_scale(float mean, float *partials, int d) {
     return square_sum;
 }
 // cell 0 of a sequence: the spare (every gather index names cell 0), written to pooled[0] and dead
-__dpct_inline__ void append_first(const float *__restrict__ raw,
-                                  const float *__restrict__ gamma,
-                                  float epsilon, float *__restrict__ dead,
-                                  float *__restrict__ pooled, float theta_scale,
-                                  const int32_t *__restrict__ mtab) {
+__dpct_inline__ void
+append_first(const float *__restrict__ raw, const float *__restrict__ gamma,
+             float epsilon, float *__restrict__ dead,
+             float *__restrict__ pooled, float theta_scale, float freq_scale,
+             float corr_low, float corr_high, float ext_factor, float mscale,
+             const int32_t *__restrict__ mtab) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int d = item_ct1.get_local_id(2);
     auto &values =
@@ -217,7 +232,8 @@ __dpct_inline__ void append_first(const float *__restrict__ raw,
     */
     item_ct1.barrier(sycl::access::fence_space::local_space);
     if (d >= D) return;
-    const float y = pooled_value(values, d, 0, theta_scale, mtab, true);
+    const float y = pooled_value(values, d, 0, theta_scale, freq_scale, corr_low, corr_high, ext_factor, mscale,
+                                 mtab, true);
     pooled[d] = y;
     dead[d] = y;
 }
@@ -227,6 +243,8 @@ append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
               const float *__restrict__ tail, const float *__restrict__ dead,
               float *__restrict__ pooled, int32_t *__restrict__ block_pos,
               int64_t first_block, int64_t last_block, float theta_scale,
+              float freq_scale, float corr_low, float corr_high,
+              float ext_factor, float mscale,
               const int32_t *__restrict__ mtab) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t b = first_block + item_ct1.get_group(2);
@@ -273,7 +291,8 @@ append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
     item_ct1.barrier(sycl::access::fence_space::local_space);
     if (d >= D) return;
     const int rope_pos = pos_base + R * (int) b;
-    pooled[std::size_t(b) * D + d] = pooled_value(values, d, rope_pos, theta_scale, mtab, false);
+    pooled[std::size_t(b) * D + d] = pooled_value(values, d, rope_pos, theta_scale, freq_scale, corr_low, corr_high,
+                                                  ext_factor, mscale, mtab, false);
     if (b == last_block) {
         pooled[std::size_t(b + 1) * D + d] = dead[d];
         if (d == 0) *block_pos = rope_pos;
@@ -310,25 +329,26 @@ void native_qsa_indexer_set_enabled(bool value) { enabled.store(value, std::memo
 bool native_qsa_indexer_enabled() { return enabled.load(std::memory_order_relaxed); }
 void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_device, int32_t pos_base,
                                const float* gamma, float epsilon, const QsaIndexerBuffers& b,
-                               const QsaShapes& s, int64_t max_cells, float freq_base, void* stream) {
+                               const QsaShapes& s, int64_t max_cells, const RopeScaling& scaling, void* stream) {
     if (!stream || s.idx_dim != D || s.idx_block != R || s.n_rot != ROT ||
         max_cells < 1 || max_cells > INT32_MAX || pos_base < 0 || pos_base % R ||
         int64_t(pos_base) + max_cells > INT32_MAX || !std::isfinite(epsilon) || epsilon <= 0.0f ||
-        !std::isfinite(freq_base) || freq_base <= 1.0f)
-        throw std::invalid_argument("native QSA indexer requires fixed geometry, aligned position base, positive capacity/epsilon, valid frequency and explicit stream");
+        rope_scaling_invalid(scaling) != nullptr)
+        throw std::invalid_argument("native QSA indexer requires fixed geometry, aligned position base, positive capacity/epsilon, valid frequency/scaling and explicit stream");
     const Span spans[] = {{raw,D*4},{relative_pos_device,4},{gamma,D*4},{b.tail,(R-1)*D*4},
         {b.dead,D*4},{b.pooled,std::size_t(max_cells/R+1)*D*4},{b.block_pos,4}};
     for (const auto& span : spans) validate(span);
     for (int i = 0; i < 7; ++i) for (int j = i + 1; j < 7; ++j)
         if (overlaps(spans[i], spans[j])) throw std::invalid_argument("native QSA indexer buffers overlap");
-    const float theta_scale = powf(freq_base, -2.0f / ROT);
+    const float theta_scale = powf((float) scaling.freq_base, -2.0f / ROT);
+    const RopeKernelArgs k = scaling.kernel_args(ROT);   // none: the identity constants
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         ((sycl::queue *)(strata::q_of(stream)))
             ->submit([&](sycl::handler &cgh) {
-                auto mrope_table_ct11 = mrope_table();
+                auto mrope_table_ct16 = mrope_table();
 
                 cgh.parallel_for<dpct_kernel_name<class append_182f95>>(
                     sycl::nd_range<3>(sycl::range(1, 1, THREADS),
@@ -339,7 +359,9 @@ void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_dev
                             append(raw, relative_pos_device, pos_base, gamma,
                                    epsilon, b.tail, b.dead, b.pooled,
                                    b.block_pos, int(max_cells), theta_scale,
-                                   mrope_table_ct11);
+                                   k.freq_scale, k.corr_low, k.corr_high,
+                                   k.ext_factor, k.attn_factor,
+                                   mrope_table_ct16);
                         });
             });
     }
@@ -366,13 +388,15 @@ void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_dev
 }
 void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, int32_t pos_base, const float* gamma,
                                      float epsilon, const QsaIndexerBuffers& b, const QsaShapes& s, int64_t max_cells,
-                                     float freq_base, void* stream) {
+                                     const RopeScaling& scaling, void* stream) {
     if (n <= 0) return;
     if (!stream || s.idx_dim != D || s.idx_block != R || s.n_rot != ROT || p0 < 0 || p0 + n > max_cells ||
         max_cells > INT32_MAX || pos_base < 0 || pos_base % R || int64_t(pos_base) + max_cells > INT32_MAX ||
-        !std::isfinite(epsilon) || epsilon <= 0.0f || !std::isfinite(freq_base) || freq_base <= 1.0f)
-        throw std::invalid_argument("native QSA indexer (batch): bad geometry, positions or parameters");
-    const float theta_scale = powf(freq_base, -2.0f / ROT);
+        !std::isfinite(epsilon) || epsilon <= 0.0f || rope_scaling_invalid(scaling) != nullptr)
+        throw std::invalid_argument("native QSA indexer (batch): bad geometry, positions, parameters or scaling");
+    const float theta_scale = powf((float) scaling.freq_base, -2.0f / ROT);
+    const RopeKernelArgs k = scaling.kernel_args(ROT);   // none: the identity constants
+    const float fsf = k.freq_scale, cl = k.corr_low, ch = k.corr_high, ef = k.ext_factor, ms = k.attn_factor;
     const dpct::queue_ptr st = strata::q_of(stream);
     const int32_t* mtab = mrope_table();
     if (p0 == 0) {
@@ -385,7 +409,7 @@ void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, in
             exp_props,
             [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
                 append_first(raw, gamma, epsilon, b.dead, b.pooled, theta_scale,
-                             mtab);
+                             fsf, cl, ch, ef, ms, mtab);
             });
     }
     // completed blocks: those whose last cell (4b+3) lies in [p0, p0 + n)
@@ -404,7 +428,7 @@ void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, in
             [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
                 append_blocks(raw, n, p0, pos_base, gamma, epsilon, b.tail,
                               b.dead, b.pooled, b.block_pos, first, hi,
-                              theta_scale, mtab);
+                              theta_scale, fsf, cl, ch, ef, ms, mtab);
             });
     }
     {
diff --git a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
index fe57d98afdc..a4580680077 100644
--- a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
@@ -106,7 +106,7 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
     }
     float sum=(((h[0] + h[1]) + h[2]) + h[3]);
     if(bias)sum=(sum + bias[row]);
-    sum=(sum + row==full&&n%R?1e9f:0.0f);
+    sum=(sum + (row==full&&n%R?1e9f:0.0f));
     for(int i=row*R;i<n&&i<(row+1)*R;++i)cells[i]=sum;
 #else
     auto &shared = *sycl::ext::oneapi::group_local_memory_for_overwrite<
@@ -208,7 +208,7 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
         correctness. SYCL math built-in function rounding mode is aligned with
         OpenCL C 1.2 standard.
         */
-        sum = sum + row == full && n % R ? 1e9f : 0.0f;
+        sum = sum + (row == full && n % R ? 1e9f : 0.0f);
         // The live causal mask is +0. Invalid/padded cells are never exported.
         /*
         DPCT1013: The rounding mode could not be specified and the generated
@@ -252,7 +252,7 @@ __global__ void scalar_score_kernel(
         sum=(sum + head_score[2]);
         sum=(sum + head_score[3]);
         if(bias)sum=(sum + bias[row]);
-        sum=(sum + row==full&&n%R?1e9f:0.0f);
+        sum=(sum + (row==full&&n%R?1e9f:0.0f));
         sum=(sum + 0.0f);
         for(int i=row*R;i<n&&i<(row+1)*R;++i)cells[i]=sum;
     }
diff --git a/sycl/src/kernels/cuda/native_rope.dp.cpp b/sycl/src/kernels/cuda/native_rope.dp.cpp
index fa30f027ed3..6dfe25684f5 100644
--- a/sycl/src/kernels/cuda/native_rope.dp.cpp
+++ b/sycl/src/kernels/cuda/native_rope.dp.cpp
@@ -42,7 +42,9 @@ bool overlaps(const void* a, size_t an, const void* b, size_t bn) {
     return x <= y ? y - x < an : x - y < bn;
 }
 __dpct_inline__ void apply(const float *x, float *out, int rows, int width,
-                           int n_rot, float theta_scale, const int *positions,
+                           int n_rot, float theta_scale, float freq_scale,
+                           float corr_low, float corr_high, float ext_factor,
+                           float mscale, const int *positions,
                            const int32_t *mtab) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int row = item_ct1.get_group(1);
@@ -57,9 +59,10 @@ __dpct_inline__ void apply(const float *x, float *out, int rows, int width,
         }
         return;
     }
-    const float theta = mrope_pos(mtab, positions[row], pair) *
-                        dpct::pow(theta_scale, float(pair));
-    const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+    const float theta_extrap = mrope_pos(mtab, positions[row], pair) *
+                               dpct::pow(theta_scale, float(pair));
+    float c, s;
+    rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
     const float a = x[start + pair], b = x[start + pair + n_rot / 2];
     out[start + pair] = a * c - b * s;
     out[start + pair + n_rot / 2] = a * s + b * c;
@@ -86,13 +89,13 @@ const int32_t* mrope_table() { return mrope_tab[mrope_dev()].load(std::memory_or
 void native_rope_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
 bool native_rope_enabled() { return enabled.load(std::memory_order_relaxed); }
 void native_rope_apply(const float* x, float* out, int rows, int head_dim,
-                       int n_rot, float freq_base, const int* positions, void* stream) {
+                       int n_rot, const RopeScaling& scaling, const int* positions, void* stream) {
     if (!x || !out || !positions || !stream || rows < 1 || rows > 65535 ||
         (head_dim != 128 && head_dim != 256) || n_rot != 64 ||
-        !std::isfinite(freq_base) || freq_base <= 1.0f ||
+        rope_scaling_invalid(scaling) != nullptr ||
         reinterpret_cast<uintptr_t>(x) % 4 || reinterpret_cast<uintptr_t>(out) % 4 ||
         reinterpret_cast<uintptr_t>(positions) % 4) {
-        throw std::invalid_argument("native RoPE requires aligned F32 rows, width 128/256, rotation 64, valid base and explicit stream");
+        throw std::invalid_argument("native RoPE requires aligned F32 rows, width 128/256, rotation 64, valid base/scaling and explicit stream");
     }
     const size_t bytes = size_t(rows) * head_dim * sizeof(float);
     if ((x != out && overlaps(x, bytes, out, bytes)) ||
@@ -101,14 +104,15 @@ void native_rope_apply(const float* x, float* out, int rows, int head_dim,
         throw std::invalid_argument("native RoPE buffers partially overlap");
     }
     // Match pinned host-side float powf before device fast powf/trigonometry.
-    const float theta_scale = powf(freq_base, -2.0f / n_rot);
+    const float theta_scale = powf((float) scaling.freq_base, -2.0f / n_rot);
+    const RopeKernelArgs k = scaling.kernel_args(n_rot);   // none: the identity constants
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         ((sycl::queue *)(strata::q_of(stream)))
             ->submit([&](sycl::handler &cgh) {
-                auto mrope_table_ct7 = mrope_table();
+                auto mrope_table_ct12 = mrope_table();
 
                 cgh.parallel_for<dpct_kernel_name<class apply_b955ef>>(
                     sycl::nd_range<3>(
@@ -117,7 +121,9 @@ void native_rope_apply(const float* x, float* out, int rows, int head_dim,
                         sycl::range(1, 1, 128)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
                         apply(x, out, rows, head_dim, n_rot, theta_scale,
-                              positions, mrope_table_ct7);
+                              k.freq_scale, k.corr_low, k.corr_high,
+                              k.ext_factor, k.attn_factor, positions,
+                              mrope_table_ct12);
                     });
             });
     }
diff --git a/sycl/src/kernels/cuda/ple.dp.cpp b/sycl/src/kernels/cuda/ple.dp.cpp
index a6c06b8760c..1d430071c5c 100644
--- a/sycl/src/kernels/cuda/ple.dp.cpp
+++ b/sycl/src/kernels/cuda/ple.dp.cpp
@@ -337,8 +337,9 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
     const bool native_key = w.key_native_data != nullptr && w.key_bf16 == nullptr;
     if (native_key && (!emb || !hidden || !hist_rows || !out.result || !scratch || !stream ||
                        !w.key_native_q8_1 ||
-                       (w.key_native_type != 42 && w.key_native_type != 18 && w.key_native_type != 23)))
-        throw std::invalid_argument("ple_block: native key requires Q2_0, IQ3_XXS or IQ4_XS weights, input/output, private scratch and explicit stream");
+                       (w.key_native_type != 42 && w.key_native_type != 18 && w.key_native_type != 23 &&
+                        w.key_native_type != 8)))
+        throw std::invalid_argument("ple_block: native key requires Q2_0, IQ3_XXS, IQ4_XS or Q8_0 weights, input/output, private scratch and explicit stream");
     if (emb == nullptr || hidden == nullptr || hist_rows == nullptr || out.result == nullptr) return;
     const int n_embd = NG_N_EMBD, hc = NG_HC, hc_dim = NG_HC_DIM;
     static_assert(NG_N_EMBD == 2560 && NG_HC_DIM == 10240, "native PLE key geometry changed");
diff --git a/sycl/src/kernels/cuda/qsa.dp.cpp b/sycl/src/kernels/cuda/qsa.dp.cpp
index 09ccaff8ca6..c5df718b58b 100644
--- a/sycl/src/kernels/cuda/qsa.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa.dp.cpp
@@ -218,10 +218,18 @@ __dpct_inline__ void indexer_key_append_kernel(
         OpenCL C 1.2 standard.
         */
         const double inv = 1.0 / sycl::sqrt(ss / (double)idx_dim + (double)eps);
-        dead[d] = (float) (p * inv * (double) w_k_norm[d]);
-        // rope at position 0 is the identity here (cos = 1, sin = 0 exactly), so no rotation is applied and
-        // the parity test asserts the value is bit-exact - which is what makes skipping it legitimate.
-        pooled[d] = dead[d];
+        float y = (float) (p * inv * (double) w_k_norm[d]);
+        // The spare rotates at position 0 - ALWAYS row 0 of the table, whatever `pos_base` is, as the native
+        // indexer's spare does.  At angle 0 the sine is exactly 0 in every scaling (sin(0) * mscale), so the
+        // pair rotation reduces to `v * cos_tab[pair]` with no partner element to read (and no barrier).
+        // Unscaled, row 0 is exactly (1, 0) and `v * 1.0f` is `v` bit for bit - today's value, which the
+        // parity test holds bit-exact.  Under YaRN row 0 is (mscale, 0): the rotated dims carry the magnitude
+        // correction exactly like every other pooled row and like the native kernel's spare (the unrotated
+        // dims pass through, as in the rotation of the completed blocks below).  Skipping the rotation here,
+        // as this kernel once did, left `dead` and `pooled[0]` the only unscaled keys of a scaled cache.
+        if (d < n_rot) y *= cos_tab[d % (n_rot / 2)];
+        dead[d] = y;
+        pooled[d] = y;
     }
 
     if (slot != r - 1) return;
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index dd9d198523a..65e05f045ee 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -26,8 +26,9 @@ constexpr int CH = D1_CH;         // cells per chunk
 constexpr int THREADS = 128;      // 4 warps: scores by cell (8 each), p.v by dimension (64 each = one int8 scale group)
 constexpr int QS = HD + 8;        // q row stride in halves (bank-conflict-free fragment loads)
 
-// The MMA and cp.async below need sm_80. Builds for older cards (the experimental sm_75 one) compile them to a trap;
-// qsa_prompt_attn_batch refuses such a device at run time, so the old kernel runs there.
+// The MMA below needs sm_75 or newer (Turing runs it as two k=8 steps); cp.async needs sm_80. Builds for pre-sm_75
+// cards compile the MMA to a trap; qsa_prompt_attn_batch refuses such a device at run time, so the old kernel runs
+// there.  Turing compiles cp_async16 to a trap as well and takes the v1 kernel instead of launch_i8.
 #if defined(__HIPCC__)          // AMD: no mma.sync / cp.async; the host keeps the old kernel (below)
 #define STRATA_PA_SM80 0
 #elif 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py
@@ -36,9 +37,23 @@ constexpr int QS = HD + 8;        // q row stride in halves (bank-conflict-free
 #define STRATA_PA_SM80 0
 #endif
 
+// m16n8k16 with f16 inputs needs sm_80.  Turing (sm_75) has m16n8k8 with the SAME A/B/C register mapping, so the
+// k=16 step is two k=8 steps on the fragments as they are already laid out: a[0]/a[1] are rows gid/gid+8 at k columns
+// 2*tig..2*tig+1 (b[0]'s k rows), a[2]/a[3] the same rows at k columns 2*tig+8..2*tig+9 (b[1]'s k rows).  The
+// products then add into the same FP32 C registers in the order hi-part-0, hi-part-1, which is the order the k16
+// instruction accumulates in as well - but the sum now rounds twice, so the two paths do not agree bit for bit.
 __dpct_inline__ void mma16816(float *c, const uint32_t *a, const uint32_t *b) {
-#if !STRATA_PA_SM80
-    /* unreachable on SYCL: the launcher refuses this device */
+#if !STRATA_PA_SM80 &&                                                         \
+    (defined(__HIPCC__) || !defined(DPCT_COMPATIBILITY_TEMP) ||                \
+     DPCT_COMPATIBILITY_TEMP < 750)
+    /* unreachable on SYCL: the launcher refuses this device */   // AMD and pre-Turing builds: no mma.sync (the host keeps the old kernel there)
+#elif 0   // SYCL: Turing's m16n8k8 PTX (unreachable: the launcher refuses this device)
+    asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.f16.f16.f32 {%0,%1,%2,%3}, {%4,%5}, {%6}, {%0,%1,%2,%3};\n"
+                 : "+f"(c[0]), "+f"(c[1]), "+f"(c[2]), "+f"(c[3])
+                 : "r"(a[0]), "r"(a[1]), "r"(b[0]));
+    asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.f16.f16.f32 {%0,%1,%2,%3}, {%4,%5}, {%6}, {%0,%1,%2,%3};\n"
+                 : "+f"(c[0]), "+f"(c[1]), "+f"(c[2]), "+f"(c[3])
+                 : "r"(a[2]), "r"(a[3]), "r"(b[1]));
 #else
 #if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
     asm volatile("mma.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 "
@@ -1163,7 +1178,10 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
                            int64_t cap, const QsaShapes &s, float *attn,
                            int64_t n_q, void *stream) try {
     if (n_q <= 0) return true;
-    {   // sm_80 or newer (the MMA and cp.async above); an older card keeps the old kernel
+    bool turing = false;   // per call, from the CURRENT device (a layer split can mix Turing with newer cards)
+    {   // sm_75 or newer: the MMA above compiles for both.  sm_80+ runs the cp.async kernel (launch_i8); Turing has
+        // no cp.async, so it runs the v1 kernel (launch<1>, same accuracy, another summation order).  An older card
+        // keeps the old kernel.
         static int cc_major[64] = {};
         int dev = 0;
         /*
@@ -1187,7 +1205,8 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
             cc_major[dev] = major;
         }
         (void) cc_major[dev];
-        // SYCL: the mma.sync kernel below is not ported; its XMX port takes the same arguments
+        // SYCL: the mma.sync kernel below is not ported (upstream's Turing/sm_80 split - `turing` - does not
+        // apply); its XMX port takes the same arguments
         if (qsa_prompt_attn_xmx(q, pools, ids, steps, cap, s, attn, n_q, stream)) return true;
         return false;   // the caller takes the older kernel
     }
@@ -1205,9 +1224,10 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
     if (pools.k_q != nullptr) {
         if (!pools.v_q || !pools.k_scale || !pools.v_scale) return false;
         // STRATA_PROMPT_ATTN_V1=1 (debug): the first version, same accuracy, another summation order - the control
-        // for how far the model amplifies an FP32-level change
+        // for how far the model amplifies an FP32-level change.  Turing always takes it: v2's cp.async does not
+        // exist before sm_80.
         static const bool v1 = std::getenv("STRATA_PROMPT_ATTN_V1") != nullptr;
-        if (v1) return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
+        if (v1 || turing) return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
         return launch_i8(q, pools, ids, steps, cap, s, attn, n_q, st);
     }
     if (!pools.k_pool || !pools.v_pool) return false;
diff --git a/sycl/src/kernels/cuda/rope.dp.cpp b/sycl/src/kernels/cuda/rope.dp.cpp
index b11777b96e0..bfe7ecf97db 100644
--- a/sycl/src/kernels/cuda/rope.dp.cpp
+++ b/sycl/src/kernels/cuda/rope.dp.cpp
@@ -20,6 +20,11 @@
 // Building the table once on the host and passing it in makes the TABLE exactly the reference's values and
 // leaves the kernel a pure rotation, so each half can be checked tightly instead of both halves sharing one
 // loose tolerance.  The engine wants a cached table anyway: it is per (n_rot, theta, position), not per token.
+//
+// THE SCALED TABLE IS THE SAME IDEA WITH MORE MATH IN THE HOST LOOP.  Linear rescales the angle by
+// `freq_scale`; YaRN blends extrapolation and interpolation along the pairs (ggml's `rope_yarn`) and folds
+// the mscale magnitude correction into the same cos/sin values.  All of it float64, in the reference's
+// order, so `rope_parity` can hold every variant to a bit-exact float64 transcription of the same spec.
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
@@ -33,6 +38,15 @@
 
 namespace strata::kernels {
 
+namespace {
+// The process's rope config (rope_scaling.hpp).  One writer - the engine's startup thread, before
+// session_init builds any table or captures any graph - and readers after it.
+RopeScaling g_rope_scaling;
+}  // namespace
+
+void rope_scaling_set(const RopeScaling& scaling) { g_rope_scaling = scaling; }
+const RopeScaling& rope_scaling() { return g_rope_scaling; }
+
 void build_rope_table(int n_rot, double theta, int max_pos, float* cos_tab, float* sin_tab) {
     const int half = n_rot / 2;
     for (int p = 0; p < max_pos; ++p) {
@@ -46,6 +60,33 @@ void build_rope_table(int n_rot, double theta, int max_pos, float* cos_tab, floa
     }
 }
 
+void build_rope_table(int n_rot, const RopeScaling& sc, int max_pos, float* cos_tab, float* sin_tab) {
+    if (sc.type == RopeScalingType::None) {
+        build_rope_table(n_rot, sc.freq_base, max_pos, cos_tab, sin_tab);   // the original loop, verbatim
+        return;
+    }
+    const int half = n_rot / 2;
+    const double fs = sc.freq_scale();
+    const double ms = sc.mscale();
+    double cd[2];
+    sc.corr_dims(n_rot, cd);
+    const bool correct = sc.ext_factor != 0;   // ggml: the correction rides on ext_factor, not the type
+    for (int p = 0; p < max_pos; ++p) {
+        for (int i = 0; i < half; ++i) {
+            const double inv = std::pow(sc.freq_base, -2.0 * (double) i / (double) n_rot);
+            const double extrap = (double) p * inv;    // the trained angle, ggml's theta_extrap
+            const double interp = fs * extrap;         // ggml's theta_interp
+            double ang = interp;
+            if (correct) {
+                const double ramp = (double) rope_yarn_ramp((float) cd[0], (float) cd[1], i) * sc.ext_factor;
+                ang = interp * (1.0 - ramp) + extrap * ramp;
+            }
+            cos_tab[(size_t) p * half + i] = (float) (std::cos(ang) * ms);
+            sin_tab[(size_t) p * half + i] = (float) (std::sin(ang) * ms);
+        }
+    }
+}
+
 namespace {
 
 // ONE THREAD PER ROW, not per (row, pair).  The first version had one thread per pair and did the tail copy
diff --git a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
index 5b76ff016fe..ff8bd9094c6 100644
--- a/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
+++ b/sycl/src/kernels/cuda/s2_expert_grouped.dp.cpp
@@ -19,10 +19,13 @@
 #include "strata/sycl_math.hpp"
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/dp4a.hpp"
 
 #include "strata/kernels/quantize_act.hpp"
 #include "strata/kernels/verify_kernels.hpp"
 
+#include <atomic>
+#include <cstdint>
 #include <cstdio>
 #include <cstdlib>
 #include <cstring>
@@ -224,6 +227,214 @@ down_kernel(const uint8_t *__restrict__ blob_base,
     if (lane == 0) out[(size_t) dst_index[h] * H + r] = s;
 }
 
+// ---- THE SAME INTEGERS FROM FEWER INSTRUCTIONS.  `STRATA_OLD_GROUPED=1` keeps the kernels above.
+//
+// **INSIDE A CHUNK, WHICH CODE MEETS WHICH ACTIVATION IN A `dp4a` WORD IS FREE.**  `s = sum_e code_e * x_e` and
+// `hx = sum_e x_e` are exact integer sums (|s| <= 32 * 3 * 128), so any grouping of the 32 products into words
+// gives the same two integers.  The grouping used here costs no transposition of the codes: `(w >> 2f) & 0x03030303`
+// holds field `f` of each of a code word's four bytes - elements `4b + f`, plus 16 for the second word - so it is
+// the ACTIVATIONS that are regrouped, once per chunk, into
+//
+//     X[4h + f] = { x[16h + f], x[16h + 4 + f], x[16h + 8 + f], x[16h + 12 + f] }
+//
+// a 4x4 byte transpose of each half of the chunk, eight `__byte_perm`.  The kernels above spend seven integer
+// operations per code BYTE and a second `dp4a` chain for `hx` on every row; here a code word costs seven for 16
+// elements and `hx` is summed once per chunk.  `s`, `hx` and the float expression `dw * dx * (float) (s - hx)` are
+// unchanged, so every output is bitwise the previous kernels' - `s2_expert_grouped_parity` checks exactly that.
+
+// fp16 at an even address, one 16-bit load (`f16_at` reads it as two bytes); same value.
+__dpct_inline__ float f16_ld(const uint8_t *p) {
+    return sycl::vec<sycl::half, 1>(sycl::bit_cast<sycl::half, unsigned short>(
+                                        *(const unsigned short *)p))
+        .convert<float, sycl::rounding_mode::automatic>()[0];
+}
+
+// A chunk's two code words as the eight `dp4a` operands that pair with `X[0..7]`: `m[4h + f]` byte `b` is the
+// code of element `16h + 4b + f`.
+__dpct_inline__ void expand_codes(sycl::uint2 cb, int m[8]) {
+    const unsigned M = 0x03030303u;
+    m[0] = (int)(cb.x() & M);
+    m[1] = (int)((cb.x() >> 2) & M);
+    m[2] = (int)((cb.x() >> 4) & M);
+    m[3] = (int)((cb.x() >> 6) & M);
+    m[4] = (int)(cb.y() & M);
+    m[5] = (int)((cb.y() >> 2) & M);
+    m[6] = (int)((cb.y() >> 4) & M);
+    m[7] = (int)((cb.y() >> 6) & M);
+}
+
+// The 32 int8 of the `block_q8_0` at `xb` regrouped into `X[0..7]` (see above), and their sum `hx`.
+//
+// **NINE ALIGNED WORD LOADS INSTEAD OF 32 BYTE LOADS.**  The caller guarantees a 4-byte aligned activation row, so
+// chunk `c`'s int8 start at `34c + 2`, i.e. 0 bytes (odd `c`) or 2 bytes (even `c`) into an aligned word; the
+// words are read aligned and funnel-shifted into place.  The ninth word is read only in the 2-byte case, and then
+// it lies inside block `c + 1` of the same row: both row lengths (80 and 20 chunks) are even, so an even chunk is
+// never a row's last.
+__dpct_inline__ int load_x_chunk(const uint8_t *__restrict__ xb, int X[8]) {
+    const uint8_t* q = xb + 2;
+    const int off = (int) ((uintptr_t) q & 3);
+    const unsigned* p = (const unsigned*) (q - off);
+    const unsigned sh = (unsigned) off * 8;
+    unsigned v[9];
+#pragma unroll
+    /*
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    for (int j = 0; j < 8; ++j) v[j] = *(p + j);
+    /*
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    v[8] = off != 0 ? *(p + 8) : 0u;
+    unsigned n[8];
+    int hx = 0;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) {
+        // natural word j: x[4j .. 4j+3]; a 64-bit shift (sh is 0, 8, 16 or 24) rather than __funnelshift_r, so the same
+        // source needs no CUDA-only intrinsic.
+        n[j] = (unsigned) ((((unsigned long long) v[j + 1] << 32) | v[j]) >> sh);
+        hx = strata::dp4a(0x01010101, (int) n[j], hx);
+    }
+#pragma unroll
+    for (int h = 0; h < 2; ++h) {
+        const unsigned t0 = dpct::byte_level_permute(n[4 * h], n[4 * h + 1],
+                                                     0x5140); // a0 b0 a1 b1
+        const unsigned t1 = dpct::byte_level_permute(n[4 * h], n[4 * h + 1],
+                                                     0x7362); // a2 b2 a3 b3
+        const unsigned t2 = dpct::byte_level_permute(n[4 * h + 2], n[4 * h + 3],
+                                                     0x5140); // c0 d0 c1 d1
+        const unsigned t3 = dpct::byte_level_permute(n[4 * h + 2], n[4 * h + 3],
+                                                     0x7362); // c2 d2 c3 d3
+        X[4 * h + 0] =
+            (int)dpct::byte_level_permute(t0, t2, 0x5410); // a0 b0 c0 d0
+        X[4 * h + 1] =
+            (int)dpct::byte_level_permute(t0, t2, 0x7632); // a1 b1 c1 d1
+        X[4 * h + 2] =
+            (int)dpct::byte_level_permute(t1, t3, 0x5410); // a2 b2 c2 d2
+        X[4 * h + 3] =
+            (int)dpct::byte_level_permute(t1, t3, 0x7632); // a3 b3 c3 d3
+    }
+    return hx;
+}
+
+// `s` for one chunk: the eight expanded code words against the eight regrouped activation words.
+__dpct_inline__ int chunk_s(const int m[8], const int X[8]) {
+    int s = 0;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) s = strata::dp4a(m[j], X[j], s);
+    return s;
+}
+
+/// `gu_kernel`, new: ONE WARP PER (gate, up) PAIR - row-slots `2r` and `2r + 1`, adjacent in the blob - so each
+/// activation chunk is loaded and regrouped once for both rows.  Per row, the lane's chunks, their order, the float
+/// expression and the shuffle reduction are `row_dot_s2_q8`'s; the outputs land where `gu_kernel` puts them.
+/*
+DPCT1110: The total declared local variable size in device function
+gu_pair_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void
+gu_pair_kernel(const uint8_t *__restrict__ blob_base,
+               const int32_t *__restrict__ slot_index, long long blob_bytes,
+               const uint8_t *__restrict__ x_q8_0,
+               const float *__restrict__ x_scales, float *__restrict__ gate_up,
+               int n_hits, const int32_t *__restrict__ d_count,
+               const int32_t *__restrict__ dst_index, int tok_div) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long pair = (long long)item_ct1.get_group(2) * warps_per_block +
+                           (item_ct1.get_local_id(2) >> 5);
+    const long long total = (long long) n_hits * FF;
+    if (pair >= total) return;
+    const int h = (int) (pair / FF);
+    if (d_count != nullptr && h >= *d_count) return;
+    const int r = (int) (pair % FF);
+    const int lane = item_ct1.get_local_id(2) & 31;
+
+    const uint8_t* blob = blob_base + (size_t) slot_index[h] * (size_t) blob_bytes;
+    if (tok_div > 0) {
+        const int tok = dst_index[h] / tok_div;
+        x_q8_0 += (size_t) tok * (size_t) (H / 32) * 34;
+        if (x_scales != nullptr) x_scales += (size_t) tok * (size_t) (H / 32);
+    }
+    const uint8_t* codes = blob + (size_t) (2 * r) * ROW_GU;               // gate row; the up row follows it
+    const uint8_t* scales = blob + O_GU_SCALES + (size_t) (2 * r) * SC_GU * 2;
+    float acc_g = 0.0f, acc_u = 0.0f;
+    for (int c = lane; c < H / 32; c += 32) {
+        const uint8_t* xb = x_q8_0 + (size_t) c * 34;
+        const float dx = x_scales ? x_scales[c] : f16_ld(xb);
+        int X[8], m[8];
+        const int hx = load_x_chunk(xb, X);
+        expand_codes(*(const sycl::uint2 *)(codes + (size_t)c * 8), m);
+        const float dw_g = f16_ld(scales + (size_t) (c >> 1) * 2);
+        acc_g += dw_g * dx * (float) (chunk_s(m, X) - hx);
+        expand_codes(*(const sycl::uint2 *)(codes + ROW_GU + (size_t)c * 8), m);
+        const float dw_u = f16_ld(scales + SC_GU * 2 + (size_t) (c >> 1) * 2);
+        acc_u += dw_u * dx * (float) (chunk_s(m, X) - hx);
+    }
+    const float sg = warp_sum(acc_g);
+    const float su = warp_sum(acc_u);
+    if (lane != 0) return;
+    gate_up[(size_t) h * FF + (size_t) r] = sg;                                // gate-major, as in `gu_kernel`
+    gate_up[(size_t) n_hits * FF + (size_t) h * FF + (size_t) r] = su;
+}
+
+/// `down_kernel`, new: ONE WARP PER PAIR OF ROWS `r, r + 1` of one hit, the intermediate's chunk loaded once for both.
+/*
+DPCT1110: The total declared local variable size in device function
+down_pair_kernel exceeds 128 bytes and may cause high register pressure. Consult
+with your hardware vendor to find the total register size available and adjust
+the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void down_pair_kernel(const uint8_t *__restrict__ blob_base,
+                                      const int32_t *__restrict__ slot_index,
+                                      const int32_t *__restrict__ dst_index,
+                                      long long blob_bytes,
+                                      const uint8_t *__restrict__ h_q8_0,
+                                      const float *__restrict__ h_scales,
+                                      float *__restrict__ out, int n_hits,
+                                      const int32_t *__restrict__ d_count) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int warps_per_block = (int)(item_ct1.get_local_range(2) >> 5);
+    const long long pair = (long long)item_ct1.get_group(2) * warps_per_block +
+                           (item_ct1.get_local_id(2) >> 5);
+    const long long total = (long long) n_hits * (H / 2);
+    if (pair >= total) return;
+    const int h = (int) (pair / (H / 2));
+    if (d_count != nullptr && h >= *d_count) return;
+    const int r = 2 * (int) (pair % (H / 2));
+    const int lane = item_ct1.get_local_id(2) & 31;
+
+    const uint8_t* blob = blob_base + (size_t) slot_index[h] * (size_t) blob_bytes;
+    const uint8_t* xrow = h_q8_0 + (size_t) h * (size_t) (FF / 32) * 34;
+    const float* xs = h_scales ? h_scales + (size_t) h * (size_t) (FF / 32) : nullptr;
+    const uint8_t* codes = blob + O_D_CODES + (size_t) r * ROW_D;
+    const uint8_t* scales = blob + O_D_SCALES + (size_t) r * SC_D * 2;
+    float acc0 = 0.0f, acc1 = 0.0f;
+    for (int c = lane; c < FF / 32; c += 32) {
+        const uint8_t* xb = xrow + (size_t) c * 34;
+        const float dx = xs ? xs[c] : f16_ld(xb);
+        int X[8], m[8];
+        const int hx = load_x_chunk(xb, X);
+        expand_codes(*(const sycl::uint2 *)(codes + (size_t)c * 8), m);
+        const float dw0 = f16_ld(scales + (size_t) (c >> 1) * 2);
+        acc0 += dw0 * dx * (float) (chunk_s(m, X) - hx);
+        expand_codes(*(const sycl::uint2 *)(codes + ROW_D + (size_t)c * 8), m);
+        const float dw1 = f16_ld(scales + SC_D * 2 + (size_t) (c >> 1) * 2);
+        acc1 += dw1 * dx * (float) (chunk_s(m, X) - hx);
+    }
+    const float s0 = warp_sum(acc0);
+    const float s1 = warp_sum(acc1);
+    if (lane != 0) return;
+    const size_t o = (size_t) dst_index[h] * H + (size_t) r;
+    out[o] = s0;
+    out[o + 1] = s1;
+}
+
 // The CPU subtracts the weight bias after its eight FMA accumulators have been reduced. Moving the
 // subtraction into each integer dot, as the legacy kernel does, changes rounding even with equal scales.
 __dpct_inline__ void activation_correction_kernel(const uint8_t *q8,
@@ -436,7 +647,7 @@ __dpct_inline__ void cpu_order_quantize_kernel(const float *x, uint8_t *blocks,
         Verify the correctness. SYCL math built-in function rounding mode is
         aligned with OpenCL C 1.2 standard.
         */
-        int v = (int)t + t >= 0.0f ? 0.5f : -0.5f;
+        int v = (int) (t + (t >= 0.0f ? 0.5f : -0.5f));   // SYCL port: dpct dropped the parentheses (it rounded every value to 0)
         v = v < -127 ? -127 : (v > 127 ? 127 : v);
         out[2 + j] = (uint8_t) (int8_t) v;
         sum += v;
@@ -466,8 +677,154 @@ void check(const char* who, void* stream) {
     (void) stream;
 }
 
+// The previous kernels stay selectable for A/B - `STRATA_OLD_GROUPED=1` in the environment, or
+// `moe_grouped_select_old` (the parity test runs both in one process).  The environment is read once, on first use;
+// the choice is made at each launch, so a captured graph keeps the kernels it was captured with.
+std::atomic<int> g_select_old{-1};
+// Which kernels the last launch of an entry point used: 1 = new, 0 = previous, -1 = none since the last query.
+std::atomic<int> g_last_path{-1};
+
+bool old_kernels() {
+    const int s = g_select_old.load(std::memory_order_relaxed);
+    if (s >= 0) return s != 0;
+    static const bool env = [] {
+        const char* e = std::getenv("STRATA_OLD_GROUPED");
+        return e != nullptr && e[0] == '1';
+    }();
+    return env;
+}
+
+// `STRATA_GROUPED_PAIR_MIN_HITS=N`: the per-hit path keeps the previous one-warp-per-row kernels below N hits of
+// capacity.  The new per-hit kernels launch half the warps (two rows each), so one hit's gate/up is 80 blocks - fewer
+// than an RTX 5090's SMs - and whether that costs time at one to three hits is what `--bench` measures.  Bitwise
+// the same either way; default 0 (always the new kernels).  Ignored while `moe_grouped_select_old` forces a choice.
+long long pair_min_hits() {
+    if (g_select_old.load(std::memory_order_relaxed) >= 0) return 0;
+    static const long long n = [] {
+        const char* e = std::getenv("STRATA_GROUPED_PAIR_MIN_HITS");
+        return e != nullptr ? std::atoll(e) : 0LL;
+    }();
+    return n;
+}
+
+// The new kernels read the activations as aligned words (`load_x_chunk`), so they need 4-byte aligned activation
+// rows - the input's and the intermediate's in `scratch`; the per-hit ones also read a blob's codes as uint2, which
+// needs an 8-byte aligned arena and slot size (the grouped kernels above already did).  Anything else keeps the
+// previous kernels rather than issuing a misaligned load.
+bool new_grouped(const void* x_q8_0, const void* scratch) {
+    const bool fast = !old_kernels() && ((uintptr_t) x_q8_0 & 3) == 0 && ((uintptr_t) scratch & 3) == 0;
+    g_last_path.store(fast ? 1 : 0, std::memory_order_relaxed);
+    return fast;
+}
+
+bool new_hit(const void* blob_base, long long blob_bytes, const void* x_q8_0, const void* scratch, long long cap) {
+    const bool fast = new_grouped(x_q8_0, scratch) && ((uintptr_t) blob_base & 7) == 0 && (blob_bytes & 7) == 0 &&
+                      cap >= pair_min_hits();
+    g_last_path.store(fast ? 1 : 0, std::memory_order_relaxed);
+    return fast;
+}
+
+// The per-hit path's two projections, previous or new kernels (one warp per row, or per pair of rows).
+void launch_hit_gu(bool fast, const uint8_t *blob_base,
+                   const int32_t *slot_index, long long blob_bytes,
+                   const uint8_t *x_q8_0, const float *x_scales, float *gate_up,
+                   long long cap, const int32_t *d_count,
+                   const int32_t *dst_index, int tok_div, dpct::queue_ptr cs) {
+    const int warps = THREADS / 32;
+    if (fast) {
+        const long long pairs = cap * (long long) FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_pair_kernel_787004>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((pairs + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_pair_kernel(blob_base, slot_index, blob_bytes,
+                                       x_q8_0, x_scales, gate_up, (int)cap,
+                                       d_count, dst_index, tok_div);
+                    });
+        }
+    } else {
+        const long long rows = cap * 2LL * FF;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class gu_kernel_55bc52>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
+                                  x_scales, gate_up, (int)cap, d_count,
+                                  dst_index, tok_div);
+                    });
+        }
+    }
+}
+
+void launch_hit_down(bool fast, const uint8_t *blob_base,
+                     const int32_t *slot_index, const int32_t *dst_index,
+                     long long blob_bytes, const uint8_t *h_q8_0,
+                     const float *h_scales, float *out, long long cap,
+                     const int32_t *d_count, dpct::queue_ptr cs) {
+    const int warps = THREADS / 32;
+    if (fast) {
+        const long long pairs = cap * (long long) (H / 2);
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class down_pair_kernel_7d15d9>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((pairs + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        down_pair_kernel(blob_base, slot_index, dst_index,
+                                         blob_bytes, h_q8_0, h_scales, out,
+                                         (int)cap, d_count);
+                    });
+        }
+    } else {
+        const long long rows = cap * (long long) H;
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<dpct_kernel_name<class down_kernel_b3587f>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
+                        sycl::range(1, 1, THREADS),
+                    sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        down_kernel(blob_base, slot_index, dst_index,
+                                    blob_bytes, h_q8_0, h_scales, out, (int)cap,
+                                    d_count);
+                    });
+        }
+    }
+}
+
 }  // namespace
 
+void moe_grouped_select_old(int old) { g_select_old.store(old < 0 ? -1 : (old != 0 ? 1 : 0)); }
+
+int moe_grouped_last_path() { return g_last_path.exchange(-1, std::memory_order_relaxed); }
+
 uint64_t moe_hit_grouped_scratch_bytes(int64_t n_hits, int64_t n_embd, int64_t n_ff) {
     if (n_hits <= 0) return 0;
     const uint64_t gu = (uint64_t) n_hits * (uint64_t) (2 * n_ff) * 4;
@@ -484,7 +841,7 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
                         void* stream, const float* x_scales) {
     if (n_hits <= 0) return;
     dpct::queue_ptr cs = strata::q_of(stream);
-    const int warps = THREADS / 32;
+    const bool fast = new_hit(blob_base, blob_bytes, x_q8_0, scratch, n_hits);
 
     const uint64_t gu_bytes = ((uint64_t) n_hits * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
     const uint64_t q8_bytes = ((uint64_t) n_hits * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
@@ -494,24 +851,8 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
 
     // 1. gate + up, one launch for every row of every hit.
     {
-        const long long rows = n_hits * 2LL * FF;
-        const unsigned blocks = (unsigned) ((rows + warps - 1) / warps);
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_7c8537>>(
-                sycl::nd_range<3>(sycl::range(1, 1, blocks) *
-                                      sycl::range(1, 1, THREADS),
-                                  sycl::range(1, 1, THREADS)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
-                                  x_scales, gate_up, (int)n_hits, nullptr,
-                                  nullptr, 0);
-                    });
-        }
+        launch_hit_gu(fast, blob_base, slot_index, blob_bytes, x_q8_0, x_scales, gate_up, n_hits, nullptr, nullptr,
+                      0, cs);
         check("moe_hit_grouped_s2/gu", stream);
     }
     // 2. silu(gate) * up.
@@ -541,30 +882,8 @@ void moe_hit_grouped_s2(const uint8_t* blob_base, const int32_t* slot_index, con
     else quantize_q8_0(gate_up, h_q8_0, n_hits * (int64_t) FF, stream);
     // 4. down.
     {
-        const long long rows = n_hits * (long long) H;
-        const unsigned blocks = (unsigned) ((rows + warps - 1) / warps);
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->submit([&](sycl::handler &cgh) {
-                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
-                    x_scales != nullptr ? h_scales : nullptr;
-
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_b856bc>>(
-                    sycl::nd_range<3>(sycl::range(1, 1, blocks) *
-                                          sycl::range(1, 1, THREADS),
-                                      sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1)
-                        [[sycl::reqd_sub_group_size(32)]] {
-                            down_kernel(blob_base, slot_index, dst_index,
-                                        blob_bytes, h_q8_0,
-                                        x_scales_nullptr_h_scales_nullptr_ct5,
-                                        out, (int)n_hits, nullptr);
-                        });
-            });
-        }
+        launch_hit_down(fast, blob_base, slot_index, dst_index, blob_bytes, h_q8_0,
+                        x_scales != nullptr ? h_scales : nullptr, out, n_hits, nullptr, cs);
         check("moe_hit_grouped_s2/down", stream);
     }
 }
@@ -684,31 +1003,15 @@ void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index,
                             void* scratch, float* out, void* stream, const float* x_scales) {
     if (cap <= 0) return;
     dpct::queue_ptr cs = strata::q_of(stream);
-    const int warps = THREADS / 32;
+    const bool fast = new_hit(blob_base, blob_bytes, x_q8_0, scratch, cap);
     const uint64_t gu_bytes = ((uint64_t) cap * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
     const uint64_t q8_bytes = ((uint64_t) cap * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
     float* gate_up = (float*) scratch;
     uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
     float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
     {
-        const long long rows = cap * 2LL * FF;
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_e0f313>>(
-                sycl::nd_range<3>(
-                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
-                        sycl::range(1, 1, THREADS),
-                    sycl::range(1, 1, THREADS)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
-                                  x_scales, gate_up, (int)cap, d_count, nullptr,
-                                  0);
-                    });
-        }
+        launch_hit_gu(fast, blob_base, slot_index, blob_bytes, x_q8_0, x_scales, gate_up, cap, d_count, nullptr, 0,
+                      cs);
         check("moe_hit_grouped_s2_dev/gu", stream);
     }
     {
@@ -732,31 +1035,8 @@ void moe_hit_grouped_s2_dev(const uint8_t* blob_base, const int32_t* slot_index,
     if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap * (int64_t) FF, stream);
     else quantize_q8_0(gate_up, h_q8_0, cap * (int64_t) FF, stream);
     {
-        const long long rows = cap * (long long) H;
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->submit([&](sycl::handler &cgh) {
-                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
-                    x_scales != nullptr ? h_scales : nullptr;
-
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_bd8167>>(
-                    sycl::nd_range<3>(
-                        sycl::range(1, 1,
-                                    (unsigned)((rows + warps - 1) / warps)) *
-                            sycl::range(1, 1, THREADS),
-                        sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1)
-                        [[sycl::reqd_sub_group_size(32)]] {
-                            down_kernel(blob_base, slot_index, dst_index,
-                                        blob_bytes, h_q8_0,
-                                        x_scales_nullptr_h_scales_nullptr_ct5,
-                                        out, (int)cap, d_count);
-                        });
-            });
-        }
+        launch_hit_down(fast, blob_base, slot_index, dst_index, blob_bytes, h_q8_0,
+                        x_scales != nullptr ? h_scales : nullptr, out, cap, d_count, cs);
         check("moe_hit_grouped_s2_dev/down", stream);
     }
 }
@@ -788,31 +1068,15 @@ void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_inde
                               const float* x_scales, int k_per_token, void* scratch, float* out, void* stream) {
     if (cap <= 0) return;
     dpct::queue_ptr cs = strata::q_of(stream);
-    const int warps = THREADS / 32;
+    const bool fast = new_hit(blob_base, blob_bytes, x_q8_0, scratch, cap);
     const uint64_t gu_bytes = ((uint64_t) cap * (uint64_t) (2 * FF) * 4 + 15) & ~15ull;
     const uint64_t q8_bytes = ((uint64_t) cap * (uint64_t) (FF / 32) * 34 + 15) & ~15ull;
     float* gate_up = (float*) scratch;
     uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
     float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
     {
-        const long long rows = cap * 2LL * FF;
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->parallel_for<dpct_kernel_name<class gu_kernel_30a25d>>(
-                sycl::nd_range<3>(
-                    sycl::range(1, 1, (unsigned)((rows + warps - 1) / warps)) *
-                        sycl::range(1, 1, THREADS),
-                    sycl::range(1, 1, THREADS)),
-                exp_props,
-                [=](sycl::nd_item<3> item_ct1)
-                    [[sycl::reqd_sub_group_size(32)]] {
-                        gu_kernel(blob_base, slot_index, blob_bytes, x_q8_0,
-                                  x_scales, gate_up, (int)cap, d_count,
-                                  dst_index, k_per_token);
-                    });
-        }
+        launch_hit_gu(fast, blob_base, slot_index, blob_bytes, x_q8_0, x_scales, gate_up, cap, d_count, dst_index,
+                      k_per_token, cs);
         check("moe_hit_grouped_s2_multi/gu", stream);
     }
     {
@@ -836,31 +1100,8 @@ void moe_hit_grouped_s2_multi(const uint8_t* blob_base, const int32_t* slot_inde
     if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap * (int64_t) FF, stream);
     else quantize_q8_0(gate_up, h_q8_0, cap * (int64_t) FF, stream);
     {
-        const long long rows = cap * (long long) H;
-        {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            cs->submit([&](sycl::handler &cgh) {
-                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
-                    x_scales != nullptr ? h_scales : nullptr;
-
-                cgh.parallel_for<dpct_kernel_name<class down_kernel_a919b8>>(
-                    sycl::nd_range<3>(
-                        sycl::range(1, 1,
-                                    (unsigned)((rows + warps - 1) / warps)) *
-                            sycl::range(1, 1, THREADS),
-                        sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1)
-                        [[sycl::reqd_sub_group_size(32)]] {
-                            down_kernel(blob_base, slot_index, dst_index,
-                                        blob_bytes, h_q8_0,
-                                        x_scales_nullptr_h_scales_nullptr_ct5,
-                                        out, (int)cap, d_count);
-                        });
-            });
-        }
+        launch_hit_down(fast, blob_base, slot_index, dst_index, blob_bytes, h_q8_0,
+                        x_scales != nullptr ? h_scales : nullptr, out, cap, d_count, cs);
         check("moe_hit_grouped_s2_multi/down", stream);
     }
 }
@@ -1022,6 +1263,183 @@ auto &hs_q =
         }
     }
 }
+
+// ---- The grouped kernels with the staged activations laid out for the reads.
+//
+// **THE LAYOUT ABOVE IS AN 8-WAY BANK CONFLICT.**  `xs_q[k][c * 8 + j]` puts lane `L`'s word `j` at `8L + j`, so
+// lanes `L, L + 4, L + 8, ...` share a bank on every one of the chunk's eight reads; and `chunk_dot` recomputes
+// `hx`, which depends on the entry alone, for every row.  Here the staging writes, once per (entry, chunk):
+//
+//     xs_w[j][k * NC + c]   word j of the regrouped chunk (`load_x_chunk`), so lanes read consecutive words
+//     xs_dh[k * NC + c]     (dx, hx) - one 64-bit read per chunk instead of a float and eight `dp4a`
+//
+// Word-major, the staging writes are consecutive as well (the flat index `i` IS `k * NC + c`), so neither side
+// conflicts and no padding is needed.  Each warp takes its rows TWO at a time (adjacent rows: gate `r` and up `r`,
+// or down rows `r, r + 1`), so every shared read serves both; the codes of both are expanded once per row, not
+// once per entry.  Per (row, entry) the lane's chunks, their order, the float expression and the shuffle
+// reduction are the kernels' above, so every output is bitwise theirs.
+
+// Stages chunk `i = k * NC + c` of a group: its regrouped words at `xs_w[j * STRIDE + i]` and (dx, hx) at `xs_dh[i]`.
+template <int STRIDE>
+__dpct_inline__ void stage_chunk(const uint8_t *__restrict__ xb, float dx,
+                                 int *xs_w, sycl::int2 *xs_dh, int i) {
+    int X[8];
+    const int hx = load_x_chunk(xb, X);
+#pragma unroll
+    for (int j = 0; j < 8; ++j) xs_w[j * STRIDE + i] = X[j];
+    xs_dh[i] = sycl::int2(sycl::bit_cast<int>(dx), hx);
+}
+
+/*
+DPCT1110: The total declared local variable size in device function
+gu_grouped_t_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gu_grouped_t_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_tok, const uint8_t *__restrict__ x_q8_0,
+    const float *__restrict__ x_scales, float *__restrict__ gate_up,
+    int cap_entries) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int NC = H / 32;
+    auto &xs_w = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        int[8 * GMAX * NC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<
+            3>()); // 20 KB: word j of entry k's chunk c at [j][k * NC + c]
+    auto &xs_dh = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        sycl::int2[GMAX * NC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>()); // 5 KB: (dx as
+                                                                 // bits, hx)
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int e0 = grp_start[g], ne = sycl::min(grp_start[g + 1] - e0, GMAX);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    for (int i = t; i < ne * NC; i += item_ct1.get_local_range(2)) {
+        const int k = i / NC, c = i - k * NC;
+        const int tok = ent_tok[e0 + k];
+        const uint8_t* xb = x_q8_0 + (size_t) tok * (size_t) NC * 34 + (size_t) c * 34;
+        const float dx = x_scales ? x_scales[(size_t) tok * NC + c] : f16_ld(xb);
+        stage_chunk<GMAX * NC>(xb, dx, xs_w, xs_dh, i);
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int row0 = item_ct1.get_group(2) *
+                     GU_ROWS; // even: a pair is always (gate r, up r)
+    for (int pp = warp; pp < GU_ROWS / 2; pp += 8) {
+        const int i = row0 + 2 * pp;
+        const uint8_t* codes = blob + (size_t) i * ROW_GU;
+        const uint8_t* scales = blob + O_GU_SCALES + (size_t) i * SC_GU * 2;
+        int m0[GU_CHUNKS][8], m1[GU_CHUNKS][8];
+        float dw0[GU_CHUNKS], dw1[GU_CHUNKS];
+#pragma unroll
+        for (int q = 0; q < GU_CHUNKS; ++q) {
+            const int c = lane + 32 * q;
+            if (c < NC) {
+                expand_codes(*(const sycl::uint2 *)(codes + (size_t)c * 8),
+                             m0[q]);
+                expand_codes(
+                    *(const sycl::uint2 *)(codes + ROW_GU + (size_t)c * 8),
+                    m1[q]);
+                dw0[q] = f16_ld(scales + (size_t) (c >> 1) * 2);
+                dw1[q] = f16_ld(scales + SC_GU * 2 + (size_t) (c >> 1) * 2);
+            }
+        }
+        for (int k = 0; k < ne; ++k) {
+            float acc0 = 0.0f, acc1 = 0.0f;
+#pragma unroll
+            for (int q = 0; q < GU_CHUNKS; ++q) {
+                const int c = lane + 32 * q;
+                if (c >= NC) break;
+                const int at = k * NC + c;
+                int X[8];
+#pragma unroll
+                for (int j = 0; j < 8; ++j) X[j] = xs_w[j * (GMAX * NC) + at];
+                const sycl::int2 dh = xs_dh[at];
+                const float dx = sycl::bit_cast<float>(dh.x());
+                acc0 += dw0[q] * dx * (float)(chunk_s(m0[q], X) - dh.y());
+                acc1 += dw1[q] * dx * (float)(chunk_s(m1[q], X) - dh.y());
+            }
+            const float s0 = warp_sum(acc0);
+            const float s1 = warp_sum(acc1);
+            if (lane == 0) {
+                const int e = e0 + k, r = i >> 1;
+                gate_up[(size_t) e * FF + (size_t) r] = s0;
+                gate_up[(size_t) cap_entries * FF + (size_t) e * FF + (size_t) r] = s1;
+            }
+        }
+    }
+}
+
+/*
+DPCT1110: The total declared local variable size in device function
+down_grouped_t_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void down_grouped_t_kernel(
+    const unsigned long long *__restrict__ grp_ptr,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    const int32_t *__restrict__ ent_dst, const uint8_t *__restrict__ h_q8_0,
+    const float *__restrict__ h_scales, float *__restrict__ out) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int NC = FF / 32;
+    auto &hs_w = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        int[8 * GMAX * NC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &hs_dh = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        sycl::int2[GMAX * NC]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int g = item_ct1.get_group(1);
+    if (g >= *n_groups) return;
+    const int e0 = grp_start[g], ne = sycl::min(grp_start[g + 1] - e0, GMAX);
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    for (int i = t; i < ne * NC; i += item_ct1.get_local_range(2)) {
+        const int k = i / NC, c = i - k * NC;
+        const uint8_t* xb = h_q8_0 + (size_t) (e0 + k) * (size_t) NC * 34 + (size_t) c * 34;
+        const float dx = h_scales ? h_scales[(size_t) (e0 + k) * NC + c] : f16_ld(xb);
+        stage_chunk<GMAX * NC>(xb, dx, hs_w, hs_dh, i);
+    }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int row0 = item_ct1.get_group(2) * D_ROWS;
+    for (int pp = warp; pp < D_ROWS / 2; pp += 8) {
+        const int r = row0 + 2 * pp;
+        const uint8_t* codes = blob + O_D_CODES + (size_t) r * ROW_D;
+        const uint8_t* scales = blob + O_D_SCALES + (size_t) r * SC_D * 2;
+        const int c = lane;                                // lanes 0..19 hold one chunk each, as above
+        int m0[8], m1[8];
+        float dw0 = 0.0f, dw1 = 0.0f;
+        if (c < NC) {
+            expand_codes(*(const sycl::uint2 *)(codes + (size_t)c * 8), m0);
+            expand_codes(*(const sycl::uint2 *)(codes + ROW_D + (size_t)c * 8),
+                         m1);
+            dw0 = f16_ld(scales + (size_t) (c >> 1) * 2);
+            dw1 = f16_ld(scales + SC_D * 2 + (size_t) (c >> 1) * 2);
+        }
+        for (int k = 0; k < ne; ++k) {
+            float acc0 = 0.0f, acc1 = 0.0f;
+            if (c < NC) {
+                const int at = k * NC + c;
+                int X[8];
+#pragma unroll
+                for (int j = 0; j < 8; ++j) X[j] = hs_w[j * (GMAX * NC) + at];
+                const sycl::int2 dh = hs_dh[at];
+                const float dx = sycl::bit_cast<float>(dh.x());
+                acc0 += dw0 * dx * (float)(chunk_s(m0, X) - dh.y());
+                acc1 += dw1 * dx * (float)(chunk_s(m1, X) - dh.y());
+            }
+            const float s0 = warp_sum(acc0);
+            const float s1 = warp_sum(acc1);
+            if (lane == 0) {
+                const size_t o = (size_t) ent_dst[e0 + k] * H + (size_t) r;
+                out[o] = s0;
+                out[o + 1] = s1;
+            }
+        }
+    }
+}
 }  // namespace
 
 namespace {
@@ -1120,15 +1538,32 @@ void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start,
     float* gate_up = (float*) scratch;
     uint8_t* h_q8_0 = (uint8_t*) scratch + gu_bytes;
     float* h_scales = (float*) ((uint8_t*) scratch + gu_bytes + q8_bytes);
+    const bool fast = new_grouped(x_q8_0, scratch);
     {
+        const dpct::dim3 grid((unsigned)(2 * FF / GU_ROWS),
+                              (unsigned)cap_groups);
+        if (fast)
         {
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
+            cs->parallel_for<
+                dpct_kernel_name<class gu_grouped_t_kernel_998f94>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        gu_grouped_t_kernel(grp_ptr, grp_start, n_groups,
+                                            ent_tok, x_q8_0, x_scales, gate_up,
+                                            (int)cap_entries);
+                    });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
             cs->parallel_for<dpct_kernel_name<class gu_grouped_kernel_c9eb4d>>(
-                sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
-                                              (unsigned)(2 * FF / GU_ROWS)) *
-                                      sycl::range(1, 1, 256),
+                sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
@@ -1161,28 +1596,37 @@ void moe_grouped_s2(const unsigned long long* grp_ptr, const int32_t* grp_start,
     if (x_scales != nullptr) quantize_q8_0_scaled(gate_up, h_q8_0, h_scales, cap_entries * (int64_t) FF, stream);
     else quantize_q8_0(gate_up, h_q8_0, cap_entries * (int64_t) FF, stream);
     {
+        const dpct::dim3 grid((unsigned)(H / D_ROWS), (unsigned)cap_groups);
+        const float* hs = x_scales != nullptr ? h_scales : nullptr;
+        if (fast)
         {
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
 
-            cs->submit([&](sycl::handler &cgh) {
-                const float *x_scales_nullptr_h_scales_nullptr_ct5 =
-                    x_scales != nullptr ? h_scales : nullptr;
-
-                cgh.parallel_for<
-                    dpct_kernel_name<class down_grouped_kernel_ea4417>>(
-                    sycl::nd_range<3>(sycl::range(1, (unsigned)cap_groups,
-                                                  (unsigned)(H / D_ROWS)) *
-                                          sycl::range(1, 1, 256),
-                                      sycl::range(1, 1, 256)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1)
-                        [[sycl::reqd_sub_group_size(32)]] {
-                            down_grouped_kernel(
-                                grp_ptr, grp_start, n_groups, ent_dst, h_q8_0,
-                                x_scales_nullptr_h_scales_nullptr_ct5, out);
-                        });
-            });
+            cs->parallel_for<
+                dpct_kernel_name<class down_grouped_t_kernel_12b16d>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        down_grouped_t_kernel(grp_ptr, grp_start, n_groups,
+                                              ent_dst, h_q8_0, hs, out);
+                    });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            cs->parallel_for<
+                dpct_kernel_name<class down_grouped_kernel_ea4417>>(
+                sycl::nd_range<3>(grid * sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        down_grouped_kernel(grp_ptr, grp_start, n_groups,
+                                            ent_dst, h_q8_0, hs, out);
+                    });
         }
         check("moe_grouped_s2/down", stream);
     }
diff --git a/sycl/src/kernels/cuda/sampler.dp.cpp b/sycl/src/kernels/cuda/sampler.dp.cpp
index e438ca877a9..5727fd394ca 100644
--- a/sycl/src/kernels/cuda/sampler.dp.cpp
+++ b/sycl/src/kernels/cuda/sampler.dp.cpp
@@ -23,6 +23,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/sampler.hpp"
+#include "strata/core/coupled_draft.hpp"
 
 #include <cmath>
 #include <cstdio>
@@ -512,9 +513,13 @@ __dpct_inline__ void warp_first(float &bv, int &bi) {
 /// the same argument, the sums in the same order, `cum += e / sum` with the same correctly rounded quotient - so
 /// the cut, the survivors and the pick are the same.  (`n_keep == 0`, reachable only with min_p > 1, which the
 /// callers clamp, read `sel_ids[-1]` in the old tail; it reads `sel_ids[0]` here.)
+/// kProb (the coupled draft only): lane 0 also writes the pick's probability under the final distribution to
+/// `*prob_out`.  The sampler's own calls take kProb = false, whose code is the tail above, unchanged.
+template <bool kProb = false>
 inline void sampled_tail_warp(const int *sel_ids, const float *sel_logit, int k,
                               const SamplerParams &p, int t,
-                              int *__restrict__ out, double *ex) {
+                              int *__restrict__ out, double *ex,
+                              float *prob_out = nullptr) {
     const int lane =
         (int)(sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(
                   2) &
@@ -590,9 +595,9 @@ inline void sampled_tail_warp(const int *sel_ids, const float *sel_logit, int k,
 #pragma unroll
         for (int i = 0; i < n_keep; ++i) sum += ex[i];
     /*
-    DPCT1108: '__shfl_sync' was migrated with the experimental feature masked
-    sub_group function which may not be supported by all compilers or runtimes.
-    You may need to adjust the code.
+    DPCT1108: '__shfl_sync' was migrated with the experimental feature
+    masked sub_group function which may not be supported by all compilers or
+    runtimes. You may need to adjust the code.
     */
     sum = dpct::experimental::select_from_sub_group(
         kFullMask, sycl::ext::oneapi::this_work_item::get_sub_group(), sum, 0);
@@ -603,13 +608,15 @@ inline void sampled_tail_warp(const int *sel_ids, const float *sel_logit, int k,
     if (lane == 0) {
         const float u = philox_uniform(p.seed, p.counter + (uint64_t) t);
         double cum = 0.0;
-        int pick = sel_ids[n_keep > 0 ? n_keep - 1 : 0];
+        int pi = n_keep > 0 ? n_keep - 1 : 0;
+        int pick = sel_ids[pi];
 #pragma unroll
         for (int i = 0; i < n_keep; ++i) {
             cum += ex[i];
-            if ((double) u < cum) { pick = sel_ids[i]; break; }
+            if ((double) u < cum) { pick = sel_ids[i]; pi = i; break; }
         }
         out[t] = pick;
+        if constexpr (kProb) *prob_out = n_keep > 0 ? (float) ex[pi] : 1.0f;
     }
 }
 
@@ -981,6 +988,122 @@ sampler_split_merge_kernel(const sycl::int2 *__restrict__ cand, int n_blocks,
     sampled_tail_warp(sel_ids, sel_logit, k, p, t, out, ex);
 }
 
+// ---- COUPLED DRAFT SAMPLING (include/strata/core/coupled_draft.hpp): the MTP draft layer samples its draft with the
+// target's chain and the target's Philox draw.  Everything that varies per request or per round - the chain's
+// parameters, the seed, the counter (from the cell's step record), the penalty history - is read from DEVICE memory:
+// these kernels are captured into the drafter's round/step graphs.  One row, `nv` logits: the draft head's
+// vocabulary subset (rt/draft_vocab.bin) or the whole vocabulary; `sub_to_id` maps a subset index to its token id.
+
+/// The round's inputs: the request's SamplerParams and the history base (the last h slots before `cap`), from
+/// mapped host memory into the device copies the chain's kernels read.
+__dpct_inline__ void coupled_stage_kernel(const SamplerParams *__restrict__ mp,
+                                          const int *__restrict__ mh,
+                                          SamplerParams *__restrict__ dp,
+                                          int *__restrict__ ring, int cap) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const volatile int *s = (const volatile int *)mp;
+    int* d = (int*) dp;
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2);
+         i < (int)(sizeof(SamplerParams) / sizeof(int));
+         i += item_ct1.get_local_range(2)) d[i] = s[i];
+    const int h = strata::core::coupled_hist_len(((const volatile SamplerParams*) mp)->penalty_last_n, cap);
+    const volatile int* vh = (const volatile int*) mh;
+#pragma unroll
+    for (int i = cap - h + (int)item_ct1.get_local_id(2); i < cap;
+         i += item_ct1.get_local_range(2)) ring[i] = vh[i];
+}
+
+/// The penalties, applied in place to the draft logits before the selection - the target applies the same
+/// `apply_penalties` to the same token with the same count over the same window before its own.  Draft j's window
+/// is the ring's [cap + j - h, cap + j): the base plus drafts 0 .. j-1.  A history token outside the draft head's
+/// subset has no logit here.  Each distinct token is penalised once: the entry whose `atomicOr` sets its bit does it.
+__dpct_inline__ void coupled_penalize_kernel(
+    float *__restrict__ logits, int nv, const int *__restrict__ id_to_sub,
+    int id_vocab, const SamplerParams *__restrict__ dp,
+    const int *__restrict__ ring, int cap, int j, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const SamplerParams p = *dp;
+    const int h = strata::core::coupled_hist_len(p.penalty_last_n, cap);
+    if (h <= 0) return;
+    const int* hrow = ring + strata::core::coupled_hist_start(cap, j, h);
+    auto seen = (unsigned int *)dpct_local;
+    const int words = (nv + 31) / 32;
+#pragma unroll
+    for (int w = item_ct1.get_local_id(2); w < words;
+         w += item_ct1.get_local_range(2)) seen[w] = 0u;
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    for (int i = item_ct1.get_local_id(2); i < h;
+         i += item_ct1.get_local_range(2)) {
+        const int v = hrow[i];
+        if (v < 0 || v >= id_vocab) continue;
+        const int s = id_to_sub != nullptr ? id_to_sub[v] : v;
+        if (s < 0 || s >= nv) continue;
+        const unsigned bit = 1u << (s & 31);
+        if (dpct::atomic_fetch_or<sycl::access::address_space::generic_space>(
+                &seen[s >> 5], bit) &
+            bit) continue;
+        logits[s] = apply_penalties(logits[s], history_count(hrow, h, v), p);
+    }
+}
+
+/// The merge of `sampler_split_merge_kernel` (lists of `kpart` entries, the request's top_k taken from them), then
+/// `sampled_tail_warp` with the counter of the row that will verify this draft.  Lane 0 maps the pick to its token
+/// id, writes it and its probability, and appends it to the ring for the next draft's penalty window.
+__dpct_inline__ void coupled_merge_kernel(
+    const sycl::int2 *__restrict__ cand, int n_blocks, int nv, int kpart,
+    const SamplerParams *__restrict__ dp, const int *__restrict__ step_rec,
+    const int *__restrict__ sub_to_id, int *__restrict__ ring, int cap, int j,
+    int *__restrict__ out_id, float *__restrict__ out_prob) {
+    const int lane =
+        (int)sycl::ext::oneapi::this_work_item::get_nd_item<3>().get_local_id(
+            2);
+    SamplerParams p = *dp;
+    p.counter = strata::core::coupled_draft_counter((int64_t) step_rec[0]);
+    const int k = sampled_k(p.top_k, nv);    // <= kpart: the first k of a union lie in the first k of each list
+    auto &lists = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        sycl::int2[kSplitMaxBlocks * kSelMax]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_ids =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sel_logit =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &ex =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<double[kSelMax]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &pick = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[1]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &prob = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[1]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+#pragma unroll
+    for (int e = lane; e < n_blocks * kpart; e += 32) lists[e] = cand[e];
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    warp_merge_lists(lists, n_blocks, kpart, k, nv, [&](int i, float v, int id) {
+        if (lane == 0) { sel_ids[i] = id < nv ? id : 0; sel_logit[i] = v; }
+    });
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    if (p.greedy || p.temperature <= 0.0f) {   // never launched for greedy requests; the argmax, defensively
+        if (lane == 0) { pick[0] = sel_ids[0]; prob[0] = 1.0f; }
+    } else {
+        sampled_tail_warp<true>(sel_ids, sel_logit, k, p, 0, pick, ex, prob);
+    }
+    sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
+    if (lane == 0) {
+        const int s = pick[0];
+        const int id = sub_to_id != nullptr ? sub_to_id[s] : s;
+        *out_id = id;
+        *out_prob = prob[0];
+        ring[cap + j] = id;
+    }
+}
+
 // Which sampled path runs, read once: `STRATA_OLD_SAMPLER=1` is `sampler_kernel` (engine 0.1.20),
 // `STRATA_SAMPLER_ONE_BLOCK=1` the one-block kernel; by default the split top_k wherever it applies.
 enum class SampledPath { Split, OneBlock, Old };
@@ -1283,4 +1406,118 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
     if (stream == nullptr) dpct::get_current_device().queues_wait_and_throw();
 }
 
+namespace {
+int coupled_blocks(int nv) { return (nv + kSplitBlockSpan - 1) / kSplitBlockSpan; }
+int coupled_kpart(int nv) { return nv < kSelMax ? nv : kSelMax; }
+void coupled_check(const char* what) {
+    /*
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    const dpct::err0 e = 0;
+}
+}  // namespace
+
+size_t coupled_draft_scratch_bytes(int nv) {
+    if (nv <= 0 || coupled_blocks(nv) > kSplitMaxBlocks) return 0;
+    return (size_t)coupled_blocks(nv) * (size_t)kSelMax * sizeof(sycl::int2);
+}
+
+void coupled_draft_stage(const SamplerParams* mapped_params, const int32_t* mapped_hist, SamplerParams* params,
+                         int32_t* ring, int cap, void* stream) {
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class coupled_stage_kernel_113245>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 256),
+                                  sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    coupled_stage_kernel(mapped_params, mapped_hist, params,
+                                         ring, cap);
+                });
+    }
+    coupled_check("coupled_draft_stage");
+}
+
+void coupled_draft_sample(float* logits, int nv, const int32_t* sub_to_id, const int32_t* id_to_sub, int id_vocab,
+                          const SamplerParams* params, int32_t* ring, int cap, int j, const int32_t* step_rec,
+                          void* scratch, int32_t* out_id, float* out_prob, void* stream) {
+    const dpct::queue_ptr s = strata::q_of(stream);
+    const int n_blocks = coupled_blocks(nv), kpart = coupled_kpart(nv);
+    if (nv <= 0 || n_blocks > kSplitMaxBlocks || scratch == nullptr) {
+        std::fprintf(stderr, "coupled_draft_sample: %d logits need scratch and at most %d blocks\n", nv, kSplitMaxBlocks);
+        std::exit(1);
+    }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->submit([&](sycl::handler &cgh) {
+            /*
+            DPCT1083: The size of local memory in the migrated code may be
+            different from the original code. Check that the allocated memory
+            size in the migrated code is correct.
+            */
+            sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                sycl::range((unsigned)((nv + 31) / 32) * sizeof(unsigned)),
+                cgh);
+
+            cgh.parallel_for<
+                dpct_kernel_name<class coupled_penalize_kernel_6ca8a2>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    coupled_penalize_kernel(
+                        logits, nv, id_to_sub, id_vocab, params, ring, cap, j,
+                        dpct_local_acc_ct1
+                            .get_multi_ptr<sycl::access::decorated::no>()
+                            .get());
+                });
+        });
+    }
+    coupled_check("coupled_penalize");
+    // the selection of the split sampler, unchanged: every 4,096-logit block's first `kpart` (the widest list,
+    // since the request's top_k is only known on the device), penalties already applied above
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        s->parallel_for<
+            dpct_kernel_name<class sampler_split_part_kernel_cc5674>>(
+            sycl::nd_range<3>(sycl::range(1, 1u, (unsigned)n_blocks) *
+                                  sycl::range(1, 1, kSplitWarps * 32),
+                              sycl::range(1, 1, kSplitWarps * 32)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                sampler_split_part_kernel(logits, nv, nullptr, 0,
+                                          SamplerParams{}, kpart, n_blocks,
+                                          (sycl::int2 *)scratch);
+            });
+    }
+    coupled_check("coupled_draft split part");
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+        dpct::has_capability_or_fail(s->get_device(), {sycl::aspect::fp64});
+
+        s->parallel_for<dpct_kernel_name<class coupled_merge_kernel_1fbeb1>>(
+            sycl::nd_range<3>(sycl::range(1, 1, 32), sycl::range(1, 1, 32)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                coupled_merge_kernel((const sycl::int2 *)scratch, n_blocks, nv,
+                                     kpart, params, step_rec, sub_to_id, ring,
+                                     cap, j, out_id, out_prob);
+            });
+    }
+    coupled_check("coupled_draft merge");
+}
+
 }  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index 25f05990e7c..7b9178e1850 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -9,10 +9,10 @@
 #include "strata/sycl_doorbell.hpp"
 #include "strata/kernels/verify_kernels.hpp"
 #include "strata/kernels/resident_plan_mirror.hpp"
+#include "strata/kernels/dp4a.hpp"
 
 #include <cstdio>
 #include <cstdlib>
-#include <time.h>
 
 #ifndef STRATA_PLAN_LOCAL
 #define STRATA_PLAN_LOCAL 1   // 0: the original one-thread plan kernel (A/B)
@@ -911,12 +911,7 @@ void gdn_step_norm_multi(float* state, const float* h, int conv_channels, const
 namespace {
 __dpct_inline__ void wait_flag_ge_kernel(const volatile uint32_t *flag,
                                          uint32_t value) {
-    /*
-    DPCT1008: __nanosleep function is not defined in SYCL. This is a
-    hardware-specific feature. Consult with your hardware vendor to find a
-    replacement.
-    */
-    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) strata_spin_pause();
     /*
     DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
@@ -1076,12 +1071,7 @@ __dpct_inline__ void wait_flag_ge_or_kernel(const volatile uint32_t *flag,
                                             uint32_t value,
                                             const volatile uint32_t *skip) {
     if (strata::sys_load(skip) == value) return;
-    /*
-    DPCT1008: __nanosleep function is not defined in SYCL. This is a
-    hardware-specific feature. Consult with your hardware vendor to find a
-    replacement.
-    */
-    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}
+    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) strata_spin_pause();
     /*
     DPCT1078: Consider replacing memory_order::acq_rel with
     memory_order::seq_cst for correctness if strong memory order restrictions
@@ -1288,7 +1278,7 @@ namespace {
     __dpct_inline__ void gpu_stamp_kernel(unsigned long long *buf, int i) {
     unsigned long long t;
 #if defined(__HIPCC__)
-    t = wall_clock64() * 10ull;   // gfx11: a constant 100 MHz counter, in ns
+    t = wall_clock64() * 10ull;   // gfx11 / gfx12: a constant 100 MHz counter, in ns
 #else
     /*
     DPCT1053: Migration of device assembly code is not supported.
diff --git a/sycl/src/kernels/iq_multi_parity.cpp b/sycl/src/kernels/iq_multi_parity.cpp
new file mode 100644
index 00000000000..0e9e4426b15
--- /dev/null
+++ b/sycl/src/kernels/iq_multi_parity.cpp
@@ -0,0 +1,480 @@
+// src/kernels/iq_multi_parity.cpp - the IQ kernels that decode each weight part once for every
+// column / entry, against the older kernels that decode it again per column.  Synthetic blocks, no model.
+//
+//     build/iq_multi_parity            the checks (a ctest; needs the GPU)
+//     build/iq_multi_parity --bench    the checks, then old/new timings of both paths
+//
+// (1) iq_mmvq, every format it takes, ncols 1..8 and 11 (the > 8 split): the new output must be BITWISE equal to
+//     the old one (iq_set_old_kernels), and within float rounding of a double reference built from the GPU's own
+//     dequantizer (validated against gguf-py by iq_parity) and the dequantized q8_1 activations - a gross-error
+//     guard, not the contract.
+// (2) native_expert_grouped, every gate/up format with the down formats: groups of 0..11 entries (more than a pass
+//     of GRP_NC), unused grid rows (cap_groups > groups), scattered destinations; bitwise, new vs old, the rows it
+//     must not write included.
+//
+// Random bytes are valid codes for every format here (all grid indices are in range); only the fp16 block scales
+// are set, small enough that the grouped path's SwiGLU output keeps a finite fp16 q8_1 scale.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <numeric>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+
+int g_fail = 0;
+
+void ck(dpct::err0 e, const char *w) {
+}
+
+template<typename T>
+T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 256, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 256).wait()),
+       "memset");
+    return p;
+}
+
+const char* name_of(int t) {
+    switch (t) {
+        case 16: return "IQ2_XXS";
+        case 17: return "IQ2_XS";
+        case 18: return "IQ3_XXS";
+        case 20: return "IQ4_NL";
+        case 21: return "IQ3_S";
+        case 22: return "IQ2_S";
+        case 23: return "IQ4_XS";
+        case 29: return "IQ1_M";
+        case 42: return "Q2_0";
+        default: return "?";
+    }
+}
+int block_values(int t) { return t == 20 ? 32 : t == 42 ? 64 : 256; }
+
+// `rows` rows of `n` values of format t: random bytes, then a finite fp16 scale in every block
+std::vector<uint8_t> random_rows(int t, int64_t rows, int64_t n, std::mt19937& rng) {
+    const size_t rb = k::iq_row_bytes(t, n), bs = k::iq_row_bytes(t, block_values(t));
+    std::vector<uint8_t> w((size_t) rows * rb);
+    std::uniform_int_distribution<int> byte(0, 255), ex(2, 8), man(0, 1023), sgn(0, 3);
+    for (auto& b : w) b = (uint8_t) byte(rng);
+    for (size_t o = 0; o < w.size(); o += bs) {
+        if (t == 29) {
+            // IQ1_M: the fp16 scale is the top nibbles of the four scale words (bytes 48..55); nibble 3 carries the
+            // sign and the exponent's top bits: 0x1 / 0x2 (or 0x9 / 0xA) keeps it in 2^-11 .. 2^-3
+            const uint8_t nib = (uint8_t) ((sgn(rng) == 0 ? 0x8 : 0x0) | (1 + (byte(rng) & 1)));
+            w[o + 55] = (uint8_t) ((w[o + 55] & 0x0F) | (nib << 4));
+        } else {
+            const uint16_t h = (uint16_t) ((sgn(rng) == 0 ? 0x8000 : 0) | (ex(rng) << 10) | man(rng));   // 2^-13 .. 2^-6
+            std::memcpy(&w[o], &h, 2);
+        }
+    }
+    return w;
+}
+
+std::vector<float> random_x(size_t n, std::mt19937& rng) {
+    std::normal_distribution<float> nd(0.f, 1.f);
+    std::vector<float> x(n);
+    for (auto& v : x) v = nd(rng);
+    return x;
+}
+
+// q8_1 blocks (fp16 scale, fp16 sum, 32 int8) back to floats
+std::vector<double> dequant_q8_1(const std::vector<uint8_t>& q, size_t n) {
+    std::vector<double> v(n);
+    for (size_t b = 0; b < n / 32; ++b) {
+        uint16_t dh;
+        std::memcpy(&dh, &q[b * 36], 2);
+        const double d = k::f32_from_f16(dh);
+        for (int i = 0; i < 32; ++i) v[b * 32 + i] = d * (int8_t) q[b * 36 + 4 + i];
+    }
+    return v;
+}
+
+// ------------------------------------------------------------------------------------------------ (1) iq_mmvq
+void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
+                std::mt19937 &rng) {
+    const auto w = random_rows(t, n_out, n_in, rng);
+    uint8_t* dw = dalloc<uint8_t>(w.size());
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(dw, w.data(), w.size()).wait()),
+       "w");
+    // the double reference's weights: the GPU dequantizer (iq_parity checks it against gguf-py)
+    float* dwf = dalloc<float>((size_t) n_out * n_in);
+    k::iq_dequant_f32(t, dw, (int64_t) n_out * n_in, dwf, s);
+    std::vector<float> wf((size_t) n_out * n_in);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(wf.data(), dwf, wf.size() * 4)
+                            .wait()),
+       "wf");
+    const int max_cols = 11;
+    const auto x = random_x((size_t) max_cols * n_in, rng);
+    float* dx = dalloc<float>(x.size());
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+       "x");
+    const size_t xq_bytes = (size_t) max_cols * (n_in / 32) * 36;
+    uint8_t* dxq = dalloc<uint8_t>(xq_bytes);
+    k::quantize_q8_1_rows(dx, max_cols, n_in, dxq, s);
+    std::vector<uint8_t> xq(xq_bytes);
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memcpy(xq.data(), dxq, xq_bytes).wait()),
+       "xq");
+    const auto xd = dequant_q8_1(xq, (size_t) max_cols * n_in);
+    float* dy_old = dalloc<float>((size_t) max_cols * n_out);
+    float* dy_new = dalloc<float>((size_t) max_cols * n_out);
+    std::vector<float> y_old((size_t) max_cols * n_out), y_new(y_old.size());
+    const int cols[] = {1, 2, 3, 4, 5, 6, 7, 8, 11};
+    int bad = 0;
+    double worst = 0.0;
+    for (int nc : cols) {
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memset(dy_old, 0xFF, y_old.size() * 4)
+                                .wait()),
+           "memset");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memset(dy_new, 0xFF, y_new.size() * 4)
+                                .wait()),
+           "memset");
+        k::iq_set_old_kernels(true);
+        k::iq_mmvq(t, dw, dxq, dy_old, n_in, n_out, nc, s);
+        k::iq_set_old_kernels(false);
+        k::iq_mmvq(t, dw, dxq, dy_new, n_in, n_out, nc, s);
+        ck(DPCT_CHECK_ERROR(s->wait()), "sync");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(y_old.data(), dy_old, y_old.size() * 4)
+                                .wait()),
+           "y_old");
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(y_new.data(), dy_new, y_new.size() * 4)
+                                .wait()),
+           "y_new");
+        size_t diff = 0;
+        for (size_t i = 0; i < y_old.size(); ++i) diff += std::memcmp(&y_old[i], &y_new[i], 4) != 0;
+        double num = 0, den = 0;
+        bool finite = true;
+        for (int c = 0; c < nc; ++c)
+            for (int r = 0; r < n_out; ++r) {
+                double acc = 0;
+                for (int i = 0; i < n_in; ++i) acc += (double) wf[(size_t) r * n_in + i] * xd[(size_t) c * n_in + i];
+                const float g = y_new[(size_t) c * n_out + r];
+                finite = finite && std::isfinite(g);
+                num += std::fabs(g - acc);
+                den += std::fabs(acc);
+            }
+        const double rel = num / (den + 1e-30);
+        worst = std::max(worst, rel);
+        if (diff != 0 || !finite || !(rel < 1e-2)) {
+            std::printf("  %-8s %5d x %5d  ncols %2d: %zu outputs differ from the old kernel, ref rel %.2e%s  FAIL\n",
+                        name_of(t), n_out, n_in, nc, diff, rel, finite ? "" : ", non-finite");
+            ++bad;
+        }
+    }
+    std::printf("%-8s type %2d  %5d x %5d  iq_mmvq ncols 1..8, 11: %s (ref rel <= %.2e)\n", name_of(t), t, n_out, n_in,
+                bad ? "FAIL" : "bitwise equal to the old kernel", worst);
+    g_fail += bad;
+    sycl::free(dw, dpct::get_in_order_queue());
+        sycl::free(dwf, dpct::get_in_order_queue());
+        sycl::free(dx, dpct::get_in_order_queue());
+        sycl::free(dxq, dpct::get_in_order_queue());
+        sycl::free(dy_old, dpct::get_in_order_queue());
+        sycl::free(dy_new, dpct::get_in_order_queue());
+}
+
+// ---------------------------------------------------------------------------------- (2) native_expert_grouped
+struct Grouped {
+    k::NativeExpertLayout L;
+    int n_groups = 0, n_ent = 0, cap_groups = 0, cap_ent = 0, n_tok = 0;
+    std::vector<uint8_t*> blobs;
+    unsigned long long* dptr = nullptr;
+    int32_t *dstart = nullptr, *dn = nullptr, *ddst = nullptr, *dtok = nullptr;
+    float* dx = nullptr;
+    uint8_t *dxq = nullptr, *dscr = nullptr;
+    float* dout = nullptr;
+    size_t out_floats = 0;
+
+    Grouped(int gu, int dt, int64_t H, int64_t FF, const std::vector<int>& counts, int tokens, std::mt19937& rng) {
+        L = k::native_expert_layout(gu, dt, H, FF);
+        n_groups = (int) counts.size();
+        cap_groups = n_groups + 2;              // the extra grid rows must exit
+        n_tok = tokens;
+        std::vector<int32_t> start(1, 0), tok, dst;
+        for (int c : counts) start.push_back(start.back() + c);
+        n_ent = start.back();
+        cap_ent = n_ent + 3;
+        std::uniform_int_distribution<int> tk(0, tokens - 1);
+        for (int e = 0; e < n_ent; ++e) tok.push_back(tk(rng));
+        dst.resize(n_ent);
+        std::iota(dst.begin(), dst.end(), 0);
+        std::shuffle(dst.begin(), dst.end(), rng);
+        std::vector<unsigned long long> ptr;
+        for (int g = 0; g < n_groups; ++g) {
+            // one blob per group: gate rows | up rows (format gu, H values) | down rows (format dt, FF values)
+            auto b = random_rows(gu, 2 * FF, H, rng);
+            const auto d = random_rows(dt, H, FF, rng);
+            b.insert(b.end(), d.begin(), d.end());
+            if (b.size() != L.bytes) { std::fprintf(stderr, "blob size %zu != %zu\n", b.size(), L.bytes); std::exit(2); }
+            uint8_t* db = dalloc<uint8_t>(b.size());
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(
+                   dpct::get_in_order_queue().memcpy(db, b.data(), b.size()).wait()),
+               "blob");
+            blobs.push_back(db);
+            ptr.push_back((unsigned long long) db);
+        }
+        dptr = dalloc<unsigned long long>(cap_groups);
+        dstart = dalloc<int32_t>(cap_groups + 1);
+        dn = dalloc<int32_t>(1);
+        ddst = dalloc<int32_t>(cap_ent);
+        dtok = dalloc<int32_t>(cap_ent);
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dptr, ptr.data(),
+                                                              ptr.size() * 8).wait()),
+           "ptr");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+               dstart, start.data(), start.size() * 4).wait()),
+           "start");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(dn, &n_groups, 4).wait()),
+           "n");
+        if (n_ent) {
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   ddst, dst.data(), dst.size() * 4).wait()),
+               "dst");
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   dtok, tok.data(), tok.size() * 4).wait()),
+               "tok");
+        }
+        const auto x = random_x((size_t) tokens * H, rng);
+        dx = dalloc<float>(x.size());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+           "x");
+        dxq = dalloc<uint8_t>((size_t) tokens * (H / 32) * 36);
+        dscr = dalloc<uint8_t>(k::native_expert_scratch_bytes(cap_ent, FF));
+        out_floats = (size_t) cap_ent * H;
+        dout = dalloc<float>(out_floats);
+    }
+    ~Grouped() {
+        for (auto *b : blobs)
+            DPCT_CHECK_ERROR(sycl::free(b, dpct::get_in_order_queue()));
+        sycl::free(dptr, dpct::get_in_order_queue());
+            sycl::free(dstart, dpct::get_in_order_queue());
+            sycl::free(dn, dpct::get_in_order_queue());
+            sycl::free(ddst, dpct::get_in_order_queue());
+            sycl::free(dtok, dpct::get_in_order_queue());
+        sycl::free(dx, dpct::get_in_order_queue());
+            sycl::free(dxq, dpct::get_in_order_queue());
+            sycl::free(dscr, dpct::get_in_order_queue());
+            sycl::free(dout, dpct::get_in_order_queue());
+    }
+    void run(bool old, dpct::queue_ptr s) {
+        k::iq_set_old_kernels(old);
+        k::quantize_q8_1_rows(dx, n_tok, L.n_embd, dxq, s);
+        k::native_expert_grouped(L, dptr, dstart, dn, ddst, dtok, cap_groups, cap_ent, dxq, dscr, dout, s);
+        k::iq_set_old_kernels(false);
+    }
+    std::vector<float> result(bool old, dpct::queue_ptr s) {
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memset(dout, 0xFF, out_floats * 4)
+                                .wait()),
+           "memset"); // NaN rows: must stay NaN where nothing writes
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue()
+                   .memset(dscr, 0,
+                           k::native_expert_scratch_bytes(cap_ent, L.n_ff))
+                   .wait()),
+           "memset");
+        run(old, s);
+        ck(DPCT_CHECK_ERROR(s->wait()), "sync");
+        std::vector<float> o(out_floats);
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memcpy(o.data(), dout, o.size() * 4)
+                                .wait()),
+           "out");
+        return o;
+    }
+};
+
+void check_grouped(int gu, int dt, int64_t H, int64_t FF, dpct::queue_ptr s,
+                   std::mt19937 &rng) {
+    // 0..11 entries per group: one pass, a partial pass, two passes and three passes of GRP_NC = 4
+    Grouped G(gu, dt, H, FF, {1, 3, 4, 5, 0, 8, 2, 11, 1}, 8, rng);
+    const auto a = G.result(true, s), b = G.result(false, s);
+    size_t diff = 0, written = 0;
+    bool finite = true;
+    for (size_t i = 0; i < a.size(); ++i) {
+        diff += std::memcmp(&a[i], &b[i], 4) != 0;
+        if (i < (size_t) G.n_ent * H) { ++written; finite = finite && std::isfinite(b[i]); }
+    }
+    const bool ok = diff == 0 && finite;
+    std::printf("%-8s/%-7s %5lld x %4lld  native_expert_grouped, %d groups, %d entries: %s\n", name_of(gu),
+                name_of(dt), (long long) H, (long long) FF, G.n_groups, G.n_ent,
+                ok ? "bitwise equal to the old kernels" : "FAIL");
+    if (!ok) {
+        std::printf("  %zu of %zu floats differ%s\n", diff, a.size(), finite ? "" : ", non-finite outputs");
+        ++g_fail;
+    }
+}
+
+// ------------------------------------------------------------------------------------------------ --bench
+float time_ms(dpct::queue_ptr s, int it, const auto &fn) {
+    dpct::event_ptr e0, e1;
+    e0 = new sycl::event();
+    e1 = new sycl::event();
+    fn();
+    dpct::sync_barrier(e0, s);
+    for (int i = 0; i < it; ++i) fn();
+    dpct::sync_barrier(e1, s);
+    ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "bench");
+    float ms = 0;
+    ms =
+        (e1->get_profiling_info<sycl::info::event_profiling::command_end>() -
+         e0->get_profiling_info<sycl::info::event_profiling::command_start>()) /
+        1000000.0f;
+    dpct::destroy_event(e0);
+    dpct::destroy_event(e1);
+    return ms / it;
+}
+
+void bench(dpct::queue_ptr s, std::mt19937 &rng) {
+    std::printf("\n--bench: microseconds per call, old (per-column decode) / new (decode once), idle GPU assumed\n");
+    const int n_in = 2560, n_out = 8192, it = 200;
+    for (int t : {16, 17, 18, 21, 22, 29}) {
+        const auto w = random_rows(t, n_out, n_in, rng);
+        uint8_t* dw = dalloc<uint8_t>(w.size());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(dw, w.data(), w.size()).wait()),
+           "w");
+        const auto x = random_x((size_t) 8 * n_in, rng);
+        float* dx = dalloc<float>(x.size());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+           "x");
+        uint8_t* dxq = dalloc<uint8_t>((size_t) 8 * (n_in / 32) * 36);
+        k::quantize_q8_1_rows(dx, 8, n_in, dxq, s);
+        float* dy = dalloc<float>((size_t) 8 * n_out);
+        std::printf("%-8s iq_mmvq %d x %d:", name_of(t), n_out, n_in);
+        for (int nc = 1; nc <= 8; ++nc) {
+            float us[2];
+            for (int old = 1; old >= 0; --old) {
+                k::iq_set_old_kernels(old != 0);
+                us[old] = 1e3f * time_ms(s, it, [&] { k::iq_mmvq(t, dw, dxq, dy, n_in, n_out, nc, s); });
+            }
+            std::printf("  %d: %.1f/%.1f", nc, us[1], us[0]);
+        }
+        std::printf("\n");
+        k::iq_set_old_kernels(false);
+        sycl::free(dw, dpct::get_in_order_queue());
+            sycl::free(dx, dpct::get_in_order_queue());
+            sycl::free(dxq, dpct::get_in_order_queue());
+            sycl::free(dy, dpct::get_in_order_queue());
+    }
+    // the verify window's shape: 2560 x 640 experts, 16 groups of m entries each
+    for (int gu : {16, 17, 18, 21, 22, 29}) {
+        std::printf("%-8s/Q2_0 grouped, 16 groups of m entries:", name_of(gu));
+        for (int m : {1, 2, 3, 4, 8}) {
+            Grouped G(gu, 42, 2560, 640, std::vector<int>(16, m), 8, rng);
+            float us[2];
+            for (int old = 1; old >= 0; --old)
+                us[old] = 1e3f * time_ms(s, 50, [&] { G.run(old != 0, s); });
+            std::printf("  m=%d: %.1f/%.1f", m, us[1], us[0]);
+        }
+        std::printf("\n");
+    }
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    const bool do_bench = argc > 1 && std::string(argv[1]) == "--bench";
+    dpct::queue_ptr s;
+    ck(DPCT_CHECK_ERROR(s = dpct::get_current_device().create_queue(true)),
+       "stream");
+    std::mt19937 rng(18);
+    for (int t : {16, 17, 18, 20, 21, 22, 23, 29, 42}) {
+        check_mmvq(t, 2560, 67, s, rng);   // the model's n_embd; 67 rows: a partial block of 4 rows
+        check_mmvq(t, 1024, 5, s, rng);
+    }
+    for (int gu : {16, 17, 18, 21, 22, 23, 29, 42}) {
+        for (int dt : {20, 42}) check_grouped(gu, dt, 2560, 640, s, rng);   // the model's shape
+        check_grouped(gu, 23, 1024, 512, s, rng);                           // IQ4_XS down needs n_ff % 256 == 0
+    }
+    if (do_bench) bench(s, rng);
+    std::printf("iq_multi_parity: %d failures\n", g_fail);
+    dpct::get_current_device().destroy_queue(s);
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/kernels/iq_parity.cpp b/sycl/src/kernels/iq_parity.cpp
index 9adfcb5779d..25c83b3c12f 100644
--- a/sycl/src/kernels/iq_parity.cpp
+++ b/sycl/src/kernels/iq_parity.cpp
@@ -1,9 +1,17 @@
-// src/kernels/iq_parity.cpp - plan v0.3 P6: the i-quant kernels against gguf-py on real rows.
+// src/kernels/iq_parity.cpp - plan v0.3 P6: the i-quant kernels against gguf-py on generated rows.
 //
-//     python tools/iq_fixture.py --out logs/iq_fixture && build/iq_parity logs/iq_fixture
+//     python tools/iq_fixture.py --out <dir> && build/iq_parity <dir>
 //
-// Dequant must match gguf-py's values to fp32 rounding; the MMVQ dot (q8_1 activations) must match the float
-// matrix-vector product within the activation rounding (a few 1e-3 relative).
+// The fixtures are GENERATED (deterministic; TODO 24) - tools/iq_fixture.py writes each type's raw block
+// bytes and the gguf-py dequantized reference (Q2_0, this repository's type 42, is dequantized by
+// tools/gguf_writer.py's codec instead - gguf-py has no such type).  Dependencies: python3 with numpy and
+// the vendored gguf-py that setup downloads (the pinned llama.cpp zip; third_party/ is gitignored).
+//
+// What is compared, and how: the dequant parity is a MEASURED relative error (sum|got-ref| / sum|ref|) -
+// bitwise equality is not claimed and not required; on the generated fixtures it measures 0.00e+00.  The
+// MMVQ dot (q8_1 activations) must match the float matrix-vector product over that reference within the
+// activation rounding (a few 1e-3 relative), for 1 to 8 columns, every column of a multi-column call bitwise
+// equal to a one-column call on it.
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
@@ -12,6 +20,7 @@
 
 #include <cmath>
 #include <cstdio>
+#include <cstring>
 #include <random>
 #include <string>
 #include <vector>
@@ -19,13 +28,22 @@
 int main(int argc, char** argv) {
     const std::string dir = argc > 1 ? argv[1] : "logs/iq_fixture";
     const char* names[] = {"IQ2_XXS", "IQ2_XS", "IQ2_S", "IQ3_XXS", "IQ3_S", "IQ1_M", "IQ4_NL", "IQ4_XS", "Q2_0", "Q3_K"};
-    int failures = 0;
+    int failures = 0, missing = 0;
     dpct::queue_ptr s;
     s = dpct::get_current_device().create_queue(true);
     for (const char* nm : names) {
         std::FILE* f = std::fopen((dir + "/" + nm + ".bin").c_str(), "rb");
         std::FILE* g = std::fopen((dir + "/" + nm + ".f32").c_str(), "rb");
-        if (!f || !g) { std::printf("%-8s missing fixture\n", nm); ++failures; continue; }
+        if (!f || !g) {
+            std::printf("%-8s missing fixture: %s/%s.bin or %s/%s.f32 - generate the fixtures first with "
+                        "python tools/iq_fixture.py --out %s (deterministic; see the tool's --help)\n",
+                        nm, dir.c_str(), nm, dir.c_str(), nm, dir.c_str());
+            if (f) std::fclose(f);
+            if (g) std::fclose(g);
+            ++failures;
+            ++missing;
+            continue;
+        }
         int hdr[3];
         std::fread(hdr, 4, 3, f);
         const int type = hdr[0], rows = hdr[1], cols = hdr[2];
@@ -59,19 +77,21 @@ int main(int argc, char** argv) {
             for (size_t i = 0; i < ref.size(); ++i) { num += std::fabs(got[i] - ref[i]); den += std::fabs(ref[i]); }
             dq_err = num / (den + 1e-30);
         }
-        // the dot, two columns
+        // the dot, ncols 1..8: each column of an ncols call bitwise equal to a one-column call on it (the
+        // exact multi-column layout, the default), all of them within the activation rounding of the float product
+        const int MC = 8;
         std::mt19937 rng(7);
         std::normal_distribution<float> nd(0.f, 1.f);
-        std::vector<float> x((size_t) 2 * cols);
+        std::vector<float> x((size_t) MC * cols);
         for (auto& v : x) v = nd(rng);
         float* dx = nullptr;
         void* xq = nullptr;
         float* dy = nullptr;
         dx = (float *)sycl::malloc_device(x.size() * 4,
                                           dpct::get_in_order_queue());
-        xq = (void *)sycl::malloc_device((size_t)2 * cols / 32 * 36,
+        xq = (void *)sycl::malloc_device((size_t)MC * cols / 32 * 36,
                                          dpct::get_in_order_queue());
-        dy = (float *)sycl::malloc_device((size_t)2 * rows * 4,
+        dy = (float *)sycl::malloc_device((size_t)MC * rows * 4,
                                           dpct::get_in_order_queue());
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -80,15 +100,32 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait();
-        strata::kernels::quantize_q8_1_rows(dx, 2, cols, xq, s);
+        strata::kernels::quantize_q8_1_rows(dx, MC, cols, xq, s);
+        std::vector<float> y((size_t) MC * rows), yn(y.size());
+        int multi_bad = 0;
         try {
-            strata::kernels::native_mmvq(type, dw, xq, dy, cols, rows, 2, s);
+            for (int c = 0; c < MC; ++c)
+                strata::kernels::native_mmvq(type, dw, (const uint8_t*) xq + (size_t) c * cols / 32 * 36,
+                                             dy + (size_t) c * rows, cols, rows, 1, s);
+            s->wait();
+            dpct::get_in_order_queue()
+                .memcpy(y.data(), dy, y.size() * 4)
+                .wait();
+            for (int nc = 2; nc <= MC; ++nc) {
+                strata::kernels::native_mmvq(type, dw, xq, dy, cols, rows, nc, s);
+                s->wait();
+                dpct::get_in_order_queue()
+                    .memcpy(yn.data(), dy, yn.size() * 4)
+                    .wait();
+                if (strata::kernels::native_mmvq_multi_exact() &&
+                    std::memcmp(yn.data(), y.data(), (size_t) nc * rows * 4) != 0) {
+                    std::printf("%-8s mmvq ncols %d: not bitwise equal to the one-column calls\n", nm, nc);
+                    ++multi_bad;
+                }
+            }
         } catch (const std::exception& e) { std::printf("%-8s mmvq: %s\n", nm, e.what()); ++failures; continue; }
-        std::vector<float> y((size_t) 2 * rows);
-        s->wait();
-        dpct::get_in_order_queue().memcpy(y.data(), dy, y.size() * 4).wait();
         double num = 0, den = 0;
-        for (int c = 0; c < 2; ++c)
+        for (int c = 0; c < MC; ++c)
             for (int r = 0; r < rows; ++r) {
                 double acc = 0;
                 for (int k = 0; k < cols; ++k) acc += (double) ref[(size_t) r * cols + k] * x[(size_t) c * cols + k];
@@ -96,9 +133,9 @@ int main(int argc, char** argv) {
                 den += std::fabs(acc);
             }
         const double mm_err = num / (den + 1e-30);
-        const bool ok = dq_err < 1e-6 && mm_err < 2e-2;
-        std::printf("%-8s type %2d %4d x %5d  dequant rel %.2e  mmvq rel %.2e  %s\n", nm, type, rows, cols, dq_err, mm_err,
-                    ok ? "ok" : "FAIL");
+        const bool ok = dq_err < 1e-6 && mm_err < 2e-2 && multi_bad == 0;
+        std::printf("%-8s type %2d %4d x %5d  dequant rel %.2e  mmvq rel %.2e (ncols 1..%d)  %s\n", nm, type, rows, cols,
+                    dq_err, mm_err, MC, ok ? "ok" : "FAIL");
         if (!ok) ++failures;
         sycl::free(dw, dpct::get_in_order_queue());
             sycl::free(dq, dpct::get_in_order_queue());
@@ -107,5 +144,10 @@ int main(int argc, char** argv) {
             sycl::free(dy, dpct::get_in_order_queue());
     }
     std::printf("iq_parity: %d failures\n", failures);
+    // no fixture at all: the generator was skipped (no numpy / vendored gguf-py) - a skip (3), not a failure
+    if (missing == (int) (sizeof names / sizeof names[0])) {
+        std::printf("iq_parity: no fixtures in %s - skipped\n", dir.c_str());
+        return 3;
+    }
     return failures ? 1 : 0;
 }
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
index 5679df58a97..10cfefaf3d2 100644
--- a/sycl/src/kernels/ple_parity.cpp
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -209,9 +209,9 @@ int history_advance_regression() {
     float* history = history_storage + guard;
     float* norm = norm_storage + guard;
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
@@ -764,54 +764,54 @@ int main(int argc, char** argv) {
                             hcd * 4, dpct::get_in_order_queue())),
        "cr");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
        "cnk");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
        "cnq");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
        "cnc");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
            d_kc, key_codes.data(), key_codes.size()).wait()),
        "ckc");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
            d_vb, value_bf16.data(), value_bf16.size() * 2).wait()),
        "cvb");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
@@ -831,9 +831,9 @@ int main(int argc, char** argv) {
                             key_scales.size() * 4, dpct::get_in_order_queue())),
        "ks");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
@@ -1203,10 +1203,10 @@ int main(int argc, char** argv) {
             std::vector<float> projected(hcd), normalized(hcd), actual_key(hcd), actual_result(hcd), replay(hcd);
             for (int p = 0; p < std::min(cap.nt, 2); ++p) {
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                        d_emb, cap.emb.data() + (size_t)p * nd, nd * 4).wait()),
diff --git a/sycl/src/kernels/qsa_parity.cpp b/sycl/src/kernels/qsa_parity.cpp
index efbb202a202..9aaf02cbdad 100644
--- a/sycl/src/kernels/qsa_parity.cpp
+++ b/sycl/src/kernels/qsa_parity.cpp
@@ -50,6 +50,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/kernels/qsa.hpp"
+#include "strata/kernels/native_qsa_indexer.hpp"
 
 #include "strata/kernels/f16_bits.hpp"
 #include "strata/kernels/rope.hpp"
@@ -1452,6 +1453,230 @@ int main(int argc, char** argv) {
         check(DPCT_CHECK_ERROR(delete (g2)), "gd");
     }
 
+    // ================= the NATIVE indexer's batched append vs the sequential one =================
+    // The prefill path appends a chunk in one native_qsa_indexer_append_batch call, the decode path appends
+    // token by token - and one cache must never be able to tell which path filled it (rope_scaling.hpp's
+    // one-rotation rule).  So the batch's whole end state must be BIT-IDENTICAL to the sequential appends',
+    // under all three scaling configs: none (today's rotation), linear 2 (pure angle shrink, no correction)
+    // and yarn 2 (corr-dims ramp and the mscale magnitude) - both kernels must take the same RopeScaling.
+    // "Bit-identical" is asserted on the bit representations (memcmp of the state words): float != would
+    // pass a NaN-payload or -0.0 flip that the claim does not cover.  Eight cells: exactly two completed
+    // blocks, so the paths' end states agree on block_pos too (a mid-block chunk end leaves the sequential
+    // path pointing at the open block's base and the batch at the last completed one's - upstream C-2's own
+    // semantics, the same for every scaling; see native_qsa_indexer.hpp's block_pos contract).
+    {
+        std::printf("\n-- the native indexer's batched append vs the sequential one\n");
+        const int64_t NB = 8;                          // exactly two complete blocks of r=4
+        const int32_t BASE = 100;                      // positions 100..107, not cell indices 0..7
+        const int64_t MC = 1024;                       // the capacity both sides validate against
+        using RST = strata::kernels::RopeScalingType;
+        struct Variant { const char* name; RST type; double factor; double ext; };
+        const Variant variants[] = {{"none", RST::None, 1.0, 0.0},
+                                    {"linear 2", RST::Linear, 2.0, 0.0},
+                                    {"yarn 2", RST::YaRN, 2.0, 1.0}};
+        std::vector<float> raws((size_t) NB * IDXD);
+        for (int64_t t = 0; t < NB; ++t)
+            for (int64_t d = 0; d < IDXD; ++d)
+                raws[(size_t) t * IDXD + d] = (float) (gauss(rng) * std::pow(4.0, (double) (t % 4)));
+        dpct::queue_ptr cs = &dpct::get_in_order_queue();
+        check(DPCT_CHECK_ERROR(
+                  cs = dpct::get_current_device().create_queue(true)),
+              "cs");
+        std::vector<float> none_pooled;
+        for (const Variant& var : variants) {
+            strata::kernels::RopeScaling sc;
+            sc.type = var.type;
+            sc.factor = var.factor;
+            sc.ext_factor = var.ext;
+            const size_t prows = (size_t) (MC / R + 1) * IDXD, trows = (size_t) (R - 1) * IDXD;
+            Dev<float> pooledA(prows), deadA(IDXD), tailA(trows), pooledB(prows), deadB(IDXD), tailB(trows);
+            Dev<int32_t> bposA(1), bposB(1), dpos(1);
+            for (Dev<float>* dp : {&pooledA, &deadA, &tailA, &pooledB, &deadB, &tailB})
+                check(
+                    DPCT_CHECK_ERROR(
+                        dpct::get_in_order_queue()
+                            .memset(dp->p, 0,
+                                    dp == &pooledA || dp == &pooledB ? prows * 4
+                                    : dp == &deadA || dp == &deadB   ? IDXD * 4
+                                                                   : trows * 4)
+                            .wait()),
+                    "zero");
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue().memset(bposA.p, 0, 4).wait()),
+                  "zero");
+                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                           .memset(bposB.p, 0, 4)
+                                           .wait()),
+                      "zero");
+            Dev<float> draw((size_t) IDXD), drawAll;
+            drawAll.put(raws);
+            strata::kernels::QsaIndexerBuffers bufsA{tailA.p, deadA.p, pooledA.p, bposA.p};
+            strata::kernels::QsaIndexerBuffers bufsB{tailB.p, deadB.p, pooledB.p, bposB.p};
+            for (int64_t t = 0; t < NB; ++t) {         // the sequential side: one cell, its device position
+                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                           .memcpy(draw.p,
+                                                   &raws[(size_t)t * IDXD],
+                                                   (size_t)IDXD * 4)
+                                           .wait()),
+                      "raw");
+                const int32_t tp = (int32_t) t;
+                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                           .memcpy(dpos.p, &tp, 4)
+                                           .wait()),
+                      "pos");
+                strata::kernels::native_qsa_indexer_append(draw.p, dpos.p, BASE, dw_kn.p, EPS, bufsA, S, MC, sc, cs);
+                // SYCL port: cudaMemcpy on the legacy stream waited for this append before the next copy refilled
+                // `draw`; a default-queue copy does not wait for work on `cs`, so without this the next cell's raw
+                // keys could overwrite this one before the kernel reads them
+                check(DPCT_CHECK_ERROR(cs->wait()), "append");
+            }
+            strata::kernels::native_qsa_indexer_append_batch(drawAll.p, NB, 0, BASE, dw_kn.p, EPS, bufsB, S, MC, sc, cs);
+            check(DPCT_CHECK_ERROR(cs->wait()), "sync");
+            const std::vector<float> pa = pooledA.get(prows), pb = pooledB.get(prows);
+            const std::vector<float> da = deadA.get((size_t) IDXD), db = deadB.get((size_t) IDXD);
+            const std::vector<float> ta = tailA.get(trows), tbb = tailB.get(trows);
+            const std::vector<int32_t> ba = bposA.get(1), bb = bposB.get(1);
+            long long bad = 0;
+            for (size_t i = 0; i < pa.size(); ++i) bad += std::memcmp(&pa[i], &pb[i], 4) != 0;
+            for (size_t i = 0; i < da.size(); ++i) bad += std::memcmp(&da[i], &db[i], 4) != 0;
+            for (size_t i = 0; i < ta.size(); ++i) bad += std::memcmp(&ta[i], &tbb[i], 4) != 0;
+            bad += std::memcmp(&ba[0], &bb[0], 4) != 0;
+            std::printf("  %-44s %s (%lld of %zu state words differ)\n",
+                        (std::string("batch vs sequential, ") + var.name).c_str(),
+                        bad ? "*** WRONG ***" : "bit-identical", bad, pa.size() + da.size() + ta.size() + 1);
+            if (bad) ++g_bad;
+            if (var.type == RST::None) none_pooled = pa;
+            else {
+                int moved = 0;
+                for (size_t i = 0; i < pa.size(); ++i) moved += std::memcmp(&pa[i], &none_pooled[i], 4) != 0;
+                std::printf("  %-44s %d of %zu pooled words differ from the none baseline\n",
+                            (std::string("the scaling is visible, ") + var.name).c_str(), moved, pa.size());
+                if (!moved) { std::printf("    *** the batched append ignored its scaling ***\n"); ++g_bad; }
+            }
+        }
+        check(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(cs)),
+              "csd");
+    }
+
+    // ================= the spare (position 0) under rope scaling: the table indexer vs the native one =========
+    // The spare key (`dead`, and `pooled[0]` until the first block completes) rotates at angle 0.  Its sine is
+    // 0 in every scaling, so the rotation is `v * cos_tab[0][pair]`: exactly `v` unscaled (row 0 is (1, 0), the
+    // bit-exact value section 2 asserts), `v * mscale` under YaRN - the magnitude every other pooled row and
+    // the native kernel's spare carry.  The table kernel used to skip the rotation at position 0, which left
+    // the spare the one unscaled key of a scaled cache.  Asserted per variant: the table spare is BIT-EXACTLY
+    // the unscaled spare times row 0 on the rotated dims and the unscaled spare past them; `pooled[0]` equals
+    // `dead`; the native spare carries the same factor (to f32 rounding: its mscale is formed in float); and
+    // under YaRN the factor is observable (row 0 is not 1).
+    {
+        std::printf("\n-- the spare key (position 0) under rope scaling: table indexer vs native indexer\n");
+        using RST = strata::kernels::RopeScalingType;
+        struct Variant { const char* name; RST type; double factor; double ext; };
+        const Variant variants[] = {{"none", RST::None, 1.0, 0.0},
+                                    {"linear 2", RST::Linear, 2.0, 0.0},
+                                    {"yarn 2", RST::YaRN, 2.0, 1.0}};
+        const int64_t MC = 64, HALF = S.n_rot / 2, NROT = S.n_rot;
+        std::vector<float> raw0((size_t) IDXD);
+        for (int64_t d = 0; d < IDXD; ++d) raw0[(size_t) d] = rnd(3.0);
+        Dev<float> draw0;
+        draw0.put(raw0);
+        Dev<int32_t> dpos0(1);
+        const int32_t zero = 0;
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue().memcpy(dpos0.p, &zero, 4).wait()),
+              "pos0");
+        dpct::queue_ptr cs = &dpct::get_in_order_queue();
+        check(DPCT_CHECK_ERROR(
+                  cs = dpct::get_current_device().create_queue(true)),
+              "cs");
+        const size_t prows = (size_t) (MC / R + 1) * IDXD, trows = (size_t) (R - 1) * IDXD;
+        // one cell at position 0 through either kernel; returns (dead, pooled[0])
+        auto spare = [&](bool native, const strata::kernels::RopeScaling &sc,
+                         std::vector<float> &dead,
+                         std::vector<float> &pooled0) {
+            try {
+                         Dev<float> pooled(prows), dd((size_t)IDXD), tail(trows);
+            Dev<int32_t> bpos(1);
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memset(pooled.p, 0, prows * 4)
+                                       .wait()),
+                  "zero");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memset(dd.p, 0, (size_t)IDXD * 4)
+                                       .wait()),
+                  "zero");
+            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                       .memset(tail.p, 0, trows * 4)
+                                       .wait()),
+                  "zero");
+            check(DPCT_CHECK_ERROR(
+                      dpct::get_in_order_queue().memset(bpos.p, 0, 4).wait()),
+                  "zero");
+            strata::kernels::QsaIndexerBuffers bufs{tail.p, dd.p, pooled.p, bpos.p};
+            if (native) {
+                strata::kernels::native_qsa_indexer_append(draw0.p, dpos0.p, 0, dw_kn.p, EPS, bufs, S, MC, sc, cs);
+            } else {
+                std::vector<float> tc((size_t) (MC * HALF)), ts(tc.size());
+                strata::kernels::build_rope_table((int) NROT, sc, (int) MC, tc.data(), ts.data());
+                Dev<float> dc, dsn;
+                dc.put(tc);
+                dsn.put(ts);
+                strata::kernels::indexer_key_append(draw0.p, dpos0.p, 0, dw_kn.p, EPS, bufs, S, dc.p, dsn.p, cs);
+            }
+            check(DPCT_CHECK_ERROR(cs->wait()), "sync");
+            dead = dd.get((size_t) IDXD);
+            pooled0 = pooled.get((size_t) IDXD);
+        }
+                         catch (sycl::exception const &exc) {
+                           std::cerr << exc.what()
+                                     << "Exception caught at file:" << __FILE__
+                                     << ", line:" << __LINE__ << std::endl;
+                           std::exit(1);
+                         }
+        };
+        std::vector<float> t_none, t_none_p, n_none, n_none_p;
+        for (const Variant& var : variants) {
+            strata::kernels::RopeScaling sc;
+            sc.type = var.type;
+            sc.factor = var.factor;
+            sc.ext_factor = var.ext;
+            std::vector<float> row0c((size_t) (MC * HALF)), row0s(row0c.size());
+            strata::kernels::build_rope_table((int) NROT, sc, (int) MC, row0c.data(), row0s.data());
+            std::vector<float> td, tp, nd, np;
+            spare(false, sc, td, tp);
+            spare(true, sc, nd, np);
+            if (var.type == RST::None) { t_none = td; t_none_p = tp; n_none = nd; n_none_p = np; }
+            long long tbad = 0, pbad = 0, sin_bad = 0;
+            double nworst = 0;
+            for (int64_t i = 0; i < HALF; ++i) sin_bad += row0s[(size_t) i] != 0.0f;
+            for (int64_t d = 0; d < IDXD; ++d) {
+                const float c0 = d < NROT ? row0c[(size_t) (d % HALF)] : 1.0f;
+                const float want = d < NROT ? t_none[(size_t) d] * c0 : t_none[(size_t) d];
+                tbad += std::memcmp(&td[(size_t) d], &want, 4) != 0;
+                pbad += std::memcmp(&tp[(size_t) d], &td[(size_t) d], 4) != 0;
+                const double nwant = (double) n_none[(size_t) d] * (double) c0;
+                const double den = std::max(std::fabs(nwant), 1e-6);
+                nworst = std::max(nworst, std::fabs((double) nd[(size_t) d] - nwant) / den);
+            }
+            require(std::string("  ") + var.name + ": row 0 of the table is (c, 0)", sin_bad == 0,
+                    std::to_string(sin_bad) + " nonzero sines");
+            require(std::string("  ") + var.name + ": the table spare is the unscaled spare times row 0, BIT-EXACT",
+                    tbad == 0, std::to_string(tbad) + " of " + std::to_string(IDXD) + " wrong");
+            require(std::string("  ") + var.name + ": the table's pooled[0] is its spare", pbad == 0,
+                    std::to_string(pbad) + " wrong");
+            require(std::string("  ") + var.name + ": the native spare carries the same row-0 factor", nworst <= 4e-7,
+                    "worst relative " + std::to_string(nworst));
+            if (var.type == RST::YaRN) {
+                int moved = 0;
+                for (int64_t d = 0; d < NROT; ++d) moved += std::memcmp(&td[(size_t) d], &t_none[(size_t) d], 4) != 0;
+                require("  yarn 2: the magnitude correction is observable on the table spare",
+                        row0c[0] != 1.0f && moved > NROT / 2,
+                        "row0 cos " + std::to_string(row0c[0]) + ", " + std::to_string(moved) + " dims moved");
+            }
+        }
+        check(DPCT_CHECK_ERROR(dpct::get_current_device().destroy_queue(cs)),
+              "csd");
+    }
+
     std::printf("\nqsa: %d failures\n", g_bad);
     if (g_bad) return 1;
     if (selftest) std::printf("qsa_parity OK\n");
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index 645f21f878c..42d634d93b8 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -39,9 +39,9 @@ template <typename T> T* up(const std::vector<T>& h) {
                                         dpct::get_in_order_queue())),
        "malloc");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
diff --git a/sycl/src/kernels/rope_parity.cpp b/sycl/src/kernels/rope_parity.cpp
index ccb1df64080..bec5af5a679 100644
--- a/sycl/src/kernels/rope_parity.cpp
+++ b/sycl/src/kernels/rope_parity.cpp
@@ -12,10 +12,23 @@
 // A single end-to-end comparison would have had to carry one loose tolerance for both, and the interesting
 // failure - the NEOX pairing being wrong - is a PERMUTATION that a loose tolerance over all 256 dims would
 // happily accept.
+//
+// Check 4 extends the same discipline to the SCALED tables (rope scaling: none/linear/YaRN).  The rotation
+// kernel cannot see scaling - it lives in the table contents - so each variant's TABLE is held to a float64
+// transcription of ggml's `rope_yarn` spec (the ramp helper is shared, the `rope_neox_pair` convention), and
+// the two properties a tolerance could never fake get their own structural checks: at position 0 every pair's
+// angle is 0, so YaRN's mscale stands naked in cos_tab[0], and at a far position the first pair must match
+// EXTRAPOLATION while the last matches INTERPOLATION.  An observability assertion closes it: if the scaled
+// and unscaled tables were indistinguishable, every green number above would be vacuous.
+//
+// Check 5 holds the TWO PATHS together: the table path's float64 host trig and the native path's float32
+// fast-math device trig must answer to the same `RopeScaling`, yarn and none alike, so one cache never
+// mixes two rotations.
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/kernels/rope.hpp"
+#include "strata/kernels/native_rope.hpp"
 
 #include <cmath>
 #include <cstdio>
@@ -107,36 +120,36 @@ int main(int argc, char** argv) {
                                pos.size(), dpct::get_in_order_queue())),
           "malloc pos");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "copy x");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
               d_cos, hcos.data(), hcos.size() * sizeof(float)).wait()),
           "copy cos");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
               d_sin, hsin.data(), hsin.size() * sizeof(float)).wait()),
           "copy sin");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
@@ -222,6 +235,378 @@ int main(int argc, char** argv) {
         if (!(neox_moved && !adjacent_moved)) ++bad;
     }
 
+    // ---- 4. THE SCALED TABLES (rope_scaling.hpp).  Scaling lives in the table contents, so each variant is
+    // a table check: a float64 transcription of the ggml spec, bit-exact after the float32 cast, plus the
+    // structural and observability checks the tolerances cannot cover.
+    {
+        // 4a. type None IS the five-argument builder above - bit for bit.
+        std::vector<float> nc((size_t) max_pos * half), ns((size_t) max_pos * half);
+        strata::kernels::RopeScaling none;
+        none.freq_base = theta;
+        strata::kernels::build_rope_table(n_rot, none, max_pos, nc.data(), ns.data());
+        const long long none_bad =
+            (long long) (std::memcmp(nc.data(), hcos.data(), nc.size() * 4) != 0) +
+            (long long) (std::memcmp(ns.data(), hsin.data(), ns.size() * 4) != 0);
+        std::printf("  scaled table, None vs unscaled builder  %s\n", none_bad ? "*** WRONG ***" : "bit-identical");
+        bad += (int) none_bad;
+
+        // 4b. LINEAR, factor 4: `ang = p * inv / 4` in float64.  The factor is a power of two on purpose -
+        // dividing by it is exact, so no multiplication-order rounding can sneak between spec and builder.
+        strata::kernels::RopeScaling lin;
+        lin.type = strata::kernels::RopeScalingType::Linear;
+        lin.freq_base = theta;
+        lin.factor = 4.0;
+        std::vector<float> lc((size_t) max_pos * half), ls((size_t) max_pos * half);
+        strata::kernels::build_rope_table(n_rot, lin, max_pos, lc.data(), ls.data());
+        long long lin_bad = 0;
+        for (int p = 0; p < max_pos; ++p) {
+            for (int i = 0; i < half; ++i) {
+                const double inv = std::pow(theta, -2.0 * (double) i / (double) n_rot);
+                const double ang = (double) p * inv / 4.0;
+                const float rc = (float) std::cos(ang), rs = (float) std::sin(ang);
+                if (std::memcmp(&rc, &lc[(size_t) p * half + i], 4) != 0) ++lin_bad;
+                if (std::memcmp(&rs, &ls[(size_t) p * half + i], 4) != 0) ++lin_bad;
+            }
+        }
+        std::printf("  scaled table, linear factor 4          %s (%lld of %d entries differ)\n",
+                    lin_bad ? "*** WRONG ***" : "bit-exact", lin_bad, max_pos * half * 2);
+        bad += (int) lin_bad;
+
+        // 4c. THE INTERPOLATION CLAIM ITSELF: linear(4) at position p is `none` at p/4 - the same table row,
+        // bit for bit, at every position divisible by the factor.
+        std::vector<float> wc((size_t) 4 * max_pos * half), ws((size_t) 4 * max_pos * half);
+        strata::kernels::build_rope_table(n_rot, lin, 4 * max_pos, wc.data(), ws.data());
+        long long equiv_bad = 0;
+        for (int p = 0; p < 4 * max_pos; p += 4) {
+            for (int i = 0; i < half; ++i) {
+                if (std::memcmp(&wc[(size_t) p * half + i], &hcos[(size_t) (p / 4) * half + i], 4) != 0) ++equiv_bad;
+                if (std::memcmp(&ws[(size_t) p * half + i], &hsin[(size_t) (p / 4) * half + i], 4) != 0) ++equiv_bad;
+            }
+        }
+        std::printf("  linear(4) @ p == none @ p/4            %s (%lld of %d rows differ)\n",
+                    equiv_bad ? "*** WRONG ***" : "bit-identical", equiv_bad, max_pos);
+        bad += (int) equiv_bad;
+
+        // 4d. YARN vs a float64 transcription of ggml's rope_yarn (factor 4, the default correction knobs).
+        // The ramp helper is shared with the builder (the rope_neox_pair convention: one definition, not two
+        // transcriptions of it); the interpolation mix and the mscale formula are written here from the ggml
+        // source lines, which is the spec being tested.
+        strata::kernels::RopeScaling yarn;
+        yarn.type = strata::kernels::RopeScalingType::YaRN;
+        yarn.freq_base = theta;
+        yarn.factor = 4.0;
+        yarn.ext_factor = 1.0;
+        std::vector<float> yc((size_t) max_pos * half), ys((size_t) max_pos * half);
+        strata::kernels::build_rope_table(n_rot, yarn, max_pos, yc.data(), ys.data());
+        const double fs = yarn.freq_scale();          // 0.25
+        const double ms = yarn.mscale();              // attn_factor * (1 + 0.1*ln(4))
+        double cd[2];
+        yarn.corr_dims(n_rot, cd);
+        long long yarn_bad = 0;
+        for (int p = 0; p < max_pos; ++p) {
+            for (int i = 0; i < half; ++i) {
+                const double inv = std::pow(theta, -2.0 * (double) i / (double) n_rot);
+                const double extrap = (double) p * inv;
+                const double interp = fs * extrap;
+                const double ramp = (double) strata::kernels::rope_yarn_ramp((float) cd[0], (float) cd[1], i) *
+                                    yarn.ext_factor;
+                const double ang = interp * (1.0 - ramp) + extrap * ramp;
+                const float rc = (float) (std::cos(ang) * ms), rs = (float) (std::sin(ang) * ms);
+                if (std::memcmp(&rc, &yc[(size_t) p * half + i], 4) != 0) ++yarn_bad;
+                if (std::memcmp(&rs, &ys[(size_t) p * half + i], 4) != 0) ++yarn_bad;
+            }
+        }
+        std::printf("  scaled table, yarn factor 4            %s (%lld of %d entries differ)\n",
+                    yarn_bad ? "*** WRONG ***" : "bit-exact", yarn_bad, max_pos * half * 2);
+        bad += (int) yarn_bad;
+
+        // 4e. THE STRUCTURE a tolerance cannot fake.  At position 0 every pair's angle is 0, so YaRN's whole
+        // magnitude correction stands naked: cos_tab[0] == mscale.  At the far end of the table the first
+        // pair (the highest trained frequency) must match EXTRAPOLATION and the last INTERPOLATION.  The two
+        // halves need different observables: at the first pair cos separates the hypotheses outright, but at
+        // the last they differ by ~4 microradians here, invisible to cos near 1 - sin sees it, because near
+        // zero sin IS the angle.  That asymmetry is the YaRN design: interpolation happens where angles are
+        // small.  Both hypotheses go through the same mix formula the builder uses, so the bit comparison is
+        // spec against spec, not shortcut against implementation.
+        {
+            const float msv = (float) ms;
+            const bool zero_ok = std::memcmp(&msv, &yc[0], 4) == 0 && ys[0] == 0.0f;
+            const int far = max_pos - 1;
+            const double inv_f = 1.0;   // pair 0: theta ** 0
+            const double extrap_f = (double) far * inv_f, interp_f = fs * extrap_f;
+            const double inv_l = std::pow(theta, -2.0 * (double) (half - 1) / (double) n_rot);
+            const double extrap_l = (double) far * inv_l, interp_l = fs * extrap_l;
+            const float ef = (float) (std::cos(interp_f * (1.0 - 1.0) + extrap_f * 1.0) * ms);
+            const float itf = (float) (std::cos(interp_f * (1.0 - 0.0) + extrap_f * 0.0) * ms);
+            const float sl_e = (float) (std::sin(interp_l * (1.0 - 1.0) + extrap_l * 1.0) * ms);
+            const float sl_i = (float) (std::sin(interp_l * (1.0 - 0.0) + extrap_l * 0.0) * ms);
+            const float got_f = yc[(size_t) far * half], got_l = ys[(size_t) far * half + (half - 1)];
+            const bool first_extrapolates = std::memcmp(&got_f, &ef, 4) == 0;
+            const bool last_interpolates = std::memcmp(&got_l, &sl_i, 4) == 0;
+            const bool distinguishable = std::fabs((double) ef - (double) itf) > 1e-3 &&
+                                         std::fabs((double) sl_e - (double) sl_i) > 1e-8;
+            std::printf("  yarn structure: cos_tab[0]==mscale %.4f, first pair extrapolates, last interpolates   "
+                        "%s\n", (double) msv,
+                        zero_ok && first_extrapolates && last_interpolates && distinguishable
+                            ? "confirmed"
+                            : "*** WRONG ***");
+            if (!(zero_ok && first_extrapolates && last_interpolates && distinguishable)) ++bad;
+        }
+
+        // 4f. THE OBSERVABILITY assertion: the fixtures must SEE scaling.  If the builder ignored its config,
+        // linear(2) would equal `none` everywhere and 4b-4e would be green on a broken builder.
+        {
+            strata::kernels::RopeScaling lin2;
+            lin2.type = strata::kernels::RopeScalingType::Linear;
+            lin2.freq_base = theta;
+            lin2.factor = 2.0;
+            std::vector<float> l2c((size_t) 101 * half), l2s((size_t) 101 * half);
+            strata::kernels::build_rope_table(n_rot, lin2, 101, l2c.data(), l2s.data());
+            const float c_none = (float) std::cos(100.0);      // pair 0, position 100, unscaled: ang = 100
+            const float c_lin = l2c[(size_t) 100 * half];      // pair 0, position 100, linear(2): ang = 50
+            const bool sees = std::fabs((double) c_none - (double) c_lin) > 1e-3;
+            std::printf("  observability: none vs linear(2) at position 100   %s (|%.4f - %.4f|)\n",
+                        sees ? "visible" : "*** VACUUM ***", (double) c_none, (double) c_lin);
+            if (!sees) ++bad;
+        }
+
+        // 4g. THE ROTATION under a scaled table.  The kernel is table-agnostic and must not know or care:
+        // the host reference is the same rope_neox_pair walk as check 2, over the YaRN table.
+        std::vector<float> ref2(x.size());
+        for (int r = 0; r < rows; ++r) {
+            const float* xr = &x[(size_t) r * head_dim];
+            float* orow = &ref2[(size_t) r * head_dim];
+            for (int d = 0; d < head_dim; ++d) orow[d] = xr[d];
+            for (int i = 0; i < half; ++i) {
+                float c = yc[(size_t) pos[(size_t) r] * half + i], s = ys[(size_t) pos[(size_t) r] * half + i];
+                strata::kernels::rope_neox_pair(xr[i], xr[half + i], c, s, orow[i], orow[half + i]);
+            }
+        }
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_x, x.data(), x.size() * sizeof(float)).wait()),
+              "copy x");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_cos, yc.data(), yc.size() * sizeof(float)).wait()),
+              "copy ycos");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_sin, ys.data(), ys.size() * sizeof(float)).wait()),
+              "copy ysin");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_pos, pos.data(), pos.size() * sizeof(int)).wait()),
+              "copy pos");
+        strata::kernels::rope_neox_apply(d_x, d_out, rows, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
+        std::vector<float> got2(ref2.size());
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got2.data(), d_out, got2.size() * sizeof(float))
+                      .wait()),
+              "back");
+        long long rot2_bad = 0;
+        double worst2 = 0.0;
+        for (size_t i = 0; i < ref2.size(); ++i) {
+            const double a = ref2[i], b = got2[i];
+            const double rel = std::fabs(a - b) / row_scale[i / (size_t) head_dim];
+            worst2 = std::max(worst2, rel);
+            if (!(rel <= 1e-6)) ++rot2_bad;
+        }
+        std::printf("  rope rotation over the yarn table      %s (%lld of %zu over 1e-6, worst rel %.3e)\n",
+                    rot2_bad ? "*** WRONG ***" : "agrees", rot2_bad, ref2.size(), worst2);
+        bad += (int) rot2_bad;
+    }
+
+    // ---- 5. THE TWO PATHS MUST AGREE.  The table path (the default) computes cos/sin on the host in float64;
+    // the native path (`--native-rope`) computes the same angles on device in float32 under `--use_fast_math`.
+    // They answer to ONE config - `RopeScaling` - and a disagreement between them would put differently-rotated
+    // K into the cache depending on which path ran.  The tolerance is NOT the 1e-6 of checks 2/4g: the device
+    // side takes fast-math trig at angles up to ~2048 rad, where the fp32 range reduction alone is worth ~1e-4,
+    // so the bar is the row-magnitude-relative 3e-3 and the test keeps the positions where that holds.  (The
+    // engine's default is the table path precisely because float64 host trig has no such floor.)
+    {
+        const int npos = 2048;
+        strata::kernels::RopeScaling yarn;
+        yarn.type = strata::kernels::RopeScalingType::YaRN;
+        yarn.factor = 2.0;
+        yarn.ext_factor = 1.0;
+        std::vector<float> sc((size_t) npos * half), ss((size_t) npos * half);
+        strata::kernels::build_rope_table(n_rot, yarn, npos, sc.data(), ss.data());
+        std::mt19937 rng2(23);
+        std::normal_distribution<float> gauss2(0.0f, 1.0f);
+        const int nrows = 24 * 16;             // 16 positions spread over the table's range
+        std::vector<float> x2((size_t) nrows * head_dim);
+        for (auto& v : x2) v = gauss2(rng2);
+        std::vector<int> pos2((size_t) nrows);
+        for (int r = 0; r < nrows; ++r) pos2[(size_t) r] = (r * 127) % npos;
+
+        float *d_x2 = nullptr, *d_t2 = nullptr, *d_n2 = nullptr, *d_c2 = nullptr, *d_s2 = nullptr;
+        int* d_p2 = nullptr;
+        check(DPCT_CHECK_ERROR(d_x2 = sycl::malloc_device<float>(
+                                   x2.size(), dpct::get_in_order_queue())),
+              "malloc x2");
+        check(DPCT_CHECK_ERROR(d_t2 = sycl::malloc_device<float>(
+                                   x2.size(), dpct::get_in_order_queue())),
+              "malloc t2");
+        check(DPCT_CHECK_ERROR(d_n2 = sycl::malloc_device<float>(
+                                   x2.size(), dpct::get_in_order_queue())),
+              "malloc n2");
+        check(DPCT_CHECK_ERROR(d_c2 = sycl::malloc_device<float>(
+                                   sc.size(), dpct::get_in_order_queue())),
+              "malloc c2");
+        check(DPCT_CHECK_ERROR(d_s2 = sycl::malloc_device<float>(
+                                   ss.size(), dpct::get_in_order_queue())),
+              "malloc s2");
+        check(DPCT_CHECK_ERROR(d_p2 = sycl::malloc_device<int>(
+                                   pos2.size(), dpct::get_in_order_queue())),
+              "malloc p2");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_x2, x2.data(), x2.size() * sizeof(float)).wait()),
+              "copy x2");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_c2, sc.data(), sc.size() * sizeof(float)).wait()),
+              "copy c2");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_s2, ss.data(), ss.size() * sizeof(float)).wait()),
+              "copy s2");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_p2, pos2.data(), pos2.size() * sizeof(int)).wait()),
+              "copy p2");
+        // The native path demands an explicit stream - a null one is refused by validation, not defaulted.
+        dpct::queue_ptr cs5 = &dpct::get_in_order_queue();
+        check(DPCT_CHECK_ERROR(
+                  cs5 = dpct::get_current_device().create_queue(true)),
+              "stream5");
+        strata::kernels::rope_neox_apply(d_x2, d_t2, nrows, head_dim, n_rot, d_c2, d_s2, d_p2, nullptr);
+        strata::kernels::native_rope_apply(d_x2, d_n2, nrows, head_dim, n_rot, yarn, d_p2, cs5);
+        check(DPCT_CHECK_ERROR(cs5->wait()), "sync5");
+        std::vector<float> got_t(x2.size()), got_n(x2.size());
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got_t.data(), d_t2, got_t.size() * sizeof(float))
+                      .wait()),
+              "back t2");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got_n.data(), d_n2, got_n.size() * sizeof(float))
+                      .wait()),
+              "back n2");
+        long long agree_bad = 0;
+        double worst = 0.0;
+        for (int r = 0; r < nrows; ++r) {
+            double m = 0;
+            for (int d = 0; d < head_dim; ++d) m = std::max(m, (double) std::fabs(x2[(size_t) r * head_dim + d]));
+            const double scale = m > 1e-30 ? m : 1e-30;
+            for (int d = 0; d < head_dim; ++d) {
+                const double rel = std::fabs((double) got_t[(size_t) r * head_dim + d] -
+                                             (double) got_n[(size_t) r * head_dim + d]) / scale;
+                worst = std::max(worst, rel);
+                if (!(rel <= 3e-3)) ++agree_bad;
+            }
+        }
+        std::printf("  native path vs table path, yarn factor 2   %s (%lld of %d over 3e-3, worst rel %.3e)\n",
+                    agree_bad ? "*** WRONG ***" : "agrees", agree_bad, nrows * head_dim, worst);
+        bad += (int) agree_bad;
+
+        // and the None config: the native path against the UNSCALED table - the identity this feature must
+        // not disturb.
+        strata::kernels::RopeScaling none5;               // all defaults: type None, freq_scale 1, mscale 1
+        strata::kernels::native_rope_apply(d_x2, d_n2, nrows, head_dim, n_rot, none5, d_p2, cs5);
+        check(DPCT_CHECK_ERROR(cs5->wait()), "sync5b");
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got_n.data(), d_n2, got_n.size() * sizeof(float))
+                      .wait()),
+              "back n2b");
+        std::vector<float> nc5((size_t) npos * half), ns5((size_t) npos * half);
+        strata::kernels::build_rope_table(n_rot, none5, npos, nc5.data(), ns5.data());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_c2, nc5.data(), nc5.size() * sizeof(float)).wait()),
+              "copy c2b");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                  d_s2, ns5.data(), ns5.size() * sizeof(float)).wait()),
+              "copy s2b");
+        strata::kernels::rope_neox_apply(d_x2, d_t2, nrows, head_dim, n_rot, d_c2, d_s2, d_p2, nullptr);
+        check(DPCT_CHECK_ERROR(
+                  dpct::get_in_order_queue()
+                      .memcpy(got_t.data(), d_t2, got_t.size() * sizeof(float))
+                      .wait()),
+              "back t2b");
+        long long none_bad5 = 0;
+        double worst5 = 0.0;
+        for (int r = 0; r < nrows; ++r) {
+            double m = 0;
+            for (int d = 0; d < head_dim; ++d) m = std::max(m, (double) std::fabs(x2[(size_t) r * head_dim + d]));
+            const double scale = m > 1e-30 ? m : 1e-30;
+            for (int d = 0; d < head_dim; ++d) {
+                const double rel = std::fabs((double) got_t[(size_t) r * head_dim + d] -
+                                             (double) got_n[(size_t) r * head_dim + d]) / scale;
+                worst5 = std::max(worst5, rel);
+                if (!(rel <= 3e-3)) ++none_bad5;
+            }
+        }
+        std::printf("  native path vs table path, none            %s (%lld of %d over 3e-3, worst rel %.3e)\n",
+                    none_bad5 ? "*** WRONG ***" : "agrees", none_bad5, nrows * head_dim, worst5);
+        bad += (int) none_bad5;
+    }
+
     std::printf("\nrope: %d failures\n", bad);
     if (bad) return 1;
     if (selftest) std::printf("rope_parity OK\n");
diff --git a/sycl/src/kernels/s2_expert_grouped_parity.cpp b/sycl/src/kernels/s2_expert_grouped_parity.cpp
new file mode 100644
index 00000000000..2d53dcfc3dd
--- /dev/null
+++ b/sycl/src/kernels/s2_expert_grouped_parity.cpp
@@ -0,0 +1,790 @@
+// src/kernels/s2_expert_grouped_parity.cpp - the rewritten expert kernels against the previous ones,
+// BITWISE (GPU, synthetic, no model).
+//
+//     build/s2_expert_grouped_parity            the checks below; exit 1 on any difference
+//     build/s2_expert_grouped_parity --bench    previous vs new kernel timings on engine-like shapes
+//
+// Random Q2_0 expert blobs (random codes, fp16 scales in a realistic range) and random Q8_0 activations.  Every entry
+// point of `s2_expert_grouped.hpp` that gained a new kernel runs twice from identical inputs and sentinel-filled
+// outputs - `moe_grouped_select_old(1)`, then `(0)` - and the two runs are compared byte for byte:
+//   1. `moe_hit_grouped_s2`          per hit, host count; with fp32 activation scales and with the blocks' fp16 `d`
+//   2. `moe_hit_grouped_s2_dev`      device count below the capacity (the rows past it must stay untouched)
+//   3. `moe_hit_grouped_s2_multi`    verify window: each hit reads its own token's activation row
+//   4. `moe_grouped_s2`              host-built groups of 1..8 entries, one of them a mapped HOST blob (the PCIe
+//                                    share), and more group capacity than groups
+//   5. `moe_group_resident` + `moe_grouped_s2`   the MTP layer's shape, with and without fp32 scales
+//   6. an activation row that is only 2-byte aligned: the new path must fall back to the previous kernels
+//   7. a slot stride that is not a multiple of 8 (BLOB + 4), and 8. an arena 4 bytes past an aligned address: the
+//      per-hit path must fall back as well (its codes are read as uint2)
+// Every run asks `moe_grouped_last_path` which kernels it launched, so a new path that silently declined cannot pass
+// as "the previous kernels against themselves": forced new must report the new kernels, and 6-8 the previous ones.
+// (A misaligned scratch is not exercised: the previous kernels store floats there, so it is not a legal input.)
+// The output AND the scratch (gate/up, the quantized intermediate and its scales) are compared, so a failure names
+// the projection.  Bitwise equality with the previous kernels is the contract; on top of it a double-precision
+// host reference of every up row and every down row checks that the fixture computes an expert at all - two
+// kernels agreeing on garbage would otherwise pass.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/f16_bits.hpp"
+#include "strata/kernels/s2_expert_grouped.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <functional>
+#include <numeric>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+// The blob geometry, `cpu/expert.hpp`'s (restated as in the kernel).
+constexpr int H = 2560, FF = 640, NCH_GU = H / 32, NCH_D = FF / 32;
+constexpr size_t ROW_GU = H / 4, ROW_D = FF / 4, SC_GU = H / 64, SC_D = FF / 64;
+constexpr size_t O_D_CODES = 2ull * FF * ROW_GU;
+constexpr size_t O_GU_SCALES = O_D_CODES + (size_t) H * ROW_D;
+constexpr size_t O_D_SCALES = O_GU_SCALES + 2ull * FF * SC_GU * 2;
+constexpr size_t BLOB = O_D_SCALES + (size_t) H * SC_D * 2;
+static_assert(BLOB == 1382400, "the Q2_0 expert blob is 1,382,400 bytes");
+constexpr size_t XROW = (size_t) NCH_GU * 34;   // one token's activation row of block_q8_0
+
+int g_fail = 0;
+
+void ck(dpct::err0 e, const char *w) {
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+}
+template <typename T> T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 256, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 256).wait()),
+       "memset");
+    return p;
+}
+template <typename T> void up(T* d, const std::vector<T>& h) {
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+           d, h.data(), h.size() * sizeof(T)).wait()),
+       "h2d");
+}
+template <typename T> std::vector<T> down(const T* d, size_t n) {
+    std::vector<T> h(n);
+    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                            .memcpy(h.data(), d, n * sizeof(T))
+                            .wait()),
+       "d2h");
+    return h;
+}
+
+float f16f(const uint8_t* p) { return k::f32_from_f16((uint16_t) (p[0] | (p[1] << 8))); }
+void put16(uint8_t* p, float f) {
+    const uint16_t h = k::f16_from_f32(f);
+    p[0] = (uint8_t) h;
+    p[1] = (uint8_t) (h >> 8);
+}
+
+// Random codes; fp16 scales of either sign in [1e-3, 3e-2] (a real pack's range, so no overflow downstream).
+void fill_blob(uint8_t* b, std::mt19937& rng) {
+    for (size_t i = 0; i < O_GU_SCALES; ++i) b[i] = (uint8_t) rng();
+    std::uniform_real_distribution<float> mag(1e-3f, 3e-2f);
+    for (size_t i = O_GU_SCALES; i < BLOB; i += 2) put16(b + i, (rng() & 1 ? -1.0f : 1.0f) * mag(rng));
+}
+
+// `n_tok` activation rows: per 32-chunk an fp16 `d` then 32 int8 in [-127, 127] (what `quantize_q8_0` writes),
+// plus the fp32 scales `quantize_q8_0_scaled` would pass alongside.  Some chunks are saturated on purpose.
+void fill_x(std::vector<uint8_t>& x, std::vector<float>& xs, int n_tok, std::mt19937& rng) {
+    x.assign((size_t) n_tok * XROW, 0);
+    xs.assign((size_t) n_tok * NCH_GU, 0.0f);
+    std::uniform_real_distribution<float> sc(2e-3f, 5e-2f);
+    for (size_t c = 0; c < (size_t) n_tok * NCH_GU; ++c) {
+        uint8_t* b = x.data() + c * 34;
+        xs[c] = sc(rng);
+        put16(b, xs[c]);
+        const int mode = (int) (rng() % 16);
+        for (int j = 0; j < 32; ++j) {
+            const int v = mode == 0 ? 127 : mode == 1 ? -127 : (int) (rng() % 255) - 127;
+            b[2 + j] = (uint8_t) (int8_t) v;
+        }
+    }
+}
+
+// Double-precision reference of one row against one activation row: sum_c dw * dx * sum_e (code_e - 1) * x_e.
+// `mag` receives sum |term|, the scale the tolerance is relative to.
+double row_ref(const uint8_t* codes, const uint8_t* scales, const uint8_t* xrow, const float* xs, int n_chunks,
+               double* mag) {
+    double acc = 0.0, a = 0.0;
+    for (int c = 0; c < n_chunks; ++c) {
+        const uint8_t* xb = xrow + (size_t) c * 34;
+        const double dx = xs ? (double) xs[c] : (double) f16f(xb);
+        const double dw = (double) f16f(scales + (size_t) (c >> 1) * 2);
+        int s = 0;
+        for (int e = 0; e < 32; ++e) {
+            const int code = (codes[(size_t) c * 8 + e / 4] >> (2 * (e % 4))) & 3;
+            s += (code - 1) * (int) (int8_t) xb[2 + e];
+        }
+        const double t = dw * dx * (double) s;
+        acc += t;
+        a += std::fabs(t);
+    }
+    *mag = a;
+    return acc;
+}
+
+bool close_to(float got, double ref, double mag) {
+    return std::isfinite(got) && std::fabs((double) got - ref) <= 4e-5 * mag + 1e-30;
+}
+
+struct Scratch {
+    void* p = nullptr;
+    uint64_t bytes = 0;
+    int64_t cap = 0;
+    uint64_t gu_bytes() const { return ((uint64_t) cap * 2 * FF * 4 + 15) & ~15ull; }
+    uint64_t q8_bytes() const { return ((uint64_t) cap * NCH_D * 34 + 15) & ~15ull; }
+};
+
+// One entry point, run with the previous kernels then with the new ones from identical sentinel-filled buffers;
+// every differing float of the output and byte of the scratch is counted.  `keep` receives the new run.
+struct Run {
+    std::vector<float> out;
+    std::vector<uint8_t> scratch;
+};
+
+bool twice(const char* name, float* d_out, size_t out_floats, const Scratch& s,
+           const std::function<void()>& call, Run* keep, bool expect_new = true) {
+    Run r[2];
+    for (int old = 1; old >= 0; --old) {
+        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                .memset(d_out, 0xA5, out_floats * 4)
+                                .wait()),
+           "sentinel out");
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memset(s.p, 0x5A, s.bytes).wait()),
+           "sentinel scratch");
+        k::moe_grouped_select_old(old);
+        (void) k::moe_grouped_last_path();   // clear
+        call();
+        const int path = k::moe_grouped_last_path();
+        const int want = old ? 0 : (expect_new ? 1 : 0);
+        if (path != want) {
+            std::printf("  %-44s forced %s: launched %s kernels, expected %s\n", name, old ? "previous" : "new",
+                        path == 1 ? "the new" : path == 0 ? "the previous" : "no", want ? "the new" : "the previous");
+            ++g_fail;
+        }
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        ck(0, name);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           name);
+        Run& x = r[old ? 0 : 1];
+        x.out = down(d_out, out_floats);
+        x.scratch = down((const uint8_t*) s.p, (size_t) s.bytes);
+    }
+    k::moe_grouped_select_old(-1);
+    const uint64_t gu = s.gu_bytes(), q8 = s.q8_bytes();
+    size_t diff_out = 0, diff_gu = 0, diff_q8 = 0, diff_hs = 0;
+    for (size_t i = 0; i < out_floats; ++i)
+        diff_out += std::memcmp(&r[0].out[i], &r[1].out[i], 4) != 0;
+    for (size_t i = 0; i < (size_t) s.bytes; ++i) {
+        if (r[0].scratch[i] == r[1].scratch[i]) continue;
+        if (i < gu) ++diff_gu;
+        else if (i < gu + q8) ++diff_q8;
+        else ++diff_hs;
+    }
+    const bool ok = diff_out + diff_gu + diff_q8 + diff_hs == 0;
+    std::printf("  %-44s %s", name, ok ? "bitwise identical" : "DIFFERS");
+    if (!ok)
+        std::printf(" (out %zu floats, gate/up %zu B, intermediate %zu B, its scales %zu B)", diff_out, diff_gu,
+                    diff_q8, diff_hs);
+    std::printf("\n");
+    if (!ok) ++g_fail;
+    if (keep) *keep = std::move(r[1]);
+    return ok;
+}
+
+// The host reference on a finished run: every up row (the second half of gate/up, which the swiglu leaves alone)
+// against the activation row it read, and every written down row against the intermediate the run produced.
+struct Entry {
+    const uint8_t* blob;   // host copy of the entry's blob
+    int tok;               // activation row it reads
+    int dst;               // output row it writes
+};
+void reference(const char* name, const Run& r, const Scratch& s, const std::vector<Entry>& ent,
+               const std::vector<uint8_t>& x, const std::vector<float>* xs) {
+    const float* gu = (const float*) r.scratch.data();
+    const uint8_t* hq = r.scratch.data() + s.gu_bytes();
+    const float* hs = (const float*) (r.scratch.data() + s.gu_bytes() + s.q8_bytes());
+    long checked = 0, bad = 0;
+    double worst = 0.0;
+    for (size_t e = 0; e < ent.size(); ++e) {
+        const uint8_t* b = ent[e].blob;
+        const uint8_t* xrow = x.data() + (size_t) ent[e].tok * XROW;
+        const float* xsr = xs ? xs->data() + (size_t) ent[e].tok * NCH_GU : nullptr;
+        for (int rr = 0; rr < FF; rr += 7) {   // up row rr = row-slot 2rr + 1
+            double mag;
+            const double ref = row_ref(b + (size_t) (2 * rr + 1) * ROW_GU, b + O_GU_SCALES + (size_t) (2 * rr + 1) * SC_GU * 2,
+                                       xrow, xsr, NCH_GU, &mag);
+            const float got = gu[(size_t) s.cap * FF + e * FF + (size_t) rr];
+            ++checked;
+            if (!close_to(got, ref, mag)) ++bad;
+            if (mag > 0) worst = std::max(worst, std::fabs((double) got - ref) / mag);
+        }
+        const uint8_t* hrow = hq + e * (size_t) NCH_D * 34;
+        const float* hsr = xs ? hs + e * (size_t) NCH_D : nullptr;
+        for (int rr = 0; rr < H; rr += 13) {
+            double mag;
+            const double ref = row_ref(b + O_D_CODES + (size_t) rr * ROW_D, b + O_D_SCALES + (size_t) rr * SC_D * 2,
+                                       hrow, hsr, NCH_D, &mag);
+            const float got = r.out[(size_t) ent[e].dst * H + (size_t) rr];
+            ++checked;
+            if (!close_to(got, ref, mag)) ++bad;
+            if (mag > 0) worst = std::max(worst, std::fabs((double) got - ref) / mag);
+        }
+    }
+    std::printf("  %-44s host reference: %ld rows, %ld outside tolerance, worst %.2e of sum|term|\n", name, checked,
+                bad, worst);
+    if (bad || checked == 0) ++g_fail;
+}
+
+struct Fixture {
+    int nb = 0;
+    std::vector<uint8_t> h;   // nb blobs
+    uint8_t* d = nullptr;
+    const uint8_t* hb(int i) const { return h.data() + (size_t) i * BLOB; }
+};
+
+Fixture make_blobs(int nb, std::mt19937& rng) {
+    Fixture f;
+    f.nb = nb;
+    f.h.resize((size_t) nb * BLOB);
+    for (int i = 0; i < nb; ++i) fill_blob(f.h.data() + (size_t) i * BLOB, rng);
+    f.d = dalloc<uint8_t>((size_t) nb * BLOB);
+    up(f.d, f.h);
+    return f;
+}
+
+Scratch make_scratch(int64_t cap) {
+    Scratch s;
+    s.cap = cap;
+    s.bytes = k::moe_hit_grouped_scratch_bytes(cap, H, FF);
+    s.p = dalloc<uint8_t>(s.bytes);
+    return s;
+}
+
+// ---------------------------------------------------------------- the checks
+void check_all() {
+    std::mt19937 rng(20260928);
+    const Fixture fx = make_blobs(12, rng);
+    constexpr int K = 10;
+
+    // Activations for up to 8 tokens, device copies with and without the fp32 scales.
+    std::vector<uint8_t> x;
+    std::vector<float> xs;
+    fill_x(x, xs, 8, rng);
+    uint8_t* d_x = dalloc<uint8_t>(x.size());
+    float* d_xs = dalloc<float>(xs.size());
+    up(d_x, x);
+    up(d_xs, xs);
+
+    // ---- 1. moe_hit_grouped_s2: 9 hits of 10 routed rows, slots and destinations shuffled
+    {
+        const int n_hits = 9;
+        std::vector<int32_t> slot(n_hits), dst(K);
+        for (int i = 0; i < n_hits; ++i) slot[i] = (int32_t) ((i * 5 + 3) % fx.nb);
+        std::iota(dst.begin(), dst.end(), 0);
+        std::shuffle(dst.begin(), dst.end(), rng);
+        dst.resize(n_hits);
+        int32_t* d_slot = dalloc<int32_t>(n_hits);
+        int32_t* d_dst = dalloc<int32_t>(n_hits);
+        up(d_slot, slot);
+        up(d_dst, dst);
+        const Scratch s = make_scratch(n_hits);
+        float* d_out = dalloc<float>((size_t) K * H);
+        std::vector<Entry> ent;
+        for (int i = 0; i < n_hits; ++i) ent.push_back({fx.hb(slot[i]), 0, dst[i]});
+        for (int scaled = 1; scaled >= 0; --scaled) {
+            Run r;
+            const std::string name = std::string("moe_hit_grouped_s2") + (scaled ? " (fp32 scales)" : " (fp16 d)");
+            twice(name.c_str(), d_out, (size_t) K * H, s, [&] {
+                k::moe_hit_grouped_s2(fx.d, d_slot, d_dst, n_hits, (int64_t) BLOB, d_x, s.p, d_out, nullptr,
+                                      scaled ? d_xs : nullptr);
+            }, &r);
+            reference(name.c_str(), r, s, ent, x, scaled ? &xs : nullptr);
+        }
+    }
+
+    // ---- 2. moe_hit_grouped_s2_dev: capacity 10, device count 7
+    {
+        const int cap = 10, count = 7;
+        std::vector<int32_t> slot(cap), dst(cap);
+        for (int i = 0; i < cap; ++i) slot[i] = (int32_t) ((i * 7 + 1) % fx.nb);
+        std::iota(dst.begin(), dst.end(), 0);
+        std::shuffle(dst.begin(), dst.end(), rng);
+        int32_t* d_slot = dalloc<int32_t>(cap);
+        int32_t* d_dst = dalloc<int32_t>(cap);
+        int32_t* d_count = dalloc<int32_t>(1);
+        up(d_slot, slot);
+        up(d_dst, dst);
+        up(d_count, std::vector<int32_t>{count});
+        const Scratch s = make_scratch(cap);
+        float* d_out = dalloc<float>((size_t) K * H);
+        std::vector<Entry> ent;
+        for (int i = 0; i < count; ++i) ent.push_back({fx.hb(slot[i]), 0, dst[i]});
+        Run r;
+        twice("moe_hit_grouped_s2_dev (count 7 of 10)", d_out, (size_t) K * H, s, [&] {
+            k::moe_hit_grouped_s2_dev(fx.d, d_slot, d_dst, d_count, cap, (int64_t) BLOB, d_x, s.p, d_out, nullptr,
+                                      d_xs);
+        }, &r);
+        reference("moe_hit_grouped_s2_dev (count 7 of 10)", r, s, ent, x, &xs);
+        // the rows of the hits past the count keep the sentinel
+        long touched = 0;
+        for (int i = count; i < cap; ++i)
+            for (int c = 0; c < H; ++c) {
+                uint32_t v;
+                std::memcpy(&v, &r.out[(size_t) dst[i] * H + c], 4);
+                touched += v != 0xA5A5A5A5u;
+            }
+        std::printf("  %-44s rows past the count written: %ld\n", "moe_hit_grouped_s2_dev (count 7 of 10)", touched);
+        if (touched) ++g_fail;
+    }
+
+    // ---- 3. moe_hit_grouped_s2_multi: 4 tokens x 10 routed entries, 29 hits
+    {
+        const int T = 4, n = T * K, count = 29;
+        std::vector<int32_t> ent_ids(n);
+        std::iota(ent_ids.begin(), ent_ids.end(), 0);
+        std::shuffle(ent_ids.begin(), ent_ids.end(), rng);
+        std::vector<int32_t> slot(n), dst(n);
+        for (int i = 0; i < n; ++i) {
+            dst[i] = ent_ids[i];
+            slot[i] = (int32_t) (rng() % fx.nb);
+        }
+        std::sort(dst.begin(), dst.begin() + count);   // hit order is routing order, as `moe_hit_select_multi` makes it
+        int32_t* d_slot = dalloc<int32_t>(n);
+        int32_t* d_dst = dalloc<int32_t>(n);
+        int32_t* d_count = dalloc<int32_t>(1);
+        up(d_slot, slot);
+        up(d_dst, dst);
+        up(d_count, std::vector<int32_t>{count});
+        const Scratch s = make_scratch(n);
+        float* d_out = dalloc<float>((size_t) n * H);
+        std::vector<Entry> ent;
+        for (int i = 0; i < count; ++i) ent.push_back({fx.hb(slot[i]), dst[i] / K, dst[i]});
+        Run r;
+        twice("moe_hit_grouped_s2_multi (4 tokens, 29 hits)", d_out, (size_t) n * H, s, [&] {
+            k::moe_hit_grouped_s2_multi(fx.d, d_slot, d_dst, d_count, n, (int64_t) BLOB, d_x, d_xs, K, s.p, d_out,
+                                        nullptr);
+        }, &r);
+        reference("moe_hit_grouped_s2_multi (4 tokens, 29 hits)", r, s, ent, x, &xs);
+    }
+
+    // ---- 4. moe_grouped_s2: 8 tokens x 10 entries in groups of 1..8, one group on a mapped host blob
+    {
+        const int T = 8, n = T * K;
+        uint8_t* h_host = nullptr;
+        uint8_t* d_host = nullptr;
+        /*
+        DPCT1048: The original value cudaHostAllocMapped is not meaningful in
+        the migrated code and was removed or replaced with 0. You may need to
+        check the migrated code.
+        */
+        ck(DPCT_CHECK_ERROR(h_host = (uint8_t *)sycl::malloc_host(
+                                BLOB, dpct::get_in_order_queue())),
+           "host blob");
+        std::memcpy(h_host, fx.hb(fx.nb - 1), BLOB);
+        ck(DPCT_CHECK_ERROR(*(void **)&d_host = (uint8_t *)h_host),
+           "host blob ptr");
+        // group sizes: 8, 1, 5, 2, 7, 3, 1, 6, 4, ... up to n entries
+        const int sizes[] = {8, 1, 5, 2, 7, 3, 1, 6, 4, 8, 1, 2, 3, 4, 5, 6, 7, 1, 1, 5};
+        std::vector<int32_t> order(n);   // the output rows, in group order
+        std::iota(order.begin(), order.end(), 0);
+        std::shuffle(order.begin(), order.end(), rng);
+        std::vector<unsigned long long> gptr;
+        std::vector<int32_t> gstart{0}, edst, etok;
+        std::vector<Entry> ent;
+        int at = 0, gi = 0;
+        while (at < n) {
+            const int sz = std::min(sizes[gi % 20], n - at);
+            const bool host = gi == 3;
+            const int b = gi % (fx.nb - 1);
+            gptr.push_back((unsigned long long) (host ? d_host : fx.d + (size_t) b * BLOB));
+            for (int j = 0; j < sz; ++j, ++at) {
+                edst.push_back(order[at]);
+                etok.push_back(order[at] / K);
+                ent.push_back({host ? h_host : fx.hb(b), order[at] / K, order[at]});
+            }
+            gstart.push_back(at);
+            ++gi;
+        }
+        const int n_groups = gi, cap_groups = n_groups + 3;
+        gstart.resize((size_t) cap_groups + 1, at);
+        gptr.resize((size_t) cap_groups, gptr[0]);
+        unsigned long long* d_gptr = dalloc<unsigned long long>(gptr.size());
+        int32_t* d_gstart = dalloc<int32_t>(gstart.size());
+        int32_t* d_ng = dalloc<int32_t>(1);
+        int32_t* d_edst = dalloc<int32_t>(n);
+        int32_t* d_etok = dalloc<int32_t>(n);
+        up(d_gptr, gptr);
+        up(d_gstart, gstart);
+        up(d_ng, std::vector<int32_t>{n_groups});
+        up(d_edst, edst);
+        up(d_etok, etok);
+        const Scratch s = make_scratch(n);
+        float* d_out = dalloc<float>((size_t) n * H);
+        for (int scaled = 1; scaled >= 0; --scaled) {
+            Run r;
+            const std::string name = std::string("moe_grouped_s2 (") + std::to_string(n_groups) + " groups" +
+                                     (scaled ? ", fp32 scales)" : ", fp16 d)");
+            twice(name.c_str(), d_out, (size_t) n * H, s, [&] {
+                k::moe_grouped_s2(d_gptr, d_gstart, d_ng, d_edst, d_etok, cap_groups, n, d_x, scaled ? d_xs : nullptr,
+                                  s.p, d_out, nullptr);
+            }, &r);
+            reference(name.c_str(), r, s, ent, x, scaled ? &xs : nullptr);
+        }
+        ck(DPCT_CHECK_ERROR(sycl::free(h_host, dpct::get_in_order_queue())),
+           "free host blob");
+    }
+
+    // ---- 5. moe_group_resident + moe_grouped_s2: the MTP layer (experts resident at base + id * BLOB)
+    {
+        const int T = 5, n = T * K;
+        std::vector<int32_t> ids(n);
+        for (int t = 0; t < T; ++t) {   // distinct within a token, shared across tokens
+            std::vector<int32_t> pick(fx.nb);
+            std::iota(pick.begin(), pick.end(), 0);
+            std::shuffle(pick.begin(), pick.end(), rng);
+            for (int j = 0; j < K; ++j) ids[(size_t) t * K + j] = pick[j];
+        }
+        int32_t* d_ids = dalloc<int32_t>(n);
+        up(d_ids, ids);
+        unsigned long long* d_gptr = dalloc<unsigned long long>(n);
+        int32_t* d_gstart = dalloc<int32_t>(n + 1);
+        int32_t* d_counts = dalloc<int32_t>(2);
+        int32_t* d_edst = dalloc<int32_t>(n);
+        int32_t* d_etok = dalloc<int32_t>(n);
+        k::moe_group_resident(d_ids, n, K, fx.d, (int64_t) BLOB, d_gptr, d_gstart, d_counts, d_edst, d_etok, nullptr);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "group_resident");
+        const std::vector<int32_t> edst = down(d_edst, n), etok = down(d_etok, n);
+        std::vector<Entry> ent(n);   // entry e: dst = routing index, blob = its expert
+        for (int e = 0; e < n; ++e) ent[e] = {fx.hb(ids[(size_t) edst[e]]), etok[e], edst[e]};
+        const Scratch s = make_scratch(n);
+        float* d_out = dalloc<float>((size_t) n * H);
+        for (int scaled = 1; scaled >= 0; --scaled) {
+            Run r;
+            const std::string name = std::string("moe_group_resident + moe_grouped_s2") + (scaled ? " (fp32)" : " (fp16)");
+            twice(name.c_str(), d_out, (size_t) n * H, s, [&] {
+                k::moe_grouped_s2(d_gptr, d_gstart, d_counts, d_edst, d_etok, n, n, d_x, scaled ? d_xs : nullptr, s.p,
+                                  d_out, nullptr);
+            }, &r);
+            reference(name.c_str(), r, s, ent, x, scaled ? &xs : nullptr);
+        }
+    }
+
+    // ---- 6. a 2-byte aligned activation row: the new path must decline and the previous kernels run
+    {
+        uint8_t* d_x2 = dalloc<uint8_t>(x.size() + 2);
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               dpct::get_in_order_queue().memcpy(d_x2 + 2, x.data(), XROW).wait()),
+           "x2");
+        const int n_hits = 3;
+        std::vector<int32_t> slot{2, 5, 7}, dst{4, 0, 9};
+        int32_t* d_slot = dalloc<int32_t>(n_hits);
+        int32_t* d_dst = dalloc<int32_t>(n_hits);
+        up(d_slot, slot);
+        up(d_dst, dst);
+        const Scratch s = make_scratch(n_hits);
+        float* d_out = dalloc<float>((size_t) K * H);
+        std::vector<Entry> ent;
+        for (int i = 0; i < n_hits; ++i) ent.push_back({fx.hb(slot[i]), 0, dst[i]});
+        Run r;
+        twice("moe_hit_grouped_s2 (2-byte aligned x)", d_out, (size_t) K * H, s, [&] {
+            k::moe_hit_grouped_s2(fx.d, d_slot, d_dst, n_hits, (int64_t) BLOB, d_x2 + 2, s.p, d_out, nullptr, d_xs);
+        }, &r, /*expect_new=*/false);
+        reference("moe_hit_grouped_s2 (2-byte aligned x)", r, s, ent, x, &xs);
+    }
+
+    // ---- 7. slots BLOB + 4 bytes apart, and 8. an arena at an address that is 4 mod 8: per-hit fallback
+    {
+        constexpr size_t STRIDE = BLOB + 4;
+        static_assert(STRIDE % 8 != 0, "the stride must defeat the uint2 code loads");
+        const int nb = 8;
+        uint8_t* d_arena = dalloc<uint8_t>((size_t) nb * STRIDE + 8);
+        const int n_hits = 4;
+        std::vector<int32_t> slot{6, 1, 3, 0}, dst{2, 7, 5, 8};
+        int32_t* d_slot = dalloc<int32_t>(n_hits);
+        int32_t* d_dst = dalloc<int32_t>(n_hits);
+        up(d_slot, slot);
+        up(d_dst, dst);
+        const Scratch s = make_scratch(n_hits);
+        float* d_out = dalloc<float>((size_t) K * H);
+        std::vector<Entry> ent;
+        for (int i = 0; i < n_hits; ++i) ent.push_back({fx.hb(slot[i]), 0, dst[i]});
+        // One allocation for both layouts: the BLOB + 4 strided copies first, then the same blobs BLOB apart from
+        // `d_arena + 4` over them.
+        for (int i = 0; i < nb; ++i)
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_arena + (size_t)i * STRIDE, fx.hb(i), BLOB).wait()),
+               "arena");
+        {
+            Run r;
+            twice("moe_hit_grouped_s2 (slot stride BLOB + 4)", d_out, (size_t) K * H, s, [&] {
+                k::moe_hit_grouped_s2(d_arena, d_slot, d_dst, n_hits, (int64_t) STRIDE, d_x, s.p, d_out, nullptr,
+                                      d_xs);
+            }, &r, /*expect_new=*/false);
+            reference("moe_hit_grouped_s2 (slot stride BLOB + 4)", r, s, ent, x, &xs);
+        }
+        for (int i = 0; i < nb; ++i)
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   d_arena + 4 + (size_t)i * BLOB, fx.hb(i), BLOB).wait()),
+               "arena");
+        {
+            Run r;
+            twice("moe_hit_grouped_s2 (arena 4 mod 8)", d_out, (size_t) K * H, s, [&] {
+                k::moe_hit_grouped_s2(d_arena + 4, d_slot, d_dst, n_hits, (int64_t) BLOB, d_x, s.p, d_out, nullptr,
+                                      d_xs);
+            }, &r, /*expect_new=*/false);
+            reference("moe_hit_grouped_s2 (arena 4 mod 8)", r, s, ent, x, &xs);
+        }
+    }
+}
+
+// ---------------------------------------------------------------- --bench
+// Engine-like shapes with the blobs cycled through a set larger than the L2, so each call reads its codes from
+// DRAM as the engine's do.  Reports microseconds per call and the codes' effective bandwidth.
+void bench() {
+    int dev = 0;
+    dpct::device_info prop{};
+    ck(DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()), "dev");
+    ck(DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(prop)), "props");
+    /*
+    DPCT1051: SYCL does not support a device property functionally
+    compatible with l2CacheSize. It was migrated to global_mem_cache_size. You
+    may need to adjust the value of global_mem_cache_size for the specific
+    device.
+    */
+    const int nb = std::max(
+        48, (int)(3ull * (size_t)prop.get_global_mem_cache_size() / BLOB) + 8);
+    /*
+    DPCT1051: SYCL does not support a device property functionally
+    compatible with l2CacheSize. It was migrated to global_mem_cache_size. You
+    may need to adjust the value of global_mem_cache_size for the specific
+    device.
+    */
+    std::printf("bench: %s, L2 %d MB, %d blobs (%.0f MB) cycled\n",
+                prop.get_name(), prop.get_global_mem_cache_size() >> 20, nb,
+                nb * (double)BLOB / 1e6);
+    std::mt19937 rng(7);
+    Fixture fx;
+    fx.nb = nb;
+    fx.d = dalloc<uint8_t>((size_t) nb * BLOB);
+    {
+        std::vector<uint8_t> b(BLOB);
+        for (int i = 0; i < nb; ++i) {
+            fill_blob(b.data(), rng);
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                   fx.d + (size_t)i * BLOB, b.data(), BLOB).wait()),
+               "blob");
+        }
+    }
+    std::vector<uint8_t> x;
+    std::vector<float> xs;
+    fill_x(x, xs, 8, rng);
+    uint8_t* d_x = dalloc<uint8_t>(x.size());
+    float* d_xs = dalloc<float>(xs.size());
+    up(d_x, x);
+    up(d_xs, xs);
+    constexpr int K = 10, ITERS = 200, SETS = 16;
+    dpct::event_ptr e0, e1;
+    ck(DPCT_CHECK_ERROR(e0 = new sycl::event()), "ev");
+    ck(DPCT_CHECK_ERROR(e1 = new sycl::event()), "ev");
+    auto time = [&](const std::function<void(int)> &call) {
+        try {
+    call(0);
+        ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
+           "warm");
+        /*
+        DPCT1024: The original code returned the error code that was further
+        consumed by the program logic. This original code was replaced with 0.
+        You may need to rewrite the program logic consuming the error code.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::sync_barrier(e0)), "rec");
+        for (int i = 0; i < ITERS; ++i) call(i % SETS);
+        /*
+        DPCT1024: The original code returned the error code that was further
+        consumed by the program logic. This original code was replaced with 0.
+        You may need to rewrite the program logic consuming the error code.
+        */
+        ck(DPCT_CHECK_ERROR(dpct::sync_barrier(e1)), "rec");
+        ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "sync");
+        float ms = 0;
+        ck(DPCT_CHECK_ERROR(
+               ms = (e1->get_profiling_info<
+                         sycl::info::event_profiling::command_end>() -
+                     e0->get_profiling_info<
+                         sycl::info::event_profiling::command_start>()) /
+                    1000000.0f),
+           "elapsed");
+        return 1000.0 * ms / ITERS;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    auto ab = [&](const char* name, double blobs_per_call, const std::function<void(int)>& call) {
+        double us[2];
+        for (int old = 1; old >= 0; --old) {
+            k::moe_grouped_select_old(old);
+            us[old ? 0 : 1] = time(call);
+        }
+        k::moe_grouped_select_old(-1);
+        const double gb = blobs_per_call * (double) BLOB / 1e3;   // bytes / us = MB/s ... / 1e3 -> GB/s
+        std::printf("  %-40s previous %8.1f us (%6.0f GB/s)   new %8.1f us (%6.0f GB/s)   x%.2f\n", name, us[0],
+                    gb / us[0], us[1], gb / us[1], us[0] / us[1]);
+    };
+
+    // per-hit path, decode: 9 hits of 10 (5090-like residency), 5 of 10, and the low-residency 1-3 hits, where the
+    // new kernels' grid (80 gate/up blocks per hit) is below one block per SM - see `STRATA_GROUPED_PAIR_MIN_HITS`
+    for (const int n_hits : {9, 5, 3, 2, 1}) {
+        std::vector<int32_t> slots((size_t) SETS * n_hits), dst(K);
+        for (auto& v : slots) v = (int32_t) (rng() % nb);
+        std::iota(dst.begin(), dst.end(), 0);
+        int32_t* d_slots = dalloc<int32_t>(slots.size());
+        int32_t* d_dst = dalloc<int32_t>(K);
+        up(d_slots, slots);
+        up(d_dst, dst);
+        const Scratch s = make_scratch(n_hits);
+        float* d_out = dalloc<float>((size_t) K * H);
+        const std::string name = "moe_hit_grouped_s2, " + std::to_string(n_hits) + " hits";
+        ab(name.c_str(), n_hits, [&](int set) {
+            k::moe_hit_grouped_s2(fx.d, d_slots + (size_t) set * n_hits, d_dst, n_hits, (int64_t) BLOB, d_x, s.p,
+                                  d_out, nullptr, d_xs);
+        });
+    }
+    // grouped path, verify window: T tokens x 10, routed with `share` = the chance an entry reuses an expert already
+    // routed by an earlier token of the window
+    struct Shape { int T; double share; const char* what; };
+    for (const Shape sh : {Shape{4, 0.0, "4 tokens, no sharing"}, Shape{4, 0.3, "4 tokens, 30% shared"},
+                           Shape{8, 0.3, "8 tokens, 30% shared"}, Shape{8, 1.0, "8 tokens, all shared (ne 8)"}}) {
+        const int n = sh.T * K;
+        std::vector<unsigned long long> gptr((size_t) SETS * n);
+        std::vector<int32_t> gstart((size_t) SETS * (n + 1)), ng(SETS), edst((size_t) SETS * n), etok((size_t) SETS * n);
+        double groups = 0;
+        std::uniform_real_distribution<double> u(0, 1);
+        for (int set = 0; set < SETS; ++set) {
+            std::vector<std::vector<int>> g;       // per group: routing indices
+            std::vector<int> gexp;                 // per group: blob
+            for (int t = 0; t < sh.T; ++t) {
+                std::vector<char> used(g.size(), 0);
+                for (int j = 0; j < K; ++j) {
+                    int pick = -1;
+                    if (t > 0 && u(rng) < sh.share)
+                        for (size_t q = 0; q < g.size(); ++q)
+                            if (!used[q] && (int) g[q].size() < 8) { pick = (int) q; break; }
+                    if (pick < 0) {
+                        pick = (int) g.size();
+                        g.emplace_back();
+                        gexp.push_back((int) (rng() % nb));
+                        used.push_back(0);
+                    }
+                    used[(size_t) pick] = 1;
+                    g[(size_t) pick].push_back(t * K + j);
+                }
+            }
+            int at = 0;
+            for (size_t q = 0; q < g.size(); ++q) {
+                gptr[(size_t) set * n + q] = (unsigned long long) (fx.d + (size_t) gexp[q] * BLOB);
+                gstart[(size_t) set * (n + 1) + q] = at;
+                for (int e : g[q]) {
+                    edst[(size_t) set * n + at] = e;
+                    etok[(size_t) set * n + at] = e / K;
+                    ++at;
+                }
+            }
+            for (size_t q = g.size(); q <= (size_t) n; ++q) gstart[(size_t) set * (n + 1) + q] = at;
+            ng[set] = (int32_t) g.size();
+            groups += (double) g.size() / SETS;
+        }
+        unsigned long long* d_gptr = dalloc<unsigned long long>(gptr.size());
+        int32_t* d_gstart = dalloc<int32_t>(gstart.size());
+        int32_t* d_ng = dalloc<int32_t>(SETS);
+        int32_t* d_edst = dalloc<int32_t>(edst.size());
+        int32_t* d_etok = dalloc<int32_t>(etok.size());
+        up(d_gptr, gptr);
+        up(d_gstart, gstart);
+        up(d_ng, ng);
+        up(d_edst, edst);
+        up(d_etok, etok);
+        const Scratch s = make_scratch(n);
+        float* d_out = dalloc<float>((size_t) n * H);
+        char name[96];
+        std::snprintf(name, sizeof name, "moe_grouped_s2, %s (%.0f groups)", sh.what, groups);
+        ab(name, groups, [&](int set) {
+            k::moe_grouped_s2(d_gptr + (size_t) set * n, d_gstart + (size_t) set * (n + 1), d_ng + set,
+                              d_edst + (size_t) set * n, d_etok + (size_t) set * n, n, n, d_x, d_xs, s.p, d_out,
+                              nullptr);
+        });
+    }
+}
+}  // namespace
+
+int main(int argc, char** argv) {
+    bool do_bench = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::strcmp(argv[i], "--bench") == 0) do_bench = true;
+        else if (std::strcmp(argv[i], "--selftest") != 0) {
+            std::fprintf(stderr, "usage: s2_expert_grouped_parity [--selftest] [--bench]\n");
+            return 2;
+        }
+    }
+    std::printf("s2_expert_grouped_parity: new expert kernels vs the previous ones, bitwise\n");
+    check_all();
+    if (do_bench) bench();
+    std::printf("s2_expert_grouped_parity: %d failures\n%s\n", g_fail, g_fail ? "FAIL" : "PASS");
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/prefill/gemm.dp.cpp b/sycl/src/prefill/gemm.dp.cpp
index 3a683a7a8a8..50d8541a578 100644
--- a/sycl/src/prefill/gemm.dp.cpp
+++ b/sycl/src/prefill/gemm.dp.cpp
@@ -45,6 +45,13 @@ void ck(int s, const char *what) {
     }
 }
 
+// A setup call whose failure the engine survives (the handle keeps its defaults), as before #240 - but said.
+void note(int s, const char *what) {
+    if (s != 0) std::fprintf(
+        stderr, "prefill gemm: %s: cuBLAS status %d (continuing)\n", what,
+        (int)s);
+}
+
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
 struct HipLtCallKey {
     strata::prefill::hipblaslt::InputType type;
@@ -289,19 +296,24 @@ bool Gemm::init_external(void *stream, uint16_t *scratch, int64_t scratch_elems,
                          void *workspace, size_t ws_bytes,
                          std::string &err) try {
     dpct::blas::descriptor_ptr h = nullptr;
-    if (DPCT_CHECK_ERROR(h = new dpct::blas::descriptor()) != 0) {
-        err = "prefill gemm: cublasCreate failed"; return false;
+    if (const int s = DPCT_CHECK_ERROR(h = new dpct::blas::descriptor());
+        s != 0) {
+        err = "prefill gemm: cublasCreate: cuBLAS status " + std::to_string((int) s);
+        return false;
     }
     handle_ = h;
     stream_ = stream;
     external_ = true;
-    h->set_queue(strata::q_of(stream));
+    note(DPCT_CHECK_ERROR(h->set_queue(strata::q_of(stream))),
+         "cublasSetStream");
     workspace_ = workspace;
     /*
-    DPCT1026: The call to cublasSetWorkspace was removed because this
-    functionality is redundant in SYCL.
+    DPCT1027: The call to cublasSetWorkspace was replaced with 0 because
+    this functionality is redundant in SYCL.
     */
-    h->set_math_mode(dpct::blas::math_mode::mm_default);
+    note(0, "cublasSetWorkspace");
+    note(DPCT_CHECK_ERROR(h->set_math_mode(dpct::blas::math_mode::mm_default)),
+         "cublasSetMathMode");
     scratch_ = scratch;
     scratch_elems_ = scratch_elems;
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
@@ -333,33 +345,72 @@ void Gemm::rebind(uint16_t* scratch, int64_t scratch_elems, void* workspace, siz
 }
 
 bool Gemm::init(void *stream, int64_t scratch_elems, std::string &err) try {
+    // #240: every failure names the call and the real status, so "no VRAM" can be told from a broken install
     dpct::blas::descriptor_ptr h = nullptr;
-    if (DPCT_CHECK_ERROR(h = new dpct::blas::descriptor()) != 0) {
-        err = "prefill gemm: cublasCreate failed"; return false;
+    if (const int s = DPCT_CHECK_ERROR(h = new dpct::blas::descriptor());
+        s != 0) {
+        err = "prefill gemm: cublasCreate: cuBLAS status " + std::to_string((int) s);
+        return false;
     }
     handle_ = h;
     stream_ = stream;
-    h->set_queue(strata::q_of(stream));
+    note(DPCT_CHECK_ERROR(h->set_queue(strata::q_of(stream))),
+         "cublasSetStream");
     // A fixed workspace so the handle never allocates on the way (and graphs could capture it later).
     const size_t ws = 32u << 20;
-    if (DPCT_CHECK_ERROR(workspace_ = (void *)sycl::malloc_device(
-                             ws, dpct::get_in_order_queue())) != 0) {
-        err = "prefill gemm: workspace"; return false;
+    /*
+    DPCT1000: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (const dpct::err0 e =
+            DPCT_CHECK_ERROR(workspace_ = (void *)sycl::malloc_device(
+                                 ws, dpct::get_in_order_queue()));
+        e != 0) {
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1001: The statement could not be removed.
+        */
+        err = std::string("prefill gemm: workspace of 32 MiB: ") +
+              dpct::get_error_string_dummy(e);
+        return false;
     }
     /*
-    DPCT1026: The call to cublasSetWorkspace was removed because this
-    functionality is redundant in SYCL.
+    DPCT1027: The call to cublasSetWorkspace was replaced with 0 because
+    this functionality is redundant in SYCL.
     */
-    h->set_math_mode(dpct::blas::math_mode::mm_default);
+    note(0, "cublasSetWorkspace");
+    note(DPCT_CHECK_ERROR(h->set_math_mode(dpct::blas::math_mode::mm_default)),
+         "cublasSetMathMode");
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
     hipblaslt_state_ = create_hipblaslt_state(workspace_, ws).release();
 #endif
-    if (scratch_elems > 0 &&
-        DPCT_CHECK_ERROR(
-            scratch_ = (uint16_t *)sycl::malloc_device(
-                (size_t)scratch_elems * 2, dpct::get_in_order_queue())) != 0) {
-        err = "prefill gemm: dequant scratch of " + std::to_string(scratch_elems * 2 >> 20) + " MiB";
-        return false;
+    if (scratch_elems > 0) {
+        /*
+        DPCT1000: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (const dpct::err0 e = DPCT_CHECK_ERROR(
+                scratch_ = (uint16_t *)sycl::malloc_device(
+                    (size_t)scratch_elems * 2, dpct::get_in_order_queue()));
+            e != 0) {
+            /*
+            DPCT1001: The statement could not be removed.
+            */
+            err = "prefill gemm: dequant scratch of " +
+                  std::to_string(scratch_elems * 2 >> 20) + " MiB: " +
+                  /*
+                  DPCT1009: SYCL reports errors using exceptions and does
+                  not use error codes. Please replace the
+                  "get_error_string_dummy(...)" with a real error-handling
+                  function.
+                  */
+                  dpct::get_error_string_dummy(e);
+            return false;
+        }
     }
     scratch_elems_ = scratch_elems;
     return true;
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index cfafd1f103b..88adbd50d99 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -942,17 +942,21 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
 }
 __dpct_inline__ void rope_kernel(float *__restrict__ x, int64_t heads,
                                  int64_t dim, int64_t ld, int64_t pos0,
-                                 float theta_scale,
+                                 float theta_scale, float freq_scale,
+                                 float corr_low, float corr_high,
+                                 float ext_factor, float mscale,
                                  const int32_t *__restrict__ mtab) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t row = item_ct1.get_group(2); // t * heads + h
     const int pair = item_ct1.get_local_id(2); // 0..31
     const int64_t t = row / heads, h = row % heads;
     float* p = x + t * ld + h * dim;
-    const float theta =
+    const float theta_extrap =
         (float)strata::kernels::mrope_pos(mtab, (int)(pos0 + t), pair) *
         dpct::pow(theta_scale, (float)pair);
-    const float c = sycl::cos((float)theta), s = sycl::sin((float)theta);
+    float c, s;
+    strata::kernels::rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale,
+                                       pair, c, s);
     const float a = p[pair], b = p[pair + 32];
     p[pair] = a * c - b * s;
     p[pair + 32] = a * s + b * c;
@@ -1678,15 +1682,23 @@ void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld,
     }
     check("rms_rows");
 }
-void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t pos0, float freq_base, void* stream) {
-    const float theta_scale = powf(freq_base, -2.0f / 64.0f);
+void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t pos0,
+          const strata::kernels::RopeScaling& scaling, void* stream) {
+    // The engine validates the resolved config at startup with the same rule (generate.cpp), so this only
+    // fires for a caller that bypassed it; the prompt path has no error return here, so it stops the process.
+    if (const char* why = strata::kernels::rope_scaling_invalid(scaling)) {
+        std::fprintf(stderr, "prefill rope: invalid rope scaling: %s\n", why);
+        std::exit(1);
+    }
+    const float theta_scale = powf((float) scaling.freq_base, -2.0f / 64.0f);
+    const strata::kernels::RopeKernelArgs k = scaling.kernel_args(64);   // none: the identity constants
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
             ->submit([&](sycl::handler &cgh) {
-                auto strata_kernels_mrope_table_ct6 =
+                auto strata_kernels_mrope_table_ct11 =
                     strata::kernels::mrope_table();
 
                 cgh.parallel_for<dpct_kernel_name<class rope_kernel_4d58b9>>(
@@ -1695,7 +1707,9 @@ void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t p
                                       sycl::range(1, 1, 32)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
                         rope_kernel(x, heads, dim, ld, pos0, theta_scale,
-                                    strata_kernels_mrope_table_ct6);
+                                    k.freq_scale, k.corr_low, k.corr_high,
+                                    k.ext_factor, k.attn_factor,
+                                    strata_kernels_mrope_table_ct11);
                     });
             });
     }
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 348167925bb..6fa9ae0dbb2 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -71,12 +71,19 @@ constexpr int64_t N = 2560, HC = 4, D = N * HC, LR = 320, K = 10, NE = 512;
 constexpr int64_t C = 10240, ZV = 6144, HV = 48;
 // plan v0.3 P6: staging holds the largest blob of the pack (a native pack's blobs differ per layer)
 inline int64_t MAXBLOB() { return (int64_t) strata::kernels::cpu::expert_layout().max_blob; }
-constexpr int STAGE = 8;           // host->device expert staging ring (chunks below STREAM_ALL_MIN)
+constexpr int STAGE = 8;           // host->device expert staging ring (chunks below stream_all_min())
 // Step 3: from this chunk size on, every non-resident expert of every layer streams in a fixed order through a
 // RING_MAX-slot ring (nearly all 512 are routed at such a chunk), so the copy engine keeps working through the
 // attention halves instead of waiting for each layer's routing.
 constexpr int RING_MAX = 512;           // the arrays; the ring itself is ring_slots()
-constexpr int64_t STREAM_ALL_MIN = 2048;
+// The chunk size from which every expert streams: 1024 since 0.1.30 (was 2048).  Measured on the 5070, Q2_0 / IQ2_XS,
+// fixed cache: 1,500-token prompts 621 -> 785 / 612 -> 735 tok/s, 2,000 727 -> 934 / 712 -> 892, 4,000 (its last
+// chunk) 779 -> 912 / 766 -> 844, the same output.  Below ~1,000 tokens the output changed on Q2_0 (a smaller chunk
+// takes other kernels), so 1024 is the floor.  STRATA_PREFILL_STREAM_MIN overrides (A/B).
+inline int64_t stream_all_min() {
+    static const int64_t v = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_MIN"); return e ? (int64_t) std::atoll(e) : (int64_t) 1024; }();
+    return v;
+}
 double g_pinned_share = 1.0;
 // The streamed ring: 384 slots when (nearly) every streamed expert is DMA'd from pinned RAM - measured on Q2_0,
 // 8192-token chunks: 96 slots 1153 tok/s, 384 1294 (the next layer's experts arrive during its attention half) -
@@ -93,7 +100,7 @@ inline int ring_slots(size_t T) {
     static const bool stream_all_ok = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_ALL"); return e && e[0] == '1'; }();
     if (!stream_all_ok) return STAGE;
     const int big = r < 16 ? 16 : r > RING_MAX ? RING_MAX : r;
-    return (int64_t) T >= STREAM_ALL_MIN ? big : STAGE;
+    return (int64_t) T >= stream_all_min() ? big : STAGE;
 }
 constexpr int DQ = 2;              // dequantized-expert ring (FP16 gate/up + down)
 
@@ -149,7 +156,12 @@ struct Stager {
     // DMAs of the unpinned experts' blobs
     int kRing = 16;
     // SYCL port: a job may name the expert instead of a host pointer - the thread reads it from the GGUF itself
-    struct Job { const uint8_t* src; size_t bytes; int64_t layer = -1; int64_t expert = -1; const core::GgufExpertSource* gsrc = nullptr; };
+    // (`gsrc`). `from` set: the blob is copied by the source itself (CS-T: a GGUF read in place assembles it from its
+    // three role slices; a pointer to it would not live as long as the queue)
+    struct Job {
+        const uint8_t* src; size_t bytes; core::ExpertSource* from = nullptr; int32_t l = 0, e = 0;
+        const core::GgufExpertSource* gsrc = nullptr;
+    };
     std::vector<uint8_t*> buf;
     std::vector<char> pinned;
     std::vector<std::vector<uint8_t>> pageable;   // the fallback when no more RAM can be pinned
@@ -232,14 +244,17 @@ struct Stager {
                     while (issued.load(std::memory_order_acquire) <= j - kRing) std::this_thread::yield();
                     dma_done[b]->wait_and_throw();
                 }
-                if (jobs[(size_t) j].gsrc != nullptr) {
-                    if (!jobs[(size_t) j].gsrc->read_into(jobs[(size_t) j].layer, jobs[(size_t) j].expert, buf[b], jobs[(size_t) j].bytes)) {
-                        std::fprintf(stderr, "prefill: reading expert %lld of layer %lld from the GGUF failed\n",
-                                     (long long) jobs[(size_t) j].expert, (long long) jobs[(size_t) j].layer);
-                        std::memset(buf[b], 0, jobs[(size_t) j].bytes);
+                const Job& jb = jobs[(size_t) j];
+                if (jb.gsrc != nullptr) {
+                    if (!jb.gsrc->read_into(jb.l, jb.e, buf[b], jb.bytes)) {
+                        std::fprintf(stderr, "prefill: reading expert %d of layer %d from the GGUF failed\n", jb.e, jb.l);
+                        std::memset(buf[b], 0, jb.bytes);
                     }
-                } else {
-                    std::memcpy(buf[b], jobs[(size_t) j].src, jobs[(size_t) j].bytes);
+                } else if (jb.from == nullptr) {
+                    std::memcpy(buf[b], jb.src, jb.bytes);
+                } else if (!jb.from->copy_blob(jb.l, jb.e, buf[b])) {
+                    std::fprintf(stderr, "prefill: the expert source could not copy expert %d of layer %d\n", jb.e, jb.l);
+                    std::abort();
                 }
                 ready[(size_t) j].store(1, std::memory_order_release);
                 active.fetch_sub(1, std::memory_order_acq_rel);
@@ -379,7 +394,7 @@ namespace {
 bool stage_own() { static const bool v = std::getenv("STRATA_KV_STAGE_OWN") != nullptr; return v; }
 void take_stage(Alloc& o_borrowed, const core::SessionState& ss, const strata::kernels::QsaShapes& s,
                 strata::kernels::KvHostPools& st, bool& ok) {
-    const core::QsaState& q0 = ss.qsa_states[0];
+    const core::QsaState& q0 = ss.qsa_states[ss.qsa_primary()];
     if (q0.kv_mode != 1) return;
     if (stage_own() && o_borrowed.count_only) return;
     Alloc own;
@@ -409,7 +424,15 @@ strata::kernels::QsaAttnPools pools_of(const strata::kernels::KvHostPools& h, co
 }  // namespace
 
 Prefill::Prefill() : impl_(new Impl) {}
-Prefill::~Prefill() {
+Prefill::~Prefill() { release(); }
+
+void Prefill::reset() {
+    release();
+    impl_.reset(new Impl);
+    stats_ = PrefillStats{};
+}
+
+void Prefill::release() {
     if (!impl_) return;
     if (impl_->cs) impl_->cs->wait();
     if (impl_->copy) impl_->copy->wait();
@@ -540,10 +563,24 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
             return false;
         }
     if (m.tok_dev == nullptr) {
-        if (DPCT_CHECK_ERROR(m.tok_dev = sycl::malloc_device<int32_t>(
-                                 (size_t)chunk, dpct::get_in_order_queue())) !=
-            0) {
-            err = "prefill: the token id buffer";
+        /*
+        DPCT1000: Error handling if-stmt was detected but could not be
+        rewritten.
+        */
+        if (const dpct::err0 e = DPCT_CHECK_ERROR(
+                m.tok_dev = sycl::malloc_device<int32_t>(
+                    (size_t)chunk, dpct::get_in_order_queue()));
+            e != 0) {
+            /*
+            DPCT1009: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            /*
+            DPCT1001: The statement could not be removed.
+            */
+            err = std::string("prefill: the token id buffer (") +
+                  dpct::get_error_string_dummy(e) + ")";
             return false;
         }
         m.owned.push_back(m.tok_dev);
@@ -628,8 +665,8 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
             ok = false;
         m.ple_rows[b].resize(T * strata::kernels::PLE_N_HEADS);
     }
-    if (ss.qsa_states[0].kv_mode == 1) {   // KV streaming: the staging pool's identity page table
-        const int64_t pages = ss.qsa_states[0].n_pages;
+    if (ss.qsa_states[ss.qsa_primary()].kv_mode == 1) {   // KV streaming: the staging pool's identity page table
+        const int64_t pages = ss.qsa_states[ss.qsa_primary()].n_pages;
         std::vector<int32_t> ident((size_t) pages);
         for (int64_t i = 0; i < pages; ++i) ident[(size_t) i] = (int32_t) i;
         if (DPCT_CHECK_ERROR(
@@ -690,7 +727,7 @@ bool Prefill::carve(size_t T, void* alloc) {
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
     s.idx_dim = g.idx_key_dim;
     m.cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
-    m.max_blocks = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    m.max_blocks = ss.qsa_states[ss.qsa_primary()].max_cells / s.idx_block + 2;
     {
         // one region for the attention half's and the MoE half's scratch (see gdn_set_bytes)
         const uint64_t region = std::max({gdn_set_bytes(T), qsa_set_bytes(T, m.cap, m.max_blocks, m.sel_batch,
@@ -935,7 +972,7 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
         proj(mixed, mixed_h, w_k, Kc, nb, KV, Nn, 0);
         proj(mixed, mixed_h, w_v, Vc, nb, KV, Nn, 0);
         rms_rows(Kc, w_kn, nb * g.n_head_kv, g.head_dim, g.head_dim, EPS, m.cs);
-        rope(Kc, nb, g.n_head_kv, g.head_dim, KV, c0, (float) strata::kernels::qsa_freq_base(), m.cs);
+        rope(Kc, nb, g.n_head_kv, g.head_dim, KV, c0, strata::kernels::rope_scaling(), m.cs);
         if (st.kv_q4) {
             strata::kernels::fwht256_inplace_cuda(Kc, nb * g.n_head_kv, m.cs);
             strata::kernels::fwht256_inplace_cuda(Vc, nb * g.n_head_kv, m.cs);
@@ -982,7 +1019,7 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
     s.idx_dim = g.idx_key_dim;
     const int64_t cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
-    const int64_t max_blocks = ss.qsa_states[0].max_cells / s.idx_block + 2;
+    const int64_t max_blocks = ss.qsa_states[ss.qsa_primary()].max_cells / s.idx_block + 2;
     o.take<uint8_t>((size_t) std::max({gdn_set_bytes(T), qsa_set_bytes(T, cap, max_blocks, 256, 32, s),
                                        moe_set_bytes(T, g.n_expert)}), ok);
     for (int i = 0; i < DQ; ++i) { o.take<uint16_t>(1280 * 2560, ok); o.take<uint16_t>(2560 * 640, ok); }
@@ -1152,6 +1189,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         if (should_stop && should_stop()) { err = "cancelled"; return false; }
         if (std::getenv("STRATA_TRACE")) { std::fprintf(stderr, "strata trace: prompt chunk %lld of %lld\n", (long long) c0, (long long) n); std::fflush(stderr); }
         const int64_t T = chunk_len(c0), p0 = pos0 + c0;
+        core::progress_at("reading the prompt (batched): preparing the chunk from token", p0);   // #251
         ++stats_.chunks;
         pt.mark(kPfStart, cs);
         const auto tsetup = Clock::now();
@@ -1286,7 +1324,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         // k lands in ring slot k % ring); a copy is issued once the entry `ring` before it is consumed (its slot's
         // `used` event recorded), so the copy stream never waits on an event that is not queued yet
         const strata::kernels::cpu::ExpertLayout& lay0 = strata::kernels::cpu::expert_layout();
-        const bool stream_all = m.ring > STAGE && T >= STREAM_ALL_MIN && m.src != nullptr;
+        const bool stream_all = m.ring > STAGE && T >= stream_all_min() && m.src != nullptr;
         struct StreamEntry { int32_t l, e; const uint8_t* blob; int job; };
         std::vector<StreamEntry> seq;
         std::vector<size_t> seq_start;
@@ -1304,7 +1342,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     int job = -1;
                     if (gsrc != nullptr) {   // read by the stager's thread when its turn comes (see Stager::Job)
                         job = (int) js.size();
-                        js.push_back({nullptr, (size_t) lay0.blob_bytes(l), l, e, gsrc});
+                        js.push_back({nullptr, (size_t) lay0.blob_bytes(l), nullptr, (int32_t) l, e, gsrc});
+                    } else if (m.src->transient(l, e)) {   // CS-T: copied by the source into the stager's buffer
+                        job = (int) js.size();
+                        js.push_back({nullptr, (size_t) lay0.blob_bytes(l), m.src, (int32_t) l, e});
                     } else {
                         b = m.src->blob(l, e);
                         if (!b) { err = "prefill: expert source has no blob"; return false; }
@@ -1447,6 +1488,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
         for (int64_t l = LB; l < LE; ++l) {
             core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
+            core::progress_at("reading the prompt (batched): layer", l, p0);   // #251: a stall names layer and chunk
             const core::LayerView v(*m.wt, l);
             // ---- the PLE block at layer 1, token by token (its conv reads the previous tokens' rows)
             if (l == 1 && ple_on && ple_batch) {
@@ -1528,7 +1570,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                           *wsa = need(v, "ssm_a", err);
                     if (!wqkv || !wg || !wo || !wa || !wb || !wc || !wnm || !wdt || !wsa) return false;
                     pt.mark(kPfGdn, cs);
-                    float* state = ss.gdn_state + (size_t) gdn_index * gdn_floats;
+                    float* state = ss.gdn_state + (size_t) (gdn_index - ss.gdn_ord0) * gdn_floats;
                     float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
                     if (!native_proj(m.gemm, wqkv, m.mixed_h, m.qkv, T, v.name("attn_qkv.weight"), err)) return false;
                     if (!native_proj(m.gemm, wg, m.mixed_h, m.z, T, v.name("attn_gate.weight"), err)) return false;
@@ -1560,7 +1602,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     if (!bf16_proj(m.gemm, wik, m.mixed_bf, m.idx_raw, T, v.name("indexer.k_proj.weight"), err)) return false;
                     if (!bf16_proj(m.gemm, wiq, m.mixed_bf, m.q_idx, T, v.name("indexer.q_proj.weight"), err)) return false;
                     rms_rows(m.Kc, (const float*) wkn->data, T * 2, 256, 256, EPS, m.cs);
-                    rope(m.Kc, T, 2, 256, 512, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    rope(m.Kc, T, 2, 256, 512, p0, strata::kernels::rope_scaling(), m.cs);
                     // KV streaming: this layer's cells [0, p0) come in from the host copy to the staging pool, and the
                     // chunk's cells go to the host copy, the staging pool, and the VRAM slots of resident blocks
                     const bool staged = st.kv_mode == 1;
@@ -1590,10 +1632,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     }
                     split_q(m.Qf, m.q, T, m.cs);
                     rms_rows(m.q, (const float*) wqn->data, T * 24, 256, 256, EPS, m.cs);
-                    rope(m.q, T, 24, 256, 6144, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    rope(m.q, T, 24, 256, 6144, p0, strata::kernels::rope_scaling(), m.cs);
                     if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(m.q, T * 24, m.cs);
                     rms_rows(m.q_idx, (const float*) wiqn->data, T * 4, 128, 128, EPS, m.cs);
-                    rope(m.q_idx, T, 4, 128, 512, p0, (float) strata::kernels::qsa_freq_base(), m.cs);
+                    rope(m.q_idx, T, 4, 128, 512, p0, strata::kernels::rope_scaling(), m.cs);
                     // the indexer appends, token by token; then scores + selection for many queries at once:
                     // a query reads completed blocks (final once completed) and `dead` for its own tail block
                     const strata::kernels::QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
@@ -1605,13 +1647,13 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         if (!per_token) {
                             strata::kernels::native_qsa_indexer_append_batch(m.idx_raw, T, p0, 0, (const float*) wikn->data,
                                                                              EPS, ib, s, st.max_cells,
-                                                                             (float) strata::kernels::qsa_freq_base(), m.cs);
+                                                                             strata::kernels::rope_scaling(), m.cs);
                         }
                         for (int64_t t = 0; per_token && t < T; ++t) {
                             const int32_t* step_t = m.steps_dev + t * strata::kernels::kStepCount;
                             strata::kernels::native_qsa_indexer_append(m.idx_raw + t * 128, step_t + strata::kernels::kStepPos, 0,
                                                                        (const float*) wikn->data, EPS, ib, s, st.max_cells,
-                                                                       (float) strata::kernels::qsa_freq_base(), m.cs);
+                                                                       strata::kernels::rope_scaling(), m.cs);
                         }
                     } catch (const std::exception& e) { err = std::string("prefill indexer: ") + e.what(); return false; }
                     pt.mark(kPfQsaSel, cs);
@@ -1928,7 +1970,14 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
                             if (m.src->pinned(l, e)) continue;
                             job_of[j] = (int) js.size();
-                            if (gsrc != nullptr) { js.push_back({nullptr, (size_t) lay.blob_bytes(l), l, e, gsrc}); continue; }
+                            if (gsrc != nullptr) {
+                                js.push_back({nullptr, (size_t) lay.blob_bytes(l), nullptr, (int32_t) l, e, gsrc});
+                                continue;
+                            }
+                            if (m.src->transient(l, e)) {   // CS-T: copied by the source
+                                js.push_back({nullptr, (size_t) lay.blob_bytes(l), m.src, (int32_t) l, e});
+                                continue;
+                            }
                             const uint8_t* b = m.src->blob(l, e);
                             if (!b) { err = "prefill: expert source has no blob"; return false; }
                             js.push_back({b, (size_t) lay.blob_bytes(l)});
@@ -1944,9 +1993,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         const int sl = stage_next;
                         stage_next = (stage_next + 1) % STAGE;
                         const auto th = Clock::now();
-                        const uint8_t* b = m.src->blob(l, e);
-                        if (!b) { err = "prefill: expert source has no blob"; return false; }
-                        if (m.src->pinned(l, e)) {
+                        const bool pinned = m.src->pinned(l, e);   // pinned: never transient
+                        const uint8_t* b = pinned ? m.src->blob(l, e) : nullptr;
+                        if (pinned && !b) { err = "prefill: expert source has no blob"; return false; }
+                        if (pinned) {
                             // DMA straight from the page-locked arena: the copy stream only waits for the slot
                             if (m.stage_live[sl])(m.copy)
                                 ->ext_oneapi_submit_barrier({*m.used[sl]});
@@ -2188,6 +2238,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             stats_.experts_dma += iss_dma;
         }
         stats_.tokens += T;
+        core::progress_at("reading the prompt (batched): finishing the chunk from token", p0);
         pt.mark(kPfStart, cs);
         if (next_ != nullptr) {
             // the rows to the host buffer the next stage read two chunks ago (it has finished: waited below)
@@ -2352,7 +2403,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         std::vector<uint8_t> b((size_t) gdn_floats * 4);
         std::string line;
         char h[8];
-        for (int64_t i = 0; i < g.n_gdn_layers(); ++i) {
+        for (int64_t i = 0; i < ss.gdn_alloc; ++i) {
             dpct::get_in_order_queue()
                 .memcpy(b.data(), ss.gdn_state + (size_t)i * gdn_floats,
                         b.size())
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 34a60598964..d7c835c429a 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -18,10 +18,14 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/core/device.hpp"
 #include "strata/core/expert_cache.hpp"
+#include "strata/core/conversation_snapshot.hpp"
+#include "strata/core/conversation_memory.hpp"
 #include "strata/core/expert_source.hpp"
 #include "strata/core/gguf_expert_source.hpp"
 #include "strata/kernels/resident_plan_mirror.hpp"
+#include "strata/core/pinned.hpp"
 #include "strata/core/remote_experts.hpp"
 #include "strata/core/on_device.hpp"
 #include "strata/core/layer.hpp"
@@ -32,6 +36,7 @@
 #include "strata/kernels/cpu/pool.hpp"
 #include "strata/kernels/cpu/expert_layout.hpp"
 #include "strata/kernels/ngram.hpp"
+#include "strata/kernels/iq_kernels.hpp"
 #include "strata/kernels/s2_expert_grouped.hpp"
 #include "strata/kernels/sampler.hpp"
 #include "strata/kernels/verify_kernels.hpp"
@@ -79,6 +84,8 @@
 #include <deque>
 #include <map>
 #include <mutex>
+#include <optional>
+#include <new>
 #include <charconv>
 #include <cmath>
 #include <limits>
@@ -93,6 +100,18 @@
 #include <vector>
 
 namespace {
+// Windows' WDDM driver model: native Windows, or WSL2 (its GPU goes through /dev/dxg to the Windows driver).  There,
+// pinning a large arena into two CUDA contexts leaves WDDM refusing every later allocation (the 5080 + 3090 rig);
+// a Linux driver has no such limit (#253: the 8 GiB cap cost a 4090 + 3060 split 3x of its prompt speed).
+bool under_wddm() {
+#ifdef _WIN32
+    return true;
+#else
+    static const bool dxg = std::filesystem::exists("/dev/dxg");
+    return dxg;
+#endif
+}
+
 // perf-review D-4: the lent slots are refilled with queued copies and one wait; STRATA_REFILL_BLOCKING=1 waits on each
 bool refill_blocking() {
     static const bool v = std::getenv("STRATA_REFILL_BLOCKING") != nullptr;
@@ -101,6 +120,58 @@ bool refill_blocking() {
 
 using Clock = std::chrono::steady_clock;
 
+// The resident RAM mode and the adaptive tier.  A swap copies `in` (held in RAM) into the slot of `out` (held only
+// by that slot).  Before the slot is overwritten, `out`'s bytes are copied back from it into an exchange buffer, so
+// the CPU computes `out` from RAM while the swap is in flight; when the swap has landed, `commit_exchanges` moves
+// them into `in`'s place in RAM.  The RAM copy then again holds exactly the experts no core slot does, and no swap
+// reads the file.  Swaps that need no exchange (`out` in the lend region is held in RAM already; or `in` is not) go
+// on as before; ones beyond the buffers' room wait for a later round.  Runs on the adaptive tier's thread while the
+// GPU commits and drafts: the copies back are on its stream, and waited for before the refills are queued.
+template <class Swap>
+bool resident_stage_swaps(strata::core::FileExpertSource &src,
+                          strata::core::ExpertCache &cache,
+                          const std::vector<int32_t> &host_res,
+                          int64_t n_expert, std::vector<Swap> &swaps,
+                          dpct::queue_ptr stream) try {
+    if (!src.complement_ready() || swaps.empty()) return true;
+    struct Staged { int32_t layer, in, out; int64_t q; };
+    std::vector<Staged> staged;
+    std::vector<Swap> kept;
+    kept.reserve(swaps.size());
+    for (const Swap& s : swaps) {
+        if (!src.has_resident(s.layer, s.in) || src.has_resident(s.layer, s.out)) { kept.push_back(s); continue; }
+        const int64_t q = (int64_t) staged.size();
+        if (q >= src.exchange_capacity()) continue;
+        const int32_t slot = host_res[(size_t) s.layer * (size_t) n_expert + (size_t) s.out];
+        if (slot < 0) continue;
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(stream->memcpy(
+                src.exchange_buffer(q), cache.device_slot(slot),
+                (size_t)strata::kernels::cpu::expert_layout().blob_bytes(
+                    s.layer))) != 0)
+            return false;
+        staged.push_back({s.layer, s.in, s.out, q});
+        kept.push_back(s);
+    }
+    if (!staged.empty()) {
+        if (DPCT_CHECK_ERROR(stream->wait()) != 0) return false;
+        for (const Staged& x : staged)
+            if (!src.stage_exchange(x.layer, x.in, x.out, x.q)) return false;
+    }
+    swaps.swap(kept);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 struct Options {
     std::string pack = "pack/full";
     std::vector<int64_t> tokens;      // the prompt, PRE-TOKENIZED
@@ -133,12 +204,29 @@ struct Options {
     bool native_flash_attn_short = false; // diagnostic pinned attention, context <=256
     bool native_qsa_indexer = false;  // pinned F16 key cache and F32 pooling
     bool native_qsa = false;          // pinned F32 QSA norms and gate
+    /// THE CONTEXT EXTENSION (rope scaling, rope_scaling.hpp).  These knobs resolve to ONE process config,
+    /// set once before `session_init` builds the rope table and the graphs capture the kernels.  There is
+    /// deliberately no per-request form: K sits in the cache POST-RoPE, so one cache must never mix two
+    /// scalings.  Precedence: an EXPLICIT flag over the model file's rope keys over the struct defaults -
+    /// `none` and `1` are explicit values (the opt-outs), the absent flag is not.
+    std::string rope_scaling;           ///< --rope-scaling none|linear|yarn (llama.cpp's names); empty = the flag is absent
+    double rope_scale = 0;              ///< --rope-scale F: the extension factor; 0 = the flag is absent (the model file's, else 1 = off)
+    double rope_freq_base = 0;          ///< --rope-freq-base N: 0 = the model's (1e7)
+    double rope_freq_scale = 0;         ///< --rope-freq-scale F: the raw ggml knob; 0 = 1/--rope-scale
+    double yarn_orig_ctx = 0;           ///< --yarn-orig-ctx N: 0 = the model's, else 262144
+    double yarn_ext_factor = -1.0;      ///< --yarn-ext-factor F: <0 = auto (1 for yarn, 0 otherwise)
+    double yarn_attn_factor = 1.0;      ///< --yarn-attn-factor F
+    double yarn_beta_fast = 32.0;       ///< --yarn-beta-fast F
+    double yarn_beta_slow = 1.0;        ///< --yarn-beta-slow F
     bool native_rope = false;         // pinned text-only CUDA rotary arithmetic
     bool native_ple_postops = false;  // pinned PLE postprojection arithmetic
     bool native_router = false;       // pinned fused 512-expert top-10 router
     bool cpu_oracle_q8_0 = false;      // pinned x86 activation scales/codes at both expert stages
     std::string native_head_gguf;      // native output.weight experiment; same model shard as the pack
     std::vector<std::string> native_dense_gguf; // repeat for native GDN/QSA projection shards
+    /// Every shard of --native's model (strata::gguf_split_paths: the metadata shard first; a missing shard is an
+    /// error) and of --native-head-gguf's (the same list unless that names another model).
+    std::vector<std::string> native_shards, native_head_shards;
     /// Plan v0.3 P1: the whole native arithmetic set as ONE switch (model shard 1). It enables exactly the
     /// combination recorded in bench/results/2026-09-23-attention-ple plus the native indexer, and never the
     /// <=256-token attention adapter. It becomes the default once P0 shows it is not slower.
@@ -186,8 +274,19 @@ struct Options {
     /// is reserved for a host thread that has nothing to do while the drain runs.
     bool no_host_worker = false;
     bool mmap_experts = false;    ///< R2.1: opt OUT of the resident arena, back to MapViewOfFile
+    std::string shared_expert_arena; ///< Linux: optional file backing for the resident arena shared by processes
     bool resident_cpu_experts = false; ///< mmap-backed static-cache misses copied into ordinary RAM
     bool stream_experts = false;  ///< SYCL port: no host arena; blobs read from the GGUF on demand (all experts in VRAM)
+    /// `--resident-experts` (the low-RAM PC's resident mode, chosen by setup): `--resident-cpu-experts` with the copy
+    /// page-locked when the driver allows (else locked in the working set), 4 GiB of RAM headroom, and plain mmap
+    /// (with a warning) when even the experts no slot holds do not fit.
+    bool resident_pin = false;
+    uint64_t resident_headroom = 8ull << 30;
+    bool resident_soft = false;
+    /// CS-T `--resident-budget-gib N`: the resident mode with a RAM budget - the N GiB of experts the GPU cache does
+    /// not hold that the expert profile ranks hottest are copied into RAM, the rest are read from the files in place
+    /// (the GGUF shards when the pack has no experts.bin).  0 = the whole complement (--resident-experts).
+    uint64_t resident_budget = 0;
     /// R4: slots of VRAM-resident experts.  **0 = off, and off is the default.**
     /// **THE COMMENT THAT USED TO BE HERE WAS FALSE AND ROUND 328 MEASURED IT.**  It said "the cache has no
     /// consumer yet - `moe_hit_grouped_s2` does not exist - so switching it on costs the fill traffic and
@@ -278,6 +377,10 @@ struct Options {
     /// the later stages' devices "D1,D2,.." (default: the next visible GPUs; "0" with one K: both stages on this
     /// GPU, sharing everything - the bit-exact A/B of the hand-off)
     std::string split_device;
+    /// --split-skip-if-fits (opt-in; the server passes it for a config's "split_skip_if_fits"): with
+    /// --layer-split auto, run on CUDA0 alone when it holds every profiled expert pair plus the whole session (KV),
+    /// the drafter and the reserve - a split then only adds hand-offs (two RDNA4 cards: 1,384 vs 1,794 tok/s at 4K)
+    bool split_skip_if_fits = false;
     /// Plan v0.3 P8: stay resident and take requests on stdin (see the --serve block in main).
     bool serve = false;
     /// The vision path: keep a per-cell (t, h, w) rotary position table so --serve can take GENI requests.
@@ -287,6 +390,9 @@ struct Options {
     /// prompt again, the v0.1.2 behaviour).  One is the GDN recurrence of the 36 layers, the QSA indexer tails and
     /// the PLE history (~118 MB of host RAM); the KV cache itself is positional and stays where it is.
     int prompt_cache = 6;
+    int64_t conversation_cache_mib = 0; // opt-in host RAM for independent conversations
+    int conversation_cache_slots = 4;
+    int64_t conversation_cache_min_free_mib = 2560;
     /// --serve: also keep a checkpoint every N freshly read prompt tokens (0 = only at the last turn boundary)
     int64_t prompt_cache_every = 16384;
     /// --serve: a prompt read from token 0 is also checkpointed at its first turn boundary - the end of the system
@@ -322,7 +428,8 @@ void usage() {
                  "  --pack DIR           the pack directory (default pack/full)\n"
                  "  --tokens LIST        the prompt as comma-separated token IDS (required)\n"
                  "  --tokens-file PATH   pretokenized prompt, commas or whitespace (alternative to --tokens)\n"
-                 "  --ple-gguf PATH      required PLE table (original second GGUF shard)\n"
+                 "  --ple-gguf PATH      required PLE table (original second GGUF shard); with --native, the model's\n"
+                 "                       shard that holds per_layer_token_embd.weight when not given\n"
                  "  --no-ple             explicit diagnostic ablation of the PLE layer\n"
                  "  --ple-io direct|mmap|ram  n-gram table reads (plan v0.3 P2). direct (default): unbuffered SSD\n"
                  "                       reads, the table never enters RAM or the file cache; mmap: A/B arm;\n"
@@ -365,6 +472,17 @@ void usage() {
                  "  --expert-cache-cpu-order  experimental GPU expert reduction matching CPU order\n"
                  "  --max-new N          tokens to generate (default 16)\n"
                  "  --max-context N      KV/state capacity (default 4096)\n"
+                 "  --rope-scaling T     extend the context past the trained one: none, linear\n"
+                 "                       (position interpolation) or yarn - llama.cpp's types and names.\n"
+                 "                       Default: the model file's rope keys, else none. Fixed at startup:\n"
+                 "                       K in the cache is post-RoPE, so one run one scaling\n"
+                 "  --rope-scale F       the extension factor for linear/yarn (default: the model file's\n"
+                 "                       factor, else 1 = off)\n"
+                 "  --rope-freq-base N   the raw ggml knobs: the frequency base (0 = the model's 1e7) and\n"
+                 "  --rope-freq-scale F  the angle shrink (0 = 1/--rope-scale)\n"
+                 "  --yarn-orig-ctx N    the trained context the correction targets (0 = 262144)\n"
+                 "  --yarn-ext-factor F --yarn-attn-factor F --yarn-beta-fast F --yarn-beta-slow F\n"
+                 "                       YaRN's knobs; defaults: -1 (auto: 1 for yarn), 1, 32, 1\n"
                  "  --greedy             argmax (the default)\n"
                  "  --seed S             enable sampling with this Philox seed\n"
                  "  --top-k N --top-p F --temperature F\n"
@@ -380,6 +498,9 @@ void usage() {
                  "  --vision             --serve takes images too (GENI requests; embeddings from strata-vision)\n"
                  "  --prompt-cache N     --serve: keep N conversation checkpoints between requests (default 6, ~118 MB\n"
                  "                       of RAM each; 0 = read every prompt from the start)\n"
+                 "  --conversation-cache-mib N  --serve: RAM budget for parked conversations (default 0 = off)\n"
+                 "  --conversation-cache-slots N  --serve: at most N parked conversations (default 4)\n"
+                 "  --conversation-cache-min-free-mib N  --serve: physical RAM floor when parking (default 2560)\n"
                  "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
                  "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
                  "  --short-read N       --serve: read at most N fresh text tokens through the decode windows instead\n"
@@ -443,25 +564,15 @@ void usage() {
                  "                       a VRAM cache that holds every expert; for machines with less RAM than experts)\n"
                  "                       The A/B arm: the mmap's rate depends on the OS page cache holding\n"
                  "                       34 GB, and measured 71.97 vs 34.78 ms/token cold vs warm.\n"
-                 "  --resident-cpu-experts  with mmap and a static profile, keep CPU misses resident in ordinary RAM.\n"
-                 "                       Borrowed GPU-cache entries may read from mmap during prompt prefill.\n");
-}
-
-/// All shards of a split GGUF, from shard 1's path ("...-00001-of-00002.gguf"); just the path when it is not split.
-std::vector<std::string> model_shards(const std::string& first) {
-    const std::string tag = "-00001-of-";
-    const size_t at = first.rfind(tag);
-    if (at == std::string::npos || first.size() < at + tag.size() + 10) return {first};
-    const int total = std::atoi(first.substr(at + tag.size(), 5).c_str());
-    std::vector<std::string> out;
-    for (int i = 1; i <= total && i <= 99; ++i) {
-        char num[8];
-        std::snprintf(num, sizeof num, "%05d", i);
-        std::string p = first;
-        p.replace(at + 1, 5, num);
-        if (std::ifstream(p, std::ios::binary)) out.push_back(p);
-    }
-    return out.empty() ? std::vector<std::string>{first} : out;
+                 "  --shared-expert-arena FILE  Linux: back the resident arena with one MAP_SHARED file.\n"
+                 "                       Put this file on /dev/shm, not ordinary SSD storage.\n"
+                 "                       A small header binds an existing backing file to the same pack.\n"
+                 "  --resident-cpu-experts  with mmap and a static profile, keep the experts the GPU cache does not\n"
+                 "                       hold resident in ordinary RAM (and the prompt path's lend region as far as\n"
+                 "                       RAM allows); adaptive swaps exchange them, so none is read from the file again.\n"
+                 "  --resident-experts   the low-RAM PC's resident mode (setup): --mmap-experts --resident-cpu-experts\n"
+                 "                       with the copy page-locked when possible, 4 GiB headroom, plain mmap if it\n"
+                 "                       does not fit.  Same answers as --mmap-experts for the same placement.\n");
 }
 
 bool parse_i64_list(const char* s, std::vector<int64_t>& out, std::string& err) {
@@ -641,11 +752,19 @@ MemSample mem_sample() {
     return m;
 }
 
+// the stage the watchdog names: "<where> <detail>", and the prompt chunk a batched read is in (#251)
+std::string stage_text() {
+    const strata::core::Progress& p = strata::core::progress();
+    std::string s = std::string(p.where.load()) + " " + std::to_string((long long) p.detail.load());
+    if (const int64_t c = p.chunk.load(); c >= 0) s += " of the prompt chunk from token " + std::to_string((long long) c);
+    return s;
+}
+
 void stall_report(std::FILE* f, uint64_t layers_during) {
     strata::core::Progress& p = strata::core::progress();
-    std::fprintf(f, "strata serve: stall report (engine %s): stage \"%s %lld\" for %lld s; %llu layers served since the "
-                    "last finished step (0 = stopped, more = slow)\n", STRATA_VERSION, p.where.load(),
-                 (long long) p.detail.load(), (long long) ((strata::core::progress_now_ms() - p.since_ms.load()) / 1000),
+    std::fprintf(f, "strata serve: stall report (engine %s): stage \"%s\" for %lld s; %llu layers served since the "
+                    "last finished step (0 = stopped, more = slow)\n", STRATA_VERSION, stage_text().c_str(),
+                 (long long) ((strata::core::progress_now_ms() - p.since_ms.load()) / 1000),
                  (unsigned long long) layers_during);
     for (int pass = 0; pass < 2; ++pass) {
         if (pass == 1) {
@@ -720,19 +839,8 @@ int argmax(const std::vector<float>& v) {
 //     back rejected drafts.
 // A checkpoint is only valid while the positional cells below it still hold ITS tokens, so the serve loop keeps
 // just the checkpoints that are prefixes of the tokens the session holds now.
-struct ImgKey {
-    int64_t start = 0;      ///< the image's first <|image_pad|> position
-    uint64_t hash = 0;      ///< its embeddings and grid: the pad tokens alone are the same for every picture
-    bool operator==(const ImgKey& o) const { return start == o.start && hash == o.hash; }
-};
-
-struct ConvCheckpoint {
-    std::vector<int32_t> ids;     ///< the tokens this state has consumed
-    std::vector<ImgKey> imgs;     ///< the images among them
-    std::vector<uint8_t> gdn, ple, tails;
-    uint64_t used = 0;            ///< last-use stamp for the retention policy (conv_cache.hpp)
-    std::vector<ConvCheckpoint> stage_parts;   ///< a layer split's later stages: their sessions' running state
-};
+using ImgKey = strata::core::ConversationImageKey;
+using ConvCheckpoint = strata::core::ConversationCheckpoint;
 
 uint64_t fnv1a(const void* data, size_t n, uint64_t h = 1469598103934665603ull) {
     const uint8_t* p = (const uint8_t*) data;
@@ -740,93 +848,31 @@ uint64_t fnv1a(const void* data, size_t n, uint64_t h = 1469598103934665603ull)
     return h;
 }
 
-struct ConvStateSizes {
-    size_t gdn = 0, ple = 0, tail = 0;
-};
+using ConvStateSizes = strata::core::ConversationStateSizes;
 
-ConvStateSizes conv_state_sizes(const strata::core::ModelGeometry& g) {
+ConvStateSizes conv_state_sizes(const strata::core::ModelGeometry& g, const strata::core::SessionState& ss) {
     ConvStateSizes z;
-    z.gdn = (size_t) g.n_gdn_layers() *
-            ((size_t) g.ssm_state_size * (size_t) g.ssm_v_heads * (size_t) g.ssm_state_size +
-             (size_t) g.ssm_conv_channels * (size_t) (g.ssm_d_conv - 1)) * sizeof(float);
-    z.ple = (size_t) strata::kernels::NG_HIST * (size_t) strata::kernels::NG_HC_DIM * sizeof(float);
-    z.tail = (size_t) (strata::kernels::qsa_real_shapes().idx_block - 1) * (size_t) g.idx_key_dim * sizeof(float);
+    std::string error;
+    // a split stage's session owns only its layer range's state (see SessionState's carve note); the geometry
+    // and the carve have already passed engine validation
+    strata::core::conversation_session_sizes(g, ss, z, error);
     return z;
 }
 
-/// Copies the running state out.  The caller has synchronized the device.
-bool checkpoint_save(ConvCheckpoint &c, const strata::core::SessionState &ss,
-                     const strata::core::ModelGeometry &g) try {
-    const ConvStateSizes z = conv_state_sizes(g);
-    c.gdn.resize(z.gdn);
-    c.ple.resize(ss.ple_hist != nullptr ? z.ple : 0);
-    c.tails.resize(z.tail * (size_t) g.n_qsa_layers());
-    if (DPCT_CHECK_ERROR(dpct::get_in_order_queue()
-                             .memcpy(c.gdn.data(), ss.gdn_state, z.gdn)
-                             .wait()) != 0) return false;
-    if (!c.ple.empty() &&
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
-                             .memcpy(c.ple.data(), ss.ple_hist, z.ple)
-                             .wait()) != 0)
-        return false;
-    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
-        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue()
-                                 .memcpy(c.tails.data() + (size_t)i * z.tail,
-                                         ss.qsa_states[i].idx_tail, z.tail)
-                                 .wait()) != 0)
-            return false;
-    return true;
-}
-catch (sycl::exception const &exc) {
-  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-            << ", line:" << __LINE__ << std::endl;
-  std::exit(1);
+/// Copies the running state out (this session's carve only).  The caller has synchronized the device.
+bool checkpoint_save(ConvCheckpoint& c, const strata::core::SessionState& ss, const strata::core::ModelGeometry& g) {
+    std::string error;
+    if (strata::core::conversation_checkpoint_save(c, ss, g, error)) return true;
+    std::fprintf(stderr, "strata serve: checkpoint save: %s\n", error.c_str());   // the caller's ERR has no reason
+    return false;
 }
 
 /// Puts a checkpoint's running state back; the positional cells below it are the caller's to guarantee.
-bool checkpoint_restore(const ConvCheckpoint &c, strata::core::SessionState &ss,
-                        const strata::core::ModelGeometry &g) try {
-    const ConvStateSizes z = conv_state_sizes(g);
-    if (c.gdn.size() != z.gdn || c.tails.size() != z.tail * (size_t) g.n_qsa_layers()) return false;
-    /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
-    synchronization behavior.
-    */
-    if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-            ss.gdn_state, c.gdn.data(), z.gdn).wait()) != 0) return false;
-    /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
-    synchronization behavior.
-    */
-    if (!c.ple.empty() && DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                              ss.ple_hist, c.ple.data(), z.ple).wait()) != 0)
-        return false;
-    for (int64_t i = 0; i < g.n_qsa_layers(); ++i)
-        /*
-        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-        assuming in the original code the source host memory is pageable memory.
-        If the memory is not pageable, call wait() on event return by memcpy API
-        to ensure synchronization behavior.
-        */
-        if (DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
-                ss.qsa_states[i].idx_tail, c.tails.data() + (size_t)i * z.tail,
-                z.tail).wait()) != 0)
-            return false;
-    // the PLE's token window is the last two tokens, OLDEST FIRST, -1 where there is none (as session_zero leaves it)
-    const size_t L = c.ids.size();
-    ss.ple_prev[0] = L >= 2 ? c.ids[L - 2] : -1;
-    ss.ple_prev[1] = L >= 1 ? c.ids[L - 1] : -1;
-    return DPCT_CHECK_ERROR(
-               dpct::get_current_device().queues_wait_and_throw()) == 0;
-}
-catch (sycl::exception const &exc) {
-  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-            << ", line:" << __LINE__ << std::endl;
-  std::exit(1);
+bool checkpoint_restore(const ConvCheckpoint& c, strata::core::SessionState& ss, const strata::core::ModelGeometry& g) {
+    std::string error;
+    if (strata::core::conversation_checkpoint_restore(c, ss, g, error)) return true;
+    std::fprintf(stderr, "strata serve: checkpoint restore: %s\n", error.c_str());
+    return false;
 }
 
 // --control-vector-scaled: llama.cpp's `common_control_vector_load` (every file's `direction.<l>` times its scale,
@@ -966,7 +1012,7 @@ catch (sycl::exception const &exc) {
 
 }  // namespace
 
-int main(int argc, char** argv) {
+int main(int argc, char **argv) try {
     // **UNBUFFERED, BECAUSE THE INTERESTING OUTPUT IS THE OUTPUT BEFORE A CRASH.**  `stdout` redirected to a
     // pipe or a file is block-buffered, so a program that dies loses every line it had already printed - which
     // turns "it crashed at step 7" into "it crashed somewhere", and the difference is a debugging session.
@@ -991,6 +1037,7 @@ int main(int argc, char** argv) {
             if (i + 1 >= argc) { std::fprintf(stderr, "%s needs a value\n", what); std::exit(2); }
             return argv[++i];
         };
+        bool parsed = true;
         if (a == "--help" || a == "-h") { usage(); return 0; }
         else if (a == "--pack") o.pack = next("--pack");
         else if (a == "--tokens") {
@@ -1013,6 +1060,15 @@ int main(int argc, char** argv) {
         }
         else if (a == "--max-new") o.max_new = std::atoll(next("--max-new"));
         else if (a == "--max-context") o.max_context = std::atoll(next("--max-context"));
+        else if (a == "--rope-scaling") o.rope_scaling = next("--rope-scaling");
+        else if (a == "--rope-scale") o.rope_scale = std::atof(next("--rope-scale"));
+        else if (a == "--rope-freq-base") o.rope_freq_base = std::atof(next("--rope-freq-base"));
+        else if (a == "--rope-freq-scale") o.rope_freq_scale = std::atof(next("--rope-freq-scale"));
+        else if (a == "--yarn-orig-ctx") o.yarn_orig_ctx = std::atof(next("--yarn-orig-ctx"));
+        else if (a == "--yarn-ext-factor") o.yarn_ext_factor = std::atof(next("--yarn-ext-factor"));
+        else if (a == "--yarn-attn-factor") o.yarn_attn_factor = std::atof(next("--yarn-attn-factor"));
+        else if (a == "--yarn-beta-fast") o.yarn_beta_fast = std::atof(next("--yarn-beta-fast"));
+        else if (a == "--yarn-beta-slow") o.yarn_beta_slow = std::atof(next("--yarn-beta-slow"));
         else if (a == "--greedy") o.greedy = true;
         else if (a == "--seed") { o.seed = (uint64_t) std::atoll(next("--seed")); o.greedy = false; }
         else if (a == "--top-k") o.top_k = std::atoi(next("--top-k"));
@@ -1068,7 +1124,11 @@ int main(int argc, char** argv) {
         else if (a == "--pool-workers") o.pool_workers = std::atoi(next("--pool-workers"));
         else if (a == "--no-host-worker") o.no_host_worker = true;
         else if (a == "--no-ple-prefetch") o.no_ple_prefetch = true;
-        else if (a == "--expert-cache") {
+        else parsed = false;
+        // The chain continues here in a second statement: one chain of 120+ `else if` passed MSVC's limit of 128
+        // nested blocks (C1061).  The order of the tests and what each does are unchanged.
+        if (!parsed) {
+        if (a == "--expert-cache") {
             const std::string v = next("--expert-cache");
             o.expert_cache = (v == "auto") ? -1 : std::atoi(v.c_str());
         }
@@ -1100,10 +1160,25 @@ int main(int argc, char** argv) {
         else if (a == "--spec-split") o.spec_split = true;
         else if (a == "--layer-split") o.layer_split = next("--layer-split");
         else if (a == "--split-device") o.split_device = next("--split-device");
+        else if (a == "--split-skip-if-fits") o.split_skip_if_fits = true;
         else if (a == "--pcie-mode") o.pcie_mode = next("--pcie-mode");
         else if (a == "--serve") o.serve = true;
         else if (a == "--vision") o.vision = true;
         else if (a == "--prompt-cache") o.prompt_cache = std::max(0, std::atoi(next("--prompt-cache")));
+        else if (a == "--conversation-cache-mib" || a == "--conversation-cache-slots" ||
+                 a == "--conversation-cache-min-free-mib") {
+            const std::string value = next(a.c_str());
+            int64_t number = 0;
+            const auto result = std::from_chars(value.data(), value.data() + value.size(), number);
+            const int64_t limit = a == "--conversation-cache-slots" ? INT32_MAX : INT64_MAX / (1024 * 1024);
+            if (result.ec != std::errc{} || result.ptr != value.data() + value.size() || number < 0 || number > limit) {
+                std::fprintf(stderr, "%s needs a nonnegative integer within range\n", a.c_str());
+                return 2;
+            }
+            if (a == "--conversation-cache-mib") o.conversation_cache_mib = number;
+            else if (a == "--conversation-cache-min-free-mib") o.conversation_cache_min_free_mib = number;
+            else o.conversation_cache_slots = (int) number;
+        }
         else if (a == "--prompt-cache-every") o.prompt_cache_every = std::max(0LL, std::atoll(next("--prompt-cache-every")));
         else if (a == "--prompt-cache-root") o.prompt_cache_root = std::max(0LL, std::atoll(next("--prompt-cache-root")));
         else if (a == "--turn-token") o.turn_token = std::atoll(next("--turn-token"));
@@ -1155,8 +1230,30 @@ int main(int argc, char** argv) {
         else if (a == "--expert-profile") o.expert_profile = next("--expert-profile");
         else if (a == "--gpu-stages") o.gpu_stages = true;
         else if (a == "--mmap-experts") o.mmap_experts = true;
+        else if (a == "--shared-expert-arena") o.shared_expert_arena = next("--shared-expert-arena");
         else if (a == "--resident-cpu-experts") o.resident_cpu_experts = true;
         else if (a == "--stream-experts") o.stream_experts = true;
+        else if (a == "--resident-experts") {
+            o.mmap_experts = o.resident_cpu_experts = o.resident_pin = o.resident_soft = true;
+            o.resident_headroom = 4ull << 30;
+            // A/B arms: STRATA_RESIDENT_PIN=0 keeps the copy pageable (the --resident-cpu-experts form);
+            // STRATA_RESIDENT_HEADROOM_GIB=N leaves N GiB of the available RAM free instead of 4
+            if (const char* v = std::getenv("STRATA_RESIDENT_PIN"); v != nullptr && std::string(v) == "0")
+                o.resident_pin = false;
+            if (const char* v = std::getenv("STRATA_RESIDENT_HEADROOM_GIB"); v != nullptr && std::atof(v) >= 0.0)
+                o.resident_headroom = (uint64_t) (std::atof(v) * 1073741824.0);
+        }
+        else if (a == "--resident-budget-gib") {
+            const double gib = std::atof(next("--resident-budget-gib"));
+            if (!(gib > 0.0)) { std::fprintf(stderr, "strata generate: --resident-budget-gib needs N > 0\n"); return 2; }
+            o.resident_budget = (uint64_t) (gib * 1073741824.0);
+            o.mmap_experts = o.resident_cpu_experts = o.resident_pin = true;
+            o.resident_headroom = 4ull << 30;
+            if (const char* v = std::getenv("STRATA_RESIDENT_PIN"); v != nullptr && std::string(v) == "0")
+                o.resident_pin = false;
+            if (const char* v = std::getenv("STRATA_RESIDENT_HEADROOM_GIB"); v != nullptr && std::atof(v) >= 0.0)
+                o.resident_headroom = (uint64_t) (std::atof(v) * 1073741824.0);
+        }
         else if (a == "--stats") o.stats = true;
         else if (a == "--shared-late") o.shared_late = true;
         else if (a == "--keep-canonical") o.keep_canonical = true;
@@ -1173,6 +1270,14 @@ int main(int argc, char** argv) {
             usage();
             return 2;
         }
+        }
+    }
+    if (o.serve && o.conversation_cache_mib > 0 && (o.prompt_cache == 0 || o.conversation_cache_slots == 0))
+        std::fprintf(stderr, "strata serve: warning: conversation caching is disabled by %s\n",
+                     o.prompt_cache == 0 ? "--prompt-cache 0" : "--conversation-cache-slots 0");
+    if (o.conversation_cache_mib > 0 && o.conversation_cache_slots > 0 && o.prompt_cache > 0 && !o.layer_split.empty()) {
+        std::fprintf(stderr, "strata serve: conversation parking does not yet support --layer-split; disable parking with --conversation-cache-mib 0\n");
+        return 2;
     }
     // Layer split (multi-GPU): the later stages run layers [K_i, K_i+1) on their own GPUs (--split-device, default
     // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  Across
@@ -1228,9 +1333,13 @@ int main(int argc, char** argv) {
             return 2;
         }
     }
-    const bool multi_gpu = !split_devs.empty() && !split_same;
-    if (o.resident_cpu_experts && (!o.mmap_experts || o.expert_profile.empty() || o.adapt_every != 0)) {
-        std::fprintf(stderr, "strata generate: --resident-cpu-experts requires --mmap-experts, a static --expert-profile and --adapt-every 0\n");
+    bool multi_gpu = !split_devs.empty() && !split_same;   // cleared by --split-skip-if-fits before any stage loads
+    if (o.mmap_experts && !o.shared_expert_arena.empty()) {
+        std::fprintf(stderr, "strata generate: --shared-expert-arena backs the resident arena and cannot be used with --mmap-experts\n");
+        return 2;
+    }
+    if (o.resident_cpu_experts && (!o.mmap_experts || o.expert_profile.empty())) {
+        std::fprintf(stderr, "strata generate: --resident-cpu-experts requires --mmap-experts and a static --expert-profile\n");
         return 2;
     }
     if (o.resident_cpu_experts &&
@@ -1247,8 +1356,15 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: a layer split across GPUs needs --expert-profile\n");
             return 2;
         }
-        o.no_prefill_borrow = true;   // each stage's prompt path has its own buffers
-        borrow_explicit = true;
+        // A STAGE'S PROMPT PATH BORROWS FROM THAT STAGE'S OWN EXPERT CACHE.  This used to set
+        // `no_prefill_borrow = true` - "each stage's prompt path has its own buffers" - which is true, but it is
+        // a reason to give each stage its own LOAN, not a reason to make every stage withhold a chunk-sized
+        // reserve from its cache for the whole session.  Forced on, it also collapsed `--prefill auto` to 2048
+        // (below) and skipped the lend arm, so a stage paid for its prompt buffers twice over: once in VRAM it
+        // never got back, once in the smaller chunk.  At `--prefill 5524` that reserve is 3.8 GiB per stage,
+        // more than either 8 GB card had - which is how adding two GPUs to the two 12 GB ones lost 260K.
+        // The loan is the tail of the stage's own cache (see `PfPart` in the serve block); outside the prompt
+        // that tail is expert cache, so a large chunk costs a stage nothing permanent.
         int n_vis = 1;
         if (DPCT_CHECK_ERROR(n_vis = dpct::device_count()) != 0 || n_vis < 1)
             n_vis = 1;
@@ -1277,7 +1393,26 @@ int main(int argc, char** argv) {
     // 610 vs 792 tok/s) but is what keeps every expert in VRAM at a long context - 80,000 tokens without it: the
     // reserve for the KV and the chunk buffers evicts ~1,900 experts, prompt 790 tok/s and decode 2 tok/s after it;
     // with it: 1,062 tok/s and 39.5 tok/s. So by default only above a 32K context; the flags still decide.
-    if (!borrow_explicit) o.no_prefill_borrow = o.max_context <= 32768;
+    // SYCL port (0.1.31 merge): borrowing hangs in the first chunk of a long prompt (GPU busy, no chunk ever finishes;
+    // 2026-10-01, 40K and 128K prompts, with and without --kv-resident) since upstream's borrow rework; without it the
+    // same prompts read at 1,017-1,189 tok/s. Off by default until that is found; --prefill-borrow opts in.
+    if (!borrow_explicit) o.no_prefill_borrow = true;
+#if defined(STRATA_USE_HIP)
+    {
+        // every GPU this run uses must be an architecture the binary has code for (a gfx1100 build on a gfx1201
+        // card would otherwise fail later with "invalid device function")
+        std::vector<int> used{0};
+        if (multi_gpu) used.insert(used.end(), split_devs.begin(), split_devs.end());
+        for (int r = 0; r < 3; ++r)
+            if (o.expert_cache_remote[(size_t) r] > 0) used.push_back(remote_dev[r]);
+        for (const int d : used) {
+            if (const std::string why = strata::core::gpu_arch_problem(d); !why.empty()) {
+                std::fprintf(stderr, "strata generate: %s\n", why.c_str());
+                return 1;
+            }
+        }
+    }
+#endif
     if (o.prefill_auto && (o.no_prefill_borrow || o.expert_profile.empty())) {
         o.prefill_auto = false;       // nothing to lend from: the buffers are reserved for the session, so keep them small
         o.prefill_chunk = 2048;
@@ -1332,8 +1467,24 @@ int main(int argc, char** argv) {
     }
     strata::core::layer_set_shared_early(!o.shared_late);
     if (!o.native_preset.empty()) {
+        try {
+            // every shard of the model (<name>-0000N-of-0000M.gguf beside --native).  A missing shard is an error
+            // here: it used to be skipped, leaving a model with some tensors absent and a later error, or none.
+            o.native_shards = strata::gguf_split_paths(o.native_preset);
+            // --ple-gguf defaults to the shard that holds the PLE table, found by name: shard 2 of the ISTA files
+            // and of Unsloth's UD-Q4_K_XL, shard 1 of Swift's
+            if (o.ple_gguf.empty() && !o.no_ple) {
+                const strata::GgufModel model(o.native_shards);
+                size_t at = 0;
+                if (model.find("per_layer_token_embd.weight", &at) != nullptr) o.ple_gguf = o.native_shards[at];
+            }
+        } catch (const std::exception& e) {
+            std::fprintf(stderr, "strata generate: --native %s: %s\n", o.native_preset.c_str(), e.what());
+            return 2;
+        }
         if (o.no_ple || o.ple_gguf.empty()) {
-            std::fprintf(stderr, "strata generate: --native requires --ple-gguf (the PLE key is native too)\n");
+            std::fprintf(stderr, "strata generate: --native requires --ple-gguf (the PLE key is native too), and no "
+                                 "shard of the model holds per_layer_token_embd.weight\n");
             return 2;
         }
         o.stream_token = true;
@@ -1345,7 +1496,7 @@ int main(int argc, char** argv) {
         if (o.native_dense_gguf.empty()) {
             // every shard of the model (<name>-0000N-of-0000M.gguf beside --native), then the PLE shard: a split
             // may put any layer in any shard (Swift's GGUFs: layers 13-47 in shard 2, the PLE table in shard 1)
-            o.native_dense_gguf = model_shards(o.native_preset);
+            o.native_dense_gguf = o.native_shards;
             if (std::find(o.native_dense_gguf.begin(), o.native_dense_gguf.end(), o.ple_gguf) == o.native_dense_gguf.end())
                 o.native_dense_gguf.push_back(o.ple_gguf);
         }
@@ -1378,6 +1529,46 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: positive --max-new and --max-context must fit the prompt and generation\n");
         return 2;
     }
+    // THE ROPE KNOBS (rope_scaling.hpp).  Anything invalid dies here, at second zero, rather than becoming a
+    // NaN angle inside one of the twelve QSA layers.  Only the RANGES are checked - the config itself is
+    // resolved after the model file has had its say, right before session_init.
+    strata::kernels::RopeScaling rope_cfg;   // type filled here; the rest at the resolution below
+    {
+        using RST = strata::kernels::RopeScalingType;
+        // an absent --rope-scaling (the empty default) leaves the type to the model file's rope keys,
+        // resolved below; anything present must be one of the three names
+        if (o.rope_scaling == "none") rope_cfg.type = RST::None;
+        else if (o.rope_scaling == "linear") rope_cfg.type = RST::Linear;
+        else if (o.rope_scaling == "yarn") rope_cfg.type = RST::YaRN;
+        else if (!o.rope_scaling.empty()) {
+            std::fprintf(stderr, "strata generate: --rope-scaling must be none, linear or yarn (got '%s')\n",
+                         o.rope_scaling.c_str());
+            return 2;
+        }
+        // every knob FINITE first: `atof("nan")` is NaN, and a NaN passes every range comparison below
+        for (const double v : {o.rope_scale, o.rope_freq_base, o.rope_freq_scale, o.yarn_orig_ctx, o.yarn_ext_factor,
+                               o.yarn_attn_factor, o.yarn_beta_fast, o.yarn_beta_slow})
+            if (!std::isfinite(v)) {
+                std::fprintf(stderr, "strata generate: a rope scaling knob is not a finite number (%g)\n", v);
+                return 2;
+            }
+        // 0 is the absent default; an explicit factor must extend, not shrink
+        if (o.rope_scale != 0 && o.rope_scale < 1.0) {
+            std::fprintf(stderr, "strata generate: --rope-scale %g must be >= 1 (it extends the context, not shrinks it)\n",
+                         o.rope_scale);
+            return 2;
+        }
+        if (o.rope_freq_base != 0 && o.rope_freq_base <= 1.0) {
+            std::fprintf(stderr, "strata generate: --rope-freq-base must be a base above 1 (0 = the model's)\n");
+            return 2;
+        }
+        if (o.rope_freq_scale < 0 || o.yarn_orig_ctx < 0 || o.yarn_ext_factor < -1.0 || o.yarn_attn_factor <= 0 ||
+            o.yarn_beta_fast <= 0 || o.yarn_beta_slow <= 0) {
+            std::fprintf(stderr, "strata generate: invalid rope scaling knob (see usage: --yarn-ext-factor <0 = auto, "
+                                 "--yarn-orig-ctx 0 = default, the rest positive)\n");
+            return 2;
+        }
+    }
     if (!std::isfinite(o.temperature) || o.temperature < 0 || !std::isfinite(o.top_p) ||
         o.top_p <= 0 || o.top_p > 1 || o.top_k < 0 || o.expert_cache < -1 ||
         o.pool_workers < 0 || std::any_of(o.expert_cache_remote.begin(), o.expert_cache_remote.end(),
@@ -1400,6 +1591,23 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: --native-flash-attn-short requires the normal decode loop for status validation\n");
         return 2;
     }
+    // The whole-model graph measurements replay every layer through CUDA0's session, which a layer split carves to
+    // CUDA0's own range - the answer would read another stage's state.  Refused here rather than at the call, so
+    // the reason is visible before 55 GB is loaded.
+    if (multi_gpu && (o.gpu_only_full || o.gpu_stages)) {
+        std::fprintf(stderr, "strata generate: --gpu-only-full and --gpu-stages replay the whole model through one "
+                             "session, which a layer split does not have; run them without --layer-split\n");
+        return 2;
+    }
+    if (!o.native_head_gguf.empty()) {
+        try {
+            o.native_head_shards = o.native_head_gguf == o.native_preset ? o.native_shards
+                                                                         : strata::gguf_split_paths(o.native_head_gguf);
+        } catch (const std::exception& e) {
+            std::fprintf(stderr, "strata generate: --native-head-gguf %s: %s\n", o.native_head_gguf.c_str(), e.what());
+            return 2;
+        }
+    }
     if (o.native_ple_key && (o.native_dense_gguf.empty() || o.no_ple)) {
         std::fprintf(stderr, "strata generate: --native-ple-key requires PLE and --native-dense-gguf\n");
         return 2;
@@ -1413,6 +1621,15 @@ int main(int argc, char** argv) {
     // compiled `/arch:AVX512`, so on a CPU without those features it does not fail - it executes an illegal
     // instruction at some unpredictable token.  Refusing at second zero is the whole point of P2.S3's check.
     strata::kernels::cpu::expert_set_oracle_q8_0(o.cpu_oracle_q8_0);
+    // ... and nothing runs on a CPU without AVX2: every CPU expert kernel is AVX2 at least (the AVX-512 ones are
+    // chosen above it), and so is ggml-cpu in the release build, which the native pack's layout load initializes
+    // next.  Refused here, by name, rather than an illegal instruction in the first expert.
+    if (!strata::kernels::cpu::cpu_avx2_ok()) {
+        std::fprintf(stderr, "strata generate: this CPU (%s) does not support AVX2 with FMA and F16C, which every CPU "
+                             "expert kernel needs; Strata runs on Intel Haswell (2013), AMD Zen (2017) or newer\n",
+                     strata::kernels::cpu::cpu_name().c_str());
+        return 2;
+    }
 
     std::string err;
     if (!o.native_head_gguf.empty() && !o.stream_token) {
@@ -1428,6 +1645,20 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+        // Every layer's formats must have GPU expert kernels and a prompt-path dequantizer, checked here, before
+        // anything is allocated: an unsupported down type used to exit from inside the first verify window, and
+        // an unsupported dequant type left the prompt path's fp16 buffer unwritten.
+        const auto& lay = strata::kernels::cpu::expert_layout();
+        for (int64_t l = 0; lay.native && l < (int64_t) lay.fmt.size(); ++l) {
+            const auto& f = lay.fmt[(size_t) l];
+            if (!strata::kernels::native_expert_supported(f.gu_type, f.d_type, f.n_embd, f.n_ff)) {
+                std::fprintf(stderr, "strata generate: layer %lld's experts are %s/%s (ggml types %d/%d), which this "
+                                     "engine has no GPU kernels for\n", (long long) l,
+                             strata::ggml_type_name((uint32_t) f.gu_type), strata::ggml_type_name((uint32_t) f.d_type),
+                             f.gu_type, f.d_type);
+                return 1;
+            }
+        }
     }
     const bool native_pack = strata::kernels::cpu::expert_layout().native;
     // STRATA_EARLY_REMOTE_CONTEXTS=1: create EVERY secondary context here, like CUDA1's.  Under WSL2 the driver's
@@ -1473,6 +1704,109 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: this CPU has no AVX-512: the expert kernels run on %s "
                              "(multi-token for the i-quant gate/up rows)\n",
                      std::getenv("STRATA_NO_IQ256") == nullptr ? "AVX-2" : "ggml-cpu vec_dot (STRATA_NO_IQ256 set)");
+    strata::core::ModelGeometry g;   // canonical defaults; the model file overrides the MoE shape below
+    int64_t K = 10;
+    // THE ROPE CONFIG RESOLVES HERE, BEFORE ANY WEIGHT MOVES - the CLI and the model file have both spoken,
+    // and `session_init` below builds the rope table from it and captures the kernels reading its constants
+    // (rope_scaling.hpp); the only hard constraint is "set before that", and dying on a bad rope key beats
+    // scanning gigabytes of shards first.  Precedence: an EXPLICIT flag over the model file's rope keys over
+    // the struct defaults.  The empty --rope-scaling and the 0 --rope-scale mean the flag is absent, so the
+    // model file decides; an explicit value - `none` and `1` included, the opt-outs - wins over the model file.
+    {
+        // The model file's rope keys (llama.cpp's names under the arch prefix), when it carries any - the
+        // artifact today ships none, so this is a no-op defaults channel for future fine-tunes.
+        std::string gguf_rope_type;
+        double gguf_rope_base = 0, gguf_rope_factor = 0, gguf_rope_orig_ctx = 0;
+        if (!o.native_preset.empty()) {
+            // a pruned variant (GSQ-RCO Coder) ships fewer experts than the canonical 512x10; the model file
+            // is the authority on its own MoE shape - everything else in the geometry is unchanged
+            try {
+                strata::GgufFile model_gguf(o.native_shards.front());   // the metadata shard
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_count")) g.n_expert = (int64_t) v->u;
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_used_count")) K = (int64_t) v->u;
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.rope.freq_base")) gguf_rope_base = v->num();
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.rope.scaling.type")) gguf_rope_type = v->s;
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.rope.scaling.factor")) gguf_rope_factor = v->num();
+                if (const strata::MetaValue* v = model_gguf.get("qwen4exp.rope.scaling.original_context_length"))
+                    gguf_rope_orig_ctx = v->num();
+            } catch (const std::exception& e) {
+                std::fprintf(stderr, "strata generate: reading the model's expert shape from %s: %s\n",
+                             o.native_preset.c_str(), e.what());
+                return 1;
+            }
+        }
+        using RST = strata::kernels::RopeScalingType;
+        if (!o.rope_scaling.empty()) {
+            // the early validation pinned the spelling; `none` here is the CLI opting OUT of the model file's keys
+            if (o.rope_scaling == "linear") rope_cfg.type = RST::Linear;
+            else if (o.rope_scaling == "yarn") rope_cfg.type = RST::YaRN;
+            else rope_cfg.type = RST::None;
+        } else if (!gguf_rope_type.empty()) {
+            if (gguf_rope_type == "linear") rope_cfg.type = RST::Linear;
+            else if (gguf_rope_type == "yarn") rope_cfg.type = RST::YaRN;
+            else if (gguf_rope_type != "none") {
+                std::fprintf(stderr, "strata generate: %s carries rope.scaling.type '%s' - none, linear or yarn only\n",
+                             o.native_preset.c_str(), gguf_rope_type.c_str());
+                return 2;
+            }
+        }
+        if (o.rope_scale > 0) rope_cfg.factor = o.rope_scale;            // an explicit factor, 1 included
+        else if (gguf_rope_factor > 1.0) rope_cfg.factor = gguf_rope_factor;
+        if (o.rope_freq_base > 0) rope_cfg.freq_base = o.rope_freq_base;
+        else if (gguf_rope_base > 1.0) rope_cfg.freq_base = gguf_rope_base;
+        if (o.yarn_orig_ctx > 0) rope_cfg.orig_ctx = o.yarn_orig_ctx;
+        else if (gguf_rope_orig_ctx >= 1) rope_cfg.orig_ctx = gguf_rope_orig_ctx;
+        rope_cfg.freq_scale_in = o.rope_freq_scale;
+        rope_cfg.ext_factor = o.yarn_ext_factor >= 0 ? o.yarn_ext_factor
+                                                     : (rope_cfg.type == RST::YaRN ? 1.0 : 0.0);
+        rope_cfg.attn_factor = o.yarn_attn_factor;
+        rope_cfg.beta_fast = o.yarn_beta_fast;
+        rope_cfg.beta_slow = o.yarn_beta_slow;
+        if (rope_cfg.type == RST::None) {
+            // none is the trained rotation, exactly: the scaling knobs are inert (the table builder and
+            // `kernel_args` ignore them), and resetting them keeps the logged/queried config honest.  Only the
+            // frequency base survives - it is the rotation itself, not a scaling knob.
+            const bool knobs = o.rope_scale > 1.0 || o.rope_freq_scale > 0 || o.yarn_ext_factor > 0 ||
+                               o.yarn_attn_factor != 1.0;
+            const double base = rope_cfg.freq_base;
+            rope_cfg = strata::kernels::RopeScaling{};
+            rope_cfg.freq_base = base;
+            if (knobs)
+                std::fprintf(stderr, "strata generate: note: no rope scaling is active (none), so --rope-scale, "
+                                     "--rope-freq-scale and the --yarn-* knobs have no effect\n");
+        }
+        // THE RESOLVED CONFIG IS VALIDATED AS A WHOLE, with the one rule every rotation site also applies
+        // (rope_scaling.hpp): the CLI ranges above cannot see a model-file value, nor a combination such as a
+        // --rope-freq-scale that turns the resolved factor non-finite.
+        if (const char* why = strata::kernels::rope_scaling_invalid(rope_cfg)) {
+            std::fprintf(stderr, "strata generate: invalid rope scaling configuration: %s (type %s, factor %g, "
+                                 "freq_scale %g, base %g, original context %g)\n",
+                         why, rope_cfg.type == RST::YaRN ? "yarn" : rope_cfg.type == RST::Linear ? "linear" : "none",
+                         rope_cfg.factor, rope_cfg.freq_scale(), rope_cfg.freq_base, rope_cfg.orig_ctx);
+            return 2;
+        }
+        strata::kernels::rope_scaling_set(rope_cfg);
+        if (rope_cfg.type != RST::None) {
+            const char* tn = rope_cfg.type == RST::YaRN ? "yarn" : "linear";
+            std::fprintf(stderr,
+                         "strata generate: rope scaling %s, factor %.6g (freq_scale %.6g, base %.6g, mscale %.6f), "
+                         "--max-context %lld against a trained context of %.0f\n",
+                         tn, rope_cfg.factor, rope_cfg.freq_scale(), rope_cfg.freq_base, rope_cfg.mscale(),
+                         (long long) o.max_context, rope_cfg.orig_ctx);
+            if ((double) o.max_context <= rope_cfg.orig_ctx)
+                std::fprintf(stderr,
+                             "strata generate: note: the context is within the trained %.0f - no position needs the "
+                             "extension, and the resolved scaling still applies to every angle\n",
+                             rope_cfg.orig_ctx);
+            // only when there IS a magnitude correction: YaRN's log term (ext_factor != 0) or an explicit
+            // --yarn-attn-factor; plain linear (mscale 1) has none, and saying otherwise was TODO 22
+            if (rope_cfg.mscale() != 1.0)
+                std::fprintf(stderr,
+                             "strata generate: note: the %s magnitude correction scales cos and sin by %.6f "
+                             "at every position\n",
+                             rope_cfg.type == RST::YaRN ? "YaRN" : "--yarn-attn-factor", rope_cfg.mscale());
+        }
+    }
     strata::core::NativeEmbed native_embed;
     if (native_pack) {
         if (o.native_preset.empty() || o.spec < 2 || o.keep_canonical ||
@@ -1482,7 +1816,7 @@ int main(int argc, char** argv) {
             return 2;
         }
         const strata::core::ModelGeometry g0;
-        if (!native_embed.load(o.native_preset, g0.n_embd, 248320, err)) {
+        if (!native_embed.load(o.native_shards, g0.n_embd, 248320, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
@@ -1584,21 +1918,6 @@ int main(int argc, char** argv) {
         strata::kernels::mrope_table_set(d_mrope);
     }
     strata::kernels::ple_set_native_postops(o.native_ple_postops);
-    strata::core::ModelGeometry g;   // canonical defaults; the model file overrides the MoE shape below
-    int64_t K = 10;
-    if (!o.native_preset.empty()) {
-        // a pruned variant (GSQ-RCO Coder) ships fewer experts than the canonical 512x10; the model file
-        // is the authority on its own MoE shape - everything else in the geometry is unchanged
-        try {
-            strata::GgufFile model_gguf(o.native_preset);
-            if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_count")) g.n_expert = (int64_t) v->u;
-            if (const strata::MetaValue* v = model_gguf.get("qwen4exp.expert_used_count")) K = (int64_t) v->u;
-        } catch (const std::exception& e) {
-            std::fprintf(stderr, "strata generate: reading the model's expert shape from %s: %s\n",
-                         o.native_preset.c_str(), e.what());
-            return 1;
-        }
-    }
     // before session_init: every graph captured from here on has the vector's kernels where it applies
     std::string cvec_summary = "0";
     if (!o.cvec_files.empty()) {
@@ -1614,14 +1933,8 @@ int main(int argc, char** argv) {
         return 2;
     }
 
-    void* sbuf = nullptr;
-    if (DPCT_CHECK_ERROR(sbuf = (void *)sycl::malloc_device(
-                             strata::core::session_bytes(g, o.max_context, K),
-                             dpct::get_in_order_queue())) != 0) {
-        std::fprintf(stderr, "strata generate: session state allocation failed\n");
-        return 1;
-    }
     strata::core::SessionState ss;
+    void* sbuf = nullptr;   // allocated after the layer-split search, sized to CUDA0's own layer range (the carve)
     // **THE ENGINE RAN ON THE LEGACY DEFAULT STREAM, WHICH ON WDDM IS THE SLOW PATH.**  All four session
     // calls - `session_capture`, `session_replay`, `session_token` and `session_loop` - were handed `nullptr`,
     // i.e. stream 0.  `bench/micro/kernel_costs.cu` measures what that costs: EVERY kernel it launches through
@@ -1640,30 +1953,6 @@ int main(int argc, char** argv) {
         return 1;
     }
     void* const main_cs = (void*) main_stream;
-    if (strata::core::session_init(g, o.max_context, K, sbuf, ss) == 0) {
-        std::fprintf(stderr, "strata generate: session_init failed\n");
-        return 1;
-    }
-    // **A GENERATE RUN ON A NATIVE PACK NEVER ZEROED THE SESSION STATE.**  The canonical path zeroes it from
-    // `put_input` at position 0 (`session_zero`, with the embedding as `R`), but a native pack breaks out of that
-    // loop before the first `put_input` - it runs verify windows instead - and neither the batched prompt path
-    // nor the verifier zeroes anything.  `sbuf` is `cudaMalloc`'d, so the GDN recurrence, the QSA KV/indexer
-    // state, the PLE history and `R` all started from whatever the allocator last held: finite on a fresh
-    // allocation and overflow/NaN after reuse, which surfaced as the whole layer stack saturating and every
-    // prompt decoding to the same token.  `--serve` zeroes exactly this state when `resume == 0`; generate mode
-    // always starts from an empty sequence, so it must too.
-    // (#167) Every pack, not only a native one: a canonical pack whose prompt goes through the batched prompt path
-    // (--prefill) starts at position 0 without a put_input, so it never zeroed the state either.
-    strata::core::session_zero(ss, g, nullptr, main_cs);
-    if (DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()) !=
-        0) {
-        std::fprintf(stderr, "strata generate: zeroing the session state failed\n");
-        return 1;
-    }
-    if (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1)
-        std::fprintf(stderr, "strata generate: KV streaming: %lld of %lld cells per QSA layer in VRAM, the K/V in "
-                             "%.2f GiB of pinned RAM\n", (long long) (ss.qsa_states[0].n_slots * 4),
-                     (long long) o.max_context, (double) strata::core::qsa_kv_host_bytes() / 1073741824.0);
 
     // ---- **THE HALF-LEVEL DUMP HAS TO BE ARMED BEFORE `session_capture`, AND THE LADDER MUST NOT BE.**  The
     // half copies are issued from inside `block_layer_pre`/`block_layer_post`, so they are only ever enqueued
@@ -1749,7 +2038,8 @@ int main(int argc, char** argv) {
             ss.ple.w.key_scales = (const float*) ((const uint8_t*) wk->data + wk->codes_bytes);
         }
         if (o.native_ple_key && wk->quantized()) {
-            if (!wk->native_data || (wk->native_type != 42 && wk->native_type != 18 && wk->native_type != 23) || !wk->native_q8_1) {
+            if (!wk->native_data || (wk->native_type != 42 && wk->native_type != 18 && wk->native_type != 23 &&
+                                     wk->native_type != 8) || !wk->native_q8_1) {
                 std::fprintf(stderr, "strata generate: native PLE key is absent or incompatible\n");
                 return 1;
             }
@@ -1761,13 +2051,28 @@ int main(int argc, char** argv) {
         ss.ple.w.norm_key = (const float*) wnk->data;
         ss.ple.w.norm_query = (const float*) wnq->data;
         ss.ple.w.norm_conv = (const float*) wnc->data;
+        // The conv1d kernel reads F16, so this cast is a claim about the pack's storage.  A checkpoint that keeps
+        // the tensor F32 (Q8_0, UD-Q4_K_XL) would hand the kernel the low halves of the f32 words - not an error,
+        // a plausible wrong layer-1 routing.  tools/iq_pack.py narrows it (index kind 3); a pack that did not is
+        // refused here (#255, gopinath87607).  F16 is index kind 5 or 3 (F16InF32) in a native pack and kind 0
+        // (verbatim 2-byte F16) in the canonical Q2_0 pack; BF16 (kind 4) has the same size and is not F16.
+        const bool f16 = wc->kind == strata::core::WeightKind::F16InF32 ||
+                         (wc->kind == strata::core::WeightKind::Verbatim && wc->code_bits == 0);
+        if (!f16 || wc->bytes != (uint64_t) wc->elements * 2) {
+            std::fprintf(stderr, "strata generate: blk.1.ple_conv1d.weight is not stored as F16 (pack index kind %d, "
+                                 "%llu B for %lld values); the PLE conv1d kernel reads F16 - repack with "
+                                 "tools/iq_pack.py\n",
+                         (int) wc->kind, (unsigned long long) wc->bytes, (long long) wc->elements);
+            return 1;
+        }
         ss.ple.w.conv1d_f16 = (const uint16_t*) wc->data;
         ss.ple.consts = strata::kernels::ple_artifact_consts();
         if (o.ple_delay_us > 0) ple_table.set_injected_delay_us(o.ple_delay_us);
         ss.ple.table = &ple_table;
         ss.ple.token = &ss.ple_token;
         ss.ple.prev = ss.ple_prev;
-        ss.ple.hist = ss.ple_hist;
+        // `ss.ple.hist` and the ready() check wait for `session_init`, which carves the history - the session is
+        // now allocated after the layer-split search (see the carve), and the wiring lands there
         ss.ple.emb_host = ple_emb_host.data();
         if (DPCT_CHECK_ERROR(ple_emb_dev = (float *)sycl::malloc_device(
                                  (size_t)strata::kernels::NG_N_EMBD * 4,
@@ -1780,12 +2085,6 @@ int main(int argc, char** argv) {
         }
         ss.ple.emb_dev = ple_emb_dev;
         ss.ple.scratch = ple_scratch;
-        if (!ss.ple.ready()) {
-            std::fprintf(stderr, "strata generate: the PLE run is not ready after construction\n");
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: PLE on, table %llu rows of %s\n",
-                     (unsigned long long) ple_table.rows(), o.ple_gguf.c_str());
     } else {
         std::fprintf(stderr,
                      "strata generate: PLE OFF by explicit --no-ple diagnostic request.\n"
@@ -1803,6 +2102,70 @@ int main(int argc, char** argv) {
         return 1;
     }
 
+    // ---- --split-skip-if-fits: before any later stage loads, does CUDA0 alone hold every profiled pair?  What it
+    // still has to allocate on one GPU is the whole session (the KV of every layer), the drafter and the head
+    // (kDrafterMib below), the verify windows and the reserve; the prompt path borrows from the cache.  If the
+    // profile's pairs fit in what is left, a split would only add the hand-offs: run on CUDA0 alone.
+    if (multi_gpu && split_auto && o.split_skip_if_fits) {
+        std::vector<std::pair<int32_t, int32_t>> prof;
+        int64_t pslots = 0;
+        std::string perr;
+        const bool remote = o.expert_cache_remote[0] > 0 || o.expert_cache_remote[1] > 0 || o.expert_cache_remote[2] > 0;
+        if (remote || o.expert_profile.empty() ||
+            !strata::core::read_expert_profile(o.expert_profile, g.n_layers, g.n_expert, prof, pslots, perr)) {
+            std::fprintf(stderr, "strata generate: --split-skip-if-fits: %s; the split stays\n",
+                         remote ? "remote expert caches are in use" : perr.empty() ? "no expert profile" : perr.c_str());
+        } else {
+            const auto& lay = strata::kernels::cpu::expert_layout();
+            int64_t pairs_bytes = 0;
+            for (const auto& pr : prof)
+                pairs_bytes += native_pack ? ((int64_t) lay.blob_bytes(pr.first) + 255) / 256 * 256 : (int64_t) lay.max_blob;
+            size_t fb = 0, tb = 0;
+            /*
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(fb, tb);
+            const int64_t session = (int64_t) strata::core::session_bytes(g, o.max_context, K, 0, g.n_layers);
+            const int64_t held_back = session + (((int64_t) o.vram_reserve_mib + 1000 + 96) << 20);   // + drafter/head, windows
+            const int64_t room = (int64_t) fb - held_back;
+            dpct::device_info dp{};
+            dpct::get_device(0).get_device_info(dp);
+            if (pairs_bytes <= room) {
+                std::fprintf(stderr,
+                             "strata generate: layer split skipped "
+                             "(--split-skip-if-fits): CUDA0 (%s) holds all "
+                             "%zu profiled pairs (%.2f GiB) with the session "
+                             "(%.2f GiB, %lld-token context), "
+                             "the drafter and the reserve: %.2f GiB free, %.2f "
+                             "GiB to spare - one GPU\n",
+                             dp.get_name(), prof.size(),
+                             (double)pairs_bytes / 1073741824.0,
+                             (double)session / 1073741824.0,
+                             (long long)o.max_context,
+                             (double)fb / 1073741824.0,
+                             (double)(room - pairs_bytes) / 1073741824.0);
+                multi_gpu = false;
+                split_auto = false;
+                split_devs.clear();
+                split_at.clear();
+                o.layer_split.clear();
+            } else {
+                std::fprintf(stderr,
+                             "strata generate: --split-skip-if-fits: CUDA0 "
+                             "(%s) would hold only %.2f of the "
+                             "profile's %.2f GiB (%.2f GiB free, %.2f GiB for "
+                             "the session, drafter and "
+                             "reserve): the split stays\n",
+                             dp.get_name(),
+                             (double)std::max<int64_t>(room, 0) / 1073741824.0,
+                             (double)pairs_bytes / 1073741824.0,
+                             (double)fb / 1073741824.0,
+                             (double)held_back / 1073741824.0);
+            }
+        }
+    }
     // ---- layer split across GPUs: each later stage's own copy of the dense weights, its session and (the last) the
     // head, made on its device before the host arena is mapped (as the drafter below, for the same WDDM reason)
     std::vector<std::unique_ptr<GpuStage>> stages;
@@ -1810,7 +2173,6 @@ int main(int argc, char** argv) {
         stages.push_back(std::make_unique<GpuStage>());
         GpuStage& st = *stages.back();
         st.dev = split_devs[i];
-        const bool last = i + 1 == split_devs.size();
         double free_gib = 0;
         if (!strata::core::RemoteExperts::preflight(st.dev, free_gib, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -1832,18 +2194,14 @@ int main(int argc, char** argv) {
                          err.c_str());
             return 1;
         }
-        void* sbuf_s = nullptr;
+        // THE SESSION AND THE HEAD WAIT FOR THE SPLIT SEARCH.  `session_bytes` prices a stage's session by its
+        // LAYER RANGE (the carve - every stage used to hold all 48 layers' state whatever it ran), so the
+        // sessions are allocated after the search below has set `st.lb`/`st.le`; the last stage's head follows.
+        /*
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
         if (DPCT_CHECK_ERROR(
-                sbuf_s = (void *)sycl::malloc_device(
-                    strata::core::session_bytes(g, o.max_context, K),
-                    dpct::get_in_order_queue())) != 0 ||
-            strata::core::session_init(g, o.max_context, K, sbuf_s, st.ss) ==
-                0 ||
-            /*
-            DPCT1025: The SYCL queue is created ignoring the flag and
-            priority options.
-            */
-            DPCT_CHECK_ERROR(
                 st.stream = dpct::get_current_device().create_queue(true)) !=
                 0 ||
             /*
@@ -1854,14 +2212,7 @@ int main(int argc, char** argv) {
                 st.adapt_stream =
                     dpct::get_current_device().create_queue(true)) != 0 ||
             DPCT_CHECK_ERROR(st.adapt_ev = new sycl::event()) != 0) {
-            std::fprintf(stderr, "strata generate: layer split, CUDA%d: the session state failed\n", st.dev);
-            return 1;
-        }
-        const strata::core::WeightRef* wo_s = st.wt.find("output.weight");
-        if (wo_s == nullptr ||
-            (last && !o.native_head_gguf.empty() && !st.head.load(o.native_head_gguf, g.n_embd, wo_s->ne1, err))) {
-            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s\n", st.dev,
-                         wo_s == nullptr ? "output.weight is missing" : err.c_str());
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: its streams failed\n", st.dev);
             return 1;
         }
         // a control vector (the speed projection): its tables on this device too - the stage's layers apply it here
@@ -1904,134 +2255,11 @@ int main(int argc, char** argv) {
         runtimes. You may need to adjust the code.
         */
         dpct::get_current_device().get_memory_info(fb, tb);
-        std::fprintf(stderr, "strata generate: layer split: CUDA%d holds its weights, session%s; %.2f GiB free\n",
-                     st.dev, last ? " and head" : "", (double) fb / 1073741824.0);
+        std::fprintf(stderr, "strata generate: layer split: CUDA%d holds its weights; %.2f GiB free (its session "
+                             "follows the split search)\n", st.dev, (double) fb / 1073741824.0);
     }
     GpuStage* const last_st = stages.empty() ? nullptr : stages.back().get();
 
-    // Secure MTP's CUDA0 allocations before the large host arena is registered with both CUDA contexts.
-    // In particular WDDM can refuse the draft weights after mapping tens of GiB of host pages.
-    strata::core::MtpDrafter mtp;
-    if (!o.mtp.empty()) {
-        if (o.spec < 2) {
-            std::fprintf(stderr, "strata generate: --mtp is ignored without --spec T (T >= 2)\n");
-            o.mtp.clear();
-        }
-        if (!o.mtp.empty()) mtp.set_prompt_len((int64_t) o.tokens.size());
-        // the draft layer is the canonical model's MTP head (512 experts) even when the target is pruned,
-        // so it always sees the canonical geometry; `static` because MtpDrafter keeps a reference
-        static const strata::core::ModelGeometry draft_geometry{};
-        // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
-        const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
-        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
-    }
-    // Create the additional contexts after MTP has secured CUDA0 memory, but
-    // before the host arena maps its expert pages into their address spaces.
-    for (int r = 1; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0 && !early_remote) {
-        double free_gib = 0;
-        if (!strata::core::RemoteExperts::preflight(remote_dev[r], free_gib, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: CUDA%d context ready, %.2f GiB free before expert arena registration\n",
-                     remote_dev[r], free_gib);
-    }
-
-    // ---- the CPU expert pool
-    //
-    // R2.1: the experts are loaded into a RESIDENT ARENA by default.  The mmap path is kept behind
-    // `--mmap-experts` because it is the A/B arm, not because it is competitive.
-    //
-    // The reasoning is the review's C1 and it is now measured on both sides.  `FileExpertSource` maps the 34 GB
-    // file, and mapped file pages are the first thing the OS reclaims; the engine's rate then depends on whether
-    // the standby list happens to hold `experts.bin`, which is why two consecutive runs of the SAME BINARY with
-    // the SAME FLAGS measured 71.97 and 34.78 ms/token in the pool (7.54 vs 12.18 tok/s).  The arena is
-    // anonymous memory the engine owns, and the pool runs at 19.41 ms/token - 1.79x better than the warm mmap
-    // and 3.7x better than the cold one.
-    //
-    // IT IS NOT PINNED, and that is reported rather than hidden: `cudaHostRegister` on 31.64 GiB fails with
-    // "out of memory" (you cannot pin 34 of 63 GB) and the arena falls back to 4 KB anonymous pages.  That is
-    // fine for the CPU pool - which is all that exists today - and NOT fine for Phase 3, whose cache fills and
-    // CPU/PCIe miss split need the GPU to DMA out of this arena.  Read `note()` when that lands.
-    //
-    // The earlier "the arena does not fit" conclusion was WRONG and is worth recording: the failure was a stale
-    // CUDA error left set by the failed `cudaHostRegister` and read later by `gr_read`'s launch check.  See the
-    // note in `pinned.cu`.
-    strata::core::FileExpertSource src;
-    strata::core::ArenaExpertSource arena_src;
-    strata::core::GgufExpertSource gguf_src;
-    strata::core::ExpertSource* srcp = nullptr;
-    if (o.mmap_experts) {
-        // FileExpertSource maps the pack's experts.bin: a canonical pack has it; a native (IQ) pack has it when
-        // built with `tools/iq_pack.py --experts-bin` (the per-layer blob sizes of its layout, PR #121).  The low-RAM
-        // mode: the experts come from the file through the OS cache instead of a pinned copy in RAM, for a PC whose
-        // GPU holds most of them but whose RAM cannot hold them all.
-        if (native_pack && !std::filesystem::exists(std::filesystem::path(o.pack) / "experts.bin")) {
-            std::fprintf(stderr, "strata generate: --mmap-experts needs the pack's experts.bin; %s is a native (IQ) pack "
-                                 "built without it: python tools/iq_pack.py --gguf <shard 1> --out %s --experts-bin\n",
-                         o.pack.c_str(), o.pack.c_str());
-            return 2;
-        }
-        if (!src.open(o.pack, g.n_layers, g.n_expert, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: experts via mmap (--mmap-experts; the A/B arm of R2.1)\n");
-        srcp = &src;
-    } else if (o.stream_experts) {
-        // the SYCL port: a card that holds every expert needs no host copy of them, and a 23 GiB machine cannot
-        // hold one. The profile fill reads each blob once from the shard; nothing reads from here afterwards
-        // unless a slot is lent to the prefill and refilled.
-        if (!native_pack || o.native_preset.empty()) {
-            std::fprintf(stderr, "strata generate: --stream-experts needs a native (IQ) pack and --native SHARD1\n");
-            return 2;
-        }
-        if (!gguf_src.open(o.native_preset, g.n_layers, g.n_expert, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: experts streamed from the GGUF on demand (--stream-experts): no host "
-                             "arena; every expert must fit the VRAM cache\n");
-        srcp = &gguf_src;
-    } else {
-        arena_src.set_gguf(o.native_preset);   // plan v0.3 P6: a native pack may take its experts from shard 1
-        // On the multi-GPU Windows experiment, start with at most 8 GiB of mapped host pages.
-        // Unregistered layers remain in the resident arena and use the CPU expert path.
-        // (a layer split across GPUs too: pinning all of it into two contexts leaves WDDM refusing every later
-        // allocation - measured on the 5080 + 3090 rig: cudaMemGetInfo and the next cudaMalloc fail)
-        const uint64_t pin_limit = (o.expert_cache_remote[0] > 0 || multi_gpu) ? (8ull << 30) : 0;
-        if (!arena_src.open(o.pack, g.n_layers, g.n_expert, /*threads=*/6, err, pin_limit)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: expert arena: %s\n", arena_src.note().c_str());
-        std::fprintf(stderr, "strata generate: loaded %.2f GiB at %.2f GiB/s\n",
-                     (double) strata::kernels::cpu::expert_layout().total / (1024.0 * 1024 * 1024),
-                     arena_src.load_gib_per_second());
-        // A rate under ~0.2 GiB/s is not the hardware.  Task Scheduler / service contexts throttle this
-        // read+fill about 24x (measured 0.05 vs 1.42 GiB/s for the same binary, args and cache state; the
-        // scheduler's defaults - Below normal priority and a least-privilege token - were the only
-        // difference between the runs).  Say so instead of letting the user blame the disk; see
-        // docs/DETAILS.md, "Running it at startup (Task Scheduler)".
-#ifdef _WIN32   // a Windows launch context; elsewhere a load this slow is the disk
-        if (arena_src.load_gib_per_second() > 0.0 && arena_src.load_gib_per_second() < 0.2) {
-            std::fprintf(stderr,
-                         "strata generate: hint: ~24x below what this hardware streams from a normal "
-                         "launch. If Strata is started by Task Scheduler or a service, register the task "
-                         "with Priority 4 (Normal) and 'Run with highest privileges' - the scheduler's "
-                         "defaults (Below normal + a least-privilege token) throttle the load. See "
-                         "docs/DETAILS.md ('Running it at startup').\n");
-        }
-#endif
-        srcp = &arena_src;
-    }
-    strata::kernels::cpu::ExpertPool pool(o.pool_workers, /*pin=*/true, /*host_works=*/!o.no_host_worker);
-    if (o.no_ple_prefetch) strata::kernels::ple_prefetch_enable(false);
-    // ---- R4's slot storage.  Allocated AFTER the weights and the session, so `cudaMemGetInfo` inside `open`
-    // sees the memory this process actually has left rather than the card's idle figure - and refuses with both
-    // numbers if the slots do not fit, instead of handing back a cache smaller than it was asked for.
-    mem_mark("the weights, the session and the drafter");
-    strata::core::ExpertCache xcache;
     std::vector<std::pair<int32_t, int32_t>> profile;
     if (!o.expert_profile.empty()) {
         int64_t pslots = 0;
@@ -2059,8 +2287,24 @@ int main(int argc, char** argv) {
     //     99.53/99.34/99.15%, measured 99.5/99.4/99.0%).
     // Up to 3 GPUs every placement is tried; beyond, the layers are shared in proportion to speed.
     // STRATA_SPLIT_MISS_MS tunes the miss cost (a slower CPU: higher).
-    const int64_t split_pf_mib = o.prefill_chunk > 0 ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
-    auto stage_room = [&](int dev, bool later) -> int64_t {
+    // THE PROMPT PATH'S BUFFERS ARE BORROWED FROM THE CACHE, NOT WITHHELD BESIDE IT.  With borrowing the cache
+    // is sized first and at full size, and the prompt path is laid out in the tail of it (`Prefill::relayout`),
+    // so it withholds no VRAM of its own and this reserve is zero.  Only without borrowing - no profile to fill
+    // a cache from, or --no-prefill-borrow - do the buffers take a reserve, and then this estimate stands in
+    // for buffers that cannot be priced exactly yet because the sessions do not exist.  `plan_lend` uses the
+    // exact `Prefill::bytes_needed` as soon as it can.
+    const bool pf_borrow = !o.no_prefill_borrow && !o.expert_profile.empty();
+    const int64_t split_pf_mib = (o.prefill_chunk > 0 && !pf_borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+    // ---- WHAT A STAGE RESERVES, AND ON WHICH STAGE.  The flat 1 GiB this used to withhold from EVERY stage
+    // after the first was booked "for its windows and the drafter", but the windows measure 75 MiB ("window up
+    // to 6 tokens, 74.1 MiB of device buffers", on every boot) and the drafter is loaded on ONE stage - the
+    // last one, which is also the only one that holds the head.  On the two identical 8 GB cards that GiB was
+    // the entire difference between CUDA0's cache and CUDA1's: 814 slots against 188, 2026-09-30.  Both of
+    // those allocations are already made before a stage's cache is sized, so what has to be held back here is
+    // the windows and - only on the stage that carries them - the drafter and the head.
+    const int64_t kWindowMib = 96;       // the verify windows; 75 MiB measured, rounded up
+    const int64_t kDrafterMib = 1000;    // the MTP drafter (839 MiB) + the head, on the last stage only
+    auto stage_room = [&](int dev, bool later, bool drafter) -> int64_t {
         try {
     const strata::core::OnDevice on(dev);
         size_t fb = 0, tb = 0;
@@ -2070,7 +2314,8 @@ int main(int argc, char** argv) {
         runtimes. You may need to adjust the code.
         */
 
-        const int64_t reserve = ((int64_t) o.vram_reserve_mib + split_pf_mib + (later ? 1024 : 0)) << 20;
+        const int64_t reserve = ((int64_t) o.vram_reserve_mib + split_pf_mib + (later ? kWindowMib : 0) +
+                                 (drafter ? kDrafterMib : 0)) << 20;
         return std::max<int64_t>((int64_t) fb - reserve, 0);
     }
     catch (sycl::exception const &exc) {
@@ -2086,7 +2331,7 @@ int main(int argc, char** argv) {
         std::vector<double> layer_ms((size_t) ns);
         for (int i = 0; i < ns; ++i) {
             const int dev = i == 0 ? 0 : stages[(size_t) i - 1]->dev;
-            cap[(size_t) i] = stage_room(i == 0 ? -1 : dev, i > 0);
+            cap[(size_t) i] = stage_room(i == 0 ? -1 : dev, i > 0, i + 1 == ns);
             int sms = 0, khz = 0;
             sms = dpct::get_device(dev).get_max_compute_units();
             if (DPCT_CHECK_ERROR(
@@ -2101,7 +2346,7 @@ int main(int argc, char** argv) {
                 std::max(1.0, (double)sms * (double)khz / 1e6); // SMs x GHz
             layer_ms[(size_t) i] = 0.33 * (84.0 * 2.617) / speed;
             std::fprintf(stderr, "strata generate: layer split auto: CUDA%d %d SMs at %.2f GHz -> %.2f ms per layer, "
-                                 "%.2f GiB for experts\n", dev, sms, khz / 1e6, layer_ms[(size_t) i],
+                                 "%.2f GiB free before its session carve\n", dev, sms, khz / 1e6, layer_ms[(size_t) i],
                          (double) cap[(size_t) i] / 1073741824.0);
         }
         const double miss_ms = std::getenv("STRATA_SPLIT_MISS_MS") ? std::atof(std::getenv("STRATA_SPLIT_MISS_MS")) : 190.0;
@@ -2113,6 +2358,15 @@ int main(int argc, char** argv) {
         };
         // the predicted window time (ms) of a placement, and the routed mass its caches hold
         auto predict = [&](const std::vector<int64_t>& at, double& held_mass, int64_t& held) -> double {
+            // THE CARVE, PRICED: a placement gives stage i the layers [lb, le), and that range's session is a
+            // real cost on its device - subtracted here so the search knows what it leaves for experts.  This
+            // is why the sessions are allocated after the search: `session_bytes` is pure arithmetic.
+            std::vector<int64_t> capr((size_t) ns);
+            for (int i = 0; i < ns; ++i) {
+                const int64_t lb = i == 0 ? 0 : at[(size_t) i - 1];
+                const int64_t le = i + 1 < ns ? at[(size_t) i] : g.n_layers;
+                capr[(size_t) i] = cap[(size_t) i] - (int64_t) strata::core::session_bytes(g, o.max_context, K, lb, le);
+            }
             std::fill(used.begin(), used.end(), 0);
             held_mass = 0;
             held = 0;
@@ -2122,7 +2376,7 @@ int main(int argc, char** argv) {
                 int st = 0;
                 while (st + 1 < ns && l >= at[(size_t) st]) ++st;
                 if (full[(size_t) st]) continue;
-                if (used[(size_t) st] + cost(l) > cap[(size_t) st]) { full[(size_t) st] = true; continue; }   // as the fill
+                if (used[(size_t) st] + cost(l) > capr[(size_t) st]) { full[(size_t) st] = true; continue; }   // as the fill
                 used[(size_t) st] += cost(l);
                 held_mass += mass[r];
                 ++held;
@@ -2174,24 +2428,233 @@ int main(int argc, char** argv) {
                          (long long) split_at[i], (long long) (g.n_layers - 1));
             return 2;
         }
-    // the stage that runs a layer (0: CUDA0's)
-    auto stage_of = [&](int64_t l) -> int {
-        int st = 0;
-        while (st < (int) split_at.size() && l >= split_at[(size_t) st]) ++st;
-        return st;
-    };
-    if (multi_gpu) {
-        std::vector<std::pair<int32_t, int32_t>> mine;
-        for (const auto& pr : profile) {
-            const int st = stage_of(pr.first);
-            (st == 0 ? mine : stages[(size_t) st - 1]->profile).push_back(pr);
+    // the stage that runs a layer (0: CUDA0's)
+    auto stage_of = [&](int64_t l) -> int {
+        int st = 0;
+        while (st < (int) split_at.size() && l >= split_at[(size_t) st]) ++st;
+        return st;
+    };
+    if (multi_gpu) {
+        std::vector<std::pair<int32_t, int32_t>> mine;
+        for (const auto& pr : profile) {
+            const int st = stage_of(pr.first);
+            (st == 0 ? mine : stages[(size_t) st - 1]->profile).push_back(pr);
+        }
+        profile.swap(mine);
+        for (size_t i = 0; i < stages.size(); ++i) {
+            stages[i]->lb = split_at[i];
+            stages[i]->le = i + 1 < stages.size() ? split_at[i + 1] : g.n_layers;
+        }
+    }
+
+    // ---- CUDA0's session, and the stages' sessions: sized to each device's own layer range (the carve).  A
+    // stage that runs [lb, le) carves only those layers' GDN rows and QSA pools - before the carve every stage
+    // held all 48 layers' state whatever layers it ran, which is the same disease the chunked-QSA-prefill PR
+    // fixed in llama.cpp: allocation sized by the whole model instead of the device's own work.
+    {
+        const strata::core::OnDevice on0(0);
+        const int64_t hi0 = multi_gpu ? split_at[0] : -1;
+        if (DPCT_CHECK_ERROR(
+                sbuf = (void *)sycl::malloc_device(
+                    strata::core::session_bytes(g, o.max_context, K, 0, hi0),
+                    dpct::get_in_order_queue())) != 0) {
+            std::fprintf(stderr, "strata generate: session state allocation failed\n");
+            return 1;
+        }
+        if (strata::core::session_init(g, o.max_context, K, sbuf, ss, 0, hi0) == 0) {
+            std::fprintf(stderr, "strata generate: session_init failed\n");
+            return 1;
+        }
+        if (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1)
+            std::fprintf(stderr, "strata generate: KV streaming: %lld of %lld cells per QSA layer in VRAM, the K/V in "
+                                 "%.2f GiB of pinned RAM\n",
+                         (long long) (ss.qsa_states[ss.qsa_primary()].n_slots * 4),
+                         (long long) o.max_context, (double) strata::core::qsa_kv_host_bytes() / 1073741824.0);
+        // the PLE block above built everything but the history, which session_init has just carved
+        ss.ple.hist = ss.ple_hist;
+        // (#167) generate mode starts from an empty sequence, and nothing else zeroes this state before the prompt
+        // path or the verifier reads it (--serve zeroes it per request when nothing is reused)
+        strata::core::session_zero(ss, g, nullptr, main_cs);
+        if (DPCT_CHECK_ERROR(
+                dpct::get_current_device().queues_wait_and_throw()) != 0) {
+            std::fprintf(stderr, "strata generate: zeroing the session state failed\n");
+            return 1;
+        }
+        if (!o.ple_gguf.empty()) {
+            if (!ss.ple.ready()) {
+                std::fprintf(stderr, "strata generate: the PLE run is not ready after construction\n");
+                return 1;
+            }
+            std::fprintf(stderr, "strata generate: PLE on, table %llu rows of %s\n",
+                         (unsigned long long) ple_table.rows(), o.ple_gguf.c_str());
+        }
+    }
+    for (size_t i = 0; i < stages.size(); ++i) {
+        GpuStage& st = *stages[i];
+        const strata::core::OnDevice on(st.dev);
+        void* sbuf_s = nullptr;
+        if (DPCT_CHECK_ERROR(sbuf_s = (void *)sycl::malloc_device(
+                                 strata::core::session_bytes(g, o.max_context,
+                                                             K, st.lb, st.le),
+                                 dpct::get_in_order_queue())) != 0 ||
+            strata::core::session_init(g, o.max_context, K, sbuf_s, st.ss,
+                                       st.lb, st.le) == 0) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: the session state failed\n", st.dev);
+            return 1;
+        }
+        const bool last = i + 1 == stages.size();
+        const strata::core::WeightRef* wo_s = st.wt.find("output.weight");
+        if (wo_s == nullptr ||
+            (last && !o.native_head_gguf.empty() && !st.head.load(o.native_head_shards, g.n_embd, wo_s->ne1, err))) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s\n", st.dev,
+                         wo_s == nullptr ? "output.weight is missing" : err.c_str());
+            return 1;
+        }
+        size_t fb = 0, tb = 0;
+        /*
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(fb, tb);
+        std::fprintf(stderr, "strata generate: layer split: CUDA%d holds its weights, session [%lld, %lld)%s; "
+                             "%.2f GiB free\n", st.dev, (long long) st.lb, (long long) st.le,
+                     last ? " and the head" : "", (double) fb / 1073741824.0);
+    }
+
+    // Secure MTP's CUDA0 allocations before the large host arena is registered with both CUDA contexts.
+    // In particular WDDM can refuse the draft weights after mapping tens of GiB of host pages.
+    strata::core::MtpDrafter mtp;
+    if (!o.mtp.empty()) {
+        if (o.spec < 2) {
+            std::fprintf(stderr, "strata generate: --mtp is ignored without --spec T (T >= 2)\n");
+            o.mtp.clear();
+        }
+        if (!o.mtp.empty()) mtp.set_prompt_len((int64_t) o.tokens.size());
+        // the draft layer is the canonical model's MTP head (512 experts) even when the target is pruned,
+        // so it always sees the canonical geometry; `static` because MtpDrafter keeps a reference
+        static const strata::core::ModelGeometry draft_geometry{};
+        // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
+        const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
+        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
+    }
+    // Create the additional contexts after MTP has secured CUDA0 memory, but
+    // before the host arena maps its expert pages into their address spaces.
+    for (int r = 1; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0 && !early_remote) {
+        double free_gib = 0;
+        if (!strata::core::RemoteExperts::preflight(remote_dev[r], free_gib, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: CUDA%d context ready, %.2f GiB free before expert arena registration\n",
+                     remote_dev[r], free_gib);
+    }
+
+    // ---- the CPU expert pool
+    //
+    // R2.1: the experts are loaded into a RESIDENT ARENA by default.  The mmap path is kept behind
+    // `--mmap-experts` because it is the A/B arm, not because it is competitive.
+    //
+    // The reasoning is the review's C1 and it is now measured on both sides.  `FileExpertSource` maps the 34 GB
+    // file, and mapped file pages are the first thing the OS reclaims; the engine's rate then depends on whether
+    // the standby list happens to hold `experts.bin`, which is why two consecutive runs of the SAME BINARY with
+    // the SAME FLAGS measured 71.97 and 34.78 ms/token in the pool (7.54 vs 12.18 tok/s).  The arena is
+    // anonymous memory the engine owns, and the pool runs at 19.41 ms/token - 1.79x better than the warm mmap
+    // and 3.7x better than the cold one.
+    //
+    // IT IS NOT PINNED, and that is reported rather than hidden: `cudaHostRegister` on 31.64 GiB fails with
+    // "out of memory" (you cannot pin 34 of 63 GB) and the arena falls back to 4 KB anonymous pages.  That is
+    // fine for the CPU pool - which is all that exists today - and NOT fine for Phase 3, whose cache fills and
+    // CPU/PCIe miss split need the GPU to DMA out of this arena.  Read `note()` when that lands.
+    //
+    // The earlier "the arena does not fit" conclusion was WRONG and is worth recording: the failure was a stale
+    // CUDA error left set by the failed `cudaHostRegister` and read later by `gr_read`'s launch check.  See the
+    // note in `pinned.cu`.
+    strata::core::FileExpertSource src;
+    strata::core::ArenaExpertSource arena_src;
+    strata::core::GgufExpertSource gguf_src;
+    strata::core::ExpertSource* srcp = nullptr;
+    if (o.stream_experts && !o.mmap_experts) {
+        // the SYCL port: a card that holds every expert needs no host copy of them, and a 23 GiB machine cannot
+        // hold one. The profile fill reads each blob once from the shard; nothing reads from here afterwards
+        // unless a slot is lent to the prefill and refilled (the experts no slot holds: the pinned host mirror).
+        if (!native_pack || o.native_preset.empty()) {
+            std::fprintf(stderr, "strata generate: --stream-experts needs a native (IQ) pack and --native SHARD1\n");
+            return 2;
+        }
+        if (!gguf_src.open(o.native_preset, g.n_layers, g.n_expert, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
         }
-        profile.swap(mine);
-        for (size_t i = 0; i < stages.size(); ++i) {
-            stages[i]->lb = split_at[i];
-            stages[i]->le = i + 1 < stages.size() ? split_at[i + 1] : g.n_layers;
+        std::fprintf(stderr, "strata generate: experts streamed from the GGUF on demand (--stream-experts): no host "
+                             "arena; every expert must fit the VRAM cache\n");
+        srcp = &gguf_src;
+    } else if (o.mmap_experts) {
+        // FileExpertSource maps the pack's experts.bin: a canonical pack has it; a native (IQ) pack has it when
+        // built with `tools/iq_pack.py --experts-bin` (the per-layer blob sizes of its layout, PR #121).  The low-RAM
+        // mode: the experts come from the file through the OS cache instead of a pinned copy in RAM, for a PC whose
+        // GPU holds most of them but whose RAM cannot hold them all.
+        // CS-T: a native pack without experts.bin maps the model's GGUF shards instead (native_experts.txt's spans,
+        // checked against the files first) - no 30-77 GB copy of the experts on the disk
+        src.set_gguf(o.native_preset);
+        if (const char* v = std::getenv("STRATA_FETCH_THREADS"); v != nullptr && std::atoi(v) > 0)
+            src.set_fetch_threads(std::atoi(v));
+        if (!src.open(o.pack, g.n_layers, g.n_expert, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experts via mmap (--mmap-experts; %s)\n",
+                     src.gguf_mode() ? "the GGUF shards in place, no experts.bin" : "the A/B arm of R2.1");
+        srcp = &src;
+    } else {
+        arena_src.set_gguf(o.native_preset);   // plan v0.3 P6: a native pack may take its experts from shard 1
+        // Under WDDM (Windows, WSL2), a multi-GPU run (a layer split, or remote experts) starts with at most 8 GiB of
+        // mapped host pages: pinning all of it into two contexts leaves WDDM refusing every later allocation -
+        // measured on the 5080 + 3090 rig: cudaMemGetInfo and the next cudaMalloc fail.  Unregistered layers remain
+        // in the resident arena; their streamed experts go through the pinned staging ring.  A Linux driver has no
+        // such limit, so there the whole arena is pinned (#253).  STRATA_ARENA_PIN_GIB overrides both ways.
+        const int pin_env = strata::core::arena_pin_cap_gib();   // -1 unset, -2 "auto" (#243, Windows sliced pin)
+        const bool pin_wddm_cap = pin_env < 0 && (o.expert_cache_remote[0] > 0 || multi_gpu) && under_wddm();
+        const uint64_t pin_limit = pin_env >= 0 ? (uint64_t) pin_env << 30 : pin_wddm_cap ? (8ull << 30) : 0;
+        if (pin_env >= 0)
+            std::fprintf(stderr, "strata generate: STRATA_ARENA_PIN_GIB=%d: %s\n", pin_env,
+                         pin_env == 0 ? "the whole expert arena is pinned" : "the expert arena's pinning is capped");
+        else if (pin_wddm_cap)
+            std::fprintf(stderr, "strata generate: multi-GPU under WDDM: at most 8 GiB of the expert arena is pinned "
+                                 "(STRATA_ARENA_PIN_GIB changes it)\n");
+        if (!arena_src.open(o.pack, g.n_layers, g.n_expert, /*threads=*/6, err, pin_limit,
+                            o.shared_expert_arena)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: expert arena: %s\n", arena_src.note().c_str());
+        std::fprintf(stderr, "strata generate: loaded %.2f GiB at %.2f GiB/s\n",
+                     (double) strata::kernels::cpu::expert_layout().total / (1024.0 * 1024 * 1024),
+                     arena_src.load_gib_per_second());
+        // A rate under ~0.2 GiB/s is not the hardware.  Task Scheduler / service contexts throttle this
+        // read+fill about 24x (measured 0.05 vs 1.42 GiB/s for the same binary, args and cache state; the
+        // scheduler's defaults - Below normal priority and a least-privilege token - were the only
+        // difference between the runs).  Say so instead of letting the user blame the disk; see
+        // docs/DETAILS.md, "Running it at startup (Task Scheduler)".
+#ifdef _WIN32   // a Windows launch context; elsewhere a load this slow is the disk
+        if (arena_src.load_gib_per_second() > 0.0 && arena_src.load_gib_per_second() < 0.2) {
+            std::fprintf(stderr,
+                         "strata generate: hint: ~24x below what this hardware streams from a normal "
+                         "launch. If Strata is started by Task Scheduler or a service, register the task "
+                         "with Priority 4 (Normal) and 'Run with highest privileges' - the scheduler's "
+                         "defaults (Below normal + a least-privilege token) throttle the load. See "
+                         "docs/DETAILS.md ('Running it at startup').\n");
         }
+#endif
+        srcp = &arena_src;
     }
+    strata::kernels::cpu::ExpertPool pool(o.pool_workers, /*pin=*/true, /*host_works=*/!o.no_host_worker);
+    if (o.no_ple_prefetch) strata::kernels::ple_prefetch_enable(false);
+    // ---- R4's slot storage.  Allocated AFTER the weights and the session, so `cudaMemGetInfo` inside `open`
+    // sees the memory this process actually has left rather than the card's idle figure - and refuses with both
+    // numbers if the slots do not fit, instead of handing back a cache smaller than it was asked for.
+    mem_mark("the weights, the session and the drafter");
+    strata::core::ExpertCache xcache;
     // THE HEAD BEFORE THE CACHE.  The expert cache takes what is free minus the reserve, so everything allocated
     // after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after it and ate most of
     // the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for good at its first
@@ -2201,7 +2664,7 @@ int main(int argc, char** argv) {
     const int64_t n_vocab = wo->ne1;
     strata::core::NativeHead native_head;
     if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
-        if (!native_head.load(o.native_head_gguf, g.n_embd, n_vocab, err)) {
+        if (!native_head.load(o.native_head_shards, g.n_embd, n_vocab, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
@@ -2227,9 +2690,9 @@ int main(int argc, char** argv) {
         dpct::get_current_device().get_memory_info(free_b, total_b);
         // Plan v0.3 P5: the batched prompt path's chunk buffers are allocated later, so they are reserved here -
         // under WDDM an over-subscribed allocation does not fail, it pages to system memory and crawls.
-        // (with borrowing - the default with a profile - the prompt path lends cache slots instead)
-        const bool borrow = !o.no_prefill_borrow && !o.expert_profile.empty();
-        const int64_t prefill_mib = (o.prefill_chunk > 0 && !borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+        // (with borrowing - the default with a profile - the prompt path lends cache slots instead; `pf_borrow` is
+        // the predicate a local `borrow` was here, hoisted above so both cache-size branches read the same one)
+        const int64_t prefill_mib = (o.prefill_chunk > 0 && !pf_borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
         // the draft layer's head and logits are allocated when it binds, after this: 0.1.27's CJK subset made them
         // ~110-180 MiB larger, and out of the reserve they left 16 GB cards below the stall line (#199)
         const int64_t mtp_bind = (!o.mtp.empty() && native_head.loaded())
@@ -2245,8 +2708,9 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: no VRAM is left for the expert cache: lower --max-context, use "
                                  "--kv k8v4, run images on the CPU, or close other programs that use the GPU\n");
     } else if (multi_gpu && o.expert_cache > 0) {
-        // a layer split's prompt path has its own buffers (it borrows no slots): an explicit cache size leaves room
-        // for them and the reserve, or the first prompt fails with "device buffers ... do not fit"
+        // an explicit cache size leaves room for the prompt path's buffers and the reserve, or the first prompt
+        // fails with "device buffers ... do not fit" (with borrowing - the default with a profile - the path lends
+        // slots instead and `prefill_mib` is 0, so only the reserve is checked)
         size_t free_b = 0, total_b = 0;
         /*
         DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
@@ -2254,7 +2718,7 @@ int main(int argc, char** argv) {
         runtimes. You may need to adjust the code.
         */
         dpct::get_current_device().get_memory_info(free_b, total_b);
-        const int64_t prefill_mib = o.prefill_chunk > 0 ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+        const int64_t prefill_mib = (o.prefill_chunk > 0 && !pf_borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
         const int64_t reserve = ((int64_t) o.vram_reserve_mib + prefill_mib) << 20;
         const int64_t fit = std::max<int64_t>(((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob, 0);
         if (o.expert_cache > fit) {
@@ -2497,18 +2961,12 @@ int main(int argc, char** argv) {
                                  "STRATA_MIRROR_MIB or the free RAM, or lower --max-context\n", (long long) unmirrored_misses);
     }
 
-    if (o.resident_cpu_experts) {
-        if (!src.pin_cache_complement(xcache, err, /*pin=*/false)) {
-            std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: steady-state CPU cache misses are resident in ordinary RAM; borrowed cache entries may use mmap during prompt prefill\n");
-    }
-
     for (auto& stp : stages) {
         GpuStage& st = *stp;
         const auto& lay = strata::kernels::cpu::expert_layout();
-        const int64_t room = stage_room(st.dev, true);
+        // the drafter and the head are already allocated by now (they load above, before this), so what is left
+        // to hold back is the windows - and `free_b` has already lost the drafter.
+        const int64_t room = stage_room(st.dev, true, false);
         const strata::core::OnDevice on(st.dev);
         std::vector<int64_t> sized;
         int64_t used = 0;
@@ -2645,6 +3103,40 @@ int main(int argc, char** argv) {
     drive.d.src = srcp;
     drive.d.n_expert = g.n_expert;
     drive.d.jobs.resize((size_t) K);
+    // CS-T: routing-aware prefetch of the file tier (the GGUF in place): the next layer's router on this layer's MoE
+    // input predicts its experts and their pages are warmed meanwhile.  It only warms pages; STRATA_LOOKAHEAD=0 is
+    // the A/B arm, STRATA_LOOKAHEAD_K the experts per token (default 10).
+    strata::core::RouterLookahead lookahead;
+    if (srcp == &src && src.warms() && [] { const char* v = std::getenv("STRATA_LOOKAHEAD"); return v == nullptr || std::atoi(v) != 0; }()) {
+        std::vector<std::vector<uint16_t>> routers((size_t) g.n_layers);
+        bool ok = true;
+        for (int64_t l = 0; l < g.n_layers && ok; ++l) {
+            const strata::core::WeightRef* w = wt.find("blk." + std::to_string(l) + ".ffn_gate_inp.weight");
+            ok = w != nullptr && w->kind == strata::core::WeightKind::Bf16InF32 &&
+                 w->bytes == (uint64_t) (g.n_expert * g.n_embd) * 2;
+            if (!ok) break;
+            routers[(size_t) l].resize((size_t) (g.n_expert * g.n_embd));
+            ok = DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                                      .memcpy(routers[(size_t)l].data(),
+                                              w->data, (size_t)w->bytes)
+                                      .wait()) == 0;
+        }
+        const char* kv = std::getenv("STRATA_LOOKAHEAD_K");
+        if (ok && lookahead.start(std::move(routers), g.n_embd, g.n_expert, kv ? std::atoi(kv) : 10, &src, err)) {
+            drive.d.lookahead = &lookahead;
+            std::fprintf(stderr, "strata generate: routing-aware prefetch of the file tier on (the next layer's router)\n");
+        } else {
+            /*
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            (void)0;
+            std::fprintf(stderr, "strata generate: routing-aware prefetch off (%s)\n",
+                         ok ? err.c_str() : "the routers are not BF16 in the arena");
+            err.clear();
+        }
+    }
     // ---- R4.2c: THE HIT PATH.  Every one of these is required for `hits_ready()`, which is all-or-nothing on
     // purpose: a half-configured hit path would compute some experts twice and others not at all, and a token
     // built on that is wrong rather than refused.
@@ -2783,7 +3275,11 @@ int main(int argc, char** argv) {
     // ---- the graphs
     strata::core::SessionGraphs gr;
     if (!o.no_capture && !native_pack) {   // plan v0.3 P6: a native pack runs verify windows only
-        if (!strata::core::session_capture(wt, g, ss, d_parts, gr, err, /*split=*/o.gpu_stages)) {
+        // a layer split's CUDA0 session owns only [0, split_at[0]), so its graphs cover that range; the
+        // whole-model replay paths (`session_loop`, the plain generate loop) refuse rather than read another
+        // stage's state - a split runs its layers on the stages' verifiers (serve) or prefill stage chain
+        if (!strata::core::session_capture(wt, g, ss, d_parts, gr, err, /*split=*/o.gpu_stages, 0,
+                                           multi_gpu ? split_at[0] : -1)) {
             std::fprintf(stderr, "strata generate: session_capture: %s\n", err.c_str());
             return 1;
         }
@@ -3344,7 +3840,7 @@ int main(int argc, char** argv) {
                      (long long) resident);
     }
     if (!o.no_capture && !o.no_token_graph && layer_dump == nullptr && half_dump == nullptr &&
-        (hit_fn == nullptr || thits.on()) && !native_pack) {
+        (hit_fn == nullptr || thits.on()) && !native_pack && !multi_gpu) {   // a split's token graph cannot span stages
         if (!strata::core::session_capture_token(wt, g, ss, d_parts, loop_scratch.y_miss, loop_scratch.parts_bytes,
                                                  tgraph, err, thits.on() ? &thits : nullptr)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -3411,11 +3907,8 @@ int main(int argc, char** argv) {
         }
         return k;
     };
-    auto lend_bytes = [&](int32_t first) -> uint64_t {
-        return xcache.slot_offsets() ? (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[first])
-                                     : (uint64_t) (xcache.slots() - first) *
-                                           (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
-    };
+    // `lend_bytes` went with the single-cache serve loan: a participant's loan is priced by `part_bytes` from its
+    // OWN cache, and the only other user of the old helper was the serve path's own relayout.
     auto request_chunk = [](int64_t tokens, int64_t max_chunk) -> int64_t {
         if (tokens <= 0 || max_chunk <= 0) return 0;
         const int64_t rounded = tokens > std::numeric_limits<int64_t>::max() - 255
@@ -3428,16 +3921,17 @@ int main(int argc, char** argv) {
     // lent slot's expert is streamed during the prompt and refilled after it; measured on a 12 GB card, 32K Q2_0
     // prompt: 4096 791 tok/s, 6144 878, 8192 973 with 69% of the slots lent).  A request lends only what its own
     // prompt needs (Prefill::relayout), so a big chunk costs short prompts nothing.  0 = none fits.
+    // at 8192-token chunks nearly every expert streams anyway, so a lent slot costs little: 90% when the
+    // copies are DMA from pinned RAM (Q2_0 8192 + a 384-slot ring: 1283 tok/s), 85% when host copies are the
+    // limit (lending more only streams more through them).  STRATA_PREFILL_LEND_PCT overrides (tuning).
+    // Hoisted out of plan_lend: the serve path's per-stage loans obey the same cap, one participant at a time.
+    const int64_t kAutoLendPct = [] {
+        const char* v = std::getenv("STRATA_PREFILL_LEND_PCT");
+        return v ? (int64_t) std::atoi(v)
+                 : (int64_t) (strata::prefill::Prefill::pinned_share() >= 0.9 ? 90 : 85);
+    }();
     auto plan_lend = [&](int64_t& chunk) -> int64_t {
         static constexpr int64_t kAutoChunks[] = {8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
-        // at 8192-token chunks nearly every expert streams anyway, so a lent slot costs little: 90% when the
-        // copies are DMA from pinned RAM (Q2_0 8192 + a 384-slot ring: 1283 tok/s), 85% when host copies are the
-        // limit (lending more only streams more through them).  STRATA_PREFILL_LEND_PCT overrides (tuning).
-        const int64_t kAutoLendPct = [] {
-            const char* v = std::getenv("STRATA_PREFILL_LEND_PCT");
-            return v ? (int64_t) std::atoi(v)
-                     : (int64_t) (strata::prefill::Prefill::pinned_share() >= 0.9 ? 90 : 85);
-        }();
         auto slots_for = lend_slots;
         if (o.prefill_auto) {
             for (const int64_t c : kAutoChunks) {
@@ -3452,6 +3946,43 @@ int main(int argc, char** argv) {
         }
         return 0;
     };
+    // ---- the resident RAM mode (--resident-experts / --resident-cpu-experts): the experts the GPU cache does not
+    // hold are copied from experts.bin into RAM once, so no decode or prompt step reads the file (the plain mmap
+    // mode reads them through the OS file cache, which a small-RAM PC keeps giving back to the SSD).  Built here,
+    // after the prompt path's lend plan is known: the slots it may lend (the cache's last ones) have their experts
+    // streamed during a prompt and copied back after it, so those are kept in RAM too as far as RAM allows.  The
+    // bytes are the file's bytes and the placement is the same, so the answers are the plain mmap mode's; the
+    // share-of-pinned figure above (which sizes the prompt path) is left as the mmap mode's for the same reason.
+    if (o.resident_cpu_experts) {
+        int64_t lend_from = -1;
+        if (o.prefill_chunk > 0 && !o.no_prefill_borrow && d_res != nullptr && xcache.slots() > 0) {
+            int64_t chunk = o.prefill_chunk;
+            const int64_t k = plan_lend(chunk);
+            if (k > 0) lend_from = xcache.slots() - k;
+        }
+        if (src.pin_cache_complement(xcache, err, o.resident_pin, {}, lend_from, o.resident_headroom,
+                                     o.resident_budget, &profile)) {
+            if (o.adapt_every > 0 && o.adapt_swaps > 0 &&
+                !src.reserve_exchanges(std::min<int64_t>(o.adapt_swaps, 96), err)) {
+                std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
+                return 1;
+            }
+            std::fprintf(stderr, "strata generate: resident RAM mode: %.2f GiB of experts in RAM (%s), %lld in the GPU "
+                                 "cache; adaptive swaps %s\n",
+                         (double) src.resident_bytes() / 1073741824.0,
+                         src.complement_pinned() ? "page-locked" : src.locked_bytes() > 0 ? "locked" : "pageable",
+                         (long long) xcache.resident(),
+                         o.adapt_every > 0 && o.adapt_swaps > 0 ? "exchange them with the GPU cache (no file reads)"
+                                                                : "off");
+        } else if (o.resident_soft) {
+            std::fprintf(stderr, "strata generate: WARNING: the resident RAM mode does not fit (%s); the experts the "
+                                 "GPU does not hold are read from the model folder through the OS file cache "
+                                 "(--mmap-experts), which is slower when the RAM cannot keep them\n", err.c_str());
+        } else {
+            std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
+            return 1;
+        }
+    }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||
             (graph_hits && (thits.d_res == nullptr || host_res.empty()))) {
@@ -3463,48 +3994,239 @@ int main(int argc, char** argv) {
         void* borrow = nullptr;
         uint64_t borrow_bytes = 0;
         int32_t lend_first = -1;          // the first slot the prompt path may borrow (its largest chunk)
-        int32_t lend_first_now = -1;      // where its buffers are laid out now
-        // a cache too small to lend the prompt path its buffers would make it allocate them on top - on a card the
-        // cache already filled to its reserve, that is the over-subscription the auto sizing avoids - so the
-        // prompt chunk is halved until its buffers fit in the lendable slots (a smaller chunk only reads slower)
-        if (!o.no_prefill_borrow && d_res != nullptr) {
-            int64_t chunk = o.prefill_chunk;
-            if (const int64_t k = plan_lend(chunk); k > 0) {
+        // ---- WHO BORROWS, AND FROM WHOSE CACHE.  One entry per prompt path: CUDA0's (layers [0, split_at[0]),
+        // which is the whole model without a split) borrowing the tail of CUDA0's cache, then one per stage
+        // borrowing the tail of ITS OWN cache.  A loan is sized by the exact `Prefill::bytes_needed` for the
+        // chunk, is laid out by `Prefill::relayout`, and is refilled before any window reads - so outside the
+        // prompt the whole cache is expert cache.  THIS IS THE POINT OF THE STRUCT: the loan used to exist only
+        // for CUDA0, and `no_prefill_borrow` made every stage instead withhold a chunk-sized reserve from its
+        // cache for the entire session, which is what cost the 4-way its context (see the note at the top of the
+        // layer-split block).  A stage may only lend the rows for ITS OWN layers: `host_res` is one table whose
+        // slot values are indices into whichever cache owns the layer, so a loan that marked rows by slot number
+        // alone would hand CUDA0 a slot belonging to another stage's cache.
+        struct PfPart {
+            strata::core::ExpertCache* cache = nullptr;
+            const strata::core::SessionState* ses = nullptr;
+            strata::prefill::Prefill* sp = nullptr;
+            int dev = -1;                  // -1: leave the device alone (CUDA0)
+            int64_t lb = 0, le = 0;        // the layers whose rows this cache holds - the only rows it may lend
+            int32_t first = -1;            // the first slot it may lend, for the chunk that was chosen
+            int32_t first_now = -1;        // where its buffers are laid out now
+            int64_t lent_chunk = 0;
+            std::vector<std::pair<int32_t, int32_t>> lent;
+        };
+        auto part_slots = [&](const PfPart& p, int64_t c) -> int64_t {
+            const uint64_t need = strata::prefill::Prefill::bytes_needed(g, *p.ses, c);
+            strata::core::ExpertCache& xc = *p.cache;
+            if (xc.slot_offsets() != nullptr) {   // sized slots: from the end until they hold `need`
+                int64_t k = 0;
+                while (k < xc.slots() &&
+                       (uint64_t) (xc.bytes() - (int64_t) xc.slot_offsets()[xc.slots() - k]) < need) ++k;
+                return k;
+            }
+            const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+            return (int64_t) ((need + (uint64_t) blob - 1) / (uint64_t) blob);
+        };
+        auto part_bytes = [&](const PfPart& p, int32_t first) -> uint64_t {
+            strata::core::ExpertCache& xc = *p.cache;
+            return xc.slot_offsets() ? (uint64_t) (xc.bytes() - (int64_t) xc.slot_offsets()[first])
+                                     : (uint64_t) (xc.slots() - first) *
+                                           (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
+        };
+        std::vector<PfPart> pf_parts;
+        // a cache too small to lend the prompt path its buffers would make it allocate them on top - on a card
+        // whose cache already filled its reserve, that is the over-subscription the auto sizing avoids - so the
+        // chunk is the largest one EVERY participant can lend (a smaller chunk only reads slower)
+        if (pf_borrow && d_res != nullptr) {
+            pf_parts.push_back({&xcache, &ss, &sp, -1, 0, multi_gpu ? split_at[0] : g.n_layers, -1, -1, 0, {}});
+            for (auto& st : stages)
+                pf_parts.push_back({&st->cache, &st->ss, &st->sp, st->dev, st->lb, st->le, -1, -1, 0, {}});
+            // The two tests plan_lend makes for CUDA0 alone, one participant at a time: a loan must leave the
+            // 128-slot floor.  The percentage cap is an AUTO-chunk rule and only the auto scan applies it - an
+            // explicit --prefill is the operator's number, and a loan of it only has to fit.  With one participant
+            // (no split) this reduces to plan_lend exactly, so the single-GPU loan is unchanged from main.
+            auto fits = [&](int64_t c, bool cap) -> bool {
+                for (const PfPart& p : pf_parts) {
+                    const int64_t k = part_slots(p, c);
+                    if (k <= 0 || k + 128 > p.cache->slots()) return false;
+                    if (cap && k * 100 > kAutoLendPct * p.cache->slots()) return false;
+                }
+                return true;
+            };
+            static constexpr int64_t kAutoChunks[] = {8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
+            int64_t chunk = 0;
+            if (o.prefill_auto) {
+                for (const int64_t c : kAutoChunks)
+                    if (fits(c, true)) { chunk = c; break; }
+            } else {
+                for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
+                    if (fits(c, false)) { chunk = c; break; }
+            }
+            if (chunk > 0) {
                 if (o.prefill_auto)
                     std::fprintf(stderr, "strata serve: prompt chunk auto: %lld tokens\n", (long long) chunk);
                 else if (chunk != o.prefill_chunk)
-                    std::fprintf(stderr, "strata serve: prompt chunk %lld -> %lld tokens so its buffers fit in the "
-                                         "expert cache\n", (long long) o.prefill_chunk, (long long) chunk);
+                    std::fprintf(stderr, "strata serve: prompt chunk %lld -> %lld tokens so its buffers fit in "
+                                         "every expert cache\n", (long long) o.prefill_chunk, (long long) chunk);
                 o.prefill_chunk = chunk;
-                lend_first = (int32_t) (xcache.slots() - k);
-                lend_first_now = lend_first;
+                for (PfPart& p : pf_parts) {
+                    p.first = (int32_t) (p.cache->slots() - part_slots(p, chunk));
+                    p.first_now = p.first;
+                }
+                lend_first = pf_parts[0].first;
                 borrow = xcache.device_slot(lend_first);
-                borrow_bytes = xcache.slot_offsets()
-                                   ? (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[lend_first])
-                                   : (uint64_t) k * (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
+                borrow_bytes = part_bytes(pf_parts[0], lend_first);
             } else if (o.prefill_auto) {
                 o.prefill_chunk = 1024;   // nothing lendable: small buffers of its own
+            } else if (pf_parts.size() > 1) {
+                // An explicit chunk no stage can lend in full.  main falls back to the prompt path's own buffers
+                // here and so do we, rather than refusing to start - but say what every stage has, because a split
+                // stage that has to allocate these on top of a cache that already filled its VRAM will not fit,
+                // and `init` would otherwise report only that the buffers do not fit.
+                std::fprintf(stderr, "strata serve: no stage can lend the prompt path its %lld-token buffers, so "
+                                     "each stage allocates its own:\n", (long long) o.prefill_chunk);
+                for (const PfPart& p : pf_parts)
+                    std::fprintf(stderr, "strata serve:   CUDA%d has %lld slots, and a %lld-token chunk needs "
+                                         "the last %lld of them\n", p.dev < 0 ? 0 : p.dev,
+                                 (long long) p.cache->slots(), (long long) o.prefill_chunk,
+                                 (long long) part_slots(p, o.prefill_chunk));
             }
         } else if (o.prefill_auto && d_res == nullptr) {
             o.prefill_chunk = 1024;       // #85: no expert cache at all (a full 8 GB card): small buffers of its own
         }
-        if (borrow != nullptr)
-            std::fprintf(stderr, "strata serve: the prompt path borrows %lld cache slots (%.2f GiB)\n",
+        if (borrow != nullptr) {
+            std::fprintf(stderr, "strata serve: the prompt path borrows %lld CUDA0 cache slots (%.2f GiB)\n",
                          (long long) (xcache.slots() - lend_first), (double) borrow_bytes / 1073741824.0);
-        else
+            for (size_t i = 1; i < pf_parts.size(); ++i)   // one loan per stage, from that stage's own cache
+                std::fprintf(stderr, "strata serve:   CUDA%d prompt path borrows %lld of its %lld slots (%.2f GiB)\n",
+                             pf_parts[i].dev, (long long) (pf_parts[i].cache->slots() - pf_parts[i].first),
+                             (long long) pf_parts[i].cache->slots(),
+                             (double) part_bytes(pf_parts[i], pf_parts[i].first) / 1073741824.0);
+        } else {
             std::fprintf(stderr, "strata serve: the prompt path allocates its own buffers (too few cache slots to borrow)\n");
-        // layer split across GPUs: a prompt path per stage, each handing its chunk's rows to the next
-        for (size_t i = 0; i < stages.size(); ++i) {
-            GpuStage& st = *stages[i];
-            st.sp.set_stage(st.lb, i + 1 < stages.size() ? st.le : -1, i + 1 < stages.size() ? &stages[i + 1]->sp : nullptr);
-            const strata::core::OnDevice on(st.dev);
-            if (!st.sp.init(st.wt, g, st.ss, srcp, &st.cache, host_res.data(), o.prefill_chunk, (void*) st.stream, err)) {
-                std::fprintf(stderr, "strata serve: layer split, CUDA%d prompt path: %s\n", st.dev, err.c_str());
-                return 1;
+        }
+        // layer split across GPUs: a prompt path per stage, each handing its chunk's rows to the next.
+        // THE CHUNK STEPS DOWN INSTEAD OF EXITING.  A split's stage caches are sized after the arena is registered, and
+        // the prompt path's own buffers (no loan) are not priced into them: with the whole arena pinned (#253) a
+        // `--prefill auto` split could stop at start with "device buffers for a chunk of 2048 tokens do not fit".  A
+        // chunk that does not fit is tried again one size smaller, down to 512 tokens (a smaller chunk only reads slower).
+        auto init_prompt_paths = [&]() -> int {   // 0: ready; 1: failed (err set); 2: failed with "do not fit"
+            for (size_t i = 0; i < stages.size(); ++i) {
+                GpuStage& st = *stages[i];
+                st.sp.set_stage(st.lb, i + 1 < stages.size() ? st.le : -1, i + 1 < stages.size() ? &stages[i + 1]->sp : nullptr);
+                const strata::core::OnDevice on(st.dev);
+                void* sb = nullptr;              // this stage's own loan, out of its own cache
+                uint64_t sbb = 0;
+                // `first < 0`: no loan was taken (nothing was lendable), so this stage allocates its own buffers
+                if (i + 1 < pf_parts.size() && pf_parts[i + 1].first >= 0) {
+                    sb = st.cache.device_slot(pf_parts[i + 1].first);
+                    sbb = part_bytes(pf_parts[i + 1], pf_parts[i + 1].first);
+                }
+                if (!st.sp.init(st.wt, g, st.ss, srcp, &st.cache, host_res.data(), o.prefill_chunk, (void*) st.stream,
+                                err, sb, sbb)) {
+                    err = "layer split, CUDA" + std::to_string(st.dev) + " prompt path: " + err;
+                    return err.find("do not fit") != std::string::npos ? 2 : 1;
+                }
+            }
+            if (multi_gpu) sp.set_stage(0, split_at[0], &stages[0]->sp);
+            if (!sp.init(wt, g, ss, srcp, &xcache, host_res.data(), o.prefill_chunk, main_cs, err, borrow, borrow_bytes))
+                return err.find("do not fit") != std::string::npos ? 2 : 1;
+            return 0;
+        };
+        static constexpr int64_t kStepChunks[] = {6144, 4096, 3072, 2048, 1536, 1024, 512};
+        {
+            // First by arithmetic: a prompt path without a loan allocates its buffers, so the chunk must leave
+            // headroom on that device (a chunk that fits to the last MiB left hipBLAS nothing: its GEMMs then
+            // failed to launch on gfx1201 and the prompt hung).  `bytes_needed` is the same count `init` makes.
+            const int64_t kHeadroom = 512ll << 20;
+            auto own_fits = [&](int64_t c, int &dev_out, int64_t &need_out,
+                                int64_t &free_out) -> bool {
+                try {
+            for (size_t i = 0; i <= stages.size(); ++i) {
+                    const bool loan = i == 0 ? borrow != nullptr : (i < pf_parts.size() && pf_parts[i].first >= 0);
+                    if (loan) continue;
+                    const int dev = i == 0 ? -1 : stages[i - 1]->dev;
+                    const strata::core::OnDevice on(dev);
+                    size_t fb = 0, tb = 0;
+                    /*
+                    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+                    extensions for device information which may not be supported
+                    by all compilers or runtimes. You may need to adjust the
+                    code.
+                    */
+                    dpct::get_current_device().get_memory_info(fb, tb);
+                    const int64_t need = (int64_t) strata::prefill::Prefill::bytes_needed(g, i == 0 ? ss : stages[i - 1]->ss, c);
+                    if (need + kHeadroom > (int64_t) fb) {
+                        dev_out = dev < 0 ? 0 : dev; need_out = need; free_out = (int64_t) fb;
+                        return false;
+                    }
+                }
+                return true;
+            }
+            catch (sycl::exception const &exc) {
+              std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                        << ", line:" << __LINE__ << std::endl;
+              std::exit(1);
+            }
+            };
+            int dev = 0;
+            int64_t need = 0, fb = 0;
+            if (!own_fits(o.prefill_chunk, dev, need, fb)) {
+                int64_t c = 0;
+                for (const int64_t s : kStepChunks) {
+                    int d2 = 0;
+                    int64_t n2 = 0, f2 = 0;
+                    if (s < o.prefill_chunk && own_fits(s, d2, n2, f2)) { c = s; break; }
+                }
+                if (c > 0) {
+                    std::fprintf(stderr, "strata serve: a %lld-token chunk's prompt buffers need %lld MiB on CUDA%d, "
+                                         "%lld MiB free: %lld-token chunks\n", (long long) o.prefill_chunk,
+                                 (long long) (need >> 20), dev, (long long) (fb >> 20), (long long) c);
+                    o.prefill_chunk = c;
+                }
             }
         }
-        if (multi_gpu) sp.set_stage(0, split_at[0], &stages[0]->sp);
-        if (!sp.init(wt, g, ss, srcp, &xcache, host_res.data(), o.prefill_chunk, main_cs, err, borrow, borrow_bytes)) {
+        for (;;) {
+            const int r = init_prompt_paths();
+            if (r == 0) break;
+            int64_t next = 0;
+            for (const int64_t c : kStepChunks)
+                if (c < o.prefill_chunk) { next = c; break; }
+            if (r == 2 && next > 0) {
+                std::fprintf(stderr, "strata serve: %s: trying a %lld-token chunk\n", err.c_str(), (long long) next);
+                // start the prompt paths over (a failed init may hold buffers), and consume the failed allocation's
+                // error: it is sticky, and the next launch check would report "out of memory" for a kernel
+                for (auto& stp : stages) {
+                    const strata::core::OnDevice on(stp->dev);
+                    stp->sp.reset();
+                    /*
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
+                    */
+                    (void)0;
+                }
+                sp.reset();
+                /*
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                (void)0;
+                o.prefill_chunk = next;
+                if (borrow != nullptr) {         // smaller loans for the smaller chunk
+                    for (PfPart& p : pf_parts)
+                        if (p.first >= 0) {
+                            p.first = (int32_t) (p.cache->slots() - part_slots(p, next));
+                            p.first_now = p.first;
+                        }
+                    lend_first = pf_parts[0].first;
+                    borrow = xcache.device_slot(lend_first);
+                    borrow_bytes = part_bytes(pf_parts[0], lend_first);
+                }
+                err.clear();
+                continue;
+            }
             std::fprintf(stderr, "strata serve: %s\n", err.c_str());
             if (err.find("fit") != std::string::npos)   // #85: say what frees VRAM
                 std::fprintf(stderr, "strata serve: the GPU has too little free VRAM for the prompt path: turn images "
@@ -3648,6 +4370,69 @@ int main(int argc, char** argv) {
         std::vector<ConvCheckpoint> checks;
         uint64_t check_clock = 0;   // the checkpoints' LRU clock; creation and every use advance it
         bool cvec_cached = true;   // the control vector's state the live session and the checkpoints were read with
+        strata::core::ConversationCache conversations(
+            o.prompt_cache > 0 ? (size_t) o.conversation_cache_mib * 1024 * 1024 : 0,
+            (size_t) o.conversation_cache_slots);
+        // Save only on a switch/rewind, not on each continuing request. No graph
+        // addresses change: all parked images live in ordinary host vectors.
+        auto park_current = [&](size_t held) -> bool {
+            if (!conversations.enabled() || !live_ok || live.empty()) return true;
+            const strata::core::ConversationView view{live, live_imgs, checks, cvec_cached};
+            auto reuse = conversations.take_reuse();
+            size_t estimate = 0;
+            if (!strata::core::conversation_snapshot_bytes(view, ss, g, mtp.kv_state(), estimate, err)) {
+                std::fprintf(stderr, "strata serve: conversation cache: skip parking (%s)\n", err.c_str());
+                err.clear(); // A recoverable miss must not poison the batched draft prefill's error channel.
+                return true;
+            }
+            const size_t fresh_estimate = estimate;
+            if (!reuse.kv.empty() && !strata::core::conversation_snapshot_capture_bytes(
+                    reuse, view, ss, g, mtp.kv_state(), estimate, err)) {
+                reuse = {};
+                estimate = fresh_estimate;
+                err.clear();
+            }
+            if (!reuse.kv.empty() && !conversations.can_fit(estimate, held)) {
+                // Optional growth capacity must not evict useful conversations.
+                reuse = {};
+                estimate = fresh_estimate;
+            }
+            if (!conversations.make_room(estimate, held)) {
+                std::fprintf(stderr, "strata serve: conversation cache: skip parking (snapshot %zu MiB exceeds available budget)\n",
+                             estimate >> 20);
+                return true;
+            }
+            const auto t0 = Clock::now();
+            try {
+                const uint64_t floor = (uint64_t) o.conversation_cache_min_free_mib * 1024 * 1024;
+                const size_t additional = estimate - reuse.bytes();
+                if (!strata::core::conversation_memory_admit(strata::core::conversation_available_memory(),
+                        additional, floor)) {
+                    std::fprintf(stderr, "strata serve: conversation cache: skip parking (physical RAM admission; need %zu MiB plus %lld MiB floor, or telemetry unavailable)\n",
+                                 additional >> 20, (long long) o.conversation_cache_min_free_mib);
+                    return true;
+                }
+                strata::core::SavedConversation image;
+                size_t reused_bytes = 0;
+                if (!strata::core::conversation_snapshot_save(image, view, ss, g, mtp.kv_state(), err,
+                        std::move(reuse), &reused_bytes)) return false;
+                if (!strata::core::conversation_memory_admit(strata::core::conversation_available_memory(), 0, floor)) {
+                    std::fprintf(stderr, "strata serve: conversation cache: skip parking (physical RAM floor after capture, or telemetry unavailable)\n");
+                    return true;
+                }
+                const size_t snapshot_bytes = image.bytes();
+                const bool stored = conversations.put(std::move(image), held);
+                std::fprintf(stderr, "strata serve: conversation cache: %s %zu tokens in %.1f ms; parked=%zu bytes=%zu evictions=%zu snapshot_bytes=%zu reused_kv_bytes=%zu\n",
+                             stored ? "parked" : "skipped", live.size(),
+                             std::chrono::duration<double, std::milli>(Clock::now() - t0).count(),
+                             conversations.size(), conversations.bytes(), conversations.evictions(), snapshot_bytes, reused_bytes);
+            } catch (const std::bad_alloc&) {
+                // The active state has not been touched. Continue with normal
+                // prompt processing rather than killing a serving process.
+                std::fprintf(stderr, "strata serve: conversation cache: allocation failed; skip parking\n");
+            }
+            return true;
+        };
         int64_t pp_total = 0, pp_from = 0, pp_next_check = 0;
         Clock::time_point pp_t0 = Clock::now();
         auto imgs_below = [&](const std::vector<ImgKey>& all, int64_t L) {
@@ -3678,6 +4463,8 @@ int main(int argc, char** argv) {
                 c.gdn = std::move((*parts)[0].gdn);
                 c.ple = std::move((*parts)[0].ple);
                 c.tails = std::move((*parts)[0].tails);
+                c.dead = std::move((*parts)[0].dead);
+                c.block_pos = std::move((*parts)[0].block_pos);
                 for (size_t i = 1; i < parts->size(); ++i) c.stage_parts.push_back(std::move((*parts)[i]));
             } else {
                 if (DPCT_CHECK_ERROR(
@@ -3687,6 +4474,7 @@ int main(int argc, char** argv) {
                 for (auto& st : stages) {   // a layer split's later stages: their sessions' part
                     const strata::core::OnDevice on(st->dev);
                     ConvCheckpoint part;
+                    part.ids = c.ids;
                     if (DPCT_CHECK_ERROR(dpct::get_current_device()
                                              .queues_wait_and_throw()) != 0 ||
                         !checkpoint_save(part, st->ss, g)) return false;
@@ -3717,6 +4505,9 @@ int main(int argc, char** argv) {
             // E-9: batched through the prompt path when it can (one GPU: a layer split's drafter is on the last stage)
             const bool batched = !multi_gpu && sp.draft_kv(mtp, R_rows, nxt.data(), T, p0, e);
             if (!e.empty() || (!batched && !mtp.prefill(R_rows, nxt.data(), T, p0, e))) return false;
+            if (std::getenv("STRATA_SNAPSHOT_VERIFY") != nullptr)
+                std::fprintf(stderr, "strata serve: DRAFT_PREFILL path=%s mode=%d cells=%lld\n",
+                             batched ? "batched" : "token", mtp.kv_state().kv_mode, (long long) T);
             // progress for the server window: PP <position reached> <prompt tokens> <ms> <fresh tokens/s>
             const int64_t done = p0 + T;
             const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
@@ -3756,6 +4547,7 @@ int main(int argc, char** argv) {
                     if (o.prompt_cache <= 0 || o.prompt_cache_every <= 0 || done < part_next[i]) return true;
                     part_next[i] = done + o.prompt_cache_every;
                     ConvCheckpoint part;   // this stage's state at `done` (its stream is synchronized)
+                    part.ids.assign(cur.begin(), cur.begin() + done);
                     if (!checkpoint_save(part, stage_ss, g)) { e = "saving a checkpoint part failed"; return false; }
                     std::lock_guard<std::mutex> lk(part_mu);
                     auto& v = part_at[done];
@@ -3825,6 +4617,7 @@ int main(int argc, char** argv) {
                              sycl::info::event_command_status::complete) return;
                 }
             for (auto& st : stages) st->adapt_live = false;
+            src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
             for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
             pending.clear();
             res_upload();
@@ -3862,6 +4655,7 @@ int main(int argc, char** argv) {
             }
             std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
             if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
+            if (!resident_stage_swaps(src, xcache, host_res, g.n_expert, swaps, adapt_stream)) return false;
             bool main_live = false;
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
@@ -3994,16 +4788,38 @@ int main(int argc, char** argv) {
             compilers or runtimes. You may need to adjust the code.
             */
             dpct::get_current_device().get_memory_info(free_b, total_b);
-            std::printf("INFO context=%lld kv=%s kv_resident=%lld expert_slots=%lld expert_cache_mib=%lld spec=%d "
+            // "Experts in VRAM" is every tier, not one card's.  This used to report `xcache` alone, so a layer split
+            // showed CUDA0's cache as if it were the whole GPU's: a 4-GPU 256K run read 3327 experts when the four
+            // cards held 13320, and the Monitor tab was wrong by 4x for every multi-GPU config.  The tiers are
+            // disjoint by construction (remote_experts.cpp skips any pair a stage already claimed), so they add.
+            const int64_t slots_primary = (int64_t) xcache.slots();
+            const int64_t mib_primary = (int64_t) (xcache.bytes() >> 20);
+            int64_t slots_all = slots_primary, mib_all = mib_primary;
+            for (const auto& st : stages) {
+                slots_all += (int64_t) st->cache.slots();
+                mib_all += (int64_t) (st->cache.bytes() >> 20);
+            }
+            for (int r = 0; r < 3; ++r)
+                if (o.expert_cache_remote[(size_t) r] > 0) {
+                    slots_all += remote_experts[(size_t) r].resident();
+                    mib_all += (int64_t) (remote_experts[(size_t) r].gib() * 1024.0);
+                }
+            std::printf("INFO context=%lld kv=%s kv_resident=%lld expert_slots=%lld expert_cache_mib=%lld "
+                        "expert_slots_primary=%lld expert_cache_primary_mib=%lld spec=%d "
                         "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
-                        "spec_min_p=%.2f engine=" STRATA_VERSION "\n",
+                        "spec_min_p=%.2f conversation_cache_mib=%lld conversation_cache_slots=%d "
+                        "conversation_cache_min_free_mib=%lld engine=" STRATA_VERSION "\n",
                         (long long) o.max_context, o.kv.c_str(),
-                        (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1
-                                         ? ss.qsa_states[0].n_slots * 4 : 0),
-                        (long long) xcache.slots(), (long long) (xcache.bytes() >> 20), o.spec, o.mtp_max_t,
+                        (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1
+                                         ? ss.qsa_states[ss.qsa_primary()].n_slots * 4 : 0),
+                        (long long) slots_all, (long long) mib_all,
+                        (long long) slots_primary, (long long) mib_primary,
+                        o.spec, o.mtp_max_t,
                         o.suffix_draft, (long long) (free_b >> 20), cvec_summary.c_str(),
-                        (long long) (strata::kernels::cpu::expert_layout().total >> 20), pool.workers(), o.pcie_frac,
-                        o.spec_min_p);
+                        (long long) ((o.mmap_experts ? src.resident_bytes() : strata::kernels::cpu::expert_layout().total) >> 20),
+                        pool.workers(), o.pcie_frac,
+                        o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
+                        (long long) o.conversation_cache_min_free_mib);
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
@@ -4023,10 +4839,11 @@ int main(int argc, char** argv) {
                         const uint64_t b = p.beats.load();
                         if (!p.busy.load() || b != last) { last = b; ticks_at = p.ticks.load(); since = now; continue; }
                         if (now - since < std::chrono::seconds(limit)) continue;
-                        std::fprintf(stderr, "strata serve: no progress for %d s during a request (%s %lld) - stopping "
+                        std::fprintf(stderr, "strata serve: no progress for %d s during a request (%s) - stopping "
                                              "the engine so the server starts it again (issue #29)\n",
-                                     limit, p.where.load(), (long long) p.detail.load());
+                                     limit, stage_text().c_str());
                         stall_report(stderr, p.ticks.load() - ticks_at);
+                        strata::core::release_gpu_waits(stderr);   // #267: no spin kernel outlives the process
                         std::fflush(stderr);
                         std::abort();
                     }
@@ -4236,12 +5053,17 @@ int main(int argc, char** argv) {
             std::array<int64_t, 3> remote_before{};
             std::array<int64_t, 3> launches_before{};
             std::array<uint64_t, 3> compact_before{}, full_before{};
+            // ms_begin/ms_wait are cumulative since boot; the log line used to print them next to per-request deltas,
+            // so the host time read as if it belonged to this request.  Take deltas here like every other column.
+            std::array<double, 3> begin_before{}, wait_before{};
             for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
             {
                 remote_before[(size_t) r] = remote_experts[(size_t) r].computed();
                 launches_before[(size_t) r] = remote_experts[(size_t) r].launched_layers();
                 compact_before[(size_t) r] = remote_experts[(size_t) r].returned_bytes();
                 full_before[(size_t) r] = remote_experts[(size_t) r].full_row_bytes();
+                begin_before[(size_t) r] = remote_experts[(size_t) r].ms_begin();
+                wait_before[(size_t) r] = remote_experts[(size_t) r].ms_wait();
             }
             cur = ids;
             const Clock::time_point r0 = Clock::now();
@@ -4254,20 +5076,10 @@ int main(int argc, char** argv) {
                     if ((int32_t) ids[(size_t) i] != pre[(size_t) i]) return false;
                 return imgs_below(req_imgs, L) == pre_imgs;
             };
-            // the control vector for this request.  The live session and the checkpoints were read one way, so a
-            // switch reads the prompt again from the start
-            if (strata::kernels::cvec().loaded()) {
-                const bool want = req_cvec != 0;
-                if (want != cvec_cached) {
-                    live_ok = false;
-                    checks.clear();
-                    cvec_cached = want;
-                }
-                strata::kernels::cvec_set_enabled(want);
-            }
+            const bool want_cvec = strata::kernels::cvec().loaded() ? req_cvec != 0 : true;
             int64_t resume = 0;
             bool from_live = false;
-            if (o.prompt_cache > 0) {
+            if (o.prompt_cache > 0 && want_cvec == cvec_cached) {
                 if (live_ok && starts_with(live, live_imgs)) { resume = (int64_t) live.size(); from_live = true; }
                 for (const ConvCheckpoint& c : checks)
                     if ((int64_t) c.ids.size() > resume && starts_with(c.ids, c.imgs)) {
@@ -4275,6 +5087,63 @@ int main(int argc, char** argv) {
                         from_live = false;
                     }
             }
+            const auto parked = conversations.best(ids, req_imgs, want_cvec);
+            std::optional<strata::core::SavedConversation> incoming;
+            if (parked.tokens > resume) incoming.emplace(conversations.take(parked.index));
+            // Reject the entire image before parking/overwriting the outgoing
+            // state. Invalid entries can safely fall back to its existing prefix.
+            if (incoming && !strata::core::conversation_snapshot_validate(*incoming, ss, g, mtp.kv_state(), err)) {
+                std::fprintf(stderr, "strata serve: conversation cache: discard invalid snapshot (%s)\n", err.c_str());
+                incoming.reset();
+                err.clear();
+            }
+            // Preserve the outgoing branch before any checkpoint rewind, reset,
+            // or incoming restore overwrites the positional state it requires.
+            if ((!from_live || incoming) && !park_current(incoming ? incoming->bytes() : 0)) {
+                std::printf("ERR %s\n", err.c_str());
+                return 1;
+            }
+            if (incoming) {
+                const auto t0 = Clock::now();
+                if (strata::core::conversation_snapshot_restore(*incoming, ss, g, mtp.kv_state(), err) !=
+                    strata::core::ConversationRestore::restored) {
+                    // Already prevalidated above: a failure here is fatal, never
+                    // permission to decode from a partially restored session.
+                    std::printf("ERR restoring parked conversation: %s\n", err.c_str());
+                    return 1;
+                }
+                if (std::getenv("STRATA_SNAPSHOT_VERIFY") != nullptr) {
+                    uint64_t draft_hash = 0;
+                    if (!strata::core::conversation_kv_verify(incoming->kv.back(), mtp.kv_state(), g,
+                            int64_t(incoming->live.ids.size()), false, draft_hash, err)) {
+                        std::printf("ERR verifying restored draft KV: %s\n", err.c_str());
+                        return 1;
+                    }
+                    std::fprintf(stderr, "strata serve: SNAPSHOT_VERIFY draft=%016llx cells=%lld mode=%d source=%s resident=%lld\n",
+                                 (unsigned long long) draft_hash, (long long) incoming->kv.back().cells,
+                                 mtp.kv_state().kv_mode, "ram",
+                                 (long long) (mtp.kv_state().n_slots * strata::kernels::qsa_real_shapes().page_size));
+                }
+                live = std::move(incoming->live.ids);
+                live_imgs = std::move(incoming->live.imgs);
+                checks = std::move(incoming->checkpoints);
+                cvec_cached = incoming->cvec;
+                resume = parked.tokens;
+                from_live = parked.live;
+                if (std::getenv("STRATA_SNAPSHOT_FULL_CAPTURE") == nullptr)
+                    conversations.retain(std::move(incoming->kv), int64_t(live.size()));
+                incoming.reset(); // Running-state/checkpoint copies are no longer needed.
+                std::fprintf(stderr, "strata serve: conversation cache: restored %lld tokens (%s) in %.1f ms; parked=%zu bytes=%zu\n",
+                             (long long) resume, from_live ? "live" : "checkpoint",
+                             std::chrono::duration<double, std::milli>(Clock::now() - t0).count(),
+                             conversations.size(), conversations.bytes());
+            }
+            if (want_cvec != cvec_cached) {
+                live_ok = false;
+                checks.clear();
+                cvec_cached = want_cvec;
+            }
+            if (strata::kernels::cvec().loaded()) strata::kernels::cvec_set_enabled(want_cvec);
             // this request rewrites every cell from `resume` on, so a checkpoint past it (or not on this prompt's
             // path) no longer has its cells; the ones kept are prefixes of both the old tokens and the new
             checks.erase(std::remove_if(checks.begin(), checks.end(), [&](const ConvCheckpoint& c) {
@@ -4330,6 +5199,7 @@ int main(int argc, char** argv) {
             tr("request", n, geni ? 1 : 0);
             mtp.set_prompt_len(n);
             const int64_t read_from = reread_to > 0 ? 0 : resume;
+            conversations.limit_reuse(read_from);
             pp_total = n;
             pp_from = read_from;
             pp_t0 = r0;
@@ -4381,6 +5251,20 @@ int main(int argc, char** argv) {
                         if (drive.d.failed && drive.d.fail) e = drive.d.fail;
                         return false;
                     }
+                    // STRATA_LOGPOS=<path>: the teacher-forced log-probability of every token read here (every
+                    // token is committed and nxt[t] is the prompt's own next token), appended to <path>; the last
+                    // column is the log-probability of STRATA_LOGPOS_EXTRA (default 248046, <|im_end|>), so the
+                    // end-of-turn mass a chat model puts on raw text can be taken out of the measurement
+                    static std::FILE* logpos = [] {
+                        const char* p = std::getenv("STRATA_LOGPOS");
+                        return p != nullptr ? std::fopen(p, "ab") : nullptr;
+                    }();
+                    static const int32_t logpos_extra = [] {
+                        const char* p = std::getenv("STRATA_LOGPOS_EXTRA");
+                        return p != nullptr ? (int32_t) std::atoi(p) : (int32_t) 248046;
+                    }();
+                    if (logpos != nullptr && !ver.window_logprobs(nxt.data(), T, q, logpos_extra, logpos, e))
+                        return false;
                     if (!ver.commit(T, e) || !mtp.prefill(ver.final_R_all(), nxt.data(), T, q, e)) return false;
                     q += T;
                 }
@@ -4393,76 +5277,75 @@ int main(int argc, char** argv) {
             };
             // the batched path's slots are lent just before its first run and given back (refilled) before a window
             // reads - so the windows always see the whole expert cache - or once the prompt is read
-            std::vector<std::pair<int32_t, int32_t>> lent_now;
-            int64_t lent_chunk = 0;   // the chunk the lent slots hold the prompt path's buffers for
-            auto refill = [&](std::string &e) -> bool {
-                try {
-            if (lent_now.empty()) return true;
-                tr("refill start", (long long) lent_now.size());
-                for (const auto& [i, slot] : lent_now) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
+            // Every participant gives its loan back here: the rows it lent are refilled into the SAME slots from
+            // the arena, the residency table is restored, and one upload puts it on every device.  A stage refills
+            // through its own cache and its own device - a slot refilled into the wrong cache would leave that
+            // stage's cache holding an expert it does not own, which is silent and produces plausible tokens.
+            auto refill_one = [&](PfPart& p, std::string& e) -> bool {
+                if (p.lent.empty()) return true;
+                tr("refill start", (long long) p.lent.size());
+                const strata::core::OnDevice on(p.dev);
+                for (const auto& [i, slot] : p.lent) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
                     const uint8_t* b = srcp->blob(i / g.n_expert, i % g.n_expert);
                     const int64_t nb = (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(i / g.n_expert);
-                    if (b == nullptr || !(refill_blocking() ? xcache.fill_slot_blocking(slot, b, e, nb)
-                                                            : xcache.fill_slot_queued(slot, b, e, nb)))
+                    if (b == nullptr || !(refill_blocking() ? p.cache->fill_slot_blocking(slot, b, e, nb)
+                                                            : p.cache->fill_slot_queued(slot, b, e, nb)))
                         return false;
                     host_res[(size_t) i] = slot;
                 }
-                if (!xcache.sync_queued(e)) return false;
-                dpct::get_in_order_queue()
-                    .memcpy(d_res, host_res.data(),
-                            host_res.size() * sizeof(int32_t))
-                    .wait();
-                lent_now.clear();
-                lent_chunk = 0;
+                if (!p.cache->sync_queued(e)) return false;
+                p.lent.clear();
+                p.lent_chunk = 0;
+                return true;
+            };
+            auto refill = [&](std::string& e) -> bool {
+                bool any = false;
+                for (PfPart& p : pf_parts)
+                    if (!p.lent.empty()) { any = true; if (!refill_one(p, e)) return false; }
+                if (any) res_upload();
                 return true;
-            }
-            catch (sycl::exception const &exc) {
-              std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-                        << ", line:" << __LINE__ << std::endl;
-              std::exit(1);
-            }
             };
             // lend the slots `tokens` batched prompt tokens need: the prompt path's buffers for min(chunk, tokens
-            // rounded up to 256), laid out in the last of the slots it may borrow
-            auto lend = [&](int64_t tokens, std::string &e) -> bool {
-                try {
-            if (lend_first < 0) return true; // its own buffers: nothing to lend
+            // rounded up to 256), laid out in the last of the slots it may borrow - per participant, out of that
+            // participant's own cache, and marking only that participant's own layers
+            auto lend = [&](int64_t tokens, std::string& e) -> bool {
+                if (pf_parts.empty()) return true;                     // its own buffers: nothing to lend
+                // what this segment needs, capped by the configured chunk: a request lends only what its own
+                // prompt needs, so a large chunk costs a short prompt nothing
                 const int64_t want = request_chunk(tokens, o.prefill_chunk);
                 if (want <= 0) {
                     e = "prefill: cannot lend buffers for an empty request segment";
                     return false;
                 }
-                if (!lent_now.empty()) {
-                    if (want <= lent_chunk) return true;
-                    if (!refill(e)) return false;
-                }
-                const int64_t slots = lend_slots(want);
-                if (slots <= 0 || slots > xcache.slots() - lend_first) {
-                    e = "prefill: request-sized buffers exceed the configured lend region";
-                    return false;
-                }
-                const int32_t first = std::max<int32_t>(lend_first, (int32_t) (xcache.slots() - slots));
-                if (want != sp.chunk() || first != lend_first_now) {
-                    if (!sp.relayout(want, xcache.device_slot(first), lend_bytes(first), e)) return false;
-                    lend_first_now = first;
-                }
-                for (size_t i = 0; i < host_res.size(); ++i)
-                    if (host_res[i] >= first) {
-                        lent_now.emplace_back((int32_t) i, host_res[i]);
-                        host_res[i] = strata::core::kNotResident;
+                bool any = false;
+                for (PfPart& p : pf_parts) {
+                    if (p.first < 0) continue;
+                    if (!p.lent.empty()) {
+                        if (want <= p.lent_chunk) continue;            // its current loan already covers this
+                        // ONLY this participant's loan goes back: `refill` would return the other participants'
+                        // loans too, and their buffers are still laid out in their caches - marking those slots
+                        // resident again would hand the next window a prompt buffer in place of an expert
+                        if (!refill_one(p, e)) return false;
                     }
-                dpct::get_in_order_queue()
-                    .memcpy(d_res, host_res.data(),
-                            host_res.size() * sizeof(int32_t))
-                    .wait();
-                lent_chunk = want;
+                    const strata::core::OnDevice on(p.dev);
+                    const int32_t first = std::max<int32_t>(p.first, (int32_t) (p.cache->slots() - part_slots(p, want)));
+                    if (want != p.sp->chunk() || first != p.first_now) {
+                        if (!p.sp->relayout(want, p.cache->device_slot(first), part_bytes(p, first), e)) return false;
+                        p.first_now = first;
+                    }
+                    for (int64_t l = p.lb; l < p.le; ++l)              // THIS participant's layers only
+                        for (int64_t ex = 0; ex < g.n_expert; ++ex) {
+                            const size_t i = (size_t) (l * g.n_expert + ex);
+                            if (host_res[i] >= first) {
+                                p.lent.emplace_back((int32_t) i, host_res[i]);
+                                host_res[i] = strata::core::kNotResident;
+                                any = true;
+                            }
+                        }
+                    p.lent_chunk = want;
+                }
+                if (any) res_upload();
                 return true;
-            }
-            catch (sycl::exception const &exc) {
-              std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-                        << ", line:" << __LINE__ << std::endl;
-              std::exit(1);
-            }
             };
             apply_pending(true);
             // per-request sampling for the verify window's head (greedy when temperature is absent)
@@ -4480,6 +5363,7 @@ int main(int argc, char** argv) {
             req_sp.penalty_present = req_penalty_present;
             req_sp.counter = 0;
             ver.set_sampling(req_sp);
+            mtp.set_draft_sampling(req_sp);   // STRATA_SPEC_COUPLED=1: sampled drafts (a no-op otherwise)
             drive.d.pcie_num = std::max(0, std::min(256, (int) (req_pcie_frac * 256.0 + 0.5)));
             // a layer split: CUDA0's share as asked; a later GPU keeps its own (its link) unless the request sets one
             for (int st = 0; st < split_drive.n; ++st)
@@ -4600,6 +5484,9 @@ int main(int argc, char** argv) {
             double dt_run = 0, dt_commit = 0, dt_draft = 0;
             int64_t dec_windows = 0, dec_T = 0;
             const int64_t decode_hits0 = drive.d.cache_hits;
+            // CS-T: the RAM and file tiers of this request (the mmap source; 0 with the arena)
+            const int64_t ram0 = src.ram_reads(), files0 = src.file_reads();
+            const uint64_t file_bytes0 = src.file_read_bytes();
             const int64_t decode_look0 = drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused;
             if (cancelled) finish = "cancel";
             while (!cancelled && produced_n < max_new) {
@@ -4678,6 +5565,10 @@ int main(int argc, char** argv) {
                 std::fflush(stdout);
                 ++rounds;
                 const Clock::time_point tw2 = Clock::now();
+                // coupled drafts with penalties: the next window's row-0 history (`consumed` holds this window's
+                // commit, outv[a] is its row 0) - the drafts extend it on the device as the verify rows will
+                if (hist_n > 0 && mtp.coupled() && !eos && produced_n < max_new)
+                    mtp.set_draft_history(consumed.data(), (int64_t) consumed.size(), outv[(size_t) a]);
                 const bool drafted = eos || produced_n >= max_new ||
                                      mtp.draft(T, outv.data(), p, a, drafts.data(), err, dprob.data(), (float) req_spec_min_p);
                 {
@@ -4730,20 +5621,39 @@ int main(int argc, char** argv) {
             if (state_hash && live_ok) {
                 // DEBUG: a fingerprint of every part of the session over the positions it holds ([0, L)), and
                 // separately of what lies past them in the last KV page (stale cells, fine unless something reads them)
-                dpct::get_current_device().queues_wait_and_throw();
+                if (DPCT_CHECK_ERROR(
+                        dpct::get_current_device().queues_wait_and_throw()) !=
+                    0) {
+                    std::printf("ERR synchronizing state fingerprint\n");
+                    return 1;
+                }
                 const int64_t L = (int64_t) live.size();
                 const strata::kernels::QsaShapes qs = [&] {
                     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
                     s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_dim = g.idx_key_dim;
                     return s;
                 }();
+                bool hash_ok = true;
+                std::array<uint8_t, 65536> hash_buffer;
                 auto hash_dev = [&](const void *p, size_t bytes, uint64_t h) {
                     try {
-                std::vector<uint8_t> b(bytes);
-                    if (bytes) dpct::get_in_order_queue()
-                        .memcpy(b.data(), p, bytes)
-                        .wait(); // VRAM or a streamed host copy
-                    return fnv1a(b.data(), b.size(), h);
+                for (size_t offset = 0; hash_ok && offset < bytes;) {
+                        const size_t n = std::min(hash_buffer.size(), bytes - offset);
+                        // VRAM or a streamed host copy, with fixed diagnostic workspace.
+                        if (DPCT_CHECK_ERROR(
+                                dpct::get_in_order_queue()
+                                    .memcpy(hash_buffer.data(),
+                                            static_cast<const uint8_t *>(p) +
+                                                offset,
+                                            n)
+                                    .wait()) != 0) {
+                            hash_ok = false;
+                            break;
+                        }
+                        h = fnv1a(hash_buffer.data(), n, h);
+                        offset += n;
+                    }
+                    return h;
                 }
                 catch (sycl::exception const &exc) {
                   std::cerr << exc.what()
@@ -4763,20 +5673,24 @@ int main(int argc, char** argv) {
                         }
                     return h;
                 };
-                const ConvStateSizes z = conv_state_sizes(g);
+                const ConvStateSizes z = conv_state_sizes(g, ss);
                 uint64_t h_gdn = hash_dev(ss.gdn_state, z.gdn, 1469598103934665603ull);
-                if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr) {   // per GDN layer: which one differs first
-                    const size_t per = z.gdn / (size_t) g.n_gdn_layers();
+                if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr && ss.gdn_alloc > 0) {   // per GDN layer: which one differs first
+                    const size_t per = z.gdn / (size_t) ss.gdn_alloc;
                     std::string s;
                     char b[8];
-                    for (int64_t i = 0; i < g.n_gdn_layers(); ++i) {
+                    for (int64_t i = 0; i < ss.gdn_alloc; ++i) {
                         std::snprintf(b, sizeof(b), "%04llx ", (unsigned long long) (hash_dev((const uint8_t*) ss.gdn_state + i * per, per, 1469598103934665603ull) & 0xffff));
                         s += b;
                     }
                     std::fprintf(stderr, "strata serve: STATE_HASH_GDN %s\n", s.c_str());
                 }
-                uint64_t h_ple = hash_dev(ss.ple_hist, z.ple, 1469598103934665603ull);
+                uint64_t h_ple = hash_dev(ss.ple_hist, ss.ple_hist ? z.ple : 0, 1469598103934665603ull);
                 uint64_t h_tail = 1469598103934665603ull, h_pool = h_tail, h_kv = h_tail, h_stale = h_tail;
+                // pooled= keeps its 0.1.29 meaning: the completed rows [0, L / idx_block) only.  pooled_full= adds the
+                // spare row at L / idx_block (the `dead` key the next block completion overwrites), which a
+                // conversation restore writes back; dead= is the spare key itself
+                uint64_t h_dead = h_tail, h_pool_full = h_tail;
                 const int64_t kvb = qs.head_dim, scb = (qs.head_dim / 64) * 2;
                 // a state's K/V arrays and their bytes per (cell, head) row: the host copy when it has one
                 auto kv_arrays = [&](const strata::core::QsaState& st) {
@@ -4789,18 +5703,24 @@ int main(int argc, char** argv) {
                         const int64_t q4b = (int64_t) strata::kernels::kv_q4_bytes_per_head((int) qs.head_dim);
                         a = {{h ? st.host.k_q : st.k_q, kvb}, {h ? st.host.v_q4 : st.v_q4, q4b},
                              {h ? st.host.k_scale : st.k_scale, scb}};
-                    } else {
+                    } else if (st.kv_int8) {
                         a = {{h ? st.host.k_q : st.k_q, kvb}, {h ? st.host.v_q : st.v_q, kvb},
                              {h ? st.host.k_scale : st.k_scale, scb}, {h ? st.host.v_scale : st.v_scale, scb}};
+                    } else {
+                        a = {{h ? st.host.k_pool : st.k_pool, qs.head_dim * 2},
+                             {h ? st.host.v_pool : st.v_pool, qs.head_dim * 2}};
                     }
                     return a;
                 };
                 const int64_t end_cell = std::min<int64_t>(((L + qs.page_size - 1) / qs.page_size) * qs.page_size,
-                                                           ss.qsa_states[0].max_cells);
-                for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
-                    const strata::core::QsaState& st = ss.qsa_states[i];
+                                                           ss.max_cells);   // = the primary state's max_cells
+                for (int64_t j = 0; j < ss.qsa_alloc; ++j) {   // this session's owned QSA ordinals only
+                    const strata::core::QsaState& st = ss.qsa_states[ss.qsa_ord0 + j];
                     h_tail = hash_dev(st.idx_tail, z.tail, h_tail);
+                    h_dead = hash_dev(st.idx_dead, z.dead, h_dead);
                     h_pool = hash_dev(st.idx_pooled, (size_t) (L / qs.idx_block) * qs.idx_dim * 4, h_pool);
+                    h_pool_full = hash_dev(st.idx_pooled, (size_t) (L > 0 ? L / qs.idx_block + 1 : 0) * qs.idx_dim * 4,
+                                           h_pool_full);
                     // KV streaming: the host copy is the identity layout and holds every cell
                     for (const auto& [pool, w] : kv_arrays(st)) {
                         h_kv = hash_cells(pool, w, 0, L, h_kv);
@@ -4812,18 +5732,26 @@ int main(int argc, char** argv) {
                 const int64_t mL = std::min<int64_t>(L, ms.max_cells);
                 for (const auto& [pool, w] : kv_arrays(ms))
                     if (pool != nullptr) h_mtp = hash_cells(pool, w, 0, mL, h_mtp);
+                if (!hash_ok) {
+                    std::printf("ERR reading state fingerprint\n");
+                    return 1;
+                }
                 std::fprintf(stderr, "strata serve: STATE_HASH L=%lld gdn=%016llx ple=%016llx tail=%016llx pooled=%016llx "
-                                     "kv=%016llx mtp=%016llx stale=%016llx ple_prev=%d,%d\n", (long long) L,
+                                     "kv=%016llx mtp=%016llx stale=%016llx dead=%016llx pooled_full=%016llx ple_prev=%d,%d\n", (long long) L,
                              (unsigned long long) h_gdn, (unsigned long long) h_ple, (unsigned long long) h_tail,
                              (unsigned long long) h_pool, (unsigned long long) h_kv, (unsigned long long) h_mtp,
-                             (unsigned long long) h_stale, ss.ple_prev[0], ss.ple_prev[1]);
+                             (unsigned long long) h_stale, (unsigned long long) h_dead,
+                             (unsigned long long) h_pool_full, ss.ple_prev[0], ss.ple_prev[1]);
             }
             const int64_t req_hits = drive.d.cache_hits - decode_hits0;
             const int64_t req_look = (drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused) - decode_look0;
             // DONE <generated> <prompt> <prompt ms> <decode ms> <finish> <drafts accepted> <drafts offered> <reused> [hits] [lookups]
-            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld\n", (long long) produced_n, (long long) n, prompt_ms,
-                        decode_ms, finish, (long long) draft_accepted, (long long) draft_offered, (long long) resume,
-                        (long long) req_hits, (long long) req_look);
+            //      [RAM blobs] [file blobs] [file MB]   (CS-T tiers; appended, so an older server reads the rest)
+            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f\n", (long long) produced_n,
+                        (long long) n, prompt_ms, decode_ms, finish, (long long) draft_accepted, (long long) draft_offered,
+                        (long long) resume, (long long) req_hits, (long long) req_look,
+                        (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
+                        (double) (src.file_read_bytes() - file_bytes0) / 1e6);
             std::fflush(stdout);
             if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
             const int64_t fresh = n - resume;
@@ -4840,6 +5768,19 @@ int main(int argc, char** argv) {
                              100.0 * (double) req_hits / (double) req_look,
                              (long long) req_hits, (long long) req_look);
             }
+            // the resident RAM mode, cumulative: experts read from experts.bin since the copy was made (what the plain
+            // mmap mode reads through the OS file cache, from the SSD when the RAM could not keep it)
+            if (src.complement_ready())
+                std::fprintf(stderr, "strata serve: resident RAM: %.2f GiB of experts in RAM, %lld exchanged with the "
+                                     "VRAM tier, %lld blob reads from the file\n",
+                             (double) src.resident_bytes() / 1073741824.0, (long long) src.exchanges(),
+                             (long long) src.file_reads());
+            // CS-T: the tiers, cumulative - GPU cache hits (the decode lookups above), RAM copy, files (SSD / OS cache)
+            if (srcp == &src)
+                std::fprintf(stderr, "strata serve: expert tiers: GPU %lld hits this request; since the start RAM %lld blobs, files %lld blobs "
+                                     "%.1f MB read%s\n", (long long) req_hits, (long long) src.ram_reads(),
+                             (long long) src.file_reads(), (double) src.file_read_bytes() / 1e6,
+                             src.gguf_mode() ? " (the GGUF in place)" : "");
             // STRATA_SPLIT_TIMING: where each verify stage's host time went, cumulative per window since the start
             // (waiting for its GPU to ring a layer, the CPU pool and plan per layer, staging the window)
             if (static const bool st_timing = std::getenv("STRATA_SPLIT_TIMING") != nullptr; st_timing)
@@ -4850,12 +5791,14 @@ int main(int argc, char** argv) {
                                          "pool + plan %.3f ms, host staging %.3f ms, commit %.3f ms\n", st,
                                  (long long) v.windows, v.ms_wait / w, v.ms_pool / w, v.ms_host / w, v.ms_commit / w);
                 }
-            if (g.n_qsa_layers() > 0 && ss.qsa_states[0].kv_mode == 1) {
+            if (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1) {
                 // KV streaming, cumulative over the process: blocks the selections named vs blocks read from RAM
+                // (this device's owned ordinals; a split's other stages hold theirs)
                 uint64_t miss = 0, look = 0;
                 bool over = false;
-                for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
-                    const strata::kernels::KvStreamCounters c = strata::kernels::kv_stream_counters(ss.qsa_states[i].map);
+                for (int64_t j = 0; j < ss.qsa_alloc; ++j) {
+                    const strata::kernels::KvStreamCounters c =
+                        strata::kernels::kv_stream_counters(ss.qsa_states[ss.qsa_ord0 + j].map);
                     miss += c.misses; look += c.lookups; over = over || c.overflow;
                 }
                 std::fprintf(stderr, "strata serve: KV streaming: %.2f%% of %llu block reads hit VRAM, %.1f MiB read "
@@ -4869,12 +5812,13 @@ int main(int argc, char** argv) {
             for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
                 std::fprintf(stderr, "strata serve: CUDA%d: %lld expert entries, %lld active layer launches, %.1f MiB returned "
                                      "(%.1f MiB with full rows) in this request; host %.0f ms staging+launching, %.0f ms "
-                                     "waiting for it (since start)\n", r + 1,
+                                     "waiting for it in this request\n", r + 1,
                              (long long) (remote_experts[(size_t) r].computed() - remote_before[(size_t) r]),
                              (long long) (remote_experts[(size_t) r].launched_layers() - launches_before[(size_t) r]),
                              (double) (remote_experts[(size_t) r].returned_bytes() - compact_before[(size_t) r]) / 1048576.0,
                              (double) (remote_experts[(size_t) r].full_row_bytes() - full_before[(size_t) r]) / 1048576.0,
-                             remote_experts[(size_t) r].ms_begin(), remote_experts[(size_t) r].ms_wait());
+                             remote_experts[(size_t) r].ms_begin() - begin_before[(size_t) r],
+                             remote_experts[(size_t) r].ms_wait() - wait_before[(size_t) r]);
         }
         // SYCL port: the requests are done and their output written; leave without unwinding the GPU objects (the OS
         // reclaims them). Their destructors ran against a runtime already shutting down and aborted (exit 139).
@@ -5211,7 +6155,8 @@ int main(int argc, char** argv) {
         // The sampled-token synchronization also completes every captured QSA
         // status readback. Retain one status per layer so a later layer cannot
         // hide an earlier failure; no extra synchronization or token allocation.
-        if (o.native_flash_attn_short) for (int64_t i = 0; i < g.n_qsa_layers(); ++i) {
+        if (o.native_flash_attn_short) for (int64_t j = 0; j < ss.qsa_alloc; ++j) {
+            const int64_t i = ss.qsa_ord0 + j;   // the global ordinal, as the session's carve names it
             const int32_t status = ss.qsa_states[i].host_step[strata::kernels::kStepCount];
             if (status != 0) {
                 std::fprintf(stderr, "strata generate: native attention status %d at QSA layer %lld, position %lld\n",
@@ -5299,6 +6244,7 @@ int main(int argc, char** argv) {
         }
         mem_mark("the verifier and the drafter's binding");
         ver.set_sampling(sp);   // the CLI's own sampling (until 0.1.19 this loop was always greedy); no penalties here
+        if (use_mtp) mtp.set_draft_sampling(sp);   // STRATA_SPEC_COUPLED=1: sampled drafts (a no-op otherwise)
         ver.set_split(o.spec_split);
         // auto: the copy kernel for every pack.  DMA (the native packs' default until 0.1.13) has the host call
         // cudaMemcpyAsync + cudaLaunchHostFunc inside a verify window while the GPU spins on the flag they raise;
@@ -5310,6 +6256,10 @@ int main(int argc, char** argv) {
         if (drive.d.pcie_num < 0) drive.d.pcie_num = 0;
         if (drive.d.pcie_num > 256) drive.d.pcie_num = 256;
         const int64_t pcie0 = drive.d.pcie_experts;
+        // CS-T: the file tier since the decode began (the prompt path's copies are before this)
+        const int64_t files0 = src.file_reads(), ram0 = src.ram_reads();
+        const uint64_t fbytes0 = src.file_blob_bytes(), fall0 = src.file_read_bytes();
+        const double fms0 = src.file_ms();
         if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
         int64_t swaps_total = 0;
         double ms_adapt = 0;
@@ -5336,6 +6286,7 @@ int main(int argc, char** argv) {
             else if (adapt_ev->get_info<
                          sycl::info::event::command_execution_status>() !=
                      sycl::info::event_command_status::complete) return;
+            src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
             for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
             pending.clear();
             if (d_res != nullptr)
@@ -5384,6 +6335,10 @@ int main(int argc, char** argv) {
             }
             std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
             if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
+            if (!resident_stage_swaps(src, xcache, host_res, g.n_expert, swaps, adapt_stream)) {
+                std::fprintf(stderr, "strata generate: an adaptive refill failed (copying evicted experts back)\n");
+                return false;
+            }
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
                 const int32_t slot = host_res[out];
@@ -5590,6 +6545,26 @@ int main(int argc, char** argv) {
         if (rounds > 0 && !drive.d.usage.empty())
             std::printf("%-24s %lld experts swapped into the VRAM tier (every %d rounds, %.3f ms/round)\n", "adaptive tier",
                         (long long) swaps_total, o.adapt_every, ms_adapt / rounds);
+        if (src.complement_ready())
+            std::printf("%-24s %.2f GiB of experts in RAM, %lld exchanged with the VRAM tier, %lld blob reads from "
+                        "the file\n", "resident RAM", (double) src.resident_bytes() / 1073741824.0,
+                        (long long) src.exchanges(), (long long) src.file_reads());
+        if (srcp == &src) {  // CS-T: the RAM and file tiers (the GPU cache's share is the hit rate above)
+            const double fms = src.file_ms() - fms0, fmb = (double) (src.file_blob_bytes() - fbytes0) / 1e6;
+            std::printf("%-24s decode: RAM %lld blobs, files %lld blobs, %.1f MB read from the files (%.2f MB/round, "
+                        "%.1f ms/round of reading, %.2f GB/s per reading thread)%s; prompt copies %.1f MB\n",
+                        "expert tiers", (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
+                        fmb, rounds > 0 ? fmb / rounds : 0.0, rounds > 0 ? fms / rounds : 0.0,
+                        fms > 0 ? fmb / fms : 0.0, src.gguf_mode() ? " (the GGUF in place)" : "",
+                        (double) (fall0 - fbytes0) / 1e6);
+            if (drive.d.lookahead != nullptr)
+                std::printf("%-24s %lld experts warmed, %lld of the file tier's %lld blob reads had been warmed (%.1f%%); "
+                            "predictor %.1f ms/round on its thread, %lld layers skipped (still busy)\n", "routing prefetch",
+                            (long long) src.warmed(), (long long) src.warmed_hits(),
+                            (long long) (src.file_reads() - files0),
+                            src.file_reads() > files0 ? 100.0 * (double) src.warmed_hits() / (double) (src.file_reads() - files0) : 0.0,
+                            rounds > 0 ? drive.d.lookahead->busy_ms() / rounds : 0.0, (long long) drive.d.lookahead->skipped());
+        }
         if (rounds > 0 && drive.d.pcie_num > 0)
             std::printf("%-24s %.2f distinct experts per layer read over PCIe (share %d/256 of the misses)\n",
                         "pcie experts", (double) (drive.d.pcie_experts - pcie0) / (double) (rounds * g.n_layers),
@@ -5788,3 +6763,8 @@ int main(int argc, char** argv) {
     sycl::free(arena, dpct::get_in_order_queue());
     return 0;
 }
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 17ebf1dd9ed..cb786c27828 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -41,7 +41,9 @@ def all_sources():
     edit(rel, sub(r"^(\s*)cudaGraphUpload\(\w+, \w+\);", r"\1// no cudaGraphUpload on SYCL: a finalized command_graph is already resident", re.M))
     # __fadd_rn / __float_as_uint spellings
     for _ in range(3):   # nested __fadd_rn(__fadd_rn(a, b), c)
-        edit(rel, sub(r"__fadd_rn\((\([^()]*\)|[^,()]+),\s*([^()]+)\)", r"(\1 + \2)"))
+        # the second operand parenthesised: `__fadd_rn(sum, c ? x : y)` must not become `(sum + c ? x : y)`
+        # (2026-10-01: it did, in the QSA indexer's pooled sum and the QSA block scores - the sum was replaced, not added)
+        edit(rel, sub(r"__fadd_rn\((\([^()]*\)|[^,()]+),\s*([^()]+)\)", r"(\1 + (\2))"))
     edit(rel, lambda s: s.replace("__float_as_uint(", "sycl::bit_cast<uint32_t>("))
     # 4. volatile casts on kernel arguments (the kernels take plain pointers).
     edit(rel, lambda s: s.replace("(const volatile sycl::float4 *)", "(const sycl::float4 *)"))
@@ -86,7 +88,17 @@ def doorbell(s):
                   "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) {}")
     s = s.replace("    while (strata::sys_load(flag) < value) /* spin (no __nanosleep on SYCL) */;",
                   "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) {}")
+    # upstream 0.1.31 spells the waits `while (*flag ...) strata_spin_pause();` and the ring with 4-space indent:
+    # same treatment (system-scope loads/stores, bounded: an unbounded orphaned spin wedges the B70's GT)
+    s = s.replace("    *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;", "    strata::sys_store(seq, strata::sys_load(seq) + 1u);")
+    s = s.replace("    while (*flag != want) strata_spin_pause();",
+                  "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) != want; ++spin) strata_spin_pause();")
+    s = s.replace("    while (*flag < value) strata_spin_pause();",
+                  "    for (uint32_t spin = 0; spin < strata::kSpinMax && strata::sys_load(flag) < value; ++spin) strata_spin_pause();")
     return s
+# 0.1.31: dp4a.hpp's spin pause is __nanosleep, which SYCL lacks: the bounded spin (kSpinMax) is the backoff
+edit("include/strata/kernels/dp4a.hpp", lambda s: s.replace("    __nanosleep(100);\n",
+     "    // SYCL port: no __nanosleep; the doorbell waits are bounded by strata::kSpinMax instead\n"))
 edit("src/kernels/cuda/elementwise.dp.cpp", doorbell)
 edit("src/kernels/cuda/verify_kernels.dp.cpp", doorbell)
 
@@ -181,6 +193,11 @@ def untangle_tables(s):
 #     make the launchers that have no in-kernel fallback refuse the device (their callers then use the older
 #     kernels, exactly as on a pre-Ampere card). The XMX joint_matrix versions are phase-4 follow-up work.
 OFF = "#if 0   // SYCL: inline PTX (mma/ldmatrix/cp.async) - the XMX port is pending; see tools/fixups.py"
+# 0.1.31: a Turing m16n8k8 branch (`#elif !STRATA_PA_SM80`) with its own inline PTX; dpct's DPCT_COMPATIBILITY_TEMP
+# selects it on SYCL. Unreachable there (qsa_prompt_attn_batch refuses the device), so it compiles to nothing.
+edit("src/kernels/cuda/qsa_prompt_attn.dp.cpp", lambda s: s.replace(
+    '#elif !STRATA_PA_SM80\n    asm volatile("mma.sync.aligned.m16n8k8',
+    '#elif 0   // SYCL: Turing\'s m16n8k8 PTX (unreachable: the launcher refuses this device)\n    asm volatile("mma.sync.aligned.m16n8k8'))
 ON = "#if 1   // SYCL: the scalar path (the PTX one above is not ported yet)"
 for rel in ["src/kernels/cuda/qsa_prompt_attn.dp.cpp", "src/kernels/cuda/qsa_select.dp.cpp",
             "src/kernels/cuda/native_qsa_score.dp.cpp"]:

From 3ed36e0aadf324dcfa9c6ab36a79d1724e7cc145 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 11:31:00 -0500
Subject: [PATCH 051/201] docs/INTEL.md: lanes per row of the expert kernels
 measured per verify round (no difference)

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 0fb6d97abbb..072b0ed20ca 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -496,6 +496,9 @@ part of the procedure now: it caught a dropped mirror hook and four doorbell wai
 - **Upstream's new kernels against the port's on the B70** (decode tok/s, Coder 19 / 2,184-token prompts, IQ2_XS
   19): port defaults 78.1 / 75.7 / 58.6; `STRATA_EXPERT_SPLIT=1` 65.6-69.5 / 67.2 / 49.1 (-11 to -16%);
   `STRATA_GR_V3=1` 73.2 / 72.4 (-4 to -6%). Both stay opt-in.
+- **Lanes per row of the port's expert kernels** (`STRATA_GU_LANES` / `STRATA_DOWN_LANES`, 4/8/16/32 at run time):
+  gate/up 8 or 16 x down 4 or 8 all decode in 37.7-38.6 ms per verify round (2 runs each, Coder, both prompts); tok/s
+  differences between them are draft acceptance (each split rounds differently). The default (8 / 8) stays.
 - **Speed after the merge:** Coder 78.2 / 75.7 tok/s (as before), IQ2_XS 58.6 / 64.2 (from 50.8 / 60.6).
 - **Still failing:** `iq_multi_parity` on IQ2_XS (type 17: the port's mmvq disagrees with the reference, old and new
   kernel alike; no model here uses it), `s2_expert_grouped_parity` (the s2 path), `kv_hybrid_parity`'s last step

From 46b366b19fad145f4d5475f244892d7f99c0fb29 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 14:56:20 -0500
Subject: [PATCH 052/201] sycl: parity tests wait like cudaMemcpy; drain the
 refill ring in long prompts

- fixups.py: default-queue memcpy/memset in the parity tests first waits for
  all device queues (cudaMemcpy's legacy-stream semantics), applied to every
  src/kernels/*_parity.cpp
- generate.cpp: the post-prompt refill loops sync the queued copies every 256
  entries so the ring cannot wrap over in-flight slots
- kv_hybrid_parity: enable STRATA_PROMPT_ATTN_XMX (step 5 needs the XMX path)

Tested on the B70: build clean; qsa_parity, gr_parity OK.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/src/kernels/bf16_gemv_parity.cpp         | 14 +--
 sycl/src/kernels/cvec_parity.cpp              |  4 +-
 sycl/src/kernels/dequant_s2_parity.cpp        |  6 +-
 sycl/src/kernels/elementwise_parity.cpp       | 36 +++----
 sycl/src/kernels/gdn_parity.cpp               | 46 ++++-----
 sycl/src/kernels/gr_parity.cpp                | 90 ++++++++---------
 sycl/src/kernels/iq_multi_parity.cpp          | 42 ++++----
 sycl/src/kernels/iq_parity.cpp                | 10 +-
 sycl/src/kernels/kv_hybrid_parity.cpp         | 42 ++++----
 sycl/src/kernels/kv_q4_parity.cpp             | 28 +++---
 sycl/src/kernels/kv_q8_parity.cpp             | 30 +++---
 sycl/src/kernels/kv_stream_parity.cpp         | 32 +++---
 sycl/src/kernels/ple_parity.cpp               | 98 +++++++++----------
 sycl/src/kernels/qsa_parity.cpp               | 40 ++++----
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |  6 +-
 sycl/src/kernels/quantize_act_parity.cpp      | 14 +--
 sycl/src/kernels/rope_parity.cpp              | 46 ++++-----
 sycl/src/kernels/router_top10_parity.cpp      |  6 +-
 sycl/src/kernels/s2_expert_grouped_parity.cpp | 18 ++--
 sycl/src/kernels/s2_gemv_parity.cpp           |  8 +-
 sycl/src/kernels/s2_gemv_q8_parity.cpp        | 14 +--
 sycl/src/kernels/s_gemv_parity.cpp            | 32 +++---
 sycl/src/kernels/s_gemv_q8k_parity.cpp        | 38 +++----
 sycl/src/kernels/sampler_parity.cpp           | 38 +++----
 sycl/src/kernels/shared_expert_parity.cpp     | 58 +++++------
 sycl/src/program/generate.cpp                 | 11 +++
 sycl/tools/fixups.py                          |  9 ++
 27 files changed, 420 insertions(+), 396 deletions(-)

diff --git a/sycl/src/kernels/bf16_gemv_parity.cpp b/sycl/src/kernels/bf16_gemv_parity.cpp
index 519c7618cfe..0ac26df4c8a 100644
--- a/sycl/src/kernels/bf16_gemv_parity.cpp
+++ b/sycl/src/kernels/bf16_gemv_parity.cpp
@@ -108,7 +108,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(),
                                                                  x.size() * 2).wait()),
               "cx");
         /*
@@ -117,23 +117,23 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_w, w.data(),
                                                                  w.size() * 2).wait()),
               "cw");
 
         std::vector<float> naive((size_t) s.n_out), warp((size_t) s.n_out), split((size_t) s.n_out);
         strata::kernels::bf16_gemv(d_x, d_w, d_y, s.n_in, s.n_out, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(naive.data(), d_y, naive.size() * 4)
                                    .wait()),
               "cy1");
         strata::kernels::bf16_gemv_split(d_x, d_w, d_y, s.n_in, s.n_out, 32, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(warp.data(), d_y, warp.size() * 4)
                                    .wait()),
               "cy2");
         strata::kernels::bf16_gemv_split(d_x, d_w, d_y, s.n_in, s.n_out, 256, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(split.data(), d_y, split.size() * 4)
                                    .wait()),
               "cy3");
@@ -163,13 +163,13 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       d_x, x.data(), x.size() * 2).wait()),
                   "cx2");
             std::vector<float> rival((size_t) s.n_out);
             strata::kernels::bf16_gemv(d_x, d_w, d_y, s.n_in, s.n_out, nullptr);
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(rival.data(), d_y, rival.size() * 4)
                           .wait()),
                   "cy4");
diff --git a/sycl/src/kernels/cvec_parity.cpp b/sycl/src/kernels/cvec_parity.cpp
index c944913800c..189d8e8b446 100644
--- a/sycl/src/kernels/cvec_parity.cpp
+++ b/sycl/src/kernels/cvec_parity.cpp
@@ -44,14 +44,14 @@ pageable, call wait() on event return by memcpy API to ensure synchronization
 behavior.
 */
 void up(T *d, const std::vector<T> &h) {
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d, h.data(), h.size() * sizeof(T)).wait()),
        "up");
 }
 template <typename T>
 std::vector<T> down(const T* d, size_t n) {
     std::vector<T> h(n);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h.data(), d, n * sizeof(T))
                             .wait()),
        "down");
diff --git a/sycl/src/kernels/dequant_s2_parity.cpp b/sycl/src/kernels/dequant_s2_parity.cpp
index 0d43eaa074e..442f62ba01c 100644
--- a/sycl/src/kernels/dequant_s2_parity.cpp
+++ b/sycl/src/kernels/dequant_s2_parity.cpp
@@ -92,7 +92,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
@@ -101,7 +101,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
 
@@ -109,7 +109,7 @@ int main(int argc, char** argv) {
 
     std::vector<float> gpu(cpu.size());
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(gpu.data(), d_out, gpu.size() * sizeof(float))
                   .wait()),
           "copy back");
diff --git a/sycl/src/kernels/elementwise_parity.cpp b/sycl/src/kernels/elementwise_parity.cpp
index 85f7493d43c..54f07ca316a 100644
--- a/sycl/src/kernels/elementwise_parity.cpp
+++ b/sycl/src/kernels/elementwise_parity.cpp
@@ -115,7 +115,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_a, alpha.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_a, alpha.data(), n * 4).wait()),
               "ca");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -124,7 +124,7 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_dt, dt.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_dt, dt.data(), n * 4).wait()),
               "cd");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -133,11 +133,11 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_sa, a.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_sa, a.data(), n * 4).wait()),
               "cs");
         strata::kernels::gdn_gate(d_a, d_dt, d_sa, d_g, 1, H_V, nullptr);
         std::vector<float> got((size_t) n);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_g, n * 4)
                                    .wait()),
               "cg");
@@ -212,11 +212,11 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(), n * 4).wait()),
               "csx");
         strata::kernels::silu_inplace(d_x, n, nullptr);
         std::vector<float> got((size_t) n);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_x, n * 4)
                                    .wait()),
               "csg");
@@ -249,11 +249,11 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(d_x, x.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(), n * 4).wait()),
               "cex");
         strata::kernels::scale_inplace(d_x, n, s, nullptr);
         std::vector<float> got((size_t) n);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_x, n * 4)
                                    .wait()),
               "ceg");
@@ -266,7 +266,7 @@ int main(int argc, char** argv) {
         std::vector<uint16_t> h((size_t) n);
         check(
             DPCT_CHECK_ERROR(
-                dpct::get_in_order_queue().memcpy(h.data(), d_h, n * 2).wait()),
+                (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(h.data(), d_h, n * 2).wait()),
             "ceh");
         int hbad = 0;
         for (int i = 0; i < n; ++i)
@@ -344,7 +344,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(),
                                                                  x.size() * 4).wait()),
               "c rmsx");
         /*
@@ -353,12 +353,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_w, w.data(),
                                                                  w.size() * 4).wait()),
               "c rmsw");
         strata::kernels::rms_norm_weighted(d_x, d_w, rows, cols, eps, nullptr);
         std::vector<float> got((size_t) (rows * cols));
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_x, got.size() * 4)
                                    .wait()),
               "c rmsg");
@@ -392,11 +392,11 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(),
                                                                  x.size() * 4).wait()),
               "c rmsx2");
         strata::kernels::rms_norm_weighted(d_x, nullptr, rows, cols, eps, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_x, got.size() * 4)
                                    .wait()),
               "c rmsn");
@@ -647,11 +647,11 @@ int main(int argc, char** argv) {
         to ensure synchronization behavior.
         */
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(dx, bits.data(), n * 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, bits.data(), n * 4).wait()),
               "bf16 cx");
         strata::kernels::f32_to_bf16_bulk(dx, dy, (int64_t) n, nullptr);
         std::vector<uint16_t> got(n);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), dy, n * 2)
                                    .wait()),
               "bf16 cy");
@@ -681,7 +681,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(db, blk.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(db, blk.data(),
                                                                  blk.size()).wait()),
               "q8 cblk");
         strata::kernels::dequant_bf16(8, db, 0, 2, 32, dq, nullptr);
@@ -691,7 +691,7 @@ int main(int argc, char** argv) {
         std::vector<uint16_t> q(64);
         check(
             DPCT_CHECK_ERROR(
-                dpct::get_in_order_queue().memcpy(q.data(), dq, 64 * 2).wait()),
+                (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(q.data(), dq, 64 * 2).wait()),
             "q8 cout");
         int dq_wrong = 0;
         for (int j = 0; j < 32; ++j) {
diff --git a/sycl/src/kernels/gdn_parity.cpp b/sycl/src/kernels/gdn_parity.cpp
index c749c07f14e..16f48228733 100644
--- a/sycl/src/kernels/gdn_parity.cpp
+++ b/sycl/src/kernels/gdn_parity.cpp
@@ -188,7 +188,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_st, st_dev.data(), st_dev.size() * 4).wait()),
               "cst");
         /*
@@ -197,7 +197,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_q, q.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_q, q.data(),
                                                                  q.size() * 4).wait()),
               "cq");
         /*
@@ -206,7 +206,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_k, k.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_k, k.data(),
                                                                  k.size() * 4).wait()),
               "ck");
         /*
@@ -215,7 +215,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_v, v.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_v, v.data(),
                                                                  v.size() * 4).wait()),
               "cv");
         /*
@@ -224,7 +224,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_g, gate.data(), gate.size() * 4).wait()),
               "cg");
         /*
@@ -233,7 +233,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_b, beta.data(), beta.size() * 4).wait()),
               "cb");
 
@@ -241,12 +241,12 @@ int main(int argc, char** argv) {
         strata::kernels::gdn_step(d_st, d_q, d_k, d_v, d_g, d_b, d_o, sh, nullptr);
 
         std::vector<float> got_o((size_t) h_v * S), got_st(st_dev.size());
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got_o.data(), d_o, got_o.size() * 4)
                                    .wait()),
               "cgo");
         check(
-            DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                  .memcpy(got_st.data(), d_st, got_st.size() * 4)
                                  .wait()),
             "cgst");
@@ -280,7 +280,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       d_st, zero.data(), zero.size() * 4).wait()),
                   "z0");
             /*
@@ -289,7 +289,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       d_g, zg.data(), zg.size() * 4).wait()),
                   "z1");
             /*
@@ -298,12 +298,12 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       d_b, zb.data(), zb.size() * 4).wait()),
                   "z2");
             strata::kernels::gdn_step(d_st, d_q, d_k, d_v, d_g, d_b, d_o, sh, nullptr);
             std::vector<float> zz(zero.size());
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(zz.data(), d_st, zz.size() * 4)
                                        .wait()),
                   "z3");
@@ -401,7 +401,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_cs, cs.data(), cs.size() * 4).wait()),
               "ccs");
         /*
@@ -410,7 +410,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(),
                                                                  x.size() * 4).wait()),
               "ccx");
         /*
@@ -419,17 +419,17 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_w, kW.data(), kW.size() * 4).wait()),
               "ccw");
         strata::kernels::gdn_conv_step(d_cs, d_x, d_w, d_o, C, dc, nullptr);
         std::vector<float> got((size_t) C), got_cs(cs.size());
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_o, got.size() * 4)
                                    .wait()),
               "cgo");
         check(
-            DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                  .memcpy(got_cs.data(), d_cs, got_cs.size() * 4)
                                  .wait()),
             "cgs");
@@ -483,12 +483,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_x, x.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x, x.data(),
                                                                  x.size() * 4).wait()),
               "lcx");
         strata::kernels::gdn_l2_norm(d_x, rows, cols, eps, nullptr);
         std::vector<float> got(x.size());
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_x, got.size() * 4)
                                    .wait()),
               "lcg");
@@ -534,7 +534,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_o, o.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_o, o.data(),
                                                                  o.size() * 4).wait()),
               "nco");
         /*
@@ -543,7 +543,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_z, z.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_z, z.data(),
                                                                  z.size() * 4).wait()),
               "ncz");
         /*
@@ -552,12 +552,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_sn, sn.data(), sn.size() * 4).wait()),
               "ncs");
         strata::kernels::gdn_out_norm(d_o, d_z, d_sn, d_y, hv2, S2, eps, nullptr);
         std::vector<float> got(y_ref.size());
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_y, got.size() * 4)
                                    .wait()),
               "ncy");
diff --git a/sycl/src/kernels/gr_parity.cpp b/sycl/src/kernels/gr_parity.cpp
index 3df9764c73b..b1ff5d5b629 100644
--- a/sycl/src/kernels/gr_parity.cpp
+++ b/sycl/src/kernels/gr_parity.cpp
@@ -203,7 +203,7 @@ int scalar_activation_contract() {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_R, ones, sizeof(ones)).wait()),
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_R, ones, sizeof(ones)).wait()),
           "scalar upload R");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -211,7 +211,7 @@ int scalar_activation_contract() {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_weights, weights,
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_weights, weights,
                                                              sizeof(weights)).wait()),
           "scalar upload weights");
     dpct::queue_ptr stream;
@@ -231,7 +231,7 @@ int scalar_activation_contract() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_norm, gammas, sizeof(gammas)).wait()),
               "scalar upload norm");
         float mixed_by_mode[3][2] = {}, inject_by_mode[3] = {};
@@ -270,12 +270,12 @@ int scalar_activation_contract() {
             check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
                   "scalar replay");
             check(DPCT_CHECK_ERROR(stream->wait()), "scalar replay sync");
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(mixed_by_mode[mode], d_mixed,
                                                2 * sizeof(float))
                                        .wait()),
                   "scalar mixed copy");
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(&inject_by_mode[mode], d_inject,
                                                sizeof(float))
                                        .wait()),
@@ -304,7 +304,7 @@ int scalar_activation_contract() {
 
             const float sentinel = -73.25f;
             check(
-                DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                      .memcpy(d_inject, &sentinel, sizeof(float))
                                      .wait()),
                 "scalar sentinel");
@@ -314,12 +314,12 @@ int scalar_activation_contract() {
             check(DPCT_CHECK_ERROR(stream->wait()), "scalar final mixer sync");
             float final_mixed[2] = {}, untouched = 0.0f;
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(final_mixed, d_mixed, sizeof(final_mixed))
                           .wait()),
                   "scalar final mixed");
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(&untouched, d_inject, sizeof(float))
                           .wait()),
                   "scalar sentinel copy");
@@ -395,7 +395,7 @@ int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const ui
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_r, r.data(), r.size() * sizeof(float)).wait()),
           "multi copy R");
     /*
@@ -404,7 +404,7 @@ int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const ui
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_bo, bo.data(), bo.size() * sizeof(float)).wait()),
           "multi copy bo");
     /*
@@ -413,7 +413,7 @@ int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const ui
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_inj, inj.data(), inj.size() * sizeof(float)).wait()),
           "multi copy inj");
 
@@ -447,27 +447,27 @@ int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const ui
         s.rs.resize((size_t) T * HC);
         s.inject.resize((size_t) T * HC);
         s.mixed.resize((size_t) T * N);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(s.r_out.data(), d_r_out,
                                            s.r_out.size() * sizeof(float))
                                    .wait()),
               "multi read R_out");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(s.lo.data(), d_lo, s.lo.size() * sizeof(float))
                       .wait()),
               "multi read lo");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(s.rs.data(), d_rs, s.rs.size() * sizeof(float))
                       .wait()),
               "multi read rs");
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(s.inject.data(), d_inj_out,
                                            s.inject.size() * sizeof(float))
                                    .wait()),
               "multi read inject");
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(s.mixed.data(), d_mixed,
                                            s.mixed.size() * sizeof(float))
                                    .wait()),
@@ -682,7 +682,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_R, R.data(), R.size() * sizeof(float)).wait()),
           "c R");
     /*
@@ -691,7 +691,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_norm, w_norm.data(), w_norm.size() * sizeof(float)).wait()),
           "c norm");
     /*
@@ -700,7 +700,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_down, q_down.data(), q_down.size() * sizeof(uint16_t)).wait()),
           "c down");
     /*
@@ -709,7 +709,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_up, q_up.data(), q_up.size() * sizeof(uint16_t)).wait()),
           "c up");
     /*
@@ -718,7 +718,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_inj, q_inject.data(), q_inject.size() * sizeof(uint16_t)).wait()),
           "c inj");
 
@@ -733,12 +733,12 @@ int main(int argc, char** argv) {
     strata::kernels::gr_workspace_init(sh, d_ws_raw, ws);
     strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
     std::vector<float> got_mixed((size_t) n_embd), got_inject((size_t) hc);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(got_mixed.data(), d_mixed,
                                        got_mixed.size() * sizeof(float))
                                .wait()),
           "c mixed");
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(got_inject.data(), d_inject,
                                        got_inject.size() * sizeof(float))
                                .wait()),
@@ -808,12 +808,12 @@ int main(int argc, char** argv) {
         strata::kernels::gr_set_fp32_activations(true);
         strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(gm.data(), d_mixed, gm.size() * sizeof(float))
                       .wait()),
               "FP32 mixed");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(gi.data(), d_inject, gi.size() * sizeof(float))
                       .wait()),
               "FP32 inject");
@@ -825,12 +825,12 @@ int main(int argc, char** argv) {
         if (!ok) ++bad;
         strata::kernels::gr_read(d_R, d_norm, d_down, d_up, d_inj, eps, sh, ws, d_mixed, d_inject, nullptr);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(gm.data(), d_mixed, gm.size() * sizeof(float))
                       .wait()),
               "restored mixed");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(gi.data(), d_inject, gi.size() * sizeof(float))
                       .wait()),
               "restored inject");
@@ -865,7 +865,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_down_bad, tr_down.data(), tr_down.size() * 2).wait()),
               "cb d");
         /*
@@ -874,7 +874,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_up_bad, tr_up.data(), tr_up.size() * 2).wait()),
               "cb u");
         std::vector<float> bad_mixed((size_t) n_embd);
@@ -885,7 +885,7 @@ int main(int argc, char** argv) {
             "m bad");
         strata::kernels::gr_read(d_R, d_norm, d_down_bad, d_up_bad, d_inj, eps, sh, ws, d_bad, d_inject,
                                  nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(bad_mixed.data(), d_bad,
                                            bad_mixed.size() * sizeof(float))
                                    .wait()),
@@ -902,13 +902,13 @@ int main(int argc, char** argv) {
 
     // ---- the FINAL mixer passes w_inject = nullptr, and then nothing may be written
     float sentinel = -12345.0f;
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(d_inject, &sentinel, sizeof(float))
                                .wait()),
           "c sentinel");
     strata::kernels::gr_read(d_R, d_norm, d_down, d_up, nullptr, eps, sh, ws, d_mixed, d_inject, nullptr);
     float after = 0.0f;
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(&after, d_inject, sizeof(float))
                                .wait()),
           "c after");
@@ -939,7 +939,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_Rw, R.data(), R.size() * sizeof(float)).wait()),
           "c Rw");
     /*
@@ -948,7 +948,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_bo, block_out.data(), block_out.size() * sizeof(float)).wait()),
           "c bo");
     /*
@@ -957,13 +957,13 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_zi, zero_inj.data(), zero_inj.size() * sizeof(float)).wait()),
           "c zi");
 
     strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
     std::vector<float> got_write((size_t) hc_dim);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(got_write.data(), d_outw,
                                        got_write.size() * sizeof(float))
                                .wait()),
@@ -1014,11 +1014,11 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_zi, inj.data(), inj.size() * sizeof(float)).wait()),
           "c inj2");
     strata::kernels::gr_write(d_Rw, d_bo, d_zi, sh, d_outw, nullptr);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(got_write.data(), d_outw,
                                        got_write.size() * sizeof(float))
                                .wait()),
@@ -1095,7 +1095,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   dR, rR.data(), rR.size() * 4).wait()),
               "crR");
         /*
@@ -1104,7 +1104,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   dN, rnorm.data(), rnorm.size() * 4).wait()),
               "crN");
         /*
@@ -1113,7 +1113,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   dD, qd.data(), qd.size() * 2).wait()),
               "crD");
         /*
@@ -1122,7 +1122,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   dU, qu.data(), qu.size() * 2).wait()),
               "crU");
         /*
@@ -1131,7 +1131,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   dJ, qi.data(), qi.size() * 2).wait()),
               "crJ");
 
@@ -1147,11 +1147,11 @@ int main(int argc, char** argv) {
             select_activation_mode(mode);
             strata::kernels::gr_read(dR, dN, dD, dU, dJ, eps, rsh, rws, dM, dI, nullptr);
             std::vector<float> gm((size_t) rn), gi((size_t) rhc);
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(gm.data(), dM, gm.size() * 4)
                                        .wait()),
                   "cgm");
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(gi.data(), dI, gi.size() * 4)
                                        .wait()),
                   "cgi");
diff --git a/sycl/src/kernels/iq_multi_parity.cpp b/sycl/src/kernels/iq_multi_parity.cpp
index 0e9e4426b15..8707d4de53a 100644
--- a/sycl/src/kernels/iq_multi_parity.cpp
+++ b/sycl/src/kernels/iq_multi_parity.cpp
@@ -46,7 +46,7 @@ T* dalloc(size_t n) {
                             n * sizeof(T) + 256, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 256).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 256).wait()),
        "memset");
     return p;
 }
@@ -118,13 +118,13 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(dw, w.data(), w.size()).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dw, w.data(), w.size()).wait()),
        "w");
     // the double reference's weights: the GPU dequantizer (iq_parity checks it against gguf-py)
     float* dwf = dalloc<float>((size_t) n_out * n_in);
     k::iq_dequant_f32(t, dw, (int64_t) n_out * n_in, dwf, s);
     std::vector<float> wf((size_t) n_out * n_in);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(wf.data(), dwf, wf.size() * 4)
                             .wait()),
        "wf");
@@ -138,14 +138,14 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait()),
        "x");
     const size_t xq_bytes = (size_t) max_cols * (n_in / 32) * 36;
     uint8_t* dxq = dalloc<uint8_t>(xq_bytes);
     k::quantize_q8_1_rows(dx, max_cols, n_in, dxq, s);
     std::vector<uint8_t> xq(xq_bytes);
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(xq.data(), dxq, xq_bytes).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(xq.data(), dxq, xq_bytes).wait()),
        "xq");
     const auto xd = dequant_q8_1(xq, (size_t) max_cols * n_in);
     float* dy_old = dalloc<float>((size_t) max_cols * n_out);
@@ -155,11 +155,11 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
     int bad = 0;
     double worst = 0.0;
     for (int nc : cols) {
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memset(dy_old, 0xFF, y_old.size() * 4)
                                 .wait()),
            "memset");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memset(dy_new, 0xFF, y_new.size() * 4)
                                 .wait()),
            "memset");
@@ -168,11 +168,11 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
         k::iq_set_old_kernels(false);
         k::iq_mmvq(t, dw, dxq, dy_new, n_in, n_out, nc, s);
         ck(DPCT_CHECK_ERROR(s->wait()), "sync");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(y_old.data(), dy_old, y_old.size() * 4)
                                 .wait()),
            "y_old");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(y_new.data(), dy_new, y_new.size() * 4)
                                 .wait()),
            "y_new");
@@ -249,7 +249,7 @@ struct Grouped {
             by memcpy API to ensure synchronization behavior.
             */
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue().memcpy(db, b.data(), b.size()).wait()),
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(db, b.data(), b.size()).wait()),
                "blob");
             blobs.push_back(db);
             ptr.push_back((unsigned long long) db);
@@ -265,7 +265,7 @@ struct Grouped {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(dptr, ptr.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dptr, ptr.data(),
                                                               ptr.size() * 8).wait()),
            "ptr");
         /*
@@ -274,11 +274,11 @@ struct Grouped {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                dstart, start.data(), start.size() * 4).wait()),
            "start");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(dn, &n_groups, 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dn, &n_groups, 4).wait()),
            "n");
         if (n_ent) {
             /*
@@ -287,7 +287,7 @@ struct Grouped {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    ddst, dst.data(), dst.size() * 4).wait()),
                "dst");
             /*
@@ -296,7 +296,7 @@ struct Grouped {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    dtok, tok.data(), tok.size() * 4).wait()),
                "tok");
         }
@@ -309,7 +309,7 @@ struct Grouped {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait()),
            "x");
         dxq = dalloc<uint8_t>((size_t) tokens * (H / 32) * 36);
         dscr = dalloc<uint8_t>(k::native_expert_scratch_bytes(cap_ent, FF));
@@ -336,12 +336,12 @@ struct Grouped {
         k::iq_set_old_kernels(false);
     }
     std::vector<float> result(bool old, dpct::queue_ptr s) {
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memset(dout, 0xFF, out_floats * 4)
                                 .wait()),
            "memset"); // NaN rows: must stay NaN where nothing writes
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memset(dscr, 0,
                            k::native_expert_scratch_bytes(cap_ent, L.n_ff))
                    .wait()),
@@ -349,7 +349,7 @@ struct Grouped {
         run(old, s);
         ck(DPCT_CHECK_ERROR(s->wait()), "sync");
         std::vector<float> o(out_floats);
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(o.data(), dout, o.size() * 4)
                                 .wait()),
            "out");
@@ -411,7 +411,7 @@ void bench(dpct::queue_ptr s, std::mt19937 &rng) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(dw, w.data(), w.size()).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dw, w.data(), w.size()).wait()),
            "w");
         const auto x = random_x((size_t) 8 * n_in, rng);
         float* dx = dalloc<float>(x.size());
@@ -422,7 +422,7 @@ void bench(dpct::queue_ptr s, std::mt19937 &rng) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait()),
            "x");
         uint8_t* dxq = dalloc<uint8_t>((size_t) 8 * (n_in / 32) * 36);
         k::quantize_q8_1_rows(dx, 8, n_in, dxq, s);
diff --git a/sycl/src/kernels/iq_parity.cpp b/sycl/src/kernels/iq_parity.cpp
index 25c83b3c12f..1405d9ed500 100644
--- a/sycl/src/kernels/iq_parity.cpp
+++ b/sycl/src/kernels/iq_parity.cpp
@@ -65,12 +65,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(dw, raw.data(), raw.size()).wait();
+        (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dw, raw.data(), raw.size()).wait();
         double dq_err = 0.0;
         if (strata::kernels::iq_supported(type) && ((size_t) rows * cols) % 256 == 0) {
             strata::kernels::iq_dequant_f32(type, dw, (int64_t) rows * cols, dq, s);
             std::vector<float> got(ref.size());
-            dpct::get_in_order_queue()
+            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                 .memcpy(got.data(), dq, got.size() * 4)
                 .wait();
             double num = 0, den = 0;
@@ -99,7 +99,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        dpct::get_in_order_queue().memcpy(dx, x.data(), x.size() * 4).wait();
+        (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait();
         strata::kernels::quantize_q8_1_rows(dx, MC, cols, xq, s);
         std::vector<float> y((size_t) MC * rows), yn(y.size());
         int multi_bad = 0;
@@ -108,13 +108,13 @@ int main(int argc, char** argv) {
                 strata::kernels::native_mmvq(type, dw, (const uint8_t*) xq + (size_t) c * cols / 32 * 36,
                                              dy + (size_t) c * rows, cols, rows, 1, s);
             s->wait();
-            dpct::get_in_order_queue()
+            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                 .memcpy(y.data(), dy, y.size() * 4)
                 .wait();
             for (int nc = 2; nc <= MC; ++nc) {
                 strata::kernels::native_mmvq(type, dw, xq, dy, cols, rows, nc, s);
                 s->wait();
-                dpct::get_in_order_queue()
+                (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                     .memcpy(yn.data(), dy, yn.size() * 4)
                     .wait();
                 if (strata::kernels::native_mmvq_multi_exact() &&
diff --git a/sycl/src/kernels/kv_hybrid_parity.cpp b/sycl/src/kernels/kv_hybrid_parity.cpp
index 73ea80caa4c..cfcde58c08a 100644
--- a/sycl/src/kernels/kv_hybrid_parity.cpp
+++ b/sycl/src/kernels/kv_hybrid_parity.cpp
@@ -43,7 +43,7 @@ template <typename T> T* dalloc(size_t n) {
                             n * sizeof(T) + 64, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 64).wait()),
        "memset");
     return p;
 }
@@ -84,6 +84,10 @@ void quantize_block_q4_0_host(const float* x, k::block_q4_0& blk) {
 }  // namespace
 
 int main() {
+    // SYCL port: qsa_prompt_attn's tensor-core (mma.sync PTX) kernel is not ported; on SYCL the prompt attention this
+    // test's last step checks exists as the XMX kernel (opt-in in the engine, where the FP32 fallback is faster).
+    // Test the kernel the port has, unless the caller chose (STRATA_PROMPT_ATTN_XMX=0 shows the refusal).
+    setenv("STRATA_PROMPT_ATTN_XMX", "1", 0);
     std::printf("=== Running kv_hybrid_parity test ===\n");
     k::QsaShapes s = k::qsa_real_shapes();
     s.page_size = 64;
@@ -103,7 +107,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_table, table.data(), pages * 4).wait()),
        "table");
 
     std::vector<float> K((size_t) cells * H * D), V((size_t) cells * H * D);
@@ -152,12 +156,12 @@ int main() {
     int append_bad = 0, gather_bad = 0;
     for (int c = 0; c < cells; ++c) {
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(d_kcur, &K[(size_t)c * H * D], (size_t)H * D * 4)
                    .wait()),
            "kcur");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(d_vcur, &V[(size_t)c * H * D], (size_t)H * D * 4)
                    .wait()),
            "vcur");
@@ -170,7 +174,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_step, step, sizeof step).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_step, step, sizeof step).wait()),
            "step");
         // exactly what qsa_layer's hybrid branch does
         k::fwht256_inplace_cuda(d_vcur, H, nullptr);
@@ -189,15 +193,15 @@ int main() {
     std::vector<int8_t> hk((size_t) cells * H * D);
     std::vector<uint16_t> hks((size_t) cells * H * G);
     std::vector<uint8_t> hv4((size_t) cells * H * q4_row);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hk.data(), d_kq, hk.size())
                             .wait()),
        "kq");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hks.data(), d_ks, hks.size() * 2)
                             .wait()),
        "ks");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hv4.data(), d_v4, hv4.size())
                             .wait()),
        "v4");
@@ -232,7 +236,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_ids, ids.data(), cells * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_ids, ids.data(), cells * 4).wait()),
        "ids");
     int32_t step[k::kStepCount];
     k::qsa_step_fill(step, cells - 1, s);
@@ -244,7 +248,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_step, step, sizeof step).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_step, step, sizeof step).wait()),
        "step2");
     uint16_t *d_ksc = dalloc<uint16_t>((size_t) cells * H * D), *d_vsc = dalloc<uint16_t>((size_t) cells * H * D);
     k::kv_gather_q8_step(d_kq, d_kq, d_ks, d_ks, d_table, d_ids, d_step, cells, s, d_ksc, d_ksc, nullptr);
@@ -252,11 +256,11 @@ int main() {
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "gather sync");
     std::vector<uint16_t> h_ksc((size_t) cells * H * D), h_vsc((size_t) cells * H * D);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_ksc.data(), d_ksc, h_ksc.size() * 2)
                             .wait()),
        "ksc");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_vsc.data(), d_vsc, h_vsc.size() * 2)
                             .wait()),
        "vsc");
@@ -285,7 +289,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_q, q.data(), q.size() * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_q, q.data(), q.size() * 4).wait()),
        "q");
     k::QsaAttnPools pools;
     pools.k_q = d_kq; pools.k_scale = d_ks; pools.v_q4 = d_v4; pools.page_table = d_table;
@@ -296,7 +300,7 @@ int main() {
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "attn sync");
     std::vector<float> h_attn((size_t) QH * D);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_attn.data(), d_attn, h_attn.size() * 4)
                             .wait()),
        "attn");
@@ -349,7 +353,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_q2, q2.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_q2, q2.data(),
                                                               q2.size() * 4).wait()),
            "q2");
         // the batched kernel indexes ids[z * cap + ...]: one FULL selection per query
@@ -362,7 +366,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_ids2, ids2.data(), ids2.size() * 4).wait()),
            "ids2");
         int32_t* d_steps2 = dalloc<int32_t>(nq * k::kStepCount);
@@ -376,7 +380,7 @@ int main() {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_steps2 + i * k::kStepCount, st2, sizeof st2).wait()),
                "steps2");
         }
@@ -387,7 +391,7 @@ int main() {
         ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
            "attn2 sync");
         std::vector<float> h_at2((size_t) nq * QH * D);
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(h_at2.data(), d_at2, h_at2.size() * 4)
                                 .wait()),
            "at2");
@@ -454,7 +458,7 @@ int main() {
                "at4 sync");
             std::vector<float> h_at4((size_t) QH * D);
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(h_at4.data(), d_at4, h_at4.size() * 4)
                        .wait()),
                "at4");
diff --git a/sycl/src/kernels/kv_q4_parity.cpp b/sycl/src/kernels/kv_q4_parity.cpp
index 13d823f152d..61d43df4ae5 100644
--- a/sycl/src/kernels/kv_q4_parity.cpp
+++ b/sycl/src/kernels/kv_q4_parity.cpp
@@ -37,7 +37,7 @@ T* dalloc(size_t n) {
                             n * sizeof(T) + 64, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 64).wait()),
        "memset");
     return p;
 }
@@ -121,7 +121,7 @@ int main() {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_src, h_in.data(), h_in.size() * sizeof(float)).wait()),
        "memcpy H2D");
 
@@ -131,7 +131,7 @@ int main() {
 
     std::vector<float> h_out(n_vectors * 256);
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue()
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                .memcpy(h_out.data(), d_dst, h_out.size() * sizeof(float))
                .wait()),
        "memcpy D2H");
@@ -153,7 +153,7 @@ int main() {
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "fwht256_inplace_cuda");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue()
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                .memcpy(h_out.data(), d_dst, h_out.size() * sizeof(float))
                .wait()),
        "memcpy D2H");
@@ -218,7 +218,7 @@ int main() {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_table, table.data(), pages * sizeof(int32_t)).wait()),
        "memcpy table");
 
@@ -257,7 +257,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep)).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_step, hstep, sizeof(hstep)).wait()),
            "memcpy step");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -265,7 +265,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_kcur, kv.data(), kv.size() * sizeof(float)).wait()),
            "memcpy k");
         /*
@@ -274,7 +274,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_vcur, vv.data(), vv.size() * sizeof(float)).wait()),
            "memcpy v");
 
@@ -285,11 +285,11 @@ int main() {
 
     // Verify written Q4_0 blocks bitwise against host quantizer
     std::vector<uint8_t> h_k_q4(pool_bytes), h_v_q4(pool_bytes);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_k_q4.data(), d_k_q4, pool_bytes)
                             .wait()),
        "memcpy d2h k_q4");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_v_q4.data(), d_v_q4, pool_bytes)
                             .wait()),
        "memcpy d2h v_q4");
@@ -356,7 +356,7 @@ int main() {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_ids, ids.data(), max_ids * sizeof(int32_t)).wait()),
        "memcpy ids");
 
@@ -368,7 +368,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_step, hstep, sizeof(hstep)).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_step, hstep, sizeof(hstep)).wait()),
        "memcpy step");
 
     k::kv_gather_q4_step(d_k_q4, d_v_q4, d_table, d_ids, d_step, max_ids, s, d_k_scratch, d_v_scratch, nullptr);
@@ -377,12 +377,12 @@ int main() {
 
     std::vector<uint16_t> h_k_scratch((size_t) max_ids * H * D);
     std::vector<uint16_t> h_v_scratch((size_t) max_ids * H * D);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_k_scratch.data(), d_k_scratch,
                                     h_k_scratch.size() * sizeof(uint16_t))
                             .wait()),
        "memcpy d2h k_scratch");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h_v_scratch.data(), d_v_scratch,
                                     h_v_scratch.size() * sizeof(uint16_t))
                             .wait()),
diff --git a/sycl/src/kernels/kv_q8_parity.cpp b/sycl/src/kernels/kv_q8_parity.cpp
index 2655b6df4cd..fbc86113c01 100644
--- a/sycl/src/kernels/kv_q8_parity.cpp
+++ b/sycl/src/kernels/kv_q8_parity.cpp
@@ -38,7 +38,7 @@ T *dalloc(size_t n) {
                             n * sizeof(T) + 64, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 64).wait()),
        "memset");
     return p;
 }
@@ -60,7 +60,7 @@ int main() {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_table, table.data(), pages * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_table, table.data(), pages * 4).wait()),
        "table");
     int8_t *kq = dalloc<int8_t>((size_t) cells * H * D), *vq = dalloc<int8_t>((size_t) cells * H * D);
     uint16_t *ks = dalloc<uint16_t>((size_t) cells * H * G), *vs = dalloc<uint16_t>((size_t) cells * H * G);
@@ -89,7 +89,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(step, hstep, sizeof hstep).wait()),
            "step");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -97,7 +97,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(kcur, kv.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(kcur, kv.data(),
                                                               kv.size() * 4).wait()),
            "k");
         /*
@@ -106,7 +106,7 @@ int main() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(vcur, vv.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(vcur, vv.data(),
                                                               vv.size() * 4).wait()),
            "v");
         k::kv_append_q8_step(kq, vq, ks, vs, d_table, step, kcur, vcur, s, nullptr);
@@ -117,19 +117,19 @@ int main() {
     // 1. codes and scales bitwise vs the host reference
     std::vector<int8_t> hkq((size_t) cells * H * D), hvq(hkq.size());
     std::vector<uint16_t> hks((size_t) cells * H * G), hvs(hks.size());
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hkq.data(), kq, hkq.size())
                             .wait()),
        "d2h");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hvq.data(), vq, hvq.size())
                             .wait()),
        "d2h");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hks.data(), ks, hks.size() * 2)
                             .wait()),
        "d2h");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(hvs.data(), vs, hvs.size() * 2)
                             .wait()),
        "d2h");
@@ -171,7 +171,7 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_ids, ids.data(), n_ids * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_ids, ids.data(), n_ids * 4).wait()),
            "ids");
         int32_t hstep[k::kStepCount] = {0, 0, 0, n_ids};
         /*
@@ -181,26 +181,26 @@ int main() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, hstep, sizeof hstep).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(step, hstep, sizeof hstep).wait()),
            "step");
         k::kv_gather_q8_step(kq, vq, ks, vs, d_table, d_ids, step, max_ids, s, k8, v8, nullptr);
         k::kv_gather_step(kp, vp, d_table, d_ids, step, max_ids, s, k16, v16, nullptr);
         ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
            "gather");
         std::vector<uint16_t> a8((size_t) n_ids * H * D), b8(a8.size()), a16(a8.size()), b16(a8.size());
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(a8.data(), k8, a8.size() * 2)
                                 .wait()),
            "d2h");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(b8.data(), v8, b8.size() * 2)
                                 .wait()),
            "d2h");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(a16.data(), k16, a16.size() * 2)
                                 .wait()),
            "d2h");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(b16.data(), v16, b16.size() * 2)
                                 .wait()),
            "d2h");
diff --git a/sycl/src/kernels/kv_stream_parity.cpp b/sycl/src/kernels/kv_stream_parity.cpp
index 1c5e087b0ee..9ab9c99a5c2 100644
--- a/sycl/src/kernels/kv_stream_parity.cpp
+++ b/sycl/src/kernels/kv_stream_parity.cpp
@@ -43,7 +43,7 @@ template <typename T> T* dalloc(size_t n) {
                             n * sizeof(T) + 64, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 64).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 64).wait()),
        "memset");
     return p;
 }
@@ -141,7 +141,7 @@ bool run(int fmt) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ident, t.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(ident, t.data(),
                                                               n_blocks * 4).wait()),
            "ident");
     }
@@ -178,7 +178,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(kc, hk.data(), hk.size() * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(kc, hk.data(), hk.size() * 4).wait()),
            "k");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -187,7 +187,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(vc, hv.data(), hv.size() * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(vc, hv.data(), hv.size() * 4).wait()),
            "v");
         /*
         DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
@@ -196,7 +196,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(step, st, sizeof(st)).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(step, st, sizeof(st)).wait()),
            "step");
         append(ref, ident, step, kc, vc, s, fmt, nullptr);
         append(slots, m.page_table, step, kc, vc, s, fmt, &host.p);
@@ -220,7 +220,7 @@ bool run(int fmt) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(ids, hids.data(),
                                                               hids.size() * 4).wait()),
            "ids");
         /*
@@ -229,7 +229,7 @@ bool run(int fmt) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(steps, hst.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(steps, hst.data(),
                                                               hst.size() * 4).wait()),
            "steps");
         /*
@@ -239,7 +239,7 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(q, hq.data(), hq.size() * 4).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(q, hq.data(), hq.size() * 4).wait()),
            "q");
         k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, n_q, nullptr);
         k::kv_stream_resolve(m, slots.attn(m.page_table), host.p, fmt, ids, steps, n_q, cap, s, nullptr);
@@ -247,12 +247,12 @@ bool run(int fmt) {
         ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
            "batch");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(a.data(), out_ref, (size_t)n_q * NH * D * 4)
                    .wait()),
            "a");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(b2.data(), out_str, (size_t)n_q * NH * D * 4)
                    .wait()),
            "b");
@@ -260,11 +260,11 @@ bool run(int fmt) {
             if (bad++ < 5) std::fprintf(stderr, "  %s pos %lld n_q %d: streamed attention differs\n", name, (long long) pos, n_q);
         }
         // the map inverts itself
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(pt.data(), m.page_table, n_blocks * 4)
                                 .wait()),
            "pt");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(sb.data(), m.slot_block, n_slots * 4)
                                 .wait()),
            "sb");
@@ -303,7 +303,7 @@ bool run(int fmt) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(ids, hids.data(),
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(ids, hids.data(),
                                                               hids.size() * 4).wait()),
            "ids");
         /*
@@ -313,17 +313,17 @@ bool run(int fmt) {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(steps, hst.data(), 16).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(steps, hst.data(), 16).wait()),
            "steps");
         k::qsa_decode_attn_batch(q, ref.attn(ident), ids, steps, cap, s, scratch, out_ref, 1, nullptr);
         k::qsa_decode_attn_batch(q, ring.attn(rt), ids, steps, cap, s, scratch, out_str, 1, nullptr);
         ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
            "ring");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(a.data(), out_ref, (size_t)NH * D * 4)
                                 .wait()),
            "a");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(b2.data(), out_str, (size_t)NH * D * 4)
                                 .wait()),
            "b");
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
index 10cfefaf3d2..66997602c0c 100644
--- a/sycl/src/kernels/ple_parity.cpp
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -196,12 +196,12 @@ int history_advance_regression() {
            norm_storage = sycl::malloc_device<float>(
                (channels + 2 * guard), dpct::get_in_order_queue())),
        "history norm allocation");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memset(history_storage, 0xa5,
                                     (count + 2 * guard) * sizeof(float))
                             .wait()),
        "history guard init");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memset(norm_storage, 0xa5,
                                     (channels + 2 * guard) * sizeof(float))
                             .wait()),
@@ -214,7 +214,7 @@ int history_advance_regression() {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            history, expected.data(), count * sizeof(float)).wait()),
        "history initial values");
     dpct::queue_ptr stream;
@@ -256,7 +256,7 @@ int history_advance_regression() {
            "history captured advance");
         ck(DPCT_CHECK_ERROR(stream->wait()), "history captured advance sync");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(actual.data(), history, count * sizeof(float))
                    .wait()),
            "history readback");
@@ -273,12 +273,12 @@ int history_advance_regression() {
     if (!overlap_refused || !null_refused) ++bad;
     auto guard_ok = [&](float* storage, size_t payload) {
         uint8_t before[64], after[64];
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(before, storage, sizeof(before))
                                 .wait()),
            "history prefix guard");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue()
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                    .memcpy(after, storage + guard + payload, sizeof(after))
                    .wait()),
            "history suffix guard");
@@ -770,7 +770,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
        "cnk");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
@@ -779,7 +779,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
        "cnq");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
@@ -788,7 +788,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
        "cnc");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
@@ -796,7 +796,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_kc, key_codes.data(), key_codes.size()).wait()),
        "ckc");
     /*
@@ -805,7 +805,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_vb, value_bf16.data(), value_bf16.size() * 2).wait()),
        "cvb");
     /*
@@ -814,7 +814,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_c1, conv1d_f16.data(), conv1d_f16.size() * 2).wait()),
        "cc1");
 
@@ -836,7 +836,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_ks, key_scales.data(), key_scales.size() * 4).wait()),
        "cks");
     w.key_scales = d_ks;
@@ -866,7 +866,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_emb, cap.emb.data() + (size_t)t * nd, nd * 4).wait()),
            "cemb");
         /*
@@ -875,7 +875,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_hid, cap.hidden.data() + (size_t)t * hcd, hcd * 4).wait()),
            "chid");
         /*
@@ -884,7 +884,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                d_hist, hist_state.data(), (size_t)k::NG_HIST * hcd * 4).wait()),
            "chist");
         k::PleOut out{};
@@ -899,7 +899,7 @@ int main(int argc, char** argv) {
     if (t == 0) {
         const size_t bytes = (size_t) k::ple_block_scratch_bytes();
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memset(ple_ws, 0xa5, bytes).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(ple_ws, 0xa5, bytes).wait()),
            "PLE prelaunch guard sentinel");
         const struct AliasCase { float* k::PleOut::* field; size_t offset; } cases[] = {
             {&k::PleOut::key, 0}, {&k::PleOut::value, hcd}, {&k::PleOut::gate, hcd + nd},
@@ -917,7 +917,7 @@ int main(int argc, char** argv) {
         ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
            "PLE guard no-launch sync");
         std::vector<uint8_t> sentinel(bytes);
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(sentinel.data(), ple_ws, bytes)
                                 .wait()),
            "PLE guard sentinel readback");
@@ -930,31 +930,31 @@ int main(int argc, char** argv) {
     k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "ple_block sync");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_key.data(), d_ck, hcd * 4)
                                 .wait()),
            "rck");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_value.data(), d_cv, nd * 4)
                                 .wait()),
            "rcv");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_gate.data(), d_g, k::NG_HC * 4)
                                 .wait()),
            "rg");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_gated.data(), d_gd, hcd * 4)
                                 .wait()),
            "rgd");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_norm.data(), d_nm, hcd * 4)
                                 .wait()),
            "rnm");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_conv.data(), d_co, hcd * 4)
                                 .wait()),
            "rco");
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memcpy(dev_res.data(), d_cr, hcd * 4)
                                 .wait()),
            "rcr");
@@ -1015,7 +1015,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_emb, witness.data(), nd * sizeof(float)).wait()),
                "native PLE witness");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
@@ -1024,7 +1024,7 @@ int main(int argc, char** argv) {
                "legacy PLE witness sync");
             std::vector<float> legacy_value(nd);
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(legacy_value.data(), d_cv, nd * sizeof(float))
                        .wait()),
                "legacy PLE witness value");
@@ -1040,12 +1040,12 @@ int main(int argc, char** argv) {
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, stream);
             ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE sync");
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(native_value.data(), d_cv, nd * sizeof(float))
                        .wait()),
                "native PLE value");
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(native_result.data(), d_cr, hcd * sizeof(float))
                        .wait()),
                "native PLE result");
@@ -1075,7 +1075,7 @@ int main(int argc, char** argv) {
                "native PLE replay");
             ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE replay sync");
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(replay.data(), d_cr, hcd * sizeof(float))
                        .wait()),
                "native PLE replay result");
@@ -1094,7 +1094,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_emb, cap.emb.data(), nd * sizeof(float)).wait()),
                "restore PLE embedding");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
@@ -1102,7 +1102,7 @@ int main(int argc, char** argv) {
                    dpct::get_current_device().queues_wait_and_throw()),
                "restored PLE sync");
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(replay.data(), d_cr, hcd * sizeof(float))
                        .wait()),
                "restored PLE result");
@@ -1136,11 +1136,11 @@ int main(int argc, char** argv) {
                                     hcd * 4, dpct::get_in_order_queue())),
                "native PLE raw projection");
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memset(native_storage, 0xa5, native_bytes + 2 * guard)
                        .wait()),
                "native PLE weight guards");
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                     .memset(q_storage, 0xa5, qbytes + 2 * guard)
                                     .wait()),
                "native PLE q8 guards");
@@ -1152,7 +1152,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    native_data, native_key.data(), native_bytes).wait()),
                "native PLE weights upload");
             k::PleWeights nw = w;
@@ -1166,7 +1166,7 @@ int main(int argc, char** argv) {
                    stream = dpct::get_current_device().create_queue(true)),
                "native PLE key stream");
             const size_t workspace_bytes = (size_t) k::ple_block_scratch_bytes();
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                     .memset(ple_ws, 0xa5, workspace_bytes)
                                     .wait()),
                "native PLE no-launch sentinel");
@@ -1190,7 +1190,7 @@ int main(int argc, char** argv) {
             ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE refusal sync");
             std::vector<uint8_t> sentinel(workspace_bytes);
             ck(DPCT_CHECK_ERROR(
-                   dpct::get_in_order_queue()
+                   (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                        .memcpy(sentinel.data(), ple_ws, workspace_bytes)
                        .wait()),
                "native PLE refusal sentinel");
@@ -1208,13 +1208,13 @@ int main(int argc, char** argv) {
                 pageable memory. If the memory is not pageable, call wait() on
                 event return by memcpy API to ensure synchronization behavior.
                 */
-                ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                        d_emb, cap.emb.data() + (size_t)p * nd, nd * 4).wait()),
                    "native PLE key input");
                 k::native_q2_0_f32(native_data, d_emb, native_q, raw_projection, k::NG_N_EMBD, k::NG_HC_DIM, 1, stream);
                 ck(DPCT_CHECK_ERROR(stream->wait()), "native PLE raw key sync");
                 ck(DPCT_CHECK_ERROR(
-                       dpct::get_in_order_queue()
+                       (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                            .memcpy(projected.data(), raw_projection, hcd * 4)
                            .wait()),
                    "native PLE raw key read");
@@ -1228,12 +1228,12 @@ int main(int argc, char** argv) {
                 ck(DPCT_CHECK_ERROR(stream->wait()),
                    "native PLE key direct sync");
                 ck(DPCT_CHECK_ERROR(
-                       dpct::get_in_order_queue()
+                       (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                            .memcpy(actual_key.data(), d_ck, hcd * 4)
                            .wait()),
                    "native PLE key read");
                 ck(DPCT_CHECK_ERROR(
-                       dpct::get_in_order_queue()
+                       (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                            .memcpy(actual_result.data(), d_cr, hcd * 4)
                            .wait()),
                    "native PLE result read");
@@ -1263,7 +1263,7 @@ int main(int argc, char** argv) {
                     ck(DPCT_CHECK_ERROR(stream->wait()),
                        "native PLE key replay sync");
                     ck(DPCT_CHECK_ERROR(
-                           dpct::get_in_order_queue()
+                           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(replay.data(), d_cr, hcd * 4)
                                .wait()),
                        "native PLE key replay read");
@@ -1279,12 +1279,12 @@ int main(int argc, char** argv) {
                 const void* storage = b == 0 ? native_storage : q_storage;
                 const size_t payload = b == 0 ? native_bytes : qbytes;
                 std::vector<uint8_t> ends(2 * guard);
-                ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                         .memcpy(ends.data(), storage, guard)
                                         .wait()),
                    "native PLE prefix guard");
                 ck(DPCT_CHECK_ERROR(
-                       dpct::get_in_order_queue()
+                       (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                            .memcpy(ends.data() + guard,
                                    static_cast<const uint8_t *>(storage) +
                                        guard + payload,
@@ -1305,14 +1305,14 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_emb, cap.emb.data(), nd * 4).wait()),
                "native PLE restore input");
             k::ple_block(d_emb, d_hid, d_hist, w, out, ple_ws, nullptr);
             ck(DPCT_CHECK_ERROR(
                    dpct::get_current_device().queues_wait_and_throw()),
                "native PLE default restore sync");
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                     .memcpy(replay.data(), d_cr, hcd * 4)
                                     .wait()),
                "native PLE default restore read");
@@ -1338,13 +1338,13 @@ int main(int argc, char** argv) {
                    dpct::get_current_device().queues_wait_and_throw()),
                "compact PLE sync");
             std::vector<float> compact_norm(hcd), compact_result(hcd);
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                     .memcpy(compact_norm.data(),
                                             compact.normalized,
                                             hcd * sizeof(float))
                                     .wait()),
                "compact PLE normalized");
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                     .memcpy(compact_result.data(), d_hid,
                                             hcd * sizeof(float))
                                     .wait()),
@@ -1359,7 +1359,7 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_hid, cap.hidden.data(), hcd * sizeof(float)).wait()),
                "restore PLE hidden input");
             sycl::free(compact_workspace, dpct::get_in_order_queue());
diff --git a/sycl/src/kernels/qsa_parity.cpp b/sycl/src/kernels/qsa_parity.cpp
index 9aaf02cbdad..0da7ce0d178 100644
--- a/sycl/src/kernels/qsa_parity.cpp
+++ b/sycl/src/kernels/qsa_parity.cpp
@@ -98,13 +98,13 @@ struct Dev {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   p, v.data(), v.size() * sizeof(T)).wait()),
               "H2D");
     }
     std::vector<T> get(size_t n) const {
         std::vector<T> v(n);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(v.data(), p, n * sizeof(T))
                                    .wait()),
               "D2H");
@@ -585,7 +585,7 @@ int main(int argc, char** argv) {
         strata::kernels::QsaIndexerBuffers bufs{dtail.p, ddead.p, dpooled.p, dblockpos.p};
         Dev<float> draw((size_t) IDXD);
         for (int64_t t = 0; t < NT; ++t) {      // one cell at a time: the tail is a ring and the spare row MOVES
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(draw.p,
                                                &raw_flat[(size_t)t * IDXD],
                                                (size_t)IDXD * 4)
@@ -594,7 +594,7 @@ int main(int argc, char** argv) {
             const int32_t tpos = (int32_t) t;
             check(
                 DPCT_CHECK_ERROR(
-                    dpct::get_in_order_queue().memcpy(dpos.p, &tpos, 4).wait()),
+                    (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dpos.p, &tpos, 4).wait()),
                 "pos");
             strata::kernels::indexer_key_append(draw.p, dpos.p, POS_BASE, dw_kn.p, EPS, bufs, S, dcos.p, dsin.p,
                                                 nullptr);
@@ -1059,13 +1059,13 @@ int main(int argc, char** argv) {
         Dev<float> draw((size_t) IDXD);
         strata::kernels::QsaIndexerBuffers bufs{dptail.p, dpdead.p, dpp.p, dblockpos2.p};
         for (int64_t t = 0; t < T; ++t) {
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(draw.p, &praw[(size_t)t * IDXD],
                                                (size_t)IDXD * 4)
                                        .wait()),
                   "raw");
             const int32_t tpos = (int32_t) t;
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(dpos2.p, &tpos, 4)
                                        .wait()),
                   "pos2");
@@ -1389,13 +1389,13 @@ int main(int argc, char** argv) {
         // replay A: cells 0..3, which completes block 0
         for (int t = 0; t < 4; ++t) {
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(raw2d.p, &raw2[(size_t)t * IDXD2], IDXD2 * 4)
                           .wait()),
                   "r2");
             const int32_t tp = t;
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue().memcpy(pos2.p, &tp, 4).wait()),
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(pos2.p, &tp, 4).wait()),
                   "p2");
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().ext_oneapi_graph(*ex2)),
                   "launchA");
@@ -1405,13 +1405,13 @@ int main(int argc, char** argv) {
         // replay B: cells 4..7 through the SAME graph, which completes block 1
         for (int t = 4; t < 8; ++t) {
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(raw2d.p, &raw2[(size_t)t * IDXD2], IDXD2 * 4)
                           .wait()),
                   "r3");
             const int32_t tp = t;
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue().memcpy(pos2.p, &tp, 4).wait()),
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(pos2.p, &tp, 4).wait()),
                   "p3");
             check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().ext_oneapi_graph(*ex2)),
                   "launchB");
@@ -1494,7 +1494,7 @@ int main(int argc, char** argv) {
             for (Dev<float>* dp : {&pooledA, &deadA, &tailA, &pooledB, &deadB, &tailB})
                 check(
                     DPCT_CHECK_ERROR(
-                        dpct::get_in_order_queue()
+                        (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memset(dp->p, 0,
                                     dp == &pooledA || dp == &pooledB ? prows * 4
                                     : dp == &deadA || dp == &deadB   ? IDXD * 4
@@ -1502,9 +1502,9 @@ int main(int argc, char** argv) {
                             .wait()),
                     "zero");
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue().memset(bposA.p, 0, 4).wait()),
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(bposA.p, 0, 4).wait()),
                   "zero");
-                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                            .memset(bposB.p, 0, 4)
                                            .wait()),
                       "zero");
@@ -1513,14 +1513,14 @@ int main(int argc, char** argv) {
             strata::kernels::QsaIndexerBuffers bufsA{tailA.p, deadA.p, pooledA.p, bposA.p};
             strata::kernels::QsaIndexerBuffers bufsB{tailB.p, deadB.p, pooledB.p, bposB.p};
             for (int64_t t = 0; t < NB; ++t) {         // the sequential side: one cell, its device position
-                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                            .memcpy(draw.p,
                                                    &raws[(size_t)t * IDXD],
                                                    (size_t)IDXD * 4)
                                            .wait()),
                       "raw");
                 const int32_t tp = (int32_t) t;
-                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                            .memcpy(dpos.p, &tp, 4)
                                            .wait()),
                       "pos");
@@ -1582,7 +1582,7 @@ int main(int argc, char** argv) {
         Dev<int32_t> dpos0(1);
         const int32_t zero = 0;
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue().memcpy(dpos0.p, &zero, 4).wait()),
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dpos0.p, &zero, 4).wait()),
               "pos0");
         dpct::queue_ptr cs = &dpct::get_in_order_queue();
         check(DPCT_CHECK_ERROR(
@@ -1596,20 +1596,20 @@ int main(int argc, char** argv) {
             try {
                          Dev<float> pooled(prows), dd((size_t)IDXD), tail(trows);
             Dev<int32_t> bpos(1);
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memset(pooled.p, 0, prows * 4)
                                        .wait()),
                   "zero");
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memset(dd.p, 0, (size_t)IDXD * 4)
                                        .wait()),
                   "zero");
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memset(tail.p, 0, trows * 4)
                                        .wait()),
                   "zero");
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue().memset(bpos.p, 0, 4).wait()),
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(bpos.p, 0, 4).wait()),
                   "zero");
             strata::kernels::QsaIndexerBuffers bufs{tail.p, dd.p, pooled.p, bpos.p};
             if (native) {
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index 42d634d93b8..f358a4b7ca3 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -44,7 +44,7 @@ template <typename T> T* up(const std::vector<T>& h) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d, h.data(), h.size() * sizeof(T)).wait()),
        "upload");
     return d;
@@ -155,11 +155,11 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "run");
     std::vector<float> o((size_t) (nq * NH * HD)), nw(o.size());
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(o.data(), d_old, o.size() * 4)
                             .wait()),
        "down");
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(nw.data(), d_new, nw.size() * 4)
                             .wait()),
        "down");
diff --git a/sycl/src/kernels/quantize_act_parity.cpp b/sycl/src/kernels/quantize_act_parity.cpp
index bc11b854085..5b69645b78f 100644
--- a/sycl/src/kernels/quantize_act_parity.cpp
+++ b/sycl/src/kernels/quantize_act_parity.cpp
@@ -89,7 +89,7 @@ int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), (size_t)n * sizeof(float)).wait()),
           "copy x");
     // PROBE: does the DEVICE hold what the host thinks it sent?  The scale byte differs with the SAME
@@ -98,7 +98,7 @@ int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
     {
         std::vector<float> rt((size_t) n);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(rt.data(), d_x, (size_t)n * sizeof(float))
                       .wait()),
               "probe copy back");
@@ -108,12 +108,12 @@ int run_case(const char* name, const std::vector<float>& x, bool check_bytes) {
     }
     strata::kernels::quantize_q8_0(d_x, d_b, n, nullptr);
     strata::kernels::dequant_q8_0(d_b, d_back, n, nullptr);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(g_blocks.data(), d_b, g_blocks.size())
                                .wait()),
           "back blocks");
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(g_back.data(), d_back, (size_t)n * sizeof(float))
                   .wait()),
           "back vals");
@@ -221,17 +221,17 @@ int run_case_k(const char* name, const std::vector<float>& x, bool check_bytes,
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), (size_t)n * sizeof(float)).wait()),
           "copy x");
     strata::kernels::quantize_q8_K(d_x, d_b, n, nullptr);
     strata::kernels::dequant_q8_K(d_b, d_back, n, nullptr);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(g_blocks.data(), d_b, g_blocks.size())
                                .wait()),
           "back blocks");
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(g_back.data(), d_back, (size_t)n * sizeof(float))
                   .wait()),
           "back vals");
diff --git a/sycl/src/kernels/rope_parity.cpp b/sycl/src/kernels/rope_parity.cpp
index bec5af5a679..75fb1dc1c48 100644
--- a/sycl/src/kernels/rope_parity.cpp
+++ b/sycl/src/kernels/rope_parity.cpp
@@ -125,7 +125,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "copy x");
     /*
@@ -134,7 +134,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_cos, hcos.data(), hcos.size() * sizeof(float)).wait()),
           "copy cos");
     /*
@@ -143,7 +143,7 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_sin, hsin.data(), hsin.size() * sizeof(float)).wait()),
           "copy sin");
     /*
@@ -152,13 +152,13 @@ int main(int argc, char** argv) {
     memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_pos, pos.data(), pos.size() * sizeof(int)).wait()),
           "copy pos");
     strata::kernels::rope_neox_apply(d_x, d_out, rows, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
     std::vector<float> got(ref.size());
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(got.data(), d_out, got.size() * sizeof(float))
                   .wait()),
           "back");
@@ -207,19 +207,19 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_x, e.data(), e.size() * sizeof(float)).wait()),
               "copy e");
         // position 7, NOT position 0: at pos 0 sin is exactly 0, so dim half legitimately does not move and
         // the check would report the correct kernel as wrong.  The first version made exactly that mistake.
         int p7 = 7;
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(d_pos, &p7, sizeof(int))
                                    .wait()),
               "copy p7");
         strata::kernels::rope_neox_apply(d_x, d_out, 1, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(o.data(), d_out, o.size() * sizeof(float))
                       .wait()),
               "back e");
@@ -388,7 +388,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_x, x.data(), x.size() * sizeof(float)).wait()),
               "copy x");
         /*
@@ -397,7 +397,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_cos, yc.data(), yc.size() * sizeof(float)).wait()),
               "copy ycos");
         /*
@@ -406,7 +406,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_sin, ys.data(), ys.size() * sizeof(float)).wait()),
               "copy ysin");
         /*
@@ -415,13 +415,13 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_pos, pos.data(), pos.size() * sizeof(int)).wait()),
               "copy pos");
         strata::kernels::rope_neox_apply(d_x, d_out, rows, head_dim, n_rot, d_cos, d_sin, d_pos, nullptr);
         std::vector<float> got2(ref2.size());
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got2.data(), d_out, got2.size() * sizeof(float))
                       .wait()),
               "back");
@@ -487,7 +487,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_x2, x2.data(), x2.size() * sizeof(float)).wait()),
               "copy x2");
         /*
@@ -496,7 +496,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_c2, sc.data(), sc.size() * sizeof(float)).wait()),
               "copy c2");
         /*
@@ -505,7 +505,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_s2, ss.data(), ss.size() * sizeof(float)).wait()),
               "copy s2");
         /*
@@ -514,7 +514,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_p2, pos2.data(), pos2.size() * sizeof(int)).wait()),
               "copy p2");
         // The native path demands an explicit stream - a null one is refused by validation, not defaulted.
@@ -527,12 +527,12 @@ int main(int argc, char** argv) {
         check(DPCT_CHECK_ERROR(cs5->wait()), "sync5");
         std::vector<float> got_t(x2.size()), got_n(x2.size());
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got_t.data(), d_t2, got_t.size() * sizeof(float))
                       .wait()),
               "back t2");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got_n.data(), d_n2, got_n.size() * sizeof(float))
                       .wait()),
               "back n2");
@@ -559,7 +559,7 @@ int main(int argc, char** argv) {
         strata::kernels::native_rope_apply(d_x2, d_n2, nrows, head_dim, n_rot, none5, d_p2, cs5);
         check(DPCT_CHECK_ERROR(cs5->wait()), "sync5b");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got_n.data(), d_n2, got_n.size() * sizeof(float))
                       .wait()),
               "back n2b");
@@ -571,7 +571,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_c2, nc5.data(), nc5.size() * sizeof(float)).wait()),
               "copy c2b");
         /*
@@ -580,12 +580,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_s2, ns5.data(), ns5.size() * sizeof(float)).wait()),
               "copy s2b");
         strata::kernels::rope_neox_apply(d_x2, d_t2, nrows, head_dim, n_rot, d_c2, d_s2, d_p2, nullptr);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got_t.data(), d_t2, got_t.size() * sizeof(float))
                       .wait()),
               "back t2b");
diff --git a/sycl/src/kernels/router_top10_parity.cpp b/sycl/src/kernels/router_top10_parity.cpp
index b94e243a18a..d30a4770087 100644
--- a/sycl/src/kernels/router_top10_parity.cpp
+++ b/sycl/src/kernels/router_top10_parity.cpp
@@ -84,17 +84,17 @@ int run_case(const char* name, const std::vector<float>& logits, int n_tokens, i
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_l, logits.data(), logits.size() * sizeof(float)).wait()),
           "copy");
     strata::kernels::router_top10(d_l, n_tokens, n_expert, k, d_ids, d_w, nullptr);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(h_ids.data(), d_ids, h_ids.size() * sizeof(int))
                   .wait()),
           "back ids");
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(h_w.data(), d_w, h_w.size() * sizeof(float))
                   .wait()),
           "back w");
diff --git a/sycl/src/kernels/s2_expert_grouped_parity.cpp b/sycl/src/kernels/s2_expert_grouped_parity.cpp
index 2d53dcfc3dd..e19261cbfb1 100644
--- a/sycl/src/kernels/s2_expert_grouped_parity.cpp
+++ b/sycl/src/kernels/s2_expert_grouped_parity.cpp
@@ -69,7 +69,7 @@ template <typename T> T* dalloc(size_t n) {
                             n * sizeof(T) + 256, dpct::get_in_order_queue())),
        "malloc");
     ck(DPCT_CHECK_ERROR(
-           dpct::get_in_order_queue().memset(p, 0, n * sizeof(T) + 256).wait()),
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 256).wait()),
        "memset");
     return p;
 }
@@ -80,13 +80,13 @@ template <typename T> void up(T* d, const std::vector<T>& h) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d, h.data(), h.size() * sizeof(T)).wait()),
        "h2d");
 }
 template <typename T> std::vector<T> down(const T* d, size_t n) {
     std::vector<T> h(n);
-    ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                             .memcpy(h.data(), d, n * sizeof(T))
                             .wait()),
        "d2h");
@@ -170,12 +170,12 @@ bool twice(const char* name, float* d_out, size_t out_floats, const Scratch& s,
            const std::function<void()>& call, Run* keep, bool expect_new = true) {
     Run r[2];
     for (int old = 1; old >= 0; --old) {
-        ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                 .memset(d_out, 0xA5, out_floats * 4)
                                 .wait()),
            "sentinel out");
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memset(s.p, 0x5A, s.bytes).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(s.p, 0x5A, s.bytes).wait()),
            "sentinel scratch");
         k::moe_grouped_select_old(old);
         (void) k::moe_grouped_last_path();   // clear
@@ -510,7 +510,7 @@ void check_all() {
         to ensure synchronization behavior.
         */
         ck(DPCT_CHECK_ERROR(
-               dpct::get_in_order_queue().memcpy(d_x2 + 2, x.data(), XROW).wait()),
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_x2 + 2, x.data(), XROW).wait()),
            "x2");
         const int n_hits = 3;
         std::vector<int32_t> slot{2, 5, 7}, dst{4, 0, 9};
@@ -554,7 +554,7 @@ void check_all() {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_arena + (size_t)i * STRIDE, fx.hb(i), BLOB).wait()),
                "arena");
         {
@@ -572,7 +572,7 @@ void check_all() {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    d_arena + 4 + (size_t)i * BLOB, fx.hb(i), BLOB).wait()),
                "arena");
         {
@@ -625,7 +625,7 @@ void bench() {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                    fx.d + (size_t)i * BLOB, b.data(), BLOB).wait()),
                "blob");
         }
diff --git a/sycl/src/kernels/s2_gemv_parity.cpp b/sycl/src/kernels/s2_gemv_parity.cpp
index 2f60eb51387..4b6b1fdfd2b 100644
--- a/sycl/src/kernels/s2_gemv_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_parity.cpp
@@ -130,7 +130,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
@@ -139,7 +139,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
@@ -148,7 +148,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
 
@@ -156,7 +156,7 @@ int main(int argc, char** argv) {
 
     std::vector<float> got((size_t) n_out);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(got.data(), d_y, got.size() * sizeof(float))
                   .wait()),
           "copy back");
diff --git a/sycl/src/kernels/s2_gemv_q8_parity.cpp b/sycl/src/kernels/s2_gemv_q8_parity.cpp
index 4f2f89805e9..3a578322bfd 100644
--- a/sycl/src/kernels/s2_gemv_q8_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_q8_parity.cpp
@@ -79,7 +79,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "c x");
     /*
@@ -88,7 +88,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "c codes");
     /*
@@ -97,7 +97,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "c scales");
 
@@ -105,7 +105,7 @@ int main(int argc, char** argv) {
 
     // ---- host reference: quantize the activation with the project's own rule, then dot
     std::vector<uint8_t> h_act((size_t) (n_in / 32) * 34);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(h_act.data(), d_act, h_act.size())
                                .wait()),
           "c act back");
@@ -139,7 +139,7 @@ int main(int argc, char** argv) {
     strata::kernels::s2_gemv_q8(d_act, d_codes, d_scales, d_y_q8, n_in, n_out, tpr, nullptr);
     std::vector<float> got((size_t) n_out);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(got.data(), d_y_q8, got.size() * sizeof(float))
                   .wait()),
           "c y2");
@@ -203,14 +203,14 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_hx, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "c hx");
     strata::kernels::SForm form{2, -1, 64, strata::kernels::Codebook::Affine, false};
     strata::kernels::s_gemv_split(d_hx, d_codes, d_scales, nullptr, d_y_fp16, n_in, n_out, form, tpr);
     std::vector<float> y16((size_t) n_out);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(y16.data(), d_y_fp16, y16.size() * sizeof(float))
                   .wait()),
           "c y1");
diff --git a/sycl/src/kernels/s_gemv_parity.cpp b/sycl/src/kernels/s_gemv_parity.cpp
index 6ebbb46a700..f2ba1f18c58 100644
--- a/sycl/src/kernels/s_gemv_parity.cpp
+++ b/sycl/src/kernels/s_gemv_parity.cpp
@@ -252,7 +252,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
@@ -261,7 +261,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
@@ -270,7 +270,7 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
     /*
@@ -279,13 +279,13 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_offsets, offsets.data(), offsets.size() * sizeof(float)).wait()),
           "copy offsets");
     strata::kernels::s_gemv(d_x, d_codes, d_scales, d_offsets, d_y, n_in, n_out, form);
     std::vector<float> got((size_t) n_out);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(got.data(), d_y, got.size() * sizeof(float))
                   .wait()),
           "copy back");
@@ -372,7 +372,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "bench copy x");
     /*
@@ -381,7 +381,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "bench copy codes");
     /*
@@ -390,7 +390,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "bench copy scales");
 
@@ -430,7 +430,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
     // sums in a different order - so this is a relative comparison, not bit equality.
     strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, form);
     std::vector<float> ref_naive((size_t) n_out);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(ref_naive.data(), d_y,
                                        ref_naive.size() * sizeof(float))
                                .wait()),
@@ -455,7 +455,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
         // correctness of the thing being timed
         std::vector<float> got((size_t) n_out);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got.data(), d_y, got.size() * sizeof(float))
                       .wait()),
               "copy split result");
@@ -488,7 +488,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
                                       std::chrono::steady_clock::now() - q0).count());
                 }
                 std::sort(qms.begin(), qms.end());
-                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                            .memcpy(got.data(), d_y,
                                                    got.size() * sizeof(float))
                                            .wait()),
@@ -524,7 +524,7 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
                     }
                     std::sort(fms.begin(), fms.end());
                     check(
-                        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                        DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                              .memcpy(got.data(), d_y,
                                                      got.size() * sizeof(float))
                                              .wait()),
@@ -669,7 +669,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
               "copy x");
         /*
@@ -678,7 +678,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_codes, codes.data(), codes.size()).wait()),
               "copy codes");
         /*
@@ -687,13 +687,13 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
               "copy scales");
         strata::kernels::s_gemv(d_x, d_codes, d_scales, nullptr, d_y, n_in, n_out, tc.form);
         std::vector<float> got((size_t) n_out);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got.data(), d_y, got.size() * sizeof(float))
                       .wait()),
               "copy back");
diff --git a/sycl/src/kernels/s_gemv_q8k_parity.cpp b/sycl/src/kernels/s_gemv_q8k_parity.cpp
index 315bab4b5cf..769fbe52c3d 100644
--- a/sycl/src/kernels/s_gemv_q8k_parity.cpp
+++ b/sycl/src/kernels/s_gemv_q8k_parity.cpp
@@ -128,7 +128,7 @@ int ragged_rows(const Case& cs, long long n_out) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_xf, xf.data(),
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_xf, xf.data(),
                                                              (size_t)n_in * 4).wait()),
           "rcxf");
     /*
@@ -137,7 +137,7 @@ int ragged_rows(const Case& cs, long long n_out) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "rcc");
     /*
@@ -146,7 +146,7 @@ int ragged_rows(const Case& cs, long long n_out) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * 4).wait()),
           "rcs");
     /*
@@ -155,16 +155,16 @@ int ragged_rows(const Case& cs, long long n_out) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_offs, offs.data(), offs.size() * 4).wait()),
           "rco");
     strata::kernels::quantize_q8_K(d_xf, d_xk, n_in, nullptr);
     strata::kernels::quantize_q8_0(d_xf, d_x0, n_in, nullptr);
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(xk.data(), d_xk, xk.size())
                                .wait()),
           "rcxk");
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                .memcpy(x0.data(), d_x0, x0.size())
                                .wait()),
           "rcx0");
@@ -200,7 +200,7 @@ int ragged_rows(const Case& cs, long long n_out) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_y, sentinel.data(), sentinel.size() * 4).wait()),
               "rsent");
         if (kind == 0)
@@ -214,7 +214,7 @@ int ragged_rows(const Case& cs, long long n_out) {
               "ragged split");
         std::vector<uint32_t> got_bits(sentinel.size());
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got_bits.data(), d_y, got_bits.size() * 4)
                       .wait()),
               "rcy");
@@ -302,11 +302,11 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_xf, xf.data(), (size_t)n_in * 4).wait()),
               "cxf");
         strata::kernels::quantize_q8_K(d_xf, d_xq, n_in, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(xq8k.data(), d_xq, xq8k.size())
                                    .wait()),
               "cxq");
@@ -344,7 +344,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_codes, codes.data(), codes.size()).wait()),
               "cc");
         /*
@@ -353,7 +353,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_scales, scales.data(), scales.size() * 4).wait()),
               "cs");
         /*
@@ -362,20 +362,20 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_offs, offs.data(), offs.size() * 4).wait()),
               "co");
 
         std::vector<float> naive((size_t) n_out), warp((size_t) n_out);
         strata::kernels::s_gemv_q8k(d_xq, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in, n_out,
                                     f, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(naive.data(), d_y, (size_t)n_out * 4)
                                    .wait()),
               "cy1");
         strata::kernels::s_gemv_q8k_split(d_xq, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in,
                                           n_out, f, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(warp.data(), d_y, (size_t)n_out * 4)
                                    .wait()),
               "cy2");
@@ -402,7 +402,7 @@ int main(int argc, char** argv) {
                                        xq0.size(), dpct::get_in_order_queue())),
                   "x0");
             strata::kernels::quantize_q8_0(d_xf, d_x0, n_in, nullptr);
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                        .memcpy(xq0.data(), d_x0, xq0.size())
                                        .wait()),
                   "cx0");
@@ -425,7 +425,7 @@ int main(int argc, char** argv) {
                                                n_in, n_out, f, nullptr);
             std::vector<float> got0((size_t) n_out);
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(got0.data(), d_y, (size_t)n_out * 4)
                           .wait()),
                   "cy0");
@@ -459,14 +459,14 @@ int main(int argc, char** argv) {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       d_x16, x16.data(), (size_t)n_in * 2).wait()),
                   "cx16");
             std::vector<float> fp16out((size_t) n_out);
             strata::kernels::s_gemv(d_x16, d_codes, d_scales, cs.has_offset ? d_offs : nullptr, d_y, n_in, n_out,
                                     f);
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memcpy(fp16out.data(), d_y, (size_t)n_out * 4)
                           .wait()),
                   "cy3");
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
index 08fef003092..4117ed8d800 100644
--- a/sycl/src/kernels/sampler_parity.cpp
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -114,13 +114,13 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_l, logits.data(), logits.size() * sizeof(float)).wait()),
           "copy");
     // -1 in every output slot first: a row the kernel leaves unwritten can never match (a verify window reads
     // every row, so "no output" is a wrong answer, not a skipped one)
     check(
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                              .memset(d_o, 0xFF, (size_t)n_tokens * sizeof(int))
                              .wait()),
         "fill out");
@@ -135,7 +135,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_h, hist.data(), hist.size() * sizeof(int)).wait()),
               "copy hist");
     }
@@ -143,7 +143,7 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
                                    nullptr);
     std::vector<int> got((size_t) n_tokens);
     check(
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                              .memcpy(got.data(), d_o, got.size() * sizeof(int))
                              .wait()),
         "back");
@@ -394,7 +394,7 @@ struct DeviceRows {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   l, logits.data(), logits.size() * sizeof(float)).wait()),
               "copy");
         if (hist_len > 0) {
@@ -408,7 +408,7 @@ struct DeviceRows {
             memory. If the memory is not pageable, call wait() on event return
             by memcpy API to ensure synchronization behavior.
             */
-            check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+            check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                       h, hist.data(), hist.size() * sizeof(int)).wait()),
                   "copy hist");
         }
@@ -423,7 +423,7 @@ struct DeviceRows {
     std::vector<int> sample(const strata::kernels::SamplerParams &p,
                             dpct::queue_ptr stream) {
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memset(o, 0xFF, (size_t)n_tokens * sizeof(int))
                       .wait()),
               "fill out");
@@ -432,7 +432,7 @@ struct DeviceRows {
             check(DPCT_CHECK_ERROR(stream->wait()), "stream sync");
         std::vector<int> got((size_t) n_tokens);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(got.data(), o, got.size() * sizeof(int))
                       .wait()),
               "back");
@@ -473,7 +473,7 @@ void bench_sampled() {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_l, l.data(), l.size() * sizeof(float)).wait()),
               "bench copy");
         for (int k : {20, 64}) {
@@ -621,19 +621,19 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_l, l.data(), l.size() * sizeof(float)).wait()),
               "c1");
         strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, a, d_a, nullptr);
         strata::kernels::sample_tokens(d_l, NT, NV, nullptr, 0, b, d_b, nullptr);
         std::vector<int> ga((size_t) NT), gb((size_t) NT);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(ga.data(), d_a, ga.size() * sizeof(int))
                       .wait()),
               "g1");
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(gb.data(), d_b, gb.size() * sizeof(int))
                       .wait()),
               "g2");
@@ -1130,7 +1130,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   input, uniform.data(), uniform.size() * sizeof(float)).wait()),
               "counter upload");
         strata::kernels::SamplerParams p;
@@ -1138,7 +1138,7 @@ int main(int argc, char** argv) {
         strata::kernels::sample_tokens(input, count, vocab, nullptr, 0, p, output, nullptr);
         std::vector<int> batch(count), singles(count), repeated(count);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(batch.data(), output, count * sizeof(int))
                       .wait()),
               "counter batch");
@@ -1147,13 +1147,13 @@ int main(int argc, char** argv) {
             strata::kernels::sample_tokens(input, 1, vocab, nullptr, 0, one, output + i, nullptr);
         }
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(singles.data(), output, count * sizeof(int))
                       .wait()),
               "counter singles");
         strata::kernels::sample_tokens(input, count, vocab, nullptr, 0, p, output, nullptr);
         check(DPCT_CHECK_ERROR(
-                  dpct::get_in_order_queue()
+                  (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                       .memcpy(repeated.data(), output, count * sizeof(int))
                       .wait()),
               "counter repeated");
@@ -1388,7 +1388,7 @@ int main(int argc, char** argv) {
                       cs = dpct::get_current_device().create_queue(true)),
                   "fixture 18 stream");
             check(DPCT_CHECK_ERROR(
-                      dpct::get_in_order_queue()
+                      (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                           .memset(rows.o, 0xFF, (size_t)T * sizeof(int))
                           .wait()),
                   "fixture 18 fill");
@@ -1407,7 +1407,7 @@ int main(int argc, char** argv) {
                   "instantiate");
             for (int replay = 0; replay < 2; ++replay) {
                 check(DPCT_CHECK_ERROR(
-                          dpct::get_in_order_queue()
+                          (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                               .memset(rows.o, 0xFF, (size_t)T * sizeof(int))
                               .wait()),
                       "fixture 18 refill");
@@ -1415,7 +1415,7 @@ int main(int argc, char** argv) {
                       "graph launch");
                 check(DPCT_CHECK_ERROR(cs->wait()), "graph sync");
                 std::vector<int> got((size_t) T);
-                check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+                check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                            .memcpy(got.data(), rows.o,
                                                    got.size() * sizeof(int))
                                            .wait()),
diff --git a/sycl/src/kernels/shared_expert_parity.cpp b/sycl/src/kernels/shared_expert_parity.cpp
index 08e9a44d15d..5bf8525da23 100644
--- a/sycl/src/kernels/shared_expert_parity.cpp
+++ b/sycl/src/kernels/shared_expert_parity.cpp
@@ -232,7 +232,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, hx.data(), hx.size() * sizeof(uint16_t)).wait()),
           "c x");
     /*
@@ -242,7 +242,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_gc, gc.data(), gc.size()).wait()),
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_gc, gc.data(), gc.size()).wait()),
           "c gc");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -251,7 +251,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_uc, uc.data(), uc.size()).wait()),
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_uc, uc.data(), uc.size()).wait()),
           "c uc");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -260,7 +260,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue().memcpy(d_dc, dc.data(), dc.size()).wait()),
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_dc, dc.data(), dc.size()).wait()),
           "c dc");
     /*
     DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
@@ -268,7 +268,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_gs, gs.data(), gs.size() * sizeof(float)).wait()),
           "c gs");
     /*
@@ -277,7 +277,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_us, us.data(), us.size() * sizeof(float)).wait()),
           "c us");
     /*
@@ -286,7 +286,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_ds, ds.data(), ds.size() * sizeof(float)).wait()),
           "c ds");
     /*
@@ -295,7 +295,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_ginp, ginp.data(), ginp.size() * sizeof(float)).wait()),
           "c ginp");
     /*
@@ -304,7 +304,7 @@ int main(int argc, char** argv) {
     is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
-    check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+    check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t)).wait()),
           "c xb");
     /*
@@ -314,7 +314,7 @@ int main(int argc, char** argv) {
     synchronization behavior.
     */
     check(
-        DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
             d_ginpb, hginp_bf16.data(), hginp_bf16.size() * sizeof(uint16_t)).wait()),
         "c ginpb");
 
@@ -340,11 +340,11 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_xf, fx.data(), (size_t)n_embd * 4).wait()),
               "cxf");
         strata::kernels::quantize_q8_0(d_xf, d_x0, n_embd, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(hx0.data(), d_x0, hx0.size())
                                    .wait()),
               "cx0");
@@ -364,7 +364,7 @@ int main(int argc, char** argv) {
                                    d_dc, d_ds, nullptr, d_ginpb, d_scratch, d_out, n_embd, n_ff, tpr, nullptr);
     std::vector<float> got((size_t) n_embd);
     check(DPCT_CHECK_ERROR(
-              dpct::get_in_order_queue()
+              (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                   .memcpy(got.data(), d_out, got.size() * sizeof(float))
                   .wait()),
           "c out");
@@ -472,7 +472,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_witness, witness.data(), witness.size() * sizeof(float)).wait()),
               "native shared upload x");
         auto run = [&](void* stream, const float* x_float = nullptr) {
@@ -485,12 +485,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_ginpb, zeros.data(), zeros.size() * sizeof(uint16_t)).wait()),
               "zero shared gate");
         run(nullptr);
         std::vector<float> half_output((size_t) n_embd), legacy((size_t) n_embd), native((size_t) n_embd), replay((size_t) n_embd);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(half_output.data(), d_out,
                                            half_output.size() * sizeof(float))
                                    .wait()),
@@ -501,7 +501,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_ginpb, basis.data(), basis.size() * sizeof(uint16_t)).wait()),
               "basis shared gate");
         /*
@@ -510,12 +510,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_xb, witness_bf16.data(),
                   witness_bf16.size() * sizeof(uint16_t)).wait()),
               "witness shared bf16");
         run(nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(legacy.data(), d_out,
                                            legacy.size() * sizeof(float))
                                    .wait()),
@@ -534,7 +534,7 @@ int main(int argc, char** argv) {
               "native shared stream");
         run(stream, d_witness);
         check(DPCT_CHECK_ERROR(stream->wait()), "native shared sync");
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(native.data(), d_out,
                                            native.size() * sizeof(float))
                                    .wait()),
@@ -570,7 +570,7 @@ int main(int argc, char** argv) {
         check(DPCT_CHECK_ERROR(stream->ext_oneapi_graph(*executable)),
               "native shared graph replay");
         check(DPCT_CHECK_ERROR(stream->wait()), "native shared graph sync");
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(replay.data(), d_out,
                                            replay.size() * sizeof(float))
                                    .wait()),
@@ -590,7 +590,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_ginpb, hginp_bf16.data(),
                   hginp_bf16.size() * sizeof(uint16_t)).wait()),
               "restore shared gate");
@@ -600,11 +600,11 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_xb, hx_bf16.data(), hx_bf16.size() * sizeof(uint16_t)).wait()),
               "restore shared bf16");
         run(nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(replay.data(), d_out,
                                            replay.size() * sizeof(float))
                                    .wait()),
@@ -673,7 +673,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_p, parts.data(), parts.size() * 4).wait()),
               "mc cp");
         /*
@@ -682,7 +682,7 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(d_w, w.data(),
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_w, w.data(),
                                                                  w.size() * 4).wait()),
               "mc cw");
         /*
@@ -691,12 +691,12 @@ int main(int argc, char** argv) {
         If the memory is not pageable, call wait() on event return by memcpy API
         to ensure synchronization behavior.
         */
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                   d_s, shared.data(), shared.size() * 4).wait()),
               "mc cs");
         strata::kernels::moe_combine(d_p, d_w, d_s, d_y, n_embd2, k2, nullptr);
         std::vector<float> got((size_t) n_embd2);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_y, got.size() * 4)
                                    .wait()),
               "mc cy");
@@ -718,7 +718,7 @@ int main(int argc, char** argv) {
 
         // a null `shared` must mean "no shared expert", not "add nothing but leave it undefined"
         strata::kernels::moe_combine(d_p, d_w, nullptr, d_y, n_embd2, k2, nullptr);
-        check(DPCT_CHECK_ERROR(dpct::get_in_order_queue()
+        check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
                                    .memcpy(got.data(), d_y, got.size() * 4)
                                    .wait()),
               "mc cy2");
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index d7c835c429a..18881b90bbc 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -5285,6 +5285,7 @@ int main(int argc, char **argv) try {
                 if (p.lent.empty()) return true;
                 tr("refill start", (long long) p.lent.size());
                 const strata::core::OnDevice on(p.dev);
+                size_t queued = 0;
                 for (const auto& [i, slot] : p.lent) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
                     const uint8_t* b = srcp->blob(i / g.n_expert, i % g.n_expert);
                     const int64_t nb = (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(i / g.n_expert);
@@ -5292,6 +5293,8 @@ int main(int argc, char **argv) try {
                                                             : p.cache->fill_slot_queued(slot, b, e, nb)))
                         return false;
                     host_res[(size_t) i] = slot;
+                    // SYCL port: drain before GgufExpertSource's 512-buffer blob ring can wrap onto a queued copy
+                    if (!refill_blocking() && ++queued % 256 == 0 && !p.cache->sync_queued(e)) return false;
                 }
                 if (!p.cache->sync_queued(e)) return false;
                 p.lent.clear();
@@ -5905,6 +5908,7 @@ int main(int argc, char **argv) try {
         // refill the lent slots from the arena and give them back to the decode tier
         if (!lent.empty()) {
             const Clock::time_point tr = Clock::now();
+            size_t queued = 0;
             for (const auto& [i, slot] : lent) {   // D-4: queued, one wait (STRATA_REFILL_BLOCKING=1: each)
                 const uint8_t* b = srcp->blob(i / g.n_expert, i % g.n_expert);
                 const int64_t nb = (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(i / g.n_expert);
@@ -5914,6 +5918,13 @@ int main(int argc, char **argv) try {
                     return 1;
                 }
                 host_res[(size_t) i] = slot;
+                // SYCL port: GgufExpertSource::blob() hands out a ring of 512 buffers, valid until the next blob()
+                // call; a queued copy reads its buffer later, so drain before the ring can wrap onto one (938 lent
+                // slots refilled through 512 buffers gave ~426 slots another expert's bytes)
+                if (!refill_blocking() && ++queued % 256 == 0 && !xcache.sync_queued(err)) {
+                    std::fprintf(stderr, "strata generate: refilling the lent slots failed: %s\n", err.c_str());
+                    return 1;
+                }
             }
             if (!xcache.sync_queued(err)) {
                 std::fprintf(stderr, "strata generate: refilling the lent slots failed: %s\n", err.c_str());
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index cb786c27828..453cd364a5d 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -262,3 +262,12 @@ def verify(s):
     edit(str(rel), sub(r"\(\(cudaStream_t\)(\w+)\)->", r"strata::q_of(\1)->"))
 # 0.1.29: sycl::free takes void*; NativeEmbed frees a const device pointer.
 edit("src/core/native_head.cpp", lambda s: s.replace("sycl::free(dev_, dpct::get_in_order_queue())", "sycl::free((void *) dev_, dpct::get_in_order_queue())"))
+
+# 2026-10-01: cudaMemcpy / cudaMemset on the legacy default stream wait for every earlier launch on the device's
+# blocking streams; dpct's `get_in_order_queue().memcpy(...)` does not wait for work on another queue. The parity
+# tests launch on their own queue (`s`, `cs`) and copy results back on the default one, so a slow kernel's output
+# could be read before it finished (iq_multi_parity's IQ2_XS reference, qsa_parity's sequential side). In the tests,
+# every default-queue copy/fill first drains the device's queues - cudaMemcpy's semantics.
+for p in sorted((root / "src" / "kernels").glob("*_parity.cpp")):
+    edit(str(p.relative_to(root)), sub(r"(?<!queues_wait_and_throw\(\), )dpct::get_in_order_queue\(\)(\s*)\.(memcpy|memset)\(",
+                                       r"(dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())\1.\2("))

From 35809f81c51ca3740c8118a5ef9ebe96127c6599 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 16:12:35 -0500
Subject: [PATCH 053/201] sycl: port upstream 0.1.32 (re-migration 3-way merge)

dpct of 9259cad and c499bd1, normalized, kernel-name hashes canonicalized to
the port's, then git merge-file into sycl/: 49 files, 10 with real conflicts.

- verify: upstream's set_commit_async/wait_commit on the port's deferred
  commit (wait_commit = commit_finish); copy_logits on the queue
- fused_gr: upstream's split/staged read variants merged but unused by the
  port's read; their per-card self-test segfaults on the B70, so on SYCL it
  runs only with STRATA_HC_CHECK=1. The port's split-norm kernel renamed
  (upstream has one of the same name); two colliding kernel names renamed
- fixups.py: fused_gr's per-block local-memory query
- hand files: mtp.cpp, verify.cpp, ple_reader.cpp (keep-alive reads + trace)
- qsa_prompt_attn_parity turns on the XMX kernel it checks
- version 0.1.32

Tested on the B70: build clean; Coder (19 / 2,184-token prompts) and IQ2_XS
outputs identical to 0.1.31 at the same speed (78.1 / 75.7, 58.5 tok/s);
40K prompt 1,201 tok/s, decode 65.1; kv_hybrid, qsa_prompt_attn, qsa, gr,
kv_q4, kv_q8, rope, router, sampler, quantize_act parity pass.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  19 +-
 sycl/CMakeLists.txt                           |   2 +-
 sycl/include/strata/core/coupled_draft.hpp    |  14 +-
 sycl/include/strata/core/session.hpp          |   3 +
 sycl/include/strata/core/verify.hpp           |  18 +-
 sycl/include/strata/kernels/mrope.hpp         |  39 +
 sycl/src/core/conversation_snapshot.cpp       |   8 +-
 sycl/src/core/conversation_snapshot_test.cpp  |  11 +
 sycl/src/core/device.dp.cpp                   |  31 +-
 sycl/src/core/layer.cpp                       |  21 +-
 sycl/src/core/mtp.cpp                         |  11 +-
 sycl/src/core/native_dense.cpp                |  12 +
 sycl/src/core/native_head.cpp                 |   6 +-
 sycl/src/core/session.cpp                     |   9 +
 sycl/src/core/verify.cpp                      |  71 +-
 sycl/src/core/weights.cpp                     |  23 +
 sycl/src/kernels/cuda/cvec.dp.cpp             |   8 +-
 sycl/src/kernels/cuda/dequant_bf16.dp.cpp     |  13 +
 sycl/src/kernels/cuda/fused_gr.dp.cpp         | 818 +++++++++++++++++-
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       |  19 +-
 .../kernels/cuda/native_gdn_preprocess.dp.cpp |   6 +-
 .../src/kernels/cuda/native_gr_postops.dp.cpp |  24 +-
 sycl/src/kernels/cuda/native_mmvq.dp.cpp      |  12 +-
 .../kernels/cuda/native_qsa_indexer.dp.cpp    | 191 ++--
 sycl/src/kernels/cuda/native_qsa_score.dp.cpp |  32 +-
 sycl/src/kernels/cuda/native_rope.dp.cpp      |  88 +-
 sycl/src/kernels/cuda/qsa.dp.cpp              |   2 +
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp  | 310 ++++++-
 sycl/src/kernels/cuda/qsa_select.dp.cpp       | 271 +++++-
 sycl/src/kernels/cuda/quantize_act.dp.cpp     |   8 +-
 sycl/src/kernels/cuda/router_top10.dp.cpp     | 175 ++++
 sycl/src/kernels/cuda/verify_kernels.dp.cpp   |   2 +-
 sycl/src/kernels/kv_hybrid_parity.cpp         |   6 +-
 sycl/src/kernels/kv_q4_parity.cpp             |  24 +-
 sycl/src/kernels/ple_parity.cpp               |  56 +-
 sycl/src/kernels/q5_projection_parity.cpp     |  86 ++
 sycl/src/kernels/qsa_prompt_attn_parity.cpp   |  24 +-
 sycl/src/kernels/qsa_select_bench.cpp         |  53 +-
 sycl/src/kernels/router_top10_parity.cpp      |   6 +-
 sycl/src/kernels/s2_gemv_q8_parity.cpp        |  24 +-
 sycl/src/kernels/s_gemv_parity.cpp            |  42 +-
 sycl/src/kernels/sampler_parity.cpp           |   6 +-
 sycl/src/ngram/ple_reader.cpp                 | 135 ++-
 sycl/src/prefill/kernels.dp.cpp               | 185 ++--
 sycl/src/prefill/prefill.cpp                  | 115 ++-
 sycl/src/program/generate.cpp                 | 464 +++++++++-
 sycl/tools/fixups.py                          |   4 +
 47 files changed, 3091 insertions(+), 416 deletions(-)
 create mode 100644 sycl/src/kernels/q5_projection_parity.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index e8939dbeea2..28ad6f85e8a 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -28,7 +28,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
 on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
-tokens) on engine 0.1.31-sycl (2026-10-01);
+tokens) on engine 0.1.31-sycl (2026-10-01; 0.1.32-sycl reproduces them exactly);
 "Decode round 2" below lists what each change bought.
 
 ## Setup
@@ -490,6 +490,23 @@ part of the procedure now: it caught a dropped mirror hook and four doorbell wai
   kernel alike; no model here uses it), `s2_expert_grouped_parity` (the s2 path), `kv_hybrid_parity`'s last step
   (needs the unported tensor-core prompt kernel). `ple_parity` and `native_expert_parity` need model files.
 
+**The 0.1.32 merge (2026-10-01).** Upstream 0.1.31 -> 0.1.32 (89 commits) by the same steps; the hash-only
+differences are now canonicalized before `git merge-file` (the port's kernel-name hashes are kept), which left 10
+files with real conflicts. What it needed:
+
+- **Upstream's async commit** (`set_commit_async` / `wait_commit`) maps onto the port's own deferred commit
+  (`commit(n, err, false)` + `commit_finish`); `wait_commit` is `commit_finish`.
+- **Upstream's new hyper-connection read variants** (split / staged, chosen per card by a bit-for-bit self-test at
+  start) are not used by the port, which keeps its sliced down / split norm read; the self-test segfaulted on the
+  B70, so on SYCL it runs only with `STRATA_HC_CHECK=1` (open). The port's split-norm kernel was renamed
+  (`gr_norm_split_port_kernel`): upstream now has one of the same name.
+- Two kernel names collided after hash canonicalization (renamed), and fused_gr's per-block shared-memory query is
+  a fixup now.
+- **Result:** every output identical to 0.1.31 (Coder 19 / 2,184-token prompts and IQ2_XS, 256 greedy tokens),
+  same speeds (Coder 77.7-78.1 / 75.7 tok/s, IQ2_XS 58.5), 40K prompt 1,201 tok/s then 65.1 tok/s decode.
+  `kv_hybrid_parity` and `qsa_prompt_attn_parity` pass (the tests now turn on the XMX prompt attention they
+  check); `iq_multi_parity` (IQ2_XS) and `s2_expert_grouped_parity` as before.
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index c7e3697a368..6444dd872a9 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.31 LANGUAGES C CXX)   # the upstream engine version this port tracks
+project(strata_sycl VERSION 0.1.32 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
diff --git a/sycl/include/strata/core/coupled_draft.hpp b/sycl/include/strata/core/coupled_draft.hpp
index 78e6c9390d0..f7640d57042 100644
--- a/sycl/include/strata/core/coupled_draft.hpp
+++ b/sycl/include/strata/core/coupled_draft.hpp
@@ -52,15 +52,23 @@ namespace strata::core {
 /// The longest penalty window the coupled drafter mirrors (serve's kPenaltyWindowCap).
 inline constexpr int kCoupledHistCap = 4096;
 
-/// STRATA_SPEC_COUPLED=1 (any value but empty or "0"): read once.
-inline bool coupled_draft_env() {
-    static const bool on = [] {
+inline bool& coupled_draft_state() {
+    static bool on = [] {
         const char* e = std::getenv("STRATA_SPEC_COUPLED");
         return e != nullptr && *e != '\0' && std::strcmp(e, "0") != 0;
     }();
     return on;
 }
 
+/// Whether coupled draft sampling is enabled (via STRATA_SPEC_COUPLED=1 or --coupled-draft CLI flag).
+inline bool coupled_draft_env() {
+    return coupled_draft_state();
+}
+
+inline void set_coupled_draft(bool on) {
+    coupled_draft_state() = on;
+}
+
 /// The MTP cell of chain step j after a window at `p` with `a` drafts accepted (draft() runs step j there).
 STRATA_COUPLED_HD inline int64_t coupled_draft_cell(int64_t p, int a, int j) { return p + a + j; }
 
diff --git a/sycl/include/strata/core/session.hpp b/sycl/include/strata/core/session.hpp
index 526dc3dfff9..af9cbfc777a 100644
--- a/sycl/include/strata/core/session.hpp
+++ b/sycl/include/strata/core/session.hpp
@@ -99,6 +99,9 @@ uint64_t session_bytes(const ModelGeometry& g, int64_t max_cells, int64_t k, int
 /// Carves `base` (DEVICE memory) into `s`.  Returns the bytes used.  Same range convention as `session_bytes`.
 uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void* base, SessionState& s,
                       int64_t layer_lo = 0, int64_t layer_hi = -1);
+/// Before the memory `session_init` carved is freed: forgets what points into it from outside the session (the
+/// rope kernels' registered angle table, #280), so a later session never rotates by freed memory.
+void session_release(SessionState& s);
 /// Zeroes every layer's state - the residual to `R_init`, everything else to zero, so a fresh sequence starts
 /// from the reference's own `zeros()`.
 void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init, void* stream);
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index 7d8bfb0d576..3b676c41423 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -75,6 +75,9 @@ class Verifier {
     /// One window: `tokens[0..T)` at positions pos0.., the pool served per layer; `out[t]` = argmax after token t.
     /// The PLE rows are gathered here from `ss.ple_prev` and the tokens.  Captures the T-token graph on first use.
     bool run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool, void* user, int32_t* out, std::string& err);
+    /// Diagnostics: row `t` of the last window's head logits (n_vocab floats) to the host. Valid after run().
+    bool copy_logits(int t, float* host) const;
+    int64_t vocab() const { return next_ ? next_->vocab() : n_vocab_; }
     /// The sampling the verify window's head applies (temperature / top_p / top_k / seed).  Set per
     /// request; greedy by default.  The sampling itself runs OUTSIDE the captured graph - its
     /// parameters would otherwise be baked forever - so this can change between requests freely.
@@ -123,6 +126,14 @@ class Verifier {
     /// SYCL port: capture every window graph now (one per window size) instead of on first use, so the first
     /// request does not pay for them (a 2,400-node graph takes tens of ms to finalize on this backend).
     bool warm(std::string& err);
+    /// (upstream 0.1.32; the port maps it onto commit_finish, verify.cpp) commit() returns without waiting for its graph (a single-GPU session sets it): the next window follows it on
+    /// the same stream and the drafter reads nothing it writes, so it overlaps the draft. Whoever reads or writes
+    /// the session from another stream or the host afterwards (a new request, a checkpoint, a snapshot, the prompt
+    /// path, the end of a run) calls wait_commit() first.  STRATA_COMMIT_SYNC=1 keeps the wait.
+    static void set_commit_async(bool on);
+    /// Waits for the last commit graph when commit() did not (an event recorded after it, not the whole device);
+    /// false with `err` when it failed.  Free when nothing is pending.
+    bool wait_commit(std::string& err);
 
     /// Measurement hook (STRATA_LOGPOS): after run(), write one line per row t of the last window's head -
     /// "pos target logprob top top_logprob hit extra_logprob target_logprob_without_extra" - where row t is the
@@ -182,7 +193,8 @@ class Verifier {
     int pending_commit_ = 0;                  ///< n_keep of a launched, unfinished commit (0: none)
     std::chrono::steady_clock::time_point pending_commit_t0_{};
     bool record_window(int T, dpct::queue_ptr cs, std::string &err);
-    static constexpr int kProfPer = 32;              // stamps per layer
+    static constexpr int kProfPer = 33;              // stamps per layer (32 left the hc-read second
+                                      // half's up-stamp at slot 32 = the next layer's slot 0: D8)
     bool prof_on_ = false;
     unsigned long long* prof_ = nullptr;              // device: n_layers * kProfPer + 4 stamps
     std::vector<unsigned long long> prof_h_;
@@ -219,6 +231,10 @@ class Verifier {
     uint32_t* h_flag_ = nullptr; uint32_t* m_flag_ = nullptr;
     uint32_t* h_flagA_ = nullptr; uint32_t* m_flagA_ = nullptr;  // the GPU plan is in place
     uint32_t* h_flagB_ = nullptr; uint32_t* m_flagB_ = nullptr;  // the PCIe share's DMA copies have landed
+    dpct::event_ptr commit_done_ =
+        nullptr; // recorded after an async commit (set_commit_async); see
+                 // wait_commit
+    bool commit_pending_ = false;
     dpct::queue_ptr copy_ =
         &dpct::get_in_order_queue(); // the copy engine's stream (DMA of missed
                                      // experts)
diff --git a/sycl/include/strata/kernels/mrope.hpp b/sycl/include/strata/kernels/mrope.hpp
index fecd3737857..ed27cf80911 100644
--- a/sycl/include/strata/kernels/mrope.hpp
+++ b/sycl/include/strata/kernels/mrope.hpp
@@ -19,12 +19,32 @@
 #include <dpct/dpct.hpp>
 #include <cstdint>
 
+#include "strata/kernels/rope_scaling.hpp"
+
 namespace strata::kernels {
 
 /// The table of the CURRENT device (a layer split sets one per device; null = the identity).
 void mrope_table_set(const int32_t* device_table);
 const int32_t* mrope_table();
 
+/// #280, opt-in (STRATA_ROPE_TABLE=1): the rotation angles, 32 pairs of a 64-wide rotary slice, from the session's
+/// float64 table (build_rope_table, [max_pos][32] cos and sin in VRAM, the rope scaling inside) of the CURRENT
+/// device.  With it the rope kernels rotate by the table's exact angles; without it they compute pos * powf(...) with cosf/sinf, which under
+/// --use_fast_math is 0.0014 rad off at 32K and ~0.02 at 262K, and the prompt path (precise libm) and decode
+/// (fast-math) disagree with each other.
+struct RopeTab {
+    const float* cos = nullptr;   ///< null: no table, the kernels compute the angle as they always did
+    const float* sin = nullptr;
+    int max_pos = 0;
+};
+/// Registers the table the session just built with `scaling` (the latest one of the device wins).
+void rope_table_set(const float* cos_tab, const float* sin_tab, int max_pos, const RopeScaling& scaling);
+/// Forgets the table `cos_tab` (on every device) - before the memory that holds it is freed (session_release).
+void rope_table_release(const float* cos_tab);
+/// The registered table when STRATA_ROPE_TABLE=1 and it was built with `scaling`; otherwise none (the default: the
+/// kernels compute the angle exactly as before).
+RopeTab rope_table_for(const RopeScaling& scaling);
+
 #if defined(SYCL_LANGUAGE_VERSION) || defined(__HIPCC__)
 /// ggml rope_multi, is_imrope, sections {11, 11, 10, 0}: sector = pair % 32; sector % 3 == 1 -> h (sector < 33),
 /// == 2 -> w (sector < 30), == 0 -> t (sector < 33).  For pairs 0..31 all three bounds hold, so it is pair % 3.
@@ -36,6 +56,25 @@ __dpct_inline__ int mrope_pos(const int32_t *tab, int pos, int pair) {
     */
     return tab ? *(tab + (size_t)pos * 3 + pair % 3) : pos;
 }
+/// cos and sin of rotary position p, pair `pair` (0..31) from the table (scaling and magnitude included); false
+/// when there is no table or p lies past it - then the caller computes the angle as it always did
+__dpct_inline__ bool rope_tab_cs(const RopeTab &t, int p, int pair, float &c,
+                                 float &s) {
+    if (t.cos == nullptr || p < 0 || p >= t.max_pos) return false;
+    /*
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    c = *(t.cos + (size_t)p * 32 + pair);
+    /*
+    DPCT1098: The '*' expression is used instead of the __ldg call. These
+    two expressions do not provide the exact same functionality. Check the
+    generated code for potential precision and/or performance issues.
+    */
+    s = *(t.sin + (size_t)p * 32 + pair);
+    return true;
+}
 #endif
 
 }  // namespace strata::kernels
diff --git a/sycl/src/core/conversation_snapshot.cpp b/sycl/src/core/conversation_snapshot.cpp
index 74ea5dcfc37..92664a7b383 100644
--- a/sycl/src/core/conversation_snapshot.cpp
+++ b/sycl/src/core/conversation_snapshot.cpp
@@ -45,8 +45,12 @@ bool layout(const QsaState& st, const ModelGeometry& g, int64_t upto, bool index
     // Include the moving spare row, not only completed blocks. The checkpoint
     // restore reconstructs that row when rewinding to an earlier prefix.
     const int64_t pooled = index && upto > 0 ? upto / s.idx_block + 1 : 0;
-    // Format 3 identifies snapshot K8V4 only; never pass it to the block movers.
-    l = {st.kv_hybrid ? 3 : qsa_kv_format(st), cells, pooled, s.page_size, 0, 0, 0, 0, 0};
+    // Format 3 identifies snapshot K8V4 only; never pass it to the block movers.  Rotated INT8 K/V (#293,
+    // STRATA_KV_ROT=1) is another format too (+16): its bytes mean nothing to a state that does not rotate, so a
+    // snapshot or prompt checkpoint taken with the rotation never restores into one without it, nor the reverse.
+    // (Q4_0 is always rotated: nothing to tell apart; without the rotation the format is the one it always was.)
+    const int rotated = st.kv_rot && !st.kv_q4 && !st.kv_hybrid ? 16 : 0;
+    l = {(st.kv_hybrid ? 3 : qsa_kv_format(st)) + rotated, cells, pooled, s.page_size, 0, 0, 0, 0, 0};
     using conversation_detail::product;
     if (!product(l.data, {(uint64_t) cells, (uint64_t) g.n_head_kv, per}) ||
         !product(l.scales, {(uint64_t) cells, (uint64_t) g.n_head_kv,
diff --git a/sycl/src/core/conversation_snapshot_test.cpp b/sycl/src/core/conversation_snapshot_test.cpp
index 7544df2abda..c42233bb28f 100644
--- a/sycl/src/core/conversation_snapshot_test.cpp
+++ b/sycl/src/core/conversation_snapshot_test.cpp
@@ -313,6 +313,17 @@ int main() {
             }
             auto bad=a; bad.head_dim++;
             check(!conversation_kv_restore(bad,f.state,f.g,upto,index,err),"reject incompatible geometry");
+            if (fmt==kKvInt8) {
+                // #293: INT8 K/V saved through the Hadamard rotation (STRATA_KV_ROT=1) never restores into a state
+                // without it, nor the reverse
+                f.state.kv_rot=true;
+                ConversationKv rotated;
+                check(conversation_kv_save(rotated,f.state,f.g,upto,index,err),"save rotated INT8");
+                check(!conversation_kv_restore(a,f.state,f.g,upto,index,err),"unrotated image into a rotated state rejected");
+                f.state.kv_rot=false;
+                check(!conversation_kv_restore(rotated,f.state,f.g,upto,index,err),"rotated image into an unrotated state rejected");
+                check(conversation_kv_restore(a,f.state,f.g,upto,index,err),"unrotated image still restores");
+            }
             if (!a.k.empty()) {
                 bad=a; bad.k.pop_back();
                 check(!conversation_kv_restore(bad,f.state,f.g,upto,index,err),"reject malformed payload");
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
index 5804ed88c21..fad48c260bb 100644
--- a/sycl/src/core/device.dp.cpp
+++ b/sycl/src/core/device.dp.cpp
@@ -109,6 +109,33 @@ std::string gpu_arch_problem(int ordinal) {
 #endif
 }
 
+std::string device_code_error() try {
+#if defined(STRATA_USE_HIP)
+    return "";   // gpu_arch_problem() checks the HIP architectures against STRATA_HIP_ARCHS, before this point
+#else
+    // every .cu of the engine is compiled for the same CMAKE_CUDA_ARCHITECTURES, so this kernel stands for all
+    dpct::kernel_function_info a{};
+    const dpct::err0 e = DPCT_CHECK_ERROR(
+        dpct::get_kernel_function_info(&a, (const void *)poison_kernel));
+    if (e == 0) return {};
+    /*
+    DPCT1026: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+    return dpct::get_error_string_dummy(e);
+#endif
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 DeviceInfo device_info(int ordinal) {
     int count = 0;
     check(DPCT_CHECK_ERROR(count = dpct::device_count()), "cudaGetDeviceCount");
@@ -245,8 +272,8 @@ DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
                 });
             }
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not
-            use the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             check(0, "poison_kernel");
diff --git a/sycl/src/core/layer.cpp b/sycl/src/core/layer.cpp
index 0ac8fb1e75e..54da32fd567 100644
--- a/sycl/src/core/layer.cpp
+++ b/sycl/src/core/layer.cpp
@@ -26,6 +26,7 @@
 #include "strata/kernels/native_router.hpp"
 #include "strata/kernels/native_qsa.hpp"
 #include "strata/kernels/native_qsa_indexer.hpp"
+#include "strata/kernels/mrope.hpp"
 #include "strata/kernels/native_rope.hpp"
 #include "strata/kernels/native_flash_attn.hpp"
 #include "strata/kernels/fused_gr.hpp"
@@ -175,8 +176,9 @@ if (!w.wants_q8k()) {        s_gemv_q8_0_split(x80, p.codes, p.scales, p.offset,
 // namespace
 void layer_set_native_bf16(bool enabled) { native_bf16_projections = enabled; }
 void layer_set_native_flash_attn_short(bool enabled) { native_flash_attn_short = enabled; }
-namespace { bool g_kv_int8 = false, g_kv_q4 = false, g_kv_hybrid = false; }
+namespace { bool g_kv_int8 = false, g_kv_q4 = false, g_kv_hybrid = false, g_kv_int8_rot = false; }
 void qsa_set_kv_int8(bool enabled) { g_kv_int8 = enabled; }
+void qsa_set_kv_int8_rotate(bool enabled) { g_kv_int8_rot = enabled; }
 bool qsa_kv_int8() { return g_kv_int8; }
 void qsa_set_kv_q4(bool enabled) { g_kv_q4 = enabled; }
 bool qsa_kv_q4() { return g_kv_q4; }
@@ -625,6 +627,7 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
         st.kv_int8 = false;
         st.kv_q4 = false;
     }
+    st.kv_rot = st.kv_q4 || (st.kv_int8 && g_kv_int8_rot);   // K8V4 rotates only V (below)
     st.kv_mode = p.mode;
     st.n_slots = p.slots;
     const uint64_t rows = (uint64_t) p.slots * s.n_head_kv * s.page_size;   // VRAM rows: the slots
@@ -752,6 +755,9 @@ uint64_t qsa_state_init(const ModelGeometry &g, int64_t max_cells, void *base,
         dpct::get_in_order_queue()
             .memcpy(st.sin_tab, hs.data(), hs.size() * 4)
             .wait();
+        st.owns_rope = true;
+        if (s.n_rot == 64)   // the native and prompt-path rope kernels read it (mrope.hpp, STRATA_ROPE_TABLE=1)
+            strata::kernels::rope_table_set(st.cos_tab, st.sin_tab, (int) max_cells, strata::kernels::rope_scaling());
     }
     // the page table starts as the IDENTITY, which is the simplest legal mapping and what a caller that does
     // not page at all wants; a streamed state starts with nothing resident, a ring at `block % n_slots`.
@@ -1041,11 +1047,14 @@ if (st.kv_hybrid) {
     strata::kernels::fwht256_inplace_cuda(b.vcur, g.n_head_kv, stream);
     kv_append_q8_step(st.k_q, st.k_q, st.k_scale, st.k_scale, st.page_table, st.step, b.kcur, b.kcur, s, stream, nullptr);   // mode 0: no host mirror
     strata::kernels::kv_append_q4_step(st.v_q4, st.v_q4, st.page_table, st.step, b.vcur, b.vcur, s, stream, nullptr);
-} else if (st.kv_q4) {
-    strata::kernels::fwht256_inplace_cuda(b.kcur, g.n_head_kv, stream);   // Q4_0: rotated K and V (kv_q4.hpp)
+} else {
+if (st.kv_rot) {   // rotated K and V (kv_q4.hpp): Q4_0, and INT8 with STRATA_KV_ROT=1
+    strata::kernels::fwht256_inplace_cuda(b.kcur, g.n_head_kv, stream);
     strata::kernels::fwht256_inplace_cuda(b.vcur, g.n_head_kv, stream);
+}
+if (st.kv_q4) {
     strata::kernels::kv_append_q4_step(st.k_q4, st.v_q4, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);
-} else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
+} else if (st.kv_int8) kv_append_q8_step(st.k_q, st.v_q, st.k_scale, st.v_scale, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host);    else kv_append_step(st.k_pool, st.v_pool, st.page_table, st.step, b.kcur, b.vcur, s, stream, &st.host); } /* not K8V4 */    {        const uint64_t nvk = (uint64_t) g.n_head_kv * g.head_dim;        const uint64_t base = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim + 2 * nvk + 8;        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.k_pool, base, nvk / 2, stream);        if (!st.kv_int8 && !st.kv_hybrid) dump_slot(dump, g, layer, (const float*) st.v_pool, base + nvk / 2, nvk / 2, stream);        dump_slot(dump, g, layer, b.vcur, base + nvk, nvk, stream);        dump_slot(dump, g, layer, b.kcur, base + 2 * nvk, nvk, stream);    }    {        const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};        if (native_qsa_indexer_enabled()) {
     try {
         native_qsa_indexer_append(b.idx_raw, st.step + kStepPos, pos_base,
             (const float*) w_ikn->data, RMS_EPS, ib, s, st.max_cells, rope_scaling(), stream);
@@ -1091,7 +1100,7 @@ int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
     }
     // KV streaming: every block the selection names is made resident before anything reads it
     qsa_kv_resolve(st, g, b.ids, st.step, 1, cap, stream);
-    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(b.qcur, g.n_head, stream);   // <Hq, Hk> = <q, k>
+    if (st.kv_rot) strata::kernels::fwht256_inplace_cuda(b.qcur, g.n_head, stream);   // <Hq, Hk> = <q, k>
     if (g_fast_attn && !native_flash_attn_short && dump == nullptr) {
         const strata::kernels::QsaAttnPools pools = qsa_attn_pools(st);
         strata::kernels::qsa_decode_attn_step(b.qcur, pools, b.ids, st.step, cap, s, b.attn_scratch, b.attn, stream);
@@ -1125,7 +1134,7 @@ int64_t max_blocks = (st.max_cells / s.idx_block) + 2;
     }
 } else qsa_attend_step(b.qcur, b.k_scratch, b.v_scratch, st.step, cap, s, b.attn, nullptr, stream);
     }
-    if (st.kv_q4 || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(b.attn, g.n_head, stream);   // the output back: H is self-inverse
+    if (st.kv_rot || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(b.attn, g.n_head, stream);   // the output back: H is self-inverse
     dump_slot(dump, g, layer, b.attn, (uint64_t) 2 * g.n_embd + 2 * g.hc,                            (uint64_t) g.n_head * g.head_dim, stream);    {        const uint64_t vs = (uint64_t) 2 * g.n_embd + 2 * g.hc + (uint64_t) g.n_head * g.head_dim +                            (uint64_t) 2 * g.n_head_kv * g.head_dim;        dump_slot(dump, g, layer, (const float*) b.v_scratch, vs,                            (uint64_t) g.n_head_kv * g.head_dim / 2, stream);        dump_slot(dump, g, layer, (const float*) b.ids, vs + (uint64_t) g.n_head_kv * g.head_dim / 2, 4, stream);        dump_slot(dump, g, layer, (const float*) st.step,                            vs + (uint64_t) g.n_head_kv * g.head_dim / 2 + 4, 4, stream);    }
 // ---- 9. Gate the attention output before its projection. Native CUDA keeps F32
 // sigmoid/multiply arithmetic and uses Q8_1 for the native quantized projection.
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index 4e9a013c09e..b862ead22f8 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -572,12 +572,15 @@ bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
         native_mmvq(GGML_Q8_0, q8("self_attn.v_proj.weight"), xq_, vcur_, (int) N, (int) (NKV * HD), T, cs);
         for (int t = 0; t < T; ++t) {
             norm_rope(kcur_ + t * NKV * HD, f32("self_attn.k_norm.weight"), (int) NKV, (int) HD, pos + t * NH);
-            if (st_.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V
+            if (st_.kv_rot) {   // rotated K and V (kv_q4.hpp): Q4_0, and INT8 with STRATA_KV_ROT=1
                 fwht256_inplace_cuda(kcur_ + t * NKV * HD, NKV, cs);
                 fwht256_inplace_cuda(vcur_ + t * NKV * HD, NKV, cs);
+            }
+            // stored in the state's own format (#293 appended rotated INT8 K/V as Q4_0, into pools INT8 never has)
+            if (st_.kv_q4)
                 kv_append_q4_step(st_.k_q4, st_.v_q4, st_.page_table, step + t * 4, kcur_ + t * NKV * HD,
                                   vcur_ + t * NKV * HD, s, cs, &st_.host);
-            } else if (st_.kv_int8)
+            else if (st_.kv_int8)
                 kv_append_q8_step(st_.k_q, st_.v_q, st_.k_scale, st_.v_scale, st_.page_table, step + t * 4,
                                   kcur_ + t * NKV * HD, vcur_ + t * NKV * HD, s, cs, &st_.host);
             else
@@ -602,12 +605,12 @@ bool MtpDrafter::record_forward(int T, int step_row0, dpct::queue_ptr cs,
                 return false;
             }
             norm_rope(qc, f32("self_attn.q_norm.weight"), (int) NH, (int) HD, pos + t * NH);
-            if (st_.kv_q4) fwht256_inplace_cuda(qc, NH, cs);
+            if (st_.kv_rot) fwht256_inplace_cuda(qc, NH, cs);
         }
         const QsaAttnPools pools = qsa_attn_pools(st_);
         if (window_ > 0) window_ids(const_cast<int32_t*>(step), T, (int) window_, ident_, cap_, cs);
         qsa_decode_attn_batch(qcur_, pools, ident_, step, cap_, s, attn_scratch_, attn_, T, cs);
-        if (st_.kv_q4) fwht256_inplace_cuda(attn_, (int64_t) T * NH, cs);
+        if (st_.kv_rot) fwht256_inplace_cuda(attn_, (int64_t) T * NH, cs);
         for (int t = 0; t < T; ++t)
             native_qsa_gate_apply(attn_ + t * NH * HD, qfull_ + t * NH * 2 * HD, attn32_ + t * NH * HD, (int) NH, (int) HD, cs);
         native_quantize_q8_1(attn32_, xq_, (int) (NH * HD), T, cs);
diff --git a/sycl/src/core/native_dense.cpp b/sycl/src/core/native_dense.cpp
index 7b0ff4a312e..867c72767a8 100644
--- a/sycl/src/core/native_dense.cpp
+++ b/sycl/src/core/native_dense.cpp
@@ -60,6 +60,16 @@ bool NativeDense::served_names(const std::vector<std::string>& shards, bool incl
     }
 }
 
+bool NativeDense::keep_unquantized_ple_key(const std::string& pack_dir, std::set<std::string>& skip,
+                                           std::string& err) {
+    const std::string key = "blk.1.ple_key.weight";
+    if (!skip.count(key)) return true;
+    int code_bits = -1;
+    if (!WeightTable::index_code_bits(pack_dir, key, code_bits, err)) return false;
+    if (code_bits == 0) skip.erase(key);
+    return true;
+}
+
 NativeDense::~NativeDense() {
     if (scratch_) sycl::free(scratch_, dpct::get_in_order_queue());
     for (void *p : weights_)
@@ -148,6 +158,8 @@ bool NativeDense::load(const std::vector<std::string> &shards,
                 auto& ref = found->second;
                 if (ref.native_data) { err = "native dense: override already attached"; return false; }
                 if (!strata::kernels::native_mmvq_supported(tensor.type)) continue;
+                // #326: the pack keeps an unquantized (--compat-bf16) key, which the PLE reads from the arena
+                if (tensor.name == "blk.1.ple_key.weight" && !ref.quantized()) continue;
                 if (!ref.quantized() || tensor.shape.size() != 2 ||
                     ref.ne0 <= 0 || ref.ne0 > INT_MAX || ref.ne1 <= 0 || ref.ne1 > INT_MAX ||
                     tensor.shape[0] != (uint64_t) ref.ne0 || tensor.shape[1] != (uint64_t) ref.ne1) {
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
index 3ebfe6389ac..fd3f2bfea5c 100644
--- a/sycl/src/core/native_head.cpp
+++ b/sycl/src/core/native_head.cpp
@@ -163,13 +163,15 @@ bool NativeEmbed::load(const std::vector<std::string> &shards, int64_t n_embd,
                        int64_t n_vocab, std::string &err) try {
     try {
         const strata::GgufModel model(shards);
-        err = strata::check_architecture(model.meta());
+        // --embd-gguf's one-tensor file (tools/embd_bf16_pack.py) says "strata-embd": only its tensor is checked
+        const strata::MetaValue* arch = model.meta().get("general.architecture");
+        err = arch != nullptr && arch->s == "strata-embd" ? std::string() : strata::check_architecture(model.meta());
         if (!err.empty()) { err = "native embedding: " + err; return false; }
         size_t at = 0;
         const strata::TensorInfo* t = model.find("token_embd.weight", &at);
         const strata::GgufFile& gguf = model.shard(at);
         if (!t || t->shape.size() != 2 || t->shape[0] != (uint64_t) n_embd || t->shape[1] != (uint64_t) n_vocab ||
-            !strata::kernels::iq_supported((int) t->type) || n_embd % 256) {
+            !strata::kernels::embed_type_supported((int) t->type) || n_embd % 256) {
             err = "native embedding: token_embd.weight is absent, of another shape, or of a type without a GPU "
                   "dequantizer";
             return false;
diff --git a/sycl/src/core/session.cpp b/sycl/src/core/session.cpp
index c4e7cf86d88..2c75bde594c 100644
--- a/sycl/src/core/session.cpp
+++ b/sycl/src/core/session.cpp
@@ -4,6 +4,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/core/session.hpp"
+#include "strata/kernels/mrope.hpp"
 #include "strata/core/progress.hpp"
 
 #include "strata/kernels/qsa.hpp"
@@ -129,6 +130,14 @@ uint64_t session_init(const ModelGeometry& g, int64_t max_cells, int64_t k, void
     return used;
 }
 
+void session_release(SessionState& s) {
+    for (int64_t j = 0; s.qsa_states != nullptr && j < s.qsa_alloc; ++j)
+        if (s.qsa_states[j].owns_rope) {
+            strata::kernels::rope_table_release(s.qsa_states[j].cos_tab);
+            s.qsa_states[j].owns_rope = false;
+        }
+}
+
 void session_zero(SessionState& s, const ModelGeometry& g, const float* R_init, void* stream) {
     dpct::queue_ptr cs = strata::q_of(stream);
     // the residual: `hc` copies of the one vector a caller hands in.  A real sequence's first token is the
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 1fdb4e07b30..6ac06f28283 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -220,6 +220,7 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
     device_ = dpct::get_current_device_id(); // a layer split's stage on another
                                              // GPU: its streams, graphs and
                                              // buffers live there
+    strata::kernels::fused_gr_check();   // once per card: which bitwise-equal hyper-connection read runs there
     wt_ = &wt;
     g_ = &g;
     ss_ = &ss;
@@ -643,7 +644,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 native_mmvq(wv->native_type, wv->native_data, xq_, vcur_ + tb * NKV * HD, (int) N, (int) (NKV * HD), n, cs);
                 if (qb) norm_rope(kcur_ + tb * NKV * HD, wkn, (int) (n * NKV), (int) HD, pos_k + tb * NKV);
                 else for (int t = tb; t < te; ++t) norm_rope(kcur_ + t * NKV * HD, wkn, (int) NKV, (int) HD, pos_ + t * NH);
-                if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): K and V rotated before they are stored
+                if (st.kv_rot) {   // K and V rotated before they are stored (kv_q4.hpp)
                     fwht256_inplace_cuda(kcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
                     fwht256_inplace_cuda(vcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
                 } else if (st.kv_hybrid) {   // K8V4: only V is rotated
@@ -693,6 +694,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                         return false;
                     }
                     norm_rope(qcur_ + tb * NH * HD, wqn, (int) (n * NH), (int) HD, pos_ + tb * NH);
+                    if (st.kv_rot) fwht256_inplace_cuda(qcur_ + tb * NH * HD, (int64_t) n * NH, cs);   // <Hq, Hk> = <q, k>
                     bf16_gemv_fp32_mmvf_multi(mixed_ + tb * N, N, (const uint16_t*) wiq->data, qidx_ + tb * IQ * ID, IQ * ID,
                                               N, IQ * ID, n, cs);
                     norm_rope(qidx_ + tb * IQ * ID, wiqn, (int) (n * IQ), (int) ID, pos_i + tb * IQ);
@@ -714,7 +716,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                         return false;
                     }
                     norm_rope(qc, wqn, (int) NH, (int) HD, pos_ + t * NH);
-                    if (st.kv_q4) fwht256_inplace_cuda(qc, NH, cs);   // <Hq, Hk> = <q, k>
+                    if (st.kv_rot) fwht256_inplace_cuda(qc, NH, cs);   // <Hq, Hk> = <q, k>
                 }
                 for (int t = tb; t < te; ++t) {
                     float* qx = qidx_ + t * IQ * ID;
@@ -735,7 +737,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                 qsa_decode_attn_batch(qcur_ + tb * NH * HD, pools, sel_ + (size_t) tb * cap_, step_ + tb * kStepCount, cap_,
                                       s, attn_scratch_ + (size_t) tb * attn_scratch_floats_, attn_ + tb * NH * HD, n, cs);
                 stamp(l, 13, grp);
-                if (st.kv_q4 || st.kv_hybrid) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
+                if (st.kv_rot || st.kv_hybrid) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
                 if (qb) native_qsa_gate_apply(attn_ + tb * NH * HD, qfull_ + tb * NH * 2 * HD, attn32_ + tb * NH * HD,
                                               (int) (n * NH), (int) HD, cs);
                 else
@@ -956,7 +958,7 @@ std::string Verifier::profile_report() {
                                           "k/v+norm-rope", "kv+idx append", "q+q-idx", "scores+topk", "kv-resolve",
                                           "attention", "gate", "", "out-proj", "hc-read1+router", "shared+quant",
                                           "waitA", "VRAM hits", "waitB", "PCIe grp", "waitCPU", "copy+combine",
-                                          "(gap)", "head", "  hc0 norm", "  hc0 down", "  hc0 up", "", ""};
+                                          "(gap)", "head", "  hc0 norm", "  hc0 down", "  hc0 up", "", "", ""};
     std::string out;
     char b[80];
     double total = 0;
@@ -1397,6 +1399,13 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                 .wait();
         const int64_t L = g.n_layers;
         auto at = [&](int64_t l, int i) { return prof_h_[(size_t) (l * kProfPer + i)]; };
+        // D8: the derived columns below read stamps the hc-read kernels write themselves or the next
+        // layer's first.  A slot no kernel stamped is 0 and its unsigned difference wrapped to ~1e19 ns -
+        // which is why (gap)/head/hc0 printed ~1e14 ms per window.  A missing or out-of-order stamp now
+        // contributes nothing.
+        const auto gap = [](unsigned long long to, unsigned long long from) {
+            return (from != 0 && to != 0 && to >= from) ? (double) (to - from) : 0.0;
+        };
         for (int64_t l = 0; l < L; ++l) {
             const int kind = is_qsa_layer(g, l) ? 1 : 0;
             unsigned long long prev = at(l, 0);
@@ -1406,13 +1415,16 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                 prof_sum_[kind][i] += (double) (x - prev);
                 prev = x;
             }
-            if (l + 1 < L) prof_sum_[kind][25] += (double) (at(l + 1, 0) - at(l, 24));
-            prof_sum_[kind][27] += (double) (at(l, 27) - at(l, 0));    // hc-read0: norm
-            prof_sum_[kind][28] += (double) (at(l, 28) - at(l, 27));   //           down
-            prof_sum_[kind][29] += (double) (at(l, 1) - at(l, 28));    //           up
-            prof_sum_[kind][1] -= (double) (at(l, 1) - at(l, 0));      // (hc-read0 shown split)
+            if (l + 1 < L) prof_sum_[kind][25] += gap(at(l + 1, 0), at(l, 24));
+            const double dn = gap(at(l, 27), at(l, 0)), dd = gap(at(l, 28), at(l, 27)), du = gap(at(l, 1), at(l, 28));
+            if (dn > 0 && dd > 0 && du > 0) {   // the split exists: show it split, not twice
+                prof_sum_[kind][27] += dn;      // hc-read0: norm
+                prof_sum_[kind][28] += dd;      //           down
+                prof_sum_[kind][29] += du;      //           up (through both halves, as before)
+                prof_sum_[kind][1] -= gap(at(l, 1), at(l, 0));   // (hc-read0 shown split)
+            }
         }
-        prof_sum_[0][26] += (double) (at(L, 1) - at(L, 0));
+        prof_sum_[0][26] += gap(at(L, 1), at(L, 0));
         ++prof_windows_;
         if (std::getenv("STRATA_VERIFY_EAGER") != nullptr)   // SYCL port: the stage table per window, host-clocked
             std::fprintf(stderr, "verify stages T=%d (ms/window):%s\n", T, profile_report().c_str());
@@ -1562,9 +1574,24 @@ bool Verifier::window_logprobs(const int32_t* targets, int T, int64_t pos0, int3
         const double extra = has_extra ? (double) row[extra_id] - lse : NAN;
         const double without = has_extra && tgt != extra_id && sum_without > 0.0
                                    ? (double) row[tgt] - (maxv + std::log(sum_without)) : NAN;
-        std::fprintf(out, "%lld\t%d\t%.9f\t%lld\t%.9f\t%d\t%.9f\t%.9f\n", (long long) (pos0 + t), (int) tgt,
+        std::fprintf(out, "%lld\t%d\t%.9f\t%lld\t%.9f\t%d\t%.9f\t%.9f", (long long) (pos0 + t), (int) tgt,
                      (double) row[tgt] - lse, (long long) top, maxv - lse, (int) (top == (int64_t) tgt), extra,
                      without);
+        // STRATA_LOGPOS_TOPK=K: the K most likely tokens and their log-probabilities too (`id:logprob`), for a
+        // top-k comparison with another engine on the same tokens (docs/UNSLOTH_Q4.md)
+        static const int topk = [] {
+            const char* v = std::getenv("STRATA_LOGPOS_TOPK");
+            return v != nullptr ? std::max(0, std::min(256, std::atoi(v))) : 0;
+        }();
+        if (topk > 0) {
+            std::vector<int32_t> order((size_t) n_vocab_);
+            for (int64_t v = 0; v < n_vocab_; ++v) order[(size_t) v] = (int32_t) v;
+            std::partial_sort(order.begin(), order.begin() + topk, order.end(),
+                              [&](int32_t a, int32_t b) { return row[a] > row[b]; });
+            for (int j = 0; j < topk; ++j)
+                std::fprintf(out, "\t%d:%.6f", order[(size_t) j], (double) row[order[(size_t) j]] - lse);
+        }
+        std::fprintf(out, "\n");
     }
     std::fflush(out);
     return true;
@@ -1573,6 +1600,12 @@ bool Verifier::window_logprobs(const int32_t* targets, int T, int64_t pos0, int3
     return false;
 }
 
+// Upstream's set_commit_async/wait_commit (0.1.32) on the port's own deferred commit: commit(n, err, false) leaves
+// the graph running and commit_finish() collects it (it also advances ss.ple_prev, so a pending commit must be
+// finished before the next window). The flag is kept for the API; the port decides per call site (generate.cpp).
+namespace { bool g_commit_async = false; }
+void Verifier::set_commit_async(bool on) { g_commit_async = on && std::getenv("STRATA_COMMIT_SYNC") == nullptr; }
+
 bool Verifier::commit(int n_keep, std::string &err, bool wait) try {
     const OnDevice on_device(device_);
     if (n_keep < 1 || n_keep > last_t_) { err = "verify: commit count out of range"; return false; }
@@ -1646,4 +1679,20 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+bool Verifier::wait_commit(std::string& err) {
+    if (!commit_finish(err)) return false;
+    return next_ == nullptr || next_->wait_commit(err);
+}
+
+bool Verifier::copy_logits(int t, float* host) const {
+    if (next_ != nullptr) return next_->copy_logits(t, host);   // a layer split: the head is on the last stage
+    if (head_logits_ == nullptr || host == nullptr || t < 0 || n_vocab_ <= 0) return false;
+    try {
+        cs_->memcpy(host, head_logits_ + (size_t) t * (size_t) n_vocab_, (size_t) n_vocab_ * sizeof(float)).wait();
+    } catch (sycl::exception const&) {
+        return false;
+    }
+    return true;
+}
+
 }  // namespace strata::core
diff --git a/sycl/src/core/weights.cpp b/sycl/src/core/weights.cpp
index e09aa13cfd9..7a7ed123c13 100644
--- a/sycl/src/core/weights.cpp
+++ b/sycl/src/core/weights.cpp
@@ -119,6 +119,29 @@ bool WeightTable::pool_bytes(const std::string& pack_dir, uint64_t& out, std::st
     return true;
 }
 
+bool WeightTable::index_code_bits(const std::string& pack_dir, const std::string& name, int& code_bits,
+                                  std::string& err) {
+    const std::string path = pack_dir + "/index.txt";
+    std::FILE* f = std::fopen(path.c_str(), "rb");
+    if (!f) { err = "cannot open " + path; return false; }
+    char line[1024];
+    code_bits = -1;
+    while (std::fgets(line, sizeof line, f)) {
+        if (line[0] == '#') continue;
+        char row[256] = {0};
+        unsigned long long dummy = 0;
+        long long ne = 0;
+        int i1 = 0, i2 = 0, bits = 0;
+        // the first ten fields of the row `load` parses: name file kind src_off src_bytes dst_off dst_bytes ne0 ne1 code_bits
+        if (std::sscanf(line, "%255s %d %d %llu %llu %llu %llu %lld %lld %d", row, &i1, &i2, &dummy, &dummy, &dummy,
+                        &dummy, &ne, &ne, &bits) != 10)
+            continue;
+        if (name == row) { code_bits = bits; break; }
+    }
+    std::fclose(f);
+    return true;
+}
+
 bool WeightTable::load(const std::string &pack_dir, void *arena_base,
                        uint64_t arena_bytes, std::string &err,
                        const std::set<std::string> *skip) try {
diff --git a/sycl/src/kernels/cuda/cvec.dp.cpp b/sycl/src/kernels/cuda/cvec.dp.cpp
index 8d0a4be4a7c..c118d517199 100644
--- a/sycl/src/kernels/cuda/cvec.dp.cpp
+++ b/sycl/src/kernels/cuda/cvec.dp.cpp
@@ -194,8 +194,8 @@ bool cvec_upload(const std::vector<float>& dir, const std::vector<float>& s, int
     for (int d = 0; d < kDevices; ++d) {
         if (g_dev[d].dir == nullptr) continue;
         /*
-        DPCT1093: The "d" device may be not the one intended for use. Adjust
-        the selected device if needed.
+        DPCT1093: The "d" device may be not the one intended for use.
+        Adjust the selected device if needed.
         */
         dpct::select_device(d);
         dpct::get_current_device().queues_wait_and_throw();
@@ -237,8 +237,8 @@ void cvec_set_enabled(bool on) {
     for (int d = 0; d < kDevices; ++d) {
         if (g_dev[d].on == nullptr) continue;
         /*
-        DPCT1093: The "d" device may be not the one intended for use. Adjust
-        the selected device if needed.
+        DPCT1093: The "d" device may be not the one intended for use.
+        Adjust the selected device if needed.
         */
         dpct::select_device(d);
         dpct::get_current_device()
diff --git a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
index 3f4e68a4ff0..272e9542527 100644
--- a/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
+++ b/sycl/src/kernels/cuda/dequant_bf16.dp.cpp
@@ -82,6 +82,17 @@ __dpct_inline__ void group32(const uint8_t *row_blocks, int gi_in_row, T *out) {
             put(out, j, (float) (((b[6 + j] & 0x0F) | xh0) - 16) * d);
             put(out, j + 16, (float) (((b[6 + j] >> 4) | xh1) - 16) * d);
         }
+    } else if constexpr (TYPE == 7) {                              // Q5_1
+        const uint8_t* b = row_blocks + (size_t) gi_in_row * 24;
+        const float d = h2f(b), m = h2f(b + 2);
+        const uint32_t qh = (uint32_t) b[4] | ((uint32_t) b[5] << 8) |
+                            ((uint32_t) b[6] << 16) | ((uint32_t) b[7] << 24);
+        for (int j = 0; j < 16; ++j) {
+            const int xh0 = ((qh >> j) & 1) << 4;
+            const int xh1 = ((qh >> (j + 16)) & 1) << 4;
+            put(out, j, (float) ((b[8 + j] & 15) | xh0) * d + m);
+            put(out, j + 16, (float) ((b[8 + j] >> 4) | xh1) * d + m);
+        }
     } else if constexpr (TYPE == 8) {                              // Q8_0
         const uint8_t* b = row_blocks + (size_t) gi_in_row * 34;
         const float d = h2f(b);
@@ -192,6 +203,7 @@ bool geometry(int type, int& block_elems, int& block_bytes) {
     switch (type) {
     case 2: block_elems = 32; block_bytes = 18; return true;
     case 6: block_elems = 32; block_bytes = 22; return true;
+    case 7: block_elems = 32; block_bytes = 24; return true;
     case 8: block_elems = 32; block_bytes = 34; return true;
     case 20: block_elems = 32; block_bytes = 18; return true;
     case 11: block_elems = 256; block_bytes = 110; return true;
@@ -243,6 +255,7 @@ void launch(int type, const void* blocks, int64_t row0, int64_t rows, int64_t co
     switch (type) {
     case 2: STRATA_DQ(2);
     case 6: STRATA_DQ(6);
+    case 7: STRATA_DQ(7);
     case 8: STRATA_DQ(8);
     case 11: STRATA_DQ(11);
     case 12: STRATA_DQ(12);
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 3421c8398e7..2a9f35b984f 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -5,12 +5,18 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/core/emulate.hpp"
 #include "strata/kernels/fused_gr.hpp"
 #include "strata/kernels/bf16_bits.hpp"
 #include "strata/kernels/verify_kernels.hpp"
 
+#include <atomic>
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
 
 namespace strata::kernels {
 namespace {
@@ -320,7 +326,7 @@ auto &part =
 // elements of stream c in the same order as in the per-token kernel (i = 4t + 1024k), and the warp and cross-warp
 // sums run in the same order, so rs and xn are bitwise the old kernel's. The scaled values stay in registers
 // (at most 3 float4 per thread) instead of a second pass over global memory.
-__dpct_inline__ void gr_norm_split_kernel(GrMulti m) {
+__dpct_inline__ void gr_norm_split_port_kernel(GrMulti m) {
     auto item = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     auto& part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS]>(item.get_group());
     auto& s_rs = *sycl::ext::oneapi::group_local_memory_for_overwrite<float>(item.get_group());
@@ -952,6 +958,538 @@ auto &lo = *sycl::ext::oneapi::group_local_memory_for_overwrite<
         m.a[k].mixed[d0 + col] = sum / (float) HC;
     }
 }
+// ================================ #315: split / staged - the same arithmetic, split differently ==================
+// The multi read's variants beside the plain read (0.1.31's default; not main's opt-in STRATA_GR_V3 read, which sums
+// in another order).  Every variant computes each output with exactly the plain read's operations in its order (so
+// bitwise the plain read and the single-token read); only who does what, and when, changes.  `fused_gr_check`
+// compares them on the card before a verify window uses them (STRATA_HC_SPLIT below).
+//  - the norm (split and staged): one block per token AND stream instead of one per token.  Each thread visits
+//    exactly the elements, in the order, it visited for that stream in the plain read, so every sum of squares and rs
+//    is the same; then it recomputes its R' * w_norm and writes it times rs (the plain read stored the product and
+//    scaled it in place: the same two roundings).  On an RTX 4080 SUPER, the plain read's norm took 0.58 ms per
+//    4-token round (96 launches of 1-4 blocks), this one 0.23 ms.
+//  - the down projection, split: the plain read's kernel.
+//  - the down projection, staged: the plain read's 8 rows per block and lane order, but the activations arrive by
+//    cp.async in half-stream tiles, two in flight, so no thread waits on a chain of loads, and they sit in shared
+//    memory as two planes (floats 0-3 and 4-7 of every 8), so a warp's reads hit no bank twice.  The next tile's
+//    weights are loaded while the current one is used.  A tile is 160 = 5 x 32 chunks of 8, so a lane still
+//    accumulates its chunks lane + 32 q in ascending order, as in the plain read with either tile.  Before sm_80
+//    (and on HIP) the staging is a plain copy: the same bits, only not asynchronous.
+constexpr int kHcPlain = 1, kHcSplit = 2, kHcStaged = 3;
+constexpr int H_TILE = 1280;                          // staged tile: half a stream = 160 chunks of 8, 5 per lane
+constexpr int HQ = H_TILE / 8 / 32;
+constexpr int N_HTILES = D / H_TILE;                  // 8
+static_assert(N % H_TILE == 0, "a staged tile never straddles two streams");
+static_assert(H_TILE % 256 == 0, "a staged tile holds whole rounds of 32 chunks: the plain read's lane order");
+
+/*
+DPCT1110: The total declared local variable size in device function
+gr_norm_split_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_norm_split_kernel(GrMulti m) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &part = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[WARPS]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_rs = *sycl::ext::oneapi::group_local_memory_for_overwrite<float>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const FusedGrArgs &a = m.a[item_ct1.get_group(2)];
+    const int c = item_ct1.get_group(1);
+    float *xn = m.xn + (size_t)item_ct1.get_group(2) * D;
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const float gw = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+    float ss = 0.0f;
+    for (int i = t * 4; i < D; i += THREADS * 4) {
+        if (i / N != c) continue;                       // another stream's element: another block's
+        const int d = i - c * N;
+        sycl::float4 r = *reinterpret_cast<const sycl::float4 *>(a.R + i);
+        if (a.apply) {
+            const sycl::float4 b =
+                *reinterpret_cast<const sycl::float4 *>(a.bo_prev + d);
+            r.x() = sycl::fma((float)(b.x()), (float)gw, r.x());
+                r.y() = sycl::fma((float)(b.y()), (float)gw, r.y());
+            r.z() = sycl::fma((float)(b.z()), (float)gw, r.z());
+                r.w() = sycl::fma((float)(b.w()), (float)gw, r.w());
+        }
+        const float sq =
+            r.x() * r.x() + r.y() * r.y() + r.z() * r.z() + r.w() * r.w();
+        ss += sq;
+    }
+    const float v = warp_sum(ss);
+    if (lane == 0) part[warp] = v;
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (t == 0) {
+        float s = 0.0f;
+#pragma unroll
+        for (int w = 0; w < WARPS; ++w) s += part[w];
+        s_rs = sycl::rsqrt(s / (float)N + a.eps);
+        a.rs[c] = s_rs;
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    const float rs = s_rs;
+    for (int i = t * 4; i < D; i += THREADS * 4) {
+        if (i / N != c) continue;
+        const int d = i - c * N;
+        sycl::float4 r = *reinterpret_cast<const sycl::float4 *>(a.R + i);
+        if (a.apply) {
+            const sycl::float4 b =
+                *reinterpret_cast<const sycl::float4 *>(a.bo_prev + d);
+            r.x() = sycl::fma((float)(b.x()), (float)gw, r.x());
+                r.y() = sycl::fma((float)(b.y()), (float)gw, r.y());
+            r.z() = sycl::fma((float)(b.z()), (float)gw, r.z());
+                r.w() = sycl::fma((float)(b.w()), (float)gw, r.w());
+        }
+        const sycl::float4 g =
+            *reinterpret_cast<const sycl::float4 *>(a.w_norm + i);
+        const float px = r.x() * g.x(), py = r.y() * g.y(), pz = r.z() * g.z(),
+                    pw = r.w() * g.w();
+        *reinterpret_cast<sycl::float4 *>(xn + i) =
+            sycl::float4(px * rs, py * rs, pz * rs, pw * rs);
+    }
+}
+
+#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP >= 800 &&      \
+    !defined(__HIPCC__)
+#define STRATA_GR_CP_ASYNC 1
+#endif
+__dpct_inline__ void cp_async16(void *smem, const void *gmem) {
+#if defined(STRATA_GR_CP_ASYNC)
+    auto sa = smem;
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.cg.shared.global [%0], [%1], 16;\n" ::"r"(sa),
+                 "l"(gmem)
+                 : "memory");
+#else
+    *(((uint32_t *)(uintptr_t)sa)) = *(((uint32_t *)(uintptr_t)gmem));
+    if (16 > 4)
+        *(((uint32_t *)(uintptr_t)sa) + 1) =
+            *(((uint32_t *)(uintptr_t)gmem) + 1);
+    if (16 > 8)
+        *(((uint32_t *)(uintptr_t)sa) + 2) =
+            *(((uint32_t *)(uintptr_t)gmem) + 2);
+    if (16 > 12)
+        *(((uint32_t *)(uintptr_t)sa) + 3) =
+            *(((uint32_t *)(uintptr_t)gmem) + 3);
+#endif
+#else
+    *reinterpret_cast<float4*>(smem) = *reinterpret_cast<const float4*>(gmem);
+#endif
+}
+__dpct_inline__ void cp_async_commit() {
+#if defined(STRATA_GR_CP_ASYNC)
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.commit_group;\n" ::: "memory");
+#else
+
+#endif
+#endif
+}
+__dpct_inline__ void cp_async_wait1() {
+#if defined(STRATA_GR_CP_ASYNC)
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.wait_group 1;\n" ::: "memory");
+#else
+
+#endif
+#endif
+}
+__dpct_inline__ void cp_async_wait0() {
+#if defined(STRATA_GR_CP_ASYNC)
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.wait_group 0;\n" ::: "memory");
+#else
+
+#endif
+#endif
+}
+
+// `dot8` with its 8 activations as two float4: the same eight fmaf in the same order
+__dpct_inline__ float dot8v(const sycl::uint4 w, const sycl::float4 x0,
+                            const sycl::float4 x1) {
+    float acc = 0.0f;
+    acc = sycl::fma(sycl::bit_cast<float>(w.x() << 16), (float)(x0.x()), acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.x() & 0xffff0000u), (float)(x0.y()),
+                    acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.y() << 16), (float)(x0.z()), acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.y() & 0xffff0000u), (float)(x0.w()),
+                    acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.z() << 16), (float)(x1.x()), acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.z() & 0xffff0000u), (float)(x1.y()),
+                    acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.w() << 16), (float)(x1.z()), acc);
+    acc = sycl::fma(sycl::bit_cast<float>(w.w() & 0xffff0000u), (float)(x1.w()),
+                    acc);
+    return acc;
+}
+
+// Stage tile `h` of every token into `buf`: [T][2 planes][160 chunks] float4, plane 0 = floats 0-3 of a chunk.
+__dpct_inline__ void stage_htile(const GrMulti &m, int T, int h,
+                                 sycl::float4 *buf, int t) {
+    for (int i = t; i < T * (H_TILE / 4); i += THREADS) {
+        const int k = i / (H_TILE / 4), s4 = i - k * (H_TILE / 4);   // s4: float4 of the tile, chunk s4/2, half s4&1
+        const float* src = m.xn + (size_t) k * D + (size_t) h * H_TILE + (size_t) s4 * 4;
+        cp_async16(buf + (size_t) k * (H_TILE / 4) + (s4 & 1) * (H_TILE / 8) + (s4 >> 1), src);
+    }
+}
+
+/*
+DPCT1110: The total declared local variable size in device function
+gr_down_staged_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gr_down_staged_kernel(GrMulti m, uint8_t *dpct_local) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto hbuf = (sycl::float4 *)dpct_local; // 2 buffers x [T][2][160] float4
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    const int T = m.T;
+    const bool inject_block = item_ct1.get_group(2) == DOWN_BLOCKS;
+    const int row = inject_block ? warp : item_ct1.get_group(2) * WARPS + warp;
+    const bool active = !(inject_block && (m.a[0].w_inject == nullptr || warp >= HC));
+    const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
+    const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
+    const size_t buf_f4 = (size_t) T * (H_TILE / 4);    // float4 per buffer (the second one follows the first)
+    float acc[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+    sycl::uint4 wv[HQ], wnext[HQ];
+    if (active) {
+#pragma unroll
+        /*
+        DPCT1098: The '*' expression is used instead of the __ldg call.
+        These two expressions do not provide the exact same functionality. Check
+        the generated code for potential precision and/or performance issues.
+        */
+        for (int q = 0; q < HQ; ++q) wv[q] = *(w4 + lane + 32 * q);
+    }
+    stage_htile(m, T, 0, hbuf, t);
+    cp_async_commit();
+    stage_htile(m, T, 1, hbuf + buf_f4, t);
+    cp_async_commit();
+#pragma unroll 1
+    for (int h = 0; h < N_HTILES; ++h) {
+        if (active && h + 1 < N_HTILES) {
+#pragma unroll
+            /*
+            DPCT1098: The '*' expression is used instead of the __ldg call.
+            These two expressions do not provide the exact same functionality.
+            Check the generated code for potential precision and/or performance
+            issues.
+            */
+            for (int q = 0; q < HQ; ++q)
+                wnext[q] = *(w4 + (h + 1) * (H_TILE / 8) + lane + 32 * q);
+        }
+        if (h + 1 < N_HTILES) cp_async_wait1();         // tile h has landed (h + 1 may still be on its way)
+        else cp_async_wait0();
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const sycl::float4 *cur = hbuf + (h & 1) * buf_f4;
+        if (active) {
+#pragma unroll
+            for (int q = 0; q < HQ; ++q) {
+                const int j = lane + 32 * q;
+#pragma unroll
+                for (int k = 0; k < kFusedGrMaxT; ++k) {
+                    if (k < T) {
+                        const sycl::float4 *pk = cur + (size_t)k * (H_TILE / 4);
+                        acc[k] += dot8v(wv[q], pk[j], pk[H_TILE / 8 + j]);
+                    }
+                }
+            }
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier(); // every warp is done with buffer h & 1
+        if (h + 2 < N_HTILES) stage_htile(m, T, h + 2, hbuf + (h & 1) * buf_f4, t);
+        cp_async_commit();                              // an empty group at the end keeps the wait counts simple
+        if (h + 1 < N_HTILES) {
+#pragma unroll
+            for (int q = 0; q < HQ; ++q) wv[q] = wnext[q];
+        }
+    }
+    if (!active) return;
+    float s[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
+    // lane k writes token k (every lane holds every sum after the xor reduction)
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        if (k >= T || lane != k) continue;
+        if (inject_block) {
+            m.a[k].inject_out[row] = s[k];
+        } else {
+            const float x = s[k] / (float) HC;
+            m.a[k].lo[row] = x / (1.0f + sycl::native::exp(-x));
+        }
+    }
+}
+
+// The tokens a down kernel may carry in one launch on the current card, and the plain read's tile: the plain read
+// stages n_tok * TILEV floats (1280 on sm_75, 2560 elsewhere), staged two tiles of n_tok * H_TILE.  The shared-memory
+// opt-in is set here once per device (a per-DEVICE setting: a layer split runs these kernels on two cards).
+int down_chunk(bool staged, int* tile_out) {
+    static bool attr[64] = {};
+    static int chunk[64] = {};   // tokens the plain down kernel may carry in one launch on this card
+    static int chunk_staged[64] = {};  // the same for staged
+    static int tile[64] = {};    // the plain down kernel's TILEV on this card (1280 on sm_75, 2560 elsewhere)
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    if (dev < 0 || dev >= 64) {
+        *tile_out = 2560;
+        return kFusedGrMaxT;
+    }
+    if (!attr[dev]) {
+        int optin = 0;
+        /*
+        DPCT1019: local_mem_size in SYCL is not a complete equivalent of
+        cudaDevAttrMaxSharedMemoryPerBlockOptin in CUDA. You may need to adjust
+        the code.
+        */
+        optin = dpct::get_device(dev).get_local_mem_size();
+        optin = strata::smem_optin_of(optin);   // STRATA_EMULATE_CC (tests only)
+        // the down kernel stages n_tok*TILEV floats of dynamic shared memory - 80 KB at the full 8 tokens of the
+        // CUDA tile.  sm_75 gets the smaller tile: all eight tokens fit one 40 KiB launch there (no more slicing),
+        // the TQ-5 prefetch holds half the registers, and the smaller blocks raise how many of the 41-block grid
+        // share an SM.  Cards whose opt-in is still below that (or that report no opt-in at all) slice the tokens;
+        // the down kernel's outputs (lo, inject_out) are strictly per-token, so the chunk boundaries are safe, and
+        // the up kernel below still sees every token of the batch in one launch.
+#if defined(__HIPCC__)
+        const bool small_tile = true;   // all eight tokens fit gfx1100's 64 KiB LDS at this tile
+#else
+        int cc_maj = 0, cc_min = 0;
+        cc_maj = dpct::get_device(dev).get_major_version();
+        cc_min = dpct::get_device(dev).get_minor_version();
+        const bool small_tile = strata::cc_major_of(cc_maj) * 10 + strata::cc_minor_of(cc_min) == 75;
+#endif
+        const int tv = small_tile ? 1280 : 2560;
+        tile[dev] = tv;
+        int want = (int) (kFusedGrMaxT * tv * sizeof(float));
+        if (optin > 0 && want > optin) want = optin;
+        if (small_tile) {
+            /*
+            DPCT1026: The call to cudaFuncSetAttribute was removed because
+            SYCL currently does not support corresponding setting.
+            */
+        } else {
+            /*
+            DPCT1026: The call to cudaFuncSetAttribute was removed because
+            SYCL currently does not support corresponding setting.
+            */
+        }
+        int want_staged = (int) (2 * kFusedGrMaxT * H_TILE * sizeof(float));
+        if (optin > 0 && want_staged > optin) want_staged = optin;
+        /*
+        DPCT1026: The call to cudaFuncSetAttribute was removed because SYCL
+        currently does not support corresponding setting.
+        */
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+; // drop any error the attempt left behind
+  // The opt-in is a promise a pre-Volta card does not keep: an sm_60 answers
+  // 65536 and accepts the cudaFuncSetAttribute for 61440 B, then fails the
+  // LAUNCH with "invalid argument".  What such a card will launch is its
+  // per-block limit, so the capacity comes from that below sm_70 - the same
+  // tokens the "no opt-in" branch assumes, but taken from the attribute that is
+  // actually enforced.
+#if defined(__HIPCC__)
+        const int usable = optin > 0 ? optin : 48 * 1024;
+#else
+        int cc = 0, per_block = 0;
+        cc = dpct::get_device(dev).get_major_version();
+        per_block = (int) dpct::get_device(dev).get_local_mem_size();   // SYCL: the work-group local memory
+        cc = strata::cc_major_of(cc);
+        const int usable = (cc >= 7 && optin > 0) ? optin : per_block;
+#endif
+        const int capacity = usable / (int) (tv * sizeof(float));
+        chunk[dev] = capacity < 1 ? 1 : (capacity > kFusedGrMaxT ? kFusedGrMaxT : capacity);
+        const int capacity_staged = usable / (int) (2 * H_TILE * sizeof(float));
+        chunk_staged[dev] = capacity_staged < 1 ? 1 : (capacity_staged > kFusedGrMaxT ? kFusedGrMaxT : capacity_staged);
+        attr[dev] = true;
+    }
+    *tile_out = tile[dev] ? tile[dev] : 2560;
+    return staged ? chunk_staged[dev] : chunk[dev];
+}
+
+// The multi read as `variant` (kHcPlain, kHcSplit or kHcStaged): the norm, the down projection in launches of as
+// many tokens as fit the card, the up projection; the profile's stamps after the norm and after the down projection.
+// kHcPlain is the default read exactly as before (never main's opt-in STRATA_GR_V3 path, which fused_gr_read_multi
+// takes first).
+void launch_multi(const GrMulti &m, int variant, dpct::queue_ptr st,
+                  unsigned long long *stamp_buf, int stamp_i0) {
+    const int n_tok = m.T;
+    if (variant >= kHcSplit) {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_norm_split_kernel_200589>>(
+            sycl::nd_range<3>(sycl::range(1, HC, (unsigned)n_tok) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_norm_split_kernel(m);
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_2f4d93>>(
+            sycl::nd_range<3>(sycl::range(1, 1, n_tok) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_norm_multi_kernel(m);
+            });
+    }
+    if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, (void*) st);
+    const bool staged = variant >= kHcStaged;
+    int tv = 2560;
+    const int chunk_tok = down_chunk(staged, &tv);
+    /*
+    DPCT1083: The size of local memory in the migrated code may be different
+    from the original code. Check that the allocated memory size in the migrated
+    code is correct.
+    */
+    const size_t per_tok =
+        (staged ? (size_t)2 * H_TILE : (size_t)tv) * sizeof(float);
+    for (int c0 = 0; c0 < n_tok; c0 += chunk_tok) {
+        const int ct = n_tok - c0 < chunk_tok ? n_tok - c0 : chunk_tok;
+        GrMulti c{};
+        if (ct == n_tok) {
+            c = m;
+        } else {
+            c.xn = m.xn + (size_t) c0 * D;
+            c.T = ct;
+            for (int k = 0; k < ct; ++k) c.a[k] = m.a[c0 + k];
+        }
+        const size_t smem = (size_t) ct * per_tok;
+        if (staged) {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class gr_down_staged_kernel_41b428>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        gr_down_staged_kernel(
+                            c, dpct_local_acc_ct1
+                                   .get_multi_ptr<sycl::access::decorated::no>()
+                                   .get());
+                    });
+            });
+        } else if (tv == 1280) {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class gr_down_multi_kernel_fa80e0,
+                                     dpct_kernel_scalar<1280>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        gr_down_multi_kernel<1280>(
+                            c, dpct_local_acc_ct1
+                                   .get_multi_ptr<sycl::access::decorated::no>()
+                                   .get());
+                    });
+            });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->submit([&](sycl::handler &cgh) {
+                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                    sycl::range(smem), cgh);
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class gr_down_multi_kernel_41414e,
+                                     dpct_kernel_scalar<2560>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                          sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
+                        32)]] {
+                        gr_down_multi_kernel<2560>(
+                            c, dpct_local_acc_ct1
+                                   .get_multi_ptr<sycl::access::decorated::no>()
+                                   .get());
+                    });
+            });
+        }
+    }
+    if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, (void*) st);
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        st->parallel_for<dpct_kernel_name<class gr_up_multi_kernel_1a7280>>(
+            sycl::nd_range<3>(sycl::range(1, 1, UPM_BLOCKS) *
+                                  sycl::range(1, 1, THREADS),
+                              sycl::range(1, 1, THREADS)),
+            exp_props,
+            [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
+                gr_up_multi_kernel(m);
+            });
+    }
+}
+
+/// STRATA_HC_SPLIT: unset or 2 = the newest the check accepts (staged), 1 = at most split, 0 = the plain read
+int env_variant() {
+    const char* e = std::getenv("STRATA_HC_SPLIT");
+    if (e == nullptr || e[0] == '\0') return kHcStaged;
+    if (e[0] == '0') return kHcPlain;
+    if (e[0] == '1') return kHcSplit;
+    return kHcStaged;
+}
+
+// per device: the variant `fused_gr_check` chose (0 = not checked yet)
+std::atomic<int> g_variant[64];
+
 }  // namespace
 
 // one partials buffer per queue (the verifier's and the drafter's launches never share a queue; within a queue the
@@ -1128,7 +1666,7 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         if (gr_norm_split())
             st->parallel_for<dpct_kernel_name<class gr_norm_split_k>>(
                 sycl::nd_range<3>(sycl::range(1, 1, n_tok * HC) * sycl::range(1, 1, THREADS), sycl::range(1, 1, THREADS)),
-                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { gr_norm_split_kernel(m); });
+                [=](sycl::nd_item<3>) [[sycl::reqd_sub_group_size(32)]] { gr_norm_split_port_kernel(m); });
         else
         st->parallel_for<dpct_kernel_name<class gr_norm_multi_kernel_2f4d92>>(
             sycl::nd_range<3>(sycl::range(1, 1, n_tok) *
@@ -1310,4 +1848,280 @@ void fused_gr_read(const FusedGrArgs& a, void* stream) {
     const dpct::err0 e = 0;
 }
 
+
+namespace {
+
+/// The plain read, split, staged and (for one token) the single-token read on random bf16 weights and random inputs,
+/// 1..8 tokens, with and without the pending write; every output of split and staged compared with the plain read's
+/// bit for bit (and the plain read's with the single-token read's).  `why[v]` gets the first difference of variant
+/// v; false if the check itself could not run.
+bool fused_gr_selftest(bool ok_variant[4], std::string why[4]) try {
+    constexpr int TM = kFusedGrMaxT;
+    constexpr int NV = 4;                             // sets: 0 = plain, 1 = split, 2 = staged, 3 = single-token
+    std::mt19937 rng(20260930u);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+    std::vector<uint16_t> h_down((size_t) LR * D), h_up((size_t) D * LR), h_inj((size_t) HC * D);
+    std::vector<float> h_norm(D), h_R((size_t) TM * D), h_bo((size_t) TM * N), h_ip((size_t) TM * HC);
+    for (auto& w : h_down) w = bf16_from_f32(0.02f * nd(rng));
+    for (auto& w : h_up) w = bf16_from_f32(0.05f * nd(rng));
+    for (auto& w : h_inj) w = bf16_from_f32(0.02f * nd(rng));
+    for (auto& w : h_norm) w = 1.0f + 0.1f * nd(rng);
+    for (auto& x : h_R) x = nd(rng);
+    for (auto& x : h_bo) x = 0.5f * nd(rng);
+    for (auto& x : h_ip) x = 2.0f * nd(rng);
+    for (int v = 0; v < 4; ++v) { ok_variant[v] = v == 1; why[v].clear(); }
+
+    const size_t n_set = (size_t) TM * (D + D + LR + HC + HC + N);   // R_out, xn, lo, rs, inject, mixed (floats)
+    const size_t bytes = h_down.size() * 2 + h_up.size() * 2 + h_inj.size() * 2 +
+                         (h_norm.size() + h_R.size() + h_bo.size() + h_ip.size() + NV * n_set) * 4 + 32 * 256;
+    uint8_t* base = nullptr;
+    if (DPCT_CHECK_ERROR(base = (uint8_t *)sycl::malloc_device(
+                             bytes, dpct::get_in_order_queue())) != 0) {
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        why[0] =
+            "no room for the check (" + std::to_string(bytes >> 20) + " MiB)";
+        return false;
+    }
+    size_t off = 0;
+    auto take = [&](size_t b) { void* p = base + off; off += (b + 255) / 256 * 256; return p; };
+    uint16_t* d_down = (uint16_t*) take(h_down.size() * 2);
+    uint16_t* d_up = (uint16_t*) take(h_up.size() * 2);
+    uint16_t* d_inj = (uint16_t*) take(h_inj.size() * 2);
+    float* d_norm = (float*) take(h_norm.size() * 4);
+    float* d_R = (float*) take(h_R.size() * 4);
+    float* d_bo = (float*) take(h_bo.size() * 4);
+    float* d_ip = (float*) take(h_ip.size() * 4);
+    struct Set { float *R_out, *xn, *lo, *rs, *inj, *mixed; } set[NV];
+    for (Set& x : set) {
+        x.R_out = (float*) take((size_t) TM * D * 4); x.xn = (float*) take((size_t) TM * D * 4);
+        x.lo = (float*) take((size_t) TM * LR * 4); x.rs = (float*) take((size_t) TM * HC * 4);
+        x.inj = (float*) take((size_t) TM * HC * 4); x.mixed = (float*) take((size_t) TM * N * 4);
+    }
+    dpct::queue_ptr st = &dpct::get_in_order_queue();
+    /*
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    bool ok =
+        off <= bytes &&
+        DPCT_CHECK_ERROR(st = dpct::get_current_device().create_queue(true)) ==
+            0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(
+            st->memcpy(d_down, h_down.data(), h_down.size() * 2)) == 0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(st->memcpy(d_up, h_up.data(), h_up.size() * 2)) == 0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(st->memcpy(d_inj, h_inj.data(), h_inj.size() * 2)) ==
+            0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(
+            st->memcpy(d_norm, h_norm.data(), h_norm.size() * 4)) == 0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(st->memcpy(d_R, h_R.data(), h_R.size() * 4)) == 0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(st->memcpy(d_bo, h_bo.data(), h_bo.size() * 4)) == 0 &&
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        DPCT_CHECK_ERROR(st->memcpy(d_ip, h_ip.data(), h_ip.size() * 4)) == 0;
+    if (!ok) why[0] = "setting up the check failed";
+    std::vector<float> h1, h2;
+    // true when equal; false with the first difference in `w` (or a read-back failure in `ok`)
+    auto same = [&](const float* d1, const float* d2, size_t n, const char* what, int T, int apply, std::string& w) {
+        h1.resize(n);
+        h2.resize(n);
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(st->memcpy(h1.data(), d1, n * 4)) != 0 ||
+            /*
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            DPCT_CHECK_ERROR(st->memcpy(h2.data(), d2, n * 4)) != 0 ||
+            DPCT_CHECK_ERROR(st->wait()) != 0) {
+            why[0] = "reading back the check failed";
+            ok = false;
+            return false;
+        }
+        for (size_t i = 0; i < n; ++i) {
+            uint32_t u1, u2;
+            std::memcpy(&u1, &h1[i], 4);
+            std::memcpy(&u2, &h2[i], 4);
+            if (u1 != u2) {
+                char buf[192];
+                std::snprintf(buf, sizeof buf, "%s differs for %d token(s)%s at %zu (%08x, not %08x)", what, T,
+                              apply ? " with the pending write" : "", i, u2, u1);
+                w = buf;
+                return false;
+            }
+        }
+        return true;
+    };
+    auto all_same = [&](const Set& s1, const Set& s2, int T, int apply, std::string& w) {
+        return same(s1.lo, s2.lo, (size_t) T * LR, "lo", T, apply, w) &&
+               same(s1.rs, s2.rs, (size_t) T * HC, "rs", T, apply, w) &&
+               same(s1.inj, s2.inj, (size_t) T * HC, "inject", T, apply, w) &&
+               same(s1.mixed, s2.mixed, (size_t) T * N, "mixed", T, apply, w) &&
+               same(s1.R_out, s2.R_out, (size_t) T * D, "R", T, apply, w);
+    };
+    ok_variant[2] = ok_variant[3] = ok;
+    bool single_ok = ok;
+    for (int apply = 0; apply < 2 && ok; ++apply) {
+        for (int T = 1; T <= TM && ok; ++T) {
+            FusedGrArgs a[NV][TM];
+            for (int v = 0; v < NV; ++v) {
+                const size_t span = (size_t) ((uint8_t*) (set[v].mixed + (size_t) TM * N) - (uint8_t*) set[v].R_out);
+                ok = ok &&
+                     DPCT_CHECK_ERROR(st->memset(set[v].R_out, 0xFF, span)) ==
+                         0; // the whole set
+                for (int k = 0; k < T; ++k) {
+                    FusedGrArgs& x = a[v][k];
+                    x.R = d_R + (size_t) k * D; x.R_out = set[v].R_out + (size_t) k * D; x.apply = apply != 0;
+                    x.bo_prev = d_bo + (size_t) k * N; x.inj_prev = d_ip + (size_t) k * HC;
+                    x.w_norm = d_norm; x.w_down = d_down; x.w_up = d_up; x.w_inject = d_inj; x.eps = 1e-6f;
+                    x.lo = set[v].lo + (size_t) k * LR; x.rs = set[v].rs + (size_t) k * HC;
+                    x.inject_out = set[v].inj + (size_t) k * HC; x.mixed = set[v].mixed + (size_t) k * N;
+                }
+            }
+            for (int v = 0; v < 3; ++v) {
+                GrMulti m;
+                for (int k = 0; k < T; ++k) m.a[k] = a[v][k];
+                m.xn = set[v].xn;
+                m.T = T;
+                launch_multi(m, v + 1, st, nullptr, 0);
+            }
+            if (T == 1) fused_gr_read(a[3][0], st);
+            /*
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            if (0 != 0 || DPCT_CHECK_ERROR(st->wait()) != 0) {
+                why[0] = "a kernel of the check failed";
+                ok = false;
+                break;
+            }
+            if (ok_variant[2] && !all_same(set[0], set[1], T, apply, why[2])) ok_variant[2] = false;
+            if (ok && ok_variant[3] && !all_same(set[0], set[2], T, apply, why[3])) ok_variant[3] = false;
+            if (ok && T == 1 && single_ok && !all_same(set[3], set[0], T, apply, why[1])) single_ok = false;
+        }
+    }
+    if (!single_ok && ok) {                            // the plain read itself disagrees with the single-token read
+        why[2] = why[3] = "the plain read differs from the single-token read: " + why[1];
+        ok_variant[2] = ok_variant[3] = false;
+    }
+    if (st != &dpct::get_in_order_queue()) {
+        st->wait();
+        dpct::get_current_device().destroy_queue(st);
+    }
+    sycl::free(base, dpct::get_in_order_queue());
+    /*
+    DPCT1026: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    if (!ok) ok_variant[2] = ok_variant[3] = false;
+    return ok;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+}  // namespace
+
+int fused_gr_variant() {
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    const int v = dev >= 0 && dev < 64 ? g_variant[dev].load() : 0;
+    if (v > 0) return v;
+    // not checked on this card: the plain read, unless STRATA_HC_SPLIT names a variant (a test such as gr_parity)
+    const char* e = std::getenv("STRATA_HC_SPLIT");
+    return e != nullptr && (e[0] == '1' || e[0] == '2') ? env_variant() : kHcPlain;
+}
+
+void fused_gr_check() {
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    if (dev < 0 || dev >= 64 || g_variant[dev].load() > 0) return;
+    // SYCL port: the port's own read (sliced down / split norm, STRATA_GR_DOWN_SLICED etc.) does not use upstream's
+    // variants, and their self-test crashes on the B70 (0.1.32 merge, under investigation): opt-in only.
+    if (std::getenv("STRATA_HC_CHECK") == nullptr) {
+        g_variant[dev].store(kHcPlain);
+        return;
+    }
+    const int want = env_variant();
+    if (want == kHcPlain) {
+        g_variant[dev].store(kHcPlain);
+        std::fprintf(stderr, "strata hc: CUDA%d: the hyper-connection read runs as the plain one (STRATA_HC_SPLIT=0)\n",
+                     dev);
+        return;
+    }
+    bool okv[4];
+    std::string why[4];
+    const bool ran = fused_gr_selftest(okv, why);
+    int use = kHcPlain;
+    if (want >= kHcStaged && okv[kHcStaged]) use = kHcStaged;
+    else if (okv[kHcSplit]) use = kHcSplit;
+    g_variant[dev].store(use);
+    if (!ran)
+        std::fprintf(stderr, "strata hc: CUDA%d: the check of split/staged could not run (%s)\n", dev, why[0].c_str());
+    static const char* const name[4] = {"", "plain", "split", "staged"};
+    for (int v = kHcStaged; v >= kHcSplit; --v)
+        if (v <= want && !okv[v] && ran)
+            std::fprintf(stderr, "strata hc: CUDA%d: the %s read differs from the plain read on this card - not used: "
+                                 "%s\n", dev, name[v], why[v].c_str());
+    static const char* const what[4] = {
+        "", "the plain read (the norm per token, the down projection on 41 blocks)",
+        "split (the norm per token and stream, then the plain read's down projection)",
+        "staged (the norm per token and stream, the down projection's activations staged ahead by cp.async)"};
+    std::fprintf(stderr, "strata hc: CUDA%d: the hyper-connection read runs as %s%s\n", dev, what[use],
+                 use >= kHcSplit ? "; checked bit for bit against the plain read on this card (STRATA_HC_SPLIT=1 or 0 "
+                                   "for the earlier ones)" : "");
+}
+
+
 }  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 37551736755..2d035a7fce9 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -1816,7 +1816,17 @@ inline void dq_q8_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
         y[j] = cvt<dst_t>((float)x[ib].qs[8 * il + j] * d);
 }
 
-// Every type below must also be in is_iq(): the host entry points refuse the others, so the default is unreachable.
+// BF16 (the token embedding as the checkpoint ships it, tools/embd_bf16_pack.py): 8 values per thread.
+template <typename dst_t>
+inline void dq_bf16(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    const uint16_t* x = (const uint16_t*) vx + ibs * 256 + tid * 8;
+#pragma unroll
+    for (int j = 0; j < 8; ++j) yy[tid * 8 + j] =
+        cvt<dst_t>(sycl::bit_cast<float>((uint32_t)x[j] << 16));
+}
+
+// Every type below must also be in is_iq() (BF16: embed_type_supported): the host entry points refuse the others,
+// so the default is unreachable.
 template <typename dst_t>
 __dpct_inline__ void
 dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
@@ -1838,6 +1848,7 @@ dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
         case 13: dq_q5_k(vx, ibs, y, tid); break;
         case 7: dq_q5_1(vx, ibs, y, tid); break;
         case 8: dq_q8_0(vx, ibs, y, tid); break;
+        case 30: dq_bf16(vx, ibs, y, tid); break;
         default: break;
     }
 }
@@ -2170,6 +2181,7 @@ void iq_set_old_kernels(bool old) { g_old_kernels = old; }
 bool iq_old_kernels() { return g_old_kernels; }
 
 bool iq_supported(int t) noexcept { return is_iq(t); }
+bool embed_type_supported(int t) noexcept { return is_iq(t) || t == 30; }
 
 size_t iq_row_bytes(int t, int64_t n) noexcept {
     switch (t) {
@@ -2187,6 +2199,7 @@ size_t iq_row_bytes(int t, int64_t n) noexcept {
         case 13: return (size_t) (n / 256) * sizeof(block_q5_K);
         case 7: return (size_t) (n / 32) * sizeof(block_q5_1);
         case 8: return (size_t) (n / 32) * sizeof(block_q8_0);
+        case 30: return (size_t) n * 2;   // BF16: the token embedding only (iq_embed_rows, iq_dequant_f32)
         default: return 0;
     }
 }
@@ -2270,7 +2283,7 @@ __dpct_inline__ void embed_rows_kernel(
 void iq_embed_rows(int t, const void* table, size_t row_bytes, const int32_t* tokens, int64_t n_tok, int64_t n_embd,
                    float* out, void* stream) {
     if (n_tok <= 0) return;
-    if (n_embd % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_embed_rows: bad arguments\n"); std::exit(1); }
+    if (n_embd % 256 != 0 || !embed_type_supported(t)) { std::fprintf(stderr, "iq_embed_rows: bad arguments\n"); std::exit(1); }
     {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
@@ -2299,7 +2312,7 @@ void iq_embed_rows(int t, const void* table, size_t row_bytes, const int32_t* to
 }
 
 void iq_dequant_f32(int t, const void* src, int64_t n, float* dst, void* stream) {
-    if (n % 256 != 0 || !is_iq(t)) { std::fprintf(stderr, "iq_dequant_f32: bad arguments\n"); std::exit(1); }
+    if (n % 256 != 0 || !embed_type_supported(t)) { std::fprintf(stderr, "iq_dequant_f32: bad arguments\n"); std::exit(1); }
     {
 
         auto exp_props = sycl::ext::oneapi::experimental::properties{
diff --git a/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
index d9f3b1f9db6..5e7d693138d 100644
--- a/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gdn_preprocess.dp.cpp
@@ -147,8 +147,10 @@ __dpct_inline__ void gate_softplus(const float *__restrict__ alpha,
     OpenCL C 1.2 standard.
     */
     const float value = alpha[i] + dt[i];
-    const float softplus =
-        value > 20.0f ? value : sycl::log(1.0f + sycl::native::exp(value));
+    const float softplus = value > 20.0f
+                               ? value
+                               : sycl::log1p(sycl::native::exp(
+                                     value)); // 1 + e^v loses e^v below ~1e-7
     gate[i] = softplus * ssm_a[i];
 }
 
diff --git a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
index 48d9be4257e..436af20f36c 100644
--- a/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
+++ b/sycl/src/kernels/cuda/native_gr_postops.dp.cpp
@@ -74,25 +74,25 @@ pre_gated(const float *__restrict__ xn, float *__restrict__ gate,
         const std::size_t i = std::size_t(c) * n_embd + d;
         const float x = xn[i], w = sigmoid(gate[i]);
         /*
-        DPCT1013: The rounding mode could not be specified and the
-        generated code may have different accuracy than the original code.
-        Verify the correctness. SYCL math built-in function rounding mode is
-        aligned with OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
         */
         const float product = x * w;
         gate[i] = product;
         /*
-        DPCT1013: The rounding mode could not be specified and the
-        generated code may have different accuracy than the original code.
-        Verify the correctness. SYCL math built-in function rounding mode is
-        aligned with OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
         */
         if constexpr (Fused) sum = sycl::fma(x, w, sum);
         /*
-        DPCT1013: The rounding mode could not be specified and the
-        generated code may have different accuracy than the original code.
-        Verify the correctness. SYCL math built-in function rounding mode is
-        aligned with OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
         */
         else sum = c == 0 ? product : sum + product;
     }
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 177fa97d0a9..5f284fc5974 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -223,10 +223,10 @@ q5_q8_dot_impl(const int *__restrict__ vl, const int *__restrict__ vh,
 }
 
 /*
-DPCT1110: The total declared local variable size in device function q5_q8_dot
-exceeds 128 bytes and may cause high register pressure. Consult with your
-hardware vendor to find the total register size available and adjust the code,
-or use smaller sub-group size to avoid high register pressure.
+DPCT1110: The total declared local variable size in device function
+q5_q8_dot exceeds 128 bytes and may cause high register pressure. Consult with
+your hardware vendor to find the total register size available and adjust the
+code, or use smaller sub-group size to avoid high register pressure.
 */
 __dpct_inline__ float q5_q8_dot(const Q5KBlock *__restrict__ bq5,
                                 const Q81Block *__restrict__ bq8, int iqs) {
@@ -2643,7 +2643,7 @@ void native_iq4_nl_f32(const void* weights, const float* x, void* scratch_q8_1,
 }
 
 bool native_mmvq_supported(int ggml_type) noexcept {
-    return ggml_type == 2 || ggml_type == 6 || ggml_type == 8 || ggml_type == 11 ||
+    return ggml_type == 2 || ggml_type == 6 || ggml_type == 7 || ggml_type == 8 || ggml_type == 11 ||
            ggml_type == 12 || ggml_type == 13 || ggml_type == 14 || ggml_type == 20 ||
            ggml_type == 23 || ggml_type == 42 || ggml_type == 16 || ggml_type == 17 || ggml_type == 18 ||
            ggml_type == 21 || ggml_type == 22 || ggml_type == 29;
@@ -2654,6 +2654,7 @@ std::size_t native_mmvq_weight_bytes(int ggml_type, int n_in, int n_out) {
     switch (ggml_type) {
     case 2: block_elems = 32; block_bytes = 18; break;
     case 6: block_elems = 32; block_bytes = 22; break;
+    case 7: block_elems = 32; block_bytes = 24; break;
     case 8: block_elems = 32; block_bytes = 34; break;
     case 20: block_elems = 32; block_bytes = 18; break;
     case 11: block_elems = 256; block_bytes = 110; break;
@@ -2680,6 +2681,7 @@ void native_mmvq(int ggml_type, const void* weights, const void* x_q8_1, float*
     switch (ggml_type) {
     case 2: native_q4_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
     case 6: native_q5_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
+    case 7: iq_mmvq(ggml_type, weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
     case 8: native_q8_0_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
     case 20: native_iq4_nl_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
     case 11: native_q3_k_mmvq(weights, x_q8_1, y, n_in, n_out, ncols, stream); break;
diff --git a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
index 3c3c062c07e..52f01ccba9c 100644
--- a/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_indexer.dp.cpp
@@ -48,15 +48,18 @@ inline float warp_sum(float x) {
             offset);
     return x;
 }
-__dpct_inline__ void append(const float *__restrict__ raw,
-                            const int32_t *__restrict__ pos_dev, int pos_base,
-                            const float *__restrict__ gamma, float epsilon,
-                            float *__restrict__ tail, float *__restrict__ dead,
-                            float *__restrict__ pooled,
-                            int32_t *__restrict__ block_pos, int max_cells,
-                            float theta_scale, float freq_scale, float corr_low,
-                            float corr_high, float ext_factor, float mscale,
-                            const int32_t *__restrict__ mtab) {
+// TAB (#280, STRATA_ROPE_TABLE=1): the angles from the session's float64 table.  The host launches <false> whenever
+// no table applies - the default - so the default kernel is 0.1.31's code exactly (the table read is not in it;
+// with it merely skipped at run time, the compiled default path changed its results).
+template <bool TAB>
+__dpct_inline__ void
+append(const float *__restrict__ raw, const int32_t *__restrict__ pos_dev,
+       int pos_base, const float *__restrict__ gamma, float epsilon,
+       float *__restrict__ tail, float *__restrict__ dead,
+       float *__restrict__ pooled, int32_t *__restrict__ block_pos,
+       int max_cells, float theta_scale, float freq_scale, float corr_low,
+       float corr_high, float ext_factor, float mscale,
+       const int32_t *__restrict__ mtab, RopeTab rt) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int pos = *pos_dev, d = item_ct1.get_local_id(2);
     if (pos < 0 || pos >= max_cells) return;
@@ -128,11 +131,13 @@ __dpct_inline__ void append(const float *__restrict__ raw,
         const int pair = d % (ROT / 2);
         // The spare (pos == 0) keeps its zero angle; under YaRN the mscale magnitude still rides in
         // through cos(0) - which is exactly what the queries are scaled by, so the top-k is unmoved.
-        const float theta_extrap =
-            (pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair)) *
-            dpct::pow(theta_scale, float(pair));
         float c, s;
-        rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+        if (!(TAB && rope_tab_cs(rt, pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair), pair, c, s))) {
+            const float theta_extrap =
+                (pos == 0 ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+                dpct::pow(theta_scale, float(pair));
+            rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+        }
         const float a = values[pair], z = values[pair + ROT / 2];
         y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
     }
@@ -146,22 +151,25 @@ __dpct_inline__ void append(const float *__restrict__ raw,
 // the RMS norm, gamma, the rotation at pos_base + 4b.  `k(j)` is the key of the block's cell j: a row of this batch
 // (cell >= p0) or the tail the previous batch left (cell < p0).  Only the batch's last completed block writes the
 // spare after it (every earlier one's is overwritten by the next block in order).
-__dpct_inline__ float pooled_value(const float *values, int d, int rope_pos,
-                                   float theta_scale, float freq_scale,
-                                   float corr_low, float corr_high,
-                                   float ext_factor, float mscale,
-                                   const int32_t *mtab, bool zero_pos) {
+template <bool TAB>
+__dpct_inline__ float
+pooled_value(const float *values, int d, int rope_pos, float theta_scale,
+             float freq_scale, float corr_low, float corr_high,
+             float ext_factor, float mscale, const int32_t *mtab, bool zero_pos,
+             const RopeTab &rt) {
     float y = values[d];
     if (d < ROT) {
         const int pair = d % (ROT / 2);
         // The same rotation the single append applies, rope_scaling.hpp's helper shared: under none this is
         // today's cosf/sinf; under linear/YaRN the pooled keys move with the cache's K, and the spare's zero
         // angle carries the mscale magnitude through cos(0) exactly as the single append's does.
-        const float theta_extrap =
-            (zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair)) *
-            dpct::pow(theta_scale, float(pair));
         float c, s;
-        rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+        if (!(TAB && rope_tab_cs(rt, zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair), pair, c, s))) {
+            const float theta_extrap =
+                (zero_pos ? 0 : mrope_pos(mtab, rope_pos, pair)) *
+                dpct::pow(theta_scale, float(pair));
+            rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+        }
         const float a = values[pair], z = values[pair + ROT / 2];
         y = d < ROT / 2 ? a * c - z * s : a * s + z * c;
     }
@@ -183,12 +191,13 @@ __dpct_inline__ float norm_scale(float mean, float *partials, int d) {
     return square_sum;
 }
 // cell 0 of a sequence: the spare (every gather index names cell 0), written to pooled[0] and dead
+template <bool TAB>
 __dpct_inline__ void
 append_first(const float *__restrict__ raw, const float *__restrict__ gamma,
              float epsilon, float *__restrict__ dead,
              float *__restrict__ pooled, float theta_scale, float freq_scale,
              float corr_low, float corr_high, float ext_factor, float mscale,
-             const int32_t *__restrict__ mtab) {
+             const int32_t *__restrict__ mtab, RopeTab rt) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int d = item_ct1.get_local_id(2);
     auto &values =
@@ -225,18 +234,18 @@ append_first(const float *__restrict__ raw, const float *__restrict__ gamma,
     const float scale = sycl::rsqrt(square_sum / D + epsilon);
     if (d < D) values[d] = scale * mean * gamma[d];
     /*
-    DPCT1113: Consider replacing
-    sycl::nd_item::barrier(sycl::access::fence_space::local_space) with
-    sycl::nd_item::barrier() if function "append_first" is called in a
-    multidimensional kernel.
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
     */
-    item_ct1.barrier(sycl::access::fence_space::local_space);
+    item_ct1.barrier();
     if (d >= D) return;
-    const float y = pooled_value(values, d, 0, theta_scale, freq_scale, corr_low, corr_high, ext_factor, mscale,
-                                 mtab, true);
+    const float y = pooled_value<TAB>(values, d, 0, theta_scale, freq_scale, corr_low, corr_high, ext_factor, mscale,
+                                 mtab, true, rt);
     pooled[d] = y;
     dead[d] = y;
 }
+template <bool TAB>
 __dpct_inline__ void
 append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
               int pos_base, const float *__restrict__ gamma, float epsilon,
@@ -244,8 +253,8 @@ append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
               float *__restrict__ pooled, int32_t *__restrict__ block_pos,
               int64_t first_block, int64_t last_block, float theta_scale,
               float freq_scale, float corr_low, float corr_high,
-              float ext_factor, float mscale,
-              const int32_t *__restrict__ mtab) {
+              float ext_factor, float mscale, const int32_t *__restrict__ mtab,
+              RopeTab rt) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t b = first_block + item_ct1.get_group(2);
     const int d = item_ct1.get_local_id(2);
@@ -288,11 +297,16 @@ append_blocks(const float *__restrict__ raw, int64_t n, int64_t p0,
     const float square_sum = norm_scale(mean, partials, d);
     const float scale = sycl::rsqrt(square_sum / D + epsilon);
     if (d < D) values[d] = scale * mean * gamma[d];
-    item_ct1.barrier(sycl::access::fence_space::local_space);
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
     if (d >= D) return;
     const int rope_pos = pos_base + R * (int) b;
-    pooled[std::size_t(b) * D + d] = pooled_value(values, d, rope_pos, theta_scale, freq_scale, corr_low, corr_high,
-                                                  ext_factor, mscale, mtab, false);
+    pooled[std::size_t(b) * D + d] = pooled_value<TAB>(values, d, rope_pos, theta_scale, freq_scale, corr_low, corr_high,
+                                                  ext_factor, mscale, mtab, false, rt);
     if (b == last_block) {
         pooled[std::size_t(b + 1) * D + d] = dead[d];
         if (d == 0) *block_pos = rope_pos;
@@ -342,6 +356,8 @@ void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_dev
         if (overlaps(spans[i], spans[j])) throw std::invalid_argument("native QSA indexer buffers overlap");
     const float theta_scale = powf((float) scaling.freq_base, -2.0f / ROT);
     const RopeKernelArgs k = scaling.kernel_args(ROT);   // none: the identity constants
+    const RopeTab rt = rope_table_for(scaling);
+    if (rt.cos != nullptr)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -350,18 +366,42 @@ void native_qsa_indexer_append(const float* raw, const int32_t* relative_pos_dev
             ->submit([&](sycl::handler &cgh) {
                 auto mrope_table_ct16 = mrope_table();
 
-                cgh.parallel_for<dpct_kernel_name<class append_182f95>>(
+                cgh.parallel_for<dpct_kernel_name<class append_182f95,
+                                                  dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+                                      sycl::range(1, 1, THREADS)),
+                    exp_props,
+                    [=](sycl::nd_item<3> item_ct1)
+                        [[sycl::reqd_sub_group_size(32)]] {
+                            append<true>(raw, relative_pos_device, pos_base,
+                                         gamma, epsilon, b.tail, b.dead,
+                                         b.pooled, b.block_pos, int(max_cells),
+                                         theta_scale, k.freq_scale, k.corr_low,
+                                         k.corr_high, k.ext_factor,
+                                         k.attn_factor, mrope_table_ct16, rt);
+                        });
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto mrope_table_ct16 = mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class append_182f95,
+                                                  dpct_kernel_scalar<false>>>(
                     sycl::nd_range<3>(sycl::range(1, 1, THREADS),
                                       sycl::range(1, 1, THREADS)),
                     exp_props,
                     [=](sycl::nd_item<3> item_ct1)
                         [[sycl::reqd_sub_group_size(32)]] {
-                            append(raw, relative_pos_device, pos_base, gamma,
-                                   epsilon, b.tail, b.dead, b.pooled,
-                                   b.block_pos, int(max_cells), theta_scale,
-                                   k.freq_scale, k.corr_low, k.corr_high,
-                                   k.ext_factor, k.attn_factor,
-                                   mrope_table_ct16);
+                            append<false>(raw, relative_pos_device, pos_base,
+                                          gamma, epsilon, b.tail, b.dead,
+                                          b.pooled, b.block_pos, int(max_cells),
+                                          theta_scale, k.freq_scale, k.corr_low,
+                                          k.corr_high, k.ext_factor,
+                                          k.attn_factor, mrope_table_ct16, rt);
                         });
             });
     }
@@ -399,36 +439,77 @@ void native_qsa_indexer_append_batch(const float* raw, int64_t n, int64_t p0, in
     const float fsf = k.freq_scale, cl = k.corr_low, ch = k.corr_high, ef = k.ext_factor, ms = k.attn_factor;
     const dpct::queue_ptr st = strata::q_of(stream);
     const int32_t* mtab = mrope_table();
+    const RopeTab rt = rope_table_for(scaling);
     if (p0 == 0) {
+        if (rt.cos != nullptr)
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class append_first_ea2d1f,
+                                              dpct_kernel_scalar<true>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        append_first<true>(raw, gamma, epsilon, b.dead,
+                                           b.pooled, theta_scale, fsf, cl, ch,
+                                           ef, ms, mtab, rt);
+                    });
+        } else {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            st->parallel_for<dpct_kernel_name<class append_first_ea2d1f,
+                                              dpct_kernel_scalar<false>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+                                  sycl::range(1, 1, THREADS)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        append_first<false>(raw, gamma, epsilon, b.dead,
+                                            b.pooled, theta_scale, fsf, cl, ch,
+                                            ef, ms, mtab, rt);
+                    });
+        }
+    }
+    // completed blocks: those whose last cell (4b+3) lies in [p0, p0 + n)
+    const int64_t first = p0 <= R - 1 ? 0 : (p0 - (R - 1) + R - 1) / R;       // the smallest b with 4b+3 >= p0
+    const int64_t hi = p0 + n - 1 >= R - 1 ? (p0 + n - 1 - (R - 1)) / R : -1;   // the largest b with 4b+3 <= p0+n-1
+    if (hi >= first && rt.cos != nullptr)
+    {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class append_first_ea2d1f>>(
-            sycl::nd_range<3>(sycl::range(1, 1, THREADS),
+        st->parallel_for<dpct_kernel_name<class append_blocks_a6c94e,
+                                          dpct_kernel_scalar<true>>>(
+            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(hi - first + 1)) *
+                                  sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
             exp_props,
             [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
-                append_first(raw, gamma, epsilon, b.dead, b.pooled, theta_scale,
-                             fsf, cl, ch, ef, ms, mtab);
+                append_blocks<true>(raw, n, p0, pos_base, gamma, epsilon,
+                                    b.tail, b.dead, b.pooled, b.block_pos,
+                                    first, hi, theta_scale, fsf, cl, ch, ef, ms,
+                                    mtab, rt);
             });
-    }
-    // completed blocks: those whose last cell (4b+3) lies in [p0, p0 + n)
-    const int64_t first = p0 <= R - 1 ? 0 : (p0 - (R - 1) + R - 1) / R;       // the smallest b with 4b+3 >= p0
-    const int64_t hi = p0 + n - 1 >= R - 1 ? (p0 + n - 1 - (R - 1)) / R : -1;   // the largest b with 4b+3 <= p0+n-1
-    if (hi >= first)
+    } else if (hi >= first)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        st->parallel_for<dpct_kernel_name<class append_blocks_a6c94e>>(
+        st->parallel_for<dpct_kernel_name<class append_blocks_a6c94e,
+                                          dpct_kernel_scalar<false>>>(
             sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(hi - first + 1)) *
                                   sycl::range(1, 1, THREADS),
                               sycl::range(1, 1, THREADS)),
             exp_props,
             [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
-                append_blocks(raw, n, p0, pos_base, gamma, epsilon, b.tail,
-                              b.dead, b.pooled, b.block_pos, first, hi,
-                              theta_scale, fsf, cl, ch, ef, ms, mtab);
+                append_blocks<false>(raw, n, p0, pos_base, gamma, epsilon,
+                                     b.tail, b.dead, b.pooled, b.block_pos,
+                                     first, hi, theta_scale, fsf, cl, ch, ef,
+                                     ms, mtab, rt);
             });
     }
     {
diff --git a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
index a4580680077..fe729bc0ee7 100644
--- a/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
+++ b/sycl/src/kernels/cuda/native_qsa_score.dp.cpp
@@ -189,32 +189,32 @@ __dpct_inline__ void score_kernel(const float *__restrict__ pooled,
             h[j] = sycl::fmax(v, 0.0f);
         }
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         float sum = h[0] + h[1] + h[2] + h[3];
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         if (bias) sum = sum + bias[row];
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         sum = sum + (row == full && n % R ? 1e9f : 0.0f);
         // The live causal mask is +0. Invalid/padded cells are never exported.
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         sum = sum + 0.0f;
 #pragma unroll
diff --git a/sycl/src/kernels/cuda/native_rope.dp.cpp b/sycl/src/kernels/cuda/native_rope.dp.cpp
index 6dfe25684f5..9f67374c581 100644
--- a/sycl/src/kernels/cuda/native_rope.dp.cpp
+++ b/sycl/src/kernels/cuda/native_rope.dp.cpp
@@ -31,6 +31,7 @@
 #include <atomic>
 #include <cmath>
 #include <cstdint>
+#include <cstdlib>
 #include <limits>
 #include <stdexcept>
 
@@ -41,11 +42,15 @@ bool overlaps(const void* a, size_t an, const void* b, size_t bn) {
     auto x = reinterpret_cast<uintptr_t>(a), y = reinterpret_cast<uintptr_t>(b);
     return x <= y ? y - x < an : x - y < bn;
 }
+// TAB (#280, STRATA_ROPE_TABLE=1): the angles from the session's float64 table.  The host launches <false> whenever
+// no table applies - the default - so the default kernel is 0.1.31's code exactly (the table read is not in it;
+// with it merely skipped at run time, the compiled default path changed its results).
+template <bool TAB>
 __dpct_inline__ void apply(const float *x, float *out, int rows, int width,
                            int n_rot, float theta_scale, float freq_scale,
                            float corr_low, float corr_high, float ext_factor,
                            float mscale, const int *positions,
-                           const int32_t *mtab) {
+                           const int32_t *mtab, RopeTab rt) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int row = item_ct1.get_group(1);
     const int pair = item_ct1.get_group(2) * item_ct1.get_local_range(2) +
@@ -59,10 +64,12 @@ __dpct_inline__ void apply(const float *x, float *out, int rows, int width,
         }
         return;
     }
-    const float theta_extrap = mrope_pos(mtab, positions[row], pair) *
-                               dpct::pow(theta_scale, float(pair));
     float c, s;
-    rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+    if (!(TAB && rope_tab_cs(rt, mrope_pos(mtab, positions[row], pair), pair, c, s))) {
+        const float theta_extrap = mrope_pos(mtab, positions[row], pair) *
+                                   dpct::pow(theta_scale, float(pair));
+        rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale, pair, c, s);
+    }
     const float a = x[start + pair], b = x[start + pair + n_rot / 2];
     out[start + pair] = a * c - b * s;
     out[start + pair + n_rot / 2] = a * s + b * c;
@@ -86,6 +93,40 @@ catch (sycl::exception const &exc) {
 }  // namespace
 void mrope_table_set(const int32_t* device_table) { mrope_tab[mrope_dev()].store(device_table, std::memory_order_relaxed); }
 const int32_t* mrope_table() { return mrope_tab[mrope_dev()].load(std::memory_order_relaxed); }
+namespace {
+// #280: the float64 angle table of each device, set at session init (before any graph is captured)
+struct RopeReg {
+    RopeTab tab;
+    RopeScaling scaling;
+};
+RopeReg rope_tab[kMropeDevices] = {};
+bool same_scaling(const RopeScaling& a, const RopeScaling& b) {
+    return a.type == b.type && a.freq_base == b.freq_base && a.factor == b.factor && a.freq_scale_in == b.freq_scale_in &&
+           a.orig_ctx == b.orig_ctx && a.ext_factor == b.ext_factor && a.attn_factor == b.attn_factor &&
+           a.beta_fast == b.beta_fast && a.beta_slow == b.beta_slow;
+}
+// opt-in: STRATA_ROPE_TABLE=1 (the table's angles differ from the fast-math ones in the last bits, so outputs move)
+bool rope_table_enabled() {
+    static const bool on = [] {
+        const char* e = std::getenv("STRATA_ROPE_TABLE");
+        return e != nullptr && e[0] == '1';
+    }();
+    return on;
+}
+}  // namespace
+void rope_table_set(const float* cos_tab, const float* sin_tab, int max_pos, const RopeScaling& scaling) {
+    rope_tab[mrope_dev()] = RopeReg{RopeTab{cos_tab, sin_tab, max_pos}, scaling};
+}
+void rope_table_release(const float* cos_tab) {
+    // every device's entry that points at it (the caller may free it from another current device)
+    for (RopeReg& r : rope_tab)
+        if (cos_tab != nullptr && r.tab.cos == cos_tab) r = RopeReg{};
+}
+RopeTab rope_table_for(const RopeScaling& scaling) {
+    if (!rope_table_enabled()) return {};
+    const RopeReg& r = rope_tab[mrope_dev()];
+    return r.tab.cos != nullptr && same_scaling(r.scaling, scaling) ? r.tab : RopeTab{};
+}
 void native_rope_set_enabled(bool value) { enabled.store(value, std::memory_order_relaxed); }
 bool native_rope_enabled() { return enabled.load(std::memory_order_relaxed); }
 void native_rope_apply(const float* x, float* out, int rows, int head_dim,
@@ -106,6 +147,9 @@ void native_rope_apply(const float* x, float* out, int rows, int head_dim,
     // Match pinned host-side float powf before device fast powf/trigonometry.
     const float theta_scale = powf((float) scaling.freq_base, -2.0f / n_rot);
     const RopeKernelArgs k = scaling.kernel_args(n_rot);   // none: the identity constants
+    const RopeTab rt = rope_table_for(scaling);
+    const dpct::dim3 grid((head_dim / 2 + 127) / 128, rows);
+    if (rt.cos != nullptr)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -114,16 +158,34 @@ void native_rope_apply(const float* x, float* out, int rows, int head_dim,
             ->submit([&](sycl::handler &cgh) {
                 auto mrope_table_ct12 = mrope_table();
 
-                cgh.parallel_for<dpct_kernel_name<class apply_b955ef>>(
-                    sycl::nd_range<3>(
-                        sycl::range(1, rows, (head_dim / 2 + 127) / 128) *
-                            sycl::range(1, 1, 128),
-                        sycl::range(1, 1, 128)),
+                cgh.parallel_for<dpct_kernel_name<class apply_b955ef,
+                                                  dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        apply<true>(x, out, rows, head_dim, n_rot, theta_scale,
+                                    k.freq_scale, k.corr_low, k.corr_high,
+                                    k.ext_factor, k.attn_factor, positions,
+                                    mrope_table_ct12, rt);
+                    });
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        ((sycl::queue *)(strata::q_of(stream)))
+            ->submit([&](sycl::handler &cgh) {
+                auto mrope_table_ct12 = mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class apply_b955ef,
+                                                  dpct_kernel_scalar<false>>>(
+                    sycl::nd_range<3>(grid * sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
-                        apply(x, out, rows, head_dim, n_rot, theta_scale,
-                              k.freq_scale, k.corr_low, k.corr_high,
-                              k.ext_factor, k.attn_factor, positions,
-                              mrope_table_ct12);
+                        apply<false>(x, out, rows, head_dim, n_rot, theta_scale,
+                                     k.freq_scale, k.corr_low, k.corr_high,
+                                     k.ext_factor, k.attn_factor, positions,
+                                     mrope_table_ct12, rt);
                     });
             });
     }
diff --git a/sycl/src/kernels/cuda/qsa.dp.cpp b/sycl/src/kernels/cuda/qsa.dp.cpp
index c5df718b58b..7fe2cdaf3b8 100644
--- a/sycl/src/kernels/cuda/qsa.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa.dp.cpp
@@ -44,6 +44,7 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/core/emulate.hpp"
 #include "strata/kernels/qsa.hpp"
 
 #include "strata/kernels/f16_bits.hpp"
@@ -1019,6 +1020,7 @@ void qsa_attend_step(const float *q, const uint16_t *k_scratch,
         the code.
         */
         max_shared = dpct::get_device(dev).get_local_mem_size();
+        max_shared = strata::smem_optin_of(max_shared);
         if ((int) smem > max_shared) {
             std::fprintf(stderr, "qsa: qsa_attend: max_ids %lld needs %zu B of shared, over the %d B limit\n",
                          (long long) max_ids, smem, max_shared);
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index 65e05f045ee..3baef3ce527 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -3,6 +3,9 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/core/emulate.hpp"
+#include <cstdlib>
+#include <cstring>
 #include "strata/kernels/qsa_prompt_attn.hpp"
 #include "strata/kernels/qsa_prompt_attn_xmx.hpp"
 #include "strata/kernels/kv_q8.hpp"
@@ -12,6 +15,7 @@
 
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
 #include <type_traits>
 
 namespace strata::kernels {
@@ -178,9 +182,9 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
-    two calls do not provide exactly the same functionality. Check the potential
-    precision and/or performance issues for the generated code.
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call.
+    These two calls do not provide exactly the same functionality. Check the
+    potential precision and/or performance issues for the generated code.
     */
     if (qm > 0.0f) sycl::frexp(
         qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
@@ -701,9 +705,9 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
-    two calls do not provide exactly the same functionality. Check the potential
-    precision and/or performance issues for the generated code.
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call.
+    These two calls do not provide exactly the same functionality. Check the
+    potential precision and/or performance issues for the generated code.
     */
     if (qm > 0.0f) sycl::frexp(
         qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
@@ -1171,6 +1175,287 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+#if defined(__HIPCC__)
+// ---- S6: the int8-KV prompt attention on RDNA4 matrix cores (opt-in: STRATA_HIP_WMMA=1, gfx12 only). The design of
+// the v2 kernel above with gfx12's v_wmma_f32_16x16x16_f16 (wave32) in place of m16n8k16: wave w owns dims
+// [64w, 64w+64) (int8 scale group w) for q.k and p.v; q and p are split into FP16 hi + lo parts, the int8 codes enter
+// exactly as FP16, the scales are applied in FP32 and the four groups' q.k partials are added in a fixed order.
+// FP32-level accuracy, deterministic, but not bitwise equal to qsa_decode_attn_batch (another summation order).
+// Fragment layout (16x16x16, wave32, checked on gfx1201): A lane l holds A[l % 16][(l / 16) * 8 + i], B lane l holds
+// B[(l / 16) * 8 + i][l % 16], C/D lane l holds D[(l / 16) * 8 + i][l % 16], i = 0..7.
+#if defined(__gfx1200__) || defined(__gfx1201__)
+#define STRATA_PA_WMMA 1
+#else
+#define STRATA_PA_WMMA 0
+#endif
+typedef _Float16 wh8 __attribute__((ext_vector_type(8)));
+typedef float wf8 __attribute__((ext_vector_type(8)));
+constexpr int WCH = 32;          // cells per chunk (two 16-cell tiles)
+constexpr int WVS = 80;          // staged V row stride in bytes (64 codes, 16-byte aligned, banks spread)
+struct alignas(16) SmemW {
+    float part[4][16][WCH + 1];  // q.k per dim group
+    float p[16][WCH + 1];
+    float vs[4][WCH];            // V scale per (group, cell)
+    int valid[WCH];              // the cell has a resident pool row
+    uint8_t v[4][WCH][WVS];      // per wave: the chunk's V codes of its group, one row per cell
+    float qmax[4];
+    float alpha[16];
+    float lsum[16];
+    float mrow[16];
+};
+
+__device__ __forceinline__ wf8 wmma_f16(wh8 a, wh8 b, wf8 c) {
+#if STRATA_PA_WMMA
+    return __builtin_amdgcn_wmma_f32_16x16x16_f16_w32_gfx12(a, b, c);
+#else
+    __builtin_trap();
+    return c;
+#endif
+}
+
+__device__ __forceinline__ wh8 i8x8_to_h8(uint2 x) {   // exact: |code| <= 128
+    wh8 h;
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        h[i] = (_Float16) (int) (int8_t) (x.x >> (8 * i));
+        h[4 + i] = (_Float16) (int) (int8_t) (x.y >> (8 * i));
+    }
+    return h;
+}
+
+__global__ void __launch_bounds__(THREADS) prompt_attn_wmma_kernel(const float* __restrict__ q, QsaAttnPools p,
+                                                                   const int32_t* __restrict__ ids,
+                                                                   const int32_t* __restrict__ steps, int n_kv_heads,
+                                                                   int page_size, float scale_log2,
+                                                                   float* __restrict__ attn, int cap) {
+#if STRATA_PA_WMMA
+    __shared__ SmemW S;
+    const int qi = blockIdx.x, kvh = blockIdx.y;
+    const int n_head = n_kv_heads * G;
+    q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    ids += (size_t) qi * cap;
+    const int n = __ldg(steps + (size_t) qi * kStepCount + kStepWidth);
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
+    const int col = lane & 15, half = lane >> 4;   // fragment column / k half
+    const int dim0 = warp * 64;
+
+    float qm = 0.0f;
+    for (int i = t; i < G * HD; i += THREADS) qm = fmaxf(qm, fabsf(q[i]));
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) qm = fmaxf(qm, __shfl_xor_sync(0xffffffffu, qm, o));
+    if (lane == 0) S.qmax[warp] = qm;
+    if (t < 16) { S.mrow[t] = -INFINITY; S.lsum[t] = 0.0f; }
+    __syncthreads();
+    qm = fmaxf(fmaxf(S.qmax[0], S.qmax[1]), fmaxf(S.qmax[2], S.qmax[3]));
+    int qe = 0;
+    if (qm > 0.0f) frexpf(qm, &qe);
+    const float qup = ldexpf(1.0f, 14 - qe), qdown = ldexpf(scale_log2, qe - 14);
+    // q A fragments of this wave's 64 dims: row = col (heads 12..15 zero), k = dim0 + kk*16 + half*8 + i
+    wh8 qh[4], ql[4];
+#pragma unroll
+    for (int kk = 0; kk < 4; ++kk) {
+        float x[8];
+        if (col < G) {
+            const float4* src = reinterpret_cast<const float4*>(q + (size_t) col * HD + dim0 + kk * 16 + half * 8);
+            const float4 a = src[0], b = src[1];
+            x[0] = a.x; x[1] = a.y; x[2] = a.z; x[3] = a.w; x[4] = b.x; x[5] = b.y; x[6] = b.z; x[7] = b.w;
+        } else {
+#pragma unroll
+            for (int i = 0; i < 8; ++i) x[i] = 0.0f;
+        }
+#pragma unroll
+        for (int i = 0; i < 8; ++i) {
+            const float v = x[i] * qup;
+            const _Float16 hi = (_Float16) v;
+            qh[kk][i] = hi;
+            ql[kk][i] = (_Float16) (v - (float) hi);
+        }
+    }
+
+    wf8 acc[4];
+#pragma unroll
+    for (int j = 0; j < 4; ++j) acc[j] = wf8{0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+
+    const int n_chunks = (n + WCH - 1) / WCH;
+    for (int ci = 0; ci < n_chunks; ++ci) {
+        const int c0 = ci * WCH;
+        // this lane's cell of the chunk (lane = cell index): its pool row, or -1 (past the selection, or a block the
+        // KV streaming left non-resident: masked as in the decode kernel)
+        long long myrow = -1;
+        if (c0 + lane < n) {
+            const int cell = __ldg(ids + c0 + lane);
+            const long long page = (long long) __ldg(p.page_table + cell / page_size);
+            if (page >= 0) myrow = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+        }
+        // stage this wave's V slice of the chunk (64 bytes of each row) and the V scale; the K fragments come straight
+        // from global memory (8 consecutive codes per lane)
+        {
+            uint4 v0 = make_uint4(0, 0, 0, 0), v1 = v0, v2 = v0, v3 = v0;
+            float vsc = 0.0f;
+            if (myrow >= 0) {
+                const uint4* src = reinterpret_cast<const uint4*>(p.v_q + myrow * HD + dim0);
+                v0 = __ldg(src); v1 = __ldg(src + 1); v2 = __ldg(src + 2); v3 = __ldg(src + 3);
+                vsc = __half2float(__ushort_as_half(__ldg(p.v_scale + myrow * (HD / KV_Q8_GROUP) + warp)));
+            }
+            uint4* dst = reinterpret_cast<uint4*>(&S.v[warp][lane][0]);
+            dst[0] = v0; dst[1] = v1; dst[2] = v2; dst[3] = v3;
+            S.vs[warp][lane] = vsc;
+            if (warp == 0) S.valid[lane] = myrow >= 0;
+        }
+        // q.k over this wave's 64 dims for two 16-cell tiles, times the cell's K scale for this group
+#pragma unroll
+        for (int nt = 0; nt < 2; ++nt) {
+            const long long rr = __shfl(myrow, nt * 16 + col);
+            wf8 s = wf8{0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+            float ksc = 0.0f;
+            if (rr >= 0) ksc = __half2float(__ushort_as_half(__ldg(p.k_scale + rr * (HD / KV_Q8_GROUP) + warp)));
+#pragma unroll
+            for (int kk = 0; kk < 4; ++kk) {
+                uint2 kx = make_uint2(0, 0);
+                if (rr >= 0) kx = __ldg(reinterpret_cast<const uint2*>(p.k_q + rr * HD + dim0 + kk * 16 + half * 8));
+                const wh8 b = i8x8_to_h8(kx);
+                s = wmma_f16(qh[kk], b, s);
+                s = wmma_f16(ql[kk], b, s);
+            }
+#pragma unroll
+            for (int i = 0; i < 8; ++i) S.part[warp][half * 8 + i][nt * 16 + col] = s[i] * ksc;
+        }
+        __syncthreads();
+        // online softmax over the four groups' sum (fixed order): row t/8, 4 cells per thread
+        {
+            const int r = t >> 3, sub = t & 7;
+            float x[4], mx = -INFINITY;
+#pragma unroll
+            for (int j = 0; j < 4; ++j) {
+                const int c = sub * 4 + j;
+                // past the selection, or a masked cell (non-resident page, as in the decode kernel): no weight
+                x[j] = S.valid[c] ? (((S.part[0][r][c] + S.part[1][r][c]) + S.part[2][r][c]) + S.part[3][r][c]) * qdown
+                                  : -INFINITY;
+                mx = fmaxf(mx, x[j]);
+            }
+#pragma unroll
+            for (int o = 1; o < 8; o <<= 1) mx = fmaxf(mx, __shfl_xor_sync(0xffffffffu, mx, o));
+            const float m_old = S.mrow[r];
+            const float m_new = fmaxf(m_old, mx);
+            float sum = 0.0f;
+#pragma unroll
+            for (int j = 0; j < 4; ++j) {
+                const float e = x[j] == -INFINITY ? 0.0f : exp2f(x[j] - m_new);
+                S.p[r][sub * 4 + j] = e;
+                sum += e;
+            }
+#pragma unroll
+            for (int o = 1; o < 8; o <<= 1) sum += __shfl_xor_sync(0xffffffffu, sum, o);
+            if (sub == 0) {
+                const float a = m_old == -INFINITY ? 0.0f : exp2f(m_old - m_new);
+                S.alpha[r] = a;
+                S.lsum[r] = fmaf(S.lsum[r], a, sum);
+                S.mrow[r] = m_new;
+            }
+        }
+        __syncthreads();
+        // p.v over this wave's 64 dims: 4 tiles of 16 dims, 2 k-steps of 16 cells
+        {
+            float vmax = S.vs[warp][lane];
+#pragma unroll
+            for (int o = 16; o > 0; o >>= 1) vmax = fmaxf(vmax, __shfl_xor_sync(0xffffffffu, vmax, o));
+            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f, vdown = vmax * (1.0f / 16384.0f);
+            wf8 tmp[4];
+#pragma unroll
+            for (int j = 0; j < 4; ++j) tmp[j] = wf8{0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+#pragma unroll
+            for (int ks = 0; ks < 2; ++ks) {
+                const int cb = ks * 16 + half * 8;   // this lane's 8 cells
+                wh8 ah, al;
+#pragma unroll
+                for (int i = 0; i < 8; ++i) {
+                    const float pv = S.p[col][cb + i] * (S.vs[warp][cb + i] * vup);
+                    const _Float16 hi = (_Float16) pv;
+                    ah[i] = hi;
+                    al[i] = (_Float16) (pv - (float) hi);
+                }
+#pragma unroll
+                for (int j = 0; j < 4; ++j) {
+                    const int d = j * 16 + col;
+                    wh8 b;
+#pragma unroll
+                    for (int i = 0; i < 8; ++i) b[i] = (_Float16) (int) (int8_t) S.v[warp][cb + i][d];
+                    tmp[j] = wmma_f16(ah, b, tmp[j]);
+                    tmp[j] = wmma_f16(al, b, tmp[j]);
+                }
+            }
+            float a[8];
+#pragma unroll
+            for (int i = 0; i < 8; ++i) a[i] = S.alpha[half * 8 + i];
+#pragma unroll
+            for (int j = 0; j < 4; ++j)
+#pragma unroll
+                for (int i = 0; i < 8; ++i) acc[j][i] = fmaf(acc[j][i], a[i], tmp[j][i] * vdown);
+        }
+        // no barrier here: `v`/`vs` are this wave's own, and `p`/`alpha`/`valid` are rewritten only after the next
+        // chunk's first barrier (which every wave reaches after its p.v)
+    }
+    float inv[8];
+#pragma unroll
+    for (int i = 0; i < 8; ++i) {
+        const float l = S.lsum[half * 8 + i];
+        inv[i] = l > 0.0f ? 1.0f / l : 0.0f;
+    }
+#pragma unroll
+    for (int j = 0; j < 4; ++j)
+#pragma unroll
+        for (int i = 0; i < 8; ++i) {
+            const int row = half * 8 + i;
+            if (row < G) attn[(size_t) row * HD + dim0 + j * 16 + col] = acc[j][i] * inv[i];
+        }
+#else
+    __builtin_trap();
+#endif
+}
+
+// gfx12 (RDNA4) only, and only on request: the output differs from the default kernel's in its last bits
+bool hip_wmma_usable() {
+    static const bool want = [] {
+        const char* e = std::getenv("STRATA_HIP_WMMA");
+        return e != nullptr && e[0] == '1';
+    }();
+    if (!want) return false;
+    static int arch[64] = {};   // 0 unknown, 1 gfx12, 2 other
+    int dev = 0;
+    if (hipGetDevice(&dev) != hipSuccess || dev < 0 || dev >= 64) { (void) hipGetLastError(); return false; }
+    if (arch[dev] == 0) {
+        hipDeviceProp_t prop{};
+        if (hipGetDeviceProperties(&prop, dev) != hipSuccess) { (void) hipGetLastError(); return false; }
+        arch[dev] = std::strncmp(prop.gcnArchName, "gfx12", 5) == 0 ? 1 : 2;
+        static bool told = false;
+        if (!told) {
+            told = true;
+            std::fprintf(stderr, "strata: STRATA_HIP_WMMA: the prompt attention on matrix cores %s (%s)\n",
+                         arch[dev] == 1 ? "on" : "unavailable", prop.gcnArchName);
+        }
+    }
+    return arch[dev] == 1;
+}
+
+bool launch_wmma(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+                 const QsaShapes& s, float* attn, int64_t n_q, cudaStream_t st) {
+    const float scale_log2 = 1.4426950408889634f / sqrtf((float) HD);
+    for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
+        const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
+        prompt_attn_wmma_kernel<<<dim3((unsigned) nb, (unsigned) s.n_head_kv), THREADS, 0, st>>>(
+            q + q0 * s.n_head * HD, pools, ids + q0 * cap, steps + q0 * kStepCount, (int) s.n_head_kv,
+            (int) s.page_size, scale_log2, attn + q0 * s.n_head * HD, (int) cap);
+    }
+    const cudaError_t e = cudaGetLastError();
+    if (e != cudaSuccess) {
+        std::fprintf(stderr, "qsa_prompt_attn_batch (wmma): %s\n", cudaGetErrorString(e));
+        std::exit(1);
+    }
+    return true;
+}
+#endif
+
 }  // namespace
 
 bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
@@ -1202,7 +1487,9 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
                 */
                 return false;
             }
-            cc_major[dev] = major;
+            // STRATA_QSA_WARP=1|attn (an A/B arm): the pre-sm_80 kernels on any card, as RTX 20 runs them
+            const char* w = std::getenv("STRATA_QSA_WARP");
+            cc_major[dev] = w && (!std::strcmp(w, "1") || !std::strcmp(w, "attn")) ? 7 : strata::cc_major_of(major);
         }
         (void) cc_major[dev];
         // SYCL: the mma.sync kernel below is not ported (upstream's Turing/sm_80 split - `turing` - does not
@@ -1211,7 +1498,14 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
         return false;   // the caller takes the older kernel
     }
 #if defined(__HIPCC__)
-    return false;   // the tensor-core kernel is compiled out on AMD (its major version is not a CUDA sm)
+    // the tensor-core kernels are compiled out on AMD (its major version is not a CUDA sm); RDNA4 has its own int8-KV
+    // matrix-core kernel, opt-in (STRATA_HIP_WMMA=1); everything else keeps the old kernel
+    (void) turing;
+    if (pools.k_q != nullptr && pools.v_q != nullptr && pools.k_scale != nullptr && pools.v_scale != nullptr &&
+        pools.k_q4 == nullptr && pools.v_q4 == nullptr && s.head_dim == HD && s.n_head == (int64_t) G * s.n_head_kv &&
+        cap > 0 && ids && steps && pools.page_table && hip_wmma_usable())
+        return launch_wmma(q, pools, ids, steps, cap, s, attn, n_q, (cudaStream_t) stream);
+    return false;
 #endif
     if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids ||
         !steps || !pools.page_table)
diff --git a/sycl/src/kernels/cuda/qsa_select.dp.cpp b/sycl/src/kernels/cuda/qsa_select.dp.cpp
index 9a195a20d4e..d562f00c54a 100644
--- a/sycl/src/kernels/cuda/qsa_select.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_select.dp.cpp
@@ -3,11 +3,15 @@
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
+#include "strata/core/emulate.hpp"
+#include <cstdlib>
+#include <cstring>
 #include "strata/kernels/qsa_select.hpp"
 
 #include <cfloat>
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
 
 namespace strata::kernels {
 namespace {
@@ -417,6 +421,160 @@ __dpct_inline__ void block_scores_tc_kernel(
     }
 }
 
+#if defined(__HIPCC__)
+// ---- gfx12 (RDNA4: gfx1200 / gfx1201) scorer on v_wmma_f32_16x16x16_bf16 (wave32).  Same GEMM as above: for a tile of 16
+// queries, every block's score is sum over the 4 indexer heads of relu(q_h . k), K = 128.  FP32-level accuracy from a
+// three-way bf16 split of both operands (x = hi + mid + lo EXACTLY - the top 8, next 8 and last 8 bits of the fp32
+// mantissa, so bf16's fp32-sized exponent range needs no scaling) and the six products of order <= 2, smallest first;
+// like the TF32 kernel it sums in another order than the warp kernel (not bitwise).  The tail block n_bid is the warp
+// kernel's arithmetic (block_scores_tail_kernel).
+//   D = A x B with A = 16 key blocks (row l%16 of a lane, k = 8*(l/16)+i), B = 16 queries (column l%16, same k):
+//   a lane ends up with 8 consecutive blocks of ONE query, written as one run.  No LDS for keys: a lane reads its
+//   32-byte slice of the key row from global (the 16 query tiles of a launch re-read them from L2); the queries are
+//   split once per CTA into LDS.
+#if defined(__gfx1200__) || defined(__gfx1201__)
+#define STRATA_SEL_GFX12 1
+#else
+#define STRATA_SEL_GFX12 0
+#endif
+typedef short sel_s8 __attribute__((ext_vector_type(8)));
+typedef float sel_f8 __attribute__((ext_vector_type(8)));
+typedef uint32_t sel_u4 __attribute__((ext_vector_type(4)));
+constexpr int WQT = 16;                    // queries per CTA (the N of one WMMA)
+constexpr int WITER = 4;                   // key tiles per warp (the CTA covers 4 warps * WITER * 16 blocks)
+constexpr int WQS = IDX_DIM + 8;           // bf16 elements per LDS row: 272 bytes, conflict-free 16-byte reads
+
+__device__ __forceinline__ sel_f8 wmma_bf16(const sel_s8& a, const sel_s8& b, const sel_f8& c) {
+#if STRATA_SEL_GFX12
+    return __builtin_amdgcn_wmma_f32_16x16x16_bf16_w32_gfx12(a, b, c);
+#else
+    /* unreachable on SYCL: the launcher refuses this device */
+    return c;
+#endif
+}
+// the bf16 pieces of x as fp32 bit patterns whose upper 16 bits are the bf16 (lower 16 are zero)
+__device__ __forceinline__ void split3(float x, uint32_t& hi, uint32_t& mid, uint32_t& lo) {
+    hi = sycl::bit_cast<uint32_t>(x) & 0xffff0000u;
+    const float r1 = x - __uint_as_float(hi);                   // exact
+    mid = sycl::bit_cast<uint32_t>(r1) & 0xffff0000u;
+    lo = sycl::bit_cast<uint32_t>(r1 - __uint_as_float(mid)) & 0xffff0000u;   // exact: at most 8 significant bits left
+}
+__device__ __forceinline__ uint32_t pack_bf16x2(uint32_t a, uint32_t b) {   // low half = a's bf16, high half = b's
+#if STRATA_SEL_GFX12
+    return __builtin_amdgcn_perm(b, a, 0x07060302u);
+#else
+    return (a >> 16) | (b & 0xffff0000u);
+#endif
+}
+
+__global__ void __launch_bounds__(128) block_scores_wmma_kernel(const float* __restrict__ pooled,
+                                                                const float* __restrict__ q_idx,
+                                                                const int32_t* __restrict__ steps, int64_t nq,
+                                                                int64_t max_blocks, int64_t reach,
+                                                                float* __restrict__ out) {
+    __shared__ __align__(16) uint16_t sq[3][IDX_HEADS][WQT][WQS];   // hi / mid / lo, [head][query][dim]
+    __shared__ int s_nbid[WQT];
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5, l16 = lane & 15, g = lane >> 4;
+    const int64_t q0 = (int64_t) blockIdx.y * WQT;
+    for (int i = t; i < WQT * IDX_HEADS * IDX_DIM / 4; i += 128) {
+        const int row = i / (IDX_DIM / 4), c = i % (IDX_DIM / 4);
+        const int qr = row / IDX_HEADS, h = row % IDX_HEADS;
+        float4 v = make_float4(0.f, 0.f, 0.f, 0.f);
+        if (q0 + qr < nq) v = reinterpret_cast<const float4*>(q_idx + (q0 + qr) * IDX_HEADS * IDX_DIM)[h * (IDX_DIM / 4) + c];
+        const float x[4] = {v.x, v.y, v.z, v.w};
+        uint32_t hb[4], mb[4], lb[4];
+#pragma unroll
+        for (int j = 0; j < 4; ++j) split3(x[j], hb[j], mb[j], lb[j]);
+        *reinterpret_cast<uint2*>(&sq[0][h][qr][c * 4]) = make_uint2(pack_bf16x2(hb[0], hb[1]), pack_bf16x2(hb[2], hb[3]));
+        *reinterpret_cast<uint2*>(&sq[1][h][qr][c * 4]) = make_uint2(pack_bf16x2(mb[0], mb[1]), pack_bf16x2(mb[2], mb[3]));
+        *reinterpret_cast<uint2*>(&sq[2][h][qr][c * 4]) = make_uint2(pack_bf16x2(lb[0], lb[1]), pack_bf16x2(lb[2], lb[3]));
+    }
+    if (t < WQT) s_nbid[t] = q0 + t < nq ? steps[(q0 + t) * kStepCount + kStepNBid] : 0;
+    __syncthreads();
+    int hi_nbid = 0;
+#pragma unroll
+    for (int i = 0; i < WQT; ++i) hi_nbid = max(hi_nbid, s_nbid[i]);
+    const int64_t qi = q0 + l16;
+    const int nb_q = s_nbid[l16];
+    for (int it = 0; it < WITER; ++it) {
+        const int64_t b0 = (((int64_t) blockIdx.x * WITER + it) * 4 + warp) * 16;
+        if (b0 >= reach || b0 >= hi_nbid) break;          // warp-uniform; later tiles start higher
+        const int64_t row = b0 + l16;
+        const bool rv = row < hi_nbid && row < max_blocks;
+        const float* kp = pooled + (rv ? row : 0) * IDX_DIM + g * 8;
+        // acc: the hi*hi products; cor: the five smaller ones (<= 2^-8 of it). Kept apart and added once at the end: a
+        // correction summed into the big accumulator is rounded to ITS ulp at every one of the 48 steps (measured: 8e-7
+        // of the score scale; apart, near the warp kernel's)
+        sel_f8 acc[IDX_HEADS], cor[IDX_HEADS];
+#pragma unroll
+        for (int h = 0; h < IDX_HEADS; ++h) acc[h] = cor[h] = sel_f8{0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f};
+#pragma unroll 2
+        for (int kk = 0; kk < IDX_DIM / 16; ++kk) {
+            float4 k0 = make_float4(0.f, 0.f, 0.f, 0.f), k1 = k0;
+            if (rv) {
+                k0 = *reinterpret_cast<const float4*>(kp + kk * 16);
+                k1 = *reinterpret_cast<const float4*>(kp + kk * 16 + 4);
+            }
+            const float x[8] = {k0.x, k0.y, k0.z, k0.w, k1.x, k1.y, k1.z, k1.w};
+            uint32_t hb[8], mb[8], lb[8];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) split3(x[j], hb[j], mb[j], lb[j]);
+            sel_u4 ah, am, al;
+#pragma unroll
+            for (int j = 0; j < 4; ++j) {
+                ah[j] = pack_bf16x2(hb[2 * j], hb[2 * j + 1]);
+                am[j] = pack_bf16x2(mb[2 * j], mb[2 * j + 1]);
+                al[j] = pack_bf16x2(lb[2 * j], lb[2 * j + 1]);
+            }
+            const sel_s8 Ah = __builtin_bit_cast(sel_s8, ah), Am = __builtin_bit_cast(sel_s8, am),
+                         Al = __builtin_bit_cast(sel_s8, al);
+#pragma unroll
+            for (int h = 0; h < IDX_HEADS; ++h) {
+                const sel_s8 Bh = *reinterpret_cast<const sel_s8*>(&sq[0][h][l16][kk * 16 + g * 8]);
+                const sel_s8 Bm = *reinterpret_cast<const sel_s8*>(&sq[1][h][l16][kk * 16 + g * 8]);
+                const sel_s8 Bl = *reinterpret_cast<const sel_s8*>(&sq[2][h][l16][kk * 16 + g * 8]);
+                cor[h] = wmma_bf16(Al, Bh, cor[h]);
+                cor[h] = wmma_bf16(Ah, Bl, cor[h]);
+                cor[h] = wmma_bf16(Am, Bm, cor[h]);
+                cor[h] = wmma_bf16(Ah, Bm, cor[h]);
+                cor[h] = wmma_bf16(Am, Bh, cor[h]);
+                acc[h] = wmma_bf16(Ah, Bh, acc[h]);
+            }
+        }
+        // relu per head, heads added in order (as the warp kernel); this lane: query qi, blocks b0 + 8g .. 8g+7
+        if (qi < nq) {
+#pragma unroll
+            for (int i = 0; i < 8; ++i) {
+                const int64_t b = b0 + g * 8 + i;
+                if (b >= nb_q || b >= max_blocks) continue;
+                float score = 0.0f;
+#pragma unroll
+                for (int h = 0; h < IDX_HEADS; ++h) {
+                    const float d = acc[h][i] + cor[h][i];
+                    score += d > 0.0f ? d : 0.0f;
+                }
+                out[qi * max_blocks + b] = score;
+            }
+        }
+    }
+}
+
+// the gfx12 kernel needs gfx1200/gfx1201 code objects and a gfx12 device (gfx1100 has WMMA too, with another layout)
+bool sel_gfx12_device() {
+    static int ok[64] = {};   // per device: 0 unknown, 1 yes, 2 no
+    int dev = 0;
+    if (cudaGetDevice(&dev) != cudaSuccess || dev < 0 || dev >= 64) { cudaGetLastError(); return false; }
+    if (ok[dev] == 0) {
+        cudaDeviceProp prop;
+        ok[dev] = (cudaGetDeviceProperties(&prop, dev) == cudaSuccess &&
+                   (std::strncmp(prop.gcnArchName, "gfx1200", 7) == 0 || std::strncmp(prop.gcnArchName, "gfx1201", 7) == 0))
+                      ? 1 : 2;
+        cudaGetLastError();
+    }
+    return ok[dev] == 1;
+}
+#endif  // __HIPCC__
+
 // the tail block n_bid of each query: exactly block_scores_kernel's arithmetic for that block
 __dpct_inline__ void block_scores_tail_kernel(const float *__restrict__ dead,
                                               const float *__restrict__ q_idx,
@@ -462,6 +620,14 @@ __dpct_inline__ void block_scores_tail_kernel(const float *__restrict__ dead,
 // block_topk_kernel's (radix threshold, ties to the lowest index, cells ascending): identical ids.
 constexpr int TK_T = 1024;
 constexpr int TK_PER = 33;
+#if defined(__HIPCC__)
+// AMD (RDNA, wave32): a 1,024-thread block may use 192 VGPRs per lane, so the keys of 66 blocks per thread fit - contexts
+// up to 4 * 1024 * 66 = 270,336 cells (the 262,144 --max-context) keep the register kernel. NVIDIA's 64 registers per
+// thread at 1,024 threads allow only TK_PER.
+constexpr int TK_PER_MAX = 66;
+#else
+constexpr int TK_PER_MAX = TK_PER;
+#endif
 
 __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -471,9 +637,9 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
 #pragma unroll
     for (int o = 1; o < 32; o <<= 1) {
         /*
-        DPCT1108: '__shfl_up_sync' was migrated with the experimental
-        feature masked sub_group function which may not be supported by all
-        compilers or runtimes. You may need to adjust the code.
+        DPCT1108: '__shfl_up_sync' was migrated with the experimental feature
+        masked sub_group function which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
         */
         const int y = dpct::experimental::shift_sub_group_right(
             0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
@@ -522,6 +688,7 @@ __dpct_inline__ int block_excl_scan(int v, int *s_warp, int &total) {
     return r;
 }
 
+template <int PER>
 /*
 DPCT1110: The total declared local variable size in device function
 block_topk_reg_kernel exceeds 128 bytes and may cause high register pressure.
@@ -555,11 +722,11 @@ auto &hist =
     }
     const float* sc = scores + qi * max_blocks;
     const int64_t nb = n_bid + 1;
-    const int64_t per = (nb + TK_T - 1) / TK_T;       // <= TK_PER (the caller checks)
+    const int64_t per = (nb + TK_T - 1) / TK_T;       // <= PER (the caller checks)
     const int64_t b0 = (int64_t) t * per, b1 = (b0 + per < nb) ? b0 + per : nb;
-    uint32_t key[TK_PER];
+    uint32_t key[PER];
 #pragma unroll
-    for (int j = 0; j < TK_PER; ++j) key[j] = (b0 + j < b1) ? order_key(sc[b0 + j]) : 0u;
+    for (int j = 0; j < PER; ++j) key[j] = (b0 + j < b1) ? order_key(sc[b0 + j]) : 0u;
     auto weight = [&](int64_t b) -> int { return b < n_bid ? R : (int) (n_kv - n_bid * R); };
     uint32_t prefix = 0;
     int above = 0;
@@ -569,7 +736,7 @@ auto &hist =
         sycl::group_barrier(sycl::ext::oneapi::this_work_item::get_sub_group());
         const uint32_t hi_mask = shift == 24 ? 0u : (0xffffffffu << (shift + 8));
 #pragma unroll
-        for (int j = 0; j < TK_PER; ++j) {
+        for (int j = 0; j < PER; ++j) {
             const int64_t b = b0 + j;
             if (b >= b1) break;
             const int w = weight(b);
@@ -642,7 +809,7 @@ auto &hist =
     const int64_t eq_budget = width - above;
     int gt = 0, eq = 0;
 #pragma unroll
-    for (int j = 0; j < TK_PER; ++j) {
+    for (int j = 0; j < PER; ++j) {
         const int64_t b = b0 + j;
         if (b >= b1) break;
         const int w = weight(b);
@@ -659,7 +826,7 @@ auto &hist =
     int64_t wpos = block_excl_scan(sel, s_warp, tot);
     int64_t eq_left = my_eq;
 #pragma unroll
-    for (int j = 0; j < TK_PER; ++j) {
+    for (int j = 0; j < PER; ++j) {
         const int64_t b = b0 + j;
         if (b >= b1) break;
         const int w = weight(b);
@@ -839,6 +1006,25 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
                          void *stream, int64_t active_blocks) try {
     if (nq <= 0) return true;
     if (s.idx_dim != IDX_DIM || s.idx_n_head != IDX_HEADS || s.idx_block != R || nq > 65535 * TC_QT) return false;
+#if defined(__HIPCC__)
+    // AMD: the gfx12 (RDNA4) WMMA scorer, opt-in (STRATA_SELECT_WMMA=1): it selects slightly differently from the warp
+    // kernel (254/256 queries the same), so the default keeps the warp kernel; every other target keeps it too (false)
+    static const bool wmma_on = [] {
+        const char* v = std::getenv("STRATA_SELECT_WMMA");
+        return v != nullptr && v[0] != '\0' && v[0] != '0';
+    }();
+    if (!wmma_on || !sel_gfx12_device()) return false;
+    {
+        const int64_t reach = active_blocks > 0 && active_blocks < max_blocks ? active_blocks : max_blocks;
+        const int64_t per = (int64_t) 4 * WITER * 16;
+        const dim3 grid((unsigned) ((reach + per - 1) / per), (unsigned) ((nq + WQT - 1) / WQT));
+        block_scores_wmma_kernel<<<grid, 128, 0, (cudaStream_t) stream>>>(pooled, q_idx, steps, nq, max_blocks, reach, scores);
+        block_scores_tail_kernel<<<(unsigned) nq, 32, 0, (cudaStream_t) stream>>>(dead, q_idx, steps, max_blocks, scores);
+        const cudaError_t e = cudaGetLastError();
+        if (e != cudaSuccess) { std::fprintf(stderr, "qsa_block_scores_tc: %s\n", cudaGetErrorString(e)); std::exit(1); }
+        return true;
+    }
+#else
     {   // sm_80 or newer (TF32 MMA); an older card keeps the warp kernel
         static int cc_major[64] = {};
         int dev = 0;
@@ -860,14 +1046,13 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
                 */
                 return false;
             }
-            cc_major[dev] = major;
+            // STRATA_QSA_WARP=1|select (an A/B arm): the pre-sm_80 kernels on any card, as RTX 20 runs them
+            const char* w = std::getenv("STRATA_QSA_WARP");
+            cc_major[dev] = w && (!std::strcmp(w, "1") || !std::strcmp(w, "select")) ? 7 : strata::cc_major_of(major);
         }
         (void) cc_major[dev];
         return false;   // SYCL: the tensor-core kernel is not ported yet; the caller takes the older kernel
     }
-#if defined(__HIPCC__)
-    return false;   // the tensor-core kernel is compiled out on AMD (its major version is not a CUDA sm)
-#endif
     static bool attr[64] = {};   // the shared-memory opt-in is per device (a layer split runs it on several)
     int adev = 0;
     adev = dpct::get_current_device_id();
@@ -947,6 +1132,7 @@ bool qsa_block_scores_tc(const float *pooled, const float *dead,
     */
 
     return true;
+#endif
 }
 catch (sycl::exception const &exc) {
   std::cerr << exc.what() << "Exception caught at file:" << __FILE__
@@ -988,12 +1174,30 @@ void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, i
 }
 
 void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
-                    const QsaShapes& s, int32_t* ids, void* stream) {
+                    const QsaShapes& s, int32_t* ids, void* stream, int64_t active_blocks) {
     // keys in registers when every query's blocks fit (contexts up to ~135K cells); the same ids. STRATA_TOPK_OLD=1:
     // the kernel that reads them from memory on every pass
     static const bool old = std::getenv("STRATA_TOPK_OLD") != nullptr;
     if (nq <= 0) return;
-    if (old || max_blocks > (int64_t) TK_T * TK_PER) {
+    // the blocks a query can have: the call's active count when the caller knows it (the prompt path), else the capacity.
+    // Decode (no count) keeps the capacity rule and the original register width: nothing changes there.
+#if defined(__HIPCC__)
+    const bool counted = active_blocks > 0;
+#else
+    // CUDA keeps 0.1.32's capacity rule: #337's dispatch was measured on RDNA4 only, and on the RTX 5070 the 64K
+    // prompts read 1-3% slower with it
+    const bool counted = false;
+    (void) active_blocks;
+#endif
+    const int64_t reach = counted && active_blocks < max_blocks ? active_blocks : max_blocks;
+    const int64_t fit = (int64_t) TK_T * (counted ? TK_PER_MAX : TK_PER);
+#if defined(__HIPCC__)
+    constexpr int64_t kRegMinBlocks = 7168;   // gfx1201: below ~28K cells the 1,024-thread kernel's fixed cost loses to the ref
+    const bool too_small = counted && reach < kRegMinBlocks;
+#else
+    const bool too_small = false;
+#endif
+    if (old || too_small || reach > fit) {
         qsa_block_topk_ref(scores, steps, nq, max_blocks, cap, s, ids, stream);
         return;
     }
@@ -1001,26 +1205,49 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
         std::fprintf(stderr, "qsa_block_topk: unsupported geometry or cap\n");
         std::exit(1);
     }
+    if (reach <= (int64_t) TK_T * TK_PER)
+        /*
+        DPCT1049: The work-group size passed to the SYCL kernel may exceed
+        the limit. To get the device limit, query
+        info::device::max_work_group_size. Adjust the work-group size if needed.
+        */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<dpct_kernel_name<class block_topk_reg_kernel_652097,
+                                            dpct_kernel_scalar<TK_PER>>>(
+                sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
+                                      sycl::range(1, 1, TK_T),
+                                  sycl::range(1, 1, TK_T)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        block_topk_reg_kernel<TK_PER>(scores, steps, max_blocks,
+                                                      cap, ids);
+                    });
+    } else
     /*
-    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
-    limit. To get the device limit, query info::device::max_work_group_size.
-    Adjust the work-group size if needed.
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed
+    the limit. To get the device limit, query
+    info::device::max_work_group_size. Adjust the work-group size if needed.
     */
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
-            ->parallel_for<
-                dpct_kernel_name<class block_topk_reg_kernel_652097>>(
+            ->parallel_for<dpct_kernel_name<class block_topk_reg_kernel_652098,
+                                            dpct_kernel_scalar<TK_PER_MAX>>>(
                 sycl::nd_range<3>(sycl::range(1, 1, (unsigned)nq) *
                                       sycl::range(1, 1, TK_T),
                                   sycl::range(1, 1, TK_T)),
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        block_topk_reg_kernel(scores, steps, max_blocks, cap,
-                                              ids);
+                        block_topk_reg_kernel<TK_PER_MAX>(scores, steps,
+                                                          max_blocks, cap, ids);
                     });
     }
     /*
diff --git a/sycl/src/kernels/cuda/quantize_act.dp.cpp b/sycl/src/kernels/cuda/quantize_act.dp.cpp
index ec13c7dd449..ac4d0fdb198 100644
--- a/sycl/src/kernels/cuda/quantize_act.dp.cpp
+++ b/sycl/src/kernels/cuda/quantize_act.dp.cpp
@@ -221,10 +221,10 @@ __dpct_inline__ void quantize_q8_K_kernel(const float *__restrict__ x,
         // from the reference in 1 element of 524,288 for exactly this reason, and `__fmul_rn` pins the
         // rounding step the source actually performs.
         /*
-        DPCT1013: The rounding mode could not be specified and the
-        generated code may have different accuracy than the original code.
-        Verify the correctness. SYCL math built-in function rounding mode is
-        aligned with OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
         */
         const int v = nearest_int_dev(iscale * xb[j]);
         qs[j] = (int8_t)sycl::min(
diff --git a/sycl/src/kernels/cuda/router_top10.dp.cpp b/sycl/src/kernels/cuda/router_top10.dp.cpp
index b91748e729d..1a602e5defd 100644
--- a/sycl/src/kernels/cuda/router_top10.dp.cpp
+++ b/sycl/src/kernels/cuda/router_top10.dp.cpp
@@ -313,10 +313,185 @@ runtimes. You may need to adjust the code.
     }
 }
 
+#if defined(__HIPCC__)
+// ---- S6, AMD: the same router, BIT-IDENTICAL, without its serial parts. Measured on RDNA4 (gfx1201) the kernel
+// above took 39 us per call in decode (16% of the GPU's decode time): the ascending double sum is 512 dependent FP64
+// adds (~50 cycles each there), the ten selection passes are 20 block barriers, and the renormalisation re-reads its
+// ten weights from global memory one by one.  Here:
+//   * the sum's ONLY use is inv = (float) (1.0 / sum).  Every term is positive and the largest is exactly 1
+//     (exp(0)), so the serial sum and any other summation order both lie within 2^-43 (relative) of the exact sum
+//     (|serial - exact| <= 511u, |tree - exact| <= 21u, u = 2^-53).  1.0 / x and the float cast are monotone: when
+//     the bracket [tree (1 - 2^-40), tree (1 + 2^-40)] maps to ONE float, that float is the serial sum's.  Otherwise
+//     (about 1 row in 1000 in the parity test, or a non-finite sum) thread 0 runs the serial sum as before;
+//   * the selection runs on wave 0 alone with the probabilities in registers (16 per lane): the largest p with the
+//     lowest index on ties is unique, so the butterfly finds the same expert as the block reduction did;
+//   * the renormalisation sums the ten weights in rank order from registers and divides them in parallel.
+// Same expressions, same operands: the ids and weights are bitwise those of router_top10_kernel (hip_router_fast
+// checks it on 65,536 rows with ties, near-ties, NaN rows and the forced serial path). STRATA_HIP_ROUTER_OLD=1: the
+// kernel above.
+template <bool FORCE_SERIAL>
+__global__ void router_top10_fast_kernel(const float* __restrict__ logits, int n_tokens, int n_expert, int k,
+                                         int* __restrict__ ids, float* __restrict__ weights) {
+    extern __shared__ unsigned char s_raw[];
+    const size_t taken_bytes = ((size_t) n_expert + 15u) & ~(size_t) 15u;
+    double* s_ex = (double*) (s_raw + taken_bytes);
+    __shared__ float s_red[RT_MAX_THREADS / 32];
+    __shared__ double s_dred[RT_MAX_THREADS / 32];
+    __shared__ float s_inv;
+    const int t = blockIdx.x;
+    if (t >= n_tokens) return;
+    const int tid = threadIdx.x, lane = tid & 31, warp = tid >> 5;
+    const int nt = blockDim.x, nw = (nt + 31) >> 5;
+    const float* l = logits + (size_t) t * n_expert;
+    // the max: as router_top10_kernel (exact, order-independent)
+    float mx = -INFINITY;
+    for (int e = tid; e < n_expert; e += nt) mx = fmaxf(mx, l[e]);
+    for (int off = 16; off > 0; off >>= 1) mx = fmaxf(mx, __shfl_down_sync(0xffffffffu, mx, off));
+    if (lane == 0) s_red[warp] = mx;
+    __syncthreads();
+    if (tid < 32) {
+        float v = (tid < nw) ? s_red[tid] : -INFINITY;
+        for (int off = 16; off > 0; off >>= 1) v = fmaxf(v, __shfl_down_sync(0xffffffffu, v, off));
+        if (tid == 0) s_red[0] = v;
+    }
+    __syncthreads();
+    mx = s_red[0];
+    // the exponentials (the same expression), and a tree sum of them for the bracket
+    double part = 0.0;
+    for (int e = tid; e < n_expert; e += nt) {
+        const double x = exp((double) l[e] - (double) mx);
+        s_ex[e] = x;
+        part += x;
+    }
+    for (int off = 16; off > 0; off >>= 1) part += __shfl_xor_sync(0xffffffffu, part, off);
+    if (lane == 0) s_dred[warp] = part;
+    __syncthreads();
+    double tot = 0.0;
+    for (int w = 0; w < nw; ++w) tot += s_dred[w];
+    const double lo = tot * (1.0 - 0x1p-40), hi = tot * (1.0 + 0x1p-40);
+    const float f_lo = (float) (1.0 / hi), f_hi = (float) (1.0 / lo);
+    float inv;
+    if (!FORCE_SERIAL && tot >= 1.0 && hi < 1e300 && f_lo == f_hi) {
+        inv = f_lo;
+    } else {   // block-uniform (every thread computed the same tot): the serial sum, exactly as router_top10_kernel
+        if (tid == 0) {
+            double sum = 0.0;
+            for (int e = 0; e < n_expert; ++e) sum += s_ex[e];
+            s_inv = (float) (1.0 / sum);
+        }
+        __syncthreads();
+        inv = s_inv;
+    }
+    if (warp != 0) return;
+    // wave 0: lane holds experts lane + 32 j; p is router_top10_kernel's expression
+    constexpr int PER = 16;
+    float pv[PER];
+    unsigned live = 0;
+#pragma unroll
+    for (int j = 0; j < PER; ++j) {
+        const int e = lane + 32 * j;
+        pv[j] = -INFINITY;
+        if (e < n_expert) { pv[j] = (float) (s_ex[e] * inv); live |= 1u << j; }
+    }
+    float my_w = 0.0f;
+    int my_id = 0, nsel = 0;
+    for (int i = 0; i < k; ++i) {
+        float bv = -INFINITY;
+        int bi = n_expert;   // a sentinel that loses to every real index
+#pragma unroll
+        for (int j = 0; j < PER; ++j)
+            if (((live >> j) & 1u) && pv[j] > bv) { bv = pv[j]; bi = lane + 32 * j; }
+        for (int off = 16; off > 0; off >>= 1) {
+            const float ov = __shfl_xor_sync(0xffffffffu, bv, off);
+            const int oi = __shfl_xor_sync(0xffffffffu, bi, off);
+            if (ov > bv || (ov == bv && oi < bi)) { bv = ov; bi = oi; }
+        }
+        if (bi >= n_expert) break;   // as router_top10_kernel: no rank i or later is written (every p left is NaN)
+        if ((bi & 31) == lane) live &= ~(1u << (bi >> 5));
+        if (lane == i) { my_w = bv; my_id = bi; }
+        nsel = i + 1;
+    }
+    if (nsel == k) {
+        double s = 0.0;
+        for (int i = 0; i < k; ++i) s += (double) __shfl_sync(0xffffffffu, my_w, i);
+        const double sc = fmax(s, 6.103515625e-05);       // 2**-14
+        if (lane < k) {
+            ids[(size_t) t * k + lane] = my_id;
+            weights[(size_t) t * k + lane] = (float) ((double) my_w / sc);
+        }
+    } else {   // router_top10_kernel's tail exactly: unwritten ranks keep what the buffer held and are renormalised too
+        if (lane < nsel) { ids[(size_t) t * k + lane] = my_id; weights[(size_t) t * k + lane] = my_w; }
+        __threadfence();
+        if (lane == 0) {
+            double s = 0.0;
+            for (int i = 0; i < k; ++i) s += (double) weights[(size_t) t * k + i];
+            const double sc = fmax(s, 6.103515625e-05);
+            for (int i = 0; i < k; ++i)
+                weights[(size_t) t * k + i] = (float) ((double) weights[(size_t) t * k + i] / sc);
+        }
+    }
+}
+
+void launch_generic(const float* logits, int n_tokens, int n_expert, int k, int* ids, float* weights, void* stream,
+                    int mode) {   // mode 0: router_top10_kernel, 1: the HIP fast kernel, 2: the fast kernel's serial path
+    int threads = n_expert < RT_MAX_THREADS ? n_expert : RT_MAX_THREADS;
+    threads = (threads + 31) & ~31;
+    const size_t taken_bytes = ((size_t) n_expert + 15u) & ~(size_t) 15u;
+    const size_t smem = taken_bytes + (size_t) n_expert * sizeof(double) + (size_t) n_expert * sizeof(float);
+    if (mode == 1) {
+        router_top10_fast_kernel<false><<<(unsigned) n_tokens, threads, smem, (cudaStream_t) stream>>>(
+            logits, n_tokens, n_expert, k, ids, weights);
+        return;
+    }
+    if (mode == 2) {
+        router_top10_fast_kernel<true><<<(unsigned) n_tokens, threads, smem, (cudaStream_t) stream>>>(
+            logits, n_tokens, n_expert, k, ids, weights);
+        return;
+    }
+    router_top10_kernel<<<(unsigned) n_tokens, threads, smem, (cudaStream_t) stream>>>(
+        logits, n_tokens, n_expert, k, ids, weights);
+}
+#endif
+
 }  // namespace
 
+bool router_top10_variant(const float* logits, int n_tokens, int n_expert, int k, int* ids, float* weights,
+                          void* stream, int variant) {
+#if defined(__HIPCC__)
+    if (n_tokens <= 0 || n_expert <= 64 || n_expert > 512 || k <= 0 || k > 32) return false;
+    if (variant < 0 || variant > 2) return false;
+    launch_generic(logits, n_tokens, n_expert, k, ids, weights, stream, variant);
+    return cudaGetLastError() == cudaSuccess;
+#else
+    (void) logits; (void) n_tokens; (void) n_expert; (void) k; (void) ids; (void) weights; (void) stream;
+    (void) variant;
+    return false;
+#endif
+}
+
 void router_top10(const float *logits, int n_tokens, int n_expert, int k,
                   int *ids, float *weights, void *stream) try {
+#if defined(__HIPCC__)
+    {
+        static const bool old = std::getenv("STRATA_HIP_ROUTER_OLD") != nullptr;
+        if (!old && n_tokens > 0 && n_expert > 64 && n_expert <= 512 && k > 0 && k <= 32) {
+            launch_generic(logits, n_tokens, n_expert, k, ids, weights, stream, 1);
+            const cudaError_t e = cudaGetLastError();
+            if (e != cudaSuccess) {
+                std::fprintf(stderr, "router_top10 launch: %s\n", cudaGetErrorString(e));
+                std::exit(1);
+            }
+            if (stream == nullptr) {
+                const cudaError_t s = cudaDeviceSynchronize();
+                if (s != cudaSuccess) {
+                    std::fprintf(stderr, "router_top10: %s\n", cudaGetErrorString(s));
+                    std::exit(1);
+                }
+            }
+            return;
+        }
+    }
+#endif
     if (n_tokens <= 0 || n_expert <= 0 || k <= 0) return;
     if (k > 64) {
         std::fprintf(stderr, "router_top10: k %d exceeds the kernel's 64\n", k);
diff --git a/sycl/src/kernels/cuda/verify_kernels.dp.cpp b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
index 7b9178e1850..f3ca2482a1f 100644
--- a/sycl/src/kernels/cuda/verify_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/verify_kernels.dp.cpp
@@ -1278,7 +1278,7 @@ namespace {
     __dpct_inline__ void gpu_stamp_kernel(unsigned long long *buf, int i) {
     unsigned long long t;
 #if defined(__HIPCC__)
-    t = wall_clock64() * 10ull;   // gfx11 / gfx12: a constant 100 MHz counter, in ns
+    t = wall_clock64() * 10ull;   // gfx10.3 / gfx11 / gfx12: a constant 100 MHz counter, in ns
 #else
     /*
     DPCT1053: Migration of device assembly code is not supported.
diff --git a/sycl/src/kernels/kv_hybrid_parity.cpp b/sycl/src/kernels/kv_hybrid_parity.cpp
index cfcde58c08a..871532de3f0 100644
--- a/sycl/src/kernels/kv_hybrid_parity.cpp
+++ b/sycl/src/kernels/kv_hybrid_parity.cpp
@@ -283,9 +283,9 @@ int main() {
     for (auto& x : q) x = nd(rng);
     float* d_q = dalloc<float>(q.size());
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
diff --git a/sycl/src/kernels/kv_q4_parity.cpp b/sycl/src/kernels/kv_q4_parity.cpp
index 61d43df4ae5..46e43fb8c55 100644
--- a/sycl/src/kernels/kv_q4_parity.cpp
+++ b/sycl/src/kernels/kv_q4_parity.cpp
@@ -116,9 +116,9 @@ int main() {
     float* d_src = dalloc<float>(n_vectors * 256);
     float* d_dst = dalloc<float>(n_vectors * 256);
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -213,9 +213,9 @@ int main() {
     for (int i = 0; i < pages; ++i) table[i] = (i * 3 + 5) % pages; // permutation
     int32_t* d_table = dalloc<int32_t>(pages);
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -351,9 +351,9 @@ int main() {
         ids[i] = positions[rng() % n_fill];
     }
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -362,9 +362,9 @@ int main() {
 
     int32_t hstep[k::kStepCount] = {0, 0, 0, max_ids};
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
diff --git a/sycl/src/kernels/ple_parity.cpp b/sycl/src/kernels/ple_parity.cpp
index 66997602c0c..76f3e111706 100644
--- a/sycl/src/kernels/ple_parity.cpp
+++ b/sycl/src/kernels/ple_parity.cpp
@@ -209,9 +209,9 @@ int history_advance_regression() {
     float* history = history_storage + guard;
     float* norm = norm_storage + guard;
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -764,54 +764,54 @@ int main(int argc, char** argv) {
                             hcd * 4, dpct::get_in_order_queue())),
        "cr");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nk, cap.w_nk.data(), hcd * 4).wait()),
        "cnk");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nq, cap.w_nq.data(), hcd * 4).wait()),
        "cnq");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR(
            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(d_nc, cap.w_nc.data(), hcd * 4).wait()),
        "cnc");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_kc, key_codes.data(), key_codes.size()).wait()),
        "ckc");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
            d_vb, value_bf16.data(), value_bf16.size() * 2).wait()),
        "cvb");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -831,9 +831,9 @@ int main(int argc, char** argv) {
                             key_scales.size() * 4, dpct::get_in_order_queue())),
        "ks");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
-    in the original code the source host memory is pageable memory. If the
-    memory is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -1203,10 +1203,10 @@ int main(int argc, char** argv) {
             std::vector<float> projected(hcd), normalized(hcd), actual_key(hcd), actual_result(hcd), replay(hcd);
             for (int p = 0; p < std::min(cap.nt, 2); ++p) {
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
                        d_emb, cap.emb.data() + (size_t)p * nd, nd * 4).wait()),
diff --git a/sycl/src/kernels/q5_projection_parity.cpp b/sycl/src/kernels/q5_projection_parity.cpp
new file mode 100644
index 00000000000..a89dde24020
--- /dev/null
+++ b/sycl/src/kernels/q5_projection_parity.cpp
@@ -0,0 +1,86 @@
+// Q5_1 shared-expert projection: Strata CUDA dequantization vs ggml.
+#define NOMINMAX
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/dequant_bf16.hpp"
+#include "ggml.h"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdint>
+#include <cstring>
+#include <vector>
+
+int main(int argc, char **argv) try {
+    if (argc != 2) {
+        std::fprintf(stderr, "usage: q5_projection_parity <shard1.gguf>\n");
+        return 2;
+    }
+    strata::GgufFile gguf(argv[1]);
+    const auto* t = gguf.find("blk.0.ffn_down_shexp.weight");
+    if (!t || t->type != 7 || t->shape.size() != 2) {
+        std::fprintf(stderr, "expected blk.0.ffn_down_shexp.weight Q5_1\n");
+        return 2;
+    }
+    const int64_t cols = (int64_t) t->shape[0], rows = std::min<int64_t>(4, (int64_t) t->shape[1]);
+    const size_t weight_bytes = (size_t) rows * (size_t) (cols / 32) * 24;
+    const size_t elements = (size_t) rows * (size_t) cols;
+    const uint8_t* source = gguf.tensor_data(*t);
+    void *dweight = nullptr, *dfloat = nullptr, *dbf16 = nullptr;
+    if (DPCT_CHECK_ERROR(dweight = (void *)sycl::malloc_device(
+                             weight_bytes, dpct::get_in_order_queue())) != 0 ||
+        DPCT_CHECK_ERROR(
+            dfloat = (void *)sycl::malloc_device(
+                elements * sizeof(float), dpct::get_in_order_queue())) != 0 ||
+        DPCT_CHECK_ERROR(dbf16 = (void *)sycl::malloc_device(
+                             elements * sizeof(uint16_t),
+                             dpct::get_in_order_queue())) != 0) {
+        std::fprintf(stderr, "CUDA allocation failed\n");
+        return 1;
+    }
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
+    the original code the source host memory is pageable memory. If the memory
+    is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dweight, source, weight_bytes).wait();
+    strata::kernels::dequant_f32(7, dweight, 0, rows, cols, (float*) dfloat, nullptr);
+    strata::kernels::dequant_bf16(7, dweight, 0, rows, cols, (uint16_t*) dbf16, nullptr);
+    std::vector<float> got(elements), ref(elements);
+    std::vector<uint16_t> got_bf16(elements);
+    (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
+        .memcpy(got.data(), dfloat, elements * sizeof(float))
+        .wait();
+    (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
+        .memcpy(got_bf16.data(), dbf16, elements * sizeof(uint16_t))
+        .wait();
+    sycl::free(dweight, dpct::get_in_order_queue());
+        sycl::free(dfloat, dpct::get_in_order_queue());
+        sycl::free(dbf16, dpct::get_in_order_queue());
+    const auto* traits = ggml_get_type_traits(GGML_TYPE_Q5_1);
+    for (int64_t r = 0; r < rows; ++r)
+        traits->to_float(source + (size_t) r * (size_t) (cols / 32) * 24,
+                         ref.data() + (size_t) r * (size_t) cols, cols);
+    double max_abs = 0;
+    size_t bf16_bad = 0;
+    for (size_t i = 0; i < elements; ++i) {
+        max_abs = std::max(max_abs, (double) std::fabs(got[i] - ref[i]));
+        uint32_t bits;
+        std::memcpy(&bits, &ref[i], sizeof(bits));
+        const uint16_t expected = (uint16_t) ((bits + 0x7fffu + ((bits >> 16) & 1u)) >> 16);
+        if (got_bf16[i] != expected) ++bf16_bad;
+    }
+    const bool ok = max_abs <= 1e-6 && bf16_bad == 0;
+    std::printf("Q5_1 projection: %zu elements, max_abs %.3e, bf16 differences %zu %s\n",
+                elements, max_abs, bf16_bad, ok ? "PASS" : "FAIL");
+    return ok ? 0 : 1;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index f358a4b7ca3..ba4a9964053 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -7,6 +7,7 @@
 //   1. against FP64, the new kernel's error is no larger than a small multiple of the old kernel's (both FP32 math);
 //   2. the new and old outputs agree to a relative 1e-4 of the output scale;
 // then times both over a prompt chunk (the old one in batches of 32, as prefill.cpp calls it).
+// HIP builds (S6): the same checks for the RDNA4 matrix-core kernel (STRATA_HIP_WMMA), skipped (77) off gfx12.
 // Usage: qsa_prompt_attn_parity [context=32768] [queries=2048] [reps=5]
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
@@ -19,6 +20,7 @@
 #include <cmath>
 #include <cstdio>
 #include <cstdlib>
+#include <cstring>
 #include <random>
 #include <vector>
 
@@ -250,12 +252,32 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
 }  // namespace
 
 int main(int argc, char** argv) {
+    setenv("STRATA_PROMPT_ATTN_XMX", "1", 0);   // SYCL port: the batched kernel under test is the XMX one (opt-in in the engine)
+#if defined(__HIP_PLATFORM_AMD__)
+    // S6: on AMD the kernel under test is the RDNA4 matrix-core one (opt-in in the engine); other cards skip
+    {
+        int dev = 0;
+        hipDeviceProp_t prop{};
+        if (hipGetDevice(&dev) != hipSuccess || hipGetDeviceProperties(&prop, dev) != hipSuccess) return 2;
+        if (std::strncmp(prop.gcnArchName, "gfx12", 5) != 0) {
+            std::printf("SKIP: %s is not gfx12 (the matrix-core prompt attention is RDNA4 only)\n", prop.gcnArchName);
+            return 77;
+        }
+#if defined(_WIN32)
+        _putenv_s("STRATA_HIP_WMMA", "1");
+#else
+        setenv("STRATA_HIP_WMMA", "1", 1);
+#endif
+    }
+#endif
     const int64_t ctx = argc > 1 ? std::atoll(argv[1]) : 32768;
     const int64_t nq = argc > 2 ? std::atoll(argv[2]) : 2048;
     const int reps = argc > 3 ? std::atoi(argv[3]) : 5;
     int fails = 0;
     fails += run(1, ctx, nq, reps);
-    fails += run(0, ctx, nq, reps);
+#if !defined(__HIP_PLATFORM_AMD__)
+    fails += run(0, ctx, nq, reps);   // FP16 KV: the RDNA4 kernel takes int8 KV only
+#endif
     fails += run(1, 1500, std::min<int64_t>(nq, 1500), reps);   // short context: the selection is every cell
     fails += run(1, 2100, std::min<int64_t>(nq, 256), reps);    // the identity-to-sparse edge
     std::printf("FAILURES: %d\n", fails);
diff --git a/sycl/src/kernels/qsa_select_bench.cpp b/sycl/src/kernels/qsa_select_bench.cpp
index 533237f9475..d911aee33b8 100644
--- a/sycl/src/kernels/qsa_select_bench.cpp
+++ b/sycl/src/kernels/qsa_select_bench.cpp
@@ -1,7 +1,9 @@
 // src/kernels/qsa_select_bench.cpp - the prompt path's QSA selection (qsa_select.hpp) timed per stage, block scores
 // (the warp kernel and the tensor-core one) and top-k, for a batch of consecutive queries at a given context, and
 // the two scorers compared: score difference and how many selections differ (GPU, synthetic, no model).
-// Usage: qsa_select_bench [context=131072] [queries=256] [reps=10]
+// Usage: qsa_select_bench [context=131072] [queries=256] [reps=10] [capacity_cells]
+// capacity_cells (the engine's --max-context): the score buffers and the top-k dispatch follow the CAPACITY
+// (max_blocks = capacity / 4 + 2), the work follows the context. Default: capacity = context (max_blocks = ctx / 4 + 1).
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
@@ -49,7 +51,8 @@ int main(int argc, char** argv) {
     const int64_t nq = argc > 2 ? std::atoll(argv[2]) : 256;
     const int reps = argc > 3 ? std::atoi(argv[3]) : 10;
     const k::QsaShapes s = k::qsa_real_shapes();
-    const int64_t max_blocks = ctx / 4 + 1, cap = k::qsa_selection_width(k::kTopkMaxCells, s);
+    const int64_t capacity = argc > 4 ? std::atoll(argv[4]) : 0;
+    const int64_t max_blocks = capacity > 0 ? capacity / 4 + 2 : ctx / 4 + 1, cap = k::qsa_selection_width(k::kTopkMaxCells, s);
     std::mt19937 rng(7);
     std::normal_distribution<float> nd(0.f, 1.f);
     // keys with a shared direction plus noise, so the scores have a spread like a real indexer's
@@ -95,6 +98,8 @@ int main(int argc, char** argv) {
        "malloc");
     const int64_t active = steps[(size_t) ((nq - 1) * k::kStepCount + k::kStepNBid)] + 1;
     auto run_old = [&] { k::qsa_block_scores(d_pooled, d_dead, d_q, d_steps, nq, max_blocks, s, sc_old, nullptr, active); };
+    // a device without the tensor-core scorer (HIP other than gfx12): time the warp scorer and the top-k only
+    const bool have_tc = k::qsa_block_scores_tc(d_pooled, d_dead, d_q, d_steps, 1, max_blocks, s, sc_new, nullptr, active);
     auto run_new = [&] {
         if (!k::qsa_block_scores_tc(d_pooled, d_dead, d_q, d_steps, nq, max_blocks, s, sc_new, nullptr, active)) {
             std::fprintf(stderr, "tc scorer refused\n");
@@ -102,15 +107,18 @@ int main(int argc, char** argv) {
         }
     };
     run_old();
-    run_new();
+    if (have_tc) run_new();
+    else ck(DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
+                sc_new, sc_old, (size_t)(nq * max_blocks) * 4).wait()),
+            "copy");
     k::qsa_block_topk_ref(sc_old, d_steps, nq, max_blocks, cap, s, ids_old, nullptr);
-    k::qsa_block_topk(sc_new, d_steps, nq, max_blocks, cap, s, ids_new, nullptr);
+    k::qsa_block_topk(sc_new, d_steps, nq, max_blocks, cap, s, ids_new, nullptr, active);
     int32_t* ids_reg = nullptr;   // the register top-k on the OLD scores: must equal the reference exactly
     ck(DPCT_CHECK_ERROR(
            ids_reg = (int32_t *)sycl::malloc_device(
                (size_t)(nq * cap) * 4, dpct::get_in_order_queue())),
        "malloc");
-    k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr);
+    k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr, active);
     ck(DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()),
        "warm");
     // compare
@@ -161,6 +169,32 @@ int main(int argc, char** argv) {
         cells_diff += (int64_t) d.size() / 2;
         cells_all += w;
     }
+    // accuracy against an FP64 host reference on a sample (blocks below n_bid; the tail block is the warp kernel's own
+    // arithmetic in both scorers). Gate, as the prompt-attention harness's: the scorer under test is no worse than 4x
+    // the warp kernel's error, floored at 1e-6 of the score scale.
+    double err_old = 0, err_new = 0, scale = 0;
+    {
+        std::mt19937 srng(11);
+        const int64_t nqs = std::min<int64_t>(nq, 32);
+        for (int64_t qs = 0; qs < nqs; ++qs) {
+            const int64_t i = qs * nq / nqs;
+            const int64_t nbid = steps[(size_t) (i * k::kStepCount + k::kStepNBid)];
+            if (nbid <= 0) continue;
+            for (int sidx = 0; sidx < 1024; ++sidx) {
+                const int64_t j = sidx < 64 ? std::min<int64_t>(nbid - 1, sidx) : (int64_t) (srng() % (uint64_t) nbid);
+                double ref = 0;
+                for (int h = 0; h < 4; ++h) {
+                    double d = 0;
+                    for (int c = 0; c < 128; ++c) d += (double) q[(size_t) (i * 512 + h * 128 + c)] * (double) pooled[(size_t) (j * 128 + c)];
+                    ref += d > 0 ? d : 0;
+                }
+                scale = std::max(scale, std::fabs(ref));
+                err_old = std::max(err_old, std::fabs(ref - (double) a[(size_t) (i * max_blocks + j)]));
+                err_new = std::max(err_new, std::fabs(ref - (double) b[(size_t) (i * max_blocks + j)]));
+            }
+        }
+    }
+    const bool acc_ok = !have_tc || err_new <= std::max(4.0 * err_old, 1e-6 * scale);
     // time
     dpct::event_ptr e0, e1;
     e0 = new sycl::event(); e1 = new sycl::event();
@@ -184,14 +218,17 @@ int main(int argc, char** argv) {
       std::exit(1);
     }
     };
-    const float t_old = timed(run_old), t_new = timed(run_new);
+    const float t_old = timed(run_old), t_new = have_tc ? timed(run_new) : t_old;
     const float t_tk = timed([&] { k::qsa_block_topk_ref(sc_old, d_steps, nq, max_blocks, cap, s, ids_old, nullptr); });
-    const float t_tk2 = timed([&] { k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr); });
+    const float t_tk2 = timed([&] { k::qsa_block_topk(sc_old, d_steps, nq, max_blocks, cap, s, ids_reg, nullptr, active); });
     std::printf("top-k %.3f -> %.3f ms (%.1fx), register top-k identical to the reference %lld/%lld\n", t_tk, t_tk2,
                 t_tk / t_tk2, (long long) reg_same, (long long) nq);
+    std::printf("%s accuracy vs FP64 (score scale %.3g): warp kernel max err %.3g, tensor-core max err %.3g (%.2g of scale)\n",
+                !have_tc ? "SKIP" : acc_ok ? "PASS" : "FAIL", scale, err_old, err_new, scale > 0 ? err_new / scale : 0.0);
+    if (!have_tc) std::printf("tensor-core scorer not available on this device: warp scorer %.3f ms, top-k %.3f ms (%.0f%% of the two)\n", t_old, t_tk2, 100.0 * t_tk2 / (t_old + t_tk2));
     std::printf("ctx %lld, %lld queries x %lld blocks: scores %.3f -> %.3f ms (%.1fx), top-k %.3f ms; score rel diff "
                 "mean %.2g max %.2g; selections identical %lld/%lld, cells differing %.4f%%\n", (long long) ctx,
                 (long long) nq, (long long) active, t_old, t_new, t_old / t_new, t_tk, sum_rel / std::max(1.0, n_rel),
                 max_rel, (long long) same_sel, (long long) nq, cells_all ? 100.0 * (double) cells_diff / (double) cells_all : 0.0);
-    return 0;
+    return acc_ok && reg_same == nq ? 0 : 1;
 }
diff --git a/sycl/src/kernels/router_top10_parity.cpp b/sycl/src/kernels/router_top10_parity.cpp
index d30a4770087..ae920a04fa3 100644
--- a/sycl/src/kernels/router_top10_parity.cpp
+++ b/sycl/src/kernels/router_top10_parity.cpp
@@ -79,9 +79,9 @@ int run_case(const char* name, const std::vector<float>& logits, int n_tokens, i
                                h_w.size(), dpct::get_in_order_queue())),
           "malloc w");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
diff --git a/sycl/src/kernels/s2_gemv_q8_parity.cpp b/sycl/src/kernels/s2_gemv_q8_parity.cpp
index 3a578322bfd..25d169aaa26 100644
--- a/sycl/src/kernels/s2_gemv_q8_parity.cpp
+++ b/sycl/src/kernels/s2_gemv_q8_parity.cpp
@@ -74,27 +74,27 @@ int main(int argc, char** argv) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "m y2");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(float)).wait()),
           "c x");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "c codes");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -198,9 +198,9 @@ int main(int argc, char** argv) {
                                hx.size(), dpct::get_in_order_queue())),
           "m hx");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
diff --git a/sycl/src/kernels/s_gemv_parity.cpp b/sycl/src/kernels/s_gemv_parity.cpp
index f2ba1f18c58..5017cfb7215 100644
--- a/sycl/src/kernels/s_gemv_parity.cpp
+++ b/sycl/src/kernels/s_gemv_parity.cpp
@@ -247,36 +247,36 @@ void test_q4k(long long n_in, long long n_out, double tol, int* total_bad) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "cudaMalloc y");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "copy x");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "copy codes");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_scales, scales.data(), scales.size() * sizeof(float)).wait()),
           "copy scales");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
@@ -367,27 +367,27 @@ void bench_s2_gemv(long long n_in, long long n_out, int iters, int* split_bad) {
                                (size_t)n_out, dpct::get_in_order_queue())),
           "bench y");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_x, x.data(), x.size() * sizeof(uint16_t)).wait()),
           "bench copy x");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
               d_codes, codes.data(), codes.size()).wait()),
           "bench copy codes");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
diff --git a/sycl/src/kernels/sampler_parity.cpp b/sycl/src/kernels/sampler_parity.cpp
index 4117ed8d800..7938ed9bb04 100644
--- a/sycl/src/kernels/sampler_parity.cpp
+++ b/sycl/src/kernels/sampler_parity.cpp
@@ -109,9 +109,9 @@ int run(const char* name, const std::vector<float>& logits, int n_tokens, const
                                (size_t)n_tokens, dpct::get_in_order_queue())),
           "malloc out");
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     check(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
diff --git a/sycl/src/ngram/ple_reader.cpp b/sycl/src/ngram/ple_reader.cpp
index 19e017b4d5c..4a9df10e619 100644
--- a/sycl/src/ngram/ple_reader.cpp
+++ b/sycl/src/ngram/ple_reader.cpp
@@ -5,6 +5,7 @@
 #include "strata/ngram/ple_reader.hpp"
 
 #include <algorithm>
+#include <chrono>
 #include <condition_variable>
 #include <cstring>
 #include <deque>
@@ -36,15 +37,17 @@ constexpr uint32_t EMPTY = 0xFFFFFFFFu;
 /// Set-associative row cache: 8 ways per set, round-robin replacement inside a set. Bounded by construction.
 struct RowCache {
     uint64_t sets = 0;
+    uint32_t rb = ROW_BYTES;        // bytes per row
     std::vector<uint32_t> keys;     // sets * WAYS
-    std::vector<uint8_t> data;      // sets * WAYS * ROW_BYTES
+    std::vector<uint8_t> data;      // sets * WAYS * rb
     std::vector<uint8_t> next;      // per-set replacement pointer
     uint64_t used = 0;
 
-    void init(uint64_t rows) {
+    void init(uint64_t rows, uint32_t row_bytes = ROW_BYTES) {
         sets = rows / WAYS;
+        rb = row_bytes;
         keys.assign(sets * WAYS, EMPTY);
-        data.assign(sets * WAYS * ROW_BYTES, 0);
+        data.assign(sets * WAYS * rb, 0);
         next.assign(sets, 0);
         used = 0;
     }
@@ -56,7 +59,7 @@ struct RowCache {
         if (sets == 0) return nullptr;
         const uint64_t s = mix(row) % sets;
         for (uint32_t w = 0; w < WAYS; ++w)
-            if (keys[s * WAYS + w] == row) return &data[(s * WAYS + w) * ROW_BYTES];
+            if (keys[s * WAYS + w] == row) return &data[(s * WAYS + w) * rb];
         return nullptr;
     }
     void insert(uint32_t row, const uint8_t* bytes) {
@@ -66,7 +69,7 @@ struct RowCache {
         next[s] = (uint8_t) ((w + 1) % WAYS);
         if (keys[s * WAYS + w] == EMPTY) ++used;
         keys[s * WAYS + w] = row;
-        std::memcpy(&data[(s * WAYS + w) * ROW_BYTES], bytes, ROW_BYTES);
+        std::memcpy(&data[(s * WAYS + w) * rb], bytes, rb);
     }
 };
 
@@ -82,6 +85,7 @@ struct Job {
     uint32_t ticket = 0;
     std::vector<Use> uses;
     double issued_us = 0;
+    bool keepalive = false;// no rows and no ticket: it only keeps the SSD awake (`set_keepalive`)
 };
 
 struct TicketState {
@@ -104,6 +108,7 @@ struct PleReader::Impl {
     DirectFile file;
     uint64_t table_offset = 0;
     uint64_t n_rows = 0;
+    uint32_t row_bytes = ROW_BYTES;
     uint32_t max_inflight = 0;
     uint8_t* slab = nullptr;              // max_inflight slots of 2 pages
     std::vector<uint32_t> free_slots;
@@ -117,6 +122,12 @@ struct PleReader::Impl {
     size_t ring_pos = 0;
     double delay_us = 0;
     std::string error;
+    // the keep-alive (`set_keepalive`), steady-clock microseconds; `keep_us` 0 = off
+    double keep_us = 0;
+    double keep_window_us = 0;
+    double last_issue_us = 0;             // the last `issue`
+    double last_read_us = 0;              // the last read that went out, rows or keep-alive
+    uint64_t rng = 0x9E3779B97F4A7C15ull;
 
     bool threaded = false;
     bool stop = false;
@@ -154,7 +165,14 @@ struct PleReader::Impl {
                 auto tt = tickets.find(j.ticket);
                 if (tt != tickets.end() && tt->second.t_first == 0) tt->second.t_first = j.issued_us;
             }
-            if (!file.submit(j.offset, slot_buf(s), j.length, s, error)) {
+            std::string kerr;             // a keep-alive read that cannot go out must not fail the reader
+            if (!file.submit(j.offset, slot_buf(s), j.length, s, j.keepalive ? kerr : error)) {
+                if (j.keepalive) {                 // no more of them: the SSD may sleep as before
+                    keep_us = 0;
+                    j.keepalive = false;
+                    free_slots.push_back(s);
+                    continue;
+                }
                 j.uses.clear();
                 auto it = tickets.find(j.ticket);
                 if (it != tickets.end() && it->second.pending > 0) --it->second.pending;
@@ -162,12 +180,35 @@ struct PleReader::Impl {
                 cancel_queued();
                 return false;
             }
-            stats.submit_us += now_us() - j.issued_us;
-            ++stats.reads;
+            last_read_us = j.issued_us;
+            if (!j.keepalive) {                    // a keep-alive read counts when it completes (`finish`)
+                stats.submit_us += now_us() - j.issued_us;
+                ++stats.reads;
+            }
         }
         return true;
     }
 
+    /// When the next keep-alive read is due, or < 0 when none is: it is off, the reader failed, or no rows
+    /// were asked for within the window (then the SSD may sleep; the next `issue` re-arms it).
+    double keepalive_due(double now) const {
+        if (keep_us <= 0 || !error.empty() || last_issue_us <= 0 || now - last_issue_us > keep_window_us) return -1;
+        return last_read_us + keep_us;
+    }
+
+    /// One page of the table, a different one each time, so the SSD really reads (not its controller's buffer).
+    void queue_keepalive() {
+        rng ^= rng << 13;
+        rng ^= rng >> 7;
+        rng ^= rng << 17;
+        const uint64_t first = table_offset / PAGE, end = (table_offset + n_rows * (uint64_t) row_bytes) / PAGE;
+        Job j;
+        j.offset = (first + (end > first ? rng % (end - first) : 0)) * PAGE;
+        j.length = PAGE;
+        j.keepalive = true;
+        queue.push_back(std::move(j));
+    }
+
     bool finish(const Completion& c) {
         const uint32_t s = (uint32_t) c.tag;
         if (s >= inflight.size()) {
@@ -176,6 +217,17 @@ struct PleReader::Impl {
             return false;
         }
         Job& j = inflight[s];
+        if (j.keepalive) {                         // no rows: it counts once it is done, with how long it took;
+            if (c.ok) {                            // a failed one turns the keep-alive off, not the reader
+                ++stats.keepalive_reads;
+                stats.keepalive_us_max = std::max(stats.keepalive_us_max, now_us() - j.issued_us);
+            } else {
+                keep_us = 0;
+            }
+            j.keepalive = false;
+            free_slots.push_back(s);
+            return error.empty() ? pump() : true;
+        }
         if (!c.ok) {
             error = "PleReader: a table read failed";
             cancel_queued();
@@ -189,7 +241,7 @@ struct PleReader::Impl {
         stats.bytes += c.bytes;
         const uint8_t* buf = slot_buf(s);
         for (const Use& u : j.uses) {
-            if (u.in_page + ROW_BYTES > c.bytes) {
+            if (u.in_page + row_bytes > c.bytes) {
                 error = "PleReader: short read inside the table";
                 cancel_queued();
                 j.uses.clear();
@@ -200,7 +252,7 @@ struct PleReader::Impl {
             }
         }
         for (const Use& u : j.uses) {
-            std::memcpy(u.dst, buf + u.in_page, ROW_BYTES);
+            std::memcpy(u.dst, buf + u.in_page, row_bytes);
             cache.insert(u.row, buf + u.in_page);
         }
         auto it = tickets.find(j.ticket);
@@ -260,7 +312,14 @@ struct PleReader::Impl {
     void worker_loop() {
         std::unique_lock<std::mutex> lk(mu);
         for (;;) {
-            cv_work.wait(lk, [&] { return stop || !queue.empty() || busy(); });
+            // Idle: wait for work. While rows are being asked for, the wait ends in time for a keep-alive read.
+            while (!(stop || !queue.empty() || busy())) {
+                const double now = now_us();
+                const double due = keepalive_due(now);
+                if (due < 0) cv_work.wait(lk);
+                else if (now >= due) queue_keepalive();
+                else cv_work.wait_for(lk, std::chrono::microseconds(std::max<int64_t>(1000, (int64_t) (due - now))));
+            }
             if (stop && !busy()) break;
             if (error.empty() && !pump() && error.empty()) error = "PleReader: submit failed";
             if (!delayed.empty() && !release_delayed() && error.empty()) error = "PleReader: read failed";
@@ -288,11 +347,13 @@ PleReader::~PleReader() {
 }
 
 bool PleReader::open(const std::string& path, uint64_t table_offset, uint64_t n_rows, uint32_t max_inflight,
-                     uint64_t cache_rows, std::string& err, bool io_thread) {
+                     uint64_t cache_rows, std::string& err, bool io_thread, uint32_t row_bytes) {
     close();
     if (max_inflight == 0 || max_inflight > 1024) { err = "PleReader: max_inflight must be 1..1024"; return false; }
+    if (row_bytes == 0 || row_bytes > PAGE) { err = "PleReader: row_bytes must be 1..4096"; return false; }
     if (!impl_->file.open(path, err)) return false;
-    if (table_offset + n_rows * (uint64_t) ROW_BYTES > impl_->file.size()) {
+    impl_->row_bytes = row_bytes;
+    if (table_offset + n_rows * (uint64_t) row_bytes > impl_->file.size()) {
         err = "PleReader: the table extends past the end of " + path;
         close();
         return false;
@@ -305,8 +366,12 @@ bool PleReader::open(const std::string& path, uint64_t table_offset, uint64_t n_
     impl_->inflight.assign(max_inflight, Job{});
     impl_->free_slots.clear();
     for (uint32_t s = max_inflight; s-- > 0;) impl_->free_slots.push_back(s);
-    impl_->cache.init(cache_rows);
+    impl_->cache.init(cache_rows, row_bytes);
     impl_->error.clear();
+    impl_->keep_us = 0;
+    impl_->last_issue_us = impl_->last_read_us = 0;
+    impl_->rng = 0x9E3779B97F4A7C15ull ^ (uint64_t) now_us();
+    if (impl_->rng == 0) impl_->rng = 1;
     reset_stats();
     impl_->stop = false;
     impl_->threaded = io_thread;
@@ -360,9 +425,12 @@ void PleReader::close() {
     m.cache.init(0);
     m.threaded = false;
     m.stop = false;
+    m.keep_us = 0;
+    m.last_issue_us = m.last_read_us = 0;
 }
 
 bool PleReader::is_open() const { return impl_->file.is_open(); }
+uint32_t PleReader::row_bytes() const { return impl_->row_bytes; }
 
 PleReader::Ticket PleReader::issue(const uint32_t* rows, size_t n, uint8_t* out_raw) {
     Impl& m = *impl_;
@@ -370,24 +438,28 @@ PleReader::Ticket PleReader::issue(const uint32_t* rows, size_t n, uint8_t* out_
     if (m.threaded) lk.lock();
     const uint32_t id = m.next_ticket++;
     if (m.next_ticket == 0) m.next_ticket = 1;
+    const double now = now_us();
+    const bool rearm = m.keep_us > 0 && (m.last_issue_us <= 0 || now - m.last_issue_us > m.keep_window_us);
+    m.last_issue_us = now;
     TicketState& ts = m.tickets[id];
     std::unordered_map<uint64_t, size_t> by_page;     // aligned offset -> index in `jobs`
     std::vector<Job> jobs;
     for (size_t i = 0; i < n; ++i) {
-        uint8_t* dst = out_raw + i * ROW_BYTES;
+        const uint32_t rb = m.row_bytes;
+        uint8_t* dst = out_raw + i * rb;
         ++m.stats.requests;
         if (rows[i] >= m.n_rows) {
-            std::memset(dst, 0, ROW_BYTES);
+            std::memset(dst, 0, rb);
             continue;
         }
         if (const uint8_t* hit = m.cache.find(rows[i])) {
-            std::memcpy(dst, hit, ROW_BYTES);
+            std::memcpy(dst, hit, rb);
             ++m.stats.cache_hits;
             continue;
         }
-        const uint64_t at = m.table_offset + (uint64_t) rows[i] * ROW_BYTES;
+        const uint64_t at = m.table_offset + (uint64_t) rows[i] * rb;
         const uint64_t first = at / PAGE * PAGE;
-        const uint32_t length = (uint32_t) ((at + ROW_BYTES - 1) / PAGE * PAGE - first + PAGE);
+        const uint32_t length = (uint32_t) ((at + rb - 1) / PAGE * PAGE - first + PAGE);
         auto f = by_page.find(first);
         if (f != by_page.end()) {
             Job& j = jobs[f->second];
@@ -416,6 +488,8 @@ PleReader::Ticket PleReader::issue(const uint32_t* rows, size_t n, uint8_t* out_
         if (has_jobs) {
             m.cv_work.notify_one();
             m.file.wake();                         // in case the worker is blocked in the port
+        } else if (rearm) {
+            m.cv_work.notify_one();                // the keep-alive had lapsed: start it again
         }
     } else if (!m.pump() && m.error.empty()) {
         m.error = "PleReader: submit failed";
@@ -462,14 +536,33 @@ bool PleReader::collect(Ticket t, std::string& err) {
     return true;
 }
 
+void PleReader::set_keepalive(double period_ms, double window_s) {
+    Impl& m = *impl_;
+    {
+        std::lock_guard<std::mutex> lk(m.mu);
+        m.keep_us = m.threaded && period_ms > 0 ? period_ms * 1000.0 : 0.0;
+        m.keep_window_us = window_s > 0 ? window_s * 1e6 : 0.0;
+    }
+    m.cv_work.notify_all();
+}
+
 void PleReader::set_injected_delay_us(double delay_us) {
     std::lock_guard<std::mutex> lk(impl_->mu);
     impl_->delay_us = delay_us < 0 ? 0 : delay_us;
 }
 const ReaderStats& PleReader::stats() const { return impl_->stats; }
+ReaderStats PleReader::snapshot() const {
+    Impl& m = *impl_;
+    std::unique_lock<std::mutex> lk(m.mu, std::defer_lock);
+    if (m.threaded) lk.lock();
+    return m.stats;
+}
 void PleReader::reset_stats() {
-    impl_->stats = ReaderStats{};
-    impl_->ring_pos = 0;
+    Impl& m = *impl_;
+    std::unique_lock<std::mutex> lk(m.mu, std::defer_lock);
+    if (m.threaded) lk.lock();                     // the worker may be counting a keep-alive read
+    m.stats = ReaderStats{};
+    m.ring_pos = 0;
 }
 uint64_t PleReader::cache_capacity() const { return impl_->cache.sets * WAYS; }
 uint64_t PleReader::cache_size() const { return impl_->cache.used; }
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index 88adbd50d99..29e30e35aa2 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -49,6 +49,11 @@ __dpct_inline__ uint16_t bf(float f) {
     u += 0x7fffu + ((u >> 16) & 1u);
     return (uint16_t) (u >> 16);
 }
+// The BF16 GEMMs' second operand (STRATA_PREFILL_BF16X2): what the BF16 image `hi` left out of f, itself in BF16.
+// W.hi + W.lo carries ~16 mantissa bits of the activation - the decode path's FP32 x to within ~1e-5.
+__dpct_inline__ uint16_t bf_lo(float f, uint16_t hi) {
+    return bf(f - sycl::bit_cast<float>((uint32_t)hi << 16));
+}
 __dpct_inline__ float sigm(float x) {
     return 1.0f / (1.0f + sycl::native::exp(-x));
 }
@@ -57,6 +62,13 @@ __dpct_inline__ uint16_t hf(float f) {
                sycl::vec<float, 1>(f)
                    .convert<sycl::half, sycl::rounding_mode::rte>()[0]);
 }
+// A SwiGLU product for an FP16 GEMM: saturated, so a token with a massive activation cannot turn into inf and then
+// NaN in the down projection (decode's q8_1 has room to ~8e6; FP16 ends at 65504).  A NaN stays NaN (fminf/fmaxf
+// would make it -65504 and hide where it came from); finite values below 65504 round exactly as before.
+__dpct_inline__ uint16_t hf_sat(float f) {
+    return hf(sycl::isnan(f) ? f
+                             : sycl::fmin(sycl::fmax(f, -65504.0f), 65504.0f));
+}
 // block-wide sum for blockDim.x <= 1024, result broadcast
 inline float block_sum(float v, float *sh) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
@@ -108,7 +120,8 @@ unsigned blocks_for(int64_t n, int t = 256) { return (unsigned) ((n + t - 1) / t
 __dpct_inline__ void gr_norm_kernel(const float *__restrict__ R,
                                     const float *__restrict__ w, float eps,
                                     float *__restrict__ xn,
-                                    uint16_t *__restrict__ xn16) {
+                                    uint16_t *__restrict__ xn16,
+                                    uint16_t *__restrict__ xn16_lo) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
 auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     sycl::ext::oneapi::this_work_item::get_work_group<3>());
@@ -124,7 +137,9 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
          d += item_ct1.get_local_range(2)) {
         const float v = r[d] * rs * w[c * N + d];
         xn[row * N + d] = v;
-        xn16[row * N + d] = bf(v);
+        const uint16_t h = bf(v);
+        xn16[row * N + d] = h;
+        if (xn16_lo) xn16_lo[row * N + d] = bf_lo(v, h);
     }
 }
 // F-1: the row scale only (and the BF16 image); gr_mix_r_kernel recomputes r * rs * w itself, in the same order,
@@ -132,7 +147,8 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
 __dpct_inline__ void gr_norm_rs_kernel(const float *__restrict__ R,
                                        const float *__restrict__ w, float eps,
                                        float *__restrict__ rs_out,
-                                       uint16_t *__restrict__ xn16) {
+                                       uint16_t *__restrict__ xn16,
+                                       uint16_t *__restrict__ xn16_lo) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
 auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     sycl::ext::oneapi::this_work_item::get_work_group<3>());
@@ -145,16 +161,20 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
          d += item_ct1.get_local_range(2)) ss += r[d] * r[d];
     const float rs = sycl::rsqrt(block_sum(ss, sh) / (float)N + eps);
     if (item_ct1.get_local_id(2) == 0) rs_out[row] = rs;
-#pragma unroll
     for (int d = item_ct1.get_local_id(2); d < N;
-         d += item_ct1.get_local_range(2))
-        xn16[row * N + d] = bf(r[d] * rs * w[c * N + d]);
+         d += item_ct1.get_local_range(2)) {
+        const float v = r[d] * rs * w[c * N + d];
+        const uint16_t h = bf(v);
+        xn16[row * N + d] = h;
+        if (xn16_lo) xn16_lo[row * N + d] = bf_lo(v, h);
+    }
 }
 __dpct_inline__ void
 gr_mix_r_kernel(const float *__restrict__ R, const float *__restrict__ rs,
                 const float *__restrict__ w, const float *__restrict__ g,
                 float *__restrict__ mixed, uint16_t *__restrict__ mixed16,
-                int64_t T, uint16_t *__restrict__ mixed_h) {
+                int64_t T, uint16_t *__restrict__ mixed_h,
+                uint16_t *__restrict__ mixed16_lo) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t i =
         (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
@@ -170,17 +190,23 @@ gr_mix_r_kernel(const float *__restrict__ R, const float *__restrict__ rs,
     }
     s /= (float) HC;
     mixed[i] = s;
-    if (mixed16) mixed16[i] = bf(s);
+    if (mixed16) {
+        const uint16_t h = bf(s);
+        mixed16[i] = h;
+        if (mixed16_lo) mixed16_lo[i] = bf_lo(s, h);
+    }
     if (mixed_h) mixed_h[i] = hf(s);
 }
 // F-2: gr_write_kernel for one row (t, c), then gr_norm_rs_kernel's reduction over it with the next half's norm
 // weights - the same thread-to-element mapping (256 threads, stride 256) and block_sum, so rs and the BF16 image are
 // the same bits, and R is not read back
 constexpr int GRW_PER = (N + 255) / 256;
-__dpct_inline__ void gr_write_norm_rs_kernel(
-    float *__restrict__ R, const float *__restrict__ bo,
-    const float *__restrict__ inj, int64_t inj_ld, const float *__restrict__ w,
-    float eps, float *__restrict__ rs_out, uint16_t *__restrict__ xn16) {
+__dpct_inline__ void
+gr_write_norm_rs_kernel(float *__restrict__ R, const float *__restrict__ bo,
+                        const float *__restrict__ inj, int64_t inj_ld,
+                        const float *__restrict__ w, float eps,
+                        float *__restrict__ rs_out, uint16_t *__restrict__ xn16,
+                        uint16_t *__restrict__ xn16_lo) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
 auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     sycl::ext::oneapi::this_work_item::get_work_group<3>());
@@ -203,24 +229,33 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     if (item_ct1.get_local_id(2) == 0) rs_out[row] = rs;
     k = 0;
 #pragma unroll
-    for (int d = item_ct1.get_local_id(2); d < N; d += 256, ++k)
-        xn16[row * N + d] = bf(v[k] * rs * w[c * N + d]);
+    for (int d = item_ct1.get_local_id(2); d < N; d += 256, ++k) {
+        const float x = v[k] * rs * w[c * N + d];
+        const uint16_t h = bf(x);
+        xn16[row * N + d] = h;
+        if (xn16_lo) xn16_lo[row * N + d] = bf_lo(x, h);
+    }
 }
 __dpct_inline__ void gr_silu_kernel(const float *__restrict__ lo,
-                                    uint16_t *__restrict__ lo16, int64_t n) {
+                                    uint16_t *__restrict__ lo16,
+                                    uint16_t *__restrict__ lo16_lo, int64_t n) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t i =
         (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
         item_ct1.get_local_id(2);
     if (i >= n) return;
     const float x = lo[i] / (float) HC;
-    lo16[i] = bf(x / (1.0f + sycl::native::exp(-x)));
+    const float v = x / (1.0f + sycl::native::exp(-x));
+    const uint16_t h = bf(v);
+    lo16[i] = h;
+    if (lo16_lo) lo16_lo[i] = bf_lo(v, h);
 }
 __dpct_inline__ void gr_mix_kernel(const float *__restrict__ xn,
                                    const float *__restrict__ g,
                                    float *__restrict__ mixed,
                                    uint16_t *__restrict__ mixed16, int64_t T,
-                                   uint16_t *__restrict__ mixed_h) {
+                                   uint16_t *__restrict__ mixed_h,
+                                   uint16_t *__restrict__ mixed16_lo) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t i =
         (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
@@ -235,7 +270,11 @@ __dpct_inline__ void gr_mix_kernel(const float *__restrict__ xn,
     }
     s /= (float) HC;
     mixed[i] = s;
-    if (mixed16) mixed16[i] = bf(s);
+    if (mixed16) {
+        const uint16_t h = bf(s);
+        mixed16[i] = h;
+        if (mixed16_lo) mixed16_lo[i] = bf_lo(s, h);
+    }
     if (mixed_h) mixed_h[i] = hf(s);
 }
 __dpct_inline__ void gr_write_kernel(float *__restrict__ R,
@@ -870,7 +909,7 @@ __dpct_inline__ void swiglu_il_kernel(const float *__restrict__ gu,
     if (i >= n * 640) return;
     const int64_t r = i / 640, k = i % 640;
     const float g = gu[r * 1280 + 2 * k], u = gu[r * 1280 + 2 * k + 1];
-    h16[i] = hf(g / (1.0f + sycl::native::exp(-g)) * u);
+    h16[i] = hf_sat(g / (1.0f + sycl::native::exp(-g)) * u);
 }
 __dpct_inline__ void swiglu_pair_kernel(const float *__restrict__ g,
                                         const float *__restrict__ u,
@@ -881,7 +920,7 @@ __dpct_inline__ void swiglu_pair_kernel(const float *__restrict__ g,
         item_ct1.get_local_id(2);
     if (i >= n * 640) return;
     const float a = g[i];
-    h16[i] = hf(a / (1.0f + sycl::native::exp(-a)) * u[i]);
+    h16[i] = hf_sat(a / (1.0f + sycl::native::exp(-a)) * u[i]);
 }
 __dpct_inline__ void gather_rows16_kernel(const uint16_t *__restrict__ x,
                                           const int32_t *__restrict__ src,
@@ -940,23 +979,29 @@ auto &sh = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
     for (int64_t c = item_ct1.get_local_id(2); c < cols;
          c += item_ct1.get_local_range(2)) r[c] = s * r[c] * w[c];
 }
-__dpct_inline__ void rope_kernel(float *__restrict__ x, int64_t heads,
-                                 int64_t dim, int64_t ld, int64_t pos0,
-                                 float theta_scale, float freq_scale,
-                                 float corr_low, float corr_high,
-                                 float ext_factor, float mscale,
-                                 const int32_t *__restrict__ mtab) {
+// TAB (#280, STRATA_ROPE_TABLE=1): the angles from the session's float64 table.  The host launches <false> whenever
+// no table applies - the default - so the default kernel is 0.1.31's code exactly (the table read is not in it;
+// with it merely skipped at run time, the compiled default path changed its results).
+template <bool TAB>
+__dpct_inline__ void
+rope_kernel(float *__restrict__ x, int64_t heads, int64_t dim, int64_t ld,
+            int64_t pos0, float theta_scale, float freq_scale, float corr_low,
+            float corr_high, float ext_factor, float mscale,
+            const int32_t *__restrict__ mtab, strata::kernels::RopeTab rt) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
     const int64_t row = item_ct1.get_group(2); // t * heads + h
     const int pair = item_ct1.get_local_id(2); // 0..31
     const int64_t t = row / heads, h = row % heads;
     float* p = x + t * ld + h * dim;
-    const float theta_extrap =
-        (float)strata::kernels::mrope_pos(mtab, (int)(pos0 + t), pair) *
-        dpct::pow(theta_scale, (float)pair);
     float c, s;
-    strata::kernels::rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale,
-                                       pair, c, s);
+    if (!(TAB && strata::kernels::rope_tab_cs(rt, strata::kernels::mrope_pos(mtab, (int) (pos0 + t), pair), pair, c,
+                                              s))) {
+        const float theta_extrap =
+            (float)strata::kernels::mrope_pos(mtab, (int)(pos0 + t), pair) *
+            dpct::pow(theta_scale, (float)pair);
+        strata::kernels::rope_scaled_angle(theta_extrap, freq_scale, corr_low, corr_high, ext_factor, mscale,
+                                           pair, c, s);
+    }
     const float a = p[pair], b = p[pair + 32];
     p[pair] = a * c - b * s;
     p[pair + 32] = a * s + b * c;
@@ -1085,15 +1130,18 @@ __dpct_inline__ void round_f16_kernel(const float *__restrict__ x,
                    .convert<float, sycl::rounding_mode::automatic>()[0];
 }
 __dpct_inline__ void to_bf16_kernel(const float *__restrict__ x,
-                                    uint16_t *__restrict__ y, int64_t n) {
+                                    uint16_t *__restrict__ y,
+                                    uint16_t *__restrict__ ylo, int64_t n) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-#pragma unroll
     for (int64_t i =
              (int64_t)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
              item_ct1.get_local_id(2);
          i < n; i += (int64_t)item_ct1.get_group_range(2) *
-                     item_ct1.get_local_range(2))
-        y[i] = bf(x[i]);
+                     item_ct1.get_local_range(2)) {
+        const uint16_t h = bf(x[i]);
+        y[i] = h;
+        if (ylo) ylo[i] = bf_lo(x[i], h);
+    }
 }
 
 }  // namespace
@@ -1173,7 +1221,7 @@ void round_f16(const float* x, float* y, int64_t n, void* stream) {
     }
     check("round_f16");
 }
-void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream) {
+void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream, uint16_t* ylo) {
     if (n <= 0) return;
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
@@ -1188,13 +1236,14 @@ void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream) {
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) {
-                    to_bf16_kernel(x, y, n);
+                    to_bf16_kernel(x, y, ylo, n);
                 });
     }
     check("to_bf16");
 }
 
-void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t* xn16, int64_t T, void* stream) {
+void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t* xn16, int64_t T, void* stream,
+             uint16_t* xn16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1207,12 +1256,13 @@ void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        gr_norm_kernel(R, w_norm, eps, xn, xn16);
+                        gr_norm_kernel(R, w_norm, eps, xn, xn16, xn16_lo);
                     });
     }
     check("gr_norm");
 }
-void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint16_t* xn16, int64_t T, void* stream) {
+void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint16_t* xn16, int64_t T, void* stream,
+                uint16_t* xn16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1225,13 +1275,13 @@ void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint1
                 exp_props,
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
-                        gr_norm_rs_kernel(R, w_norm, eps, rs, xn16);
+                        gr_norm_rs_kernel(R, w_norm, eps, rs, xn16, xn16_lo);
                     });
     }
     check("gr_norm_rs");
 }
 void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float* gated, float* mixed, uint16_t* mixed16,
-              int64_t T, void* stream, uint16_t* mixed_h) {
+              int64_t T, void* stream, uint16_t* mixed_h, uint16_t* mixed16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1243,13 +1293,13 @@ void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float*
                                   sycl::range(1, 1, 256)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) {
                     gr_mix_r_kernel(R, rs, w_norm, gated, mixed, mixed16, T,
-                                    mixed_h);
+                                    mixed_h, mixed16_lo);
                 });
     }
     check("gr_mix_r");
 }
 void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_ld, const float* w_norm_next, float eps,
-                      float* rs, uint16_t* xn16, int64_t T, void* stream) {
+                      float* rs, uint16_t* xn16, int64_t T, void* stream, uint16_t* xn16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1264,33 +1314,33 @@ void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_l
                 [=](sycl::nd_item<3> item_ct1)
                     [[sycl::reqd_sub_group_size(32)]] {
                         gr_write_norm_rs_kernel(R, bo, inj, inj_ld, w_norm_next,
-                                                eps, rs, xn16);
+                                                eps, rs, xn16, xn16_lo);
                     });
     }
     check("gr_write_norm_rs");
 }
-void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream) {
+void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream, uint16_t* lo16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
         strata::q_of(stream)
             ->submit([&](sycl::handler &cgh) {
-                auto T_LR_ct2 = T * LR;
+                auto T_LR_ct3 = T * LR;
 
                 cgh.parallel_for<dpct_kernel_name<class gr_silu_kernel_f26d34>>(
                     sycl::nd_range<3>(sycl::range(1, 1, blocks_for(T * LR)) *
                                           sycl::range(1, 1, 256),
                                       sycl::range(1, 1, 256)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
-                        gr_silu_kernel(lo, lo16, T_LR_ct2);
+                        gr_silu_kernel(lo, lo16, lo16_lo, T_LR_ct3);
                     });
             });
     }
     check("gr_silu");
 }
 void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16, int64_t T, void* stream,
-            uint16_t* mixed_h) {
+            uint16_t* mixed_h, uint16_t* mixed16_lo) {
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1301,7 +1351,8 @@ void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16
                                       sycl::range(1, 1, 256),
                                   sycl::range(1, 1, 256)),
                 exp_props, [=](sycl::nd_item<3> item_ct1) {
-                    gr_mix_kernel(xn, gated, mixed, mixed16, T, mixed_h);
+                    gr_mix_kernel(xn, gated, mixed, mixed16, T, mixed_h,
+                                  mixed16_lo);
                 });
     }
     check("gr_mix");
@@ -1692,6 +1743,8 @@ void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t p
     }
     const float theta_scale = powf((float) scaling.freq_base, -2.0f / 64.0f);
     const strata::kernels::RopeKernelArgs k = scaling.kernel_args(64);   // none: the identity constants
+    const strata::kernels::RopeTab rt = strata::kernels::rope_table_for(scaling);
+    if (rt.cos != nullptr)
     {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
@@ -1701,15 +1754,37 @@ void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t p
                 auto strata_kernels_mrope_table_ct11 =
                     strata::kernels::mrope_table();
 
-                cgh.parallel_for<dpct_kernel_name<class rope_kernel_4d58b9>>(
+                cgh.parallel_for<dpct_kernel_name<class rope_kernel_4d58b9,
+                                                  dpct_kernel_scalar<true>>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * heads)) *
+                                          sycl::range(1, 1, 32),
+                                      sycl::range(1, 1, 32)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        rope_kernel<true>(x, heads, dim, ld, pos0, theta_scale,
+                                          k.freq_scale, k.corr_low, k.corr_high,
+                                          k.ext_factor, k.attn_factor,
+                                          strata_kernels_mrope_table_ct11, rt);
+                    });
+            });
+    } else {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto strata_kernels_mrope_table_ct11 =
+                    strata::kernels::mrope_table();
+
+                cgh.parallel_for<dpct_kernel_name<class rope_kernel_4d58b9,
+                                                  dpct_kernel_scalar<false>>>(
                     sycl::nd_range<3>(sycl::range(1, 1, (unsigned)(T * heads)) *
                                           sycl::range(1, 1, 32),
                                       sycl::range(1, 1, 32)),
                     exp_props, [=](sycl::nd_item<3> item_ct1) {
-                        rope_kernel(x, heads, dim, ld, pos0, theta_scale,
-                                    k.freq_scale, k.corr_low, k.corr_high,
-                                    k.ext_factor, k.attn_factor,
-                                    strata_kernels_mrope_table_ct11);
+                        rope_kernel<false>(
+                            x, heads, dim, ld, pos0, theta_scale, k.freq_scale,
+                            k.corr_low, k.corr_high, k.ext_factor,
+                            k.attn_factor, strata_kernels_mrope_table_ct11, rt);
                     });
             });
     }
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 6fa9ae0dbb2..53542f5784d 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -89,9 +89,19 @@ double g_pinned_share = 1.0;
 // 8192-token chunks: 96 slots 1153 tok/s, 384 1294 (the next layer's experts arrive during its attention half) -
 // and 96 when a large share goes through host copies (IQ3_S on 64 GB, a third unpinned: 96 slots 1216, 256 1070 -
 // the host copies are the limit and the bigger ring only takes cache slots).  STRATA_PREFILL_RING overrides.
+int g_ring_override = 0;   // #340: set by a layer split (Prefill::set_ring_override); 0 = the rule below
 inline int ring_slots(size_t T) {
     const char* v = std::getenv("STRATA_PREFILL_RING");
-    const int r = v ? std::atoi(v) : (g_pinned_share >= 0.9 ? 384 : 96);
+#if defined(STRATA_USE_HIP)
+    // S6: with the opt-in RDNA4 matrix-core attention (STRATA_HIP_WMMA=1) a 96-slot ring: measured with it, 9070 XT
+    // 4K prompts 718 -> 1,211 tok/s (16K 1,949 -> 2,032), R9700 4K 2,426 -> 2,483 (16K the same)
+    static const bool wmma = [] {
+        const char* e = std::getenv("STRATA_HIP_WMMA");
+        return e != nullptr && e[0] == '1';
+    }();
+    if (!v && g_ring_override <= 0 && wmma) return (int64_t) T >= stream_all_min() ? 96 : STAGE;
+#endif
+    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : (g_pinned_share >= 0.9 ? 384 : 96);
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
     // SYCL port: routed-only staging by default. The stream-all walk (every non-resident expert of every layer, copied
     // ahead across layers) hangs on the B70 in its first large chunk - the copy engine stops on a barrier (xe resets bcs
@@ -103,6 +113,20 @@ inline int ring_slots(size_t T) {
     return (int64_t) T >= stream_all_min() ? big : STAGE;
 }
 constexpr int DQ = 2;              // dequantized-expert ring (FP16 gate/up + down)
+// The BF16-weight projections (hyper-connection, SSM alpha/beta, indexer, router, shared gate, PLE key/value) take
+// BF16 activations here and FP32 ones in decode. STRATA_PREFILL_BF16X2=1 adds each activation's BF16 remainder as a
+// second GEMM (Y = W.hi + W.lo, ~16 mantissa bits): a router that picks its top 10 from the same x decode would.
+// 2 = all but the hyper-connection's; 1 = the hyper-connection's too (its activations are 10240 wide and its up
+// projection writes as much: slower); 0 (the default: opt-in, it changes the prompt path's numbers) = off.
+inline int bf16x2_mode() {
+    static const int v = [] {
+        const char* e = std::getenv("STRATA_PREFILL_BF16X2");
+        return e != nullptr ? std::atoi(e) : 0;
+    }();
+    return v;
+}
+inline bool bf16x2() { return bf16x2_mode() != 0; }
+inline bool bf16x2_hc() { return bf16x2_mode() == 1; }
 
 // F-1: STRATA_GR_UNFUSED=1 keeps the FP32 copy of the normalized rows (gr_norm + gr_mix), the A/B arm
 inline bool gr_unfused() {
@@ -322,6 +346,7 @@ struct Prefill::Impl {
     uint16_t *xn16 = nullptr, *lo16 = nullptr;
     float* mixed = nullptr;
     uint16_t *mixed_bf = nullptr, *mixed_h = nullptr;
+    uint16_t *xn16_lo = nullptr, *lo16_lo = nullptr, *mixed_bf_lo = nullptr;   // bf16x2(): the BF16 GEMMs' low parts
     float* bo = nullptr;
     // GDN
     float *qkv = nullptr, *z = nullptr, *ab = nullptr, *gate = nullptr, *beta = nullptr, *hbuf = nullptr, *y = nullptr;
@@ -607,8 +632,15 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
         m.stager = std::make_unique<Stager>();
         const int hw = (int) std::thread::hardware_concurrency();
         const char* stv = std::getenv("STRATA_STAGER_THREADS");   // D-5: the host copy threads of unpinned blobs
-        if (!m.stager->init((size_t) MAXBLOB(), stv ? std::clamp(std::atoi(stv), 1, 32) : std::max(2, std::min(4, hw / 4))))
-            ok = false;
+        // A GGUF read in place (UD-Q4_K_XL beyond its RAM budget): most of a chunk's blobs are page faults on the
+        // SSD, so the copies need many reads in flight - 32 threads and a 128-deep ring read a 4K chunk in 29 s
+        // instead of 71 s on an RTX 5070 / NVMe PC (4 threads, 16 deep: the defaults, kept for every other source)
+        bool files = false;
+        for (int64_t l = 0; src != nullptr && !files && l < g.n_layers; ++l)
+            for (int64_t e = 0; !files && e < g.n_expert; ++e) files = src->transient(l, e);
+        const int threads = stv ? std::clamp(std::atoi(stv), 1, 32) : files ? 32 : std::max(2, std::min(4, hw / 4));
+        if (files && std::getenv("STRATA_STAGER_RING") == nullptr) m.stager->kRing = 4 * threads;
+        if (!m.stager->init((size_t) MAXBLOB(), threads)) ok = false;
     }
     m.steps_host.resize(T * strata::kernels::kStepCount);
     m.ids_host.resize(T * K); m.slot_host.resize(T * K); m.src_host.resize(T * K); m.cnt.resize(m.g->n_expert); m.off.resize(m.g->n_expert + 1);
@@ -722,6 +754,8 @@ bool Prefill::carve(size_t T, void* alloc) {
     m.gated = o.take<float>(T * D, ok); m.inj = o.take<float>(T * HC, ok);
     m.mixed = o.take<float>(T * N, ok); m.mixed_bf = o.take<uint16_t>(T * N, ok);
     m.mixed_h = o.take<uint16_t>(T * N, ok); m.bo = o.take<float>(T * N, ok);
+    if (bf16x2_hc()) { m.xn16_lo = o.take<uint16_t>(T * D, ok); m.lo16_lo = o.take<uint16_t>(T * LR, ok); }
+    if (bf16x2()) m.mixed_bf_lo = o.take<uint16_t>(T * N, ok);
     m.steps_dev = o.take<int32_t>(T * strata::kernels::kStepCount, ok);
     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
@@ -973,9 +1007,11 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
         proj(mixed, mixed_h, w_v, Vc, nb, KV, Nn, 0);
         rms_rows(Kc, w_kn, nb * g.n_head_kv, g.head_dim, g.head_dim, EPS, m.cs);
         rope(Kc, nb, g.n_head_kv, g.head_dim, KV, c0, strata::kernels::rope_scaling(), m.cs);
-        if (st.kv_q4) {
+        if (st.kv_rot) {   // rotated as the drafter's own decode stores them (mtp.cpp)
             strata::kernels::fwht256_inplace_cuda(Kc, nb * g.n_head_kv, m.cs);
             strata::kernels::fwht256_inplace_cuda(Vc, nb * g.n_head_kv, m.cs);
+        }
+        if (st.kv_q4) {
             strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, c0, nb, Kc, Vc, s, m.cs, &st.host);
         } else {
             kv_append(Kc, Vc, nb, c0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
@@ -1001,6 +1037,7 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
     return true;
 }
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
+void Prefill::set_ring_override(int slots) { g_ring_override = slots > 0 ? slots : 0; }
 double Prefill::pinned_share() { return g_pinned_share; }
 
 uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk) {
@@ -1014,6 +1051,8 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     auto f = [&](size_t n) { o.take<float>(n, ok); };
     f(T * N); f(T * D); f(T * D); o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
     f(T * D); f(T * HC); f(T * N); o.take<uint16_t>(T * N, ok); o.take<uint16_t>(T * N, ok); f(T * N);
+    if (bf16x2_hc()) { o.take<uint16_t>(T * D, ok); o.take<uint16_t>(T * LR, ok); }
+    if (bf16x2()) o.take<uint16_t>(T * N, ok);
     o.take<int32_t>(T * strata::kernels::kStepCount, ok);
     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
@@ -1052,9 +1091,10 @@ bool native_proj(Gemm& gm, const core::WeightRef* w, const uint16_t* X, float* Y
     return true;
 }
 bool bf16_proj(Gemm& gm, const core::WeightRef* w, const uint16_t* X, float* Y, int64_t T, const std::string& name,
-               std::string& err, int64_t ldy = 0) {
+               std::string& err, int64_t ldy = 0, const uint16_t* X_lo = nullptr) {
     if (w->kind != core::WeightKind::Bf16InF32 || !w->data) { err = "prefill: " + name + " is not a resident BF16 tensor"; return false; }
     gm.bf16(X, (const uint16_t*) w->data, Y, T, w->ne1 > 0 ? w->ne1 : 1, w->ne0, ldy);
+    if (X_lo) gm.bf16(X_lo, (const uint16_t*) w->data, Y, T, w->ne1 > 0 ? w->ne1 : 1, w->ne0, ldy, 1.0f);
     return true;
 }
 
@@ -1499,7 +1539,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 const auto tp = Clock::now();
                 const strata::kernels::PleWeights& pw = ss.ple.w;
                 constexpr int64_t HD = strata::kernels::NG_HC_DIM;
-                const uint64_t per_token = (uint64_t) (3 * HD + N + 4) * 4 + (uint64_t) N * 2 + 4096;
+                const uint64_t per_token = (uint64_t) (3 * HD + N + 4) * 4 + (uint64_t) N * (bf16x2() ? 4 : 2) + 4096;
                 const int64_t SB = std::min<int64_t>(T, (int64_t) (m.region_bytes / per_token));
                 for (int64_t s0 = 0; s0 < T; s0 += SB) {
                     const int64_t nb = std::min(SB, T - s0);
@@ -1511,16 +1551,19 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     float* val = carve_f((size_t) nb * N);
                     float* gate = carve_f((size_t) nb * 4);
                     uint16_t* e16 = (uint16_t*) carve_f((size_t) nb * N / 2);
+                    uint16_t* e16_lo = bf16x2() ? (uint16_t*) carve_f((size_t) nb * N / 2) : nullptr;
                     const float* emb = m.ple_emb + s0 * N;
                     if (pw.key_bf16 != nullptr) {
-                        to_bf16(emb, e16, nb * N, m.cs);
+                        to_bf16(emb, e16, nb * N, m.cs, e16_lo);
                         m.gemm.bf16(e16, pw.key_bf16, key, nb, HD, N);
+                        if (e16_lo) m.gemm.bf16(e16_lo, pw.key_bf16, key, nb, HD, N, 0, 1.0f);
                     } else {
                         to_f16(emb, e16, nb * N, m.cs);
                         m.gemm.native(e16, pw.key_native_type, pw.key_native_data, key, nb, HD, N);
-                        to_bf16(emb, e16, nb * N, m.cs);
+                        to_bf16(emb, e16, nb * N, m.cs, e16_lo);
                     }
                     m.gemm.bf16(e16, pw.value_bf16, val, nb, N, N);
+                    if (e16_lo) m.gemm.bf16(e16_lo, pw.value_bf16, val, nb, N, N, 0, 1.0f);
                     try {
                         strata::kernels::native_ple_postops_batch(key, m.R + s0 * D, val, ss.ple.hist, pw, qn, gated,
                                                                   gate, (int) nb, m.cs);
@@ -1551,15 +1594,16 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                       *wu = need(v, su.c_str(), err), *wi = need(v, si.c_str(), err);
                 if (!wn || !wd || !wu || !wi) return false;
                 pt.mark(kPfHc, cs);
-                if (gr_unfused()) gr_norm(m.R, (const float*) wn->data, EPS, m.xn, m.xn16, T, m.cs);
-                else if (!normed) gr_norm_rs(m.R, (const float*) wn->data, EPS, m.grs, m.xn16, T, m.cs);
+                if (gr_unfused()) gr_norm(m.R, (const float*) wn->data, EPS, m.xn, m.xn16, T, m.cs, m.xn16_lo);
+                else if (!normed) gr_norm_rs(m.R, (const float*) wn->data, EPS, m.grs, m.xn16, T, m.cs, m.xn16_lo);
                 normed = false;
-                if (!bf16_proj(m.gemm, wd, m.xn16, m.lo, T, sd, err)) return false;
-                gr_silu(m.lo, m.lo16, T, m.cs);
-                if (!bf16_proj(m.gemm, wu, m.lo16, m.gated, T, su, err)) return false;
-                if (!bf16_proj(m.gemm, wi, m.xn16, m.inj, T, si, err)) return false;
-                if (gr_unfused()) gr_mix(m.xn, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
-                else gr_mix_r(m.R, m.grs, (const float*) wn->data, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h);
+                if (!bf16_proj(m.gemm, wd, m.xn16, m.lo, T, sd, err, 0, m.xn16_lo)) return false;
+                gr_silu(m.lo, m.lo16, T, m.cs, m.lo16_lo);
+                if (!bf16_proj(m.gemm, wu, m.lo16, m.gated, T, su, err, 0, m.lo16_lo)) return false;
+                if (!bf16_proj(m.gemm, wi, m.xn16, m.inj, T, si, err, 0, m.xn16_lo)) return false;
+                if (gr_unfused()) gr_mix(m.xn, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h, m.mixed_bf_lo);
+                else gr_mix_r(m.R, m.grs, (const float*) wn->data, m.gated, m.mixed, m.mixed_bf, T, m.cs, m.mixed_h,
+                              m.mixed_bf_lo);
 
                 if (half == 0 && !core::is_qsa_layer(g, l)) {
                     // ======================= GDN =======================
@@ -1574,8 +1618,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
                     if (!native_proj(m.gemm, wqkv, m.mixed_h, m.qkv, T, v.name("attn_qkv.weight"), err)) return false;
                     if (!native_proj(m.gemm, wg, m.mixed_h, m.z, T, v.name("attn_gate.weight"), err)) return false;
-                    if (!bf16_proj(m.gemm, wa, m.mixed_bf, m.ab, T, v.name("ssm_alpha.weight"), err, 2 * HV)) return false;
-                    if (!bf16_proj(m.gemm, wb, m.mixed_bf, m.ab + HV, T, v.name("ssm_beta.weight"), err, 2 * HV)) return false;
+                    if (!bf16_proj(m.gemm, wa, m.mixed_bf, m.ab, T, v.name("ssm_alpha.weight"), err, 2 * HV, m.mixed_bf_lo)) return false;
+                    if (!bf16_proj(m.gemm, wb, m.mixed_bf, m.ab + HV, T, v.name("ssm_beta.weight"), err, 2 * HV, m.mixed_bf_lo)) return false;
                     pt.mark(kPfGdnConv, cs);   // "gdn" is the projections in; the rest on their own lines
                     gdn_gates(m.ab, (const float*) wdt->data, (const float*) wsa->data, m.gate, m.beta, T, m.cs);
                     gdn_conv(conv, m.qkv, (const float*) wc->data, m.hbuf, T, EPS, m.cs);
@@ -1599,8 +1643,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     if (!native_proj(m.gemm, wk, m.mixed_h, m.Kc, T, v.name("attn_k.weight"), err)) return false;
                     if (!native_proj(m.gemm, wv, m.mixed_h, m.Vc, T, v.name("attn_v.weight"), err)) return false;
                     if (!native_proj(m.gemm, wq, m.mixed_h, m.Qf, T, v.name("attn_q.weight"), err)) return false;
-                    if (!bf16_proj(m.gemm, wik, m.mixed_bf, m.idx_raw, T, v.name("indexer.k_proj.weight"), err)) return false;
-                    if (!bf16_proj(m.gemm, wiq, m.mixed_bf, m.q_idx, T, v.name("indexer.q_proj.weight"), err)) return false;
+                    if (!bf16_proj(m.gemm, wik, m.mixed_bf, m.idx_raw, T, v.name("indexer.k_proj.weight"), err, 0, m.mixed_bf_lo)) return false;
+                    if (!bf16_proj(m.gemm, wiq, m.mixed_bf, m.q_idx, T, v.name("indexer.q_proj.weight"), err, 0, m.mixed_bf_lo)) return false;
                     rms_rows(m.Kc, (const float*) wkn->data, T * 2, 256, 256, EPS, m.cs);
                     rope(m.Kc, T, 2, 256, 512, p0, strata::kernels::rope_scaling(), m.cs);
                     // KV streaming: this layer's cells [0, p0) come in from the host copy to the staging pool, and the
@@ -1620,20 +1664,23 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                   staged ? &m.stage : nullptr);
                         strata::kernels::kv_append_q4(st.v_q4, st.v_q4, st.page_table, p0, T, m.Vc, m.Vc, s, m.cs,
                                                       nullptr, staged ? &m.stage : nullptr);
-                    } else if (st.kv_q4) {   // Q4_0 KV (kv_q4.hpp): rotated K and V, the queries below too, the output back
-                        strata::kernels::fwht256_inplace_cuda(m.Kc, T * 2, m.cs);
-                        strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
-                        strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
-                                                      &st.host, staged ? &m.stage : nullptr);
                     } else {
-                        kv_append(m.Kc, m.Vc, T, p0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
-                                  st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs,
-                                  &st.host, staged ? &m.stage : nullptr);
+                        if (st.kv_rot) {   // rotated K and V (kv_q4.hpp), the queries below too, the output back
+                            strata::kernels::fwht256_inplace_cuda(m.Kc, T * 2, m.cs);
+                            strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
+                        }
+                        if (st.kv_q4)
+                            strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
+                                                          &st.host, staged ? &m.stage : nullptr);
+                        else
+                            kv_append(m.Kc, m.Vc, T, p0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
+                                      st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs,
+                                      &st.host, staged ? &m.stage : nullptr);
                     }
                     split_q(m.Qf, m.q, T, m.cs);
                     rms_rows(m.q, (const float*) wqn->data, T * 24, 256, 256, EPS, m.cs);
                     rope(m.q, T, 24, 256, 6144, p0, strata::kernels::rope_scaling(), m.cs);
-                    if (st.kv_q4) strata::kernels::fwht256_inplace_cuda(m.q, T * 24, m.cs);
+                    if (st.kv_rot) strata::kernels::fwht256_inplace_cuda(m.q, T * 24, m.cs);
                     rms_rows(m.q_idx, (const float*) wiqn->data, T * 4, 128, 128, EPS, m.cs);
                     rope(m.q_idx, T, 4, 128, 512, p0, strata::kernels::rope_scaling(), m.cs);
                     // the indexer appends, token by token; then scores + selection for many queries at once:
@@ -1671,7 +1718,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             strata::kernels::qsa_block_scores(st.idx_pooled, st.idx_dead, m.q_idx + t0 * 512, steps0, nb,
                                                               m.max_blocks, s, m.sel_scores, m.cs, active);
                         strata::kernels::qsa_block_topk(m.sel_scores, steps0, nb, m.max_blocks, m.cap, s,
-                                                        m.sel_ids + t0 * m.cap, m.cs);
+                                                        m.sel_ids + t0 * m.cap, m.cs, active);
                     }
                     // STRATA_SEL_OVERLAP (debug, D-1's question): how much do neighbouring queries' selections share?
                     // Per tile of 16 queries: the union of their selected cells against the sum of their widths.
@@ -1831,7 +1878,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                                                    m.steps_dev + t0 * strata::kernels::kStepCount, m.cap,
                                                                    s, m.attn_scratch, m.attn + t0 * ZV, nb, m.cs);
                         }
-                    if (st.kv_q4 || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(m.attn, T * 24, m.cs);
+                    if (st.kv_rot || st.kv_hybrid) strata::kernels::fwht256_inplace_cuda(m.attn, T * 24, m.cs);
                     pt.mark(kPfQsa, cs);
                     gate_attn(m.attn, m.Qf, m.attn_h, T, m.cs);
                     if (!native_proj(m.gemm, wo, m.attn_h, m.bo, T, v.name("attn_output.weight"), err)) return false;
@@ -1845,7 +1892,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                           *wsd = need(v, "ffn_down_shexp.weight", err);
                     if (!wr || !wgi || !wsg || !wsu || !wsd) return false;
                     pt.mark(kPfRouter, cs);
-                    if (!bf16_proj(m.gemm, wr, m.mixed_bf, m.logits, T, v.name("ffn_gate_inp.weight"), err)) return false;
+                    if (!bf16_proj(m.gemm, wr, m.mixed_bf, m.logits, T, v.name("ffn_gate_inp.weight"), err, 0, m.mixed_bf_lo)) return false;
                     route(m.logits, m.ids, m.w, T, m.g->n_expert, m.cs);
                     // the shared expert and its scalar gate
                     if (!native_proj(m.gemm, wsg, m.mixed_h, m.sgate, T, v.name("ffn_gate_shexp.weight"), err)) return false;
@@ -1854,6 +1901,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     if (!native_proj(m.gemm, wsd, m.sh_h, m.shared, T, v.name("ffn_down_shexp.weight"), err)) return false;
                     if (wgi->kind != core::WeightKind::Bf16InF32) { err = "prefill: shared gate is not BF16"; return false; }
                     m.gemm.bf16(m.mixed_bf, (const uint16_t*) wgi->data, m.sg, T, 1, N);
+                    if (m.mixed_bf_lo) m.gemm.bf16(m.mixed_bf_lo, (const uint16_t*) wgi->data, m.sg, T, 1, N, 0, 1.0f);
                     // group the (token, k) pairs by expert on the host
                     pt.mark(kPfHostGroup, cs);
                     // (the sync below also orders this layer's writes of slot/src/bounds after the previous
@@ -2222,7 +2270,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     if (!wnn) return false;
                 }
                 if (wnn) {
-                    gr_write_norm_rs(m.R, m.bo, m.inj, HC, (const float*) wnn->data, EPS, m.grs, m.xn16, T, m.cs);
+                    gr_write_norm_rs(m.R, m.bo, m.inj, HC, (const float*) wnn->data, EPS, m.grs, m.xn16, T, m.cs,
+                                     m.xn16_lo);
                     normed = true;
                 } else {
                     gr_write(m.R, m.bo, m.inj, HC, T, m.cs);
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 18881b90bbc..926e1d1a0b9 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -22,6 +22,7 @@
 #include "strata/core/expert_cache.hpp"
 #include "strata/core/conversation_snapshot.hpp"
 #include "strata/core/conversation_memory.hpp"
+#include "strata/core/coupled_draft.hpp"
 #include "strata/core/expert_source.hpp"
 #include "strata/core/gguf_expert_source.hpp"
 #include "strata/kernels/resident_plan_mirror.hpp"
@@ -61,6 +62,8 @@
 #include "strata/spec/suffix_drafter.hpp"
 #include "strata/kernels/cvec.hpp"
 #include "strata/core/progress.hpp"
+#include "strata/core/device.hpp"
+#include "strata/core/emulate.hpp"
 #ifndef NOMINMAX
 #define NOMINMAX   // gguf_reader.hpp includes windows.h
 #endif
@@ -231,6 +234,8 @@ struct Options {
     /// combination recorded in bench/results/2026-09-23-attention-ple plus the native indexer, and never the
     /// <=256-token attention adapter. It becomes the default once P0 shows it is not slower.
     std::string native_preset;
+    /// The token embedding from this GGUF instead of --native's (tools/embd_bf16_pack.py: BF16 as shipped)
+    std::string embd_gguf;
     /// Plan v0.3 P2: how the n-gram table is read. Direct (default) = unbuffered SSD reads, table never in RAM.
     std::string ple_io = "direct";
     int64_t ple_row_cache = 1 << 20;   ///< bounded row cache (rows of 90 B); 0 disables
@@ -269,10 +274,13 @@ struct Options {
     bool graph_only = false;
     bool gpu_only_full = false;   ///< R0.3: pre + post + head, the true per-token GPU floor
     int pool_workers = 0;         ///< R2.2: 0 = "all physical cores minus the host's"; >0 overrides
+    /// #272: the pool's core layout; `all` (the default) is the layout it always had, auto / p-cores are opt-in
+    strata::kernels::cpu::PoolAffinity pool_affinity = strata::kernels::cpu::PoolAffinity::All;
     /// R2.2's first half, as an A/B arm.  **ON by default**, because the measurement that justifies it is the
     /// pool's own drain: 33.7 GB/s against 5/6 x 44.14 = 36.8 for five workers, on a machine whose sixth core
     /// is reserved for a host thread that has nothing to do while the drain runs.
     bool no_host_worker = false;
+    bool coupled_draft = strata::core::coupled_draft_env(); ///< Coupled draft sampling for MTP drafter under sampling
     bool mmap_experts = false;    ///< R2.1: opt OUT of the resident arena, back to MapViewOfFile
     std::string shared_expert_arena; ///< Linux: optional file backing for the resident arena shared by processes
     bool resident_cpu_experts = false; ///< mmap-backed static-cache misses copied into ordinary RAM
@@ -337,6 +345,9 @@ struct Options {
     /// `--prefill auto`: the largest chunk (up to 8192) whose buffers the expert cache can lend.  Every expert a chunk
     /// routes to is streamed once per chunk, so a bigger chunk streams fewer bytes per token (the "ubatch" effect).
     bool prefill_auto = false;
+    /// #282, opt-in: the largest chunk `--prefill auto` may take - 8192 by default; `--prefill auto:16384` or
+    /// `auto:32768` (or STRATA_PREFILL_AUTO_MAX) lets it go further, never past the context
+    int64_t prefill_auto_max = 8192;
     bool no_split_rows = false;        ///< plan v0.3 P4 A/B: one whole expert per pool thread
     /// Plan v0.3 P5: the prompt path borrows the top expert-cache slots for its buffers and refills them after
     /// the prompt (default); `--no-prefill-borrow` reserves the buffers' VRAM for the whole session instead.
@@ -468,6 +479,8 @@ void usage() {
                  "                       indexer, RoPE, PLE postops, and the CPU q8_0 contract unless the\n"
                  "                       expert cache is on. Individual --native-* flags stay for A/B.\n"
                  "  --native-head-gguf PATH  native Q5_K head from model shard 1; requires --stream-token\n"
+                 "  --embd-gguf PATH     the token embedding from this GGUF instead of --native's (tools/embd_bf16_pack.py:\n"
+                 "                       BF16 as the checkpoint ships it; mapped host memory, no VRAM)\n"
                  "  --native-dense-gguf PATH native GDN/QSA/shared projections; repeat for each source model shard\n"
                  "  --expert-cache-cpu-order  experimental GPU expert reduction matching CPU order\n"
                  "  --max-new N          tokens to generate (default 16)\n"
@@ -516,7 +529,8 @@ void usage() {
                  "  --no-token-graph     A/B: two graphs per layer (the host launches each) instead of one per token\n"
                  "  --no-fused-gr        A/B: the six-kernel hyper-connection read and a separate write (native)\n"
                  "  --prefill CHUNK      batched prompt processing in chunks of CHUNK tokens (needs --native); auto =\n"
-                 "                       the largest chunk up to 8192 whose buffers the expert cache can lend\n"
+                 "                       the largest chunk up to 8192 whose buffers the expert cache can lend;\n"
+                 "                       auto:16384 / auto:32768 (or STRATA_PREFILL_AUTO_MAX) allow bigger ones\n"
                  "  --no-pool            skip the CPU expert pool (the GPU-only floor)\n"
                  "  --sync-every-layer   debug: synchronise after every layer\n"
                  "  --ple-gguf PATH      the n-gram/PLE shard.  WITHOUT IT LAYER 1's PLE IS SILENTLY SKIPPED,\n"
@@ -557,8 +571,14 @@ void usage() {
                  "                       pool is six threads on six cores instead of five plus an idle core;\n"
                  "                       this flag restores the five-worker form for comparison on `pool phases`.\n"
                  "  --pool-workers N     R2.2: CPU expert pool worker count.  Default 0 = every physical core\n"
-                 "                       except the one the host loop spins on.  A sweep is how the pool's\n"
+                 "                       except the one the host loop spins on (with --pool-affinity auto or\n"
+                 "                       p-cores on a hybrid CPU: P-cores minus 1).  A sweep is how the pool's\n"
                  "                       deviation from `cpu_s2` is attributed.\n"
+                 "  --pool-affinity MODE Worker CPU affinity: all (default: one worker per physical core, as\n"
+                 "                       always), auto (hybrid CPUs: P-cores first, then their SMT siblings,\n"
+                 "                       then E-cores) or p-cores (P-cores and their siblings only).\n"
+                 "  --coupled-draft      enable coupled draft sampling for MTP drafter under sampling (STRATA_SPEC_COUPLED)\n"
+                 "  --no-coupled-draft   disable coupled draft sampling (propose argmax drafts)\n"
                  "  --mmap-experts       R2.1: opt OUT of the resident expert arena, back to MapViewOfFile.\n"
                  "  --stream-experts     no host arena: experts read from the GGUF on demand (needs a native pack and\n"
                  "                       a VRAM cache that holds every expert; for machines with less RAM than experts)\n"
@@ -1114,6 +1134,7 @@ int main(int argc, char **argv) try {
         else if (a == "--cpu-oracle-q8-0") o.cpu_oracle_q8_0 = true;
         else if (a == "--native") o.native_preset = next("--native");
         else if (a == "--native-head-gguf") o.native_head_gguf = next("--native-head-gguf");
+        else if (a == "--embd-gguf") o.embd_gguf = next("--embd-gguf");
         else if (a == "--native-dense-gguf") o.native_dense_gguf.push_back(next("--native-dense-gguf"));
         else if (a == "--no-capture") o.no_capture = true;
         else if (a == "--no-pool") o.no_pool = true;
@@ -1122,8 +1143,20 @@ int main(int argc, char **argv) try {
         else if (a == "--graph-only") o.graph_only = true;
         else if (a == "--gpu-only-full") o.gpu_only_full = true;
         else if (a == "--pool-workers") o.pool_workers = std::atoi(next("--pool-workers"));
+        else if (a == "--pool-affinity") {
+            const std::string v = next("--pool-affinity");
+            if (v == "auto") o.pool_affinity = strata::kernels::cpu::PoolAffinity::Auto;
+            else if (v == "p-cores" || v == "pcores") o.pool_affinity = strata::kernels::cpu::PoolAffinity::PCores;
+            else if (v == "all") o.pool_affinity = strata::kernels::cpu::PoolAffinity::All;
+            else {
+                std::fprintf(stderr, "strata generate: unknown --pool-affinity value '%s' (expected auto, p-cores, or all)\n", v.c_str());
+                return 2;
+            }
+        }
         else if (a == "--no-host-worker") o.no_host_worker = true;
         else if (a == "--no-ple-prefetch") o.no_ple_prefetch = true;
+        else if (a == "--coupled-draft") o.coupled_draft = true;
+        else if (a == "--no-coupled-draft") o.coupled_draft = false;
         else parsed = false;
         // The chain continues here in a second statement: one chain of 120+ `else if` passed MSVC's limit of 128
         // nested blocks (C1061).  The order of the tests and what each does are unchanged.
@@ -1140,8 +1173,13 @@ int main(int argc, char **argv) try {
         else if (a == "--vram-reserve-mib") o.vram_reserve_mib = std::atoi(next("--vram-reserve-mib"));
         else if (a == "--prefill") {
             const std::string v = next("--prefill");
-            o.prefill_auto = v == "auto";
-            o.prefill_chunk = o.prefill_auto ? 8192 : std::atoll(v.c_str());
+            o.prefill_auto = v == "auto" || v.rfind("auto:", 0) == 0;
+            // #282: auto:N (N = 16384 or 32768) or STRATA_PREFILL_AUTO_MAX lets auto take chunks above 8192
+            const char* env_max = std::getenv("STRATA_PREFILL_AUTO_MAX");
+            const long long want_max = v.rfind("auto:", 0) == 0 ? std::atoll(v.c_str() + 5)
+                                     : (o.prefill_auto && env_max != nullptr ? std::atoll(env_max) : 8192);
+            o.prefill_auto_max = want_max >= 32768 ? 32768 : want_max >= 16384 ? 16384 : 8192;
+            o.prefill_chunk = o.prefill_auto ? o.prefill_auto_max : std::atoll(v.c_str());
         }
         else if (a == "--no-split-rows") o.no_split_rows = true;
         else if (a == "--no-prefill-borrow") { o.no_prefill_borrow = true; borrow_explicit = true; }
@@ -1272,6 +1310,7 @@ int main(int argc, char **argv) try {
         }
         }
     }
+    strata::core::set_coupled_draft(o.coupled_draft);
     if (o.serve && o.conversation_cache_mib > 0 && (o.prompt_cache == 0 || o.conversation_cache_slots == 0))
         std::fprintf(stderr, "strata serve: warning: conversation caching is disabled by %s\n",
                      o.prompt_cache == 0 ? "--prompt-cache 0" : "--conversation-cache-slots 0");
@@ -1334,6 +1373,7 @@ int main(int argc, char **argv) try {
         }
     }
     bool multi_gpu = !split_devs.empty() && !split_same;   // cleared by --split-skip-if-fits before any stage loads
+    bool split_own_auto = false;   // #340: the split keeps own prompt buffers by its rule (not --no-prefill-borrow)
     if (o.mmap_experts && !o.shared_expert_arena.empty()) {
         std::fprintf(stderr, "strata generate: --shared-expert-arena backs the resident arena and cannot be used with --mmap-experts\n");
         return 2;
@@ -1365,6 +1405,59 @@ int main(int argc, char **argv) try {
         // more than either 8 GB card had - which is how adding two GPUs to the two 12 GB ones lost 260K.
         // The loan is the tail of the stage's own cache (see `PfPart` in the serve block); outside the prompt
         // that tail is expert cache, so a large chunk costs a stage nothing permanent.
+        // #340 - BUT A LOAN IS NOT FREE PER REQUEST: every stage streams the lent experts during the prompt and
+        // copies them back after it, so on cards that hold (nearly) every expert of their layers a 2K prompt read
+        // 37% slower than 0.1.29's own buffers (2x RX 9070 XT / R9700: 1570 -> 990 tok/s; 2x A5000 in #340: -35%).
+        // So a split keeps 0.1.29's own buffers (2048-token chunks, priced into the split search) when they are a
+        // small part of every card - at most 12% of its VRAM (16 GB and larger cards) - and borrows on smaller cards,
+        // where the reserve would cost the cache (and the context) the paragraph above is about.  Measured with own
+        // buffers on the 9070 XT + R9700: 2K 1588 tok/s, 16K 2006 (0.1.29 1568 / 1935, 0.1.31 993 / 1852).
+        // OPT-IN (the owner's choice for 0.1.32): own buffers change which experts a full card keeps resident, so the
+        // split's output differs from 0.1.31's; the default borrows as 0.1.31 did - with the concurrent refill and the
+        // 96-blob split ring that alone gave 2K +27%, 16K +5% over 0.1.31, decode unchanged, output identical.
+        // STRATA_SPLIT_OWN=auto: the 12% rule above; 1: own buffers on any cards; unset/0: borrow.
+        // --split-skip-if-fits keeps the loans (it can fall back to one GPU, which must stay as it is).
+        const char* own_env = std::getenv("STRATA_SPLIT_OWN");
+        if (!o.no_prefill_borrow && !o.split_skip_if_fits && own_env != nullptr && own_env[0] != '0') {
+            const char* v = std::string(own_env) == "auto" ? nullptr : own_env;
+            bool own = v ? v[0] == '1' : true;
+            // the buffers of a 2048-token chunk (or the --prefill one) + a 96-blob ring (as split_pf_mib prices them)
+            const int64_t own_chunk = o.prefill_auto || o.prefill_chunk <= 0 ? 2048 : o.prefill_chunk;
+            const int64_t reserve_mib = 160 + (own_chunk * 680) / 1024 + 96 * 4;
+            std::string why;
+            if (!v) {
+                std::vector<int> devs = {0};
+                for (const int d : split_devs) devs.push_back(d);
+                for (const int d : devs) {
+                    dpct::device_info prop{};
+                    /*
+                    DPCT1026: The call to cudaGetLastError was removed
+                    because this functionality is redundant in SYCL.
+                    */
+                    if (DPCT_CHECK_ERROR(
+                            dpct::get_device(d).get_device_info(prop)) != 0) {
+                        ; own = false; break;
+                    }
+                    const int64_t total_mib =
+                        (int64_t)(prop.get_global_mem_size() >> 20);
+                    if (reserve_mib * 100 > 12 * total_mib) {
+                        own = false;
+                        why = "CUDA" + std::to_string(d) + " has " + std::to_string(total_mib) + " MiB";
+                        break;
+                    }
+                }
+            }
+            if (own) {
+                o.no_prefill_borrow = true;
+                split_own_auto = true;
+                std::fprintf(stderr, "strata generate: layer split: every stage keeps its own prompt buffers (~%lld MiB "
+                                     "each, %lld-token chunks)%s\n", (long long) reserve_mib, (long long) own_chunk,
+                             v ? " (STRATA_SPLIT_OWN=1)" : "");
+            } else if (!why.empty()) {
+                std::fprintf(stderr, "strata generate: layer split: the prompt paths borrow from the caches (%s)\n",
+                             why.c_str());
+            }
+        }
         int n_vis = 1;
         if (DPCT_CHECK_ERROR(n_vis = dpct::device_count()) != 0 || n_vis < 1)
             n_vis = 1;
@@ -1448,6 +1541,12 @@ int main(int argc, char **argv) try {
     }
     strata::core::qsa_set_kv_int8(o.kv == "int8");
     strata::core::qsa_set_kv_q4(o.kv == "q4_0");   // PR #21: 4-bit codes after a Hadamard rotation (kv_q4.hpp)
+    // STRATA_KV_ROT=1: INT8 K/V through the Hadamard rotation --kv q4_0 already uses. Opt-in: first-token KL to
+    // fp16 K/V improved on an NVFP4 pack (0.0066 -> 0.0051) but not on IQ2_XS (0.0022 -> 0.0054)
+    const char* kv_rot = std::getenv("STRATA_KV_ROT");
+    strata::core::qsa_set_kv_int8_rotate(kv_rot != nullptr && kv_rot[0] == '1');
+    if (kv_rot != nullptr && kv_rot[0] == '1' && o.kv == "int8")
+        std::fprintf(stderr, "strata generate: STRATA_KV_ROT=1: INT8 K/V through the Hadamard rotation (opt-in)\n");
     strata::core::qsa_set_kv_hybrid(o.kv == "k8v4");   // K8V4: INT8 K + rotated Q4_0 V, 816 B/cell
     if (o.kv_resident < 0) {
         std::fprintf(stderr, "strata generate: --kv-resident must be >= 0\n");
@@ -1497,7 +1596,14 @@ int main(int argc, char **argv) try {
             // every shard of the model (<name>-0000N-of-0000M.gguf beside --native), then the PLE shard: a split
             // may put any layer in any shard (Swift's GGUFs: layers 13-47 in shard 2, the PLE table in shard 1)
             o.native_dense_gguf = o.native_shards;
-            if (std::find(o.native_dense_gguf.begin(), o.native_dense_gguf.end(), o.ple_gguf) == o.native_dense_gguf.end())
+            // a PLE-only table (tools/ple_fp8_pack.py: architecture strata-ple) holds no projections
+            bool ple_only = false;
+            try {
+                strata::GgufFile pg(o.ple_gguf);
+                if (const strata::MetaValue* v = pg.get("general.architecture")) ple_only = v->s == "strata-ple";
+            } catch (const std::exception&) {}
+            if (!ple_only &&
+                std::find(o.native_dense_gguf.begin(), o.native_dense_gguf.end(), o.ple_gguf) == o.native_dense_gguf.end())
                 o.native_dense_gguf.push_back(o.ple_gguf);
         }
         // Plan v0.3 (24 Sep): the CPU experts stay on the VNNI kernel.  The llama.cpp-CPU-exact q8_0 contract
@@ -1816,15 +1922,16 @@ int main(int argc, char **argv) try {
             return 2;
         }
         const strata::core::ModelGeometry g0;
-        if (!native_embed.load(o.native_shards, g0.n_embd, 248320, err)) {
+        if (!native_embed.load(o.embd_gguf.empty() ? o.native_shards : std::vector<std::string>{o.embd_gguf}, g0.n_embd,
+                               248320, err)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
         strata::core::set_native_embed(&native_embed);
         std::fprintf(stderr, "strata generate: native pack: %s experts (largest blob %.2f MB), token embedding "
-                             "type %d in mapped host memory (%.0f MiB)\n",
+                             "%s in mapped host memory (%.0f MiB)\n",
                      o.pack.c_str(), (double) strata::kernels::cpu::expert_layout().max_blob / 1e6,
-                     native_embed.type(), (double) native_embed.bytes() / 1048576.0);
+                     strata::ggml_type_name((uint32_t) native_embed.type()), (double) native_embed.bytes() / 1048576.0);
     }
     // Plan v0.3 P1: tensors served in native form are not also loaded in canonical form (~2.7 GB of VRAM back
     // to the expert cache with --native).  `--keep-canonical` loads both, as before.
@@ -1838,6 +1945,11 @@ int main(int argc, char **argv) try {
         if (!o.native_head_gguf.empty()) skip.insert("output.weight");
         // the PLE module validates its canonical key at construction (8 MB); a native pack has none to load
         if (!native_pack) skip.erase("blk.1.ple_key.weight");
+        // #326: a --compat-bf16 pack (OrcaRouter IQ3_XXS) keeps its BF16 key in the arena
+        if (native_pack && !strata::core::NativeDense::keep_unquantized_ple_key(o.pack, skip, err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
         if (native_pack) skip.insert("token_embd.weight");
     }
     uint64_t pool_bytes = 0;
@@ -2009,6 +2121,17 @@ int main(int argc, char **argv) try {
         pio.max_inflight = (uint32_t) o.ple_inflight;
         pio.cache_rows = (uint64_t) o.ple_row_cache;
         pio.io_thread = !o.ple_sync_submit;
+        // Keep the SSD awake while rows are being asked for (PleReader::set_keepalive): some SSDs stall the first
+        // reads 50-150 ms after ~250 ms without a command.  STRATA_SSD_KEEPALIVE = ms without a read before one
+        // page is read anyway (default 100, 0 = off), STRATA_SSD_KEEPALIVE_WINDOW = seconds after the last row
+        // request that this goes on (default 60; then the SSD may sleep until the next request).
+        {
+            const char* ka = std::getenv("STRATA_SSD_KEEPALIVE");
+            const char* kw = std::getenv("STRATA_SSD_KEEPALIVE_WINDOW");
+            pio.keepalive_ms = ka != nullptr && *ka ? std::clamp(std::atof(ka), 0.0, 10000.0) : 100.0;
+            pio.keepalive_window_s = kw != nullptr && *kw ? std::clamp(std::atof(kw), 1.0, 86400.0) : 60.0;
+            if (pio.mode != strata::kernels::PleIo::Direct || !pio.io_thread) pio.keepalive_ms = 0;
+        }
         if (!ple_table.open(o.ple_gguf, err, pio)) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
@@ -2017,6 +2140,12 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: PLE table %s (--ple-io ram) in %.1f s\n",
                          ple_table.locked() ? "locked in RAM" : "loaded (not locked)",
                          std::chrono::duration<double>(Clock::now() - tpl).count());
+        if (pio.keepalive_ms > 0)
+            std::fprintf(stderr, "strata generate: the SSD is kept awake while rows are read: one page of the table after "
+                                 "%.0f ms without a read, until %.0f s after the last request "
+                                 "(STRATA_SSD_KEEPALIVE=0 turns it off)\n", pio.keepalive_ms, pio.keepalive_window_s);
+        else if (pio.mode == strata::kernels::PleIo::Direct)
+            std::fprintf(stderr, "strata generate: SSD keep-alive off: the SSD may fall asleep between reads\n");
         const strata::core::WeightRef* wk = wt.find("blk.1.ple_key.weight");
         const strata::core::WeightRef* wv = wt.find("blk.1.ple_value.weight");
         const strata::core::WeightRef* wnk = wt.find("blk.1.ple_norm_key.weight");
@@ -2166,6 +2295,7 @@ int main(int argc, char **argv) try {
             }
         }
     }
+    strata::core::Verifier::set_commit_async(!multi_gpu);   // see Verifier::set_commit_async
     // ---- layer split across GPUs: each later stage's own copy of the dense weights, its session and (the last) the
     // head, made on its device before the host arena is mapped (as the drafter below, for the same WDDM reason)
     std::vector<std::unique_ptr<GpuStage>> stages;
@@ -2294,7 +2424,16 @@ int main(int argc, char **argv) try {
     // for buffers that cannot be priced exactly yet because the sessions do not exist.  `plan_lend` uses the
     // exact `Prefill::bytes_needed` as soon as it can.
     const bool pf_borrow = !o.no_prefill_borrow && !o.expert_profile.empty();
-    const int64_t split_pf_mib = (o.prefill_chunk > 0 && !pf_borrow) ? 160 + (o.prefill_chunk * 680) / 1024 : 0;
+    // (#340: the estimate predates the streamed ring: from 1024-token chunks the prompt path also holds a ring of
+    // whole expert blobs, which a split without borrowing sizes at 96 (Prefill::set_ring_override below) and books
+    // here - without it a `--no-prefill-borrow` split filled the cards and the draft head no longer fit)
+    const int64_t split_ring_mib =
+        (multi_gpu && !pf_borrow && o.prefill_chunk >= 1024)
+            ? (int64_t) ((96ull * (uint64_t) strata::kernels::cpu::expert_layout().max_blob + (1ull << 20) - 1) >> 20)
+            : 0;
+    if (split_ring_mib > 0) strata::prefill::Prefill::set_ring_override(96);
+    const int64_t split_pf_mib =
+        (o.prefill_chunk > 0 && !pf_borrow) ? 160 + (o.prefill_chunk * 680) / 1024 + split_ring_mib : 0;
     // ---- WHAT A STAGE RESERVES, AND ON WHICH STAGE.  The flat 1 GiB this used to withhold from EVERY stage
     // after the first was booked "for its windows and the drafter", but the windows measure 75 MiB ("window up
     // to 6 tokens, 74.1 MiB of device buffers", on every boot) and the drafter is loaded on ONE stage - the
@@ -2304,7 +2443,17 @@ int main(int argc, char **argv) try {
     // the windows and - only on the stage that carries them - the drafter and the head.
     const int64_t kWindowMib = 96;       // the verify windows; 75 MiB measured, rounded up
     const int64_t kDrafterMib = 1000;    // the MTP drafter (839 MiB) + the head, on the last stage only
-    auto stage_room = [&](int dev, bool later, bool drafter) -> int64_t {
+    // #340: with the own prompt buffers chosen by the split's rule (not asked for with --no-prefill-borrow) the
+    // boundary is searched as the borrowing configuration would (no reserve): the reserve then only makes the caches
+    // smaller, which measured cost no decode (K=28 on 9070 XT + R9700: 58.4 tok/s own vs 58.5 borrowing), while a
+    // search with the reserve moved the boundary to K=32 and decode to 54.8. STRATA_SPLIT_OWN_PLACE=reserve: the
+    // search sees the reserve.
+    static const bool place_with_reserve = [] {
+        const char* v = std::getenv("STRATA_SPLIT_OWN_PLACE");
+        return v != nullptr && std::string(v) == "reserve";
+    }();
+    auto stage_room = [&](int dev, bool later, bool drafter,
+                          bool search = false) -> int64_t {
         try {
     const strata::core::OnDevice on(dev);
         size_t fb = 0, tb = 0;
@@ -2314,7 +2463,8 @@ int main(int argc, char **argv) try {
         runtimes. You may need to adjust the code.
         */
 
-        const int64_t reserve = ((int64_t) o.vram_reserve_mib + split_pf_mib + (later ? kWindowMib : 0) +
+        const int64_t pf = search && split_own_auto && !place_with_reserve ? 0 : split_pf_mib;
+        const int64_t reserve = ((int64_t) o.vram_reserve_mib + pf + (later ? kWindowMib : 0) +
                                  (drafter ? kDrafterMib : 0)) << 20;
         return std::max<int64_t>((int64_t) fb - reserve, 0);
     }
@@ -2331,7 +2481,7 @@ int main(int argc, char **argv) try {
         std::vector<double> layer_ms((size_t) ns);
         for (int i = 0; i < ns; ++i) {
             const int dev = i == 0 ? 0 : stages[(size_t) i - 1]->dev;
-            cap[(size_t) i] = stage_room(i == 0 ? -1 : dev, i > 0, i + 1 == ns);
+            cap[(size_t) i] = stage_room(i == 0 ? -1 : dev, i > 0, i + 1 == ns, true);
             int sms = 0, khz = 0;
             sms = dpct::get_device(dev).get_max_compute_units();
             if (DPCT_CHECK_ERROR(
@@ -2571,6 +2721,52 @@ int main(int argc, char **argv) try {
     // CUDA error left set by the failed `cudaHostRegister` and read later by `gr_read`'s launch check.  See the
     // note in `pinned.cu`.
     strata::core::FileExpertSource src;
+    {   // the card, and whether this build has code for it (a binary built for other GPUs fails at its first kernel
+        // otherwise, after the whole expert arena has loaded) - before the arena starts loading
+        int dev = 0;
+        dpct::device_info p{};
+        const bool named =
+            DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) == 0 &&
+            DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(p)) == 0;
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        if (!named) 0;
+        const char *name =
+            named && p.get_name()[0] ? p.get_name() : "(an unnamed GPU)";
+#if defined(STRATA_USE_HIP)
+        std::fprintf(stderr, "strata generate: GPU %d: %s (%s)\n", dev, name, named ? p.gcnArchName : "?");
+#else
+        std::fprintf(
+            stderr, "strata generate: GPU %d: %s, compute capability %d.%d%s\n",
+            dev, name,
+            /*
+            DPCT1005: The SYCL device version is different from CUDA Compute
+            Compatibility. You may need to rewrite this code.
+            */
+            strata::cc_major_of(p.get_major_version()),
+            strata::cc_minor_of(p.get_minor_version()),
+            strata::emulated_cc()
+                ? " (STRATA_EMULATE_CC: a test mode, the card is emulated)"
+                : "");
+#endif
+        const std::string e = strata::core::device_code_error();
+        if (!e.empty()) {
+            std::fprintf(
+                stderr,
+                "strata generate: this engine has no code for %s (sm_%d%d): %s "
+                "- rebuild it for this "
+                /*
+                DPCT1005: The SYCL device version is different from CUDA
+                Compute Compatibility. You may need to rewrite this code.
+                */
+                "card (setup does: START-HERE.bat --setup)\n",
+                name, p.get_major_version(), p.get_minor_version(), e.c_str());
+            return 1;
+        }
+    }
     strata::core::ArenaExpertSource arena_src;
     strata::core::GgufExpertSource gguf_src;
     strata::core::ExpertSource* srcp = nullptr;
@@ -2648,7 +2844,13 @@ int main(int argc, char **argv) try {
 #endif
         srcp = &arena_src;
     }
-    strata::kernels::cpu::ExpertPool pool(o.pool_workers, /*pin=*/true, /*host_works=*/!o.no_host_worker);
+    strata::kernels::cpu::ExpertPool pool(o.pool_workers, /*pin=*/true, /*host_works=*/!o.no_host_worker, o.pool_affinity);
+    if (pool.is_hybrid() && pool.affinity() != strata::kernels::cpu::PoolAffinity::All) {
+        const char* aff_str = pool.affinity() == strata::kernels::cpu::PoolAffinity::PCores ? "p-cores" :
+                              pool.affinity() == strata::kernels::cpu::PoolAffinity::All ? "all" : "auto";
+        std::fprintf(stderr, "strata generate: hybrid CPU detected (%d P-cores / %d threads, %d E-cores), pool workers: %d, affinity: %s\n",
+                     pool.p_cores(), pool.p_threads(), pool.e_cores(), pool.workers(), aff_str);
+    }
     if (o.no_ple_prefetch) strata::kernels::ple_prefetch_enable(false);
     // ---- R4's slot storage.  Allocated AFTER the weights and the session, so `cudaMemGetInfo` inside `open`
     // sees the memory this process actually has left rather than the card's idle figure - and refuses with both
@@ -3931,10 +4133,15 @@ int main(int argc, char **argv) try {
                  : (int64_t) (strata::prefill::Prefill::pinned_share() >= 0.9 ? 90 : 85);
     }();
     auto plan_lend = [&](int64_t& chunk) -> int64_t {
-        static constexpr int64_t kAutoChunks[] = {8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
+        // 32768 and 16384 (#282, opt-in: --prefill auto:32768): a 32K prompt with IQ2_XS (RTX 5090, 64K context)
+        // read at 5,624 tok/s in 8192-token chunks and 6,465 in one 32768 chunk (40K -> 18K experts streamed; an
+        // NVFP4 pack at 262K: 3,535 -> 5,201)
+        static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
         auto slots_for = lend_slots;
         if (o.prefill_auto) {
             for (const int64_t c : kAutoChunks) {
+                // above 8192: only when asked for, and only when a prompt of the context can use it
+                if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;
                 const int64_t k = slots_for(c);
                 if (k + 128 <= xcache.slots() && k * 100 <= kAutoLendPct * xcache.slots()) { chunk = c; return k; }
             }
@@ -4033,6 +4240,22 @@ int main(int argc, char **argv) try {
                                      : (uint64_t) (xc.slots() - first) *
                                            (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
         };
+        // #340: a layer split whose caches already hold most experts streams few of them through the prompt path, so
+        // the 384-slot ring (sized for a card that streams nearly every expert of a chunk) only makes every stage's
+        // loan bigger: 96 slots (0.1.30's ring here) when >= 75% of the (layer, expert) pairs are resident.  One GPU
+        // keeps the pinned-share rule.  STRATA_SPLIT_RING=N: N slots on a split; 0: the pinned-share rule.
+        if (multi_gpu && !host_res.empty()) {
+            int64_t res_n = 0;
+            for (const int32_t r : host_res) res_n += r >= 0;
+            const double res_share = (double) res_n / (double) host_res.size();
+            const char* v = std::getenv("STRATA_SPLIT_RING");
+            const int ring = v ? std::atoi(v) : (res_share >= 0.75 ? 96 : 0);
+            if (ring > 0) {
+                strata::prefill::Prefill::set_ring_override(ring);
+                std::fprintf(stderr, "strata serve: layer split: %.0f%% of the experts resident, the prompt path's "
+                                     "streamed ring %d slots\n", 100.0 * res_share, ring);
+            }
+        }
         std::vector<PfPart> pf_parts;
         // a cache too small to lend the prompt path its buffers would make it allocate them on top - on a card
         // whose cache already filled its reserve, that is the over-subscription the auto sizing avoids - so the
@@ -4053,11 +4276,13 @@ int main(int argc, char **argv) try {
                 }
                 return true;
             };
-            static constexpr int64_t kAutoChunks[] = {8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
+            static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
             int64_t chunk = 0;
             if (o.prefill_auto) {
-                for (const int64_t c : kAutoChunks)
+                for (const int64_t c : kAutoChunks) {
+                    if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
                     if (fits(c, true)) { chunk = c; break; }
+                }
             } else {
                 for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
                     if (fits(c, false)) { chunk = c; break; }
@@ -4073,9 +4298,50 @@ int main(int argc, char **argv) try {
                     p.first = (int32_t) (p.cache->slots() - part_slots(p, chunk));
                     p.first_now = p.first;
                 }
+                // #340: a split stage whose card still has room for the chunk's buffers (its cache already holds
+                // every expert of its layers, so auto stopped short of its VRAM) keeps them as its own instead of
+                // borrowing cache slots: nothing of it is lent, streamed during the prompt or refilled after it.
+                // Room = the buffers + 1.5 GiB (the verify windows, the draft head, hipBLAS/cuBLAS workspaces made
+                // after this).  Layer splits only - one GPU keeps its loan exactly as before.
+                // STRATA_SPLIT_OWN_BUFFERS=0: every stage borrows (0.1.30/0.1.31).
+                static const bool own_ok = [] {
+                    const char* v = std::getenv("STRATA_SPLIT_OWN_BUFFERS");
+                    return v == nullptr || v[0] != '0';
+                }();
+                if (pf_parts.size() > 1 && own_ok) {
+                    for (PfPart& p : pf_parts) {
+                        const strata::core::OnDevice on(p.dev);
+                        size_t fb = 0, tb = 0;
+                        /*
+                        DPCT1010: SYCL uses exceptions to report errors and
+                        does not use the error codes. The cudaGetLastError
+                        function call was replaced with 0. You need to rewrite
+                        this code.
+                        */
+                        /*
+                        DPCT1106: 'cudaMemGetInfo' was migrated with the
+                        Intel extensions for device information which may not be
+                        supported by all compilers or runtimes. You may need to
+                        adjust the code.
+                        */
+                        if (DPCT_CHECK_ERROR(
+                                dpct::get_current_device().get_memory_info(
+                                    fb, tb)) != 0) {
+                            (void)0; continue;
+                        }
+                        const uint64_t need = strata::prefill::Prefill::bytes_needed(g, *p.ses, chunk);
+                        if ((uint64_t) fb >= need + (3ull << 29)) {
+                            std::fprintf(stderr, "strata serve:   CUDA%d keeps its own prompt buffers (%.2f GiB of "
+                                                 "%.2f GiB free): no loan\n", p.dev < 0 ? 0 : p.dev,
+                                         (double) need / 1073741824.0, (double) fb / 1073741824.0);
+                            p.first = -1;
+                            p.first_now = -1;
+                        }
+                    }
+                }
                 lend_first = pf_parts[0].first;
-                borrow = xcache.device_slot(lend_first);
-                borrow_bytes = part_bytes(pf_parts[0], lend_first);
+                borrow = lend_first >= 0 ? xcache.device_slot(lend_first) : nullptr;
+                borrow_bytes = lend_first >= 0 ? part_bytes(pf_parts[0], lend_first) : 0;
             } else if (o.prefill_auto) {
                 o.prefill_chunk = 1024;   // nothing lendable: small buffers of its own
             } else if (pf_parts.size() > 1) {
@@ -4094,11 +4360,14 @@ int main(int argc, char **argv) try {
         } else if (o.prefill_auto && d_res == nullptr) {
             o.prefill_chunk = 1024;       // #85: no expert cache at all (a full 8 GB card): small buffers of its own
         }
-        if (borrow != nullptr) {
-            std::fprintf(stderr, "strata serve: the prompt path borrows %lld CUDA0 cache slots (%.2f GiB)\n",
-                         (long long) (xcache.slots() - lend_first), (double) borrow_bytes / 1073741824.0);
+        bool any_loan = borrow != nullptr;
+        for (size_t i = 1; i < pf_parts.size(); ++i) any_loan = any_loan || pf_parts[i].first >= 0;
+        if (any_loan) {
+            if (borrow != nullptr)
+                std::fprintf(stderr, "strata serve: the prompt path borrows %lld CUDA0 cache slots (%.2f GiB)\n",
+                             (long long) (xcache.slots() - lend_first), (double) borrow_bytes / 1073741824.0);
             for (size_t i = 1; i < pf_parts.size(); ++i)   // one loan per stage, from that stage's own cache
-                std::fprintf(stderr, "strata serve:   CUDA%d prompt path borrows %lld of its %lld slots (%.2f GiB)\n",
+                if (pf_parts[i].first >= 0) std::fprintf(stderr, "strata serve:   CUDA%d prompt path borrows %lld of its %lld slots (%.2f GiB)\n",
                              pf_parts[i].dev, (long long) (pf_parts[i].cache->slots() - pf_parts[i].first),
                              (long long) pf_parts[i].cache->slots(),
                              (double) part_bytes(pf_parts[i], pf_parts[i].first) / 1073741824.0);
@@ -4214,15 +4483,15 @@ int main(int argc, char **argv) try {
                 */
                 (void)0;
                 o.prefill_chunk = next;
-                if (borrow != nullptr) {         // smaller loans for the smaller chunk
+                if (any_loan) {                  // smaller loans for the smaller chunk
                     for (PfPart& p : pf_parts)
                         if (p.first >= 0) {
                             p.first = (int32_t) (p.cache->slots() - part_slots(p, next));
                             p.first_now = p.first;
                         }
                     lend_first = pf_parts[0].first;
-                    borrow = xcache.device_slot(lend_first);
-                    borrow_bytes = part_bytes(pf_parts[0], lend_first);
+                    borrow = lend_first >= 0 ? xcache.device_slot(lend_first) : nullptr;
+                    borrow_bytes = lend_first >= 0 ? part_bytes(pf_parts[0], lend_first) : 0;
                 }
                 err.clear();
                 continue;
@@ -4235,6 +4504,55 @@ int main(int argc, char **argv) try {
             return 1;
         }
         mem_mark("the head and the prompt path");
+        // #340: STRATA_SPLIT_SMALL_OWN=S (tokens): on a layer split, every stage that borrows keeps the slots for an
+        // S-token chunk's buffers for the whole session (0.1.29's own buffers, carved from the tail of its cache):
+        // a request of at most S prompt tokens then lends, streams and refills nothing, a longer one lends (and
+        // refills) only the slots above them.  Their experts stay non-resident (the CPU / PCIe path computes them).
+        // STRATA_SPLIT_SMALL_MAX=M: a request of at most M prompt tokens reads in S-token chunks on those stages
+        // (several chunks, still nothing lent) instead of borrowing for a bigger one.
+        int64_t split_small = 0, split_small_max = 0;
+        if (multi_gpu && !pf_parts.empty() && !host_res.empty()) {
+            const char* v = std::getenv("STRATA_SPLIT_SMALL_OWN");
+            const int64_t S = v ? request_chunk(std::atoll(v), o.prefill_chunk) : 0;
+            const char* vm = std::getenv("STRATA_SPLIT_SMALL_MAX");
+            split_small = S;
+            split_small_max = S > 0 ? std::max<int64_t>(S, vm ? std::atoll(vm) : S) : 0;
+            int64_t evicted = 0;
+            for (PfPart& p : pf_parts) {
+                if (S <= 0 || p.first < 0) continue;
+                const int32_t first_s = std::max<int32_t>(p.first, (int32_t) (p.cache->slots() - part_slots(p, S)));
+                int64_t n = 0;
+                for (int64_t l = p.lb; l < p.le; ++l)
+                    for (int64_t ex = 0; ex < g.n_expert; ++ex) {
+                        int32_t& r = host_res[(size_t) (l * g.n_expert + ex)];
+                        if (r >= first_s) { r = strata::core::kNotResident; ++n; }
+                    }
+                evicted += n;
+                std::fprintf(stderr, "strata serve:   CUDA%d keeps %lld slots for %lld-token prompts (%lld experts "
+                                     "no longer resident)\n", p.dev < 0 ? 0 : p.dev,
+                             (long long) (p.cache->slots() - first_s), (long long) S, (long long) n);
+            }
+            if (evicted > 0) {
+                if (d_res != nullptr)
+                    /*
+                    DPCT1114: cudaMemcpy is migrated to asynchronization
+                    memcpy, assuming in the original code the source host memory
+                    is pageable memory. If the memory is not pageable, call
+                    wait() on event return by memcpy API to ensure
+                    synchronization behavior.
+                    */
+                    dpct::get_in_order_queue().memcpy(d_res, host_res.data(),
+                                                      host_res.size() *
+                                                          sizeof(int32_t)).wait();
+                for (auto& st : stages) {
+                    const strata::core::OnDevice on(st->dev);
+                    dpct::get_in_order_queue()
+                        .memcpy(st->d_res, host_res.data(),
+                                host_res.size() * sizeof(int32_t))
+                        .wait();
+                }
+            }
+        }
         // the penalty-history buffer: one row per verify-window row (`penalty_rows`), each the last
         // `penalty_last_n` tokens that row's pick follows, -1 padded in front.  Allocated once at the cap for
         // the widest window; a request without penalties gets a null buffer and takes the byte-for-byte
@@ -4392,11 +4710,17 @@ int main(int argc, char **argv) try {
                 estimate = fresh_estimate;
                 err.clear();
             }
-            if (!reuse.kv.empty() && !conversations.can_fit(estimate, held)) {
-                // Optional growth capacity must not evict useful conversations.
-                reuse = {};
-                estimate = fresh_estimate;
-            }
+            // A park carrying its own retained K/V replaces memory the cache
+            // already held, so capacity is make_room's call - it runs next either
+            // way, and put()'s accounting still bounds the budget. The with-reuse
+            // estimate must stay uncapped: it counts the retained buffers'
+            // capacity and directories, and put() charges that same true size -
+            // a capped figure would under-evict and overfill the budget.
+            // #342: before make_room evicts oldest-first, the copies of this conversation a turn back go (they hold
+            // nothing the outgoing chain does not, apart from the tail this conversation rewrote)
+            if (const size_t dropped = conversations.drop_superseded(live, live_imgs, checks, cvec_cached))
+                std::fprintf(stderr, "strata serve: conversation cache: dropped %zu superseded cop%s of this "
+                             "conversation; parked=%zu\n", dropped, dropped == 1 ? "y" : "ies", conversations.size());
             if (!conversations.make_room(estimate, held)) {
                 std::fprintf(stderr, "strata serve: conversation cache: skip parking (snapshot %zu MiB exceeds available budget)\n",
                              estimate >> 20);
@@ -5077,6 +5401,13 @@ int main(int argc, char **argv) try {
                 return imgs_below(req_imgs, L) == pre_imgs;
             };
             const bool want_cvec = strata::kernels::cvec().loaded() ? req_cvec != 0 : true;
+            // the last request's final commit may still be running on the verifier's stream (set_commit_async):
+            // everything below reads, restores or zeroes the session from other streams and the host (the end of the
+            // last request waited already; this covers a request that ended on an error path)
+            if (!ver.wait_commit(err)) {
+                std::printf("ERR %s\n", err.c_str());
+                return 1;
+            }
             int64_t resume = 0;
             bool from_live = false;
             if (o.prompt_cache > 0 && want_cvec == cvec_cached) {
@@ -5268,6 +5599,8 @@ int main(int argc, char **argv) try {
                     if (!ver.commit(T, e) || !mtp.prefill(ver.final_R_all(), nxt.data(), T, q, e)) return false;
                     q += T;
                 }
+                // the batched prompt path (other streams), checkpoints and snapshots may follow: the last commit first
+                if (!ver.wait_commit(e)) return false;
                 const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
                 std::printf("PP %lld %lld %.0f %.1f\n", (long long) b, (long long) pp_total, ms,
                             ms > 0.0 ? 1000.0 * (double) (b - pp_from) / ms : 0.0);
@@ -5281,8 +5614,8 @@ int main(int argc, char **argv) try {
             // the arena, the residency table is restored, and one upload puts it on every device.  A stage refills
             // through its own cache and its own device - a slot refilled into the wrong cache would leave that
             // stage's cache holding an expert it does not own, which is silent and produces plausible tokens.
-            auto refill_one = [&](PfPart& p, std::string& e) -> bool {
-                if (p.lent.empty()) return true;
+            // (split in two halves so a layer split can queue every stage's copies before it waits for any: #340)
+            auto refill_issue = [&](PfPart& p, std::string& e) -> bool {
                 tr("refill start", (long long) p.lent.size());
                 const strata::core::OnDevice on(p.dev);
                 size_t queued = 0;
@@ -5296,16 +5629,44 @@ int main(int argc, char **argv) try {
                     // SYCL port: drain before GgufExpertSource's 512-buffer blob ring can wrap onto a queued copy
                     if (!refill_blocking() && ++queued % 256 == 0 && !p.cache->sync_queued(e)) return false;
                 }
+                return true;
+            };
+            auto refill_wait = [&](PfPart& p, std::string& e) -> bool {
+                const strata::core::OnDevice on(p.dev);
                 if (!p.cache->sync_queued(e)) return false;
                 p.lent.clear();
                 p.lent_chunk = 0;
                 return true;
             };
+            auto refill_one = [&](PfPart& p, std::string& e) -> bool {
+                if (p.lent.empty()) return true;
+                return refill_issue(p, e) && refill_wait(p, e);
+            };
+            // #340: with several stages every stage's copies go out first (each card on its own link), then each is
+            // waited for - the same copies into the same slots, so the same cache; one stage: refill_one exactly.
+            // STRATA_REFILL_SERIAL=1: stage after stage, as 0.1.30/0.1.31.
+            static const bool refill_serial = std::getenv("STRATA_REFILL_SERIAL") != nullptr;
             auto refill = [&](std::string& e) -> bool {
-                bool any = false;
+                const auto t_rf = Clock::now();
+                int64_t n_lent = 0, n_parts = 0;
                 for (PfPart& p : pf_parts)
-                    if (!p.lent.empty()) { any = true; if (!refill_one(p, e)) return false; }
-                if (any) res_upload();
+                    if (!p.lent.empty()) { n_lent += (int64_t) p.lent.size(); ++n_parts; }
+                if (n_parts > 1 && !refill_serial) {
+                    for (PfPart& p : pf_parts)
+                        if (!p.lent.empty() && !refill_issue(p, e)) return false;
+                    for (PfPart& p : pf_parts)
+                        if (!p.lent.empty() && !refill_wait(p, e)) return false;
+                } else {
+                    for (PfPart& p : pf_parts)
+                        if (!p.lent.empty() && !refill_one(p, e)) return false;
+                }
+                if (n_parts > 0) res_upload();
+                if (trace && n_parts > 0) {
+                    std::fprintf(stderr, "strata trace: refilled %lld slots on %lld stage(s) in %.1f ms\n",
+                                 (long long) n_lent, (long long) n_parts,
+                                 std::chrono::duration<double, std::milli>(Clock::now() - t_rf).count());
+                    std::fflush(stderr);
+                }
                 return true;
             };
             // lend the slots `tokens` batched prompt tokens need: the prompt path's buffers for min(chunk, tokens
@@ -5313,9 +5674,13 @@ int main(int argc, char **argv) try {
             // participant's own cache, and marking only that participant's own layers
             auto lend = [&](int64_t tokens, std::string& e) -> bool {
                 if (pf_parts.empty()) return true;                     // its own buffers: nothing to lend
+                const auto t_ln = Clock::now();
                 // what this segment needs, capped by the configured chunk: a request lends only what its own
                 // prompt needs, so a large chunk costs a short prompt nothing
-                const int64_t want = request_chunk(tokens, o.prefill_chunk);
+                const int64_t want_full = request_chunk(tokens, o.prefill_chunk);
+                // #340: a short enough request reads in the stages' own S-token chunks (nothing lent)
+                const int64_t want = split_small > 0 && tokens <= split_small_max ? std::min(want_full, split_small)
+                                                                                 : want_full;
                 if (want <= 0) {
                     e = "prefill: cannot lend buffers for an empty request segment";
                     return false;
@@ -5348,6 +5713,13 @@ int main(int argc, char **argv) try {
                     p.lent_chunk = want;
                 }
                 if (any) res_upload();
+                if (trace) {
+                    int64_t n_lent = 0;
+                    for (const PfPart& p : pf_parts) n_lent += (int64_t) p.lent.size();
+                    std::fprintf(stderr, "strata trace: lent %lld slots for %lld tokens in %.1f ms\n", (long long) n_lent,
+                                 (long long) want, std::chrono::duration<double, std::milli>(Clock::now() - t_ln).count());
+                    std::fflush(stderr);
+                }
                 return true;
             };
             apply_pending(true);
@@ -5598,6 +5970,11 @@ int main(int argc, char **argv) try {
                 p += a + 1;
             }
             const double decode_ms = std::chrono::duration<double, std::milli>(Clock::now() - d0).count();
+            // the last commit (set_commit_async): the session is complete before anything reads or copies it
+            if (!ver.wait_commit(err)) {
+                std::printf("ERR %s\n", err.c_str());
+                return 1;
+            }
             if (dec_timing && dec_windows > 0) {
                 const DecSnap d1 = dec_snap();
                 const double w = (double) dec_windows, L = (double) g.n_layers;
@@ -6472,6 +6849,16 @@ int main(int argc, char **argv) try {
             if (first_window) {
                 first_window = false;
                 ttft_ms = std::chrono::duration<double, std::milli>(Clock::now() - t_start).count();
+                // Diagnostics: the first window runs the prompt's last token over the state the prompt path left
+                // (keys, values, recurrent state), so its logits carry whatever that path did. A native pack never
+                // runs the per-token loop --dump-logits reads; this is where prompt paths can be compared by output.
+                if (const char* fl = std::getenv("STRATA_DUMP_FIRST_LOGITS")) {
+                    std::vector<float> row((size_t) ver.vocab());
+                    std::FILE* f = ver.copy_logits(0, row.data()) ? std::fopen(fl, "wb") : nullptr;
+                    if (f == nullptr || std::fwrite(row.data(), sizeof(float), row.size(), f) != row.size())
+                        std::fprintf(stderr, "strata generate: STRATA_DUMP_FIRST_LOGITS: cannot write %s\n", fl);
+                    if (f) std::fclose(f);
+                }
             }
             // plan v0.3 P6: the adaptive tier's host work (ranking, copy submission) runs on its own thread while the
             // GPU commits and drafts; it touches only the residency tables, which nothing reads until the next window
@@ -6521,6 +6908,11 @@ int main(int argc, char **argv) try {
                 std::fprintf(stderr, "strata generate: position %lld, %lld tokens, %lld rounds\n", (long long) p,
                              (long long) produced.size(), (long long) rounds);
         }
+        // the last commit (set_commit_async) before anything reads the session again
+        if (!ver.wait_commit(err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
         std::printf("%-24s %lld rounds of %d, drafts accepted %lld of %lld (%.3f), %.2f tokens per round\n",
                     "speculation", (long long) rounds, o.spec, (long long) drafts_ok, (long long) drafts_total,
                     drafts_total > 0 ? (double) drafts_ok / (double) drafts_total : 0.0,
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 453cd364a5d..02caddfdca4 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -99,6 +99,10 @@ def doorbell(s):
 # 0.1.31: dp4a.hpp's spin pause is __nanosleep, which SYCL lacks: the bounded spin (kSpinMax) is the backoff
 edit("include/strata/kernels/dp4a.hpp", lambda s: s.replace("    __nanosleep(100);\n",
      "    // SYCL port: no __nanosleep; the doorbell waits are bounded by strata::kSpinMax instead\n"))
+# 0.1.31/0.1.32: fused_gr's per-block shared-memory query stays CUDA (dpct leaves the attribute untranslated)
+edit("src/kernels/cuda/fused_gr.dp.cpp", lambda s: s.replace(
+    "        cudaDeviceGetAttribute(&per_block, cudaDevAttrMaxSharedMemoryPerBlock, dev);\n",
+    "        per_block = (int) dpct::get_device(dev).get_local_mem_size();   // SYCL: the work-group local memory\n"))
 edit("src/kernels/cuda/elementwise.dp.cpp", doorbell)
 edit("src/kernels/cuda/verify_kernels.dp.cpp", doorbell)
 

From bf8e11da89f5b60b6742fa9a7bd69b1732d09201 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 19:58:53 -0500
Subject: [PATCH 054/201] sycl: fix the prompt-slot borrow hang (stager event
 wait under L0 v2); borrow above 32K again

The hang was in the streamed-expert prompt path, which borrowing is the only
way to reach on the Coder: the stager threads waited on the copy queue's
events to reuse their 16 page-locked buffers, and under the Level Zero v2
adapter that left another queue's barrier on the same event waiting forever
once the ring wrapped. The copy queue now writes a sequence number into
page-locked memory after each DMA and the stager polls it.

- prefill.cpp: Stager::issued_one / buffer_free; STRATA_PREFILL_SYNC=1 debug
  switch (wait and log after every phase)
- generate.cpp: borrowing is the default above a 32K context again

Tested on the B70: 40K prompt with borrowing 1,117-1,144 tok/s, decode 69
(output identical to the run without borrowing); 128K int8/q4_0/k8v4 decode
66.6/62.8/66.8 (from 59.5/53.4/54.4), 256K 55.9/51.7/52.2 (from
48.7/43.2/42.3); Coder and IQ2_XS 32K outputs unchanged.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 | 50 ++++++++++++++++++++++-------------
 sycl/src/prefill/prefill.cpp  | 37 +++++++++++++++++++++++---
 sycl/src/program/generate.cpp |  9 ++++---
 3 files changed, 69 insertions(+), 27 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 28ad6f85e8a..a40cf2718a6 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -20,11 +20,11 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 | model files | the same GGUFs | the same GGUFs + a native pack | the same GGUFs |
 | where the model lives | experts in RAM, hot ones on the card | every expert in VRAM (`--stream-experts`: no host copy), shard 2's lookup table read from the SSD by row | all of shard 1 on the card, shard 2 paged from disk |
 | RAM needed | 32-64 GB | little (23 GB is fine) | little (23 GB is fine) |
-| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **78.2 tok/s** (19-token prompt, 256 greedy tokens), **75.7** after a 2,184-token prompt, 59.5 after 128K, 48.7 after 256K; 48-72 through the API | 23-25 tok/s |
-| prompt reading | ~1,870 tok/s | **780 tok/s** at 2,184 tokens, 1,189 at 40K, 934 at 128K, 784 at 256K | ~150 tok/s (424 at 105K) |
+| decode, Coder IQ1_M | 44-51 tok/s on an RTX 5070 | **78.2 tok/s** (19-token prompt, 256 greedy tokens), **75.7** after a 2,184-token prompt, 69 after 40K, 66.6 after 128K, 55.9 after 256K; 48-72 through the API | 23-25 tok/s |
+| prompt reading | ~1,870 tok/s | **790 tok/s** at 2,184 tokens, 1,117 at 40K, 888 at 128K, 757 at 256K | ~150 tok/s (424 at 105K) |
 | speculative decoding (MTP) | yes | yes (the base checkpoint's draft layer; 70-85% of drafts accepted on code) | no |
 | images | yes | not yet | not yet |
-| context | up to 262K | 256K measured, 49 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
+| context | up to 262K | 256K measured, 56 tok/s decode there (`--kv-resident`: the KV in pinned host memory, the attended window in VRAM) | 131K measured ceiling |
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
 on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
@@ -282,22 +282,23 @@ output tokens between paths, never only timings.
   It costs ~1 s on short prompts (2,184 tokens: 610 vs 792 tok/s), so the port borrows by default only above a
   32K context (`--prefill-borrow` / `--no-prefill-borrow` decide explicitly).
 
-**Long contexts (2026-10-01, engine 0.1.31-sycl, setup's flags: `--kv-resident 32768 --vram-reserve-mib 2048
---prefill 4096`, prompt-slot borrowing off - see the 0.1.31 merge below).** Same text repeated to length, then 256
-greedy tokens:
+**Long contexts (2026-10-01, engine 0.1.32-sycl, setup's flags: `--kv-resident 32768 --vram-reserve-mib 2048
+--prefill 4096`, the prompt path borrowing cache slots - the default above 32K).** Same text repeated to length,
+then 256 greedy tokens:
 
 | context | KV | prompt | decode after | peak VRAM | experts in the host mirror |
 |---|---|---|---|---|---|
-| 128K | int8 | 934 tok/s (137 s) | **59.5 tok/s** | 29.7 GB | 1,040 (2.0 GB) |
-| 128K | q4_0 | 887 tok/s (144 s) | 53.4 tok/s | 29.3 GB | 1,073 |
-| 128K | k8v4, KV in VRAM | **1,026 tok/s** (125 s) | 54.4 tok/s | 29.5 GB | 1,523 (2.9 GB) |
-| 256K | int8 | 784 tok/s (327 s) | **48.7 tok/s** | 29.7 GB | 1,288 (2.5 GB) |
-| 256K | q4_0 | 763 tok/s (336 s) | 43.2 tok/s | 29.6 GB | 1,188 |
-| 256K | k8v4, KV in VRAM | 838 tok/s (305 s) | 42.3 tok/s | 29.5 GB | 2,327 (4.5 GB) |
-
-Before the merge, with borrowing (every expert in VRAM): 128K int8 856 / 66.1, 256K int8 740 / 54.1 tok/s. Without
-borrowing the prompt buffers keep their own VRAM, ~1,000-2,300 experts move to the pinned host mirror (planned item
-2) and decode pays ~10-17% for reading them over PCIe; the prompt is 4-9% faster.
+| 128K | int8 | 888 tok/s (144 s) | **66.6 tok/s** | 29.9 GB | none |
+| 128K | q4_0 | 848 tok/s (151 s) | 62.8 tok/s | 29.7 GB | none |
+| 128K | k8v4, KV in VRAM | **1,006 tok/s** (127 s) | **66.8 tok/s** | 30.7 GB | 103 (0.2 GB) |
+| 256K | int8 | 757 tok/s (338 s) | **55.9 tok/s** | 30.2 GB | none |
+| 256K | q4_0 | 737 tok/s (347 s) | 51.7 tok/s | 30.0 GB | none |
+| 256K | k8v4, KV in VRAM | 823 tok/s (311 s) | 52.2 tok/s | 30.9 GB | 865 (1.7 GB) |
+
+Borrowing keeps every expert in VRAM (the prompt buffers live in lent cache slots, refilled after the prompt).
+Without it (`--no-prefill-borrow`) the buffers keep their own VRAM and ~1,000-2,300 experts move to the pinned host
+mirror: the prompt is 2-5% faster, decode after it 10-23% slower (0.1.31 without borrowing: 128K int8 934 / 59.5,
+q4_0 887 / 53.4, k8v4 1,026 / 54.4; 256K int8 784 / 48.7, q4_0 763 / 43.2, k8v4 838 / 42.3 tok/s).
 
 KV streaming (`--kv-resident`) keeps the whole KV in pinned host memory and only the attended window in VRAM, so
 the KV pushes no experts out; setup.py turns it on from 64K up and keeps INT8 (the faster of the
@@ -470,9 +471,8 @@ part of the procedure now: it caught a dropped mirror hook and four doorbell wai
   group); the port's grid is sized for its own kernels (8 lanes a row, 32 rows a group), so only a quarter of each
   expert's rows were written and the output was end-of-text tokens. The port's kernels stay the default (they also
   serve upstream's new Q4_K/Q5_K/Q5_1/Q8_0 experts); `STRATA_EXPERT_SPLIT=1` runs upstream's, with their grid.
-- **Prompt-slot borrowing hangs** in the first chunk of any prompt with it on (40K, 128K; GPU busy, no chunk ends)
-  since upstream's borrow rework. Off by default on SYCL (`--prefill-borrow` opts in); long prompts are faster
-  without it, decode after them ~10-17% slower (the table above). Open.
+- **Prompt-slot borrowing hung** in the first chunk of any prompt with it on (40K, 128K; GPU busy) - fixed after
+  the 0.1.32 merge, see "Prompt-slot borrowing: the hang" below.
 - **Upstream's new tests found three dpct mistranslations from the first migration.** dpct writes `__fadd_rn(a, b)`
   as `a + b` without parentheses, so `__fadd_rn(sum, c ? x : y)` became `sum + c ? x : y` (replaced, not added): in
   the native QSA indexer's per-token pooled key (the decode path: blocks completed while generating got wrong
@@ -507,6 +507,18 @@ files with real conflicts. What it needed:
   `kv_hybrid_parity` and `qsa_prompt_attn_parity` pass (the tests now turn on the XMX prompt attention they
   check); `iq_multi_parity` (IQ2_XS) and `s2_expert_grouped_parity` as before.
 
+**Prompt-slot borrowing: the hang (fixed 2026-10-01).** From 0.1.31 on, a prompt that borrowed cache slots stopped
+in its first full chunk with the GPU at 100% and the host waiting on the compute queue. It was never a borrowing
+bug: borrowing is just the only way the Coder streams experts during a prompt (every expert is resident otherwise),
+and the streamed path's stager deadlocked. Its threads read experts into a ring of 16 page-locked buffers and, to
+reuse one, waited on the copy queue's event for the DMA that last read it (the CUDA form, `cudaEventSynchronize`).
+Under the Level Zero v2 adapter that event, once a host thread had waited on it, no longer released the other
+queue's barrier that also listed it, and the GPU waited forever - only once a layer streamed more than 16 experts
+(the ring wrapped). The v1 adapter (`SYCL_UR_USE_LEVEL_ZERO_V2=0`) and a 256-buffer ring both ran; so did a sync
+after every phase (`STRATA_PREFILL_SYNC=1`, kept as a debug switch). The fix: the copy queue writes a sequence
+number into page-locked host memory after each DMA and the stager polls it - no host thread waits on a queue's
+event. Output is bit-identical to the run without borrowing; borrowing is the default above 32K again.
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 53542f5784d..c0322e962cb 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -190,6 +190,9 @@ struct Stager {
     std::vector<char> pinned;
     std::vector<std::vector<uint8_t>> pageable;   // the fallback when no more RAM can be pinned
     std::vector<dpct::event_ptr> dma_done;
+    uint64_t* done_seq = nullptr;            // page-locked: the copy queue's last finished DMA per buffer
+    std::vector<uint64_t> want;              // the sequence number each buffer's last DMA writes
+    uint64_t issue_seq = 0;
     std::vector<Job> jobs;
     std::unique_ptr<std::atomic<int>[]> ready;
     size_t ready_cap = 0;
@@ -209,6 +212,10 @@ struct Stager {
         buf.assign((size_t) kRing, nullptr);
         pinned.assign((size_t) kRing, 0);
         dma_done.assign((size_t) kRing, nullptr);
+        want.assign((size_t) kRing, 0);
+        done_seq = sycl::malloc_host<uint64_t>((size_t) kRing, dpct::get_in_order_queue());
+        if (done_seq == nullptr) return false;
+        for (int i = 0; i < kRing; ++i) done_seq[i] = 0;
         pageable.resize(kRing);
         for (int i = 0; i < kRing; ++i) {
             /*
@@ -239,6 +246,7 @@ struct Stager {
         { std::lock_guard<std::mutex> lk(mu); quit = true; }
         cv.notify_all();
         for (auto& t : threads) t.join();
+        if (done_seq) sycl::free(done_seq, dpct::get_in_order_queue());
         for (int i = 0; i < kRing; ++i) {
             if (dma_done[i]) dpct::destroy_event(dma_done[i]);
             if (buf[i] && pinned[i])
@@ -266,7 +274,7 @@ struct Stager {
                 const int b = j % kRing;
                 if (j >= kRing) {
                     while (issued.load(std::memory_order_acquire) <= j - kRing) std::this_thread::yield();
-                    dma_done[b]->wait_and_throw();
+                    while (!buffer_free(b)) std::this_thread::yield();
                 }
                 const Job& jb = jobs[(size_t) j];
                 if (jb.gsrc != nullptr) {
@@ -315,10 +323,21 @@ struct Stager {
         return buf[j % kRing];
     }
     /// The launching thread queued job j's DMA on `copy`: its buffer is free once that is done.
+    /// The launching thread queued job j's DMA on `copy`: its buffer is free once that is done.
+    // SYCL port: the copy queue writes a sequence number into page-locked host memory after the DMA and the stager
+    // thread polls it, instead of waiting on an event. A stager thread's host wait on the copy queue's events (the
+    // CUDA form, cudaEventSynchronize) hung a lent-slot prompt in its first full chunk under the Level Zero v2 adapter
+    // once the ring wrapped: no thread was waiting by then, the GPU sat busy - the event a host thread had waited on
+    // was still in a queue's wait list (the v1 adapter and a 256-buffer ring, which never waits, both ran). 2026-10-01
     void issued_one(int j, dpct::queue_ptr copy) {
-        dpct::sync_barrier(dma_done[j % kRing], copy);
+        const uint64_t s = ++issue_seq;
+        want[(size_t) (j % kRing)] = s;
+        copy->fill<uint64_t>(done_seq + j % kRing, s, 1);
         issued.store(j + 1, std::memory_order_release);
     }
+    bool buffer_free(int b) const {
+        return *(volatile const uint64_t*) (done_seq + b) >= want[(size_t) b];
+    }
     /// No job is running after this (the end of a layer, or an early return in the middle of one).
     void finish() {
         head.store((uint64_t) gen << 32, std::memory_order_release);   // n = 0: nothing more to claim
@@ -1118,7 +1137,18 @@ struct PfTimer {
     std::vector<int> ph;
     size_t used = 0;
     double ms[kPfCount] = {};
+    // STRATA_PREFILL_SYNC=1 (debug): wait for the GPU at every mark and log the phase that just finished, so a hang
+    // names the stage that never completes
+    bool sync = std::getenv("STRATA_PREFILL_SYNC") != nullptr;
+    long long n_sync = 0;
     void mark(int phase, dpct::queue_ptr s) {
+        if (sync) {
+            const auto t0 = std::chrono::steady_clock::now();
+            s->wait();
+            std::fprintf(stderr, "strata prefill sync: mark %lld phase %s done (waited %.1f ms)\n", ++n_sync,
+                         phase < kPfCount ? kPfNames[phase] : "?",
+                         std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t0).count());
+        }
         if (!on) return;
         if (used == ev.size()) {
             dpct::event_ptr e = nullptr;
@@ -2072,8 +2102,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             return by memcpy API to ensure synchronization
                             behavior.
                             */
-                            m.copy->memcpy(m.stage_dev[sl], hb,
-                                           (size_t)lay.blob_bytes(l));
+                            m.copy->memcpy(m.stage_dev[sl], hb, (size_t)lay.blob_bytes(l));
                             m.stager->issued_one(job_of[j], m.copy);
                         }
                         dpct::sync_barrier(m.copied[sl], m.copy);
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 926e1d1a0b9..c79ff935a16 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -1486,10 +1486,11 @@ int main(int argc, char **argv) try {
     // 610 vs 792 tok/s) but is what keeps every expert in VRAM at a long context - 80,000 tokens without it: the
     // reserve for the KV and the chunk buffers evicts ~1,900 experts, prompt 790 tok/s and decode 2 tok/s after it;
     // with it: 1,062 tok/s and 39.5 tok/s. So by default only above a 32K context; the flags still decide.
-    // SYCL port (0.1.31 merge): borrowing hangs in the first chunk of a long prompt (GPU busy, no chunk ever finishes;
-    // 2026-10-01, 40K and 128K prompts, with and without --kv-resident) since upstream's borrow rework; without it the
-    // same prompts read at 1,017-1,189 tok/s. Off by default until that is found; --prefill-borrow opts in.
-    if (!borrow_explicit) o.no_prefill_borrow = true;
+    // (0.1.31-0.1.32: borrowing hung in the first chunk of a long prompt; the prompt path's stager waited on the copy
+    // queue's events from its own threads, which the Level Zero v2 adapter did not survive once its ring wrapped -
+    // prefill.cpp, Stager::issued_one. Fixed 2026-10-01: a 40K prompt borrowing reads at 1,144 tok/s and decodes at
+    // 69 tok/s after it, against 1,201 / 65 with its own buffers.)
+    if (!borrow_explicit) o.no_prefill_borrow = o.max_context <= 32768;
 #if defined(STRATA_USE_HIP)
     {
         // every GPU this run uses must be an architecture the binary has code for (a gfx1100 build on a gfx1201

From 26f805681be4f3764cb872c330f78891d669dfd3 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 20:26:24 -0500
Subject: [PATCH 055/201] sycl: port upstream 0.1.33 (re-migration of its six
 engine files)

expert_cache.cpp, expert_source.cpp, fused_gr, qsa_prompt_attn, gr_parity and
generate.cpp merged from a fresh dpct of c499bd1 and aeb35be; files that only
differed by dpct run-to-run noise left alone. Conflicts: --resident-cpu-experts
(upstream's resident_cpu_explicit kept with --stream-experts) and the prompt
attention's capability check (the port's XMX dispatch kept). Version 0.1.33.

Tested on the B70: build clean; gr_parity and qsa_prompt_attn_parity pass;
Coder short/long, IQ2_XS and the 40K prompt (borrowing) outputs identical,
78.3 / 75.7 / 58.0 / 68.9 tok/s. setup_intel.py --check and an install run, and
server_intel.py with the mock engine, against the new setup.py / server.py.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                |   8 ++
 sycl/CMakeLists.txt                          |   2 +-
 sycl/src/core/expert_cache.cpp               |   7 +
 sycl/src/core/expert_source.cpp              |  19 ++-
 sycl/src/kernels/cuda/fused_gr.dp.cpp        |  13 +-
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp |  28 ++--
 sycl/src/kernels/gr_parity.cpp               |  18 ++-
 sycl/src/program/generate.cpp                | 140 +++++++++++--------
 8 files changed, 153 insertions(+), 82 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index a40cf2718a6..9e8c9e67477 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -507,6 +507,14 @@ files with real conflicts. What it needed:
   `kv_hybrid_parity` and `qsa_prompt_attn_parity` pass (the tests now turn on the XMX prompt attention they
   check); `iq_multi_parity` (IQ2_XS) and `s2_expert_grouped_parity` as before.
 
+**The 0.1.33 merge (2026-10-01).** Upstream 0.1.32 -> 0.1.33 (17 commits): no shared file conflicted (the Intel
+code is all in `sycl/`); six engine files changed upstream and were merged by the same re-migration (only those six:
+the other files dpct produced differently were left alone). Two conflicts: `--resident-cpu-experts` (upstream's new
+`resident_cpu_explicit` beside the port's `--stream-experts`) and the prompt attention's compute-capability check
+(the port keeps its XMX dispatch). `sycl/setup_intel.py` and `sycl/serve/server_intel.py` ran unchanged against the
+new setup.py and server.py. Every output identical (Coder, IQ2_XS, the 40K prompt with borrowing); `gr_parity` and
+`qsa_prompt_attn_parity` pass.
+
 **Prompt-slot borrowing: the hang (fixed 2026-10-01).** From 0.1.31 on, a prompt that borrowed cache slots stopped
 in its first full chunk with the GPU at 100% and the host waiting on the compute queue. It was never a borrowing
 bug: borrowing is just the only way the Coder streams experts during a prompt (every expert is resident otherwise),
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 6444dd872a9..1bda26d6528 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.32 LANGUAGES C CXX)   # the upstream engine version this port tracks
+project(strata_sycl VERSION 0.1.33 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
index 32e167307a5..ac0459beee9 100644
--- a/sycl/src/core/expert_cache.cpp
+++ b/sycl/src/core/expert_cache.cpp
@@ -209,7 +209,14 @@ bool ExpertCache::open_sized(const std::vector<int64_t>& slot_bytes, int64_t n_l
         return false;
     }
 #endif
+    // #369: each layer's cursor at the bottom of its own range, as open() seeds it - open() above ran on byte-sized
+    // "slots", so its seeds are not slot indices
     layer_next_.assign((size_t) (n_layers > 0 ? n_layers : 0), 0);
+    for (int64_t l = 0; l < n_layers; ++l) {
+        int64_t lo = 0, hi = 0;
+        layer_slot_range(l, lo, hi);
+        layer_next_[(size_t) l] = (int32_t) lo;
+    }
     return true;
 }
 
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index efab717c96c..6ba5598e945 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -1054,6 +1054,7 @@ bool FileExpertSource::pin_cache_complement(
     uint64_t bytes = 0;
     if (!detail::make_cache_complement_plan(n_layers_, n_expert_, layer_blob_bytes_, primary_gpu_pairs,
                                             additional_gpu_pairs, offsets, bytes, err)) return false;
+    uint64_t budget_physical = 0;   // #403: the RAM reading a budget was sized from (0: no budget)
     if (budget_bytes > 0) {
         // CS-T: a RAM budget.  The complement's experts in `rank` order (the expert profile, hottest first) while
         // they fit, the rest left on the mapped files; clamped to what the RAM has room for.
@@ -1062,13 +1063,19 @@ bool FileExpertSource::pin_cache_complement(
             err = "FileExpertSource: cannot determine available RAM for --resident-budget-gib";
             return false;
         }
+        budget_physical = physical;
         const uint64_t room = physical > headroom_bytes ? physical - headroom_bytes : 0;
         if (budget_bytes > room) {
+            // #403: 256 MiB under the room, so the engine's own allocations after this reading still leave the
+            // headroom (a budget clamped to exactly the room failed the safety check below on a reading a few MB
+            // lower).  An unclamped budget is unchanged.
+            const uint64_t margin = 256ull << 20;
+            const uint64_t clamped = room > margin ? room - margin : 0;
             std::fprintf(stderr, "FileExpertSource: --resident-budget-gib %.2f is more than the RAM has room for "
-                                 "(%.2f GiB available minus %.0f GiB headroom): %.2f GiB\n",
+                                 "(%.2f GiB available minus %.0f GiB headroom and a 0.25 GiB margin): %.2f GiB\n",
                          (double) budget_bytes / 1073741824.0, (double) physical / 1073741824.0,
-                         (double) headroom_bytes / 1073741824.0, (double) room / 1073741824.0);
-            budget_bytes = room;
+                         (double) headroom_bytes / 1073741824.0, (double) clamped / 1073741824.0);
+            budget_bytes = clamped;
         }
         std::vector<uint64_t> ranked(offsets.size(), kNoComplement);
         uint64_t at = 0;
@@ -1095,8 +1102,10 @@ bool FileExpertSource::pin_cache_complement(
     const bool lend = lend_from_slot >= 0 && lend_from_slot < n_slots && additional_gpu_pairs.empty();
     uint64_t budget = std::numeric_limits<uint64_t>::max();
     if (bytes > 0 || lend) {
-        uint64_t physical = 0;
-        if (!available_memory_bytes(physical)) {
+        // #403: with a budget, the reading it was sized from - a second reading a few MB lower (the engine's own
+        // allocations, the file cache) failed a budget the first one had clamped.  (A budget turns `lend` off.)
+        uint64_t physical = budget_physical;
+        if (physical == 0 && !available_memory_bytes(physical)) {
             err = "FileExpertSource: cannot determine available RAM for the resident-memory safety check";
             return false;
         }
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 2a9f35b984f..32fe61a495c 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -1545,14 +1545,11 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
                 */
                 0 == 0)
                 split = 1;
-            else if (need2 <= limit &&
-                     /*
-                     DPCT1027: The call to cudaFuncSetAttribute was replaced
-                     with 0 because SYCL currently does not support
-                     corresponding setting.
-                     */
-                     0 == 0)
-                split = 2;
+            else if (need2 <= limit)
+                // #375 (kenh0u): the S = 2 split (a 64 KB opt-in card: Turing) disagrees with itself in gr_parity
+                // (graph replay vs direct call) - such a card keeps the default read until that split is fixed
+                std::fprintf(stderr, "strata: STRATA_GR_V3=1 needs the two-half split on this card, which fails its "
+                                     "checks (#375): the default read is used\n");
             /*
             DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index 3baef3ce527..22be5e4def3 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -182,9 +182,9 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017: The sycl::frexp call is used instead of the frexpf call.
-    These two calls do not provide exactly the same functionality. Check the
-    potential precision and/or performance issues for the generated code.
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
+    two calls do not provide exactly the same functionality. Check the potential
+    precision and/or performance issues for the generated code.
     */
     if (qm > 0.0f) sycl::frexp(
         qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
@@ -705,9 +705,9 @@ prompt_attn_i8_kernel(const float *__restrict__ q, QsaAttnPools p,
                     sycl::fmax(S.qmax[2], S.qmax[3]));
     int qe = 0;
     /*
-    DPCT1017: The sycl::frexp call is used instead of the frexpf call.
-    These two calls do not provide exactly the same functionality. Check the
-    potential precision and/or performance issues for the generated code.
+    DPCT1017: The sycl::frexp call is used instead of the frexpf call. These
+    two calls do not provide exactly the same functionality. Check the potential
+    precision and/or performance issues for the generated code.
     */
     if (qm > 0.0f) sycl::frexp(
         qm, sycl::address_space_cast<sycl::access::address_space::generic_space,
@@ -1467,7 +1467,8 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
     {   // sm_75 or newer: the MMA above compiles for both.  sm_80+ runs the cp.async kernel (launch_i8); Turing has
         // no cp.async, so it runs the v1 kernel (launch<1>, same accuracy, another summation order).  An older card
         // keeps the old kernel.
-        static int cc_major[64] = {};
+        // #371: the compute capability with its minor - sm_70 (V100) has no m16n8k8 (the kernels trap below sm_75)
+        static int cc[64] = {};
         int dev = 0;
         /*
         DPCT1026: The call to cudaGetLastError was removed because this
@@ -1477,10 +1478,12 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
             dev < 0 || dev >= 64) {
             ; return false;
         }
-        if (cc_major[dev] == 0) {
-            int major = 0;
+        if (cc[dev] == 0) {
+            int major = 0, minor = 0;
             if (DPCT_CHECK_ERROR(
-                    major = dpct::get_device(dev).get_major_version()) != 0) {
+                    major = dpct::get_device(dev).get_major_version()) != 0 ||
+                DPCT_CHECK_ERROR(
+                    minor = dpct::get_device(dev).get_minor_version()) != 0) {
                 /*
                 DPCT1026: The call to cudaGetLastError was removed because
                 this functionality is redundant in SYCL.
@@ -1489,9 +1492,10 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
             }
             // STRATA_QSA_WARP=1|attn (an A/B arm): the pre-sm_80 kernels on any card, as RTX 20 runs them
             const char* w = std::getenv("STRATA_QSA_WARP");
-            cc_major[dev] = w && (!std::strcmp(w, "1") || !std::strcmp(w, "attn")) ? 7 : strata::cc_major_of(major);
+            cc[dev] = w && (!std::strcmp(w, "1") || !std::strcmp(w, "attn")) ? 75
+                      : 10 * strata::cc_major_of(major) + strata::cc_minor_of(minor);
         }
-        (void) cc_major[dev];
+        (void) cc[dev];
         // SYCL: the mma.sync kernel below is not ported (upstream's Turing/sm_80 split - `turing` - does not
         // apply); its XMX port takes the same arguments
         if (qsa_prompt_attn_xmx(q, pools, ids, steps, cap, s, attn, n_q, stream)) return true;
diff --git a/sycl/src/kernels/gr_parity.cpp b/sycl/src/kernels/gr_parity.cpp
index b1ff5d5b629..3567a2a63cc 100644
--- a/sycl/src/kernels/gr_parity.cpp
+++ b/sycl/src/kernels/gr_parity.cpp
@@ -27,6 +27,7 @@
 
 #include <cmath>
 #include <cstdio>
+#include <algorithm>
 #include <cstdlib>
 #include <cstring>
 #include <random>
@@ -480,7 +481,22 @@ int fused_multi_lds_parity(const float* d_norm, const uint16_t* d_down, const ui
       std::exit(1);
     }
     };
-    auto same = [](const Snapshot& a, const Snapshot& b) {
+    // the split read (STRATA_GR_V3=1) sums in another order than the single-token kernel: equal within float
+    // rounding, not to the bit, so it is compared with a relative tolerance; the default kernels bit for bit
+    static const bool v3 = [] { const char* v = std::getenv("STRATA_GR_V3"); return v != nullptr && std::atoi(v) != 0; }();
+    auto close = [](const std::vector<float>& x, const std::vector<float>& y) {
+        double worst = 0.0, mag = 1e-30;
+        for (size_t i = 0; i < x.size(); ++i) {
+            worst = std::max(worst, (double) std::fabs(x[i] - y[i]));
+            mag = std::max(mag, (double) std::fabs(y[i]));
+        }
+        if (worst > 2e-6 * mag)
+            std::printf("    tolerance: worst %.3e of max |ref| %.3e (rel %.3e), n %zu\n", worst, mag, worst / mag, x.size());
+        return worst <= 2e-6 * mag;
+    };
+    auto same = [&](const Snapshot& a, const Snapshot& b) {
+        if (v3)   // `lo` is the default kernels' workspace between down and up; the split read keeps it in shared memory
+            return close(a.r_out, b.r_out) && close(a.rs, b.rs) && close(a.inject, b.inject) && close(a.mixed, b.mixed);
         return std::memcmp(a.r_out.data(), b.r_out.data(), a.r_out.size() * sizeof(float)) == 0 &&
                std::memcmp(a.lo.data(), b.lo.data(), a.lo.size() * sizeof(float)) == 0 &&
                std::memcmp(a.rs.data(), b.rs.data(), a.rs.size() * sizeof(float)) == 0 &&
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index c79ff935a16..ff7806f75c2 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -291,6 +291,7 @@ struct Options {
     bool resident_pin = false;
     uint64_t resident_headroom = 8ull << 30;
     bool resident_soft = false;
+    bool resident_cpu_explicit = false;   ///< #384: --resident-cpu-experts given by itself (not only implied)
     /// CS-T `--resident-budget-gib N`: the resident mode with a RAM budget - the N GiB of experts the GPU cache does
     /// not hold that the expert profile ranks hottest are copied into RAM, the rest are read from the files in place
     /// (the GGUF shards when the pack has no experts.bin).  0 = the whole complement (--resident-experts).
@@ -1269,7 +1270,7 @@ int main(int argc, char **argv) try {
         else if (a == "--gpu-stages") o.gpu_stages = true;
         else if (a == "--mmap-experts") o.mmap_experts = true;
         else if (a == "--shared-expert-arena") o.shared_expert_arena = next("--shared-expert-arena");
-        else if (a == "--resident-cpu-experts") o.resident_cpu_experts = true;
+        else if (a == "--resident-cpu-experts") o.resident_cpu_experts = o.resident_cpu_explicit = true;
         else if (a == "--stream-experts") o.stream_experts = true;
         else if (a == "--resident-experts") {
             o.mmap_experts = o.resident_cpu_experts = o.resident_pin = o.resident_soft = true;
@@ -1382,9 +1383,20 @@ int main(int argc, char **argv) try {
         std::fprintf(stderr, "strata generate: --resident-cpu-experts requires --mmap-experts and a static --expert-profile\n");
         return 2;
     }
-    if (o.resident_cpu_experts &&
-        (!o.layer_split.empty() || o.expert_cache_remote[0] > 0 || o.expert_cache_remote[1] > 0 ||
-         o.expert_cache_remote[2] > 0)) {
+    const bool remote_caches = o.expert_cache_remote[0] > 0 || o.expert_cache_remote[1] > 0 ||
+                               o.expert_cache_remote[2] > 0;
+    if (o.resident_cpu_experts && !o.layer_split.empty() && !remote_caches && o.resident_soft &&
+        !o.resident_cpu_explicit && o.resident_budget == 0) {
+        // #364 #384: setup's --resident-experts with a layer split (--gpus at start, or a config edited by hand) runs
+        // as the plain mmap mode - the placement those users measured 1.3-1.6x faster than one GPU - instead of
+        // refusing.  Exactly --mmap-experts: nothing else reads these flags (the headroom only sizes the copy).
+        std::fprintf(stderr, "strata generate: WARNING: the resident RAM mode (--resident-experts) does not support a "
+                             "layer split yet: the experts the GPUs do not hold are read through the OS file cache "
+                             "(--mmap-experts), and RAM may fill up during long prompts\n");
+        o.resident_cpu_experts = o.resident_pin = o.resident_soft = false;
+        o.resident_headroom = 8ull << 30;
+    }
+    if (o.resident_cpu_experts && (!o.layer_split.empty() || remote_caches)) {
         std::fprintf(stderr, "strata generate: --resident-cpu-experts does not support layer splits or remote expert caches\n");
         return 2;
     }
@@ -2358,10 +2370,10 @@ int main(int argc, char **argv) try {
                     st.mrope = sycl::malloc_device<int32_t>(
                         mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st.mrope, mrope_host.data(),
@@ -2730,9 +2742,9 @@ int main(int argc, char **argv) try {
             DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) == 0 &&
             DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(p)) == 0;
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         if (!named) 0;
         const char *name =
@@ -2744,8 +2756,8 @@ int main(int argc, char **argv) try {
             stderr, "strata generate: GPU %d: %s, compute capability %d.%d%s\n",
             dev, name,
             /*
-            DPCT1005: The SYCL device version is different from CUDA Compute
-            Compatibility. You may need to rewrite this code.
+            DPCT1005: The SYCL device version is different from CUDA
+            Compute Compatibility. You may need to rewrite this code.
             */
             strata::cc_major_of(p.get_major_version()),
             strata::cc_minor_of(p.get_minor_version()),
@@ -2925,16 +2937,20 @@ int main(int argc, char **argv) try {
         const int64_t reserve = ((int64_t) o.vram_reserve_mib + prefill_mib) << 20;
         const int64_t fit = std::max<int64_t>(((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob, 0);
         if (o.expert_cache > fit) {
-            std::fprintf(stderr, "strata generate: layer split: --expert-cache %d leaves no room for the prompt path's "
-                                 "buffers (%lld MiB) on CUDA0: %lld slots\n", o.expert_cache, (long long) prefill_mib,
-                         (long long) fit);
+            // a WARNING that names the knob: the user asked for this size, and gets fewer slots
+            std::fprintf(stderr, "strata generate: WARNING: layer split: --expert-cache %d leaves no room for the "
+                                 "prompt path's buffers (%lld MiB) and the %d MiB reserve on CUDA0: %lld slots instead "
+                                 "(a smaller --vram-reserve-mib leaves more of them)\n", o.expert_cache,
+                         (long long) prefill_mib, o.vram_reserve_mib, (long long) fit);
             o.expert_cache = (int) fit;
         }
     }
     // plan v0.3 P6: a native pack's blobs differ per layer, so with a profile its slots are sized per pair: the
     // same VRAM holds ~30% more IQ3_XXS experts than slots of the largest blob would
+    // #369: not with --expert-cache-per-layer - its per-layer slot ranges ignore the profile rank a sized slot was cut
+    // for, so a layer's larger blob could land in a smaller slot: that mode keeps slots of the largest blob
     std::vector<int64_t> sized_slots;
-    if (native_pack && o.expert_cache > 0 && !profile.empty()) {
+    if (native_pack && o.expert_cache > 0 && !profile.empty() && !o.expert_cache_per_layer) {
         size_t free_b = 0, total_b = 0;
         /*
         DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
@@ -3085,10 +3101,17 @@ int main(int argc, char **argv) try {
     // the policy rather than a hint.
     int64_t prefilled = 0;
     if (!profile.empty() && srcp != nullptr) {
-        const int64_t want = std::min<int64_t>((int64_t) profile.size(), xcache.slots());
+        // #369 (dag08): per layer, a full layer skips only its own pairs - each layer takes its hottest experts until
+        // its range is full (one full layer used to end the whole fill, leaving most layers empty)
+        const bool per_layer = xcache.per_layer_admission();
+        const int64_t want = per_layer ? (int64_t) profile.size()
+                                       : std::min<int64_t>((int64_t) profile.size(), xcache.slots());
         for (int64_t i = 0; i < want; ++i) {
             const int32_t slot = xcache.admit(profile[(size_t) i].first, profile[(size_t) i].second);
-            if (slot == strata::core::kNotResident) break;
+            if (slot == strata::core::kNotResident) {
+                if (per_layer) continue;
+                break;
+            }
             const uint8_t* b = srcp->blob(profile[(size_t) i].first, profile[(size_t) i].second);
             if (b == nullptr || !xcache.fill_slot_blocking(slot, b, err,
                     (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(profile[(size_t) i].first))) {
@@ -3109,7 +3132,7 @@ int main(int argc, char **argv) try {
         }
         mem_mark("the profile fill");
         std::fprintf(stderr, "strata generate: pre-filled %lld of %lld slots from the profile; slot 0 verified\n",
-                     (long long) prefilled, (long long) want);
+                     (long long) prefilled, (long long) (per_layer ? xcache.slots() : want));
     }
     // SYCL port, plan item 2: the experts that did not fit VRAM, mirrored once in pinned host memory the GPU reads
     // over PCIe (--stream-experts has no host copy otherwise: each routed miss was an SSD read). The share of misses
@@ -3330,8 +3353,8 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: routing-aware prefetch of the file tier on (the next layer's router)\n");
         } else {
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             (void)0;
@@ -3562,10 +3585,11 @@ int main(int argc, char **argv) try {
         } else {
             for (int64_t c = 0; c < g.hc; ++c)
                 /*
-                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
-                API. While the origin API might be synchronous, it depends on
-                the type of operand memory, so you may need to call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous
+                memcpy API. While the origin API might be synchronous, it
+                depends on the type of operand memory, so you may need to call
+                wait() on event return by memcpy API to ensure synchronization
+                behavior.
                 */
                 if (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
                         ss.R + (size_t)c * g.n_embd, d_emb,
@@ -3857,8 +3881,8 @@ int main(int argc, char **argv) try {
             real error-handling function.
             */
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             std::fprintf(stderr,
@@ -3905,9 +3929,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -3927,9 +3951,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -4017,10 +4041,10 @@ int main(int argc, char **argv) try {
                     st->d_res = sycl::malloc_device<int32_t>(
                         host_res.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st->d_res, host_res.data(),
@@ -4186,6 +4210,12 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: WARNING: the resident RAM mode does not fit (%s); the experts the "
                                  "GPU does not hold are read from the model folder through the OS file cache "
                                  "(--mmap-experts), which is slower when the RAM cannot keep them\n", err.c_str());
+        } else if (o.resident_budget > 0) {
+            // #403: a RAM budget that cannot be kept is not a reason to stop - the experts it would have held are
+            // read from the files like the ones outside it (pin_cache_complement leaves nothing half-built)
+            std::fprintf(stderr, "strata generate: WARNING: the RAM budget (--resident-budget-gib) cannot be kept (%s); "
+                                 "every expert the GPU does not hold is read from the model files through the OS file "
+                                 "cache (--mmap-experts), which is slower\n", err.c_str());
         } else {
             std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
             return 1;
@@ -4470,16 +4500,16 @@ int main(int argc, char **argv) try {
                     const strata::core::OnDevice on(stp->dev);
                     stp->sp.reset();
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     (void)0;
                 }
                 sp.reset();
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
@@ -4905,10 +4935,10 @@ int main(int argc, char **argv) try {
             try {
         if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
@@ -6458,8 +6488,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (long long)pos, dpct::get_error_string_dummy(0));
@@ -6534,8 +6564,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 dpct::get_error_string_dummy(0));
@@ -6680,10 +6710,10 @@ int main(int argc, char **argv) try {
             pending.clear();
             if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();

From 3ee292a993f294dbac641995f677fcd51422882c Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Thu, 1 Oct 2026 22:49:04 -0500
Subject: [PATCH 056/201] sycl: read streamed experts from the right shard; fix
 IQ2_XS products (Swift 1.5 runs)

- gguf_expert_source: ExpertLayout::gguf_file is per layer and role
  (3 * layer + role) since upstream 0.1.31; the port indexed it by layer, so
  experts in shard 2 were read from shard 1 at shard-2 offsets (Swift 1.5:
  layers 13-47, NaN logits from layer 13). One fd per layer and role now.
- iq_kernels: vec_dot_iq2_xs and Split<17> took their 16-bit codes through
  a uint16_t* to an int2 (type punning the device compiler does not honour);
  by shifts now. iq_multi_parity checks IQ2_XS against a CPU decode from
  ggml's tables (iq2xs_host_tables.inc) and passes.
- prefill: STRATA_DBG_NAN=1 also reports the experts' fp16 GEMM inputs.

Tested on the B70: Swift 1.5 IQ2_XS answers correctly (48 tok/s raw, short
thinking); the original IQ2_XS output is unchanged (65109a, 58 tok/s).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                 |  19 ++-
 .../strata/core/gguf_expert_source.hpp        |   4 +-
 sycl/src/core/gguf_expert_source.cpp          |  25 ++--
 sycl/src/kernels/cuda/iq_kernels.dp.cpp       |  14 +-
 sycl/src/kernels/iq2xs_host_tables.inc        | 138 ++++++++++++++++++
 sycl/src/kernels/iq_multi_parity.cpp          |  49 +++++++
 sycl/src/prefill/prefill.cpp                  |  22 +++
 7 files changed, 251 insertions(+), 20 deletions(-)
 create mode 100644 sycl/src/kernels/iq2xs_host_tables.inc

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 9e8c9e67477..046f441c5d8 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -486,8 +486,7 @@ part of the procedure now: it caught a dropped mirror hook and four doorbell wai
   gate/up 8 or 16 x down 4 or 8 all decode in 37.7-38.6 ms per verify round (2 runs each, Coder, both prompts); tok/s
   differences between them are draft acceptance (each split rounds differently). The default (8 / 8) stays.
 - **Speed after the merge:** Coder 78.2 / 75.7 tok/s (as before), IQ2_XS 58.6 / 64.2 (from 50.8 / 60.6).
-- **Still failing:** `iq_multi_parity` on IQ2_XS (type 17: the port's mmvq disagrees with the reference, old and new
-  kernel alike; no model here uses it), `s2_expert_grouped_parity` (the s2 path), `kv_hybrid_parity`'s last step
+- **Still failing:** (`iq_multi_parity` on IQ2_XS: fixed later, see "Two model-specific bugs"), `s2_expert_grouped_parity` (the s2 path), `kv_hybrid_parity`'s last step
   (needs the unported tensor-core prompt kernel). `ple_parity` and `native_expert_parity` need model files.
 
 **The 0.1.32 merge (2026-10-01).** Upstream 0.1.31 -> 0.1.32 (89 commits) by the same steps; the hash-only
@@ -527,6 +526,22 @@ after every phase (`STRATA_PREFILL_SYNC=1`, kept as a debug switch). The fix: th
 number into page-locked host memory after each DMA and the stager polls it - no host thread waits on a queue's
 event. Output is bit-identical to the run without borrowing; borrowing is the default above 32K again.
 
+**Two model-specific bugs found with Swift 1.5 (fixed 2026-10-01).** UkisAI's Swift 1.5 IQ2_XS (setup's `swift`
+family, the same GSQ-RCO layout) decoded token 0 forever: NaN logits from layer 13 on.
+
+- **`--stream-experts` read the wrong shard.** Since upstream 0.1.31, `ExpertLayout::gguf_file` is per layer AND role
+  (`3 * layer + role`; a shard boundary can fall inside a layer). The port's `GgufExpertSource` still indexed it by
+  layer, so a layer in shard 2 was read from shard 1 at shard 2's offsets: garbage IQ1_M scales, infinities after the
+  fp16 dequantization. The original model keeps every expert in shard 1 and never noticed; Swift's layers 13-47 are
+  in shard 2. `STRATA_DBG_NAN=1` now also reports the experts' fp16 GEMM inputs (activations, dequantized gate/up).
+- **IQ2_XS products were garbage** (the long-failing `iq_multi_parity` IQ2_XS case): ggml's `vec_dot_iq2_xs` reads
+  its four 16-bit codes through a `uint16_t*` to an `int2`, type punning the SYCL device compiler does not honour;
+  the dequantizer, which reads the codes directly, was exact. The codes are extracted by shifts now (the dot and the
+  expert kernels' `Split<17>`); the test checks against a CPU decode from ggml's tables too and passes. No model here
+  uses IQ2_XS tensors, Swift included - this was not Swift's bug, only found on the way.
+
+Swift 1.5 IQ2_XS after both: correct answers, 51-118 words of thinking on short questions, 48 tok/s raw decode.
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/include/strata/core/gguf_expert_source.hpp b/sycl/include/strata/core/gguf_expert_source.hpp
index 7ae36b53a35..678a754ea57 100644
--- a/sycl/include/strata/core/gguf_expert_source.hpp
+++ b/sycl/include/strata/core/gguf_expert_source.hpp
@@ -55,13 +55,13 @@ class GgufExpertSource : public ExpertSource {
     uint64_t mirrored_bytes() const { return mirror_bytes_; }
 
 private:
-    int fd_of(int64_t layer, std::string& err);
+    int fd_of(int64_t layer, int role, std::string& err);
 
     std::string shard_;
     std::string dir_;
     std::vector<int> fds_;              ///< per distinct file name, opened once
     std::vector<std::string> names_;
-    std::vector<int> layer_fd_;         ///< per layer: index into fds_
+    std::vector<int> layer_fd_;         ///< per layer and role (3 * layer + role): index into fds_
     std::vector<std::vector<uint8_t>> ring_;
     std::vector<int64_t> ring_key_;                 ///< (layer << 20 | expert) held by each slot, -1 = empty
     std::unordered_map<int64_t, size_t> where_;     ///< key -> slot
diff --git a/sycl/src/core/gguf_expert_source.cpp b/sycl/src/core/gguf_expert_source.cpp
index 70ba763c4bc..8c228f3c929 100644
--- a/sycl/src/core/gguf_expert_source.cpp
+++ b/sycl/src/core/gguf_expert_source.cpp
@@ -44,27 +44,32 @@ bool GgufExpertSource::open(const std::string& shard1, int64_t n_layers, int64_t
     dir_ = cut == std::string::npos ? std::string() : shard1.substr(0, cut + 1);
     n_layers_ = n_layers;
     n_expert_ = n_expert;
-    layer_fd_.assign((size_t) n_layers, -1);
+    layer_fd_.assign((size_t) (3 * n_layers), -1);
     for (int64_t l = 0; l < n_layers; ++l)
-        if (fd_of(l, err) < 0) { close(); return false; }
+        for (int r = 0; r < 3; ++r)
+            if (fd_of(l, r, err) < 0) { close(); return false; }
     ring_.resize(kRing);
     for (auto& b : ring_) b.resize((size_t) lay.max_blob);
     ring_key_.assign(kRing, -1);
     return true;
 }
 
-int GgufExpertSource::fd_of(int64_t layer, std::string& err) {
-    if (layer_fd_[(size_t) layer] >= 0) return fds_[(size_t) layer_fd_[(size_t) layer]];
+// The file of role `role` (0 gate, 1 up, 2 down) of `layer`. ExpertLayout::gguf_file is per layer AND role
+// (`3 * layer + role`) since upstream 0.1.31; indexing it by layer alone read a shard-2 layer from shard 1 (Swift 1.5,
+// whose layers 13-47 are in shard 2: garbage IQ1_M scales, NaN logits - 2026-10-01).
+int GgufExpertSource::fd_of(int64_t layer, int role, std::string& err) {
+    const size_t i = (size_t) (3 * layer + role);
+    if (layer_fd_[i] >= 0) return fds_[(size_t) layer_fd_[i]];
     const auto& lay = strata::kernels::cpu::expert_layout();
     std::string name = shard_;
-    if (!lay.gguf_file.empty() && !lay.gguf_file[(size_t) layer].empty()) name = dir_ + lay.gguf_file[(size_t) layer];
-    for (size_t i = 0; i < names_.size(); ++i)
-        if (names_[i] == name) { layer_fd_[(size_t) layer] = (int) i; return fds_[i]; }
+    if (lay.gguf_file.size() > i && !lay.gguf_file[i].empty()) name = dir_ + lay.gguf_file[i];
+    for (size_t k = 0; k < names_.size(); ++k)
+        if (names_[k] == name) { layer_fd_[i] = (int) k; return fds_[k]; }
     const int fd = ::open(name.c_str(), O_RDONLY | O_CLOEXEC);
     if (fd < 0) { err = "--stream-experts: cannot open " + name; return -1; }
     names_.push_back(name);
     fds_.push_back(fd);
-    layer_fd_[(size_t) layer] = (int) fds_.size() - 1;
+    layer_fd_[i] = (int) fds_.size() - 1;
     return fd;
 }
 
@@ -80,7 +85,6 @@ const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     // the arena loader's gather, for one expert: [gate | up | down] from the three tensors
     const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
     const uint64_t at[3] = {0, fm.up_off, fm.down_off};
-    const int fd = fds_[(size_t) layer_fd_[(size_t) layer]];
     const int64_t key = ((int64_t) layer << 20) | expert;
     size_t slot;
     {
@@ -95,6 +99,7 @@ const uint8_t* GgufExpertSource::blob(int64_t layer, int64_t expert) {
     }
     std::vector<uint8_t>& buf = ring_[slot];
     for (int r = 0; r < 3; ++r) {
+        const int fd = fds_[(size_t) layer_fd_[(size_t) (3 * layer + r)]];
         const uint64_t src = lay.gguf_off[(size_t) (3 * layer + r)] + per[r] * (uint64_t) expert;
         uint64_t done = 0;
         while (done < per[r]) {
@@ -184,8 +189,8 @@ bool GgufExpertSource::read_into(int64_t layer, int64_t expert, uint8_t* dst, si
     if (bytes < blob) return false;
     const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
     const uint64_t at[3] = {0, fm.up_off, fm.down_off};
-    const int fd = fds_[(size_t) layer_fd_[(size_t) layer]];
     for (int r = 0; r < 3; ++r) {
+        const int fd = fds_[(size_t) layer_fd_[(size_t) (3 * layer + r)]];
         const uint64_t src = lay.gguf_off[(size_t) (3 * layer + r)] + per[r] * (uint64_t) expert;
         uint64_t done = 0;
         while (done < per[r]) {
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 2d035a7fce9..ac0714979f2 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -156,9 +156,11 @@ __dpct_inline__ float vec_dot_iq2_xs_q8_1(const void *__restrict__ vbq,
                                           const block_q8_1 *__restrict__ bq8_1,
                                           const int &kbx, const int &iqs) {
     const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
-    const sycl::int2 q2_packed =
-        sycl::int2(get_int_b2(bq2->qs, iqs + 0), get_int_b2(bq2->qs, iqs + 1));
-    const uint16_t* q2 = (const uint16_t*) &q2_packed;
+    // SYCL port: the four 16-bit codes by shifts. ggml reads them through a uint16_t* to an int2, which is type
+    // punning the SYCL device compiler does not honour (non-char aliasing): IQ2_XS products came out garbage
+    // (iq_multi_parity, Swift 1.5 IQ2_XS) while the dequantizer, reading the codes directly, was exact.
+    const uint32_t q2_lo = (uint32_t) get_int_b2(bq2->qs, iqs + 0), q2_hi = (uint32_t) get_int_b2(bq2->qs, iqs + 1);
+    const uint16_t q2[4] = {(uint16_t) q2_lo, (uint16_t) (q2_lo >> 16), (uint16_t) q2_hi, (uint16_t) (q2_hi >> 16)};
     const int ls0 = bq2->scales[iqs / 2] & 0x0F;
     const int ls1 = bq2->scales[iqs / 2] >> 4;
     int sumi0 = 0, sumi1 = 0;
@@ -766,9 +768,9 @@ template<> inline constexpr bool kSplit<17> = true;
 template<> struct Split<17> : SplitLs2 {   // IQ2_XS
     static W load(const void* __restrict__ vbq, int kbx, int iqs) {
         const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
-        const sycl::int2 q2_packed = sycl::int2(get_int_b2(bq2->qs, iqs + 0),
-                                                get_int_b2(bq2->qs, iqs + 1));
-        const uint16_t* q2 = (const uint16_t*) &q2_packed;
+        // SYCL port: the codes by shifts, not through a uint16_t* to an int2 (see vec_dot_iq2_xs_q8_1)
+        const uint32_t q2_lo = (uint32_t) get_int_b2(bq2->qs, iqs + 0), q2_hi = (uint32_t) get_int_b2(bq2->qs, iqs + 1);
+        const uint16_t q2[4] = {(uint16_t) q2_lo, (uint16_t) (q2_lo >> 16), (uint16_t) q2_hi, (uint16_t) (q2_hi >> 16)};
         W r;
         r.ls0 = bq2->scales[iqs / 2] & 0x0F;
         r.ls1 = bq2->scales[iqs / 2] >> 4;
diff --git a/sycl/src/kernels/iq2xs_host_tables.inc b/sycl/src/kernels/iq2xs_host_tables.inc
new file mode 100644
index 00000000000..30b9bb343fd
--- /dev/null
+++ b/sycl/src/kernels/iq2xs_host_tables.inc
@@ -0,0 +1,138 @@
+// iq2xs_host_tables.inc - IQ2_XS's grid and sign tables as plain host arrays (from ggml-common.h, MIT), for the
+// CPU decode in iq_multi_parity (the SYCL ggml-common.h holds them as device globals only)
+static const uint64_t host_iq2xs_grid[512] = {0x0808080808080808, 0x080808080808082b, 0x0808080808081919, 0x0808080808082b08,
+    0x0808080808082b2b, 0x0808080808190819, 0x0808080808191908, 0x080808080819192b,
+    0x0808080808192b19, 0x08080808082b0808, 0x08080808082b082b, 0x08080808082b1919,
+    0x08080808082b2b08, 0x0808080819080819, 0x0808080819081908, 0x080808081908192b,
+    0x0808080819082b19, 0x0808080819190808, 0x080808081919082b, 0x0808080819191919,
+    0x0808080819192b08, 0x08080808192b0819, 0x08080808192b1908, 0x080808082b080808,
+    0x080808082b08082b, 0x080808082b081919, 0x080808082b082b08, 0x080808082b190819,
+    0x080808082b191908, 0x080808082b192b19, 0x080808082b2b0808, 0x0808081908080819,
+    0x0808081908081908, 0x080808190808192b, 0x0808081908082b19, 0x0808081908190808,
+    0x080808190819082b, 0x0808081908191919, 0x0808081908192b08, 0x0808081908192b2b,
+    0x08080819082b0819, 0x08080819082b1908, 0x0808081919080808, 0x080808191908082b,
+    0x0808081919081919, 0x0808081919082b08, 0x0808081919190819, 0x0808081919191908,
+    0x08080819192b0808, 0x08080819192b2b08, 0x080808192b080819, 0x080808192b081908,
+    0x080808192b190808, 0x0808082b08080808, 0x0808082b0808082b, 0x0808082b08081919,
+    0x0808082b08082b08, 0x0808082b08190819, 0x0808082b08191908, 0x0808082b082b0808,
+    0x0808082b19080819, 0x0808082b19081908, 0x0808082b19190808, 0x0808082b19191919,
+    0x0808082b2b080808, 0x0808082b2b082b2b, 0x0808190808080819, 0x0808190808081908,
+    0x080819080808192b, 0x0808190808082b19, 0x0808190808190808, 0x080819080819082b,
+    0x0808190808191919, 0x0808190808192b08, 0x08081908082b0819, 0x08081908082b1908,
+    0x0808190819080808, 0x080819081908082b, 0x0808190819081919, 0x0808190819082b08,
+    0x0808190819190819, 0x0808190819191908, 0x080819081919192b, 0x08081908192b0808,
+    0x080819082b080819, 0x080819082b081908, 0x080819082b190808, 0x0808191908080808,
+    0x080819190808082b, 0x0808191908081919, 0x0808191908082b08, 0x0808191908190819,
+    0x0808191908191908, 0x08081919082b0808, 0x0808191919080819, 0x0808191919081908,
+    0x0808191919190808, 0x08081919192b0819, 0x080819192b080808, 0x0808192b08080819,
+    0x0808192b08081908, 0x0808192b08190808, 0x0808192b082b192b, 0x0808192b19080808,
+    0x0808192b1908082b, 0x0808192b2b081908, 0x08082b0808080808, 0x08082b080808082b,
+    0x08082b0808081919, 0x08082b0808082b08, 0x08082b0808082b2b, 0x08082b0808190819,
+    0x08082b0808191908, 0x08082b08082b0808, 0x08082b08082b1919, 0x08082b0819080819,
+    0x08082b0819081908, 0x08082b0819190808, 0x08082b0819192b08, 0x08082b082b080808,
+    0x08082b082b2b0808, 0x08082b082b2b2b2b, 0x08082b1908080819, 0x08082b1908081908,
+    0x08082b1908190808, 0x08082b1919080808, 0x08082b192b080819, 0x08082b192b082b19,
+    0x08082b2b08080808, 0x08082b2b082b0808, 0x08082b2b082b2b08, 0x08082b2b2b19192b,
+    0x08082b2b2b2b0808, 0x0819080808080819, 0x0819080808081908, 0x081908080808192b,
+    0x0819080808082b19, 0x0819080808190808, 0x081908080819082b, 0x0819080808191919,
+    0x0819080808192b08, 0x08190808082b0819, 0x08190808082b1908, 0x0819080819080808,
+    0x081908081908082b, 0x0819080819081919, 0x0819080819082b08, 0x0819080819190819,
+    0x0819080819191908, 0x08190808192b0808, 0x08190808192b2b2b, 0x081908082b080819,
+    0x081908082b081908, 0x081908082b190808, 0x0819081908080808, 0x081908190808082b,
+    0x0819081908081919, 0x0819081908082b08, 0x0819081908190819, 0x0819081908191908,
+    0x08190819082b0808, 0x0819081919080819, 0x0819081919081908, 0x0819081919190808,
+    0x081908192b080808, 0x081908192b191908, 0x081908192b19192b, 0x0819082b08080819,
+    0x0819082b08081908, 0x0819082b0808192b, 0x0819082b08190808, 0x0819082b19080808,
+    0x0819082b192b0808, 0x0819190808080808, 0x081919080808082b, 0x0819190808081919,
+    0x0819190808082b08, 0x0819190808190819, 0x0819190808191908, 0x08191908082b0808,
+    0x0819190819080819, 0x0819190819081908, 0x0819190819082b19, 0x0819190819190808,
+    0x08191908192b1908, 0x081919082b080808, 0x0819191908080819, 0x0819191908081908,
+    0x0819191908190808, 0x0819191919080808, 0x0819192b08080808, 0x0819192b08191908,
+    0x0819192b19082b19, 0x08192b0808080819, 0x08192b0808081908, 0x08192b0808190808,
+    0x08192b080819082b, 0x08192b0819080808, 0x08192b0819191908, 0x08192b082b08192b,
+    0x08192b1908080808, 0x08192b1908081919, 0x08192b19192b192b, 0x08192b2b19190819,
+    0x08192b2b2b2b2b19, 0x082b080808080808, 0x082b08080808082b, 0x082b080808081919,
+    0x082b080808082b08, 0x082b080808082b2b, 0x082b080808190819, 0x082b080808191908,
+    0x082b0808082b0808, 0x082b080819080819, 0x082b080819081908, 0x082b080819190808,
+    0x082b08082b080808, 0x082b08082b2b0808, 0x082b081908080819, 0x082b081908081908,
+    0x082b081908190808, 0x082b081919080808, 0x082b081919082b08, 0x082b0819192b1919,
+    0x082b082b08080808, 0x082b082b082b082b, 0x082b082b2b080808, 0x082b082b2b2b2b08,
+    0x082b190808080819, 0x082b190808081908, 0x082b190808190808, 0x082b1908082b2b19,
+    0x082b190819080808, 0x082b191908080808, 0x082b191919080819, 0x082b19191919082b,
+    0x082b19192b192b19, 0x082b192b08080819, 0x082b192b08192b2b, 0x082b192b2b2b192b,
+    0x082b2b0808080808, 0x082b2b0808082b08, 0x082b2b0808082b2b, 0x082b2b08082b0808,
+    0x082b2b0819191919, 0x082b2b082b082b08, 0x082b2b082b2b082b, 0x082b2b19192b2b08,
+    0x082b2b192b190808, 0x082b2b2b08082b08, 0x082b2b2b082b0808, 0x082b2b2b2b08082b,
+    0x082b2b2b2b082b08, 0x082b2b2b2b082b2b, 0x1908080808080819, 0x1908080808081908,
+    0x190808080808192b, 0x1908080808082b19, 0x1908080808190808, 0x190808080819082b,
+    0x1908080808191919, 0x1908080808192b08, 0x19080808082b0819, 0x19080808082b1908,
+    0x1908080819080808, 0x190808081908082b, 0x1908080819081919, 0x1908080819082b08,
+    0x1908080819082b2b, 0x1908080819190819, 0x1908080819191908, 0x19080808192b0808,
+    0x19080808192b1919, 0x190808082b080819, 0x190808082b081908, 0x190808082b190808,
+    0x1908081908080808, 0x190808190808082b, 0x1908081908081919, 0x1908081908082b08,
+    0x1908081908190819, 0x1908081908191908, 0x19080819082b0808, 0x1908081919080819,
+    0x1908081919081908, 0x1908081919190808, 0x190808192b080808, 0x190808192b081919,
+    0x190808192b2b082b, 0x1908082b08080819, 0x1908082b08081908, 0x1908082b08190808,
+    0x1908082b0819082b, 0x1908082b082b2b19, 0x1908082b19080808, 0x1908190808080808,
+    0x190819080808082b, 0x1908190808081919, 0x1908190808082b08, 0x1908190808190819,
+    0x1908190808191908, 0x1908190808192b19, 0x19081908082b0808, 0x1908190819080819,
+    0x1908190819081908, 0x1908190819190808, 0x190819082b080808, 0x190819082b191908,
+    0x1908191908080819, 0x1908191908081908, 0x1908191908190808, 0x19081919082b1908,
+    0x1908191919080808, 0x190819192b192b2b, 0x1908192b08080808, 0x1908192b08082b2b,
+    0x1908192b19081908, 0x1908192b19190808, 0x19082b0808080819, 0x19082b0808081908,
+    0x19082b0808190808, 0x19082b0819080808, 0x19082b0819081919, 0x19082b0819191908,
+    0x19082b08192b082b, 0x19082b1908080808, 0x19082b1908190819, 0x19082b1919081908,
+    0x19082b1919190808, 0x19082b19192b2b19, 0x19082b2b08081908, 0x1919080808080808,
+    0x191908080808082b, 0x1919080808081919, 0x1919080808082b08, 0x1919080808190819,
+    0x1919080808191908, 0x19190808082b0808, 0x19190808082b2b08, 0x1919080819080819,
+    0x1919080819081908, 0x1919080819190808, 0x191908082b080808, 0x1919081908080819,
+    0x1919081908081908, 0x1919081908190808, 0x1919081908191919, 0x1919081919080808,
+    0x191908191908082b, 0x1919082b08080808, 0x1919082b19081908, 0x1919082b2b2b2b2b,
+    0x1919190808080819, 0x1919190808081908, 0x1919190808190808, 0x19191908082b0819,
+    0x1919190819080808, 0x19191908192b0808, 0x191919082b080819, 0x191919082b2b0819,
+    0x1919191908080808, 0x1919191908082b08, 0x191919192b080808, 0x191919192b082b08,
+    0x1919192b082b0819, 0x1919192b192b2b08, 0x1919192b2b2b0819, 0x19192b0808080808,
+    0x19192b0808191908, 0x19192b0819080819, 0x19192b0819190808, 0x19192b082b192b19,
+    0x19192b1908192b2b, 0x19192b1919080808, 0x19192b191908082b, 0x19192b2b2b081919,
+    0x192b080808080819, 0x192b080808081908, 0x192b080808190808, 0x192b080819080808,
+    0x192b080819191908, 0x192b0808192b082b, 0x192b08082b08192b, 0x192b08082b2b2b19,
+    0x192b081908080808, 0x192b082b082b1908, 0x192b082b19082b2b, 0x192b082b2b19082b,
+    0x192b190808080808, 0x192b19080819192b, 0x192b191908190808, 0x192b191919080808,
+    0x192b191919081919, 0x192b19192b2b1908, 0x192b2b0808080819, 0x192b2b08192b2b2b,
+    0x192b2b19082b1919, 0x192b2b2b0808192b, 0x192b2b2b19191908, 0x192b2b2b192b082b,
+    0x2b08080808080808, 0x2b0808080808082b, 0x2b08080808081919, 0x2b08080808082b08,
+    0x2b08080808190819, 0x2b08080808191908, 0x2b080808082b0808, 0x2b080808082b2b2b,
+    0x2b08080819080819, 0x2b08080819081908, 0x2b08080819190808, 0x2b0808082b080808,
+    0x2b0808082b08082b, 0x2b0808082b2b2b08, 0x2b0808082b2b2b2b, 0x2b08081908080819,
+    0x2b08081908081908, 0x2b0808190808192b, 0x2b08081908190808, 0x2b08081919080808,
+    0x2b08081919190819, 0x2b08081919192b19, 0x2b08082b08080808, 0x2b08082b082b0808,
+    0x2b08082b2b080808, 0x2b08082b2b08082b, 0x2b08082b2b2b0808, 0x2b08082b2b2b2b08,
+    0x2b08190808080819, 0x2b08190808081908, 0x2b08190808190808, 0x2b0819080819082b,
+    0x2b08190808191919, 0x2b08190819080808, 0x2b081908192b0808, 0x2b0819082b082b19,
+    0x2b08191908080808, 0x2b08191919081908, 0x2b0819192b2b1919, 0x2b08192b08192b08,
+    0x2b08192b192b2b2b, 0x2b082b0808080808, 0x2b082b0808082b08, 0x2b082b08082b1919,
+    0x2b082b0819192b2b, 0x2b082b082b080808, 0x2b082b082b08082b, 0x2b082b082b2b2b08,
+    0x2b082b190808192b, 0x2b082b2b082b082b, 0x2b082b2b2b080808, 0x2b082b2b2b082b08,
+    0x2b082b2b2b19192b, 0x2b082b2b2b2b2b08, 0x2b19080808080819, 0x2b19080808081908,
+    0x2b19080808190808, 0x2b19080819080808, 0x2b1908081919192b, 0x2b1908082b081908,
+    0x2b19081908080808, 0x2b190819082b082b, 0x2b190819192b1908, 0x2b19082b1919192b,
+    0x2b19082b2b082b19, 0x2b19190808080808, 0x2b19190808081919, 0x2b19190819081908,
+    0x2b19190819190808, 0x2b19190819192b08, 0x2b191919082b2b19, 0x2b1919192b190808,
+    0x2b1919192b19082b, 0x2b19192b19080819, 0x2b192b0819190819, 0x2b192b082b2b192b,
+    0x2b192b1919082b19, 0x2b192b2b08191919, 0x2b192b2b192b0808, 0x2b2b080808080808,
+    0x2b2b08080808082b, 0x2b2b080808082b08, 0x2b2b080808082b2b, 0x2b2b0808082b0808,
+    0x2b2b0808082b2b2b, 0x2b2b08082b2b0808, 0x2b2b081919190819, 0x2b2b081919192b19,
+    0x2b2b08192b2b192b, 0x2b2b082b08080808, 0x2b2b082b0808082b, 0x2b2b082b08082b08,
+    0x2b2b082b082b2b2b, 0x2b2b082b2b080808, 0x2b2b082b2b2b0808, 0x2b2b190819080808,
+    0x2b2b19082b191919, 0x2b2b192b192b1919, 0x2b2b192b2b192b08, 0x2b2b2b0808082b2b,
+    0x2b2b2b08082b0808, 0x2b2b2b08082b082b, 0x2b2b2b08082b2b08, 0x2b2b2b082b2b0808,
+    0x2b2b2b082b2b2b08, 0x2b2b2b1908081908, 0x2b2b2b192b081908, 0x2b2b2b192b08192b,
+    0x2b2b2b2b082b2b08, 0x2b2b2b2b082b2b2b, 0x2b2b2b2b2b190819, 0x2b2b2b2b2b2b2b2b};
+static const uint8_t host_ksigns_iq2xs[128] = {0, 129, 130,   3, 132,   5,   6, 135, 136,   9,  10, 139,  12, 141, 142,  15,
+    144,  17,  18, 147,  20, 149, 150,  23,  24, 153, 154,  27, 156,  29,  30, 159,
+    160,  33,  34, 163,  36, 165, 166,  39,  40, 169, 170,  43, 172,  45,  46, 175,
+     48, 177, 178,  51, 180,  53,  54, 183, 184,  57,  58, 187,  60, 189, 190,  63,
+    192,  65,  66, 195,  68, 197, 198,  71,  72, 201, 202,  75, 204,  77,  78, 207,
+     80, 209, 210,  83, 212,  85,  86, 215, 216,  89,  90, 219,  92, 221, 222,  95,
+     96, 225, 226,  99, 228, 101, 102, 231, 232, 105, 106, 235, 108, 237, 238, 111,
+    240, 113, 114, 243, 116, 245, 246, 119, 120, 249, 250, 123, 252, 125, 126, 255};
diff --git a/sycl/src/kernels/iq_multi_parity.cpp b/sycl/src/kernels/iq_multi_parity.cpp
index 8707d4de53a..466d3f67fc1 100644
--- a/sycl/src/kernels/iq_multi_parity.cpp
+++ b/sycl/src/kernels/iq_multi_parity.cpp
@@ -106,6 +106,32 @@ std::vector<double> dequant_q8_1(const std::vector<uint8_t>& q, size_t n) {
     return v;
 }
 
+#include "iq2xs_host_tables.inc"
+// IQ2_XS decoded on the CPU from ggml's tables (dequantize_row_iq2_xs), a reference independent of the GPU dequantizer
+std::vector<float> host_iq2_xs(const std::vector<uint8_t>& w, size_t n) {
+    std::vector<float> y(n);
+    const size_t nb = n / 256;
+    for (size_t i = 0; i < nb; ++i) {
+        const uint8_t* b = w.data() + i * 74;   // fp16 d, 32 x uint16 qs, 8 scales
+        uint16_t dh; std::memcpy(&dh, b, 2);
+        const float d = k::f32_from_f16(dh);
+        const uint8_t* sc = b + 66;
+        for (int ib = 0; ib < 8; ++ib) {
+            const float db[2] = {d * (0.5f + (sc[ib] & 0xf)) * 0.25f, d * (0.5f + (sc[ib] >> 4)) * 0.25f};
+            for (int l = 0; l < 4; ++l) {
+                uint16_t q; std::memcpy(&q, b + 2 + 2 * (4 * ib + l), 2);
+                const uint64_t g = host_iq2xs_grid[q & 511];
+                const uint8_t signs = host_ksigns_iq2xs[q >> 9];
+                for (int j = 0; j < 8; ++j) {
+                    const float v = (float) ((g >> (8 * j)) & 0xff);
+                    y[i * 256 + ib * 32 + l * 8 + j] = db[l / 2] * v * ((signs >> j) & 1 ? -1.f : 1.f);
+                }
+            }
+        }
+    }
+    return y;
+}
+
 // ------------------------------------------------------------------------------------------------ (1) iq_mmvq
 void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
                 std::mt19937 &rng) {
@@ -148,6 +174,19 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
            (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(xq.data(), dxq, xq_bytes).wait()),
        "xq");
     const auto xd = dequant_q8_1(xq, (size_t) max_cols * n_in);
+    std::vector<float> hw;
+    if (t == 17) {   // IQ2_XS: the GPU dequantizer against the CPU decode
+        hw = host_iq2_xs(w, (size_t) n_out * n_in);
+        double md = 0, mx = 0;
+        size_t nd = 0;
+        for (size_t i = 0; i < hw.size(); ++i) {
+            md = std::max(md, (double) std::fabs(hw[i] - wf[i]));
+            mx = std::max(mx, (double) std::fabs(hw[i]));
+            nd += hw[i] != wf[i];
+        }
+        std::printf("  IQ2_XS GPU dequant vs CPU decode: %zu of %zu differ, worst %.3g (max |w| %.3g); w[0..3] cpu %g %g %g %g gpu %g %g %g %g\n",
+                    nd, hw.size(), md, mx, hw[0], hw[1], hw[2], hw[3], wf[0], wf[1], wf[2], wf[3]);
+    }
     float* dy_old = dalloc<float>((size_t) max_cols * n_out);
     float* dy_new = dalloc<float>((size_t) max_cols * n_out);
     std::vector<float> y_old((size_t) max_cols * n_out), y_new(y_old.size());
@@ -190,6 +229,16 @@ void check_mmvq(int t, int n_in, int n_out, dpct::queue_ptr s,
                 den += std::fabs(acc);
             }
         const double rel = num / (den + 1e-30);
+        if (t == 17 && nc == 1) {
+            double hn = 0, hd = 0;
+            for (int r = 0; r < n_out; ++r) {
+                double acc = 0;
+                for (int i = 0; i < n_in; ++i) acc += (double) hw[(size_t) r * n_in + i] * xd[(size_t) i];
+                hn += std::fabs(y_new[(size_t) r] - acc); hd += std::fabs(acc);
+            }
+            std::printf("  IQ2_XS mmvq vs the CPU-decode reference: rel %.2e; y[0..2] gpu %g %g %g\n", hn / (hd + 1e-30),
+                        y_new[0], y_new[1], y_new[2]);
+        }
         worst = std::max(worst, rel);
         if (diff != 0 || !finite || !(rel < 1e-2)) {
             std::printf("  %-8s %5d x %5d  ncols %2d: %zu outputs differ from the old kernel, ref rel %.2e%s  FAIL\n",
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index c0322e962cb..3a16981703c 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -2276,7 +2276,29 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         };
                         const int64_t bgu = bad(m.GU, T * K * 1280), bdm = bad(m.Dm, T * K * N), bbo = bad(m.bo, T * N);
                         const int64_t bh = m.H ? bad(m.H, T * K * 640) : -1;
+                        // the fp16 inputs of the experts' GEMMs: the gathered activations and the last dequantized
+                        // gate/up (non-finite count, largest finite magnitude)
+                        auto bad16 = [&](const uint16_t* d, int64_t n, double& mx) {
+                            std::vector<uint16_t> h((size_t) n);
+                            dpct::get_in_order_queue().memcpy(h.data(), d, (size_t) n * 2).wait();
+                            int64_t c = 0;
+                            mx = 0;
+                            for (uint16_t v : h) {
+                                if ((v & 0x7c00) == 0x7c00) { ++c; continue; }
+                                const int e = (v >> 10) & 0x1f;
+                                const double a = e ? std::ldexp(1.0 + (v & 0x3ff) / 1024.0, e - 15) : std::ldexp((v & 0x3ff) / 1024.0, -14);
+                                mx = std::max(mx, a);
+                            }
+                            return c;
+                        };
+                        double mxs = 0, mxq = 0;
+                        const int64_t bxs = (!use_mmq && m.Xs) ? bad16(m.Xs, T * K * N, mxs) : -1;
+                        const int64_t bdq = (!use_mmq && m.dq_gu[0]) ? bad16(m.dq_gu[0], (int64_t) 1280 * N, mxq) : -1;
                         static int64_t reported = -1;
+                        if ((bgu || bdm || bbo || bh > 0) && reported != stats_.chunks)
+                            std::fprintf(stderr, "strata dbg: layer %lld fp16 inputs: activations %lld non-finite (max %.3g), "
+                                         "dequantized gate/up %lld non-finite (max %.3g)\n", (long long) l, (long long) bxs, mxs,
+                                         (long long) bdq, mxq);
                         if ((bgu || bdm || bbo || bh > 0) && reported != stats_.chunks) {
                             reported = stats_.chunks;
                             std::fprintf(stderr, "strata dbg: layer %lld (mmq %d, types %d/%d, %zu experts): non-finite GU %lld "

From 57bd713454ddb4b965f994e95d95cacd68c93fb1 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Fri, 2 Oct 2026 03:49:48 -0500
Subject: [PATCH 057/201] sycl: pipeline the expert cache's profile fill (model
 load 3-4x faster)

The fill from the GGUF (--stream-experts) read each expert's three slices,
copied the blob and waited for the copy before the next read: ~12,000-18,500
experts with neither the SSD nor PCIe kept busy. Now the slots are admitted
in profile order first (same placement), reads go in file order by up to 8
threads into page-locked batches of 64, and a batch's copies overlap the next
batch's reads. STRATA_FILL_SERIAL=1 keeps the serial fill.

Tested on the B70: cold page cache, Coder fill 23.4 GiB 76.2 s -> 18.8 s;
launch to first token Coder 82 s -> 26 s, IQ2_XS 120 s -> 41 s; outputs
identical to the serial fill.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 |  8 ++++
 sycl/src/program/generate.cpp | 71 ++++++++++++++++++++++++++++++++++-
 2 files changed, 78 insertions(+), 1 deletion(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 046f441c5d8..dcec06a1421 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -542,6 +542,14 @@ family, the same GSQ-RCO layout) decoded token 0 forever: NaN logits from layer
 
 Swift 1.5 IQ2_XS after both: correct answers, 51-118 words of thinking on short questions, 48 tok/s raw decode.
 
+**Load time (2026-10-02).** Starting a model is mostly the expert cache's fill from the GGUF (`--stream-experts`):
+the Coder's 23.4 GiB of experts took 64-76 s, the IQ2_XS's 24.9 GiB 91 s, because the fill read each expert's
+three slices, copied the blob and waited for the copy before the next read. It is a pipeline now: the slots are
+admitted in profile order first (the same placement), the reads go in file order by up to 8 threads into
+page-locked batches of 64, and a batch's copies run while the next one is read. Cold page cache: 76.2 s -> 18.8 s
+(0.33 -> 1.34 GB/s); a whole Coder start from the engine's launch to its first token 82 s -> 26 s, the IQ2_XS
+120 s -> 41 s (its 8.2 GB host mirror is ~9 s of the rest). Output identical. `STRATA_FILL_SERIAL=1` is the old fill.
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index ff7806f75c2..9330093140d 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -3106,7 +3106,71 @@ int main(int argc, char **argv) try {
         const bool per_layer = xcache.per_layer_admission();
         const int64_t want = per_layer ? (int64_t) profile.size()
                                        : std::min<int64_t>((int64_t) profile.size(), xcache.slots());
-        for (int64_t i = 0; i < want; ++i) {
+        const auto tfill = std::chrono::steady_clock::now();
+        uint64_t fill_bytes = 0;
+        // SYCL port: from the GGUF (--stream-experts) the fill is a pipeline. The serial form read each expert's three
+        // slices, copied it, and waited for the copy before the next read (~18,000 experts, neither the SSD nor PCIe
+        // kept busy). Here the slots are admitted first (the same profile order, so the same placement), the reads go
+        // in file order by worker threads into page-locked batches, and a batch's copies run while the next batch is
+        // read. STRATA_FILL_SERIAL=1: the serial form.
+        const bool piped = srcp == &gguf_src && !per_layer && std::getenv("STRATA_FILL_SERIAL") == nullptr;
+        if (piped) {
+            struct Fill { int32_t slot; int32_t l, e; };
+            std::vector<Fill> fills;
+            fills.reserve((size_t) want);
+            for (int64_t i = 0; i < want; ++i) {
+                const int32_t slot = xcache.admit(profile[(size_t) i].first, profile[(size_t) i].second);
+                if (slot == strata::core::kNotResident) break;
+                fills.push_back({slot, (int32_t) profile[(size_t) i].first, (int32_t) profile[(size_t) i].second});
+            }
+            std::sort(fills.begin(), fills.end(), [](const Fill& a, const Fill& b) {
+                return a.l != b.l ? a.l < b.l : a.e < b.e;   // file order: each tensor read front to back
+            });
+            const auto& lay = strata::kernels::cpu::expert_layout();
+            constexpr size_t kBatch = 64;
+            const size_t blob_cap = (size_t) lay.max_blob;
+            sycl::queue& q = dpct::get_in_order_queue();
+            uint8_t* pin = sycl::malloc_host<uint8_t>(2 * kBatch * blob_cap, q);
+            if (pin == nullptr) {
+                std::fprintf(stderr, "strata generate: the profile fill could not pin %zu MiB\n",
+                             (2 * kBatch * blob_cap) >> 20);
+                return 1;
+            }
+            const int nthreads = std::max(2, std::min(8, (int) std::thread::hardware_concurrency()));
+            sycl::event done[2];
+            bool read_ok = true;
+            for (size_t b0 = 0, k = 0; b0 < fills.size() && read_ok; b0 += kBatch, ++k) {
+                const size_t n = std::min(kBatch, fills.size() - b0);
+                uint8_t* set = pin + (k % 2) * kBatch * blob_cap;
+                done[k % 2].wait();                       // the copies that last read this half are finished
+                std::atomic<size_t> next{0};
+                std::atomic<bool> ok{true};
+                std::vector<std::thread> ts;
+                for (int t = 0; t < nthreads; ++t)
+                    ts.emplace_back([&] {
+                        for (size_t j; (j = next.fetch_add(1)) < n;) {
+                            const Fill& f = fills[b0 + j];
+                            if (!gguf_src.read_into(f.l, f.e, set + j * blob_cap, blob_cap)) ok = false;
+                        }
+                    });
+                for (auto& t : ts) t.join();
+                if (!ok) { read_ok = false; break; }
+                for (size_t j = 0; j < n; ++j) {
+                    const Fill& f = fills[b0 + j];
+                    const size_t nb = (size_t) lay.blob_bytes(f.l);
+                    done[k % 2] = q.memcpy(xcache.device_slot(f.slot), set + j * blob_cap, nb);
+                    fill_bytes += nb;
+                }
+            }
+            q.wait();
+            sycl::free(pin, q);
+            if (!read_ok) {
+                std::fprintf(stderr, "strata generate: the profile fill could not read an expert from the GGUF\n");
+                return 1;
+            }
+            prefilled = (int64_t) fills.size();
+        }
+        for (int64_t i = 0; i < want && !piped; ++i) {
             const int32_t slot = xcache.admit(profile[(size_t) i].first, profile[(size_t) i].second);
             if (slot == strata::core::kNotResident) {
                 if (per_layer) continue;
@@ -3120,7 +3184,12 @@ int main(int argc, char **argv) try {
                 return 1;
             }
             ++prefilled;
+            fill_bytes += (uint64_t) strata::kernels::cpu::expert_layout().blob_bytes(profile[(size_t) i].first);
         }
+        const double fill_s = std::chrono::duration<double>(std::chrono::steady_clock::now() - tfill).count();
+        std::fprintf(stderr, "strata generate: profile fill: %.2f GiB in %.1f s (%.2f GB/s, %s)\n",
+                     (double) fill_bytes / 1073741824.0, fill_s, fill_s > 0 ? (double) fill_bytes / 1e9 / fill_s : 0.0,
+                     piped ? "pipelined" : "serial");
         // **AND ONE SLOT IS READ BACK AND COMPARED.**  A residency table that is right about indices and wrong
         // about bytes produces a plausible token, which is this project's most expensive failure mode; the
         // cache's own `verify_slot` is the check and it costs one 1.38 MB D2H at startup.

From 41ad902b80e765b88c28d4cfafbdb12d36a6cefc Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Fri, 2 Oct 2026 09:36:13 -0500
Subject: [PATCH 058/201] sycl: port upstream 0.1.35 (re-migration of its
 changed engine files)

device, expert_source, native_head, prefill gemm, prefill.cpp, generate.cpp
merged from dpct of aeb35be and d9ab843 with sycl/tools/merge_upstream.py (the
3-way merge restricted to files upstream changed, dpct kernel-name hashes
canonicalized to the port's). Version 0.1.35.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 sycl/CMakeLists.txt             |   2 +-
 sycl/src/core/device.dp.cpp     |  51 ++++++++
 sycl/src/core/expert_source.cpp |  34 +++++-
 sycl/src/core/native_head.cpp   |  29 ++++-
 sycl/src/prefill/gemm.dp.cpp    |  21 ++++
 sycl/src/prefill/prefill.cpp    |   6 +-
 sycl/src/program/generate.cpp   | 199 ++++++++++++++++++++++----------
 sycl/tools/merge_upstream.py    |  37 ++++++
 8 files changed, 307 insertions(+), 72 deletions(-)
 create mode 100644 sycl/tools/merge_upstream.py

diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index 1bda26d6528..db55f9409ca 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.33 LANGUAGES C CXX)   # the upstream engine version this port tracks
+project(strata_sycl VERSION 0.1.35 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
index fad48c260bb..a01a6cb6388 100644
--- a/sycl/src/core/device.dp.cpp
+++ b/sycl/src/core/device.dp.cpp
@@ -90,6 +90,57 @@ const char* compiled_gpu_archs() {
 #endif
 }
 
+int device_count() try {
+    int count = 0;
+    if (DPCT_CHECK_ERROR(count = dpct::device_count()) !=
+        0) { // HIP without a usable device reports an error, not 0
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        return 0;
+    }
+    return count < 0 ? 0 : count;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool device_summary(int ordinal, std::string &name, std::string &detail) try {
+    dpct::device_info p{};
+    if (ordinal < 0 || ordinal >= device_count() ||
+        DPCT_CHECK_ERROR(dpct::get_device(ordinal).get_device_info(p)) != 0) {
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        return false;
+    }
+    char buf[160];
+#if defined(STRATA_USE_HIP)
+    std::snprintf(buf, sizeof(buf), "arch %s, %.1f GiB, wave%d", base_arch(p.gcnArchName).c_str(),
+                  (double) p.totalGlobalMem / (1024.0 * 1024 * 1024), p.warpSize);
+#else
+    /*
+    DPCT1005: The SYCL device version is different from CUDA Compute
+    Compatibility. You may need to rewrite this code.
+    */
+    std::snprintf(buf, sizeof(buf), "compute capability %d.%d, %.1f GiB",
+                  p.get_major_version(), p.get_minor_version(),
+                  (double)p.get_global_mem_size() / (1024.0 * 1024 * 1024));
+#endif
+    name = p.get_name();
+    detail = buf;
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 std::string gpu_arch_problem(int ordinal) {
 #if defined(STRATA_USE_HIP)
     int count = 0;
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index 6ba5598e945..645b2cfb6c0 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -1054,6 +1054,22 @@ bool FileExpertSource::pin_cache_complement(
     uint64_t bytes = 0;
     if (!detail::make_cache_complement_plan(n_layers_, n_expert_, layer_blob_bytes_, primary_gpu_pairs,
                                             additional_gpu_pairs, offsets, bytes, err)) return false;
+#if defined(_WIN32)
+    // #467: the GPU cache's pre-fill touched its experts through the mapping (~19 GiB on a 24 GB card), and Windows
+    // counts those file pages in this process's working set, not as available: a 32 GB PC read 0.44 GiB here
+    // (20.7 GiB before the start).  Trimmed, they move to the standby list (still cached, counted as available).
+    // Resident mode only: nothing else calls this function.  Locked/pinned pages stay; the rest fault back softly.
+    {
+        uint64_t before = 0, after = 0;
+        const bool read_before = available_memory_bytes(before);
+        (void) SetProcessWorkingSetSize(GetCurrentProcess(), (SIZE_T) -1, (SIZE_T) -1);
+        if (read_before && available_memory_bytes(after))
+            std::fprintf(stderr, "FileExpertSource: available RAM %.2f GiB, %.2f GiB after the mapped experts left the "
+                                 "process working set (#467)\n",
+                         (double) before / 1073741824.0, (double) after / 1073741824.0);
+    }
+#endif
+    const bool what_fits = budget_bytes == kResidentWhatFits;   // #467: the soft mode's second try
     uint64_t budget_physical = 0;   // #403: the RAM reading a budget was sized from (0: no budget)
     if (budget_bytes > 0) {
         // CS-T: a RAM budget.  The complement's experts in `rank` order (the expert profile, hottest first) while
@@ -1071,10 +1087,16 @@ bool FileExpertSource::pin_cache_complement(
             // lower).  An unclamped budget is unchanged.
             const uint64_t margin = 256ull << 20;
             const uint64_t clamped = room > margin ? room - margin : 0;
-            std::fprintf(stderr, "FileExpertSource: --resident-budget-gib %.2f is more than the RAM has room for "
-                                 "(%.2f GiB available minus %.0f GiB headroom and a 0.25 GiB margin): %.2f GiB\n",
-                         (double) budget_bytes / 1073741824.0, (double) physical / 1073741824.0,
-                         (double) headroom_bytes / 1073741824.0, (double) clamped / 1073741824.0);
+            if (what_fits)
+                std::fprintf(stderr, "FileExpertSource: RAM room for the complement: %.2f GiB (%.2f GiB available "
+                                     "minus %.0f GiB headroom and a 0.25 GiB margin)\n",
+                             (double) clamped / 1073741824.0, (double) physical / 1073741824.0,
+                             (double) headroom_bytes / 1073741824.0);
+            else
+                std::fprintf(stderr, "FileExpertSource: --resident-budget-gib %.2f is more than the RAM has room for "
+                                     "(%.2f GiB available minus %.0f GiB headroom and a 0.25 GiB margin): %.2f GiB\n",
+                             (double) budget_bytes / 1073741824.0, (double) physical / 1073741824.0,
+                             (double) headroom_bytes / 1073741824.0, (double) clamped / 1073741824.0);
             budget_bytes = clamped;
         }
         std::vector<uint64_t> ranked(offsets.size(), kNoComplement);
@@ -1091,6 +1113,10 @@ bool FileExpertSource::pin_cache_complement(
                 at += b;
                 ++held;
             }
+        if (what_fits && held == 0) {   // #467: nothing to keep - the caller's plain mmap fallback, not an empty copy
+            err = "FileExpertSource: the RAM has no room for any expert of the complement";
+            return false;
+        }
         std::fprintf(stderr, "FileExpertSource: RAM budget %.2f GiB: %lld of the %.2f GiB of experts the GPU cache does "
                              "not hold, by profile rank; the rest are read from the files\n",
                      (double) budget_bytes / 1073741824.0, (long long) held, (double) bytes / 1073741824.0);
diff --git a/sycl/src/core/native_head.cpp b/sycl/src/core/native_head.cpp
index fd3f2bfea5c..6b5a938f5f1 100644
--- a/sycl/src/core/native_head.cpp
+++ b/sycl/src/core/native_head.cpp
@@ -210,10 +210,10 @@ bool NativeEmbed::load(const std::vector<std::string> &shards, int64_t n_embd,
                                      bytes_, dpct::get_in_order_queue())) !=
                     0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     d, gguf.tensor_data(*t), bytes_).wait()) != 0) {
@@ -233,10 +233,31 @@ bool NativeEmbed::load(const std::vector<std::string> &shards, int64_t n_embd,
         } else {
             std::memcpy(host_, gguf.tensor_data(*t), bytes_);
             void* d = nullptr;
+#if defined(STRATA_USE_HIP)
+            // #325: the Windows HIP stack can refuse the device alias of a mapped allocation (and, when it gives
+            // one, it is the host address itself - unified addressing; kernels read it correctly there, a
+            // device-to-device copy into it does not land: tests/hip/mapped_alias). The table is only gathered from,
+            // so without an alias it goes into VRAM like the unpinnable case above, instead of failing the start.
+            if (cudaHostGetDevicePointer(&d, host_, 0) != cudaSuccess || d == nullptr) {
+                cudaGetLastError();
+                d = nullptr;
+                if (cudaMalloc(&d, bytes_) != cudaSuccess ||
+                    cudaMemcpy(d, gguf.tensor_data(*t), bytes_, cudaMemcpyHostToDevice) != cudaSuccess) {
+                    if (d) cudaFree(d);
+                    cudaGetLastError();
+                    err = "native embedding: no device alias for the mapped table, and no VRAM to copy it into";
+                    return false;
+                }
+                cudaFreeHost(host_);   // the destructor frees dev_ when host_ is null
+                host_ = nullptr;
+                std::fprintf(stderr, "strata: native embedding: no device alias for the mapped table, kept in VRAM\n");
+            }
+#else
             if (DPCT_CHECK_ERROR(d = (void *)host_) != 0) {
                 err = "native embedding: no device alias for the mapped table";
                 return false;
             }
+#endif
             dev_ = d;
         }
         type_ = (int) t->type;
diff --git a/sycl/src/prefill/gemm.dp.cpp b/sycl/src/prefill/gemm.dp.cpp
index 50d8541a578..c4069b684ab 100644
--- a/sycl/src/prefill/gemm.dp.cpp
+++ b/sycl/src/prefill/gemm.dp.cpp
@@ -45,6 +45,23 @@ void ck(int s, const char *what) {
     }
 }
 
+// #247/#325: on Windows (seen on gfx1201), hipBLAS can return success with the correct BF16/FP16 product for some
+// shapes (hc up once T >= 96, the router) and still leave hipErrorInvalidValue set, which the next kernel's error
+// check turns into an exit. The multiply has finished, so that one stale error is cleared after a GEMM that succeeded;
+// any other error still stops the engine. Windows only: on Linux a stale hipErrorInvalidValue is a real error from
+// an earlier call and keeps being reported. A no-op everywhere else (CUDA compiles none of it).
+#if defined(__HIPCC__) && defined(_WIN32)
+void absorb_hipblas_sticky(const char* what) {
+    const hipError_t sticky = hipGetLastError();
+    if (sticky == hipSuccess || sticky == hipErrorInvalidValue) return;
+    std::fprintf(stderr, "prefill gemm: %s left %s\n", what, hipGetErrorString(sticky));
+    std::exit(1);
+}
+#define STRATA_ABSORB_HIPBLAS_STICKY(what) absorb_hipblas_sticky(what)
+#else
+#define STRATA_ABSORB_HIPBLAS_STICKY(what) ((void) 0)
+#endif
+
 // A setup call whose failure the engine survives (the handle keeps its defaults), as before #240 - but said.
 void note(int s, const char *what) {
     if (s != 0) std::fprintf(
@@ -429,6 +446,7 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
     if (try_hipblaslt(hipblaslt_state_, strata::prefill::hipblaslt::InputType::bf16, X, W, Y, T, N, K, ldy,
                       beta, stream_)) {
+        STRATA_ABSORB_HIPBLAS_STICKY("hipBLASLt bf16");
         return;
     }
 #endif
@@ -441,6 +459,7 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
            dpct::library_data_t::real_float, (int)ldy,
            dpct::compute_type::f32)),
        "cublasGemmEx");
+    STRATA_ABSORB_HIPBLAS_STICKY("cublasGemmEx");
 }
 
 void Gemm::f16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy,
@@ -451,6 +470,7 @@ void Gemm::f16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
     if (try_hipblaslt(hipblaslt_state_, strata::prefill::hipblaslt::InputType::f16, X, W, Y, T, N, K, ldy,
                       beta, stream_)) {
+        STRATA_ABSORB_HIPBLAS_STICKY("hipBLASLt f16");
         return;
     }
 #endif
@@ -462,6 +482,7 @@ void Gemm::f16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_
            dpct::library_data_t::real_float, (int)ldy,
            dpct::compute_type::f32)),
        "cublasGemmEx f16");
+    STRATA_ABSORB_HIPBLAS_STICKY("cublasGemmEx f16");
 }
 
 void Gemm::native(const uint16_t* X, int ggml_type, const void* W_blocks, float* Y, int64_t T, int64_t N, int64_t K,
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 3a16981703c..9aeeec065ba 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -49,6 +49,7 @@
 namespace strata::prefill::mmq {
 bool built() { return false; }
 bool supported(int) { return false; }
+bool fits(int, int64_t) { return false; }
 size_t matrix_bytes(int, int64_t, int64_t) { return 0; }
 size_t q8_bytes(int64_t, int64_t) { return 0; }
 void quantize(const float*, const int32_t*, void*, int, int64_t, int64_t, int64_t, void*) {}
@@ -547,7 +548,8 @@ const MmqPlan& mmq_plan() {
         p.fallback = !on || layers <= 0;
         for (int64_t l = 0; on && l < layers; ++l) {
             const int gt = lay.native ? lay.fmt[(size_t) l].gu_type : 42, dt = lay.native ? lay.fmt[(size_t) l].d_type : 42;
-            if (!mmq::supported(gt) || !mmq::supported(dt)) { p.fallback = true; continue; }
+            // #420: a tile on every GPU for these shapes (gate+up: 1280 rows, down: N rows), else the FP16 path
+            if (!mmq::fits(gt, 1280) || !mmq::fits(dt, N)) { p.fallback = true; continue; }
             p.layer[(size_t) l] = 1;
             p.any = true;
             p.gu_max = std::max(p.gu_max, mmq::matrix_bytes(gt, 1280, N));
@@ -912,7 +914,7 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
     // E-9: the drafter's Q8_0 matrices through Q8_1 x Q8_0 MMQ - its own pass's integer dot products (mmvq), so
     // its K/V stay close to what the drafter computes itself; STRATA_MTP_BATCH_F16=1: FP16 GEMMs (the A/B)
     static const bool f16_only = [] { const char* v = std::getenv("STRATA_MTP_BATCH_F16"); return v && v[0] == '1'; }();
-    const bool q8 = !f16_only && mmq::built() && mmq::supported(kQ8_0);
+    const bool q8 = !f16_only && mmq::built() && mmq::fits(kQ8_0, Nn) && mmq::fits(kQ8_0, KV);   // #420
     const uint64_t per_row = 4 * (2 * Nn + 4 * HCN + LR + HC + Nn + 2 * KV + 1) + 2 * (Nn + 2 * HCN + LR + Nn) + 64 +
                              (q8 ? (uint64_t) mmq::q8_bytes(g.hc, Nn) + 4 * g.hc : 0);
     // SYCL port: B is the batch buffers' capacity, not the row count (each batch uses nb <= B rows), so a short
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 9330093140d..75a3304f849 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -2370,10 +2370,10 @@ int main(int argc, char **argv) try {
                     st.mrope = sycl::malloc_device<int32_t>(
                         mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st.mrope, mrope_host.data(),
@@ -2742,22 +2742,30 @@ int main(int argc, char **argv) try {
             DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) == 0 &&
             DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(p)) == 0;
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use
-        the error codes. The cudaGetLastError function call was replaced with 0.
-        You need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
         */
         if (!named) 0;
         const char *name =
             named && p.get_name()[0] ? p.get_name() : "(an unnamed GPU)";
 #if defined(STRATA_USE_HIP)
         std::fprintf(stderr, "strata generate: GPU %d: %s (%s)\n", dev, name, named ? p.gcnArchName : "?");
+#if defined(_WIN32)
+        // #468 #461: which HIP runtime was loaded - the bundled one beside the exe, or an AMD driver's System32 copy
+        if (HMODULE h = GetModuleHandleA("amdhip64_7.dll")) {
+            char path[MAX_PATH] = {};
+            if (GetModuleFileNameA(h, path, MAX_PATH) > 0)
+                std::fprintf(stderr, "strata generate: HIP runtime %s\n", path);
+        }
+#endif
 #else
         std::fprintf(
             stderr, "strata generate: GPU %d: %s, compute capability %d.%d%s\n",
             dev, name,
             /*
-            DPCT1005: The SYCL device version is different from CUDA
-            Compute Compatibility. You may need to rewrite this code.
+            DPCT1005: The SYCL device version is different from CUDA Compute
+            Compatibility. You may need to rewrite this code.
             */
             strata::cc_major_of(p.get_major_version()),
             strata::cc_minor_of(p.get_minor_version()),
@@ -3422,8 +3430,8 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: routing-aware prefetch of the file tier on (the next layer's router)\n");
         } else {
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not
-            use the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             (void)0;
@@ -3654,11 +3662,10 @@ int main(int argc, char **argv) try {
         } else {
             for (int64_t c = 0; c < g.hc; ++c)
                 /*
-                DPCT1124: cudaMemcpyAsync is migrated to asynchronous
-                memcpy API. While the origin API might be synchronous, it
-                depends on the type of operand memory, so you may need to call
-                wait() on event return by memcpy API to ensure synchronization
-                behavior.
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 if (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
                         ss.R + (size_t)c * g.n_embd, d_emb,
@@ -3950,8 +3957,8 @@ int main(int argc, char **argv) try {
             real error-handling function.
             */
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not
-            use the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             std::fprintf(stderr,
@@ -3998,9 +4005,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and
-                    does not use the error codes. The cudaGetLastError function
-                    call was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -4020,9 +4027,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and
-                    does not use the error codes. The cudaGetLastError function
-                    call was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -4110,10 +4117,10 @@ int main(int argc, char **argv) try {
                     st->d_res = sycl::malloc_device<int32_t>(
                         host_res.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st->d_res, host_res.data(),
@@ -4261,8 +4268,26 @@ int main(int argc, char **argv) try {
             const int64_t k = plan_lend(chunk);
             if (k > 0) lend_from = xcache.slots() - k;
         }
-        if (src.pin_cache_complement(xcache, err, o.resident_pin, {}, lend_from, o.resident_headroom,
-                                     o.resident_budget, &profile)) {
+        bool resident_ok = src.pin_cache_complement(xcache, err, o.resident_pin, {}, lend_from, o.resident_headroom,
+                                                    o.resident_budget, &profile);
+        std::string whole_err;
+        if (!resident_ok && o.resident_soft) {
+            // #467: the whole complement does not fit - keep what does, the hottest by the profile, through the #403
+            // budget path (sized by the RAM alone) instead of none: the misses outside it read the same file bytes
+            // the mmap fallback reads, so the answers are unchanged.  Nothing pinned: the old fallback below.
+            whole_err = err;
+            resident_ok = src.pin_cache_complement(xcache, err, o.resident_pin, {}, -1, o.resident_headroom,
+                                                   strata::core::FileExpertSource::kResidentWhatFits, &profile);
+            if (resident_ok)
+                std::fprintf(stderr, "strata generate: WARNING: the whole resident RAM mode does not fit (%s); %.2f "
+                                     "GiB of the experts the GPU does not hold, the hottest by the expert profile, are "
+                                     "kept in RAM and the rest are read from the model folder through the OS file "
+                                     "cache\n",
+                             whole_err.c_str(), (double) src.resident_bytes() / 1073741824.0);
+            else
+                err = whole_err + "; " + err;
+        }
+        if (resident_ok) {
             if (o.adapt_every > 0 && o.adapt_swaps > 0 &&
                 !src.reserve_exchanges(std::min<int64_t>(o.adapt_swaps, 96), err)) {
                 std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
@@ -4368,24 +4393,76 @@ int main(int argc, char **argv) try {
             // 128-slot floor.  The percentage cap is an AUTO-chunk rule and only the auto scan applies it - an
             // explicit --prefill is the operator's number, and a loan of it only has to fit.  With one participant
             // (no split) this reduces to plan_lend exactly, so the single-GPU loan is unchanged from main.
-            auto fits = [&](int64_t c, bool cap) -> bool {
-                for (const PfPart& p : pf_parts) {
-                    const int64_t k = part_slots(p, c);
-                    if (k <= 0 || k + 128 > p.cache->slots()) return false;
-                    if (cap && k * 100 > kAutoLendPct * p.cache->slots()) return false;
-                }
+            auto fits_one = [&](const PfPart& p, int64_t c, bool cap) -> bool {
+                const int64_t k = part_slots(p, c);
+                if (k <= 0 || k + 128 > p.cache->slots()) return false;
+                return !(cap && k * 100 > kAutoLendPct * p.cache->slots());
+            };
+            // `only`: CUDA0's cache alone (#448: what one GPU would choose, for the log below); null: every one
+            auto fits = [&](int64_t c, bool cap, const PfPart* only = nullptr) -> bool {
+                if (only != nullptr) return fits_one(*only, c, cap);
+                for (const PfPart& p : pf_parts)
+                    if (!fits_one(p, c, cap)) return false;
                 return true;
             };
             static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
-            int64_t chunk = 0;
-            if (o.prefill_auto) {
-                for (const int64_t c : kAutoChunks) {
-                    if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
-                    if (fits(c, true)) { chunk = c; break; }
+            auto pick = [&](const PfPart* only) -> int64_t {
+                if (o.prefill_auto) {
+                    for (const int64_t c : kAutoChunks) {
+                        if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
+                        if (fits(c, true, only)) return c;
+                    }
+                } else {
+                    for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
+                        if (fits(c, false, only)) return c;
+                }
+                return 0;
+            };
+            const int64_t chunk = pick(nullptr);
+            // #448: a small card in a layer split caps every stage's chunk (an RTX 3080's 512-slot cache held a
+            // 32 GB card's split to 512 tokens: prompts 6.2x slower, decode the same).  Named when it bites, so the
+            // regression is one log line: each stage that cannot fund the chunk CUDA0 alone would read in.
+            if (pf_parts.size() > 1) {
+                const int64_t alone = pick(&pf_parts[0]);
+                if (alone > chunk) {
+                    for (size_t i = 1; i < pf_parts.size(); ++i) {
+                        const PfPart& p = pf_parts[i];
+                        if (fits_one(p, alone, o.prefill_auto)) continue;
+                        const int dev = p.dev < 0 ? 0 : p.dev;
+                        dpct::device_info prop{};
+                        if (DPCT_CHECK_ERROR(
+                                dpct::get_device(dev).get_device_info(prop)) !=
+                            0) {
+                            /*
+                            DPCT1010: SYCL uses exceptions to report errors
+                            and does not use the error codes. The
+                            cudaGetLastError function call was replaced with 0.
+                            You need to rewrite this code.
+                            */
+                            (void)0;
+                            prop.get_name()[0] = 0;
+                        }
+                        const std::string pct =
+                            o.prefill_auto ? ", and lend at most " + std::to_string(kAutoLendPct) + "%" : "";
+                        std::fprintf(
+                            stderr,
+                            "strata serve: WARNING: prompt chunk %lld tokens, "
+                            "not %lld: CUDA%d (%s) "
+                            "has %lld expert-cache slots, and a %lld-token "
+                            "chunk borrows %lld of them "
+                            "(it must keep 128%s) - prompts read slower than "
+                            "on CUDA0 alone (#448)\n",
+                            (long long)chunk, (long long)alone, dev,
+                            prop.get_name(), (long long)p.cache->slots(),
+                            (long long)alone, (long long)part_slots(p, alone),
+                            pct.c_str());
+                        // the helper tiers start at CUDA1 without a split (and are enabled in order)
+                        std::fprintf(stderr, "strata serve:   a card this small can serve as a helper expert cache "
+                                             "instead of a split stage: without --layer-split, with %s "
+                                             "(docs/SECOND_GPU.md)\n",
+                                     dev == 1 ? "--expert-cache-device1 N" : "--expert-cache-device1..3 N, in order");
+                    }
                 }
-            } else {
-                for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
-                    if (fits(c, false)) { chunk = c; break; }
             }
             if (chunk > 0) {
                 if (o.prefill_auto)
@@ -4569,16 +4646,16 @@ int main(int argc, char **argv) try {
                     const strata::core::OnDevice on(stp->dev);
                     stp->sp.reset();
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and
-                    does not use the error codes. The cudaGetLastError function
-                    call was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
                     */
                     (void)0;
                 }
                 sp.reset();
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does
-                not use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
@@ -5004,10 +5081,10 @@ int main(int argc, char **argv) try {
             try {
         if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
@@ -6557,8 +6634,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does
-                not use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (long long)pos, dpct::get_error_string_dummy(0));
@@ -6633,8 +6710,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does
-                not use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 dpct::get_error_string_dummy(0));
@@ -6779,10 +6856,10 @@ int main(int argc, char **argv) try {
             pending.clear();
             if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization
-                memcpy, assuming in the original code the source host memory is
-                pageable memory. If the memory is not pageable, call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+                assuming in the original code the source host memory is pageable
+                memory. If the memory is not pageable, call wait() on event
+                return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
diff --git a/sycl/tools/merge_upstream.py b/sycl/tools/merge_upstream.py
new file mode 100644
index 00000000000..3306ed2d6b9
--- /dev/null
+++ b/sycl/tools/merge_upstream.py
@@ -0,0 +1,37 @@
+# merge_sel.py BASE_OUT NEW_OUT OLD_REV NEW_REV: 3-way merge into sycl/ of the files upstream changed OLD_REV..NEW_REV
+import re, subprocess, sys, os, shutil
+B, N, old, new = sys.argv[1:5]
+pat = re.compile(r"\b([A-Za-z0-9_]+)_([0-9a-f]{6})\b")
+H = lambda t: pat.sub(lambda m: m.group(1) + "_HASH", t)
+def hashes(t):
+    m = {}
+    for a, h in pat.findall(t): m.setdefault(a, set()).add(h)
+    return {a: next(iter(v)) for a, v in m.items() if len(v) == 1}
+changed = subprocess.check_output(["git", "diff", "--name-only", old, new, "--", "src", "include"], text=True).split()
+HAND = {"src/core/mtp.cpp", "src/core/verify.cpp", "src/ngram/ple_reader.cpp", "src/kernels/native_expert_parity.cpp"}
+for f in changed:
+    rel = f[:-3] + ".dp.cpp" if f.endswith(".cu") else f
+    pf = "sycl/" + rel
+    if f in HAND:
+        if not os.path.exists(pf): print("HAND-MISSING", f); continue
+        open("/tmp/_b", "w").write(subprocess.check_output(["git", "show", f"{old}:{f}"], text=True))
+        open("/tmp/_n", "w").write(subprocess.check_output(["git", "show", f"{new}:{f}"], text=True))
+        r = subprocess.run(["git", "merge-file", "-L", "port", "-L", "base", "-L", "new", pf, "/tmp/_b", "/tmp/_n"]).returncode
+        print("HAND", "MERGED" if r == 0 else f"CONFLICT {r}", rel); continue
+    bf, nf = f"{B}/{rel}", f"{N}/{rel}"
+    if not os.path.exists(nf):
+        print("NOT-MIGRATED (original used)" if not os.path.exists(pf) else "PORT-HAS-NO-DPCT?", rel); continue
+    nt = open(nf).read()
+    if not os.path.exists(pf):
+        shutil.copy(nf, pf); print("NEWCOPY", rel); continue
+    if not os.path.exists(bf):
+        print("NO-BASE (new to dpct output)", rel); continue
+    bt = open(bf).read()
+    if H(bt) == H(nt): print("NOCHANGE-after-dpct", rel); continue
+    pt = open(pf).read(); ph = hashes(pt); bh = hashes(bt)
+    nt = pat.sub(lambda m: f"{m.group(1)}_{bh[m.group(1)]}" if m.group(1) in bh else m.group(0), nt)
+    canon = lambda t: pat.sub(lambda m: f"{m.group(1)}_{ph[m.group(1)]}" if m.group(1) in ph else m.group(0), t)
+    bt, nt = canon(bt), canon(nt)
+    open("/tmp/_b", "w").write(bt); open("/tmp/_n", "w").write(nt)
+    r = subprocess.run(["git", "merge-file", "-L", "port", "-L", "base", "-L", "new", pf, "/tmp/_b", "/tmp/_n"]).returncode
+    print("MERGED" if r == 0 else f"CONFLICT {r}", rel)

From 88c3aceab315934e33615f732885bbd83899b38f Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Fri, 2 Oct 2026 13:12:58 -0500
Subject: [PATCH 059/201] sycl: port open upstream PRs #385 #463 #453 #374 #363
 #407 #413 onto 0.1.35

One dpct run of upstream main + the seven PRs, 3-way merged into the files they
touch (sycl/tools/merge_upstream.py); their header changes are forked into
sycl/include until upstream merges them.

- #385 stager waits for a buffer's previous DMA on every job (port: polled seq)
- #463 decode waits for an adaptive swap before reading residency
- #453 drafter's batched K/V on the KV-streaming ring
- #374 first chunk's PLE rows read beside layer 0; port fixes: the next read
  starts at c0 + T (the port's first chunk is shorter), and the upload is
  marked by a polled sequence number instead of a host event wait, which
  deadlocked prompts past ~4K tokens under the Level Zero v2 adapter
- #363 group stride + fused SwiGLU/q8_1 for the PCIe expert call, re-applied
  to the port's lane kernels (fp contract off, as upstream's HIP form)
- #407 --adapt-tuned (opt-in), #413 key-head DeltaNet recurrence (opt-in via
  STRATA_GDN_KEYHEAD=1: 8% slower on the B70; its NVIDIA gate and SM-holding
  parity bench not ported)

Tested on the B70: native_grouped_parity, iq_multi, gr, qsa, kv_hybrid,
quantize_act, qsa_prompt_attn parity pass; Coder 19/2,184-token, IQ2_XS and
40K outputs identical to 0.1.33; Coder 2,184-token prompt 784 -> 825 tok/s;
128K int8 KV streaming 895 / 67.0 tok/s; IQ2_XS decode +1.7% (#363).

Co-authored-by: sergqwer, constantindjonkam, architectds, BlueKingMuch (upstream PR authors)
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                              |  22 +-
 sycl/CMakeLists.txt                        |   7 +
 sycl/include/strata/core/verify.hpp        |   1 +
 sycl/include/strata/kernels/iq_kernels.hpp |  77 ++++
 sycl/include/strata/kernels/ngram.hpp      | 213 ++++++++++
 sycl/include/strata/prefill/kernels.hpp    |  97 +++++
 sycl/src/core/verify.cpp                   |  13 +-
 sycl/src/kernels/cuda/iq_kernels.dp.cpp    | 227 ++++++----
 sycl/src/kernels/native_grouped_parity.cpp | 458 +++++++++++++++++++++
 sycl/src/prefill/kernels.dp.cpp            | 274 +++++++++++-
 sycl/src/prefill/prefill.cpp               | 148 +++++--
 sycl/src/program/generate.cpp              | 200 ++++++---
 sycl/tools/fixups.py                       |   8 +
 13 files changed, 1567 insertions(+), 178 deletions(-)
 create mode 100644 sycl/include/strata/kernels/iq_kernels.hpp
 create mode 100644 sycl/include/strata/kernels/ngram.hpp
 create mode 100644 sycl/include/strata/prefill/kernels.hpp
 create mode 100644 sycl/src/kernels/native_grouped_parity.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index dcec06a1421..f29eb4a68aa 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -28,7 +28,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
 on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
-tokens) on engine 0.1.31-sycl (2026-10-01; 0.1.32-sycl reproduces them exactly);
+tokens) on engine 0.1.31-sycl (2026-10-01; 0.1.32-0.1.35-sycl reproduce them exactly);
 "Decode round 2" below lists what each change bought.
 
 ## Setup
@@ -550,6 +550,26 @@ page-locked batches of 64, and a batch's copies run while the next one is read.
 (0.33 -> 1.34 GB/s); a whole Coder start from the engine's launch to its first token 82 s -> 26 s, the IQ2_XS
 120 s -> 41 s (its 8.2 GB host mirror is ~9 s of the rest). Output identical. `STRATA_FILL_SERIAL=1` is the old fill.
 
+**0.1.35 and seven open upstream PRs (2026-10-02).** Upstream main 0.1.33 -> 0.1.35 merged as before, then seven open
+PRs ported into `sycl/` ahead of upstream (one dpct run of main + all of them, 3-way merged into only the files they
+touch; `sycl/tools/merge_upstream.py`). Their header changes live in `sycl/include` until upstream merges them.
+
+| PR | what | on the B70 |
+|---|---|---|
+| #385 (sergqwer) | stager: a buffer's first job of a generation waits for the previous DMA from it | race fix; same output |
+| #463 (constantindjonkam) | decode waits for an adaptive swap before reading the residency table | determinism fix |
+| #453 (architectds) | the drafter's batched K/V on the KV-streaming ring | 128K int8: 888 -> 895 tok/s prompt, 66.6 -> 67.0 decode |
+| #374 (sergqwer) | the first chunk's PLE rows read beside layer 0 | part of the 2,184-token prompt's 784 -> 825 tok/s |
+| #363 (BlueKingMuch) | the PCIe expert call: group stride, fused SwiGLU + q8_1 | IQ2_XS decode +1.7%; re-done on the port's lane kernels |
+| #407 (sergqwer) | `--adapt-tuned` (opt-in) | neutral here; stays opt-in |
+| #413 (BlueKingMuch) | DeltaNet recurrence per key head | bit-identical but 8% slower prompt here: off (`STRATA_GDN_KEYHEAD=1`) |
+
+#374 needed two port fixes: its next-chunk read assumed every chunk is the full chunk length (the port's first chunk
+is 256 tokens: the second chunk's rows were read from the wrong place), and its host wait on the PLE upload's event,
+now inside the layer loop, deadlocked the prompt past ~4K tokens under the Level Zero v2 adapter (the stager's bug
+again): the upload is marked by a polled sequence number now. #413's gate is an NVIDIA SM-count rule and its parity
+test an SM-holding NVIDIA bench (not built). Outputs identical to 0.1.33 (Coder 19 / 2,184 tokens, IQ2_XS, 40K).
+
 **Not ported yet (2026-10-01).**
 
 - Three kernels carry inline PTX (`mma.sync` tensor-core matrix ops, `ldmatrix`, `cp.async`):
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index db55f9409ca..b32ad9d0e2a 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -195,6 +195,13 @@ if(STRATA_SYCL_PARITY)
   add_executable(s2_expert_grouped_parity ${_src})
   target_link_libraries(s2_expert_grouped_parity PRIVATE strata_kernels)
   add_test(NAME s2_expert_grouped_parity COMMAND s2_expert_grouped_parity --selftest)
+  # upstream PR #363: native_expert_grouped's group stride and fused SwiGLU + q8_1, bitwise vs the v1 launches
+  strata_resolve(_src src/kernels/native_grouped_parity.cpp)
+  add_executable(native_grouped_parity ${_src})
+  target_link_libraries(native_grouped_parity PRIVATE strata_kernels)
+  add_test(NAME native_grouped_parity COMMAND native_grouped_parity)
+  # (upstream PR #413's gdn_rec_parity is an SM-holding NVIDIA bench - PTX timers, __nanosleep - not built here; the
+  # key-head kernel is checked through the engine: output hashes with STRATA_GDN_KEYHEAD=1 and without)
   # the conversation snapshots (#216) against the engine, as upstream's STRATA_BUILD_CONVERSATION_TESTS
   strata_resolve(_src src/core/conversation_snapshot_test.cpp)
   add_executable(conversation_snapshot_test ${_src})
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index 3b676c41423..11144a6488e 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -269,6 +269,7 @@ class Verifier {
     int32_t* plan_ = nullptr;                                     // device copy of the plan block
     uint8_t* staging_ = nullptr;                                  // VRAM slots for the PCIe share of the misses
     static constexpr int64_t kStagingBlobs = 16;
+    static constexpr int64_t kPcieGroupRows = 4;                  // the PCIe call's groups side by side (of <= 16)
     uint8_t* hit_xq_ = nullptr;
     uint8_t* nat_xq_ = nullptr;   // plan v0.3 P6: q8_1 activations for a native pack's grouped experts
     float* hit_xs_ = nullptr;
diff --git a/sycl/include/strata/kernels/iq_kernels.hpp b/sycl/include/strata/kernels/iq_kernels.hpp
new file mode 100644
index 00000000000..56c0d65e7b8
--- /dev/null
+++ b/sycl/include/strata/kernels/iq_kernels.hpp
@@ -0,0 +1,77 @@
+// include/strata/kernels/iq_kernels.hpp - the i-quant formats (IQ1_M, IQ2_XXS, IQ2_XS, IQ2_S, IQ3_XXS, IQ3_S,
+// IQ4_NL) and Q2_0 on the GPU for the IQ2_XS / IQ3_XXS model files, and Q4_K / Q5_K / Q5_1 / Q8_0 for Unsloth's
+// UD-Q4_K_XL (gate/up Q4_K or Q5_K, down Q5_1 or Q8_0, a Q8_0 embedding).
+//
+// The block layouts, codebook grids and dot products are llama.cpp's (ggml-common.h, ggml-cuda/vecdotq.cuh,
+// ggml-cuda/dequantize.cuh; MIT, see third_party/ggml/LICENSE and VERSION.txt), so a weight means exactly what it
+// means in llama.cpp.  Activations are q8_1 (32 values, fp16 scale and fp16 sum), the llama.cpp CUDA contract.
+#pragma once
+
+#include <cstddef>
+#include <cstdint>
+
+namespace strata::kernels {
+
+/// ggml type ids handled here.
+bool iq_supported(int ggml_type) noexcept;
+/// The token-embedding types iq_embed_rows and iq_dequant_f32 read: the i-quants above and BF16 (30).
+bool embed_type_supported(int ggml_type) noexcept;
+/// Bytes of one row of `n` values of `ggml_type` (n a multiple of the type's block).
+size_t iq_row_bytes(int ggml_type, int64_t n) noexcept;
+
+/// q8_1 blocks for `n_rows` rows of `n_cols` floats (n_cols a multiple of 32): y is n_rows * n_cols/32 blocks.
+void quantize_q8_1_rows(const float* x, int64_t n_rows, int64_t n_cols, void* y, void* stream);
+
+/// y[c][r] = W[r] . x[c] for `ncols` columns of q8_1 activations (x stride n_in/32 blocks per column).
+void iq_mmvq(int ggml_type, const void* w, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream);
+
+/// Dequantize `n` contiguous values (n a multiple of 256) to fp16 / fp32.
+void iq_dequant_f16(int ggml_type, const void* src, int64_t n, uint16_t* dst, void* stream);
+void iq_dequant_f32(int ggml_type, const void* src, int64_t n, float* dst, void* stream);
+/// Rows `tokens[0..n_tok)` (device ids) of a GGUF embedding table (`row_bytes` per row; the table may be mapped
+/// host memory) dequantized to fp32, `n_embd` per row (a multiple of 256).
+void iq_embed_rows(int ggml_type, const void* table, size_t row_bytes, const int32_t* tokens, int64_t n_tok,
+                   int64_t n_embd, float* out, void* stream);
+/// One expert's gate and up matrices (n_ff rows of n_embd each) into the interleaved fp16 layout the prompt path
+/// uses: row 2r = gate row r, row 2r+1 = up row r.
+void iq_dequant_gu_f16(int ggml_type, const void* gate, const void* up, int64_t n_ff, int64_t n_embd, uint16_t* dst,
+                       void* stream);
+
+/// The layout of one native expert blob: [gate rows | up rows | down rows], raw GGUF blocks.
+struct NativeExpertLayout {
+    int gu_type = -1, d_type = -1;
+    int64_t n_embd = 0, n_ff = 0;
+    size_t gu_row = 0, d_row = 0;       // bytes per row
+    size_t up_off = 0, down_off = 0;    // byte offsets inside the blob
+    size_t bytes = 0;                   // the whole blob
+};
+NativeExpertLayout native_expert_layout(int gu_type, int d_type, int64_t n_embd, int64_t n_ff);
+/// Whether `native_expert_grouped` has kernels for this gate/up and down type pair at these dimensions, and the
+/// prompt path's dequantizer takes both (checked for every layer at startup, before anything is allocated).
+bool native_expert_supported(int gu_type, int d_type, int64_t n_embd, int64_t n_ff) noexcept;
+
+/// Bytes of scratch `native_expert_grouped` needs for `cap_entries` entries.
+size_t native_expert_scratch_bytes(int64_t cap_entries, int64_t n_ff);
+
+/// Grouped experts in the native format: group g's blob at device address grp_ptr[g]; its entries
+/// [grp_start[g], grp_start[g+1]) read token ent_tok[e]'s q8_1 activation (n_embd/32 blocks per token in x_q8_1)
+/// and write row ent_dst[e] of `out` (n_embd floats).  Counts are read on the device.
+/// `grid_groups` (1 .. cap_groups; 0 = cap_groups) groups run side by side, a block row each striding over the rest:
+/// a call that usually has few groups or none (the verify window's PCIe share) launches less for the ones it does
+/// not have.  The results do not depend on it.
+void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long* grp_ptr, const int32_t* grp_start,
+                           const int32_t* n_groups, const int32_t* ent_dst, const int32_t* ent_tok, int64_t cap_groups,
+                           int64_t cap_entries, const void* x_q8_1, void* scratch, float* out, void* stream,
+                           int64_t grid_groups = 0);
+/// true: `native_expert_grouped`'s launches before the group stride (STRATA_GROUPED_V1=1 at startup) - a block row
+/// per possible group, SwiGLU and the q8_1 quantization as two kernels over all cap_entries.  Bitwise the same results
+/// (native_grouped_parity checks it); kept for A/B timing.  Set before graph capture; captured graphs keep theirs.
+void native_grouped_set_v1(bool v1);
+
+/// `iq_mmvq` and `native_expert_grouped` decode each weight part once and apply it to every column / entry;
+/// true selects the older kernels that decode it again per column (STRATA_OLD_IQ_MMVQ=1 at startup).  Both give
+/// bitwise the same results.  Set before graph capture; captured graphs keep the kernels they captured.
+void iq_set_old_kernels(bool old);
+bool iq_old_kernels();
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/ngram.hpp b/sycl/include/strata/kernels/ngram.hpp
new file mode 100644
index 00000000000..9aae9c08c8a
--- /dev/null
+++ b/sycl/include/strata/kernels/ngram.hpp
@@ -0,0 +1,213 @@
+// include/strata/kernels/ngram.hpp - P2.S4: the PLE n-gram hash and the per-layer token table.
+//
+// Two halves that share nothing but the row indices they exchange:
+//
+//   * `ngram_rows` - the HOST hash.  Sixteen row indices per token from the last three token ids, computed
+//     with 64-bit multiply/xor and no tensor op at all.  `qwen4exp.cpp` L1092-1124, where the source says
+//     outright that it is host-side because "ggml has no int64 and no xor".
+//   * `PleTable`  - the row gather.  `per_layer_token_embd.weight` is IQ4_NL and is NOT IN THE PACK: it is
+//     51.2e9 elements (28.8 GB) in the ORIGINAL second GGUF shard, and it is the only tensor this engine
+//     reads from the GGUF rather than from the canonical pack.
+//
+// THE HASH IS THE ONE PLACE IN THIS MODEL WHERE A WRONG BIT IS SILENTLY PLAUSIBLE.  Every one of its
+// properties has a rival reading that produces a valid index in range:
+//
+//   * XOR, not sum.  Two equal tokens with equal multipliers cancel to zero under XOR and double under sum.
+//   * `%` vocab_size, not `& (vocab_size-1)`.  The vocab sizes are 20000003, 20000023, 20000033, ... - not
+//     powers of two, so a mask would be a different function.
+//   * the EOS cut propagates FORWARD: an EOS at any position replaces that position AND every older one.
+//   * a missing predecessor is `LLAMA_TOKEN_NULL = -1`, tested as `t < 0`.  Token id 0 is a REAL token.
+//   * the token's OWN eos does not cut its own context - only the predecessors are examined.
+//
+// All of those are asserted observable in `ple_parity.cpp` rather than trusted.
+#pragma once
+
+#include <cstdint>
+#include <string>
+
+namespace strata::kernels {
+
+// ---- geometry, every value confirmed against the artifact (docs/gguf-metadata.txt) ----
+inline constexpr int NG_N_EMBD = 2560;          // n_embd
+inline constexpr int PLE_HEAD_DIM = 160;        // qwen4exp.embedding_length_per_layer_input
+inline constexpr int NGRAM_SIZE = 3;            // qwen4exp.ple.ngram_size
+inline constexpr int HEADS_PER_NGRAM = 8;       // qwen4exp.ple.heads_per_ngram
+inline constexpr int PLE_N_HEADS = (NGRAM_SIZE - 1) * HEADS_PER_NGRAM;   // 16
+inline constexpr int PLE_CONV_KERNEL = 4;       // qwen4exp.ple.conv_kernel
+inline constexpr int32_t PLE_EOS_TOKEN_ID = 248044;
+inline constexpr int NG_HC = 4;                 // hyper_connection.count
+inline constexpr int NG_HC_DIM = NG_HC * NG_N_EMBD;                      // 10240
+inline constexpr int NG_HIST = (PLE_CONV_KERNEL - 1) * NGRAM_SIZE;       // 9
+inline constexpr int32_t TOKEN_NULL = -1;       // LLAMA_TOKEN_NULL
+inline constexpr float NG_RMS_EPS = 1e-6f;
+
+// The table: [160, 320001536] IQ4_NL.  ne0 = 160 is the FAST axis, so one row is 160 contiguous elements =
+// 5 blocks of 32 at 18 bytes = 90 bytes.  The head-slowest flatten then makes 16 rows exactly n_embd = 2560.
+inline constexpr uint64_t PLE_TABLE_ROWS = 320001536ull;
+inline constexpr int PLE_ROW_BYTES = (PLE_HEAD_DIM / 32) * 18;           // 90: an IQ4_NL row
+inline constexpr int PLE_ROW_BYTES_FP8 = PLE_HEAD_DIM;                   // 160: an F8_E4M3 row, one byte a value
+inline constexpr int PLE_ROW_BYTES_MAX = PLE_ROW_BYTES_FP8;
+
+/// The artifact's own hash constants, transcribed from `docs/gguf-dump-shard1.txt`:
+///
+///     layer_multipliers = [23703573157769, 20109073645365, 8052911324071]
+///     head_vocab_sizes  = [20000003, 20000023, ...]          16 entries, NOT an arithmetic sequence
+///     head_offsets      = [0, 20000003, 40000026, ...]       the running sum of head_vocab_sizes
+///
+/// `ref/ngram.py::selftest` calls its own copies "synthetic but STRUCTURALLY REAL"; they are in fact
+/// `20000003 + 10*i` for the vocab sizes, which the artifact's are not (20000003, 20000023, 20000033 - the
+/// differences are 20, 10, ...).  A selftest is free to use whatever constants it likes, but a PARITY test
+/// against the artifact must use these, and the difference is recorded because it is exactly the kind of
+/// thing that gets copied from the reference into an engine.
+struct PleConsts {
+    uint64_t mult[NGRAM_SIZE];
+    uint64_t vocab[PLE_N_HEADS];
+    uint64_t offset[PLE_N_HEADS];
+};
+PleConsts ple_artifact_consts();
+
+/// `mixed_n = (ctx[0]*m[0]) ^ (ctx[1]*m[1]) ^ ... ^ (ctx[n-1]*m[n-1])` in uint64.
+///
+/// Exposed separately so a test can assert the XOR STRUCTURE directly rather than only its consequences.
+uint64_t ngram_mixed(const int64_t* ctx, const uint64_t* mult, int n);
+
+/// The sixteen row indices per token.  `qwen4exp.cpp` L1092-1124.
+///
+///   tokens  (n_tokens,)      the ubatch's own tokens
+///   prev    (n_tokens, 2)    predecessors OLDEST FIRST, `TOKEN_NULL` where there is none
+///   out     (n_tokens, 16)   row indices into the PLE table
+///
+/// The window is built once per token and then only its PREFIXES are used, which is what makes the bigram
+/// heads (0..7) and the trigram heads (8..15) agree about the recent history.
+void ngram_rows(const int32_t* tokens, const int32_t* prev, int n_tokens, const PleConsts& c, uint32_t* out);
+
+/// The IQ4_NL codebook: `{-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113}`,
+/// which is `kvalues_iq4nl` from `ggml-common.h` L1121 and also the manifest's `codebooks.IQ4NL`.
+///
+/// There is NO `-8` in this version of ggml.  Some releases of `dequantize_row_iq4_nl` subtract 8 from the
+/// codebook value; at 3cf03257 they do not, and the difference would shift every one of the 51.2e9 elements.
+int iq4nl_code(int code);
+
+/// One 90-byte row -> 160 floats.  The canonical rule `value = cb[code] * scale + offset` with offset 0,
+/// because IQ4_NL has no min term (`has_offset` is false in the manifest).
+///
+/// THE NIBBLE ORDER IS SPLIT-HALF, NOT INTERLEAVED, and that is the trap here.  `dequantize_row_iq4_nl` is
+///     y[j]           = d * kvalues[qs[j] & 0xf];
+///     y[j + QK4_NL/2] = d * kvalues[qs[j] >> 4];
+/// so byte j carries elements j and j+16 - NOT 2j and 2j+1, which is the natural reading and which produces
+/// a perfectly plausible embedding of the wrong 160 values.
+void iq4nl_dequant_row(const uint8_t* row, float* out160);
+
+/// One FP8 row -> 160 floats: each byte an E4M3 value (the "fn" variant: no infinities, 0x7F/0xFF are NaN), times the
+/// table's one scale. This is the table as Qwen3.8-Flash-Next ships it (`...ngram_embedding.shard_k`, F8_E4M3, and
+/// `weight_scale`), kept byte for byte by tools/ple_fp8_pack.py; IQ4_NL is 8% off it per row.
+void fp8_e4m3_dequant_row(const uint8_t* row, float scale, float* out160);
+
+/// How the table's rows are read (plan v0.3 P2). `Direct` is the default: unbuffered 4 KiB reads from the SSD,
+/// so the table never occupies RAM or the OS file cache. `Mmap` is the earlier memory-mapped path, kept as the
+/// A/B arm; it returns the same bytes.
+///
+/// NEVER KEEP THE SHARD MAPPED WHILE READING IT DIRECT: a live section on the same file serializes the unbuffered
+/// reads (311 -> 1,575 us per token, bench/results/2026-09-23-p2-ssd-direct). Direct mode drops its own mapping
+/// after the header parse; nothing else in the process may hold one.
+enum class PleIo { Direct, Mmap };
+
+struct PleIoOptions {
+    PleIo mode = PleIo::Direct;
+    uint32_t max_inflight = 256;     ///< outstanding SSD reads (decode needs 16; a prompt chunk saturates the SSD at 256)
+    uint64_t cache_rows = 1u << 20;  ///< bounded row cache: 1,048,576 rows x 90 B ~ 95 MB; 0 disables
+    bool io_thread = true;           ///< reads submitted by a worker thread, not the caller
+    /// Mmap mode only (`--ple-io ram`): lock the whole mapped table in RAM at open, so no SSD read ever sits on
+    /// the prompt or token path. Needs RAM for the full table. POSIX only (mlock); `locked()` reports the outcome.
+    bool lock = false;
+    /// Direct mode with the I/O worker only: keep the SSD awake while rows are asked for - one page of the table
+    /// after this long without a read (0 = off), until `keepalive_window_s` after the last request for rows
+    /// (see PleReader::set_keepalive).
+    double keepalive_ms = 0;
+    double keepalive_window_s = 60;
+};
+
+/// The PLE table.  Held by pointer-to-impl so this header does not drag `<windows.h>` into every
+/// translation unit that wants the hash.
+class PleTable {
+public:
+    PleTable();
+    ~PleTable();
+    PleTable(const PleTable&) = delete;
+    PleTable& operator=(const PleTable&) = delete;
+
+    /// Open with an explicit I/O mode. The two-argument `open` below is the default (Direct).
+    bool open(const std::string& gguf_path, std::string& err, const PleIoOptions& io);
+
+    /// The split the plan asks for: `issue` as soon as the token id is known, `collect` just before layer 1
+    /// needs the rows. `gather` is `issue` followed by `collect`. In Mmap mode `issue` only prefetches.
+    bool issue(const uint32_t* rows16);
+    bool collect(float* out2560, std::string& err);
+    /// Plan v0.3 P5: the rows of `n_tokens` tokens (16 each, `rows` token-major) into `out` (2560 floats per token),
+    /// as ONE reader request - page dedupe and sort across the whole batch, the reader's full queue depth.  Not
+    /// while a single-token `issue` is pending.  The mapped mode gathers row by row.
+    bool gather_batch(const uint32_t* rows, size_t n_tokens, float* out, std::string& err);
+
+    /// Fault injection (Direct mode): every row read completes no earlier than `us` after issue.
+    void set_injected_delay_us(double us);
+
+    /// Maps the ORIGINAL second GGUF shard read-only.  The tensor's data does NOT start at file offset 0:
+    /// the manifest's `shard2_tensor.offset` is relative to the GGUF's DATA SECTION, and the header before it
+    /// is 192 bytes.  Reading at 0 would silently decode the header plus 192 bytes of shifted rows - still
+    /// plausible IQ4_NL, which is why the reader takes the offset from a real GGUF parse (`GgufFile`, the
+    /// project's validated reader) and checks that the tensor exactly fills the rest of the file.
+    bool open(const std::string& gguf_path, std::string& err);
+    void close();
+    bool is_open() const;
+    /// True when `PleIoOptions::lock` was asked for and mlock succeeded (false: pages only pre-touched).
+    bool locked() const;
+    uint64_t rows() const;
+    /// "IQ4_NL" or "F8_E4M3" (a GGUF from tools/ple_fp8_pack.py: type I8, strata.ple.format = f8_e4m3).
+    const char* format() const;
+
+    /// 16 row indices -> 2560 floats.  The gathered rows are flattened HEAD-SLOWEST: row h's 160 values
+    /// occupy `out[h*160, (h+1)*160)`, which is what `ggml_get_rows` does and what makes the result a plain
+    /// n_embd-wide vector for the block that consumes it.
+    void gather(const uint32_t* rows16, float* out2560) const;
+
+    /// One row -> 160 floats, for diagnostics and for the parity test's oracle comparison.
+    void read_row(uint32_t row, float* out160) const;
+
+    /// Bytes actually touched since `open`, for the "how often is it not ready" measurement P2.S4 asks for.
+    uint64_t bytes_read() const;
+
+    /// One line of reader statistics (Direct mode), e.g. for --stats. Empty in Mmap mode.
+    std::string io_report() const;
+    PleIo mode() const;
+
+private:
+    struct Impl;
+    Impl* impl_ = nullptr;
+};
+
+// ================================ THE PLE GATHER'S PREFETCH, AND ITS A/B ARM ================================
+//
+// `gather` issues its sixteen row reads as sixteen SEPARATE page faults into a 26.8 GB mapping, which measured
+// **2.10-2.61 ms per token** and is second only to the layer loop among the token's avoidable terms. The table
+// is 90 B per row, so the sixteen rows are 1,440 B - 0.5 MB/s, which is latency and not bandwidth, and it is
+// because the sixteen pages are taken one at a time. `PrefetchVirtualMemory` issues them in one call.
+//
+// **THIS SWITCH EXISTS SO THE CLAIM CAN BE MEASURED RATHER THAN ASSERTED.** Cross-build comparisons in this
+// project have repeatedly turned out to be machine drift - `LAYERS` alone moves 48.9 -> 52.3 between runs of
+// one binary - so the two arms are alternated inside one session. Off is `--no-ple-prefetch`.
+void ple_prefetch_enable(bool on);
+bool ple_prefetch_enabled();
+
+// ---- NOTE ON `madvise(MADV_RANDOM)` ------------------------------------------------------------------
+// P2.S4 asks for `madvise(MADV_RANDOM)` on the mapping, and on Linux that is exactly right: a token gathers
+// 16 rows scattered over 28.8 GB, so read-ahead is pure waste and would evict useful pages.
+//
+// THERE IS NO LINUX, SO THERE IS NO MADV_RANDOM HERE.  Windows has no equivalent of the advice - the closest
+// is `FILE_FLAG_RANDOM_ACCESS` at CreateFile time, which suppresses the cache-manager's read-ahead for the
+// whole handle, and `PrefetchVirtualMemory` for the positive case.  `GgufFile` opens with neither, so this
+// build gets the DEFAULT sequential read-ahead on a random access pattern.  Saying so is the point: a
+// comment claiming MADV_RANDOM here would be a comment about code that does not run.  On Linux the advice
+// belongs in `GgufFile::open`, which this module does not own.
+// ------------------------------------------------------------------------------------------------------
+
+}  // namespace strata::kernels
diff --git a/sycl/include/strata/prefill/kernels.hpp b/sycl/include/strata/prefill/kernels.hpp
new file mode 100644
index 00000000000..bc4187a44f1
--- /dev/null
+++ b/sycl/include/strata/prefill/kernels.hpp
@@ -0,0 +1,97 @@
+// include/strata/prefill/kernels.hpp - plan v0.3 P5: the element-wise and stateful kernels of a prompt chunk.
+//
+// T tokens at a time, all row-major with the token as the slow index.  The arithmetic mirrors the per-token native
+// kernels (the decode path), batched; where a step is a recurrence in time (the GDN conv and state, the PLE conv)
+// the kernel walks the chunk's tokens in order inside one launch.
+#pragma once
+
+#include "strata/kernels/kv_stream.hpp"
+#include "strata/kernels/rope_scaling.hpp"
+
+#include <cstdint>
+
+namespace strata::prefill {
+
+// ---- hyper-connection (n_embd 2560, hc 4, hc_lr 320)
+/// xn[t, c*2560 + d] = R[t,c,d] * rsqrt(mean_d R[t,c,:]^2 + eps) * w_norm[c*2560 + d]; also its BF16 image.
+/// `xn16_lo` (null: none) takes bf16(x - xn16): W.xn16 + W.xn16_lo is the product with ~16 mantissa bits of x.
+void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t* xn16, int64_t T, void* stream,
+             uint16_t* xn16_lo = nullptr);
+/// F-1: gr_norm without its FP32 output: the row scales rs[t*4 + c] and the BF16 image; gr_mix_r then reads R.
+void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint16_t* xn16, int64_t T, void* stream,
+                uint16_t* xn16_lo = nullptr);
+/// gr_mix with xn recomputed from R, rs and w_norm exactly as gr_norm computes it (the same bits).
+void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float* gated, float* mixed, uint16_t* mixed16,
+              int64_t T, void* stream, uint16_t* mixed_h = nullptr, uint16_t* mixed16_lo = nullptr);
+/// F-2: gr_write, then gr_norm_rs of the next half (its norm weights) over the rows just written - the same bits as
+/// the two calls, without reading R back.
+void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_ld, const float* w_norm_next, float eps,
+                      float* rs, uint16_t* xn16, int64_t T, void* stream, uint16_t* xn16_lo = nullptr);
+/// lo16[t, k] = bf16(silu(lo[t, k] / hc))
+void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream, uint16_t* lo16_lo = nullptr);
+/// mixed[t, d] = mean_c xn[t, c, d] * sigmoid(gated[t, c, d]); FP32, BF16 and FP16 (either image may be null).
+void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16, int64_t T, void* stream,
+            uint16_t* mixed_h = nullptr, uint16_t* mixed16_lo = nullptr);
+/// R[t, c, d] += bo[t, d] * 2 sigmoid(inj[t, c] / hc)   (inj has row stride inj_ld)
+void gr_write(float* R, const float* bo, const float* inj, int64_t inj_ld, int64_t T, void* stream);
+/// R[t, c, :] = e[t, :] for all four streams (the embedding broadcast).
+void gr_broadcast(const float* e, float* R, int64_t T, void* stream);
+
+// ---- GDN (state 128, 16 k heads, 48 v heads, 10240 conv channels, 4 taps)
+/// gate[t,h] = softplus(ab[t,h] + dt[h]) * ssm_a[h];  beta[t,h] = sigmoid(ab[t, 48 + h])  (ab: [T, 96])
+void gdn_gates(const float* ab, const float* dt, const float* ssm_a, float* gate, float* beta, int64_t T, void* stream);
+/// The 4-tap causal conv + SiLU over the chunk (history [C][3] in, updated to the chunk's last three inputs), then
+/// the L2 norm of the q and k heads of every token.  h: [T, C].
+void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, int64_t T, float eps, void* stream);
+/// The recurrence over the chunk, state in registers; y16[t] = rmsnorm(o) * gamma * sigmoid(z) in FP16 (what the
+/// out projection reads); y is FP32 scratch.
+void gdn_recurrence(float* state, const float* h, const float* gate, const float* beta, const float* z,
+                    const float* gamma, float eps, float* y, uint16_t* y16, int64_t T, void* stream);
+
+// ---- MoE
+/// softmax over 512, top-10 (ties to the lower id), weights renormalised over the ten (the native router).
+void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t n_expert, void* stream);
+/// Expert blob (Strata pack layout, Q2_0) -> BF16 matrices: gate/up interleaved [1280, 2560], down [2560, 640].
+void blob_dequant(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream);
+/// h16[n, r] = fp16(silu(gu[n, 2r]) * gu[n, 2r + 1])   (the interleaved expert gate/up)
+void swiglu_interleaved(const float* gu, uint16_t* h16, int64_t n, void* stream);
+/// h16[n, r] = fp16(silu(g[n, r]) * u[n, r])   (the shared expert, gate and up separate, width 640)
+void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void* stream);
+/// dst[i] = src[i] for n int32s, as a kernel: either side may be mapped host memory, and the copy never waits
+/// behind the copy engine's queue (the prompt path's grouping tables, while the expert stream fills it).
+void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream);
+/// Gather rows: dst16[i, :] = x16[src[i], :] (n rows of `width` BF16).
+void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int64_t n, int64_t width, void* stream);
+/// bo[t, :] = shared[t, :] * sigmoid(sg[t]) + sum_k w[t, k] * D[slot[t, k], :]
+void moe_combine(const float* D, const int32_t* slot, const float* w, const float* shared, const float* sg, float* bo,
+                 int64_t T, void* stream);
+
+// ---- QSA helpers
+/// In place: x[r, :] = x[r, :] * rsqrt(mean x^2 + eps) * w  over rows of `cols` (row stride `ld`).
+void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld, float eps, void* stream);
+/// NEOX rotary on the first 64 dims of each head: x [T, heads, dim] at positions pos0 + t.  The rope
+/// scaling (rope_scaling.hpp) rides in as the process config - none is today's arithmetic exactly.
+void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t pos0,
+          const strata::kernels::RopeScaling& scaling, void* stream);
+/// q_full [T, 24, 512] (q | gate per head) -> q [T, 24, 256]
+void split_q(const float* q_full, float* q, int64_t T, void* stream);
+/// attn[t, h, d] *= sigmoid(q_full[t, h, 256 + d]) -> out16 (fp16 bits: the o-projection is quantized)
+void gate_attn(const float* attn, const float* q_full, uint16_t* out16, int64_t T, void* stream);
+
+/// K and V of T consecutive cells (positions pos0..pos0+T-1; K normed and rotated) into the paged pools: FP16
+/// (`k_pool`/`v_pool`) or INT8 codes + FP16 scale per 64 (`k_q`...), the decode append's arithmetic.
+/// K, V: [T, 2, 256].
+void kv_append(const float* K, const float* V, int64_t T, int64_t pos0, const int32_t* page_table, int64_t page_size,
+               uint16_t* k_pool, uint16_t* v_pool, int8_t* k_q, int8_t* v_q, uint16_t* k_scale, uint16_t* v_scale,
+               void* stream, const strata::kernels::KvHostPools* host = nullptr,
+               const strata::kernels::KvHostPools* stage = nullptr);
+
+/// fp32 -> fp16 bits and fp32 -> bf16, n elements (the two activation images of the prompt GEMMs).
+void to_f16(const float* x, uint16_t* y, int64_t n, void* stream);
+void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream, uint16_t* ylo = nullptr);
+/// y = fp32(fp16(x)): what an FP16 store of x would read back (the FP16 indexer-key experiment)
+void round_f16(const float* x, float* y, int64_t n, void* stream);
+/// Expert blob -> FP16 (Q2_0 values are exact in FP16).
+void blob_dequant_f16(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream);
+
+}  // namespace strata::prefill
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 6ac06f28283..e114b75fa4f 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -835,20 +835,21 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
         const int32_t* p_start2 = pl + ptr_off + 4 * capx;
         float* hit_out = hit_out_ + (size_t) tb * K * N;
         const auto& lay = strata::kernels::cpu::expert_layout();
-        // plan v0.3 P6: the VRAM groups now; the PCIe groups once the copy engine has landed them in staging
-        auto grouped = [&](const unsigned long long* gp, const int32_t* gs, const int32_t* gn) {
+        // plan v0.3 P6: the VRAM groups now; the PCIe groups once the copy engine has landed them in staging.
+        // `gy`: the native launch's groups side by side (0: cap, one block row per possible group).
+        auto grouped = [&](const unsigned long long* gp, const int32_t* gs, const int32_t* gn, int64_t gy) {
             if (lay.native) {
                 // the layer's GGUF formats (i-quant gate/up, Q2_0 / IQ4_NL down)
                 const auto& f = lay.fmt[(size_t) l];
                 const NativeExpertLayout L = native_expert_layout(f.gu_type, f.d_type, f.n_embd, f.n_ff);
                 native_expert_grouped(L, gp, gs, gn, p_dst, p_tok, cap, cap,
-                                      nat_xq_ + (size_t) tb * (N / 32) * 36, hit_scratch_, hit_out, cs);
+                                      nat_xq_ + (size_t) tb * (N / 32) * 36, hit_scratch_, hit_out, cs, gy);
             } else {
                 moe_grouped_s2(gp, gs, gn, p_dst, p_tok, cap, cap, hit_xq_ + (size_t) tb * (N / 32) * 34,
                                hit_xs_ + (size_t) tb * (N / 32), hit_scratch_, hit_out, cs);
             }
         };
-        grouped(p_ptr, p_start, p_counts);
+        grouped(p_ptr, p_start, p_counts, 0);
         stamp(l, 20, grp);
         if (device_plan_) wait_flag_ge_or(m_flagB_, ring, skip_ + grp, cs);
         else wait_flag_ge(m_flagB_, ring, cs);                 // the PCIe share is in staging (DMA) or mapped
@@ -859,7 +860,9 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
             rebase_ptrs((unsigned long long*) p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), cs);
         }
         stamp(l, 21, grp);
-        grouped(p_ptr2, p_start2, p_counts + 2);
+        // the PCIe share is pcie_frac of the misses: a few groups when the cache is cold, usually none (always none at
+        // pcie_frac 0), so its launch is kPcieGroupRows block rows striding over the groups, not cap of them
+        grouped(p_ptr2, p_start2, p_counts + 2, kPcieGroupRows);
         stamp(l, 22, grp);
         if (device_plan_) {   // no CPU share when the device planned the group: its rows are zeros
             wait_flag_ge_or(m_flag_, ring, skip_ + grp, cs);
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index ac0714979f2..772316fd5b5 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -1338,8 +1338,10 @@ __dpct_inline__ void native_gu_kernel(
     const int32_t *__restrict__ ent_tok, const block_q8_1 *__restrict__ xq,
     NativeExpertLayout L, float *__restrict__ gate, float *__restrict__ up) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    const int g = item_ct1.get_group(1);
-    if (g >= *n_groups) return;   // uniform over the work-group: before the barrier below is fine
+    // #363: group g is computed by block row g % gridDim.y (a launch sized for fewer rows than possible groups strides);
+    // a block row with no group returns before the barrier below (uniform over the work-group)
+    const int ng = *n_groups;
+    if ((int) item_ct1.get_group(1) >= ng) return;
     const void* grid = nullptr;
 #if STRATA_GRID_SLM
     if constexpr (TG == 18 || TG == 21 || TG == 22) {
@@ -1361,11 +1363,13 @@ __dpct_inline__ void native_gu_kernel(
     if (row >= 2 * L.n_ff) return;
     const bool is_up = row >= L.n_ff;
     const int r = is_up ? row - (int) L.n_ff : row;
-    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
-    const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
+    const size_t off = (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
-    const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    row_entries<TG, LN>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff, grid);
+    for (int g = (int) item_ct1.get_group(1); g < ng; g += (int) item_ct1.get_group_range(1)) {
+        const uint8_t* wr = (const uint8_t*) grp_ptr[g] + off;
+        const int e0 = grp_start[g], e1 = grp_start[g + 1];
+        row_entries<TG, LN>(wr, xq, xb, ent_tok, e0, e1, nb, sub, (is_up ? up : gate) + r, (size_t) L.n_ff, grid);
+    }
 }
 
 // native_gu_kernel with the group's entries taken GRP_NC at a time, each weight part decoded once per pass.
@@ -1380,30 +1384,33 @@ __dpct_inline__ void native_gu_multi_kernel(
     const int32_t *__restrict__ ent_tok, const block_q8_1 *__restrict__ xq,
     NativeExpertLayout L, float *__restrict__ gate, float *__restrict__ up) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    const int g = item_ct1.get_group(1);
-    if (g >= *n_groups) return;
     const int warp = item_ct1.get_local_id(2) >> 5,
               lane = item_ct1.get_local_id(2) & 31;
     const int row = item_ct1.get_group(2) * GU_ROWS + warp; // 0 .. 2*n_ff
     if (row >= 2 * L.n_ff) return;
     const bool is_up = row >= L.n_ff;
     const int r = is_up ? row - (int) L.n_ff : row;
-    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
-    const uint8_t* wr = blob + (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
+    const size_t w_off = (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
-    const int e0 = grp_start[g], e1 = grp_start[g + 1];
     float* dst = is_up ? up : gate;
-    for (int e = e0; e < e1; e += GRP_NC) {
-        const int n = sycl::min(GRP_NC, e1 - e);
-        int off[GRP_NC];
-#pragma unroll
-        for (int c = 0; c < GRP_NC; ++c)
-            off[c] = ent_tok[e + sycl::min(c, n - 1)] * xb;
-        float s[GRP_NC];
-        row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s);
-#pragma unroll
-        for (int c = 0; c < GRP_NC; ++c)
-            if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
+    const int ng = *n_groups;
+    for (int g = item_ct1.get_group(1); g < ng;
+         g +=
+         item_ct1.get_group_range(1)) { // the group stride, as native_gu_kernel
+        const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
+        const int e0 = grp_start[g], e1 = grp_start[g + 1];
+        for (int e = e0; e < e1; e += GRP_NC) {
+            const int n = sycl::min(GRP_NC, e1 - e);
+            int off[GRP_NC];
+#pragma unroll
+            for (int c = 0; c < GRP_NC; ++c)
+                off[c] = ent_tok[e + sycl::min(c, n - 1)] * xb;
+            float s[GRP_NC];
+            row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s);
+#pragma unroll
+            for (int c = 0; c < GRP_NC; ++c)
+                if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
+        }
     }
 }
 
@@ -1426,18 +1433,17 @@ __dpct_inline__ void native_down_kernel(
     const int32_t *__restrict__ ent_dst, const block_q8_1 *__restrict__ hq,
     NativeExpertLayout L, float *__restrict__ out) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    const int g = item_ct1.get_group(1);
-    if (g >= *n_groups) return;
+    const int ng = *n_groups;   // #363: the group stride, as native_gu_kernel
     const int rib = item_ct1.get_local_id(2) / LN,
               sub = item_ct1.get_local_id(2) % LN;
     const int r = item_ct1.get_group(2) * (256 / LN) + rib;
     if (r >= L.n_embd) return;
-    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
-    const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
+    const size_t off = L.down_off + (size_t) r * L.d_row;
     const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
-    const int e0 = grp_start[g], e1 = grp_start[g + 1];
     // down: entry e's activation is row e of hq (identity index), its output row is ent_dst[e]
-    {
+    for (int g = (int) item_ct1.get_group(1); g < ng; g += (int) item_ct1.get_group_range(1)) {
+        const uint8_t* wr = (const uint8_t*) grp_ptr[g] + off;
+        const int e0 = grp_start[g], e1 = grp_start[g + 1];
         int e = e0;
         if constexpr (Multi<TD>::has) {
             for (; e + 4 <= e1; e += 4) {
@@ -1471,40 +1477,37 @@ __dpct_inline__ void native_down_multi_kernel(
     const int32_t *__restrict__ ent_dst, const block_q8_1 *__restrict__ hq,
     NativeExpertLayout L, float *__restrict__ out) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    const int g = item_ct1.get_group(1);
-    if (g >= *n_groups) return;
     const int warp = item_ct1.get_local_id(2) >> 5,
               lane = item_ct1.get_local_id(2) & 31;
     const int r = item_ct1.get_group(2) * 8 + warp;
     if (r >= L.n_embd) return;
-    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
-    const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
+    const size_t w_off = L.down_off + (size_t) r * L.d_row;
     const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
-    const int e0 = grp_start[g], e1 = grp_start[g + 1];
-    for (int e = e0; e < e1; e += GRP_NC) {
-        const int n = sycl::min(GRP_NC, e1 - e);
-        int off[GRP_NC];
-#pragma unroll
-        for (int c = 0; c < GRP_NC; ++c)
-            off[c] = (e + sycl::min(c, n - 1)) * hb;
-        float s[GRP_NC];
-        row_dot_multi<TD, GRP_NC>(wr, hq, off, n, nb, lane, s);
-#pragma unroll
-        for (int c = 0; c < GRP_NC; ++c)
-            if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+    const int ng = *n_groups;
+    for (int g = item_ct1.get_group(1); g < ng;
+         g +=
+         item_ct1.get_group_range(1)) { // the group stride, as native_gu_kernel
+        const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
+        const int e0 = grp_start[g], e1 = grp_start[g + 1];
+        for (int e = e0; e < e1; e += GRP_NC) {
+            const int n = sycl::min(GRP_NC, e1 - e);
+            int off[GRP_NC];
+#pragma unroll
+            for (int c = 0; c < GRP_NC; ++c)
+                off[c] = (e + sycl::min(c, n - 1)) * hb;
+            float s[GRP_NC];
+            row_dot_multi<TD, GRP_NC>(wr, hq, off, n, nb, lane, s);
+#pragma unroll
+            for (int c = 0; c < GRP_NC; ++c)
+                if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+        }
     }
 }
 
 // ---------------------------------------------------------------- q8_1 (quantize.cu)
-__dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
-                                          block_q8_1 *__restrict__ y,
-                                          long long n) {
-    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
-    const long long i =
-        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
-        item_ct1.get_local_id(2);
-    if (i >= n) return;
-    const float xi = x[i];
+// value i of a q8_1 row set (the warp holds block i / 32, lane = i % 32)
+__dpct_inline__ void q8_1_store(const float xi, block_q8_1 *__restrict__ y,
+                                const long long i) {
     float amax = sycl::fabs(xi), sum = xi;
 #pragma unroll
     for (int o = 16; o > 0; o >>= 1) {
@@ -1534,6 +1537,56 @@ __dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
     if (iqs == 0) y[ib].ds = sycl::half2(d, sum);
 }
 
+__dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
+                                          block_q8_1 *__restrict__ y,
+                                          long long n) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long i =
+        (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+        item_ct1.get_local_id(2);
+    if (i >= n) return;
+    q8_1_store(x[i], y, i);
+}
+
+// swiglu_entries_kernel and quantize_q8_1_kernel in one pass, over the call's own entries only:
+// [grp_start[0], grp_start[*n_groups]) (a call's entries are contiguous; the verify window's PCIe call starts after
+// its VRAM call) instead of all cap_entries twice - nothing reads the others: the down kernel reads its groups'.
+// n_ff is a multiple of 32, so a warp is one q8_1 block and the bounds are warp-uniform.  The values are the two
+// kernels': the SwiGLU product is rounded on its own - it must not contract into the first add of q8_1_store's block
+// sum, as it could not when it went through memory (CUDA: __fmul_rn; HIP's __fmul_rn is a plain product, so there
+// the product is written here under contract(off)) - then q8_1_store unchanged: the same blocks, bit for bit.
+__dpct_inline__ void swiglu_q8_1_entries_kernel(
+    const float *__restrict__ gate, const float *__restrict__ up,
+    const int32_t *__restrict__ grp_start, const int32_t *__restrict__ n_groups,
+    int n_ff, block_q8_1 *__restrict__ hq) {
+    // the product rounded on its own (no contraction into q8_1_store's block sum), as through memory in the v1 kernels
+    // - HIP's form; icpx is clang too (SYCL port)
+#pragma clang fp contract(off)
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const long long lo = (long long)grp_start[0] * n_ff,
+                    hi = (long long)grp_start[*n_groups] * n_ff;
+    for (long long i =
+             lo +
+             (long long)item_ct1.get_group(2) * item_ct1.get_local_range(2) +
+             item_ct1.get_local_id(2);
+         i < hi; i += (long long)item_ct1.get_group_range(2) *
+                      item_ct1.get_local_range(2)) {
+        const float g = gate[i];
+#if defined(__HIPCC__)
+        const float h = (g / (1.0f + __expf(-g))) * up[i];
+#else
+        /*
+        DPCT1013: The rounding mode could not be specified and the generated
+        code may have different accuracy than the original code. Verify the
+        correctness. SYCL math built-in function rounding mode is aligned with
+        OpenCL C 1.2 standard.
+        */
+        const float h = (g / (1.0f + sycl::native::exp(-g))) * up[i];
+#endif
+        q8_1_store(h, hq, i);
+    }
+}
+
 // ---------------------------------------------------------------- dequant (dequantize.cuh)
 template <typename dst_t> __dpct_inline__ dst_t cvt(float v);
 template <> __dpct_inline__ float cvt<float>(float v) { return v; }
@@ -2395,10 +2448,18 @@ size_t native_expert_scratch_bytes(int64_t cap, int64_t n_ff) {
     return 3 * ((f + 255) & ~(size_t) 255) + (((size_t) cap * (size_t) (n_ff / 32) * sizeof(block_q8_1) + 255) & ~(size_t) 255);
 }
 
+namespace {
+bool g_grouped_v1 = env_on("STRATA_GROUPED_V1");
+}  // namespace
+
+void native_grouped_set_v1(bool v1) { g_grouped_v1 = v1; }
+
 void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long* grp_ptr, const int32_t* grp_start,
                            const int32_t* n_groups, const int32_t* ent_dst, const int32_t* ent_tok, int64_t cap_groups,
-                           int64_t cap_entries, const void* x_q8_1, void* scratch, float* out, void* stream) {
+                           int64_t cap_entries, const void* x_q8_1, void* scratch, float* out, void* stream,
+                           int64_t grid_groups) {
     if (cap_groups <= 0 || cap_entries <= 0) return;
+    if (L.n_ff % 32 != 0) { std::fprintf(stderr, "native_expert_grouped: n_ff %lld\n", (long long) L.n_ff); std::exit(1); }
     dpct::queue_ptr s = strata::q_of(stream);
     const size_t f = (size_t) cap_entries * (size_t) L.n_ff * sizeof(float), fa = (f + 255) & ~(size_t) 255;
     float* gate = (float*) scratch;
@@ -2406,8 +2467,12 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     float* h = (float*) ((uint8_t*) scratch + 2 * fa);
     block_q8_1* hq = (block_q8_1*) ((uint8_t*) scratch + 3 * fa);
     const auto* X = (const block_q8_1*) x_q8_1;
+    const bool v1 = g_grouped_v1;
+    // #363: a verify window's PCIe call usually has no group: `grid_groups` block rows stride over the groups instead
+    // of one row per possible group (the results do not depend on it)
+    const int64_t gy = (v1 || grid_groups <= 0 || grid_groups > cap_groups) ? cap_groups : grid_groups;
     const dpct::dim3 ggu((unsigned)((2 * L.n_ff + kExpertRows - 1) / kExpertRows),
-                         (unsigned)cap_groups);
+                         (unsigned)gy);
     switch (L.gu_type) {
 #define STRATA_GU(T) case T: launch_gu<T>(ggu, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
         STRATA_GU_FMTS(STRATA_GU)
@@ -2416,32 +2481,54 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     }
     check("native_expert_grouped/gu");
     const long long nh = (long long) cap_entries * L.n_ff;
-    {
-        auto exp_props = sycl::ext::oneapi::experimental::properties{
-            sycl::ext::oneapi::experimental::use_root_sync};
+    if (v1) {
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
 
-        s->parallel_for<dpct_kernel_name<class swiglu_entries_kernel_a4959c>>(
-            sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
-                                  sycl::range(1, 1, 256),
-                              sycl::range(1, 1, 256)),
-            exp_props, [=](sycl::nd_item<3> item_ct1) {
-                swiglu_entries_kernel(gate, up, h, nh);
-            });
-    }
-    {
+            s->parallel_for<
+                dpct_kernel_name<class swiglu_entries_kernel_a4959c>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    swiglu_entries_kernel(gate, up, h, nh);
+                });
+        }
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            s->parallel_for<
+                dpct_kernel_name<class quantize_q8_1_kernel_2f9312>>(
+                sycl::nd_range<3>(
+                    sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
+                        sycl::range(1, 1, 256),
+                    sycl::range(1, 1, 256)),
+                exp_props,
+                [=](sycl::nd_item<3> item_ct1)
+                    [[sycl::reqd_sub_group_size(32)]] {
+                        quantize_q8_1_kernel(h, hq, nh);
+                    });
+        }
+    } else {
         auto exp_props = sycl::ext::oneapi::experimental::properties{
             sycl::ext::oneapi::experimental::use_root_sync};
 
-        s->parallel_for<dpct_kernel_name<class quantize_q8_1_kernel_3fc248>>(
+        s->parallel_for<
+            dpct_kernel_name<class swiglu_q8_1_entries_kernel_115291>>(
             sycl::nd_range<3>(sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
                                   sycl::range(1, 1, 256),
                               sycl::range(1, 1, 256)),
             exp_props,
             [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(32)]] {
-                quantize_q8_1_kernel(h, hq, nh);
+                swiglu_q8_1_entries_kernel(gate, up, grp_start, n_groups,
+                                           (int)L.n_ff, hq);
             });
     }
-    const dpct::dim3 gd((unsigned)((L.n_embd + kExpertRows - 1) / kExpertRows), (unsigned)cap_groups);
+    check("native_expert_grouped/swiglu");
+    const dpct::dim3 gd((unsigned)((L.n_embd + kExpertRows - 1) / kExpertRows), (unsigned)gy);
     switch (L.d_type) {
 #define STRATA_DOWN(T) case T: launch_down<T>(gd, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
         STRATA_D_FMTS(STRATA_DOWN)
diff --git a/sycl/src/kernels/native_grouped_parity.cpp b/sycl/src/kernels/native_grouped_parity.cpp
new file mode 100644
index 00000000000..d20565eb21f
--- /dev/null
+++ b/sycl/src/kernels/native_grouped_parity.cpp
@@ -0,0 +1,458 @@
+// src/kernels/native_grouped_parity.cpp - native_expert_grouped's group stride (grid_groups) and its fused SwiGLU +
+// q8_1 pass, against the launches before them (native_grouped_set_v1: a block row per possible group, SwiGLU and the
+// q8_1 quantization as two kernels over all cap_entries).  Synthetic blobs, no model.
+//
+//     build/native_grouped_parity           the checks (a ctest; needs the GPU)
+//     build/native_grouped_parity --bench   the checks, then v1/new timings of 48 calls in a graph (a window's layers)
+//
+// Every gate/up format with every down format; calls of 0..cap groups of 1..T entries each (an empty call is what the
+// verify window's PCIe call usually is), entries from 0 and from past 0 (the PCIe call's follow the VRAM call's),
+// scattered destinations, stale scratch, grid_groups 0 (= cap), 1, 2, 3, 4 and above cap: the output must be BITWISE
+// equal to v1's, the rows the call must not write included (both start from the same NaN pattern).
+//
+// Random bytes are valid codes for every format here (every grid index is in range); only the fp16 block scales are
+// set, small enough that the SwiGLU outputs keep a finite fp16 q8_1 scale.
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/kernels/iq_kernels.hpp"
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <numeric>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+
+int g_fail = 0;
+
+void ck(dpct::err0 e, const char *what) {
+}
+
+template<typename T>
+T* dalloc(size_t n) {
+    T* p = nullptr;
+    ck(DPCT_CHECK_ERROR(p = (T *)sycl::malloc_device(
+                            n * sizeof(T) + 256, dpct::get_in_order_queue())),
+       "malloc");
+    ck(DPCT_CHECK_ERROR(
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(p, 0, n * sizeof(T) + 256).wait()),
+       "memset");
+    return p;
+}
+
+const char* name_of(int t) {
+    switch (t) {
+        case 16: return "IQ2_XXS";
+        case 17: return "IQ2_XS";
+        case 18: return "IQ3_XXS";
+        case 20: return "IQ4_NL";
+        case 21: return "IQ3_S";
+        case 22: return "IQ2_S";
+        case 23: return "IQ4_XS";
+        case 29: return "IQ1_M";
+        case 42: return "Q2_0";
+        case 12: return "Q4_K";
+        case 13: return "Q5_K";
+        case 7: return "Q5_1";
+        case 8: return "Q8_0";
+        default: return "?";
+    }
+}
+int block_values(int t) { return t == 20 || t == 7 || t == 8 ? 32 : t == 42 ? 64 : 256; }
+
+// `rows` rows of `n` values of format t: random bytes, then a finite fp16 scale in every block
+std::vector<uint8_t> random_rows(int t, int64_t rows, int64_t n, std::mt19937& rng) {
+    const size_t rb = k::iq_row_bytes(t, n), bs = k::iq_row_bytes(t, block_values(t));
+    std::vector<uint8_t> w((size_t) rows * rb);
+    std::uniform_int_distribution<int> byte(0, 255), ex(2, 8), man(0, 1023), sgn(0, 1);
+    for (auto& b : w) b = (uint8_t) byte(rng);
+    for (size_t o = 0; o < w.size(); o += bs) {
+        if (t == 29) {
+            // IQ1_M: the fp16 scale is the top nibbles of its four scale words (bytes 48..55), the sign and the
+            // exponent's top bits in the last: 0x1 / 0x2 there (0x9 / 0xA negative) keeps it in 2^-11 .. 2^-3
+            const uint8_t nib = (uint8_t) ((sgn(rng) ? 0x8 : 0x0) | (1 + (byte(rng) & 1)));
+            w[o + 55] = (uint8_t) ((w[o + 55] & 0x0F) | (nib << 4));
+        } else {   // the other formats start their block with the fp16 scale: 2^-13 .. 2^-6
+            // (Q4_K / Q5_K: 2^-14 .. 2^-11, their 6-bit sub-scales multiply it by up to 63)
+            const int e = (t == 12 || t == 13) ? 1 + ex(rng) % 4 : ex(rng);
+            const uint16_t h = (uint16_t) ((sgn(rng) ? 0x8000 : 0) | (e << 10) | man(rng));
+            std::memcpy(&w[o], &h, 2);
+            if (t == 12 || t == 13 || t == 7) {   // Q4_K / Q5_K: dmin, Q5_1: m - the second fp16, as small
+                const int em = (t == 7) ? ex(rng) : 1 + ex(rng) % 4;
+                const uint16_t m = (uint16_t) ((sgn(rng) ? 0x8000 : 0) | (em << 10) | man(rng));
+                std::memcpy(&w[o + 2], &m, 2);
+            }
+        }
+    }
+    return w;
+}
+
+// one window's worth of expert calls on one format pair: blobs, T tokens' q8_1 activations, cap = T * K entries
+struct Setup {
+    k::NativeExpertLayout L;
+    int T = 0, K = 0, cap = 0, n_blobs = 0;
+    size_t slot = 0;
+    uint8_t* blobs = nullptr;
+    uint8_t* xq = nullptr;
+    uint8_t* scr = nullptr;
+    size_t scr_bytes = 0;
+    float* out = nullptr;
+    size_t out_floats = 0;
+    unsigned long long* ptr = nullptr;
+    int32_t *start = nullptr, *n = nullptr, *dst = nullptr, *tok = nullptr;
+
+    Setup(int gu, int dt, int64_t H, int64_t FF, int tokens, int k_per_token,
+          int blobs_n, std::mt19937 &rng, dpct::queue_ptr s) {
+        L = k::native_expert_layout(gu, dt, H, FF);
+        T = tokens; K = k_per_token; cap = T * K; n_blobs = blobs_n;
+        slot = (L.bytes + 255) & ~(size_t) 255;
+        blobs = dalloc<uint8_t>(slot * (size_t) n_blobs);
+        for (int b = 0; b < n_blobs; ++b) {
+            // gate rows | up rows (format gu, H values each) | down rows (format dt, FF values each)
+            auto blob = random_rows(gu, 2 * FF, H, rng);
+            const auto down = random_rows(dt, H, FF, rng);
+            blob.insert(blob.end(), down.begin(), down.end());
+            if (blob.size() != L.bytes) { std::fprintf(stderr, "blob %zu != %zu bytes\n", blob.size(), L.bytes); std::exit(2); }
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
+                   blobs + slot * (size_t)b, blob.data(), blob.size()).wait()),
+               "blob");
+        }
+        std::normal_distribution<float> nd(0.f, 1.f);
+        std::vector<float> x((size_t) T * H);
+        for (auto& v : x) v = nd(rng);
+        float* dx = dalloc<float>(x.size());
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR(
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait()),
+           "x");
+        xq = dalloc<uint8_t>((size_t) T * (H / 32) * 36);
+        k::quantize_q8_1_rows(dx, T, H, xq, s);
+        ck(DPCT_CHECK_ERROR(s->wait()), "quantize");
+        sycl::free(dx, dpct::get_in_order_queue());
+        scr_bytes = k::native_expert_scratch_bytes(cap, FF);
+        scr = dalloc<uint8_t>(scr_bytes);
+        out_floats = (size_t) cap * H;
+        out = dalloc<float>(out_floats);
+        ptr = dalloc<unsigned long long>(cap);
+        start = dalloc<int32_t>(cap + 1);
+        n = dalloc<int32_t>(1);
+        dst = dalloc<int32_t>(cap);
+        tok = dalloc<int32_t>(cap);
+    }
+    ~Setup() {
+        sycl::free(blobs, dpct::get_in_order_queue());
+            sycl::free(xq, dpct::get_in_order_queue());
+            sycl::free(scr, dpct::get_in_order_queue());
+            sycl::free(out, dpct::get_in_order_queue());
+        sycl::free(ptr, dpct::get_in_order_queue());
+            sycl::free(start, dpct::get_in_order_queue());
+            sycl::free(n, dpct::get_in_order_queue());
+            sycl::free(dst, dpct::get_in_order_queue());
+            sycl::free(tok, dpct::get_in_order_queue());
+    }
+    // a plan: `groups` groups of 1..T entries from entry `base` on (as many as fit in cap)
+    int plan(int groups, int base, std::mt19937& rng) {
+        std::uniform_int_distribution<int> size(1, T);
+        std::vector<int> sizes;
+        int used = base;
+        for (int g = 0; g < groups; ++g) {
+            const int m = std::min(size(rng), cap - used);
+            if (m <= 0) break;
+            sizes.push_back(m);
+            used += m;
+        }
+        return plan_sizes(sizes, base, rng);
+    }
+    // groups of these sizes from entry `base` on, each its own blob (as long as there are enough: a window's groups
+    // are different experts); scattered destinations, random tokens
+    int plan_sizes(const std::vector<int>& sizes, int base, std::mt19937& rng) {
+        std::uniform_int_distribution<int> tk(0, T - 1);
+        std::vector<int> order(n_blobs);
+        std::iota(order.begin(), order.end(), 0);
+        std::shuffle(order.begin(), order.end(), rng);
+        std::vector<unsigned long long> p;
+        std::vector<int32_t> st(1, base), tk_v, ds(cap);
+        for (const int m : sizes) {
+            p.push_back((unsigned long long) (blobs + slot * (size_t) order[p.size() % order.size()]));
+            st.push_back(st.back() + m);
+        }
+        if (st.back() > cap) { std::fprintf(stderr, "plan: %d entries > cap %d\n", st.back(), cap); std::exit(2); }
+        const int ng = (int) p.size();
+        std::iota(ds.begin(), ds.end(), 0);
+        std::shuffle(ds.begin(), ds.end(), rng);                  // scattered rows of `out`
+        for (int e = 0; e < cap; ++e) tk_v.push_back(tk(rng));
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        if (ng) ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
+                       ptr, p.data(), p.size() * 8).wait()),
+                   "ptr");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(start, st.data(),
+                                                              st.size() * 4).wait()),
+           "start");
+        ck(DPCT_CHECK_ERROR(
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(n, &ng, 4).wait()),
+           "n");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dst, ds.data(),
+                                                              ds.size() * 4).wait()),
+           "dst");
+        /*
+        DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+        assuming in the original code the source host memory is pageable memory.
+        If the memory is not pageable, call wait() on event return by memcpy API
+        to ensure synchronization behavior.
+        */
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(tok, tk_v.data(),
+                                                              tk_v.size() * 4).wait()),
+           "tok");
+        return ng;
+    }
+    void call(int64_t grid_groups, dpct::queue_ptr s) {
+        k::native_expert_grouped(L, ptr, start, n, dst, tok, cap, cap, xq, scr, out, s, grid_groups);
+    }
+    // `out` after one call from the NaN pattern, the scratch holding `junk` (what earlier calls left there)
+    std::vector<uint32_t> result(bool v1, int64_t grid_groups, int junk,
+                                 dpct::queue_ptr s) {
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
+                                .memset(out, 0xFF, out_floats * 4)
+                                .wait()),
+           "memset");
+        ck(DPCT_CHECK_ERROR(
+               (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memset(scr, junk, scr_bytes).wait()),
+           "memset");
+        k::native_grouped_set_v1(v1);
+        call(grid_groups, s);
+        k::native_grouped_set_v1(false);
+        ck(DPCT_CHECK_ERROR(s->wait()), "sync");
+        std::vector<uint32_t> o(out_floats);
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
+                                .memcpy(o.data(), out, o.size() * 4)
+                                .wait()),
+           "out");
+        return o;
+    }
+};
+
+void check(int gu, int dt, int64_t H, int64_t FF, dpct::queue_ptr s,
+           std::mt19937 &rng) {
+    Setup S(gu, dt, H, FF, 6, 4, 9, rng, s);   // 6 tokens x 4 experts: cap 24 entries
+    int calls = 0, bad = 0;
+    size_t written = 0;
+    for (const int base : {0, 7}) {
+        for (const int groups : {0, 1, 2, 3, 5, 8, 24}) {
+            const int ng = S.plan(groups, base, rng);
+            const auto ref = S.result(true, 0, 0x00, s);
+            size_t w = 0;
+            for (const uint32_t v : ref) w += v != 0xFFFFFFFFu;
+            written += w;
+            for (const int64_t gy : {(int64_t) 0, (int64_t) 1, (int64_t) 2, (int64_t) 3, (int64_t) 4, (int64_t) S.cap + 3}) {
+                const auto got = S.result(false, gy, (calls & 1) ? 0x7F : 0x00, s);
+                ++calls;
+                size_t diff = 0;
+                for (size_t i = 0; i < ref.size(); ++i) diff += ref[i] != got[i];
+                if (diff) {
+                    std::printf("  %-8s/%-7s base %d, %d groups, grid_groups %lld: %zu of %zu floats differ  FAIL\n",
+                                name_of(gu), name_of(dt), base, ng, (long long) gy, diff, ref.size());
+                    ++bad;
+                }
+            }
+        }
+    }
+    std::printf("%-8s/%-7s %5lld x %4lld  %d calls: %s (%zu output floats written in all)\n", name_of(gu), name_of(dt),
+                (long long) H, (long long) FF, calls, bad ? "FAIL" : "bitwise equal to v1", written);
+    if (written == 0) { std::printf("  nothing was written: the check checked nothing  FAIL\n"); ++bad; }
+    g_fail += bad;
+}
+
+// ------------------------------------------------------------------------------------------------ --bench
+// A window's 48 calls, one per layer, each with ITS OWN experts as the layers have: copies of the Setup's blobs in one
+// arena, so the weights stream from DRAM as in the engine.  (48 calls re-reading the same 28 experts - 73 MB, about an
+// Ada L2 - would read part of them from L2; the engine's layers share none.)
+struct Layers {
+    uint8_t* arena = nullptr;
+    std::vector<unsigned long long*> ptr;           // per layer: its groups' blobs (device)
+    Layers(Setup& S, int ng) {
+        const int per = std::max(ng, 1);
+        arena = dalloc<uint8_t>(S.slot * (size_t) (48 * per));
+        for (int l = 0; l < 48; ++l) {
+            std::vector<unsigned long long> p;
+            for (int j = 0; j < per; ++j) {
+                uint8_t* d = arena + S.slot * (size_t) (l * per + j);
+                ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
+                       d,
+                       S.blobs + S.slot * (size_t)((l * per + j) % S.n_blobs),
+                       S.L.bytes).wait()),
+                   "blob copy");
+                p.push_back((unsigned long long) d);
+            }
+            unsigned long long* dp = dalloc<unsigned long long>(p.size());
+            /*
+            DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
+            assuming in the original code the source host memory is pageable
+            memory. If the memory is not pageable, call wait() on event return
+            by memcpy API to ensure synchronization behavior.
+            */
+            ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(
+                   dp, p.data(), p.size() * 8).wait()),
+               "ptr");
+            ptr.push_back(dp);
+        }
+    }
+    Layers(const Layers&) = delete;
+    Layers& operator=(const Layers&) = delete;
+    ~Layers() {
+        for (auto *p : ptr)
+            DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
+        sycl::free(arena, dpct::get_in_order_queue());
+    }
+};
+
+// the 48 calls of one variant captured in one graph
+dpct::experimental::command_graph_exec_ptr
+make_graph(dpct::queue_ptr s, Setup &S, const Layers &Ls, bool v1, int64_t gy) {
+    k::native_grouped_set_v1(v1);
+    dpct::experimental::command_graph_ptr g;
+    dpct::experimental::command_graph_exec_ptr ge;
+    ck(DPCT_CHECK_ERROR(dpct::experimental::begin_recording(s)), "capture");
+    for (int l = 0; l < 48; ++l)
+        k::native_expert_grouped(S.L, Ls.ptr[l], S.start, S.n, S.dst, S.tok, S.cap, S.cap, S.xq, S.scr, S.out, s, gy);
+    ck(DPCT_CHECK_ERROR(dpct::experimental::end_recording(s, &g)), "capture");
+    ck(DPCT_CHECK_ERROR(
+           ge = new sycl::ext::oneapi::experimental::command_graph<
+               sycl::ext::oneapi::experimental::graph_state::executable>(
+               g->finalize())),
+       "instantiate");
+    ck(DPCT_CHECK_ERROR(delete (g)), "graph");
+    k::native_grouped_set_v1(false);
+    return ge;
+}
+
+// one launch of the graph: microseconds per call
+float launch_us(dpct::queue_ptr s,
+                dpct::experimental::command_graph_exec_ptr ge,
+                dpct::event_ptr e0, dpct::event_ptr e1) {
+    /*
+    DPCT1024: The original code returned the error code that was further
+    consumed by the program logic. This original code was replaced with 0. You
+    may need to rewrite the program logic consuming the error code.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::sync_barrier(e0, s)), "record");
+    ck(DPCT_CHECK_ERROR(s->ext_oneapi_graph(*ge)), "launch");
+    /*
+    DPCT1024: The original code returned the error code that was further
+    consumed by the program logic. This original code was replaced with 0. You
+    may need to rewrite the program logic consuming the error code.
+    */
+    ck(DPCT_CHECK_ERROR(dpct::sync_barrier(e1, s)), "record");
+    ck(DPCT_CHECK_ERROR(e1->wait_and_throw()), "bench");
+    float ms = 0;
+    ck(DPCT_CHECK_ERROR(
+           ms = (e1->get_profiling_info<
+                     sycl::info::event_profiling::command_end>() -
+                 e0->get_profiling_info<
+                     sycl::info::event_profiling::command_start>()) /
+                1000000.0f),
+       "elapsed");
+    return 1e3f * ms / 48.0f;
+}
+
+float median(std::vector<float> v) {
+    std::sort(v.begin(), v.end());
+    return v[v.size() / 2];
+}
+
+// The two variants' launches ALTERNATE (v1-new, new-v1, ...) after a warm-up, and each reports its median: a card
+// under sustained load steps its clock down after a fraction of a second (an RTX 4080 SUPER went from 80 to 89 us
+// per gate/up call within one run), and whichever variant ran before the step would look faster.
+constexpr int kWarmPairs = 20, kPairs = 40;
+
+void bench(dpct::queue_ptr s, std::mt19937 &rng) {
+    std::printf("\n--bench: microseconds per call, a window's 48 calls in a graph, each layer with its own experts (the\n"
+                "weights stream from DRAM as in the engine); v1 / new (grid_groups): medians of %d launches each,\n"
+                "alternating, after %d warm-up pairs - idle GPU assumed\n", kPairs, kWarmPairs);
+    // a verify window's shape: 4 tokens x 10 experts, 2560 x 768 IQ3_S / IQ4_XS experts
+    Setup S(21, 23, 2560, 768, 4, 10, 32, rng, s);
+    std::vector<int> vram(16, 1);
+    vram.insert(vram.end(), 12, 2);                                   // 28 groups, 40 entries
+    const struct { const char* what; std::vector<int> sizes; int64_t gy; } rows[] = {
+        {"no group (the PCIe call at pcie_frac 0)", {}, 4},
+        {"1 group of 2 entries (a PCIe call)", {2}, 4},
+        {"28 groups, 40 entries (a VRAM call)", vram, 0},
+    };
+    dpct::event_ptr e0, e1;
+    ck(DPCT_CHECK_ERROR(e0 = new sycl::event()), "event");
+    ck(DPCT_CHECK_ERROR(e1 = new sycl::event()), "event");
+    for (const auto& r : rows) {
+        const int ng = S.plan_sizes(r.sizes, 0, rng);
+        const Layers Ls(S, ng);                                       // 48 x 28 experts: 3.7 GB for the VRAM call
+        dpct::experimental::command_graph_exec_ptr ga = make_graph(s, S, Ls,
+                                                                   true, 0),
+                                                   gb = make_graph(s, S, Ls,
+                                                                   false, r.gy);
+        std::vector<float> ta, tb;
+        for (int i = 0; i < kWarmPairs + kPairs; ++i) {
+            const bool a_first = i % 2 == 0;
+            const float x = launch_us(s, a_first ? ga : gb, e0, e1), y = launch_us(s, a_first ? gb : ga, e0, e1);
+            if (i < kWarmPairs) continue;
+            ta.push_back(a_first ? x : y);
+            tb.push_back(a_first ? y : x);
+        }
+        ck(DPCT_CHECK_ERROR(delete (ga)), "graph");
+        ck(DPCT_CHECK_ERROR(delete (gb)), "graph");
+        std::printf("  %-42s %8.2f / %8.2f us (grid_groups %lld)\n", r.what, median(ta), median(tb), (long long) r.gy);
+    }
+    dpct::destroy_event(e0);
+    dpct::destroy_event(e1);
+}
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    const bool do_bench = argc > 1 && std::string(argv[1]) == "--bench";
+    dpct::queue_ptr s;
+    ck(DPCT_CHECK_ERROR(s = dpct::get_current_device().create_queue(true)),
+       "stream");
+    std::mt19937 rng(316);
+    for (int gu : {16, 17, 18, 21, 22, 23, 29, 42, 12, 13, 8})        // STRATA_GU_FMTS
+        for (int dt : {20, 23, 42, 7, 8}) check(gu, dt, 512, 256, s, rng);   // STRATA_D_FMTS; IQ4_XS: n_ff % 256
+    check(21, 20, 2560, 640, s, rng);                                   // a model's shapes
+    check(21, 23, 2560, 768, s, rng);
+    if (do_bench) bench(s, rng);
+    std::printf("native_grouped_parity: %d failures\n", g_fail);
+    dpct::get_current_device().destroy_queue(s);
+    return g_fail ? 1 : 0;
+}
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index 29e30e35aa2..6c4ca85012c 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -763,9 +763,254 @@ __dpct_inline__ void gdn_rec_cols_pipe_kernel(float *__restrict__ state,
 #pragma unroll
     for (int r = 0; r < RPG; ++r) base[r * rs] = s[r];
 }
+#if !defined(__HIPCC__)
+// The recurrence with one thread for the three value heads that share a key head (head % HK): column c of heads
+// qh, qh + 16 and qh + 32, row group rg.  gdn_rec_cols_pipe_kernel spends its time in shared memory, not in
+// arithmetic: every thread of a warp needs the same 32 q and k values per token (the k twice), and a warp receives one
+// such broadcast value per clock however wide the load.  Here every q/k value a thread loads feeds three heads, and a
+// token's k row goes into registers once for both of its uses.  The inputs come in blocks of GDN_TB tokens, copied to
+// shared memory by cp.async while the block before computes (one token ahead is shorter than a load from L2 takes),
+// and the two cross-row-group sums have their own arrays, so a token needs 2 __syncthreads instead of 5: the second
+// one of a token orders every read of rkv before the next token's writes, the next token's first one every read of ro
+// before the writes after it.  64 blocks instead of 192.  Per value head and column the same arithmetic in the same
+// order: the same bits (src/prefill/gdn_rec_parity.cu checks them and times the variants: 1.41x on a 4080 Super).
+// sm_80+ with 32 to 47 or 64 and more SMs (gdn_keyhead_ok); STRATA_GDN_KEYHEAD=0: gdn_rec_cols_pipe_kernel.
+#if 1   // SYCL port: plain copies (no cp.async)
+#define STRATA_GDN_CP_ASYNC 0   // Turing builds: plain copies (never launched there, see gdn_keyhead_ok)
+#else
+#define STRATA_GDN_CP_ASYNC 1
+#endif
+__dpct_inline__ void gdn_cp4(float *smem, const float *gmem) {
+#if STRATA_GDN_CP_ASYNC
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("cp.async.ca.shared.global [%0], [%1], 4;\n" ::"r"(
+                     (unsigned)__cvta_generic_to_shared(smem)),
+                 "l"(gmem));
+#else
+    *smem = *gmem;
+#endif
+}
+__dpct_inline__ void gdn_cp16(float *smem, const float *gmem) {
+#if STRATA_GDN_CP_ASYNC
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.cg.shared.global [%0], [%1], 16;\n" ::"r"(
+                     (unsigned)__cvta_generic_to_shared(smem)),
+                 "l"(gmem));
+#else
+    *(((uint32_t *)(uintptr_t)(unsigned)__cvta_generic_to_shared(smem))) =
+        *(((uint32_t *)(uintptr_t)gmem));
+    if (16 > 4)
+        *(((uint32_t *)(uintptr_t)(unsigned)__cvta_generic_to_shared(smem)) +
+          1) = *(((uint32_t *)(uintptr_t)gmem) + 1);
+    if (16 > 8)
+        *(((uint32_t *)(uintptr_t)(unsigned)__cvta_generic_to_shared(smem)) +
+          2) = *(((uint32_t *)(uintptr_t)gmem) + 2);
+    if (16 > 12)
+        *(((uint32_t *)(uintptr_t)(unsigned)__cvta_generic_to_shared(smem)) +
+          3) = *(((uint32_t *)(uintptr_t)gmem) + 3);
+#endif
+#else
+    *reinterpret_cast<sycl::float4*>(smem) = *reinterpret_cast<const sycl::float4*>(gmem);
+#endif
+}
+__dpct_inline__ void gdn_cp_commit() {
+#if STRATA_GDN_CP_ASYNC
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.commit_group;\n" ::);
+#else
+
+#endif
+#endif
+}
+__dpct_inline__ void
+gdn_cp_wait_prev() { // every group but the newest has landed
+#if STRATA_GDN_CP_ASYNC
+#if defined(__SYCL_DEVICE_ONLY__) && defined(__NVPTX__)
+    asm volatile("cp.async.wait_group 1;\n" ::);
+#else
+
+#endif
+#endif
+}
+constexpr int GDN_TB = 8, VPK = HV / HK;   // tokens per staged block, value heads per key head
+/*
+DPCT1110: The total declared local variable size in device function
+gdn_rec_kh_kernel exceeds 128 bytes and may cause high register pressure.
+Consult with your hardware vendor to find the total register size available and
+adjust the code, or use smaller sub-group size to avoid high register pressure.
+*/
+__dpct_inline__ void gdn_rec_kh_kernel(float *__restrict__ state,
+                                       const float *__restrict__ h,
+                                       const float *__restrict__ gate,
+                                       const float *__restrict__ beta,
+                                       float *__restrict__ oc_out, int64_t T) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    constexpr int TB = GDN_TB, NT = CB * RG, QKP = S / 4,
+                  VP = CB / 4; // threads, 16-byte pieces of a q/k row, of v
+    auto &sq =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2][TB][S]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sk =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2][TB][S]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sv = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[2][TB][VPK][CB]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sg =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2][TB][VPK]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &sb =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[2][TB][VPK]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &rkv = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[VPK][RG][CB]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &ro = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        float[VPK][RG][CB]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const int qh = item_ct1.get_group(2) / NCB,
+              cb = item_ct1.get_group(2) % NCB;
+    const int c = item_ct1.get_local_id(2), rg = item_ct1.get_local_id(1),
+              tid = rg * CB + c, col = cb * CB + c;
+    float s[VPK][RPG];
+    const size_t rs = (size_t) HV * S;
+#pragma unroll
+    for (int j = 0; j < VPK; ++j) {
+        const float* base = state + ((size_t) (rg * RPG) * HV + qh + j * HK) * S + col;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) s[j][r] = base[r * rs];
+    }
+    const int64_t nblk = (T + TB - 1) / TB;
+    auto stage = [&](int64_t k) {   // tokens [k * TB, k * TB + TB) into buffer k & 1
+        const int bb = (int) (k & 1);
+        const int64_t t0 = k * TB;
+        for (int p = tid; p < TB * 2 * QKP; p += NT) {
+            const int i = p / (2 * QKP), w = p % (2 * QKP), isk = w / QKP, jj = (w % QKP) * 4;
+            if (t0 + i < T)
+                gdn_cp16(isk ? &sk[bb][i][jj] : &sq[bb][i][jj], h + (t0 + i) * C + (isk ? HK * S : 0) + qh * S + jj);
+        }
+        for (int p = tid; p < TB * VPK * VP; p += NT) {
+            const int i = p / (VPK * VP), w = p % (VPK * VP), j = w / VP, jj = (w % VP) * 4;
+            if (t0 + i < T)
+                gdn_cp16(&sv[bb][i][j][jj], h + (t0 + i) * C + 2 * HK * S + (qh + j * HK) * S + cb * CB + jj);
+        }
+        for (int p = tid; p < 2 * TB * VPK; p += NT) {
+            const int isb = p / (TB * VPK), w = p % (TB * VPK), i = w / VPK, j = w % VPK;
+            if (t0 + i < T)
+                gdn_cp4(isb ? &sb[bb][i][j] : &sg[bb][i][j], (isb ? beta : gate) + (t0 + i) * HV + qh + j * HK);
+        }
+    };
+    if (nblk > 0) stage(0);
+    gdn_cp_commit();
+    for (int64_t k = 0; k < nblk; ++k) {
+        // buffer (k + 1) & 1 was read by block k - 1, whose last token's second __syncthreads every thread has passed
+        if (k + 1 < nblk) stage(k + 1);
+        gdn_cp_commit();
+        gdn_cp_wait_prev();
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        const int bb = (int) (k & 1);
+        const int n = (int) ((T - k * TB) < TB ? (T - k * TB) : TB);
+        for (int i = 0; i < n; ++i) {
+            const int64_t t = k * TB + i;
+            float kc[RPG];
+#pragma unroll
+            for (int r = 0; r < RPG; ++r) kc[r] = sk[bb][i][rg * RPG + r];
+            float g[VPK], kv[VPK], delta[VPK], o[VPK];
+#pragma unroll
+            for (int j = 0; j < VPK; ++j) {
+                g[j] = sycl::native::exp(sg[bb][i][j]); kv[j] = 0.0f;
+                o[j] = 0.0f;
+            }
+#pragma unroll
+            for (int r = 0; r < RPG; ++r)
+#pragma unroll
+                for (int j = 0; j < VPK; ++j)
+                    kv[j] = sycl::fma(s[j][r], kc[r], kv[j]);
+#pragma unroll
+            for (int j = 0; j < VPK; ++j) rkv[j][rg][c] = kv[j];
+            /*
+            DPCT1118: SYCL group functions and algorithms must be
+            encountered in converged control flow. You may need to adjust the
+            code.
+            */
+            /*
+            DPCT1065: Consider replacing sycl::nd_item::barrier() with
+            sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+            better performance if there is no access to global memory.
+            */
+            item_ct1.barrier();
+#pragma unroll
+            for (int j = 0; j < VPK; ++j) {
+                const float kv_col = rkv[j][0][c] + rkv[j][1][c] + rkv[j][2][c] + rkv[j][3][c];
+                delta[j] = (sv[bb][i][j][c] - g[j] * kv_col) * sb[bb][i][j];
+            }
+#pragma unroll
+            for (int r = 0; r < RPG; ++r) {
+                const float qr = sq[bb][i][rg * RPG + r];
+#pragma unroll
+                for (int j = 0; j < VPK; ++j) {
+                    s[j][r] = sycl::fma(g[j], s[j][r], kc[r] * delta[j]);
+                    o[j] = sycl::fma(s[j][r], (float)qr, o[j]);
+                }
+            }
+#pragma unroll
+            for (int j = 0; j < VPK; ++j) ro[j][rg][c] = o[j];
+            /*
+            DPCT1118: SYCL group functions and algorithms must be
+            encountered in converged control flow. You may need to adjust the
+            code.
+            */
+            /*
+            DPCT1065: Consider replacing sycl::nd_item::barrier() with
+            sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+            better performance if there is no access to global memory.
+            */
+            item_ct1.barrier();
+            if (rg < VPK)   // row group j writes head j's output
+                oc_out[t * HV * S + (qh + rg * HK) * S + col] =
+                    (ro[rg][0][c] + ro[rg][1][c] + ro[rg][2][c] +
+                     ro[rg][3][c]) *
+                    sycl::rsqrt((float)S);
+        }
+    }
+#pragma unroll
+    for (int j = 0; j < VPK; ++j) {
+        float* base = state + ((size_t) (rg * RPG) * HV + qh + j * HK) * S + col;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) base[r * rs] = s[j][r];
+    }
+}
+// gdn_rec_kh_kernel where it pays: a CUDA card with cp.async (sm_80+) that holds all 64 of its blocks at once (each
+// walks the whole chunk, so blocks left for a second wave would double the time), and not with 48 to 63 SMs.  The
+// busiest SM sets the pace: from 64 SMs up this kernel has one block per SM, below that two on some SMs (1.5 times as
+// long), while the kernel before has ceil(192 / SMs); two against at most four is a draw.  With the engine's grids on
+// a 4080 SUPER held to fewer SMs (gdn_rec_parity --bench): 1.40-1.42x at 64 to 80 SMs, 1.02-1.04x at 48 to 63,
+// 1.28-1.31x at 39 to 47, 1.53-1.57x at 32 to 38; an Ampere card gained less at 82 SMs (1.28x on a 3090 against
+// 1.41x here), so 48 to 63 SMs keep the kernel before.  Per call, from the current device (a layer split can mix
+// cards).
+bool gdn_keyhead_ok() {
+    // SYCL port: upstream picks it by SM count and occupancy (NVIDIA thresholds, measured on Ada/Ampere). On Xe the
+    // key-head kernel is an A/B until measured: STRATA_GDN_KEYHEAD=1 runs it, anything else keeps the kernel before.
+    static const bool on = [] { const char* v = std::getenv("STRATA_GDN_KEYHEAD"); return v != nullptr && std::atoi(v) == 1; }();
+    return on;
+}
+#endif
+// the output norm over a head's 128 columns, into the FP16 copy the out projection reads (the FP32 output before the
+// norm stays in its scratch buffer)
 __dpct_inline__ void gdn_out_norm_kernel(const float *__restrict__ z,
                                          const float *__restrict__ gamma,
-                                         float eps, float *__restrict__ y,
+                                         float eps, const float *__restrict__ y,
                                          uint16_t *__restrict__ y16) {
     auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
 auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
@@ -776,16 +1021,10 @@ auto &wsum = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[4]>(
     const float oc = y[at];
     float sp = warp_sum(oc * oc);
     if ((col & 31) == 0) wsum[col >> 5] = sp;
-    /*
-    DPCT1065: Consider replacing sycl::nd_item::barrier() with
-    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
-    performance if there is no access to global memory.
-    */
-    item_ct1.barrier();
+    item_ct1.barrier(sycl::access::fence_space::local_space);
     const float ss = wsum[0] + wsum[1] + wsum[2] + wsum[3];
     const float v = oc * sycl::rsqrt(ss / (float)S + eps) * gamma[col] *
                     sigm(z[t * HV * S + head * S + col]);
-    y[at] = v;
     y16[at] = hf(v);
 }
 
@@ -1493,7 +1732,24 @@ void gdn_recurrence(float* state, const float* h, const float* gate, const float
                     });
     } else {
         static const bool pipe = [] { const char* v = std::getenv("STRATA_GDN_PIPELINE"); return v == nullptr || std::atoi(v) != 0; }();
-        if (pipe)   // the software-pipelined loads (same bits)
+#if !defined(__HIPCC__)
+        if (pipe && gdn_keyhead_ok())   // the value heads of a key head in one thread (same bits)
+        {
+            auto exp_props = sycl::ext::oneapi::experimental::properties{
+                sycl::ext::oneapi::experimental::use_root_sync};
+
+            strata::q_of(stream)
+                ->parallel_for<
+                    dpct_kernel_name<class gdn_rec_kh_kernel_c88399>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, HK * NCB) *
+                                          sycl::range(1, RG, CB),
+                                      sycl::range(1, RG, CB)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        gdn_rec_kh_kernel(state, h, gate, beta, y, T);
+                    });
+        } else
+#endif
+            if (pipe) // the software-pipelined loads (same bits)
         {
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 9aeeec065ba..61777fddd44 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -273,10 +273,11 @@ struct Stager {
                 const int j = claim(seen);
                 if (j < 0) { active.fetch_sub(1, std::memory_order_acq_rel); break; }
                 const int b = j % kRing;
-                if (j >= kRing) {
+                if (j >= kRing)   // job j - kRing's DMA from this buffer is queued
                     while (issued.load(std::memory_order_acquire) <= j - kRing) std::this_thread::yield();
-                    while (!buffer_free(b)) std::this_thread::yield();
-                }
+                // and done (#385) - for a generation's first kRing jobs that is the previous generation's last DMA from
+                // the buffer, which nothing else waits for when a chunk ends without a sync (no MTP)
+                while (!buffer_free(b)) std::this_thread::yield();
                 const Job& jb = jobs[(size_t) j];
                 if (jb.gsrc != nullptr) {
                     if (!jb.gsrc->read_into(jb.l, jb.e, buf[b], jb.bytes)) {
@@ -416,6 +417,12 @@ struct Prefill::Impl {
     dpct::event_ptr ple_copied[2] =
         {}; // one runs; the event marks that buffer's upload done
     std::vector<uint32_t> ple_rows[2];
+    // SYCL port: each buffer's upload is marked by a sequence number the queue writes into page-locked memory after
+    // it, polled by the host - not a host wait on `ple_copied` (a host wait on a queue's event hung the prompt path
+    // under the Level Zero v2 adapter once #374 moved it inside the layer loop; see Stager::issued_one)
+    uint64_t* ple_done_seq = nullptr;
+    uint64_t ple_want[2] = {};
+    uint64_t ple_seq = 0;
     float* ple_norm = nullptr;
     uint8_t* region = nullptr;               // the attention/MoE scratch region (idle while the PLE block runs)
     uint64_t region_bytes = 0;
@@ -489,6 +496,7 @@ void Prefill::release() {
         if (impl_->hand[b])
             sycl::free(impl_->hand[b], dpct::get_in_order_queue());
         if (impl_->ple_copied[b]) dpct::destroy_event(impl_->ple_copied[b]);
+        if (b == 1 && impl_->ple_done_seq) { sycl::free(impl_->ple_done_seq, dpct::get_in_order_queue()); impl_->ple_done_seq = nullptr; }
         if (impl_->ple_emb_host[b] && impl_->ple_pageable[b].empty())
             sycl::free(impl_->ple_emb_host[b], dpct::get_in_order_queue());
     }
@@ -716,6 +724,11 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
         if (!m.ple_copied[b] &&
             DPCT_CHECK_ERROR(m.ple_copied[b] = new sycl::event()) != 0)
             ok = false;
+        if (!m.ple_done_seq) {
+            m.ple_done_seq = sycl::malloc_host<uint64_t>(2, dpct::get_in_order_queue());
+            if (m.ple_done_seq) m.ple_done_seq[0] = m.ple_done_seq[1] = 0;
+            else ok = false;
+        }
         m.ple_rows[b].resize(T * strata::kernels::PLE_N_HEADS);
     }
     if (ss.qsa_states[ss.qsa_primary()].kv_mode == 1) {   // KV streaming: the staging pool's identity page table
@@ -882,9 +895,14 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
                        std::string& err) {
     Impl& m = *impl_;
     static const bool off = [] { const char* v = std::getenv("STRATA_MTP_BATCH"); return v != nullptr && v[0] == '0'; }();
+    // A ring (KV streaming: the drafter's window, page p in slot p % n_slots over a host copy) takes the same appends
+    // with its own page table and host copy, as a streamed main layer does; the cells written are those the window can
+    // still reach (r0 below), which the ring holds, so no two of them share a slot.  STRATA_MTP_BATCH_RING=0: the
+    // drafter's own pass for a ring (the A/B).
+    static const bool ring_ok = [] { const char* v = std::getenv("STRATA_MTP_BATCH_RING"); return v == nullptr || v[0] != '0'; }();
     core::QsaState& st = mtp.kv_state_rw();
-    if (off || n <= 0 || m.g == nullptr || m.region == nullptr || st.kv_mode != 0 || st.kv_hybrid ||
-        mtp.device() != m.device)
+    if (off || n <= 0 || m.g == nullptr || m.region == nullptr || (st.kv_mode != 0 && !(st.kv_mode == 2 && ring_ok)) ||
+        st.kv_hybrid || mtp.device() != m.device)
         return false;
     const auto t0 = Clock::now();
     const core::ModelGeometry& g = *m.g;
@@ -921,7 +939,10 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
     // prompt gets 64-row buffers instead of the per-6-token fallback (19 tokens: 106 ms there, a few ms here)
     const int64_t cap = (int64_t) (m.region_bytes / per_row) & ~(int64_t) 63;
     if (cap < 64) return false;
-    const int64_t B = std::min<int64_t>(std::max<int64_t>(n - r0, 64), cap);
+    int64_t B = std::min<int64_t>(std::max<int64_t>(n - r0, 64), cap);
+    if (st.kv_mode == 2)   // #453: a ring: one batch's cells must not share a slot (a batch can straddle one page more)
+        B = std::min<int64_t>(B, ((st.n_slots - 1) * strata::kernels::qsa_real_shapes().page_size) & ~(int64_t) 63);
+    if (B < 64) return false;
     uint8_t* q = m.region;
     auto carve = [&](size_t bytes) { void* p = q; q += (bytes + 255) & ~(size_t) 255; return p; };
     float* emb = (float*) carve((size_t) B * Nn * 4);
@@ -945,7 +966,12 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
     int32_t* ident = q8 ? (int32_t*) carve((size_t) B * g.hc * 4) : nullptr;
     int32_t* bnd = q8 ? (int32_t*) carve(16) : nullptr;
     if ((uint64_t) (q - m.region) > m.region_bytes) return false;
+    static const bool timing = std::getenv("STRATA_DRAFT_TIMING") != nullptr;   // debug: where this pass's time goes
+    if (timing) m.cs->wait();
+    const auto ti0 = Clock::now();
     if (!mtp.idle(err)) return false;   // the drafter's own stream (its graph uploads) before this writes its K/V
+    const double ms_idle = ms_since(ti0);
+    const auto tl0 = Clock::now();
     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
     s.idx_dim = g.idx_key_dim;
@@ -1046,15 +1072,19 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
         real error-handling function.
         */
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use
-        the error codes. The cudaGetLastError function call was replaced with 0.
-        You need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
         */
         err = std::string("prefill: the draft layer's K/V: ") +
               dpct::get_error_string_dummy(0);
         return false;
     }
     mtp.ms_prefill += ms_since(t0);
+    if (timing)
+        std::fprintf(stderr, "strata draft kv: %lld cells from %lld (first needed %lld), batch %lld: drafter idle %.1f ms, "
+                     "the batches %.1f ms, all %.1f ms\n", (long long) n, (long long) cell0, (long long) (cell0 + r0),
+                     (long long) B, ms_idle, ms_since(tl0), ms_since(t0));
     return true;
 }
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
@@ -1331,11 +1361,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             const float* row = embd_rows ? embd_rows[p0 + t] : nullptr;
             if (row) {
                 /*
-                DPCT1124: cudaMemcpyAsync is migrated to asynchronous
-                memcpy API. While the origin API might be synchronous, it
-                depends on the type of operand memory, so you may need to call
-                wait() on event return by memcpy API to ensure synchronization
-                behavior.
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 if (DPCT_CHECK_ERROR(
                         m.cs->memcpy(m.emb + t * N, row, (size_t)N * 4)) != 0) {
@@ -1348,12 +1377,20 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         }
         if (hand_in_ == nullptr) gr_broadcast(m.emb, m.R, T, m.cs);
         lap("embeddings");
-        // ---- the PLE rows of the whole chunk, one batched SSD request (read ahead on a thread, see ple_gather)
-        if (ple_on) {
+        // ---- the PLE rows of the whole chunk, one batched SSD request on a thread (see ple_gather).  A later chunk's
+        // were read ahead during the previous chunk; the first chunk's are read beside layer 0 - they are needed from
+        // layer 1 on, and gathering them here first left the GPU idle for the whole read (~0.4 s of a 32K prompt)
+        if (ple_on && !ple_next.valid())
+            ple_next = std::async(std::launch::async, [&ple_gather, &ple_next_err, c0, b = ple_buf] {
+                return ple_gather(c0, b, ple_next_err);
+            });
+        bool ple_pending = ple_on;
+        // the chunk's rows onto the device just before layer 1 reads them, and the next chunk's gather started
+        auto ple_land = [&]() -> bool {
+            if (!ple_pending) return true;
+            ple_pending = false;
             const auto tp = Clock::now();
-            if (!ple_next.valid()) {
-                if (!ple_gather(c0, ple_buf, err)) return false;
-            } else if (!ple_next.get()) {
+            if (!ple_next.get()) {
                 err = ple_next_err;
                 return false;
             }
@@ -1363,19 +1400,62 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             type of operand memory, so you may need to call wait() on event
             return by memcpy API to ensure synchronization behavior.
             */
-            m.cs->memcpy(m.ple_emb, m.ple_emb_host[ple_buf], (size_t)T * N * 4);
-            dpct::sync_barrier(m.ple_copied[ple_buf], m.cs);
-            if (c0 + T < n) {
-                m.ple_copied[ple_buf ^ 1]
-                    ->wait_and_throw(); // the other buffer's upload (a chunk
-                                        // ago) is done
+            if (DPCT_CHECK_ERROR(m.cs->memcpy(m.ple_emb,
+                                              m.ple_emb_host[ple_buf],
+                                              (size_t)T * N * 4)) != 0 ||
+                /*
+                DPCT1024: The original code returned the error code that was
+                further consumed by the program logic. This original code was
+                replaced with 0. You may need to rewrite the program logic
+                consuming the error code.
+                */
+                DPCT_CHECK_ERROR((m.ple_want[ple_buf] = ++m.ple_seq,
+                                  m.cs->fill<uint64_t>(m.ple_done_seq + ple_buf, m.ple_want[ple_buf], 1))) != 0) {
+                /*
+                DPCT1009: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                err = std::string("prefill: the PLE rows' upload failed: ") +
+                      dpct::get_error_string_dummy(0);
+                return false;
+            }
+            if (c0 + T < n) {   // SYCL port: T, this chunk's length (the first chunk can be shorter: chunk_len)
+                // the other buffer's upload (a chunk ago) is done before the SSD thread refills it
+                if (DPCT_CHECK_ERROR([&] {
+                        while (*(volatile const uint64_t*) (m.ple_done_seq + (ple_buf ^ 1)) < m.ple_want[ple_buf ^ 1])
+                            std::this_thread::yield();
+                    }()) != 0) {
+                    /*
+                    DPCT1009: SYCL reports errors using exceptions and does
+                    not use error codes. Please replace the
+                    "get_error_string_dummy(...)" with a real error-handling
+                    function.
+                    */
+                    /*
+                    DPCT1010: SYCL uses exceptions to report errors and does
+                    not use the error codes. The cudaGetLastError function call
+                    was replaced with 0. You need to rewrite this code.
+                    */
+                    err =
+                        std::string("prefill: the PLE rows' upload failed: ") +
+                        dpct::get_error_string_dummy(0);
+                    return false;
+                }
                 ple_next = std::async(std::launch::async, [&ple_gather, &ple_next_err, c1 = c0 + T, b = ple_buf ^ 1] {
                     return ple_gather(c1, b, ple_next_err);
                 });
             }
             ple_buf ^= 1;
             stats_.ms_ple += ms_since(tp);
-        }
+            return true;
+        };
         for (int64_t t = 0; t < T; ++t) { prev[0] = prev[1]; prev[1] = (int32_t) tokens[c0 + t]; }
         lap("PLE rows");
         // ---- the QSA step records of every position in the chunk
@@ -1562,6 +1642,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
             core::progress_at("reading the prompt (batched): layer", l, p0);   // #251: a stall names layer and chunk
             const core::LayerView v(*m.wt, l);
+            if (l == std::max<int64_t>(LB, 1) && !ple_land()) return false;   // the PLE rows, read from layer 1 on
             // ---- the PLE block at layer 1, token by token (its conv reads the previous tokens' rows)
             if (l == 1 && ple_on && ple_batch) {
                 // the whole chunk at once, in sub-batches carved from the idle scratch region: the key and value
@@ -2333,6 +2414,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     strata::kernels::cvec_apply(m.R, l, T, D, nullptr, 0, nullptr, 0, false, m.cs);
             }
         }
+        if (!ple_land()) return false;   // a stage that ends before layer 1: the rows land anyway, the next gather starts
         if (issuer.joinable()) {
             issuer.join();
             stats_.ms_experts_host += iss_ms;
@@ -2361,8 +2443,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does
-                not use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 err = std::string("prefill: the layer split's hand-off: ") +
@@ -2404,8 +2486,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does
-                not use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does not
+                use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 err =
@@ -2456,9 +2538,9 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         real error-handling function.
         */
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use
-        the error codes. The cudaGetLastError function call was replaced with 0.
-        You need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
         */
         err = std::string("prefill: ") + dpct::get_error_string_dummy(0);
         return false;
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 75a3304f849..9f3389091d0 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -239,7 +239,7 @@ struct Options {
     /// Plan v0.3 P2: how the n-gram table is read. Direct (default) = unbuffered SSD reads, table never in RAM.
     std::string ple_io = "direct";
     int64_t ple_row_cache = 1 << 20;   ///< bounded row cache (rows of 90 B); 0 disables
-    int ple_inflight = 64;
+    int ple_inflight = 256;   // the prompt path reads a chunk's rows at once: 64 left the SSD half idle (32K: 303 -> 189 ms)
     double ple_delay_us = 0;           ///< fault injection: every row read completes no earlier than this
     bool ple_sync_submit = false;      ///< A/B arm: submit reads on the token thread, no I/O worker
     std::string kv = "fp16";           ///< plan v0.3 P7: KV storage, fp16 (default) or int8 (half the VRAM)
@@ -376,6 +376,11 @@ struct Options {
     /// Plan v0.3 P6: every `adapt_every` rounds, swap up to `adapt_swaps` of the most-routed missing experts into
     /// the VRAM tier in place of the least-routed resident ones (decayed counts).  0 = static residency.
     int adapt_every = 4;
+    float adapt_decay = 0.7f;   ///< the usage counts are multiplied by this after each adaptation (--adapt-decay)
+    /// --adapt-tuned (STRATA_ADAPT_TUNED=1): every 2 rounds, up to 192 swaps, x0.92 - where that was measured to help
+    /// (see where it is applied); explicit --adapt-* flags win
+    bool adapt_tuned = false;
+    bool adapt_given = false;
     /// Plan v0.3 P6: a draft enters the verify window only while every draft before it (and itself) has at least
     /// this probability under the draft layer; 0 = always --spec-1 drafts.
     double spec_min_p = 0.0;
@@ -447,7 +452,7 @@ void usage() {
                  "                       reads, the table never enters RAM or the file cache; mmap: A/B arm;\n"
                  "                       ram: mmap with the whole table locked in RAM at start (Linux/macOS)\n"
                  "  --ple-row-cache N    bounded cache of fetched rows, 90 B each (default 1048576; 0 = off)\n"
-                 "  --ple-inflight N     outstanding SSD reads (default 64)\n"
+                 "  --ple-inflight N     outstanding SSD reads (default 256)\n"
                  "  --ple-delay-us U     fault injection: each row read completes no earlier than U us\n"
                  "  --ple-sync-submit    A/B arm: submit table reads on the token thread (default: an I/O thread)\n"
                  "  --kv fp16|int8       KV storage (plan v0.3 P7): int8 codes + fp16 scale per 64 values, half the\n"
@@ -1193,7 +1198,9 @@ int main(int argc, char **argv) try {
         else if (a == "--mtp") o.mtp = next("--mtp");
         else if (a == "--mtp-window") o.mtp_window = std::atoll(next("--mtp-window"));
         else if (a == "--pcie-frac") o.pcie_frac = std::atof(next("--pcie-frac"));
-        else if (a == "--adapt-every") o.adapt_every = std::atoi(next("--adapt-every"));
+        else if (a == "--adapt-every") { o.adapt_every = std::atoi(next("--adapt-every")); o.adapt_given = true; }
+        else if (a == "--adapt-decay") { o.adapt_decay = (float) std::atof(next("--adapt-decay")); o.adapt_given = true; }
+        else if (a == "--adapt-tuned") o.adapt_tuned = true;
         else if (a == "--spec-min-p") o.spec_min_p = std::atof(next("--spec-min-p"));
         else if (a == "--stop-eos") o.stop_eos = true;
         else if (a == "--spec-split") o.spec_split = true;
@@ -1262,7 +1269,7 @@ int main(int argc, char **argv) try {
             if (!parse_i64_list(next("--eos-ids"), o.eos_ids, e)) { std::fprintf(stderr, "--eos-ids: %s\n", e.c_str()); return 2; }
             o.stop_eos = true;
         }
-        else if (a == "--adapt-swaps") o.adapt_swaps = std::atoi(next("--adapt-swaps"));
+        else if (a == "--adapt-swaps") { o.adapt_swaps = std::atoi(next("--adapt-swaps")); o.adapt_given = true; }
         else if (a == "--expert-cache-cpu-order") o.expert_cache_cpu_order = true;
         else if (a == "--expert-cache-per-layer") o.expert_cache_per_layer = true;
         else if (a == "--no-hit-poke") o.no_hit_poke = true;
@@ -2370,10 +2377,10 @@ int main(int argc, char **argv) try {
                     st.mrope = sycl::malloc_device<int32_t>(
                         mrope_host.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st.mrope, mrope_host.data(),
@@ -2742,9 +2749,9 @@ int main(int argc, char **argv) try {
             DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) == 0 &&
             DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(p)) == 0;
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         if (!named) 0;
         const char *name =
@@ -2764,8 +2771,8 @@ int main(int argc, char **argv) try {
             stderr, "strata generate: GPU %d: %s, compute capability %d.%d%s\n",
             dev, name,
             /*
-            DPCT1005: The SYCL device version is different from CUDA Compute
-            Compatibility. You may need to rewrite this code.
+            DPCT1005: The SYCL device version is different from CUDA
+            Compute Compatibility. You may need to rewrite this code.
             */
             strata::cc_major_of(p.get_major_version()),
             strata::cc_minor_of(p.get_minor_version()),
@@ -3430,8 +3437,8 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: routing-aware prefetch of the file tier on (the next layer's router)\n");
         } else {
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             (void)0;
@@ -3662,10 +3669,11 @@ int main(int argc, char **argv) try {
         } else {
             for (int64_t c = 0; c < g.hc; ++c)
                 /*
-                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
-                API. While the origin API might be synchronous, it depends on
-                the type of operand memory, so you may need to call wait() on
-                event return by memcpy API to ensure synchronization behavior.
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous
+                memcpy API. While the origin API might be synchronous, it
+                depends on the type of operand memory, so you may need to call
+                wait() on event return by memcpy API to ensure synchronization
+                behavior.
                 */
                 if (DPCT_CHECK_ERROR(strata::q_of(token_stream)->memcpy(
                         ss.R + (size_t)c * g.n_embd, d_emb,
@@ -3703,6 +3711,10 @@ int main(int argc, char **argv) try {
     }
 
     std::FILE* dump = nullptr;
+    // The logits header is written WITH THE FIRST ROW, not at open: a native pack never reaches the
+    // per-token dump site, and a header promising rows that were never written is worse than no file.
+    int32_t hdr[2] = {0, 0};
+    bool hdr_written = false;
     const int64_t dump_positions = (int64_t) o.tokens.size() - 1 + o.max_new;
     if (!o.dump_logits.empty()) {
         if (dump_positions > INT32_MAX || n_vocab > INT32_MAX) {
@@ -3722,12 +3734,7 @@ int main(int argc, char **argv) try {
         // of the size gets a wrong answer that looks authoritative.  `tools/logits_identical.py` caught it by
         // parsing the header and refusing the file.
         const int32_t n_rows = (int32_t) strata::program::logits_selection::row_count(dump_positions, o.logits_stride);
-        const int32_t hdr[2] = {(int32_t) n_vocab, n_rows};
-        if (std::fwrite(hdr, sizeof hdr, 1, dump) != 1) {
-            std::fprintf(stderr, "strata generate: cannot write logits header\n");
-            std::fclose(dump);
-            return 1;
-        }
+        hdr[0] = n_vocab; hdr[1] = n_rows;
     }
 
     // ---- THE C1 ORACLE: ONE RESIDUAL SNAPSHOT PER LAYER PER POSITION, so the engine can be bisected against
@@ -3957,8 +3964,8 @@ int main(int argc, char **argv) try {
             real error-handling function.
             */
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             std::fprintf(stderr,
@@ -4005,9 +4012,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -4027,9 +4034,9 @@ int main(int argc, char **argv) try {
                     function.
                     */
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     dpct::get_error_string_dummy(0));
                 return 1;
@@ -4117,10 +4124,10 @@ int main(int argc, char **argv) try {
                     st->d_res = sycl::malloc_device<int32_t>(
                         host_res.size(), dpct::get_in_order_queue())) != 0 ||
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 DPCT_CHECK_ERROR(dpct::get_in_order_queue().memcpy(
                     st->d_res, host_res.data(),
@@ -4315,6 +4322,28 @@ int main(int argc, char **argv) try {
             return 1;
         }
     }
+    // --adapt-tuned: a longer memory and more frequent, larger steps for the adaptive tier, where they were measured
+    // to help - a cache that holds 20-60% of the experts, with every expert outside VRAM in RAM.  With fewer, a swap
+    // evicts experts that are needed again; with more, nearly everything hits already; with experts on the drive, a
+    // swap can read it.  It pays where the CPU's share of the misses is the round's critical path (large experts).
+    if (const char* v = std::getenv("STRATA_ADAPT_TUNED"); v != nullptr) o.adapt_tuned = v[0] != '0';
+    if (o.adapt_tuned && !o.adapt_given && o.expert_cache > 0 && !host_res.empty()) {
+        const double cover = (double) xcache.slots() / (double) (g.n_layers * g.n_expert);
+        bool in_ram = !(o.mmap_experts && !o.resident_cpu_experts);
+        if (o.resident_cpu_experts)   // the RAM budget must hold every expert the GPU cache does not
+            for (int64_t i = 0; i < g.n_layers * g.n_expert && in_ram; ++i)
+                if (host_res[(size_t) i] < 0 && !src.has_resident(i / g.n_expert, i % g.n_expert)) in_ram = false;
+        const bool fits = cover >= 0.2 && cover <= 0.6 && in_ram;
+        if (fits) {
+            o.adapt_every = 2;
+            o.adapt_swaps = 192;
+            o.adapt_decay = 0.92f;
+        }
+        std::fprintf(stderr, "strata generate: --adapt-tuned: the cache holds %.0f%% of the experts%s -> adaptive tier "
+                             "every %d rounds, %d swaps, x%.2f%s\n", 100.0 * cover,
+                     in_ram ? "" : ", some only on the drive", o.adapt_every, o.adapt_swaps, o.adapt_decay,
+                     fits ? "" : " (the defaults)");
+    }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||
             (graph_hits && (thits.d_res == nullptr || host_res.empty()))) {
@@ -4646,16 +4675,16 @@ int main(int argc, char **argv) try {
                     const strata::core::OnDevice on(stp->dev);
                     stp->sp.reset();
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     (void)0;
                 }
                 sp.reset();
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
@@ -5081,10 +5110,10 @@ int main(int argc, char **argv) try {
             try {
         if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
@@ -5193,7 +5222,7 @@ int main(int argc, char **argv) try {
                     const strata::core::OnDevice on(st->dev);
                     dpct::sync_barrier(st->adapt_ev, st->adapt_stream);
                 }
-            for (float& v : drive.d.usage) v *= 0.7f;
+            for (float& v : drive.d.usage) v *= o.adapt_decay;
             return true;
         };
         // stdin is read on its own thread, so a STOP line reaches a request that is still running (the client went
@@ -6068,7 +6097,13 @@ int main(int argc, char **argv) try {
                 drive.d.layers = 0;
                 drive.d.experts = 0;
                 drive.d.failed = false;
-                apply_pending(false);
+            // THE WAIT IS THE FIX.  A non-blocking query here left the next window's residency table to
+            // depend on whether the previous round's expert copies had landed: an expert that is resident
+            // runs the GPU kernel and one that is not is computed on the CPU, and the two round
+            // differently enough to move a logit by ~0.26.  Waiting costs the copies' remaining time on a
+            // window that follows one that issued them, and buys a residency table that is a function of
+            // what was actually copied - which is what makes greedy decode reproducible.
+            apply_pending(true);
                 if (hist_n > 0) {
                     // the tails the penalties count over, ONE PER ROW: the tokens the state has consumed, the
                     // fed-back head `x` (it joins `consumed` only after this window commits), then the drafts
@@ -6634,8 +6669,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (long long)pos, dpct::get_error_string_dummy(0));
@@ -6669,6 +6704,17 @@ int main(int argc, char **argv) try {
                          (long long) n_vocab, (long long) pos);
             return 1;
         }
+        // THE HEADER IS WRITTEN WITH THE FIRST ROW, NOT AT OPEN.  A native pack leaves the per-token
+        // loop at `if (native_pack) { spec_pos = pos; break; }` and never reaches this site, so a header
+        // written at open promised 64 or 66 rows for a file that would contain none - and a reader that
+        // trusted it reported "0 differing positions" from a file with no positions in it.  Written here,
+        // a run that dumps nothing leaves an empty file, which is what actually happened.
+        if (emit_logits && !hdr_written && std::fwrite(hdr, sizeof hdr, 1, dump) != 1) {
+            std::fprintf(stderr, "strata generate: cannot write logits header\n");
+            std::fclose(dump);
+            return 1;
+        }
+        if (emit_logits) hdr_written = true;
         if (emit_logits && std::fwrite(logits.data(), sizeof(float), (size_t) n_vocab, dump) != (size_t) n_vocab) {
             std::fprintf(stderr, "strata generate: cannot write logits at position %lld\n", (long long) pos);
             std::fclose(dump);
@@ -6710,8 +6756,8 @@ int main(int argc, char **argv) try {
                 function.
                 */
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 dpct::get_error_string_dummy(0));
@@ -6844,22 +6890,36 @@ int main(int argc, char **argv) try {
         std::vector<std::pair<int32_t, int32_t>> pending;
         dpct::event_ptr adapt_ev = nullptr;
         adapt_ev = new sycl::event();
+        int64_t adapt_rounds = 0;   // counted here: `rounds` is declared below the adapt lambda
         auto apply_pending = [&](bool wait) {
             try {
         if (pending.empty()) return;
+            if (wait) adapt_ev->wait_and_throw();
+            // STRATA_TRACE_ADAPT: a non-blocking query means the next window reads the residency table
+            // with whatever the copy has achieved.  Whether the incoming experts are RESIDENT for that
+            // window depends on copy latency, and a resident expert runs a different kernel than a
+            // CPU-computed one - a far bigger numerical difference than a rounding wobble.
+            static const bool trace_pending = std::getenv("STRATA_TRACE_ADAPT") != nullptr;
             if (wait) adapt_ev->wait_and_throw();
             else if (adapt_ev->get_info<
                          sycl::info::event::command_execution_status>() !=
-                     sycl::info::event_command_status::complete) return;
+                     sycl::info::event_command_status::complete) {
+                if (trace_pending)
+                    std::fprintf(stderr, "strata: PENDING not landed, %zu stay non-resident this window\n",
+                                 pending.size());
+                return;
+            }
+            if (trace_pending)
+                std::fprintf(stderr, "strata: PENDING landed, %zu experts become resident\n", pending.size());
             src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
             for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
             pending.clear();
             if (d_res != nullptr)
                 /*
-                DPCT1114: cudaMemcpy is migrated to asynchronization memcpy,
-                assuming in the original code the source host memory is pageable
-                memory. If the memory is not pageable, call wait() on event
-                return by memcpy API to ensure synchronization behavior.
+                DPCT1114: cudaMemcpy is migrated to asynchronization
+                memcpy, assuming in the original code the source host memory is
+                pageable memory. If the memory is not pageable, call wait() on
+                event return by memcpy API to ensure synchronization behavior.
                 */
                 dpct::get_in_order_queue().memcpy(
                     d_res, host_res.data(), host_res.size() * sizeof(int32_t)).wait();
@@ -6875,7 +6935,18 @@ int main(int argc, char **argv) try {
         // routed clearly more often.  Copies run between rounds, when the GPU is idle.
         auto adapt = [&]() -> bool {
             const Clock::time_point ta = Clock::now();
-            if (!pending.empty()) return true;   // the previous swaps are still in flight
+            ++adapt_rounds;
+            // STRATA_TRACE_ADAPT: why an adapt round did or did not swap.  Default off, one getenv, and it
+            // reports the only thing that can make an adapt round a coin flip: whether the PREVIOUS round's
+            // asynchronous expert copies had landed by the time this round started.
+            static const bool trace_adapt = std::getenv("STRATA_TRACE_ADAPT") != nullptr;
+            if (!pending.empty()) {
+                if (trace_adapt)
+                    std::fprintf(stderr, "strata: ADAPT round=%lld SKIPPED, %zu swaps still in flight\n",
+                                 (long long) adapt_rounds, pending.size());
+                return true;   // the previous swaps are still in flight
+            }
+            if (trace_adapt) std::fprintf(stderr, "strata: ADAPT round=%lld considering\n", (long long) adapt_rounds);
             struct Swap { float gain; int32_t layer, in, out; };
             std::vector<Swap> swaps;
             std::vector<std::pair<float, int32_t>> cand, vict;
@@ -6928,7 +6999,10 @@ int main(int argc, char **argv) try {
                 pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
             }
             if (!swaps.empty()) dpct::sync_barrier(adapt_ev, adapt_stream);
-            for (float& v : drive.d.usage) v *= 0.7f;
+            if (trace_adapt)
+                std::fprintf(stderr, "strata: ADAPT round=%lld swapped %zu of %d slots, usage decayed\n",
+                             (long long) adapt_rounds, swaps.size(), o.adapt_swaps);
+            for (float& v : drive.d.usage) v *= o.adapt_decay;
             swaps_total += (int64_t) swaps.size();
             ms_adapt += std::chrono::duration<double, std::milli>(Clock::now() - ta).count();
             return true;
@@ -7010,7 +7084,13 @@ int main(int argc, char **argv) try {
             drive.d.layers = 0;
             drive.d.experts = 0;
             drive.d.failed = false;
-            apply_pending(false);
+            // THE WAIT IS THE FIX.  A non-blocking query here left the next window's residency table to
+            // depend on whether the previous round's expert copies had landed: an expert that is resident
+            // runs the GPU kernel and one that is not is computed on the CPU, and the two round
+            // differently enough to move a logit by ~0.26.  Waiting costs the copies' remaining time on a
+            // window that follows one that issued them, and buys a residency table that is a function of
+            // what was actually copied - which is what makes greedy decode reproducible.
+            apply_pending(true);
             if (!ver.run(T, window.data(), p, &drive_pool_multi, &drive, outv.data(), err)) {
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());
                 return 1;
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index 02caddfdca4..ea9dce3194a 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -103,6 +103,14 @@ def doorbell(s):
 edit("src/kernels/cuda/fused_gr.dp.cpp", lambda s: s.replace(
     "        cudaDeviceGetAttribute(&per_block, cudaDevAttrMaxSharedMemoryPerBlock, dev);\n",
     "        per_block = (int) dpct::get_device(dev).get_local_mem_size();   // SYCL: the work-group local memory\n"))
+# upstream PR #413 / 0.1.36+: the key-head DeltaNet kernel's cp.async helpers keep CUDA's address conversion in the
+# non-NVPTX branch; the SYCL build takes the plain-copy form (upstream's own pre-sm_80 path)
+def gdn_plain_copies(s):
+    s = s.replace("#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP < 800\n#define STRATA_GDN_CP_ASYNC 0",
+                  "#if 1   // SYCL port: plain copies (no cp.async)\n#define STRATA_GDN_CP_ASYNC 0")
+    return s.replace("*reinterpret_cast<float4*>(smem) = *reinterpret_cast<const float4*>(gmem);",
+                     "*reinterpret_cast<sycl::float4*>(smem) = *reinterpret_cast<const sycl::float4*>(gmem);")
+edit("src/prefill/kernels.dp.cpp", gdn_plain_copies)
 edit("src/kernels/cuda/elementwise.dp.cpp", doorbell)
 edit("src/kernels/cuda/verify_kernels.dp.cpp", doorbell)
 

From 4ba35fdbb0941f08184274bef2f3cd05dde37cfe Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Fri, 2 Oct 2026 14:35:20 -0500
Subject: [PATCH 060/201] sycl: OpenAI logprobs on /v1/chat/completions (engine
 LP lines + server_intel)

- engine (serve mode): GEN key logprobs=K (0..20) writes "LP logprob id:lp ..."
  after each "T id", from the verify window's head logits (Verifier::copy_logits;
  before temperature, penalties and sampling); absent key, no LP lines
- server_intel.py: pairs LP lines with their tokens (StrataEngine._pump), passes
  logprobs/top_logprobs to the engine, and fills OpenAI's choices[].logprobs
  (content / reasoning_content) in streamed chunks and the collected reply; the
  stop token is not listed. serve/ itself is unchanged.

Tested: a fake engine on hardac (streamed, not streamed, without logprobs,
stop token excluded); on the B70 with the IQ2_XS: same answer with and without,
"Paris" -0.0019 with top-1 equal to the chosen token, no measurable time cost.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 |   9 +++
 sycl/serve/server_intel.py    | 112 +++++++++++++++++++++++++++++++++-
 sycl/src/program/generate.cpp |  29 +++++++++
 3 files changed, 149 insertions(+), 1 deletion(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index f29eb4a68aa..72bb6d1b0ce 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -344,6 +344,15 @@ with `--stream-experts` there is no host copy of the experts, so any expert left
 and computed on the CPU whenever it is routed. At 1,536 MiB the cache came up 128 experts short and decode fell to
 5-10 tok/s; 1,024 MiB fits all 12,288 with 2 GB of VRAM still free.
 
+**Logprobs (2026-10-02).** `/v1/chat/completions` takes OpenAI's `"logprobs": true` and `"top_logprobs": 0..20`,
+streamed or not, through `sycl/serve/server_intel.py`; the reply carries `choices[0].logprobs.content[]` (`token`,
+`logprob`, `bytes`, `top_logprobs`), and with thinking on the thinking tokens under `reasoning_content`. The engine
+(the port only) gets `logprobs=K` on its GEN line and writes an `LP logprob id:logprob ...` line after each `T`
+line, from the verify window's head logits - the distribution the token was taken from, before temperature,
+penalties and sampling. Upstream's server ignores the lines, and an engine never asked writes none. Each token
+costs one 1 MB logits row copy when asked. Measured (IQ2_XS, "capital of France"): "Paris" at -0.0019 (p 0.998), the
+same answer and no measurable time without it. Not on `/v1/completions` or the Anthropic endpoint yet.
+
 **The Monitor tab on Intel.** `sycl/serve/server_intel.py` is `serve/server.py` with two additions made at run
 time:
 
diff --git a/sycl/serve/server_intel.py b/sycl/serve/server_intel.py
index 819a5c2c46f..7a4c7cc5d6e 100644
--- a/sycl/serve/server_intel.py
+++ b/sycl/serve/server_intel.py
@@ -8,10 +8,15 @@
   - the Monitor tab's GPU readings on an Intel Arc (sycl/serve/xe_telemetry.py) when no NVIDIA card answers;
   - a model menu in the web app's header, for a host that swaps models on one GPU: the config names the RPC that
     does the swap as "model_switcher" (it takes {"mode": m} and answers {"mode", "up", "starting", "choices",
-    "urls"}); the menu offers the models served on this server's port.  Without that key nothing changes.
+    "urls"}); the menu offers the models served on this server's port.  Without that key nothing changes;
+  - OpenAI `logprobs` / `top_logprobs` on /v1/chat/completions (streamed or not): the engine (the SYCL port,
+    `logprobs=K` on its GEN line) writes an `LP` line after each `T` line, which upstream's server would ignore.
+    The values are the model's log-probabilities from the verify window's logits, before sampling, temperature and
+    penalties; with thinking on, the thinking tokens are listed too (in order, under `reasoning_content`).
 """
 from __future__ import annotations
 
+import collections
 import json
 import sys
 import urllib.parse
@@ -126,7 +131,112 @@ def do_POST(self):
     S.make_handler = make
 
 
+def install_logprobs():
+    """`LP` lines next to their tokens, the request's `logprobs` to the engine, OpenAI's `logprobs` in the reply."""
+    Eng = S.StrataEngine
+
+    def _pump(self):   # serve/server.py's StrataEngine._pump, plus: an LP line goes beside its token, not in the queue
+        proc, lines = self.proc, self.lines
+        lp = self.__dict__.setdefault("lp_lines", collections.deque())
+        last_t = None
+        for line in proc.stdout:
+            if line.startswith("LP "):
+                lp.append((last_t, line))
+                continue
+            if line.startswith("T "):
+                try:
+                    last_t = int(line[2:])
+                except ValueError:
+                    last_t = None
+            lines.put(line)
+        if self.proc is proc:
+            self.ended = True
+        lines.put(None)
+    Eng._pump = _pump
+
+    keys = Eng.sampling_keys
+
+    def sampling_keys(sampling):
+        k = top_logprobs(sampling or {})
+        return keys(sampling) + (f" logprobs={k}" if k is not None else "")
+    Eng.sampling_keys = staticmethod(sampling_keys)
+
+    generate = Eng.generate
+
+    def gen(self, *a, **kw):
+        self.__dict__.setdefault("lp_lines", collections.deque()).clear()   # this request's lines only
+        return generate(self, *a, **kw)
+    Eng.generate = gen
+
+    def entry(tok, t, line):
+        f = line.split()
+        if len(f) < 2 or f[1] == "nan":
+            return None
+
+        def item(i, lp):
+            b = tok.token_bytes(i) if hasattr(tok, "token_bytes") else tok.decode([i]).encode()
+            return {"token": b.decode("utf-8", "replace"), "logprob": lp, "bytes": list(b)}
+        e = item(t, float(f[1])) if t is not None else {"token": "", "logprob": float(f[1]), "bytes": []}
+        e["top_logprobs"] = [item(int(i), float(v)) for i, _, v in (x.partition(":") for x in f[2:])]
+        return e
+
+    chunks = S.openai_chunks
+
+    def openai_chunks(svc, req, *a, **kw):
+        if top_logprobs(req) is None:
+            yield from chunks(svc, req, *a, **kw)
+            return
+        eng = svc.engine
+        for c in chunks(svc, req, *a, **kw):
+            lp = getattr(eng, "lp_lines", None)
+            if c and c.get("choices") and lp:
+                got = []
+                while lp:
+                    t, line = lp.popleft()
+                    if t in svc.stop_ids:   # the stop token ends the reply; OpenAI does not list it
+                        continue
+                    e = entry(svc.tok, t, line)
+                    if e is not None:
+                        got.append(e)
+                if got:
+                    d = c["choices"][0].get("delta") or {}
+                    key = "reasoning_content" if d.get("reasoning_content") and not d.get("content") else "content"
+                    c["choices"][0]["logprobs"] = {key: got}
+            yield c
+    S.openai_chunks = openai_chunks
+
+    collect = S.openai_collect
+
+    def openai_collect(cs):
+        merged = {"content": [], "reasoning_content": []}
+
+        def tap():
+            for c in cs:
+                if c and c.get("choices") and c["choices"][0].get("logprobs"):
+                    for k, v in c["choices"][0]["logprobs"].items():
+                        merged[k].extend(v)
+                yield c
+        out = collect(tap())
+        if merged["content"] or merged["reasoning_content"]:
+            out["choices"][0]["logprobs"] = {k: v for k, v in merged.items() if v} | {"content": merged["content"]}
+        return out
+    S.openai_collect = openai_collect
+
+
+def top_logprobs(req: dict):
+    """The K for the engine's logprobs=K, or None when the request did not ask (OpenAI: logprobs=true, top_logprobs
+    0..20; the legacy completions form, logprobs=N, is taken as N)."""
+    lp = req.get("logprobs")
+    if lp is True:
+        k = req.get("top_logprobs")
+        return max(0, min(20, int(k))) if isinstance(k, int) and not isinstance(k, bool) else 0
+    if isinstance(lp, int) and not isinstance(lp, bool) and lp >= 0:
+        return min(20, lp)
+    return None
+
+
 if __name__ == "__main__":
     install_xe_reader()
     install_switcher(sys.argv[1:])
+    install_logprobs()
     sys.exit(S.main())
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 9f3389091d0..b683d3693e9 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -5421,6 +5421,10 @@ int main(int argc, char **argv) try {
             float req_min_p = 0.0f, req_penalty_repeat = 1.0f, req_penalty_freq = 0.0f, req_penalty_present = 0.0f;
             int req_penalty_last_n = 0;
             int req_cvec = 1;   // cvec=0|1: a loaded control vector for this request (on when absent)
+            // SYCL port: logprobs=K (0..20) - after each "T id" an "LP logprob id:logprob ..." line with the token's
+            // log-probability and the K most likely tokens', from the verify window's head logits (before sampling,
+            // penalties and temperature). -1 (absent): no LP lines; a server that does not ask never sees one.
+            int req_logprobs = -1;
             // tuning keys (setup's calibration measures settings without restarting the engine): the PCIe share of
             // the missed experts and the draft-probability floor, for this request only
             double req_pcie_frac = o.pcie_frac, req_spec_min_p = o.spec_min_p;
@@ -5446,6 +5450,7 @@ int main(int argc, char **argv) try {
                     else if (key == "penalty_freq") req_penalty_freq = fv;
                     else if (key == "penalty_present") req_penalty_present = fv;
                     else if (key == "seed") req_seed = std::strtoull(tok.c_str() + eq + 1, nullptr, 10);
+                    else if (key == "logprobs") req_logprobs = std::clamp(std::atoi(tok.c_str() + eq + 1), -1, 20);
                     else if (key == "pcie_frac") req_pcie_frac = std::clamp((double) fv, 0.0, 1.0);
                     else if (key == "spec_min_p") req_spec_min_p = std::clamp((double) fv, 0.0, 1.0);
                     // unknown keys are skipped: the ids start at the first token without '='
@@ -6144,6 +6149,30 @@ int main(int argc, char **argv) try {
                 bool eos = false;
                 for (int i = 0; i <= a && produced_n < max_new && !eos; ++i) {
                     std::printf("T %d\n", (int) outv[(size_t) i]);
+                    if (req_logprobs >= 0) {   // row i of this window's head logits is the distribution token i came from
+                        static std::vector<float> lrow;
+                        static std::vector<int32_t> lord;
+                        lrow.resize((size_t) ver.vocab());
+                        if (!ver.copy_logits(i, lrow.data())) {
+                            std::printf("LP nan\n");
+                        } else {
+                            float mx = -INFINITY;
+                            for (const float v : lrow) mx = std::max(mx, v);
+                            double se = 0.0;
+                            for (const float v : lrow) se += std::exp((double) v - mx);
+                            const double lse = (double) mx + std::log(se);
+                            std::printf("LP %.6f", (double) lrow[(size_t) outv[(size_t) i]] - lse);
+                            if (req_logprobs > 0) {
+                                lord.resize(lrow.size());
+                                for (size_t v = 0; v < lrow.size(); ++v) lord[v] = (int32_t) v;
+                                std::partial_sort(lord.begin(), lord.begin() + req_logprobs, lord.end(),
+                                                  [&](int32_t x1, int32_t x2) { return lrow[(size_t) x1] > lrow[(size_t) x2]; });
+                                for (int j = 0; j < req_logprobs; ++j)
+                                    std::printf(" %d:%.6f", lord[(size_t) j], (double) lrow[(size_t) lord[(size_t) j]] - lse);
+                            }
+                            std::printf("\n");
+                        }
+                    }
                     strata::core::progress_beat();
                     ++produced_n;
                     if (o.suffix_draft > 0) sfx.append(outv[(size_t) i]);

From ba707d88ff742d0be9c2b2fe51e8f10d6edc071b Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 00:50:11 +0200
Subject: [PATCH 061/201] Several conversations at once: batch slots, pipelined
 layer split, per-stage dense weights

The engine's --serve can now keep up to N conversations open (--batch N) and decode them together, one token
each per verify window; with a layer split, --batch-groups G pipelines the slot groups through the GPUs, and
--trim-stage-weights makes every GPU load only its own layers' dense weights (VRAM back to the expert cache).
The server runs concurrent requests in the slots. See docs/BATCHING.md.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 docs/BATCHING.md                     |  94 +++++
 docs/MULTI_GPU.md                    |   5 +
 include/strata/core/native_dense.hpp |   4 +-
 include/strata/core/verify.hpp       |  65 ++++
 serve/server.py                      | 190 +++++++++-
 src/core/native_dense.cpp            |  10 +-
 src/core/verify.cpp                  | 540 ++++++++++++++++++++++++---
 src/program/generate.cpp             | 418 ++++++++++++++++++++-
 tools/batch_test.py                  | 153 ++++++++
 9 files changed, 1417 insertions(+), 62 deletions(-)
 create mode 100644 docs/BATCHING.md
 create mode 100644 tools/batch_test.py

diff --git a/docs/BATCHING.md b/docs/BATCHING.md
new file mode 100644
index 00000000000..2e9e659beca
--- /dev/null
+++ b/docs/BATCHING.md
@@ -0,0 +1,94 @@
+# Several conversations at once (batch slots)
+
+By default Strata serves **one request at a time**: the others wait in the server's queue. With `--batch N`
+the engine keeps up to N conversations open and decodes them **together**: every verify window then carries one
+token of each conversation, so the dense weights, the shared expert and the head are read once per window for
+all of them. Combined with a layer split across several GPUs and `--batch-groups`, the cards also work on
+different conversations at the same time instead of waiting for each other.
+
+It is opt-in and changes nothing when the options are absent.
+
+## Turning it on
+
+Add the options to the `args` list of the model's config (`strata-<model>.json`) and restart:
+
+```
+"args": [ ..., "--batch", "8", "--batch-groups", "4", "--trim-stage-weights" ],
+"layer_split": "12,24,36"
+```
+
+| Option | What it does |
+| --- | --- |
+| `--batch N` (2..8) | up to N conversations decoded together. Each slot gets its own state (a session carved like the stage's own: GDN recurrence, QSA K/V and indexer, PLE history) on every GPU of the split. |
+| `--batch-groups G` | with a layer split: the N slots in G groups that flow through the GPUs as a pipeline (GPU k runs one group while GPU k+1 runs another). G must divide N. 1 = all slots in one window, GPU after GPU. |
+| `--trim-stage-weights` | with an **explicit** `--layer-split` (e.g. `12,24,36`, not `auto`): every GPU loads only the dense weights of its own layers instead of the whole model's. The VRAM this frees goes to the expert cache - which is what makes batching pay, since several conversations together touch more distinct experts than one. Useful without `--batch` too. |
+
+The server needs nothing else: it reads `--batch` / `--batch-groups` from the engine's arguments.
+
+## How the server uses the slots
+
+- **One request alone** runs on the usual solo path (verify windows with MTP drafts): the fastest single stream.
+- **When a second request arrives**, the first is stopped (`STOP`) and continues in a batch slot with its prompt
+  plus what it generated so far - the engine's prompt cache holds exactly that, so nothing is read again - and the
+  new request is admitted next to it.
+- **Each admission** reads the request's prompt through the usual prompt path (prompt cache and conversation
+  checkpoints included) and produces its first token there; the state is then copied into the slot. Admissions
+  are taken one at a time; the slots already decoding pause meanwhile.
+- Slots are assigned so that consecutive requests land in different pipeline groups.
+- A client that disconnects stops its slot (`BSTOP`); the others go on.
+
+## Exactness
+
+A batch row's arithmetic is the single-token window's, so with greedy decoding **every conversation of a batch
+produces exactly the tokens it produces alone** - verified token by token for 8 concurrent conversations of 150
+tokens, with and without the pipeline (`tools/batch_test.py`). Two settings make that comparison exact:
+
+- `STRATA_IQ_MT_MIN=1` (the multi-token CPU expert kernels for every group, as for the solo path's own
+  exactness tests), and
+- `--pcie-frac 0`: the PCIe share of the missed experts is chosen per window from the window's misses, so the
+  same expert can run on the GPU in one window and on the CPU in another, which rounds differently. With a share,
+  outputs stay coherent but can drift apart after some tokens, as they would between two solo runs whose windows
+  differ.
+
+Sampled requests (temperature, top_p, top_k, min_p, seed) are drawn row by row with the solo window's
+counter-based draw (Philox(seed, position)).
+
+## Limits (for now)
+
+- Batch windows carry no MTP drafts: a conversation in a slot decodes one token per window (the solo path keeps
+  its drafts, which is why a request alone is not put in a slot).
+- Repetition / frequency / presence penalties are not applied in batch windows.
+- `--batch-groups` needs every stage on its own GPU.
+- The slot sessions take VRAM (each one like the stage's own session; a few hundred MB per slot at 64K context
+  with KV streaming) and pinned RAM for their streamed K/V.
+
+## Measured
+
+A 4-GPU layer split (4 x 16 GB, PCIe Gen3), IQ3_S, `--batch 8 --batch-groups 4 --trim-stage-weights`, through
+the HTTP server, 400 tokens per answer, temperature 0.7:
+
+| Concurrent requests | Per request | Total |
+| ---: | ---: | ---: |
+| 1 | 123 tok/s (solo path) | 120 tok/s |
+| 2 | 57 tok/s | 113 tok/s |
+| 4 | 51 tok/s | 205 tok/s |
+| 8 | 45 tok/s | 360 tok/s |
+
+`--trim-stage-weights` alone raised the share of experts held in VRAM on that machine from 76-85 % to 84-100 %
+per card.
+
+## Engine protocol (`--serve`)
+
+On top of `GEN` / `GENI`:
+
+| Line | Direction | Meaning |
+| --- | --- | --- |
+| `BGEN <slot> <max_new> [keys] <ids>` | in | read the prompt (as `GEN 1`), then continue in `<slot>` |
+| `BGENI <slot> <max_new> [keys] <file> <ids>` | in | the same with images |
+| `BADM <slot> <1/0>` | out | after the admission's `DONE`: 1 = it continues in the slot, 0 = it ended |
+| `BT <slot> <id>` | out | a token of that slot |
+| `BDONE <slot> <generated> <stop/length/cancel> <ms>` | out | the slot is free again |
+| `BSTOP <slot>` | in | end that slot at its next window |
+
+`tools/batch_test.py` drives the engine directly: the same prompts alone, then together, compared token by token,
+and the aggregate rate.
diff --git a/docs/MULTI_GPU.md b/docs/MULTI_GPU.md
index 6e0b0d9687b..3615ca5b116 100644
--- a/docs/MULTI_GPU.md
+++ b/docs/MULTI_GPU.md
@@ -140,3 +140,8 @@ The Coder on an RTX 5080 + RTX 3090 (Ryzen 9 9950X3D), 32K context; details in
 - Leave out a much slower card when two already hold the model. An RTX 2080 Ti as a third card made the 5080 +
   3090 pair slower (68 / 90 tok/s decode): every extra card costs its own round per window.
 - More cards pay off when the model's routed experts do not fit the faster ones.
+
+## Several conversations at once
+
+With a layer split, `--batch N --batch-groups G --trim-stage-weights` decodes several conversations together and
+pipelines them through the cards: see [BATCHING.md](BATCHING.md).
diff --git a/include/strata/core/native_dense.hpp b/include/strata/core/native_dense.hpp
index 8330fac55b0..77962f8fee5 100644
--- a/include/strata/core/native_dense.hpp
+++ b/include/strata/core/native_dense.hpp
@@ -19,8 +19,10 @@ class NativeDense {
     ~NativeDense();
     NativeDense(const NativeDense&) = delete;
     NativeDense& operator=(const NativeDense&) = delete;
+    /// With layer_hi >= 0, only the `blk.<l>.` matrices with layer_lo <= l < layer_hi are uploaded (a layer
+    /// split's stage holds its own layers' projections, not the whole model's); the others keep data == nullptr.
     bool load(const std::vector<std::string>& shards, WeightTable& table, std::string& err,
-              bool include_ple_key = false);
+              bool include_ple_key = false, int64_t layer_lo = 0, int64_t layer_hi = -1);
     /// Plan v0.3 P1: the canonical tensor names `load` would serve natively from these shards (eligible name,
     /// supported type, 2-D), read from the GGUF headers only - so the canonical arena can skip them.
     static bool served_names(const std::vector<std::string>& shards, bool include_ple_key,
diff --git a/include/strata/core/verify.hpp b/include/strata/core/verify.hpp
index b80d10bd264..0ee528832b5 100644
--- a/include/strata/core/verify.hpp
+++ b/include/strata/core/verify.hpp
@@ -31,6 +31,8 @@
 #include <cuda_runtime.h>
 
 #include <atomic>
+#include <chrono>
+#include <map>
 #include <cstdint>
 #include <string>
 #include <vector>
@@ -119,6 +121,46 @@ class Verifier {
 
     /// Keep the first `n_keep` (1..T) tokens of the last window; advances `ss.ple_prev` by them.
     bool commit(int n_keep, std::string& err);
+
+    // ================================ SEVERAL SEQUENCES IN ONE WINDOW ================================
+    //
+    // A batch window holds S INDEPENDENT sequences, one token each: row s is slot s, at slot s's own position,
+    // reading and writing slot s's own state (GDN recurrence and conv history, QSA K/V and indexer, PLE history),
+    // which lives in `slots[s]` - a session carved like this verifier's own (same layer range, same max_cells).
+    // Everything that is per row already (hyper-connections, dense projections, router, shared expert, the
+    // routed experts on the GPU and the CPU, the head) runs once over the S rows, so the weights are read once
+    // per window for all the sequences.  Row s's arithmetic is the single-token window's, so a slot's greedy
+    // tokens are its solo greedy tokens (modulo the multi-token CPU kernel choice: STRATA_IQ_MT_MIN=1).
+    //
+    // Greedy only, no drafts (MTP) in a batch window.  `init_slots` once after `init` (S <= max_t); a layer
+    // split's stages each get their own sessions, and run_slots/commit_slots continue into the next stage.
+    bool init_slots(const std::vector<SessionState*>& slots, std::string& err);
+    int n_slots() const { return (int) slots_.size(); }
+    /// One batch window over slots [0, S): tokens[s] at positions pos[s]; out[s] = the greedy pick after it.
+    bool run_slots(int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool, void* user, int32_t* out,
+                   std::string& err);
+    /// Keep every row of the last batch window: each slot's state advances by its one token.
+    bool commit_slots(std::string& err);
+
+    // ---- The stages of a layer split as a PIPELINE.  A batch window over the slot GROUP
+    // [base, base + S) is launched on ONE stage with its commit right behind it on the stage's stream (a batch window
+    // keeps every row, so the commit needs no host decision), and the host serves the rings of every stage that has
+    // a window in flight from one thread (batch_poll does not block).  Stage k can then run group g while stage k+1
+    // runs group g-1.  Rows of group `base` use hand-off rows [base, base + S), so groups never share a hand-off row.
+    bool batch_launch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err);
+    /// 1 = this stage's window and commit are done (the last stage's picks are in batch_out), 0 = still running,
+    /// -1 = an error (err).  Serves every layer that has rung so far.
+    int batch_poll(PoolMultiFn pool, void* user, std::string& err);
+    bool batch_busy() const { return b_running_; }
+    /// A slot's sampling (temperature / top_p / top_k / min_p / seed; penalties are not applied in batch windows):
+    /// its row is drawn again on the last stage with Philox(seed, position), as a solo window draws it.  Greedy by
+    /// default.  Set on the first stage, it reaches the last.
+    void set_slot_sampling(int slot, const strata::kernels::SamplerParams& sp) {
+        if (slot >= 0 && slot < (int) slot_sp_.size()) slot_sp_[(size_t) slot] = sp;
+        if (next_) next_->set_slot_sampling(slot, sp);
+    }
+    const int32_t* batch_out() const { return b_out_; }
+    bool last_stage() const { return g_ != nullptr && le_ == g_->n_layers; }
     /// commit() returns without waiting for its graph (a single-GPU session sets it): the next window follows it on
     /// the same stream and the drafter reads nothing it writes, so it overlaps the draft. Whoever reads or writes
     /// the session from another stream or the host afterwards (a new request, a checkpoint, a snapshot, the prompt
@@ -162,6 +204,29 @@ class Verifier {
 
 private:
     bool capture(int T, std::string& err);
+    // batch windows (see init_slots)
+    std::vector<SessionState*> slots_;
+    bool batch_rec_ = false;               ///< record_window is capturing a batch window
+    int row_base_ = 0;                     ///< ... over slots [row_base_, row_base_ + T)
+    bool last_batch_ = false;              ///< the last run was a batch window (set_plan_slot: one group)
+    std::map<int, cudaGraphExec_t> exec_bm_, commit_bm_;   ///< key base * 16 + S
+    int last_base_ = 0;
+    // batch_launch / batch_poll
+    bool b_running_ = false;
+    int64_t b_k_ = 0, b_steps_ = 0;
+    std::chrono::steady_clock::time_point b_last_;
+    int32_t b_out_[8] = {};
+    std::vector<strata::kernels::SamplerParams> slot_sp_;
+    bool sample_rows(int base, int S, std::string& err);   ///< the sampled slots' rows of the last batch window
+    int32_t* h_commitb_ = nullptr; int32_t* m_commitb_ = nullptr;   // per slot [1, 0, pos, -1 ..], stride 2 + max_t
+    int32_t* commitb_ = nullptr;
+    float* tail_snap_b_ = nullptr;         ///< per (slot, QSA layer) indexer tail snapshot
+    void* arena_b_ = nullptr;
+    int64_t last_pos_b_[8] = {};
+    bool capture_batch(int base, int S, std::string& err);
+    void collect_profile();   ///< STRATA_VERIFY_PROFILE: add the last window's stamps to prof_sum_
+    bool capture_commit_batch(int base, int S, std::string& err);
+    bool stage_batch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err);
     strata::kernels::SamplerParams sampling_ = [] {
         strata::kernels::SamplerParams s;
         s.greedy = true;
diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..905471aae53 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -21,6 +21,7 @@
 from __future__ import annotations
 
 import argparse
+import contextlib
 import collections
 import base64
 import hashlib
@@ -292,6 +293,9 @@ def say(key, text):
             print(f"[strata] still starting ({time.time() - t0:.0f} s) - please wait ...", flush=True)
 
 
+EOS_IDS = {248044, 248046}   # <|endoftext|>, <|im_end|>: the engine's default --eos-ids
+
+
 class StrataEngine:
     """The resident engine: `strata --serve` reads `GEN <max_new> <ids>` lines and streams `T <id>` lines, then
     `DONE ...`.  Requests are serialized by the service's FIFO, so one pipe is enough.
@@ -368,16 +372,38 @@ def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str |
         self.ended = False                              # READY: alive from here (restart() set it True, #344)
         # the engine's stdout on a thread, so a request can wait with a timeout (heartbeats, cancel checks)
         self.lines: queue.Queue = queue.Queue()
+        # --batch: concurrent requests in the engine's batch slots (see generate_batched)
+        self.batch = int(args[args.index("--batch") + 1]) if "--batch" in args else 0
+        groups = int(args[args.index("--batch-groups") + 1]) if "--batch-groups" in args else 1
+        groups = groups if self.batch and groups > 0 and self.batch % groups == 0 else 1
+        gs = self.batch // groups if self.batch else 0
+        # slots in the order that spreads requests over the pipeline's groups first: 0, gs, 2gs, .., 1, gs+1, ..
+        self.slot_order = [g * gs + t for t in range(gs) for g in range(groups)]
+        self.slot_q = [queue.Queue() for _ in range(self.batch)]
+        self.slot_busy = [False] * self.batch
+        self.slot_cv = threading.Condition()
+        self.waiting = 0                                # requests waiting for the control lines (ctl)
+        self.ctl = threading.Lock()                     # one admission or solo request on the control lines at a time
+        self.wlock = threading.Lock()                   # stdin writes from several request threads
         self.pump = threading.Thread(target=self._pump, daemon=True)
         self.pump.start()
 
     def _pump(self):
         proc, lines = self.proc, self.lines             # this process's: a restart replaces both (#344)
+        slot_q = self.slot_q
         for line in proc.stdout:
+            if line.startswith(("BT ", "BDONE ")) and slot_q:   # --batch: a batch slot's own lines
+                try:
+                    slot_q[int(line.split()[1])].put(line)
+                    continue
+                except (IndexError, ValueError):
+                    pass
             lines.put(line)
         if self.proc is proc:                           # a killed engine's pump must not mark its successor dead
             self.ended = True                           # its output closed: it is gone, even before the OS says so
         lines.put(None)
+        for q in slot_q:
+            q.put(None)
 
     def death_note(self) -> str:
         """Why the engine most likely ended, from the end of its log: its own watchdog (issue #29), else RAM."""
@@ -498,10 +524,171 @@ def projection_key(sampling: dict) -> str:
         on = sampling.get("experimental_speed_projection")
         return f" cvec={int(on)}" if isinstance(on, bool) else ""
 
+    def _send(self, text: str):
+        try:
+            with self.wlock:
+                self.proc.stdin.write(text + "\n")
+                self.proc.stdin.flush()
+        except OSError:                                  # the pipe is gone: the engine died (not the client)
+            raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})") from None
+
+    def _control(self, cancel, on_token, stop_when=None):
+        """Reads the control lines of the request on them (GEN / BGEN), yielding None heartbeats.  Calls on_token(id)
+        for each `T`; returns ("done", None) at DONE, or ("badm", continues) at BADM (after DONE).  `stop_when()`
+        true sends STOP once (the request is then read to its DONE)."""
+        stopped = False
+        while True:
+            try:
+                line = self.lines.get(timeout=10.0)
+            except queue.Empty:
+                if cancel.is_set() and not stopped:
+                    self._send("STOP")
+                    stopped = True
+                yield None
+                continue
+            if line is None:
+                raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
+            if line.startswith("T "):
+                on_token(int(line[2:]))
+                if not stopped and (cancel.is_set() or (stop_when is not None and stop_when())):
+                    self._send("STOP")
+                    stopped = True
+                yield False                              # a token is pending (not a heartbeat)
+            elif line.startswith("PP "):
+                f = line.split()
+                if len(f) >= 3 and f[1].isdigit() and f[2].isdigit():
+                    self.progress = (int(f[1]), int(f[2]))
+                    self.prefill_tok_s_mean = float(f[4]) if len(f) >= 5 else None
+                yield None
+            elif line.startswith("DONE"):
+                self._parse_done(line)
+                self._last_done = line
+            elif line.startswith("BADM "):
+                f = line.split()
+                self._ctl_result = ("badm", len(f) >= 3 and f[2] == "1")
+                return
+            elif line.startswith("ERR"):
+                raise ValueError(line[4:].strip())
+            if line.startswith("DONE") and self._ctl_mode == "solo":
+                self._ctl_result = ("done", None)
+                return
+
+    def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
+        """--batch.  Alone (no slot busy, nobody waiting): the solo path (GEN, with drafts: the fastest stream)
+        - and when another request arrives meanwhile, this one is STOPped and continues in a batch slot (BGEN with
+        its prompt + what it generated: the engine reuses that prefix).  Otherwise: BGEN into a free slot, then the
+        slot's own BT lines until BDONE.  Several requests run at once; the control lines (prompt reading, admission)
+        are taken one request at a time."""
+        self.progress = None
+        keys = self.sampling_keys(sampling or {})
+        out: list[int] = []
+        pending: list[int] = []
+        with self.slot_cv:
+            self.waiting += 1
+        try:
+            while not self.ctl.acquire(timeout=10.0):
+                if cancel.is_set():
+                    return
+                yield None
+        finally:
+            with self.slot_cv:
+                self.waiting -= 1
+        holding = True
+        slot = None
+        try:
+            with self.slot_cv:
+                alone = not any(self.slot_busy) and self.waiting == 0
+            prompt, left = list(ids), int(max_new)
+            if alone and left > 1:
+                head = f"GENI {left}{keys} {embeddings}" if embeddings else f"GEN {left}{keys}"
+                self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+                self._ctl_mode, self._ctl_result = "solo", None
+                def others():
+                    with self.slot_cv:
+                        return self.waiting > 0
+                for x in self._control(cancel, pending.append, stop_when=others):
+                    while pending:
+                        t = pending.pop(0)
+                        out.append(t)
+                        yield t
+                    if x is None:                       # a heartbeat (False: a token, flushed above)
+                        yield None
+                while pending:
+                    t = pending.pop(0)
+                    out.append(t)
+                    yield t
+                finish = (self.last or {}).get("finish") if isinstance(self.last, dict) else None
+                left = int(max_new) - len(out)
+                if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
+                    return
+                prompt = list(ids) + out                # promoted: it continues in a batch slot from here
+                embeddings = embeddings                 # (an image prompt keeps its embeddings file)
+            # a free slot (they free themselves at BDONE, which needs no control lines)
+            with self.slot_cv:
+                while True:
+                    slot = next((b for b in self.slot_order if not self.slot_busy[b]), None)
+                    if slot is not None:
+                        self.slot_busy[slot] = True
+                        break
+                    self.slot_cv.wait(timeout=10.0)
+                    if cancel.is_set():
+                        return
+            while not self.slot_q[slot].empty():
+                self.slot_q[slot].get_nowait()
+            head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
+            self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+            self._ctl_mode, self._ctl_result = "batch", None
+            for x in self._control(cancel, pending.append):
+                while pending:
+                    yield pending.pop(0)
+                if x is None:
+                    yield None
+            while pending:
+                yield pending.pop(0)
+            cont = bool(self._ctl_result and self._ctl_result[1])
+            self.ctl.release()
+            holding = False
+            if not cont:
+                return
+            stopped = False
+            while True:
+                try:
+                    line = self.slot_q[slot].get(timeout=10.0)
+                except queue.Empty:
+                    if cancel.is_set() and not stopped:
+                        self._send(f"BSTOP {slot}")
+                        stopped = True
+                    yield None
+                    continue
+                if line is None:
+                    raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
+                if line.startswith("BT "):
+                    if cancel.is_set():
+                        if not stopped:
+                            self._send(f"BSTOP {slot}")
+                            stopped = True
+                        continue
+                    yield int(line.split()[2])
+                elif line.startswith("BDONE "):
+                    f = line.split()
+                    if len(f) >= 5 and isinstance(self.last, dict):
+                        self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4])}
+                    return
+        finally:
+            if holding:
+                self.ctl.release()
+            if slot is not None:
+                with self.slot_cv:
+                    self.slot_busy[slot] = False
+                    self.slot_cv.notify_all()
+
     def generate(self, ids, max_new, sampling, cancel, embeddings=None):
         """Yields token ids, and None as a heartbeat every 10 s while the engine is quiet (reading a long prompt):
         the HTTP layer turns it into an SSE comment, which keeps clients' watchdogs calm and notices a client that
         has gone.  A consumer that stops early (or `cancel`) makes the engine STOP, so it does not run to max_new."""
+        if getattr(self, "batch", 0):
+            yield from self.generate_batched(ids, max_new, sampling, cancel, embeddings)
+            return
         self.progress = None
         self.prefill_tok_s_mean = None
         # an image request takes the same sampling keys as text (#75: it used to decode greedily whatever was asked)
@@ -1447,7 +1634,8 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
         with self.status_lock:
             self.status["queued"] += 1
         try:
-            with self.fifo:
+            # --batch: the engine runs several requests at once (StrataEngine.generate_batched orders them)
+            with (contextlib.nullcontext() if getattr(self.engine, "batch", 0) else self.fifo):
                 try:
                     with self.status_lock:
                         if trace is not None:
diff --git a/src/core/native_dense.cpp b/src/core/native_dense.cpp
index 4a86d48c219..eb435821162 100644
--- a/src/core/native_dense.cpp
+++ b/src/core/native_dense.cpp
@@ -1,4 +1,5 @@
 #include "strata/core/native_dense.hpp"
+#include <cstdlib>
 #include "strata/core/weights.hpp"
 #include "strata/artifact/gguf_reader.hpp"
 #include "strata/kernels/native_mmvq.hpp"
@@ -69,7 +70,12 @@ NativeDense::~NativeDense() {
 }
 
 bool NativeDense::load(const std::vector<std::string>& shards, WeightTable& table, std::string& err,
-                       bool include_ple_key) {
+                       bool include_ple_key, int64_t layer_lo, int64_t layer_hi) {
+    auto outside = [&](const std::string& name) {   // a blk.<l>. tensor of another stage's layers
+        if (layer_hi < 0 || name.rfind("blk.", 0) != 0) return false;
+        const long l = std::strtol(name.c_str() + 4, nullptr, 10);
+        return l < layer_lo || l >= layer_hi;
+    };
     if (scratch_ || !weights_.empty()) { err = "native dense: already loaded"; return false; }
     if (shards.empty()) { err = "native dense: at least one GGUF shard is required"; return false; }
     try {
@@ -138,7 +144,7 @@ bool NativeDense::load(const std::vector<std::string>& shards, WeightTable& tabl
                 }
             }
             for (const auto& tensor : gguf.tensors()) {
-                if (!eligible(tensor, include_ple_key)) continue;
+                if (!eligible(tensor, include_ple_key) || outside(tensor.name)) continue;
                 if (!seen.insert(tensor.name).second) {
                     err = "native dense: duplicate tensor " + tensor.name; return false;
                 }
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index f956d73158f..1a68d6fe3df 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -176,6 +176,12 @@ Verifier::~Verifier() {
     for (auto& e : exec_)
         if (e) cudaGraphExecDestroy(e);
     if (commit_exec_) cudaGraphExecDestroy(commit_exec_);
+    for (auto& kv : exec_bm_)
+        if (kv.second) cudaGraphExecDestroy(kv.second);
+    for (auto& kv : commit_bm_)
+        if (kv.second) cudaGraphExecDestroy(kv.second);
+    if (arena_b_) cudaFree(arena_b_);
+    if (h_commitb_) cudaFreeHost(h_commitb_);
     if (cs_) cudaStreamDestroy(cs_);
     if (copy_) { cudaStreamSynchronize(copy_); cudaStreamDestroy(copy_); }
     if (commit_done_) cudaEventDestroy(commit_done_);
@@ -403,11 +409,15 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     const int64_t TS = (s.idx_block - 1) * ID;
     const bool ple_on = ss.ple.ready() && ple_stage();
     auto Rt = [&](int t) { return R_ + (size_t) t * HC * N; };
-    const int G = (split_ && T >= 2) ? 2 : 1;
+    const int G = (split_ && T >= 2 && !batch_rec_) ? 2 : 1;   // a batch window is one group
     static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
     auto stamp = [&](int64_t l, int i, int grp) { if (prof_on_ && grp == 0) gpu_stamp(prof_, (int) (l * kProfPer + i), cs); };
     const int tb_[2] = {0, (T + 1) / 2}, te_[2] = {G == 2 ? (T + 1) / 2 : T, T};
-    groups_[T] = G;
+    if (!batch_rec_) groups_[T] = G;
+    const int64_t nQall = g.n_qsa_layers();
+    // a batch window: row t is slot t, whose state lives in its own session
+    auto slot_ss = [&](int t) -> SessionState& { return batch_rec_ ? *slots_[(size_t) (row_base_ + t)] : ss; };
+    const int hrow0 = batch_rec_ ? row_base_ : 0;   // a slot group's own hand-off rows
 
     // ---- the window's inputs, from mapped staging
     copy_i32_from_mapped(tok_, m_tok_, T, cs);
@@ -423,9 +433,10 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     const int64_t HB = Verifier::handoff_floats(g);
     if (lb_ > 0) {
         for (int t = 0; t < T; ++t) {
-            copy_from_mapped(Rt(t), hand_in_ + (size_t) t * HB, HC * N, cs);
-            copy_from_mapped(bo_ + (size_t) t * N, hand_in_ + (size_t) t * HB + HC * N, N, cs);
-            copy_from_mapped(inj2_ + (size_t) t * HC, hand_in_ + (size_t) t * HB + HC * N + N, HC, cs);
+            const size_t hr = (size_t) (hrow0 + t) * HB;
+            copy_from_mapped(Rt(t), hand_in_ + hr, HC * N, cs);
+            copy_from_mapped(bo_ + (size_t) t * N, hand_in_ + hr + HC * N, N, cs);
+            copy_from_mapped(inj2_ + (size_t) t * HC, hand_in_ + hr + HC * N + N, HC, cs);
         }
     } else if (const NativeEmbed* ne = native_embed()) {       // plan v0.3 P6: the GGUF-form table
         ne->gather_dev(tok_, T, emb_, cs);
@@ -480,14 +491,15 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 PleOut po;
                 po.normalized = normalized;
                 po.result = Rt(t);
+                float* hist = batch_rec_ ? slot_ss(t).ple_hist : ss.ple.hist;   // the row's own history
                 try {
-                    ple_block(ple_ + t * N, Rt(t), ss.ple.hist, ss.ple.w, po, ss.ple.scratch, cs);
-                    ple_history_advance(ss.ple.hist, normalized, cs);
+                    ple_block(ple_ + t * N, Rt(t), hist, ss.ple.w, po, ss.ple.scratch, cs);
+                    ple_history_advance(hist, normalized, cs);
                 } catch (const std::exception& e) {
                     err = std::string("verify PLE: ") + e.what();
                     return false;
                 }
-                copy_from_mapped(hist_snap_ + (size_t) t * HS, ss.ple.hist, HS, cs);
+                copy_from_mapped(hist_snap_ + (size_t) t * HS, hist, HS, cs);
             }
             pending = false;
         }
@@ -530,6 +542,15 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 native_quantize_q8_1(xm, xq_, (int) N, n, cs);
                 native_mmvq(wqkv->native_type, wqkv->native_data, xq_, qkv + (size_t) tb * C, (int) N, (int) C, n, cs);
                 stamp(l, 2, grp);
+                if (batch_rec_) {   // each row from its own slot's conv history, one row each
+                    for (int t = tb; t < te; ++t) {
+                        SessionState& sx = slot_ss(t);
+                        const float* cx = sx.gdn_state + (size_t) (gi - sx.gdn_ord0) * gdn_floats +
+                                          (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+                        gdn_conv_l2_multi(cx, qkv + (size_t) t * C, (const float*) wc->data, hb + (size_t) t * C, (int) C,
+                                          (int) (2 * HK), EPS, 1, cs, 0);
+                    }
+                } else
                 gdn_conv_l2_multi(conv, qkv, (const float*) wc->data, hb, (int) C, (int) (2 * HK), EPS, n, cs, tb);
                 stamp(l, 3, grp);
                 gdn_ab_multi(xm, (const uint16_t*) wa->data, (const uint16_t*) wb->data, (const float*) wdt->data,
@@ -539,6 +560,15 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 native_mmvq(wg->native_type, wg->native_data, xq_, z_ + (size_t) tb * ZV, (int) N, (int) ZV, n, cs);
                 stamp(l, 5, grp);
                 // the recurrence from the untouched state over tokens [0, te); outputs only for this group's
+                if (batch_rec_) {   // each row's recurrence from its own slot's state, one token
+                    for (int t = tb; t < te; ++t) {
+                        SessionState& sx = slot_ss(t);
+                        float* stx = sx.gdn_state + (size_t) (gi - sx.gdn_ord0) * gdn_floats;
+                        gdn_step_norm_multi(stx, hb + (size_t) t * C, (int) C, gate + (size_t) t * HV, beta + (size_t) t * HV,
+                                            z_ + (size_t) t * ZV, (const float*) wnm->data, EPS, y_ + (size_t) t * ZV,
+                                            (int) HK, (int) HV, 1, nullptr, cs, 0);
+                    }
+                } else
                 gdn_step_norm_multi(state, hb, (int) C, gate, beta, z_, (const float*) wnm->data, EPS, y_, (int) HK,
                                     (int) HV, te, nullptr, cs, tb);
                 stamp(l, 6, grp);
@@ -583,8 +613,14 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                     fwht256_inplace_cuda(vcur_ + tb * NKV * HD, (int64_t) n * NKV, cs);
                 }
                 stamp(l, 8, grp);
+                if (batch_rec_) {   // every slot's indexer tail, restored by its commit
+                    for (int t = tb; t < te; ++t)
+                        copy_from_mapped(tail_snap_b_ + ((size_t) (row_base_ + t) * nQall + qi) * TS, slot_ss(t).qsa_states[qi].idx_tail,
+                                         TS, cs);
+                } else
                 if (grp == 0) copy_from_mapped(tail_snap_ + (size_t) qi * TS, st.idx_tail, TS, cs);
                 for (int t = tb; t < te; ++t) {
+                    const QsaState& st = slot_ss(t).qsa_states[qi];   // the row's own K/V (ss's outside a batch)
                     const int32_t* step_t = step_ + t * kStepCount;
                     if (st.kv_hybrid) {   // K8V4: the unused half's lanes folded onto the used pool (layer.cpp)
                         kv_append_q8_step(st.k_q, st.k_q, st.k_scale, st.k_scale, st.page_table, step_t,
@@ -601,11 +637,13 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                         kv_append_step(st.k_pool, st.v_pool, st.page_table, step_t, kcur_ + t * NKV * HD,
                                        vcur_ + t * NKV * HD, s, cs, &st.host);
                 }
-                const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
-                for (int t = tb; t < te; ++t)
+                for (int t = tb; t < te; ++t) {
+                    const QsaState& sx = slot_ss(t).qsa_states[qi];
+                    const QsaIndexerBuffers ib{sx.idx_tail, sx.idx_dead, sx.idx_pooled, sx.idx_block_pos};
                     native_qsa_indexer_append(idx_raw + t * ID, step_ + t * kStepCount + kStepPos, 0,
-                                              (const float*) wikn->data, EPS, ib, s, st.max_cells,
+                                              (const float*) wikn->data, EPS, ib, s, sx.max_cells,
                                               rope_scaling(), cs);
+                }
                 stamp(l, 9, grp);
                 native_mmvq(wq->native_type, wq->native_data, xq_, qfull_ + tb * NH * 2 * HD, (int) N, (int) (NH * 2 * HD),
                             n, cs);
@@ -638,6 +676,20 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 }
                 }
                 stamp(l, 10, grp);
+                if (batch_rec_) {   // each row selects and attends over its own slot's K/V
+                    for (int t = tb; t < te; ++t) {
+                        const QsaState& sx = slot_ss(t).qsa_states[qi];
+                        qsa_block_scores(sx.idx_pooled, sx.idx_dead, qidx_ + t * IQ * ID, step_ + t * kStepCount, 1,
+                                         max_blocks_, s, scores_ + (size_t) t * max_blocks_, cs);
+                        qsa_block_topk(scores_ + (size_t) t * max_blocks_, step_ + t * kStepCount, 1, max_blocks_, cap_, s,
+                                       sel_ + (size_t) t * cap_, cs);
+                        qsa_kv_resolve(sx, *g_, sel_ + (size_t) t * cap_, step_ + t * kStepCount, 1, cap_, cs);
+                        const QsaAttnPools px = qsa_attn_pools(sx);
+                        qsa_decode_attn_batch(qcur_ + t * NH * HD, px, sel_ + (size_t) t * cap_, step_ + t * kStepCount,
+                                              cap_, s, attn_scratch_ + (size_t) t * attn_scratch_floats_,
+                                              attn_ + t * NH * HD, 1, cs);
+                    }
+                } else {
                 qsa_block_scores(st.idx_pooled, st.idx_dead, qidx_ + tb * IQ * ID, step_ + tb * kStepCount, n, max_blocks_,
                                  s, scores_ + (size_t) tb * max_blocks_, cs);
                 qsa_block_topk(scores_ + (size_t) tb * max_blocks_, step_ + tb * kStepCount, n, max_blocks_, cap_, s,
@@ -649,6 +701,7 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 const QsaAttnPools pools = qsa_attn_pools(st);
                 qsa_decode_attn_batch(qcur_ + tb * NH * HD, pools, sel_ + (size_t) tb * cap_, step_ + tb * kStepCount, cap_,
                                       s, attn_scratch_ + (size_t) tb * attn_scratch_floats_, attn_ + tb * NH * HD, n, cs);
+                }
                 stamp(l, 13, grp);
                 if (st.kv_rot || st.kv_hybrid) fwht256_inplace_cuda(attn_ + tb * NH * HD, (int64_t) n * NH, cs);   // back: H^-1 = H
                 if (qb) native_qsa_gate_apply(attn_ + tb * NH * HD, qfull_ + tb * NH * 2 * HD, attn32_ + tb * NH * HD,
@@ -820,9 +873,10 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         }
     if (le_ < g.n_layers) {   // a layer split's earlier stage: hand the residual on, no head
         for (int t = 0; t < T; ++t) {
-            copy_from_mapped(hand_out_ + (size_t) t * HB, Rt(t), HC * N, cs);
-            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N, bo_ + (size_t) t * N, N, cs);
-            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N + N, inj2_ + (size_t) t * HC, HC, cs);
+            const size_t hr = (size_t) (hrow0 + t) * HB;
+            copy_from_mapped(hand_out_ + hr, Rt(t), HC * N, cs);
+            copy_from_mapped(hand_out_ + hr + HC * N, bo_ + (size_t) t * N, N, cs);
+            copy_from_mapped(hand_out_ + hr + HC * N + N, inj2_ + (size_t) t * HC, HC, cs);
         }
         return true;
     }
@@ -1019,10 +1073,45 @@ bool Verifier::capture_commit(std::string& err) {
     return true;
 }
 
+void Verifier::collect_profile() {
+    const ModelGeometry& g = *g_;
+    cudaMemcpy(prof_h_.data(), prof_, prof_h_.size() * 8, cudaMemcpyDeviceToHost);
+    const int64_t L = g.n_layers;
+    auto at = [&](int64_t l, int i) { return prof_h_[(size_t) (l * kProfPer + i)]; };
+    // D8: the derived columns below read stamps the hc-read kernels write themselves or the next
+    // layer's first.  A slot no kernel stamped is 0 and its unsigned difference wrapped to ~1e19 ns -
+    // which is why (gap)/head/hc0 printed ~1e14 ms per window.  A missing or out-of-order stamp now
+    // contributes nothing.
+    const auto gap = [](unsigned long long to, unsigned long long from) {
+        return (from != 0 && to != 0 && to >= from) ? (double) (to - from) : 0.0;
+    };
+    for (int64_t l = 0; l < L; ++l) {
+        const int kind = is_qsa_layer(g, l) ? 1 : 0;
+        unsigned long long prev = at(l, 0);
+        for (int i = 1; i <= 24; ++i) {
+            const unsigned long long x = at(l, i);
+            if (x == 0 || x < prev) continue;
+            prof_sum_[kind][i] += (double) (x - prev);
+            prev = x;
+        }
+        if (l + 1 < L) prof_sum_[kind][25] += gap(at(l + 1, 0), at(l, 24));
+        const double dn = gap(at(l, 27), at(l, 0)), dd = gap(at(l, 28), at(l, 27)), du = gap(at(l, 1), at(l, 28));
+        if (dn > 0 && dd > 0 && du > 0) {   // the split exists: show it split, not twice
+            prof_sum_[kind][27] += dn;      // hc-read0: norm
+            prof_sum_[kind][28] += dd;      //           down
+            prof_sum_[kind][29] += du;      //           up (through both halves, as before)
+            prof_sum_[kind][1] -= gap(at(l, 1), at(l, 0));   // (hc-read0 shown split)
+        }
+    }
+    prof_sum_[0][26] += gap(at(L, 1), at(L, 0));
+    ++prof_windows_;
+}
+
 bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool, void* user, int32_t* out,
                    std::string& err) {
     using namespace strata::kernels;
     const OnDevice on_device(device_);
+    last_batch_ = false;
     if (T < 1 || T > max_t_) { err = "verify: window size out of range"; return false; }
     if (released_.load()) { err = "verify: an earlier window never finished on the GPU (#267); restart the engine"; return false; }
     const ModelGeometry& g = *g_;
@@ -1135,38 +1224,7 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     if (se != cudaSuccess) { err = std::string("verify: ") + cudaGetErrorString(se); return false; }
     progress_at("verify window: waiting for the expert copies", (int64_t) T);
     cudaStreamSynchronize(copy_);   // no host function of this window may raise flag B in the next one
-    if (prof_on_ && G == 1) {       // the window's GPU stage stamps
-        cudaMemcpy(prof_h_.data(), prof_, prof_h_.size() * 8, cudaMemcpyDeviceToHost);
-        const int64_t L = g.n_layers;
-        auto at = [&](int64_t l, int i) { return prof_h_[(size_t) (l * kProfPer + i)]; };
-        // D8: the derived columns below read stamps the hc-read kernels write themselves or the next
-        // layer's first.  A slot no kernel stamped is 0 and its unsigned difference wrapped to ~1e19 ns -
-        // which is why (gap)/head/hc0 printed ~1e14 ms per window.  A missing or out-of-order stamp now
-        // contributes nothing.
-        const auto gap = [](unsigned long long to, unsigned long long from) {
-            return (from != 0 && to != 0 && to >= from) ? (double) (to - from) : 0.0;
-        };
-        for (int64_t l = 0; l < L; ++l) {
-            const int kind = is_qsa_layer(g, l) ? 1 : 0;
-            unsigned long long prev = at(l, 0);
-            for (int i = 1; i <= 24; ++i) {
-                const unsigned long long x = at(l, i);
-                if (x == 0 || x < prev) continue;
-                prof_sum_[kind][i] += (double) (x - prev);
-                prev = x;
-            }
-            if (l + 1 < L) prof_sum_[kind][25] += gap(at(l + 1, 0), at(l, 24));
-            const double dn = gap(at(l, 27), at(l, 0)), dd = gap(at(l, 28), at(l, 27)), du = gap(at(l, 1), at(l, 28));
-            if (dn > 0 && dd > 0 && du > 0) {   // the split exists: show it split, not twice
-                prof_sum_[kind][27] += dn;      // hc-read0: norm
-                prof_sum_[kind][28] += dd;      //           down
-                prof_sum_[kind][29] += du;      //           up (through both halves, as before)
-                prof_sum_[kind][1] -= gap(at(l, 1), at(l, 0));   // (hc-read0 shown split)
-            }
-        }
-        prof_sum_[0][26] += gap(at(L, 1), at(L, 0));
-        ++prof_windows_;
-    }
+    if (prof_on_ && G == 1) collect_profile();   // the window's GPU stage stamps
     // ---- a sampled or penalized request: the head's sampling again, host-side so its parameters are this call's
     // own (a captured kernel would replay the same draws forever).  Row t's draw is Philox(seed, pos0 + t): tied to
     // the POSITION it samples, not to how the text was cut into windows, so a seed replays the same text whatever
@@ -1221,7 +1279,7 @@ void Verifier::set_plan_slot(int grp) {
     sink_.ptr = (unsigned long long*) (base + ptr_off);
     sink_.ptr2 = sink_.ptr + cap;
     sink_.start2 = base + ptr_off + 4 * cap;
-    const int G = groups_[last_t_] > 0 ? groups_[last_t_] : 1;
+    const int G = last_batch_ ? 1 : (groups_[last_t_] > 0 ? groups_[last_t_] : 1);
     const int64_t per = G == 2 ? kStagingBlobs / 2 : kStagingBlobs;
     sink_.staging = (unsigned long long) (staging_ + (size_t) (grp * per) * strata::kernels::cpu::expert_layout().max_blob);
     sink_.staging_cap = per;
@@ -1363,6 +1421,394 @@ bool Verifier::wait_commit(std::string& err) {
     return next_ == nullptr || next_->wait_commit(err);
 }
 
+
+// ================================ BATCH WINDOWS (see init_slots) ================================
+
+bool Verifier::init_slots(const std::vector<SessionState*>& slots, std::string& err) {
+    const OnDevice on_device(device_);
+    if (g_ == nullptr || ss_ == nullptr) { err = "verify: init_slots before init"; return false; }
+    if (slots.empty() || (int) slots.size() > max_t_) {
+        err = "verify: init_slots needs 1.." + std::to_string(max_t_) + " sessions";
+        return false;
+    }
+    for (SessionState* x : slots) {
+        if (x == nullptr || x->layer_lo != ss_->layer_lo || x->layer_hi != ss_->layer_hi ||
+            x->max_cells != ss_->max_cells || x->gdn_ord0 != ss_->gdn_ord0 || x->qsa_ord0 != ss_->qsa_ord0) {
+            err = "verify: a slot's session is not carved like the stage's own (layer range, context)";
+            return false;
+        }
+    }
+    const strata::kernels::QsaShapes s = shapes_of(*g_);
+    const int64_t S = (int64_t) slots.size(), CB = 2 + max_t_;
+    const int64_t TS = (s.idx_block - 1) * g_->idx_key_dim, nQ = g_->n_qsa_layers();
+    void* d = nullptr;
+    if (!mapped((size_t) (S * CB * 4 + 16), (void**) &h_commitb_, (void**) &m_commitb_)) {
+        err = "verify: the batch commit staging failed";
+        return false;
+    }
+    const uint64_t a = ((uint64_t) S * CB * 4 + 255) & ~255ull;
+    if (cudaMalloc(&d, a + (uint64_t) S * std::max<int64_t>(nQ, 1) * TS * 4) != cudaSuccess) {
+        err = "verify: the batch buffers do not fit";
+        return false;
+    }
+    arena_b_ = d;
+    commitb_ = (int32_t*) d;
+    tail_snap_b_ = (float*) ((uint8_t*) d + a);
+    slots_ = slots;
+    slot_sp_.assign(slots.size(), sampling_);   // greedy until set_slot_sampling
+    std::fprintf(stderr, "strata verify: batch windows of up to %lld sequences (layers [%lld, %lld))\n", (long long) S,
+                 (long long) lb_, (long long) le_);
+    return true;
+}
+
+bool Verifier::capture_batch(int base, int S, std::string& err) {
+    cudaGraphExec_t& ex = exec_bm_[base * 16 + S];
+    if (ex != nullptr) return true;
+    if (cudaStreamBeginCapture(cs_, cudaStreamCaptureModeThreadLocal) != cudaSuccess) {
+        err = "verify: begin batch capture failed";
+        return false;
+    }
+    batch_rec_ = true;
+    row_base_ = base;
+    std::string rerr;
+    const bool ok = record_window(S, cs_, rerr);
+    batch_rec_ = false;
+    row_base_ = 0;
+    cudaGraph_t graph = nullptr;
+    const cudaError_t ce = cudaStreamEndCapture(cs_, &graph);
+    if (!ok || ce != cudaSuccess) {
+        if (graph) cudaGraphDestroy(graph);
+        err = !ok ? rerr : std::string("verify: end batch capture: ") + cudaGetErrorString(ce);
+        return false;
+    }
+    const cudaError_t ie = cudaGraphInstantiate(&ex, graph, 0);
+    cudaGraphDestroy(graph);
+    if (ie != cudaSuccess) { err = std::string("verify: batch instantiate: ") + cudaGetErrorString(ie); return false; }
+    cudaGraphUpload(ex, cs_);
+    cudaStreamSynchronize(cs_);
+    std::fprintf(stderr, "strata verify: captured the batch window over slots [%d, %d)\n", base, base + S);
+    return true;
+}
+
+bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
+    cudaGraphExec_t& cex = commit_bm_[base * 16 + S];
+    if (cex != nullptr) return true;
+    using namespace strata::kernels;
+    const ModelGeometry& g = *g_;
+    const QsaShapes s = shapes_of(g);
+    const int64_t C = g.ssm_conv_channels, HV = g.ssm_v_heads, ZV = g.ssm_value_dim, ID = g.idx_key_dim, MT = max_t_;
+    const int64_t CB = 2 + MT, nQ = g.n_qsa_layers();
+    const uint64_t gdn_floats = (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
+                                (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
+    const int64_t TS = (s.idx_block - 1) * ID;
+    const int64_t HS = (int64_t) NG_HIST * NG_HC_DIM;
+    if (cudaStreamBeginCapture(cs_, cudaStreamCaptureModeThreadLocal) != cudaSuccess) {
+        err = "verify: begin batch commit capture failed";
+        return false;
+    }
+    bool ok = true;
+    try {
+        copy_i32_from_mapped(commitb_ + (size_t) base * CB, m_commitb_ + (size_t) base * CB, S * CB, cs_);
+        int64_t qsa_index = 0, gdn_index = 0;
+        for (int64_t l = 0; l < lb_; ++l) (is_qsa_layer(g, l) ? qsa_index : gdn_index) += 1;
+        for (int64_t l = lb_; l < le_ && ok; ++l) {
+            const LayerView v(*wt_, l);
+            if (!is_qsa_layer(g, l)) {
+                const WeightRef* wnm = need(v, "ssm_norm.weight", err);
+                if (!wnm) { ok = false; break; }
+                for (int t = 0; t < S; ++t) {
+                    SessionState& sx = *slots_[(size_t) (base + t)];
+                    const int32_t* keep = commitb_ + (size_t) (base + t) * CB;
+                    float* state = sx.gdn_state + (size_t) (gdn_index - sx.gdn_ord0) * gdn_floats;
+                    float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
+                    gdn_conv_commit(conv, qkv_L_ + (size_t) gdn_index * MT * C + (size_t) t * C, (int) C, keep, cs_);
+                    gdn_step_norm_multi(state, h_L_ + (size_t) gdn_index * MT * C + (size_t) t * C, (int) C,
+                                        gate_L_ + (size_t) gdn_index * MT * HV + (size_t) t * HV,
+                                        beta_L_ + (size_t) gdn_index * MT * HV + (size_t) t * HV, z_ + (size_t) t * ZV,
+                                        (const float*) wnm->data, EPS, y_dummy_ + (size_t) t * ZV, (int) g.ssm_k_heads,
+                                        (int) HV, 1, keep, cs_);
+                }
+                ++gdn_index;
+            } else {
+                const WeightRef* wikn = need(v, "indexer.k_norm.weight", err);
+                if (!wikn) { ok = false; break; }
+                for (int t = 0; t < S; ++t) {
+                    const QsaState& st = slots_[(size_t) (base + t)]->qsa_states[qsa_index];
+                    copy_from_mapped(st.idx_tail, tail_snap_b_ + ((size_t) (base + t) * nQ + qsa_index) * TS, TS, cs_);
+                    const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
+                    native_qsa_indexer_append(idx_raw_L_ + (size_t) (qsa_index * MT + t) * ID, commitb_ + (size_t) (base + t) * CB + 2,
+                                              0, (const float*) wikn->data, EPS, ib, s, st.max_cells, rope_scaling(), cs_);
+                }
+                ++qsa_index;
+            }
+        }
+        if (ok && ss_->ple.ready() && ple_stage())
+            for (int t = 0; t < S; ++t)
+                copy_indexed(slots_[(size_t) (base + t)]->ple_hist, hist_snap_ + (size_t) t * HS, HS,
+                             commitb_ + (size_t) (base + t) * CB + 1, HS, cs_);
+    } catch (const std::exception& e) {
+        err = std::string("verify batch commit: ") + e.what();
+        ok = false;
+    }
+    cudaGraph_t graph = nullptr;
+    const cudaError_t ce = cudaStreamEndCapture(cs_, &graph);
+    if (!ok) {
+        if (graph) cudaGraphDestroy(graph);
+        return false;
+    }
+    if (ce != cudaSuccess || cudaGraphInstantiate(&cex, graph, 0) != cudaSuccess) {
+        if (graph) cudaGraphDestroy(graph);
+        err = std::string("verify: batch commit capture: ") + cudaGetErrorString(ce);
+        return false;
+    }
+    cudaGraphDestroy(graph);
+    return true;
+}
+
+bool Verifier::stage_batch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err) {
+    using namespace strata::kernels;
+    if (S < 1 || base < 0 || base + S > (int) slots_.size()) { err = "verify: batch rows out of range (init_slots)"; return false; }
+    if (released_.load()) { err = "verify: an earlier window never finished on the GPU (#267); restart the engine"; return false; }
+    const ModelGeometry& g = *g_;
+    for (int t = 0; t < S; ++t)
+        if (pos[t] < 0 || pos[t] + 1 > slots_[(size_t) (base + t)]->max_cells) {
+            err = "verify: slot " + std::to_string(base + t) + " runs past its context";
+            return false;
+        }
+    if (!capture_batch(base, S, err) || !capture_commit_batch(base, S, err)) return false;
+    const Clock::time_point t0 = Clock::now();
+    const QsaShapes s = shapes_of(g);
+    for (int t = 0; t < S; ++t) {
+        h_tok_[t] = tokens[t];
+        qsa_step_fill(h_step_ + t * kStepCount, pos[t], s);
+        for (int64_t h = 0; h < g.n_head; ++h) h_pos_[t * g.n_head + h] = (int32_t) pos[t];
+        int32_t* pk = h_pos_ + (size_t) max_t_ * g.n_head;
+        int32_t* pi = pk + (size_t) max_t_ * g.n_head_kv;
+        for (int64_t h = 0; h < g.n_head_kv; ++h) pk[t * g.n_head_kv + h] = (int32_t) pos[t];
+        for (int64_t h = 0; h < g.idx_q_heads; ++h) pi[t * g.idx_q_heads + h] = (int32_t) pos[t];
+    }
+    if (ss_->ple.ready() && ple_stage()) {
+        uint32_t rows[kVerifyMaxT * PLE_N_HEADS];
+        for (int t = 0; t < S; ++t) {
+            const SessionState& sx = *slots_[(size_t) (base + t)];
+            int32_t prev[2] = {sx.ple_prev[0], sx.ple_prev[1]};
+            ngram_rows(&tokens[t], prev, 1, ss_->ple.consts, rows + t * PLE_N_HEADS);
+        }
+        if (!ss_->ple.table->gather_batch(rows, (size_t) S, h_ple_, err)) return false;
+    }
+    // the commit's rows (a batch window keeps every row): [1, 0, position, -1 ..] per slot
+    const int64_t CB = 2 + max_t_;
+    for (int t = 0; t < S; ++t) {
+        int32_t* c = h_commitb_ + (size_t) (base + t) * CB;
+        c[0] = 1;
+        c[1] = 0;
+        c[2] = (int32_t) pos[t];
+        for (int64_t j = 3; j < CB; ++j) c[j] = -1;
+    }
+    *(volatile uint32_t*) h_seq_ = 0;
+    *(volatile uint32_t*) h_flag_ = 0;
+    *(volatile uint32_t*) h_flagA_ = 0;
+    *(volatile uint32_t*) h_flagB_ = 0;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    last_t_ = S;
+    last_base_ = base;
+    last_batch_ = true;
+    for (int t = 0; t < S; ++t) { last_tokens_[t] = tokens[t]; last_pos_b_[t] = pos[t]; }
+    ms_host += ms_since(t0);
+    return true;
+}
+
+bool Verifier::run_slots(int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool, void* user, int32_t* out,
+                         std::string& err) {
+    using namespace strata::kernels;
+    const OnDevice on_device(device_);
+    const ModelGeometry& g = *g_;
+    if (!stage_batch(0, S, tokens, pos, err)) return false;
+    const cudaError_t le = cudaGraphLaunch(exec_bm_[0 * 16 + S], cs_);
+    if (le != cudaSuccess) { err = std::string("verify: batch launch: ") + cudaGetErrorString(le); return false; }
+    (void) cudaStreamQuery(cs_);
+    volatile uint32_t* const seq = h_seq_;
+    volatile uint32_t* const flag = h_flag_;
+    const int64_t steps = le_ - lb_;
+    for (int64_t k = 0; k < steps; ++k) {
+        const int64_t l = lb_ + k;
+        const uint32_t want = (uint32_t) (k + 1);
+        const Clock::time_point a = Clock::now();
+        auto last_flush = a;
+        uint32_t spins = 0;
+        progress_at("verify batch: waiting for the GPU to reach layer", l);
+        while (*seq < want) {
+            _mm_pause();
+            if ((++spins & 1023u) != 0) continue;
+            const auto now = Clock::now();
+            if (now - last_flush > std::chrono::microseconds(2000)) {
+                last_flush = now;
+                const cudaError_t q = cudaStreamQuery(cs_);
+                if (q != cudaErrorNotReady && *seq < want) {
+                    err = "verify batch: layer " + std::to_string(l) + " never rang (" +
+                          (q == cudaSuccess ? std::string("graph finished") : std::string(cudaGetErrorString(q))) + ")";
+                    return false;
+                }
+            }
+            if (now - a > std::chrono::seconds(20)) {
+                err = "verify batch: timed out at layer " + std::to_string(l) + released_note(release_gpu_waits(5000));
+                return false;
+            }
+        }
+        const Clock::time_point b = Clock::now();
+        cur_layer_ = want - 1;
+        set_plan_slot(0);
+        progress_at("verify batch: the CPU experts of layer", l);
+        if (pool != nullptr) pool(user, h_x_, h_ids_, S, ss_->k, h_ymiss_, l);
+        progress_tick();
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        _mm_sfence();
+        if (*(volatile uint32_t*) h_flagA_ != want) {        // the pool did not publish a plan: an empty one
+            sink_.counts[0] = 0;
+            sink_.counts[1] = 0;
+            sink_.counts[2] = 0;
+            sink_.start[0] = 0;
+            sink_.start2[0] = 0;
+            std::atomic_thread_fence(std::memory_order_seq_cst);
+            *(volatile uint32_t*) h_flagA_ = want;
+            raise_flag(h_flagB_, want);
+        }
+        *flag = want;
+        ms_wait += std::chrono::duration<double, std::milli>(b - a).count();
+        ms_pool += ms_since(b);
+    }
+    const cudaError_t se = cudaStreamSynchronize(cs_);
+    if (se != cudaSuccess) { err = std::string("verify batch: ") + cudaGetErrorString(se); return false; }
+    cudaStreamSynchronize(copy_);
+    if (prof_on_) collect_profile();
+    ++windows;
+    if (le_ < g.n_layers) return next_ == nullptr || next_->run_slots(S, tokens, pos, pool, next_user_, out, err);
+    if (!sample_rows(0, S, err)) return false;
+    for (int t = 0; t < S; ++t) out[t] = ((volatile int32_t*) h_out_)[t];
+    progress_at("decode");
+    progress_beat();
+    return true;
+}
+
+bool Verifier::commit_slots(std::string& err) {
+    const OnDevice on_device(device_);
+    if (!last_batch_ || last_t_ < 1) { err = "verify: commit_slots without a batch window"; return false; }
+    const int S = last_t_;
+    const Clock::time_point t0 = Clock::now();
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    const cudaError_t le = cudaGraphLaunch(commit_bm_[last_base_ * 16 + S], cs_);
+    if (le != cudaSuccess) { err = std::string("verify: batch commit launch: ") + cudaGetErrorString(le); return false; }
+    const cudaError_t se = cudaStreamSynchronize(cs_);
+    if (se != cudaSuccess) { err = std::string("verify: batch commit: ") + cudaGetErrorString(se); return false; }
+    if (ple_stage())
+        for (int t = 0; t < S; ++t) {
+            SessionState& sx = *slots_[(size_t) (last_base_ + t)];
+            sx.ple_prev[0] = sx.ple_prev[1];
+            sx.ple_prev[1] = last_tokens_[t];
+        }
+    ms_commit += ms_since(t0);
+    return next_ == nullptr || next_->commit_slots(err);
+}
+
+bool Verifier::sample_rows(int base, int S, std::string& err) {
+    bool any = false;
+    for (int t = 0; t < S; ++t) {
+        strata::kernels::SamplerParams sp = slot_sp_[(size_t) (base + t)];
+        if (sp.greedy || sp.temperature <= 0.0f) continue;
+        sp.counter = (uint64_t) last_pos_b_[t];   // Philox(seed, position): the solo window's draw for this position
+        sp.penalty_last_n = 0;
+        strata::kernels::sample_tokens(head_logits_ + (size_t) t * (size_t) n_vocab_, 1, (int) n_vocab_, nullptr, 0, sp,
+                                       m_out_ + t, cs_);
+        any = true;
+    }
+    if (any && cudaStreamSynchronize(cs_) != cudaSuccess) { err = "verify batch: the row sampling failed"; return false; }
+    return true;
+}
+
+bool Verifier::batch_launch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err) {
+    const OnDevice on_device(device_);
+    if (b_running_) { err = "verify: batch_launch while this stage is busy"; return false; }
+    if (!stage_batch(base, S, tokens, pos, err)) return false;
+    cudaError_t le = cudaGraphLaunch(exec_bm_[base * 16 + S], cs_);
+    if (le == cudaSuccess) le = cudaGraphLaunch(commit_bm_[base * 16 + S], cs_);   // right behind it: every row is kept
+    if (le != cudaSuccess) { err = std::string("verify: batch launch: ") + cudaGetErrorString(le); return false; }
+    (void) cudaStreamQuery(cs_);
+    if (ple_stage())   // the host's side of the commit (the hash's last two tokens)
+        for (int t = 0; t < S; ++t) {
+            SessionState& sx = *slots_[(size_t) (base + t)];
+            sx.ple_prev[0] = sx.ple_prev[1];
+            sx.ple_prev[1] = tokens[t];
+        }
+    b_running_ = true;
+    b_k_ = 0;
+    b_steps_ = le_ - lb_;
+    b_last_ = Clock::now();
+    return true;
+}
+
+int Verifier::batch_poll(PoolMultiFn pool, void* user, std::string& err) {
+    if (!b_running_) return 1;
+    const OnDevice on_device(device_);
+    volatile uint32_t* const seq = h_seq_;
+    const int S = last_t_;
+    while (b_k_ < b_steps_) {
+        const uint32_t want = (uint32_t) (b_k_ + 1);
+        if (*seq < want) {
+            const auto now = Clock::now();
+            if (now - b_last_ > std::chrono::milliseconds(2)) {
+                const cudaError_t q = cudaStreamQuery(cs_);
+                if (q != cudaErrorNotReady && *seq < want) {
+                    err = "verify batch: layer " + std::to_string(lb_ + b_k_) + " never rang (" +
+                          (q == cudaSuccess ? std::string("graph finished") : std::string(cudaGetErrorString(q))) + ")";
+                    b_running_ = false;
+                    return -1;
+                }
+                if (now - b_last_ > std::chrono::seconds(20)) {
+                    err = "verify batch: timed out at layer " + std::to_string(lb_ + b_k_) + released_note(release_gpu_waits(5000));
+                    b_running_ = false;
+                    return -1;
+                }
+            }
+            return 0;
+        }
+        const Clock::time_point b = Clock::now();
+        cur_layer_ = want - 1;
+        set_plan_slot(0);
+        if (pool != nullptr) pool(user, h_x_, h_ids_, S, ss_->k, h_ymiss_, lb_ + b_k_);
+        progress_tick();
+        std::atomic_thread_fence(std::memory_order_seq_cst);
+        _mm_sfence();
+        if (*(volatile uint32_t*) h_flagA_ != want) {        // the pool did not publish a plan: an empty one
+            sink_.counts[0] = 0;
+            sink_.counts[1] = 0;
+            sink_.counts[2] = 0;
+            sink_.start[0] = 0;
+            sink_.start2[0] = 0;
+            std::atomic_thread_fence(std::memory_order_seq_cst);
+            *(volatile uint32_t*) h_flagA_ = want;
+            raise_flag(h_flagB_, want);
+        }
+        *(volatile uint32_t*) h_flag_ = want;
+        ms_pool += ms_since(b);
+        b_last_ = Clock::now();
+        ++b_k_;
+    }
+    const cudaError_t q = cudaStreamQuery(cs_);
+    if (q == cudaErrorNotReady) return 0;
+    if (q != cudaSuccess) { err = std::string("verify batch: ") + cudaGetErrorString(q); b_running_ = false; return -1; }
+    const cudaError_t qc = cudaStreamQuery(copy_);   // no host function of this window may raise flag B in the next
+    if (qc == cudaErrorNotReady) return 0;
+    if (prof_on_) collect_profile();
+    if (last_stage()) {
+        if (!sample_rows(last_base_, S, err)) { b_running_ = false; return -1; }
+        for (int t = 0; t < S; ++t) b_out_[t] = ((volatile int32_t*) h_out_)[t];
+    }
+    ++windows;
+    b_running_ = false;
+    progress_beat();
+    return 1;
+}
+
 bool Verifier::copy_logits(int t, float* host) const {
     if (next_ != nullptr) return next_->copy_logits(t, host);   // a layer split: the head is on the last stage
     if (head_logits_ == nullptr || host == nullptr || t < 0 || n_vocab_ <= 0) return false;
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a7c77d0efff..23daeb7e955 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -363,6 +363,16 @@ struct Options {
     /// spec-1 drafts); 0 = plain decode.  `spec_oracle` drafts from a token file (the expected continuation, for
     /// the exactness test); `spec_corrupt` N > 0 replaces every Nth draft with a wrong token.
     int spec = 0;
+    /// --serve runs up to this many sequences at once, one token each per batch window (0 = off).  A request
+    /// sent as `BGEN <slot> <max_new> ...` reads its prompt and its first token through the usual path, then
+    /// continues in slot <slot> of the batch windows (`BT <slot> <id>` lines, then `BDONE <slot> ...`).
+    int batch = 0;
+    /// With an explicit --layer-split, every GPU loads only its own layers' dense weights instead of the whole
+    /// model's: the VRAM they took goes back to the expert cache (opt-in)
+    bool trim_stage_weights = false;
+    /// The --batch slots in this many groups pipelined through the stages of a layer split (stage k
+    /// runs one group while stage k+1 runs another).  1 = every slot in one window, stage after stage.
+    int batch_groups = 1;
     std::string spec_oracle;
     int spec_corrupt = 0;
     /// Plan v0.3 P6: the MTP draft layer's runtime directory (tools/mtp_rt.py); drafts come from it.
@@ -1214,6 +1224,9 @@ int main(int argc, char** argv) {
         else if (a == "--prefill-until") o.prefill_until = std::atoll(next("--prefill-until"));
         else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
         else if (a == "--spec") o.spec = std::atoi(next("--spec"));
+        else if (a == "--batch") o.batch = std::atoi(next("--batch"));
+        else if (a == "--trim-stage-weights") o.trim_stage_weights = true;
+        else if (a == "--batch-groups") o.batch_groups = std::atoi(next("--batch-groups"));
         else if (a == "--spec-oracle") o.spec_oracle = next("--spec-oracle");
         else if (a == "--spec-corrupt") o.spec_corrupt = std::atoi(next("--spec-corrupt"));
         else if (a == "--mtp") o.mtp = next("--mtp");
@@ -1984,8 +1997,28 @@ int main(int argc, char** argv) {
         }
         if (native_pack) skip.insert("token_embd.weight");
     }
+    // --trim-stage-weights: the layers each device runs, known before anything loads (explicit split only)
+    const bool trim = o.trim_stage_weights && multi_gpu && !split_auto;
+    if (o.trim_stage_weights && !trim)
+        std::fprintf(stderr, "strata generate: --trim-stage-weights needs an explicit --layer-split (ignored)\n");
+    std::vector<std::string> pack_names;
+    if (trim) {
+        std::ifstream idx(o.pack + "/index.txt");
+        for (std::string ln; std::getline(idx, ln);)
+            if (!ln.empty() && ln[0] != '#') pack_names.push_back(ln.substr(0, ln.find(' ')));
+    }
+    auto range_skip = [&](int64_t lo, int64_t hi) {   // skip + every blk.<l>. tensor outside [lo, hi)
+        std::set<std::string> out = skip;
+        for (const std::string& nm : pack_names) {
+            if (nm.rfind("blk.", 0) != 0) continue;
+            const long l = std::strtol(nm.c_str() + 4, nullptr, 10);
+            if (l < lo || l >= hi) out.insert(nm);
+        }
+        return out;
+    };
+    const std::set<std::string> skip0 = trim ? range_skip(0, split_at[0]) : skip;
     uint64_t pool_bytes = 0;
-    if (!strata::core::WeightTable::pool_bytes(o.pack, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+    if (!strata::core::WeightTable::pool_bytes(o.pack, pool_bytes, err, skip0.empty() ? nullptr : &skip0)) {
         std::fprintf(stderr, "strata generate: %s\n", err.c_str());
         return 1;
     }
@@ -2005,7 +2038,7 @@ int main(int argc, char** argv) {
         return 1;
     }
     strata::core::WeightTable wt;
-    if (!wt.load(o.pack, arena, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+    if (!wt.load(o.pack, arena, pool_bytes, err, skip0.empty() ? nullptr : &skip0)) {
         std::fprintf(stderr, "strata generate: %s\n", err.c_str());
         return 1;
     }
@@ -2015,7 +2048,7 @@ int main(int argc, char** argv) {
 
     strata::core::NativeDense native_dense;
     if (!o.native_dense_gguf.empty()) {
-        if (!native_dense.load(o.native_dense_gguf, wt, err, o.native_ple_key)) {
+        if (!native_dense.load(o.native_dense_gguf, wt, err, o.native_ple_key, 0, trim ? split_at[0] : -1)) {
             std::fprintf(stderr, "strata generate: native dense projections: %s\n", err.c_str());
             return 1;
         }
@@ -2304,19 +2337,27 @@ int main(int argc, char** argv) {
         }
         const strata::core::OnDevice on(st.dev);
         void* arena_s = nullptr;
-        if (cudaMalloc(&arena_s, pool_bytes) != cudaSuccess ||
-            !st.wt.load(o.pack, arena_s, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+        // --trim-stage-weights: this stage's layers only
+        const int64_t s_lo = trim ? split_at[i] : 0, s_hi = trim ? (i + 1 < split_at.size() ? split_at[i + 1] : g.n_layers) : -1;
+        const std::set<std::string> skip_s = trim ? range_skip(s_lo, s_hi) : skip;
+        uint64_t pool_s = pool_bytes;
+        if (trim && !strata::core::WeightTable::pool_bytes(o.pack, pool_s, err, &skip_s)) {
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: %s\n", st.dev, err.c_str());
+            return 1;
+        }
+        if (cudaMalloc(&arena_s, pool_s) != cudaSuccess ||
+            !st.wt.load(o.pack, arena_s, pool_s, err, skip_s.empty() ? nullptr : &skip_s)) {
             cudaGetLastError();
             size_t free_b = 0, total_b = 0;   // #486: what that card had free
             cudaMemGetInfo(&free_b, &total_b);
             std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s (%llu MiB needed, %llu MiB of %llu "
                                  "MiB free on that card)\n", st.dev,
                          err.empty() ? "the weight arena does not fit" : err.c_str(),
-                         (unsigned long long) (pool_bytes >> 20), (unsigned long long) (free_b >> 20),
+                         (unsigned long long) (pool_s >> 20), (unsigned long long) (free_b >> 20),
                          (unsigned long long) (total_b >> 20));
             return 1;
         }
-        if (!o.native_dense_gguf.empty() && !st.dense.load(o.native_dense_gguf, st.wt, err, o.native_ple_key)) {
+        if (!o.native_dense_gguf.empty() && !st.dense.load(o.native_dense_gguf, st.wt, err, o.native_ple_key, s_lo, s_hi)) {
             std::fprintf(stderr, "strata generate: layer split, CUDA%d native dense projections: %s\n", st.dev,
                          err.c_str());
             return 1;
@@ -2648,6 +2689,40 @@ int main(int argc, char** argv) {
                      last ? " and the head" : "", (double) fb / 1073741824.0);
     }
 
+    // --batch: every stage carves o.batch more sessions like its own (same layer range and context), one per
+    // slot of the batch windows.  Before the expert cache is sized, so `--expert-cache auto` leaves them room.
+    std::vector<std::vector<std::unique_ptr<strata::core::SessionState>>> bslot_ss;
+    if (o.batch > 0) {
+        if (!o.serve || o.batch < 2 || o.batch > strata::kernels::kVerifyMaxT) {
+            std::fprintf(stderr, "strata generate: --batch N needs --serve and 2 <= N <= %d\n", strata::kernels::kVerifyMaxT);
+            return 2;
+        }
+        bslot_ss.resize(1 + stages.size());
+        for (size_t k = 0; k < bslot_ss.size(); ++k) {
+            const int dev = k == 0 ? 0 : stages[k - 1]->dev;
+            const int64_t lo = k == 0 ? 0 : stages[k - 1]->lb;
+            const int64_t hi = k == 0 ? (multi_gpu ? split_at[0] : -1) : stages[k - 1]->le;
+            const strata::core::OnDevice on_k(dev);
+            const uint64_t bytes = strata::core::session_bytes(g, o.max_context, K, lo, hi);
+            for (int b = 0; b < o.batch; ++b) {
+                auto u = std::make_unique<strata::core::SessionState>();
+                void* buf = nullptr;
+                if (cudaMalloc(&buf, bytes) != cudaSuccess || strata::core::session_init(g, o.max_context, K, buf, *u, lo, hi) == 0) {
+                    std::fprintf(stderr, "strata generate: --batch: slot %d's session on CUDA%d does not fit (%.2f GiB each)\n",
+                                 b, dev, (double) bytes / 1073741824.0);
+                    return 1;
+                }
+                strata::core::session_zero(*u, g, nullptr, nullptr);
+                bslot_ss[k].push_back(std::move(u));
+            }
+            cudaDeviceSynchronize();
+            size_t fb = 0, tb = 0;
+            cudaMemGetInfo(&fb, &tb);
+            std::fprintf(stderr, "strata generate: --batch: %d slot sessions on CUDA%d (%.2f GiB each); %.2f GiB free\n",
+                         o.batch, dev, (double) bytes / 1073741824.0, (double) fb / 1073741824.0);
+        }
+    }
+
     // Secure MTP's CUDA0 allocations before the large host arena is registered with both CUDA contexts.
     // In particular WDDM can refuse the draft weights after mapping tens of GiB of host pages.
     strata::core::MtpDrafter mtp;
@@ -4495,7 +4570,7 @@ int main(int argc, char** argv) {
             for (int st = 1; st < n_stages; ++st) {
                 bool ok_s = false;
                 if (split_same) {
-                    ok_s = ver_same.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err);
+                    ok_s = ver_same.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, std::max(o.spec, o.batch), err);
                 } else {
                     GpuStage& gs = *stages[(size_t) st - 1];
                     const strata::core::OnDevice on(gs.dev);
@@ -4505,7 +4580,7 @@ int main(int argc, char** argv) {
                     vs.blob = thits.blob;
                     vs.slot_off = gs.cache.slot_offsets();
                     vs.n_slots = gs.cache.slots();
-                    ok_s = gs.ver.init(gs.wt, g, gs.ss, vs, gs.head.loaded() ? &gs.head : nullptr, o.spec, err);
+                    ok_s = gs.ver.init(gs.wt, g, gs.ss, vs, gs.head.loaded() ? &gs.head : nullptr, std::max(o.spec, o.batch), err);
                     split_drive.cache_base[st] = gs.cache.device_slot(0);
                     split_drive.cache_slot_off[st] = gs.cache.slot_offsets();
                     split_drive.pcie_num[st] = pcie_num_of(gs.pcie_frac);
@@ -4522,11 +4597,28 @@ int main(int argc, char** argv) {
                           " (CUDA" + std::to_string(split_same ? 0 : stages[(size_t) st - 1]->dev) + ")";
             std::fprintf(stderr, "strata serve: layer split: layers %s, one hand-off per window\n", plan_s.c_str());
         }
-        if (!ver.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err) ||
+        if (!ver.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, std::max(o.spec, o.batch), err) ||
             !mtp.bind(last_st ? last_st->wt : wt, last_st ? &last_st->head : &native_head, ver.final_R_all(), err)) {
             std::fprintf(stderr, "strata serve: %s\n", err.c_str());
             return 1;
         }
+        // each stage's verifier gets its stage's slot sessions
+        if (o.batch > 0) {
+            if (split_same) {
+                std::fprintf(stderr, "strata serve: --batch needs each stage on its own GPU\n");
+                return 1;
+            }
+            for (size_t k = 0; k < bslot_ss.size(); ++k) {
+                std::vector<strata::core::SessionState*> ptrs;
+                for (auto& u : bslot_ss[k]) ptrs.push_back(u.get());
+                strata::core::Verifier& vk = k == 0 ? ver : stages[k - 1]->ver;
+                const strata::core::OnDevice on_k(k == 0 ? 0 : stages[k - 1]->dev);
+                if (!vk.init_slots(ptrs, err)) {
+                    std::fprintf(stderr, "strata serve: --batch, stage %zu: %s\n", k + 1, err.c_str());
+                    return 1;
+                }
+            }
+        }
         for (int st = 0; st < n_stages && n_stages > 1; ++st) {
             split_drive.plan[st] = stage_ver(st).plan_sink();
             if (st > 0) {
@@ -5044,7 +5136,290 @@ int main(int argc, char** argv) {
         bool mrope_identity = true;
         std::vector<float> img_rows;
         std::vector<const float*> row_ptr;
-        while (next_line(line)) {
+        // ---- --batch: the slots of the batch windows
+        struct BSlot {
+            bool active = false, stop = false;
+            int32_t x = 0;                 ///< the token the next window feeds (not yet in the slot's state)
+            int64_t p = 0;                 ///< its position
+            int64_t produced = 0, max_new = 0;
+            Clock::time_point t0;
+        };
+        std::vector<BSlot> bs((size_t) std::max(o.batch, 0));
+        // timing of the batch windows since the slots were last all idle (one stderr line then)
+        double bt_run = 0, bt_commit = 0, bt_emit = 0;
+        double bt_wait0 = 0, bt_pool0 = 0;
+        int64_t bt_miss0 = 0, bt_hits0 = 0, bt_pcie0 = 0;
+        int64_t bt_windows = 0, bt_rows = 0, bt_tokens = 0;
+        Clock::time_point bt_start = Clock::now();
+        int admit_slot = -1;               ///< the slot the request being read will continue in (BGEN)
+        long long admit_max_new = 0;
+        auto batch_on = [&] { for (const BSlot& b : bs) if (b.active) return true; return false; };
+        auto try_next_line = [&](std::string& out) -> bool {
+            std::lock_guard<std::mutex> lk(in_mu);
+            if (in_lines.empty()) return false;
+            out = std::move(in_lines.front());
+            in_lines.pop_front();
+            return true;
+        };
+        // the session a request just left behind (its prompt) -> slot b's sessions, on every stage
+        auto copy_to_slot = [&](int b, const std::vector<int32_t>& ids, std::string& e) -> bool {
+            const int64_t upto = (int64_t) ids.size();
+            for (size_t k = 0; k < bslot_ss.size(); ++k) {
+                strata::core::SessionState& from = k == 0 ? ss : stages[k - 1]->ss;
+                strata::core::SessionState& to = *bslot_ss[k][(size_t) b];
+                const strata::core::OnDevice on_k(k == 0 ? 0 : stages[k - 1]->dev);
+                if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch admission: device sync failed"; return false; }
+                strata::core::ConversationCheckpoint ck;
+                ck.ids = ids;
+                if (!strata::core::conversation_checkpoint_save(ck, from, g, e) ||
+                    !strata::core::conversation_checkpoint_restore(ck, to, g, e))
+                    return false;
+                for (int64_t j = 0; j < from.qsa_alloc; ++j) {
+                    strata::core::ConversationKv img;
+                    if (!strata::core::conversation_kv_save(img, from.qsa_states[from.qsa_ord0 + j], g, upto, true, e))
+                        return false;
+                    if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch admission: device sync failed"; return false; }
+                    if (!strata::core::conversation_kv_restore(img, to.qsa_states[to.qsa_ord0 + j], g, upto, true, e))
+                        return false;
+                }
+                if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch admission: device sync failed"; return false; }
+            }
+            return true;
+        };
+        // one batch window over slots [0, highest active], inactive slots below it fed a pad token at position 0
+        auto batch_step = [&]() -> bool {
+            int S = 0;
+            for (int b = 0; b < (int) bs.size(); ++b) if (bs[(size_t) b].active) S = b + 1;
+            if (S == 0) return true;
+            int32_t tok[strata::kernels::kVerifyMaxT] = {}, outb[strata::kernels::kVerifyMaxT] = {};
+            int64_t pos[strata::kernels::kVerifyMaxT] = {};
+            for (int b = 0; b < S; ++b)
+                if (bs[(size_t) b].active) { tok[b] = bs[(size_t) b].x; pos[b] = bs[(size_t) b].p; }
+            strata::core::progress().busy.store(true);
+            drive.d.layers = 0;
+            drive.d.experts = 0;
+            drive.d.failed = false;
+            apply_pending(false);
+            if (bt_windows == 0) {
+                bt_start = Clock::now();
+                bt_wait0 = ver.ms_wait; bt_pool0 = ver.ms_pool;
+                bt_miss0 = drive.d.multi_misses; bt_hits0 = drive.d.cache_hits; bt_pcie0 = drive.d.pcie_experts;
+            }
+            const Clock::time_point w0 = Clock::now();
+            if (!ver.run_slots(S, tok, pos, win_pool_fn, win_pool_user, outb, err) || drive.d.failed) {
+                std::printf("ERR %s\n", drive.d.failed && drive.d.fail ? drive.d.fail : err.c_str());
+                return false;
+            }
+            const Clock::time_point w1 = Clock::now();
+            if (!ver.commit_slots(err)) {
+                std::printf("ERR %s\n", err.c_str());
+                return false;
+            }
+            const Clock::time_point w2 = Clock::now();
+            auto msd = [](Clock::time_point a0, Clock::time_point b0) { return std::chrono::duration<double, std::milli>(b0 - a0).count(); };
+            bt_run += msd(w0, w1);
+            bt_commit += msd(w1, w2);
+            ++bt_windows;
+            bt_rows += S;
+            for (int b = 0; b < S; ++b) {
+                BSlot& sl = bs[(size_t) b];
+                if (!sl.active) continue;
+                const int32_t y = outb[b];
+                std::printf("BT %d %d\n", b, (int) y);
+                ++sl.produced;
+                const bool eos = std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) y) != o.eos_ids.end();
+                const char* fin = eos ? "stop" : sl.stop ? "cancel" : sl.produced >= sl.max_new ? "length"
+                                : sl.p + 2 > o.max_context ? "length" : nullptr;
+                if (fin != nullptr) {
+                    const double ms = std::chrono::duration<double, std::milli>(Clock::now() - sl.t0).count();
+                    std::printf("BDONE %d %lld %s %.1f\n", b, (long long) sl.produced, fin, ms);
+                    sl.active = false;
+                } else {
+                    sl.x = y;
+                    sl.p += 1;
+                }
+            }
+            std::fflush(stdout);
+            bt_emit += msd(w2, Clock::now());
+            strata::core::progress().busy.store(false);
+            if (!batch_on() && bt_windows > 0) {
+                const double w = (double) bt_windows, wall = msd(bt_start, Clock::now());
+                const double L = (double) g.n_layers;
+                std::fprintf(stderr, "strata batch: %lld windows, avg %.2f rows, %.2f ms/window = run %.2f (CUDA0 GPU-reach "
+                                     "wait %.2f + CPU experts %.2f) + commit %.2f + emit %.2f; per layer-window: CPU experts "
+                                     "%.2f, VRAM hits %.2f, PCIe %.2f; %.1f rows/s over %.0f ms of wall time (admissions "
+                                     "included)\n",
+                             (long long) bt_windows, bt_rows / w, (bt_run + bt_commit + bt_emit) / w, bt_run / w,
+                             (ver.ms_wait - bt_wait0) / w, (ver.ms_pool - bt_pool0) / w, bt_commit / w, bt_emit / w,
+                             (drive.d.multi_misses - bt_miss0) / (w * L), (drive.d.cache_hits - bt_hits0) / (w * L),
+                             (drive.d.pcie_experts - bt_pcie0) / (w * L), 1000.0 * bt_rows / std::max(wall, 1e-9), wall);
+                for (size_t k = 0; k <= stages.size(); ++k) {
+                    const std::string pr = (k == 0 ? ver : stages[k - 1]->ver).profile_report();
+                    if (!pr.empty()) std::fprintf(stderr, "strata batch GPU stages, stage %zu (ms/window):%s\n", k + 1, pr.c_str());
+                }
+                bt_run = bt_commit = bt_emit = 0;
+                bt_windows = bt_rows = bt_tokens = 0;
+            }
+            return true;
+        };
+        // ---- --batch-groups: the slot groups pipelined through the stages (--batch-groups G > 1 with a layer split)
+        const int n_pipe = (int) stages.size() + 1;
+        const bool piped = o.batch > 0 && o.batch_groups > 1 && n_pipe > 1;
+        if (o.batch > 0 && o.batch_groups > 1 && (o.batch % o.batch_groups != 0 || !piped)) {
+            std::fprintf(stderr, "strata serve: --batch-groups needs a layer split and to divide --batch\n");
+            return 1;
+        }
+        const int GS = piped ? o.batch / o.batch_groups : o.batch;
+        struct PGroup {
+            bool inflight = false;
+            int stage = 0;                  ///< the stage it runs on or waits for
+            int32_t tok[strata::kernels::kVerifyMaxT] = {};
+            int64_t pos[strata::kernels::kVerifyMaxT] = {};
+            int64_t since = 0;              ///< tick it started waiting (fairness)
+        };
+        std::vector<PGroup> pg((size_t) (piped ? o.batch_groups : 0));
+        std::vector<int> stage_group((size_t) n_pipe, -1);
+        int64_t pipe_tick = 0, rr = 0;
+        auto stage_verifier = [&](int k) -> strata::core::Verifier& { return k == 0 ? ver : stages[(size_t) k - 1]->ver; };
+        auto pipe_inflight = [&] { for (const PGroup& x : pg) if (x.inflight) return true; return false; };
+        auto group_active = [&](int gi) {
+            for (int t = 0; t < GS; ++t) if (bs[(size_t) (gi * GS + t)].active) return true;
+            return false;
+        };
+        // one turn: serve every running stage, hand finished groups on, start what can start
+        auto pump = [&](bool may_start) -> bool {
+            ++pipe_tick;
+            if (bt_windows == 0 && !pipe_inflight()) {
+                bt_start = Clock::now();
+                bt_wait0 = ver.ms_wait; bt_pool0 = ver.ms_pool;
+                bt_miss0 = drive.d.multi_misses; bt_hits0 = drive.d.cache_hits; bt_pcie0 = drive.d.pcie_experts;
+            }
+            for (int k = 0; k < n_pipe; ++k) {
+                const int gi = stage_group[(size_t) k];
+                if (gi < 0) continue;
+                strata::core::Verifier& vk = stage_verifier(k);
+                const int r = vk.batch_poll(win_pool_fn, win_pool_user, err);
+                if (r < 0) { std::printf("ERR %s\n", err.c_str()); return false; }
+                if (r == 0) continue;
+                stage_group[(size_t) k] = -1;
+                PGroup& G = pg[(size_t) gi];
+                if (k + 1 < n_pipe) { G.stage = k + 1; G.since = pipe_tick; continue; }
+                // the last stage: the group's picks
+                const int32_t* outb = vk.batch_out();
+                for (int t = 0; t < GS; ++t) {
+                    BSlot& sl = bs[(size_t) (gi * GS + t)];
+                    if (!sl.active) continue;
+                    const int32_t y = outb[t];
+                    std::printf("BT %d %d\n", gi * GS + t, (int) y);
+                    ++sl.produced;
+                    ++bt_rows;
+                    const bool eos = std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) y) != o.eos_ids.end();
+                    const char* fin = eos ? "stop" : sl.stop ? "cancel" : sl.produced >= sl.max_new ? "length"
+                                    : sl.p + 2 > o.max_context ? "length" : nullptr;
+                    if (fin != nullptr) {
+                        const double ms = std::chrono::duration<double, std::milli>(Clock::now() - sl.t0).count();
+                        std::printf("BDONE %d %lld %s %.1f\n", gi * GS + t, (long long) sl.produced, fin, ms);
+                        sl.active = false;
+                    } else {
+                        sl.x = y;
+                        sl.p += 1;
+                    }
+                }
+                std::fflush(stdout);
+                ++bt_windows;
+                G.inflight = false;
+            }
+            // start waiting groups on free stages, the longest waiting first; a new step on stage 0 round-robin
+            for (int k = n_pipe - 1; k >= 0; --k) {
+                if (stage_group[(size_t) k] >= 0) continue;
+                int pick = -1;
+                if (k > 0) {
+                    for (int gi = 0; gi < (int) pg.size(); ++gi)
+                        if (pg[(size_t) gi].inflight && pg[(size_t) gi].stage == k &&
+                            (pick < 0 || pg[(size_t) gi].since < pg[(size_t) pick].since))
+                            pick = gi;
+                    if (pick < 0) continue;
+                } else {
+                    if (!may_start) continue;
+                    for (int j = 0; j < (int) pg.size() && pick < 0; ++j) {
+                        const int gi = (int) ((rr + j) % (int64_t) pg.size());
+                        if (!pg[(size_t) gi].inflight && group_active(gi)) pick = gi;
+                    }
+                    if (pick < 0) continue;
+                    rr = pick + 1;
+                    PGroup& G = pg[(size_t) pick];
+                    for (int t = 0; t < GS; ++t) {
+                        const BSlot& sl = bs[(size_t) (pick * GS + t)];
+                        G.tok[t] = sl.active ? sl.x : 0;
+                        G.pos[t] = sl.active ? sl.p : 0;
+                    }
+                    G.inflight = true;
+                    G.stage = 0;
+                    drive.d.failed = false;
+                    apply_pending(false);
+                }
+                PGroup& G = pg[(size_t) pick];
+                strata::core::progress().busy.store(true);
+                if (!stage_verifier(k).batch_launch(pick * GS, GS, G.tok, G.pos, err)) {
+                    std::printf("ERR %s\n", err.c_str());
+                    return false;
+                }
+                stage_group[(size_t) k] = pick;
+            }
+            if (drive.d.failed) { std::printf("ERR %s\n", drive.d.fail ? drive.d.fail : "the expert pool failed"); return false; }
+            if (!pipe_inflight() && !batch_on() && bt_windows > 0) {   // all idle: the timing line, as batch_step
+                const double w = (double) bt_windows, wall = std::chrono::duration<double, std::milli>(Clock::now() - bt_start).count();
+                std::fprintf(stderr, "strata batch (pipelined, %d groups of %d): %lld group-steps, %lld rows in %.0f ms = "
+                                     "%.1f rows/s (admissions included)\n", o.batch_groups, GS, (long long) bt_windows,
+                             (long long) bt_rows, wall, 1000.0 * bt_rows / std::max(wall, 1e-9));
+                for (int k = 0; k < n_pipe; ++k) {
+                    const std::string pr = stage_verifier(k).profile_report();
+                    if (!pr.empty()) std::fprintf(stderr, "strata batch GPU stages, stage %d (ms/window):%s\n", k + 1, pr.c_str());
+                }
+                bt_windows = bt_rows = 0;
+                strata::core::progress().busy.store(false);
+            }
+            return true;
+        };
+        auto pipe_drain = [&]() -> bool {
+            while (pipe_inflight())
+                if (!pump(false)) return false;
+            return true;
+        };
+        for (;;) {
+            if (batch_on() || (piped && pipe_inflight())) {
+                if (!try_next_line(line)) {
+                    if (!(piped ? pump(true) : batch_step())) return 1;
+                    continue;
+                }
+                // a request reads its prompt through every stage: the groups in flight finish first
+                if (piped && line.rfind("BSTOP ", 0) != 0 && !pipe_drain()) return 1;
+            } else if (!next_line(line)) {
+                break;
+            }
+            // --batch: BSTOP <slot> ends that slot at its next batch window; BGEN <slot> <max_new> ... reads the
+            // request's prompt and first token as a GEN 1, then continues it in that slot
+            if (line.rfind("BSTOP ", 0) == 0) {
+                const int b = std::atoi(line.c_str() + 6);
+                if (b >= 0 && b < (int) bs.size()) bs[(size_t) b].stop = true;
+                continue;
+            }
+            admit_slot = -1;
+            if (line.rfind("BGEN ", 0) == 0 || line.rfind("BGENI ", 0) == 0) {
+                const bool bimg = line.rfind("BGENI ", 0) == 0;
+                char* e1 = nullptr;
+                const long b = std::strtol(line.c_str() + (bimg ? 6 : 5), &e1, 10);
+                char* e2 = nullptr;
+                const long long mn = std::strtoll(e1, &e2, 10);
+                if (bs.empty() || b < 0 || b >= (long) bs.size() || bs[(size_t) b].active || mn < 1 || e2 == e1) {
+                    std::printf("ERR BGEN: no such free slot (--batch %d) or a bad max_new\n", o.batch);
+                    std::fflush(stdout);
+                    continue;
+                }
+                admit_slot = (int) b;
+                admit_max_new = mn;
+                line = std::string(bimg ? "GENI 1" : "GEN 1") + e2;
+            }
             // #477: every --expert-profile-save-every minutes, before the next request (at QUIT: after the loop)
             if (!heat.empty() && line != "QUIT" && o.expert_profile_save_min > 0 &&
                 Clock::now() - profile_saved_at >= std::chrono::duration<double>(o.expert_profile_save_min * 60.0))
@@ -5958,6 +6333,27 @@ int main(int argc, char** argv) {
                         (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
                         (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n);
             std::fflush(stdout);
+            if (admit_slot >= 0) {   // --batch: BADM <slot> <1 = continues in the batch windows | 0 = done>
+                bool cont = !cancelled && produced_n == 1 && admit_max_new > 1 && std::strcmp(finish, "length") == 0;
+                if (cont && !copy_to_slot(admit_slot, live, err)) {
+                    std::fprintf(stderr, "strata serve: batch admission failed: %s\n", err.c_str());
+                    cont = false;
+                }
+                if (cont) {
+                    ver.set_slot_sampling(admit_slot, req_sp);   // the request's own sampling, row by row
+                    BSlot& sl = bs[(size_t) admit_slot];
+                    sl = BSlot{};
+                    sl.active = true;
+                    sl.x = x;
+                    sl.p = p;
+                    sl.produced = 1;
+                    sl.max_new = admit_max_new;
+                    sl.t0 = Clock::now();
+                }
+                std::printf("BADM %d %d\n", admit_slot, cont ? 1 : 0);
+                std::fflush(stdout);
+                admit_slot = -1;
+            }
             if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
             // "12288 of 98179" when cancelled mid-read (#471), the rate from what was read
             char read_txt[64];
diff --git a/tools/batch_test.py b/tools/batch_test.py
new file mode 100644
index 00000000000..b8d51295fb7
--- /dev/null
+++ b/tools/batch_test.py
@@ -0,0 +1,153 @@
+#!/usr/bin/env python3
+"""Batching test: the same prompts decoded alone (GEN, the usual path with drafts) and together in the batch
+windows (BGEN), greedy.  Every slot's tokens must equal its solo tokens; prints the aggregate decode rate.
+
+  python3 tools/batch_test.py --exe engine/strata --config strata-<model>.json --batch 4 --n 4 \
+      --extra "--layer-split 12,24,36 --trim-stage-weights --pcie-frac 0 --adapt-every 1000000"
+"""
+import argparse, json, os, subprocess, sys, threading, time
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+import strata_tokenizer as ST  # noqa: E402
+
+QUESTIONS = [
+    "Explique en detail le fonctionnement d'un B-tree.",
+    "Write a Python function that merges overlapping intervals, then explain it.",
+    "Compare TCP and QUIC: handshake, congestion control, multiplexing.",
+    "Raconte l'histoire du calcul de pi, d'Archimede a nos jours.",
+    "What are the main causes of the French Revolution?",
+    "Explain how a transformer's attention works, step by step.",
+    "Donne une recette de tarte aux pommes, etape par etape.",
+    "Describe the life cycle of a star like the Sun.",
+]
+
+
+def tokenizer(path):
+    t = Path(path)
+    vocab = json.loads((t / "vocab.json").read_text(encoding="utf-8"))
+    tokens = [None] * len(vocab)
+    for s, i in vocab.items():
+        tokens[i] = s
+    merges = (t / "merges.txt").read_text(encoding="utf-8").split("\n")
+    types = json.loads((t / "token_type.json").read_text())
+    return ST.Tokenizer(tokens, merges, types)
+
+
+class Engine:
+    def __init__(self, exe, cfg, batch, extra_env, extra_args):
+        args = list(cfg["args"])
+        if len(cfg.get("gpu") or []) > 1:
+            args += ["--layer-split", str(cfg.get("layer_split") or "auto")]
+        if batch:
+            args += ["--batch", str(batch)]
+        args += extra_args
+        env = dict(os.environ, **extra_env)
+        env["LD_LIBRARY_PATH"] = ":".join(cfg.get("lib_dirs", []) + [env.get("LD_LIBRARY_PATH", "")])
+        self.log = open("/tmp/batch_test_engine.log", "w")
+        self.p = subprocess.Popen([exe, "--serve", *args], cwd=cfg.get("cwd"), stdin=subprocess.PIPE,
+                                  stdout=subprocess.PIPE, stderr=self.log, text=True, bufsize=1, env=env)
+        for line in self.p.stdout:
+            if line.startswith("READY"):
+                return
+        raise SystemExit("the engine ended before READY - see /tmp/batch_test_engine.log")
+
+    def send(self, line):
+        self.p.stdin.write(line + "\n")
+        self.p.stdin.flush()
+
+    def lines(self):
+        for line in self.p.stdout:
+            yield line.rstrip("\n")
+
+
+def main():
+    ap = argparse.ArgumentParser()
+    ap.add_argument("--exe", required=True)
+    ap.add_argument("--config", required=True)
+    ap.add_argument("--batch", type=int, default=4)
+    ap.add_argument("--n", type=int, default=4, help="prompts (<= --batch)")
+    ap.add_argument("--max-new", type=int, default=64)
+    ap.add_argument("--skip-solo", action="store_true")
+    ap.add_argument("--extra", default="", help='more engine arguments in one string, e.g. "--adapt-every 1000000"')
+    a = ap.parse_args()
+    cfg = json.loads(Path(a.config).read_text())
+    tok = tokenizer(cfg["tokenizer"])
+    prompts = []
+    for q in QUESTIONS[: a.n]:
+        text = f"<|im_start|>user\n{q}<|im_end|>\n<|im_start|>assistant\n<think>\n\n</think>\n\n"
+        prompts.append(tok.encode(text, parse_special=True))
+    eng = Engine(a.exe, cfg, a.batch, {"STRATA_IQ_MT_MIN": "1", "STRATA_DECODE_TIMING": "1", **({"STRATA_VERIFY_PROFILE": "1"} if os.environ.get("PROF") else {})}, a.extra.split())
+    out = eng.lines()
+
+    solo = []
+    if not a.skip_solo:
+        for i, ids in enumerate(prompts):
+            eng.send(f"GEN {a.max_new} " + ",".join(map(str, ids)))
+            got, t0 = [], time.time()
+            for line in out:
+                if line.startswith("T "):
+                    got.append(int(line.split()[1]))
+                elif line.startswith("DONE") or line.startswith("ERR"):
+                    print(f"solo {i}: {len(got)} tokens in {time.time() - t0:.1f}s  {line[:60]}", flush=True)
+                    break
+            solo.append(got)
+
+    # batch: admit every prompt, then the slots decode together
+    got = {i: [] for i in range(len(prompts))}
+    done = {}
+    t_admit = time.time()
+    first_bt = None
+    for i, ids in enumerate(prompts):
+        eng.send(f"BGEN {i} {a.max_new} " + ",".join(map(str, ids)))
+        for line in out:
+            if line.startswith("T "):
+                got[i].append(int(line.split()[1]))
+            elif line.startswith("BT "):
+                _, s, y = line.split()
+                got[int(s)].append(int(y))
+                first_bt = first_bt or time.time()
+            elif line.startswith("BDONE "):
+                done[int(line.split()[1])] = line
+            elif line.startswith("ERR"):
+                print("batch:", line)
+                return 1
+            elif line.startswith("BADM "):
+                if line.split()[2] == "0":
+                    done[i] = line
+                break
+    t_admitted = time.time()
+    for line in out:
+        if line.startswith("BT "):
+            _, s, y = line.split()
+            got[int(s)].append(int(y))
+            first_bt = first_bt or time.time()
+        elif line.startswith("BDONE "):
+            done[int(line.split()[1])] = line
+            if len(done) == len(prompts):
+                break
+        elif line.startswith("ERR"):
+            print("batch:", line)
+            return 1
+    t_end = time.time()
+    total = sum(len(v) for v in got.values())
+    print(f"batch: {len(prompts)} slots, {total} tokens; admissions {t_admitted - t_admit:.1f}s; "
+          f"then {t_end - t_admitted:.1f}s -> aggregate {total / max(t_end - t_admit, 1e-9):.1f} tok/s overall, "
+          f"{sum(len(v) for v in got.values()) / max(t_end - (first_bt or t_admit), 1e-9):.1f} tok/s from the first batch token",
+          flush=True)
+    ok = True
+    for i in range(len(prompts)):
+        b = got[i]
+        if solo:
+            same = b == solo[i]
+            ok &= same
+            first_diff = next((k for k in range(min(len(b), len(solo[i]))) if b[k] != solo[i][k]), None)
+            print(f"slot {i}: {len(b)} tokens, solo {len(solo[i])}: {'IDENTICAL' if same else f'DIFFERS at {first_diff}'}")
+        print("   ", repr(tok.decode(b)[:160]))
+    eng.send("QUIT")
+    eng.p.wait(timeout=180)   # the next run needs the GPUs back
+    return 0 if ok else 2
+
+
+if __name__ == "__main__":
+    sys.exit(main())

From c67052c7792e7a4bcdf6501b92e7f35f1f4903f1 Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 08:04:17 +0200
Subject: [PATCH 062/201] server: a client that stops reading early keeps the
 engine in step

With --batch, a consumer that left mid-answer (a client disconnect, a tool call or a stop string ending the
response) left the engine writing the abandoned answer's tokens, and the next request read them as its own:
it answered the previous question again. Now the solo request is STOPped and read to its DONE, an admission
to its BADM, and a slot is BSTOPped and freed only at its BDONE. STRATA_BATCH_TRACE=1 logs the control lines.
tools/early_close_test.py reproduces it (solo and with a second request running).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 serve/server.py           | 93 ++++++++++++++++++++++++++++++++++-----
 tools/early_close_test.py | 47 ++++++++++++++++++++
 2 files changed, 129 insertions(+), 11 deletions(-)
 create mode 100644 tools/early_close_test.py

diff --git a/serve/server.py b/serve/server.py
index 905471aae53..aadac13766a 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -293,6 +293,14 @@ def say(key, text):
             print(f"[strata] still starting ({time.time() - t0:.0f} s) - please wait ...", flush=True)
 
 
+_BTRACE = bool(os.environ.get("STRATA_BATCH_TRACE"))
+
+
+def btrace(*a):
+    if _BTRACE:
+        print("[batch-trace]", threading.get_ident() % 10000, *a, file=sys.stderr, flush=True)
+
+
 EOS_IDS = {248044, 248046}   # <|endoftext|>, <|im_end|>: the engine's default --eos-ids
 
 
@@ -525,6 +533,7 @@ def projection_key(sampling: dict) -> str:
         return f" cvec={int(on)}" if isinstance(on, bool) else ""
 
     def _send(self, text: str):
+        btrace("send>", text[:60])
         try:
             with self.wlock:
                 self.proc.stdin.write(text + "\n")
@@ -548,6 +557,8 @@ def _control(self, cancel, on_token, stop_when=None):
                 continue
             if line is None:
                 raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
+            if not line.startswith(("PP ", "INFO")):
+                btrace("ctl<", self._ctl_mode, line.strip()[:60])
             if line.startswith("T "):
                 on_token(int(line[2:]))
                 if not stopped and (cancel.is_set() or (stop_when is not None and stop_when())):
@@ -573,12 +584,50 @@ def _control(self, cancel, on_token, stop_when=None):
                 self._ctl_result = ("done", None)
                 return
 
+    def _drain_control(self, until: str, timeout: float = 300.0):
+        """After a consumer left early: read the control lines up to the next `until` line (DONE or BADM) so the next
+        request does not read this one's leftovers.  Returns that line (None: the engine ended or never answered)."""
+        end = time.monotonic() + timeout
+        while time.monotonic() < end:
+            try:
+                line = self.lines.get(timeout=max(0.1, end - time.monotonic()))
+            except queue.Empty:
+                break
+            if line is None:
+                return None
+            if line.startswith("DONE"):
+                self._parse_done(line)
+            if line.startswith(until) or line.startswith("ERR"):
+                return line
+        return None
+
+    def _release_slot_when_done(self, slot: int):
+        """A slot whose consumer left: BSTOP it and free it once the engine says BDONE (in the background)."""
+        try:
+            self._send(f"BSTOP {slot}")
+        except EngineDied:
+            pass
+        def wait():
+            end = time.monotonic() + 600.0
+            while time.monotonic() < end:
+                try:
+                    line = self.slot_q[slot].get(timeout=5.0)
+                except queue.Empty:
+                    continue
+                if line is None or line.startswith("BDONE "):
+                    break
+            with self.slot_cv:
+                self.slot_busy[slot] = False
+                self.slot_cv.notify_all()
+        threading.Thread(target=wait, daemon=True).start()
+
     def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
         """--batch.  Alone (no slot busy, nobody waiting): the solo path (GEN, with drafts: the fastest stream)
         - and when another request arrives meanwhile, this one is STOPped and continues in a batch slot (BGEN with
         its prompt + what it generated: the engine reuses that prefix).  Otherwise: BGEN into a free slot, then the
         slot's own BT lines until BDONE.  Several requests run at once; the control lines (prompt reading, admission)
-        are taken one request at a time."""
+        are taken one request at a time.  A consumer that stops early leaves the engine in step: the solo request is
+        STOPped and read to its DONE, an admission to its BADM, a slot is BSTOPped and freed at its BDONE."""
         self.progress = None
         keys = self.sampling_keys(sampling or {})
         out: list[int] = []
@@ -594,7 +643,10 @@ def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
             with self.slot_cv:
                 self.waiting -= 1
         holding = True
+        btrace("ctl acquired")
         slot = None
+        phase = "none"            # solo -> (admit -> slot) ; "done" once the engine has finished with this request
+        stop_sent = False
         try:
             with self.slot_cv:
                 alone = not any(self.slot_busy) and self.waiting == 0
@@ -602,6 +654,7 @@ def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
             if alone and left > 1:
                 head = f"GENI {left}{keys} {embeddings}" if embeddings else f"GEN {left}{keys}"
                 self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+                phase = "solo"
                 self._ctl_mode, self._ctl_result = "solo", None
                 def others():
                     with self.slot_cv:
@@ -613,6 +666,7 @@ def others():
                         yield t
                     if x is None:                       # a heartbeat (False: a token, flushed above)
                         yield None
+                phase = "none"                          # its DONE is read
                 while pending:
                     t = pending.pop(0)
                     out.append(t)
@@ -622,7 +676,6 @@ def others():
                 if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
                     return
                 prompt = list(ids) + out                # promoted: it continues in a batch slot from here
-                embeddings = embeddings                 # (an image prompt keeps its embeddings file)
             # a free slot (they free themselves at BDONE, which needs no control lines)
             with self.slot_cv:
                 while True:
@@ -637,50 +690,68 @@ def others():
                 self.slot_q[slot].get_nowait()
             head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
             self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+            phase = "admit"
             self._ctl_mode, self._ctl_result = "batch", None
             for x in self._control(cancel, pending.append):
                 while pending:
                     yield pending.pop(0)
                 if x is None:
                     yield None
+            cont = bool(self._ctl_result and self._ctl_result[1])
+            phase = "slot" if cont else "none"
             while pending:
                 yield pending.pop(0)
-            cont = bool(self._ctl_result and self._ctl_result[1])
             self.ctl.release()
             holding = False
             if not cont:
                 return
-            stopped = False
             while True:
                 try:
                     line = self.slot_q[slot].get(timeout=10.0)
                 except queue.Empty:
-                    if cancel.is_set() and not stopped:
+                    if cancel.is_set() and not stop_sent:
                         self._send(f"BSTOP {slot}")
-                        stopped = True
+                        stop_sent = True
                     yield None
                     continue
                 if line is None:
+                    phase = "none"
                     raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
                 if line.startswith("BT "):
                     if cancel.is_set():
-                        if not stopped:
+                        if not stop_sent:
                             self._send(f"BSTOP {slot}")
-                            stopped = True
+                            stop_sent = True
                         continue
                     yield int(line.split()[2])
                 elif line.startswith("BDONE "):
+                    phase = "none"
                     f = line.split()
                     if len(f) >= 5 and isinstance(self.last, dict):
                         self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4])}
                     return
         finally:
+            # a consumer that left early (or an error): keep the engine and this server in step
+            btrace("finally phase", phase, "slot", slot, "holding", holding)
+            try:
+                if phase == "solo":
+                    self._send("STOP")
+                    self._drain_control("DONE")
+                elif phase == "admit":
+                    line = self._drain_control("BADM")
+                    if line and line.startswith("BADM ") and line.split()[2:3] == ["1"]:
+                        phase = "slot"
+            except EngineDied:
+                pass
             if holding:
                 self.ctl.release()
             if slot is not None:
-                with self.slot_cv:
-                    self.slot_busy[slot] = False
-                    self.slot_cv.notify_all()
+                if phase == "slot":
+                    self._release_slot_when_done(slot)    # freed at its BDONE
+                else:
+                    with self.slot_cv:
+                        self.slot_busy[slot] = False
+                        self.slot_cv.notify_all()
 
     def generate(self, ids, max_new, sampling, cancel, embeddings=None):
         """Yields token ids, and None as a heartbeat every 10 s while the engine is quiet (reading a long prompt):
diff --git a/tools/early_close_test.py b/tools/early_close_test.py
new file mode 100644
index 00000000000..ea3b77a7483
--- /dev/null
+++ b/tools/early_close_test.py
@@ -0,0 +1,47 @@
+#!/usr/bin/env python3
+"""A client that stops reading a streamed answer early must not leave its tokens to the next request.
+
+  STRATA_KEY=... python3 tools/early_close_test.py http://127.0.0.1:8090
+"""
+import json, os, sys, threading, urllib.request
+
+URL = sys.argv[1].rstrip("/") + "/v1/chat/completions"
+KEY = os.environ.get("STRATA_KEY", "")
+
+
+def req(content, stream, max_tokens=300):
+    body = json.dumps({"model": "m", "max_tokens": max_tokens, "temperature": 0, "stream": stream,
+                       "messages": [{"role": "user", "content": content}],
+                       "chat_template_kwargs": {"enable_thinking": False}}).encode()
+    return urllib.request.Request(URL, data=body, headers={"Content-Type": "application/json",
+                                                           "Authorization": f"Bearer {KEY}"})
+
+
+def early_close(content, keep_lines=5):
+    r = urllib.request.urlopen(req(content, True), timeout=600)
+    for _ in range(keep_lines):
+        r.readline()
+    r.close()                                   # the client goes away mid-answer
+
+
+def answer(content):
+    with urllib.request.urlopen(req(content, False, 60), timeout=600) as r:
+        m = json.load(r)["choices"][0]["message"]
+        return (m.get("content") or "") + " " + (m.get("reasoning_content") or m.get("reasoning") or "")
+
+
+ok = True
+# alone (solo path), then the same with a second request running (batch slots)
+for label, background in (("solo", False), ("batch", True)):
+    bg = None
+    if background:
+        bg = threading.Thread(target=answer, args=("Count slowly from 1 to 60, one number per line.",))
+        bg.start()
+    early_close("Describe the weather in Montpellier in great detail, at length.")
+    a = answer("Reply with exactly one word: the color of the sky on a clear day.")
+    good = "blue" in a.lower() and "montpellier" not in a.lower()
+    ok &= good
+    print(f"{label}: {'OK' if good else 'STALE'} -> {a[:120]!r}", flush=True)
+    if bg:
+        bg.join()
+sys.exit(0 if ok else 1)

From e11166bdab266523e64b09d66789d7fcf5c48747 Mon Sep 17 00:00:00 2001
From: crazyaimachine <crazyaimachine@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:49:43 +0200
Subject: [PATCH 063/201] Conversation parking with --layer-split

park_current snapshotted stage 0 only, so a split rejected parking. A parked conversation now holds one image per
later stage (SavedConversation::stage_images, captured from each stage's session on its own GPU); a split
checkpoint is cut into its stage-0 part and its stage parts while parking and put back together on restore; every
stage image is validated before anything is overwritten; the guard is removed.

Patch posted on #559 by crazyaimachine (written by their coding agent), tested on 2 GPUs there and on a 4-GPU
split here.

Co-authored-by: benoit lange <benoit@lange.xyz>
---
 include/strata/core/conversation_cache.hpp |  3 +
 src/program/generate.cpp                   | 84 ++++++++++++++++++++--
 2 files changed, 82 insertions(+), 5 deletions(-)

diff --git a/include/strata/core/conversation_cache.hpp b/include/strata/core/conversation_cache.hpp
index 0a190c709e0..9ad7e36d60e 100644
--- a/include/strata/core/conversation_cache.hpp
+++ b/include/strata/core/conversation_cache.hpp
@@ -69,10 +69,13 @@ struct SavedConversation {
     std::vector<ConversationCheckpoint> checkpoints;
     std::vector<ConversationKv> kv; // main layers followed by the draft layer
     bool cvec = true;
+    // with a layer split, the later stages' own images, one per stage, in stage order
+    std::vector<SavedConversation> stage_images;
 
     size_t bytes() const {
         size_t n = live.bytes() + checkpoints.capacity() * sizeof(ConversationCheckpoint) +
                    kv.capacity() * sizeof(ConversationKv);
+        for (const auto& s : stage_images) n += s.bytes();
         for (const auto& c : checkpoints) n += c.bytes();
         for (const auto& k : kv) n += k.bytes();
         return n;
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 23daeb7e955..295f196dc86 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1363,10 +1363,7 @@ int main(int argc, char** argv) {
     if (o.serve && o.conversation_cache_mib > 0 && (o.prompt_cache == 0 || o.conversation_cache_slots == 0))
         std::fprintf(stderr, "strata serve: warning: conversation caching is disabled by %s\n",
                      o.prompt_cache == 0 ? "--prompt-cache 0" : "--conversation-cache-slots 0");
-    if (o.conversation_cache_mib > 0 && o.conversation_cache_slots > 0 && o.prompt_cache > 0 && !o.layer_split.empty()) {
-        std::fprintf(stderr, "strata serve: conversation parking does not yet support --layer-split; disable parking with --conversation-cache-mib 0\n");
-        return 2;
-    }
+    // parking with --layer-split saves every stage (SavedConversation::stage_images)
     // Layer split (multi-GPU): the later stages run layers [K_i, K_i+1) on their own GPUs (--split-device, default
     // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  Across
     // GPUs, not yet: KV streaming, images, control vectors, the helper caches (--expert-cache-remote), and lending
@@ -4657,7 +4654,39 @@ int main(int argc, char** argv) {
         // addresses change: all parked images live in ordinary host vectors.
         auto park_current = [&](size_t held) -> bool {
             if (!conversations.enabled() || !live_ok || live.empty()) return true;
-            const strata::core::ConversationView view{live, live_imgs, checks, cvec_cached};
+            // a split parks every stage; a checkpoint's stage parts go into that stage's image
+            const bool split_park = !stages.empty();
+            std::vector<ConvCheckpoint> checks0;
+            std::vector<std::vector<ConvCheckpoint>> checks_k(stages.size());
+            if (split_park) {
+                for (const ConvCheckpoint& c : checks) {
+                    if (c.stage_parts.size() != stages.size()) continue;
+                    ConvCheckpoint b;
+                    b.ids = c.ids; b.imgs = c.imgs; b.gdn = c.gdn; b.ple = c.ple; b.tails = c.tails;
+                    b.dead = c.dead; b.block_pos = c.block_pos; b.used = c.used;
+                    checks0.push_back(std::move(b));
+                    for (size_t k = 0; k < stages.size(); ++k) {
+                        ConvCheckpoint part = c.stage_parts[k];
+                        part.ids = c.ids; part.imgs = c.imgs; part.used = c.used; part.stage_parts.clear();
+                        checks_k[k].push_back(std::move(part));
+                    }
+                }
+            }
+            const strata::core::ConversationView view{live, live_imgs, split_park ? checks0 : checks, cvec_cached};
+            size_t stage_estimate = 0;
+            for (size_t k = 0; k < stages.size(); ++k) {
+                auto& st = stages[k];
+                const strata::core::OnDevice on(st->dev);
+                const strata::core::ConversationView view_k{live, live_imgs, checks_k[k], cvec_cached};
+                size_t b = 0;
+                if (!strata::core::conversation_snapshot_bytes(view_k, st->ss, g, mtp.kv_state(), b, err)) {
+                    std::fprintf(stderr, "strata serve: conversation cache: skip parking (stage CUDA%d: %s)\n",
+                                 st->dev, err.c_str());
+                    err.clear();
+                    return true;
+                }
+                stage_estimate += b;
+            }
             auto reuse = conversations.take_reuse();
             size_t estimate = 0;
             if (!strata::core::conversation_snapshot_bytes(view, ss, g, mtp.kv_state(), estimate, err)) {
@@ -4665,12 +4694,15 @@ int main(int argc, char** argv) {
                 err.clear(); // A recoverable miss must not poison the batched draft prefill's error channel.
                 return true;
             }
+            estimate += stage_estimate;
             const size_t fresh_estimate = estimate;
             if (!reuse.kv.empty() && !strata::core::conversation_snapshot_capture_bytes(
                     reuse, view, ss, g, mtp.kv_state(), estimate, err)) {
                 reuse = {};
                 estimate = fresh_estimate;
                 err.clear();
+            } else if (!reuse.kv.empty()) {
+                estimate += stage_estimate;   // the capture estimate covers stage 0 only
             }
             // A park carrying its own retained K/V replaces memory the cache
             // already held, so capacity is make_room's call - it runs next either
@@ -4702,6 +4734,16 @@ int main(int argc, char** argv) {
                 size_t reused_bytes = 0;
                 if (!strata::core::conversation_snapshot_save(image, view, ss, g, mtp.kv_state(), err,
                         std::move(reuse), &reused_bytes)) return false;
+                for (size_t k = 0; k < stages.size(); ++k) {   // the later stages' parts
+                    auto& st = stages[k];
+                    const strata::core::OnDevice on(st->dev);
+                    if (cudaDeviceSynchronize() != cudaSuccess) { err = "stage sync failed"; return false; }
+                    const strata::core::ConversationView view_k{live, live_imgs, checks_k[k], cvec_cached};
+                    strata::core::SavedConversation part;
+                    if (!strata::core::conversation_snapshot_save(part, view_k, st->ss, g, mtp.kv_state(), err))
+                        return false;
+                    image.stage_images.push_back(std::move(part));
+                }
                 if (!strata::core::conversation_memory_admit(strata::core::conversation_available_memory(), 0, floor)) {
                     std::fprintf(stderr, "strata serve: conversation cache: skip parking (physical RAM floor after capture, or telemetry unavailable)\n");
                     return true;
@@ -5640,6 +5682,21 @@ int main(int argc, char** argv) {
             if (parked.tokens > resume) incoming.emplace(conversations.take(parked.index));
             // Reject the entire image before parking/overwriting the outgoing
             // state. Invalid entries can safely fall back to its existing prefix.
+            if (incoming && incoming->stage_images.size() != stages.size()) {
+                std::fprintf(stderr, "strata serve: conversation cache: discard snapshot (stage count)\n");
+                incoming.reset();
+            }
+            if (incoming) for (size_t i = 0; i < stages.size(); ++i) {
+                const strata::core::OnDevice on(stages[i]->dev);
+                if (!strata::core::conversation_snapshot_validate(incoming->stage_images[i], stages[i]->ss, g,
+                        mtp.kv_state(), err)) {
+                    std::fprintf(stderr, "strata serve: conversation cache: discard invalid stage snapshot (%s)\n",
+                                 err.c_str());
+                    incoming.reset();
+                    err.clear();
+                    break;
+                }
+            }
             if (incoming && !strata::core::conversation_snapshot_validate(*incoming, ss, g, mtp.kv_state(), err)) {
                 std::fprintf(stderr, "strata serve: conversation cache: discard invalid snapshot (%s)\n", err.c_str());
                 incoming.reset();
@@ -5660,6 +5717,16 @@ int main(int argc, char** argv) {
                     std::printf("ERR restoring parked conversation: %s\n", err.c_str());
                     return 1;
                 }
+                for (size_t i = 0; i < stages.size(); ++i) {   // the later stages' parts
+                    const strata::core::OnDevice on(stages[i]->dev);
+                    if (strata::core::conversation_snapshot_restore(incoming->stage_images[i], stages[i]->ss, g,
+                            mtp.kv_state(), err) != strata::core::ConversationRestore::restored) {
+                        std::printf("ERR restoring parked conversation (stage CUDA%d): %s\n", stages[i]->dev,
+                                    err.c_str());
+                        return 1;
+                    }
+                    if (cudaDeviceSynchronize() != cudaSuccess) { std::printf("ERR stage sync\n"); return 1; }
+                }
                 if (std::getenv("STRATA_SNAPSHOT_VERIFY") != nullptr) {
                     uint64_t draft_hash = 0;
                     if (!strata::core::conversation_kv_verify(incoming->kv.back(), mtp.kv_state(), g,
@@ -5675,6 +5742,13 @@ int main(int argc, char** argv) {
                 live = std::move(incoming->live.ids);
                 live_imgs = std::move(incoming->live.imgs);
                 checks = std::move(incoming->checkpoints);
+                if (!stages.empty()) {   // give each checkpoint back its stage parts
+                    bool ok = true;
+                    for (const auto& si : incoming->stage_images) ok = ok && si.checkpoints.size() == checks.size();
+                    if (!ok) checks.clear();
+                    else for (size_t j = 0; j < checks.size(); ++j)
+                        for (auto& si : incoming->stage_images) checks[j].stage_parts.push_back(std::move(si.checkpoints[j]));
+                }
                 cvec_cached = incoming->cvec;
                 resume = parked.tokens;
                 from_live = parked.live;

From 220ccbbe606ee90c2d3878e1d3ccab159f8df208 Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 16:11:44 +0200
Subject: [PATCH 064/201] Tests and docs: parking with a layer split,
 tools/parking_test.py, a Testing section

- tools/parking_test.py: a follow-up decodes the same tokens whether its conversation stayed live or came back
  from the parking cache (every stage's image with a layer split). 4-GPU split, IQ3_S: 3,786 and 9,276-token
  conversations restored in 42 / 51 ms, follow-ups identical; without parking the same follow-ups took 3.4 / 6.8 s.
- tools/batch_test.py: --keys to send sampling keys (sampled rows in batch windows).
- docs/BATCHING.md: parking together with batching, the Testing section; docs/DETAILS.md: parking now works with
  --layer-split.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 docs/BATCHING.md      | 31 +++++++++++++++++
 docs/DETAILS.md       |  8 +++--
 tools/batch_test.py   |  5 +--
 tools/parking_test.py | 81 +++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 120 insertions(+), 5 deletions(-)
 create mode 100644 tools/parking_test.py

diff --git a/docs/BATCHING.md b/docs/BATCHING.md
index 2e9e659beca..9637b470060 100644
--- a/docs/BATCHING.md
+++ b/docs/BATCHING.md
@@ -74,9 +74,40 @@ the HTTP server, 400 tokens per answer, temperature 0.7:
 | 4 | 51 tok/s | 205 tok/s |
 | 8 | 45 tok/s | 360 tok/s |
 
+With the patches below on engine 0.1.38 and parking on, through the service: 8 requests at temperature 0 -> 369
+tok/s, at 0.7 -> 358 tok/s.
+
 `--trim-stage-weights` alone raised the share of experts held in VRAM on that machine from 76-85 % to 84-100 %
 per card.
 
+## Together with conversation parking
+
+`--conversation-cache-mib N --conversation-cache-slots K` (DETAILS.md) works with the layer split too: a request
+whose conversation was parked is restored on every stage before its admission, so an agent and its sub-agents, or
+several chats that alternate, come back without reading their history again. Measured on the same 4-GPU split,
+two long conversations alternating through the HTTP server: the first turns took 3.9 s and 5.7 s to the first token
+(their prompts read), the follow-ups 0.53 s and 0.46 s.
+
+## Testing
+
+Three scripts drive a built engine or a running server; each exits non-zero on a failure.
+
+| Script | What it checks |
+| --- | --- |
+| `tools/batch_test.py` | the same prompts alone (`GEN`) and together in the batch slots (`BGEN`): every slot's greedy tokens equal its solo tokens; prints the aggregate rate. `--batch-groups` in `--extra` tests the pipeline, `--keys "temperature=0.7"` the sampled rows. |
+| `tools/parking_test.py` | a follow-up to a conversation decodes the same tokens whether its state stayed live or came back from the parking cache (with a layer split: every stage's image). |
+| `tools/early_close_test.py` | a client that stops reading a streamed answer early (alone, and with a second request running) does not leave its tokens to the next request (server). |
+
+For exact comparisons pass `--pcie-frac 0 --adapt-every 1000000` (and the scripts set `STRATA_IQ_MT_MIN=1`):
+
+```
+python3 tools/batch_test.py --exe engine/strata --config strata-<model>.json --batch 8 --n 8 \
+    --extra "--layer-split 12,24,36 --trim-stage-weights --batch-groups 4 --pcie-frac 0 --adapt-every 1000000"
+python3 tools/parking_test.py --exe engine/strata --config strata-<model>.json \
+    --extra "--layer-split 12,24,36 --conversation-cache-mib 8192 --conversation-cache-slots 4 --pcie-frac 0"
+STRATA_KEY=<key> python3 tools/early_close_test.py http://127.0.0.1:8080
+```
+
 ## Engine protocol (`--serve`)
 
 On top of `GEN` / `GENI`:
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..826543fd4d6 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -581,9 +581,11 @@ in a bounded 8 GiB host-RAM cache. This preserves controller/worker histories wh
 their requests alternate; it does not execute requests concurrently. No client session
 ID is required: only exact token/image prefixes with matching steering mode are reused.
 The default budget is 0 (disabled); `--prompt-cache 0` also disables parking.
-The initial shared-core integration supports a single session GPU: combining
-enabled parking with `--layer-split` is rejected before model loading. Ordinary
-upstream layer-split checkpoints remain available with parking disabled. FP16,
+With `--layer-split`, a parked conversation holds one image per stage (each later stage's
+session and its share of the conversation checkpoints), every image is validated before
+anything is overwritten, and each is restored on its own GPU. Verified on a 4-GPU split:
+a 9,276-token conversation restored in 51 ms, and its follow-up decodes exactly the tokens
+it decodes when the conversation never left (`tools/parking_test.py`). FP16,
 INT8, Q4_0 and identity-layout K8V4 snapshots are supported; the K8V4 draft ring
 remains INT8, as in upstream. Windows/HIP and multi-GPU runtime coverage must be
 reported separately from Linux/CUDA evidence.
diff --git a/tools/batch_test.py b/tools/batch_test.py
index b8d51295fb7..835b1c4e806 100644
--- a/tools/batch_test.py
+++ b/tools/batch_test.py
@@ -69,6 +69,7 @@ def main():
     ap.add_argument("--n", type=int, default=4, help="prompts (<= --batch)")
     ap.add_argument("--max-new", type=int, default=64)
     ap.add_argument("--skip-solo", action="store_true")
+    ap.add_argument("--keys", default="", help='sampling keys for every request, e.g. "temperature=0.7 top_k=20"')
     ap.add_argument("--extra", default="", help='more engine arguments in one string, e.g. "--adapt-every 1000000"')
     a = ap.parse_args()
     cfg = json.loads(Path(a.config).read_text())
@@ -83,7 +84,7 @@ def main():
     solo = []
     if not a.skip_solo:
         for i, ids in enumerate(prompts):
-            eng.send(f"GEN {a.max_new} " + ",".join(map(str, ids)))
+            eng.send(" ".join(x for x in ("GEN", str(a.max_new), a.keys, ",".join(map(str, ids))) if x))
             got, t0 = [], time.time()
             for line in out:
                 if line.startswith("T "):
@@ -99,7 +100,7 @@ def main():
     t_admit = time.time()
     first_bt = None
     for i, ids in enumerate(prompts):
-        eng.send(f"BGEN {i} {a.max_new} " + ",".join(map(str, ids)))
+        eng.send(" ".join(x for x in ("BGEN", str(i), str(a.max_new), a.keys, ",".join(map(str, ids))) if x))
         for line in out:
             if line.startswith("T "):
                 got[i].append(int(line.split()[1]))
diff --git a/tools/parking_test.py b/tools/parking_test.py
new file mode 100644
index 00000000000..a62b39c72a7
--- /dev/null
+++ b/tools/parking_test.py
@@ -0,0 +1,81 @@
+#!/usr/bin/env python3
+"""Conversation parking test: a follow-up to conversation A must decode the same tokens whether A's state was still
+live (reference engine: A, then the follow-up) or came back from the parking cache (second engine: A, then B, which
+parks A, then the follow-up).  Greedy; run with --extra "--pcie-frac 0 --adapt-every 1000000" for exactness.
+
+  python3 tools/parking_test.py --exe engine/strata --config strata-<model>.json \
+      --extra "--layer-split 12,24,36 --conversation-cache-mib 8192 --conversation-cache-slots 4 --pcie-frac 0"
+"""
+import argparse, json, re, sys, time
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+from batch_test import Engine, tokenizer  # noqa: E402
+
+DOC = ("The history of the printing press begins with movable type in East Asia and continues with Gutenberg's "
+       "press in Mainz around 1450, which spread across Europe within decades, lowered the cost of books, changed "
+       "how scholars, merchants and churches shared knowledge, and fed the Reformation and the scientific "
+       "revolution. ")
+
+
+def chat(user):
+    return f"<|im_start|>user\n{user}<|im_end|>\n<|im_start|>assistant\n<think>\n\n</think>\n\n"
+
+
+def gen(eng, out, ids, n):
+    eng.send(f"GEN {n} " + ",".join(map(str, ids)))
+    got = []
+    for line in out:
+        if line.startswith("T "):
+            got.append(int(line.split()[1]))
+        elif line.startswith("DONE") or line.startswith("ERR"):
+            return got, line
+    raise SystemExit("the engine ended")
+
+
+def run(a, cfg, tok, with_b):
+    eng = Engine(a.exe, cfg, 0, {"STRATA_IQ_MT_MIN": "1"}, a.extra.split())
+    out = eng.lines()
+    pa = tok.encode(chat(DOC * a.repeat + "\nSummarize this text in five sentences."), parse_special=True)
+    ans, _ = gen(eng, out, pa, a.max_new)
+    if with_b:
+        pb = tok.encode(chat("Write a short poem about the sea, then explain its metaphors." * 20), parse_special=True)
+        gen(eng, out, pb, a.max_new)
+    end = tok.encode("<|im_end|>\n", parse_special=True)
+    follow = pa + ans + ([] if ans and ans[-1] in end else end) + \
+        tok.encode(chat("Now give three keywords for that text, with one sentence each.")[0:], parse_special=True)
+    t0 = time.time()
+    got, done = gen(eng, out, follow, a.max_new)
+    dt = time.time() - t0
+    eng.send("QUIT")
+    eng.p.wait(timeout=180)
+    log = open("/tmp/batch_test_engine.log").read()
+    restored = re.findall(r"restored \d+ tokens[^\n]*", log)
+    return len(pa), len(follow), got, done, dt, restored
+
+
+def main():
+    ap = argparse.ArgumentParser()
+    ap.add_argument("--exe", required=True)
+    ap.add_argument("--config", required=True)
+    ap.add_argument("--repeat", type=int, default=60, help="copies of the paragraph in conversation A")
+    ap.add_argument("--max-new", type=int, default=120)
+    ap.add_argument("--extra", default="")
+    a = ap.parse_args()
+    cfg = json.loads(Path(a.config).read_text())
+    tok = tokenizer(cfg["tokenizer"])
+    ref = run(a, cfg, tok, with_b=False)
+    park = run(a, cfg, tok, with_b=True)
+    for name, r in (("live (reference)", ref), ("parked (A, B, A)", park)):
+        f = r[3].split()
+        print(f"{name}: prompt A {r[0]} tokens, follow-up {r[1]} tokens, reused {f[8] if len(f) > 8 else '?'}, "
+              f"follow-up in {r[4]:.2f} s; restore lines: {r[5][-1:] or 'none'}")
+    same = ref[2] == park[2]
+    first = next((k for k in range(min(len(ref[2]), len(park[2]))) if ref[2][k] != park[2][k]), None)
+    print("follow-up tokens:", "IDENTICAL" if same else f"DIFFER at {first}", f"({len(ref[2])} / {len(park[2])})")
+    print("   ", repr(tok.decode(park[2])[:200]))
+    return 0 if same and park[5] else 1
+
+
+if __name__ == "__main__":
+    sys.exit(main())

From f67bf51a2bec929c3f3bc8fe5f11ae8b84211011 Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 16:41:08 +0200
Subject: [PATCH 065/201] Parking with a layer split: the draft ring once,
 every stage's K/V reused, checkpoints moved not copied

- conversation_snapshot_*(..., const QsaState* draft): nullptr saves, validates and restores an image without the
  draft layer's K/V. The later stages park that way; the draft ring is saved once, with the first stage's image.
- ConversationKvReuse::stages / ConversationCache::retain(.., stage_kv): every stage's restored K/V is retained, so
  its next park copies only what changed, as the first stage's already did.
- conversation_checkpoints_split / _merge: the checkpoints are moved into their stage parts for the capture and
  back afterwards (and on restore), instead of copied.
- Tests: conversation_cache_test (split/merge round trip without copies, refused misalignments, per-stage reuse),
  conversation_snapshot_test (draft-less images: estimate, validation both ways, A/B/A exactness, incremental reuse).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 include/strata/core/conversation_cache.hpp    |  69 +++++++++++-
 include/strata/core/conversation_snapshot.hpp |  17 +++
 src/core/conversation_cache_test.cpp          |  92 ++++++++++++++++
 src/core/conversation_snapshot_test.cpp       |  37 +++++++
 src/core/conversation_state.cpp               |  58 +++++++---
 src/program/generate.cpp                      | 104 ++++++++++--------
 tools/parking_test.py                         |   9 +-
 7 files changed, 317 insertions(+), 69 deletions(-)

diff --git a/include/strata/core/conversation_cache.hpp b/include/strata/core/conversation_cache.hpp
index 9ad7e36d60e..b105deb60c6 100644
--- a/include/strata/core/conversation_cache.hpp
+++ b/include/strata/core/conversation_cache.hpp
@@ -53,13 +53,72 @@ struct ConversationKvReuse {
     std::vector<ConversationKv> kv;
     // Original image extent for validation, and the earliest subsequent rewrite.
     int64_t captured_tokens = 0, unchanged_tokens = 0;
+    // With a layer split: the later stages' own retained K/V, one per stage, same extents (empty: none)
+    std::vector<ConversationKvReuse> stages;
     size_t bytes() const {
-        size_t n = kv.capacity() * sizeof(ConversationKv);
+        size_t n = kv.capacity() * sizeof(ConversationKv) + stages.capacity() * sizeof(ConversationKvReuse);
         for (const auto& layer : kv) n += layer.bytes();
+        for (const auto& s : stages) n += s.bytes();
         return n;
     }
 };
 
+/// Layer-split parking: each running checkpoint holds the first stage's state and, in `stage_parts`, one part per
+/// later stage; a parked conversation keeps them in one image per stage.  `split` MOVES the checkpoints apart (no
+/// running state is copied): the complete ones (a part for each of `stages` stages) into `stage0` and `parts[k]`,
+/// every part carrying the checkpoint's ids / images / LRU stamp, the others aside; `merge` puts them back in their
+/// original order.  merge(split(x)) == x.
+struct ConversationCheckpointSplit {
+    std::vector<ConversationCheckpoint> stage0;
+    std::vector<std::vector<ConversationCheckpoint>> parts;   ///< [stage][checkpoint]
+    std::vector<ConversationCheckpoint> rest;                 ///< not split (no complete set of stage parts)
+    std::vector<bool> complete;                               ///< per original position: in stage0/parts or in rest
+};
+
+inline ConversationCheckpointSplit conversation_checkpoints_split(std::vector<ConversationCheckpoint>&& checks,
+                                                                  size_t stages) {
+    ConversationCheckpointSplit out;
+    out.parts.resize(stages);
+    for (auto& c : checks) {
+        const bool whole = c.stage_parts.size() == stages;
+        out.complete.push_back(whole);
+        if (!whole) { out.rest.push_back(std::move(c)); continue; }
+        for (size_t k = 0; k < stages; ++k) {
+            ConversationCheckpoint part = std::move(c.stage_parts[k]);
+            part.ids = c.ids; part.imgs = c.imgs; part.used = c.used; part.stage_parts.clear();
+            out.parts[k].push_back(std::move(part));
+        }
+        c.stage_parts.clear();
+        out.stage0.push_back(std::move(c));
+    }
+    checks.clear();
+    return out;
+}
+
+/// false (and `out` empty) when the parts do not line up: a stage with another number of checkpoints, or a part
+/// whose ids differ from its checkpoint's.
+inline bool conversation_checkpoints_merge(ConversationCheckpointSplit&& split, std::vector<ConversationCheckpoint>& out) {
+    out.clear();
+    for (const auto& p : split.parts)
+        if (p.size() != split.stage0.size()) return false;
+    size_t whole = 0, other = 0;
+    for (bool c : split.complete) (c ? whole : other) += 1;
+    if (!split.complete.empty() && (whole != split.stage0.size() || other != split.rest.size())) return false;
+    if (split.complete.empty()) split.complete.assign(split.stage0.size(), true);   // a restored image: all whole
+    for (size_t j = 0; j < split.stage0.size(); ++j)
+        for (const auto& p : split.parts)
+            if (p[j].ids != split.stage0[j].ids) return false;
+    size_t w = 0, r = 0;
+    for (bool c : split.complete) {
+        if (!c) { out.push_back(std::move(split.rest[r++])); continue; }
+        ConversationCheckpoint cp = std::move(split.stage0[w]);
+        for (auto& p : split.parts) cp.stage_parts.push_back(std::move(p[w]));
+        ++w;
+        out.push_back(std::move(cp));
+    }
+    return true;
+}
+
 struct SavedConversation {
     // Runtime compatibility only; NOT a model/weights identity or disk schema.
     std::array<int64_t, 18> geometry{};
@@ -113,13 +172,17 @@ class ConversationCache {
 
     // Retain only the restored K/V buffers, not duplicate running checkpoints.
     // This optimization never evicts a parked conversation to make itself fit.
-    void retain(std::vector<ConversationKv>&& kv, int64_t tokens) {
+    // `stage_kv`: with a layer split, the later stages' restored K/V (one per stage), retained with the first's.
+    void retain(std::vector<ConversationKv>&& kv, int64_t tokens,
+                std::vector<std::vector<ConversationKv>>&& stage_kv = {}) {
         reuse_ = {};
-        ConversationKvReuse candidate{std::move(kv), tokens, tokens};
+        ConversationKvReuse candidate{std::move(kv), tokens, tokens, {}};
+        for (auto& k : stage_kv) candidate.stages.push_back(ConversationKvReuse{std::move(k), tokens, tokens, {}});
         if (enabled() && candidate.bytes() <= budget_ - bytes_) reuse_ = std::move(candidate);
     }
     void limit_reuse(int64_t first_dirty) {
         reuse_.unchanged_tokens = std::min(reuse_.unchanged_tokens, first_dirty);
+        for (auto& s : reuse_.stages) s.unchanged_tokens = std::min(s.unchanged_tokens, first_dirty);
         if (reuse_.unchanged_tokens <= 0) reuse_ = {};
     }
     ConversationKvReuse take_reuse() { return std::exchange(reuse_, {}); }
diff --git a/include/strata/core/conversation_snapshot.hpp b/include/strata/core/conversation_snapshot.hpp
index a840bf2eda9..1a56680df3b 100644
--- a/include/strata/core/conversation_snapshot.hpp
+++ b/include/strata/core/conversation_snapshot.hpp
@@ -76,4 +76,21 @@ ConversationRestore conversation_snapshot_restore(const SavedConversation& image
                                                    const ModelGeometry& g, const QsaState& draft,
                                                    std::string& error);
 
+// The same with `draft == nullptr`: an image WITHOUT the draft layer's K/V (kv holds the session's own QSA layers
+// only).  A layer split's later stages park this way; the draft ring is saved once, with the first stage's image.
+// An image is validated and restored with the same kind of call it was saved with (a K/V layer count mismatch is
+// rejected as invalid).
+bool conversation_snapshot_bytes(const ConversationView& view, const SessionState& session, const ModelGeometry& g,
+                                 const QsaState* draft, size_t& bytes, std::string& error);
+bool conversation_snapshot_capture_bytes(const ConversationKvReuse& reuse, const ConversationView& view,
+                                         const SessionState& session, const ModelGeometry& g, const QsaState* draft,
+                                         size_t& bytes, std::string& error);
+bool conversation_snapshot_save(SavedConversation& image, const ConversationView& view, const SessionState& session,
+                                const ModelGeometry& g, const QsaState* draft, std::string& error,
+                                ConversationKvReuse reuse = {}, size_t* reused_bytes = nullptr);
+bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& session,
+                                    const ModelGeometry& g, const QsaState* draft, std::string& error);
+ConversationRestore conversation_snapshot_restore(const SavedConversation& image, SessionState& session,
+                                                   const ModelGeometry& g, const QsaState* draft, std::string& error);
+
 } // namespace strata::core
diff --git a/src/core/conversation_cache_test.cpp b/src/core/conversation_cache_test.cpp
index f10b729b5a6..f544dd743ea 100644
--- a/src/core/conversation_cache_test.cpp
+++ b/src/core/conversation_cache_test.cpp
@@ -2,6 +2,7 @@
 
 #include <cstdio>
 #include <cstdlib>
+#include <vector>
 
 using namespace strata::core;
 
@@ -209,5 +210,96 @@ int main() {
         check(!disabled.put(image({1,2,3})) && !no_slots.put(image({1,2,3})), "disabled cache stores nothing");
         check(disabled.best(a,{},true).tokens == 0, "disabled cache has no matches");
     }
+    {
+        // layer-split parking: checkpoints moved apart into stage parts and put back, no running state copied
+        auto running = [](std::initializer_list<int32_t> ids, uint8_t salt, size_t parts) {
+            ConversationCheckpoint c;
+            c.ids = ids;
+            c.gdn.assign(256, salt);
+            c.tails.assign(32, uint8_t(salt + 1));
+            c.used = salt;
+            for (size_t k = 0; k < parts; ++k) {
+                ConversationCheckpoint p;
+                p.gdn.assign(128, uint8_t(salt + 10 + k));
+                c.stage_parts.push_back(std::move(p));
+            }
+            return c;
+        };
+        std::vector<ConversationCheckpoint> checks;
+        checks.push_back(running({1, 2}, 3, 2));
+        checks.push_back(running({1, 2, 3}, 5, 1));       // an incomplete set: kept aside, put back in place
+        checks.push_back(running({1, 2, 3, 4}, 7, 2));
+        const auto original = checks;
+        const uint8_t* gdn0 = checks[0].gdn.data();
+        const uint8_t* part1 = checks[2].stage_parts[1].gdn.data();
+        auto split = conversation_checkpoints_split(std::move(checks), 2);
+        check(checks.empty() && split.stage0.size() == 2 && split.rest.size() == 1 && split.parts.size() == 2 &&
+              split.parts[0].size() == 2 && split.parts[1].size() == 2, "split: complete checkpoints apart, the other aside");
+        check(split.stage0[0].stage_parts.empty() && split.parts[1][1].ids == original[2].ids &&
+              split.parts[1][1].used == original[2].used && split.parts[0][0].gdn == original[0].stage_parts[0].gdn,
+              "split: every stage part carries its checkpoint's ids and LRU stamp");
+        check(split.stage0[0].gdn.data() == gdn0 && split.parts[1][1].gdn.data() == part1,
+              "split moves the running state (same buffers, no copy)");
+        std::vector<ConversationCheckpoint> back;
+        check(conversation_checkpoints_merge(std::move(split), back) && back.size() == 3, "merge puts them back");
+        bool same = true;
+        for (size_t j = 0; j < back.size(); ++j) {
+            same = same && back[j].ids == original[j].ids && back[j].gdn == original[j].gdn &&
+                   back[j].tails == original[j].tails && back[j].used == original[j].used &&
+                   back[j].stage_parts.size() == original[j].stage_parts.size();
+            for (size_t k = 0; same && k < back[j].stage_parts.size(); ++k)
+                same = back[j].stage_parts[k].gdn == original[j].stage_parts[k].gdn;
+        }
+        check(same, "merge(split(x)) == x, in the original order");
+        check(back[0].gdn.data() == gdn0 && back[2].stage_parts[1].gdn.data() == part1, "merge moves them back too");
+
+        auto torn = conversation_checkpoints_split(std::vector<ConversationCheckpoint>(original), 2);
+        torn.parts[1].pop_back();
+        check(!conversation_checkpoints_merge(std::move(torn), back) && back.empty(), "a stage short of a part is refused");
+        auto mixed = conversation_checkpoints_split(std::vector<ConversationCheckpoint>(original), 2);
+        mixed.parts[0][0].ids = {9, 9};
+        check(!conversation_checkpoints_merge(std::move(mixed), back) && back.empty(), "a part of another checkpoint is refused");
+        // a restored image: stage 0's checkpoints and each stage's, with no record of an incomplete one
+        ConversationCheckpointSplit restored;
+        restored.stage0.push_back(running({4, 5}, 11, 0));
+        restored.parts.resize(2);
+        for (auto& p : restored.parts) { auto c = running({4, 5}, 12, 0); p.push_back(std::move(c)); }
+        check(conversation_checkpoints_merge(std::move(restored), back) && back.size() == 1 &&
+              back[0].stage_parts.size() == 2, "a restored image's parts are all whole");
+        auto none = conversation_checkpoints_split({}, 3);
+        check(conversation_checkpoints_merge(std::move(none), back) && back.empty(), "no checkpoints: nothing to do");
+    }
+    {
+        // the later stages' retained K/V, kept with the first stage's and limited together
+        auto kv = [](size_t n) {
+            std::vector<ConversationKv> v(2);
+            for (auto& l : v) l.k.resize(n, 1);
+            return v;
+        };
+        ConversationCache cache(1 << 20, 4);
+        std::vector<std::vector<ConversationKv>> stage_kv;
+        stage_kv.push_back(kv(1000));
+        stage_kv.push_back(kv(2000));
+        cache.retain(kv(500), 40, std::move(stage_kv));
+        check(cache.retained_bytes() >= 2 * (500 + 1000 + 2000), "retained bytes count every stage");
+        cache.limit_reuse(30);
+        auto r = cache.take_reuse();
+        check(r.kv.size() == 2 && r.stages.size() == 2 && r.unchanged_tokens == 30 &&
+              r.stages[0].unchanged_tokens == 30 && r.stages[1].unchanged_tokens == 30 &&
+              r.stages[1].captured_tokens == 40, "every stage's reuse is limited to the first rewrite");
+        check(cache.retained_bytes() == 0, "taken once");
+        std::vector<std::vector<ConversationKv>> big;
+        big.push_back(kv(1 << 20));
+        cache.retain(kv(500), 40, std::move(big));
+        check(cache.retained_bytes() == 0, "a stage's K/V over the budget drops the whole reuse");
+        std::vector<std::vector<ConversationKv>> one;
+        one.push_back(kv(100));
+        cache.retain(kv(500), 40, std::move(one));
+        cache.limit_reuse(0);
+        check(cache.retained_bytes() == 0, "a rewrite from the start drops every stage's reuse");
+        cache.retain(kv(500), 40);
+        r = cache.take_reuse();
+        check(r.kv.size() == 2 && r.stages.empty(), "no layer split: no stage reuse, as before");
+    }
     std::printf("conversation_cache_test: %d checks passed\n", checks);
 }
diff --git a/src/core/conversation_snapshot_test.cpp b/src/core/conversation_snapshot_test.cpp
index da95113c65d..215ec560dce 100644
--- a/src/core/conversation_snapshot_test.cpp
+++ b/src/core/conversation_snapshot_test.cpp
@@ -187,6 +187,43 @@ void full_session(int fmt, int mode, int experts) {
         check(conversation_kv_verify(incremental.kv.back(),draft.state,g,70,false,fingerprint,err),"incremental draft authoritative and ring read-back");
         ids.resize(65);
     }
+    {
+        // a layer split's later stage: the same image WITHOUT the draft layer's K/V (draft == nullptr)
+        check(conversation_snapshot_restore(a,ss,g,draft.state,err)==ConversationRestore::restored,"restore A before stage images");
+        size_t with_draft=0,without=0;
+        check(conversation_snapshot_bytes(view,ss,g,draft.state,with_draft,err) &&
+              conversation_snapshot_bytes(view,ss,g,nullptr,without,err) && without<with_draft,
+              "a stage image's estimate leaves the draft out");
+        SavedConversation stage,stage_b,stage_back;
+        check(conversation_snapshot_save(stage,view,ss,g,nullptr,err),"capture a stage image");
+        check(stage.kv.size()==a.kv.size()-1 && equal(stage.kv[0],a.kv[0]) && stage.live.gdn==a.live.gdn,
+              "a stage image holds the session's own layers, no draft");
+        check(stage.bytes()<a.bytes(),"a stage image is smaller by the draft ring");
+        check(conversation_snapshot_validate(stage,ss,g,nullptr,err),"validate a stage image without a draft");
+        check(!conversation_snapshot_validate(stage,ss,g,draft.state,err),"a stage image is refused where a draft is expected");
+        check(!conversation_snapshot_validate(a,ss,g,nullptr,err),"an image with a draft is refused where none is expected");
+        fill(201);
+        check(conversation_snapshot_save(stage_b,view,ss,g,nullptr,err),"capture another stage state");
+        check(conversation_snapshot_restore(a,ss,g,nullptr,err)==ConversationRestore::invalid,
+              "restoring a draft image as a stage image is refused before any write");
+        check(conversation_snapshot_save(stage_back,view,ss,g,nullptr,err) && stage_back.live.gdn==stage_b.live.gdn &&
+              equal(stage_back.kv[0],stage_b.kv[0]),"the refusal left the stage untouched");
+        check(conversation_snapshot_restore(stage,ss,g,nullptr,err)==ConversationRestore::restored,"restore a stage image");
+        check(conversation_snapshot_save(stage_back,view,ss,g,nullptr,err) && stage_back.live.gdn==stage.live.gdn &&
+              stage_back.live.dead==stage.live.dead && equal(stage_back.kv[0],stage.kv[0]),"stage A/B/A exactness");
+        // its retained K/V: the next park copies only what changed, and equals a full capture
+        ConversationKvReuse reuse{stage.kv,65,65,{}};
+        SavedConversation fresh,incremental;
+        size_t peak=0,reused=0;
+        check(conversation_snapshot_save(fresh,view,ss,g,nullptr,err),"full stage capture reference");
+        check(conversation_snapshot_capture_bytes(reuse,view,ss,g,nullptr,peak,err),"admit an incremental stage capture");
+        check(conversation_snapshot_save(incremental,view,ss,g,nullptr,err,std::move(reuse),&reused),"incremental stage capture");
+        check(reused>0 && incremental.bytes()<=peak && equal(incremental.kv[0],fresh.kv[0]) &&
+              incremental.live.gdn==fresh.live.gdn,"an incremental stage capture reuses pages and equals a full one");
+        ConversationKvReuse wrong{a.kv,65,65,{}};
+        check(!conversation_snapshot_capture_bytes(wrong,view,ss,g,nullptr,peak,err),"a draft image's K/V is not a stage's reuse");
+    }
+    check(conversation_snapshot_restore(a,ss,g,draft.state,err)==ConversationRestore::restored,"restore A after stage images");
     check(conversation_checkpoint_restore(a.checkpoints[0],ss,g,err),"restore early running checkpoint");
     std::vector<uint8_t> spare(sizes.dead);
     cuda_check(cudaMemcpy(spare.data(),main.state.idx_pooled,sizes.dead,cudaMemcpyDeviceToHost));
diff --git a/src/core/conversation_state.cpp b/src/core/conversation_state.cpp
index 3e97827cb1d..1a45e7f1493 100644
--- a/src/core/conversation_state.cpp
+++ b/src/core/conversation_state.cpp
@@ -193,7 +193,7 @@ bool conversation_checkpoint_restore(const ConversationCheckpoint& c, SessionSta
 }
 
 bool conversation_snapshot_bytes(const ConversationView& view, const SessionState& ss,
-                                 const ModelGeometry& g, const QsaState& draft, size_t& bytes, std::string& error) {
+                                 const ModelGeometry& g, const QsaState* draft, size_t& bytes, std::string& error) {
     bytes = 0;
     if (!view_validate(view, ss, g, error)) return false;
     ConversationStateSizes z;
@@ -203,7 +203,7 @@ bool conversation_snapshot_bytes(const ConversationView& view, const SessionStat
     if (!product(ids, {view.ids.size(), sizeof(int32_t)}) ||
         !product(images, {view.images.size(), sizeof(ConversationImageKey)}) ||
         !product(checkpoints, {view.checkpoints.size(), sizeof(ConversationCheckpoint)}) ||
-        !product(layers, {qsa + 1, sizeof(ConversationKv)}) ||
+        !product(layers, {qsa + (draft ? 1 : 0), sizeof(ConversationKv)}) ||
         !product(tails, {qsa, z.tail}) || !product(dead, {qsa, z.dead}) ||
         !product(positions, {qsa, z.block_pos})) return fail(error, "snapshot metadata byte count overflow");
     for (size_t n : {ids, images, checkpoints, layers, tails, dead, positions, z.gdn, ss.ple_hist ? z.ple : 0})
@@ -211,8 +211,8 @@ bool conversation_snapshot_bytes(const ConversationView& view, const SessionStat
     for (const auto& c : view.checkpoints)
         if (!metadata_bytes(c, bytes)) return fail(error, "checkpoint byte count overflow");
     const int64_t upto = (int64_t) view.ids.size(); // view_validate bounds this by signed max_cells
-    for (uint64_t i = 0; i <= qsa; ++i) {
-        const auto& st = i == qsa ? draft : owned(ss, (size_t) i);
+    for (uint64_t i = 0; i < qsa + (draft ? 1 : 0); ++i) {
+        const auto& st = i == qsa ? *draft : owned(ss, (size_t) i);
         const size_t n = conversation_kv_bytes(st, g, upto, i != qsa);
         if (!n || !add(bytes, n)) return fail(error, "invalid or overflowing K/V byte estimate");
     }
@@ -221,16 +221,16 @@ bool conversation_snapshot_bytes(const ConversationView& view, const SessionStat
 
 bool conversation_snapshot_capture_bytes(const ConversationKvReuse& reuse, const ConversationView& view,
                                          const SessionState& ss, const ModelGeometry& g,
-                                         const QsaState& draft, size_t& bytes, std::string& error) {
+                                         const QsaState* draft, size_t& bytes, std::string& error) {
     if (!conversation_snapshot_bytes(view, ss, g, draft, bytes, error)) return false;
     if (reuse.kv.empty()) return true;
-    const size_t layers = owned_qsa(ss) + 1;
+    const size_t layers = owned_qsa(ss) + (draft ? 1 : 0);
     if (reuse.kv.size() != layers || reuse.unchanged_tokens < 0 ||
         reuse.unchanged_tokens > reuse.captured_tokens || reuse.unchanged_tokens > int64_t(view.ids.size()))
         return fail(error, "invalid retained K/V prefix");
     for (size_t i = 0; i < layers; ++i) {
-        const bool index = i + 1 != layers;
-        const auto& st = index ? owned(ss, i) : draft;
+        const bool index = i < owned_qsa(ss);
+        const auto& st = index ? owned(ss, i) : *draft;
         if (!conversation_kv_validate(reuse.kv[i], st, g, reuse.captured_tokens, index, error)) return false;
         const size_t fresh = conversation_kv_bytes(st, g, int64_t(view.ids.size()), index);
         size_t retained = 0;
@@ -246,7 +246,7 @@ bool conversation_snapshot_capture_bytes(const ConversationKvReuse& reuse, const
 
 bool conversation_snapshot_save(SavedConversation& image, const ConversationView& view,
                                 const SessionState& ss, const ModelGeometry& g,
-                                const QsaState& draft, std::string& error,
+                                const QsaState* draft, std::string& error,
                                 ConversationKvReuse reuse, size_t* reused_bytes) {
     size_t estimate = 0;
     if (!conversation_snapshot_capture_bytes(reuse, view, ss, g, draft, estimate, error) || !sync(error)) return false;
@@ -259,7 +259,7 @@ bool conversation_snapshot_save(SavedConversation& image, const ConversationView
     const int64_t unchanged = reuse.kv.empty() ? 0 : reuse.unchanged_tokens;
     captured.kv = std::move(reuse.kv);
     const size_t layers = owned_qsa(ss);
-    captured.kv.resize(layers + 1);
+    captured.kv.resize(layers + (draft ? 1 : 0));
     if (!conversation_checkpoint_save(captured.live, ss, g, error)) return false;
     const int64_t upto = (int64_t) view.ids.size();
     for (size_t j = 0; j < layers; ++j)
@@ -267,14 +267,14 @@ bool conversation_snapshot_save(SavedConversation& image, const ConversationView
                                   unchanged, reused_bytes)) return false;
     // The draft's final cell may not have been computed when the output cap was
     // reached. Refresh that page even when the main prefix continued unchanged.
-    if (!conversation_kv_save(captured.kv.back(), draft, g, upto, false, error,
-                              std::max<int64_t>(0, unchanged - 1), reused_bytes)) return false;
+    if (draft && !conversation_kv_save(captured.kv.back(), *draft, g, upto, false, error,
+                                       std::max<int64_t>(0, unchanged - 1), reused_bytes)) return false;
     image = std::move(captured);
     return true;
 }
 
 bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& ss,
-                                    const ModelGeometry& g, const QsaState& draft, std::string& error) {
+                                    const ModelGeometry& g, const QsaState* draft, std::string& error) {
     if (!image.live.stage_parts.empty()) return fail(error, "layer-split parking is not supported");
     if (image.geometry != geometry_key(g)) return fail(error, "incompatible runtime geometry");
     // an image holds exactly one carve's running state and K/V: same layer range or nothing
@@ -283,23 +283,47 @@ bool conversation_snapshot_validate(const SavedConversation& image, const Sessio
     const ConversationView view{image.live.ids, image.live.imgs, image.checkpoints, image.cvec};
     if (!view_validate(view, ss, g, error) || !conversation_checkpoint_validate(image.live, ss, g, error)) return false;
     const size_t layers = owned_qsa(ss);
-    if (image.kv.size() != layers + 1) return fail(error, "invalid K/V layer count");
+    if (image.kv.size() != layers + (draft ? 1 : 0)) return fail(error, "invalid K/V layer count");
     const int64_t upto = (int64_t) image.live.ids.size();
     for (size_t j = 0; j < layers; ++j)
         if (!conversation_kv_validate(image.kv[j], owned(ss, j), g, upto, true, error)) return false;
-    return conversation_kv_validate(image.kv.back(), draft, g, upto, false, error);
+    return !draft || conversation_kv_validate(image.kv.back(), *draft, g, upto, false, error);
 }
 
 ConversationRestore conversation_snapshot_restore(const SavedConversation& image, SessionState& ss,
-                                                   const ModelGeometry& g, const QsaState& draft, std::string& error) {
+                                                   const ModelGeometry& g, const QsaState* draft, std::string& error) {
     if (!conversation_snapshot_validate(image, ss, g, draft, error)) return ConversationRestore::invalid;
     if (!sync(error)) return ConversationRestore::transfer_failed;
     const int64_t upto = (int64_t) image.live.ids.size();
     for (size_t j = 0; j < owned_qsa(ss); ++j)
         if (!conversation_kv_restore(image.kv[j], owned(ss, j), g, upto, true, error))
             return ConversationRestore::transfer_failed;
-    if (!conversation_kv_restore(image.kv.back(), draft, g, upto, false, error) ||
+    if ((draft && !conversation_kv_restore(image.kv.back(), *draft, g, upto, false, error)) ||
         !conversation_checkpoint_restore(image.live, ss, g, error)) return ConversationRestore::transfer_failed;
     return ConversationRestore::restored;
 }
+
+// the draft layer's K/V included (the stage that owns the draft head, or no layer split)
+bool conversation_snapshot_bytes(const ConversationView& view, const SessionState& ss, const ModelGeometry& g,
+                                 const QsaState& draft, size_t& bytes, std::string& error) {
+    return conversation_snapshot_bytes(view, ss, g, &draft, bytes, error);
+}
+bool conversation_snapshot_capture_bytes(const ConversationKvReuse& reuse, const ConversationView& view,
+                                         const SessionState& ss, const ModelGeometry& g, const QsaState& draft,
+                                         size_t& bytes, std::string& error) {
+    return conversation_snapshot_capture_bytes(reuse, view, ss, g, &draft, bytes, error);
+}
+bool conversation_snapshot_save(SavedConversation& image, const ConversationView& view, const SessionState& ss,
+                                const ModelGeometry& g, const QsaState& draft, std::string& error,
+                                ConversationKvReuse reuse, size_t* reused_bytes) {
+    return conversation_snapshot_save(image, view, ss, g, &draft, error, std::move(reuse), reused_bytes);
+}
+bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& ss, const ModelGeometry& g,
+                                    const QsaState& draft, std::string& error) {
+    return conversation_snapshot_validate(image, ss, g, &draft, error);
+}
+ConversationRestore conversation_snapshot_restore(const SavedConversation& image, SessionState& ss,
+                                                   const ModelGeometry& g, const QsaState& draft, std::string& error) {
+    return conversation_snapshot_restore(image, ss, g, &draft, error);
+}
 } // namespace strata::core
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 295f196dc86..6b0f33bcf3e 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4654,67 +4654,72 @@ int main(int argc, char** argv) {
         // addresses change: all parked images live in ordinary host vectors.
         auto park_current = [&](size_t held) -> bool {
             if (!conversations.enabled() || !live_ok || live.empty()) return true;
-            // a split parks every stage; a checkpoint's stage parts go into that stage's image
-            const bool split_park = !stages.empty();
-            std::vector<ConvCheckpoint> checks0;
-            std::vector<std::vector<ConvCheckpoint>> checks_k(stages.size());
-            if (split_park) {
-                for (const ConvCheckpoint& c : checks) {
-                    if (c.stage_parts.size() != stages.size()) continue;
-                    ConvCheckpoint b;
-                    b.ids = c.ids; b.imgs = c.imgs; b.gdn = c.gdn; b.ple = c.ple; b.tails = c.tails;
-                    b.dead = c.dead; b.block_pos = c.block_pos; b.used = c.used;
-                    checks0.push_back(std::move(b));
-                    for (size_t k = 0; k < stages.size(); ++k) {
-                        ConvCheckpoint part = c.stage_parts[k];
-                        part.ids = c.ids; part.imgs = c.imgs; part.used = c.used; part.stage_parts.clear();
-                        checks_k[k].push_back(std::move(part));
-                    }
-                }
-            }
-            const strata::core::ConversationView view{live, live_imgs, split_park ? checks0 : checks, cvec_cached};
-            size_t stage_estimate = 0;
-            for (size_t k = 0; k < stages.size(); ++k) {
+            // #342: before make_room evicts oldest-first, the copies of this conversation a turn back go (they hold
+            // nothing the outgoing chain does not, apart from the tail this conversation rewrote)
+            if (const size_t dropped = conversations.drop_superseded(live, live_imgs, checks, cvec_cached))
+                std::fprintf(stderr, "strata serve: conversation cache: dropped %zu superseded cop%s of this "
+                             "conversation; parked=%zu\n", dropped, dropped == 1 ? "y" : "ies", conversations.size());
+            // A layer split parks one image per stage: the first stage's (with the draft layer's K/V) and one per
+            // later stage (without it - the draft ring is saved once).  The checkpoints are MOVED apart into their
+            // stage parts for the capture and put back together whichever way this ends (no running state copied).
+            const size_t n_st = stages.size();
+            strata::core::ConversationCheckpointSplit cs;
+            if (n_st > 0) cs = strata::core::conversation_checkpoints_split(std::move(checks), n_st);
+            struct MergeBack {
+                strata::core::ConversationCheckpointSplit& cs; std::vector<ConvCheckpoint>& checks; bool on;
+                ~MergeBack() { if (on && !strata::core::conversation_checkpoints_merge(std::move(cs), checks)) checks.clear(); }
+            } merge_back{cs, checks, n_st > 0};
+            const strata::core::ConversationView view{live, live_imgs, n_st > 0 ? cs.stage0 : checks, cvec_cached};
+            auto reuse = conversations.take_reuse();
+            std::vector<strata::core::ConversationKvReuse> stage_reuse = std::move(reuse.stages);
+            stage_reuse.resize(n_st);
+            reuse.stages.clear();
+            // the later stages' estimates, each with its own retained K/V when it still fits
+            size_t stage_estimate = 0, stage_retained = 0;
+            for (size_t k = 0; k < n_st; ++k) {
                 auto& st = stages[k];
                 const strata::core::OnDevice on(st->dev);
-                const strata::core::ConversationView view_k{live, live_imgs, checks_k[k], cvec_cached};
+                const strata::core::ConversationView view_k{live, live_imgs, cs.parts[k], cvec_cached};
                 size_t b = 0;
-                if (!strata::core::conversation_snapshot_bytes(view_k, st->ss, g, mtp.kv_state(), b, err)) {
+                if (!strata::core::conversation_snapshot_bytes(view_k, st->ss, g, nullptr, b, err)) {
                     std::fprintf(stderr, "strata serve: conversation cache: skip parking (stage CUDA%d: %s)\n",
                                  st->dev, err.c_str());
                     err.clear();
                     return true;
                 }
+                if (!stage_reuse[k].kv.empty()) {
+                    size_t r = 0;
+                    if (strata::core::conversation_snapshot_capture_bytes(stage_reuse[k], view_k, st->ss, g, nullptr,
+                                                                          r, err)) {
+                        b = r;
+                        stage_retained += stage_reuse[k].bytes();
+                    } else {
+                        stage_reuse[k] = {};
+                        err.clear();
+                    }
+                }
                 stage_estimate += b;
             }
-            auto reuse = conversations.take_reuse();
             size_t estimate = 0;
             if (!strata::core::conversation_snapshot_bytes(view, ss, g, mtp.kv_state(), estimate, err)) {
                 std::fprintf(stderr, "strata serve: conversation cache: skip parking (%s)\n", err.c_str());
                 err.clear(); // A recoverable miss must not poison the batched draft prefill's error channel.
                 return true;
             }
-            estimate += stage_estimate;
             const size_t fresh_estimate = estimate;
             if (!reuse.kv.empty() && !strata::core::conversation_snapshot_capture_bytes(
                     reuse, view, ss, g, mtp.kv_state(), estimate, err)) {
                 reuse = {};
                 estimate = fresh_estimate;
                 err.clear();
-            } else if (!reuse.kv.empty()) {
-                estimate += stage_estimate;   // the capture estimate covers stage 0 only
             }
+            estimate += stage_estimate;
             // A park carrying its own retained K/V replaces memory the cache
             // already held, so capacity is make_room's call - it runs next either
             // way, and put()'s accounting still bounds the budget. The with-reuse
             // estimate must stay uncapped: it counts the retained buffers'
             // capacity and directories, and put() charges that same true size -
             // a capped figure would under-evict and overfill the budget.
-            // #342: before make_room evicts oldest-first, the copies of this conversation a turn back go (they hold
-            // nothing the outgoing chain does not, apart from the tail this conversation rewrote)
-            if (const size_t dropped = conversations.drop_superseded(live, live_imgs, checks, cvec_cached))
-                std::fprintf(stderr, "strata serve: conversation cache: dropped %zu superseded cop%s of this "
-                             "conversation; parked=%zu\n", dropped, dropped == 1 ? "y" : "ies", conversations.size());
             if (!conversations.make_room(estimate, held)) {
                 std::fprintf(stderr, "strata serve: conversation cache: skip parking (snapshot %zu MiB exceeds available budget)\n",
                              estimate >> 20);
@@ -4723,7 +4728,8 @@ int main(int argc, char** argv) {
             const auto t0 = Clock::now();
             try {
                 const uint64_t floor = (uint64_t) o.conversation_cache_min_free_mib * 1024 * 1024;
-                const size_t additional = estimate - reuse.bytes();
+                const size_t retained = reuse.bytes() + stage_retained;
+                const size_t additional = estimate > retained ? estimate - retained : 0;
                 if (!strata::core::conversation_memory_admit(strata::core::conversation_available_memory(),
                         additional, floor)) {
                     std::fprintf(stderr, "strata serve: conversation cache: skip parking (physical RAM admission; need %zu MiB plus %lld MiB floor, or telemetry unavailable)\n",
@@ -4734,13 +4740,14 @@ int main(int argc, char** argv) {
                 size_t reused_bytes = 0;
                 if (!strata::core::conversation_snapshot_save(image, view, ss, g, mtp.kv_state(), err,
                         std::move(reuse), &reused_bytes)) return false;
-                for (size_t k = 0; k < stages.size(); ++k) {   // the later stages' parts
+                for (size_t k = 0; k < n_st; ++k) {   // the later stages, without the draft layer's K/V
                     auto& st = stages[k];
                     const strata::core::OnDevice on(st->dev);
                     if (cudaDeviceSynchronize() != cudaSuccess) { err = "stage sync failed"; return false; }
-                    const strata::core::ConversationView view_k{live, live_imgs, checks_k[k], cvec_cached};
+                    const strata::core::ConversationView view_k{live, live_imgs, cs.parts[k], cvec_cached};
                     strata::core::SavedConversation part;
-                    if (!strata::core::conversation_snapshot_save(part, view_k, st->ss, g, mtp.kv_state(), err))
+                    if (!strata::core::conversation_snapshot_save(part, view_k, st->ss, g, nullptr, err,
+                            std::move(stage_reuse[k]), &reused_bytes))
                         return false;
                     image.stage_images.push_back(std::move(part));
                 }
@@ -5689,7 +5696,7 @@ int main(int argc, char** argv) {
             if (incoming) for (size_t i = 0; i < stages.size(); ++i) {
                 const strata::core::OnDevice on(stages[i]->dev);
                 if (!strata::core::conversation_snapshot_validate(incoming->stage_images[i], stages[i]->ss, g,
-                        mtp.kv_state(), err)) {
+                        nullptr, err)) {   // a later stage's image holds no draft K/V
                     std::fprintf(stderr, "strata serve: conversation cache: discard invalid stage snapshot (%s)\n",
                                  err.c_str());
                     incoming.reset();
@@ -5720,7 +5727,7 @@ int main(int argc, char** argv) {
                 for (size_t i = 0; i < stages.size(); ++i) {   // the later stages' parts
                     const strata::core::OnDevice on(stages[i]->dev);
                     if (strata::core::conversation_snapshot_restore(incoming->stage_images[i], stages[i]->ss, g,
-                            mtp.kv_state(), err) != strata::core::ConversationRestore::restored) {
+                            nullptr, err) != strata::core::ConversationRestore::restored) {
                         std::printf("ERR restoring parked conversation (stage CUDA%d): %s\n", stages[i]->dev,
                                     err.c_str());
                         return 1;
@@ -5741,19 +5748,22 @@ int main(int argc, char** argv) {
                 }
                 live = std::move(incoming->live.ids);
                 live_imgs = std::move(incoming->live.imgs);
-                checks = std::move(incoming->checkpoints);
-                if (!stages.empty()) {   // give each checkpoint back its stage parts
-                    bool ok = true;
-                    for (const auto& si : incoming->stage_images) ok = ok && si.checkpoints.size() == checks.size();
-                    if (!ok) checks.clear();
-                    else for (size_t j = 0; j < checks.size(); ++j)
-                        for (auto& si : incoming->stage_images) checks[j].stage_parts.push_back(std::move(si.checkpoints[j]));
+                if (stages.empty()) {
+                    checks = std::move(incoming->checkpoints);
+                } else {   // give each checkpoint back its stage parts (moved, not copied); none if they do not line up
+                    strata::core::ConversationCheckpointSplit cs;
+                    cs.stage0 = std::move(incoming->checkpoints);
+                    for (auto& si : incoming->stage_images) cs.parts.push_back(std::move(si.checkpoints));
+                    if (!strata::core::conversation_checkpoints_merge(std::move(cs), checks)) checks.clear();
                 }
                 cvec_cached = incoming->cvec;
                 resume = parked.tokens;
                 from_live = parked.live;
-                if (std::getenv("STRATA_SNAPSHOT_FULL_CAPTURE") == nullptr)
-                    conversations.retain(std::move(incoming->kv), int64_t(live.size()));
+                if (std::getenv("STRATA_SNAPSHOT_FULL_CAPTURE") == nullptr) {
+                    std::vector<std::vector<strata::core::ConversationKv>> stage_kv;   // every stage's, for its next park
+                    for (auto& si : incoming->stage_images) stage_kv.push_back(std::move(si.kv));
+                    conversations.retain(std::move(incoming->kv), int64_t(live.size()), std::move(stage_kv));
+                }
                 incoming.reset(); // Running-state/checkpoint copies are no longer needed.
                 std::fprintf(stderr, "strata serve: conversation cache: restored %lld tokens (%s) in %.1f ms; parked=%zu bytes=%zu\n",
                              (long long) resume, from_live ? "live" : "checkpoint",
diff --git a/tools/parking_test.py b/tools/parking_test.py
index a62b39c72a7..cb2129822d9 100644
--- a/tools/parking_test.py
+++ b/tools/parking_test.py
@@ -47,11 +47,14 @@ def run(a, cfg, tok, with_b):
     t0 = time.time()
     got, done = gen(eng, out, follow, a.max_new)
     dt = time.time() - t0
+    if with_b:   # B again: A is parked a second time, from retained K/V (every stage's) - only its new tail copied
+        gen(eng, out, pb, 8)
     eng.send("QUIT")
     eng.p.wait(timeout=180)
     log = open("/tmp/batch_test_engine.log").read()
     restored = re.findall(r"restored \d+ tokens[^\n]*", log)
-    return len(pa), len(follow), got, done, dt, restored
+    reparked = [int(x) for x in re.findall(r"parked \d+ tokens .*reused_kv_bytes=(\d+)", log)]
+    return len(pa), len(follow), got, done, dt, restored, reparked
 
 
 def main():
@@ -74,7 +77,9 @@ def main():
     first = next((k for k in range(min(len(ref[2]), len(park[2]))) if ref[2][k] != park[2][k]), None)
     print("follow-up tokens:", "IDENTICAL" if same else f"DIFFER at {first}", f"({len(ref[2])} / {len(park[2])})")
     print("   ", repr(tok.decode(park[2])[:200]))
-    return 0 if same and park[5] else 1
+    reused = park[6][-1] if park[6] else 0
+    print(f"second park of A: {reused} bytes of K/V reused (retained from its restore)")
+    return 0 if same and park[5] and reused > 0 else 1
 
 
 if __name__ == "__main__":

From 2cb4bde7313477baff16735a002cd9cc00ae7528 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:50:43 +0300
Subject: [PATCH 066/201] serve: restart a dead engine for real - wait for the
 old process, retry the start, keep the last known context

Seen in long agent sessions (Claude Code, many turns at ~20K tokens): when the engine was ended mid-request (the
60 s watchdog), restart() started the new engine while the old process still held its VRAM. The new one ran out
of memory and exited before READY, `max_context` stayed 0, and from then on every request failed with
"400 ... exceeds the context (0)" until the server was restarted by hand.

- restart() ends the old process first (close(); kill and wait if it is stuck), so its GPU memory is free;
- a start that exits before READY is tried again, 3 times, RESTART_RETRY_S (15 s) apart; `starting` is set
  meanwhile, so a request gets the 503 "starting" of #344;
- `known_ctx` keeps the last context the engine reported: after a restart that failed for good, a request is
  checked against it and reaches run(), which starts the engine again, instead of a 400 about context 0.

Two tests in RestartWindow (both fail without this change): a start that fails once is retried and the engine
comes up; a request after a failed restart gets 200, not a 400. `python -m unittest serve.test_server`: 120 OK.
---
 serve/server.py      | 63 +++++++++++++++++++++++++++++++++++---------
 serve/test_server.py | 55 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 105 insertions(+), 13 deletions(-)

diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..2ac7b25d7d5 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -361,6 +361,7 @@ def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str |
                 pass
             raise RuntimeError("the engine exited before it was ready" + (f" (see {log})" if log else "") +
                                start_failure_hint(log, log_start) + start_log_tail(log, log_start))
+        self.known_ctx = self.max_context   # survives a failed restart: requests keep their limit and restart it
         # (from PR #41, midhatn) a locally built engine can sit next to another release's BUILD.json: engines that
         # report their own version (INFO engine=, 0.1.8+) win, the manifest stays the fallback for older ones
         if self.info.get("engine"):
@@ -420,15 +421,44 @@ def unload(self):
         self.close()
         self.unloaded = True
 
-    def restart(self):
-        """Start the engine again (the same command) after it died; the new process has its own line queue."""
-        self.close()
+    RESTART_RETRY_S = 15.0   # between the tries of restart(): a dying engine's VRAM may take a while to come back
+
+    def restart(self, tries: int = 3):
+        """Start the engine again (the same command) after it died; the new process has its own line queue.
+        The old process is ended first (close(): QUIT, terminate, kill) - its GPU memory is freed only when it is
+        gone, and a new engine started next to it runs out of VRAM and exits before it is ready - and a failed start
+        is retried."""
+        try:
+            self.close()
+        except EngineStuck:
+            try:
+                self.proc.kill()
+                self.proc.wait(timeout=120)
+            except (subprocess.TimeoutExpired, OSError):
+                pass
         info = dict(self.info)
-        # #344: not alive until READY - __init__ sets max_context to 0 and blocks until the engine says READY, and a
-        # request that saw alive() in that window skipped load() and failed with "context (0)".  __init__ clears
-        # `ended` itself once READY (before its pump thread can set it again).
-        self.ended = True
-        self.__init__(*self.spawn)
+        self.starting = True                     # prepare() answers 503 "starting" meanwhile (#344)
+        try:
+            for i in range(tries):
+                # #344: not alive until READY - __init__ sets max_context to 0 and blocks until the engine says
+                # READY, and a request that saw alive() in that window skipped load() and failed with "context
+                # (0)".  __init__ clears `ended` itself once READY (before its pump thread can set it again).
+                self.ended = True
+                try:
+                    self.__init__(*self.spawn)
+                    break
+                except RuntimeError:
+                    try:
+                        self.proc.wait(timeout=60)
+                    except (subprocess.TimeoutExpired, OSError):
+                        pass
+                    if i == tries - 1:
+                        raise
+                    print(f"[strata] the engine did not start (try {i + 1} of {tries}); again in "
+                          f"{self.RESTART_RETRY_S:g} s", flush=True)
+                    time.sleep(self.RESTART_RETRY_S)
+        finally:
+            self.starting = False
         self.info = {**info, **self.info}
 
     def _parse_done(self, line):
@@ -1374,18 +1404,25 @@ def prepare(self, messages, tools, kwargs, max_new=None):
                 for path, _ in encoded:
                     f.write(path.read_bytes())
             self.embeddings.path = combined
-        if self.engine.max_context <= 0:                # #344: (re)starting, not a prompt that is too long
-            raise EngineStarting("the engine is starting (a minute or two); try again shortly")
-        room = self.engine.max_context - CTX_SLACK - len(ids)
+        ctx = self.engine.max_context
+        if ctx <= 0:
+            if getattr(self.engine, "starting", False):   # #344: (re)starting, not a prompt that is too long
+                raise EngineStarting("the engine is starting (a minute or two); try again shortly")
+            # a failed restart leaves max_context 0: check against the last known context, so the request reaches
+            # run() - which starts the engine again - instead of failing with "exceeds the context (0)" forever
+            ctx = getattr(self.engine, "known_ctx", 0)
+            if ctx <= 0:
+                raise EngineStarting("the engine is starting (a minute or two); try again shortly")
+        room = ctx - CTX_SLACK - len(ids)
         if max_new is None or max_new <= 0 or (self.fit_max_tokens and room < 1):
             if room < 1:
                 raise ValueError(f"prompt ({len(ids)} tokens) leaves no room to answer in the context "
-                                 f"({self.engine.max_context}); requests are never truncated")
+                                 f"({ctx}); requests are never truncated")
             max_new = room
         elif max_new > room:
             if not self.fit_max_tokens:
                 raise ValueError(f"prompt ({len(ids)} tokens) + max tokens ({max_new}) exceeds the context "
-                                 f"({self.engine.max_context}); requests are never truncated. Send a smaller "
+                                 f"({ctx}); requests are never truncated. Send a smaller "
                                  f"max_tokens (at most {max(0, room)} here), or add \"fit_max_tokens\": true to the "
                                  "model's strata-<model>.json to shorten it to the room left (#545)")
             max_new = max(1, room)          # --fit-max-tokens: a shorter completion beats a 400
diff --git a/serve/test_server.py b/serve/test_server.py
index 60a19269643..d878c4319cc 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -1955,6 +1955,13 @@ def second():
         break
 '''
 
+FAKE_STRATA_FAIL_ONCE = '''import pathlib, sys, time
+fail = pathlib.Path(sys.argv[sys.argv.index("--fail") + 1])
+if fail.exists():                            # this start fails before READY (as one next to a dying engine did)
+    fail.unlink()
+    sys.exit(1)
+''' + FAKE_STRATA.split("\n", 1)[1]
+
 
 class RestartWindow(unittest.TestCase):
     """#344: while the engine restarts it is not alive (a request waits for the restart instead of reading
@@ -2006,6 +2013,54 @@ def test_not_alive_until_ready(self):
                     gate.touch()
                     eng.unload()
 
+    def test_restart_retries_a_start_that_fails(self):
+        """A dead engine's VRAM is freed only when its process is gone, so a new engine started at once can exit
+        before READY; restart() tries again (3 times) instead of leaving the server with max_context 0."""
+        from unittest import mock
+        import serve.server as server
+        with tempfile.TemporaryDirectory() as d:
+            script, gate, fail = Path(d) / "fake_strata.py", Path(d) / "ready", Path(d) / "fail_once"
+            script.write_text(FAKE_STRATA_FAIL_ONCE, encoding="utf-8")
+            real = server.subprocess.Popen
+            with mock.patch.object(server.subprocess, "Popen",
+                                   lambda cmd, **kw: real([sys.executable, str(script), *cmd[1:]], **kw)), \
+                 mock.patch.object(StrataEngine, "RESTART_RETRY_S", 0.0):
+                gate.touch()
+                eng = StrataEngine("strata", ["--gate", str(gate), "--fail", str(fail)])
+                try:
+                    self.assertEqual(eng.max_context, 4096)
+                    self.assertEqual(eng.known_ctx, 4096)
+                    fail.touch()                          # the next start exits before READY, the one after works
+                    eng.proc.kill()
+                    eng.proc.wait(10)
+                    eng.restart()
+                    self.assertFalse(fail.exists(), "the failing start never ran")
+                    self.assertTrue(eng.alive())
+                    self.assertEqual(eng.max_context, 4096)
+                    self.assertFalse(eng.starting)
+                finally:
+                    gate.touch()
+                    eng.unload()
+
+    def test_failed_restart_keeps_the_known_context(self):
+        """After a restart that failed, max_context is 0 but the engine is not starting: a request is checked against
+        the last known context and reaches run() (which starts the engine again), not a 400 about context 0."""
+        tok = ByteTokenizer()
+        eng = MockEngine(tok, "</think>\n\nok", max_context=0)
+        eng.known_ctx, eng.starting = 4096, False
+        svc = Service(eng, tok, ChatTemplate(ROOT / "serve/chat_template.jinja"))
+        httpd = serve(svc, port=0)
+        base = f"http://127.0.0.1:{httpd.server_address[1]}"
+        try:
+            req = urllib.request.Request(base + "/v1/chat/completions",
+                                         data=json.dumps({"model": "m", "max_tokens": 16,
+                                                          "messages": [{"role": "user", "content": "hi"}]}).encode(),
+                                         headers={"Content-Type": "application/json"})
+            with urllib.request.urlopen(req, timeout=30) as r:
+                self.assertEqual(r.status, 200)
+        finally:
+            httpd.shutdown()
+
     def test_context_zero_is_503(self):
         tok = ByteTokenizer()
         svc = Service(MockEngine(tok, "</think>\n\nok", max_context=0), tok,

From d86dcb7e3573ccc81226031a69f70628d87ecc0c Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:09:15 +0200
Subject: [PATCH 067/201] serve: restart() keeps 0.1.38's close() (PR #637
 follow-up)

0.1.38's close() already ends the old engine and waits for it (QUIT, terminate, kill, 20 s each) and raises
EngineStuck when it cannot. The PR's second kill and 120 s wait, after which a new engine was started next to one
still alive, is left out; the start retry and the last known context stay.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/server.py | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/serve/server.py b/serve/server.py
index 2ac7b25d7d5..95ba6be2a22 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -425,17 +425,10 @@ def unload(self):
 
     def restart(self, tries: int = 3):
         """Start the engine again (the same command) after it died; the new process has its own line queue.
-        The old process is ended first (close(): QUIT, terminate, kill) - its GPU memory is freed only when it is
-        gone, and a new engine started next to it runs out of VRAM and exits before it is ready - and a failed start
-        is retried."""
-        try:
-            self.close()
-        except EngineStuck:
-            try:
-                self.proc.kill()
-                self.proc.wait(timeout=120)
-            except (subprocess.TimeoutExpired, OSError):
-                pass
+        close() ends and waits for the old process first (EngineStuck when it cannot be ended).  A start that still
+        exits before READY - a dead engine's VRAM can take a while to come back, notably on ROCm - is retried
+        (PR #637)."""
+        self.close()
         info = dict(self.info)
         self.starting = True                     # prepare() answers 503 "starting" meanwhile (#344)
         try:

From e50592bed8792569b7938d7d1601821a969dbde2 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:09:27 +0200
Subject: [PATCH 068/201] serve: a malformed "tools" value is a 400, not a
 dropped connection (#592)

openai_to_messages / anthropic_to_messages check that tools is a list of
named tool objects (a JSON-string list is decoded, as for messages) and
raise ValueError otherwise; the MCP name set skips non-objects too.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/frontend.py    | 27 ++++++++++++++++++++++++---
 serve/server.py      |  2 +-
 serve/test_server.py | 30 ++++++++++++++++++++++++++++++
 3 files changed, 55 insertions(+), 4 deletions(-)

diff --git a/serve/frontend.py b/serve/frontend.py
index 07e369d0a8b..007d06df2d6 100644
--- a/serve/frontend.py
+++ b/serve/frontend.py
@@ -160,6 +160,27 @@ def _object_list(value, name: str) -> list[dict]:
     return value
 
 
+def _tool_list(value, wrapper: str | None) -> list[dict]:
+    """#592: a request's "tools" as a list of tool objects, each with a name - in the OpenAI shape
+    {"type": "function", "function": {"name": ...}} (`wrapper` "function"; a bare {"name": ...} is still taken), or
+    in the Anthropic shape {"name": ...} (`wrapper` None).  A value that is not (a string such as "auto", a list of
+    names, an object without a name) is a ValueError - a 400 naming the field - where it used to take the request
+    thread down with no reply at all.  No value (or an empty one) is no tools, as always."""
+    if not value:
+        return []
+    shape = ('{"type": "function", "function": {"name": ..., "parameters": {...}}}' if wrapper else
+             '{"name": ..., "input_schema": {...}}')
+    try:
+        tools = _object_list(value, "tools")
+    except ValueError:
+        raise ValueError(f"tools must be a list of tool objects, each {shape}") from None
+    for i, t in enumerate(tools):
+        fn = t.get(wrapper, t) if wrapper and t.get("type") == wrapper else t
+        if not isinstance(fn, dict) or not isinstance(fn.get("name"), str) or not fn["name"]:
+            raise ValueError(f"tools[{i}] has no name: each tool must be {shape}")
+    return tools
+
+
 def openai_to_messages(req: dict) -> tuple[list[dict], list[dict] | None, dict]:
     """OpenAI Chat Completions -> (template messages, template tools, template kwargs)."""
     messages = []
@@ -182,8 +203,8 @@ def openai_to_messages(req: dict) -> tuple[list[dict], list[dict] | None, dict]:
                 calls.append({"function": {"name": fn.get("name"), "arguments": args or {}}})
             out["tool_calls"] = calls
         messages.append(out)
-    tools = [t.get("function", t) if isinstance(t, dict) and t.get("type") == "function" else t
-             for t in req.get("tools") or []] or None
+    tools = [t.get("function", t) if t.get("type") == "function" else t
+             for t in _tool_list(req.get("tools"), "function")] or None
     kwargs = {}
     # OpenAI Chat Completions: "reasoning_effort"; Responses style: "reasoning": {"effort": ...}
     reasoning = req.get("reasoning") if isinstance(req.get("reasoning"), dict) else {}
@@ -233,7 +254,7 @@ def anthropic_to_messages(req: dict, think_unasked: bool = True) -> tuple[list[d
                 out["tool_calls"] = calls
             messages.append(out)
     tools = [{"name": t["name"], "description": t.get("description", ""), "parameters": t.get("input_schema", {})}
-             for t in req.get("tools") or []] or None
+             for t in _tool_list(req.get("tools"), None)] or None
     kwargs = {}
     # Anthropic: "thinking": {"type": "disabled"} or {"type": "enabled", "budget_tokens": N};
     # "output_config": {"effort": "low" | "medium" | "high"}
diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..606bad5dd3a 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -2419,7 +2419,7 @@ def _openai(self, req):
             svc.load()
             max_req = max_new = int(req.get("max_completion_tokens") or req.get("max_tokens") or 0)   # 0/-1: the rest
             use_mcp = req.get("strata_mcp") is True and svc.mcp is not None      # the web app's opt-in (serve/mcp.py)
-            own = {t.get("name") for t in tools or []}
+            own = {t.get("name") for t in tools or [] if isinstance(t, dict)}   # #592: a second line of defence
             if use_mcp:
                 if not self._own_page("MCP tools can be used"):   # tools run with the user's rights on this PC
                     return
diff --git a/serve/test_server.py b/serve/test_server.py
index 60a19269643..51101e69525 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -499,6 +499,36 @@ def test_messages_as_a_json_string_over_http(self):
                 self.assertEqual(status, 400, b)
                 self.assertIn("messages must be a list of objects", b["error"]["message"])
 
+    def test_malformed_tools_are_a_400(self):
+        # #592: a "tools" value that is not a list of named tool objects is a 400 naming the field, on both APIs,
+        # not a dropped connection (an AttributeError/TypeError in the request thread)
+        msgs = [{"role": "user", "content": "hi"}]
+        bad = ("auto", ["get_weather"], [{"description": "no name"}], {"name": "x"},
+               [{"type": "function", "function": "get_weather"}], [{"type": "function", "function": {"name": ""}}])
+        for path in ("/v1/chat/completions", "/v1/messages"):
+            for tools in bad:
+                with self.subTest(path=path, tools=tools):
+                    status, b = self.post(path, {"model": "x", "max_tokens": 8, "messages": msgs, "tools": tools})
+                    self.assertEqual(status, 400, b)
+                    self.assertIn("tools", b["error"]["message"])
+        status, b = self.post("/v1/chat/completions", {"model": "x", "max_tokens": 8, "messages": msgs})
+        self.assertEqual(status, 200, b)                            # the server goes on
+
+    def test_well_formed_tools_still_work(self):
+        msgs = [{"role": "user", "content": "hi"}]
+        fn = {"name": "get_weather", "description": "the weather", "parameters": {"type": "object", "properties": {}}}
+        for path, tools in (("/v1/chat/completions", [{"type": "function", "function": fn}]),
+                            ("/v1/chat/completions", [fn]),                 # the bare shape some clients send
+                            ("/v1/chat/completions", json.dumps([{"type": "function", "function": fn}])),
+                            ("/v1/chat/completions", []), ("/v1/chat/completions", None),
+                            ("/v1/messages", [{"name": "get_weather", "input_schema": {"type": "object"}}]),
+                            ("/v1/messages", [])):
+            with self.subTest(path=path, tools=tools):
+                status, b = self.post(path, {"model": "x", "max_tokens": 8, "messages": msgs, "tools": tools})
+                self.assertEqual(status, 200, b)
+                if tools:
+                    self.assertIn("get_weather", self.prompt_text())
+
     def test_vision_temp_image_removed_when_the_pipe_fails(self):
         # #352: the temporary image goes even when the encoder's pipe raises
         from serve.server import Vision

From f4a2f0a618a66ce2039eaeac6aa80a9d98efc5fc Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:12:53 +0200
Subject: [PATCH 069/201] File tier: decide unbuffered reads from the expert
 bytes it reads, again once the RAM copy is built (#577)

0.1.38 made the choice before the resident set existed, from the budget asked for, against every shard's bytes
(dense weights and the PLE table included). On a 96 GB PC with UD-Q4_K_XL (budget 72 GiB, 48.94 GiB really
resident) that read 83.0 - 72 - 4 = 7 GiB of room against 103.7 GiB of files, so every refill after a prompt read
the drive: prompts 15-40% slower than 0.1.34.

- platform::file_cache_keeps(avail, arena, read): the decision, unit-tested in platform_memory_test with the
  reporter's numbers and the 32/64 GB PCs of #357/#362.
- set_unbuffered: the arena is at most every expert's bytes, and the cache has to keep only the experts outside it.
- recheck_unbuffered, after pin_cache_complement: the same decision from the RAM the copy really holds and the
  expert bytes outside it; switches either way (startup, nothing reading) and logs the numbers.
- The 32 and 64 GB PCs still read unbuffered (the profile fill and the copy too, as before).

Same tokens either way: only how the same bytes are read changes.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/core/expert_source.hpp |  7 +++
 include/strata/core/pinned.hpp        |  5 ++-
 include/strata/platform/memory.hpp    | 11 +++++
 src/core/expert_source.cpp            | 64 ++++++++++++++++++++++++---
 src/core/pinned.cu                    | 20 ++++++---
 src/platform/memory_test.cpp          | 39 +++++++++++++++-
 src/program/generate.cpp              | 10 +++++
 7 files changed, 141 insertions(+), 15 deletions(-)

diff --git a/include/strata/core/expert_source.hpp b/include/strata/core/expert_source.hpp
index 4c4d12f56f3..3fe753f236d 100644
--- a/include/strata/core/expert_source.hpp
+++ b/include/strata/core/expert_source.hpp
@@ -480,8 +480,14 @@ class FileExpertSource : public ExpertSource {
     /// beside `ram_bytes` (the RAM budget), cached now or not (their mapped pages would land in the working set); see
     /// experts_unbuffered.  The mapped reads' page faults are one small request each, and the pages they bring in
     /// take the RAM the budget was sized for.  `why` says what decided.
+    /// #577: `ram_bytes` counts up to every expert, and only the experts outside it are what the cache must keep.
     bool set_unbuffered(uint64_t ram_bytes, std::string& why);
+    /// #577: the same decision once the RAM copy is built (pin_cache_complement), from the RAM it really holds and the
+    /// expert bytes outside it; switches either way (startup only, nothing reading).  Returns whether unbuffered.
+    bool recheck_unbuffered(std::string& why);
     bool unbuffered() const { return !direct_.empty(); }
+    /// Every expert's bytes (n_layers x n_expert blobs).
+    uint64_t expert_bytes() const;
     /// #286, unbuffered: assembles the blobs of these pairs ahead of the `blob` calls that will ask for them (the
     /// GPU cache's fill from the profile) - one batch of reads instead of one blob at a time.  At most 64 pairs.
     void prefetch_pairs(const std::pair<int32_t, int32_t>* pairs, int64_t n);
@@ -524,6 +530,7 @@ class FileExpertSource : public ExpertSource {
     /// #286: the blobs from the drive, unbuffered: every role's 4 KiB-aligned window is read at once (overlapped)
     /// into this thread's aligned buffer, then copied into place.  False when a read fails.
     bool read_direct(const Fill* fills, size_t n) const;
+    bool open_direct(std::string& why);
     std::vector<std::string> paths_;          ///< the mapped files, as maps_
     std::vector<void*> direct_;               ///< #286: per file, an unbuffered overlapped handle (Windows)
     std::vector<int> role_file_;              ///< 3 x n_layers: index into maps_ / direct_
diff --git a/include/strata/core/pinned.hpp b/include/strata/core/pinned.hpp
index 9c9c380503d..28a6f987609 100644
--- a/include/strata/core/pinned.hpp
+++ b/include/strata/core/pinned.hpp
@@ -117,8 +117,11 @@ LoadStats load_experts_direct(const std::string& path, uint8_t* dst, const std::
 /// STRATA_UNBUFFERED_LOAD=1 / 0 forces it. `why` says what decided.
 /// `cache_counts` false (the file tier with a RAM budget): only whether the files could be kept decides - their mapped
 /// pages land in the process's working set, so a partly cached file would still take the RAM the budget was sized for.
+/// `read_bytes` (#577): the bytes the files are read for, when that is less than the files (the file tier reads only
+/// the experts outside its RAM copy); `kAllFileBytes` = every byte of `files`.  See platform::file_cache_keeps.
+constexpr uint64_t kAllFileBytes = ~0ull;
 bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_bytes, std::string& why,
-                        bool cache_counts = true);
+                        bool cache_counts = true, uint64_t read_bytes = kAllFileBytes);
 
 // FNV-1a 64.  Per layer, so a corrupt or short read names WHICH layer rather than just failing a whole-file
 // comparison - the same reason the Phase 1 tools report the first differing element.
diff --git a/include/strata/platform/memory.hpp b/include/strata/platform/memory.hpp
index ece6c9e4a17..202a3bf25b2 100644
--- a/include/strata/platform/memory.hpp
+++ b/include/strata/platform/memory.hpp
@@ -32,4 +32,15 @@ bool gpu_shared_memory_budget(const void* luid, uint64_t& budget, uint64_t& usag
 /// The machine's physical RAM in bytes (0 when unknown).
 uint64_t total_physical_memory();
 
+/// #357/#577: whether the OS file cache could keep the `read_bytes` the expert files are read for, beside
+/// `arena_bytes` of RAM held by the engine's own copy of the experts and `margin` for everything else, with `avail`
+/// bytes of RAM available.  The file tier passes only the expert bytes it really reads from the files (the experts
+/// outside its resident RAM copy) and the RAM that copy really holds - not every shard's bytes and the requested
+/// budget, which on a 96 GB PC (#577) made the file tier read unbuffered when the cache could keep its reads.
+inline bool file_cache_keeps(uint64_t avail, uint64_t arena_bytes, uint64_t read_bytes,
+                             uint64_t margin = 4ull << 30) {
+    const uint64_t room = avail > arena_bytes + margin ? avail - arena_bytes - margin : 0;
+    return room >= read_bytes;
+}
+
 }  // namespace strata::platform
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index c64909f543c..bb3badfcc9c 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -872,13 +872,14 @@ void FileExpertSource::fill_many(const std::vector<Fill>& todo) {
     for (auto& t : th) t.join();
 }
 
-bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
+uint64_t FileExpertSource::expert_bytes() const {
+    uint64_t total = 0;
+    for (uint64_t b : layer_blob_bytes_) total += b * (uint64_t) n_expert_;
+    return total;
+}
+
+bool FileExpertSource::open_direct(std::string& why) {
 #if defined(_WIN32)
-    if (base_ == nullptr || paths_.empty() || !direct_.empty()) {
-        why = !direct_.empty() ? "already unbuffered" : "no expert files open";
-        return !direct_.empty();
-    }
-    if (!experts_unbuffered(paths_, ram_bytes, why, /*cache_counts=*/false)) return false;
     for (const std::string& path : paths_) {
         const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
         std::vector<wchar_t> w((size_t) (wide > 0 ? wide : 1), L'\0');
@@ -899,6 +900,24 @@ bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
         for (uint64_t b : layer_blob_bytes_) stage_blob_ = std::max(stage_blob_, b);
     }
     return true;
+#else
+    (void) why;
+    return false;
+#endif
+}
+
+bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
+#if defined(_WIN32)
+    if (base_ == nullptr || paths_.empty() || !direct_.empty()) {
+        why = !direct_.empty() ? "already unbuffered" : "no expert files open";
+        return !direct_.empty();
+    }
+    // #577: the file tier reads the experts outside the RAM copy, not every byte of the shards (dense weights, the
+    // PLE table), and the copy holds at most every expert - the budget asked for can be more than that
+    const uint64_t experts = expert_bytes();
+    const uint64_t arena = std::min(ram_bytes, experts);
+    if (!experts_unbuffered(paths_, arena, why, /*cache_counts=*/false, experts - arena)) return false;
+    return open_direct(why);
 #else
     (void) ram_bytes;
     why = "through the file cache (not Windows)";
@@ -906,6 +925,39 @@ bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
 #endif
 }
 
+bool FileExpertSource::recheck_unbuffered(std::string& why) {
+#if defined(_WIN32)
+    if (const char* env = std::getenv("STRATA_UNBUFFERED_LOAD"); env != nullptr && env[0] != '\0') {
+        why = std::string("STRATA_UNBUFFERED_LOAD=") + env;
+        return !direct_.empty();
+    }
+    if (base_ == nullptr || paths_.empty()) {
+        why = "no expert files open";
+        return false;
+    }
+    // #577: the RAM copy is built (and already out of the available RAM), so what the file cache would have to keep
+    // is exactly the experts outside it - the GPU cache's (refilled after a prompt borrowed their slots) and the
+    // ones neither holds
+    const uint64_t experts = expert_bytes();
+    const uint64_t read = experts > complement_bytes_ ? experts - complement_bytes_ : 0;
+    std::string w;
+    const bool ub = experts_unbuffered(paths_, 0, w, /*cache_counts=*/false, read);
+    char head[96];
+    std::snprintf(head, sizeof head, "re-checked with the RAM copy built (%.2f GiB): ",
+                  (double) complement_bytes_ / 1073741824.0);
+    why = head + w;
+    if (ub == !direct_.empty()) return ub;
+    if (ub) return open_direct(why);
+    // through the file cache after all: the mapped reads take over (staged() stays true for the GGUF in place)
+    for (void* d : direct_) CloseHandle((HANDLE) d);
+    direct_.clear();
+    return false;
+#else
+    why = "through the file cache (not Windows)";
+    return false;
+#endif
+}
+
 bool FileExpertSource::read_direct(const Fill* fills, size_t n) const {
 #if defined(_WIN32)
     // NTFS runs the unbuffered reads of a file one at a time while the file is mapped or cached anywhere (the engine
diff --git a/src/core/pinned.cu b/src/core/pinned.cu
index e28307e0952..780d93fb7ae 100644
--- a/src/core/pinned.cu
+++ b/src/core/pinned.cu
@@ -503,7 +503,7 @@ LoadStats load_experts_direct(const std::string& path, uint8_t* dst, const std::
 }
 
 bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_bytes, std::string& why,
-                        bool cache_counts) {
+                        bool cache_counts, uint64_t read_bytes) {
     const char* env = std::getenv("STRATA_UNBUFFERED_LOAD");
     if (env != nullptr && env[0] != '\0') {
         why = std::string("STRATA_UNBUFFERED_LOAD=") + env;
@@ -551,15 +551,21 @@ bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_by
     GlobalMemoryStatusEx(&ms);
     const uint64_t avail = ms.ullAvailPhys;
     // what the cache could keep beside the arena (~4 GiB for everything else)
-    const uint64_t room = avail > arena_bytes + (4ull << 30) ? avail - arena_bytes - (4ull << 30) : 0;
-    const bool keepable = room >= total_bytes;
-    char msg[200];
-    std::snprintf(msg, sizeof msg, "%d of %d probe reads from the file cache; %.1f GiB available, %.1f GiB of files",
-                  fast, n, (double) avail / (1ull << 30), (double) total_bytes / (1ull << 30));
+    const uint64_t need = read_bytes == kAllFileBytes ? total_bytes : read_bytes;
+    const bool keepable = strata::platform::file_cache_keeps(avail, arena_bytes, need);
+    char msg[256];
+    if (read_bytes == kAllFileBytes)
+        std::snprintf(msg, sizeof msg, "%d of %d probe reads from the file cache; %.1f GiB available, %.1f GiB of files",
+                      fast, n, (double) avail / (1ull << 30), (double) total_bytes / (1ull << 30));
+    else
+        std::snprintf(msg, sizeof msg, "%.1f GiB available, %.1f GiB of it still to be taken by the RAM copy, %.1f GiB "
+                      "of experts read from the files: the file cache %s keep them",
+                      (double) avail / (1ull << 30), (double) arena_bytes / (1ull << 30), (double) need / (1ull << 30),
+                      keepable ? "can" : "cannot");
     why = msg;
     return (!cached || !cache_counts) && !keepable;
 #else
-    (void) files; (void) arena_bytes; (void) cache_counts;
+    (void) files; (void) arena_bytes; (void) cache_counts; (void) read_bytes;
     why = "buffered (not Windows)";
     return false;
 #endif
diff --git a/src/platform/memory_test.cpp b/src/platform/memory_test.cpp
index e5b4cde73d1..7346189d66d 100644
--- a/src/platform/memory_test.cpp
+++ b/src/platform/memory_test.cpp
@@ -13,7 +13,44 @@
 #pragma comment(lib, "psapi.lib")
 #endif
 
+namespace {
+uint64_t gib(double g) { return (uint64_t) (g * 1073741824.0); }
+
+// #577: the file tier's unbuffered choice (true = the file cache keeps its reads, so they stay buffered)
+int file_cache_keeps_cases() {
+    using strata::platform::file_cache_keeps;
+    struct Case { const char* what; double avail, arena, read; bool keeps; };
+    const double experts = 71.7;   // UD-Q4_K_XL's routed experts
+    const Case cases[] = {
+        // the reporter's 96 GB PC (83.0 GiB available at start): 0.1.38 passed the budget asked for and every
+        // shard's bytes (103.7 GiB) and went unbuffered
+        {"96 GB, 0.1.38's inputs (budget 72, all shards)", 83.0, 72.0, 103.7, false},
+        {"96 GB, budget 72, before the copy (arena = all experts)", 83.0, experts, 0.0, true},
+        {"96 GB, budget 72, copy built (48.94 resident)", 83.0 - 48.94, 0.0, experts - 48.94, true},
+        {"96 GB, budget 40, before the copy", 83.0, 40.0, experts - 40.0, true},
+        {"96 GB, budget 40, copy built", 83.0 - 40.0, 0.0, experts - 40.0, true},
+        // #357/#362's low-RAM PCs stay unbuffered
+        {"64 GB, budget 40, before the copy", 55.0, 40.0, experts - 40.0, false},
+        {"64 GB, budget 40, copy built", 15.0, 0.0, experts - 40.0, false},
+        {"32 GB, budget 16, before the copy", 26.0, 16.0, experts - 16.0, false},
+        {"32 GB, budget 16, copy built", 10.0, 0.0, experts - 16.0, false},
+        {"32 GB, Q2_0 pack (34 GiB experts), budget 8", 26.0, 8.0, 34.0 - 8.0, false},
+        {"nothing available", 0.0, 0.0, 1.0, false},
+        {"arena larger than the RAM", 10.0, 20.0, 0.0, true},
+    };
+    int fail = 0;
+    for (const Case& c : cases) {
+        const bool got = file_cache_keeps(gib(c.avail), gib(c.arena), gib(c.read));
+        std::printf("file_cache_keeps %-58s -> %s%s\n", c.what, got ? "buffered" : "unbuffered",
+                    got == c.keeps ? "" : "   <-- WRONG");
+        fail |= got != c.keeps;
+    }
+    return fail;
+}
+}  // namespace
+
 int main() {
+    int fail_keeps = file_cache_keeps_cases();
     const uint64_t bytes = 256ull << 20;
     void* p = std::malloc(bytes);
     if (p == nullptr) return 2;
@@ -21,7 +58,7 @@ int main() {
     const strata::platform::LockResult r = strata::platform::lock_resident(p, bytes);
     std::printf("lock_resident: ok=%d locked=%llu MiB (%s)\n", (int) r.ok, (unsigned long long) (r.locked_bytes >> 20),
                 r.note.c_str());
-    int fail = !(r.ok && r.locked_bytes == bytes);
+    int fail = !(r.ok && r.locked_bytes == bytes) | fail_keeps;
 #if defined(_WIN32)
     PROCESS_MEMORY_COUNTERS pmc{};
     GetProcessMemoryInfo(GetCurrentProcess(), &pmc, sizeof pmc);
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a7c77d0efff..1e5988a3be5 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4082,6 +4082,16 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
             return 1;
         }
+        // #577: the unbuffered choice above was made before the RAM copy existed, from the budget asked for; now the
+        // copy is built, decide again from the RAM it really holds and the expert bytes outside it (on a 96 GB PC
+        // the file cache keeps those, and every refill after a prompt read the drive instead)
+        if (o.mmap_experts && o.resident_budget > 0) {
+            std::string why;
+            const bool was = src.unbuffered();
+            const bool ub = src.recheck_unbuffered(why);
+            std::fprintf(stderr, "strata generate: the file tier reads %s%s (%s)\n",
+                         ub ? "unbuffered" : "through the file cache", ub == was ? "" : " (changed)", why.c_str());
+        }
     }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||

From 4f3973abdde6a8e58ef833ed295a027c32e045ff Mon Sep 17 00:00:00 2001
From: David <David@code.contractors>
Date: Sat, 3 Oct 2026 18:12:54 +0200
Subject: [PATCH 070/201] serve: read the /load and /unload body before
 replying (#630)

The server replied to /load and /unload without reading the request body; on
Windows, closing a socket with unread data sends a TCP reset, so the client saw
a connection reset instead of the answer. Read the (bounded) body first.

Taken from #630 by CC-David-CC.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/server.py        | 24 ++++++++++++++++++++++++
 serve/test_security.py | 25 +++++++++++++++++++++++++
 2 files changed, 49 insertions(+)

diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..fb1dbbcd2b5 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -2226,6 +2226,8 @@ def do_POST(self):
             if path == "/settings":
                 self._settings()
                 return
+            if path in ("/unload", "/load") and not self._control_body():
+                return
             # JSON from Strata's own page only, as /settings: else a plain form POST from any site unloads the model
             if path in ("/unload", "/load") and not self._own_page("the model can be loaded or unloaded"):
                 return
@@ -2335,6 +2337,28 @@ def _props(self):
                 props["build_info"] = "Strata " + str(version)
             self._json(200, props)
 
+        def _control_body(self) -> bool:
+            """Consume the unused control body before replying/closing (Windows otherwise sends a TCP reset)."""
+            try:
+                length = int(self.headers.get("Content-Length", "0"))
+            except ValueError:
+                self._json(400, {"error": {"message": "invalid Content-Length"}})
+                return False
+            if not 0 <= length <= 65536:
+                self._json(413, {"error": {"message": "control request body is limited to 64 KiB"}})
+                return False
+            timeout = self.connection.gettimeout()
+            try:
+                self.connection.settimeout(2.0)
+                complete = len(self.rfile.read(length)) == length
+            except OSError:
+                complete = False
+            finally:
+                self.connection.settimeout(timeout)
+            if not complete:
+                self._json(400, {"error": {"message": "incomplete control request body"}})
+            return complete
+
         def _own_page(self, what) -> bool:
             """Only JSON (a form or a "simple" cross-site request can't send it without a CORS preflight, which this
             server never grants) and no foreign Origin: a web page elsewhere must not change settings or run tools."""
diff --git a/serve/test_security.py b/serve/test_security.py
index cebd756d126..429c7162177 100644
--- a/serve/test_security.py
+++ b/serve/test_security.py
@@ -238,6 +238,31 @@ def test_with_a_key_the_key_decides(self):
                                   {**headers, "Authorization": "Bearer s3cret"})[0], 200)
 
     # --- /unload and /load
+    def test_control_body_arrives_before_the_operation_and_reply(self):
+        self.start()
+        for body, expected in ((b"{}", 200), (b"{", 400)):
+            c = http.client.HTTPConnection("127.0.0.1", self.port, timeout=5)
+            try:
+                with mock.patch.object(self.svc, "unload", return_value="unloaded") as unload:
+                    c.putrequest("POST", "/unload")
+                    c.putheader("Content-Type", "application/json")
+                    c.putheader("Content-Length", "2")
+                    c.endheaders()
+                    c.sock.settimeout(0.1)
+                    with self.assertRaises(socket.timeout):
+                        c.sock.recv(1)
+                    unload.assert_not_called()
+                    c.sock.settimeout(5)
+                    c.send(body)
+                    if len(body) < 2:
+                        c.sock.shutdown(socket.SHUT_WR)
+                    r = c.getresponse()
+                    self.assertEqual(r.status, expected)
+                    r.read()
+                    self.assertEqual(unload.call_count, int(expected == 200))
+            finally:
+                c.close()
+
     def test_unload_and_load_need_json_from_the_own_page(self):
         self.start()
         form = {"Content-Type": "application/x-www-form-urlencoded"}

From 7c77eae2ef3f130cf7ade051f5dae28b3ca423ff Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:12:58 +0200
Subject: [PATCH 071/201] Load the native head and the logits before the expert
 arena; name the free VRAM when they fail (#620)

The native head's cudaMalloc ran after the expert arena had registered ~45 GiB of host pages. WDDM then refused it
on a 16 GB card with the desktop on the iGPU ("native head upload: out of memory" with GiBs free) - the drafter is
loaded before the arena for the same reason. Now the head and the logits buffer load right after the drafter, still
before the expert cache is sized, so the slots are the same. The head's, the drafter's and a split stage's head
failures print "(N MiB of M MiB VRAM free on this GPU)".

setup: a context of 64K or more whose KV streaming does not fit the RAM test now says so (it was silent, and a
regenerated config lost --kv-resident without a word).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                 |  4 +++
 src/program/generate.cpp | 69 +++++++++++++++++++++++++---------------
 2 files changed, 48 insertions(+), 25 deletions(-)

diff --git a/setup.py b/setup.py
index bc5cdd3002c..c1990b7d92b 100644
--- a/setup.py
+++ b/setup.py
@@ -3597,6 +3597,10 @@ def main() -> int:
         elif budget is not None and budget > resident_budget_gib(model, ram, kv_ram_gb):
             warn(f"the KV cache's {kv_ram_gb:.1f} GB of RAM come on top of your {budget:g} GiB RAM budget (setup "
                  f"would take them out of it: {resident_budget_gib(model, ram, kv_ram_gb)} GiB); kept as you chose")
+    elif ctx >= 65536:   # #620: say why, so a regenerated config that lost --kv-resident is not a surprise
+        ok(f"KV streaming off: it needs ~{kv_ram_gb:.1f} GB of RAM beside the ~{MODELS[model]['ram_gb']} GB {model} "
+           f"uses, and this PC has {ram:.0f}; the KV cache stays in VRAM (fewer cached experts). --kv-streaming on "
+           "turns it on anyway")
     elif a.kv_streaming == "on":
         warn("--kv-streaming on: a context under 64K is not streamed (the attention's window holds all of it): off")
     if budget is not None and not q4_split:   # UD-Q4_K_XL: the experts read from the GGUF in place, the most-used N
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 1e5988a3be5..cb991841ea5 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -113,6 +113,20 @@ bool under_wddm() {
 #endif
 }
 
+// #620 #486: " (N MiB of M MiB VRAM free on this GPU)" for an allocation's failure message (clears the error first)
+std::string vram_free_note() {
+    (void) cudaGetLastError();
+    size_t free_b = 0, total_b = 0;
+    if (cudaMemGetInfo(&free_b, &total_b) != cudaSuccess) {
+        (void) cudaGetLastError();
+        return {};
+    }
+    char buf[96];
+    std::snprintf(buf, sizeof buf, " (%llu MiB of %llu MiB VRAM free on this GPU)", (unsigned long long) (free_b >> 20),
+                  (unsigned long long) (total_b >> 20));
+    return buf;
+}
+
 // perf-review D-4: the lent slots are refilled with queued copies and one wait; STRATA_REFILL_BLOCKING=1 waits on each
 bool refill_blocking() {
     static const bool v = std::getenv("STRATA_REFILL_BLOCKING") != nullptr;
@@ -2637,8 +2651,9 @@ int main(int argc, char** argv) {
         const strata::core::WeightRef* wo_s = st.wt.find("output.weight");
         if (wo_s == nullptr ||
             (last && !o.native_head_gguf.empty() && !st.head.load(o.native_head_shards, g.n_embd, wo_s->ne1, err))) {
-            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s\n", st.dev,
-                         wo_s == nullptr ? "output.weight is missing" : err.c_str());
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s%s\n", st.dev,
+                         wo_s == nullptr ? "output.weight is missing" : err.c_str(),
+                         wo_s == nullptr ? "" : vram_free_note().c_str());
             return 1;
         }
         size_t fb = 0, tb = 0;
@@ -2662,7 +2677,32 @@ int main(int argc, char** argv) {
         static const strata::core::ModelGeometry draft_geometry{};
         // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
         const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
-        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
+        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(), vram_free_note().c_str()); return 1; }
+    }
+    // THE HEAD BEFORE THE CACHE, AND BEFORE THE ARENA.  The expert cache takes what is free minus the reserve, so
+    // everything allocated after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after
+    // it and ate most of the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for
+    // good at its first verify window.  Loaded first, the cache is sized around it.  #620: and before the expert
+    // arena registers tens of GiB of host pages, like the drafter above - WDDM then refused the head's cudaMalloc on
+    // a 16 GB card with the desktop on the iGPU ("native head upload: out of memory" with GiBs free).
+    const strata::core::WeightRef* wo = wt.find("output.weight");
+    if (wo == nullptr) { std::fprintf(stderr, "strata generate: output.weight is missing\n"); return 1; }
+    const int64_t n_vocab = wo->ne1;
+    strata::core::NativeHead native_head;
+    if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
+        if (!native_head.load(o.native_head_shards, g.n_embd, n_vocab, err)) {
+            std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(), vram_free_note().c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experimental native Q5_K head, %llu bytes\n",
+                     (unsigned long long) native_head.weight_bytes());
+    }
+    std::vector<float> logits((size_t) n_vocab);
+    float* d_logits = nullptr;
+    if (cudaMalloc(&d_logits, (size_t) n_vocab * 4) != cudaSuccess) {
+        (void) cudaGetLastError();
+        std::fprintf(stderr, "strata generate: the logits buffer failed%s\n", vram_free_note().c_str());
+        return 1;
     }
     // Create the additional contexts after MTP has secured CUDA0 memory, but
     // before the host arena maps its expert pages into their address spaces.
@@ -2819,28 +2859,7 @@ int main(int argc, char** argv) {
     // numbers if the slots do not fit, instead of handing back a cache smaller than it was asked for.
     mem_mark("the weights, the session and the drafter");
     strata::core::ExpertCache xcache;
-    // THE HEAD BEFORE THE CACHE.  The expert cache takes what is free minus the reserve, so everything allocated
-    // after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after it and ate most of
-    // the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for good at its first
-    // verify window.  Loaded first, the cache is sized around it.
-    const strata::core::WeightRef* wo = wt.find("output.weight");
-    if (wo == nullptr) { std::fprintf(stderr, "strata generate: output.weight is missing\n"); return 1; }
-    const int64_t n_vocab = wo->ne1;
-    strata::core::NativeHead native_head;
-    if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
-        if (!native_head.load(o.native_head_shards, g.n_embd, n_vocab, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: experimental native Q5_K head, %llu bytes\n",
-                     (unsigned long long) native_head.weight_bytes());
-    }
-    std::vector<float> logits((size_t) n_vocab);
-    float* d_logits = nullptr;
-    if (cudaMalloc(&d_logits, (size_t) n_vocab * 4) != cudaSuccess) {
-        std::fprintf(stderr, "strata generate: the logits buffer failed\n");
-        return 1;
-    }
+    // THE HEAD BEFORE THE CACHE: the native head and the logits are allocated above, before the expert arena (#620)
     const bool auto_cache = o.expert_cache < 0;
     bool reserve_adapted = false;   // #496: the auto sizing lowered the reserve so a small card's cache fits
     if (o.expert_cache < 0) {

From ca8125c387ce38f7557e61ed00765bfb413a4605 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:13:28 +0200
Subject: [PATCH 072/201] setup: running it again keeps the run config's keys
 it does not write (#629)

A re-run for an installed model (another --context, say) rewrote
strata-<model>.json from scratch and dropped the user's sampling,
mcp_servers, mcp and other blocks. Setup now carries over every key it
does not write (and env/vision entries of the user's own, such as a Q8_0
mmproj), keeps the earlier file as strata-<model>.json.bak and says what
it kept and which hand-added engine options it did not. A copy set up
like an earlier install carries them over from that install's config.
A first install writes the same config as before.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/INSTALL.md            |   6 +-
 setup.py                   |  84 ++++++++++++++++++++++-
 tools/test_setup_config.py | 135 +++++++++++++++++++++++++++++++++++++
 3 files changed, 223 insertions(+), 2 deletions(-)
 create mode 100644 tools/test_setup_config.py

diff --git a/docs/INSTALL.md b/docs/INSTALL.md
index 7af3a3e8bf9..7f32e991b36 100644
--- a/docs/INSTALL.md
+++ b/docs/INSTALL.md
@@ -145,7 +145,11 @@ says so and starts the engine you had.
   kept, only their names. Another browser or a private window starts empty; clearing the site's data deletes them.
 - **How the model starts:** `strata-<model>.json` in the Strata folder (context, GPUs, host, API key, ...), written
   by setup; next to it `run-<model>.bat` / `.sh`, the log `strata-<model>.log` and, when you use "Use for other
-  apps too", `strata-<model>.shared-settings.json`.
+  apps too", `strata-<model>.shared-settings.json`. Running setup again for the same model (another context, say)
+  rewrites the keys setup writes (`exe`, `args`, `port`, `gpu`, `host`, `api_key`, `vision`, ...) and keeps the
+  ones you added (`sampling`, `mcp_servers`, `mcp`, `cors_origins`, ...); the earlier file is kept as
+  `strata-<model>.json.bak` (0.1.39). Engine options you added to `"args"` by hand are not carried over: setup names
+  them, and you add them again.
 - **The model files** (`models/`, `packs/`, `mtp/`, 70-120 GB): in **`Strata-data` next to the Strata folder**, or
   wherever `--data-dir` put them.
 - **Where that data folder is:** `%APPDATA%\Strata\settings.json` on Windows, `~/.config/strata/settings.json` on
diff --git a/setup.py b/setup.py
index bc5cdd3002c..3093c8ebf6d 100644
--- a/setup.py
+++ b/setup.py
@@ -2369,6 +2369,86 @@ def write_config(path: Path, cfg: dict):
     os.replace(tmp, path)
 
 
+# #629: the run config's keys setup writes itself (and rewrites on every setup run); any other key is the user's - a
+# "sampling" or "mcp_servers" block, "allowed_hosts", "cors_origins", "open_browser" - and is kept when setup runs again
+SETUP_KEYS = frozenset({"exe", "args", "cwd", "tokenizer", "model_name", "log", "lib_dirs", "port", "backend", "env",
+                        "gpu", "gpus_asked", "layer_split", "host", "api_key", "draft_vocab", "vision"})
+SETUP_ENV = frozenset({"STRATA_HIPBLASLT_TUNING", "STRATA_RESIDENT_PIN"})   # the "env" entries setup writes
+SETUP_VISION = frozenset({"exe", "mmproj", "model", "gpu", "max_tokens", "threads"})
+
+
+def carry_over(old: dict, cfg: dict) -> list[str]:
+    """#629: setup run again for an installed model keeps what the user added to its run config: every key setup does
+    not write (`SETUP_KEYS`), the "env" entries setup does not write, and in "vision" the keys setup does not write
+    plus an mmproj of their own (a Q8_0 one, #625) that still exists.  `cfg` (the new config) is updated in place;
+    the names of what was kept are returned.  Engine options added by hand to "args" are not merged (setup chooses
+    those): `args_dropped` names them."""
+    kept = []
+    for k, v in old.items():
+        if k not in SETUP_KEYS and k not in cfg:
+            cfg[k] = v
+            kept.append(k)
+    env = {k: v for k, v in (old.get("env") or {}).items() if k not in SETUP_ENV and k not in (cfg.get("env") or {})} \
+        if isinstance(old.get("env"), dict) else {}
+    if env:
+        cfg["env"] = {**(cfg.get("env") or {}), **env}
+        kept += [f"env {k}" for k in env]
+    ov, nv = old.get("vision"), cfg.get("vision")
+    if isinstance(ov, dict) and isinstance(nv, dict):
+        for k, v in ov.items():
+            if k not in SETUP_VISION and k not in nv:
+                nv[k] = v
+                kept.append(f"vision {k}")
+        mm = ov.get("mmproj")                          # a file of the user's own: not the one setup downloads
+        if isinstance(mm, str) and Path(mm).name != Path(str(nv.get("mmproj"))).name and Path(mm).is_file():
+            nv["mmproj"] = mm
+            kept.append("vision mmproj")
+    return kept
+
+
+def args_dropped(old: dict, cfg: dict) -> list[str]:
+    """#629: the engine options of the earlier run config that the new one has no more (by flag name): options added
+    by hand, which a setup run does not carry over - the start of the line that names them."""
+    def flags(c):
+        a = c.get("args") if isinstance(c.get("args"), list) else []
+        return [str(x) for x in a if str(x).startswith("--")]
+    new = set(flags(cfg))
+    return list(dict.fromkeys(f for f in flags(old) if f not in new))
+
+
+def write_setup_config(cfg_path: Path, cfg: dict, source: Path | None = None) -> None:
+    """#629: setup's run config, written over an earlier one for the same model without losing what the user added
+    to it: the keys setup does not write are carried over (carry_over), and the earlier file is kept as
+    strata-<model>.json.bak when it changes.  `source`: an earlier install's config to carry the keys over from when
+    this folder has none yet (a copy set up like the last one).  A line says what was kept, one what was not."""
+    old_path = cfg_path if cfg_path.is_file() else source
+    old = None
+    if old_path is not None and old_path.is_file():
+        try:
+            old = json.loads(old_path.read_text(encoding="utf-8-sig"))
+        except (OSError, ValueError):
+            pass
+        if not isinstance(old, dict):
+            old = None
+    kept = carry_over(old, cfg) if old is not None else []
+    bak = None
+    if cfg_path.is_file() and old != cfg:
+        bak = cfg_path.with_name(cfg_path.name + ".bak")
+        try:
+            shutil.copyfile(cfg_path, bak)
+        except OSError as e:
+            warn(f"could not keep a copy of the earlier {cfg_path.name} ({e.strerror or e})")
+            bak = None
+    write_config(cfg_path, cfg)
+    if kept:
+        ok(f"kept from your earlier {old_path.name}: " + ", ".join(kept))
+    if bak is not None:
+        dropped = args_dropped(old, cfg) if old is not None else []
+        say(f"  the earlier run config is kept as {bak.name}" + (
+            f"; engine options it had that this one has not (setup chooses those): {' '.join(dropped)}"
+            if dropped else ""))
+
+
 def readable_config(path: Path) -> bool:
     """#459: a config that parses as a JSON object; any other gets a one-line warning naming it."""
     text = None
@@ -3010,6 +3090,7 @@ def main() -> int:
     if a.update:                                       # #475: UPDATE.bat / update.sh - never starts the model
         return update_install(have, a)
     explicit = a.setup or a.model or a.family or a.check or a.no_start
+    adopted = None                                     # #629: the earlier install this copy is set up like
     if not have and not explicit:                      # a new copy of Strata (an update unzipped elsewhere): set it
         prev = previous_config(elsewhere, load_settings())   # up like the last one, from the files already here
         if prev is not None:
@@ -3018,6 +3099,7 @@ def main() -> int:
                 say(f"  Found your earlier install in {prev.parent} ({prev.stem[len('strata-'):]}): setting up this "
                     "copy the same way - the model files are reused, nothing big is downloaded.")
                 a.family, a.model, a.context = ch["family"], ch["model"], a.context or ch["context"]
+                adopted = prev
                 a.kv = a.kv or ch["kv"]
                 a.vision = a.vision or ch["vision"]
                 a.experimental_speed_projection = a.experimental_speed_projection or ch["esp"]
@@ -3664,7 +3746,7 @@ def main() -> int:
         import calibrate as CAL
         cfg["args"] = CAL.apply(cfg["args"], cal.get("settings") or {})
         ok("the settings tuned for this PC earlier are used" + (f" ({cal['date']})" if cal.get("date") else ""))
-    write_config(cfg_path, cfg)
+    write_setup_config(cfg_path, cfg, adopted if adopted is not None and adopted.name == cfg_path.name else None)
     script = write_run_script(tag, cfg_path, port)
     # offered only when someone answers: --yes installs and adopted earlier installs are not held up by it
     if cal is None and not hip and not a.no_start and not a.yes and ask(
diff --git a/tools/test_setup_config.py b/tools/test_setup_config.py
new file mode 100644
index 00000000000..ada27efb6af
--- /dev/null
+++ b/tools/test_setup_config.py
@@ -0,0 +1,135 @@
+"""Tests for what setup keeps in a model's run config when it runs again (#629), the browser choice (#609) and the
+image-token flag (#625).  Every outside effect is mocked (tools/test_setup_golden.py's install()).
+
+    python -m unittest tools.test_setup_config
+"""
+from __future__ import annotations
+
+import contextlib
+import io
+import json
+import sys
+import tempfile
+import unittest
+from pathlib import Path
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+sys.path.insert(0, str(ROOT / "tools"))
+import setup  # noqa: E402
+from test_setup_golden import PROFILES, install  # noqa: E402
+
+
+def quiet(fn, *args, **kw):
+    out = io.StringIO()
+    with contextlib.redirect_stdout(out):
+        return fn(*args, **kw), out.getvalue()
+
+
+USER = {"sampling": {"temperature": 1.0, "top_p": 0.95, "top_k": 20, "min_p": 0.0},
+        "mcp_servers": {"files": {"command": "npx", "args": ["-y", "@modelcontextprotocol/server-filesystem", "."]}},
+        "mcp": {"timeout_s": 60, "max_result_chars": 16000, "max_rounds": 8},
+        "cors_origins": ["http://localhost:3000"], "reasoning_effort": "low"}
+
+
+class CarryOver(unittest.TestCase):
+    """#629: setup run again (a different --context) keeps the keys it does not write and keeps the old file as .bak."""
+
+    def setUp(self):
+        self.ram, self.found = PROFILES["64GB-1x32GB"]
+
+    def run_setup(self, *extra, configs=()):
+        return install(self.ram, self.found, ["--family", "qwen", "--model", "Q2_0", "--no-start", *extra],
+                       configs=configs)
+
+    def test_user_keys_survive_a_rerun(self):
+        code, out, first, _ = self.run_setup("--context", "65536")
+        self.assertEqual(code, 0, out)
+        old = {**first, **USER, "args": first["args"] + ["--hand-option", "7"]}
+        code, out, cfg, _ = self.run_setup("--context", "131072", configs=[("strata-q2_0.json", old)])
+        self.assertEqual(code, 0, out)
+        for k, v in USER.items():
+            self.assertEqual(cfg[k], v, k)
+        a = cfg["args"]
+        self.assertEqual(a[a.index("--max-context") + 1], "131072")       # the new choice is used
+        self.assertNotIn("--hand-option", a)                               # setup chooses the engine options...
+        self.assertIn("kept from your earlier strata-q2_0.json: sampling, mcp_servers, mcp, cors_origins, "
+                      "reasoning_effort", out)
+        self.assertIn("kept as strata-q2_0.json.bak", out)
+        self.assertIn("--hand-option", out)                                # ...and says which ones it did not keep
+
+    def test_a_first_install_is_unchanged(self):
+        code, out, cfg, _ = self.run_setup()
+        self.assertEqual(code, 0, out)
+        self.assertNotIn("kept from", out)
+        self.assertNotIn(".bak", out)
+        self.assertFalse(set(cfg) - setup.SETUP_KEYS)                     # setup writes only its own keys
+
+    def test_setup_keys_are_rewritten(self):
+        code, out, first, _ = self.run_setup()
+        old = {**first, "model_name": "renamed", "port": 9999, "draft_vocab": "en", "host": "0.0.0.0"}
+        code, out, cfg, _ = self.run_setup(configs=[("strata-q2_0.json", old)])
+        self.assertEqual(code, 0, out)
+        self.assertEqual(cfg["model_name"], first["model_name"])
+        self.assertEqual(cfg["port"], first["port"])
+        self.assertNotIn("host", cfg)                                     # as before: --host is given to setup
+        self.assertEqual(cfg["draft_vocab"], "en")                        # kept by its own rule (saved_draft_vocab)
+        self.assertNotIn("kept from", out)
+
+    def test_write_setup_config(self):
+        with tempfile.TemporaryDirectory() as d:
+            p = Path(d) / "strata-x.json"
+            mm = Path(d) / "mmproj-Q8_0.gguf"
+            mm.write_bytes(b"")
+            old = {"exe": "e", "args": ["--kv", "int8", "--threads", "8"], "sampling": {"temperature": 0.7},
+                   "env": {"STRATA_RESIDENT_PIN": "0", "MY_VAR": "1"},
+                   "vision": {"exe": "v", "mmproj": str(mm), "gpu": False, "max_tokens": 300, "min_tokens": 64}}
+            p.write_text(json.dumps(old), encoding="utf-8")
+            new = {"exe": "e2", "args": ["--kv", "int8"],
+                   "vision": {"exe": "v2", "mmproj": str(Path(d) / "mmproj-BF16.gguf"), "gpu": False, "max_tokens": 300}}
+            _, out = quiet(setup.write_setup_config, p, new)
+            got = json.loads(p.read_text(encoding="utf-8"))
+            self.assertEqual(got["sampling"], {"temperature": 0.7})
+            self.assertEqual(got["env"], {"MY_VAR": "1"})                 # setup's own env entry is setup's to write
+            self.assertEqual(got["vision"]["mmproj"], str(mm))            # a Q8_0 mmproj of the user's own (#625)
+            self.assertEqual(got["vision"]["min_tokens"], 64)
+            self.assertEqual(got["exe"], "e2")
+            self.assertEqual(json.loads((Path(d) / "strata-x.json.bak").read_text(encoding="utf-8")), old)
+            self.assertIn("--threads", out)
+            # the same again: nothing changes, so no new copy is made
+            (Path(d) / "strata-x.json.bak").unlink()
+            again = {"exe": "e2", "args": ["--kv", "int8"],
+                     "vision": {"exe": "v2", "mmproj": str(Path(d) / "mmproj-BF16.gguf"), "gpu": False,
+                                "max_tokens": 300}}
+            quiet(setup.write_setup_config, p, again)
+            self.assertFalse((Path(d) / "strata-x.json.bak").exists())
+            self.assertEqual(json.loads(p.read_text(encoding="utf-8")), got)
+
+    def test_an_unreadable_earlier_config_is_replaced_with_a_copy(self):
+        with tempfile.TemporaryDirectory() as d:
+            p = Path(d) / "strata-x.json"
+            p.write_text("{cut off", encoding="utf-8")
+            quiet(setup.write_setup_config, p, {"exe": "e", "args": []})
+            self.assertEqual(json.loads(p.read_text(encoding="utf-8")), {"exe": "e", "args": []})
+            self.assertEqual((Path(d) / "strata-x.json.bak").read_text(encoding="utf-8"), "{cut off")
+
+    def test_a_missing_mmproj_is_not_carried(self):
+        old = {"vision": {"mmproj": "/nowhere/mmproj-Q8_0.gguf", "gpu": True}}
+        new = {"vision": {"mmproj": "/data/mmproj-BF16.gguf", "gpu": True}}
+        self.assertEqual(setup.carry_over(old, new), [])
+        self.assertEqual(new["vision"]["mmproj"], "/data/mmproj-BF16.gguf")
+
+    def test_a_copy_set_up_like_the_last_one_keeps_them_too(self):
+        with tempfile.TemporaryDirectory() as d:
+            src = Path(d) / "other" / "strata-x.json"
+            src.parent.mkdir()
+            src.write_text(json.dumps({"exe": "old", "mcp_servers": {"a": {"command": "x"}}}), encoding="utf-8")
+            p = Path(d) / "strata-x.json"
+            quiet(setup.write_setup_config, p, {"exe": "new"}, src)
+            self.assertEqual(json.loads(p.read_text(encoding="utf-8")),
+                             {"exe": "new", "mcp_servers": {"a": {"command": "x"}}})
+            self.assertFalse((Path(d) / "strata-x.json.bak").exists())   # nothing here was replaced
+
+
+if __name__ == "__main__":
+    unittest.main()

From e50f2663e333680181bca621ea84aedeec353d6a Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:40:40 +0300
Subject: [PATCH 073/201] layer split: with explicit split points each GPU
 loads only its own layers' dense weights

Without this every stage of a layer split keeps a full copy of the dense weights (~3.4 GB for the Coder),
although it only ever reads its own layers. That VRAM goes to the expert cache instead.

- the canonical arena of each GPU skips the `blk.N.*` tensors of layers outside its range (PLE tensors stay
  everywhere), read from the pack's index.txt;
- NativeDense::set_layer_range limits the native projections the next `load` uploads the same way;
- only with explicit split points (`--layer-split 27`); `auto` and a single GPU are unchanged;
  STRATA_STAGE_TRIM=0 keeps the full copies;
- one log line per GPU says what it loads, and a later stage logs its free VRAM before the cache is sized.

Measured on 2x AMD Instinct MI50 16 GB (gfx906 port, Coder IQ1_M, 128K context, --layer-split 27):
experts held in VRAM 8,819 -> 10,626 of 12,288, VRAM hit rate 95% -> 98%, decode on a 17K-token agent prompt
39.2 -> 41.7 tok/s. The trimmed tensors are never read by that GPU.
---
 include/strata/core/native_dense.hpp |  3 ++
 src/core/native_dense.cpp            |  9 +++++
 src/program/generate.cpp             | 52 ++++++++++++++++++++++++++--
 3 files changed, 61 insertions(+), 3 deletions(-)

diff --git a/include/strata/core/native_dense.hpp b/include/strata/core/native_dense.hpp
index 8330fac55b0..911b31b6a2f 100644
--- a/include/strata/core/native_dense.hpp
+++ b/include/strata/core/native_dense.hpp
@@ -25,6 +25,9 @@ class NativeDense {
     /// supported type, 2-D), read from the GGUF headers only - so the canonical arena can skip them.
     static bool served_names(const std::vector<std::string>& shards, bool include_ple_key,
                              std::set<std::string>& out, std::string& err);
+    /// Layer split: load only blocks [lb, le) (every other `blk.N.` projection belongs to another GPU's stage; the
+    /// PLE tensors are loaded everywhere).  Process-wide, read by the next `load`; (-1, -1) = all layers.
+    static void set_layer_range(int lb, int le);
     /// #326: a native pack whose `blk.1.ple_key.weight` row is unquantized (iq_pack --compat-bf16 of a GGUF key
     /// the native kernel also reads, e.g. OrcaRouter's IQ3_XXS) serves the PLE from that row, so it is taken out
     /// of `skip` and `load` does not upload the GGUF key over it.  A quantized row leaves `skip` unchanged.
diff --git a/src/core/native_dense.cpp b/src/core/native_dense.cpp
index 4a86d48c219..86d70fb8066 100644
--- a/src/core/native_dense.cpp
+++ b/src/core/native_dense.cpp
@@ -6,6 +6,7 @@
 #include <cuda_runtime.h>
 #include <algorithm>
 #include <climits>
+#include <cstdlib>
 #include <exception>
 #include <limits>
 #include <memory>
@@ -13,6 +14,12 @@
 
 namespace strata::core {
 namespace {
+int g_layer_lb = -1, g_layer_le = -1;   // set_layer_range; -1: every layer
+bool in_range(const std::string& name) {
+    if (g_layer_lb < 0 || name.rfind("blk.", 0) != 0) return true;
+    const int l = std::atoi(name.c_str() + 4);
+    return l >= g_layer_lb && l < g_layer_le;
+}
 bool eligible(const strata::TensorInfo& tensor, bool include_ple_key) {
     const auto& name = tensor.name;
     if (name.rfind("blk.", 0) != 0) return false;
@@ -53,6 +60,7 @@ bool NativeDense::served_names(const std::vector<std::string>& shards, bool incl
     }
 }
 
+void NativeDense::set_layer_range(int lb, int le) { g_layer_lb = lb; g_layer_le = le; }
 bool NativeDense::keep_unquantized_ple_key(const std::string& pack_dir, std::set<std::string>& skip,
                                            std::string& err) {
     const std::string key = "blk.1.ple_key.weight";
@@ -139,6 +147,7 @@ bool NativeDense::load(const std::vector<std::string>& shards, WeightTable& tabl
             }
             for (const auto& tensor : gguf.tensors()) {
                 if (!eligible(tensor, include_ple_key)) continue;
+                if (!in_range(tensor.name) && tensor.name.find("ple") == std::string::npos) continue;
                 if (!seen.insert(tensor.name).second) {
                     err = "native dense: duplicate tensor " + tensor.name; return false;
                 }
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a7c77d0efff..30cb7957f3f 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1984,6 +1984,31 @@ int main(int argc, char** argv) {
         }
         if (native_pack) skip.insert("token_embd.weight");
     }
+    // Layer split with explicit split points: every GPU holds only the dense weights of ITS layers (the PLE tensors
+    // stay everywhere).  Without this each card keeps a full copy (~3.4 GB for the Coder) that its stage never
+    // reads - VRAM the expert cache wants.  STRATA_STAGE_TRIM=0 keeps the full copies.
+    const std::set<std::string> skip_base = skip;
+    const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() &&
+                            !(std::getenv("STRATA_STAGE_TRIM") && std::string(std::getenv("STRATA_STAGE_TRIM")) == "0");
+    auto add_foreign = [&](int64_t lb, int64_t le, std::set<std::string>& out) {
+        std::FILE* f = std::fopen((o.pack + "/index.txt").c_str(), "rb");
+        if (!f) return;
+        char line[1024], name[256];
+        while (std::fgets(line, sizeof line, f)) {
+            if (line[0] == '#' || std::sscanf(line, "%255s", name) != 1) continue;
+            const std::string n = name;
+            if (n.rfind("blk.", 0) != 0 || n.find("ple") != std::string::npos) continue;
+            const int64_t l = std::atoll(name + 4);
+            if (l < lb || l >= le) out.insert(n);
+        }
+        std::fclose(f);
+    };
+    if (stage_trim) {
+        add_foreign(0, split_at[0], skip);
+        strata::core::NativeDense::set_layer_range(0, (int) split_at[0]);
+        std::fprintf(stderr, "strata generate: layer split: CUDA0 loads the dense weights of layers 0-%lld only\n",
+                     (long long) split_at[0] - 1);
+    }
     uint64_t pool_bytes = 0;
     if (!strata::core::WeightTable::pool_bytes(o.pack, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
         std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -2303,16 +2328,31 @@ int main(int argc, char** argv) {
             return 1;
         }
         const strata::core::OnDevice on(st.dev);
+        std::set<std::string> skip_s = skip_base;
+        uint64_t pool_s = pool_bytes;
+        if (stage_trim) {
+            const int64_t lb = split_at[i], le = i + 1 < split_at.size() ? split_at[i + 1] : g.n_layers;
+            add_foreign(lb, le, skip_s);
+            strata::core::NativeDense::set_layer_range((int) lb, (int) le);
+            if (!strata::core::WeightTable::pool_bytes(o.pack, pool_s, err, &skip_s)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            std::fprintf(stderr, "strata generate: layer split: CUDA%d loads the dense weights of layers %lld-%lld only\n",
+                         st.dev, (long long) lb, (long long) le - 1);
+        } else {
+            skip_s = skip;
+        }
         void* arena_s = nullptr;
-        if (cudaMalloc(&arena_s, pool_bytes) != cudaSuccess ||
-            !st.wt.load(o.pack, arena_s, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
+        if (cudaMalloc(&arena_s, pool_s) != cudaSuccess ||
+            !st.wt.load(o.pack, arena_s, pool_s, err, skip_s.empty() ? nullptr : &skip_s)) {
             cudaGetLastError();
             size_t free_b = 0, total_b = 0;   // #486: what that card had free
             cudaMemGetInfo(&free_b, &total_b);
             std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s (%llu MiB needed, %llu MiB of %llu "
                                  "MiB free on that card)\n", st.dev,
                          err.empty() ? "the weight arena does not fit" : err.c_str(),
-                         (unsigned long long) (pool_bytes >> 20), (unsigned long long) (free_b >> 20),
+                         (unsigned long long) (pool_s >> 20), (unsigned long long) (free_b >> 20),
                          (unsigned long long) (total_b >> 20));
             return 1;
         }
@@ -3124,6 +3164,12 @@ int main(int argc, char** argv) {
         // to hold back is the windows - and `free_b` has already lost the drafter.
         const int64_t room = stage_room(st.dev, true, false);
         const strata::core::OnDevice on(st.dev);
+        {
+            size_t fb = 0, tb = 0;
+            cudaMemGetInfo(&fb, &tb);
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: %.2f GiB free of %.2f, room for experts %.2f GiB\n",
+                         st.dev, (double) fb / 1073741824.0, (double) tb / 1073741824.0, (double) room / 1073741824.0);
+        }
         std::vector<int64_t> sized;
         int64_t used = 0;
         for (const auto& pr : st.profile) {

From efec56940ea6d8594cdd1758e5c56c50796f3f2a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:14:12 +0200
Subject: [PATCH 074/201] layer split trim: CUDA0 keeps every layer's router
 with --mmap-experts (PR #639 follow-up)

The file tier's routing-aware prefetch (RouterLookahead) copies all layers' ffn_gate_inp.weight from CUDA0's arena.
With CUDA0 trimmed to its own layers it found them missing and turned itself off ("the routers are not BF16 in the
arena"). CUDA0 now keeps the routers (~2.5 MiB a layer) when --mmap-experts is on; the other stages and the runs
without --mmap-experts trim as before.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 30cb7957f3f..b7bc46e0da1 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1990,7 +1990,10 @@ int main(int argc, char** argv) {
     const std::set<std::string> skip_base = skip;
     const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() &&
                             !(std::getenv("STRATA_STAGE_TRIM") && std::string(std::getenv("STRATA_STAGE_TRIM")) == "0");
-    auto add_foreign = [&](int64_t lb, int64_t le, std::set<std::string>& out) {
+    // keep_routers: CUDA0 with --mmap-experts keeps every layer's router (ffn_gate_inp, ~2.5 MiB a layer) - the file
+    // tier's routing-aware prefetch (RouterLookahead, below) copies all of them from CUDA0's arena, and would
+    // otherwise turn itself off
+    auto add_foreign = [&](int64_t lb, int64_t le, std::set<std::string>& out, bool keep_routers) {
         std::FILE* f = std::fopen((o.pack + "/index.txt").c_str(), "rb");
         if (!f) return;
         char line[1024], name[256];
@@ -1998,13 +2001,14 @@ int main(int argc, char** argv) {
             if (line[0] == '#' || std::sscanf(line, "%255s", name) != 1) continue;
             const std::string n = name;
             if (n.rfind("blk.", 0) != 0 || n.find("ple") != std::string::npos) continue;
+            if (keep_routers && n.ends_with(".ffn_gate_inp.weight")) continue;
             const int64_t l = std::atoll(name + 4);
             if (l < lb || l >= le) out.insert(n);
         }
         std::fclose(f);
     };
     if (stage_trim) {
-        add_foreign(0, split_at[0], skip);
+        add_foreign(0, split_at[0], skip, o.mmap_experts);
         strata::core::NativeDense::set_layer_range(0, (int) split_at[0]);
         std::fprintf(stderr, "strata generate: layer split: CUDA0 loads the dense weights of layers 0-%lld only\n",
                      (long long) split_at[0] - 1);
@@ -2332,7 +2336,7 @@ int main(int argc, char** argv) {
         uint64_t pool_s = pool_bytes;
         if (stage_trim) {
             const int64_t lb = split_at[i], le = i + 1 < split_at.size() ? split_at[i + 1] : g.n_layers;
-            add_foreign(lb, le, skip_s);
+            add_foreign(lb, le, skip_s, false);
             strata::core::NativeDense::set_layer_range((int) lb, (int) le);
             if (!strata::core::WeightTable::pool_bytes(o.pack, pool_s, err, &skip_s)) {
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());

From e30dd857645fe415235067f4382e7ab860a822c4 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:43:00 +0300
Subject: [PATCH 075/201] STRATA_ARENA_MMAP=1: the expert arena as a read-only
 mapped file (Linux), for small-RAM machines

The host expert arena is normally read into pinned (locked) RAM. On a machine whose GPUs already hold most
experts, that locks memory the CPU never reads: with the Coder (25 GB arena) on 2x 16 GB GPUs and 32 GB of RAM,
~1 GB stayed available at 128K context, the kernel swapped, and a multi-turn checkpoint took 25-80 s.

With STRATA_ARENA_MMAP=1 (opt-in, Linux; off by default, nothing changes without it):

- the first start writes the arena to the pack's experts.bin (padded by one blob so a whole-slot copy may start at
  any expert); later starts map it read-only, not locked, not pinned. The page cache keeps what the CPU pool and
  the prompt path read and gives the rest back under pressure; a dropped page is re-read from the file, so no
  result depends on what is resident. The GPUs get no mapped alias of it: run with --pcie-frac 0;
- after the VRAM caches are filled, the pages of experts a GPU holds are handed back (MADV_DONTNEED,
  STRATA_ARENA_RELEASE=0 keeps them) and the rest are prefetched (MADV_WILLNEED); an adaptive swap releases the
  expert that went to VRAM and prefetches the one that came back;
- HIP: ROCclr copies a pageable source of 1 MiB or more by locking its pages in place and keeps them locked, which
  undid every release. The engine raises GPU_PINNED_MIN_XFER_SIZE (an explicit setting wins) so such copies
  stage through ROCclr's own buffers, and locks an adaptive swap's source pages itself only until the copy lands
  (the page ranges are merged first: a copy from a range only part of which is registered fails);
- STRATA_RSS_TRACE=1 prints the process's RssFile at the startup steps (madvise reports success on locked pages
  and frees nothing; RssFile is the honest check).

The existing --mmap-experts refuses native packs (the Coder); this path is for them.

Measured on 2x AMD Instinct MI50 16 GB + 32 GB DDR4 (gfx906 port, Coder IQ1_M, 128K context, layer split):
RAM available while serving ~1 GB -> 25 GB; multi-turn re-read of a checkpoint 25-80 s -> <= 3.2 s; decode
unchanged (49.06 vs 49.16 ms per verify window). Not measured on NVIDIA (pin_blobs is a no-op there).
---
 include/strata/core/expert_source.hpp    |   9 ++
 include/strata/hip_compat/cuda_runtime.h |   1 +
 src/core/expert_source.cpp               |  92 +++++++++++++++-
 src/program/generate.cpp                 | 128 ++++++++++++++++++++++-
 4 files changed, 226 insertions(+), 4 deletions(-)

diff --git a/include/strata/core/expert_source.hpp b/include/strata/core/expert_source.hpp
index 4c4d12f56f3..f555efe8e6e 100644
--- a/include/strata/core/expert_source.hpp
+++ b/include/strata/core/expert_source.hpp
@@ -122,6 +122,11 @@ class ExpertSource {
     virtual void begin_layer(int64_t layer, const int32_t* ids, int64_t k) { (void) layer; (void) ids; (void) k; }
     /// Plan v0.3 P6: the DEVICE address of a pinned, mapped blob (the GPU can read it over PCIe), or null.
     virtual const uint8_t* device_alias(int64_t layer, int64_t expert) const { (void) layer; (void) expert; return nullptr; }
+    /// A file-backed source: start reading this expert's pages now (it will be needed by the CPU); no-op elsewhere.
+    virtual void prefetch(int64_t layer, int64_t expert) { (void) layer; (void) expert; }
+    /// A file-backed source: this expert lives in VRAM, so its pages need not stay in RAM - hand them back to the
+    /// kernel (a later read re-reads the file; no result depends on it).  Returns the bytes released; 0 elsewhere.
+    virtual uint64_t release(int64_t layer, int64_t expert) { (void) layer; (void) expert; return 0; }
     /// Whether the verify window may give the GPU a PCIe share of this layer's misses at all (each expert is still
     /// checked with `pinned`).  The arena answers per layer through its expert 0; the resident RAM mode's compact
     /// copy has no expert 0 when the GPU cache holds it, so it answers for the whole copy.
@@ -641,6 +646,8 @@ class ArenaExpertSource : public ExpertSource {
     int64_t reads() const { return reads_; }
     bool pinned(int64_t layer, int64_t expert) const override;
     const uint8_t* device_alias(int64_t layer, int64_t expert) const override;
+    void prefetch(int64_t layer, int64_t expert) override;
+    uint64_t release(int64_t layer, int64_t expert) override;
 
     /// What backing was obtained and why, for the startup print.  "The engine adapts to the machine it is on" is
     /// only true if the engine says what it got.
@@ -655,6 +662,8 @@ class ArenaExpertSource : public ExpertSource {
 
 private:
     void* arena_ = nullptr;          ///< the PinnedArena, owned
+    void* map_ = nullptr;            ///< STRATA_ARENA_MMAP: the arena file, mapped read-only (not the PinnedArena)
+    uint64_t map_bytes_ = 0;
     std::vector<const uint8_t*> dev_slice_;   ///< device alias of each registered slice (or of the whole range)
     uint64_t slice_bytes_ = 0;
     const uint8_t* base_ = nullptr;
diff --git a/include/strata/hip_compat/cuda_runtime.h b/include/strata/hip_compat/cuda_runtime.h
index da2c4f4cc4d..ccf9a913243 100644
--- a/include/strata/hip_compat/cuda_runtime.h
+++ b/include/strata/hip_compat/cuda_runtime.h
@@ -61,6 +61,7 @@
 #define cudaHostRegister hipHostRegister
 #define cudaHostRegisterMapped hipHostRegisterMapped
 #define cudaHostRegisterPortable hipHostRegisterPortable
+#define cudaHostRegisterReadOnly hipHostRegisterReadOnly
 #define cudaHostUnregister hipHostUnregister
 #define cudaLaunchHostFunc hipLaunchHostFunc
 #define cudaMalloc hipMalloc
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index c64909f543c..b68779e56fd 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2569,7 +2569,7 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
         std::ifstream f(path, std::ios::binary | std::ios::ate);
         if (!f) { err = "ArenaExpertSource: cannot open " + path; return false; }
         const uint64_t got = (uint64_t) f.tellg();
-        if (got != want) {
+        if (got != want && got != want + (uint64_t) blob) {   // + one blob: STRATA_ARENA_MMAP's padded file
             char buf[400];
             std::snprintf(buf, sizeof buf,
                           "ArenaExpertSource: %s is %llu B but %lld layers x %lld experts (blobs up to %lld B) "
@@ -2581,6 +2581,44 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
         }
     }
 
+    // STRATA_ARENA_MMAP=1 (a small-RAM machine whose GPUs hold most experts): the arena is the pack's experts.bin
+    // mapped READ-ONLY - not locked, not pinned.  The page cache keeps what the CPU pool and the prompt path
+    // actually read (the experts no VRAM cache holds) and gives back the rest under memory pressure; a page
+    // dropped is re-read from the file, so a result never depends on what is resident.  The GPUs then get no
+    // mapped alias: run with --pcie-frac 0.  The first start writes experts.bin (arena layout, padded by one blob
+    // so a whole-slot copy may start at any expert), later ones map it.
+#if defined(_WIN32)
+    static const bool arena_mmap = false;   // POSIX mmap/madvise: Linux only for now
+#else
+    static const bool arena_mmap = [] { const char* v = std::getenv("STRATA_ARENA_MMAP"); return v && v[0] == '1'; }();
+    if (arena_mmap) {
+        const uint64_t file_bytes = want + (uint64_t) blob;
+        uint64_t have = 0;
+        {
+            std::ifstream f(path, std::ios::binary | std::ios::ate);
+            if (f) have = (uint64_t) f.tellg();
+        }
+        if (have == file_bytes) {
+            const int fd = ::open(path.c_str(), O_RDONLY);
+            void* v = fd >= 0 ? mmap(nullptr, (size_t) file_bytes, PROT_READ, MAP_SHARED, fd, 0) : MAP_FAILED;
+            if (fd >= 0) ::close(fd);
+            if (v == MAP_FAILED) { err = "ArenaExpertSource: mmap of " + path + " failed"; return false; }
+            map_ = v;
+            map_bytes_ = file_bytes;
+            base_ = (const uint8_t*) v;
+            pinned_bytes_ = 0;
+            dev_slice_.clear();
+            slice_bytes_ = 0;
+            blobs_ = n_layers * n_expert;
+            n_expert_ = n_expert;
+            reads_ = 0;
+            note_ = "mapped read-only from " + path + " (STRATA_ARENA_MMAP: not locked, not pinned)";
+            gib_per_s_ = 0.0;
+            load_seconds_ = load_read_s_ = load_copy_s_ = 0.0;
+            return true;
+        }
+    }
+#endif
     uint64_t pack_hash = 0;
     if (!shared_arena_file.empty() &&
         !shared_arena_pack_hash(pack_dir, path, gguf_, lay, pack_hash, err)) return false;
@@ -2639,6 +2677,20 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
         err = "ArenaExpertSource: the load read " + std::to_string(st.bytes) + " B of " + std::to_string(want);
         return false;
     }
+    if (arena_mmap && from_gguf) {   // the first start: write experts.bin for the mapped starts after this one
+        const std::string tmp = path + ".tmp";
+        std::FILE* f = std::fopen(tmp.c_str(), "wb");
+        bool ok = f != nullptr && std::fwrite(a->data(), 1, (size_t) want, f) == (size_t) want;
+        if (ok) {
+            std::vector<uint8_t> pad((size_t) blob, 0);
+            ok = std::fwrite(pad.data(), 1, pad.size(), f) == pad.size();
+        }
+        if (f) ok = std::fclose(f) == 0 && ok;
+        if (ok) ok = std::rename(tmp.c_str(), path.c_str()) == 0;
+        if (!ok) std::remove(tmp.c_str());
+        std::fprintf(stderr, "strata generate: STRATA_ARENA_MMAP: %s %s (the next start maps it)\n",
+                     ok ? "wrote" : "could NOT write", path.c_str());
+    }
     arena_ = a;
     base_ = a->data();
     pinned_bytes_ = a->registered_bytes;
@@ -2669,6 +2721,11 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
 }
 
 void ArenaExpertSource::close() {
+#if !defined(_WIN32)
+    if (map_ != nullptr) munmap(map_, (size_t) map_bytes_);
+#endif
+    map_ = nullptr;
+    map_bytes_ = 0;
     if (arena_ != nullptr) {
         delete (PinnedArena*) arena_;
         arena_ = nullptr;
@@ -2678,6 +2735,39 @@ void ArenaExpertSource::close() {
     n_expert_ = 0;
 }
 
+void ArenaExpertSource::prefetch(int64_t layer, int64_t expert) {
+#if defined(_WIN32)
+    (void) layer; (void) expert;
+#else
+    if (map_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const uint64_t off = lay.blob_offset(layer, expert) & ~(uint64_t) 4095;
+    const uint64_t end = lay.blob_offset(layer, expert) + lay.blob_bytes(layer);
+    madvise((uint8_t*) map_ + off, (size_t) (end - off), MADV_WILLNEED);
+#endif
+}
+
+// Only the pages wholly inside the blob: a page shared with a neighbour the CPU may still read stays.  MADV_DONTNEED
+// unmaps them from this process; they stay in the page cache as clean, unmapped pages - the first the kernel takes
+// back under pressure, and a minor fault away when the CPU needs the expert again (an adaptive swap evicts it).
+// Dropping them from the cache too (POSIX_FADV_DONTNEED) made every eviction a re-read from the disk: ~200 major
+// faults a second in decode, +8 ms a window.  The memory the arena used to hold was never the cache itself but
+// ROCclr's pin-in-place locks on it (see main) - locked pages are the ones the kernel cannot take back.
+uint64_t ArenaExpertSource::release(int64_t layer, int64_t expert) {
+#if defined(_WIN32)
+    (void) layer; (void) expert;
+    return 0;
+#else
+    if (map_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return 0;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const uint64_t off = (lay.blob_offset(layer, expert) + 4095) & ~(uint64_t) 4095;
+    const uint64_t end = (lay.blob_offset(layer, expert) + lay.blob_bytes(layer)) & ~(uint64_t) 4095;
+    if (end <= off) return 0;
+    if (madvise((uint8_t*) map_ + off, (size_t) (end - off), MADV_DONTNEED) != 0) return 0;
+    return end - off;
+#endif
+}
+
 bool ArenaExpertSource::pinned(int64_t layer, int64_t expert) const {
     if (base_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return false;
     const auto& lay = strata::kernels::cpu::expert_layout();
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index b7bc46e0da1..f621754c0a6 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -114,6 +114,61 @@ bool under_wddm() {
 }
 
 // perf-review D-4: the lent slots are refilled with queued copies and one wait; STRATA_REFILL_BLOCKING=1 waits on each
+// A file-backed arena on AMD (STRATA_ARENA_MMAP; the engine raises ROCclr's pin-in-place threshold, see main): an
+// adaptive swap copies one expert straight from the mapped file.  Through ROCclr's staging that copy blocks the host
+// (decode windows of 150+ ms); instead the batch's pages are locked here for the async copies and unlocked when they
+// have landed (unpin_blobs), so the release that follows can hand them back.  Neighbouring experts share a page and
+// a copy from a range only PART of which is registered fails ("invalid argument"), so the page ranges are merged
+// first and each merged span is registered once.  A span that does not register is copied through the staging
+// path.  Portable: a layer split copies to either card.
+int pin_blobs(std::vector<std::pair<uintptr_t, uintptr_t>> r, std::vector<void*>& live) {
+    int failed = 0;   // ranges left pageable (a copy from them still works, through the driver's staging)
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    static const bool on = std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1';
+    if (!on || r.empty()) return 0;
+    for (auto& [a, e] : r) { a &= ~(uintptr_t) 4095; e = (e + 4095) & ~(uintptr_t) 4095; }
+    std::sort(r.begin(), r.end());
+    size_t k = 0;
+    for (size_t i = 1; i < r.size(); ++i) {
+        if (r[i].first <= r[k].second) r[k].second = std::max(r[k].second, r[i].second);
+        else r[++k] = r[i];
+    }
+    r.resize(k + 1);
+    for (const auto& [a, e] : r) {
+        if (cudaHostRegister((void*) a, (size_t) (e - a), cudaHostRegisterReadOnly | cudaHostRegisterPortable) ==
+            cudaSuccess)
+            live.push_back((void*) a);
+        else {
+            (void) cudaGetLastError();
+            ++failed;
+        }
+    }
+#else
+    (void) r; (void) live;
+#endif
+    return failed;
+}
+void unpin_blobs(std::vector<void*>& v) {
+    for (void* p : v) (void) cudaHostUnregister(p);
+    (void) cudaGetLastError();
+    v.clear();
+}
+
+// STRATA_RSS_TRACE=1: the process's mapped file pages (the arena) at a startup step - who reads the arena back
+void rss_probe(const char* where) {
+    static const bool on = std::getenv("STRATA_RSS_TRACE") != nullptr;
+    if (!on) return;
+    FILE* f = std::fopen("/proc/self/status", "r");
+    if (!f) return;
+    char line[256];
+    long long kb = -1;
+    while (std::fgets(line, sizeof line, f))
+        if (std::strncmp(line, "RssFile:", 8) == 0) { kb = std::atoll(line + 8); break; }
+    std::fclose(f);
+    std::fprintf(stderr, "strata rss: %s: RssFile %.2f GiB\n", where, (double) kb / (1024.0 * 1024.0));
+    std::fflush(stderr);
+}
+
 bool refill_blocking() {
     static const bool v = std::getenv("STRATA_REFILL_BLOCKING") != nullptr;
     return v;
@@ -1066,6 +1121,15 @@ int main(int argc, char** argv) {
     // pipe or a file is block-buffered, so a program that dies loses every line it had already printed - which
     // turns "it crashed at step 7" into "it crashed somewhere", and the difference is a debugging session.
     std::setvbuf(stdout, nullptr, _IONBF, 0);
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    // AMD, a file-backed arena (STRATA_ARENA_MMAP): ROCclr copies a pageable source of 1 MiB or more by locking its
+    // pages in place (a GPU userptr), and keeps them - so every expert the VRAM fill copied from the mapped
+    // experts.bin stayed resident, the release of the VRAM-held ones was undone by the driver at once, and a
+    // 32 GB PC ran with ~0.3 GB free: the kernel swapped, and a turn's checkpoint took 25-80 s.  Above this size
+    // ROCclr stages through its own pinned buffers instead; decode is unchanged (49.06 vs 49.16 ms/window).
+    if (std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1')
+        setenv("GPU_PINNED_MIN_XFER_SIZE", "1000000", 0);   // MiB; an explicit setting wins
+#endif
     // Load every CUDA kernel when the context is created, before the expert cache takes the free VRAM.  With the
     // default lazy loading, a kernel first used mid-prompt (MMQ for IQ3_XXS at 64K+ on a 12 GB card) found no VRAM
     // left for its code and the engine ended ("out of memory: cudaFuncSetAttribute").  Costs ~30 MB of VRAM.
@@ -3938,6 +4002,31 @@ int main(int argc, char** argv) {
         }
         thits.d_res = d_res;
         thits.n_expert = g.n_expert;
+        // a file-backed arena (STRATA_ARENA_MMAP): the experts no GPU holds are the ones the CPU pool and the
+        // prompt path will read - start reading them now instead of faulting them in 4 KB at a time mid-request
+        // ... and the ones a GPU holds are handed back first (STRATA_ARENA_RELEASE=0 keeps them): the fill read the
+        // whole arena, and left mapped and referenced it crowds every other allocation into swap
+        {
+            static const bool keep = std::getenv("STRATA_ARENA_RELEASE") && std::getenv("STRATA_ARENA_RELEASE")[0] == '0';
+            rss_probe("before the release");
+            uint64_t released = 0;
+            if (!keep)
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] != strata::core::kNotResident)
+                        released += srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);
+            if (released > 0)
+                std::fprintf(stderr, "strata generate: expert arena: %.2f GiB of VRAM-held experts handed back to the OS\n",
+                             (double) released / (1024.0 * 1024.0 * 1024.0));
+            rss_probe("after the release");
+            int64_t pf = 0;
+            for (size_t i = 0; i < host_res.size(); ++i)
+                if (host_res[i] == strata::core::kNotResident) {
+                    srcp->prefetch((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);
+                    ++pf;
+                }
+            (void) pf;
+            rss_probe("after the prefetch hints");
+        }
         for (auto& st : stages) {   // layer split across GPUs: the same table on every device
             const strata::core::OnDevice on(st->dev);
             if (cudaMalloc((void**) &st->d_res, host_res.size() * sizeof(int32_t)) != cudaSuccess ||
@@ -4339,6 +4428,7 @@ int main(int argc, char** argv) {
         } else {
             std::fprintf(stderr, "strata serve: the prompt path allocates its own buffers (too few cache slots to borrow)\n");
         }
+        rss_probe("the prompt path set up");
         // layer split across GPUs: a prompt path per stage, each handing its chunk's rows to the next.
         // THE CHUNK STEPS DOWN INSTEAD OF EXITING.  A split's stage caches are sized after the arena is registered, and
         // the prompt path's own buffers (no loan) are not priced into them: with the whole arena pinned (#253) a
@@ -4813,6 +4903,7 @@ int main(int argc, char** argv) {
         }
         // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
         std::vector<std::pair<int32_t, int32_t>> pending;
+        std::vector<void*> pin_live;   // the swaps' locked arena pages (pin_blob), unlocked once they have landed
         cudaEvent_t adapt_ev = nullptr;
         cudaEventCreateWithFlags(&adapt_ev, cudaEventDisableTiming);
         // a layer split's later stages keep a copy of the residency table on their devices, and swap on their own
@@ -4835,8 +4926,12 @@ int main(int argc, char** argv) {
                     else if (cudaEventQuery(st->adapt_ev) != cudaSuccess) return;
                 }
             for (auto& st : stages) st->adapt_live = false;
+            unpin_blobs(pin_live);
             src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
-            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            for (const auto& [i, slot] : pending) {
+                host_res[(size_t) i] = slot;
+                srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);   // in VRAM now: RAM not needed
+            }
             pending.clear();
             res_upload();
         };
@@ -4868,6 +4963,14 @@ int main(int argc, char** argv) {
             std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
             if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
             if (!resident_stage_swaps(src, xcache, host_res, g.n_expert, swaps, adapt_stream)) return false;
+            {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+                std::vector<std::pair<uintptr_t, uintptr_t>> spans;
+                for (const Swap& s : swaps)
+                    if (const uint8_t* b = srcp->blob(s.layer, s.in))
+                        spans.emplace_back((uintptr_t) b,
+                                           (uintptr_t) b + strata::kernels::cpu::expert_layout().blob_bytes(s.layer));
+                pin_blobs(std::move(spans), pin_live);
+            }
             bool main_live = false;
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
@@ -4879,11 +4982,15 @@ int main(int argc, char** argv) {
                 if (slot < 0 || b == nullptr ||
                     cudaMemcpyAsync(gs ? gs->cache.device_slot(slot) : xcache.device_slot(slot), b,
                                     (size_t) strata::kernels::cpu::expert_layout().blob_bytes(s.layer),
-                                    cudaMemcpyHostToDevice, gs ? gs->adapt_stream : adapt_stream) != cudaSuccess)
+                                    cudaMemcpyHostToDevice, gs ? gs->adapt_stream : adapt_stream) != cudaSuccess) {
+                    std::fprintf(stderr, "strata serve: adaptive swap copy failed (layer %d, slot %d, pinned %d): %s\n",
+                                 (int) s.layer, (int) slot, pin_live.empty() ? 0 : 1, cudaGetErrorString(cudaGetLastError()));
                     return false;
+                }
                 if (gs) gs->adapt_live = true;
                 else main_live = true;
                 host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                srcp->prefetch(s.layer, s.out);   // a file-backed arena released its pages: read them back ahead
                 pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
             }
             if (!swaps.empty()) cudaEventRecord(adapt_ev, adapt_stream);
@@ -5000,6 +5107,7 @@ int main(int argc, char** argv) {
             const int64_t free_mib = (int64_t) (free_b >> 20);
             if (free_mib >= 256) {
                 std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded\n", (long long) free_mib);
+                rss_probe("serving");
             } else if (reserve_adapted) {
                 // #496: the reserve was already lowered to make the cache fit - a bigger one would leave it no room
                 std::fprintf(stderr, "strata serve: WARNING: %lld MiB of VRAM free with everything loaded - this card "
@@ -6481,6 +6589,7 @@ int main(int argc, char** argv) {
         }
         // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
         std::vector<std::pair<int32_t, int32_t>> pending;
+        std::vector<void*> pin_live;   // the swaps' locked arena pages (pin_blob), unlocked once they have landed
         cudaEvent_t adapt_ev = nullptr;
         cudaEventCreateWithFlags(&adapt_ev, cudaEventDisableTiming);
         int64_t adapt_rounds = 0;   // counted here: `rounds` is declared below the adapt lambda
@@ -6497,8 +6606,12 @@ int main(int argc, char** argv) {
             }
             if (trace_pending)
                 std::fprintf(stderr, "strata: PENDING landed, %zu experts become resident\n", pending.size());
+            unpin_blobs(pin_live);
             src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
-            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            for (const auto& [i, slot] : pending) {
+                host_res[(size_t) i] = slot;
+                srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);   // in VRAM now: RAM not needed
+            }
             pending.clear();
             if (d_res != nullptr)
                 cudaMemcpy(d_res, host_res.data(), host_res.size() * sizeof(int32_t), cudaMemcpyHostToDevice);
@@ -6548,6 +6661,14 @@ int main(int argc, char** argv) {
                 std::fprintf(stderr, "strata generate: an adaptive refill failed (copying evicted experts back)\n");
                 return false;
             }
+            {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+                std::vector<std::pair<uintptr_t, uintptr_t>> spans;
+                for (const Swap& s : swaps)
+                    if (const uint8_t* b = srcp->blob(s.layer, s.in))
+                        spans.emplace_back((uintptr_t) b,
+                                           (uintptr_t) b + strata::kernels::cpu::expert_layout().blob_bytes(s.layer));
+                pin_blobs(std::move(spans), pin_live);
+            }
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
                 const int32_t slot = host_res[out];
@@ -6560,6 +6681,7 @@ int main(int argc, char** argv) {
                     return false;
                 }
                 host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                srcp->prefetch(s.layer, s.out);   // a file-backed arena released its pages: read them back ahead
                 pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
             }
             if (!swaps.empty()) cudaEventRecord(adapt_ev, adapt_stream);

From 3982ec747bc0fc2df5673a6026a03bd295ca18ce Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:14:23 +0200
Subject: [PATCH 076/201] layer_split: check it before the start, accept a JSON
 list, say the format with an example (#644)

"layer_split" is the first layer of each later GPU ("24,36,42" for 4 GPUs), not a count of layers per card. A
value such as "24,16,12,12" failed the engine's check after the start began, and a JSON list reached the engine as
"[24, 16, 12, 12]".

- server.py layer_split_value: "auto" (default), a comma string or a JSON list of one rising number per GPU after the
  first, from 2; anything else stops the start with the format and an example for that many GPUs.
- The engine's message says the same, with the value it got.
- MULTI_GPU.md and setup's --layer-split help say it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/MULTI_GPU.md        |  5 +++++
 serve/server.py          | 44 +++++++++++++++++++++++++++++++++++++---
 serve/test_server.py     | 35 +++++++++++++++++++++++++++++++-
 setup.py                 |  5 +++--
 src/program/generate.cpp |  4 +++-
 5 files changed, 86 insertions(+), 7 deletions(-)

diff --git a/docs/MULTI_GPU.md b/docs/MULTI_GPU.md
index 6e0b0d9687b..2e9d975fdc7 100644
--- a/docs/MULTI_GPU.md
+++ b/docs/MULTI_GPU.md
@@ -56,6 +56,11 @@ Or edit an existing config (`strata-*.json`), then restart:
 "layer_split": "auto"
 ```
 
+`"layer_split"` is `"auto"` (placed by each card's free VRAM) or the **first layer of each later card**: one rising
+number per card after the first, not a count of layers per card. With 4 cards and a 48-layer model, `"24,36,42"`
+(or `[24, 36, 42]`) puts layers 0-23 on the first card, 24-35 on the second, 36-41 on the third and 42-47 on the last.
+The server checks it before the start and says what is wrong (0.1.39, #644).
+
 **Skip the split when the first card holds everything** (opt-in, 0.1.31): `"split_skip_if_fits": true` in the config
 (engine flag `--split-skip-if-fits`, with `--layer-split auto`) runs on the first card alone when it holds every
 profiled expert plus the context's KV, the draft layer and the reserve, and says so in the log; otherwise the split
diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..c143a6b841a 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -789,12 +789,46 @@ def engine_silence_s(cfg: dict) -> float:
     return float(v)
 
 
+def layer_split_value(cfg: dict) -> str:
+    """#644: the config's "layer_split" as the engine's --layer-split value: "auto" (the default), or the FIRST LAYER of
+    each later GPU's share - one rising number per GPU after the first, e.g. "24,36,42" for 4 GPUs (layers 0-23 on the
+    first card, 24-35, 36-41, 42 to the end) - as a string or a JSON list ([24, 36, 42]).  ValueError with the format
+    and an example for anything else, such as per-card layer counts ("24,16,12,12")."""
+    v = cfg.get("layer_split")
+    if v is None or (isinstance(v, str) and v.strip().lower() in ("", "auto")):
+        return "auto"
+    n = len(gpu_list(cfg))
+    items = v if isinstance(v, (list, tuple)) else str(v).split(",") if isinstance(v, (str, int)) else None
+    vals = []
+    for x in items or []:
+        try:
+            if isinstance(x, bool) or isinstance(x, float):
+                raise ValueError
+            vals.append(int(str(x).strip()))
+        except ValueError:
+            vals = None
+            break
+    want = max(n - 1, 1)
+    example = ",".join(str(round(48 * (i + 1) / (want + 1))) for i in range(want))
+    hint = (f'"layer_split" is the first layer of each later GPU, one rising number per GPU after the first '
+            f'({want} for {n} GPUs), not a count of layers per card - e.g. "{example}" (or [{example.replace(",", ", ")}])'
+            f' for an even share of 48 layers, or "auto" (the default) to place them by each card\'s free VRAM')
+    if not vals:
+        raise ValueError(f"{hint}; got {v!r}")
+    if n > 1 and len(vals) != n - 1:
+        raise ValueError(f"{hint}; got {len(vals)} number(s) ({v!r}) for {n} GPUs")
+    if vals[0] < 2 or any(b <= a for a, b in zip(vals, vals[1:])):
+        raise ValueError(f"{hint}; got {v!r}, which does not rise from 2 or more")
+    return ",".join(str(x) for x in vals)
+
+
 def engine_args(cfg: dict) -> list[str]:
     """The engine's arguments: the config's, and with several GPUs the layer split across them ("layer_split" in the
-    config: "auto" by default, or the first layer of each later GPU's share, e.g. "18" or "16,32")."""
+    config: "auto" by default, or the first layer of each later GPU's share, e.g. "18" or "16,32"; see
+    layer_split_value)."""
     args = list(cfg["args"])
     if len(gpu_list(cfg)) > 1 and "--layer-split" not in args:
-        args += ["--layer-split", str(cfg.get("layer_split") or "auto")]
+        args += ["--layer-split", layer_split_value(cfg)]
     # opt-in: an auto split runs on the first card alone when it holds every profiled expert and the KV
     if len(gpu_list(cfg)) > 1 and cfg.get("split_skip_if_fits") and "--split-skip-if-fits" not in args:
         args.append("--split-skip-if-fits")
@@ -2914,7 +2948,11 @@ def main() -> int:
         print("model unloaded; the first request loads it ..." if lazy else
               "loading the model (the first start takes a minute or two) ...", flush=True)
         if len(gpu_list(cfg)) > 1:
-            print(f"[strata] layer split across GPUs {gpu_list(cfg)} ({cfg.get('layer_split') or 'auto'})", flush=True)
+            try:
+                split = layer_split_value(cfg)          # #644: before the (minutes-long) start
+            except ValueError as e:
+                raise SystemExit(f"[strata] config {e}")
+            print(f"[strata] layer split across GPUs {gpu_list(cfg)} ({split})", flush=True)
         # a relative "exe" is the config's cwd's: Windows' CreateProcess resolves "engine/strata.exe" against nothing
         # it is told about (WinError 2), so it is made absolute here
         exe = cfg["exe"] if os.path.isabs(cfg["exe"]) else os.path.abspath(os.path.join(cfg.get("cwd") or ".", cfg["exe"]))
diff --git a/serve/test_server.py b/serve/test_server.py
index 60a19269643..0a8e15a1c50 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -21,7 +21,8 @@
 sys.path.insert(0, str(Path(__file__).resolve().parents[1]))
 from serve.frontend import ChatTemplate  # noqa: E402
 from serve.server import (CTX_SLACK, ByteTokenizer, EngineDied, GpuBusy, MockEngine, Service, StrataEngine,  # noqa: E402
-                          engine_args, prompt_tokens_seen, request_timings, serve, start_failure_hint)
+                          engine_args, layer_split_value, prompt_tokens_seen, request_timings, serve,
+                          start_failure_hint)
 from types import SimpleNamespace  # noqa: E402
 
 ROOT = Path(__file__).resolve().parents[1]
@@ -847,6 +848,38 @@ def test_no_profile_in_the_args(self):
         self.assertEqual(engine_args(cfg), ["--native", "x", "--expert-profile-save", "learned.bin"])
 
 
+class LayerSplit(unittest.TestCase):
+    """#644: "layer_split" is the first layer of each later GPU; a list is accepted, counts per card are not."""
+
+    def cfg(self, split, gpus=(2, 0, 1, 3)):
+        c = {"args": ["--native", "x"], "gpu": list(gpus)}
+        if split is not ...:
+            c["layer_split"] = split
+        return c
+
+    def test_auto_and_absent(self):
+        for v in (..., None, "", "auto", "AUTO"):
+            self.assertEqual(engine_args(self.cfg(v))[-2:], ["--layer-split", "auto"])
+
+    def test_string_and_list(self):
+        self.assertEqual(engine_args(self.cfg("24,36,42"))[-2:], ["--layer-split", "24,36,42"])
+        self.assertEqual(engine_args(self.cfg(" 24, 36 ,42 "))[-2:], ["--layer-split", "24,36,42"])
+        self.assertEqual(engine_args(self.cfg([24, 36, 42]))[-2:], ["--layer-split", "24,36,42"])
+        self.assertEqual(engine_args(self.cfg(18, gpus=(0, 1)))[-2:], ["--layer-split", "18"])
+        self.assertEqual(engine_args(self.cfg([18], gpus=(0, 1)))[-2:], ["--layer-split", "18"])
+
+    def test_counts_per_card_are_refused_with_the_format(self):
+        for bad in ("24,16,12,12", [24, 16, 12, 12], "24,16,12", "24,36", "x", [24.5, 30, 40], "1,20,30", [True]):
+            with self.assertRaises(ValueError) as e:
+                layer_split_value(self.cfg(bad))
+            self.assertIn("first layer of each later GPU", str(e.exception))
+            self.assertIn('"12,24,36"', str(e.exception))   # the example for 4 GPUs
+
+    def test_one_gpu_ignores_it(self):
+        self.assertEqual(engine_args({"args": ["--native", "x"], "gpu": [0], "layer_split": "24,16"}),
+                         ["--native", "x"])
+
+
 class DraftHeadHint(unittest.TestCase):
     """#474: a start that stopped at "the draft head does not fit" says what to change, from this start's log lines."""
 
diff --git a/setup.py b/setup.py
index c1990b7d92b..69624a11bc9 100644
--- a/setup.py
+++ b/setup.py
@@ -2943,8 +2943,9 @@ def main() -> int:
     ap.add_argument("--gpus", help="several GPUs sharing one model, as nvidia-smi numbers them (AMD: as setup lists "
                                    "them): \"0,2\", or \"all\" (every card that can); the first is the main one. "
                                    "Saved, also when starting (see docs/MULTI_GPU.md)")
-    ap.add_argument("--layer-split", help="with --gpus: where each later GPU's layers start (\"18\", \"16,32\"); "
-                                          "default auto, placed from each GPU's free VRAM")
+    ap.add_argument("--layer-split", help="with --gpus: where each later GPU's layers start (\"18\", \"16,32\"), one "
+                                          "rising number per GPU after the first - not layers per card; default "
+                                          "auto, placed from each GPU's free VRAM")
     ap.add_argument("--host", help="where the server listens: 127.0.0.1 = this PC only (default), 0.0.0.0 = also other "
                                    "devices on your network (issue #26; set --api-key too)")
     ap.add_argument("--api-key", help="require this key from clients (recommended with --host 0.0.0.0)")
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index cb991841ea5..ac250f79aff 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1416,7 +1416,9 @@ int main(int argc, char** argv) {
         }
         if (!ok) {
             std::fprintf(stderr, "strata generate: --layer-split K[,K2..]|auto needs --serve, rising K from 2, and one "
-                                 "distinct GPU per K in --split-device (1..%d; or 0 with one K: the same GPU)\n", n_dev - 1);
+                                 "distinct GPU per K in --split-device (1..%d; or 0 with one K: the same GPU). K is the "
+                                 "FIRST LAYER of each later GPU, not a count of layers per card: \"24,36,42\" for 4 "
+                                 "GPUs, not \"24,12,6,6\" (got \"%s\")\n", n_dev - 1, o.layer_split.c_str());
             return 2;
         }
     }

From 247b5a169b7fe8806b46446a102f32f8862a6dd8 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:14:32 +0200
Subject: [PATCH 077/201] adaptive swaps: gather the pin spans only when they
 are pinned (PR #640 follow-up)

The adaptive swap loops called srcp->blob() for every swap to collect the spans pin_blobs locks, on every build -
pin_blobs is a no-op except on Linux AMD with STRATA_ARENA_MMAP=1. blob() is not free: it counts reads and the file
tier (--mmap-experts) may assemble the blob, a second time for the copy. pin_blobs_on() now guards the gathering, so
CUDA and the runs without STRATA_ARENA_MMAP do exactly what 0.1.38 did.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index f621754c0a6..a890965f66f 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -121,11 +121,20 @@ bool under_wddm() {
 // a copy from a range only PART of which is registered fails ("invalid argument"), so the page ranges are merged
 // first and each merged span is registered once.  A span that does not register is copied through the staging
 // path.  Portable: a layer split copies to either card.
+// Whether pin_blobs locks anything (AMD on Linux with STRATA_ARENA_MMAP=1): the callers only gather the swaps' spans
+// then - `blob()` is not free (it counts reads, and the file tier may assemble the blob), so the default runs skip it.
+bool pin_blobs_on() {
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    static const bool on = std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1';
+    return on;
+#else
+    return false;
+#endif
+}
 int pin_blobs(std::vector<std::pair<uintptr_t, uintptr_t>> r, std::vector<void*>& live) {
     int failed = 0;   // ranges left pageable (a copy from them still works, through the driver's staging)
 #if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
-    static const bool on = std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1';
-    if (!on || r.empty()) return 0;
+    if (!pin_blobs_on() || r.empty()) return 0;
     for (auto& [a, e] : r) { a &= ~(uintptr_t) 4095; e = (e + 4095) & ~(uintptr_t) 4095; }
     std::sort(r.begin(), r.end());
     size_t k = 0;
@@ -4963,7 +4972,7 @@ int main(int argc, char** argv) {
             std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
             if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
             if (!resident_stage_swaps(src, xcache, host_res, g.n_expert, swaps, adapt_stream)) return false;
-            {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+            if (pin_blobs_on()) {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
                 std::vector<std::pair<uintptr_t, uintptr_t>> spans;
                 for (const Swap& s : swaps)
                     if (const uint8_t* b = srcp->blob(s.layer, s.in))
@@ -6661,7 +6670,7 @@ int main(int argc, char** argv) {
                 std::fprintf(stderr, "strata generate: an adaptive refill failed (copying evicted experts back)\n");
                 return false;
             }
-            {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+            if (pin_blobs_on()) {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
                 std::vector<std::pair<uintptr_t, uintptr_t>> spans;
                 for (const Swap& s : swaps)
                     if (const uint8_t* b = srcp->blob(s.layer, s.in))

From fe49e227bf5669af473ce570c3fe79c7a45477b3 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:14:39 +0200
Subject: [PATCH 078/201] setup: --no-browser / "open_browser": false keeps the
 chat page from opening (#609, #631)

--no-browser (on a start or at setup) saves "open_browser": false in the
model's run config; start() and run-<model>.bat/.sh then leave --open
out, and the server ignores --open when the config says so (a start
script written earlier still has it). --browser undoes it. Without the
flag the config, the command and the script are as before.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/INSTALL.md             |  2 ++
 serve/server.py             |  4 +--
 setup.py                    | 33 +++++++++++++------
 tools/test_setup_config.py  | 63 +++++++++++++++++++++++++++++++++++++
 tools/test_setup_golden.py  |  2 +-
 tools/test_setup_unsloth.py |  2 +-
 6 files changed, 92 insertions(+), 14 deletions(-)

diff --git a/docs/INSTALL.md b/docs/INSTALL.md
index 7f32e991b36..e6f721d7d8d 100644
--- a/docs/INSTALL.md
+++ b/docs/INSTALL.md
@@ -191,6 +191,8 @@ START-HERE.bat --port 8081                      another port
 START-HERE.bat --gpu 1                          another GPU (setup picks the one with the most VRAM)
 START-HERE.bat --gpus 0,2                       several GPUs sharing the model
 START-HERE.bat --vram-reserve-mib 2048          leave 2 GB of VRAM free for other programs (remembered)
+START-HERE.bat --no-browser                     do not open the chat page when the model is ready (remembered;
+                                                --browser undoes it)
 START-HERE.bat --setup --backend hip            the AMD engine on a PC that also has an NVIDIA card
 START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>     reachable from other devices, with a key
 START-HERE.bat --calibrate                      tune the engine for this PC (about 5-10 minutes), then start
diff --git a/serve/server.py b/serve/server.py
index 606bad5dd3a..5deeb9d0df9 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -3027,8 +3027,8 @@ def main() -> int:
                   "in an admin PowerShell:\n         New-NetFirewallRule -DisplayName \"Strata " + str(a.port) + "\" "
                   "-Direction Inbound -Protocol TCP -LocalPort " + str(a.port) + " -Action Allow -Profile Private\n"
                   "       (and set this network to Private in Windows' network settings)", flush=True)
-    if a.open:
-        import webbrowser
+    if a.open and cfg.get("open_browser") is not False:   # #609: the config's "open_browser": false wins (an older
+        import webbrowser                                  # run-<model>.bat still passes --open)
         webbrowser.open(f"http://{'127.0.0.1' if a.host in ('0.0.0.0', '') else a.host}:{a.port}/")
     # #96: docker stop sends SIGTERM, which Python ignores by default, so the container's PID 1 would be killed after
     # the grace period with the engine still running. SIGTERM takes Ctrl+C's path below (QUIT to the engine).
diff --git a/setup.py b/setup.py
index 3093c8ebf6d..e53d0b7f70d 100644
--- a/setup.py
+++ b/setup.py
@@ -2682,6 +2682,8 @@ def settings_summary(cfg: dict, port=None) -> str:
     srv = [f"{cfg.get('host', '127.0.0.1')}:{port or cfg.get('port', 8080)}"]
     if cfg.get("api_key"):
         srv.append("api key set")
+    if cfg.get("open_browser") is False:               # #609
+        srv.append("no browser")
     for k in ("gpu", "layer_split", "draft_vocab", "fit_max_tokens", "reasoning_budget_tokens", "anthropic_thinking"):
         if cfg.get(k) is not None:
             v = cfg[k]
@@ -2710,8 +2712,9 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
     if keep and any(cfg.get(k) != v for k, v in keep.items()):   # #179: a --host/--api-key on a start was ignored
         cfg.update(keep)
         write_config(cfg_path, cfg)
-        ok("saved for this model: " + ", ".join("api key" if k == "api_key" else f"{k.replace('_', ' ')} {v}"
-                                                for k, v in keep.items()))
+        ok("saved for this model: " + ", ".join(
+            "api key" if k == "api_key" else ("the browser opens" if v else "no browser") if k == "open_browser"
+            else f"{k.replace('_', ' ')} {v}" for k, v in keep.items()))
     cfg_path.touch()                                     # the most recently used model
     if "--mtp" in cfg["args"][:-1]:
         refresh_draft_vocab(Path(cfg["args"][cfg["args"].index("--mtp") + 1]), cfg.get("draft_vocab", "cjk"))
@@ -2779,7 +2782,8 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
         if g is not None:
             cfg = ensure_engine_for([g], cfg_path, cfg, yes)
             ok("GPU: " + gpu_name(g))
-    if open_browser:
+    browser = open_browser and cfg.get("open_browser") is not False   # #609: "open_browser": false, --no-browser
+    if browser:
         cmd.append("--open")
     gb = 0.0
     if "--native" in cfg["args"]:
@@ -2799,7 +2803,8 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
         say(f"  Starting {cfg.get('model_name', 'the model')}: it loads {size} into RAM and locks part of it for the "
             "GPU.")
     say("  While it does, YOUR PC CAN BE SLOW OR STOP RESPONDING FOR 1-3 MINUTES (longer the first time after a")
-    say("  restart). That is normal: please wait and don't close this window - the browser opens when it is ready.")
+    say("  restart). That is normal: please wait and don't close this window - " + (
+        "the browser opens when it is ready." if browser else "the server says when it is ready."))
     say("  Later, closing this window stops the model.")
     say("  " + "-" * 100)
     for n, line in enumerate(textwrap.wrap(f"Settings ({cfg_path.name}): {settings_summary(cfg, port)}", 100,
@@ -2944,9 +2949,10 @@ def ensure_engine_for(cards, cfg_path: Path, cfg: dict, yes: bool) -> dict:
     return cfg
 
 
-def write_run_script(model, cfg_path, port):
+def write_run_script(model, cfg_path, port, open_browser=True):
+    """run-<model>.bat / .sh: the server with this config; `open_browser` False (#609: --no-browser) leaves --open out."""
     serve = [sys.executable, str(ROOT / "serve" / "server.py"), "--engine", "strata", "--config", str(cfg_path),
-             "--port", str(port), "--open"]
+             "--port", str(port)] + (["--open"] if open_browser else [])
     if WIN:
         script = ROOT / f"run-{model.lower()}.bat"
         script.write_text("@echo off\r\ntitle Strata " + model + "\r\ncd /d \"" + str(ROOT) + "\"\r\n" +
@@ -3028,6 +3034,11 @@ def main() -> int:
     ap.add_argument("--host", help="where the server listens: 127.0.0.1 = this PC only (default), 0.0.0.0 = also other "
                                    "devices on your network (issue #26; set --api-key too)")
     ap.add_argument("--api-key", help="require this key from clients (recommended with --host 0.0.0.0)")
+    ap.add_argument("--no-browser", dest="browser", action="store_false", default=None,
+                    help="do not open the chat page in the browser when the model is ready (for a harness or an app "
+                         "that uses the API; remembered for this model, also in run-<model>.bat/.sh)")
+    ap.add_argument("--browser", dest="browser", action="store_true",
+                    help="open the chat page again when the model is ready (the default; undoes --no-browser)")
     ap.add_argument("--data-dir", help="where the model files go (~70-120 GB): default Strata-data next to this folder, "
                                        "remembered for every Strata folder on this PC")
     ap.add_argument("--models-dir", help="where the GGUF files go (default: <data folder>/models)")
@@ -3134,14 +3145,14 @@ def main() -> int:
                  + ("keeps" if a.no_start else "starts with") + " the default settings")
         return 0 if a.no_start else start(pick_cfg, a.port, run_gpu, yes=a.yes, layer_split=a.layer_split,
                      keep={"host": a.host, "api_key": a.api_key, "draft_vocab": a.draft_vocab,
-                           "vram_reserve_mib": a.vram_reserve_mib})
+                           "vram_reserve_mib": a.vram_reserve_mib, "open_browser": a.browser})
     if have and not (a.setup or a.model or a.family or a.check or a.no_start):
         if not a.build:
             update_installed_engine(a.prebuilt)
         if len(have) == 1:
             return start(have[0], a.port, run_gpu, yes=a.yes, layer_split=a.layer_split,
                      keep={"host": a.host, "api_key": a.api_key, "draft_vocab": a.draft_vocab,
-                           "vram_reserve_mib": a.vram_reserve_mib})
+                           "vram_reserve_mib": a.vram_reserve_mib, "open_browser": a.browser})
         say()
         for i, c in enumerate(have, 1):
             say(f"  {i}) {json.loads(c.read_text(encoding='utf-8-sig')).get('model_name', c.stem)}")
@@ -3150,7 +3161,7 @@ def main() -> int:
         if pick <= len(have):
             return start(have[pick - 1], a.port, run_gpu, yes=a.yes, layer_split=a.layer_split,
                      keep={"host": a.host, "api_key": a.api_key, "draft_vocab": a.draft_vocab,
-                           "vram_reserve_mib": a.vram_reserve_mib})
+                           "vram_reserve_mib": a.vram_reserve_mib, "open_browser": a.browser})
 
     # ---- 1. the PC
     step(1, "checking your PC")
@@ -3734,6 +3745,8 @@ def main() -> int:
         cfg["api_key"] = a.api_key
     if draft_vocab:
         cfg["draft_vocab"] = draft_vocab
+    if a.browser is not None:                          # #609: only when given (else an earlier choice is carried over)
+        cfg["open_browser"] = a.browser
     if vision != "none":
         cfg["vision"] = {"exe": str(eng / VEXE), "mmproj": str(mmproj), "model": str(shards[0]),
                          "gpu": vision == "gpu", "max_tokens": VISION[vision]["max_tokens"]}
@@ -3747,7 +3760,7 @@ def main() -> int:
         cfg["args"] = CAL.apply(cfg["args"], cal.get("settings") or {})
         ok("the settings tuned for this PC earlier are used" + (f" ({cal['date']})" if cal.get("date") else ""))
     write_setup_config(cfg_path, cfg, adopted if adopted is not None and adopted.name == cfg_path.name else None)
-    script = write_run_script(tag, cfg_path, port)
+    script = write_run_script(tag, cfg_path, port, cfg.get("open_browser") is not False)
     # offered only when someone answers: --yes installs and adopted earlier installs are not held up by it
     if cal is None and not hip and not a.no_start and not a.yes and ask(
             "Tune Strata for this PC now? It measures a few engine settings (about 5-10 minutes; the PC is busy "
diff --git a/tools/test_setup_config.py b/tools/test_setup_config.py
index ada27efb6af..a08bc3e4969 100644
--- a/tools/test_setup_config.py
+++ b/tools/test_setup_config.py
@@ -11,6 +11,7 @@
 import sys
 import tempfile
 import unittest
+import unittest.mock
 from pathlib import Path
 
 ROOT = Path(__file__).resolve().parents[1]
@@ -131,5 +132,67 @@ def test_a_copy_set_up_like_the_last_one_keeps_them_too(self):
             self.assertFalse((Path(d) / "strata-x.json.bak").exists())   # nothing here was replaced
 
 
+class NoBrowser(unittest.TestCase):
+    """#609 (#631): --no-browser keeps the chat page from opening: "open_browser": false in the run config, no --open
+    on the start's server command or in run-<model>.bat/.sh.  Without the flag nothing changes."""
+
+    def setUp(self):
+        self.ram, self.found = PROFILES["64GB-1x32GB"]
+
+    def run_setup(self, *extra, configs=()):
+        return install(self.ram, self.found, ["--family", "qwen", "--model", "Q2_0", "--no-start", *extra],
+                       configs=configs)
+
+    def test_at_setup(self):
+        code, out, cfg, _ = self.run_setup("--no-browser")
+        self.assertEqual(code, 0, out)
+        self.assertIs(cfg["open_browser"], False)
+        code, out, cfg, _ = self.run_setup()
+        self.assertNotIn("open_browser", cfg)                             # not given: the config as before
+        # setup run again without the flag keeps the choice (#629); --browser undoes it
+        code, out, cfg, _ = self.run_setup(configs=[("strata-q2_0.json", {"open_browser": False})])
+        self.assertIs(cfg["open_browser"], False)
+        code, out, cfg, _ = self.run_setup("--browser", configs=[("strata-q2_0.json", {"open_browser": False})])
+        self.assertIs(cfg["open_browser"], True)
+
+    def test_run_script(self):
+        with tempfile.TemporaryDirectory() as d, unittest.mock.patch.object(setup, "ROOT", Path(d)):
+            text = lambda p: p.read_text(encoding="utf-8")   # noqa: E731
+            self.assertIn('"--open"', text(setup.write_run_script("Q2_0", Path(d) / "strata-q2_0.json", 8080)))
+            script = setup.write_run_script("Q2_0", Path(d) / "strata-q2_0.json", 8080, False)
+            self.assertNotIn("--open", text(script))
+            self.assertIn('"--port" "8080"', text(script))
+
+    def start_cmd(self, cfg, keep=None):
+        with tempfile.TemporaryDirectory() as d:
+            exe = Path(d) / "strata.exe"
+            exe.write_bytes(b"")
+            p = Path(d) / "strata-q2_0.json"
+            p.write_text(json.dumps({"exe": str(exe), "args": ["--kv", "int8"], "gpu": 0, "gpus_asked": True, **cfg}))
+            call = unittest.mock.Mock(return_value=0)
+            with unittest.mock.patch.object(setup, "gpus", lambda: self.found), \
+                    unittest.mock.patch.object(setup, "is_wsl", lambda: False), \
+                    unittest.mock.patch.object(setup, "ensure_engine_for", lambda cards, path, c, yes: c), \
+                    unittest.mock.patch.object(setup.subprocess, "call", call):
+                _, out = quiet(setup.start, p, None, None, True, True, None, keep)
+            return call.call_args[0][0], out, json.loads(p.read_text())
+
+    def test_on_a_start(self):
+        cmd, out, _ = self.start_cmd({})
+        self.assertIn("--open", cmd)                                      # the default, as before
+        self.assertIn("the browser opens when it is ready", out)
+        cmd, out, _ = self.start_cmd({"open_browser": False})
+        self.assertNotIn("--open", cmd)
+        self.assertNotIn("the browser opens", out)
+        self.assertIn("no browser", out)                                  # the Settings line says so
+        cmd, out, saved = self.start_cmd({}, {"open_browser": False})     # START-HERE --no-browser: kept from now on
+        self.assertNotIn("--open", cmd)
+        self.assertIs(saved["open_browser"], False)
+        self.assertIn("saved for this model: no browser", out)
+        cmd, out, saved = self.start_cmd({"open_browser": False}, {"open_browser": True})
+        self.assertIn("--open", cmd)
+        self.assertIs(saved["open_browser"], True)
+
+
 if __name__ == "__main__":
     unittest.main()
diff --git a/tools/test_setup_golden.py b/tools/test_setup_golden.py
index 054c1c14efe..8cee0bfe3fb 100644
--- a/tools/test_setup_golden.py
+++ b/tools/test_setup_golden.py
@@ -113,7 +113,7 @@ def fake_download(url, dst, what=None):
             mock.patch.object(setup, "run", lambda *a, **k: None),
             mock.patch.object(setup, "mtp_corrupt", lambda *a, **k: False),
             mock.patch.object(setup, "refresh_draft_vocab", lambda *a, **k: None),
-            mock.patch.object(setup, "write_run_script", lambda tag, cfg, port: t / f"run-{tag}.bat"),
+            mock.patch.object(setup, "write_run_script", lambda tag, cfg, port, *_: t / f"run-{tag}.bat"),
             mock.patch.object(setup, "saved_calibration", lambda cfg: None),
             mock.patch.object(setup, "calibrate_config", mock.Mock(side_effect=AssertionError("calibrated"))),
             mock.patch.dict(sys.modules, {"gguf_reader": types.SimpleNamespace(GGUFFile=FakeGGUF)}),
diff --git a/tools/test_setup_unsloth.py b/tools/test_setup_unsloth.py
index a010b5e8f20..804a5c4341c 100644
--- a/tools/test_setup_unsloth.py
+++ b/tools/test_setup_unsloth.py
@@ -174,7 +174,7 @@ def fake_run(cmd, *a, **k):
             mock.patch.object(setup, "verify_sha256", lambda s, size, sha: self.verified.append((s.name, size, sha))),
             mock.patch.object(setup, "run", fake_run),
             mock.patch.object(setup, "refresh_draft_vocab", lambda *a, **k: None),
-            mock.patch.object(setup, "write_run_script", lambda tag, cfg, port: self.t / f"start-{tag}.bat"),
+            mock.patch.object(setup, "write_run_script", lambda tag, cfg, port, *_: self.t / f"start-{tag}.bat"),
             mock.patch.object(setup, "saved_calibration", lambda cfg: None),
             mock.patch.object(setup, "start", mock.Mock(side_effect=AssertionError("started"))),
             mock.patch.dict(sys.modules, {"gguf_reader": types.SimpleNamespace(GGUFFile=FakeGGUF)}),

From e90fbb4e7073e60cc1561995914710b6535aab19 Mon Sep 17 00:00:00 2001
From: Yannick Loth <727881+yannickloth@users.noreply.github.com>
Date: Sat, 3 Oct 2026 07:52:50 +0200
Subject: [PATCH 079/201] make_profile: --reorder so a trace can rank ahead of
 a complete base

tools/make_profile.py builds the ranking as the base's order, then the
trace's pairs, then the fill. The base is only appended to, so --base can
never move a pair the base already ranks - and the shipped
data/expert-profile.bin ranks all 24,576 pairs, which makes a trace a
no-op:

  wrote ...: 24576 ranked pairs (24576 from the base, 0 from the traces, ...)

So the documented way to seed a profile from --dump-routing (rank the
pairs your workload routes most) silently did nothing with the shipped
base; only --no-base changed anything, and that drops the base's ranking
entirely.

Add --reorder: rank the trace's pairs first (most frequent first), then
let the base fill the rest, then the fill. The default is unchanged. The
ranking moves into a rank_profile() so it can be tested without a model;
tools/test_make_profile.py covers the no-op, --reorder, --no-base, the
frequency/tie order and an end-to-end run over a complete base. On this
host's coding trace the same command now puts 5,808 trace pairs first.
---
 tools/make_profile.py      |  58 ++++++++++++++-------
 tools/test_make_profile.py | 104 +++++++++++++++++++++++++++++++++++++
 2 files changed, 143 insertions(+), 19 deletions(-)
 create mode 100644 tools/test_make_profile.py

diff --git a/tools/make_profile.py b/tools/make_profile.py
index 0f02384899d..9916cf107f2 100644
--- a/tools/make_profile.py
+++ b/tools/make_profile.py
@@ -6,9 +6,12 @@
 writes one that ranks all 24,576.
 
 The order: the base profile's ranking (default: the shipped data/expert-profile.bin), then the pairs your routing
-traces used, most frequent first, then every pair still missing, interleaved across the layers.
+traces used, most frequent first, then every pair still missing, interleaved across the layers.  The base is only
+*appended to*, never reordered - and the shipped profile already ranks all 24,576 pairs, so with it a trace is a
+no-op.  `--reorder` ranks the traces first and lets the base fill the rest, which is how a workload's trace decides
+the top; `--no-base` drops the base entirely.
 
-    python tools/make_profile.py [TRACE ...] [--base data/expert-profile.bin | --no-base] [--out PATH]
+    python tools/make_profile.py [TRACE ...] [--base data/expert-profile.bin | --no-base] [--reorder] [--out PATH]
                                  [--n-expert 256]      (a pruned model: GSQ-RCO Coder keeps 256 of 512)
 
 A routing trace comes from a one-shot engine run with `--dump-routing FILE` (a prompt typical of your use; the
@@ -60,39 +63,56 @@ def write_profile(path, ranked, n_expert=N_EXPERT):
             f.write(struct.pack("<%di" % n_expert, *table[layer]))
 
 
+def rank_profile(base_pairs, trace_freq, n_expert=N_EXPERT, no_base=False, reorder=False):
+    """The ranked (layer, expert) list and the counts it was built from (`base`, `trace`, `fill`).
+
+    Default: the base's order, then the traces' pairs most frequent first, then the fill.  With `reorder` (or
+    `no_base`) the traces' pairs come first, so a base that already ranks every pair no longer hides them; the base
+    (unless `no_base`) and then the fill follow.  A base is never reordered against itself - it only ever fills."""
+    ranked, seen, counts = [], set(), defaultdict(int)
+
+    def take(pairs, key):
+        for p in pairs:
+            p = (int(p[0]), int(p[1]))
+            if p not in seen:
+                seen.add(p)
+                ranked.append(p)
+                counts[key] += 1
+
+    trace_pairs = [p for p, _ in sorted(trace_freq.items(), key=lambda kv: (-kv[1], kv[0]))]
+    if no_base or reorder:
+        take(trace_pairs, "trace")
+    if not no_base:
+        take(base_pairs, "base")
+    if not (no_base or reorder):
+        take(trace_pairs, "trace")
+    take(((layer, e) for e in range(n_expert) for layer in range(N_LAYER)), "fill")
+    return ranked, counts
+
+
 def main():
     ap = argparse.ArgumentParser(description=__doc__.split("\n\n")[0])
     ap.add_argument("traces", nargs="*", help="routing traces from --dump-routing")
     ap.add_argument("--base", default=str(ROOT / "data" / "expert-profile.bin"), help="ranking to keep first")
     ap.add_argument("--no-base", action="store_true", help="rank by the traces only")
+    ap.add_argument("--reorder", action="store_true",
+                    help="rank the traces' pairs before the base's (the base, then the fill, follow); needed with a "
+                         "base that already ranks every pair, where --base alone cannot change the order")
     ap.add_argument("--out", default=str(ROOT / "data" / "expert-profile.bin"))
     ap.add_argument("--n-expert", type=int, default=N_EXPERT, help="experts per layer (default 512)")
     a = ap.parse_args()
 
-    ranked, seen = [], set()
-
-    def take(pairs):
-        for p in pairs:
-            p = (int(p[0]), int(p[1]))
-            if p not in seen:
-                seen.add(p)
-                ranked.append(p)
-
     ne = a.n_expert
-    if not a.no_base:
-        take(read_profile(a.base, ne))
-    n_base = len(ranked)
     freq = defaultdict(int)
     for t in a.traces:
         for p, c in read_trace(t, ne).items():
             freq[p] += c
-    take(p for p, _ in sorted(freq.items(), key=lambda kv: (-kv[1], kv[0])))
-    n_trace = len(ranked) - n_base
-    take((layer, e) for e in range(ne) for layer in range(N_LAYER))   # the rest, across the layers
+    base_pairs = [] if a.no_base else read_profile(a.base, ne)
+    ranked, counts = rank_profile(base_pairs, freq, ne, no_base=a.no_base, reorder=a.reorder)
     write_profile(a.out, ranked, ne)
     assert read_profile(a.out, ne) == ranked, "the profile did not survive the round trip"
-    print(f"wrote {a.out}: {len(ranked)} ranked pairs ({n_base} from the base, {n_trace} from the traces, "
-          f"{len(ranked) - n_base - n_trace} filled in)")
+    print(f"wrote {a.out}: {len(ranked)} ranked pairs ({counts['base']} from the base, {counts['trace']} from the "
+          f"traces, {counts['fill']} filled in)")
 
 
 if __name__ == "__main__":
diff --git a/tools/test_make_profile.py b/tools/test_make_profile.py
new file mode 100644
index 00000000000..f9c36202c0f
--- /dev/null
+++ b/tools/test_make_profile.py
@@ -0,0 +1,104 @@
+"""Tests for tools/make_profile.py, without a model: synthetic profiles and routing traces.
+
+    python -m unittest tools.test_make_profile
+"""
+from __future__ import annotations
+
+import struct
+import sys
+import tempfile
+import unittest
+from collections import defaultdict
+from pathlib import Path
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT / "tools"))
+import make_profile as MP  # noqa: E402
+
+NE = 4   # a tiny "experts per layer"; the layer count is fixed at MP.N_LAYER
+
+
+def write_trace(path, records):
+    """One record per (layer, [expert ids]); the reader skips k weights after the k ids."""
+    with open(path, "wb") as f:
+        for layer, experts in records:
+            f.write(struct.pack("<ii", layer, len(experts)))
+            f.write(struct.pack("<%di" % len(experts), *experts))
+            f.write(struct.pack("<%df" % len(experts), *([1.0] * len(experts))))
+
+
+def full_base():
+    """Every pair, in an order that differs from rank_profile's fill (e-major then layer)."""
+    return [(layer, e) for layer in range(MP.N_LAYER) for e in range(NE)]
+
+
+class RankProfile(unittest.TestCase):
+    def test_a_complete_base_hides_the_trace(self):
+        # the shipped profile's situation: it already ranks every pair, so the trace cannot move anything
+        base = full_base()
+        freq = defaultdict(int, {(5, 1): 10, (6, 2): 7})
+        ranked, counts = MP.rank_profile(base, freq, NE)
+        self.assertEqual(ranked, base)
+        self.assertEqual(counts["trace"], 0)
+        self.assertEqual(counts["base"], MP.N_LAYER * NE)
+
+    def test_reorder_puts_the_traces_first(self):
+        base = full_base()
+        freq = defaultdict(int, {(5, 1): 10, (6, 2): 7})
+        ranked, counts = MP.rank_profile(base, freq, NE, reorder=True)
+        self.assertEqual(ranked[:2], [(5, 1), (6, 2)])
+        self.assertEqual(set(ranked), set(base))                 # still every pair, once
+        self.assertEqual(len(ranked), len(base))
+        self.assertEqual(counts["trace"], 2)
+        self.assertEqual(counts["base"], MP.N_LAYER * NE - 2)    # the base fills the rest, minus the two
+
+    def test_frequency_and_tie_break_order_the_trace(self):
+        freq = defaultdict(int, {(1, 0): 1, (2, 0): 3, (3, 0): 3})
+        ranked, _ = MP.rank_profile([], freq, NE, no_base=True)  # (2,0)/(3,0) tie -> the smaller pair first
+        self.assertEqual(ranked[:3], [(2, 0), (3, 0), (1, 0)])
+
+    def test_default_appends_only(self):
+        base = [(0, 0), (0, 1)]
+        freq = defaultdict(int, {(0, 0): 5, (1, 3): 9})
+        ranked, _ = MP.rank_profile(base, freq, NE)
+        self.assertEqual(ranked[:3], [(0, 0), (0, 1), (1, 3)])   # base first; (0,0) already there, not moved
+
+    def test_no_base_uses_the_traces_then_the_fill(self):
+        base = [(0, 0), (0, 1)]
+        freq = defaultdict(int, {(1, 3): 9, (0, 0): 5})
+        ranked, counts = MP.rank_profile(base, freq, NE, no_base=True)
+        self.assertEqual(ranked[:2], [(1, 3), (0, 0)])
+        self.assertEqual(counts["base"], 0)
+        self.assertEqual(len(ranked), MP.N_LAYER * NE)
+
+    def test_reorder_without_traces_is_the_default(self):
+        base = full_base()
+        self.assertEqual(MP.rank_profile(base, defaultdict(int), NE, reorder=True)[0], base)
+
+
+class Main(unittest.TestCase):
+    def run_main(self, argv):
+        old, sys.argv = sys.argv, ["make_profile.py"] + argv
+        try:
+            MP.main()
+        finally:
+            sys.argv = old
+
+    def test_end_to_end_reorder_over_a_complete_base(self):
+        with tempfile.TemporaryDirectory() as d:
+            base = Path(d) / "base.bin"
+            out = Path(d) / "out.bin"
+            trace = Path(d) / "t.bin"
+            MP.write_profile(str(base), full_base(), NE)
+            write_trace(str(trace), [(5, [1]), (6, [2]), (6, [2]), (6, [2])])
+            self.run_main([str(trace), "--base", str(base), "--reorder", "--n-expert", str(NE), "--out", str(out)])
+            ranked = MP.read_profile(str(out), NE)
+            self.assertEqual(ranked[:2], [(6, 2), (5, 1)])       # most frequent first
+            self.assertEqual(set(ranked), set(full_base()))
+            # and without --reorder it is the base's order, untouched
+            self.run_main([str(trace), "--base", str(base), "--n-expert", str(NE), "--out", str(out)])
+            self.assertEqual(MP.read_profile(str(out), NE), full_base())
+
+
+if __name__ == "__main__":
+    unittest.main()

From 537588f55a03dcf0a2639c2ebd919054d6a77c43 Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 18:14:59 +0200
Subject: [PATCH 080/201] Parking with a layer split: the draft ring with the
 last stage, on its GPU; guards; trim log

- The draft layer's K/V lives on the last stage's GPU (the drafter is loaded there); its save, ring restore and
  verification now run with that stage's image under that device, instead of with stage 0's image on GPU 0, where
  the ring restore kernel ran against another GPU's memory (seen in Niko1221/Strata#653, which places it the same way).
- Parking with a layer split on one GPU (--split-device 0) is refused at start: untested.
- The whole-session validate refuses an image with stage images; clearer message for stage parts in live.
- --trim-stage-weights says which layers each GPU loads, and fails when index.txt cannot be read.
- conversation_snapshot_test: the whole-session refusal; parking_test.py runs with STRATA_SNAPSHOT_VERIFY=1.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 src/core/conversation_snapshot_test.cpp |  4 ++
 src/core/conversation_state.cpp         |  5 ++-
 src/program/generate.cpp                | 49 ++++++++++++++++++-------
 tools/parking_test.py                   |  5 ++-
 4 files changed, 48 insertions(+), 15 deletions(-)

diff --git a/src/core/conversation_snapshot_test.cpp b/src/core/conversation_snapshot_test.cpp
index 215ec560dce..1f1de53c04b 100644
--- a/src/core/conversation_snapshot_test.cpp
+++ b/src/core/conversation_snapshot_test.cpp
@@ -220,6 +220,10 @@ void full_session(int fmt, int mode, int experts) {
         check(conversation_snapshot_save(incremental,view,ss,g,nullptr,err,std::move(reuse),&reused),"incremental stage capture");
         check(reused>0 && incremental.bytes()<=peak && equal(incremental.kv[0],fresh.kv[0]) &&
               incremental.live.gdn==fresh.live.gdn,"an incremental stage capture reuses pages and equals a full one");
+        SavedConversation split_image=stage;
+        split_image.stage_images.push_back(stage);
+        check(!conversation_snapshot_validate(split_image,ss,g,draft.state,err),
+              "a layer split's image is refused by the whole-session form");
         ConversationKvReuse wrong{a.kv,65,65,{}};
         check(!conversation_snapshot_capture_bytes(wrong,view,ss,g,nullptr,peak,err),"a draft image's K/V is not a stage's reuse");
     }
diff --git a/src/core/conversation_state.cpp b/src/core/conversation_state.cpp
index 1a45e7f1493..981beca16b2 100644
--- a/src/core/conversation_state.cpp
+++ b/src/core/conversation_state.cpp
@@ -275,7 +275,8 @@ bool conversation_snapshot_save(SavedConversation& image, const ConversationView
 
 bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& ss,
                                     const ModelGeometry& g, const QsaState* draft, std::string& error) {
-    if (!image.live.stage_parts.empty()) return fail(error, "layer-split parking is not supported");
+    if (!image.live.stage_parts.empty())
+        return fail(error, "a running checkpoint's stage parts belong in the stage images, not in live.stage_parts");
     if (image.geometry != geometry_key(g)) return fail(error, "incompatible runtime geometry");
     // an image holds exactly one carve's running state and K/V: same layer range or nothing
     if (image.layer_lo != ss.layer_lo || image.layer_hi != ss.layer_hi)
@@ -320,6 +321,8 @@ bool conversation_snapshot_save(SavedConversation& image, const ConversationView
 }
 bool conversation_snapshot_validate(const SavedConversation& image, const SessionState& ss, const ModelGeometry& g,
                                     const QsaState& draft, std::string& error) {
+    // the whole-session form: a layer split's image (stage images) is restored stage by stage, never through here
+    if (!image.stage_images.empty()) return fail(error, "a layer split's image restored as a single session");
     return conversation_snapshot_validate(image, ss, g, &draft, error);
 }
 ConversationRestore conversation_snapshot_restore(const SavedConversation& image, SessionState& ss,
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 6b0f33bcf3e..99e1e8a85ba 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1398,6 +1398,11 @@ int main(int argc, char** argv) {
             for (int d = 1; d < n_dev && (split_auto || split_devs.size() < split_at.size()); ++d) split_devs.push_back(d);
         if (ok && !split_auto && split_devs.empty() && split_at.size() == 1) split_devs.push_back(0);   // one GPU
         split_same = ok && split_devs.size() == 1 && split_devs[0] == 0 && !split_auto;
+        if (split_same && o.conversation_cache_mib > 0 && o.conversation_cache_slots > 0 && o.prompt_cache > 0) {
+            std::fprintf(stderr, "strata serve: conversation parking does not support a layer split on one GPU "
+                                 "(--split-device 0); disable parking with --conversation-cache-mib 0\n");
+            return 2;
+        }
         if (ok && split_auto && split_devs.empty()) {
             std::fprintf(stderr, "strata generate: --layer-split auto: one GPU visible, so no split\n");
             o.layer_split.clear();
@@ -2003,6 +2008,12 @@ int main(int argc, char** argv) {
         std::ifstream idx(o.pack + "/index.txt");
         for (std::string ln; std::getline(idx, ln);)
             if (!ln.empty() && ln[0] != '#') pack_names.push_back(ln.substr(0, ln.find(' ')));
+        if (pack_names.empty()) {
+            std::fprintf(stderr, "strata generate: --trim-stage-weights: cannot read %s/index.txt\n", o.pack.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: --trim-stage-weights: CUDA0 loads the dense weights of layers 0-%lld\n",
+                     (long long) split_at[0] - 1);
     }
     auto range_skip = [&](int64_t lo, int64_t hi) {   // skip + every blk.<l>. tensor outside [lo, hi)
         std::set<std::string> out = skip;
@@ -2337,6 +2348,9 @@ int main(int argc, char** argv) {
         // --trim-stage-weights: this stage's layers only
         const int64_t s_lo = trim ? split_at[i] : 0, s_hi = trim ? (i + 1 < split_at.size() ? split_at[i + 1] : g.n_layers) : -1;
         const std::set<std::string> skip_s = trim ? range_skip(s_lo, s_hi) : skip;
+        if (trim)
+            std::fprintf(stderr, "strata generate: --trim-stage-weights: CUDA%d loads the dense weights of layers %lld-%lld\n",
+                         st.dev, (long long) s_lo, (long long) s_hi - 1);
         uint64_t pool_s = pool_bytes;
         if (trim && !strata::core::WeightTable::pool_bytes(o.pack, pool_s, err, &skip_s)) {
             std::fprintf(stderr, "strata generate: layer split, CUDA%d: %s\n", st.dev, err.c_str());
@@ -4663,6 +4677,10 @@ int main(int argc, char** argv) {
             // later stage (without it - the draft ring is saved once).  The checkpoints are MOVED apart into their
             // stage parts for the capture and put back together whichever way this ends (no running state copied).
             const size_t n_st = stages.size();
+            // the draft layer's K/V lives on the last stage's GPU (the drafter is loaded there): with a split it is
+            // saved with that stage's image, under its device; stage 0's image holds none
+            const strata::core::QsaState* draft0 = n_st > 0 ? nullptr : &mtp.kv_state();
+            auto draft_of = [&](size_t k) -> const strata::core::QsaState* { return k + 1 == n_st ? &mtp.kv_state() : nullptr; };
             strata::core::ConversationCheckpointSplit cs;
             if (n_st > 0) cs = strata::core::conversation_checkpoints_split(std::move(checks), n_st);
             struct MergeBack {
@@ -4681,7 +4699,7 @@ int main(int argc, char** argv) {
                 const strata::core::OnDevice on(st->dev);
                 const strata::core::ConversationView view_k{live, live_imgs, cs.parts[k], cvec_cached};
                 size_t b = 0;
-                if (!strata::core::conversation_snapshot_bytes(view_k, st->ss, g, nullptr, b, err)) {
+                if (!strata::core::conversation_snapshot_bytes(view_k, st->ss, g, draft_of(k), b, err)) {
                     std::fprintf(stderr, "strata serve: conversation cache: skip parking (stage CUDA%d: %s)\n",
                                  st->dev, err.c_str());
                     err.clear();
@@ -4689,7 +4707,7 @@ int main(int argc, char** argv) {
                 }
                 if (!stage_reuse[k].kv.empty()) {
                     size_t r = 0;
-                    if (strata::core::conversation_snapshot_capture_bytes(stage_reuse[k], view_k, st->ss, g, nullptr,
+                    if (strata::core::conversation_snapshot_capture_bytes(stage_reuse[k], view_k, st->ss, g, draft_of(k),
                                                                           r, err)) {
                         b = r;
                         stage_retained += stage_reuse[k].bytes();
@@ -4701,14 +4719,14 @@ int main(int argc, char** argv) {
                 stage_estimate += b;
             }
             size_t estimate = 0;
-            if (!strata::core::conversation_snapshot_bytes(view, ss, g, mtp.kv_state(), estimate, err)) {
+            if (!strata::core::conversation_snapshot_bytes(view, ss, g, draft0, estimate, err)) {
                 std::fprintf(stderr, "strata serve: conversation cache: skip parking (%s)\n", err.c_str());
                 err.clear(); // A recoverable miss must not poison the batched draft prefill's error channel.
                 return true;
             }
             const size_t fresh_estimate = estimate;
             if (!reuse.kv.empty() && !strata::core::conversation_snapshot_capture_bytes(
-                    reuse, view, ss, g, mtp.kv_state(), estimate, err)) {
+                    reuse, view, ss, g, draft0, estimate, err)) {
                 reuse = {};
                 estimate = fresh_estimate;
                 err.clear();
@@ -4738,15 +4756,15 @@ int main(int argc, char** argv) {
                 }
                 strata::core::SavedConversation image;
                 size_t reused_bytes = 0;
-                if (!strata::core::conversation_snapshot_save(image, view, ss, g, mtp.kv_state(), err,
+                if (!strata::core::conversation_snapshot_save(image, view, ss, g, draft0, err,
                         std::move(reuse), &reused_bytes)) return false;
-                for (size_t k = 0; k < n_st; ++k) {   // the later stages, without the draft layer's K/V
+                for (size_t k = 0; k < n_st; ++k) {   // the later stages (the last one with the draft layer's K/V)
                     auto& st = stages[k];
                     const strata::core::OnDevice on(st->dev);
                     if (cudaDeviceSynchronize() != cudaSuccess) { err = "stage sync failed"; return false; }
                     const strata::core::ConversationView view_k{live, live_imgs, cs.parts[k], cvec_cached};
                     strata::core::SavedConversation part;
-                    if (!strata::core::conversation_snapshot_save(part, view_k, st->ss, g, nullptr, err,
+                    if (!strata::core::conversation_snapshot_save(part, view_k, st->ss, g, draft_of(k), err,
                             std::move(stage_reuse[k]), &reused_bytes))
                         return false;
                     image.stage_images.push_back(std::move(part));
@@ -5696,7 +5714,7 @@ int main(int argc, char** argv) {
             if (incoming) for (size_t i = 0; i < stages.size(); ++i) {
                 const strata::core::OnDevice on(stages[i]->dev);
                 if (!strata::core::conversation_snapshot_validate(incoming->stage_images[i], stages[i]->ss, g,
-                        nullptr, err)) {   // a later stage's image holds no draft K/V
+                        i + 1 == stages.size() ? &mtp.kv_state() : nullptr, err)) {   // the draft: the last stage's
                     std::fprintf(stderr, "strata serve: conversation cache: discard invalid stage snapshot (%s)\n",
                                  err.c_str());
                     incoming.reset();
@@ -5704,7 +5722,8 @@ int main(int argc, char** argv) {
                     break;
                 }
             }
-            if (incoming && !strata::core::conversation_snapshot_validate(*incoming, ss, g, mtp.kv_state(), err)) {
+            if (incoming && !strata::core::conversation_snapshot_validate(*incoming, ss, g,
+                    stages.empty() ? &mtp.kv_state() : nullptr, err)) {
                 std::fprintf(stderr, "strata serve: conversation cache: discard invalid snapshot (%s)\n", err.c_str());
                 incoming.reset();
                 err.clear();
@@ -5717,7 +5736,8 @@ int main(int argc, char** argv) {
             }
             if (incoming) {
                 const auto t0 = Clock::now();
-                if (strata::core::conversation_snapshot_restore(*incoming, ss, g, mtp.kv_state(), err) !=
+                if (strata::core::conversation_snapshot_restore(*incoming, ss, g,
+                        stages.empty() ? &mtp.kv_state() : nullptr, err) !=
                     strata::core::ConversationRestore::restored) {
                     // Already prevalidated above: a failure here is fatal, never
                     // permission to decode from a partially restored session.
@@ -5727,7 +5747,8 @@ int main(int argc, char** argv) {
                 for (size_t i = 0; i < stages.size(); ++i) {   // the later stages' parts
                     const strata::core::OnDevice on(stages[i]->dev);
                     if (strata::core::conversation_snapshot_restore(incoming->stage_images[i], stages[i]->ss, g,
-                            nullptr, err) != strata::core::ConversationRestore::restored) {
+                            i + 1 == stages.size() ? &mtp.kv_state() : nullptr, err) !=
+                        strata::core::ConversationRestore::restored) {
                         std::printf("ERR restoring parked conversation (stage CUDA%d): %s\n", stages[i]->dev,
                                     err.c_str());
                         return 1;
@@ -5736,13 +5757,15 @@ int main(int argc, char** argv) {
                 }
                 if (std::getenv("STRATA_SNAPSHOT_VERIFY") != nullptr) {
                     uint64_t draft_hash = 0;
-                    if (!strata::core::conversation_kv_verify(incoming->kv.back(), mtp.kv_state(), g,
+                    const auto& draft_kv = stages.empty() ? incoming->kv.back() : incoming->stage_images.back().kv.back();
+                    const strata::core::OnDevice on_d(stages.empty() ? 0 : stages.back()->dev);
+                    if (!strata::core::conversation_kv_verify(draft_kv, mtp.kv_state(), g,
                             int64_t(incoming->live.ids.size()), false, draft_hash, err)) {
                         std::printf("ERR verifying restored draft KV: %s\n", err.c_str());
                         return 1;
                     }
                     std::fprintf(stderr, "strata serve: SNAPSHOT_VERIFY draft=%016llx cells=%lld mode=%d source=%s resident=%lld\n",
-                                 (unsigned long long) draft_hash, (long long) incoming->kv.back().cells,
+                                 (unsigned long long) draft_hash, (long long) draft_kv.cells,
                                  mtp.kv_state().kv_mode, "ram",
                                  (long long) (mtp.kv_state().n_slots * strata::kernels::qsa_real_shapes().page_size));
                 }
diff --git a/tools/parking_test.py b/tools/parking_test.py
index cb2129822d9..29995825340 100644
--- a/tools/parking_test.py
+++ b/tools/parking_test.py
@@ -34,7 +34,8 @@ def gen(eng, out, ids, n):
 
 
 def run(a, cfg, tok, with_b):
-    eng = Engine(a.exe, cfg, 0, {"STRATA_IQ_MT_MIN": "1"}, a.extra.split())
+    # STRATA_SNAPSHOT_VERIFY: the engine reads the restored draft ring back (on the GPU that holds it) after a restore
+    eng = Engine(a.exe, cfg, 0, {"STRATA_IQ_MT_MIN": "1", "STRATA_SNAPSHOT_VERIFY": "1"}, a.extra.split())
     out = eng.lines()
     pa = tok.encode(chat(DOC * a.repeat + "\nSummarize this text in five sentences."), parse_special=True)
     ans, _ = gen(eng, out, pa, a.max_new)
@@ -53,6 +54,8 @@ def run(a, cfg, tok, with_b):
     eng.p.wait(timeout=180)
     log = open("/tmp/batch_test_engine.log").read()
     restored = re.findall(r"restored \d+ tokens[^\n]*", log)
+    if with_b and "SNAPSHOT_VERIFY draft=" not in log:
+        print("no SNAPSHOT_VERIFY line: the draft ring was not read back", flush=True)
     reparked = [int(x) for x in re.findall(r"parked \d+ tokens .*reused_kv_bytes=(\d+)", log)]
     return len(pa), len(follow), got, done, dt, restored, reparked
 

From f12b99f306f8fea5c6ed94ea6d29c4acf8da4e7a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:15:55 +0200
Subject: [PATCH 081/201] setup: --vision-tokens N, the most image tokens a
 picture becomes (#625)

Kept in the run config's vision.max_tokens (the server already passes it
to the encoder); a setup run again keeps it for the same encoder device.
More than the default is allowed with a note on the encode time. Without
the flag the config is as before. DETAILS.md: vision.mmproj can point to
a Q8_0 mmproj of this model.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md            | 11 +++++++++
 setup.py                   | 37 +++++++++++++++++++++++++++++-
 tools/test_setup_config.py | 46 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 93 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..aeef21da27a 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -748,6 +748,17 @@ helper (`strata-vision`, from llama.cpp's `mtmd` library) and adds it to your st
 A picture becomes up to 1,024 tokens of the context (a 640x480 photo: 300). The same picture sent again, as chat apps
 do on every turn, is encoded only once.
 
+**More image tokens (0.1.39, #625):** `--vision-tokens N` at setup (`START-HERE.bat --setup --vision cpu
+--vision-tokens 768`) sets the most tokens a picture becomes - `"max_tokens"` in the `"vision"` section of
+`strata-<model>.json`, which you can also edit by hand. More tokens keep more detail (small text, charts, screenshots)
+and take longer to encode, on the CPU most of all; a setup run again keeps the value.
+
+**A Q8_0 encoder (#625):** `"mmproj"` in the `"vision"` section can point to another mmproj file of this model, for
+example a Q8_0 one (llama.cpp's `convert_hf_to_gguf.py --mmproj --outtype q8_0` makes one): the encoder's library
+reads quantized weights, the file is half the size, and on the CPU it can encode faster than BF16. Setup downloads
+the BF16 file, and a setup run again keeps a file of your own that still exists. We have not measured its accuracy
+against BF16 yet; numbers are welcome in #625.
+
 **A spare GPU for the encoder (0.1.33, #408):** with a card the engine doesn't use, add `"cuda_device": 2` (numbered
 like `nvidia-smi`) to the `"vision"` section of `strata-<model>.json`: the encoder then runs on that card alone. Lower
 `--vram-reserve-mib` in `"args"` to 700 as well, so the engine's cards keep that VRAM for the expert cache. The
diff --git a/setup.py b/setup.py
index e53d0b7f70d..8dc7c212d64 100644
--- a/setup.py
+++ b/setup.py
@@ -2835,6 +2835,31 @@ def saved_draft_vocab(cfg_path: Path) -> str | None:
     return v if v in DRAFT_VOCABS else None
 
 
+def vision_tokens(asked: int | None, vision: str, earlier: Path | None) -> int:
+    """#625: the most image tokens a picture becomes (the config's vision.max_tokens): --vision-tokens N, else what an
+    earlier config of this model chose for the same encoder device (a setup run again keeps it), else the device's
+    default (VISION).  More is allowed with a note on the time it takes: setup recommends, it does not cap."""
+    default = VISION[vision]["max_tokens"]
+    if asked is None and earlier is not None:
+        try:
+            v = json.loads(earlier.read_text(encoding="utf-8-sig")).get("vision")
+        except (OSError, ValueError, AttributeError):
+            v = None
+        mt = v.get("max_tokens") if isinstance(v, dict) and bool(v.get("gpu")) == (vision == "gpu") else None
+        if isinstance(mt, int) and mt > 0 and mt != default:
+            asked = mt
+    if asked is None:
+        return default
+    note = ""
+    if vision == "cpu" and asked > default:
+        note = (" - on the CPU a picture takes longer to encode the more tokens it gets (several seconds more at "
+                "1,024 than at 300)")
+    elif asked > VISION["gpu"]["max_tokens"]:
+        note = " - more than the encoder's default needs more VRAM and context per picture"
+    ok(f"images: up to {asked} image tokens per picture (--vision-tokens; default {default}){note}")
+    return asked
+
+
 DRAFT_VOCAB_MIB = {"cjk": 348, "cyrillic": 193, "en": 133}   # the draft head's VRAM per subset (IQ3_S: the largest)
 SMALL_DRAFT_VRAM_GB = 14   # #474: below this the default subset's head can be what does not fit
 
@@ -3020,6 +3045,10 @@ def main() -> int:
                          "precise) or k8v4 (hybrid: INT8 K + 4-bit V, 816 B/cell)")
     ap.add_argument("--vision", choices=["yes", "no", "none", "gpu", "cpu"],
                     help="let the model read images (yes = the encoder on the GPU)")
+    ap.add_argument("--vision-tokens", type=int, metavar="N",
+                    help="the most image tokens a picture becomes (default 1024 with the encoder on the GPU, 300 on "
+                         "the CPU): more reads small text and charts better, and takes longer to encode; remembered "
+                         "for this model")
     ap.add_argument("--experimental-speed-projection", metavar="on|off|GGUF",
                     help="EXPERIMENTAL, off by default: the control vector in data/experimental-speed-projection "
                          "(or another GGUF) as a projection on layers 4-44; see docs/DETAILS.md")
@@ -3081,6 +3110,8 @@ def main() -> int:
     a = ap.parse_args()
     if a.resident_budget_gib is not None and not a.resident_budget_gib > 0:
         ap.error("--resident-budget-gib takes a number of GiB above 0, e.g. --resident-budget-gib 32")
+    if a.vision_tokens is not None and a.vision_tokens < 1:
+        ap.error("--vision-tokens takes a number of image tokens, 1 or more, e.g. --vision-tokens 768")
     if a.vram_reserve_mib is not None and a.vram_reserve_mib < 0:
         ap.error("--vram-reserve-mib takes a number of MiB, 0 or more, e.g. --vram-reserve-mib 2048")
     if a.gpu is not None:                             # --gpu 0,2 means --gpus 0,2 (a user tried it: issue report)
@@ -3748,10 +3779,14 @@ def main() -> int:
     if a.browser is not None:                          # #609: only when given (else an earlier choice is carried over)
         cfg["open_browser"] = a.browser
     if vision != "none":
+        old_cfg = ROOT / f"strata-{tag.lower()}.json"
+        vt = vision_tokens(a.vision_tokens, vision, old_cfg if old_cfg.is_file() else adopted)
         cfg["vision"] = {"exe": str(eng / VEXE), "mmproj": str(mmproj), "model": str(shards[0]),
-                         "gpu": vision == "gpu", "max_tokens": VISION[vision]["max_tokens"]}
+                         "gpu": vision == "gpu", "max_tokens": vt}
         if vision == "cpu":
             cfg["vision"]["threads"] = max(1, (os.cpu_count() or 8) // 2)
+    elif a.vision_tokens is not None:
+        warn("--vision-tokens: images are off for this model, so it is not used")
     cfg_path = ROOT / f"strata-{tag.lower()}.json"
     cal = None if hip else saved_calibration(cfg)     # tools/calibrate.py is NVIDIA-only for now
     if cal is not None:
diff --git a/tools/test_setup_config.py b/tools/test_setup_config.py
index a08bc3e4969..cd297645dc0 100644
--- a/tools/test_setup_config.py
+++ b/tools/test_setup_config.py
@@ -194,5 +194,51 @@ def test_on_a_start(self):
         self.assertIs(saved["open_browser"], True)
 
 
+class VisionTokens(unittest.TestCase):
+    """#625: --vision-tokens N sets the config's vision.max_tokens (the most image tokens a picture becomes); a setup
+    run again keeps it for the same encoder device; without it the device's default, as before."""
+
+    def setUp(self):
+        self.ram, self.found = PROFILES["64GB-1x32GB"]
+
+    def run_setup(self, *extra, configs=()):
+        return install(self.ram, self.found, ["--family", "qwen", "--model", "Q2_0", "--no-start", *extra],
+                       configs=configs)
+
+    def test_the_flag(self):
+        code, out, cfg, _ = self.run_setup("--vision", "cpu")
+        self.assertEqual(code, 0, out)
+        self.assertEqual(cfg["vision"]["max_tokens"], 300)               # the default, as before
+        self.assertNotIn("--vision-tokens", out)
+        code, out, cfg, _ = self.run_setup("--vision", "cpu", "--vision-tokens", "768")
+        self.assertEqual(code, 0, out)
+        self.assertEqual(cfg["vision"]["max_tokens"], 768)
+        self.assertIn("up to 768 image tokens", out)
+        self.assertIn("longer to encode", out)                            # a note, not a cap
+        code, out, cfg, _ = self.run_setup("--vision", "gpu", "--vision-tokens", "2048")
+        self.assertEqual(cfg["vision"]["max_tokens"], 2048)
+        self.assertIn("more VRAM", out)
+
+    def test_kept_when_setup_runs_again(self):
+        code, out, first, _ = self.run_setup("--vision", "cpu", "--vision-tokens", "768")
+        old = [("strata-q2_0.json", first)]
+        code, out, cfg, _ = self.run_setup("--vision", "cpu", "--context", "65536", configs=old)
+        self.assertEqual(cfg["vision"]["max_tokens"], 768)
+        code, out, cfg, _ = self.run_setup("--vision", "cpu", "--vision-tokens", "300", configs=old)
+        self.assertEqual(cfg["vision"]["max_tokens"], 300)               # given again: the new value
+        code, out, cfg, _ = self.run_setup("--vision", "gpu", configs=old)
+        self.assertEqual(cfg["vision"]["max_tokens"], 1024)              # another device: its own default
+
+    def test_refused_and_unused(self):
+        with contextlib.redirect_stderr(io.StringIO()) as err:
+            code, out, cfg, _ = self.run_setup("--vision-tokens", "0")
+        self.assertEqual(code, 2)
+        self.assertIn("--vision-tokens takes a number", err.getvalue())
+        code, out, cfg, _ = self.run_setup("--vision", "no", "--vision-tokens", "768")
+        self.assertEqual(code, 0, out)
+        self.assertNotIn("vision", cfg)
+        self.assertIn("images are off", out)
+
+
 if __name__ == "__main__":
     unittest.main()

From 0e9814a4214fe935312253b329f2d90dc594bf86 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:17:18 +0200
Subject: [PATCH 082/201] setup: recommend P-cores + half the E-cores as CPU
 expert workers on hybrid CPUs (#642)

On a hybrid CPU (Intel 12th gen+, AMD Zen 5 + Zen 5c) setup writes --pool-workers
N into the run config: the performance cores but the host loop's one, plus half
of the efficiency cores. An E-core runs the expert kernels ~2.2x slower and each
layer waits for its slowest part; Hardin22 measured 15 workers at 165 / 116 tok/s
against 106 / 84 with all 23 on an i9-14900KF (#642). A recommendation only: the
line is in the config, a saved calibration's measured count wins, and a CPU whose
cores are all alike gets the same config as before.

The engine's pool, with every core allowed (the default affinity), now orders the
P-cores first on a hybrid CPU, so a smaller pool runs on the P-cores and the first
E-cores rather than on whatever the OS numbered first (from Hardin22's fork).
Non-hybrid CPUs: unchanged.

Co-Authored-By: Hardin22 <119073350+Hardin22@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                    | 66 +++++++++++++++++++++++++++++++++++++
 src/kernels/cpu/pool.cpp    |  9 +++++
 tools/test_setup_golden.py  |  1 +
 tools/test_setup_hybrid.py  | 64 +++++++++++++++++++++++++++++++++++
 tools/test_setup_unsloth.py |  1 +
 5 files changed, 141 insertions(+)
 create mode 100644 tools/test_setup_hybrid.py

diff --git a/setup.py b/setup.py
index bc5cdd3002c..c59245ee7fa 100644
--- a/setup.py
+++ b/setup.py
@@ -297,6 +297,70 @@ def page_file_gb():
     return max(0.0, (m.ullTotalPageFile - m.ullTotalPhys) / 2**30)
 
 
+def cpu_cores():
+    """#642: (performance cores, efficiency cores) of a hybrid CPU (Intel 12th gen+, AMD Zen 5 + Zen 5c), counted
+    as the engine's pool counts them (detect_cpu_topology: physical cores, by Windows' EfficiencyClass or Linux's
+    cpu_capacity); None on a CPU whose cores are all alike, or when the OS does not say."""
+    classes = []                                       # one entry per physical core: its efficiency/capacity class
+    try:
+        if WIN:
+            k32 = ctypes.windll.kernel32
+            n = ctypes.c_ulong(0)
+            k32.GetLogicalProcessorInformationEx(0, None, ctypes.byref(n))   # RelationProcessorCore: the size
+            if not n.value:
+                return None
+            buf = ctypes.create_string_buffer(n.value)
+            if not k32.GetLogicalProcessorInformationEx(0, buf, ctypes.byref(n)):
+                return None
+            raw, at = buf.raw[:n.value], 0
+            while at + 10 <= len(raw):   # SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX: Relationship, Size, then
+                rel, size = struct.unpack_from("<II", raw, at)               # PROCESSOR_RELATIONSHIP (Flags,
+                if size <= 0:                                                # EfficiencyClass, ...)
+                    break
+                if rel == 0:
+                    classes.append(raw[at + 9])
+                at += size
+        else:
+            seen = {}
+            for cpu in sorted(Path("/sys/devices/system/cpu").glob("cpu[0-9]*"), key=lambda p: int(p.name[3:])):
+                cap = cpu / "cpu_capacity"
+                pkg, core = cpu / "topology" / "physical_package_id", cpu / "topology" / "core_id"
+                if not cap.exists():
+                    return None
+                key = (pkg.read_text().strip(), core.read_text().strip()) if pkg.exists() and core.exists() else cpu.name
+                seen.setdefault(key, int(cap.read_text().strip()))
+            classes = list(seen.values())
+    except (OSError, ValueError, AttributeError):
+        return None
+    if not classes or max(classes) == min(classes):
+        return None
+    p = sum(1 for c in classes if c == max(classes))
+    return p, len(classes) - p
+
+
+def hybrid_pool_workers(cores) -> int | None:
+    """#642 (Hardin22's measurement): on a hybrid CPU the expert pool runs best on the P-cores but the host loop's one
+    plus HALF of the E-cores - an E-core runs the expert kernels ~2.2x slower and each layer waits for its slowest
+    part (i9-14900KF, 8P + 16E: 15 workers decoded 165 / 116 tok/s against 106 / 84 with all 23).  None: not hybrid
+    (the engine's own default, one worker per physical core but the host's, stays)."""
+    if not cores:
+        return None
+    p, e = cores
+    return max(1, p - 1 + e // 2)
+
+
+def recommend_pool_workers(args: list) -> list:
+    """`args` with setup's recommended `--pool-workers` for a hybrid CPU, unless they set one already (a calibration's
+    measured count, or the user's own).  A recommendation: the config line can be edited or removed."""
+    n = hybrid_pool_workers(cpu_cores())
+    if n is None or "--pool-workers" in args:
+        return args
+    p, e = cpu_cores()
+    ok(f"hybrid CPU ({p} performance + {e} efficiency cores): {n} CPU expert workers - the performance cores and half "
+       "of the efficiency cores (--pool-workers in the config; START-HERE --calibrate measures it on this PC)")
+    return [*args, "--pool-workers", str(n)]
+
+
 def cpu_info():
     """(name, avx2, avx512): avx512 means everything Strata's fast AVX-512 kernels use (F, BW, VL, VNNI, VBMI),
     the same test the engine makes (cpu_avx512_ok), not just AVX-512F."""
@@ -3664,6 +3728,8 @@ def main() -> int:
         import calibrate as CAL
         cfg["args"] = CAL.apply(cfg["args"], cal.get("settings") or {})
         ok("the settings tuned for this PC earlier are used" + (f" ({cal['date']})" if cal.get("date") else ""))
+    else:                                              # #642: measured counts (a calibration) win over the rule
+        cfg["args"] = recommend_pool_workers(cfg["args"])
     write_config(cfg_path, cfg)
     script = write_run_script(tag, cfg_path, port)
     # offered only when someone answers: --yes installs and adopted earlier installs are not held up by it
diff --git a/src/kernels/cpu/pool.cpp b/src/kernels/cpu/pool.cpp
index 45e4347037e..1919d2e9c6d 100644
--- a/src/kernels/cpu/pool.cpp
+++ b/src/kernels/cpu/pool.cpp
@@ -95,6 +95,12 @@ CpuTopology detect_cpu_topology(bool skip_first, PoolAffinity affinity) {
         }
 
         if (affinity == PoolAffinity::All || !topo.is_hybrid) {
+            // #642 (from Hardin22's fork): on a hybrid CPU the P-cores first (the host takes the first of them), so a
+            // pool smaller than the core count (setup's --pool-workers for a hybrid CPU) runs on the P-cores and the
+            // first E-cores rather than on whatever the OS numbered first.  All cores alike: the order is unchanged.
+            if (topo.is_hybrid)
+                std::stable_sort(descs.begin(), descs.end(),
+                                 [](const CoreDesc& x, const CoreDesc& y) { return x.efficiency > y.efficiency; });
             for (const auto& c : descs) topo.worker_cores.push_back(c.lps[0]);
             if (skip_first && !topo.worker_cores.empty()) {
                 topo.host_core = topo.worker_cores.front();
@@ -219,6 +225,9 @@ CpuTopology detect_cpu_topology(bool skip_first, PoolAffinity affinity) {
     }
 
     if (affinity == PoolAffinity::All || !topo.is_hybrid) {
+        if (topo.is_hybrid)   // #642: the P-cores first (see the Windows branch)
+            std::stable_sort(all_cpus.begin(), all_cpus.end(),
+                             [](const CoreLinux& x, const CoreLinux& y) { return x.cap > y.cap; });
         for (const auto& cl : all_cpus) {
             if (!cl.is_sibling) topo.worker_cores.push_back(cl.cpu);
         }
diff --git a/tools/test_setup_golden.py b/tools/test_setup_golden.py
index 054c1c14efe..08f75a16131 100644
--- a/tools/test_setup_golden.py
+++ b/tools/test_setup_golden.py
@@ -100,6 +100,7 @@ def fake_download(url, dst, what=None):
             mock.patch.object(setup, "amd_gpus", lambda: []),
             mock.patch.object(setup, "ram_gb", lambda: ram),
             mock.patch.object(setup, "cpu_info", lambda: ("Test CPU", True, avx512)),
+            mock.patch.object(setup, "cpu_cores", lambda: None),   # #642: not a hybrid CPU
             mock.patch.object(setup, "page_file_gb", lambda: 16.0),
             mock.patch.object(setup, "is_wsl", lambda: False),
             mock.patch.object(setup, "free_gb", lambda p: 900.0),
diff --git a/tools/test_setup_hybrid.py b/tools/test_setup_hybrid.py
new file mode 100644
index 00000000000..b07d2e3c2ad
--- /dev/null
+++ b/tools/test_setup_hybrid.py
@@ -0,0 +1,64 @@
+"""#642: setup recommends the expert pool's worker count on a hybrid CPU (the P-cores but the host loop's one, plus
+half of the E-cores) and writes nothing new anywhere else; a calibration's measured count wins over the rule.
+
+    python -m unittest tools.test_setup_hybrid
+"""
+from __future__ import annotations
+
+import sys
+import unittest
+from pathlib import Path
+from unittest import mock
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+sys.path.insert(0, str(ROOT / "tools"))
+import setup  # noqa: E402
+from test_setup_golden import PROFILES, install  # noqa: E402
+
+
+class HybridWorkers(unittest.TestCase):
+    def test_rule(self):
+        self.assertIsNone(setup.hybrid_pool_workers(None))
+        self.assertEqual(setup.hybrid_pool_workers((8, 16)), 15)   # i9-14900K: the fork's measured 15
+        self.assertEqual(setup.hybrid_pool_workers((6, 8)), 9)     # i5-13600K
+        self.assertEqual(setup.hybrid_pool_workers((4, 8)), 7)     # Ryzen AI 9 HX 370 (Zen 5 + Zen 5c)
+        self.assertEqual(setup.hybrid_pool_workers((1, 1)), 1)
+
+    def test_recommend_keeps_a_given_count(self):
+        with mock.patch.object(setup, "cpu_cores", lambda: (8, 16)), mock.patch.object(setup, "ok", lambda *a: None):
+            self.assertEqual(setup.recommend_pool_workers(["--spec", "4"]), ["--spec", "4", "--pool-workers", "15"])
+            given = ["--pool-workers", "12"]
+            self.assertEqual(setup.recommend_pool_workers(given), given)
+        with mock.patch.object(setup, "cpu_cores", lambda: None):
+            self.assertEqual(setup.recommend_pool_workers(["--spec", "4"]), ["--spec", "4"])
+
+    def test_install_on_a_hybrid_cpu(self):
+        ram, found = PROFILES["96GB-1x16GB"]
+        hybrid = [mock.patch.object(setup, "cpu_cores", lambda: (8, 16))]
+        code, text, cfg, _ = install(ram, found, ["--family", "qwen", "--no-start", "--model", "Q2_0"], extra=hybrid)
+        self.assertEqual(code, 0, text)
+        a = cfg["args"]
+        self.assertEqual(a[a.index("--pool-workers") + 1], "15")
+        self.assertIn("hybrid CPU (8 performance + 16 efficiency cores)", text)
+        # the same PC without the hybrid CPU: the config is the one it always was (no --pool-workers)
+        code, text, plain, _ = install(ram, found, ["--family", "qwen", "--no-start", "--model", "Q2_0"])
+        self.assertEqual(code, 0, text)
+        self.assertNotIn("--pool-workers", plain["args"])
+        i = a.index("--pool-workers")
+        self.assertEqual(a[:i] + a[i + 2:], plain["args"])
+
+    def test_calibration_wins(self):
+        ram, found = PROFILES["96GB-1x16GB"]
+        cal = {"settings": {"--pool-workers": "11"}, "date": "2026-10-03"}
+        extra = [mock.patch.object(setup, "cpu_cores", lambda: (8, 16)),
+                 mock.patch.object(setup, "saved_calibration", lambda cfg: cal)]
+        code, text, cfg, _ = install(ram, found, ["--family", "qwen", "--no-start", "--model", "Q2_0"], extra=extra)
+        self.assertEqual(code, 0, text)
+        a = cfg["args"]
+        self.assertEqual(a[a.index("--pool-workers") + 1], "11")
+        self.assertEqual(a.count("--pool-workers"), 1)
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tools/test_setup_unsloth.py b/tools/test_setup_unsloth.py
index a010b5e8f20..c489497c534 100644
--- a/tools/test_setup_unsloth.py
+++ b/tools/test_setup_unsloth.py
@@ -164,6 +164,7 @@ def fake_run(cmd, *a, **k):
             mock.patch.object(setup, "amd_gpus", lambda *a: list(amd)),
             mock.patch.object(setup, "ram_gb", lambda: ram),
             mock.patch.object(setup, "cpu_info", lambda: ("Test CPU", True, True)),
+            mock.patch.object(setup, "cpu_cores", lambda: None),   # #642: not a hybrid CPU
             mock.patch.object(setup, "page_file_gb", lambda: 16.0),
             mock.patch.object(setup, "free_gb", lambda p: free),
             mock.patch.object(setup, "pip_install", lambda *a, **k: None),

From 19de7f4225f404a380fd0fd8f63504ceefafbfcc Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:18:49 +0200
Subject: [PATCH 083/201] q8_1 activations: keep the block's fp16 scale and sum
 finite (#606)

Both q8_1 activation quantizers (iq_kernels.cu q8_1_store, native_mmvq.cu native_quantize_q8_1_kernel) stored the
sum of a block's 32 raw activations as fp16: past 65504 (one massive-activation dimension is enough) it rounded to
inf, and d = amax / 127 did past amax = 8.3M. The dot products then read inf * 0 = NaN, and a NaN in the residual
answers one token forever (ggml-org/llama.cpp#23606 is the same defect).

Now both are clamped to the largest finite half (and the values to the int8 range they then exceed). A block that
was finite before is stored bit for bit as before - values in (65504, 65520) round to 65504 anyway, and a finite
block's |x / d| is at most 127 - so the default output only changes where a block overflowed (and was NaN). A NaN
input stays NaN, so STRATA_DBG_NAN still finds it.

iq_multi_parity checks both quantizers against the 0.1.38 formula on a host transcription: every finite block as
before, and three overflowing blocks (sum 96,000, sum -69,984, amax 2e7) stored finite.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/kernels/q8_1_finite.hpp | 33 +++++++++++++
 src/kernels/cuda/iq_kernels.cu         |  7 +--
 src/kernels/cuda/native_mmvq.cu        |  7 +--
 src/kernels/iq_multi_parity.cpp        | 67 ++++++++++++++++++++++++++
 4 files changed, 108 insertions(+), 6 deletions(-)
 create mode 100644 include/strata/kernels/q8_1_finite.hpp

diff --git a/include/strata/kernels/q8_1_finite.hpp b/include/strata/kernels/q8_1_finite.hpp
new file mode 100644
index 00000000000..7826dbc5281
--- /dev/null
+++ b/include/strata/kernels/q8_1_finite.hpp
@@ -0,0 +1,33 @@
+// include/strata/kernels/q8_1_finite.hpp - #606: the q8_1 activation block's scale and sum, kept finite.
+//
+// A q8_1 block stores its scale d = amax / 127 and the sum of its 32 raw activations as fp16. A sum past 65504 (one
+// massive-activation dimension among 32 values is enough) rounds to inf, and d does past amax = 8.3M; the dot
+// products then read inf * 0 = NaN, and a NaN in the residual ends as one token repeated (ggml-org/llama.cpp#23606
+// is the same defect). Clamped to the largest finite half, such a block gives an approximate product instead of NaN,
+// and the values are held to the int8 range they then exceed. Every block that was finite before is stored bit for
+// bit as before: values in (65504, 65520) round to 65504 anyway, and a finite block's |x / d| is at most 127. A NaN
+// stays NaN (the comparisons are false for it), so STRATA_DBG_NAN still sees one.
+#pragma once
+
+#include <cuda_fp16.h>
+
+namespace strata::kernels {
+
+constexpr float kHalfMax = 65504.0f;
+
+__device__ __forceinline__ float q8_1_finite(const float v) {
+    return fabsf(v) > kHalfMax ? copysignf(kHalfMax, v) : v;
+}
+
+/// The block's quantized value of `xi` for the (finite) scale `d`; `amax` = 0 is an all-zero block.
+__device__ __forceinline__ int8_t q8_1_quant(const float xi, const float d, const float amax) {
+    if (amax == 0.0f) return 0;
+    const float q = roundf(xi / d);
+    return (int8_t) (q > 127.0f ? 127.0f : q < -127.0f ? -127.0f : q);
+}
+
+__device__ __forceinline__ half2 q8_1_ds(const float d, const float sum) {
+    return make_half2(__float2half(q8_1_finite(d)), __float2half(q8_1_finite(sum)));
+}
+
+}  // namespace strata::kernels
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 522d8670b17..15be7d5936c 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -6,6 +6,7 @@
 // included unchanged.
 #include "strata/kernels/iq_kernels.hpp"
 #include "strata/kernels/dp4a.hpp"
+#include "strata/kernels/q8_1_finite.hpp"
 
 #include <cuda_fp16.h>
 #include <cuda_runtime.h>
@@ -1026,11 +1027,11 @@ __device__ __forceinline__ void q8_1_store(const float xi, block_q8_1* __restric
         amax = fmaxf(amax, __shfl_xor_sync(0xffffffffu, amax, o));
         sum += __shfl_xor_sync(0xffffffffu, sum, o);
     }
-    const float d = amax / 127.0f;
-    const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
+    const float d = q8_1_finite(amax / 127.0f);   // #606: q8_1_finite.hpp - the same bits for every finite block
+    const int8_t q = q8_1_quant(xi, d, amax);
     const long long ib = i / 32, iqs = i % 32;
     y[ib].qs[iqs] = q;
-    if (iqs == 0) y[ib].ds = make_half2(d, sum);
+    if (iqs == 0) y[ib].ds = q8_1_ds(d, sum);
 }
 
 __global__ void quantize_q8_1_kernel(const float* __restrict__ x, block_q8_1* __restrict__ y, long long n) {
diff --git a/src/kernels/cuda/native_mmvq.cu b/src/kernels/cuda/native_mmvq.cu
index e0a4c1bdb47..84748179a7e 100644
--- a/src/kernels/cuda/native_mmvq.cu
+++ b/src/kernels/cuda/native_mmvq.cu
@@ -25,6 +25,7 @@
 
 #include "strata/kernels/native_mmvq.hpp"
 #include "strata/kernels/dp4a.hpp"
+#include "strata/kernels/q8_1_finite.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 
 #include <cuda_fp16.h>
@@ -145,10 +146,10 @@ __global__ void native_quantize_q8_1_kernel(const float* __restrict__ x,
     const float xi = x[i];
     const float amax = warp_max(fabsf(xi));
     const float sum = warp_sum(xi);
-    const float d = amax / 127.0f;
-    const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
+    const float d = q8_1_finite(amax / 127.0f);   // #606: q8_1_finite.hpp - the same bits for every finite block
+    const int8_t q = q8_1_quant(xi, d, amax);
     y[i / Q8K].qs[i % Q8K] = q;
-    if (i % Q8K == 0) y[i / Q8K].ds = make_half2(d, sum);
+    if (i % Q8K == 0) y[i / Q8K].ds = q8_1_ds(d, sum);
 }
 
 // Exact pinned vec_dot_q5_K_q8_1_impl_vmmq expression and integer dot order.
diff --git a/src/kernels/iq_multi_parity.cpp b/src/kernels/iq_multi_parity.cpp
index b497b747ead..ace6facf850 100644
--- a/src/kernels/iq_multi_parity.cpp
+++ b/src/kernels/iq_multi_parity.cpp
@@ -16,6 +16,7 @@
 // are set, small enough that the grouped path's SwiGLU output keeps a finite fp16 q8_1 scale.
 #include "strata/kernels/f16_bits.hpp"
 #include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/native_mmvq.hpp"
 
 #include <cuda_runtime.h>
 
@@ -325,6 +326,71 @@ void bench(cudaStream_t s, std::mt19937& rng) {
     }
 }
 
+// #606: both q8_1 activation quantizers (quantize_q8_1_rows and native_quantize_q8_1) against a host transcription
+// of the 0.1.38 formula: every finite block bit for bit; a block whose sum (or scale) overflowed fp16 is now stored
+// finite (the largest half, its sign), with its values in the int8 range.
+void check_q8_1_finite(cudaStream_t s, std::mt19937& rng) {
+    const int n = 2560, rows = 3, nb = n / 32;
+    std::vector<float> x = random_x((size_t) rows * n, rng);
+    for (int i = 0; i < 32; ++i) x[(size_t) 5 * 32 + i] = 3000.0f;                  // sum 96,000: overflowed
+    for (int i = 0; i < 32; ++i) x[(size_t) 9 * 32 + i] = i == 3 ? -70000.0f : 0.5f;   // sum -69,984.5
+    for (int i = 0; i < 32; ++i) x[(size_t) 13 * 32 + i] = 2000.0f + i;            // sum 64,496: finite, kept
+    x[(size_t) n + 40] = 2.0e7f;                                                    // amax / 127 overflowed too
+    float* dx = dalloc<float>(x.size());
+    ck(cudaMemcpy(dx, x.data(), x.size() * 4, cudaMemcpyHostToDevice), "x");
+    uint8_t* dq = dalloc<uint8_t>((size_t) rows * nb * 36);
+    for (int path = 0; path < 2; ++path) {
+        if (path == 0) k::quantize_q8_1_rows(dx, rows, n, dq, s);
+        else k::native_quantize_q8_1(dx, dq, n, rows, s);
+        ck(cudaStreamSynchronize(s), "quantize");
+        std::vector<uint8_t> got((size_t) rows * nb * 36);
+        ck(cudaMemcpy(got.data(), dq, got.size(), cudaMemcpyDeviceToHost), "q");
+        int same = 0, clamped = 0, bad = 0;
+        for (int b = 0; b < rows * nb; ++b) {
+            const float* v = x.data() + (size_t) b * 32;
+            float lane[32], amax = 0.0f;
+            for (int i = 0; i < 32; ++i) { lane[i] = v[i]; amax = std::max(amax, std::fabs(v[i])); }
+            for (int o = 16; o > 0; o >>= 1) {   // the warp's butterfly: every lane ends with the same sum
+                float nx[32];
+                for (int i = 0; i < 32; ++i) nx[i] = lane[i] + lane[i ^ o];
+                std::memcpy(lane, nx, sizeof lane);
+            }
+            const float d = amax / 127.0f, sum = lane[0];
+            const uint8_t* g = got.data() + (size_t) b * 36;
+            uint16_t gd, gs;
+            std::memcpy(&gd, g, 2);
+            std::memcpy(&gs, g + 2, 2);
+            const uint16_t od = k::f16_from_f32(d), os = k::f16_from_f32(sum);
+            const bool finite_before = (od & 0x7c00) != 0x7c00 && (os & 0x7c00) != 0x7c00;
+            if (finite_before) {
+                uint8_t want[36];
+                std::memcpy(want, &od, 2);
+                std::memcpy(want + 2, &os, 2);
+                for (int i = 0; i < 32; ++i)   // CUDA's roundf: half away from zero, as std::round
+                    want[4 + i] = (uint8_t) (int8_t) (amax == 0.0f ? 0.0f : std::round(v[i] / d));
+                // native_mmvq.cu is built with --use_fast_math (its divisions are approximate): there the sum must be
+                // the same bits, the scale within one fp16 step and each value within one step
+                bool near = path == 1 && gs == os && std::abs((int) gd - (int) od) <= 1;
+                for (int i = 0; near && i < 32; ++i) near = std::abs((int) (int8_t) g[4 + i] - (int) (int8_t) want[4 + i]) <= 1;
+                if (std::memcmp(want, g, 36) == 0 || near) ++same;
+                else { ++bad; std::printf("  q8_1 path %d block %d: changed although it was finite\n", path, b); }
+            } else {
+                const float fd = k::f32_from_f16(gd), fs = k::f32_from_f16(gs);
+                bool ok = std::isfinite(fd) && std::isfinite(fs) && fd > 0.0f &&
+                          ((os & 0x7c00) != 0x7c00 ? gs == os : std::fabs(fs) == 65504.0f && (fs < 0) == (sum < 0));
+                for (int i = 0; i < 32; ++i) ok = ok && (int8_t) g[4 + i] >= -127 && (int8_t) g[4 + i] <= 127;
+                if (ok) ++clamped;
+                else { ++bad; std::printf("  q8_1 path %d block %d: d %g sum %g not finite and clamped\n", path, b, fd, fs); }
+            }
+        }
+        std::printf("q8_1 finite (%s): %d finite blocks as before, %d overflowed blocks clamped finite%s\n",
+                    path == 0 ? "quantize_q8_1_rows" : "native_quantize_q8_1", same, clamped, bad ? "  FAIL" : "");
+        g_fail += bad + (clamped != 3);
+    }
+    cudaFree(dx);
+    cudaFree(dq);
+}
+
 }  // namespace
 
 int main(int argc, char** argv) {
@@ -340,6 +406,7 @@ int main(int argc, char** argv) {
         for (int dt : {20, 42}) check_grouped(gu, dt, 2560, 640, s, rng);   // the model's shape
         check_grouped(gu, 23, 1024, 512, s, rng);                           // IQ4_XS down needs n_ff % 256 == 0
     }
+    check_q8_1_finite(s, rng);
     if (do_bench) bench(s, rng);
     std::printf("iq_multi_parity: %d failures\n", g_fail);
     cudaStreamDestroy(s);

From 3903aabfc9f7a13e4baeadf46282932a985c6264 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:18:49 +0200
Subject: [PATCH 084/201] serve: end a reply that repeats one token 256 times
 in a row (#606)

A broken state (or a model in a loop) can answer one token forever: #606 streamed 36,689 tokens of "!" for four
minutes, because a request without max_tokens gets the whole remaining context. The server now ends such a reply
at 256 identical tokens in a row with finish "length" and a line in its window saying what to do if it repeats on
a new request. "repeat_stop_tokens": N in strata-<model>.json sets the run (0 = off). Nothing changes for a reply
without such a run.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md      |  4 ++++
 serve/server.py      | 20 ++++++++++++++++++++
 serve/test_server.py | 29 +++++++++++++++++++++++++++++
 3 files changed, 53 insertions(+)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..dffa78e77b7 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -473,6 +473,10 @@ print(r.choices[0].message.content)
   part of the thinking the client sees and counts as output tokens. `"reasoning_budget_tokens": N` in
   `strata-<model>.json` sets it for every request; a request's own value wins, and `0` means no budget. Off by default;
   Anthropic's `"thinking": {"budget_tokens": N}` still only chooses the level, as above.
+- **A reply stuck on one token is ended (0.1.39, #606).** When a reply repeats the same token 256 times in a row, the
+  server ends it there with `finish_reason` `"length"` and says so in its window: a model in a loop, or a broken
+  state that answers one token forever (#606 saw 36,689 tokens of `!`). `"repeat_stop_tokens": N` in
+  `strata-<model>.json` sets the run length; `0` turns it off (for a request that really wants one token many times).
 - **Anthropic requests that don't ask for thinking (opt-in, 0.1.32, #278).** By default a `/v1/messages` request
   with no `"thinking"`, effort or budget thinks as the model's template does. `"anthropic_thinking": "on_request"` in
   `strata-<model>.json` renders such a request without thinking - Anthropic's own rule, and what Claude Code's short
diff --git a/serve/server.py b/serve/server.py
index c143a6b841a..e65d1188ff2 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -59,6 +59,10 @@
 IM_END = "<|im_end|>"
 IMAGE_PAD = "<|image_pad|>"
 VISION_START = "<|vision_start|>"
+# #606: a reply that repeats one token this many times in a row is ended there ("length"): a model in a loop, or a
+# broken state that answers one token forever (an issue saw 36,689 tokens of "!"). The config's "repeat_stop_tokens"
+# sets it; 0 turns it off.
+REPEAT_STOP_TOKENS = 256
 # #123: what closes the thinking when it reaches reasoning_budget_tokens (the model's own end-of-thinking tag after it)
 REASONING_WRAP_UP = "\n\nI have thought about this long enough; time to give my answer.\n</think>\n\n"
 LOOPBACK_NAMES = ("localhost", "127.0.0.1", "::1")
@@ -1023,6 +1027,7 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         self.min_free_vram_mib = 0
         self.before_load = None
         self.reasoning_budget_tokens = 0                 # #123: the config's default thinking budget (0: none)
+        self.repeat_stop_tokens = REPEAT_STOP_TOKENS     # #606: one token this many times in a row ends a reply (0: off)
         self.anthropic_think_unasked = True               # #278: "anthropic_thinking": "on_request" -> False
         self.stop_ids = set(tokenizer.encode(IM_END, parse_special=True) +
                             tokenizer.encode("<|endoftext|>", parse_special=True))
@@ -1470,6 +1475,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
             sampling = {**defaults, **req_values}
         parser = OutputParser(thinking=thinking, tools=tools, stream_tools=True)
         detok, n, finish = Detokenizer(self.tok), 0, "length"
+        run_tok, run_len, repeated = None, 0, False     # #606: the current run of one repeated token
         timings, before = None, None                    # this request's timings; the engine's `last` before it
         raw_ids = []                                    # every generated id (STRATA_DEBUG: dump raw model text)
         emb = getattr(self.embeddings, "path", None)
@@ -1519,6 +1525,11 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                     break
                                 raw_ids.append(t)
                                 seg.append(t)
+                                run_len = run_len + 1 if t == run_tok else 1
+                                run_tok = t
+                                if self.repeat_stop_tokens and run_len >= self.repeat_stop_tokens:
+                                    repeated = True     # #606: a degenerate output, not an answer: end it here
+                                    break
                                 evs = parser.feed(detok.push(t))
                                 self._note(n, evs)
                                 last_print = self._progress(last_print)
@@ -1572,6 +1583,11 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                         prompt = prompt + seg + extra
                     if cancel.is_set():
                         finish = "cancel"
+                    elif repeated:
+                        print(f"[strata] the reply repeated one token ({self.tok.decode([run_tok])!r}) "
+                              f"{run_len} times in a row: ended as \"length\" (repeat_stop_tokens in "
+                              "strata-<model>.json; 0 turns this off). If a new request with a short prompt does the "
+                              "same, restart the server and report it (#606)", flush=True)
                 except GeneratorExit:                   # the client disconnected mid-stream
                     finish = "disconnect"
                     raise
@@ -3015,6 +3031,10 @@ def main() -> int:
     if mode not in ("model", "on_request"):
         raise SystemExit(f"[strata] config anthropic_thinking must be \"model\" or \"on_request\", not {mode!r}")
     svc.anthropic_think_unasked = mode == "model"
+    rs = cfg.get("repeat_stop_tokens", REPEAT_STOP_TOKENS)   # #606: opt-out with 0
+    if isinstance(rs, bool) or not isinstance(rs, int) or rs < 0:
+        raise SystemExit(f"[strata] config \"repeat_stop_tokens\" must be a whole number >= 0 (0 = off), not {rs!r}")
+    svc.repeat_stop_tokens = rs
     if cfg.get("reasoning_budget_tokens") is not None:  # #123: a default thinking budget for every request
         try:
             svc.reasoning_budget_tokens = cfg["reasoning_budget_tokens"]
diff --git a/serve/test_server.py b/serve/test_server.py
index 0a8e15a1c50..64c54f7fab8 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -848,6 +848,35 @@ def test_no_profile_in_the_args(self):
         self.assertEqual(engine_args(cfg), ["--native", "x", "--expert-profile-save", "learned.bin"])
 
 
+class RepeatStop(unittest.TestCase):
+    """#606: one token repeated repeat_stop_tokens times in a row ends the reply as "length"; 0 turns it off."""
+
+    def run_reply(self, script, limit=None):
+        tok = ByteTokenizer()
+        svc = Service(MockEngine(tok, script, max_context=CTX), tok, ChatTemplate(ROOT / "serve/chat_template.jinja"))
+        if limit is not None:
+            svc.repeat_stop_tokens = limit
+        ids = tok.encode("hi")
+        with contextlib.redirect_stdout(io.StringIO()) as out:
+            done = [x for kind, x in svc.run(ids, False, None, 3000, {}, threading.Event()) if kind == "done"][0]
+        return done, out.getvalue()
+
+    def test_a_long_run_is_ended(self):
+        done, log = self.run_reply("ok " + "!" * 1000 + " never")
+        self.assertEqual(done["finish"], "length")
+        self.assertEqual(done["completion_tokens"], 3 + 256)
+        self.assertIn("repeated one token ('!') 256 times", log)
+
+    def test_short_runs_and_off(self):
+        done, _ = self.run_reply("=" * 255 + " fine")
+        self.assertEqual(done["finish"], "stop")
+        done, log = self.run_reply("!" * 1000, limit=0)
+        self.assertEqual((done["finish"], done["completion_tokens"]), ("stop", 1001))
+        self.assertNotIn("repeated one token", log)
+        done, _ = self.run_reply("ab" * 400, limit=8)       # alternating tokens are not one run
+        self.assertEqual(done["finish"], "stop")
+
+
 class LayerSplit(unittest.TestCase):
     """#644: "layer_split" is the first layer of each later GPU; a list is accepted, counts per card are not."""
 

From 0cc4e86b22b2c6ff6e38d94f5d71f0d66afc12c8 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:19:49 +0200
Subject: [PATCH 085/201] setup: --draft-vocab fr - the English/code subset
 plus the tokens of French text (#597)

French answers drafted poorly with the shipped subsets: 23.6% of the token occurrences of French text fall outside
draft_vocab_en.bin, and the draft head cannot propose those (no subset adds the accented words and word pieces).

- tools/draft_vocab.py: a coverage mode. --corpus FILE... adds to the base the most frequent tokens of the corpus that
  together cover --coverage (default 0.99) of its occurrences, and prints the share outside the base and the new list.
- data/draft_vocab_fr.bin: draft_vocab_en.bin plus 5,686 tokens (46,211 ids), from 10 French Wikipedia articles
  (France, Paris, Napoleon Ier, Langue francaise, Union europeenne, Litterature francaise, Cuisine francaise,
  Economie de la France, Revolution francaise, Seconde Guerre mondiale; 1.24 M characters, 326,926 tokens) at 0.99:
    python tools/draft_vocab.py --gguf <IQ3_XXS shard 1> --base data/draft_vocab_en.bin --corpus <the articles> \
        --coverage 0.99 --out data/draft_vocab_fr.bin
  Outside the list on that corpus: 0.74% (23.65% with en).
- setup.py: "fr" in DRAFT_VOCABS / --draft-vocab (~151 MiB head on IQ3_S, between en and cyrillic). The sha256 check
  knows it as a shipped subset, so a later --draft-vocab cjk/en replaces it and a subset made by hand stays.
- tests: tools/test_draft_vocab.py (the coverage mode), tools/test_setup_draft_vocab.py (fr replaces a shipped subset
  and back, keeps the en ids first in their order, its MiB estimate).

The default subset (cjk) is unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 data/draft_vocab_fr.bin         | Bin 0 -> 184844 bytes
 setup.py                        |  15 +++++----
 tools/draft_vocab.py            |  52 +++++++++++++++++++++++++++++++-
 tools/test_draft_vocab.py       |  47 +++++++++++++++++++++++++++++
 tools/test_setup_draft_vocab.py |  38 +++++++++++++++++++++--
 5 files changed, 142 insertions(+), 10 deletions(-)
 create mode 100644 data/draft_vocab_fr.bin
 create mode 100644 tools/test_draft_vocab.py

diff --git a/data/draft_vocab_fr.bin b/data/draft_vocab_fr.bin
new file mode 100644
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literal 0
HcmV?d00001

diff --git a/setup.py b/setup.py
index bc5cdd3002c..a9cfe7b2a01 100644
--- a/setup.py
+++ b/setup.py
@@ -2737,7 +2737,8 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
 OLD_DRAFT_VOCABS = {"369151522226a5edaa5f12cfd1e2ae7db8f4fbdbd222f3dcf327dced9597fb25"}   # to 0.1.26: 27 Han tokens
 
 
-DRAFT_VOCABS = {"cjk": "draft_vocab.bin", "en": "draft_vocab_en.bin", "cyrillic": "draft_vocab_cyrillic.bin"}
+DRAFT_VOCABS = {"cjk": "draft_vocab.bin", "en": "draft_vocab_en.bin", "cyrillic": "draft_vocab_cyrillic.bin",
+                "fr": "draft_vocab_fr.bin"}
 
 
 def saved_draft_vocab(cfg_path: Path) -> str | None:
@@ -2750,7 +2751,7 @@ def saved_draft_vocab(cfg_path: Path) -> str | None:
     return v if v in DRAFT_VOCABS else None
 
 
-DRAFT_VOCAB_MIB = {"cjk": 348, "cyrillic": 193, "en": 133}   # the draft head's VRAM per subset (IQ3_S: the largest)
+DRAFT_VOCAB_MIB = {"cjk": 348, "cyrillic": 193, "fr": 151, "en": 133}   # the draft head's VRAM per subset (IQ3_S: the largest)
 SMALL_DRAFT_VRAM_GB = 14   # #474: below this the default subset's head can be what does not fit
 
 
@@ -2825,7 +2826,7 @@ def refresh_draft_vocab(rt: Path, choice: str = "cjk") -> None:
     """The draft layer's token subset in the MTP folder: `cjk` (data/draft_vocab.bin, since 0.1.27, #137), `en`
     (data/draft_vocab_en.bin, the English/code subset before it: ~110 MiB less VRAM, English answers 1-2% faster) or
     `cyrillic` (data/draft_vocab_cyrillic.bin: English/code and the whole Cyrillic script, for Ukrainian, Russian,
-    Bulgarian, Serbian... answers).
+    Bulgarian, Serbian... answers) or `fr` (data/draft_vocab_fr.bin: English/code and the tokens of French text, #597).
     Copied when missing or when a shipped subset other than the chosen one is there; a subset made by hand is kept."""
     new, dst = ROOT / "data" / DRAFT_VOCABS.get(choice, "draft_vocab.bin"), rt / "draft_vocab.bin"
     if not new.exists() or not rt.is_dir():
@@ -2837,7 +2838,8 @@ def refresh_draft_vocab(rt: Path, choice: str = "cjk") -> None:
         if old not in shipped or old == hashlib.sha256(new.read_bytes()).hexdigest():
             return
         ok("draft layer: the token subset " + {"cjk": "with Chinese, Japanese and Korean",
-                                               "cyrillic": "with the Cyrillic script"}.get(choice,
+                                               "cyrillic": "with the Cyrillic script",
+                                               "fr": "for French"}.get(choice,
                                                                                           "for English and code (less VRAM)"))
     shutil.copyfile(new, dst)
 
@@ -2968,7 +2970,8 @@ def main() -> int:
     ap.add_argument("--draft-vocab", choices=list(DRAFT_VOCABS),
                     help="the draft layer's tokens: cjk = with Chinese, Japanese and Korean (default), en = English "
                          "and code only (~110 MiB less VRAM, English answers 1-2%% faster), cyrillic = English, code "
-                         "and the Cyrillic script (Ukrainian, Russian... answers decode ~30%% faster)")
+                         "and the Cyrillic script (Ukrainian, Russian... answers decode ~30%% faster), fr = English, "
+                         "code and French (French answers draft more)")
     ap.add_argument("--low-ram", choices=["auto", "on", "off", "resident", "mmap"], default="auto",
                     help="read the model's experts from one file in its folder instead of copying them all into RAM "
                          "(for a PC with a big GPU and little RAM); auto: when the experts would not fit the RAM. In "
@@ -3532,7 +3535,7 @@ def main() -> int:
              "--out", str(mtp / "mtp-q2_0.gguf")], env=env)
         run([sys.executable, str(ROOT / "tools" / "mtp_rt.py"), "--gguf", str(mtp / "mtp-q2_0.gguf"), "--out", str(rt)],
             env=env)
-    # a setup run again without --draft-vocab keeps the subset this model's config chose before (cyrillic, en)
+    # a setup run again without --draft-vocab keeps the subset this model's config chose before (cyrillic, fr, en)
     draft_vocab = a.draft_vocab or saved_draft_vocab(ROOT / f"strata-{tag.lower()}.json")
     refresh_draft_vocab(rt, draft_vocab or "cjk")
     ok(f"MTP draft layer: {rt}")
diff --git a/tools/draft_vocab.py b/tools/draft_vocab.py
index 77fa6b98f35..b3cc9fc5e5a 100644
--- a/tools/draft_vocab.py
+++ b/tools/draft_vocab.py
@@ -10,12 +10,23 @@
 
 --add takes han, kana, hangul, cjk_punct, cjk (those four) or cyrillic.  The base ids keep their order; the added ones follow in
 id order.  --stats prints what a subset holds.
+
+A language written in a script the base already holds (French, Spanish, German... in Latin letters) needs specific
+words and word pieces, not a whole script.  --corpus adds the tokens of a text corpus in that language: the most
+frequent ones that together cover --coverage (default 0.99) of the corpus's token occurrences (#597):
+
+    python tools/draft_vocab.py --gguf <model>-00001-of-0000N.gguf --base data/draft_vocab_en.bin \
+        --corpus fr1.txt fr2.txt ... --coverage 0.99 --out data/draft_vocab_fr.bin
+
+It prints the share of the corpus's occurrences outside the base and outside the new subset.  --add and --corpus
+can be combined.
 """
 from __future__ import annotations
 
 import argparse
 import sys
 from array import array
+from collections import Counter
 from pathlib import Path
 
 sys.path.insert(0, str(Path(__file__).resolve().parent))
@@ -50,11 +61,41 @@ def token_text(tok, i: int) -> str | None:
         return None
 
 
+def corpus_counts(tok, paths) -> Counter:
+    """Token occurrences over the corpus files (UTF-8 text, tokenized as plain text: no special tokens)."""
+    counts: Counter = Counter()
+    for path in paths:
+        counts.update(tok.encode(Path(path).read_text(encoding="utf-8")))
+    return counts
+
+
+def covering(counts: Counter, coverage: float) -> list[int]:
+    """The most frequent ids (ties: the lower id first) that together cover `coverage` of the occurrences."""
+    total = sum(counts.values())
+    picked, covered = [], 0
+    for i, c in sorted(counts.items(), key=lambda kv: (-kv[1], kv[0])):
+        if covered >= coverage * total:
+            break
+        picked.append(i)
+        covered += c
+    return picked
+
+
+def outside(counts: Counter, ids) -> float:
+    """The share of the occurrences whose token is not in `ids`."""
+    total = sum(counts.values())
+    have = set(ids)
+    return sum(c for i, c in counts.items() if i not in have) / total if total else 0.0
+
+
 def main() -> int:
     ap = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)
     ap.add_argument("--gguf", required=True, help="the model's (first) GGUF file: its vocabulary")
     ap.add_argument("--base", help="the subset to extend (int32 ids)")
     ap.add_argument("--add", default="", help="comma list: han, kana, hangul, cjk_punct, cjk, cyrillic")
+    ap.add_argument("--corpus", nargs="+", default=[], help="UTF-8 text files in the language to add (#597)")
+    ap.add_argument("--coverage", type=float, default=0.99,
+                    help="with --corpus: the share of its token occurrences the added tokens cover (default 0.99)")
     ap.add_argument("--out", help="where to write the new subset")
     ap.add_argument("--stats", action="store_true", help="print what the base (and the new) subset holds")
     a = ap.parse_args()
@@ -72,8 +113,12 @@ def main() -> int:
         if any(nm not in SCRIPTS for nm in names):
             sys.exit(f"--add {x}: expected one of {', '.join([*SCRIPTS, *GROUPS])}")
         want.update(names)
+    if not 0 < a.coverage <= 1:
+        sys.exit("--coverage: expected a share in (0, 1]")
+    counts = corpus_counts(tok, a.corpus) if a.corpus else Counter()
+    from_corpus = set(covering(counts, a.coverage)) if counts else set()
     have = set(base)
-    added = [i for i in range(n) if i not in have and kinds[i] & want]
+    added = [i for i in range(n) if i not in have and (kinds[i] & want or i in from_corpus)]
     ids = base + added
 
     def stats(label, sel):
@@ -86,6 +131,11 @@ def stats(label, sel):
             stats("base", base)
         if added:
             stats("new", ids)
+    if counts:
+        print(f"corpus: {sum(counts.values())} token occurrences, {len(counts)} distinct; "
+              f"{len(from_corpus)} tokens cover {a.coverage:g}, {len(from_corpus - have)} of them not in the base")
+        print(f"corpus occurrences outside the base: {outside(counts, base):.2%}, outside the new subset: "
+              f"{outside(counts, ids):.2%}")
     if a.out:
         Path(a.out).write_bytes(array("i", ids).tobytes())
         print(f"wrote {a.out}: {len(ids)} ids ({len(added)} added)")
diff --git a/tools/test_draft_vocab.py b/tools/test_draft_vocab.py
new file mode 100644
index 00000000000..2375a223104
--- /dev/null
+++ b/tools/test_draft_vocab.py
@@ -0,0 +1,47 @@
+"""Tests for tools/draft_vocab.py's corpus coverage mode (#597): the most frequent tokens of a corpus that together cover
+a given share of its occurrences.  No model, no GPU.
+
+    python -m unittest tools.test_draft_vocab
+"""
+from __future__ import annotations
+
+import sys
+import tempfile
+import unittest
+from collections import Counter
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+import draft_vocab as DV  # noqa: E402
+
+
+class Coverage(unittest.TestCase):
+    def test_most_frequent_first_until_the_share_is_covered(self):
+        c = Counter({7: 50, 3: 30, 9: 15, 4: 5})              # 100 occurrences
+        self.assertEqual(DV.covering(c, 0.5), [7])
+        self.assertEqual(DV.covering(c, 0.8), [7, 3])
+        self.assertEqual(DV.covering(c, 0.81), [7, 3, 9])
+        self.assertEqual(DV.covering(c, 1.0), [7, 3, 9, 4])
+
+    def test_ties_take_the_lower_id_first(self):
+        self.assertEqual(DV.covering(Counter({5: 10, 2: 10, 8: 10}), 0.5), [2, 5])
+
+    def test_share_outside_a_subset(self):
+        c = Counter({1: 60, 2: 30, 3: 10})
+        self.assertAlmostEqual(DV.outside(c, [1]), 0.4)
+        self.assertAlmostEqual(DV.outside(c, [1, 2, 3]), 0.0)
+        self.assertEqual(DV.outside(Counter(), [1]), 0.0)
+
+    def test_corpus_counts_reads_every_file(self):
+        class Tok:                                            # one id per character
+            def encode(self, text):
+                return [ord(ch) for ch in text]
+        with tempfile.TemporaryDirectory() as d:
+            a, b = Path(d) / "a.txt", Path(d) / "b.txt"
+            a.write_text("été", encoding="utf-8")
+            b.write_text("eté", encoding="utf-8")
+            self.assertEqual(DV.corpus_counts(Tok(), [a, b]), Counter({ord("é"): 3, ord("t"): 2, ord("e"): 1}))
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tools/test_setup_draft_vocab.py b/tools/test_setup_draft_vocab.py
index 6fedb4a8163..09cac42961d 100644
--- a/tools/test_setup_draft_vocab.py
+++ b/tools/test_setup_draft_vocab.py
@@ -1,5 +1,5 @@
 """Tests for setup.py's draft-vocabulary choice (#287): a setup run again without --draft-vocab keeps the subset the
-model's config chose before (cyrillic, en), and refresh_draft_vocab copies the chosen shipped subset.  Pure file work
+model's config chose before (cyrillic, fr, en), and refresh_draft_vocab copies the chosen shipped subset.  Pure file work
 in a temporary folder - no GPU, no downloads, no prompts.
 
     python -m unittest tools.test_setup_draft_vocab
@@ -49,6 +49,37 @@ def test_cyrillic_replaces_a_shipped_subset_and_stays(self):
             self.assertEqual(hashlib.sha256((rt / "draft_vocab.bin").read_bytes()).hexdigest(), want)
 
 
+    def test_fr_replaces_a_shipped_subset_and_back(self):
+        # #597: the French subset is a shipped one too - a later --draft-vocab cjk (or en) replaces it again, while a
+        # subset made by hand stays
+        data = ROOT / "data"
+        if not (data / setup.DRAFT_VOCABS["fr"]).exists():
+            self.skipTest("data/draft_vocab_fr.bin is not in this checkout")
+        sha = lambda p: hashlib.sha256(p.read_bytes()).hexdigest()   # noqa: E731
+        with tempfile.TemporaryDirectory() as d:
+            rt = Path(d)
+            (rt / "draft_vocab.bin").write_bytes((data / setup.DRAFT_VOCABS["en"]).read_bytes())
+            setup.refresh_draft_vocab(rt, "fr")
+            self.assertEqual(sha(rt / "draft_vocab.bin"), sha(data / setup.DRAFT_VOCABS["fr"]))
+            setup.refresh_draft_vocab(rt, "cjk")
+            self.assertEqual(sha(rt / "draft_vocab.bin"), sha(data / setup.DRAFT_VOCABS["cjk"]))
+            (rt / "draft_vocab.bin").write_bytes(bytes([1, 0, 0, 0]))   # made by hand: kept
+            setup.refresh_draft_vocab(rt, "fr")
+            self.assertEqual((rt / "draft_vocab.bin").read_bytes(), bytes([1, 0, 0, 0]))
+
+    def test_fr_holds_the_en_subset_in_its_order(self):
+        # built with tools/draft_vocab.py --base data/draft_vocab_en.bin --corpus ...: the base first, unchanged
+        from array import array
+        data = ROOT / "data"
+        if not (data / setup.DRAFT_VOCABS["fr"]).exists():
+            self.skipTest("data/draft_vocab_fr.bin is not in this checkout")
+        en = list(array("i", (data / setup.DRAFT_VOCABS["en"]).read_bytes()))
+        fr = list(array("i", (data / setup.DRAFT_VOCABS["fr"]).read_bytes()))
+        self.assertEqual(fr[:len(en)], en)
+        self.assertEqual(len(set(fr)), len(fr))
+        self.assertEqual(fr[len(en):], sorted(fr[len(en):]))
+
+
 class SmallCardNote(unittest.TestCase):
     """#474: a card under 14 GB is told about a smaller draft subset - a note only, and not when one was chosen."""
 
@@ -57,7 +88,8 @@ def test_note_on_a_small_card_only(self):
         self.assertTrue(note)
         self.assertIn("--draft-vocab en", " ".join(note))
         self.assertIn("the draft head does not fit", " ".join(note))
-        for vram, chosen in ((16.0, None), (24.0, None), (12.0, "en"), (12.0, "cyrillic"), (12.0, "cjk"), (0.0, None)):
+        for vram, chosen in ((16.0, None), (24.0, None), (12.0, "en"), (12.0, "cyrillic"), (12.0, "fr"), (12.0, "cjk"),
+                             (0.0, None)):
             self.assertEqual(setup.draft_vocab_note(vram, chosen), [], (vram, chosen))
 
     def test_sizes_follow_the_shipped_subsets(self):
@@ -68,7 +100,7 @@ def test_sizes_follow_the_shipped_subsets(self):
             if not p.exists():
                 self.skipTest(f"data/{name} is not in this checkout")
             sizes[choice] = p.stat().st_size // 4
-        for choice in ("en", "cyrillic"):
+        for choice in ("en", "cyrillic", "fr"):
             want = setup.DRAFT_VOCAB_MIB["cjk"] * sizes[choice] / sizes["cjk"]
             self.assertAlmostEqual(setup.DRAFT_VOCAB_MIB[choice], want, delta=3)
 

From 0129f22b14d881e3216f15dd897c757b09c523d3 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:20:33 +0200
Subject: [PATCH 086/201] setup: a calibration on Linux HIP names the AMD card
 and is reused for it (#566)

hardware_key, the settings file's key for a saved calibration, read the cards with nvidia-smi's list: on an AMD PC
every card was "?|0GB" (two different cards shared one calibration), and on a PC with an NVIDIA card too a HIP index
named that NVIDIA card or stopped setup ("there is no GPU N"). A HIP config's cards now come from amd_gpus, in HIP's
numbering, with the architecture in the name (an RX 7900 XTX and an RX 7900 XT are both gfx1100; a card without a
product name is known by its arch). Setup reuses a saved calibration on Linux HIP as on NVIDIA (setup_calibration);
Windows HIP keeps the defaults for now. The tuning is still offered on NVIDIA only - a `./setup.sh --calibrate` on
HIP runs it by hand, and each control is verified on HIP before setup offers it.

The NVIDIA key and the settings file's format are unchanged. Tests: tools/test_setup_amd.py CalibrationKey (7).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                | 42 +++++++++++++++++++++--
 tools/test_setup_amd.py | 75 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+), 3 deletions(-)

diff --git a/setup.py b/setup.py
index a9cfe7b2a01..08412b8d09d 100644
--- a/setup.py
+++ b/setup.py
@@ -2479,11 +2479,37 @@ def is_wsl() -> bool:
     return sys.platform.startswith("linux") and "microsoft" in platform.uname().release.lower()
 
 
+def hip_config_cards(sel) -> list[dict]:
+    """#566: the AMD cards a HIP config runs on - its "gpu" (one index or a list) in HIP's numbering, as amd_gpus
+    lists them; no "gpu": the supported card with the most VRAM, as setup picks it.  Each card's name carries its
+    architecture (an RX 7900 XTX and an RX 7900 XT are both gfx1100; a card without a product name in sysfs is known
+    by its arch only).  A card that is not found is {} (the key then says "?")."""
+    amd = amd_gpus()
+    if sel is None:
+        usable = [g for g in amd if amd_problem(g) is None]
+        sel = max(usable, key=lambda x: (round(x["vram_gb"]), -x["index"]))["index"] if usable else None
+    byid = {g["index"]: g for g in amd}
+    cards = []
+    for i in (sel if isinstance(sel, list) else [sel]):
+        g = byid.get(i)
+        if g is None:
+            cards.append({})
+            continue
+        arch = g.get("arch") or ""
+        name = g.get("name") or "?"
+        cards.append({**g, "name": name if not arch or arch in name else f"{name} ({arch})"})
+    return cards
+
+
 def hardware_key(cfg: dict) -> str:
     """What a calibration is valid for: this GPU, CPU and RAM, and the model with its context and images setting
-    (the context's KV cache and the image encoder take VRAM from the expert cache)."""
+    (the context's KV cache and the image encoder take VRAM from the expert cache).  #566: a HIP config's cards are
+    AMD's (hip_config_cards) - nvidia-smi's list named them "?" (or another card with that number) before."""
     sel = cfg.get("gpu")
-    gl = [gpu_info(i) or {} for i in sel] if isinstance(sel, list) else [gpu_info(sel) or {}]
+    if cfg.get("backend") == "hip":
+        gl = hip_config_cards(sel)
+    else:
+        gl = [gpu_info(i) or {} for i in sel] if isinstance(sel, list) else [gpu_info(sel) or {}]
     g = {"name": " + ".join(x.get("name", "?") for x in gl), "vram_gb": sum(x.get("vram_gb", 0) for x in gl)}
     a = cfg.get("args", [])
     ctx = a[a.index("--max-context") + 1] if "--max-context" in a else "?"
@@ -2532,6 +2558,16 @@ def saved_calibration(cfg: dict) -> dict | None:
     return (load_settings().get("calibration") or {}).get(hardware_key(cfg))
 
 
+def setup_calibration(cfg: dict, hip: bool) -> dict | None:
+    """The calibration a (re-)install applies to its new config: the one saved for this PC and model.  #566: on Linux
+    HIP too - hardware_key now names the AMD cards, so a `./setup.sh --calibrate` run is matched to its card and
+    model.  Windows HIP keeps the defaults for now (not tried there).  Setup still offers the tuning itself on NVIDIA
+    only: each control is verified on HIP first."""
+    if hip and WIN:
+        return None
+    return saved_calibration(cfg)
+
+
 def upgrade_config(cfg_path: Path, cfg: dict) -> dict:
     """Configs written before v0.1.13 read prompts in fixed 2048-token chunks; the engine now picks the chunk
     itself (`--prefill auto`: up to 8192, as the free VRAM allows - about 2x faster on long prompts).  Under WSL,
@@ -3661,7 +3697,7 @@ def main() -> int:
         if vision == "cpu":
             cfg["vision"]["threads"] = max(1, (os.cpu_count() or 8) // 2)
     cfg_path = ROOT / f"strata-{tag.lower()}.json"
-    cal = None if hip else saved_calibration(cfg)     # tools/calibrate.py is NVIDIA-only for now
+    cal = setup_calibration(cfg, hip)                  # #566: Linux HIP too; the tuning is offered on NVIDIA only
     if cal is not None:
         sys.path.insert(0, str(ROOT / "tools"))
         import calibrate as CAL
diff --git a/tools/test_setup_amd.py b/tools/test_setup_amd.py
index a00a65025c7..f98f657b465 100644
--- a/tools/test_setup_amd.py
+++ b/tools/test_setup_amd.py
@@ -336,6 +336,81 @@ def setup_hip(text):
     return _HIP_DEVICES(text=text)
 
 
+class CalibrationKey(unittest.TestCase):
+    """#566: a calibration is saved and found again per PC and model (hardware_key).  A HIP config's cards are AMD's,
+    in HIP's numbering - nvidia-smi named them "?" (or another card with that number) before - and setup reuses a
+    saved calibration on Linux HIP.  The NVIDIA key and the settings file's format are unchanged."""
+    AMD = [{"index": 0, "name": "AMD Radeon RX 7900 XTX", "vram_gb": 23.98, "arch": "gfx1100"},
+           {"index": 1, "name": "AMD Radeon RX 7900 XT", "vram_gb": 19.98, "arch": "gfx1100"},
+           {"index": 2, "name": "AMD Radeon (gfx1201)", "vram_gb": 15.92, "arch": "gfx1201"},
+           {"index": 3, "name": "AMD Radeon (gfx1036)", "vram_gb": 0.5, "arch": "gfx1036"}]
+
+    def setUp(self):
+        self.patches = [mock.patch.object(setup, "amd_gpus", lambda *a, **k: [dict(g) for g in self.AMD]),
+                        mock.patch.object(setup, "cpu_info", lambda: ("AMD Ryzen 9 7950X", 16)),
+                        mock.patch.object(setup, "ram_gb", lambda: 63.6)]
+        for p in self.patches:
+            p.start()
+
+    def tearDown(self):
+        for p in self.patches:
+            p.stop()
+
+    @staticmethod
+    def cfg(gpu, backend="hip", ctx="32768"):
+        c = {"model_name": "qwen3.8-flash-next-iq3_xxs", "args": ["--max-context", ctx, "--kv", "int8"], "gpu": gpu}
+        if backend:
+            c["backend"] = backend
+        return c
+
+    def test_hip_key_names_the_amd_card_and_its_arch(self):
+        def no_nvidia(*a, **k):                     # a HIP config never asks nvidia-smi (a PC with both kinds)
+            raise AssertionError("gpu_info called for a HIP config")
+        with mock.patch.object(setup, "gpu_info", no_nvidia):
+            self.assertEqual(setup.hardware_key(self.cfg(0)),
+                             "AMD Radeon RX 7900 XTX (gfx1100)|24GB|AMD Ryzen 9 7950X|64GB|qwen3.8-flash-next-iq3_xxs|"
+                             "32768|text")
+            # the arch is not repeated when the name already holds it (no product name in sysfs)
+            self.assertTrue(setup.hardware_key(self.cfg(2)).startswith("AMD Radeon (gfx1201)|16GB|"))
+
+    def test_two_cards_of_one_arch_are_two_keys(self):
+        keys = {setup.hardware_key(self.cfg(i)) for i in (0, 1, 2)}
+        self.assertEqual(len(keys), 3)
+
+    def test_a_split_names_every_card(self):
+        self.assertTrue(setup.hardware_key(self.cfg([1, 0])).startswith(
+            "AMD Radeon RX 7900 XT (gfx1100) + AMD Radeon RX 7900 XTX (gfx1100)|44GB|"))
+
+    def test_no_gpu_in_the_config_is_the_supported_card_with_the_most_vram(self):
+        self.assertTrue(setup.hardware_key(self.cfg(None)).startswith("AMD Radeon RX 7900 XTX (gfx1100)|24GB|"))
+
+    def test_a_card_that_is_gone_is_unknown(self):
+        self.assertTrue(setup.hardware_key(self.cfg(7)).startswith("?|0GB|"))
+
+    def test_nvidia_key_unchanged(self):
+        def amd(*a, **k):
+            raise AssertionError("amd_gpus called for an NVIDIA config")
+        with mock.patch.object(setup, "amd_gpus", amd), \
+                mock.patch.object(setup, "gpu_info", lambda i=None: {"name": "NVIDIA GeForce RTX 5070", "vram_gb": 11.94}):
+            self.assertEqual(setup.hardware_key(self.cfg(0, backend=None)),
+                             "NVIDIA GeForce RTX 5070|12GB|AMD Ryzen 9 7950X|64GB|qwen3.8-flash-next-iq3_xxs|32768|text")
+            self.assertEqual(setup.hardware_key(self.cfg([0, 1], backend="cuda")),
+                             "NVIDIA GeForce RTX 5070 + NVIDIA GeForce RTX 5070|24GB|AMD Ryzen 9 7950X|64GB|"
+                             "qwen3.8-flash-next-iq3_xxs|32768|text")
+
+    def test_setup_reuses_a_saved_calibration_on_linux_hip(self):
+        cfg = self.cfg(1)
+        saved = {"settings": {"pcie_frac": 0.0}, "tok_s": 40.1, "date": "2026-10-03"}
+        other = {"settings": {"pcie_frac": 0.5}, "tok_s": 50.0, "date": "2026-10-02"}
+        store = {"calibration": {setup.hardware_key(cfg): saved, setup.hardware_key(self.cfg(0)): other}}
+        with mock.patch.object(setup, "load_settings", lambda: store):
+            with mock.patch.object(setup, "WIN", False):
+                self.assertEqual(setup.setup_calibration(cfg, hip=True), saved)       # its own card's, not the XTX's
+                self.assertIsNone(setup.setup_calibration(self.cfg(2), hip=True))     # never tuned on that card
+            with mock.patch.object(setup, "WIN", True):
+                self.assertIsNone(setup.setup_calibration(cfg, hip=True))             # Windows HIP: defaults for now
+
+
 class WindowsHipVision(unittest.TestCase):
     def test_no_cpu_encoder_on_windows(self):
         with mock.patch.object(setup, "WIN", True), mock.patch.object(setup, "warn", lambda *a: None):

From e43d07280b1c93383bd4d5cbad65d5240d9ed7a5 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:21:55 +0200
Subject: [PATCH 087/201] serve: a literal <think> / </think> in a message is
 encoded as text (#537)

The tokenizer matches <think> and </think> as their special tokens even
in plain text (type 4, as llama.cpp does), so a user quoting "</think>"
handed the model a real end-of-reasoning token and the answer came back
empty. Before the template is rendered the tags in message text (user,
tool, system, assistant history, tool call arguments, tool descriptions)
are swapped for private-use marks; after it, those spans are encoded as
ordinary text (Tokenizer.encode's new plain= spans), the template's own
markers stay special. An assistant turn that opens with its own
<think>...</think> block keeps that block. A prompt without the tags is
encoded exactly as before; count_tokens uses the same path.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/frontend.py         | 76 ++++++++++++++++++++++++++++++++++++++
 serve/server.py           | 25 +++++++++----
 serve/test_server.py      | 78 +++++++++++++++++++++++++++++++++++++++
 tools/strata_tokenizer.py | 13 +++++--
 4 files changed, 181 insertions(+), 11 deletions(-)

diff --git a/serve/frontend.py b/serve/frontend.py
index 007d06df2d6..02a1d2f9bc2 100644
--- a/serve/frontend.py
+++ b/serve/frontend.py
@@ -16,6 +16,7 @@
 from __future__ import annotations
 
 import json
+import re
 import uuid
 from dataclasses import dataclass, field
 from pathlib import Path
@@ -135,6 +136,81 @@ def images_of(messages: list[dict]) -> list[str]:
             for item in m["content"] if item.get("type") == "image"]
 
 
+# #537: a literal <think> / </think> inside a message's text is plain text, not the model's reasoning markers.  The
+# tokenizer matches those two strings as their special tokens everywhere (GGUF token type 4, as llama.cpp does), so
+# a user quoting "</think>" used to hand the model a real end-of-reasoning token.  Before the template is rendered
+# they are swapped for these private-use characters, and the server encodes the spans they mark as ordinary text.
+THINK_TAGS = {"<think>": "\U000F0E01", "</think>": "\U000F0E02"}
+THINK_MARKS = {v: k for k, v in THINK_TAGS.items()}
+
+
+def _mark(text: str) -> str:
+    for tag, mark in THINK_TAGS.items():
+        text = text.replace(tag, mark)
+    return text
+
+
+def _mark_deep(v):
+    if isinstance(v, str):
+        return _mark(v)
+    if isinstance(v, dict):
+        return {k: _mark_deep(x) for k, x in v.items()}
+    if isinstance(v, list):
+        return [_mark_deep(x) for x in v]
+    return v
+
+
+def _has_tag(v) -> bool:
+    if isinstance(v, str):
+        return "<think>" in v or "</think>" in v
+    if isinstance(v, dict):
+        return any(_has_tag(x) for x in v.values())
+    if isinstance(v, list):
+        return any(_has_tag(x) for x in v)
+    return False
+
+
+def mark_think_literals(messages: list[dict], tools: list[dict] | None):
+    """#537: (messages, tools) with every literal <think> / </think> in their text swapped for THINK_TAGS' marks, and
+    whether there was one (None: no change, the same objects back - a prompt without them renders as it always did).
+    An assistant message whose content opens with a whole <think>...</think> block (clients that send the reasoning
+    inline) keeps that one block as the model's markers, as before."""
+    if not _has_tag(messages) and not _has_tag(tools):
+        return messages, tools, False
+    out = []
+    for m in messages:
+        m = dict(m)
+        content = m.get("content")
+        for k, v in m.items():
+            if k != "role":
+                m[k] = _mark_deep(v)
+        if m.get("role") == "assistant" and isinstance(content, str) and content.lstrip().startswith("<think>") \
+                and "</think>" in content:
+            i, j = content.index("<think>") + len("<think>"), content.index("</think>")
+            m["content"] = content[:i] + _mark(content[i:j]) + "</think>" + _mark(content[j + len("</think>"):])
+        out.append(m)
+    return out, _mark_deep(tools), True
+
+
+_THINK_MARK_RE = re.compile("|".join(THINK_MARKS))
+
+
+def unmark_think_literals(prompt: str) -> tuple[str, list[tuple[int, int]]]:
+    """The rendered prompt with THINK_TAGS' marks turned back into the tags' text, and the (start, end) spans of those
+    tags in it: the server encodes them as ordinary text (the tokenizer's encode_plain_spans)."""
+    out, spans, pos, n = [], [], 0, 0
+    for m in _THINK_MARK_RE.finditer(prompt):
+        out.append(prompt[pos:m.start()])
+        n += m.start() - pos
+        tag = THINK_MARKS[m.group(0)]
+        out.append(tag)
+        spans.append((n, n + len(tag)))
+        n += len(tag)
+        pos = m.end()
+    out.append(prompt[pos:])
+    return "".join(out), spans
+
+
 def _late_system_to_user(messages: list[dict]) -> list[dict]:
     """The chat template takes a system message only at the start ("System message must be at the beginning").
     Clients also send them mid-conversation - Claude Code's hook context as {"role": "system"} after the first user
diff --git a/serve/server.py b/serve/server.py
index 5deeb9d0df9..9ed8d7beb18 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -51,7 +51,7 @@
 sys.path.insert(0, str(ROOT / "tools"))
 sys.path.insert(0, str(ROOT))   # run as a script (run-<model>.bat) as well as a module
 from serve.frontend import (ChatTemplate, Event, OutputParser, anthropic_to_messages,  # noqa: E402
-                            images_of, openai_to_messages)
+                            images_of, mark_think_literals, openai_to_messages, unmark_think_literals)
 from serve.mcp import McpCancelled, hub_from_config  # noqa: E402
 from serve.winjob import contain  # noqa: E402
 from serve.structured import StructuredOutputError, prepare_format, validated_json  # noqa: E402
@@ -893,11 +893,14 @@ class ByteTokenizer:
     """Tiny stand-in tokenizer for tests without the pack: one id per UTF-8 byte, specials as ids >= 256."""
     SPECIALS = ["<|im_start|>", "<|im_end|>", "<|endoftext|>", "<|vision_start|>", "<|image_pad|>", "<|vision_end|>"]
 
-    def encode(self, text, parse_special=False):
+    ALWAYS = ()                                     # specials matched without parse_special (type 4, as <think>)
+
+    def encode(self, text, parse_special=False, plain=()):
         out, i = [], 0
         while i < len(text):
             for k, s in enumerate(self.SPECIALS):
-                if parse_special and text.startswith(s, i):
+                if (parse_special or s in self.ALWAYS) and text.startswith(s, i) and not any(
+                        a <= i < b for a, b in plain):
                     out.append(256 + k)
                     i += len(s)
                     break
@@ -1334,11 +1337,20 @@ def scaled(v, unit, digits=0):
                 "ram": {"used_gib": scaled(hw.get("ram_used"), 2 ** 30, 1),
                         "total_gib": scaled(hw.get("ram_total"), 2 ** 30, 1)} if hw.get("ram_total") else None}}
 
+    def encode_prompt(self, messages, tools, kwargs) -> list[int]:
+        """The request's prompt: the template rendered and tokenized.  #537: a <think> / </think> written inside a
+        message's text is encoded as the text it is, not as the model's reasoning markers (the template's own are)."""
+        marked, marked_tools, changed = mark_think_literals(messages, tools)
+        prompt = self.template.render(marked, tools=marked_tools, **kwargs)
+        if not changed:
+            return self.tok.encode(prompt, parse_special=True)
+        prompt, plain = unmark_think_literals(prompt)
+        return self.tok.encode(prompt, parse_special=True, plain=plain)
+
     def prepare(self, messages, tools, kwargs, max_new=None):
         """-> (ids, thinking, max_new). An unset or non-positive max_new (some clients send -1) means "unlimited":
         the rest of the context."""
-        prompt = self.template.render(messages, tools=tools, **kwargs)
-        ids = self.tok.encode(prompt, parse_special=True)
+        ids = self.encode_prompt(messages, tools, kwargs)
         self.embeddings.path = None
         images = images_of(messages)
         if images:
@@ -2471,8 +2483,7 @@ def _count_tokens(self, req):
             read for the same request, rendered and tokenized - the model does not run."""
             req = svc.with_shared(req, "anthropic")
             messages, tools, kw = anthropic_to_messages(req, svc.anthropic_think_unasked)
-            prompt = svc.template.render(messages, tools=tools, **kw)
-            self._json(200, {"input_tokens": len(svc.tok.encode(prompt, parse_special=True))})
+            self._json(200, {"input_tokens": len(svc.encode_prompt(messages, tools, kw))})
 
         def _anthropic(self, req):
             svc.load()
diff --git a/serve/test_server.py b/serve/test_server.py
index 51101e69525..cb96d1f9db8 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -241,6 +241,84 @@ def test_literal_marker_with_an_image(self):
             svc.embeddings.path.unlink(missing_ok=True)
 
 
+class ThinkTokenizer(ByteTokenizer):
+    """The byte tokenizer with the model's reasoning markers as specials that are matched even without parse_special,
+    as the real tokenizer does (GGUF token type 4)."""
+    SPECIALS = ByteTokenizer.SPECIALS + ["<think>", "</think>"]
+    ALWAYS = ("<think>", "</think>")
+
+
+class LiteralThinkTags(unittest.TestCase):
+    """#537: a <think> / </think> written inside a message is text, not the model's reasoning markers: a quoted
+    "</think>" no longer ends the model's reasoning before it starts.  The template's own markers stay special."""
+
+    @classmethod
+    def setUpClass(cls):
+        cls.tok = ThinkTokenizer()
+        cls.svc = Service(MockEngine(cls.tok, "ok", max_context=CTX), cls.tok,
+                          ChatTemplate(ROOT / "serve/chat_template.jinja"))
+        cls.open, cls.close = (cls.tok.encode(t)[0] for t in ("<think>", "</think>"))
+
+    def ids(self, messages, tools=None, **kw):
+        return self.svc.prepare(messages, tools, kw)[0]
+
+    def old_ids(self, messages, tools=None, **kw):
+        return self.tok.encode(self.svc.template.render(messages, tools=tools, **kw), parse_special=True)
+
+    def test_a_quoted_tag_in_a_user_message(self):
+        text = "Quote this exact literal string, then explain it: </think> and <think>"
+        ids = self.ids([{"role": "user", "content": text}])
+        self.assertEqual(ids.count(self.close), 0)
+        self.assertEqual(ids.count(self.open), 1)                         # the generation prompt's own
+        self.assertEqual(ids[-2:], [self.open, ord("\n")])
+        self.assertIn(text, self.tok.decode(ids))                         # the text is all there, as text
+        self.assertEqual(ids.count(self.close), 0)
+        # thinking off: the template's empty block stays two specials, the user's tag is text
+        ids = self.ids([{"role": "user", "content": text}], enable_thinking=False)
+        self.assertEqual((ids.count(self.open), ids.count(self.close)), (1, 1))
+
+    def test_without_a_tag_the_prompt_is_unchanged(self):
+        msgs = [{"role": "system", "content": "Be brief."}, {"role": "user", "content": "1+1?"},
+                {"role": "assistant", "content": "2", "reasoning_content": "easy"}, {"role": "user", "content": "x"}]
+        self.assertEqual(self.ids(msgs), self.old_ids(msgs))
+        self.assertEqual(self.ids(msgs, enable_thinking=False), self.old_ids(msgs, enable_thinking=False))
+
+    def test_history_tool_results_and_tools(self):
+        msgs = [{"role": "user", "content": "go"},
+                {"role": "assistant", "content": "It wrote </think> here.", "reasoning_content": "the </think> tag",
+                 "tool_calls": [{"function": {"name": "write", "arguments": {"text": "a </think> b"}}}]},
+                {"role": "tool", "content": "file has <think> in it"},
+                {"role": "user", "content": "why did you write </think>"}]
+        tools = [{"name": "write", "description": "writes text (may contain </think>)", "parameters": {}}]
+        ids = self.ids(msgs, tools)
+        # the template's markers: the history turn's <think>...</think> and the generation prompt's <think>
+        self.assertEqual((ids.count(self.open), ids.count(self.close)), (2, 1))
+        text = self.tok.decode(ids)
+        for part in ("It wrote </think> here.", "the </think> tag", "a </think> b", "file has <think> in it",
+                     "why did you write </think>", "may contain </think>"):
+            self.assertIn(part, text)
+
+    def test_a_client_that_sends_the_reasoning_inline(self):
+        # an assistant turn whose content opens with its own <think>...</think> block keeps that block's markers
+        msgs = [{"role": "user", "content": "hi"},
+                {"role": "assistant", "content": "<think>\nplan: say </x> hello\n</think>\n\nHello, </think> is a tag."},
+                {"role": "user", "content": "again"}]
+        ids = self.ids(msgs)
+        self.assertEqual((ids.count(self.open), ids.count(self.close)), (3, 2))   # template's + the inline block's
+        self.assertIn("Hello, </think> is a tag.", self.tok.decode(ids))
+
+    def test_the_real_tokenizer_reads_the_tag_as_text(self):
+        import strata_tokenizer as ST
+        b2u = ST.bytes_to_unicode()
+        tokens = [b2u[b] for b in range(256)] + ["<think>", "</think>", "<|im_end|>"]
+        tok = ST.Tokenizer(tokens, [], [1] * 256 + [4, 4, 3])
+        text = "say </think> now<|im_end|>"
+        self.assertEqual(tok.encode(text, parse_special=True), [*b"say ", 257, *b" now", 258])
+        start = text.index("</think>")
+        plain = tok.encode(text, parse_special=True, plain=[(start, start + len("</think>"))])
+        self.assertEqual(plain, [*b"say </think> now", 258])               # the tag as text, im_end still special
+
+
 class StatusNeedsTheKey(unittest.TestCase):
     """#212: /status shows the end of the answer being written, so it needs the key like /v1/*."""
 
diff --git a/tools/strata_tokenizer.py b/tools/strata_tokenizer.py
index c14492cb9f1..8b794191e7a 100644
--- a/tools/strata_tokenizer.py
+++ b/tools/strata_tokenizer.py
@@ -213,18 +213,21 @@ def _encode_plain(self, text: str) -> list[int]:
                 out.append(i)
         return out
 
-    def _encode_matching(self, text: str, pat) -> list[int]:
+    def _encode_matching(self, text: str, pat, plain=()) -> list[int]:
         """Encode `text`, emitting any literal `pat` matches as single tokens and BPE-ing the rest.
 
         The split happens on the RAW text, before the byte mapping, because a special token's string is a
         literal to match rather than bytes to decompose.  Everything between the matches is tokenized
-        normally - which is why a near-miss like `<|im_star` still costs ordinary tokens.
+        normally - which is why a near-miss like `<|im_star` still costs ordinary tokens.  A match that starts
+        inside one of the `plain` (start, end) spans is left to the text around it (#537).
         """
         if pat is None:
             return self._encode_plain(text)
         out: list[int] = []
         pos = 0
         for m in pat.finditer(text):
+            if plain and any(a <= m.start() < b for a, b in plain):
+                continue
             if m.start() > pos:
                 out.extend(self._encode_plain(text[pos:m.start()]))
             out.append(self.special_tokens[m.group(0)])
@@ -233,13 +236,15 @@ def _encode_matching(self, text: str, pat) -> list[int]:
             out.extend(self._encode_plain(text[pos:]))
         return out
 
-    def encode(self, text: str, parse_special: bool = False) -> list[int]:
+    def encode(self, text: str, parse_special: bool = False, plain=()) -> list[int]:
         """Tokenize `text`.
 
         `parse_special` controls only the type-3 CONTROL literals such as `<|im_end|>`; the type-4
         USER_DEFINED ones such as `<think>` are matched either way.  See the note in `__init__`.
+        `plain`: (start, end) spans of `text` that are ordinary text even where they spell a literal - a
+        `</think>` quoted in a message (#537) - and are tokenized with the text around them.
         """
-        return self._encode_matching(text, self._special_re if parse_special else self._always_re)
+        return self._encode_matching(text, self._special_re if parse_special else self._always_re, plain)
 
     def token_bytes(self, i: int) -> bytes:
         """The raw bytes of one token (a multi-byte character can be split across tokens)."""

From 71d41cd585ea22058e45e2cb93e5dc99d1ad2f5d Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:22:16 +0200
Subject: [PATCH 088/201] --ple-io direct on a rotational disk: warn at start,
 setup keeps the table in RAM, the stall report counts disk waits (#605)

On a 7200 RPM disk the default --ple-io direct's random reads of the n-gram table stalled prompts past the 60 s
watchdog, and the stall report looked like any other engine stall.

- Engine (Linux): at start with --ple-io direct, the table's disk is looked up in sysfs (queue/rotational); on a
  rotational one it warns and recommends --ple-io ram or an SSD (not on WSL, whose virtual disk says rotational).
- Stall report (Linux): the engine's threads in state D and their wchan ("threads waiting on the disk (state D): 16
  of 35 (blk_io_schedule x16)"), with what that means.
- Setup (Linux): a model on a rotational disk gets --ple-io ram when the RAM holds the table beside the model,
  otherwise a warning that recommends an SSD. Nothing changes on an SSD.
- DETAILS.md: --ple-io direct is for SSDs (it reads unbuffered, not through the OS cache), and a troubleshooting row.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md             |  4 ++-
 setup.py                    | 29 ++++++++++++++++
 src/program/generate.cpp    | 66 +++++++++++++++++++++++++++++++++++++
 tools/test_setup_choices.py | 34 +++++++++++++++++++
 tools/test_setup_golden.py  |  1 +
 5 files changed, 133 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index dffa78e77b7..ce147220d25 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -876,6 +876,7 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
 | Pictures are slow (10-30 s) | The encoder runs on the CPU: run setup again with `--vision gpu` (needs ~1.4 GB of VRAM). |
 | A request never finishes: "reading the prompt", GPU "100%" at low power | The GPU ran out of VRAM (engines before 0.1.9 could end with ~30 MiB free at large contexts). Run `START-HERE.bat` once to get engine 0.1.9 or newer; the log then says `... MiB of VRAM free with everything loaded` (a few hundred) and names the `--vram-reserve-mib` to add if it is low. |
 | Generation stops mid-answer, GPU "100%", one CPU core busy | Fixed in engine 0.1.12 (issue #29, a race in the CPU expert pool on big-VRAM cards). Since then a request that stops moving ends with an error instead of hanging (after 2 minutes; 1 minute from 0.1.13): the log says `no progress for ... s ... (issue #29)` with where it stopped, and the next request starts the engine again. If you see that line, please open an issue with it. Engine 0.1.13 adds a stall report under it (what every expert-pool thread and the GPU handshake were doing, memory and page faults) and, on Windows, a `strata-stall-<pid>.dmp` file with every thread's stack: attach both. (`STRATA_WATCHDOG_S` sets the time in seconds; 0 turns it off.) Engine 0.1.14 fixes the stall those reports found (issue #31: with the IQ packs the host could wait forever inside the NVIDIA driver while copying experts in a verify window; the experts are now copied by a GPU kernel, `--pcie-mode dma` restores the old way). |
+| `no progress for 60 s ... reading the prompt` on Linux, and the stall report says `threads waiting on the disk (state D): 16 ...` | The engine waits for the drive, not a deadlock: the n-gram table is read at random (`--ple-io direct`), which a rotational disk cannot keep up with (#605). The engine warns at start when the table is on one; `--ple-io ram` (Linux, needs RAM for the table) or the model on an SSD fixes it. Setup adds `--ple-io ram` itself on a rotational disk when the RAM holds the table (0.1.39). |
 | `the engine said nothing for ... s during the request` or `... did not finish the request after it was stopped (STOP)` | Issue #481: the engine and the server lost step (the engine waits for its next command, the server for the request's end; GPU at 0 %, nothing in the log). The server ends the engine after 300 s without a line from it during a request (while a prompt is read: each chunk may take three times the previous one's time, the first one up to its tokens at 50 tok/s more), the request ends with an error and the next request starts the engine again. `"engine_silence_s": 600` in `strata-<model>.json` sets the time (0 = wait forever, as before). If you see it, please add the end of the engine log to #481. |
 | `out of memory: cudaFuncSetAttribute` in the log (IQ3_XXS, long prompt) | Fixed in engine 0.1.15: CUDA loaded a kernel's code when it was first needed, and mid-prompt there was no VRAM left for it. Run `START-HERE.bat` (Windows) or `./setup.sh` (Linux) once to update. |
 | Anything else | The engine log is `strata-<model>.log` in this folder. |
@@ -891,7 +892,8 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
   the conversation while you chat).
 - **RAM:** all 24,576 experts, pinned. The CPU computes the experts that are not on the GPU **in place**, at the same time
   as the GPU works on the cached ones (AVX-512 / AVX2 kernels, ggml's for the i-quants).
-- **SSD:** the 28.8 GB n-gram table, read a few rows per token through the OS cache.
+- **SSD:** the 28.8 GB n-gram table, a few rows per token, read unbuffered past the OS cache (`--ple-io direct`, the
+  default, made for SSDs; on a rotational disk `--ple-io ram` keeps the table in RAM, #605).
 - **Speculation:** the model's own MTP layer drafts up to 3 tokens; one pass over all 48 layers checks them. 2.4-3.2
   tokens per pass on average. When the reply repeats the context (code edits, quoted text), **prompt lookup** (engine
   0.1.7) drafts up to 5 tokens from the earlier copy, but only where its measured acceptance and cost say it pays:
diff --git a/setup.py b/setup.py
index 69624a11bc9..d4651fbf3d8 100644
--- a/setup.py
+++ b/setup.py
@@ -2479,6 +2479,22 @@ def is_wsl() -> bool:
     return sys.platform.startswith("linux") and "microsoft" in platform.uname().release.lower()
 
 
+def rotational_disk(path) -> str | None:
+    """#605 (Linux): the disk's name when `path` is on a rotational disk (sysfs queue/rotational), else None."""
+    if WIN:
+        return None
+    try:
+        st = os.stat(path)
+        p = Path(f"/sys/dev/block/{os.major(st.st_dev)}:{os.minor(st.st_dev)}").resolve()
+        for q in (p, p.parent):                        # a partition has its disk's queue
+            f = q / "queue" / "rotational"
+            if f.exists():
+                return q.name if f.read_text().strip() == "1" else None
+    except (OSError, ValueError, AttributeError):
+        pass
+    return None
+
+
 def hardware_key(cfg: dict) -> str:
     """What a calibration is valid for: this GPU, CPU and RAM, and the model with its context and images setting
     (the context's KV cache and the image encoder take VRAM from the expert cache)."""
@@ -3562,6 +3578,19 @@ def main() -> int:
            "the OS file cache (run setup again after the next engine update)")
     if low_ram:   # the experts from the pack's experts.bin: the ones the GPU does not hold copied into RAM, or mapped
         args += ["--resident-experts" if resident else "--mmap-experts"]
+    disk = None if is_wsl() else rotational_disk(ple)  # #605 (WSL's virtual disk says rotational)
+    if disk:
+        tensor = next((t for t in GGUFFile(ple).tensors if t.name == "per_layer_token_embd.weight"), None)
+        size = getattr(tensor, "expected_bytes", lambda: None)()
+        table_gb = size / 1e9 if size else 28.8
+        if ram >= MODELS[model]["ram_gb"] + table_gb + 4:
+            args += ["--ple-io", "ram"]
+            ok(f"the model is on a rotational disk ({disk}): its {table_gb:.0f} GB n-gram table is kept in RAM "
+               "(--ple-io ram) - read from the disk at random, it can stall prompts for minutes (#605)")
+        else:
+            warn(f"the model is on a rotational disk ({disk}): its n-gram table is read from it at random, which can "
+                 f"stall prompts for minutes (#605). An SSD is recommended; with ~{table_gb:.0f} GB more RAM, "
+                 "--ple-io ram in the config's args keeps the table in RAM instead")
     # KV streaming: from 64K up the whole KV cache lives in RAM and only the part the attention reads (32K positions
     # per layer) stays in VRAM; the VRAM it frees holds more experts (+6% at 128K, +23% at 262K with Q2_0). It
     # costs ~13.7 KB of RAM per context token with 8-bit KV (1.7 GB at 128K), 7.5 KB with 4-bit, so only when it fits.
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index ac250f79aff..593825410b1 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -70,6 +70,8 @@
 #else
 #include <unistd.h>
 #include <cerrno>
+#include <sys/stat.h>
+#include <sys/sysmacros.h>
 #endif
 
 #include <cuda_runtime.h>
@@ -805,6 +807,55 @@ std::string stage_text() {
     return s;
 }
 
+#if !defined(_WIN32)
+// #605: whether `path` is on a rotational disk (1), not (0) or unknown (-1), from sysfs; `dev` is the disk's name
+int on_rotational_disk(const std::string& path, std::string& dev) {
+    struct stat st{};
+    if (::stat(path.c_str(), &st) != 0) return -1;
+    char sys[64];
+    std::snprintf(sys, sizeof sys, "/sys/dev/block/%u:%u", (unsigned) major(st.st_dev), (unsigned) minor(st.st_dev));
+    std::error_code ec;
+    std::filesystem::path p = std::filesystem::canonical(sys, ec);
+    for (int up = 0; !ec && up < 2; ++up, p = p.parent_path()) {   // a partition has its disk's queue
+        std::ifstream q(p / "queue" / "rotational");
+        int r = -1;
+        if (q >> r) {
+            dev = p.filename().string();
+            return r;
+        }
+    }
+    return -1;
+}
+
+// #605: the engine's threads in uninterruptible sleep (state D - almost always waiting for the disk), and where
+// (wchan): 16 threads in blk_io_schedule is a disk that cannot keep up, not a deadlock in the engine
+void disk_wait_threads(std::FILE* f) {
+    std::map<std::string, int> where;
+    int waiting = 0, threads = 0;
+    std::error_code ec;
+    for (const auto& e : std::filesystem::directory_iterator("/proc/self/task", ec)) {
+        ++threads;
+        std::ifstream st(e.path() / "stat");
+        std::string line;
+        std::getline(st, line);
+        const size_t rp = line.rfind(')');
+        if (rp == std::string::npos || rp + 2 >= line.size() || line[rp + 2] != 'D') continue;
+        ++waiting;
+        std::ifstream w(e.path() / "wchan");
+        std::string wc;
+        std::getline(w, wc);
+        ++where[wc.empty() || wc == "0" ? "?" : wc];
+    }
+    if (threads == 0) return;
+    std::string list;
+    for (const auto& [name, n] : where) list += (list.empty() ? " (" : ", ") + name + " x" + std::to_string(n);
+    if (!list.empty()) list += ")";
+    std::fprintf(f, "  threads waiting on the disk (state D): %d of %d%s%s\n", waiting, threads, list.c_str(),
+                 waiting > 0 ? " - the engine is waiting for the drive: a rotational or failing disk with --ple-io "
+                               "direct (#605: --ple-io ram), or a drive too slow for the reads asked of it" : "");
+}
+#endif
+
 void stall_report(std::FILE* f, uint64_t layers_during) {
     strata::core::Progress& p = strata::core::progress();
     std::fprintf(f, "strata serve: stall report (engine %s): stage \"%s\" for %lld s; %llu layers served since the "
@@ -818,6 +869,9 @@ void stall_report(std::FILE* f, uint64_t layers_during) {
         }
         if (auto fn = strata::core::diag_pool_fn().load()) fn(f);
         if (auto fn = strata::core::diag_verify_fn().load()) fn(f);
+#if !defined(_WIN32)
+        disk_wait_threads(f);
+#endif
         const MemSample m = mem_sample();
         std::fprintf(f, "  memory: %llu MiB resident, %llu MiB %s, %llu MiB RAM available; %llu %s\n", m.rss_mib,
                      m.commit_mib,
@@ -2172,6 +2226,18 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+#if !defined(_WIN32)
+        if (pio.mode == strata::kernels::PleIo::Direct) {
+            // #605: --ple-io direct's random reads (up to --ple-inflight at once) are for SSDs; a rotational disk
+            // can take longer than the stall watchdog's 60 s for one prompt chunk's rows.  Recommended, not forced.
+            std::string dev;
+            if (!under_wddm() && on_rotational_disk(o.ple_gguf, dev) == 1)   // (WSL's virtual disk says rotational)
+                std::fprintf(stderr, "strata generate: WARNING: the n-gram table (%s) is on a rotational disk (%s): "
+                                     "--ple-io direct reads it at random and can stall a prompt for minutes (#605). "
+                                     "--ple-io ram (it then needs RAM for the table) or the model on an SSD is "
+                                     "recommended\n", o.ple_gguf.c_str(), dev.c_str());
+        }
+#endif
         if (pio.lock)
             std::fprintf(stderr, "strata generate: PLE table %s (--ple-io ram) in %.1f s\n",
                          ple_table.locked() ? "locked in RAM" : "loaded (not locked)",
diff --git a/tools/test_setup_choices.py b/tools/test_setup_choices.py
index c7736b34ad5..8f1fe81759b 100644
--- a/tools/test_setup_choices.py
+++ b/tools/test_setup_choices.py
@@ -267,6 +267,40 @@ def test_without_images_nothing_changes(self):
         self.assertNotIn("vision_src", meta)
 
 
+class RotationalDisk(unittest.TestCase):
+    """#605: a model on a rotational disk gets --ple-io ram when the n-gram table fits the RAM, else a warning."""
+
+    def install(self, ram, disk):
+        from test_setup_golden import PROFILES, install
+        _, found = PROFILES["64GB-1x32GB"]
+        return install(ram, found, ["--family", "qwen", "--model", "Q2_0", "--no-start"],
+                       extra=[mock.patch.object(setup, "rotational_disk", lambda p: disk)])
+
+    def test_fits(self):
+        code, out, cfg, _ = self.install(127.8, "sdb")
+        self.assertEqual(code, 0, out)
+        a = cfg["args"]
+        self.assertEqual(a[a.index("--ple-io") + 1], "ram")
+        self.assertIn("rotational disk (sdb)", out)
+
+    def test_does_not_fit(self):
+        code, out, cfg, _ = self.install(63.7, "sdb")
+        self.assertEqual(code, 0, out)
+        self.assertNotIn("--ple-io", cfg["args"])
+        self.assertIn("An SSD is recommended", out)
+
+    def test_ssd(self):
+        code, out, cfg, _ = self.install(127.8, None)
+        self.assertNotIn("--ple-io", cfg["args"])
+        self.assertNotIn("rotational", out)
+
+    def test_sysfs(self):
+        if not sys.platform.startswith("linux"):
+            self.assertIsNone(setup.rotational_disk(__file__))   # Windows: never
+            return
+        self.assertIn(setup.rotational_disk(__file__), (None,) + tuple(os.listdir("/sys/block")))
+
+
 class VramReserve(unittest.TestCase):
     """#493: --vram-reserve-mib N - VRAM the engine leaves free for other programs - goes into the config only when
     given (the default config is tools/test_setup_golden.py's, unchanged), at setup and on a start."""
diff --git a/tools/test_setup_golden.py b/tools/test_setup_golden.py
index 054c1c14efe..136b156da8d 100644
--- a/tools/test_setup_golden.py
+++ b/tools/test_setup_golden.py
@@ -102,6 +102,7 @@ def fake_download(url, dst, what=None):
             mock.patch.object(setup, "cpu_info", lambda: ("Test CPU", True, avx512)),
             mock.patch.object(setup, "page_file_gb", lambda: 16.0),
             mock.patch.object(setup, "is_wsl", lambda: False),
+            mock.patch.object(setup, "rotational_disk", lambda p: None),   # #605: the test PC's own disk
             mock.patch.object(setup, "free_gb", lambda p: 900.0),
             mock.patch.object(setup, "pip_install", lambda *a, **k: None),
             mock.patch.object(setup, "get_llama_cpp", lambda: t / "llama.cpp"),

From e1e3aa9ab374bc3b6e9ed0671c1066f05a9c31be Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:24:06 +0200
Subject: [PATCH 089/201] docs: AMD_HIP.md - a calibration run by hand on Linux
 HIP is kept for its card (#566)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/AMD_HIP.md | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/docs/AMD_HIP.md b/docs/AMD_HIP.md
index e2b63fc9bf5..f77328357f7 100644
--- a/docs/AMD_HIP.md
+++ b/docs/AMD_HIP.md
@@ -46,7 +46,9 @@ the kernel's amdgpu driver (no ROCm install needed):
   architectures above; the engine is compiled for each of them (cards of two families, e.g. gfx1100 + gfx1201, need
   a system ROCm 7: AMD's wheels hold one family). A split pays only when no single card holds the model's experts
   (see RDNA4 below).
-- **Limits for now:** images only through the CPU encoder (`--vision cpu`, 0.1.32), no calibration. The Monitor
+- **Limits for now:** images only through the CPU encoder (`--vision cpu`, 0.1.32). Setup does not offer the tuning
+  (calibration) on AMD yet: its controls are being checked on HIP one at a time (#566). Since 0.1.39 a tuning run by
+  hand (`./setup.sh --calibrate`) is saved for the AMD card it ran on and reused when setup runs again. The Monitor
   shows the card's load, VRAM, temperature and power from Linux sysfs (0.1.32).
 
 The rest of setup is the same as on NVIDIA: the model download, the start script, the server.

From d533fe9f67b584b1e8cf9ef7f048f0e6bab3d5b8 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:24:31 +0200
Subject: [PATCH 090/201] The expert arena checks the host RAM before it is
 allocated; the RAM probe reads cgroup v1 too (#633)

The pinned expert arena (the default tier) was allocated without looking at the RAM: on Linux the anonymous mapping
succeeds whatever the host has, and a container whose memory limit is below the arena was killed by the OOM killer
part-way through the load, without a message.

- detail::host_available_memory: the file tier's probe (MemAvailable lowered to the tightest cgroup v2 limit's room),
  now with its files as parameters (tested on fake trees), cgroup v1's memory controller (memory.limit_in_bytes -
  memory.usage_in_bytes), and no cgroup line at all meaning MemAvailable alone (it was "cannot determine", which
  refused a --resident-budget-gib on a v1 host). It also returns the tightest hard limit itself.
- ArenaExpertSource::open, after the size check and before the allocation: a hard cgroup limit below the arena is
  refused with both numbers (a certain OOM kill); less RAM available than the arena is a warning with the numbers
  and what runs with less (--mmap-experts with --resident-budget-gib), and the load goes on. Not for a shared arena.
- file_expert_source_test: v2 limit / max / malformed / missing, v1 limit / unlimited / not mounted, no cgroup.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/core/expert_source.hpp  |  19 +++++
 src/core/expert_source.cpp             | 110 +++++++++++++++++++++----
 src/program/generate.cpp               |   2 +
 tests/core/file_expert_source_test.cpp |  51 ++++++++++++
 4 files changed, 166 insertions(+), 16 deletions(-)

diff --git a/include/strata/core/expert_source.hpp b/include/strata/core/expert_source.hpp
index 3fe753f236d..0872f49a2fc 100644
--- a/include/strata/core/expert_source.hpp
+++ b/include/strata/core/expert_source.hpp
@@ -65,6 +65,22 @@ struct CgroupMemoryStat {
 /// Returns false when the required memory.stat counters were unavailable.
 bool cgroup_available_bytes(uint64_t limit, const CgroupMemoryStat& stat, uint64_t& bytes);
 
+/// #633: the RAM this process can get.  `available`: MemAvailable (Windows: the available physical memory), lowered
+/// to the room under the tightest cgroup limit; `cgroup_limit`: that tightest limit itself (v2 memory.max of the group
+/// and its ancestors, or v1 memory.limit_in_bytes), ~0 when there is none - what a container can never exceed.
+struct HostMemory {
+    uint64_t available = 0;
+    uint64_t cgroup_limit = ~uint64_t{0};
+};
+
+/// Linux reads `meminfo`, `self_cgroup` and the cgroup tree under `cgroup_root` (the parameters are for tests; the
+/// defaults are the real files).  cgroup v2 as before (an unreadable limit of a group that has one fails); cgroup v1's
+/// memory controller (`<root>/memory/<path>`: memory.limit_in_bytes - memory.usage_in_bytes); no cgroup line at all is
+/// MemAvailable alone.  False when the RAM cannot be determined.
+bool host_available_memory(HostMemory& m, const std::string& meminfo = "/proc/meminfo",
+                           const std::string& self_cgroup = "/proc/self/cgroup",
+                           const std::string& cgroup_root = "/sys/fs/cgroup");
+
 /// Build compact offsets for experts absent from both the primary GPU cache and an optional second GPU tier.
 /// Kept CPU-only so selection and byte accounting can be tested without initializing a GPU.
 bool make_cache_complement_plan(
@@ -652,6 +668,8 @@ class ArenaExpertSource : public ExpertSource {
     /// What backing was obtained and why, for the startup print.  "The engine adapts to the machine it is on" is
     /// only true if the engine says what it got.
     const std::string& note() const { return note_; }
+    /// #633: set by `open` when the RAM available is less than the arena needs (a recommendation; it still loads)
+    const std::string& ram_warning() const { return ram_warning_; }
     double load_gib_per_second() const { return gib_per_s_; }
     // Loader fix: the load, split.  `load_seconds()` is the wall clock of the load loop; the other two are
     // sums over the reader threads (see LoadStats), so on their own they say how much of that wall was spent
@@ -669,6 +687,7 @@ class ArenaExpertSource : public ExpertSource {
     int64_t n_expert_ = 0;
     int64_t reads_ = 0;
     std::string note_;
+    std::string ram_warning_;
     double gib_per_s_ = 0.0;
     double load_seconds_ = 0.0;
     double load_read_s_ = 0.0;
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index bb3badfcc9c..ee759515b33 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -217,18 +217,25 @@ bool read_cgroup_memory_stat(const std::filesystem::path& path, uint64_t current
 }
 #endif
 
-bool available_memory_bytes(uint64_t& bytes) {
+}  // namespace
+
+namespace detail {
+
+bool host_available_memory(HostMemory& m, const std::string& meminfo, const std::string& self_cgroup,
+                           const std::string& cgroup_root) {
+    m = HostMemory{};
 #if defined(_WIN32)
+    (void) meminfo; (void) self_cgroup; (void) cgroup_root;
     MEMORYSTATUSEX status{};
     status.dwLength = sizeof(status);
     if (!GlobalMemoryStatusEx(&status)) return false;
-    bytes = (uint64_t) status.ullAvailPhys;
-    return bytes > 0;
+    m.available = (uint64_t) status.ullAvailPhys;
+    return m.available > 0;
 #elif defined(__linux__)
     // MemAvailable includes reclaimable page cache, unlike _SC_AVPHYS_PAGES.
-    std::ifstream info("/proc/meminfo");
+    std::ifstream info(meminfo);
     std::string line;
-    bytes = 0;
+    uint64_t bytes = 0;
     while (std::getline(info, line)) {
         std::istringstream fields(line);
         std::string key, unit;
@@ -237,17 +244,26 @@ bool available_memory_bytes(uint64_t& bytes) {
             value <= std::numeric_limits<uint64_t>::max() / 1024) bytes = value * 1024;
     }
     if (bytes == 0) return false;
-    // Account for the tightest cgroup-v2 ancestor limit when its normal mount is visible.
+    // Account for the tightest cgroup ancestor limit when its normal mount is visible.
     // This is a point-in-time guard, not a reservation against concurrent allocations.
-    std::ifstream groups("/proc/self/cgroup");
+    std::ifstream groups(self_cgroup);
     if (!groups) return false;
-    bool resolved_v2 = false;
+    const std::filesystem::path root(cgroup_root);
+    bool v2 = false;
+    std::string v1_path;   // the memory controller's group (cgroup v1), when there is no v2 line
     while (std::getline(groups, line)) {
-        if (line.rfind("0::/", 0) != 0) continue;
-        const std::filesystem::path root("/sys/fs/cgroup");
+        if (line.rfind("0::/", 0) != 0) {
+            // v1: "N:controller[,controller]:/path"
+            const size_t c1 = line.find(':'), c2 = c1 == std::string::npos ? c1 : line.find(':', c1 + 1);
+            if (c2 == std::string::npos) continue;
+            std::istringstream ctl(line.substr(c1 + 1, c2 - c1 - 1));
+            for (std::string c; std::getline(ctl, c, ',');)
+                if (c == "memory") v1_path = line.substr(c2 + 1);
+            continue;
+        }
         auto path = (root / line.substr(4)).lexically_normal();
         if (path.string().rfind(root.string(), 0) != 0 || !std::filesystem::is_directory(path)) return false;
-        resolved_v2 = true;
+        v2 = true;
         while (path.string().rfind(root.string(), 0) == 0) {
             std::ifstream limit_file(path / "memory.max"), current_file(path / "memory.current");
             std::string limit;
@@ -261,28 +277,59 @@ bool available_memory_bytes(uint64_t& bytes) {
                     size_t consumed = 0;
                     const uint64_t cap = std::stoull(limit, &consumed);
                     if (consumed != limit.size()) return false;
-                    detail::CgroupMemoryStat stat;
+                    CgroupMemoryStat stat;
                     if (!read_cgroup_memory_stat(path, current, stat)) return false;
                     uint64_t cgroup_available = 0;
-                    if (!detail::cgroup_available_bytes(cap, stat, cgroup_available)) return false;
+                    if (!cgroup_available_bytes(cap, stat, cgroup_available)) return false;
                     bytes = std::min(bytes, cgroup_available);
+                    m.cgroup_limit = std::min(m.cgroup_limit, cap);
                 } catch (...) { return false; }
             }
             if (path == root) break;
             path = path.parent_path();
         }
     }
-    return resolved_v2;
+    if (!v2 && !v1_path.empty()) {
+        // #633: cgroup v1 (older Docker hosts, RHEL 7/8): the memory controller's group and its ancestors.  An
+        // unlimited group says a number near 2^63 (rounded to its page size); a group whose files are not
+        // visible (no mount in this namespace) is skipped - MemAvailable alone, as with no cgroup at all.
+        const std::filesystem::path mroot = root / "memory";
+        auto path = (mroot / v1_path.substr(v1_path.rfind('/', 0) == 0 ? 1 : 0)).lexically_normal();
+        while (path.string().rfind(mroot.string(), 0) == 0) {
+            std::ifstream limit_file(path / "memory.limit_in_bytes"), usage_file(path / "memory.usage_in_bytes");
+            uint64_t cap = 0, usage = 0;
+            if (limit_file >> cap && usage_file >> usage && cap < (1ull << 62)) {
+                bytes = std::min(bytes, usage < cap ? cap - usage : 0);
+                m.cgroup_limit = std::min(m.cgroup_limit, cap);
+            }
+            if (path == mroot) break;
+            path = path.parent_path();
+        }
+    }
+    m.available = bytes;
+    return true;
 #else
+    (void) meminfo; (void) self_cgroup; (void) cgroup_root;
     const long pages = sysconf(_SC_AVPHYS_PAGES);
     const long page_bytes = sysconf(_SC_PAGESIZE);
     if (pages <= 0 || page_bytes <= 0 ||
         (uint64_t) pages > std::numeric_limits<uint64_t>::max() / (uint64_t) page_bytes) return false;
-    bytes = (uint64_t) pages * (uint64_t) page_bytes;
-    return bytes > 0;
+    m.available = (uint64_t) pages * (uint64_t) page_bytes;
+    return m.available > 0;
 #endif
 }
 
+}  // namespace detail
+
+namespace {
+
+bool available_memory_bytes(uint64_t& bytes) {
+    detail::HostMemory m;
+    if (!detail::host_available_memory(m)) return false;
+    bytes = m.available;
+    return bytes > 0;
+}
+
 }  // namespace
 
 // ================================ THE FILE-BACKED SOURCE ================================
@@ -2633,6 +2680,37 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
         }
     }
 
+    // #633: THE RAM BEFORE THE ALLOCATION.  On Linux the arena is an anonymous mapping that succeeds whatever the host
+    // has; its pages are committed as the load writes them, so a container whose memory limit is below the arena was
+    // killed by the OOM killer part-way through the load, without a message.  A hard cgroup limit below it is
+    // certain to end that way: refused, with the numbers.  Less RAM available than the arena (another program, an
+    // engine still exiting) is only a warning - the OS may make room - per the recommend-not-force rule.
+    ram_warning_.clear();
+    // (a shared arena, --shared-expert-arena, may already be in RAM for another engine: not checked)
+    if (detail::HostMemory hm; shared_arena_file.empty() && detail::host_available_memory(hm)) {
+        const uint64_t need = want + (uint64_t) blob;
+        const double gib = 1073741824.0;
+        char buf[512];
+        if (hm.cgroup_limit < need) {
+            std::snprintf(buf, sizeof buf,
+                          "ArenaExpertSource: the expert arena needs %.2f GiB of RAM but this process's memory limit "
+                          "(cgroup memory.max / memory.limit_in_bytes) is %.2f GiB: it would be killed while loading. "
+                          "Raise the container's limit, or run with less RAM: --mmap-experts with "
+                          "--resident-budget-gib N keeps only the hottest experts in RAM",
+                          (double) need / gib, (double) hm.cgroup_limit / gib);
+            err = buf;
+            return false;
+        }
+        if (hm.available < need) {
+            std::snprintf(buf, sizeof buf,
+                          "the expert arena needs %.2f GiB of RAM but %.2f GiB is available (%.2f GiB short): the load "
+                          "may swap or be stopped by the OS. Close other programs (or wait for an engine that is "
+                          "still exiting), or run with less RAM: --mmap-experts with --resident-budget-gib N",
+                          (double) need / gib, (double) hm.available / gib, (double) (need - hm.available) / gib);
+            ram_warning_ = buf;
+        }
+    }
+
     uint64_t pack_hash = 0;
     if (!shared_arena_file.empty() &&
         !shared_arena_pack_hash(pack_dir, path, gguf_, lay, pack_hash, err)) return false;
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 593825410b1..e71a3e8db88 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2893,6 +2893,8 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+        if (!arena_src.ram_warning().empty())   // #633: said before the load's numbers, which it explains
+            std::fprintf(stderr, "strata generate: WARNING: %s\n", arena_src.ram_warning().c_str());
         std::fprintf(stderr, "strata generate: expert arena: %s\n", arena_src.note().c_str());
         std::fprintf(stderr, "strata generate: loaded %.2f GiB at %.2f GiB/s\n",
                      (double) strata::kernels::cpu::expert_layout().total / (1024.0 * 1024 * 1024),
diff --git a/tests/core/file_expert_source_test.cpp b/tests/core/file_expert_source_test.cpp
index e86acc1649f..104507d1352 100644
--- a/tests/core/file_expert_source_test.cpp
+++ b/tests/core/file_expert_source_test.cpp
@@ -288,6 +288,56 @@ void test_cgroup_memory_budget() {
             "missing memory.stat counters did not fail closed");
 }
 
+// #633: the host RAM probe with fake /proc and cgroup trees: v2 (a limit, "max", a missing or malformed limit), v1
+// (a limit, unlimited), and no cgroup line at all.  Elsewhere than Linux it reads the machine's RAM.
+void test_host_memory() {
+    using namespace strata::core::detail;
+    constexpr uint64_t GiB = 1ull << 30;
+    HostMemory m;
+#if defined(__linux__)
+    TempDirectory t;
+    auto put = [&](const fs::path& rel, const std::string& text) {
+        fs::create_directories((t.path / rel).parent_path());
+        std::ofstream(t.path / rel) << text;
+    };
+    put("meminfo", "MemTotal: 134217728 kB\nMemAvailable: 104857600 kB\n");   // 100 GiB available
+    const std::string mi = (t.path / "meminfo").string(), cg = (t.path / "cgroup").string(),
+                      root = (t.path / "fs").string();
+    auto probe = [&](const std::string& self) {
+        put("cgroup", self);
+        return host_available_memory(m, mi, cg, root);
+    };
+    // no cgroup line at all: MemAvailable alone (before #633: "cannot determine")
+    require(probe("") && m.available == 100 * GiB && m.cgroup_limit == ~0ull, "no cgroup: MemAvailable alone");
+    // v2, a 48 GiB limit with 16 GiB charged, 4 GiB of it clean cache
+    put("fs/cgroup.controllers", "memory\n");
+    put("fs/box/memory.max", std::to_string(48 * GiB) + "\n");
+    put("fs/box/memory.current", std::to_string(16 * GiB) + "\n");
+    put("fs/box/memory.stat", "inactive_file " + std::to_string(4 * GiB) + "\nfile_dirty 0\nfile_writeback 0\n");
+    require(probe("0::/box\n") && m.available == 36 * GiB && m.cgroup_limit == 48 * GiB, "v2 limit");
+    put("fs/box/memory.max", "max\n");
+    require(probe("0::/box\n") && m.available == 100 * GiB && m.cgroup_limit == ~0ull, "v2 max");
+    put("fs/box/memory.max", "48G\n");
+    require(!probe("0::/box\n"), "v2 malformed limit accepted");
+    fs::remove(t.path / "fs/box/memory.max");
+    require(!probe("0::/box\n"), "v2 group without memory.max accepted");
+    // v1: the memory controller's group (a hybrid line list), a 32 GiB limit with 10 GiB used
+    put("fs/memory/docker/abc/memory.limit_in_bytes", std::to_string(32 * GiB) + "\n");
+    put("fs/memory/docker/abc/memory.usage_in_bytes", std::to_string(10 * GiB) + "\n");
+    put("fs/memory/memory.limit_in_bytes", "9223372036854771712\n");   // the root: unlimited
+    put("fs/memory/memory.usage_in_bytes", std::to_string(50 * GiB) + "\n");
+    require(probe("12:cpu,cpuacct:/docker/abc\n4:memory:/docker/abc\n1:name=systemd:/docker/abc\n") &&
+            m.available == 22 * GiB && m.cgroup_limit == 32 * GiB, "v1 limit");
+    put("fs/memory/docker/abc/memory.limit_in_bytes", "9223372036854771712\n");
+    require(probe("4:memory:/docker/abc\n") && m.available == 100 * GiB && m.cgroup_limit == ~0ull, "v1 unlimited");
+    // a v1 group not visible here (another namespace): MemAvailable alone
+    require(probe("4:memory:/elsewhere\n") && m.available == 100 * GiB, "v1 group not mounted");
+#else
+    require(host_available_memory(m) && m.available > 0 && m.cgroup_limit == ~0ull, "this PC's RAM");
+    (void) GiB;
+#endif
+}
+
 }  // namespace
 
 int main() {
@@ -296,6 +346,7 @@ int main() {
         test_resident_lend_region();
         test_resident_exchange();
         test_cgroup_memory_budget();
+        test_host_memory();
         test_canonical_layout();
 #if defined(STRATA_NATIVE_EXPERTS)
         test_native_variable_layout();

From bb7c91b358970520e8d03f4ba913aea24d3a19a8 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:25:30 +0200
Subject: [PATCH 091/201] setup: STRATA_NVCC picks the CUDA toolkit; CUDA_HOME
 is looked at; glibc 2.43 + CUDA 12.9 and gcc 15 documented (#601)

find_nvcc takes the newest toolkit it finds, so with CUDA 12.8 and 12.9 installed, 12.9 was always used - and 12.9's
math headers do not compile with glibc 2.43 (Ubuntu 26.04). STRATA_NVCC=<nvcc> is now the only one considered (a
warning when the file is missing, or when it is too new for the Pascal/Volta build). CUDA_HOME is a candidate like
CUDA_PATH. TROUBLESHOOTING.md: the two build errors and what to do (g++-14 for gcc > 14; CUDA 12.8 or 13.x for glibc
2.43). Without STRATA_NVCC nothing changes.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/TROUBLESHOOTING.md     |  8 ++++++++
 setup.py                    | 21 ++++++++++++++++++---
 tools/test_setup_choices.py | 17 +++++++++++++++++
 3 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/docs/TROUBLESHOOTING.md b/docs/TROUBLESHOOTING.md
index 2d040b09dba..7287409e45b 100644
--- a/docs/TROUBLESHOOTING.md
+++ b/docs/TROUBLESHOOTING.md
@@ -25,6 +25,14 @@ Strata is already running. Look for its window. Or another program uses the port
 **Python or the build tools could not be installed.**
 Install what it names (links are printed), then run it again. Everything already done is kept.
 
+**Linux: the engine does not compile (`unsupported GNU version`, or `exception specification is incompatible` for
+`cospi`/`sinpi`/`rsqrt`).** Two known mismatches between the CUDA toolkit and a new Linux (#601):
+- gcc newer than 14 (Ubuntu 26.04's default 15): CUDA 12.x and 13.0 refuse it. Install g++-14 and run
+  `CXX=g++-14 CUDAHOSTCXX=g++-14 ./setup.sh`.
+- glibc 2.43 with CUDA 12.9: the toolkit's math headers clash with glibc's, already in CMake's first test compile.
+  Use CUDA 12.8 or 13.x instead. Setup takes the newest toolkit it finds; `STRATA_NVCC=/usr/local/cuda-12.8/bin/nvcc
+  ./setup.sh` makes it use that one (only that one).
+
 **The first start takes minutes.**
 It is reading 34-55 GB into RAM; the second start is faster while the files are in the OS cache. Started from Task
 Scheduler, it can be 24x slower: see [Running it at startup](DETAILS.md#running-it-at-startup-task-scheduler).
diff --git a/setup.py b/setup.py
index d4651fbf3d8..cb14ac01aad 100644
--- a/setup.py
+++ b/setup.py
@@ -700,10 +700,25 @@ def gpu_info(pick=None):
 
 
 def find_nvcc(below=None):
-    """The newest CUDA toolkit's nvcc and its (major, minor); with `below`, the newest older than that version."""
+    """The newest CUDA toolkit's nvcc and its (major, minor); with `below`, the newest older than that version.
+    #601: STRATA_NVCC=<path to nvcc> is the only one considered (a newer toolkit beside it that cannot build on this
+    PC - CUDA 12.9 with glibc 2.43 - is not taken instead)."""
+    pick = os.environ.get("STRATA_NVCC")
+    if pick:
+        if not Path(pick).exists():
+            warn(f"STRATA_NVCC={pick}: no such file; looking for a CUDA toolkit as usual")
+        else:
+            v = re.search(r"release (\d+)\.(\d+)", out([pick, "--version"]))
+            ver = (int(v.group(1)), int(v.group(2))) if v else None
+            if ver and below is not None and ver >= below:
+                warn(f"STRATA_NVCC={pick} is CUDA {ver[0]}.{ver[1]}; this build needs one older than "
+                     f"{below[0]}.{below[1]}")
+                return (None, None)
+            return (pick, ver) if ver else (None, None)
     cands = [shutil.which("nvcc")]
-    if os.environ.get("CUDA_PATH"):
-        cands.append(str(Path(os.environ["CUDA_PATH"]) / "bin" / ("nvcc.exe" if WIN else "nvcc")))
+    for var in ("CUDA_PATH", "CUDA_HOME"):           # CUDA_HOME: Linux's usual name (#601)
+        if os.environ.get(var):
+            cands.append(str(Path(os.environ[var]) / "bin" / ("nvcc.exe" if WIN else "nvcc")))
     if WIN:
         base = Path(r"C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA")
         if base.exists():
diff --git a/tools/test_setup_choices.py b/tools/test_setup_choices.py
index 8f1fe81759b..c55d1b20676 100644
--- a/tools/test_setup_choices.py
+++ b/tools/test_setup_choices.py
@@ -189,6 +189,23 @@ def test_find_nvcc_below(self):
                     mock.patch.object(setup, "out", lambda cmd: versions.get(cmd[0], "")):  # #414
                 self.assertEqual(setup.find_nvcc(), (str(new), (13, 0)))
                 self.assertEqual(setup.find_nvcc(below=(13, 0)), (str(old), (12, 9)))
+                # #601: STRATA_NVCC is the only one considered; CUDA_HOME is a candidate like CUDA_PATH
+                with mock.patch.dict(os.environ, {"STRATA_NVCC": str(old)}):
+                    self.assertEqual(setup.find_nvcc(), (str(old), (12, 9)))
+                with mock.patch.dict(os.environ, {"STRATA_NVCC": str(new)}):
+                    got, text = quiet(setup.find_nvcc, below=(13, 0))
+                    self.assertEqual(got, (None, None))
+                    self.assertIn("needs one older than 13.0", text)
+                with mock.patch.dict(os.environ, {"STRATA_NVCC": str(Path(d) / "missing")}):
+                    got, text = quiet(setup.find_nvcc)
+                    self.assertEqual(got, (str(new), (13, 0)))
+                    self.assertIn("no such file", text)
+            with mock.patch.object(setup, "WIN", False), mock.patch.object(setup.shutil, "which", lambda n: None), \
+                    mock.patch.dict(os.environ, {"CUDA_HOME": str(Path(d) / "12")}), \
+                    mock.patch.object(setup, "out", lambda cmd: versions.get(cmd[0], "")):
+                os.environ.pop("CUDA_PATH", None)
+                got = setup.find_nvcc(below=(13, 0))
+                self.assertEqual(got, (str(old), (12, 9)))
 
     def tools(self, archs, nvcc):
         seen = []

From 12c099b3e4d8af3160b28b1a582c773d25ec30ac Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:25:56 +0200
Subject: [PATCH 092/201] layer split trim: on by default in the HIP builds,
 opt-in on CUDA (PR #639 follow-up)

The trim was measured on 2x MI50 (gfx906) only; nobody has run it on NVIDIA multi-GPU, where CUDA-only paths could
still read another stage's dense weights on a card that no longer holds them. The HIP builds trim with explicit split
points as the PR does (STRATA_STAGE_TRIM=0 keeps the full copies); the CUDA build keeps the full copies unless
STRATA_STAGE_TRIM=1. --layer-split auto and one GPU are unchanged everywhere.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a890965f66f..083f5216586 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2059,10 +2059,19 @@ int main(int argc, char** argv) {
     }
     // Layer split with explicit split points: every GPU holds only the dense weights of ITS layers (the PLE tensors
     // stay everywhere).  Without this each card keeps a full copy (~3.4 GB for the Coder) that its stage never
-    // reads - VRAM the expert cache wants.  STRATA_STAGE_TRIM=0 keeps the full copies.
+    // reads - VRAM the expert cache wants.  On by default in the AMD (HIP) builds, where it was measured (PR #639,
+    // 2x MI50); STRATA_STAGE_TRIM=0 keeps the full copies there.  The CUDA build keeps the full copies unless
+    // STRATA_STAGE_TRIM=1, until it has run on NVIDIA cards.
     const std::set<std::string> skip_base = skip;
-    const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() &&
-                            !(std::getenv("STRATA_STAGE_TRIM") && std::string(std::getenv("STRATA_STAGE_TRIM")) == "0");
+    const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() && [] {
+        const char* v = std::getenv("STRATA_STAGE_TRIM");
+        if (v != nullptr && v[0] != 0) return std::string(v) != "0";
+#if defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)
+        return true;
+#else
+        return false;
+#endif
+    }();
     // keep_routers: CUDA0 with --mmap-experts keeps every layer's router (ffn_gate_inp, ~2.5 MiB a layer) - the file
     // tier's routing-aware prefetch (RouterLookahead, below) copies all of them from CUDA0's arena, and would
     // otherwise turn itself off

From 0f8cbeb36a194c66626b56b84a84f1fe7fa104b9 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:25:56 +0200
Subject: [PATCH 093/201] STRATA_ARENA_MMAP: write experts.bin only when the
 drive has room (PR #640 follow-up)

The first mapped start writes the whole arena (25 GB for the Coder) next to the pack. A drive without that much free
space filled up before the write failed. Now the start checks the free space first (the arena plus 2 GiB to spare);
without it, it says so and keeps the arena in RAM for this start. Linux opt-in only; nothing changes without the env.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/core/expert_source.cpp | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index b68779e56fd..83a0618681a 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2677,7 +2677,17 @@ bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int6
         err = "ArenaExpertSource: the load read " + std::to_string(st.bytes) + " B of " + std::to_string(want);
         return false;
     }
-    if (arena_mmap && from_gguf) {   // the first start: write experts.bin for the mapped starts after this one
+    // the first start: write experts.bin for the mapped starts after this one - only when the drive has room for it
+    // and 2 GiB more (a full drive fails other writes too); otherwise this start says so and runs pinned as before
+    std::error_code space_ec;
+    const uint64_t free_disk = arena_mmap && from_gguf ? (uint64_t) std::filesystem::space(
+        std::filesystem::path(path).parent_path(), space_ec).available : 0;
+    const bool room = !space_ec && free_disk >= want + (uint64_t) blob + (2ull << 30);
+    if (arena_mmap && from_gguf && !room)
+        std::fprintf(stderr, "strata generate: STRATA_ARENA_MMAP: NOT writing %s - %.1f GiB free on that drive, it needs "
+                             "%.1f GiB plus 2 GiB to spare; this start keeps the arena in RAM\n", path.c_str(),
+                     (double) free_disk / 1073741824.0, (double) (want + (uint64_t) blob) / 1073741824.0);
+    if (arena_mmap && from_gguf && room) {
         const std::string tmp = path + ".tmp";
         std::FILE* f = std::fopen(tmp.c_str(), "wb");
         bool ok = f != nullptr && std::fwrite(a->data(), 1, (size_t) want, f) == (size_t) want;

From 61479a82b4f8d81fa9b9e0e97912624f89fed0c5 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:26:01 +0200
Subject: [PATCH 094/201] serve + engine: opt-in "effort_position": "end" keeps
 the cached conversation when the effort changes (#458)

The effort's instruction is the first thing the template renders, so a
request that only changes reasoning_effort (or turns thinking off) read
the whole prompt again. With "effort_position": "end" in the run config
the server renders every prompt's start as the default effort's and puts
a low/medium effort in a short system turn right before the answer
(thinking off: just the template's empty thinking block); the rendering
is template-agnostic (history + turn + the generation prompt).

Engine: --tail-role-token ID (default -1, off) moves the turn checkpoint
in front of such a trailing turn, so it holds the conversation and not the
effort text; INFO reports tail_role_token. The server passes the id of
"system" only when the engine binary knows the flag, and says so when it
does not. Without the key nothing changes: the same prompt ids, no flag.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md          |   8 +++
 serve/server.py          |  64 ++++++++++++++++++++++-
 serve/test_server.py     | 106 +++++++++++++++++++++++++++++++++++++++
 src/program/generate.cpp |  21 +++++++-
 4 files changed, 195 insertions(+), 4 deletions(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index aeef21da27a..2ea4641bca7 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -473,6 +473,14 @@ print(r.choices[0].message.content)
   part of the thinking the client sees and counts as output tokens. `"reasoning_budget_tokens": N` in
   `strata-<model>.json` sets it for every request; a request's own value wins, and `0` means no budget. Off by default;
   Anthropic's `"thinking": {"budget_tokens": N}` still only chooses the level, as above.
+- **Changing the effort without re-reading the prompt (opt-in, 0.1.39, #458).** The effort's instruction is the
+  first thing in the prompt, so a request that only changes the effort (an agent's "think harder" switch, `none` for
+  a quick tool step) reads the whole conversation again. `"effort_position": "end"` in `strata-<model>.json` renders
+  every request's prompt start as the default effort's and puts a `low` / `medium` effort in a short system turn
+  right before the answer (no thinking: the empty thinking block, as always); the engine (0.1.39+, which the server
+  checks) keeps its checkpoint in front of that turn, so the next request reuses the conversation whatever its
+  effort. The default (`"start"`) prompt is unchanged. The model sees a level that is not the default in another
+  place than it was trained with; how well it follows it there is not measured yet.
 - **Anthropic requests that don't ask for thinking (opt-in, 0.1.32, #278).** By default a `/v1/messages` request
   with no `"thinking"`, effort or budget thinks as the model's template does. `"anthropic_thinking": "on_request"` in
   `strata-<model>.json` renders such a request without thinking - Anthropic's own rule, and what Claude Code's short
diff --git a/serve/server.py b/serve/server.py
index 9ed8d7beb18..0c2c65b285d 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -58,6 +58,13 @@
 
 IM_END = "<|im_end|>"
 IMAGE_PAD = "<|image_pad|>"
+# #458: the trailing effort turn ("effort_position": "end"); low is the template's own sentence, medium (which the
+# template says nothing for: no xhigh sentence is medium there) says it, since the xhigh one stays at the top
+EFFORT_TURN = "<|im_start|>system\n{}<|im_end|>\n"
+EFFORT_TEXT = {"low": "Reasoning effort is set to low. Keep your thinking brief and focused, moving directly to the "
+                      "conclusion without unnecessary elaboration.",
+               "medium": "Reasoning effort is set to medium. Think as much as the task needs, without unnecessary "
+                         "elaboration."}
 VISION_START = "<|vision_start|>"
 # #123: what closes the thinking when it reaches reasoning_budget_tokens (the model's own end-of-thinking tag after it)
 REASONING_WRAP_UP = "\n\nI have thought about this long enough; time to give my answer.\n</think>\n\n"
@@ -778,6 +785,31 @@ def gpu_list(cfg: dict) -> list[int]:
     return [int(str(x).strip()) for x in items if str(x).strip() != ""]
 
 
+def effort_end_args(cfg: dict, exe: str, tok) -> list[str] | None:
+    """#458 (opt-in): the engine arguments for "effort_position": "end" - the id of "system" as --tail-role-token, so
+    the engine checkpoints in front of the trailing effort turn - or None when the config leaves it at the top (the
+    default) or the engine is too old for it (said once; the prompt stays the default one).  ValueError for a value
+    other than "start" / "end"."""
+    pos = cfg.get("effort_position", "start")
+    if pos not in ("start", "end"):
+        raise ValueError(f'"effort_position" must be "start" (the default) or "end", not {pos!r}')
+    if pos == "start":
+        return None
+    try:
+        with open(exe, "rb") as f:
+            known = b"--tail-role-token" in f.read()
+    except OSError:
+        known = False
+    role = tok.encode("system", parse_special=True)
+    if not known or len(role) != 1:
+        print("[strata] effort_position \"end\" needs engine 0.1.39 or newer (--tail-role-token): the reasoning "
+              "effort stays at the top of the prompt", flush=True)
+        return None
+    print("[strata] effort_position end: a request's non-default reasoning effort goes right before the answer, so "
+          "changing it keeps the cached conversation", flush=True)
+    return ["--tail-role-token", str(role[0])]
+
+
 def engine_silence_s(cfg: dict) -> float:
     """#481: the config's "engine_silence_s" - seconds an engine may print nothing during a request before the server
     ends it (default ENGINE_SILENCE_S; 0 = wait forever).  ValueError for anything but a number >= 0."""
@@ -958,6 +990,9 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         self.fifo = threading.Lock()
         self.embeddings = threading.local()           # the current request's image embeddings file (GENI)
         self.api_key = ""                              # when set, /v1/* needs it (Bearer or x-api-key)
+        # #458 (opt-in, the config's "effort_position": "end"): a non-default reasoning effort goes in a short system
+        # turn before the answer instead of the top of the prompt, so switching it keeps the cached conversation
+        self.effort_end = False
         # #321: browser pages of these origins may call /v1/* (CORS; "*" = any page - only with an api_key that
         # matters); empty = no CORS headers at all, as before
         self.cors_origins: list[str] = []
@@ -1337,11 +1372,29 @@ def scaled(v, unit, digits=0):
                 "ram": {"used_gib": scaled(hw.get("ram_used"), 2 ** 30, 1),
                         "total_gib": scaled(hw.get("ram_total"), 2 ** 30, 1)} if hw.get("ram_total") else None}}
 
+    def render_prompt(self, messages, tools, kwargs) -> str:
+        """The template rendered.  #458: with `effort_end`, a request with a non-default effort (low, medium or no
+        thinking) is rendered as a default one up to the answer - the same prompt start, so the conversation cache
+        keeps it - and its effort follows in a short system turn right before the answer (thinking off: the template's
+        empty thinking block).  The engine (--tail-role-token) checkpoints in front of that turn."""
+        effort = kwargs.get("reasoning_effort")
+        off = kwargs.get("enable_thinking") is False
+        if not self.effort_end or (not off and effort in (None, "", "xhigh", "high")):
+            return self.template.render(messages, tools=tools, **kwargs)
+        base = {k: v for k, v in kwargs.items() if k not in ("reasoning_effort", "enable_thinking")}
+        history = self.template.render(messages, tools=tools, add_generation_prompt=False, **base)
+        full = self.template.render(messages, tools=tools, add_generation_prompt=True, **kwargs)
+        mine = self.template.render(messages, tools=tools, add_generation_prompt=False, **kwargs)
+        if not full.startswith(mine):                  # a template this cannot take apart: rendered as asked
+            return full
+        tail = "" if off else EFFORT_TURN.format(EFFORT_TEXT.get(effort, EFFORT_TEXT["medium"]))
+        return history + tail + full[len(mine):]
+
     def encode_prompt(self, messages, tools, kwargs) -> list[int]:
         """The request's prompt: the template rendered and tokenized.  #537: a <think> / </think> written inside a
         message's text is encoded as the text it is, not as the model's reasoning markers (the template's own are)."""
         marked, marked_tools, changed = mark_think_literals(messages, tools)
-        prompt = self.template.render(marked, tools=marked_tools, **kwargs)
+        prompt = self.render_prompt(marked, marked_tools, kwargs)
         if not changed:
             return self.tok.encode(prompt, parse_special=True)
         prompt, plain = unmark_think_literals(prompt)
@@ -2933,7 +2986,12 @@ def main() -> int:
             silence = engine_silence_s(cfg)             # #481: checked before the (minutes-long) start
         except ValueError as e:
             raise SystemExit(f"[strata] config {e}")
-        engine = StrataEngine(exe, engine_args(cfg), cwd=cfg.get("cwd"), log=cfg.get("log"), env=env, lazy=lazy)
+        try:
+            effort_end = effort_end_args(cfg, exe, tok)  # #458
+        except ValueError as e:
+            raise SystemExit(f"[strata] config {e}")
+        engine = StrataEngine(exe, engine_args(cfg) + (effort_end or []), cwd=cfg.get("cwd"), log=cfg.get("log"),
+                              env=env, lazy=lazy)
         engine.silence_s = silence                      # an attribute of its own: restart() keeps it
         warn_tight_ram(engine.info.get("arena_mib"))
         note = desktop_vram_note(cfg.get("backend"), engine.info.get("vram_free_mib"), engine.spawn[1],
@@ -2941,6 +2999,7 @@ def main() -> int:
         if note:                                        # #560 #516: before --open starts a browser on that card
             print(note, flush=True)
     else:
+        effort_end = None
         engine, vision, sampling_defaults = MockEngine(tok, a.script or [
             "Thinking about it.</think>\n\nHello from the mock engine."]), None, {}
     # the model's own chat template (exported with its tokenizer), else the original model's
@@ -2988,6 +3047,7 @@ def main() -> int:
     if mode not in ("model", "on_request"):
         raise SystemExit(f"[strata] config anthropic_thinking must be \"model\" or \"on_request\", not {mode!r}")
     svc.anthropic_think_unasked = mode == "model"
+    svc.effort_end = bool(effort_end)                   # #458: "effort_position": "end" with an engine that has it
     if cfg.get("reasoning_budget_tokens") is not None:  # #123: a default thinking budget for every request
         try:
             svc.reasoning_budget_tokens = cfg["reasoning_budget_tokens"]
diff --git a/serve/test_server.py b/serve/test_server.py
index cb96d1f9db8..bf8a74a302e 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -319,6 +319,112 @@ def test_the_real_tokenizer_reads_the_tag_as_text(self):
         self.assertEqual(plain, [*b"say </think> now", 258])               # the tag as text, im_end still special
 
 
+class EffortAtTheEnd(unittest.TestCase):
+    """#458 (opt-in "effort_position": "end"): a non-default effort goes in a system turn right before the answer, so
+    a request that changes only the effort keeps the cached conversation.  The engine's checkpoint rule is simulated
+    on the token ids (src/program/generate.cpp: the last <|im_start|>, and with --tail-role-token the one in front
+    of a trailing system turn); the default prompt does not change."""
+
+    TURN = 256                                       # the byte tokenizer's <|im_start|>
+    ROLE = ord("s")                                  # "system"'s first byte stands for its token
+
+    def setUp(self):
+        self.tok = ByteTokenizer()
+        self.svc = Service(MockEngine(self.tok, "ok", max_context=1 << 20), self.tok,
+                           ChatTemplate(ROOT / "serve/chat_template.jinja"))
+
+    def ids(self, messages, end, **kw):
+        self.svc.effort_end = end
+        return self.svc.encode_prompt(messages, None, kw)
+
+    def checkpoint(self, ids, tail, resume=0):
+        """Where the engine checkpoints a prompt (the tokens before it), as generate.cpp's serve loop does."""
+        turn_at = next((i for i in range(len(ids) - 1, resume, -1) if ids[i] == self.TURN), -1)
+        if turn_at > 0 and tail:
+            i = next((i for i in range(turn_at - 1, resume, -1) if ids[i] == self.TURN), None)
+            if i is not None and ids[i + 1] == self.ROLE:
+                turn_at = i
+        return ids[:turn_at]
+
+    def session(self, requests, end, tail):
+        """The reused tokens of each request after the first: the longest earlier checkpoint it starts with."""
+        checks, reused = [], []
+        for messages, kw in requests:
+            ids = self.ids(messages, end, **kw)
+            reused.append(max([len(c) for c in checks if ids[:len(c)] == c], default=0))
+            checks.append(self.checkpoint(ids, tail))
+        return reused[1:]
+
+    CHAT = [{"role": "system", "content": "You are a careful assistant. " * 40},
+            {"role": "user", "content": "Explain the conversation cache. " * 20}]
+    REPLY = {"role": "assistant", "content": "It keeps the prompt's state. " * 20, "reasoning_content": "ok"}
+    NEXT = {"role": "user", "content": "And the checkpoints?"}
+
+    def test_the_default_prompt_is_unchanged(self):
+        for kw in ({}, {"reasoning_effort": "xhigh"}):
+            self.assertEqual(self.ids(self.CHAT, True, **kw), self.ids(self.CHAT, False, **kw))
+            self.assertEqual(self.ids(self.CHAT, True, **kw),
+                             self.tok.encode(self.svc.template.render(self.CHAT, **kw), parse_special=True))
+        for kw in ({"reasoning_effort": "low"}, {"reasoning_effort": "medium"}, {"enable_thinking": False}):
+            self.assertEqual(self.ids(self.CHAT, False, **kw),        # off: every effort renders as before
+                             self.tok.encode(self.svc.template.render(self.CHAT, **kw), parse_special=True))
+
+    def test_the_trailing_turn(self):
+        text = self.tok.decode(self.ids(self.CHAT, True, reasoning_effort="low"))
+        self.assertTrue(text.endswith("<|im_end|>\n<|im_start|>system\nReasoning effort is set to low. Keep your "
+                                      "thinking brief and focused, moving directly to the conclusion without "
+                                      "unnecessary elaboration.<|im_end|>\n<|im_start|>assistant\n<think>\n"), text[-300:])
+        self.assertIn("Reasoning effort is set to xhigh", text)          # the top stays the default's
+        text = self.tok.decode(self.ids(self.CHAT, True, enable_thinking=False))
+        self.assertTrue(text.endswith("<|im_start|>assistant\n<think>\n\n</think>\n\n"))
+        self.assertNotIn("<|im_start|>system\nReasoning effort", text[-200:])
+        default = self.ids(self.CHAT, True)
+        for kw in ({"reasoning_effort": "low"}, {"reasoning_effort": "medium"}, {"enable_thinking": False}):
+            ids = self.ids(self.CHAT, True, **kw)
+            head = len(self.checkpoint(default, False))                       # all before the answer's turn
+            self.assertEqual(ids[:head], default[:head], kw)                 # the same prompt up to the answer
+
+    def test_changing_the_effort_keeps_the_conversation(self):
+        efforts = [{}, {"reasoning_effort": "low"}, {"enable_thinking": False}, {"reasoning_effort": "medium"}, {}]
+        history = len(self.checkpoint(self.ids(self.CHAT, False), False))
+        # at the top (the default): another effort differs a few tokens in, and the whole prompt is read again
+        self.assertEqual(self.session([(self.CHAT, kw) for kw in efforts], False, False)[:2], [0, 0])
+        # at the end, with the engine's rule: every request reuses the whole conversation
+        self.assertEqual(self.session([(self.CHAT, kw) for kw in efforts], True, True), [history] * 4)
+
+    def test_the_next_turn_reuses_the_checkpoint(self):
+        turn1, turn2 = self.CHAT, self.CHAT + [self.REPLY, self.NEXT]
+        low = {"reasoning_effort": "low"}
+        first = len(self.checkpoint(self.ids(turn1, True, **low), True))
+        # the engine's rule: the next turn (the same effort) reuses the first turn's whole conversation
+        self.assertEqual(self.session([(turn1, low), (turn2, low)], True, True), [first])
+        # without it the checkpoint held the effort turn and the next turn reused nothing (what #458 measured)
+        self.assertEqual(self.session([(turn1, low), (turn2, low)], True, False), [0])
+
+    def test_the_config(self):
+        from serve.server import effort_end_args
+
+        class Tok:
+            def encode(self, text, parse_special=False):
+                return [8678] if text == "system" else [1, 2]
+
+        with tempfile.TemporaryDirectory() as d:
+            new, old = Path(d) / "new.exe", Path(d) / "old.exe"
+            new.write_bytes(b"...  --tail-role-token ID --serve: ...")
+            old.write_bytes(b"... --turn-token ID ...")
+            out = io.StringIO()
+            with contextlib.redirect_stdout(out):
+                self.assertIsNone(effort_end_args({}, str(new), Tok()))
+                self.assertIsNone(effort_end_args({"effort_position": "start"}, str(new), Tok()))
+                self.assertEqual(effort_end_args({"effort_position": "end"}, str(new), Tok()),
+                                 ["--tail-role-token", "8678"])
+                self.assertIsNone(effort_end_args({"effort_position": "end"}, str(old), Tok()))
+                self.assertIsNone(effort_end_args({"effort_position": "end"}, str(new), ByteTokenizer()))
+            self.assertIn("needs engine 0.1.39 or newer", out.getvalue())
+            with self.assertRaises(ValueError):
+                effort_end_args({"effort_position": "middle"}, str(new), Tok())
+
+
 class StatusNeedsTheKey(unittest.TestCase):
     """#212: /status shows the end of the answer being written, so it needs the key like /v1/*."""
 
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a7c77d0efff..4558100bf16 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -413,6 +413,11 @@ struct Options {
     /// --serve: the token that opens a chat turn (<|im_start|>).  The last one in a prompt is where the chat's
     /// history ends and the new assistant turn begins, which is the checkpoint the next request can reuse.
     int64_t turn_token = 248045;
+    /// --serve (#458, opt-in): the role token of a short turn the server puts right before the new assistant turn
+    /// (the "system" of a trailing reasoning-effort turn).  When the turn before the last <|im_start|> opens with it,
+    /// the checkpoint goes in front of that turn instead, so it holds the conversation and not the effort text.
+    /// -1 = off (the checkpoint at the last <|im_start|>, as before).
+    int64_t tail_role_token = -1;
     /// --serve: a text part of the prompt of at most N tokens (a chat message, the assistant header, a short tool
     /// result) goes through the verify windows, S tokens at a time, instead of the batched prompt path (0 = always
     /// the batched path)
@@ -517,6 +522,8 @@ void usage() {
                  "  --conversation-cache-min-free-mib N  --serve: physical RAM floor when parking (default 2560)\n"
                  "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
                  "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
+                 "  --tail-role-token ID --serve: a turn of this role right before the last turn is left out of\n"
+                 "                       the conversation checkpoint (a trailing effort turn; default -1 = off)\n"
                  "  --short-read N       --serve: read at most N fresh text tokens through the decode windows instead\n"
                  "                       of the batched prompt path (default 64, 0 = off)\n"
                  "  --suffix-draft N     prompt lookup: draft from an earlier repeat of the last N+ tokens of context\n"
@@ -1248,6 +1255,7 @@ int main(int argc, char** argv) {
         else if (a == "--prompt-cache-every") o.prompt_cache_every = std::max(0LL, std::atoll(next("--prompt-cache-every")));
         else if (a == "--prompt-cache-root") o.prompt_cache_root = std::max(0LL, std::atoll(next("--prompt-cache-root")));
         else if (a == "--turn-token") o.turn_token = std::atoll(next("--turn-token"));
+        else if (a == "--tail-role-token") o.tail_role_token = std::atoll(next("--tail-role-token"));
         else if (a == "--short-read") o.short_read = std::max(0LL, std::atoll(next("--short-read")));
         else if (a == "--suffix-draft") o.suffix_draft = std::max(0, std::atoi(next("--suffix-draft")));
         else if (a == "--mtp-max-t") o.mtp_max_t = std::max(0, std::atoi(next("--mtp-max-t")));
@@ -4986,7 +4994,7 @@ int main(int argc, char** argv) {
                         "expert_slots_primary=%lld expert_cache_primary_mib=%lld spec=%d "
                         "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
                         "spec_min_p=%.2f conversation_cache_mib=%lld conversation_cache_slots=%d "
-                        "conversation_cache_min_free_mib=%lld engine=" STRATA_VERSION "\n",
+                        "conversation_cache_min_free_mib=%lld tail_role_token=%lld engine=" STRATA_VERSION "\n",
                         (long long) o.max_context, o.kv.c_str(),
                         (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1
                                          ? ss.qsa_states[ss.qsa_primary()].n_slots * 4 : 0),
@@ -4997,7 +5005,7 @@ int main(int argc, char** argv) {
                         (long long) ((o.mmap_experts ? src.resident_bytes() : strata::kernels::cpu::expert_layout().total) >> 20),
                         pool.workers(), o.pcie_frac,
                         o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
-                        (long long) o.conversation_cache_min_free_mib);
+                        (long long) o.conversation_cache_min_free_mib, (long long) o.tail_role_token);
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
@@ -5597,6 +5605,15 @@ int main(int argc, char** argv) {
             if (o.prompt_cache > 0 && o.turn_token >= 0)
                 for (int64_t i = n - 1; i > resume; --i)
                     if (ids[(size_t) i] == o.turn_token) { turn_at = i; break; }
+            // #458 (opt-in): a short turn of --tail-role-token's role right before the new assistant turn (the
+            // server's trailing reasoning-effort turn) stays out of the checkpoint, so the next request - another
+            // effort, or the next turn of the chat - finds the conversation without it
+            if (turn_at > 0 && o.tail_role_token >= 0)
+                for (int64_t i = turn_at - 1; i > resume; --i)
+                    if (ids[(size_t) i] == o.turn_token) {
+                        if (ids[(size_t) i + 1] == o.tail_role_token) turn_at = i;
+                        break;
+                    }
             // A prompt read from token 0 also stops at its FIRST turn boundary: the end of the system prompt (with
             // the tools), which every new chat of the same client shares.  That checkpoint becomes the chain's root,
             // which the retention policy pins (conv_cache.hpp), so the next new chat reads only what comes after it.

From c129c4c4cabd3fb06c351e7126ad3789a968cb69 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:26:04 +0200
Subject: [PATCH 095/201] Windows Pascal/Volta source build: link the shared
 CUDA runtime only (#585)

CMake links CUDA code with cudart_static by default and the targets also link CUDA::cudart (cudart.lib); MSVC with
CUDA 12.x (the STRATA_EXPERIMENTAL_SM60 build for sm_60/sm_70) then fails with LNK1169. That build (MSVC +
STRATA_EXPERIMENTAL_SM60, no CMAKE_CUDA_RUNTIME_LIBRARY given) now sets CMAKE_CUDA_RUNTIME_LIBRARY Shared, the
reporter's verified fix. The ready-made engine and every other build are unchanged. INSTALL.md: where github.com
cannot be reached, third_party/llama.cpp at the pinned commit can be put there by hand.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt  | 7 +++++++
 docs/INSTALL.md | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ff8766b20d0..69dc025354f 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -69,6 +69,13 @@ if(STRATA_BUILD_CONVERSATION_TESTS)
 endif()
 
 if(STRATA_ENABLE_CUDA)
+  # #585: CMake links CUDA code with the STATIC runtime by default, and the targets below also link CUDA::cudart (the
+  # DLL's import library).  MSVC with a CUDA 12.x toolkit - the experimental Pascal/Volta build - then fails with
+  # LNK1169 (every cudart symbol defined twice); GNU ld lets it pass.  That build links the shared runtime alone.  The
+  # ready-made engine (CUDA 13, no STRATA_EXPERIMENTAL_SM60) is unchanged; -DCMAKE_CUDA_RUNTIME_LIBRARY overrides.
+  if(MSVC AND STRATA_EXPERIMENTAL_SM60 AND NOT DEFINED CMAKE_CUDA_RUNTIME_LIBRARY)
+    set(CMAKE_CUDA_RUNTIME_LIBRARY Shared)
+  endif()
   enable_language(CUDA)
   # `enable_language(CUDA)` gives the .cu compile rules but NOT the imported targets, so `CUDA::cudart` has to
   # be brought in explicitly for the host-side tests that call cudaMalloc themselves.
diff --git a/docs/INSTALL.md b/docs/INSTALL.md
index 7af3a3e8bf9..aec9d89de24 100644
--- a/docs/INSTALL.md
+++ b/docs/INSTALL.md
@@ -151,6 +151,9 @@ says so and starts the engine you had.
 - **Where that data folder is:** `%APPDATA%\Strata\settings.json` on Windows, `~/.config/strata/settings.json` on
   Linux ([details](DETAILS.md#before-you-start)).
 - **The program itself:** `.venv/`, `engine/` and `third_party/` in the Strata folder.
+- **Where github.com cannot be reached:** a build from source downloads llama.cpp's source (ggml, gguf-py) from
+  GitHub at the commit `LLAMA_CPP_COMMIT` in `setup.py` names. Put that commit's tree in `third_party/llama.cpp`
+  yourself (from a mirror or another PC) and setup uses it instead (#585).
 
 ## Setup's questions
 

From 2bc2dc1ffc5f82a40d16465671b5260f379ea004 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:27:29 +0200
Subject: [PATCH 096/201] docs: the layer split's per-card dense weights (PR
 #639), STRATA_ARENA_MMAP (PR #640), make_profile --reorder (#587)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md   | 11 ++++++++++-
 docs/MULTI_GPU.md |  8 ++++++++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..99963c31bc5 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -145,6 +145,13 @@ other ~18 GB), a 32 GB PC with a 12-16 GB GPU the Coder; IQ3_XXS on a 32 GB PC s
   with `--resident-experts` started with `--gpus` switches to `--mmap-experts` with a note, and the engine runs that
   pair as `--mmap-experts` with a warning instead of refusing it.
 
+**A mapped arena for small RAM (Linux, opt-in, 0.1.39, PR #640):** `STRATA_ARENA_MMAP=1` maps a native pack's expert
+arena read-only from the pack's `experts.bin` instead of reading it into locked RAM, for a PC whose GPUs hold most
+experts but whose RAM is small (2x 16 GB GPUs with 32 GB of RAM: ~1 GB -> 25 GB available while serving). The first
+start writes `experts.bin` (when the drive has room for it), later starts map it; the pages of the experts a GPU holds
+are handed back to the OS. Run it with `--pcie-frac 0` (the GPUs get no mapped alias). Without the variable nothing
+changes.
+
 **Low-RAM mode without `experts.bin` (engine 0.1.31):** for the native packs (IQ2_XS, IQ3_XXS, IQ3_S, the Coder, Swift,
 Q2_0 packed by `tools/iq_pack.py`; not the canonical Q2_0 pack setup makes for AVX-512 CPUs) the mapped mode no longer
 needs the pack's `experts.bin`: when the pack has none, the engine
@@ -208,7 +215,9 @@ card gains depends on its PCIe link (the experts stream over it), so they are st
 More VRAM matters more than a faster GPU: every extra GB holds ~700 more experts, and every expert on the GPU is one the
 CPU does not have to compute. A 3090's 24 GB takes most of the CPU work away. (Since 0.1.14 the expert profile ranks
 all 24,576 experts; before, the cache stopped at 8,000, about 10-14 GB. `tools/make_profile.py` builds a profile from
-your own prompts: run the engine once with `--dump-routing trace.bin`, see the tool's help.)
+your own prompts: run the engine once with `--dump-routing trace.bin`, see the tool's help. The shipped profile already
+ranks every pair, so a trace only changes the order with `--reorder` (0.1.39, #587): your trace's pairs first, then the
+base's, then the rest.)
 
 ## Which model?
 
diff --git a/docs/MULTI_GPU.md b/docs/MULTI_GPU.md
index 6e0b0d9687b..a2c4535c44d 100644
--- a/docs/MULTI_GPU.md
+++ b/docs/MULTI_GPU.md
@@ -75,6 +75,14 @@ The engine flags behind it: `--layer-split K1[,K2..]|auto` and `--split-device D
 devices; default the next visible ones). `--layer-split K --split-device 0` runs both stages on one card sharing
 everything - the bit-exact check of the hand-off, not a speed mode.
 
+**Each card loads only its own layers' dense weights** (0.1.39, PR #639) with explicit split points (`--layer-split
+27`, not `auto`): every card used to keep a full copy (~3.4 GB for the Coder) though its stage reads only its own
+layers, and the VRAM it frees goes to that card's expert cache (2x MI50 16 GB, Coder: 8,819 -> 10,626 experts in
+VRAM, decode 39.2 -> 41.7 tok/s). On by default in the AMD (HIP) builds, `STRATA_STAGE_TRIM=0` keeps the full copies;
+on NVIDIA it is opt-in with `STRATA_STAGE_TRIM=1` until it has been run on NVIDIA cards (please report how it goes).
+A card holding more experts can change which experts run on the GPU, so the output can differ slightly from a run
+without it.
+
 **auto** tries every placement (all of them for two or three cards; proportional to the free VRAM beyond that) and
 keeps the one whose caches would hold the most of the expert profile, hottest pairs weighted most; ties go to the
 placement that leaves the fullest card the most room. The startup log prints the choice:

From 553f37b76870d0c251602772e640a02a801b17f4 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:27:35 +0200
Subject: [PATCH 097/201] Hit rate: say the PCIe share beside it (#588)

The decode hit rate is the VRAM share of the experts the pool looked up; the routed experts the GPU reads over PCIe
(--pcie-frac) or another GPU computes are in neither count, so raising --pcie-frac raised the "hit rate" while the
decode got slower. Its meaning stays; now that share is said beside it:

- engine: DriveState::offload_entries counts those entries; the serve line adds "; N more read by the GPU over
  PCIe or from another GPU (X% of all M routed)", and the DONE line a 16th field (an older server ignores it).
- server: /metrics' requests get "pcie_share" (None from an older engine), the console's done line "(+X% of the
  routed experts over PCIe)", and the Monitor's column is "VRAM hit rate" with "+X% PCIe" after it.
- DETAILS.md says what each means.

No number changes; tokens are unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md                       |  4 ++++
 include/strata/core/expert_source.hpp |  3 +++
 serve/server.py                       | 11 ++++++++++-
 serve/test_server.py                  | 20 ++++++++++++++++++++
 serve/web/app.js                      |  4 +++-
 serve/web/index.html                  |  2 +-
 src/core/expert_source.cpp            |  3 ++-
 src/program/generate.cpp              | 23 ++++++++++++++++++-----
 8 files changed, 61 insertions(+), 9 deletions(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index ce147220d25..e2012813d62 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -173,6 +173,10 @@ been warmed). The server log has the same per request (`expert tiers: GPU ... hi
 blobs ... MB read`), and `GET /metrics` lists `ram_blobs`, `file_blobs` and `file_mb` for each recent request (with
 engine 0.1.31 or newer). It also lists each request's speculative drafts, `drafts_offered` and `drafts_accepted`
 (`null` when the engine did not report them), and their sums since the server started in `totals` (#457).
+Its `hit_rate` is the VRAM share of the experts looked up while answering: experts the GPU reads over PCIe
+(`--pcie-frac`) are not in it, so a higher `--pcie-frac` raises it even when decoding gets slower. `pcie_share`
+(engine 0.1.39 or newer, #588) is their share of all routed experts, and the server log and the Monitor tab show it
+beside the hit rate.
 
 Time to first token is prompt length / prompt speed: with Q2_0 about 4 s at 4K, 25 s at 32K, under 2 minutes at 128K
 and 4.5 minutes at 262K (engine 0.1.13 made long prompts about twice as fast, below).
diff --git a/include/strata/core/expert_source.hpp b/include/strata/core/expert_source.hpp
index 0872f49a2fc..beaa5aa39ac 100644
--- a/include/strata/core/expert_source.hpp
+++ b/include/strata/core/expert_source.hpp
@@ -347,6 +347,9 @@ struct ExpertDispatch {
     GpuPlanSink* plan = nullptr;
     int pcie_num = 0;
     int64_t pcie_experts = 0;      ///< distinct experts the GPU read over PCIe in verify windows
+    /// #588: routed (token, expert) entries the GPU computed from outside its cache in verify windows: read over PCIe
+    /// (--pcie-frac, kind 1) or on another GPU (kind 2).  In neither cache_hits nor cache_refused.
+    int64_t offload_entries = 0;
     double ms_plan = 0, ms_actq = 0, ms_jobs = 0, ms_run = 0;   ///< verify-window dispatch sections
     /// Plan v0.3 P6: decayed routing counts per (layer, expert) during decode (sized by the caller; empty = off),
     /// which the driver uses to swap the most-routed missing experts into the VRAM tier between rounds.
diff --git a/serve/server.py b/serve/server.py
index e65d1188ff2..6178f12df75 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -447,6 +447,8 @@ def _parse_done(self, line):
             self.last.update(ram_blobs=int(f[11]), file_blobs=int(f[12]), file_mb=float(f[13]))
         if len(f) >= 15:                                  # #471 (engine 0.1.36+): the prompt tokens actually read
             self.last.update(prompt_read=int(f[14]))
+        if len(f) >= 16:                                  # #588 (engine 0.1.39+): routed experts read over PCIe
+            self.last.update(offloaded=int(f[15]))
 
     @staticmethod
     def sampling_keys(sampling: dict) -> str:
@@ -1604,6 +1606,11 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                             cvec = (getattr(self.engine, "info", {}) or {}).get("cvec", 0)
                             loaded = str(cvec) not in ("0", "", "None")
                             hit_rate = round(last["hits"] / last["lookups"], 3) if last.get("lookups") else None
+                            # #588: the share the GPU read over PCIe (--pcie-frac) or another GPU computed - not in
+                            # the hit rate's lookups, which is the VRAM share of the rest (None: an older engine)
+                            routed = (last.get("lookups") or 0) + (last.get("offloaded") or 0)
+                            pcie_share = round(last["offloaded"] / routed, 3) \
+                                if last.get("offloaded") is not None and routed else None
                             seen = prompt_tokens_seen(len(ids), last)   # #471: < len(ids) when cancelled mid-read
                             self.history.append({
                                 "projection": (sampling or {}).get("experimental_speed_projection") is not False
@@ -1616,7 +1623,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                 "prompt_ms": last.get("prompt_ms"), "decode_ms": last.get("decode_ms"),
                                 "decode_tok_s": round(last["generated"] / (last["decode_ms"] / 1000), 1)
                                 if n and last.get("generated") and last.get("decode_ms") else None,
-                                "hit_rate": hit_rate, "ram_blobs": last.get("ram_blobs"),
+                                "hit_rate": hit_rate, "pcie_share": pcie_share, "ram_blobs": last.get("ram_blobs"),
                                 "file_blobs": last.get("file_blobs"), "file_mb": last.get("file_mb"),
                                 # #457: the speculative drafts from the DONE line (None: the engine did not say)
                                 "drafts_offered": last.get("drafts_offered"),
@@ -1640,6 +1647,8 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                             ft = self.status.get("first_token")
                             rate = n / max(1e-6, now - ft) if ft else 0.0
                             hit_msg = f", expert cache {hit_rate*100:.1f}% hit" if hit_rate is not None else ""
+                            if hit_msg and pcie_share:
+                                hit_msg += f" (+{pcie_share*100:.1f}% of the routed experts over PCIe)"
                             print(f"[strata] done: {n} tokens in {el:.0f} s ({rate:.1f} tok/s) "
                                   f"({finish}, cancel={cancel.is_set()}){hit_msg}", flush=True)
                             if finish == "length" and parser.state == "reasoning":   # #530
diff --git a/serve/test_server.py b/serve/test_server.py
index 64c54f7fab8..813fa66dbb5 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -806,6 +806,26 @@ def test_drafts_in_history_and_totals(self):
         self.assertEqual((m["totals"]["drafts_offered"], m["totals"]["drafts_accepted"]), (17, 10))
 
 
+class PcieShare(unittest.TestCase):
+    """#588: the hit rate stays the VRAM share of the lookups; the routed experts the GPU read over PCIe (the DONE
+    line's 16th field, engine 0.1.39+) are given as their own share of all routed experts."""
+
+    def test_history(self):
+        tok = ByteTokenizer()
+        engine = DoneLineEngine(tok, "</think>\n\nok", max_context=CTX, done_lines=[
+            "DONE 4 20 40.0 30.0 stop 3 5 0 60 100 0 0 0.0 20 25",     # 25 more over PCIe: 20% of 125 routed
+            "DONE 4 20 40.0 30.0 stop 3 5 0 60 100 0 0 0.0 20 0",
+            "DONE 4 20 40.0 30.0 stop 3 5 0 60 100 0 0 0.0 20"])       # an older engine
+        svc = Service(engine, tok, ChatTemplate(ROOT / "serve/chat_template.jinja"))
+        with contextlib.redirect_stdout(io.StringIO()) as out:
+            for _ in range(3):
+                list(svc.run(tok.encode("hi"), False, None, 10, {}, threading.Event()))
+        rows = list(svc.history)
+        self.assertEqual([r["hit_rate"] for r in rows], [0.6, 0.6, 0.6])
+        self.assertEqual([r["pcie_share"] for r in rows], [0.2, 0.0, None])
+        self.assertIn("expert cache 60.0% hit (+20.0% of the routed experts over PCIe)", out.getvalue())
+
+
 class LearnedProfile(unittest.TestCase):
     """#477: "expert_profile_save" in the config: the engine saves its learned profile there, and the next start
     begins from it when it is a profile of the same model; without the key the arguments are unchanged."""
diff --git a/serve/web/app.js b/serve/web/app.js
index 6e8fa6b293a..f6e56374b1d 100644
--- a/serve/web/app.js
+++ b/serve/web/app.js
@@ -302,7 +302,9 @@ function renderMonitor(live, hw, st, eng, h, last, requests, totals, kept) {
       const [cls, text] = badge[r.finish] || ["", r.finish || "–"];
       const t = new Date(r.time * 1000).toLocaleTimeString([], {hour: "2-digit", minute: "2-digit", second: "2-digit"});
       const proj = r.projection == null ? "" : ` <span class="st-badge${r.projection ? " st-badge--reading" : ""}" title="experimental speed projection ${r.projection ? "on" : "off"}">${r.projection ? "ESP" : "stock"}</span>`;
-      const hit = r.hit_rate == null ? "–" : `${(r.hit_rate * 100).toFixed(1)}%`;
+      // #588: the VRAM share; the PCIe share (--pcie-frac) beside it when there is one
+      const hit = r.hit_rate == null ? "–" : `${(r.hit_rate * 100).toFixed(1)}%` +
+        (r.pcie_share ? ` <span class="muted" title="routed experts the GPU read over PCIe (--pcie-frac) or another GPU computed">+${(r.pcie_share * 100).toFixed(1)}% PCIe</span>` : "");
       return `<tr><td>${esc(t)}</td><td><span class="st-badge ${cls}">${esc(text)}</span>${proj}</td><td class="num">${fmt(r.prompt_tokens)}</td>
         <td class="num">${fmt(r.reused)}</td><td class="num">${fmt(r.output_tokens)}</td><td class="num">${fmt(r.decode_tok_s, 1)}</td>
         <td class="num">${hit}</td><td class="num">${fmt(r.duration_s, 1)} s</td></tr>`;
diff --git a/serve/web/index.html b/serve/web/index.html
index d858d2f08ab..fbccdad0524 100644
--- a/serve/web/index.html
+++ b/serve/web/index.html
@@ -117,7 +117,7 @@
           <div class="table-wrap" id="req-wrap">
             <table class="st-table">
               <thead><tr><th>Time</th><th>Status</th><th class="num">Prompt</th><th class="num">Reused</th><th class="num">Output</th>
-                <th class="num">Tok/s</th><th class="num" title="While writing the answer: the share of the experts looked up that were already in VRAM (experts copied over PCIe are not counted)">Hit rate</th><th class="num">Duration</th></tr></thead>
+                <th class="num">Tok/s</th><th class="num" title="While writing the answer: the share of the experts looked up that were already in VRAM. Experts the GPU read over PCIe (--pcie-frac) are not counted in it; their share of all routed experts is shown after it (+N% PCIe)">VRAM hit rate</th><th class="num">Duration</th></tr></thead>
               <tbody id="req-body"><tr><td colspan="8" class="muted">No requests yet</td></tr></tbody>
             </table>
           </div>
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index ee759515b33..08edd46b902 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2132,7 +2132,8 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
             }
             if (kind[i] >= 0) {             // CUDA0, PCIe, or a remote/peer result staged into this row below
                 if (kind[i] == 0) ++d.cache_hits;
-                else if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
+                else ++d.offload_entries;                       // #588: PCIe or another GPU
+                if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
                 // multi-GPU: a direct peer launch is writing this row right now - zeroing it would race it
                 if (!(kind[i] == 2 && d.peer != nullptr && d.peer->launched_direct()))
                     std::memset(row, 0, (size_t) H * sizeof(float));
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index e71a3e8db88..e1f04984636 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -5797,6 +5797,7 @@ int main(int argc, char** argv) {
             const int64_t ram0 = src.ram_reads(), files0 = src.file_reads();
             const uint64_t file_bytes0 = src.file_read_bytes();
             const int64_t decode_look0 = drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused;
+            const int64_t offload0 = drive.d.offload_entries;   // #588
             if (cancelled) finish = "cancel";
             while (!cancelled && produced_n < max_new) {
                 int T = S_mtp;
@@ -6044,6 +6045,7 @@ int main(int argc, char** argv) {
             }
             const int64_t req_hits = drive.d.cache_hits - decode_hits0;
             const int64_t req_look = (drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused) - decode_look0;
+            const int64_t req_offload = drive.d.offload_entries - offload0;
             // #471: the prompt tokens this request read - all the fresh ones, or as far as the prompt pass got when a
             // cancel stopped it part-way (a cancelled request used to be logged and counted as having read them all)
             const int64_t fresh = n - resume;
@@ -6051,11 +6053,15 @@ int main(int argc, char** argv) {
             // DONE <generated> <prompt> <prompt ms> <decode ms> <finish> <drafts accepted> <drafts offered> <reused> [hits] [lookups]
             //      [RAM blobs] [file blobs] [file MB]   (CS-T tiers; appended, so an older server reads the rest)
             //      [prompt tokens read]   (#471: fewer than <prompt> - <reused> when a cancel stopped the read)
-            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld\n", (long long) produced_n,
+            //      [offloaded]   (#588: the decode's routed experts the GPU read over PCIe or another GPU computed;
+            //                    not in [lookups])
+            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld %lld\n",
+                        (long long) produced_n,
                         (long long) n, prompt_ms, decode_ms, finish, (long long) draft_accepted, (long long) draft_offered,
                         (long long) resume, (long long) req_hits, (long long) req_look,
                         (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
-                        (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n);
+                        (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n,
+                        (long long) req_offload);
             std::fflush(stdout);
             if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
             // "12288 of 98179" when cancelled mid-read (#471), the rate from what was read
@@ -6071,11 +6077,18 @@ int main(int argc, char** argv) {
                          decode_ms > 0 ? 1000.0 * produced_n / decode_ms : 0.0, (long long) draft_accepted,
                          (long long) draft_offered, checks.size(), cancelled ? " (cancelled)" : "");
             // the VRAM share of the experts the pool looked up while decoding; experts it sent over PCIe for the GPU
-            // to read (--pcie-frac) are in neither count
+            // to read (--pcie-frac) are in neither count - #588: so that share is said beside it (raising --pcie-frac
+            // raises the hit rate while the PCIe reads may make the decode slower)
             if (req_look > 0) {
-                std::fprintf(stderr, "strata serve: decode expert cache hit rate: %.1f%% (%lld hits / %lld lookups)\n",
+                char off[160] = "";
+                if (req_offload > 0)
+                    std::snprintf(off, sizeof off, "; %lld more read by the GPU over PCIe or from another GPU (%.1f%% of "
+                                  "all %lld routed)", (long long) req_offload,
+                                  100.0 * (double) req_offload / (double) (req_look + req_offload),
+                                  (long long) (req_look + req_offload));
+                std::fprintf(stderr, "strata serve: decode expert cache hit rate: %.1f%% (%lld hits / %lld lookups)%s\n",
                              100.0 * (double) req_hits / (double) req_look,
-                             (long long) req_hits, (long long) req_look);
+                             (long long) req_hits, (long long) req_look, off);
             }
             // the resident RAM mode, cumulative: experts read from experts.bin since the copy was made (what the plain
             // mmap mode reads through the OS file cache, from the SSD when the RAM could not keep it)

From 587bb075ce39bc667b7ea8d2b907b1c7af49e68c Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:31:07 +0200
Subject: [PATCH 098/201] Document the decode window profiler
 (STRATA_VERIFY_PROFILE + STRATA_DECODE_TIMING); --gpu-stages points to it on
 a native pack (#610)

--gpu-stages replays per-layer graphs, which a native (IQ) pack does not capture, and refused with "not captured
with the split". The serve path already times a native window's stages: STRATA_DECODE_TIMING=1 prints the
per-request decode split and STRATA_VERIFY_PROFILE=1 adds the GPU stages. DETAILS.md now says how to read them, and
--gpu-stages on a native pack says to use them.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md          | 9 +++++++++
 src/program/generate.cpp | 7 ++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index e2012813d62..2374f2d9249 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -178,6 +178,15 @@ Its `hit_rate` is the VRAM share of the experts looked up while answering: exper
 (engine 0.1.39 or newer, #588) is their share of all routed experts, and the server log and the Monitor tab show it
 beside the hit rate.
 
+**Where a decode window's time goes (profiling, #610):** start the server with `STRATA_DECODE_TIMING=1` (and
+`STRATA_VERIFY_PROFILE=1` for the GPU's side) in the environment. After each request the engine log then has one
+`strata decode timing:` line - windows, tokens per window, and per window the verify time split into the wait for the
+GPU, the CPU expert pool (plan, activation quantization, jobs) and the stage, plus commit and draft - and one
+`strata decode GPU stages (ms/window):` line with the GPU time of each stage (GDN and QSA layers, the VRAM expert
+hits, the router, the head, ...). The GPU profile times every stage with events, so it slows the decode a little:
+use it to compare, not to measure speed. This works with every pack; `--gpu-stages` (a one-token replay of
+per-layer graphs) refuses a native (IQ) pack, which has no such graphs.
+
 Time to first token is prompt length / prompt speed: with Q2_0 about 4 s at 4K, 25 s at 32K, under 2 minutes at 128K
 and 4.5 minutes at 262K (engine 0.1.13 made long prompts about twice as fast, below).
 
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index e1f04984636..df49bdeabd3 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -3706,7 +3706,12 @@ int main(int argc, char** argv) {
         strata::core::doorbell_reset(db);
         double mix = 0, ffn = 0, post = 0;
         if (!strata::core::session_replay_stages(g, 0, 0, ss, gr, main_cs, mix, ffn, post, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            // #610: a native (IQ) pack captures no per-layer graphs; the serve path times its window's stages
+            std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(),
+                         native_pack ? " - a native (IQ) pack has no per-layer graphs to replay. Its decode window's GPU "
+                                       "stages are printed per request by the serve path instead: STRATA_VERIFY_PROFILE=1 "
+                                       "STRATA_DECODE_TIMING=1 with --serve (docs/DETAILS.md, \"Where a decode window's "
+                                       "time goes\")" : "");
             return 1;
         }
         const int reps = 20;

From 0890960c363fb9337225b2fa1676f2ef33cd4e38 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:31:20 +0200
Subject: [PATCH 099/201] web: a Conversation cache card in the Monitor tab
 (#596)

/metrics gains "conversation_cache": the parked conversations, their
bytes, parks/restores/evictions and the last switch, read from the
engine's own log lines ("conversation cache: parked/restored ...") from
the start of its current run on; the budget and slots from its INFO line;
and the prompt tokens reused in the last request and since the start.
The card shows the parked slots and memory when --conversation-cache-mib
is on, the reuse lines always, and how to turn parking on when it is off.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md       |  5 +++
 serve/server.py       | 74 +++++++++++++++++++++++++++++++++++++++++++
 serve/test_monitor.py | 63 ++++++++++++++++++++++++++++++++++++
 serve/web/app.css     |  6 ++++
 serve/web/app.js      | 34 ++++++++++++++++++++
 serve/web/index.html  | 12 +++++++
 6 files changed, 194 insertions(+)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 2ea4641bca7..704bc8f580c 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -596,6 +596,11 @@ INT8, Q4_0 and identity-layout K8V4 snapshots are supported; the K8V4 draft ring
 remains INT8, as in upstream. Windows/HIP and multi-GPU runtime coverage must be
 reported separately from Linux/CUDA evidence.
 
+The web page's Monitor tab has a **Conversation cache** card (0.1.39, #596): the parked conversations against the
+slots and the RAM budget, how many were parked, restored and evicted, and the last switch (read from the engine's
+log), and for every setup how many prompt tokens the cache gave back - in the last request and since the start.
+`/metrics` has the same under `"conversation_cache"`.
+
 Snapshots contain running state, checkpoints, used K/V pages, and draft-layer K/V.
 They add host RAM, not another model or VRAM allocation. The byte budget also counts
 an incoming snapshot during a switch. After a restore, unchanged K/V pages can be
diff --git a/serve/server.py b/serve/server.py
index 0c2c65b285d..26c81cc76d6 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -299,6 +299,76 @@ def say(key, text):
             print(f"[strata] still starting ({time.time() - t0:.0f} s) - please wait ...", flush=True)
 
 
+class ConvCacheLog:
+    """#596: the engine's conversation cache as its log tells it (the engine writes "strata serve: conversation
+    cache: parked N tokens ...; parked=P bytes=B evictions=E" and "restored N tokens ...; parked=P bytes=B" to stderr,
+    which is the log): read on from where it was last read, from the start of the engine's current run."""
+    EVENT = re.compile(r"conversation cache: (parked|skipped|restored) (\d+) tokens.*?parked=(\d+) bytes=(\d+)"
+                       r"(?: evictions=(\d+))?")
+    DROPPED = re.compile(r"conversation cache: dropped \d+ superseded .*?parked=(\d+)")
+    READ_MAX = 1 << 20                                  # at most the last MiB of new lines per read
+
+    def __init__(self):
+        self.key, self.pos = None, 0
+        self.reset()
+
+    def reset(self):
+        self.state = {"parked": 0, "bytes": 0, "evictions": 0, "parks": 0, "restores": 0, "last_event": None,
+                      "last_tokens": None, "last_at": None}
+
+    def poll(self, path, start) -> dict:
+        """The state after the log's new lines; `start` is where the engine's current run began in it."""
+        if not path or start is None:
+            return dict(self.state)
+        if self.key != (path, start):                   # another start of the engine: its cache starts empty
+            self.key, self.pos = (path, start), start
+            self.reset()
+        try:
+            size = os.path.getsize(path)
+            if size < self.pos:                         # the log was emptied or replaced
+                self.pos = 0
+            if size - self.pos > self.READ_MAX:
+                self.pos = size - self.READ_MAX
+            with open(path, "rb") as f:
+                f.seek(self.pos)
+                data = f.read(size - self.pos)
+        except OSError:
+            return dict(self.state)
+        end = data.rfind(b"\n") + 1                     # whole lines only: the rest is read next time
+        self.pos += end
+        now = time.time()
+        for line in data[:end].decode("utf-8", "replace").splitlines():
+            if "conversation cache:" not in line:
+                continue
+            m = self.EVENT.search(line)
+            if m:
+                st = self.state
+                st["parked"], st["bytes"] = int(m.group(3)), int(m.group(4))
+                if m.group(5) is not None:
+                    st["evictions"] = int(m.group(5))
+                if m.group(1) != "skipped":
+                    st["parks" if m.group(1) == "parked" else "restores"] += 1
+                    st["last_event"], st["last_tokens"], st["last_at"] = m.group(1), int(m.group(2)), now
+                continue
+            m = self.DROPPED.search(line)
+            if m:
+                self.state["parked"] = int(m.group(1))
+        return dict(self.state)
+
+
+def conversation_cache_view(info: dict, hist: list, totals: dict, parked: dict) -> dict:
+    """#596: the Monitor's Conversation cache card: the parked conversations (the engine's opt-in
+    --conversation-cache-mib: budget, slots, what its log says) and how much of the prompts the cache gave back."""
+    mib = info.get("conversation_cache_mib")
+    last = hist[-1] if hist else None
+    return {"enabled": isinstance(mib, int) and mib > 0, "budget_mib": mib if isinstance(mib, int) else None,
+            "slots": info.get("conversation_cache_slots"), **parked,
+            "requests": len(hist), "requests_reused": sum(1 for r in hist if (r.get("reused") or 0) > 0),
+            "reused_tokens": totals.get("reused", 0), "prompt_tokens": totals.get("prompt_tokens", 0),
+            "last_reused": last.get("reused") if last else None,
+            "last_prompt": last.get("prompt_tokens") if last else None}
+
+
 class StrataEngine:
     """The resident engine: `strata --serve` reads `GEN <max_new> <ids>` lines and streams `T <id>` lines, then
     `DONE ...`.  Requests are serialized by the service's FIFO, so one pipe is enough.
@@ -335,6 +405,7 @@ def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str |
         self.log = open(log, "a", encoding="utf-8") if log else subprocess.DEVNULL
         loading = threading.Event()                     # set once READY: the narrator below stops
         log_start = os.path.getsize(log) if log else 0  # where this start's lines begin (start_failure_hint)
+        self.log_start = log_start                      # #596: the Monitor's conversation cache reads from here
         if log:
             threading.Thread(target=narrate_start, args=(log, os.path.getsize(log), args, loading),
                              daemon=True).start()
@@ -993,6 +1064,7 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         # #458 (opt-in, the config's "effort_position": "end"): a non-default reasoning effort goes in a short system
         # turn before the answer instead of the top of the prompt, so switching it keeps the cached conversation
         self.effort_end = False
+        self.conv_log = ConvCacheLog()                  # #596: the parked conversations, from the engine's log
         # #321: browser pages of these origins may call /v1/* (CORS; "*" = any page - only with an api_key that
         # matters); empty = no CORS headers at all, as before
         self.cors_origins: list[str] = []
@@ -1329,7 +1401,9 @@ def metrics(self, all_requests=False) -> dict:
         engine = {"model": self.model, "max_context": self.engine.max_context, "images": self.vision is not None,
                   **dict(getattr(self.engine, "info", {}) or {})}
         tel = self.telemetry.snapshot() if getattr(self, "telemetry", None) else {"now": {}, "history": {}, "static": {}}
+        parked = self.conv_log.poll(getattr(self.engine, "log_path", None), getattr(self.engine, "log_start", None))
         return {"engine": engine, "live": live, "requests": hist[::-1][:None if all_requests else 12],
+                "conversation_cache": conversation_cache_view(engine, hist, totals, parked),
                 "requests_kept": len(hist), "totals": totals, "hardware": tel["now"],
                 "hardware_static":
                 tel["static"], "history": tel["history"], "time": now}
diff --git a/serve/test_monitor.py b/serve/test_monitor.py
index ad554e00068..0c82cb0b53c 100644
--- a/serve/test_monitor.py
+++ b/serve/test_monitor.py
@@ -194,5 +194,68 @@ def test_page_and_relative_assets_are_served(self):
         self.assertEqual(self.request("/web/../server.py")[0], 404)
 
 
+class ConversationCacheCard(unittest.TestCase):
+    """#596: /metrics' "conversation_cache": the parked conversations from the engine's log lines, the budget and
+    slots from its INFO line, and how much of the prompts the cache gave back."""
+
+    PARK = ("strata serve: conversation cache: parked 5000 tokens in 12.0 ms; parked=1 bytes=104857600 evictions=0 "
+            "snapshot_bytes=104857600 reused_kv_bytes=0\n")
+    RESTORE = "strata serve: conversation cache: restored 4000 tokens (exact) in 30.0 ms; parked=2 bytes=209715200\n"
+
+    def test_the_log(self):
+        from serve.server import ConvCacheLog
+        import tempfile
+        with tempfile.TemporaryDirectory() as d:
+            log = Path(d) / "strata.log"
+            log.write_text("an earlier run\n" + self.PARK, encoding="utf-8")
+            start = log.stat().st_size                 # this run starts here: the earlier run's park is not counted
+            c = ConvCacheLog()
+            self.assertEqual(c.poll(str(log), start)["parked"], 0)
+            with open(log, "a", encoding="utf-8") as f:
+                f.write("strata serve: something else\n" + self.PARK + self.RESTORE + "strata serve: conversation ca")
+            st = c.poll(str(log), start)
+            self.assertEqual((st["parked"], st["bytes"], st["parks"], st["restores"]), (2, 209715200, 1, 1))
+            self.assertEqual((st["last_event"], st["last_tokens"]), ("restored", 4000))
+            with open(log, "a", encoding="utf-8") as f:   # the cut line is read once it is whole
+                f.write("che: dropped 1 superseded copy of this conversation; parked=1\n")
+            self.assertEqual(c.poll(str(log), start)["parked"], 1)
+            self.assertEqual(c.poll(str(log), log.stat().st_size)["parked"], 0)   # the engine started again
+            self.assertEqual(c.poll(None, None)["parked"], 0)
+
+    def test_metrics(self):
+        tok = ByteTokenizer()
+        engine = MockEngine(tok, "Thought.</think>\nHello.", max_context=4096)
+        engine.info = {"conversation_cache_mib": 8192, "conversation_cache_slots": 4}
+        svc = Service(engine, tok, ChatTemplate(Path(__file__).parent / "chat_template.jinja"))
+        httpd = serve(svc, port=0)
+        base = f"http://127.0.0.1:{httpd.server_address[1]}"
+        try:
+            with urllib.request.urlopen(base + "/metrics", timeout=10) as r:
+                c = json.loads(r.read())["conversation_cache"]
+            self.assertEqual((c["enabled"], c["budget_mib"], c["slots"], c["parked"], c["requests"]),
+                             (True, 8192, 4, 0, 0))
+            req = urllib.request.Request(base + "/v1/chat/completions", headers={"Content-Type": "application/json"},
+                                         data=json.dumps({"messages": [{"role": "user", "content": "hi"}]}).encode())
+            with urllib.request.urlopen(req, timeout=10) as r:
+                r.read()
+            with urllib.request.urlopen(base + "/metrics", timeout=10) as r:
+                c = json.loads(r.read())["conversation_cache"]
+            self.assertEqual(c["requests"], 1)
+            self.assertGreater(c["last_prompt"], 0)
+            engine.info = {}
+            with urllib.request.urlopen(base + "/metrics", timeout=10) as r:
+                self.assertFalse(json.loads(r.read())["conversation_cache"]["enabled"])   # off: the reuse lines only
+        finally:
+            httpd.shutdown()
+            httpd.server_close()
+
+    def test_the_card_is_on_the_page(self):
+        web = Path(__file__).parent / "web"
+        html, js = (web / "index.html").read_text(encoding="utf-8"), (web / "app.js").read_text(encoding="utf-8")
+        for el in ("cc-card", "cc-slots-text", "cc-mem-text", "cc-facts", "cc-note"):
+            self.assertIn(f'id="{el}"', html)
+            self.assertIn(f'"{el}"', js)
+
+
 if __name__ == "__main__":
     unittest.main()
diff --git a/serve/web/app.css b/serve/web/app.css
index 4e8363d4a6c..9caa070f23e 100644
--- a/serve/web/app.css
+++ b/serve/web/app.css
@@ -115,6 +115,11 @@ main { flex: 1; min-height: 0; display: flex; }
 .table-wrap.all { max-height: 420px; overflow-y: auto; }
 .req-totals { margin: 0; font-size: var(--st-fs-sm); }
 .req-totals:empty { display: none; }
+.cc-card { display: flex; flex-direction: column; gap: var(--st-s-3); }
+.cc-bars { display: grid; grid-template-columns: 1fr 1fr; gap: var(--st-s-2) var(--st-s-6); }
+.cc-bars[hidden] { display: none; }
+.cc-note { margin: 0; }
+.cc-note:empty { display: none; }
 .mcp-card { display: flex; flex-direction: column; gap: var(--st-s-3); }
 .mcp-server { display: flex; flex-direction: column; gap: var(--st-s-2); padding-top: var(--st-s-3); border-top: 1px solid var(--st-line-soft); }
 .mcp-server:first-child { padding-top: 0; border-top: 0; }
@@ -155,6 +160,7 @@ main { flex: 1; min-height: 0; display: flex; }
 @media (max-width: 1000px) {
   .metrics { grid-template-columns: repeat(2, minmax(0, 1fr)); }
   .monitor-row { grid-template-columns: 1fr; }
+  .cc-bars { grid-template-columns: 1fr; }
 }
 @media (max-width: 640px) {
   .st-header { padding: 0 var(--st-s-3); gap: var(--st-s-2); }
diff --git a/serve/web/app.js b/serve/web/app.js
index 6e8fa6b293a..64721b4464e 100644
--- a/serve/web/app.js
+++ b/serve/web/app.js
@@ -190,9 +190,43 @@ function render(m) {
   }
   if (live.queued > 0) setPill("queued", `${live.queued} queued`);
   if (tab === "monitor") renderMonitor(live, hw, st, eng, h, last, m.requests || [], m.totals, m.requests_kept);
+  if (tab === "monitor") renderConvCache(m.conversation_cache);
   if (tab === "about") renderAbout(eng, hw, st);
 }
 
+// #596: the conversation cache - the prompt's state the engine keeps between requests (always), and the whole
+// conversations it parks in RAM when "--conversation-cache-mib N" is in the run config's args (opt-in)
+function since(t) {
+  if (!t) return "";
+  const s = Math.max(0, Date.now() / 1000 - t);
+  return s < 60 ? "just now" : s < 3600 ? `${fmt(s / 60)} min ago` : `${fmt(s / 3600, 1)} h ago`;
+}
+function renderConvCache(c) {
+  $("cc-card").hidden = !c;
+  if (!c) return;                                  // an older server
+  const pct = (a, b) => (b ? `${Math.min(100, (100 * a) / b)}%` : "0%");
+  $("cc-bars").hidden = !c.enabled;
+  if (c.enabled) {
+    $("cc-slots-text").textContent = `${fmt(c.parked)} / ${fmt(c.slots)}`;
+    $("cc-slots-bar").style.width = pct(c.parked, c.slots);
+    const budget = c.budget_mib * 1048576;
+    $("cc-mem-text").textContent = `${gb(c.bytes)} / ${gb(budget)} GB`;
+    $("cc-mem-bar").style.width = pct(c.bytes, budget);
+  }
+  $("cc-sum").textContent = c.requests ? `${fmt(c.requests_reused)} of ${fmt(c.requests)} requests reused part of their prompt` : "";
+  const share = c.prompt_tokens ? ` (${fmt((100 * c.reused_tokens) / c.prompt_tokens)}% of all prompt tokens)` : "";
+  const event = c.last_event ? `${c.last_event === "parked" ? "Parked" : "Restored"} ${fmt(c.last_tokens)} tokens, ${since(c.last_at)}` : null;
+  facts($("cc-facts"), [
+    ["Last request", c.last_prompt != null ? `${fmt(c.last_reused || 0)} of ${fmt(c.last_prompt)} prompt tokens reused` : null],
+    ["Reused since start", c.requests ? `${fmt(c.reused_tokens)} tokens${share}` : null],
+    ["Parked / restored", c.enabled ? `${fmt(c.parks)} / ${fmt(c.restores)}${c.evictions ? ` · ${fmt(c.evictions)} evicted` : ""}` : null],
+    ["Last switch", c.enabled ? event : null],
+  ]);
+  $("cc-note").textContent = c.enabled
+    ? "A request that continues a parked conversation gets its state back instead of reading it again; the oldest goes when the slots or the memory are full."
+    : "The engine keeps the last conversation's state, so a follow-up reads only what is new. To keep several conversations (agents taking turns), add \"--conversation-cache-mib\", \"8192\" to the run config's args (docs/DETAILS.md).";
+}
+
 function renderTotals(t) {
   if (!t || !t.requests) return "";
   const since = new Date(t.since * 1000).toLocaleString([], {weekday: "short", hour: "2-digit", minute: "2-digit"});
diff --git a/serve/web/index.html b/serve/web/index.html
index d858d2f08ab..cf588762a48 100644
--- a/serve/web/index.html
+++ b/serve/web/index.html
@@ -125,6 +125,18 @@
         </div>
       </div>
 
+      <div class="st-card cc-card" id="cc-card">
+        <div class="req-head"><span class="card-title">Conversation cache</span><span class="muted small" id="cc-sum"></span></div>
+        <div class="cc-bars" id="cc-bars" hidden>
+          <div><div class="bar-row"><span>Parked conversations</span><span class="muted" id="cc-slots-text">&ndash;</span></div>
+            <div class="st-progress"><div class="st-progress__bar" id="cc-slots-bar" style="width:0%"></div></div></div>
+          <div><div class="bar-row"><span>Their memory (RAM)</span><span class="muted" id="cc-mem-text">&ndash;</span></div>
+            <div class="st-progress"><div class="st-progress__bar" id="cc-mem-bar" style="width:0%"></div></div></div>
+        </div>
+        <dl class="facts" id="cc-facts"></dl>
+        <p class="muted small cc-note" id="cc-note"></p>
+      </div>
+
       <div class="st-card mcp-card" id="mcp-card" hidden>
         <div class="req-head"><span class="card-title">MCP servers</span><span class="muted small" id="mcp-sum"></span></div>
         <div class="mcp-list" id="mcp-list"></div>

From 0e17d1bb7cbaea25321fd366b126928cc53fb7f5 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:31:56 +0200
Subject: [PATCH 100/201] SECURITY.md: how to report privately, and what the
 server exposes (#544)

Private reports through GitHub's private vulnerability reporting; the
server's protections as of 0.1.38 (127.0.0.1 by default, the API key,
the Host and Origin checks, CORS, MCP tools and the request monitor
opt-in), with DETAILS.md for every setting. README links it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 README.md   |  3 ++-
 SECURITY.md | 42 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+), 1 deletion(-)
 create mode 100644 SECURITY.md

diff --git a/README.md b/README.md
index 0959ca8532e..4703c0de7ba 100644
--- a/README.md
+++ b/README.md
@@ -147,7 +147,8 @@ More: [where your chats are stored](docs/INSTALL.md#where-things-are-stored), [t
 - **It says port 8080 is already in use.** Strata is already running - look for its window.
 
 More problems and their fixes: [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). Still stuck? Open an
-[issue](https://github.com/Niko1221/Strata/issues) and attach `strata-<model>.log` from the Strata folder.
+[issue](https://github.com/Niko1221/Strata/issues) and attach `strata-<model>.log` from the Strata folder. A
+security problem? Report it privately: [SECURITY.md](SECURITY.md).
 
 ## How does it work?
 
diff --git a/SECURITY.md b/SECURITY.md
new file mode 100644
index 00000000000..64e4b509b3b
--- /dev/null
+++ b/SECURITY.md
@@ -0,0 +1,42 @@
+# Security
+
+## Reporting a vulnerability
+
+Please report anything that should not be public until it is fixed **privately**, through GitHub's private
+vulnerability reporting: the repository's **Security** tab, **Report a vulnerability**
+([direct link](https://github.com/Niko1221/Strata/security/advisories/new)). Say what you found, how to reproduce it
+(the request, the config keys involved, the Strata version), and what an attacker gains. We answer there, fix it in
+a release, and credit you in the advisory unless you ask us not to.
+
+Ordinary hardening ideas and findings that are safe to discuss in public are welcome as an
+[issue](https://github.com/Niko1221/Strata/issues) (#544 collects audit findings) or as a pull request, which we
+review like our own code.
+
+Supported: the latest release. Fixes go into the next release, not into older ones.
+
+## What the server exposes
+
+Strata runs a model on your PC and serves it over HTTP (`serve/server.py`). Out of the box it is reachable from
+this PC only. The details and every setting are in [docs/DETAILS.md](docs/DETAILS.md) ("From other devices",
+"Host names", "Web pages without an API key", "Tools from MCP servers").
+
+- **Where it listens.** `127.0.0.1` by default. `--host 0.0.0.0` (or `"host"` in `strata-<model>.json`) opens it to
+  your network, and the server then warns when no API key is set.
+- **API key.** `"api_key"` in the run config (or `STRATA_API_KEY`) is required on `/v1/*` and on every endpoint
+  that shows the model's state, requests or answers (`/status`, `/metrics`, `/settings`, `/mcp`, `/props`, `/slots`,
+  `/api/requests`) and on every `POST`. It is compared in constant time. Set one before you open the server to your network or put a tunnel in front of it.
+- **Host check (DNS rebinding, 0.1.38).** Without an API key the server answers only requests whose `Host` is a name
+  it knows (`localhost`, an IP address, the address it listens on and, when it listens beyond this PC, this PC's
+  name). Others get 403. `"allowed_hosts"` adds names; with an API key the key decides.
+- **Origin check (0.1.38).** Without an API key, a browser `POST` to `/v1/*` from another web site's page (it carries
+  an `Origin` header) gets 403 unless that origin is Strata's own page, `localhost`, an allowed host, or listed in
+  `"trusted_origins"` / `"cors_origins"`. Changing settings (`/settings`), `/load` and `/unload` and the MCP tools are
+  accepted only as JSON from Strata's own page (or `"trusted_origins"`), so a page elsewhere cannot change settings
+  or run tools.
+- **CORS** is off unless `"cors_origins"` lists origins, and then only for `/v1/*`.
+- **MCP tools** are opt-in: only the servers you put in the run config, only for requests from Strata's own page
+  that ask for them. They run with your user's rights, and the model decides when to call them.
+- **The request monitor** (`/api-monitor`, which keeps the last prompts and answers in memory) is off unless
+  `"api_monitor": true` is set.
+
+Strata has not had an outside security audit yet.

From 312f116e1c503351d49662be2ebd19ee7cb74bab Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:32:16 +0200
Subject: [PATCH 101/201] Docs: the five reading errors #604 found (the sixth,
 the n-gram table's unbuffered reads, is in #605's commit)

- MODELS.md: the RAM rule is the experts + ~10 GB (setup's arena_gb), not shard 1 + 10 GB; the sizes per model.
- DETAILS.md: prompts are read in chunks of up to 8,192 tokens (32,768 opt-in), not 2,048; Q2_0's AVX-512 pack is
  ~40 GB on disk = 34 GB of experts plus the dense weights.
- README: the NVIDIA speed table says which engine measured which row (Q2_0 0.1.36, the others 0.1.26).
- expert_cache.hpp: the comment that the cache "does not yet compute anything" is gone.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 README.md                            |  4 +++-
 docs/DETAILS.md                      |  5 +++--
 docs/MODELS.md                       |  5 +++--
 include/strata/core/expert_cache.hpp | 12 ++++--------
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/README.md b/README.md
index 0959ca8532e..1c3c93b6700 100644
--- a/README.md
+++ b/README.md
@@ -40,7 +40,9 @@ word, so 60 tokens per second is faster than you can read.
 </td></tr>
 </table>
 
-A card with more VRAM is faster: an RTX 3090 (24 GB) should write roughly 100-140 tokens per second. Long chats,
+NVIDIA: Q2_0 with engine 0.1.36, the other rows with 0.1.26 (4K answers, 32K prompts; the full tables are in
+[DETAILS.md](docs/DETAILS.md#speed-measured)). A card with more VRAM is faster: an RTX 3090 (24 GB) should write
+roughly 100-140 tokens per second. Long chats,
 other cards: [speed of each model](docs/MODELS.md#how-fast-is-each-size), [community results](docs/COMMUNITY_BENCHMARKS.md).
 
 <p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 2374f2d9249..0b8d0cced80 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -290,7 +290,7 @@ Everything else is installed for you the first time.
 | GPU | NVIDIA **RTX 20, 30, 40 or 50 series**, **12 GB VRAM or more** (8 GB runs, slowly). Measured on an RTX 5070 and an RTX 3090; RTX 20 (Turing, since 0.1.27) was tested by a contributor on an RTX 2070. Or AMD **Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700, RX 6800 / 6900 series**: [AMD_HIP.md](AMD_HIP.md). |
 | RAM | **64 GB** recommended (see the table above). |
 | CPU | x86-64 with AVX2 (any Intel/AMD desktop CPU from the last ~8 years). AVX-512 (Ryzen 7000/9000) is a bit faster. |
-| Disk | ~70-80 GB free for the model, ~6 GB for the MTP layer (+1 GB with images). **Q2_0 on an AVX-512 CPU** also writes a one-time ~40 GB copy of its experts for the fast CPU kernel. An NVMe SSD is strongly recommended. |
+| Disk | ~70-80 GB free for the model, ~6 GB for the MTP layer (+1 GB with images). **Q2_0 on an AVX-512 CPU** also writes a one-time ~40 GB pack for the fast CPU kernel (34 GB of experts in its layout, plus the dense weights). An NVMe SSD is strongly recommended. |
 | OS | Windows 10/11, or Linux (Ubuntu 22.04/24.04 get everything installed automatically). |
 
 What the first start installs: in this folder `.venv/`, `engine/` and `third_party/`; the model files (`models/`,
@@ -911,7 +911,8 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
   tokens per pass on average. When the reply repeats the context (code edits, quoted text), **prompt lookup** (engine
   0.1.7) drafts up to 5 tokens from the earlier copy, but only where its measured acceptance and cost say it pays:
   code edits 6-11% faster, other text unchanged. The drafts are checked like the MTP's, so the output is the same.
-- **Prompts** are processed in 2,048-token chunks with the experts streamed to the GPU over PCIe.
+- **Prompts** are processed in chunks of up to 8,192 tokens (`--prefill auto`; 32,768 opt-in) with the experts
+  streamed to the GPU over PCIe.
 
 The full story, with measurements, bottlenecks and what comes next: **[docs/paper/Strata-Paper.pdf](paper/Strata-Paper.pdf)**.
 
diff --git a/docs/MODELS.md b/docs/MODELS.md
index 95a954d146f..f6a5284b61f 100644
--- a/docs/MODELS.md
+++ b/docs/MODELS.md
@@ -71,8 +71,9 @@ fetches the MTP draft layer (~6 GB, +1 GB with images).
 
 Shard 1 is the part of the model that gets loaded when it starts: its experts go into your **RAM**, the rest onto
 your graphics card (the second shard, a 29 GB lookup table, stays on the SSD). So it fits when your **RAM is at least
-shard 1 + about 10 GB** for Windows and your other programs. With 64 GB of RAM every size fits (IQ3_S with little
-else open); with 48 GB, Q2_0 and IQ2_XS. A bigger graphics card makes it faster, but it doesn't lower the RAM needed
+the experts + about 10 GB** for Windows and your other programs - the experts are most of shard 1: 34 GB for Q2_0,
+35.5 for IQ2_XS, 43 for IQ3_XXS, 50 for IQ3_S, 23 for the Coder (the dense weights in shard 1 go to the graphics
+card). With 64 GB of RAM every size fits (IQ3_S with little else open); with 48 GB, Q2_0 and IQ2_XS. A bigger graphics card makes it faster, but it doesn't lower the RAM needed
 - except in the low-RAM mode below.
 
 ### A big graphics card and little RAM
diff --git a/include/strata/core/expert_cache.hpp b/include/strata/core/expert_cache.hpp
index 4a708355f9d..a5061bf09d0 100644
--- a/include/strata/core/expert_cache.hpp
+++ b/include/strata/core/expert_cache.hpp
@@ -16,14 +16,10 @@
 //   * `h_layer` held-out is **0.0456** - only 4.6% of (layer, token) pairs have all ten experts resident - so
 //     this cannot be a per-layer grouped kernel and the three-way split is not an optimisation.
 //
-// **WHAT THIS FILE IS AND IS NOT, TODAY.** It is the SLOT STORAGE and the RESIDENCY TABLE: it allocates the
-// VRAM, fills it from the host arena, and answers `(layer, expert) -> slot or -1`. It does **not** yet compute
-// anything - `moe_hit_grouped_s2` does not exist and the hit/miss split is not wired into the graph - so with
-// the cache on and nothing consuming it, **the engine is slower by the fill cost and faster by nothing.**
-// That is stated here rather than discovered from a benchmark, and it is why `--expert-cache` defaults to 0.
-//
-// The order of work is `Memory/R4-design-note.md` §7: slots and residency first, then the split, then the
-// kernel. This is that first step, and the step it unblocks is the one that can be measured.
+// **WHAT THIS FILE IS.** The SLOT STORAGE and the RESIDENCY TABLE: it allocates the VRAM, fills it from the host
+// arena, and answers `(layer, expert) -> slot or -1`. It computes nothing itself: the GPU computes the experts it
+// holds in the verify window's grouped kernels and the prompt path (the hit/miss split), and the CPU pool the rest.
+// (Written when nothing consumed the slots yet and `--expert-cache` defaulted to 0; setup's configs use `auto`.)
 #pragma once
 
 #include <cstddef>

From 4e8d036e555dece2018cd206df7187fcc2080bbb Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:35:02 +0200
Subject: [PATCH 102/201] web: a Model settings view for documented run config
 keys (#564)

The About tab's Model settings card reads GET /config and saves through
POST /config: the sampling defaults, reasoning_budget_tokens,
fit_max_tokens, anthropic_thinking, effort_position, aliases,
idle_unload_s, lazy_load, engine_silence_s, api_monitor, open_browser
and --vram-reserve-mib (serve/runconfig.py). Every value is checked
first (one bad value changes nothing), only the named keys change, every
other key of strata-<model>.json stays as it is (as setup run again
keeps them, #629), the earlier file is kept as .bak, and the change is
used from the next start. POST takes JSON from Strata's own page only,
like /settings, and the API key when one is set; the network, key, MCP
and program keys are not editable there.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 SECURITY.md             |  10 ++-
 docs/DETAILS.md         |   8 ++
 serve/runconfig.py      | 179 ++++++++++++++++++++++++++++++++++++++++
 serve/server.py         |  50 +++++++++++
 serve/test_runconfig.py | 165 ++++++++++++++++++++++++++++++++++++
 serve/web/app.css       |   8 ++
 serve/web/app.js        |  57 +++++++++++++
 serve/web/index.html    |   8 ++
 8 files changed, 481 insertions(+), 4 deletions(-)
 create mode 100644 serve/runconfig.py
 create mode 100644 serve/test_runconfig.py

diff --git a/SECURITY.md b/SECURITY.md
index 64e4b509b3b..94be4eadeea 100644
--- a/SECURITY.md
+++ b/SECURITY.md
@@ -24,15 +24,17 @@ this PC only. The details and every setting are in [docs/DETAILS.md](docs/DETAIL
   your network, and the server then warns when no API key is set.
 - **API key.** `"api_key"` in the run config (or `STRATA_API_KEY`) is required on `/v1/*` and on every endpoint
   that shows the model's state, requests or answers (`/status`, `/metrics`, `/settings`, `/mcp`, `/props`, `/slots`,
-  `/api/requests`) and on every `POST`. It is compared in constant time. Set one before you open the server to your network or put a tunnel in front of it.
+  `/api/requests`, `/config`) and on every `POST`. It is compared in constant time. Set one before you open the
+  server to your network or put a tunnel in front of it.
 - **Host check (DNS rebinding, 0.1.38).** Without an API key the server answers only requests whose `Host` is a name
   it knows (`localhost`, an IP address, the address it listens on and, when it listens beyond this PC, this PC's
   name). Others get 403. `"allowed_hosts"` adds names; with an API key the key decides.
 - **Origin check (0.1.38).** Without an API key, a browser `POST` to `/v1/*` from another web site's page (it carries
   an `Origin` header) gets 403 unless that origin is Strata's own page, `localhost`, an allowed host, or listed in
-  `"trusted_origins"` / `"cors_origins"`. Changing settings (`/settings`), `/load` and `/unload` and the MCP tools are
-  accepted only as JSON from Strata's own page (or `"trusted_origins"`), so a page elsewhere cannot change settings
-  or run tools.
+  `"trusted_origins"` / `"cors_origins"`. Changing settings (`/settings`, and `/config`: the few run config keys the
+  page's Model settings may change - never the network, key, MCP or program keys), `/load` and `/unload` and the
+  MCP tools are accepted only as JSON from Strata's own page (or `"trusted_origins"`), so a page elsewhere cannot
+  change settings or run tools.
 - **CORS** is off unless `"cors_origins"` lists origins, and then only for `/v1/*`.
 - **MCP tools** are opt-in: only the servers you put in the run config, only for requests from Strata's own page
   that ask for them. They run with your user's rights, and the model decides when to call them.
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 704bc8f580c..23989223a06 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -535,6 +535,14 @@ print(r.choices[0].message.content)
 - **Model aliases** (0.1.32). `"aliases": ["qwen", "local-model"]` in `strata-<model>.json` lists the model under
   those names too in `/v1/models` (each with its own `id`, and in the model's `aliases`), like llama-server's
   `--alias`; a request naming one is answered under that name. Any other name is still served, as before.
+- **Model settings in the web page (0.1.39, #564).** The About tab's Model settings card shows and changes a few of
+  the keys above in `strata-<model>.json`: the `sampling` defaults (temperature, top_p, top_k, min_p),
+  `reasoning_budget_tokens`, `fit_max_tokens`, `anthropic_thinking`, `effort_position`, `aliases`, `idle_unload_s`,
+  `lazy_load`, `engine_silence_s`, `api_monitor`, `open_browser` and `--vram-reserve-mib`. An empty field removes the
+  key (its default). Every other key of the file stays as it is, the earlier file is kept as
+  `strata-<model>.json.bak`, and the model uses the change from its next start. Only Strata's own page can save
+  (JSON, the API key when one is set, as for the Chat settings); the network, key, MCP and program keys are not
+  editable there.
 - **From other devices on your network.** The server listens on your PC only (`127.0.0.1`) unless you say otherwise:
   run setup with `START-HERE.bat --setup --host 0.0.0.0 --api-key some-long-secret` (or add `"host": "0.0.0.0"` and
   `"api_key": "..."` to `strata-<model>.json`). The server window then prints this PC's addresses
diff --git a/serve/runconfig.py b/serve/runconfig.py
new file mode 100644
index 00000000000..472b00212b0
--- /dev/null
+++ b/serve/runconfig.py
@@ -0,0 +1,179 @@
+"""serve/runconfig.py - #564: the web page's Settings view of the run config (strata-<model>.json).
+
+A short list of documented keys can be read and changed from Strata's own page (GET / POST /config).  Everything
+else in the file - the keys setup writes, the network and security keys (host, api_key, cors_origins,
+trusted_origins, allowed_hosts), the MCP servers and before_load (which run programs), sampling keys not listed
+here - is kept as it is: a change touches only the keys it names (as setup run again keeps the user's keys, #629).
+The earlier file is kept as strata-<model>.json.bak.  The server reads the config when it starts, so a change is
+used from the next start on.
+"""
+from __future__ import annotations
+
+import json
+import os
+import shutil
+from pathlib import Path
+
+# (key, kind, help).  kind: "bool", "int>=0", "num>=0", ("enum", values), "names", or ("sampling", check) for a key
+# of the "sampling" block, ("arg", flag) for an engine option kept in "args".
+EDITABLE = [
+    ("sampling.temperature", ("sampling", "num>=0"),
+     "Default temperature for requests that send none (0 = greedy, the default without a sampling block)"),
+    ("sampling.top_p", ("sampling", "0<x<=1"), "Default top_p for requests that send none"),
+    ("sampling.top_k", ("sampling", "1..64"), "Default top_k for requests that send none (1-64)"),
+    ("sampling.min_p", ("sampling", "0<=x<=1"), "Default min_p for requests that send none"),
+    ("reasoning_budget_tokens", "int>=0", "Cap the thinking of every request at this many tokens (0 or empty: no cap)"),
+    ("fit_max_tokens", "bool", "Shorten a max_tokens that does not fit the context instead of answering 400"),
+    ("anthropic_thinking", ("enum", ["model", "on_request"]),
+     "Anthropic requests that do not ask for thinking: think as the model does (model) or not (on_request)"),
+    ("effort_position", ("enum", ["start", "end"]),
+     "Where a non-default reasoning effort goes: start (the default) or end (keeps the cache when it changes)"),
+    ("aliases", "names", "Other model names the server lists and answers to (comma-separated)"),
+    ("idle_unload_s", "num>=0", "Unload the model after this many seconds without requests (0 or empty: never)"),
+    ("lazy_load", "bool", "Start without loading the model; the first request loads it (text only)"),
+    ("engine_silence_s", "num>=0", "End a request when the engine says nothing for this long (default 300 s, 0 = wait)"),
+    ("api_monitor", "bool", "Keep the last 100 requests' prompts and answers in memory for /api-monitor"),
+    ("open_browser", "bool", "Open the chat page in the browser when the model is ready"),
+    ("vram_reserve_mib", ("arg", "--vram-reserve-mib"),
+     "VRAM in MiB the engine leaves free for other programs (engine default 700)"),
+]
+SPEC = {k: kind for k, kind, _ in EDITABLE}
+
+
+def _arg(cfg: dict, flag: str):
+    a = cfg.get("args") if isinstance(cfg.get("args"), list) else []
+    if flag in a[:-1]:
+        v = str(a[a.index(flag) + 1])
+        return int(v) if v.isdigit() else v
+    return None
+
+
+def value_of(cfg: dict, key: str):
+    kind = SPEC[key]
+    if isinstance(kind, tuple) and kind[0] == "sampling":
+        s = cfg.get("sampling")
+        return s.get(key.split(".", 1)[1]) if isinstance(s, dict) else None
+    if isinstance(kind, tuple) and kind[0] == "arg":
+        return _arg(cfg, kind[1])
+    return cfg.get(key)
+
+
+def view(cfg: dict, path: str | Path) -> dict:
+    """GET /config: the editable keys with their values (None: not set, the default applies)."""
+    out = []
+    for key, kind, help_ in EDITABLE:
+        k = kind[0] if isinstance(kind, tuple) else kind
+        out.append({"key": key, "value": value_of(cfg, key), "help": help_,
+                    "kind": "number" if k in ("sampling", "arg", "int>=0", "num>=0") else k,
+                    **({"choices": kind[1]} if k == "enum" else {})})
+    return {"file": Path(path).name, "keys": out,
+            "note": "Saved to the run config; used from the next start of the model."}
+
+
+def _number(key, v, whole=False, lo=0.0, hi=None, lo_open=False):
+    if isinstance(v, bool) or not isinstance(v, (int, float)) or (whole and v != int(v)) or \
+            (v <= lo if lo_open else v < lo) or (hi is not None and v > hi):
+        rng = f"{'more than' if lo_open else 'at least'} {lo:g}" + (f" and at most {hi:g}" if hi is not None else "")
+        raise ValueError(f"{key}: expected a {'whole ' if whole else ''}number, {rng}, not {v!r}")
+    return int(v) if whole else v
+
+
+def check(key: str, v, cfg: dict):
+    """The value to store for `key`, or a ValueError naming what is expected.  None removes the key (its default)."""
+    if key not in SPEC:
+        raise ValueError(f"{key!r} cannot be changed here (only the keys the Settings view lists)")
+    if v is None:
+        return None
+    kind = SPEC[key]
+    k = kind[0] if isinstance(kind, tuple) else kind
+    if k == "bool":
+        if not isinstance(v, bool):
+            raise ValueError(f"{key}: expected true or false, not {v!r}")
+        if key == "lazy_load" and v and cfg.get("vision"):
+            raise ValueError("lazy_load: lazy loading is text-only, and this model reads images (\"vision\")")
+        return v
+    if k == "enum":
+        if v not in kind[1]:
+            raise ValueError(f"{key}: expected one of {', '.join(kind[1])}, not {v!r}")
+        return v
+    if k == "names":
+        if isinstance(v, str):
+            v = [x.strip() for x in v.split(",") if x.strip()]
+        if not isinstance(v, list) or not all(isinstance(x, str) and x.strip() and len(x) <= 128 for x in v):
+            raise ValueError(f"{key}: expected a list of model names, not {v!r}")
+        return v or None
+    if k == "int>=0":
+        return _number(key, v, whole=True)
+    if k == "num>=0":
+        return _number(key, v)
+    if k == "arg":
+        return _number(key, v, whole=True)
+    rule = kind[1]                                     # a sampling key: the server's own rules
+    if rule == "num>=0":
+        return float(_number(key, v))
+    if rule == "0<x<=1":
+        return float(_number(key, v, hi=1, lo_open=True))
+    if rule == "0<=x<=1":
+        return float(_number(key, v, hi=1))
+    return _number(key, v, whole=True, lo=1, hi=64)
+
+
+def apply(cfg: dict, changes: dict) -> tuple[dict, list[str]]:
+    """The config with `changes` ({key: value or None}) made, and the keys that changed.  Every value is checked
+    first, so a request with one bad value changes nothing (ValueError)."""
+    if not isinstance(changes, dict) or not changes:
+        raise ValueError('send {"set": {"<key>": <value or null>, ...}}')
+    checked = {k: check(k, v, cfg) for k, v in changes.items()}
+    new = json.loads(json.dumps(cfg))                  # a deep copy: the caller's dict is left alone
+    changed = []
+    for key, v in checked.items():
+        if value_of(new, key) == v:
+            continue
+        kind = SPEC[key]
+        if isinstance(kind, tuple) and kind[0] == "sampling":
+            s = dict(new.get("sampling") or {}) if isinstance(new.get("sampling"), dict) else {}
+            sub = key.split(".", 1)[1]
+            if v is None:
+                s.pop(sub, None)
+            else:
+                s[sub] = v
+            if s:
+                new["sampling"] = s
+            else:
+                new.pop("sampling", None)
+        elif isinstance(kind, tuple) and kind[0] == "arg":
+            a = list(new.get("args") or [])
+            flag = kind[1]
+            if flag in a[:-1]:
+                i = a.index(flag)
+                if v is None:
+                    del a[i:i + 2]
+                else:
+                    a[i + 1] = str(v)
+            elif v is not None:
+                a += [flag, str(v)]
+            new["args"] = a
+        elif v is None:
+            new.pop(key, None)
+        else:
+            new[key] = v
+        changed.append(key)
+    return new, changed
+
+
+def save(path: str | Path, cfg: dict) -> Path:
+    """The config written whole (a temporary file moved over the old one), the earlier one kept as <name>.bak."""
+    path = Path(path)
+    bak = path.with_name(path.name + ".bak")
+    shutil.copyfile(path, bak)
+    tmp = path.with_name(path.name + ".tmp")
+    tmp.write_text(json.dumps(cfg, indent=1), encoding="utf-8")
+    os.replace(tmp, path)
+    return bak
+
+
+def load(path: str | Path) -> dict:
+    cfg = json.loads(Path(path).read_text(encoding="utf-8-sig"))
+    if not isinstance(cfg, dict):
+        raise ValueError(f"{Path(path).name} is not a JSON object")
+    return cfg
diff --git a/serve/server.py b/serve/server.py
index 26c81cc76d6..4e70c42b5d5 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -53,6 +53,7 @@
 from serve.frontend import (ChatTemplate, Event, OutputParser, anthropic_to_messages,  # noqa: E402
                             images_of, mark_think_literals, openai_to_messages, unmark_think_literals)
 from serve.mcp import McpCancelled, hub_from_config  # noqa: E402
+from serve import runconfig  # noqa: E402
 from serve.winjob import contain  # noqa: E402
 from serve.structured import StructuredOutputError, prepare_format, validated_json  # noqa: E402
 
@@ -1065,6 +1066,8 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         # turn before the answer instead of the top of the prompt, so switching it keeps the cached conversation
         self.effort_end = False
         self.conv_log = ConvCacheLog()                  # #596: the parked conversations, from the engine's log
+        self.config_path = None                         # #564: the run config the web page's Settings view edits
+        self.config_lock = threading.Lock()
         # #321: browser pages of these origins may call /v1/* (CORS; "*" = any page - only with an api_key that
         # matters); empty = no CORS headers at all, as before
         self.cors_origins: list[str] = []
@@ -2296,6 +2299,10 @@ def do_GET(self):
                 if self._authorized():
                     self._json(200, {"shared": bool(svc.shared), "defaults": svc.shared})
                 return
+            if path == "/config":                            # #564: the Settings view's keys of the run config
+                if self._authorized():
+                    self._config_get()
+                return
             if path == "/mcp":
                 # the MCP servers, their state and tools (the web app's switch and Monitor card)
                 if self._authorized():
@@ -2365,6 +2372,9 @@ def do_POST(self):
             if path == "/settings":
                 self._settings()
                 return
+            if path == "/config":
+                self._config_post()
+                return
             # JSON from Strata's own page only, as /settings: else a plain form POST from any site unloads the model
             if path in ("/unload", "/load") and not self._own_page("the model can be loaded or unloaded"):
                 return
@@ -2491,6 +2501,44 @@ def _own_page(self, what) -> bool:
                 return False
             return True
 
+        def _config_get(self):
+            if not svc.config_path:
+                self._json(404, {"error": {"message": "this server was started without a run config"}})
+                return
+            try:
+                cfg = runconfig.load(svc.config_path)
+            except (OSError, ValueError) as e:
+                self._json(500, {"error": {"type": "server_error", "message": f"the run config cannot be read: {e}"}})
+                return
+            self._json(200, runconfig.view(cfg, svc.config_path))
+
+        def _config_post(self):
+            """#564: change a few documented keys of the run config - JSON from Strata's own page only, as
+            /settings (the key is checked before); every other key of the file stays as it is."""
+            body = self.rfile.read(int(self.headers.get("Content-Length", 0)))
+            if not self._own_page("the run config can be changed"):
+                return
+            if not svc.config_path:
+                self._json(404, {"error": {"message": "this server was started without a run config"}})
+                return
+            try:
+                req = json.loads(body or b"{}")
+                with svc.config_lock:
+                    cfg = runconfig.load(svc.config_path)
+                    new, changed = runconfig.apply(cfg, req.get("set") if isinstance(req, dict) else None)
+                    if changed:
+                        bak = runconfig.save(svc.config_path, new)
+            except ValueError as e:
+                self._json(400, {"error": {"type": "invalid_request_error", "message": str(e)}})
+                return
+            except OSError as e:
+                self._json(500, {"error": {"type": "server_error", "message": f"the run config cannot be written: {e}"}})
+                return
+            if changed:
+                print(f"[strata] the Settings view changed {', '.join(changed)} in {Path(svc.config_path).name} "
+                      f"(the earlier file: {bak.name}); used from the next start", flush=True)
+            self._json(200, {**runconfig.view(new, svc.config_path), "changed": changed})
+
         def _settings(self):
             # They change what every client gets, so only the app's own page may set them
             body = self.rfile.read(int(self.headers.get("Content-Length", 0)))
@@ -3134,6 +3182,8 @@ def main() -> int:
     svc.gpu_index = (gpu_list(cfg) or [0])[0]           # the Monitor reads the card the engine runs on (issue #51)
     svc.gpu_indices = gpu_list(cfg)                     # ... or every card of a layer split (issue #112)
     svc.backend = cfg.get("backend")                    # "hip": the AMD cards' readings come from sysfs (#301)
+    if a.config:
+        svc.config_path = a.config                      # #564: the web page's Settings view
     if a.config:                                        # the Chat settings shared with other apps, from last time
         svc.shared_path = str(Path(a.config).with_suffix("")) + ".shared-settings.json"
         try:
diff --git a/serve/test_runconfig.py b/serve/test_runconfig.py
new file mode 100644
index 00000000000..bb171196982
--- /dev/null
+++ b/serve/test_runconfig.py
@@ -0,0 +1,165 @@
+"""serve/test_runconfig.py - #564: the web page's Settings view of the run config (GET / POST /config), against the
+mock engine: only the listed keys change, every other key of the file stays, a bad value changes nothing, and only
+Strata's own page may write it (JSON, no foreign Origin, the API key when one is set).
+
+    python -m unittest serve.test_runconfig
+"""
+from __future__ import annotations
+
+import contextlib
+import io
+import json
+import tempfile
+import unittest
+import urllib.error
+import urllib.request
+from pathlib import Path
+
+from serve import runconfig
+from serve.frontend import ChatTemplate
+from serve.server import ByteTokenizer, MockEngine, Service, serve
+
+ROOT = Path(__file__).resolve().parents[1]
+CFG = {"exe": "engine/strata.exe", "args": ["--pack", "data/packs/q2_0", "--kv", "int8", "--spec-min-p", "0.5"],
+       "model_name": "qwen3.8-flash-next-q2_0", "port": 8080, "host": "0.0.0.0", "api_key": "",
+       "sampling": {"temperature": 0.7, "presence_penalty": 1.5},
+       "mcp_servers": {"files": {"command": "npx", "args": ["-y", "server-filesystem", "."]}},
+       "cors_origins": ["http://localhost:3000"]}
+
+
+class Apply(unittest.TestCase):
+    def test_only_the_named_keys_change(self):
+        new, changed = runconfig.apply(CFG, {"sampling.top_p": 0.95, "reasoning_budget_tokens": 4096,
+                                             "vram_reserve_mib": 2048, "aliases": "qwen, local", "lazy_load": True})
+        self.assertEqual(changed, ["sampling.top_p", "reasoning_budget_tokens", "vram_reserve_mib", "aliases",
+                                   "lazy_load"])
+        self.assertEqual(new["sampling"], {"temperature": 0.7, "presence_penalty": 1.5, "top_p": 0.95})
+        self.assertEqual(new["args"][-2:], ["--vram-reserve-mib", "2048"])
+        self.assertEqual(new["aliases"], ["qwen", "local"])
+        for k in ("exe", "model_name", "port", "host", "api_key", "mcp_servers", "cors_origins"):
+            self.assertEqual(new[k], CFG[k], k)
+        self.assertEqual(CFG["sampling"], {"temperature": 0.7, "presence_penalty": 1.5})   # the input is left alone
+
+    def test_null_is_the_default_again(self):
+        cfg, _ = runconfig.apply(CFG, {"vram_reserve_mib": 2048, "fit_max_tokens": True})
+        new, changed = runconfig.apply(cfg, {"vram_reserve_mib": None, "fit_max_tokens": None,
+                                             "sampling.temperature": None, "idle_unload_s": None})
+        self.assertEqual(changed, ["vram_reserve_mib", "fit_max_tokens", "sampling.temperature"])
+        self.assertEqual(new["args"], CFG["args"])
+        self.assertNotIn("fit_max_tokens", new)
+        self.assertEqual(new["sampling"], {"presence_penalty": 1.5})
+        new, _ = runconfig.apply({"sampling": {"top_k": 20}}, {"sampling.top_k": None})
+        self.assertNotIn("sampling", new)                                 # an empty block goes
+
+    def test_refused(self):
+        for changes in ({"api_key": "x"}, {"host": "0.0.0.0"}, {"mcp_servers": {}}, {"before_load": "calc.exe"},
+                        {"args": []}, {"exe": "evil.exe"}, {"trusted_origins": ["*"]}, {"allowed_hosts": ["*"]},
+                        {"sampling.temperature": -1}, {"sampling.top_p": 0}, {"sampling.top_k": 65},
+                        {"sampling.min_p": 2}, {"reasoning_budget_tokens": 1.5}, {"fit_max_tokens": "yes"},
+                        {"effort_position": "middle"}, {"vram_reserve_mib": -5}, {"idle_unload_s": True},
+                        {"aliases": [1]}, {}, None, ["x"]):
+            with self.subTest(changes=changes), self.assertRaises(ValueError):
+                runconfig.apply(CFG, changes)
+        with self.assertRaises(ValueError):                              # one bad value: nothing is applied
+            runconfig.apply(CFG, {"fit_max_tokens": True, "sampling.top_k": 0})
+        with self.assertRaises(ValueError):
+            runconfig.apply({**CFG, "vision": {"gpu": True}}, {"lazy_load": True})
+
+    def test_view(self):
+        v = runconfig.view({**CFG, "args": CFG["args"] + ["--vram-reserve-mib", "1500"]}, "x/strata-q2_0.json")
+        self.assertEqual(v["file"], "strata-q2_0.json")
+        got = {k["key"]: k for k in v["keys"]}
+        self.assertEqual(got["sampling.temperature"]["value"], 0.7)
+        self.assertEqual(got["vram_reserve_mib"]["value"], 1500)
+        self.assertIsNone(got["fit_max_tokens"]["value"])
+        self.assertEqual(got["anthropic_thinking"]["choices"], ["model", "on_request"])
+        self.assertNotIn("api_key", got)
+        self.assertNotIn("mcp_servers", got)
+
+
+class Http(unittest.TestCase):
+    def setUp(self):
+        self.dir = tempfile.TemporaryDirectory()
+        self.path = Path(self.dir.name) / "strata-q2_0.json"
+        self.path.write_text(json.dumps(CFG, indent=1), encoding="utf-8")
+        tok = ByteTokenizer()
+        self.svc = Service(MockEngine(tok, "ok", max_context=4096), tok, ChatTemplate(ROOT / "serve/chat_template.jinja"))
+        self.svc.config_path = str(self.path)
+        self.httpd = serve(self.svc, port=0)
+        self.host = f"127.0.0.1:{self.httpd.server_address[1]}"
+
+    def tearDown(self):
+        self.httpd.shutdown()
+        self.httpd.server_close()
+        self.dir.cleanup()
+
+    def call(self, method, body=None, headers=None):
+        h = {"Content-Type": "application/json", **(headers or {})}
+        req = urllib.request.Request(f"http://{self.host}/config", method=method, headers=h,
+                                     data=None if body is None else (body if isinstance(body, bytes)
+                                                                     else json.dumps(body).encode()))
+        try:
+            with urllib.request.urlopen(req, timeout=10) as r:
+                return r.status, json.loads(r.read())
+        except urllib.error.HTTPError as e:
+            with e:
+                return e.code, json.loads(e.read())
+
+    def saved(self):
+        return json.loads(self.path.read_text(encoding="utf-8"))
+
+    def test_read_and_write_from_the_page(self):
+        status, v = self.call("GET")
+        self.assertEqual(status, 200, v)
+        self.assertEqual({k["key"]: k["value"] for k in v["keys"]}["sampling.temperature"], 0.7)
+        with contextlib.redirect_stdout(io.StringIO()):
+            status, v = self.call("POST", {"set": {"sampling.temperature": 1.0, "open_browser": False}},
+                                  {"Origin": f"http://{self.host}"})
+        self.assertEqual(status, 200, v)
+        self.assertEqual(v["changed"], ["sampling.temperature", "open_browser"])
+        cfg = self.saved()
+        self.assertEqual(cfg["sampling"]["temperature"], 1.0)
+        self.assertIs(cfg["open_browser"], False)
+        for k in ("mcp_servers", "cors_origins", "host", "args", "exe"):
+            self.assertEqual(cfg[k], CFG[k], k)
+        self.assertEqual(json.loads((self.path.parent / "strata-q2_0.json.bak").read_text(encoding="utf-8")), CFG)
+        status, v = self.call("POST", {"set": {"open_browser": False}})   # no Origin (a script on this PC): allowed
+        self.assertEqual((status, v["changed"]), (200, []))
+
+    def test_only_from_strata_s_own_page(self):
+        before = self.path.read_bytes()
+        status, _ = self.call("POST", {"set": {"fit_max_tokens": True}}, {"Origin": "https://evil.example"})
+        self.assertEqual(status, 403)
+        status, _ = self.call("POST", b'{"set": {"fit_max_tokens": true}}', {"Content-Type": "text/plain"})
+        self.assertEqual(status, 415)
+        for body in ({"set": {"api_key": ""}}, {"set": {"mcp_servers": {"x": {"command": "calc"}}}},
+                     {"set": {"sampling.top_k": 0}}, {"nothing": 1}, b"not json"):
+            status, b = self.call("POST", body, {"Origin": f"http://{self.host}"})
+            self.assertEqual(status, 400, (body, b))
+        self.assertEqual(self.path.read_bytes(), before)                 # nothing was written
+        self.assertFalse((self.path.parent / "strata-q2_0.json.bak").exists())
+
+    def test_the_api_key(self):
+        self.svc.api_key = "secret"
+        self.assertEqual(self.call("GET")[0], 401)
+        self.assertEqual(self.call("POST", {"set": {"fit_max_tokens": True}})[0], 401)
+        with contextlib.redirect_stdout(io.StringIO()):
+            status, _ = self.call("POST", {"set": {"fit_max_tokens": True}}, {"Authorization": "Bearer secret"})
+        self.assertEqual(status, 200)
+        self.assertIs(self.saved()["fit_max_tokens"], True)
+
+    def test_without_a_run_config(self):
+        self.svc.config_path = None
+        self.assertEqual(self.call("GET")[0], 404)
+        self.assertEqual(self.call("POST", {"set": {"fit_max_tokens": True}})[0], 404)
+
+    def test_the_page_has_the_view(self):
+        web = ROOT / "serve" / "web"
+        html, js = (web / "index.html").read_text(encoding="utf-8"), (web / "app.js").read_text(encoding="utf-8")
+        for el in ("cfg-card", "cfg-form", "cfg-save", "cfg-msg"):
+            self.assertIn(f'id="{el}"', html)
+        self.assertIn('fetch("config", {method: "POST", headers: headers(true)', js)
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/serve/web/app.css b/serve/web/app.css
index 9caa070f23e..dd9a3e1fe35 100644
--- a/serve/web/app.css
+++ b/serve/web/app.css
@@ -121,6 +121,12 @@ main { flex: 1; min-height: 0; display: flex; }
 .cc-note { margin: 0; }
 .cc-note:empty { display: none; }
 .mcp-card { display: flex; flex-direction: column; gap: var(--st-s-3); }
+.cfg-form { display: grid; grid-template-columns: minmax(180px, max-content) minmax(0, 1fr); gap: var(--st-s-3) var(--st-s-4);
+            align-items: center; }
+.cfg-form label { font-size: var(--st-fs-sm); font-weight: var(--st-fw-medium); }
+.cfg-form label code { font: 400 12px var(--st-font-mono); color: var(--st-ink-muted); display: block; }
+.cfg-form .st-input { height: 38px; width: 100%; max-width: 360px; }
+.cfg-actions { display: flex; align-items: center; gap: var(--st-s-3); }
 .mcp-server { display: flex; flex-direction: column; gap: var(--st-s-2); padding-top: var(--st-s-3); border-top: 1px solid var(--st-line-soft); }
 .mcp-server:first-child { padding-top: 0; border-top: 0; }
 .mcp-server__head { display: flex; align-items: center; gap: var(--st-s-2); flex-wrap: wrap; font-size: var(--st-fs-sm); }
@@ -161,6 +167,8 @@ main { flex: 1; min-height: 0; display: flex; }
   .metrics { grid-template-columns: repeat(2, minmax(0, 1fr)); }
   .monitor-row { grid-template-columns: 1fr; }
   .cc-bars { grid-template-columns: 1fr; }
+  .cfg-form { grid-template-columns: 1fr; gap: 4px; }
+  .cfg-form .st-input { margin-bottom: var(--st-s-2); }
 }
 @media (max-width: 640px) {
   .st-header { padding: 0 var(--st-s-3); gap: var(--st-s-2); }
diff --git a/serve/web/app.js b/serve/web/app.js
index 64721b4464e..0cc2138c997 100644
--- a/serve/web/app.js
+++ b/serve/web/app.js
@@ -79,6 +79,7 @@ function showTab(name) {
   if (location.hash.slice(1) !== tab) history.replaceState(null, "", tab === "chat" ? location.pathname : `#${tab}`);
   if (tab === "chat") $("input").focus();
   if (tab === "monitor") loadMcp();
+  if (tab === "about") loadConfig();
   if (lastMetrics) render(lastMetrics);
 }
 for (const b of document.querySelectorAll(".st-tab")) b.onclick = () => showTab(b.dataset.tab);
@@ -428,6 +429,62 @@ function renderMcp() {
   }).join("");
 }
 
+// ------------------------------------------------------------------ Model settings (GET / POST /config, #564)
+// A few documented keys of the run config (strata-<model>.json), for every client, from the next start on.  The
+// server lists them, checks every value and keeps every other key of the file as it is.
+let cfgKeys = [];
+async function loadConfig() {
+  let r;
+  try { r = await fetch("config", {headers: headers()}); } catch (e) { return; }
+  if (!r.ok) { $("cfg-card").hidden = true; return; }       // no run config, an older server, or no key yet
+  const c = await r.json();
+  cfgKeys = c.keys || [];
+  $("cfg-file").textContent = c.file || "";
+  $("cfg-form").innerHTML = cfgKeys.map((k, i) => {
+    const id = `cfg-${i}`, v = k.value;
+    let input;
+    if (k.kind === "bool" || k.kind === "enum") {
+      const opts = k.kind === "bool" ? [["true", "on"], ["false", "off"]] : k.choices.map((x) => [x, x]);
+      const cur = v == null ? "" : String(v);
+      input = `<select class="st-input" id="${id}"><option value=""${cur === "" ? " selected" : ""}>default</option>` +
+        opts.map(([val, text]) => `<option value="${esc(val)}"${cur === val ? " selected" : ""}>${esc(text)}</option>`).join("") + `</select>`;
+    } else {
+      const text = v == null ? "" : Array.isArray(v) ? v.join(", ") : String(v);
+      input = `<input class="st-input" id="${id}" ${k.kind === "number" ? 'type="number" step="any" min="0"' : 'type="text"'} ` +
+        `value="${esc(text)}" placeholder="default" autocomplete="off">`;
+    }
+    return `<label for="${id}" title="${esc(k.help)}">${esc(k.help)}<code>${esc(k.key)}</code></label>${input}`;
+  }).join("");
+  $("cfg-card").hidden = false;
+}
+function configValue(k, el) {
+  const s = el.value.trim();
+  if (s === "") return null;
+  if (k.kind === "bool") return s === "true";
+  if (k.kind === "number") return Number(s);
+  return s;                                         // enum, or names (the server splits them at commas)
+}
+$("cfg-save").addEventListener("click", async () => {
+  const set = {};
+  cfgKeys.forEach((k, i) => {
+    const v = configValue(k, $(`cfg-${i}`));
+    const old = Array.isArray(k.value) ? k.value.join(", ") : k.value;
+    if (JSON.stringify(v) !== JSON.stringify(old ?? null)) set[k.key] = v;
+  });
+  if (!Object.keys(set).length) { $("cfg-msg").textContent = "Nothing changed."; return; }
+  try {
+    const r = await fetch("config", {method: "POST", headers: headers(true), body: JSON.stringify({set})});
+    const b = await r.json();
+    if (!r.ok) throw new Error((b.error || {}).message || `HTTP ${r.status}`);
+    $("cfg-msg").textContent = b.changed.length
+      ? `Saved (${b.changed.join(", ")}); the earlier file is ${b.file}.bak. Start the model again to use it.` : "Nothing changed.";
+    loadConfig();
+  } catch (e) {
+    $("cfg-msg").textContent = "";
+    toast("error", "Not saved", String(e.message || e), 6000);
+  }
+});
+
 // ------------------------------------------------------------------ Markdown (escaped first, then formatted)
 function inline(s) {
   const codes = [];
diff --git a/serve/web/index.html b/serve/web/index.html
index cf588762a48..7fb559e3862 100644
--- a/serve/web/index.html
+++ b/serve/web/index.html
@@ -173,6 +173,14 @@
         <p class="muted small">Chats, settings and the key are kept in this browser only.
           <a href="https://github.com/Niko1221/Strata" target="_blank" rel="noopener noreferrer">Strata on GitHub</a></p>
       </div>
+      <div class="st-card cfg-card" id="cfg-card" hidden>
+        <div class="req-head"><span class="card-title">Model settings</span><span class="muted small" id="cfg-file"></span></div>
+        <p class="muted small">Kept in the model's run config for every client. An empty field is the default. They
+          take effect the next time the model starts (close Strata's window and start it again).</p>
+        <form class="cfg-form" id="cfg-form"></form>
+        <div class="cfg-actions"><button class="st-btn" id="cfg-save" type="button">Save</button>
+          <span class="muted small" id="cfg-msg" role="status"></span></div>
+      </div>
     </div>
   </section>
 </main>

From 0ad8f70be456c79dcf5c9591f2daad0e1502de3b Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:27:03 +0200
Subject: [PATCH 103/201] serve: the OpenAI Responses API, POST /v1/responses
 (#451)

Stateless, on the chat path: a Responses request becomes the chat template's
messages, tools and kwargs, runs through Service.run, and its reasoning, text
and tool calls come back as output items and the official typed SSE events
(response.created ... response.completed / incomplete / failed).

- input as a string or items (messages, reasoning, function_call,
  function_call_output, custom tool calls); instructions and leading developer
  messages make one system message; tool results are put in call order
- function, namespace (Codex's MCP/agent tools) and custom tools; hosted tools
  are left out with a log line
- reasoning.effort -> reasoning_effort, max_output_tokens, text.format
  json_schema/json_object through the structured output path
- reasoning returned as reasoning_text (and as opaque encrypted_content when
  asked) and replayed into the prompt, so Codex's next turn reuses the cache
- errors in the Responses format; same API key, Host and Origin checks as /v1
- a response.in_progress event every 15 s while a long prompt is read
  (Codex's idle timeout ignores SSE comments)
- docs: DETAILS.md section with a Codex config.toml

Based on #630 by CC-David-CC (the event assembler, namespace tools, call-id
ordering of results), without its opt-in flag, replay key and crypto
dependency, strict-function and JSON-format refusals, or the second
summary generation pass. Tested with Codex CLI 0.160.0 and openai 2.15.0.

Co-authored-by: David <David@code.contractors>
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 README.md               |   3 +-
 docs/AI_SETUP.md        |   2 +
 docs/DETAILS.md         |  61 +++++
 serve/responses.py      | 538 ++++++++++++++++++++++++++++++++++++++++
 serve/server.py         | 150 ++++++++++-
 serve/test_responses.py | 361 +++++++++++++++++++++++++++
 6 files changed, 1109 insertions(+), 6 deletions(-)
 create mode 100644 serve/responses.py
 create mode 100644 serve/test_responses.py

diff --git a/README.md b/README.md
index 0959ca8532e..0501eba279b 100644
--- a/README.md
+++ b/README.md
@@ -125,7 +125,8 @@ Sizes, downloads and what fits where: [docs/MODELS.md](docs/MODELS.md). You can
   **About** with the settings and addresses.
 - **Your apps and coding agents:** add an "OpenAI-compatible" provider with base URL **`http://127.0.0.1:8080/v1`**,
   any API key and any model name. Apps that use Anthropic's API: `http://127.0.0.1:8080/v1/messages` (Claude Code:
-  `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`). Codex CLI and other Responses API apps: `/v1/responses`
+  ([setup](docs/DETAILS.md#the-responses-api-and-codex-cli)).
 - **Thinking:** choose **off, low, medium or high** in the chat menu or your app's "reasoning effort". Off is
   fastest; high is best for hard questions.
 - **Pictures:** say yes to "Images?" in setup, then click **Picture** in the chat, or attach them in your app
diff --git a/docs/AI_SETUP.md b/docs/AI_SETUP.md
index 48fd1429237..8b6e1bb96c6 100644
--- a/docs/AI_SETUP.md
+++ b/docs/AI_SETUP.md
@@ -168,6 +168,8 @@ line when it is ready; the engine log is `strata-<model>.log` in the Strata fold
 - **Any OpenAI-compatible app or agent:** base URL `http://127.0.0.1:8080/v1`, any API key (or the configured one),
   any model name.
 - **Anthropic-compatible apps:** `http://127.0.0.1:8080/v1/messages`.
+- **Codex CLI and other Responses API apps:** `http://127.0.0.1:8080/v1/responses` (stateless; Codex's
+  `config.toml`: [DETAILS.md](DETAILS.md#the-responses-api-and-codex-cli)).
 - **Claude Code:** `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`, `ANTHROPIC_MODEL` set to a Claude model name it knows
   (Strata ignores the name), and any `ANTHROPIC_AUTH_TOKEN` (or the configured key).
 - **Thinking level:** `"reasoning_effort": "none" | "low" | "medium" | "high"` (default high).
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..1c732c5b75d 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -435,6 +435,7 @@ The server listens on `http://127.0.0.1:8080` (change with `--port` in setup, or
 | --- | --- |
 | OpenAI Chat Completions (stream and non-stream, tools) | `POST /v1/chat/completions` |
 | Anthropic Messages (stream and non-stream, tools) | `POST /v1/messages` |
+| OpenAI Responses (stream and non-stream, tools; stateless, [below](#the-responses-api-and-codex-cli)) | `POST /v1/responses` |
 | Model list / health | `GET /v1/models`, `GET /models`, `GET /health` |
 | Model properties | `GET /props` (also accepts `?model=<loaded-model-id>`) |
 | What the model is doing right now | `GET /status`, `GET /slots` (single slot, busy or idle) |
@@ -520,6 +521,7 @@ print(r.choices[0].message.content)
 - **Claude Code** (Strata 0.1.17 or newer): set `ANTHROPIC_BASE_URL=http://127.0.0.1:8080` and
   `ANTHROPIC_MODEL` to a Claude model name it knows (it refuses names it doesn't; Strata ignores the name), plus any
   `ANTHROPIC_AUTH_TOKEN` (or your `api_key`, if you set one).
+- **Codex CLI** (0.1.39): see [the Responses API](#the-responses-api-and-codex-cli) below.
 - **Context.** Chosen in setup (8K-262K). Requests longer than that are refused, never silently cut. A request whose
   `max_tokens` would run past the context is refused too (400); agents that always ask for their full output cap
   can instead get it shortened to the room left: add `"fit_max_tokens": true` to `strata-<model>.json` (or pass
@@ -631,6 +633,65 @@ without penalties, so more of its guesses are now rejected. Requests without pen
 
 ---
 
+### The Responses API and Codex CLI
+
+`POST /v1/responses` (0.1.39, #451) speaks OpenAI's newer Responses API, which Codex CLI uses (it no longer
+speaks Chat Completions). It runs on the same path as `/v1/chat/completions`, so the thinking levels, the thinking
+budget, the conversation cache and the same API key, Host and Origin checks apply.
+
+It is **stateless**: nothing is stored, so the client sends the whole conversation in `input` every time (Codex does,
+with `store: false`). `previous_response_id`, `conversation`, `background` and the retrieve/delete/cancel endpoints
+are refused with an error that says so.
+
+| Request | What Strata does |
+| --- | --- |
+| `input` as a string, or as items | `message` items (`user`, `assistant`, `system`, `developer`; text and images), `reasoning`, `function_call`, `function_call_output`, `custom_tool_call(_output)` |
+| `instructions` | The system message (with leading `developer` messages; later ones become user messages, as on the chat path) |
+| `tools` | `function` tools, `namespace` tools (the model sees `namespace.name`; calls come back with `namespace` and `name`), `custom` tools (one free-form `input` string). Hosted tools (`web_search`, `file_search`, ...) are left out: the model cannot run them |
+| `tool_choice` | `"none"` hides the tools; anything else lets the model choose (it cannot be forced) |
+| `reasoning.effort` | `none`/`minimal`, `low`, `medium`, `high`/`xhigh`; without it the model's default (high) |
+| `max_output_tokens` | The output cap (thinking included). Running out ends the response `incomplete` (`max_output_tokens`) |
+| `text.format` | `json_schema` and `json_object` use the [JSON response formats](#json-response-formats) (checked, not constrained) |
+| `temperature`, `top_p`, `reasoning_budget_tokens`, ... | As on the chat path |
+
+The model's thinking comes back as a `reasoning` output item with `reasoning_text` content (streamed as
+`response.reasoning_text.delta`). This model writes no separate summaries, so `summary` is empty. With
+`"include": ["reasoning.encrypted_content"]` the item also carries `encrypted_content`: an opaque string (base64, not
+encrypted; the client already holds the text). Send the reasoning items back with the rest of the conversation, as
+Codex does: their thinking goes back into the prompt, so it matches what the model wrote and the conversation cache
+is reused.
+
+With `"stream": true` the events are the official ones, in order: `response.created`, `response.in_progress`, then
+for each output item `response.output_item.added`, its deltas (`response.reasoning_text.delta`,
+`response.output_text.delta`, `response.function_call_arguments.delta`), its `...done` events and
+`response.output_item.done`, and at the end `response.completed`, `response.incomplete` or `response.failed`.
+While a long prompt is read, a `response.in_progress` event goes out every 15 s, which Codex counts as activity.
+Errors before the answer starts have the Responses form (`{"error": {"message", "type", "param", "code"}}`); after
+it started they arrive as `response.failed`.
+
+**Codex CLI.** In `~/.codex/config.toml` (Windows: `%USERPROFILE%\.codex\config.toml`):
+
+```toml
+model = "strata"                        # any name; Strata answers with its model
+model_provider = "strata"
+model_context_window = 32768            # the context you chose in setup: Codex compacts before it gets there
+show_raw_agent_reasoning = true         # show the model's thinking (it writes no summaries)
+# model_reasoning_effort = "medium"     # none, low, medium or high; default: the model's (high)
+
+[model_providers.strata]
+name = "Strata (local)"
+base_url = "http://127.0.0.1:8080/v1"
+wire_api = "responses"
+stream_idle_timeout_ms = 600000         # a first, long prompt can take minutes to read
+# env_key = "STRATA_API_KEY"            # only if the server has an api_key: the variable holding it
+```
+
+Then run `codex` (or `codex exec "..."`) as usual. Codex warns `Model metadata for ... not found` for a local model
+name; that is expected. Measured with Codex CLI 0.160.0 and Q2_0 on an RTX 5070: its first prompt (instructions and
+tool descriptions) was 9,443 tokens, read in 10 s; in a tool loop, each later turn reused about 96% of the prompt from
+the cache and read only the new part in 1-2 s. On Windows, Codex's sandbox rejected every shell command in that test
+until it was started with `-c 'windows.sandbox="unelevated"'` (a Codex setting, not Strata's).
+
 ## Tools from MCP servers
 
 The chat page can give the model tools from [MCP](https://modelcontextprotocol.io) servers, as LM Studio and Claude
diff --git a/serve/responses.py b/serve/responses.py
new file mode 100644
index 00000000000..4a017c38d83
--- /dev/null
+++ b/serve/responses.py
@@ -0,0 +1,538 @@
+"""serve/responses.py - #451: OpenAI's Responses API (POST /v1/responses), stateless, on the chat path.
+
+A Responses request becomes the same template messages, tools and kwargs a Chat Completions request does, runs through
+the same Service.run, and its events (reasoning, text, tool calls) come back as Responses output items and typed SSE
+events.  Nothing is stored: the client sends the whole conversation in `input` every time (`store: false`, as Codex CLI
+does), including the reasoning, message and function_call items of earlier answers.
+
+Codex CLI is the first client.  What it needs, and what this does:
+  * `instructions` and `developer` messages -> the system message (leading ones merged, so the prompt start is stable
+    and the conversation cache holds across turns);
+  * function tools, also inside `namespace` tools (Codex's MCP and agent tools: the model sees `namespace.name`) and
+    `custom` tools (a free-form `input` string); hosted tools (web search, ...) are left out, the model cannot run them;
+  * reasoning items: the model's thinking is returned as `reasoning_text` content (no summaries: this model does not
+    write them, see docs/DETAILS.md) and, when `include` asks for `reasoning.encrypted_content`, also as an opaque
+    `encrypted_content` string (base64, not encrypted: the client already holds the text).  Either form sent back is
+    put into the conversation again, so the prompt matches what the model wrote and the cache is reused;
+  * the official event order: response.created, response.in_progress, response.output_item.added, deltas,
+    ...done events, response.output_item.done, and response.completed / response.incomplete / response.failed.
+
+Based on #630 by CC-David-CC (the item/event assembler, namespace tools, call_id ordering of tool results).
+"""
+from __future__ import annotations
+
+import base64
+import copy
+import json
+import time
+import uuid
+
+from serve.frontend import Event, _late_system_to_user, _parts_of, effort_kwargs
+
+ENCRYPTED_PREFIX = "strata.r1:"                   # our own reasoning replay strings; others' are ignored
+HOSTED_TOOLS = ("web_search", "web_search_preview", "file_search", "computer_use_preview", "computer_use",
+                "code_interpreter", "image_generation", "local_shell", "mcp", "tool_search")
+
+
+class ResponsesError(ValueError):
+    """A request error in the Responses format: {"error": {"message", "type", "param", "code"}}."""
+
+    def __init__(self, message, param=None, code=None, status=400, kind="invalid_request_error"):
+        super().__init__(message)
+        self.param, self.code, self.status, self.kind = param, code, status, kind
+
+    def body(self):
+        return error_body(str(self), self.kind, self.param, self.code)
+
+
+def error_body(message, kind="invalid_request_error", param=None, code=None) -> dict:
+    return {"error": {"message": message, "type": kind, "param": param, "code": code}}
+
+
+def new_id(prefix: str) -> str:
+    return f"{prefix}_{uuid.uuid4().hex}"
+
+
+# ------------------------------------------------------------------------------------------------ request -> chat
+def _content(content, param):
+    """A message's (or a tool output's) content -> the template's form: a string, or text and image parts."""
+    if content is None:
+        return ""
+    if isinstance(content, str):
+        return content
+    if not isinstance(content, list):
+        raise ResponsesError("expected a string or an array of content parts", param)
+    parts = []
+    for j, part in enumerate(content):
+        if isinstance(part, str):
+            parts.append({"type": "text", "text": part})
+            continue
+        if not isinstance(part, dict):
+            raise ResponsesError("expected a content part object", f"{param}[{j}]")
+        kind = part.get("type")
+        if kind in ("input_text", "output_text", "text", "summary_text", "reasoning_text"):
+            parts.append({"type": "text", "text": part.get("text") or ""})
+        elif kind == "refusal":
+            parts.append({"type": "text", "text": part.get("refusal") or ""})
+        elif kind in ("input_image", "image_url"):
+            if not part.get("image_url"):
+                raise ResponsesError("only images given as image_url (a data: or http(s) URL) are supported; "
+                                     "this server keeps no files", f"{param}[{j}]", "unsupported_parameter")
+            parts.append({"type": "input_image", "image_url": part["image_url"]})
+        else:
+            raise ResponsesError(f"content parts of type {kind!r} are not supported (text and images are)",
+                                 f"{param}[{j}].type", "unsupported_parameter")
+    return _parts_of(parts)
+
+
+def _reasoning_text(item, param) -> str:
+    """The thinking a reasoning item carries: its reasoning_text content, else our own encrypted_content.  A summary
+    alone, or another server's encrypted_content, carries none that can go back into the prompt."""
+    texts = [p.get("text") or "" for p in item.get("content") or [] if isinstance(p, dict)
+             and p.get("type") in ("reasoning_text", "text")]
+    if texts:
+        return "".join(texts)
+    enc = item.get("encrypted_content")
+    if isinstance(enc, str) and enc.startswith(ENCRYPTED_PREFIX):
+        try:
+            return json.loads(base64.b64decode(enc[len(ENCRYPTED_PREFIX):], validate=True).decode("utf-8"))["text"]
+        except (ValueError, KeyError, TypeError, UnicodeError):
+            raise ResponsesError("this reasoning item's encrypted_content is damaged", param + ".encrypted_content",
+                                 "invalid_encrypted_content") from None
+    return ""
+
+
+def _arguments(raw, param) -> dict:
+    """A function_call's arguments (a JSON string) -> the mapping the template renders.  Arguments that are not a JSON
+    object (a call the output ended inside) are kept as text rather than refusing the whole conversation."""
+    if isinstance(raw, dict):
+        return raw
+    if raw is None or (isinstance(raw, str) and not raw.strip()):
+        return {}
+    if not isinstance(raw, str):
+        raise ResponsesError("function_call arguments must be a JSON string", param)
+    try:
+        value = json.loads(raw)
+    except ValueError:
+        return {"arguments": raw}
+    return value if isinstance(value, dict) else {"arguments": value}
+
+
+def _tool_output(item, param):
+    out = item.get("output")
+    if isinstance(out, dict):                        # some clients send a JSON result as an object
+        return json.dumps(out, ensure_ascii=False)
+    return out if isinstance(out, str) else _content(out, param + ".output")
+
+
+def input_messages(req: dict) -> list[dict]:
+    """`instructions` + `input` -> the chat template's messages."""
+    messages = []
+    instructions = req.get("instructions")
+    if instructions not in (None, ""):
+        messages.append({"role": "system", "content": _content(instructions, "instructions")
+                         if not isinstance(instructions, str) else instructions})
+    items = req.get("input")
+    if items is None:
+        raise ResponsesError("input is required: a string or an array of input items", "input", "missing_required_parameter")
+    if isinstance(items, str):
+        items = [{"type": "message", "role": "user", "content": items}]
+    if not isinstance(items, list):
+        raise ResponsesError("input must be a string or an array of input items", "input")
+    thinking = []                                    # reasoning waiting for the assistant turn it belongs to
+    open_turn = None                                 # the assistant message the next function_call joins
+
+    def turn(content=""):
+        nonlocal open_turn
+        open_turn = {"role": "assistant", "content": content}
+        if thinking:
+            open_turn["reasoning_content"] = "".join(thinking)
+            thinking.clear()
+        messages.append(open_turn)
+        return open_turn
+
+    for i, item in enumerate(items):
+        param = f"input[{i}]"
+        if not isinstance(item, dict):
+            raise ResponsesError("expected an input item object", param)
+        kind = item.get("type") or ("message" if "role" in item else None)
+        if kind == "message":
+            role = item.get("role")
+            if role not in ("user", "assistant", "system", "developer"):
+                raise ResponsesError(f"unknown message role {role!r}", param + ".role")
+            content = _content(item.get("content"), param + ".content")
+            if role == "assistant":
+                turn(content if isinstance(content, str) else "".join(
+                    p.get("text", "") for p in content if p.get("type") == "text"))
+            else:
+                open_turn = None
+                thinking.clear()
+                messages.append({"role": "system" if role == "developer" else role, "content": content})
+        elif kind == "reasoning":
+            text = _reasoning_text(item, param)
+            if text:
+                if open_turn is not None and (open_turn.get("tool_calls") or open_turn["content"]):
+                    open_turn = None                 # thinking starts a new model turn
+                thinking.append(text)
+        elif kind in ("function_call", "custom_tool_call"):
+            name = item.get("name")
+            if not isinstance(name, str) or not name:
+                raise ResponsesError("a function_call needs a name", param + ".name")
+            if item.get("namespace"):
+                name = f"{item['namespace']}.{name}"
+            if kind == "function_call":
+                args = _arguments(item.get("arguments"), param + ".arguments")
+            else:
+                args = {"input": item.get("input") if isinstance(item.get("input"), str) else ""}
+            target = open_turn if open_turn is not None and not thinking else turn()
+            target.setdefault("tool_calls", []).append({"function": {"name": name, "arguments": args},
+                                                        "_call_id": item.get("call_id")})
+        elif kind in ("function_call_output", "custom_tool_call_output"):
+            messages.append({"role": "tool", "content": _tool_output(item, param), "_call_id": item.get("call_id")})
+            open_turn = None
+            thinking.clear()
+        elif kind == "item_reference":
+            raise ResponsesError("item references need stored responses, and this server keeps none: send the items "
+                                 "themselves", param, "unsupported_parameter")
+        else:
+            raise ResponsesError(f"input items of type {kind!r} are not supported", param + ".type",
+                                 "unsupported_parameter")
+    _order_tool_results(messages)
+    # leading system/developer messages (Codex: instructions, then its developer message) become one system message
+    # at the start; later ones become user messages in place, as on the chat path
+    lead = 0
+    while lead < len(messages) and messages[lead]["role"] == "system" and isinstance(messages[lead]["content"], str):
+        lead += 1
+    if lead > 1:
+        messages[:lead] = [{"role": "system", "content": "\n\n".join(m["content"] for m in messages[:lead])}]
+    return _late_system_to_user(messages)
+
+
+def _order_tool_results(messages):
+    """The template places tool results by position: each run of tool messages is put in the order of the calls of
+    the assistant turn before it (a client may send the results in the order they finished), then the private call
+    ids are dropped."""
+    i = 0
+    while i < len(messages):
+        if messages[i]["role"] != "tool":
+            i += 1
+            continue
+        j = i
+        while j < len(messages) and messages[j]["role"] == "tool":
+            j += 1
+        prev = messages[i - 1] if i else {}
+        order = [c.get("_call_id") for c in prev.get("tool_calls") or []]
+        rank = {cid: k for k, cid in enumerate(order) if cid}
+        messages[i:j] = sorted(messages[i:j], key=lambda m: rank.get(m.get("_call_id"), len(order)))
+        i = j
+    for m in messages:
+        m.pop("_call_id", None)
+        for c in m.get("tool_calls") or []:
+            c.pop("_call_id", None)
+
+
+def request_tools(req: dict):
+    """-> (template tools or None, {template name: (namespace, name, kind)}, names of hosted tools left out)."""
+    tools, names, skipped = [], {}, []
+    given = req.get("tools") or []
+    if not isinstance(given, list):
+        raise ResponsesError("tools must be an array", "tools")
+
+    def add(tool, param, namespace=None, ns_description=""):
+        kind = tool.get("type")
+        name = tool.get("name")
+        if not isinstance(name, str) or not name:
+            raise ResponsesError("a tool needs a name", param + ".name")
+        flat = f"{namespace}.{name}" if namespace else name
+        description = tool.get("description") or ""
+        if ns_description:
+            description = ns_description + ("\n\n" + description if description else "")
+        if kind == "function":
+            params = tool.get("parameters") or {"type": "object", "properties": {}}
+        else:                                        # custom: free-form text, maybe in a grammar the model reads
+            fmt = tool.get("format") or {}
+            if isinstance(fmt, dict) and fmt.get("type") == "grammar" and fmt.get("definition"):
+                description += f"\n\nThe input must follow this {fmt.get('syntax', '')} grammar:\n{fmt['definition']}"
+            params = {"type": "object", "properties": {"input": {"type": "string", "description": "the raw input"}},
+                      "required": ["input"]}
+        tools.append({"name": flat, "description": description, "parameters": params})
+        names[flat] = (namespace, name, kind)
+
+    for i, tool in enumerate(given):
+        param = f"tools[{i}]"
+        if not isinstance(tool, dict):
+            raise ResponsesError("expected a tool object", param)
+        kind = tool.get("type")
+        if kind in ("function", "custom"):
+            add(tool, param)
+        elif kind == "namespace":
+            for j, member in enumerate(tool.get("tools") or []):
+                if not isinstance(member, dict) or member.get("type", "function") not in ("function", "custom"):
+                    raise ResponsesError("a namespace holds function tools", f"{param}.tools[{j}]")
+                add({"type": "function", **member}, f"{param}.tools[{j}]", tool.get("name"),
+                    tool.get("description") or "")
+        elif kind in HOSTED_TOOLS or isinstance(kind, str):
+            skipped.append(kind)                     # the model cannot run OpenAI's hosted tools: left out
+        else:
+            raise ResponsesError("a tool needs a type", param + ".type")
+    choice = req.get("tool_choice")
+    if choice == "none":
+        return None, names, skipped
+    return tools or None, names, skipped
+
+
+def text_format(req: dict):
+    """`text.format` -> the chat path's response_format (None: plain text)."""
+    text = req.get("text")
+    if text is None:
+        return None
+    if not isinstance(text, dict):
+        raise ResponsesError("text must be an object", "text")
+    fmt = text.get("format")
+    if fmt is None:
+        return None
+    if not isinstance(fmt, dict):
+        raise ResponsesError("text.format must be an object", "text.format")
+    kind = fmt.get("type")
+    if kind in (None, "text"):
+        return None
+    if kind == "json_object":
+        return {"type": "json_object"}
+    if kind == "json_schema":
+        spec = {k: fmt[k] for k in ("name", "schema", "strict", "description") if k in fmt}
+        return {"type": "json_schema", "json_schema": spec}
+    raise ResponsesError("text.format.type must be text, json_object or json_schema", "text.format.type")
+
+
+def check_request(req: dict) -> None:
+    """What this stateless server cannot do, refused before anything runs."""
+    if req.get("previous_response_id"):
+        raise ResponsesError("this server keeps no responses (stateless): send the whole conversation in input "
+                             "instead of previous_response_id", "previous_response_id", "unsupported_parameter")
+    if req.get("conversation"):
+        raise ResponsesError("this server keeps no conversations (stateless): send the whole conversation in input",
+                             "conversation", "unsupported_parameter")
+    if req.get("background"):
+        raise ResponsesError("background responses are not supported: use stream or wait for the answer",
+                             "background", "unsupported_parameter")
+    if req.get("prompt"):
+        raise ResponsesError("stored prompt templates are not supported: send instructions and input",
+                             "prompt", "unsupported_parameter")
+    n = req.get("max_output_tokens")
+    if n is not None and (isinstance(n, bool) or not isinstance(n, int) or n < 1):
+        raise ResponsesError("max_output_tokens must be a positive whole number", "max_output_tokens")
+    reasoning = req.get("reasoning")
+    if reasoning is not None and not isinstance(reasoning, dict):
+        raise ResponsesError("reasoning must be an object", "reasoning")
+
+
+def template_kwargs(req: dict, shared: dict) -> dict:
+    effort = (req.get("reasoning") or {}).get("effort")
+    if effort is None:
+        effort = shared.get("reasoning_effort")      # the Chat settings shared with apps, as on the chat path
+    try:
+        return effort_kwargs(effort)
+    except ValueError as e:
+        raise ResponsesError(str(e), "reasoning.effort") from None
+
+
+# ------------------------------------------------------------------------------------------------ output
+class Assembler:
+    """One response: its output items and its typed events, built from Service.run's events.  The non-streaming
+    answer is the `response` of the last event, so both modes are the same items."""
+
+    def __init__(self, req: dict, model: str, prompt_tokens: int, names: dict, encrypted: bool,
+                 json_mode: bool = False):
+        self.names, self.encrypted, self.json_mode = names, encrypted, json_mode
+        self.prompt_tokens = prompt_tokens
+        self.seq = 0
+        self.item = None                             # the open output item
+        self.json_text = []                          # structured output: the answer, held until it is checked
+        reasoning = req.get("reasoning") if isinstance(req.get("reasoning"), dict) else {}
+        self.response = {
+            "id": new_id("resp"), "object": "response", "created_at": int(time.time()), "status": "in_progress",
+            "background": False, "error": None, "incomplete_details": None,
+            "instructions": req.get("instructions"), "max_output_tokens": req.get("max_output_tokens"),
+            "model": model, "output": [], "parallel_tool_calls": req.get("parallel_tool_calls", True),
+            "previous_response_id": None,
+            "reasoning": {"effort": reasoning.get("effort"), "summary": reasoning.get("summary")},
+            "store": False, "temperature": req.get("temperature"),
+            "text": req.get("text") if isinstance(req.get("text"), dict) else {"format": {"type": "text"}},
+            "tool_choice": req.get("tool_choice", "auto"), "tools": req.get("tools") or [],
+            "top_p": req.get("top_p"), "truncation": "disabled", "usage": None, "user": None,
+            "metadata": req.get("metadata") or {}}
+
+    # --- events
+    def event(self, kind, **data) -> dict:
+        e = {"type": kind, "sequence_number": self.seq, **data}
+        self.seq += 1
+        return e
+
+    def snapshot(self) -> dict:
+        return copy.deepcopy(self.response)
+
+    def start(self) -> list[dict]:
+        return [self.event("response.created", response=self.snapshot()),
+                self.event("response.in_progress", response=self.snapshot())]
+
+    def in_progress(self) -> dict:
+        """A keep-alive a client counts as activity (SSE comments are not events: Codex's idle timer ignores them)."""
+        return self.event("response.in_progress", response=self.snapshot())
+
+    def _open(self, item) -> list[dict]:
+        self.response["output"].append(item)
+        self.item = item
+        out = [self.event("response.output_item.added", output_index=self.index, item=copy.deepcopy(item))]
+        if item["type"] == "message":
+            part = {"type": "output_text", "text": "", "annotations": [], "logprobs": []}
+            item["content"].append(part)
+            out.append(self.event("response.content_part.added", item_id=item["id"], output_index=self.index,
+                                  content_index=0, part=copy.deepcopy(part)))
+        return out
+
+    @property
+    def index(self) -> int:
+        return len(self.response["output"]) - 1
+
+    def close(self, status="completed") -> list[dict]:
+        item, self.item = self.item, None
+        if item is None:
+            return []
+        at, out = self.response["output"].index(item), []
+        item["status"] = status
+        if item["type"] == "message":
+            part = item["content"][0]
+            out += [self.event("response.output_text.done", item_id=item["id"], output_index=at, content_index=0,
+                               text=part["text"], logprobs=[]),
+                    self.event("response.content_part.done", item_id=item["id"], output_index=at, content_index=0,
+                               part=copy.deepcopy(part))]
+        elif item["type"] == "reasoning":
+            text = item["content"][0]["text"]
+            out.append(self.event("response.reasoning_text.done", item_id=item["id"], output_index=at,
+                                  content_index=0, text=text))
+            if self.encrypted:
+                item["encrypted_content"] = ENCRYPTED_PREFIX + base64.b64encode(
+                    json.dumps({"text": text}, ensure_ascii=False).encode("utf-8")).decode("ascii")
+        elif item["type"] == "function_call":
+            out.append(self.event("response.function_call_arguments.done", item_id=item["id"], output_index=at,
+                                  name=item["name"], arguments=item["arguments"]))
+        elif item["type"] == "custom_tool_call":
+            out.append(self.event("response.custom_tool_call_input.done", item_id=item["id"], output_index=at,
+                                  input=item["input"]))
+        out.append(self.event("response.output_item.done", output_index=at, item=copy.deepcopy(item)))
+        return out
+
+    def feed(self, ev: Event) -> list[dict]:
+        out = []
+        kind = ev.kind
+        if kind == "reasoning":
+            if not ev.text:
+                return out
+            if self.item is None or self.item["type"] != "reasoning":
+                out += self.close()
+                out += self._open({"id": new_id("rs"), "type": "reasoning", "status": "in_progress", "summary": [],
+                                   "content": [{"type": "reasoning_text", "text": ""}]})
+            self.item["content"][0]["text"] += ev.text
+            out.append(self.event("response.reasoning_text.delta", item_id=self.item["id"], output_index=self.index,
+                                  content_index=0, delta=ev.text))
+        elif kind == "content":
+            if not ev.text:
+                return out
+            if self.json_mode:                       # sent once it is checked (finish)
+                out += self.close()
+                self.json_text.append(ev.text)
+                return out
+            if self.item is None or self.item["type"] != "message":
+                out += self.close()
+                out += self._open({"id": new_id("msg"), "type": "message", "status": "in_progress",
+                                   "role": "assistant", "content": []})
+            self.item["content"][0]["text"] += ev.text
+            out.append(self.event("response.output_text.delta", item_id=self.item["id"], output_index=self.index,
+                                  content_index=0, delta=ev.text, logprobs=[]))
+        elif kind == "tool_start":
+            out += self.close()
+            out += self._open(self._call_item(ev))
+        elif kind == "tool_args":
+            item = self.item
+            if item is None or item.get("call_id") != ev.call.id:
+                return out
+            if item["type"] == "function_call":         # a custom tool's input is sent whole, at its end
+                item["arguments"] += ev.text
+                out.append(self.event("response.function_call_arguments.delta", item_id=item["id"],
+                                      output_index=self.index, delta=ev.text))
+        elif kind == "tool_call":
+            item = self.item
+            if item is None or item.get("call_id") != ev.call.id:     # a call that was not announced while written
+                out += self.close()
+                out += self._open(self._call_item(ev))
+                item = self.item
+                if item["type"] == "function_call":
+                    item["arguments"] = json.dumps(ev.call.arguments, ensure_ascii=False)
+                    out.append(self.event("response.function_call_arguments.delta", item_id=item["id"],
+                                          output_index=self.index, delta=item["arguments"]))
+            if item["type"] == "custom_tool_call":
+                value = ev.call.arguments.get("input") if isinstance(ev.call.arguments, dict) else None
+                item["input"] = value if isinstance(value, str) else json.dumps(ev.call.arguments, ensure_ascii=False)
+                out.append(self.event("response.custom_tool_call_input.delta", item_id=item["id"],
+                                      output_index=self.index, delta=item["input"]))
+            out += self.close()
+        return out
+
+    def _call_item(self, ev: Event) -> dict:
+        namespace, name, kind = self.names.get(ev.call.name, (None, ev.call.name, "function"))
+        if kind == "custom":
+            item = {"id": new_id("ctc"), "type": "custom_tool_call", "status": "in_progress", "call_id": ev.call.id,
+                    "name": name, "input": ""}
+        else:
+            item = {"id": new_id("fc"), "type": "function_call", "status": "in_progress", "call_id": ev.call.id,
+                    "name": name, "arguments": ""}
+        if namespace:
+            item["namespace"] = namespace
+        return item
+
+    def finish(self, done: dict, validate=None) -> list[dict]:
+        """The end: close what is open, then response.completed (or .incomplete when max_output_tokens ran out).
+        `validate(text, finish)` checks a structured answer and returns its text (or raises)."""
+        length = done.get("finish") == "length"
+        # a call still open was cut off (its tool_call never came, #211): incomplete, whatever the finish
+        unfinished = self.item is not None and self.item["type"] in ("function_call", "custom_tool_call")
+        out = self.close("incomplete" if length or unfinished else "completed")
+        if self.json_mode:
+            text = validate("".join(self.json_text), done.get("finish"))
+            out += self._open({"id": new_id("msg"), "type": "message", "status": "in_progress", "role": "assistant",
+                               "content": []})
+            self.item["content"][0]["text"] = text
+            out.append(self.event("response.output_text.delta", item_id=self.item["id"], output_index=self.index,
+                                  content_index=0, delta=text, logprobs=[]))
+            out += self.close()
+        n = done.get("completion_tokens", 0)
+        prompt = done.get("prompt_tokens", self.prompt_tokens)
+        self.response["usage"] = {
+            "input_tokens": prompt, "input_tokens_details": {"cached_tokens": min(done.get("reused") or 0, prompt)},
+            "output_tokens": n, "output_tokens_details": {"reasoning_tokens": done.get("reasoning_tokens", 0)},
+            "total_tokens": prompt + n}
+        if length:
+            self.response["status"] = "incomplete"
+            self.response["incomplete_details"] = {"reason": "max_output_tokens"}
+            return out + [self.event("response.incomplete", response=self.snapshot())]
+        self.response["status"] = "completed"
+        self.response["completed_at"] = int(time.time())
+        return out + [self.event("response.completed", response=self.snapshot())]
+
+    def failed(self, message: str, code: str = "server_error") -> dict:
+        """response.failed: an error after the stream started (the HTTP status is already sent)."""
+        if self.item is not None:
+            self.item["status"] = "incomplete"
+            self.item = None
+        self.response["status"] = "failed"
+        self.response["error"] = {"code": code, "message": message}
+        return self.event("response.failed", response=self.snapshot())
+
+
+def collect(events) -> dict:
+    """The non-streaming answer: the final response object."""
+    last = None
+    for e in events:
+        if e is not None:
+            last = e
+    return last["response"]
diff --git a/serve/server.py b/serve/server.py
index fb1dbbcd2b5..21aa6e38ba4 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -55,6 +55,8 @@
 from serve.mcp import McpCancelled, hub_from_config  # noqa: E402
 from serve.winjob import contain  # noqa: E402
 from serve.structured import StructuredOutputError, prepare_format, validated_json  # noqa: E402
+from serve import responses as responses_api  # noqa: E402
+from serve.responses import ResponsesError, error_body as responses_error_body  # noqa: E402
 
 IM_END = "<|im_end|>"
 IMAGE_PAD = "<|image_pad|>"
@@ -1321,7 +1323,7 @@ def scaled(v, unit, digits=0):
             "cache_max_tokens": ctx,
             "context": {"native": ctx, "max_positions": ctx},
             "concurrency": {"serving": 1, "requested": 1},       # one request at a time; more wait their turn
-            "dialects": ["/v1/chat/completions", "/v1/messages"],
+            "dialects": ["/v1/chat/completions", "/v1/messages", "/v1/responses"],
             "vision": {"enabled": images, "available": images, "error": None},
             "activity": {"requests": totals["requests"] + int(busy), "in_flight": int(busy) + int(s.get("queued") or 0),
                          "last_request_at": int(last_at) if last_at else None},
@@ -1436,6 +1438,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
             sampling = {**defaults, **req_values}
         parser = OutputParser(thinking=thinking, tools=tools, stream_tools=True)
         detok, n, finish = Detokenizer(self.tok), 0, "length"
+        thinking_n = 0                                  # tokens written while thinking (Responses' reasoning_tokens)
         timings, before = None, None                    # this request's timings; the engine's `last` before it
         raw_ids = []                                    # every generated id (STRATA_DEBUG: dump raw model text)
         emb = getattr(self.embeddings, "path", None)
@@ -1485,6 +1488,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                     break
                                 raw_ids.append(t)
                                 seg.append(t)
+                                thinking_n += parser.state == "reasoning"
                                 evs = parser.feed(detok.push(t))
                                 self._note(n, evs)
                                 last_print = self._progress(last_print)
@@ -1531,6 +1535,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                         for t in extra:
                             n += 1
                             raw_ids.append(t)
+                            thinking_n += parser.state == "reasoning"
                             evs = parser.feed(detok.push(t))
                             self._note(n, evs)
                             for ev in evs:
@@ -1607,7 +1612,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
         for ev in parser.finish():
             yield "event", ev
         yield "done", {"finish": finish, "completion_tokens": n, "reused": (timings or {}).get("cache_n", 0),
-                       "timings": timings}
+                       "timings": timings, "reasoning_tokens": thinking_n}
 
 
 def prompt_tokens_seen(prompt_tokens: int, last: dict) -> int:
@@ -2250,6 +2255,10 @@ def do_POST(self):
                 req = json.loads(self.rfile.read(int(self.headers.get("Content-Length", 0))) or b"{}")
                 if not isinstance(req, dict):
                     raise ValueError("send a JSON object")
+                if path.startswith("/v1/responses/"):        # retrieve/delete/cancel/compact: nothing is stored
+                    self._json(404, responses_error_body("this server keeps no responses (stateless); send the "
+                                                         "whole conversation to POST /v1/responses", code="not_found"))
+                    return
                 if path in ("/v1/load", "/v1/unload"):
                     if not self._own_page("the model can be loaded or unloaded"):
                         return
@@ -2274,9 +2283,11 @@ def do_POST(self):
                         result = "loaded"
                     self._json(200, {"status": result, **svc.v1_status()})
                     return
-                if path in ("/v1/chat/completions", "/v1/messages"):
+                if path in ("/v1/chat/completions", "/v1/messages", "/v1/responses"):
                     self.record = svc.begin_request(path, req)
-                if path == "/v1/chat/completions":
+                if path == "/v1/responses":
+                    self._responses(req)
+                elif path == "/v1/chat/completions":
                     self._openai(req)
                 elif path == "/v1/messages":
                     self._anthropic(req)
@@ -2285,7 +2296,10 @@ def do_POST(self):
                 else:
                     self._json(404, {"error": {"message": "not found"}})
             except ValueError as e:
-                self._json(400, {"error": {"type": "invalid_request_error", "message": str(e)}})
+                if path == "/v1/responses":
+                    self._json(400, responses_error_body(str(e)))
+                else:
+                    self._json(400, {"error": {"type": "invalid_request_error", "message": str(e)}})
             except ModelBusy as e:
                 self._json(409, {"error": {"type": "model_busy", "message": str(e)}})
             except StructuredOutputError as e:
@@ -2415,6 +2429,11 @@ def _captured(self, items, api):
                             delta = item["choices"][0]["delta"]
                             content, reasoning = delta.get("content", ""), delta.get("reasoning_content", "")
                             usage, timings = item.get("usage"), item.get("timings")
+                        elif api == "responses":
+                            kind = item["type"]
+                            content = item["delta"] if kind == "response.output_text.delta" else ""
+                            reasoning = item["delta"] if kind == "response.reasoning_text.delta" else ""
+                            usage, timings = (item.get("response") or {}).get("usage"), None
                         else:
                             _, event = item
                             delta = event.get("delta", {})
@@ -2490,6 +2509,127 @@ def _openai(self, req):
                 self._note(error=err["error"])
                 self.wfile.write(b"data: " + json.dumps(err).encode() + b"\n\ndata: [DONE]\n\n")
 
+        def _responses(self, req):
+            """#451: POST /v1/responses - OpenAI's Responses API, stateless (serve/responses.py), on the chat path.
+            Errors use the Responses format; once the stream has started they arrive as a response.failed event."""
+            try:
+                ids, thinking, tools, max_new, asm, validator, req = self._responses_prepare(req)
+            except ResponsesError as e:
+                return self._json(e.status, e.body())
+            except ModelBusy as e:
+                return self._json(409, responses_error_body(str(e), "server_error", code="model_busy"))
+            except (GpuBusy, EngineStarting, EngineStuck, EngineDied) as e:
+                return self._json(503, responses_error_body(str(e), "server_error", code="server_error"))
+            cancel = threading.Event()
+            self._watch_client(cancel)                       # #430 #431
+
+            def check(text, finish):
+                return validated_json(text, validator, finish)
+
+            def events():
+                yield from asm.start()
+                done = None
+                for kind, x in svc.run(ids, thinking, tools, max_new, req, cancel):
+                    if kind == "ping":
+                        yield None
+                    elif kind == "event":
+                        yield from asm.feed(x)
+                    elif kind == "done":
+                        done = x
+                if done is not None and done["finish"] != "cancel" and not cancel.is_set():
+                    yield from asm.finish(done, check)
+            items = self._capture(events(), "responses")
+            if not req.get("stream"):
+                try:
+                    result = responses_api.collect(items)
+                except StructuredOutputError as e:
+                    return self._json(502, responses_error_body(str(e), "server_error",
+                                                                code="structured_output_failed"))
+                except EngineDied as e:
+                    return self._json(503, responses_error_body(f"{e}; the next request restarts it", "server_error",
+                                                                code="server_error"))
+                except ValueError as e:                      # the engine's ERR line
+                    return self._json(500, responses_error_body(str(e), "server_error", code="server_error"))
+                return self._json(200, result)
+            self._sse()
+            last = time.monotonic()
+
+            def send(e):
+                self.wfile.write(f"event: {e['type']}\n".encode() + b"data: " +
+                                 json.dumps(e, ensure_ascii=False).encode() + b"\n\n")
+
+            try:
+                for e in items:
+                    if e is None:
+                        # Codex's idle timeout (5 minutes by default) counts events, not SSE comments: while a long
+                        # prompt is read, a response.in_progress every 15 s tells it the server is still working
+                        if time.monotonic() - last >= 15:
+                            send(asm.in_progress())
+                            last = time.monotonic()
+                        else:
+                            self.wfile.write(b": keep-alive\n\n")
+                    else:
+                        send(e)
+                        last = time.monotonic()
+                    self.wfile.flush()
+            except OSError:
+                self._note(outcome="disconnected")
+                cancel.set()                                 # client went away: stop the engine
+                items.close()
+            except EngineDied as e:                          # mid-stream: response.failed, then the stream ends
+                self._responses_failed(asm, f"{e}; the next request restarts it", "server_error", send)
+            except StructuredOutputError as e:
+                self._responses_failed(asm, str(e), "structured_output_failed", send)
+            except ValueError as e:                          # the engine's ERR after the stream started
+                self._responses_failed(asm, str(e), "server_error", send)
+
+        def _responses_failed(self, asm, message, code, send):
+            e = asm.failed(message, code)
+            self._note(error=e["response"]["error"])
+            try:
+                send(e)
+                self.wfile.flush()
+            except OSError:
+                pass
+
+        def _responses_prepare(self, req):
+            responses_api.check_request(req)
+            messages = responses_api.input_messages(req)
+            tools, names, skipped = responses_api.request_tools(req)
+            kw = responses_api.template_kwargs(req, svc.shared)
+            try:
+                messages, validator = prepare_format(responses_api.text_format(req), messages)
+            except ValueError as e:
+                raise ResponsesError(str(e).replace("response_format", "text.format"), "text.format") from None
+            if validator is not None and tools:
+                raise ResponsesError("a JSON text.format with tools is not supported", "text.format",
+                                     "unsupported_parameter")
+            noted = svc.__dict__.setdefault("hosted_tools_noted", set())   # said once per tool, not per request
+            if set(skipped) - noted:
+                print(f"[strata] /v1/responses: left out the hosted tools {', '.join(sorted(set(skipped) - noted))} "
+                      f"(this server cannot run them)", flush=True)
+                noted.update(skipped)
+            if req.get("max_output_tokens") is None and "max_tokens" in svc.shared:   # the shared Chat settings
+                req = {**req, "max_output_tokens": svc.shared["max_tokens"]}
+            try:
+                svc.reasoning_budget(req)                    # a bad value is a 400 before anything is sent
+            except ValueError as e:
+                raise ResponsesError(str(e), "reasoning_budget_tokens") from None
+            svc.load()
+            try:
+                ids, thinking, max_new = svc.prepare(messages, tools, kw, req.get("max_output_tokens") or 0)
+            except ResponsesError:
+                raise
+            except ValueError as e:                          # too long for the context, an image without vision
+                raise ResponsesError(str(e), "input", "context_length_exceeded" if "context" in str(e) else None) \
+                    from None
+            _debug_req("responses", req, messages, tools, max_new, thinking, len(ids))
+            include = req.get("include") if isinstance(req.get("include"), list) else []
+            asm = responses_api.Assembler(req, svc.model_for(req), len(ids), names,
+                                          "reasoning.encrypted_content" in include, validator is not None)
+            # the request is also the sampling dict, as on the chat path (temperature, top_p, top_k, seed, ...)
+            return ids, thinking, tools, max_new, asm, validator, req
+
         def _count_tokens(self, req):
             """Anthropic's token count, which Claude Code asks for its context figures: the prompt this server would
             read for the same request, rendered and tokenized - the model does not run."""
diff --git a/serve/test_responses.py b/serve/test_responses.py
new file mode 100644
index 00000000000..2bae986966f
--- /dev/null
+++ b/serve/test_responses.py
@@ -0,0 +1,361 @@
+"""serve/test_responses.py - #451: the Responses API (POST /v1/responses) against the mock engine (no GPU, no pack).
+
+    python -m unittest serve.test_responses -v
+"""
+from __future__ import annotations
+
+import base64
+import contextlib
+import http.client
+import io
+import json
+import sys
+import unittest
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parents[1]))
+from serve.frontend import ChatTemplate  # noqa: E402
+from serve.responses import (ENCRYPTED_PREFIX, ResponsesError, input_messages, request_tools,  # noqa: E402
+                             template_kwargs, text_format)
+from serve.server import ByteTokenizer, MockEngine, Service, serve  # noqa: E402
+
+ROOT = Path(__file__).resolve().parents[1]
+TEMPLATE = ChatTemplate(ROOT / "serve/chat_template.jinja")
+
+CALL = ("Let me look.\n</think>\n\nChecking.\n\n<tool_call>\n<function=exec_command>\n<parameter=cmd>\ncat a.txt\n"
+        "</parameter>\n</function>\n</tool_call>")
+ANSWER = "Read it.\n</think>\n\nThe file says before."
+TOOLS = [{"type": "function", "name": "exec_command", "description": "Runs a command.", "strict": False,
+          "parameters": {"type": "object", "properties": {"cmd": {"type": "string"}}, "required": ["cmd"]}}]
+
+
+# ------------------------------------------------------------------------------------------------ parsing
+class Parsing(unittest.TestCase):
+    def test_a_string_input_is_one_user_message(self):
+        self.assertEqual(input_messages({"input": "hi", "instructions": "Be brief."}),
+                         [{"role": "system", "content": "Be brief."}, {"role": "user", "content": "hi"}])
+
+    def test_leading_developer_messages_join_the_system_message_later_ones_become_user(self):
+        msgs = input_messages({"instructions": "I", "input": [
+            {"type": "message", "role": "developer", "content": [{"type": "input_text", "text": "D1"},
+                                                                 {"type": "input_text", "text": "D2"}]},
+            {"role": "user", "content": "u"},
+            {"type": "message", "role": "developer", "content": "late"}]})
+        self.assertEqual(msgs, [{"role": "system", "content": "I\n\nD1D2"}, {"role": "user", "content": "u"},
+                                {"role": "user", "content": "late"}])
+
+    def test_codex_history_becomes_one_assistant_turn_per_answer(self):
+        items = [{"type": "message", "role": "user", "content": [{"type": "input_text", "text": "edit it"}]},
+                 {"type": "reasoning", "id": "rs_1", "summary": [],
+                  "content": [{"type": "reasoning_text", "text": "look first"}]},
+                 {"type": "message", "role": "assistant", "content": [{"type": "output_text", "text": "Looking."}]},
+                 {"type": "function_call", "id": "fc_1", "call_id": "c1", "name": "exec_command",
+                  "arguments": "{\"cmd\":\"cat a\"}"},
+                 {"type": "function_call", "id": "fc_2", "call_id": "c2", "name": "spawn_agent",
+                  "namespace": "multi_agent_v1", "arguments": "{}"},
+                 # results in the order they finished, not the order of the calls
+                 {"type": "function_call_output", "call_id": "c2", "output": "agent"},
+                 {"type": "function_call_output", "call_id": "c1",
+                  "output": [{"type": "input_text", "text": "before"}]},
+                 {"type": "reasoning", "id": "rs_2", "summary": [{"type": "summary_text", "text": "s"}],
+                  "content": [{"type": "reasoning_text", "text": "now write"}]},
+                 {"type": "function_call", "call_id": "c3", "name": "exec_command", "arguments": "{\"cmd\":\"w\"}"},
+                 {"type": "function_call_output", "call_id": "c3", "output": "ok"}]
+        self.assertEqual(input_messages({"input": items}), [
+            {"role": "user", "content": "edit it"},
+            {"role": "assistant", "content": "Looking.", "reasoning_content": "look first", "tool_calls": [
+                {"function": {"name": "exec_command", "arguments": {"cmd": "cat a"}}},
+                {"function": {"name": "multi_agent_v1.spawn_agent", "arguments": {}}}]},
+            {"role": "tool", "content": "before"}, {"role": "tool", "content": "agent"},
+            {"role": "assistant", "content": "", "reasoning_content": "now write", "tool_calls": [
+                {"function": {"name": "exec_command", "arguments": {"cmd": "w"}}}]},
+            {"role": "tool", "content": "ok"}])
+
+    def test_reasoning_comes_back_from_our_encrypted_content_and_foreign_tokens_are_ignored(self):
+        enc = ENCRYPTED_PREFIX + base64.b64encode(json.dumps({"text": "hidden"}).encode()).decode()
+        for item, want in (({"encrypted_content": enc, "summary": []}, "hidden"),
+                           ({"encrypted_content": "gAAAAAB-someone-elses", "summary": []}, None)):
+            msgs = input_messages({"input": [{"role": "user", "content": "q"}, {"type": "reasoning", **item},
+                                             {"role": "assistant", "content": "a"}]})
+            self.assertEqual(msgs[1].get("reasoning_content"), want)
+        with self.assertRaises(ResponsesError) as e:
+            input_messages({"input": [{"type": "reasoning", "encrypted_content": ENCRYPTED_PREFIX + "!!"}]})
+        self.assertEqual(e.exception.param, "input[0].encrypted_content")
+
+    def test_bad_arguments_from_a_cut_off_call_do_not_refuse_the_conversation(self):
+        msgs = input_messages({"input": [{"role": "user", "content": "q"},
+                                         {"type": "function_call", "call_id": "c", "name": "f", "arguments": "{\"a"},
+                                         {"type": "function_call_output", "call_id": "c", "output": "x"}]})
+        self.assertEqual(msgs[1]["tool_calls"][0]["function"]["arguments"], {"arguments": "{\"a"})
+
+    def test_unsupported_items_are_named(self):
+        for items, param in (([{"type": "item_reference", "id": "msg_1"}], "input[0]"),
+                             ([{"type": "web_search_call"}], "input[0].type"),
+                             ([{"role": "user", "content": [{"type": "input_file", "file_id": "f"}]}],
+                              "input[0].content[0].type"),
+                             ([{"role": "robot", "content": "x"}], "input[0].role")):
+            with self.assertRaises(ResponsesError) as e:
+                input_messages({"input": items})
+            self.assertEqual(e.exception.param, param)
+        with self.assertRaises(ResponsesError):
+            input_messages({})
+
+    def test_tools_namespaces_custom_and_hosted(self):
+        tools, names, skipped = request_tools({"tools": [
+            *TOOLS, {"type": "namespace", "name": "mcp_fs", "description": "Files.",
+                     "tools": [{"type": "function", "name": "read", "parameters": {"type": "object"}}]},
+            {"type": "custom", "name": "apply_patch", "description": "Patch.",
+             "format": {"type": "grammar", "syntax": "lark", "definition": "start: \"x\""}},
+            {"type": "web_search"}]})
+        self.assertEqual([t["name"] for t in tools], ["exec_command", "mcp_fs.read", "apply_patch"])
+        self.assertEqual(tools[1]["description"], "Files.")
+        self.assertIn("start: \"x\"", tools[2]["description"])
+        self.assertEqual(names["mcp_fs.read"], ("mcp_fs", "read", "function"))
+        self.assertEqual(names["apply_patch"], (None, "apply_patch", "custom"))
+        self.assertEqual(skipped, ["web_search"])
+        self.assertIsNone(request_tools({"tools": TOOLS, "tool_choice": "none"})[0])
+
+    def test_effort_and_text_format(self):
+        self.assertEqual(template_kwargs({"reasoning": {"effort": "minimal"}}, {}), {"enable_thinking": False})
+        self.assertEqual(template_kwargs({"reasoning": {"effort": "high"}}, {}), {"reasoning_effort": "xhigh"})
+        self.assertEqual(template_kwargs({"reasoning": {"summary": "auto"}}, {}), {})      # Codex: the default
+        self.assertEqual(template_kwargs({}, {"reasoning_effort": "low"}), {"reasoning_effort": "low"})
+        with self.assertRaises(ResponsesError):
+            template_kwargs({"reasoning": {"effort": "huge"}}, {})
+        self.assertEqual(text_format({"text": {"format": {"type": "json_schema", "name": "n", "schema": {}}}}),
+                         {"type": "json_schema", "json_schema": {"name": "n", "schema": {}}})
+        self.assertIsNone(text_format({"text": {"format": {"type": "text"}}}))
+
+
+# ------------------------------------------------------------------------------------------------ over HTTP
+class Server(unittest.TestCase):
+    script = ANSWER
+
+    def setUp(self):
+        self.tok = ByteTokenizer()
+        self.engine = MockEngine(self.tok, self.script, max_context=16384)
+        self.svc = Service(self.engine, self.tok, TEMPLATE)
+        self.httpd = serve(self.svc, port=0)
+        self.port = self.httpd.server_address[1]
+
+    def tearDown(self):
+        self.httpd.shutdown()
+        self.httpd.server_close()
+
+    def post(self, body, path="/v1/responses", headers=None):
+        """(status, parsed body: a dict, or the list of SSE events of a stream)."""
+        c = http.client.HTTPConnection("127.0.0.1", self.port, timeout=30)
+        try:
+            with contextlib.redirect_stdout(io.StringIO()):
+                c.request("POST", path, body=json.dumps(body).encode(),
+                          headers={"Content-Type": "application/json", **(headers or {})})
+                r = c.getresponse()
+                raw = r.read().decode()
+            if r.getheader("Content-Type") == "text/event-stream":
+                events = []
+                for block in raw.split("\n\n"):
+                    lines = block.strip().splitlines()
+                    if not lines or lines[0].startswith(":"):
+                        continue
+                    name = lines[0][len("event: "):]
+                    data = json.loads(lines[1][len("data: "):])
+                    self.assertEqual(name, data["type"])
+                    events.append(data)
+                return r.status, events
+            return r.status, json.loads(raw)
+        finally:
+            c.close()
+
+
+
+class OverHttp(Server):
+    def test_non_streaming_text_with_reasoning(self):
+        code, r = self.post({"model": "m", "input": "hi", "store": False})
+        self.assertEqual(code, 200)
+        self.assertEqual((r["object"], r["status"], r["error"]), ("response", "completed", None))
+        rs, msg = r["output"]
+        self.assertEqual(rs["type"], "reasoning")
+        self.assertEqual(rs["content"], [{"type": "reasoning_text", "text": "Read it.\n"}])
+        self.assertEqual(rs["summary"], [])
+        self.assertNotIn("encrypted_content", rs)
+        self.assertEqual(msg["type"], "message")
+        self.assertEqual(msg["content"][0]["text"], "The file says before.")
+        u = r["usage"]
+        self.assertEqual(u["output_tokens"], len(self.tok.encode(ANSWER)) + 1)        # + the end-of-turn token
+        self.assertEqual(u["output_tokens_details"]["reasoning_tokens"], len("Read it.\n</think>"))
+        self.assertEqual(u["total_tokens"], u["input_tokens"] + u["output_tokens"])
+        self.assertEqual(r["store"], False)
+
+    def test_stream_event_order(self):
+        code, events = self.post({"model": "m", "input": "hi", "stream": True,
+                                  "include": ["reasoning.encrypted_content"]})
+        self.assertEqual(code, 200)
+        types = [e["type"] for e in events]
+        deltas_r = types.count("response.reasoning_text.delta")
+        deltas_t = types.count("response.output_text.delta")
+        self.assertGreater(deltas_r, 0)
+        self.assertGreater(deltas_t, 0)
+        self.assertEqual(types, ["response.created", "response.in_progress",
+                                 "response.output_item.added", *["response.reasoning_text.delta"] * deltas_r,
+                                 "response.reasoning_text.done", "response.output_item.done",
+                                 "response.output_item.added", "response.content_part.added",
+                                 *["response.output_text.delta"] * deltas_t,
+                                 "response.output_text.done", "response.content_part.done",
+                                 "response.output_item.done", "response.completed"])
+        self.assertEqual([e["sequence_number"] for e in events], list(range(len(events))))
+        final = events[-1]["response"]
+        self.assertEqual(final["status"], "completed")
+        rs, msg = final["output"]
+        self.assertEqual([e["item"]["id"] for e in events if e["type"] == "response.output_item.done"],
+                         [rs["id"], msg["id"]])
+        self.assertEqual("".join(e["delta"] for e in events if e["type"] == "response.output_text.delta"),
+                         msg["content"][0]["text"])
+        self.assertTrue(rs["encrypted_content"].startswith(ENCRYPTED_PREFIX))
+        # the encrypted_content alone brings the thinking back into the prompt
+        replay = input_messages({"input": [{"role": "user", "content": "hi"},
+                                           {"type": "reasoning", "summary": [], "encrypted_content":
+                                            rs["encrypted_content"]}, msg]})
+        self.assertEqual(replay[1]["reasoning_content"], "Read it.\n")
+
+    def test_max_output_tokens_ends_incomplete(self):
+        code, r = self.post({"model": "m", "input": "hi", "max_output_tokens": 5})
+        self.assertEqual(code, 200)
+        self.assertEqual(r["status"], "incomplete")
+        self.assertEqual(r["incomplete_details"], {"reason": "max_output_tokens"})
+        self.assertEqual(r["output"][0]["status"], "incomplete")
+        code, events = self.post({"model": "m", "input": "hi", "max_output_tokens": 5, "stream": True})
+        self.assertEqual(events[-1]["type"], "response.incomplete")
+
+    def test_effort_none_does_not_think(self):
+        self.engine.scripts = [self.tok.encode("Hello.<|im_end|>", parse_special=True)]
+        self.engine.script = self.engine.scripts[0]
+        code, r = self.post({"model": "m", "input": "hi", "reasoning": {"effort": "none"}})
+        self.assertEqual([o["type"] for o in r["output"]], ["message"])
+        self.assertIn("<think>\n\n</think>", self.tok.decode(self.engine.last_prompt))
+
+    def test_errors_use_the_responses_format(self):
+        for body, param in (({"model": "m"}, "input"), ({"model": "m", "input": "x", "previous_response_id": "r"},
+                                                         "previous_response_id"),
+                            ({"model": "m", "input": "x", "reasoning": {"effort": "huge"}}, "reasoning.effort")):
+            code, r = self.post(body)
+            self.assertEqual(code, 400)
+            self.assertEqual(set(r["error"]), {"message", "type", "param", "code"})
+            self.assertEqual(r["error"]["param"], param)
+        code, r = self.post({}, path="/v1/responses/resp_123/cancel")
+        self.assertEqual(code, 404)
+        self.assertEqual(r["error"]["code"], "not_found")
+        c = http.client.HTTPConnection("127.0.0.1", self.port, timeout=30)
+        c.request("POST", "/v1/responses", body=b"{not json", headers={"Content-Type": "application/json"})
+        r = c.getresponse()
+        err = json.loads(r.read())["error"]
+        c.close()
+        self.assertEqual((r.status, err["type"], err["param"]), (400, "invalid_request_error", None))
+
+    def test_too_long_for_the_context(self):
+        code, r = self.post({"model": "m", "input": "x" * 20000})
+        self.assertEqual(code, 400)
+        self.assertEqual(r["error"]["code"], "context_length_exceeded")
+
+    def test_api_key_and_foreign_pages(self):
+        self.svc.api_key = "s3cret"
+        self.assertEqual(self.post({"model": "m", "input": "hi"})[0], 401)
+        self.assertEqual(self.post({"model": "m", "input": "hi"}, headers={"Authorization": "Bearer s3cret"})[0], 200)
+        self.svc.api_key = None
+        code, r = self.post({"model": "m", "input": "hi"}, headers={"Origin": "https://evil.example.com"})
+        self.assertEqual(code, 403)
+
+    def test_json_schema_text_format(self):
+        self.engine.scripts = [self.tok.encode("</think>\n\n{\"n\": 3}<|im_end|>", parse_special=True)]
+        self.engine.script = self.engine.scripts[0]
+        fmt = {"type": "json_schema", "name": "num", "strict": True,
+               "schema": {"type": "object", "properties": {"n": {"type": "integer"}}, "required": ["n"]}}
+        code, r = self.post({"model": "m", "input": "a number", "text": {"format": fmt}})
+        self.assertEqual(code, 200, r)
+        self.assertEqual(r["output"][-1]["content"][0]["text"], "{\"n\":3}")
+        code, events = self.post({"model": "m", "input": "a number", "text": {"format": fmt}, "stream": True})
+        self.assertEqual([e["delta"] for e in events if e["type"] == "response.output_text.delta"], ["{\"n\":3}"])
+        self.assertEqual(events[-1]["type"], "response.completed")
+        # an answer that fails the schema
+        bad = {**fmt, "schema": {**fmt["schema"], "properties": {"n": {"type": "string"}}}}
+        code, r = self.post({"model": "m", "input": "a number", "text": {"format": bad}})
+        self.assertEqual((code, r["error"]["code"]), (502, "structured_output_failed"))
+        code, events = self.post({"model": "m", "input": "a number", "text": {"format": bad}, "stream": True})
+        self.assertEqual(events[-1]["type"], "response.failed")
+        self.assertEqual(events[-1]["response"]["error"]["code"], "structured_output_failed")
+
+    def test_monitor_and_status(self):
+        self.svc.api_monitor = True
+        self.post({"model": "m", "input": "hi", "stream": True})
+        rec = self.svc.request_records()[0]
+        self.assertEqual(rec["path"], "/v1/responses")
+        full = self.svc.request_records(rec["id"])
+        self.assertEqual(full["output"], "The file says before.")
+        self.assertEqual(full["reasoning"], "Read it.\n")
+        self.assertIn("/v1/responses", self.svc.v1_status()["dialects"])
+
+
+class ToolRoundTrip(Server):
+    script = [CALL, ANSWER]
+
+    def test_function_call_round_trip(self):
+        user = {"type": "message", "role": "user", "content": [{"type": "input_text", "text": "what is in a.txt?"}]}
+        code, events = self.post({"model": "m", "instructions": "You are a coding agent.", "input": [user],
+                                  "tools": TOOLS, "store": False, "stream": True,
+                                  "include": ["reasoning.encrypted_content"], "reasoning": {"summary": "auto"},
+                                  "parallel_tool_calls": True, "tool_choice": "auto"})
+        self.assertEqual(code, 200)
+        first_prompt = self.tok.decode(self.engine.last_prompt)
+        types = [e["type"] for e in events]
+        n_args = types.count("response.function_call_arguments.delta")
+        self.assertGreater(n_args, 0)
+        call_part = types[types.index("response.output_text.done") + 2:]
+        self.assertEqual(call_part, ["response.output_item.done", "response.output_item.added",
+                                     *["response.function_call_arguments.delta"] * n_args,
+                                     "response.function_call_arguments.done", "response.output_item.done",
+                                     "response.completed"])
+        output = events[-1]["response"]["output"]
+        self.assertEqual([o["type"] for o in output], ["reasoning", "message", "function_call"])
+        fc = output[2]
+        self.assertEqual((fc["name"], json.loads(fc["arguments"]), fc["status"]),
+                         ("exec_command", {"cmd": "cat a.txt"}, "completed"))
+        self.assertTrue(fc["call_id"])
+        added = next(e for e in events if e["type"] == "response.output_item.added"
+                     and e["item"]["type"] == "function_call")
+        self.assertEqual((added["item"]["call_id"], added["item"]["arguments"]), (fc["call_id"], ""))
+        # Codex sends everything back, plus the result: the prompt continues exactly where the model stopped
+        code, r = self.post({"model": "m", "instructions": "You are a coding agent.", "tools": TOOLS, "store": False,
+                             "input": [user, *output, {"type": "function_call_output", "call_id": fc["call_id"],
+                                                       "output": "before"}]})
+        self.assertEqual(code, 200, r)
+        second_prompt = self.tok.decode(self.engine.last_prompt)
+        self.assertTrue(second_prompt.startswith(first_prompt + CALL + "<|im_end|>"), second_prompt[-600:])
+        self.assertIn("<tool_response>\nbefore\n</tool_response>", second_prompt)
+        self.assertEqual(r["output"][-1]["content"][0]["text"], "The file says before.")
+
+    def test_namespace_and_custom_calls_come_back_under_their_own_names(self):
+        self.engine.scripts = [self.tok.encode(
+            "</think>\n\n<tool_call>\n<function=multi_agent_v1.spawn_agent>\n<parameter=message>\nhi\n</parameter>\n"
+            "</function>\n</tool_call>\n<tool_call>\n<function=apply_patch>\n<parameter=input>\n*** Begin Patch\n"
+            "</parameter>\n</function>\n</tool_call><|im_end|>", parse_special=True)]
+        self.engine.script = self.engine.scripts[0]
+        tools = [{"type": "namespace", "name": "multi_agent_v1", "description": "Agents.", "tools": [
+            {"type": "function", "name": "spawn_agent", "strict": False,
+             "parameters": {"type": "object", "properties": {"message": {"type": "string"}}}}]},
+            {"type": "custom", "name": "apply_patch", "description": "Edit files."}]
+        code, r = self.post({"model": "m", "input": "go", "tools": tools})
+        self.assertEqual(code, 200, r)
+        ns, custom = r["output"]
+        self.assertEqual((ns["type"], ns["namespace"], ns["name"], json.loads(ns["arguments"])),
+                         ("function_call", "multi_agent_v1", "spawn_agent", {"message": "hi"}))
+        self.assertEqual((custom["type"], custom["name"], custom["input"]),
+                         ("custom_tool_call", "apply_patch", "*** Begin Patch"))
+        msgs = input_messages({"input": [{"role": "user", "content": "go"}, ns, custom,
+                                         {"type": "function_call_output", "call_id": ns["call_id"], "output": "1"},
+                                         {"type": "custom_tool_call_output", "call_id": custom["call_id"],
+                                          "output": "2"}]})
+        self.assertEqual([c["function"]["name"] for c in msgs[1]["tool_calls"]],
+                         ["multi_agent_v1.spawn_agent", "apply_patch"])
+
+
+if __name__ == "__main__":
+    unittest.main()

From f0489c9fb974d7ee2514ed8efe5568a6cb1978c1 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:35:47 +0200
Subject: [PATCH 104/201] web: the Model settings card's Save is the primary
 button (#564)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/web/index.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/serve/web/index.html b/serve/web/index.html
index 7fb559e3862..1fb4caa354c 100644
--- a/serve/web/index.html
+++ b/serve/web/index.html
@@ -178,7 +178,7 @@
         <p class="muted small">Kept in the model's run config for every client. An empty field is the default. They
           take effect the next time the model starts (close Strata's window and start it again).</p>
         <form class="cfg-form" id="cfg-form"></form>
-        <div class="cfg-actions"><button class="st-btn" id="cfg-save" type="button">Save</button>
+        <div class="cfg-actions"><button class="st-btn st-btn--primary" id="cfg-save" type="button">Save</button>
           <span class="muted small" id="cfg-msg" role="status"></span></div>
       </div>
     </div>

From e809f7f3df4233bd91daf764286eb089bf46b35b Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:36:44 +0200
Subject: [PATCH 105/201] setup: Unsloth's UD-IQ4_XS as an experimental choice
 (#621)

UD-IQ4_XS sits between IQ3_S and UD-Q4_K_XL: IQ3_S gate/up experts (IQ4_XS in one layer) with IQ4_NL downs (Q8_0 in
five layers), 59.5 GB of them, and UD-Q4_K_XL's dense side. The engine's kernels already take these formats; it was
packed (iq_pack.py --compat-bf16) and run on the Strix Halo, not yet on NVIDIA.

- MODELS["UD-IQ4_XS"] in the unsloth family: three shards pinned at the same revision 38bb39e with their sizes and
  SHA-256 (the Hub's LFS pointers), the RAM budget like UD-Q4_K_XL (budget, one GPU, no images, --compat-bf16 pack,
  no experts.bin), engine 0.1.38 or newer (the fused-layout fix for packs not every layer of which is covered).
- A model can have its own shard pattern and count (model_file / model_shards); budget_model() tells which Unsloth
  model a config runs, for the #498 multi-GPU messages and RAM need.
- The AMD question (#429) stays for UD-Q4_K_XL only (nvidia_only): UD-IQ4_XS's formats have AMD prompt kernels.
- --gguf-dir accepts UD-IQ4_XS files (#444's list says so).
- UNSLOTH_Q4.md: its files, what setup does, what is known (Strix Halo), and the BF16 rounding of the hyper-connection
  projections that every --compat-bf16 pack has (not changed here). MODELS.md: a paragraph.
- test_setup_unsloth: pins, budget, a mocked install, the engine check, no AMD question, the config read back.

UD-Q4_K_XL's install, its tests and every other model's config are unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/MODELS.md              |  9 ++++
 docs/UNSLOTH_Q4.md          | 28 ++++++++++++-
 setup.py                    | 82 +++++++++++++++++++++++++++----------
 tools/test_setup_choices.py |  4 +-
 tools/test_setup_unsloth.py | 82 +++++++++++++++++++++++++++++++++++--
 5 files changed, 176 insertions(+), 29 deletions(-)

diff --git a/docs/MODELS.md b/docs/MODELS.md
index f6a5284b61f..b2e0d00ed8d 100644
--- a/docs/MODELS.md
+++ b/docs/MODELS.md
@@ -129,6 +129,15 @@ NVIDIA GPU (no images yet). Details and measurements: [UD-Q4_K_XL](UNSLOTH_Q4.md
 START-HERE.bat --setup --family unsloth --model UD-Q4_K_XL
 ```
 
+**Unsloth's UD-IQ4_XS** (experimental, 0.1.39, #621) is the smaller choice of the same family: a 94 GB download with
+59.5 GB of experts (IQ3_S and IQ4_NL), between IQ3_S and UD-Q4_K_XL. Setup runs it the same way (a RAM budget of your
+RAM minus 24 GB, the rest from the SSD), so on a 64 GB PC far fewer experts come from the SSD than with UD-Q4_K_XL, and
+on 96 GB all of them stay in RAM. Not measured on NVIDIA yet: [details](UNSLOTH_Q4.md#ud-iq4_xs-experimental-setup-from-0139-621).
+
+```
+START-HERE.bat --setup --family unsloth --model UD-IQ4_XS
+```
+
 ### OrcaRouter Uncensored IQ3_XXS
 
 For **OrcaRouter's Flash-Next Uncensored IQ3_XXS**, see the [manual compatibility setup](ORCA.md). It needs an
diff --git a/docs/UNSLOTH_Q4.md b/docs/UNSLOTH_Q4.md
index 12d4d1997fd..6bffe67f84b 100644
--- a/docs/UNSLOTH_Q4.md
+++ b/docs/UNSLOTH_Q4.md
@@ -221,10 +221,34 @@ engine with `--short-read` covering the positions to compare; llama.cpp's side w
 | `STRATA_PARTIAL_PIN=1` | Registers the hottest part of the RAM budget (up to `STRATA_PARTIAL_PIN_GIB`, default 24) with the GPU driver, so the GPU computes a share of the misses over PCIe (`--pcie-frac`). Measured no faster on this PC, and it changes the numerics of those experts (GPU kernels instead of the CPU's), so off. |
 | `STRATA_FETCH_THREADS=N` | Threads that read the experts from the GGUF while it answers (default 8; 16 was no faster). The prompt path has its own: `STRATA_STAGER_THREADS` (default 32 here) and `STRATA_STAGER_RING` (128). |
 
+## UD-IQ4_XS (experimental, setup from 0.1.39, #621)
+
+Unsloth's `UD-IQ4_XS` at the same revision is in setup too: `START-HERE.bat --setup --family unsloth --model
+UD-IQ4_XS` (engine 0.1.38 or newer). It sits between IQ3_S and UD-Q4_K_XL: its routed experts are IQ3_S gate/up (IQ4_XS
+in one layer) with IQ4_NL downs (Q8_0 in five layers), 59.5 GB of them; the dense side (Q8_0 projections, the IQ4_NL
+PLE table, a Q6_K head) is UD-Q4_K_XL's. Three shards, 93.7 GB:
+
+| File | Bytes | SHA-256 |
+| --- | ---: | --- |
+| `Qwen3.8-Flash-Next-UD-IQ4_XS-00001-of-00003.gguf` | 10,946,624 | `5ce89370720f8bf90890f439361282104c1aa1482d4013bb9a50923e758e71a4` |
+| `Qwen3.8-Flash-Next-UD-IQ4_XS-00002-of-00003.gguf` | 49,835,229,856 | `577a38a2392b40ca2193cea502e1d92f60b8cd370675d308e0ec21885d9daaa7` |
+| `Qwen3.8-Flash-Next-UD-IQ4_XS-00003-of-00003.gguf` | 43,836,407,744 | `d4634e6d84f0ebb0940be15c90d3790bf6464e3dea3a1cddc567dc0e83ad8833` |
+
+Setup treats it like UD-Q4_K_XL (the list above): the same RAM budget (your RAM less 24 GB; at most all 55 GiB of its
+experts, so a 96 GB PC holds all of them), the pack with `--compat-bf16`, no `experts.bin`, one GPU by default, no
+images. It does not ask on AMD: its experts' formats have prompt kernels there too.
+
+What is known so far: it packs and runs on a Strix Halo (AMD gfx1151, 128 GB unified memory), where prompts read at
+~820 tokens/s at 8K and 64K and the answers passed the retrieval checks at 8K and 64K. It has **not** been measured on
+NVIDIA yet; please report what you see. One fidelity note that applies to every `--compat-bf16` pack (UD-Q4_K_XL too):
+the pack rounds the file's Q8_0 hyper-connection projections to BF16, and on the Strix Halo that rounding put
+perplexity 6-9% above llama.cpp's on the same file (teacher-forced, short context). Reading the Q8_0 values instead
+closes most of that gap; it is measured on AMD only and not in this release.
+
 ## Scope and validation
 
-- Only UD-Q4_K_XL at revision `38bb39e` is targeted. Other Unsloth quantizations use formats this engine may not
-  have kernels for; the engine checks every layer's formats at start and refuses an unsupported one by name.
+- UD-Q4_K_XL and UD-IQ4_XS at revision `38bb39e` are targeted. Other Unsloth quantizations use formats this engine may
+  not have kernels for; the engine checks every layer's formats at start and refuses an unsupported one by name.
 - Tests: the packer's synthetic 4-shard and conversion tests (`.venv/bin/python -m unittest discover -s tools -p
   test_iq_pack.py`); CTests `gguf_split_test`, `expert_layout_test`, `native_expert_parity_*` (the three real expert
   format pairs against ggml-cpu, the Q5_1 min term, Q8_0 rows), `prefill_mmq_kquant_test` (with `-DSTRATA_MMQ_KQUANTS=ON`: the
diff --git a/setup.py b/setup.py
index cb14ac01aad..c4c9ce64893 100644
--- a/setup.py
+++ b/setup.py
@@ -28,8 +28,8 @@
 --host 0.0.0.0 --api-key KEY (reach it from other devices on your network), --experimental-speed-projection on|off
 (EXPERIMENTAL, off by default),
 --models-dir DIR, --gguf-dir DIR (use GGUF files you already have), --build (compile instead of the ready-made
-engine), --check (only check this PC), --resident-budget-gib N (UD-Q4_K_XL's experts in RAM), --kv-streaming
-on|off|auto.
+engine), --check (only check this PC), --resident-budget-gib N (UD-Q4_K_XL's or UD-IQ4_XS's experts in RAM),
+--kv-streaming on|off|auto.
 
 Setup recommends, it never forces: the recommended answers are the defaults (--yes, or Enter), and a bigger choice
 than it recommends - a longer context, more GPUs, a bigger RAM budget, a size it thinks will not fit - is kept, with
@@ -127,7 +127,14 @@ def hf_unpinned(url: str) -> str:
     # keeps a RAM budget of them (--resident-budget-gib, chosen below) and reads the rest from the GGUF on the SSD
     "UD-Q4_K_XL": {"about": "4-bit (Unsloth Dynamic), EXPERIMENTAL: the best quality, but most experts come from the "
                             "SSD on a 64 GB PC (7-8.5 tokens/s measured)", "download_gb": 111.3, "ram_gb": 48,
-                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True},
+                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True, "nvidia_only": True},
+    # #621 EXPERIMENTAL: Unsloth's UD-IQ4_XS - IQ3_S gate/up experts with IQ4_NL (43 layers) or Q8_0 (5) downs, the
+    # dense side as UD-Q4_K_XL's; three shards.  Packed and run on a Strix Halo (AMD); not measured on NVIDIA yet.  Its
+    # 59.5 GB of experts: a RAM budget of them, like UD-Q4_K_XL, but far fewer read from the SSD on a 64 GB PC
+    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), EXPERIMENTAL: between IQ3_S and UD-Q4_K_XL; part of "
+                           "its experts come from the SSD on a 64 GB PC (not measured on NVIDIA yet)",
+                  "download_gb": 93.7, "ram_gb": 48, "arena_gb": 59.5, "families": ("unsloth",), "budget": True,
+                  "shards": 3, "file": "Qwen3.8-Flash-Next-{q}-0000{i}-of-00003.gguf", "engine": (0, 1, 38)},
 }
 # The experimental Unsloth file's four shards at the pinned revision: name -> (bytes, sha256), checked after the
 # download (setup trusts no other model file by name and size alone either: check_shards reads their directories).
@@ -141,6 +148,15 @@ def hf_unpinned(url: str) -> str:
     "Qwen3.8-Flash-Next-UD-Q4_K_XL-00004-of-00004.gguf":
         (12087983520, "753bda48b98ba4f1636134a90a967de1b2d3908a236c026e464777342e53510a"),
 }
+# #621: UD-IQ4_XS's three shards at the same revision (sizes and SHA-256: the Hub's LFS pointers)
+UNSLOTH_IQ4_XS_SHARDS = {
+    "Qwen3.8-Flash-Next-UD-IQ4_XS-00001-of-00003.gguf":
+        (10946624, "5ce89370720f8bf90890f439361282104c1aa1482d4013bb9a50923e758e71a4"),
+    "Qwen3.8-Flash-Next-UD-IQ4_XS-00002-of-00003.gguf":
+        (49835229856, "577a38a2392b40ca2193cea502e1d92f60b8cd370675d308e0ec21885d9daaa7"),
+    "Qwen3.8-Flash-Next-UD-IQ4_XS-00003-of-00003.gguf":
+        (43836407744, "d4634e6d84f0ebb0940be15c90d3790bf6464e3dea3a1cddc567dc0e83ad8833"),
+}
 UNSLOTH_ENGINE = (0, 1, 32)     # the first engine setup configures for UD-Q4_K_XL (0.1.31 ran it by hand)
 UNSLOTH_RAM_LEFT_GB = 24        # RAM beside the budget: the OS, the engine, and the file cache the rest is read through
 # Contexts past 262144 (the model's trained length) extend it by rope scaling: for the context it will
@@ -173,14 +189,17 @@ def hf_unpinned(url: str) -> str:
               "mmproj_hf": hf("ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-Coder-GGUF"),
               "mmproj": "mmproj-Qwen3.8-Flash-Next-BF16.gguf", "name": "qwen3.8-flash-next-coder",
               "profile": "expert-profile-coder.bin"},
-    # EXPERIMENTAL: Unsloth's UD-Q4_K_XL of the original model (docs/UNSLOTH_Q4.md): four shards, no images yet
-    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "by": "Unsloth's 4-bit quantization (EXPERIMENTAL)",
-                "about": "4-bit, 111 GB download, most experts read from the SSD: slow (7-8.5 tokens/s on a 64 GB PC)",
+    # EXPERIMENTAL: Unsloth's UD-Q4_K_XL (four shards) and UD-IQ4_XS (three, #621) of the original model
+    # (docs/UNSLOTH_Q4.md); no images yet
+    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "by": "Unsloth's 4-bit quantizations (EXPERIMENTAL)",
+                "about": "UD-Q4_K_XL (111 GB download) or UD-IQ4_XS (94 GB); part of the experts read from the SSD: "
+                         "slower (UD-Q4_K_XL: 7-8.5 tokens/s on a 64 GB PC)",
                 "hf": hf("unsloth/Qwen3.8-Flash-Next-GGUF") + "{q}/",
                 "file": "Qwen3.8-Flash-Next-{q}-0000{i}-of-00004.gguf", "shards": 4, "tag": "unsloth-",
                 "mmproj_hf": hf("ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF"),
                 "mmproj": "mmproj-Qwen3.8-Flash-Next-BF16.gguf", "name": "qwen3.8-flash-next-unsloth",
-                "experimental": True, "vision": False, "pack_args": ["--compat-bf16"], "sha256": UNSLOTH_SHARDS},
+                "experimental": True, "vision": False, "pack_args": ["--compat-bf16"],
+                "sha256": {**UNSLOTH_SHARDS, **UNSLOTH_IQ4_XS_SHARDS}},
 }
 MMPROJ = "mmproj-Qwen3.8-Flash-Next-BF16.gguf"
 # EXPERIMENTAL, off by default (setup asks): a control vector shipped with the repository, see its README
@@ -608,6 +627,23 @@ def split_mmap(cfg: dict) -> bool:
     return True
 
 
+def model_file(fam: dict, model: str, i: int) -> str:
+    """Shard i's file name: the family's pattern, or the model's own (#621: UD-IQ4_XS has three shards, not four)."""
+    return MODELS.get(model, {}).get("file", fam["file"]).format(q=model, i=i)
+
+
+def model_shards(fam: dict, model: str) -> int:
+    return MODELS.get(model, {}).get("shards", fam.get("shards", 2))
+
+
+def budget_model(cfg: dict) -> str:
+    """The Unsloth model a config with a RAM budget runs, from its --native shard's name (UD-Q4_K_XL by default)."""
+    a = cfg.get("args", [])
+    native = Path(a[a.index("--native") + 1]).name.upper() if "--native" in a and a.index("--native") + 1 < len(a) \
+        else ""
+    return next((m for m, d in MODELS.items() if d.get("budget") and f"-{m}-" in native), "UD-Q4_K_XL")
+
+
 def unsloth_split_need_gb(model="UD-Q4_K_XL") -> float:
     """#498: the RAM UD-Q4_K_XL needs on several GPUs, where it has no RAM budget (the engine refuses
     --resident-budget-gib with a layer split): its GGUF files and UNSLOTH_RAM_LEFT_GB more (~135 GB).  Measured safe
@@ -623,14 +659,15 @@ def split_budget(cfg: dict) -> bool:
     a = cfg.get("args", [])
     if "--resident-budget-gib" not in a:
         return False
-    need, ram = unsloth_split_need_gb(), ram_gb()
+    model = budget_model(cfg)
+    need, ram = unsloth_split_need_gb(model), ram_gb()
     if ram < need:
-        fail(f"UD-Q4_K_XL cannot share its RAM budget across GPUs (the engine has no layer split with it), and without "
+        fail(f"{model} cannot share its RAM budget across GPUs (the engine has no layer split with it), and without "
              f"the budget it needs ~{need:.0f} GB of RAM (its GGUF files and {UNSLOTH_RAM_LEFT_GB} GB more); this PC "
              f"has {ram:.0f} GB", "start it on one GPU: START-HERE.bat --gpu N (Linux: ./setup.sh --gpu N)")
     i = a.index("--resident-budget-gib")
     del a[i:i + 2]
-    ok("UD-Q4_K_XL on several GPUs: no RAM budget (the engine has none with a layer split) - all its experts are "
+    ok(f"{model} on several GPUs: no RAM budget (the engine has none with a layer split) - all its experts are "
        "loaded into RAM from the model files at start, and the files pass through the OS file cache (#498)")
     return True
 
@@ -646,7 +683,7 @@ def offer_together(cfg_path: Path, cfg: dict, yes: bool) -> dict:
         return cfg
     # #498: UD-Q4_K_XL's RAM budget has no layer split; without it the RAM must hold the GGUFs and 24 GB more
     budget = "--resident-budget-gib" in cfg.get("args", [])
-    if budget and ram_gb() < unsloth_split_need_gb():
+    if budget and ram_gb() < unsloth_split_need_gb(budget_model(cfg)):
         return cfg
     pair = can[:2]
     cfg["gpus_asked"] = True
@@ -660,7 +697,7 @@ def offer_together(cfg_path: Path, cfg: dict, yes: bool) -> dict:
         say("  use). On both, the experts the GPUs do not hold are read through the OS file cache instead: faster in")
         say("  two reports (#364, #384), but RAM can fill up to 0 free during long prompts.")
     if budget:
-        say("  This model (UD-Q4_K_XL) runs on one GPU with a RAM budget of its experts (recommended: the tested")
+        say(f"  This model ({budget_model(cfg)}) runs on one GPU with a RAM budget of its experts (recommended: the tested")
         say("  setup). On both it has no budget: all its experts are loaded into RAM at start, which this PC's RAM")
         say("  holds - about twice as fast in #498 (2x RTX 3090: 31 -> 64-78 tokens/s).")
     short = split_short(pair)             # #448: one card recommended (asked "n" by default), as for --resident
@@ -869,7 +906,7 @@ def gguf_dir_shards(folder: Path, fam: dict, model: str) -> list[Path]:
     engine and tools/iq_pack.py do.  The published name first; else the one first shard in the folder whose name has
     the size in it (an upload split or named differently: -00001-of-00003, Unsloth's ...-00001-of-00004.gguf).  A
     missing shard is check_shards' error later, as before."""
-    first = folder / fam["file"].format(q=model, i=1)
+    first = folder / model_file(fam, model, 1)
     if not first.exists():
         found = sorted(p for p in folder.glob("*-00001-of-*.gguf") if SHARD_NAME.search(p.name))
         mine = [p for p in found if model.lower() in p.name.lower()]
@@ -888,7 +925,8 @@ def gguf_dir_shards(folder: Path, fam: dict, model: str) -> list[Path]:
 GGUF_QUANT = re.compile(r"(?<![A-Za-z0-9])((?:UD-)?(?:I?Q\d+(?:_[A-Za-z0-9]+)*|BF16|F16|F32))"
                         r"(?=-\d{5}-of-\d{5}\.gguf$|\.gguf$)", re.I)
 SUPPORTED_GGUFS = ("Strata runs ISTA-DASLab's GSQ-RCO files (Qwen3.8-Flash-Next Q2_0, IQ2_XS, IQ3_XXS, IQ3_S; Swift "
-                   "1.5's; the Coder's IQ1_M) and Unsloth's UD-Q4_K_XL only: other GGUFs (Unsloth's UD-IQ3_XXS or "
+                   "1.5's; the Coder's IQ1_M) and Unsloth's UD-Q4_K_XL and UD-IQ4_XS only: other GGUFs (Unsloth's "
+                   "UD-IQ3_XXS or "
                    "UD-Q2_K_XL, K-quants) cannot be used")
 
 
@@ -903,7 +941,7 @@ def gguf_choice(name: str) -> tuple | None:
     the original's sizes: the size tells them apart)."""
     for f, d in FAMILIES.items():
         for m in MODELS:
-            if f in MODELS[m].get("families", ("qwen", "swift")) and name == d["file"].format(q=m, i=1):
+            if f in MODELS[m].get("families", ("qwen", "swift")) and name == model_file(d, m, 1):
                 return f, m
     return None
 
@@ -3007,7 +3045,7 @@ def main() -> int:
                          "this mode the experts the GPU does not hold are copied into RAM once when they fit (resident), "
                          "else read through the OS file cache (mmap); resident / mmap force one of the two")
     ap.add_argument("--resident-budget-gib", type=float, metavar="N",
-                    help="UD-Q4_K_XL: the GiB of its experts kept in RAM (default: the RAM less 24 GB, 40 on 64 GB; "
+                    help="UD-Q4_K_XL, UD-IQ4_XS: the GiB of its experts kept in RAM (default: the RAM less 24 GB, 40 on 64 GB; "
                          "more is kept as you choose, with a note)")
     ap.add_argument("--vram-reserve-mib", type=int, metavar="N",
                     help="VRAM in MiB the engine leaves free for other programs (a game, another model; the engine's "
@@ -3259,7 +3297,7 @@ def main() -> int:
         # the RAM holds the GGUFs and 24 GB more: then several, without the budget, if asked for (#498)
         warn(f"{model} is EXPERIMENTAL (docs/UNSLOTH_Q4.md): most of its experts are read from the SSD while it "
              "answers, so it is several times slower than the 2-3-bit models; quality checked against llama.cpp")
-        if hip:
+        if hip and MODELS[model].get("nvidia_only"):
             # #429 (jkuepker): checked before the 111 GB download.  The HIP engine has no prompt kernels for its
             # Q4_K / Q5_K experts (STRATA_MMQ_KQUANTS is CUDA-only) and it has not been run on AMD: asked, not refused
             confirm_risk(f"{model} has not been run on AMD cards yet: its prompt kernels are NVIDIA-only, so on "
@@ -3284,7 +3322,8 @@ def main() -> int:
         if a.low_ram not in ("auto", "off"):
             warn(f"--low-ram {a.low_ram} does not apply to {model}: it always reads part of its experts from the files")
     elif a.resident_budget_gib is not None:
-        warn(f"--resident-budget-gib is for UD-Q4_K_XL: {model} keeps all of its experts in RAM or in the low-RAM mode")
+        warn(f"--resident-budget-gib is for UD-Q4_K_XL and UD-IQ4_XS: {model} keeps all of its experts in RAM or in "
+             "the low-RAM mode")
     low_ram = budget is None and (a.low_ram in ("on", "resident", "mmap") or
                                   (a.low_ram == "auto" and low_ram_needed(model, ram)))
     if low_ram and multi and not low_ram_together(a, model, ram, gpu, chosen):
@@ -3420,7 +3459,7 @@ def main() -> int:
              if family == "swift" else f"the experimental speed projection is not tested with {model}: left off")
     models_dir = Path(a.gguf_dir) if a.gguf_dir else Path(a.models_dir) / tag
     shards = gguf_dir_shards(models_dir, fam, model) if a.gguf_dir else \
-        [models_dir / fam["file"].format(q=model, i=i) for i in range(1, fam.get("shards", 2) + 1)]
+        [models_dir / model_file(fam, model, i) for i in range(1, model_shards(fam, model) + 1)]
     problem = gguf_dir_problem(models_dir, shards[0], fam, model) if a.gguf_dir else None
     if problem:                                        # #444: files Strata cannot run, or another choice's files
         fail(*problem)
@@ -3481,8 +3520,9 @@ def main() -> int:
     else:
         lib_dirs = meta.get("lib_dirs") or meta.get("cuda_dirs") or cuda_lib_dirs()
     engine_ver = tuple(int(x) for x in str(meta.get("version", "0")).split(".")[:3] if x.isdigit())
-    if budget is not None and engine_ver < UNSLOTH_ENGINE:    # checked before the 111 GB download
-        fail(f"{model} needs engine {'.'.join(map(str, UNSLOTH_ENGINE))} or newer; this one is {meta.get('version')}",
+    need_engine = MODELS[model].get("engine", UNSLOTH_ENGINE)
+    if budget is not None and engine_ver < need_engine:      # checked before the 94-111 GB download
+        fail(f"{model} needs engine {'.'.join(map(str, need_engine))} or newer; this one is {meta.get('version')}",
              "update Strata (or compile the engine with --build) and run setup again")
     ok(f"engine: {eng / EXE}")
 
diff --git a/tools/test_setup_choices.py b/tools/test_setup_choices.py
index c55d1b20676..17b5487e5af 100644
--- a/tools/test_setup_choices.py
+++ b/tools/test_setup_choices.py
@@ -122,7 +122,7 @@ def test_an_unsloth_ud_file_is_not_taken_for_a_gsq_rco_size(self):
         self.assertEqual(msg, "Qwen3.8-Flash-Next-UD-IQ3_XXS-00001-of-00003.gguf is UD-IQ3_XXS, a GGUF Strata "
                               "cannot run")
         self.assertIn("ISTA-DASLab's GSQ-RCO files", hint)
-        self.assertIn("Unsloth's UD-Q4_K_XL only", hint)
+        self.assertIn("Unsloth's UD-Q4_K_XL and UD-IQ4_XS only", hint)
 
     def test_a_folder_without_the_choice_names_what_is_there(self):
         gsq = ["Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-%05d-of-00002.gguf" % i for i in (1, 2)]
@@ -145,7 +145,7 @@ def test_the_size_of_another_family(self):
             code, out, _, _ = install(ram, found, ["--gguf-dir", d, "--family", "unsloth", "--model", "IQ3_XXS"])
         self.assertEqual(code, 1)
         self.assertIn("has no IQ3_XXS model file", out)
-        self.assertIn("choose one of: UD-Q4_K_XL (or IQ3_XXS: --family qwen --model IQ3_XXS, --family swift --model "
+        self.assertIn("choose one of: UD-Q4_K_XL, UD-IQ4_XS (or IQ3_XXS: --family qwen --model IQ3_XXS, --family swift --model "
                       "IQ3_XXS)", out)
         self.assertIn("Strata runs ISTA-DASLab's GSQ-RCO files", out)
 
diff --git a/tools/test_setup_unsloth.py b/tools/test_setup_unsloth.py
index a010b5e8f20..dab1e74c3c2 100644
--- a/tools/test_setup_unsloth.py
+++ b/tools/test_setup_unsloth.py
@@ -126,7 +126,7 @@ def __init__(self, path):
         self.tensors = [types.SimpleNamespace(name=n) for n in names]
 
 
-class Main(unittest.TestCase):
+class Base(unittest.TestCase):
     """setup.main() for the Unsloth choice, every outside effect mocked."""
 
     def setUp(self):
@@ -139,7 +139,7 @@ def setUp(self):
     def tearDown(self):
         self.tmp.cleanup()
 
-    def main(self, argv, ram=63.7, version="0.1.32", n_gpus=1, model=True, amd=(), free=500.0):
+    def main(self, argv, ram=63.7, version="0.1.32", n_gpus=1, model=True, amd=(), free=500.0, m=M):
         eng = self.t / "engine"
         eng.mkdir(exist_ok=True)
         (eng / "BUILD.json").write_text(json.dumps({"version": version, "source": "local"}))
@@ -166,6 +166,7 @@ def fake_run(cmd, *a, **k):
             mock.patch.object(setup, "cpu_info", lambda: ("Test CPU", True, True)),
             mock.patch.object(setup, "page_file_gb", lambda: 16.0),
             mock.patch.object(setup, "free_gb", lambda p: free),
+            mock.patch.object(setup, "rotational_disk", lambda p: None),   # #605: not the test PC's disk
             mock.patch.object(setup, "pip_install", lambda *a, **k: None),
             mock.patch.object(setup, "get_llama_cpp", lambda: self.t / "llama.cpp"),
             mock.patch.object(setup, "get_prebuilt", lambda *a, **k: eng),
@@ -178,7 +179,7 @@ def fake_run(cmd, *a, **k):
             mock.patch.object(setup, "saved_calibration", lambda cfg: None),
             mock.patch.object(setup, "start", mock.Mock(side_effect=AssertionError("started"))),
             mock.patch.dict(sys.modules, {"gguf_reader": types.SimpleNamespace(GGUFFile=FakeGGUF)}),
-            mock.patch.object(sys, "argv", ["setup.py", "--family", "unsloth", *(["--model", M] if model else []),
+            mock.patch.object(sys, "argv", ["setup.py", "--family", "unsloth", *(["--model", m] if model else []),
                                             "--yes", "--no-start",
                                             "--models-dir", str(self.t / "models"), *argv]),
             mock.patch("builtins.input", mock.Mock(side_effect=AssertionError("asked"))),
@@ -187,9 +188,12 @@ def fake_run(cmd, *a, **k):
             for p in patches:
                 st.enter_context(p)
             code, out = quiet(setup.main)
-        cfg = self.t / "strata-unsloth-ud-q4_k_xl.json"
+        cfg = self.t / f"strata-unsloth-{m.lower()}.json"
         return code, out, (json.loads(cfg.read_text()) if cfg.exists() else None)
 
+class Main(Base):
+    """UD-Q4_K_XL."""
+
     def test_install(self):
         code, out, cfg = self.main(["--context", "8192"])
         self.assertEqual(code, 0, out)
@@ -357,6 +361,76 @@ def test_yes_alone_keeps_one_gpu(self):
         self.assertIn("--resident-budget-gib", cfg["args"])
 
 
+X = "UD-IQ4_XS"
+
+
+class IQ4XS(Base):
+    """#621 (EXPERIMENTAL): Unsloth's UD-IQ4_XS - three pinned shards, the same RAM-budget setup as UD-Q4_K_XL (the
+    pack with --compat-bf16, never experts.bin, one GPU, no images), engine 0.1.38 or newer, no AMD question."""
+
+    def test_pins(self):
+        fam = setup.FAMILIES["unsloth"]
+        names = [setup.model_file(fam, X, i) for i in range(1, setup.model_shards(fam, X) + 1)]
+        self.assertEqual(names, list(setup.UNSLOTH_IQ4_XS_SHARDS))
+        self.assertEqual(sum(b for b, _ in setup.UNSLOTH_IQ4_XS_SHARDS.values()), 93682584224)
+        for n, (size, sha) in setup.UNSLOTH_IQ4_XS_SHARDS.items():
+            self.assertRegex(sha, r"^[0-9a-f]{64}$")
+            self.assertEqual(fam["sha256"][n], (size, sha))
+        for n in setup.UNSLOTH_SHARDS:                                         # UD-Q4_K_XL's are still there
+            self.assertEqual(fam["sha256"][n], setup.UNSLOTH_SHARDS[n])
+        self.assertAlmostEqual(setup.MODELS[X]["download_gb"], 93682584224 / 1e9, places=1)
+        self.assertEqual(setup.MODELS[X]["families"], ("unsloth",))
+        self.assertEqual([m for m in setup.MODELS if "unsloth" in setup.MODELS[m].get("families", ())], [M, X])
+        self.assertIsNone(setup.gguf_unsupported(names[0]))                    # #444: a file setup runs now
+        self.assertEqual(setup.gguf_choice(names[0]), ("unsloth", X))
+        self.assertEqual(setup.budget_model({"args": ["--native", "/m/" + names[0]]}), X)
+        self.assertEqual(setup.budget_model({"args": ["--native", "/m/" + list(setup.UNSLOTH_SHARDS)[0]]}), M)
+        self.assertEqual(setup.budget_model({"args": []}), M)
+
+    def test_budget(self):
+        self.assertEqual(setup.resident_budget_gib(X, 63.7), 40)
+        self.assertEqual(setup.resident_budget_gib(X, 95.8), 55)              # at most all of them (59.5 GB)
+        self.assertAlmostEqual(setup.unsloth_split_need_gb(X), 93.7 + setup.UNSLOTH_RAM_LEFT_GB)
+
+    def test_install(self):
+        code, out, cfg = self.main(["--context", "8192"], version="0.1.38", m=X)
+        self.assertEqual(code, 0, out)
+        self.assertIn("EXPERIMENTAL", out)
+        base = f"https://huggingface.co/unsloth/Qwen3.8-Flash-Next-GGUF/resolve/{REV}/UD-IQ4_XS/"
+        self.assertEqual(self.downloads, [base + n for n in setup.UNSLOTH_IQ4_XS_SHARDS])
+        self.assertEqual(self.verified, [(n, *v) for n, v in setup.UNSLOTH_IQ4_XS_SHARDS.items()])
+        packs = [r for r in self.runs if r[1].endswith("iq_pack.py")]
+        self.assertEqual(len(packs), 1, self.runs)
+        self.assertIn("--compat-bf16", packs[0])
+        self.assertNotIn("--experts-bin", packs[0])
+        self.assertTrue(packs[0][packs[0].index("--gguf") + 1].endswith("UD-IQ4_XS-00001-of-00003.gguf"))
+        args = cfg["args"]
+        self.assertEqual(args[args.index("--resident-budget-gib") + 1], "40")
+        self.assertTrue(args[args.index("--native") + 1].endswith("UD-IQ4_XS-00001-of-00003.gguf"))
+        for flag in ("--ple-gguf", "--mmap-experts", "--resident-experts", "--vision"):
+            self.assertNotIn(flag, args)
+        self.assertEqual(cfg["model_name"], "qwen3.8-flash-next-unsloth-ud-iq4_xs")
+        with tempfile.TemporaryDirectory() as t:                               # a start reads the choice back
+            p = Path(t) / "strata-unsloth-ud-iq4_xs.json"
+            p.write_text(json.dumps(cfg))
+            ch = setup.choices_from_config(p)
+            self.assertEqual((ch["family"], ch["model"]), ("unsloth", X))
+
+    def test_engine_0138(self):
+        code, out, cfg = self.main(["--context", "8192"], version="0.1.37", m=X)
+        self.assertEqual(code, 1)
+        self.assertIn("needs engine 0.1.38 or newer; this one is 0.1.37", out)
+        self.assertEqual(self.downloads, [])
+
+    def test_amd_is_not_asked(self):
+        r9700 = [{"index": 0, "name": "AMD Radeon AI PRO R9700", "vram_gb": 31.9, "arch": "gfx1201",
+                  "driver": "amdgpu"}]
+        with mock.patch.object(setup, "get_prebuilt_hip", lambda *a, **k: self.t / "engine"):
+            code, out, cfg = self.main(["--context", "8192", "--backend", "hip"], version="0.1.38", amd=r9700, m=X)
+        self.assertNotIn("has not been run on AMD cards yet", out)
+        self.assertIn("RAM budget: 40 GiB of UD-IQ4_XS's experts", out)
+
+
 class LayerSplit(unittest.TestCase):
     """#498: UD-Q4_K_XL across GPUs - asked at setup (one GPU by default), and a start with --gpus no longer keeps
     the RAM budget the engine refuses with a split (it exited with code 2)."""

From f17d0ea2c61677eb540fe548017a116d38840ecc Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:37:11 +0200
Subject: [PATCH 106/201] File tier: the #577 re-check's log line on Windows
 only (the unbuffered reads exist there alone)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index df49bdeabd3..b342b6fbd65 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4178,7 +4178,9 @@ int main(int argc, char** argv) {
         }
         // #577: the unbuffered choice above was made before the RAM copy existed, from the budget asked for; now the
         // copy is built, decide again from the RAM it really holds and the expert bytes outside it (on a 96 GB PC
-        // the file cache keeps those, and every refill after a prompt read the drive instead)
+        // the file cache keeps those, and every refill after a prompt read the drive instead).  Windows only: the
+        // unbuffered reads exist there alone
+#if defined(_WIN32)
         if (o.mmap_experts && o.resident_budget > 0) {
             std::string why;
             const bool was = src.unbuffered();
@@ -4186,6 +4188,7 @@ int main(int argc, char** argv) {
             std::fprintf(stderr, "strata generate: the file tier reads %s%s (%s)\n",
                          ub ? "unbuffered" : "through the file cache", ub == was ? "" : " (changed)", why.c_str());
         }
+#endif
     }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||

From 4f691beff06bf31adb710b902474d82aa4dedf5a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:40:42 +0200
Subject: [PATCH 107/201] strata_mcp: UD-IQ4_XS in the built-in model table, as
 in setup.py (#621)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 tools/strata_mcp.py | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/tools/strata_mcp.py b/tools/strata_mcp.py
index 811c9bcf519..6aa67f94860 100644
--- a/tools/strata_mcp.py
+++ b/tools/strata_mcp.py
@@ -62,6 +62,9 @@
     "UD-Q4_K_XL": {"about": "4-bit (Unsloth Dynamic), EXPERIMENTAL: the best quality, but most experts come from the "
                             "SSD on a 64 GB PC (7-8.5 tokens/s measured)", "download_gb": 111.3, "ram_gb": 48,
                    "arena_gb": 77.0, "families": ("unsloth",), "budget": True},
+    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), EXPERIMENTAL: between IQ3_S and UD-Q4_K_XL; part of "
+                           "its experts come from the SSD on a 64 GB PC (not measured on NVIDIA yet)",
+                  "download_gb": 93.7, "ram_gb": 48, "arena_gb": 59.5, "families": ("unsloth",), "budget": True},
 }
 FALLBACK_FAMILIES = {
     "qwen": {"title": "Qwen3.8-Flash-Next", "about": "the original model", "tag": ""},
@@ -69,8 +72,9 @@
                                              "authors' numbers)", "tag": "swift-"},
     "coder": {"title": "Qwen3.8-Flash-Next Coder", "about": "half the experts (code, tools, images kept): needs ~32 GB "
                                                             "of RAM, faster; weaker outside coding", "tag": "coder-"},
-    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "about": "4-bit, 111 GB download, most experts read from the "
-                                                                  "SSD: slow (7-8.5 tokens/s on a 64 GB PC)",
+    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "about": "UD-Q4_K_XL (111 GB download) or UD-IQ4_XS (94 GB); "
+                                                                  "part of the experts read from the SSD: slower "
+                                                                  "(UD-Q4_K_XL: 7-8.5 tokens/s on a 64 GB PC)",
                 "tag": "unsloth-", "experimental": True, "vision": False},
 }
 FALLBACK_CONTEXTS = [8192, 32768, 65536, 131072, 262144, 393216, 524288]

From c062690b2b560e09d1bee0ad26b3775fb45bf2d9 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:45:50 +0200
Subject: [PATCH 108/201] docs, setup help: --draft-vocab fr and its measured
 acceptance (#597)

IQ3_XXS on the RTX 5070, temperature 0, 256 tokens, 8 French prompts (topics outside the corpus), 2 English and 2 code
prompts, arms alternating, 2 passes each: drafts accepted in French 0.505 (en) / 0.507 (cjk) -> 0.597 (fr), higher on
all 8 prompts and in each pass; English 0.610 -> 0.629, code 0.772 -> 0.779. Decode speed was not measurable here
(builds ran beside it); the reporter measured 141 -> 158 tok/s in French on an RTX 5090.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md | 5 +++++
 setup.py        | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 99963c31bc5..b8225415dea 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -107,6 +107,11 @@ English/code subset from before (40,525 ids, ~110 MiB less VRAM, English answers
 almost no drafts). `--draft-vocab cyrillic` takes the English/code subset plus the whole Cyrillic script (58,963
 ids): the shipped subsets hold 142 of the vocabulary's 18,580 Cyrillic tokens, so Ukrainian or Russian answers got
 1.4 tokens a round; with it 2.1, and 83 -> 109 tokens/s (RTX 5090, the NVFP4 fork), English unchanged.
+`--draft-vocab fr` (0.1.39, #597) takes the English/code subset plus the 5,686 tokens that cover 99% of a French
+Wikipedia corpus (46,211 ids, `tools/draft_vocab.py --corpus`): 23.6% of French text's tokens were outside the
+English/code subset, 0.7% are outside this one. Drafts accepted in French answers 0.51 -> 0.60 (IQ3_XXS, RTX 5070,
+8 prompts x 2 passes; English 0.61 -> 0.63 and code 0.77 -> 0.78, no loss), and 141 -> 158 tok/s in French on an
+RTX 5090 (IQ3_S, the reporter's measurement).
 `tools/draft_vocab.py` builds and inspects subsets. When the start stops with "the draft head does not fit" (a
 12 GB card with a long context, #474), the engine says how much the head needs, how much VRAM is free and which
 smaller subset fits, and the server's start error repeats it; setup suggests `--draft-vocab en` on cards under
diff --git a/setup.py b/setup.py
index 08412b8d09d..1b4650f15f7 100644
--- a/setup.py
+++ b/setup.py
@@ -3007,7 +3007,7 @@ def main() -> int:
                     help="the draft layer's tokens: cjk = with Chinese, Japanese and Korean (default), en = English "
                          "and code only (~110 MiB less VRAM, English answers 1-2%% faster), cyrillic = English, code "
                          "and the Cyrillic script (Ukrainian, Russian... answers decode ~30%% faster), fr = English, "
-                         "code and French (French answers draft more)")
+                         "code and French (French answers: 18%% more drafts accepted)")
     ap.add_argument("--low-ram", choices=["auto", "on", "off", "resident", "mmap"], default="auto",
                     help="read the model's experts from one file in its folder instead of copying them all into RAM "
                          "(for a PC with a big GPU and little RAM); auto: when the experts would not fit the RAM. In "

From a481806f3af6a87711f030ee41e2ddd655055306 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:50:36 +0200
Subject: [PATCH 109/201] serve tests: the long fixture answer alternates two
 tokens (one repeated token is now ended at 256, #606)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/test_server.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/serve/test_server.py b/serve/test_server.py
index 813fa66dbb5..546fb0c426a 100644
--- a/serve/test_server.py
+++ b/serve/test_server.py
@@ -27,7 +27,8 @@
 
 ROOT = Path(__file__).resolve().parents[1]
 CTX = 4096
-ANSWER = "x" * 2000                              # longer than the old 1024 fallback: one token per byte
+ANSWER = "xy" * 1000                             # longer than the old 1024 fallback: one token per byte (#606: not
+#                                                one token repeated, which the server ends at 256)
 
 
 class RecordingEngine(MockEngine):

From d595a2b18bf07b2e404b13a4385fd930ec56299a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 18:52:00 +0200
Subject: [PATCH 110/201] Hot VRAM resize, opt-in: a segmented expert cache,
 VRAM <reserve>, POST /v1/vram (#533)

--vram-elastic (the config's "vram_elastic": true) allocates the expert cache as one
reserved address range backed by physical segments (CUDA virtual memory management,
512 MiB each, --vram-segment-mib), so every slot keeps its address. Between
requests, the engine command `VRAM <reserve_mib>` gives the last segments back to
the driver until that much VRAM is free (their experts become CPU misses, the prompt
path's loan moves down and its chunk shrinks to fit), or maps them again and puts
the same experts back when more is free. `VRAM` alone: the start's reserve. The
server's POST /v1/vram {"reserve_mib": N | null} sends it after a running request,
keeps it for an engine that is unloaded, and /v1/status shows the cache's size.
Never automatic. One NVIDIA GPU only (no layer split, helper caches, --peer-device
or the resident low-RAM mode); HIP refuses the flag.

RTX 5070, Q2_0 (4.8 GiB cache): reserve 6000 -> 4.3 GiB freed in 78 ms, decode
44 -> 33 tok/s; grown back in 92 ms, the answers token for token the ones before.
Without the flag the cache is the one cudaMalloc it was (same answers with and
without the flag until a VRAM command).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                             |   4 +
 docs/DETAILS.md                            |  12 +
 include/strata/core/expert_cache.hpp       |  45 +++-
 serve/server.py                            |  81 +++++++
 serve/test_vram.py                         | 136 ++++++++++++
 src/core/expert_cache.cpp                  | 247 ++++++++++++++++++++-
 src/program/generate.cpp                   | 156 ++++++++++++-
 tests/core/expert_cache_segmented_test.cpp |  99 +++++++++
 8 files changed, 774 insertions(+), 6 deletions(-)
 create mode 100644 serve/test_vram.py
 create mode 100644 tests/core/expert_cache_segmented_test.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ff8766b20d0..5c58ddf910b 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -384,6 +384,10 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
     target_link_libraries(expert_cache_per_layer_test PRIVATE strata_engine)
     add_test(NAME expert_cache_per_layer_test COMMAND expert_cache_per_layer_test)
     set_tests_properties(expert_cache_per_layer_test PROPERTIES SKIP_RETURN_CODE 77 TIMEOUT 60)
+    add_executable(expert_cache_segmented_test tests/core/expert_cache_segmented_test.cpp)
+    target_link_libraries(expert_cache_segmented_test PRIVATE strata_engine)
+    add_test(NAME expert_cache_segmented_test COMMAND expert_cache_segmented_test)
+    set_tests_properties(expert_cache_segmented_test PROPERTIES SKIP_RETURN_CODE 77 TIMEOUT 60)
   endif()
   if(STRATA_BUILD_CONVERSATION_TESTS)
     add_executable(conversation_snapshot_test src/core/conversation_snapshot_test.cpp)
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 9d2cc7041ac..f11424123c9 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -414,6 +414,18 @@ the OS file cache, so loading again takes seconds while that RAM is not needed e
 16 GB with Q2_0 in the low-RAM mode: unloading takes ~0.3 s, and a request to an unloaded model answered after
 4.6 s (text) or 14.7 s (a picture, image encoder on the CPU).
 
+**Giving part of the VRAM back while it keeps serving (#533, opt-in, one NVIDIA GPU).** With `"vram_elastic": true`
+in the config (the engine flag `--vram-elastic`), the expert cache is allocated in 512 MiB segments
+(`"vram_segment_mib"`), and `POST /v1/vram` with `{"reserve_mib": 8000}` shrinks it between requests until that much
+VRAM is free for another program; `{"reserve_mib": null}` grows it back towards its full size, keeping the reserve
+the engine started with (`--vram-reserve-mib`), and `{"reserve_mib": 0}` takes all of it back. A request that is
+running finishes first. The experts of the segments given back are computed on the CPU, like any expert outside the
+cache, so answers keep coming, slower; growing back puts the same experts in the same slots. Nothing resizes on its
+own. Not with a layer split, the helper caches, `--peer-device` or the resident low-RAM mode. Measured on an RTX 5070
+12 GB with Q2_0 (4.8 GiB cache): `{"reserve_mib": 6000}` took 78 ms and freed 4.3 GiB (the cache keeps 0.5 GiB for
+the prompt path), decode 44 -> 33 tok/s; growing back took 92 ms and the answers were token for token the ones before
+the shrink. Without the flag nothing changes (the same answers as without it).
+
 **Keep what the expert cache learned across restarts (opt-in, engine 0.1.36, #477):** a start fills the GPU's expert
 cache from the shipped profile, and the adaptive tier (`--adapt-every`) then moves in the experts your requests use.
 With `"expert_profile_save": "expert-profile-learned.bin"` in `strata-<model>.json` the engine saves that as a
diff --git a/include/strata/core/expert_cache.hpp b/include/strata/core/expert_cache.hpp
index 4a708355f9d..9a3a57ab5f2 100644
--- a/include/strata/core/expert_cache.hpp
+++ b/include/strata/core/expert_cache.hpp
@@ -93,13 +93,44 @@ class ExpertCache {
     void close();
 
     bool valid() const { return base_ != nullptr; }
-    int64_t slots() const { return slots_; }
+    /// The slots usable now: all of them, unless `shrink` gave the tail's VRAM back (#533) - then the ones wholly
+    /// inside the VRAM still backed, always a prefix.  The prompt path's loan (the last slots) and every report
+    /// follow this; `full_slots()` is what `open` allocated.
+    int64_t slots() const { return live_slots_; }
+    int64_t full_slots() const { return slots_; }
     /// Slots actually claimed.  Not the same as `slots()` - the cache does not evict, so a run that routes
     /// fewer distinct experts than there are slots leaves the rest empty.
     int64_t resident() const { return per_layer_ ? admitted_ : next_free_; }
-    int64_t bytes() const { return off_.empty() ? slots_ * blob_ : (int64_t) off_.back(); }
+    /// The bytes of `slots()` (all of the arena unless shrunk); `full_bytes()`: of every slot.
+    int64_t bytes() const { return slot_end(live_slots_); }
+    int64_t full_bytes() const { return slot_end(slots_); }
     double gib() const { return (double) bytes() / 1073741824.0; }
 
+    /// **#533: HOT VRAM RESIZE, OPT-IN (--vram-elastic).**  With a segment size set before `open`/`open_sized`, the
+    /// arena is one reserved address range backed by physical segments of that size (CUDA virtual memory
+    /// management) instead of one cudaMalloc, so `shrink` can give the tail's VRAM back to the driver - for another
+    /// program - and `grow` can take it again, while every slot keeps its address (the captured graphs, the verify
+    /// plan's pointers and the prompt path's loan all hold addresses into it).  0 (the default): one cudaMalloc, as
+    /// always.  CUDA only: a HIP build refuses it at open.  The slots past `slots()` after a shrink must hold no
+    /// resident expert and no loan: the CALLER evicts them first (they become CPU misses).
+    void set_segment_bytes(int64_t seg_bytes) { seg_req_ = seg_bytes > 0 ? seg_bytes : 0; }
+    bool segmented() const { return !segs_.empty(); }
+    int64_t segment_bytes() const { return seg_; }
+    /// Bytes of the arena backed by VRAM now (a whole number of segments; the arena when not segmented).
+    int64_t mapped_bytes() const;
+    /// Unmaps every segment past the first `keep_bytes` (rounded UP to a segment boundary): `slots()` becomes the
+    /// slots wholly inside what stays.  Waits for the device first.  False with `err` when not segmented or a driver
+    /// call failed.
+    bool shrink(int64_t keep_bytes, std::string& err);
+    /// Maps segments again up to `want_bytes` (rounded DOWN to a segment, at most the arena; the last, shorter
+    /// segment only when `want_bytes` covers the arena).  Stops at the first segment the driver cannot back (false,
+    /// `err`: what was mapped by then stays).  The new slots are empty until the caller fills them.
+    bool grow(int64_t want_bytes, std::string& err);
+    /// The number of leading slots that fit wholly inside the first `bytes` bytes.
+    int64_t slots_within(int64_t bytes) const;
+    /// The bytes the first `n` slots span.
+    int64_t bytes_of(int64_t n) const { return slot_end(n < 0 ? 0 : n > slots_ ? slots_ : n); }
+
     /// `(layer, expert)` -> slot index, or `kNotResident`.  Bounds-checked: a bad layer or expert returns
     /// `kNotResident` rather than reading whatever is adjacent in the table.
     int32_t slot_of(int64_t layer, int64_t expert) const;
@@ -164,7 +195,17 @@ class ExpertCache {
     uint8_t* blocking_staging_ = nullptr;
     std::size_t blocking_staging_bytes_ = 0;
 #endif
+    int64_t slot_end(int64_t n) const { return off_.empty() ? n * blob_ : (int64_t) off_[(size_t) n]; }
+    bool open_segmented(uint64_t want, std::string& err);
+    void release_segmented();
     uint8_t* base_ = nullptr;
+    int64_t live_slots_ = 0;            ///< #533: slots() - all of them unless shrunk
+    int64_t seg_req_ = 0;               ///< #533: the segment size asked for (0: one cudaMalloc)
+    int64_t seg_ = 0;                   ///< #533: the segment size used (a multiple of the driver's granularity)
+    uint64_t reserved_ = 0;             ///< #533: the reserved address range's size
+    std::vector<unsigned long long> segs_;   ///< #533: each segment's physical handle (0: unmapped)
+    std::vector<int64_t> seg_size_;     ///< #533: each segment's size (the last one may be shorter)
+    int64_t mapped_segs_ = 0;           ///< #533: segments [0, mapped_segs_) are backed
     std::vector<int32_t> residency_;   ///< [n_layers * n_expert] -> slot or kNotResident
     int64_t slots_ = 0;
     int64_t n_layers_ = 0;
diff --git a/serve/server.py b/serve/server.py
index 46e3fc3695e..9d0151e6e54 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -444,6 +444,37 @@ def _parse_done(self, line):
         if len(f) >= 15:                                  # #471 (engine 0.1.36+): the prompt tokens actually read
             self.last.update(prompt_read=int(f[14]))
 
+    def vram(self, reserve_mib: int | None, timeout: float = 120.0) -> dict:
+        """#533: `VRAM <reserve_mib>` between requests (the caller holds the service's FIFO): the engine shrinks its
+        expert cache until that much VRAM is free, or grows it back when more is free; None: back to the reserve it
+        started with.  -> the engine's figures (expert_slots, expert_cache_mib, vram_free_mib, ...); raises ValueError
+        with the engine's reason (e.g. it was not started with --vram-elastic), EngineDied when it ended."""
+        if not self.alive():
+            raise EngineDied("the engine is not running")
+        self.proc.stdin.write("VRAM" + ("" if reserve_mib is None else f" {int(reserve_mib)}") + "\n")
+        self.proc.stdin.flush()
+        deadline = time.time() + timeout
+        while True:
+            try:
+                line = self.lines.get(timeout=max(0.1, deadline - time.time()))
+            except queue.Empty:
+                raise EngineDied("the engine did not answer the VRAM command") from None
+            if line is None:
+                raise EngineDied("the engine ended")
+            line = line.strip()
+            if line.startswith("ERR"):
+                raise ValueError(line[4:].strip() or "the engine refused the VRAM command")
+            if line.startswith("VRAM "):
+                out = {}
+                for kv in line.split()[1:]:
+                    k, _, v = kv.partition("=")
+                    out[k] = int(v) if v.lstrip("-").isdigit() else v
+                self.info.update({k: out[k] for k in ("expert_slots", "vram_free_mib") if k in out})
+                self.info["vram"] = out
+                return out
+            if time.time() > deadline:
+                raise EngineDied("the engine did not answer the VRAM command")
+
     @staticmethod
     def sampling_keys(sampling: dict) -> str:
         keys = ""
@@ -798,6 +829,13 @@ def engine_args(cfg: dict) -> list[str]:
     # opt-in: an auto split runs on the first card alone when it holds every profiled expert and the KV
     if len(gpu_list(cfg)) > 1 and cfg.get("split_skip_if_fits") and "--split-skip-if-fits" not in args:
         args.append("--split-skip-if-fits")
+    # #533 (opt-in): "vram_elastic": true - the expert cache in segments, so POST /v1/vram can give VRAM back to other
+    # programs and take it back; "vram_segment_mib" sets the segment size (the engine's default: 512)
+    if cfg.get("vram_elastic") is True and "--vram-elastic" not in args:
+        args.append("--vram-elastic")
+        seg = cfg.get("vram_segment_mib")
+        if isinstance(seg, int) and not isinstance(seg, bool) and seg > 0 and "--vram-segment-mib" not in args:
+            args += ["--vram-segment-mib", str(seg)]
     return learned_profile_args(cfg, args)
 
 
@@ -988,6 +1026,7 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         self.idle_unload_s = 0
         self.min_free_vram_mib = 0
         self.before_load = None
+        self.vram_reserve = None                         # #533: the last POST /v1/vram reserve (None: the start's)
         self.reasoning_budget_tokens = 0                 # #123: the config's default thinking budget (0: none)
         self.anthropic_think_unasked = True               # #278: "anthropic_thinking": "on_request" -> False
         self.stop_ids = set(tokenizer.encode(IM_END, parse_special=True) +
@@ -1088,6 +1127,35 @@ def ensure_loaded(self):
                   "(a minute or two) ...", flush=True)
         self.engine.restart()
         print("[strata] the engine is running again", flush=True)
+        if self.vram_reserve is not None and hasattr(self.engine, "vram"):   # #533: the reserve asked for last
+            try:
+                self.engine.vram(self.vram_reserve)
+            except (ValueError, EngineDied) as e:
+                print(f"[strata] the VRAM reserve ({self.vram_reserve} MiB) was not applied: {e}", flush=True)
+
+    vram_wait_s = 300.0                                  # #533: how long POST /v1/vram waits for a running request
+
+    def vram(self, reserve_mib: int | None) -> dict:
+        """#533, POST /v1/vram: keep `reserve_mib` of VRAM free for other programs (None: the reserve the engine
+        started with), applied between requests - a request that is running finishes first (up to wait_s).  Only an
+        engine started with --vram-elastic (the config's "vram_elastic": true) can do it; it never resizes on its own.
+        An unloaded engine applies it when it loads.  -> {"status": ..., and the engine's figures}."""
+        if not hasattr(self.engine, "vram"):
+            raise ValueError("this engine cannot resize its VRAM use")
+        if not self.fifo.acquire(timeout=self.vram_wait_s):
+            raise ModelBusy("a request is still running; try again when it has finished")
+        try:
+            if not self.loaded():
+                self.vram_reserve = reserve_mib
+                return {"status": "not loaded", "reserve_mib": reserve_mib,
+                        "note": "applied when the model loads"}
+            out = self.engine.vram(reserve_mib)
+            self.vram_reserve = reserve_mib
+            print(f"[strata] VRAM: {out.get('vram_free_mib')} MiB free, expert cache {out.get('expert_cache_mib')} of "
+                  f"{out.get('expert_cache_full_mib')} MiB ({out.get('expert_slots')} experts)", flush=True)
+            return {"status": "ok", **out}
+        finally:
+            self.fifo.release()
 
     def _say_died(self, e: Exception) -> None:
         """The server window's line for an engine that died (or was ended, #481) in the middle of a request."""
@@ -1326,6 +1394,8 @@ def scaled(v, unit, digits=0):
             "activity": {"requests": totals["requests"] + int(busy), "in_flight": int(busy) + int(s.get("queued") or 0),
                          "last_request_at": int(last_at) if last_at else None},
             "last_timings": last_t,
+            "vram": dict((getattr(self.engine, "info", {}) or {}).get("vram") or {},
+                         elastic=bool((getattr(self.engine, "info", {}) or {}).get("vram_elastic"))),
             "machine": {
                 "at": int(time.time()),
                 "gpu": {"name": static.get("gpu_name"), "used_mib": scaled(hw.get("gpu_mem_used"), 2 ** 20),
@@ -2272,6 +2342,17 @@ def do_POST(self):
                         result = "loaded"
                     self._json(200, {"status": result, **svc.v1_status()})
                     return
+                if path == "/v1/vram":                       # #533: give VRAM back to other programs, or take it
+                    if not self._own_page("the VRAM reserve can be changed"):
+                        return
+                    r = req.get("reserve_mib")
+                    if r is not None and (isinstance(r, bool) or not isinstance(r, int) or r < 0):
+                        raise ValueError("reserve_mib: a whole number of MiB (0 or more), or null for the start's")
+                    try:
+                        self._json(200, svc.vram(r))
+                    except EngineDied as e:
+                        self._json(503, {"error": {"type": "server_error", "message": str(e)}})
+                    return
                 if path in ("/v1/chat/completions", "/v1/messages"):
                     self.record = svc.begin_request(path, req)
                 if path == "/v1/chat/completions":
diff --git a/serve/test_vram.py b/serve/test_vram.py
new file mode 100644
index 00000000000..e1abe0b6b61
--- /dev/null
+++ b/serve/test_vram.py
@@ -0,0 +1,136 @@
+"""#533: POST /v1/vram (opt-in hot VRAM resize) - the engine command, the route, the config key, a reserve kept for
+an unloaded engine and applied when it loads again."""
+import io
+import json
+import queue
+import unittest
+import urllib.error
+import urllib.request
+from pathlib import Path
+from unittest import mock
+
+from serve.frontend import ChatTemplate
+from serve.server import ByteTokenizer, EngineDied, Service, StrataEngine, engine_args, serve
+from serve.test_lifecycle import ResidentEngine
+
+
+class VramEngine(ResidentEngine):
+    """The resident test engine with an elastic cache: VRAM n frees what the reserve asks for, None takes the
+    start's (700 MiB)."""
+    def __init__(self, tok, elastic=True):
+        super().__init__(tok)
+        self.elastic, self.calls = elastic, []
+
+    def vram(self, reserve_mib, timeout=120.0):
+        self.calls.append(reserve_mib)
+        if not self.elastic:
+            raise ValueError("VRAM needs an engine started with --vram-elastic (one NVIDIA GPU, --serve)")
+        r = 700 if reserve_mib is None else reserve_mib
+        out = {"reserve_mib": r, "expert_slots": max(100, 4000 - r), "expert_cache_mib": max(500, 6000 - r),
+               "expert_cache_full_mib": 6000, "vram_free_mib": r, "prompt_chunk": 4096}
+        self.info["vram"] = out
+        return out
+
+
+class EngineCommand(unittest.TestCase):
+    def engine(self, replies):
+        e = StrataEngine("missing-executable", [], lazy=True)
+        e.proc = mock.Mock()
+        e.proc.poll.return_value = None
+        e.proc.stdin = io.StringIO()
+        e.ended = False
+        e.lines = queue.Queue()
+        for r in replies:
+            e.lines.put(r)
+        return e
+
+    def test_the_line_and_the_answer(self):
+        e = self.engine(["strata serve: something else\n",
+                         "VRAM reserve_mib=6000 expert_slots=1200 expert_slots_full=3700 expert_cache_mib=1536 "
+                         "expert_cache_full_mib=4900 vram_free_mib=6100 prompt_chunk=2048\n"])
+        out = e.vram(6000)
+        self.assertEqual(e.proc.stdin.getvalue(), "VRAM 6000\n")
+        self.assertEqual(out["expert_slots"], 1200)
+        self.assertEqual(out["prompt_chunk"], 2048)
+        self.assertEqual(e.info["expert_slots"], 1200)
+        e = self.engine(["VRAM reserve_mib=700 expert_slots=3700\n"])
+        e.vram(None)
+        self.assertEqual(e.proc.stdin.getvalue(), "VRAM\n")
+
+    def test_refused_and_died(self):
+        e = self.engine(["ERR VRAM needs an engine started with --vram-elastic\n"])
+        with self.assertRaisesRegex(ValueError, "--vram-elastic"):
+            e.vram(100)
+        e = self.engine([None])
+        with self.assertRaises(EngineDied):
+            e.vram(100)
+
+    def test_config_key(self):
+        cfg = {"args": ["--max-context", "8192"]}
+        self.assertEqual(engine_args(cfg), ["--max-context", "8192"])           # off unless asked
+        self.assertEqual(engine_args({**cfg, "vram_elastic": True, "vram_segment_mib": 256}),
+                         ["--max-context", "8192", "--vram-elastic", "--vram-segment-mib", "256"])
+        self.assertEqual(engine_args({**cfg, "vram_elastic": "yes"}), ["--max-context", "8192"])
+
+
+class Route(unittest.TestCase):
+    def setUp(self):
+        tok = ByteTokenizer()
+        self.engine = VramEngine(tok)
+        self.svc = Service(self.engine, tok, ChatTemplate(Path(__file__).parent / "chat_template.jinja"))
+        self.httpd = serve(self.svc, port=0)
+        self.base = f"http://127.0.0.1:{self.httpd.server_address[1]}"
+
+    def tearDown(self):
+        self.httpd.shutdown()
+        self.httpd.server_close()
+
+    def request(self, path, body=None, headers=None):
+        req = urllib.request.Request(self.base + path, data=json.dumps(body).encode() if body is not None else None,
+                                     headers={"Content-Type": "application/json", **(headers or {})})
+        try:
+            response = urllib.request.urlopen(req, timeout=10)
+        except urllib.error.HTTPError as error:
+            response = error
+        with response:
+            return response.status, json.loads(response.read().decode())
+
+    def test_resize_and_status(self):
+        self.engine.loaded = True
+        code, body = self.request("/v1/vram", {"reserve_mib": 4000})
+        self.assertEqual(code, 200, body)
+        self.assertEqual(body["status"], "ok")
+        self.assertEqual(body["expert_cache_mib"], 2000)
+        self.assertEqual(self.request("/v1/status")[1]["vram"]["expert_cache_mib"], 2000)
+        code, body = self.request("/v1/vram", {"reserve_mib": None})   # back to the start's reserve
+        self.assertEqual(code, 200)
+        self.assertEqual(self.engine.calls, [4000, None])
+
+    def test_bad_input_busy_and_foreign_pages(self):
+        self.engine.loaded = True
+        for bad in ({"reserve_mib": -1}, {"reserve_mib": "8 GiB"}, {"reserve_mib": True}, {"reserve_mib": 1.5}):
+            self.assertEqual(self.request("/v1/vram", bad)[0], 400, bad)
+        self.assertEqual(self.request("/v1/vram", {"reserve_mib": 1}, {"Origin": "https://other.example"})[0], 403)
+        self.assertEqual(self.request("/v1/vram", {"reserve_mib": 1}, {"Content-Type": "text/plain"})[0], 415)
+        self.svc.vram_wait_s = 0.2
+        with self.svc.fifo:                                   # a request is running
+            self.assertEqual(self.request("/v1/vram", {"reserve_mib": 1})[0], 409)
+        self.assertEqual(self.engine.calls, [])
+
+    def test_an_engine_without_the_flag_says_so(self):
+        self.engine.loaded, self.engine.elastic = True, False
+        code, body = self.request("/v1/vram", {"reserve_mib": 3000})
+        self.assertEqual(code, 400)
+        self.assertIn("--vram-elastic", body["error"]["message"])
+
+    def test_unloaded_keeps_the_reserve_for_the_next_load(self):
+        code, body = self.request("/v1/vram", {"reserve_mib": 5000})
+        self.assertEqual(code, 200)
+        self.assertEqual(body["status"], "not loaded")
+        self.assertEqual(self.engine.calls, [])
+        self.assertEqual(self.request("/v1/load", {})[0], 200)
+        self.assertEqual(self.engine.calls, [5000])
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/src/core/expert_cache.cpp b/src/core/expert_cache.cpp
index dc644436799..e25f60e9fb2 100644
--- a/src/core/expert_cache.cpp
+++ b/src/core/expert_cache.cpp
@@ -2,6 +2,9 @@
 #include "strata/core/expert_cache.hpp"
 
 #include <cuda_runtime.h>
+#if !defined(STRATA_USE_HIP)
+#include <cuda.h>   // #533: the virtual memory management types (the functions come through the runtime's entry points)
+#endif
 
 #include <algorithm>
 #include <cstdio>
@@ -142,6 +145,239 @@ bool write_expert_profile(const std::string& path, int64_t n_layers, int64_t n_e
 
 ExpertCache::~ExpertCache() { close(); }
 
+// ---- #533: the segmented arena (--vram-elastic).  The driver API's virtual memory functions, looked up through the
+// runtime (no link against the driver library): one address range for the whole arena, backed by physical segments,
+// and the tail's segments unmapped / mapped again later.  Nothing here runs unless a segment size was set.
+#if !defined(STRATA_USE_HIP)
+namespace {
+struct Vmm {
+    CUresult (CUDAAPI* device_get)(CUdevice*, int) = nullptr;
+    CUresult (CUDAAPI* attribute)(int*, CUdevice_attribute, CUdevice) = nullptr;
+    CUresult (CUDAAPI* granularity)(size_t*, const CUmemAllocationProp*, CUmemAllocationGranularity_flags) = nullptr;
+    CUresult (CUDAAPI* reserve)(CUdeviceptr*, size_t, size_t, CUdeviceptr, unsigned long long) = nullptr;
+    CUresult (CUDAAPI* address_free)(CUdeviceptr, size_t) = nullptr;
+    CUresult (CUDAAPI* create)(CUmemGenericAllocationHandle*, size_t, const CUmemAllocationProp*,
+                               unsigned long long) = nullptr;
+    CUresult (CUDAAPI* release)(CUmemGenericAllocationHandle) = nullptr;
+    CUresult (CUDAAPI* map)(CUdeviceptr, size_t, size_t, CUmemGenericAllocationHandle, unsigned long long) = nullptr;
+    CUresult (CUDAAPI* unmap)(CUdeviceptr, size_t) = nullptr;
+    CUresult (CUDAAPI* set_access)(CUdeviceptr, size_t, const CUmemAccessDesc*, size_t) = nullptr;
+    bool ok = false;
+};
+
+template <class F> bool entry(const char* name, F& f) {
+    void* p = nullptr;
+    cudaDriverEntryPointQueryResult q{};
+#if CUDART_VERSION >= 12050
+    const cudaError_t e = cudaGetDriverEntryPointByVersion(name, &p, 12000, cudaEnableDefault, &q);
+#else
+    const cudaError_t e = cudaGetDriverEntryPoint(name, &p, cudaEnableDefault, &q);
+#endif
+    if (e != cudaSuccess || q != cudaDriverEntryPointSuccess || p == nullptr) {
+        (void) cudaGetLastError();
+        return false;
+    }
+    f = reinterpret_cast<F>(p);
+    return true;
+}
+
+const Vmm& vmm() {
+    static const Vmm v = [] {
+        Vmm x;
+        x.ok = entry("cuDeviceGet", x.device_get) && entry("cuDeviceGetAttribute", x.attribute) &&
+               entry("cuMemGetAllocationGranularity", x.granularity) && entry("cuMemAddressReserve", x.reserve) &&
+               entry("cuMemAddressFree", x.address_free) && entry("cuMemCreate", x.create) &&
+               entry("cuMemRelease", x.release) && entry("cuMemMap", x.map) && entry("cuMemUnmap", x.unmap) &&
+               entry("cuMemSetAccess", x.set_access);
+        return x;
+    }();
+    return v;
+}
+
+CUmemAllocationProp device_prop(int dev) {
+    CUmemAllocationProp prop{};
+    prop.type = CU_MEM_ALLOCATION_TYPE_PINNED;
+    prop.location.type = CU_MEM_LOCATION_TYPE_DEVICE;
+    prop.location.id = dev;
+    return prop;
+}
+
+// one segment: a physical allocation mapped at `va`, readable and writable by this device
+bool map_segment(const Vmm& v, int dev, CUdeviceptr va, size_t bytes, unsigned long long& handle) {
+    const CUmemAllocationProp prop = device_prop(dev);
+    CUmemGenericAllocationHandle h = 0;
+    if (v.create(&h, bytes, &prop, 0) != CUDA_SUCCESS) return false;
+    if (v.map(va, bytes, 0, h, 0) != CUDA_SUCCESS) {
+        v.release(h);
+        return false;
+    }
+    CUmemAccessDesc access{};
+    access.location.type = CU_MEM_LOCATION_TYPE_DEVICE;
+    access.location.id = dev;
+    access.flags = CU_MEM_ACCESS_FLAGS_PROT_READWRITE;
+    if (v.set_access(va, bytes, &access, 1) != CUDA_SUCCESS) {
+        v.unmap(va, bytes);
+        v.release(h);
+        return false;
+    }
+    handle = (unsigned long long) h;
+    return true;
+}
+}  // namespace
+#endif
+
+bool ExpertCache::open_segmented(uint64_t want, std::string& err) {
+#if defined(STRATA_USE_HIP)
+    (void) want;
+    err = "ExpertCache: --vram-elastic (a segmented expert cache) is CUDA-only for now";
+    return false;
+#else
+    const Vmm& v = vmm();
+    int dev = 0, supported = 0;
+    CUdevice cu = 0;
+    if (!v.ok || cudaGetDevice(&dev) != cudaSuccess || v.device_get(&cu, dev) != CUDA_SUCCESS ||
+        v.attribute(&supported, CU_DEVICE_ATTRIBUTE_VIRTUAL_MEMORY_MANAGEMENT_SUPPORTED, cu) != CUDA_SUCCESS ||
+        !supported) {
+        err = "ExpertCache: --vram-elastic needs the driver's virtual memory management, which this GPU or driver "
+              "does not offer";
+        return false;
+    }
+    const CUmemAllocationProp prop = device_prop(dev);
+    size_t gran = 0;
+    if (v.granularity(&gran, &prop, CU_MEM_ALLOC_GRANULARITY_RECOMMENDED) != CUDA_SUCCESS || gran == 0) {
+        err = "ExpertCache: cannot read the driver's allocation granularity";
+        return false;
+    }
+    const uint64_t g = (uint64_t) gran;
+    const uint64_t total = (want + g - 1) / g * g;
+    seg_ = (int64_t) (((uint64_t) seg_req_ + g - 1) / g * g);
+    CUdeviceptr va = 0;
+    if (v.reserve(&va, (size_t) total, 0, 0, 0) != CUDA_SUCCESS) {
+        err = "ExpertCache: cannot reserve the address range of the segmented expert cache";
+        return false;
+    }
+    base_ = reinterpret_cast<uint8_t*>(va);
+    reserved_ = total;
+    for (uint64_t at = 0; at < total; at += (uint64_t) seg_) {
+        segs_.push_back(0);
+        seg_size_.push_back((int64_t) std::min<uint64_t>((uint64_t) seg_, total - at));
+    }
+    for (size_t i = 0; i < segs_.size(); ++i) {
+        if (!map_segment(v, dev, va + (CUdeviceptr) ((uint64_t) i * (uint64_t) seg_), (size_t) seg_size_[i],
+                         segs_[i])) {
+            char buf[200];
+            std::snprintf(buf, sizeof buf, "ExpertCache: cudaMalloc failed: segment %zu of %zu (%.2f GiB) of the "
+                          "segmented cache could not be allocated", i + 1, segs_.size(),
+                          (double) seg_size_[i] / 1073741824.0);
+            err = buf;   // "cudaMalloc failed": the auto cache's smaller-retry path reads it as an allocation failure
+            release_segmented();
+            return false;
+        }
+        mapped_segs_ = (int64_t) i + 1;
+    }
+    return true;
+#endif
+}
+
+void ExpertCache::release_segmented() {
+#if !defined(STRATA_USE_HIP)
+    const Vmm& v = vmm();
+    if (base_ != nullptr) cudaDeviceSynchronize();
+    const CUdeviceptr va = reinterpret_cast<CUdeviceptr>(base_);
+    for (size_t i = 0; i < segs_.size(); ++i)
+        if (segs_[i] != 0) {
+            v.unmap(va + (CUdeviceptr) ((uint64_t) i * (uint64_t) seg_), (size_t) seg_size_[i]);
+            v.release((CUmemGenericAllocationHandle) segs_[i]);
+        }
+    if (base_ != nullptr && reserved_ > 0) v.address_free(va, (size_t) reserved_);
+#endif
+    segs_.clear();
+    seg_size_.clear();
+    mapped_segs_ = 0;
+    reserved_ = 0;
+    base_ = nullptr;
+}
+
+int64_t ExpertCache::mapped_bytes() const {
+    if (segs_.empty()) return base_ != nullptr ? full_bytes() : 0;
+    int64_t b = 0;
+    for (int64_t i = 0; i < mapped_segs_; ++i) b += seg_size_[(size_t) i];
+    return b;
+}
+
+int64_t ExpertCache::slots_within(int64_t bytes) const {
+    if (bytes >= full_bytes()) return slots_;
+    if (bytes <= 0) return 0;
+    if (off_.empty()) return blob_ > 0 ? bytes / blob_ : 0;
+    // off_[i + 1] is slot i's end: count the slots whose end is at most `bytes`
+    return (int64_t) (std::upper_bound(off_.begin() + 1, off_.end(), (uint64_t) bytes) - (off_.begin() + 1));
+}
+
+bool ExpertCache::shrink(int64_t keep_bytes, std::string& err) {
+    if (segs_.empty()) {
+        err = "the expert cache is not segmented (the engine needs --vram-elastic)";
+        return false;
+    }
+#if defined(STRATA_USE_HIP)
+    (void) keep_bytes;
+    return false;
+#else
+    const Vmm& v = vmm();
+    int64_t keep = 0, at = 0;   // the segments [0, keep) hold the first keep_bytes
+    while (keep < (int64_t) segs_.size() && at < keep_bytes) at += seg_size_[(size_t) keep++];
+    if (keep >= mapped_segs_) return true;
+    if (cudaDeviceSynchronize() != cudaSuccess) {
+        err = std::string("the device failed before the cache shrank: ") + cudaGetErrorString(cudaGetLastError());
+        return false;
+    }
+    const CUdeviceptr va = reinterpret_cast<CUdeviceptr>(base_);
+    for (int64_t i = mapped_segs_ - 1; i >= keep; --i) {
+        const CUdeviceptr p = va + (CUdeviceptr) ((uint64_t) i * (uint64_t) seg_);
+        if (v.unmap(p, (size_t) seg_size_[(size_t) i]) != CUDA_SUCCESS ||
+            v.release((CUmemGenericAllocationHandle) segs_[(size_t) i]) != CUDA_SUCCESS) {
+            err = "the driver refused to release an expert-cache segment";
+            live_slots_ = slots_within(mapped_bytes());
+            return false;
+        }
+        segs_[(size_t) i] = 0;
+        mapped_segs_ = i;
+    }
+    live_slots_ = slots_within(mapped_bytes());
+    return true;
+#endif
+}
+
+bool ExpertCache::grow(int64_t want_bytes, std::string& err) {
+    if (segs_.empty()) {
+        err = "the expert cache is not segmented (the engine needs --vram-elastic)";
+        return false;
+    }
+#if defined(STRATA_USE_HIP)
+    (void) want_bytes;
+    return false;
+#else
+    const Vmm& v = vmm();
+    int dev = 0;
+    cudaGetDevice(&dev);
+    const CUdeviceptr va = reinterpret_cast<CUdeviceptr>(base_);
+    int64_t at = mapped_bytes();
+    while (mapped_segs_ < (int64_t) segs_.size() && at + seg_size_[(size_t) mapped_segs_] <= want_bytes) {
+        const size_t i = (size_t) mapped_segs_;
+        if (!map_segment(v, dev, va + (CUdeviceptr) ((uint64_t) i * (uint64_t) seg_), (size_t) seg_size_[i],
+                         segs_[i])) {
+            (void) cudaGetLastError();
+            err = "the driver has no VRAM for another expert-cache segment";
+            live_slots_ = slots_within(mapped_bytes());
+            return false;
+        }
+        at += seg_size_[i];
+        ++mapped_segs_;
+    }
+    live_slots_ = slots_within(mapped_bytes());
+    return true;
+#endif
+}
+
 #if defined(STRATA_USE_HIP)
 bool ExpertCache::ensure_blocking_staging(std::size_t bytes, std::string& err) {
     if (bytes <= blocking_staging_bytes_) return true;
@@ -193,7 +429,9 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert, int6
         }
     }
 
-    if (cudaMalloc((void**) &base_, (size_t) want) != cudaSuccess) {
+    if (seg_req_ > 0) {   // #533: --vram-elastic: physical segments behind one address range (zeroed below)
+        if (!open_segmented(want, err)) return false;
+    } else if (cudaMalloc((void**) &base_, (size_t) want) != cudaSuccess) {
         base_ = nullptr;
         char buf[256];
         std::snprintf(buf, sizeof buf, "ExpertCache: cudaMalloc(%.2f GiB) failed: %s",
@@ -211,6 +449,7 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert, int6
 
     residency_.assign((size_t) (n_layers * n_expert), kNotResident);
     slots_ = n_slots;
+    live_slots_ = n_slots;
     n_layers_ = n_layers;
     n_expert_ = n_expert;
     blob_ = blob_bytes;
@@ -247,6 +486,7 @@ bool ExpertCache::open_sized(const std::vector<int64_t>& slot_bytes, int64_t n_l
     // one allocation of the summed size, through the uniform path's checks: n "slots" of 1 byte
     if (!open((int64_t) off.back(), n_layers, n_expert, 1, err)) return false;
     slots_ = (int64_t) slot_bytes.size();
+    live_slots_ = slots_;
     blob_ = mx;
     off_ = std::move(off);
 #if defined(STRATA_USE_HIP)
@@ -273,12 +513,15 @@ void ExpertCache::close() {
     blocking_staging_bytes_ = 0;
 #endif
     off_.clear();
-    if (base_ != nullptr) {
+    if (!segs_.empty()) {
+        release_segmented();
+    } else if (base_ != nullptr) {
         cudaFree(base_);
         base_ = nullptr;
     }
     residency_.clear();
     slots_ = 0;
+    live_slots_ = 0;
     n_layers_ = 0;
     n_expert_ = 0;
     blob_ = 0;
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index a7c77d0efff..af5228084ea 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -340,6 +340,10 @@ struct Options {
     /// and the KV state, minus this reserve for the graphs, the hit scratch and the head.
     int vram_reserve_mib = 700;
     bool vram_reserve_given = false;   ///< --vram-reserve-mib on the command line (#496: no smaller automatic reserve)
+    /// #533 (opt-in): the expert cache in physical segments (CUDA virtual memory management), so the serve loop's
+    /// `VRAM <reserve_mib>` command can give part of it back to other programs and take it again.  Off: one cudaMalloc.
+    bool vram_elastic = false;
+    int64_t vram_segment_mib = 512;
     /// Plan v0.3 P5: batched prompt processing in chunks of this many tokens (0 = the token path).
     int64_t prefill_chunk = 0;
     /// `--prefill auto`: the largest chunk (up to 8192) whose buffers the expert cache can lend.  Every expert a chunk
@@ -515,6 +519,9 @@ void usage() {
                  "  --conversation-cache-mib N  --serve: RAM budget for parked conversations (default 0 = off)\n"
                  "  --conversation-cache-slots N  --serve: at most N parked conversations (default 4)\n"
                  "  --conversation-cache-min-free-mib N  --serve: physical RAM floor when parking (default 2560)\n"
+                 "  --vram-elastic       --serve (#533, opt-in, NVIDIA): the expert cache in segments (--vram-segment-mib,\n"
+                 "                       default 512), so the command `VRAM <reserve_mib>` (the server's POST /v1/vram) can\n"
+                 "                       give VRAM back to other programs between requests and take it back later\n"
                  "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
                  "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
                  "  --short-read N       --serve: read at most N fresh text tokens through the decode windows instead\n"
@@ -1211,6 +1218,8 @@ int main(int argc, char** argv) {
         }
         else if (a == "--no-split-rows") o.no_split_rows = true;
         else if (a == "--no-prefill-borrow") o.no_prefill_borrow = true;
+        else if (a == "--vram-elastic") o.vram_elastic = true;
+        else if (a == "--vram-segment-mib") o.vram_segment_mib = std::atoll(next("--vram-segment-mib"));
         else if (a == "--prefill-until") o.prefill_until = std::atoll(next("--prefill-until"));
         else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
         else if (a == "--spec") o.spec = std::atoi(next("--spec"));
@@ -2952,6 +2961,24 @@ int main(int argc, char** argv) {
         }
         o.expert_cache = (int) sized_slots.size();
     }
+    // #533: --vram-elastic: the cache in physical segments (the VRAM command resizes it between requests).  One GPU,
+    // no helper caches, serve mode: anything else keeps the one cudaMalloc, said once.
+    if (o.vram_elastic) {
+        const char* why = !o.serve ? "it works between requests of --serve"
+                        : multi_gpu ? "a layer split has a cache per GPU"
+                        : std::any_of(o.expert_cache_remote.begin(), o.expert_cache_remote.end(),
+                                      [](int n) { return n > 0; }) ? "the helper caches on other GPUs"
+                        : o.vram_segment_mib < 64 ? "--vram-segment-mib is below 64" : nullptr;
+#if defined(STRATA_USE_HIP)
+        if (why == nullptr) why = "it is NVIDIA-only for now";
+#endif
+        if (why != nullptr) {
+            std::fprintf(stderr, "strata generate: --vram-elastic is off: %s\n", why);
+            o.vram_elastic = false;
+        } else {
+            xcache.set_segment_bytes(o.vram_segment_mib << 20);
+        }
+    }
     if (o.expert_cache > 0) {
         // keep the first `keep_bytes` of the cache (the profile's hottest experts first); false when nothing is left
         auto shrink_to = [&](int64_t keep_bytes) -> bool {
@@ -4986,7 +5013,7 @@ int main(int argc, char** argv) {
                         "expert_slots_primary=%lld expert_cache_primary_mib=%lld spec=%d "
                         "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
                         "spec_min_p=%.2f conversation_cache_mib=%lld conversation_cache_slots=%d "
-                        "conversation_cache_min_free_mib=%lld engine=" STRATA_VERSION "\n",
+                        "conversation_cache_min_free_mib=%lld vram_elastic=%d engine=" STRATA_VERSION "\n",
                         (long long) o.max_context, o.kv.c_str(),
                         (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1
                                          ? ss.qsa_states[ss.qsa_primary()].n_slots * 4 : 0),
@@ -4997,7 +5024,7 @@ int main(int argc, char** argv) {
                         (long long) ((o.mmap_experts ? src.resident_bytes() : strata::kernels::cpu::expert_layout().total) >> 20),
                         pool.workers(), o.pcie_frac,
                         o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
-                        (long long) o.conversation_cache_min_free_mib);
+                        (long long) o.conversation_cache_min_free_mib, xcache.segmented() ? 1 : 0);
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
@@ -5044,7 +5071,132 @@ int main(int argc, char** argv) {
         bool mrope_identity = true;
         std::vector<float> img_rows;
         std::vector<const float*> row_ptr;
+        // ---- #533: VRAM <reserve_mib>, between requests, only with --vram-elastic.  It shrinks the expert cache
+        // until that much VRAM is free for other programs (a game, a CAD session), or grows it back towards its full
+        // size when more than that is free.  Never on its own: only this command (the server's POST /v1/vram) moves
+        // it.  A shrink gives back the cache's LAST segments: the experts in their slots become CPU misses, as any
+        // expert outside the cache is (no output changes beyond what a smaller cache decodes), the prompt path's
+        // loan moves down to the end of what is left (a smaller chunk when it no longer fits).  A grow maps them
+        // again and puts each slot's expert back (or, when the adaptive tier already brought that one back, the
+        // most-routed missing expert of the same layer); the adaptive tier carries on from there.
+        std::vector<std::pair<int32_t, int32_t>> vram_evicted;   // (residency index, slot) the shrinks took
+        const int64_t chunk_full = o.prefill_chunk;              // the loan's chunk with the whole cache
+        auto relend = [&]() {   // the prompt path's loan: the end of the slots left, its chunk as large as fits
+            if (pf_parts.empty() || pf_parts[0].first < 0) return;
+            PfPart& p = pf_parts[0];
+            const int64_t live = xcache.slots();
+            auto fits = [&](int64_t c) {
+                const int64_t k = part_slots(p, c);
+                return k > 0 && k + 128 <= live && !(o.prefill_auto && k * 100 > kAutoLendPct * live);
+            };
+            int64_t c = chunk_full;
+            while (c > 256 && !fits(c)) c = std::max<int64_t>(256, c / 2 / 256 * 256);
+            o.prefill_chunk = c;
+            p.first = (int32_t) std::max<int64_t>(0, live - part_slots(p, c));
+            p.first_now = -1;   // laid out again at the next loan
+        };
+        auto vram_command = [&](const std::string& cmd, std::string& e) -> bool {
+            // `VRAM` alone: the reserve the engine started with (--vram-reserve-mib)
+            char* end = nullptr;
+            const bool bare = cmd.find_first_not_of(' ', 4) == std::string::npos;
+            const long long reserve = bare ? (long long) o.vram_reserve_mib : std::strtoll(cmd.c_str() + 4, &end, 10);
+            if (!bare && (end == cmd.c_str() + 4 || reserve < 0)) { e = "expected: VRAM [reserve_mib]"; return false; }
+            if (!xcache.segmented()) {
+                e = "VRAM needs an engine started with --vram-elastic (one NVIDIA GPU, --serve)";
+                return false;
+            }
+            if (src.complement_ready()) {
+                e = "VRAM: not with the resident low-RAM mode (the cache holds experts RAM does not)";
+                return false;
+            }
+            if (peer.valid()) { e = "VRAM: not with --peer-device"; return false; }
+            for (const PfPart& p : pf_parts)
+                if (!p.lent.empty()) { e = "VRAM: a prompt's loan is still out"; return false; }
+            if (!ver.wait_commit(e)) return false;
+            apply_pending(true);                     // the adaptive tier's swaps in flight land first
+            if (cudaDeviceSynchronize() != cudaSuccess) {
+                e = std::string("VRAM: ") + cudaGetErrorString(cudaGetLastError());
+                return false;
+            }
+            const auto t0 = Clock::now();
+            size_t free_b = 0, total_b = 0;
+            cudaMemGetInfo(&free_b, &total_b);
+            const int64_t want_free = (int64_t) reserve << 20, mapped = xcache.mapped_bytes();
+            const int64_t before = xcache.slots();
+            // what stays at least: the prompt path's smallest loan (256 tokens) and the 128 slots it must leave
+            const int64_t floor_slots = std::min<int64_t>(xcache.full_slots(),
+                128 + (pf_parts.empty() || pf_parts[0].first < 0 ? 0 : part_slots(pf_parts[0], 256)));
+            std::string note;
+            if ((int64_t) free_b < want_free) {
+                const int64_t floor_b = xcache.bytes_of(floor_slots);
+                int64_t keep = mapped - (want_free - (int64_t) free_b);
+                if (keep < floor_b) {
+                    keep = floor_b;
+                    note = " (the cache keeps its smallest size: the prompt path's buffers)";
+                }
+                if (!xcache.shrink(keep, e)) return false;
+                const int64_t live = xcache.slots();
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] >= live) {
+                        vram_evicted.emplace_back((int32_t) i, host_res[i]);
+                        host_res[i] = strata::core::kNotResident;
+                    }
+                res_upload();
+            } else if (mapped < xcache.full_bytes()) {
+                std::string gerr;
+                if (!xcache.grow(mapped + ((int64_t) free_b - want_free), gerr)) note = " (" + gerr + ")";
+                const int64_t live = xcache.slots();
+                std::string ferr;
+                std::vector<std::pair<int32_t, int32_t>> keep_out;
+                for (const auto& [i, slot] : vram_evicted) {
+                    if (slot >= live) { keep_out.emplace_back(i, slot); continue; }
+                    const int64_t layer = i / g.n_expert;
+                    int64_t pick = i;
+                    if (host_res[(size_t) i] >= 0) {   // back already (the adaptive tier): the layer's most-routed miss
+                        pick = -1;
+                        float best = -1.0f;
+                        for (int64_t ex = 0; ex < g.n_expert; ++ex) {
+                            const size_t j = (size_t) (layer * g.n_expert + ex);
+                            if (host_res[j] >= 0) continue;
+                            const float u = drive.d.usage.empty() ? 0.0f : drive.d.usage[j];
+                            if (u > best) { best = u; pick = (int64_t) j; }
+                        }
+                    }
+                    if (pick < 0) continue;
+                    const uint8_t* b = srcp->blob(layer, pick % g.n_expert);
+                    if (b == nullptr || !xcache.fill_slot_queued(slot, b, ferr,
+                            (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(layer))) {
+                        e = "VRAM: refilling the cache failed: " + ferr;
+                        return false;
+                    }
+                    host_res[(size_t) pick] = slot;
+                }
+                vram_evicted.swap(keep_out);
+                if (!xcache.sync_queued(ferr)) { e = "VRAM: " + ferr; return false; }
+                res_upload();
+            }
+            relend();
+            cudaMemGetInfo(&free_b, &total_b);
+            std::fprintf(stderr, "strata serve: VRAM %lld MiB kept free: the expert cache %lld -> %lld of %lld slots "
+                                 "(%.2f of %.2f GiB), %lld MiB free now, prompt chunk %lld, in %.0f ms%s\n",
+                         reserve, (long long) before, (long long) xcache.slots(), (long long) xcache.full_slots(),
+                         (double) xcache.mapped_bytes() / 1073741824.0, (double) xcache.full_bytes() / 1073741824.0,
+                         (long long) (free_b >> 20), (long long) o.prefill_chunk,
+                         std::chrono::duration<double, std::milli>(Clock::now() - t0).count(), note.c_str());
+            std::printf("VRAM reserve_mib=%lld expert_slots=%lld expert_slots_full=%lld expert_cache_mib=%lld "
+                        "expert_cache_full_mib=%lld vram_free_mib=%lld prompt_chunk=%lld\n", reserve,
+                        (long long) xcache.slots(), (long long) xcache.full_slots(),
+                        (long long) (xcache.mapped_bytes() >> 20), (long long) (xcache.full_bytes() >> 20),
+                        (long long) (free_b >> 20), (long long) o.prefill_chunk);
+            return true;
+        };
         while (next_line(line)) {
+            if (line.rfind("VRAM", 0) == 0) {   // #533 (above): between requests, not a request
+                std::string verr;
+                if (!vram_command(line, verr)) std::printf("ERR %s\n", verr.c_str());
+                std::fflush(stdout);
+                continue;
+            }
             // #477: every --expert-profile-save-every minutes, before the next request (at QUIT: after the loop)
             if (!heat.empty() && line != "QUIT" && o.expert_profile_save_min > 0 &&
                 Clock::now() - profile_saved_at >= std::chrono::duration<double>(o.expert_profile_save_min * 60.0))
diff --git a/tests/core/expert_cache_segmented_test.cpp b/tests/core/expert_cache_segmented_test.cpp
new file mode 100644
index 00000000000..cabf24a4c45
--- /dev/null
+++ b/tests/core/expert_cache_segmented_test.cpp
@@ -0,0 +1,99 @@
+// #533: the segmented expert cache (--vram-elastic).  A shrink gives the last segments' VRAM back to the driver and
+// keeps every slot left exactly as it was (same address, same bytes); a grow maps them again at the same addresses.
+// Uniform and sized slots.  Needs a CUDA device with virtual memory management (exits 77 without one).
+#include "strata/core/expert_cache.hpp"
+
+#include <cuda_runtime.h>
+
+#include <cstdio>
+#include <string>
+#include <vector>
+
+namespace {
+int fail(const char* what, const std::string& err = "") {
+    std::fprintf(stderr, "FAIL %s %s\n", what, err.c_str());
+    return 1;
+}
+
+size_t free_vram() {
+    size_t f = 0, t = 0;
+    cudaMemGetInfo(&f, &t);
+    return f;
+}
+
+// slot i holds the byte (i * 7 + 1) everywhere
+bool fill(strata::core::ExpertCache& c, int64_t from, int64_t to, int64_t blob) {
+    std::vector<uint8_t> b((size_t) blob);
+    for (int64_t i = from; i < to; ++i) {
+        std::fill(b.begin(), b.end(), (uint8_t) (i * 7 + 1));
+        if (cudaMemcpy(c.device_slot((int32_t) i), b.data(), (size_t) blob, cudaMemcpyHostToDevice) != cudaSuccess)
+            return false;
+    }
+    return true;
+}
+
+bool check(const strata::core::ExpertCache& c, int64_t to, int64_t blob) {
+    std::vector<uint8_t> b((size_t) blob);
+    for (int64_t i = 0; i < to; ++i) {
+        if (cudaMemcpy(b.data(), c.device_slot((int32_t) i), (size_t) blob, cudaMemcpyDeviceToHost) != cudaSuccess)
+            return false;
+        for (const uint8_t x : b)
+            if (x != (uint8_t) (i * 7 + 1)) return false;
+    }
+    return true;
+}
+}  // namespace
+
+int main() {
+    int n = 0;
+    if (cudaGetDeviceCount(&n) != cudaSuccess || n == 0) {
+        std::puts("no CUDA device: skipped");
+        return 77;
+    }
+    constexpr int64_t kBlob = 1 << 20, kSlots = 96, kSeg = 8ll << 20;
+    for (int sized = 0; sized < 2; ++sized) {
+        strata::core::ExpertCache c;
+        c.set_segment_bytes(kSeg);
+        std::string err;
+        const bool ok = sized ? c.open_sized(std::vector<int64_t>(kSlots, kBlob), 4, 64, err)
+                              : c.open(kSlots, 4, 64, kBlob, err);
+        if (!ok) {
+            if (err.find("virtual memory management") != std::string::npos) {
+                std::printf("%s: skipped\n", err.c_str());
+                return 77;
+            }
+            return fail("open", err);
+        }
+        if (!c.segmented() || c.slots() != kSlots || c.mapped_bytes() < kSlots * kBlob) return fail("open sizes");
+        uint8_t* const first = c.device_slot(0);
+        if (!fill(c, 0, kSlots, kBlob)) return fail("fill");
+        const size_t before = free_vram();
+        // keep 30 MiB: rounded up to whole 8 MiB segments = 32 MiB = 32 slots
+        if (!c.shrink(30ll << 20, err)) return fail("shrink", err);
+        if (c.slots() != 32 || c.mapped_bytes() != 32ll << 20 || c.bytes() != 32ll << 20)
+            return fail("shrunk sizes");
+        if (c.full_slots() != kSlots || c.full_bytes() != kSlots * kBlob) return fail("full sizes");
+        const size_t freed = free_vram() - before;
+        if (freed + (8u << 20) < (size_t) (64ll << 20)) {   // ~64 MiB back to the driver (WDDM rounds a little)
+            std::fprintf(stderr, "freed %zu bytes\n", freed);
+            return fail("VRAM not given back");
+        }
+        if (c.device_slot(0) != first || !check(c, 32, kBlob)) return fail("slots kept after the shrink");
+        // grow to 70 MiB: whole segments only, 64 MiB = 64 slots
+        if (!c.grow(70ll << 20, err) || c.slots() != 64) return fail("grow part", err);
+        if (!c.grow(1ll << 40, err) || c.slots() != kSlots || c.mapped_bytes() < kSlots * kBlob)
+            return fail("grow all", err);
+        if (c.device_slot(0) != first || !check(c, 32, kBlob)) return fail("slots kept after the grow");
+        if (!fill(c, 32, kSlots, kBlob) || !check(c, kSlots, kBlob)) return fail("the grown slots");
+        if (c.slots_within(0) != 0 || c.slots_within(kBlob * 3 + 5) != 3 || c.bytes_of(5) != 5 * kBlob)
+            return fail("slots_within / bytes_of");
+        c.close();
+        if (c.valid() || c.slots() != 0) return fail("close");
+    }
+    // the default (no segment size): one allocation, shrink refused
+    strata::core::ExpertCache d;
+    std::string err;
+    if (!d.open(8, 2, 4, kBlob, err) || d.segmented() || d.shrink(0, err)) return fail("unsegmented", err);
+    std::puts("expert cache segments: shrink gives VRAM back and keeps the slots, grow maps them again");
+    return 0;
+}

From 2b47285559128bfecc81845e57fc11337a73fc6e Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:12:20 +0200
Subject: [PATCH 111/201] setup: recommend the hybrid worker count only with
 more E-cores than P-cores (#642)

docs/AMD_HIP.md's gfx1030 report measured an i7-13700KF (8P + 8E) at 38-42 tok/s with
all 15 workers against 36 with 8, so a CPU with no more E-cores than P-cores keeps the
engine's own count; the E-heavy chips the fork measured (i9-14900KF: 15 of 23 faster)
get the recommendation.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                   | 8 ++++++--
 tools/test_setup_hybrid.py | 3 ++-
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/setup.py b/setup.py
index c59245ee7fa..818cbb229cf 100644
--- a/setup.py
+++ b/setup.py
@@ -341,11 +341,15 @@ def cpu_cores():
 def hybrid_pool_workers(cores) -> int | None:
     """#642 (Hardin22's measurement): on a hybrid CPU the expert pool runs best on the P-cores but the host loop's one
     plus HALF of the E-cores - an E-core runs the expert kernels ~2.2x slower and each layer waits for its slowest
-    part (i9-14900KF, 8P + 16E: 15 workers decoded 165 / 116 tok/s against 106 / 84 with all 23).  None: not hybrid
-    (the engine's own default, one worker per physical core but the host's, stays)."""
+    part (i9-14900KF, 8P + 16E: 15 workers decoded 165 / 116 tok/s against 106 / 84 with all 23).  Only on a CPU with
+    more E-cores than P-cores: on an i7-13700KF (8P + 8E, docs/AMD_HIP.md's gfx1030 report) all 15 workers decoded
+    38-42 tok/s against 36 with 8, so there the engine's own count stays.  None: the engine's own default (one worker
+    per physical core but the host's) stays."""
     if not cores:
         return None
     p, e = cores
+    if e <= p:
+        return None
     return max(1, p - 1 + e // 2)
 
 
diff --git a/tools/test_setup_hybrid.py b/tools/test_setup_hybrid.py
index b07d2e3c2ad..a5b9a164fbd 100644
--- a/tools/test_setup_hybrid.py
+++ b/tools/test_setup_hybrid.py
@@ -23,7 +23,8 @@ def test_rule(self):
         self.assertEqual(setup.hybrid_pool_workers((8, 16)), 15)   # i9-14900K: the fork's measured 15
         self.assertEqual(setup.hybrid_pool_workers((6, 8)), 9)     # i5-13600K
         self.assertEqual(setup.hybrid_pool_workers((4, 8)), 7)     # Ryzen AI 9 HX 370 (Zen 5 + Zen 5c)
-        self.assertEqual(setup.hybrid_pool_workers((1, 1)), 1)
+        self.assertIsNone(setup.hybrid_pool_workers((8, 8)))       # i7-13700K: all cores measured faster (AMD_HIP.md)
+        self.assertIsNone(setup.hybrid_pool_workers((8, 4)))
 
     def test_recommend_keeps_a_given_count(self):
         with mock.patch.object(setup, "cpu_cores", lambda: (8, 16)), mock.patch.object(setup, "ok", lambda *a: None):

From d5469a95444724c9df1e1343207e302d5bef3803 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:12:20 +0200
Subject: [PATCH 112/201] verify: opt-in handshake trace for the gfx1030
 timeouts, HIP A/B switches (#649)

STRATA_VERIFY_TRACE=1 records each verify window's handshake on the host (window
start, launch, each layer's ring and service, the final sync, a timeout, the release
and how long the GPU took to drain after it) with the seq / flag / A / B words, and
GPU breadcrumbs: the profiler's stage stamps per layer and token group, written to
mapped memory so they read while the GPU hangs. A timeout prints them before and
after the release; the serve watchdog's stall report (Verifier::diag) prints them too.

HIP only, opt-in, for the reporter's A/B: STRATA_VERIFY_COHERENT=1 allocates the
handshake words and rows with hipHostMallocCoherent; STRATA_DOORBELL_STORE=1 has the
GPU store each step's ring (known at capture) instead of read-modify-writing it over
PCIe. CUDA builds and the default path are unchanged (Q2_0 on the 5070: the same 96
tokens with and without the trace as 0.1.38; a forced stall dumps the breadcrumbs up
to the withheld flag).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/core/verify.hpp         |   9 ++
 include/strata/kernels/elementwise.hpp |   4 +
 src/core/verify.cpp                    | 149 ++++++++++++++++++++++++-
 src/kernels/cuda/elementwise.cu        |  24 ++++
 4 files changed, 184 insertions(+), 2 deletions(-)

diff --git a/include/strata/core/verify.hpp b/include/strata/core/verify.hpp
index b80d10bd264..f146046d62e 100644
--- a/include/strata/core/verify.hpp
+++ b/include/strata/core/verify.hpp
@@ -60,6 +60,9 @@ class Verifier {
 
     /// The watchdog's view of the window in flight (issue #31): the layer, the GPU's sequence, the flags.
     void diag(std::FILE* f) const;
+    /// #649 (STRATA_VERIFY_TRACE=1, opt-in): the last windows' host-side handshake events and the GPU's breadcrumbs
+    /// (in mapped memory, so they read while the GPU hangs).  Nothing when the trace is off.
+    void trace_dump(std::FILE* f) const;
 
     /// #267: raise every flag the window's spin kernels wait on past any ring (UINT32_MAX), so a window the GPU
     /// cannot finish drains instead of staying resident, then wait up to `timeout_ms` for its streams.  For the
@@ -184,6 +187,12 @@ class Verifier {
     bool ple_stage() const { return lb_ <= 1 && 1 < le_; }   ///< holds layer 1, where the PLE block runs
     bool capture_commit(std::string& err);
     bool record_window(int T, cudaStream_t cs, std::string& err);
+    // #649: STRATA_VERIFY_TRACE=1 - a host event ring (trace_ev) and GPU breadcrumbs: the profiler's stamp points,
+    // per layer and token group, written to mapped memory (null when the trace is off)
+    void trace_ev(const char* what, int64_t step, int64_t layer, int64_t aux) const;
+    unsigned long long* trace_h_ = nullptr;
+    unsigned long long* trace_m_ = nullptr;
+    size_t trace_n_ = 0;
     static constexpr int kProfPer = 33;              // stamps per layer (32 left the hc-read second
                                       // half's up-stamp at slot 32 = the next layer's slot 0: D8)
     bool prof_on_ = false;
diff --git a/include/strata/kernels/elementwise.hpp b/include/strata/kernels/elementwise.hpp
index 02501beb6c4..543d75dc2c7 100644
--- a/include/strata/kernels/elementwise.hpp
+++ b/include/strata/kernels/elementwise.hpp
@@ -114,6 +114,10 @@ void copy_rows_from_mapped(float* dst, const float* src, int64_t rows, int64_t w
 /// device-to-host memcpy nodes (copy-engine operations in the middle of the layer chain) and the ring kernel.
 void doorbell_publish(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k, float* x_out,
                       int32_t* ids_out, float* weights_out, uint32_t* d_seq, void* stream);
+/// #649 (HIP, STRATA_DOORBELL_STORE=1): the ring stored as `value` instead of incremented over PCIe.
+void doorbell_publish_value(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k,
+                            float* x_out, int32_t* ids_out, float* weights_out, uint32_t* d_seq, uint32_t value,
+                            void* stream);
 
 /// Plan v0.3 P3: copy `n` int32 from mapped pinned host memory into device memory with a kernel (the QSA
 /// per-token step and positions), instead of a host-to-device memcpy node in the middle of a layer.
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index f956d73158f..8a8b69bcac2 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -69,7 +69,29 @@ struct Bump {
     }
 };
 
+// #649 (HIP, opt-in A/Bs for the gfx1030 verify timeouts; CUDA never reads them)
+//   STRATA_VERIFY_COHERENT=1  the handshake words and rows in explicitly coherent (fine-grained) host memory
+//   STRATA_DOORBELL_STORE=1   the GPU stores each step's ring instead of read-modify-writing it over PCIe
+bool env_on(const char* name) {
+    const char* e = std::getenv(name);
+    return e != nullptr && e[0] != 0 && e[0] != '0';
+}
+#if defined(STRATA_USE_HIP)
+const bool g_coherent = env_on("STRATA_VERIFY_COHERENT");
+const bool g_doorbell_store = env_on("STRATA_DOORBELL_STORE");
+#endif
+const bool g_trace = env_on("STRATA_VERIFY_TRACE");
+
 bool mapped(size_t bytes, void** h, void** d) {
+#if defined(STRATA_USE_HIP)
+    if (g_coherent) {
+        if (hipHostMalloc(h, bytes, hipHostMallocMapped | hipHostMallocCoherent |
+                                        (peer_portable() ? hipHostMallocPortable : 0)) != hipSuccess)
+            return false;
+        std::memset(*h, 0, bytes);
+        return cudaHostGetDevicePointer(d, *h, 0) == cudaSuccess;
+    }
+#endif
     if (cudaHostAlloc(h, bytes, cudaHostAllocMapped | (peer_portable() ? cudaHostAllocPortable : 0)) != cudaSuccess) return false;   // multi-GPU: portable only with a peer - the peer card writes its rows into them
     std::memset(*h, 0, bytes);
     return cudaHostGetDevicePointer(d, *h, 0) == cudaSuccess;
@@ -122,6 +144,20 @@ void release_live_verifiers(std::FILE* f) {
         }
     if (f != nullptr) std::fflush(f);
 }
+// #649: the host side of STRATA_VERIFY_TRACE - a ring of the last kTraceN handshake events of every verifier
+struct TraceEv {
+    int64_t t_ns;
+    const void* who;
+    int64_t window, step, layer, aux;
+    uint32_t seq, flag, a, b;
+    const char* what;
+};
+constexpr uint64_t kTraceN = 4096;
+TraceEv g_trace_ring[kTraceN];
+std::atomic<uint64_t> g_trace_next{0};
+int64_t trace_now_ns() {
+    return std::chrono::duration_cast<std::chrono::nanoseconds>(Clock::now().time_since_epoch()).count();
+}
 std::string released_note(bool drained) {
     return drained ? "; its GPU waits were released and the GPU finished (#267)"
                    : "; its GPU waits were released but the GPU did not finish within 5 s (#267)";
@@ -136,6 +172,7 @@ const int64_t g_test_stall = [] {
 
 bool Verifier::release_gpu_waits(int timeout_ms) {
     released_.store(true);
+    trace_ev("RELEASE", -1, -1, timeout_ms);
     // the words the spin kernels read (wait_flag_ge, wait_flag_ge_or) are mapped host memory, so a store here
     // reaches them with no API call; UINT32_MAX is past every ring.  (E-6's skip words are device memory, but
     // wait_flag_ge_or also returns on its flag.)  A host function raising flag B later only raises.
@@ -148,13 +185,76 @@ bool Verifier::release_gpu_waits(int timeout_ms) {
     for (cudaStream_t s : {cs_, copy_}) {
         if (s == nullptr) continue;
         while (cudaStreamQuery(s) == cudaErrorNotReady) {
-            if (ms_since(t0) > timeout_ms) return false;
+            if (ms_since(t0) > timeout_ms) {
+                trace_ev("RELEASE-NOT-DRAINED", -1, -1, (int64_t) ms_since(t0));
+                return false;
+            }
             std::this_thread::sleep_for(std::chrono::milliseconds(1));
         }
     }
+    trace_ev("RELEASE-DRAINED", -1, -1, (int64_t) ms_since(t0));   // aux: ms the GPU took to finish once released
     return true;
 }
 
+void Verifier::trace_ev(const char* what, int64_t step, int64_t layer, int64_t aux) const {
+    if (!g_trace) return;
+    auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
+    TraceEv& e = g_trace_ring[g_trace_next.fetch_add(1) % kTraceN];
+    e = {trace_now_ns(), this, windows, step, layer, aux, rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_), what};
+}
+
+void Verifier::trace_dump(std::FILE* f) const {
+    if (!g_trace || f == nullptr) return;
+    static const char* names[kProfPer] = {"pre", "hc-read0", "qkv gemv", "conv", "ab", "z", "rec", "kv-idx",
+                                          "k/v rope", "kv append", "q", "scores+topk", "kv-resolve", "attention",
+                                          "gate", "", "out-proj", "router+ring", "shared", "waitA", "VRAM hits", "waitB",
+                                          "PCIe grp", "waitCPU", "combine", "", "head", "", "", "", "", "", ""};
+    const uint64_t end = g_trace_next.load();
+    const uint64_t n = end < 160 ? end : 160;
+    std::fprintf(f, "strata verify trace (#649): the last %llu handshake events (host clock, us before the last; "
+                    "words: seq = GPU rang, flag = CPU served, A = plan, B = copies)\n", (unsigned long long) n);
+    const int64_t t_last = n ? g_trace_ring[(end - 1) % kTraceN].t_ns : 0;
+    for (uint64_t i = end - n; i < end; ++i) {
+        const TraceEv& e = g_trace_ring[i % kTraceN];
+        if (e.what == nullptr) continue;
+        std::fprintf(f, "  %10.1f %-20s v%p window %lld step %lld layer %lld aux %lld | seq %u flag %u A %u B %u\n",
+                     (double) (t_last - e.t_ns) / 1000.0, e.what, e.who, (long long) e.window, (long long) e.step,
+                     (long long) e.layer, (long long) e.aux, e.seq, e.flag, e.a, e.b);
+    }
+    if (trace_h_ == nullptr || g_ == nullptr) return;
+    // the breadcrumbs: every stamp point the GPU passed in this window (ns of the GPU clock after the window's first)
+    unsigned long long t0 = ~0ull;
+    for (size_t i = 0; i < trace_n_; ++i) {
+        const unsigned long long t = *(const volatile unsigned long long*) (trace_h_ + i);
+        if (t != 0 && t < t0) t0 = t;
+    }
+    if (t0 == ~0ull) {
+        std::fprintf(f, "strata verify trace: no GPU breadcrumb in this window (the GPU never started it)\n");
+        return;
+    }
+    int64_t last_l = -1;
+    for (int64_t l = 0; l <= g_->n_layers; ++l)
+        for (int i = 0; i < kProfPer; ++i)
+            for (int grp = 0; grp < 2; ++grp)
+                if (trace_h_[(size_t) ((l * kProfPer + i) * 2 + grp)] != 0) last_l = l;
+    std::fprintf(f, "strata verify trace: GPU breadcrumbs (us after the window's first), the GPU got as far as layer "
+                    "%lld:\n", (long long) last_l);
+    for (int64_t l = std::max<int64_t>(0, last_l - 2); l <= std::min<int64_t>(g_->n_layers, last_l + 1); ++l)
+        for (int grp = 0; grp < 2; ++grp) {
+            std::string line;
+            char b[64];
+            for (int i = 0; i < kProfPer; ++i) {
+                const unsigned long long t = trace_h_[(size_t) ((l * kProfPer + i) * 2 + grp)];
+                if (t == 0) continue;
+                std::snprintf(b, sizeof b, " %s(%d)=%.1f", names[i], i, (double) (t - t0) / 1000.0);
+                line += b;
+            }
+            if (!line.empty())
+                std::fprintf(f, "  layer %lld group %d:%s\n", (long long) l, grp, line.c_str());
+        }
+    std::fflush(f);
+}
+
 void Verifier::diag(std::FILE* f) const {
     auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
     // #251: outside a verify stage these are the LAST window's numbers (it finished), not the stalled work's
@@ -163,6 +263,7 @@ void Verifier::diag(std::FILE* f) const {
     std::fprintf(f, "  verify window%s: %d tokens at position %lld, host at layer step %u; the GPU rang %u; flags: "
                     "served %u, plan (A) %u, copies (B) %u\n", current ? "" : " (last window, not the current stage)",
                  last_t_, (long long) last_pos0_, cur_layer_ + 1, rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
+    trace_dump(f);   // #649: STRATA_VERIFY_TRACE=1 only
 }
 
 Verifier::~Verifier() {
@@ -331,6 +432,23 @@ bool Verifier::init(const WeightTable& wt, const ModelGeometry& g, SessionState&
         return false;
     }
     cudaMemset(arena_, 0, count.used);
+    if (g_trace && trace_h_ == nullptr) {   // #649: the breadcrumbs, mapped so they read while the GPU hangs
+        trace_n_ = (size_t) (g.n_layers + 1) * kProfPer * 2;
+        if (!mapped(trace_n_ * 8, (void**) &trace_h_, (void**) &trace_m_)) {
+            (void) cudaGetLastError();
+            trace_h_ = trace_m_ = nullptr;
+            trace_n_ = 0;
+        }
+#if defined(STRATA_USE_HIP)
+        std::fprintf(stderr, "strata verify trace (#649): on; coherent words %s, doorbell %s, HIP_HOST_COHERENT=%s "
+                             "HSA_ENABLE_SDMA=%s GPU_MAX_HW_QUEUES=%s\n", g_coherent ? "explicit" : "default",
+                     g_doorbell_store ? "stored" : "incremented", std::getenv("HIP_HOST_COHERENT") ? std::getenv("HIP_HOST_COHERENT") : "-",
+                     std::getenv("HSA_ENABLE_SDMA") ? std::getenv("HSA_ENABLE_SDMA") : "-",
+                     std::getenv("GPU_MAX_HW_QUEUES") ? std::getenv("GPU_MAX_HW_QUEUES") : "-");
+#else
+        std::fprintf(stderr, "strata verify trace (#649): on\n");
+#endif
+    }
     prof_on_ = std::getenv("STRATA_VERIFY_PROFILE") != nullptr;
     if (prof_on_) {
         const size_t np = (size_t) g.n_layers * kProfPer + 4;
@@ -405,7 +523,10 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     auto Rt = [&](int t) { return R_ + (size_t) t * HC * N; };
     const int G = (split_ && T >= 2) ? 2 : 1;
     static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
-    auto stamp = [&](int64_t l, int i, int grp) { if (prof_on_ && grp == 0) gpu_stamp(prof_, (int) (l * kProfPer + i), cs); };
+    auto stamp = [&](int64_t l, int i, int grp) {
+        if (prof_on_ && grp == 0) gpu_stamp(prof_, (int) (l * kProfPer + i), cs);
+        if (trace_m_ != nullptr) gpu_stamp(trace_m_, (int) ((l * kProfPer + i) * 2 + grp), cs);   // #649
+    };
     const int tb_[2] = {0, (T + 1) / 2}, te_[2] = {G == 2 ? (T + 1) / 2 : T, T};
     groups_[T] = G;
 
@@ -691,6 +812,12 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                           hits_.cache_base, slot_off_d_, (long long) hits_.blob,
                           plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, skip_ + grp,
                           (uint32_t) ((l - lb_) * G + grp + 1), cs);
+#if defined(STRATA_USE_HIP)
+        if (g_doorbell_store)   // #649 A/B: the step's ring stored, not incremented over PCIe
+            doorbell_publish_value(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
+                                   m_ids_ + tb * K, m_w_ + tb * K, m_seq_, (uint32_t) ((l - lb_) * G + grp + 1), cs);
+        else
+#endif
         doorbell_publish(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
                          m_ids_ + tb * K, m_w_ + tb * K, m_seq_, cs);
         stamp(l, 17, grp);
@@ -1055,13 +1182,16 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     *(volatile uint32_t*) h_flag_ = 0;
     *(volatile uint32_t*) h_flagA_ = 0;
     *(volatile uint32_t*) h_flagB_ = 0;
+    if (trace_h_ != nullptr) std::memset(trace_h_, 0, trace_n_ * 8);   // #649: this window's breadcrumbs only
     std::atomic_thread_fence(std::memory_order_seq_cst);
+    trace_ev("WINDOW", -1, -1, pos0 * 16 + T);
     last_t_ = T;
     last_pos0_ = pos0;
     for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
     ms_host += ms_since(t0);
     VDBG("staged; launching\n");
     const cudaError_t le = cudaGraphLaunch(exec_[T], cs_);
+    trace_ev("LAUNCHED", -1, -1, (int64_t) le);
     if (le != cudaSuccess) { err = std::string("verify: launch: ") + cudaGetErrorString(le); return false; }
     (void) cudaStreamQuery(cs_);
     VDBG("launched\n");
@@ -1087,6 +1217,8 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
                 last_flush = now;
                 const cudaError_t q = cudaStreamQuery(cs_);
                 if (q != cudaErrorNotReady && *seq < want) {
+                    trace_ev("NEVER-RANG", k, l, (int64_t) q);
+                    trace_dump(stderr);
                     err = "verify: layer " + std::to_string(l) + " never rang (" +
                           (q == cudaSuccess ? std::string("graph finished") : std::string(cudaGetErrorString(q))) + ")";
                     return false;
@@ -1094,11 +1226,20 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
             }
             if (now - a > std::chrono::seconds(20)) {
                 // #267: the caller ends the engine; no spin kernel may outlive it
+                trace_ev("TIMEOUT", k, l, (int64_t) cudaStreamQuery(cs_));
+                if (g_trace) {
+                    diag(stderr);   // the words and the breadcrumbs before the release ...
+                    const bool drained = release_gpu_waits(5000);
+                    trace_dump(stderr);   // ... and after it: did the GPU move once its waits were raised?
+                    err = "verify: timed out at layer " + std::to_string(l) + released_note(drained);
+                    return false;
+                }
                 err = "verify: timed out at layer " + std::to_string(l) + released_note(release_gpu_waits(5000));
                 return false;
             }
         }
         const Clock::time_point b = Clock::now();
+        if (g_trace) trace_ev("RANG", k, l, (int64_t) std::chrono::duration_cast<std::chrono::microseconds>(b - a).count());
         VDBG("layer %lld rang\n", (long long) l);
         cur_layer_ = want - 1;
         set_plan_slot(grp);
@@ -1108,6 +1249,8 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
             pool(user, h_x_ + (size_t) tb * g.n_embd, h_ids_ + (size_t) tb * ss.k, n, ss.k,
                  h_ymiss_ + (size_t) tb * ss.k * g.n_embd, l);
         VDBG("layer %lld served\n", (long long) l);
+        if (g_trace) trace_ev(*(volatile uint32_t*) h_flagA_ == want ? "SERVED" : "SERVED-NO-PLAN-YET", k, l,
+                              (int64_t) ms_since(b));   // aux: ms the CPU experts took
         progress_tick();
         std::atomic_thread_fence(std::memory_order_seq_cst);
         _mm_sfence();
@@ -1131,7 +1274,9 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     // spin kernel outlives the process - the case that left Windows GPUs "lost" until a power cycle.  The wait
     // itself stays a blocking sync: a cudaStreamQuery poll here cost IQ3_S ~3% decode (a core calling the driver
     // beside the expert workers).
+    trace_ev("SYNC", -1, -1, 0);
     const cudaError_t se = cudaStreamSynchronize(cs_);
+    trace_ev("SYNCED", -1, -1, (int64_t) se);
     if (se != cudaSuccess) { err = std::string("verify: ") + cudaGetErrorString(se); return false; }
     progress_at("verify window: waiting for the expert copies", (int64_t) T);
     cudaStreamSynchronize(copy_);   // no host function of this window may raise flag B in the next one
diff --git a/src/kernels/cuda/elementwise.cu b/src/kernels/cuda/elementwise.cu
index 26cf66faab5..4d670e997f1 100644
--- a/src/kernels/cuda/elementwise.cu
+++ b/src/kernels/cuda/elementwise.cu
@@ -303,6 +303,30 @@ __global__ void doorbell_publish_kernel(const float* __restrict__ x, const int32
     }
 }
 
+// #649 (HIP, STRATA_DOORBELL_STORE=1): the same publish, but the ring is STORED (the step's own number, known at
+// capture) instead of read-modify-written over PCIe - one store, no read of host memory from the GPU.
+__global__ void doorbell_publish_value_kernel(const float* __restrict__ x, const int32_t* __restrict__ ids,
+                                              const float* __restrict__ w, int n, int k, float* x_out, int32_t* ids_out,
+                                              float* w_out, uint32_t* seq, uint32_t value) {
+    for (int i = threadIdx.x; i < n; i += blockDim.x) x_out[i] = x[i];
+    if ((int) threadIdx.x < k) { ids_out[threadIdx.x] = ids[threadIdx.x]; w_out[threadIdx.x] = w[threadIdx.x]; }
+    __threadfence_system();
+    __syncthreads();
+    if (threadIdx.x == 0) {
+        __threadfence_system();
+        *(volatile uint32_t*) seq = value;
+        __threadfence_system();
+    }
+}
+
+void doorbell_publish_value(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k,
+                            float* x_out, int32_t* ids_out, float* weights_out, uint32_t* d_seq, uint32_t value,
+                            void* stream) {
+    if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }
+    doorbell_publish_value_kernel<<<1, 1024, 0, (cudaStream_t) stream>>>(x, ids, weights, (int) n, (int) k, x_out,
+                                                                          ids_out, weights_out, d_seq, value);
+}
+
 void doorbell_publish(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k, float* x_out,
                       int32_t* ids_out, float* weights_out, uint32_t* d_seq, void* stream) {
     if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }

From 645a57969724a3468f9caed98f11d41c51b5bd26 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:12:21 +0200
Subject: [PATCH 113/201] prefill: step diagnosis and a HIP host-DMA switch for
 the gfx1201 prompt stalls (#579 #613 #541)

- The per-layer wait for the router ids names itself in a stall report ("waiting for
  the GPU (attention, router) at layer"): a GPU stall reads apart from a host one.
- STRATA_PF_STEP_SYNC=1 (opt-in): the compute and copy streams are waited for after the
  K/V staging, the K/V append and each layer; a step over 250 ms is logged with its
  layer and chunk, and a stall names the step.
- STRATA_KV_HOST_DMA=1 (HIP only, opt-in): with KV streaming the prompt path's append
  writes the staging pool and the resident slots only, and one DMA copies the chunk's
  blocks to the host copy - no kernel writes host memory over PCIe. Same bytes for
  every reader (the staged first block is complete; past the chunk nothing is read
  before a later append writes it).

Q2_0 on the 5070: the same tokens with STRATA_PF_STEP_SYNC=1 as without (and as 0.1.38).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/kernels/kv_stream.hpp |  6 ++++
 src/kernels/cuda/kv_stream.cu        | 10 +++++++
 src/prefill/prefill.cpp              | 42 ++++++++++++++++++++++++++--
 3 files changed, 56 insertions(+), 2 deletions(-)

diff --git a/include/strata/kernels/kv_stream.hpp b/include/strata/kernels/kv_stream.hpp
index b3ebee34d93..514474b1137 100644
--- a/include/strata/kernels/kv_stream.hpp
+++ b/include/strata/kernels/kv_stream.hpp
@@ -85,6 +85,12 @@ void kv_ring_restore(const QsaAttnPools& slots, const KvHostPools& host, int fmt
 void kv_stage_from_host(const QsaAttnPools& stage, const KvHostPools& host, int fmt, int64_t n_blocks,
                         const QsaShapes& s, void* stream);
 
+/// #579 #613 (HIP A/B, STRATA_KV_HOST_DMA=1): the reverse of kv_stage_from_host for blocks [b0, b1) - the staging
+/// pool's blocks into the host copy, by DMA, so the prompt path's append need not write host memory from a kernel.
+/// Not capturable.
+void kv_unstage_to_host(const QsaAttnPools& stage, const KvHostPools& host, int fmt, int64_t b0, int64_t b1,
+                        const QsaShapes& s, void* stream);
+
 struct KvStreamCounters {
     uint64_t misses = 0, lookups = 0, calls = 0;
     bool overflow = false;
diff --git a/src/kernels/cuda/kv_stream.cu b/src/kernels/cuda/kv_stream.cu
index ec01ff22949..914a836ef1a 100644
--- a/src/kernels/cuda/kv_stream.cu
+++ b/src/kernels/cuda/kv_stream.cu
@@ -251,6 +251,16 @@ void kv_stage_from_host(const QsaAttnPools& stage, const KvHostPools& host, int
             check("stage");
 }
 
+void kv_unstage_to_host(const QsaAttnPools& stage, const KvHostPools& host, int fmt, int64_t b0, int64_t b1,
+                        const QsaShapes& s, void* stream) {
+    if (b1 <= b0) return;
+    const Runs r = runs_of(stage, host, fmt, s);   // src: the host copy, dst: the staging pool (identity layout both)
+    for (int a = 0; a < r.n; ++a)
+        if (cudaMemcpyAsync((void*) (r.src[a] + b0 * r.len[a]), r.dst[a] + b0 * r.len[a], (size_t) ((b1 - b0) * r.len[a]),
+                            cudaMemcpyDefault, (cudaStream_t) stream) != cudaSuccess)
+            check("unstage");
+}
+
 KvStreamCounters kv_stream_counters(const KvStreamMap& m) {
     int32_t c[kKvCtlInts] = {};
     KvStreamCounters r;
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 5d46e4bfb9f..37d8f83c11e 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -1642,8 +1642,23 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
         }
         host_setup_ms += ms_since(tsetup);
         bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
+        // #579 #613 (opt-in diagnosis, STRATA_PF_STEP_SYNC=1): the compute and copy streams are waited for after each
+        // step named below, a step that took over 250 ms is logged, and a stall's report names the step it is in.
+        // Slower (a sync per step); the bytes are the same.
+        static const bool step_sync = [] { const char* e = std::getenv("STRATA_PF_STEP_SYNC"); return e && e[0] == '1'; }();
+        auto pf_step = [&](const char* what, int64_t layer) {
+            if (!step_sync) return;
+            core::progress_at(what, layer, p0);
+            const auto ts = Clock::now();
+            const cudaError_t a = cudaStreamSynchronize(m.cs), b = cudaStreamSynchronize(m.copy);
+            const double ms = ms_since(ts);
+            if (ms > 250.0 || a != cudaSuccess || b != cudaSuccess)
+                std::fprintf(stderr, "strata pf-step: chunk from token %lld, layer %lld: %s took %.0f ms (%s / %s)\n",
+                             (long long) p0, (long long) layer, what, ms, cudaGetErrorString(a), cudaGetErrorString(b));
+        };
         for (int64_t l = LB; l < LE; ++l) {
             core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
+            if (l > LB) pf_step("reading the prompt (batched, step sync): the experts and the rest of layer", l - 1);
             core::progress_at("reading the prompt (batched): layer", l, p0);   // #251: a stall names layer and chunk
             const core::LayerView v(*m.wt, l);
             if (l == std::max<int64_t>(LB, 1) && !ple_land()) return false;   // the PLE rows, read from layer 1 on
@@ -1773,7 +1788,20 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                                                             core::qsa_kv_format(st),
                                                             (p0 + s.page_size - 1) / s.page_size, s, m.cs);
                         pt.mark(kPfQsa, cs);
+                        pf_step("reading the prompt (batched, step sync): the K/V staged from RAM at layer", l);
                     }
+                    // #579 #613 (HIP, opt-in A/B, STRATA_KV_HOST_DMA=1): the append writes the staging pool and the
+                    // resident slots only, and one DMA copies the chunk's blocks from the staging pool to the host copy
+                    // - no kernel writes host memory over PCIe.  The bytes every reader sees are the same (the staged
+                    // first block is complete; past the chunk's last cell nothing is read until a later append writes
+                    // it).  CUDA: never.
+#if defined(STRATA_USE_HIP)
+                    static const bool kv_host_dma = [] { const char* e = std::getenv("STRATA_KV_HOST_DMA"); return e && e[0] == '1'; }();
+#else
+                    constexpr bool kv_host_dma = false;
+#endif
+                    const bool host_by_dma = staged && kv_host_dma;
+                    const strata::kernels::KvHostPools* host_w = host_by_dma ? nullptr : &st.host;
                     if (st.kv_hybrid) {   // K8V4: K INT8 unrotated, V rotated Q4_0 (only V and the output rotate)
                         strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
                         kv_append(m.Kc, m.Kc, T, p0, st.page_table, s.page_size, nullptr, nullptr,
@@ -1788,12 +1816,17 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         }
                         if (st.kv_q4)
                             strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
-                                                          &st.host, staged ? &m.stage : nullptr);
+                                                          host_w, staged ? &m.stage : nullptr);
                         else
                             kv_append(m.Kc, m.Vc, T, p0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
                                       st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs,
-                                      &st.host, staged ? &m.stage : nullptr);
+                                      host_w, staged ? &m.stage : nullptr);
+                        if (host_by_dma)
+                            strata::kernels::kv_unstage_to_host(pools_of(m.stage, m.ident_table), st.host,
+                                                                core::qsa_kv_format(st), p0 / s.page_size,
+                                                                (p0 + T + s.page_size - 1) / s.page_size, s, m.cs);
                     }
+                    if (staged) pf_step("reading the prompt (batched, step sync): the K/V append at layer", l);
                     split_q(m.Qf, m.q, T, m.cs);
                     rms_rows(m.q, (const float*) wqn->data, T * 24, 256, 256, EPS, m.cs);
                     rope(m.q, T, 24, 256, 6144, p0, strata::kernels::rope_scaling(), m.cs);
@@ -2049,7 +2082,12 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
                         int32_t* src_h = grp_mapped ? m.grp_host + 2 * m.grp_tk : m.src_host.data();
                         if (grp_mapped) copy_i32(m.grp_dev, m.ids, T * K, m.cs);
                         else cudaMemcpyAsync(m.ids_host.data(), m.ids, (size_t) T * K * 4, cudaMemcpyDeviceToHost, m.cs);
+                        // #579: a stall here is the GPU (this layer's attention and router, or the previous layer's
+                        // work), not the host: the watchdog's report says so (only its text changes)
+                        core::progress_at("reading the prompt (batched): waiting for the GPU (attention, router) at layer",
+                                          l, p0);
                         cudaStreamSynchronize(m.cs);
+                        core::progress_at("reading the prompt (batched): layer", l, p0);
                         pt.fold();
                         if (pe.on) {   // the peer's marks so far are done: the primary waited for its last rows
                             int pd = 0; cudaGetDevice(&pd); cudaSetDevice(pe.dev); cudaStreamSynchronize(m.pp->s); pe.fold(); cudaSetDevice(pd);

From 1807086a274015c34443b9dae7392e2a7ef4abee Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:29:26 +0200
Subject: [PATCH 114/201] tools: conversation_restore_speed.py, decode after a
 conversation-cache restore vs live (#528)

Two private engines, the same conversation: the baseline keeps it live, the candidate
parks it (an unrelated request in between, a re-rendering client, or two long
conversations taking turns) and restores it. Each turn's greedy tokens must match and
its decode speed must be within --tolerance (15%) of the live turn's. Pure logic
tested without a GPU (tools/test_conversation_restore_speed.py).

#528 did not reproduce on the RTX 5070 with it: Q2_0 37K tokens (--kv-resident 16384)
and IQ3_XXS 50-75K tokens (--kv-resident 32768) decoded at the live turns' speed after
a restore, with the same tokens.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 tools/conversation_restore_speed.py      | 182 +++++++++++++++++++++++
 tools/test_conversation_restore_speed.py |  34 +++++
 2 files changed, 216 insertions(+)
 create mode 100644 tools/conversation_restore_speed.py
 create mode 100644 tools/test_conversation_restore_speed.py

diff --git a/tools/conversation_restore_speed.py b/tools/conversation_restore_speed.py
new file mode 100644
index 00000000000..980c4b7ee3c
--- /dev/null
+++ b/tools/conversation_restore_speed.py
@@ -0,0 +1,182 @@
+"""#528: decode speed after a conversation-cache restore, against the same turns kept live.
+
+Two private engines run one after the other (never an existing server):
+  baseline   --conversation-cache-mib 0: conversation A, turn after turn, continues live
+  candidate  --conversation-cache-mib N: between A's turns an unrelated conversation B parks A, so every later
+             turn of A is restored from its parked snapshot
+Each A turn's greedy output must be the same token for token in both, and its decode speed should be too (a
+restored conversation decodes like a live one). --mode same: one conversation whose client re-renders each reply
+(no parking needed); --mode pair: two long conversations take turns (a snapshot restored every turn). On a PC with
+little RAM the cache's physical-RAM floor may refuse to park (the log says "skip parking"): that turn reads its
+prompt again and is reported as not restored. Dry-run by default; --run needs the GPU (and its lock).
+
+Measured on the RTX 5070 (0.1.38, #528): Q2_0 37K tokens --kv-resident 16384, IQ3_XXS 50-75K tokens
+--kv-resident 32768 (switch, same and pair modes): restored turns decode at the live turns' speed, same tokens.
+
+  python tools/conversation_restore_speed.py --config cfg.json --engine build-release/strata.exe \
+      --output out-dir --tokens 40000 --set=--max-context=65536 --set=--kv-resident=16384 --run
+"""
+import argparse
+import json
+from pathlib import Path
+import sys
+import threading
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path[:0] = [str(ROOT), str(ROOT / 'tools')]
+
+
+def override(args, pairs):
+    """cfg args with each `--flag value` of pairs replacing the config's own (or appended)."""
+    out = list(args)
+    for flag, value in pairs:
+        if flag in out:
+            i = out.index(flag)
+            if value is None:
+                del out[i:i + 2]
+            else:
+                out[i + 1] = value
+        elif value is not None:
+            out += [flag, value]
+    return out
+
+
+def parse_sets(items):
+    pairs = []
+    for item in items or []:
+        flag, _, value = item.partition('=')
+        pairs.append((flag, value if value != '' else None))
+    return pairs
+
+
+def summarize(records):
+    rows = []
+    for r in records:
+        tok_s = r['generated'] / (r['decode_ms'] / 1000) if r.get('decode_ms') else 0.0
+        acc = f"{r.get('drafts_accepted', 0)}/{r.get('drafts_offered', 0)}"
+        rows.append(f"  {r['name']:<8} reused={r.get('reused', 0):>6} gen={r['generated']:>4} "
+                    f"decode={tok_s:6.1f} tok/s drafts={acc:<9} hits={r.get('hits', 0)}/{r.get('lookups', 0)}")
+    return '\n'.join(rows)
+
+
+def compare(results, tolerance):
+    """The A turns: identical ids, restored (reused > 0) in the candidate, and decode within `tolerance`."""
+    base = {r['name']: r for r in results['baseline']}
+    problems = []
+    for r in results['candidate']:
+        if not r['name'].startswith('A'):
+            continue
+        b = base.get(r['name'])
+        if b is None:
+            problems.append(f"{r['name']}: no baseline turn")
+            continue
+        if r['ids'] != b['ids']:
+            problems.append(f"{r['name']}: output differs from the live baseline")
+        if r['name'] != 'A1' and not r.get('reused'):
+            problems.append(f"{r['name']}: not restored (reused=0)")
+        speed = lambda x: x['generated'] / (x['decode_ms'] / 1000) if x.get('decode_ms') else 0.0
+        if r['name'] != 'A1' and speed(r) < (1 - tolerance) * speed(b):
+            problems.append(f"{r['name']}: restored decode {speed(r):.1f} tok/s vs live {speed(b):.1f}")
+    return problems
+
+
+def main():
+    ap = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)
+    ap.add_argument('--config', type=Path, required=True)
+    ap.add_argument('--engine', type=Path, required=True)
+    ap.add_argument('--output', type=Path, required=True, help='new directory; an existing path is refused')
+    ap.add_argument('--tokens', type=int, default=20000, help='about this many prompt tokens in A')
+    ap.add_argument('--gen', type=int, default=160, help='tokens generated per A turn')
+    ap.add_argument('--turns', type=int, default=3, help='A turns (the first is read fresh)')
+    ap.add_argument('--cache-mib', type=int, default=8192)
+    ap.add_argument('--set', action='append', metavar='FLAG=VALUE',
+                    help='override an engine flag of the config (FLAG= drops it); repeatable')
+    ap.add_argument('--tolerance', type=float, default=0.15, help='allowed decode shortfall of a restored turn')
+    ap.add_argument('--only', choices=('baseline', 'candidate'), help='run one side only (no comparison)')
+    ap.add_argument('--mode', choices=('switch', 'same', 'pair'), default='switch',
+                    help='switch: B parks A between turns; same: one conversation whose client drops the last '
+                         '--trim tokens of each reply (re-rendered history), as agent clients do; pair: two long '
+                         'conversations A and C take turns (each turn restores a big snapshot, the cache holds two)')
+    ap.add_argument('--trim', type=int, default=8)
+    ap.add_argument('--run', action='store_true')
+    a = ap.parse_args()
+    if not a.run:
+        print('Dry run: baseline (live turns) vs candidate (every turn after the first restored from a parked '
+              'snapshot); greedy, fixed residency. Use --run with the GPU free.')
+        return
+    from serve.server import StrataEngine, child_env
+    from serve.frontend import ChatTemplate
+    from conversation_cache_parity import load_tokenizer
+    cfg = json.loads(a.config.read_text(encoding='utf-8'))
+    p = Path(cfg['tokenizer'])
+    tok = load_tokenizer(p)
+    tpl = ChatTemplate(p / 'chat_template.jinja')
+    enc = lambda text: tok.encode(text, parse_special=True)
+    colors = ('blue', 'green', 'red', 'amber', 'violet', 'teal', 'grey', 'white')
+    shapes = ('square', 'triangle', 'circle', 'hexagon', 'star', 'ring')
+
+    def doc(label, n):
+        lines = [f'{label}: here is an inventory list to remember.']
+        i = 0
+        while len(lines) * 15 < n:
+            lines.append(f'Record {i}: a {colors[i % 8]} {shapes[(i * 7) % 6]} stored in bin {(i * 37) % 997}.')
+            i += 1
+        return '\n'.join(lines)
+
+    ask = 'Write a long, detailed story that uses as many of the records above as you can.'
+    A = enc(tpl.render([{'role': 'user', 'content': doc('Conversation A', a.tokens) + '\n' + ask}],
+                       enable_thinking=False))
+    B = enc(tpl.render([{'role': 'user', 'content': doc('Unrelated conversation B', 2000) + '\nName one bin.'}],
+                       enable_thinking=False))
+    follow = [enc('<|im_end|>\n<|im_start|>user\nContinue the story, with new records.<|im_end|>\n'
+                  '<|im_start|>assistant\n<think>\n\n</think>\n\n')]
+    a.output.mkdir(parents=False, exist_ok=False)
+    env = child_env(cfg)
+    base_args = override(cfg['args'], parse_sets(a.set) + [('--adapt-swaps', '0'), ('--prompt-cache', '6')])
+    results = {'prompt_tokens': len(A), 'args': base_args}
+    sides = [('baseline', 0), ('candidate', a.cache_mib)]
+    if a.only:
+        sides = [s for s in sides if s[0] == a.only]
+    for label, budget in sides:
+        args = base_args + ['--conversation-cache-mib', str(budget), '--conversation-cache-slots', '4']
+        engine = StrataEngine(str(a.engine.resolve()), args, cwd=cfg.get('cwd'), log=str(a.output / f'{label}.log'),
+                              env=env)
+        records = []
+
+        def generate(ids, count, name):
+            out = [t for t in engine.generate(ids, count, {'temperature': 0}, threading.Event()) if t is not None]
+            records.append({'name': name, 'ids': out, **engine.last})
+            print(f'{label} {summarize(records[-1:]).strip()}', flush=True)
+            return out
+
+        try:
+            convo = list(A)
+            other = enc(tpl.render([{'role': 'user', 'content': doc('Second long conversation C', a.tokens) + '\n' +
+                                     ask}], enable_thinking=False)) if a.mode == 'pair' else None
+            for turn in range(1, a.turns + 1):
+                if other is not None and budget:   # C's turn first: A comes back from its snapshot after it
+                    out_c = generate(other, a.gen if turn == 1 else 32, f'C{turn}')
+                    other = other + out_c + follow[0]
+                if turn > 1:
+                    if budget and a.mode == 'switch':
+                        generate(B, 1, f'B{turn}')   # parks A: this turn of A comes back from the snapshot
+                    convo += follow[0]
+                out = generate(convo, a.gen, f'A{turn}')
+                convo += out[:-a.trim] if a.mode == 'same' and len(out) > a.trim else out
+        finally:
+            engine.close()
+        results[label] = records
+    (a.output / 'results.json').write_text(json.dumps(results, indent=1) + '\n')
+    for label, _ in sides:
+        print(f'{label}:\n{summarize(results[label])}')
+    if a.only:
+        return
+    problems = compare(results, a.tolerance)
+    for line in problems:
+        print('FAIL ' + line)
+    print('PASS: restored turns decode like live ones, same output' if not problems else 'FAILED')
+    sys.exit(1 if problems else 0)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/tools/test_conversation_restore_speed.py b/tools/test_conversation_restore_speed.py
new file mode 100644
index 00000000000..d5a14892acb
--- /dev/null
+++ b/tools/test_conversation_restore_speed.py
@@ -0,0 +1,34 @@
+"""#528: the restore-speed bench's own logic (no GPU): flag overrides and the pass/fail rule."""
+import sys
+import unittest
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+import conversation_restore_speed as R  # noqa: E402
+
+
+def turn(name, ids, ms, reused=1):
+    return {'name': name, 'ids': ids, 'generated': len(ids), 'decode_ms': ms, 'reused': reused}
+
+
+class Bench(unittest.TestCase):
+    def test_override(self):
+        args = ['--max-context', '32768', '--kv', 'int8']
+        self.assertEqual(R.override(args, R.parse_sets(['--max-context=65536', '--kv-resident=16384', '--kv='])),
+                         ['--max-context', '65536', '--kv-resident', '16384'])
+
+    def test_compare(self):
+        base = [turn('A1', [1, 2], 100, 0), turn('A2', [3, 4], 100)]
+        ok = {'baseline': base, 'candidate': [turn('A1', [1, 2], 100, 0), turn('B2', [9], 10),
+                                              turn('A2', [3, 4], 110)]}
+        self.assertEqual(R.compare(ok, 0.15), [])
+        slow = {'baseline': base, 'candidate': [turn('A1', [1, 2], 100, 0), turn('A2', [3, 4], 400)]}
+        self.assertTrue(any('restored decode' in p for p in R.compare(slow, 0.15)))
+        differ = {'baseline': base, 'candidate': [turn('A1', [1, 2], 100, 0), turn('A2', [3, 5], 100)]}
+        self.assertTrue(any('output differs' in p for p in R.compare(differ, 0.15)))
+        unrestored = {'baseline': base, 'candidate': [turn('A1', [1, 2], 100, 0), turn('A2', [3, 4], 100, 0)]}
+        self.assertTrue(any('not restored' in p for p in R.compare(unrestored, 0.15)))
+
+
+if __name__ == '__main__':
+    unittest.main()

From 138ce43200ba7fc2fcb93457a8dafa8ce6800759 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 19:36:12 +0200
Subject: [PATCH 115/201] serve: a checkpoint that fails on the GPU sync says
 the GPU stopped responding (#613)

"saving a conversation checkpoint failed" was the only text when the checkpoint's
device sync failed - a GPU hang that Windows then resets (VIDEO_ENGINE_TIMEOUT), not a
checkpoint problem. The error now names it: "...: the GPU stopped responding before it
(<error>) - a GPU hang; on Windows the driver is then reset". Error text only.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index af5228084ea..e605c787fca 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4673,7 +4673,18 @@ int main(int argc, char** argv) {
         std::vector<int64_t> part_next(stages.size() + 1, INT64_MAX);
         // a checkpoint of the state after `cur[0, L)`; false only when the copy itself failed.  `parts`: the stages'
         // states saved at L (a split's mid-prompt checkpoint); without, they are read now (everything is at L)
+        // #613: why the last checkpoint_at failed - a failed device sync is the GPU itself (a hang Windows then resets),
+        // not the checkpoint, and the error says so
+        std::string ckpt_why;
+        auto gpu_sync_ok = [&]() -> bool {
+            const cudaError_t e = cudaDeviceSynchronize();
+            if (e == cudaSuccess) return true;
+            ckpt_why = std::string(": the GPU stopped responding before it (") + cudaGetErrorString(e) +
+                       ") - a GPU hang; on Windows the driver is then reset";
+            return false;
+        };
         auto checkpoint_at = [&](int64_t L, std::vector<ConvCheckpoint>* parts = nullptr) -> bool {
+            ckpt_why.clear();
             if (o.prompt_cache <= 0 || L < 1) return true;
             for (ConvCheckpoint& c : checks)
                 if ((int64_t) c.ids.size() == L) { c.used = ++check_clock; return true; }
@@ -4689,12 +4700,12 @@ int main(int argc, char** argv) {
                 c.block_pos = std::move((*parts)[0].block_pos);
                 for (size_t i = 1; i < parts->size(); ++i) c.stage_parts.push_back(std::move((*parts)[i]));
             } else {
-                if (cudaDeviceSynchronize() != cudaSuccess || !checkpoint_save(c, ss, g)) return false;
+                if (!gpu_sync_ok() || !checkpoint_save(c, ss, g)) return false;
                 for (auto& st : stages) {   // a layer split's later stages: their sessions' part
                     const strata::core::OnDevice on(st->dev);
                     ConvCheckpoint part;
                     part.ids = c.ids;
-                    if (cudaDeviceSynchronize() != cudaSuccess || !checkpoint_save(part, st->ss, g)) return false;
+                    if (!gpu_sync_ok() || !checkpoint_save(part, st->ss, g)) return false;
                     c.stage_parts.push_back(std::move(part));
                 }
             }
@@ -4744,7 +4755,7 @@ int main(int argc, char** argv) {
                 } else {
                     saved = checkpoint_at(done);
                 }
-                if (!saved) { e = "saving a conversation checkpoint failed"; return false; }
+                if (!saved) { e = "saving a conversation checkpoint failed" + ckpt_why; return false; }
                 pp_next_check = done + o.prompt_cache_every;
             }
             return true;
@@ -5800,7 +5811,7 @@ int main(int argc, char** argv) {
                 }
                 at = to;
                 if ((to == turn_at || to == root_at) && !checkpoint_at(to)) {
-                    std::printf("ERR saving a conversation checkpoint failed\n");
+                    std::printf("ERR saving a conversation checkpoint failed%s\n", ckpt_why.c_str());
                     return 1;
                 }
             }

From 13f70a348cb508ea53b7582b217901fbf9fb75c3 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 20:05:31 +0200
Subject: [PATCH 116/201] layer split trim: opt-in on HIP too
 (STRATA_STAGE_TRIM=1, PR #639)

The trim was on by default in the HIP builds. It now waits, as on CUDA, for the PR author's re-run of the release
branch on his cards; the default flips after that. --layer-split auto and one GPU were never affected.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/MULTI_GPU.md        |  4 ++--
 src/program/generate.cpp | 12 +++---------
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/docs/MULTI_GPU.md b/docs/MULTI_GPU.md
index 5925214e929..d98f8e19f9a 100644
--- a/docs/MULTI_GPU.md
+++ b/docs/MULTI_GPU.md
@@ -83,8 +83,8 @@ everything - the bit-exact check of the hand-off, not a speed mode.
 **Each card loads only its own layers' dense weights** (0.1.39, PR #639) with explicit split points (`--layer-split
 27`, not `auto`): every card used to keep a full copy (~3.4 GB for the Coder) though its stage reads only its own
 layers, and the VRAM it frees goes to that card's expert cache (2x MI50 16 GB, Coder: 8,819 -> 10,626 experts in
-VRAM, decode 39.2 -> 41.7 tok/s). On by default in the AMD (HIP) builds, `STRATA_STAGE_TRIM=0` keeps the full copies;
-on NVIDIA it is opt-in with `STRATA_STAGE_TRIM=1` until it has been run on NVIDIA cards (please report how it goes).
+VRAM, decode 39.2 -> 41.7 tok/s). Opt-in for now, on AMD and NVIDIA alike: `STRATA_STAGE_TRIM=1` (please report how
+it goes).
 A card holding more experts can change which experts run on the GPU, so the output can differ slightly from a run
 without it.
 
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index f6d98b96942..b9a4440cca8 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2146,18 +2146,12 @@ int main(int argc, char** argv) {
     }
     // Layer split with explicit split points: every GPU holds only the dense weights of ITS layers (the PLE tensors
     // stay everywhere).  Without this each card keeps a full copy (~3.4 GB for the Coder) that its stage never
-    // reads - VRAM the expert cache wants.  On by default in the AMD (HIP) builds, where it was measured (PR #639,
-    // 2x MI50); STRATA_STAGE_TRIM=0 keeps the full copies there.  The CUDA build keeps the full copies unless
-    // STRATA_STAGE_TRIM=1, until it has run on NVIDIA cards.
+    // reads - VRAM the expert cache wants.  Opt-in, STRATA_STAGE_TRIM=1, on HIP and CUDA alike: measured on 2x MI50
+    // (PR #639), and the default waits for its author's re-run of the release branch on his cards.
     const std::set<std::string> skip_base = skip;
     const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() && [] {
         const char* v = std::getenv("STRATA_STAGE_TRIM");
-        if (v != nullptr && v[0] != 0) return std::string(v) != "0";
-#if defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)
-        return true;
-#else
-        return false;
-#endif
+        return v != nullptr && v[0] != 0 && std::string(v) != "0";
     }();
     // keep_routers: CUDA0 with --mmap-experts keeps every layer's router (ffn_gate_inp, ~2.5 MiB a layer) - the file
     // tier's routing-aware prefetch (RouterLookahead, below) copies all of them from CUDA0's arena, and would

From cff608cb6e8437f6915b9fc8cbbcd0e96a16d2e0 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 20:05:44 +0200
Subject: [PATCH 117/201] Engine 0.1.39: the #577 file-tier regression fixed,
 the OpenAI Responses API (#451), #606 #620 #458 #533, PR batch; setup
 requires it

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt | 2 +-
 setup.py       | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ab399104b4c..347d2ec7ca2 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -8,7 +8,7 @@
 # below refuses anything older: silently building for a pre-Ampere arch would produce a binary that runs
 # and is wrong about its own performance, which is the worst of both outcomes.
 cmake_minimum_required(VERSION 3.24)
-project(strata VERSION 0.1.38 LANGUAGES CXX)
+project(strata VERSION 0.1.39 LANGUAGES CXX)
 add_compile_definitions(STRATA_VERSION="${PROJECT_VERSION}")
 # issue #31: release builds keep a PDB beside the exe (not shipped in it), so a minidump from a stalled engine can
 # be read back to the exact source line
diff --git a/setup.py b/setup.py
index acd99f68d27..f0d2a0d13b4 100644
--- a/setup.py
+++ b/setup.py
@@ -104,7 +104,7 @@ def hf_unpinned(url: str) -> str:
 # the CUDA libraries the ready-made engine loads (the same CUDA 13.0 it is built with), from NVIDIA's pip packages
 CUDA_WHEELS = ["nvidia-cublas==13.0.2.14", "nvidia-cuda-runtime==13.0.96"]
 MIN_DRIVER = 580                       # CUDA 13.0
-MIN_ENGINE = (0, 1, 38)                # v0.1.38: prompts faster (one gather per expert group #372, the first chunk's PLE rows beside layer 0 #374, DeltaNet three heads per thread #413), --kv q4_0 prompts on tensor cores (#452), Q5_0 experts on the GPU (#473), IQ4_XS on AVX-2 (#415), unbuffered expert loading on Windows (#357 #362), --peer-device (#531), a 6 GB card starts (#496), PR batch; v0.1.37: a silent engine is restarted (#481), Windows AMD counts the desktop's VRAM (#380 #377 #497), a steadier PCIe probe (#485), fixes #496 #495 #498 #505 #493; v0.1.36: a cancelled prompt logged as read so far (#471), the draft-head hint (#474), UPDATE.bat (#475), --expert-profile-save (#477); v0.1.35: Windows AMD uses its bundled HIP runtime (#468 #461), the low-RAM resident mode on Windows 32 GB (#467), fixes #460 #459 #446 #447 #457 #448 #444; v0.1.34: AMD on Windows (a ready-made HIP engine), an MCP server for AI assistants (tools/strata_mcp.py), a shorter README; v0.1.33: a portable image encoder again (#411 #412), setup recommends instead of forcing (#406 #403 #364 #384), fixes #352 #365 #369 #371 #375 #393 #408 #414; v0.1.32: split prompts faster (#340), AMD router +12%, Unsloth Q4 in setup, faster Q4 prompts, #326/#327/#342/#344 fixes, PR batch; v0.1.31: Unsloth UD-Q4_K_XL (experimental), GGUF-in-place low-RAM mode, Windows GGUF load 2x, server race + tokenizer fixes, AMD intrinsics; v0.1.30: short prompts faster (streaming from 1024 tokens), resident low-RAM variant, multi-GPU session carve, RDNA4; v0.1.29: sampled answers faster (split top-k), #154 correctness fixes; v0.1.28: the expert cache reserves the draft head, a cancelled request no longer fails the next; v0.1.27: RTX 20 (sm_75) in the ready-made engine, the HIP build without CUDA headers; v0.1.26: the draft layer's prompt pass in batches; v0.1.25: faster prompts (grouping off the copy engine, fused hyper-connection kernels), AMD HIP backend, --kv k8v4; v0.1.24: long prompts faster (QSA select on tensor cores); v0.1.23: image requests honor sampling, 8 GB cards start, batched verify window; v0.1.22: faster prompts (tensor-core attention), multi-GPU across images/steering/KV streaming; v0.1.21: multi-GPU layer split (--gpus); v0.1.20: system-prompt checkpoint, PCIe probe, hit rate; v0.1.19: penalties
+MIN_ENGINE = (0, 1, 39)                # v0.1.39: the #577 file-tier regression fixed, the OpenAI Responses API (#451, Codex), a reply stuck on one token ended (#606), the head before the arena (#620), effort_position (#458), --vram-reserve hot resize opt-in (#533), PR batch; v0.1.38: prompts faster (one gather per expert group #372, the first chunk's PLE rows beside layer 0 #374, DeltaNet three heads per thread #413), --kv q4_0 prompts on tensor cores (#452), Q5_0 experts on the GPU (#473), IQ4_XS on AVX-2 (#415), unbuffered expert loading on Windows (#357 #362), --peer-device (#531), a 6 GB card starts (#496), PR batch; v0.1.37: a silent engine is restarted (#481), Windows AMD counts the desktop's VRAM (#380 #377 #497), a steadier PCIe probe (#485), fixes #496 #495 #498 #505 #493; v0.1.36: a cancelled prompt logged as read so far (#471), the draft-head hint (#474), UPDATE.bat (#475), --expert-profile-save (#477); v0.1.35: Windows AMD uses its bundled HIP runtime (#468 #461), the low-RAM resident mode on Windows 32 GB (#467), fixes #460 #459 #446 #447 #457 #448 #444; v0.1.34: AMD on Windows (a ready-made HIP engine), an MCP server for AI assistants (tools/strata_mcp.py), a shorter README; v0.1.33: a portable image encoder again (#411 #412), setup recommends instead of forcing (#406 #403 #364 #384), fixes #352 #365 #369 #371 #375 #393 #408 #414; v0.1.32: split prompts faster (#340), AMD router +12%, Unsloth Q4 in setup, faster Q4 prompts, #326/#327/#342/#344 fixes, PR batch; v0.1.31: Unsloth UD-Q4_K_XL (experimental), GGUF-in-place low-RAM mode, Windows GGUF load 2x, server race + tokenizer fixes, AMD intrinsics; v0.1.30: short prompts faster (streaming from 1024 tokens), resident low-RAM variant, multi-GPU session carve, RDNA4; v0.1.29: sampled answers faster (split top-k), #154 correctness fixes; v0.1.28: the expert cache reserves the draft head, a cancelled request no longer fails the next; v0.1.27: RTX 20 (sm_75) in the ready-made engine, the HIP build without CUDA headers; v0.1.26: the draft layer's prompt pass in batches; v0.1.25: faster prompts (grouping off the copy engine, fused hyper-connection kernels), AMD HIP backend, --kv k8v4; v0.1.24: long prompts faster (QSA select on tensor cores); v0.1.23: image requests honor sampling, 8 GB cards start, batched verify window; v0.1.22: faster prompts (tensor-core attention), multi-GPU across images/steering/KV streaming; v0.1.21: multi-GPU layer split (--gpus); v0.1.20: system-prompt checkpoint, PCIe probe, hit rate; v0.1.19: penalties
 PY_PACKAGES = ["numpy", "jinja2", "regex", "pyyaml", "tqdm", "requests", "cmake", "ninja", "pillow", "psutil"]
 REQUIREMENTS = ROOT / "requirements.txt"   # the same packages and their dependencies, pinned (#214)
 

From bd400f772ab0334e28a5786c41ebe8e7051bcbec Mon Sep 17 00:00:00 2001
From: benoit lange <benoit@lange.xyz>
Date: Sat, 3 Oct 2026 20:54:02 +0200
Subject: [PATCH 118/201] Layer split comment: KV streaming and images do run
 across a split

Reported on 2 x TITAN RTX (split 25, KV streaming, GPU image encoder, parking, --batch 4 --batch-groups 2).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 src/program/generate.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 99e1e8a85ba..83d853e6e66 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1365,9 +1365,10 @@ int main(int argc, char** argv) {
                      o.prompt_cache == 0 ? "--prompt-cache 0" : "--conversation-cache-slots 0");
     // parking with --layer-split saves every stage (SavedConversation::stage_images)
     // Layer split (multi-GPU): the later stages run layers [K_i, K_i+1) on their own GPUs (--split-device, default
-    // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  Across
-    // GPUs, not yet: KV streaming, images, control vectors, the helper caches (--expert-cache-remote), and lending
-    // cache slots to the prompt path (each stage's prompt path has its own buffers).
+    // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  KV
+    // streaming and images (the server's GPU encoder) run across a split, also with parking and --batch.  Across
+    // GPUs, not yet: control vectors, the helper caches (--expert-cache-remote), and lending cache slots to the
+    // prompt path (each stage's prompt path has its own buffers).
     // --pcie-frac given: that one share is every stage's (the stages' own link probes are skipped), so a split over
     // a fast and a slow link cannot set the two apart from the command line (#485)
     const bool pcie_given = o.pcie_frac >= 0.0;

From daf3b7e237d9af658132ae91069ca608deccdb8d Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Sat, 3 Oct 2026 15:13:06 -0500
Subject: [PATCH 119/201] sycl: port upstream 0.1.38

3-way merge from the port's "main + PRs" migration to dpct of upstream 0.1.38
(prefill.cpp re-merged with the histogram diff: upstream's peer-device and fused
restructure kept, the port's edits carried over - the stager's GGUF job, the
stream-all gate, the fp16 NaN checks; generate.cpp: the pipelined profile fill
beside upstream's prefetching serial fill; mtp/verify: the SYCL host mapping).

- the PRs' header forks dropped: upstream has them now
- stubs: --peer-device (peer_experts.cpp; open refuses) and the fused int8 prompt
  kernels (moe_fused_stub.cpp; MMQ is not built here)
- off on SYCL: the sm_90 cluster greedy sampler and QSA top-k (fixups.py)
- fused_gr: dpct's undeduced kernel names filled in (fixups.py)
- STRATA_GDN_KEYHEAD stays opt-in on the port (upstream's gate is NVIDIA SM counts)
- version 0.1.38

Tested on the B70: build clean; native_grouped, iq_multi, gr, qsa, kv_hybrid,
quantize_act parity pass, qsa_prompt_attn's int8/fp16 pass (its new Q4_0
tensor-core cases are refused: not in the port); Coder short/long, IQ2_XS, 40K
outputs identical; 128K int8 KV streaming 892 / 66.8 tok/s; GR_DOWN_MAX4 neutral,
GDN_KEYHEAD 8% slower (stays off).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                                |   15 +-
 sycl/CMakeLists.txt                          |    8 +-
 sycl/include/strata/core/peer_experts.hpp    |  108 ++
 sycl/include/strata/kernels/iq_kernels.hpp   |   77 -
 sycl/include/strata/kernels/ngram.hpp        |  213 ---
 sycl/include/strata/kernels/sampler.hpp      |    5 +
 sycl/include/strata/prefill/kernels.hpp      |   97 --
 sycl/src/core/device.dp.cpp                  |   95 +-
 sycl/src/core/expert_cache.cpp               |   83 +-
 sycl/src/core/expert_source.cpp              |  426 ++++-
 sycl/src/core/mtp.cpp                        |   60 +-
 sycl/src/core/peer_experts.cpp               |   41 +
 sycl/src/core/pinned.dp.cpp                  |  172 +-
 sycl/src/core/verify.cpp                     |    5 +-
 sycl/src/kernels/cuda/elementwise.dp.cpp     |   41 +
 sycl/src/kernels/cuda/fused_gr.dp.cpp        |  255 ++-
 sycl/src/kernels/cuda/iq_kernels.dp.cpp      |   74 +-
 sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp |  146 +-
 sycl/src/kernels/cuda/qsa_select.dp.cpp      |  514 +++++-
 sycl/src/kernels/cuda/sampler.dp.cpp         |  283 +++-
 sycl/src/kernels/qsa_prompt_attn_parity.cpp  |   47 +-
 sycl/src/prefill/kernels.dp.cpp              |    2 +-
 sycl/src/prefill/moe_fused_stub.cpp          |   37 +
 sycl/src/prefill/prefill.cpp                 | 1553 ++++++++++++++----
 sycl/src/program/generate.cpp                |  592 +++++--
 sycl/tools/fixups.py                         |   14 +
 26 files changed, 3971 insertions(+), 992 deletions(-)
 create mode 100644 sycl/include/strata/core/peer_experts.hpp
 delete mode 100644 sycl/include/strata/kernels/iq_kernels.hpp
 delete mode 100644 sycl/include/strata/kernels/ngram.hpp
 delete mode 100644 sycl/include/strata/prefill/kernels.hpp
 create mode 100644 sycl/src/core/peer_experts.cpp
 create mode 100644 sycl/src/prefill/moe_fused_stub.cpp

diff --git a/docs/INTEL.md b/docs/INTEL.md
index 72bb6d1b0ce..c386055ed65 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -28,7 +28,7 @@ PCIe 3.0 x8 slot (the card trains at Gen3 x8 there; it can do Gen5 x16).
 
 Decode speed with speculative decoding depends on the text: code drafts well, prose less so (see "Speed depends
 on the text"). The SYCL numbers are greedy runs of the engine (as in "How to run it by hand" below, 256 new
-tokens) on engine 0.1.31-sycl (2026-10-01; 0.1.32-0.1.35-sycl reproduce them exactly);
+tokens) on engine 0.1.31-sycl (2026-10-01; 0.1.32-0.1.38-sycl reproduce them exactly);
 "Decode round 2" below lists what each change bought.
 
 ## Setup
@@ -559,6 +559,19 @@ page-locked batches of 64, and a batch's copies run while the next one is read.
 (0.33 -> 1.34 GB/s); a whole Coder start from the engine's launch to its first token 82 s -> 26 s, the IQ2_XS
 120 s -> 41 s (its 8.2 GB host mirror is ~9 s of the rest). Output identical. `STRATA_FILL_SERIAL=1` is the old fill.
 
+**The 0.1.38 merge (2026-10-03).** Upstream 0.1.35 -> 0.1.38 (83 commits) merged the seven PRs the port had taken
+early, so their header forks in `sycl/include` are gone; the merge base for the 3-way merge was the port's own "main +
+PRs" migration. New in the port with it: the DeltaNet output norm without its dead FP32 store, two prompt-path
+fixes (the fused layout's buffers, the streamed walk's resident lookup), `STRATA_GR_DOWN_MAX4=1` (opt-in; neutral on
+the B70: 2,184-token prompt 793 vs 788 tok/s, decode 76.2 vs 76.3). Stubbed in the port: `--peer-device` (a second
+GPU as an expert-cache tier: upstream's code is CUDA calls; `open` refuses with a message) and the fused int8 prompt
+kernels (#136, part of the MMQ library the port does not build). Off on SYCL: the sm_90 thread-block-cluster greedy
+sampler and QSA top-k (no SYCL counterpart; the callers take the plain kernels). `STRATA_GDN_KEYHEAD=1` stays opt-in
+(still 8% slower here: 727 vs 788 tok/s). `qsa_prompt_attn_parity` now also tests upstream's Q4_0 tensor-core mode
+(#452), which the port does not have: those cases report "refused" (the int8 and fp16 XMX cases pass); a `--kv
+q4_0` prompt takes the older kernel, as before. Outputs identical (Coder, IQ2_XS, 40K); 128K int8 KV streaming
+892 / 66.8 tok/s.
+
 **0.1.35 and seven open upstream PRs (2026-10-02).** Upstream main 0.1.33 -> 0.1.35 merged as before, then seven open
 PRs ported into `sycl/` ahead of upstream (one dpct run of main + all of them, 3-way merged into only the files they
 touch; `sycl/tools/merge_upstream.py`). Their header changes live in `sycl/include` until upstream merges them.
diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index b32ad9d0e2a..fb25d7d530a 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.35 LANGUAGES C CXX)   # the upstream engine version this port tracks
+project(strata_sycl VERSION 0.1.38 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
@@ -156,14 +156,16 @@ target_link_libraries(strata_kernels PUBLIC strata_core)
 strata_resolve(_engine src/core/layer.cpp src/core/session.cpp src/core/expert_source.cpp src/core/remote_experts.cpp
                        src/core/expert_cache.cpp src/core/native_head.cpp src/core/native_dense.cpp src/core/verify.cpp
                        src/core/mtp.cpp src/core/conversation_snapshot.cpp src/core/conversation_state.cpp
-                       src/core/conversation_memory.cpp)   # 0.1.31: the conversation snapshots (#216)
+                       src/core/conversation_memory.cpp   # 0.1.31: the conversation snapshots (#216)
+                       src/core/peer_experts.cpp)         # 0.1.36+: --peer-device (a stub in the port: no second GPU tier yet)
 add_library(strata_engine STATIC ${_engine} ${CMAKE_CURRENT_SOURCE_DIR}/src/core/gguf_expert_source.cpp)
 target_include_directories(strata_engine PRIVATE ${STRATA_ROOT}/src/core)   # conversation_checked.hpp (#include "...")
 target_link_libraries(strata_engine PUBLIC strata_core strata_kernels strata_kernels_cpu)
 
 # cuBLAS -> oneMKL through dpct::blas (needs the MKL SYCL BLAS domain)
 strata_resolve(_prefill src/prefill/gemm.cu src/prefill/kernels.cu src/prefill/prefill.cpp)
-add_library(strata_prefill STATIC ${_prefill})
+add_library(strata_prefill STATIC ${_prefill}
+            ${CMAKE_CURRENT_SOURCE_DIR}/src/prefill/moe_fused_stub.cpp)   # upstream's fused int8 kernels: not built here
 target_compile_options(strata_prefill PUBLIC -qmkl=sequential)
 target_link_options(strata_prefill PUBLIC -qmkl=sequential)
 target_link_libraries(strata_prefill PUBLIC strata_engine)
diff --git a/sycl/include/strata/core/peer_experts.hpp b/sycl/include/strata/core/peer_experts.hpp
new file mode 100644
index 00000000000..fd33e692961
--- /dev/null
+++ b/sycl/include/strata/core/peer_experts.hpp
@@ -0,0 +1,108 @@
+// include/strata/core/peer_experts.hpp - multi-GPU: a second expert tier on another GPU.
+//
+// The primary GPU (device 0) keeps everything it had: the dense weights, the KV cache, the MTP layer, its own
+// adaptive expert tier and the captured verify graph.  This class adds an expert tier on a SECOND card.  From
+// the verify graph's point of view nothing changes: for each layer the pool thread decides which routed experts
+// the primary computes (its VRAM tier, the PCIe share), and every remaining expert is a "CPU row" the graph reads
+// from mapped host memory after the pool raises its flag.  The peer takes the rows whose experts it holds: the
+// pool thread launches them on the peer right after publishing the primary's plan, the CPU computes the rest at
+// the same time, and the peer's rows are written into the same mapped rows before the pool returns.
+//
+// The peer computes with the SAME kernels as the primary's hit path (q8_1 activations + native_expert_grouped),
+// from the same activation values, so an expert gives bit-identical rows on either card.
+//
+// The tier follows the conversation like the primary's: `adapt` swaps the most-routed experts that neither card
+// holds into the peer's least-used slots (per layer, so a slot keeps its layer's blob size).
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+#include "strata/core/expert_cache.hpp"
+#include "strata/core/expert_source.hpp"
+
+#include <cstdint>
+#include <string>
+#include <utility>
+#include <vector>
+
+namespace strata::core {
+
+/// multi-GPU: set once at startup when a peer device is configured (--peer-device N).  The mapped host buffers
+/// the peer card writes into are then allocated with cudaHostAllocPortable; without a peer the flag stays off.
+void set_peer_portable(bool on);
+bool peer_portable();
+
+class PeerExperts {
+public:
+    PeerExperts() = default;
+    ~PeerExperts();
+    PeerExperts(const PeerExperts&) = delete;
+    PeerExperts& operator=(const PeerExperts&) = delete;
+
+    /// Opens the tier on `device`: fills it with the first pairs of `ranked` that `primary` does not hold, as many
+    /// as fit in the card's free memory minus `reserve_mib` (`max_slots` > 0 caps the count).
+    bool open(int device, const std::vector<std::pair<int32_t, int32_t>>& ranked, const ExpertCache& primary,
+              ExpertSource& src, int64_t n_layers, int64_t n_expert, int reserve_mib, int64_t max_slots,
+              std::string& err);
+    void close();
+    bool valid() const { return device_ >= 0; }
+    int device() const { return device_; }
+
+    /// Whether the peer holds (layer, expert) right now.
+    bool has(int64_t layer, int64_t expert) const { return res_[(size_t) (layer * n_expert_ + expert)] >= 0; }
+
+    /// The device address of (layer, expert)'s blob on the peer, or null when it is not resident.
+    const uint8_t* slot_ptr(int64_t layer, int64_t expert) {
+        const int32_t sl = res_[(size_t) (layer * n_expert_ + expert)];
+        return sl >= 0 ? cache_.device_slot(sl) : nullptr;
+    }
+    /// Whether the primary (device 0) and the peer can read each other's memory directly (NVLink / PCIe P2P).
+    bool p2p() const { return p2p_; }
+
+    /// Starts the peer's share of one layer: the entries i with kind[i] == 2 (x: n_tok rows of n_embd floats).
+    /// multi-GPU: with `out` (pinned, portable host rows) the peer writes its rows straight into
+    /// out[entry] with a scatter kernel (no D2H copy + host memcpy in finish); STRATA_PEER_DIRECT=0: the old way.
+    bool launch(int64_t layer, const float* x, const int32_t* ids, int64_t n_tok, int64_t k, const int32_t* kind,
+                std::string& err, float* out = nullptr);
+    /// Waits for the launched share and writes its rows into `out` (row i = entry i, n_embd floats).
+    bool finish(float* out, std::string& err);
+
+    /// Adaptive tier: swap up to `max_swaps` experts routed at least twice that neither the primary (`res0`, slot
+    /// or -1) nor the peer holds into the peer's least-used slots.  Copies run on the peer's refill stream; a
+    /// swapped-in expert becomes resident at `apply_pending`.  Call only between verify windows.
+    bool adapt(const float* usage, const int32_t* res0, int max_swaps, std::string& err);
+    void apply_pending(bool wait);
+
+    int64_t resident() const { return resident_; }
+    /// the last launch writes its rows into the host rows itself (the caller must not touch them)
+    bool launched_direct() const { return launched_direct_; }
+    double gib() const { return cache_.gib(); }
+    int64_t entries() const { return entries_; }      ///< routed entries the peer computed
+    int64_t experts() const { return experts_; }      ///< distinct (layer, expert) the peer computed
+    int64_t swaps() const { return swaps_; }
+    double ms_wait = 0;                               ///< host time spent in finish() waiting for the peer
+
+private:
+    int device_ = -1;
+    bool p2p_ = false;
+    int64_t n_layers_ = 0, n_expert_ = 0;
+    ExpertCache cache_;
+    ExpertSource* src_ = nullptr;
+    std::vector<int32_t> res_;                        ///< [n_layers * n_expert] -> peer slot or -1
+    std::vector<std::pair<int32_t, int32_t>> pending_;   ///< (residency index, slot) once the copies land
+    int64_t resident_ = 0, entries_ = 0, experts_ = 0, swaps_ = 0;
+    dpct::queue_ptr stream_ = &dpct::get_in_order_queue(),
+                    refill_ = &dpct::get_in_order_queue();
+    dpct::event_ptr refill_ev_ = nullptr;
+    float* h_x_ = nullptr;   float* d_x_ = nullptr;   // n_tok x n_embd
+    float* h_out_ = nullptr; float* d_out_ = nullptr; // compact rows
+    void* h_meta_ = nullptr; void* d_meta_ = nullptr; // groups: ptr | start | dst | tok | count
+    uint8_t* d_q8_ = nullptr;
+    void* d_scratch_ = nullptr;
+    std::vector<int32_t> row_of_;                     ///< compact row -> original entry
+    int64_t launched_rows_ = 0;
+    bool launched_direct_ = false;
+};
+
+}  // namespace strata::core
diff --git a/sycl/include/strata/kernels/iq_kernels.hpp b/sycl/include/strata/kernels/iq_kernels.hpp
deleted file mode 100644
index 56c0d65e7b8..00000000000
--- a/sycl/include/strata/kernels/iq_kernels.hpp
+++ /dev/null
@@ -1,77 +0,0 @@
-// include/strata/kernels/iq_kernels.hpp - the i-quant formats (IQ1_M, IQ2_XXS, IQ2_XS, IQ2_S, IQ3_XXS, IQ3_S,
-// IQ4_NL) and Q2_0 on the GPU for the IQ2_XS / IQ3_XXS model files, and Q4_K / Q5_K / Q5_1 / Q8_0 for Unsloth's
-// UD-Q4_K_XL (gate/up Q4_K or Q5_K, down Q5_1 or Q8_0, a Q8_0 embedding).
-//
-// The block layouts, codebook grids and dot products are llama.cpp's (ggml-common.h, ggml-cuda/vecdotq.cuh,
-// ggml-cuda/dequantize.cuh; MIT, see third_party/ggml/LICENSE and VERSION.txt), so a weight means exactly what it
-// means in llama.cpp.  Activations are q8_1 (32 values, fp16 scale and fp16 sum), the llama.cpp CUDA contract.
-#pragma once
-
-#include <cstddef>
-#include <cstdint>
-
-namespace strata::kernels {
-
-/// ggml type ids handled here.
-bool iq_supported(int ggml_type) noexcept;
-/// The token-embedding types iq_embed_rows and iq_dequant_f32 read: the i-quants above and BF16 (30).
-bool embed_type_supported(int ggml_type) noexcept;
-/// Bytes of one row of `n` values of `ggml_type` (n a multiple of the type's block).
-size_t iq_row_bytes(int ggml_type, int64_t n) noexcept;
-
-/// q8_1 blocks for `n_rows` rows of `n_cols` floats (n_cols a multiple of 32): y is n_rows * n_cols/32 blocks.
-void quantize_q8_1_rows(const float* x, int64_t n_rows, int64_t n_cols, void* y, void* stream);
-
-/// y[c][r] = W[r] . x[c] for `ncols` columns of q8_1 activations (x stride n_in/32 blocks per column).
-void iq_mmvq(int ggml_type, const void* w, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream);
-
-/// Dequantize `n` contiguous values (n a multiple of 256) to fp16 / fp32.
-void iq_dequant_f16(int ggml_type, const void* src, int64_t n, uint16_t* dst, void* stream);
-void iq_dequant_f32(int ggml_type, const void* src, int64_t n, float* dst, void* stream);
-/// Rows `tokens[0..n_tok)` (device ids) of a GGUF embedding table (`row_bytes` per row; the table may be mapped
-/// host memory) dequantized to fp32, `n_embd` per row (a multiple of 256).
-void iq_embed_rows(int ggml_type, const void* table, size_t row_bytes, const int32_t* tokens, int64_t n_tok,
-                   int64_t n_embd, float* out, void* stream);
-/// One expert's gate and up matrices (n_ff rows of n_embd each) into the interleaved fp16 layout the prompt path
-/// uses: row 2r = gate row r, row 2r+1 = up row r.
-void iq_dequant_gu_f16(int ggml_type, const void* gate, const void* up, int64_t n_ff, int64_t n_embd, uint16_t* dst,
-                       void* stream);
-
-/// The layout of one native expert blob: [gate rows | up rows | down rows], raw GGUF blocks.
-struct NativeExpertLayout {
-    int gu_type = -1, d_type = -1;
-    int64_t n_embd = 0, n_ff = 0;
-    size_t gu_row = 0, d_row = 0;       // bytes per row
-    size_t up_off = 0, down_off = 0;    // byte offsets inside the blob
-    size_t bytes = 0;                   // the whole blob
-};
-NativeExpertLayout native_expert_layout(int gu_type, int d_type, int64_t n_embd, int64_t n_ff);
-/// Whether `native_expert_grouped` has kernels for this gate/up and down type pair at these dimensions, and the
-/// prompt path's dequantizer takes both (checked for every layer at startup, before anything is allocated).
-bool native_expert_supported(int gu_type, int d_type, int64_t n_embd, int64_t n_ff) noexcept;
-
-/// Bytes of scratch `native_expert_grouped` needs for `cap_entries` entries.
-size_t native_expert_scratch_bytes(int64_t cap_entries, int64_t n_ff);
-
-/// Grouped experts in the native format: group g's blob at device address grp_ptr[g]; its entries
-/// [grp_start[g], grp_start[g+1]) read token ent_tok[e]'s q8_1 activation (n_embd/32 blocks per token in x_q8_1)
-/// and write row ent_dst[e] of `out` (n_embd floats).  Counts are read on the device.
-/// `grid_groups` (1 .. cap_groups; 0 = cap_groups) groups run side by side, a block row each striding over the rest:
-/// a call that usually has few groups or none (the verify window's PCIe share) launches less for the ones it does
-/// not have.  The results do not depend on it.
-void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long* grp_ptr, const int32_t* grp_start,
-                           const int32_t* n_groups, const int32_t* ent_dst, const int32_t* ent_tok, int64_t cap_groups,
-                           int64_t cap_entries, const void* x_q8_1, void* scratch, float* out, void* stream,
-                           int64_t grid_groups = 0);
-/// true: `native_expert_grouped`'s launches before the group stride (STRATA_GROUPED_V1=1 at startup) - a block row
-/// per possible group, SwiGLU and the q8_1 quantization as two kernels over all cap_entries.  Bitwise the same results
-/// (native_grouped_parity checks it); kept for A/B timing.  Set before graph capture; captured graphs keep theirs.
-void native_grouped_set_v1(bool v1);
-
-/// `iq_mmvq` and `native_expert_grouped` decode each weight part once and apply it to every column / entry;
-/// true selects the older kernels that decode it again per column (STRATA_OLD_IQ_MMVQ=1 at startup).  Both give
-/// bitwise the same results.  Set before graph capture; captured graphs keep the kernels they captured.
-void iq_set_old_kernels(bool old);
-bool iq_old_kernels();
-
-}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/ngram.hpp b/sycl/include/strata/kernels/ngram.hpp
deleted file mode 100644
index 9aae9c08c8a..00000000000
--- a/sycl/include/strata/kernels/ngram.hpp
+++ /dev/null
@@ -1,213 +0,0 @@
-// include/strata/kernels/ngram.hpp - P2.S4: the PLE n-gram hash and the per-layer token table.
-//
-// Two halves that share nothing but the row indices they exchange:
-//
-//   * `ngram_rows` - the HOST hash.  Sixteen row indices per token from the last three token ids, computed
-//     with 64-bit multiply/xor and no tensor op at all.  `qwen4exp.cpp` L1092-1124, where the source says
-//     outright that it is host-side because "ggml has no int64 and no xor".
-//   * `PleTable`  - the row gather.  `per_layer_token_embd.weight` is IQ4_NL and is NOT IN THE PACK: it is
-//     51.2e9 elements (28.8 GB) in the ORIGINAL second GGUF shard, and it is the only tensor this engine
-//     reads from the GGUF rather than from the canonical pack.
-//
-// THE HASH IS THE ONE PLACE IN THIS MODEL WHERE A WRONG BIT IS SILENTLY PLAUSIBLE.  Every one of its
-// properties has a rival reading that produces a valid index in range:
-//
-//   * XOR, not sum.  Two equal tokens with equal multipliers cancel to zero under XOR and double under sum.
-//   * `%` vocab_size, not `& (vocab_size-1)`.  The vocab sizes are 20000003, 20000023, 20000033, ... - not
-//     powers of two, so a mask would be a different function.
-//   * the EOS cut propagates FORWARD: an EOS at any position replaces that position AND every older one.
-//   * a missing predecessor is `LLAMA_TOKEN_NULL = -1`, tested as `t < 0`.  Token id 0 is a REAL token.
-//   * the token's OWN eos does not cut its own context - only the predecessors are examined.
-//
-// All of those are asserted observable in `ple_parity.cpp` rather than trusted.
-#pragma once
-
-#include <cstdint>
-#include <string>
-
-namespace strata::kernels {
-
-// ---- geometry, every value confirmed against the artifact (docs/gguf-metadata.txt) ----
-inline constexpr int NG_N_EMBD = 2560;          // n_embd
-inline constexpr int PLE_HEAD_DIM = 160;        // qwen4exp.embedding_length_per_layer_input
-inline constexpr int NGRAM_SIZE = 3;            // qwen4exp.ple.ngram_size
-inline constexpr int HEADS_PER_NGRAM = 8;       // qwen4exp.ple.heads_per_ngram
-inline constexpr int PLE_N_HEADS = (NGRAM_SIZE - 1) * HEADS_PER_NGRAM;   // 16
-inline constexpr int PLE_CONV_KERNEL = 4;       // qwen4exp.ple.conv_kernel
-inline constexpr int32_t PLE_EOS_TOKEN_ID = 248044;
-inline constexpr int NG_HC = 4;                 // hyper_connection.count
-inline constexpr int NG_HC_DIM = NG_HC * NG_N_EMBD;                      // 10240
-inline constexpr int NG_HIST = (PLE_CONV_KERNEL - 1) * NGRAM_SIZE;       // 9
-inline constexpr int32_t TOKEN_NULL = -1;       // LLAMA_TOKEN_NULL
-inline constexpr float NG_RMS_EPS = 1e-6f;
-
-// The table: [160, 320001536] IQ4_NL.  ne0 = 160 is the FAST axis, so one row is 160 contiguous elements =
-// 5 blocks of 32 at 18 bytes = 90 bytes.  The head-slowest flatten then makes 16 rows exactly n_embd = 2560.
-inline constexpr uint64_t PLE_TABLE_ROWS = 320001536ull;
-inline constexpr int PLE_ROW_BYTES = (PLE_HEAD_DIM / 32) * 18;           // 90: an IQ4_NL row
-inline constexpr int PLE_ROW_BYTES_FP8 = PLE_HEAD_DIM;                   // 160: an F8_E4M3 row, one byte a value
-inline constexpr int PLE_ROW_BYTES_MAX = PLE_ROW_BYTES_FP8;
-
-/// The artifact's own hash constants, transcribed from `docs/gguf-dump-shard1.txt`:
-///
-///     layer_multipliers = [23703573157769, 20109073645365, 8052911324071]
-///     head_vocab_sizes  = [20000003, 20000023, ...]          16 entries, NOT an arithmetic sequence
-///     head_offsets      = [0, 20000003, 40000026, ...]       the running sum of head_vocab_sizes
-///
-/// `ref/ngram.py::selftest` calls its own copies "synthetic but STRUCTURALLY REAL"; they are in fact
-/// `20000003 + 10*i` for the vocab sizes, which the artifact's are not (20000003, 20000023, 20000033 - the
-/// differences are 20, 10, ...).  A selftest is free to use whatever constants it likes, but a PARITY test
-/// against the artifact must use these, and the difference is recorded because it is exactly the kind of
-/// thing that gets copied from the reference into an engine.
-struct PleConsts {
-    uint64_t mult[NGRAM_SIZE];
-    uint64_t vocab[PLE_N_HEADS];
-    uint64_t offset[PLE_N_HEADS];
-};
-PleConsts ple_artifact_consts();
-
-/// `mixed_n = (ctx[0]*m[0]) ^ (ctx[1]*m[1]) ^ ... ^ (ctx[n-1]*m[n-1])` in uint64.
-///
-/// Exposed separately so a test can assert the XOR STRUCTURE directly rather than only its consequences.
-uint64_t ngram_mixed(const int64_t* ctx, const uint64_t* mult, int n);
-
-/// The sixteen row indices per token.  `qwen4exp.cpp` L1092-1124.
-///
-///   tokens  (n_tokens,)      the ubatch's own tokens
-///   prev    (n_tokens, 2)    predecessors OLDEST FIRST, `TOKEN_NULL` where there is none
-///   out     (n_tokens, 16)   row indices into the PLE table
-///
-/// The window is built once per token and then only its PREFIXES are used, which is what makes the bigram
-/// heads (0..7) and the trigram heads (8..15) agree about the recent history.
-void ngram_rows(const int32_t* tokens, const int32_t* prev, int n_tokens, const PleConsts& c, uint32_t* out);
-
-/// The IQ4_NL codebook: `{-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113}`,
-/// which is `kvalues_iq4nl` from `ggml-common.h` L1121 and also the manifest's `codebooks.IQ4NL`.
-///
-/// There is NO `-8` in this version of ggml.  Some releases of `dequantize_row_iq4_nl` subtract 8 from the
-/// codebook value; at 3cf03257 they do not, and the difference would shift every one of the 51.2e9 elements.
-int iq4nl_code(int code);
-
-/// One 90-byte row -> 160 floats.  The canonical rule `value = cb[code] * scale + offset` with offset 0,
-/// because IQ4_NL has no min term (`has_offset` is false in the manifest).
-///
-/// THE NIBBLE ORDER IS SPLIT-HALF, NOT INTERLEAVED, and that is the trap here.  `dequantize_row_iq4_nl` is
-///     y[j]           = d * kvalues[qs[j] & 0xf];
-///     y[j + QK4_NL/2] = d * kvalues[qs[j] >> 4];
-/// so byte j carries elements j and j+16 - NOT 2j and 2j+1, which is the natural reading and which produces
-/// a perfectly plausible embedding of the wrong 160 values.
-void iq4nl_dequant_row(const uint8_t* row, float* out160);
-
-/// One FP8 row -> 160 floats: each byte an E4M3 value (the "fn" variant: no infinities, 0x7F/0xFF are NaN), times the
-/// table's one scale. This is the table as Qwen3.8-Flash-Next ships it (`...ngram_embedding.shard_k`, F8_E4M3, and
-/// `weight_scale`), kept byte for byte by tools/ple_fp8_pack.py; IQ4_NL is 8% off it per row.
-void fp8_e4m3_dequant_row(const uint8_t* row, float scale, float* out160);
-
-/// How the table's rows are read (plan v0.3 P2). `Direct` is the default: unbuffered 4 KiB reads from the SSD,
-/// so the table never occupies RAM or the OS file cache. `Mmap` is the earlier memory-mapped path, kept as the
-/// A/B arm; it returns the same bytes.
-///
-/// NEVER KEEP THE SHARD MAPPED WHILE READING IT DIRECT: a live section on the same file serializes the unbuffered
-/// reads (311 -> 1,575 us per token, bench/results/2026-09-23-p2-ssd-direct). Direct mode drops its own mapping
-/// after the header parse; nothing else in the process may hold one.
-enum class PleIo { Direct, Mmap };
-
-struct PleIoOptions {
-    PleIo mode = PleIo::Direct;
-    uint32_t max_inflight = 256;     ///< outstanding SSD reads (decode needs 16; a prompt chunk saturates the SSD at 256)
-    uint64_t cache_rows = 1u << 20;  ///< bounded row cache: 1,048,576 rows x 90 B ~ 95 MB; 0 disables
-    bool io_thread = true;           ///< reads submitted by a worker thread, not the caller
-    /// Mmap mode only (`--ple-io ram`): lock the whole mapped table in RAM at open, so no SSD read ever sits on
-    /// the prompt or token path. Needs RAM for the full table. POSIX only (mlock); `locked()` reports the outcome.
-    bool lock = false;
-    /// Direct mode with the I/O worker only: keep the SSD awake while rows are asked for - one page of the table
-    /// after this long without a read (0 = off), until `keepalive_window_s` after the last request for rows
-    /// (see PleReader::set_keepalive).
-    double keepalive_ms = 0;
-    double keepalive_window_s = 60;
-};
-
-/// The PLE table.  Held by pointer-to-impl so this header does not drag `<windows.h>` into every
-/// translation unit that wants the hash.
-class PleTable {
-public:
-    PleTable();
-    ~PleTable();
-    PleTable(const PleTable&) = delete;
-    PleTable& operator=(const PleTable&) = delete;
-
-    /// Open with an explicit I/O mode. The two-argument `open` below is the default (Direct).
-    bool open(const std::string& gguf_path, std::string& err, const PleIoOptions& io);
-
-    /// The split the plan asks for: `issue` as soon as the token id is known, `collect` just before layer 1
-    /// needs the rows. `gather` is `issue` followed by `collect`. In Mmap mode `issue` only prefetches.
-    bool issue(const uint32_t* rows16);
-    bool collect(float* out2560, std::string& err);
-    /// Plan v0.3 P5: the rows of `n_tokens` tokens (16 each, `rows` token-major) into `out` (2560 floats per token),
-    /// as ONE reader request - page dedupe and sort across the whole batch, the reader's full queue depth.  Not
-    /// while a single-token `issue` is pending.  The mapped mode gathers row by row.
-    bool gather_batch(const uint32_t* rows, size_t n_tokens, float* out, std::string& err);
-
-    /// Fault injection (Direct mode): every row read completes no earlier than `us` after issue.
-    void set_injected_delay_us(double us);
-
-    /// Maps the ORIGINAL second GGUF shard read-only.  The tensor's data does NOT start at file offset 0:
-    /// the manifest's `shard2_tensor.offset` is relative to the GGUF's DATA SECTION, and the header before it
-    /// is 192 bytes.  Reading at 0 would silently decode the header plus 192 bytes of shifted rows - still
-    /// plausible IQ4_NL, which is why the reader takes the offset from a real GGUF parse (`GgufFile`, the
-    /// project's validated reader) and checks that the tensor exactly fills the rest of the file.
-    bool open(const std::string& gguf_path, std::string& err);
-    void close();
-    bool is_open() const;
-    /// True when `PleIoOptions::lock` was asked for and mlock succeeded (false: pages only pre-touched).
-    bool locked() const;
-    uint64_t rows() const;
-    /// "IQ4_NL" or "F8_E4M3" (a GGUF from tools/ple_fp8_pack.py: type I8, strata.ple.format = f8_e4m3).
-    const char* format() const;
-
-    /// 16 row indices -> 2560 floats.  The gathered rows are flattened HEAD-SLOWEST: row h's 160 values
-    /// occupy `out[h*160, (h+1)*160)`, which is what `ggml_get_rows` does and what makes the result a plain
-    /// n_embd-wide vector for the block that consumes it.
-    void gather(const uint32_t* rows16, float* out2560) const;
-
-    /// One row -> 160 floats, for diagnostics and for the parity test's oracle comparison.
-    void read_row(uint32_t row, float* out160) const;
-
-    /// Bytes actually touched since `open`, for the "how often is it not ready" measurement P2.S4 asks for.
-    uint64_t bytes_read() const;
-
-    /// One line of reader statistics (Direct mode), e.g. for --stats. Empty in Mmap mode.
-    std::string io_report() const;
-    PleIo mode() const;
-
-private:
-    struct Impl;
-    Impl* impl_ = nullptr;
-};
-
-// ================================ THE PLE GATHER'S PREFETCH, AND ITS A/B ARM ================================
-//
-// `gather` issues its sixteen row reads as sixteen SEPARATE page faults into a 26.8 GB mapping, which measured
-// **2.10-2.61 ms per token** and is second only to the layer loop among the token's avoidable terms. The table
-// is 90 B per row, so the sixteen rows are 1,440 B - 0.5 MB/s, which is latency and not bandwidth, and it is
-// because the sixteen pages are taken one at a time. `PrefetchVirtualMemory` issues them in one call.
-//
-// **THIS SWITCH EXISTS SO THE CLAIM CAN BE MEASURED RATHER THAN ASSERTED.** Cross-build comparisons in this
-// project have repeatedly turned out to be machine drift - `LAYERS` alone moves 48.9 -> 52.3 between runs of
-// one binary - so the two arms are alternated inside one session. Off is `--no-ple-prefetch`.
-void ple_prefetch_enable(bool on);
-bool ple_prefetch_enabled();
-
-// ---- NOTE ON `madvise(MADV_RANDOM)` ------------------------------------------------------------------
-// P2.S4 asks for `madvise(MADV_RANDOM)` on the mapping, and on Linux that is exactly right: a token gathers
-// 16 rows scattered over 28.8 GB, so read-ahead is pure waste and would evict useful pages.
-//
-// THERE IS NO LINUX, SO THERE IS NO MADV_RANDOM HERE.  Windows has no equivalent of the advice - the closest
-// is `FILE_FLAG_RANDOM_ACCESS` at CreateFile time, which suppresses the cache-manager's read-ahead for the
-// whole handle, and `PrefetchVirtualMemory` for the positive case.  `GgufFile` opens with neither, so this
-// build gets the DEFAULT sequential read-ahead on a random access pattern.  Saying so is the point: a
-// comment claiming MADV_RANDOM here would be a comment about code that does not run.  On Linux the advice
-// belongs in `GgufFile::open`, which this module does not own.
-// ------------------------------------------------------------------------------------------------------
-
-}  // namespace strata::kernels
diff --git a/sycl/include/strata/kernels/sampler.hpp b/sycl/include/strata/kernels/sampler.hpp
index 6bbc16d5a83..ed6eae1eb13 100644
--- a/sycl/include/strata/kernels/sampler.hpp
+++ b/sycl/include/strata/kernels/sampler.hpp
@@ -43,6 +43,11 @@ struct SamplerParams {
 void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
                    const SamplerParams& p, int* out, void* stream);
 
+// The greedy pick (no penalties) on a thread-block cluster of 8 CTAs per row (sm_90+, CUDA; S19): the same token as
+// sample_tokens' one-block argmax, which takes it unless STRATA_ARGMAX_MULTI=0.  False (nothing launched) where it
+// cannot run: HIP, a card or a build below sm_90.  Device pointers; capturable.
+bool sample_greedy_cluster(const float* logits, int n_tokens, int n_vocab, int* out, void* stream);
+
 // ---- COUPLED DRAFT SAMPLING (include/strata/core/coupled_draft.hpp, STRATA_SPEC_COUPLED=1).  Device pointers
 // throughout; every per-request / per-round value comes from device memory, so the calls can be captured.
 //
diff --git a/sycl/include/strata/prefill/kernels.hpp b/sycl/include/strata/prefill/kernels.hpp
deleted file mode 100644
index bc4187a44f1..00000000000
--- a/sycl/include/strata/prefill/kernels.hpp
+++ /dev/null
@@ -1,97 +0,0 @@
-// include/strata/prefill/kernels.hpp - plan v0.3 P5: the element-wise and stateful kernels of a prompt chunk.
-//
-// T tokens at a time, all row-major with the token as the slow index.  The arithmetic mirrors the per-token native
-// kernels (the decode path), batched; where a step is a recurrence in time (the GDN conv and state, the PLE conv)
-// the kernel walks the chunk's tokens in order inside one launch.
-#pragma once
-
-#include "strata/kernels/kv_stream.hpp"
-#include "strata/kernels/rope_scaling.hpp"
-
-#include <cstdint>
-
-namespace strata::prefill {
-
-// ---- hyper-connection (n_embd 2560, hc 4, hc_lr 320)
-/// xn[t, c*2560 + d] = R[t,c,d] * rsqrt(mean_d R[t,c,:]^2 + eps) * w_norm[c*2560 + d]; also its BF16 image.
-/// `xn16_lo` (null: none) takes bf16(x - xn16): W.xn16 + W.xn16_lo is the product with ~16 mantissa bits of x.
-void gr_norm(const float* R, const float* w_norm, float eps, float* xn, uint16_t* xn16, int64_t T, void* stream,
-             uint16_t* xn16_lo = nullptr);
-/// F-1: gr_norm without its FP32 output: the row scales rs[t*4 + c] and the BF16 image; gr_mix_r then reads R.
-void gr_norm_rs(const float* R, const float* w_norm, float eps, float* rs, uint16_t* xn16, int64_t T, void* stream,
-                uint16_t* xn16_lo = nullptr);
-/// gr_mix with xn recomputed from R, rs and w_norm exactly as gr_norm computes it (the same bits).
-void gr_mix_r(const float* R, const float* rs, const float* w_norm, const float* gated, float* mixed, uint16_t* mixed16,
-              int64_t T, void* stream, uint16_t* mixed_h = nullptr, uint16_t* mixed16_lo = nullptr);
-/// F-2: gr_write, then gr_norm_rs of the next half (its norm weights) over the rows just written - the same bits as
-/// the two calls, without reading R back.
-void gr_write_norm_rs(float* R, const float* bo, const float* inj, int64_t inj_ld, const float* w_norm_next, float eps,
-                      float* rs, uint16_t* xn16, int64_t T, void* stream, uint16_t* xn16_lo = nullptr);
-/// lo16[t, k] = bf16(silu(lo[t, k] / hc))
-void gr_silu(const float* lo, uint16_t* lo16, int64_t T, void* stream, uint16_t* lo16_lo = nullptr);
-/// mixed[t, d] = mean_c xn[t, c, d] * sigmoid(gated[t, c, d]); FP32, BF16 and FP16 (either image may be null).
-void gr_mix(const float* xn, const float* gated, float* mixed, uint16_t* mixed16, int64_t T, void* stream,
-            uint16_t* mixed_h = nullptr, uint16_t* mixed16_lo = nullptr);
-/// R[t, c, d] += bo[t, d] * 2 sigmoid(inj[t, c] / hc)   (inj has row stride inj_ld)
-void gr_write(float* R, const float* bo, const float* inj, int64_t inj_ld, int64_t T, void* stream);
-/// R[t, c, :] = e[t, :] for all four streams (the embedding broadcast).
-void gr_broadcast(const float* e, float* R, int64_t T, void* stream);
-
-// ---- GDN (state 128, 16 k heads, 48 v heads, 10240 conv channels, 4 taps)
-/// gate[t,h] = softplus(ab[t,h] + dt[h]) * ssm_a[h];  beta[t,h] = sigmoid(ab[t, 48 + h])  (ab: [T, 96])
-void gdn_gates(const float* ab, const float* dt, const float* ssm_a, float* gate, float* beta, int64_t T, void* stream);
-/// The 4-tap causal conv + SiLU over the chunk (history [C][3] in, updated to the chunk's last three inputs), then
-/// the L2 norm of the q and k heads of every token.  h: [T, C].
-void gdn_conv(float* history, const float* qkv, const float* conv_w, float* h, int64_t T, float eps, void* stream);
-/// The recurrence over the chunk, state in registers; y16[t] = rmsnorm(o) * gamma * sigmoid(z) in FP16 (what the
-/// out projection reads); y is FP32 scratch.
-void gdn_recurrence(float* state, const float* h, const float* gate, const float* beta, const float* z,
-                    const float* gamma, float eps, float* y, uint16_t* y16, int64_t T, void* stream);
-
-// ---- MoE
-/// softmax over 512, top-10 (ties to the lower id), weights renormalised over the ten (the native router).
-void route(const float* logits, int32_t* ids, float* weights, int64_t T, int64_t n_expert, void* stream);
-/// Expert blob (Strata pack layout, Q2_0) -> BF16 matrices: gate/up interleaved [1280, 2560], down [2560, 640].
-void blob_dequant(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream);
-/// h16[n, r] = fp16(silu(gu[n, 2r]) * gu[n, 2r + 1])   (the interleaved expert gate/up)
-void swiglu_interleaved(const float* gu, uint16_t* h16, int64_t n, void* stream);
-/// h16[n, r] = fp16(silu(g[n, r]) * u[n, r])   (the shared expert, gate and up separate, width 640)
-void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void* stream);
-/// dst[i] = src[i] for n int32s, as a kernel: either side may be mapped host memory, and the copy never waits
-/// behind the copy engine's queue (the prompt path's grouping tables, while the expert stream fills it).
-void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream);
-/// Gather rows: dst16[i, :] = x16[src[i], :] (n rows of `width` BF16).
-void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int64_t n, int64_t width, void* stream);
-/// bo[t, :] = shared[t, :] * sigmoid(sg[t]) + sum_k w[t, k] * D[slot[t, k], :]
-void moe_combine(const float* D, const int32_t* slot, const float* w, const float* shared, const float* sg, float* bo,
-                 int64_t T, void* stream);
-
-// ---- QSA helpers
-/// In place: x[r, :] = x[r, :] * rsqrt(mean x^2 + eps) * w  over rows of `cols` (row stride `ld`).
-void rms_rows(float* x, const float* w, int64_t rows, int64_t cols, int64_t ld, float eps, void* stream);
-/// NEOX rotary on the first 64 dims of each head: x [T, heads, dim] at positions pos0 + t.  The rope
-/// scaling (rope_scaling.hpp) rides in as the process config - none is today's arithmetic exactly.
-void rope(float* x, int64_t T, int64_t heads, int64_t dim, int64_t ld, int64_t pos0,
-          const strata::kernels::RopeScaling& scaling, void* stream);
-/// q_full [T, 24, 512] (q | gate per head) -> q [T, 24, 256]
-void split_q(const float* q_full, float* q, int64_t T, void* stream);
-/// attn[t, h, d] *= sigmoid(q_full[t, h, 256 + d]) -> out16 (fp16 bits: the o-projection is quantized)
-void gate_attn(const float* attn, const float* q_full, uint16_t* out16, int64_t T, void* stream);
-
-/// K and V of T consecutive cells (positions pos0..pos0+T-1; K normed and rotated) into the paged pools: FP16
-/// (`k_pool`/`v_pool`) or INT8 codes + FP16 scale per 64 (`k_q`...), the decode append's arithmetic.
-/// K, V: [T, 2, 256].
-void kv_append(const float* K, const float* V, int64_t T, int64_t pos0, const int32_t* page_table, int64_t page_size,
-               uint16_t* k_pool, uint16_t* v_pool, int8_t* k_q, int8_t* v_q, uint16_t* k_scale, uint16_t* v_scale,
-               void* stream, const strata::kernels::KvHostPools* host = nullptr,
-               const strata::kernels::KvHostPools* stage = nullptr);
-
-/// fp32 -> fp16 bits and fp32 -> bf16, n elements (the two activation images of the prompt GEMMs).
-void to_f16(const float* x, uint16_t* y, int64_t n, void* stream);
-void to_bf16(const float* x, uint16_t* y, int64_t n, void* stream, uint16_t* ylo = nullptr);
-/// y = fp32(fp16(x)): what an FP16 store of x would read back (the FP16 indexer-key experiment)
-void round_f16(const float* x, float* y, int64_t n, void* stream);
-/// Expert blob -> FP16 (Q2_0 values are exact in FP16).
-void blob_dequant_f16(const uint8_t* blob, uint16_t* gu16, uint16_t* down16, void* stream);
-
-}  // namespace strata::prefill
diff --git a/sycl/src/core/device.dp.cpp b/sycl/src/core/device.dp.cpp
index a01a6cb6388..09485d57473 100644
--- a/sycl/src/core/device.dp.cpp
+++ b/sycl/src/core/device.dp.cpp
@@ -141,6 +141,97 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+}  // namespace strata::core
+
+#if defined(STRATA_USE_HIP) && defined(_WIN32)
+// The free VRAM figure on Windows HIP (include/strata/hip_compat/cuda_runtime.h maps cudaMemGetInfo here).
+//
+// hipMemGetInfo (ROCclr's PAL backend, Device::globalFreeMemory) is the card's size minus this process's own
+// allocations: it asks Windows for this process's usage only, never for what the desktop and other programs hold.
+// So on a card that also drives the desktop the engine counted ~930 MiB that was not there, the expert cache filled
+// the card, and WDDM moved memory out to system RAM: decode at 30 tok/s instead of 41 (RX 6800, HIP SDK 7.2).
+// Windows itself gives each process a video memory budget (DXGI QueryVideoMemoryInfo) that does account for the
+// others.  Measured on that card: the budget sits 0.8 GiB below the card's size while this process is small and
+// 1.8 GiB below once it holds 11 GiB; allocations past it still succeed, and are what Windows moves out.  The
+// free figure here is hipMemGetInfo's lowered by what the budget withholds (the card's size minus the budget).
+// Subtracting from HIP's own figure, rather than taking the budget minus DXGI's usage, keeps memory the HIP runtime
+// has freed and holds in its cache counted as free, as hipMemGetInfo counts it.  dxgi.dll is loaded at run time, so
+// nothing new is linked; when it or the card's adapter cannot be found, hipMemGetInfo's figure stands.
+#ifndef WIN32_LEAN_AND_MEAN
+#define WIN32_LEAN_AND_MEAN
+#endif
+#ifndef NOMINMAX
+#define NOMINMAX
+#endif
+#include <windows.h>
+#include <dxgi1_4.h>
+#include <atomic>
+#include <cstdlib>
+#include <mutex>
+
+namespace strata::hip_compat {
+namespace {
+IDXGIAdapter3* budget_adapter(int device) {
+    constexpr int kMaxDevices = 16;
+    static std::mutex mu;
+    static IDXGIAdapter3* adapters[kMaxDevices] = {};
+    static bool tried[kMaxDevices] = {};
+    if (device < 0 || device >= kMaxDevices) return nullptr;
+    std::lock_guard<std::mutex> lock(mu);
+    if (tried[device]) return adapters[device];
+    tried[device] = true;
+    hipDeviceProp_t p{};
+    if (hipGetDeviceProperties(&p, device) != hipSuccess) {
+        (void) hipGetLastError();
+        return nullptr;
+    }
+    LUID luid{};
+    std::memcpy(&luid, p.luid, sizeof luid);
+    using CreateFactory = HRESULT(WINAPI*)(REFIID, void**);
+    static HMODULE dxgi = LoadLibraryW(L"dxgi.dll");   // kept for the process' lifetime, like the adapters
+    const auto create = dxgi ? (CreateFactory) (void*) GetProcAddress(dxgi, "CreateDXGIFactory1") : nullptr;
+    IDXGIFactory4* factory = nullptr;
+    if (create == nullptr || FAILED(create(__uuidof(IDXGIFactory4), (void**) &factory))) return nullptr;
+    IDXGIAdapter3* adapter = nullptr;
+    if (FAILED(factory->EnumAdapterByLuid(luid, __uuidof(IDXGIAdapter3), (void**) &adapter))) adapter = nullptr;
+    factory->Release();
+    adapters[device] = adapter;
+    return adapter;
+}
+}  // namespace
+
+hipError_t mem_get_info(size_t* free_bytes, size_t* total_bytes) {
+    const hipError_t e = hipMemGetInfo(free_bytes, total_bytes);
+    static const bool off = [] {
+        const char* v = std::getenv("STRATA_WDDM_BUDGET");
+        return v != nullptr && std::atoi(v) == 0;
+    }();
+    if (e != hipSuccess || off || free_bytes == nullptr || total_bytes == nullptr) return e;
+    int device = 0;
+    if (hipGetDevice(&device) != hipSuccess) {
+        (void) hipGetLastError();
+        return e;
+    }
+    IDXGIAdapter3* adapter = budget_adapter(device);
+    DXGI_QUERY_VIDEO_MEMORY_INFO local{};
+    if (adapter == nullptr || FAILED(adapter->QueryVideoMemoryInfo(0, DXGI_MEMORY_SEGMENT_GROUP_LOCAL, &local)) ||
+        local.Budget == 0 || local.Budget >= *total_bytes)
+        return e;
+    const size_t withheld = *total_bytes - (size_t) local.Budget;   // the desktop's and other programs' share
+    static std::atomic<bool> said{false};
+    if (!said.exchange(true)) {
+        std::fprintf(stderr, "strata: Windows budgets %llu of this card's %llu MiB for this process; free VRAM is "
+                             "counted within that (STRATA_WDDM_BUDGET=0: off)\n",
+                     (unsigned long long) (local.Budget >> 20), (unsigned long long) (*total_bytes >> 20));
+    }
+    *free_bytes = *free_bytes > withheld ? *free_bytes - withheld : 0;
+    return e;
+}
+}  // namespace strata::hip_compat
+#endif
+
+namespace strata::core {
+
 std::string gpu_arch_problem(int ordinal) {
 #if defined(STRATA_USE_HIP)
     int count = 0;
@@ -323,8 +414,8 @@ DeviceArena::DeviceArena(uint64_t bytes, int ordinal, bool poison)
                 });
             }
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             check(0, "poison_kernel");
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
index ac0459beee9..e60d1fae05c 100644
--- a/sycl/src/core/expert_cache.cpp
+++ b/sycl/src/core/expert_cache.cpp
@@ -5,7 +5,9 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/core/expert_cache.hpp"
 
+#include <algorithm>
 #include <cstdio>
+#include <filesystem>
 #include <utility>
 #include <cstring>
 
@@ -69,6 +71,77 @@ bool read_expert_profile(const std::string& path, int64_t n_layers, int64_t n_ex
     return true;
 }
 
+std::vector<std::pair<int32_t, int32_t>> rank_learned_profile(int64_t n_layers, int64_t n_expert,
+                                                              const std::vector<uint8_t>& resident,
+                                                              const std::vector<double>& heat,
+                                                              const std::vector<std::pair<int32_t, int32_t>>& prior) {
+    const size_t n = (size_t) (n_layers * n_expert);
+    std::vector<int64_t> prior_rank(n, INT64_MAX);
+    for (size_t r = 0; r < prior.size(); ++r) {
+        const auto [l, e] = prior[r];
+        if (l >= 0 && l < n_layers && e >= 0 && e < n_expert) {
+            int64_t& pr = prior_rank[(size_t) (l * n_expert + e)];
+            if (pr == INT64_MAX) pr = (int64_t) r;
+        }
+    }
+    std::vector<int64_t> order(n);
+    for (size_t i = 0; i < n; ++i) order[i] = (int64_t) i;
+    auto res = [&](int64_t i) { return (size_t) i < resident.size() && resident[(size_t) i] != 0; };
+    auto ht = [&](int64_t i) { return (size_t) i < heat.size() ? heat[(size_t) i] : 0.0; };
+    std::stable_sort(order.begin(), order.end(), [&](int64_t a, int64_t b) {
+        if (res(a) != res(b)) return res(a);
+        if (ht(a) != ht(b)) return ht(a) > ht(b);
+        if (prior_rank[(size_t) a] != prior_rank[(size_t) b]) return prior_rank[(size_t) a] < prior_rank[(size_t) b];
+        return a < b;
+    });
+    std::vector<std::pair<int32_t, int32_t>> ranked(n);
+    for (size_t r = 0; r < n; ++r)
+        ranked[r] = {(int32_t) (order[r] / n_expert), (int32_t) (order[r] % n_expert)};
+    return ranked;
+}
+
+bool write_expert_profile(const std::string& path, int64_t n_layers, int64_t n_expert,
+                          const std::vector<std::pair<int32_t, int32_t>>& ranked, std::string& err) {
+    if (n_layers <= 0 || n_expert <= 0 || n_layers > 65535 || n_expert > 65535) {
+        err = "write_expert_profile: the model's layout does not fit the format";
+        return false;
+    }
+    std::vector<int32_t> table((size_t) (n_layers * n_expert), -1);
+    std::vector<uint16_t> pairs;
+    pairs.reserve(ranked.size() * 2);
+    for (size_t r = 0; r < ranked.size(); ++r) {
+        const auto [l, e] = ranked[r];
+        if (l < 0 || l >= n_layers || e < 0 || e >= n_expert) {
+            err = "write_expert_profile: a ranked pair is out of range";
+            return false;
+        }
+        table[(size_t) (l * n_expert + e)] = (int32_t) r;
+        pairs.push_back((uint16_t) l);
+        pairs.push_back((uint16_t) e);
+    }
+    const uint32_t hdr[5] = {1u, (uint32_t) n_layers, (uint32_t) n_expert, (uint32_t) ranked.size(),
+                             (uint32_t) ranked.size()};
+    const std::string tmp = path + ".tmp";
+    std::FILE* f = std::fopen(tmp.c_str(), "wb");
+    if (f == nullptr) {
+        err = "write_expert_profile: cannot create " + tmp;
+        return false;
+    }
+    // the format is little-endian (make_profile.py's "<"): so is every machine this engine runs on
+    bool ok = std::fwrite("STRP", 1, 4, f) == 4 && std::fwrite(hdr, 4, 5, f) == 5 &&
+              (pairs.empty() || std::fwrite(pairs.data(), 2, pairs.size(), f) == pairs.size()) &&
+              std::fwrite(table.data(), 4, table.size(), f) == table.size();
+    ok = (std::fclose(f) == 0) && ok;
+    std::error_code ec;
+    if (ok) std::filesystem::rename(tmp, path, ec);   // replaces an existing file (MoveFileEx / rename(2))
+    if (!ok || ec) {
+        std::filesystem::remove(tmp, ec);
+        err = "write_expert_profile: cannot write " + path;
+        return false;
+    }
+    return true;
+}
+
 ExpertCache::~ExpertCache() { close(); }
 
 #if defined(STRATA_USE_HIP)
@@ -140,8 +213,8 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
             real error-handling function.
             */
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             (double)want / 1073741824.0, dpct::get_error_string_dummy(0));
@@ -360,9 +433,9 @@ bool ExpertCache::fill_slot_blocking(int32_t slot, const uint8_t *host_blob,
     const cudaError_t e = cudaMemcpy(dst, blocking_staging_, n, cudaMemcpyHostToDevice);
 #else
     /*
-    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming in
-    the original code the source host memory is pageable memory. If the memory
-    is not pageable, call wait() on event return by memcpy API to ensure
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
     synchronization behavior.
     */
     const dpct::err0 e =
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index 645b2cfb6c0..4e423e99e0d 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -5,6 +5,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/core/expert_source.hpp"
 #include "strata/core/remote_experts.hpp"
+#include "strata/core/peer_experts.hpp"
 #include "strata/kernels/cpu/expert_layout.hpp"
 #include "strata/artifact/gguf_reader.hpp"
 
@@ -428,6 +429,7 @@ bool FileExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64
     file_ = f;
     mapping_ = m;
     base_ = (const uint8_t*) view;
+    paths_.assign(1, path);
 #else
     const int fd = ::open(path.c_str(), O_RDONLY);
     if (fd < 0) { err = "FileExpertSource: cannot open " + path; return false; }
@@ -516,6 +518,12 @@ void FileExpertSource::close() {
     }
     role_ptr_.clear();
     role_bytes_.clear();
+    role_file_.clear();
+    paths_.clear();
+#if defined(_WIN32)
+    for (void* h : direct_) CloseHandle((HANDLE) h);
+#endif
+    direct_.clear();
     {
         std::lock_guard<std::mutex> lk(stage_mu_);
         stage_buf_.clear();
@@ -581,6 +589,7 @@ bool FileExpertSource::open_gguf(std::string& err) {
     std::map<std::string, size_t> index;
     role_ptr_.assign((size_t) (3 * n_layers_), nullptr);
     role_bytes_.assign((size_t) (3 * n_layers_), 0);
+    role_file_.assign((size_t) (3 * n_layers_), 0);
     for (int64_t l = 0; l < n_layers_; ++l) {
         const auto& fm = lay.fmt[(size_t) l];
         const uint64_t per[3] = {fm.up_off, fm.up_off, lay.bytes[(size_t) l] - fm.down_off};
@@ -630,9 +639,11 @@ bool FileExpertSource::open_gguf(std::string& err) {
                 m.base = (const uint8_t*) view;
 #endif
                 maps_.push_back(m);
+                paths_.push_back(path);
                 it = index.emplace(path, maps_.size() - 1).first;
             }
             const Map& m = maps_[it->second];
+            role_file_[i] = (int) it->second;
             const uint64_t at = lay.gguf_off[i], bytes = per[r] * (uint64_t) n_expert_;
             if (at > m.bytes || bytes > m.bytes - at) {   // check_experts_gguf proved it; the mapping must agree
                 err = "FileExpertSource: an expert span runs past the end of " + path;
@@ -650,6 +661,10 @@ bool FileExpertSource::open_gguf(std::string& err) {
 
 bool FileExpertSource::copy_from_files(int64_t layer, int64_t expert, uint8_t* dst) const {
     if (dst == nullptr || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
+    if (!direct_.empty()) {   // #286: from the drive; a failed read falls back to the mapping below
+        const Fill f{0, layer, expert, dst};
+        if (read_direct(&f, 1)) return true;
+    }
     if (!role_ptr_.empty()) {
         uint64_t at = 0;
         for (int r = 0; r < 3; ++r) {
@@ -720,7 +735,11 @@ bool FileExpertSource::claim_stage(int64_t key, size_t& v, bool& fill) {
 bool FileExpertSource::fill_stage(size_t v, int64_t layer, int64_t expert, uint8_t* dst) {
     const auto t0 = std::chrono::steady_clock::now();
     const bool ok = copy_from_files(layer, expert, dst);
-    const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count();
+    publish_stage(v, layer, ok, std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count());
+    return ok;
+}
+
+void FileExpertSource::publish_stage(size_t v, int64_t layer, bool ok, double us) {
     file_us_.fetch_add((uint64_t) us, std::memory_order_relaxed);
     if (ok) {
         file_read_bytes_.fetch_add(layer_blob_bytes_[(size_t) layer], std::memory_order_relaxed);
@@ -735,7 +754,6 @@ bool FileExpertSource::fill_stage(size_t v, int64_t layer, int64_t expert, uint8
         }
     }
     stage_cv_.notify_all();
-    return ok;
 }
 
 const uint8_t* FileExpertSource::staged_blob(int64_t layer, int64_t expert) {
@@ -759,8 +777,7 @@ const uint8_t* FileExpertSource::staged_blob(int64_t layer, int64_t expert) {
 }
 
 void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n) {
-    if (role_ptr_.empty() || n <= 0 || layer < 0 || layer >= n_layers_) return;
-    struct Fill { size_t v; int64_t e; uint8_t* dst; };
+    if (!staged() || n <= 0 || layer < 0 || layer >= n_layers_) return;
     std::vector<Fill> todo;
     {
         std::lock_guard<std::mutex> lk(stage_mu_);
@@ -774,7 +791,7 @@ void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n
             size_t v = 0;
             bool fill = false;
             if (!claim_stage(layer * n_expert_ + e, v, fill) && fill) {
-                todo.push_back({v, e, stage_buf_[v].get()});
+                todo.push_back({v, layer, e, stage_buf_[v].get()});
                 if (warm_stamp_) {
                     const uint32_t s = warm_stamp_[index].load(std::memory_order_relaxed);
                     if (s != 0 && (uint64_t) s + 3 >= epoch_ + 1) warm_hits_.fetch_add(1, std::memory_order_relaxed);
@@ -782,7 +799,52 @@ void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n
             }
         }
     }
+    fill_many(todo);
+}
+
+void FileExpertSource::prefetch_pairs(const std::pair<int32_t, int32_t>* pairs, int64_t n) {
+    if (direct_.empty() || pairs == nullptr || n <= 0) return;   // unbuffered only: the mapped fill stays as it was
+    std::vector<Fill> todo;
+    {
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        for (int64_t i = 0; i < std::min<int64_t>(n, 64); ++i) {
+            const int64_t l = pairs[i].first, e = pairs[i].second;
+            if (l < 0 || e < 0 || l >= n_layers_ || e >= n_expert_) continue;
+            size_t v = 0;
+            bool fill = false;
+            if (!claim_stage(l * n_expert_ + e, v, fill) && fill) todo.push_back({v, l, e, stage_buf_[v].get()});
+        }
+    }
+    fill_many(todo);
+}
+
+void FileExpertSource::fill_many(const std::vector<Fill>& todo) {
     if (todo.empty()) return;
+    if (!direct_.empty()) {
+        // #286: overlapped batches - every role window of 16 blobs in flight at once; a big batch (the profile
+        // fill) on up to 4 threads, a decode layer's few misses on this one
+        std::atomic<size_t> next{0};
+        auto work = [&] {
+            for (size_t at; (at = next.fetch_add(16)) < todo.size();) {
+                const size_t k = std::min<size_t>(16, todo.size() - at);
+                const auto t0 = std::chrono::steady_clock::now();
+                const bool ok = read_direct(todo.data() + at, k);
+                const double us = std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count();
+                for (size_t i = at; i < at + k; ++i) {
+                    const Fill& f = todo[i];
+                    // a failed batch: each blob again on its own (copy_from_files falls back to the mapping)
+                    if (ok) publish_stage(f.v, f.layer, true, us / (double) k);
+                    else (void) fill_stage(f.v, f.layer, f.e, f.dst);
+                }
+            }
+        };
+        const size_t nt = std::min<size_t>(4, (todo.size() + 15) / 16);
+        std::vector<std::thread> th;
+        for (size_t t = 1; t < nt; ++t) th.emplace_back(work);
+        work();
+        for (auto& t : th) t.join();
+        return;
+    }
 #if defined(_WIN32)
     // One PrefetchVirtualMemory call for every slice about to be copied: the memory manager reads them in large
     // requests, all queued at once, where the copies' page faults would read a few clusters each.  The copies below
@@ -799,7 +861,7 @@ void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n
             ranges.reserve(todo.size() * 3);
             for (const Fill& f : todo)
                 for (int r = 0; r < 3; ++r) {
-                    const size_t i = (size_t) (3 * layer + r);
+                    const size_t i = (size_t) (3 * f.layer + r);
                     ranges.push_back({(PVOID) (role_ptr_[i] + (size_t) ((uint64_t) f.e * role_bytes_[i])),
                                       (SIZE_T) role_bytes_[i]});
                 }
@@ -811,7 +873,7 @@ void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n
     std::atomic<size_t> next{0};
     auto work = [&] {
         for (size_t i; (i = next.fetch_add(1)) < todo.size();)
-            (void) fill_stage(todo[i].v, layer, todo[i].e, todo[i].dst);
+            (void) fill_stage(todo[i].v, todo[i].layer, todo[i].e, todo[i].dst);
     };
     const size_t nt = std::min<size_t>(todo.size(), (size_t) fetch_threads_);
     std::vector<std::thread> th;
@@ -820,6 +882,159 @@ void FileExpertSource::prefetch(int64_t layer, const int64_t* experts, int64_t n
     for (auto& t : th) t.join();
 }
 
+bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
+#if defined(_WIN32)
+    if (base_ == nullptr || paths_.empty() || !direct_.empty()) {
+        why = !direct_.empty() ? "already unbuffered" : "no expert files open";
+        return !direct_.empty();
+    }
+    if (!experts_unbuffered(paths_, ram_bytes, why, /*cache_counts=*/false)) return false;
+    for (const std::string& path : paths_) {
+        const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
+        std::vector<wchar_t> w((size_t) (wide > 0 ? wide : 1), L'\0');
+        if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, w.data(), wide);
+        HANDLE h = CreateFileW(w.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                               FILE_FLAG_NO_BUFFERING | FILE_FLAG_OVERLAPPED, nullptr);
+        if (h == INVALID_HANDLE_VALUE) {
+            why += "; cannot open " + path + " unbuffered (error " + std::to_string((unsigned long long) GetLastError()) +
+                   "), read through the file cache";
+            for (void* d : direct_) CloseHandle((HANDLE) d);
+            direct_.clear();
+            return false;
+        }
+        direct_.push_back(h);
+    }
+    if (role_ptr_.empty()) {   // experts.bin: blob() now assembles into the stage buffers, sized for the largest blob
+        std::lock_guard<std::mutex> lk(stage_mu_);
+        for (uint64_t b : layer_blob_bytes_) stage_blob_ = std::max(stage_blob_, b);
+    }
+    return true;
+#else
+    (void) ram_bytes;
+    why = "through the file cache (not Windows)";
+    return false;
+#endif
+}
+
+bool FileExpertSource::read_direct(const Fill* fills, size_t n) const {
+#if defined(_WIN32)
+    // NTFS runs the unbuffered reads of a file one at a time while the file is mapped or cached anywhere (the engine
+    // maps the GGUF shards for the token embedding and the PLE table): measured on a PCIe 5 drive, 512 KiB reads at
+    // queue depth 48 make 10.4 GB/s on a file nobody maps and 3.4 GB/s on a mapped one, 8 MiB reads 8.6 GB/s.  So
+    // windows less than kGap apart (the same role of nearby experts) are merged into requests of up to kMerge bytes.
+    constexpr uint64_t kSector = 4096, kGap = 1ull << 20, kMerge = 32ull << 20;
+    struct Window { int file; uint64_t a0, size, skip, n, at; uint8_t* dst; size_t req; uint64_t in_req; };
+    struct Req { HANDLE h; uint64_t a0, size, pos; };
+    // this thread's aligned buffer and events, kept for its next batch
+    struct Scratch {
+        uint8_t* buf = nullptr;
+        size_t cap = 0;
+        std::vector<HANDLE> ev;
+        std::vector<OVERLAPPED> ov;
+        std::vector<Window> win;
+        std::vector<size_t> order;
+        std::vector<Req> req;
+        std::vector<DWORD> got;
+        ~Scratch() {
+            if (buf != nullptr) VirtualFree(buf, 0, MEM_RELEASE);
+            for (HANDLE e : ev) CloseHandle(e);
+        }
+    };
+    thread_local Scratch sc;
+    sc.win.clear();
+    for (size_t k = 0; k < n; ++k) {
+        const Fill& f = fills[k];
+        if (f.dst == nullptr || f.layer < 0 || f.e < 0 || f.layer >= n_layers_ || f.e >= n_expert_) return false;
+        if (role_ptr_.empty()) {   // experts.bin: the blob is one contiguous range
+            const uint64_t per = layer_blob_bytes_[(size_t) f.layer];
+            const uint64_t off = layer_offsets_[(size_t) f.layer] + (uint64_t) f.e * per;
+            const uint64_t a0 = off / kSector * kSector, a1 = (off + per + kSector - 1) / kSector * kSector;
+            sc.win.push_back({0, a0, a1 - a0, off - a0, per, 0, f.dst, 0, 0});
+            continue;
+        }
+        uint64_t at = 0;
+        for (int r = 0; r < 3; ++r) {
+            const size_t i = (size_t) (3 * f.layer + r);
+            const uint64_t per = role_bytes_[i];
+            const Map& m = maps_[(size_t) role_file_[i]];
+            const uint64_t off = (uint64_t) (role_ptr_[i] - m.base) + (uint64_t) f.e * per;
+            const uint64_t a0 = off / kSector * kSector, a1 = (off + per + kSector - 1) / kSector * kSector;
+            sc.win.push_back({role_file_[i], a0, a1 - a0, off - a0, per, at, f.dst, 0, 0});
+            at += per;
+        }
+    }
+    sc.order.resize(sc.win.size());
+    for (size_t w = 0; w < sc.win.size(); ++w) sc.order[w] = w;
+    std::sort(sc.order.begin(), sc.order.end(), [&](size_t a, size_t b) {
+        return sc.win[a].file != sc.win[b].file ? sc.win[a].file < sc.win[b].file : sc.win[a].a0 < sc.win[b].a0;
+    });
+    sc.req.clear();
+    uint64_t total = 0;
+    int last_file = -1;
+    for (size_t w : sc.order) {
+        Window& x = sc.win[w];
+        if (!sc.req.empty() && x.file == last_file) {
+            Req& q = sc.req.back();
+            const uint64_t end = q.a0 + q.size, xend = x.a0 + x.size;
+            if (x.a0 <= end + kGap && std::max(end, xend) - q.a0 <= kMerge) {
+                if (xend > end) {
+                    total += xend - end;
+                    q.size = xend - q.a0;
+                }
+                x.req = sc.req.size() - 1;
+                x.in_req = x.a0 - q.a0;
+                continue;
+            }
+        }
+        sc.req.push_back({(HANDLE) direct_[(size_t) x.file], x.a0, x.size, total});
+        total += x.size;
+        last_file = x.file;
+        x.req = sc.req.size() - 1;
+        x.in_req = 0;
+    }
+    if (total > sc.cap) {
+        if (sc.buf != nullptr) VirtualFree(sc.buf, 0, MEM_RELEASE);
+        sc.cap = (size_t) ((total + (1u << 20) - 1) >> 20 << 20);
+        sc.buf = (uint8_t*) VirtualAlloc(nullptr, sc.cap, MEM_COMMIT | MEM_RESERVE, PAGE_READWRITE);
+        if (sc.buf == nullptr) { sc.cap = 0; return false; }
+    }
+    while (sc.ev.size() < sc.req.size()) {
+        HANDLE e = CreateEventW(nullptr, TRUE, FALSE, nullptr);
+        if (e == nullptr) return false;
+        sc.ev.push_back(e);
+    }
+    sc.ov.assign(sc.req.size(), OVERLAPPED{});
+    // every request in flight before the first wait: the drive sees the whole batch as one queue
+    size_t issued = 0;
+    bool ok = true;
+    for (size_t q = 0; q < sc.req.size(); ++q) {
+        const Req& r = sc.req[q];
+        OVERLAPPED& o = sc.ov[q];
+        o.Offset = (DWORD) r.a0;
+        o.OffsetHigh = (DWORD) (r.a0 >> 32);
+        o.hEvent = sc.ev[q];
+        if (!ReadFile(r.h, sc.buf + r.pos, (DWORD) r.size, nullptr, &o) && GetLastError() != ERROR_IO_PENDING) {
+            ok = false;
+            break;
+        }
+        ++issued;
+    }
+    std::vector<DWORD>& got = sc.got;
+    got.assign(sc.req.size(), 0);
+    for (size_t q = 0; q < issued; ++q)
+        if (!GetOverlappedResult(sc.req[q].h, &sc.ov[q], &got[q], TRUE)) ok = false;
+    if (!ok || issued < sc.req.size()) return false;
+    for (const Window& x : sc.win) {
+        // a request may run past the end of the file: only the role's own bytes have to arrive
+        if ((uint64_t) got[x.req] < x.in_req + x.skip + x.n) return false;
+        std::memcpy(x.dst + x.at, sc.buf + sc.req[x.req].pos + x.in_req + x.skip, (size_t) x.n);
+    }
+    return true;
+#else
+    (void) fills; (void) n;
+    return false;
+#endif
+}
 
 void FileExpertSource::warm(int64_t layer, const int64_t* experts, int64_t n) {
     if (role_ptr_.empty() || n <= 0 || layer < 0 || layer >= n_layers_) return;
@@ -942,7 +1157,7 @@ void RouterLookahead::run() {
 void FileExpertSource::begin_layer(int64_t layer, const int32_t* ids, int64_t k) {
     (void) ids;
     (void) k;
-    if (role_ptr_.empty()) return;
+    if (!staged()) return;
     std::lock_guard<std::mutex> lk(stage_mu_);
     if (layer != last_layer_) {
         ++epoch_;
@@ -951,7 +1166,7 @@ void FileExpertSource::begin_layer(int64_t layer, const int32_t* ids, int64_t k)
 }
 
 bool FileExpertSource::transient(int64_t layer, int64_t expert) const {
-    if (role_ptr_.empty() || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
+    if (!staged() || layer < 0 || expert < 0 || layer >= n_layers_ || expert >= n_expert_) return false;
     const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
     if (complement_ready_ && index < complement_offsets_.size() && complement_offsets_[index] != kNoComplement)
         return false;
@@ -1367,17 +1582,43 @@ bool FileExpertSource::pin_cache_complement(
             const int64_t layer = next_layer.fetch_add(1);
             if (layer >= n_layers_ || failed.load()) return;
             const uint64_t blob_bytes = layer_blob_bytes_[(size_t) layer];
+            std::vector<Fill> batch;   // #286, unbuffered: 32 blobs' reads in flight at once, merged where near
+            auto flush = [&]() {
+                if (batch.empty()) return true;
+                bool ok = read_direct(batch.data(), batch.size());
+                for (size_t i = 0; !ok && i < batch.size(); ++i)
+                    if (!copy_from_files(batch[i].layer, batch[i].e, batch[i].dst)) return false;
+                copied.fetch_add(blob_bytes * (uint64_t) batch.size());
+                batch.clear();
+                return true;
+            };
             for (int64_t expert = 0; expert < n_expert_; ++expert) {
                 const size_t index = (size_t) layer * (size_t) n_expert_ + (size_t) expert;
                 const uint64_t offset = offsets[index];
                 if (offset == kNoComplement) continue;
-                if (offset > bytes || blob_bytes > bytes - offset ||
-                    !copy_from_files(layer, expert, (uint8_t*) host + (size_t) offset)) {
+                if (offset > bytes || blob_bytes > bytes - offset) {
+                    fail("FileExpertSource: invalid blob bounds while building the cache complement");
+                    return;
+                }
+                uint8_t* dst = (uint8_t*) host + (size_t) offset;
+                if (!direct_.empty()) {
+                    batch.push_back({0, layer, expert, dst});
+                    if (batch.size() == 32 && !flush()) {
+                        fail("FileExpertSource: an expert could not be read while building the cache complement");
+                        return;
+                    }
+                    continue;
+                }
+                if (!copy_from_files(layer, expert, dst)) {
                     fail("FileExpertSource: invalid blob bounds while building the cache complement");
                     return;
                 }
                 copied.fetch_add(blob_bytes);
             }
+            if (!flush()) {
+                fail("FileExpertSource: an expert could not be read while building the cache complement");
+                return;
+            }
 #if !defined(_WIN32)
             if (role_ptr_.empty()) {   // experts.bin; the GGUF in place leaves its pages to the OS
             const uint64_t layer_offset = layer_offsets_[(size_t) layer];
@@ -1482,9 +1723,9 @@ bool FileExpertSource::reserve_exchanges(int64_t n, std::string &err) try {
     const size_t total = (size_t) n * (size_t) blob;
     void* p = nullptr;
     /*
-    DPCT1048: The original value cudaHostAllocDefault is not meaningful in
-    the migrated code and was removed or replaced with 0. You may need to check
-    the migrated code.
+    DPCT1048: The original value cudaHostAllocDefault is not meaningful in the
+    migrated code and was removed or replaced with 0. You may need to check the
+    migrated code.
     */
     if (DPCT_CHECK_ERROR(p = (void *)sycl::malloc_host(
                              total, dpct::get_in_order_queue())) == 0 &&
@@ -1563,7 +1804,7 @@ const uint8_t* FileExpertSource::blob(int64_t layer, int64_t expert) {
         }
     }
     if (from_files) {
-        if (!role_ptr_.empty()) {
+        if (staged()) {
             result = staged_blob(layer, expert);          // counts its bytes
         } else {
             result = mapped_blob(layer, expert);
@@ -1778,7 +2019,8 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
             if (first_of[i] == i) {
                 distinct[nd++] = i;
                 const int32_t e = ids[i];
-                if (e >= 0 && e < d.n_expert && d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] < 0) ++nmiss;
+                if (e >= 0 && e < d.n_expert && d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] < 0 &&
+                    !(d.peer != nullptr && d.peer->has(d.layers, e))) ++nmiss;
             }
         }
         const bool pcie_ok = d.pcie_num > 0 && d.src->pcie_layer(d.layers);
@@ -1798,6 +2040,8 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                     kd = 0;
                     ptr = (unsigned long long) (d.cache_base + (d.cache_slot_off ? (size_t) d.cache_slot_off[slot]
                                                                                  : (size_t) slot * (size_t) d.cache_blob));
+                } else if (d.peer != nullptr && d.peer->has(d.layers, e)) {
+                    kd = 2;                        // multi-GPU: the second GPU computes it
                 } else {
                     if (miss_rank >= nmiss - m && fetches < P.staging_cap && fetches < 64) {
                         const uint8_t* src = d.src->pinned(d.layers, e) ? d.src->blob(d.layers, e) : nullptr;
@@ -1852,7 +2096,18 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         for (int64_t i = 0; i < n; ++i) {
             const int32_t e = ids[i];
             kind[i] = (e >= 0 && e < d.n_expert && d.host_res != nullptr &&
-                       d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] >= 0) ? 0 : -1;
+                       d.host_res[(size_t) d.layers * (size_t) d.n_expert + (size_t) e] >= 0) ? 0
+                    : (e >= 0 && e < d.n_expert && d.peer != nullptr && d.peer->has(d.layers, e)) ? 2 : -1;
+        }
+    }
+    if (d.peer != nullptr) {                 // multi-GPU: start the second GPU's share before the CPU's own work
+        std::string perr;
+        if (!d.peer->launch(d.layers, x_f, ids, n_tok, k, kind, perr, out)) {
+            std::fprintf(stderr, "strata: %s (layer %lld)\n", perr.c_str(), (long long) d.layers);
+            d.failed = true;
+            d.fail = "the peer GPU's experts could not be launched";
+            d.fail_layer = d.layers;
+            return;
         }
     }
     if (d.remote_count > 0) {
@@ -1895,9 +2150,12 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                 d.fail_expert = e;
                 return;
             }
-            if (kind[i] >= 0) {             // CUDA0, PCIe, or a remote result staged into this row below
+            if (kind[i] >= 0) {             // CUDA0, PCIe, or a remote/peer result staged into this row below
                 if (kind[i] == 0) ++d.cache_hits;
-                std::memset(row, 0, (size_t) H * sizeof(float));
+                else if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
+                // multi-GPU: a direct peer launch is writing this row right now - zeroing it would race it
+                if (!(kind[i] == 2 && d.peer != nullptr && d.peer->launched_direct()))
+                    std::memset(row, 0, (size_t) H * sizeof(float));
                 continue;
             }
             ++d.cache_refused;
@@ -1935,6 +2193,16 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                 d.failed = true; d.fail = remote_error.c_str(); d.fail_layer = d.layers; return;
             }
     }
+    if (d.peer != nullptr) {                 // multi-GPU: the second GPU's rows, into the same mapped rows
+        std::string perr;
+        if (!d.peer->finish(out, perr)) {
+            std::fprintf(stderr, "strata: %s (layer %lld)\n", perr.c_str(), (long long) d.layers);
+            d.failed = true;
+            d.fail = "the peer GPU's experts failed";
+            d.fail_layer = d.layers;
+            return;
+        }
+    }
     const auto c4 = std::chrono::steady_clock::now();
     pt("ran");
     auto ms = [](auto a, auto b) { return std::chrono::duration<double, std::milli>(b - a).count(); };
@@ -2259,13 +2527,104 @@ bool check_experts_gguf(const std::string& gguf, const strata::kernels::cpu::Exp
 // [gate rows | up rows | down rows] - the layout tools/iq_pack.py would have written to experts.bin.  Each role
 // is read from its own file (native_experts.txt v4: a shard boundary can fall inside a layer; per role as in
 // #255, gopinath87607).  The caller checks the spans first (check_experts_gguf).
+// `unbuffered` (Windows, experts_unbuffered): each chunk's 4 KiB-aligned window is read with FILE_FLAG_NO_BUFFERING into
+// an aligned buffer and scattered into the blobs - no copy through the file cache when the drive is read anyway.
 LoadStats load_experts_gguf(const std::string& gguf, uint8_t* dst, const strata::kernels::cpu::ExpertLayout& lay,
-                            int threads) {
+                            int threads, bool unbuffered) {
     LoadStats st;
     st.layers = (uint64_t) lay.n_layers;
     const auto t0 = std::chrono::steady_clock::now();
     std::atomic<int64_t> next{0};
     std::atomic<bool> bad{false};
+#if defined(_WIN32)
+    if (unbuffered) {
+        uint64_t max_chunk = 0;
+        for (int64_t l = 0; l < lay.n_layers; ++l) {
+            const auto& fm = lay.fmt[(size_t) l];
+            max_chunk = std::max<uint64_t>(max_chunk, std::max<uint64_t>(fm.up_off, lay.bytes[(size_t) l] - fm.down_off) * 16);
+        }
+        std::mutex err_mu;
+        std::string err;
+        auto worker = [&]() {
+            constexpr uint64_t kSector = 4096;
+            const uint64_t cap = (max_chunk + 2 * kSector + kSector - 1) / kSector * kSector;
+            uint8_t* buf = (uint8_t*) VirtualAlloc(nullptr, (size_t) cap, MEM_COMMIT | MEM_RESERVE, PAGE_READWRITE);
+            HANDLE h = INVALID_HANDLE_VALUE;
+            std::string open_name;
+            auto fail = [&](const std::string& what) {
+                std::lock_guard<std::mutex> g(err_mu);
+                if (err.empty()) err = what;
+                bad = true;
+            };
+            if (buf == nullptr) fail("cannot allocate a read buffer");
+            for (;;) {
+                const int64_t l = next.fetch_add(1);
+                if (l >= lay.n_layers || bad) break;
+                const auto& fm = lay.fmt[(size_t) l];
+                const uint64_t blob = lay.bytes[(size_t) l];
+                const uint64_t per[3] = {fm.up_off, fm.up_off, blob - fm.down_off};
+                const uint64_t at[3] = {0, fm.up_off, fm.down_off};
+                for (int r = 0; r < 3 && !bad; ++r) {
+                    // the handle is kept while consecutive roles share a file (every layer of a v3 pack)
+                    const std::string name = expert_gguf_file(gguf, lay, l, r);
+                    if (name != open_name) {
+                        if (h != INVALID_HANDLE_VALUE) CloseHandle(h);
+                        const int wide = MultiByteToWideChar(CP_UTF8, 0, name.c_str(), -1, nullptr, 0);
+                        std::vector<wchar_t> w((size_t) std::max(wide, 1), L'\0');
+                        if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, name.c_str(), -1, w.data(), wide);
+                        h = CreateFileW(w.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                                        FILE_FLAG_NO_BUFFERING | FILE_FLAG_SEQUENTIAL_SCAN, nullptr);
+                        if (h == INVALID_HANDLE_VALUE) {
+                            fail("cannot open " + name + " (error " + std::to_string((unsigned long long) GetLastError()) + ")");
+                            break;
+                        }
+                        open_name = name;
+                    }
+                    const uint64_t src = lay.gguf_off[(size_t) (3 * l + r)];
+                    const uint64_t total = per[r] * (uint64_t) lay.n_expert;
+                    const uint64_t chunk = per[r] * 16;           // 16 experts per read
+                    for (uint64_t done = 0; done < total; done += chunk) {
+                        const uint64_t n = std::min<uint64_t>(chunk, total - done);
+                        const uint64_t a0 = (src + done) / kSector * kSector;
+                        const uint64_t a1 = (src + done + n + kSector - 1) / kSector * kSector;
+                        OVERLAPPED ov{};
+                        ov.Offset = (DWORD) a0;
+                        ov.OffsetHigh = (DWORD) (a0 >> 32);
+                        DWORD got = 0;
+                        // the window may run past the end of the file: only the tensor's own bytes have to arrive
+                        if (!ReadFile(h, buf, (DWORD) (a1 - a0), &got, &ov) || (uint64_t) got < src + done - a0 + n) {
+                            fail("short unbuffered read of layer " + std::to_string(l) + " in " + name + " (error " +
+                                 std::to_string((unsigned long long) GetLastError()) + ")");
+                            break;
+                        }
+                        const uint8_t* q = buf + (src + done - a0);
+                        for (uint64_t k = 0; k < n / per[r]; ++k) {
+                            const uint64_t e = done / per[r] + k;
+                            std::memcpy(dst + lay.blob_offset(l, (int64_t) e) + at[r], q + k * per[r], (size_t) per[r]);
+                        }
+                    }
+                }
+            }
+            if (h != INVALID_HANDLE_VALUE) CloseHandle(h);
+            if (buf != nullptr) VirtualFree(buf, 0, MEM_RELEASE);
+        };
+        std::vector<std::thread> pool;
+        for (int i = 1; i < threads; ++i) pool.emplace_back(worker);
+        worker();
+        for (auto& t : pool) t.join();
+        if (bad) {
+            st.seconds = -1.0;
+            st.ok = false;
+            st.error = err.empty() ? "unreadable shard while reading the experts from the GGUF" : err;
+            return st;
+        }
+        st.bytes = lay.total;
+        st.seconds = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+        return st;
+    }
+#else
+    (void) unbuffered;
+#endif
     auto worker = [&]() {
         // #230: `fread` on a `FILE*`, as load_experts_ranges (#89): MSVC's `std::ifstream::read` splits a request
         // into 4095-byte freads, which took this path to 0.02 GiB/s on a Windows install without experts.bin.
@@ -2390,8 +2749,31 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
               (why.empty() ? std::string{} : ": " + why);
         return false;
     }
-    const LoadStats st = from_gguf ? load_experts_gguf(gguf_, a->data(), lay, threads)
-                                   : load_experts_ranges(path, a->data(), loff, lbytes, threads, /*chunk=*/8u << 20);
+    // #285: unbuffered when the drive is read anyway and the file cache could not keep the experts for the next
+    // start either (a 64 GB PC); otherwise the buffered readers, which a warm restart serves from the cache
+    std::vector<std::string> files;
+    if (from_gguf) {
+        for (int64_t l = 0; l < n_layers; ++l)
+            for (int r = 0; r < 3; ++r) {
+                const std::string f = expert_gguf_file(gguf_, lay, l, r);
+                if (std::find(files.begin(), files.end(), f) == files.end()) files.push_back(f);
+            }
+    } else {
+        files.push_back(path);
+    }
+    std::string why;
+    const bool unbuffered = experts_unbuffered(files, want + (uint64_t) blob, why);
+    const int readers = unbuffered ? std::max(threads, 16) : threads;   // 16 keep a PCIe 5 drive's queue full
+    LoadStats st;
+    if (from_gguf) {
+        st = load_experts_gguf(gguf_, a->data(), lay, readers, unbuffered);
+    } else {
+        if (unbuffered) st = load_experts_direct(path, a->data(), loff, lbytes, readers, /*chunk=*/8u << 20);
+        if (!unbuffered || (!st.ok && st.error.empty()))   // unaligned ranges: the buffered reader
+            st = load_experts_ranges(path, a->data(), loff, lbytes, threads, /*chunk=*/8u << 20);
+    }
+    std::fprintf(stderr, "strata generate: expert arena read %s (%s)\n", unbuffered ? "unbuffered" : "through the file cache",
+                 why.c_str());
     if (!st.ok) {
         delete a;
         err = "ArenaExpertSource: the expert load was refused: " + (st.error.empty() ? std::string("unknown") : st.error);
diff --git a/sycl/src/core/mtp.cpp b/sycl/src/core/mtp.cpp
index b862ead22f8..554afd47e0b 100644
--- a/sycl/src/core/mtp.cpp
+++ b/sycl/src/core/mtp.cpp
@@ -6,6 +6,7 @@
 #include "strata/core/on_device.hpp"
 
 #include "strata/core/native_head.hpp"
+#include "strata/core/peer_experts.hpp"
 #include "strata/kernels/bf16_gemv.hpp"
 #include "strata/kernels/cpu/expert.hpp"
 #include "strata/kernels/elementwise.hpp"
@@ -32,6 +33,7 @@
 #include <atomic>
 #include <chrono>
 #include <cstdio>
+#include <cstdlib>
 #include <cstring>
 #include <exception>
 #include <fstream>
@@ -458,6 +460,46 @@ void MtpDrafter::set_draft_history(const int32_t* tail, int64_t n_tail, int32_t
     coupled_hist_base(tail, n_tail, next, h, h_chist_ + (kCoupledHistCap - h));
 }
 
+namespace {
+// #474: what to change when the draft head's token subset does not fit the VRAM left - a smaller subset that setup
+// ships (data/draft_vocab_*.bin; their token counts below), and how to pick it.  The start used to stop at "the draft
+// head does not fit" with no hint.  Text only, after the failure: nothing changes for a start that fits.
+void draft_head_hint(int64_t n_tokens, int64_t row_bytes) {
+    size_t free_b = 0, total_b = 0;
+    bool have_free = true;   // SYCL port: the device's own free-memory figure
+    try { dpct::get_current_device().get_memory_info(free_b, total_b); } catch (...) { have_free = false; }
+    auto mib = [&](int64_t n) { return (double) (n * row_bytes) / 1048576.0; };
+    std::string free_s;
+    if (have_free) {
+        char b[64];
+        std::snprintf(b, sizeof(b), " and %.0f MiB is free", (double) free_b / 1048576.0);
+        free_s = b;
+    }
+    std::fprintf(stderr, "strata mtp: the draft head over %lld tokens needs %.0f MiB of VRAM%s.\n",
+                 (long long) n_tokens, mib(n_tokens), free_s.c_str());
+    struct Subset { const char* name; int64_t tokens; const char* what; };
+    static const Subset smaller[] = {{"cyrillic", 58963, "English, code and the Cyrillic script"},
+                                     {"en", 40525, "English and code"}};
+    std::string opts;
+    for (const Subset& s : smaller)
+        if (s.tokens < n_tokens) {
+            char b[160];
+            std::snprintf(b, sizeof(b), "%s--draft-vocab %s (%s, ~%.0f MiB)", opts.empty() ? "" : " or ", s.name,
+                          s.what, mib(s.tokens));
+            opts += b;
+        }
+    if (!opts.empty())
+        std::fprintf(stderr, "strata mtp: hint: a smaller draft vocabulary needs less VRAM: %s. Start once with it - "
+                             "START-HERE.bat --draft-vocab en (Windows) or ./setup.sh --draft-vocab en - and the model "
+                             "keeps it (\"draft_vocab\" in its strata-*.json config); or a smaller --context in "
+                             "setup.\n",
+                     opts.c_str());
+    else
+        std::fprintf(stderr, "strata mtp: hint: this is already the smallest shipped draft vocabulary: a smaller "
+                             "--context (or closing what else uses the GPU) leaves it room.\n");
+}
+}  // namespace
+
 bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
                       const float *window_R, std::string &err) try {
     const OnDevice on_device(device_);
@@ -488,6 +530,7 @@ bool MtpDrafter::bind(const WeightTable &wt, const NativeHead *head,
                                      (size_t)(n_dvocab_ * row_bytes),
                                      dpct::get_in_order_queue())) != 0) {
                 err = "mtp: the draft head does not fit";
+                draft_head_hint(n_dvocab_, row_bytes);
                 return false;
             }
             dpct::get_in_order_queue()
@@ -847,8 +890,21 @@ bool MtpDrafter::prefill(const float *R_rows, const int32_t *next_tokens,
     // E-4: every group's token / step / position records uploaded at once; each group is then device copies and a
     // graph on the one stream, with a single sync at the end (a group of <= max_t rows used to be staged in mapped
     // memory and synced before the next: ~5,500 host round trips on a 32K prompt).  The same work in the same
-    // order.  STRATA_MTP_PREFILL_SYNC=1 keeps the old loop.
-    static const bool per_group_sync = std::getenv("STRATA_MTP_PREFILL_SYNC") != nullptr;
+    // order.  STRATA_MTP_PREFILL_SYNC=1 keeps the old loop, =0 forces E-4.
+    // HIP defaults to the old loop.  This pass runs whenever E-9 (Prefill::draft_kv) declines, which it does for the
+    // drafter's ring (KV streaming, --kv-resident), and on gfx1201 / ROCm 7.2.4 the E-4 queue (a graph launch and four
+    // device copies per group, ~2,000 groups per 8192-token chunk, no sync) sometimes never completes: the prompt hangs
+    // in hipGraphLaunch or the final sync until the watchdog ends the engine.  R9700, full IQ3_XXS, --kv-resident
+    // 32768, mixed load (chats, 32K and 7K prompts, deep follow-ups): E-4 hung in the first round on 2 of 2 tries,
+    // the old loop ran 30 of 30 rounds clean, prompt speed unchanged.
+    static const bool per_group_sync = [] {
+        if (const char* v = std::getenv("STRATA_MTP_PREFILL_SYNC")) return std::atoi(v) != 0;
+#if defined(STRATA_USE_HIP)
+        return true;
+#else
+        return false;
+#endif
+    }();
     const int64_t NHp = g_->n_head, per_row = 1 + 4 + NHp;
     if (!per_group_sync && n > 0) {
         if (pf_cap_ < n * per_row) {
diff --git a/sycl/src/core/peer_experts.cpp b/sycl/src/core/peer_experts.cpp
new file mode 100644
index 00000000000..63656fd6866
--- /dev/null
+++ b/sycl/src/core/peer_experts.cpp
@@ -0,0 +1,41 @@
+// src/core/peer_experts.cpp (SYCL port) - upstream's --peer-device tier (a second GPU as an expert-cache tier, 0.1.36+)
+// is CUDA-only for now: this build answers "no peer". open() refuses with a message, so --peer-device fails clearly,
+// and every other entry point is the state a run without --peer-device has. Upstream's file: src/core/peer_experts.cpp.
+#include "strata/core/peer_experts.hpp"
+
+#include <atomic>
+
+namespace strata::core {
+
+namespace {
+std::atomic<bool> g_portable{false};
+}  // namespace
+
+void set_peer_portable(bool on) { g_portable.store(on); }
+bool peer_portable() { return g_portable.load(); }
+
+PeerExperts::~PeerExperts() { close(); }
+
+bool PeerExperts::open(int, const std::vector<std::pair<int32_t, int32_t>>&, const ExpertCache&, ExpertSource&, int64_t,
+                       int64_t, int, int64_t, std::string& err) {
+    err = "--peer-device: the second-GPU expert tier is not ported to SYCL yet";
+    return false;
+}
+
+void PeerExperts::close() { device_ = -1; }
+
+bool PeerExperts::launch(int64_t, const float*, const int32_t*, int64_t, int64_t, const int32_t*, std::string& err,
+                         float*) {
+    err = "--peer-device: not available in the SYCL build";
+    return false;
+}
+
+bool PeerExperts::finish(float*, std::string& err) {
+    err = "--peer-device: not available in the SYCL build";
+    return false;
+}
+
+bool PeerExperts::adapt(const float*, const int32_t*, int, std::string&) { return true; }
+void PeerExperts::apply_pending(bool) {}
+
+}  // namespace strata::core
diff --git a/sycl/src/core/pinned.dp.cpp b/sycl/src/core/pinned.dp.cpp
index 517163788b0..8e5aec734ad 100644
--- a/sycl/src/core/pinned.dp.cpp
+++ b/sycl/src/core/pinned.dp.cpp
@@ -200,15 +200,32 @@ void* reserve(uint64_t bytes, PageBacking& got, std::string& note, const std::st
         return (uint8_t*) map + kSharedArenaHeaderBytes;
     }
 
-    void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE,
-                   MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_HUGE_2MB, -1, 0);
-    if (p != MAP_FAILED) {
-        got = PageBacking::LargePages;
-        note = "hugetlb 2 MB pages";
-        return p;
+    // STRATA_NO_LARGEPAGES=1 is the same-run A/B switch the Windows branch documents; honor it
+    // here too, so the large-page path can be compared without changing the pool or rebooting.
+    if (std::getenv("STRATA_NO_LARGEPAGES") != nullptr) {
+        note = "large pages skipped (STRATA_NO_LARGEPAGES); using 4 KB pages";
+    } else {
+        void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE,
+                       MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_HUGE_2MB, -1, 0);
+        if (p != MAP_FAILED) {
+            got = PageBacking::LargePages;
+            note = "hugetlb 2 MB pages";
+            return p;
+        }
+        // MAP_HUGETLB is all-or-nothing: a pool smaller than the mapping fails exactly like an absent
+        // one, and the old message guessed "no hugetlb pool configured" either way. Name the shortfall:
+        // how many 2 MiB pages the mapping needs against what vm.nr_hugepages actually holds.
+        const unsigned long long need = ((unsigned long long) bytes + (1ull << 21) - 1) / (1ull << 21);
+        unsigned long long pool = 0;
+        bool have_pool = false;
+        if (std::FILE* f = std::fopen("/proc/sys/vm/nr_hugepages", "r")) {
+            have_pool = std::fscanf(f, "%llu", &pool) == 1;
+            std::fclose(f);
+        }
+        note = "MAP_HUGETLB unavailable (needed " + std::to_string(need) + " 2 MiB pages, vm.nr_hugepages=" +
+               (have_pool ? std::to_string(pool) : std::string("?")) + "); using 4 KB pages";
     }
-    note = "MAP_HUGETLB unavailable (no hugetlb pool configured?); using 4 KB pages";
-    p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+    void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
     got = PageBacking::NormalPages;
     return p == MAP_FAILED ? nullptr : p;
 #endif
@@ -378,8 +395,8 @@ PinnedArena::PinnedArena(uint64_t bytes, const std::vector<uint64_t> &bounds,
                            std::to_string(cap >> 30) + " GiB " + cap_why + "; "
                      :
                      /*
-                     DPCT1009: SYCL reports errors using exceptions and does
-                     not use error codes. Please replace the
+                     DPCT1009: SYCL reports errors using exceptions and
+                     does not use error codes. Please replace the
                      "get_error_string_dummy(...)" with a real error-handling
                      function.
                      */
@@ -481,6 +498,141 @@ LoadStats load_experts(const std::string& path, uint8_t* dst, uint64_t blob_byte
     return load_experts_ranges(path, dst, off, n, threads, chunk);
 }
 
+LoadStats load_experts_direct(const std::string& path, uint8_t* dst, const std::vector<uint64_t>& layer_off,
+                              const std::vector<uint64_t>& layer_bytes, int threads, uint64_t chunk) {
+    LoadStats st;
+    st.ok = false;
+#ifdef _WIN32
+    constexpr uint64_t kAlign = 4096;
+    if (((uintptr_t) dst % kAlign) != 0 || chunk == 0 || chunk % kAlign != 0) return st;
+    struct Piece { uint64_t off, n; };
+    std::vector<Piece> pieces;
+    uint64_t bytes = 0;
+    for (size_t L = 0; L < layer_off.size(); ++L) {
+        if (layer_off[L] % kAlign != 0 || layer_bytes[L] % kAlign != 0) return st;
+        for (uint64_t p = 0; p < layer_bytes[L]; p += chunk)
+            pieces.push_back({layer_off[L] + p, std::min<uint64_t>(chunk, layer_bytes[L] - p)});
+        bytes += layer_bytes[L];
+    }
+    if (threads < 1) threads = 1;
+    const auto t0 = std::chrono::steady_clock::now();
+    std::atomic<size_t> next{0};
+    std::mutex err_mu;
+    std::string err;
+    const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
+    std::vector<wchar_t> wpath((size_t) std::max(wide, 1), L'\0');
+    if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, wpath.data(), wide);
+    auto worker = [&]() {
+        HANDLE h = CreateFileW(wpath.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
+                               FILE_FLAG_NO_BUFFERING | FILE_FLAG_SEQUENTIAL_SCAN, nullptr);
+        if (h == INVALID_HANDLE_VALUE) {
+            std::lock_guard<std::mutex> g(err_mu);
+            if (err.empty())
+                err = "cannot open " + path + " unbuffered (error " + std::to_string((unsigned long long) GetLastError()) + ")";
+            next = pieces.size();
+            return;
+        }
+        for (;;) {
+            const size_t i = next.fetch_add(1);
+            if (i >= pieces.size()) break;
+            OVERLAPPED ov{};
+            ov.Offset = (DWORD) pieces[i].off;
+            ov.OffsetHigh = (DWORD) (pieces[i].off >> 32);
+            DWORD got = 0;
+            if (!ReadFile(h, dst + pieces[i].off, (DWORD) pieces[i].n, &got, &ov) || got != pieces[i].n) {
+                std::lock_guard<std::mutex> g(err_mu);
+                if (err.empty())
+                    err = "short unbuffered read at offset " + std::to_string(pieces[i].off) + ": got " + std::to_string(got) +
+                          " of " + std::to_string(pieces[i].n) + " B (error " +
+                          std::to_string((unsigned long long) GetLastError()) + ")";
+                next = pieces.size();
+                break;
+            }
+        }
+        CloseHandle(h);
+    };
+    std::vector<std::thread> pool;
+    for (int i = 1; i < threads; ++i) pool.emplace_back(worker);
+    worker();
+    for (auto& t : pool) t.join();
+    st.layers = layer_off.size();
+    if (!err.empty()) {
+        st.seconds = -1.0;
+        st.error = err;
+        return st;
+    }
+    st.ok = true;
+    st.bytes = bytes;
+    st.seconds = std::chrono::duration<double>(std::chrono::steady_clock::now() - t0).count();
+#else
+    (void) path; (void) dst; (void) layer_off; (void) layer_bytes; (void) threads; (void) chunk;
+#endif
+    return st;
+}
+
+bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_bytes, std::string& why,
+                        bool cache_counts) {
+    const char* env = std::getenv("STRATA_UNBUFFERED_LOAD");
+    if (env != nullptr && env[0] != '\0') {
+        why = std::string("STRATA_UNBUFFERED_LOAD=") + env;
+        return env[0] != '0';
+    }
+#ifdef _WIN32
+    LARGE_INTEGER freq{}, a{}, b{};
+    QueryPerformanceFrequency(&freq);
+    constexpr DWORD kRead = 64 << 10;
+    constexpr int kSamples = 16;
+    std::vector<uint8_t> buf(kRead);
+    uint64_t total_bytes = 0;
+    int fast = 0, n = 0;
+    uint64_t seed = (uint64_t) GetTickCount64() * 6364136223846793005ull + 1442695040888963407ull;
+    for (const std::string& f : files) {
+        const int wide = MultiByteToWideChar(CP_UTF8, 0, f.c_str(), -1, nullptr, 0);
+        std::vector<wchar_t> w((size_t) std::max(wide, 1), L'\0');
+        if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, f.c_str(), -1, w.data(), wide);
+        HANDLE h = CreateFileW(w.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING, FILE_FLAG_RANDOM_ACCESS,
+                               nullptr);
+        if (h == INVALID_HANDLE_VALUE) continue;
+        LARGE_INTEGER size{};
+        GetFileSizeEx(h, &size);
+        total_bytes += (uint64_t) size.QuadPart;
+        // random offsets: a probe must not find the blocks an earlier probe put into the cache
+        for (int i = 0; i < kSamples && (uint64_t) size.QuadPart > 2ull * kRead; ++i) {
+            seed = seed * 6364136223846793005ull + 1442695040888963407ull;
+            const uint64_t off = ((seed >> 17) % ((uint64_t) size.QuadPart - kRead)) / kRead * kRead;
+            OVERLAPPED ov{};
+            ov.Offset = (DWORD) off;
+            ov.OffsetHigh = (DWORD) (off >> 32);
+            DWORD got = 0;
+            QueryPerformanceCounter(&a);
+            const BOOL ok = ReadFile(h, buf.data(), kRead, &got, &ov);
+            QueryPerformanceCounter(&b);
+            if (!ok) continue;
+            ++n;
+            fast += (double) (b.QuadPart - a.QuadPart) * 1e6 / (double) freq.QuadPart < 30.0;
+        }
+        CloseHandle(h);
+    }
+    const bool cached = n > 0 && fast * 4 >= n * 3;
+    MEMORYSTATUSEX ms{};
+    ms.dwLength = sizeof ms;
+    GlobalMemoryStatusEx(&ms);
+    const uint64_t avail = ms.ullAvailPhys;
+    // what the cache could keep beside the arena (~4 GiB for everything else)
+    const uint64_t room = avail > arena_bytes + (4ull << 30) ? avail - arena_bytes - (4ull << 30) : 0;
+    const bool keepable = room >= total_bytes;
+    char msg[200];
+    std::snprintf(msg, sizeof msg, "%d of %d probe reads from the file cache; %.1f GiB available, %.1f GiB of files",
+                  fast, n, (double) avail / (1ull << 30), (double) total_bytes / (1ull << 30));
+    why = msg;
+    return (!cached || !cache_counts) && !keepable;
+#else
+    (void) files; (void) arena_bytes; (void) cache_counts;
+    why = "buffered (not Windows)";
+    return false;
+#endif
+}
+
 LoadStats load_experts_ranges(const std::string& path, uint8_t* dst, const std::vector<uint64_t>& layer_off,
                               const std::vector<uint64_t>& layer_bytes, int threads, uint64_t chunk) {
     LoadStats st;
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index e114b75fa4f..5a1d102f265 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -8,6 +8,7 @@
 
 #include "strata/core/native_head.hpp"
 #include "strata/core/on_device.hpp"
+#include "strata/core/peer_experts.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 #include "strata/kernels/cpu/expert_layout.hpp"
 #include "strata/kernels/bf16_gemv.hpp"
@@ -235,7 +236,9 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
     }
     if (hits.d_res == nullptr || hits.cache_base == nullptr || hits.blob <= 0) {
         err = "verify: needs the profile-filled VRAM expert tier (--expert-profile and --expert-cache); with "
-              "--expert-cache auto, no VRAM was left for it: lower --max-context, use --kv k8v4 or images on the CPU";
+              "--expert-cache auto, no VRAM was left for it - the 'no VRAM is left for the expert cache' line above "
+              "says how much is short and what makes room (a smaller --max-context, --kv q4_0, setup --draft-vocab en, "
+              "images on the CPU)";
         return false;
     }
     std::string why;
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
index ea4de6bd0f0..2d884b8dab3 100644
--- a/sycl/src/kernels/cuda/elementwise.dp.cpp
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -465,6 +465,47 @@ __dpct_inline__ void copy_rows_from_mapped_kernel(
             d[i] = const_cast<const sycl::float4 *>(sr)[i];
     }
 }
+namespace {
+__dpct_inline__ void scatter_rows_kernel(const sycl::float4 *__restrict__ src,
+                                         sycl::float4 *dst,
+                                         const int32_t *__restrict__ rows,
+                                         int64_t w4) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int64_t r = item_ct1.get_group(2);
+    const sycl::float4 *s = src + r * w4;
+    sycl::float4 *d = dst + (int64_t)rows[r] * w4;
+#pragma unroll
+    for (int64_t i = item_ct1.get_local_id(2); i < w4;
+         i += item_ct1.get_local_range(2)) d[i] = s[i];
+}
+}  // namespace
+void scatter_rows_f32(const float* src, float* dst, const int32_t* rows, int64_t n, int64_t width, void* stream) {
+    if (n <= 0) return;
+    if ((width & 3) != 0 || ((uintptr_t) dst & 15) != 0 || ((uintptr_t) src & 15) != 0) {
+        std::fprintf(stderr, "scatter_rows_f32: width must be a multiple of 4 and both pointers 16-byte aligned\n");
+        std::exit(1);
+    }
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->submit([&](sycl::handler &cgh) {
+                auto width_ct3 = width / 4;
+
+                cgh.parallel_for<
+                    dpct_kernel_name<class scatter_rows_kernel_7d83a1>>(
+                    sycl::nd_range<3>(sycl::range(1, 1, (unsigned)n) *
+                                          sycl::range(1, 1, 128),
+                                      sycl::range(1, 1, 128)),
+                    exp_props, [=](sycl::nd_item<3> item_ct1) {
+                        scatter_rows_kernel((const sycl::float4 *)src,
+                                            (sycl::float4 *)dst, rows,
+                                            width_ct3);
+                    });
+            });
+    }
+}
 void copy_rows_from_mapped(float* dst, const float* src, int64_t rows, int64_t width, const int32_t* hit_rows,
                            const int32_t* count, void* stream) {
     if (rows <= 0) return;
diff --git a/sycl/src/kernels/cuda/fused_gr.dp.cpp b/sycl/src/kernels/cuda/fused_gr.dp.cpp
index 32fe61a495c..d5aa4cb91b2 100644
--- a/sycl/src/kernels/cuda/fused_gr.dp.cpp
+++ b/sycl/src/kernels/cuda/fused_gr.dp.cpp
@@ -389,7 +389,7 @@ bool gr_norm_split() {   // default; STRATA_GR_NORM_SPLIT=0: one work-group per
 // which fits all eight tokens in one 40 KiB launch and stages 160 chunks of 8 (5 per lane, half the registers held
 // for the weight prefetch); smaller tiles raise how many blocks share an SM (the 41-block grid), e.g. three blocks
 // of four tokens instead of one on sm_75.
-template <int TILEV>
+template <int TILEV, int MAX_T = kFusedGrMaxT>
 /*
 DPCT1110: The total declared local variable size in device function
 gr_down_multi_kernel exceeds 128 bytes and may cause high register pressure.
@@ -409,9 +409,9 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
     const bool active = !(inject_block && (m.a[0].w_inject == nullptr || warp >= HC));
     const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
     const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
-    float acc[kFusedGrMaxT];
+    float acc[MAX_T];
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+    for (int k = 0; k < MAX_T; ++k) acc[k] = 0.0f;
     for (int base = inject_block ? 0 : split * TILEV; base < D; base += inject_block ? TILEV : TILEV * DOWN_SPLIT) {
         sycl::uint4 wv[TQ];
         if (active) {
@@ -456,17 +456,17 @@ __dpct_inline__ void gr_down_multi_kernel(GrMulti m, uint8_t *dpct_local) {
         for (int q = 0; q < TQ; ++q) {
             const int j = lane + 32 * q;
 #pragma unroll
-            for (int k = 0; k < kFusedGrMaxT; ++k)
+            for (int k = 0; k < MAX_T; ++k)
                 if (k < T) acc[k] += dot8(wv[q], tile + k * TILEV + j * 8);
         }
     }
     if (!active) return;
-    float s[kFusedGrMaxT];
+    float s[MAX_T];
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
+    for (int k = 0; k < MAX_T; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
     // lane k writes token k (every lane holds every sum after the xor reduction)
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) {
+    for (int k = 0; k < MAX_T; ++k) {
         if (k >= T || lane != k) continue;
         if (inject_block) {
             m.a[k].inject_out[row] = s[k];
@@ -1143,6 +1143,7 @@ __dpct_inline__ void stage_htile(const GrMulti &m, int T, int h,
     }
 }
 
+template <int MAX_T = kFusedGrMaxT>
 /*
 DPCT1110: The total declared local variable size in device function
 gr_down_staged_kernel exceeds 128 bytes and may cause high register pressure.
@@ -1160,9 +1161,9 @@ __dpct_inline__ void gr_down_staged_kernel(GrMulti m, uint8_t *dpct_local) {
     const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
     const sycl::uint4 *w4 = reinterpret_cast<const sycl::uint4 *>(wrow);
     const size_t buf_f4 = (size_t) T * (H_TILE / 4);    // float4 per buffer (the second one follows the first)
-    float acc[kFusedGrMaxT];
+    float acc[MAX_T];
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+    for (int k = 0; k < MAX_T; ++k) acc[k] = 0.0f;
     sycl::uint4 wv[HQ], wnext[HQ];
     if (active) {
 #pragma unroll
@@ -1208,7 +1209,7 @@ __dpct_inline__ void gr_down_staged_kernel(GrMulti m, uint8_t *dpct_local) {
             for (int q = 0; q < HQ; ++q) {
                 const int j = lane + 32 * q;
 #pragma unroll
-                for (int k = 0; k < kFusedGrMaxT; ++k) {
+                for (int k = 0; k < MAX_T; ++k) {
                     if (k < T) {
                         const sycl::float4 *pk = cur + (size_t)k * (H_TILE / 4);
                         acc[k] += dot8v(wv[q], pk[j], pk[H_TILE / 8 + j]);
@@ -1234,12 +1235,12 @@ __dpct_inline__ void gr_down_staged_kernel(GrMulti m, uint8_t *dpct_local) {
         }
     }
     if (!active) return;
-    float s[kFusedGrMaxT];
+    float s[MAX_T];
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
+    for (int k = 0; k < MAX_T; ++k) s[k] = k < T ? warp_sum(acc[k]) : 0.0f;
     // lane k writes token k (every lane holds every sum after the xor reduction)
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) {
+    for (int k = 0; k < MAX_T; ++k) {
         if (k >= T || lane != k) continue;
         if (inject_block) {
             m.a[k].inject_out[row] = s[k];
@@ -1392,74 +1393,172 @@ void launch_multi(const GrMulti &m, int variant, dpct::queue_ptr st,
             for (int k = 0; k < ct; ++k) c.a[k] = m.a[c0 + k];
         }
         const size_t smem = (size_t) ct * per_tok;
+        // #443, opt-in STRATA_GR_DOWN_MAX4=1: launches of up to 4 tokens hold 4 tokens' sums per thread instead of
+        // kFusedGrMaxT - the same tile, block size, accumulation order and plain/split/staged path, so the same bits
+        // (read once: this runs per layer when decode is not captured)
+        static const bool max4_on = [] { const char* v = std::getenv("STRATA_GR_DOWN_MAX4"); return v && std::atoi(v) != 0; }();
+        const bool max4 = max4_on && ct <= 4;
         if (staged) {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            st->submit([&](sycl::handler &cgh) {
-                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
-                    sycl::range(smem), cgh);
-
-                cgh.parallel_for<
-                    dpct_kernel_name<class gr_down_staged_kernel_41b428>>(
-                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
-                                          sycl::range(1, 1, THREADS),
-                                      sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
-                        32)]] {
-                        gr_down_staged_kernel(
-                            c, dpct_local_acc_ct1
-                                   .get_multi_ptr<sycl::access::decorated::no>()
-                                   .get());
-                    });
-            });
+            if (max4) {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    cgh.parallel_for<
+                        dpct_kernel_name<class gr_down_staged_kernel_41b428,
+                                         dpct_kernel_scalar<4>>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_staged_kernel<4>(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            } else {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    /*
+                    DPCT1050: The template argument of the dpct_kernel_name
+                    could not be deduced. You need to update this code.
+                    */
+                    cgh.parallel_for<dpct_kernel_name<
+                        class gr_down_staged_kernel_41b428>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_staged_kernel(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            }
         } else if (tv == 1280) {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            st->submit([&](sycl::handler &cgh) {
-                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
-                    sycl::range(smem), cgh);
-
-                cgh.parallel_for<
-                    dpct_kernel_name<class gr_down_multi_kernel_fa80e0,
-                                     dpct_kernel_scalar<1280>>>(
-                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
-                                          sycl::range(1, 1, THREADS),
-                                      sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
-                        32)]] {
-                        gr_down_multi_kernel<1280>(
-                            c, dpct_local_acc_ct1
-                                   .get_multi_ptr<sycl::access::decorated::no>()
-                                   .get());
-                    });
-            });
+            if (max4) {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    cgh.parallel_for<dpct_kernel_name<
+                        class gr_down_multi_kernel_4a9670,
+                        dpct_kernel_scalar<1280>, dpct_kernel_scalar<4>>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_multi_kernel<1280, 4>(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            } else {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    /*
+                    DPCT1050: The template argument of the dpct_kernel_name
+                    could not be deduced. You need to update this code.
+                    */
+                    cgh.parallel_for<dpct_kernel_name<
+                        class gr_down_multi_kernel_6a749c,
+                        dpct_kernel_scalar<1280>, dpct_kernel_scalar<1280>>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_multi_kernel<1280>(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            }
         } else {
-            auto exp_props = sycl::ext::oneapi::experimental::properties{
-                sycl::ext::oneapi::experimental::use_root_sync};
-
-            st->submit([&](sycl::handler &cgh) {
-                sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
-                    sycl::range(smem), cgh);
-
-                cgh.parallel_for<
-                    dpct_kernel_name<class gr_down_multi_kernel_41414e,
-                                     dpct_kernel_scalar<2560>>>(
-                    sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
-                                          sycl::range(1, 1, THREADS),
-                                      sycl::range(1, 1, THREADS)),
-                    exp_props,
-                    [=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(
-                        32)]] {
-                        gr_down_multi_kernel<2560>(
-                            c, dpct_local_acc_ct1
-                                   .get_multi_ptr<sycl::access::decorated::no>()
-                                   .get());
-                    });
-            });
+            if (max4) {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    cgh.parallel_for<dpct_kernel_name<
+                        class gr_down_multi_kernel_2d8885,
+                        dpct_kernel_scalar<2560>, dpct_kernel_scalar<4>>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_multi_kernel<2560, 4>(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            } else {
+                auto exp_props = sycl::ext::oneapi::experimental::properties{
+                    sycl::ext::oneapi::experimental::use_root_sync};
+
+                st->submit([&](sycl::handler &cgh) {
+                    sycl::local_accessor<uint8_t, 1> dpct_local_acc_ct1(
+                        sycl::range(smem), cgh);
+
+                    /*
+                    DPCT1050: The template argument of the dpct_kernel_name
+                    could not be deduced. You need to update this code.
+                    */
+                    cgh.parallel_for<dpct_kernel_name<
+                        class gr_down_multi_kernel_df2ead,
+                        dpct_kernel_scalar<2560>, dpct_kernel_scalar<2560>>>(
+                        sycl::nd_range<3>(sycl::range(1, 1, DOWN_BLOCKS + 1) *
+                                              sycl::range(1, 1, THREADS),
+                                          sycl::range(1, 1, THREADS)),
+                        exp_props,
+                        [=](sycl::nd_item<3> item_ct1)
+                            [[sycl::reqd_sub_group_size(32)]] {
+                                gr_down_multi_kernel<2560>(
+                                    c, dpct_local_acc_ct1
+                                           .get_multi_ptr<
+                                               sycl::access::decorated::no>()
+                                           .get());
+                            });
+                });
+            }
         }
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, (void*) st);
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 772316fd5b5..5ae6b013a22 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -427,7 +427,7 @@ __dpct_inline__ float vec_dot_iq4_xs_q8_1(const void *__restrict__ vbq,
 // Q4_K / Q5_K gate/up and Q5_1 / Q8_0 down: llama.cpp's vec_dot_*_q8_1 (vecdotq.cuh, VDR 2 each), transcribed; the
 // Q5_1 min term is the one departure (below).  Via eddoursul/Strata 8029fa9 (iq_dot.cuh) and #255 (Q8_0,
 // gopinath87607), which agree with llama.cpp and with each other.
-constexpr int VDR_Q4_K = 2, VDR_Q5_K = 2, VDR_Q5_1 = 2, VDR_Q8_0 = 2;
+constexpr int VDR_Q4_K = 2, VDR_Q5_K = 2, VDR_Q5_1 = 2, VDR_Q5_0 = 2, VDR_Q8_0 = 2;
 
 __dpct_inline__ float vec_dot_q4_K_q8_1_impl_vmmq(
     const int *__restrict__ v, const int *__restrict__ u,
@@ -544,6 +544,38 @@ __dpct_inline__ float vec_dot_q5_K_q8_1(const void *__restrict__ vbq,
 // of the ORIGINAL activations.  That is ggml-cpu's convention (its q8_1 `s` is d * sum(q)) and the one the K-quant
 // mins above use; the scaled and the min term then see the same activation (eddoursul/Strata measured 1.1-1.2%
 // against 1.9% relative error per expert).  Result: sumi * (d5 * d8) + sumu * (m5 * d8).
+// Q5_0: llama.cpp's integer chain verbatim (vecdotq.cuh vec_dot_q5_0_q8_1_impl) -- symmetric (one delta, no
+// learned min), so unlike Q5_1 there is no min-term rounding choice to make: the constant -16 per-weight offset
+// is accounted for via the q8_1 block's `ds.y` (sum of the ORIGINAL activations), exactly as upstream.
+__dpct_inline__ float vec_dot_q5_0_q8_1(const void *__restrict__ vbq,
+                                        const block_q8_1 *__restrict__ bq8_1,
+                                        const int &kbx, const int &iqs) {
+    const block_q5_0* bq5_0 = (const block_q5_0*) vbq + kbx;
+    int sumi = 0;
+#pragma unroll
+    for (int i = 0; i < VDR_Q5_0; ++i) {
+        const int vl = get_int_b2(bq5_0->qs, iqs + i);
+        const int vh = get_int_b2(bq5_0->qh, 0) >> (4 * (iqs + i));
+        const int u0 = get_int_b4(bq8_1->qs, iqs + i), u1 = get_int_b4(bq8_1->qs, iqs + i + QI5_0);
+        int vi0 = (vl >> 0) & 0x0F0F0F0F;
+        vi0 |= (vh << 4) & 0x00000010;
+        vi0 |= (vh << 11) & 0x00001000;
+        vi0 |= (vh << 18) & 0x00100000;
+        vi0 |= (vh << 25) & 0x10000000;
+        sumi = ggml_cuda_dp4a(vi0, u0, sumi);
+        int vi1 = (vl >> 4) & 0x0F0F0F0F;
+        vi1 |= (vh >> 12) & 0x00000010;
+        vi1 |= (vh >> 5) & 0x00001000;
+        vi1 |= (vh << 2) & 0x00100000;
+        vi1 |= (vh << 9) & 0x10000000;
+        sumi = ggml_cuda_dp4a(vi1, u1, sumi);
+    }
+    const float d5 = sycl::vec<sycl::half, 1>(bq5_0->d)
+                         .convert<float, sycl::rounding_mode::automatic>()[0];
+    const float d8 = bq8_1->ds[0];
+    const float s8 = bq8_1->ds[1];
+    return d5 * (sumi * d8 - (16.0f * VDR_Q5_0 / QI5_0) * s8);
+}
 __dpct_inline__ float vec_dot_q5_1_q8_1(const void *__restrict__ vbq,
                                         const block_q8_1 *__restrict__ bq8_1,
                                         const int &kbx, const int &iqs) {
@@ -615,14 +647,16 @@ template<> struct Fmt<13> { static constexpr int qk = 256, ipb = QI5_K / VDR_Q5_
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q5_K_q8_1(v, y, kbx, iqs); } };
 template<> struct Fmt<7> { static constexpr int qk = 32, ipb = QI5_1 / VDR_Q5_1, step = VDR_Q5_1;
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q5_1_q8_1(v, y, kbx, iqs); } };
+template<> struct Fmt<6> { static constexpr int qk = 32, ipb = QI5_0 / VDR_Q5_0, step = VDR_Q5_0;
+    static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q5_0_q8_1(v, y, kbx, iqs); } };
 template<> struct Fmt<8> { static constexpr int qk = 32, ipb = QI8_0 / VDR_Q8_0, step = VDR_Q8_0;
     static float dot(const void* v, const block_q8_1* y, int kbx, int iqs) { return vec_dot_q8_0_q8_1(v, y, kbx, iqs); } };
 
 // The formats of each role, one list each so a type cannot be in one switch and missing from another.  Every
 // entry is a kernel template for each CUDA architecture of the build, hence two lists rather than one.
-#define STRATA_GU_FMTS(X) X(16) X(17) X(18) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(8)
-#define STRATA_D_FMTS(X) X(20) X(23) X(42) X(7) X(8)
-#define STRATA_MMVQ_FMTS(X) X(16) X(17) X(18) X(20) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(7) X(8)
+#define STRATA_GU_FMTS(X) X(16) X(17) X(18) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(6) X(8)
+#define STRATA_D_FMTS(X) X(20) X(23) X(42) X(7) X(6) X(8)
+#define STRATA_MMVQ_FMTS(X) X(16) X(17) X(18) X(20) X(21) X(22) X(23) X(29) X(42) X(12) X(13) X(7) X(6) X(8)
 
 __dpct_inline__ float warp_sum(float v) {
 #pragma unroll
@@ -1576,10 +1610,10 @@ __dpct_inline__ void swiglu_q8_1_entries_kernel(
         const float h = (g / (1.0f + __expf(-g))) * up[i];
 #else
         /*
-        DPCT1013: The rounding mode could not be specified and the generated
-        code may have different accuracy than the original code. Verify the
-        correctness. SYCL math built-in function rounding mode is aligned with
-        OpenCL C 1.2 standard.
+        DPCT1013: The rounding mode could not be specified and the
+        generated code may have different accuracy than the original code.
+        Verify the correctness. SYCL math built-in function rounding mode is
+        aligned with OpenCL C 1.2 standard.
         */
         const float h = (g / (1.0f + sycl::native::exp(-g))) * up[i];
 #endif
@@ -1841,6 +1875,24 @@ inline void dq_q5_k(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     }
 }
 template <typename dst_t>
+inline void dq_q5_0(const void *vx, int64_t ibs, dst_t *yy, int tid) {
+    // symmetric: one delta (no min), the high bit folded in then centered by the format's fixed -16 offset
+    const block_q5_0* x = (const block_q5_0*) vx + ibs * (QK_K / QK5_0);
+    const int ib = tid % 8, il = tid / 8;
+    const float d = sycl::vec<sycl::half, 1>(x[ib].d)
+                        .convert<float, sycl::rounding_mode::automatic>()[0];
+    uint32_t qh;
+    memcpy(&qh, x[ib].qh, sizeof(qh));
+    dst_t* y = yy + 32 * ib;
+    for (int j = 0; j < 4; ++j) {
+        const int iqs = 4 * il + j;
+        const int xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
+        const int xh_1 = ((qh >> (iqs + 12))) & 0x10;
+        y[iqs] = cvt<dst_t>(((float) ((x[ib].qs[iqs] & 0xf) | xh_0) - 16.0f) * d);
+        y[iqs + 16] = cvt<dst_t>(((float) ((x[ib].qs[iqs] >> 4) | xh_1) - 16.0f) * d);
+    }
+}
+template <typename dst_t>
 inline void dq_q5_1(const void *vx, int64_t ibs, dst_t *yy, int tid) {
     const block_q5_1* x = (const block_q5_1*) vx + ibs * (QK_K / QK5_1);
     const int ib = tid % 8, il = tid / 8;
@@ -1902,6 +1954,7 @@ dq_dispatch(int ty, const void *vx, int64_t ibs, dst_t *y, int tid) {
         case 12: dq_q4_k(vx, ibs, y, tid); break;
         case 13: dq_q5_k(vx, ibs, y, tid); break;
         case 7: dq_q5_1(vx, ibs, y, tid); break;
+        case 6: dq_q5_0(vx, ibs, y, tid); break;
         case 8: dq_q8_0(vx, ibs, y, tid); break;
         case 30: dq_bf16(vx, ibs, y, tid); break;
         default: break;
@@ -1932,7 +1985,7 @@ __dpct_inline__ void dequant_gu_kernel(
 // the types dq_dispatch dequantizes
 bool is_iq(int t) {
     return t == 16 || t == 17 || t == 18 || t == 20 || t == 21 || t == 22 || t == 23 || t == 29 || t == 42 || t == 11 ||
-           t == 12 || t == 13 || t == 7 || t == 8;
+           t == 12 || t == 13 || t == 7 || t == 6 || t == 8;
 }
 // values per block of the types the grouped expert kernels take (0 = none)
 int gu_qk(int t) {
@@ -2253,6 +2306,7 @@ size_t iq_row_bytes(int t, int64_t n) noexcept {
         case 12: return (size_t) (n / 256) * sizeof(block_q4_K);
         case 13: return (size_t) (n / 256) * sizeof(block_q5_K);
         case 7: return (size_t) (n / 32) * sizeof(block_q5_1);
+        case 6: return (size_t) (n / 32) * sizeof(block_q5_0);
         case 8: return (size_t) (n / 32) * sizeof(block_q8_0);
         case 30: return (size_t) n * 2;   // BF16: the token embedding only (iq_embed_rows, iq_dequant_f32)
         default: return 0;
@@ -2501,7 +2555,7 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
                 sycl::ext::oneapi::experimental::use_root_sync};
 
             s->parallel_for<
-                dpct_kernel_name<class quantize_q8_1_kernel_2f9312>>(
+                dpct_kernel_name<class quantize_q8_1_kernel_cfb6c5>>(
                 sycl::nd_range<3>(
                     sycl::range(1, 1, (unsigned)((nh + 255) / 256)) *
                         sycl::range(1, 1, 256),
diff --git a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
index 22be5e4def3..0744998e1f7 100644
--- a/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_prompt_attn.dp.cpp
@@ -103,20 +103,24 @@ __dpct_inline__ uint32_t pack_h2(float lo_k,
 // KV_MODE 1: int8 codes + fp16 scale per 64 values. KV_MODE 0: fp16 values (scales 1).
 // KV_MODE 3 (hybrid K8V4): K as mode 1, V as mode 0 - the row's q4_0 blocks are dequantized to fp16 at
 // gather, so everything downstream of the load is the mode-0 V path; the caller un-rotates the output.
+// KV_MODE 4 (Q4_0 K and V, `--kv q4_0`): mode 1 with a scale per 32 values - each q4_0 block's codes enter as exact
+// int8 (code - 8) and its fp16 scale is applied in FP32, as mode 1's are; the caller rotates q and un-rotates the
+// output (kv_q4.hpp).
 template <int KV_MODE>
 struct Smem {
     using KElem =
         typename std::conditional<KV_MODE == 0, sycl::half, int8_t>::type;
-    using VElem =
-        typename std::conditional<KV_MODE == 1, int8_t, sycl::half>::type;
+    using VElem = typename std::conditional<KV_MODE == 1 || KV_MODE == 4,
+                                            int8_t, sycl::half>::type;
     static constexpr int KROW = KV_MODE == 0 ? HD + 8 : HD + 16;   // elements; 16-byte aligned rows, banks spread
-    static constexpr int VROW = KV_MODE == 1 ? HD + 16 : HD + 8;
+    static constexpr int VROW = (KV_MODE == 1 || KV_MODE == 4) ? HD + 16 : HD + 8;
+    static constexpr int NG = KV_MODE == 4 ? HD / QK4_0 : 4;      // scale groups per row (q4_0: 8 of 32, else 4 of 64)
     sycl::half qh[16][QS];
     sycl::half ql[16][QS];
     KElem k[CH][KROW];
     VElem v[CH][VROW];
-    float ks[CH][4];
-    float vs[CH][4];
+    float ks[CH][NG];
+    float vs[CH][NG];
     float s[16][CH + 1];
     float qmax[THREADS / 32];
     float alpha[16];
@@ -235,7 +239,71 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                             // k, v, s
         // gather the chunk's K and V rows (16-byte pieces; K8V4's V as q4_0 blocks dequantized to fp16)
         // and their scales
-        {
+        if constexpr (KV_MODE == 4) {
+            // q4_0 K and V: one (K or V, cell, block) per item - the block's 16 code bytes (2-byte aligned: eight
+            // 16-bit loads) become 32 exact int8 codes (element j in the low nibble of byte j, j + 16 in the high
+            // one), its fp16 scale goes to ks/vs
+            constexpr int BLKS = HD / QK4_0;
+            constexpr int BYTES = BLKS * (int) sizeof(block_q4_0);
+            for (int i = t; i < 2 * CH * BLKS; i += THREADS) {
+                const int kv = i / (CH * BLKS), rem = i % (CH * BLKS), c = rem / BLKS, b = rem % BLKS;
+                const long long r = S.row[c];
+                sycl::uint4 lo = sycl::uint4(0, 0, 0, 0),
+                            hi = sycl::uint4(0, 0, 0, 0);
+                float d = 0.0f;
+                if (r >= 0) {
+                    const block_q4_0* blk = reinterpret_cast<const block_q4_0*>((kv == 0 ? p.k_q4 : p.v_q4) + r * BYTES) + b;
+                    /*
+                    DPCT1098: The '*' expression is used instead of the
+                    __ldg call. These two expressions do not provide the exact
+                    same functionality. Check the generated code for potential
+                    precision and/or performance issues.
+                    */
+                    d = sycl::vec<sycl::half, 1>(
+                            sycl::bit_cast<sycl::half, unsigned short>(blk->d))
+                            .convert<float,
+                                     sycl::rounding_mode::automatic>()[0];
+                    const uint16_t* q16 = reinterpret_cast<const uint16_t*>(blk->qs);
+                    uint32_t w[4];
+#pragma unroll
+                    for (int j = 0; j < 4; ++j)
+                        /*
+                        DPCT1098: The '*' expression is used instead of the
+                        __ldg call. These two expressions do not provide the
+                        exact same functionality. Check the generated code for
+                        potential precision and/or performance issues.
+                        */
+                        w[j] = (uint32_t)*(q16 + 2 * j) |
+                               ((uint32_t)*(q16 + 2 * j + 1) << 16);
+                    // per byte: the low nibble minus 8 is element j, the high one minus 8 element j + 16
+                    lo = sycl::uint4(
+                        dpct::vectorized_binary<sycl::uchar4>(
+                            w[0] & 0x0F0F0F0Fu, 0x08080808u, std::minus<>()),
+                        dpct::vectorized_binary<sycl::uchar4>(
+                            w[1] & 0x0F0F0F0Fu, 0x08080808u, std::minus<>()),
+                        dpct::vectorized_binary<sycl::uchar4>(
+                            w[2] & 0x0F0F0F0Fu, 0x08080808u, std::minus<>()),
+                        dpct::vectorized_binary<sycl::uchar4>(
+                            w[3] & 0x0F0F0F0Fu, 0x08080808u, std::minus<>()));
+                    hi = sycl::uint4(dpct::vectorized_binary<sycl::uchar4>(
+                                         (w[0] >> 4) & 0x0F0F0F0Fu, 0x08080808u,
+                                         std::minus<>()),
+                                     dpct::vectorized_binary<sycl::uchar4>(
+                                         (w[1] >> 4) & 0x0F0F0F0Fu, 0x08080808u,
+                                         std::minus<>()),
+                                     dpct::vectorized_binary<sycl::uchar4>(
+                                         (w[2] >> 4) & 0x0F0F0F0Fu, 0x08080808u,
+                                         std::minus<>()),
+                                     dpct::vectorized_binary<sycl::uchar4>(
+                                         (w[3] >> 4) & 0x0F0F0F0Fu, 0x08080808u,
+                                         std::minus<>()));
+                }
+                int8_t* dst = kv == 0 ? &S.k[c][b * QK4_0] : &S.v[c][b * QK4_0];
+                reinterpret_cast<sycl::uint4 *>(dst)[0] = lo;
+                reinterpret_cast<sycl::uint4 *>(dst)[1] = hi;
+                (kv == 0 ? S.ks : S.vs)[c][b] = d;
+            }
+        } else {
             constexpr int KPIECES = HD * (int) sizeof(typename Smem<KV_MODE>::KElem) / 16;   // per K row
             for (int i = t; i < CH * KPIECES; i += THREADS) {
                 const int c = i / KPIECES, pc = i % KPIECES;
@@ -375,17 +443,18 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
-        // scores: warp w takes cells 8w..8w+7 (one n-tile) over all 256 dims, per 64-dim scale group
+        // scores: warp w takes cells 8w..8w+7 (one n-tile) over all 256 dims, per scale group (64 dims; q4_0's 32)
+        constexpr int NG = Smem<KV_MODE>::NG, KPG = HD / 16 / NG;   // groups per row, 16-dim MMA steps per group
 #pragma unroll
         for (int nt = 0; nt < CH / 32; ++nt) {
             const int cb = (warp + 4 * nt) * 8;
             float sc[4] = {0.f, 0.f, 0.f, 0.f};
 #pragma unroll
-            for (int g = 0; g < 4; ++g) {
+            for (int g = 0; g < NG; ++g) {
                 float tg[4] = {0.f, 0.f, 0.f, 0.f};
 #pragma unroll
-                for (int kk = 0; kk < 4; ++kk) {
-                    const int k0 = (g * 4 + kk) * 16;
+                for (int kk = 0; kk < KPG; ++kk) {
+                    const int k0 = (g * KPG + kk) * 16;
                     uint32_t ah[4], al[4], b[2];
                     ah[0] = *reinterpret_cast<const uint32_t*>(&S.qh[gid][k0 + 2 * tig]);
                     ah[1] = *reinterpret_cast<const uint32_t*>(&S.qh[gid + 8][k0 + 2 * tig]);
@@ -489,14 +558,23 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
         better performance if there is no access to global memory.
         */
         item_ct1.barrier();
-        // p.v: warp w owns dims [64w, 64w+64), which is int8 scale group w. The scale is folded into p relative to
-        // the chunk's largest, times 2^14 (p' <= 2^14: its lo half stays out of FP16's subnormal range); the chunk's
-        // sum is then added to the running one in FP32 with the factor taken back out
+        // p.v: warp w owns dims [64w, 64w+64), which is int8 scale group w (q4_0: groups 2w and 2w+1, four n-tiles
+        // each). A group's scale is folded into p relative to the chunk's largest magnitude (q4_0's scales are signed:
+        // ggml's d = max / -8), times 2^14 (|p'| <= 2^14: inside FP16's range, its lo half out of the subnormals); the
+        // chunk's sum is then added to the running one in FP32 with the factor taken back out
         {
+            constexpr int GPW = NG / 4, JPG = 8 / GPW;   // scale groups per warp, n-tiles per group
+            float vdown_g[GPW];
+            float tmp[8][4];
+#pragma unroll
+            for (int j = 0; j < 8; ++j) tmp[j][0] = tmp[j][1] = tmp[j][2] = tmp[j][3] = 0.0f;
+#pragma unroll
+            for (int gi = 0; gi < GPW; ++gi) {
+            const int vg = warp * GPW + gi;
             float vmax = 0.0f;
 #pragma unroll
             for (int c = lane; c < CH; c += 32)
-                vmax = sycl::fmax(vmax, S.vs[c][warp]);
+                vmax = sycl::fmax(vmax, sycl::fabs(S.vs[c][vg]));
 #pragma unroll
             /*
             DPCT1108: '__shfl_xor_sync' was migrated with the experimental
@@ -508,15 +586,13 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                           0xffffffffu,
                           sycl::ext::oneapi::this_work_item::get_sub_group(),
                           vmax, o));
-            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f, vdown = vmax * (1.0f / 16384.0f);
-            float tmp[8][4];
-#pragma unroll
-            for (int j = 0; j < 8; ++j) tmp[j][0] = tmp[j][1] = tmp[j][2] = tmp[j][3] = 0.0f;
+            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f;
+            vdown_g[gi] = vmax * (1.0f / 16384.0f);
 #pragma unroll
             for (int ks = 0; ks < CH / 16; ++ks) {
                 const int cA = ks * 16 + 2 * tig, cB = cA + 8;
-                const float w0 = S.vs[cA][warp] * vup, w1 = S.vs[cA + 1][warp] * vup, w2 = S.vs[cB][warp] * vup,
-                            w3 = S.vs[cB + 1][warp] * vup;
+                const float w0 = S.vs[cA][vg] * vup, w1 = S.vs[cA + 1][vg] * vup, w2 = S.vs[cB][vg] * vup,
+                            w3 = S.vs[cB + 1][vg] * vup;
                 const float p00 = S.s[gid][cA] * w0, p01 = S.s[gid][cA + 1] * w1;
                 const float p10 = S.s[gid + 8][cA] * w0, p11 = S.s[gid + 8][cA + 1] * w1;
                 const float p02 = S.s[gid][cB] * w2, p03 = S.s[gid][cB + 1] * w3;
@@ -544,10 +620,11 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
                         al[3] = pack_h2(p12 - f.x(), p13 - f.y());
                 }
 #pragma unroll
-                for (int j = 0; j < 8; ++j) {
+                for (int jj = 0; jj < JPG; ++jj) {
+                    const int j = gi * JPG + jj;
                     const int d = warp * 64 + j * 8 + gid;
                     uint32_t b[2];
-                    if constexpr (KV_MODE == 1) {
+                    if constexpr (KV_MODE == 1 || KV_MODE == 4) {
                         const uint32_t x0 = (uint8_t) S.v[cA][d] | ((uint32_t) (uint8_t) S.v[cA + 1][d] << 8);
                         const uint32_t x1 = (uint8_t) S.v[cB][d] | ((uint32_t) (uint8_t) S.v[cB + 1][d] << 8);
                         b[0] = i8x2_to_h2(x0);
@@ -566,9 +643,11 @@ prompt_attn_kernel(const float *__restrict__ q, QsaAttnPools p,
 #endif
                 }
             }
+            }
             const float a0 = S.alpha[gid], a1 = S.alpha[gid + 8];
 #pragma unroll
             for (int j = 0; j < 8; ++j) {
+                const float vdown = vdown_g[j / JPG];
                 acc[j][0] = sycl::fma(acc[j][0], (float)a0, tmp[j][0] * vdown);
                 acc[j][1] = sycl::fma(acc[j][1], (float)a0, tmp[j][1] * vdown);
                 acc[j][2] = sycl::fma(acc[j][2], (float)a1, tmp[j][2] * vdown);
@@ -1458,10 +1537,8 @@ bool launch_wmma(const float* q, const QsaAttnPools& pools, const int32_t* ids,
 
 }  // namespace
 
-bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
-                           const int32_t *ids, const int32_t *steps,
-                           int64_t cap, const QsaShapes &s, float *attn,
-                           int64_t n_q, void *stream) try {
+bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps,
+                           int64_t cap, const QsaShapes& s, float* attn, int64_t n_q, void* stream) {
     if (n_q <= 0) return true;
     bool turing = false;   // per call, from the CURRENT device (a layer split can mix Turing with newer cards)
     {   // sm_75 or newer: the MMA above compiles for both.  sm_80+ runs the cp.async kernel (launch_i8); Turing has
@@ -1511,10 +1588,18 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
         return launch_wmma(q, pools, ids, steps, cap, s, attn, n_q, (cudaStream_t) stream);
     return false;
 #endif
-    if (pools.k_q4 != nullptr || s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids ||
-        !steps || !pools.page_table)
+    if (s.head_dim != HD || s.n_head != (int64_t) G * s.n_head_kv || cap <= 0 || !ids || !steps || !pools.page_table)
         return false;
     dpct::queue_ptr st = strata::q_of(stream);
+    if (pools.k_q4 != nullptr) {   // Q4_0 K and V (--kv q4_0): mode 4.  STRATA_PROMPT_ATTN_Q4=0: the old kernel (A/B)
+        static const bool q4_off = [] {
+            const char* v = std::getenv("STRATA_PROMPT_ATTN_Q4");
+            return v != nullptr && v[0] == '0';
+        }();
+        // sm_80+ only: on Turing mode 4 would run as pairs of m16n8k8 MMAs, which no parity run has checked yet
+        if (q4_off || turing || pools.v_q4 == nullptr) return false;
+        return launch<4>(q, pools, ids, steps, cap, s, attn, n_q, st);
+    }
     if (pools.k_q != nullptr && pools.v_q4 != nullptr) {   // hybrid K8V4: int8 K + dequantized-q4 V
         if (!pools.k_scale) return false;
         return launch<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
@@ -1531,10 +1616,5 @@ bool qsa_prompt_attn_batch(const float *q, const QsaAttnPools &pools,
     if (!pools.k_pool || !pools.v_pool) return false;
     return launch<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
 }
-catch (sycl::exception const &exc) {
-  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-            << ", line:" << __LINE__ << std::endl;
-  std::exit(1);
-}
 
 }  // namespace strata::kernels
diff --git a/sycl/src/kernels/cuda/qsa_select.dp.cpp b/sycl/src/kernels/cuda/qsa_select.dp.cpp
index d562f00c54a..a4ed9bf8d92 100644
--- a/sycl/src/kernels/cuda/qsa_select.dp.cpp
+++ b/sycl/src/kernels/cuda/qsa_select.dp.cpp
@@ -925,6 +925,362 @@ auto &qs = *sycl::ext::oneapi::group_local_memory_for_overwrite<
         }
     }
 }
+
+#if !defined(__HIPCC__)
+// ---- the decode top-k on a thread-block cluster (sm_90+; S19).  One CTA per query (block_topk_reg_kernel, or
+// block_topk_kernel above 33,792 blocks: a --max-context over ~135K) makes four radix passes and two scans over up to
+// 65,538 blocks on ONE SM while the rest of the GPU idles - a decode window has 1-5 queries.  Here a cluster of CL_N
+// CTAs shares a query: CTA r holds the keys of blocks [r * per, (r + 1) * per) in shared memory, builds the digit
+// histogram of its keys, and PUSHES it into slot r of every CTA's `hin` (distributed shared memory); after one cluster
+// barrier each CTA sums the CL_N slots itself, so all of them take the same digit.  The emit pass needs each CTA's
+// cells above / at the threshold: pushed the same way, then each CTA offsets its own by the ranks before it.
+// RTX 5070, per call at capacity = context (decode_cluster_parity --bench): 21.9 -> 15.6 us at 32K, 58 -> 18 at 128K,
+// 200 -> 22 at 262K (the one-CTA kernels' digit search was serial, too: one thread over 256 bins per pass).
+//
+// IDENTICAL IDS, by construction rather than by luck: the threshold thr (the width-th largest key, cells counted with
+// their weights) and `above` (cells with a larger key) are pure functions of the multiset of (key, weight) - integer
+// histograms, summed in any order - and the digit rule is block_topk_kernel's, written as a scan (the largest digit d
+// whose cells at or above it reach `need`; 0 when none). The cells emitted are then fixed: every cell of a block with
+// key > thr, and the first eq_budget = width - above cells at thr in ascending order (a block at thr may be cut),
+// written in ascending cell order. Position of a thread's first cell = (cells above thr before it) + min(cells at thr
+// before it, eq_budget): the telescoped sum of the reference's per-thread clamp. NaN keys are 0 (order_key) as there.
+//
+// Barriers: barrier.cluster arrive / wait (each CTA's threads all take part; it also orders the CTA's own shared
+// memory, so it doubles as __syncthreads). Phase 0 is a relaxed arrive at entry, waited before the first remote store
+// (a CTA's shared memory exists once it runs). Pushes go out before the arrive that releases them, and nothing reads
+// another CTA's memory after the last wait - so a CTA may exit without a closing barrier (a wait counts the threads
+// that have not exited). `hin` alternates by pass parity: CTA x reads slot buffer p&1 in pass p before arriving at
+// pass p+1's barrier, and nobody writes buffer p&1 again (pass p+2) before waiting on that barrier.
+constexpr int CL_N = 8;        // CTAs per query (the portable cluster size)
+constexpr int CL_T = 1024;     // threads per CTA
+constexpr int CL_MAXQ = 16;    // larger calls (prefill sub-batches) fill the GPU with one CTA per query already
+#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP >= 900
+#define STRATA_SEL_CLUSTER 1
+#else
+#define STRATA_SEL_CLUSTER 0   // an older target's code is a trap; qsa_block_topk_cluster never launches it there
+#endif
+
+#if STRATA_SEL_CLUSTER
+__dpct_inline__ void cl_arrive_relaxed() {
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("barrier.cluster.arrive.relaxed.aligned;\n" ::: "memory");
+}
+/*
+DPCT1053: Migration of device assembly code is not supported.
+*/
+__dpct_inline__ void cl_arrive() {
+    asm volatile("barrier.cluster.arrive.release.aligned;\n" :: : "memory");
+}
+/*
+DPCT1053: Migration of device assembly code is not supported.
+*/
+__dpct_inline__ void cl_wait() {
+    asm volatile("barrier.cluster.wait.acquire.aligned;\n" :: : "memory");
+}
+__dpct_inline__ unsigned cl_rank() {
+    unsigned r;
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("mov.u32 %0, %%cluster_ctarank;\n" : "=r"(r));
+    return r;
+}
+template <typename T>
+__dpct_inline__ T *cl_map(T *p,
+                          unsigned rank) { // p in CTA `rank`'s shared memory
+    uint64_t o;
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("mapa.u64 %0, %1, %2;\n"
+                 : "=l"(o)
+                 : "l"((uint64_t)p), "r"(rank));
+    return reinterpret_cast<T*>(o);
+}
+// exclusive block scan of a 64-bit value over CL_T threads; `total` = the CTA's sum
+__dpct_inline__ unsigned long long cl_excl_scan64(unsigned long long v,
+                                                  unsigned long long *s_warp,
+                                                  unsigned long long &total) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    const int lane = item_ct1.get_local_id(2) & 31,
+              warp = item_ct1.get_local_id(2) >> 5;
+    unsigned long long x = v;
+#pragma unroll
+    for (int o = 1; o < 32; o <<= 1) {
+        /*
+        DPCT1108: '__shfl_up_sync' was migrated with the experimental feature
+        masked sub_group function which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        const unsigned long long y = dpct::experimental::shift_sub_group_right(
+            0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(), x,
+            o);
+        if (lane >= o) x += y;
+    }
+    if (lane == 31) s_warp[warp] = x;
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    if (warp == 0) {
+        const unsigned long long w = s_warp[lane];
+        unsigned long long z = w;
+#pragma unroll
+        for (int o = 1; o < 32; o <<= 1) {
+            /*
+            DPCT1108: '__shfl_up_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            const unsigned long long y =
+                dpct::experimental::shift_sub_group_right(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), z, o);
+            if (lane >= o) z += y;
+        }
+        s_warp[lane] = z - w;
+        if (lane == 31) s_warp[32] = z;
+    }
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    total = s_warp[32];
+    return s_warp[warp] + x - v;
+}
+#endif
+
+// grid (CL_N, nq), cluster (CL_N, 1, 1), CL_T threads, dynamic shared memory: ceil(max_blocks / CL_N) keys
+/*
+DPCT1110: The total declared local variable size in device function
+block_topk_cluster_kernel exceeds 128 bytes and may cause high register
+pressure. Consult with your hardware vendor to find the total register size
+available and adjust the code, or use smaller sub-group size to avoid high
+register pressure.
+*/
+void block_topk_cluster_kernel(const float *__restrict__ scores,
+                               const int32_t *__restrict__ steps,
+                               int64_t max_blocks, int64_t cap,
+                               int32_t *__restrict__ ids, uint8_t *dpct_local) {
+#if STRATA_SEL_CLUSTER
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+    auto keys = (uint32_t *)dpct_local; // this CTA's blocks' keys
+    auto &hin =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[2][CL_N][256]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // the cluster's histograms, slot = the pushing rank
+    auto &hloc =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[2][256]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // this CTA's histogram
+    auto &cnt = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        unsigned long long[CL_N]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<
+            3>()); // per rank: its cells above thr (low 32 bits) and at it
+                   // (high)
+    auto &s_warp = *sycl::ext::oneapi::group_local_memory_for_overwrite<
+        unsigned long long[33]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_prefix =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<uint32_t>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &s_above = *sycl::ext::oneapi::group_local_memory_for_overwrite<int>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    const unsigned rank = cl_rank();
+    const int t = item_ct1.get_local_id(2), lane = t & 31, warp = t >> 5;
+    cl_arrive_relaxed();                                // phase 0: this CTA runs
+    const int64_t qi = item_ct1.get_group(1);
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid], width = st[kStepWidth];
+    int32_t* out = ids + qi * cap;
+    if (n_kv <= width) {                                // the identity, split over the cluster; no remote access
+#pragma unroll
+        for (int64_t j = (int64_t)rank * CL_T + t; j < n_kv;
+             j += (int64_t)CL_N * CL_T) out[j] = (int32_t)j;
+        return;
+    }
+    // the tail block n_bid weighs its cells (0..3); with none it is not a candidate (the reference skips w == 0)
+    const int wtail = (int) (n_kv - n_bid * R);
+    const int64_t nbe = n_bid + (wtail > 0 ? 1 : 0);
+    const int64_t per = (nbe + CL_N - 1) / CL_N;       // <= ceil(max_blocks / CL_N), the keys the host sized
+    const int64_t lo = (int64_t) rank * per < nbe ? (int64_t) rank * per : nbe;
+    const int64_t hi = lo + per < nbe ? lo + per : nbe;
+    const int n = (int) (hi - lo);
+    const int tail_i = (wtail > 0 && n_bid >= lo && n_bid < hi) ? (int) (n_bid - lo) : -1;
+    const float* sc = scores + qi * max_blocks + lo;
+#pragma unroll
+    for (int i = t; i < n; i += CL_T) keys[i] = order_key(sc[i]);
+#pragma unroll
+    for (int i = t; i < 2 * 256; i += CL_T)(&hloc[0][0])[i] = 0;
+    /*
+    DPCT1065: Consider replacing sycl::nd_item::barrier() with
+    sycl::nd_item::barrier(sycl::access::fence_space::local_space) for better
+    performance if there is no access to global memory.
+    */
+    item_ct1.barrier();
+    uint32_t prefix = 0;
+    int above = 0;                                      // cells strictly above the digits fixed so far
+    for (int pass = 0; pass < 4; ++pass) {
+        const int shift = 24 - 8 * pass;
+        const uint32_t hmask = pass == 0 ? 0u : (0xffffffffu << (shift + 8));
+        int* hl = hloc[pass & 1];
+        // warp-aggregated: the scores share their top bits, so plain atomics would queue on a few bins
+        for (int i0 = 0; i0 < n; i0 += CL_T) {
+            const int i = i0 + t;
+            int bin = -1;
+            if (i < n) {
+                const uint32_t k = keys[i];
+                if ((k & hmask) == prefix) bin = (int) ((k >> shift) & 255);
+            }
+            const unsigned same = dpct::match_any_over_sub_group(
+                sycl::ext::oneapi::this_work_item::get_sub_group(), 0xffffffffu,
+                bin);
+            if (bin >= 0 && lane == dpct::ffs<int>(same) - 1)
+                dpct::atomic_fetch_add<
+                    sycl::access::address_space::generic_space>(
+                    &hl[bin], sycl::popcount(same) * R);
+            if (bin >= 0 && i == tail_i) dpct::atomic_fetch_add<
+                sycl::access::address_space::generic_space>(&hl[bin],
+                                                            wtail - R);
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        if (pass == 0) cl_wait();                       // phase 0 done: every CTA's shared memory is there
+        for (int i = t; i < CL_N * 64; i += CL_T) {     // the histogram into slot `rank` of every CTA, as int4
+            const int dst = i >> 6, c = i & 63;
+            *cl_map(reinterpret_cast<sycl::int4 *>(&hin[pass & 1][rank][0]) + c,
+                    (unsigned)dst) =
+                reinterpret_cast<const sycl::int4 *>(hl)[c];
+        }
+#pragma unroll
+        for (int i = t; i < 256; i += CL_T) hloc[(pass + 1) & 1][i] = 0;
+        cl_arrive();
+        cl_wait();
+        if (warp == 0) {
+            // lane L owns digits 255 - 8L down to 248 - 8L; the digit holding the need-th cell from the top
+            const int need = (int) width - above;
+            int tot[8], part = 0;
+#pragma unroll
+            for (int k = 0; k < 8; ++k) {
+                const int d = 255 - 8 * lane - k;
+                int v = 0;
+#pragma unroll
+                for (int r = 0; r < CL_N; ++r) v += hin[pass & 1][r][d];
+                tot[k] = v;
+                part += v;
+            }
+            int incl = part;
+#pragma unroll
+            for (int o = 1; o < 32; o <<= 1) {
+                /*
+                DPCT1108: '__shfl_up_sync' was migrated with the experimental
+                feature masked sub_group function which may not be supported by
+                all compilers or runtimes. You may need to adjust the code.
+                */
+                const int y = dpct::experimental::shift_sub_group_right(
+                    0xffffffffu,
+                    sycl::ext::oneapi::this_work_item::get_sub_group(), incl,
+                    o);
+                if (lane >= o) incl += y;
+            }
+            const int excl = incl - part;
+            const unsigned hit = sycl::reduce_over_group(
+                sycl::ext::oneapi::this_work_item::get_sub_group(),
+                (0xffffffffu &
+                 (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                             .get_local_linear_id())) &&
+                        excl < need && incl >= need
+                    ? (0x1 << sycl::ext::oneapi::this_work_item::get_sub_group()
+                                  .get_local_linear_id())
+                    : 0,
+                sycl::ext::oneapi::plus<>());
+            // no hit cannot happen (the cells total n_kv > width); the reference would then take digit 0
+            const int who = hit ? dpct::ffs<int>(hit) - 1 : 31;
+            if (lane == who) {
+                int acc = excl, k = 0;
+#pragma unroll
+                for (; k < 7; ++k) {
+                    if (acc + tot[k] >= need) break;
+                    acc += tot[k];
+                }
+                s_prefix = prefix | ((uint32_t) (255 - 8 * lane - k) << shift);
+                s_above = above + acc;
+            }
+        }
+        /*
+        DPCT1118: SYCL group functions and algorithms must be encountered in
+        converged control flow. You may need to adjust the code.
+        */
+        /*
+        DPCT1065: Consider replacing sycl::nd_item::barrier() with
+        sycl::nd_item::barrier(sycl::access::fence_space::local_space) for
+        better performance if there is no access to global memory.
+        */
+        item_ct1.barrier();
+        prefix = s_prefix;
+        above = s_above;
+    }
+    const uint32_t thr = prefix;
+    const int64_t eq_budget = width - above;           // cells at thr that fit, lowest index first
+    // each thread a contiguous run of the CTA's keys; an odd run length keeps the shared reads conflict-free
+    int seg = (n + CL_T - 1) / CL_T;
+    if ((seg & 1) == 0 && seg > 0) ++seg;
+    const int s0 = t * seg < n ? t * seg : n, s1 = s0 + seg < n ? s0 + seg : n;
+    uint32_t gt = 0, eq = 0;
+    for (int i = s0; i < s1; ++i) {
+        const uint32_t k = keys[i], w = i == tail_i ? (uint32_t) wtail : (uint32_t) R;
+        if (k > thr) gt += w;
+        else if (k == thr) eq += w;
+    }
+    unsigned long long cta;
+    const unsigned long long before =
+        cl_excl_scan64((unsigned long long) gt | ((unsigned long long) eq << 32), s_warp, cta);
+    if (t < CL_N) *cl_map(&cnt[rank], (unsigned) t) = cta;
+    cl_arrive();
+    cl_wait();
+    int64_t gt_off = 0, eq_off = 0;
+#pragma unroll
+    for (unsigned r = 0; r < rank; ++r) {
+        gt_off += (int64_t) (cnt[r] & 0xffffffffu);
+        eq_off += (int64_t) (cnt[r] >> 32);
+    }
+    const int64_t eq_before = eq_off + (int64_t) (before >> 32);
+    int64_t wpos = gt_off + (int64_t) (before & 0xffffffffu) + (eq_before < eq_budget ? eq_before : eq_budget);
+    int64_t eq_left = eq_budget - eq_before;
+    if (eq_left < 0) eq_left = 0;
+    for (int i = s0; i < s1; ++i) {
+        const uint32_t k = keys[i];
+        const int w = i == tail_i ? wtail : R;
+        const int64_t b = lo + i;
+        if (k > thr) {
+#pragma unroll
+            for (int c = 0; c < w; ++c) out[wpos++] = (int32_t)(b * R + c);
+        } else if (k == thr) {
+#pragma unroll
+            for (int c = 0; c < w && eq_left > 0; ++c, --eq_left)
+                out[wpos++] = (int32_t)(b * R + c);
+        }
+    }
+#else
+    (void) scores; (void) steps; (void) max_blocks; (void) cap; (void) ids;
+    /* unreachable on SYCL: the launcher refuses this device */
+#endif
+}
+#endif  // !__HIPCC__
 }  // namespace
 
 void qsa_block_scores(const float* pooled, const float* dead, const float* q_idx, const int32_t* steps, int64_t nq,
@@ -1173,21 +1529,171 @@ void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, i
     */
 }
 
+#if !defined(__HIPCC__)
+// Only Turing has a retained model measurement for this CUDA dispatch. Other CUDA devices keep the capacity rule
+// (the RTX 5070 regression below). Cache the properties per calling thread; layer-split device switches are checked.
+static bool topk_active_turing_device() try {
+    int dev = 0;
+    if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) !=
+        0) return false;
+    static thread_local int cached_device = -1;
+    static thread_local bool turing = false;
+    if (dev != cached_device) {
+        dpct::device_info prop{};
+        if (DPCT_CHECK_ERROR(dpct::get_device(dev).get_device_info(prop)) !=
+            0) return false;
+        /*
+        DPCT1005: The SYCL device version is different from CUDA Compute
+        Compatibility. You may need to rewrite this code.
+        */
+        turing = prop.get_major_version() == 7 && prop.get_minor_version() == 5;
+        cached_device = dev;
+    }
+    return turing;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+#endif
+
+bool qsa_block_topk_cluster(const float *scores, const int32_t *steps,
+                            int64_t nq, int64_t max_blocks, int64_t cap,
+                            const QsaShapes &s, int32_t *ids,
+                            void *stream) try {
+#if 1   // SYCL port: no thread-block clusters (sm_90): the caller takes the plain top-k
+    (void) scores; (void) steps; (void) nq; (void) max_blocks; (void) cap; (void) s; (void) ids; (void) stream;
+    return false;
+#else
+    if (nq <= 0) return true;
+    if (s.idx_block != R || cap < qsa_selection_width(kTopkMaxCells, s) || nq > 65535 || max_blocks <= 0) return false;
+    const size_t smem = (size_t) ((max_blocks + CL_N - 1) / CL_N) * sizeof(uint32_t);
+    // Per device (a layer split runs on several): 1 the cluster kernel runs here, 2 it does not. It needs sm_90+ (the
+    // card's, or STRATA_EMULATE_CC's) AND code built for it: a build with only older code JIT-compiles their PTX, whose
+    // copy of this kernel is a trap - the function's PTX version says which. `opt`: the dynamic shared memory opted in.
+    static int ok[64] = {};
+    static size_t opt[64] = {};
+    int dev = 0;
+    /*
+    DPCT1026: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 || dev < 0 ||
+        dev >= 64) {
+        ; return false;
+    }
+    if (ok[dev] == 0) {
+        int major = 0;
+        dpct::kernel_function_info fa{};
+        const bool code =
+            DPCT_CHECK_ERROR(
+                major = dpct::get_device(dev).get_major_version()) == 0 &&
+            strata::cc_major_of(major) >= 9 &&
+            DPCT_CHECK_ERROR(dpct::get_kernel_function_info(
+                &fa, (const void *)block_topk_cluster_kernel)) == 0 &&
+            fa.ptxVersion >= 90 && fa.binaryVersion >= 90;
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        ok[dev] = code ? 1 : 2;
+    }
+    if (ok[dev] != 1) return false;
+    if (smem > opt[dev]) {   // a larger capacity: opt in, and check that a cluster of CL_N such CTAs can be resident
+        int clusters = 0;
+        cudaLaunchConfig_t q{};
+        cudaLaunchAttribute qa[1];
+        qa[0].id = cudaLaunchAttributeClusterDimension;
+        qa[0].val.clusterDim.x = CL_N;
+        qa[0].val.clusterDim.y = 1;
+        qa[0].val.clusterDim.z = 1;
+        q.gridDim = dpct::dim3(CL_N, 1, 1);
+        q.blockDim = dpct::dim3(CL_T, 1, 1);
+        q.dynamicSmemBytes = smem;
+        q.attrs = qa;
+        q.numAttrs = 1;
+        /*
+        DPCT1027: The call to cudaFuncSetAttribute was replaced with 0
+        because SYCL currently does not support corresponding setting.
+        */
+        if (0 != 0 ||
+            /*
+            DPCT1007: Migration of cudaOccupancyMaxActiveClusters is not
+            supported.
+            */
+            cudaOccupancyMaxActiveClusters(&clusters, block_topk_cluster_kernel,
+                                           &q) != 0 ||
+            clusters < 1) {
+            /*
+            DPCT1026: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            return false; // this capacity takes the one-CTA kernels; a smaller
+                          // one may still fit
+        }
+        opt[dev] = smem;
+    }
+    cudaLaunchConfig_t cfg{};
+    cudaLaunchAttribute at[1];
+    at[0].id = cudaLaunchAttributeClusterDimension;
+    at[0].val.clusterDim.x = CL_N;
+    at[0].val.clusterDim.y = 1;
+    at[0].val.clusterDim.z = 1;
+    cfg.gridDim = dpct::dim3(CL_N, (unsigned)nq, 1);
+    cfg.blockDim = dpct::dim3(CL_T, 1, 1);
+    cfg.dynamicSmemBytes = smem;
+    cfg.stream = strata::q_of(stream);
+    cfg.attrs = at;
+    cfg.numAttrs = 1;
+    const dpct::err0 e = cudaLaunchKernelEx(
+        &cfg, block_topk_cluster_kernel, scores, steps, max_blocks, cap, ids);
+    /*
+    DPCT1009: SYCL reports errors using exceptions and does not use error
+    codes. Please replace the "get_error_string_dummy(...)" with a real
+    error-handling function.
+    */
+
+    return true;
+#endif
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
                     const QsaShapes& s, int32_t* ids, void* stream, int64_t active_blocks) {
     // keys in registers when every query's blocks fit (contexts up to ~135K cells); the same ids. STRATA_TOPK_OLD=1:
     // the kernel that reads them from memory on every pass
     static const bool old = std::getenv("STRATA_TOPK_OLD") != nullptr;
     if (nq <= 0) return;
+#if !defined(__HIPCC__)
+    // sm_90+: a cluster of CL_N CTAs per query for the calls of a few queries (decode windows); the same ids.
+    // STRATA_QSA_CLUSTER=0: the one-CTA kernels below
+    static const bool cluster = [] {
+        const char* v = std::getenv("STRATA_QSA_CLUSTER");
+        return !v || std::atoi(v) != 0;
+    }();
+    if (cluster && !old && nq <= CL_MAXQ && qsa_block_topk_cluster(scores, steps, nq, max_blocks, cap, s, ids, stream))
+        return;
+#endif
     // the blocks a query can have: the call's active count when the caller knows it (the prompt path), else the capacity.
     // Decode (no count) keeps the capacity rule and the original register width: nothing changes there.
 #if defined(__HIPCC__)
     const bool counted = active_blocks > 0;
 #else
-    // CUDA keeps 0.1.32's capacity rule: #337's dispatch was measured on RDNA4 only, and on the RTX 5070 the 64K
-    // prompts read 1-3% slower with it
-    const bool counted = false;
-    (void) active_blocks;
+    // Turing: --max-context 262144 makes the stride 65538, even while a 131K prompt's active blocks fit in
+    // TK_T * TK_PER registers. Use the prefill bound on sm_75, keeping max_blocks as the score-row stride.
+    // Other CUDA devices keep 0.1.32's capacity rule: #337 was measured on RDNA4, and RTX 5070 64K prompts were
+    // 1-3% slower. Decode/captured graphs omit the bound and never query the device here.
+    static const bool capacity_guard = std::getenv("STRATA_TOPK_CAPACITY_GUARD") != nullptr;
+    // STRATA_TOPK_ACTIVE_ANY=1 (tests): the Turing dispatch on any CUDA card, so qsa_topk_active_parity checks it
+    // on whatever card runs the tests (the kernels are the same on every architecture)
+    static const bool any_card = [] { const char* v = std::getenv("STRATA_TOPK_ACTIVE_ANY"); return v && v[0] == '1'; }();
+    const bool counted = !capacity_guard && active_blocks > 0 && active_blocks <= max_blocks &&
+                         (any_card || topk_active_turing_device());
 #endif
     const int64_t reach = counted && active_blocks < max_blocks ? active_blocks : max_blocks;
     const int64_t fit = (int64_t) TK_T * (counted ? TK_PER_MAX : TK_PER);
diff --git a/sycl/src/kernels/cuda/sampler.dp.cpp b/sycl/src/kernels/cuda/sampler.dp.cpp
index 5727fd394ca..6c86dfae816 100644
--- a/sycl/src/kernels/cuda/sampler.dp.cpp
+++ b/sycl/src/kernels/cuda/sampler.dp.cpp
@@ -10,7 +10,8 @@
 // produces a valid token, so only a comparison at the distribution level can tell them apart; the parity test
 // does that against an independently computed distribution.
 //
-// `sampler_greedy_kernel` is the plain argmax, one block per token over the vocabulary.  The sampled chain has
+// `sampler_greedy_kernel` is the plain argmax, one block per token over the vocabulary (on sm_90+ without penalties,
+// `sampler_greedy_cluster_kernel`: the same token from a cluster of 8 CTAs per row).  The sampled chain has
 // three implementations that pick the same token, bit for bit:
 //   - the SPLIT top_k (default): `sampler_split_part_kernel` cuts each row into 4,096-logit blocks over the whole
 //     GPU, each keeps its own top_k, and `sampler_split_merge_kernel` merges those lists and runs the tail;
@@ -24,6 +25,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/sampler.hpp"
 #include "strata/core/coupled_draft.hpp"
+#include "strata/core/emulate.hpp"
 
 #include <cmath>
 #include <cstdio>
@@ -222,6 +224,175 @@ sampler_greedy_kernel(const float *__restrict__ logits, int n_vocab,
     }
 }
 
+#if !defined(__HIPCC__)
+/// **THE SAME ARGMAX ON A THREAD-BLOCK CLUSTER (sm_90+, S19), FOR THE CALLS WITHOUT PENALTIES.**  One block per
+/// token reads its 1 MB row (248,320 logits) on one SM with one load in flight per thread: latency-bound, 40 us per
+/// call on an RTX 5070, for every verify window and every draft step.  Here a cluster of `kAmCtas` CTAs shares the
+/// row, each thread keeps four loads in flight, and the CTAs' results meet in CTA 0's shared memory (distributed
+/// shared memory): 6 us (decode_cluster_parity --bench).
+///
+/// The answer is a function of the row alone, so it is the one-block kernel's bit for bit: the LOWEST index whose value
+/// is the largest non-NaN value above -inf (each thread walks its elements in ascending order with a strict `>`, and
+/// every merge takes the larger value or, on equality, the smaller index - an order-free rule), and 0 when there is
+/// none (all -inf / NaN), as there.  NaN never wins a `>`.
+///
+/// Barriers: a relaxed cluster arrive at entry, waited before the remote store (CTA 0 must be running); each CTA's
+/// result goes to slot `rank` of CTA 0, released by the next arrive; CTAs 1.. then exit (a cluster wait counts the
+/// threads that have not exited) and CTA 0 waits, reads its own slots, and writes the token.
+constexpr int kAmCtas = 8;      // CTAs per token (the portable cluster size)
+constexpr int kAmThreads = 1024;
+#if defined(DPCT_COMPATIBILITY_TEMP) && DPCT_COMPATIBILITY_TEMP >= 900
+#define STRATA_AM_CLUSTER 1
+#else
+#define STRATA_AM_CLUSTER 0     // older targets: a trap, never launched (sample_greedy_cluster checks)
+#endif
+#if STRATA_AM_CLUSTER
+__dpct_inline__ void am_take(float s, int v, float &bv, int &best) {
+    if (s > bv) { bv = s; best = v; }
+}
+__dpct_inline__ void am_merge(float ov, int oi, float &bv, int &best) {
+    if (ov > bv || (ov == bv && oi < best)) { bv = ov; best = oi; }
+}
+#endif
+// grid (kAmCtas, n_tokens), cluster (kAmCtas, 1, 1), kAmThreads threads
+void sampler_greedy_cluster_kernel(const float* __restrict__ logits,
+                                                                            int n_vocab, int* __restrict__ out) {
+#if STRATA_AM_CLUSTER
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+auto &sv = *sycl::ext::oneapi::group_local_memory_for_overwrite<float[32]>(
+    sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &si = *sycl::ext::oneapi::group_local_memory_for_overwrite<int[32]>(
+        sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    auto &cv =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<float[kAmCtas]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<
+                3>()); // on CTA 0: each CTA's result
+    auto &ci =
+        *sycl::ext::oneapi::group_local_memory_for_overwrite<int[kAmCtas]>(
+            sycl::ext::oneapi::this_work_item::get_work_group<3>());
+    unsigned rank;
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("mov.u32 %0, %%cluster_ctarank;\n" : "=r"(rank));
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("barrier.cluster.arrive.relaxed.aligned;\n" ::: "memory");
+    const float *l = logits + (size_t)item_ct1.get_group(1) * n_vocab;
+    float bv = sycl::bit_cast<float, int>(
+        0xff800000); // -inf; `n_vocab` is "no candidate", as in
+                     // sampler_greedy_kernel
+    int best = n_vocab;
+    constexpr int S = kAmCtas * kAmThreads;
+    int v = (int)rank * kAmThreads + (int)item_ct1.get_local_id(2);
+    for (; v + 3 * S < n_vocab; v += 4 * S) {   // four independent loads, then taken in ascending order
+        const float x0 = l[v], x1 = l[v + S], x2 = l[v + 2 * S], x3 = l[v + 3 * S];
+        am_take(x0, v, bv, best);
+        am_take(x1, v + S, bv, best);
+        am_take(x2, v + 2 * S, bv, best);
+        am_take(x3, v + 3 * S, bv, best);
+    }
+#pragma unroll
+    for (; v < n_vocab; v += S) am_take(l[v], v, bv, best);
+#pragma unroll
+    for (int off = 16; off > 0; off >>= 1)
+        /*
+        DPCT1108: '__shfl_down_sync' was migrated with the experimental
+        feature masked sub_group function which may not be supported by all
+        compilers or runtimes. You may need to adjust the code.
+        */
+        am_merge(
+            dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                bv, off),
+            dpct::experimental::shift_sub_group_left(
+                0xFFFFFFFFu, sycl::ext::oneapi::this_work_item::get_sub_group(),
+                best, off),
+            bv, best);
+    const int warp = (int)(item_ct1.get_local_id(2) >> 5),
+              lane = (int)(item_ct1.get_local_id(2) & 31);
+    if (lane == 0) { sv[warp] = bv; si[warp] = best; }
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (warp == 0) {
+        bv = sv[lane];
+        best = si[lane];
+#pragma unroll
+        for (int off = 16; off > 0; off >>= 1)
+            /*
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            am_merge(dpct::experimental::shift_sub_group_left(
+                         0xFFFFFFFFu,
+                         sycl::ext::oneapi::this_work_item::get_sub_group(), bv,
+                         off),
+                     dpct::experimental::shift_sub_group_left(
+                         0xFFFFFFFFu,
+                         sycl::ext::oneapi::this_work_item::get_sub_group(),
+                         best, off),
+                     bv, best);
+    }
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("barrier.cluster.wait.acquire.aligned;\n" ::
+                     : "memory"); // CTA 0 runs
+    if (item_ct1.get_local_id(2) == 0) {
+        uint64_t a;
+        /*
+        DPCT1053: Migration of device assembly code is not supported.
+        */
+        asm volatile("mapa.u64 %0, %1, %2;\n"
+                     : "=l"(a)
+                     : "l"((uint64_t)&cv[rank]), "r"(0u));
+        *reinterpret_cast<float*>(a) = bv;
+        /*
+        DPCT1053: Migration of device assembly code is not supported.
+        */
+        asm volatile("mapa.u64 %0, %1, %2;\n"
+                     : "=l"(a)
+                     : "l"((uint64_t)&ci[rank]), "r"(0u));
+        *reinterpret_cast<int*>(a) = best;
+    }
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("barrier.cluster.arrive.release.aligned;\n" ::: "memory");
+    if (rank != 0) return;
+    /*
+    DPCT1053: Migration of device assembly code is not supported.
+    */
+    asm volatile("barrier.cluster.wait.acquire.aligned;\n" ::: "memory");
+    if (warp == 0) {
+        bv = lane < kAmCtas ? cv[lane] : sycl::bit_cast<float, int>(0xff800000);
+        best = lane < kAmCtas ? ci[lane] : n_vocab;
+#pragma unroll
+        for (int off = 16; off > 0; off >>= 1)
+            /*
+            DPCT1108: '__shfl_down_sync' was migrated with the experimental
+            feature masked sub_group function which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            am_merge(dpct::experimental::shift_sub_group_left(
+                         0xFFFFFFFFu,
+                         sycl::ext::oneapi::this_work_item::get_sub_group(), bv,
+                         off),
+                     dpct::experimental::shift_sub_group_left(
+                         0xFFFFFFFFu,
+                         sycl::ext::oneapi::this_work_item::get_sub_group(),
+                         best, off),
+                     bv, best);
+        if (lane == 0) out[item_ct1.get_group(1)] = (best < n_vocab) ? best : 0;
+    }
+#else
+    (void) logits; (void) n_vocab; (void) out;
+    __trap();
+#endif
+}
+#endif  // !__HIPCC__
+
 /// **THE SAMPLED PATH, ONE BLOCK PER TOKEN.**  The kernel below replaced a version that ran the whole chain
 /// in ONE THREAD per token (`<<<ceil(T/64), 64>>>`, so a 4-token window fielded four threads): `top_k` alone
 /// was `k` sequential scans of the vocabulary with an inner sweep over the already-taken list - 20 x 248,320
@@ -1129,9 +1300,9 @@ bool stream_capturing(void *stream) try {
     if (DPCT_CHECK_ERROR(
             (st = strata::q_of(stream)->ext_oneapi_get_state())) != 0) {
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         (void)0;
         return true;
@@ -1166,9 +1337,9 @@ sycl::int2 *split_scratch(void *stream, size_t entries) {
     int device = 0;
     if (DPCT_CHECK_ERROR(device = dpct::get_current_device_id()) != 0) {
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         (void)0;
         return nullptr;
@@ -1190,17 +1361,17 @@ sycl::int2 *split_scratch(void *stream, size_t entries) {
     if (DPCT_CHECK_ERROR(ptr = sycl::malloc_device<sycl::int2>(
                              want, dpct::get_in_order_queue())) != 0) {
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         (void)0;
         want = entries;
         if (DPCT_CHECK_ERROR(ptr = sycl::malloc_device<sycl::int2>(
                                  want, dpct::get_in_order_queue())) != 0) {
             /*
-            DPCT1010: SYCL uses exceptions to report errors and does not use
-            the error codes. The cudaGetLastError function call was replaced
+            DPCT1010: SYCL uses exceptions to report errors and does not
+            use the error codes. The cudaGetLastError function call was replaced
             with 0. You need to rewrite this code.
             */
             (void)0;
@@ -1216,6 +1387,76 @@ sycl::int2 *split_scratch(void *stream, size_t entries) {
 
 }  // namespace
 
+bool sample_greedy_cluster(const float *logits, int n_tokens, int n_vocab,
+                           int *out, void *stream) try {
+#if 1   // SYCL port: no thread-block clusters (sm_90): the caller takes the plain greedy kernel
+    (void) logits; (void) n_tokens; (void) n_vocab; (void) out; (void) stream;
+    return false;
+#else
+    if (n_tokens <= 0 || n_vocab <= 0) return true;
+    if (n_tokens > 65535) return false;
+    // Per device (a layer split runs on several): 1 the cluster kernel runs here, 2 it does not - sm_90+ (the card's,
+    // or STRATA_EMULATE_CC's), code built for it (an older build's PTX holds a trap: the PTX version says which), and
+    // room for one cluster of kAmCtas CTAs.
+    static int ok[64] = {};
+    int dev = 0;
+    /*
+    DPCT1026: The call to cudaGetLastError was removed because this
+    functionality is redundant in SYCL.
+    */
+    if (DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 || dev < 0 ||
+        dev >= 64) {
+        ; return false;
+    }
+    cudaLaunchConfig_t cfg{};
+    cudaLaunchAttribute at[1];
+    at[0].id = cudaLaunchAttributeClusterDimension;
+    at[0].val.clusterDim.x = kAmCtas;
+    at[0].val.clusterDim.y = 1;
+    at[0].val.clusterDim.z = 1;
+    cfg.gridDim = dpct::dim3(kAmCtas, 1, 1);
+    cfg.blockDim = dpct::dim3(kAmThreads, 1, 1);
+    cfg.dynamicSmemBytes = 0;
+    cfg.stream = strata::q_of(stream);
+    cfg.attrs = at;
+    cfg.numAttrs = 1;
+    if (ok[dev] == 0) {
+        int major = 0, clusters = 0;
+        dpct::kernel_function_info fa{};
+        const bool runs =
+            DPCT_CHECK_ERROR(
+                major = dpct::get_device(dev).get_major_version()) == 0 &&
+            strata::cc_major_of(major) >= 9 &&
+            DPCT_CHECK_ERROR(dpct::get_kernel_function_info(
+                &fa, (const void *)sampler_greedy_cluster_kernel)) == 0 &&
+            fa.ptxVersion >= 90 && fa.binaryVersion >= 90 &&
+            /*
+            DPCT1007: Migration of cudaOccupancyMaxActiveClusters is not
+            supported.
+            */
+            cudaOccupancyMaxActiveClusters(
+                &clusters, sampler_greedy_cluster_kernel, &cfg) == 0 &&
+            clusters >= 1;
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        ok[dev] = runs ? 1 : 2;
+    }
+    if (ok[dev] != 1) return false;
+    cfg.gridDim = dpct::dim3(kAmCtas, (unsigned)n_tokens, 1);
+    const dpct::err0 e = cudaLaunchKernelEx(&cfg, sampler_greedy_cluster_kernel,
+                                            logits, n_vocab, out);
+
+    return true;
+#endif
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* history, int history_len,
                    const SamplerParams& p, int* out, void* stream) {
     if (n_tokens <= 0 || n_vocab <= 0) return;
@@ -1235,13 +1476,21 @@ void sample_tokens(const float* logits, int n_tokens, int n_vocab, const int* hi
                   sizeof(unsigned) // the penalty bitmap
             : 0;
     if (p.greedy || p.temperature <= 0.0f) {
+        // Without penalties (shmem == 0: no window) on sm_90+, a cluster of CTAs per token - the same token; see
+        // `sampler_greedy_cluster_kernel`.  STRATA_ARGMAX_MULTI=0: always the one-block kernel.
+        static const bool multi = [] {
+            const char* v = std::getenv("STRATA_ARGMAX_MULTI");
+            return !v || std::atoi(v) != 0;
+        }();
         // One block per token, 1,024 threads over the vocabulary.  See `sampler_greedy_kernel`.
         const int gthreads = 1024;
-        /*
-        DPCT1049: The work-group size passed to the SYCL kernel may exceed
-        the limit. To get the device limit, query
-        info::device::max_work_group_size. Adjust the work-group size if needed.
-        */
+        if (!(multi && shmem == 0 && sample_greedy_cluster(logits, n_tokens, n_vocab, out, stream)))
+            /*
+            DPCT1049: The work-group size passed to the SYCL kernel may
+            exceed the limit. To get the device limit, query
+            info::device::max_work_group_size. Adjust the work-group size if
+            needed.
+            */
         {
             auto exp_props = sycl::ext::oneapi::experimental::properties{
                 sycl::ext::oneapi::experimental::use_root_sync};
diff --git a/sycl/src/kernels/qsa_prompt_attn_parity.cpp b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
index ba4a9964053..1c964bd3d9b 100644
--- a/sycl/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/sycl/src/kernels/qsa_prompt_attn_parity.cpp
@@ -1,7 +1,7 @@
 // src/kernels/qsa_prompt_attn_parity.cpp - perf-review D-1: the tensor-core prompt attention (qsa_prompt_attn.hpp)
 // against the FP32 kernel it replaces (`qsa_decode_attn_batch`) and an FP64 host reference (GPU, synthetic, no model).
 //
-// Int8 and FP16 pools with random codes, scales and queries; selections shaped like the prompt path's (the 2,051
+// Int8, FP16 and Q4_0 pools with random codes, scales and queries; selections shaped like the prompt path's (the 2,051
 // widest, a recent window plus older cells that drift slowly from one query to the next, so neighbours share most
 // of them as they do in a real prompt; short contexts take every cell). Checks:
 //   1. against FP64, the new kernel's error is no larger than a small multiple of the old kernel's (both FP32 math);
@@ -15,6 +15,7 @@
 #include "strata/kernels/qsa.hpp"
 #include "strata/kernels/qsa_decode_attn.hpp"
 #include "strata/kernels/qsa_prompt_attn.hpp"
+#include "strata/kernels/kv_q4.hpp"
 
 #include <algorithm>
 #include <cmath>
@@ -63,7 +64,7 @@ uint16_t f2h(float f) {
     return *reinterpret_cast<uint16_t *>(&h);
 }
 
-int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
+int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16, 2 q4_0
     const k::QsaShapes s = k::qsa_real_shapes();
     const int64_t HD = s.head_dim, NKV = s.n_head_kv, NH = s.n_head, PS = s.page_size;
     const int64_t pages = (ctx + PS - 1) / PS, rows = pages * NKV * PS;
@@ -74,7 +75,22 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
     // pools; page table a shuffled permutation (the readers must follow it)
     std::vector<int8_t> kq, vq;
     std::vector<uint16_t> ks, vs, kh, vh;
-    if (fmt == 1) {
+    std::vector<uint8_t> k4, v4;   // q4_0: 8 blocks of {fp16 d, 16 code bytes} per row (kv_q4.hpp)
+    constexpr int64_t B4 = 18, ROW4 = 8 * B4;
+    if (fmt == 2) {
+        std::uniform_int_distribution<int> byte(0, 255);
+        // the scales as a q4_0 pool holds them: signed (ggml's d = max / -8) and spread over two decades, so a chunk's
+        // cells mix signs and magnitudes (a positive-only bound on them overflowed FP16 on real K/V)
+        std::uniform_real_distribution<float> lg(std::log(0.01f), std::log(1.0f));
+        auto sc4 = [&](std::mt19937& r) { return std::exp(lg(r)) * (byte(r) & 1 ? -1.0f : 1.0f); };
+        k4.resize(rows * ROW4); v4.resize(rows * ROW4);
+        for (auto* pool : {&k4, &v4})
+            for (int64_t b = 0; b < rows * 8; ++b) {
+                const uint16_t d = f2h(sc4(rng));
+                std::memcpy(pool->data() + b * B4, &d, 2);
+                for (int j = 0; j < 16; ++j) (*pool)[b * B4 + 2 + j] = (uint8_t) byte(rng);
+            }
+    } else if (fmt == 1) {
         kq.resize(rows * HD); vq.resize(rows * HD); ks.resize(rows * 4); vs.resize(rows * 4);
         for (auto& x : kq) x = (int8_t) code(rng);
         for (auto& x : vq) x = (int8_t) code(rng);
@@ -122,8 +138,19 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
         std::copy(v.begin(), v.end(), sel);
     }
     k::QsaAttnPools pl;
-    if (fmt == 1) { pl.k_q = up(kq); pl.v_q = up(vq); pl.k_scale = up(ks); pl.v_scale = up(vs); }
+    if (fmt == 2) { pl.k_q4 = up(k4); pl.v_q4 = up(v4); }
+    else if (fmt == 1) { pl.k_q = up(kq); pl.v_q = up(vq); pl.k_scale = up(ks); pl.v_scale = up(vs); }
     else { pl.k_pool = up(kh); pl.v_pool = up(vh); }
+    // a q4_0 value: block d / 32 of the row, element j = d % 32 in the low nibble of byte j (j < 16), else the high
+    // nibble of byte j - 16, minus 8, times the block's scale
+    auto q4v = [&](const std::vector<uint8_t>& pool, int64_t row, int64_t d) {
+        const uint8_t* blk = pool.data() + row * ROW4 + (d / 32) * B4;
+        uint16_t sc;
+        std::memcpy(&sc, blk, 2);
+        const int j = (int) (d % 32);
+        const int code = j < 16 ? (blk[2 + j] & 0x0F) : (blk[2 + j - 16] >> 4);
+        return (double) (code - 8) * h2f(sc);
+    };
     pl.page_table = up(table);
     const int32_t* d_ids = up(ids);
     const int32_t* d_steps = up(steps);
@@ -178,7 +205,8 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
                 const int64_t cell = sel[c], row = ((int64_t) table[cell / PS] * NKV + kvh) * PS + cell % PS;
                 double a = 0;
                 for (int64_t d = 0; d < HD; ++d) {
-                    const double kv = fmt == 1 ? (double) kq[row * HD + d] * h2f(ks[row * 4 + d / 64]) : h2f(kh[row * HD + d]);
+                    const double kv = fmt == 2 ? q4v(k4, row, d)
+                                      : fmt == 1 ? (double) kq[row * HD + d] * h2f(ks[row * 4 + d / 64]) : h2f(kh[row * HD + d]);
                     a += (double) q[(i * NH + h) * HD + d] * kv;
                 }
                 sco[c] = a / 16.0;
@@ -190,7 +218,8 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
                 double a = 0;
                 for (int64_t c = 0; c < w; ++c) {
                     const int64_t cell = sel[c], row = ((int64_t) table[cell / PS] * NKV + kvh) * PS + cell % PS;
-                    const double vv = fmt == 1 ? (double) vq[row * HD + d] * h2f(vs[row * 4 + d / 64]) : h2f(vh[row * HD + d]);
+                    const double vv = fmt == 2 ? q4v(v4, row, d)
+                                      : fmt == 1 ? (double) vq[row * HD + d] * h2f(vs[row * 4 + d / 64]) : h2f(vh[row * HD + d]);
                     a += sco[c] * vv;
                 }
                 const double r = a / l;
@@ -232,7 +261,7 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
     const bool ok2 = diff <= 1e-4 * scale;
     std::printf("%s %s ctx %lld, %lld queries: vs FP64 old %.3g new %.3g (output scale %.3g); new vs old %.3g (%.2g of "
                 "scale); %.3f -> %.3f ms per chunk (%.2fx)\n",
-                ok1 && ok2 ? "PASS" : "FAIL", fmt == 1 ? "int8" : "fp16", (long long) ctx, (long long) nq, err_old,
+                ok1 && ok2 ? "PASS" : "FAIL", fmt == 2 ? "q4_0" : fmt == 1 ? "int8" : "fp16", (long long) ctx, (long long) nq, err_old,
                 err_new, ref_scale, diff, diff / scale, ms_old / reps, ms_new / reps, ms_old / ms_new);
     sycl::free((void *)d_ids, dpct::get_in_order_queue());
         sycl::free((void *)d_steps, dpct::get_in_order_queue());
@@ -247,6 +276,8 @@ int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16
     sycl::free((void *)pl.k_pool, dpct::get_in_order_queue());
         sycl::free((void *)pl.v_pool, dpct::get_in_order_queue());
         sycl::free((void *)pl.page_table, dpct::get_in_order_queue());
+    sycl::free((void *)pl.k_q4, dpct::get_in_order_queue());
+        sycl::free((void *)pl.v_q4, dpct::get_in_order_queue());
     return ok1 && ok2 ? 0 : 1;
 }
 }  // namespace
@@ -277,6 +308,8 @@ int main(int argc, char** argv) {
     fails += run(1, ctx, nq, reps);
 #if !defined(__HIP_PLATFORM_AMD__)
     fails += run(0, ctx, nq, reps);   // FP16 KV: the RDNA4 kernel takes int8 KV only
+    fails += run(2, ctx, nq, reps);   // Q4_0 KV (mode 4)
+    fails += run(2, 1500, std::min<int64_t>(nq, 1500), reps);
 #endif
     fails += run(1, 1500, std::min<int64_t>(nq, 1500), reps);   // short context: the selection is every cell
     fails += run(1, 2100, std::min<int64_t>(nq, 256), reps);    // the identity-to-sparse edge
diff --git a/sycl/src/prefill/kernels.dp.cpp b/sycl/src/prefill/kernels.dp.cpp
index 6c4ca85012c..36f064fa76e 100644
--- a/sycl/src/prefill/kernels.dp.cpp
+++ b/sycl/src/prefill/kernels.dp.cpp
@@ -774,7 +774,7 @@ __dpct_inline__ void gdn_rec_cols_pipe_kernel(float *__restrict__ state,
 // one of a token orders every read of rkv before the next token's writes, the next token's first one every read of ro
 // before the writes after it.  64 blocks instead of 192.  Per value head and column the same arithmetic in the same
 // order: the same bits (src/prefill/gdn_rec_parity.cu checks them and times the variants: 1.41x on a 4080 Super).
-// sm_80+ with 32 to 47 or 64 and more SMs (gdn_keyhead_ok); STRATA_GDN_KEYHEAD=0: gdn_rec_cols_pipe_kernel.
+// sm_80+ cards that hold its 64 blocks at once (gdn_keyhead_ok); STRATA_GDN_KEYHEAD=0: gdn_rec_cols_pipe_kernel.
 #if 1   // SYCL port: plain copies (no cp.async)
 #define STRATA_GDN_CP_ASYNC 0   // Turing builds: plain copies (never launched there, see gdn_keyhead_ok)
 #else
diff --git a/sycl/src/prefill/moe_fused_stub.cpp b/sycl/src/prefill/moe_fused_stub.cpp
new file mode 100644
index 00000000000..70f35cb674c
--- /dev/null
+++ b/sycl/src/prefill/moe_fused_stub.cpp
@@ -0,0 +1,37 @@
+// src/prefill/moe_fused_stub.cpp (SYCL port) - upstream's fused int8 prompt kernels (moe_fused.cu, moe_fused_iq.cu, #136)
+// belong to its MMQ library, which this build does not have (the prompt path's MMQ plan is empty here, so prefill.cpp
+// never takes the fused branch). These are the "not built" answers, so the prompt path links and keeps its own path.
+#include "strata/prefill/moe_fused.hpp"
+#include "strata/prefill/moe_fused_iq.hpp"
+
+#include <cstdio>
+#include <cstdlib>
+
+namespace strata::prefill::fused {
+
+namespace {
+[[noreturn]] void unreachable(const char* what) {
+    std::fprintf(stderr, "prefill: %s called in a build without the fused kernels\n", what);
+    std::abort();
+}
+}  // namespace
+
+bool built() { return false; }
+bool available() { return false; }
+bool enabled() { return false; }
+bool requested() { return false; }
+size_t act_bytes(int64_t, int64_t) { return 0; }
+size_t group_bytes(int64_t, int) { return 0; }
+void quantize_act(const float*, int64_t, int64_t, void*, void*) { unreachable("fused::quantize_act"); }
+void group(const int32_t*, int64_t, int, int, void*, int32_t*, int32_t*, void*) { unreachable("fused::group"); }
+void experts(const Batch&, int, int64_t, const void*, const void*, const int32_t*, void*, float*, void*) {
+    unreachable("fused::experts");
+}
+bool native_supported(int, int) { return false; }
+void quantize_act_native(const float*, int64_t, int64_t, void*, void*) { unreachable("fused::quantize_act_native"); }
+void experts_native(const Batch&, const NativeGeom&, int, int64_t, const void*, const void*, const int32_t*, void*, float*,
+                    void*) {
+    unreachable("fused::experts_native");
+}
+
+}  // namespace strata::prefill::fused
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 61777fddd44..6059597f17b 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -28,7 +28,10 @@
 #include "strata/kernels/qsa_prompt_attn.hpp"
 #include "strata/kernels/qsa_select.hpp"
 #include "strata/prefill/gemm.hpp"
+#include "strata/prefill/moe_fused.hpp"
+#include "strata/prefill/moe_fused_iq.hpp"
 #include "strata/prefill/moe_mmq.hpp"
+#include "strata/core/peer_experts.hpp"
 #include "strata/prefill/kernels.hpp"
 
 #include <algorithm>
@@ -57,11 +60,30 @@ Context::Context() {}
 Context::~Context() {}
 void Context::run(const Product&, void*) {}
 void gather_native(const void*, const void*, size_t, const void*, size_t, void*, void*, void*) {}
+bool gather_native_group(const GatherGroup&, size_t, size_t, size_t, size_t, void*, size_t, void*, size_t, void*) { return false; }
 void gather_strata_q2(const uint8_t*, void*, void*, void*) {}
 void swiglu(const float*, float*, int64_t, int64_t, bool, void*) {}
 void iota(int32_t*, int64_t, void*) {}
 }  // namespace strata::prefill::mmq
 #endif
+#ifndef STRATA_PREFILL_FUSED
+// #136: the fused int8 experts are CUDA-only (HIP and builds without MMQ keep the MMQ / FP16 paths)
+namespace strata::prefill::fused {
+bool built() { return false; }
+bool available() { return false; }
+bool enabled() { return false; }
+bool requested() { return false; }
+size_t act_bytes(int64_t, int64_t) { return 0; }
+size_t group_bytes(int64_t, int) { return 0; }
+void quantize_act(const float*, int64_t, int64_t, void*, void*) {}
+void group(const int32_t*, int64_t, int, int, void*, int32_t*, int32_t*, void*) {}
+void experts(const Batch&, int, int64_t, const void*, const void*, const int32_t*, void*, float*, void*) {}
+bool native_supported(int, int) { return false; }
+void quantize_act_native(const float*, int64_t, int64_t, void*, void*) {}
+void experts_native(const Batch&, const NativeGeom&, int, int64_t, const void*, const void*, const int32_t*, void*,
+                    float*, void*) {}
+}  // namespace strata::prefill::fused
+#endif
 
 namespace strata::prefill {
 namespace {
@@ -74,9 +96,9 @@ constexpr int64_t C = 10240, ZV = 6144, HV = 48;
 inline int64_t MAXBLOB() { return (int64_t) strata::kernels::cpu::expert_layout().max_blob; }
 constexpr int STAGE = 8;           // host->device expert staging ring (chunks below stream_all_min())
 // Step 3: from this chunk size on, every non-resident expert of every layer streams in a fixed order through a
-// RING_MAX-slot ring (nearly all 512 are routed at such a chunk), so the copy engine keeps working through the
+// ring_slots()-slot ring (nearly all 512 are routed at such a chunk), so the copy engine keeps working through the
 // attention halves instead of waiting for each layer's routing.
-constexpr int RING_MAX = 512;           // the arrays; the ring itself is ring_slots()
+constexpr int RING_MAX = 1024;          // the arrays; the ring itself is ring_slots(), at most ring_cap()
 // The chunk size from which every expert streams: 1024 since 0.1.30 (was 2048).  Measured on the 5070, Q2_0 / IQ2_XS,
 // fixed cache: 1,500-token prompts 621 -> 785 / 612 -> 735 tok/s, 2,000 727 -> 934 / 712 -> 892, 4,000 (its last
 // chunk) 779 -> 912 / 766 -> 844, the same output.  Below ~1,000 tokens the output changed on Q2_0 (a smaller chunk
@@ -91,6 +113,33 @@ double g_pinned_share = 1.0;
 // and 96 when a large share goes through host copies (IQ3_S on 64 GB, a third unpinned: 96 slots 1216, 256 1070 -
 // the host copies are the limit and the bigger ring only takes cache slots).  STRATA_PREFILL_RING overrides.
 int g_ring_override = 0;   // #340: set by a layer split (Prefill::set_ring_override); 0 = the rule below
+// #136: the fused experts (STRATA_PF_FUSED=1) launch on a batch of a layer's streamed experts at once, so the ring
+// should hold a whole layer's (~460 of 512 on Q2_0): with 384 slots a layer's last batch waits for slots its own
+// first batch frees.  Measured on the 5070, Q2_0, the 4K / 32K code-agent prompts (one run each): fused at 384 slots
+// +5% / +3% over MMQ, at 512 +19-22% / +11-12% (MMQ itself at 512: -2% / -1%).  P3: with the fused path's smaller
+// buffers (moe_bufs) 1024 slots - two layers' experts - fit too; 2 pairs each, prompt tok/s at 512 / 1024 slots: 4K
+// 1,512 / 1,605, 32K 2,485 / 2,660 (both chunk 8192), 128K with KV streaming 2,346 / 2,392 (the chunk falls from
+// 8192 to 6144, but more experts stay resident).  A native pack likewise when the native kernels (moe_fused_iq.hpp)
+// take any of its layers: IQ2_XS, 4K / 32K, their first version at 384 slots -3% / -6% against MMQ, at 512 +8% / 0%.
+inline bool fused_ring() {
+    if (!fused::enabled()) return false;
+    if (core::peer_portable()) return false;   // multi-GPU: --peer-device keeps the MMQ path and its buffer sizes
+    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
+    if (!lay.native) return true;
+    // EVERY layer: fused_layout() shrinks the MoE buffers to the fused path's needs, so a layer the native kernels do
+    // not cover (Unsloth UD-IQ4_XS's Q8_0 down projections) would run MMQ in them at the full chunk and overflow them
+    // (garbage, an illegal memory access or a hung prompt on gfx1151).  A pack with such a layer keeps MMQ's buffers;
+    // its covered layers still take the fused kernels.
+    static const bool all = [&lay] {
+        for (const auto& f : lay.fmt)
+            if (!fused::native_supported(f.gu_type, f.d_type)) return false;
+        return !lay.fmt.empty();
+    }();
+    return all;
+}
+// the largest ring: 512 slots; 1024 with the Q2_0 pack's fused experts (P3's smaller buffers, measured there) - the
+// native packs' fused layers were measured at 512
+inline int ring_cap() { return fused_ring() && !strata::kernels::cpu::expert_layout().native ? RING_MAX : 512; }
 inline int ring_slots(size_t T) {
     const char* v = std::getenv("STRATA_PREFILL_RING");
 #if defined(STRATA_USE_HIP)
@@ -102,7 +151,8 @@ inline int ring_slots(size_t T) {
     }();
     if (!v && g_ring_override <= 0 && wmma) return (int64_t) T >= stream_all_min() ? 96 : STAGE;
 #endif
-    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : (g_pinned_share >= 0.9 ? 384 : 96);
+    const int pinned_ring = fused_ring() ? 1024 : 384;
+    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : (g_pinned_share >= 0.9 ? pinned_ring : 96);
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
     // SYCL port: routed-only staging by default. The stream-all walk (every non-resident expert of every layer, copied
     // ahead across layers) hangs on the B70 in its first large chunk - the copy engine stops on a barrier (xe resets bcs
@@ -110,7 +160,7 @@ inline int ring_slots(size_t T) {
     // 4,051 streamed experts, 2026-09-30). STRATA_PREFILL_STREAM_ALL=1 restores it for debugging.
     static const bool stream_all_ok = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_ALL"); return e && e[0] == '1'; }();
     if (!stream_all_ok) return STAGE;
-    const int big = r < 16 ? 16 : r > RING_MAX ? RING_MAX : r;
+    const int big = r < 16 ? 16 : r > ring_cap() ? ring_cap() : r;
     return (int64_t) T >= stream_all_min() ? big : STAGE;
 }
 constexpr int DQ = 2;              // dequantized-expert ring (FP16 gate/up + down)
@@ -348,6 +398,92 @@ struct Stager {
     }
 };
 
+// multi-GPU: the peer GPU's share of a prompt chunk's experts.  Per MoE layer the primary copies its normed
+// activations over P2P, the peer quantizes the rows routed to the experts it holds, runs the same MMQ products the
+// primary would (gathered from its own slots), and copies the result rows back into the primary's Dm rows - the rows
+// are laid out local-first, so the peer's are one contiguous block at the end.
+struct PeerPrefill {
+    core::PeerExperts* peer = nullptr;
+    int dev = -1;
+    int64_t cap_rows = 0, T_max = 0;
+    dpct::queue_ptr s = &dpct::get_in_order_queue();
+    dpct::event_ptr ev_in =
+        nullptr; // on the primary: the activations and the row tables are ready
+    dpct::event_ptr ev_done =
+        nullptr; // on the peer: its rows have landed in the primary's Dm
+    // multi-GPU: the result rows go back group by group on a second stream while the next group computes
+    dpct::queue_ptr s_out = &dpct::get_in_order_queue();
+    static constexpr int kGrpEv = NE / 16 + 2;
+    dpct::event_ptr ev_grp[kGrpEv] = {};
+    bool out_pending = false;       // s_out may still read Dm (the next layer's products wait for it)
+    bool out_pipe = true;
+    // multi-GPU COMPACT: the peer's per-row buffers hold one GROUP's rows instead of the layer's (a group
+    // = up to 16 experts and at most G rows), the result rows double-buffered: ~0.9 GB -> ~0.26 GB on the helper
+    // card at 8192-token chunks, and no row cap (every peer-held expert's rows go to the peer).
+    // STRATA_PF_PEER_COMPACT=0: the layer-sized buffers (the A/B).
+    bool compact = true;
+    int64_t G = 0;
+    void *Xq_g = nullptr, *Hq_g = nullptr;
+    float *GU_g = nullptr, *H_g = nullptr, *Dm_b[2] = {};
+    dpct::event_ptr ev_dm[2] = {};
+    bool dm_live[2] = {};
+    std::vector<std::pair<size_t, size_t>> groups;
+    // multi-GPU PEER STREAMING: a share of the experts the primary would stream over ITS PCIe link in a
+    // big chunk is streamed by the peer over its own link instead (into its own ring) and computed there - it halves
+    // the primary's copy load and moves expert work to the card that idles through most of the MoE half.
+    // STRATA_PF_PEER_STREAM = the share (0 = off), STRATA_PF_PEER_RING = its ring slots.
+    double ps_frac = 0.0;
+    int RP = 0;
+    std::vector<uint8_t*> pstage;
+    std::vector<dpct::event_ptr> pcopied, pused;
+    std::vector<char> plive;
+    dpct::queue_ptr s_cp = &dpct::get_in_order_queue();
+    struct PsEntry { int32_t l, e; const uint8_t* blob; };
+    std::vector<PsEntry> pseq;            // this chunk's peer-streamed experts, layer by layer in id order
+    std::vector<size_t> pseq_start;
+    std::vector<char> ps_flag;            // [layer * NE + e]: streamed by the peer in this chunk
+    size_t p_issued = 0, pk = 0;
+    int64_t ps_experts = 0;
+    float *mixed = nullptr, *GU = nullptr, *H = nullptr, *Dm = nullptr;
+    void *Xq = nullptr, *Hq = nullptr;
+    int32_t *src = nullptr, *bounds = nullptr, *ident = nullptr;
+    uint8_t *grp_gu = nullptr, *grp_d = nullptr;
+    std::unique_ptr<mmq::Context> ctx;
+    std::vector<int32_t> bounds_host;
+    std::vector<void*> owned;
+    int64_t layers = 0, experts = 0, rows = 0, over_cap = 0;   // stats
+    ~PeerPrefill() {
+        if (dev < 0) return;
+        int prev = 0;
+        prev = dpct::get_current_device_id();
+        /*
+        DPCT1093: The "dev" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        dpct::select_device(dev);
+        if (s) s->wait();
+        ctx.reset();
+        for (void *p : owned)
+            DPCT_CHECK_ERROR(sycl::free(p, dpct::get_in_order_queue()));
+        if (ev_done) dpct::destroy_event(ev_done);
+        if (s_out) s_out->wait();
+        for (dpct::event_ptr e : ev_grp) if (e) dpct::destroy_event(e);
+        for (dpct::event_ptr e : ev_dm) if (e) dpct::destroy_event(e);
+        if (s_cp) s_cp->wait();
+        for (dpct::event_ptr e : pcopied) if (e) dpct::destroy_event(e);
+        for (dpct::event_ptr e : pused) if (e) dpct::destroy_event(e);
+        if (s_cp) dpct::get_current_device().destroy_queue(s_cp);
+        if (s_out) dpct::get_current_device().destroy_queue(s_out);
+        if (s) dpct::get_current_device().destroy_queue(s);
+        /*
+        DPCT1093: The "prev" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        dpct::select_device(prev);
+        if (ev_in) dpct::destroy_event(ev_in);
+    }
+};
+
 struct Prefill::Impl {
     const core::WeightTable* wt = nullptr;
     const core::ModelGeometry* g = nullptr;
@@ -410,6 +546,9 @@ struct Prefill::Impl {
     std::unique_ptr<Stager> stager;          // the unpinned experts' host copies (step 4)
     dpct::event_ptr copied[RING_MAX] = {}, used[RING_MAX] = {};
     bool stage_live[RING_MAX] = {};
+    // the event that releases each ring slot: its own `used`, or - when an MMQ group is gathered in one launch - the
+    // `used` of the last slot gathered with it, recorded once for all of them (a later record only waits longer)
+    int used_of[RING_MAX] = {};
     // PLE
     float* ple_emb = nullptr;
     std::vector<float> ple_pageable[2];      // the fallback when no more RAM can be pinned
@@ -436,6 +575,7 @@ struct Prefill::Impl {
     // C-4: the chunk's token ids on the device, for one batched embedding gather
     int32_t* tok_dev = nullptr;
     std::vector<int32_t> tok_host;
+    std::unique_ptr<PeerPrefill> pp;         // multi-GPU: the peer GPU's expert share (set_peer)
 };
 
 namespace {
@@ -567,20 +707,41 @@ const MmqPlan& mmq_plan() {
     }();
     return plan;
 }
-uint64_t moe_set_bytes(size_t T, int64_t n_expert) {
+// #136 P3: a layout whose chunks run the fused experts (STRATA_PF_FUSED=1, the Q2_0 pack, a streamed chunk of
+// stream_all_min() tokens or more).  Its GU, H and Xq hold only the fused path's grouping tables, int8 H and per-token
+// int8 activations, and Hq nothing: ~100 KB a token less than MMQ's FP32 GU / H and per-slot q8_1 rows, which is what
+// lets a bigger chunk or ring fit in the slots the prompt path borrows.  A last chunk below stream_all_min() still runs
+// MMQ in the same buffers, so each keeps MMQ's size for stream_all_min() - 1 tokens.  `src`: the layout streams experts
+// (Prefill::init got an ExpertSource; without one no chunk takes the streamed walk, so no chunk is fused).
+bool fused_layout(size_t T, bool src) {
+    return src && fused_ring() && mmq_plan().any && ring_slots(T) > STAGE && (int64_t) T >= stream_all_min();
+}
+// The MoE buffers MMQ and the fused path share: GU and H in floats, Xq and Hq in bytes.  Without `fused` (the
+// default): MMQ's, for T tokens.
+struct MoeBufs { size_t gu, h, xq, hq; };
+MoeBufs moe_bufs(size_t T, int64_t n_expert, bool fused) {
+    if (!fused) return {T * K * 1280, T * K * 640, mmq::q8_bytes((int64_t) (T * K), N), mmq::q8_bytes((int64_t) (T * K), 640)};
+    const size_t ts = (size_t) std::min<int64_t>((int64_t) T, stream_all_min() - 1);   // MMQ's last small chunk
+    return {std::max(ts * K * 1280, (fused::group_bytes((int64_t) (T * K), (int) n_expert) + 3) / 4),
+            std::max(ts * K * 640, (fused::act_bytes((int64_t) (T * K), 640) + 3) / 4),
+            std::max(mmq::q8_bytes((int64_t) (ts * K), N), fused::act_bytes((int64_t) T, N)),
+            mmq::q8_bytes((int64_t) (ts * K), 640)};
+}
+uint64_t moe_set_bytes(size_t T, int64_t n_expert, bool fused) {
     const MmqPlan& mp = mmq_plan();
+    const MoeBufs mb = moe_bufs(T, n_expert, fused);
     Alloc a; a.count_only = true; bool ok = true;
     a.take<float>(T * n_expert, ok); a.take<float>(T * K, ok); a.take<int32_t>(T * K, ok); a.take<int32_t>(T * K, ok);
     a.take<int32_t>(T * K, ok);
     if (mp.fallback) a.take<uint16_t>(T * K * N, ok);
-    a.take<float>(T * K * 1280, ok);
+    a.take<float>(mb.gu, ok);
     if (mp.fallback) a.take<uint16_t>(T * K * 640, ok);
     a.take<float>(T * K * N, ok); a.take<float>(T * 640, ok);
     a.take<float>(T * 640, ok); a.take<uint16_t>(T * 640, ok); a.take<float>(T * N, ok); a.take<float>(T, ok);
     if (mp.any) {
-        a.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), N), ok);
-        a.take<float>(T * K * 640, ok);
-        a.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), 640), ok);
+        a.take<uint8_t>(mb.xq, ok);
+        a.take<float>(mb.h, ok);
+        a.take<uint8_t>(mb.hq, ok);
     }
     return a.used;
 }
@@ -653,7 +814,7 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
     m.borrowed = borrow != nullptr;
     bool ok = true;
     // one-time: events, the stager, the host buffers (for the largest chunk), the identity page table
-    for (int i = 0; i < RING_MAX; ++i) {
+    for (int i = 0; i < ring_cap(); ++i) {
         if (DPCT_CHECK_ERROR(m.copied[i] = new sycl::event()) != 0) ok = false;
         if (DPCT_CHECK_ERROR(m.used[i] = new sycl::event()) != 0) ok = false;
     }
@@ -686,6 +847,11 @@ bool Prefill::init(const core::WeightTable &wt, const core::ModelGeometry &g,
             meaningful in the migrated code and was removed or replaced with 0.
             You may need to check the migrated code.
             */
+            /*
+            DPCT1048: The original value cudaHostAllocPortable is not
+            meaningful in the migrated code and was removed or replaced with 0.
+            You may need to check the migrated code.
+            */
             if (DPCT_CHECK_ERROR(h = (void *)sycl::malloc_host(
                                      need * 4, dpct::get_in_order_queue())) ==
                     0 &&
@@ -798,8 +964,10 @@ bool Prefill::carve(size_t T, void* alloc) {
     m.max_blocks = ss.qsa_states[ss.qsa_primary()].max_cells / s.idx_block + 2;
     {
         // one region for the attention half's and the MoE half's scratch (see gdn_set_bytes)
+        const bool fz = fused_layout(T, m.src != nullptr);
+        const MoeBufs mb = moe_bufs(T, m.g->n_expert, fz);
         const uint64_t region = std::max({gdn_set_bytes(T), qsa_set_bytes(T, m.cap, m.max_blocks, m.sel_batch,
-                                                                           m.attn_batch, s), moe_set_bytes(T, m.g->n_expert)});
+                                                                           m.attn_batch, s), moe_set_bytes(T, m.g->n_expert, fz)});
         uint8_t* base = o.take<uint8_t>((size_t) region, ok);
         m.region = base;
         m.region_bytes = region;
@@ -822,15 +990,15 @@ bool Prefill::carve(size_t T, void* alloc) {
         m.slot_dev = c.take<int32_t>(T * K, ok); m.src_dev = c.take<int32_t>(T * K, ok);
         const MmqPlan& mp = mmq_plan();
         m.Xs = mp.fallback ? c.take<uint16_t>(T * K * N, ok) : nullptr;
-        m.GU = c.take<float>(T * K * 1280, ok);
+        m.GU = c.take<float>(mb.gu, ok);
         m.Hh = mp.fallback ? c.take<uint16_t>(T * K * 640, ok) : nullptr;
         m.Dm = c.take<float>(T * K * N, ok);
         m.sgate = c.take<float>(T * 640, ok); m.sup = c.take<float>(T * 640, ok); m.sh_h = c.take<uint16_t>(T * 640, ok);
         m.shared = c.take<float>(T * N, ok); m.sg = c.take<float>(T, ok);
         if (mp.any) {
-            m.Xq = c.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), N), ok);
-            m.H = c.take<float>(T * K * 640, ok);
-            m.Hq = c.take<uint8_t>(mmq::q8_bytes((int64_t) (T * K), 640), ok);
+            m.Xq = c.take<uint8_t>(mb.xq, ok);
+            m.H = c.take<float>(mb.h, ok);
+            m.Hq = c.take<uint8_t>(mb.hq, ok);
         }
         if (base == nullptr) ok = false;
     }
@@ -849,6 +1017,7 @@ bool Prefill::carve(size_t T, void* alloc) {
     for (int i = 0; i < m.ring; ++i) {
         m.stage_dev[i] = o.take<uint8_t>((size_t) MAXBLOB(), ok);
         m.stage_live[i] = false;                        // a new buffer: nothing of an earlier layout to wait for
+        m.used_of[i] = i;
     }
     m.ple_emb = o.take<float>(T * N, ok);
     m.ple_norm = o.take<float>((size_t) strata::kernels::NG_HC_DIM, ok);
@@ -1087,6 +1256,157 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
                      (long long) B, ms_idle, ms_since(tl0), ms_since(t0));
     return true;
 }
+bool Prefill::set_peer(core::PeerExperts *peer, int64_t cap_rows,
+                       std::string &err) try {
+    Impl& m = *impl_;
+    if (peer == nullptr || !peer->valid()) { m.pp.reset(); return true; }
+    if (!peer->p2p()) { err = "prefill peer: the two GPUs cannot access each other (no P2P)"; return false; }
+    if (!mmq_plan().any) { err = "prefill peer: needs the MMQ prompt path"; return false; }
+    auto pp = std::make_unique<PeerPrefill>();
+    pp->peer = peer;
+    pp->T_max = m.T_max;
+    pp->cap_rows = std::max<int64_t>(1, std::min<int64_t>(cap_rows, m.T_max * K));
+    const int64_t R = pp->cap_rows;
+    const MmqPlan& mp = mmq_plan();
+    if (DPCT_CHECK_ERROR(pp->ev_in = new sycl::event()) != 0) {
+        err = "prefill peer: event"; return false;
+    }
+    int prev = 0;
+    prev = dpct::get_current_device_id();
+    pp->dev = peer->device();
+    /*
+    DPCT1093: The "pp->dev" device may be not the one intended for use.
+    Adjust the selected device if needed.
+    */
+    dpct::select_device(pp->dev);
+    /*
+    DPCT1025: The SYCL queue is created ignoring the flag and priority
+    options.
+    */
+    bool ok = DPCT_CHECK_ERROR(
+                  pp->s = dpct::get_current_device().create_queue(true)) == 0 &&
+              DPCT_CHECK_ERROR(pp->ev_done = new sycl::event()) == 0;
+    {
+        const char* v = std::getenv("STRATA_PF_PEER_OUT_PIPE");   // =0: one copy after the last group (the A/B)
+        pp->out_pipe = (v == nullptr || std::atoi(v) != 0) || pp->compact;   // compact always pipes
+    }
+    if (ok && pp->out_pipe) {
+        /*
+        DPCT1025: The SYCL queue is created ignoring the flag and priority
+        options.
+        */
+        ok =
+            DPCT_CHECK_ERROR(
+                pp->s_out = dpct::get_current_device().create_queue(true)) == 0;
+        for (int i = 0; ok && i < PeerPrefill::kGrpEv; ++i)
+            ok = DPCT_CHECK_ERROR(pp->ev_grp[i] = new sycl::event()) == 0;
+    }
+    auto take = [&](size_t bytes) -> void * {
+        try {
+    void *p = nullptr;
+        if (!ok ||
+            DPCT_CHECK_ERROR(p = (void *)sycl::malloc_device(
+                                 bytes, dpct::get_in_order_queue())) != 0) {
+            ok = false; return nullptr;
+        }
+        pp->owned.push_back(p);
+        return p;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    };
+    pp->mixed = (float*) take((size_t) m.T_max * N * 4);
+    {
+        const char* v = std::getenv("STRATA_PF_PEER_COMPACT");
+        pp->compact = v == nullptr || std::atoi(v) != 0;
+    }
+    if (pp->compact) {
+        pp->cap_rows = m.T_max * K;   // no row cap: only the row tables grow with it
+        pp->G = m.T_max;              // one expert never has more rows than the chunk has tokens
+        const int64_t Gr = pp->G;
+        pp->Xq_g = take(mmq::q8_bytes(Gr, N));
+        pp->Hq_g = take(mmq::q8_bytes(Gr, 640));
+        pp->GU_g = (float*) take((size_t) Gr * 1280 * 4);
+        pp->H_g = (float*) take((size_t) Gr * 640 * 4);
+        pp->Dm_b[0] = (float*) take((size_t) Gr * N * 4);
+        pp->Dm_b[1] = (float*) take((size_t) Gr * N * 4);
+        for (int b = 0; b < 2 && ok; ++b)
+            ok = DPCT_CHECK_ERROR(pp->ev_dm[b] = new sycl::event()) == 0;
+        const char* fs = std::getenv("STRATA_PF_PEER_STREAM");
+        pp->ps_frac = fs ? std::atof(fs) : 0.35;   // measured: 0.25-0.5 all ~1950-1970 at 32K, 0.35 best
+        if (pp->ps_frac > 0.0 && !mp.fallback && m.T_max >= stream_all_min()) {
+            pp->RP = 48;
+            if (const char* pr = std::getenv("STRATA_PF_PEER_RING"); pr != nullptr) pp->RP = std::atoi(pr);
+            pp->pstage.assign((size_t) pp->RP, nullptr);
+            pp->pcopied.assign((size_t) pp->RP, nullptr);
+            pp->pused.assign((size_t) pp->RP, nullptr);
+            pp->plive.assign((size_t) pp->RP, 0);
+            /*
+            DPCT1025: The SYCL queue is created ignoring the flag and
+            priority options.
+            */
+            ok = ok && DPCT_CHECK_ERROR(
+                           pp->s_cp = dpct::get_current_device().create_queue(
+                               true)) == 0;
+            for (int i = 0; ok && i < pp->RP; ++i) {
+                pp->pstage[(size_t) i] = (uint8_t*) take((size_t) MAXBLOB());
+                ok = ok &&
+                     DPCT_CHECK_ERROR(pp->pcopied[(size_t)i] =
+                                          new sycl::event()) == 0 &&
+                     DPCT_CHECK_ERROR(pp->pused[(size_t)i] =
+                                          new sycl::event()) == 0;
+            }
+        } else {
+            pp->ps_frac = 0.0;
+        }
+    } else {
+        pp->Xq = take(mmq::q8_bytes(R, N));
+        pp->Hq = take(mmq::q8_bytes(R, 640));
+        pp->GU = (float*) take((size_t) R * 1280 * 4);
+        pp->H = (float*) take((size_t) R * 640 * 4);
+        pp->Dm = (float*) take((size_t) R * N * 4);
+    }
+    const int64_t Rt = pp->cap_rows;
+    pp->src = (int32_t*) take((size_t) Rt * 4);
+    pp->ident = (int32_t*) take((size_t) Rt * 4);
+    pp->bounds = (int32_t*) take((size_t) (2 * (NE + NE / MMQ_GROUP + 2)) * 4);
+    pp->grp_gu = (uint8_t*) take(MMQ_GROUP * mp.gu_max + MMQ_TAIL);
+    pp->grp_d = (uint8_t*) take(MMQ_GROUP * mp.d_max + MMQ_TAIL);
+    if (ok) {
+        pp->ctx = std::make_unique<mmq::Context>();
+        mmq::iota(pp->ident, pp->cap_rows, pp->s);
+        ok = DPCT_CHECK_ERROR(pp->s->wait()) == 0;
+    }
+    size_t fb = 0, tb = 0;
+    /*
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    dpct::get_current_device().get_memory_info(fb, tb);
+    /*
+    DPCT1093: The "prev" device may be not the one intended for use. Adjust
+    the selected device if needed.
+    */
+    dpct::select_device(prev);
+    if (!ok) { err = "prefill peer: the peer's buffers do not fit (raise --peer-reserve-mib or lower --peer-prefill-rows)"; return false; }
+    std::fprintf(stderr, "strata prefill: peer GPU %d computes its experts' rows of each prompt chunk (up to %lld rows per "
+                         "layer%s); %zu MiB left free on it\n", pp->dev, (long long) pp->cap_rows,
+                 pp->compact ? (pp->ps_frac > 0.0 ? (", compact group buffers, streams " + std::to_string((int) (pp->ps_frac * 100 + 0.5)) +
+                                                    "% of the primary's streamed experts through a " + std::to_string(pp->RP) + "-slot ring").c_str()
+                                                 : ", compact group buffers") : "", fb >> 20);
+    m.pp = std::move(pp);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
 void Prefill::set_ring_override(int slots) { g_ring_override = slots > 0 ? slots : 0; }
 double Prefill::pinned_share() { return g_pinned_share; }
@@ -1111,7 +1431,7 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     const int64_t cap = strata::kernels::qsa_selection_width(strata::kernels::kTopkMaxCells, s);
     const int64_t max_blocks = ss.qsa_states[ss.qsa_primary()].max_cells / s.idx_block + 2;
     o.take<uint8_t>((size_t) std::max({gdn_set_bytes(T), qsa_set_bytes(T, cap, max_blocks, 256, 32, s),
-                                       moe_set_bytes(T, g.n_expert)}), ok);
+                                       moe_set_bytes(T, g.n_expert, fused_layout(T, true))}), ok);
     for (int i = 0; i < DQ; ++i) { o.take<uint16_t>(1280 * 2560, ok); o.take<uint16_t>(2560 * 640, ok); }
     if (mmq_plan().any) {
         const MmqPlan& mp = mmq_plan();
@@ -1219,6 +1539,67 @@ struct PfTimer {
         for (dpct::event_ptr e : ev) DPCT_CHECK_ERROR(dpct::destroy_event(e));
     }
 };
+// multi-GPU: the peer's own timeline (STRATA_PREFILL_TIMING): marks on the peer stream, folded with the primary's
+enum PePhase { kPeIdle, kPeMoeIn, kPeMoeGemm, kPeMoeOut, kPeCount };
+const char* const kPeNames[kPeCount] = {"idle", "moe in", "moe gemm", "moe out"};
+struct PeTimer {
+    bool on = std::getenv("STRATA_PREFILL_TIMING") != nullptr;
+    int dev = -1;
+    std::vector<dpct::event_ptr> ev;
+    std::vector<int> ph;
+    size_t used = 0;
+    double ms[kPeCount] = {};
+    void mark(int phase, dpct::queue_ptr s) { // the peer device is current
+        if (!on) return;
+        if (used == ev.size()) {
+            dpct::event_ptr e = nullptr;
+            e = new sycl::event();
+            ev.push_back(e);
+            ph.push_back(0);
+        }
+        ph[used] = phase;
+        dpct::sync_barrier(ev[used], s);
+        ++used;
+    }
+    void fold() try { // every mark has completed
+        if (!on || used < 2) return;
+        for (size_t i = 0; i + 1 < used; ++i) {
+            float t = 0.0f;
+            if (DPCT_CHECK_ERROR(
+                    t = (ev[i + 1]
+                             ->get_profiling_info<
+                                 sycl::info::event_profiling::command_end>() -
+                         ev[i]
+                             ->get_profiling_info<sycl::info::event_profiling::
+                                                      command_start>()) /
+                        1000000.0f) == 0) ms[ph[i]] += t;
+        }
+        std::swap(ev[0], ev[used - 1]);
+        std::swap(ph[0], ph[used - 1]);
+        used = 1;
+    }
+    catch (sycl::exception const &exc) {
+      std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                << ", line:" << __LINE__ << std::endl;
+      std::exit(1);
+    }
+    ~PeTimer() {
+        if (dev < 0) return;
+        int prev = 0;
+        prev = dpct::get_current_device_id();
+        /*
+        DPCT1093: The "dev" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        dpct::select_device(dev);
+        for (dpct::event_ptr e : ev) DPCT_CHECK_ERROR(dpct::destroy_event(e));
+        /*
+        DPCT1093: The "prev" device may be not the one intended for use.
+        Adjust the selected device if needed.
+        */
+        dpct::select_device(prev);
+    }
+};
 }  // namespace
 
 bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
@@ -1244,6 +1625,8 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                 (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
     int32_t prev[2] = {ss.ple_prev[0], ss.ple_prev[1]};
     PfTimer pt;
+    PeTimer pe;
+    if (m.pp) pe.dev = m.pp->dev; else pe.on = false;
     const dpct::queue_ptr cs = strata::q_of(m.cs);
     // the MMQ row table lives in the borrowed cache slots, which the refill after a prompt overwrites with experts:
     // write it again for every prompt (a layout is reused as long as the chunk and the slots are the same)
@@ -1477,6 +1860,54 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         // `used` event recorded), so the copy stream never waits on an event that is not queued yet
         const strata::kernels::cpu::ExpertLayout& lay0 = strata::kernels::cpu::expert_layout();
         const bool stream_all = m.ring > STAGE && T >= stream_all_min() && m.src != nullptr;
+        const bool ps_on = stream_all && m.pp && m.pp->ps_frac > 0.0;
+        if (m.pp && !ps_on) m.pp->ps_flag.clear();
+        // multi-GPU: the peer's ring - issue its copies up to `limit` / give entries back (the peer device is current)
+        auto p_issue_until = [&](size_t limit) {
+            try {
+        PeerPrefill &P = *m.pp;
+            limit = std::min(limit, P.pseq.size());
+            while (P.p_issued < limit) {
+                const PeerPrefill::PsEntry& en = P.pseq[P.p_issued];
+                const size_t sl = P.p_issued % (size_t) P.RP;
+                if (P.plive[sl])(P.s_cp)->ext_oneapi_submit_barrier(
+                    {*P.pused[sl]});
+                /*
+                DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
+                API. While the origin API might be synchronous, it depends on
+                the type of operand memory, so you may need to call wait() on
+                event return by memcpy API to ensure synchronization behavior.
+                */
+                P.s_cp->memcpy(
+                    P.pstage[sl], en.blob,
+                    (size_t)strata::kernels::cpu::expert_layout().blob_bytes(
+                        en.l));
+                dpct::sync_barrier(P.pcopied[sl], P.s_cp);
+                P.plive[sl] = 1;
+                ++P.p_issued;
+            }
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        auto p_release_to = [&](int64_t l, int32_t e_stop, dpct::queue_ptr ps) {
+            try {
+        PeerPrefill &P = *m.pp;
+            while (P.pk < P.pseq_start[(size_t) l + 1] && P.pseq[P.pk].e < e_stop) {
+                dpct::sync_barrier(P.pused[P.pk % (size_t)P.RP], ps);
+                ++P.pk;
+                p_issue_until(P.pk + (size_t) P.RP);
+            }
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
         struct StreamEntry { int32_t l, e; const uint8_t* blob; int job; };
         std::vector<StreamEntry> seq;
         std::vector<size_t> seq_start;
@@ -1486,12 +1917,21 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         if (stream_all) {
             seq_start.assign((size_t) g.n_layers + 1, 0);
             std::vector<Stager::Job> js;
+            if (ps_on) {
+                m.pp->pseq.clear();
+                m.pp->pseq_start.assign((size_t) g.n_layers + 1, 0);
+                m.pp->ps_flag.assign((size_t) g.n_layers * m.g->n_expert, 0);
+                m.pp->p_issued = m.pp->pk = 0;
+            }
+            double ps_acc = 0.0;
             for (int64_t l = LB; l < LE; ++l) {
                 seq_start[(size_t) l] = seq.size();
+                if (ps_on) m.pp->pseq_start[(size_t) l] = m.pp->pseq.size();
                 for (int32_t e = 0; e < m.g->n_expert; ++e) {
                     if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
-                    const uint8_t* b = nullptr;
+                    if (m.pp && m.pp->peer->has(l, e)) continue;   // multi-GPU: computed on (or read from) the peer
                     int job = -1;
+                    const uint8_t* b = nullptr;
                     if (gsrc != nullptr) {   // read by the stager's thread when its turn comes (see Stager::Job)
                         job = (int) js.size();
                         js.push_back({nullptr, (size_t) lay0.blob_bytes(l), nullptr, (int32_t) l, e, gsrc});
@@ -1501,6 +1941,15 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     } else {
                         b = m.src->blob(l, e);
                         if (!b) { err = "prefill: expert source has no blob"; return false; }
+                        if (ps_on && m.src->pinned(l, e)) {   // multi-GPU: every ps_frac-th one goes to the peer's ring
+                            ps_acc += m.pp->ps_frac;
+                            if (ps_acc >= 1.0) {
+                                ps_acc -= 1.0;
+                                m.pp->pseq.push_back({(int32_t) l, e, b});
+                                m.pp->ps_flag[(size_t) l * m.g->n_expert + e] = 1;
+                                continue;
+                            }
+                        }
                         if (!m.src->pinned(l, e)) {
                             job = (int) js.size();
                             js.push_back({b, (size_t) lay0.blob_bytes(l)});
@@ -1509,7 +1958,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     seq.push_back({(int32_t) l, e, b, job});
                 }
             }
-            for (int64_t l = LE; l <= g.n_layers; ++l) seq_start[(size_t) l] = seq.size();
+            for (int64_t l = LE; l <= g.n_layers; ++l) {
+                seq_start[(size_t) l] = seq.size();
+                if (ps_on) m.pp->pseq_start[(size_t) l] = m.pp->pseq.size();
+            }
             m.stager->start(std::move(js));
         }
         struct StagerDone {
@@ -1525,7 +1977,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                 const auto th = Clock::now();
                 const size_t bytes = (size_t) lay0.blob_bytes(en.l);
                 if (m.stage_live[sl])(m.copy)->ext_oneapi_submit_barrier(
-                    {*m.used[sl]});
+                    {*m.used[m.used_of[sl]]});
                 if (en.job < 0) {
                     /*
                     DPCT1124: cudaMemcpyAsync is migrated to asynchronous
@@ -1593,7 +2045,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     const auto th = Clock::now();
                     const size_t bytes = (size_t) lay0.blob_bytes(en.l);
                     if (m.stage_live[sl])(m.copy)->ext_oneapi_submit_barrier(
-                        {*m.used[sl]});
+                        {*m.used[m.used_of[sl]]});
                     if (en.job < 0) {
                         /*
                         DPCT1124: cudaMemcpyAsync is migrated to
@@ -1636,6 +2088,21 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
             else issue_until(upto + (size_t) m.ring);
         };
         lap("expert stream plan");
+        if (ps_on) {
+            int pd = 0;
+            pd = dpct::get_current_device_id();
+            /*
+            DPCT1093: The "m.pp->dev" device may be not the one intended for
+            use. Adjust the selected device if needed.
+            */
+            dpct::select_device(m.pp->dev);
+            p_issue_until((size_t) m.pp->RP);
+            /*
+            DPCT1093: The "pd" device may be not the one intended for use.
+            Adjust the selected device if needed.
+            */
+            dpct::select_device(pd);
+        }
         host_setup_ms += ms_since(tsetup);
         bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
         for (int64_t l = LB; l < LE; ++l) {
@@ -2015,47 +2482,94 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                     if (wgi->kind != core::WeightKind::Bf16InF32) { err = "prefill: shared gate is not BF16"; return false; }
                     m.gemm.bf16(m.mixed_bf, (const uint16_t*) wgi->data, m.sg, T, 1, N);
                     if (m.mixed_bf_lo) m.gemm.bf16(m.mixed_bf_lo, (const uint16_t*) wgi->data, m.sg, T, 1, N, 0, 1.0f);
-                    // group the (token, k) pairs by expert on the host
-                    pt.mark(kPfHostGroup, cs);
-                    // (the sync below also orders this layer's writes of slot/src/bounds after the previous
-                    // layer's kernels that read them)
-                    const auto tg0 = Clock::now();
-                    const bool grp_mapped = m.grp_host != nullptr;
-                    int32_t* ids_h = grp_mapped ? m.grp_host : m.ids_host.data();
-                    int32_t* slot_h = grp_mapped ? m.grp_host + m.grp_tk : m.slot_host.data();
-                    int32_t* src_h = grp_mapped ? m.grp_host + 2 * m.grp_tk : m.src_host.data();
-                    if (grp_mapped) copy_i32(m.grp_dev, m.ids, T * K, m.cs);
-                    /*
-                    DPCT1124: cudaMemcpyAsync is migrated to asynchronous
-                    memcpy API. While the origin API might be synchronous, it
-                    depends on the type of operand memory, so you may need to
-                    call wait() on event return by memcpy API to ensure
-                    synchronization behavior.
-                    */
-                    else m.cs->memcpy(m.ids_host.data(), m.ids,
-                                      (size_t)T * K * 4);
-                    m.cs->wait();
-                    pt.fold();
-                    const auto tg1 = Clock::now();
-                    std::fill(m.cnt.begin(), m.cnt.end(), 0);
-                    for (int64_t i = 0; i < T * K; ++i) {
-                        const int32_t e = ids_h[(size_t) i];
-                        if (e < 0 || e >= m.g->n_expert) { err = "prefill: routed id out of range"; return false; }
-                        ++m.cnt[(size_t) e];
-                    }
-                    m.off[0] = 0;
-                    for (int64_t e = 0; e < m.g->n_expert; ++e) m.off[(size_t) e + 1] = m.off[(size_t) e] + m.cnt[(size_t) e];
-                    std::vector<int32_t> fill(m.off.begin(), m.off.end() - 1);
-                    for (int64_t i = 0; i < T * K; ++i) {
-                        const int32_t e = ids_h[(size_t) i];
-                        const int32_t p = fill[(size_t) e]++;
-                        slot_h[(size_t) i] = p;
-                        src_h[(size_t) p] = (int32_t) (i / K);
-                    }
-                    if (grp_mapped) {
-                        copy_i32(m.slot_dev, m.grp_dev + m.grp_tk, T * K, m.cs);
-                        copy_i32(m.src_dev, m.grp_dev + 2 * m.grp_tk, T * K, m.cs);
+                    // #136: STRATA_PF_FUSED=1 - the Q2_0 pack's experts on the fused int8 kernels (moe_fused.hpp),
+                    // grouped on the GPU: no host sync.  Only where every expert's place is known before the routing -
+                    // the streamed walk, in which every non-resident expert of the layer comes through the ring in id
+                    // order - and where the MMQ buffers exist: they hold the fused path's own (the per-token int8
+                    // activations in Xq, the int8 H in H, the grouping tables in GU).  Chunks below stream_all_min()
+                    // keep MMQ; without the variable nothing here runs.  A native pack's layer takes the native kernels
+                    // (moe_fused_iq.hpp) where they cover its two formats, else MMQ (or the FP16 path: IQ1_M).
+                    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
+                    const bool use_mmq = mmq_plan().any && mmq_plan().layer[(size_t) l];
+                    const int mmq_gt = lay.native ? lay.fmt[(size_t) l].gu_type : 42;
+                    const int mmq_dt = lay.native ? lay.fmt[(size_t) l].d_type : 42;
+                    // --peer-device: MMQ only, whether or not the peer took the prompt path (set_peer can decline), as
+                    // fused_ring() sized the ring and the buffers for it
+                    const bool no_peer = !core::peer_portable();
+                    const bool fused_nat = use_mmq && stream_all && no_peer && lay.native && fused::native_supported(mmq_gt, mmq_dt);
+                    const bool fused_l = (use_mmq && stream_all && no_peer && !lay.native && fused::enabled()) || fused_nat;
+                    size_t n_order = 0;                   // the routed experts (the debug report; unknown when fused)
+                    bool peer_now = false;                // multi-GPU: the peer computed rows of this layer (MMQ path only)
+                    if (fused_l) {
+                        if (static bool said = false; !said) {
+                            said = true;
+                            std::fprintf(stderr, "strata: prompt experts on the fused int8 kernels (STRATA_PF_FUSED=1, "
+                                                 "#136)\n");
+                        }
+                        pt.mark(kPfGather, cs);
+                        // the layer's input to int8 once per token; the rows of each expert from the router's ids
+                        if (fused_nat) fused::quantize_act_native(m.mixed, T, N, m.Xq, m.cs);
+                        else fused::quantize_act(m.mixed, T, N, m.Xq, m.cs);
+                        fused::group(m.ids, T * K, (int) K, (int) m.g->n_expert, m.GU, m.slot_dev, m.src_dev, m.cs);
+                        // launches over the experts in id order, each at most kMaxBatch experts of which at most a
+                        // third of the ring streamed: the next batch's blobs arrive while one computes.  An expert
+                        // the routing did not pick has no tiles; its ring slot is given back with its batch.
+                        const size_t per = (size_t) std::max(1, m.ring / 3);
+                        size_t k = seq_start[(size_t) l];
+                        const size_t kend = seq_start[(size_t) l + 1];
+                        for (int32_t e = 0; e < m.g->n_expert;) {
+                            fused::Batch b;
+                            b.e0 = e;
+                            const size_t k0 = k;
+                            for (; e < m.g->n_expert && e - b.e0 < fused::kMaxBatch; ++e) {
+                                if (k < kend && seq[k].e == e) {
+                                    if (k - k0 == per) break;
+                                    b.blob[e - b.e0] = m.stage_dev[k % (size_t) m.ring];
+                                    ++k;
+                                } else {                  // not streamed: resident (the walk streams all others)
+                                    b.blob[e - b.e0] = m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]);
+                                    // counted whether routed or not (the routing stays on the GPU): at a streamed
+                                    // chunk's size (>= 1024 tokens x 10 of 512) nearly every expert is routed
+                                    ++stats_.experts_resident;
+                                }
+                            }
+                            b.e1 = e;
+                            if (k > k0) {
+                                // one copy stream, in order: the batch's last blob covers the others
+                                pt.mark(kPfWaitCopy, cs);
+                                wait_issued(k - 1);
+                                (m.cs)->ext_oneapi_submit_barrier(
+                                    {*m.copied[(k - 1) % (size_t)m.ring]});
+                            }
+                            pt.mark(kPfGemmGU, cs);
+                            if (fused_nat) {
+                                const auto& f = lay.fmt[(size_t) l];
+                                const fused::NativeGeom ng{f.gu_type, f.d_type, f.gu_row, f.d_row, f.up_off, f.down_off};
+                                fused::experts_native(b, ng, (int) m.g->n_expert, T * K, m.GU, m.Xq, m.src_dev, m.H,
+                                                      m.Dm, m.cs);
+                            } else {
+                                fused::experts(b, (int) m.g->n_expert, T * K, m.GU, m.Xq, m.src_dev, m.H, m.Dm, m.cs);
+                            }
+                            for (size_t kk = k0; kk < k; ++kk) {
+                                dpct::sync_barrier(m.used[kk % (size_t)m.ring],
+                                                   m.cs);
+                                m.used_of[kk % (size_t) m.ring] = (int) (kk % (size_t) m.ring);
+                            }
+                            if (k > k0) {
+                                consumed = k;
+                                give_back(consumed);
+                            }
+                        }
                     } else {
+                        // group the (token, k) pairs by expert on the host
+                        pt.mark(kPfHostGroup, cs);
+                        // (the sync below also orders this layer's writes of slot/src/bounds after the previous
+                        // layer's kernels that read them)
+                        const bool grp_mapped = m.grp_host != nullptr;
+                        int32_t* ids_h = grp_mapped ? m.grp_host : m.ids_host.data();
+                        int32_t* slot_h = grp_mapped ? m.grp_host + m.grp_tk : m.slot_host.data();
+                        int32_t* src_h = grp_mapped ? m.grp_host + 2 * m.grp_tk : m.src_host.data();
+                        if (grp_mapped) copy_i32(m.grp_dev, m.ids, T * K, m.cs);
                         /*
                         DPCT1124: cudaMemcpyAsync is migrated to
                         asynchronous memcpy API. While the origin API might be
@@ -2063,47 +2577,73 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         so you may need to call wait() on event return by memcpy
                         API to ensure synchronization behavior.
                         */
-                        m.cs->memcpy(m.slot_dev, m.slot_host.data(),
-                                     (size_t)T * K * 4);
-                        /*
-                        DPCT1124: cudaMemcpyAsync is migrated to
-                        asynchronous memcpy API. While the origin API might be
-                        synchronous, it depends on the type of operand memory,
-                        so you may need to call wait() on event return by memcpy
-                        API to ensure synchronization behavior.
-                        */
-                        m.cs->memcpy(m.src_dev, m.src_host.data(),
-                                     (size_t)T * K * 4);
-                    }
-                    grp_wait_ms += std::chrono::duration<double, std::milli>(tg1 - tg0).count();
-                    grp_cpu_ms += std::chrono::duration<double, std::milli>(Clock::now() - tg1).count();
-                    // the experts, in id order: resident ones from VRAM, the others through the staging ring
-                    std::vector<int32_t> order;
-                    for (int32_t e = 0; e < m.g->n_expert; ++e) if (m.cnt[(size_t) e] > 0) order.push_back(e);
-                    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
-                    const bool use_mmq = mmq_plan().any && mmq_plan().layer[(size_t) l];
-                    const int mmq_gt = lay.native ? lay.fmt[(size_t) l].gu_type : 42;
-                    const int mmq_dt = lay.native ? lay.fmt[(size_t) l].d_type : 42;
-                    const size_t mmq_gub = use_mmq ? mmq::matrix_bytes(mmq_gt, 1280, N) : 0;
-                    const size_t mmq_db = use_mmq ? mmq::matrix_bytes(mmq_dt, N, 640) : 0;
-                    pt.mark(kPfGather, cs);
-                    if (use_mmq) {
-                        // step 2b: the layer's activations as q8_1 rows in expert order, straight from `mixed`
-                        mmq::quantize(m.mixed, m.src_dev, m.Xq, mmq_gt, N, N, T * K, m.cs);
-                        // each group's rows: absolute bounds (gate/up reads the layer's rows), relative ones (down
-                        // reads the group's own quantized H)
-                        const size_t n = order.size(), ng = (n + MMQ_GROUP - 1) / MMQ_GROUP;
-                        m.bounds_host.resize(n + 1 + ng * (MMQ_GROUP + 1));
-                        for (size_t j = 0; j < n; ++j) m.bounds_host[j] = m.off[(size_t) order[j]];
-                        m.bounds_host[n] = (int32_t) (T * K);
-                        for (size_t g = 0; g < ng; ++g)
-                            for (size_t i = 0; i <= MMQ_GROUP; ++i)
-                                m.bounds_host[n + 1 + g * (MMQ_GROUP + 1) + i] =
-                                    m.bounds_host[std::min(n, g * MMQ_GROUP + i)] - m.bounds_host[g * MMQ_GROUP];
+                        else m.cs->memcpy(m.ids_host.data(), m.ids,
+                                          (size_t)T * K * 4);
+                        m.cs->wait();
+                        pt.fold();
+                        if (pe.on) {   // the peer's marks so far are done: the primary waited for its last rows
+                            /*
+                            DPCT1093: The "pe.dev" device may be not the one
+                            intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            /*
+                            DPCT1093: The "pd" device may be not the one
+                            intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            int pd = 0; pd = dpct::get_current_device_id();
+                                dpct::select_device(pe.dev); m.pp->s->wait();
+                                pe.fold(); dpct::select_device(pd);
+                        }
+                        std::fill(m.cnt.begin(), m.cnt.end(), 0);
+                        for (int64_t i = 0; i < T * K; ++i) {
+                            const int32_t e = ids_h[(size_t) i];
+                            if (e < 0 || e >= m.g->n_expert) { err = "prefill: routed id out of range"; return false; }
+                            ++m.cnt[(size_t) e];
+                        }
+                        // multi-GPU: the rows of the experts the peer computes go last, as one block [rows_local, T*K)
+                        const bool pre_mmq = mmq_plan().any && mmq_plan().layer[(size_t) l];
+                        std::vector<char> on_peer;
+                        int64_t rows_local = T * K, rows_peer = 0;
+                        if (m.pp && pre_mmq) {
+                            on_peer.assign((size_t) m.g->n_expert, 0);
+                            for (int32_t e = 0; e < m.g->n_expert; ++e) {
+                                const int32_t c = m.cnt[(size_t) e];
+                                if (c > 0 && !m.pp->ps_flag.empty() && m.pp->ps_flag[(size_t) l * m.g->n_expert + e]) {   // peer-streamed
+                                    on_peer[(size_t) e] = 2;
+                                    rows_peer += c;
+                                    continue;
+                                }
+                                if (c == 0 || (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) ||
+                                    !m.pp->peer->has(l, e))
+                                    continue;
+                                if (rows_peer + c > m.pp->cap_rows) { ++m.pp->over_cap; continue; }
+                                on_peer[(size_t) e] = 1;
+                                rows_peer += c;
+                            }
+                            rows_local = T * K - rows_peer;
+                        }
+                        {
+                            int32_t r = 0;
+                            for (int32_t e = 0; e < m.g->n_expert; ++e)
+                                if (on_peer.empty() || !on_peer[(size_t) e]) { m.off[(size_t) e] = r; r += m.cnt[(size_t) e]; }
+                            // the peer's rows in order_peer's order (peer-held, then peer-streamed): its groups need them contiguous
+                            for (int kind = 1; kind <= 2 && !on_peer.empty(); ++kind)
+                                for (int32_t e = 0; e < m.g->n_expert; ++e)
+                                    if (on_peer[(size_t) e] == kind) { m.off[(size_t) e] = r; r += m.cnt[(size_t) e]; }
+                            m.off[(size_t) m.g->n_expert] = r;
+                        }
+                        std::vector<int32_t> fill(m.off.begin(), m.off.end() - 1);
+                        for (int64_t i = 0; i < T * K; ++i) {
+                            const int32_t e = ids_h[(size_t) i];
+                            const int32_t p = fill[(size_t) e]++;
+                            slot_h[(size_t) i] = p;
+                            src_h[(size_t) p] = (int32_t) (i / K);
+                        }
                         if (grp_mapped) {
-                            int32_t* bh = m.grp_host + 3 * m.grp_tk;
-                            std::memcpy(bh, m.bounds_host.data(), m.bounds_host.size() * 4);
-                            copy_i32(m.bounds_dev, m.grp_dev + 3 * m.grp_tk, (int64_t) m.bounds_host.size(), m.cs);
+                            copy_i32(m.slot_dev, m.grp_dev + m.grp_tk, T * K, m.cs);
+                            copy_i32(m.src_dev, m.grp_dev + 2 * m.grp_tk, T * K, m.cs);
                         } else {
                             /*
                             DPCT1124: cudaMemcpyAsync is migrated to
@@ -2113,70 +2653,93 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             return by memcpy API to ensure synchronization
                             behavior.
                             */
-                            m.cs->memcpy(m.bounds_dev, m.bounds_host.data(),
-                                         m.bounds_host.size() * 4);
+                            m.cs->memcpy(m.slot_dev, m.slot_host.data(),
+                                         (size_t)T * K * 4);
+                            /*
+                            DPCT1124: cudaMemcpyAsync is migrated to
+                            asynchronous memcpy API. While the origin API might
+                            be synchronous, it depends on the type of operand
+                            memory, so you may need to call wait() on event
+                            return by memcpy API to ensure synchronization
+                            behavior.
+                            */
+                            m.cs->memcpy(m.src_dev, m.src_host.data(),
+                                         (size_t)T * K * 4);
                         }
-                    } else {
-                        gather_rows16(m.mixed_h, m.src_dev, m.Xs, T * K, N, m.cs);
-                    }
-                    // Stage ahead: the copy stream moves blobs host -> device while the compute stream works.
-                    int stage_next = 0;
-                    std::vector<int> stage_of(order.size(), -1);
-                    // the unpinned ones are copied to pinned buffers by the stager's threads, in this order
-                    std::vector<int> job_of(order.size(), -1);
-                    if (!stream_all) {
-                        std::vector<Stager::Job> js;
-                        for (size_t j = 0; j < order.size(); ++j) {
-                            const int32_t e = order[j];
-                            if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
-                            if (m.src->pinned(l, e)) continue;
-                            job_of[j] = (int) js.size();
-                            if (gsrc != nullptr) {
-                                js.push_back({nullptr, (size_t) lay.blob_bytes(l), nullptr, (int32_t) l, e, gsrc});
-                                continue;
-                            }
-                            if (m.src->transient(l, e)) {   // CS-T: copied by the source
-                                js.push_back({nullptr, (size_t) lay.blob_bytes(l), m.src, (int32_t) l, e});
-                                continue;
+                        // the experts, in id order: resident ones from VRAM, the others through the staging ring
+                        std::vector<int32_t> order, order_peer;
+                        for (int32_t e = 0; e < m.g->n_expert; ++e)
+                            if (m.cnt[(size_t) e] > 0 && (on_peer.empty() || on_peer[(size_t) e] != 2))
+                                (!on_peer.empty() && on_peer[(size_t) e] ? order_peer : order).push_back(e);
+                        for (int32_t e = 0; e < m.g->n_expert && !on_peer.empty(); ++e)   // the peer-streamed ones last:
+                            if (on_peer[(size_t) e] == 2) order_peer.push_back(e);        // their copies get the most time
+                        n_order = order.size();
+                        const size_t mmq_gub = use_mmq ? mmq::matrix_bytes(mmq_gt, 1280, N) : 0;
+                        const size_t mmq_db = use_mmq ? mmq::matrix_bytes(mmq_dt, N, 640) : 0;
+                        pt.mark(kPfGather, cs);
+                        if (use_mmq) {
+                            // step 2b: the layer's activations as q8_1 rows in expert order, straight from `mixed`
+                            mmq::quantize(m.mixed, m.src_dev, m.Xq, mmq_gt, N, N, T * K, m.cs);
+                            // each group's rows: absolute bounds (gate/up reads the layer's rows), relative ones (down
+                            // reads the group's own quantized H)
+                            const size_t n = order.size(), ng = (n + MMQ_GROUP - 1) / MMQ_GROUP;
+                            m.bounds_host.resize(n + 1 + ng * (MMQ_GROUP + 1));
+                            for (size_t j = 0; j < n; ++j) m.bounds_host[j] = m.off[(size_t) order[j]];
+                            m.bounds_host[n] = (int32_t) rows_local;
+                            for (size_t g = 0; g < ng; ++g)
+                                for (size_t i = 0; i <= MMQ_GROUP; ++i)
+                                    m.bounds_host[n + 1 + g * (MMQ_GROUP + 1) + i] =
+                                        m.bounds_host[std::min(n, g * MMQ_GROUP + i)] - m.bounds_host[g * MMQ_GROUP];
+                            if (grp_mapped) {
+                                int32_t* bh = m.grp_host + 3 * m.grp_tk;
+                                std::memcpy(bh, m.bounds_host.data(), m.bounds_host.size() * 4);
+                                copy_i32(m.bounds_dev, m.grp_dev + 3 * m.grp_tk, (int64_t) m.bounds_host.size(), m.cs);
+                            } else {
+                                /*
+                                DPCT1124: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                m.cs->memcpy(m.bounds_dev, m.bounds_host.data(),
+                                             m.bounds_host.size() * 4);
                             }
-                            const uint8_t* b = m.src->blob(l, e);
-                            if (!b) { err = "prefill: expert source has no blob"; return false; }
-                            js.push_back({b, (size_t) lay.blob_bytes(l)});
+                        } else {
+                            gather_rows16(m.mixed_h, m.src_dev, m.Xs, T * K, N, m.cs);
                         }
-                        m.stager->start(std::move(js));
-                    }
-                    StagerDone stager_done{stream_all ? nullptr : m.stager.get()};
-                    auto stage_one = [&](size_t j) -> bool {
-                        try {
-                    const int32_t e = order[j];
-                        const bool resident = m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0;
-                        if (resident) return true;
-                        const int sl = stage_next;
-                        stage_next = (stage_next + 1) % STAGE;
-                        const auto th = Clock::now();
-                        const bool pinned = m.src->pinned(l, e);   // pinned: never transient
-                        const uint8_t* b = pinned ? m.src->blob(l, e) : nullptr;
-                        if (pinned && !b) { err = "prefill: expert source has no blob"; return false; }
-                        if (pinned) {
-                            // DMA straight from the page-locked arena: the copy stream only waits for the slot
-                            if (m.stage_live[sl])(m.copy)
-                                ->ext_oneapi_submit_barrier({*m.used[sl]});
+                        // multi-GPU: the peer's share, enqueued before the primary's own experts so both cards work at once
+                        peer_now = use_mmq && !order_peer.empty();
+                        if (peer_now) {
+                            PeerPrefill& P = *m.pp;
+                            dpct::sync_barrier(P.ev_in, m.cs);
+                            int prevd = 0;
+                            prevd = dpct::get_current_device_id();
                             /*
-                            DPCT1124: cudaMemcpyAsync is migrated to
+                            DPCT1093: The "P.dev" device may be not the one
+                            intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            dpct::select_device(P.dev);
+                            const dpct::queue_ptr ps = P.s;
+                            ps->ext_oneapi_submit_barrier({*P.ev_in});
+                            if (P.out_pending) {
+                                ps->ext_oneapi_submit_barrier({*P.ev_done});
+                                P.out_pending = false;
+                            }
+                            pe.mark(kPeMoeIn, ps);
+                            /*
+                            DPCT1124: cudaMemcpyPeerAsync is migrated to
                             asynchronous memcpy API. While the origin API might
                             be synchronous, it depends on the type of operand
                             memory, so you may need to call wait() on event
                             return by memcpy API to ensure synchronization
                             behavior.
                             */
-                            m.copy->memcpy(m.stage_dev[sl], b,
-                                           (size_t)lay.blob_bytes(l));
-                            ++stats_.experts_dma;
-                        } else {
-                            // copied to a pinned buffer by the stager (waits only if it is behind), then DMA
-                            const uint8_t* hb = m.stager->wait(job_of[j]);
-                            if (m.stage_live[sl])(m.copy)
-                                ->ext_oneapi_submit_barrier({*m.used[sl]});
+                            dpct::async_dpct_memcpy(P.mixed, P.dev, m.mixed,
+                                                    prevd, (size_t)T * N * 4,
+                                                    *ps);
                             /*
                             DPCT1124: cudaMemcpyAsync is migrated to
                             asynchronous memcpy API. While the origin API might
@@ -2185,129 +2748,334 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             return by memcpy API to ensure synchronization
                             behavior.
                             */
-                            m.copy->memcpy(m.stage_dev[sl], hb, (size_t)lay.blob_bytes(l));
-                            m.stager->issued_one(job_of[j], m.copy);
-                        }
-                        dpct::sync_barrier(m.copied[sl], m.copy);
-                        m.stage_live[sl] = true;
-                        stage_of[j] = sl;
-                        stats_.ms_experts_host += ms_since(th);
-                        ++stats_.experts_streamed;
-                        return true;
-                    }
-                    catch (sycl::exception const &exc) {
-                      std::cerr << exc.what()
-                                << "Exception caught at file:" << __FILE__
-                                << ", line:" << __LINE__ << std::endl;
-                      std::exit(1);
-                    }
-                    };
-                    // one expert's products from its blob on the device; `slot` (a ring slot, or -1 for a resident
-                    // expert) is released once the blob is read
-                    auto compute = [&](size_t j, const uint8_t *blob_dev,
-                                       int slot) -> bool {
-                        try {
-                    const int32_t e = order[j];
-                        pt.mark(kPfDequant, cs);
-                        if (use_mmq) {
-                            // gather the expert into its group slot (GGUF blocks, unchanged or converted)
-                            const size_t q = j % MMQ_GROUP;
-                            if (lay.native) {
+                            ps->memcpy(P.src,
+                                       src_h +
+                                           rows_local, // multi-GPU: the mapped
+                                                       // table when on
+                                       (size_t)rows_peer * 4);
+                            const size_t n = order_peer.size();
+                            if (P.compact) {
+                                // groups of up to MMQ_GROUP experts and at most G rows, each computed from its own rows
+                                P.groups.clear();
+                                {
+                                    size_t g0 = 0;
+                                    int64_t gr = 0;
+                                    for (size_t j = 0; j < n; ++j) {
+                                        const int64_t c = m.cnt[(size_t) order_peer[j]];
+                                        if (j > g0 && (j - g0 == (size_t) MMQ_GROUP || gr + c > P.G)) { P.groups.push_back({g0, j}); g0 = j; gr = 0; }
+                                        gr += c;
+                                    }
+                                    if (n > g0) P.groups.push_back({g0, n});
+                                }
+                                const size_t ng = P.groups.size();
+                                P.bounds_host.resize(n + 1 + ng * (MMQ_GROUP + 1));
+                                for (size_t j = 0; j < n; ++j) P.bounds_host[j] = m.off[(size_t) order_peer[j]] - (int32_t) rows_local;
+                                P.bounds_host[n] = (int32_t) rows_peer;
+                                for (size_t g2 = 0; g2 < ng; ++g2)
+                                    for (size_t i = 0; i <= MMQ_GROUP; ++i)
+                                        P.bounds_host[n + 1 + g2 * (MMQ_GROUP + 1) + i] =
+                                            P.bounds_host[std::min(P.groups[g2].second, P.groups[g2].first + i)] -
+                                            P.bounds_host[P.groups[g2].first];
+                                /*
+                                DPCT1124: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                ps->memcpy(P.bounds, P.bounds_host.data(),
+                                           P.bounds_host.size() * 4);
+                                pe.mark(kPeMoeGemm, ps);
                                 const auto& f = lay.fmt[(size_t) l];
-                                mmq::gather_native(blob_dev, blob_dev + f.up_off, mmq_gub / 2, blob_dev + f.down_off,
-                                                   mmq_db, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                                for (size_t g2 = 0; g2 < ng; ++g2) {
+                                    const size_t j0 = P.groups[g2].first, j1 = P.groups[g2].second;
+                                    const int ngx = (int) (j1 - j0);
+                                    int64_t maxr = 0;
+                                    for (size_t j = j0; j < j1; ++j) {
+                                        const int32_t e = order_peer[j];
+                                        maxr = std::max<int64_t>(maxr, m.cnt[(size_t) e]);
+                                        const uint8_t* bd = nullptr;
+                                        int psl = -1;
+                                        if (on_peer[(size_t) e] == 2) {   // from the peer's ring
+                                            p_release_to(l, e, ps);
+                                            if (P.pk >= P.pseq_start[(size_t) l + 1] || P.pseq[P.pk].e != e) {
+                                                err = "prefill: a peer-streamed expert is not next in the peer's ring";
+                                                /*
+                                                DPCT1093: The "prevd" device
+                                                may be not the one intended for
+                                                use. Adjust the selected device
+                                                if needed.
+                                                */
+                                                dpct::select_device(prevd);
+                                                return false;
+                                            }
+                                            psl = (int) (P.pk % (size_t) P.RP);
+                                            ps->ext_oneapi_submit_barrier(
+                                                {*P.pcopied[(size_t)psl]});
+                                            bd = P.pstage[(size_t) psl];
+                                            ++P.ps_experts;
+                                        } else {
+                                            bd = P.peer->slot_ptr(l, e);
+                                        }
+                                        const size_t q = j - j0;
+                                        if (lay.native)
+                                            mmq::gather_native(bd, bd + f.up_off, mmq_gub / 2, bd + f.down_off, mmq_db,
+                                                               P.grp_gu + q * mmq_gub, P.grp_d + q * mmq_db, ps);
+                                        else
+                                            mmq::gather_strata_q2(bd, P.grp_gu + q * mmq_gub, P.grp_d + q * mmq_db, ps);
+                                        if (psl >= 0) {   // the slot is free once gathered
+                                            dpct::sync_barrier(
+                                                P.pused[(size_t)psl], ps);
+                                            ++P.pk;
+                                            p_issue_until(P.pk + (size_t) P.RP);
+                                        }
+                                    }
+                                    const int64_t r0 = P.bounds_host[j0], nr = P.bounds_host[j1] - r0;
+                                    if (nr <= 0) continue;
+                                    const int32_t* rel = P.bounds + n + 1 + g2 * (MMQ_GROUP + 1);
+                                    ps->memset(P.grp_gu + (size_t)ngx * mmq_gub,
+                                               0, MMQ_TAIL);
+                                    ps->memset(P.grp_d + (size_t)ngx * mmq_db,
+                                               0, MMQ_TAIL);
+                                    mmq::quantize(P.mixed, P.src + r0, P.Xq_g, mmq_gt, N, N, nr, ps);
+                                    mmq::Product gu;
+                                    gu.w = P.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
+                                    gu.n = ngx; gu.xq = P.Xq_g; gu.bounds = rel; gu.ids = P.ident;
+                                    gu.total_rows = nr; gu.max_rows = maxr; gu.dst = P.GU_g; gu.ld_dst = 1280;
+                                    P.ctx->run(gu, ps);
+                                    mmq::swiglu(P.GU_g, P.H_g, nr, 640, !lay.native, ps);
+                                    mmq::quantize(P.H_g, nullptr, P.Hq_g, mmq_dt, 640, 640, nr, ps);
+                                    const int b = (int) (g2 & 1);
+                                    if (P.dm_live[b])
+                                        ps->ext_oneapi_submit_barrier(
+                                            {*P.ev_dm[b]}); // its last rows
+                                                            // have left
+                                    mmq::Product dn;
+                                    dn.w = P.grp_d; dn.type = mmq_dt; dn.w_rows = N; dn.w_cols = 640; dn.expert_bytes = mmq_db;
+                                    dn.n = ngx; dn.xq = P.Hq_g; dn.bounds = rel;
+                                    dn.ids = P.ident; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = P.Dm_b[b];
+                                    dn.ld_dst = N;
+                                    P.ctx->run(dn, ps);
+                                    dpct::sync_barrier(
+                                        P.ev_grp[g2 % PeerPrefill::kGrpEv], ps);
+                                    (P.s_out)->ext_oneapi_submit_barrier(
+                                        {*P.ev_grp[g2 % PeerPrefill::kGrpEv]});
+                                    /*
+                                    DPCT1124: cudaMemcpyPeerAsync is
+                                    migrated to asynchronous memcpy API. While
+                                    the origin API might be synchronous, it
+                                    depends on the type of operand memory, so
+                                    you may need to call wait() on event return
+                                    by memcpy API to ensure synchronization
+                                    behavior.
+                                    */
+                                    dpct::async_dpct_memcpy(
+                                        m.Dm + (size_t)(rows_local + r0) * N,
+                                        prevd, P.Dm_b[b], P.dev,
+                                        (size_t)nr * N * 4, *(P.s_out));
+                                    dpct::sync_barrier(P.ev_dm[b], P.s_out);
+                                    P.dm_live[b] = true;
+                                }
                             } else {
-                                mmq::gather_strata_q2(blob_dev, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                                const size_t ng = (n + MMQ_GROUP - 1) / MMQ_GROUP;
+                                P.bounds_host.resize(n + 1 + ng * (MMQ_GROUP + 1));
+                                for (size_t j = 0; j < n; ++j) P.bounds_host[j] = m.off[(size_t) order_peer[j]] - (int32_t) rows_local;
+                                P.bounds_host[n] = (int32_t) rows_peer;
+                                for (size_t g2 = 0; g2 < ng; ++g2)
+                                    for (size_t i = 0; i <= MMQ_GROUP; ++i)
+                                        P.bounds_host[n + 1 + g2 * (MMQ_GROUP + 1) + i] =
+                                            P.bounds_host[std::min(n, g2 * MMQ_GROUP + i)] - P.bounds_host[g2 * MMQ_GROUP];
+                                /*
+                                DPCT1124: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                ps->memcpy(P.bounds, P.bounds_host.data(),
+                                           P.bounds_host.size() * 4);
+                                mmq::quantize(P.mixed, P.src, P.Xq, mmq_gt, N, N, rows_peer, ps);
+                                pe.mark(kPeMoeGemm, ps);
+                                const auto& f = lay.fmt[(size_t) l];
+                                for (size_t j = 0; j < n; ++j) {
+                                    const int32_t e = order_peer[j];
+                                    const uint8_t* bd = P.peer->slot_ptr(l, e);
+                                    const size_t q = j % MMQ_GROUP;
+                                    if (lay.native)
+                                        mmq::gather_native(bd, bd + f.up_off, mmq_gub / 2, bd + f.down_off, mmq_db,
+                                                           P.grp_gu + q * mmq_gub, P.grp_d + q * mmq_db, ps);
+                                    else
+                                        mmq::gather_strata_q2(bd, P.grp_gu + q * mmq_gub, P.grp_d + q * mmq_db, ps);
+                                    if (q + 1 < MMQ_GROUP && j + 1 < n) continue;
+                                    const size_t j0 = j - q, g2 = j0 / MMQ_GROUP;
+                                    const int ngx = (int) (q + 1);
+                                    const int64_t r0 = P.bounds_host[j0], nr = P.bounds_host[j + 1] - r0;
+                                    int64_t maxr = 0;
+                                    for (size_t i = j0; i <= j; ++i) maxr = std::max<int64_t>(maxr, m.cnt[(size_t) order_peer[i]]);
+                                    ps->memset(P.grp_gu + (size_t)ngx * mmq_gub,
+                                               0, MMQ_TAIL);
+                                    ps->memset(P.grp_d + (size_t)ngx * mmq_db,
+                                               0, MMQ_TAIL);
+                                    mmq::Product gu;
+                                    gu.w = P.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
+                                    gu.n = ngx; gu.xq = P.Xq; gu.bounds = P.bounds + j0; gu.ids = P.ident;
+                                    gu.total_rows = rows_peer; gu.max_rows = maxr; gu.dst = P.GU; gu.ld_dst = 1280;
+                                    P.ctx->run(gu, ps);
+                                    mmq::swiglu(P.GU + r0 * 1280, P.H + r0 * 640, nr, 640, !lay.native, ps);
+                                    mmq::quantize(P.H + r0 * 640, nullptr, P.Hq, mmq_dt, 640, 640, nr, ps);
+                                    mmq::Product dn;
+                                    dn.w = P.grp_d; dn.type = mmq_dt; dn.w_rows = N; dn.w_cols = 640; dn.expert_bytes = mmq_db;
+                                    dn.n = ngx; dn.xq = P.Hq; dn.bounds = P.bounds + n + 1 + g2 * (MMQ_GROUP + 1);
+                                    dn.ids = P.ident; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = P.Dm + r0 * N;
+                                    dn.ld_dst = N;
+                                    P.ctx->run(dn, ps);
+                                    if (P.out_pipe && nr > 0) {   // this group's rows go back while the next group computes
+                                        dpct::sync_barrier(P.ev_grp[g2], ps);
+                                        (P.s_out)->ext_oneapi_submit_barrier(
+                                            {*P.ev_grp[g2]});
+                                        /*
+                                        DPCT1124: cudaMemcpyPeerAsync is
+                                        migrated to asynchronous memcpy API.
+                                        While the origin API might be
+                                        synchronous, it depends on the type of
+                                        operand memory, so you may need to call
+                                        wait() on event return by memcpy API to
+                                        ensure synchronization behavior.
+                                        */
+                                        dpct::async_dpct_memcpy(
+                                            m.Dm +
+                                                (size_t)(rows_local + r0) * N,
+                                            prevd, P.Dm + (size_t)r0 * N, P.dev,
+                                            (size_t)nr * N * 4, *(P.s_out));
+                                    }
+                                }
                             }
-                            if (slot >= 0)
-                                dpct::sync_barrier(m.used[slot], m.cs);
-                            if (q + 1 < MMQ_GROUP && j + 1 < order.size()) return true;
-                            // the group's products: gate/up, swiglu, the group's H to q8_1, down
-                            const size_t j0 = j - q, g = j0 / MMQ_GROUP, n = order.size();
-                            const int ngx = (int) (q + 1);
-                            const int64_t r0 = m.bounds_host[j0], nr = m.bounds_host[j + 1] - r0;
-                            int64_t maxr = 0;
-                            for (size_t i = j0; i <= j; ++i) maxr = std::max<int64_t>(maxr, m.cnt[(size_t) order[i]]);
-                            pt.mark(kPfGemmGU, cs);
-                            // the zeroed tail after the group's last expert (see MMQ_TAIL)
-                            m.cs->memset(m.grp_gu + (size_t)ngx * mmq_gub, 0,
-                                         MMQ_TAIL);
-                            m.cs->memset(m.grp_d + (size_t)ngx * mmq_db, 0,
-                                         MMQ_TAIL);
-                            mmq::Product gu;
-                            gu.w = m.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
-                            gu.n = ngx; gu.xq = m.Xq; gu.bounds = m.bounds_dev + j0; gu.ids = m.ids_identity;
-                            gu.total_rows = T * K; gu.max_rows = maxr; gu.dst = m.GU; gu.ld_dst = 1280;
-                            m.mmq_ctx->run(gu, m.cs);
-                            mmq::swiglu(m.GU + r0 * 1280, m.H + r0 * 640, nr, 640, !lay.native, m.cs);
-                            pt.mark(kPfGemmD, cs);
-                            mmq::quantize(m.H + r0 * 640, nullptr, m.Hq, mmq_dt, 640, 640, nr, m.cs);
-                            mmq::Product dn;
-                            dn.w = m.grp_d; dn.type = mmq_dt; dn.w_rows = N; dn.w_cols = 640; dn.expert_bytes = mmq_db;
-                            dn.n = ngx; dn.xq = m.Hq; dn.bounds = m.bounds_dev + n + 1 + g * (MMQ_GROUP + 1);
-                            dn.ids = m.ids_identity; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = m.Dm + r0 * N;
-                            dn.ld_dst = N;
-                            m.mmq_ctx->run(dn, m.cs);
-                            return true;
+                            pe.mark(kPeMoeOut, ps);
+                            if (P.out_pipe) {
+                                dpct::sync_barrier(P.ev_done, P.s_out);
+                                P.out_pending = true;
+                            } else {
+                                /*
+                                DPCT1124: cudaMemcpyPeerAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                dpct::async_dpct_memcpy(
+                                    m.Dm + (size_t)rows_local * N, prevd, P.Dm,
+                                    P.dev, (size_t)rows_peer * N * 4, *ps);
+                                dpct::sync_barrier(P.ev_done, ps);
+                            }
+                            pe.mark(kPeIdle, ps);
+                            /*
+                            DPCT1093: The "prevd" device may be not the one
+                            intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            dpct::select_device(prevd);
+                            ++P.layers;
+                            P.experts += (int64_t) n;
+                            P.rows += rows_peer;
                         }
-                        const int q = (int) (j % DQ);
-                        if (lay.native) {
-                            // plan v0.3 P6: a native pack's layer, dequantized by llama.cpp's own formulas
-                            const auto& f = lay.fmt[(size_t) l];
-                            strata::kernels::iq_dequant_gu_f16(f.gu_type, blob_dev, blob_dev + f.up_off, f.n_ff, f.n_embd,
-                                                               m.dq_gu[q], m.cs);
-                            strata::kernels::iq_dequant_f16(f.d_type, blob_dev + f.down_off, f.n_embd * f.n_ff, m.dq_d[q], m.cs);
-                        } else {
-                            blob_dequant_f16(blob_dev, m.dq_gu[q], m.dq_d[q], m.cs);
+                        if (ps_on) {   // multi-GPU: this layer's peer-ring entries the routing did not pick give their slots back
+                            int pd = 0;
+                            pd = dpct::get_current_device_id();
+                            /*
+                            DPCT1093: The "m.pp->dev" device may be not the
+                            one intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            dpct::select_device(m.pp->dev);
+                            p_release_to(l, (int32_t) m.g->n_expert, m.pp->s);
+                            /*
+                            DPCT1093: The "pd" device may be not the one
+                            intended for use. Adjust the selected device if
+                            needed.
+                            */
+                            dpct::select_device(pd);
                         }
-                        if (slot >= 0) dpct::sync_barrier(m.used[slot], m.cs);
-                        const int64_t o0 = m.off[(size_t) e], ne = m.cnt[(size_t) e];
-                        pt.mark(kPfGemmGU, cs);
-                        m.gemm.f16(m.Xs + o0 * N, m.dq_gu[q], m.GU + o0 * 1280, ne, 1280, N);
-                        swiglu_interleaved(m.GU + o0 * 1280, m.Hh + o0 * 640, ne, m.cs);
-                        pt.mark(kPfGemmD, cs);
-                        m.gemm.f16(m.Hh + o0 * 640, m.dq_d[q], m.Dm + o0 * N, ne, N, 640);
-                        return true;
-                    }
-                    catch (sycl::exception const &exc) {
-                      std::cerr << exc.what()
-                                << "Exception caught at file:" << __FILE__
-                                << ", line:" << __LINE__ << std::endl;
-                      std::exit(1);
-                    }
-                    };
-                    if (!stream_all) {
-                        size_t staged = 0;
-                        const size_t lookahead = STAGE - 1;
-                        for (size_t j = 0; j < order.size(); ++j) {
-                            while (staged < order.size() && staged <= j + lookahead) {
-                                if (!stage_one(staged)) return false;
-                                ++staged;
+                        // Stage ahead: the copy stream moves blobs host -> device while the compute stream works.
+                        int stage_next = 0;
+                        std::vector<int> stage_of(order.size(), -1);
+                        // the unpinned ones are copied to pinned buffers by the stager's threads, in this order
+                        std::vector<int> job_of(order.size(), -1);
+                        if (!stream_all) {
+                            std::vector<Stager::Job> js;
+                            for (size_t j = 0; j < order.size(); ++j) {
+                                const int32_t e = order[j];
+                                if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
+                                if (m.src->pinned(l, e)) continue;
+                                job_of[j] = (int) js.size();
+                                if (gsrc != nullptr) {   // SYCL port: --stream-experts - the stager's thread reads it from the GGUF
+                                js.push_back({nullptr, (size_t) lay.blob_bytes(l), nullptr, (int32_t) l, e, gsrc});
+                                continue;
                             }
-                            const int32_t e = order[j];
-                            if (stage_of[j] < 0) {
-                                ++stats_.experts_resident;
-                                if (!compute(j, m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]), -1)) return false;
-                            } else {
-                                pt.mark(kPfWaitCopy, cs);
-                                (m.cs)->ext_oneapi_submit_barrier(
-                                    {*m.copied[stage_of[j]]});
-                                if (!compute(j, m.stage_dev[stage_of[j]], stage_of[j])) return false;
+                            if (m.src->transient(l, e)) {   // CS-T: copied by the source
+                                    js.push_back({nullptr, (size_t) lay.blob_bytes(l), m.src, (int32_t) l, e});
+                                    continue;
+                                }
+                                const uint8_t* b = m.src->blob(l, e);
+                                if (!b) { err = "prefill: expert source has no blob"; return false; }
+                                js.push_back({b, (size_t) lay.blob_bytes(l)});
                             }
+                            m.stager->start(std::move(js));
                         }
-                    } else {
-                        // the streamed walk: this layer's entries [k, kend) in id order; an entry the routing did not
-                        // pick only gives its slot back
-                        size_t k = seq_start[(size_t) l];
-                        const size_t kend = seq_start[(size_t) l + 1];
-                        auto release_to = [&](int32_t e_stop) {
+                        StagerDone stager_done{stream_all ? nullptr : m.stager.get()};
+                        auto stage_one = [&](size_t j) -> bool {
                             try {
-                        while (k < kend && seq[k].e < e_stop) {
-                                dpct::sync_barrier(m.used[k % (size_t)m.ring],
-                                                   m.cs);
-                                consumed = ++k;
-                                give_back(consumed);
+                        const int32_t e = order[j];
+                            const bool resident = m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0;
+                            if (resident) return true;
+                            const int sl = stage_next;
+                            stage_next = (stage_next + 1) % STAGE;
+                            const auto th = Clock::now();
+                            const bool pinned = m.src->pinned(l, e);   // pinned: never transient
+                            const uint8_t* b = pinned ? m.src->blob(l, e) : nullptr;
+                            if (pinned && !b) { err = "prefill: expert source has no blob"; return false; }
+                            if (pinned) {
+                                // DMA straight from the page-locked arena: the copy stream only waits for the slot
+                                if (m.stage_live[sl])(m.copy)
+                                    ->ext_oneapi_submit_barrier(
+                                        {*m.used[m.used_of[sl]]});
+                                /*
+                                DPCT1124: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                m.copy->memcpy(m.stage_dev[sl], b,
+                                               (size_t)lay.blob_bytes(l));
+                                ++stats_.experts_dma;
+                            } else {
+                                // copied to a pinned buffer by the stager (waits only if it is behind), then DMA
+                                const uint8_t* hb = m.stager->wait(job_of[j]);
+                                if (m.stage_live[sl])(m.copy)
+                                    ->ext_oneapi_submit_barrier(
+                                        {*m.used[m.used_of[sl]]});
+                                /*
+                                DPCT1124: cudaMemcpyAsync is migrated to
+                                asynchronous memcpy API. While the origin API
+                                might be synchronous, it depends on the type of
+                                operand memory, so you may need to call wait()
+                                on event return by memcpy API to ensure
+                                synchronization behavior.
+                                */
+                                m.copy->memcpy(m.stage_dev[sl], hb,
+                                               (size_t)lay.blob_bytes(l));
+                                m.stager->issued_one(job_of[j], m.copy);
                             }
+                            dpct::sync_barrier(m.copied[sl], m.copy);
+                            m.stage_live[sl] = true;
+                            stage_of[j] = sl;
+                            stats_.ms_experts_host += ms_since(th);
+                            ++stats_.experts_streamed;
+                            return true;
                         }
                         catch (sycl::exception const &exc) {
                           std::cerr << exc.what()
@@ -2316,26 +3084,215 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                           std::exit(1);
                         }
                         };
-                        for (size_t j = 0; j < order.size(); ++j) {
-                            const int32_t e = order[j];
-                            release_to(e);
-                            if (k < kend && seq[k].e == e) {
-                                const int sl = (int) (k % (size_t) m.ring);
+                        // In the streamed walk an MMQ group is gathered in ONE launch, after ONE wait on its last
+                        // streamed copy (the copy stream is in order), and its ring slots are released by ONE event.  A
+                        // wait and a record per expert put ~10 us of GPU bubble each on the compute stream under WDDM
+                        // (226 ms of a 32K prompt on an NVFP4 pack).  The same bytes into the same group slots.  A ring
+                        // entry the routing skipped inside an open group first gathers what the group holds so far
+                        // (`flush`), so no more than a group's entries are ever held back from the issuer.
+                        // STRATA_PREFILL_GROUP_GATHER=0: one gather, one wait and one record per expert.
+                        static const bool group_env = [] {
+                            const char* v = std::getenv("STRATA_PREFILL_GROUP_GATHER");
+                            return v == nullptr || std::atoi(v) != 0;
+                        }();
+                        const bool group_gather = group_env && stream_all && use_mmq && lay.native &&
+                                                  MMQ_GROUP <= mmq::kGatherGroupMax;
+                        mmq::GatherGroup gg;
+                        int gg_slots[MMQ_GROUP];
+                        int gg_nslots = 0;   // ring slots gathered by the next flush
+                        auto flush = [&]() {
+                            try {
+                        if (gg.n <= gg.first) return;
+                            const auto& f = lay.fmt[(size_t) l];
+                            if (gg_nslots > 0) {   // the copies land in order: the last one covers the others
                                 pt.mark(kPfWaitCopy, cs);
-                                wait_issued(k);
                                 (m.cs)->ext_oneapi_submit_barrier(
-                                    {*m.copied[sl]});
-                                if (!compute(j, m.stage_dev[sl], sl)) return false;
-                                consumed = ++k;
-                                give_back(consumed);
+                                    {*m.copied[gg_slots[gg_nslots - 1]]});
+                                pt.mark(kPfDequant, cs);
+                            }
+                            if (!mmq::gather_native_group(gg, f.up_off, mmq_gub / 2, f.down_off, mmq_db, m.grp_gu, mmq_gub,
+                                                          m.grp_d, mmq_db, m.cs)) {
+                                for (int i = gg.first; i < gg.n; ++i) {   // not 16-byte aligned: one at a time
+                                    const uint8_t* b = gg.blob[i];
+                                    mmq::gather_native(b, b + f.up_off, mmq_gub / 2, b + f.down_off, mmq_db,
+                                                       m.grp_gu + i * mmq_gub, m.grp_d + i * mmq_db, m.cs);
+                                }
+                            }
+                            if (gg_nslots > 0) {
+                                const int rel = gg_slots[gg_nslots - 1];
+                                dpct::sync_barrier(m.used[rel], m.cs);
+                                for (int i = 0; i < gg_nslots; ++i) m.used_of[gg_slots[i]] = rel;
+                            }
+                            gg_nslots = 0;
+                            gg.first = gg.n;
+                        }
+                        catch (sycl::exception const &exc) {
+                          std::cerr << exc.what()
+                                    << "Exception caught at file:" << __FILE__
+                                    << ", line:" << __LINE__ << std::endl;
+                          std::exit(1);
+                        }
+                        };
+                        // one expert's products from its blob on the device; `slot` (a ring slot, or -1 for a resident
+                        // expert) is released once the blob is read
+                        auto compute = [&](size_t j, const uint8_t *blob_dev,
+                                           int slot) -> bool {
+                            try {
+                        const int32_t e = order[j];
+                            pt.mark(kPfDequant, cs);
+                            if (use_mmq) {
+                                // gather the expert into its group slot (GGUF blocks, unchanged or converted)
+                                const size_t q = j % MMQ_GROUP;
+                                if (group_gather) {
+                                    gg.blob[q] = blob_dev;
+                                    gg.n = (int) q + 1;
+                                    if (slot >= 0) gg_slots[gg_nslots++] = slot;
+                                    if (q + 1 < MMQ_GROUP && j + 1 < order.size()) return true;
+                                    flush();
+                                    gg = mmq::GatherGroup{};
+                                } else if (lay.native) {
+                                    const auto& f = lay.fmt[(size_t) l];
+                                    mmq::gather_native(blob_dev, blob_dev + f.up_off, mmq_gub / 2, blob_dev + f.down_off,
+                                                       mmq_db, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                                } else {
+                                    mmq::gather_strata_q2(blob_dev, m.grp_gu + q * mmq_gub, m.grp_d + q * mmq_db, m.cs);
+                                }
+                                if (slot >= 0 && !group_gather) {
+                                    dpct::sync_barrier(m.used[slot], m.cs);
+                                    m.used_of[slot] = slot;
+                                }
+                                if (q + 1 < MMQ_GROUP && j + 1 < order.size()) return true;
+                                // the group's products: gate/up, swiglu, the group's H to q8_1, down
+                                const size_t j0 = j - q, g = j0 / MMQ_GROUP, n = order.size();
+                                const int ngx = (int) (q + 1);
+                                const int64_t r0 = m.bounds_host[j0], nr = m.bounds_host[j + 1] - r0;
+                                int64_t maxr = 0;
+                                for (size_t i = j0; i <= j; ++i) maxr = std::max<int64_t>(maxr, m.cnt[(size_t) order[i]]);
+                                pt.mark(kPfGemmGU, cs);
+                                // the zeroed tail after the group's last expert (see MMQ_TAIL)
+                                m.cs->memset(m.grp_gu + (size_t)ngx * mmq_gub,
+                                             0, MMQ_TAIL);
+                                m.cs->memset(m.grp_d + (size_t)ngx * mmq_db, 0,
+                                             MMQ_TAIL);
+                                mmq::Product gu;
+                                gu.w = m.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
+                                gu.n = ngx; gu.xq = m.Xq; gu.bounds = m.bounds_dev + j0; gu.ids = m.ids_identity;
+                                gu.total_rows = T * K; gu.max_rows = maxr; gu.dst = m.GU; gu.ld_dst = 1280;
+                                m.mmq_ctx->run(gu, m.cs);
+                                mmq::swiglu(m.GU + r0 * 1280, m.H + r0 * 640, nr, 640, !lay.native, m.cs);
+                                pt.mark(kPfGemmD, cs);
+                                mmq::quantize(m.H + r0 * 640, nullptr, m.Hq, mmq_dt, 640, 640, nr, m.cs);
+                                mmq::Product dn;
+                                dn.w = m.grp_d; dn.type = mmq_dt; dn.w_rows = N; dn.w_cols = 640; dn.expert_bytes = mmq_db;
+                                dn.n = ngx; dn.xq = m.Hq; dn.bounds = m.bounds_dev + n + 1 + g * (MMQ_GROUP + 1);
+                                dn.ids = m.ids_identity; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = m.Dm + r0 * N;
+                                dn.ld_dst = N;
+                                m.mmq_ctx->run(dn, m.cs);
+                                return true;
+                            }
+                            const int q = (int) (j % DQ);
+                            if (lay.native) {
+                                // plan v0.3 P6: a native pack's layer, dequantized by llama.cpp's own formulas
+                                const auto& f = lay.fmt[(size_t) l];
+                                strata::kernels::iq_dequant_gu_f16(f.gu_type, blob_dev, blob_dev + f.up_off, f.n_ff, f.n_embd,
+                                                                   m.dq_gu[q], m.cs);
+                                strata::kernels::iq_dequant_f16(f.d_type, blob_dev + f.down_off, f.n_embd * f.n_ff, m.dq_d[q], m.cs);
                             } else {
-                                ++stats_.experts_resident;
-                                if (!compute(j, m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]), -1)) return false;
+                                blob_dequant_f16(blob_dev, m.dq_gu[q], m.dq_d[q], m.cs);
+                            }
+                            if (slot >= 0) {
+                                dpct::sync_barrier(m.used[slot], m.cs);
+                                m.used_of[slot] = slot;
+                            }
+                            const int64_t o0 = m.off[(size_t) e], ne = m.cnt[(size_t) e];
+                            pt.mark(kPfGemmGU, cs);
+                            m.gemm.f16(m.Xs + o0 * N, m.dq_gu[q], m.GU + o0 * 1280, ne, 1280, N);
+                            swiglu_interleaved(m.GU + o0 * 1280, m.Hh + o0 * 640, ne, m.cs);
+                            pt.mark(kPfGemmD, cs);
+                            m.gemm.f16(m.Hh + o0 * 640, m.dq_d[q], m.Dm + o0 * N, ne, N, 640);
+                            return true;
+                        }
+                        catch (sycl::exception const &exc) {
+                          std::cerr << exc.what()
+                                    << "Exception caught at file:" << __FILE__
+                                    << ", line:" << __LINE__ << std::endl;
+                          std::exit(1);
+                        }
+                        };
+                        if (!stream_all) {
+                            size_t staged = 0;
+                            const size_t lookahead = STAGE - 1;
+                            for (size_t j = 0; j < order.size(); ++j) {
+                                while (staged < order.size() && staged <= j + lookahead) {
+                                    if (!stage_one(staged)) return false;
+                                    ++staged;
+                                }
+                                const int32_t e = order[j];
+                                if (stage_of[j] < 0) {
+                                    ++stats_.experts_resident;
+                                    if (!compute(j, m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e]), -1)) return false;
+                                } else {
+                                    pt.mark(kPfWaitCopy, cs);
+                                    (m.cs)->ext_oneapi_submit_barrier(
+                                        {*m.copied[stage_of[j]]});
+                                    if (!compute(j, m.stage_dev[stage_of[j]], stage_of[j])) return false;
+                                }
                             }
+                        } else {
+                            // the streamed walk: this layer's entries [k, kend) in id order; an entry the routing did not
+                            // pick only gives its slot back
+                            size_t k = seq_start[(size_t) l];
+                            const size_t kend = seq_start[(size_t) l + 1];
+                            auto release_to = [&](int32_t e_stop) {
+                                try {
+                            while (k < kend && seq[k].e < e_stop) {
+                                    if (gg_nslots > 0) flush();   // the open group's slots get their event first
+                                    const int sl = (int) (k % (size_t) m.ring);
+                                    dpct::sync_barrier(m.used[sl], m.cs);
+                                    m.used_of[sl] = sl;
+                                    consumed = ++k;
+                                    give_back(consumed);
+                                }
+                            }
+                            catch (sycl::exception const &exc) {
+                              std::cerr
+                                  << exc.what()
+                                  << "Exception caught at file:" << __FILE__
+                                  << ", line:" << __LINE__ << std::endl;
+                              std::exit(1);
+                            }
+                            };
+                            for (size_t j = 0; j < order.size(); ++j) {
+                                const int32_t e = order[j];
+                                release_to(e);
+                                if (k < kend && seq[k].e == e) {
+                                    const int sl = (int) (k % (size_t) m.ring);
+                                    wait_issued(k);
+                                    if (!group_gather) {
+                                        pt.mark(kPfWaitCopy, cs);
+                                        (m.cs)->ext_oneapi_submit_barrier(
+                                            {*m.copied[sl]});
+                                    }
+                                    if (!compute(j, m.stage_dev[sl], sl)) return false;
+                                    consumed = ++k;
+                                    if (!group_gather || gg_nslots == 0) give_back(consumed);   // its group was gathered
+                                } else {
+                                    const bool r0 = m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0;
+                                    const uint8_t* bp = r0 ? m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e])
+                                                           : (m.pp ? m.pp->peer->slot_ptr(l, e) : nullptr);   // over the cap: P2P
+                                    if (bp == nullptr) { err = "prefill: an expert is neither resident, streamed nor on the peer"; return false; }
+                                    ++stats_.experts_resident;
+                                    if (!compute(j, bp, -1)) return false;
+                                    if (group_gather && gg_nslots == 0) give_back(consumed);
+                                }
+                            }
+                            release_to(m.g->n_expert);
                         }
-                        release_to(m.g->n_expert);
                     }
                     pt.mark(kPfCombine, cs);
+                    if (peer_now)(m.cs)->ext_oneapi_submit_barrier(
+                        {*m.pp->ev_done}); // multi-GPU: the peer's rows are in
+                                           // Dm
                     moe_combine(m.Dm, m.slot_dev, m.w, m.shared, m.sg, m.bo, T, m.cs);
                     // debug: STRATA_DBG_NAN=1 reports the first layer of a chunk whose MoE produced non-finite values
                     if (static const bool dbg = std::getenv("STRATA_DBG_NAN") != nullptr; dbg) {
@@ -2357,8 +3314,10 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                           std::exit(1);
                         }
                         };
-                        const int64_t bgu = bad(m.GU, T * K * 1280), bdm = bad(m.Dm, T * K * N), bbo = bad(m.bo, T * N);
-                        const int64_t bh = m.H ? bad(m.H, T * K * 640) : -1;
+                        // (fused: GU and H hold the grouping tables and int8 rows, not floats)
+                        const int64_t bgu = fused_l ? 0 : bad(m.GU, T * K * 1280), bdm = bad(m.Dm, T * K * N),
+                                      bbo = bad(m.bo, T * N);
+                        const int64_t bh = m.H && !fused_l ? bad(m.H, T * K * 640) : -1;
                         // the fp16 inputs of the experts' GEMMs: the gathered activations and the last dequantized
                         // gate/up (non-finite count, largest finite magnitude)
                         auto bad16 = [&](const uint16_t* d, int64_t n, double& mx) {
@@ -2386,7 +3345,7 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                             reported = stats_.chunks;
                             std::fprintf(stderr, "strata dbg: layer %lld (mmq %d, types %d/%d, %zu experts): non-finite GU %lld "
                                          "H %lld Dm %lld bo %lld of T %lld\n", (long long) l, (int) use_mmq, mmq_gt, mmq_dt,
-                                         order.size(), (long long) bgu, (long long) bh, (long long) bdm, (long long) bbo,
+                                         n_order, (long long) bgu, (long long) bh, (long long) bdm, (long long) bbo,
                                          (long long) T);
                         }
                     }
@@ -2579,8 +3538,32 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                      (long long) n, total, ms_since(t_start), stats_.ms_experts_host, line.c_str());
         std::fprintf(stderr, "strata prefill timing: host: chunk setup (PLE rows, the expert stream plan) %.0f ms, "
                              "waiting for each chunk %.0f ms, after each chunk (the draft layer, progress) %.0f ms, "
-                             "PLE %.0f ms; grouping: drain wait %.0f ms, host loops + uploads %.0f ms\n", host_setup_ms, host_sync_ms,
-                     host_chunk_ms, stats_.ms_ple, grp_wait_ms, grp_cpu_ms);
+                             "PLE %.0f ms\n", host_setup_ms, host_sync_ms, host_chunk_ms, stats_.ms_ple);
+        if (pe.on) {
+            /*
+            DPCT1093: The "pe.dev" device may be not the one intended for
+            use. Adjust the selected device if needed.
+            */
+            /*
+            DPCT1093: The "pd" device may be not the one intended for use.
+            Adjust the selected device if needed.
+            */
+            int pd = 0; pd = dpct::get_current_device_id();
+                dpct::select_device(pe.dev); m.pp->s->wait(); pe.fold();
+                dpct::select_device(pd);
+            std::string pl;
+            for (int i = 0; i < kPeCount; ++i) {
+                std::snprintf(b, sizeof b, " %s %.0f", kPeNames[i], pe.ms[i]);
+                pl += b;
+            }
+            std::fprintf(stderr, "strata prefill timing (peer GPU, ms):%s; MoE layers %lld, rows/layer %.0f of %lld cap, experts/layer %.0f, "
+                                 "over the cap %lld\n", pl.c_str(), (long long) m.pp->layers,
+                         m.pp->layers ? (double) m.pp->rows / m.pp->layers : 0.0, (long long) m.pp->cap_rows,
+                         m.pp->layers ? (double) m.pp->experts / m.pp->layers : 0.0, (long long) m.pp->over_cap);
+            if (m.pp->ps_frac > 0.0)
+                std::fprintf(stderr, "strata prefill timing: peer-streamed experts %lld (%.0f per MoE layer)\n",
+                             (long long) m.pp->ps_experts, m.pp->layers ? (double) m.pp->ps_experts / m.pp->layers : 0.0);
+        }
     }
     if (std::getenv("STRATA_STATE_HASH_GDN") != nullptr) {   // debug: the GDN states as the prompt path leaves them
         m.cs->wait();
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index b683d3693e9..acb6e6f4815 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -1,18 +1,25 @@
+#define DPCT_COMPAT_RT_VERSION 12080
 // src/program/generate.cpp - P2.S6: `strata generate`.
 //
-// THE DRIVER, and the first program in this project that answers a question.  Everything below it is a
-// component; this is the thing that composes them into a token:
+// THE DRIVER, and the first program in this project that answers a question.
+// Everything below it is a component; this is the thing that composes them into
+// a token:
 //
-//     embed_row(token)  ->  48 captured layer graphs (the CPU expert pool behind the doorbell)  ->
-//     lm_head(R)        ->  sample        ->  embed_row(next)  ->  ...
+//     embed_row(token)  ->  48 captured layer graphs (the CPU expert pool
+//     behind the doorbell)  -> lm_head(R)        ->  sample        ->
+//     embed_row(next)  ->  ...
 //
-// WHAT IT IS NOT.  There is no tokenizer here.  `pack/full/tokenizer/` and `tools/strata_tokenizer.py` exist,
-// and a C++ BPE is Phase 1's deliverable rather than this program's, so the prompt arrives as IDS via
-// `--tokens`.  That is not a placeholder: it is exactly what Gate C1 needs, because C1 compares logits against
-// llama.cpp on the SAME ids, and a tokenizer on only one side of that comparison is a second variable.
+// WHAT IT IS NOT.  There is no tokenizer here.  `pack/full/tokenizer/` and
+// `tools/strata_tokenizer.py` exist, and a C++ BPE is Phase 1's deliverable
+// rather than this program's, so the prompt arrives as IDS via
+// `--tokens`.  That is not a placeholder: it is exactly what Gate C1 needs,
+// because C1 compares logits against llama.cpp on the SAME ids, and a tokenizer
+// on only one side of that comparison is a second variable.
 //
-// AND IT IS PHASE 2, so hit rate is `h = 0` and the number it prints is slow on purpose
-// (`phase-2-correct-engine.md:5-9`).  What it is FOR is the honest tok/s figure and the logit dump.
+// AND IT IS PHASE 2, so hit rate is `h = 0` and the number it prints is slow on
+// purpose
+// (`phase-2-correct-engine.md:5-9`).  What it is FOR is the honest tok/s figure
+// and the logit dump.
 
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
@@ -29,6 +36,7 @@
 #include "strata/core/pinned.hpp"
 #include "strata/core/remote_experts.hpp"
 #include "strata/core/on_device.hpp"
+#include "strata/core/peer_experts.hpp"
 #include "strata/core/layer.hpp"
 #include "strata/core/layout.hpp"
 #include "strata/core/session.hpp"
@@ -81,6 +89,7 @@
 #include <chrono>
 #include <algorithm>
 #include <iostream>
+#include <future>
 #include <thread>
 #include <atomic>
 #include <condition_variable>
@@ -314,6 +323,16 @@ struct Options {
     /// to them.  Measured at 256 slots: **1781 of 60000 = 2.97%**, against **21.4%** for 8 slots per layer and
     /// **70.4%** for 64, from `Memory/cache_allocation.py` on the same run's routing.  Off by default.
     bool expert_cache_per_layer = false;
+    /// Multi-GPU: a second expert tier on CUDA device `peer_device` (-1 = off), `peer_reserve_mib` left free
+    /// there, `peer_slots` caps its size (0 = as many as fit), `peer_adapt_swaps` per adaptive round
+    /// (-1 = adapt_swaps).
+    int peer_device = -1;
+    int peer_reserve_mib = 600;
+    int64_t peer_slots = 0;
+    int peer_adapt_swaps = -1;
+    /// the prompt path's rows per layer the peer computes: -1 = half of chunk x top-k, 0 = the prompt path stays on
+    /// the primary
+    int64_t peer_prefill_rows = -1;
     /// The PLE gather's prefetch, as an A/B arm.  The gather measured 2.10-2.61 ms/token because its sixteen
     /// row reads are sixteen SEPARATE page faults into a 26.8 GB mapping; see `ple_prefetch_enable`.
     bool no_ple_prefetch = false;
@@ -322,6 +341,11 @@ struct Options {
     /// trace is what the plan's `h = 0.6447` refers to, and compulsory-miss measured 0.4864 because it fills
     /// with whatever the prompt touched FIRST.  Empty means no profile.
     std::string expert_profile;
+    /// #477 (--serve, opt-in): where to save what the adaptive tier learned, as a profile `--expert-profile` reads
+    /// (the resident experts first, then the routing counted since the start); on QUIT and every
+    /// `expert_profile_save_min` minutes between requests.  Empty (the default): nothing is counted or written.
+    std::string expert_profile_save;
+    double expert_profile_save_min = 10.0;
     /// R4.2d: **ON by default**, because the measurement is unambiguous and the alternative is known-broken.
     /// Without it, 17 of 10,562 layers had the hit work done when the pool returned; with it, 9,190.  The
     /// A/B arm is `--no-hit-poke`.
@@ -341,6 +365,7 @@ struct Options {
     /// Plan v0.3 P4: `--expert-cache auto` sizes the VRAM tier from what is free after the weights, the session
     /// and the KV state, minus this reserve for the graphs, the hit scratch and the head.
     int vram_reserve_mib = 700;
+    bool vram_reserve_given = false;   ///< --vram-reserve-mib on the command line (#496: no smaller automatic reserve)
     /// Plan v0.3 P5: batched prompt processing in chunks of this many tokens (0 = the token path).
     int64_t prefill_chunk = 0;
     /// `--prefill auto`: the largest chunk (up to 8192) whose buffers the expert cache can lend.  Every expert a chunk
@@ -377,10 +402,6 @@ struct Options {
     /// the VRAM tier in place of the least-routed resident ones (decayed counts).  0 = static residency.
     int adapt_every = 4;
     float adapt_decay = 0.7f;   ///< the usage counts are multiplied by this after each adaptation (--adapt-decay)
-    /// --adapt-tuned (STRATA_ADAPT_TUNED=1): every 2 rounds, up to 192 swaps, x0.92 - where that was measured to help
-    /// (see where it is applied); explicit --adapt-* flags win
-    bool adapt_tuned = false;
-    bool adapt_given = false;
     /// Plan v0.3 P6: a draft enters the verify window only while every draft before it (and itself) has at least
     /// this probability under the draft layer; 0 = always --spec-1 drafts.
     double spec_min_p = 0.0;
@@ -554,6 +575,10 @@ void usage() {
                  "                       real graph that --stage-timing cannot give.  Prints and exits.\n"
                  "  --expert-profile P   R4.2e: pre-load the VRAM tier from a `profile.bin` (see\n"
                  "                       tools/make_profile.py) instead of admitting on first use.\n"
+                 "  --expert-profile-save P  --serve, #477: save what the adaptive tier learned (the experts in\n"
+                 "                       VRAM, then the routing counted since the start) as a profile at P, on\n"
+                 "                       QUIT and every --expert-profile-save-every MIN minutes (default 10;\n"
+                 "                       0 = on QUIT only) between requests; start from it with --expert-profile P\n"
                  "  --no-hit-poke        R4.2d's A/B arm.  The hit path pokes the driver once right after its\n"
                  "                       launch so the GPU starts while the CPU pool runs; without it the work\n"
                  "                       waits for the next driver entry and does not overlap at all.\n"
@@ -568,6 +593,14 @@ void usage() {
                  "  --expert-cache-device3 N  pre-fill N more experts on CUDA3\n"
                  "  --expert-cache-remote-placement stripe|layer  distribute expert ranks or whole\n"
                  "                       layers across CUDA1..3 (default: stripe)\n"
+                 "  --peer-device N      a second GPU as an adaptive expert-cache tier (rows over P2P; it also\n"
+                 "                       computes its experts' prompt rows).  Not with --layer-split or\n"
+                 "                       --expert-cache-device1..3.  Default output unchanged without it.\n"
+                 "  --peer-reserve-mib N  VRAM the peer tier leaves free on its card (default 600)\n"
+                 "  --peer-slots N       expert slots on the peer (default: what fits)\n"
+                 "  --peer-adapt-swaps N  peer cache swaps per adaptation step (default: --adapt-swaps)\n"
+                 "  --peer-prefill-rows N  prompt rows per layer the peer computes (default half of chunk x top-k;\n"
+                 "                       0 = the prompt path stays on the primary)\n"
                  "  --expert-cache-per-layer  R4.2g: give each layer its OWN slots instead of letting the first\n"
                  "                       position take all of them.  The default policy fills in arrival order\n"
                  "                       from one shared counter, so 256 slots went to ~26 layers of position 0\n"
@@ -846,6 +879,12 @@ void mem_mark(const char* where) {
     std::fprintf(stderr, "strata trace: %lld MiB free after %s\n", (long long) (free_b >> 20), where);
 }
 
+/// #463's A/B: STRATA_ADAPT_NOWAIT=1 lets a verify window start before the adaptive tier's copies have landed (0.1.37)
+bool adapt_nowait() {
+    static const bool v = [] { const char* e = std::getenv("STRATA_ADAPT_NOWAIT"); return e && e[0] == '1'; }();
+    return v;
+}
+
 int argmax(const std::vector<float>& v) {
     int best = 0;
     for (size_t i = 1; i < v.size(); ++i)
@@ -978,18 +1017,22 @@ bool load_control_vectors(const Options& o, const strata::core::ModelGeometry& g
 // The effective host->device bandwidth of the PCIe link: copies from pinned host memory, as the expert arena's
 // reads are.  The native default share (0.55) was measured on x16 links (~26-28 GB/s); a x8 card in a x8 slot
 // carries about half of that.  Returns < 0 when the probe cannot run (then the caller keeps the default).
-double probe_pcie_h2d_gbps() try {
+//
+// #485: a single timed burst read an x16 PCIe 4 link (RTX A3000 laptop) at 18.5, 6.9 and 5.8 GB/s in three starts -
+// a link still in a low-power state, other DMA, a context not yet up to speed - and the low reading set the share.
+// Such a disturbance only ever slows a copy: nothing makes a correctly timed copy faster than the link carries.  So
+// the same 1 GiB is now copied as four bursts of 256 MiB, timed one by one, and the fastest is the link's figure (the
+// median would still follow a disturbance that lasts through half the bursts).  Each burst takes ~10 ms on an x16
+// PCIe 4 link, so the probe takes no longer than the one 1 GiB burst did.  `samples`, when given, gets every
+// burst's reading for the log.
+double probe_pcie_h2d_gbps(std::string *samples = nullptr) try {
     constexpr size_t kBytes = 256ull << 20;
-    constexpr int kIters = 4;
+    constexpr int kBursts = 4;
     void* h = nullptr;
     void* d = nullptr;
-    dpct::event_ptr ev0, ev1;
     if (DPCT_CHECK_ERROR(h = (void *)malloc(kBytes)) != 0) return -1.0;
     if (DPCT_CHECK_ERROR(d = (void *)sycl::malloc_device(
-                             kBytes, dpct::get_in_order_queue())) != 0 ||
-        DPCT_CHECK_ERROR(ev0 = new sycl::event()) != 0 ||
-        DPCT_CHECK_ERROR(ev1 = new sycl::event()) != 0) {
-        if (d != nullptr) sycl::free(d, dpct::get_in_order_queue());
+                             kBytes, dpct::get_in_order_queue())) != 0) {
         free(h);
         return -1.0;
     }
@@ -1002,30 +1045,68 @@ double probe_pcie_h2d_gbps() try {
     */
     dpct::get_in_order_queue().memcpy(
         d, h, kBytes).wait(); // warmup: context up, copy engine primed
-    dpct::sync_barrier(ev0);
+    float ms[kBursts] = {};
+#if defined(STRATA_USE_HIP) && defined(_WIN32)
+    // Windows HIP: the events do not bracket the copies there (an RX 6800 read 3,300-26,000 GB/s, so every link kept
+    // the x16 share), so each burst is timed on the host between two synchronizes: 256 MiB takes ~10 ms, so the
+    // synchronize around it hardly matters
+    bool ok = cudaDeviceSynchronize() == cudaSuccess;
+    for (int b = 0; b < kBursts && ok; ++b) {
+        const Clock::time_point t0 = Clock::now();
+        cudaMemcpyAsync(d, h, kBytes, cudaMemcpyHostToDevice);
+        ok = cudaDeviceSynchronize() == cudaSuccess;
+        ms[b] = (float) std::chrono::duration<double, std::milli>(Clock::now() - t0).count();
+    }
+#else
+    // the bursts run back to back on the stream, an event between each two
+    dpct::event_ptr ev[kBursts + 1];
+    int n_ev = 0;
+    while (n_ev <= kBursts &&
+           DPCT_CHECK_ERROR(ev[n_ev] = new sycl::event()) == 0)++ n_ev;
+    bool ok = n_ev == kBursts + 1;
+    if (ok) {
+        dpct::sync_barrier(ev[0]);
+        for (int b = 0; b < kBursts; ++b) {
+            /*
+            DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy
+            API. While the origin API might be synchronous, it depends on the
+            type of operand memory, so you may need to call wait() on event
+            return by memcpy API to ensure synchronization behavior.
+            */
+            dpct::get_in_order_queue().memcpy(d, h, kBytes).wait();
+            dpct::sync_barrier(ev[b + 1]);
+        }
+        ok = DPCT_CHECK_ERROR(ev[kBursts]->wait_and_throw()) == 0;
+        for (int b = 0; b < kBursts && ok; ++b) ok =
+            DPCT_CHECK_ERROR(
+                ms[b] =
+                    (ev[b + 1]
+                         ->get_profiling_info<
+                             sycl::info::event_profiling::command_end>() -
+                     ev[b]
+                         ->get_profiling_info<
+                             sycl::info::event_profiling::command_start>()) /
+                    1000000.0f) == 0;
+    }
+    for (int i = 0; i < n_ev; ++i) dpct::destroy_event(ev[i]);
+#endif
+    double bw = -1.0;
+    if (samples != nullptr) samples->clear();
+    for (int b = 0; b < kBursts && ok; ++b) {
+        const double s = ms[b] > 0.01f ? (double) kBytes / (ms[b] * 1e-3) / 1e9 : -1.0;
+        bw = std::max(bw, s);
+        if (samples != nullptr) {
+            char buf[32];
+            std::snprintf(buf, sizeof(buf), "%s%.1f", b == 0 ? "" : " ", s);
+            *samples += buf;
+        }
+    }
     /*
-    DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API. While
-    the origin API might be synchronous, it depends on the type of operand
-    memory, so you may need to call wait() on event return by memcpy API to
-    ensure synchronization behavior.
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
     */
-    for (int i = 0; i < kIters; ++i) dpct::get_in_order_queue().memcpy(d, h,
-                                                                       kBytes).wait();
-    dpct::sync_barrier(ev1);
-    const bool ok = DPCT_CHECK_ERROR(ev1->wait_and_throw()) == 0;
-    float ms = 0.f;
-    const bool timed =
-        ok &&
-        DPCT_CHECK_ERROR(
-            ms = (ev1->get_profiling_info<
-                      sycl::info::event_profiling::command_end>() -
-                  ev0->get_profiling_info<
-                      sycl::info::event_profiling::command_start>()) /
-                 1000000.0f) == 0 &&
-        ms > 0.01f;
-    const double bw = timed ? ((double) kIters * (double) kBytes / (ms * 1e-3)) / 1e9 : -1.0;
-    dpct::destroy_event(ev0);
-    dpct::destroy_event(ev1);
+    if (!ok)(void) 0;
     sycl::free(d, dpct::get_in_order_queue());
     free(h);
     return bw;
@@ -1036,6 +1117,15 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+// The PCIe share of the missed experts for a link measured at `gbps`: `base` (the share measured on x16 links) from
+// 20 GB/s up, and below that in proportion to the bandwidth, so the time the link spends on its share stays about
+// what the x16 share costs.  Continuous (#485): before, 19.9 GB/s gave 0.42 and 20.0 the full 0.55 (and 4.0 GB/s
+// gave 0.08, 3.9 none), so a reading near either edge moved the share by a quarter of its range.  From 20 GB/s up
+// (an x16 PCIe 4/5 link: ~26-28 GB/s) the share is unchanged.
+double pcie_frac_for_gbps(double gbps, double base) {
+    return gbps <= 0.0 ? base : base * std::min(1.0, gbps / 20.0);
+}
+
 }  // namespace
 
 int main(int argc, char **argv) try {
@@ -1176,7 +1266,7 @@ int main(int argc, char **argv) try {
         else if (a == "--expert-cache-device3") o.expert_cache_remote[2] = std::atoi(next("--expert-cache-device3"));
         else if (a == "--expert-cache-remote-placement")
             o.expert_cache_remote_placement = next("--expert-cache-remote-placement");
-        else if (a == "--vram-reserve-mib") o.vram_reserve_mib = std::atoi(next("--vram-reserve-mib"));
+        else if (a == "--vram-reserve-mib") { o.vram_reserve_mib = std::atoi(next("--vram-reserve-mib")); o.vram_reserve_given = true; }
         else if (a == "--prefill") {
             const std::string v = next("--prefill");
             o.prefill_auto = v == "auto" || v.rfind("auto:", 0) == 0;
@@ -1198,9 +1288,8 @@ int main(int argc, char **argv) try {
         else if (a == "--mtp") o.mtp = next("--mtp");
         else if (a == "--mtp-window") o.mtp_window = std::atoll(next("--mtp-window"));
         else if (a == "--pcie-frac") o.pcie_frac = std::atof(next("--pcie-frac"));
-        else if (a == "--adapt-every") { o.adapt_every = std::atoi(next("--adapt-every")); o.adapt_given = true; }
-        else if (a == "--adapt-decay") { o.adapt_decay = (float) std::atof(next("--adapt-decay")); o.adapt_given = true; }
-        else if (a == "--adapt-tuned") o.adapt_tuned = true;
+        else if (a == "--adapt-every") o.adapt_every = std::atoi(next("--adapt-every"));
+        else if (a == "--adapt-decay") o.adapt_decay = (float) std::atof(next("--adapt-decay"));
         else if (a == "--spec-min-p") o.spec_min_p = std::atof(next("--spec-min-p"));
         else if (a == "--stop-eos") o.stop_eos = true;
         else if (a == "--spec-split") o.spec_split = true;
@@ -1269,11 +1358,19 @@ int main(int argc, char **argv) try {
             if (!parse_i64_list(next("--eos-ids"), o.eos_ids, e)) { std::fprintf(stderr, "--eos-ids: %s\n", e.c_str()); return 2; }
             o.stop_eos = true;
         }
-        else if (a == "--adapt-swaps") { o.adapt_swaps = std::atoi(next("--adapt-swaps")); o.adapt_given = true; }
+        else if (a == "--adapt-swaps") o.adapt_swaps = std::atoi(next("--adapt-swaps"));
         else if (a == "--expert-cache-cpu-order") o.expert_cache_cpu_order = true;
         else if (a == "--expert-cache-per-layer") o.expert_cache_per_layer = true;
+        else if (a == "--peer-device") o.peer_device = std::atoi(next("--peer-device"));
+        else if (a == "--peer-reserve-mib") o.peer_reserve_mib = std::atoi(next("--peer-reserve-mib"));
+        else if (a == "--peer-slots") o.peer_slots = std::atoll(next("--peer-slots"));
+        else if (a == "--peer-adapt-swaps") o.peer_adapt_swaps = std::atoi(next("--peer-adapt-swaps"));
+        else if (a == "--peer-prefill-rows") o.peer_prefill_rows = std::atoll(next("--peer-prefill-rows"));
         else if (a == "--no-hit-poke") o.no_hit_poke = true;
         else if (a == "--expert-profile") o.expert_profile = next("--expert-profile");
+        else if (a == "--expert-profile-save") o.expert_profile_save = next("--expert-profile-save");
+        else if (a == "--expert-profile-save-every")
+            o.expert_profile_save_min = std::atof(next("--expert-profile-save-every"));
         else if (a == "--gpu-stages") o.gpu_stages = true;
         else if (a == "--mmap-experts") o.mmap_experts = true;
         else if (a == "--shared-expert-arena") o.shared_expert_arena = next("--shared-expert-arena");
@@ -1319,6 +1416,7 @@ int main(int argc, char **argv) try {
         }
     }
     strata::core::set_coupled_draft(o.coupled_draft);
+    strata::core::set_peer_portable(o.peer_device >= 1);   // multi-GPU: the Portable flag on mapped host buffers only with a peer device (before any allocation)
     if (o.serve && o.conversation_cache_mib > 0 && (o.prompt_cache == 0 || o.conversation_cache_slots == 0))
         std::fprintf(stderr, "strata serve: warning: conversation caching is disabled by %s\n",
                      o.prompt_cache == 0 ? "--prompt-cache 0" : "--conversation-cache-slots 0");
@@ -1330,6 +1428,8 @@ int main(int argc, char **argv) try {
     // the next visible ones); "auto" places the K from each GPU's free VRAM once the weights are in (below).  Across
     // GPUs, not yet: KV streaming, images, control vectors, the helper caches (--expert-cache-remote), and lending
     // cache slots to the prompt path (each stage's prompt path has its own buffers).
+    // --pcie-frac given: that one share is every stage's (the stages' own link probes are skipped), so a split over
+    // a fast and a slow link cannot set the two apart from the command line (#485)
     const bool pcie_given = o.pcie_frac >= 0.0;
     std::vector<int64_t> split_at;
     std::vector<int> split_devs;
@@ -1708,6 +1808,14 @@ int main(int argc, char **argv) try {
         std::fprintf(stderr, "strata generate: --expert-cache-remote-placement must be stripe or layer\n");
         return 2;
     }
+    // the peer tier is the second card's only user: a layer split or a remote expert cache would put a second engine
+    // part (and a second copy of the same experts) on it
+    if (o.peer_device >= 1 && (!o.layer_split.empty() || o.expert_cache_remote[0] > 0)) {
+        std::fprintf(stderr, "strata generate: --peer-device cannot be combined with %s\n",
+                     !o.layer_split.empty() ? "--layer-split (use one or the other)"
+                                            : "--expert-cache-device1..3 (the peer tier already caches experts there)");
+        return 2;
+    }
 
     if (o.native_flash_attn_short && o.max_context > 256) {
         std::fprintf(stderr, "strata generate: --native-flash-attn-short requires --max-context <=256\n");
@@ -1810,15 +1918,14 @@ int main(int argc, char **argv) try {
     // pack's 0.2 was never measured against the link, so it is left alone.  `--calibrate` measures it outright.
     if (o.pcie_frac < 0.0) {
         const double base = native_pack ? 0.55 : 0.2;
-        const double bw = native_pack ? probe_pcie_h2d_gbps() : -1.0;
+        std::string bursts;
+        const double bw = native_pack ? probe_pcie_h2d_gbps(&bursts) : -1.0;
         if (!native_pack) {
             o.pcie_frac = base;
         } else if (bw > 0.0) {
-            // below ~4 GB/s (an x1 link: ~0.9 GB/s) a missed expert's 1.4 MB takes longer to cross than the CPU
-            // pool takes to compute it, so none of them go over the link
-            o.pcie_frac = bw >= 20.0 ? base : bw < 4.0 ? 0.0 : std::min(base, std::max(0.05, base * (bw / 26.0)));
-            std::fprintf(stderr, "strata generate: PCIe probe: %.1f GB/s host->device -> pcie_frac %.2f (default %.2f)\n",
-                         bw, o.pcie_frac, base);
+            o.pcie_frac = pcie_frac_for_gbps(bw, base);
+            std::fprintf(stderr, "strata generate: PCIe probe: %.1f GB/s host->device (best of %s) -> pcie_frac %.2f "
+                                 "(default %.2f)\n", bw, bursts.c_str(), o.pcie_frac, base);
         } else {
             o.pcie_frac = base;
             std::fprintf(stderr, "strata generate: PCIe probe failed -> pcie_frac default %.2f\n", base);
@@ -1978,10 +2085,47 @@ int main(int argc, char **argv) try {
         return 1;
     }
     void* arena = nullptr;
-    if (DPCT_CHECK_ERROR(arena = (void *)sycl::malloc_device(
-                             pool_bytes, dpct::get_in_order_queue())) != 0) {
-        std::fprintf(stderr, "strata generate: cudaMalloc(%llu) for the weight arena failed\n",
-                     (unsigned long long) pool_bytes);
+    /*
+    DPCT1000: Error handling if-stmt was detected but could not be
+    rewritten.
+    */
+    if (const dpct::err0 ce =
+            DPCT_CHECK_ERROR(arena = (void *)sycl::malloc_device(
+                                 pool_bytes, dpct::get_in_order_queue()));
+        ce != 0) {
+        // #486: the arena is the first large allocation and its size does not depend on the context, so what is
+        // missing is held by something else: say how much was free
+        /*
+        DPCT1026: The call to cudaGetLastError was removed because this
+        functionality is redundant in SYCL.
+        */
+        /*
+        DPCT1001: The statement could not be removed.
+        */
+        size_t free_b = 0, total_b = 0;
+        /*
+        DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
+        for device information which may not be supported by all compilers or
+        runtimes. You may need to adjust the code.
+        */
+        dpct::get_current_device().get_memory_info(free_b, total_b);
+        std::fprintf(
+            stderr,
+            "strata generate: cudaMalloc(%llu) for the weight arena failed "
+            "(%s): %llu MiB of %llu "
+            "MiB VRAM free on this GPU. The arena is allocated first, before "
+            "the KV and expert "
+            "caches: another program (or an engine that is still exiting) "
+            "holds the rest - "
+            "nvidia-smi / rocm-smi lists them\n",
+            /*
+            DPCT1009: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            (unsigned long long)pool_bytes, dpct::get_error_string_dummy(ce),
+            (unsigned long long)(free_b >> 20),
+            (unsigned long long)(total_b >> 20));
         return 1;
     }
     strata::core::WeightTable wt;
@@ -2335,8 +2479,22 @@ int main(int argc, char **argv) try {
                 0 ||
             !st.wt.load(o.pack, arena_s, pool_bytes, err,
                         skip.empty() ? nullptr : &skip)) {
-            std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s\n", st.dev,
-                         err.empty() ? "the weight arena does not fit" : err.c_str());
+            /*
+            DPCT1026: The call to cudaGetLastError was removed because this
+            functionality is redundant in SYCL.
+            */
+            size_t free_b = 0, total_b = 0; // #486: what that card had free
+            /*
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s (%llu MiB needed, %llu MiB of %llu "
+                                 "MiB free on that card)\n", st.dev,
+                         err.empty() ? "the weight arena does not fit" : err.c_str(),
+                         (unsigned long long) (pool_bytes >> 20), (unsigned long long) (free_b >> 20),
+                         (unsigned long long) (total_b >> 20));
             return 1;
         }
         if (!o.native_dense_gguf.empty() && !st.dense.load(o.native_dense_gguf, st.wt, err, o.native_ple_key)) {
@@ -2390,13 +2548,15 @@ int main(int argc, char **argv) try {
             }
             strata::kernels::mrope_table_set(st.mrope);
         }
-        // its own PCIe share of the missed experts (the same rule as CUDA0's above: its link is probed)
+        // its own PCIe share of the missed experts (the same rule as CUDA0's above: its link is probed).  A given
+        // --pcie-frac is every stage's share and skips these probes (pcie_given); there is no per-stage setting yet.
         st.pcie_frac = o.pcie_frac;
         if (!pcie_given && native_pack) {
-            const double bw = probe_pcie_h2d_gbps();
-            if (bw > 0.0) st.pcie_frac = bw >= 20.0 ? 0.55 : bw < 4.0 ? 0.0 : std::min(0.55, std::max(0.05, 0.55 * (bw / 26.0)));
-            std::fprintf(stderr, "strata generate: layer split: CUDA%d PCIe probe %.1f GB/s -> pcie_frac %.2f\n", st.dev,
-                         bw, st.pcie_frac);
+            std::string bursts;
+            const double bw = probe_pcie_h2d_gbps(&bursts);
+            if (bw > 0.0) st.pcie_frac = pcie_frac_for_gbps(bw, 0.55);
+            std::fprintf(stderr, "strata generate: layer split: CUDA%d PCIe probe %.1f GB/s (best of %s) -> pcie_frac "
+                                 "%.2f\n", st.dev, bw, bursts.c_str(), st.pcie_frac);
         }
         size_t fb = 0, tb = 0;
         /*
@@ -2421,9 +2581,43 @@ int main(int argc, char **argv) try {
         // file).  `--expert-cache 0` used to take the count the profile was built for; the profile now ranks
         // every pair (issue #46: a card that holds more than the old 8,000 used to stop there), so it means auto.
         if (o.expert_cache == 0) o.expert_cache = -1;
+        // Multi-GPU: STRATA_PEER_HOT=<f> gives the peer card a share f of the HOT pairs, so both cards
+        // compute routed experts every layer (the primary alone did ~25 of ~30 per layer-window).  Of the first
+        // STRATA_PEER_HOT_AT (default 8700, ~ the primary's slots) ranks, every pair with floor((r+1)f) > floor(rf)
+        // moves to just after that point: the primary fills past them, the peer (which takes what the primary does
+        // not hold, in order) gets them first.
+        if (o.peer_device >= 1) {   // default 0.45 (measured: 0.3-0.6 all better than 0; 0 = off, e.g. for the gate)
+            const char* ph = std::getenv("STRATA_PEER_HOT");
+            const double f = ph ? std::atof(ph) : 0.45;
+            const char* pa = std::getenv("STRATA_PEER_HOT_AT");
+            const size_t at = std::min(profile.size(), (size_t) (pa ? std::atoll(pa) : 8700));
+            if (f > 0.0 && f < 1.0 && at > 0) {
+                std::vector<std::pair<int32_t, int32_t>> keep, moved;
+                for (size_t r = 0; r < at; ++r) {
+                    const bool to_peer = (int64_t) ((double) (r + 1) * f) > (int64_t) ((double) r * f);
+                    (to_peer ? moved : keep).push_back(profile[r]);
+                }
+                const size_t n_moved = moved.size();
+                // the primary's share continues with the ranks after `at` until it is full; then the moved ones
+                std::vector<std::pair<int32_t, int32_t>> out;
+                out.reserve(profile.size());
+                out.insert(out.end(), keep.begin(), keep.end());
+                const size_t fill = std::min(profile.size(), at + n_moved);   // what the primary still takes
+                out.insert(out.end(), profile.begin() + (long) at, profile.begin() + (long) fill);
+                out.insert(out.end(), moved.begin(), moved.end());
+                out.insert(out.end(), profile.begin() + (long) fill, profile.end());
+                profile.swap(out);
+                std::fprintf(stderr, "strata generate: STRATA_PEER_HOT %.2f: %zu of the first %zu ranked pairs moved "
+                                     "behind rank %zu (the peer's)\n", f, n_moved, at, fill);
+            }
+        }
         std::fprintf(stderr, "strata generate: profile %s: %zu ranked pairs, built for %lld slots\n",
                      o.expert_profile.c_str(), profile.size(), (long long) pslots);
     }
+    // #477: the whole ranking as loaded, the prior of --expert-profile-save's order (a layer split keeps only
+    // CUDA0's pairs in `profile` below).  Empty without --expert-profile-save.
+    std::vector<std::pair<int32_t, int32_t>> profile_loaded;
+    if (!o.expert_profile_save.empty()) profile_loaded = profile;
     // ---- layer split across GPUs: "auto" places the split points by a cost model of one decode window, measured on
     // the 5080 + 3090 rig (bench/results/2026-09-29-layer-split):
     //   - every layer costs its GPU a time inversely proportional to SMs x clock (0.33 ms on an RTX 5080, 0.50 on a
@@ -2779,6 +2973,29 @@ int main(int argc, char **argv) try {
             strata::emulated_cc()
                 ? " (STRATA_EMULATE_CC: a test mode, the card is emulated)"
                 : "");
+        {   // #542: a build whose libcudart is older than its headers (a CUDA 13 kit with a dangling libcudart.so that
+            // CMake resolved to the system's CUDA 12 one) reads cudaDeviceProp shifted - silently, and slowly
+            int rt = 0;
+            /*
+            DPCT1043: The version-related API is different in SYCL. An
+            initial code was generated, but you need to adjust it.
+            */
+            if (DPCT_CHECK_ERROR(rt = dpct::get_major_version(
+                                     dpct::get_current_device())) == 0 &&
+                rt / 1000 != DPCT_COMPAT_RT_VERSION / 1000)
+                std::fprintf(
+                    stderr,
+                    "strata generate: WARNING: this engine was compiled with "
+                    "CUDA %d.%d headers but "
+                    "loaded a CUDA %d.%d runtime (libcudart): GPU properties "
+                    "can read wrong and some "
+                    "kernels go unused. Rebuild it against one toolkit (cmake "
+                    "-DCUDAToolkit_ROOT=<the "
+                    "toolkit>, with its libcudart.so present) (#542)\n",
+                    DPCT_COMPAT_RT_VERSION / 1000,
+                    DPCT_COMPAT_RT_VERSION % 1000 / 10, rt / 1000,
+                    rt % 1000 / 10);
+        }
 #endif
         const std::string e = strata::core::device_code_error();
         if (!e.empty()) {
@@ -2829,6 +3046,15 @@ int main(int argc, char **argv) try {
         }
         std::fprintf(stderr, "strata generate: experts via mmap (--mmap-experts; %s)\n",
                      src.gguf_mode() ? "the GGUF shards in place, no experts.bin" : "the A/B arm of R2.1");
+        // #286: with a RAM budget the hottest experts live in it, and the rest are read from the drive unbuffered
+        // when the file cache could not keep them beside the budget anyway (a 32 GB PC) - the mapped reads' page
+        // faults are small requests on the critical path, and their pages take the RAM the budget was sized for
+        if (o.resident_budget > 0 || std::getenv("STRATA_UNBUFFERED_LOAD") != nullptr) {
+            std::string why;
+            const bool ub = src.set_unbuffered(o.resident_budget, why);
+            std::fprintf(stderr, "strata generate: the file tier reads %s (%s)\n",
+                         ub ? "unbuffered" : "through the file cache", why.c_str());
+        }
         srcp = &src;
     } else {
         arena_src.set_gguf(o.native_preset);   // plan v0.3 P6: a native pack may take its experts from shard 1
@@ -2910,6 +3136,7 @@ int main(int argc, char **argv) try {
         return 1;
     }
     const bool auto_cache = o.expert_cache < 0;
+    bool reserve_adapted = false;   // #496: the auto sizing lowered the reserve so a small card's cache fits
     if (o.expert_cache < 0) {
         size_t free_b = 0, total_b = 0;
         /*
@@ -2928,15 +3155,63 @@ int main(int argc, char **argv) try {
         const int64_t mtp_bind = (!o.mtp.empty() && native_head.loaded())
                                      ? (int64_t) mtp.bind_bytes(native_head.row_bytes(), n_vocab) : 0;
         const int64_t reserve = (((int64_t) o.vram_reserve_mib + prefill_mib) << 20) + mtp_bind;
-        int64_t slots = ((int64_t) free_b - reserve) / (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+        const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+        int64_t slots = ((int64_t) free_b - reserve) / blob;
         if (!profile.empty()) slots = std::min<int64_t>(slots, (int64_t) profile.size());
         o.expert_cache = (int) std::max<int64_t>(slots, 0);
         std::fprintf(stderr, "strata generate: expert cache auto: %.2f GiB free, %d MiB reserved (+%lld MiB for the "
                              "draft head) -> %d slots\n",
                      (double) free_b / 1073741824.0, o.vram_reserve_mib, (long long) (mtp_bind >> 20), o.expert_cache);
-        if (o.expert_cache == 0)   // the verify window cannot start without it (#174): say what makes room
-            std::fprintf(stderr, "strata generate: no VRAM is left for the expert cache: lower --max-context, use "
-                                 "--kv k8v4, run images on the CPU, or close other programs that use the GPU\n");
+        // #496: the verify window cannot start without a cache (#174), and a cache too small to lend the prompt path
+        // a 256-token chunk's buffers (plus the 128 slots a loan leaves; one slot without --prefill) makes it
+        // allocate its own on top - more than the reserve.  When the default reserve leaves less than that (a 6 GB
+        // card), the reserve shrinks to what leaves exactly that cache, down to kSmallReserveMib: what is allocated
+        // after the cache - the prompt path's own part, the verify buffers, the draft head - comes out of the reserve,
+        // and below ~550 MiB a card ends with less than the 256 MiB the serve check calls LOW (IQ3_XXS, 32K, a 300 MiB
+        // reserve: 5 MiB left), so the cache gets no more than it needs, and the serve check says so plainly when it
+        // ends LOW (`reserve_adapted`).  A reserve given on the command line is kept.  No slot at all: the start
+        // stops, saying what is short and what makes room.  A card the default reserve leaves that much is sized as
+        // before.
+        constexpr int kSmallReserveMib = 300;
+        const int64_t min_slots = (o.prefill_chunk > 0 && pf_borrow)
+            ? ((int64_t) strata::prefill::Prefill::bytes_needed(g, ss, 256) + blob - 1) / blob + 128 : 1;
+        if (o.expert_cache < min_slots && !o.vram_reserve_given && o.vram_reserve_mib > kSmallReserveMib) {
+            // the largest reserve (in MiB) that still leaves min_slots
+            const int64_t fit_mib = ((int64_t) free_b - mtp_bind - min_slots * blob) / (1 << 20) - prefill_mib;
+            if (fit_mib >= kSmallReserveMib) {
+                const int r = (int) std::min<int64_t>(fit_mib, o.vram_reserve_mib);
+                int64_t s2 = ((int64_t) free_b - ((((int64_t) r + prefill_mib) << 20) + mtp_bind)) / blob;
+                if (!profile.empty()) s2 = std::min<int64_t>(s2, (int64_t) profile.size());
+                std::fprintf(stderr, "strata generate: expert cache auto: the %d MiB reserve leaves too few slots on "
+                                     "this card (a working cache needs %lld): a %d MiB reserve instead -> %lld slots\n",
+                             o.vram_reserve_mib, (long long) min_slots, r, (long long) s2);
+                o.vram_reserve_mib = r;
+                o.expert_cache = (int) s2;
+                reserve_adapted = true;
+            }
+        }
+        if (o.expert_cache == 0) {
+            // what is short, and what makes room: the numbers a small card picks from
+            const int64_t at_reserve = o.vram_reserve_given ? o.vram_reserve_mib
+                                                            : std::min(o.vram_reserve_mib, kSmallReserveMib);
+            const int64_t need_b = (((int64_t) at_reserve + prefill_mib) << 20) + mtp_bind + min_slots * blob;
+            const int64_t short_mib = std::max<int64_t>(1, (need_b - (int64_t) free_b + (1 << 20) - 1) >> 20);
+            const int64_t session_mib =
+                (int64_t) (strata::core::session_bytes(g, o.max_context, K, 0, g.n_layers) >> 20);
+            const std::string reserve_tip =
+                o.vram_reserve_given && o.vram_reserve_mib > kSmallReserveMib
+                    ? ", a smaller --vram-reserve-mib (" + std::to_string(o.vram_reserve_mib) + " now; " +
+                          std::to_string(kSmallReserveMib) + " is enough on a small card)"
+                    : std::string();
+            std::fprintf(stderr, "strata generate: no VRAM is left for the expert cache: it needs at least %lld slots "
+                                 "(%lld MiB), about %lld MiB more than this card has free. To make room: a smaller "
+                                 "--max-context (the session, mostly its KV cache, takes %lld MiB at %lld tokens), "
+                                 "--kv q4_0, the English draft subset (setup --draft-vocab en; the draft head takes "
+                                 "%lld MiB now)%s, images on the CPU, or close other programs that use the GPU\n",
+                         (long long) min_slots, (long long) ((min_slots * blob) >> 20), (long long) short_mib,
+                         (long long) session_mib, (long long) o.max_context, (long long) (mtp_bind >> 20),
+                         reserve_tip.c_str());
+        }
     } else if (multi_gpu && o.expert_cache > 0) {
         // an explicit cache size leaves room for the prompt path's buffers and the reserve, or the first prompt
         // fails with "device buffers ... do not fit" (with borrowing - the default with a profile - the path lends
@@ -3185,7 +3460,15 @@ int main(int argc, char **argv) try {
             }
             prefilled = (int64_t) fills.size();
         }
+        // #286: an unbuffered file tier reads the pairs in batches of 64, the next batch while this one is copied
+        std::future<void> ahead;
+        auto read_batch = [&](int64_t at) { src.prefetch_pairs(profile.data() + at, std::min<int64_t>(64, want - at)); };
         for (int64_t i = 0; i < want && !piped; ++i) {
+            if (!per_layer && srcp == &src && src.unbuffered() && i % 64 == 0) {
+                if (ahead.valid()) ahead.get();
+                else read_batch(i);
+                if (i + 64 < want) ahead = std::async(std::launch::async, read_batch, i + 64);
+            }
             const int32_t slot = xcache.admit(profile[(size_t) i].first, profile[(size_t) i].second);
             if (slot == strata::core::kNotResident) {
                 if (per_layer) continue;
@@ -3404,9 +3687,29 @@ int main(int argc, char **argv) try {
         }
     }
 
+    // ---- Multi-GPU: the second GPU's expert tier, filled with the ranked pairs the primary does not hold
+    strata::core::PeerExperts peer;
+    if (o.peer_device >= 1) {
+        if (profile.empty() || srcp == nullptr || o.expert_cache <= 0) {
+            std::fprintf(stderr, "strata generate: --peer-device needs --expert-profile and the expert cache\n");
+            return 1;
+        }
+        const auto tp0 = Clock::now();
+        if (!peer.open(o.peer_device, profile, xcache, *srcp, g.n_layers, g.n_expert, o.peer_reserve_mib, o.peer_slots,
+                       err)) {
+            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: peer GPU %d: %lld experts, %.2f GiB (filled in %.1f s); with the primary's "
+                             "%lld that is %lld of %lld on the GPUs\n", o.peer_device, (long long) peer.resident(), peer.gib(),
+                     std::chrono::duration<double>(Clock::now() - tp0).count(), (long long) xcache.slots(),
+                     (long long) (peer.resident() + xcache.slots()), (long long) (g.n_layers * g.n_expert));
+    }
+
     Drive drive;
     for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
         drive.d.remote[drive.d.remote_count++] = &remote_experts[(size_t) r];
+    drive.d.peer = peer.valid() ? &peer : nullptr;
     drive.d.hit_cpu_order = o.expert_cache_cpu_order;
     drive.d.split_rows = !o.no_split_rows;
     drive.d.pool = &pool;
@@ -4184,7 +4487,7 @@ int main(int argc, char **argv) try {
     // and each generated token is written to stdout as `T <id>` as soon as its verify window is done, followed by
     //
     //     DONE <generated> <prompt_tokens> <prompt_ms> <decode_ms> <stop|length|cancel> <drafts accepted>
-    //          <drafts offered> <prompt tokens reused>
+    //          <drafts offered> <prompt tokens reused> ... <prompt tokens read>   (see the DONE line below; #471)
     //
     // Before that, `RESUME <n>` (n prompt tokens are not read again), `PP <position> <prompt_tokens> <ms> <tok/s>`
     // after every prompt chunk, and `REUSED <n>` once the prompt is read.  (`ERR <message>` instead when a request
@@ -4322,28 +4625,6 @@ int main(int argc, char **argv) try {
             return 1;
         }
     }
-    // --adapt-tuned: a longer memory and more frequent, larger steps for the adaptive tier, where they were measured
-    // to help - a cache that holds 20-60% of the experts, with every expert outside VRAM in RAM.  With fewer, a swap
-    // evicts experts that are needed again; with more, nearly everything hits already; with experts on the drive, a
-    // swap can read it.  It pays where the CPU's share of the misses is the round's critical path (large experts).
-    if (const char* v = std::getenv("STRATA_ADAPT_TUNED"); v != nullptr) o.adapt_tuned = v[0] != '0';
-    if (o.adapt_tuned && !o.adapt_given && o.expert_cache > 0 && !host_res.empty()) {
-        const double cover = (double) xcache.slots() / (double) (g.n_layers * g.n_expert);
-        bool in_ram = !(o.mmap_experts && !o.resident_cpu_experts);
-        if (o.resident_cpu_experts)   // the RAM budget must hold every expert the GPU cache does not
-            for (int64_t i = 0; i < g.n_layers * g.n_expert && in_ram; ++i)
-                if (host_res[(size_t) i] < 0 && !src.has_resident(i / g.n_expert, i % g.n_expert)) in_ram = false;
-        const bool fits = cover >= 0.2 && cover <= 0.6 && in_ram;
-        if (fits) {
-            o.adapt_every = 2;
-            o.adapt_swaps = 192;
-            o.adapt_decay = 0.92f;
-        }
-        std::fprintf(stderr, "strata generate: --adapt-tuned: the cache holds %.0f%% of the experts%s -> adaptive tier "
-                             "every %d rounds, %d swaps, x%.2f%s\n", 100.0 * cover,
-                     in_ram ? "" : ", some only on the drive", o.adapt_every, o.adapt_swaps, o.adapt_decay,
-                     fits ? "" : " (the defaults)");
-    }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||
             (graph_hits && (thits.d_res == nullptr || host_res.empty()))) {
@@ -4709,6 +4990,13 @@ int main(int argc, char **argv) try {
                                      "context, or read prompts in smaller chunks (--prefill 512)\n");
             return 1;
         }
+        if (peer.valid() && o.peer_prefill_rows != 0) {
+            const int64_t rows = o.peer_prefill_rows > 0 ? o.peer_prefill_rows : o.prefill_chunk * K / 2;
+            if (!sp.set_peer(&peer, rows, err)) {
+                std::fprintf(stderr, "strata serve: %s - the prompt path stays on the primary GPU\n", err.c_str());
+                err.clear();
+            }
+        }
         mem_mark("the head and the prompt path");
         // #340: STRATA_SPLIT_SMALL_OWN=S (tokens): on a layer split, every stage that borrows keeps the slots for an
         // S-token chunk's buffers for the whole session (0.1.29's own buffers, carved from the tail of its cache):
@@ -4964,6 +5252,9 @@ int main(int argc, char **argv) try {
             return true;
         };
         int64_t pp_total = 0, pp_from = 0, pp_next_check = 0;
+        // #471: the position the prompt pass has read up to (a chunk's or a window's end): what a request cancelled
+        // mid-read reports as read, instead of the whole prompt
+        int64_t pp_reached = 0;
         Clock::time_point pp_t0 = Clock::now();
         auto imgs_below = [&](const std::vector<ImgKey>& all, int64_t L) {
             std::vector<ImgKey> v;
@@ -5040,6 +5331,7 @@ int main(int argc, char **argv) try {
                              batched ? "batched" : "token", mtp.kv_state().kv_mode, (long long) T);
             // progress for the server window: PP <position reached> <prompt tokens> <ms> <fresh tokens/s>
             const int64_t done = p0 + T;
+            pp_reached = done;
             const double ms = std::chrono::duration<double, std::milli>(Clock::now() - pp_t0).count();
             std::printf("PP %lld %lld %.0f %.1f\n", (long long) done, (long long) pp_total, ms,
                         ms > 0.0 ? 1000.0 * (double) (done - pp_from) / ms : 0.0);
@@ -5090,6 +5382,17 @@ int main(int argc, char **argv) try {
         drive.d.plan = ver.plan_sink();
         drive.d.pcie_num = std::max(0, std::min(256, (int) (o.pcie_frac * 256.0 + 0.5)));
         if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
+        // #477 --expert-profile-save: what the adaptive tier learned, kept across restarts (opt-in; off: `heat` stays
+        // empty and nothing below runs).  It needs the adaptive tier's counts and the residency table.
+        std::vector<double> heat;
+        if (!o.expert_profile_save.empty()) {
+            if (drive.d.usage.empty() || host_res.empty())
+                std::fprintf(stderr, "strata serve: --expert-profile-save needs the adaptive tier (--adapt-every and "
+                                     "--adapt-swaps above 0) and --expert-profile: nothing will be saved\n");
+            else
+                heat.assign(drive.d.usage.size(), 0.0);
+        }
+        Clock::time_point profile_saved_at = Clock::now();
         dpct::queue_ptr adapt_stream = &dpct::get_in_order_queue();
         /*
         DPCT1025: The SYCL queue is created ignoring the flag and priority
@@ -5133,7 +5436,8 @@ int main(int argc, char **argv) try {
         };
         auto apply_pending = [&](bool wait) {
             try {
-        if (pending.empty()) return;
+        if (peer.valid()) peer.apply_pending(wait);
+            if (pending.empty()) return;
             if (wait) adapt_ev->wait_and_throw();
             else if (adapt_ev->get_info<
                          sycl::info::event::command_execution_status>() !=
@@ -5170,7 +5474,7 @@ int main(int argc, char **argv) try {
                 const float* u = drive.d.usage.data() + l * g.n_expert;
                 const int32_t* r = host_res.data() + l * g.n_expert;
                 for (int32_t e = 0; e < (int32_t) g.n_expert; ++e) {
-                    if (r[e] < 0) { if (u[e] >= 2.0f) cand.emplace_back(u[e], e); }
+                    if (r[e] < 0) { if (u[e] >= 2.0f && !(peer.valid() && peer.has(l, e))) cand.emplace_back(u[e], e); }
                     else vict.emplace_back(u[e], e);
                 }
                 if (cand.empty() || vict.empty()) continue;
@@ -5222,9 +5526,40 @@ int main(int argc, char **argv) try {
                     const strata::core::OnDevice on(st->dev);
                     dpct::sync_barrier(st->adapt_ev, st->adapt_stream);
                 }
+            // #477: the routing counted since the start (each count adds up to 1 / (1 - --adapt-decay) over its
+            // decays: the sum is proportional to the routing itself) - only with --expert-profile-save, else `heat`
+            // is empty
+            for (size_t i = 0; i < heat.size(); ++i) heat[i] += (double) drive.d.usage[i];
+            if (peer.valid()) {                   // multi-GPU: the peer takes the next most-routed CPU misses
+                std::vector<int32_t> r0 = host_res;
+                for (const auto& [i, slot] : pending) r0[(size_t) i] = slot;   // swapped into the primary already
+                std::string perr;
+                if (!peer.adapt(drive.d.usage.data(), r0.data(),
+                                o.peer_adapt_swaps >= 0 ? o.peer_adapt_swaps : o.adapt_swaps, perr)) {
+                    std::fprintf(stderr, "strata serve: %s\n", perr.c_str());
+                    return false;
+                }
+            }
             for (float& v : drive.d.usage) v *= o.adapt_decay;
             return true;
         };
+        // #477: write the learned profile (between requests and at QUIT: a prompt's lent slots are back by then).
+        // A swap still in flight counts as done - its expert is resident once the copy lands.  `why`: for the log.
+        auto save_profile = [&](const char* why) {
+            if (heat.empty()) return;
+            std::vector<uint8_t> resident(host_res.size(), 0);
+            for (size_t i = 0; i < host_res.size(); ++i) resident[i] = host_res[i] >= 0;
+            for (const auto& p : pending) resident[(size_t) p.first] = 1;
+            std::string e;
+            const auto ranked = strata::core::rank_learned_profile(g.n_layers, g.n_expert, resident, heat,
+                                                                   profile_loaded);
+            if (strata::core::write_expert_profile(o.expert_profile_save, g.n_layers, g.n_expert, ranked, e))
+                std::fprintf(stderr, "strata serve: expert profile saved to %s (%s)\n", o.expert_profile_save.c_str(),
+                             why);
+            else
+                std::fprintf(stderr, "strata serve: the expert profile was not saved: %s\n", e.c_str());
+            profile_saved_at = Clock::now();
+        };
         // stdin is read on its own thread, so a STOP line reaches a request that is still running (the client went
         // away, or pressed Esc): the flag is checked between prompt chunks and between verify windows.
         std::atomic<bool> stop_req{false};
@@ -5303,6 +5638,12 @@ int main(int argc, char **argv) try {
             const int64_t free_mib = (int64_t) (free_b >> 20);
             if (free_mib >= 256) {
                 std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded\n", (long long) free_mib);
+            } else if (reserve_adapted) {
+                // #496: the reserve was already lowered to make the cache fit - a bigger one would leave it no room
+                std::fprintf(stderr, "strata serve: WARNING: %lld MiB of VRAM free with everything loaded - this card "
+                                     "only just fits the model (the VRAM reserve was lowered to %d MiB so the expert "
+                                     "cache fits): requests may stall. Close other programs that use the GPU, or lower "
+                                     "--max-context\n", (long long) free_mib, o.vram_reserve_mib);
             } else {
                 std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded - LOW: requests may stall;"
                                      " add --vram-reserve-mib %lld to the config's args (or lower --max-context)\n",
@@ -5397,6 +5738,10 @@ int main(int argc, char **argv) try {
         std::vector<float> img_rows;
         std::vector<const float*> row_ptr;
         while (next_line(line)) {
+            // #477: every --expert-profile-save-every minutes, before the next request (at QUIT: after the loop)
+            if (!heat.empty() && line != "QUIT" && o.expert_profile_save_min > 0 &&
+                Clock::now() - profile_saved_at >= std::chrono::duration<double>(o.expert_profile_save_min * 60.0))
+                save_profile("periodic");
             if (line == "QUIT") break;
             // the watchdog watches a request from here until this iteration ends, whichever way it ends
             struct BusyScope {
@@ -5744,6 +6089,7 @@ int main(int argc, char **argv) try {
             conversations.limit_reuse(read_from);
             pp_total = n;
             pp_from = read_from;
+            pp_reached = read_from;
             pp_t0 = r0;
             pp_next_check = reread_to > 0 ? INT64_MAX : resume + o.prompt_cache_every;
             {
@@ -5809,6 +6155,7 @@ int main(int argc, char **argv) try {
                         return false;
                     if (!ver.commit(T, e) || !mtp.prefill(ver.final_R_all(), nxt.data(), T, q, e)) return false;
                     q += T;
+                    pp_reached = q;   // #471
                 }
                 // the batched prompt path (other streams), checkpoints and snapshots may follow: the last commit first
                 if (!ver.wait_commit(e)) return false;
@@ -6102,13 +6449,10 @@ int main(int argc, char **argv) try {
                 drive.d.layers = 0;
                 drive.d.experts = 0;
                 drive.d.failed = false;
-            // THE WAIT IS THE FIX.  A non-blocking query here left the next window's residency table to
-            // depend on whether the previous round's expert copies had landed: an expert that is resident
-            // runs the GPU kernel and one that is not is computed on the CPU, and the two round
-            // differently enough to move a logit by ~0.26.  Waiting costs the copies' remaining time on a
-            // window that follows one that issued them, and buys a residency table that is a function of
-            // what was actually copied - which is what makes greedy decode reproducible.
-            apply_pending(true);
+                // #463: the previous adapt round's copies land first - with a non-blocking query, whether a swapped-in
+                // expert ran on the GPU or the CPU (they round differently) depended on the copy's timing
+                // (STRATA_ADAPT_NOWAIT=1: 0.1.37's non-blocking query, the A/B)
+                apply_pending(!adapt_nowait());
                 if (hist_n > 0) {
                     // the tails the penalties count over, ONE PER ROW: the tokens the state has consumed, the
                     // fed-back head `x` (it joins `consumed` only after this window commits), then the drafts
@@ -6366,20 +6710,30 @@ int main(int argc, char **argv) try {
             }
             const int64_t req_hits = drive.d.cache_hits - decode_hits0;
             const int64_t req_look = (drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused) - decode_look0;
+            // #471: the prompt tokens this request read - all the fresh ones, or as far as the prompt pass got when a
+            // cancel stopped it part-way (a cancelled request used to be logged and counted as having read them all)
+            const int64_t fresh = n - resume;
+            const int64_t read_n = cancelled ? std::clamp<int64_t>(pp_reached - resume, 0, fresh) : fresh;
             // DONE <generated> <prompt> <prompt ms> <decode ms> <finish> <drafts accepted> <drafts offered> <reused> [hits] [lookups]
             //      [RAM blobs] [file blobs] [file MB]   (CS-T tiers; appended, so an older server reads the rest)
-            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f\n", (long long) produced_n,
+            //      [prompt tokens read]   (#471: fewer than <prompt> - <reused> when a cancel stopped the read)
+            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld\n", (long long) produced_n,
                         (long long) n, prompt_ms, decode_ms, finish, (long long) draft_accepted, (long long) draft_offered,
                         (long long) resume, (long long) req_hits, (long long) req_look,
                         (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
-                        (double) (src.file_read_bytes() - file_bytes0) / 1e6);
+                        (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n);
             std::fflush(stdout);
             if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
-            const int64_t fresh = n - resume;
-            std::fprintf(stderr, "strata serve: prompt %lld tokens = %lld reused + %lld read in %.0f ms (%.1f tok/s), "
+            // "12288 of 98179" when cancelled mid-read (#471), the rate from what was read
+            char read_txt[64];
+            if (cancelled)
+                std::snprintf(read_txt, sizeof(read_txt), "%lld of %lld", (long long) read_n, (long long) fresh);
+            else
+                std::snprintf(read_txt, sizeof(read_txt), "%lld", (long long) fresh);
+            std::fprintf(stderr, "strata serve: prompt %lld tokens = %lld reused + %s read in %.0f ms (%.1f tok/s), "
                                  "%lld generated in %.0f ms (%.1f tok/s), drafts accepted %lld of %lld, %zu checkpoints%s\n",
-                         (long long) n, (long long) resume, (long long) fresh, prompt_ms,
-                         prompt_ms > 0 ? 1000.0 * fresh / prompt_ms : 0.0, (long long) produced_n, decode_ms,
+                         (long long) n, (long long) resume, read_txt, prompt_ms,
+                         prompt_ms > 0 ? 1000.0 * read_n / prompt_ms : 0.0, (long long) produced_n, decode_ms,
                          decode_ms > 0 ? 1000.0 * produced_n / decode_ms : 0.0, (long long) draft_accepted,
                          (long long) draft_offered, checks.size(), cancelled ? " (cancelled)" : "");
             // the VRAM share of the experts the pool looked up while decoding; experts it sent over PCIe for the GPU
@@ -6441,6 +6795,7 @@ int main(int argc, char **argv) try {
                              remote_experts[(size_t) r].ms_begin() - begin_before[(size_t) r],
                              remote_experts[(size_t) r].ms_wait() - wait_before[(size_t) r]);
         }
+        save_profile("exit");   // #477: QUIT, or the server closed stdin
         // SYCL port: the requests are done and their output written; leave without unwinding the GPU objects (the OS
         // reclaims them). Their destructors ran against a runtime already shutting down and aborted (exit 139).
         try { dpct::get_current_device().queues_wait_and_throw(); } catch (...) {}
@@ -6733,11 +7088,7 @@ int main(int argc, char **argv) try {
                          (long long) n_vocab, (long long) pos);
             return 1;
         }
-        // THE HEADER IS WRITTEN WITH THE FIRST ROW, NOT AT OPEN.  A native pack leaves the per-token
-        // loop at `if (native_pack) { spec_pos = pos; break; }` and never reaches this site, so a header
-        // written at open promised 64 or 66 rows for a file that would contain none - and a reader that
-        // trusted it reported "0 differing positions" from a file with no positions in it.  Written here,
-        // a run that dumps nothing leaves an empty file, which is what actually happened.
+        // the header with the first row (see `hdr`): a run that dumps nothing leaves an empty file
         if (emit_logits && !hdr_written && std::fwrite(hdr, sizeof hdr, 1, dump) != 1) {
             std::fprintf(stderr, "strata generate: cannot write logits header\n");
             std::fclose(dump);
@@ -6923,11 +7274,7 @@ int main(int argc, char **argv) try {
         auto apply_pending = [&](bool wait) {
             try {
         if (pending.empty()) return;
-            if (wait) adapt_ev->wait_and_throw();
-            // STRATA_TRACE_ADAPT: a non-blocking query means the next window reads the residency table
-            // with whatever the copy has achieved.  Whether the incoming experts are RESIDENT for that
-            // window depends on copy latency, and a resident expert runs a different kernel than a
-            // CPU-computed one - a far bigger numerical difference than a rounding wobble.
+            // STRATA_TRACE_ADAPT=1: whether a round's copies had landed when the next window read the table
             static const bool trace_pending = std::getenv("STRATA_TRACE_ADAPT") != nullptr;
             if (wait) adapt_ev->wait_and_throw();
             else if (adapt_ev->get_info<
@@ -7113,13 +7460,10 @@ int main(int argc, char **argv) try {
             drive.d.layers = 0;
             drive.d.experts = 0;
             drive.d.failed = false;
-            // THE WAIT IS THE FIX.  A non-blocking query here left the next window's residency table to
-            // depend on whether the previous round's expert copies had landed: an expert that is resident
-            // runs the GPU kernel and one that is not is computed on the CPU, and the two round
-            // differently enough to move a logit by ~0.26.  Waiting costs the copies' remaining time on a
-            // window that follows one that issued them, and buys a residency table that is a function of
-            // what was actually copied - which is what makes greedy decode reproducible.
-            apply_pending(true);
+            // #463: the previous adapt round's copies land first - with a non-blocking query, whether a swapped-in
+            // expert ran on the GPU or the CPU (they round differently) depended on the copy's timing
+            // (STRATA_ADAPT_NOWAIT=1: 0.1.37's non-blocking query, the A/B)
+            apply_pending(!adapt_nowait());
             if (!ver.run(T, window.data(), p, &drive_pool_multi, &drive, outv.data(), err)) {
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());
                 return 1;
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index ea9dce3194a..aa5ac8e54ab 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -111,6 +111,20 @@ def gdn_plain_copies(s):
     return s.replace("*reinterpret_cast<float4*>(smem) = *reinterpret_cast<const float4*>(gmem);",
                      "*reinterpret_cast<sycl::float4*>(smem) = *reinterpret_cast<const sycl::float4*>(gmem);")
 edit("src/prefill/kernels.dp.cpp", gdn_plain_copies)
+# 0.1.38: upstream's sm_90 thread-block-cluster greedy sampler (cudaLaunchKernelEx with a cluster dimension) has no
+# SYCL counterpart: the HIP branch's "not available" answer, so the caller takes the plain greedy kernel
+edit("src/kernels/cuda/sampler.dp.cpp", lambda s: s.replace(
+    "                           int *out, void *stream) try {\n#if defined(__HIPCC__)\n",
+    "                           int *out, void *stream) try {\n#if 1   // SYCL port: no thread-block clusters (sm_90): the caller takes the plain greedy kernel\n"))
+edit("src/kernels/cuda/qsa_select.dp.cpp", lambda s: s.replace(
+    "                            void *stream) try {\n#if defined(__HIPCC__)\n",
+    "                            void *stream) try {\n#if 1   // SYCL port: no thread-block clusters (sm_90): the caller takes the plain top-k\n"))
+# 0.1.38: dpct could not deduce fused_gr's templated kernel names (the staged read and the MAX_T down kernels)
+def gr_kernel_names(s):
+    pat = re.compile(r",\s*dpct_placeholder /\*Fix the type mannually\*/>>\((.{0,900}?)\b(gr_down_staged_kernel|gr_down_multi_kernel<(\d+)>)\(", re.S)
+    return pat.sub(lambda m: (">>(" if m.group(2) == "gr_down_staged_kernel" else f", dpct_kernel_scalar<{m.group(3)}>>>(")
+                   + m.group(1) + m.group(2) + "(", s)
+edit("src/kernels/cuda/fused_gr.dp.cpp", gr_kernel_names)
 edit("src/kernels/cuda/elementwise.dp.cpp", doorbell)
 edit("src/kernels/cuda/verify_kernels.dp.cpp", doorbell)
 

From cce52db1ebc8a4ea0bcc648c50a64193cc9dfb30 Mon Sep 17 00:00:00 2001
From: Chanyeong Lim <dlacksdud2@snu.ac.kr>
Date: Fri, 2 Oct 2026 21:05:00 +0900
Subject: [PATCH 120/201] qsa_select: the top-k past the register kernel's
 reach on 1,024 threads with a histogram per warp (CUDA) - 9-12x at 262K-524K
 cells, a 243K-token prompt +26% on an RTX 3060

On CUDA the register kernel holds 33,792 blocks (~135K cells). Past it qsa_block_topk took the original kernel:
256 threads, each reading its own stretch of the scores on all six passes, one shared histogram updated with
atomics. The dispatch follows the capacity (--max-context), so with a context past ~135K that was every prompt
batch and every decode window on a card without the sm_75 active-bound dispatch (#512), whatever the prompt's
length, and on sm_75 every prompt batch past 33,792 blocks and every decode window.

block_topk_wide_kernel is the register kernel's layout (1,024 threads, a histogram per warp, warp scans) with the
keys read from memory:
- the four radix passes: thread t reads blocks t, t + 1024, ... - a histogram has no order, so a warp reads 32
  neighbours at a time;
- the count and the output: warp w holds `per` rows of 32 consecutive blocks, and the cells are written in the
  order (warp, row, lane); a row without a selected block is skipped.
The selection rule is the original kernel's (radix threshold, ties to the lowest index, cells ascending): identical
ids. One launch per call, no scratch memory, no capacity limit.

Dispatch (CUDA; HIP is unchanged and does not compile the kernel): where the blocks do not fit the registers the
new kernel, except a call that names fewer than 4,608 blocks (a prompt batch below ~18K cells), which keeps the
original kernel: its fixed cost is lower there. A decode window (no block count) takes the new kernel at any
context. The register kernel's range, the sm_75 active-bound dispatch and the sm_90+ cluster path are unchanged.
STRATA_TOPK_OLD=1 keeps the original kernel, as before.

qsa_topk_parity (new, with the kernel parity tests): the dispatched top-k against qsa_block_topk_ref on both sides
of the register kernel's reach, at short contexts under a long capacity and up to 524,288 cells, called as decode
and as the prompt path call it, with continuous scores, 64 score levels and equal scores.

RTX 3060 12 GB (sm_86), 256 queries with their block count under a 262,144-cell capacity (524,288 for the last
two), original -> dispatched:
  16K cells    0.199 -> 0.199 ms (the original kernel)
  32K          0.845 -> 0.328
  131K         4.70  -> 0.97
  262K        16.09  -> 1.71
  393K        26.02  -> 2.49
  524K        37.53  -> 3.24
4 queries without a count (a decode window): 0.031 -> 0.028 ms at 8K, 0.176 -> 0.083 at 131K, 0.309 -> 0.127 at
262K.

IQ3_XXS on that card (--resident-experts, --max-context 262144, --kv int8 --kv-resident 32768),
tools/needle_bench.py, STRATA_TOPK_OLD=1 against the default: tok/s of the prompt, and the prompt path's selection
phase (STRATA_PREFILL_TIMING):
  16,471 tokens    1004.5, 1016.2 ->  989.0, 1013.6       195 ->    195 ms
  31,970           1043.3, 1055.5 -> 1060.1, 1060.5       900 ->    731
  61,333            932.9         -> 1013.8             4,061 ->  2,428
  122,755           904.7,  904.2 ->  992.7,  989.6    20,019 ->  9,034
  185,729           819.7         ->  954.7            50,055 -> 20,761
  243,176           743.3         ->  933.7            96,326 -> 35,544
The needles are found in every run.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 CMakeLists.txt                        |   7 ++
 include/strata/kernels/qsa_select.hpp |   3 +-
 src/kernels/cuda/qsa_select.cu        | 134 ++++++++++++++++++++++++-
 src/kernels/qsa_topk_parity.cpp       | 139 ++++++++++++++++++++++++++
 4 files changed, 278 insertions(+), 5 deletions(-)
 create mode 100644 src/kernels/qsa_topk_parity.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 347d2ec7ca2..c614cbdd997 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -670,6 +670,13 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   target_link_libraries(qsa_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_test(NAME qsa_parity COMMAND qsa_parity --selftest)
 
+  # the QSA top-k the engine dispatches against the original kernel: identical ids on both sides of the register
+  # kernel's reach, with tied and with equal scores (synthetic, no model)
+  add_executable(qsa_topk_parity src/kernels/qsa_topk_parity.cpp)
+  target_include_directories(qsa_topk_parity PRIVATE ${_strata_gpu_include_directories})
+  target_link_libraries(qsa_topk_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
+  add_test(NAME qsa_topk_parity COMMAND qsa_topk_parity --selftest)
+
   # ---- P2.S4: the PLE n-gram hash, the IQ4_NL table read, and the PLE block ----
   # `ngram.cpp` is host-only but lives in `strata_kernels` because `ple.cu` shares its geometry constants, and
   # splitting them across two libraries would only add a layer.
diff --git a/include/strata/kernels/qsa_select.hpp b/include/strata/kernels/qsa_select.hpp
index b70a4ce560c..31508165110 100644
--- a/include/strata/kernels/qsa_select.hpp
+++ b/include/strata/kernels/qsa_select.hpp
@@ -49,7 +49,8 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
 /// build below sm_90, or a capacity whose keys do not fit one cluster's shared memory. Capturable.
 bool qsa_block_topk_cluster(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
                             const QsaShapes& s, int32_t* ids, void* stream);
-/// The original kernel (keys read from memory on every radix pass), for tests: the same ids.
+/// The original kernel (256 threads, one shared histogram, keys read from memory on every radix pass), for tests and
+/// STRATA_TOPK_OLD=1: the same ids.
 void qsa_block_topk_ref(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
                         const QsaShapes& s, int32_t* ids, void* stream);
 
diff --git a/src/kernels/cuda/qsa_select.cu b/src/kernels/cuda/qsa_select.cu
index ad705b1dffc..56222c5190a 100644
--- a/src/kernels/cuda/qsa_select.cu
+++ b/src/kernels/cuda/qsa_select.cu
@@ -596,6 +596,125 @@ __global__ void __launch_bounds__(TK_T) block_topk_reg_kernel(const float* __res
     }
 }
 
+#if !defined(__HIPCC__)
+// ---- a query with more blocks than the register kernel holds (contexts past 4 * 1024 * TK_PER cells): the register
+// kernel's threads, per-warp histograms and warp scans, with each key read from memory again on every pass.  A
+// histogram has no order, so on the four radix passes thread t reads blocks t, t + 1024, ...: a warp reads 32
+// neighbours at a time.  The cells are emitted ascending in the order (warp, row, lane): warp w holds the `per` rows
+// of 32 consecutive blocks from block w * 32 * per.  block_topk_kernel's selection rule (radix threshold, ties to the
+// lowest index): identical ids.
+__global__ void __launch_bounds__(TK_T) block_topk_wide_kernel(const float* __restrict__ scores,
+                                                               const int32_t* __restrict__ steps, int64_t max_blocks,
+                                                               int64_t cap, int32_t* __restrict__ ids) {
+    __shared__ int hist[TK_T / 32][256];
+    __shared__ int s_gt[TK_T / 32], s_eq[TK_T / 32];
+    __shared__ int s_digit, s_above;
+    const int64_t qi = blockIdx.x;
+    const int32_t* st = steps + qi * kStepCount;
+    const int64_t n_kv = st[kStepNKv], n_bid = st[kStepNBid], width = st[kStepWidth];
+    int32_t* out = ids + qi * cap;
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
+    if (n_kv <= width) {
+        for (int64_t j = t; j < n_kv; j += TK_T) out[j] = (int32_t) j;
+        return;
+    }
+    const float* sc = scores + qi * max_blocks;
+    const int64_t nb = n_bid + 1;
+    const int64_t per = (nb + TK_T - 1) / TK_T;       // rows of 32 blocks per warp
+    auto weight = [&](int64_t b) -> int { return b < n_bid ? R : (int) (n_kv - n_bid * R); };
+    uint32_t prefix = 0;
+    int above = 0;
+    for (int shift = 24; shift >= 0; shift -= 8) {
+        for (int i = lane; i < 256; i += 32) hist[warp][i] = 0;
+        __syncwarp();
+        const uint32_t hi_mask = shift == 24 ? 0u : (0xffffffffu << (shift + 8));
+        for (int64_t b = t; b < nb; b += TK_T) {
+            const int w = weight(b);
+            if (w == 0) continue;
+            const uint32_t k = order_key(sc[b]);
+            if ((k & hi_mask) == (prefix & hi_mask)) atomicAdd(&hist[warp][(k >> shift) & 255], w);
+        }
+        __syncthreads();
+        if (t < 256) {                                // fold the warps' histograms into warp 0's
+            int sum = 0;
+            for (int w2 = 0; w2 < TK_T / 32; ++w2) sum += hist[w2][t];
+            hist[0][t] = sum;
+        }
+        __syncthreads();
+        if (t == 0) {
+            int cum = above, d = 255;
+            for (; d > 0; --d) {
+                if (cum + hist[0][d] >= width) break;
+                cum += hist[0][d];
+            }
+            s_digit = d;
+            s_above = cum;
+        }
+        __syncthreads();
+        prefix |= (uint32_t) s_digit << shift;
+        above = s_above;
+        __syncthreads();
+    }
+    const uint32_t thr = prefix;
+    const int eq_budget = (int) (width - above);      // cells equal to thr that fit, lowest index first
+    const int64_t w0 = (int64_t) warp * 32 * per;
+    int gt = 0, eq = 0;
+    for (int64_t b = w0 + lane; b < nb && b < w0 + 32 * per; b += 32) {
+        const int w = weight(b);
+        if (w == 0) continue;
+        const uint32_t k = order_key(sc[b]);
+        if (k > thr) gt += w;
+        else if (k == thr) eq += w;
+    }
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) {
+        gt += __shfl_xor_sync(0xffffffffu, gt, o);
+        eq += __shfl_xor_sync(0xffffffffu, eq, o);
+    }
+    if (lane == 0) { s_gt[warp] = gt; s_eq[warp] = eq; }
+    __syncthreads();
+    if (t == 0) {                                     // per warp: the selected cells and the tied cells before it
+        int eb = 0, sb = 0;
+        for (int w2 = 0; w2 < TK_T / 32; ++w2) {
+            const int g2 = s_gt[w2], e2 = s_eq[w2];
+            const int take = eq_budget - eb < 0 ? 0 : (eq_budget - eb > e2 ? e2 : eq_budget - eb);
+            s_gt[w2] = sb;
+            s_eq[w2] = eb;
+            sb += g2 + take;
+            eb += e2;
+        }
+    }
+    __syncthreads();
+    int run_sel = s_gt[warp], run_eq = s_eq[warp];
+    for (int64_t r0 = w0; r0 < nb && r0 < w0 + 32 * per; r0 += 32) {
+        const int64_t b = r0 + lane;
+        const int w = b < nb ? weight(b) : 0;
+        const uint32_t k = w ? order_key(sc[b]) : 0u;
+        const int my_gt = (w && k > thr) ? w : 0, my_eq = (w && k == thr) ? w : 0;
+        if (__ballot_sync(0xffffffffu, (my_gt | my_eq) != 0) == 0u) continue;   // a row without a selected block
+        int pe = my_eq;                               // tied cells up to and with this lane
+#pragma unroll
+        for (int o = 1; o < 32; o <<= 1) {
+            const int y = __shfl_up_sync(0xffffffffu, pe, o);
+            if (lane >= o) pe += y;
+        }
+        const int left = eq_budget - (run_eq + pe - my_eq);
+        const int take = left < 0 ? 0 : (left > my_eq ? my_eq : left);
+        const int my_sel = my_gt + take;
+        int ps = my_sel;
+#pragma unroll
+        for (int o = 1; o < 32; o <<= 1) {
+            const int y = __shfl_up_sync(0xffffffffu, ps, o);
+            if (lane >= o) ps += y;
+        }
+        int32_t* dst = out + run_sel + ps - my_sel;
+        for (int c = 0; c < my_sel; ++c) dst[c] = (int32_t) (b * R + c);
+        run_eq += __shfl_sync(0xffffffffu, pe, 31);
+        run_sel += __shfl_sync(0xffffffffu, ps, 31);
+    }
+}
+#endif
+
 
 // Block scores with every key block read ONCE for all of a call's queries (block_scores_kernel's grid is
 // (max_blocks / 8) x nq: ~24,600 mostly-idle blocks per layer at a decode window, each key re-read per query).  A fixed
@@ -1054,8 +1173,8 @@ bool qsa_block_topk_cluster(const float* scores, const int32_t* steps, int64_t n
 
 void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64_t max_blocks, int64_t cap,
                     const QsaShapes& s, int32_t* ids, void* stream, int64_t active_blocks) {
-    // keys in registers when every query's blocks fit (contexts up to ~135K cells); the same ids. STRATA_TOPK_OLD=1:
-    // the kernel that reads them from memory on every pass
+    // keys in registers when every query's blocks fit (contexts up to ~135K cells), else (CUDA) the same threads
+    // reading them from memory; the same ids. STRATA_TOPK_OLD=1: the original kernel
     static const bool old = std::getenv("STRATA_TOPK_OLD") != nullptr;
     if (nq <= 0) return;
 #if !defined(__HIPCC__)
@@ -1089,10 +1208,12 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
 #if defined(__HIPCC__)
     constexpr int64_t kRegMinBlocks = 7168;   // gfx1201: below ~28K cells the 1,024-thread kernel's fixed cost loses to the ref
     const bool too_small = counted && reach < kRegMinBlocks;
+    if (old || too_small || reach > fit) {
 #else
-    const bool too_small = false;
+    constexpr int64_t kWideMinBlocks = 4608;   // RTX 3060: a prompt batch below ~18K cells is faster on the ref
+    const bool too_small = reach > fit && active_blocks > 0 && active_blocks < kWideMinBlocks;
+    if (old || too_small) {
 #endif
-    if (old || too_small || reach > fit) {
         qsa_block_topk_ref(scores, steps, nq, max_blocks, cap, s, ids, stream);
         return;
     }
@@ -1100,6 +1221,11 @@ void qsa_block_topk(const float* scores, const int32_t* steps, int64_t nq, int64
         std::fprintf(stderr, "qsa_block_topk: unsupported geometry or cap\n");
         std::exit(1);
     }
+#if !defined(__HIPCC__)
+    if (reach > fit)   // past the register kernel's reach
+        block_topk_wide_kernel<<<(unsigned) nq, TK_T, 0, (cudaStream_t) stream>>>(scores, steps, max_blocks, cap, ids);
+    else
+#endif
     if (reach <= (int64_t) TK_T * TK_PER)
         block_topk_reg_kernel<TK_PER><<<(unsigned) nq, TK_T, 0, (cudaStream_t) stream>>>(scores, steps, max_blocks, cap, ids);
     else
diff --git a/src/kernels/qsa_topk_parity.cpp b/src/kernels/qsa_topk_parity.cpp
new file mode 100644
index 00000000000..d14af3e132f
--- /dev/null
+++ b/src/kernels/qsa_topk_parity.cpp
@@ -0,0 +1,139 @@
+// src/kernels/qsa_topk_parity.cpp - the QSA top-k the engine dispatches (qsa_block_topk) against the original kernel
+// (qsa_block_topk_ref): the selected cells must be identical (GPU, synthetic, no model).
+//
+// A case is a context under a capacity (the engine's --max-context; max_blocks = capacity / 4 + 2, and without an
+// active-block count the dispatch follows it), with consecutive queries at the context's end so that the tail block
+// holds 0 to 3 cells.  Three score sets per case: continuous, 64 levels (many ties at the threshold) and all equal
+// (the rule's ties go to the lowest index).  The dispatch is called as a decode window calls it (no block count) and as
+// the prompt path does (with the call's largest block count).  The reference and the dispatched kernel are also timed.
+//
+// Usage: qsa_topk_parity --selftest
+//        qsa_topk_parity CONTEXT [QUERIES=256] [REPS=10] [CAPACITY=CONTEXT] [COUNT=1]   (COUNT=0: no block count)
+#include "strata/kernels/qsa.hpp"
+#include "strata/kernels/qsa_select.hpp"
+
+#include <cuda_runtime.h>
+
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace k = strata::kernels;
+
+namespace {
+void ck(cudaError_t e, const char* w) {
+    if (e != cudaSuccess) { std::fprintf(stderr, "%s: %s\n", w, cudaGetErrorString(e)); std::exit(2); }
+}
+
+bool run_case(int64_t ctx, int64_t nq, int reps, int64_t capacity, bool counted) {
+    const k::QsaShapes s = k::qsa_real_shapes();
+    const int64_t max_blocks = capacity / s.idx_block + 2, cap = k::qsa_selection_width(k::kTopkMaxCells, s);
+    std::vector<int32_t> steps((size_t) (nq * k::kStepCount));
+    for (int64_t i = 0; i < nq; ++i) {
+        int32_t* st = steps.data() + i * k::kStepCount;
+        const int64_t pos = ctx - nq + i;
+        st[k::kStepPos] = (int32_t) pos;
+        st[k::kStepNKv] = (int32_t) (pos + 1);
+        st[k::kStepNBid] = (int32_t) ((pos + 1) / s.idx_block);
+        st[k::kStepWidth] = (int32_t) k::qsa_selection_width(pos + 1, s);
+    }
+    std::mt19937 rng((uint32_t) (ctx * 31 + capacity));
+    std::normal_distribution<float> nd(0.f, 1.f);
+    std::vector<float> scores((size_t) (nq * max_blocks)), tied(scores.size()), equal(scores.size(), 0.25f);
+    for (int64_t i = 0; i < nq; ++i) {
+        const int32_t* st = steps.data() + i * k::kStepCount;
+        float* row = scores.data() + i * max_blocks;
+        for (int64_t b = 0; b < max_blocks; ++b) row[b] = nd(rng);
+        // the tail block as the scorers leave it: far above the others when it holds cells
+        if (st[k::kStepNKv] % s.idx_block != 0) row[st[k::kStepNBid]] += 1e9f;
+        for (int64_t b = 0; b < max_blocks; ++b)
+            tied[(size_t) (i * max_blocks + b)] = row[b] > 1e8f ? row[b] : std::floor(row[b] * 8.0f) / 8.0f;   // ~64 levels
+    }
+    int32_t *d_steps = nullptr, *ids_ref = nullptr, *ids_new = nullptr;
+    float* d_scores = nullptr;
+    ck(cudaMalloc(&d_steps, steps.size() * 4), "malloc");
+    ck(cudaMalloc(&d_scores, scores.size() * 4), "malloc");
+    ck(cudaMalloc(&ids_ref, (size_t) (nq * cap) * 4), "malloc");
+    ck(cudaMalloc(&ids_new, (size_t) (nq * cap) * 4), "malloc");
+    ck(cudaMemcpy(d_steps, steps.data(), steps.size() * 4, cudaMemcpyHostToDevice), "upload");
+    const int64_t active = counted ? steps[(size_t) ((nq - 1) * k::kStepCount + k::kStepNBid)] + 1 : -1;
+    std::vector<int32_t> a((size_t) (nq * cap)), b(a.size());
+    auto same = [&](const std::vector<float>& sc) -> int64_t {
+        ck(cudaMemcpy(d_scores, sc.data(), sc.size() * 4, cudaMemcpyHostToDevice), "upload");
+        ck(cudaMemset(ids_ref, 0xff, a.size() * 4), "memset");
+        ck(cudaMemset(ids_new, 0xff, a.size() * 4), "memset");
+        k::qsa_block_topk_ref(d_scores, d_steps, nq, max_blocks, cap, s, ids_ref, nullptr);
+        k::qsa_block_topk(d_scores, d_steps, nq, max_blocks, cap, s, ids_new, nullptr, active);
+        ck(cudaDeviceSynchronize(), "sync");
+        ck(cudaMemcpy(a.data(), ids_ref, a.size() * 4, cudaMemcpyDeviceToHost), "down");
+        ck(cudaMemcpy(b.data(), ids_new, b.size() * 4, cudaMemcpyDeviceToHost), "down");
+        int64_t n = 0;
+        for (int64_t i = 0; i < nq; ++i) {
+            const int64_t w = steps[(size_t) (i * k::kStepCount + k::kStepWidth)];
+            n += std::equal(a.begin() + i * cap, a.begin() + i * cap + w, b.begin() + i * cap);
+        }
+        return n;
+    };
+    const int64_t same_tied = same(tied), same_equal = same(equal), same_cont = same(scores);   // d_scores: continuous
+    cudaEvent_t e0, e1;
+    ck(cudaEventCreate(&e0), "event");
+    ck(cudaEventCreate(&e1), "event");
+    auto timed = [&](auto f) {
+        ck(cudaEventRecord(e0), "record");
+        for (int r = 0; r < reps; ++r) f();
+        ck(cudaEventRecord(e1), "record");
+        ck(cudaEventSynchronize(e1), "time");
+        float ms = 0;
+        ck(cudaEventElapsedTime(&ms, e0, e1), "elapsed");
+        return ms / (float) reps;
+    };
+    const float t_ref = timed([&] { k::qsa_block_topk_ref(d_scores, d_steps, nq, max_blocks, cap, s, ids_ref, nullptr); });
+    const float t_new = timed([&] { k::qsa_block_topk(d_scores, d_steps, nq, max_blocks, cap, s, ids_new, nullptr, active); });
+    cudaEventDestroy(e0); cudaEventDestroy(e1);
+    cudaFree(d_steps); cudaFree(d_scores); cudaFree(ids_ref); cudaFree(ids_new);
+    const bool ok = same_cont == nq && same_tied == nq && same_equal == nq;
+    std::printf("%s context %lld under a capacity of %lld (%lld blocks), %lld queries %s: reference %.3f ms, "
+                "dispatched %.3f ms (%.1fx); identical ids: continuous %lld/%lld, 64 levels %lld/%lld, equal scores "
+                "%lld/%lld\n", ok ? "PASS" : "FAIL", (long long) ctx, (long long) capacity, (long long) max_blocks,
+                (long long) nq, counted ? "with their block count" : "without a block count", t_ref, t_new, t_ref / t_new,
+                (long long) same_cont, (long long) nq, (long long) same_tied,
+                (long long) nq, (long long) same_equal, (long long) nq);
+    return ok;
+}
+}  // namespace
+
+int main(int argc, char** argv) {
+    if (argc > 1 && std::strcmp(argv[1], "--selftest") == 0) {
+        // {context, capacity}: both sides of the register kernel's reach (33,792 blocks = 135,168 cells), short
+        // contexts under a long capacity (fewer blocks than the kernel's threads; a prompt batch below the dispatch's
+        // 4,608 blocks), and the long contexts themselves
+        const int64_t cases[][2] = {{9000, 9000},    {135160, 135160}, {135176, 135176}, {2100, 262144},
+                                    {9000, 262144},  {32768, 262144},  {262144, 262144}, {300001, 524288},
+                                    {524288, 524288}};
+        bool ok = true;
+        for (const auto& c : cases) {
+            ok = run_case(c[0], 8, 3, c[1], false) && ok;     // a decode window's call
+            ok = run_case(c[0], 64, 3, c[1], true) && ok;     // the prompt path's
+        }
+        std::printf("%s\n", ok ? "qsa_topk_parity: PASS" : "qsa_topk_parity: FAIL");
+        return ok ? 0 : 1;
+    }
+    if (argc < 2) {
+        std::fprintf(stderr, "usage: qsa_topk_parity --selftest | CONTEXT [QUERIES=256] [REPS=10] [CAPACITY=CONTEXT] "
+                             "[COUNT=1]\n");
+        return 2;
+    }
+    const int64_t ctx = std::atoll(argv[1]);
+    const int64_t nq = argc > 2 ? std::atoll(argv[2]) : 256;
+    const int reps = argc > 3 ? std::atoi(argv[3]) : 10;
+    const int64_t capacity = argc > 4 ? std::atoll(argv[4]) : ctx;
+    if (ctx < nq || nq <= 0 || reps <= 0 || capacity < ctx) {
+        std::fprintf(stderr, "qsa_topk_parity: CONTEXT >= QUERIES > 0, REPS > 0, CAPACITY >= CONTEXT\n");
+        return 2;
+    }
+    return run_case(ctx, nq, reps, capacity, argc <= 5 || std::atoi(argv[5]) != 0) ? 0 : 1;
+}

From 96ccd2a2a6da7022da7ba844d4b179c1e6d5fd56 Mon Sep 17 00:00:00 2001
From: maxfridbe <weepingangles@gmail.com>
Date: Sat, 3 Oct 2026 16:32:22 -0500
Subject: [PATCH 121/201] sycl: the stream-all prompt walk by default when the
 VRAM holds >90% of the experts

It hung on the B70 until the stager/PLE event-wait fixes; it runs since and reads
Coder prompts faster (40K 1,106 -> 1,160, 128K 897 -> 920, 128K k8v4 1,006 ->
1,041, 256K 760 -> 780 tok/s; same output). It copies every non-resident expert,
so with a big host tier it loses (IQ2_XS, a quarter in the RAM mirror: 2,184
tokens ~560 -> 254 tok/s): generate.cpp hands the non-resident share to the
prompt path, which walks only below 10%. STRATA_PREFILL_STREAM_ALL=1/0 forces it.

Docs: the 40K prompt breakdown, and why the cluster kernels and Q4_0 XMX prompt
attention are not worth porting here; the 2K "regression" was session variance
(old and new builds A/B'd: 784-799 tok/s both).

Tested on the B70: Coder 2,184-token and 40K, IQ2_XS 19- and 2,184-token
outputs identical; IQ2_XS 562 tok/s (stream-all off by its share), Coder 40K
1,160 tok/s.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Rb4SRxFuLpffQAAXBf4HxA
---
 docs/INTEL.md                 | 22 ++++++++++++++++++++++
 sycl/src/prefill/prefill.cpp  | 18 +++++++++++++-----
 sycl/src/program/generate.cpp |  5 +++++
 3 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/docs/INTEL.md b/docs/INTEL.md
index c386055ed65..38b331eed38 100644
--- a/docs/INTEL.md
+++ b/docs/INTEL.md
@@ -559,6 +559,28 @@ page-locked batches of 64, and a batch's copies run while the next one is read.
 (0.33 -> 1.34 GB/s); a whole Coder start from the engine's launch to its first token 82 s -> 26 s, the IQ2_XS
 120 s -> 41 s (its 8.2 GB host mirror is ~9 s of the rest). Output identical. `STRATA_FILL_SERIAL=1` is the old fill.
 
+**The stream-all prompt walk is back (2026-10-03).** It copies every expert the VRAM cache does not hold, layer by
+layer ahead of the compute, instead of only the routed ones. It hung on the B70 until the stager and PLE fixes of
+2026-10-02 and runs since. It now runs by default when the VRAM holds more than 90% of the (layer, expert) pairs;
+past that it would copy several times the routed experts (the IQ2_XS keeps a quarter of them in the RAM mirror: a
+2,184-token prompt fell from ~560 to 254 tok/s with it). `STRATA_PREFILL_STREAM_ALL=1` / `=0` force it on or off.
+Coder, outputs identical either way:
+
+| prompt | routed-only | stream-all |
+|---|---|---|
+| 40K int8 | 1,106 tok/s | 1,160 |
+| 128K int8, KV streaming | 897 | 920 |
+| 128K k8v4 | 1,006 | 1,041 |
+| 256K int8, KV streaming | 760 | 780 |
+
+Measured alongside: the 2,184-token prompt reads 784-799 tok/s on both the 0.1.35+PR and the 0.1.38 build (three
+runs each), so the 825 seen once on 0.1.35 was session variance, not a regression. The prompt path at 40K (Coder,
+GPU timeline): expert dequant 15.7%, expert GEMMs 23.4%, host grouping 6.5%, gather 5.7%, combine 2.4%, prompt
+attention 19.2%, QSA select 6.8%, DeltaNet recurrence 5.8%, hyper-connection reads 4.6%. Upstream's sm_90 cluster
+kernels (greedy sampler, QSA top-k) would save next to nothing here: the sampler reads ~6 MB a round against a 13 ms
+token. Q4_0 tensor-core prompt attention (#452) is not worth porting: the port's XMX prompt attention is 2-3x slower
+than the plain kernel it uses for every KV format.
+
 **The 0.1.38 merge (2026-10-03).** Upstream 0.1.35 -> 0.1.38 (83 commits) merged the seven PRs the port had taken
 early, so their header forks in `sycl/include` are gone; the merge base for the 3-way merge was the port's own "main +
 PRs" migration. New in the port with it: the DeltaNet output norm without its dead FP32 store, two prompt-path
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 6059597f17b..0c3882ea433 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -108,6 +108,8 @@ inline int64_t stream_all_min() {
     return v;
 }
 double g_pinned_share = 1.0;
+// SYCL port: the share of (layer, expert) pairs the VRAM cache does not hold (set_nonresident_share, from generate.cpp)
+double g_nonres_share = 0.0;
 // The streamed ring: 384 slots when (nearly) every streamed expert is DMA'd from pinned RAM - measured on Q2_0,
 // 8192-token chunks: 96 slots 1153 tok/s, 384 1294 (the next layer's experts arrive during its attention half) -
 // and 96 when a large share goes through host copies (IQ3_S on 64 GB, a third unpinned: 96 slots 1216, 256 1070 -
@@ -154,11 +156,16 @@ inline int ring_slots(size_t T) {
     const int pinned_ring = fused_ring() ? 1024 : 384;
     const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : (g_pinned_share >= 0.9 ? pinned_ring : 96);
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
-    // SYCL port: routed-only staging by default. The stream-all walk (every non-resident expert of every layer, copied
-    // ahead across layers) hangs on the B70 in its first large chunk - the copy engine stops on a barrier (xe resets bcs
-    // on kill) - with any ring size and either issuer, while the per-layer walk streams correctly (8,000 tokens with
-    // 4,051 streamed experts, 2026-09-30). STRATA_PREFILL_STREAM_ALL=1 restores it for debugging.
-    static const bool stream_all_ok = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_ALL"); return e && e[0] == '1'; }();
+    // SYCL port: the stream-all walk (every non-resident expert of every layer, copied ahead across layers) hung on the
+    // B70 in its first large chunk until 2026-10-02 - the stager's and the PLE upload's host waits on queue events,
+    // which the Level Zero v2 adapter did not survive (Stager::issued_one, ple_done_seq). It runs since, and reads a
+    // 40K prompt 4.8% faster than routed-only staging (1,159 vs 1,106 tok/s, same output): the default again.
+    // STRATA_PREFILL_STREAM_ALL=0 keeps routed-only staging, =1 forces the walk.
+    // It copies EVERY non-resident expert of a layer, routed or not: with a big host tier (the IQ2_XS: a quarter of the
+    // experts in the pinned mirror) that is several times the routed ones, and a 2,184-token prompt fell from ~570 to
+    // 254 tok/s. So by default only while the VRAM holds more than 90% of the pairs (the Coder, and its lent slots).
+    static const int stream_all_env = [] { const char* e = std::getenv("STRATA_PREFILL_STREAM_ALL"); return e ? (e[0] == '1' ? 1 : 0) : -1; }();
+    const bool stream_all_ok = stream_all_env == 1 || (stream_all_env == -1 && g_nonres_share < 0.10);
     if (!stream_all_ok) return STAGE;
     const int big = r < 16 ? 16 : r > ring_cap() ? ring_cap() : r;
     return (int64_t) T >= stream_all_min() ? big : STAGE;
@@ -1408,6 +1415,7 @@ catch (sycl::exception const &exc) {
 }
 
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
+void set_nonresident_share(double share) { g_nonres_share = share; }   // SYCL port (see ring_slots)
 void Prefill::set_ring_override(int slots) { g_ring_override = slots > 0 ? slots : 0; }
 double Prefill::pinned_share() { return g_pinned_share; }
 
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index acb6e6f4815..d082ab67d67 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -32,6 +32,7 @@
 #include "strata/core/coupled_draft.hpp"
 #include "strata/core/expert_source.hpp"
 #include "strata/core/gguf_expert_source.hpp"
+namespace strata::prefill { void set_nonresident_share(double share); }   // SYCL port: prefill.cpp
 #include "strata/kernels/resident_plan_mirror.hpp"
 #include "strata/core/pinned.hpp"
 #include "strata/core/remote_experts.hpp"
@@ -4508,6 +4509,10 @@ int main(int argc, char **argv) try {
                 if (srcp->pinned(l, e)) pinned += b;
             }
         strata::prefill::Prefill::set_pinned_share(total ? (double) pinned / (double) total : 1.0);
+        // SYCL port: the pairs outside the VRAM cache decide the prompt path's stream-all walk (prefill.cpp ring_slots)
+        int64_t nonres = 0;
+        for (const int32_t r : host_res) nonres += r < 0;
+        strata::prefill::set_nonresident_share(host_res.empty() ? 1.0 : (double) nonres / (double) host_res.size());
     }
     auto lend_slots = [&](int64_t c) -> int64_t {
         const uint64_t need = strata::prefill::Prefill::bytes_needed(g, ss, c);

From 5bd5eec85bc07dcb111cc1b3a64c7f1ebd19f1e0 Mon Sep 17 00:00:00 2001
From: Matt <matthewjt@gmail.com>
Date: Fri, 2 Oct 2026 14:27:12 -0400
Subject: [PATCH 122/201] Added gfx1031 experimental support

---
 cmake/hip_backend.cmake | 2 +-
 setup.py                | 8 +++++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/cmake/hip_backend.cmake b/cmake/hip_backend.cmake
index 255ee381f58..2e629e60ac6 100644
--- a/cmake/hip_backend.cmake
+++ b/cmake/hip_backend.cmake
@@ -11,7 +11,7 @@ endif()
 # report ran it (#311), the maintainers have not.
 set(_strata_hip_validated gfx1100 gfx1201)
 set(_strata_hip_community gfx1101 gfx1200)
-set(_strata_hip_unvalidated gfx1102 gfx1030)
+set(_strata_hip_unvalidated gfx1102 gfx1030 gfx1031)
 # CMake hands HIP a ';' list, but a -DCMAKE_HIP_ARCHITECTURES typed by hand (or ROCm's own Windows tooling) may use
 # spaces, which foreach(IN LISTS) would otherwise treat as one element.
 string(REPLACE " " ";" _strata_hip_norm "${CMAKE_HIP_ARCHITECTURES}")
diff --git a/setup.py b/setup.py
index f0d2a0d13b4..09aa165afa1 100644
--- a/setup.py
+++ b/setup.py
@@ -1203,7 +1203,8 @@ def cuda_lib_dirs():
                 "gfx1101": "https://rocm.nightlies.amd.com/v2/gfx110X-dgpu/",
                 "gfx1200": "https://rocm.nightlies.amd.com/v2/gfx120X-all/",
                 "gfx1201": "https://rocm.nightlies.amd.com/v2/gfx120X-all/",
-                "gfx1030": "https://rocm.nightlies.amd.com/v2/gfx103X-all/"}
+                "gfx1030": "https://rocm.nightlies.amd.com/v2/gfx103X-all/",
+                "gfx1031": "https://rocm.nightlies.amd.com/v2/gfx103X-all/"}
 ROCM_VERSION = os.environ.get("STRATA_ROCM_VERSION", "7.10.0a20251120")   # what Strata's HIP build was tested with
 ROCM_SYSTEM_MIN = (7, 0)       # an older system ROCm is passed over for the wheels (gfx1201 needs ROCm 6.4 or newer)
 AMD_ARCHS = ("gfx1100", "gfx1101", "gfx1200", "gfx1201", "gfx1030")
@@ -1211,9 +1212,10 @@ def cuda_lib_dirs():
              "gfx1101": "AMD Radeon RX 7800 XT / 7700 XT (gfx1101)",
              "gfx1200": "AMD Radeon RX 9060 series (gfx1200)",
              "gfx1201": "AMD Radeon RX 9070 series / AI PRO R9700 (gfx1201)",
-             "gfx1030": "AMD Radeon RX 6800 / 6900 series (gfx1030)"}
+             "gfx1030": "AMD Radeon RX 6800 / 6900 series (gfx1030)",
+             "gfx1031": "AMD Radeon RX 6700 XT series (gfx1031)"}
 AMD_CARDS = ("the RX 7900 XT / XTX (gfx1100), RX 7800 XT / 7700 XT (gfx1101), RX 9060 XT (gfx1200) and "
-             "RX 9070 / 9070 XT / Radeon AI PRO R9700 (gfx1201), and the RX 6800 / 6900 series (gfx1030, unvalidated)")
+             "RX 9070 / 9070 XT / Radeon AI PRO R9700 (gfx1201), RX 6800 / 6900 series (gfx1030, unvalidated), and the RX 6700 XT (gfx1031, unvalidated) ")
 
 
 def rocm_index(arch):

From 78bb6dccbf6c915a0805a6674694f63f40ac136f Mon Sep 17 00:00:00 2001
From: Matt <matthewjt@gmail.com>
Date: Fri, 2 Oct 2026 14:37:55 -0400
Subject: [PATCH 123/201] forgot one spot to add in setup.py

---
 setup.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/setup.py b/setup.py
index 09aa165afa1..78e701bd50a 100644
--- a/setup.py
+++ b/setup.py
@@ -1207,7 +1207,7 @@ def cuda_lib_dirs():
                 "gfx1031": "https://rocm.nightlies.amd.com/v2/gfx103X-all/"}
 ROCM_VERSION = os.environ.get("STRATA_ROCM_VERSION", "7.10.0a20251120")   # what Strata's HIP build was tested with
 ROCM_SYSTEM_MIN = (7, 0)       # an older system ROCm is passed over for the wheels (gfx1201 needs ROCm 6.4 or newer)
-AMD_ARCHS = ("gfx1100", "gfx1101", "gfx1200", "gfx1201", "gfx1030")
+AMD_ARCHS = ("gfx1100", "gfx1101", "gfx1200", "gfx1201", "gfx1030", "gfx1031")
 AMD_NAMES = {"gfx1100": "AMD Radeon RX 7900 series (gfx1100)",   # when sysfs has no product name
              "gfx1101": "AMD Radeon RX 7800 XT / 7700 XT (gfx1101)",
              "gfx1200": "AMD Radeon RX 9060 series (gfx1200)",

From 357723ab92f01f8b413dfad3182de59657c393af Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:26:57 +0200
Subject: [PATCH 124/201] setup: gfx1031 (RX 6700 XT) wording and a test (PR
 #524 follow-up)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                | 5 +++--
 tools/test_setup_amd.py | 3 +++
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/setup.py b/setup.py
index 78e701bd50a..a0df9a659dc 100644
--- a/setup.py
+++ b/setup.py
@@ -1196,7 +1196,7 @@ def cuda_lib_dirs():
 # ------------------------------------------------------------------------------------------------ AMD
 # The RX 7900 XT / XTX (gfx1100) and the RX 9070 series / Radeon AI PRO R9700 (gfx1201) on Linux, through the HIP
 # backend (docs/AMD_HIP.md); the RX 7800 XT / 7700 XT (gfx1101, #254) and the RX 9060 XT (gfx1200, #256) were run by
-# their owners; the RX 6800 / 6900 series (gfx1030, #311) runs but is unvalidated.  There is no ready-made AMD engine: ROCm comes from AMD's TheRock Python wheels into .venv (no sudo;
+# their owners; the RX 6800 / 6900 series (gfx1030, #311) and the RX 6700 XT (gfx1031, #524) run but are unvalidated.  There is no ready-made AMD engine: ROCm comes from AMD's TheRock Python wheels into .venv (no sudo;
 # a system ROCm 7 in /opt/rocm is used when it has hipcc and hipBLAS) and the engine is compiled here for the cards.
 # No images yet.
 ROCM_INDEXES = {"gfx1100": "https://rocm.nightlies.amd.com/v2/gfx110X-dgpu/",   # TheRock's wheels per GPU family
@@ -1215,7 +1215,8 @@ def cuda_lib_dirs():
              "gfx1030": "AMD Radeon RX 6800 / 6900 series (gfx1030)",
              "gfx1031": "AMD Radeon RX 6700 XT series (gfx1031)"}
 AMD_CARDS = ("the RX 7900 XT / XTX (gfx1100), RX 7800 XT / 7700 XT (gfx1101), RX 9060 XT (gfx1200) and "
-             "RX 9070 / 9070 XT / Radeon AI PRO R9700 (gfx1201), RX 6800 / 6900 series (gfx1030, unvalidated), and the RX 6700 XT (gfx1031, unvalidated) ")
+             "RX 9070 / 9070 XT / Radeon AI PRO R9700 (gfx1201), and the RX 6800 / 6900 series (gfx1030) and RX 6700 XT "
+             "(gfx1031, #524), both unvalidated")
 
 
 def rocm_index(arch):
diff --git a/tools/test_setup_amd.py b/tools/test_setup_amd.py
index f98f657b465..61a12237584 100644
--- a/tools/test_setup_amd.py
+++ b/tools/test_setup_amd.py
@@ -76,6 +76,9 @@ def test_rocm_index_per_family(self):
         self.assertTrue(setup.ROCM_INDEXES["gfx1200"].endswith("/gfx120X-all/"))
         self.assertEqual(setup.ROCM_INDEXES["gfx1101"], setup.ROCM_INDEXES["gfx1100"])
         self.assertEqual(setup.ROCM_INDEXES["gfx1200"], setup.ROCM_INDEXES["gfx1201"])
+        # #524: the RX 6700 XT (gfx1031) takes the RDNA2 wheels, as the RX 6800 / 6900 (gfx1030)
+        self.assertEqual(setup.ROCM_INDEXES["gfx1031"], setup.ROCM_INDEXES["gfx1030"])
+        self.assertIsNone(setup.amd_problem({"arch": "gfx1031"}))
 
 
 class GpuLists(unittest.TestCase):

From f2fb7c1a0ef678aeccd66171008873b86e2b1923 Mon Sep 17 00:00:00 2001
From: Rafa <2588276+rafatxf@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:58:27 +0000
Subject: [PATCH 125/201] sm_75: run the prompt path's BF16 products on the
 FP16 tensor cores

Turing has no BF16 tensor cores, so cublasGemmEx on CUDA_R_16BF inputs falls back to a SIMT fp32 kernel
(magma_sgemmEx). On an RTX 2080 Ti that was the largest kernel of the prompt path, 20 % of a 4K prompt:
the hyper-connection down / up projections, the router and indexer rows, PLE key / value.

Gemm::bf16 now converts the weight and the activations (in row slices, into the instance's own scratch)
BF16 -> FP16, which is exact for every value inside FP16's range, and runs the existing FP16 GEMM (fp32
accumulate) on the tensor cores. Single-row products keep cuBLAS's GEMV. STRATA_BF16_TC=0/1 overrides;
the default is on for sm_75 only, so other cards run exactly what they ran.

New test gemm_bf16_parity: Gemm::bf16 against cuBLAS's BF16 product over the prompt path's shapes,
within fp32 rounding (worst relative difference 1.7e-5 on sm_75; 0 with the path off).

Qwen3.8-Flash-Next Q2_0, RTX 2080 Ti, i7-6700: prefill 877 / 1134 / 1153 / 1116 / 1009 t/s at
4K / 16K / 32K / 64K / 128K -> 1020 / 1337 / 1366 / 1312 / 1166.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 CMakeLists.txt                  |   5 ++
 include/strata/prefill/gemm.hpp |   6 ++
 src/prefill/gemm.cu             |  58 ++++++++++++
 src/prefill/gemm_bf16_parity.cu | 153 ++++++++++++++++++++++++++++++++
 4 files changed, 222 insertions(+)
 create mode 100644 src/prefill/gemm_bf16_parity.cu

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 347d2ec7ca2..c25a6feb510 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -584,6 +584,11 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
     add_executable(gdn_rec_parity src/prefill/gdn_rec_parity.cu)
     target_link_libraries(gdn_rec_parity PRIVATE ${_strata_gpu_runtime_target})
     add_test(NAME gdn_rec_parity COMMAND gdn_rec_parity)
+    # the prompt path's BF16 products against cuBLAS's own BF16 GEMM, within fp32 rounding (sm_75 runs them on the
+    # FP16 tensor cores; GPU, synthetic, no model; --bench adds timings)
+    add_executable(gemm_bf16_parity src/prefill/gemm_bf16_parity.cu)
+    target_link_libraries(gemm_bf16_parity PRIVATE strata_prefill )
+    add_test(NAME gemm_bf16_parity COMMAND gemm_bf16_parity)
   endif()
   # native_expert_grouped's group stride and fused SwiGLU + q8_1, bitwise vs the launches before them (GPU, synthetic,
   # no model; --bench adds v1/new timings of a window's 48 calls in a graph)
diff --git a/include/strata/prefill/gemm.hpp b/include/strata/prefill/gemm.hpp
index c9ddc6f4dc3..b2cc9933b9b 100644
--- a/include/strata/prefill/gemm.hpp
+++ b/include/strata/prefill/gemm.hpp
@@ -26,6 +26,7 @@ class Gemm {
                        std::string& err);
 
     /// Y[T, N] (fp32, row stride ldy) = X[T, K] (bf16, row-major) . W[N, K]^T (bf16, row-major).  `beta` = 1 adds.
+    /// sm_75 (no BF16 tensor cores) converts both to FP16 and runs the FP16 tensor-core GEMM (STRATA_BF16_TC).
     void bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy = 0,
               float beta = 0.0f);
 
@@ -52,6 +53,11 @@ class Gemm {
     void* workspace_ = nullptr;
     bool external_ = false;
     void* hipblaslt_state_ = nullptr;
+    // sm_75: FP16 copies of a BF16 product's weight and activation slice (Gemm::bf16, STRATA_BF16_TC)
+    uint16_t* tc_w_ = nullptr;
+    int64_t tc_w_elems_ = 0;
+    uint16_t* tc_x_ = nullptr;
+    int64_t tc_x_elems_ = 0;
 };
 
 
diff --git a/src/prefill/gemm.cu b/src/prefill/gemm.cu
index bb6ef045b81..dd8c9cd7d01 100644
--- a/src/prefill/gemm.cu
+++ b/src/prefill/gemm.cu
@@ -3,8 +3,11 @@
 #include "strata/kernels/dequant_bf16.hpp"
 
 #include <cublas_v2.h>
+#include <cuda_fp16.h>
 #include <cuda_runtime.h>
 
+#include <algorithm>
+
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
 // The HIP compatibility shim maps CUDA shuffle spellings to Strata helpers.
 // hipBLASLt's public headers declare native HIP shuffle functions, so keep
@@ -298,6 +301,8 @@ Gemm::~Gemm() {
     delete static_cast<HipLtState*>(hipblaslt_state_);
 #endif
     if (handle_) cublasDestroy((cublasHandle_t) handle_);
+    if (tc_w_) cudaFree(tc_w_);
+    if (tc_x_) cudaFree(tc_x_);
     if (!external_) {
         if (scratch_) cudaFree(scratch_);
         if (workspace_) cudaFree(workspace_);
@@ -372,6 +377,45 @@ bool Gemm::init(void* stream, int64_t scratch_elems, std::string& err) {
     return true;
 }
 
+// ---- sm_75: BF16 GEMMs through the FP16 tensor cores ---------------------------------------------------------------
+// Turing has no BF16 tensor cores: cublasGemmEx on CUDA_R_16BF inputs falls back to a SIMT fp32 kernel
+// (magma_sgemmEx) that ran at ~13 TFLOPS, a fifth of the 4K prompt.  BF16 -> FP16 is exact for every value inside
+// FP16's range (the 7-bit mantissa fits in 10 bits); weights and normalized activations sit there.  With
+// STRATA_BF16_TC (default on for sm_75), the weight is converted once per call and the activations in row slices,
+// into the instance's own scratch, and the product runs as the FP16 GEMM (fp32 accumulate) on the tensor cores.
+namespace {
+__global__ void bf16_to_f16_kernel(const uint16_t* __restrict__ in, __half* __restrict__ out, int64_t n) {
+    const int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x;
+    if (i < n) out[i] = __float2half_rn(__uint_as_float((uint32_t) in[i] << 16));
+}
+void bf16_to_f16(const uint16_t* in, uint16_t* out, int64_t n, cudaStream_t st) {
+    if (n <= 0) return;
+    bf16_to_f16_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, st>>>(in, reinterpret_cast<__half*>(out), n);
+}
+int bf16_tc_mode() {
+    static int mode = [] {
+        const char* v = std::getenv("STRATA_BF16_TC");
+        if (v != nullptr && v[0] != '\0') return std::atoi(v) != 0 ? 1 : 0;
+        int dev = 0, maj = 0, min = 0;
+        cudaGetDevice(&dev);
+        cudaDeviceGetAttribute(&maj, cudaDevAttrComputeCapabilityMajor, dev);
+        cudaDeviceGetAttribute(&min, cudaDevAttrComputeCapabilityMinor, dev);
+        return (maj == 7 && min == 5) ? 1 : 0;
+    }();
+    return mode;
+}
+bool grow(uint16_t*& p, int64_t& have, int64_t want) {
+    if (have >= want) return true;
+    if (p) cudaFree(p);
+    p = nullptr;
+    have = 0;
+    if (cudaMalloc((void**) &p, (size_t) want * 2) != cudaSuccess) { cudaGetLastError(); p = nullptr; return false; }
+    have = want;
+    return true;
+}
+constexpr int64_t kXSliceElems = 16ll << 20;   // 32 MiB of FP16 activations per slice
+}  // namespace
+
 void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy,
                 float beta) {
     if (T <= 0 || N <= 0) return;
@@ -383,6 +427,20 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
         STRATA_ABSORB_HIPBLAS_STICKY("hipBLASLt bf16");
         return;
     }
+#endif
+#if !defined(__HIPCC__)
+    if (bf16_tc_mode() && N > 1) {   // a single output row stays cuBLAS's GEMV, faster than the conversions
+        const int64_t x_rows = std::max<int64_t>(1, std::min<int64_t>(T, kXSliceElems / K));
+        if (grow(tc_w_, tc_w_elems_, N * K) && grow(tc_x_, tc_x_elems_, x_rows * K)) {
+            bf16_to_f16(W, tc_w_, N * K, (cudaStream_t) stream_);
+            for (int64_t t0 = 0; t0 < T; t0 += x_rows) {
+                const int64_t n = std::min<int64_t>(x_rows, T - t0);
+                bf16_to_f16(X + t0 * K, tc_x_, n * K, (cudaStream_t) stream_);
+                f16(tc_x_, tc_w_, Y + t0 * ldy, n, N, K, ldy, beta);
+            }
+            return;
+        }
+    }
 #endif
     // Column-major view: Y^T[N, T] = W[N, K] (stored K x N col-major, transposed) . X^T[K, T].
     ck(cublasGemmEx((cublasHandle_t) handle_, CUBLAS_OP_T, CUBLAS_OP_N, (int) N, (int) T, (int) K, &alpha, W,
diff --git a/src/prefill/gemm_bf16_parity.cu b/src/prefill/gemm_bf16_parity.cu
new file mode 100644
index 00000000000..89bd8a25eb3
--- /dev/null
+++ b/src/prefill/gemm_bf16_parity.cu
@@ -0,0 +1,153 @@
+// src/prefill/gemm_bf16_parity.cu - Gemm::bf16 against cuBLAS's own BF16 product (GPU, synthetic, no model).
+//
+// On sm_75 (no BF16 tensor cores) Gemm::bf16 converts the weight and the activations to FP16 and runs the FP16
+// tensor-core GEMM (STRATA_BF16_TC, default on there); everywhere else it is the cuBLAS BF16 call itself.  This
+// checks the result against cublasGemmEx on the same BF16 inputs, within fp32-accumulation rounding, over the prompt
+// path's shapes: the hyper-connection down / up projections, the router and indexer rows, the PLE value matrix, a T
+// large enough to slice the activations, beta = 1 accumulation (the bf16x2 low parts) and an output row stride wider
+// than N.  --bench adds the time of each against the cuBLAS BF16 product.
+#include "strata/prefill/gemm.hpp"
+
+#include <cublas_v2.h>
+#include <cuda_runtime.h>
+
+#include <algorithm>
+#include <chrono>
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <string>
+#include <vector>
+
+namespace {
+
+uint16_t to_bf16(float f) {   // round to nearest even
+    uint32_t u;
+    std::memcpy(&u, &f, 4);
+    u += 0x7fffu + ((u >> 16) & 1u);
+    return (uint16_t) (u >> 16);
+}
+
+bool ok_or(cudaError_t e, const char* what) {
+    if (e != cudaSuccess) std::printf("FAIL: %s: %s\n", what, cudaGetErrorString(e));
+    return e == cudaSuccess;
+}
+
+struct Shape {
+    int64_t T, N, K, ldy;
+    const char* what;
+};
+
+}  // namespace
+
+int main(int argc, char** argv) {
+    const bool bench = argc > 1 && std::string(argv[1]) == "--bench";
+    int dev = 0, maj = 0, min = 0;
+    cudaGetDevice(&dev);
+    cudaDeviceGetAttribute(&maj, cudaDevAttrComputeCapabilityMajor, dev);
+    cudaDeviceGetAttribute(&min, cudaDevAttrComputeCapabilityMinor, dev);
+    std::printf("gemm_bf16_parity: compute capability %d.%d\n", maj, min);
+
+    cudaStream_t st = nullptr;
+    if (!ok_or(cudaStreamCreate(&st), "stream")) return 1;
+    strata::prefill::Gemm gemm;
+    std::string err;
+    if (!gemm.init(st, 0, err)) { std::printf("FAIL: %s\n", err.c_str()); return 1; }
+    cublasHandle_t h = nullptr;
+    if (cublasCreate(&h) != CUBLAS_STATUS_SUCCESS) { std::printf("FAIL: cublasCreate\n"); return 1; }
+    cublasSetStream(h, st);
+
+    const Shape shapes[] = {
+        {4096, 320, 10240, 0, "hc down (activations sliced)"},
+        {4096, 10240, 320, 0, "hc up"},
+        {777, 2560, 2560, 0, "PLE value"},
+        {512, 512, 2560, 0, "router / indexer q"},
+        {300, 4, 10240, 0, "hc inject"},
+        {2048, 1, 2560, 0, "single row"},
+        {333, 128, 2560, 136, "row stride wider than N"},
+    };
+    std::mt19937 rng(1234);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+    int failures = 0;
+    for (const Shape& s : shapes) {
+        const int64_t ldy = s.ldy > 0 ? s.ldy : s.N;
+        std::vector<uint16_t> x((size_t) (s.T * s.K)), xlo(x.size()), w((size_t) (s.N * s.K));
+        for (size_t i = 0; i < x.size(); ++i) {
+            const float v = 3.0f * nd(rng);          // activations: normalized, a few units
+            x[i] = to_bf16(v);
+            xlo[i] = to_bf16(1e-3f * nd(rng));       // a bf16x2 low part
+        }
+        for (auto& v : w) v = to_bf16(0.02f * nd(rng));
+        uint16_t *dx = nullptr, *dxlo = nullptr, *dw = nullptr;
+        float *dy = nullptr, *dr = nullptr;
+        const size_t ybytes = (size_t) (s.T * ldy) * 4;
+        bool ok = ok_or(cudaMalloc((void**) &dx, x.size() * 2), "x") && ok_or(cudaMalloc((void**) &dxlo, x.size() * 2), "xlo") &&
+                  ok_or(cudaMalloc((void**) &dw, w.size() * 2), "w") && ok_or(cudaMalloc((void**) &dy, ybytes), "y") &&
+                  ok_or(cudaMalloc((void**) &dr, ybytes), "ref");
+        if (!ok) return 1;
+        cudaMemcpy(dx, x.data(), x.size() * 2, cudaMemcpyHostToDevice);
+        cudaMemcpy(dxlo, xlo.data(), xlo.size() * 2, cudaMemcpyHostToDevice);
+        cudaMemcpy(dw, w.data(), w.size() * 2, cudaMemcpyHostToDevice);
+        cudaMemset(dy, 0, ybytes);
+        cudaMemset(dr, 0, ybytes);
+
+        // the product under test: X . W^T, then the low part added with beta = 1
+        gemm.bf16(dx, dw, dy, s.T, s.N, s.K, ldy);
+        gemm.bf16(dxlo, dw, dy, s.T, s.N, s.K, ldy, 1.0f);
+        // the reference: cuBLAS on the BF16 inputs, the same two calls
+        const float one = 1.0f, zero = 0.0f;
+        auto ref = [&](const uint16_t* X, float beta) {
+            return cublasGemmEx(h, CUBLAS_OP_T, CUBLAS_OP_N, (int) s.N, (int) s.T, (int) s.K, &one, dw, CUDA_R_16BF,
+                                (int) s.K, X, CUDA_R_16BF, (int) s.K, &beta, dr, CUDA_R_32F, (int) ldy,
+                                CUBLAS_COMPUTE_32F, CUBLAS_GEMM_DEFAULT);
+        };
+        if (ref(dx, zero) != CUBLAS_STATUS_SUCCESS || ref(dxlo, one) != CUBLAS_STATUS_SUCCESS) {
+            std::printf("FAIL: reference cublasGemmEx\n");
+            return 1;
+        }
+        if (!ok_or(cudaStreamSynchronize(st), "sync")) return 1;
+        std::vector<float> y((size_t) (s.T * ldy)), r(y.size());
+        cudaMemcpy(y.data(), dy, ybytes, cudaMemcpyDeviceToHost);
+        cudaMemcpy(r.data(), dr, ybytes, cudaMemcpyDeviceToHost);
+        double worst = 0.0, mag = 1e-30;
+        int bad = 0;
+        for (int64_t t = 0; t < s.T; ++t)
+            for (int64_t c = 0; c < s.N; ++c) {
+                const float a = y[(size_t) (t * ldy + c)], b = r[(size_t) (t * ldy + c)];
+                if (!std::isfinite(a)) ++bad;
+                worst = std::max(worst, (double) std::fabs(a - b));
+                mag = std::max(mag, (double) std::fabs(b));
+            }
+        // the untouched columns of a wider row stride stay as they were
+        for (int64_t t = 0; t < s.T && ldy > s.N; ++t)
+            for (int64_t c = s.N; c < ldy; ++c)
+                if (y[(size_t) (t * ldy + c)] != 0.0f) ++bad;
+        const bool pass = bad == 0 && worst <= 1e-4 * mag;
+        if (!pass) ++failures;
+        std::printf("  %-32s T %5lld N %5lld K %5lld ldy %5lld: worst |diff| %.3e of max |ref| %.3e (rel %.2e) %s\n",
+                    s.what, (long long) s.T, (long long) s.N, (long long) s.K, (long long) ldy, worst, mag, worst / mag,
+                    pass ? "pass" : "FAIL");
+
+        if (bench) {
+            auto time = [&](auto&& f) {
+                for (int i = 0; i < 3; ++i) f();
+                cudaStreamSynchronize(st);
+                const auto t0 = std::chrono::steady_clock::now();
+                for (int i = 0; i < 20; ++i) f();
+                cudaStreamSynchronize(st);
+                return std::chrono::duration<double, std::micro>(std::chrono::steady_clock::now() - t0).count() / 20;
+            };
+            const double us_gemm = time([&] { gemm.bf16(dx, dw, dy, s.T, s.N, s.K, ldy); });
+            const double us_ref = time([&] { ref(dx, zero); });
+            std::printf("      bench: Gemm::bf16 %9.1f us   cuBLAS BF16 %9.1f us   (%.2fx)\n", us_gemm, us_ref,
+                        us_ref / us_gemm);
+        }
+        cudaFree(dx); cudaFree(dxlo); cudaFree(dw); cudaFree(dy); cudaFree(dr);
+    }
+    cublasDestroy(h);
+    cudaStreamDestroy(st);
+    std::printf("gemm_bf16_parity: %d failures\n", failures);
+    return failures == 0 ? 0 : 1;
+}

From 3f81bcefd2ed1ddd87efdb5f9dc3f8bffee1b2d4 Mon Sep 17 00:00:00 2001
From: Rafa <2588276+rafatxf@users.noreply.github.com>
Date: Sat, 3 Oct 2026 20:21:17 +0000
Subject: [PATCH 126/201] BF16 tensor-core path: default on for all of compute
 capability 7.x (Volta too)

Volta has FP16 tensor cores and no BF16 ones as well, so cuBLAS takes the same SIMT path for BF16 products there.
Suggested in review. Not measured on sm_70; STRATA_BF16_TC=0 turns it off.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
---
 CMakeLists.txt                  |  2 +-
 include/strata/prefill/gemm.hpp |  4 ++--
 src/prefill/gemm.cu             | 13 ++++++-------
 src/prefill/gemm_bf16_parity.cu |  2 +-
 4 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c25a6feb510..daef8bfe785 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -584,7 +584,7 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
     add_executable(gdn_rec_parity src/prefill/gdn_rec_parity.cu)
     target_link_libraries(gdn_rec_parity PRIVATE ${_strata_gpu_runtime_target})
     add_test(NAME gdn_rec_parity COMMAND gdn_rec_parity)
-    # the prompt path's BF16 products against cuBLAS's own BF16 GEMM, within fp32 rounding (sm_75 runs them on the
+    # the prompt path's BF16 products against cuBLAS's own BF16 GEMM, within fp32 rounding (sm_7x runs them on the
     # FP16 tensor cores; GPU, synthetic, no model; --bench adds timings)
     add_executable(gemm_bf16_parity src/prefill/gemm_bf16_parity.cu)
     target_link_libraries(gemm_bf16_parity PRIVATE strata_prefill )
diff --git a/include/strata/prefill/gemm.hpp b/include/strata/prefill/gemm.hpp
index b2cc9933b9b..6915ee69155 100644
--- a/include/strata/prefill/gemm.hpp
+++ b/include/strata/prefill/gemm.hpp
@@ -26,7 +26,7 @@ class Gemm {
                        std::string& err);
 
     /// Y[T, N] (fp32, row stride ldy) = X[T, K] (bf16, row-major) . W[N, K]^T (bf16, row-major).  `beta` = 1 adds.
-    /// sm_75 (no BF16 tensor cores) converts both to FP16 and runs the FP16 tensor-core GEMM (STRATA_BF16_TC).
+    /// sm_7x (no BF16 tensor cores) converts both to FP16 and runs the FP16 tensor-core GEMM (STRATA_BF16_TC).
     void bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy = 0,
               float beta = 0.0f);
 
@@ -53,7 +53,7 @@ class Gemm {
     void* workspace_ = nullptr;
     bool external_ = false;
     void* hipblaslt_state_ = nullptr;
-    // sm_75: FP16 copies of a BF16 product's weight and activation slice (Gemm::bf16, STRATA_BF16_TC)
+    // sm_7x: FP16 copies of a BF16 product's weight and activation slice (Gemm::bf16, STRATA_BF16_TC)
     uint16_t* tc_w_ = nullptr;
     int64_t tc_w_elems_ = 0;
     uint16_t* tc_x_ = nullptr;
diff --git a/src/prefill/gemm.cu b/src/prefill/gemm.cu
index dd8c9cd7d01..babeee80fe2 100644
--- a/src/prefill/gemm.cu
+++ b/src/prefill/gemm.cu
@@ -377,11 +377,11 @@ bool Gemm::init(void* stream, int64_t scratch_elems, std::string& err) {
     return true;
 }
 
-// ---- sm_75: BF16 GEMMs through the FP16 tensor cores ---------------------------------------------------------------
-// Turing has no BF16 tensor cores: cublasGemmEx on CUDA_R_16BF inputs falls back to a SIMT fp32 kernel
-// (magma_sgemmEx) that ran at ~13 TFLOPS, a fifth of the 4K prompt.  BF16 -> FP16 is exact for every value inside
+// ---- sm_7x: BF16 GEMMs through the FP16 tensor cores ---------------------------------------------------------------
+// Turing and Volta have no BF16 tensor cores: cublasGemmEx on CUDA_R_16BF inputs falls back to a SIMT fp32 kernel
+// (magma_sgemmEx), a fifth of a 4K prompt on an RTX 2080 Ti.  BF16 -> FP16 is exact for every value inside
 // FP16's range (the 7-bit mantissa fits in 10 bits); weights and normalized activations sit there.  With
-// STRATA_BF16_TC (default on for sm_75), the weight is converted once per call and the activations in row slices,
+// STRATA_BF16_TC (default on for compute capability 7.x), the weight is converted once per call and the activations in row slices,
 // into the instance's own scratch, and the product runs as the FP16 GEMM (fp32 accumulate) on the tensor cores.
 namespace {
 __global__ void bf16_to_f16_kernel(const uint16_t* __restrict__ in, __half* __restrict__ out, int64_t n) {
@@ -396,11 +396,10 @@ int bf16_tc_mode() {
     static int mode = [] {
         const char* v = std::getenv("STRATA_BF16_TC");
         if (v != nullptr && v[0] != '\0') return std::atoi(v) != 0 ? 1 : 0;
-        int dev = 0, maj = 0, min = 0;
+        int dev = 0, maj = 0;
         cudaGetDevice(&dev);
         cudaDeviceGetAttribute(&maj, cudaDevAttrComputeCapabilityMajor, dev);
-        cudaDeviceGetAttribute(&min, cudaDevAttrComputeCapabilityMinor, dev);
-        return (maj == 7 && min == 5) ? 1 : 0;
+        return maj == 7 ? 1 : 0;   // Volta (sm_70, sm_72) and Turing (sm_75)
     }();
     return mode;
 }
diff --git a/src/prefill/gemm_bf16_parity.cu b/src/prefill/gemm_bf16_parity.cu
index 89bd8a25eb3..00d3d0642b8 100644
--- a/src/prefill/gemm_bf16_parity.cu
+++ b/src/prefill/gemm_bf16_parity.cu
@@ -1,6 +1,6 @@
 // src/prefill/gemm_bf16_parity.cu - Gemm::bf16 against cuBLAS's own BF16 product (GPU, synthetic, no model).
 //
-// On sm_75 (no BF16 tensor cores) Gemm::bf16 converts the weight and the activations to FP16 and runs the FP16
+// On sm_7x (Volta / Turing, no BF16 tensor cores) Gemm::bf16 converts the weight and the activations to FP16 and runs the FP16
 // tensor-core GEMM (STRATA_BF16_TC, default on there); everywhere else it is the cuBLAS BF16 call itself.  This
 // checks the result against cublasGemmEx on the same BF16 inputs, within fp32-accumulation rounding, over the prompt
 // path's shapes: the hyper-connection down / up projections, the router and indexer rows, the PLE value matrix, a T

From dd0ce1ee6037fd059844dedfa15dde8f23261a36 Mon Sep 17 00:00:00 2001
From: Demetree Kallergis <1394829+demetree@users.noreply.github.com>
Date: Thu, 1 Oct 2026 12:55:30 -0230
Subject: [PATCH 127/201] iq_avx2: build the IQ2 sign table without a variable
 shift

A namespace-scope static initializer shifted a byte into place with << (8 * k), which is a
variable shift.  MSVC compiling this file with /arch:AVX2 emits BMI2 shlx for that - it assumes
anything with AVX2 also has BMI2, true from Haswell on and false of everything before it.

Because the table is static, the constructor runs before main(), so this faulted at PROCESS START:
strata.exe exited 0xC000001D with no output at all, not even for --help.  One shlx in the whole
linked binary was enough to make the engine unstartable on any pre-Haswell CPU under MSVC.

Storing the byte directly is the same 64-bit value on the little-endian targets this file is for,
and leaves no variable shift for the compiler to widen.

Found by building the engine for sm_61 on a Sandy Bridge-E (Xeon E5-2680) with
STRATA_EXPERIMENTAL_SM60=ON, which 0.1.31 added (#236).  Verified by disassembly: no shlx/shrx/sarx/
mulx/andn/bzhi/pext/pdep anywhere in strata.exe afterwards, and --help now runs.

This is independent of any AVX1 work - it is a plain startup crash on the CPU this was built on.

(cherry picked from commit 3fcaf03840674d644d26f4f292ee76a18846e807)
---
 src/kernels/cpu/iq_avx2.cpp | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/src/kernels/cpu/iq_avx2.cpp b/src/kernels/cpu/iq_avx2.cpp
index 09d178db6b7..ef6414ff16f 100644
--- a/src/kernels/cpu/iq_avx2.cpp
+++ b/src/kernels/cpu/iq_avx2.cpp
@@ -57,13 +57,25 @@ inline __m256i sc32(int s) { return _mm256_set1_epi16(s); }
 // = 0xFF when bit k of ksigns_iq2xs[i] is set, 0x01 otherwise.  With this a whole 32-value sign vector
 // is four scalar loads and a set_epi64x - no ksigns byte packing chain and no bit_selector expansion.
 // Built once at load time from the shared ggml-common table so it can never drift from it.
+//
+// The byte is WRITTEN, not shifted into place.  `<< (8 * k)` is a VARIABLE shift, and MSVC compiling
+// this file with /arch:AVX2 emits BMI2 `shlx` for it - it assumes that anything with AVX2 also has
+// BMI2, which is true of Haswell and every later core, and false of everything before it.  Because
+// `even_signs` is a namespace-scope static, that constructor runs BEFORE main(), so the fault happens
+// at process start rather than at first use: strata.exe exited 0xC000001D (illegal instruction) with
+// no output at all, not even for --help.  One `shlx` in the whole binary was enough.
+//
+// Storing the byte directly gives the same 64-bit value on the little-endian targets this file is
+// for (byte k of the OR of `0xFF << 8k` / `0x01 << 8k` is exactly that byte and nothing else), and it
+// contains no variable shift for the compiler to widen.
 struct EvenSigns {
     uint64_t v[128];
     EvenSigns() {
         for (int i = 0; i < 128; ++i) {
-            uint64_t r = 0;
-            for (int k = 0; k < 8; ++k)
-                r |= (uint64_t) (((ksigns_iq2xs[i] >> k) & 1) ? 0xFF : 0x01) << (8 * k);
+            uint8_t b[8];
+            for (int k = 0; k < 8; ++k) b[k] = ((ksigns_iq2xs[i] >> k) & 1) ? 0xFF : 0x01;
+            uint64_t r;
+            std::memcpy(&r, b, sizeof(r));
             v[i] = r;
         }
     }

From ab8729e49fdf3e03de671e623727c6cc02693327 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:27:21 +0200
Subject: [PATCH 128/201] setup: --backend sycl, the Intel Arc engine
 (experimental, built from source; sycl/setup_intel.py)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py | 33 +++++++++++++++++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/setup.py b/setup.py
index f0d2a0d13b4..c61b488b268 100644
--- a/setup.py
+++ b/setup.py
@@ -3203,6 +3203,32 @@ def resolve_rope(ctx: int, scaling, scale, trained: int = 262144):
 
 
 # ------------------------------------------------------------------------------------------------ main
+def sycl_setup(argv) -> int:
+    """--backend sycl: the Intel Arc engine (the SYCL port in sycl/, PR #423), experimental. There is no ready-made
+    Intel engine: it is compiled from source on the PC (docs/INTEL_ARC.md), then sycl/setup_intel.py runs this setup
+    with the Intel steps swapped in. Nothing of the CUDA / HIP paths is used or changed."""
+    say()
+    warn("Intel Arc (--backend sycl) is EXPERIMENTAL: a community port of the engine, not tested by the Strata "
+         "maintainers (no Intel card here). Expect rough edges; issues with your card and driver versions help.")
+    if WIN:
+        fail("the Intel Arc engine has no Windows setup yet (no ready-made Intel engine either)",
+             "run it on Linux, or in WSL2 Ubuntu with Intel's GPU driver: docs/INTEL_ARC.md")
+    say("  There is no ready-made Intel engine: it is built from source with Intel oneAPI (icpx + oneMKL),")
+    say("  docs/INTEL_ARC.md. Setup continues with sycl/setup_intel.py.")
+    rest, skip = [], False
+    for x in argv:                                     # setup_intel.py drives this setup through its AMD path
+        if skip:
+            skip = False
+        elif x == "--backend":
+            skip = True
+        elif not x.startswith("--backend="):
+            rest.append(x)
+    script = ROOT / "sycl" / "setup_intel.py"
+    if not script.exists():
+        fail(f"{script} is missing", "use a full Strata checkout (git clone) - docs/INTEL_ARC.md")
+    return subprocess.call([sys.executable, str(script), *rest])
+
+
 def main() -> int:
     ap = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)
     ap.add_argument("--family", choices=list(FAMILIES), help="qwen = Qwen3.8-Flash-Next, swift = Swift 1.5")
@@ -3280,11 +3306,14 @@ def main() -> int:
     ap.add_argument("--kv-streaming", choices=["auto", "on", "off"], default="auto",
                     help="from a 64K context: keep the KV cache in RAM and only the attention's window in VRAM (more "
                          "experts fit on the GPU); auto: when the RAM has room for it")
-    ap.add_argument("--backend", choices=["cuda", "hip"],
+    ap.add_argument("--backend", choices=["cuda", "hip", "sycl"],
                     help="cuda = NVIDIA (default), hip = AMD RX 7900 / 7800 / 7700 XT, RX 9060 XT / 9070 / AI PRO R9700 on "
-                         "Linux or Windows (chosen by itself when the PC has no NVIDIA card Strata can use)")
+                         "Linux or Windows (chosen by itself when the PC has no NVIDIA card Strata can use), "
+                         "sycl = Intel Arc, EXPERIMENTAL: Linux, built from source (docs/INTEL_ARC.md)")
     ap.add_argument("--skip-build", action="store_true", help=argparse.SUPPRESS)
     a = ap.parse_args()
+    if a.backend == "sycl":                            # Intel Arc: the SYCL port's own setup (sycl/setup_intel.py)
+        return sycl_setup(sys.argv[1:])
     if a.resident_budget_gib is not None and not a.resident_budget_gib > 0:
         ap.error("--resident-budget-gib takes a number of GiB above 0, e.g. --resident-budget-gib 32")
     if a.vision_tokens is not None and a.vision_tokens < 1:

From cfd3b7225b937251933eb8ceea06a96a5c2ac945 Mon Sep 17 00:00:00 2001
From: Stuart Chapin <stuchapin@gmail.com>
Date: Sat, 3 Oct 2026 07:45:42 -0700
Subject: [PATCH 129/201] perf(cuda,decode): zero-doorbell verify graph,
 sub-warp expert packing, shared-mem staging, and batched PLE/MTP

---
 include/strata/core/mtp.hpp                  |   2 +
 include/strata/core/verify.hpp               |   8 +
 include/strata/kernels/cpu/expert_layout.hpp |   2 +
 include/strata/kernels/elementwise.hpp       |   4 +-
 include/strata/kernels/ngram.hpp             |   3 +
 include/strata/kernels/ple.hpp               |   4 +
 include/strata/kernels/shared_expert.hpp     |   2 +
 src/core/expert_source.cpp                   |  35 +-
 src/core/mtp.cpp                             | 141 +++++--
 src/core/verify.cpp                          | 350 ++++++++++++------
 src/kernels/cpu/expert_layout.cpp            |  32 ++
 src/kernels/cpu/native_expert.cpp            |   4 +-
 src/kernels/cuda/elementwise.cu              |  33 +-
 src/kernels/cuda/fused_gr.cu                 |  74 ++--
 src/kernels/cuda/iq_kernels.cu               | 370 ++++++++++++++++---
 src/kernels/cuda/native_mmvq.cu              |   7 +-
 src/kernels/cuda/ple.cu                      |  18 +
 src/kernels/cuda/shared_expert.cu            | 135 +++++--
 src/kernels/cuda/verify_kernels.cu           | 209 ++++++++---
 src/kernels/ngram.cpp                        |  69 ++++
 src/program/generate.cpp                     |  17 +-
 21 files changed, 1197 insertions(+), 322 deletions(-)

diff --git a/include/strata/core/mtp.hpp b/include/strata/core/mtp.hpp
index e2084f6d28d..bfb6ee0f57c 100644
--- a/include/strata/core/mtp.hpp
+++ b/include/strata/core/mtp.hpp
@@ -82,6 +82,7 @@ class MtpDrafter {
     /// Coupled mode with penalties: the history the next draft() chain starts from - what the session holds after the
     /// window's commit (`tail`) and the window's pick at its last accepted row (`next`, the next window's row 0).
     void set_draft_history(const int32_t* tail, int64_t n_tail, int32_t next);
+    void set_ple_session(SessionState* s) { ple_ss_ = s; }
     bool coupled() const { return coupled_active_; }
 
     double ms_draft = 0, ms_prefill = 0;
@@ -124,6 +125,7 @@ class MtpDrafter {
 
     const ModelGeometry* g_ = nullptr;
     SessionState* ss_ = nullptr;
+    SessionState* ple_ss_ = nullptr;
     const WeightTable* wt_ = nullptr;
     const NativeHead* head_ = nullptr;
     const float* window_R_ = nullptr;
diff --git a/include/strata/core/verify.hpp b/include/strata/core/verify.hpp
index f146046d62e..4c7bd30c84c 100644
--- a/include/strata/core/verify.hpp
+++ b/include/strata/core/verify.hpp
@@ -45,6 +45,7 @@ using PoolMultiFn = void (*)(void* user, const float* x_f, const int32_t* ids, i
 
 struct VerifyHits {
     const int32_t* d_res = nullptr;      ///< device [n_layers * n_expert] slot or -1
+    const int32_t* h_res = nullptr;      ///< host [n_layers * n_expert] slot or -1 (when all >= 0 in stage: zero-doorbell)
     const uint8_t* cache_base = nullptr; ///< slot 0 of the VRAM expert arena
     const uint64_t* slot_off = nullptr;   ///< E-6: host per-slot offsets when slots differ in size (null: slot * blob)
     int64_t n_slots = 0;                  ///< E-6: how many (for the device copy)
@@ -176,6 +177,7 @@ class Verifier {
     bool head_sampling_ = true;          ///< set_head_sampling
     int device_ = -1;                    ///< the device `init` ran on: run/commit switch to it (layer split)
     std::atomic<bool> released_{false};  ///< #267: release_gpu_waits ran (maybe on the watchdog thread): no more windows
+    bool all_resident_ = false;           ///< 100% of experts in [lb_, le_) resident in VRAM: zero-doorbell graph
     bool device_plan_ = false;            ///< E-6: resident-only layers planned on the device (STRATA_VERIFY_DEVICE_PLAN)
     uint32_t* skip_ = nullptr;            ///< E-6: per group, the ring whose plan the device built (0: the host's)
     unsigned long long* slot_off_d_ = nullptr;   ///< E-6: the slot offsets on the device
@@ -185,6 +187,9 @@ class Verifier {
     Verifier* next_ = nullptr;
     void* next_user_ = nullptr;
     bool ple_stage() const { return lb_ <= 1 && 1 < le_; }   ///< holds layer 1, where the PLE block runs
+    void stage_inputs(int T, const int32_t* tokens, int64_t pos0);
+    bool staged_ = false;
+    bool copy_used_ = false;
     bool capture_commit(std::string& err);
     bool record_window(int T, cudaStream_t cs, std::string& err);
     // #649: STRATA_VERIFY_TRACE=1 - a host event ring (trace_ev) and GPU breadcrumbs: the profiler's stamp points,
@@ -212,6 +217,8 @@ class Verifier {
     int32_t last_tokens_[8] = {};
     int64_t n_vocab_ = 0;
     cudaStream_t cs_ = nullptr;
+    cudaStream_t sh_cs_ = nullptr;
+    cudaEvent_t ev_fork_ = nullptr, ev_join_ = nullptr;
     cudaGraphExec_t exec_[9] = {};
     cudaGraphExec_t commit_exec_ = nullptr;
 
@@ -252,6 +259,7 @@ class Verifier {
     float *ple_ = nullptr, *emb_ = nullptr, *R_ = nullptr, *mixed_ = nullptr, *bo_ = nullptr;
     float *inj_ = nullptr, *inj2_ = nullptr, *lo_ = nullptr, *rs_ = nullptr, *xn_ = nullptr;
     uint8_t* xq_ = nullptr;                                   // T columns of q8_1
+    uint8_t* sh_xq_ = nullptr;                                // T columns of q8_1 for shared expert branch
     float *qkv_L_ = nullptr, *h_L_ = nullptr, *gate_L_ = nullptr, *beta_L_ = nullptr;   // per GDN layer
     float *z_ = nullptr, *y_ = nullptr, *y_dummy_ = nullptr;
     float *qfull_ = nullptr, *qcur_ = nullptr, *kcur_ = nullptr, *vcur_ = nullptr, *idx_raw_L_ = nullptr;
diff --git a/include/strata/kernels/cpu/expert_layout.hpp b/include/strata/kernels/cpu/expert_layout.hpp
index 9a8b9918302..1eec8085dd4 100644
--- a/include/strata/kernels/cpu/expert_layout.hpp
+++ b/include/strata/kernels/cpu/expert_layout.hpp
@@ -44,6 +44,8 @@ struct ExpertLayout {
 /// Plan v0.3 P6: whether this CPU (and its OS) runs the AVX-512 kernels (F, BW, VL, VNNI, VBMI).  Probed in a
 /// file compiled without AVX-512, so asking is safe everywhere; STRATA_FORCE_AVX2=1 answers no (for tests).
 bool cpu_avx512_ok();
+/// Whether this CPU runs AVX-512F + AVX-512BW + AVX-512VL + AVX-512DQ (e.g. Skylake-X i9-9920X) for iq_avx512.cpp.
+bool cpu_avx512bw_ok();
 /// Whether this CPU (and its OS) runs the AVX2 kernels (AVX, AVX2, FMA, F16C): the floor of every expert kernel
 /// (q2_avx2.cpp, iq_avx2.cpp, and ggml-cpu in the portable build).  STRATA_FORCE_AVX2 does not change it.
 bool cpu_avx2_ok();
diff --git a/include/strata/kernels/elementwise.hpp b/include/strata/kernels/elementwise.hpp
index 543d75dc2c7..ae0973c6dcc 100644
--- a/include/strata/kernels/elementwise.hpp
+++ b/include/strata/kernels/elementwise.hpp
@@ -1,4 +1,4 @@
-// include/strata/kernels/elementwise.hpp - the small ops a LAYER needs between its GEMVs, P2.S5.
+// include/strata/kernels/elementwise.hpp - the small ops a LAYER needs between its GEMVs, P2.S5.
 //
 // These are not interesting kernels and that is why they are in one file with one parity test: they are the
 // glue in the per-layer graph, and glue that is written inline at each call site is glue with several
@@ -118,6 +118,8 @@ void doorbell_publish(const float* x, const int32_t* ids, const float* weights,
 void doorbell_publish_value(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k,
                             float* x_out, int32_t* ids_out, float* weights_out, uint32_t* d_seq, uint32_t value,
                             void* stream);
+void doorbell_publish_res(const float* x, const int32_t* ids, const int32_t* d_res, int n_expert, int64_t n, int64_t k,
+                          float* x_out, int32_t* ids_out, uint32_t* d_seq, void* stream);
 
 /// Plan v0.3 P3: copy `n` int32 from mapped pinned host memory into device memory with a kernel (the QSA
 /// per-token step and positions), instead of a host-to-device memcpy node in the middle of a layer.
diff --git a/include/strata/kernels/ngram.hpp b/include/strata/kernels/ngram.hpp
index 9aae9c08c8a..a321ea70f94 100644
--- a/include/strata/kernels/ngram.hpp
+++ b/include/strata/kernels/ngram.hpp
@@ -143,6 +143,9 @@ class PleTable {
     /// needs the rows. `gather` is `issue` followed by `collect`. In Mmap mode `issue` only prefetches.
     bool issue(const uint32_t* rows16);
     bool collect(float* out2560, std::string& err);
+    /// Non-blocking prefetch of 16 rows for one token into the reader's row cache while the GPU is busy.
+    void prefetch_rows(const uint32_t* rows16);
+    void wait_prefetches();
     /// Plan v0.3 P5: the rows of `n_tokens` tokens (16 each, `rows` token-major) into `out` (2560 floats per token),
     /// as ONE reader request - page dedupe and sort across the whole batch, the reader's full queue depth.  Not
     /// while a single-token `issue` is pending.  The mapped mode gathers row by row.
diff --git a/include/strata/kernels/ple.hpp b/include/strata/kernels/ple.hpp
index fabad838a3e..76ae78902b3 100644
--- a/include/strata/kernels/ple.hpp
+++ b/include/strata/kernels/ple.hpp
@@ -33,6 +33,7 @@ namespace strata::kernels {
 /// Opt in to pinned CUDA BF16/F32 MMVF for the PLE value projection only (default false).
 /// Configure before session capture; captured graphs retain their selected projection kernels.
 void ple_set_native_bf16(bool enabled);
+bool ple_native_bf16_enabled();
 
 /// Opt in to pinned CUDA postprojection norms, gate, convolution and residual
 /// arithmetic (default false). Set before capture; existing graphs keep their
@@ -107,6 +108,9 @@ uint64_t ple_block_scratch_bytes();
 void ple_block(const float* emb, const float* hidden, const float* hist_rows, const PleWeights& w,
                PleOut& out, void* scratch, void* stream);
 
+void ple_block_projected(const float* projected_key, const float* projected_value, const float* hidden,
+                         const float* hist_rows, const PleWeights& w, PleOut& out, void* scratch, void* stream);
+
 /// Advance the row-fastest normalized history by one token: hist[r,c] = old_hist[r+1,c], then append
 /// normalized[c] at row NG_HIST-1. One thread owns each channel, making the in-place shift well-defined.
 /// hist and normalized must be nonnull, disjoint device regions of NG_HIST*NG_HC_DIM and NG_HC_DIM floats.
diff --git a/include/strata/kernels/shared_expert.hpp b/include/strata/kernels/shared_expert.hpp
index 8909ed9e607..44b37d8220c 100644
--- a/include/strata/kernels/shared_expert.hpp
+++ b/include/strata/kernels/shared_expert.hpp
@@ -24,6 +24,7 @@ namespace strata::kernels {
 /// Configure before session capture; captured graphs retain their selected kernels.
 /// In this mode shared_expert requires its optional unrounded x_f32 input.
 void shared_expert_set_native_bf16(bool enabled);
+bool shared_expert_native_bf16_enabled();
 
 /// Optional native GGUF projections. Each supported type with nonnull data
 /// replaces only that canonical projection; absent or unsupported entries fall
@@ -37,6 +38,7 @@ struct NativeSharedWeights {
     const void* up_data = nullptr;
     const void* down_data = nullptr;
     void* q8_1 = nullptr;
+    const void* x_q8_1 = nullptr;   // optional pre-quantized Q8_1 input for gate/up in shared_expert_multi
 };
 
 /// Bytes of caller-owned scratch `shared_expert` needs.  **THE KERNEL USED TO `cudaMalloc` FOUR BUFFERS ON
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index e2154941a5f..71e44cdc9bf 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2099,16 +2099,23 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
             for (int64_t i = 0; i < n; ++i) if (d.remote[r]->owns(i)) kind[i] = 2;
         }
     }
+    static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
+    const bool gpu_zeroes_hits = (d.plan != nullptr && n <= kMaxWindowEntries && n <= d.plan->cap && dec_batch);
+    bool any_cpu = false;
+    for (int64_t i = 0; i < n; ++i)
+        if (kind[i] < 0) { any_cpu = true; break; }
     const auto c1 = std::chrono::steady_clock::now();
-    if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
-        for (int64_t t = 0; t < n_tok; ++t) act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
-    else if (native)
-        for (int64_t t = 0; t < n_tok; ++t)
-            native_quant_act(lay.fmt[(size_t) d.layers], x_f + (size_t) t * H, d.nact_multi.data() + (size_t) t * kNativeActBytes);
-    else
-        for (int64_t t = 0; t < n_tok; ++t) act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+    if (any_cpu) {
+        if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
+            for (int64_t t = 0; t < n_tok; ++t) act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+        else if (native)
+            for (int64_t t = 0; t < n_tok; ++t)
+                native_quant_act(lay.fmt[(size_t) d.layers], x_f + (size_t) t * H, d.nact_multi.data() + (size_t) t * kNativeActBytes);
+        else
+            for (int64_t t = 0; t < n_tok; ++t) act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+    }
     const auto c2 = std::chrono::steady_clock::now();
-    {   // CS-T: the experts the CPU computes, fetched together (the GGUF in place reads them on several threads)
+    if (any_cpu) {   // CS-T: the experts the CPU computes, fetched together (the GGUF in place reads them on several threads)
         static thread_local std::vector<int64_t> miss;
         miss.clear();
         for (int64_t i = 0; i < n_tok * k; ++i)
@@ -2134,8 +2141,10 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
                 if (kind[i] == 0) ++d.cache_hits;
                 else ++d.offload_entries;                       // #588: PCIe or another GPU
                 if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
-                // multi-GPU: a direct peer launch is writing this row right now - zeroing it would race it
-                if (!(kind[i] == 2 && d.peer != nullptr && d.peer->launched_direct()))
+                // multi-GPU: a direct peer launch is writing this row right now - zeroing it would race it;
+                // dec_batch: copy_rows_from_mapped_kernel already zeroes kind 0/1 rows on the GPU
+                if (!((kind[i] == 2 && d.peer != nullptr && d.peer->launched_direct()) ||
+                      (gpu_zeroes_hits && (kind[i] == 0 || kind[i] == 1))))
                     std::memset(row, 0, (size_t) H * sizeof(float));
                 continue;
             }
@@ -2165,8 +2174,10 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         }
     const auto c3 = std::chrono::steady_clock::now();
     pt("run", njobs);
-    if (native) d.pool->run_split_multi_native(lay.fmt[(size_t) d.layers], d.jobs_multi.data(), njobs);
-    else d.pool->run_split_multi(d.jobs_multi.data(), njobs);
+    if (njobs > 0) {
+        if (native) d.pool->run_split_multi_native(lay.fmt[(size_t) d.layers], d.jobs_multi.data(), njobs);
+        else d.pool->run_split_multi(d.jobs_multi.data(), njobs);
+    }
     if (d.remote_count > 0) {
         static thread_local std::string remote_error;
         for (int r = 0; r < d.remote_count; ++r)
diff --git a/src/core/mtp.cpp b/src/core/mtp.cpp
index a53cc60a417..1983cc4710f 100644
--- a/src/core/mtp.cpp
+++ b/src/core/mtp.cpp
@@ -26,6 +26,7 @@
 #include "strata/kernels/sampler.hpp"
 #include "strata/kernels/shared_expert.hpp"
 #include "strata/kernels/verify_kernels.hpp"
+#include "strata/kernels/ngram.hpp"
 
 #include <algorithm>
 #include <atomic>
@@ -37,6 +38,11 @@
 #include <fstream>
 #include <sstream>
 #include <vector>
+#if defined(_WIN32)
+#include <intrin.h>
+#elif defined(__x86_64__)
+#include <immintrin.h>
+#endif
 
 namespace strata::core {
 namespace {
@@ -146,6 +152,7 @@ bool MtpDrafter::load(const std::string& rt_dir, const ModelGeometry& g, Session
     cudaGetDevice(&device_);   // a layer split's last stage on another GPU: the drafter lives there
     g_ = &g;
     ss_ = &ss;
+    if (ple_ss_ == nullptr) ple_ss_ = &ss;
     max_t_ = max_t;
     rt_dir_ = rt_dir;
     if (max_t < 1 || max_t > strata::kernels::kVerifyMaxT) { err = "mtp: max_t out of range"; return false; }
@@ -589,14 +596,22 @@ bool MtpDrafter::record_forward(int T, int step_row0, cudaStream_t cs, std::stri
                 native_moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
             else
                 moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
-            gr_write(R_ + (size_t) t * HC * N, y_ + t * N, inj2_ + t * HC, gs, R_ + (size_t) t * HC * N, cs);
         }
-        // ---- the final mixer and the main model's head
-        for (int t = 0; t < T; ++t)
-            gr_read(R_ + (size_t) t * HC * N, f32("hyper_connection_mixer.hc_norm.weight"),
-                    bf16("hyper_connection_mixer.input_mix_weight_down.weight"),
-                    bf16("hyper_connection_mixer.input_mix_weight_up.weight"), nullptr, EPS, gs, ss.block.gr,
-                    sample_ + t * N, dummy_inj_, cs);
+        // ---- the final mixer (with the MLP write folded in) and the main model's head
+        {
+            FusedGrArgs fa[kFusedGrMaxT];
+            for (int t = 0; t < T; ++t) {
+                fa[t].R = R_ + (size_t) t * HC * N; fa[t].R_out = R_ + (size_t) t * HC * N; fa[t].apply = true;
+                fa[t].bo_prev = y_ + t * N; fa[t].inj_prev = inj2_ + t * HC;
+                fa[t].w_norm = f32("hyper_connection_mixer.hc_norm.weight");
+                fa[t].w_down = bf16("hyper_connection_mixer.input_mix_weight_down.weight");
+                fa[t].w_up = bf16("hyper_connection_mixer.input_mix_weight_up.weight");
+                fa[t].w_inject = nullptr;
+                fa[t].eps = EPS; fa[t].lo = lo_ + t * g.hc_lr; fa[t].rs = rs_ + t * HC;
+                fa[t].inject_out = dummy_inj_; fa[t].mixed = sample_ + t * N;
+            }
+            fused_gr_read_multi(fa, T, xn_, cs);
+        }
         native_quantize_q8_1(sample_, xq_, (int) N, T, cs);
         const bool sub = dhead_ != nullptr;
         const int64_t nv = sub ? n_dvocab_ : n_vocab_;
@@ -829,6 +844,9 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
     if (T < 1 || T > max_t_ || a < 0 || a >= T) { err = "mtp: draft arguments out of range"; return false; }
     const bool cp = coupled_active_;   // coupled draft sampling for this request: its own graphs
     if (!capture_round(T, cp, err)) return false;
+    const int max_steps = std::min(max_t_ - 1, max_drafts_);
+    for (int j = 1; j < max_steps; ++j)
+        if (!capture_step(j, cp, err)) return false;
     const Clock::time_point t0 = Clock::now();
     const int64_t NH = g_->n_head;
     auto put = [&](int row, int64_t cell) {
@@ -843,32 +861,99 @@ bool MtpDrafter::draft(int T, const int32_t* tokens, int64_t p, int a, int32_t*
         put(t, p + t);
     }
     put(2 * max_t_ - 1, coupled_draft_cell(p, a, 0));   // p + a: draft 0's cell
+    for (int j = 1; j < max_steps; ++j)
+        put(max_t_ + j - 1, coupled_draft_cell(p, a, j));
+    for (int j = 0; j < max_steps; ++j) ((volatile int32_t*) h_out_)[j] = -1;
     h_row_[0] = a;
     h_row_[1] = 0;
     std::atomic_thread_fence(std::memory_order_seq_cst);
-    if (cudaGraphLaunch(cp ? round_exec_c_[T] : round_exec_[T], cs_) != cudaSuccess ||
-        cudaStreamSynchronize(cs_) != cudaSuccess) {
-        err = std::string("mtp draft: ") + cudaGetErrorString(cudaGetLastError());
-        return false;
-    }
-    drafts[0] = ((volatile int32_t*) h_out_)[0];
-    float pj = ((volatile float*) h_prob_)[0];
-    if (probs) probs[0] = pj;
-    int n = 1;
-    // the chain continues while the last draft is likely enough to be verified
-    for (int j = 1; j < std::min(max_t_ - 1, max_drafts_) && pj >= min_p; ++j) {
-        if (!capture_step(j, cp, err)) return false;
-        put(max_t_ + j - 1, coupled_draft_cell(p, a, j));   // p + a + j; coupled: drawn at counter cell + 1
-        std::atomic_thread_fence(std::memory_order_seq_cst);
-        if (cudaGraphLaunch(cp ? step_exec_c_[j] : step_exec_[j], cs_) != cudaSuccess ||
-            cudaStreamSynchronize(cs_) != cudaSuccess) {
-            err = std::string("mtp draft step: ") + cudaGetErrorString(cudaGetLastError());
+
+    SessionState* const pss = ple_ss_ ? ple_ss_ : ss_;
+    const bool do_ple = pss != nullptr && pss->ple.ready() && pss->ple.table != nullptr;
+    int32_t ple_prev[2] = {do_ple ? pss->ple_prev[0] : 0, do_ple ? pss->ple_prev[1] : 0};
+    auto prefetch_ple = [&](int32_t tok) {
+        if (!do_ple || tok < 0) return;
+        uint32_t rows16[strata::kernels::PLE_N_HEADS];
+        strata::kernels::ngram_rows(&tok, ple_prev, 1, pss->ple.consts, rows16);
+        ple_prev[0] = ple_prev[1];
+        ple_prev[1] = tok;
+        pss->ple.table->prefetch_rows(rows16);
+    };
+
+    int n = 0;
+    if (min_p <= 0.0f && max_steps > 0) {
+        if (cudaGraphLaunch(cp ? round_exec_c_[T] : round_exec_[T], cs_) != cudaSuccess) {
+            err = std::string("mtp draft: ") + cudaGetErrorString(cudaGetLastError());
+            return false;
+        }
+        for (int j = 1; j < max_steps; ++j) {
+            if (cudaGraphLaunch(cp ? step_exec_c_[j] : step_exec_[j], cs_) != cudaSuccess) {
+                err = std::string("mtp draft step: ") + cudaGetErrorString(cudaGetLastError());
+                return false;
+            }
+        }
+        (void) cudaStreamQuery(cs_);
+        prefetch_ple(tokens[a]);
+        for (int j = 0; j + 1 < max_steps; ++j) {
+            uint32_t spins = 0;
+            while (((volatile int32_t*) h_out_)[j] < 0) {
+#if defined(_WIN32) || defined(__x86_64__)
+                _mm_pause();
+#endif
+                if ((++spins & 1023u) == 0 && cudaStreamQuery(cs_) != cudaErrorNotReady) break;
+            }
+            drafts[j] = ((volatile int32_t*) h_out_)[j];
+            if (probs) probs[j] = ((volatile float*) h_prob_)[j];
+            prefetch_ple(drafts[j]);
+        }
+        if (cudaStreamSynchronize(cs_) != cudaSuccess) {
+            err = std::string("mtp draft: ") + cudaGetErrorString(cudaGetLastError());
+            return false;
+        }
+        const int last = max_steps - 1;
+        drafts[last] = ((volatile int32_t*) h_out_)[last];
+        if (probs) probs[last] = ((volatile float*) h_prob_)[last];
+        prefetch_ple(drafts[last]);
+        n = max_steps;
+    } else if (max_steps > 0) {
+        if (cudaGraphLaunch(cp ? round_exec_c_[T] : round_exec_[T], cs_) != cudaSuccess) {
+            err = std::string("mtp draft: ") + cudaGetErrorString(cudaGetLastError());
+            return false;
+        }
+        (void) cudaStreamQuery(cs_);
+        prefetch_ple(tokens[a]);
+        auto wait_step = [&](int j) {
+            uint32_t spins = 0;
+            while (((volatile int32_t*) h_out_)[j] < 0) {
+#if defined(_WIN32) || defined(__x86_64__)
+                _mm_pause();
+#endif
+                if ((++spins & 1023u) == 0 && cudaStreamQuery(cs_) != cudaErrorNotReady) break;
+            }
+        };
+        wait_step(0);
+        drafts[0] = ((volatile int32_t*) h_out_)[0];
+        float pj = ((volatile float*) h_prob_)[0];
+        if (probs) probs[0] = pj;
+        n = 1;
+        for (int j = 1; j < max_steps && pj >= min_p; ++j) {
+            if (cudaGraphLaunch(cp ? step_exec_c_[j] : step_exec_[j], cs_) != cudaSuccess) {
+                err = std::string("mtp draft step: ") + cudaGetErrorString(cudaGetLastError());
+                return false;
+            }
+            (void) cudaStreamQuery(cs_);
+            prefetch_ple(drafts[j - 1]);
+            wait_step(j);
+            drafts[j] = ((volatile int32_t*) h_out_)[j];
+            pj = ((volatile float*) h_prob_)[j];
+            if (probs) probs[j] = pj;
+            ++n;
+        }
+        prefetch_ple(drafts[n - 1]);
+        if (cudaStreamSynchronize(cs_) != cudaSuccess) {
+            err = std::string("mtp draft: ") + cudaGetErrorString(cudaGetLastError());
             return false;
         }
-        drafts[j] = ((volatile int32_t*) h_out_)[j];
-        pj = ((volatile float*) h_prob_)[j];
-        if (probs) probs[j] = pj;
-        ++n;
     }
     for (int j = n; j < max_t_ - 1; ++j) { drafts[j] = 0; if (probs) probs[j] = 0.0f; }
     if (n_drafts) *n_drafts = n;
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 8a8b69bcac2..1b6736b8443 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -274,12 +274,16 @@ Verifier::~Verifier() {
         slot.compare_exchange_strong(me, nullptr);
     }
     if (cs_) cudaStreamSynchronize(cs_);
+    if (sh_cs_) cudaStreamSynchronize(sh_cs_);
     for (auto& e : exec_)
         if (e) cudaGraphExecDestroy(e);
     if (commit_exec_) cudaGraphExecDestroy(commit_exec_);
     if (cs_) cudaStreamDestroy(cs_);
+    if (sh_cs_) cudaStreamDestroy(sh_cs_);
     if (copy_) { cudaStreamSynchronize(copy_); cudaStreamDestroy(copy_); }
     if (commit_done_) cudaEventDestroy(commit_done_);
+    if (ev_fork_) cudaEventDestroy(ev_fork_);
+    if (ev_join_) cudaEventDestroy(ev_join_);
     if (arena_) cudaFree(arena_);
     void* hosts[] = {h_tok_, h_step_, h_pos_, h_commit_, h_ple_, h_out_, h_x_, h_ids_, h_w_, h_seq_, h_flag_, h_ymiss_,
                      h_flagA_, h_plan_, h_flagB_};
@@ -399,6 +403,7 @@ bool Verifier::init(const WeightTable& wt, const ModelGeometry& g, SessionState&
         inj_ = b.take<float>(T * HC); inj2_ = b.take<float>(T * HC);
         lo_ = b.take<float>(T * (uint64_t) g.hc_lr); rs_ = b.take<float>(T * HC); xn_ = b.take<float>(T * HC * N);
         xq_ = b.take<uint8_t>(strata::kernels::native_q8_1_bytes(max_in, (int) T));
+        sh_xq_ = b.take<uint8_t>(strata::kernels::native_q8_1_bytes(max_in, (int) T));
         qkv_L_ = b.take<float>(nG * T * C); h_L_ = b.take<float>(nG * T * C);
         gate_L_ = b.take<float>(nG * T * HV); beta_L_ = b.take<float>(nG * T * HV);
         z_ = b.take<float>(T * ZV); y_ = b.take<float>(T * ZV); y_dummy_ = b.take<float>(T * ZV);
@@ -465,31 +470,56 @@ bool Verifier::init(const WeightTable& wt, const ModelGeometry& g, SessionState&
         err = "verify: copy stream create failed";
         return false;
     }
-    if (cudaStreamCreateWithFlags(&cs_, cudaStreamNonBlocking) != cudaSuccess) {
+    if (cudaStreamCreateWithFlags(&cs_, cudaStreamNonBlocking) != cudaSuccess ||
+        cudaStreamCreateWithFlags(&sh_cs_, cudaStreamNonBlocking) != cudaSuccess) {
         err = "verify: stream create failed";
         return false;
     }
-    if (cudaEventCreateWithFlags(&commit_done_, cudaEventDisableTiming) != cudaSuccess) {
+    if (cudaEventCreateWithFlags(&commit_done_, cudaEventDisableTiming) != cudaSuccess ||
+        cudaEventCreateWithFlags(&ev_fork_, cudaEventDisableTiming) != cudaSuccess ||
+        cudaEventCreateWithFlags(&ev_join_, cudaEventDisableTiming) != cudaSuccess) {
         err = "verify: event create failed";
         return false;
     }
+    // Check whether 100% of experts across [lb_, le_) are resident in this stage's VRAM cache.
+    // When true, every layer plans on device and writes directly into parts_ without any CPU doorbells,
+    // wait_flag_ge spins, PCIe empty launches, or moe_hit_add copies.
+    all_resident_ = false;
+    if (hits.h_res != nullptr && hits.d_res != nullptr && hits.cache_base != nullptr) {
+        const char* v_ar = std::getenv("STRATA_VERIFY_ALL_RESIDENT");
+        if (v_ar == nullptr || std::atoi(v_ar) != 0) {
+            bool all_ok = true;
+            for (int64_t l = lb_; l < le_ && all_ok; ++l) {
+                for (int64_t e = 0; e < g.n_expert; ++e) {
+                    if (hits.h_res[l * g.n_expert + e] < 0) {
+                        all_ok = false;
+                        break;
+                    }
+                }
+            }
+            all_resident_ = all_ok;
+        }
+    }
     // E-6: a layer whose routed experts are all resident is planned on the device (STRATA_VERIFY_DEVICE_PLAN=1: on;
     // exact, but neutral on RIBPC 1-2 GPUs: off by default)
     {
         const char* v = std::getenv("STRATA_VERIFY_DEVICE_PLAN");
-        device_plan_ = v != nullptr && std::atoi(v) != 0;
+        device_plan_ = !all_resident_ && (v != nullptr && std::atoi(v) != 0);
     }
-    if (device_plan_) {
-        bool ok2 = cudaMalloc((void**) &skip_, 64) == cudaSuccess && cudaMemset(skip_, 0, 64) == cudaSuccess;
+    if (all_resident_ || device_plan_) {
+        bool ok2 = true;
+        if (device_plan_)
+            ok2 = cudaMalloc((void**) &skip_, 64) == cudaSuccess && cudaMemset(skip_, 0, 64) == cudaSuccess;
         if (ok2 && hits.slot_off != nullptr && hits.n_slots > 0) {
             ok2 = cudaMalloc((void**) &slot_off_d_, (size_t) hits.n_slots * sizeof(unsigned long long)) == cudaSuccess &&
                   cudaMemcpy(slot_off_d_, hits.slot_off, (size_t) hits.n_slots * sizeof(unsigned long long),
                              cudaMemcpyHostToDevice) == cudaSuccess;
         }
-        if (!ok2) { cudaGetLastError(); device_plan_ = false; }
+        if (!ok2) { cudaGetLastError(); all_resident_ = false; device_plan_ = false; }
     }
-    std::fprintf(stderr, "strata verify: window up to %d tokens, %.1f MiB of device buffers\n", max_t,
-                 (double) count.used / 1048576.0);
+    std::fprintf(stderr, "strata verify: window up to %d tokens, %.1f MiB of device buffers%s\n", max_t,
+                 (double) count.used / 1048576.0,
+                 all_resident_ ? " (100% VRAM resident: zero-doorbell graph)" : "");
     return true;
 }
 
@@ -537,17 +567,14 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     // per-ROW positions of the K rows [t][NKV] and the indexer query rows [t][IQ] (for batched RoPE)
     const int32_t* pos_k = pos_ + MT * NH;
     const int32_t* pos_i = pos_ + MT * (NH + NKV);
-    if (ple_on) copy_from_mapped(ple_, m_ple_, (int64_t) T * N, cs);
 
     // ---- the embeddings, broadcast to the hc streams - or, in a later stage of a layer split, the previous stage's
     // residual, pending write and inject (see set_stage)
     const int64_t HB = Verifier::handoff_floats(g);
     if (lb_ > 0) {
-        for (int t = 0; t < T; ++t) {
-            copy_from_mapped(Rt(t), hand_in_ + (size_t) t * HB, HC * N, cs);
-            copy_from_mapped(bo_ + (size_t) t * N, hand_in_ + (size_t) t * HB + HC * N, N, cs);
-            copy_from_mapped(inj2_ + (size_t) t * HC, hand_in_ + (size_t) t * HB + HC * N + N, HC, cs);
-        }
+        copy_from_mapped(R_, hand_in_, (int64_t) T * HC * N, cs);
+        copy_from_mapped(bo_, hand_in_ + (size_t) T * HC * N, (int64_t) T * N, cs);
+        copy_from_mapped(inj2_, hand_in_ + (size_t) T * (HC + 1) * N, (int64_t) T * HC, cs);
     } else if (const NativeEmbed* ne = native_embed()) {       // plan v0.3 P6: the GGUF-form table
         ne->gather_dev(tok_, T, emb_, cs);
         broadcast_streams(emb_, R_, N, (int) HC, T, cs);
@@ -595,14 +622,37 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         // already applied it)
         bool pending = l > 0 && !cvec().covers(l - 1);
         if (l == 1 && ple_on) {
+            if (grp == 0) {
+                if (all_resident_) wait_flag_ge(m_flag_, 1, cs);
+                copy_from_mapped(ple_, m_ple_, (int64_t) T * N, cs);
+            }
             float* normalized = (float*) ((uint8_t*) ss.ple.scratch + ple_block_scratch_bytes());
+            const bool ple_batch_kv = dec_batch && n > 1 && ss.ple.w.key_bf16 != nullptr &&
+                                      ss.ple.w.value_bf16 != nullptr && ple_native_bf16_enabled() &&
+                                      ple_native_postops_enabled();
+            if (ple_batch_kv) {
+                try {
+                    bf16_gemv_fp32_mmvf_multi(ple_ + (size_t) tb * N, N, ss.ple.w.key_bf16,
+                                              xn_ + (size_t) tb * HC * N, HC * N, N, HC * N, n, cs);
+                    bf16_gemv_fp32_mmvf_multi(ple_ + (size_t) tb * N, N, ss.ple.w.value_bf16,
+                                              z_ + (size_t) tb * N, N, N, N, n, cs);
+                } catch (const std::exception& e) {
+                    err = std::string("verify PLE multi: ") + e.what();
+                    return false;
+                }
+            }
             for (int t = tb; t < te; ++t) {
                 gr_write(Rt(t), bo_ + t * N, inj2_ + t * HC, gs, Rt(t), cs);
                 PleOut po;
                 po.normalized = normalized;
                 po.result = Rt(t);
                 try {
-                    ple_block(ple_ + t * N, Rt(t), ss.ple.hist, ss.ple.w, po, ss.ple.scratch, cs);
+                    if (ple_batch_kv) {
+                        ple_block_projected(xn_ + (size_t) t * HC * N, z_ + (size_t) t * N, Rt(t), ss.ple.hist,
+                                            ss.ple.w, po, ss.ple.scratch, cs);
+                    } else {
+                        ple_block(ple_ + t * N, Rt(t), ss.ple.hist, ss.ple.w, po, ss.ple.scratch, cs);
+                    }
                     ple_history_advance(ss.ple.hist, normalized, cs);
                 } catch (const std::exception& e) {
                     err = std::string("verify PLE: ") + e.what();
@@ -792,6 +842,12 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         }
         stamp(l, 16, grp);
         gr_read_group(1, true, inj_, inj2_);
+        const bool sh_fork = !prof_on_ && sh_cs_ != nullptr && ev_fork_ != nullptr && ev_join_ != nullptr;
+        cudaStream_t sh_stream = sh_fork ? sh_cs_ : cs;
+        if (sh_fork) {
+            cudaEventRecord(ev_fork_, cs);
+            cudaStreamWaitEvent(sh_cs_, ev_fork_, 0);
+        }
         // the window's rows routed in 2 launches (one router GEMV reading the weight once, one
         // top-10) instead of 2 per token; every row's arithmetic is the single-token call's (STRATA_DEC_BATCH=0: old)
         const WeightRef* w_router = v.get("ffn_gate_inp.weight");
@@ -807,19 +863,28 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
             mb.logits = logits_ + t * NE; mb.ids = ids_ + t * K; mb.weights = w_ + t * K;
             if (!moe_route(wt, g, l, K, mb, mixed_ + t * N, cs, err, nullptr)) return false;
         }
-        if (device_plan_)   // E-6: every routed expert resident: this group's plan without the host
+        if (all_resident_) {
             resident_plan(ids_ + tb * K, n * (int) K, (int) K, hits_.d_res + l * g.n_expert, (int) g.n_expert,
                           hits_.cache_base, slot_off_d_, (long long) hits_.blob,
-                          plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, skip_ + grp,
-                          (uint32_t) ((l - lb_) * G + grp + 1), cs);
+                          plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, nullptr, 0, cs);
+        } else {
+            if (device_plan_)   // E-6: every routed expert resident: this group's plan without the host
+                resident_plan(ids_ + tb * K, n * (int) K, (int) K, hits_.d_res + l * g.n_expert, (int) g.n_expert,
+                              hits_.cache_base, slot_off_d_, (long long) hits_.blob,
+                              plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, skip_ + grp,
+                              (uint32_t) ((l - lb_) * G + grp + 1), cs);
 #if defined(STRATA_USE_HIP)
-        if (g_doorbell_store)   // #649 A/B: the step's ring stored, not incremented over PCIe
-            doorbell_publish_value(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
-                                   m_ids_ + tb * K, m_w_ + tb * K, m_seq_, (uint32_t) ((l - lb_) * G + grp + 1), cs);
-        else
+            if (g_doorbell_store)   // #649 A/B: the step's ring stored, not incremented over PCIe
+                doorbell_publish_value(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
+                                       m_ids_ + tb * K, m_w_ + tb * K, m_seq_, (uint32_t) ((l - lb_) * G + grp + 1), cs);
+            else
 #endif
-        doorbell_publish(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
-                         m_ids_ + tb * K, m_w_ + tb * K, m_seq_, cs);
+            {
+                const int32_t* layer_res = hits_.d_res != nullptr ? (hits_.d_res + l * g.n_expert) : nullptr;
+                doorbell_publish_res(xm, ids_ + tb * K, layer_res, (int) g.n_expert, (int64_t) n * N, (int64_t) n * K,
+                                     m_x_ + tb * N, m_ids_ + tb * K, m_seq_, cs);
+            }
+        }
         stamp(l, 17, grp);
         {
             const WeightRef *wgi = need(v, "ffn_gate_inp_shexp.weight", err), *wsg = need(v, "ffn_gate_shexp.weight", err),
@@ -832,16 +897,19 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
             nsw.gate_type = wsg->native_type; nsw.gate_data = wsg->native_data;
             nsw.up_type = wsu->native_type; nsw.up_data = wsu->native_data;
             nsw.down_type = wsd->native_type; nsw.down_data = wsd->native_data;
-            nsw.q8_1 = xq_;
-            if (dec_batch) f32_to_bf16_bulk(mixed_ + tb * N, sh_bf16_ + tb * N, (int64_t) n * N, cs);   // contiguous rows
-            else for (int t = tb; t < te; ++t) f32_to_bf16_bulk(mixed_ + t * N, sh_bf16_ + t * N, N, cs);
+            nsw.q8_1 = sh_fork ? sh_xq_ : xq_;
+            if (!shared_expert_native_bf16_enabled()) {
+                if (dec_batch) f32_to_bf16_bulk(mixed_ + tb * N, sh_bf16_ + tb * N, (int64_t) n * N, sh_stream);   // contiguous rows
+                else for (int t = tb; t < te; ++t) f32_to_bf16_bulk(mixed_ + t * N, sh_bf16_ + t * N, N, sh_stream);
+            }
             try {
                 shared_expert_multi(n, xm, sh_bf16_ + tb * N, nsw, (const uint16_t*) wgi->data, sh_gate_ + (size_t) tb * g.n_ff,
-                                    sh_up_ + (size_t) tb * g.n_ff, sh_g_ + tb, shared_ + tb * N, N, g.n_ff, cs);
+                                    sh_up_ + (size_t) tb * g.n_ff, sh_g_ + tb, shared_ + tb * N, N, g.n_ff, sh_stream);
             } catch (const std::exception& e) {
                 err = std::string("verify shared expert: ") + e.what();
                 return false;
             }
+            if (sh_fork) cudaEventRecord(ev_join_, sh_cs_);
         }
         if (strata::kernels::cpu::expert_layout().native)
             quantize_q8_1_rows(xm, n, N, nat_xq_ + (size_t) tb * (N / 32) * 36, cs);
@@ -852,19 +920,13 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     };
 
     // ---------------------------------------------------------------- post(l, group): experts, combine
+    const bool fuse_head_gr = (le_ == g.n_layers) && (head_ != nullptr && head_->loaded()) &&
+                              !cvec().covers(g.n_layers - 1);
     auto post = [&](int64_t l, int grp) -> bool {
         const int tb = tb_[grp], te = te_[grp], n = te - tb;
         const uint32_t ring = (uint32_t) ((l - lb_) * G + grp + 1);
         const int64_t cap = (int64_t) n * K, capx = (int64_t) max_t_ * K;
         int32_t* pl = plan_ + (size_t) grp * (size_t) (plan_i32_ + 16);
-        if (device_plan_) {   // E-6: skipped when the device planned this group (all its experts resident)
-            wait_flag_ge_or(m_flagA_, ring, skip_ + grp, cs);
-            copy_i32_from_mapped_unless(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, skip_ + grp, ring, cs);
-        } else {
-            wait_flag_ge(m_flagA_, ring, cs);                  // the pool published this group's GPU plan
-            copy_i32_from_mapped(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, cs);
-        }
-        stamp(l, 19, grp);
         const int32_t* p_counts = pl;
         const int32_t* p_start = pl + 4;
         const int32_t* p_dst = p_start + capx + 1;
@@ -874,50 +936,68 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         const unsigned long long* p_ptr2 = p_ptr + capx;
         const int32_t* p_start2 = pl + ptr_off + 4 * capx;
         float* hit_out = hit_out_ + (size_t) tb * K * N;
+        float* parts_out = parts_ + (size_t) tb * K * N;
         const auto& lay = strata::kernels::cpu::expert_layout();
         // plan v0.3 P6: the VRAM groups now; the PCIe groups once the copy engine has landed them in staging.
         // `gy`: the native launch's groups side by side (0: cap, one block row per possible group).
-        auto grouped = [&](const unsigned long long* gp, const int32_t* gs, const int32_t* gn, int64_t gy) {
+        auto grouped = [&](const unsigned long long* gp, const int32_t* gs, const int32_t* gn, int64_t gy, float* dst_buf) {
             if (lay.native) {
                 // the layer's GGUF formats (i-quant gate/up, Q2_0 / IQ4_NL down)
                 const auto& f = lay.fmt[(size_t) l];
                 const NativeExpertLayout L = native_expert_layout(f.gu_type, f.d_type, f.n_embd, f.n_ff);
                 native_expert_grouped(L, gp, gs, gn, p_dst, p_tok, cap, cap,
-                                      nat_xq_ + (size_t) tb * (N / 32) * 36, hit_scratch_, hit_out, cs, gy);
+                                      nat_xq_ + (size_t) tb * (N / 32) * 36, hit_scratch_, dst_buf, cs, gy);
             } else {
                 moe_grouped_s2(gp, gs, gn, p_dst, p_tok, cap, cap, hit_xq_ + (size_t) tb * (N / 32) * 34,
-                               hit_xs_ + (size_t) tb * (N / 32), hit_scratch_, hit_out, cs);
+                               hit_xs_ + (size_t) tb * (N / 32), hit_scratch_, dst_buf, cs);
             }
         };
-        grouped(p_ptr, p_start, p_counts, 0);
-        stamp(l, 20, grp);
-        if (device_plan_) wait_flag_ge_or(m_flagB_, ring, skip_ + grp, cs);
-        else wait_flag_ge(m_flagB_, ring, cs);                 // the PCIe share is in staging (DMA) or mapped
-        if (sink_.pcie_mode == 2) {                            // stage it with a copy kernel, then point at staging
-            const int64_t per = G == 2 ? kStagingBlobs / 2 : kStagingBlobs;
-            uint8_t* stage = staging_ + (size_t) (grp * per) * lay.max_blob;
-            fetch_blobs(p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), (int) per, cs);
-            rebase_ptrs((unsigned long long*) p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), cs);
-        }
-        stamp(l, 21, grp);
-        // the PCIe share is pcie_frac of the misses: a few groups when the cache is cold, usually none (always none at
-        // pcie_frac 0), so its launch is kPcieGroupRows block rows striding over the groups, not cap of them
-        grouped(p_ptr2, p_start2, p_counts + 2, kPcieGroupRows);
-        stamp(l, 22, grp);
-        if (device_plan_) {   // no CPU share when the device planned the group: its rows are zeros
-            wait_flag_ge_or(m_flag_, ring, skip_ + grp, cs);
-            copy_or_zero_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (long long) n * K * N,
-                                     skip_ + grp, ring, cs);
+        if (all_resident_) {
+            stamp(l, 19, grp);
+            grouped(p_ptr, p_start, p_counts, 0, parts_out);
+            stamp(l, 20, grp);
         } else {
-            wait_flag_ge(m_flag_, ring, cs);               // the CPU's share is in the mapped rows
-            stamp(l, 23, grp);
-            if (dec_batch)   // only the CPU rows cross PCIe (p_dst[0, counts[1]) = the GPU's own rows)
-                copy_rows_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K, N,
-                                      p_dst, p_counts + 1, cs);
-            else
-                copy_from_mapped(parts_ + (size_t) tb * K * N, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K * N, cs);
+            if (device_plan_) {   // E-6: skipped when the device planned this group (all its experts resident)
+                wait_flag_ge_or(m_flagA_, ring, skip_ + grp, cs);
+                copy_i32_from_mapped_unless(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, skip_ + grp, ring, cs);
+            } else {
+                wait_flag_ge(m_flagA_, ring, cs);                  // the pool published this group's GPU plan
+                copy_i32_from_mapped(pl, m_plan_ + (size_t) grp * (size_t) plan_i32_, plan_i32_, cs);
+            }
+            stamp(l, 19, grp);
+            grouped(p_ptr, p_start, p_counts, 0, hit_out);
+            stamp(l, 20, grp);
+            if (device_plan_) wait_flag_ge_or(m_flagB_, ring, skip_ + grp, cs);
+            else wait_flag_ge(m_flagB_, ring, cs);                 // the PCIe share is in staging (DMA) or mapped
+            if (sink_.pcie_mode == 2) {                            // stage it with a copy kernel, then point at staging
+                const int64_t per = G == 2 ? kStagingBlobs / 2 : kStagingBlobs;
+                uint8_t* stage = staging_ + (size_t) (grp * per) * lay.max_blob;
+                fetch_blobs(p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), (int) per, cs);
+                rebase_ptrs((unsigned long long*) p_ptr2, p_counts + 2, stage, (int64_t) lay.blob_bytes(l), cs);
+            }
+            stamp(l, 21, grp);
+            // the PCIe share is pcie_frac of the misses: a few groups when the cache is cold, usually none (always none at
+            // pcie_frac 0), so its launch is kPcieGroupRows block rows striding over the groups, not cap of them
+            grouped(p_ptr2, p_start2, p_counts + 2, kPcieGroupRows, hit_out);
+            stamp(l, 22, grp);
+            if (device_plan_) {   // no CPU share when the device planned the group: its rows are zeros
+                wait_flag_ge_or(m_flag_, ring, skip_ + grp, cs);
+                copy_or_zero_from_mapped(parts_out, m_ymiss_ + (size_t) tb * K * N, (long long) n * K * N,
+                                         skip_ + grp, ring, cs);
+            } else {
+                wait_flag_ge(m_flag_, ring, cs);               // the CPU's share is in the mapped rows
+                stamp(l, 23, grp);
+                if (dec_batch)   // only the CPU rows cross PCIe (p_dst[0, counts[1]) = the GPU's own rows)
+                    copy_rows_from_mapped(parts_out, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K, N,
+                                          p_dst, p_counts + 1, cs);
+                else
+                    copy_from_mapped(parts_out, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K * N, cs);
+            }
+            moe_hit_add(parts_out, hit_out, p_dst, p_counts + 1, cap, N, cs);
+        }
+        if (!prof_on_ && sh_cs_ != nullptr && ev_fork_ != nullptr && ev_join_ != nullptr) {
+            cudaStreamWaitEvent(cs, ev_join_, 0);
         }
-        moe_hit_add(parts_ + (size_t) tb * K * N, hit_out, p_dst, p_counts + 1, cap, N, cs);
         if (dec_batch && n > 1 && native_moe_combine_enabled()) {   // one launch for the window's rows
             try {
                 native_moe_combine_multi(parts_ + (size_t) tb * K * N, w_ + tb * K, shared_ + tb * N, bo_ + tb * N, N, K, n, cs);
@@ -930,8 +1010,10 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         }
         stamp(l, 24, grp);
         if (l == g.n_layers - 1) {
-            for (int t = tb; t < te; ++t) gr_write(Rt(t), bo_ + t * N, inj2_ + t * HC, gs, Rt(t), cs);
-            if (cvec().covers(l)) cvec_apply(Rt(tb), l, n, HC * N, nullptr, 0, nullptr, 0, false, cs);
+            if (!fuse_head_gr) {
+                for (int t = tb; t < te; ++t) gr_write(Rt(t), bo_ + t * N, inj2_ + t * HC, gs, Rt(t), cs);
+                if (cvec().covers(l)) cvec_apply(Rt(tb), l, n, HC * N, nullptr, 0, nullptr, 0, false, cs);
+            }
         } else if (cvec().covers(l)) {
             cvec_apply(Rt(tb), l, n, HC * N, bo_ + tb * N, N, inj2_ + tb * HC, HC, true, cs);
         }
@@ -946,11 +1028,9 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
             if (l + 1 < le_ && !pre(l + 1, grp)) return false;
         }
     if (le_ < g.n_layers) {   // a layer split's earlier stage: hand the residual on, no head
-        for (int t = 0; t < T; ++t) {
-            copy_from_mapped(hand_out_ + (size_t) t * HB, Rt(t), HC * N, cs);
-            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N, bo_ + (size_t) t * N, N, cs);
-            copy_from_mapped(hand_out_ + (size_t) t * HB + HC * N + N, inj2_ + (size_t) t * HC, HC, cs);
-        }
+        copy_from_mapped(hand_out_, R_, (int64_t) T * HC * N, cs);
+        copy_from_mapped(hand_out_ + (size_t) T * HC * N, bo_, (int64_t) T * N, cs);
+        copy_from_mapped(hand_out_ + (size_t) T * (HC + 1) * N, inj2_, (int64_t) T * HC, cs);
         return true;
     }
 
@@ -960,14 +1040,33 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         const WeightRef *hn = wt.find("output_hc_norm.weight"), *hd = wt.find("output_hc_down.weight"),
                         *hu = wt.find("output_hc_up.weight");
         if (!hn || !hd || !hu) { err = "verify: an output_hc_* weight is missing"; return false; }
-        for (int t = 0; t < T; ++t) {
-            BlockBuffers bb = ss.block;
-            bb.R = Rt(t);
-            bb.mixed = head_mixed_ + t * N;
-            if (head_ != nullptr && head_->loaded()) {
-                if (!lm_head_mix(wt, g, bb, cs, err)) return false;
-            } else if (!lm_head(wt, g, bb, head_logits_ + (size_t) t * n_vocab_, cs, err)) {
-                return false;
+        if (fuse_head_gr) {
+            FusedGrArgs fa[kFusedGrMaxT];
+            for (int t = 0; t < T; ++t) {
+                FusedGrArgs& a = fa[t];
+                a.R = Rt(t); a.R_out = Rt(t); a.apply = true;
+                a.bo_prev = bo_ + t * N; a.inj_prev = inj2_ + t * HC;
+                a.w_norm = (const float*) hn->data;
+                a.w_down = (const uint16_t*) hd->data;
+                a.w_up = (const uint16_t*) hu->data;
+                a.w_inject = nullptr;
+                a.eps = EPS;
+                a.lo = lo_ + t * g.hc_lr;
+                a.rs = rs_ + t * HC;
+                a.inject_out = head_inj_;
+                a.mixed = head_mixed_ + t * N;
+            }
+            fused_gr_read_multi(fa, T, xn_, cs);
+        } else {
+            for (int t = 0; t < T; ++t) {
+                BlockBuffers bb = ss.block;
+                bb.R = Rt(t);
+                bb.mixed = head_mixed_ + t * N;
+                if (head_ != nullptr && head_->loaded()) {
+                    if (!lm_head_mix(wt, g, bb, cs, err)) return false;
+                } else if (!lm_head(wt, g, bb, head_logits_ + (size_t) t * n_vocab_, cs, err)) {
+                    return false;
+                }
             }
         }
         if (head_ != nullptr && head_->loaded()) {
@@ -1111,7 +1210,7 @@ bool Verifier::capture_commit(std::string& err) {
                 gdn_conv_commit(conv, qkv, (int) C, commit_, cs_);
                 gdn_step_norm_multi(state, h_L_ + (size_t) gdn_index * MT * C, (int) C, gate_L_ + (size_t) gdn_index * MT * HV,
                                     beta_L_ + (size_t) gdn_index * MT * HV, z_, (const float*) wnm->data, EPS, y_dummy_,
-                                    (int) g.ssm_k_heads, (int) HV, (int) MT, commit_, cs_);
+                                    (int) g.ssm_k_heads, (int) HV, (int) MT, commit_, cs_, (int) MT);
                 ++gdn_index;
             } else {
                 const QsaState& st = ss.qsa_states[qsa_index];
@@ -1146,6 +1245,31 @@ bool Verifier::capture_commit(std::string& err) {
     return true;
 }
 
+void Verifier::stage_inputs(int T, const int32_t* tokens, int64_t pos0) {
+    using namespace strata::kernels;
+    const ModelGeometry& g = *g_;
+    const QsaShapes s = shapes_of(g);
+    int32_t* const pk = h_pos_ + (size_t) max_t_ * g.n_head;
+    int32_t* const pi = pk + (size_t) max_t_ * g.n_head_kv;
+    for (int t = 0; t < T; ++t) {
+        h_tok_[t] = tokens[t];
+        qsa_step_fill(h_step_ + t * kStepCount, pos0 + t, s);
+        const int32_t pos_t = (int32_t) (pos0 + t);
+        for (int64_t h = 0; h < g.n_head; ++h) h_pos_[t * g.n_head + h] = pos_t;
+        for (int64_t h = 0; h < g.n_head_kv; ++h) pk[t * g.n_head_kv + h] = pos_t;
+        for (int64_t h = 0; h < g.idx_q_heads; ++h) pi[t * g.idx_q_heads + h] = pos_t;
+    }
+    *(volatile uint32_t*) h_seq_ = 0;
+    *(volatile uint32_t*) h_flag_ = 0;
+    *(volatile uint32_t*) h_flagA_ = 0;
+    *(volatile uint32_t*) h_flagB_ = 0;
+    std::atomic_thread_fence(std::memory_order_seq_cst);
+    last_t_ = T;
+    last_pos0_ = pos0;
+    for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
+    staged_ = true;
+}
+
 bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool, void* user, int32_t* out,
                    std::string& err) {
     using namespace strata::kernels;
@@ -1158,36 +1282,22 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     if (!capture(T, err) || !capture_commit(err)) return false;
     VDBG("captured; staging\n");
     const Clock::time_point t0 = Clock::now();
-    const QsaShapes s = shapes_of(g);
-    for (int t = 0; t < T; ++t) {
-        h_tok_[t] = tokens[t];
-        qsa_step_fill(h_step_ + t * kStepCount, pos0 + t, s);
-        for (int64_t h = 0; h < g.n_head; ++h) h_pos_[t * g.n_head + h] = (int32_t) (pos0 + t);
-        int32_t* pk = h_pos_ + (size_t) max_t_ * g.n_head;
-        int32_t* pi = pk + (size_t) max_t_ * g.n_head_kv;
-        for (int64_t h = 0; h < g.n_head_kv; ++h) pk[t * g.n_head_kv + h] = (int32_t) (pos0 + t);
-        for (int64_t h = 0; h < g.idx_q_heads; ++h) pi[t * g.idx_q_heads + h] = (int32_t) (pos0 + t);
-    }
-    if (ss.ple.ready() && ple_stage()) {
-        uint32_t rows[kVerifyMaxT * PLE_N_HEADS];
+    if (!staged_) stage_inputs(T, tokens, pos0);
+    staged_ = false;
+    const bool do_ple = ss.ple.ready() && ple_stage();
+    uint32_t ple_rows[kVerifyMaxT * PLE_N_HEADS];
+    if (do_ple) {
         int32_t prev[2] = {ss.ple_prev[0], ss.ple_prev[1]};
         for (int t = 0; t < T; ++t) {
-            ngram_rows(&tokens[t], prev, 1, ss.ple.consts, rows + t * PLE_N_HEADS);
+            ngram_rows(&tokens[t], prev, 1, ss.ple.consts, ple_rows + t * PLE_N_HEADS);
             prev[0] = prev[1];
             prev[1] = tokens[t];
+            ss.ple.table->prefetch_rows(ple_rows + t * PLE_N_HEADS);
         }
-        if (!ss.ple.table->gather_batch(rows, (size_t) T, h_ple_, err)) return false;
     }
-    *(volatile uint32_t*) h_seq_ = 0;
-    *(volatile uint32_t*) h_flag_ = 0;
-    *(volatile uint32_t*) h_flagA_ = 0;
-    *(volatile uint32_t*) h_flagB_ = 0;
     if (trace_h_ != nullptr) std::memset(trace_h_, 0, trace_n_ * 8);   // #649: this window's breadcrumbs only
     std::atomic_thread_fence(std::memory_order_seq_cst);
     trace_ev("WINDOW", -1, -1, pos0 * 16 + T);
-    last_t_ = T;
-    last_pos0_ = pos0;
-    for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
     ms_host += ms_since(t0);
     VDBG("staged; launching\n");
     const cudaError_t le = cudaGraphLaunch(exec_[T], cs_);
@@ -1201,6 +1311,18 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     const int gtb[2] = {0, (T + 1) / 2}, gte[2] = {G == 2 ? (T + 1) / 2 : T, T};
     const int64_t steps = (le_ - lb_) * G;
     const bool test_stall = g_test_stall > 0 && windows + 1 == g_test_stall;   // #267 test hook (off: false)
+    if (all_resident_ && !test_stall) {
+        if (do_ple) {
+            const Clock::time_point tp = Clock::now();
+            if (!ss.ple.table->gather_batch(ple_rows, (size_t) T, h_ple_, err)) return false;
+            std::atomic_thread_fence(std::memory_order_seq_cst);
+            _mm_sfence();
+            *flag = 1;
+            ms_host += ms_since(tp);
+        } else {
+            *flag = 1;
+        }
+    } else
     for (int64_t k = 0; k < steps; ++k) {
         const int64_t l = lb_ + k / G;
         const int grp = (int) (k % G);
@@ -1264,10 +1386,22 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
             *(volatile uint32_t*) h_flagA_ = want;
             raise_flag(h_flagB_, want);
         }
+        // Layer 1's pre(1, 0) copies h_ple_ -> ple_ after Layer 0's wait_flag_ge(m_flag_, 1).
+        // By collecting PLE here at k == 0 (after publishing flagA/flagB for Layer 0 so the GPU can run
+        // Layer 0's VRAM experts, and before raising *flag = 1), the NVMe PLE reads overlap with both
+        // MtpDrafter::draft and Layer 0's attention + router + expert execution!
+        if (k == 0 && do_ple) {
+            const Clock::time_point tp = Clock::now();
+            if (!ss.ple.table->gather_batch(ple_rows, (size_t) T, h_ple_, err)) return false;
+            std::atomic_thread_fence(std::memory_order_seq_cst);
+            _mm_sfence();
+            ms_host += ms_since(tp);
+        }
         if (!(test_stall && k + 1 == steps)) *flag = want;
         ms_wait += std::chrono::duration<double, std::milli>(b - a).count();
         ms_pool += ms_since(b);
     }
+    if (next_ != nullptr) next_->stage_inputs(T, tokens, pos0);
     progress_at("verify window: waiting for the GPU to finish the window (flags A/B/M raised)", (int64_t) T);
     // #267: a window the GPU never finishes (a spin kernel that never sees its flag) holds the host here; the stall
     // watchdog then releases every verifier's GPU waits (release_live_verifiers) before it ends the engine, so no
@@ -1278,8 +1412,12 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
     const cudaError_t se = cudaStreamSynchronize(cs_);
     trace_ev("SYNCED", -1, -1, (int64_t) se);
     if (se != cudaSuccess) { err = std::string("verify: ") + cudaGetErrorString(se); return false; }
+    commit_pending_ = false;
     progress_at("verify window: waiting for the expert copies", (int64_t) T);
-    cudaStreamSynchronize(copy_);   // no host function of this window may raise flag B in the next one
+    if (copy_used_) {
+        cudaStreamSynchronize(copy_);   // no host function of this window may raise flag B in the next one
+        copy_used_ = false;
+    }
     if (prof_on_ && G == 1) {       // the window's GPU stage stamps
         cudaMemcpy(prof_h_.data(), prof_, prof_h_.size() * 8, cudaMemcpyDeviceToHost);
         const int64_t L = g.n_layers;
@@ -1395,6 +1533,7 @@ void Verifier::fetch_dma(void* ctx, const uint8_t* const* src, int n, size_t byt
     Verifier* v = (Verifier*) ctx;
     const uint32_t want = v->cur_layer_ + 1;
     if (n <= 0) { raise_flag(v->h_flagB_, want); return; }
+    v->copy_used_ = true;
     uint8_t* stage = (uint8_t*) v->sink_.staging;                  // this group's half in a split window
     for (int i = 0; i < n; ++i) cudaMemcpyAsync(stage + (size_t) i * bytes, src[i], bytes, cudaMemcpyHostToDevice, v->copy_);
     FlagSet& fs = v->flag_sets_[v->cur_layer_ % (sizeof v->flag_sets_ / sizeof v->flag_sets_[0])];
@@ -1481,12 +1620,13 @@ bool Verifier::commit(int n_keep, std::string& err) {
     // set_commit_async: no wait here - the next window runs on the same stream after it, and the drafter (its own
     // stream) reads only this window's final rows and its own K/V. h_commit_ is next written after the next window's
     // results are read, i.e. after this graph has run.  Everything else waits on commit_done_ (wait_commit).
-    if (!g_commit_async || next_ != nullptr) {
+    if (!g_commit_async) {
         const cudaError_t se = cudaStreamSynchronize(cs_);
         if (se != cudaSuccess) { err = std::string("verify: commit: ") + cudaGetErrorString(se); return false; }
     } else {
         const cudaError_t re = cudaEventRecord(commit_done_, cs_);
         if (re != cudaSuccess) { err = std::string("verify: commit event: ") + cudaGetErrorString(re); return false; }
+        (void) cudaStreamQuery(cs_);
         commit_pending_ = true;
     }
     if (ple_stage())   // stages that share one session must advance it once
diff --git a/src/kernels/cpu/expert_layout.cpp b/src/kernels/cpu/expert_layout.cpp
index 4583b1077c2..7b61e4c7228 100644
--- a/src/kernels/cpu/expert_layout.cpp
+++ b/src/kernels/cpu/expert_layout.cpp
@@ -53,6 +53,38 @@ bool cpu_avx512_ok() {
     return ok;
 }
 
+bool cpu_avx512bw_ok() {
+    static const bool ok = [] {
+        if (const char* f = std::getenv("STRATA_FORCE_AVX2"); f != nullptr && f[0] == '1') return false;
+        unsigned r[4] = {0, 0, 0, 0};
+        auto cpuid = [&](unsigned leaf, unsigned sub) {
+#if defined(_MSC_VER)
+            int x[4];
+            __cpuidex(x, (int) leaf, (int) sub);
+            for (int i = 0; i < 4; ++i) r[i] = (unsigned) x[i];
+#else
+            __cpuid_count(leaf, sub, r[0], r[1], r[2], r[3]);
+#endif
+        };
+        cpuid(0, 0);
+        if (r[0] < 7) return false;
+        cpuid(1, 0);
+        if (!((r[2] >> 27) & 1u)) return false;             // OSXSAVE
+#if defined(_MSC_VER)
+        const unsigned long long xcr0 = _xgetbv(0);
+#else
+        unsigned lo = 0, hi = 0;
+        __asm__ volatile("xgetbv" : "=a"(lo), "=d"(hi) : "c"(0));
+        const unsigned long long xcr0 = ((unsigned long long) hi << 32) | lo;
+#endif
+        if ((xcr0 & 0xE6) != 0xE6) return false;          // the OS saves the AVX-512 state
+        cpuid(7, 0);
+        const unsigned ebx = r[1];
+        return ((ebx >> 16) & 1u) && ((ebx >> 17) & 1u) && ((ebx >> 30) & 1u) && ((ebx >> 31) & 1u);
+    }();
+    return ok;
+}
+
 bool cpu_avx2_ok() {
     static const bool ok = [] {
         unsigned r[4] = {0, 0, 0, 0};
diff --git a/src/kernels/cpu/native_expert.cpp b/src/kernels/cpu/native_expert.cpp
index 0903761e619..b274dc65921 100644
--- a/src/kernels/cpu/native_expert.cpp
+++ b/src/kernels/cpu/native_expert.cpp
@@ -83,7 +83,7 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // first, then the AVX-2 one (Zen 2/3, Intel 12th-14th gen).  STRATA_NO_IQ512 drops an AVX-512 CPU to the
     // AVX-2 kernel, STRATA_NO_IQ256 drops the AVX-2 kernel; ggml-cpu's single-token vec_dot is reached only with
     // both set (and on a CPU without AVX-512, STRATA_NO_IQ512 changes nothing).
-    static const bool avx512 = cpu_avx512_ok() && std::getenv("STRATA_NO_IQ512") == nullptr;
+    static const bool avx512 = cpu_avx512bw_ok() && std::getenv("STRATA_NO_IQ512") == nullptr;
     static const bool avx2 = std::getenv("STRATA_NO_IQ256") == nullptr;
     // #152: from how many tokens the multi-token kernels run (ggml's vec_dot below that).  The default 2 is the
     // measured-fastest rule, but a token's expert rows then round differently alone than in a group, so greedy output
@@ -101,7 +101,7 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // A format with only an AVX-2 kernel (IQ4_XS, #415) takes it on AVX-2 CPUs only: an AVX-512 CPU keeps ggml-cpu for
     // it, as before (its rows would round differently).  Each kernel only for the formats it implements: falling
     // through an empty switch would leave ff unwritten instead of falling back to ggml-cpu.
-    static const bool cpu512 = cpu_avx512_ok();
+    static const bool cpu512 = cpu_avx512bw_ok();
     if (nt >= mt_min && (iq512_supported(f.gu_type) || (!cpu512 && iq256_supported(f.gu_type)))) {
         if (avx512 && iq512_supported(f.gu_type)) {
             iq512_gu_rows(f.gu_type, blob, f.gu_row, f.up_off, (int) f.n_embd, act, nt, ff, r0, r1);
diff --git a/src/kernels/cuda/elementwise.cu b/src/kernels/cuda/elementwise.cu
index 4d670e997f1..4817763dbe8 100644
--- a/src/kernels/cuda/elementwise.cu
+++ b/src/kernels/cuda/elementwise.cu
@@ -294,11 +294,34 @@ __global__ void doorbell_publish_kernel(const float* __restrict__ x, const int32
                                         const float* __restrict__ w, int n, int k, float* x_out, int32_t* ids_out,
                                         float* w_out, uint32_t* seq) {
     for (int i = threadIdx.x; i < n; i += blockDim.x) x_out[i] = x[i];
-    if ((int) threadIdx.x < k) { ids_out[threadIdx.x] = ids[threadIdx.x]; w_out[threadIdx.x] = w[threadIdx.x]; }
+    if ((int) threadIdx.x < k) {
+        ids_out[threadIdx.x] = ids[threadIdx.x];
+        if (w_out != nullptr) w_out[threadIdx.x] = w[threadIdx.x];
+    }
     __threadfence_system();
     __syncthreads();
     if (threadIdx.x == 0) {
+        *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;
+    }
+}
+
+__global__ void doorbell_publish_res_kernel(const float* __restrict__ x, const int32_t* __restrict__ ids,
+                                            const int32_t* __restrict__ d_res, int n_expert, int n, int k,
+                                            float* x_out, int32_t* ids_out, uint32_t* seq) {
+    int any_miss = 0;
+    if ((int) threadIdx.x < k) {
+        const int32_t id = ids[threadIdx.x];
+        ids_out[threadIdx.x] = id;
+        if (d_res == nullptr || id < 0 || id >= n_expert || d_res[id] < 0) any_miss = 1;
+    }
+    if (__syncthreads_or(any_miss)) {
+        for (int i = threadIdx.x; i < n; i += blockDim.x) x_out[i] = x[i];
         __threadfence_system();
+    } else if ((int) threadIdx.x < k) {
+        __threadfence_system();
+    }
+    __syncthreads();
+    if (threadIdx.x == 0) {
         *(volatile uint32_t*) seq = *(volatile uint32_t*) seq + 1u;
     }
 }
@@ -335,6 +358,14 @@ void doorbell_publish(const float* x, const int32_t* ids, const float* weights,
     check_launch("doorbell_publish");
 }
 
+void doorbell_publish_res(const float* x, const int32_t* ids, const int32_t* d_res, int n_expert, int64_t n, int64_t k,
+                          float* x_out, int32_t* ids_out, uint32_t* d_seq, void* stream) {
+    if (k > 1024) { std::fprintf(stderr, "doorbell_publish_res: k too large\n"); std::exit(1); }
+    doorbell_publish_res_kernel<<<1, 1024, 0, (cudaStream_t) stream>>>(x, ids, d_res, n_expert, (int) n, (int) k,
+                                                                        x_out, ids_out, d_seq);
+    check_launch("doorbell_publish_res");
+}
+
 __global__ void copy_i32_from_mapped_kernel(int32_t* __restrict__ dst, const volatile int32_t* src, int n) {
     for (int i = threadIdx.x; i < n; i += blockDim.x) dst[i] = src[i];
 }
diff --git a/src/kernels/cuda/fused_gr.cu b/src/kernels/cuda/fused_gr.cu
index c9d1b80daa3..15e78af908d 100644
--- a/src/kernels/cuda/fused_gr.cu
+++ b/src/kernels/cuda/fused_gr.cu
@@ -320,13 +320,13 @@ __global__ void __launch_bounds__(THREADS) gr_up_multi_kernel(GrMulti m) {
 constexpr int PR = LR + HC;                        // partial rows per (token, stream): 320 down + 4 inject
 constexpr int TQ3 = N / 8 / 32;                    // uint4 weight chunks per lane in one stream's slice (10)
 
-template <int S>
+template <int S, int MAX_T = kFusedGrMaxT, bool EXACT_T = false>
 __global__ void __launch_bounds__(THREADS) gr_down_v3_kernel(GrMulti m, float* __restrict__ part, float* __restrict__ ssg) {
     extern __shared__ __align__(16) float xs[];    // [T][N / S]
     constexpr int R2 = 1;                          // down rows per warp
-    __shared__ float red[WARPS][kFusedGrMaxT];
+    __shared__ float red[WARPS][MAX_T];
     const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
-    const int T = m.T;
+    const int T = EXACT_T ? MAX_T : m.T;
     // S = 2: each stream's 2560 columns in two halves (blockIdx.y = stream * S + half): twice the blocks
     constexpr int SL = N / S, TQS = SL / 8 / 32;
     const int rg = blockIdx.x, c = blockIdx.y / S, h = blockIdx.y - (blockIdx.y / S) * S;
@@ -337,19 +337,11 @@ __global__ void __launch_bounds__(THREADS) gr_down_v3_kernel(GrMulti m, float* _
     const int nrows = inject_block ? ((m.a[0].w_inject != nullptr && warp < HC) ? 1 : 0) : R2;
     const bool active = nrows > 0;
     const uint16_t* wbase = inject_block ? m.a[0].w_inject : m.a[0].w_down;
-    uint4 wv[R2][TQS];
-#pragma unroll
-    for (int r = 0; r < R2; ++r) {
-        if (r >= nrows) break;
-        const uint4* w4 = reinterpret_cast<const uint4*>(wbase + (size_t) (row0 + r) * D + (size_t) c * N + (size_t) h * SL);
+    float ssp[MAX_T];
 #pragma unroll
-        for (int q = 0; q < TQS; ++q) wv[r][q] = __ldg(w4 + lane + 32 * q);
-    }
-    float ssp[kFusedGrMaxT];
-#pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) {
+    for (int k = 0; k < MAX_T; ++k) {
         ssp[k] = 0.0f;
-        if (k >= T) continue;
+        if (!EXACT_T && k >= T) continue;
         const FusedGrArgs& a = m.a[k];
         const float gw = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
         const float4* R4 = reinterpret_cast<const float4*>(a.R + (size_t) c * N + (size_t) h * SL);
@@ -369,8 +361,8 @@ __global__ void __launch_bounds__(THREADS) gr_down_v3_kernel(GrMulti m, float* _
         }
     }
 #pragma unroll
-    for (int k = 0; k < kFusedGrMaxT; ++k) {
-        if (k >= T) break;
+    for (int k = 0; k < MAX_T; ++k) {
+        if (!EXACT_T && k >= T) break;
         const float v = warp_sum(ssp[k]);
         if (lane == 0) red[warp][k] = v;
     }
@@ -384,34 +376,36 @@ __global__ void __launch_bounds__(THREADS) gr_down_v3_kernel(GrMulti m, float* _
 #pragma unroll
     for (int r = 0; r < R2; ++r) {
         if (r >= nrows) break;
-        float acc[kFusedGrMaxT];
+        const uint4* w4 = reinterpret_cast<const uint4*>(wbase + (size_t) (row0 + r) * D + (size_t) c * N + (size_t) h * SL);
+        float acc[MAX_T];
 #pragma unroll
-        for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+        for (int k = 0; k < MAX_T; ++k) acc[k] = 0.0f;
 #pragma unroll
         for (int q = 0; q < TQS; ++q) {
             const int j = lane + 32 * q;
+            const uint4 wvq = __ldg(w4 + j);
 #pragma unroll
-            for (int k = 0; k < kFusedGrMaxT; ++k)
-                if (k < T) acc[k] += dot8(wv[r][q], xs + (size_t) k * SL + j * 8);
+            for (int k = 0; k < MAX_T; ++k)
+                if (EXACT_T || k < T) acc[k] += dot8(wvq, xs + (size_t) k * SL + j * 8);
         }
         const int prow = inject_block ? LR + warp : row0 + r;
 #pragma unroll
-        for (int k = 0; k < kFusedGrMaxT; ++k) {
-            if (k >= T) break;
+        for (int k = 0; k < MAX_T; ++k) {
+            if (!EXACT_T && k >= T) break;
             const float v = warp_sum(acc[k]);
             if (lane == 0) part[(((size_t) k * HC + c) * S + h) * PR + prow] = v;
         }
     }
 }
 
-template <int S>
+template <int S, int MAX_T = kFusedGrMaxT, bool EXACT_T = false>
 __global__ void __launch_bounds__(THREADS) gr_up_v3_kernel(GrMulti m, const float* __restrict__ part,
                                                            const float* __restrict__ ssg) {
-    __shared__ __align__(16) float lo[kFusedGrMaxT][LR];
-    __shared__ float rsS[kFusedGrMaxT][HC];
-    __shared__ float g[kFusedGrMaxT][HC][UPM_COLS];
+    __shared__ __align__(16) float lo[MAX_T][LR];
+    __shared__ float rsS[MAX_T][HC];
+    __shared__ float g[MAX_T][HC][UPM_COLS];
     const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
-    const int T = m.T;
+    const int T = EXACT_T ? MAX_T : m.T;
     const int d0 = blockIdx.x * UPM_COLS;
     constexpr int RPW = HC * UPM_COLS / WARPS;     // 8 rows per warp
     if (t < T * HC) {
@@ -470,8 +464,8 @@ __global__ void __launch_bounds__(THREADS) gr_up_v3_kernel(GrMulti m, const floa
         }
         float mine = 0.0f;
 #pragma unroll
-        for (int k = 0; k < kFusedGrMaxT; ++k) {
-            if (k >= T) break;
+        for (int k = 0; k < MAX_T; ++k) {
+            if (!EXACT_T && k >= T) break;
             float acc = dot8(wa, lo[k] + lane * 8);
             if (lane < LR / 8 - 32) acc += dot8(wb, lo[k] + (32 + lane) * 8);
             acc = warp_sum(acc);
@@ -843,12 +837,16 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
             int optin = 0;
             cudaDeviceGetAttribute(&optin, cudaDevAttrMaxSharedMemoryPerBlockOptin, dev3);
             const int limit = optin > 0 ? optin : 48 * 1024;
-            const int need1 = (int) (kFusedGrMaxT * N * sizeof(float)), need2 = need1 / 2;
+            const int need1 = (int) (kFusedGrMaxT * N * sizeof(float)), need6 = (int) (6 * N * sizeof(float)), need2 = need1 / 2;
             int split = -1;
             if (need1 <= limit &&
-                cudaFuncSetAttribute(gr_down_v3_kernel<1>, cudaFuncAttributeMaxDynamicSharedMemorySize, need1) == cudaSuccess)
+                cudaFuncSetAttribute(gr_down_v3_kernel<1, kFusedGrMaxT, false>, cudaFuncAttributeMaxDynamicSharedMemorySize, need1) == cudaSuccess &&
+                cudaFuncSetAttribute(gr_down_v3_kernel<1, 6, true>, cudaFuncAttributeMaxDynamicSharedMemorySize, need6) == cudaSuccess) {
+                cudaFuncSetAttribute(gr_down_v3_kernel<1, 4, true>, cudaFuncAttributePreferredSharedMemoryCarveout, 100);
+                cudaFuncSetAttribute(gr_down_v3_kernel<1, 4, false>, cudaFuncAttributePreferredSharedMemoryCarveout, 100);
+                cudaFuncSetAttribute(gr_down_v3_kernel<1, 2, true>, cudaFuncAttributePreferredSharedMemoryCarveout, 100);
                 split = 1;
-            else if (need2 <= limit)
+            } else if (need2 <= limit)
                 // #375 (kenh0u): the S = 2 split (a 64 KB opt-in card: Turing) disagrees with itself in gr_parity
                 // (graph replay vs direct call) - such a card keeps the default read until that split is fixed
                 std::fprintf(stderr, "strata: STRATA_GR_V3=1 needs the two-half split on this card, which fails its "
@@ -864,10 +862,18 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         const size_t sm = (size_t) n_tok * (N / split) * sizeof(float);
         if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, stream);
         if (split == 2) gr_down_v3_kernel<2><<<dim3(LR / WARPS + 1, HC * 2), THREADS, sm, st>>>(m, part, ssg);
-        else gr_down_v3_kernel<1><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
+        else if (n_tok == 2) gr_down_v3_kernel<1, 2, true><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
+        else if (n_tok == 4) gr_down_v3_kernel<1, 4, true><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
+        else if (n_tok == 6) gr_down_v3_kernel<1, 6, true><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
+        else if (n_tok < 4) gr_down_v3_kernel<1, 4, false><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
+        else gr_down_v3_kernel<1, kFusedGrMaxT, false><<<dim3(LR / WARPS + 1, HC), THREADS, sm, st>>>(m, part, ssg);
         if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
         if (split == 2) gr_up_v3_kernel<2><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
-        else gr_up_v3_kernel<1><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
+        else if (n_tok == 2) gr_up_v3_kernel<1, 2, true><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
+        else if (n_tok == 4) gr_up_v3_kernel<1, 4, true><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
+        else if (n_tok == 6) gr_up_v3_kernel<1, 6, true><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
+        else if (n_tok < 4) gr_up_v3_kernel<1, 4, false><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
+        else gr_up_v3_kernel<1, kFusedGrMaxT, false><<<UPM_BLOCKS, THREADS, 0, st>>>(m, part, ssg);
         const cudaError_t e3 = cudaGetLastError();
         if (e3 != cudaSuccess) {
             std::fprintf(stderr, "fused_gr_read_multi v3: %s\n", cudaGetErrorString(e3));
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 15be7d5936c..fc78b065161 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -561,15 +561,16 @@ template<int TY> inline constexpr bool kSplit = false;
 template<> inline constexpr bool kSplit<16> = true;
 template<> struct Split<16> {   // IQ2_XXS
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq2_xxs* bq2 = (const block_iq2_xxs*) vbq + kbx;
         const int q2 = get_int_b2(bq2->qs, iqs);
         const uint8_t* aux8 = (const uint8_t*) &q2;
         const uint32_t aux32 = get_int_b2(bq2->qs, iqs + 1);
+        const uint2* grid_lut = s_grid ? (const uint2*) s_grid : (const uint2*) iq2xxs_grid;
         W r;
 #pragma unroll
         for (int k0 = 0; k0 < 8; k0 += 2) {
-            const uint2 grid_pos = ((const uint2*) iq2xxs_grid)[aux8[k0 / 2]];
+            const uint2 grid_pos = grid_lut[aux8[k0 / 2]];
             const uint32_t signs = unpack_ksigns(aux32 >> (7 * k0 / 2));
             const int signs0 = __vcmpne4(signs & 0x08040201, 0);
             r.g[k0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -605,16 +606,17 @@ struct SplitLs2 {
 };
 template<> inline constexpr bool kSplit<17> = true;
 template<> struct Split<17> : SplitLs2 {   // IQ2_XS
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
         const int2 q2_packed = make_int2(get_int_b2(bq2->qs, iqs + 0), get_int_b2(bq2->qs, iqs + 1));
         const uint16_t* q2 = (const uint16_t*) &q2_packed;
+        const uint2* grid_lut = s_grid ? (const uint2*) s_grid : (const uint2*) iq2xs_grid;
         W r;
         r.ls0 = bq2->scales[iqs / 2] & 0x0F;
         r.ls1 = bq2->scales[iqs / 2] >> 4;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const uint2 grid_pos = ((const uint2*) iq2xs_grid)[q2[l0 / 2] & 0x1FF];
+            const uint2 grid_pos = grid_lut[q2[l0 / 2] & 0x1FF];
             const uint32_t signs = unpack_ksigns(q2[l0 / 2] >> 9);
             const int signs0 = __vcmpne4(signs & 0x08040201, 0);
             r.g[l0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -627,19 +629,20 @@ template<> struct Split<17> : SplitLs2 {   // IQ2_XS
 };
 template<> inline constexpr bool kSplit<22> = true;
 template<> struct Split<22> : SplitLs2 {   // IQ2_S
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
         const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq2->qh[iqs / 2];
         const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
         const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+        const uint64_t* grid_lut = s_grid ? (const uint64_t*) s_grid : iq2s_grid;
         W r;
         r.ls0 = bq2->scales[iqs / 2] & 0x0F;
         r.ls1 = bq2->scales[iqs / 2] >> 4;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int* grid_pos = (const int*) (iq2s_grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+            const int* grid_pos = (const int*) (grid_lut + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
             const int signs0 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x03) << 7) | ((signs_packed_8[l0 / 2] & 0x0C) << 21), 0x00000000);
             const int signs1 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x30) << 3) | ((signs_packed_8[l0 / 2] & 0xC0) << 17), 0x00000000);
             r.g[l0 + 0] = __vsub4(grid_pos[0] ^ signs0, signs0);
@@ -652,15 +655,16 @@ template<> struct Split<22> : SplitLs2 {   // IQ2_S
 template<> inline constexpr bool kSplit<18> = true;
 template<> struct Split<18> {   // IQ3_XXS
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
         const int2 q3_packed = make_int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
         const uint8_t* q3 = (const uint8_t*) &q3_packed;
         const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq3xxs_grid;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int2 grid_pos = make_int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
+            const int2 grid_pos = make_int2(grid_lut[q3[l0 + 0]], grid_lut[q3[l0 + 1]]);
             const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
             const int signs0 = __vcmpne4(signs & 0x08040201, 0);
             r.g[l0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -683,18 +687,19 @@ template<> struct Split<18> {   // IQ3_XXS
 template<> inline constexpr bool kSplit<21> = true;
 template<> struct Split<21> {   // IQ3_S
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
         const int2 qs_packed = make_int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq3->qh[iqs / 2];
         const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
         const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq3s_grid;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int2 grid_pos = make_int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
-                                            iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+            const int2 grid_pos = make_int2(grid_lut[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                                            grid_lut[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
             const int signs0 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x03) << 7) | ((signs_packed_8[l0 / 2] & 0x0C) << 21), 0x00000000);
             const int signs1 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x30) << 3) | ((signs_packed_8[l0 / 2] & 0xC0) << 17), 0x00000000);
             r.g[l0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -716,15 +721,16 @@ template<> struct Split<21> {   // IQ3_S
 template<> inline constexpr bool kSplit<29> = true;
 template<> struct Split<29> {   // IQ1_M
     struct W { int g[8]; float delta[4]; int sc0, sc1; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
         const block_iq1_m* bq1 = (const block_iq1_m*) vbq + kbx;
         const int qs_packed = get_int_b4(bq1->qs, iqs);
         const uint8_t* qs = (const uint8_t*) &qs_packed;
+        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq1s_grid_gpu;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
             const int qhl = bq1->qh[2 * iqs + l0 / 4] >> (4 * ((l0 / 2) % 2));
-            const int grid = iq1s_grid_gpu[qs[l0 / 2] | ((qhl & 0x07) << 8)];
+            const int grid = grid_lut[qs[l0 / 2] | ((qhl & 0x07) << 8)];
             r.g[l0 + 0] = (grid >> 0) & 0x0F0F0F0F;
             r.g[l0 + 1] = (grid >> 4) & 0x0F0F0F0F;
             r.delta[l0 / 2] = -1.0f + IQ1M_DELTA - (qhl & 0x08) * (2.0f * IQ1M_DELTA / 0x08);
@@ -759,7 +765,7 @@ template<> struct Split<29> {   // IQ1_M
 template<> inline constexpr bool kSplit<20> = true;
 template<> struct Split<20> {   // IQ4_NL
     struct W { int2 v[2]; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
         const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
         W r;
 #pragma unroll
@@ -782,7 +788,7 @@ template<> struct Split<20> {   // IQ4_NL
 template<> inline constexpr bool kSplit<23> = true;
 template<> struct Split<23> {   // IQ4_XS
     struct W { int2 v[4]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
         const block_iq4_xs* bq4 = (const block_iq4_xs*) vbq + kbx;
         W r;
 #pragma unroll
@@ -808,7 +814,7 @@ template<> struct Split<23> {   // IQ4_XS
 template<> inline constexpr bool kSplit<42> = true;
 template<> struct Split<42> {   // Q2_0
     struct W { int qx[4], qy[4]; float d2; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs) {
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
         const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
         W r;
         r.d2 = bq2_0->d;
@@ -841,31 +847,172 @@ template<> struct Split<42> {   // Q2_0
 // One row against the n <= NC activations x + off[0..n) (n >= 1, warp-uniform; offsets in q8_1 blocks, 32-bit to
 // spare registers), the whole warp.  Per activation this is row_dot: the same calls k, lane-strided the same way,
 // summed in the same order, then the same warp_sum.  Only the weight side moves out of the per-activation loop.
-template<int TY, int NC>
+template<int TY, int NC, bool EXACT_N = false>
 __device__ __forceinline__ void row_dot_multi(const uint8_t* row, const block_q8_1* x, const int (&off)[NC], int n,
-                                              int nb, int lane, float (&s)[NC]) {
+                                              int nb, int lane, float (&s)[NC], const void* __restrict__ s_grid = nullptr) {
     using F = Fmt<TY>;
     using S = Split<TY>;
 #pragma unroll
     for (int c = 0; c < NC; ++c) s[c] = 0.0f;
     for (int k = lane; k < nb * F::ipb; k += 32) {
         const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
-        const typename S::W w = S::load(row, kbx, iqs);
+        const typename S::W w = S::load(row, kbx, iqs, s_grid);
 #pragma unroll
         for (int c = 0; c < NC; ++c)
-            if (c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+            if (EXACT_N || c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
     }
 #pragma unroll
     for (int c = 0; c < NC; ++c)
-        if (c < n) s[c] = warp_sum(s[c]);
+        if (EXACT_N || c < n) s[c] = warp_sum(s[c]);
+}
+
+// 8-lane sub-warp row dot for K = nb * ipb == 40 (TD == 20, IQ4_NL with n_ff == 640):
+// 4 rows per warp (32 rows per 256-thread block), 100% active lanes, bitwise identical addition tree to row_dot_multi.
+template<int TY, int NC, bool EXACT_N = false>
+__device__ __forceinline__ void row_dot_40_sub8(const uint8_t* row, const block_q8_1* x, const int (&off)[NC], int n,
+                                                int t, float (&s)[NC]) {
+    using F = Fmt<TY>;
+    using S = Split<TY>;
+#pragma unroll
+    for (int c = 0; c < NC; ++c) s[c] = 0.0f;
+    for (int k = t; k < 40; k += 32) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (EXACT_N || c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+    }
+    {
+        const int k = t + 16, kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c) {
+            if (EXACT_N || c < n) {
+                float s16 = 0.0f;
+                s16 += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+                s[c] = __fadd_rn(s[c], s16);
+            }
+        }
+    }
+    float s8[NC];
+#pragma unroll
+    for (int c = 0; c < NC; ++c) s8[c] = 0.0f;
+    {
+        const int k = t + 8, kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (EXACT_N || c < n) s8[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+    }
+    {
+        const int k = t + 24, kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c) {
+            if (EXACT_N || c < n) {
+                float s24 = 0.0f;
+                s24 += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+                s[c] = __fadd_rn(s[c], __fadd_rn(s8[c], s24));
+            }
+        }
+    }
+#pragma unroll
+    for (int c = 0; c < NC; ++c) {
+        if (EXACT_N || c < n) {
+#pragma unroll
+            for (int o = 4; o > 0; o >>= 1) s[c] += __shfl_xor_sync(0xffffffffu, s[c], o);
+        }
+    }
 }
 
+// 16-lane sub-warp row dot for K = nb * ipb == 20 (TD == 42, Q2_0 with n_ff == 640):
+// 2 rows per warp (16 rows per 256-thread block), bitwise identical addition tree to row_dot_multi.
+template<int TY, int NC, bool EXACT_N = false>
+__device__ __forceinline__ void row_dot_20_sub16(const uint8_t* row, const block_q8_1* x, const int (&off)[NC], int n,
+                                                 int t, float (&s)[NC]) {
+    using F = Fmt<TY>;
+    using S = Split<TY>;
+#pragma unroll
+    for (int c = 0; c < NC; ++c) s[c] = 0.0f;
+    {
+        const int k = t, kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (EXACT_N || c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+    }
+    float s16[NC];
+#pragma unroll
+    for (int c = 0; c < NC; ++c) s16[c] = 0.0f;
+    if (t < 4) {
+        const int k = t + 16, kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const typename S::W w = S::load(row, kbx, iqs);
+#pragma unroll
+        for (int c = 0; c < NC; ++c)
+            if (EXACT_N || c < n) s16[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
+    }
+#pragma unroll
+    for (int c = 0; c < NC; ++c) {
+        if (EXACT_N || c < n) {
+            s[c] = __fadd_rn(s[c], s16[c]);
+#pragma unroll
+            for (int o = 8; o > 0; o >>= 1) s[c] += __shfl_xor_sync(0xffffffffu, s[c], o);
+        }
+    }
+}
+
+template<int TY>
+__device__ __forceinline__ const void* stage_iq_grid(uint32_t* s_buf, int tid, int nthreads) {
+    if constexpr (TY == 16) {
+        uint2* dst = (uint2*) s_buf;
+        const uint2* src = (const uint2*) iq2xxs_grid;
+        for (int i = tid; i < 256; i += nthreads) dst[i] = src[i];
+        __syncthreads();
+        return dst;
+    } else if constexpr (TY == 17) {
+        uint2* dst = (uint2*) s_buf;
+        const uint2* src = (const uint2*) iq2xs_grid;
+        for (int i = tid; i < 512; i += nthreads) dst[i] = src[i];
+        __syncthreads();
+        return dst;
+    } else if constexpr (TY == 18) {
+        for (int i = tid; i < 256; i += nthreads) s_buf[i] = iq3xxs_grid[i];
+        __syncthreads();
+        return s_buf;
+    } else if constexpr (TY == 21) {
+        for (int i = tid; i < 512; i += nthreads) s_buf[i] = iq3s_grid[i];
+        __syncthreads();
+        return s_buf;
+    } else if constexpr (TY == 22) {
+        uint2* dst = (uint2*) s_buf;
+        const uint2* src = (const uint2*) iq2s_grid;
+        for (int i = tid; i < 1024; i += nthreads) dst[i] = src[i];
+        __syncthreads();
+        return dst;
+    } else if constexpr (TY == 29) {
+        uint2* dst = (uint2*) s_buf;
+        const uint2* src = (const uint2*) iq1s_grid_gpu;
+        for (int i = tid; i < 1024; i += nthreads) dst[i] = src[i];
+        __syncthreads();
+        return dst;
+    } else {
+        return nullptr;
+    }
+}
+
+template<int TY>
+struct IqGridWords {
+    static constexpr int value = (TY == 22 || TY == 29) ? 2048 : (TY == 17) ? 1024 : (TY == 16 || TY == 21) ? 512 : (TY == 18) ? 256 : 1;
+};
+
 // mmvq_kernel with the columns taken NC at a time.  After warp_sum every lane holds the same sum, so lane c stores
 // column c.
 template<int TY, int NC>
 __global__ void __launch_bounds__(128) mmvq_multi_kernel(const uint8_t* __restrict__ w, size_t row_bytes,
                                                          const block_q8_1* __restrict__ x, float* __restrict__ y,
                                                          int n_in, int n_out, int ncols) {
+    __shared__ uint32_t s_grid_buf[IqGridWords<TY>::value];
+    const void* s_grid = stage_iq_grid<TY>(s_grid_buf, threadIdx.y * 32 + threadIdx.x, 128);
     const int row = blockIdx.x * 4 + threadIdx.y;
     if (row >= n_out) return;
     const int lane = threadIdx.x;
@@ -877,7 +1024,7 @@ __global__ void __launch_bounds__(128) mmvq_multi_kernel(const uint8_t* __restri
 #pragma unroll
         for (int c = 0; c < NC; ++c) off[c] = (c0 + min(c, n - 1)) * xb;
         float s[NC];
-        row_dot_multi<TY, NC>(wr, x, off, n, nb, lane, s);
+        row_dot_multi<TY, NC>(wr, x, off, n, nb, lane, s, s_grid);
 #pragma unroll
         for (int c = 0; c < NC; ++c)
             if (c < n && lane == c) y[(size_t) (c0 + c) * n_out + row] = s[c];
@@ -930,6 +1077,10 @@ __global__ void __launch_bounds__(256) native_gu_multi_kernel(const unsigned lon
                                                               const int32_t* __restrict__ ent_tok,
                                                               const block_q8_1* __restrict__ xq, NativeExpertLayout L,
                                                               float* __restrict__ gate, float* __restrict__ up) {
+    const int ng = *n_groups;
+    if (blockIdx.y >= ng) return;
+    __shared__ uint32_t s_grid_buf[IqGridWords<TG>::value];
+    const void* s_grid = stage_iq_grid<TG>(s_grid_buf, threadIdx.x, 256);
     const int warp = threadIdx.x >> 5, lane = threadIdx.x & 31;
     const int row = blockIdx.x * GU_ROWS + warp;             // 0 .. 2*n_ff
     if (row >= 2 * L.n_ff) return;
@@ -938,20 +1089,31 @@ __global__ void __launch_bounds__(256) native_gu_multi_kernel(const unsigned lon
     const size_t w_off = (is_up ? L.up_off : 0) + (size_t) r * L.gu_row;
     const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
     float* dst = is_up ? up : gate;
-    const int ng = *n_groups;
     for (int g = blockIdx.y; g < ng; g += gridDim.y) {   // the group stride, as native_gu_kernel
         const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
         const int e0 = grp_start[g], e1 = grp_start[g + 1];
         for (int e = e0; e < e1; e += GRP_NC) {
             const int n = min(GRP_NC, e1 - e);
-            int off[GRP_NC];
+            if (n == 1) {
+                const int off1[1] = { ent_tok[e] * xb };
+                float s1[1];
+                row_dot_multi<TG, 1, true>(wr, xq, off1, 1, nb, lane, s1, s_grid);
+                if (lane == 0) dst[(size_t) e * L.n_ff + r] = s1[0];
+            } else if (n == 2) {
+                const int off2[2] = { ent_tok[e] * xb, ent_tok[e + 1] * xb };
+                float s2[2];
+                row_dot_multi<TG, 2, true>(wr, xq, off2, 2, nb, lane, s2, s_grid);
+                if (lane < 2) dst[(size_t) (e + lane) * L.n_ff + r] = s2[lane];
+            } else {
+                int off[GRP_NC];
 #pragma unroll
-            for (int c = 0; c < GRP_NC; ++c) off[c] = ent_tok[e + min(c, n - 1)] * xb;
-            float s[GRP_NC];
-            row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s);
+                for (int c = 0; c < GRP_NC; ++c) off[c] = ent_tok[e + min(c, n - 1)] * xb;
+                float s[GRP_NC];
+                row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s, s_grid);
 #pragma unroll
-            for (int c = 0; c < GRP_NC; ++c)
-                if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
+                for (int c = 0; c < GRP_NC; ++c)
+                    if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
+            }
         }
     }
 }
@@ -995,25 +1157,148 @@ __global__ void __launch_bounds__(256) native_down_multi_kernel(const unsigned l
                                                                 const int32_t* __restrict__ ent_dst,
                                                                 const block_q8_1* __restrict__ hq, NativeExpertLayout L,
                                                                 float* __restrict__ out) {
+    const int ng = *n_groups;
+    if (blockIdx.y >= ng) return;
+    __shared__ uint32_t s_hq_buf[GRP_NC * 20 * 9];
+    const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
+    if constexpr (TD == 20) {
+        if (hb == 20) {
+            const int r = blockIdx.x * 32 + (threadIdx.x >> 3);
+            const int t = threadIdx.x & 7;
+            const bool valid_r = (r < L.n_embd);
+            const size_t w_off = L.down_off + (size_t) (valid_r ? r : 0) * L.d_row;
+            const block_q8_1* s_hq = reinterpret_cast<const block_q8_1*>(s_hq_buf);
+            for (int g = blockIdx.y; g < ng; g += gridDim.y) {
+                const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
+                const int e0 = grp_start[g], e1 = grp_start[g + 1];
+                for (int e = e0; e < e1; e += GRP_NC) {
+                    const int n = min(GRP_NC, e1 - e);
+                    const uint32_t* src = reinterpret_cast<const uint32_t*>(hq + (size_t) e * 20);
+                    const int words = n * (20 * 9);
+                    __syncthreads();
+                    for (int i = threadIdx.x; i < words; i += 256) s_hq_buf[i] = src[i];
+                    __syncthreads();
+                    if (valid_r) {
+                        if (n == 1) {
+                            const int off1[1] = { 0 };
+                            float s1[1];
+                            row_dot_40_sub8<TD, 1, true>(wr, s_hq, off1, 1, t, s1);
+                            if (t == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = s1[0];
+                        } else if (n == 2) {
+                            const int off2[2] = { 0, 20 };
+                            float s2[2];
+                            row_dot_40_sub8<TD, 2, true>(wr, s_hq, off2, 2, t, s2);
+                            if (t < 2) out[(size_t) ent_dst[e + t] * L.n_embd + r] = s2[t];
+                        } else {
+                            int off[GRP_NC];
+#pragma unroll
+                            for (int c = 0; c < GRP_NC; ++c) off[c] = min(c, n - 1) * 20;
+                            float s[GRP_NC];
+                            row_dot_40_sub8<TD, GRP_NC>(wr, s_hq, off, n, t, s);
+#pragma unroll
+                            for (int c = 0; c < GRP_NC; ++c)
+                                if (c < n && t == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+                        }
+                    }
+                }
+            }
+            return;
+        }
+    } else if constexpr (TD == 42) {
+        if (hb == 20) {
+            const int r = blockIdx.x * 16 + (threadIdx.x >> 4);
+            const int t = threadIdx.x & 15;
+            const bool valid_r = (r < L.n_embd);
+            const size_t w_off = L.down_off + (size_t) (valid_r ? r : 0) * L.d_row;
+            const block_q8_1* s_hq = reinterpret_cast<const block_q8_1*>(s_hq_buf);
+            for (int g = blockIdx.y; g < ng; g += gridDim.y) {
+                const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
+                const int e0 = grp_start[g], e1 = grp_start[g + 1];
+                for (int e = e0; e < e1; e += GRP_NC) {
+                    const int n = min(GRP_NC, e1 - e);
+                    const uint32_t* src = reinterpret_cast<const uint32_t*>(hq + (size_t) e * 20);
+                    const int words = n * (20 * 9);
+                    __syncthreads();
+                    for (int i = threadIdx.x; i < words; i += 256) s_hq_buf[i] = src[i];
+                    __syncthreads();
+                    if (valid_r) {
+                        if (n == 1) {
+                            const int off1[1] = { 0 };
+                            float s1[1];
+                            row_dot_20_sub16<TD, 1, true>(wr, s_hq, off1, 1, t, s1);
+                            if (t == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = s1[0];
+                        } else if (n == 2) {
+                            const int off2[2] = { 0, 20 };
+                            float s2[2];
+                            row_dot_20_sub16<TD, 2, true>(wr, s_hq, off2, 2, t, s2);
+                            if (t < 2) out[(size_t) ent_dst[e + t] * L.n_embd + r] = s2[t];
+                        } else {
+                            int off[GRP_NC];
+#pragma unroll
+                            for (int c = 0; c < GRP_NC; ++c) off[c] = min(c, n - 1) * 20;
+                            float s[GRP_NC];
+                            row_dot_20_sub16<TD, GRP_NC>(wr, s_hq, off, n, t, s);
+#pragma unroll
+                            for (int c = 0; c < GRP_NC; ++c)
+                                if (c < n && t == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+                        }
+                    }
+                }
+            }
+            return;
+        }
+    }
     const int warp = threadIdx.x >> 5, lane = threadIdx.x & 31;
     const int r = blockIdx.x * 8 + warp;
-    if (r >= L.n_embd) return;
-    const size_t w_off = L.down_off + (size_t) r * L.d_row;
-    const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
-    const int ng = *n_groups;
+    const bool valid_r = (r < L.n_embd);
+    const size_t w_off = L.down_off + (size_t) (valid_r ? r : 0) * L.d_row;
     for (int g = blockIdx.y; g < ng; g += gridDim.y) {   // the group stride, as native_gu_kernel
         const uint8_t* wr = (const uint8_t*) grp_ptr[g] + w_off;
         const int e0 = grp_start[g], e1 = grp_start[g + 1];
-        for (int e = e0; e < e1; e += GRP_NC) {
-            const int n = min(GRP_NC, e1 - e);
-            int off[GRP_NC];
+        if (hb == 20) {
+            const block_q8_1* s_hq = reinterpret_cast<const block_q8_1*>(s_hq_buf);
+            for (int e = e0; e < e1; e += GRP_NC) {
+                const int n = min(GRP_NC, e1 - e);
+                const uint32_t* src = reinterpret_cast<const uint32_t*>(hq + (size_t) e * 20);
+                const int words = n * (20 * 9);
+                __syncthreads();
+                for (int i = threadIdx.x; i < words; i += 256) s_hq_buf[i] = src[i];
+                __syncthreads();
+                if (valid_r) {
+                    if (n == 1) {
+                        const int off1[1] = { 0 };
+                        float s1[1];
+                        row_dot_multi<TD, 1, true>(wr, s_hq, off1, 1, nb, lane, s1);
+                        if (lane == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = s1[0];
+                    } else if (n == 2) {
+                        const int off2[2] = { 0, 20 };
+                        float s2[2];
+                        row_dot_multi<TD, 2, true>(wr, s_hq, off2, 2, nb, lane, s2);
+                        if (lane < 2) out[(size_t) ent_dst[e + lane] * L.n_embd + r] = s2[lane];
+                    } else {
+                        int off[GRP_NC];
+#pragma unroll
+                        for (int c = 0; c < GRP_NC; ++c) off[c] = min(c, n - 1) * 20;
+                        float s[GRP_NC];
+                        row_dot_multi<TD, GRP_NC>(wr, s_hq, off, n, nb, lane, s);
+#pragma unroll
+                        for (int c = 0; c < GRP_NC; ++c)
+                            if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+                    }
+                }
+            }
+        } else if (valid_r) {
+            for (int e = e0; e < e1; e += GRP_NC) {
+                const int n = min(GRP_NC, e1 - e);
+                int off[GRP_NC];
 #pragma unroll
-            for (int c = 0; c < GRP_NC; ++c) off[c] = (e + min(c, n - 1)) * hb;
-            float s[GRP_NC];
-            row_dot_multi<TD, GRP_NC>(wr, hq, off, n, nb, lane, s);
+                for (int c = 0; c < GRP_NC; ++c) off[c] = (e + min(c, n - 1)) * hb;
+                float s[GRP_NC];
+                row_dot_multi<TD, GRP_NC>(wr, hq, off, n, nb, lane, s);
 #pragma unroll
-            for (int c = 0; c < GRP_NC; ++c)
-                if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+                for (int c = 0; c < GRP_NC; ++c)
+                    if (c < n && lane == c) out[(size_t) ent_dst[e + c] * L.n_embd + r] = s[c];
+            }
         }
     }
 }
@@ -1571,7 +1856,8 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
                                                                                 (int) L.n_ff, hq);
     }
     check("native_expert_grouped/swiglu");
-    const dim3 gd((unsigned) ((L.n_embd + 7) / 8), (unsigned) gy);
+    const int d_rows = (!g_old_kernels && L.n_ff == 640) ? (L.d_type == 20 ? 32 : (L.d_type == 42 ? 16 : 8)) : 8;
+    const dim3 gd((unsigned) ((L.n_embd + d_rows - 1) / d_rows), (unsigned) gy);
     switch (L.d_type) {
 #define STRATA_DOWN(T) case T: launch_down<T>(gd, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
         STRATA_D_FMTS(STRATA_DOWN)
diff --git a/src/kernels/cuda/native_mmvq.cu b/src/kernels/cuda/native_mmvq.cu
index 84748179a7e..147f385d144 100644
--- a/src/kernels/cuda/native_mmvq.cu
+++ b/src/kernels/cuda/native_mmvq.cu
@@ -998,7 +998,7 @@ struct SmallTraits {
 bool g_multi_exact = true;   // until the upstream layout is timed on an idle GPU (plan rule: default only what is measured)
 
 template<typename F, int NCOLS, int NW, int ROWS>
-__launch_bounds__(NW * WARP, 1)
+__launch_bounds__(NW * WARP, (ROWS <= 2 ? 4 : 1))
 __global__ void native_mmvq_multi_kernel(const typename F::Block* __restrict__ w,
                                          const Q81Block* __restrict__ x,
                                          float* __restrict__ y, int n_in, int n_out) {
@@ -1055,8 +1055,9 @@ void launch_multi_n(const void* weights, const void* x_q8_1, float* y, int n_in,
     }
     const dim3 threads(WARP, WARPS);
     if (n_in / F::DIV < F::BPI) {
-        const unsigned blocks = unsigned((std::size_t(n_out) + WARPS - 1) / WARPS);
-        native_mmvq_multi_kernel<F, NCOLS, WARPS, WARPS><<<blocks, threads, 0, s>>>(w, x, y, n_in, n_out);
+        constexpr int ROWS = 2;
+        const unsigned blocks = unsigned((std::size_t(n_out) + ROWS - 1) / ROWS);
+        native_mmvq_multi_kernel<F, NCOLS, WARPS, ROWS><<<blocks, threads, 0, s>>>(w, x, y, n_in, n_out);
     } else {
         native_mmvq_multi_kernel<F, NCOLS, WARPS, 1><<<unsigned(n_out), threads, 0, s>>>(w, x, y, n_in, n_out);
     }
diff --git a/src/kernels/cuda/ple.cu b/src/kernels/cuda/ple.cu
index 6585bbaab81..984512b0d69 100644
--- a/src/kernels/cuda/ple.cu
+++ b/src/kernels/cuda/ple.cu
@@ -197,6 +197,7 @@ void ck(cudaError_t e, const char* what) {
 }  // namespace
 
 void ple_set_native_bf16(bool enabled) { native_bf16 = enabled; }
+bool ple_native_bf16_enabled() { return native_bf16; }
 void ple_set_native_postops(bool enabled) { native_postops = enabled; }
 bool ple_native_postops_enabled() { return native_postops; }
 
@@ -365,4 +366,21 @@ void ple_block(const float* emb, const float* hidden, const float* hist_rows, co
     // itself, and the engine's caller does not want that at all.
 }
 
+void ple_block_projected(const float* projected_key, const float* projected_value, const float* hidden,
+                         const float* hist_rows, const PleWeights& w, PleOut& out, void* scratch, void* stream) {
+    if (!projected_key || !projected_value || !hidden || !hist_rows || !out.result || !scratch) return;
+    const int n_embd = NG_N_EMBD, hc = NG_HC, hc_dim = NG_HC_DIM;
+    float* d_scratch = (float*) scratch;
+    float* d_key = d_scratch;
+    float* d_query = d_key + hc_dim;
+    float* d_norm = d_query + hc_dim;
+    float* d_gated = d_norm + hc_dim;
+    float* d_conv = d_gated + hc_dim;
+    float* d_value = d_conv + hc_dim;
+    float* d_gate = d_value + n_embd;
+    float* norm_dst = out.normalized ? out.normalized : d_norm;
+    NativePlePostopsBuffers buffers{d_query, norm_dst, d_gate, d_gated, norm_dst, d_conv, out.result};
+    native_ple_postops(projected_key, hidden, projected_value, hist_rows, w, buffers, stream);
+}
+
 }  // namespace strata::kernels
diff --git a/src/kernels/cuda/shared_expert.cu b/src/kernels/cuda/shared_expert.cu
index d795bf84001..d4479cbd299 100644
--- a/src/kernels/cuda/shared_expert.cu
+++ b/src/kernels/cuda/shared_expert.cu
@@ -27,6 +27,7 @@
 #include "strata/kernels/s_gemv.hpp"
 #include "strata/kernels/native_mmvq.hpp"
 
+#include <cuda_fp16.h>
 #include <cuda_runtime.h>
 
 #include <cmath>
@@ -157,13 +158,49 @@ __global__ void moe_combine_kernel(const float* __restrict__ parts, const float*
 }  // namespace
 
 void shared_expert_set_native_bf16(bool enabled) { native_bf16 = enabled; }
+bool shared_expert_native_bf16_enabled() { return native_bf16; }
 
 namespace {
+struct SharedQ81Block {
+    half2 ds;
+    int8_t qs[32];
+};
+
+__launch_bounds__(256, 1)
+__global__ void native_swiglu_quantize_q8_1_kernel(const float* __restrict__ gate,
+                                                   const float* __restrict__ up,
+                                                   SharedQ81Block* __restrict__ y, int n_in) {
+    const int i = int(blockIdx.x) * 256 + int(threadIdx.x);
+    if (i >= n_in) return;
+    const float gi = gate[i];
+    const float xi = __fdividef(gi, 1.0f + __expf(-gi)) * up[i];
+    float amax = fabsf(xi);
+    float sum = xi;
+#pragma unroll
+    for (int offset = 16; offset > 0; offset >>= 1) {
+        amax = fmaxf(amax, __shfl_xor_sync(0xffffffffu, amax, offset, 32));
+        sum += __shfl_xor_sync(0xffffffffu, sum, offset, 32);
+    }
+    const float d = amax / 127.0f;
+    const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
+    y[i / 32].qs[i % 32] = q;
+    if ((i & 31) == 0) y[i / 32].ds = make_half2(d, sum);
+}
+
 __global__ void scale_rows_kernel(float* __restrict__ out, const float* __restrict__ g, int n) {
     const int t = blockIdx.y;
     const int i = blockIdx.x * blockDim.x + threadIdx.x;
     if (i < n) out[(size_t) t * n + i] *= g[t];
 }
+
+__global__ void sigmoid_scale_rows_kernel(float* __restrict__ out, const float* __restrict__ g, int n) {
+    const int t = blockIdx.y;
+    const int i = blockIdx.x * blockDim.x + threadIdx.x;
+    if (i < n) {
+        const float gt = __fdividef(1.0f, 1.0f + __expf(-g[t]));
+        out[(size_t) t * n + i] *= gt;
+    }
+}
 }  // namespace
 
 void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, const NativeSharedWeights& nw,
@@ -172,28 +209,38 @@ void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, cons
     if (n_tok < 1 || n_tok > 8 || !nw.q8_1 || !nw.gate_data || !nw.up_data || !nw.down_data || !stream)
         throw std::invalid_argument("shared_expert_multi: needs 1..8 tokens, native weights, scratch and a stream");
     cudaStream_t cs = (cudaStream_t) stream;
-    native_quantize_q8_1(x, nw.q8_1, (int) n_embd, n_tok, stream);
-    native_mmvq(nw.gate_type, nw.gate_data, nw.q8_1, gate, (int) n_embd, (int) n_ff, n_tok, stream);
-    native_mmvq(nw.up_type, nw.up_data, nw.q8_1, up, (int) n_embd, (int) n_ff, n_tok, stream);
+    const void* x_q8_1 = nw.x_q8_1;
+    if (!x_q8_1) {
+        native_quantize_q8_1(x, nw.q8_1, (int) n_embd, n_tok, stream);
+        x_q8_1 = nw.q8_1;
+    }
+    native_mmvq(nw.gate_type, nw.gate_data, x_q8_1, gate, (int) n_embd, (int) n_ff, n_tok, stream);
+    native_mmvq(nw.up_type, nw.up_data, x_q8_1, up, (int) n_embd, (int) n_ff, n_tok, stream);
     const int n = (int) (n_ff * n_tok);
-    native_swiglu_kernel<<<(unsigned) ((n + THREADS - 1) / THREADS), THREADS, 0, cs>>>(gate, up, gate, n);
-    native_quantize_q8_1(gate, nw.q8_1, (int) n_ff, n_tok, stream);
+    native_swiglu_quantize_q8_1_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, cs>>>(
+        gate, up, (SharedQ81Block*) nw.q8_1, n);
     native_mmvq(nw.down_type, nw.down_data, nw.q8_1, out, (int) n_ff, (int) n_embd, n_tok, stream);
     static const bool batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
-    if (native_bf16 && batch && n_tok > 1) {   // one gemv for all rows (outputs identical), one sigmoid launch
+    if (native_bf16 && batch && n_tok > 1) {   // one gemv for all rows (outputs identical), fused sigmoid+scale
         bf16_gemv_fp32_mmvf_multi(x, n_embd, gate_inp_bf16, g, 1, n_embd, 1, n_tok, stream);
-        native_scalar_sigmoid_multi_kernel<<<1, n_tok, 0, cs>>>(g);
-    } else
-    for (int t = 0; t < n_tok; ++t) {
-        if (native_bf16) {
-            bf16_gemv_fp32_mmvf(x + (size_t) t * n_embd, gate_inp_bf16, g + t, n_embd, 1, stream);
-            native_scalar_sigmoid_kernel<<<1, 1, 0, cs>>>(g + t);
-        } else {
-            scalar_gate_kernel<<<1, 256, 0, cs>>>(x_bf16 + (size_t) t * n_embd, gate_inp_bf16, g + t, (int) n_embd);
+        sigmoid_scale_rows_kernel<<<dim3((unsigned) ((n_embd + THREADS - 1) / THREADS), (unsigned) n_tok), THREADS, 0, cs>>>(
+            out, g, (int) n_embd);
+    } else if (native_bf16 && n_tok == 1) {
+        bf16_gemv_fp32_mmvf(x, gate_inp_bf16, g, n_embd, 1, stream);
+        sigmoid_scale_rows_kernel<<<dim3((unsigned) ((n_embd + THREADS - 1) / THREADS), 1u), THREADS, 0, cs>>>(
+            out, g, (int) n_embd);
+    } else {
+        for (int t = 0; t < n_tok; ++t) {
+            if (native_bf16) {
+                bf16_gemv_fp32_mmvf(x + (size_t) t * n_embd, gate_inp_bf16, g + t, n_embd, 1, stream);
+                native_scalar_sigmoid_kernel<<<1, 1, 0, cs>>>(g + t);
+            } else {
+                scalar_gate_kernel<<<1, 256, 0, cs>>>(x_bf16 + (size_t) t * n_embd, gate_inp_bf16, g + t, (int) n_embd);
+            }
         }
+        scale_rows_kernel<<<dim3((unsigned) ((n_embd + THREADS - 1) / THREADS), (unsigned) n_tok), THREADS, 0, cs>>>(
+            out, g, (int) n_embd);
     }
-    scale_rows_kernel<<<dim3((unsigned) ((n_embd + THREADS - 1) / THREADS), (unsigned) n_tok), THREADS, 0, cs>>>(
-        out, g, (int) n_embd);
     const cudaError_t e = cudaGetLastError();
     if (e != cudaSuccess) throw std::runtime_error(std::string("shared_expert_multi: ") + cudaGetErrorString(e));
 }
@@ -273,31 +320,37 @@ void shared_expert(const uint8_t* x_q8_0, const uint8_t* x_q8k, const uint16_t*
         native_mmvq(native->up_type, native->up_data, native->q8_1, up, (int) n_embd, (int) n_ff, 1, stream);
     else
         gemv(up_form, up_codes, up_scales, up_off, x_q8_0, x_q8k, up, n_embd, n_ff);
-    if (native_projection)
-        native_swiglu_kernel<<<g_ff, THREADS, 0, (cudaStream_t) stream>>>(gate, up, gate, (int) n_ff);
-    else
-        swiglu_kernel<<<g_ff, THREADS, 0, (cudaStream_t) stream>>>(gate, up, gate, (int) n_ff);
-
-    // down: (n_ff) -> (n_embd), and THE INTERMEDIATE IS QUANTIZED TO THE DOWN WEIGHT'S OWN CONTRACT - which is
-    // what `ggml_mul_mat` does for every matmul in the model.  It used to be rounded to fp16 with no
-    // justification beyond "the kernel takes fp16".
-    if (native_down) {
-        native_quantize_q8_1(gate, native->q8_1, (int) n_ff, 1, stream);
+    if (native_projection && native_down) {
+        native_swiglu_quantize_q8_1_kernel<<<(unsigned) ((n_ff + 255) / 256), 256, 0, (cudaStream_t) stream>>>(
+            gate, up, (SharedQ81Block*) native->q8_1, (int) n_ff);
         native_mmvq(native->down_type, native->down_data, native->q8_1, out, (int) n_ff, (int) n_embd, 1, stream);
-    } else if (down_form.act_kind == 1) {
-        if (n_ff % 256 != 0) {
-            std::fprintf(stderr, "shared_expert: the down weight wants Q8_K but n_ff %lld is not a multiple "
-                                 "of 256; Q8_K is structurally impossible here\n", (long long) n_ff);
-            std::exit(1);
-        }
-        quantize_q8_K(gate, h_q8k, n_ff, stream);
-        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
-    } else if (down_form.code_bits == 2) {
-        quantize_q8_0(gate, h_q8_0, n_ff, stream);
-        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
     } else {
-        quantize_q8_0(gate, h_q8_0, n_ff, stream);
-        gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+        if (native_projection)
+            native_swiglu_kernel<<<g_ff, THREADS, 0, (cudaStream_t) stream>>>(gate, up, gate, (int) n_ff);
+        else
+            swiglu_kernel<<<g_ff, THREADS, 0, (cudaStream_t) stream>>>(gate, up, gate, (int) n_ff);
+
+        // down: (n_ff) -> (n_embd), and THE INTERMEDIATE IS QUANTIZED TO THE DOWN WEIGHT'S OWN CONTRACT - which is
+        // what `ggml_mul_mat` does for every matmul in the model.  It used to be rounded to fp16 with no
+        // justification beyond "the kernel takes fp16".
+        if (native_down) {
+            native_quantize_q8_1(gate, native->q8_1, (int) n_ff, 1, stream);
+            native_mmvq(native->down_type, native->down_data, native->q8_1, out, (int) n_ff, (int) n_embd, 1, stream);
+        } else if (down_form.act_kind == 1) {
+            if (n_ff % 256 != 0) {
+                std::fprintf(stderr, "shared_expert: the down weight wants Q8_K but n_ff %lld is not a multiple "
+                                     "of 256; Q8_K is structurally impossible here\n", (long long) n_ff);
+                std::exit(1);
+            }
+            quantize_q8_K(gate, h_q8k, n_ff, stream);
+            gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+        } else if (down_form.code_bits == 2) {
+            quantize_q8_0(gate, h_q8_0, n_ff, stream);
+            gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+        } else {
+            quantize_q8_0(gate, h_q8_0, n_ff, stream);
+            gemv(down_form, down_codes, down_scales, down_off, h_q8_0, h_q8k, out, n_ff, n_embd);
+        }
     }
 
     // the per-token scalar gate, then the multiply.  Note the gate is computed from `x`, the ORIGINAL hidden
@@ -307,11 +360,11 @@ void shared_expert(const uint8_t* x_q8_0, const uint8_t* x_q8k, const uint16_t*
     // round trip.  256 threads is the reduction's width, not the problem's size.
     if (use_native) {
         bf16_gemv_fp32_mmvf(x_f32, gate_inp_bf16, g, n_embd, 1, stream);
-        native_scalar_sigmoid_kernel<<<1, 1, 0, (cudaStream_t) stream>>>(g);
+        sigmoid_scale_rows_kernel<<<dim3(g_embd, 1u), THREADS, 0, (cudaStream_t) stream>>>(out, g, (int) n_embd);
     } else {
         scalar_gate_kernel<<<1, 256, 0, (cudaStream_t) stream>>>(x_bf16, gate_inp_bf16, g, (int) n_embd);
+        scale_kernel<<<g_embd, THREADS, 0, (cudaStream_t) stream>>>(out, g, (int) n_embd);
     }
-    scale_kernel<<<g_embd, THREADS, 0, (cudaStream_t) stream>>>(out, g, (int) n_embd);
 
     if (stream == nullptr) {
         const cudaError_t e = cudaDeviceSynchronize();
diff --git a/src/kernels/cuda/verify_kernels.cu b/src/kernels/cuda/verify_kernels.cu
index 7908ce404f3..8a5bcabc6d9 100644
--- a/src/kernels/cuda/verify_kernels.cu
+++ b/src/kernels/cuda/verify_kernels.cu
@@ -67,23 +67,24 @@ __global__ void gdn_conv_commit_kernel(float* __restrict__ hist, const float* __
     hist[c * 3 + 2] = seq[2];
 }
 
-__global__ void __launch_bounds__(256) gdn_ab_multi_kernel(const float* __restrict__ x, const uint16_t* __restrict__ wa,
-                                                           const uint16_t* __restrict__ wb,
-                                                           const float* __restrict__ dt,
-                                                           const float* __restrict__ ssm_a, float* __restrict__ gate,
-                                                           float* __restrict__ beta, int n, int h_v, int T) {
-    const int row = blockIdx.x * 8 + (threadIdx.x >> 5), lane = threadIdx.x & 31;
+template <int MAX_T = kVerifyMaxT>
+__global__ void __launch_bounds__(64) gdn_ab_multi_kernel(const float* __restrict__ x, const uint16_t* __restrict__ wa,
+                                                          const uint16_t* __restrict__ wb,
+                                                          const float* __restrict__ dt,
+                                                          const float* __restrict__ ssm_a, float* __restrict__ gate,
+                                                          float* __restrict__ beta, int n, int h_v, int T) {
+    const int row = blockIdx.x * 2 + (threadIdx.x >> 5), lane = threadIdx.x & 31;
     if (row >= 2 * h_v) return;
     const bool is_beta = row >= h_v;
     const int r = is_beta ? row - h_v : row;
     const uint4* w4 = reinterpret_cast<const uint4*>((is_beta ? wb : wa) + (size_t) r * n);
-    float acc[kVerifyMaxT];
+    float acc[MAX_T];
 #pragma unroll
-    for (int t = 0; t < kVerifyMaxT; ++t) acc[t] = 0.0f;
+    for (int t = 0; t < MAX_T; ++t) acc[t] = 0.0f;
     for (int j = lane; j < n / 8; j += 32) {
         const uint4 wv = __ldg(w4 + j);
 #pragma unroll
-        for (int t = 0; t < kVerifyMaxT; ++t) {
+        for (int t = 0; t < MAX_T; ++t) {
             if (t >= T) break;
             const float* xt = x + (size_t) t * n;
             const float4 xa = *reinterpret_cast<const float4*>(xt + j * 8);
@@ -97,7 +98,7 @@ __global__ void __launch_bounds__(256) gdn_ab_multi_kernel(const float* __restri
         }
     }
 #pragma unroll
-    for (int t = 0; t < kVerifyMaxT; ++t) {
+    for (int t = 0; t < MAX_T; ++t) {
         if (t >= T) break;
         float a = acc[t];
         for (int o = 16; o > 0; o >>= 1) a += __shfl_xor_sync(0xffffffffu, a, o);
@@ -112,6 +113,50 @@ __global__ void __launch_bounds__(256) gdn_ab_multi_kernel(const float* __restri
     }
 }
 
+// State-only commit kernel: each head's 128 independent state columns are split across 4 blocks of 32 columns
+// (48 * 4 = 192 blocks of 128 threads across all SMs, vs 48 blocks of 512 threads), with no sq/o/norm/z/y work.
+__global__ void __launch_bounds__(32 * RG) gdn_step_commit_kernel(float* __restrict__ state,
+                                                                  const float* __restrict__ hbuf, int C,
+                                                                  const float* __restrict__ gate,
+                                                                  const float* __restrict__ beta,
+                                                                  int h_k, int h_v,
+                                                                  const int32_t* __restrict__ n_keep) {
+    const int n = *n_keep;
+    if (n <= 0) return;
+    __shared__ float sk[S];
+    __shared__ float red[RG][32];
+    const int head = blockIdx.x;
+    const int col_local = threadIdx.x;
+    const int col = blockIdx.y * 32 + col_local;
+    const int rg = threadIdx.y;
+    const int tid = rg * 32 + col_local;    // 0 .. 127
+    const int qh = head % h_k;
+    const int qk = S * h_k;
+    float s[RPG];
+    float* base = state + ((size_t) (rg * RPG) * h_v + head) * S + col;
+    const size_t row_stride = (size_t) h_v * S;
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) s[r] = base[r * row_stride];
+    for (int t = 0; t < n; ++t) {
+        const float* ht = hbuf + (size_t) t * C;
+        __syncthreads();
+        sk[tid] = ht[qk + qh * S + tid];
+        __syncthreads();
+        const float g = __expf(gate[(size_t) t * h_v + head]);
+        float kv = 0.0f;
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) kv = fmaf(s[r], sk[rg * RPG + r], kv);
+        red[rg][col_local] = kv;
+        __syncthreads();
+        const float kv_col = red[0][col_local] + red[1][col_local] + red[2][col_local] + red[3][col_local];
+        const float delta = (ht[2 * qk + head * S + col] - g * kv_col) * beta[(size_t) t * h_v + head];
+#pragma unroll
+        for (int r = 0; r < RPG; ++r) s[r] = fmaf(g, s[r], sk[rg * RPG + r] * delta);
+    }
+#pragma unroll
+    for (int r = 0; r < RPG; ++r) base[r * row_stride] = s[r];
+}
+
 __global__ void __launch_bounds__(S * RG) gdn_step_norm_multi_kernel(float* __restrict__ state,
                                                                      const float* __restrict__ hbuf, int C,
                                                                      const float* __restrict__ gate,
@@ -138,8 +183,12 @@ __global__ void __launch_bounds__(S * RG) gdn_step_norm_multi_kernel(float* __re
     for (int r = 0; r < RPG; ++r) s[r] = base[r * row_stride];
     for (int t = 0; t < n; ++t) {
         const float* ht = hbuf + (size_t) t * C;
+        const bool need_out = (t >= t_out_begin);
         __syncthreads();                // the previous token is done with sk/sq/red/wsum
-        if (tid < S) { sk[tid] = ht[qk + qh * S + tid]; sq[tid] = ht[qh * S + tid]; }
+        if (tid < S) {
+            sk[tid] = ht[qk + qh * S + tid];
+            if (need_out) sq[tid] = ht[qh * S + tid];
+        }
         __syncthreads();
         const float g = __expf(gate[(size_t) t * h_v + head]);
         float kv = 0.0f;
@@ -149,6 +198,11 @@ __global__ void __launch_bounds__(S * RG) gdn_step_norm_multi_kernel(float* __re
         __syncthreads();
         const float kv_col = red[0][col] + red[1][col] + red[2][col] + red[3][col];
         const float delta = (ht[2 * qk + head * S + col] - g * kv_col) * beta[(size_t) t * h_v + head];
+        if (!need_out) {
+#pragma unroll
+            for (int r = 0; r < RPG; ++r) s[r] = fmaf(g, s[r], sk[rg * RPG + r] * delta);
+            continue;
+        }
         float o = 0.0f;
 #pragma unroll
         for (int r = 0; r < RPG; ++r) {
@@ -163,7 +217,6 @@ __global__ void __launch_bounds__(S * RG) gdn_step_norm_multi_kernel(float* __re
             oc = (red[0][col] + red[1][col] + red[2][col] + red[3][col]) * rsqrtf((float) S);
             sq_part = oc * oc;
         }
-        if (t < t_out_begin) continue;   // a replayed token: its state update is needed, its output is not
         for (int o2 = 16; o2 > 0; o2 >>= 1) sq_part += __shfl_xor_sync(0xffffffffu, sq_part, o2);
         if ((tid & 31) == 0) wsum[tid >> 5] = sq_part;
         __syncthreads();
@@ -285,11 +338,13 @@ __global__ void mtp_select_kernel(const float* __restrict__ R_src, int64_t strid
     const int row = *row_dev;
     for (int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x; i < stride; i += (int64_t) gridDim.x * blockDim.x)
         R_dst[i] = R_src[(size_t) row * stride + i];
+    __syncthreads();
     if (blockIdx.x == 0 && threadIdx.x == 0) {
         const int32_t tok = ids[row];
         *tok_dst = tok;
-        if (out != nullptr) ((volatile int32_t*) out)[j] = tok;
         if (probs != nullptr && out_p != nullptr) ((volatile float*) out_p)[j] = probs[row];
+        __threadfence_system();
+        if (out != nullptr) ((volatile int32_t*) out)[j] = tok;
     }
 }
 
@@ -331,8 +386,8 @@ void ident_hits(const int32_t* ids, int n, int32_t* slot, int32_t* dst, int32_t*
 
 void mtp_select(const float* R_src, int64_t R_stride, const int32_t* ids, const int32_t* row_dev, float* R_dst,
                 int32_t* tok_dst, int32_t* out, int j, void* stream, const float* probs, float* out_p) {
-    mtp_select_kernel<<<16, 256, 0, (cudaStream_t) stream>>>(R_src, R_stride, ids, row_dev, R_dst, tok_dst, out, j,
-                                                             probs, out_p);
+    mtp_select_kernel<<<1, 256, 0, (cudaStream_t) stream>>>(R_src, R_stride, ids, row_dev, R_dst, tok_dst, out, j,
+                                                            probs, out_p);
     check("mtp_select");
 }
 
@@ -404,8 +459,14 @@ void gdn_ab_multi(const float* x, const uint16_t* w_alpha, const uint16_t* w_bet
         std::fprintf(stderr, "gdn_ab_multi: invalid arguments\n");
         std::exit(1);
     }
-    gdn_ab_multi_kernel<<<(unsigned) ((2 * h_v + 7) / 8), 256, 0, (cudaStream_t) stream>>>(
-        x, w_alpha, w_beta, dt, ssm_a, gate, beta, n_embd, h_v, n_tok);
+    const unsigned blocks = (unsigned) ((2 * h_v + 1) / 2);
+    if (n_tok <= 4) {
+        gdn_ab_multi_kernel<4><<<blocks, 64, 0, (cudaStream_t) stream>>>(
+            x, w_alpha, w_beta, dt, ssm_a, gate, beta, n_embd, h_v, n_tok);
+    } else {
+        gdn_ab_multi_kernel<kVerifyMaxT><<<blocks, 64, 0, (cudaStream_t) stream>>>(
+            x, w_alpha, w_beta, dt, ssm_a, gate, beta, n_embd, h_v, n_tok);
+    }
     check("gdn_ab_multi");
 }
 
@@ -417,8 +478,13 @@ void gdn_step_norm_multi(float* state, const float* h, int conv_channels, const
         std::fprintf(stderr, "gdn_step_norm_multi: invalid arguments\n");
         std::exit(1);
     }
-    gdn_step_norm_multi_kernel<<<(unsigned) h_v, dim3(S, RG), 0, (cudaStream_t) stream>>>(
-        state, h, conv_channels, gate, beta, z, gamma, eps, y, h_k, h_v, n_tok, n_keep, t_out_begin);
+    if (n_keep != nullptr && t_out_begin >= n_tok) {
+        gdn_step_commit_kernel<<<dim3((unsigned) h_v, 4u), dim3(32, RG), 0, (cudaStream_t) stream>>>(
+            state, h, conv_channels, gate, beta, h_k, h_v, n_keep);
+    } else {
+        gdn_step_norm_multi_kernel<<<(unsigned) h_v, dim3(S, RG), 0, (cudaStream_t) stream>>>(
+            state, h, conv_channels, gate, beta, z, gamma, eps, y, h_k, h_v, n_tok, n_keep, t_out_begin);
+    }
     check("gdn_step_norm_multi");
 }
 
@@ -434,11 +500,50 @@ __global__ void resident_plan_kernel(const int32_t* __restrict__ ids, int n, int
                                      int n_expert, const uint8_t* cache_base, const unsigned long long* slot_off,
                                      long long blob, int32_t* __restrict__ pl, long long capx, uint32_t* skip,
                                      uint32_t ring) {
-    // one thread: at most kVerifyMaxT * 10 entries, the host's exact loop
-    for (int i = 0; i < n; ++i) {
-        const int32_t e = ids[i];
-        if (e < 0 || e >= n_expert || res[e] < 0) { *skip = 0; return; }
+    __shared__ int32_t s_ids[64];
+    __shared__ unsigned long long s_ptr[64];
+    __shared__ int32_t s_first[64];
+    __shared__ int32_t s_cnt[64];
+    __shared__ int32_t s_gstart[64];
+    __shared__ int s_bad;
+    const int tid = threadIdx.x;
+    if (tid == 0) s_bad = 0;
+    __syncthreads();
+
+    int32_t eid = -1;
+    if (tid < n) {
+        eid = ids[tid];
+        s_ids[tid] = eid;
+        const int32_t slot = (eid >= 0 && eid < n_expert) ? res[eid] : -1;
+        if (slot < 0) {
+            atomicOr(&s_bad, 1);
+        } else {
+            s_ptr[tid] = (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob));
+        }
+    }
+    __syncthreads();
+    if (s_bad) {
+        if (tid == 0 && skip != nullptr) *skip = 0;
+        return;
+    }
+
+    int first_j = tid;
+    int rank_in_group = 0;
+    int count_same = 0;
+    if (tid < n) {
+        for (int j = 0; j < n; ++j) {
+            if (s_ids[j] == eid) {
+                if (j < first_j) first_j = j;
+                if (j < tid) ++rank_in_group;
+                ++count_same;
+            }
+        }
+        const bool is_first = (first_j == tid);
+        s_first[tid] = is_first ? 1 : 0;
+        s_cnt[tid] = is_first ? count_same : 0;
     }
+    __syncthreads();
+
     int32_t* counts = pl;
     int32_t* start = pl + 4;
     int32_t* dst = start + capx + 1;
@@ -446,30 +551,38 @@ __global__ void resident_plan_kernel(const int32_t* __restrict__ ids, int n, int
     const long long ptr_off = ((4 + (capx + 1) + 2 * capx) + 1) & ~1ll;
     unsigned long long* ptr = (unsigned long long*) (pl + ptr_off);
     int32_t* start2 = pl + ptr_off + 4 * capx;
-    int groups = 0, entries = 0;
-    for (int i0 = 0; i0 < n; ++i0) {
-        bool first = true;
-        for (int j = 0; j < i0; ++j) if (ids[j] == ids[i0]) { first = false; break; }
-        if (!first) continue;
-        const int32_t slot = res[ids[i0]];
-        ptr[groups] = (unsigned long long) (cache_base + (slot_off ? (size_t) slot_off[slot] : (size_t) slot * (size_t) blob));
-        start[groups] = entries;
-        for (int i = i0; i < n; ++i)
-            if (ids[i] == ids[i0]) {
-                // an entry belongs to i0's group when its first occurrence is i0: the same expert id
-                dst[entries] = i;
-                tok[entries] = i / k;
-                ++entries;
-            }
-        ++groups;
+
+    if (tid < n && first_j == tid) {
+        int grp_idx = 0;
+        int ent_start = 0;
+        for (int j = 0; j < tid; ++j) {
+            grp_idx += s_first[j];
+            ent_start += s_cnt[j];
+        }
+        ptr[grp_idx] = s_ptr[tid];
+        start[grp_idx] = ent_start;
+        s_gstart[tid] = ent_start;
+    }
+    __syncthreads();
+
+    if (tid < n) {
+        const int out_idx = s_gstart[first_j] + rank_in_group;
+        dst[out_idx] = tid;
+        tok[out_idx] = tid / k;
+    }
+    if (tid == 0) {
+        int groups = 0;
+        for (int j = 0; j < n; ++j) groups += s_first[j];
+        start[groups] = n;
+        start2[0] = n;
+        counts[0] = groups;
+        counts[1] = n;
+        counts[2] = 0;
+        if (skip != nullptr) {
+            __threadfence();
+            *skip = ring;
+        }
     }
-    start[groups] = entries;
-    start2[0] = entries;
-    counts[0] = groups;
-    counts[1] = entries;
-    counts[2] = 0;
-    __threadfence();
-    *skip = ring;
 }
 __global__ void wait_flag_ge_or_kernel(const volatile uint32_t* flag, uint32_t value, const volatile uint32_t* skip) {
     if (*skip == value) return;
@@ -492,8 +605,8 @@ __global__ void copy_or_zero_kernel(float4* __restrict__ dst, const volatile flo
 void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_layer, int n_expert,
                    const uint8_t* cache_base, const unsigned long long* slot_off, long long blob, int32_t* plan,
                    long long capx, uint32_t* skip, uint32_t ring, void* stream) {
-    resident_plan_kernel<<<1, 1, 0, (cudaStream_t) stream>>>(ids, n_entries, k, res_layer, n_expert, cache_base, slot_off,
-                                                             blob, plan, capx, skip, ring);
+    resident_plan_kernel<<<1, 64, 0, (cudaStream_t) stream>>>(ids, n_entries, k, res_layer, n_expert, cache_base, slot_off,
+                                                              blob, plan, capx, skip, ring);
     check("resident_plan");
 }
 void wait_flag_ge_or(const uint32_t* flag, uint32_t value, const uint32_t* skip, void* stream) {
diff --git a/src/kernels/ngram.cpp b/src/kernels/ngram.cpp
index a533dbf5106..7292dd963bb 100644
--- a/src/kernels/ngram.cpp
+++ b/src/kernels/ngram.cpp
@@ -150,6 +150,11 @@ struct PleTable::Impl {
     bool locked = false;
     uint32_t rows[PLE_N_HEADS] = {};
     uint8_t raw[PLE_N_HEADS * PLE_ROW_BYTES_MAX] = {};
+    static constexpr size_t kMaxPrefetch = 16;
+    size_t n_prefetch = 0;
+    strata::ngram::PleReader::Ticket prefetch_tickets[kMaxPrefetch] = {};
+    uint32_t prefetch_keys[kMaxPrefetch][PLE_N_HEADS] = {};
+    uint8_t prefetch_raw[kMaxPrefetch][PLE_N_HEADS * PLE_ROW_BYTES_MAX] = {};
     bool fp8 = false;                 // F8_E4M3 rows (tools/ple_fp8_pack.py); else IQ4_NL
     float scale = 1.0f;               // the FP8 table's one scale
     uint32_t rb = PLE_ROW_BYTES;      // bytes per row
@@ -275,7 +280,40 @@ bool PleTable::open(const std::string& gguf_path, std::string& err, const PleIoO
     return true;
 }
 
+void PleTable::wait_prefetches() {
+    if (impl_->n_prefetch == 0) return;
+    std::string dummy;
+    for (size_t i = 0; i < impl_->n_prefetch; ++i) (void) impl_->reader.collect(impl_->prefetch_tickets[i], dummy);
+    impl_->n_prefetch = 0;
+}
+
+void PleTable::prefetch_rows(const uint32_t* rows16) {
+    if (impl_->mode == PleIo::Direct && impl_->reader.is_open()) {
+        for (size_t i = 0; i < impl_->n_prefetch; ++i)
+            if (std::memcmp(impl_->prefetch_keys[i], rows16, sizeof(uint32_t) * PLE_N_HEADS) == 0) return;
+        if (impl_->n_prefetch >= Impl::kMaxPrefetch) wait_prefetches();
+        const size_t slot = impl_->n_prefetch++;
+        std::memcpy(impl_->prefetch_keys[slot], rows16, sizeof(uint32_t) * PLE_N_HEADS);
+        impl_->prefetch_tickets[slot] = impl_->reader.issue(impl_->prefetch_keys[slot], PLE_N_HEADS, impl_->prefetch_raw[slot]);
+        return;
+    }
+#if defined(_WIN32)
+    if (impl_->data != nullptr && g_ple_prefetch) {
+        WIN32_MEMORY_RANGE_ENTRY ranges[PLE_N_HEADS];
+        ULONG_PTR n = 0;
+        for (int h = 0; h < PLE_N_HEADS; ++h) {
+            if (rows16[h] >= impl_->n_rows) continue;
+            ranges[n].VirtualAddress = (PVOID) (impl_->data + (size_t) rows16[h] * impl_->rb);
+            ranges[n].NumberOfBytes = impl_->rb;
+            ++n;
+        }
+        if (n > 0) (void) PrefetchVirtualMemory(GetCurrentProcess(), n, ranges, 0);
+    }
+#endif
+}
+
 void PleTable::close() {
+    wait_prefetches();
     impl_->reader.close();
     impl_->pending = false;
     impl_->locked = false;   // the unmap below releases the lock
@@ -318,6 +356,7 @@ void PleTable::read_row(uint32_t row, float* out160) const {
 }
 
 bool PleTable::issue(const uint32_t* rows16) {
+    wait_prefetches();
     std::memcpy(impl_->rows, rows16, sizeof impl_->rows);
     if (impl_->mode == PleIo::Direct) {
         if (impl_->pending) return false;              // one token in flight per table
@@ -360,6 +399,35 @@ bool PleTable::gather_batch(const uint32_t* rows, size_t n_tokens, float* out, s
     if (impl_->pending) { err = "PleTable::gather_batch while a token is in flight"; return false; }
     const size_t n = n_tokens * (size_t) PLE_N_HEADS;
     if (impl_->mode == PleIo::Direct) {
+        // Fast path: if all requested tokens match our in-flight/completed prefetch slots, collect them directly
+        // without issuing a second PleReader ticket or copying through RowCache.
+        if (impl_->n_prefetch >= n_tokens && n_tokens <= Impl::kMaxPrefetch) {
+            bool exact_match = true;
+            for (size_t t = 0; t < n_tokens; ++t) {
+                if (std::memcmp(impl_->prefetch_keys[t], rows + t * PLE_N_HEADS, sizeof(uint32_t) * PLE_N_HEADS) != 0) {
+                    exact_match = false;
+                    break;
+                }
+            }
+            if (exact_match) {
+                for (size_t i = 0; i < impl_->n_prefetch; ++i) {
+                    if (!impl_->reader.collect(impl_->prefetch_tickets[i], err)) {
+                        impl_->n_prefetch = 0;
+                        return false;
+                    }
+                }
+                impl_->n_prefetch = 0;
+                for (size_t t = 0; t < n_tokens; ++t) {
+                    for (int h = 0; h < PLE_N_HEADS; ++h) {
+                        impl_->decode(impl_->prefetch_raw[t] + (size_t) h * impl_->rb,
+                                      out + (t * PLE_N_HEADS + (size_t) h) * PLE_HEAD_DIM);
+                    }
+                }
+                impl_->bytes_read += (uint64_t) n * impl_->rb;
+                return true;
+            }
+        }
+        wait_prefetches();
         std::vector<uint8_t> raw(n * impl_->rb);
         const auto ticket = impl_->reader.issue(rows, n, raw.data());
         if (!impl_->reader.collect(ticket, err)) return false;
@@ -367,6 +435,7 @@ bool PleTable::gather_batch(const uint32_t* rows, size_t n_tokens, float* out, s
         impl_->bytes_read += (uint64_t) n * impl_->rb;
         return true;
     }
+    wait_prefetches();
     for (size_t i = 0; i < n; ++i) read_row(rows[i], out + i * PLE_HEAD_DIM);
     return true;
 }
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index b9a4440cca8..5b31355493a 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2493,7 +2493,7 @@ int main(int argc, char** argv) {
             }
         }
     }
-    strata::core::Verifier::set_commit_async(!multi_gpu);   // see Verifier::set_commit_async
+    strata::core::Verifier::set_commit_async(!split_same);   // see Verifier::set_commit_async
     // ---- layer split across GPUs: each later stage's own copy of the dense weights, its session and (the last) the
     // head, made on its device before the host arena is mapped (as the drafter below, for the same WDDM reason)
     std::vector<std::unique_ptr<GpuStage>> stages;
@@ -2668,7 +2668,7 @@ int main(int argc, char** argv) {
     // those allocations are already made before a stage's cache is sized, so what has to be held back here is
     // the windows and - only on the stage that carries them - the drafter and the head.
     const int64_t kWindowMib = 96;       // the verify windows; 75 MiB measured, rounded up
-    const int64_t kDrafterMib = 1000;    // the MTP drafter (839 MiB) + the head, on the last stage only
+    const int64_t kDrafterMib = 1320;    // the MTP drafter (839 MiB) + the native Q5_K head (466 MiB), on the last stage only
     // #340: with the own prompt buffers chosen by the split's rule (not asked for with --no-prefill-borrow) the
     // boundary is searched as the borrowing configuration would (no reserve): the reserve then only makes the caches
     // smaller, which measured cost no decode (K=28 on 9070 XT + R9700: 58.4 tok/s own vs 58.5 borrowing), while a
@@ -2769,7 +2769,7 @@ int main(int argc, char** argv) {
             for (int i = 0; i + 1 < ns; ++i) {
                 acc += 1.0 / layer_ms[(size_t) i];
                 at[(size_t) i] = std::clamp<int64_t>((int64_t) std::llround(acc / total * (double) L),
-                                                    i == 0 ? 2 : at[(size_t) i - 1] + 1, L - (ns - 1 - i));
+                                                     i == 0 ? 2 : at[(size_t) i - 1] + 1, L - (ns - 1 - i));
             }
             consider();
         }
@@ -2883,6 +2883,7 @@ int main(int argc, char** argv) {
         // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
         const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
         if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(), vram_free_note().c_str()); return 1; }
+        mtp.set_ple_session(&ss);
     }
     // THE HEAD BEFORE THE CACHE, AND BEFORE THE ARENA.  The expert cache takes what is free minus the reserve, so
     // everything allocated after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after
@@ -4749,6 +4750,7 @@ int main(int argc, char** argv) {
         strata::core::Verifier ver;
         strata::core::VerifyHits vh;
         vh.d_res = thits.d_res;
+        vh.h_res = host_res.empty() ? nullptr : host_res.data();
         vh.cache_base = thits.cache_base;
         vh.blob = thits.blob;
         vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers
@@ -4795,6 +4797,7 @@ int main(int argc, char** argv) {
                     const strata::core::OnDevice on(gs.dev);
                     strata::core::VerifyHits vs;
                     vs.d_res = gs.d_res;
+                    vs.h_res = host_res.empty() ? nullptr : host_res.data();
                     vs.cache_base = gs.cache.device_slot(0);
                     vs.blob = thits.blob;
                     vs.slot_off = gs.cache.slot_offsets();
@@ -5049,11 +5052,14 @@ int main(int argc, char** argv) {
         }
         drive.d.plan = ver.plan_sink();
         drive.d.pcie_num = std::max(0, std::min(256, (int) (o.pcie_frac * 256.0 + 0.5)));
-        if (o.adapt_every > 0 && o.adapt_swaps > 0) drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
+        const bool all_experts_resident = !host_res.empty() &&
+            std::all_of(host_res.begin(), host_res.end(), [](int32_t r) { return r >= 0; });
+        if (o.adapt_every > 0 && o.adapt_swaps > 0 && !all_experts_resident)
+            drive.d.usage.assign((size_t) (g.n_layers * g.n_expert), 0.0f);
         // #477 --expert-profile-save: what the adaptive tier learned, kept across restarts (opt-in; off: `heat` stays
         // empty and nothing below runs).  It needs the adaptive tier's counts and the residency table.
         std::vector<double> heat;
-        if (!o.expert_profile_save.empty()) {
+        if (!o.expert_profile_save.empty() && !all_experts_resident) {
             if (drive.d.usage.empty() || host_res.empty())
                 std::fprintf(stderr, "strata serve: --expert-profile-save needs the adaptive tier (--adapt-every and "
                                      "--adapt-swaps above 0) and --expert-profile: nothing will be saved\n");
@@ -6860,6 +6866,7 @@ int main(int argc, char** argv) {
         strata::core::Verifier ver;
         strata::core::VerifyHits vh;
         vh.d_res = thits.d_res;
+        vh.h_res = host_res.empty() ? nullptr : host_res.data();
         vh.cache_base = thits.cache_base;
         vh.blob = thits.blob;
         vh.slot_off = xcache.slot_offsets();   // E-6: the device plan's pointers

From 055122c1586071e8f23d1c876ba88fa8126cffa5 Mon Sep 17 00:00:00 2001
From: Stuart Chapin <stuchapin@gmail.com>
Date: Sat, 3 Oct 2026 13:27:03 -0700
Subject: [PATCH 130/201] fix(cuda,decode): resolve sm_120 IQ3_S
 generic-pointer fault and restore 100% bit-exactness with main

---
 include/strata/kernels/native_mmvq.hpp |   3 +
 src/core/mtp.cpp                       |  19 +++-
 src/core/verify.cpp                    |  18 +++-
 src/kernels/cuda/iq_kernels.cu         | 140 ++++++++++++++++---------
 src/kernels/cuda/native_mmvq.cu        |  31 ++++++
 src/kernels/cuda/shared_expert.cu      |  47 +++------
 src/kernels/cuda/verify_kernels.cu     |   6 +-
 7 files changed, 174 insertions(+), 90 deletions(-)

diff --git a/include/strata/kernels/native_mmvq.hpp b/include/strata/kernels/native_mmvq.hpp
index 9f69dd940cf..a1554e5d1b9 100644
--- a/include/strata/kernels/native_mmvq.hpp
+++ b/include/strata/kernels/native_mmvq.hpp
@@ -38,6 +38,9 @@ bool native_mmvq_multi_exact();
 void native_quantize_q8_1(const float* x, void* x_q8_1, int n_in, int ncols,
                           void* stream);
 
+void native_swiglu_quantize_q8_1(const float* gate, const float* up, void* x_q8_1,
+                                 int n_in, int ncols, void* stream);
+
 void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
                       int n_in, int n_out, int ncols, void* stream);
 
diff --git a/src/core/mtp.cpp b/src/core/mtp.cpp
index 1983cc4710f..e9953e30025 100644
--- a/src/core/mtp.cpp
+++ b/src/core/mtp.cpp
@@ -587,8 +587,13 @@ bool MtpDrafter::record_forward(int T, int step_row0, cudaStream_t cs, std::stri
         nsw.down_type = GGML_Q8_0; nsw.down_data = q8("mlp.shared_expert.down_proj.weight");
         nsw.q8_1 = xq_;
         const SForm none{};
+        const bool need_bf16_x = !shared_expert_native_bf16_enabled();
+        static const bool fuse_head_gr = [] {
+            const char* v = std::getenv("STRATA_FUSE_HEAD_GR");
+            return v != nullptr && std::atoi(v) != 0;
+        }();
         for (int t = 0; t < T; ++t) {
-            f32_to_bf16_bulk(mixed_ + t * N, x_bf16_, N, cs);
+            if (need_bf16_x) f32_to_bf16_bulk(mixed_ + t * N, x_bf16_, N, cs);
             shared_expert(nullptr, nullptr, x_bf16_, none, nullptr, nullptr, nullptr, none, nullptr, nullptr, nullptr, none,
                           nullptr, nullptr, nullptr, bf16("mlp.shared_expert_gate.weight"), sh_scratch_, shared_ + t * N,
                           N, g.n_ff, 32, cs, mixed_ + t * N, &nsw);
@@ -596,9 +601,11 @@ bool MtpDrafter::record_forward(int T, int step_row0, cudaStream_t cs, std::stri
                 native_moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
             else
                 moe_combine(parts_ + (size_t) t * K * N, w_ + t * K, shared_ + t * N, y_ + t * N, N, K, cs);
+            if (!fuse_head_gr)
+                gr_write(R_ + (size_t) t * HC * N, y_ + t * N, inj2_ + t * HC, gs, R_ + (size_t) t * HC * N, cs);
         }
-        // ---- the final mixer (with the MLP write folded in) and the main model's head
-        {
+        // ---- the final mixer and the main model's head
+        if (fuse_head_gr) {
             FusedGrArgs fa[kFusedGrMaxT];
             for (int t = 0; t < T; ++t) {
                 fa[t].R = R_ + (size_t) t * HC * N; fa[t].R_out = R_ + (size_t) t * HC * N; fa[t].apply = true;
@@ -611,6 +618,12 @@ bool MtpDrafter::record_forward(int T, int step_row0, cudaStream_t cs, std::stri
                 fa[t].inject_out = dummy_inj_; fa[t].mixed = sample_ + t * N;
             }
             fused_gr_read_multi(fa, T, xn_, cs);
+        } else {
+            for (int t = 0; t < T; ++t)
+                gr_read(R_ + (size_t) t * HC * N, f32("hyper_connection_mixer.hc_norm.weight"),
+                        bf16("hyper_connection_mixer.input_mix_weight_down.weight"),
+                        bf16("hyper_connection_mixer.input_mix_weight_up.weight"), nullptr, EPS, gs, ss.block.gr,
+                        sample_ + t * N, dummy_inj_, cs);
         }
         native_quantize_q8_1(sample_, xq_, (int) N, T, cs);
         const bool sub = dhead_ != nullptr;
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 1b6736b8443..7e87ed58333 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -627,7 +627,11 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 copy_from_mapped(ple_, m_ple_, (int64_t) T * N, cs);
             }
             float* normalized = (float*) ((uint8_t*) ss.ple.scratch + ple_block_scratch_bytes());
-            const bool ple_batch_kv = dec_batch && n > 1 && ss.ple.w.key_bf16 != nullptr &&
+            static const bool ple_batch_env = [] {
+                const char* e = std::getenv("STRATA_PLE_BATCH");
+                return !e || e[0] != '0';
+            }();
+            const bool ple_batch_kv = ple_batch_env && dec_batch && n > 1 && ss.ple.w.key_bf16 != nullptr &&
                                       ss.ple.w.value_bf16 != nullptr && ple_native_bf16_enabled() &&
                                       ple_native_postops_enabled();
             if (ple_batch_kv) {
@@ -842,7 +846,11 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
         }
         stamp(l, 16, grp);
         gr_read_group(1, true, inj_, inj2_);
-        const bool sh_fork = !prof_on_ && sh_cs_ != nullptr && ev_fork_ != nullptr && ev_join_ != nullptr;
+        static const bool sh_stream_env = [] {
+            const char* e = std::getenv("STRATA_SH_STREAM");
+            return !e || e[0] != '0';
+        }();
+        const bool sh_fork = sh_stream_env && !prof_on_ && sh_cs_ != nullptr && ev_fork_ != nullptr && ev_join_ != nullptr;
         cudaStream_t sh_stream = sh_fork ? sh_cs_ : cs;
         if (sh_fork) {
             cudaEventRecord(ev_fork_, cs);
@@ -920,7 +928,11 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     };
 
     // ---------------------------------------------------------------- post(l, group): experts, combine
-    const bool fuse_head_gr = (le_ == g.n_layers) && (head_ != nullptr && head_->loaded()) &&
+    static const bool fuse_head_gr_env = [] {
+        const char* e = std::getenv("STRATA_FUSE_HEAD_GR");
+        return e && e[0] == '1';
+    }();
+    const bool fuse_head_gr = fuse_head_gr_env && (le_ == g.n_layers) && (head_ != nullptr && head_->loaded()) &&
                               !cvec().covers(g.n_layers - 1);
     auto post = [&](int64_t l, int grp) -> bool {
         const int tb = tb_[grp], te = te_[grp], n = te - tb;
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index fc78b065161..29b68788770 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -558,15 +558,20 @@ template<int TY> struct Split;
 // per-entry ones, which call Fmt<TY>::dot per column exactly as before #242 (the launchers test kSplit at compile
 // time, so the multi kernels are never instantiated for a type without a Split).
 template<int TY> inline constexpr bool kSplit = false;
+template<int TY> inline constexpr bool kStageIqGrid = (TY == 16 || TY == 17 || TY == 22 || TY == 29);
+
 template<> inline constexpr bool kSplit<16> = true;
 template<> struct Split<16> {   // IQ2_XXS
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ s_grid = nullptr) {
         const block_iq2_xxs* bq2 = (const block_iq2_xxs*) vbq + kbx;
         const int q2 = get_int_b2(bq2->qs, iqs);
         const uint8_t* aux8 = (const uint8_t*) &q2;
         const uint32_t aux32 = get_int_b2(bq2->qs, iqs + 1);
-        const uint2* grid_lut = s_grid ? (const uint2*) s_grid : (const uint2*) iq2xxs_grid;
+        const uint2* grid_lut;
+        if constexpr (STAGE_GRID) grid_lut = (const uint2*) s_grid;
+        else grid_lut = (const uint2*) iq2xxs_grid;
         W r;
 #pragma unroll
         for (int k0 = 0; k0 < 8; k0 += 2) {
@@ -606,11 +611,14 @@ struct SplitLs2 {
 };
 template<> inline constexpr bool kSplit<17> = true;
 template<> struct Split<17> : SplitLs2 {   // IQ2_XS
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ s_grid = nullptr) {
         const block_iq2_xs* bq2 = (const block_iq2_xs*) vbq + kbx;
         const int2 q2_packed = make_int2(get_int_b2(bq2->qs, iqs + 0), get_int_b2(bq2->qs, iqs + 1));
         const uint16_t* q2 = (const uint16_t*) &q2_packed;
-        const uint2* grid_lut = s_grid ? (const uint2*) s_grid : (const uint2*) iq2xs_grid;
+        const uint2* grid_lut;
+        if constexpr (STAGE_GRID) grid_lut = (const uint2*) s_grid;
+        else grid_lut = (const uint2*) iq2xs_grid;
         W r;
         r.ls0 = bq2->scales[iqs / 2] & 0x0F;
         r.ls1 = bq2->scales[iqs / 2] >> 4;
@@ -629,14 +637,17 @@ template<> struct Split<17> : SplitLs2 {   // IQ2_XS
 };
 template<> inline constexpr bool kSplit<22> = true;
 template<> struct Split<22> : SplitLs2 {   // IQ2_S
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ s_grid = nullptr) {
         const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
         const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq2->qh[iqs / 2];
         const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
         const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
-        const uint64_t* grid_lut = s_grid ? (const uint64_t*) s_grid : iq2s_grid;
+        const uint64_t* grid_lut;
+        if constexpr (STAGE_GRID) grid_lut = (const uint64_t*) s_grid;
+        else grid_lut = iq2s_grid;
         W r;
         r.ls0 = bq2->scales[iqs / 2] & 0x0F;
         r.ls1 = bq2->scales[iqs / 2] >> 4;
@@ -655,16 +666,16 @@ template<> struct Split<22> : SplitLs2 {   // IQ2_S
 template<> inline constexpr bool kSplit<18> = true;
 template<> struct Split<18> {   // IQ3_XXS
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ = nullptr) {
         const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
         const int2 q3_packed = make_int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
         const uint8_t* q3 = (const uint8_t*) &q3_packed;
         const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
-        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq3xxs_grid;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int2 grid_pos = make_int2(grid_lut[q3[l0 + 0]], grid_lut[q3[l0 + 1]]);
+            const int2 grid_pos = make_int2(iq3xxs_grid[q3[l0 + 0]], iq3xxs_grid[q3[l0 + 1]]);
             const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
             const int signs0 = __vcmpne4(signs & 0x08040201, 0);
             r.g[l0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -687,19 +698,19 @@ template<> struct Split<18> {   // IQ3_XXS
 template<> inline constexpr bool kSplit<21> = true;
 template<> struct Split<21> {   // IQ3_S
     struct W { int g[8]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ = nullptr) {
         const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
         const int2 qs_packed = make_int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
         const uint8_t* qs = (const uint8_t*) &qs_packed;
         const int qh = bq3->qh[iqs / 2];
         const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
         const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
-        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq3s_grid;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
-            const int2 grid_pos = make_int2(grid_lut[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
-                                            grid_lut[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+            const int2 grid_pos = make_int2(iq3s_grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                                            iq3s_grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
             const int signs0 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x03) << 7) | ((signs_packed_8[l0 / 2] & 0x0C) << 21), 0x00000000);
             const int signs1 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x30) << 3) | ((signs_packed_8[l0 / 2] & 0xC0) << 17), 0x00000000);
             r.g[l0 + 0] = __vsub4(grid_pos.x ^ signs0, signs0);
@@ -721,11 +732,14 @@ template<> struct Split<21> {   // IQ3_S
 template<> inline constexpr bool kSplit<29> = true;
 template<> struct Split<29> {   // IQ1_M
     struct W { int g[8]; float delta[4]; int sc0, sc1; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ s_grid = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ s_grid = nullptr) {
         const block_iq1_m* bq1 = (const block_iq1_m*) vbq + kbx;
         const int qs_packed = get_int_b4(bq1->qs, iqs);
         const uint8_t* qs = (const uint8_t*) &qs_packed;
-        const uint32_t* grid_lut = s_grid ? (const uint32_t*) s_grid : iq1s_grid_gpu;
+        const uint32_t* grid_lut;
+        if constexpr (STAGE_GRID) grid_lut = s_grid;
+        else grid_lut = iq1s_grid_gpu;
         W r;
 #pragma unroll
         for (int l0 = 0; l0 < 8; l0 += 2) {
@@ -765,7 +779,8 @@ template<> struct Split<29> {   // IQ1_M
 template<> inline constexpr bool kSplit<20> = true;
 template<> struct Split<20> {   // IQ4_NL
     struct W { int2 v[2]; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ = nullptr) {
         const block_iq4_nl* bq4 = (const block_iq4_nl*) vbq + kbx;
         W r;
 #pragma unroll
@@ -788,7 +803,8 @@ template<> struct Split<20> {   // IQ4_NL
 template<> inline constexpr bool kSplit<23> = true;
 template<> struct Split<23> {   // IQ4_XS
     struct W { int2 v[4]; int ls; float dw; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ = nullptr) {
         const block_iq4_xs* bq4 = (const block_iq4_xs*) vbq + kbx;
         W r;
 #pragma unroll
@@ -814,7 +830,8 @@ template<> struct Split<23> {   // IQ4_XS
 template<> inline constexpr bool kSplit<42> = true;
 template<> struct Split<42> {   // Q2_0
     struct W { int qx[4], qy[4]; float d2; };
-    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const void* __restrict__ = nullptr) {
+    template<bool STAGE_GRID = false>
+    __device__ static W load(const void* __restrict__ vbq, int kbx, int iqs, const uint32_t* __restrict__ = nullptr) {
         const block_q2_0* bq2_0 = (const block_q2_0*) vbq + kbx;
         W r;
         r.d2 = bq2_0->d;
@@ -847,16 +864,16 @@ template<> struct Split<42> {   // Q2_0
 // One row against the n <= NC activations x + off[0..n) (n >= 1, warp-uniform; offsets in q8_1 blocks, 32-bit to
 // spare registers), the whole warp.  Per activation this is row_dot: the same calls k, lane-strided the same way,
 // summed in the same order, then the same warp_sum.  Only the weight side moves out of the per-activation loop.
-template<int TY, int NC, bool EXACT_N = false>
+template<int TY, int NC, bool EXACT_N = false, bool STAGE_GRID = false>
 __device__ __forceinline__ void row_dot_multi(const uint8_t* row, const block_q8_1* x, const int (&off)[NC], int n,
-                                              int nb, int lane, float (&s)[NC], const void* __restrict__ s_grid = nullptr) {
+                                              int nb, int lane, float (&s)[NC], const uint32_t* __restrict__ s_grid = nullptr) {
     using F = Fmt<TY>;
     using S = Split<TY>;
 #pragma unroll
     for (int c = 0; c < NC; ++c) s[c] = 0.0f;
     for (int k = lane; k < nb * F::ipb; k += 32) {
         const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
-        const typename S::W w = S::load(row, kbx, iqs, s_grid);
+        const typename S::W w = S::template load<STAGE_GRID>(row, kbx, iqs, s_grid);
 #pragma unroll
         for (int c = 0; c < NC; ++c)
             if (EXACT_N || c < n) s[c] += S::apply(w, x + off[c] + kbx * (F::qk / 32), iqs);
@@ -961,58 +978,52 @@ __device__ __forceinline__ void row_dot_20_sub16(const uint8_t* row, const block
     }
 }
 
-template<int TY>
-__device__ __forceinline__ const void* stage_iq_grid(uint32_t* s_buf, int tid, int nthreads) {
-    if constexpr (TY == 16) {
+template<int TY, bool STAGE_GRID = kStageIqGrid<TY>>
+__device__ __forceinline__ const uint32_t* stage_iq_grid(uint32_t* s_buf, int tid, int nthreads) {
+    if constexpr (!STAGE_GRID) {
+        return nullptr;
+    } else if constexpr (TY == 16) {
         uint2* dst = (uint2*) s_buf;
         const uint2* src = (const uint2*) iq2xxs_grid;
         for (int i = tid; i < 256; i += nthreads) dst[i] = src[i];
         __syncthreads();
-        return dst;
+        return s_buf;
     } else if constexpr (TY == 17) {
         uint2* dst = (uint2*) s_buf;
         const uint2* src = (const uint2*) iq2xs_grid;
         for (int i = tid; i < 512; i += nthreads) dst[i] = src[i];
         __syncthreads();
-        return dst;
-    } else if constexpr (TY == 18) {
-        for (int i = tid; i < 256; i += nthreads) s_buf[i] = iq3xxs_grid[i];
-        __syncthreads();
-        return s_buf;
-    } else if constexpr (TY == 21) {
-        for (int i = tid; i < 512; i += nthreads) s_buf[i] = iq3s_grid[i];
-        __syncthreads();
         return s_buf;
     } else if constexpr (TY == 22) {
         uint2* dst = (uint2*) s_buf;
         const uint2* src = (const uint2*) iq2s_grid;
         for (int i = tid; i < 1024; i += nthreads) dst[i] = src[i];
         __syncthreads();
-        return dst;
+        return s_buf;
     } else if constexpr (TY == 29) {
         uint2* dst = (uint2*) s_buf;
         const uint2* src = (const uint2*) iq1s_grid_gpu;
         for (int i = tid; i < 1024; i += nthreads) dst[i] = src[i];
         __syncthreads();
-        return dst;
+        return s_buf;
     } else {
         return nullptr;
     }
 }
 
-template<int TY>
+template<int TY, bool STAGE_GRID = kStageIqGrid<TY>>
 struct IqGridWords {
-    static constexpr int value = (TY == 22 || TY == 29) ? 2048 : (TY == 17) ? 1024 : (TY == 16 || TY == 21) ? 512 : (TY == 18) ? 256 : 1;
+    static constexpr int value = !STAGE_GRID ? 4 : (TY == 22 || TY == 29) ? 2048 : (TY == 17) ? 1024 : (TY == 16) ? 512 : 4;
 };
 
 // mmvq_kernel with the columns taken NC at a time.  After warp_sum every lane holds the same sum, so lane c stores
 // column c.
-template<int TY, int NC>
+template<int TY, int NC, bool STAGE_GRID = kStageIqGrid<TY>>
 __global__ void __launch_bounds__(128) mmvq_multi_kernel(const uint8_t* __restrict__ w, size_t row_bytes,
                                                          const block_q8_1* __restrict__ x, float* __restrict__ y,
                                                          int n_in, int n_out, int ncols) {
-    __shared__ uint32_t s_grid_buf[IqGridWords<TY>::value];
-    const void* s_grid = stage_iq_grid<TY>(s_grid_buf, threadIdx.y * 32 + threadIdx.x, 128);
+    __shared__ alignas(16) uint32_t s_grid_buf[IqGridWords<TY, STAGE_GRID>::value];
+    const uint32_t* s_grid = stage_iq_grid<TY, STAGE_GRID>(s_grid_buf, threadIdx.y * 32 + threadIdx.x, 128);
     const int row = blockIdx.x * 4 + threadIdx.y;
     if (row >= n_out) return;
     const int lane = threadIdx.x;
@@ -1024,7 +1035,7 @@ __global__ void __launch_bounds__(128) mmvq_multi_kernel(const uint8_t* __restri
 #pragma unroll
         for (int c = 0; c < NC; ++c) off[c] = (c0 + min(c, n - 1)) * xb;
         float s[NC];
-        row_dot_multi<TY, NC>(wr, x, off, n, nb, lane, s, s_grid);
+        row_dot_multi<TY, NC, false, STAGE_GRID>(wr, x, off, n, nb, lane, s, s_grid);
 #pragma unroll
         for (int c = 0; c < NC; ++c)
             if (c < n && lane == c) y[(size_t) (c0 + c) * n_out + row] = s[c];
@@ -1070,7 +1081,7 @@ __global__ void __launch_bounds__(256) native_gu_kernel(const unsigned long long
 // has halves of <= 4), so 4 takes such windows in one pass; 8 would take ~64-80 registers against ~48 (ptxas -v).
 constexpr int GRP_NC = 4;
 
-template<int TG>
+template<int TG, bool STAGE_GRID = kStageIqGrid<TG>>
 __global__ void __launch_bounds__(256) native_gu_multi_kernel(const unsigned long long* __restrict__ grp_ptr,
                                                               const int32_t* __restrict__ grp_start,
                                                               const int32_t* __restrict__ n_groups,
@@ -1079,8 +1090,8 @@ __global__ void __launch_bounds__(256) native_gu_multi_kernel(const unsigned lon
                                                               float* __restrict__ gate, float* __restrict__ up) {
     const int ng = *n_groups;
     if (blockIdx.y >= ng) return;
-    __shared__ uint32_t s_grid_buf[IqGridWords<TG>::value];
-    const void* s_grid = stage_iq_grid<TG>(s_grid_buf, threadIdx.x, 256);
+    __shared__ alignas(16) uint32_t s_grid_buf[IqGridWords<TG, STAGE_GRID>::value];
+    const uint32_t* s_grid = stage_iq_grid<TG, STAGE_GRID>(s_grid_buf, threadIdx.x, 256);
     const int warp = threadIdx.x >> 5, lane = threadIdx.x & 31;
     const int row = blockIdx.x * GU_ROWS + warp;             // 0 .. 2*n_ff
     if (row >= 2 * L.n_ff) return;
@@ -1097,19 +1108,19 @@ __global__ void __launch_bounds__(256) native_gu_multi_kernel(const unsigned lon
             if (n == 1) {
                 const int off1[1] = { ent_tok[e] * xb };
                 float s1[1];
-                row_dot_multi<TG, 1, true>(wr, xq, off1, 1, nb, lane, s1, s_grid);
+                row_dot_multi<TG, 1, true, STAGE_GRID>(wr, xq, off1, 1, nb, lane, s1, s_grid);
                 if (lane == 0) dst[(size_t) e * L.n_ff + r] = s1[0];
             } else if (n == 2) {
                 const int off2[2] = { ent_tok[e] * xb, ent_tok[e + 1] * xb };
                 float s2[2];
-                row_dot_multi<TG, 2, true>(wr, xq, off2, 2, nb, lane, s2, s_grid);
+                row_dot_multi<TG, 2, true, STAGE_GRID>(wr, xq, off2, 2, nb, lane, s2, s_grid);
                 if (lane < 2) dst[(size_t) (e + lane) * L.n_ff + r] = s2[lane];
             } else {
                 int off[GRP_NC];
 #pragma unroll
                 for (int c = 0; c < GRP_NC; ++c) off[c] = ent_tok[e + min(c, n - 1)] * xb;
                 float s[GRP_NC];
-                row_dot_multi<TG, GRP_NC>(wr, xq, off, n, nb, lane, s, s_grid);
+                row_dot_multi<TG, GRP_NC, false, STAGE_GRID>(wr, xq, off, n, nb, lane, s, s_grid);
 #pragma unroll
                 for (int c = 0; c < GRP_NC; ++c)
                     if (c < n && lane == c) dst[(size_t) (e + c) * L.n_ff + r] = s[c];
@@ -1671,6 +1682,11 @@ bool env_on(const char* name) {
 }
 // STRATA_OLD_IQ_MMVQ=1 keeps the per-column kernels (bitwise equal to the new ones; kept for A/B timing)
 bool g_old_kernels = env_on("STRATA_OLD_IQ_MMVQ");
+// STRATA_IQ_STAGE_GRID=0 disables staging 64-bit i-quant codebook tables into shared memory
+bool g_stage_grid = [] {
+    const char* v = std::getenv("STRATA_IQ_STAGE_GRID");
+    return v == nullptr || v[0] == '\0' || v[0] != '0';
+}();
 
 template<int TY>
 void launch_mmvq(const uint8_t* W, size_t rb, const block_q8_1* X, float* y, int n_in, int n_out, int ncols,
@@ -1678,10 +1694,24 @@ void launch_mmvq(const uint8_t* W, size_t rb, const block_q8_1* X, float* y, int
     const dim3 grid((unsigned) ((n_out + 3) / 4)), block(32, 4);
     if constexpr (!kSplit<TY>) mmvq_kernel<TY><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
     else if (g_old_kernels) mmvq_kernel<TY><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
-    else if (ncols <= 1) mmvq_multi_kernel<TY, 1><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
-    else if (ncols == 2) mmvq_multi_kernel<TY, 2><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
-    else if (ncols <= 4) mmvq_multi_kernel<TY, 4><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
-    else mmvq_multi_kernel<TY, 8><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);   // 8 at a time past 8
+    else if constexpr (kStageIqGrid<TY>) {
+        if (!g_stage_grid) {
+            if (ncols <= 1) mmvq_multi_kernel<TY, 1, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+            else if (ncols == 2) mmvq_multi_kernel<TY, 2, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+            else if (ncols <= 4) mmvq_multi_kernel<TY, 4, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+            else mmvq_multi_kernel<TY, 8, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+            return;
+        }
+        if (ncols <= 1) mmvq_multi_kernel<TY, 1><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else if (ncols == 2) mmvq_multi_kernel<TY, 2><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else if (ncols <= 4) mmvq_multi_kernel<TY, 4><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else mmvq_multi_kernel<TY, 8><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+    } else {
+        if (ncols <= 1) mmvq_multi_kernel<TY, 1><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else if (ncols == 2) mmvq_multi_kernel<TY, 2><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else if (ncols <= 4) mmvq_multi_kernel<TY, 4><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
+        else mmvq_multi_kernel<TY, 8><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);   // 8 at a time past 8
+    }
 }
 
 template<int TG>
@@ -1690,7 +1720,13 @@ void launch_gu(dim3 grid, cudaStream_t s, const unsigned long long* grp_ptr, con
                float* gate, float* up) {
     if constexpr (!kSplit<TG>) native_gu_kernel<TG><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
     else if (g_old_kernels) native_gu_kernel<TG><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
-    else native_gu_multi_kernel<TG><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+    else if constexpr (kStageIqGrid<TG>) {
+        if (!g_stage_grid) {
+            native_gu_multi_kernel<TG, false><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+            return;
+        }
+        native_gu_multi_kernel<TG><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
+    } else native_gu_multi_kernel<TG><<<grid, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up);
 }
 
 template<int TD>
diff --git a/src/kernels/cuda/native_mmvq.cu b/src/kernels/cuda/native_mmvq.cu
index 147f385d144..fc1a959552a 100644
--- a/src/kernels/cuda/native_mmvq.cu
+++ b/src/kernels/cuda/native_mmvq.cu
@@ -152,6 +152,22 @@ __global__ void native_quantize_q8_1_kernel(const float* __restrict__ x,
     if (i % Q8K == 0) y[i / Q8K].ds = q8_1_ds(d, sum);
 }
 
+__launch_bounds__(QUANT_THREADS, 1)
+__global__ void native_swiglu_quantize_q8_1_kernel(const float* __restrict__ gate,
+                                                   const float* __restrict__ up,
+                                                   Q81Block* __restrict__ y, int n_in) {
+    const int i = int(blockIdx.x) * QUANT_THREADS + int(threadIdx.x);
+    if (i >= n_in) return; // n_in is a multiple of 32: only whole warps return.
+    const float gi = gate[i];
+    const float xi = __fmul_rn(__fdividef(gi, __fadd_rn(1.0f, __expf(-gi))), up[i]);
+    const float amax = warp_max(fabsf(xi));
+    const float sum = warp_sum(xi);
+    const float d = amax / 127.0f;
+    const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
+    y[i / Q8K].qs[i % Q8K] = q;
+    if (i % Q8K == 0) y[i / Q8K].ds = make_half2(d, sum);
+}
+
 // Exact pinned vec_dot_q5_K_q8_1_impl_vmmq expression and integer dot order.
 __device__ __forceinline__ float q5_q8_dot_impl(
     const int* __restrict__ vl, const int* __restrict__ vh, const int* __restrict__ u,
@@ -1165,6 +1181,21 @@ void native_quantize_q8_1(const float* x, void* x_q8_1, int n_in, int ncols, voi
     launch_check();
 }
 
+void native_swiglu_quantize_q8_1(const float* gate, const float* up, void* x_q8_1,
+                                 int n_in, int ncols, void* stream) {
+    validate_shape(n_in, ncols);
+    validate_pointer(gate);
+    validate_pointer(up);
+    validate_pointer(x_q8_1);
+    validate_stream(stream);
+    const int n_total = n_in * ncols;
+    const unsigned blocks = unsigned((std::size_t(n_total) + QUANT_THREADS - 1) / QUANT_THREADS);
+    native_swiglu_quantize_q8_1_kernel<<<blocks, QUANT_THREADS, 0,
+                                         static_cast<cudaStream_t>(stream)>>>(
+        gate, up, static_cast<Q81Block*>(x_q8_1), n_total);
+    launch_check();
+}
+
 void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
                       int n_in, int n_out, int ncols, void* stream) {
     validate_shape(n_in, ncols, QK);
diff --git a/src/kernels/cuda/shared_expert.cu b/src/kernels/cuda/shared_expert.cu
index d4479cbd299..28bb7edc176 100644
--- a/src/kernels/cuda/shared_expert.cu
+++ b/src/kernels/cuda/shared_expert.cu
@@ -161,32 +161,6 @@ void shared_expert_set_native_bf16(bool enabled) { native_bf16 = enabled; }
 bool shared_expert_native_bf16_enabled() { return native_bf16; }
 
 namespace {
-struct SharedQ81Block {
-    half2 ds;
-    int8_t qs[32];
-};
-
-__launch_bounds__(256, 1)
-__global__ void native_swiglu_quantize_q8_1_kernel(const float* __restrict__ gate,
-                                                   const float* __restrict__ up,
-                                                   SharedQ81Block* __restrict__ y, int n_in) {
-    const int i = int(blockIdx.x) * 256 + int(threadIdx.x);
-    if (i >= n_in) return;
-    const float gi = gate[i];
-    const float xi = __fdividef(gi, 1.0f + __expf(-gi)) * up[i];
-    float amax = fabsf(xi);
-    float sum = xi;
-#pragma unroll
-    for (int offset = 16; offset > 0; offset >>= 1) {
-        amax = fmaxf(amax, __shfl_xor_sync(0xffffffffu, amax, offset, 32));
-        sum += __shfl_xor_sync(0xffffffffu, sum, offset, 32);
-    }
-    const float d = amax / 127.0f;
-    const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
-    y[i / 32].qs[i % 32] = q;
-    if ((i & 31) == 0) y[i / 32].ds = make_half2(d, sum);
-}
-
 __global__ void scale_rows_kernel(float* __restrict__ out, const float* __restrict__ g, int n) {
     const int t = blockIdx.y;
     const int i = blockIdx.x * blockDim.x + threadIdx.x;
@@ -201,6 +175,14 @@ __global__ void sigmoid_scale_rows_kernel(float* __restrict__ out, const float*
         out[(size_t) t * n + i] *= gt;
     }
 }
+
+bool fused_swiglu_q81_enabled() {
+    static const bool on = [] {
+        const char* v = std::getenv("STRATA_FUSED_SWIGLU_Q81");
+        return v == nullptr || std::atoi(v) != 0;
+    }();
+    return on;
+}
 }  // namespace
 
 void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, const NativeSharedWeights& nw,
@@ -217,8 +199,12 @@ void shared_expert_multi(int n_tok, const float* x, const uint16_t* x_bf16, cons
     native_mmvq(nw.gate_type, nw.gate_data, x_q8_1, gate, (int) n_embd, (int) n_ff, n_tok, stream);
     native_mmvq(nw.up_type, nw.up_data, x_q8_1, up, (int) n_embd, (int) n_ff, n_tok, stream);
     const int n = (int) (n_ff * n_tok);
-    native_swiglu_quantize_q8_1_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, cs>>>(
-        gate, up, (SharedQ81Block*) nw.q8_1, n);
+    if (fused_swiglu_q81_enabled()) {
+        native_swiglu_quantize_q8_1(gate, up, nw.q8_1, (int) n_ff, n_tok, stream);
+    } else {
+        native_swiglu_kernel<<<(unsigned) ((n + THREADS - 1) / THREADS), THREADS, 0, cs>>>(gate, up, gate, n);
+        native_quantize_q8_1(gate, nw.q8_1, (int) n_ff, n_tok, stream);
+    }
     native_mmvq(nw.down_type, nw.down_data, nw.q8_1, out, (int) n_ff, (int) n_embd, n_tok, stream);
     static const bool batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
     if (native_bf16 && batch && n_tok > 1) {   // one gemv for all rows (outputs identical), fused sigmoid+scale
@@ -320,9 +306,8 @@ void shared_expert(const uint8_t* x_q8_0, const uint8_t* x_q8k, const uint16_t*
         native_mmvq(native->up_type, native->up_data, native->q8_1, up, (int) n_embd, (int) n_ff, 1, stream);
     else
         gemv(up_form, up_codes, up_scales, up_off, x_q8_0, x_q8k, up, n_embd, n_ff);
-    if (native_projection && native_down) {
-        native_swiglu_quantize_q8_1_kernel<<<(unsigned) ((n_ff + 255) / 256), 256, 0, (cudaStream_t) stream>>>(
-            gate, up, (SharedQ81Block*) native->q8_1, (int) n_ff);
+    if (native_projection && native_down && fused_swiglu_q81_enabled()) {
+        native_swiglu_quantize_q8_1(gate, up, native->q8_1, (int) n_ff, 1, stream);
         native_mmvq(native->down_type, native->down_data, native->q8_1, out, (int) n_ff, (int) n_embd, 1, stream);
     } else {
         if (native_projection)
diff --git a/src/kernels/cuda/verify_kernels.cu b/src/kernels/cuda/verify_kernels.cu
index 8a5bcabc6d9..c26a8134079 100644
--- a/src/kernels/cuda/verify_kernels.cu
+++ b/src/kernels/cuda/verify_kernels.cu
@@ -478,7 +478,11 @@ void gdn_step_norm_multi(float* state, const float* h, int conv_channels, const
         std::fprintf(stderr, "gdn_step_norm_multi: invalid arguments\n");
         std::exit(1);
     }
-    if (n_keep != nullptr && t_out_begin >= n_tok) {
+    static const bool commit_split = [] {
+        const char* e = std::getenv("STRATA_GDN_COMMIT_SPLIT");
+        return !e || e[0] != '0';
+    }();
+    if (commit_split && n_keep != nullptr && t_out_begin >= n_tok) {
         gdn_step_commit_kernel<<<dim3((unsigned) h_v, 4u), dim3(32, RG), 0, (cudaStream_t) stream>>>(
             state, h, conv_channels, gate, beta, h_k, h_v, n_keep);
     } else {

From 016ea2e83c5b6a620aea5d63545aab22a76a4617 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:27:37 +0200
Subject: [PATCH 131/201] iq_avx2: the IQ2 sign table at compile time (no
 static constructor in an AVX2 file)

#391 removed MSVC's BMI2 shlx from the table's constructor; GCC still vectorised the same loop into
AVX2 (vpbroadcastb) and ran it before main() on an AVX-only Xeon E5 (found by rwkeyes' Strata_Dirigo
fork, 6dd37a2, which made it constexpr). constexpr here as well, deriving ksigns_iq2xs[i] (the 7 bits
plus an even-parity bit) so the constant expression does not read a non-constexpr array. Same 128
values; the file now has no runtime initializer.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/kernels/cpu/iq_avx2.cpp | 33 ++++++++++++++++-----------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/src/kernels/cpu/iq_avx2.cpp b/src/kernels/cpu/iq_avx2.cpp
index ef6414ff16f..6fb51c9045b 100644
--- a/src/kernels/cpu/iq_avx2.cpp
+++ b/src/kernels/cpu/iq_avx2.cpp
@@ -56,31 +56,30 @@ inline __m256i sc32(int s) { return _mm256_set1_epi16(s); }
 // keven_signs_q2xs (ggml keeps it static in arch/x86/quants.c): one u64 per 7-bit sign index, byte k
 // = 0xFF when bit k of ksigns_iq2xs[i] is set, 0x01 otherwise.  With this a whole 32-value sign vector
 // is four scalar loads and a set_epi64x - no ksigns byte packing chain and no bit_selector expansion.
-// Built once at load time from the shared ggml-common table so it can never drift from it.
 //
-// The byte is WRITTEN, not shifted into place.  `<< (8 * k)` is a VARIABLE shift, and MSVC compiling
-// this file with /arch:AVX2 emits BMI2 `shlx` for it - it assumes that anything with AVX2 also has
-// BMI2, which is true of Haswell and every later core, and false of everything before it.  Because
-// `even_signs` is a namespace-scope static, that constructor runs BEFORE main(), so the fault happens
-// at process start rather than at first use: strata.exe exited 0xC000001D (illegal instruction) with
-// no output at all, not even for --help.  One `shlx` in the whole binary was enough.
-//
-// Storing the byte directly gives the same 64-bit value on the little-endian targets this file is
-// for (byte k of the OR of `0xFF << 8k` / `0x01 << 8k` is exactly that byte and nothing else), and it
-// contains no variable shift for the compiler to widen.
+// Computed at COMPILE time (constexpr), so this file has no static constructor at all.  This TU is compiled
+// for AVX2, and a runtime constructor here runs before main() on every CPU: MSVC turned its variable shift
+// into BMI2 `shlx` (#391, demetree: strata.exe exited 0xC000001D before printing anything on a Sandy Bridge
+// Xeon) and GCC vectorised the loop into AVX2 (`vpbroadcastb`, found on an AVX-only Xeon E5 by the
+// Strata_Dirigo fork).  ksigns_iq2xs[i] is i's 7 bits plus an even-parity bit 7 (ggml-common.h); a const
+// array is not usable in a constant expression, so the byte is derived the same way here, and
+// native_expert_parity checks these kernels against ggml-cpu's.
 struct EvenSigns {
     uint64_t v[128];
-    EvenSigns() {
+    constexpr EvenSigns() : v{} {
         for (int i = 0; i < 128; ++i) {
-            uint8_t b[8];
-            for (int k = 0; k < 8; ++k) b[k] = ((ksigns_iq2xs[i] >> k) & 1) ? 0xFF : 0x01;
-            uint64_t r;
-            std::memcpy(&r, b, sizeof(r));
+            int par = 0;
+            for (int k = 0; k < 7; ++k) par ^= (i >> k) & 1;
+            const int s = i | (par << 7);          // == ksigns_iq2xs[i]
+            uint64_t r = 0;
+            for (int k = 0; k < 8; ++k) r |= (uint64_t) (((s >> k) & 1) ? 0xFF : 0x01) << (8 * k);
             v[i] = r;
         }
     }
 };
-static const EvenSigns even_signs;
+static constexpr EvenSigns even_signs{};
+static_assert(even_signs.v[0] == 0x0101010101010101ull && even_signs.v[1] == 0xFF010101010101FFull,
+              "keven_signs_q2xs: byte k = 0xFF when bit k of ksigns_iq2xs[i] is set");
 
 inline float hsum8(__m256 v) {
     const __m128 lo = _mm256_castps256_ps128(v), hi = _mm256_extractf128_ps(v, 1);

From e82947fc5fa4aa6736e4739fcc237994cd14b50c Mon Sep 17 00:00:00 2001
From: Demetree Kallergis <1394829+demetree@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:27:51 +0200
Subject: [PATCH 132/201] native experts: gate the AVX2 multi-token kernels on
 cpu_avx2_ok() (#394)

native_gu_rows() tested cpu_avx512_ok() before the AVX-512 kernel but not cpu_avx2_ok() before the
AVX2 one, and native_down_rows() had the same asymmetry for its two multi-token kernels (kq256 and
the IQ4_NL one). On a CPU without AVX2 a verify window of two or more tokens took an /arch:AVX2 path
and died with 0xC000001D. With the gates it falls through to ggml-cpu's vec_dot, which covers every
native type for any nt. A CPU with AVX2 takes exactly the paths it took before.

(Cherry-picked from #394's 0083bb7 without its generate.cpp part; the startup gate is reworked for the
opt-in STRATA_ISA_FLOOR build in a later commit.)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/kernels/cpu/native_expert.cpp | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/src/kernels/cpu/native_expert.cpp b/src/kernels/cpu/native_expert.cpp
index 0903761e619..d90d609583b 100644
--- a/src/kernels/cpu/native_expert.cpp
+++ b/src/kernels/cpu/native_expert.cpp
@@ -84,7 +84,14 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // AVX-2 kernel, STRATA_NO_IQ256 drops the AVX-2 kernel; ggml-cpu's single-token vec_dot is reached only with
     // both set (and on a CPU without AVX-512, STRATA_NO_IQ512 changes nothing).
     static const bool avx512 = cpu_avx512_ok() && std::getenv("STRATA_NO_IQ512") == nullptr;
-    static const bool avx2 = std::getenv("STRATA_NO_IQ256") == nullptr;
+    // STRATA_NO_IQ256 drops the AVX-2 kernel.  cpu_avx2_ok() is ALSO required: iq_avx2.cpp and kq_avx2.cpp
+    // are compiled /arch:AVX2 and use AVX2 and FMA3, so calling them on a CPU without either is an
+    // illegal instruction, not a slow path.  The gate sat next to `avx512` above, which does test
+    // cpu_avx512_ok(), and that asymmetry is what let a pre-Haswell CPU reach iq256_gu_rows.
+    // Without it this falls through to ggml-cpu's vec_dot below, which is compiled for whatever
+    // baseline the build selected (AVX1 here) and covers the same types - IQ2_XXS and IQ2_S among
+    // them.  That path loops over tokens itself, so it is correct for any `nt`, not just one.
+    static const bool avx2 = cpu_avx2_ok() && std::getenv("STRATA_NO_IQ256") == nullptr;
     // #152: from how many tokens the multi-token kernels run (ggml's vec_dot below that).  The default 2 is the
     // measured-fastest rule, but a token's expert rows then round differently alone than in a group, so greedy output
     // can depend on how many drafts a verify window held.  STRATA_IQ_MT_MIN=1 (opt-in, 0.1.30) uses the multi-token
@@ -133,11 +140,14 @@ void native_down_rows(const NativeFmt& f, const uint8_t* blob, const void* const
     static const bool iq4nl_mt = std::getenv("STRATA_NO_IQ4NL") == nullptr;
     static const int mt_min = [] { const char* e = std::getenv("STRATA_IQ_MT_MIN"); return e ? std::atoi(e) : 2; }();
     static const bool kq = [] { const char* v = std::getenv("STRATA_KQ256"); return v != nullptr && std::atoi(v) != 0; }();
-    if (kq && nt >= 2 && (f.d_type == 7 || f.d_type == 8)) {   // Q5_1 / Q8_0 down: bit-exact, any group size
+    // Both multi-token kernels below are /arch:AVX2 translation units (kq_avx2.cpp and iq_avx2.cpp),
+    // so a CPU without AVX2 has to reach ggml-cpu's vec_dot instead - same reasoning as the gate/up
+    // rows above, where `avx512` tested cpu_avx512_ok() and `avx2` did not.
+    if (cpu_avx2_ok() && kq && nt >= 2 && (f.d_type == 7 || f.d_type == 8)) {   // Q5_1 / Q8_0 down: bit-exact, any group size
         kq256_rows(f.d_type, blob + f.down_off, f.d_row, (int) f.n_ff, hq, nt, out, r0, r1);
         return;
     }
-    if (nt >= mt_min && f.d_type == 20 && iq4nl_mt) {   // #152: the same rule as the gate/up rows
+    if (cpu_avx2_ok() && nt >= mt_min && f.d_type == 20 && iq4nl_mt) {   // #152: the same rule as the gate/up rows
         iq4nl256_down_rows(blob + f.down_off, f.d_row, (int) f.n_ff, hq, nt, out, r0, r1);
         return;
     }

From ff6f9f1d313807097f061bd33a27c59bb0533911 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:28:09 +0200
Subject: [PATCH 133/201] prefill gemm below sm_80: Volta on the FP16 path by
 default, Turing opt-in, Pascal through fp32 (#655 #540 #395)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

PR #655's FP16 tensor-core path for Gemm::bf16, adapted so the ready-made engine stays byte-identical:
- default on for compute capability 7.0-7.4 only (Volta; the experimental STRATA_EXPERIMENTAL_SM60 build), off for
  7.5 (RTX 20): STRATA_BF16_TC=1 opts in, =0 turns it off on any 7.x card
- from #540: finite values beyond FP16's range clamp to +-65504; a beta = 1 product (the BF16X2 remainder, in
  FP16's subnormal band) keeps cuBLAS; the compute capability is cached per device (a layer split can mix cards)
- from #395: Pascal (6.x; cuBLAS has no BF16 GEMM there) widens both operands to fp32 by an exact shift and runs
  cublasSgemm with the same fp32 accumulator, tiled over T in the instance's own buffers
sm_80 and newer, and HIP, run the same cuBLAS / hipBLAS call as before.

Co-Authored-By: Károly Sárdi <skver@tuta.io>
Co-Authored-By: Rafal R@V Prasal <rafal.prasal@gmail.com>
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/prefill/gemm.hpp |  5 +-
 src/prefill/gemm.cu             | 95 +++++++++++++++++++++++++++------
 src/prefill/gemm_bf16_parity.cu |  6 ++-
 3 files changed, 85 insertions(+), 21 deletions(-)

diff --git a/include/strata/prefill/gemm.hpp b/include/strata/prefill/gemm.hpp
index 6915ee69155..60d1c717480 100644
--- a/include/strata/prefill/gemm.hpp
+++ b/include/strata/prefill/gemm.hpp
@@ -26,7 +26,8 @@ class Gemm {
                        std::string& err);
 
     /// Y[T, N] (fp32, row stride ldy) = X[T, K] (bf16, row-major) . W[N, K]^T (bf16, row-major).  `beta` = 1 adds.
-    /// sm_7x (no BF16 tensor cores) converts both to FP16 and runs the FP16 tensor-core GEMM (STRATA_BF16_TC).
+    /// Below sm_80 (no BF16 tensor cores): Volta converts both to FP16 and runs the FP16 tensor-core GEMM (Turing with
+    /// STRATA_BF16_TC=1), Pascal widens both to fp32 (cublasSgemm); see gemm.cu.
     void bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy = 0,
               float beta = 0.0f);
 
@@ -53,7 +54,7 @@ class Gemm {
     void* workspace_ = nullptr;
     bool external_ = false;
     void* hipblaslt_state_ = nullptr;
-    // sm_7x: FP16 copies of a BF16 product's weight and activation slice (Gemm::bf16, STRATA_BF16_TC)
+    // below sm_80: FP16 (Pascal: fp32) copies of a BF16 product's weight and activation slice (Gemm::bf16)
     uint16_t* tc_w_ = nullptr;
     int64_t tc_w_elems_ = 0;
     uint16_t* tc_x_ = nullptr;
diff --git a/src/prefill/gemm.cu b/src/prefill/gemm.cu
index babeee80fe2..1d71bbb70a9 100644
--- a/src/prefill/gemm.cu
+++ b/src/prefill/gemm.cu
@@ -7,6 +7,7 @@
 #include <cuda_runtime.h>
 
 #include <algorithm>
+#include <atomic>
 
 #if defined(__HIPCC__) && defined(STRATA_HIPBLASLT_AVAILABLE)
 // The HIP compatibility shim maps CUDA shuffle spellings to Strata helpers.
@@ -377,33 +378,74 @@ bool Gemm::init(void* stream, int64_t scratch_elems, std::string& err) {
     return true;
 }
 
-// ---- sm_7x: BF16 GEMMs through the FP16 tensor cores ---------------------------------------------------------------
+#if !defined(__HIPCC__)
+// ---- below sm_80: BF16 GEMMs without BF16 tensor cores (PR #655, #540, #395) ----------------------------------------
 // Turing and Volta have no BF16 tensor cores: cublasGemmEx on CUDA_R_16BF inputs falls back to a SIMT fp32 kernel
-// (magma_sgemmEx), a fifth of a 4K prompt on an RTX 2080 Ti.  BF16 -> FP16 is exact for every value inside
-// FP16's range (the 7-bit mantissa fits in 10 bits); weights and normalized activations sit there.  With
-// STRATA_BF16_TC (default on for compute capability 7.x), the weight is converted once per call and the activations in row slices,
-// into the instance's own scratch, and the product runs as the FP16 GEMM (fp32 accumulate) on the tensor cores.
+// (magma_sgemmEx), a fifth of a 4K prompt on an RTX 2080 Ti (#655) and ~10% of a V100's prompt (#540).  BF16 -> FP16
+// is exact for every value inside FP16's normal range (the 7-bit mantissa fits in 10 bits); weights and normalized
+// activations sit there.  With the FP16 path, the weight is converted once per call and the activations in row
+// slices, into the instance's own buffers, and the product runs as the FP16 GEMM (fp32 accumulate) on the tensor
+// cores.  Finite values beyond FP16's range are clamped to +-65504 (#540) instead of becoming Inf.  A beta = 1
+// product (STRATA_PREFILL_BF16X2's remainder, ~2^-9 of the original, deep in FP16's subnormal band) keeps cuBLAS.
+//   Default: on for compute capability 7.0 - 7.4 (Volta: only the experimental STRATA_EXPERIMENTAL_SM60 build runs
+//   there), OFF for 7.5 (RTX 20 in the ready-made engine: the sums round differently, so it is opt-in until it has
+//   been gated).  STRATA_BF16_TC=1 / =0 turns it on / off on any 7.x card.
+// Pascal (6.x) has no tensor cores and cuBLAS has no BF16 GEMM for it (#395, measured NOT_SUPPORTED on a P40): both
+// operands are widened to fp32 by an exact shift and the product is cublasSgemm with the same fp32 accumulator.
 namespace {
 __global__ void bf16_to_f16_kernel(const uint16_t* __restrict__ in, __half* __restrict__ out, int64_t n) {
     const int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x;
-    if (i < n) out[i] = __float2half_rn(__uint_as_float((uint32_t) in[i] << 16));
+    if (i < n) {
+        float f = __uint_as_float((uint32_t) in[i] << 16);
+        if (f > 65504.0f && !isinf(f)) f = 65504.0f;
+        else if (f < -65504.0f && !isinf(f)) f = -65504.0f;
+        out[i] = __float2half_rn(f);
+    }
+}
+__global__ void bf16_to_f32_kernel(const uint16_t* __restrict__ in, float* __restrict__ out, int64_t n) {
+    const int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x;
+    if (i < n) out[i] = __uint_as_float((uint32_t) in[i] << 16);
 }
 void bf16_to_f16(const uint16_t* in, uint16_t* out, int64_t n, cudaStream_t st) {
     if (n <= 0) return;
     bf16_to_f16_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, st>>>(in, reinterpret_cast<__half*>(out), n);
 }
-int bf16_tc_mode() {
-    static int mode = [] {
+void bf16_to_f32(const uint16_t* in, float* out, int64_t n, cudaStream_t st) {
+    if (n <= 0) return;
+    bf16_to_f32_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, st>>>(in, out, n);
+}
+// The current device's compute capability as 10 * major + minor, per device (a layer split can mix cards); 0: not
+// known, read as "not an old card" so a failed query keeps the cuBLAS BF16 call.
+int current_cc() {
+    static std::atomic<int> cc[64] = {};
+    int dev = 0;
+    if (cudaGetDevice(&dev) != cudaSuccess || dev < 0 || dev >= 64) { cudaGetLastError(); return 0; }
+    int v = cc[dev].load(std::memory_order_relaxed);
+    if (v == 0) {
+        int major = 0, minor = 0;
+        if (cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev) != cudaSuccess ||
+            cudaDeviceGetAttribute(&minor, cudaDevAttrComputeCapabilityMinor, dev) != cudaSuccess) {
+            cudaGetLastError();
+            return 0;
+        }
+        v = 10 * major + minor;
+        cc[dev].store(v, std::memory_order_relaxed);
+    }
+    return v;
+}
+// 0: cuBLAS's BF16 GEMM, 1: through FP16 (tensor cores), 2: through FP32 (Pascal)
+int bf16_path() {
+    const int cc = current_cc();
+    if (cc <= 0 || cc >= 80) return 0;
+    if (cc < 70) return 2;
+    static const int forced = [] {
         const char* v = std::getenv("STRATA_BF16_TC");
-        if (v != nullptr && v[0] != '\0') return std::atoi(v) != 0 ? 1 : 0;
-        int dev = 0, maj = 0;
-        cudaGetDevice(&dev);
-        cudaDeviceGetAttribute(&maj, cudaDevAttrComputeCapabilityMajor, dev);
-        return maj == 7 ? 1 : 0;   // Volta (sm_70, sm_72) and Turing (sm_75)
+        return v != nullptr && v[0] != '\0' ? (std::atoi(v) != 0 ? 1 : 0) : -1;
     }();
-    return mode;
+    if (forced >= 0) return forced;
+    return cc < 75 ? 1 : 0;
 }
-bool grow(uint16_t*& p, int64_t& have, int64_t want) {
+bool grow(uint16_t*& p, int64_t& have, int64_t want) {   // `have`, `want`: 2-byte elements
     if (have >= want) return true;
     if (p) cudaFree(p);
     p = nullptr;
@@ -412,8 +454,9 @@ bool grow(uint16_t*& p, int64_t& have, int64_t want) {
     have = want;
     return true;
 }
-constexpr int64_t kXSliceElems = 16ll << 20;   // 32 MiB of FP16 activations per slice
+constexpr int64_t kXSliceElems = 16ll << 20;   // 32 MiB of FP16 activations per slice (64 MiB as fp32)
 }  // namespace
+#endif
 
 void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64_t N, int64_t K, int64_t ldy,
                 float beta) {
@@ -428,7 +471,8 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
     }
 #endif
 #if !defined(__HIPCC__)
-    if (bf16_tc_mode() && N > 1) {   // a single output row stays cuBLAS's GEMV, faster than the conversions
+    if (const int path = K > 0 ? bf16_path() : 0; path == 1 && N > 1 && beta == 0.0f) {
+        // a single output row stays cuBLAS's GEMV, faster than the conversions; beta = 1: see above
         const int64_t x_rows = std::max<int64_t>(1, std::min<int64_t>(T, kXSliceElems / K));
         if (grow(tc_w_, tc_w_elems_, N * K) && grow(tc_x_, tc_x_elems_, x_rows * K)) {
             bf16_to_f16(W, tc_w_, N * K, (cudaStream_t) stream_);
@@ -439,6 +483,23 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
             }
             return;
         }
+    } else if (path == 2) {
+        // Pascal: fp32 copies (2 elements of the 2-byte buffers each).  Every tile is a disjoint block of Y, so each
+        // gets the caller's beta.
+        const int64_t x_rows = std::max<int64_t>(1, std::min<int64_t>(T, kXSliceElems / K));
+        if (grow(tc_w_, tc_w_elems_, 2 * N * K) && grow(tc_x_, tc_x_elems_, 2 * x_rows * K)) {
+            float* const wf = reinterpret_cast<float*>(tc_w_);
+            float* const xf = reinterpret_cast<float*>(tc_x_);
+            bf16_to_f32(W, wf, N * K, (cudaStream_t) stream_);
+            for (int64_t t0 = 0; t0 < T; t0 += x_rows) {
+                const int64_t n = std::min<int64_t>(x_rows, T - t0);
+                bf16_to_f32(X + t0 * K, xf, n * K, (cudaStream_t) stream_);
+                ck(cublasSgemm((cublasHandle_t) handle_, CUBLAS_OP_T, CUBLAS_OP_N, (int) N, (int) n, (int) K, &alpha,
+                               wf, (int) K, xf, (int) K, &beta, Y + t0 * ldy, (int) ldy),
+                   "cublasSgemm (bf16 on Pascal)");
+            }
+            return;
+        }
     }
 #endif
     // Column-major view: Y^T[N, T] = W[N, K] (stored K x N col-major, transposed) . X^T[K, T].
diff --git a/src/prefill/gemm_bf16_parity.cu b/src/prefill/gemm_bf16_parity.cu
index 00d3d0642b8..a94700517f6 100644
--- a/src/prefill/gemm_bf16_parity.cu
+++ b/src/prefill/gemm_bf16_parity.cu
@@ -1,7 +1,9 @@
 // src/prefill/gemm_bf16_parity.cu - Gemm::bf16 against cuBLAS's own BF16 product (GPU, synthetic, no model).
 //
-// On sm_7x (Volta / Turing, no BF16 tensor cores) Gemm::bf16 converts the weight and the activations to FP16 and runs the FP16
-// tensor-core GEMM (STRATA_BF16_TC, default on there); everywhere else it is the cuBLAS BF16 call itself.  This
+// Below sm_80 (no BF16 tensor cores) Gemm::bf16 converts the weight and the activations to FP16 and runs the FP16
+// tensor-core GEMM (Volta by default, Turing with STRATA_BF16_TC=1) or widens them to fp32 (Pascal); everywhere else
+// it is the cuBLAS BF16 call itself.  (On Pascal the cuBLAS BF16 reference itself may be refused: the test then fails
+// at the reference, which says so.)  This
 // checks the result against cublasGemmEx on the same BF16 inputs, within fp32-accumulation rounding, over the prompt
 // path's shapes: the hyper-connection down / up projections, the router and indexer rows, the PLE value matrix, a T
 // large enough to slice the activations, beta = 1 accumulation (the bf16x2 low parts) and an output row stride wider

From 06a90a229708affb1a003a0f804d91261bda28a0 Mon Sep 17 00:00:00 2001
From: Klaus Friedel <git@friedelprivat.de>
Date: Fri, 2 Oct 2026 21:52:40 +0200
Subject: [PATCH 134/201] qsa_prompt_attn: tensor-core kernel for Volta (sm_70,
 mma.m8n8k4)

On sm_70 qsa_prompt_attn_batch refused the device and the prompt path fell
back to the decode kernel (FP32 FMAs, one query at a time): 19-25% of the GPU
time of a 32K prompt on a V100.

prompt_attn_v70_kernel is the v1 kernel's structure with the two matrix
products on m8n8k4 (FP16 in, FP32 accumulate): q.k with one dim group (64 dims,
= one int8 scale group) per warp and 8 cells per quad-pair, p.v with 16 dims per
quad-pair. q and p keep their hi + lo FP16 split, the four dim groups' partials
are added in a fixed order (deterministic). Int8, FP16 and K8V4 KV are handled;
Q4_0 KV (mode 4, sm_80+ only upstream) keeps the old kernel. The fragment layout
was measured on a V100 and matches turbomind's SM70_MMA_884.

qsa_prompt_attn_parity (V100): error against FP64 ~5e-6 (output scale ~3.6),
int8 3.0x and fp16 1.3x faster than the FP32 kernel per 2048-query chunk. The
test now skips its Q4_0 cases below sm_80 instead of exiting 2 there.
End to end, 32K prompt, one V100, greedy output identical:
26 s -> 22 s on current main (STRATA_PROMPT_ATTN_OLD=1 is the old path).

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
---
 src/kernels/cuda/qsa_prompt_attn.cu    | 393 ++++++++++++++++++++++++-
 src/kernels/qsa_prompt_attn_parity.cpp |  12 +
 2 files changed, 402 insertions(+), 3 deletions(-)

diff --git a/src/kernels/cuda/qsa_prompt_attn.cu b/src/kernels/cuda/qsa_prompt_attn.cu
index 6148566301a..914690afae7 100644
--- a/src/kernels/cuda/qsa_prompt_attn.cu
+++ b/src/kernels/cuda/qsa_prompt_attn.cu
@@ -736,6 +736,389 @@ bool launch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const
     return true;
 }
 
+
+#if !defined(__HIPCC__)
+// ---- sm_70 (Volta): v1's structure on mma.m8n8k4 ------------------------------------------------------------------
+// Volta's tensor cores only have m8n8k4 (FP16 in, FP32 accumulate): per warp FOUR independent 8x8x4 products, one per
+// quad-pair (QP q = lanes 4q..4q+3 and 4q+16..4q+19; thread j = (lane & 3) + 4 * (lane >> 4) within it). Layout, measured on
+// a V100 (tools-free microtest, and equal to turbomind's SM70_MMA_884): the thread holds row j of A (k 0..3 as two
+// registers) and column j of B (k 0..3); C register i is row (lane & 1) + 4 * (lane >> 4) + 2 * ((i >> 1) & 1),
+// column (lane & 2) + 4 * (i >> 2) + (i & 1) of its QP's 8x8 tile.
+//   q.k: warp w owns dims [64w, 64w+64) = int8 scale group w; QP q takes cells 8q..8q+7 of the 32-cell chunk; 16 k-steps
+//        of 4 dims, two 8-row blocks (12 heads + 4 zero rows), q as hi + lo halves. The warp's partial (times the
+//        cells' K scale) goes to S.part[w]; the softmax adds the four groups in a fixed order (deterministic).
+//   p.v: warp w owns dims [64w, 64w+64) again; QP q takes the 16 dims 64w+16q.. (two n-tiles of 8); k = the 32 cells in
+//        steps of 4; p carries the V scale (as v1) and is split into hi + lo halves.
+#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 700 && __CUDA_ARCH__ < 750
+#define STRATA_PA_VOLTA 1
+#else
+#define STRATA_PA_VOLTA 0
+#endif
+
+__device__ __forceinline__ void mma884(float* c, uint32_t a0, uint32_t a1, uint32_t b0, uint32_t b1) {
+#if STRATA_PA_VOLTA
+    asm volatile("mma.sync.aligned.m8n8k4.row.col.f32.f16.f16.f32 {%0,%1,%2,%3,%4,%5,%6,%7}, {%8,%9}, {%10,%11}, "
+                 "{%0,%1,%2,%3,%4,%5,%6,%7};\n"
+                 : "+f"(c[0]), "+f"(c[1]), "+f"(c[2]), "+f"(c[3]), "+f"(c[4]), "+f"(c[5]), "+f"(c[6]), "+f"(c[7])
+                 : "r"(a0), "r"(a1), "r"(b0), "r"(b1));
+#else
+    __trap();   // m8n8k4 is a Volta instruction; the host only launches this kernel on sm_70
+#endif
+}
+
+template <int KV_MODE>
+struct Smem70 {
+    using KElem = typename std::conditional<KV_MODE == 0, __half, int8_t>::type;
+    using VElem = typename std::conditional<KV_MODE == 1, int8_t, __half>::type;
+    static constexpr int KROW = KV_MODE == 0 ? HD + 8 : HD + 16;
+    static constexpr int VROW = KV_MODE == 1 ? HD + 16 : HD + 8;
+    __half qh[16][QS];
+    __half ql[16][QS];
+    KElem k[CH][KROW];
+    VElem v[CH][VROW];
+    float ks[CH][4];
+    float vs[CH][4];
+    float part[4][16][CH + 4];   // q.k per dim group (scaled by the cell's K scale)
+    float s[16][CH + 4];         // the chunk's probabilities
+    float qmax[THREADS / 32];
+    float alpha[16];
+    float lsum[16];
+    float mrow[16];
+    long long row[CH];
+};
+
+template <int KV_MODE>
+__global__ void __launch_bounds__(THREADS) prompt_attn_v70_kernel(const float* __restrict__ q, QsaAttnPools p,
+                                                                  const int32_t* __restrict__ ids,
+                                                                  const int32_t* __restrict__ steps, int n_kv_heads,
+                                                                  int page_size, float scale_log2,
+                                                                  float* __restrict__ attn, int cap) {
+    extern __shared__ __align__(16) unsigned char smem_raw[];
+    Smem70<KV_MODE>& S = *reinterpret_cast<Smem70<KV_MODE>*>(smem_raw);
+    const int qi = blockIdx.x, kvh = blockIdx.y;
+    const int n_head = n_kv_heads * G;
+    q += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    attn += (size_t) qi * n_head * HD + (size_t) kvh * G * HD;
+    ids += (size_t) qi * cap;
+    const int n = __ldg(steps + (size_t) qi * kStepCount + kStepWidth);
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
+    const int qp = (lane >> 2) & 3, jj = (lane & 3) + 4 * (lane >> 4);   // quad-pair, thread within it
+    const int crow = (lane & 1) + 4 * (lane >> 4);                        // C row of register 0 (+2 per register pair)
+    const int ccol = lane & 2;                                           // C column of register 0 (+4 per half, +1 per reg)
+
+    // q: 12 heads + 4 zero rows, scaled by a power of two that puts its largest value near 2^14 (exact, and the
+    // lo halves stay out of FP16's subnormal range), then split into hi + lo halves
+    float qm = 0.0f;
+    for (int i = t; i < G * HD; i += THREADS) qm = fmaxf(qm, fabsf(q[i]));
+#pragma unroll
+    for (int o = 16; o > 0; o >>= 1) qm = fmaxf(qm, __shfl_xor_sync(0xffffffffu, qm, o));
+    if (lane == 0) S.qmax[warp] = qm;
+    __syncthreads();
+    qm = fmaxf(fmaxf(S.qmax[0], S.qmax[1]), fmaxf(S.qmax[2], S.qmax[3]));
+    int qe = 0;
+    if (qm > 0.0f) frexpf(qm, &qe);                 // qm < 2^qe
+    const float qup = ldexpf(1.0f, 14 - qe), qdown = ldexpf(scale_log2, qe - 14);
+    for (int i = t; i < 16 * HD; i += THREADS) {
+        const int h = i / HD, d = i % HD;
+        const float x = h < G ? q[(size_t) h * HD + d] * qup : 0.0f;
+        const __half hi = __float2half_rn(x);
+        S.qh[h][d] = hi;
+        S.ql[h][d] = __float2half_rn(x - __half2float(hi));
+    }
+    if (t < 16) { S.mrow[t] = -INFINITY; S.lsum[t] = 0.0f; }
+
+    float acc[2][2][8];
+#pragma unroll
+    for (int rb = 0; rb < 2; ++rb)
+#pragma unroll
+        for (int nt = 0; nt < 2; ++nt)
+#pragma unroll
+            for (int i = 0; i < 8; ++i) acc[rb][nt][i] = 0.0f;
+
+    for (int c0 = 0; c0 < n; c0 += CH) {
+        const int nh = min(CH, n - c0);
+        if (t < CH) {
+            long long r = -1;
+            if (t < nh) {
+                const int cell = ids[c0 + t];
+                const long long page = (long long) p.page_table[cell / page_size];
+                r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+            }
+            S.row[t] = r;
+        }
+        __syncthreads();   // rows ready; the previous chunk's p.v is done with k, v, s
+        // gather the chunk's K and V rows (16-byte pieces; K8V4's V as q4_0 blocks dequantized to fp16)
+        // and their scales
+        {
+            constexpr int KPIECES = HD * (int) sizeof(typename Smem<KV_MODE>::KElem) / 16;   // per K row
+            for (int i = t; i < CH * KPIECES; i += THREADS) {
+                const int c = i / KPIECES, pc = i % KPIECES;
+                const long long r = S.row[c];
+                uint4 kx = make_uint4(0, 0, 0, 0);
+                if (r >= 0) {
+                    if constexpr (KV_MODE == 0)
+                        kx = __ldg(reinterpret_cast<const uint4*>(p.k_pool + r * HD) + pc);
+                    else   // modes 1 and 3: the K side is INT8
+                        kx = __ldg(reinterpret_cast<const uint4*>(p.k_q + r * HD) + pc);
+                }
+                *reinterpret_cast<uint4*>(reinterpret_cast<unsigned char*>(&S.k[c][0]) + pc * 16) = kx;
+            }
+            if constexpr (KV_MODE == 3) {   // V: dequantize the row's q4_0 blocks straight into the fp16 V row
+                constexpr int BLKS = HD / QK4_0;
+                constexpr int BYTES = BLKS * (int) sizeof(block_q4_0);
+                for (int i = t; i < CH * BLKS; i += THREADS) {
+                    const int c = i / BLKS, b = i % BLKS;
+                    const long long r = S.row[c];
+#pragma unroll
+                    for (int j = 0; j < QK4_0; ++j) S.v[c][b * QK4_0 + j] = __half(0);
+                    if (r >= 0) {
+                        const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + r * BYTES) + b;
+                        const float d = __half2float(__ushort_as_half(blk->d));
+#pragma unroll
+                        for (int j = 0; j < QK4_0 / 2; ++j) {
+                            S.v[c][b * QK4_0 + j] = __float2half_rn((float) ((int)(blk->qs[j] & 0x0F) - 8) * d);
+                            S.v[c][b * QK4_0 + j + QK4_0 / 2] =
+                                __float2half_rn((float) ((int)(blk->qs[j] >> 4) - 8) * d);
+                        }
+                    }
+                }
+            } else {
+                constexpr int VPIECES = HD * (int) sizeof(typename Smem<KV_MODE>::VElem) / 16;   // per V row
+                for (int i = t; i < CH * VPIECES; i += THREADS) {
+                    const int c = i / VPIECES, pc = i % VPIECES;
+                    const long long r = S.row[c];
+                    uint4 vx = make_uint4(0, 0, 0, 0);
+                    if (r >= 0) {
+                        if constexpr (KV_MODE == 1)
+                            vx = __ldg(reinterpret_cast<const uint4*>(p.v_q + r * HD) + pc);
+                        else
+                            vx = __ldg(reinterpret_cast<const uint4*>(p.v_pool + r * HD) + pc);
+                    }
+                    *reinterpret_cast<uint4*>(reinterpret_cast<unsigned char*>(&S.v[c][0]) + pc * 16) = vx;
+                }
+            }
+            for (int i = t; i < CH * 4; i += THREADS) {
+                const int c = i / 4, g = i % 4;
+                const long long r = S.row[c];
+                float a = 0.0f, b = 0.0f;
+                if (r >= 0) {
+                    if constexpr (KV_MODE == 1) {
+                        a = __half2float(__ushort_as_half(p.k_scale[r * (HD / KV_Q8_GROUP) + g]));
+                        b = __half2float(__ushort_as_half(p.v_scale[r * (HD / KV_Q8_GROUP) + g]));
+                    } else if constexpr (KV_MODE == 3) {   // K as int8, V dequantized to fp16 (scale 1)
+                        a = __half2float(__ushort_as_half(p.k_scale[r * (HD / KV_Q8_GROUP) + g]));
+                        b = 1.0f;
+                    } else {
+                        a = b = 1.0f;
+                    }
+                }
+                S.ks[c][g] = a;
+                S.vs[c][g] = b;
+            }
+        }
+        __syncthreads();
+        // scores: warp w = dim group w (64 dims), QP q = cells 8q..8q+7
+        {
+            float tg[2][8];
+#pragma unroll
+            for (int rb = 0; rb < 2; ++rb)
+#pragma unroll
+                for (int i = 0; i < 8; ++i) tg[rb][i] = 0.0f;
+            const int cell_b = qp * 8 + jj;
+#pragma unroll
+            for (int ks = 0; ks < 16; ++ks) {
+                const int d0 = warp * 64 + ks * 4;
+                uint32_t b0, b1;
+                if constexpr (KV_MODE != 0) {   // modes 1 and 3: the K side is INT8 codes, exact in FP16
+                    const uint32_t raw = *reinterpret_cast<const uint32_t*>(&S.k[cell_b][d0]);
+                    b0 = i8x2_to_h2(raw & 0xffffu);
+                    b1 = i8x2_to_h2(raw >> 16);
+                } else {
+                    const uint2 raw = *reinterpret_cast<const uint2*>(&S.k[cell_b][d0]);
+                    b0 = raw.x;
+                    b1 = raw.y;
+                }
+#pragma unroll
+                for (int rb = 0; rb < 2; ++rb) {
+                    const uint2 ah = *reinterpret_cast<const uint2*>(&S.qh[rb * 8 + jj][d0]);
+                    const uint2 al = *reinterpret_cast<const uint2*>(&S.ql[rb * 8 + jj][d0]);
+                    mma884(tg[rb], ah.x, ah.y, b0, b1);
+                    mma884(tg[rb], al.x, al.y, b0, b1);
+                }
+            }
+#pragma unroll
+            for (int rb = 0; rb < 2; ++rb)
+#pragma unroll
+                for (int i = 0; i < 8; ++i) {
+                    const int row = rb * 8 + crow + 2 * ((i >> 1) & 1);
+                    const int cell = qp * 8 + ccol + 4 * (i >> 2) + (i & 1);
+                    S.part[warp][row][cell] = tg[rb][i] * S.ks[cell][warp];
+                }
+        }
+        __syncthreads();
+        // online softmax: row t/8, 4 cells per thread, 8 threads per row (lanes 8r..8r+7 of a warp)
+        {
+            constexpr int PER = CH / 8;
+            const int r = t >> 3, sub = t & 7;
+            float x[PER], mx = -INFINITY;
+#pragma unroll
+            for (int j = 0; j < PER; ++j) {
+                const int c = sub * PER + j;
+                const float sum4 = ((S.part[0][r][c] + S.part[1][r][c]) + S.part[2][r][c]) + S.part[3][r][c];
+                x[j] = c < nh ? sum4 * qdown : -INFINITY;
+                mx = fmaxf(mx, x[j]);
+            }
+#pragma unroll
+            for (int o = 1; o < 8; o <<= 1) mx = fmaxf(mx, __shfl_xor_sync(0xffffffffu, mx, o));
+            const float m_old = S.mrow[r];
+            const float m_new = fmaxf(m_old, mx);
+            float sum = 0.0f;
+#pragma unroll
+            for (int j = 0; j < PER; ++j) {
+                const float e = x[j] == -INFINITY ? 0.0f : exp2f(x[j] - m_new);
+                S.s[r][sub * PER + j] = e;
+                sum += e;
+            }
+#pragma unroll
+            for (int o = 1; o < 8; o <<= 1) sum += __shfl_xor_sync(0xffffffffu, sum, o);
+            __syncwarp();
+            if (sub == 0) {
+                const float a = m_old == -INFINITY ? 0.0f : exp2f(m_old - m_new);
+                S.alpha[r] = a;
+                S.lsum[r] = fmaf(S.lsum[r], a, sum);
+                S.mrow[r] = m_new;
+            }
+        }
+        __syncthreads();
+        __syncthreads();
+        // p.v: warp w owns dims [64w, 64w+64) (int8 scale group w), QP q its 16 dims 64w+16q..; the V scale is folded
+        // into p relative to the chunk's largest, times 2^14 (as v1)
+        {
+            float vmax = 0.0f;
+#pragma unroll
+            for (int c = lane; c < CH; c += 32) vmax = fmaxf(vmax, S.vs[c][warp]);
+#pragma unroll
+            for (int o = 16; o > 0; o >>= 1) vmax = fmaxf(vmax, __shfl_xor_sync(0xffffffffu, vmax, o));
+            const float vup = vmax > 0.0f ? 16384.0f / vmax : 0.0f, vdown = vmax * (1.0f / 16384.0f);
+            float tmp[2][2][8];
+#pragma unroll
+            for (int rb = 0; rb < 2; ++rb)
+#pragma unroll
+                for (int nt = 0; nt < 2; ++nt)
+#pragma unroll
+                    for (int i = 0; i < 8; ++i) tmp[rb][nt][i] = 0.0f;
+#pragma unroll
+            for (int ks = 0; ks < CH / 4; ++ks) {
+                const int c0 = ks * 4;
+                float w[4];
+#pragma unroll
+                for (int e = 0; e < 4; ++e) w[e] = S.vs[c0 + e][warp] * vup;
+                uint2 ah[2], al[2];
+#pragma unroll
+                for (int rb = 0; rb < 2; ++rb) {
+                    const float4 pv = *reinterpret_cast<const float4*>(&S.s[rb * 8 + jj][c0]);
+                    const float p0 = pv.x * w[0], p1 = pv.y * w[1], p2 = pv.z * w[2], p3 = pv.w * w[3];
+                    ah[rb].x = pack_h2(p0, p1);
+                    ah[rb].y = pack_h2(p2, p3);
+                    const float2 f01 = __half22float2(*reinterpret_cast<const __half2*>(&ah[rb].x));
+                    const float2 f23 = __half22float2(*reinterpret_cast<const __half2*>(&ah[rb].y));
+                    al[rb].x = pack_h2(p0 - f01.x, p1 - f01.y);
+                    al[rb].y = pack_h2(p2 - f23.x, p3 - f23.y);
+                }
+#pragma unroll
+                for (int nt = 0; nt < 2; ++nt) {
+                    const int d = warp * 64 + qp * 16 + nt * 8 + jj;
+                    uint32_t b0, b1;
+                    if constexpr (KV_MODE == 1) {
+                        const uint32_t x0 = (uint8_t) S.v[c0][d] | ((uint32_t) (uint8_t) S.v[c0 + 1][d] << 8);
+                        const uint32_t x1 = (uint8_t) S.v[c0 + 2][d] | ((uint32_t) (uint8_t) S.v[c0 + 3][d] << 8);
+                        b0 = i8x2_to_h2(x0);
+                        b1 = i8x2_to_h2(x1);
+                    } else {
+                        const __half2 h0 = __halves2half2(S.v[c0][d], S.v[c0 + 1][d]);
+                        const __half2 h1 = __halves2half2(S.v[c0 + 2][d], S.v[c0 + 3][d]);
+                        b0 = *reinterpret_cast<const uint32_t*>(&h0);
+                        b1 = *reinterpret_cast<const uint32_t*>(&h1);
+                    }
+#pragma unroll
+                    for (int rb = 0; rb < 2; ++rb) {
+                        mma884(tmp[rb][nt], ah[rb].x, ah[rb].y, b0, b1);
+                        mma884(tmp[rb][nt], al[rb].x, al[rb].y, b0, b1);
+                    }
+                }
+            }
+#pragma unroll
+            for (int rb = 0; rb < 2; ++rb) {
+                float a_[2];
+                a_[0] = S.alpha[rb * 8 + crow];
+                a_[1] = S.alpha[rb * 8 + crow + 2];
+#pragma unroll
+                for (int nt = 0; nt < 2; ++nt)
+#pragma unroll
+                    for (int i = 0; i < 8; ++i)
+                        acc[rb][nt][i] = fmaf(acc[rb][nt][i], a_[(i >> 1) & 1], tmp[rb][nt][i] * vdown);
+            }
+        }
+    }
+    __syncthreads();
+#pragma unroll
+    for (int rb = 0; rb < 2; ++rb)
+#pragma unroll
+        for (int h = 0; h < 2; ++h) {
+            const int row = rb * 8 + crow + 2 * h;
+            if (row >= G) continue;
+            const float l = S.lsum[row];
+            const float inv = l > 0.0f ? 1.0f / l : 0.0f;
+#pragma unroll
+            for (int nt = 0; nt < 2; ++nt)
+#pragma unroll
+                for (int hh = 0; hh < 2; ++hh) {
+                    const int i = hh * 4 + h * 2;               // registers i, i+1: row h, columns ccol + 4 * hh + {0, 1}
+                    const int d = warp * 64 + qp * 16 + nt * 8 + ccol + 4 * hh;
+                    *reinterpret_cast<float2*>(attn + (size_t) row * HD + d) =
+                        make_float2(acc[rb][nt][i] * inv, acc[rb][nt][i + 1] * inv);
+                }
+        }
+}
+
+template <int KV_MODE>
+bool launch70(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps, int64_t cap,
+              const QsaShapes& s, float* attn, int64_t n_q, cudaStream_t st) {
+    static bool attr[64] = {};
+    int dev = 0;
+    cudaGetDevice(&dev);
+    const int bytes = (int) sizeof(Smem70<KV_MODE>);
+    if (dev < 0 || dev >= 64) return false;
+    if (!attr[dev]) {
+        if (cudaFuncSetAttribute(prompt_attn_v70_kernel<KV_MODE>, cudaFuncAttributeMaxDynamicSharedMemorySize, bytes) !=
+            cudaSuccess) {
+            cudaGetLastError();
+            return false;
+        }
+        attr[dev] = true;
+    }
+    const float scale_log2 = 1.4426950408889634f / sqrtf((float) HD);
+    for (int64_t q0 = 0; q0 < n_q; q0 += 65535) {
+        const int64_t nb = n_q - q0 < 65535 ? n_q - q0 : 65535;
+        prompt_attn_v70_kernel<KV_MODE><<<dim3((unsigned) nb, (unsigned) s.n_head_kv), THREADS, bytes, st>>>(
+            q + q0 * s.n_head * HD, pools, ids + q0 * cap, steps + q0 * kStepCount, (int) s.n_head_kv,
+            (int) s.page_size, scale_log2, attn + q0 * s.n_head * HD, (int) cap);
+    }
+    const cudaError_t e = cudaGetLastError();
+    if (e != cudaSuccess) {
+        std::fprintf(stderr, "qsa_prompt_attn_batch (sm_70): %s\n", cudaGetErrorString(e));
+        std::exit(1);
+    }
+    return true;
+}
+#else   // AMD: no m8n8k4 kernel; the dispatcher never selects it there
+template <int KV_MODE>
+bool launch70(const float*, const QsaAttnPools&, const int32_t*, const int32_t*, int64_t, const QsaShapes&, float*,
+              int64_t, cudaStream_t) {
+    return false;
+}
+#endif  // !__HIPCC__
+
 #if defined(__HIPCC__)
 // ---- S6: the int8-KV prompt attention on RDNA4 matrix cores (opt-in: STRATA_HIP_WMMA=1, gfx12 only). The design of
 // the v2 kernel above with gfx12's v_wmma_f32_16x16x16_f16 (wave32) in place of m16n8k16: wave w owns dims
@@ -1022,7 +1405,7 @@ bool launch_wmma(const float* q, const QsaAttnPools& pools, const int32_t* ids,
 bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps,
                            int64_t cap, const QsaShapes& s, float* attn, int64_t n_q, void* stream) {
     if (n_q <= 0) return true;
-    bool turing = false;   // per call, from the CURRENT device (a layer split can mix Turing with newer cards)
+    bool volta = false, turing = false;   // per call, from the CURRENT device (a layer split can mix Turing with newer cards)
     {   // sm_75 or newer: the MMA above compiles for both.  sm_80+ runs the cp.async kernel (launch_i8); Turing has
         // no cp.async, so it runs the v1 kernel (launch<1>, same accuracy, another summation order).  An older card
         // keeps the old kernel.
@@ -1042,13 +1425,14 @@ bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int3
             cc[dev] = w && (!std::strcmp(w, "1") || !std::strcmp(w, "attn")) ? 75
                       : 10 * strata::cc_major_of(major) + strata::cc_minor_of(minor);
         }
-        if (cc[dev] < 75) return false;
+        if (cc[dev] < 70) return false;
+        volta = cc[dev] < 75;     // sm_70: the m8n8k4 kernel (STRATA_PA_VOLTA); STRATA_QSA_WARP=1 still forces the old one
         turing = cc[dev] < 80;
     }
 #if defined(__HIPCC__)
     // the tensor-core kernels are compiled out on AMD (its major version is not a CUDA sm); RDNA4 has its own int8-KV
     // matrix-core kernel, opt-in (STRATA_HIP_WMMA=1); everything else keeps the old kernel
-    (void) turing;
+    (void) turing; (void) volta;
     if (pools.k_q != nullptr && pools.v_q != nullptr && pools.k_scale != nullptr && pools.v_scale != nullptr &&
         pools.k_q4 == nullptr && pools.v_q4 == nullptr && s.head_dim == HD && s.n_head == (int64_t) G * s.n_head_kv &&
         cap > 0 && ids && steps && pools.page_table && hip_wmma_usable())
@@ -1069,6 +1453,7 @@ bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int3
     }
     if (pools.k_q != nullptr && pools.v_q4 != nullptr) {   // hybrid K8V4: int8 K + dequantized-q4 V
         if (!pools.k_scale) return false;
+        if (volta) return launch70<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
         return launch<3>(q, pools, ids, steps, cap, s, attn, n_q, st);
     }
     if (pools.k_q != nullptr) {
@@ -1077,10 +1462,12 @@ bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int3
         // for how far the model amplifies an FP32-level change.  Turing always takes it: v2's cp.async does not
         // exist before sm_80.
         static const bool v1 = std::getenv("STRATA_PROMPT_ATTN_V1") != nullptr;
+        if (volta) return launch70<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
         if (v1 || turing) return launch<1>(q, pools, ids, steps, cap, s, attn, n_q, st);
         return launch_i8(q, pools, ids, steps, cap, s, attn, n_q, st);
     }
     if (!pools.k_pool || !pools.v_pool) return false;
+    if (volta) return launch70<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
     return launch<0>(q, pools, ids, steps, cap, s, attn, n_q, st);
 }
 
diff --git a/src/kernels/qsa_prompt_attn_parity.cpp b/src/kernels/qsa_prompt_attn_parity.cpp
index d7dfda2700f..4a0921db658 100644
--- a/src/kernels/qsa_prompt_attn_parity.cpp
+++ b/src/kernels/qsa_prompt_attn_parity.cpp
@@ -41,6 +41,18 @@ float h2f(uint16_t b) { __half h; *reinterpret_cast<uint16_t*>(&h) = b; return _
 uint16_t f2h(float f) { __half h = __float2half(f); return *reinterpret_cast<uint16_t*>(&h); }
 
 int run(int fmt, int64_t ctx, int64_t nq, int reps) {   // fmt 1 int8, 0 fp16, 2 q4_0
+#if !defined(__HIPCC__) && !defined(STRATA_USE_HIP)
+    if (fmt == 2) {   // mode 4 (Q4_0 KV) runs on sm_80 and newer only: below that the dispatcher keeps the old kernel
+        int dev = 0, major = 0;
+        ck(cudaGetDevice(&dev), "device");
+        ck(cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev), "cc");
+        if (major < 8) {
+            std::printf("SKIP q4_0 ctx %lld: the tensor-core kernel takes Q4_0 KV on sm_80+ only (this device: sm_%d)\n",
+                        (long long) ctx, major);
+            return 0;
+        }
+    }
+#endif
     const k::QsaShapes s = k::qsa_real_shapes();
     const int64_t HD = s.head_dim, NKV = s.n_head_kv, NH = s.n_head, PS = s.page_size;
     const int64_t pages = (ctx + PS - 1) / PS, rows = pages * NKV * PS;

From 7d6482afb59d6a7292151a87b1fe1de7eff5d67a Mon Sep 17 00:00:00 2001
From: Klaus Friedel <git@friedelprivat.de>
Date: Sat, 3 Oct 2026 07:11:46 +0200
Subject: [PATCH 135/201] docs: NVIDIA_V100.md and the measurements of the
 Volta prompt attention

The experimental sm_70 build (STRATA_EXPERIMENTAL_SM60, #236) had no page. NVIDIA_V100.md says how to build it, which kernel each
part of the prompt path uses on Volta and what the prompt attention kernel was measured at.

bench/results/2026-10-03-v100-prompt-attn: prompt speed with and without the kernel (7K / 28K / 114K tokens), the nsys share of the
attention before and after, the parity numbers, needle recall (15 of 15 with either path) and the greedy-output comparison.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
---
 .../2026-10-03-v100-prompt-attn/README.md     | 77 +++++++++++++++++++
 docs/NVIDIA_V100.md                           | 74 ++++++++++++++++++
 2 files changed, 151 insertions(+)
 create mode 100644 bench/results/2026-10-03-v100-prompt-attn/README.md
 create mode 100644 docs/NVIDIA_V100.md

diff --git a/bench/results/2026-10-03-v100-prompt-attn/README.md b/bench/results/2026-10-03-v100-prompt-attn/README.md
new file mode 100644
index 00000000000..5b753fd6684
--- /dev/null
+++ b/bench/results/2026-10-03-v100-prompt-attn/README.md
@@ -0,0 +1,77 @@
+# V100 (sm_70): a tensor-core QSA prompt attention (2026-10-03)
+
+On sm_70 the prompt path ran the QSA attention on the decode kernel, one query at a time with FP32 FMAs. `prompt_attn_v70_kernel`
+(`src/kernels/cuda/qsa_prompt_attn.cu`) does the two matrix products on Volta's tensor cores (`mma.sync.m8n8k4`).
+`STRATA_PROMPT_ATTN_OLD=1` is the old path, so every number below is the same binary with and without that switch.
+
+## Rig
+
+- Tesla V100-PCIE-32GB (sm_70, PCIe gen3 x16), driver 550.120, one card used; a second V100 and a Quadro RTX 4000 (sm_75) are in the
+  PC and hidden with `CUDA_VISIBLE_DEVICES`. Intel Core i9-7960X (AVX-512), 125 GB RAM, Linux 6.8, CUDA 12.8, GCC 13.
+- Engine: `origin/main` at `99f3dbd` (0.1.35 + 83 commits) with this change, built with
+  `-DCMAKE_CUDA_ARCHITECTURES=70 -DSTRATA_EXPERIMENTAL_SM60=ON`.
+- Model: Unsloth `Qwen3.8-Flash-Next-UD-IQ4_XS` (3 shards), packed with `tools/iq_pack.py --compat-bf16`, MTP head from
+  `tools/mtp_fetch.py`. Not one of setup's models (see the limits). `--max-context 204800`, `--kv int8`, `--spec 2`.
+
+## Prompt speed
+
+One server start per configuration (cold), a 2K warm-up request, then three prompts of random words, each answered greedily
+(temperature 0, 48 tokens). The numbers are the server's own line `strata serve: prompt N tokens = 0 reused + N read in T ms`. One run per
+cell; repeated starts of the same configuration gave the same seconds.
+
+| Prompt tokens | old path | new kernel | gain | read time, old -> new |
+| ---: | ---: | ---: | ---: | ---: |
+| 7,194 | 1,010 tok/s | 1,164 tok/s | +15% | 7.1 s -> 6.2 s |
+| 28,650 | 1,063 tok/s | 1,251 tok/s | +18% | 26.9 s -> 22.9 s |
+| 114,338 | 973 tok/s | 1,123 tok/s | +15% | 117.5 s -> 101.8 s |
+
+Decode is unchanged within the noise (38-51 tok/s, 48 tokens per request): it does not use this kernel.
+
+## Where the time went (nsys, one V100, 28,650-token prompt, GPU kernel time of the whole capture: prefill plus 128-193 decode tokens)
+
+`strata-1gpu-32k-*.nsys-rep`; the "before" capture is 0.1.35 (`d9ab843`), the "after" one is the same base with this change and the BF16 change
+of #593 (that one only removes `magma_sgemmEx`, which is not in this table).
+
+| | before | after |
+| --- | ---: | ---: |
+| QSA attention on the decode kernel (`attn_chunk_kernel<1>`) | 5.78 s (19.2%) | 0.18 s (decode steps only) |
+| `prompt_attn_v70_kernel` | - | 2.16 s (9.0%; 12% of the prompt part) |
+
+## Accuracy
+
+`qsa_prompt_attn_parity` (synthetic, no model; build with `-DSTRATA_PARITY_PROMPT_ATTN=ON`), V100, 32K context, 2,048 queries per chunk, output scale 3.6:
+
+| KV | error vs FP64, old kernel | error vs FP64, new kernel | time per chunk, old -> new |
+| --- | ---: | ---: | ---: |
+| int8 | 2.4e-6 | 5.1e-6 | 38.1 -> 13.4 ms (2.8x) |
+| fp16 | 1.9e-6 | 5.3e-6 | 37.3 -> 28.3 ms (1.3x) |
+
+The 1,500- and 2,100-token contexts also pass (int8: 3.2x and 2.2x). The test's Q4_0 cases are skipped below sm_80, where the dispatcher keeps the
+old kernel (upstream's mode 4 is sm_80+ only).
+
+## Output checks
+
+- **Needle recall** (`tools/needle_bench.py --lengths 8k,32k,128k --depths 10,30,50,70,90`, greedy, thinking off, a fresh server per
+  configuration; prompts of 7.9K, 32.0K and 122.7K tokens): **15 of 15 found with the old path, 15 of 15 with the new kernel.** The read times of
+  the later depths are shorter because the server reuses the checkpoint of the text before the needle.
+- **Greedy output** (48 tokens, the three prompts above): identical for the 28,650- and 114,338-token prompts. For the 7,194-token prompt the
+  answer starts the same and **differs later**: the kernel sums in another order and a greedy decode can follow a near tie elsewhere. A recall test
+  with a code word does not tell small shifts of the output distribution apart, and a teacher-forced top-1 comparison was not run.
+
+## Limits
+
+- sm_70 only (`__CUDA_ARCH__` 700-749). Q4_0 KV (`--kv q4_0`) and the QSA block scores (`block_scores_kernel`, the warp kernel below sm_80) still use their
+  old kernels on Volta.
+- One request, one card. The Unsloth IQ4_XS pack is not a setup model; the GSQ-RCO quants were not run on this rig.
+- The profile above is one capture of one prompt.
+
+## Reproduce
+
+```sh
+cmake -S . -B build -DSTRATA_ENABLE_CUDA=ON -DSTRATA_BUILD_TESTS=OFF -DSTRATA_PARITY_PROMPT_ATTN=ON \
+      -DCMAKE_CUDA_ARCHITECTURES=70 -DSTRATA_EXPERIMENTAL_SM60=ON
+cmake --build build --target strata qsa_prompt_attn_parity -j
+CUDA_VISIBLE_DEVICES=0 ./build/qsa_prompt_attn_parity 32768 2048 5       # the accuracy table
+STRATA_PROMPT_ATTN_OLD=1 <start script>                                   # the old path; without the variable: the new kernel
+python tools/needle_bench.py --url http://127.0.0.1:8081 --lengths 8k,32k,128k --depths 10,30,50,70,90
+```
diff --git a/docs/NVIDIA_V100.md b/docs/NVIDIA_V100.md
new file mode 100644
index 00000000000..85e72f8b5c5
--- /dev/null
+++ b/docs/NVIDIA_V100.md
@@ -0,0 +1,74 @@
+# NVIDIA Tesla V100 / Titan V (Volta, sm_70): the community build
+
+Strata's ready-made engine and the support matrix start at compute capability 7.5 (RTX 20). A V100 (7.0) runs the same
+engine compiled for it, through the experimental build that issue #236 added. It is **community-tested, not part of the
+supported cards**: no ready-made engine is published for it and the numbers below come from one machine.
+
+## Build
+
+CUDA 13 dropped Volta, so the build needs a **CUDA 12.x** toolkit (12.8 was used) and a host GCC that toolkit accepts.
+
+```sh
+cmake -S . -B build -DSTRATA_ENABLE_CUDA=ON -DSTRATA_BUILD_TESTS=OFF \
+      -DCMAKE_CUDA_ARCHITECTURES=70 -DSTRATA_EXPERIMENTAL_SM60=ON
+cmake --build build --target strata -j
+```
+
+`STRATA_EXPERIMENTAL_SM60=1 ./setup.sh` does the same through setup (it compiles the engine on the PC instead of
+downloading it). For a PC with a V100 and a newer card, a build for both architectures (`-DCMAKE_CUDA_ARCHITECTURES="70;86"`) is the
+natural choice (a community report in issue #509 ran an RTX 3080 beside a V100 that way; it was not repeated here). On the
+measuring PC a Quadro RTX 4000 (sm_75) sits beside the V100s and was hidden with `CUDA_VISIBLE_DEVICES` because the sm_70-only
+build has no code for it.
+
+## What runs on Volta
+
+The flag only lowers the floor (CMake and the runtime device check) and replaces two intrinsics Volta lacks. It does not
+select "old" kernels everywhere: which kernel runs is decided per architecture when the engine is built.
+
+| Part of the prompt path | On sm_70 |
+| --- | --- |
+| MoE experts (ggml MMQ) | `dp4a` kernels (Volta has no int8 tensor cores) |
+| Dense projections (dequantized weights) | FP16 tensor-core GEMMs (cuBLAS / CUTLASS `s884`) |
+| BF16 projections (hyper-connection, router, indexer, ...) | FP16 tensor-core GEMMs on an FP16 copy of the operands (PR #593; `STRATA_BF16_VIA_F16=0`: cuBLAS BF16, which is an FP32 SIMT kernel on Volta) |
+| QSA prompt attention, int8 / FP16 / K8V4 KV | `prompt_attn_v70_kernel` on `mma.m8n8k4` (`STRATA_PROMPT_ATTN_OLD=1`: the decode kernel, one query at a time) |
+| QSA prompt attention, Q4_0 KV | the decode kernel |
+| QSA block scores | the warp kernel (the tensor-core scorer needs sm_80) |
+
+Two details of the BF16 path (PR #593): the conversion is exact for every BF16 value inside FP16's range, and the FP16 copy of the activations
+is reserved with the prompt path's other buffers at start (T x the widest projection: 42 MB at a 2,048-token chunk, 168 MB at the 8,192-token chunk the server chose on the measuring PC), only on cards that need
+it. `STRATA_BF16_VIA_F16_CHECK=1` counts the values FP16 could not hold and prints the numbers at exit.
+
+## Measured
+
+One V100-PCIE-32GB, i9-7960X, Unsloth `UD-IQ4_XS` (not a setup model), int8 KV, MTP `--spec 2`; prompt read speed of random-word prompts, tokens/s,
+with and without the Volta attention kernel (`STRATA_PROMPT_ATTN_OLD=1`):
+
+| Prompt tokens | old attention path | `prompt_attn_v70_kernel` |
+| --- | ---: | ---: |
+| 7,194 | 1,010 | 1,164 |
+| 28,650 | 1,063 | 1,251 |
+| 114,338 | 973 | 1,123 |
+
+Decode was 38-51 tok/s in every run and is not affected. The profile, the parity numbers, the needle test and the limits are in
+[bench/results/2026-10-03-v100-prompt-attn](../bench/results/2026-10-03-v100-prompt-attn/README.md).
+
+What the kernel does and does not guarantee: against an FP64 reference its error is about 5e-6 (output scale 3.6; the FP32 kernel it replaces: 2e-6); 15 of 15
+needles were found; greedy output was identical on the 28,650- and 114,338-token prompts and differed late in the answer on the 7,194-token one (another
+summation order).
+
+## Checking and benchmarking the Volta kernels
+
+```sh
+cmake -S . -B build -DSTRATA_PARITY_PROMPT_ATTN=ON ... && cmake --build build --target qsa_prompt_attn_parity
+CUDA_VISIBLE_DEVICES=0 ./build/qsa_prompt_attn_parity 32768 2048 5     # synthetic, no model; exit 0 = PASS
+```
+
+It compares the tensor-core attention with the FP32 kernel and an FP64 host reference and times both. The Q4_0 cases are skipped below
+sm_80.
+
+## Limits
+
+- A layer split over two V100 was not measured with this kernel. The cards work in turn on a single request, so a split adds expert-cache room, not prompt speed.
+- sm_60 (Pascal) is covered by the same flag but was not measured here.
+- Volta's tensor cores take FP16 only: a model's BF16 weights are converted, and a weight outside FP16's range would saturate (none did in
+  the check above).

From f23ea5799428d24a7545ede3caa92626094ba59d Mon Sep 17 00:00:00 2001
From: Klaus Friedel <git@friedelprivat.de>
Date: Sat, 3 Oct 2026 15:58:15 +0200
Subject: [PATCH 136/201] bench: distribution check of the Volta prompt
 attention (teacher-forced KL, controls)

Old path against new kernel on 8.5K / 33K / 99K-token chats, 617 scored positions each, with two controls that change only the rounding
order (BF16 GEMMs without the FP16 detour, another prefill chunk), reruns of both paths (bit-identical), and the kernel's own error on the
model's data (relative 4.4e-7 mean, 4.8e-6 worst row over ~5 M rows).

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
---
 .../2026-10-03-v100-prompt-attn/README.md     | 29 ++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/bench/results/2026-10-03-v100-prompt-attn/README.md b/bench/results/2026-10-03-v100-prompt-attn/README.md
index 5b753fd6684..4d4aaf4108e 100644
--- a/bench/results/2026-10-03-v100-prompt-attn/README.md
+++ b/bench/results/2026-10-03-v100-prompt-attn/README.md
@@ -58,12 +58,39 @@ old kernel (upstream's mode 4 is sm_80+ only).
   answer starts the same and **differs later**: the kernel sums in another order and a greedy decode can follow a near tie elsewhere. A recall test
   with a code word does not tell small shifts of the output distribution apart, and a teacher-forced top-1 comparison was not run.
 
+## Distribution check (teacher-forced, against the old path and against controls)
+
+The method of `docs/UNSLOTH_Q4.md`: `STRATA_LOGPOS=<file> STRATA_LOGPOS_TOPK=256` on a serve engine (`--short-read 640 --adapt-every 100000`, greedy,
+`--max-context 204800`). Each prompt is a chat: a long first message (8,543 / 32,906 / 99,040 tokens of this repository's docs and code, read by the
+batched prompt path, i.e. by the kernel under test), a short reply, and a last message of ~600 tokens of other repository text that goes through the verify
+windows, where every token is scored: 617 positions per prompt. KL is old || other over the old run's top 256 plus a bucket for the rest.
+
+| comparison | KL mean (8.5K / 33K / 99K) | argmax same | top-10 overlap |
+| --- | --- | --- | --- |
+| old path vs old path (a second run) | 0 / 0 / 0 | 100% | 100% |
+| new kernel vs new kernel (a second run) | 0 / 0 / 0 | 100% | 100% |
+| **old path vs new kernel** | 0.028 / 0.040 / 0.116 | 97.7 / 93.2 / 86.4% | 93.3 / 91.9 / 88.4% |
+| control A: old path, BF16 GEMMs without the FP16 detour (`STRATA_BF16_VIA_F16=0`) | 0.026 / 0.051 / 0.090 | 97.2 / 91.4 / 91.2% | 92.9 / 91.4 / 88.5% |
+| control B: old path, `--prefill 2048` instead of auto (8192) | 0.023 / 0.035 / 0.038 | 97.9 / 94.8 / 95.6% | 92.9 / 92.2 / 89.7% |
+
+Median KL old vs new: 0.0007 / 0.0088 / 0.022; p99: 0.35 / 0.39 / 1.12 (heavy-tailed). The perplexity of the true tokens moves a lot under every
+change (old 365 / 127 / 24; new 346 / 192 / 12; control A 395 / 161 / 18), so it says nothing about quality here.
+
+Reading: the model amplifies small numeric differences, and both controls, which change nothing but the order of the rounding, move the distribution as
+much as the kernel does. At 99K the kernel is somewhat above both controls; this is one document and 617 positions, so a real effect there is neither
+confirmed nor excluded.
+
+**The kernel on the model's own data.** A temporary check (not in this PR) ran the decode kernel beside the new one on the same inputs, for every 8th batch of
+32 queries, in all 12 QSA layers, on the three prompts above (positions up to 98K, ~5 million (query, head) rows of 256): ||new - old|| / ||old|| per row is
+4.4e-7 on average and 4.8e-6 in the worst row; the largest absolute difference is 4e-5 against values up to 31. No trend over the layers or the context
+length. That is FP32 rounding level, so the differences above come from the model's sensitivity, not from the kernel's arithmetic.
+
 ## Limits
 
 - sm_70 only (`__CUDA_ARCH__` 700-749). Q4_0 KV (`--kv q4_0`) and the QSA block scores (`block_scores_kernel`, the warp kernel below sm_80) still use their
   old kernels on Volta.
 - One request, one card. The Unsloth IQ4_XS pack is not a setup model; the GSQ-RCO quants were not run on this rig.
-- The profile above is one capture of one prompt.
+- The profile above is one capture of one prompt. The distribution check is one document per length; the 99K row is the least certain.
 
 ## Reproduce
 

From b078be0016c3710d22167190d01bcba3228d32ce Mon Sep 17 00:00:00 2001
From: Klaus Friedel <git@friedelprivat.de>
Date: Sat, 3 Oct 2026 16:01:00 +0200
Subject: [PATCH 137/201] docs: point the BF16 note at #540 (the BF16-via-FP16
 PR #593 was closed in its favor)

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
---
 bench/results/2026-10-03-v100-prompt-attn/README.md | 2 +-
 docs/NVIDIA_V100.md                                 | 6 +-----
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/bench/results/2026-10-03-v100-prompt-attn/README.md b/bench/results/2026-10-03-v100-prompt-attn/README.md
index 4d4aaf4108e..ab8b32624b8 100644
--- a/bench/results/2026-10-03-v100-prompt-attn/README.md
+++ b/bench/results/2026-10-03-v100-prompt-attn/README.md
@@ -30,7 +30,7 @@ Decode is unchanged within the noise (38-51 tok/s, 48 tokens per request): it do
 ## Where the time went (nsys, one V100, 28,650-token prompt, GPU kernel time of the whole capture: prefill plus 128-193 decode tokens)
 
 `strata-1gpu-32k-*.nsys-rep`; the "before" capture is 0.1.35 (`d9ab843`), the "after" one is the same base with this change and the BF16 change
-of #593 (that one only removes `magma_sgemmEx`, which is not in this table).
+of #540 / the closed #593 (BF16 GEMMs through FP16; that one only removes `magma_sgemmEx`, which is not in this table).
 
 | | before | after |
 | --- | ---: | ---: |
diff --git a/docs/NVIDIA_V100.md b/docs/NVIDIA_V100.md
index 85e72f8b5c5..197861b9515 100644
--- a/docs/NVIDIA_V100.md
+++ b/docs/NVIDIA_V100.md
@@ -29,15 +29,11 @@ select "old" kernels everywhere: which kernel runs is decided per architecture w
 | --- | --- |
 | MoE experts (ggml MMQ) | `dp4a` kernels (Volta has no int8 tensor cores) |
 | Dense projections (dequantized weights) | FP16 tensor-core GEMMs (cuBLAS / CUTLASS `s884`) |
-| BF16 projections (hyper-connection, router, indexer, ...) | FP16 tensor-core GEMMs on an FP16 copy of the operands (PR #593; `STRATA_BF16_VIA_F16=0`: cuBLAS BF16, which is an FP32 SIMT kernel on Volta) |
+| BF16 projections (hyper-connection, router, indexer, ...) | cuBLAS BF16, which runs as an FP32 SIMT kernel on Volta (`magma_sgemmEx`); #540 moves it onto the FP16 tensor cores |
 | QSA prompt attention, int8 / FP16 / K8V4 KV | `prompt_attn_v70_kernel` on `mma.m8n8k4` (`STRATA_PROMPT_ATTN_OLD=1`: the decode kernel, one query at a time) |
 | QSA prompt attention, Q4_0 KV | the decode kernel |
 | QSA block scores | the warp kernel (the tensor-core scorer needs sm_80) |
 
-Two details of the BF16 path (PR #593): the conversion is exact for every BF16 value inside FP16's range, and the FP16 copy of the activations
-is reserved with the prompt path's other buffers at start (T x the widest projection: 42 MB at a 2,048-token chunk, 168 MB at the 8,192-token chunk the server chose on the measuring PC), only on cards that need
-it. `STRATA_BF16_VIA_F16_CHECK=1` counts the values FP16 could not hold and prints the numbers at exit.
-
 ## Measured
 
 One V100-PCIE-32GB, i9-7960X, Unsloth `UD-IQ4_XS` (not a setup model), int8 KV, MTP `--spec 2`; prompt read speed of random-word prompts, tokens/s,

From b30e815827c4cbc83f52e50464769974679c895f Mon Sep 17 00:00:00 2001
From: 4EverBuilder <4EverBuilder@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:28:19 +0200
Subject: [PATCH 138/201] native experts without AVX2: Q2_0 layers on ggml-cpu,
 every AVX2 kernel gated (#595)

A native pack's Q2_0 layers (most IQ packs' down projections) ran on Strata's own Q2_0 kernels, which
are AVX2 at least. q2_native_kernels() keeps them there when the CPU has AVX2 and otherwise hands the
layer to ggml-cpu's Q2_0 vec_dot like every other native type (the pool, the dispatcher's activation
quantizer and the parity test). STRATA_KQ256's gate/up kernel needs AVX2 too. native_expert_parity
skips the AVX2 checks on a CPU without AVX2. No change on a CPU with AVX2.

(The engine part of #595; its setup and run-script parts are not in this commit.)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/kernels/cpu/expert_layout.hpp | 4 ++++
 src/core/expert_source.cpp                   | 2 +-
 src/kernels/cpu/native_expert.cpp            | 2 +-
 src/kernels/cpu/pool.cpp                     | 6 +++---
 src/kernels/native_expert_parity.cpp         | 8 ++++----
 5 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/include/strata/kernels/cpu/expert_layout.hpp b/include/strata/kernels/cpu/expert_layout.hpp
index 9a8b9918302..540ccabdb39 100644
--- a/include/strata/kernels/cpu/expert_layout.hpp
+++ b/include/strata/kernels/cpu/expert_layout.hpp
@@ -47,6 +47,10 @@ bool cpu_avx512_ok();
 /// Whether this CPU (and its OS) runs the AVX2 kernels (AVX, AVX2, FMA, F16C): the floor of every expert kernel
 /// (q2_avx2.cpp, iq_avx2.cpp, and ggml-cpu in the portable build).  STRATA_FORCE_AVX2 does not change it.
 bool cpu_avx2_ok();
+/// Whether a native pack's layer of this ggml type runs on Strata's own Q2_0 kernels (AVX2 / AVX-512).  On a
+/// CPU without AVX2 (a native, non-portable build: ggml-cpu compiled for this CPU's SSE) a Q2_0 layer takes
+/// ggml-cpu's own Q2_0 vec_dot like every other native type: slower, but it runs.
+inline bool q2_native_kernels(int type) { return type == 42 && cpu_avx2_ok(); }
 /// The CPU's brand string (CPUID 0x80000002..4), for messages; "unknown" when it has none.
 std::string cpu_name();
 /// Q2_0 GGUF rows / activation quantizer on the kernels this CPU has.
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index e2154941a5f..3cbb71dd15a 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2100,7 +2100,7 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         }
     }
     const auto c1 = std::chrono::steady_clock::now();
-    if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
+    if (native && strata::kernels::cpu::q2_native_kernels(lay.fmt[(size_t) d.layers].gu_type))   // a native Q2_0 pack: the Q2_0 kernels' activations
         for (int64_t t = 0; t < n_tok; ++t) act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
     else if (native)
         for (int64_t t = 0; t < n_tok; ++t)
diff --git a/src/kernels/cpu/native_expert.cpp b/src/kernels/cpu/native_expert.cpp
index d90d609583b..0dc5d3aa842 100644
--- a/src/kernels/cpu/native_expert.cpp
+++ b/src/kernels/cpu/native_expert.cpp
@@ -100,7 +100,7 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // Unsloth UD-Q4_K_XL's Q4_K gate/up: the multi-token kernel is bit-exact against ggml's per-token dot (any group
     // size, no #152 rule).  Opt-in, STRATA_KQ256=1: measured no faster in the engine (a window's expert groups hold
     // ~1.4 tokens and the weights stay in L1 across ggml's per-token calls; 1.01-1.13x in native_expert_parity).
-    static const bool kq = [] { const char* v = std::getenv("STRATA_KQ256"); return v != nullptr && std::atoi(v) != 0; }();
+    static const bool kq = [] { const char* v = std::getenv("STRATA_KQ256"); return cpu_avx2_ok() && v != nullptr && std::atoi(v) != 0; }();
     if (kq && f.gu_type == 12 && nt >= 2) {   // one token: ggml's own dot below (the same bits, less overhead)
         kq256_gu_rows(f.gu_type, blob, f.gu_row, f.up_off, (int) f.n_embd, act, nt, ff, r0, r1);
         return;
diff --git a/src/kernels/cpu/pool.cpp b/src/kernels/cpu/pool.cpp
index 1919d2e9c6d..28a1f612ee9 100644
--- a/src/kernels/cpu/pool.cpp
+++ b/src/kernels/cpu/pool.cpp
@@ -549,7 +549,7 @@ void ExpertPool::drain(int id, ExpertScratch& scratch, uint32_t epoch) {
                 const int e = (int) (r / per), r0 = (int) (r % per);
                 const int r1 = (int) std::min<int64_t>(per, r0 + (g1 - r));
                 SplitBufMulti& sb = split_multi_[(size_t) e];
-                if (mode_ == 5 && nfmt_->gu_type == 42) {
+                if (mode_ == 5 && q2_native_kernels(nfmt_->gu_type)) {
                     // a native Q2_0 pack: gate and up rows on the Q2_0 kernels, then SwiGLU
                     thread_local float gbuf[MAXT][FF], ubuf[MAXT][FF];
                     float* gp[MAXT];
@@ -565,7 +565,7 @@ void ExpertPool::drain(int id, ExpertScratch& scratch, uint32_t epoch) {
                     float* ff[MAXT];
                     for (int t = 0; t < mjobs_[e].nt; ++t) ff[t] = sb.ff[t];
                     native_gu_rows(*nfmt_, mjobs_[e].blob, mjobs_[e].nact, mjobs_[e].nt, ff, r0, r1);
-                } else if (nfmt_->d_type == 42) {
+                } else if (q2_native_kernels(nfmt_->d_type)) {
                     // Q2_0 down (most IQ layers): the AVX-512 kernel, ggml-cpu has only a scalar one on x86
                     const ActQ* a2[MAXT];
                     for (int t = 0; t < mjobs_[e].nt; ++t) a2[t] = &sb.a2[t];
@@ -685,7 +685,7 @@ void ExpertPool::run_split_multi_native(const NativeFmt& f, ExpertJobMulti* jobs
         const auto b = std::chrono::steady_clock::now();
         for (int e = 0; e < nb; ++e)
             for (int t = 0; t < mjobs_[e].nt; ++t)
-                if (f.d_type == 42) act_quant_any(split_multi_[(size_t) e].ff[t], FF, split_multi_[(size_t) e].a2[t]);
+                if (q2_native_kernels(f.d_type)) act_quant_any(split_multi_[(size_t) e].ff[t], FF, split_multi_[(size_t) e].a2[t]);
                 else native_quant_h(f, split_multi_[(size_t) e].ff[t], split_multi_[(size_t) e].hq[t]);
         const auto c = std::chrono::steady_clock::now();
         mrows_ = (int64_t) nb * H;
diff --git a/src/kernels/native_expert_parity.cpp b/src/kernels/native_expert_parity.cpp
index 0183f01b48f..01133fad545 100644
--- a/src/kernels/native_expert_parity.cpp
+++ b/src/kernels/native_expert_parity.cpp
@@ -147,7 +147,7 @@ int check_blob(const cpu::NativeFmt& f, const std::vector<uint8_t>& blob, int se
             };
             // guarded: the binary runs on AVX-2 CPUs too, and IQ4_XS has no AVX-512 kernel (an empty switch)
             if (cpu::cpu_avx512_ok() && cpu::iq512_supported(f.gu_type)) check("avx512", true);
-            if (cpu::iq256_supported(f.gu_type)) check("avx2", false);
+            if (cpu::cpu_avx2_ok() && cpu::iq256_supported(f.gu_type)) check("avx2", false);   // no AVX2: ggml-cpu only
         }
         for (int k = 0; k < NT; ++k) {
             cpu::native_quant_h(f, ff[k].data(), hq[k].data());
@@ -180,7 +180,7 @@ int check_blob(const cpu::NativeFmt& f, const std::vector<uint8_t>& blob, int se
         // BIT FOR BIT, for 1..8 tokens; then the time of 4 tokens (a verify window) both ways
         for (int role = 0; role < 2; ++role) {
             const int type = role == 0 ? f.gu_type : f.d_type;
-            if (!cpu::kq256_supported(type) || (role == 0 && type != 12)) continue;
+            if (!cpu::cpu_avx2_ok() || !cpu::kq256_supported(type) || (role == 0 && type != 12)) continue;
             const int n = role == 0 ? (int) H : (int) FF, rows = role == 0 ? (int) FF : (int) H;
             const size_t rb = role == 0 ? f.gu_row : f.d_row;
             const uint8_t* w = blob.data() + (role == 0 ? 0 : f.down_off);
@@ -223,7 +223,7 @@ int check_blob(const cpu::NativeFmt& f, const std::vector<uint8_t>& blob, int se
                         role == 0 ? "gate" : "down", differ, us_k, us_g, us_g / us_k);
             if (differ) ++failures;
         }
-        if (f.d_type == 42) {
+        if (cpu::q2_native_kernels(f.d_type)) {
             // (b2) the GGUF-layout Q2_0 kernel the pool uses for Q2_0 down projections - the AVX-512 one
             // where the CPU has it, the AVX-2 one (q2_avx2.cpp) where it does not.  Calling the AVX-512
             // kernel unconditionally faults on a Zen 2/3 CPU.
@@ -240,7 +240,7 @@ int check_blob(const cpu::NativeFmt& f, const std::vector<uint8_t>& blob, int se
             std::printf("          q2_0 %s down vs ggml down: rel %.2e\n",
                         cpu::cpu_avx512_ok() ? "AVX-512" : "AVX-2", rel(alt, got_c));
         }
-        if (f.d_type == 20) {
+        if (f.d_type == 20 && cpu::cpu_avx2_ok()) {
             // (b3) the IQ4_NL multi-token AVX-2 kernel the pool now uses for IQ4_NL down projections,
             // against ggml-cpu's single-token vec_dot on the SAME Q8_0 activations (h), plus timing.
             std::vector<float> alt((size_t) NT * H), refd((size_t) NT * H);

From 800ca98a6e4e333d58af1cdb545263744ffce199 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:29:00 +0200
Subject: [PATCH 139/201] Volta prompt attention and the Pascal BF16 path:
 compiled into the experimental build only (PR #600, #395 follow-up)

STRATA_EXPERIMENTAL_SM60 now reaches every target (add_compile_definitions). prompt_attn_v70_kernel with its launcher,
and Gemm::bf16's fp32 path for Pascal, exist only under it: the ready-made engine (sm_75+) loads no extra kernels for
them, while the experimental build's sm_60/61/70 cards get them.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                      |  5 +++++
 src/kernels/cuda/qsa_prompt_attn.cu |  8 +++++---
 src/prefill/gemm.cu                 | 15 ++++++++++-----
 3 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index daef8bfe785..7e9017cf3b8 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -114,6 +114,11 @@ if(STRATA_ENABLE_CUDA)
                       "CUDA 12.8 crashed on long prompts on these cards (issues #220, #224). Use CUDA 13.0 or newer.")
     endif()
   endforeach()
+  if(STRATA_EXPERIMENTAL_SM60)
+    # every target sees it: the Pascal / Volta code paths (the Volta prompt attention, PR #600) are compiled into this
+    # build only, so the ready-made engine (sm_75+) keeps exactly the code it had
+    add_compile_definitions(STRATA_EXPERIMENTAL_SM60=1)
+  endif()
   message(STATUS "Strata: CUDA enabled, arch ${CMAKE_CUDA_ARCHITECTURES}")
   set(_strata_gpu_runtime_target CUDA::cudart)
   set(_strata_gpu_blas_target CUDA::cublas)
diff --git a/src/kernels/cuda/qsa_prompt_attn.cu b/src/kernels/cuda/qsa_prompt_attn.cu
index 914690afae7..8062176c314 100644
--- a/src/kernels/cuda/qsa_prompt_attn.cu
+++ b/src/kernels/cuda/qsa_prompt_attn.cu
@@ -737,7 +737,9 @@ bool launch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const
 }
 
 
-#if !defined(__HIPCC__)
+// PR #600: compiled only into the experimental build (-DSTRATA_EXPERIMENTAL_SM60=ON), the one build that runs on a
+// Volta card; the ready-made engine has none of it (no extra kernels to load, the same code as before).
+#if !defined(__HIPCC__) && defined(STRATA_EXPERIMENTAL_SM60)
 // ---- sm_70 (Volta): v1's structure on mma.m8n8k4 ------------------------------------------------------------------
 // Volta's tensor cores only have m8n8k4 (FP16 in, FP32 accumulate): per warp FOUR independent 8x8x4 products, one per
 // quad-pair (QP q = lanes 4q..4q+3 and 4q+16..4q+19; thread j = (lane & 3) + 4 * (lane >> 4) within it). Layout, measured on
@@ -1111,13 +1113,13 @@ bool launch70(const float* q, const QsaAttnPools& pools, const int32_t* ids, con
     }
     return true;
 }
-#else   // AMD: no m8n8k4 kernel; the dispatcher never selects it there
+#else   // AMD, or a build without STRATA_EXPERIMENTAL_SM60: no m8n8k4 kernel (the caller keeps the old one)
 template <int KV_MODE>
 bool launch70(const float*, const QsaAttnPools&, const int32_t*, const int32_t*, int64_t, const QsaShapes&, float*,
               int64_t, cudaStream_t) {
     return false;
 }
-#endif  // !__HIPCC__
+#endif  // !__HIPCC__ && STRATA_EXPERIMENTAL_SM60
 
 #if defined(__HIPCC__)
 // ---- S6: the int8-KV prompt attention on RDNA4 matrix cores (opt-in: STRATA_HIP_WMMA=1, gfx12 only). The design of
diff --git a/src/prefill/gemm.cu b/src/prefill/gemm.cu
index 1d71bbb70a9..445c7447e9e 100644
--- a/src/prefill/gemm.cu
+++ b/src/prefill/gemm.cu
@@ -402,18 +402,20 @@ __global__ void bf16_to_f16_kernel(const uint16_t* __restrict__ in, __half* __re
         out[i] = __float2half_rn(f);
     }
 }
-__global__ void bf16_to_f32_kernel(const uint16_t* __restrict__ in, float* __restrict__ out, int64_t n) {
-    const int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x;
-    if (i < n) out[i] = __uint_as_float((uint32_t) in[i] << 16);
-}
 void bf16_to_f16(const uint16_t* in, uint16_t* out, int64_t n, cudaStream_t st) {
     if (n <= 0) return;
     bf16_to_f16_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, st>>>(in, reinterpret_cast<__half*>(out), n);
 }
+#if defined(STRATA_EXPERIMENTAL_SM60)   // Pascal runs only the experimental build
+__global__ void bf16_to_f32_kernel(const uint16_t* __restrict__ in, float* __restrict__ out, int64_t n) {
+    const int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x;
+    if (i < n) out[i] = __uint_as_float((uint32_t) in[i] << 16);
+}
 void bf16_to_f32(const uint16_t* in, float* out, int64_t n, cudaStream_t st) {
     if (n <= 0) return;
     bf16_to_f32_kernel<<<(unsigned) ((n + 255) / 256), 256, 0, st>>>(in, out, n);
 }
+#endif
 // The current device's compute capability as 10 * major + minor, per device (a layer split can mix cards); 0: not
 // known, read as "not an old card" so a failed query keeps the cuBLAS BF16 call.
 int current_cc() {
@@ -483,7 +485,9 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
             }
             return;
         }
-    } else if (path == 2) {
+    }
+#if defined(STRATA_EXPERIMENTAL_SM60)
+    else if (path == 2) {
         // Pascal: fp32 copies (2 elements of the 2-byte buffers each).  Every tile is a disjoint block of Y, so each
         // gets the caller's beta.
         const int64_t x_rows = std::max<int64_t>(1, std::min<int64_t>(T, kXSliceElems / K));
@@ -501,6 +505,7 @@ void Gemm::bf16(const uint16_t* X, const uint16_t* W, float* Y, int64_t T, int64
             return;
         }
     }
+#endif
 #endif
     // Column-major view: Y^T[N, T] = W[N, K] (stored K x N col-major, transposed) . X^T[K, T].
     ck(cublasGemmEx((cublasHandle_t) handle_, CUBLAS_OP_T, CUBLAS_OP_N, (int) N, (int) T, (int) K, &alpha, W,

From 539821323510170a9be85fb94805f14fc6a7d7a2 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:29:11 +0200
Subject: [PATCH 140/201] cmake: STRATA_ENABLE_SYCL, the experimental Intel Arc
 engine (sycl/, off by default)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 347d2ec7ca2..4b6ce4601c8 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -9,6 +9,17 @@
 # and is wrong about its own performance, which is the worst of both outcomes.
 cmake_minimum_required(VERSION 3.24)
 project(strata VERSION 0.1.39 LANGUAGES CXX)
+# EXPERIMENTAL: the Intel Arc engine, the SYCL port in sycl/ (PR #423; icpx + oneMKL, docs/INTEL_ARC.md). It is its
+# own project that takes the unported sources from src/; with this on, nothing below is configured.
+option(STRATA_ENABLE_SYCL "EXPERIMENTAL: build the Intel Arc (SYCL) engine from sycl/ - docs/INTEL_ARC.md" OFF)
+if(STRATA_ENABLE_SYCL)
+  if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
+    message(FATAL_ERROR "STRATA_ENABLE_SYCL is a separate backend; leave STRATA_ENABLE_CUDA and STRATA_ENABLE_HIP off")
+  endif()
+  message(WARNING "STRATA_ENABLE_SYCL: the Intel Arc engine is experimental (community port, docs/INTEL_ARC.md)")
+  add_subdirectory(sycl)
+  return()
+endif()
 add_compile_definitions(STRATA_VERSION="${PROJECT_VERSION}")
 # issue #31: release builds keep a PDB beside the exe (not shipped in it), so a minidump from a stalled engine can
 # be read back to the exact source line

From fd95405768236e0a9ad1c7cfc85098e93b03646c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?K=C3=A1roly=20S=C3=A1rdi?= <skver@tuta.io>
Date: Fri, 2 Oct 2026 19:30:47 +0200
Subject: [PATCH 141/201] perf(qsa): cut the attention kernel's shuffles and q
 shared-memory traffic, bit-exact

---
 src/kernels/cuda/qsa_decode_attn.cu | 174 ++++++++++++++++++++++------
 1 file changed, 137 insertions(+), 37 deletions(-)

diff --git a/src/kernels/cuda/qsa_decode_attn.cu b/src/kernels/cuda/qsa_decode_attn.cu
index 4035999a959..f508ec22c9d 100644
--- a/src/kernels/cuda/qsa_decode_attn.cu
+++ b/src/kernels/cuda/qsa_decode_attn.cu
@@ -80,6 +80,57 @@ __device__ __forceinline__ void load8(const QsaAttnPools& p, bool value, long lo
     } else load8_q4(p, value, row, d0, out);
 }
 
+// The 12 heads' lane sums (`part[12..15]` zero), reduce-scattered with warp_sum's pairing order (xor 16, 8, 4, 2, 1):
+// every output adds the same two operands at every level, so each sum is bit for bit warp_sum's (float add commutes),
+// for 16 shuffles instead of 12 x 5.  Lane l ends holding head head_of_lane(l); lanes l and l^1 agree.
+__device__ __forceinline__ float reduce12(const float (&part)[16], int lane) {
+    float r8[8];
+#pragma unroll
+    for (int i = 0; i < 8; ++i) {
+        const bool hi = (lane & 16) != 0;
+        r8[i] = (hi ? part[i + 8] : part[i]) + __shfl_xor_sync(0xffffffffu, hi ? part[i] : part[i + 8], 16);
+    }
+    float r4[4];
+#pragma unroll
+    for (int i = 0; i < 4; ++i) {
+        const bool hi = (lane & 8) != 0;
+        r4[i] = (hi ? r8[i + 4] : r8[i]) + __shfl_xor_sync(0xffffffffu, hi ? r8[i] : r8[i + 4], 8);
+    }
+    float r2[2];
+#pragma unroll
+    for (int i = 0; i < 2; ++i) {
+        const bool hi = (lane & 4) != 0;
+        r2[i] = (hi ? r4[i + 2] : r4[i]) + __shfl_xor_sync(0xffffffffu, hi ? r4[i] : r4[i + 2], 4);
+    }
+    const bool hi2 = (lane & 2) != 0;
+    const float r1 = (hi2 ? r2[1] : r2[0]) + __shfl_xor_sync(0xffffffffu, hi2 ? r2[0] : r2[1], 2);
+    return r1 + __shfl_xor_sync(0xffffffffu, r1, 1);
+}
+__device__ __forceinline__ int head_of_lane(int lane) {
+    return ((lane >> 4) & 1) * 8 + ((lane >> 3) & 1) * 4 + ((lane >> 2) & 1) * 2 + ((lane >> 1) & 1);
+}
+
+// One V element of pool row `row`, dimension `d` (the value loop's own thread index), per KV format.
+template <int KV_MODE>
+__device__ __forceinline__ float load_v1(const QsaAttnPools& p, long long row, int d) {
+    if constexpr (KV_MODE == 0) {
+        return __half2float(__ushort_as_half(p.v_pool[row * HD + d]));
+    } else if constexpr (KV_MODE == 1) {
+        const float sc = __half2float(__ushort_as_half(p.v_scale[row * (HD / KV_Q8_GROUP) + d / KV_Q8_GROUP]));
+        return (float) p.v_q[row * HD + d] * sc;
+    } else {   // modes 2 and 3: V is rotated Q4_0 (kv_q4.hpp); the caller rotates the output back
+        constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
+        const int b = d / QK4_0;
+        const int rem = d % QK4_0;
+        const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + row * bytes_per_head) + b;
+        const float dd = __half2float(__ushort_as_half(blk->d));
+        const int j = rem < 16 ? rem : (rem - 16);
+        const uint8_t byte = blk->qs[j];
+        const int nibble = (rem < 16) ? ((byte & 0x0F) - 8) : ((byte >> 4) - 8);
+        return (float) nibble * dd;
+    }
+}
+
 template <int KV_MODE>
 __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __restrict__ q, QsaAttnPools p,
                                                              const int32_t* __restrict__ ids,
@@ -95,7 +146,8 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
     part_m += (size_t) blockIdx.z * (size_t) scratch_stride;
     part_l += (size_t) blockIdx.z * (size_t) scratch_stride;
     __shared__ __align__(16) float sq[G][HD];     // 12 KB: this KV head's query heads
-    __shared__ float sp[G][CHUNK];                // scores, then probabilities
+    __shared__ float sp[G][CHUNK];                // scores
+    __shared__ __align__(16) float spt[CHUNK][G]; // probabilities, cell-major: the value loop reads one cell's 12 as three float4
     __shared__ long long srow[CHUNK];             // pool row of each cell (page, kv head, slot)
     const int n_ids = __ldg(step + kStepWidth);
     const int chunk = blockIdx.x, kvh = blockIdx.y;
@@ -120,22 +172,63 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
         srow[t] = r;
     }
     __syncthreads();
-    // scores: each warp takes cells warp, warp+8, ...; each lane holds 8 of the 256 dimensions.
-    for (int c = warp; c < CHUNK; c += WARPS) {
-        if (c >= n_here || srow[c] < 0) {
-            if (lane < G) sp[lane][c] = -FLT_MAX;
-            continue;
+    // scores: each warp takes cells warp, warp+8, ...; each lane holds 8 of the 256 dimensions.  NC cells per step
+    // (warp + 8 * (i + j)): a lane's q slice comes out of shared memory once for all of them, which cuts the traffic
+    // that bounds this phase (24 x 16 B per lane per cell, against the FMAs) by NC; every dot product is the same
+    // expression as for a single cell, so the scores are unchanged.
+    constexpr int NC = 2;   // 4 measured slower on a V100 (the registers cost occupancy)
+    const int hd = head_of_lane(lane);
+    for (int i = 0; i < CHUNK / WARPS; i += NC) {
+        int cc[NC];
+        bool all_ok = true;
+#pragma unroll
+        for (int j = 0; j < NC; ++j) {
+            cc[j] = warp + WARPS * (i + j);
+            all_ok = all_ok && cc[j] < n_here && srow[cc[j]] >= 0;
         }
-        float k8[8];
-        load8<KV_MODE>(p, false, srow[c], lane * 8, k8);
+        if (all_ok) {
+            float kk[NC][8];
+#pragma unroll
+            for (int j = 0; j < NC; ++j) load8<KV_MODE>(p, false, srow[cc[j]], lane * 8, kk[j]);
+            float pp[NC][16];
+#pragma unroll
+            for (int h = 0; h < G; ++h) {
+                const float4 qa = *reinterpret_cast<const float4*>(&sq[h][lane * 8]);
+                const float4 qb = *reinterpret_cast<const float4*>(&sq[h][lane * 8 + 4]);
+#pragma unroll
+                for (int j = 0; j < NC; ++j)
+                    pp[j][h] = kk[j][0] * qa.x + kk[j][1] * qa.y + kk[j][2] * qa.z + kk[j][3] * qa.w +
+                               kk[j][4] * qb.x + kk[j][5] * qb.y + kk[j][6] * qb.z + kk[j][7] * qb.w;
+            }
+#pragma unroll
+            for (int j = 0; j < NC; ++j) {
 #pragma unroll
-        for (int h = 0; h < G; ++h) {
-            const float4 qa = *reinterpret_cast<const float4*>(&sq[h][lane * 8]);
-            const float4 qb = *reinterpret_cast<const float4*>(&sq[h][lane * 8 + 4]);
-            float s = k8[0] * qa.x + k8[1] * qa.y + k8[2] * qa.z + k8[3] * qa.w +
-                      k8[4] * qb.x + k8[5] * qb.y + k8[6] * qb.z + k8[7] * qb.w;
-            s = warp_sum(s);
-            if (lane == 0) sp[h][c] = s * scale;
+                for (int h = G; h < 16; ++h) pp[j][h] = 0.0f;
+                const float sj = reduce12(pp[j], lane);
+                if ((lane & 1) == 0 && hd < G) sp[hd][cc[j]] = sj * scale;
+            }
+        } else {
+            for (int k = 0; k < NC; ++k) {   // a masked or out-of-range cell in the group: one cell at a time
+                const int c = cc[k];
+                if (c >= n_here || srow[c] < 0) {
+                    if (lane < G) sp[lane][c] = -FLT_MAX;
+                    continue;
+                }
+                float k8[8];
+                load8<KV_MODE>(p, false, srow[c], lane * 8, k8);
+                float part[16];
+#pragma unroll
+                for (int h = 0; h < G; ++h) {
+                    const float4 qa = *reinterpret_cast<const float4*>(&sq[h][lane * 8]);
+                    const float4 qb = *reinterpret_cast<const float4*>(&sq[h][lane * 8 + 4]);
+                    part[h] = k8[0] * qa.x + k8[1] * qa.y + k8[2] * qa.z + k8[3] * qa.w +
+                              k8[4] * qb.x + k8[5] * qb.y + k8[6] * qb.z + k8[7] * qb.w;
+                }
+#pragma unroll
+                for (int h = G; h < 16; ++h) part[h] = 0.0f;
+                const float s = reduce12(part, lane);
+                if ((lane & 1) == 0 && hd < G) sp[hd][c] = s * scale;
+            }
         }
     }
     __syncthreads();
@@ -145,8 +238,8 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
         const float m = warp_max(fmaxf(a, b));
         const float ea = (lane < n_here && srow[lane] >= 0) ? __expf(a - m) : 0.0f;
         const float eb = (lane + 32 < n_here && srow[lane + 32] >= 0) ? __expf(b - m) : 0.0f;
-        sp[h][lane] = ea;
-        sp[h][lane + 32] = eb;
+        spt[lane][h] = ea;
+        spt[lane + 32][h] = eb;
         const float l = warp_sum(ea + eb);
         if (lane == 0) { part_m[slot * G + h] = m; part_l[slot * G + h] = l; }
     }
@@ -155,27 +248,34 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
     float acc[G];
 #pragma unroll
     for (int h = 0; h < G; ++h) acc[h] = 0.0f;
-    for (int c = 0; c < n_here; ++c) {
+    // One cell's 12 weights (three broadcast float4 loads) into the 12 accumulators; the cells are folded in
+    // ascending order, so the sums are the plain loop's, bit for bit.
+    const auto fold = [&](int c, float v) {
+        const float4* w4 = reinterpret_cast<const float4*>(spt[c]);
+        const float4 w0 = w4[0], w1 = w4[1], w2 = w4[2];
+        acc[0] = fmaf(w0.x, v, acc[0]);  acc[1] = fmaf(w0.y, v, acc[1]);
+        acc[2] = fmaf(w0.z, v, acc[2]);  acc[3] = fmaf(w0.w, v, acc[3]);
+        acc[4] = fmaf(w1.x, v, acc[4]);  acc[5] = fmaf(w1.y, v, acc[5]);
+        acc[6] = fmaf(w1.z, v, acc[6]);  acc[7] = fmaf(w1.w, v, acc[7]);
+        acc[8] = fmaf(w2.x, v, acc[8]);  acc[9] = fmaf(w2.y, v, acc[9]);
+        acc[10] = fmaf(w2.z, v, acc[10]); acc[11] = fmaf(w2.w, v, acc[11]);
+    };
+    int c = 0;
+    // four cells at a time with their V loads issued together (the loop was one dependent load chain per cell);
+    // a group holding a masked cell (page -1, rare) leaves this loop and the scalar one below finishes the chunk.
+    for (; c + 4 <= n_here; c += 4) {
+        const long long r0 = srow[c], r1 = srow[c + 1], r2 = srow[c + 2], r3 = srow[c + 3];
+        if ((r0 | r1 | r2 | r3) < 0) break;
+        const float v0 = load_v1<KV_MODE>(p, r0, t), v1 = load_v1<KV_MODE>(p, r1, t);
+        const float v2 = load_v1<KV_MODE>(p, r2, t), v3 = load_v1<KV_MODE>(p, r3, t);
+        fold(c, v0);
+        fold(c + 1, v1);
+        fold(c + 2, v2);
+        fold(c + 3, v3);
+    }
+    for (; c < n_here; ++c) {
         if (srow[c] < 0) continue;   // masked above, weight 0
-        float v;
-        if constexpr (KV_MODE == 0) {
-            v = __half2float(__ushort_as_half(p.v_pool[srow[c] * HD + t]));
-        } else if constexpr (KV_MODE == 1) {
-            const float sc = __half2float(__ushort_as_half(p.v_scale[srow[c] * (HD / KV_Q8_GROUP) + t / KV_Q8_GROUP]));
-            v = (float) p.v_q[srow[c] * HD + t] * sc;
-        } else {   // modes 2 and 3: V is rotated Q4_0 (kv_q4.hpp); the caller rotates the output back
-            constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
-            const int b = t / QK4_0;
-            const int rem = t % QK4_0;
-            const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + srow[c] * bytes_per_head) + b;
-            const float d = __half2float(__ushort_as_half(blk->d));
-            const int j = rem < 16 ? rem : (rem - 16);
-            const uint8_t byte = blk->qs[j];
-            const int nibble = (rem < 16) ? ((byte & 0x0F) - 8) : ((byte >> 4) - 8);
-            v = (float) nibble * d;
-        }
-#pragma unroll
-        for (int h = 0; h < G; ++h) acc[h] = fmaf(sp[h][c], v, acc[h]);
+        fold(c, load_v1<KV_MODE>(p, srow[c], t));
     }
 #pragma unroll
     for (int h = 0; h < G; ++h) part_acc[((size_t) slot * G + h) * HD + t] = acc[h];

From 5fa9e7fba5d96657a9e939077d361cb20ce64346 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?K=C3=A1roly=20S=C3=A1rdi?= <skver@tuta.io>
Date: Fri, 2 Oct 2026 22:42:49 +0200
Subject: [PATCH 142/201] perf(volta): address review - keep BF16X2 remainder
 GEMMs on cuBLAS, keep Inf, share sq with spt, atomic cc cache

---
 src/kernels/cuda/qsa_decode_attn.cu | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/kernels/cuda/qsa_decode_attn.cu b/src/kernels/cuda/qsa_decode_attn.cu
index f508ec22c9d..1f98a9137db 100644
--- a/src/kernels/cuda/qsa_decode_attn.cu
+++ b/src/kernels/cuda/qsa_decode_attn.cu
@@ -145,10 +145,14 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
     part_acc += (size_t) blockIdx.z * (size_t) scratch_stride;
     part_m += (size_t) blockIdx.z * (size_t) scratch_stride;
     part_l += (size_t) blockIdx.z * (size_t) scratch_stride;
-    __shared__ __align__(16) float sq[G][HD];     // 12 KB: this KV head's query heads
+    __shared__ __align__(16) float sq[G][HD];     // 12 KB: this KV head's query heads (dead once the scores are done)
     __shared__ float sp[G][CHUNK];                // scores
-    __shared__ __align__(16) float spt[CHUNK][G]; // probabilities, cell-major: the value loop reads one cell's 12 as three float4
     __shared__ long long srow[CHUNK];             // pool row of each cell (page, kv head, slot)
+    // probabilities, cell-major: the value loop reads one cell's 12 as three float4.  They are first written after the
+    // __syncthreads that ends the score phase, the last reader of sq, so they share its storage (64 x 12 of its 256 x 12
+    // floats) and the block's shared memory stays what it was before the cell-major layout.
+    float (*const spt)[G] = reinterpret_cast<float (*)[G]>(&sq[0][0]);
+    static_assert(CHUNK * G <= G * HD, "spt must fit in sq");
     const int n_ids = __ldg(step + kStepWidth);
     const int chunk = blockIdx.x, kvh = blockIdx.y;
     const int t = threadIdx.x, lane = t & 31, warp = t >> 5;

From 8fb3c9168f88d96e57ad182c29ad228708f9fc7c Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:30:33 +0200
Subject: [PATCH 143/201] QSA attention: PR #540's kernel below sm_75 in the
 experimental build only

#540's attention kernel (bit-exact, +7% prompt on a V100) uses about twice the registers and also runs decode, so it
is not taken for every card: the kernel the ready-made engine runs is restored as it was, and #540's version lives
beside it as attn_chunk_kernel_pre75, compiled only with -DSTRATA_EXPERIMENTAL_SM60=ON and launched on a card below
sm_75 (per device; STRATA_ATTN_PRE75=0 is the A/B arm).  The launches pass cap/stride explicitly (the same 0, 0 as
the defaults) so either kernel can be picked through one pointer.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/kernels/cuda/qsa_decode_attn.cu | 161 +++++++++++++++++++++++++---
 1 file changed, 148 insertions(+), 13 deletions(-)

diff --git a/src/kernels/cuda/qsa_decode_attn.cu b/src/kernels/cuda/qsa_decode_attn.cu
index 1f98a9137db..f487c4f3e60 100644
--- a/src/kernels/cuda/qsa_decode_attn.cu
+++ b/src/kernels/cuda/qsa_decode_attn.cu
@@ -80,6 +80,112 @@ __device__ __forceinline__ void load8(const QsaAttnPools& p, bool value, long lo
     } else load8_q4(p, value, row, d0, out);
 }
 
+template <int KV_MODE>
+__global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __restrict__ q, QsaAttnPools p,
+                                                             const int32_t* __restrict__ ids,
+                                                             const int32_t* __restrict__ step, int n_kv_heads,
+                                                             int page_size, float scale, float* __restrict__ part_acc,
+                                                             float* __restrict__ part_m, float* __restrict__ part_l,
+                                                             int n_chunks, int cap = 0, long long scratch_stride = 0) {
+    // batched form: query blockIdx.z, with its own q row, selection, step and scratch
+    q += (size_t) blockIdx.z * (size_t) (n_kv_heads * G) * HD;
+    ids += (size_t) blockIdx.z * (size_t) cap;
+    step += (size_t) blockIdx.z * kStepCount;
+    part_acc += (size_t) blockIdx.z * (size_t) scratch_stride;
+    part_m += (size_t) blockIdx.z * (size_t) scratch_stride;
+    part_l += (size_t) blockIdx.z * (size_t) scratch_stride;
+    __shared__ __align__(16) float sq[G][HD];     // 12 KB: this KV head's query heads
+    __shared__ float sp[G][CHUNK];                // scores, then probabilities
+    __shared__ long long srow[CHUNK];             // pool row of each cell (page, kv head, slot)
+    const int n_ids = __ldg(step + kStepWidth);
+    const int chunk = blockIdx.x, kvh = blockIdx.y;
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
+    const int c0 = chunk * CHUNK;
+    const int n_here = min(CHUNK, n_ids - c0);
+    const int slot = kvh * n_chunks + chunk;
+    if (n_here <= 0) {
+        if (t < G) { part_m[slot * G + t] = -FLT_MAX; part_l[slot * G + t] = 0.0f; }
+        return;
+    }
+    for (int i = t; i < G * HD; i += THREADS) sq[i / HD][i % HD] = q[(size_t) (kvh * G) * HD + i];
+    if (t < CHUNK) {
+        long long r = -1;
+        if (t < n_here) {
+            const int cell = ids[c0 + t];
+            const long long page = (long long) p.page_table[cell / page_size];
+            // a block the KV streaming could not make resident keeps page -1 (ctl[3]); its cells are masked
+            // (score -FLT_MAX, weight 0) instead of being read from before the pool.
+            if (page >= 0) r = (page * n_kv_heads + kvh) * page_size + (cell % page_size);
+        }
+        srow[t] = r;
+    }
+    __syncthreads();
+    // scores: each warp takes cells warp, warp+8, ...; each lane holds 8 of the 256 dimensions.
+    for (int c = warp; c < CHUNK; c += WARPS) {
+        if (c >= n_here || srow[c] < 0) {
+            if (lane < G) sp[lane][c] = -FLT_MAX;
+            continue;
+        }
+        float k8[8];
+        load8<KV_MODE>(p, false, srow[c], lane * 8, k8);
+#pragma unroll
+        for (int h = 0; h < G; ++h) {
+            const float4 qa = *reinterpret_cast<const float4*>(&sq[h][lane * 8]);
+            const float4 qb = *reinterpret_cast<const float4*>(&sq[h][lane * 8 + 4]);
+            float s = k8[0] * qa.x + k8[1] * qa.y + k8[2] * qa.z + k8[3] * qa.w +
+                      k8[4] * qb.x + k8[5] * qb.y + k8[6] * qb.z + k8[7] * qb.w;
+            s = warp_sum(s);
+            if (lane == 0) sp[h][c] = s * scale;
+        }
+    }
+    __syncthreads();
+    // per-head chunk max and exp-sum: warp w handles heads w and w+8.
+    for (int h = warp; h < G; h += WARPS) {
+        const float a = sp[h][lane], b = sp[h][lane + 32];
+        const float m = warp_max(fmaxf(a, b));
+        const float ea = (lane < n_here && srow[lane] >= 0) ? __expf(a - m) : 0.0f;
+        const float eb = (lane + 32 < n_here && srow[lane + 32] >= 0) ? __expf(b - m) : 0.0f;
+        sp[h][lane] = ea;
+        sp[h][lane + 32] = eb;
+        const float l = warp_sum(ea + eb);
+        if (lane == 0) { part_m[slot * G + h] = m; part_l[slot * G + h] = l; }
+    }
+    __syncthreads();
+    // values: thread t owns dimension t for all 12 heads.
+    float acc[G];
+#pragma unroll
+    for (int h = 0; h < G; ++h) acc[h] = 0.0f;
+    for (int c = 0; c < n_here; ++c) {
+        if (srow[c] < 0) continue;   // masked above, weight 0
+        float v;
+        if constexpr (KV_MODE == 0) {
+            v = __half2float(__ushort_as_half(p.v_pool[srow[c] * HD + t]));
+        } else if constexpr (KV_MODE == 1) {
+            const float sc = __half2float(__ushort_as_half(p.v_scale[srow[c] * (HD / KV_Q8_GROUP) + t / KV_Q8_GROUP]));
+            v = (float) p.v_q[srow[c] * HD + t] * sc;
+        } else {   // modes 2 and 3: V is rotated Q4_0 (kv_q4.hpp); the caller rotates the output back
+            constexpr int bytes_per_head = (HD / QK4_0) * sizeof(block_q4_0);
+            const int b = t / QK4_0;
+            const int rem = t % QK4_0;
+            const block_q4_0* blk = reinterpret_cast<const block_q4_0*>(p.v_q4 + srow[c] * bytes_per_head) + b;
+            const float d = __half2float(__ushort_as_half(blk->d));
+            const int j = rem < 16 ? rem : (rem - 16);
+            const uint8_t byte = blk->qs[j];
+            const int nibble = (rem < 16) ? ((byte & 0x0F) - 8) : ((byte >> 4) - 8);
+            v = (float) nibble * d;
+        }
+#pragma unroll
+        for (int h = 0; h < G; ++h) acc[h] = fmaf(sp[h][c], v, acc[h]);
+    }
+#pragma unroll
+    for (int h = 0; h < G; ++h) part_acc[((size_t) slot * G + h) * HD + t] = acc[h];
+}
+
+// PR #540 (sskver): the same attention with fewer shuffles and less shared-memory traffic, bit for bit the kernel
+// above (same operands, same order); +7% prompt speed on a V100, where this kernel reads every prompt chunk.  It
+// uses more registers (80 vs 38 on sm_70), so it runs on cards below sm_75 only, and exists only in the experimental
+// build (-DSTRATA_EXPERIMENTAL_SM60=ON): the ready-made engine keeps exactly the kernel above.
+#if defined(STRATA_EXPERIMENTAL_SM60)
 // The 12 heads' lane sums (`part[12..15]` zero), reduce-scattered with warp_sum's pairing order (xor 16, 8, 4, 2, 1):
 // every output adds the same two operands at every level, so each sum is bit for bit warp_sum's (float add commutes),
 // for 16 shuffles instead of 12 x 5.  Lane l ends holding head head_of_lane(l); lanes l and l^1 agree.
@@ -132,7 +238,7 @@ __device__ __forceinline__ float load_v1(const QsaAttnPools& p, long long row, i
 }
 
 template <int KV_MODE>
-__global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __restrict__ q, QsaAttnPools p,
+__global__ void __launch_bounds__(THREADS) attn_chunk_kernel_pre75(const float* __restrict__ q, QsaAttnPools p,
                                                              const int32_t* __restrict__ ids,
                                                              const int32_t* __restrict__ step, int n_kv_heads,
                                                              int page_size, float scale, float* __restrict__ part_acc,
@@ -284,6 +390,7 @@ __global__ void __launch_bounds__(THREADS) attn_chunk_kernel(const float* __rest
 #pragma unroll
     for (int h = 0; h < G; ++h) part_acc[((size_t) slot * G + h) * HD + t] = acc[h];
 }
+#endif  // STRATA_EXPERIMENTAL_SM60
 
 __global__ void __launch_bounds__(HD) attn_merge_kernel(const float* __restrict__ part_acc,
                                                         const float* __restrict__ part_m,
@@ -310,6 +417,34 @@ __global__ void __launch_bounds__(HD) attn_merge_kernel(const float* __restrict_
     attn[(size_t) h * HD + d] = L > 0.0f ? acc / L : 0.0f;
 }
 
+#if defined(STRATA_EXPERIMENTAL_SM60)
+// the current device is below sm_75 (per device: a layer split can mix cards); STRATA_ATTN_PRE75=0 turns PR #540's
+// kernel off (A/B)
+bool pre75_attn() {
+    static const bool off = [] {
+        const char* e = std::getenv("STRATA_ATTN_PRE75");
+        return e != nullptr && e[0] == '0';
+    }();
+    static int cc[64] = {};
+    int dev = 0;
+    if (off) return false;
+    if (cudaGetDevice(&dev) != cudaSuccess || dev < 0 || dev >= 64) { cudaGetLastError(); return false; }
+    if (cc[dev] == 0) {
+        int major = 0, minor = 0;
+        if (cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev) != cudaSuccess ||
+            cudaDeviceGetAttribute(&minor, cudaDevAttrComputeCapabilityMinor, dev) != cudaSuccess) {
+            cudaGetLastError();
+            return false;
+        }
+        cc[dev] = 10 * major + minor;
+    }
+    return cc[dev] < 75;
+}
+#define STRATA_ATTN_CHUNK(M) (pre75_attn() ? attn_chunk_kernel_pre75<M> : attn_chunk_kernel<M>)
+#else
+#define STRATA_ATTN_CHUNK(M) attn_chunk_kernel<M>
+#endif
+
 }  // namespace
 
 void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int32_t* ids, const int32_t* steps,
@@ -332,16 +467,16 @@ void qsa_decode_attn_batch(const float* q, const QsaAttnPools& pools, const int3
     const dim3 grid((unsigned) n_chunks, (unsigned) s.n_head_kv, (unsigned) n_q);
     cudaStream_t st = (cudaStream_t) stream;
     if (kv_mode == 3)
-        attn_chunk_kernel<3><<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
+        STRATA_ATTN_CHUNK(3)<<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
                                                         scale, part_acc, part_m, part_l, n_chunks, (int) cap, stride);
     else if (kv_mode == 2)
-        attn_chunk_kernel<2><<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
+        STRATA_ATTN_CHUNK(2)<<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
                                                         scale, part_acc, part_m, part_l, n_chunks, (int) cap, stride);
     else if (kv_mode == 1)
-        attn_chunk_kernel<1><<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
+        STRATA_ATTN_CHUNK(1)<<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
                                                         scale, part_acc, part_m, part_l, n_chunks, (int) cap, stride);
     else
-        attn_chunk_kernel<0><<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
+        STRATA_ATTN_CHUNK(0)<<<grid, THREADS, 0, st>>>(q, pools, ids, steps, (int) s.n_head_kv, (int) s.page_size,
                                                         scale, part_acc, part_m, part_l, n_chunks, (int) cap, stride);
     attn_merge_kernel<<<dim3((unsigned) s.n_head, (unsigned) n_q), HD, 0, st>>>(part_acc, part_m, part_l, n_chunks,
                                                                                   attn, stride);
@@ -380,17 +515,17 @@ void qsa_decode_attn_step(const float* q, const QsaAttnPools& pools, const int32
     const dim3 grid((unsigned) n_chunks, (unsigned) s.n_head_kv);
     cudaStream_t st = (cudaStream_t) stream;
     if (kv_mode == 3)
-        attn_chunk_kernel<3><<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
-                                                        scale, part_acc, part_m, part_l, n_chunks);
+        STRATA_ATTN_CHUNK(3)<<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
+                                                        scale, part_acc, part_m, part_l, n_chunks, 0, 0);
     else if (kv_mode == 2)
-        attn_chunk_kernel<2><<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
-                                                        scale, part_acc, part_m, part_l, n_chunks);
+        STRATA_ATTN_CHUNK(2)<<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
+                                                        scale, part_acc, part_m, part_l, n_chunks, 0, 0);
     else if (kv_mode == 1)
-        attn_chunk_kernel<1><<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
-                                                        scale, part_acc, part_m, part_l, n_chunks);
+        STRATA_ATTN_CHUNK(1)<<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
+                                                        scale, part_acc, part_m, part_l, n_chunks, 0, 0);
     else
-        attn_chunk_kernel<0><<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
-                                                        scale, part_acc, part_m, part_l, n_chunks);
+        STRATA_ATTN_CHUNK(0)<<<grid, THREADS, 0, st>>>(q, pools, ids, step, (int) s.n_head_kv, (int) s.page_size,
+                                                        scale, part_acc, part_m, part_l, n_chunks, 0, 0);
     attn_merge_kernel<<<(unsigned) s.n_head, HD, 0, st>>>(part_acc, part_m, part_l, n_chunks, attn);
     const cudaError_t e = cudaGetLastError();
     if (e != cudaSuccess) {

From 1a3ee381a3bbd4ac6f9126d2b8d19b1b6dad2e9a Mon Sep 17 00:00:00 2001
From: rwkeyes <86691029+rwkeyes@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:31:16 +0200
Subject: [PATCH 144/201] router lookahead: an AVX1 dot and a plain fallback
 for CPUs without AVX2 (Strata_Dirigo)

The routing-aware prefetch's router dot (bf16_rows_dot_multi) lives in kq_avx2.cpp, so an AVX-only
CPU started fine and died on the first request (SIGILL in vpmovzxwd on a Xeon E5-2687W). It now
takes the AVX2 kernel where the CPU has AVX2, kq_avx1.cpp's AVX dot (mul + add, 128-bit integer
widening) where it has AVX, and the same sums in plain C++ below that. cpu_avx1_ok() probes AVX +
OSXSAVE + the YMM state. An estimate only (which experts to prefetch). A CPU with AVX2 runs exactly
what it ran before.

From rwkeyes' Strata_Dirigo fork (MIT; 0d00a66, e0754d3), with MSVC's /arch:AVX added and
__builtin_memcpy replaced by std::memcpy for MSVC.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                               |  6 +-
 include/strata/kernels/cpu/expert_layout.hpp |  2 +
 include/strata/kernels/cpu/kq_avx1.hpp       | 18 +++++
 src/core/expert_source.cpp                   | 32 ++++++++-
 src/kernels/cpu/expert_layout.cpp            | 25 +++++++
 src/kernels/cpu/kq_avx1.cpp                  | 71 ++++++++++++++++++++
 6 files changed, 151 insertions(+), 3 deletions(-)
 create mode 100644 include/strata/kernels/cpu/kq_avx1.hpp
 create mode 100644 src/kernels/cpu/kq_avx1.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 347d2ec7ca2..5b56e2b917c 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -888,17 +888,21 @@ if(STRATA_NATIVE_EXPERTS)
   # part of strata_kernels_cpu (the pool calls these and they call its CPU probe: one library, so GNU ld's
   # one-pass static linking has no cycle to resolve)
   target_sources(strata_kernels_cpu PRIVATE src/kernels/cpu/native_expert.cpp src/kernels/cpu/iq_avx512.cpp
-                                           src/kernels/cpu/iq_avx2.cpp src/kernels/cpu/kq_avx2.cpp)
+                                           src/kernels/cpu/iq_avx2.cpp src/kernels/cpu/kq_avx2.cpp
+                                           src/kernels/cpu/kq_avx1.cpp)
   target_include_directories(strata_kernels_cpu PRIVATE third_party/ggml)
   if(MSVC)
     set_source_files_properties(src/kernels/cpu/iq_avx512.cpp PROPERTIES COMPILE_OPTIONS "/arch:AVX512")
     set_source_files_properties(src/kernels/cpu/iq_avx2.cpp PROPERTIES COMPILE_OPTIONS "/arch:AVX2")
     set_source_files_properties(src/kernels/cpu/kq_avx2.cpp PROPERTIES COMPILE_OPTIONS "/arch:AVX2")
+    # the router lookahead's AVX1 dot (older CPUs; called behind cpu_avx1_ok): no FMA, no 256-bit integer ops
+    set_source_files_properties(src/kernels/cpu/kq_avx1.cpp PROPERTIES COMPILE_OPTIONS "/arch:AVX")
   else()
     set_source_files_properties(src/kernels/cpu/iq_avx512.cpp PROPERTIES COMPILE_OPTIONS
                                 "-mavx512f;-mavx512bw;-mavx512vl;-mavx512dq;-mavx512vnni;-mavx512vbmi;-mf16c;-mfma")
     set_source_files_properties(src/kernels/cpu/iq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
     set_source_files_properties(src/kernels/cpu/kq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
+    set_source_files_properties(src/kernels/cpu/kq_avx1.cpp PROPERTIES COMPILE_OPTIONS "-mavx")
   endif()
   target_link_libraries(strata_kernels_cpu PUBLIC ggml-cpu ggml-base)
   target_compile_definitions(strata_kernels_cpu PUBLIC STRATA_NATIVE_EXPERTS=1)
diff --git a/include/strata/kernels/cpu/expert_layout.hpp b/include/strata/kernels/cpu/expert_layout.hpp
index 540ccabdb39..990ec078500 100644
--- a/include/strata/kernels/cpu/expert_layout.hpp
+++ b/include/strata/kernels/cpu/expert_layout.hpp
@@ -47,6 +47,8 @@ bool cpu_avx512_ok();
 /// Whether this CPU (and its OS) runs the AVX2 kernels (AVX, AVX2, FMA, F16C): the floor of every expert kernel
 /// (q2_avx2.cpp, iq_avx2.cpp, and ggml-cpu in the portable build).  STRATA_FORCE_AVX2 does not change it.
 bool cpu_avx2_ok();
+/// Whether this CPU (and its OS) runs AVX (Sandy Bridge and newer): the AVX1 router dot (kq_avx1.cpp).
+bool cpu_avx1_ok();
 /// Whether a native pack's layer of this ggml type runs on Strata's own Q2_0 kernels (AVX2 / AVX-512).  On a
 /// CPU without AVX2 (a native, non-portable build: ggml-cpu compiled for this CPU's SSE) a Q2_0 layer takes
 /// ggml-cpu's own Q2_0 vec_dot like every other native type: slower, but it runs.
diff --git a/include/strata/kernels/cpu/kq_avx1.hpp b/include/strata/kernels/cpu/kq_avx1.hpp
new file mode 100644
index 00000000000..c9afc3f83b9
--- /dev/null
+++ b/include/strata/kernels/cpu/kq_avx1.hpp
@@ -0,0 +1,18 @@
+// include/strata/kernels/cpu/kq_avx1.hpp - the AVX1 router dot for older CPUs (from the Strata_Dirigo fork).
+//
+// bf16_rows_dot_multi (kq_avx2.cpp) is compiled with -mavx2 and uses instructions an AVX-only CPU does
+// not have (`vpmovzxwd`, `vfmadd`), so an AVX-only host cannot call it at all.  This is the same
+// arithmetic on AVX1 instructions: 8 float lanes per token, one weight stream per row shared by all
+// `nt` tokens, one horizontal sum per (row, token).  AVX1 has no FMA, so the multiply and the add stay
+// separate; it has no 256-bit integer ops, so the bf16 -> f32 widening runs in 128-bit halves.
+#pragma once
+
+#include <cstdint>
+
+namespace strata::kernels::cpu {
+
+/// Mirrors bf16_rows_dot_multi's arithmetic (same accumulation shape, mul+add instead of FMA).
+/// Requires cols % 8 == 0 and nt <= 8, exactly like the AVX2 kernel it stands in for.
+void bf16_rows_dot_multi_avx1(const uint16_t* w, int rows, int cols, const float* x, int nt, float* out);
+
+}  // namespace strata::kernels::cpu
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index 3cbb71dd15a..3e395109791 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -10,6 +10,7 @@
 #include "strata/kernels/elementwise.hpp"
 #include "strata/kernels/quantize_act.hpp"
 #include "strata/kernels/s2_expert_grouped.hpp"
+#include "strata/kernels/cpu/kq_avx1.hpp"
 #include "strata/kernels/cpu/kq_avx2.hpp"
 
 #include <cuda_runtime.h>
@@ -1219,8 +1220,35 @@ void RouterLookahead::run() {
         }
         const auto t0 = std::chrono::steady_clock::now();
         want.clear();
-        strata::kernels::cpu::bf16_rows_dot_multi(routers_[(size_t) layer].data(), (int) n_expert_, (int) n_embd_,
-                                                  x_.data(), (int) nt, logits.data());
+        // The router dot is AVX2 (kq_avx2.cpp); a CPU without AVX2 (the experimental older-CPU builds) takes the AVX1
+        // one (kq_avx1.cpp) or, without AVX, the same sums in plain C++.  From the Strata_Dirigo fork (rwkeyes): an
+        // AVX-only Xeon E5-2687W died here (vpmovzxwd) on its first request.  An estimate only (which experts to
+        // prefetch); the order of the additions differs between the three, the output does not depend on it.
+        if (strata::kernels::cpu::cpu_avx2_ok()) {
+            strata::kernels::cpu::bf16_rows_dot_multi(routers_[(size_t) layer].data(), (int) n_expert_, (int) n_embd_,
+                                                      x_.data(), (int) nt, logits.data());
+        } else if (strata::kernels::cpu::cpu_avx1_ok()) {
+            strata::kernels::cpu::bf16_rows_dot_multi_avx1(routers_[(size_t) layer].data(), (int) n_expert_,
+                                                           (int) n_embd_, x_.data(), (int) nt, logits.data());
+        } else {
+            // a mul and an add, not std::fma: without an FMA instruction that is a libm call per element (74x
+            // slower on a Xeon E5-2665, measured by the fork)
+            const uint16_t* rw = routers_[(size_t) layer].data();
+            for (int64_t r = 0; r < n_expert_; ++r) {
+                const uint16_t* wr = rw + (size_t) r * (size_t) n_embd_;
+                for (int64_t t = 0; t < nt; ++t) {
+                    const float* xr = x_.data() + (size_t) t * (size_t) n_embd_;
+                    float acc = 0.0f;
+                    for (int64_t c = 0; c < n_embd_; ++c) {
+                        const uint32_t bits = (uint32_t) wr[c] << 16;
+                        float wf;
+                        std::memcpy(&wf, &bits, sizeof wf);
+                        acc += wf * xr[c];
+                    }
+                    logits[(size_t) t * (size_t) n_expert_ + (size_t) r] = acc;
+                }
+            }
+        }
         for (int64_t t = 0; t < nt; ++t) {
             const float* lt = logits.data() + (size_t) (t * n_expert_);
             for (int64_t e = 0; e < n_expert_; ++e) order[(size_t) e] = (int32_t) e;
diff --git a/src/kernels/cpu/expert_layout.cpp b/src/kernels/cpu/expert_layout.cpp
index 4583b1077c2..1eb585b7750 100644
--- a/src/kernels/cpu/expert_layout.cpp
+++ b/src/kernels/cpu/expert_layout.cpp
@@ -85,6 +85,31 @@ bool cpu_avx2_ok() {
     return ok;
 }
 
+bool cpu_avx1_ok() {
+    // AVX (Sandy Bridge, 2011): AVX + OSXSAVE with the OS saving the YMM state; FMA, F16C and AVX2 not needed.
+    // From the Strata_Dirigo fork (rwkeyes).
+    static const bool ok = [] {
+        unsigned r[4] = {0, 0, 0, 0};
+#if defined(_MSC_VER)
+        int x[4];
+        __cpuidex(x, 1, 0);
+        for (int i = 0; i < 4; ++i) r[i] = (unsigned) x[i];
+#else
+        __cpuid_count(1, 0, r[0], r[1], r[2], r[3]);
+#endif
+        if (!((r[2] >> 27) & 1u) || !((r[2] >> 28) & 1u)) return false;   // OSXSAVE, AVX
+#if defined(_MSC_VER)
+        const unsigned long long xcr0 = _xgetbv(0);
+#else
+        unsigned lo = 0, hi = 0;
+        __asm__ volatile("xgetbv" : "=a"(lo), "=d"(hi) : "c"(0));
+        const unsigned long long xcr0 = ((unsigned long long) hi << 32) | lo;
+#endif
+        return (xcr0 & 0x6) == 0x6;
+    }();
+    return ok;
+}
+
 std::string cpu_name() {
     unsigned r[12] = {};
 #if defined(_MSC_VER)
diff --git a/src/kernels/cpu/kq_avx1.cpp b/src/kernels/cpu/kq_avx1.cpp
new file mode 100644
index 00000000000..fbdf73f40f3
--- /dev/null
+++ b/src/kernels/cpu/kq_avx1.cpp
@@ -0,0 +1,71 @@
+// src/kernels/cpu/kq_avx1.cpp - the AVX1 router dot for older CPUs (see kq_avx1.hpp).  From rwkeyes' Strata_Dirigo
+// fork (MIT), its AVX1 floor.
+//
+// Measured on the hardware this exists for (Xeon E5-2665, 2x8 cores, AVX only) for one layer's router
+// [512 experts x 5120 embeddings]: the scalar std::fma fallback it replaces took 362 ms/layer, a scalar
+// mul+add 4.9 ms, and this kernel 2.6 ms - 137x, with no extra memory (the weights stay bf16).
+//
+// Compiled for AVX (/arch:AVX, -mavx; CMakeLists.txt sets that per source); it is only ever called behind
+// cpu_avx1_ok(), so no CPU that lacks AVX can reach it.
+#include "strata/kernels/cpu/kq_avx1.hpp"
+
+#include <immintrin.h>
+
+#include <cstring>
+
+#if !defined(__AVX__)
+#error "kq_avx1.cpp must be compiled with AVX enabled (see the per-source flags in CMakeLists.txt)"
+#endif
+
+namespace strata::kernels::cpu {
+namespace {
+
+// 8 floats -> one float, the same reduction order the AVX2 kernel's hsum_float_8 uses.
+inline float hsum_float_8_avx1(__m256 v) {
+    __m128 lo = _mm256_castps256_ps128(v);
+    __m128 hi = _mm256_extractf128_ps(v, 1);
+    lo = _mm_add_ps(lo, hi);
+    lo = _mm_add_ps(lo, _mm_movehl_ps(lo, lo));
+    lo = _mm_add_ss(lo, _mm_shuffle_ps(lo, lo, 0x55));
+    return _mm_cvtss_f32(lo);
+}
+
+// 8 bf16 -> 8 f32: a bf16 is the top half of its f32, so widen in 128-bit halves (AVX1 has no
+// 256-bit integer ops) and shift each 32-bit lane into the high half.
+inline __m256 bf16x8_to_f32x8_avx1(const uint16_t* p) {
+    const __m128i v = _mm_loadu_si128((const __m128i*) p);
+    const __m128i z = _mm_setzero_si128();
+    const __m128 lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_unpacklo_epi16(v, z), 16));
+    const __m128 hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_unpackhi_epi16(v, z), 16));
+    return _mm256_insertf128_ps(_mm256_castps128_ps256(lo), hi, 1);
+}
+
+}  // namespace
+
+void bf16_rows_dot_multi_avx1(const uint16_t* w, int rows, int cols, const float* x, int nt, float* out) {
+    // each row is read once for all `nt` (<= 8) tokens, exactly as the AVX2 kernel does
+    for (int r = 0; r < rows; ++r) {
+        const uint16_t* wr = w + (size_t) r * (size_t) cols;
+        __m256 acc[8];
+        for (int t = 0; t < nt; ++t) acc[t] = _mm256_setzero_ps();
+        int c = 0;
+        for (; c + 8 <= cols; c += 8) {
+            const __m256 wf = bf16x8_to_f32x8_avx1(wr + c);
+            for (int t = 0; t < nt; ++t) {
+                const __m256 xv = _mm256_loadu_ps(x + (size_t) t * (size_t) cols + c);
+                acc[t] = _mm256_add_ps(acc[t], _mm256_mul_ps(wf, xv));   // no FMA on AVX1: mul, then add
+            }
+        }
+        for (int t = 0; t < nt; ++t) {
+            float s = hsum_float_8_avx1(acc[t]);
+            for (; c < cols; ++c) {                                      // cols % 8 != 0 tail (cols % 8 == 0 today)
+                const uint32_t bits = (uint32_t) wr[c] << 16;
+                float wf; std::memcpy(&wf, &bits, sizeof wf);
+                s += wf * x[(size_t) t * (size_t) cols + c];
+            }
+            out[(size_t) t * (size_t) rows + r] = s;
+        }
+    }
+}
+
+}  // namespace strata::kernels::cpu

From 4d79aea5c076b172b5ff1e02f7280fb2226d6659 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 15:51:29 +0300
Subject: [PATCH 145/201] hip: AMD gfx906 (Instinct MI50 / MI60, Radeon VII;
 wave64) as an opt-in build, STRATA_HIP_GFX906=ON

The HIP backend (STRATA_ENABLE_HIP) is wave32 RDNA only, and the engine refuses a wave64 card. This adds a
separate opt-in build for gfx906: the CUDA sources compiled as HIP through a small compat layer, with a CUDA warp
as a logical half of the 64-lane wavefront. With the option off nothing changes for CUDA or the RDNA backend;
every new code path is under STRATA_HIP_GFX906.

Build: -DSTRATA_HIP_GFX906=ON -DCMAKE_HIP_ARCHITECTURES=gfx906 (implies STRATA_ENABLE_CUDA's targets, refuses
STRATA_ENABLE_HIP). The CUDA runtime/cuBLAS names come from include/strata/platform/hip_compat/ (first on the
include path), CUDA::cudart / CUDA::cublas become aliases of hip::host / roc::hipblas, every .cu (and the ggml MMQ
sources, with GGML_USE_HIP) is compiled as HIP. The native kernels' --use_fast_math (an nvcc flag) is not passed.

Correctness fixes found on the way (each one changed results or hung, not only speed):
- __fmul_rn / __fadd_rn / __fsub_rn contracted into FMA under HIP; they no longer do (as on NVIDIA) - the
  elementwise and quantize_act parity tests pass bitwise;
- the device check of the gfx906 build reads the card's gcnArchName (the wave32 check is the RDNA backend's);
- ggml MMQ got NVIDIA compute capability 9.0 for gfx906 and hung the prompt path; it gets the AMD arch code;
- __byte_perm is a scratch-memory array in HIP: the IQ4 table lookup uses llama.cpp's v_perm_b32 sequence
  (agent-request decode 29.9 -> 39.2 tok/s on 2x MI50);
- the stage profiler's wall clock runs at 25 MHz on gfx906, not 100 MHz;
- a CUDA toolkit-mismatch check that reads CUDART_VERSION is skipped (no CUDART_VERSION under HIP);
- gdn_rec_parity (cp.async, CUDA occupancy API) is not built for gfx906.

wave64 kernels (gfx906 only; the CUDA layout stays one env switch away for A/B, every one bitwise-checked):
- grouped native experts, STRATA_EXP_MODE=7 (default): gfx906 has no packed byte SIMD, so __vcmpne4/__vsub4
  became ~12 word ops each; signs are now dp4a(g ^ m, u) - dp4a(m, u) (exact in integers), grids and the group's
  activations sit in LDS, one weight load serves every token of the group. Same k-to-lane order, so the output is
  bitwise the old layout's (native_expert_bench, real GGUF rows). Verify window 60.0 -> 51.3 ms.
  STRATA_EXP_MODE=2 is the previous layout;
- MMVQ: one wavefront per row with a 64-lane butterfly, no LDS/barrier, same kernel for 1..8 columns
  (+2.3% decode; STRATA_MMVQ_WAVE=0: CUDA layout);
- router top-10 in one wavefront (register argmax, no block barriers), bit-identical (router_top10_parity);
- gr_down_multi split along K (8 rows x 5 slices of 2048 per block, fixed-order finish) (+2.9%;
  STRATA_GR_SPLIT=0: old);
- hyper-connection read: norm with its loads in flight and xn in registers, up with 8 lanes per row
  (51.3 -> 50.2 ms per window; STRATA_GR_FAST=0: old);
- the QSA prompt-attention tensor-core/WMMA kernels are not used on gfx906 (the FP32 kernel runs).

Benches (not ctest; they need a model shard): native_expert_bench (one expert layout against another, bitwise,
with timings) and fused_gr_bench (the fast hyper-connection kernels against the old ones).
---
 .gitignore                                    |   1 +
 CMakeLists.txt                                |  66 +-
 include/strata/kernels/dp4a.hpp               |   3 +
 include/strata/kernels/fused_gr.hpp           |   2 +
 include/strata/kernels/iq_kernels.hpp         |   3 +
 include/strata/kernels/mrope.hpp              |   3 +
 .../strata/platform/hip_compat/cublas_v2.h    |  26 +
 .../strata/platform/hip_compat/cuda_fp16.h    |   2 +
 .../strata/platform/hip_compat/cuda_runtime.h |   2 +
 .../platform/hip_compat/math_constants.h      |   4 +
 .../strata/platform/hip_compat/strata_hip.h   | 295 ++++++++
 src/core/device.cu                            |  14 +-
 src/kernels/cuda/fused_gr.cu                  | 248 +++++++
 src/kernels/cuda/iq_kernels.cu                | 654 +++++++++++++++++-
 src/kernels/cuda/native_mmvq.cu               |  91 +++
 src/kernels/cuda/qsa_prompt_attn.cu           |   3 +
 src/kernels/cuda/router_top10.cu              |  96 +++
 src/kernels/cuda/verify_kernels.cu            |   4 +-
 src/kernels/fused_gr_bench.cpp                | 116 ++++
 src/kernels/native_expert_bench.cpp           | 170 +++++
 src/prefill/moe_fused.cu                      |   6 +
 src/prefill/moe_fused_iq.cu                   |   8 +
 src/program/generate.cpp                      |   2 +
 23 files changed, 1810 insertions(+), 9 deletions(-)
 create mode 100644 include/strata/platform/hip_compat/cublas_v2.h
 create mode 100644 include/strata/platform/hip_compat/cuda_fp16.h
 create mode 100644 include/strata/platform/hip_compat/cuda_runtime.h
 create mode 100644 include/strata/platform/hip_compat/math_constants.h
 create mode 100644 include/strata/platform/hip_compat/strata_hip.h
 create mode 100644 src/kernels/fused_gr_bench.cpp
 create mode 100644 src/kernels/native_expert_bench.cpp

diff --git a/.gitignore b/.gitignore
index cb6477db40f..36a0ce6b37d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -50,4 +50,5 @@ build-vision.bat
 *.done
 /third_party/*.zip
 
+/.ccache/
 /.rocm-win/
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 7e9017cf3b8..68f636d6c6f 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -33,6 +33,18 @@ if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES)
 endif()
 
 option(STRATA_ENABLE_CUDA "Build the CUDA targets (Phase 2+)" OFF)
+# AMD gfx906 (MI50, wave64): the same .cu sources compiled as HIP through the gfx906 compat layer.  The CUDA runtime and
+# cuBLAS names are mapped by the headers in include/strata/platform/hip_compat/, which go first on the include path,
+# and CUDA::cudart / CUDA::cublas become aliases of HIP's targets, so every CUDA target below stays as it is.  This is
+# separate from STRATA_ENABLE_HIP (the wave32 RDNA backend): with it on, STRATA_ENABLE_CUDA is on and
+# STRATA_ENABLE_HIP stays off, so every "CUDA" branch of the tree is the one taken.
+option(STRATA_HIP_GFX906 "Build the CUDA targets for AMD gfx906 through HIP (wave64 compat layer)" OFF)
+if(STRATA_HIP_GFX906)
+  if(STRATA_ENABLE_HIP)
+    message(FATAL_ERROR "STRATA_HIP_GFX906 and STRATA_ENABLE_HIP are separate backends; enable only one")
+  endif()
+  set(STRATA_ENABLE_CUDA ON CACHE BOOL "" FORCE)
+endif()
 option(STRATA_ENABLE_HIP "Build the HIP targets for wave32 AMD GPUs (gfx1100, gfx1201; gfx1030 unvalidated)" OFF)
 option(STRATA_PREFILL_MMQ "Build the optional GGML MMQ prefill path for HIP" OFF)
 # CUDA: MMQ prompt kernels for Q4_K / Q5_K / Q5_1 (Unsloth's UD-Q4_K_XL experts).  Off by default: the engine loads
@@ -43,7 +55,7 @@ option(STRATA_ORCA_Q4KS_MMQ "Build the GGML Q5_0 MMQ instance for OrcaRouter Q4_
 if(STRATA_PREFILL_MMQ AND NOT STRATA_ENABLE_HIP)
   message(FATAL_ERROR "STRATA_PREFILL_MMQ requires STRATA_ENABLE_HIP=ON")
 endif()
-if(STRATA_ENABLE_CUDA AND STRATA_ENABLE_HIP)
+if(STRATA_ENABLE_CUDA AND STRATA_ENABLE_HIP AND NOT STRATA_HIP_GFX906)
   message(FATAL_ERROR "STRATA_ENABLE_CUDA and STRATA_ENABLE_HIP are separate backends; enable only one")
 endif()
 if(STRATA_ENABLE_HIP)
@@ -68,7 +80,27 @@ if(STRATA_BUILD_CONVERSATION_TESTS)
   add_test(NAME conversation_memory_test COMMAND conversation_memory_test)
 endif()
 
-if(STRATA_ENABLE_CUDA)
+if(STRATA_HIP_GFX906)
+  if(NOT DEFINED CMAKE_HIP_ARCHITECTURES)
+    set(CMAKE_HIP_ARCHITECTURES gfx906 CACHE STRING "HIP architectures" FORCE)
+  endif()
+  enable_language(HIP)
+  find_package(hip REQUIRED)
+  find_package(hipblas REQUIRED)
+  add_library(CUDA::cudart INTERFACE IMPORTED)
+  target_link_libraries(CUDA::cudart INTERFACE hip::host)
+  target_compile_definitions(CUDA::cudart INTERFACE STRATA_HIP_GFX906=1 __HIP_PLATFORM_AMD__=1)
+  target_include_directories(CUDA::cudart BEFORE INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/include/strata/platform/hip_compat)
+  add_library(CUDA::cublas INTERFACE IMPORTED)
+  target_link_libraries(CUDA::cublas INTERFACE roc::hipblas CUDA::cudart)
+  set(CMAKE_CUDA_TOOLKIT_INCLUDE_DIRECTORIES ${CMAKE_CURRENT_SOURCE_DIR}/include/strata/platform/hip_compat)
+  include_directories(BEFORE ${CMAKE_CURRENT_SOURCE_DIR}/include/strata/platform/hip_compat)
+  add_compile_definitions(STRATA_HIP_GFX906=1)
+  message(STATUS "Strata: HIP (gfx906 compat) enabled, arch ${CMAKE_HIP_ARCHITECTURES}")
+  set(_strata_gpu_runtime_target CUDA::cudart)
+  set(_strata_gpu_blas_target CUDA::cublas)
+  set(_strata_gpu_include_directories ${CMAKE_CUDA_TOOLKIT_INCLUDE_DIRECTORIES})
+elseif(STRATA_ENABLE_CUDA)
   # #585: CMake links CUDA code with the STATIC runtime by default, and the targets below also link CUDA::cudart (the
   # DLL's import library).  MSVC with a CUDA 12.x toolkit - the experimental Pascal/Volta build - then fails with
   # LNK1169 (every cudart symbol defined twice); GNU ld lets it pass.  That build links the shared runtime alone.  The
@@ -321,7 +353,7 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
       src/kernels/cuda/native_flash_attn.cu
       src/kernels/cuda/native_qsa_indexer.cu
       src/kernels/cuda/native_qsa_score.cu
-      PROPERTIES COMPILE_OPTIONS "--use_fast_math")
+      PROPERTIES COMPILE_OPTIONS "$<IF:$<BOOL:${STRATA_HIP_GFX906}>,,--use_fast_math>")
   elseif(STRATA_ENABLE_HIP)
     # Keep Q8_K's multiply and magic-bias rounding as separate FP32 operations on HIP; contraction to an
     # FMA changes tie results. The embedding gather also relies on separately rounded operations.
@@ -584,8 +616,8 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   target_link_libraries(iq_multi_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_test(NAME iq_multi_parity COMMAND iq_multi_parity)
   # the prompt path's DeltaNet recurrence: gdn_rec_kh_kernel against gdn_rec_cols_pipe_kernel, bitwise (GPU,
-  # synthetic, no model; --bench adds timings)
-  if(STRATA_ENABLE_CUDA)
+  # synthetic, no model; --bench adds timings).  NVIDIA only: cp.async and the CUDA occupancy API (not on gfx906)
+  if(STRATA_ENABLE_CUDA AND NOT STRATA_HIP_GFX906)
     add_executable(gdn_rec_parity src/prefill/gdn_rec_parity.cu)
     target_link_libraries(gdn_rec_parity PRIVATE ${_strata_gpu_runtime_target})
     add_test(NAME gdn_rec_parity COMMAND gdn_rec_parity)
@@ -606,6 +638,9 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   target_link_libraries(shared_expert_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_test(NAME shared_expert_parity COMMAND shared_expert_parity --selftest)
 
+  add_executable(fused_gr_bench src/kernels/fused_gr_bench.cpp)
+  target_include_directories(fused_gr_bench PRIVATE ${_strata_gpu_include_directories})
+  target_link_libraries(fused_gr_bench PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_executable(gr_parity src/kernels/gr_parity.cpp)
   target_include_directories(gr_parity PRIVATE ${_strata_gpu_include_directories})
   target_link_libraries(gr_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
@@ -654,6 +689,12 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   target_include_directories(router_top10_parity PRIVATE ${_strata_gpu_include_directories})
   target_link_libraries(router_top10_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_test(NAME router_top10_parity COMMAND router_top10_parity --selftest)
+  if(STRATA_HIP_GFX906)
+    # the S6 router (STRATA_HIP_ROUTER_FAST=1 on gfx906) against the portable kernel, bitwise, on wave64
+    add_executable(hip_router_fast tests/hip/router_fast.cpp)
+    target_include_directories(hip_router_fast PRIVATE ${_strata_gpu_include_directories})
+    target_link_libraries(hip_router_fast PRIVATE strata_kernels ${_strata_gpu_runtime_target})
+  endif()
 
   add_executable(s_gemv_parity src/kernels/s_gemv_parity.cpp)
   target_include_directories(s_gemv_parity PRIVATE ${_strata_gpu_include_directories})
@@ -1024,6 +1065,9 @@ if(STRATA_NATIVE_EXPERTS)
     add_executable(native_expert_parity src/kernels/native_expert_parity.cpp)
     target_include_directories(native_expert_parity PRIVATE ${_strata_gpu_include_directories})
     target_link_libraries(native_expert_parity PRIVATE strata_kernels strata_kernels_cpu strata_artifact ${_strata_gpu_runtime_target})
+    add_executable(native_expert_bench src/kernels/native_expert_bench.cpp)
+    target_include_directories(native_expert_bench PRIVATE ${_strata_gpu_include_directories})
+    target_link_libraries(native_expert_bench PRIVATE strata_kernels strata_kernels_cpu strata_artifact ${_strata_gpu_runtime_target})
     if(STRATA_BUILD_TESTS AND STRATA_ENABLE_CUDA)
       # Unsloth UD-Q4_K_XL's three expert pairs (and Q8_0 alone, its embedding) on synthetic ggml-quantized weights
       # at 2560/640: GPU and CPU experts against the float reference, GPU dequantizers against to_float.
@@ -1106,3 +1150,15 @@ if(STRATA_BUILD_TESTS)
     add_subdirectory(tests)
   endif()
 endif()
+
+# ---- HIP gfx906: every CUDA source of the tree (and the ggml-cuda MMQ sources) is compiled as HIP ----
+if(STRATA_HIP_GFX906)
+  file(GLOB_RECURSE _strata_cu CONFIGURE_DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/src/*.cu ${CMAKE_CURRENT_SOURCE_DIR}/bench/micro/*.cu
+       ${CMAKE_CURRENT_SOURCE_DIR}/tools/vision/*.cu)
+  if(_strata_mmq)
+    file(GLOB _strata_mmq_cu ${_strata_mmq}/*.cu ${_strata_mmq}/template-instances/*.cu)
+    list(APPEND _strata_cu ${_strata_mmq_cu})
+    target_compile_definitions(strata_mmq PRIVATE GGML_USE_HIP)
+  endif()
+  set_source_files_properties(${_strata_cu} PROPERTIES LANGUAGE HIP)
+endif()
diff --git a/include/strata/kernels/dp4a.hpp b/include/strata/kernels/dp4a.hpp
index cbca6a9aa55..e73be4d15f3 100644
--- a/include/strata/kernels/dp4a.hpp
+++ b/include/strata/kernels/dp4a.hpp
@@ -19,6 +19,9 @@
 #pragma once
 
 #include <cstdint>
+#if defined(STRATA_HIP_GFX906)
+#include <cuda_runtime.h>   // gfx906: the compat layer (__forceinline__, __nanosleep, __dp4a)
+#endif
 
 #if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 610
 __device__ __forceinline__ int strata_dp4a(const int a, const int b, const int c) {
diff --git a/include/strata/kernels/fused_gr.hpp b/include/strata/kernels/fused_gr.hpp
index 40eff30f287..b5f95fcb94c 100644
--- a/include/strata/kernels/fused_gr.hpp
+++ b/include/strata/kernels/fused_gr.hpp
@@ -49,6 +49,8 @@ constexpr int kFusedGrMaxT = 8;
 void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, void* stream,
                          unsigned long long* stamp_buf = nullptr, int stamp_i0 = 0);
 
+/// The bench only: the AMD latency-hidden kernels on (1) or off (0); -1 = STRATA_GR_FAST.
+void fused_gr_set_fast(int on);
 /// The multi read's variants (#315; not main's opt-in STRATA_GR_V3 read, which sums in another order), all computing
 /// every output with the plain read's operations in its order, so bitwise the plain read's and the single-token
 /// read's: plain (0.1.31's default: the norm one block per token, the down projection on 41 blocks), split (the norm
diff --git a/include/strata/kernels/iq_kernels.hpp b/include/strata/kernels/iq_kernels.hpp
index 56c0d65e7b8..2c38f6f98d6 100644
--- a/include/strata/kernels/iq_kernels.hpp
+++ b/include/strata/kernels/iq_kernels.hpp
@@ -68,6 +68,9 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
 /// (native_grouped_parity checks it); kept for A/B timing.  Set before graph capture; captured graphs keep theirs.
 void native_grouped_set_v1(bool v1);
 
+/// The bench only: the AMD kernel layout (STRATA_EXP_MODE values; -1 = the environment's) and the phase
+/// (0 all, 1 gate/up + SwiGLU + quantize, 2 down).
+void native_expert_set_mode(int mode, int phase);
 /// `iq_mmvq` and `native_expert_grouped` decode each weight part once and apply it to every column / entry;
 /// true selects the older kernels that decode it again per column (STRATA_OLD_IQ_MMVQ=1 at startup).  Both give
 /// bitwise the same results.  Set before graph capture; captured graphs keep the kernels they captured.
diff --git a/include/strata/kernels/mrope.hpp b/include/strata/kernels/mrope.hpp
index cb1451c4028..23584242eb4 100644
--- a/include/strata/kernels/mrope.hpp
+++ b/include/strata/kernels/mrope.hpp
@@ -15,6 +15,9 @@
 #pragma once
 
 #include <cstdint>
+#if defined(__HIPCC__)
+#include <hip/hip_runtime.h>
+#endif
 
 #include "strata/kernels/rope_scaling.hpp"
 
diff --git a/include/strata/platform/hip_compat/cublas_v2.h b/include/strata/platform/hip_compat/cublas_v2.h
new file mode 100644
index 00000000000..fe8ea15723b
--- /dev/null
+++ b/include/strata/platform/hip_compat/cublas_v2.h
@@ -0,0 +1,26 @@
+// cublas_v2.h for a STRATA_ENABLE_HIP build: the cuBLAS names src/prefill/gemm.cu uses, on hipBLAS.
+#pragma once
+#include "strata_hip.h"
+#ifndef HIPBLAS_V2
+#define HIPBLAS_V2
+#endif
+#include <hipblas/hipblas.h>
+
+#define cublasHandle_t hipblasHandle_t
+#define cublasStatus_t hipblasStatus_t
+#define CUBLAS_STATUS_SUCCESS HIPBLAS_STATUS_SUCCESS
+#define cublasCreate hipblasCreate
+#define cublasDestroy hipblasDestroy
+#define cublasSetStream hipblasSetStream
+#define cublasGemmEx hipblasGemmEx
+#define CUBLAS_OP_N HIPBLAS_OP_N
+#define CUBLAS_OP_T HIPBLAS_OP_T
+#define CUBLAS_GEMM_DEFAULT HIPBLAS_GEMM_DEFAULT
+#define CUBLAS_COMPUTE_32F HIPBLAS_COMPUTE_32F
+#define CUDA_R_32F HIP_R_32F
+#define CUDA_R_16F HIP_R_16F
+#define CUDA_R_16BF HIP_R_16BF
+// rocBLAS picks its own math and workspace; the NVIDIA-only knobs are accepted and ignored
+#define CUBLAS_DEFAULT_MATH 0
+#define cublasSetMathMode(handle, mode) HIPBLAS_STATUS_SUCCESS
+#define cublasSetWorkspace(handle, ptr, bytes) HIPBLAS_STATUS_SUCCESS
diff --git a/include/strata/platform/hip_compat/cuda_fp16.h b/include/strata/platform/hip_compat/cuda_fp16.h
new file mode 100644
index 00000000000..4cd2d3c6a5e
--- /dev/null
+++ b/include/strata/platform/hip_compat/cuda_fp16.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "strata_hip.h"
diff --git a/include/strata/platform/hip_compat/cuda_runtime.h b/include/strata/platform/hip_compat/cuda_runtime.h
new file mode 100644
index 00000000000..4cd2d3c6a5e
--- /dev/null
+++ b/include/strata/platform/hip_compat/cuda_runtime.h
@@ -0,0 +1,2 @@
+#pragma once
+#include "strata_hip.h"
diff --git a/include/strata/platform/hip_compat/math_constants.h b/include/strata/platform/hip_compat/math_constants.h
new file mode 100644
index 00000000000..b00d57b9e90
--- /dev/null
+++ b/include/strata/platform/hip_compat/math_constants.h
@@ -0,0 +1,4 @@
+// math_constants.h for a STRATA_ENABLE_HIP build: the CUDART_* constants the tree uses.
+#pragma once
+#define CUDART_INF_F __builtin_huge_valf()
+#define CUDART_NAN_F __builtin_nanf("")
diff --git a/include/strata/platform/hip_compat/strata_hip.h b/include/strata/platform/hip_compat/strata_hip.h
new file mode 100644
index 00000000000..b0de6c4a60c
--- /dev/null
+++ b/include/strata/platform/hip_compat/strata_hip.h
@@ -0,0 +1,295 @@
+// strata_hip.h - the CUDA runtime/cuBLAS names Strata uses, mapped onto HIP/hipBLAS for AMD GPUs (gfx906).
+//
+// This directory is put FIRST on the include path of a STRATA_ENABLE_HIP build only; its `cuda_runtime.h`,
+// `cuda_fp16.h` and `cublas_v2.h` include this header instead of the NVIDIA ones, so the engine's sources stay
+// one tree.  The mapping list follows llama.cpp's ggml-cuda/vendors/hip.h (MIT) where the two overlap.
+//
+// The warp contract: every Strata kernel is written for a 32-lane warp.  gfx906 runs 64-lane wavefronts, so
+// here a CUDA warp is a LOGICAL 32-lane half of a wavefront: every shuffle defaults to width 32 (a
+// `__shfl_down_sync(m, v, 1)` at lane 31 must not read lane 32), `__ballot_sync` returns the 32-bit mask of the
+// caller's own half, and `__syncwarp` is a wavefront barrier plus an LDS fence.  That keeps every kernel's
+// arithmetic, lane mapping and reduction order exactly as on NVIDIA; wave64-native rewrites of the hot kernels
+// are separate, measured changes.
+#pragma once
+
+#ifndef HIP_DISABLE_WARP_SYNC_BUILTINS
+#define HIP_DISABLE_WARP_SYNC_BUILTINS 1
+#endif
+#include <hip/hip_runtime.h>
+#include <hip/hip_fp16.h>
+
+#include <cstdint>
+#include <cstdlib>
+
+#define STRATA_HIP_GFX906 1
+
+// ---- runtime: types and constants ------------------------------------------------------------------------
+#define cudaError_t hipError_t
+#define cudaSuccess hipSuccess
+#define cudaErrorNotReady hipErrorNotReady
+#define cudaErrorMemoryAllocation hipErrorOutOfMemory
+#define cudaErrorStreamCaptureUnsupported hipErrorStreamCaptureUnsupported
+#define cudaErrorPeerAccessAlreadyEnabled hipErrorPeerAccessAlreadyEnabled
+#define cudaStream_t hipStream_t
+#define cudaEvent_t hipEvent_t
+#define cudaGraph_t hipGraph_t
+#define cudaGraphExec_t hipGraphExec_t
+#define cudaGraphNode_t hipGraphNode_t
+#define cudaDeviceProp hipDeviceProp_t
+#define cudaMemcpyKind hipMemcpyKind
+#define cudaMemcpyHostToDevice hipMemcpyHostToDevice
+#define cudaMemcpyDeviceToHost hipMemcpyDeviceToHost
+#define cudaMemcpyDeviceToDevice hipMemcpyDeviceToDevice
+#define cudaMemcpyDefault hipMemcpyDefault
+#define cudaStreamNonBlocking hipStreamNonBlocking
+#define cudaStreamCaptureModeThreadLocal hipStreamCaptureModeThreadLocal
+#define cudaStreamCaptureModeRelaxed hipStreamCaptureModeRelaxed
+#define cudaStreamCaptureModeGlobal hipStreamCaptureModeGlobal
+#define cudaStreamCaptureStatus hipStreamCaptureStatus
+#define cudaStreamCaptureStatusNone hipStreamCaptureStatusNone
+#define cudaStreamCaptureStatusActive hipStreamCaptureStatusActive
+#define cudaEventDisableTiming hipEventDisableTiming
+#define cudaEventDefault hipEventDefault
+#define cudaHostAllocDefault hipHostMallocDefault
+#define cudaHostAllocPortable hipHostMallocPortable
+#define cudaHostAllocMapped hipHostMallocMapped
+#define cudaHostAllocWriteCombined hipHostMallocWriteCombined
+#define cudaHostRegisterDefault hipHostRegisterDefault
+#define cudaHostRegisterPortable hipHostRegisterPortable
+#define cudaHostRegisterMapped hipHostRegisterMapped
+#define cudaHostRegisterReadOnly hipHostRegisterReadOnly
+#define cudaDeviceScheduleSpin hipDeviceScheduleSpin
+#define cudaDeviceScheduleYield hipDeviceScheduleYield
+#define cudaDeviceScheduleBlockingSync hipDeviceScheduleBlockingSync
+#define cudaDeviceMapHost hipDeviceMapHost
+#define cudaFuncAttributeMaxDynamicSharedMemorySize hipFuncAttributeMaxDynamicSharedMemorySize
+#define cudaDevAttrMultiProcessorCount hipDeviceAttributeMultiprocessorCount
+#define cudaDevAttrClockRate hipDeviceAttributeClockRate
+#define cudaDevAttrComputeCapabilityMajor hipDeviceAttributeComputeCapabilityMajor
+#define cudaDevAttrComputeCapabilityMinor hipDeviceAttributeComputeCapabilityMinor
+#define cudaDevAttrMaxSharedMemoryPerBlockOptin hipDeviceAttributeSharedMemPerBlockOptin
+#define cudaDevAttrMemoryClockRate hipDeviceAttributeMemoryClockRate
+#define cudaDevAttrGlobalMemoryBusWidth hipDeviceAttributeMemoryBusWidth
+
+// ---- runtime: functions ----------------------------------------------------------------------------------
+#define cudaGetErrorString hipGetErrorString
+#define cudaGetErrorName hipGetErrorName
+#define cudaGetLastError hipGetLastError
+#define cudaPeekAtLastError hipPeekAtLastError
+#define cudaGetDevice hipGetDevice
+#define cudaSetDevice hipSetDevice
+#define cudaGetDeviceCount hipGetDeviceCount
+#define cudaGetDeviceProperties hipGetDeviceProperties
+// The shared-memory opt-in limit: some HIP versions report 0 for it on GCN cards; the real ceiling there is
+// the plain per-block limit (64 KB of LDS on gfx906).
+inline hipError_t strata_device_get_attribute(int* v, hipDeviceAttribute_t a, int dev) {
+    hipError_t e = hipDeviceGetAttribute(v, a, dev);
+    if (e == hipSuccess && a == hipDeviceAttributeSharedMemPerBlockOptin && *v <= 0)
+        e = hipDeviceGetAttribute(v, hipDeviceAttributeMaxSharedMemoryPerBlock, dev);
+    return e;
+}
+#define cudaDeviceGetAttribute strata_device_get_attribute
+#define cudaDeviceSynchronize hipDeviceSynchronize
+#define cudaDeviceCanAccessPeer hipDeviceCanAccessPeer
+#define cudaDeviceEnablePeerAccess hipDeviceEnablePeerAccess
+#define cudaDriverGetVersion hipDriverGetVersion
+#define cudaRuntimeGetVersion hipRuntimeGetVersion
+#define cudaSetDeviceFlags hipSetDeviceFlags
+#define cudaMalloc hipMalloc
+#define cudaFree hipFree
+#define cudaMemGetInfo hipMemGetInfo
+#define cudaMemcpy hipMemcpy
+#define cudaMemcpyAsync hipMemcpyAsync
+#define cudaMemcpyPeerAsync hipMemcpyPeerAsync
+#define cudaMemcpy2DAsync hipMemcpy2DAsync
+#define cudaMemset hipMemset
+#define cudaMemsetAsync hipMemsetAsync
+// Mapped host memory is how the GPU and the CPU talk inside a running graph (the doorbells, the CPU experts'
+// results, the verify flags): a kernel spins on a word the CPU writes, and the CPU on a word the kernel writes.
+// On AMD that needs FINE-GRAINED (coherent) memory - coarse-grained host memory may sit in the GPU's L2 for the
+// whole kernel and the spin never sees the other side.  So every mapped allocation is made coherent here.
+inline hipError_t strata_host_alloc(void** p, size_t bytes, unsigned int flags) {
+    if (flags & hipHostMallocMapped) flags |= hipHostMallocCoherent;
+    return hipHostMalloc(p, bytes, flags);
+}
+template <typename T> inline hipError_t strata_host_alloc(T** p, size_t bytes, unsigned int flags) {
+    return strata_host_alloc(reinterpret_cast<void**>(p), bytes, flags);
+}
+#define cudaHostAlloc strata_host_alloc
+#define cudaMallocHost(ptr, size) hipHostMalloc(ptr, size, hipHostMallocDefault)
+#define cudaFreeHost hipHostFree
+#define cudaHostRegister hipHostRegister
+#define cudaHostUnregister hipHostUnregister
+#define cudaHostGetDevicePointer hipHostGetDevicePointer
+#define cudaStreamCreate hipStreamCreate
+#define cudaStreamCreateWithFlags hipStreamCreateWithFlags
+#define cudaStreamDestroy hipStreamDestroy
+#define cudaStreamSynchronize hipStreamSynchronize
+#define cudaStreamQuery hipStreamQuery
+#define cudaStreamWaitEvent hipStreamWaitEvent
+#define cudaStreamBeginCapture hipStreamBeginCapture
+#define cudaStreamEndCapture hipStreamEndCapture
+#define cudaStreamIsCapturing hipStreamIsCapturing
+#define cudaLaunchHostFunc hipLaunchHostFunc
+#define cudaEventCreate hipEventCreate
+#define cudaEventCreateWithFlags hipEventCreateWithFlags
+#define cudaEventDestroy hipEventDestroy
+#define cudaEventRecord hipEventRecord
+#define cudaEventQuery hipEventQuery
+#define cudaEventSynchronize hipEventSynchronize
+#define cudaEventElapsedTime hipEventElapsedTime
+#define cudaGraphLaunch hipGraphLaunch
+#define cudaGraphUpload hipGraphUpload
+#define cudaGraphDestroy hipGraphDestroy
+#define cudaGraphExecDestroy hipGraphExecDestroy
+#define cudaGraphGetNodes hipGraphGetNodes
+#define cudaGraphNodeType hipGraphNodeType
+#define cudaGraphNodeGetType hipGraphNodeGetType
+#define cudaGraphNodeTypeKernel hipGraphNodeTypeKernel
+#define cudaGraphNodeTypeMemcpy hipGraphNodeTypeMemcpy
+#define cudaGraphNodeTypeMemset hipGraphNodeTypeMemset
+#define cudaKernelNodeParams hipKernelNodeParams
+#define cudaGraphKernelNodeGetParams hipGraphKernelNodeGetParams
+inline hipError_t cudaFuncGetName(const char** name, const void*) { *name = nullptr; return hipErrorNotSupported; }
+#define cudaFuncSetAttribute(fn, attr, val) hipFuncSetAttribute(reinterpret_cast<const void*>(fn), attr, val)
+#define cudaMemcpyToSymbol(sym, src, ...) hipMemcpyToSymbol(HIP_SYMBOL(sym), src, __VA_ARGS__)
+
+// CUDA 12 has a 3-argument cudaGraphInstantiate(exec, graph, flags) and the older 5-argument one; HIP spells
+// the first hipGraphInstantiateWithFlags.  Both are used in the tree.
+inline hipError_t cudaGraphInstantiate(hipGraphExec_t* exec, hipGraph_t graph, unsigned long long flags) {
+    return hipGraphInstantiateWithFlags(exec, graph, flags);
+}
+inline hipError_t cudaGraphInstantiate(hipGraphExec_t* exec, hipGraph_t graph, hipGraphNode_t* err_node,
+                                       char* log, size_t log_size) {
+    return hipGraphInstantiate(exec, graph, err_node, log, log_size);
+}
+// cudaInitDevice(dev, deviceFlags, flags): initialise a device and its scheduling flags WITHOUT making it the
+// current device (CUDA's contract; the layer split relies on it - a changed current device put GPU 0's expert
+// cache on GPU 1).
+inline hipError_t cudaInitDevice(int device, unsigned int device_flags, unsigned int /*flags*/) {
+    int prev = 0;
+    hipError_t e = hipGetDevice(&prev);
+    if (e != hipSuccess) return e;
+    e = hipSetDevice(device);
+    if (e != hipSuccess) return e;
+    if (hipSetDeviceFlags(device_flags) != hipSuccess) (void) hipGetLastError();   // context already active
+    return hipSetDevice(prev);
+}
+
+// ---- device side -----------------------------------------------------------------------------------------
+#if defined(__HIP_DEVICE_COMPILE__) || defined(__HIPCC__)
+
+// Logical 32-lane warps (see the header comment).  The width argument, when given, wins.
+#define __shfl_sync(mask, var, lane, ...) __shfl(var, lane, STRATA_SHFL_W(__VA_ARGS__))
+#define __shfl_up_sync(mask, var, delta, ...) __shfl_up(var, delta, STRATA_SHFL_W(__VA_ARGS__))
+#define __shfl_down_sync(mask, var, delta, ...) __shfl_down(var, delta, STRATA_SHFL_W(__VA_ARGS__))
+#define __shfl_xor_sync(mask, var, lanemask, ...) __shfl_xor(var, lanemask, STRATA_SHFL_W(__VA_ARGS__))
+// STRATA_SHFL_W() -> 32, STRATA_SHFL_W(w) -> w
+#define STRATA_SHFL_W(...) STRATA_SHFL_W_I(dummy, ##__VA_ARGS__, STRATA_SHFL_W_GIVEN, STRATA_SHFL_W_DEFAULT)(__VA_ARGS__)
+#define STRATA_SHFL_W_I(d, a, b, ...) b
+#define STRATA_SHFL_W_GIVEN(w) (w)
+#define STRATA_SHFL_W_DEFAULT(...) 32
+#define __all_sync(mask, pred) __all(pred)
+#define __any_sync(mask, pred) __any(pred)
+
+static __device__ __forceinline__ unsigned int strata_ballot32(int pred) {
+    const unsigned long long b = __ballot(pred);
+    return (unsigned int) (b >> (__lane_id() & 32u));
+}
+#define __ballot_sync(mask, pred) strata_ballot32(pred)
+#define __activemask() ((unsigned int) (__ballot(1) >> (__lane_id() & 32u)))
+
+static __device__ __forceinline__ void strata_syncwarp() {
+    __builtin_amdgcn_fence(__ATOMIC_RELEASE, "wavefront");
+    __builtin_amdgcn_wave_barrier();
+    __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "wavefront");
+}
+#define __syncwarp(...) strata_syncwarp()
+
+// __nanosleep(ns): s_sleep counts 64 clocks per unit (~40 ns at the 1.7 GHz shader clock); a spin loop only
+// needs "back off a little", not an exact time.
+static __device__ __forceinline__ void strata_nanosleep(unsigned int ns) {
+    if (ns >= 400) __builtin_amdgcn_s_sleep(8);
+    else __builtin_amdgcn_s_sleep(1);
+}
+#define __nanosleep(ns) strata_nanosleep(ns)
+#define __trap() __builtin_trap()
+
+// __dp4a(a, b, c): signed 8-bit dot product plus accumulator; gfx906 has v_dot4_i32_i8.
+static __device__ __forceinline__ int strata_dp4a(int a, int b, int c) {
+#if defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx942__) || defined(__GFX11__) || defined(__GFX12__)
+    return __builtin_amdgcn_sdot4(a, b, c, false);
+#else
+    const int8_t* va = reinterpret_cast<const int8_t*>(&a);
+    const int8_t* vb = reinterpret_cast<const int8_t*>(&b);
+    return c + va[0] * vb[0] + va[1] * vb[1] + va[2] * vb[2] + va[3] * vb[3];
+#endif
+}
+static __device__ __forceinline__ unsigned int strata_dp4a(unsigned int a, unsigned int b, unsigned int c) {
+    const uint8_t* va = reinterpret_cast<const uint8_t*>(&a);
+    const uint8_t* vb = reinterpret_cast<const uint8_t*>(&b);
+    return c + va[0] * vb[0] + va[1] * vb[1] + va[2] * vb[2] + va[3] * vb[3];
+}
+#define __dp4a strata_dp4a
+
+// SIMD-in-a-word byte ops (CUDA semantics: __vsub4 wraps per byte, __vsubss4 saturates, __vcmp*4 give 0xff)
+typedef int8_t strata_i8x4 __attribute__((ext_vector_type(4)));
+typedef uint8_t strata_u8x4 __attribute__((ext_vector_type(4)));
+static __device__ __forceinline__ unsigned int strata_vsub4(unsigned int a, unsigned int b) {
+    const strata_u8x4 va = __builtin_bit_cast(strata_u8x4, a);
+    const strata_u8x4 vb = __builtin_bit_cast(strata_u8x4, b);
+    return __builtin_bit_cast(unsigned int, (strata_u8x4) (va - vb));
+}
+static __device__ __forceinline__ int strata_vsubss4(int a, int b) {
+    const strata_i8x4 va = __builtin_bit_cast(strata_i8x4, a);
+    const strata_i8x4 vb = __builtin_bit_cast(strata_i8x4, b);
+    return __builtin_bit_cast(int, (strata_i8x4) __builtin_elementwise_sub_sat(va, vb));
+}
+static __device__ __forceinline__ unsigned int strata_vcmpeq4(unsigned int a, unsigned int b) {
+    const strata_u8x4 va = __builtin_bit_cast(strata_u8x4, a);
+    const strata_u8x4 vb = __builtin_bit_cast(strata_u8x4, b);
+    strata_u8x4 c;
+#pragma unroll
+    for (int i = 0; i < 4; ++i) c[i] = va[i] == vb[i] ? 0xff : 0x00;
+    return __builtin_bit_cast(unsigned int, c);
+}
+static __device__ __forceinline__ unsigned int strata_vcmpne4(unsigned int a, unsigned int b) {
+    return ~strata_vcmpeq4(a, b);
+}
+#define __vsub4(a, b) ((int) strata_vsub4((unsigned int) (a), (unsigned int) (b)))
+#define __vsubss4(a, b) strata_vsubss4((int) (a), (int) (b))
+#define __vcmpeq4(a, b) strata_vcmpeq4((unsigned int) (a), (unsigned int) (b))
+#define __vcmpne4(a, b) strata_vcmpne4((unsigned int) (a), (unsigned int) (b))
+
+
+// __fmul_rn / __fadd_rn / __fsub_rn: on NVIDIA these are never contracted into an FMA (that is their point - the
+// engine uses them where a result must match a reference bit for bit).  HIP spells them as plain operators, which
+// clang's default -ffp-contract=fast-honor-pragmas may fuse.  The pragma keeps each one a separate rounding.
+static __device__ __forceinline__ float strata_fmul_rn(float a, float b) {
+#pragma clang fp contract(off)
+    return a * b;
+}
+static __device__ __forceinline__ float strata_fadd_rn(float a, float b) {
+#pragma clang fp contract(off)
+    return a + b;
+}
+static __device__ __forceinline__ float strata_fsub_rn(float a, float b) {
+#pragma clang fp contract(off)
+    return a - b;
+}
+#define __fmul_rn(a, b) strata_fmul_rn((a), (b))
+#define __fadd_rn(a, b) strata_fadd_rn((a), (b))
+#define __fsub_rn(a, b) strata_fsub_rn((a), (b))
+
+
+// __byte_perm(x, y, s): HIP's own version builds an 8-byte array and indexes it - the array lands in SCRATCH
+// memory, and every IQ4 codebook lookup went through it (a 0.9 MB IQ4_NL GEMV took 290 us, ~3 GB/s).  gfx906 has
+// v_perm_b32, which selects bytes of {src0:src1} (src1 low) by byte selectors 0-7: the same operation, one
+// instruction.  CUDA reads the low 3 bits of each of the four low selector nibbles.
+static __device__ __forceinline__ unsigned int strata_byte_perm(unsigned int x, unsigned int y, unsigned int s) {
+    const unsigned int sel = (s & 0x7u) | ((s & 0x70u) << 4) | ((s & 0x700u) << 8) | ((s & 0x7000u) << 12);
+    return __builtin_amdgcn_perm(y, x, sel);
+}
+#define __byte_perm(x, y, s) strata_byte_perm((unsigned int) (x), (unsigned int) (y), (unsigned int) (s))
+
+#endif  // device side
diff --git a/src/core/device.cu b/src/core/device.cu
index 98fc071714b..fbc7030731c 100644
--- a/src/core/device.cu
+++ b/src/core/device.cu
@@ -212,7 +212,7 @@ std::string gpu_arch_problem(int ordinal) {
 }
 
 std::string device_code_error() {
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)
     return "";   // gpu_arch_problem() checks the HIP architectures against STRATA_HIP_ARCHS, before this point
 #else
     // every .cu of the engine is compiled for the same CMAKE_CUDA_ARCHITECTURES, so this kernel stands for all
@@ -263,7 +263,17 @@ DeviceInfo device_info(int ordinal) {
     // supported arch is enforced by CMake; RUNNING on an older card is caught here, because a binary can be carried
     // to a machine with an older card and would otherwise silently take whatever path the driver chose.  The HIP
     // backend checks the card against the architectures the binary was compiled for (and wave32).
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_HIP_GFX906)
+    // AMD gfx906 (the STRATA_HIP_GFX906 compat build, not STRATA_USE_HIP): the build targets one gfx arch
+    // (CMAKE_HIP_ARCHITECTURES, wave64); a card of another arch fails at the first kernel launch with
+    // hipErrorInvalidDeviceFunction.  gcnArchName says which it is.
+    {
+        std::string arch(p.gcnArchName);
+        if (const size_t colon = arch.find(':'); colon != std::string::npos) arch.resize(colon);
+        d.arch = arch;
+    }
+    if (p.gcnArchName[0] != 0) d.name += std::string(" (") + p.gcnArchName + ")";
+#elif defined(STRATA_USE_HIP)
     d.arch = base_arch(p.gcnArchName);
     if (const std::string why = arch_problem(p, ordinal); !why.empty()) throw CudaError(why, -1);
 #else
diff --git a/src/kernels/cuda/fused_gr.cu b/src/kernels/cuda/fused_gr.cu
index c9d1b80daa3..0ef848dbd76 100644
--- a/src/kernels/cuda/fused_gr.cu
+++ b/src/kernels/cuda/fused_gr.cu
@@ -712,7 +712,11 @@ int down_chunk(bool staged, int* tile_out) {
         // the down kernel's outputs (lo, inject_out) are strictly per-token, so the chunk boundaries are safe, and
         // the up kernel below still sees every token of the batch in one launch.
 #if defined(__HIPCC__)
+#if defined(STRATA_HIP_GFX906)
+        const bool small_tile = false;  // gfx906: 64 KiB LDS, the 2560 tile as before (8 tokens slice into launches)
+#else
         const bool small_tile = true;   // all eight tokens fit gfx1100's 64 KiB LDS at this tile
+#endif
 #else
         int cc_maj = 0, cc_min = 0;
         cudaDeviceGetAttribute(&cc_maj, cudaDevAttrComputeCapabilityMajor, dev);
@@ -811,8 +815,230 @@ int env_variant() {
 // per device: the variant `fused_gr_check` chose (0 = not checked yet)
 std::atomic<int> g_variant[64];
 
+
+#if defined(STRATA_HIP_GFX906)
+// ---- AMD fast path (STRATA_GR_FAST, default 1; 0 = the old kernels): the same arithmetic per value in the same order, latency
+// hidden.  gr_norm: one block per token (as before) but a thread's 10 float4 of R / bo / w_norm are loaded
+// before any is used, and xn stays in registers until rs is known (was: store, then re-read the 40 KB).
+// gr_up: a warp's 8 rows of w_up and their epilogue inputs are loaded before the dots (was: one row's load chain
+// after another).
+constexpr int NQ = D / (THREADS * 4);   // 10 float4 per thread
+static_assert(D % (THREADS * 4) == 0, "whole float4 per thread");
+__global__ void __launch_bounds__(THREADS) gr_norm_fast_kernel(GrMulti m) {
+    __shared__ float part[WARPS][HC];
+    __shared__ float s_rs[HC];
+    const FusedGrArgs& a = m.a[blockIdx.x];
+    float* xn = m.xn + (size_t) blockIdx.x * D;
+    const int t = threadIdx.x, lane = t & 31, warp = t >> 5;
+    float gw[HC];
+#pragma unroll
+    for (int c = 0; c < HC; ++c) gw[c] = a.apply ? 2.0f * sigmoidf_(a.inj_prev[c] / (float) HC) : 0.0f;
+    float4 r[NQ], g[NQ];
+#pragma unroll
+    for (int k = 0; k < NQ; ++k) {
+        const int i = t * 4 + k * THREADS * 4;
+        r[k] = *reinterpret_cast<const float4*>(a.R + i);
+        g[k] = *reinterpret_cast<const float4*>(a.w_norm + i);
+    }
+    if (a.apply) {
+#pragma unroll
+        for (int k = 0; k < NQ; ++k) {
+            const int i = t * 4 + k * THREADS * 4, c = i / N, d = i - c * N;
+            const float4 b = *reinterpret_cast<const float4*>(a.bo_prev + d);
+            r[k].x = fmaf(b.x, gw[c], r[k].x); r[k].y = fmaf(b.y, gw[c], r[k].y);
+            r[k].z = fmaf(b.z, gw[c], r[k].z); r[k].w = fmaf(b.w, gw[c], r[k].w);
+        }
+    }
+    float ss[HC] = {0.0f, 0.0f, 0.0f, 0.0f};
+#pragma unroll
+    for (int k = 0; k < NQ; ++k) {
+        const int i = t * 4 + k * THREADS * 4, c = i / N;
+        const float sq = r[k].x * r[k].x + r[k].y * r[k].y + r[k].z * r[k].z + r[k].w * r[k].w;
+#pragma unroll
+        for (int cc = 0; cc < HC; ++cc) if (cc == c) ss[cc] += sq;
+        r[k] = make_float4(r[k].x * g[k].x, r[k].y * g[k].y, r[k].z * g[k].z, r[k].w * g[k].w);
+    }
+#pragma unroll
+    for (int c = 0; c < HC; ++c) {
+        const float v = warp_sum(ss[c]);
+        if (lane == 0) part[warp][c] = v;
+    }
+    __syncthreads();
+    if (t < HC) {
+        float s = 0.0f;
+        for (int w = 0; w < WARPS; ++w) s += part[w][t];
+        s_rs[t] = rsqrtf(s / (float) N + a.eps);
+        a.rs[t] = s_rs[t];
+    }
+    __syncthreads();
+#pragma unroll
+    for (int k = 0; k < NQ; ++k) {
+        const int i = t * 4 + k * THREADS * 4;
+        const float sr = s_rs[i / N];
+        *reinterpret_cast<float4*>(xn + i) = make_float4(r[k].x * sr, r[k].y * sr, r[k].z * sr, r[k].w * sr);
+    }
+}
+// gr_up: 8 lanes per row instead of a 32-lane warp.  Lane j holds the old lanes j, j+8, j+16, j+24 (and chunk
+// 32+j, the old lane j's second chunk): the xor tree's stages 16 and 8 are its own adds (a + b == b + a), stages
+// 4, 2, 1 are shuffles inside the 8 - the same tree, bitwise the same sum, 3 shuffles a token instead of 5 and no
+// idle lanes on the tail chunks.  A block's 64 rows are 2 passes of 32 groups, their weights loaded up front.
+__device__ __forceinline__ float xor8(float v) {
+#pragma unroll
+    for (int o = 4; o > 0; o >>= 1) v += __shfl_xor(v, o, 64);
+    return v;
+}
+__global__ void __launch_bounds__(THREADS) gr_up_fast_kernel(GrMulti m) {
+    __shared__ __align__(16) float lo[kFusedGrMaxT][LR];
+    __shared__ float g[kFusedGrMaxT][HC][UPM_COLS];
+    const int t = threadIdx.x, j = t & 7, grp = t >> 3;
+    const int T = m.T;
+    const int d0 = blockIdx.x * UPM_COLS;
+    static_assert(LR == 40 * 8 && HC * UPM_COLS == 64 && THREADS == 256, "geometry");
+    uint4 w[2][5];
+    float rv[2] = {0.0f, 0.0f}, wn[2] = {0.0f, 0.0f}, rsc[2] = {0.0f, 0.0f}, bo[2] = {0.0f, 0.0f}, ip[2] = {0.0f, 0.0f};
+    const bool apply = j < T && m.a[j < T ? j : 0].apply;
+#pragma unroll
+    for (int p = 0; p < 2; ++p) {
+        const int r = grp + 32 * p, c = r / UPM_COLS, dd = r - c * UPM_COLS, i = c * N + d0 + dd;
+        const uint4* w4 = reinterpret_cast<const uint4*>(m.a[0].w_up + (size_t) i * LR);
+#pragma unroll
+        for (int q = 0; q < 4; ++q) w[p][q] = __ldg(w4 + j + 8 * q);
+        w[p][4] = __ldg(w4 + 32 + j);
+        if (j < T) {
+            const FusedGrArgs& a = m.a[j];
+            rv[p] = a.R[i];
+            wn[p] = a.w_norm[i];
+            rsc[p] = a.rs[c];
+            if (apply) { bo[p] = a.bo_prev[d0 + dd]; ip[p] = a.inj_prev[c]; }
+        }
+    }
+    for (int i = t; i < T * LR; i += THREADS) lo[i / LR][i % LR] = m.a[i / LR].lo[i % LR];
+    __syncthreads();
+#pragma unroll
+    for (int p = 0; p < 2; ++p) {
+        const int r = grp + 32 * p, c = r / UPM_COLS, dd = r - c * UPM_COLS, i = c * N + d0 + dd;
+        float mine = 0.0f;
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k) {
+            if (k >= T) break;
+            const float* l = lo[k];
+            const float p0 = dot8(w[p][0], l + j * 8) + dot8(w[p][4], l + (32 + j) * 8);   // old lane j
+            const float p1 = dot8(w[p][1], l + (j + 8) * 8);                               // old lane j + 8
+            const float p2 = dot8(w[p][2], l + (j + 16) * 8);                              // old lane j + 16
+            const float p3 = dot8(w[p][3], l + (j + 24) * 8);                              // old lane j + 24
+            const float s = xor8((p0 + p2) + (p1 + p3));   // stage 16: (j, j+16), (j+8, j+24); stage 8; then 4, 2, 1
+            if (j == k) mine = s;
+        }
+        if (j < T) {
+            float x0 = rv[p];
+            if (apply) {
+                x0 = fmaf(bo[p], 2.0f * sigmoidf_(ip[p] / (float) HC), x0);
+                m.a[j].R_out[i] = x0;
+            }
+            const float x = x0 * wn[p] * rsc[p];
+            g[j][c][dd] = x * sigmoidf_(mine);
+        }
+    }
+    __syncthreads();
+    for (int i = t; i < T * UPM_COLS; i += THREADS) {
+        const int k = i / UPM_COLS, col = i - k * UPM_COLS;
+        float s = 0.0f;
+#pragma unroll
+        for (int c = 0; c < HC; ++c) s += g[k][c][col];
+        m.a[k].mixed[d0 + col] = s / (float) HC;
+    }
+}
+#endif
+
+#if defined(STRATA_HIP_GFX906)
+// ---- AMD: `gr_down_multi` split along K.  The CUDA kernel is one warp per row of w_down (320 + 4 rows), 41
+// blocks: on a 60-CU gfx906 that left most of the card idle and read the 6.5 MB matrix at ~100 GB/s.  Here a block
+// is 8 wavefronts = 8 rows of one K-slice of 2048 (the slice of every token's xn staged in LDS once), 41 x 5
+// blocks, and a second kernel adds the 5 slice sums in a fixed order and runs the epilogue.  A token's result does
+// not depend on how many tokens share the window (each column is reduced on its own).
+constexpr int GS_SL = 2048;                   // K per slice
+constexpr int GS_S = D / GS_SL;               // 5 slices
+constexpr int GS_ROWS = LR + HC;              // 324: the down rows, then the inject rows
+constexpr int GS_WAVES = 8;
+static_assert(D % GS_SL == 0 && GS_SL == 64 * 8 * 4, "a lane takes 4 chunks of 8 per slice");
+// the slice sums: a module-scope device array is per device by construction, and needs no allocation during a
+// graph capture
+__device__ float g_gr_part[GS_S * kFusedGrMaxT * GS_ROWS];
+__global__ void __launch_bounds__(GS_WAVES * 64) gr_down_split_kernel(GrMulti m) {
+    float* part = g_gr_part;
+    extern __shared__ __align__(16) float tile[];   // [T][GS_SL]
+    const int t = threadIdx.x, lane = t & 63, wave = t >> 6;
+    const int T = m.T, sl = blockIdx.y;
+    const bool inject_block = blockIdx.x == DOWN_BLOCKS;
+    const int row = inject_block ? wave : blockIdx.x * GS_WAVES + wave;
+    const bool active = !(inject_block && (m.a[0].w_inject == nullptr || wave >= HC));
+    const uint16_t* wrow = (inject_block ? m.a[0].w_inject : m.a[0].w_down) + (size_t) (active ? row : 0) * D;
+    const uint4* w4 = reinterpret_cast<const uint4*>(wrow) + sl * (GS_SL / 8);
+    uint4 wv[4];
+    if (active) {
+#pragma unroll
+        for (int q = 0; q < 4; ++q) wv[q] = __ldg(w4 + lane + 64 * q);
+    }
+    const float4* src4 = reinterpret_cast<const float4*>(m.xn);
+    float4* tile4 = reinterpret_cast<float4*>(tile);
+    for (int i = t; i < T * (GS_SL / 4); i += GS_WAVES * 64) {
+        const int k = i / (GS_SL / 4), off = i - k * (GS_SL / 4);
+        tile4[i] = src4[((size_t) k * D + (size_t) sl * GS_SL) / 4 + off];
+    }
+    __syncthreads();
+    if (!active) return;
+    float acc[kFusedGrMaxT];
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) acc[k] = 0.0f;
+#pragma unroll
+    for (int q = 0; q < 4; ++q) {
+        const int j = lane + 64 * q;
+#pragma unroll
+        for (int k = 0; k < kFusedGrMaxT; ++k)
+            if (k < T) acc[k] += dot8(wv[q], tile + k * GS_SL + j * 8);
+    }
+#pragma unroll
+    for (int k = 0; k < kFusedGrMaxT; ++k) {
+        if (k >= T) break;
+        float v = acc[k];
+#pragma unroll
+        for (int off = 32; off > 0; off >>= 1) v += __shfl_xor(v, off, 64);
+        if (lane == 0) part[((size_t) sl * kFusedGrMaxT + k) * GS_ROWS + (inject_block ? LR + row : row)] = v;
+    }
+}
+__global__ void gr_down_finish_kernel(GrMulti m) {
+    const float* part = g_gr_part;
+    const int i = blockIdx.x * blockDim.x + threadIdx.x;
+    const int k = i / GS_ROWS, r = i - k * GS_ROWS;
+    if (k >= m.T) return;
+    const bool inject = r >= LR;
+    if (inject && m.a[0].w_inject == nullptr) return;
+    float s = 0.0f;
+#pragma unroll
+    for (int sl = 0; sl < GS_S; ++sl) s += part[((size_t) sl * kFusedGrMaxT + k) * GS_ROWS + r];
+    if (inject) {
+        m.a[k].inject_out[r - LR] = s;
+    } else {
+        const float x = s / (float) HC;
+        m.a[k].lo[r] = x / (1.0f + __expf(-x));
+    }
+}
+
+#endif
+
 }  // namespace
 
+#if defined(STRATA_HIP_GFX906)
+int g_gr_fast = -1;   // fused_gr_set_fast (the bench); -1 = STRATA_GR_FAST
+static bool gr_fast() {
+    static const bool env = [] { const char* v = std::getenv("STRATA_GR_FAST"); return v ? std::atoi(v) != 0 : true; }();
+    return g_gr_fast >= 0 ? g_gr_fast != 0 : env;
+}
+#else
+int g_gr_fast = -1;
+#endif
+void fused_gr_set_fast(int on) { g_gr_fast = on; }
+
 void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, void* stream, unsigned long long* stamp_buf,
                          int stamp_i0) {
     if (n_tok < 1 || n_tok > kFusedGrMaxT || xn_scratch == nullptr) {
@@ -875,6 +1101,28 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         }
         return;
     }
+#if defined(STRATA_HIP_GFX906)
+    // gfx906: the latency-hidden norm/up (STRATA_GR_FAST) and the K-split down (STRATA_GR_SPLIT=0: the CUDA layout's read)
+    static const bool split_off = std::getenv("STRATA_GR_SPLIT") && std::string(std::getenv("STRATA_GR_SPLIT")) == "0";
+    if (!split_off) {
+        const bool fast = gr_fast();
+        if (fast) gr_norm_fast_kernel<<<n_tok, THREADS, 0, st>>>(m);
+        else gr_norm_multi_kernel<<<n_tok, THREADS, 0, st>>>(m);
+        if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, stream);
+        gr_down_split_kernel<<<dim3(DOWN_BLOCKS + 1, GS_S), GS_WAVES * 64, (size_t) n_tok * GS_SL * sizeof(float), st>>>(
+            m);
+        gr_down_finish_kernel<<<(unsigned) ((n_tok * GS_ROWS + 255) / 256), 256, 0, st>>>(m);
+        if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, stream);
+        if (fast) gr_up_fast_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
+        else gr_up_multi_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
+        const cudaError_t e = cudaGetLastError();
+        if (e != cudaSuccess) {
+            std::fprintf(stderr, "fused_gr_read_multi: %s\n", cudaGetErrorString(e));
+            std::exit(1);
+        }
+        return;
+    }
+#endif
     // the default read (STRATA_GR_V3 unset): v1, or the bitwise-equal v2 / v3 this card's check accepted
     launch_multi(m, fused_gr_variant(), st, stamp_buf, stamp_i0);
     const cudaError_t e = cudaGetLastError();
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 15be7d5936c..121e5a0a9c4 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -17,6 +17,7 @@
 
 #include <cstdio>
 #include <cstdlib>
+#include <type_traits>
 
 namespace strata::kernels {
 namespace {
@@ -40,6 +41,18 @@ __device__ __forceinline__ uint32_t unpack_ksigns(const uint8_t v) {
     return s * 0x01010101;
 }
 __device__ __forceinline__ int2 get_int_from_table_16(const int& q4, const int8_t* table) {
+#if defined(STRATA_HIP_GFX906)
+    // AMD: llama.cpp's HIP lookup (vecdotq.cuh) - v_perm_b32 takes 3-bit byte indices, so the low and high halves
+    // of the table are looked up and the index MSB picks between them: 4 perms per 8 values.
+    const uint32_t* v32 = reinterpret_cast<const uint32_t*>(table);
+    const uint32_t q_even = (uint32_t) q4, q_odd = (uint32_t) q4 >> 4;
+    const uint32_t el = __builtin_amdgcn_perm(v32[1], v32[0], q_even & 0x07070707u);
+    const uint32_t ol = __builtin_amdgcn_perm(v32[1], v32[0], q_odd & 0x07070707u);
+    const uint32_t eh = __builtin_amdgcn_perm(v32[3], v32[2], q_even & 0x07070707u);
+    const uint32_t oh = __builtin_amdgcn_perm(v32[3], v32[2], q_odd & 0x07070707u);
+    return make_int2((int) __builtin_amdgcn_perm(eh, el, 0x03020100u | ((q_even & 0x08080808u) >> 1)),
+                     (int) __builtin_amdgcn_perm(oh, ol, 0x03020100u | ((q_odd & 0x08080808u) >> 1)));
+#else
     const uint32_t* table32 = (const uint32_t*) table;
     uint32_t tmp[2];
     const uint32_t low_high_selection_indices = (0x32103210 | ((q4 & 0x88888888) >> 1));
@@ -51,6 +64,7 @@ __device__ __forceinline__ int2 get_int_from_table_16(const int& q4, const int8_
         tmp[i] = __byte_perm(low, high, low_high_selection_indices >> shift);
     }
     return make_int2(__byte_perm(tmp[0], tmp[1], 0x6420), __byte_perm(tmp[0], tmp[1], 0x7531));
+#endif
 }
 #define ggml_cuda_dp4a(a, b, c) STRATA_DP4A((a), (b), (c))
 
@@ -1533,6 +1547,560 @@ size_t native_expert_scratch_bytes(int64_t cap, int64_t n_ff) {
     return 3 * ((f + 255) & ~(size_t) 255) + (((size_t) cap * (size_t) (n_ff / 32) * sizeof(block_q8_1) + 255) & ~(size_t) 255);
 }
 
+
+#if defined(STRATA_HIP_GFX906)
+// ---- AMD layouts for the grouped native experts (STRATA_EXP_MODE; 0 = the CUDA one above).
+// 1 (W64): a row per 64-lane wavefront - 4x the wavefronts, ~1-2 calls per lane, a 64-lane butterfly.
+// 2 (R2):  a 32-lane logical warp computes TWO rows in one loop - two independent load chains in flight.
+// Either way a (row, entry) sum does not depend on the window size.
+template<int TY>
+__device__ __forceinline__ float row_dot64(const uint8_t* row, const block_q8_1* x, int nb, int lane) {
+    using F = Fmt<TY>;
+    float s = 0.0f;
+    for (int k = lane; k < nb * F::ipb; k += 64) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        s += F::dot(row, x + kbx * (F::qk / 32), kbx, iqs);
+    }
+#pragma unroll
+    for (int o = 32; o > 0; o >>= 1) s += __shfl_xor(s, o, 64);
+    return s;
+}
+template<int TY>
+__device__ __forceinline__ void row_dot2(const uint8_t* r0, const uint8_t* r1, const block_q8_1* x, int nb, int lane,
+                                         float& o0, float& o1) {
+    using F = Fmt<TY>;
+    float s0 = 0.0f, s1 = 0.0f;
+    for (int k = lane; k < nb * F::ipb; k += 32) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const block_q8_1* xk = x + kbx * (F::qk / 32);
+        const float a = F::dot(r0, xk, kbx, iqs);
+        const float b = F::dot(r1, xk, kbx, iqs);
+        s0 += a;
+        s1 += b;
+    }
+    o0 = warp_sum(s0);
+    o1 = warp_sum(s1);
+}
+template<int TY, int NR>
+__device__ __forceinline__ void row_dotn(const uint8_t* const* r, const block_q8_1* x, int nb, int lane, float* o) {
+    using F = Fmt<TY>;
+    float acc[NR];
+#pragma unroll
+    for (int i = 0; i < NR; ++i) acc[i] = 0.0f;
+    for (int k = lane; k < nb * F::ipb; k += 32) {
+        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+        const block_q8_1* xk = x + kbx * (F::qk / 32);
+        float d[NR];
+#pragma unroll
+        for (int i = 0; i < NR; ++i) d[i] = F::dot(r[i], xk, kbx, iqs);
+#pragma unroll
+        for (int i = 0; i < NR; ++i) acc[i] += d[i];
+    }
+#pragma unroll
+    for (int i = 0; i < NR; ++i) o[i] = warp_sum(acc[i]);
+}
+template<int TG, int MODE>
+__global__ void __launch_bounds__(256) native_gu_amd_kernel(const unsigned long long* __restrict__ grp_ptr,
+                                                            const int32_t* __restrict__ grp_start,
+                                                            const int32_t* __restrict__ n_groups,
+                                                            const int32_t* __restrict__ ent_tok,
+                                                            const block_q8_1* __restrict__ xq, NativeExpertLayout L,
+                                                            float* __restrict__ gate, float* __restrict__ up) {
+    const int g = blockIdx.y;
+    if (g >= *n_groups) return;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int nb = (int) (L.n_embd / Fmt<TG>::qk), xb = (int) (L.n_embd / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    const int nrow = 2 * (int) L.n_ff;
+    auto wrow = [&](int row) -> const uint8_t* {
+        const bool is_up = row >= L.n_ff;
+        return blob + (is_up ? L.up_off : 0) + (size_t) (is_up ? row - (int) L.n_ff : row) * L.gu_row;
+    };
+    auto put = [&](int row, int e, float v) {
+        const bool is_up = row >= L.n_ff;
+        (is_up ? up : gate)[(size_t) e * L.n_ff + (is_up ? row - (int) L.n_ff : row)] = v;
+    };
+    if constexpr (MODE == 1) {
+        const int lane = threadIdx.x & 63, row = blockIdx.x * 4 + (threadIdx.x >> 6);
+        if (row >= nrow) return;
+        const uint8_t* wr = wrow(row);
+        for (int e = e0; e < e1; ++e) {
+            const float v = row_dot64<TG>(wr, xq + (size_t) ent_tok[e] * xb, nb, lane);
+            if (lane == 0) put(row, e, v);
+        }
+    } else if constexpr (MODE == 4) {
+        const int lane = threadIdx.x & 31, warp = threadIdx.x >> 5;
+        const int row0 = blockIdx.x * 32 + warp;
+        if (row0 >= nrow) return;
+        const uint8_t* w[4];
+#pragma unroll
+        for (int i = 0; i < 4; ++i) w[i] = wrow(row0 + 8 * i < nrow ? row0 + 8 * i : row0);
+        for (int e = e0; e < e1; ++e) {
+            float o[4];
+            row_dotn<TG, 4>(w, xq + (size_t) ent_tok[e] * xb, nb, lane, o);
+            if (lane == 0)
+#pragma unroll
+                for (int i = 0; i < 4; ++i) if (row0 + 8 * i < nrow) put(row0 + 8 * i, e, o[i]);
+        }
+    } else {
+        const int lane = threadIdx.x & 31, warp = threadIdx.x >> 5;
+        const int row0 = blockIdx.x * 16 + warp, row1 = row0 + 8;
+        if (row0 >= nrow) return;
+        const bool two = row1 < nrow;
+        const uint8_t* w0 = wrow(row0);
+        const uint8_t* w1 = wrow(two ? row1 : row0);
+        for (int e = e0; e < e1; ++e) {
+            float a, b;
+            row_dot2<TG>(w0, w1, xq + (size_t) ent_tok[e] * xb, nb, lane, a, b);
+            if (lane == 0) { put(row0, e, a); if (two) put(row1, e, b); }
+        }
+    }
+}
+template<int TD, int MODE>
+__global__ void __launch_bounds__(256) native_down_amd_kernel(const unsigned long long* __restrict__ grp_ptr,
+                                                              const int32_t* __restrict__ grp_start,
+                                                              const int32_t* __restrict__ n_groups,
+                                                              const int32_t* __restrict__ ent_dst,
+                                                              const block_q8_1* __restrict__ hq, NativeExpertLayout L,
+                                                              float* __restrict__ out) {
+    const int g = blockIdx.y;
+    if (g >= *n_groups) return;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int nb = (int) (L.n_ff / Fmt<TD>::qk), hb = (int) (L.n_ff / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    const int nrow = (int) L.n_embd;
+    if constexpr (MODE == 1) {
+        const int lane = threadIdx.x & 63, r = blockIdx.x * 4 + (threadIdx.x >> 6);
+        if (r >= nrow) return;
+        const uint8_t* wr = blob + L.down_off + (size_t) r * L.d_row;
+        for (int e = e0; e < e1; ++e) {
+            const float v = row_dot64<TD>(wr, hq + (size_t) e * hb, nb, lane);
+            if (lane == 0) out[(size_t) ent_dst[e] * L.n_embd + r] = v;
+        }
+    } else if constexpr (MODE == 4) {
+        const int lane = threadIdx.x & 31, warp = threadIdx.x >> 5;
+        const int r0 = blockIdx.x * 32 + warp;
+        if (r0 >= nrow) return;
+        const uint8_t* w[4];
+#pragma unroll
+        for (int i = 0; i < 4; ++i) w[i] = blob + L.down_off + (size_t) (r0 + 8 * i < nrow ? r0 + 8 * i : r0) * L.d_row;
+        for (int e = e0; e < e1; ++e) {
+            float o[4];
+            row_dotn<TD, 4>(w, hq + (size_t) e * hb, nb, lane, o);
+            if (lane == 0)
+#pragma unroll
+                for (int i = 0; i < 4; ++i) if (r0 + 8 * i < nrow) out[(size_t) ent_dst[e] * L.n_embd + r0 + 8 * i] = o[i];
+        }
+    } else {
+        const int lane = threadIdx.x & 31, warp = threadIdx.x >> 5;
+        const int r0 = blockIdx.x * 16 + warp, r1 = r0 + 8;
+        if (r0 >= nrow) return;
+        const bool two = r1 < nrow;
+        const uint8_t* w0 = blob + L.down_off + (size_t) r0 * L.d_row;
+        const uint8_t* w1 = blob + L.down_off + (size_t) (two ? r1 : r0) * L.d_row;
+        for (int e = e0; e < e1; ++e) {
+            float a, b;
+            row_dot2<TD>(w0, w1, hq + (size_t) e * hb, nb, lane, a, b);
+            if (lane == 0) {
+                out[(size_t) ent_dst[e] * L.n_embd + r0] = a;
+                if (two) out[(size_t) ent_dst[e] * L.n_embd + r1] = b;
+            }
+        }
+    }
+}
+// ---- 5 (LDS): gate/up of the grid formats (IQ2_S, IQ3_XXS, IQ3_S) with the codebook grid and the group's q8_1
+// activations in LDS.  The bench showed gate/up compute-bound, not bandwidth-bound (T = 2 costs ~1.8x T = 1 on the
+// same weights, 110-130 GB/s): each call issues its grid lookups and eight activation loads through the vector
+// memory path after the weight load.  Same calls, same lane-strided k, same R2 row pairs, same warp_sum: the
+// output is bitwise the mode-2 one.
+template<int TY> struct GridOf;
+template<> struct GridOf<22> { using T = uint64_t; static constexpr int N = 1024; __device__ static const T* src() { return iq2s_grid; } };
+template<> struct GridOf<18> { using T = uint32_t; static constexpr int N = 256; __device__ static const T* src() { return iq3xxs_grid; } };
+template<> struct GridOf<21> { using T = uint32_t; static constexpr int N = 512; __device__ static const T* src() { return iq3s_grid; } };
+template<> struct GridOf<23> { using T = uint32_t; static constexpr int N = 1; __device__ static const T* src() { return iq3s_grid; } };   // IQ4_XS: no grid
+
+// SG = 1 (mode 6): the signs without byte-SIMD ops, which gfx906 lacks (strata_vcmpne4 / strata_vsub4 unpack to
+// ~12 word ops each).  m = the sign nibble as 0x00/0xff bytes; (g ^ m) is g or -g-1 per byte, so
+// dp4a(g ^ m, u) - dp4a(m, u) = sum(s g u) exactly - the same integers, the same floats.
+__device__ __forceinline__ int nib_mask(uint32_t n) {
+    const uint32_t b = __umul24(n & 0xFu, 0x204081u) & 0x01010101u;
+    return (int) ((b << 8) - b);
+}
+template<int TY, int SG> struct DotG;
+template<int SG> struct DotG<22, SG> { __device__ static __forceinline__ float f(const void* vbq, const block_q8_1* bq8_1, int kbx, int iqs,
+                                                      const uint64_t* grid) {
+    const block_iq2_s* bq2 = (const block_iq2_s*) vbq + kbx;
+    const int qs_packed = get_int_b2(bq2->qs, iqs / 2);
+    const uint8_t* qs = (const uint8_t*) &qs_packed;
+    const int qh = bq2->qh[iqs / 2];
+    const int signs_packed_32 = get_int_b2(bq2->qs, QK_K / 32 + iqs / 2);
+    const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+    const int ls0 = bq2->scales[iqs / 2] & 0x0F;
+    const int ls1 = bq2->scales[iqs / 2] >> 4;
+    int sumi0 = 0, sumi1 = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const int* grid_pos = (const int*) (grid + (qs[l0 / 2] | ((qh << (8 - l0)) & 0x300)));
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        int& acc = l0 < 4 ? sumi0 : sumi1;
+        if constexpr (SG == 1) {
+            const int m0 = nib_mask(signs_packed_8[l0 / 2]), m1 = nib_mask(signs_packed_8[l0 / 2] >> 4);
+            acc = ggml_cuda_dp4a(grid_pos[0] ^ m0, u0, acc);
+            acc = ggml_cuda_dp4a(grid_pos[1] ^ m1, u1, acc);
+            acc -= ggml_cuda_dp4a(m1, u1, ggml_cuda_dp4a(m0, u0, 0));
+        } else {
+            const int signs0 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x03) << 7) | ((signs_packed_8[l0 / 2] & 0x0C) << 21), 0x00000000);
+            const int signs1 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x30) << 3) | ((signs_packed_8[l0 / 2] & 0xC0) << 17), 0x00000000);
+            const int grid_l = __vsub4(grid_pos[0] ^ signs0, signs0);
+            const int grid_h = __vsub4(grid_pos[1] ^ signs1, signs1);
+            acc = ggml_cuda_dp4a(grid_l, u0, acc);
+            acc = ggml_cuda_dp4a(grid_h, u1, acc);
+        }
+    }
+    const int sumi = (sumi0 * ls0 + sumi1 * ls1 + (sumi0 + sumi1) / 2) / 4;
+    const float d = __half2float(bq2->d) * __low2float(bq8_1[iqs / 2].ds);
+    return d * sumi;
+} };
+template<int SG> struct DotG<18, SG> { __device__ static __forceinline__ float f(const void* vbq, const block_q8_1* bq8_1, int kbx, int iqs,
+                                                      const uint32_t* grid) {
+    const block_iq3_xxs* bq3 = (const block_iq3_xxs*) vbq + kbx;
+    const int2 q3_packed = make_int2(get_int_b2(bq3->qs, iqs), get_int_b2(bq3->qs, iqs + 1));
+    const uint8_t* q3 = (const uint8_t*) &q3_packed;
+    const uint32_t aux32 = get_int_b2(bq3->qs, QK_K / 16 + iqs / 2);
+    int sumi = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const int2 grid_pos = make_int2(grid[q3[l0 + 0]], grid[q3[l0 + 1]]);
+        const uint32_t signs = unpack_ksigns(aux32 >> (7 * l0 / 2));
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        if constexpr (SG == 1) {
+            const int m0 = nib_mask(signs), m1 = nib_mask(signs >> 4);
+            sumi = ggml_cuda_dp4a(grid_pos.x ^ m0, u0, sumi);
+            sumi = ggml_cuda_dp4a(grid_pos.y ^ m1, u1, sumi);
+            sumi -= ggml_cuda_dp4a(m1, u1, ggml_cuda_dp4a(m0, u0, 0));
+        } else {
+            const int signs0 = __vcmpne4(signs & 0x08040201, 0);
+            const int grid_l = __vsub4(grid_pos.x ^ signs0, signs0);
+            const int signs1 = __vcmpne4(signs & 0x80402010, 0);
+            const int grid_h = __vsub4(grid_pos.y ^ signs1, signs1);
+            sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
+            sumi = ggml_cuda_dp4a(grid_h, u1, sumi);
+        }
+    }
+    const int ls = aux32 >> 28;
+    sumi = (ls * sumi + sumi / 2) / 2;
+    const float d = __half2float(bq3->d) * __low2float(bq8_1[iqs / 2].ds);
+    return d * sumi;
+} };
+template<int SG> struct DotG<21, SG> { __device__ static __forceinline__ float f(const void* vbq, const block_q8_1* bq8_1, int kbx, int iqs,
+                                                      const uint32_t* grid) {
+    const block_iq3_s* bq3 = (const block_iq3_s*) vbq + kbx;
+    const int2 qs_packed = make_int2(get_int_b2(bq3->qs, iqs + 0), get_int_b2(bq3->qs, iqs + 1));
+    const uint8_t* qs = (const uint8_t*) &qs_packed;
+    const int qh = bq3->qh[iqs / 2];
+    const int signs_packed_32 = get_int_b2(bq3->signs, iqs / 2);
+    const uint8_t* signs_packed_8 = (const uint8_t*) &signs_packed_32;
+    int sumi = 0;
+#pragma unroll
+    for (int l0 = 0; l0 < 8; l0 += 2) {
+        const int2 grid_pos = make_int2(grid[qs[l0 + 0] | ((qh << (8 - l0)) & 0x100)],
+                                        grid[qs[l0 + 1] | ((qh << (7 - l0)) & 0x100)]);
+        const int u0 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 0);
+        const int u1 = get_int_b4(bq8_1[iqs / 2].qs, l0 + 1);
+        if constexpr (SG == 1) {
+            const int m0 = nib_mask(signs_packed_8[l0 / 2]), m1 = nib_mask(signs_packed_8[l0 / 2] >> 4);
+            sumi = ggml_cuda_dp4a(grid_pos.x ^ m0, u0, sumi);
+            sumi = ggml_cuda_dp4a(grid_pos.y ^ m1, u1, sumi);
+            sumi -= ggml_cuda_dp4a(m1, u1, ggml_cuda_dp4a(m0, u0, 0));
+        } else {
+            const int signs0 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x03) << 7) | ((signs_packed_8[l0 / 2] & 0x0C) << 21), 0x00000000);
+            const int signs1 = __vcmpne4(((signs_packed_8[l0 / 2] & 0x30) << 3) | ((signs_packed_8[l0 / 2] & 0xC0) << 17), 0x00000000);
+            const int grid_l = __vsub4(grid_pos.x ^ signs0, signs0);
+            const int grid_h = __vsub4(grid_pos.y ^ signs1, signs1);
+            sumi = ggml_cuda_dp4a(grid_l, u0, sumi);
+            sumi = ggml_cuda_dp4a(grid_h, u1, sumi);
+        }
+    }
+    sumi *= 1 + 2 * ((bq3->scales[iqs / 4] >> ((iqs << 1) & 0x04)) & 0x0F);
+    const float d = __half2float(bq3->d) * __low2float(bq8_1[iqs / 2].ds);
+    return d * sumi;
+} };
+
+template<int SG> struct DotG<23, SG> { __device__ static __forceinline__ float f(const void* vbq, const block_q8_1* bq8_1, int kbx, int iqs,
+                                                      const uint32_t*) { return vec_dot_iq4_xs_q8_1(vbq, bq8_1, kbx, iqs); } };
+
+constexpr int LDS_RB = 64;    // gate/up rows per block (4 R2 passes of 16)
+constexpr int LDS_NT = 4;     // entries whose activations sit in LDS at once
+
+template<int TG, int SG, bool TI = false>
+__global__ void __launch_bounds__(256) native_gu_lds_kernel(const unsigned long long* __restrict__ grp_ptr,
+                                                            const int32_t* __restrict__ grp_start,
+                                                            const int32_t* __restrict__ n_groups,
+                                                            const int32_t* __restrict__ ent_tok,
+                                                            const block_q8_1* __restrict__ xq, NativeExpertLayout L,
+                                                            float* __restrict__ gate, float* __restrict__ up) {
+    using GT = typename GridOf<TG>::T;
+    using F = Fmt<TG>;
+    __shared__ GT sgrid[GridOf<TG>::N];
+    extern __shared__ int sx_raw[];   // LDS_NT tokens x xb blocks of q8_1 (36 bytes = 9 ints each)
+    const int g = blockIdx.y;
+    if (g >= *n_groups) return;       // uniform over the block
+    const int tid = threadIdx.x, lane = tid & 31, warp = tid >> 5;
+    const GT* gsrc = GridOf<TG>::src();
+    for (int i = tid; i < GridOf<TG>::N; i += 256) sgrid[i] = gsrc[i];
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int nb = (int) (L.n_embd / F::qk), xb = (int) (L.n_embd / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    const int nrow = 2 * (int) L.n_ff;
+    const block_q8_1* sx = (const block_q8_1*) sx_raw;
+    auto wrow = [&](int row) -> const uint8_t* {
+        const bool is_up = row >= L.n_ff;
+        return blob + (is_up ? L.up_off : 0) + (size_t) (is_up ? row - (int) L.n_ff : row) * L.gu_row;
+    };
+    auto put = [&](int row, int e, float v) {
+        const bool is_up = row >= L.n_ff;
+        (is_up ? up : gate)[(size_t) e * L.n_ff + (is_up ? row - (int) L.n_ff : row)] = v;
+    };
+    for (int c0 = e0; c0 < e1; c0 += LDS_NT) {
+        const int cn = min(LDS_NT, e1 - c0);
+        __syncthreads();
+        for (int j = 0; j < cn; ++j) {
+            const int* src = (const int*) (xq + (size_t) ent_tok[c0 + j] * xb);
+            for (int i = tid; i < xb * 9; i += 256) sx_raw[j * xb * 9 + i] = src[i];
+        }
+        __syncthreads();
+        for (int p = 0; p < LDS_RB / 16; ++p) {
+            const int row0 = blockIdx.x * LDS_RB + p * 16 + warp, row1 = row0 + 8;
+            if (row0 >= nrow) break;
+            const bool two = row1 < nrow;
+            const uint8_t* w0 = wrow(row0);
+            const uint8_t* w1 = wrow(two ? row1 : row0);
+            if constexpr (TI) {   // mode 7: the tokens inside the k loop - one weight load per k for all of them
+                auto pass = [&](auto ntc) {
+                    constexpr int NTC = decltype(ntc)::value;
+                    float s0[NTC], s1[NTC];
+#pragma unroll
+                    for (int j = 0; j < NTC; ++j) { s0[j] = 0.0f; s1[j] = 0.0f; }
+                    for (int k = lane; k < nb * F::ipb; k += 32) {
+                        const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+#pragma unroll
+                        for (int j = 0; j < NTC; ++j) {
+                            const block_q8_1* xk = sx + (size_t) j * xb + kbx * (F::qk / 32);
+                            const float a = DotG<TG, SG>::f(w0, xk, kbx, iqs, sgrid);
+                            const float b = DotG<TG, SG>::f(w1, xk, kbx, iqs, sgrid);
+                            s0[j] += a;
+                            s1[j] += b;
+                        }
+                    }
+#pragma unroll
+                    for (int j = 0; j < NTC; ++j) {
+                        const float a = warp_sum(s0[j]), b = warp_sum(s1[j]);
+                        if (lane == 0) { put(row0, c0 + j, a); if (two) put(row1, c0 + j, b); }
+                    }
+                };
+                switch (cn) {
+                    case 1: pass(std::integral_constant<int, 1>{}); break;
+                    case 2: pass(std::integral_constant<int, 2>{}); break;
+                    case 3: pass(std::integral_constant<int, 3>{}); break;
+                    default: pass(std::integral_constant<int, 4>{}); break;
+                }
+                continue;
+            }
+            for (int j = 0; j < cn; ++j) {
+                const block_q8_1* x = sx + (size_t) j * xb;
+                float s0 = 0.0f, s1 = 0.0f;
+                for (int k = lane; k < nb * F::ipb; k += 32) {
+                    const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+                    const block_q8_1* xk = x + kbx * (F::qk / 32);
+                    const float a = DotG<TG, SG>::f(w0, xk, kbx, iqs, sgrid);
+                    const float b = DotG<TG, SG>::f(w1, xk, kbx, iqs, sgrid);
+                    s0 += a;
+                    s1 += b;
+                }
+                s0 = warp_sum(s0);
+                s1 = warp_sum(s1);
+                if (lane == 0) { put(row0, c0 + j, s0); if (two) put(row1, c0 + j, s1); }
+            }
+        }
+    }
+}
+
+// ---- 7 (down): the group's q8_1 h rows in LDS, the tokens inside the k loop, the R2 row pairs of mode 2 -
+// the same per-(row, entry) sums in the same order: bitwise the mode-2 output.
+template<int TD>
+__global__ void __launch_bounds__(256) native_down_lds_kernel(const unsigned long long* __restrict__ grp_ptr,
+                                                              const int32_t* __restrict__ grp_start,
+                                                              const int32_t* __restrict__ n_groups,
+                                                              const int32_t* __restrict__ ent_dst,
+                                                              const block_q8_1* __restrict__ hq, NativeExpertLayout L,
+                                                              float* __restrict__ out) {
+    using F = Fmt<TD>;
+    extern __shared__ int sh_raw[];   // LDS_NT entries x hb blocks of q8_1
+    const int g = blockIdx.y;
+    if (g >= *n_groups) return;
+    const int tid = threadIdx.x, lane = tid & 31, warp = tid >> 5;
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int nb = (int) (L.n_ff / F::qk), hb = (int) (L.n_ff / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    const int nrow = (int) L.n_embd;
+    const block_q8_1* sh = (const block_q8_1*) sh_raw;
+    for (int c0 = e0; c0 < e1; c0 += LDS_NT) {
+        const int cn = min(LDS_NT, e1 - c0);
+        __syncthreads();
+        {
+            const int* src = (const int*) (hq + (size_t) c0 * hb);   // the chunk's entries are contiguous
+            for (int i = tid; i < cn * hb * 9; i += 256) sh_raw[i] = src[i];
+        }
+        __syncthreads();
+        for (int p = 0; p < LDS_RB / 16; ++p) {
+            const int r0 = blockIdx.x * LDS_RB + p * 16 + warp, r1 = r0 + 8;
+            if (r0 >= nrow) break;
+            const bool two = r1 < nrow;
+            const uint8_t* w0 = blob + L.down_off + (size_t) r0 * L.d_row;
+            const uint8_t* w1 = blob + L.down_off + (size_t) (two ? r1 : r0) * L.d_row;
+            auto pass = [&](auto ntc) {
+                constexpr int NTC = decltype(ntc)::value;
+                float s0[NTC], s1[NTC];
+#pragma unroll
+                for (int j = 0; j < NTC; ++j) { s0[j] = 0.0f; s1[j] = 0.0f; }
+                for (int k = lane; k < nb * F::ipb; k += 32) {
+                    const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+#pragma unroll
+                    for (int j = 0; j < NTC; ++j) {
+                        const block_q8_1* xk = sh + (size_t) j * hb + kbx * (F::qk / 32);
+                        const float a = F::dot(w0, xk, kbx, iqs);
+                        const float b = F::dot(w1, xk, kbx, iqs);
+                        s0[j] += a;
+                        s1[j] += b;
+                    }
+                }
+#pragma unroll
+                for (int j = 0; j < NTC; ++j) {
+                    const float a = warp_sum(s0[j]), b = warp_sum(s1[j]);
+                    if (lane == 0) {
+                        out[(size_t) ent_dst[c0 + j] * L.n_embd + r0] = a;
+                        if (two) out[(size_t) ent_dst[c0 + j] * L.n_embd + r1] = b;
+                    }
+                }
+            };
+            switch (cn) {
+                case 1: pass(std::integral_constant<int, 1>{}); break;
+                case 2: pass(std::integral_constant<int, 2>{}); break;
+                case 3: pass(std::integral_constant<int, 3>{}); break;
+                default: pass(std::integral_constant<int, 4>{}); break;
+            }
+        }
+    }
+}
+
+// ---- 8: mode 7's gate/up with SwiGLU and the q8_1 quantization in the epilogue.  A block takes h rows
+// [r0, r0 + 32): gate rows r0.. and up rows r0.. (64 weight rows, the same per-(row, entry) sums as mode 7), so
+// one 32-lane warp per entry holds exactly one q8_1 block of h and runs quantize_q8_1_kernel's own code on it -
+// bitwise the separate kernels' hq, two launches fewer per call.
+template<int TG>
+__global__ void __launch_bounds__(256) native_gu_fused_kernel(const unsigned long long* __restrict__ grp_ptr,
+                                                              const int32_t* __restrict__ grp_start,
+                                                              const int32_t* __restrict__ n_groups,
+                                                              const int32_t* __restrict__ ent_tok,
+                                                              const block_q8_1* __restrict__ xq, NativeExpertLayout L,
+                                                              block_q8_1* __restrict__ hq) {
+    using GT = typename GridOf<TG>::T;
+    using F = Fmt<TG>;
+    __shared__ GT sgrid[GridOf<TG>::N];
+    __shared__ float res[LDS_NT][64];
+    extern __shared__ int sx_raw[];
+    const int g = blockIdx.y;
+    if (g >= *n_groups) return;
+    const int tid = threadIdx.x, lane = tid & 31, warp = tid >> 5;
+    const GT* gsrc = GridOf<TG>::src();
+    for (int i = tid; i < GridOf<TG>::N; i += 256) sgrid[i] = gsrc[i];
+    const uint8_t* blob = (const uint8_t*) grp_ptr[g];
+    const int nb = (int) (L.n_embd / F::qk), xb = (int) (L.n_embd / 32), hb = (int) (L.n_ff / 32);
+    const int e0 = grp_start[g], e1 = grp_start[g + 1];
+    const int r0 = blockIdx.x * 32;
+    const block_q8_1* sx = (const block_q8_1*) sx_raw;
+    auto wrow = [&](int i) -> const uint8_t* {   // i < 32: gate row r0 + i, else up row r0 + i - 32
+        return blob + (i < 32 ? (size_t) 0 : L.up_off) + (size_t) (r0 + (i & 31)) * L.gu_row;
+    };
+    for (int c0 = e0; c0 < e1; c0 += LDS_NT) {
+        const int cn = min(LDS_NT, e1 - c0);
+        __syncthreads();
+        for (int j = 0; j < cn; ++j) {
+            const int* src = (const int*) (xq + (size_t) ent_tok[c0 + j] * xb);
+            for (int i = tid; i < xb * 9; i += 256) sx_raw[j * xb * 9 + i] = src[i];
+        }
+        __syncthreads();
+        for (int p = 0; p < 4; ++p) {
+            const int i0 = p * 16 + warp, i1 = i0 + 8;
+            const uint8_t* w0 = wrow(i0);
+            const uint8_t* w1 = wrow(i1);
+            auto pass = [&](auto ntc) {
+                constexpr int NTC = decltype(ntc)::value;
+                float s0[NTC], s1[NTC];
+#pragma unroll
+                for (int j = 0; j < NTC; ++j) { s0[j] = 0.0f; s1[j] = 0.0f; }
+                for (int k = lane; k < nb * F::ipb; k += 32) {
+                    const int kbx = k / F::ipb, iqs = F::step * (k % F::ipb);
+#pragma unroll
+                    for (int j = 0; j < NTC; ++j) {
+                        const block_q8_1* xk = sx + (size_t) j * xb + kbx * (F::qk / 32);
+                        const float a = DotG<TG, 1>::f(w0, xk, kbx, iqs, sgrid);
+                        const float b = DotG<TG, 1>::f(w1, xk, kbx, iqs, sgrid);
+                        s0[j] += a;
+                        s1[j] += b;
+                    }
+                }
+#pragma unroll
+                for (int j = 0; j < NTC; ++j) {
+                    const float a = warp_sum(s0[j]), b = warp_sum(s1[j]);
+                    if (lane == 0) { res[j][i0] = a; res[j][i1] = b; }
+                }
+            };
+            switch (cn) {
+                case 1: pass(std::integral_constant<int, 1>{}); break;
+                case 2: pass(std::integral_constant<int, 2>{}); break;
+                case 3: pass(std::integral_constant<int, 3>{}); break;
+                default: pass(std::integral_constant<int, 4>{}); break;
+            }
+        }
+        __syncthreads();
+        if (warp < cn) {   // swiglu_entries_kernel + quantize_q8_1_kernel, one block of 32 h values per entry
+            const float gg = res[warp][lane], uu = res[warp][32 + lane];
+            const float xi = (gg / (1.0f + __expf(-gg))) * uu;
+            float amax = fabsf(xi), sum = xi;
+#pragma unroll
+            for (int o = 16; o > 0; o >>= 1) {
+                amax = fmaxf(amax, __shfl_xor_sync(0xffffffffu, amax, o));
+                sum += __shfl_xor_sync(0xffffffffu, sum, o);
+            }
+            const float d = amax / 127.0f;
+            const int8_t q = amax == 0.0f ? 0 : roundf(xi / d);
+            block_q8_1* y = hq + (size_t) (c0 + warp) * hb + blockIdx.x;
+            y->qs[lane] = q;
+            if (lane == 0) y->ds = make_half2(d, sum);
+        }
+    }
+}
+
+int g_exp_mode = -1;   // native_expert_set_mode (the bench); -1 = STRATA_EXP_MODE, default 7
+int exp_mode() {
+    static const int m = [] { const char* v = std::getenv("STRATA_EXP_MODE"); return v ? std::atoi(v) : 7; }();
+    return g_exp_mode >= 0 ? g_exp_mode : m;
+}
+#endif
+int g_exp_phase = 0;   // the bench: 0 all, 1 gate/up + swiglu + quantize only, 2 down only
+
+void native_expert_set_mode(int mode, int phase) {
+#if defined(STRATA_HIP_GFX906)
+    g_exp_mode = mode;
+#else
+    (void) mode;
+#endif
+    g_exp_phase = phase;
+}
+
 namespace {
 bool g_grouped_v1 = env_on("STRATA_GROUPED_V1");
 }  // namespace
@@ -1555,15 +2123,74 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     const bool v1 = g_grouped_v1;
     const int64_t gy = (v1 || grid_groups <= 0 || grid_groups > cap_groups) ? cap_groups : grid_groups;
     const dim3 ggu((unsigned) ((2 * L.n_ff + GU_ROWS - 1) / GU_ROWS), (unsigned) gy);
+#if defined(STRATA_HIP_GFX906)
+    const int em0 = exp_mode();
+#endif
+#if defined(STRATA_HIP_GFX906)
+    const bool fused_gu = em0 == 8 && (L.gu_type == 18 || L.gu_type == 21 || L.gu_type == 22 || L.gu_type == 23) &&
+                          L.n_ff % 32 == 0;
+    if (fused_gu && g_exp_phase != 2) {
+        const dim3 gl((unsigned) (L.n_ff / 32), (unsigned) cap_groups);
+        const size_t sh = (size_t) LDS_NT * (size_t) (L.n_embd / 32) * sizeof(block_q8_1);
+        switch (L.gu_type) {
+            case 18: native_gu_fused_kernel<18><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, hq); break;
+            case 21: native_gu_fused_kernel<21><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, hq); break;
+            case 23: native_gu_fused_kernel<23><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, hq); break;
+            default: native_gu_fused_kernel<22><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, hq); break;
+        }
+        check("native_expert_grouped/gu fused");
+    }
+    if (g_exp_phase != 2 && !fused_gu) {
+#else
+    if (g_exp_phase != 2) {
+#endif
+#if defined(STRATA_HIP_GFX906)
+    const bool lds_gu = (em0 == 5 || em0 == 6 || em0 == 7 || em0 == 8) && (L.gu_type == 18 || L.gu_type == 21 || L.gu_type == 22 || L.gu_type == 23);
+    if (lds_gu) {
+        const dim3 gl((unsigned) ((2 * L.n_ff + LDS_RB - 1) / LDS_RB), (unsigned) cap_groups);
+        const size_t sh = (size_t) LDS_NT * (size_t) (L.n_embd / 32) * sizeof(block_q8_1);
+        switch (L.gu_type) {
+            case 18: if (em0 >= 7) native_gu_lds_kernel<18, 1, true><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else if (em0 == 6) native_gu_lds_kernel<18, 1><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else native_gu_lds_kernel<18, 0><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+            case 21: if (em0 >= 7) native_gu_lds_kernel<21, 1, true><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else if (em0 == 6) native_gu_lds_kernel<21, 1><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else native_gu_lds_kernel<21, 0><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+            case 23: if (em0 >= 7) native_gu_lds_kernel<23, 1, true><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else native_gu_lds_kernel<23, 1><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+            default: if (em0 >= 7) native_gu_lds_kernel<22, 1, true><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else if (em0 == 6) native_gu_lds_kernel<22, 1><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); else native_gu_lds_kernel<22, 0><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+        }
+    } else {
+    const int em = exp_mode() >= 5 ? 2 : exp_mode();
+    const dim3 ggu_amd((unsigned) ((2 * L.n_ff + (em == 1 ? 3 : em == 4 ? 31 : 15)) / (em == 1 ? 4 : em == 4 ? 32 : 16)), (unsigned) cap_groups);
+#define STRATA_GU_AMD(T) \
+    case T: if (em == 1) native_gu_amd_kernel<T, 1><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); \
+            else if (em == 4) native_gu_amd_kernel<T, 4><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); \
+            else native_gu_amd_kernel<T, 2><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
+    if (em == 1 || em == 2 || em == 4) {
+        switch (L.gu_type) {
+            STRATA_GU_AMD(16) STRATA_GU_AMD(17) STRATA_GU_AMD(18) STRATA_GU_AMD(21) STRATA_GU_AMD(22) STRATA_GU_AMD(23)
+            STRATA_GU_AMD(29) STRATA_GU_AMD(42)
+            default: std::fprintf(stderr, "native_expert_grouped: gate/up type %d\n", L.gu_type); std::exit(1);
+        }
+    } else
+#undef STRATA_GU_AMD
+#endif
     switch (L.gu_type) {
 #define STRATA_GU(T) case T: launch_gu<T>(ggu, s, grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
         STRATA_GU_FMTS(STRATA_GU)
 #undef STRATA_GU
         default: std::fprintf(stderr, "native_expert_grouped: gate/up type %d\n", L.gu_type); std::exit(1);
     }
+#if defined(STRATA_HIP_GFX906)
+    }
+#endif
     check("native_expert_grouped/gu");
     const long long nh = (long long) cap_entries * L.n_ff;
-    if (v1) {
+#if defined(STRATA_HIP_GFX906)
+    // gfx906: the separate SwiGLU and q8_1 passes stay the default (the A/B baseline); the RDNA one-pass
+    // kernel (bitwise the same) with STRATA_HIP_SWIGLU_FUSED=1
+    static const bool sw_fused = env_on("STRATA_HIP_SWIGLU_FUSED");
+    const bool sw_v1 = v1 || !sw_fused;
+#else
+    const bool sw_v1 = v1;
+#endif
+    if (sw_v1) {
         swiglu_entries_kernel<<<(unsigned) ((nh + 255) / 256), 256, 0, s>>>(gate, up, h, nh);
         quantize_q8_1_kernel<<<(unsigned) ((nh + 255) / 256), 256, 0, s>>>(h, hq, nh);
     } else {
@@ -1571,7 +2198,32 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
                                                                                 (int) L.n_ff, hq);
     }
     check("native_expert_grouped/swiglu");
+    }
+    if (g_exp_phase == 1) return;
     const dim3 gd((unsigned) ((L.n_embd + 7) / 8), (unsigned) gy);
+#if defined(STRATA_HIP_GFX906)
+    if ((em0 == 7 || em0 == 8) && (L.d_type == 20 || L.d_type == 42)) {
+        const dim3 gl((unsigned) ((L.n_embd + LDS_RB - 1) / LDS_RB), (unsigned) cap_groups);
+        const size_t sh = (size_t) LDS_NT * (size_t) (L.n_ff / 32) * sizeof(block_q8_1);
+        if (L.d_type == 20) native_down_lds_kernel<20><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out);
+        else native_down_lds_kernel<42><<<gl, 256, sh, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out);
+        check("native_expert_grouped/down");
+        return;
+    }
+    const int em = exp_mode() >= 5 ? 2 : exp_mode();
+    const dim3 gd_amd((unsigned) ((L.n_embd + (em == 1 ? 3 : em == 4 ? 31 : 15)) / (em == 1 ? 4 : em == 4 ? 32 : 16)), (unsigned) cap_groups);
+#define STRATA_D_AMD(T) \
+    case T: if (em == 1) native_down_amd_kernel<T, 1><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); \
+            else if (em == 4) native_down_amd_kernel<T, 4><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); \
+            else native_down_amd_kernel<T, 2><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
+    if (em == 1 || em == 2 || em == 4) {
+        switch (L.d_type) {
+            STRATA_D_AMD(20) STRATA_D_AMD(23) STRATA_D_AMD(42)
+            default: std::fprintf(stderr, "native_expert_grouped: down type %d\n", L.d_type); std::exit(1);
+        }
+    } else
+#undef STRATA_D_AMD
+#endif
     switch (L.d_type) {
 #define STRATA_DOWN(T) case T: launch_down<T>(gd, s, grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
         STRATA_D_FMTS(STRATA_DOWN)
diff --git a/src/kernels/cuda/native_mmvq.cu b/src/kernels/cuda/native_mmvq.cu
index 84748179a7e..c17862e290e 100644
--- a/src/kernels/cuda/native_mmvq.cu
+++ b/src/kernels/cuda/native_mmvq.cu
@@ -32,6 +32,7 @@
 #include <cuda_runtime.h>
 
 #include <cstdint>
+#include <cstdlib>
 #include <limits>
 #include <stdexcept>
 #include <string>
@@ -418,6 +419,17 @@ __device__ __align__(4) int8_t iq4nl_values[16] = {
 };
 
 __device__ __forceinline__ int2 iq4_table_lookup(int q4) {
+#if defined(STRATA_HIP_GFX906)
+    // AMD: llama.cpp's HIP lookup (see iq_kernels.cu get_int_from_table_16): 4 v_perm_b32 per 8 values
+    const uint32_t* v32 = reinterpret_cast<const uint32_t*>(iq4nl_values);
+    const uint32_t q_even = (uint32_t) q4, q_odd = (uint32_t) q4 >> 4;
+    const uint32_t el = __builtin_amdgcn_perm(v32[1], v32[0], q_even & 0x07070707u);
+    const uint32_t ol = __builtin_amdgcn_perm(v32[1], v32[0], q_odd & 0x07070707u);
+    const uint32_t eh = __builtin_amdgcn_perm(v32[3], v32[2], q_even & 0x07070707u);
+    const uint32_t oh = __builtin_amdgcn_perm(v32[3], v32[2], q_odd & 0x07070707u);
+    return make_int2((int) __builtin_amdgcn_perm(eh, el, 0x03020100u | ((q_even & 0x08080808u) >> 1)),
+                     (int) __builtin_amdgcn_perm(oh, ol, 0x03020100u | ((q_odd & 0x08080808u) >> 1)));
+#else
     const uint32_t* table32 = reinterpret_cast<const uint32_t*>(iq4nl_values);
     uint32_t tmp[2];
     const uint32_t low_high_selection_indices = 0x32103210 | ((q4 & 0x88888888) >> 1);
@@ -429,6 +441,7 @@ __device__ __forceinline__ int2 iq4_table_lookup(int q4) {
         tmp[i] = __byte_perm(low, high, low_high_selection_indices >> shift);
     }
     return make_int2(__byte_perm(tmp[0], tmp[1], 0x6420), __byte_perm(tmp[0], tmp[1], 0x7531));
+#endif
 }
 
 // Exact pinned vec_dot_iq4_xs_q8_1: a lane consumes one 32-element subblock,
@@ -1099,6 +1112,77 @@ void launch_check() {
     }
 }
 
+
+#if defined(STRATA_HIP_GFX906)
+// ---- AMD (wave64) layout: one wavefront per R rows, four wavefronts per block, the row's blocks strided over the
+// 64 lanes exactly as the CUDA kernels stride them over a block (kbx = lane / T, stride 64 / T), and a 64-lane
+// butterfly instead of the LDS partials and __syncthreads of the one-block-per-row layout: on gfx906 a block per
+// 2 KB row spent most of its time being launched and joined.  The SAME kernel serves every column count 1..8, so a
+// column's sums do not depend on how many columns (verify tokens) ride along.  STRATA_MMVQ_WAVE=0: the CUDA layout.
+bool g_wave_off = std::getenv("STRATA_MMVQ_WAVE") && std::string(std::getenv("STRATA_MMVQ_WAVE")) == "0";
+template<typename F, int NCOLS, int R>
+__launch_bounds__(256)
+__global__ void native_mmvq_wave_kernel(const typename F::Block* __restrict__ w, const Q81Block* __restrict__ x,
+                                        float* __restrict__ y, int n_in, int n_out) {
+    constexpr int BPIW = 64 / F::T;
+    static_assert(64 % F::T == 0, "a block's threads must tile the wavefront");
+    const int lane = int(threadIdx.x) & 63;
+    const int row0 = (int(blockIdx.x) * 4 + (int(threadIdx.x) >> 6)) * R;
+    if (row0 >= n_out) return;
+    const int blocks_per_row = n_in / F::DIV;
+    const int x_stride = n_in / Q8K;
+    const int kqs = F::kqs(lane);
+    float tmp[NCOLS][R] = {};
+    for (int kbx = lane / F::T; kbx < blocks_per_row; kbx += BPIW) {
+        const int kby = kbx * F::KBY;
+#pragma unroll
+        for (int i = 0; i < R; ++i) {
+            if (row0 + i < n_out) {
+                const typename F::W wv = F::load(w + std::size_t(row0 + i) * blocks_per_row + kbx, kqs);
+#pragma unroll
+                for (int j = 0; j < NCOLS; ++j) tmp[j][i] += F::apply(wv, x + std::size_t(j) * x_stride + kby, kqs);
+            }
+        }
+    }
+#pragma unroll
+    for (int j = 0; j < NCOLS; ++j)
+#pragma unroll
+        for (int i = 0; i < R; ++i) {
+            float v = tmp[j][i];
+#pragma unroll
+            for (int off = 32; off > 0; off >>= 1) v += __shfl_xor(v, off, 64);
+            if (lane == 0 && row0 + i < n_out) y[std::size_t(j) * n_out + row0 + i] = v;
+        }
+}
+template<typename F, int NCOLS>
+void wave_launch_n(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, cudaStream_t s) {
+    const auto* w = static_cast<const typename F::Block*>(weights);
+    const auto* x = static_cast<const Q81Block*>(x_q8_1);
+    constexpr int R = 1;
+    const unsigned blocks = unsigned((std::size_t(n_out) + 4 * R - 1) / (4 * R));
+    native_mmvq_wave_kernel<F, NCOLS, R><<<blocks, 256, 0, s>>>(w, x, y, n_in, n_out);
+}
+template<typename F>
+void wave_launch(const void* weights, const void* x_q8_1, float* y, int n_in, int n_out, int ncols, void* stream) {
+    const auto s = static_cast<cudaStream_t>(stream);
+    switch (ncols) {
+        case 1: wave_launch_n<F, 1>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 2: wave_launch_n<F, 2>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 3: wave_launch_n<F, 3>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 4: wave_launch_n<F, 4>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 5: wave_launch_n<F, 5>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 6: wave_launch_n<F, 6>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 7: wave_launch_n<F, 7>(weights, x_q8_1, y, n_in, n_out, s); break;
+        case 8: wave_launch_n<F, 8>(weights, x_q8_1, y, n_in, n_out, s); break;
+        default: throw std::invalid_argument("native MMVQ (wave) requires 1 <= ncols <= 8");
+    }
+}
+#define STRATA_WAVE_MMVQ(...) \
+    if (!g_wave_off) { wave_launch<__VA_ARGS__>(weights, x_q8_1, y, n_in, n_out, ncols, stream); launch_check(); return; }
+#else
+#define STRATA_WAVE_MMVQ(...)
+#endif
+
 template<typename Weight, int Qi>
 void small_mmvq(const void* weights, const void* x_q8_1, float* y,
                 int n_in, int n_out, int ncols, void* stream) {
@@ -1108,6 +1192,7 @@ void small_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(SmallTraits<Weight, Qi>)
     if (ncols > 1) {
         launch_multi<SmallTraits<Weight, Qi>>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1172,6 +1257,7 @@ void native_q5_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(Q5KTraits)
     if (ncols > 1) {
         launch_multi<Q5KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1212,6 +1298,7 @@ void native_q2_0_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(Q20Traits)
     if (ncols > 1) {
         launch_multi<Q20Traits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1251,6 +1338,7 @@ void native_q3_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(Q3KTraits)
     if (ncols > 1) {
         launch_multi<Q3KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1290,6 +1378,7 @@ void native_iq4_xs_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(IQ4XSTraits)
     if (ncols > 1) {
         launch_multi<IQ4XSTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1329,6 +1418,7 @@ void native_q4_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(Q4KTraits)
     if (ncols > 1) {
         launch_multi<Q4KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
@@ -1368,6 +1458,7 @@ void native_q6_k_mmvq(const void* weights, const void* x_q8_1, float* y,
     validate_pointer(x_q8_1);
     validate_pointer(y);
     validate_stream(stream);
+    STRATA_WAVE_MMVQ(Q6KTraits)
     if (ncols > 1) {
         launch_multi<Q6KTraits>(weights, x_q8_1, y, n_in, n_out, ncols, stream);
         launch_check();
diff --git a/src/kernels/cuda/qsa_prompt_attn.cu b/src/kernels/cuda/qsa_prompt_attn.cu
index 8062176c314..9b481929c55 100644
--- a/src/kernels/cuda/qsa_prompt_attn.cu
+++ b/src/kernels/cuda/qsa_prompt_attn.cu
@@ -1412,6 +1412,9 @@ bool qsa_prompt_attn_batch(const float* q, const QsaAttnPools& pools, const int3
         // no cp.async, so it runs the v1 kernel (launch<1>, same accuracy, another summation order).  An older card
         // keeps the old kernel.
         // #371: the compute capability with its minor - sm_70 (V100) has no m16n8k8 (the kernels trap below sm_75)
+#if defined(STRATA_HIP_GFX906)
+        return false;   // gfx906: the tensor-core and WMMA kernels are not for it; the FP32 kernel runs
+#endif
         static int cc[64] = {};
         int dev = 0;
         if (cudaGetDevice(&dev) != cudaSuccess || dev < 0 || dev >= 64) { cudaGetLastError(); return false; }
diff --git a/src/kernels/cuda/router_top10.cu b/src/kernels/cuda/router_top10.cu
index f23a63d78e5..720cec67dc3 100644
--- a/src/kernels/cuda/router_top10.cu
+++ b/src/kernels/cuda/router_top10.cu
@@ -186,6 +186,83 @@ __global__ void router_top10_kernel(const float* __restrict__ logits, int n_toke
     }
 }
 
+
+#if defined(STRATA_HIP_GFX906)
+// AMD (wave64): the same routing in ONE wavefront per token.  The block-wide kernel above spends its time in
+// barriers - 10 selection passes with two __syncthreads each over 8 logical warps - not in arithmetic (43 us per
+// token on gfx906).  Here every lane holds up to RW_PER probabilities in registers and each pass is a 64-lane
+// butterfly argmax: no LDS round trip, no block barrier.  Bit-identical to the kernel above: fmaxf trees are
+// exact, the exponentials and the (float) products are the same expressions, the sum stays one serial ascending
+// scan, and the argmax keeps the lowest index on a tie (a total order, so the butterfly's association is free).
+constexpr int RW_PER = 8;   // n_expert <= 64 * 8
+__global__ void __launch_bounds__(64) router_top10_wave_kernel(const float* __restrict__ logits, int n_tokens,
+                                                               int n_expert, int k, int* __restrict__ ids,
+                                                               float* __restrict__ weights) {
+    __shared__ double s_ex[64 * RW_PER];
+    __shared__ double s_sum;
+    const int t = blockIdx.x;
+    if (t >= n_tokens) return;
+    const int lane = threadIdx.x;
+    const float* l = logits + (size_t) t * n_expert;
+    float lv[RW_PER];
+    float mx = -INFINITY;
+#pragma unroll
+    for (int j = 0; j < RW_PER; ++j) {
+        const int e = lane + 64 * j;
+        lv[j] = e < n_expert ? l[e] : -INFINITY;
+        mx = fmaxf(mx, lv[j]);
+    }
+#pragma unroll
+    for (int off = 32; off > 0; off >>= 1) mx = fmaxf(mx, __shfl_xor(mx, off, 64));
+#pragma unroll
+    for (int j = 0; j < RW_PER; ++j) {
+        const int e = lane + 64 * j;
+        if (e < n_expert) s_ex[e] = exp((double) lv[j] - (double) mx);
+    }
+    __syncthreads();
+    if (lane == 0) {
+        double sum = 0.0;
+        for (int e = 0; e < n_expert; ++e) sum += s_ex[e];
+        s_sum = sum;
+    }
+    __syncthreads();
+    const float inv = (float) (1.0 / s_sum);
+    float p[RW_PER];
+#pragma unroll
+    for (int j = 0; j < RW_PER; ++j) {
+        const int e = lane + 64 * j;
+        p[j] = e < n_expert ? (float) (s_ex[e] * inv) : -INFINITY;
+    }
+    unsigned taken = 0;
+    for (int i = 0; i < k; ++i) {
+        float bv = -INFINITY;
+        int bi = n_expert;
+#pragma unroll
+        for (int j = 0; j < RW_PER; ++j) {
+            const int e = lane + 64 * j;
+            if (e >= n_expert || (taken >> j & 1u)) continue;
+            if (p[j] > bv || (p[j] == bv && e < bi)) { bv = p[j]; bi = e; }
+        }
+#pragma unroll
+        for (int off = 32; off > 0; off >>= 1) {
+            const float ov = __shfl_xor(bv, off, 64);
+            const int oi = __shfl_xor(bi, off, 64);
+            if (ov > bv || (ov == bv && oi < bi)) { bv = ov; bi = oi; }
+        }
+        if (bi >= n_expert) break;
+        if ((bi & 63) == lane) taken |= 1u << (bi >> 6);
+        if (lane == 0) { ids[(size_t) t * k + i] = bi; weights[(size_t) t * k + i] = bv; }
+    }
+    if (lane == 0) {
+        double s = 0.0;
+        for (int i = 0; i < k; ++i) s += (double) weights[(size_t) t * k + i];
+        const double sc = fmax(s, 6.103515625e-05);       // 2**-14
+        for (int i = 0; i < k; ++i)
+            weights[(size_t) t * k + i] = (float) ((double) weights[(size_t) t * k + i] / sc);
+    }
+}
+#endif  // STRATA_HIP_GFX906
+
 #if defined(__HIPCC__)
 // ---- S6, AMD: the same router, BIT-IDENTICAL, without its serial parts. Measured on RDNA4 (gfx1201) the kernel
 // above took 39 us per call in decode (16% of the GPU's decode time): the ascending double sum is 512 dependent FP64
@@ -346,7 +423,13 @@ void router_top10(const float* logits, int n_tokens, int n_expert, int k, int* i
                   void* stream) {
 #if defined(__HIPCC__)
     {
+#if defined(STRATA_HIP_GFX906)
+        // gfx906 (wave64): the one-wavefront kernel below stays the default; the S6 kernel is wave32-shaped and only
+        // runs here on request (STRATA_HIP_ROUTER_FAST=1) until it is measured on this card
+        static const bool old = std::getenv("STRATA_HIP_ROUTER_FAST") == nullptr;
+#else
         static const bool old = std::getenv("STRATA_HIP_ROUTER_OLD") != nullptr;
+#endif
         if (!old && n_tokens > 0 && n_expert > 64 && n_expert <= 512 && k > 0 && k <= 32) {
             launch_generic(logits, n_tokens, n_expert, k, ids, weights, stream, 1);
             const cudaError_t e = cudaGetLastError();
@@ -375,6 +458,19 @@ void router_top10(const float* logits, int n_tokens, int n_expert, int k, int* i
                      RT_MAX_THREADS * 64);
         std::exit(1);
     }
+#if defined(STRATA_HIP_GFX906)
+    if (n_expert <= 64 * RW_PER && !std::getenv("STRATA_ROUTER_BLOCK")) {
+        router_top10_wave_kernel<<<(unsigned) n_tokens, 64, 0, (cudaStream_t) stream>>>(logits, n_tokens, n_expert, k,
+                                                                                       ids, weights);
+        const cudaError_t e = cudaGetLastError();
+        if (e != cudaSuccess) {
+            std::fprintf(stderr, "router_top10 launch: %s\n", cudaGetErrorString(e));
+            std::exit(1);
+        }
+        if (stream == nullptr && cudaDeviceSynchronize() != cudaSuccess) std::exit(1);
+        return;
+    }
+#endif
     int threads = n_expert < RT_MAX_THREADS ? n_expert : RT_MAX_THREADS;
     threads = (threads + 31) & ~31;                  // at least one full warp, for the reductions
     // the selection's taken-mask, then n_expert doubles for the exponentials, then n_expert floats for the
diff --git a/src/kernels/cuda/verify_kernels.cu b/src/kernels/cuda/verify_kernels.cu
index 7908ce404f3..e81d211fac7 100644
--- a/src/kernels/cuda/verify_kernels.cu
+++ b/src/kernels/cuda/verify_kernels.cu
@@ -545,7 +545,9 @@ void copy_indexed(float* dst, const float* src, int64_t stride, const int32_t* i
 // a GPU timestamp (ns, %globaltimer) into buf[i] - the verify window's stage profiler
 namespace { __global__ void gpu_stamp_kernel(unsigned long long* buf, int i) {
     unsigned long long t;
-#if defined(__HIPCC__)
+#if defined(STRATA_HIP_GFX906)
+    t = wall_clock64() * 40ull;   // gfx906: the wall clock runs at 25 MHz (hipDeviceAttributeWallClockRate) -> ns
+#elif defined(__HIPCC__)
     t = wall_clock64() * 10ull;   // gfx10.3 / gfx11 / gfx12: a constant 100 MHz counter, in ns
 #else
     asm volatile("mov.u64 %0, %%globaltimer;" : "=l"(t));
diff --git a/src/kernels/fused_gr_bench.cpp b/src/kernels/fused_gr_bench.cpp
new file mode 100644
index 00000000000..b7b8452f3a3
--- /dev/null
+++ b/src/kernels/fused_gr_bench.cpp
@@ -0,0 +1,116 @@
+// src/kernels/fused_gr_bench.cpp - fused_gr_read_multi: the AMD fast kernels (STRATA_GR_FAST) against the old
+// ones, bit for bit on every output (lo, rs, inject, mixed, the in-place R), and each one's time.
+//
+//     build/fused_gr_bench [iters] [T min] [T max]
+#include "strata/kernels/fused_gr.hpp"
+
+#include <cuda_runtime.h>
+
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace K = strata::kernels;
+
+static uint16_t bf16(float x) {
+    uint32_t u;
+    std::memcpy(&u, &x, 4);
+    return (uint16_t) ((u + 0x7fff + ((u >> 16) & 1)) >> 16);
+}
+
+int main(int argc, char** argv) {
+    setvbuf(stdout, nullptr, _IONBF, 0);
+    const int iters = argc > 1 ? std::atoi(argv[1]) : 500;
+    const int t_lo = argc > 2 ? std::atoi(argv[2]) : 1, t_hi = argc > 3 ? std::atoi(argv[3]) : 6;
+    const int N = 2560, HC = 4, D = N * HC, LR = 320, TM = K::kFusedGrMaxT;
+    std::mt19937 rng(7);
+    std::normal_distribution<float> nd(0.f, 1.f);
+    auto fill = [&](std::vector<float>& v, float sc) { for (auto& x : v) x = sc * nd(rng); };
+    std::vector<float> R((size_t) TM * D), bo((size_t) TM * N), inj((size_t) TM * HC), wn(D);
+    fill(R, 1.0f); fill(bo, 0.5f); fill(inj, 1.0f); fill(wn, 0.3f);
+    for (auto& x : wn) x += 1.0f;
+    std::vector<uint16_t> wd((size_t) LR * D), wu((size_t) D * LR), wi((size_t) HC * D);
+    for (auto& x : wd) x = bf16(0.02f * nd(rng));
+    for (auto& x : wu) x = bf16(0.05f * nd(rng));
+    for (auto& x : wi) x = bf16(0.02f * nd(rng));
+    float *dR, *dbo, *dinj, *dwn, *dxn, *dlo, *drs, *dio, *dmix;
+    uint16_t *dwd, *dwu, *dwi;
+    cudaMalloc((void**) &dR, R.size() * 4);
+    cudaMalloc((void**) &dbo, bo.size() * 4);
+    cudaMalloc((void**) &dinj, inj.size() * 4);
+    cudaMalloc((void**) &dwn, wn.size() * 4);
+    cudaMalloc((void**) &dxn, (size_t) TM * D * 4);
+    cudaMalloc((void**) &dlo, (size_t) TM * LR * 4);
+    cudaMalloc((void**) &drs, (size_t) TM * HC * 4);
+    cudaMalloc((void**) &dio, (size_t) TM * HC * 4);
+    cudaMalloc((void**) &dmix, (size_t) TM * N * 4);
+    cudaMalloc((void**) &dwd, wd.size() * 2);
+    cudaMalloc((void**) &dwu, wu.size() * 2);
+    cudaMalloc((void**) &dwi, wi.size() * 2);
+    cudaMemcpy(dbo, bo.data(), bo.size() * 4, cudaMemcpyHostToDevice);
+    cudaMemcpy(dinj, inj.data(), inj.size() * 4, cudaMemcpyHostToDevice);
+    cudaMemcpy(dwn, wn.data(), wn.size() * 4, cudaMemcpyHostToDevice);
+    cudaMemcpy(dwd, wd.data(), wd.size() * 2, cudaMemcpyHostToDevice);
+    cudaMemcpy(dwu, wu.data(), wu.size() * 2, cudaMemcpyHostToDevice);
+    cudaMemcpy(dwi, wi.data(), wi.size() * 2, cudaMemcpyHostToDevice);
+    cudaStream_t s;
+    cudaStreamCreate(&s);
+    cudaEvent_t e0, e1;
+    cudaEventCreate(&e0);
+    cudaEventCreate(&e1);
+    int failures = 0;
+    for (int T = t_lo; T <= t_hi; ++T)
+        for (int apply = 0; apply < 2; ++apply)
+            for (int inject = 0; inject < 2; ++inject) {
+                K::FusedGrArgs a[TM];
+                for (int t = 0; t < T; ++t) {
+                    a[t].R = dR + (size_t) t * D; a[t].R_out = dR + (size_t) t * D; a[t].apply = apply;
+                    a[t].bo_prev = dbo + (size_t) t * N; a[t].inj_prev = dinj + (size_t) t * HC;
+                    a[t].w_norm = dwn; a[t].w_down = dwd; a[t].w_up = dwu; a[t].w_inject = inject ? dwi : nullptr;
+                    a[t].lo = dlo + (size_t) t * LR; a[t].rs = drs + (size_t) t * HC;
+                    a[t].inject_out = dio + (size_t) t * HC; a[t].mixed = dmix + (size_t) t * N;
+                }
+                std::vector<float> out[2];
+                for (int f = 0; f < 2; ++f) {
+                    cudaMemcpy(dR, R.data(), R.size() * 4, cudaMemcpyHostToDevice);
+                    cudaMemset(dlo, 0xff, (size_t) TM * LR * 4);
+                    cudaMemset(drs, 0xff, (size_t) TM * HC * 4);
+                    cudaMemset(dio, 0xff, (size_t) TM * HC * 4);
+                    cudaMemset(dmix, 0xff, (size_t) TM * N * 4);
+                    K::fused_gr_set_fast(f);
+                    K::fused_gr_read_multi(a, T, dxn, s);
+                    cudaStreamSynchronize(s);
+                    auto& o = out[f];
+                    o.resize((size_t) TM * (D + LR + HC + HC + N));
+                    float* p = o.data();
+                    cudaMemcpy(p, dR, (size_t) TM * D * 4, cudaMemcpyDeviceToHost); p += (size_t) TM * D;
+                    cudaMemcpy(p, dlo, (size_t) TM * LR * 4, cudaMemcpyDeviceToHost); p += (size_t) TM * LR;
+                    cudaMemcpy(p, drs, (size_t) TM * HC * 4, cudaMemcpyDeviceToHost); p += (size_t) TM * HC;
+                    cudaMemcpy(p, dio, (size_t) TM * HC * 4, cudaMemcpyDeviceToHost); p += (size_t) TM * HC;
+                    cudaMemcpy(p, dmix, (size_t) TM * N * 4, cudaMemcpyDeviceToHost);
+                }
+                const bool same = std::memcmp(out[0].data(), out[1].data(), out[0].size() * 4) == 0;
+                double us[2] = {1e30, 1e30};
+                for (int round = 0; round < 3; ++round)
+                    for (int f = 0; f < 2; ++f) {
+                        K::fused_gr_set_fast(f);
+                        for (int i = 0; i < 20; ++i) K::fused_gr_read_multi(a, T, dxn, s);
+                        cudaEventRecord(e0, s);
+                        for (int i = 0; i < iters; ++i) K::fused_gr_read_multi(a, T, dxn, s);
+                        cudaEventRecord(e1, s);
+                        cudaEventSynchronize(e1);
+                        float ms = 0;
+                        cudaEventElapsedTime(&ms, e0, e1);
+                        us[f] = std::fmin(us[f], 1e3 * ms / iters);
+                    }
+                std::printf("T %d apply %d inject %d | old %6.1f us  fast %6.1f us | %s\n", T, apply, inject, us[0], us[1],
+                            same ? "bitwise equal" : "DIFFERS");
+                if (!same) ++failures;
+            }
+    std::printf("fused_gr_bench: %d differing\n", failures);
+    return failures ? 1 : 0;
+}
diff --git a/src/kernels/native_expert_bench.cpp b/src/kernels/native_expert_bench.cpp
new file mode 100644
index 00000000000..7f16e220a26
--- /dev/null
+++ b/src/kernels/native_expert_bench.cpp
@@ -0,0 +1,170 @@
+// src/kernels/native_expert_bench.cpp - the grouped native experts on real GGUF rows: one AMD layout against
+// another, bit for bit, and each one's time.
+//
+//     build/native_expert_bench <shard1.gguf> <layer[,layer...]> <groups> <tokens per group> <ref mode> <mode> [iters]
+//
+// Modes are STRATA_EXP_MODE values.  A group is one expert (distinct blobs, ~2 MB each, so G >= 8 does not fit
+// in L2); its entries read distinct tokens of an 8-token window.  The output must be bitwise equal to the
+// reference mode's: the verify window's text depends on it.
+#include "strata/artifact/gguf_reader.hpp"
+#include "strata/kernels/cpu/native_expert.hpp"
+#include "strata/kernels/iq_kernels.hpp"
+
+#include "ggml.h"
+
+#include <cuda_runtime.h>
+
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <sstream>
+#include <string>
+#include <vector>
+
+namespace cpu = strata::kernels::cpu;
+namespace K = strata::kernels;
+
+int main(int argc, char** argv) {
+    setvbuf(stdout, nullptr, _IONBF, 0);
+    if (argc < 7) {
+        std::fprintf(stderr, "usage: native_expert_bench <shard1.gguf> <layer[,layer]> <groups> <tokens> <ref mode> <mode> [iters]\n");
+        return 2;
+    }
+    strata::GgufFile gguf(argv[1]);
+    std::vector<int> layers;
+    {
+        std::stringstream ss(argv[2]);
+        std::string t;
+        while (std::getline(ss, t, ',')) layers.push_back(std::atoi(t.c_str()));
+    }
+    const int G = std::atoi(argv[3]), T = std::atoi(argv[4]), mref = std::atoi(argv[5]), mode = std::atoi(argv[6]);
+    const int iters = argc > 7 ? std::atoi(argv[7]) : 200;
+    const int NTOK = 8;
+    if (T < 1 || T > NTOK || G < 1) { std::fprintf(stderr, "tokens 1..8, groups >= 1\n"); return 2; }
+    const int64_t H = 2560, FF_FULL = 640, FF = FF_FULL;   // Flash-Next's expert geometry
+    int failures = 0;
+    cudaStream_t s;
+    cudaStreamCreate(&s);
+    cudaEvent_t e0, e1;
+    cudaEventCreate(&e0);
+    cudaEventCreate(&e1);
+    for (int l : layers) {
+        const strata::TensorInfo* t[3] = {};
+        const char* roles[3] = {"gate", "up", "down"};
+        for (const auto& ti : gguf.tensors())
+            for (int r = 0; r < 3; ++r)
+                if (ti.name == "blk." + std::to_string(l) + ".ffn_" + roles[r] + "_exps.weight") t[r] = &ti;
+        if (!t[0] || !t[1] || !t[2]) { std::printf("layer %d: no expert tensors\n", l); ++failures; continue; }
+        cpu::NativeFmt f;
+        std::string err;
+        if (!cpu::native_fmt((int) t[0]->type, (int) t[2]->type, H, FF, f, err)) {
+            std::printf("layer %d: %s\n", l, err.c_str()); ++failures; continue;
+        }
+        cpu::NativeFmt ff;    // the full expert's geometry, for strides into the GGUF
+        if (!cpu::native_fmt((int) t[0]->type, (int) t[2]->type, H, FF_FULL, ff, err)) {
+            std::printf("layer %d: %s\n", l, err.c_str()); ++failures; continue;
+        }
+        const size_t dsz = f.bytes - f.down_off, dsz_full = ff.bytes - ff.down_off;
+        const size_t drow = dsz / H, drow_full = dsz_full / H;
+        std::vector<uint8_t> blobs((size_t) G * f.bytes);
+        for (int g = 0; g < G; ++g) {
+            const size_t E = (size_t) ((g * 37 + 5) % 256);
+            uint8_t* b = blobs.data() + (size_t) g * f.bytes;
+            std::memcpy(b, gguf.tensor_data(*t[0]) + E * ff.up_off, f.up_off);
+            std::memcpy(b + f.up_off, gguf.tensor_data(*t[1]) + E * ff.up_off, f.up_off);
+            for (int64_t r = 0; r < H; ++r)
+                std::memcpy(b + f.down_off + r * drow, gguf.tensor_data(*t[2]) + E * dsz_full + r * drow_full, drow);
+        }
+        std::mt19937 rng(17 + l);
+        std::normal_distribution<float> nd(0.f, 1.f);
+        std::vector<float> x((size_t) NTOK * H);
+        for (auto& v : x) v = nd(rng);
+        const int NE = G * T;
+        std::vector<unsigned long long> ptr(G);
+        std::vector<int32_t> start(G + 1), dst(NE), tok(NE);
+        const auto L = K::native_expert_layout(f.gu_type, f.d_type, H, FF);
+        uint8_t* dblob;
+        void *dx, *dxq, *dscr;
+        float* dout;
+        unsigned long long* dptr;
+        int32_t *dstart, *dn, *ddst, *dtok;
+        cudaMalloc((void**) &dblob, blobs.size());
+        cudaMalloc(&dx, x.size() * 4);
+        cudaMalloc(&dxq, (size_t) NTOK * H / 32 * 36);
+        cudaMalloc(&dscr, K::native_expert_scratch_bytes(NE, FF));
+        cudaMalloc((void**) &dout, (size_t) NE * H * 4);
+        cudaMalloc((void**) &dptr, (size_t) G * 8);
+        cudaMalloc((void**) &dstart, (size_t) (G + 1) * 4);
+        cudaMalloc((void**) &dn, 4);
+        cudaMalloc((void**) &ddst, (size_t) NE * 4);
+        cudaMalloc((void**) &dtok, (size_t) NE * 4);
+        for (int g = 0; g < G; ++g) {
+            ptr[g] = (unsigned long long) (dblob + (size_t) g * f.bytes);
+            start[g] = g * T;
+            for (int j = 0; j < T; ++j) {
+                dst[g * T + j] = g * T + j;
+                tok[g * T + j] = (g * 3 + j) % NTOK;
+            }
+        }
+        start[G] = NE;
+        cudaMemcpy(dblob, blobs.data(), blobs.size(), cudaMemcpyHostToDevice);
+        cudaMemcpy(dx, x.data(), x.size() * 4, cudaMemcpyHostToDevice);
+        cudaMemcpy(dptr, ptr.data(), (size_t) G * 8, cudaMemcpyHostToDevice);
+        cudaMemcpy(dstart, start.data(), (size_t) (G + 1) * 4, cudaMemcpyHostToDevice);
+        cudaMemcpy(dn, &G, 4, cudaMemcpyHostToDevice);
+        cudaMemcpy(ddst, dst.data(), (size_t) NE * 4, cudaMemcpyHostToDevice);
+        cudaMemcpy(dtok, tok.data(), (size_t) NE * 4, cudaMemcpyHostToDevice);
+        K::quantize_q8_1_rows((const float*) dx, NTOK, H, dxq, s);
+        auto run = [&](int m, int phase) {
+            K::native_expert_set_mode(m, phase);
+            K::native_expert_grouped(L, dptr, dstart, dn, ddst, dtok, G, NE, dxq, dscr, dout, s);
+        };
+        std::vector<float> ref((size_t) NE * H), got((size_t) NE * H);
+        cudaMemsetAsync(dout, 0xff, got.size() * 4, s);
+        run(mref, 0);
+        cudaMemcpyAsync(ref.data(), dout, ref.size() * 4, cudaMemcpyDeviceToHost, s);
+        cudaMemsetAsync(dout, 0xff, got.size() * 4, s);
+        run(mode, 0);
+        cudaMemcpyAsync(got.data(), dout, got.size() * 4, cudaMemcpyDeviceToHost, s);
+        if (cudaStreamSynchronize(s) != cudaSuccess) { std::printf("layer %d: CUDA error\n", l); return 1; }
+        size_t ndiff = 0;
+        double worst = 0;
+        for (size_t i = 0; i < ref.size(); ++i)
+            if (std::memcmp(&ref[i], &got[i], 4) != 0) {
+                ++ndiff;
+                worst = std::fmax(worst, std::fabs((double) ref[i] - got[i]) / (std::fabs((double) ref[i]) + 1e-6));
+            }
+        auto time = [&](int m, int phase) {
+            for (int i = 0; i < 10; ++i) run(m, phase);
+            cudaEventRecord(e0, s);
+            for (int i = 0; i < iters; ++i) run(m, phase);
+            cudaEventRecord(e1, s);
+            cudaEventSynchronize(e1);
+            float ms = 0;
+            cudaEventElapsedTime(&ms, e0, e1);
+            return 1e3 * ms / iters;
+        };
+        const double gu_b = (double) G * 2 * f.up_off, d_b = (double) G * dsz;
+        double us[2][3] = {{1e30, 1e30, 1e30}, {1e30, 1e30, 1e30}};
+        for (int round = 0; round < 3; ++round)   // interleaved, the minimum: the clocks wander between runs
+            for (int k = 0; k < 2; ++k)
+                for (int p = 0; p < 3; ++p) us[k][p] = std::fmin(us[k][p], time(k ? mode : mref, p));
+        std::printf("layer %2d %-7s/%-6s G %d T %d | mode %d: all %7.1f us  gu %7.1f us (%3.0f GB/s)  down %6.1f us (%3.0f GB/s)"
+                    " | mode %d: all %7.1f us  gu %7.1f us (%3.0f GB/s)  down %6.1f us (%3.0f GB/s) | %s\n",
+                    l, ggml_type_name((ggml_type) f.gu_type), ggml_type_name((ggml_type) f.d_type), G, T,
+                    mref, us[0][0], us[0][1], gu_b / us[0][1] / 1e3, us[0][2], d_b / us[0][2] / 1e3,
+                    mode, us[1][0], us[1][1], gu_b / us[1][1] / 1e3, us[1][2], d_b / us[1][2] / 1e3,
+                    ndiff ? "DIFFERS" : "bitwise equal");
+        if (ndiff) {
+            std::printf("          %zu of %zu outputs differ, worst rel %.2e\n", ndiff, ref.size(), worst);
+            ++failures;
+        }
+        K::native_expert_set_mode(-1, 0);
+        cudaFree(dblob); cudaFree(dx); cudaFree(dxq); cudaFree(dscr); cudaFree(dout); cudaFree(dptr);
+        cudaFree(dstart); cudaFree(dn); cudaFree(ddst); cudaFree(dtok);
+    }
+    std::printf("native_expert_bench: %d differing\n", failures);
+    return failures ? 1 : 0;
+}
diff --git a/src/prefill/moe_fused.cu b/src/prefill/moe_fused.cu
index b5f9a1c80ba..19d1c949c01 100644
--- a/src/prefill/moe_fused.cu
+++ b/src/prefill/moe_fused.cu
@@ -364,6 +364,11 @@ const DevInfo& dev_info() {
     DevInfo& d = g_dev[dev & 31];
     if (d.done) return d;
     d.done = true;
+#if defined(STRATA_HIP_GFX906)
+    // gfx906 reports compute capability 9.0 through HIP, but the mma.sync bodies above are CUDA sm_80+ only and
+    // empty in a hipcc build: never available here (the prompt path keeps its own expert GEMMs)
+    return d;
+#else
     int major = 0, minor = 0;
     cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev);
     cudaDeviceGetAttribute(&minor, cudaDevAttrComputeCapabilityMinor, dev);
@@ -385,6 +390,7 @@ const DevInfo& dev_info() {
     cudaOccupancyMaxActiveBlocksPerMultiprocessor(&d.occ_d, expert_kernel<false>, THREADS, smem_bytes(false));
     if (d.occ_gu < 1 || d.occ_d < 1) d.cc = 0;                   // does not fit this card: the MMQ path
     cudaGetLastError();
+#endif
     return d;
 }
 
diff --git a/src/prefill/moe_fused_iq.cu b/src/prefill/moe_fused_iq.cu
index 52476c87aa3..b2d990869eb 100644
--- a/src/prefill/moe_fused_iq.cu
+++ b/src/prefill/moe_fused_iq.cu
@@ -516,6 +516,7 @@ struct DevInfo {
 std::mutex g_mu;
 DevInfo g_dev[32];
 
+#if !defined(STRATA_HIP_GFX906)
 template <int T, bool GU, int WW> bool setup_ww(int& occ) {
     cudaFuncAttributes fa{};
     if (cudaFuncGetAttributes(&fa, native_kernel<T, GU, WW>) != cudaSuccess || fa.ptxVersion < 80) return false;
@@ -530,6 +531,7 @@ template <int T, bool GU, int WW> bool setup_ww(int& occ) {
     return true;
 }
 template <int T, bool GU> bool setup_one(int& occ) { return setup_ww<T, GU, 4>(occ) && setup_ww<T, GU, 2>(occ); }
+#endif
 
 const DevInfo& dev_info() {
     int dev = 0;
@@ -538,6 +540,11 @@ const DevInfo& dev_info() {
     DevInfo& d = g_dev[dev & 31];
     if (d.done) return d;
     d.done = true;
+#if defined(STRATA_HIP_GFX906)
+    // gfx906 reports compute capability 9.0 through HIP, but the mma.sync bodies above are CUDA sm_80+ only and
+    // empty in a hipcc build: never available here (the prompt path keeps its own expert GEMMs)
+    return d;
+#else
     int major = 0;
     cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev);
     cudaDeviceGetAttribute(&d.sms, cudaDevAttrMultiProcessorCount, dev);
@@ -548,6 +555,7 @@ const DevInfo& dev_info() {
            setup_one<T_Q2_0, false>(occ) && setup_one<T_IQ4_NL, false>(occ);
     d.occ = d.ok ? occ : 1;
     cudaGetLastError();
+#endif
     return d;
 }
 
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index b9a4440cca8..6c6945be9b3 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2963,6 +2963,7 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: GPU %d: %s, compute capability %d.%d%s\n", dev, name,
                      strata::cc_major_of(p.major), strata::cc_minor_of(p.minor),
                      strata::emulated_cc() ? " (STRATA_EMULATE_CC: a test mode, the card is emulated)" : "");
+#if !defined(STRATA_HIP_GFX906)   // a CUDA toolkit mismatch; the gfx906 HIP build has no CUDART_VERSION
         {   // #542: a build whose libcudart is older than its headers (a CUDA 13 kit with a dangling libcudart.so that
             // CMake resolved to the system's CUDA 12 one) reads cudaDeviceProp shifted - silently, and slowly
             int rt = 0;
@@ -2973,6 +2974,7 @@ int main(int argc, char** argv) {
                                      "toolkit>, with its libcudart.so present) (#542)\n",
                              CUDART_VERSION / 1000, CUDART_VERSION % 1000 / 10, rt / 1000, rt % 1000 / 10);
         }
+#endif
 #endif
         const std::string e = strata::core::device_code_error();
         if (!e.empty()) {

From 8534ee15dff04ef5597e4b44dd824312cf5180f7 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:54:14 +0300
Subject: [PATCH 146/201] docs: gfx906 (Instinct MI50 / MI60, Radeon VII)
 build, kernels and measurements in AMD_HIP.md

---
 docs/AMD_HIP.md | 62 ++++++++++++++++++++++++++++++++++++++++++++++++-
 tests.list      | 33 ++++++++++++++++++++++++++
 2 files changed, 94 insertions(+), 1 deletion(-)
 create mode 100644 tests.list

diff --git a/docs/AMD_HIP.md b/docs/AMD_HIP.md
index f77328357f7..343c7c4804f 100644
--- a/docs/AMD_HIP.md
+++ b/docs/AMD_HIP.md
@@ -5,7 +5,8 @@ covers the build on Linux (on Windows a ready-made engine, see [Windows](#window
 RX 9070 / 9070 XT / Radeon AI PRO R9700 (RDNA4, gfx1201; see [RDNA4](#rdna4-gfx1201)). The RX 7800 XT / 7700 XT
 (gfx1101) and the RX 9060 XT (gfx1200) were validated by their owners (see [Community-validated
 cards](#community-validated-cards)); the RX 6800 / 6900 series (RDNA2, gfx1030) builds and runs too, reported by a community machine and not yet validated by the maintainers (see [RDNA2](#rdna2-gfx1030)). Setup chooses it by itself on a PC with no NVIDIA card Strata can use (`--backend hip` on a PC with both); the
-install steps for users are in [INSTALL.md](INSTALL.md#amd-cards). Other AMD architectures, wave64, and mixed
+install steps for users are in [INSTALL.md](INSTALL.md#amd-cards). gfx906 (Instinct MI50 / MI60, Radeon VII; wave64) has a separate
+opt-in build, see [gfx906](#gfx906-instinct-mi50--mi60-radeon-vii-wave64-built-from-source). Other AMD architectures and mixed
 AMD/NVIDIA execution in one run are not supported.
 
 The backend maps the CUDA-shaped runtime and BLAS calls to HIP/hipBLAS, uses
@@ -350,6 +351,65 @@ run it; the report below is from a community machine: an RX 6900 XT 16 GB (gfx10
 - **Not validated:** gfx1031 / gfx1032 (the same `dp4a` path, no hardware report), setup's own build path and the
   `gfx103X-all` wheels on gfx1030, images, answer-quality benchmarks.
 
+## gfx906 (Instinct MI50 / MI60, Radeon VII): wave64, built from source
+
+gfx906 is wave64 and has no WMMA and no packed byte arithmetic, so the wave32 backend above refuses it. A separate opt-in build compiles the CUDA sources as HIP through a small compat layer
+(`include/strata/platform/hip_compat/`), with a CUDA warp mapped to a logical half of the 64-lane wavefront
+(32-wide shuffles, a ballot of its own half). The hot kernels have wave64 layouts of their own (below). Setup does
+not build it yet: build by hand, and run `serve/server.py` with a config as on any other card.
+
+**ROCm.** AMD's current ROCm releases no longer ship gfx906 libraries. The build and the measurements below used
+HIP 7.14 from the community image [`mixa3607/rocm-gfx906:7.14-complete`](https://hub.docker.com/r/mixa3607/rocm-gfx906)
+(rocBLAS/hipBLAS with gfx906 kernels), on the kernel's amdgpu driver (Ubuntu 24.04, kernel 6.8). hipBLASLt is not
+used.
+
+```sh
+# inside the image, with this checkout at /src and llama.cpp at the pinned commit in third_party/llama.cpp
+apt-get update && apt-get install -y cmake ninja-build git python3 build-essential
+cmake -S . -B build-906 -G Ninja -DSTRATA_HIP_GFX906=ON -DCMAKE_HIP_ARCHITECTURES=gfx906 \
+  -DSTRATA_GGML_DIR=/src/third_party/llama.cpp \
+  -DCMAKE_C_COMPILER=/opt/rocm/llvm/bin/clang -DCMAKE_CXX_COMPILER=/opt/rocm/llvm/bin/clang++
+ninja -C build-906 strata
+```
+
+`STRATA_HIP_GFX906` turns on the CUDA targets and refuses `STRATA_ENABLE_HIP` (one HIP build at a time). Run the
+container with `--device=/dev/kfd --device=/dev/dri --group-add video --ipc=host --ulimit memlock=-1`; on some boards
+`HSA_OVERRIDE_GFX_VERSION=9.0.6` is needed for the runtime to accept the card.
+
+**What differs from the CUDA build** (all under `STRATA_HIP_GFX906`; each A/B switch restores the CUDA layout):
+
+| | gfx906 | switch |
+|---|---|---|
+| grouped native experts | mode 7: signs as `dp4a(g ^ m, u) - dp4a(m, u)` (no byte SIMD), grids and activations in LDS, one weight load per group | `STRATA_EXP_MODE=2` (previous AMD layout) |
+| MMVQ | one wavefront per row, 64-lane butterfly, no LDS | `STRATA_MMVQ_WAVE=0` |
+| router top-10 | one wavefront, register argmax | - |
+| `gr_down_multi` | split along K (8 rows x 5 slices of 2048) | `STRATA_GR_SPLIT=0` |
+| hyper-connection read | norm loads in flight, 8 lanes per row for `up` | `STRATA_GR_FAST=0` |
+| IQ4 table lookup | llama.cpp's `v_perm_b32` sequence (HIP's `__byte_perm` is a scratch array) | - |
+| QSA prompt attention | the FP32 kernel (no tensor cores / WMMA) | - |
+
+Every switch above was checked bitwise against the layout it replaces: the parity tests on synthetic data,
+`native_expert_bench` on real GGUF rows (one mode against another), and the greedy text of a fixed request.
+
+**Measured** on 2x Instinct MI50 16 GB (85 W power limit each, PCIe 3.0 x16 both, peer access between them),
+Xeon E5-2666 v3 (10 cores, AVX2), 32 GB DDR4, SATA SSD; Coder IQ1_M (`--native` pack), 131,072-token context,
+`--kv int8 --kv-resident 32768`, `--layer-split 27`, `--prefill 4096`, MTP `--spec 4 --spec-min-p 0.5`,
+`--pcie-frac 0`, `STRATA_ARENA_MMAP=1`. Measured on the port this build was cut from (builds on the 0.1.30 and 0.1.33 bases, the same
+kernels, plus the layer-split weight trim and the mapped arena, which are separate pull requests):
+
+- all 12,288 experts held in VRAM across the two cards;
+- a 17,043-token agent prompt (Claude Code's first request, tools included) read in 43.5 s (392 tok/s), decode
+  on it 57.7-59.3 tok/s;
+- 25 GB of the 32 GB RAM available while serving;
+- six repeats of that request with a 6,000-token output cap and a 900-second two-client load test run six times
+  (407 requests, 202,940 tokens): no stalls, no errors, no GPU faults.
+
+For comparison on the same machine: llama.cpp (3cf0325, ROCm) on the same Coder IQ1_M measured 26.9 tok/s `tg128`.
+
+**Not done:** setup.py detection and an automatic build, Windows, images (`--vision`), MI60 and Radeon VII (the
+same gfx906 ISA; not run), a single-card run, the tensor-split experiment (the halves of every layer on two cards;
+it works but is not part of this build).
+
 ## Tuning table
 
 A hipBLASLt table holds solution ids that are valid only for one GPU architecture and one hipBLASLt version, so it
diff --git a/tests.list b/tests.list
new file mode 100644
index 00000000000..cff33600c0a
--- /dev/null
+++ b/tests.list
@@ -0,0 +1,33 @@
+file_expert_source_test file_expert_source_test
+expert_profile_save_test expert_profile_save_test
+dequant_s2_parity dequant_s2_parity --selftest
+s2_gemv_parity s2_gemv_parity --selftest
+mmvq_multi_parity mmvq_multi_parity
+iq_multi_parity iq_multi_parity
+native_grouped_parity native_grouped_parity
+shared_expert_parity shared_expert_parity --selftest
+gr_parity gr_parity --selftest
+gdn_parity gdn_parity --selftest
+s2_gemv_q8_parity s2_gemv_q8_parity --selftest
+sampler_parity sampler_parity --selftest
+sampler_parity_one_block sampler_parity --selftest
+sampler_parity_old sampler_parity --selftest
+decode_cluster_parity decode_cluster_parity --selftest
+rope_parity rope_parity --selftest
+quantize_act_parity quantize_act_parity --selftest
+router_top10_parity router_top10_parity --selftest
+s_gemv_parity s_gemv_parity --selftest
+elementwise_parity elementwise_parity --selftest
+bf16_gemv_parity bf16_gemv_parity --selftest
+s_gemv_q8k_parity s_gemv_q8k_parity --selftest
+qsa_parity qsa_parity --selftest
+kv_q8_parity kv_q8_parity
+kv_stream_parity kv_stream_parity
+kv_hybrid_parity kv_hybrid_parity
+kv_q4_parity kv_q4_parity
+cvec_parity cvec_parity
+s2_expert_grouped_parity s2_expert_grouped_parity --selftest
+platform_memory_test platform_memory_test
+pinned_shared_test pinned_shared_test
+ple_reader_selftest ple_reader_test --selftest
+cuda_device_selftest strata-device --selftest

From 5c544dd5e6cd3d8a0538decba3e4ccc6721983b1 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 20:26:27 +0300
Subject: [PATCH 147/201] gfx906: K-quant/Q5_1/Q8_0 experts take the CUDA
 layout; gr_down K-split opt-in; gfx906-aware ctest

- native_expert_grouped: the AMD layouts handle the IQ packs' gate/up and down types only; Unsloth's Q4_K / Q5_K
  gate/up and Q5_1 / Q8_0 down now take the CUDA layout instead of exiting (native_grouped_parity found it).
- fused_gr_read_multi: the K-split gr_down (fixed-order finish) sums in another order than the single-token
  fused_gr_read, so it broke gr_parity's multi == single contract; it is now opt-in (STRATA_GR_SPLIT=1). The
  latency-hidden norm/up (same sums, same order) run in the default read (STRATA_GR_FAST=0: off).
- mmvq_multi_parity: on gfx906 the wave64 MMVQ is the same exact kernel for every column count, so the negative
  control has nothing to find; a second ctest entry runs it on the CUDA layout (STRATA_MMVQ_WAVE=0), where it has
  power.
- kv_hybrid_parity: the tensor-core prompt attention refuses on gfx906 as on the RDNA backend.

ctest on 2x MI50 (gfx906): 34 of 34 pass (iq_parity and ple_parity need fixture files and are not counted).
---
 CMakeLists.txt                    |  4 ++++
 docs/AMD_HIP.md                   |  4 ++--
 src/kernels/cuda/fused_gr.cu      | 27 +++++++++++++++++++++++----
 src/kernels/cuda/iq_kernels.cu    | 11 +++++++----
 src/kernels/kv_hybrid_parity.cpp  |  2 +-
 src/kernels/mmvq_multi_parity.cpp | 12 ++++++++++++
 tests.list                        |  1 +
 7 files changed, 50 insertions(+), 11 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 68f636d6c6f..e9f18c8f244 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -608,6 +608,10 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
     target_include_directories(mmvq_multi_parity PRIVATE ${_strata_gpu_include_directories})
     target_link_libraries(mmvq_multi_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
     add_test(NAME mmvq_multi_parity COMMAND mmvq_multi_parity)
+    if(STRATA_HIP_GFX906)   # the CUDA layout, where the negative control has power (the wave64 one is exact at every T)
+      add_test(NAME mmvq_multi_parity_cuda_layout COMMAND mmvq_multi_parity)
+      set_tests_properties(mmvq_multi_parity_cuda_layout PROPERTIES ENVIRONMENT "STRATA_MMVQ_WAVE=0")
+    endif()
   endif()
   # the IQ kernels that decode a weight part once for every column/entry, bitwise vs the per-column ones
   # (GPU, synthetic, no model; --bench adds old/new timings)
diff --git a/docs/AMD_HIP.md b/docs/AMD_HIP.md
index 343c7c4804f..dbeb3630ca1 100644
--- a/docs/AMD_HIP.md
+++ b/docs/AMD_HIP.md
@@ -380,11 +380,11 @@ container with `--device=/dev/kfd --device=/dev/dri --group-add video --ipc=host
 
 | | gfx906 | switch |
 |---|---|---|
-| grouped native experts | mode 7: signs as `dp4a(g ^ m, u) - dp4a(m, u)` (no byte SIMD), grids and activations in LDS, one weight load per group | `STRATA_EXP_MODE=2` (previous AMD layout) |
+| grouped native experts | mode 7: signs as `dp4a(g ^ m, u) - dp4a(m, u)` (no byte SIMD), grids and activations in LDS, one weight load per group; the IQ formats only (Unsloth's K-quant / Q5_1 / Q8_0 experts take the CUDA layout) | `STRATA_EXP_MODE=2` (previous AMD layout) |
 | MMVQ | one wavefront per row, 64-lane butterfly, no LDS | `STRATA_MMVQ_WAVE=0` |
 | router top-10 | one wavefront, register argmax | - |
-| `gr_down_multi` | split along K (8 rows x 5 slices of 2048) | `STRATA_GR_SPLIT=0` |
 | hyper-connection read | norm loads in flight, 8 lanes per row for `up` | `STRATA_GR_FAST=0` |
+| `gr_down_multi`, opt-in | split along K (8 rows x 5 slices of 2048), ~3% per window; sums in another order than the single-token read, so off by default | `STRATA_GR_SPLIT=1` |
 | IQ4 table lookup | llama.cpp's `v_perm_b32` sequence (HIP's `__byte_perm` is a scratch array) | - |
 | QSA prompt attention | the FP32 kernel (no tensor cores / WMMA) | - |
 
diff --git a/src/kernels/cuda/fused_gr.cu b/src/kernels/cuda/fused_gr.cu
index 0ef848dbd76..0531aa0a784 100644
--- a/src/kernels/cuda/fused_gr.cu
+++ b/src/kernels/cuda/fused_gr.cu
@@ -763,9 +763,24 @@ int down_chunk(bool staged, int* tile_out) {
 // many tokens as fit the card, the up projection; the profile's stamps after the norm and after the down projection.
 // kHcPlain is the default read exactly as before (never main's opt-in STRATA_GR_V3 path, which fused_gr_read_multi
 // takes first).
+#if defined(STRATA_HIP_GFX906)
+__global__ void __launch_bounds__(THREADS) gr_norm_fast_kernel(GrMulti m);   // below, with the AMD fast path
+__global__ void __launch_bounds__(THREADS) gr_up_fast_kernel(GrMulti m);
+}  // namespace
+static bool gr_fast();
+namespace {
+#endif
 void launch_multi(const GrMulti& m, int variant, cudaStream_t st, unsigned long long* stamp_buf, int stamp_i0) {
     const int n_tok = m.T;
+#if defined(STRATA_HIP_GFX906)
+    // gfx906: the latency-hidden norm/up (STRATA_GR_FAST=0: off) - the same sums in the same order as the kernels
+    // they replace (gr_parity checks the multi-token read against single-token calls bitwise)
+    const bool fast = gr_fast();
+#else
+    const bool fast = false;
+#endif
     if (variant >= kHcSplit) gr_norm_split_kernel<<<dim3((unsigned) n_tok, HC), THREADS, 0, st>>>(m);
+    else if (fast) gr_norm_fast_kernel<<<n_tok, THREADS, 0, st>>>(m);
     else gr_norm_multi_kernel<<<n_tok, THREADS, 0, st>>>(m);
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, (void*) st);
     const bool staged = variant >= kHcStaged;
@@ -800,7 +815,8 @@ void launch_multi(const GrMulti& m, int variant, cudaStream_t st, unsigned long
         }
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, (void*) st);
-    gr_up_multi_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
+    if (fast) gr_up_fast_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
+    else gr_up_multi_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
 }
 
 /// STRATA_HC_SPLIT: unset or 2 = the newest the check accepts (staged), 1 = at most split, 0 = the plain read
@@ -1102,9 +1118,12 @@ void fused_gr_read_multi(const FusedGrArgs* a, int n_tok, float* xn_scratch, voi
         return;
     }
 #if defined(STRATA_HIP_GFX906)
-    // gfx906: the latency-hidden norm/up (STRATA_GR_FAST) and the K-split down (STRATA_GR_SPLIT=0: the CUDA layout's read)
-    static const bool split_off = std::getenv("STRATA_GR_SPLIT") && std::string(std::getenv("STRATA_GR_SPLIT")) == "0";
-    if (!split_off) {
+    // gfx906, opt-in STRATA_GR_SPLIT=1: the latency-hidden norm/up (STRATA_GR_FAST) with the K-split down (~3% faster
+    // per verify window).  Its fixed-order finish sums the K slices in another order than the single-token
+    // fused_gr_read, so the multi-token read is then no longer bitwise equal to T single-token calls (gr_parity's
+    // contract); off by default for that reason.
+    static const bool split_on = std::getenv("STRATA_GR_SPLIT") && std::string(std::getenv("STRATA_GR_SPLIT")) == "1";
+    if (split_on) {
         const bool fast = gr_fast();
         if (fast) gr_norm_fast_kernel<<<n_tok, THREADS, 0, st>>>(m);
         else gr_norm_multi_kernel<<<n_tok, THREADS, 0, st>>>(m);
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 121e5a0a9c4..2bb7f4d823a 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -2162,11 +2162,13 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     case T: if (em == 1) native_gu_amd_kernel<T, 1><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); \
             else if (em == 4) native_gu_amd_kernel<T, 4><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); \
             else native_gu_amd_kernel<T, 2><<<ggu_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_tok, X, L, gate, up); break;
-    if (em == 1 || em == 2 || em == 4) {
+    // the AMD layouts cover the IQ packs' gate/up types; Unsloth's Q4_K / Q5_K take the CUDA layout below
+    const bool amd_gu = L.gu_type == 16 || L.gu_type == 17 || L.gu_type == 18 || L.gu_type == 21 || L.gu_type == 22 ||
+                        L.gu_type == 23 || L.gu_type == 29 || L.gu_type == 42;
+    if ((em == 1 || em == 2 || em == 4) && amd_gu) {
         switch (L.gu_type) {
             STRATA_GU_AMD(16) STRATA_GU_AMD(17) STRATA_GU_AMD(18) STRATA_GU_AMD(21) STRATA_GU_AMD(22) STRATA_GU_AMD(23)
             STRATA_GU_AMD(29) STRATA_GU_AMD(42)
-            default: std::fprintf(stderr, "native_expert_grouped: gate/up type %d\n", L.gu_type); std::exit(1);
         }
     } else
 #undef STRATA_GU_AMD
@@ -2216,10 +2218,11 @@ void native_expert_grouped(const NativeExpertLayout& L, const unsigned long long
     case T: if (em == 1) native_down_amd_kernel<T, 1><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); \
             else if (em == 4) native_down_amd_kernel<T, 4><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); \
             else native_down_amd_kernel<T, 2><<<gd_amd, 256, 0, s>>>(grp_ptr, grp_start, n_groups, ent_dst, hq, L, out); break;
-    if (em == 1 || em == 2 || em == 4) {
+    // the AMD layouts cover the IQ packs' down types; the others (Unsloth's Q4_K / Q5_K / Q5_1 / Q8_0) take the
+    // CUDA layout below
+    if ((em == 1 || em == 2 || em == 4) && (L.d_type == 20 || L.d_type == 23 || L.d_type == 42)) {
         switch (L.d_type) {
             STRATA_D_AMD(20) STRATA_D_AMD(23) STRATA_D_AMD(42)
-            default: std::fprintf(stderr, "native_expert_grouped: down type %d\n", L.d_type); std::exit(1);
         }
     } else
 #undef STRATA_D_AMD
diff --git a/src/kernels/kv_hybrid_parity.cpp b/src/kernels/kv_hybrid_parity.cpp
index 98f91b3c873..ca371782cc7 100644
--- a/src/kernels/kv_hybrid_parity.cpp
+++ b/src/kernels/kv_hybrid_parity.cpp
@@ -329,7 +329,7 @@ int main() {
         float* d_at4 = dalloc<float>((size_t) QH * D);
         const bool took = k::qsa_prompt_attn_batch(d_q, pools, d_ids, d_step, cells, s, d_at4, 1, nullptr);
         if (!took) {
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)
             // AMD: the tensor-core prompt path is CUDA-only, so it refuses every pool and the old kernel runs
             std::printf("[5/5] qsa_prompt_attn mode 3: PASS (refused on HIP - the old kernel runs)\n");
 #else
diff --git a/src/kernels/mmvq_multi_parity.cpp b/src/kernels/mmvq_multi_parity.cpp
index 4902670b8e3..fd921d34490 100644
--- a/src/kernels/mmvq_multi_parity.cpp
+++ b/src/kernels/mmvq_multi_parity.cpp
@@ -36,6 +36,8 @@
 #include <cmath>
 #include <cstdint>
 #include <cstdio>
+#include <cstdlib>
+#include <string>
 #include <cstring>
 #include <random>
 #include <vector>
@@ -236,6 +238,16 @@ int main() {
     }
     // THE NEGATIVE CONTROL, asserted where it can see something: past T = 4 the generic layout is a different one,
     // so if it still finds no difference the comparison cannot tell the layouts apart and the pass proves nothing.
+#if defined(STRATA_HIP_GFX906)
+    // gfx906: the wave64 layout (one wavefront per row) is the same kernel for every column count, so multi_exact
+    // has nothing to switch and the control cannot see a difference.  The control with power is the CUDA layout:
+    // ctest's mmvq_multi_parity_cuda_layout runs this with STRATA_MMVQ_WAVE=0.
+    if (off.powerless_cases != 0 && !(std::getenv("STRATA_MMVQ_WAVE") && std::string(std::getenv("STRATA_MMVQ_WAVE")) == "0")) {
+        std::printf("\nmmvq_multi_parity: ok (gfx906 wave64 layout: every column count runs the same exact kernel, "
+                    "so the negative control has no other layout to find; mmvq_multi_parity_cuda_layout checks it).\n");
+        return 0;
+    }
+#endif
     if (off.powerless_cases != 0) {
         std::printf("\nmmvq_multi_parity: FAILED (no power). In %d case(s) no output differs with multi_exact off at "
                     "any T > %d, where the generic layout is not the exact one: for those cases this comparison "
diff --git a/tests.list b/tests.list
index cff33600c0a..675708dc0ba 100644
--- a/tests.list
+++ b/tests.list
@@ -3,6 +3,7 @@ expert_profile_save_test expert_profile_save_test
 dequant_s2_parity dequant_s2_parity --selftest
 s2_gemv_parity s2_gemv_parity --selftest
 mmvq_multi_parity mmvq_multi_parity
+mmvq_multi_parity_cuda_layout env STRATA_MMVQ_WAVE=0 ./mmvq_multi_parity
 iq_multi_parity iq_multi_parity
 native_grouped_parity native_grouped_parity
 shared_expert_parity shared_expert_parity --selftest

From ccc09c275debbd9363e25bc944933646b5003f7d Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 21:41:04 +0300
Subject: [PATCH 148/201] gfx906: route the verify window's tokens in one BF16
 projection + one top-k (bitwise the per-token calls)

The Coder's router is 256 experts, which the native 512 x 10 router does not take, so a verify window routed each
token with its own projection and top-k. moe_route_window does the window in one multi-column BF16 projection
(bf16_gemv_fp32_mmvf_cols over the existing multi-row kernel) and one n-token top-k; each token's route is bitwise
what moe_route gives it (route_window_parity, new ctest). gfx906 build only, so the CUDA and RDNA paths are
unchanged; STRATA_ROUTE_PER_TOKEN=1 restores the per-token calls.

2x MI50, Coder IQ1_M, 32K, greedy 1,500-token request: verify window 55.5 -> 52.5 ms, generated text identical.
---
 CMakeLists.txt                       |  6 +++
 include/strata/core/layer.hpp        |  3 ++
 include/strata/kernels/bf16_gemv.hpp |  4 ++
 src/core/layer.cpp                   | 28 +++++++++++
 src/core/verify.cpp                  |  9 ++++
 src/kernels/cuda/native_bf16.cu      | 13 +++++
 src/kernels/route_window_parity.cpp  | 75 ++++++++++++++++++++++++++++
 7 files changed, 138 insertions(+)
 create mode 100644 src/kernels/route_window_parity.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index e9f18c8f244..1fe793b7e4e 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -689,6 +689,12 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   target_link_libraries(quantize_act_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
   add_test(NAME quantize_act_parity COMMAND quantize_act_parity --selftest)
 
+  # the verify window's routing in one multi-column BF16 projection + one top-k, bitwise the per-token calls
+  add_executable(route_window_parity src/kernels/route_window_parity.cpp)
+  target_include_directories(route_window_parity PRIVATE ${_strata_gpu_include_directories})
+  target_link_libraries(route_window_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
+  add_test(NAME route_window_parity COMMAND route_window_parity)
+
   add_executable(router_top10_parity src/kernels/router_top10_parity.cpp)
   target_include_directories(router_top10_parity PRIVATE ${_strata_gpu_include_directories})
   target_link_libraries(router_top10_parity PRIVATE strata_kernels ${_strata_gpu_runtime_target})
diff --git a/include/strata/core/layer.hpp b/include/strata/core/layer.hpp
index a8965da133f..aec6e9eb7cf 100644
--- a/include/strata/core/layer.hpp
+++ b/include/strata/core/layer.hpp
@@ -168,6 +168,9 @@ bool moe_layer(const WeightTable& tables, const ModelGeometry& g, int64_t layer,
 /// rung, so a host that sees it knows `h_x_f`/`h_ids`/`h_weights` are in place.
 bool moe_route(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b,
                const float* x, void* stream, std::string& err, const Doorbell* db = nullptr);
+/// The verify window's n tokens routed at once (see layer.cpp); bitwise per token what `moe_route` gives.
+bool moe_route_window(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b,
+                      const float* x, float* logits, int32_t* ids, float* weights, int n, void* stream, std::string& err);
 
 /// The finishing half: the shared expert and the combination.
 ///
diff --git a/include/strata/kernels/bf16_gemv.hpp b/include/strata/kernels/bf16_gemv.hpp
index 906a8f0b150..e3efe0ff341 100644
--- a/include/strata/kernels/bf16_gemv.hpp
+++ b/include/strata/kernels/bf16_gemv.hpp
@@ -44,6 +44,10 @@ void bf16_gemv_split(const uint16_t* x, const uint16_t* w, float* y, int64_t n_i
 /// No allocations or synchronization, including when stream is null (the CUDA default stream).
 void bf16_gemv_fp32_mmvf(const float* x, const uint16_t* w, float* y,
                          int64_t n_in, int64_t n_out, void* stream);
+/// `ncols` columns at once: x is [ncols][n_in], y is [ncols][n_out]; each column bitwise equal to a
+/// `bf16_gemv_fp32_mmvf` call on it.
+void bf16_gemv_fp32_mmvf_cols(const float* x, const uint16_t* w, float* y, int64_t n_in, int64_t n_out, int ncols,
+                              void* stream);
 /// bf16_gemv_fp32_mmvf for n_tok (1..8) activation rows x[t * ldx], outputs y[t * ldy + j]; one launch,
 /// the weight read once, every output bit-identical to its own single-row call.
 void bf16_gemv_fp32_mmvf_multi(const float* x, int64_t ldx, const uint16_t* w, float* y, int64_t ldy,
diff --git a/src/core/layer.cpp b/src/core/layer.cpp
index ff7fc17b587..33450f7d2fe 100644
--- a/src/core/layer.cpp
+++ b/src/core/layer.cpp
@@ -387,6 +387,34 @@ if (db != nullptr && g_publish_kernel) {
 // write idempotent across replays of the same graph - a captured literal would ring the same number
 // forever and the host would never see a change.
 strata::kernels::doorbell_ring(db->d_seq, stream);    }    return true;}
+// The verify window's routing: n tokens' logits in one BF16 projection and their top-k in one launch, each token
+// bitwise what `moe_route` gives it (the projection is the same kernel per column, the top-k kernel is per token).
+// Anything else (a native router, the canonical BF16 GEMVs, a doorbell) takes the per-token `moe_route`.
+bool moe_route_window(const WeightTable& tables, const ModelGeometry& g, int64_t layer, int64_t k, const MoEBuffers& b,
+                      const float* x, float* logits, int32_t* ids, float* weights, int n, void* stream, std::string& err) {
+    using namespace strata::kernels;
+    const bool batched = native_bf16_projections && !(native_router_enabled() && g.n_expert == 512 && k == 10) &&
+                         !std::getenv("STRATA_ROUTE_PER_TOKEN");
+    if (!batched || n == 1) {
+        for (int t = 0; t < n; ++t) {
+            MoEBuffers mb = b;
+            mb.logits = logits + t * g.n_expert; mb.ids = ids + t * k; mb.weights = weights + t * k;
+            if (!moe_route(tables, g, layer, k, mb, x + t * g.n_embd, stream, err, nullptr)) return false;
+        }
+        return true;
+    }
+    const LayerView v(tables, layer);
+    const WeightRef* w_router = v.get("ffn_gate_inp.weight");
+    if (w_router == nullptr) { err = v.name("ffn_gate_inp.weight") + " is missing"; return false; }
+    if (std::getenv("STRATA_ROUTE_PROJ_PER_TOKEN"))
+        for (int t = 0; t < n; ++t)
+            bf16_gemv_fp32_mmvf(x + t * g.n_embd, (const uint16_t*) w_router->data, logits + t * g.n_expert, g.n_embd,
+                                g.n_expert, stream);
+    else
+        bf16_gemv_fp32_mmvf_cols(x, (const uint16_t*) w_router->data, logits, g.n_embd, g.n_expert, n, stream);
+    router_top10(logits, n, (int) g.n_expert, (int) k, ids, weights, stream);
+    return true;
+}
 bool moe_shared(const WeightTable& tables, const ModelGeometry& g, int64_t layer, const MoEBuffers& b,                const float* x, void* stream, std::string& err) {    using namespace strata::kernels;    const LayerView v(tables, layer);    const WeightRef* w_ginp = v.get("ffn_gate_inp_shexp.weight");    const WeightRef* w_sgate = v.get("ffn_gate_shexp.weight");    const WeightRef* w_sup = v.get("ffn_up_shexp.weight");    const WeightRef* w_sdown = v.get("ffn_down_shexp.weight");    const char* missing = !w_ginp ? "ffn_gate_inp_shexp.weight" : !w_sgate ? "ffn_gate_shexp.weight"                          : !w_sup ? "ffn_up_shexp.weight" : !w_sdown ? "ffn_down_shexp.weight" : nullptr;    if (missing) { err = v.name(missing) + " is missing"; return false; }
 // ---- the shared expert.  Its three weights are quantized, so they need their planes.
 SForm f_gate, f_up, f_down;    if (!sform_of(*w_sgate, f_gate, v.name("ffn_gate_shexp.weight"), err)) return false;    if (!sform_of(*w_sup, f_up, v.name("ffn_up_shexp.weight"), err)) return false;    if (!sform_of(*w_sdown, f_down, v.name("ffn_down_shexp.weight"), err)) return false;    Planes p_gate, p_up, p_down;    if (!plane_ptrs(*w_sgate, v.name("ffn_gate_shexp.weight"), p_gate, err)) return false;    if (!plane_ptrs(*w_sup, v.name("ffn_up_shexp.weight"), p_up, err)) return false;    if (!plane_ptrs(*w_sdown, v.name("ffn_down_shexp.weight"), p_down, err)) return false;
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 8a8b69bcac2..c4b0dcc0d49 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -801,6 +801,15 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                                           NE, n, cs);
                 native_router_top10_multi(logits_ + tb * NE, ids_ + tb * K, w_ + tb * K, n, cs);
             } catch (const std::exception& e) { err = "verify router: " + std::string(e.what()); return false; }
+#if defined(STRATA_HIP_GFX906)
+        } else if (dec_batch) {
+            // gfx906: the Coder's 256-expert router (the native router is 512 x 10 only) for the whole window in one
+            // multi-column BF16 projection and one top-k, bitwise the per-token calls (route_window_parity); ~3 ms
+            // of a ~55 ms verify window on 2x MI50.  STRATA_ROUTE_PER_TOKEN=1: the per-token calls.
+            if (!moe_route_window(wt, g, l, K, ss.moe, mixed_ + tb * N, logits_ + tb * NE, ids_ + tb * K, w_ + tb * K, n,
+                                  cs, err))
+                return false;
+#endif
         } else
         for (int t = tb; t < te; ++t) {
             MoEBuffers mb = ss.moe;
diff --git a/src/kernels/cuda/native_bf16.cu b/src/kernels/cuda/native_bf16.cu
index 1390a6abecf..fdbdc947c68 100644
--- a/src/kernels/cuda/native_bf16.cu
+++ b/src/kernels/cuda/native_bf16.cu
@@ -183,4 +183,17 @@ void bf16_gemv_fp32_mmvf(const float* x, const uint16_t* w, float* y,
 }
 
 
+
+void bf16_gemv_fp32_mmvf_cols(const float* x, const uint16_t* w, float* y, int64_t n_in, int64_t n_out, int ncols,
+                              void* stream) {
+    // columns contiguous: the existing multi-row kernel (weight read once, each output bitwise its one-row call),
+    // up to 8 rows per launch
+    for (int c0 = 0; c0 < ncols; c0 += 8) {
+        const int nc = ncols - c0 < 8 ? ncols - c0 : 8;
+        if (nc == 1) bf16_gemv_fp32_mmvf(x + (size_t) c0 * n_in, w, y + (size_t) c0 * n_out, n_in, n_out, stream);
+        else bf16_gemv_fp32_mmvf_multi(x + (size_t) c0 * n_in, n_in, w, y + (size_t) c0 * n_out, n_out, n_in, n_out, nc,
+                                       stream);
+    }
+}
+
 }  // namespace strata::kernels
diff --git a/src/kernels/route_window_parity.cpp b/src/kernels/route_window_parity.cpp
new file mode 100644
index 00000000000..bb0d6b9a425
--- /dev/null
+++ b/src/kernels/route_window_parity.cpp
@@ -0,0 +1,75 @@
+// route_window_parity - the verify window's batched routing against the per-token calls, bit for bit.
+//
+// `moe_route_window` replaces n per-token (projection + top-k) pairs by one multi-column BF16 projection and one
+// n-token top-k.  Speculative decoding is exact only if a token's route does not depend on how many tokens share
+// its window, so both batched kernels must equal their one-token forms exactly - this checks that on random data
+// shaped like the router (2560 -> 256, top-10) and like the shared-expert gate (2560 -> 1).
+#include "strata/kernels/bf16_gemv.hpp"
+#include "strata/kernels/router_top10.hpp"
+
+#include <cuda_runtime.h>
+
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace {
+void ck(cudaError_t e, const char* what) {
+    if (e != cudaSuccess) { std::fprintf(stderr, "%s: %s\n", what, cudaGetErrorString(e)); std::exit(2); }
+}
+uint16_t bf16(float f) { uint32_t i; std::memcpy(&i, &f, 4); return (uint16_t) ((i + ((i >> 16) & 1u) + 0x7FFFu) >> 16); }
+}  // namespace
+
+int main() {
+    const int N = 2560, E = 256, K = 10;
+    int bad = 0;
+    std::mt19937 rng(7);
+    std::normal_distribution<float> nd(0.0f, 1.0f);
+    for (int n_out : {E, 1}) {
+        for (int T : {2, 3, 4, 6}) {
+            std::vector<uint16_t> w((size_t) n_out * N);
+            std::vector<float> x((size_t) T * N);
+            for (auto& v : w) v = bf16(nd(rng) * 0.05f);
+            for (auto& v : x) v = nd(rng);
+            uint16_t* dw; float *dx, *dy1, *dyn;
+            ck(cudaMalloc(&dw, w.size() * 2), "w"); ck(cudaMalloc(&dx, x.size() * 4), "x");
+            ck(cudaMalloc(&dy1, (size_t) T * n_out * 4), "y1"); ck(cudaMalloc(&dyn, (size_t) T * n_out * 4), "yn");
+            ck(cudaMemcpy(dw, w.data(), w.size() * 2, cudaMemcpyHostToDevice), "up w");
+            ck(cudaMemcpy(dx, x.data(), x.size() * 4, cudaMemcpyHostToDevice), "up x");
+            for (int t = 0; t < T; ++t)
+                strata::kernels::bf16_gemv_fp32_mmvf(dx + (size_t) t * N, dw, dy1 + (size_t) t * n_out, N, n_out, nullptr);
+            strata::kernels::bf16_gemv_fp32_mmvf_cols(dx, dw, dyn, N, n_out, T, nullptr);
+            ck(cudaDeviceSynchronize(), "sync");
+            std::vector<float> y1((size_t) T * n_out), yn((size_t) T * n_out);
+            ck(cudaMemcpy(y1.data(), dy1, y1.size() * 4, cudaMemcpyDeviceToHost), "down 1");
+            ck(cudaMemcpy(yn.data(), dyn, yn.size() * 4, cudaMemcpyDeviceToHost), "down n");
+            const bool same = std::memcmp(y1.data(), yn.data(), y1.size() * 4) == 0;
+            std::printf("  mmvf cols  n_out %3d  T %d  %s\n", n_out, T, same ? "bit-identical" : "*** DIFFERS ***");
+            if (!same) ++bad;
+            if (n_out == E) {
+                int *i1, *in_; float *w1, *wn;
+                ck(cudaMalloc(&i1, (size_t) T * K * 4), "i1"); ck(cudaMalloc(&in_, (size_t) T * K * 4), "in");
+                ck(cudaMalloc(&w1, (size_t) T * K * 4), "w1"); ck(cudaMalloc(&wn, (size_t) T * K * 4), "wn");
+                for (int t = 0; t < T; ++t)
+                    strata::kernels::router_top10(dy1 + (size_t) t * E, 1, E, K, i1 + t * K, w1 + t * K, nullptr);
+                strata::kernels::router_top10(dy1, T, E, K, in_, wn, nullptr);
+                ck(cudaDeviceSynchronize(), "sync top");
+                std::vector<int> a((size_t) T * K), b((size_t) T * K);
+                std::vector<float> fa((size_t) T * K), fb((size_t) T * K);
+                ck(cudaMemcpy(a.data(), i1, a.size() * 4, cudaMemcpyDeviceToHost), "ids1");
+                ck(cudaMemcpy(b.data(), in_, b.size() * 4, cudaMemcpyDeviceToHost), "idsn");
+                ck(cudaMemcpy(fa.data(), w1, fa.size() * 4, cudaMemcpyDeviceToHost), "w1");
+                ck(cudaMemcpy(fb.data(), wn, fb.size() * 4, cudaMemcpyDeviceToHost), "wn");
+                const bool s2 = a == b && std::memcmp(fa.data(), fb.data(), fa.size() * 4) == 0;
+                std::printf("  top10 n    T %d            %s\n", T, s2 ? "bit-identical" : "*** DIFFERS ***");
+                if (!s2) ++bad;
+                cudaFree(i1); cudaFree(in_); cudaFree(w1); cudaFree(wn);
+            }
+            cudaFree(dw); cudaFree(dx); cudaFree(dy1); cudaFree(dyn);
+        }
+    }
+    std::printf(bad ? "route_window_parity: %d FAILURES\n" : "route_window_parity OK\n", bad);
+    return bad ? 1 : 0;
+}

From f0b3d1729368323e663fccf66e9079036e3008d2 Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 21:44:29 +0300
Subject: [PATCH 149/201] docs: gfx906 verify-window routing in the kernel
 table

---
 docs/AMD_HIP.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/AMD_HIP.md b/docs/AMD_HIP.md
index dbeb3630ca1..65409a756ad 100644
--- a/docs/AMD_HIP.md
+++ b/docs/AMD_HIP.md
@@ -383,6 +383,7 @@ container with `--device=/dev/kfd --device=/dev/dri --group-add video --ipc=host
 | grouped native experts | mode 7: signs as `dp4a(g ^ m, u) - dp4a(m, u)` (no byte SIMD), grids and activations in LDS, one weight load per group; the IQ formats only (Unsloth's K-quant / Q5_1 / Q8_0 experts take the CUDA layout) | `STRATA_EXP_MODE=2` (previous AMD layout) |
 | MMVQ | one wavefront per row, 64-lane butterfly, no LDS | `STRATA_MMVQ_WAVE=0` |
 | router top-10 | one wavefront, register argmax | - |
+| verify-window routing (256-expert router) | the window's tokens in one multi-column BF16 projection + one top-k, ~3 ms of a ~55 ms window | `STRATA_ROUTE_PER_TOKEN=1` |
 | hyper-connection read | norm loads in flight, 8 lanes per row for `up` | `STRATA_GR_FAST=0` |
 | `gr_down_multi`, opt-in | split along K (8 rows x 5 slices of 2048), ~3% per window; sums in another order than the single-token read, so off by default | `STRATA_GR_SPLIT=1` |
 | IQ4 table lookup | llama.cpp's `v_perm_b32` sequence (HIP's `__byte_perm` is a scratch array) | - |

From ce1e9b2c26270cd364c4465a84b9c32e497b8d8b Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 22:30:14 +0300
Subject: [PATCH 150/201] fused_gr: the gfx906 fast norm/up launches only in
 the gfx906 build (CUDA and RDNA did not compile)

---
 src/kernels/cuda/fused_gr.cu | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/kernels/cuda/fused_gr.cu b/src/kernels/cuda/fused_gr.cu
index 0531aa0a784..41c048cdcbb 100644
--- a/src/kernels/cuda/fused_gr.cu
+++ b/src/kernels/cuda/fused_gr.cu
@@ -776,12 +776,13 @@ void launch_multi(const GrMulti& m, int variant, cudaStream_t st, unsigned long
     // gfx906: the latency-hidden norm/up (STRATA_GR_FAST=0: off) - the same sums in the same order as the kernels
     // they replace (gr_parity checks the multi-token read against single-token calls bitwise)
     const bool fast = gr_fast();
-#else
-    const bool fast = false;
-#endif
     if (variant >= kHcSplit) gr_norm_split_kernel<<<dim3((unsigned) n_tok, HC), THREADS, 0, st>>>(m);
     else if (fast) gr_norm_fast_kernel<<<n_tok, THREADS, 0, st>>>(m);
     else gr_norm_multi_kernel<<<n_tok, THREADS, 0, st>>>(m);
+#else
+    if (variant >= kHcSplit) gr_norm_split_kernel<<<dim3((unsigned) n_tok, HC), THREADS, 0, st>>>(m);
+    else gr_norm_multi_kernel<<<n_tok, THREADS, 0, st>>>(m);
+#endif
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0, (void*) st);
     const bool staged = variant >= kHcStaged;
     int tv = 2560;
@@ -815,8 +816,11 @@ void launch_multi(const GrMulti& m, int variant, cudaStream_t st, unsigned long
         }
     }
     if (stamp_buf) gpu_stamp(stamp_buf, stamp_i0 + 1, (void*) st);
+#if defined(STRATA_HIP_GFX906)
     if (fast) gr_up_fast_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
-    else gr_up_multi_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
+    else
+#endif
+    gr_up_multi_kernel<<<UPM_BLOCKS, THREADS, 0, st>>>(m);
 }
 
 /// STRATA_HC_SPLIT: unset or 2 = the newest the check accepts (staged), 1 = at most split, 0 = the plain read

From 4d20d25925374a9a3da7bb0e37e2aa4868d7e7bd Mon Sep 17 00:00:00 2001
From: zhedang <raymanic@gmail.com>
Date: Sat, 3 Oct 2026 00:02:35 -0300
Subject: [PATCH 151/201] core: optimize remote expert helper decode

Add default-off cache coordination, helper-side weighted reduction and CPU activation quantization on demand. Allow helper cache capacities to be sized automatically at startup.

Port the saved v2.2 implementation onto upstream 0.1.38 without changing the separate peer tier. Document the helper-only scope and current validation limits.
---
 CMakeLists.txt                            |   1 +
 docs/SECOND_GPU.md                        |  32 ++++
 include/strata/core/expert_cache.hpp      |   7 +
 include/strata/core/remote_expert_opt.hpp |  53 ++++++
 include/strata/core/remote_experts.hpp    |   6 +-
 include/strata/core/verify.hpp            |   3 +
 src/core/expert_source.cpp                |  16 +-
 src/core/remote_expert_opt.cu             | 194 ++++++++++++++++++++++
 src/core/remote_experts.cpp               |  43 +++--
 src/core/verify.cpp                       |  14 +-
 src/program/generate.cpp                  |  39 ++++-
 11 files changed, 375 insertions(+), 33 deletions(-)
 create mode 100644 include/strata/core/remote_expert_opt.hpp
 create mode 100644 src/core/remote_expert_opt.cu

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c614cbdd997..36d1a3fb3c3 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -355,6 +355,7 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   # library is the honest shape of the dependency graph: core knows about devices and weights, kernels know
   # about arithmetic, and this one knows the ORDER the arithmetic happens in.
   add_library(strata_engine STATIC src/core/layer.cpp src/core/session.cpp src/core/expert_source.cpp src/core/remote_experts.cpp
+    src/core/remote_expert_opt.cu
     src/core/expert_cache.cpp src/core/native_head.cpp src/core/native_dense.cpp src/core/verify.cpp src/core/mtp.cpp
     src/core/conversation_snapshot.cpp src/core/conversation_state.cpp src/core/conversation_memory.cpp src/core/peer_experts.cpp)
   target_include_directories(strata_engine PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
diff --git a/docs/SECOND_GPU.md b/docs/SECOND_GPU.md
index 179b9b3fa1b..11f4ea24901 100644
--- a/docs/SECOND_GPU.md
+++ b/docs/SECOND_GPU.md
@@ -84,6 +84,38 @@ The existing warning about the CUDA0 expert-cache GPU hit path still applies:
 its outputs diverge from cache-off runs. Treat performance as experimental
 until the generated tokens have been validated.
 
+## Optional helper decode optimization
+
+`--remote-expert-opt` (default off, `--serve` only) optimizes the CUDA1-3
+helper caches above. The primary cache avoids admitting experts already held
+by a helper, and helpers replace cold experts with frequently routed CPU
+misses using their existing same-layer slots. Each helper reduces its expert
+outputs to a weighted partial sum on its GPU before returning one vector per
+token. Tokens with no CPU expert work skip CPU activation quantization.
+
+For an existing server configuration with CUDA0 as the primary and CUDA1 as a
+helper, use these engine arguments alongside the model and profile arguments:
+
+```text
+--expert-cache auto --expert-cache-device1 auto --remote-expert-opt
+```
+
+`--expert-cache-device1`, `--expert-cache-device2` and
+`--expert-cache-device3` now also accept `auto`: fill each helper from its
+assigned ranking using actual aligned expert bytes and free VRAM, retaining
+the existing 512 MiB allowance. Explicit numeric budgets still work. This is
+startup capacity sizing, not throughput balancing; with several helpers a
+card's truncated candidate tail is not redistributed to another card.
+
+The optimization uses the existing host scheduling and pinned-host transport,
+not P2P or tensor parallelism. Each layer still waits for its participating
+helpers. It changes floating-point summation order, so enabled output is not
+claimed to be bitwise identical. Only two-card CUDA operation has been measured;
+three/four cards and HIP have not been validated. Without the switch, the
+existing decode path remains in use. This does not optimize the separate
+`--peer-device` path below or change its existing incompatibility with helper
+caches.
+
 ## Peer tier (`--peer-device`)
 
 `--peer-device N` puts a second adaptive expert cache on CUDA device N. It
diff --git a/include/strata/core/expert_cache.hpp b/include/strata/core/expert_cache.hpp
index 2730a03d22f..8c031ff307b 100644
--- a/include/strata/core/expert_cache.hpp
+++ b/include/strata/core/expert_cache.hpp
@@ -135,6 +135,13 @@ class ExpertCache {
     /// sweep) and a placeholder policy would set the hit rate that everything downstream is then sized against.
     int32_t admit(int64_t layer, int64_t expert);
 
+    /// Publish a same-layer replacement after its slot copy has completed.
+    void replace(int64_t layer, int32_t old_expert, int32_t new_expert) {
+        auto& old = residency_[(size_t) layer * n_expert_ + old_expert];
+        residency_[(size_t) layer * n_expert_ + new_expert] = old;
+        old = kNotResident;
+    }
+
     /// **R4.2g: GIVE EACH LAYER ITS OWN SLOTS.  ROUND 328 MEASURED WHY THE GLOBAL FORM CANNOT WORK.**
     ///
     /// `admit`'s original policy hands out slots in ARRIVAL ORDER from one counter shared by every layer
diff --git a/include/strata/core/remote_expert_opt.hpp b/include/strata/core/remote_expert_opt.hpp
new file mode 100644
index 00000000000..5eb488c734f
--- /dev/null
+++ b/include/strata/core/remote_expert_opt.hpp
@@ -0,0 +1,53 @@
+#pragma once
+
+#include <cstddef>
+#include <cstdint>
+#include <string>
+#include <utility>
+#include <vector>
+
+namespace strata::core {
+class RemoteExperts;
+class ExpertSource;
+
+// Remote Expert Decode Optimization v1 on existing helper caches. One instance per serial engine.
+class RemoteExpertOpt {
+public:
+    RemoteExpertOpt() = default;
+    ~RemoteExpertOpt();
+    RemoteExpertOpt(const RemoteExpertOpt&) = delete;
+    RemoteExpertOpt& operator=(const RemoteExpertOpt&) = delete;
+
+    void attach(RemoteExperts& remote); // before RemoteExperts::open
+    bool init(std::string& err);        // after all helper caches are open
+    bool owns(int64_t layer, int32_t expert) const;
+    bool adapt(const std::vector<float>& usage, const std::vector<int32_t>& primary,
+               const std::vector<std::pair<int32_t, int32_t>>& pending, int max_swaps,
+               ExpertSource& source);
+
+    // Bracket the existing pool callback; its signature and dispatch remain unchanged.
+    void begin(const float* weights, int token_begin, int tokens);
+    void end() { weights_ = nullptr; }
+    void copy_rows(float* dst, const float* src, int token_begin, int tokens,
+                   const int32_t* hit_rows, const int32_t* count, void* stream) const;
+    void combine(float* dst, float* scratch, int token_begin, int tokens,
+                 const uint32_t* skip, uint32_t ring, void* stream) const;
+
+private:
+    friend class RemoteExperts;
+    static size_t metadata_bytes();
+    bool active() const { return weights_ != nullptr; }
+    void prepare(const RemoteExperts& remote, void* metadata) const;
+    bool reduce(RemoteExperts& remote, const void* metadata, std::string& err);
+    void accumulate(const RemoteExperts& remote);
+
+    struct Peer { RemoteExperts* remote; float* sum = nullptr; };
+    std::vector<Peer> peers_;
+    float* h_sum_ = nullptr;
+    float* m_sum_ = nullptr;
+    int32_t* h_mask_ = nullptr;
+    int32_t* m_mask_ = nullptr;
+    const float* weights_ = nullptr;
+    int token_begin_ = 0, tokens_ = 0;
+};
+} // namespace strata::core
diff --git a/include/strata/core/remote_experts.hpp b/include/strata/core/remote_experts.hpp
index 805bc950f84..224d24f5f07 100644
--- a/include/strata/core/remote_experts.hpp
+++ b/include/strata/core/remote_experts.hpp
@@ -11,6 +11,7 @@
 #include <vector>
 
 namespace strata::core {
+class RemoteExpertOpt;
 
 /// A static, profile-filled expert tier on another CUDA device. CUDA0 keeps all
 /// dense weights and state; results return through the existing pinned CPU rows.
@@ -27,7 +28,7 @@ class RemoteExperts {
     bool open(int device, int slots, int64_t layers, int64_t experts,
               const std::vector<std::pair<int32_t, int32_t>>& ranked,
               const ExpertCache& primary, ExpertSource& source,
-              std::vector<uint8_t>& claimed, std::string& err);
+              std::vector<uint8_t>& claimed, std::string& err, bool auto_size = false);
     void close();
 
     /// `kind` is the primary verifier's classification (-1 = CPU candidate),
@@ -36,6 +37,7 @@ class RemoteExperts {
                int64_t k, const int32_t* kind, const int32_t* primary_res,
                std::string& err);
     bool owns(int64_t index) const { return owned_[(size_t) index] != 0; }
+    bool optimized_decode() const { return remote_opt_ != nullptr; }
     bool finish(float* out, std::string& err);
     int64_t resident() const { return cache_.resident(); }
     int64_t computed() const { return computed_; }
@@ -48,6 +50,8 @@ class RemoteExperts {
     double ms_wait() const { return ms_wait_; }
 
 private:
+    friend class RemoteExpertOpt;
+    RemoteExpertOpt* remote_opt_ = nullptr;
     int device_ = -1;
     int64_t n_expert_ = 0;
     int32_t groups_ = 0;
diff --git a/include/strata/core/verify.hpp b/include/strata/core/verify.hpp
index 4c7bd30c84c..68723d0eefe 100644
--- a/include/strata/core/verify.hpp
+++ b/include/strata/core/verify.hpp
@@ -38,6 +38,7 @@
 namespace strata::core {
 
 class NativeHead;
+class RemoteExpertOpt;
 
 /// The CPU pool for a window: x_f (n_tok, n_embd), ids (n_tok, k) -> out (n_tok * k, n_embd), hit rows zeroed.
 using PoolMultiFn = void (*)(void* user, const float* x_f, const int32_t* ids, int64_t n_tok, int64_t k, float* out,
@@ -58,6 +59,7 @@ class Verifier {
     ~Verifier();
     Verifier(const Verifier&) = delete;
     Verifier& operator=(const Verifier&) = delete;
+    void set_remote_expert_opt(RemoteExpertOpt* opt) { remote_opt_ = opt; } // before init/capture
 
     /// The watchdog's view of the window in flight (issue #31): the layer, the GPU's sequence, the flags.
     void diag(std::FILE* f) const;
@@ -165,6 +167,7 @@ class Verifier {
     std::string profile_report();
 
 private:
+    RemoteExpertOpt* remote_opt_ = nullptr;
     bool capture(int T, std::string& err);
     strata::kernels::SamplerParams sampling_ = [] {
         strata::kernels::SamplerParams s;
diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index 71e44cdc9bf..0f18cdc06a6 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2106,13 +2106,17 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         if (kind[i] < 0) { any_cpu = true; break; }
     const auto c1 = std::chrono::steady_clock::now();
     if (any_cpu) {
-        if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
-            for (int64_t t = 0; t < n_tok; ++t) act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
-        else if (native)
-            for (int64_t t = 0; t < n_tok; ++t)
+        // #578 --remote-expert-opt: a token whose experts all run on a GPU (CUDA0 or a helper) needs no CPU activation
+        const bool ep = d.remote_count > 0 && d.remote[0]->optimized_decode();
+        for (int64_t t = 0; t < n_tok; ++t) {
+            if (ep && std::all_of(kind + t * k, kind + (t + 1) * k, [](int32_t v) { return v >= 0; })) continue;
+            if (native && lay.fmt[(size_t) d.layers].gu_type == 42)   // a native Q2_0 pack: the Q2_0 kernels' activations
+                act_quant_any(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+            else if (native)
                 native_quant_act(lay.fmt[(size_t) d.layers], x_f + (size_t) t * H, d.nact_multi.data() + (size_t) t * kNativeActBytes);
-        else
-            for (int64_t t = 0; t < n_tok; ++t) act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+            else
+                act_quant_q8_1(x_f + (size_t) t * H, H, d.act_multi[(size_t) t]);
+        }
     }
     const auto c2 = std::chrono::steady_clock::now();
     if (any_cpu) {   // CS-T: the experts the CPU computes, fetched together (the GGUF in place reads them on several threads)
diff --git a/src/core/remote_expert_opt.cu b/src/core/remote_expert_opt.cu
new file mode 100644
index 00000000000..229781c805a
--- /dev/null
+++ b/src/core/remote_expert_opt.cu
@@ -0,0 +1,194 @@
+#include "strata/core/remote_expert_opt.hpp"
+#include "strata/core/remote_experts.hpp"
+#include "strata/core/on_device.hpp"
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/elementwise.hpp"
+#include "strata/kernels/verify_kernels.hpp"
+
+#include <algorithm>
+#include <cstring>
+
+namespace strata::core {
+namespace {
+constexpr int64_t H = strata::kernels::cpu::H;
+constexpr int K = 10, MAXT = strata::kernels::cpu::MAXT, CAP = MAXT * K;
+struct ReduceMeta { int32_t row[CAP]; float weight[CAP]; };
+
+bool check(cudaError_t status, std::string& err) {
+    if (status == cudaSuccess) return true;
+    err = std::string("remote expert decode optimization: ") + cudaGetErrorString(status);
+    return false;
+}
+
+__global__ void reduce_experts(const float* parts, const ReduceMeta* meta, float* sum) {
+    const int t = blockIdx.y, c = blockIdx.x * blockDim.x + threadIdx.x;
+    if (c >= H) return;
+    float v = 0.0f;
+    for (int j = 0; j < K; ++j) {
+        const int i = t * K + j, r = meta->row[i];
+        if (r >= 0) v += parts[(int64_t) r * H + c] * meta->weight[i];
+    }
+    sum[(int64_t) t * H + c] = v;
+}
+
+// Like the upstream mapped-row copy, also skip rows returned in the remote sum.
+__global__ void copy_cpu_rows(float4* dst, const volatile float4* src, const int32_t* mask,
+                              const int32_t* hit_rows, const int32_t* count) {
+    const int row = blockIdx.x;
+    __shared__ int skip;
+    if (threadIdx.x == 0) {
+        int s = mask[row];
+        for (int i = 0; i < *count; ++i) s |= hit_rows[i] == row;
+        skip = s;
+    }
+    __syncthreads();
+    const int64_t start = (int64_t) row * (H / 4);
+    for (int i = threadIdx.x; i < H / 4; i += blockDim.x)
+        dst[start + i] = skip ? make_float4(0, 0, 0, 0) : const_cast<const float4*>(src)[start + i];
+}
+} // namespace
+
+void RemoteExpertOpt::attach(RemoteExperts& remote) {
+    remote.remote_opt_ = this;
+    peers_.push_back({&remote});
+}
+
+bool RemoteExpertOpt::init(std::string& err) {
+    void* mapped = nullptr;
+    if (!check(cudaHostAlloc((void**) &h_sum_, MAXT * (H + K) * sizeof(float),
+                             cudaHostAllocPortable | cudaHostAllocMapped), err) ||
+        !check(cudaHostGetDevicePointer(&mapped, h_sum_, 0), err)) return false;
+    m_sum_ = (float*) mapped;
+    h_mask_ = reinterpret_cast<int32_t*>(h_sum_ + MAXT * H);
+    m_mask_ = reinterpret_cast<int32_t*>(m_sum_ + MAXT * H);
+    for (auto& p : peers_) {
+        const OnDevice on(p.remote->device_);
+        if (!check(cudaMalloc((void**) &p.sum, MAXT * H * sizeof(float)), err)) return false;
+    }
+    return true;
+}
+
+RemoteExpertOpt::~RemoteExpertOpt() {
+    for (auto& p : peers_) {
+        const OnDevice on(p.remote->device_);
+        if (p.remote->stream_) cudaStreamSynchronize(p.remote->stream_);
+        if (p.sum) cudaFree(p.sum);
+        p.remote->remote_opt_ = nullptr;
+    }
+    if (h_sum_) cudaFreeHost(h_sum_);
+}
+
+size_t RemoteExpertOpt::metadata_bytes() { return sizeof(ReduceMeta); }
+
+void RemoteExpertOpt::begin(const float* weights, int token_begin, int tokens) {
+    weights_ = weights;
+    token_begin_ = token_begin;
+    tokens_ = tokens;
+    std::memset(h_sum_ + token_begin * H, 0, tokens * H * sizeof(float));
+    std::memset(h_mask_ + token_begin * K, 0, tokens * K * sizeof(int32_t));
+}
+
+void RemoteExpertOpt::prepare(const RemoteExperts& remote, void* metadata) const {
+    auto* m = (ReduceMeta*) metadata;
+    std::fill(m->row, m->row + tokens_ * K, -1);
+    for (size_t i = 0; i < remote.original_row_.size(); ++i)
+        m->row[remote.original_row_[i]] = (int32_t) i;
+    std::memcpy(m->weight, weights_, tokens_ * K * sizeof(float));
+}
+
+bool RemoteExpertOpt::reduce(RemoteExperts& remote, const void* metadata, std::string& err) {
+    const auto& p = *std::find_if(peers_.begin(), peers_.end(), [&](const Peer& p) { return p.remote == &remote; });
+    reduce_experts<<<dim3((H + 255) / 256, tokens_), 256, 0, remote.stream_>>>(
+        remote.d_out_, (const ReduceMeta*) metadata, p.sum);
+    return check(cudaMemcpyAsync(remote.h_out_, p.sum, tokens_ * H * sizeof(float),
+                                  cudaMemcpyDeviceToHost, remote.stream_), err);
+}
+
+void RemoteExpertOpt::accumulate(const RemoteExperts& remote) {
+    for (int64_t i = 0; i < tokens_ * H; ++i) h_sum_[token_begin_ * H + i] += remote.h_out_[i];
+    for (int i = 0; i < tokens_ * K; ++i)
+        h_mask_[token_begin_ * K + i] |= remote.owned_[(size_t) i] != 0;
+}
+
+void RemoteExpertOpt::copy_rows(float* dst, const float* src, int token_begin, int tokens,
+                         const int32_t* hit_rows, const int32_t* count, void* stream) const {
+    copy_cpu_rows<<<tokens * K, 128, 0, (cudaStream_t) stream>>>(
+        (float4*) dst, (const volatile float4*) src, m_mask_ + token_begin * K, hit_rows, count);
+}
+
+void RemoteExpertOpt::combine(float* dst, float* scratch, int token_begin, int tokens,
+                       const uint32_t* skip, uint32_t ring, void* stream) const {
+    const float* sum = m_sum_ + token_begin * H;
+    if (skip) {
+        // An all-primary device-planned group bypasses the host: ignore its stale sum.
+        strata::kernels::copy_or_zero_from_mapped(scratch, sum, tokens * H, skip, ring, stream);
+        sum = scratch;
+    }
+    strata::kernels::add_inplace(dst, sum, tokens * H, stream);
+}
+
+bool RemoteExpertOpt::owns(int64_t layer, int32_t expert) const {
+    for (const auto& p : peers_)
+        if (p.remote->cache_.slot_of(layer, expert) >= 0) return true;
+    return false;
+}
+
+bool RemoteExpertOpt::adapt(const std::vector<float>& usage, const std::vector<int32_t>& primary,
+                     const std::vector<std::pair<int32_t, int32_t>>& pending, int max_swaps,
+                     ExpertSource& source) {
+    if (max_swaps <= 0) return true;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    std::vector<uint8_t> resident(primary.size(), 0);
+    for (size_t i = 0; i < primary.size(); ++i) resident[i] = primary[i] >= 0;
+    for (const auto& [i, slot] : pending) resident[(size_t) i] = 1;
+    for (const auto& p : peers_) {
+        const auto& r = *p.remote;
+        for (int32_t l = 0; l < (int32_t) r.layers_present_.size(); ++l)
+            for (int32_t e = 0; e < r.n_expert_; ++e)
+                if (r.cache_.slot_of(l, e) >= 0) resident[(size_t) l * r.n_expert_ + e] = 1;
+    }
+    struct Swap { float gain; int32_t layer, in, out; };
+    std::string err;
+    for (auto& p : peers_) {
+        auto& r = *p.remote;
+        std::vector<Swap> swaps;
+        std::vector<std::pair<float, int32_t>> candidates, victims;
+        for (int32_t l = 0; l < (int32_t) r.layers_present_.size(); ++l) {
+            candidates.clear(); victims.clear();
+            const size_t base = (size_t) l * r.n_expert_;
+            float primary_cold = 1.0e30f;
+            for (int32_t e = 0; e < r.n_expert_; ++e) {
+                const float u = usage[base + e];
+                if (primary[base + e] >= 0) primary_cold = std::min(primary_cold, u);
+                if (r.cache_.slot_of(l, e) >= 0) victims.emplace_back(u, e);
+                else if (!resident[base + e] && u >= 2.0f) candidates.emplace_back(u, e);
+            }
+            const size_t n = std::min(candidates.size(), victims.size());
+            if (!n) continue;
+            std::sort(candidates.begin(), candidates.end(), [](auto& a, auto& b) { return a.first > b.first; });
+            std::partial_sort(victims.begin(), victims.begin() + n, victims.end(),
+                              [](auto& a, auto& b) { return a.first < b.first; });
+            for (size_t i = 0; i < n; ++i) {
+                if (victims[i].first > primary_cold) break;
+                if (candidates[i].first < victims[i].first + 1.5f) break;
+                swaps.push_back({candidates[i].first - victims[i].first, l, candidates[i].second, victims[i].second});
+            }
+        }
+        std::sort(swaps.begin(), swaps.end(), [](auto& a, auto& b) { return a.gain > b.gain; });
+        if ((int) swaps.size() > max_swaps) swaps.resize((size_t) max_swaps);
+        if (swaps.empty()) continue;
+        const OnDevice on(r.device_);
+        for (const auto& s : swaps)
+            if (!r.cache_.fill_slot(r.cache_.slot_of(s.layer, s.out), source.blob(s.layer, s.in),
+                                    r.stream_, err, (int64_t) lay.blob_bytes(s.layer))) return false;
+        if (!check(cudaStreamSynchronize(r.stream_), err)) return false;
+        for (const auto& s : swaps) {
+            r.cache_.replace(s.layer, s.out, s.in);
+            const size_t base = (size_t) s.layer * r.n_expert_;
+            resident[base + s.out] = 0;
+            resident[base + s.in] = 1;
+        }
+    }
+    return true;
+}
+} // namespace strata::core
diff --git a/src/core/remote_experts.cpp b/src/core/remote_experts.cpp
index 53d8d7643c4..1b6969e8287 100644
--- a/src/core/remote_experts.cpp
+++ b/src/core/remote_experts.cpp
@@ -1,4 +1,5 @@
 #include "strata/core/remote_experts.hpp"
+#include "strata/core/remote_expert_opt.hpp"
 
 #include "strata/kernels/cpu/expert_layout.hpp"
 #include "strata/kernels/iq_kernels.hpp"
@@ -120,7 +121,7 @@ void RemoteExperts::close() {
 bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
                          const std::vector<std::pair<int32_t, int32_t>>& ranked,
                          const ExpertCache& primary, ExpertSource& source,
-                         std::vector<uint8_t>& claimed, std::string& err) {
+                         std::vector<uint8_t>& claimed, std::string& err, bool auto_size) {
     close();
     int count = 0;
     if (!check(cudaGetDeviceCount(&count), "cudaGetDeviceCount", err, device)) return false;
@@ -134,29 +135,34 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
     device_ = device;
     n_expert_ = experts;
     const auto& lay = strata::kernels::cpu::expert_layout();
+    size_t free_bytes = 0, total_bytes = 0;
+    if (!check(cudaMemGetInfo(&free_bytes, &total_bytes), "free memory", err, device)) { close(); return false; }
+    uint64_t needed = 0;
     std::vector<std::pair<int32_t, int32_t>> selected;
-    selected.reserve((size_t) slots);
+    selected.reserve((size_t) std::min<int64_t>(slots, layers * experts));
     std::vector<uint8_t> picked(claimed.size(), 0);
     for (const auto& pair : ranked) {
         if (pair.first < 0 || pair.first >= layers || pair.second < 0 || pair.second >= experts) continue;
         const size_t index = (size_t) pair.first * (size_t) experts + (size_t) pair.second;
         if (primary.slot_of(pair.first, pair.second) < 0 && !claimed[index] && !picked[index]) {
+            const uint64_t bytes = lay.native ? (lay.blob_bytes(pair.first) + 255) / 256 * 256 : lay.max_blob;
+            if (auto_size && needed + bytes + (512ull << 20) > free_bytes) break;
             selected.push_back(pair);
+            needed += bytes;
             picked[index] = 1;
             if ((int) selected.size() >= slots) break;
         }
     }
-    if (selected.empty()) { err = "CUDA" + std::to_string(device) + " experts: no unclaimed experts remain"; close(); return false; }
+    if (selected.empty()) {
+        err = "CUDA" + std::to_string(device) + (auto_size ? " experts: no unclaimed expert fits with 512 MiB free"
+                                                          : " experts: no unclaimed experts remain");
+        close(); return false;
+    }
     std::vector<int64_t> sizes;
     if (lay.native) {
         sizes.reserve(selected.size());
         for (const auto& pair : selected) sizes.push_back((int64_t) lay.blob_bytes(pair.first));
     }
-    size_t free_bytes = 0, total_bytes = 0;
-    if (!check(cudaMemGetInfo(&free_bytes, &total_bytes), "free memory", err, device)) { close(); return false; }
-    uint64_t needed = 0;
-    for (const auto& pair : selected)
-        needed += lay.native ? (lay.blob_bytes(pair.first) + 255) / 256 * 256 : lay.max_blob;
     // Leave room for the CUDA context, staging and later driver allocations, especially under WDDM.
     if (needed + (512ull << 20) > free_bytes) {
         err = "CUDA" + std::to_string(device) + " experts: slots leave less than 512 MiB free; reduce --expert-cache-device" + std::to_string(device);
@@ -185,17 +191,18 @@ bool RemoteExperts::open(int device, int slots, int64_t layers, int64_t experts,
     const size_t scratch = std::max<size_t>(
         (size_t) strata::kernels::moe_hit_grouped_scratch_bytes(CAP, H, FF),
         strata::kernels::native_expert_scratch_bytes(CAP, FF));
+    const size_t meta_bytes = sizeof(RemoteMeta) + (remote_opt_ ? remote_opt_->metadata_bytes() : 0);
     const bool allocated =
         check(cudaStreamCreateWithFlags(&stream_, cudaStreamNonBlocking), "stream", err, device) &&
         check(cudaHostAlloc((void**) &h_x_, (size_t) CAP * H * sizeof(float), cudaHostAllocPortable | cudaHostAllocMapped), "input staging", err, device) &&
         check(cudaHostAlloc((void**) &h_out_, (size_t) CAP * H * sizeof(float), cudaHostAllocPortable | cudaHostAllocMapped), "result staging", err, device) &&
-        check(cudaHostAlloc(&h_meta_, sizeof(RemoteMeta), cudaHostAllocPortable), "metadata staging", err, device) &&
+        check(cudaHostAlloc(&h_meta_, meta_bytes, cudaHostAllocPortable), "metadata staging", err, device) &&
         check(cudaMalloc((void**) &d_x_, (size_t) CAP * H * sizeof(float)), "input", err, device) &&
         check(cudaMalloc((void**) &d_out_, (size_t) CAP * H * sizeof(float)), "result", err, device) &&
         check(cudaMalloc((void**) &d_q8_, (size_t) CAP * (H / 32) * 36), "activation", err, device) &&
         check(cudaMalloc((void**) &d_scales_, (size_t) CAP * (H / 32) * sizeof(float)), "activation scales", err, device) &&
         check(cudaMalloc(&d_scratch_, scratch), "scratch", err, device) &&
-        check(cudaMalloc(&d_meta_, sizeof(RemoteMeta)), "group metadata", err, device);
+        check(cudaMalloc(&d_meta_, meta_bytes), "group metadata", err, device);
     if (!allocated) { close(); return false; }
     // Zero-copy: the helper reads its input from, and writes its compact rows into, the pinned host buffers
     // directly - two copies fewer per layer, each of which is a PCIe round trip.  STRATA_REMOTE_ZEROCOPY=0 copies.
@@ -284,13 +291,16 @@ bool RemoteExperts::begin(int64_t layer, const float* x, const int32_t* ids, int
     std::memcpy(meta->dst, dst_.data(), dst_.size() * sizeof(dst_[0]));
     std::memcpy(meta->tok, tok_.data(), tok_.size() * sizeof(tok_[0]));
     meta->count = (int32_t) group_id_.size();
+    const bool reduce = remote_opt_ && remote_opt_->active();
+    if (reduce) remote_opt_->prepare(*this, meta + 1);
     DeviceScope scope(device_);
     if (!scope.ok) { err = scope.error(device_); return false; }
     groups_ = (int32_t) group_id_.size();
     const cudaStream_t s = stream_;
     const bool staged =
         (zero_copy_ || check(cudaMemcpyAsync(d_x_, h_x_, (size_t) n_tok * H * sizeof(float), cudaMemcpyHostToDevice, s), "copy input", err, device_)) &&
-        check(cudaMemcpyAsync(d_meta_, h_meta_, sizeof(RemoteMeta), cudaMemcpyHostToDevice, s), "copy group metadata", err, device_);
+        check(cudaMemcpyAsync(d_meta_, h_meta_, sizeof(RemoteMeta) + (reduce ? remote_opt_->metadata_bytes() : 0),
+                              cudaMemcpyHostToDevice, s), "copy group metadata", err, device_);
     if (!staged) return false;
     const auto& lay = strata::kernels::cpu::expert_layout();
     if (lay.native) {
@@ -298,14 +308,16 @@ bool RemoteExperts::begin(int64_t layer, const float* x, const int32_t* ids, int
         const auto& fmt = lay.fmt[(size_t) layer];
         auto L = strata::kernels::native_expert_layout(fmt.gu_type, fmt.d_type, fmt.n_embd, fmt.n_ff);
         strata::kernels::native_expert_grouped(L, d_ptr_, d_start_, d_count_, d_dst_, d_tok_,
-                                               groups_, (int64_t) dst_.size(), d_q8_, d_scratch_, zero_copy_ ? z_out_ : d_out_, s);
+                                               groups_, (int64_t) dst_.size(), d_q8_, d_scratch_, zero_copy_ && !reduce ? z_out_ : d_out_, s);
     } else {
         strata::kernels::quantize_q8_0_scaled(zero_copy_ ? z_x_ : d_x_, d_q8_, d_scales_, n_tok * H, s);
         strata::kernels::moe_grouped_s2(d_ptr_, d_start_, d_count_, d_dst_, d_tok_,
-                                        groups_, (int64_t) dst_.size(), d_q8_, d_scales_, d_scratch_, zero_copy_ ? z_out_ : d_out_, s);
+                                        groups_, (int64_t) dst_.size(), d_q8_, d_scales_, d_scratch_, zero_copy_ && !reduce ? z_out_ : d_out_, s);
     }
-    const uint64_t compact_bytes = (uint64_t) dst_.size() * H * sizeof(float);
-    if (!zero_copy_ && !check(cudaMemcpyAsync(h_out_, d_out_, (size_t) compact_bytes, cudaMemcpyDeviceToHost, s),
+    const uint64_t compact_bytes = (uint64_t) (reduce ? n_tok : dst_.size()) * H * sizeof(float);
+    if (reduce) {
+        if (!remote_opt_->reduce(*this, (RemoteMeta*) d_meta_ + 1, err)) return false;
+    } else if (!zero_copy_ && !check(cudaMemcpyAsync(h_out_, d_out_, (size_t) compact_bytes, cudaMemcpyDeviceToHost, s),
                "copy results", err, device_)) return false;
     ++launched_layers_;
     returned_bytes_ += compact_bytes;
@@ -320,6 +332,7 @@ bool RemoteExperts::finish(float* out, std::string& err) {
     const auto w0 = std::chrono::steady_clock::now();
     if (!check(cudaStreamSynchronize(stream_), "finish", err, device_)) return false;
     ms_wait_ += std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - w0).count();
+    if (remote_opt_ && remote_opt_->active()) { remote_opt_->accumulate(*this); return true; }
     for (size_t i = 0; i < original_row_.size(); ++i)
         std::memcpy(out + (size_t) original_row_[i] * H, h_out_ + i * H, (size_t) H * sizeof(float));
     return true;
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 7e87ed58333..84a56cb0451 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -1,5 +1,6 @@
 // src/core/verify.cpp - see include/strata/core/verify.hpp.
 #include "strata/core/verify.hpp"
+#include "strata/core/remote_expert_opt.hpp"
 #if defined(_WIN32)
 #include <intrin.h>
 #endif
@@ -887,7 +888,10 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                                        m_ids_ + tb * K, m_w_ + tb * K, m_seq_, (uint32_t) ((l - lb_) * G + grp + 1), cs);
             else
 #endif
-            {
+            if (remote_opt_)   // #578: the helper GPUs reduce with the routing weights - publish them
+                doorbell_publish(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
+                                 m_ids_ + tb * K, m_w_ + tb * K, m_seq_, cs);
+            else {
                 const int32_t* layer_res = hits_.d_res != nullptr ? (hits_.d_res + l * g.n_expert) : nullptr;
                 doorbell_publish_res(xm, ids_ + tb * K, layer_res, (int) g.n_expert, (int64_t) n * N, (int64_t) n * K,
                                      m_x_ + tb * N, m_ids_ + tb * K, m_seq_, cs);
@@ -999,7 +1003,9 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
             } else {
                 wait_flag_ge(m_flag_, ring, cs);               // the CPU's share is in the mapped rows
                 stamp(l, 23, grp);
-                if (dec_batch)   // only the CPU rows cross PCIe (p_dst[0, counts[1]) = the GPU's own rows)
+                if (remote_opt_)   // #578: the helper's rows come back reduced; skip them as well
+                    remote_opt_->copy_rows(parts_out, m_ymiss_ + (size_t) tb * K * N, tb, n, p_dst, p_counts + 1, cs);
+                else if (dec_batch)   // only the CPU rows cross PCIe (p_dst[0, counts[1]) = the GPU's own rows)
                     copy_rows_from_mapped(parts_out, m_ymiss_ + (size_t) tb * K * N, (int64_t) n * K, N,
                                           p_dst, p_counts + 1, cs);
                 else
@@ -1020,6 +1026,8 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
             mb.weights = w_ + t * K; mb.shared = shared_ + t * N;
             if (!moe_combine_parts(g, l, K, mb, parts_ + (size_t) t * K * N, bo_ + t * N, cs, err)) return false;
         }
+        if (remote_opt_) remote_opt_->combine(bo_ + tb * N, y_dummy_ + tb * N, tb, n,
+                              device_plan_ ? skip_ + grp : nullptr, ring, cs);
         stamp(l, 24, grp);
         if (l == g.n_layers - 1) {
             if (!fuse_head_gr) {
@@ -1379,9 +1387,11 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
         set_plan_slot(grp);
         const int tb = gtb[grp], n = gte[grp] - gtb[grp];
         progress_at("verify window: the CPU experts of layer", l);
+        if (remote_opt_) remote_opt_->begin(h_w_ + (size_t) tb * ss.k, tb, n);
         if (pool != nullptr)
             pool(user, h_x_ + (size_t) tb * g.n_embd, h_ids_ + (size_t) tb * ss.k, n, ss.k,
                  h_ymiss_ + (size_t) tb * ss.k * g.n_embd, l);
+        if (remote_opt_) remote_opt_->end();
         VDBG("layer %lld served\n", (long long) l);
         if (g_trace) trace_ev(*(volatile uint32_t*) h_flagA_ == want ? "SERVED" : "SERVED-NO-PLAN-YET", k, l,
                               (int64_t) ms_since(b));   // aux: ms the CPU experts took
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 5b31355493a..f2f34504ef7 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -15,6 +15,7 @@
 // (`phase-2-correct-engine.md:5-9`).  What it is FOR is the honest tok/s figure and the logit dump.
 
 #include "strata/core/device.hpp"
+#include "strata/core/remote_expert_opt.hpp"
 #include "strata/core/expert_cache.hpp"
 #include "strata/core/conversation_snapshot.hpp"
 #include "strata/core/conversation_memory.hpp"
@@ -369,6 +370,8 @@ struct Options {
     /// measurement found nothing - see `expert_cache_per_layer`.
     int expert_cache = 0;
     std::array<int, 3> expert_cache_remote{}; ///< CUDA1..3 slots; CUDA0 keeps dense/state/MTP
+    std::array<bool, 3> expert_cache_remote_auto{};
+    bool remote_expert_opt = false; ///< optional optimization of the existing remote-expert decode path
     std::string expert_cache_remote_placement = "stripe"; ///< stripe experts or assign complete layers to CUDA1..3
     bool expert_cache_cpu_order = false;
     /// **R4.2g.  ROUND 328 MEASURED THAT THE GLOBAL ADMISSION POLICY CANNOT WORK, AND THIS IS THE FIX.**
@@ -656,9 +659,10 @@ void usage() {
                  "                       GPU via `moe_hit_grouped_s2`.  DEFAULT 0.  Measured at 4096 slots\n"
                  "                       with --expert-cache-per-layer: 54.4%% hits, CPU pool drain 19.1 -> 10.3\n"
                  "                       ms/token, -2.7 ms/token end to end.\n"
-                 "  --expert-cache-device1 N  pre-fill N experts on CUDA1 (experimental)\n"
-                 "  --expert-cache-device2 N  pre-fill N more experts on CUDA2\n"
-                 "  --expert-cache-device3 N  pre-fill N more experts on CUDA3\n"
+                 "  --expert-cache-device1 N|auto  fill CUDA1 with N experts or as many as fit\n"
+                 "  --expert-cache-device2 N|auto  fill CUDA2 with more experts\n"
+                 "  --expert-cache-device3 N|auto  fill CUDA3 with more experts\n"
+                 "  --remote-expert-opt   enable remote-expert decode optimizations (serve mode)\n"
                  "  --expert-cache-remote-placement stripe|layer  distribute expert ranks or whole\n"
                  "                       layers across CUDA1..3 (default: stripe)\n"
                  "  --peer-device N      a second GPU as an adaptive expert-cache tier (rows over P2P; it also\n"
@@ -1348,9 +1352,13 @@ int main(int argc, char** argv) {
             const std::string v = next("--expert-cache");
             o.expert_cache = (v == "auto") ? -1 : std::atoi(v.c_str());
         }
-        else if (a == "--expert-cache-device1") o.expert_cache_remote[0] = std::atoi(next("--expert-cache-device1"));
-        else if (a == "--expert-cache-device2") o.expert_cache_remote[1] = std::atoi(next("--expert-cache-device2"));
-        else if (a == "--expert-cache-device3") o.expert_cache_remote[2] = std::atoi(next("--expert-cache-device3"));
+        else if (a == "--expert-cache-device1" || a == "--expert-cache-device2" || a == "--expert-cache-device3") {
+            const size_t r = (size_t) (a.back() - '1');
+            const std::string v = next(a.c_str());
+            o.expert_cache_remote_auto[r] = v == "auto";
+            o.expert_cache_remote[r] = v == "auto" ? std::numeric_limits<int>::max() : std::atoi(v.c_str());
+        }
+        else if (a == "--remote-expert-opt") o.remote_expert_opt = true;
         else if (a == "--expert-cache-remote-placement")
             o.expert_cache_remote_placement = next("--expert-cache-remote-placement");
         else if (a == "--vram-reserve-mib") { o.vram_reserve_mib = std::atoi(next("--vram-reserve-mib")); o.vram_reserve_given = true; }
@@ -1873,6 +1881,10 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: --expert-cache-remote-placement must be stripe or layer\n");
         return 2;
     }
+    if (o.remote_expert_opt && !o.serve) {
+        std::fprintf(stderr, "strata generate: --remote-expert-opt requires --serve\n");
+        return 2;
+    }
     // the peer tier is the second card's only user: a layer split or a remote expert cache would put a second engine
     // part (and a second copy of the same experts) on it
     if (o.peer_device >= 1 && (!o.layer_split.empty() || o.expert_cache_remote[0] > 0)) {
@@ -3419,6 +3431,8 @@ int main(int argc, char** argv) {
         std::fprintf(stderr, "strata generate: layer split: CUDA0 runs layers 0-%lld\n", (long long) (split_at[0] - 1));
 
     std::array<strata::core::RemoteExperts, 3> remote_experts;
+    std::unique_ptr<strata::core::RemoteExpertOpt> remote_opt;
+    if (o.remote_expert_opt && o.expert_cache_remote[0] > 0) remote_opt = std::make_unique<strata::core::RemoteExpertOpt>();
     const bool multi_remote = o.expert_cache_remote[1] > 0 || o.expert_cache_remote[2] > 0;
     if (o.expert_cache_remote[0] > 0) {
         if (o.expert_cache <= 0 || profile.empty() || o.no_pool) {
@@ -3432,7 +3446,8 @@ int main(int argc, char** argv) {
                 for (const auto& pr : st->profile)
                     if (st->cache.slot_of(pr.first, pr.second) < 0) ranked.push_back(pr);
         }
-        if (multi_remote) {
+        if (multi_remote || std::any_of(o.expert_cache_remote_auto.begin(), o.expert_cache_remote_auto.end(),
+                                        [](bool automatic) { return automatic; })) {
             // The shipped frequency profile names only 8000 of 24576 experts. Once exhausted,
             // fill remaining VRAM from unranked pairs in expert-then-layer order: this spreads
             // the tail across all layers instead of concentrating it on layer zero.
@@ -3490,8 +3505,10 @@ int main(int argc, char** argv) {
                 if (st->cache.slot_of(pr.first, pr.second) >= 0)
                     claimed[(size_t) pr.first * (size_t) g.n_expert + (size_t) pr.second] = 1;
         for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0) {
+            if (remote_opt) remote_opt->attach(remote_experts[(size_t) r]);
             if (!remote_experts[(size_t) r].open(remote_dev[r], o.expert_cache_remote[(size_t) r],
-                     g.n_layers, g.n_expert, by_device[(size_t) r], xcache, *srcp, claimed, err)) {
+                     g.n_layers, g.n_expert, by_device[(size_t) r], xcache, *srcp, claimed, err,
+                     o.expert_cache_remote_auto[(size_t) r])) {
                 std::fprintf(stderr, "strata generate: %s\n", err.c_str());
                 return 1;
             }
@@ -3520,6 +3537,7 @@ int main(int argc, char** argv) {
                      (long long) (peer.resident() + xcache.slots()), (long long) (g.n_layers * g.n_expert));
     }
 
+    if (remote_opt && !remote_opt->init(err)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
     Drive drive;
     for (int r = 0; r < 3; ++r) if (o.expert_cache_remote[(size_t) r] > 0)
         drive.d.remote[drive.d.remote_count++] = &remote_experts[(size_t) r];
@@ -4802,6 +4820,7 @@ int main(int argc, char** argv) {
                     vs.blob = thits.blob;
                     vs.slot_off = gs.cache.slot_offsets();
                     vs.n_slots = gs.cache.slots();
+                    gs.ver.set_remote_expert_opt(remote_opt.get());
                     ok_s = gs.ver.init(gs.wt, g, gs.ss, vs, gs.head.loaded() ? &gs.head : nullptr, o.spec, err);
                     split_drive.cache_base[st] = gs.cache.device_slot(0);
                     split_drive.cache_slot_off[st] = gs.cache.slot_offsets();
@@ -4819,6 +4838,7 @@ int main(int argc, char** argv) {
                           " (CUDA" + std::to_string(split_same ? 0 : stages[(size_t) st - 1]->dev) + ")";
             std::fprintf(stderr, "strata serve: layer split: layers %s, one hand-off per window\n", plan_s.c_str());
         }
+        ver.set_remote_expert_opt(remote_opt.get());
         if (!ver.init(wt, g, ss, vh, native_head.loaded() ? &native_head : nullptr, o.spec, err) ||
             !mtp.bind(last_st ? last_st->wt : wt, last_st ? &last_st->head : &native_head, ver.final_R_all(), err)) {
             std::fprintf(stderr, "strata serve: %s\n", err.c_str());
@@ -5109,6 +5129,7 @@ int main(int argc, char** argv) {
         // the VRAM tier follows the conversation (the same rule as the speculative loop below)
         auto adapt = [&]() -> bool {
             if (!pending.empty()) return true;   // the previous swaps are still in flight
+            if (remote_opt && !remote_opt->adapt(drive.d.usage, host_res, pending, o.adapt_swaps, *srcp)) return false;
             struct Swap { float gain; int32_t layer, in, out; };
             std::vector<Swap> swaps;
             std::vector<std::pair<float, int32_t>> cand, vict;
@@ -5118,7 +5139,7 @@ int main(int argc, char** argv) {
                 const float* u = drive.d.usage.data() + l * g.n_expert;
                 const int32_t* r = host_res.data() + l * g.n_expert;
                 for (int32_t e = 0; e < (int32_t) g.n_expert; ++e) {
-                    if (r[e] < 0) { if (u[e] >= 2.0f && !(peer.valid() && peer.has(l, e))) cand.emplace_back(u[e], e); }
+                    if (r[e] < 0) { if (u[e] >= 2.0f && !(peer.valid() && peer.has(l, e)) && !(remote_opt && remote_opt->owns(l, e))) cand.emplace_back(u[e], e); }
                     else vict.emplace_back(u[e], e);
                 }
                 if (cand.empty() || vict.empty()) continue;

From 44bd7add3def37c8d833f293c793fdff228e715f Mon Sep 17 00:00:00 2001
From: Danny Werner <d.werner@anothermobile.de>
Date: Sat, 3 Oct 2026 08:55:30 +0200
Subject: [PATCH 152/201] refill: improve multi-GPU processing

---
 include/strata/prefill/prefill.hpp | 11 ++++++
 src/prefill/prefill.cpp            | 63 +++++++++++++++++++++++-------
 2 files changed, 60 insertions(+), 14 deletions(-)

diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index 038e0dd9539..9185e9873b0 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -18,6 +18,7 @@
 
 #include <cstdint>
 #include <functional>
+#include <future>
 #include <memory>
 #include <string>
 
@@ -121,9 +122,19 @@ class Prefill {
     }
 
 private:
+    // Stage-1 pipeline: intermediate stages return after handing their chunk to
+    // the direct successor. The public run() drains the chain once at prompt end.
+    bool run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err);
+    bool drain_pipeline(std::string& err);
+
     int64_t stage_lb_ = 0, stage_le_ = -1;
     Prefill* next_ = nullptr;
     const float* hand_in_ = nullptr;    ///< the previous stage's rows of the chunk being read (host, pinned)
+
+    std::string next_err_;
+    std::future<bool> next_run_;
+    int hand_buf_ = 0;
+
     bool carve(std::size_t T, void* alloc);   // the device buffers of a chunk (prefill.cpp's Alloc)
     void release();                          // the destructor's cleanup (also `reset`'s)
     struct Impl;
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 37d8f83c11e..32ebb9f689e 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -1301,7 +1301,7 @@ struct PeTimer {
 };
 }  // namespace
 
-bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err) {
+bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err) {
     err.clear();
     Impl& m = *impl_;
     const core::OnDevice on_device(m.device);
@@ -1309,11 +1309,8 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
     core::SessionState& ss = *m.ss;
     const auto t_start = Clock::now();
     const int64_t LB = stage_lb_, LE = stage_le_;
-    // the next stage reads chunk c on a thread while this one reads chunk c + 1 (declared first: an early return
-    // waits for it before anything it reads goes away)
-    std::string next_err;
-    std::future<bool> next_run;
-    int hand_buf = 0;
+    // The direct successor's future lives on the Prefill object. Intermediate
+    // stages therefore do not drain the complete remaining GPU chain here.
     double host_sync_ms = 0, host_chunk_ms = 0, host_setup_ms = 0;   // STRATA_PREFILL_TIMING: the host's share
     strata::kernels::QsaShapes s = strata::kernels::qsa_real_shapes();
     s.n_head = g.n_head; s.n_head_kv = g.n_head_kv; s.head_dim = g.head_dim; s.idx_n_head = g.idx_q_heads;
@@ -2636,21 +2633,23 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
         core::progress_at("reading the prompt (batched): finishing the chunk from token", p0);
         pt.mark(kPfStart, cs);
         if (next_ != nullptr) {
-            // the rows to the host buffer the next stage read two chunks ago (it has finished: waited below)
-            float* h = m.hand[hand_buf];
+            // The current hand-off slot was used two chunks ago.
+            float* h = m.hand[hand_buf_];
             if (cudaMemcpyAsync(h, m.R, (size_t) T * D * 4, cudaMemcpyDeviceToHost, m.cs) != cudaSuccess ||
                 cudaStreamSynchronize(m.cs) != cudaSuccess) {
                 err = std::string("prefill: the layer split's hand-off: ") + cudaGetErrorString(cudaGetLastError());
                 return false;
             }
-            // this stage's state is at the chunk's end now (synced) and moves on with the next chunk below
+            // Wait only for the DIRECT successor's previous chunk. That successor
+            // may already have forwarded its older chunk to later GPUs.
             if (on_stage_chunk && !on_stage_chunk(p0 + T, err)) return false;
-            if (next_run.valid() && !next_run.get()) { err = next_err; return false; }
+            if (next_run_.valid() && !next_run_.get()) { err = next_err_; return false; }
+            next_err_.clear();
             next_->hand_in_ = h;
-            next_run = std::async(std::launch::async, [this, tokens, c0, T, p0, &next_err] {
-                return next_->run(tokens + c0, T, p0, next_err);
+            next_run_ = std::async(std::launch::async, [this, tokens, c0, T, p0] {
+                return next_->run_impl(tokens + c0, T, p0, next_err_);
             });
-            hand_buf ^= 1;
+            hand_buf_ ^= 1;
             continue;   // the last stage reports the chunk (on_chunk)
         }
         if (const char* dump = std::getenv("STRATA_PREFILL_DUMP_R")) {   // debug: the final residuals, every 64th
@@ -2679,7 +2678,8 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
             host_chunk_ms += ms_since(toc2);
         }
     }
-    if (next_run.valid() && !next_run.get()) { err = next_err; return false; }
+    // Do not drain the successor here. This is the overlap: an intermediate
+    // stage can return while later GPUs are still processing the previous chunk.
     ss.ple_prev[0] = prev[0];
     ss.ple_prev[1] = prev[1];
     if (std::getenv("STRATA_DBG_NAN") != nullptr) {   // debug: the state the prompt leaves for the token path
@@ -2759,4 +2759,39 @@ bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& e
     return true;
 }
 
+bool Prefill::drain_pipeline(std::string& err) {
+    bool ok = true;
+
+    if (next_run_.valid()) {
+        if (!next_run_.get()) {
+            err = next_err_;
+            ok = false;
+        }
+    }
+
+    if (next_ != nullptr) {
+        std::string tail_err;
+        if (!next_->drain_pipeline(tail_err)) {
+            if (ok) err = tail_err;
+            ok = false;
+        }
+    }
+
+    return ok;
+}
+
+bool Prefill::run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err) {
+    const bool body_ok = run_impl(tokens, n, pos0, err);
+
+    std::string drain_err;
+    const bool drain_ok = drain_pipeline(drain_err);
+
+    if (!body_ok) return false;
+    if (!drain_ok) {
+        err = drain_err;
+        return false;
+    }
+    return true;
+}
+
 }  // namespace strata::prefill

From e0c175bed0840643ceec6b4092fc4f8177bd3782 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:33:16 +0200
Subject: [PATCH 153/201] gfx906 build (PR #638 follow-up): mrope.hpp's HIP
 include only in the gfx906 build; tests.list dropped

The RDNA backend (STRATA_ENABLE_HIP) compiles mrope.hpp as before; tests.list was a local test runner's list, not
part of the build.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/kernels/mrope.hpp |  2 +-
 tests.list                       | 34 --------------------------------
 2 files changed, 1 insertion(+), 35 deletions(-)
 delete mode 100644 tests.list

diff --git a/include/strata/kernels/mrope.hpp b/include/strata/kernels/mrope.hpp
index 23584242eb4..18dbb6858ec 100644
--- a/include/strata/kernels/mrope.hpp
+++ b/include/strata/kernels/mrope.hpp
@@ -15,7 +15,7 @@
 #pragma once
 
 #include <cstdint>
-#if defined(__HIPCC__)
+#if defined(__HIPCC__) && defined(STRATA_HIP_GFX906)   // PR #638: the gfx906 compat build only
 #include <hip/hip_runtime.h>
 #endif
 
diff --git a/tests.list b/tests.list
deleted file mode 100644
index 675708dc0ba..00000000000
--- a/tests.list
+++ /dev/null
@@ -1,34 +0,0 @@
-file_expert_source_test file_expert_source_test
-expert_profile_save_test expert_profile_save_test
-dequant_s2_parity dequant_s2_parity --selftest
-s2_gemv_parity s2_gemv_parity --selftest
-mmvq_multi_parity mmvq_multi_parity
-mmvq_multi_parity_cuda_layout env STRATA_MMVQ_WAVE=0 ./mmvq_multi_parity
-iq_multi_parity iq_multi_parity
-native_grouped_parity native_grouped_parity
-shared_expert_parity shared_expert_parity --selftest
-gr_parity gr_parity --selftest
-gdn_parity gdn_parity --selftest
-s2_gemv_q8_parity s2_gemv_q8_parity --selftest
-sampler_parity sampler_parity --selftest
-sampler_parity_one_block sampler_parity --selftest
-sampler_parity_old sampler_parity --selftest
-decode_cluster_parity decode_cluster_parity --selftest
-rope_parity rope_parity --selftest
-quantize_act_parity quantize_act_parity --selftest
-router_top10_parity router_top10_parity --selftest
-s_gemv_parity s_gemv_parity --selftest
-elementwise_parity elementwise_parity --selftest
-bf16_gemv_parity bf16_gemv_parity --selftest
-s_gemv_q8k_parity s_gemv_q8k_parity --selftest
-qsa_parity qsa_parity --selftest
-kv_q8_parity kv_q8_parity
-kv_stream_parity kv_stream_parity
-kv_hybrid_parity kv_hybrid_parity
-kv_q4_parity kv_q4_parity
-cvec_parity cvec_parity
-s2_expert_grouped_parity s2_expert_grouped_parity --selftest
-platform_memory_test platform_memory_test
-pinned_shared_test pinned_shared_test
-ple_reader_selftest ple_reader_test --selftest
-cuda_device_selftest strata-device --selftest

From 73fcc7658405af4c2a65d18af803d5596426bdf6 Mon Sep 17 00:00:00 2001
From: David <David@code.contractors>
Date: Thu, 1 Oct 2026 21:43:57 -0400
Subject: [PATCH 154/201] hip: add experimental gfx1012 support and legacy BLAS
 compatibility

---
 CMakeLists.txt                             |  8 +-
 cmake/hip_backend.cmake                    | 13 ++-
 include/strata/hip_compat/cublas_v2.h      | 41 ++++++++++
 include/strata/hip_compat/cuda_runtime.h   | 11 +++
 include/strata/hip_compat/intrinsics.hpp   | 27 ++++++-
 include/strata/hip_compat/math_constants.h |  4 +
 tests/hip/intrinsics.cpp                   | 30 +++++--
 tests/hip/prefill_gemm.cpp                 | 93 ++++++++++++++++++++++
 8 files changed, 218 insertions(+), 9 deletions(-)
 create mode 100644 include/strata/hip_compat/math_constants.h
 create mode 100644 tests/hip/prefill_gemm.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 1fe793b7e4e..a8b0716b37f 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -45,7 +45,7 @@ if(STRATA_HIP_GFX906)
   endif()
   set(STRATA_ENABLE_CUDA ON CACHE BOOL "" FORCE)
 endif()
-option(STRATA_ENABLE_HIP "Build the HIP targets for wave32 AMD GPUs (gfx1100, gfx1201; gfx1030 unvalidated)" OFF)
+option(STRATA_ENABLE_HIP "Build the HIP targets for wave32 AMD GPUs (gfx1100, gfx1201; gfx1012/gfx1030 unvalidated)" OFF)
 option(STRATA_PREFILL_MMQ "Build the optional GGML MMQ prefill path for HIP" OFF)
 # CUDA: MMQ prompt kernels for Q4_K / Q5_K / Q5_1 (Unsloth's UD-Q4_K_XL experts).  Off by default: the engine loads
 # every kernel when it starts (CUDA_MODULE_LOADING=EAGER), so these took ~5 MB of VRAM - 1-3 expert slots - from every
@@ -157,7 +157,7 @@ elseif(STRATA_ENABLE_CUDA)
   set(_strata_gpu_include_directories ${CMAKE_CUDA_TOOLKIT_INCLUDE_DIRECTORIES})
 elseif(STRATA_ENABLE_HIP)
   set(_strata_gpu_runtime_target strata_hip_runtime)
-  set(_strata_gpu_blas_target roc::hipblas)
+  set(_strata_gpu_blas_target ${STRATA_HIP_BLAS_TARGETS})
   set(_strata_gpu_include_directories ${STRATA_HIP_COMPAT_INCLUDE_DIR})
 endif()
 
@@ -475,6 +475,10 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
   if(STRATA_ENABLE_HIP)
     enable_testing()
     set(_strata_hip_tests)
+    add_executable(hip_prefill_gemm tests/hip/prefill_gemm.cpp)
+    target_link_libraries(hip_prefill_gemm PRIVATE strata_prefill strata_hip_runtime)
+    add_test(NAME hip_prefill_gemm COMMAND hip_prefill_gemm)
+    list(APPEND _strata_hip_tests hip_prefill_gemm)
     add_executable(hip_expert_cache_staging tests/hip/expert_cache_staging.cpp)
     target_link_libraries(hip_expert_cache_staging PRIVATE strata_engine)
     add_test(NAME hip_expert_cache_staging COMMAND hip_expert_cache_staging)
diff --git a/cmake/hip_backend.cmake b/cmake/hip_backend.cmake
index 2e629e60ac6..d59bba9a8a0 100644
--- a/cmake/hip_backend.cmake
+++ b/cmake/hip_backend.cmake
@@ -11,7 +11,7 @@ endif()
 # report ran it (#311), the maintainers have not.
 set(_strata_hip_validated gfx1100 gfx1201)
 set(_strata_hip_community gfx1101 gfx1200)
-set(_strata_hip_unvalidated gfx1102 gfx1030 gfx1031)
+set(_strata_hip_unvalidated gfx1012 gfx1102 gfx1030 gfx1031)
 # CMake hands HIP a ';' list, but a -DCMAKE_HIP_ARCHITECTURES typed by hand (or ROCm's own Windows tooling) may use
 # spaces, which foreach(IN LISTS) would otherwise treat as one element.
 string(REPLACE " " ";" _strata_hip_norm "${CMAKE_HIP_ARCHITECTURES}")
@@ -44,6 +44,13 @@ string(REPLACE ";" "," STRATA_HIP_ARCHS "${STRATA_HIP_ARCH_LIST}")
 enable_language(HIP)
 find_package(hip CONFIG REQUIRED)
 find_package(hipblas CONFIG REQUIRED)
+# Older distro hipBLAS has no workspace API. The compatibility shim uses
+# rocBLAS directly for that version; newer hipBLAS keeps its existing path.
+set(STRATA_HIP_BLAS_TARGETS roc::hipblas)
+if(hipblas_VERSION VERSION_LESS "1.0")
+  find_package(rocblas CONFIG REQUIRED)
+  list(APPEND STRATA_HIP_BLAS_TARGETS roc::rocblas)
+endif()
 find_package(hipblaslt CONFIG QUIET)
 
 if(NOT TARGET hip::host)
@@ -67,6 +74,10 @@ add_library(strata_hip_runtime INTERFACE)
 target_include_directories(strata_hip_runtime BEFORE INTERFACE
   "${STRATA_HIP_COMPAT_INCLUDE_DIR}" "${CMAKE_CURRENT_SOURCE_DIR}/include")
 target_compile_definitions(strata_hip_runtime INTERFACE STRATA_USE_HIP=1 "STRATA_HIP_ARCHS=\"${STRATA_HIP_ARCHS}\"")
+option(STRATA_GFX1012_PORTABLE_DOT "Use the portable signed-byte dot control on gfx1012" OFF)
+if(STRATA_GFX1012_PORTABLE_DOT)
+  target_compile_definitions(strata_hip_runtime INTERFACE STRATA_GFX1012_PORTABLE_DOT=1)
+endif()
 target_link_libraries(strata_hip_runtime INTERFACE hip::host)
 # The shim renames the CUDA runtime to HIP, force-included into every host and device source. On Windows the host
 # compiler is ROCm's clang++ too (tools/hip/build_windows.bat: CMake refuses to mix cl.exe with Clang HIP), which takes
diff --git a/include/strata/hip_compat/cublas_v2.h b/include/strata/hip_compat/cublas_v2.h
index f162474bb41..879447968e1 100644
--- a/include/strata/hip_compat/cublas_v2.h
+++ b/include/strata/hip_compat/cublas_v2.h
@@ -1,5 +1,45 @@
 #pragma once
 #include <hipblas/hipblas.h>
+#include <hipblas/hipblas-version.h>
+
+#if hipblasVersionMajor == 0
+// Ubuntu's hipBLAS 0.54 has no workspace API or compute-type enum. Use its
+// underlying rocBLAS API directly, including ownership of the real handle,
+// so the engine's explicit workspace contract is preserved.
+#include <rocblas/rocblas.h>
+#define CUBLAS_COMPUTE_32F rocblas_datatype_f32_r
+#define CUBLAS_DEFAULT_MATH 0
+#define CUBLAS_GEMM_DEFAULT rocblas_gemm_algo_standard
+#define CUBLAS_OP_N rocblas_operation_none
+#define CUBLAS_OP_T rocblas_operation_transpose
+#define CUBLAS_STATUS_SUCCESS rocblas_status_success
+#define CUDA_R_16BF rocblas_datatype_bf16_r
+#define CUDA_R_16F rocblas_datatype_f16_r
+#define CUDA_R_32F rocblas_datatype_f32_r
+#define cublasCreate rocblas_create_handle
+#define cublasDestroy rocblas_destroy_handle
+#define cublasHandle_t rocblas_handle
+#define cublasSetStream rocblas_set_stream
+#define cublasSetWorkspace rocblas_set_workspace
+#define cublasStatus_t rocblas_status
+
+inline rocblas_status cublasSetMathMode(rocblas_handle h, int mode) {
+    // This API has only its default arithmetic; GEMM below explicitly selects
+    // FP32 accumulation. Reject any request for a different math mode.
+    if (!h) return rocblas_status_invalid_handle;
+    return mode == CUBLAS_DEFAULT_MATH ? rocblas_status_success : rocblas_status_invalid_value;
+}
+inline rocblas_status cublasGemmEx(rocblas_handle h, rocblas_operation trans_a,
+    rocblas_operation trans_b, int m, int n, int k, const void* alpha,
+    const void* a, rocblas_datatype a_type, int lda,
+    const void* b, rocblas_datatype b_type, int ldb, const void* beta,
+    void* c, rocblas_datatype c_type, int ldc,
+    rocblas_datatype compute_type, rocblas_gemm_algo algo) {
+    return rocblas_gemm_ex(h, trans_a, trans_b, m, n, k, alpha,
+        a, a_type, lda, b, b_type, ldb, beta, c, c_type, ldc,
+        c, c_type, ldc, compute_type, algo, 0, 0);
+}
+#else
 #define CUBLAS_COMPUTE_32F HIPBLAS_COMPUTE_32F
 #define CUBLAS_DEFAULT_MATH HIPBLAS_DEFAULT_MATH
 #define CUBLAS_GEMM_DEFAULT HIPBLAS_GEMM_DEFAULT
@@ -17,3 +57,4 @@
 #define cublasSetStream hipblasSetStream
 #define cublasSetWorkspace hipblasSetWorkspace
 #define cublasStatus_t hipblasStatus_t
+#endif
diff --git a/include/strata/hip_compat/cuda_runtime.h b/include/strata/hip_compat/cuda_runtime.h
index ccf9a913243..2359da98398 100644
--- a/include/strata/hip_compat/cuda_runtime.h
+++ b/include/strata/hip_compat/cuda_runtime.h
@@ -10,6 +10,7 @@
 #endif
 #endif
 #include <hip/hip_runtime.h>
+#include <hip/hip_version.h>
 // Do not let HIP's legacy macro corrupt libstdc++ attribute names.
 #ifdef __noinline__
 #undef __noinline__
@@ -39,7 +40,11 @@
 #define cudaEventSynchronize hipEventSynchronize
 #define cudaEvent_t hipEvent_t
 #define cudaFree hipFree
+#if HIP_VERSION_MAJOR < 7
+#define cudaFreeHost hipHostFree
+#else
 #define cudaFreeHost hipFreeHost
+#endif
 #define cudaFuncAttributeMaxDynamicSharedMemorySize hipFuncAttributeMaxDynamicSharedMemorySize
 #define cudaGetDevice hipGetDevice
 #define cudaGetDeviceCount hipGetDeviceCount
@@ -54,9 +59,15 @@
 #define cudaGraphUpload hipGraphUpload
 #define cudaGraph_t hipGraph_t
 #define cudaHostAlloc hipHostMalloc
+#if HIP_VERSION_MAJOR < 7
+#define cudaHostAllocDefault hipHostMallocDefault
+#define cudaHostAllocMapped hipHostMallocMapped
+#define cudaHostAllocPortable hipHostMallocPortable
+#else
 #define cudaHostAllocDefault hipHostAllocDefault
 #define cudaHostAllocMapped hipHostAllocMapped
 #define cudaHostAllocPortable hipHostAllocPortable
+#endif
 #define cudaHostGetDevicePointer hipHostGetDevicePointer
 #define cudaHostRegister hipHostRegister
 #define cudaHostRegisterMapped hipHostRegisterMapped
diff --git a/include/strata/hip_compat/intrinsics.hpp b/include/strata/hip_compat/intrinsics.hpp
index a789e38c98e..ef5079cdbe1 100644
--- a/include/strata/hip_compat/intrinsics.hpp
+++ b/include/strata/hip_compat/intrinsics.hpp
@@ -1,6 +1,6 @@
 #pragma once
 
-// CUDA device intrinsics used by Strata kernels that HIP does not provide on RDNA2 / RDNA3 / RDNA4 (wave32).
+// CUDA device intrinsics used by Strata kernels on supported wave32 HIP targets.
 // This header is included only from the HIP cuda_runtime compatibility shim.
 #if defined(__HIPCC__)
 
@@ -25,6 +25,21 @@ __device__ __forceinline__ int dp4a(int a, int b, int c) {
     // RDNA2 has no sudot4 (that is gfx11+), but it has the plain signed v_dot4_i32_i8 (dot1-insts): the same
     // signed x signed byte products accumulated modulo 2^32, no clamp.
     return __builtin_amdgcn_sdot4(a, b, c, false);
+#elif defined(__gfx1012__) && !defined(STRATA_GFX1012_PORTABLE_DOT)
+    // RDNA1 has no native signed dot4. SDWA selects and sign-extends byte
+    // operands directly, avoiding separate shift/mask/sign-extension work.
+    // Adapted from pinned llama.cpp ggml-cuda/common.cuh (MIT; see
+    // third_party/ggml/LICENSE), same modulo-2^32 accumulation contract.
+    int lo, hi;
+    asm("v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0\n"
+        "v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1\n"
+        "v_add3_u32 %0, %1, %2, %0\n"
+        "v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2\n"
+        "v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3\n"
+        "v_add3_u32 %0, %1, %2, %0\n"
+        // c changes before the high-byte reads; it must not alias a or b.
+        : "+&v"(c), "=&v"(lo), "=&v"(hi) : "v"(a), "v"(b));
+    return c;
 #else
     const uint32_t ua = static_cast<uint32_t>(a);
     const uint32_t ub = static_cast<uint32_t>(b);
@@ -84,6 +99,15 @@ __device__ __forceinline__ void require_full_wave_mask(uint32_t mask) {
     if (mask != 0xffffffffu) __builtin_trap();
 }
 
+// Older HIP has no __syncwarp. A wave barrier alone does not order memory.
+// Release/acquire fences cover the shared-memory exchange used by attention.
+__device__ __forceinline__ void syncwarp(uint32_t mask = 0xffffffffu) {
+    require_full_wave_mask(mask);
+    __builtin_amdgcn_fence(__ATOMIC_RELEASE, "workgroup");
+    __builtin_amdgcn_wave_barrier();
+    __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "workgroup");
+}
+
 template <typename T>
 __device__ __forceinline__ T shfl_xor_sync(uint32_t mask, T value, int lane_mask, int width = 32) {
     require_full_wave_mask(mask);
@@ -125,6 +149,7 @@ __device__ __forceinline__ unsigned ballot_sync(uint32_t mask, int predicate) {
 #define __shfl_up_sync(...) (::strata::hip_compat::shfl_up_sync(__VA_ARGS__))
 #define __shfl_sync(...) (::strata::hip_compat::shfl_sync(__VA_ARGS__))
 #define __ballot_sync(mask, predicate) (::strata::hip_compat::ballot_sync((mask), (predicate)))
+#define __syncwarp(...) (::strata::hip_compat::syncwarp(__VA_ARGS__))
 // AMD's sleep instruction accepts only 0..15; the synchronization loops use it as a
 // backoff hint, so use its smallest portable delay independently of CUDA cycle counts.
 #define __nanosleep(cycles) __builtin_amdgcn_s_sleep(1)
diff --git a/include/strata/hip_compat/math_constants.h b/include/strata/hip_compat/math_constants.h
new file mode 100644
index 00000000000..50a08625040
--- /dev/null
+++ b/include/strata/hip_compat/math_constants.h
@@ -0,0 +1,4 @@
+#pragma once
+// CUDA spelling used by the attention kernels; included only in HIP builds.
+#include <hip/hip_math_constants.h>
+#define CUDART_INF_F HIP_INF_F
diff --git a/tests/hip/intrinsics.cpp b/tests/hip/intrinsics.cpp
index ff2b93e3953..a0c7ed49d04 100644
--- a/tests/hip/intrinsics.cpp
+++ b/tests/hip/intrinsics.cpp
@@ -18,7 +18,7 @@
 namespace {
 
 constexpr int kLanes = 32;
-constexpr int kIntegerResults = 7;
+constexpr int kIntegerResults = 10;
 
 __global__ void intrinsic_probe(int* integer_results, float* float_shuffle, double* double_shuffle,
                                 unsigned* ballot, const uint32_t* dot_inputs) {
@@ -37,6 +37,20 @@ __global__ void intrinsic_probe(int* integer_results, float* float_shuffle, doub
         __dp4a(static_cast<int>(dot_inputs[lane * 2]), static_cast<int>(dot_inputs[lane * 2 + 1]),
                0x7fffffff - lane);
 
+    __shared__ int exchanged[kLanes];
+    int sum = 0;
+    for (int iteration = 0; iteration < 64; ++iteration) {
+        exchanged[lane] = static_cast<int>(dot_inputs[lane * 2] & 255u) + iteration;
+        __syncwarp();
+        sum += exchanged[lane ^ 1];
+        __syncwarp();
+    }
+    integer_results[lane * kIntegerResults + 7] = sum;
+    const int input_a = static_cast<int>(dot_inputs[lane * 2]);
+    const int input_b = static_cast<int>(dot_inputs[lane * 2 + 1]);
+    integer_results[lane * kIntegerResults + 8] = __dp4a(input_a, input_b, input_a);
+    integer_results[lane * kIntegerResults + 9] = __dp4a(input_a, input_b, input_b);
+
     float_shuffle[lane * 4 + 0] = __shfl_xor_sync(mask, static_cast<float>(lane), 1);
     float_shuffle[lane * 4 + 1] = static_cast<float>(__shfl_down_sync(mask, lane, 4, 8));
     float_shuffle[lane * 4 + 2] = static_cast<float>(__shfl_up_sync(mask, lane, 1));
@@ -153,7 +167,7 @@ int main() {
     CHECK(hipMemcpy(&ballot, device_ballot, sizeof(ballot), hipMemcpyDeviceToHost));
 
     constexpr uint32_t a = 0x80ff017fu, b = 0x0203fe81u;
-    const uint32_t expected_integer[kIntegerResults - 1] = {
+    const uint32_t expected_integer[6] = {
         static_cast<uint32_t>(dp4a_reference(a, b, 7)),
         static_cast<uint32_t>(dp4a_reference(0x7f7f7f7fu, 0x7f7f7f7fu, std::numeric_limits<int>::max())),
         byte_sub_reference(0x00ff0102u, 0x01010103u),
@@ -163,11 +177,17 @@ int main() {
     };
     bool ok = ballot == 0x55555555u;
     for (int lane = 0; lane < kLanes; ++lane) {
-        for (int i = 0; i < kIntegerResults - 1; ++i)
+        for (int i = 0; i < 6; ++i)
             ok = ok && static_cast<uint32_t>(integers[lane * kIntegerResults + i]) == expected_integer[i];
-        ok = ok && static_cast<uint32_t>(integers[lane * kIntegerResults + kIntegerResults - 1]) ==
+        ok = ok && static_cast<uint32_t>(integers[lane * kIntegerResults + 6]) ==
                      static_cast<uint32_t>(dp4a_reference(dot_inputs[lane * 2], dot_inputs[lane * 2 + 1],
                                                           0x7fffffff - lane));
+        ok = ok && integers[lane * kIntegerResults + 7] ==
+                     64 * static_cast<int>(dot_inputs[(lane ^ 1) * 2] & 255u) + 2016;
+        for (int alias = 0; alias < 2; ++alias)
+            ok = ok && static_cast<uint32_t>(integers[lane * kIntegerResults + 8 + alias]) ==
+                static_cast<uint32_t>(dp4a_reference(dot_inputs[lane * 2], dot_inputs[lane * 2 + 1],
+                    static_cast<int>(dot_inputs[lane * 2 + alias])));
         ok = ok && float_shuffle[lane * 4 + 0] == static_cast<float>(lane ^ 1);
         const int down = lane % 8 < 4 ? lane + 4 : lane;
         ok = ok && float_shuffle[lane * 4 + 1] == static_cast<float>(down);
@@ -211,6 +231,6 @@ int main() {
         std::fprintf(stderr, "HIP intrinsic parity failed (ballot 0x%08x)\n", ballot);
         return 1;
     }
-    std::puts("HIP intrinsics parity OK: dynamic signed dot4/overflow, byte permute, packed integer boundaries, wave32 shuffles, ballot and sleep");
+    std::puts("HIP intrinsics parity OK: dynamic signed dot4/overflow, byte permute, packed integer boundaries, wave32 shuffles, shared-memory exchange, ballot and sleep");
     return 0;
 }
diff --git a/tests/hip/prefill_gemm.cpp b/tests/hip/prefill_gemm.cpp
new file mode 100644
index 00000000000..1536c89eba7
--- /dev/null
+++ b/tests/hip/prefill_gemm.cpp
@@ -0,0 +1,93 @@
+// BF16/F16 prefill through the actual engine GEMM path against a CPU reference.
+#include <hip/hip_runtime.h>
+#include <hip/hip_bfloat16.h>
+#include <hip/hip_fp16.h>
+#include "strata/prefill/gemm.hpp"
+#include <algorithm>
+#include <cmath>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <random>
+#include <vector>
+
+#define CHECK(call) do { const auto e = (call); if (e != hipSuccess) { \
+    std::fprintf(stderr, "%s: %s\n", #call, hipGetErrorString(e)); std::exit(2); } } while (0)
+
+struct Buffer {
+    void* p = nullptr;
+    explicit Buffer(size_t bytes) { CHECK(hipMalloc(&p, bytes)); }
+    ~Buffer() { if (p) (void) hipFree(p); }
+};
+
+bool run(strata::prefill::Gemm& gemm, hipStream_t stream, bool bf16,
+         int t, int n, int k, int ldy, float beta) {
+    std::mt19937 rng(51012 + t + n);
+    std::uniform_real_distribution<float> dist(-0.25f, 0.25f);
+    std::vector<uint16_t> x((size_t)t*k), w((size_t)n*k);
+    std::vector<float> xf(x.size()), wf(w.size());
+    auto fill = [&](auto& bits, auto& values) {
+        for (size_t i = 0; i < bits.size(); ++i) {
+            if (bf16) {
+                const hip_bfloat16 v(dist(rng));
+                bits[i] = v.data;
+                const uint32_t wide = static_cast<uint32_t>(v.data) << 16;
+                std::memcpy(&values[i], &wide, 4);
+            } else {
+                const __half v = __float2half_rn(dist(rng));
+                std::memcpy(&bits[i], &v, 2);
+                values[i] = __half2float(v);
+            }
+        }
+    };
+    fill(x, xf); fill(w, wf);
+    constexpr int offset = 5;
+    std::vector<float> initial(offset + (size_t)t*ldy + 8, -777.25f);
+    for (int r = 0; r < t; ++r) for (int c = 0; c < n; ++c)
+        initial[offset + (size_t)r*ldy + c] = (r+c)%17 * 0.03125f;
+    Buffer dx(x.size()*2), dw(w.size()*2), dy(initial.size()*4);
+    CHECK(hipMemcpyAsync(dx.p,x.data(),x.size()*2,hipMemcpyHostToDevice,stream));
+    CHECK(hipMemcpyAsync(dw.p,w.data(),w.size()*2,hipMemcpyHostToDevice,stream));
+    CHECK(hipMemcpyAsync(dy.p,initial.data(),initial.size()*4,hipMemcpyHostToDevice,stream));
+    if (bf16) gemm.bf16((const uint16_t*)dx.p,(const uint16_t*)dw.p,(float*)dy.p+offset,t,n,k,ldy,beta);
+    else gemm.f16((const uint16_t*)dx.p,(const uint16_t*)dw.p,(float*)dy.p+offset,t,n,k,ldy,beta);
+    CHECK(hipStreamSynchronize(stream));
+    std::vector<float> got(initial.size());
+    CHECK(hipMemcpy(got.data(),dy.p,got.size()*4,hipMemcpyDeviceToHost));
+    std::vector<bool> active(got.size());
+    double diff2=0, ref2=0, maximum=0;
+    bool ok=true;
+    for (int r=0;r<t;++r) for (int c=0;c<n;++c) {
+        const size_t j=offset+(size_t)r*ldy+c;
+        active[j]=true;
+        double ref=beta*initial[j];
+        for (int i=0;i<k;++i) ref+=(double)xf[(size_t)r*k+i]*wf[(size_t)c*k+i];
+        const double d=(double)got[j]-ref;
+        ok=ok && std::isfinite(got[j]);
+        diff2+=d*d; ref2+=ref*ref; maximum=std::max(maximum,std::abs(d));
+    }
+    for (size_t j=0;j<got.size();++j) if (!active[j]) ok=ok && got[j]==initial[j];
+    const double rel=std::sqrt(diff2/std::max(ref2,1e-300));
+    ok=ok && rel<1e-4 && maximum<5e-3;
+    std::printf("%s %s T=%d N=%d K=%d ldy=%d beta=%.1f rel_l2=%.3g max_abs=%.3g\n",
+                ok?"PASS":"FAIL",bf16?"BF16":"F16",t,n,k,ldy,beta,rel,maximum);
+    return ok;
+}
+
+int main() {
+    setvbuf(stdout,nullptr,_IONBF,0);
+    hipStream_t stream;
+    CHECK(hipStreamCreateWithFlags(&stream,hipStreamNonBlocking));
+    bool ok=true;
+    {
+        strata::prefill::Gemm gemm;
+        std::string error;
+        if (!gemm.init(stream,0,error)) { std::fprintf(stderr,"%s\n",error.c_str()); return 2; }
+        ok=run(gemm,stream,true,16,96,2560,96,0) && ok;
+        ok=run(gemm,stream,true,17,48,2560,64,1) && ok;
+        ok=run(gemm,stream,false,32,640,2560,648,0) && ok;
+        ok=run(gemm,stream,false,64,2560,640,2560,1) && ok;
+    }
+    CHECK(hipStreamDestroy(stream));
+    return ok?0:1;
+}

From a62c1cdbc0c234e88a6833356cd6677d1184090f Mon Sep 17 00:00:00 2001
From: David <David@code.contractors>
Date: Thu, 1 Oct 2026 16:47:17 -0400
Subject: [PATCH 155/201] hip: preserve Q2_0 signed zero on gfx1012 with legacy
 HIP

---
 CMakeLists.txt                 |  4 +++
 src/kernels/cuda/iq_kernels.cu | 10 +++++++
 tests/hip/q2_zero.cpp          | 50 ++++++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+)
 create mode 100644 tests/hip/q2_zero.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index a8b0716b37f..5215e180de1 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -479,6 +479,10 @@ if(STRATA_ENABLE_CUDA OR STRATA_ENABLE_HIP)
     target_link_libraries(hip_prefill_gemm PRIVATE strata_prefill strata_hip_runtime)
     add_test(NAME hip_prefill_gemm COMMAND hip_prefill_gemm)
     list(APPEND _strata_hip_tests hip_prefill_gemm)
+    add_executable(hip_q2_zero tests/hip/q2_zero.cpp)
+    target_link_libraries(hip_q2_zero PRIVATE strata_kernels strata_hip_runtime)
+    add_test(NAME hip_q2_zero COMMAND hip_q2_zero)
+    list(APPEND _strata_hip_tests hip_q2_zero)
     add_executable(hip_expert_cache_staging tests/hip/expert_cache_staging.cpp)
     target_link_libraries(hip_expert_cache_staging PRIVATE strata_engine)
     add_test(NAME hip_expert_cache_staging COMMAND hip_expert_cache_staging)
diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 2bb7f4d823a..bbcf1d0658f 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -1226,6 +1226,16 @@ __device__ void dq_q2_0(const void* vx, int64_t ibs, dst_t* yy, int tid) {
     for (int j = 0; j < 8; ++j) {
         const int i = part * 8 + j;
         const int code = (x[b].qs[i / 4] >> ((i % 4) * 2)) & 3;
+#if defined(__HIPCC__) && defined(__gfx1012__) && HIP_VERSION_MAJOR < 7
+        // HIP 5.7 on RDNA1 folds the half path's negative scale times +0
+        // to +0. Preserve the scale's sign, as the FP32/CPU paths do.
+        if constexpr (std::is_same_v<dst_t, __half>) {
+            if (code == 1) {
+                yy[b * 64 + i] = __ushort_as_half(__half_as_ushort(x[b].d) & 0x8000u);
+                continue;
+            }
+        }
+#endif
         yy[b * 64 + i] = cvt<dst_t>(d * (float) (code - 1));
     }
 }
diff --git a/tests/hip/q2_zero.cpp b/tests/hip/q2_zero.cpp
new file mode 100644
index 00000000000..e897e522d83
--- /dev/null
+++ b/tests/hip/q2_zero.cpp
@@ -0,0 +1,50 @@
+// Q2_0 dequant must preserve signed zero when a negative scale meets code 1.
+// This caught HIP 5.7/gfx1012 folding the half product to positive zero.
+#include "strata/kernels/iq_kernels.hpp"
+#include <hip/hip_runtime.h>
+#include <hip/hip_fp16.h>
+#include <cstdint>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <vector>
+
+#define CHECK(call) do { const auto e = (call); if (e != hipSuccess) { \
+    std::fprintf(stderr, "%s: %s\n", #call, hipGetErrorString(e)); std::exit(2); } } while (0)
+
+int main() {
+    // GGUF Q2_0: one half scale followed by sixteen packed 2-bit bytes.
+    struct Block { uint16_t d; uint8_t qs[16]; };
+    static_assert(sizeof(Block) == 18);
+    constexpr int blocks = 16, values = blocks * 64;
+    std::vector<Block> input(blocks);
+    std::vector<uint16_t> expected(values), got(values);
+    for (int b = 0; b < blocks; ++b) {
+        const float scale = (b & 1) ? -0.5f : 0.5f;
+        const __half half_scale = __float2half(scale);
+        std::memcpy(&input[b].d, &half_scale, 2);
+        for (int i = 0; i < 16; ++i) input[b].qs[i] = 0xe4;  // codes 0,1,2,3
+        for (int i = 0; i < 64; ++i) {
+            const __half value = __float2half(scale * float((i % 4) - 1));
+            std::memcpy(&expected[b * 64 + i], &value, 2);
+        }
+    }
+    void* weights = nullptr;
+    uint16_t* output = nullptr;
+    CHECK(hipMalloc(&weights, input.size() * sizeof(Block)));
+    CHECK(hipMalloc(reinterpret_cast<void**>(&output), values * sizeof(uint16_t)));
+    CHECK(hipMemcpy(weights, input.data(), input.size() * sizeof(Block), hipMemcpyHostToDevice));
+    strata::kernels::iq_dequant_f16(42, weights, values, output, nullptr);
+    CHECK(hipDeviceSynchronize());
+    CHECK(hipMemcpy(got.data(), output, values * sizeof(uint16_t), hipMemcpyDeviceToHost));
+    int failures = 0;
+    for (int i = 0; i < values; ++i) {
+        if (got[i] == expected[i]) continue;
+        if (failures++ < 4)
+            std::printf("index=%d got=0x%04x expected=0x%04x\n", i, unsigned(got[i]), unsigned(expected[i]));
+    }
+    CHECK(hipFree(weights));
+    CHECK(hipFree(output));
+    std::printf("hip_q2_zero: %d values, %d failures\n", values, failures);
+    return failures ? 1 : 0;
+}

From 912f5358d53aae2ab452fe450fc225c3fc331937 Mon Sep 17 00:00:00 2001
From: David <David@code.contractors>
Date: Thu, 1 Oct 2026 17:31:27 -0400
Subject: [PATCH 156/201] hip: retain native wave synchronization on HIP 7

---
 include/strata/hip_compat/intrinsics.hpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/strata/hip_compat/intrinsics.hpp b/include/strata/hip_compat/intrinsics.hpp
index ef5079cdbe1..3129f0492bd 100644
--- a/include/strata/hip_compat/intrinsics.hpp
+++ b/include/strata/hip_compat/intrinsics.hpp
@@ -3,6 +3,7 @@
 // CUDA device intrinsics used by Strata kernels on supported wave32 HIP targets.
 // This header is included only from the HIP cuda_runtime compatibility shim.
 #if defined(__HIPCC__)
+#include <hip/hip_version.h>
 
 #include <cstdint>
 
@@ -101,12 +102,14 @@ __device__ __forceinline__ void require_full_wave_mask(uint32_t mask) {
 
 // Older HIP has no __syncwarp. A wave barrier alone does not order memory.
 // Release/acquire fences cover the shared-memory exchange used by attention.
+#if HIP_VERSION_MAJOR < 7
 __device__ __forceinline__ void syncwarp(uint32_t mask = 0xffffffffu) {
     require_full_wave_mask(mask);
     __builtin_amdgcn_fence(__ATOMIC_RELEASE, "workgroup");
     __builtin_amdgcn_wave_barrier();
     __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "workgroup");
 }
+#endif
 
 template <typename T>
 __device__ __forceinline__ T shfl_xor_sync(uint32_t mask, T value, int lane_mask, int width = 32) {
@@ -149,7 +152,9 @@ __device__ __forceinline__ unsigned ballot_sync(uint32_t mask, int predicate) {
 #define __shfl_up_sync(...) (::strata::hip_compat::shfl_up_sync(__VA_ARGS__))
 #define __shfl_sync(...) (::strata::hip_compat::shfl_sync(__VA_ARGS__))
 #define __ballot_sync(mask, predicate) (::strata::hip_compat::ballot_sync((mask), (predicate)))
+#if HIP_VERSION_MAJOR < 7
 #define __syncwarp(...) (::strata::hip_compat::syncwarp(__VA_ARGS__))
+#endif
 // AMD's sleep instruction accepts only 0..15; the synchronization loops use it as a
 // backoff hint, so use its smallest portable delay independently of CUDA cycle counts.
 #define __nanosleep(cycles) __builtin_amdgcn_s_sleep(1)

From fa8dd5cf0380004df681e4f41b622e772ad246be Mon Sep 17 00:00:00 2001
From: JeanP00l <181703563+JeanP00l@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:03:54 +0300
Subject: [PATCH 157/201] bench: community report, 2x AMD Instinct MI50
 (gfx906), Coder IQ1_M, 4K to 128K prompt tokens

---
 .../2026-10-03-community-2x-mi50/README.md    |  121 ++
 .../2026-10-03-community-2x-mi50/benchmark.py |  135 ++
 .../initial-status.json                       |   50 +
 .../2026-10-03-community-2x-mi50/needles.json |   56 +
 .../2026-10-03-community-2x-mi50/results.json |  382 ++++
 .../strata-coder.json                         |   45 +
 .../2026-10-03-community-2x-mi50/summary.json |  113 ++
 .../telemetry.jsonl                           | 1699 +++++++++++++++++
 docs/COMMUNITY_BENCHMARKS.md                  |    3 +
 9 files changed, 2604 insertions(+)
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/README.md
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/benchmark.py
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/initial-status.json
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/needles.json
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/results.json
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/strata-coder.json
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/summary.json
 create mode 100644 bench/results/2026-10-03-community-2x-mi50/telemetry.jsonl

diff --git a/bench/results/2026-10-03-community-2x-mi50/README.md b/bench/results/2026-10-03-community-2x-mi50/README.md
new file mode 100644
index 00000000000..8d0301fba07
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/README.md
@@ -0,0 +1,121 @@
+# Community benchmark: 2x AMD Instinct MI50 16 GB (gfx906), Xeon E5-2666 v3
+
+Measured on 2026-10-03 by [JeanP00l](https://github.com/JeanP00l) on a Linux server. This tests the Coder
+(IQ1_M) with a 131,072-token context, the layer split across two MI50 cards, and the gfx906 build of #638. That
+build is an opt-in HIP build, separate from the wave32 RDNA backend.
+
+The median decode throughput was **50.1 tok/s at 4,096 prompt tokens, 47.8 tok/s at 32,768 and 45.7 tok/s at
+128,000**. Prompts were read at 321, 523 and 517 tok/s. The requests are synthetic code-explanation requests
+with greedy decoding and a 256-token output cap. They do not establish general answer quality or performance on
+other workloads.
+
+## Hardware and software
+
+- **GPUs:** 2x AMD Instinct MI50 16 GB (Vega 20, gfx906, wave64; HIP names them "AMD Radeon VII"). Power limit
+  85 W per card, set by the owner (the cards' own limit is higher). PCIe 3.0 x16 on both. Peer access between them
+  works, through the CPU's root complex (no direct bridge). Blower fans; no clock locking beyond the power limit.
+  The engine's PCIe probe measured 13.8 GB/s host to device.
+- **CPU and RAM:** Intel Xeon E5-2666 v3 (10 cores, 20 threads, AVX2, no AVX-512); the engine used 9 expert-pool
+  workers plus its host thread. 32 GB DDR4 quad-channel (Linux reports 31.2 GiB). 8 GiB swap file. One SATA SSD.
+- **OS and runtime:** Ubuntu 24.04.4 LTS, kernel 6.8.0-138-generic, the kernel's amdgpu driver. HIP 7.14 from the
+  community image `mixa3607/rocm-gfx906:7.14-complete` (AMD's current ROCm no longer ships gfx906 libraries).
+- **Source:** [`mi50-bench-build`](https://github.com/JeanP00l/Strata/tree/mi50-bench-build) at `ea51fd3`, which is
+  `main` 99f3dbd (engine 0.1.38) with #638 (at 17beb33), #639, #640 and #637 merged. #638's later commits
+  (a914b13) only fix the CUDA/RDNA compile and do not change the gfx906 binary's behaviour.
+- **Build:** `-DSTRATA_HIP_GFX906=ON -DCMAKE_HIP_ARCHITECTURES=gfx906 -DSTRATA_PORTABLE=ON`, ROCm clang, Ninja,
+  llama.cpp at the pinned 3cf0325.
+- **Other services:** the machine's other GPU services were stopped, so the two cards ran only Strata. CPU services
+  (a database, a sync daemon) kept running. This was not a fully isolated operating system.
+
+## Model and configuration
+
+**Model:** [`ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-Coder-GGUF`](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-Coder-GGUF),
+IQ1_M. The repository revision was not recorded; the shard SHA-256 hashes matched the `.sha256` files downloaded
+with them:
+
+- `Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-00001-of-00002.gguf` `e11083ba855e7666b48ea3f2db6a9c3a20c18751a012cc24f948de91b7087fad`
+- `Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-00002-of-00002.gguf` `316b46f3a2dbd68c900f43136ab9449f9dcc3725dfd8c794847c204bc161e113`
+
+The native pack and the MTP draft layer were prepared with the repository's tools on 2026-09-29. The expert profile is the bundled
+`data/expert-profile-coder.bin`.
+
+**Configuration** ([strata-coder.json](strata-coder.json); `/m` is the model directory, `/work` the build):
+
+- context 131,072, `--kv int8 --kv-resident 32768` (32,768 KV cells per attention layer in VRAM, the rest streamed
+  from RAM);
+- `layer_split 27`: layers 0-26 on GPU 0, 27-47 on GPU 1. With #639 each GPU loads only its own layers' dense
+  weights;
+- expert cache `auto`, `--vram-reserve-mib 600`: 6,912 + 5,376 slots = **all 12,288 experts in VRAM**, prefilled
+  from the profile, no eviction;
+- `--prefill 4096`, with the prompt path borrowing 1,193 + 1,084 cache slots;
+- MTP `--spec 4 --spec-min-p 0.5`; suffix drafting on (the default);
+- `--pcie-frac 0`, required with `STRATA_ARENA_MMAP=1` (#640, the expert arena as a read-only mapped file; 23.4
+  GiB of VRAM-held experts handed back to the OS at start);
+- no vision, no calibration, no speed projection, no control vectors;
+- reasoning off (`reasoning_effort: none`), temperature 0, 256 generated tokens per speed run.
+
+## Method
+
+[benchmark.py](benchmark.py) is the script of the
+[RTX 5090 report](../2026-09-30-community-rtx-5090/README.md), unchanged. It builds deterministic synthetic Python
+filler, puts a different nonce near the start of each request, and counts the rendered chat prompt with Strata's
+tokenizer. Its request hashes and the output text of every run are in [results.json](results.json); the aggregates
+are in [summary.json](summary.json).
+
+The server ran in a container with both cards (the repository's `serve/` and `tools/` from the source above):
+
+```bash
+docker run --device=/dev/kfd --device=/dev/dri --group-add video --ipc=host --ulimit memlock=-1 \
+  -e HSA_OVERRIDE_GFX_VERSION=9.0.6 -e STRATA_ARENA_MMAP=1 ... \
+  python3 serve/server.py --engine strata --config strata-coder.json --port 8080
+python3 benchmark.py --root /opt/strata --pack /m/pack-coder --url http://127.0.0.1:8080 --out results/
+python3 tools/needle_bench.py --url http://127.0.0.1:8080 --lengths 32k,128k --depths 10,50,90 --out needles.json
+```
+
+- One short warm-up request is excluded.
+- Three runs at each length ran serially, in increasing-length order, on the same loaded engine.
+- All nine speed requests read their whole prompt: **zero reused tokens**.
+- The expert cache was filled at start and kept between requests. Loading time is excluded.
+- TTFT is streaming, from just before the HTTP request to the first nonempty text delta, over loopback.
+- Prompt throughput is freshly read tokens / `prompt_ms`. Decode throughput is `engine_generated / decode_ms`.
+- [engine.log](engine.log) is the engine's whole log for this session, including the start-up decisions.
+
+## Results
+
+Each cell is the median **[minimum-maximum]** of three runs. Every request generated 256 tokens and stopped at
+the output limit. No speed request failed or was cancelled.
+
+| Prompt tokens | Reused | Prompt tok/s | Decode tok/s | TTFT seconds | Total seconds |
+| ---: | ---: | ---: | ---: | ---: | ---: |
+| 4,096 | 0 | 320.9 [309.9-324.7] | 50.1 [49.3-54.0] | 12.81 [12.66-13.26] | 17.90 [17.38-18.43] |
+| 32,768 | 0 | 522.8 [522.6-523.4] | 47.8 [47.6-48.5] | 62.81 [62.75-62.84] | 68.10 [68.10-68.15] |
+| 128,000 | 0 | 516.8 [516.5-516.9] | 45.7 [44.8-51.5] | 248.09 [248.06-248.27] | 253.75 [253.03-253.84] |
+
+- The decode expert-cache hit rate was 100% for every request. All experts are in VRAM; the CPU pool computes none.
+- The 4K prompt reads at about 60% of the longer ones' speed, because a 4,096-token chunk pays the fixed per-chunk
+  cost once.
+- Draft acceptance varies between runs (decode 44.8-51.5 tok/s at 128K) although the text is greedy.
+
+**Memory**, from [telemetry.jsonl](telemetry.jsonl) (1,699 one-second samples over 1,763 s, from start through
+the recall checks):
+
+- VRAM peak: 15.42 GiB on GPU 0 and 14.70 GiB on GPU 1 (`mem_info_vram_used`, the whole card).
+- RAM: `MemAvailable` never below **25.1 GiB** of 31.2.
+- Swap: no growth during the run. The swap file held ~1.3 GiB from earlier use before the start.
+
+These are sampled values; brief peaks between samples can be missed.
+
+## Recall and limitations
+
+The repository's unchanged `tools/needle_bench.py` found **all six needles**, at depths 10%, 50% and 90% at both
+lengths ([needles.json](needles.json)):
+
+- `32k` prompts were 25,776-25,777 tokens and `128k` prompts 103,725-103,727 tokens.
+- The last 128K case reused 49,785 prompt tokens; the other five reused none.
+
+**Limits of this report:**
+- One machine, one quantization, one configuration, and a small synthetic workload.
+- Long output, sampled decoding, thinking, coding-task correctness, vision, tool use, concurrency and a sustained
+  thermal run were not part of this report.
+- For context, on the same machine and model, llama.cpp (3cf0325, ROCm) measured 26.9 tok/s `tg128` on 2026-09-29.
+  That is a different workload, not a controlled comparison.
diff --git a/bench/results/2026-10-03-community-2x-mi50/benchmark.py b/bench/results/2026-10-03-community-2x-mi50/benchmark.py
new file mode 100644
index 00000000000..cdb6e4cc069
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/benchmark.py
@@ -0,0 +1,135 @@
+#!/usr/bin/env python3
+"""Serial, fresh-prompt Strata benchmark. Run inside its prepared environment."""
+import argparse
+import hashlib
+import json
+import statistics
+import sys
+import time
+import urllib.request
+from pathlib import Path
+
+
+def get(url):
+    with urllib.request.urlopen(url, timeout=30) as response:
+        return json.load(response)
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument("--root", type=Path, default=Path("/workspace/Strata"))
+    parser.add_argument("--pack", type=Path, default=Path("/workspace/Strata-data/packs/iq2_xs"))
+    parser.add_argument("--url", default="http://127.0.0.1:18080")
+    parser.add_argument("--out", type=Path, default=Path("/workspace/results"))
+    parser.add_argument("--targets", default="4096,32768,128000")
+    parser.add_argument("--runs", type=int, default=3)
+    args = parser.parse_args()
+    args.out.mkdir(parents=True, exist_ok=True)
+    sys.path[:0] = [str(args.root), str(args.root / "tools")]
+    from strata_tokenizer import Tokenizer
+    from serve.frontend import ChatTemplate, openai_to_messages
+    directory = args.pack / "tokenizer"
+    vocab = json.loads((directory / "vocab.json").read_text())
+    tokens = [None] * len(vocab)
+    for token, number in vocab.items():
+        tokens[number] = token
+    tokenizer = Tokenizer(tokens, (directory / "merges.txt").read_text().splitlines(),
+                          json.loads((directory / "token_type.json").read_text()))
+    template = ChatTemplate(directory / "chat_template.jinja")
+    initial = get(args.url + "/v1/status")
+    (args.out / "initial-status.json").write_text(json.dumps(initial, indent=2) + "\n")
+    rows = []
+
+    def request(content, maximum=256):
+        return {"model": "strata", "messages": [{"role": "user", "content": content}],
+                "temperature": 0, "reasoning_effort": "none", "max_tokens": maximum,
+                "stream": True, "stream_options": {"include_usage": True}}
+
+    def count(req):
+        messages, tools, kwargs = openai_to_messages(req)
+        return len(tokenizer.encode(template.render(messages, tools, **kwargs), parse_special=True))
+
+    def perform(label, req, expected=None):
+        body = json.dumps(req).encode()
+        (args.out / (label + "-request.json")).write_bytes(body + b"\n")
+        print("start", label, "tokens", expected, flush=True)
+        chunks, texts, first, finish = [], [], None, None
+        started = time.perf_counter()
+        wire = urllib.request.Request(args.url + "/v1/chat/completions", data=body,
+                                      headers={"Content-Type": "application/json"})
+        with urllib.request.urlopen(wire, timeout=1800) as response:
+            for line in response:
+                if not line.startswith(b"data: "):
+                    continue
+                payload = line[6:].strip()
+                if payload == b"[DONE]":
+                    break
+                chunk = json.loads(payload)
+                chunks.append(chunk)
+                for choice in chunk.get("choices", []):
+                    delta = choice.get("delta", {})
+                    text = (delta.get("content") or "") + (delta.get("reasoning_content") or "")
+                    if text:
+                        first = first if first is not None else time.perf_counter() - started
+                        texts.append(text)
+                    finish = choice.get("finish_reason") or finish
+        elapsed = time.perf_counter() - started
+        metrics = get(args.url + "/metrics")
+        engine = metrics["requests"][0]
+        usage = next((chunk["usage"] for chunk in reversed(chunks) if "usage" in chunk), {})
+        row = {"label": label, "expected_prompt_tokens": expected,
+               "request_sha256": hashlib.sha256(body).hexdigest(),
+               "client_ttft_s": first, "client_elapsed_s": elapsed, "finish_reason": finish,
+               "usage": usage, "engine": engine, "text": "".join(texts)}
+        if expected is not None and engine["prompt_tokens"] != expected:
+            raise RuntimeError(f"token count mismatch: {expected} vs {engine['prompt_tokens']}")
+        if not texts:
+            raise RuntimeError(f"no text received for {label}")
+        (args.out / (label + "-raw.json")).write_text(json.dumps({"chunks": chunks, "row": row}, indent=2) + "\n")
+        rows.append(row)
+        (args.out / "results.json").write_text(json.dumps(rows, indent=2) + "\n")
+        print("done", label, json.dumps({"ttft_s": first, "elapsed_s": elapsed, "engine": engine}), flush=True)
+        return row
+
+    perform("warmup", request("Reply with exactly the word READY.", 16))
+    # Each nonce occurs before the filler so previous long prompts cannot be reused.
+    filler = "\n".join(f"def task_{i:05d}(value: int) -> int: return (value * {(i % 97) + 1} + {i}) % 100003"
+                       for i in range(12000))
+    ending = ("\n\nWrite a detailed explanation of the code above. Discuss deterministic integer transforms, "
+              "modulo arithmetic, testing, naming, complexity, and maintainability. Write at least 600 words.")
+    for target in map(int, args.targets.split(",")):
+        for run in range(1, args.runs + 1):
+            prefix = f"Benchmark nonce: series-{target}-trial-{run}.\nReview this synthetic Python module:\n"
+            lo, hi = 0, len(filler)
+            while lo < hi:
+                middle = (lo + hi + 1) // 2
+                if count(request(prefix + filler[:middle] + ending)) <= target:
+                    lo = middle
+                else:
+                    hi = middle - 1
+            req = request(prefix + filler[:lo] + ending)
+            actual = count(req)
+            if actual < target - 20 or actual > target:
+                raise RuntimeError(f"could not construct target {target}: {actual}")
+            perform(f"tokens-{target}-run-{run}", req, actual)
+    measured = [row for row in rows if row["label"] != "warmup"]
+    groups = {}
+    for target in map(int, args.targets.split(",")):
+        subset = [r for r in measured if r["label"].startswith(f"tokens-{target}-")]
+        values = {
+            "prompt_tokens": [r["engine"]["prompt_tokens"] for r in subset],
+            "cached_tokens": [r["engine"].get("reused", 0) for r in subset],
+            "output_tokens": [r["engine"]["engine_generated"] for r in subset],
+            "client_ttft_s": [r["client_ttft_s"] for r in subset],
+            "client_elapsed_s": [r["client_elapsed_s"] for r in subset],
+            "prefill_tok_s": [(r["engine"]["prompt_tokens"] - (r["engine"].get("reused") or 0)) / (r["engine"]["prompt_ms"] / 1000) for r in subset],
+            "decode_tok_s": [r["engine"]["engine_generated"] / (r["engine"]["decode_ms"] / 1000) for r in subset],
+        }
+        groups[str(target)] = {key: {"median": statistics.median(v), "min": min(v), "max": max(v)}
+                              for key, v in values.items()}
+    (args.out / "summary.json").write_text(json.dumps(groups, indent=2) + "\n")
+    print("summary", json.dumps(groups), flush=True)
+
+
+if __name__ == "__main__":
+    main()
diff --git a/bench/results/2026-10-03-community-2x-mi50/initial-status.json b/bench/results/2026-10-03-community-2x-mi50/initial-status.json
new file mode 100644
index 00000000000..fd96e13c051
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/initial-status.json
@@ -0,0 +1,50 @@
+{
+  "service": "strata",
+  "model": "qwen3.8-flash-next-coder",
+  "loaded": true,
+  "auto_load": true,
+  "structured_output": {
+    "formats": [
+      "json_object",
+      "json_schema"
+    ],
+    "method": "prompt_and_validate",
+    "constrained_decoding": false,
+    "stream_buffered": true
+  },
+  "engine": "0.1.38",
+  "started": 1791055531,
+  "uptime_s": 2,
+  "cache_max_tokens": 131072,
+  "context": {
+    "native": 131072,
+    "max_positions": 131072
+  },
+  "concurrency": {
+    "serving": 1,
+    "requested": 1
+  },
+  "dialects": [
+    "/v1/chat/completions",
+    "/v1/messages"
+  ],
+  "vision": {
+    "enabled": false,
+    "available": false,
+    "error": null
+  },
+  "activity": {
+    "requests": 0,
+    "in_flight": 0,
+    "last_request_at": null
+  },
+  "last_timings": null,
+  "machine": {
+    "at": 1791055534,
+    "gpu": null,
+    "ram": {
+      "used_gib": 4.9,
+      "total_gib": 31.2
+    }
+  }
+}
diff --git a/bench/results/2026-10-03-community-2x-mi50/needles.json b/bench/results/2026-10-03-community-2x-mi50/needles.json
new file mode 100644
index 00000000000..0eda889604a
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/needles.json
@@ -0,0 +1,56 @@
+[
+ {
+  "length": "32k",
+  "depth": 10,
+  "prompt_tokens": 25776,
+  "seconds": 52.6,
+  "found": true,
+  "word": "meadow-copper-504",
+  "answer": "meadow-copper-504"
+ },
+ {
+  "length": "32k",
+  "depth": 50,
+  "prompt_tokens": 25776,
+  "seconds": 50.7,
+  "found": true,
+  "word": "falcon-quartz-940",
+  "answer": "falcon-quartz-940"
+ },
+ {
+  "length": "32k",
+  "depth": 90,
+  "prompt_tokens": 25777,
+  "seconds": 50.8,
+  "found": true,
+  "word": "willow-cobalt-696",
+  "answer": "willow-cobalt-696"
+ },
+ {
+  "length": "128k",
+  "depth": 10,
+  "prompt_tokens": 103727,
+  "seconds": 206.9,
+  "found": true,
+  "word": "falcon-saffron-138",
+  "answer": "falcon-saffron-138"
+ },
+ {
+  "length": "128k",
+  "depth": 50,
+  "prompt_tokens": 103725,
+  "seconds": 205.9,
+  "found": true,
+  "word": "quartz-tundra-528",
+  "answer": "quartz-tundra-528"
+ },
+ {
+  "length": "128k",
+  "depth": 90,
+  "prompt_tokens": 103725,
+  "seconds": 112.5,
+  "found": true,
+  "word": "quartz-glacier-192",
+  "answer": "quartz-glacier-192"
+ }
+]
\ No newline at end of file
diff --git a/bench/results/2026-10-03-community-2x-mi50/results.json b/bench/results/2026-10-03-community-2x-mi50/results.json
new file mode 100644
index 00000000000..10d3c2b675c
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/results.json
@@ -0,0 +1,382 @@
+[
+  {
+    "label": "warmup",
+    "expected_prompt_tokens": null,
+    "request_sha256": "b63e57873441a996a529b246a66cf12de70a7c671777f99329354d5c195f788f",
+    "client_ttft_s": 0.44287488800182473,
+    "client_elapsed_s": 0.5121355729934294,
+    "finish_reason": "stop",
+    "usage": {
+      "prompt_tokens": 19,
+      "completion_tokens": 2,
+      "total_tokens": 21,
+      "prompt_tokens_details": {
+        "cached_tokens": 0
+      }
+    },
+    "engine": {
+      "projection": null,
+      "time": 1791055534.084382,
+      "duration_s": 0.5,
+      "finish": "stop",
+      "prompt_tokens": 19,
+      "reused": 0,
+      "output_tokens": 2,
+      "prompt_total": 19,
+      "prompt_read": 19,
+      "engine_generated": 2,
+      "prompt_ms": 398.1,
+      "decode_ms": 108.4,
+      "decode_tok_s": 18.5,
+      "hit_rate": 1.0,
+      "ram_blobs": 0,
+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 3,
+      "drafts_accepted": 3
+    },
+    "text": "READY"
+  },
+  {
+    "label": "tokens-4096-run-1",
+    "expected_prompt_tokens": 4096,
+    "request_sha256": "5d94c652067354bbe72930d2bdad3886564f08cf2546b32411af02d33ad3ce05",
+    "client_ttft_s": 13.26403624098748,
+    "client_elapsed_s": 18.427036346998648,
+    "finish_reason": "length",
+    "usage": {
+      "prompt_tokens": 4096,
+      "completion_tokens": 256,
+      "total_tokens": 4352,
+      "prompt_tokens_details": {
+        "cached_tokens": 0
+      }
+    },
+    "engine": {
+      "projection": null,
+      "time": 1791055535.8394356,
+      "duration_s": 18.4,
+      "finish": "length",
+      "prompt_tokens": 4096,
+      "reused": 0,
+      "output_tokens": 256,
+      "prompt_total": 4096,
+      "prompt_read": 4096,
+      "engine_generated": 256,
+      "prompt_ms": 13216.0,
+      "decode_ms": 5189.0,
+      "decode_tok_s": 49.3,
+      "hit_rate": 1.0,
+      "ram_blobs": 0,
+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 210,
+      "drafts_accepted": 145
+    },
+    "text": "The provided Python module presents a series of deterministic integer transforms, each encapsulated within a uniquely named function. These functions, labeled from `task_00000` to `task_00112` (and potentially beyond), follow a consistent mathematical pattern: they take an integer input, apply a linear transformation of the form `(value * multiplier + offset) % modulus`, and return the result. This structure is a classic example of a linear congruential generator (LCG) component, often used in pseudo-random number generation, hashing, or cryptographic primitives, though here it appears to be a synthetic benchmark or test harness.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nEach function implements a linear congruential step: `f(x) = (a * x + c) % m`, where `a` is the multiplier, `c` is the increment, and `m` is the modulus (100003 in all cases). The modulus 100003 is a prime number, which is significant because it ensures that the multiplicative group modulo 100003 is cyclic, and for certain choices of `a` and `c`, the transformation can be a permutation of the"
+  },
+  {
+    "label": "tokens-4096-run-2",
+    "expected_prompt_tokens": 4096,
+    "request_sha256": "8da8a04e70e4d916f6630729082bdfb9d6ebbb47117aad60bc0541bce198a213",
+    "client_ttft_s": 12.663496508001117,
+    "client_elapsed_s": 17.377855258993804,
+    "finish_reason": "length",
+    "usage": {
+      "prompt_tokens": 4096,
+      "completion_tokens": 256,
+      "total_tokens": 4352,
+      "prompt_tokens_details": {
+        "cached_tokens": 0
+      }
+    },
+    "engine": {
+      "projection": null,
+      "time": 1791055555.3915784,
+      "duration_s": 17.4,
+      "finish": "length",
+      "prompt_tokens": 4096,
+      "reused": 0,
+      "output_tokens": 256,
+      "prompt_total": 4096,
+      "prompt_read": 4096,
+      "engine_generated": 256,
+      "prompt_ms": 12615.4,
+      "decode_ms": 4740.3,
+      "decode_tok_s": 54.0,
+      "hit_rate": 1.0,
+      "ram_blobs": 0,
+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 208,
+      "drafts_accepted": 156
+    },
+    "text": "The provided Python module consists of a series of functions, each named with a specific pattern (`task_XXXXX`), that perform a deterministic integer transformation. Each function takes a single integer argument `value` and returns an integer result computed using a linear transformation followed by a modulo operation. The general form of each function is:\n\n```python\ndef task_XXXXX(value: int) -> int:\n    return (value * A + B) % 100003\n```\n\nwhere `A` and `B` are constants specific to each function. The modulus `100003` is a prime number, which is significant in modular arithmetic because it ensures that the multiplicative group modulo 100003 is cyclic and that every non-zero element has a multiplicative inverse. This property is often exploited in cryptographic algorithms, hash functions, and pseudo-random number generators.\n\n### Deterministic Integer Transforms\n\nEach function implements a linear congruential transformation, a common technique in number theory and computer science. The transformation `value * A + B` is an affine transformation over the integers. When combined with the modulo operation, it becomes a function from the finite field (or ring) of integers modulo 10"
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+      "drafts_offered": 222,
+      "drafts_accepted": 146
+    },
+    "text": "The provided Python module presents a series of deterministic integer transforms, each encapsulated within a uniquely named function. These functions, labeled from `task_00000` to `task_00112` (and potentially beyond), follow a consistent mathematical pattern: they take an integer input, apply a linear transformation, and return the result modulo a large prime number, specifically 100003. This structure serves as a synthetic benchmark for evaluating code generation, pattern recognition, and algorithmic consistency in automated systems.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nAt the core of each function is the expression `(value * multiplier + offset) % 100003`. This is a classic linear congruential generator (LCG) step, often used in pseudo-random number generation or cryptographic hashing, though here it is applied deterministically to a single input. The multiplier and offset vary per function, creating a unique mapping for each task. For instance, `task_00000` uses a multiplier of 1 and an offset of 0, effectively returning `value % 100003`. In contrast, `task_00097` uses a multiplier of 1"
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+  {
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+    "engine": {
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+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 230,
+      "drafts_accepted": 152
+    },
+    "text": "This Python module presents a highly repetitive, synthetic collection of functions that serve as a benchmark for deterministic integer transforms. The code consists of a series of functions named `task_00000` through `task_00888` (and potentially beyond), each performing a specific linear transformation on an input integer `value` and returning the result modulo 100003.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nAt the core of each function is a linear congruential generator (LCG) style operation: `(value * multiplier + addend) % 100003`. The modulus, 100003, is a prime number. This choice of modulus is significant because it ensures that the multiplicative group of integers modulo 100003 is cyclic, which is a desirable property for cryptographic or pseudo-random number generation contexts, although here it is used for deterministic hashing or transformation.\n\nThe structure of the functions reveals a pattern in the `multiplier` and `addend` parameters. For the first 97 functions (`task_00000` to `task_00096`), the multiplier increases linearly from 1 to"
+  },
+  {
+    "label": "tokens-32768-run-2",
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+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 222,
+      "drafts_accepted": 147
+    },
+    "text": "This Python module presents a highly repetitive, synthetic collection of functions that perform deterministic integer transforms. Each function follows a strict pattern: it accepts an integer `value`, applies a linear transformation of the form `(value * multiplier + offset) % modulus`, and returns the result. The modulus is consistently set to `100003`, which is a prime number. This choice of modulus is significant because it ensures that the multiplicative group of integers modulo 100003 is cyclic, and every non-zero multiplier has a unique modular inverse. This property is often desirable in cryptographic or hashing contexts, though here it appears to be used for simple arithmetic obfuscation or benchmarking.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nThe core operation in each function is a linear congruential generator (LCG) step, commonly used in pseudo-random number generation. The formula $f(x) = (ax + c) \\pmod m$ defines an affine transformation over the finite field $\\mathbb{Z}_m$. In this module, $m = 100003$. The multipliers ($a$) and offsets ($c$) vary per function. For example, `task_00000`"
+  },
+  {
+    "label": "tokens-32768-run-3",
+    "expected_prompt_tokens": 32768,
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+      "hit_rate": 1.0,
+      "ram_blobs": 0,
+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 234,
+      "drafts_accepted": 153
+    },
+    "text": "This Python module presents a highly repetitive, synthetic collection of functions that perform deterministic integer transforms. Each function follows a strict pattern: it accepts an integer `value`, applies a linear transformation of the form `(value * multiplier + offset) % modulus`, and returns the result. The modulus is consistently set to `100003`, which is a prime number. This choice of modulus is significant because it ensures that the multiplicative group of integers modulo 100003 is cyclic, meaning that for any non-zero multiplier, the transformation is bijective (a permutation) over the set of integers modulo 100003. This property is often desirable in cryptographic contexts or pseudo-random number generation, although here it appears to be used for benchmarking or synthetic data generation.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nThe core operation in each function is a linear congruential generator (LCG) step, defined by the formula $f(x) = (ax + c) \\pmod m$. In this module, $m = 100003$. The multiplier $a$ and the increment $c$ vary per function. For example, `task_00000` uses $a"
+  },
+  {
+    "label": "tokens-128000-run-1",
+    "expected_prompt_tokens": 128000,
+    "request_sha256": "3235aac3f934cf1d889c25973ca172b355509dc2522fdfb463fbefe979a9075d",
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+        "cached_tokens": 0
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+    },
+    "engine": {
+      "projection": null,
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+      "duration_s": 253.5,
+      "finish": "length",
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+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 232,
+      "drafts_accepted": 152
+    },
+    "text": "This Python module represents a synthetic benchmark designed to test the performance and correctness of integer arithmetic operations, specifically focusing on linear transforms and modular arithmetic. The code consists of a series of functions, each named `task_XXXXX`, where `XXXXX` is a zero-padded integer index. Each function accepts a single integer argument `value` and returns an integer result.\n\n### 1. Deterministic Integer Transforms\n\nThe core logic of every function in this module is identical in structure:\n```python\nreturn (value * A + B) % M\n```\nWhere:\n- `value` is the input integer.\n- `A` is a multiplier (coefficient).\n- `B` is an additive constant.\n- `M` is the modulus, which is consistently `100003` throughout the entire module.\n\nThis represents a **linear congruential transform**. In computer science, such transforms are fundamental in pseudorandom number generation (LCG), hashing functions, and cryptographic primitives. The specific form `(value * A + B) % M` ensures that the output is always within the range `[0, M-1]`, regardless of how large the input `value` is.\n\n### 2"
+  },
+  {
+    "label": "tokens-128000-run-2",
+    "expected_prompt_tokens": 128000,
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+      "file_mb": 0.0,
+      "drafts_offered": 205,
+      "drafts_accepted": 163
+    },
+    "text": "This Python module represents a synthetic benchmark designed to test the performance and correctness of integer arithmetic operations, specifically focusing on linear transforms and modular arithmetic. The code consists of a series of functions, each named `task_XXXXX`, where `XXXXX` is a zero-padded integer index. Each function accepts a single integer argument `value` and returns an integer result.\n\n### 1. Deterministic Integer Transforms\n\nThe core logic of each function is a linear transformation of the form:\n$$ f(x) = (a \\cdot x + b) \\pmod m $$\nwhere:\n- $x$ is the input `value`.\n- $a$ is the multiplier (coefficient).\n- $b$ is the additive constant.\n- $m$ is the modulus, which is consistently set to `100003` across all functions.\n\nThe multiplier $a$ and the constant $b$ vary deterministically based on the function's index. For example:\n- `task_00000`: $a=1, b=0$\n- `task_00001`: $a=2, b=1$\n- `task_00002`:"
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+  {
+    "label": "tokens-128000-run-3",
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+      "file_blobs": 0,
+      "file_mb": 0.0,
+      "drafts_offered": 235,
+      "drafts_accepted": 149
+    },
+    "text": "This Python module represents a synthetic benchmark designed to test the performance and correctness of integer arithmetic operations, specifically focusing on linear transformations combined with modular arithmetic. The code consists of a series of functions, each named `task_XXXXX`, where `XXXXX` is a zero-padded integer index. Each function accepts a single integer argument `value` and returns a new integer calculated using the formula:\n\n$$ f(value) = (value \\times A + B) \\pmod{M} $$\n\nwhere $A$ is a multiplier, $B$ is an additive constant, and $M$ is the modulus, which is consistently set to `100003` throughout the module.\n\n### Deterministic Integer Transforms and Modulo Arithmetic\n\nThe core logic of each function is a deterministic linear congruential transformation. In computer science, such transformations are fundamental to pseudorandom number generators (PRNGs), hash functions, and cryptographic primitives. The specific form $ (value \\times A + B) \\pmod{M} $ ensures that the output is always within the range $[0, M-1]$.\n\nThe modulus $M = 100003$ is a prime number. This choice is significant because"
+  }
+]
diff --git a/bench/results/2026-10-03-community-2x-mi50/strata-coder.json b/bench/results/2026-10-03-community-2x-mi50/strata-coder.json
new file mode 100644
index 00000000000..d766bbf9c28
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/strata-coder.json
@@ -0,0 +1,45 @@
+{
+ "exe": "/work/build-906/strata",
+ "args": [
+  "--pack",
+  "/m/pack-coder",
+  "--native",
+  "/m/coder/Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-00001-of-00002.gguf",
+  "--ple-gguf",
+  "/m/coder/Qwen3.8-Flash-Next-GSQ-RCO-IQ1_M-00002-of-00002.gguf",
+  "--expert-profile",
+  "/opt/strata/data/expert-profile-coder.bin",
+  "--expert-cache",
+  "auto",
+  "--prefill",
+  "4096",
+  "--spec",
+  "4",
+  "--spec-min-p",
+  "0.5",
+  "--mtp",
+  "/m/mtp/rt",
+  "--max-context",
+  "131072",
+  "--kv",
+  "int8",
+  "--vram-reserve-mib",
+  "600",
+  "--kv-resident",
+  "32768",
+  "--pcie-frac",
+  "0"
+ ],
+ "cwd": "/opt/strata",
+ "tokenizer": "/m/pack-coder/tokenizer",
+ "model_name": "qwen3.8-flash-next-coder",
+ "log": "/work/strata-coder.log",
+ "lib_dirs": [],
+ "port": 8080,
+ "host": "0.0.0.0",
+ "gpu": [
+  0,
+  1
+ ],
+ "layer_split": "27"
+}
\ No newline at end of file
diff --git a/bench/results/2026-10-03-community-2x-mi50/summary.json b/bench/results/2026-10-03-community-2x-mi50/summary.json
new file mode 100644
index 00000000000..eddf5ac3721
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/summary.json
@@ -0,0 +1,113 @@
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+}
diff --git a/bench/results/2026-10-03-community-2x-mi50/telemetry.jsonl b/bench/results/2026-10-03-community-2x-mi50/telemetry.jsonl
new file mode 100644
index 00000000000..bafdea80891
--- /dev/null
+++ b/bench/results/2026-10-03-community-2x-mi50/telemetry.jsonl
@@ -0,0 +1,1699 @@
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+{"t": 1791057245.964, "mem_avail_kib": 26730984, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057247.002, "mem_avail_kib": 26734972, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057248.038, "mem_avail_kib": 26741224, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057249.078, "mem_avail_kib": 26745100, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057250.114, "mem_avail_kib": 26701952, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057251.154, "mem_avail_kib": 26694368, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057252.191, "mem_avail_kib": 26685568, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057253.230, "mem_avail_kib": 26683856, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057254.266, "mem_avail_kib": 26678140, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057255.303, "mem_avail_kib": 26674628, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057256.338, "mem_avail_kib": 26671136, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057257.373, "mem_avail_kib": 26673032, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057258.412, "mem_avail_kib": 26685356, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057259.453, "mem_avail_kib": 26675828, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057260.496, "mem_avail_kib": 26556140, "swap_free_kib": 7065896, "vram_used": [16562462720,15780495360]}
+{"t": 1791057261.534, "mem_avail_kib": 29262176, "swap_free_kib": 7065896, "vram_used": [13813174272,12855922688]}
diff --git a/docs/COMMUNITY_BENCHMARKS.md b/docs/COMMUNITY_BENCHMARKS.md
index ff3c312c554..e6903faf401 100644
--- a/docs/COMMUNITY_BENCHMARKS.md
+++ b/docs/COMMUNITY_BENCHMARKS.md
@@ -15,6 +15,9 @@ and their limits. Report what you actually measured and label estimates separate
 - [2026-09-30: RTX 5090, Core Ultra 9 285K, 64 GB RAM](../bench/results/2026-09-30-community-rtx-5090/README.md):
   Strata 0.1.29, original Flash-Next IQ2_XS, 131,072-token context; three runs
   each at 4,096, 32,768, and 128,000 prompt tokens, plus six recall checks.
+- [2026-10-03: 2x AMD Instinct MI50 16 GB (gfx906), Xeon E5-2666 v3, 32 GB RAM](../bench/results/2026-10-03-community-2x-mi50/README.md):
+  the gfx906 build (#638) with #639 and #640, Coder IQ1_M, 131,072-token context, layer split across both cards;
+  three runs each at 4,096, 32,768, and 128,000 prompt tokens, plus six recall checks.
 
 ## What to record
 

From fc6027821d7ab39a9a71115bac706ec4e26a44d7 Mon Sep 17 00:00:00 2001
From: Anon <anon@users.noreply.github.com>
Date: Sat, 3 Oct 2026 16:51:28 +0000
Subject: [PATCH 158/201] prefill: a layer split's idle card streams a share of
 a one-chunk prompt's experts

A prompt that fits one chunk runs a layer split's stages one after the other,
so while one card reads its layers the other idles. --peer-device already has
the mechanism for this (PeerPrefill's peer streaming: a share of the experts
the primary streams goes over the peer's own PCIe link and is computed there),
but it needs P2P and is refused with --layer-split.

This makes PeerPrefill usable as a stream-only peer between the stages:

- set_stage_helper: each stage's prompt path gets the next stage's (the last
  one the first's); a stream-only PeerPrefill holds no experts (peer == null),
  so every use of the peer tier is guarded
- per prompt, bind_stage_helper points it at the idle stage's own lent prompt
  buffers (mixed, Xq, GU, H, Hq, Dm, ring, MMQ context): no VRAM of its own
- without P2P the activations, the row table, the group bounds and the result
  rows go through mapped host memory, read by copy kernels on the device that
  needs them. Copy-engine uploads queued behind the ring's expert blobs (the
  grouping tables' reason for mapped memory), which cost ~20 ms per layer and
  ate the whole gain; cudaMemcpyPeerAsync without P2P is staged by the driver
- only for one-chunk prompts on the MMQ path (not the fused kernels, not with
  --peer-device), with a share that falls with the chunk: min(0.45,
  0.5 - T/16384), off below 0.3 (~3.3K tokens) - measured, below
- STRATA_PREFILL_HELP=0 turns it off, STRATA_PREFILL_HELP_FRAC fixes the share

2x RTX 3090 (no P2P), UD-Q4_K_XL, layer split auto, 262K context,
--adapt-swaps 0, prompt tok/s without / with: 1.1K 496 / 723, 1.5K 674 / 833,
2K 878 / 1128, 2.5K 1017 / 1296, 3K 1260 / 1440, 4K 1605 / 1607, 8K 2215 /
2221; decode unchanged. The output is repeatable (same prompt, same answer)
but not bit-identical to STRATA_PREFILL_HELP=0's: the helped rows are
computed in another MMQ grouping.

0.1.39b (Niko1221): opt-in (STRATA_PREFILL_HELP=1), since the helped rows round differently from the default;
merged with #598 (run_impl / next_run_).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/MULTI_GPU.md                  |  14 ++
 include/strata/prefill/kernels.hpp |   3 +
 include/strata/prefill/prefill.hpp |  12 ++
 src/prefill/kernels.cu             |  14 ++
 src/prefill/prefill.cpp            | 231 +++++++++++++++++++++++++++--
 src/program/generate.cpp           |  13 ++
 6 files changed, 272 insertions(+), 15 deletions(-)

diff --git a/docs/MULTI_GPU.md b/docs/MULTI_GPU.md
index d98f8e19f9a..b3c53d918a3 100644
--- a/docs/MULTI_GPU.md
+++ b/docs/MULTI_GPU.md
@@ -76,6 +76,20 @@ VRAM keep its own prompt buffers - the same output as 0.1.31, measured on an R97
 differs from the default's (stable and coherent); `STRATA_SPLIT_OWN=auto` does that only where the buffers are at
 most 12% of each card's VRAM.
 
+**The idle card can help one-chunk prompts (opt-in, `STRATA_PREFILL_HELP=1`).** A prompt that fits one chunk runs the stages one after the other, so while
+one card reads its layers the other idles. With it on, each stage hands a share of its streamed experts to the idle card: it
+streams them over its own PCIe link into its own (lent) prompt buffers, computes their rows on the MMQ path and sends
+them back - `--peer-device`'s peer streaming, without P2P (the activations and the rows go through mapped host memory,
+read by copy kernels, so they do not queue behind the expert blobs on either card's copy engine). The share falls with
+the prompt (0.41 of the streamed experts at 1.5K tokens, 0.32 at 3K) and is off from ~3.3K tokens, where the stages
+overlap anyway and no share paid. Measured on 2x RTX 3090 (UD-Q4_K_XL, no P2P), prompt tok/s without / with: 1.1K 496 /
+723, 1.5K 674 / 833, 2K 878 / 1,128, 2.5K 1,017 / 1,296, 3K 1,260 / 1,440; 4K and 8K unchanged, decode unchanged. It
+costs no VRAM (the idle card's own prompt buffers) and ~110 KB of mapped host memory per token of the largest chunk it
+helped (~360 MB at 3.3K tokens). The rows it computes round like a different MMQ grouping, so the output is not
+bit-identical to the default's (it is repeatable: same prompt, same output), which is why it is **opt-in**:
+`STRATA_PREFILL_HELP=1` turns it on. Native packs on the MMQ prompt path only (not with the fused prompt kernels,
+`STRATA_PF_FUSED=1`, nor with `--peer-device`). With it on, `STRATA_PREFILL_HELP_FRAC=f` fixes the share.
+
 The engine flags behind it: `--layer-split K1[,K2..]|auto` and `--split-device D1[,D2..]` (the later stages'
 devices; default the next visible ones). `--layer-split K --split-device 0` runs both stages on one card sharing
 everything - the bit-exact check of the hand-off, not a speed mode.
diff --git a/include/strata/prefill/kernels.hpp b/include/strata/prefill/kernels.hpp
index bc4187a44f1..3358bea654c 100644
--- a/include/strata/prefill/kernels.hpp
+++ b/include/strata/prefill/kernels.hpp
@@ -60,6 +60,9 @@ void swiglu_pair(const float* g, const float* u, uint16_t* h16, int64_t n, void*
 /// dst[i] = src[i] for n int32s, as a kernel: either side may be mapped host memory, and the copy never waits
 /// behind the copy engine's queue (the prompt path's grouping tables, while the expert stream fills it).
 void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream);
+/// dst[0, n) = src[0, n) in 16-byte loads (both 16-byte aligned; src may be mapped host memory: read over PCIe by
+/// the kernel, not queued on a copy engine).
+void copy_f32_wide(float* dst, const float* src, int64_t n, void* stream);
 /// Gather rows: dst16[i, :] = x16[src[i], :] (n rows of `width` BF16).
 void gather_rows16(const uint16_t* x16, const int32_t* src, uint16_t* dst16, int64_t n, int64_t width, void* stream);
 /// bo[t, :] = shared[t, :] * sigmoid(sg[t]) + sum_k w[t, k] * D[slot[t, k], :]
diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index 9185e9873b0..f0182700831 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -121,6 +121,15 @@ class Prefill {
         stage_lb_ = layer_begin; stage_le_ = layer_end; next_ = next;
     }
 
+    /// LAYER SPLIT: `helper` is another stage's prompt path (another GPU).  A prompt of one chunk runs the stages one
+    /// after the other, so while this stage reads it the helper's GPU idles: it then streams a share of this stage's
+    /// non-resident experts over its own PCIe link into its own (lent) prompt buffers, computes their rows, and sends
+    /// them back - the --peer-device peer's streaming, without P2P (activations and rows through mapped host memory,
+    /// read by copy kernels).  Only on the MMQ prompt path, only for chunks of stream_all_min() tokens and more, up to
+    /// the size where the measured share stops paying.  Opt-in: STRATA_PREFILL_HELP=1 (not bit-identical to the default).  Both stages must have
+    /// run `init`.
+    bool set_stage_helper(Prefill* helper, std::string& err);
+
 private:
     // Stage-1 pipeline: intermediate stages return after handing their chunk to
     // the direct successor. The public run() drains the chain once at prompt end.
@@ -129,6 +138,9 @@ class Prefill {
 
     int64_t stage_lb_ = 0, stage_le_ = -1;
     Prefill* next_ = nullptr;
+    Prefill* helper_ = nullptr;         ///< set_stage_helper
+    bool single_chunk_ = false;         ///< a later stage: the prompt is one chunk (set by the stage before)
+    bool bind_stage_helper(int64_t T);  // binds the helper's buffers for a one-chunk prompt of T tokens
     const float* hand_in_ = nullptr;    ///< the previous stage's rows of the chunk being read (host, pinned)
 
     std::string next_err_;
diff --git a/src/prefill/kernels.cu b/src/prefill/kernels.cu
index ed78013dfa5..4ad67b1ad09 100644
--- a/src/prefill/kernels.cu
+++ b/src/prefill/kernels.cu
@@ -5,6 +5,7 @@
 
 #include <cuda_fp16.h>
 #include <cuda_runtime.h>
+#include <algorithm>
 
 #include <cfloat>
 #include <cmath>
@@ -956,6 +957,19 @@ __global__ void copy_i32_kernel(int32_t* __restrict__ dst, const int32_t* __rest
         dst[i] = src[i];
 }
 }  // namespace
+namespace {
+__global__ void copy_f4_kernel(float4* __restrict__ dst, const float4* __restrict__ src, int64_t n4) {
+    for (int64_t i = (int64_t) blockIdx.x * blockDim.x + threadIdx.x; i < n4; i += (int64_t) gridDim.x * blockDim.x)
+        dst[i] = src[i];
+}
+}  // namespace
+void copy_f32_wide(float* dst, const float* src, int64_t n, void* stream) {
+    if (n <= 0) return;
+    const int64_t n4 = n / 4, b = std::min<int64_t>((n4 + 255) / 256, 4096);
+    if (n4 > 0) copy_f4_kernel<<<(unsigned) b, 256, 0, (cudaStream_t) stream>>>((float4*) dst, (const float4*) src, n4);
+    if (n % 4) copy_i32((int32_t*) dst + n4 * 4, (const int32_t*) src + n4 * 4, n % 4, stream);
+    check("copy_f32_wide");
+}
 void copy_i32(int32_t* dst, const int32_t* src, int64_t n, void* stream) {
     if (n <= 0) return;
     const int64_t b = (n + 255) / 256;
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 32ebb9f689e..82cea8a1b60 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -92,6 +92,7 @@ constexpr int64_t C = 10240, ZV = 6144, HV = 48;
 // plan v0.3 P6: staging holds the largest blob of the pack (a native pack's blobs differ per layer)
 inline int64_t MAXBLOB() { return (int64_t) strata::kernels::cpu::expert_layout().max_blob; }
 constexpr int STAGE = 8;           // host->device expert staging ring (chunks below stream_all_min())
+constexpr int kSplitHelpRing = 48;  // layer split help: the helper stage's ring slots it streams through (at most)
 // Step 3: from this chunk size on, every non-resident expert of every layer streams in a fixed order through a
 // ring_slots()-slot ring (nearly all 512 are routed at such a chunk), so the copy engine keeps working through the
 // attention halves instead of waiting for each layer's routing.
@@ -386,6 +387,21 @@ struct PeerPrefill {
     int32_t *src = nullptr, *bounds = nullptr, *ident = nullptr;
     uint8_t *grp_gu = nullptr, *grp_d = nullptr;
     std::unique_ptr<mmq::Context> ctx;
+    mmq::Context* run_ctx = nullptr;      // the context its products run in: ctx, or a layer split helper stage's
+    // Without P2P (a layer split's helper) the activations and the result rows go through MAPPED pinned host buffers: the device that needs them reads them with a copy kernel.  A copy-engine
+    // upload would queue behind the expert blobs that device's streams already hold (up to a ring of them, ~70 us
+    // each - the grouping tables' reason for mapped memory too), and cudaMemcpyPeerAsync would be staged by the
+    // driver.  `back_at` / `back_rows`: the rows this layer sends back.
+    bool p2p = true;
+    // The row table and the group bounds go the same way: the primary's are pinned for its own device only (or
+    // pageable), and a copy from them on the peer's stream would hold up the host until that stream is idle.
+    float* host_x = nullptr;              // T x N activations (mapped, portable)
+    float* host_rows = nullptr;           // the peer's result rows (mapped, portable)
+    int32_t* host_src = nullptr;          // the peer's rows' tokens (mapped, portable)
+    int32_t* host_bounds = nullptr;       // its group bounds (mapped, portable)
+    size_t host_x_cap = 0, host_rows_cap = 0, host_src_cap = 0;   // elements
+    static constexpr size_t kHostBounds = 2 * (NE + NE / 16 + 2) + 64;
+    int64_t back_at = 0, back_rows = 0;
     std::vector<int32_t> bounds_host;
     std::vector<void*> owned;
     int64_t layers = 0, experts = 0, rows = 0, over_cap = 0;   // stats
@@ -409,6 +425,10 @@ struct PeerPrefill {
         if (s) cudaStreamDestroy(s);
         cudaSetDevice(prev);
         if (ev_in) cudaEventDestroy(ev_in);
+        if (host_x) cudaFreeHost(host_x);
+        if (host_rows) cudaFreeHost(host_rows);
+        if (host_src) cudaFreeHost(host_src);
+        if (host_bounds) cudaFreeHost(host_bounds);
     }
 };
 
@@ -496,6 +516,9 @@ struct Prefill::Impl {
     int32_t* tok_dev = nullptr;
     std::vector<int32_t> tok_host;
     std::unique_ptr<PeerPrefill> pp;         // multi-GPU: the peer GPU's expert share (set_peer)
+    // layer split: the next stage's GPU as a stream-only peer (set_stage_helper); its buffers are that stage's own
+    // prompt buffers, bound per prompt, and it takes the place of `pp` for a run it helps
+    std::unique_ptr<PeerPrefill> help_pp;
 };
 
 namespace {
@@ -1051,6 +1074,137 @@ bool Prefill::draft_kv(core::MtpDrafter& mtp, const float* R_rows, const int32_t
                      (long long) B, ms_idle, ms_since(tl0), ms_since(t0));
     return true;
 }
+namespace {
+// Layer split: STRATA_PREFILL_HELP=1 lends the idle stage's GPU (opt-in: the helped rows are computed in another MMQ
+// grouping and round differently from the default, like STRATA_SPLIT_OWN). Unset or 0: every stage's prompt experts on
+// its own GPU, as before.
+bool split_help_env() {
+    static const bool v = [] { const char* e = std::getenv("STRATA_PREFILL_HELP"); return e != nullptr && std::atoi(e) != 0; }();
+    return v;
+}
+// The share of a stage's streamed experts the idle stage's GPU takes for a one-chunk prompt of T tokens (0: none).
+// The streamed bytes are the same at any T; the hand-over (the activations there, the rows back) grows with T and is
+// paid per layer whatever the share.  Measured on 2x RTX 3090 (UD-Q4_K_XL, PCIe 4.0 x16 each, no P2P), fixed shares
+// 0.2 / 0.3 / 0.4 against none: 1.5K tokens 749 / 820 / 908 (none 675), 3K 1335 / 1437 / 1328 (1262), 4K 1622 / 1620 /
+// 1440 (1609), 6K 1811 / 1660 / 1471 (2038), 8K 1895 / 1804 / 1663 (2230) - the best share falls with T and from ~4K
+// none pays, which this rule follows (0.41 at 1.5K, 0.32 at 3K, off from ~3.3K).
+// STRATA_PREFILL_HELP_FRAC sets the share for every T.
+double split_help_frac(int64_t T) {
+    static const double fixed = [] {
+        const char* e = std::getenv("STRATA_PREFILL_HELP_FRAC");
+        return e ? std::clamp(std::atof(e), 0.0, 1.0) : -1.0;
+    }();
+    if (fixed >= 0.0) return fixed;
+    const double f = std::min(0.45, 0.5 - (double) T / 16384.0);
+    return f >= 0.3 ? f : 0.0;
+}
+}  // namespace
+
+bool Prefill::set_stage_helper(Prefill* helper, std::string& err) {
+    Impl& m = *impl_;
+    m.help_pp.reset();
+    if (helper == nullptr || helper == this || !split_help_env()) return true;
+    const Impl& h = *helper->impl_;
+    if (m.device < 0 || h.device < 0 || h.device == m.device || !mmq_plan().any) return true;
+    auto pp = std::make_unique<PeerPrefill>();
+    pp->peer = nullptr;   // stream-only: it holds no experts, it streams a share of this stage's
+    pp->compact = true;
+    pp->p2p = false;      // the mapped host route, whether or not the cards could reach each other (measured there)
+    pp->out_pipe = true;
+    bool ok;
+    {
+        const core::OnDevice on(m.device);
+        ok = cudaEventCreateWithFlags(&pp->ev_in, cudaEventDisableTiming) == cudaSuccess;
+    }
+    int prev = 0;
+    cudaGetDevice(&prev);
+    pp->dev = h.device;
+    cudaSetDevice(pp->dev);
+    ok = ok && cudaStreamCreateWithFlags(&pp->s, cudaStreamNonBlocking) == cudaSuccess &&
+         cudaStreamCreateWithFlags(&pp->s_out, cudaStreamNonBlocking) == cudaSuccess &&
+         cudaStreamCreateWithFlags(&pp->s_cp, cudaStreamNonBlocking) == cudaSuccess &&
+         cudaEventCreateWithFlags(&pp->ev_done, cudaEventDisableTiming) == cudaSuccess;
+    for (int i = 0; ok && i < PeerPrefill::kGrpEv; ++i)
+        ok = cudaEventCreateWithFlags(&pp->ev_grp[i], cudaEventDisableTiming) == cudaSuccess;
+    for (int b = 0; ok && b < 2; ++b) ok = cudaEventCreateWithFlags(&pp->ev_dm[b], cudaEventDisableTiming) == cudaSuccess;
+    // the ring's events; its slots are the helper stage's own ring, bound per prompt (bind_stage_helper)
+    pp->pcopied.assign((size_t) kSplitHelpRing, nullptr);
+    pp->pused.assign((size_t) kSplitHelpRing, nullptr);
+    for (int i = 0; ok && i < kSplitHelpRing; ++i)
+        ok = cudaEventCreateWithFlags(&pp->pcopied[(size_t) i], cudaEventDisableTiming) == cudaSuccess &&
+             cudaEventCreateWithFlags(&pp->pused[(size_t) i], cudaEventDisableTiming) == cudaSuccess;
+    cudaSetDevice(prev);
+    if (!ok) { err = "prefill: the layer split's prompt help (streams and events)"; return false; }
+    helper_ = helper;
+    m.help_pp = std::move(pp);
+    return true;
+}
+
+// A one-chunk prompt of T tokens on a layer split: binds the stream-only peer to the helper stage's prompt buffers
+// (that stage idles until this one hands its rows over).  False when it cannot help this prompt.
+bool Prefill::bind_stage_helper(int64_t T) {
+    Impl& m = *impl_;
+    if (!m.help_pp || helper_ == nullptr || m.pp) return false;
+    const double frac = split_help_frac(T);
+    if (frac <= 0.0 || T < stream_all_min() || m.src == nullptr || m.ring <= STAGE || fused_ring()) return false;
+    const strata::kernels::cpu::ExpertLayout& lay = strata::kernels::cpu::expert_layout();
+    for (int64_t l = stage_lb_; l < stage_le_; ++l) {
+        if (!(mmq_plan().any && mmq_plan().layer[(size_t) l])) return false;   // the peer computes on MMQ only
+        if (lay.native && fused::native_supported(lay.fmt[(size_t) l].gu_type, lay.fmt[(size_t) l].d_type)) return false;
+    }
+    Impl& h = *helper_->impl_;
+    // the helper's buffers must be laid out for this chunk (the serve path lends every stage's at once)
+    if (h.T < T || h.mixed == nullptr || h.Xq == nullptr || h.Hq == nullptr || h.GU == nullptr || h.H == nullptr ||
+        h.Dm == nullptr || h.src_dev == nullptr || h.ids_identity == nullptr || h.bounds_dev == nullptr ||
+        h.grp_gu == nullptr || h.grp_d == nullptr || !h.mmq_ctx || h.ring <= STAGE)
+        return false;
+    PeerPrefill& P = *m.help_pp;
+    P.T_max = T;
+    P.cap_rows = T * K;
+    P.G = T;                                  // one expert never has more rows than the chunk has tokens
+    P.mixed = h.mixed;
+    P.Xq_g = h.Xq;                            // the helper's per-layer buffers hold T * K rows: a group's T fit
+    P.Hq_g = h.Hq;
+    P.GU_g = h.GU;
+    P.H_g = h.H;
+    P.Dm_b[0] = h.Dm;
+    P.Dm_b[1] = h.Dm + (size_t) T * N;
+    P.src = h.src_dev;
+    P.ident = h.ids_identity;
+    P.bounds = h.bounds_dev;
+    P.grp_gu = h.grp_gu;
+    P.grp_d = h.grp_d;
+    P.run_ctx = h.mmq_ctx.get();
+    P.RP = std::min(h.ring, kSplitHelpRing);
+    P.pstage.assign(h.stage_dev, h.stage_dev + P.RP);
+    P.plive.assign((size_t) P.RP, 0);
+    P.dm_live[0] = P.dm_live[1] = false;
+    P.out_pending = false;
+    P.ps_frac = frac;
+    if (!P.p2p) {   // grown once to the largest chunk it helped
+        auto grow = [](auto*& p, size_t& cap, size_t n) {
+            if (cap >= n) return true;
+            if (p) cudaFreeHost(p);
+            p = nullptr;
+            cap = 0;
+            if (cudaHostAlloc((void**) &p, n * sizeof(*p), cudaHostAllocPortable | cudaHostAllocMapped) != cudaSuccess) {
+                cudaGetLastError();
+                p = nullptr;
+                return false;
+            }
+            cap = n;
+            return true;
+        };
+        size_t bounds_cap = P.host_bounds ? PeerPrefill::kHostBounds : 0;
+        if (!grow(P.host_x, P.host_x_cap, (size_t) T * N) || !grow(P.host_rows, P.host_rows_cap, (size_t) T * K * N) ||
+            !grow(P.host_src, P.host_src_cap, (size_t) T * K) || !grow(P.host_bounds, bounds_cap, PeerPrefill::kHostBounds))
+            return false;
+    }
+    const core::OnDevice on(P.dev);
+    mmq::iota(P.ident, T * K, P.s);           // the helper's row table: a refill may have overwritten its slots
+    return true;
+}
+
 bool Prefill::set_peer(core::PeerExperts* peer, int64_t cap_rows, std::string& err) {
     Impl& m = *impl_;
     if (peer == nullptr || !peer->valid()) { m.pp.reset(); return true; }
@@ -1133,6 +1287,7 @@ bool Prefill::set_peer(core::PeerExperts* peer, int64_t cap_rows, std::string& e
     pp->grp_d = (uint8_t*) take(MMQ_GROUP * mp.d_max + MMQ_TAIL);
     if (ok) {
         pp->ctx = std::make_unique<mmq::Context>();
+        pp->run_ctx = pp->ctx.get();
         mmq::iota(pp->ident, pp->cap_rows, pp->s);
         ok = cudaStreamSynchronize(pp->s) == cudaSuccess;
     }
@@ -1318,6 +1473,24 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
     const uint64_t gdn_floats = (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size +
                                 (uint64_t) g.ssm_conv_channels * (g.ssm_d_conv - 1);
     int32_t prev[2] = {ss.ple_prev[0], ss.ple_prev[1]};
+    // layer split: a prompt of one chunk runs the stages one after the other, so the next stage's GPU idles while
+    // this one reads; it streams and computes a share of this stage's experts then (set_stage_helper), in the
+    // place of a --peer-device peer, and gives the stage back its own buffers when the run ends
+    const bool single_chunk = hand_in_ == nullptr ? n <= m.T : single_chunk_;
+    const bool helped = single_chunk && bind_stage_helper(n);
+    if (helped) std::swap(m.pp, m.help_pp);
+    struct HelpScope {
+        Impl& m;
+        bool on;
+        ~HelpScope() {
+            if (!on) return;
+            const core::OnDevice d(m.pp->dev);   // its work is done before the stage hands over; settle its streams
+            cudaStreamSynchronize(m.pp->s_cp);
+            cudaStreamSynchronize(m.pp->s_out);
+            cudaStreamSynchronize(m.pp->s);
+            std::swap(m.pp, m.help_pp);
+        }
+    } help_scope{m, helped};
     PfTimer pt;
     PeTimer pe;
     if (m.pp) pe.dev = m.pp->dev; else pe.on = false;
@@ -1512,7 +1685,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                 if (ps_on) m.pp->pseq_start[(size_t) l] = m.pp->pseq.size();
                 for (int32_t e = 0; e < m.g->n_expert; ++e) {
                     if (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) continue;
-                    if (m.pp && m.pp->peer->has(l, e)) continue;   // multi-GPU: computed on (or read from) the peer
+                    if (m.pp && m.pp->peer && m.pp->peer->has(l, e)) continue;   // multi-GPU: computed on (or read from) the peer
                     int job = -1;
                     const uint8_t* b = nullptr;
                     if (m.src->transient(l, e)) {   // CS-T: copied by the source into the stager's buffer
@@ -2109,7 +2282,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     continue;
                                 }
                                 if (c == 0 || (m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0) ||
-                                    !m.pp->peer->has(l, e))
+                                    !m.pp->peer || !m.pp->peer->has(l, e))
                                     continue;
                                 if (rows_peer + c > m.pp->cap_rows) { ++m.pp->over_cap; continue; }
                                 on_peer[(size_t) e] = 1;
@@ -2180,6 +2353,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                         peer_now = use_mmq && !order_peer.empty();
                         if (peer_now) {
                             PeerPrefill& P = *m.pp;
+                            if (!P.p2p) cudaMemcpyAsync(P.host_x, m.mixed, (size_t) T * N * 4, cudaMemcpyDeviceToHost, m.cs);
                             cudaEventRecord(P.ev_in, m.cs);
                             int prevd = 0;
                             cudaGetDevice(&prevd);
@@ -2188,9 +2362,17 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                             cudaStreamWaitEvent(ps, P.ev_in, 0);
                             if (P.out_pending) { cudaStreamWaitEvent(ps, P.ev_done, 0); P.out_pending = false; }
                             pe.mark(kPeMoeIn, ps);
-                            cudaMemcpyPeerAsync(P.mixed, P.dev, m.mixed, prevd, (size_t) T * N * 4, ps);
-                            cudaMemcpyAsync(P.src, src_h + rows_local,   // multi-GPU: the mapped table when on
-                                             (size_t) rows_peer * 4, cudaMemcpyHostToDevice, ps);
+                            if (P.p2p) cudaMemcpyPeerAsync(P.mixed, P.dev, m.mixed, prevd, (size_t) T * N * 4, ps);
+                            else copy_f32_wide(P.mixed, P.host_x, T * N, ps);
+                            P.back_at = rows_local;
+                            P.back_rows = rows_peer;
+                            if (P.p2p) {
+                                cudaMemcpyAsync(P.src, src_h + rows_local,   // multi-GPU: the mapped table when on
+                                                (size_t) rows_peer * 4, cudaMemcpyHostToDevice, ps);
+                            } else {
+                                std::memcpy(P.host_src, src_h + rows_local, (size_t) rows_peer * 4);
+                                copy_i32(P.src, P.host_src, rows_peer, ps);
+                            }
                             const size_t n = order_peer.size();
                             if (P.compact) {
                                 // groups of up to MMQ_GROUP experts and at most G rows, each computed from its own rows
@@ -2214,7 +2396,12 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                         P.bounds_host[n + 1 + g2 * (MMQ_GROUP + 1) + i] =
                                             P.bounds_host[std::min(P.groups[g2].second, P.groups[g2].first + i)] -
                                             P.bounds_host[P.groups[g2].first];
-                                cudaMemcpyAsync(P.bounds, P.bounds_host.data(), P.bounds_host.size() * 4, cudaMemcpyHostToDevice, ps);
+                                if (P.p2p || P.bounds_host.size() > PeerPrefill::kHostBounds) {
+                                    cudaMemcpyAsync(P.bounds, P.bounds_host.data(), P.bounds_host.size() * 4, cudaMemcpyHostToDevice, ps);
+                                } else {
+                                    std::memcpy(P.host_bounds, P.bounds_host.data(), P.bounds_host.size() * 4);
+                                    copy_i32(P.bounds, P.host_bounds, (int64_t) P.bounds_host.size(), ps);
+                                }
                                 pe.mark(kPeMoeGemm, ps);
                                 const auto& f = lay.fmt[(size_t) l];
                                 for (size_t g2 = 0; g2 < ng; ++g2) {
@@ -2262,7 +2449,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     gu.w = P.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
                                     gu.n = ngx; gu.xq = P.Xq_g; gu.bounds = rel; gu.ids = P.ident;
                                     gu.total_rows = nr; gu.max_rows = maxr; gu.dst = P.GU_g; gu.ld_dst = 1280;
-                                    P.ctx->run(gu, ps);
+                                    P.run_ctx->run(gu, ps);
                                     mmq::swiglu(P.GU_g, P.H_g, nr, 640, !lay.native, ps);
                                     mmq::quantize(P.H_g, nullptr, P.Hq_g, mmq_dt, 640, 640, nr, ps);
                                     const int b = (int) (g2 & 1);
@@ -2272,11 +2459,15 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     dn.n = ngx; dn.xq = P.Hq_g; dn.bounds = rel;
                                     dn.ids = P.ident; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = P.Dm_b[b];
                                     dn.ld_dst = N;
-                                    P.ctx->run(dn, ps);
+                                    P.run_ctx->run(dn, ps);
                                     cudaEventRecord(P.ev_grp[g2 % PeerPrefill::kGrpEv], ps);
                                     cudaStreamWaitEvent(P.s_out, P.ev_grp[g2 % PeerPrefill::kGrpEv], 0);
-                                    cudaMemcpyPeerAsync(m.Dm + (size_t) (rows_local + r0) * N, prevd, P.Dm_b[b], P.dev,
-                                                        (size_t) nr * N * 4, P.s_out);
+                                    if (P.p2p)
+                                        cudaMemcpyPeerAsync(m.Dm + (size_t) (rows_local + r0) * N, prevd, P.Dm_b[b], P.dev,
+                                                            (size_t) nr * N * 4, P.s_out);
+                                    else   // the primary reads them when it combines (below)
+                                        cudaMemcpyAsync(P.host_rows + (size_t) r0 * N, P.Dm_b[b], (size_t) nr * N * 4,
+                                                        cudaMemcpyDeviceToHost, P.s_out);
                                     cudaEventRecord(P.ev_dm[b], P.s_out);
                                     P.dm_live[b] = true;
                                 }
@@ -2289,7 +2480,12 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     for (size_t i = 0; i <= MMQ_GROUP; ++i)
                                         P.bounds_host[n + 1 + g2 * (MMQ_GROUP + 1) + i] =
                                             P.bounds_host[std::min(n, g2 * MMQ_GROUP + i)] - P.bounds_host[g2 * MMQ_GROUP];
-                                cudaMemcpyAsync(P.bounds, P.bounds_host.data(), P.bounds_host.size() * 4, cudaMemcpyHostToDevice, ps);
+                                if (P.p2p || P.bounds_host.size() > PeerPrefill::kHostBounds) {
+                                    cudaMemcpyAsync(P.bounds, P.bounds_host.data(), P.bounds_host.size() * 4, cudaMemcpyHostToDevice, ps);
+                                } else {
+                                    std::memcpy(P.host_bounds, P.bounds_host.data(), P.bounds_host.size() * 4);
+                                    copy_i32(P.bounds, P.host_bounds, (int64_t) P.bounds_host.size(), ps);
+                                }
                                 mmq::quantize(P.mixed, P.src, P.Xq, mmq_gt, N, N, rows_peer, ps);
                                 pe.mark(kPeMoeGemm, ps);
                                 const auto& f = lay.fmt[(size_t) l];
@@ -2314,7 +2510,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     gu.w = P.grp_gu; gu.type = mmq_gt; gu.w_rows = 1280; gu.w_cols = N; gu.expert_bytes = mmq_gub;
                                     gu.n = ngx; gu.xq = P.Xq; gu.bounds = P.bounds + j0; gu.ids = P.ident;
                                     gu.total_rows = rows_peer; gu.max_rows = maxr; gu.dst = P.GU; gu.ld_dst = 1280;
-                                    P.ctx->run(gu, ps);
+                                    P.run_ctx->run(gu, ps);
                                     mmq::swiglu(P.GU + r0 * 1280, P.H + r0 * 640, nr, 640, !lay.native, ps);
                                     mmq::quantize(P.H + r0 * 640, nullptr, P.Hq, mmq_dt, 640, 640, nr, ps);
                                     mmq::Product dn;
@@ -2322,7 +2518,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                     dn.n = ngx; dn.xq = P.Hq; dn.bounds = P.bounds + n + 1 + g2 * (MMQ_GROUP + 1);
                                     dn.ids = P.ident; dn.total_rows = nr; dn.max_rows = maxr; dn.dst = P.Dm + r0 * N;
                                     dn.ld_dst = N;
-                                    P.ctx->run(dn, ps);
+                                    P.run_ctx->run(dn, ps);
                                     if (P.out_pipe && nr > 0) {   // this group's rows go back while the next group computes
                                         cudaEventRecord(P.ev_grp[g2], ps);
                                         cudaStreamWaitEvent(P.s_out, P.ev_grp[g2], 0);
@@ -2562,7 +2758,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                                 } else {
                                     const bool r0 = m.host_res && m.cache && m.host_res[(size_t) l * m.g->n_expert + e] >= 0;
                                     const uint8_t* bp = r0 ? m.cache->device_slot(m.host_res[(size_t) l * m.g->n_expert + e])
-                                                           : (m.pp ? m.pp->peer->slot_ptr(l, e) : nullptr);   // over the cap: P2P
+                                                           : (m.pp && m.pp->peer ? m.pp->peer->slot_ptr(l, e) : nullptr);   // over the cap: P2P
                                     if (bp == nullptr) { err = "prefill: an expert is neither resident, streamed nor on the peer"; return false; }
                                     ++stats_.experts_resident;
                                     if (!compute(j, bp, -1)) return false;
@@ -2573,7 +2769,11 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
                         }
                     }
                     pt.mark(kPfCombine, cs);
-                    if (peer_now) cudaStreamWaitEvent(m.cs, m.pp->ev_done, 0);   // multi-GPU: the peer's rows are in Dm
+                    if (peer_now) {   // multi-GPU: the peer's rows are in Dm (or, without P2P, in host memory)
+                        cudaStreamWaitEvent(m.cs, m.pp->ev_done, 0);
+                        if (!m.pp->p2p)
+                            copy_f32_wide(m.Dm + (size_t) m.pp->back_at * N, m.pp->host_rows, m.pp->back_rows * N, m.cs);
+                    }
                     moe_combine(m.Dm, m.slot_dev, m.w, m.shared, m.sg, m.bo, T, m.cs);
                     // debug: STRATA_DBG_NAN=1 reports the first layer of a chunk whose MoE produced non-finite values
                     if (static const bool dbg = std::getenv("STRATA_DBG_NAN") != nullptr; dbg) {
@@ -2646,6 +2846,7 @@ bool Prefill::run_impl(const int64_t* tokens, int64_t n, int64_t pos0, std::stri
             if (next_run_.valid() && !next_run_.get()) { err = next_err_; return false; }
             next_err_.clear();
             next_->hand_in_ = h;
+            next_->single_chunk_ = single_chunk;
             next_run_ = std::async(std::launch::async, [this, tokens, c0, T, p0] {
                 return next_->run_impl(tokens + c0, T, p0, next_err_);
             });
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index f2f34504ef7..1815b68e503 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4714,6 +4714,19 @@ int main(int argc, char** argv) {
                 err.clear();
             }
         }
+        // a layer split: a one-chunk prompt runs the stages one after the other, so each stage's prompt path gets the
+        // next stage's GPU (the last one the first's) to stream and compute a share of its experts meanwhile
+        if (multi_gpu && !stages.empty()) {
+            std::vector<std::pair<strata::prefill::Prefill*, int>> paths{{&sp, 0}};
+            for (const auto& st : stages) paths.emplace_back(&st->sp, st->dev);
+            for (size_t i = 0; i < paths.size(); ++i) {
+                const strata::core::OnDevice on(paths[i].second);
+                if (!paths[i].first->set_stage_helper(paths[(i + 1) % paths.size()].first, err)) {
+                    std::fprintf(stderr, "strata serve: %s - stage %zu reads its prompts alone\n", err.c_str(), i);
+                    err.clear();
+                }
+            }
+        }
         mem_mark("the head and the prompt path");
         // #340: STRATA_SPLIT_SMALL_OWN=S (tokens): on a layer split, every stage that borrows keeps the slots for an
         // S-token chunk's buffers for the whole session (0.1.29's own buffers, carved from the tail of its cache):

From 6d51272a26a11280e06da2cb542bb51bf596ec73 Mon Sep 17 00:00:00 2001
From: Anon <anon@users.noreply.github.com>
Date: Sat, 3 Oct 2026 13:27:55 +0000
Subject: [PATCH 159/201] pinned: back the Linux expert arena with transparent
 huge pages

Without a hugetlb pool the Linux arena fell back to a plain anonymous
mapping with 4 KB pages. The CPU expert pool streams whole experts (about
3 MB each for the 4-5 bit GGUFs) out of that arena, so every expert costs
~750 TLB misses.

Map the fallback 2 MiB-aligned and madvise(MADV_HUGEPAGE), so THP in
"madvise" mode (the common distro default) backs it. STRATA_NO_LARGEPAGES=1
keeps 4 KB pages, as on the hugetlb path; the log note says which one it got.
---
 src/core/pinned.cu | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/src/core/pinned.cu b/src/core/pinned.cu
index 780d93fb7ae..0927c6b1b7a 100644
--- a/src/core/pinned.cu
+++ b/src/core/pinned.cu
@@ -224,9 +224,27 @@ void* reserve(uint64_t bytes, PageBacking& got, std::string& note, const std::st
         note = "MAP_HUGETLB unavailable (needed " + std::to_string(need) + " 2 MiB pages, vm.nr_hugepages=" +
                (have_pool ? std::to_string(pool) : std::string("?")) + "); using 4 KB pages";
     }
-    void* p = mmap(nullptr, bytes, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+    // No hugetlb mapping: a 2 MiB-aligned anonymous mapping with MADV_HUGEPAGE, so transparent huge pages back
+    // it where THP is "madvise" (the common distro default). The CPU expert pool streams whole experts out of
+    // this arena; with 4 KB pages every 3 MB expert costs ~750 TLB misses.
+    constexpr uint64_t kAlign = 2ull << 20;
+    const uint64_t padded = bytes + kAlign;
+    void* raw = mmap(nullptr, padded, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
     got = PageBacking::NormalPages;
-    return p == MAP_FAILED ? nullptr : p;
+    if (raw == MAP_FAILED) return nullptr;
+    const uintptr_t start = (uintptr_t) raw;
+    const uintptr_t aligned = (start + kAlign - 1) & ~(uintptr_t) (kAlign - 1);
+    if (aligned > start) munmap(raw, aligned - start);
+    const uintptr_t end = aligned + bytes, raw_end = start + padded;
+    if (raw_end > end) munmap((void*) end, raw_end - end);
+    void* p = (void*) aligned;
+    if (std::getenv("STRATA_NO_LARGEPAGES") == nullptr && madvise(p, bytes, MADV_HUGEPAGE) == 0) {
+        const std::string four_k = "; using 4 KB pages";
+        if (note.size() >= four_k.size() && note.compare(note.size() - four_k.size(), four_k.size(), four_k) == 0)
+            note.resize(note.size() - four_k.size());
+        note += "; transparent huge pages requested (MADV_HUGEPAGE)";
+    }
+    return p;
 #endif
 }
 

From dd24a55722f1edf5ff1d65dc15fc2ee3d9cfbf08 Mon Sep 17 00:00:00 2001
From: Yannick Loth <727881+yannickloth@users.noreply.github.com>
Date: Sat, 3 Oct 2026 14:25:44 +0200
Subject: [PATCH 160/201] iq: gather the AVX2 codebook from the grid table
 (STRATA_IQ256_GATHER)

The two IQ3 gate/up formats decode each 32-value half with eight scalar loads
assembled by _mm256_set_epi32.  A scratch build that substitutes a constant for
the grid vector shows that assembly is ~half the single-core kernel (IQ3_XXS
248 -> 130 us, IQ3_S 357 -> 140 us), and the two formats are ~58% of the
gate/up lookup work on the Swift 1.5 IQ3_XXS pack.

Add an opt-in AVX2 gather for IQ3_XXS (iq3xxs_grid) and IQ3_S (iq3s_grid),
the mirror of the AVX-512 kernels' STRATA_IQ_GATHER.  On the i7-12850HX
(Alder Lake, no AVX-512) it is bit-identical - a direct scalar-vs-gather output
dump matches for all five gate/up formats, native_expert_parity stays green -
and 1.32-1.34x on the two formats isolated, +1.0% serve end to end (on >= off in
5 of 5 interleaved pairs).  The pool is flat in the deterministic --stats (the
15-worker pool is not decode-bound), so it is a per-core win that compounds.

Default off, like the AVX-512 one: AVX2 gather throughput is microarchitecture-
dependent.  IQ2_XXS / IQ2_XS / IQ2_S use 64-bit grids, where an AVX2 i64 gather
measured a wash, and are unchanged.  The AVX-512 path is untouched.
---
 src/kernels/cpu/iq_avx2.cpp | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/src/kernels/cpu/iq_avx2.cpp b/src/kernels/cpu/iq_avx2.cpp
index 09d178db6b7..4440457601e 100644
--- a/src/kernels/cpu/iq_avx2.cpp
+++ b/src/kernels/cpu/iq_avx2.cpp
@@ -95,6 +95,11 @@ inline void rows_ahead(const uint8_t* p) {
     _mm_prefetch((const char*) p + 64, _MM_HINT_T0);
 }
 
+// E-2 on the AVX-2 path (the AVX-512 kernels' STRATA_IQ_GATHER): the IQ3 grids by one AVX2 gather instead of eight
+// scalar loads assembled with set_epi32.  AVX2 gather is a different instruction with worse throughput on some cores
+// (opt-in, as on AVX-512); on the i7-12850HX it measures ~1.3x on the two 32-bit-grid formats, bit-exact.
+static const bool gather = std::getenv("STRATA_IQ256_GATHER") != nullptr;
+
 // ---- per format: one 32-value half (values 64*j + 32*half .. +31) -> grid magnitudes, sign vector, scales
 template <int TY> struct Fmt32;
 
@@ -152,8 +157,13 @@ template <> struct Fmt32<18> {   // IQ3_XXS: d, qs[64] grid bytes, 8 x u32 (4 x
     static constexpr float K = 0.25f;
     static inline void decode(const uint8_t* b, int j, int half, __m256i& g, __m256i& sgn, __m256i& sc) {
         const uint8_t* q = b + 2 + 16 * j + 8 * half;
-        g = _mm256_set_epi32((int) iq3xxs_grid[q[7]], (int) iq3xxs_grid[q[6]], (int) iq3xxs_grid[q[5]], (int) iq3xxs_grid[q[4]],
-                             (int) iq3xxs_grid[q[3]], (int) iq3xxs_grid[q[2]], (int) iq3xxs_grid[q[1]], (int) iq3xxs_grid[q[0]]);
+        if (gather) {
+            const __m256i idx = _mm256_cvtepu8_epi32(_mm_loadl_epi64((const __m128i*) q));
+            g = _mm256_i32gather_epi32((const int*) iq3xxs_grid, idx, 4);
+        } else {
+            g = _mm256_set_epi32((int) iq3xxs_grid[q[7]], (int) iq3xxs_grid[q[6]], (int) iq3xxs_grid[q[5]], (int) iq3xxs_grid[q[4]],
+                                 (int) iq3xxs_grid[q[3]], (int) iq3xxs_grid[q[2]], (int) iq3xxs_grid[q[1]], (int) iq3xxs_grid[q[0]]);
+        }
         const uint32_t w = u32(b + 2 + 64 + 8 * j + 4 * half);
         sgn = _mm256_set_epi64x((long long) even_signs.v[(w >> 21) & 127], (long long) even_signs.v[(w >> 14) & 127],
                                 (long long) even_signs.v[(w >> 7) & 127], (long long) even_signs.v[w & 127]);
@@ -167,9 +177,17 @@ template <> struct Fmt32<21> {   // IQ3_S: d, qs[64], qh[8], signs[32], scales[4
     static inline void decode(const uint8_t* b, int j, int half, __m256i& g, __m256i& sgn, __m256i& sc) {
         const uint8_t* q = b + 2 + 16 * j + 8 * half;
         const uint32_t h = b[66 + 2 * j + half];
+        if (gather) {
+            const __m256i bits = _mm256_setr_epi32(0, 1, 2, 3, 4, 5, 6, 7);
+            __m256i idx = _mm256_cvtepu8_epi32(_mm_loadl_epi64((const __m128i*) q));
+            idx = _mm256_add_epi32(idx, _mm256_slli_epi32(
+                _mm256_and_si256(_mm256_srlv_epi32(_mm256_set1_epi32((int) h), bits), _mm256_set1_epi32(1)), 8));
+            g = _mm256_i32gather_epi32((const int*) iq3s_grid, idx, 4);
+        } else {
 #define G3(k) (int) iq3s_grid[q[k] | (((h >> k) & 1u) << 8)]
-        g = _mm256_set_epi32(G3(7), G3(6), G3(5), G3(4), G3(3), G3(2), G3(1), G3(0));
+            g = _mm256_set_epi32(G3(7), G3(6), G3(5), G3(4), G3(3), G3(2), G3(1), G3(0));
 #undef G3
+        }
         const uint64_t m = u64(b + 74 + 8 * j);
         sgn = sgn_vec(half ? (uint32_t) (m >> 32) : (uint32_t) m);
         const uint8_t s = b[106 + j];

From 3a64d02a5eff0301599d9501f24c6ecfbed9512a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:34:41 +0200
Subject: [PATCH 161/201] iq_avx2: STRATA_IQ256_GATHER=0 keeps the scalar grid
 assembly (parse the value)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/kernels/cpu/iq_avx2.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/kernels/cpu/iq_avx2.cpp b/src/kernels/cpu/iq_avx2.cpp
index 4440457601e..29a943f0ca8 100644
--- a/src/kernels/cpu/iq_avx2.cpp
+++ b/src/kernels/cpu/iq_avx2.cpp
@@ -98,7 +98,7 @@ inline void rows_ahead(const uint8_t* p) {
 // E-2 on the AVX-2 path (the AVX-512 kernels' STRATA_IQ_GATHER): the IQ3 grids by one AVX2 gather instead of eight
 // scalar loads assembled with set_epi32.  AVX2 gather is a different instruction with worse throughput on some cores
 // (opt-in, as on AVX-512); on the i7-12850HX it measures ~1.3x on the two 32-bit-grid formats, bit-exact.
-static const bool gather = std::getenv("STRATA_IQ256_GATHER") != nullptr;
+static const bool gather = [] { const char* v = std::getenv("STRATA_IQ256_GATHER"); return v != nullptr && std::atoi(v) != 0; }();
 
 // ---- per format: one 32-value half (values 64*j + 32*half .. +31) -> grid magnitudes, sign vector, scales
 template <int TY> struct Fmt32;

From 1f57034e24e0e4faf69255fbf41d03a9eae6a1ab Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:35:52 +0200
Subject: [PATCH 162/201] older CPUs (experimental): STRATA_ISA_FLOOR=avx|none,
 and setup compiles it instead of stopping (#394 #595 #623)

- CMake: STRATA_ISA_FLOOR (empty by default) builds ggml-cpu for AVX (Sandy/Ivy Bridge) or SSE4.2
  (Nehalem/Westmere) instead of the build host or AVX2; every other ggml ISA option off. Strata's own
  AVX2/AVX-512 kernels stay in the binary behind their CPU checks. Excludes STRATA_PORTABLE. The ggml
  block follows the Strata_Dirigo fork's (rwkeyes).
- STRATA_FORCE_ISA=avx2|avx|sse caps the engine's CPU probes, so the older-CPU paths run on any PC
  (how this was tested here: no old CPU). cpu_sse42_ok(), isa_floor_build().
- The engine: a normal build still refuses a CPU without AVX2, now pointing at the experimental build;
  a floor build checks its own floor (AVX, or SSE4.2 + POPCNT) and warns that it is experimental and
  slow (or, on an AVX2 CPU, that the normal build is faster).
- setup: a CPU without AVX2 warns ("experimental, slow") and compiles the engine on the PC with the
  floor it has, instead of failing (#595's idea); the prebuilt AVX2 engine is not used there. Recorded
  in BUILD.json; a build folder for another floor is configured afresh. STRATA_ISA_FLOOR=avx|none asks
  for it on any PC. Windows + AMD has no source build: a clear stop. The MCP server's recommendation
  notes it instead of refusing.
- tools/test_setup_oldcpu.py.

Default build: nothing changes (no new CMake definitions, the probes answer as before without the env).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                               | 33 +++++++
 include/strata/kernels/cpu/expert_layout.hpp | 10 ++-
 setup.py                                     | 83 +++++++++++++++--
 src/kernels/cpu/expert_layout.cpp            | 44 +++++++++
 src/program/generate.cpp                     | 30 ++++++-
 tools/strata_mcp.py                          |  5 +-
 tools/test_setup_oldcpu.py                   | 95 ++++++++++++++++++++
 7 files changed, 286 insertions(+), 14 deletions(-)
 create mode 100644 tools/test_setup_oldcpu.py

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 5b56e2b917c..1b41705966e 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -21,6 +21,18 @@ endif()
 # instead of this machine's (Strata's own AVX-512 kernels are per-file and chosen at run time either way), and
 # the MSVC runtime linked in, so no Visual C++ redistributable is needed.
 option(STRATA_PORTABLE "build for other PCs: AVX2 baseline, static MSVC runtime" OFF)
+# EXPERIMENTAL, opt-in: an engine for CPUs without AVX2 (#394, #595, #623), compiled on that PC.  ggml-cpu, which then
+# computes every CPU expert row, is built for this floor instead of AVX2 or the build host: "avx" (Sandy/Ivy Bridge:
+# AVX, no FMA/F16C/AVX2) or "none" (SSE4.2 + POPCNT: Nehalem/Westmere).  Strata's own AVX2/AVX-512 kernels stay in the
+# binary behind their CPU checks; the router lookahead gets an AVX1 kernel.  Empty (the default) changes nothing.
+set(STRATA_ISA_FLOOR "" CACHE STRING "experimental older-CPU build: empty (default, AVX2 floor), avx, or none (SSE4.2)")
+set_property(CACHE STRATA_ISA_FLOOR PROPERTY STRINGS "" avx none)
+if(NOT STRATA_ISA_FLOOR STREQUAL "" AND NOT STRATA_ISA_FLOOR STREQUAL "avx" AND NOT STRATA_ISA_FLOOR STREQUAL "none")
+  message(FATAL_ERROR "STRATA_ISA_FLOOR must be empty, avx or none (got '${STRATA_ISA_FLOOR}')")
+endif()
+if(STRATA_ISA_FLOOR AND STRATA_PORTABLE)
+  message(FATAL_ERROR "STRATA_ISA_FLOOR (an older-CPU build) and STRATA_PORTABLE (the AVX2 release build) exclude each other")
+endif()
 if(STRATA_PORTABLE AND MSVC)
   set(CMAKE_MSVC_RUNTIME_LIBRARY "MultiThreaded")
 endif()
@@ -868,6 +880,22 @@ if(STRATA_NATIVE_EXPERTS)
     foreach(_f GGML_AVX GGML_AVX2 GGML_FMA GGML_F16C GGML_BMI2)
       set(${_f} ON CACHE BOOL "" FORCE)
     endforeach()
+  elseif(STRATA_ISA_FLOOR)
+    # the experimental older-CPU build (STRATA_ISA_FLOOR above): one ggml-cpu for the floor, ggml's "sandybridge"
+    # feature set (SSE4.2 + AVX) or SSE4.2 alone - not the build host's, which may be newer than the PC it runs on.
+    # From the Strata_Dirigo fork (rwkeyes).  ggml's defaults turn the rest on when GGML_NATIVE is off: all off here.
+    set(GGML_NATIVE OFF CACHE BOOL "" FORCE)
+    set(GGML_CPU_ALL_VARIANTS OFF CACHE BOOL "" FORCE)
+    set(GGML_SSE42 ON CACHE BOOL "" FORCE)
+    if(STRATA_ISA_FLOOR STREQUAL "avx")
+      set(GGML_AVX ON CACHE BOOL "" FORCE)
+    else()
+      set(GGML_AVX OFF CACHE BOOL "" FORCE)
+    endif()
+    foreach(_f GGML_AVX2 GGML_FMA GGML_F16C GGML_BMI2 GGML_AVX_VNNI GGML_AVX512 GGML_AVX512_VBMI GGML_AVX512_VNNI
+               GGML_AVX512_BF16 GGML_AMX_TILE GGML_AMX_INT8 GGML_AMX_BF16)
+      set(${_f} OFF CACHE BOOL "" FORCE)
+    endforeach()
   else()
     set(GGML_NATIVE ON CACHE BOOL "" FORCE)
   endif()
@@ -904,6 +932,11 @@ if(STRATA_NATIVE_EXPERTS)
     set_source_files_properties(src/kernels/cpu/kq_avx2.cpp PROPERTIES COMPILE_OPTIONS "-mavx2;-mfma;-mf16c")
     set_source_files_properties(src/kernels/cpu/kq_avx1.cpp PROPERTIES COMPILE_OPTIONS "-mavx")
   endif()
+  if(STRATA_ISA_FLOOR STREQUAL "avx")
+    target_compile_definitions(strata_kernels_cpu PRIVATE STRATA_ISA_FLOOR_AVX=1)
+  elseif(STRATA_ISA_FLOOR STREQUAL "none")
+    target_compile_definitions(strata_kernels_cpu PRIVATE STRATA_ISA_FLOOR_NONE=1)
+  endif()
   target_link_libraries(strata_kernels_cpu PUBLIC ggml-cpu ggml-base)
   target_compile_definitions(strata_kernels_cpu PUBLIC STRATA_NATIVE_EXPERTS=1)
   set(_strata_mmq_types q2_0 iq2_xxs iq2_xs iq2_s iq3_xxs iq3_s iq4_nl iq4_xs q8_0)
diff --git a/include/strata/kernels/cpu/expert_layout.hpp b/include/strata/kernels/cpu/expert_layout.hpp
index 990ec078500..dae2255df70 100644
--- a/include/strata/kernels/cpu/expert_layout.hpp
+++ b/include/strata/kernels/cpu/expert_layout.hpp
@@ -47,8 +47,16 @@ bool cpu_avx512_ok();
 /// Whether this CPU (and its OS) runs the AVX2 kernels (AVX, AVX2, FMA, F16C): the floor of every expert kernel
 /// (q2_avx2.cpp, iq_avx2.cpp, and ggml-cpu in the portable build).  STRATA_FORCE_AVX2 does not change it.
 bool cpu_avx2_ok();
-/// Whether this CPU (and its OS) runs AVX (Sandy Bridge and newer): the AVX1 router dot (kq_avx1.cpp).
+/// Whether this CPU (and its OS) runs AVX (Sandy Bridge and newer): the AVX1 router dot (kq_avx1.cpp) and ggml-cpu in
+/// a STRATA_ISA_FLOOR=avx build.  The other expert rows then run on ggml-cpu (experimental, slow).
 bool cpu_avx1_ok();
+/// SSE4.2 + POPCNT: ggml-cpu in a STRATA_ISA_FLOOR=none build.
+bool cpu_sse42_ok();
+/// STRATA_FORCE_ISA=avx2|avx|sse caps the probes above (3 = no cap, 2 = AVX2, 1 = AVX, 0 = SSE4.2), so the older-CPU
+/// paths run on any PC: tests and the experimental builds' checks.  ggml-cpu keeps what it was compiled for.
+int cpu_isa_cap();
+/// The experimental older-CPU build this engine is ("avx", "sse4.2"), or "" for the normal build (AVX2 floor).
+const char* isa_floor_build();
 /// Whether a native pack's layer of this ggml type runs on Strata's own Q2_0 kernels (AVX2 / AVX-512).  On a
 /// CPU without AVX2 (a native, non-portable build: ggml-cpu compiled for this CPU's SSE) a Q2_0 layer takes
 /// ggml-cpu's own Q2_0 vec_dot like every other native type: slower, but it runs.
diff --git a/setup.py b/setup.py
index f0d2a0d13b4..981cdfaf588 100644
--- a/setup.py
+++ b/setup.py
@@ -407,6 +407,48 @@ def cpu_info():
     return name, avx2, avx512
 
 
+def _cpuid_floor() -> str:
+    """Below AVX2 (Windows): "avx" when the CPU has AVX and the OS saves the YMM registers, "sse4.2" with SSE4.2 and
+    POPCNT, else ""."""
+    try:
+        regs = (ctypes.c_uint32 * 4)()
+        _run_stub(bytes([0x53, 0x49, 0x89, 0xC8, 0x89, 0xD0, 0x31, 0xC9, 0x0F, 0xA2,      # push rbx; r8=rcx; eax=edx; ecx=0; cpuid
+                         0x41, 0x89, 0x00, 0x41, 0x89, 0x58, 0x04, 0x41, 0x89, 0x48, 0x08,  # [r8]=eax, [r8+4]=ebx, [r8+8]=ecx
+                         0x41, 0x89, 0x50, 0x0C, 0x5B, 0xC3]),                             # [r8+12]=edx; pop rbx
+                  ctypes.addressof(regs), 1)
+        ecx1 = regs[2]
+        if (ecx1 >> 27) & 1 and (ecx1 >> 28) & 1:                     # OSXSAVE, AVX
+            xcr0 = (ctypes.c_uint32 * 2)()
+            _run_stub(bytes([0x49, 0x89, 0xC8, 0x31, 0xC9, 0x0F, 0x01, 0xD0,                    # r8=rcx; ecx=0; xgetbv
+                             0x41, 0x89, 0x00, 0x41, 0x89, 0x50, 0x04, 0xC3]), ctypes.addressof(xcr0))
+            if xcr0[0] & 6 == 6:
+                return "avx"
+        return "sse4.2" if (ecx1 >> 20) & 1 and (ecx1 >> 23) & 1 else ""
+    except Exception:
+        return ""
+
+
+def cpu_floor(avx2: bool) -> str:
+    """The experimental older-CPU build this PC needs (#394 #595 #623): "" with AVX2 (the normal engine), "avx" (Sandy /
+    Ivy Bridge, AMD Bulldozer), "none" (SSE4.2 + POPCNT: Nehalem, Westmere), or "unsupported".  STRATA_ISA_FLOOR=avx|
+    none asks for that build on any PC (testing it on a newer one)."""
+    forced = os.environ.get("STRATA_ISA_FLOOR", "").strip().lower()
+    if forced in ("avx", "none"):
+        return forced
+    if avx2:
+        return ""
+    if WIN:
+        f = _cpuid_floor()
+    else:
+        try:
+            txt = open("/proc/cpuinfo").read()
+            flags = set(re.search(r"^flags\s*:\s*(.*)$", txt, re.M).group(1).split())
+        except (OSError, AttributeError):
+            flags = set()
+        f = "avx" if "avx" in flags else "sse4.2" if {"sse4_2", "popcnt"} <= flags else ""
+    return {"avx": "avx", "sse4.2": "none"}.get(f, "unsupported")
+
+
 def _cpuid_avx512_full() -> bool:
     """Windows has no feature bit for VNNI / VBMI: ask the CPU (CPUID leaf 7) through a tiny machine-code stub."""
     try:
@@ -1708,7 +1750,9 @@ def build_engine_hip(gpu, llama, vision="none") -> Path:
     src, vsrc = source_hash(ENGINE_SOURCES), source_hash(VISION_SOURCES)
     archs = sorted(set(gpu.get("archs") or [gpu["arch"]]))
     has_archs = set(archs) <= set(meta.get("archs", []))
-    engine_ok = meta.get("backend") == "hip" and (eng / EXE).exists() and meta.get("src") == src and has_archs
+    floor = cpu_floor(cpu_info()[1])                     # "" on an AVX2 CPU: the normal engine
+    engine_ok = meta.get("backend") == "hip" and (eng / EXE).exists() and meta.get("src") == src and has_archs and \
+        (meta.get("isa_floor") or "") == floor
     vision_ok = vision == "none" or ((eng / VEXE).exists() and meta.get("vision_src") == vsrc)
     if engine_ok and vision_ok:
         ok("engine already built for this PC")
@@ -1736,10 +1780,10 @@ def build_engine_hip(gpu, llama, vision="none") -> Path:
                  f"-DCMAKE_HIP_COMPILER={root / 'llvm' / 'bin' / 'clang++'}", f"-DCMAKE_HIP_COMPILER_ROCM_ROOT={root}",
                  "-DCMAKE_PREFIX_PATH=" + ";".join([str(root), *libs]),
                  f"-DCMAKE_HIP_FLAGS=--rocm-path={root} --rocm-device-lib-path={bitcode}",
-                 f"-DSTRATA_GGML_DIR={llama}"], None, "")
+                 f"-DSTRATA_GGML_DIR={llama}", *isa_floor_defs(floor, ROOT / "build-hip", meta)], None, "")
     shutil.copy2(ROOT / "build-hip" / EXE, eng / EXE)
     meta = {"source": "local-hip", "backend": "hip", "version": source_version(), "archs": archs, "vision": "none",
-            "lib_dirs": dirs, "src": src}
+            "lib_dirs": dirs, "src": src, **({"isa_floor": floor} if floor else {})}
     if vision != "none":
         return build_vision_cpu(eng, stamp, meta, llama, vsrc)
     stamp.write_text(json.dumps(meta, indent=1))
@@ -2064,6 +2108,14 @@ def source_hash(parts) -> str:
     return h.hexdigest()[:16]
 
 
+def isa_floor_defs(floor: str, bdir: Path, meta: dict) -> list:
+    """The experimental older-CPU build's CMake definition (STRATA_ISA_FLOOR, CMakeLists.txt), none for the normal
+    build.  A build folder configured for another floor is configured afresh: ggml's CPU options are cached there."""
+    if (meta.get("isa_floor") or "") != floor and (bdir / "CMakeCache.txt").exists():
+        (bdir / "CMakeCache.txt").unlink()
+    return [f"-DSTRATA_ISA_FLOOR={floor}"] if floor else []
+
+
 def engine_defs(archs) -> list:
     """Extra CMake definitions for the engine: the experimental Pascal/Volta build (#295) for cards below sm_75."""
     return ["-DSTRATA_EXPERIMENTAL_SM60=ON"] if min(int(x) for x in archs) < 75 else []
@@ -2098,7 +2150,9 @@ def build_engine(gpu, vision, yes, llama) -> Path:
     # a card the engine has no code for (a GPU added with --gpus, #128) needs a compile even when the source is the
     # same; the compile keeps the generations it was built for
     new_arch = local and not set(archs) <= built
-    engine_ok = local and (eng / EXE).exists() and meta.get("src") == src and not new_arch
+    floor = cpu_floor(cpu_info()[1])                     # "" on an AVX2 CPU: the normal engine
+    engine_ok = local and (eng / EXE).exists() and meta.get("src") == src and not new_arch and \
+        (meta.get("isa_floor") or "") == floor
     vision_ok = not want_vision or ((eng / VEXE).exists() and (not local or meta.get("vision_src") == vsrc))
     if engine_ok and vision_ok:
         ok("engine already built for this PC")
@@ -2114,7 +2168,8 @@ def build_engine(gpu, vision, yes, llama) -> Path:
             if local and (eng / EXE).exists() else "  Compiling the Strata engine for your GPU (10-20 minutes, once) ...")
         cmake_build(ROOT, ROOT / "build", "strata",
                     ["-DSTRATA_ENABLE_CUDA=ON", "-DSTRATA_BUILD_TESTS=OFF", f"-DCMAKE_CUDA_ARCHITECTURES={cuda_archs}",
-                     f"-DCMAKE_CUDA_COMPILER={nvcc}", f"-DSTRATA_GGML_DIR={llama}", *engine_defs(archs)],
+                     f"-DCMAKE_CUDA_COMPILER={nvcc}", f"-DSTRATA_GGML_DIR={llama}", *engine_defs(archs),
+                     *isa_floor_defs(floor, ROOT / "build", meta)],
                     vcvars, "build-strata.bat")
         shutil.copy2(ROOT / "build" / EXE, eng / EXE)
     if not vision_ok:
@@ -2128,7 +2183,8 @@ def build_engine(gpu, vision, yes, llama) -> Path:
     dirs = [str(d) for d in (bindir, bindir / "x64", bindir.parent / "lib64") if d.is_dir()]
     stamp.write_text(json.dumps({"source": "local", "version": source_version(), "archs": archs,
                                  "vision": vision,
-                                 "cuda_dirs": dirs, "src": src, "vision_src": vsrc if want_vision else None}, indent=1))
+                                 "cuda_dirs": dirs, "src": src, "vision_src": vsrc if want_vision else None,
+                                 **({"isa_floor": floor} if floor else {})}, indent=1))
     ok(f"engine compiled: {eng / EXE}")
     return eng
 
@@ -3466,8 +3522,21 @@ def main() -> int:
              "the model may not start or may use less VRAM. Set it to \"System managed\": System > About > "
              "Advanced system settings > Performance > Advanced > Virtual memory")
     ok(f"CPU: {cpu} ({'AVX-512' if avx512 else 'AVX2' if avx2 else 'no AVX2'})")
+    floor = cpu_floor(avx2)
+    if floor == "unsupported":
+        fail("this CPU has neither AVX2 nor SSE4.2; Strata needs at least SSE4.2 (Intel Nehalem, 2008, or newer)")
     if not avx2:
-        fail("this CPU has no AVX2; Strata needs at least AVX2")
+        # #394 #595 #623: the ready-made engine is AVX2; an older CPU gets one compiled here, whose CPU experts run on
+        # ggml-cpu's kernels for this CPU.  Experimental: measured only on newer CPUs with the older path forced, and by
+        # users on a few Xeons.  A warning, not a stop.
+        warn(f"this CPU has no AVX2: Strata support for it is EXPERIMENTAL and slow. Setup compiles the engine on this "
+             f"PC for {'AVX' if floor == 'avx' else 'SSE4.2'} (STRATA_ISA_FLOOR={floor}; 10-20 minutes, once), and the "
+             "CPU's share of the experts runs on ggml-cpu's kernels, a few times slower than on an AVX2 CPU. "
+             "See \"Older CPUs\" in docs/INSTALL.md")
+        if hip and WIN:
+            fail("the older-CPU engine is compiled from source, and setup compiles the AMD engine on Linux only",
+                 "use Linux for an AMD card on this CPU, or an NVIDIA card")
+        a.build = True
     if a.check:
         say()
         for m, d in MODELS.items():
diff --git a/src/kernels/cpu/expert_layout.cpp b/src/kernels/cpu/expert_layout.cpp
index 1eb585b7750..ddf232c517e 100644
--- a/src/kernels/cpu/expert_layout.cpp
+++ b/src/kernels/cpu/expert_layout.cpp
@@ -21,9 +21,26 @@ ExpertLayout g_layout;
 
 const ExpertLayout& expert_layout() { return g_layout; }
 
+int cpu_isa_cap() {
+    // STRATA_FORCE_ISA (tests, the experimental older-CPU builds): the engine's own dispatch acts as if this CPU
+    // stopped at that level.  ggml-cpu is not affected: it runs what the build compiled it for.
+    static const int cap = [] {
+        const char* f = std::getenv("STRATA_FORCE_ISA");
+        if (f == nullptr || f[0] == '\0') return 3;
+        const std::string v(f);
+        if (v == "avx2") return 2;
+        if (v == "avx") return 1;
+        if (v == "sse" || v == "sse4.2" || v == "none") return 0;
+        std::fprintf(stderr, "strata: STRATA_FORCE_ISA=%s is not avx2, avx or sse; ignored\n", f);
+        return 3;
+    }();
+    return cap;
+}
+
 bool cpu_avx512_ok() {
     static const bool ok = [] {
         if (const char* f = std::getenv("STRATA_FORCE_AVX2"); f != nullptr && f[0] == '1') return false;
+        if (cpu_isa_cap() < 3) return false;
         unsigned r[4] = {0, 0, 0, 0};
         auto cpuid = [&](unsigned leaf, unsigned sub) {
 #if defined(_MSC_VER)
@@ -55,6 +72,7 @@ bool cpu_avx512_ok() {
 
 bool cpu_avx2_ok() {
     static const bool ok = [] {
+        if (cpu_isa_cap() < 2) return false;
         unsigned r[4] = {0, 0, 0, 0};
         auto cpuid = [&](unsigned leaf, unsigned sub) {
 #if defined(_MSC_VER)
@@ -89,6 +107,7 @@ bool cpu_avx1_ok() {
     // AVX (Sandy Bridge, 2011): AVX + OSXSAVE with the OS saving the YMM state; FMA, F16C and AVX2 not needed.
     // From the Strata_Dirigo fork (rwkeyes).
     static const bool ok = [] {
+        if (cpu_isa_cap() < 1) return false;
         unsigned r[4] = {0, 0, 0, 0};
 #if defined(_MSC_VER)
         int x[4];
@@ -110,6 +129,31 @@ bool cpu_avx1_ok() {
     return ok;
 }
 
+bool cpu_sse42_ok() {
+    static const bool ok = [] {
+        unsigned r[4] = {0, 0, 0, 0};
+#if defined(_MSC_VER)
+        int x[4];
+        __cpuidex(x, 1, 0);
+        for (int i = 0; i < 4; ++i) r[i] = (unsigned) x[i];
+#else
+        __cpuid_count(1, 0, r[0], r[1], r[2], r[3]);
+#endif
+        return ((r[2] >> 20) & 1u) && ((r[2] >> 23) & 1u);   // SSE4.2, POPCNT
+    }();
+    return ok;
+}
+
+const char* isa_floor_build() {
+#if defined(STRATA_ISA_FLOOR_AVX)
+    return "avx";
+#elif defined(STRATA_ISA_FLOOR_NONE)
+    return "sse4.2";
+#else
+    return "";
+#endif
+}
+
 std::string cpu_name() {
     unsigned r[12] = {};
 #if defined(_MSC_VER)
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index b9a4440cca8..53194de214c 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -1923,12 +1923,33 @@ int main(int argc, char** argv) {
     // ... and nothing runs on a CPU without AVX2: every CPU expert kernel is AVX2 at least (the AVX-512 ones are
     // chosen above it), and so is ggml-cpu in the release build, which the native pack's layout load initializes
     // next.  Refused here, by name, rather than an illegal instruction in the first expert.
-    if (!strata::kernels::cpu::cpu_avx2_ok()) {
-        std::fprintf(stderr, "strata generate: this CPU (%s) does not support AVX2 with FMA and F16C, which every CPU "
-                             "expert kernel needs; Strata runs on Intel Haswell (2013), AMD Zen (2017) or newer\n",
+    // The experimental older-CPU build (STRATA_ISA_FLOOR=avx|none, compiled on that PC; #394 #595 #623) has ggml-cpu
+    // for that floor, so a native pack's experts run there on ggml-cpu (every AVX2 kernel is behind cpu_avx2_ok).
+    const char* isa_floor = strata::kernels::cpu::isa_floor_build();
+    if (!strata::kernels::cpu::cpu_avx2_ok() && isa_floor[0] == '\0') {
+        std::fprintf(stderr, "strata generate: this CPU (%s) does not support AVX2 with FMA and F16C, which this engine's "
+                             "CPU expert kernels need; Strata runs on Intel Haswell (2013), AMD Zen (2017) or newer. "
+                             "Older CPUs are EXPERIMENTAL and slow: setup compiles an engine for them on this PC "
+                             "(STRATA_ISA_FLOOR, see \"Older CPUs\" in docs/INSTALL.md)\n",
                      strata::kernels::cpu::cpu_name().c_str());
         return 2;
     }
+    if (isa_floor[0] != '\0') {
+        const bool avx_floor = std::strcmp(isa_floor, "avx") == 0;
+        if (avx_floor ? !strata::kernels::cpu::cpu_avx1_ok() : !strata::kernels::cpu::cpu_sse42_ok()) {
+            std::fprintf(stderr, "strata generate: this engine is the older-CPU build for %s, which this CPU (%s) does "
+                                 "not have%s\n", avx_floor ? "AVX" : "SSE4.2 with POPCNT",
+                         strata::kernels::cpu::cpu_name().c_str(),
+                         avx_floor ? "; compile it with STRATA_ISA_FLOOR=none" : "");
+            return 2;
+        }
+        if (!strata::kernels::cpu::cpu_avx2_ok())
+            std::fprintf(stderr, "strata generate: EXPERIMENTAL older-CPU build (ggml-cpu for %s): this CPU has no AVX2, "
+                                 "so the CPU's experts run on ggml-cpu's kernels - expect it to be slow\n", isa_floor);
+        else
+            std::fprintf(stderr, "strata generate: this is the older-CPU build (ggml-cpu for %s); this CPU has AVX2, "
+                                 "and the normal build is faster on it\n", isa_floor);
+    }
 
     std::string err;
     if (!o.native_head_gguf.empty() && !o.stream_token) {
@@ -2001,7 +2022,8 @@ int main(int argc, char** argv) {
     else if (!strata::kernels::cpu::cpu_avx512_ok())
         std::fprintf(stderr, "strata generate: this CPU has no AVX-512: the expert kernels run on %s "
                              "(multi-token for the i-quant gate/up rows)\n",
-                     std::getenv("STRATA_NO_IQ256") == nullptr ? "AVX-2" : "ggml-cpu vec_dot (STRATA_NO_IQ256 set)");
+                     !strata::kernels::cpu::cpu_avx2_ok() ? "ggml-cpu vec_dot (no AVX2: the older-CPU build)"
+                     : std::getenv("STRATA_NO_IQ256") == nullptr ? "AVX-2" : "ggml-cpu vec_dot (STRATA_NO_IQ256 set)");
     strata::core::ModelGeometry g;   // canonical defaults; the model file overrides the MoE shape below
     int64_t K = 10;
     // THE ROPE CONFIG RESOLVES HERE, BEFORE ANY WEIGHT MOVES - the CLI and the model file have both spoken,
diff --git a/tools/strata_mcp.py b/tools/strata_mcp.py
index 6aa67f94860..bfbb7b41689 100644
--- a/tools/strata_mcp.py
+++ b/tools/strata_mcp.py
@@ -680,8 +680,9 @@ def low_fits(m):
         ctx = 32768 if vram < 14 else 65536 if vram < 20 else 131072
         if vram < 11:
             notes.append("less than 12 GB of VRAM: it runs, but slowly (most experts stay on the CPU)")
-        if hw.get("cpu", {}).get("avx2") is False:
-            return {"family": None, "model": None, "why": "this CPU has no AVX2; Strata needs at least AVX2"}
+        if hw.get("cpu", {}).get("avx2") is False:      # #623: a warning, not a stop (setup compiles for it)
+            notes.append("this CPU has no AVX2: EXPERIMENTAL and slow - setup compiles the engine on this PC for the "
+                         "older CPU (10-20 minutes), and the CPU's share of the experts runs a few times slower")
         if backend == "hip":
             notes.append("AMD (experimental, Linux): the engine is compiled during setup; no images")
         cmd = (("START-HERE.bat --setup" if WIN else "./setup.sh --setup") +
diff --git a/tools/test_setup_oldcpu.py b/tools/test_setup_oldcpu.py
new file mode 100644
index 00000000000..7233f6d6a6e
--- /dev/null
+++ b/tools/test_setup_oldcpu.py
@@ -0,0 +1,95 @@
+"""Tests for setup.py's experimental older-CPU build (#394 #595 #623): which floor a CPU without AVX2 gets, the CMake
+definition, a build folder configured afresh when the floor changes, and the MCP server's note instead of a refusal.
+No compiler, no GPU.
+
+    python -m unittest tools.test_setup_oldcpu
+"""
+from __future__ import annotations
+
+import io
+import os
+import sys
+import tempfile
+import unittest
+from pathlib import Path
+from unittest import mock
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+sys.path.insert(0, str(ROOT / "tools"))
+import setup  # noqa: E402
+
+
+def cpuinfo(flags: str):
+    return mock.patch("builtins.open", lambda *a, **k: io.StringIO(f"model name\t: Old Xeon\nflags\t\t: {flags}\n"))
+
+
+class FloorTest(unittest.TestCase):
+    def setUp(self):
+        self.env = mock.patch.dict(os.environ, {"STRATA_ISA_FLOOR": ""})
+        self.env.start()
+
+    def tearDown(self):
+        self.env.stop()
+
+    def test_avx2_cpu_gets_the_normal_engine(self):
+        self.assertEqual(setup.cpu_floor(True), "")
+
+    def test_linux_flags(self):
+        with mock.patch.object(setup, "WIN", False):
+            with cpuinfo("fpu sse4_1 sse4_2 popcnt avx xsave"):
+                self.assertEqual(setup.cpu_floor(False), "avx")
+            with cpuinfo("fpu sse4_1 sse4_2 popcnt"):
+                self.assertEqual(setup.cpu_floor(False), "none")
+            with cpuinfo("fpu sse3 ssse3"):
+                self.assertEqual(setup.cpu_floor(False), "unsupported")
+
+    def test_windows_probe(self):
+        with mock.patch.object(setup, "WIN", True):
+            for probe, want in (("avx", "avx"), ("sse4.2", "none"), ("", "unsupported")):
+                with mock.patch.object(setup, "_cpuid_floor", lambda p=probe: p):
+                    self.assertEqual(setup.cpu_floor(False), want)
+
+    def test_env_asks_for_a_floor_build_on_any_cpu(self):
+        for v in ("avx", "none", "AVX"):
+            with mock.patch.dict(os.environ, {"STRATA_ISA_FLOOR": v}):
+                self.assertEqual(setup.cpu_floor(True), v.lower())
+        with mock.patch.dict(os.environ, {"STRATA_ISA_FLOOR": "bogus"}):
+            self.assertEqual(setup.cpu_floor(True), "")
+
+    @unittest.skipUnless(os.name == "nt", "the CPUID stub runs on Windows")
+    def test_this_pc_probe(self):
+        self.assertIn(setup._cpuid_floor(), ("avx", "sse4.2"))   # any x86-64 PC that runs the tests
+
+
+class DefsTest(unittest.TestCase):
+    def test_defs_and_fresh_configure(self):
+        with tempfile.TemporaryDirectory() as d:
+            b = Path(d)
+            cache = b / "CMakeCache.txt"
+            self.assertEqual(setup.isa_floor_defs("", b, {}), [])            # the normal build: nothing added
+            cache.write_text("x")
+            self.assertEqual(setup.isa_floor_defs("avx", b, {"isa_floor": "avx"}), ["-DSTRATA_ISA_FLOOR=avx"])
+            self.assertTrue(cache.exists())                                  # same floor: the folder is kept
+            self.assertEqual(setup.isa_floor_defs("none", b, {"isa_floor": "avx"}), ["-DSTRATA_ISA_FLOOR=none"])
+            self.assertFalse(cache.exists())                                 # another floor: configured afresh
+            cache.write_text("x")
+            self.assertEqual(setup.isa_floor_defs("", b, {"isa_floor": "none"}), [])
+            self.assertFalse(cache.exists())                                 # back to the normal build
+            cache.write_text("x")
+            setup.isa_floor_defs("", b, {})
+            self.assertTrue(cache.exists())                                  # the normal build's folder untouched
+
+
+class McpTest(unittest.TestCase):
+    def test_no_avx2_is_a_note_not_a_refusal(self):
+        import strata_mcp as M
+        s = M.Strata(ROOT)
+        gpu = [{"index": 0, "name": "x", "vram_gb": 24.0, "usable": True, "vendor": "nvidia"}]
+        r = s.recommend({"ram_gb": 64, "gpus": gpu, "cpu": {"avx2": False}})
+        self.assertIsNotNone(r["model"])
+        self.assertTrue(any("no AVX2" in n and "EXPERIMENTAL" in n for n in r["notes"]))
+
+
+if __name__ == "__main__":
+    unittest.main()

From 957672492ad252b71f5bbd369c332ca0de1eeb68 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:42:23 +0200
Subject: [PATCH 163/201] setup: older NVIDIA GPUs through a second,
 experimental CUDA 12 engine; --cuda 12|13 (#395 #627 #540 #600 #601)

CUDA 13 dropped Pascal and Volta. A model whose GPUs include one (its oldest card decides: one engine runs per model)
now runs the experimental CUDA 12 engine in engine-cuda12/ - the ready-made strata-windows-x64-cuda12.zip with NVIDIA's
CUDA 12 pip libraries, or compiled here with a CUDA 12.x toolkit (Linux; STRATA_NVCC picks one, #601) - and setup says
why. engine/ and every model on it stay as they were.
- the cards are an opt-in: naming one (--gpu / --gpus), --cuda 12, STRATA_EXPERIMENTAL_SM60=1, or a PC with no newer
  NVIDIA card and no supported AMD card; a PC with a newer card keeps recommending it
- --cuda 12|13 (or STRATA_CUDA) overrides the choice and is kept, with a warning where it cannot work (recommend,
  never force); --cuda 12 also runs with a driver older than 580 (525+), which the stop now mentions
- at a start, a Pascal / Volta card added to a CUDA 13 model moves that model's config to the CUDA 12 engine
- updates look at both engine folders; a compiled CUDA 12 engine builds in build-cuda12/
- an RTX 50 card in a CUDA 12 engine is a warning (CUDA 12.8+ builds it; #220 crashed with 12.8), no longer a stop
The setup golden test (every recommended config on five PCs) is unchanged; tools/test_setup_older_gpus.py covers the rest.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 .gitignore                     |   4 +
 setup.py                       | 314 ++++++++++++++++++++++++++-------
 tools/test_setup_choices.py    |   4 +-
 tools/test_setup_older_gpus.py | 287 ++++++++++++++++++++++++++++++
 4 files changed, 539 insertions(+), 70 deletions(-)
 create mode 100644 tools/test_setup_older_gpus.py

diff --git a/.gitignore b/.gitignore
index 36a0ce6b37d..8bce5378ef1 100644
--- a/.gitignore
+++ b/.gitignore
@@ -37,14 +37,18 @@ td.log
 /strata-*.json
 /strata-*.log
 /build-strata.bat
+/build-strata-cuda12.bat
+/build-cuda12/
 /.strata-mcp/
 
 # image encoder (setup.py --vision): build output and the generated build script
 build-vision*/
 build-vision.bat
+build-vision-cuda12.bat
 
 # setup.py outputs (engine, downloads) and release builds
 /engine/
+/engine-cuda12/
 /build-release*/
 /dist/
 *.done
diff --git a/setup.py b/setup.py
index a0df9a659dc..dac1d4e5d21 100644
--- a/setup.py
+++ b/setup.py
@@ -104,6 +104,15 @@ def hf_unpinned(url: str) -> str:
 # the CUDA libraries the ready-made engine loads (the same CUDA 13.0 it is built with), from NVIDIA's pip packages
 CUDA_WHEELS = ["nvidia-cublas==13.0.2.14", "nvidia-cuda-runtime==13.0.96"]
 MIN_DRIVER = 580                       # CUDA 13.0
+# Older NVIDIA GPUs (experimental): CUDA 13 dropped Pascal (sm_60/61) and Volta (sm_70), so a model whose GPUs include
+# one runs a second engine, built with CUDA 12.9 (-DSTRATA_EXPERIMENTAL_SM60=ON) and kept in its own folder: the
+# ready-made one is CUDA12_ASSET (Windows; on Linux it is compiled here with a CUDA 12.x toolkit).  One engine runs per
+# model, so the choice is per model config, by its oldest GPU; --cuda 12|13 overrides it (docs/OLDER_GPUS.md).
+CUDA13_MIN_ARCH = 75                   # the oldest compute capability CUDA 13 compiles for (sm_75, RTX 20)
+CUDA12_ASSET = "strata-windows-x64-cuda12.zip" if WIN else "strata-linux-x64-cuda12.zip"
+CUDA12_WHEELS = ["nvidia-cublas-cu12==12.9.1.4", "nvidia-cuda-runtime-cu12==12.9.79"]
+CUDA12_MIN_DRIVER = 525                # CUDA 12.x with minor-version compatibility (NVIDIA's table: 525.60 / 527.41)
+ENGINE12_DIR = "engine-cuda12"
 MIN_ENGINE = (0, 1, 39)                # v0.1.39: the #577 file-tier regression fixed, the OpenAI Responses API (#451, Codex), a reply stuck on one token ended (#606), the head before the arena (#620), effort_position (#458), --vram-reserve hot resize opt-in (#533), PR batch; v0.1.38: prompts faster (one gather per expert group #372, the first chunk's PLE rows beside layer 0 #374, DeltaNet three heads per thread #413), --kv q4_0 prompts on tensor cores (#452), Q5_0 experts on the GPU (#473), IQ4_XS on AVX-2 (#415), unbuffered expert loading on Windows (#357 #362), --peer-device (#531), a 6 GB card starts (#496), PR batch; v0.1.37: a silent engine is restarted (#481), Windows AMD counts the desktop's VRAM (#380 #377 #497), a steadier PCIe probe (#485), fixes #496 #495 #498 #505 #493; v0.1.36: a cancelled prompt logged as read so far (#471), the draft-head hint (#474), UPDATE.bat (#475), --expert-profile-save (#477); v0.1.35: Windows AMD uses its bundled HIP runtime (#468 #461), the low-RAM resident mode on Windows 32 GB (#467), fixes #460 #459 #446 #447 #457 #448 #444; v0.1.34: AMD on Windows (a ready-made HIP engine), an MCP server for AI assistants (tools/strata_mcp.py), a shorter README; v0.1.33: a portable image encoder again (#411 #412), setup recommends instead of forcing (#406 #403 #364 #384), fixes #352 #365 #369 #371 #375 #393 #408 #414; v0.1.32: split prompts faster (#340), AMD router +12%, Unsloth Q4 in setup, faster Q4 prompts, #326/#327/#342/#344 fixes, PR batch; v0.1.31: Unsloth UD-Q4_K_XL (experimental), GGUF-in-place low-RAM mode, Windows GGUF load 2x, server race + tokenizer fixes, AMD intrinsics; v0.1.30: short prompts faster (streaming from 1024 tokens), resident low-RAM variant, multi-GPU session carve, RDNA4; v0.1.29: sampled answers faster (split top-k), #154 correctness fixes; v0.1.28: the expert cache reserves the draft head, a cancelled request no longer fails the next; v0.1.27: RTX 20 (sm_75) in the ready-made engine, the HIP build without CUDA headers; v0.1.26: the draft layer's prompt pass in batches; v0.1.25: faster prompts (grouping off the copy engine, fused hyper-connection kernels), AMD HIP backend, --kv k8v4; v0.1.24: long prompts faster (QSA select on tensor cores); v0.1.23: image requests honor sampling, 8 GB cards start, batched verify window; v0.1.22: faster prompts (tensor-core attention), multi-GPU across images/steering/KV streaming; v0.1.21: multi-GPU layer split (--gpus); v0.1.20: system-prompt checkpoint, PCIe probe, hit rate; v0.1.19: penalties
 PY_PACKAGES = ["numpy", "jinja2", "regex", "pyyaml", "tqdm", "requests", "cmake", "ninja", "pillow", "psutil"]
 REQUIREMENTS = ROOT / "requirements.txt"   # the same packages and their dependencies, pinned (#214)
@@ -497,22 +506,84 @@ def cc(g) -> str:
     return f"{g['arch'][:-1]}.{g['arch'][-1]}"
 
 
+OLD_GPUS = None       # why Pascal / Volta cards are admitted in this run (old_gpus_opt_in), None: they are not
+
+
 def experimental_sm60() -> bool:
-    """#295: STRATA_EXPERIMENTAL_SM60=1 admits Pascal (6.x) and Volta (7.0) cards: the community build
-    (-DSTRATA_EXPERIMENTAL_SM60=ON, compiled here with a CUDA 12.x toolkit), not the ready-made engine."""
-    return os.environ.get("STRATA_EXPERIMENTAL_SM60", "").strip() == "1"
+    """#295: STRATA_EXPERIMENTAL_SM60=1 admits Pascal (6.x) and Volta (7.0) cards, run by the experimental CUDA 12
+    engine (-DSTRATA_EXPERIMENTAL_SM60=ON).  So does naming such a card (--gpu N / --gpus), --cuda 12, or a PC that
+    has no newer card (old_gpus_opt_in)."""
+    return os.environ.get("STRATA_EXPERIMENTAL_SM60", "").strip() == "1" or OLD_GPUS is not None
 
 
 def sm60_card(arch) -> bool:
     return 60 <= int(arch) <= 70
 
 
+def old_gpus_opt_in(found, named=(), cuda=None, other=False):
+    """Why this run may use Pascal / Volta cards (the experimental CUDA 12 engine), or None.  The cards are an opt-in:
+    the user named one (`named`: --gpu / --gpus), asked for --cuda 12, set STRATA_EXPERIMENTAL_SM60=1, or the PC has
+    no card the ready-made engine runs on and no supported AMD card (`other`; it used to stop there).  A PC with a
+    newer card keeps recommending it."""
+    old = [g for g in found if sm60_card(g["arch"])]
+    if not old:
+        return None
+    if os.environ.get("STRATA_EXPERIMENTAL_SM60", "").strip() == "1":
+        return "STRATA_EXPERIMENTAL_SM60=1"
+    if str(cuda) == "12":
+        return "--cuda 12"
+    picked = [g for g in old if g["index"] in set(named)]
+    if picked:
+        return "you chose " + ", ".join(f"GPU {g['index']} ({g['name']})" for g in picked)
+    if not other and not any(int(g["arch"]) >= CUDA13_MIN_ARCH for g in found):
+        return "it is the only kind of NVIDIA GPU in this PC"
+    return None
+
+
+def named_gpus(gpu, gpus) -> list:
+    """The card numbers --gpu / --gpus name (an unreadable value: none; parse_gpus says what is wrong later)."""
+    try:
+        if gpus and str(gpus).strip().lower() != "all":
+            return [int(x) for x in str(gpus).split(",") if x.strip()]
+        return [int(gpu)] if gpu is not None else []
+    except ValueError:
+        return []
+
+
+def cuda_choice(archs, cuda=None):
+    """The CUDA toolkit of one model's engine: (12 or 13, why).  13 (the ready-made engine) unless a card is older
+    than CUDA 13 supports (Pascal / Volta: CUDA 13 cannot compile for them) - one engine runs per model, so its oldest
+    card decides.  `cuda` (--cuda 12|13) overrides it; setup recommends, it does not refuse (the caller warns)."""
+    archs = sorted({int(x) for x in archs})
+    old = [a for a in archs if a < CUDA13_MIN_ARCH]
+    if str(cuda) == "13":
+        return 13, ("--cuda 13 (as you chose)" + (f"; CUDA 13 has no code for sm_{old[0]}: the engine will not run "
+                                                   "on that card" if old else ""))
+    if str(cuda) == "12":
+        return 12, "--cuda 12 (as you chose" + ("; RTX 50 (sm_120) engines built with CUDA 12.8 crashed on long "
+                                                  "prompts, #220" if archs and archs[-1] >= 120 else "") + ")"
+    if old:
+        return 12, (f"sm_{old[0]} is older than CUDA 13 supports (it dropped Pascal and Volta): this model runs the "
+                    "experimental CUDA 12 engine")
+    return 13, None
+
+
+def engine_dir(toolkit=13) -> Path:
+    """The folder of the engine a model runs: engine/ (CUDA 13, or HIP), engine-cuda12/ (the experimental one)."""
+    return ROOT / (ENGINE12_DIR if int(toolkit) == 12 else "engine")
+
+
+def config_toolkit(cfg: dict) -> int:
+    """12 when a model config runs the experimental CUDA 12 engine (its exe is in engine-cuda12/), else 13."""
+    return 12 if cfg.get("cuda") == 12 or Path(str(cfg.get("exe", ""))).parent.name == ENGINE12_DIR else 13
+
+
 def gpu_problem(g, together=False):
     """Why Strata cannot use this card, in plain words (None: it can)."""
     if int(g["arch"]) < 75 and not (sm60_card(g["arch"]) and experimental_sm60()):
         return (f"not supported - older than the RTX 20 series (compute capability {cc(g)}; Strata needs 7.5 or "
-                "newer" + ("; STRATA_EXPERIMENTAL_SM60=1 tries the community build for it" if sm60_card(g["arch"])
-                          else "") + ")")
+                "newer" + ("; experimental: choose it with --gpu " + str(g["index"]) + " (the CUDA 12 engine, "
+                          "docs/OLDER_GPUS.md)" if sm60_card(g["arch"]) else "") + ")")
     if together and g["vram_gb"] < SPLIT_MIN_VRAM_GB - 0.5:
         return (f"not supported together with other GPUs - {g['vram_gb']:.0f} GB of VRAM (a card sharing the model "
                 f"needs {SPLIT_MIN_VRAM_GB} GB or more)")
@@ -602,9 +673,9 @@ def check_gpus(sel, found, what="", yes=False, named=False) -> None:
         fail(f"GPU {i}{'' if g is None else ' (' + g['name'] + ')'} {what}cannot be used: {p}", hint)
 
 
-def engine_archs():
+def engine_archs(toolkit=13):
     """The GPU generations the installed engine has code for: (archs, ptx), or None when there is none."""
-    info = ROOT / "engine" / "BUILD.json"
+    info = engine_dir(toolkit) / "BUILD.json"
     try:
         meta = json.loads(info.read_text())
     except (OSError, ValueError):
@@ -621,8 +692,8 @@ def engine_archs_hip():
     return [str(x) for x in meta.get("archs", [])] if meta.get("backend") == "hip" else None
 
 
-def engine_runs_on(g) -> bool:
-    ea = engine_archs()
+def engine_runs_on(g, toolkit=13) -> bool:
+    ea = engine_archs(toolkit)
     if ea is None or not ea[0]:
         return True
     archs, ptx = ea
@@ -1182,14 +1253,19 @@ def pip_install(packages, what):
     ok(f"{what} installed")
 
 
-def cuda_lib_dirs():
-    """Where pip put NVIDIA's CUDA libraries (nvidia/cu13/bin/x86_64 on Windows, nvidia/cu13/lib on Linux)."""
-    pattern = "cublas64_13.dll" if WIN else "libcublas.so.13*"
+def cuda_lib_dirs(toolkit=13):
+    """Where pip put NVIDIA's CUDA libraries (nvidia/cu13/bin/x86_64 on Windows, nvidia/cu13/lib on Linux).
+    toolkit 12: the CUDA 12 wheels' cuBLAS and runtime, in two folders (nvidia/cublas/bin, nvidia/cuda_runtime/bin)."""
+    if int(toolkit) == 12:
+        patterns = ("cublas64_12.dll", "cudart64_12.dll") if WIN else ("libcublas.so.12*", "libcudart.so.12*")
+    else:
+        patterns = ("cublas64_13.dll",) if WIN else ("libcublas.so.13*",)
     dirs = []
     for sp in {Path(p) for p in sys.path if p.endswith("site-packages")}:
-        for hit in (sp / "nvidia").rglob(pattern) if (sp / "nvidia").is_dir() else []:
-            if hit.parent not in dirs:
-                dirs.append(hit.parent)
+        for pattern in patterns:
+            for hit in (sp / "nvidia").rglob(pattern) if (sp / "nvidia").is_dir() else []:
+                if hit.parent not in dirs:
+                    dirs.append(hit.parent)
     return [str(d) for d in dirs]
 
 
@@ -1792,10 +1868,12 @@ def prebuilt_bases(url_base) -> list[str]:
     return [PREBUILT_TAG_URL.format(version=source_version()), base]
 
 
-def get_prebuilt(url_base, gpu, vision, updating=False) -> Path | None:
+def get_prebuilt(url_base, gpu, vision, updating=False, toolkit=13) -> Path | None:
     """The ready-made engine in engine/ (kept between runs), or None when there is none for this PC.
-    updating: called to replace an installed engine, which starts instead when this fails (no compile)."""
-    eng = ROOT / "engine"
+    updating: called to replace an installed engine, which starts instead when this fails (no compile).
+    toolkit 12: the experimental CUDA 12 engine (CUDA12_ASSET) in engine-cuda12/."""
+    eng = engine_dir(toolkit)
+    asset = CUDA12_ASSET if int(toolkit) == 12 else PREBUILT_ASSET
     info = eng / "BUILD.json"
     if info.exists() and (eng / EXE).exists() and json.loads(info.read_text()).get("backend") != "hip":
         meta = json.loads(info.read_text())
@@ -1816,13 +1894,14 @@ def get_prebuilt(url_base, gpu, vision, updating=False) -> Path | None:
         info.unlink()
     if not url_base:
         return None
-    z = ROOT / "engine" / PREBUILT_ASSET
+    eng.mkdir(exist_ok=True)
+    z = eng / asset
     bases = prebuilt_bases(url_base)
     for i, base in enumerate(bases):
         if not base.startswith(("http://", "https://")):
             break
         try:                                           # not published (yet), or no internet: compile instead
-            req = urllib.request.Request(base + PREBUILT_ASSET, method="HEAD", headers={"User-Agent": "strata-setup"})
+            req = urllib.request.Request(base + asset, method="HEAD", headers={"User-Agent": "strata-setup"})
             urllib.request.urlopen(req, timeout=60).close()
             break
         except OSError as e:
@@ -1831,9 +1910,9 @@ def get_prebuilt(url_base, gpu, vision, updating=False) -> Path | None:
                 continue
             warn(f"no ready-made engine at {base} ({e})" + ("" if updating else ": compiling instead"))
             return None
-    say("  Downloading the ready-made Strata engine ...")
-    download(base + PREBUILT_ASSET, z, "Strata engine")
-    tmp = ROOT / "engine" / "_unpack"
+    say("  Downloading the ready-made Strata engine" + (" (CUDA 12, experimental)" if int(toolkit) == 12 else "") + " ...")
+    download(base + asset, z, "Strata engine")
+    tmp = eng / "_unpack"
     shutil.rmtree(tmp, ignore_errors=True)
     with zipfile.ZipFile(z) as f:
         f.extractall(tmp)
@@ -1876,11 +1955,17 @@ def get_prebuilt(url_base, gpu, vision, updating=False) -> Path | None:
     return eng
 
 
-def update_installed_engine(url_base) -> None:
+def update_installed_engine(url_base, toolkit=None) -> None:
     """An installed ready-made engine older than MIN_ENGINE is replaced before the model starts, so a plain
     START-HERE.bat on an existing install picks up a new release.  If that cannot happen (no internet, the model
-    still running, no ready-made engine for this GPU) the installed engine is kept and starts as before."""
-    eng = ROOT / "engine"
+    still running, no ready-made engine for this GPU) the installed engine is kept and starts as before.
+    toolkit None: engine/, then the experimental CUDA 12 engine in engine-cuda12/ when one is installed."""
+    if toolkit is None:
+        update_installed_engine(url_base, 13)
+        if (engine_dir(12) / "BUILD.json").exists():
+            update_installed_engine(url_base, 12)
+        return
+    eng = engine_dir(toolkit)
     info = eng / "BUILD.json"
     if not info.exists() or not (eng / EXE).exists():
         return
@@ -1938,14 +2023,19 @@ def update_installed_engine(url_base) -> None:
             if gpu is None:
                 raise RuntimeError("no NVIDIA GPU found")
             gpu = {**gpu, "archs": sorted({int(gpu["arch"]), *(int(x) for x in meta.get("archs", []))})}
-            build_engine(gpu, vision, False, get_llama_cpp())
+            if int(toolkit) == 12:                     # the cards it was compiled for (the main GPU may be newer)
+                gpu["archs"] = sorted({int(x) for x in meta.get("archs", [])}) or gpu["archs"]
+            build_engine(gpu, vision, False, get_llama_cpp(), toolkit=toolkit)
         except (Exception, SystemExit) as e:
             warn(f"could not compile the updated engine{'' if isinstance(e, SystemExit) else f' ({e})'}: starting the installed one")
         return
     new = None
     if gpu is not None:
         try:
-            new = get_prebuilt(url_base, gpu, "gpu", updating=True)
+            if int(toolkit) == 12:                     # the cards the CUDA 12 engine serves, not the newest one
+                gpu = {**gpu, "archs": [x for x in (int(a) for a in meta.get("archs", [])) if x < CUDA13_MIN_ARCH]
+                       or [int(gpu["arch"])]}
+            new = get_prebuilt(url_base, gpu, "gpu", updating=True, toolkit=toolkit)
         except Exception as e:                         # a failed download must not stop the model from starting
             warn(f"updating the engine failed ({e})")
     if new is None:
@@ -1953,25 +2043,36 @@ def update_installed_engine(url_base) -> None:
             info.write_text(meta_text)                 # get_prebuilt drops it before downloading: put it back
         warn(f"could not update the engine: starting the installed {meta.get('version')}")
         return
-    pip_install(CUDA_WHEELS, "NVIDIA CUDA libraries (cuBLAS, CUDA runtime; ~0.4 GB)")
+    pip_cuda_libs(toolkit)
+
+
+def pip_cuda_libs(toolkit=13) -> None:
+    """NVIDIA's cuBLAS and CUDA runtime for a ready-made engine, from pip: CUDA 13's, or the CUDA 12 engine's."""
+    if int(toolkit) == 12:
+        pip_install(CUDA12_WHEELS, "NVIDIA CUDA 12 libraries for the experimental engine (cuBLAS, CUDA runtime; ~0.7 GB)")
+    else:
+        pip_install(CUDA_WHEELS, "NVIDIA CUDA libraries (cuBLAS, CUDA runtime; ~0.4 GB)")
 
 
 def install_build_tools(gpu, yes):
     """The compiler and the CUDA toolkit, installed for the user (asks once).  Returns (nvcc, vcvars)."""
     archs = [int(x) for x in gpu.get("archs", [gpu["arch"]])]
-    # #295: Pascal / Volta (STRATA_EXPERIMENTAL_SM60=1) need a CUDA 12.x toolkit - CUDA 13 cannot build sm_60/sm_70
-    old = min(archs) < 75
+    # #295: Pascal / Volta need a CUDA 12.x toolkit - CUDA 13 cannot build sm_60/sm_70; gpu["toolkit"] = 12: the
+    # experimental CUDA 12 engine for any cards (--cuda 12, docs/OLDER_GPUS.md)
+    old = int(gpu.get("toolkit") or (12 if min(archs) < CUDA13_MIN_ARCH else 13)) == 12
+    need12 = (12, 8) if max(archs) >= 120 else (12, 0)     # sm_120 needs CUDA 12.8 or newer
     if old and max(archs) >= 120:
-        fail("one engine cannot be built for both an RTX 50 card (CUDA 13) and a Pascal/Volta card (CUDA 12.x)",
-             "choose the cards of one kind with --gpu / --gpus")
+        warn("an RTX 50 card (sm_120) in a CUDA 12 engine: engines built with CUDA 12.8 crashed on long prompts there "
+             "(#220, #224); the RTX 50 card alone (--gpu N) runs the ready-made CUDA 13 engine")
     nvcc, cuda_v = find_nvcc(below=(13, 0)) if old else find_nvcc()
-    if old and (nvcc is None or cuda_v < (12, 0)):
-        fail("the experimental Pascal/Volta build (STRATA_EXPERIMENTAL_SM60=1) needs the NVIDIA CUDA Toolkit 12.x "
-             "(CUDA 13 cannot compile for these cards)",
-             "install CUDA 12.9 (or another 12.x; it can sit next to a newer one) from "
-             "https://developer.nvidia.com/cuda-toolkit-archive and run it again")
+    if old and (nvcc is None or cuda_v < need12):
+        fail("the experimental CUDA 12 engine (Pascal / Volta, or --cuda 12) is compiled here with the NVIDIA CUDA "
+             f"Toolkit {need12[0]}.{need12[1]} or a newer 12.x (CUDA 13 cannot compile for these cards)" +
+             (f"; found CUDA {cuda_v[0]}.{cuda_v[1]}" if nvcc else ""),
+             "install CUDA 12.9 (it can sit next to a newer one) from https://developer.nvidia.com/cuda-toolkit-archive "
+             "and run it again (STRATA_NVCC=<its nvcc> picks one toolkit)")
     # RTX 50 (sm_120): CUDA 13.0 - an engine built with 12.8 crashed in the prompt path on Linux (#220)
-    need_cuda = (13, 0) if max(archs) >= 120 else (12, 0)
+    need_cuda = need12 if old else (13, 0) if max(archs) >= 120 else (12, 0)
     vcvars = find_vcvars() if WIN else None
     have_cc = vcvars is not None if WIN else shutil.which("g++") is not None
     missing = []
@@ -2067,9 +2168,10 @@ def source_hash(parts) -> str:
     return h.hexdigest()[:16]
 
 
-def engine_defs(archs) -> list:
-    """Extra CMake definitions for the engine: the experimental Pascal/Volta build (#295) for cards below sm_75."""
-    return ["-DSTRATA_EXPERIMENTAL_SM60=ON"] if min(int(x) for x in archs) < 75 else []
+def engine_defs(archs, toolkit=13) -> list:
+    """Extra CMake definitions for the engine: the experimental Pascal/Volta build (#295) for cards below sm_75, and
+    for every CUDA 12 engine (the same build as the ready-made CUDA 12 one: it admits the older cards)."""
+    return ["-DSTRATA_EXPERIMENTAL_SM60=ON"] if min(int(x) for x in archs) < 75 or int(toolkit) == 12 else []
 
 
 def prebuilt_vision(meta: dict, gpu: dict, vision: str) -> str:
@@ -2086,10 +2188,15 @@ def prebuilt_vision(meta: dict, gpu: dict, vision: str) -> str:
     return vision
 
 
-def build_engine(gpu, vision, yes, llama) -> Path:
+def build_engine(gpu, vision, yes, llama, toolkit=None) -> Path:
     """Compile the engine (and, for images, the encoder) for this GPU; the results go to engine/.  A compiled
-    engine whose source files changed since (a `git pull`) is compiled again: only the changed files, a few minutes."""
-    eng = ROOT / "engine"
+    engine whose source files changed since (a `git pull`) is compiled again: only the changed files, a few minutes.
+    toolkit 12 (default: 12 for a card older than CUDA 13 supports): the experimental CUDA 12 engine, in
+    engine-cuda12/ with its own build folders."""
+    if toolkit is None:
+        toolkit = 12 if min(int(x) for x in gpu.get("archs", [gpu["arch"]])) < CUDA13_MIN_ARCH else 13
+    t12 = int(toolkit) == 12
+    eng = engine_dir(toolkit)
     eng.mkdir(exist_ok=True)
     stamp = eng / "BUILD.json"
     meta = json.loads(stamp.read_text()) if stamp.exists() else {}
@@ -2108,29 +2215,31 @@ def build_engine(gpu, vision, yes, llama) -> Path:
         return eng
     if local:
         archs = sorted(built | set(archs))
-    nvcc, vcvars = install_build_tools({**gpu, "archs": archs}, yes)
+    nvcc, vcvars = install_build_tools({**gpu, "archs": archs, "toolkit": toolkit}, yes)
     cuda_archs = ";".join(str(x) for x in archs)
+    bdir, vdir = (ROOT / "build-cuda12", ROOT / "build-vision-cuda12") if t12 else (ROOT / "build", ROOT / "build-vision")
     if not engine_ok:
         say("  Compiling the engine for " + ", ".join(f"sm_{x}" for x in archs) + " (a card it had no code for; "
             "10-20 minutes, once) ..." if new_arch else
             "  The engine's source changed: compiling it again (only what changed, a few minutes) ..."
             if local and (eng / EXE).exists() else "  Compiling the Strata engine for your GPU (10-20 minutes, once) ...")
-        cmake_build(ROOT, ROOT / "build", "strata",
+        cmake_build(ROOT, bdir, "strata",
                     ["-DSTRATA_ENABLE_CUDA=ON", "-DSTRATA_BUILD_TESTS=OFF", f"-DCMAKE_CUDA_ARCHITECTURES={cuda_archs}",
-                     f"-DCMAKE_CUDA_COMPILER={nvcc}", f"-DSTRATA_GGML_DIR={llama}", *engine_defs(archs)],
-                    vcvars, "build-strata.bat")
-        shutil.copy2(ROOT / "build" / EXE, eng / EXE)
+                     f"-DCMAKE_CUDA_COMPILER={nvcc}", f"-DSTRATA_GGML_DIR={llama}", *engine_defs(archs, toolkit)],
+                    vcvars, "build-strata-cuda12.bat" if t12 else "build-strata.bat")
+        shutil.copy2(bdir / EXE, eng / EXE)
     if not vision_ok:
         say("  Compiling the image encoder" + (" with CUDA (10-20 minutes, once) ..." if vision == "gpu" else " ..."))
         defs = [f"-DLLAMA_DIR={llama}", f"-DSTRATA_VISION_CUDA={'ON' if vision == 'gpu' else 'OFF'}"]
         if vision == "gpu":
             defs += [f"-DCMAKE_CUDA_ARCHITECTURES={cuda_archs}", f"-DCMAKE_CUDA_COMPILER={nvcc}"]
-        cmake_build(ROOT / "tools" / "vision", ROOT / "build-vision", "strata-vision", defs, vcvars, "build-vision.bat")
-        shutil.copy2(ROOT / "build-vision" / "bin" / VEXE, eng / VEXE)
+        cmake_build(ROOT / "tools" / "vision", vdir, "strata-vision", defs, vcvars,
+                    "build-vision-cuda12.bat" if t12 else "build-vision.bat")
+        shutil.copy2(vdir / "bin" / VEXE, eng / VEXE)
     bindir = Path(nvcc).parent                            # the toolkit's own libraries (bin, bin/x64, lib64)
     dirs = [str(d) for d in (bindir, bindir / "x64", bindir.parent / "lib64") if d.is_dir()]
     stamp.write_text(json.dumps({"source": "local", "version": source_version(), "archs": archs,
-                                 "vision": vision,
+                                 "vision": vision, **({"toolkit": 12} if t12 else {}),
                                  "cuda_dirs": dirs, "src": src, "vision_src": vsrc if want_vision else None}, indent=1))
     ok(f"engine compiled: {eng / EXE}")
     return eng
@@ -2619,7 +2728,7 @@ def choices_from_config(cfg_path: Path) -> dict:
             "vision": ("gpu" if vis.get("gpu") else "cpu") if isinstance(vis, dict) else "none",
             "esp": ("on" if Path(esp_path).name == ESP_VECTOR.name else esp_path) if esp_path else "off",
             "host": cfg.get("host"), "api_key": cfg.get("api_key"), "port": cfg.get("port"), "gpu": cfg.get("gpu"),
-            "layer_split": cfg.get("layer_split"),
+            "layer_split": cfg.get("layer_split"), "cuda": 12 if config_toolkit(cfg) == 12 else None,
             # #493: --vram-reserve-mib given at setup (images write the default 700 themselves)
             "vram_reserve_mib": int(val("--vram-reserve-mib")) if (val("--vram-reserve-mib") or "").isdigit() and (
                 vis is None or int(val("--vram-reserve-mib")) != VISION["gpu"]["reserve_mib"]) else None}
@@ -2927,6 +3036,10 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
                 ok(f"GPU: {g['name']} ({g['vram_gb']:.0f} GB, AMD)")
     else:
         found = gpus()
+        global OLD_GPUS                                # Pascal / Volta: named on this start, or this model's CUDA 12 engine
+        OLD_GPUS = OLD_GPUS or old_gpus_opt_in(found, gpu if isinstance(gpu, list) else [gpu] if gpu is not None else
+                                               cfg.get("gpu") if isinstance(cfg.get("gpu"), list) else [cfg.get("gpu")],
+                                               12 if config_toolkit(cfg) == 12 else None)
     if cfg.get("backend") == "hip":
         pass
     elif isinstance(gpu, list):                        # --gpus: saved, this model runs on these cards from now on
@@ -3133,25 +3246,68 @@ def refresh_draft_vocab(rt: Path, choice: str = "cjk") -> None:
 def ensure_engine_for(cards, cfg_path: Path, cfg: dict, yes: bool) -> dict:
     """The installed engine must have code for every card the model starts on: a card added later (--gpus with an
     older or newer generation, #128) or a new GPU in the PC otherwise stops the start with 'no kernel image'.  Such a
-    card gets the engine compiled for all of them, before the start."""
-    missing = [g for g in cards if not engine_runs_on(g)]
+    card gets the engine compiled for all of them, before the start.  A Pascal / Volta card added to a model on the
+    CUDA 13 engine moves the model to the experimental CUDA 12 engine (CUDA 13 has no code for it)."""
+    tk = config_toolkit(cfg)
+    if tk == 13 and any(int(g["arch"]) < CUDA13_MIN_ARCH for g in cards):
+        return use_cuda12(cards, cfg_path, cfg, yes)
+    missing = [g for g in cards if not engine_runs_on(g, tk)]
     if not missing:
         return cfg
-    info = ROOT / "engine" / "BUILD.json"
+    eng = engine_dir(tk)
+    info = eng / "BUILD.json"
     meta = json.loads(info.read_text())
     say()
     say("  The installed engine has no code for " + ", ".join(f"{g['name']} (sm_{g['arch']})" for g in missing) +
         ": it is compiled for " + ("these cards" if len(cards) > 1 else "it") + " now.")
     main = gpu_info(cards[0]["index"])
     archs = sorted({int(x) for x in meta.get("archs", [])} | {int(g["arch"]) for g in cards})
-    vision = meta.get("vision") or ("gpu" if (ROOT / "engine" / VEXE).exists() else "none")
-    build_engine({**main, "archs": archs}, vision, yes, get_llama_cpp())
+    vision = meta.get("vision") or ("gpu" if (eng / VEXE).exists() else "none")
+    build_engine({**main, "archs": archs}, vision, yes, get_llama_cpp(), toolkit=tk)
     dirs = json.loads(info.read_text()).get("cuda_dirs") or []
     cfg["lib_dirs"] = dirs + [d for d in cfg.get("lib_dirs") or [] if d not in dirs]
     write_config(cfg_path, cfg)
     return cfg
 
 
+def get_cuda12_engine(url_base, gpu, vision, yes, build=False) -> Path:
+    """The experimental CUDA 12 engine for these cards (gpu["archs"]): the ready-made one (Windows) with NVIDIA's
+    CUDA 12 libraries, or compiled here with a CUDA 12.x toolkit (Linux, --build, or no ready-made one)."""
+    eng = None if build else get_prebuilt(url_base, gpu, vision, toolkit=12)
+    if eng is not None and json.loads((eng / "BUILD.json").read_text()).get("source") != "local":
+        pip_cuda_libs(12)
+        if vision != "none" and not (eng / VEXE).exists():
+            eng = None
+    return eng if eng is not None else build_engine(gpu, vision, yes, get_llama_cpp(), toolkit=12)
+
+
+def engine_lib_dirs(eng: Path, toolkit=13) -> list:
+    """The library folders a CUDA engine loads from: its own (a compiled one: the toolkit's), else pip's wheels."""
+    meta = json.loads((eng / "BUILD.json").read_text())
+    return meta.get("lib_dirs") or meta.get("cuda_dirs") or cuda_lib_dirs(toolkit)
+
+
+def use_cuda12(cards, cfg_path: Path, cfg: dict, yes: bool) -> dict:
+    """A model on the CUDA 13 engine now has a Pascal / Volta card (a --gpus at start): the model's config moves to
+    the experimental CUDA 12 engine (one engine per model; its other models keep theirs)."""
+    old = min(int(g["arch"]) for g in cards)
+    say()
+    warn(f"sm_{old} is older than CUDA 13 supports (it dropped Pascal and Volta): this model moves to the experimental "
+         "CUDA 12 engine (docs/OLDER_GPUS.md; START-HERE.bat --setup --cuda 13 and newer cards only moves it back)")
+    main = gpu_info(cards[0]["index"]) or cards[0]
+    vision = "gpu" if cfg.get("vision") else "none"
+    eng = get_cuda12_engine(os.environ.get("STRATA_PREBUILT_URL", PREBUILT_URL),
+                            {**main, "archs": sorted({int(g["arch"]) for g in cards})}, vision, yes)
+    cfg["exe"] = str(eng / EXE)
+    cfg["cuda"] = 12
+    cfg["lib_dirs"] = engine_lib_dirs(eng, 12)
+    if cfg.get("vision") and (eng / VEXE).exists():
+        cfg["vision"]["exe"] = str(eng / VEXE)
+    write_config(cfg_path, cfg)
+    ok(f"engine: {eng / EXE} (CUDA 12, experimental)")
+    return cfg
+
+
 def write_run_script(model, cfg_path, port, open_browser=True):
     """run-<model>.bat / .sh: the server with this config; `open_browser` False (#609: --no-browser) leaves --open out."""
     serve = [sys.executable, str(ROOT / "serve" / "server.py"), "--engine", "strata", "--config", str(cfg_path),
@@ -3259,6 +3415,10 @@ def main() -> int:
                     help="update the installed engine, Python packages and model settings as a start would, without "
                          "starting the model (UPDATE.bat / update.sh run it after a git pull)")
     ap.add_argument("--build", action="store_true", help="compile the engine instead of using the ready-made one")
+    ap.add_argument("--cuda", choices=["12", "13", "auto"], default=os.environ.get("STRATA_CUDA") or None,
+                    help="NVIDIA: the CUDA toolkit of this model's engine. auto (default): CUDA 13, the ready-made "
+                         "engine; CUDA 12 (experimental) when a chosen card is older than CUDA 13 supports (Pascal, "
+                         "Volta). 12 also runs with an older driver (525+). docs/OLDER_GPUS.md")
     ap.add_argument("--prebuilt", default=os.environ.get("STRATA_PREBUILT_URL", PREBUILT_URL),
                     help="where the ready-made engine is (a URL folder or a local folder)")
     ap.add_argument("--check", action="store_true", help="only check this PC and exit")
@@ -3329,13 +3489,15 @@ def main() -> int:
                 a.port = a.port or ch["port"]
                 if a.vram_reserve_mib is None:          # #493: an explicit reserve set up before
                     a.vram_reserve_mib = ch.get("vram_reserve_mib")
+                if a.cuda is None and ch.get("cuda") == 12:   # the experimental CUDA 12 engine, as before
+                    a.cuda = "12"
                 if isinstance(ch.get("gpu"), list):     # a layer split: set up across the same cards again
                     a.gpus = a.gpus or ",".join(str(g) for g in ch["gpu"])
                     a.layer_split = a.layer_split or ch.get("layer_split")
                 else:
                     a.gpu = a.gpu if a.gpu is not None else ch.get("gpu")
                 a.yes = True
-    global GPU_PICK
+    global GPU_PICK, OLD_GPUS
     # starting an installed model: --gpus 0,2 (or all) saves those cards for it and starts on them (it used to start
     # on the first one alone unless given with --setup), --gpu N runs this start on one card; neither: the saved
     # choice, and asked once when the PC has cards that could share the model
@@ -3378,8 +3540,14 @@ def main() -> int:
     step(1, "checking your PC")
     found = gpus()
     amd = amd_gpus()
-    nv_ok = any(gpu_problem(g) is None for g in found)
     amd_ok = [g for g in amd if amd_problem(g) is None]
+    # older NVIDIA GPUs (Pascal / Volta): the experimental CUDA 12 engine, when chosen (docs/OLDER_GPUS.md)
+    OLD_GPUS = OLD_GPUS or old_gpus_opt_in(found, named_gpus(a.gpu, a.gpus), a.cuda,
+                                           other=bool(amd_ok) or a.backend == "hip")
+    if OLD_GPUS and a.backend != "hip":
+        warn(f"older NVIDIA GPUs (Pascal / Volta) can be used ({OLD_GPUS}): experimental, through a second engine "
+             "built with CUDA 12 (docs/OLDER_GPUS.md)")
+    nv_ok = any(gpu_problem(g) is None for g in found)
     hip = a.backend == "hip" or (a.backend is None and not nv_ok and bool(amd_ok))
     if a.backend is None and nv_ok and amd_ok:
         # both kinds of card: asked (a first run on such a PC used to take NVIDIA without mentioning the Radeon)
@@ -3393,6 +3561,7 @@ def main() -> int:
         hip = ask("Which cards?", ["1", "2"], "1", a.yes or a.check) == "2"
         if a.check and not hip:
             say(f"  (the AMD card: {'START-HERE.bat' if WIN else './setup.sh'} --backend hip)")
+    cuda_tk = 13                                       # NVIDIA: the toolkit of this model's engine (cuda_choice)
     if hip:                                            # AMD: compiled here; Windows: ready-made
         if WIN and a.gpus:
             fail("several AMD cards sharing one model (--gpus) is Linux-only for now", "use one card: --gpu N")
@@ -3440,9 +3609,15 @@ def main() -> int:
         if multi:
             ok("GPUs: " + " + ".join(gpu_name(x) for x in chosen) + " together (the model's layers are split across them)")
         ok(f"GPU: {gpu['name']}, {gpu['vram_gb']:.1f} GB VRAM, compute capability {cc(gpu)}, driver {gpu['driver']}")
-        if driver_major(gpu) < MIN_DRIVER:
-            fail(f"the NVIDIA driver is too old ({gpu['driver']}; {MIN_DRIVER} or newer is needed)",
-                 "update it with the NVIDIA App or from https://www.nvidia.com/drivers, restart, and run this again")
+        cuda_tk, why = cuda_choice(gpu["archs"], a.cuda)   # one engine per model: its oldest card decides
+        if why:
+            (warn if cuda_tk == 13 or str(a.cuda) == "12" else ok)(f"CUDA {cuda_tk}: {why}")
+        min_driver = CUDA12_MIN_DRIVER if cuda_tk == 12 else MIN_DRIVER
+        if driver_major(gpu) < min_driver:
+            fail(f"the NVIDIA driver is too old ({gpu['driver']}; {min_driver} or newer is needed)",
+                 "update it with the NVIDIA App or from https://www.nvidia.com/drivers, restart, and run this again" +
+                 ("" if cuda_tk == 12 else f" (or --cuda 12: the experimental CUDA 12 engine runs with driver "
+                                           f"{CUDA12_MIN_DRIVER} or newer, docs/OLDER_GPUS.md)"))
     if gpu["vram_gb"] < 11:
         warn("less than 12 GB of VRAM: Strata will run, but most experts stay on the CPU and it will be slow")
     ram = ram_gb()
@@ -3738,21 +3913,22 @@ def main() -> int:
         gpu = hip_card(eng, gpu, amd)
         a.gpu = gpu["index"] if gpu["count"] > 1 else a.gpu
     else:
-        eng = None if a.build or hip else get_prebuilt(a.prebuilt, gpu, vision)
+        eng = None if a.build or hip else get_prebuilt(a.prebuilt, gpu, vision, **({"toolkit": 12} if cuda_tk == 12
+                                                                                    else {}))
     if eng is not None and not hip and json.loads((eng / "BUILD.json").read_text()).get("source") != "local":
-        pip_install(CUDA_WHEELS, "NVIDIA CUDA libraries (cuBLAS, CUDA runtime; ~0.4 GB)")
+        pip_cuda_libs(cuda_tk)
         if vision != "none" and not (eng / VEXE).exists():
             warn("the ready-made engine has no image encoder: compiling it")
             eng = None
         else:
             vision = prebuilt_vision(json.loads((eng / "BUILD.json").read_text()), gpu, vision)
     if eng is None:
-        eng = build_engine_hip(gpu, llama, vision) if hip else build_engine(gpu, vision, a.yes, llama)
+        eng = build_engine_hip(gpu, llama, vision) if hip else build_engine(gpu, vision, a.yes, llama, toolkit=cuda_tk)
     meta = json.loads((eng / "BUILD.json").read_text())
     if hip and WIN:                                    # the ready-made engine's rocm/bin, first on the engine's PATH
         lib_dirs = [str(d) for d in hip_lib_dirs(eng)]
     else:
-        lib_dirs = meta.get("lib_dirs") or meta.get("cuda_dirs") or cuda_lib_dirs()
+        lib_dirs = meta.get("lib_dirs") or meta.get("cuda_dirs") or cuda_lib_dirs(cuda_tk)
     engine_ver = tuple(int(x) for x in str(meta.get("version", "0")).split(".")[:3] if x.isdigit())
     need_engine = MODELS[model].get("engine", UNSLOTH_ENGINE)
     if budget is not None and engine_ver < need_engine:      # checked before the 94-111 GB download
@@ -3952,6 +4128,8 @@ def main() -> int:
     cfg = {"exe": str(eng / EXE), "args": args, "cwd": str(ROOT), "tokenizer": str(pack / "tokenizer"),
            "model_name": f"{fam['name']}-{model.lower()}", "log": str(ROOT / f"strata-{tag.lower()}.log"),
            "lib_dirs": lib_dirs, "port": port}
+    if cuda_tk == 12:                                  # the experimental CUDA 12 engine (engine-cuda12/)
+        cfg["cuda"] = 12
     if hip:
         cfg["backend"] = "hip"
         # the dense prompt GEMMs through hipBLASLt with kernels measured on this GPU generation (tools/hip; +40-60%
diff --git a/tools/test_setup_choices.py b/tools/test_setup_choices.py
index 17b5487e5af..65a39dbf755 100644
--- a/tools/test_setup_choices.py
+++ b/tools/test_setup_choices.py
@@ -162,8 +162,8 @@ def test_the_gate(self):
             for arch in ("60", "61", "70"):
                 p = setup.gpu_problem(self.card(arch))
                 self.assertIn("not supported", p)
-                self.assertIn("STRATA_EXPERIMENTAL_SM60=1", p)
-            self.assertNotIn("STRATA_EXPERIMENTAL_SM60", setup.gpu_problem(self.card("52")))
+                self.assertIn("choose it with --gpu 0", p)              # the CUDA 12 engine (docs/OLDER_GPUS.md)
+            self.assertNotIn("--gpu", setup.gpu_problem(self.card("52")))
             self.assertIsNone(setup.gpu_problem(self.card("75")))
         with mock.patch.dict(os.environ, {"STRATA_EXPERIMENTAL_SM60": "1"}):
             for arch in ("60", "61", "70", "75", "120"):
diff --git a/tools/test_setup_older_gpus.py b/tools/test_setup_older_gpus.py
new file mode 100644
index 00000000000..bc9109bc694
--- /dev/null
+++ b/tools/test_setup_older_gpus.py
@@ -0,0 +1,287 @@
+"""Older NVIDIA GPUs (experimental): Pascal / Volta run a second engine built with CUDA 12 (engine-cuda12/), chosen per
+model config by its oldest card; --cuda 12|13 overrides it.  A PC whose cards the ready-made CUDA 13 engine runs on
+gets exactly what it got before.  No GPU, no downloads.
+
+    python -m unittest tools.test_setup_older_gpus
+"""
+from __future__ import annotations
+
+import json
+import os
+import sys
+import tempfile
+import unittest
+from pathlib import Path
+from unittest import mock
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+import setup  # noqa: E402
+from test_setup_choices import quiet  # noqa: E402
+from test_setup_golden import PROFILES, install, argv_for  # noqa: E402
+
+
+def card(i, name, vram, arch, driver="580.97"):
+    return {"index": i, "name": name, "vram_gb": vram, "arch": arch, "driver": driver}
+
+
+V100 = card(0, "Tesla V100-PCIE-32GB", 32.0, "70", "575.57")
+P40 = card(0, "Tesla P40", 24.0, "61", "535.104")
+
+
+class Choice(unittest.TestCase):
+    def test_by_the_oldest_card(self):
+        self.assertEqual(setup.cuda_choice(["120"]), (13, None))
+        self.assertEqual(setup.cuda_choice([75, 86, 89]), (13, None))
+        for archs in ([70], [61], [60], [70, 86]):
+            tk, why = setup.cuda_choice(archs)
+            self.assertEqual(tk, 12, archs)
+            self.assertIn(f"sm_{min(archs)} is older than CUDA 13 supports", why)
+
+    def test_the_override_is_honored_with_a_warning(self):
+        tk, why = setup.cuda_choice([70], "13")
+        self.assertEqual(tk, 13)                       # recommend, never force: kept, and said
+        self.assertIn("will not run on that card", why)
+        self.assertEqual(setup.cuda_choice([86], "12")[0], 12)
+        self.assertIn("#220", setup.cuda_choice([86, 120], "12")[1])
+        self.assertEqual(setup.cuda_choice([70], "auto")[0], 12)
+        self.assertEqual(setup.cuda_choice([86], "auto"), (13, None))
+
+    def test_engine_folders_and_configs(self):
+        with mock.patch.object(setup, "ROOT", Path("/s")):
+            self.assertEqual(setup.engine_dir(), Path("/s/engine"))
+            self.assertEqual(setup.engine_dir(12), Path("/s/engine-cuda12"))
+        self.assertEqual(setup.config_toolkit({"exe": "/s/engine/strata.exe"}), 13)
+        self.assertEqual(setup.config_toolkit({"exe": "/s/engine-cuda12/strata.exe"}), 12)
+        self.assertEqual(setup.config_toolkit({"exe": "x", "cuda": 12}), 12)
+        self.assertEqual(setup.engine_defs([86], 12), ["-DSTRATA_EXPERIMENTAL_SM60=ON"])
+        self.assertEqual(setup.engine_defs([86]), [])
+
+
+class OptIn(unittest.TestCase):
+    """Pascal / Volta cards are used only when chosen; a PC with a newer card keeps recommending the newer one."""
+
+    def setUp(self):
+        self.env = mock.patch.dict(os.environ, {"STRATA_EXPERIMENTAL_SM60": ""})
+        self.env.start()
+
+    def tearDown(self):
+        self.env.stop()
+
+    def test_reasons(self):
+        rtx = card(0, "RTX 3090", 24.0, "86")
+        v100 = {**V100, "index": 1}
+        self.assertIsNone(setup.old_gpus_opt_in([rtx]))
+        self.assertIsNone(setup.old_gpus_opt_in([rtx, v100]))                  # the default: unchanged
+        self.assertIn("you chose GPU 1", setup.old_gpus_opt_in([rtx, v100], [1]))
+        self.assertIsNone(setup.old_gpus_opt_in([rtx, v100], [0]))
+        self.assertEqual(setup.old_gpus_opt_in([rtx, v100], cuda="12"), "--cuda 12")
+        self.assertIn("only kind", setup.old_gpus_opt_in([V100]))
+        self.assertIsNone(setup.old_gpus_opt_in([V100], other=True))            # an AMD card it can use instead
+        self.assertIsNone(setup.old_gpus_opt_in([card(0, "GTX 980", 4.0, "52")]))
+        with mock.patch.dict(os.environ, {"STRATA_EXPERIMENTAL_SM60": "1"}):
+            self.assertEqual(setup.old_gpus_opt_in([rtx, v100]), "STRATA_EXPERIMENTAL_SM60=1")
+
+    def test_named(self):
+        self.assertEqual(setup.named_gpus(None, "0,2"), [0, 2])
+        self.assertEqual(setup.named_gpus(1, None), [1])
+        self.assertEqual(setup.named_gpus(None, "all"), [])
+        self.assertEqual(setup.named_gpus(None, "x"), [])
+
+    def test_the_gate_follows_the_opt_in(self):
+        with mock.patch.object(setup, "OLD_GPUS", None):
+            self.assertIsNotNone(setup.gpu_problem(V100))
+        with mock.patch.object(setup, "OLD_GPUS", "you chose GPU 0"):
+            self.assertIsNone(setup.gpu_problem(V100))
+            self.assertIsNotNone(setup.gpu_problem(card(0, "GTX 980", 4.0, "52")))
+
+
+class Libraries(unittest.TestCase):
+    def test_cuda12_wheels_two_folders(self):
+        with tempfile.TemporaryDirectory() as d:
+            sp = Path(d) / "site-packages"
+            names = {"cublas/bin/cublas64_12.dll", "cuda_runtime/bin/cudart64_12.dll", "cu13/bin/x86_64/cublas64_13.dll",
+                     "cublas/lib/libcublas.so.12", "cuda_runtime/lib/libcudart.so.12", "cu13/lib/libcublas.so.13"}
+            for n in names:
+                f = sp / "nvidia" / n
+                f.parent.mkdir(parents=True, exist_ok=True)
+                f.write_bytes(b"")
+            with mock.patch.object(sys, "path", [str(sp)]):
+                for win in (True, False):
+                    with mock.patch.object(setup, "WIN", win):
+                        got12 = sorted(Path(x).relative_to(sp / "nvidia").as_posix() for x in setup.cuda_lib_dirs(12))
+                        got13 = [Path(x).relative_to(sp / "nvidia").as_posix() for x in setup.cuda_lib_dirs()]
+                    if win:
+                        self.assertEqual(got12, ["cublas/bin", "cuda_runtime/bin"])
+                        self.assertEqual(got13, ["cu13/bin/x86_64"])
+                    else:
+                        self.assertEqual(got12, ["cublas/lib", "cuda_runtime/lib"])
+                        self.assertEqual(got13, ["cu13/lib"])
+
+    def test_wheels_pinned_to_12(self):
+        self.assertTrue(all("-cu12==12." in w for w in setup.CUDA12_WHEELS))
+        self.assertEqual(setup.CUDA12_ASSET, "strata-windows-x64-cuda12.zip" if setup.WIN else
+                         "strata-linux-x64-cuda12.zip")
+
+
+class BuildTools(unittest.TestCase):
+    """The compile path: a CUDA 12 engine looks for a 12.x toolkit (STRATA_NVCC picks one), sm_120 needs 12.8+."""
+
+    def tools(self, gpu, nvcc):
+        seen = []
+
+        def find(below=None):
+            seen.append(below)
+            return nvcc(below)
+
+        with mock.patch.object(setup, "find_nvcc", find), mock.patch.object(setup, "find_vcvars", lambda: "vcvars"), \
+                mock.patch.object(setup.shutil, "which", lambda n: "/usr/bin/" + n):
+            got, text = quiet(setup.install_build_tools, gpu, True)
+        return got, seen, text
+
+    def test_cuda12_on_a_newer_card(self):
+        got, seen, _ = self.tools({"arch": "86", "archs": [86], "toolkit": 12},
+                                  lambda below: ("nvcc12", (12, 9)) if below else ("nvcc13", (13, 0)))
+        self.assertEqual((got[0], seen), ("nvcc12", [(13, 0)]))
+
+    def test_sm120_in_a_cuda12_engine_warns_and_needs_12_8(self):
+        got, _, text = self.tools({"arch": "70", "archs": [70, 120]},
+                                  lambda below: ("nvcc12", (12, 9)) if below else ("nvcc13", (13, 0)))
+        self.assertEqual(got[0], "nvcc12")
+        self.assertIn("#220", text)
+        with self.assertRaises(SystemExit):
+            self.tools({"arch": "70", "archs": [70, 120]}, lambda below: ("nvcc12", (12, 6)) if below else (None, None))
+
+
+def fake_prebuilt(calls):
+    """get_prebuilt that installs an engine in the folder of the toolkit it is asked for (and says which)."""
+    def get(url_base, gpu, vision, updating=False, toolkit=13):
+        calls.append(toolkit)
+        eng = setup.engine_dir(toolkit)
+        eng.mkdir(exist_ok=True)
+        (eng / "BUILD.json").write_text(json.dumps({"version": "0.1.39", "source": "release", "archs": [86], "ptx": True,
+                                                    "cuda": "12.9" if toolkit == 12 else "13.0", "vision": "gpu"}))
+        (eng / setup.EXE).write_bytes(b"")
+        return eng
+    return get
+
+
+class Install(unittest.TestCase):
+    """setup.main() on mocked PCs (tools/test_setup_golden.py's harness)."""
+
+    def run_setup(self, ram, found, argv, env=None):
+        calls, libs = [], []
+        extra = [mock.patch.object(setup, "get_prebuilt", fake_prebuilt(calls)),
+                 mock.patch.object(setup, "pip_cuda_libs", lambda tk=13: libs.append(tk)),
+                 mock.patch.object(setup, "OLD_GPUS", None),
+                 mock.patch.dict(os.environ, {"STRATA_EXPERIMENTAL_SM60": "", "STRATA_CUDA": "", **(env or {})})]
+        code, out, cfg, asked = install(ram, found, argv, extra=extra)
+        return code, out, cfg, calls, libs
+
+    def test_a_v100_alone_gets_the_cuda12_engine(self):
+        code, out, cfg, calls, libs = self.run_setup(95.0, [V100], argv_for("qwen", "IQ3_XXS"))
+        self.assertEqual(code, 0, out[-3000:])
+        self.assertEqual((calls, libs), ([12], [12]))
+        self.assertEqual(cfg["cuda"], 12)
+        self.assertEqual(cfg["exe"], "<T>/engine-cuda12/<EXE>")
+        self.assertIn("sm_70 is older than CUDA 13 supports", out)
+        self.assertIn("experimental", out)
+
+    def test_a_p40_with_an_older_driver(self):
+        code, out, cfg, calls, _ = self.run_setup(95.0, [P40], argv_for("qwen", "IQ3_XXS"))
+        self.assertEqual(code, 0, out[-3000:])                 # driver 535: enough for CUDA 12
+        self.assertEqual(calls, [12])
+
+    def test_a_newer_card_beside_a_v100_is_unchanged(self):
+        """The RTX 3090 is recommended as before; the V100 is listed with how to choose it."""
+        rtx = card(0, "NVIDIA GeForce RTX 3090", 24.0, "86")
+        found = [rtx, {**V100, "index": 1}]
+        code, out, cfg, calls, libs = self.run_setup(95.0, found, argv_for("qwen", "IQ3_XXS"))
+        code0, _, cfg0, _ = install(95.0, [rtx], argv_for("qwen", "IQ3_XXS"))
+        self.assertEqual(code, 0, out[-3000:])
+        self.assertEqual((calls, libs), ([13], [13]))
+        self.assertNotIn("cuda", cfg)
+        self.assertEqual(cfg["exe"], "<T>/engine/<EXE>")
+        self.assertIn("choose it with --gpu 1", out)
+        skip = ("gpu", "gpus_asked", "lib_dirs")       # one card vs two; the fake engine's library folders
+        self.assertEqual({k: v for k, v in cfg.items() if k not in skip}, {k: v for k, v in cfg0.items() if k not in skip})
+
+    def test_naming_the_v100_beside_a_newer_card(self):
+        found = [card(0, "NVIDIA GeForce RTX 3090", 24.0, "86"), {**V100, "index": 1}]
+        code, out, cfg, calls, _ = self.run_setup(95.0, found, argv_for("qwen", "IQ3_XXS") + ["--gpu", "1"])
+        self.assertEqual(code, 0, out[-3000:])
+        self.assertEqual(calls, [12])
+        self.assertEqual((cfg["cuda"], cfg["gpu"]), (12, 1))
+        self.assertIn("you chose GPU 1", out)
+
+    def test_cuda12_asked_for_on_a_newer_card(self):
+        ram, found = PROFILES["128GB-1x24GB"]
+        for argv, env in ((["--cuda", "12"], None), ([], {"STRATA_CUDA": "12"})):
+            with self.subTest(argv=argv, env=env):
+                code, out, cfg, calls, _ = self.run_setup(ram, found, argv_for("qwen", "IQ3_XXS") + argv, env)
+                self.assertEqual(code, 0, out[-3000:])
+                self.assertEqual((calls, cfg["cuda"]), ([12], 12))
+                self.assertIn("--cuda 12 (as you chose", out)
+
+    def test_an_old_driver_is_told_about_cuda12(self):
+        code, out, _, _, _ = self.run_setup(127.8, [card(0, "NVIDIA GeForce RTX 4090", 24.0, "89", "550.54")],
+                                            argv_for("qwen", "IQ3_XXS"))
+        self.assertEqual(code, 1)
+        self.assertIn("580 or newer is needed", out)
+        self.assertIn("--cuda 12", out)
+        code, out, cfg, calls, _ = self.run_setup(127.8, [card(0, "NVIDIA GeForce RTX 4090", 24.0, "89", "550.54")],
+                                                  argv_for("qwen", "IQ3_XXS") + ["--cuda", "12"])
+        self.assertEqual(code, 0, out[-3000:])
+        self.assertEqual(calls, [12])
+
+    def test_cuda13_forced_on_a_v100_is_said(self):
+        code, out, cfg, calls, _ = self.run_setup(95.0, [V100], argv_for("qwen", "IQ3_XXS") + ["--cuda", "13"])
+        self.assertIn("will not run on that card", out)
+
+
+class Start(unittest.TestCase):
+    """At a start: a Pascal / Volta card added to a CUDA 13 model moves that model to the CUDA 12 engine; updates
+    look at both engine folders."""
+
+    def test_an_old_card_added_moves_the_model(self):
+        with tempfile.TemporaryDirectory() as d:
+            root = Path(d)
+            cfg_path = root / "strata-iq3_xxs.json"
+            cfg = {"exe": str(root / "engine" / setup.EXE), "args": [], "lib_dirs": ["<cu13>"]}
+            calls = []
+            with mock.patch.object(setup, "ROOT", root), \
+                    mock.patch.object(setup, "get_prebuilt", fake_prebuilt(calls)), \
+                    mock.patch.object(setup, "pip_cuda_libs", lambda tk=13: None), \
+                    mock.patch.object(setup, "cuda_lib_dirs", lambda tk=13: [f"<cu{tk}>"]), \
+                    mock.patch.object(setup, "gpu_info", lambda i=None: None):
+                got, text = quiet(setup.ensure_engine_for, [card(0, "RTX 3090", 24.0, "86"), {**V100, "index": 1}],
+                                  cfg_path, dict(cfg), True)
+            self.assertEqual(calls, [12])
+            self.assertEqual(Path(got["exe"]).parent.name, "engine-cuda12")
+            self.assertEqual((got["cuda"], got["lib_dirs"]), (12, ["<cu12>"]))
+            self.assertIn("moves to the experimental CUDA 12 engine", text)
+            self.assertEqual(json.loads(cfg_path.read_text())["cuda"], 12)
+
+    def test_update_looks_at_both_engines(self):
+        with tempfile.TemporaryDirectory() as d:
+            root = Path(d)
+            seen = []
+            real = setup.update_installed_engine
+
+            def spy(url_base, toolkit=None):
+                if toolkit is None:
+                    return real(url_base, toolkit)
+                seen.append(toolkit)
+            with mock.patch.object(setup, "ROOT", root), mock.patch.object(setup, "update_installed_engine", spy):
+                spy("u")
+                self.assertEqual(seen, [13])
+                (root / "engine-cuda12").mkdir()
+                (root / "engine-cuda12" / "BUILD.json").write_text("{}")
+                seen.clear()
+                spy("u")
+                self.assertEqual(seen, [13, 12])
+
+
+if __name__ == "__main__":
+    unittest.main()

From 870ebe92bfcdc51111955424cca5b120e4af102e Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:44:03 +0200
Subject: [PATCH 164/201] router_dot_parity: the router lookahead's AVX2 and
 AVX1 dots against a double reference

Random BF16 rows of the router's shape [512 x 2560], 1..8 tokens: both within 3.3e-7 of the double
sums on a Ryzen 5 7600 (0.53 ms and 0.50 ms per layer for 4 tokens). Two ctest entries, the second with
STRATA_FORCE_ISA=avx (the AVX-only CPU's path). Test program only.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                        |  7 +++
 src/kernels/cpu/router_dot_parity.cpp | 70 +++++++++++++++++++++++++++
 2 files changed, 77 insertions(+)
 create mode 100644 src/kernels/cpu/router_dot_parity.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 1b41705966e..c423e8692f4 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -939,6 +939,13 @@ if(STRATA_NATIVE_EXPERTS)
   endif()
   target_link_libraries(strata_kernels_cpu PUBLIC ggml-cpu ggml-base)
   target_compile_definitions(strata_kernels_cpu PUBLIC STRATA_NATIVE_EXPERTS=1)
+  # the router lookahead's dot on each rung this CPU has (AVX2, the older CPUs' AVX1) against a double reference
+  add_executable(router_dot_parity src/kernels/cpu/router_dot_parity.cpp)
+  target_link_libraries(router_dot_parity PRIVATE strata_kernels_cpu)
+  if(STRATA_BUILD_TESTS)
+    add_test(NAME router_dot_parity COMMAND router_dot_parity)
+    add_test(NAME router_dot_parity_avx COMMAND ${CMAKE_COMMAND} -E env STRATA_FORCE_ISA=avx $<TARGET_FILE:router_dot_parity>)
+  endif()
   set(_strata_mmq_types q2_0 iq2_xxs iq2_xs iq2_s iq3_xxs iq3_s iq4_nl iq4_xs q8_0)
   # #296: OrcaRouter Q4_K_S's Q5_0 experts (Q4_K and Q5_1 come with STRATA_MMQ_KQUANTS on CUDA, S5's branch)
   if(STRATA_ORCA_Q4KS_MMQ)
diff --git a/src/kernels/cpu/router_dot_parity.cpp b/src/kernels/cpu/router_dot_parity.cpp
new file mode 100644
index 00000000000..bd1341b9497
--- /dev/null
+++ b/src/kernels/cpu/router_dot_parity.cpp
@@ -0,0 +1,70 @@
+// src/kernels/cpu/router_dot_parity.cpp - the router lookahead's BF16 dot on each rung this CPU has: the AVX2 kernel
+// (kq_avx2.cpp) and the AVX1 one for older CPUs (kq_avx1.cpp), against a double-precision reference, plus the time
+// of one layer's router.  No GPU, no model: random BF16 rows of the model's router shape [512 x 2560], 1..8 tokens.
+//
+//     router_dot_parity            (STRATA_FORCE_ISA=avx leaves out the AVX2 kernel, as on an AVX-only CPU)
+#include "strata/kernels/cpu/expert_layout.hpp"
+#include "strata/kernels/cpu/kq_avx1.hpp"
+#include "strata/kernels/cpu/kq_avx2.hpp"
+
+#include <algorithm>
+#include <chrono>
+#include <cmath>
+#include <cstdint>
+#include <cstdio>
+#include <cstring>
+#include <random>
+#include <vector>
+
+namespace cpu = strata::kernels::cpu;
+
+int main() {
+    constexpr int R = 512, C = 2560, MAXT = 8;
+    std::mt19937 rng(7);
+    std::normal_distribution<float> nd(0.f, 0.05f);
+    std::vector<uint16_t> w((size_t) R * C);
+    for (auto& v : w) {
+        const float f = nd(rng);
+        uint32_t b;
+        std::memcpy(&b, &f, 4);
+        v = (uint16_t) (b >> 16);
+    }
+    std::vector<float> x((size_t) MAXT * C);
+    for (auto& v : x) v = nd(rng) * 20.f;
+    std::vector<double> ref((size_t) MAXT * R);
+    for (int t = 0; t < MAXT; ++t)
+        for (int r = 0; r < R; ++r) {
+            double s = 0;
+            for (int c = 0; c < C; ++c) {
+                const uint32_t b = (uint32_t) w[(size_t) r * C + c] << 16;
+                float f;
+                std::memcpy(&f, &b, 4);
+                s += (double) f * x[(size_t) t * C + c];
+            }
+            ref[(size_t) t * R + r] = s;
+        }
+    int failures = 0;
+    auto run = [&](const char* tag, void (*fn)(const uint16_t*, int, int, const float*, int, float*)) {
+        std::vector<float> out((size_t) MAXT * R);
+        for (int nt = 1; nt <= MAXT; ++nt) {
+            std::fill(out.begin(), out.end(), 0.f);
+            fn(w.data(), R, C, x.data(), nt, out.data());
+            double num = 0, den = 0;
+            for (int i = 0; i < nt * R; ++i) { num += std::fabs(out[(size_t) i] - ref[(size_t) i]); den += std::fabs(ref[(size_t) i]); }
+            const double rel = num / (den + 1e-30);
+            if (nt == 1 || nt == MAXT) std::printf("  %-5s nt=%d rel %.2e vs the double reference\n", tag, nt, rel);
+            if (!(rel < 1e-5)) { std::printf("  %-5s nt=%d MISMATCH\n", tag, nt); ++failures; }
+        }
+        const int it = 20;
+        const auto t0 = std::chrono::steady_clock::now();
+        for (int i = 0; i < it; ++i) fn(w.data(), R, C, x.data(), 4, out.data());
+        const double ms = std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - t0).count() / it;
+        std::printf("  %-5s one layer's router, 4 tokens: %.3f ms\n", tag, ms);
+    };
+    std::printf("router_dot_parity: %s (avx2 %d, avx %d)\n", cpu::cpu_name().c_str(), (int) cpu::cpu_avx2_ok(),
+                (int) cpu::cpu_avx1_ok());
+    if (cpu::cpu_avx2_ok()) run("avx2", cpu::bf16_rows_dot_multi);
+    if (cpu::cpu_avx1_ok()) run("avx", cpu::bf16_rows_dot_multi_avx1);
+    std::printf("router_dot_parity: %d failures\n", failures);
+    return failures == 0 ? 0 : 1;
+}

From a43e0800d2aca06e1f6d3a52ac05d376d1f2bbbd Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:44:14 +0200
Subject: [PATCH 165/201] docs: Older GPUs (experimental) - the support matrix,
 the CUDA 12 engine and how to opt in

docs/OLDER_GPUS.md: Pascal / Volta through the CUDA 12 engine (#395 #600 #540 #655), RTX 20's STRATA_BF16_TC opt-in,
AMD gfx1031 (#524), gfx1012 (#442) and gfx906 (#638, #677) with the reporters' numbers; README, AI_SETUP, AMD_HIP and
NVIDIA_V100 point to it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 README.md           |   2 +
 docs/AI_SETUP.md    |   3 +-
 docs/AMD_HIP.md     |   7 ++-
 docs/NVIDIA_V100.md |   7 +--
 docs/OLDER_GPUS.md  | 110 ++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 123 insertions(+), 6 deletions(-)
 create mode 100644 docs/OLDER_GPUS.md

diff --git a/README.md b/README.md
index b702820a699..dfa1950912c 100644
--- a/README.md
+++ b/README.md
@@ -58,6 +58,8 @@ other cards: [speed of each model](docs/MODELS.md#how-fast-is-each-size), [commu
 | **System** | Windows 10 / 11 or Linux, and a current graphics driver from NVIDIA or AMD |
 
 Everything else is installed for you. Two or three cards can share the model ([multi-GPU](docs/MULTI_GPU.md)).
+Older cards (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT) run through community-written,
+experimental paths: [Older GPUs](docs/OLDER_GPUS.md).
 The full list: [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
 
 ## Install
diff --git a/docs/AI_SETUP.md b/docs/AI_SETUP.md
index 8b6e1bb96c6..ad28533c875 100644
--- a/docs/AI_SETUP.md
+++ b/docs/AI_SETUP.md
@@ -44,7 +44,8 @@ Requirements (details: [INSTALL.md](INSTALL.md#what-you-need)):
 
 - **GPU:** NVIDIA RTX 20, 30, 40 or 50 series, or AMD Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT,
   RX 9070 / 9070 XT, Radeon AI PRO R9700, RX 6800 / 6900 series; 12 GB of VRAM or more (an NVIDIA card with 8 GB runs,
-  slowly). GTX 10 series and older, and integrated GPUs, are not supported.
+  slowly). GTX 10 series and older, and integrated GPUs, are not supported; Pascal / Volta cards (P40, V100) and some
+  older AMD cards have experimental paths the user opts into ([OLDER_GPUS.md](OLDER_GPUS.md)).
 - **Driver:** NVIDIA 580 or newer. AMD on Linux: the kernel's amdgpu driver; on Windows: a current AMD Adrenalin
   driver. If the driver is missing or too old, tell the user to update it (NVIDIA App / nvidia.com/drivers, or AMD
   Software) and restart; do not install drivers yourself unless they ask.
diff --git a/docs/AMD_HIP.md b/docs/AMD_HIP.md
index 65409a756ad..35b06264849 100644
--- a/docs/AMD_HIP.md
+++ b/docs/AMD_HIP.md
@@ -348,8 +348,11 @@ run it; the report below is from a community machine: an RX 6900 XT 16 GB (gfx10
   [AMD_HIP_PERFORMANCE.md](AMD_HIP_PERFORMANCE.md) cost 8.6 and 13.6 tok/s here (30 with the defaults): keep the
   defaults on a 16 GB card.
 - **hipBLASLt:** ROCm's hipBLASLt ships no gfx1030 kernels, so there is no table and the plain hipBLAS path runs.
-- **Not validated:** gfx1031 / gfx1032 (the same `dp4a` path, no hardware report), setup's own build path and the
-  `gfx103X-all` wheels on gfx1030, images, answer-quality benchmarks.
+- **gfx1031** (RX 6700 XT, #524): setup knows it (the `gfx103X-all` wheels, unvalidated); its reporter runs it daily
+  on one card.
+- **Not validated:** gfx1032 (the same `dp4a` path, no hardware report), setup's own build path and the
+  `gfx103X-all` wheels on gfx1030, images, answer-quality benchmarks. RDNA1 (gfx1012, RX 5500 XT) builds by hand:
+  [OLDER_GPUS.md](OLDER_GPUS.md#amd-building-gfx906-and-gfx1012).
 
 ## gfx906 (Instinct MI50 / MI60, Radeon VII): wave64, built from source
 
diff --git a/docs/NVIDIA_V100.md b/docs/NVIDIA_V100.md
index 197861b9515..7e8b0c45fe8 100644
--- a/docs/NVIDIA_V100.md
+++ b/docs/NVIDIA_V100.md
@@ -14,8 +14,8 @@ cmake -S . -B build -DSTRATA_ENABLE_CUDA=ON -DSTRATA_BUILD_TESTS=OFF \
 cmake --build build --target strata -j
 ```
 
-`STRATA_EXPERIMENTAL_SM60=1 ./setup.sh` does the same through setup (it compiles the engine on the PC instead of
-downloading it). For a PC with a V100 and a newer card, a build for both architectures (`-DCMAKE_CUDA_ARCHITECTURES="70;86"`) is the
+Setup does the same by itself for a model on a V100 (the experimental CUDA 12 engine, in `engine-cuda12/`: ready-made
+on Windows, compiled with a CUDA 12.x toolkit on Linux; [OLDER_GPUS.md](OLDER_GPUS.md)). For a PC with a V100 and a newer card, a build for both architectures (`-DCMAKE_CUDA_ARCHITECTURES="70;86"`) is the
 natural choice (a community report in issue #509 ran an RTX 3080 beside a V100 that way; it was not repeated here). On the
 measuring PC a Quadro RTX 4000 (sm_75) sits beside the V100s and was hidden with `CUDA_VISIBLE_DEVICES` because the sm_70-only
 build has no code for it.
@@ -29,7 +29,8 @@ select "old" kernels everywhere: which kernel runs is decided per architecture w
 | --- | --- |
 | MoE experts (ggml MMQ) | `dp4a` kernels (Volta has no int8 tensor cores) |
 | Dense projections (dequantized weights) | FP16 tensor-core GEMMs (cuBLAS / CUTLASS `s884`) |
-| BF16 projections (hyper-connection, router, indexer, ...) | cuBLAS BF16, which runs as an FP32 SIMT kernel on Volta (`magma_sgemmEx`); #540 moves it onto the FP16 tensor cores |
+| BF16 projections (hyper-connection, router, indexer, ...) | converted to FP16 and run on the FP16 tensor cores (#655, #540; `STRATA_BF16_TC=0`: cuBLAS BF16, an FP32 SIMT kernel on Volta) |
+| QSA attention for decode and verify windows (and prompts with `STRATA_PROMPT_ATTN_OLD=1`) | #540's kernel (fewer shuffles, bit-exact; `STRATA_ATTN_PRE75=0`: the one other cards run) |
 | QSA prompt attention, int8 / FP16 / K8V4 KV | `prompt_attn_v70_kernel` on `mma.m8n8k4` (`STRATA_PROMPT_ATTN_OLD=1`: the decode kernel, one query at a time) |
 | QSA prompt attention, Q4_0 KV | the decode kernel |
 | QSA block scores | the warp kernel (the tensor-core scorer needs sm_80) |
diff --git a/docs/OLDER_GPUS.md b/docs/OLDER_GPUS.md
new file mode 100644
index 00000000000..05acac20b76
--- /dev/null
+++ b/docs/OLDER_GPUS.md
@@ -0,0 +1,110 @@
+# Older GPUs (experimental)
+
+Strata's supported cards are NVIDIA RTX 20 / 30 / 40 / 50 and the AMD cards in [AMD_HIP.md](AMD_HIP.md). The cards
+below run through **opt-in, experimental** paths that community members wrote and measured on their own machines. The
+maintainers have none of these cards: each path is compile-checked and unit-tested here, and the ready-made engines
+and their output stay exactly as they were. Numbers are the reporters' own, on one machine each.
+
+## Support matrix
+
+### NVIDIA
+
+| Cards | Compute capability | How it runs | What is different on it | Reported |
+| --- | --- | --- | --- | --- |
+| Tesla P100 | 6.0 | the CUDA 12 engine | `__dp4a` emulated (bit-exact); BF16 projections through fp32 | not measured |
+| Tesla P40 / P4, GTX 10 series | 6.1 | the CUDA 12 engine | BF16 projections through fp32 (cuBLAS has no BF16 GEMM there, #395) | P40, IQ3_S, engine 0.1.30: prompt 217-374 tok/s, decode 30-33 tok/s (#395) |
+| Tesla V100, Titan V | 7.0 | the CUDA 12 engine | BF16 projections on the FP16 tensor cores (#655, #540); the prompt attention on `mma.m8n8k4` (#600); a leaner attention kernel (#540) | V100-PCIE-32GB, UD-IQ4_XS: prompt 1,123-1,251 tok/s (#600); V100 32GB, IQ2_XS: prompt +22% from #540 |
+| RTX 20 (Turing) | 7.5 | **supported**, the ready-made engine | opt-in: `STRATA_BF16_TC=1` runs the BF16 projections on the FP16 tensor cores | RTX 2080 Ti, Q2_0: prompt +15-18% (#655) |
+
+A card needs enough VRAM to be useful: 12 GB or more is recommended, as for every card (a 2 GB GT 1030 is compute
+capability 6.1 too, and cannot hold any of the model).
+
+### AMD
+
+| Cards | Architecture | How it runs | Reported |
+| --- | --- | --- | --- |
+| RX 6800 / 6900 series | gfx1030 | setup (`--backend hip`), unvalidated | [AMD_HIP.md](AMD_HIP.md#rdna2-gfx1030) |
+| RX 6700 XT | gfx1031 | setup (`--backend hip`), unvalidated (#524) | used daily by its reporter, one card |
+| RX 5500 XT (RDNA1) | gfx1012 | built by hand: `-DCMAKE_HIP_ARCHITECTURES=gfx1012` (HIP 5.7 or 7) | 8 GB card, IQ3_S, 8K prompt: 15.3 tok/s decode (#442) |
+| Instinct MI50 / MI60, Radeon VII | gfx906 (wave64) | built by hand: `-DSTRATA_HIP_GFX906=ON` | 2x MI50, Coder IQ1_M, 128K context: decode 50.1 / 47.8 / 45.7 tok/s at 4K / 32K / 128K prompt tokens, prompt ~520 tok/s (#677) |
+
+## NVIDIA: the CUDA 12 engine
+
+CUDA 13 dropped Pascal and Volta: it cannot compile for them. Setup therefore keeps a **second engine**, built with
+CUDA 12.9 and `-DSTRATA_EXPERIMENTAL_SM60=ON`, in its own folder (`engine-cuda12\`, beside `engine\`). One engine runs
+per model, so the choice is made per model, by the oldest card that model runs on:
+
+- **Every card the model uses is RTX 20 or newer:** the ready-made CUDA 13 engine, as always.
+- **A card is Pascal or Volta:** the CUDA 12 engine. Setup says so (`CUDA 12: sm_70 is older than CUDA 13 supports
+  ...`). On Windows it downloads `strata-windows-x64-cuda12.zip` with NVIDIA's CUDA 12 libraries (from pip, like the
+  CUDA 13 ones); on Linux, or with `--build`, it compiles the engine with a CUDA 12.x toolkit.
+
+### Opting in
+
+An older card is used only when you choose it; a PC with a newer card keeps recommending the newer one.
+
+| You | Setup |
+| --- | --- |
+| have only Pascal / Volta NVIDIA cards (and no AMD card it can use) | uses them, with the CUDA 12 engine |
+| name the card: `START-HERE.bat --setup --gpu 1`, or `--gpus 0,1` with a newer card | uses it; the model gets the CUDA 12 engine |
+| `--cuda 12` (or `STRATA_CUDA=12`) | the CUDA 12 engine for this model, on any card |
+| `--cuda 13` | the CUDA 13 engine even with an older card (a warning: it has no code for that card) |
+| `STRATA_EXPERIMENTAL_SM60=1` | the older cards are listed as usable (the setting from #295 still works) |
+
+The choice is kept in the model's config (`"cuda": 12`): its starts and `UPDATE.bat` keep it, and other models keep
+their own engine. Setting the model up again chooses again (by its cards; add `--cuda 12` to keep a forced choice). A Pascal / Volta card added to a model at a start (`--gpus`) moves that model to the
+CUDA 12 engine.
+
+`--cuda 12` is also the way to run Strata with an NVIDIA driver older than 580 (CUDA 12 needs 525 or newer): setup's
+"driver too old" stop says so.
+
+### Mixed cards
+
+A model that shares a V100 with an RTX 30 / 40 card runs both on the CUDA 12 engine (it has code for sm_60 to sm_89,
+plus PTX). An RTX 50 card (sm_120) in a CUDA 12 engine is a warning, not a stop: CUDA 12.8 and newer compile for it,
+but engines built with 12.8 crashed on long prompts there (#220, #224). Keep the RTX 50 card on its own model (`--gpu
+N`), where it runs the CUDA 13 engine.
+
+### Building it yourself
+
+```sh
+# Linux (Windows: the same with the toolkit's nvcc.exe)
+cmake -S . -B build-cuda12 -DSTRATA_ENABLE_CUDA=ON -DSTRATA_BUILD_TESTS=OFF -DSTRATA_EXPERIMENTAL_SM60=ON \
+      -DCMAKE_CUDA_ARCHITECTURES="61;70" -DCMAKE_CUDA_COMPILER=/usr/local/cuda-12.9/bin/nvcc
+cmake --build build-cuda12 --target strata -j
+```
+
+Setup does the same when it compiles: it looks for the newest CUDA 12.x toolkit (`STRATA_NVCC=<path to nvcc>` picks
+one, #601; on glibc 2.43 use 12.8, see [TROUBLESHOOTING.md](TROUBLESHOOTING.md)).
+
+### What the flag changes, and what it does not
+
+`-DSTRATA_EXPERIMENTAL_SM60=ON` lowers the runtime floor to compute capability 6.0 and compiles the older cards' code
+paths into that build only: the Volta prompt attention (#600), #540's attention kernel (used below sm_75), and the
+Pascal BF16 path. The ready-made CUDA 13 engine has none of them, so its kernels and its output are unchanged. The
+FP16 path for BF16 projections is in every build but runs by default only below sm_75; RTX 20 owners can try it with
+`STRATA_BF16_TC=1` (`=0` turns it off on a V100). It is not bitwise the same as cuBLAS's BF16 kernel (FP16 tensor-core
+sums round differently): #540 measured a mean KL of 8.4e-3 on the next-token distribution of 24 code prompts on a V100
+(the same top-1 in 23), the size of other summation-order changes; #655 a worst relative difference of 3.5e-5 per
+product on an RTX 2080 Ti.
+
+A/B switches: `STRATA_BF16_TC=0|1`, `STRATA_PROMPT_ATTN_OLD=1` (the decode kernel for prompts), `STRATA_ATTN_PRE75=0`
+(#540's kernel off). [NVIDIA_V100.md](NVIDIA_V100.md) has the V100 build, its measurements and the parity test.
+
+## AMD: building gfx906 and gfx1012
+
+Setup does not build these; build by hand and run `serve/server.py` with a config, as on any other card.
+
+- **gfx906** (MI50 / MI60 / Radeon VII, wave64): a separate opt-in build, `-DSTRATA_HIP_GFX906=ON
+  -DCMAKE_HIP_ARCHITECTURES=gfx906` (not `STRATA_ENABLE_HIP`). Current ROCm no longer ships gfx906 libraries; the
+  reporter used a community ROCm 7.14 image. Recipe, kernels and measurements: [AMD_HIP.md](AMD_HIP.md#gfx906-instinct-mi50--mi60-radeon-vii-wave64-built-from-source).
+- **gfx1012** (RX 5500 XT): the wave32 backend, `-DSTRATA_ENABLE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1012`. HIP 5.7
+  (Ubuntu's packages) works: older hipBLAS (0.x) is used through rocBLAS, the legacy HIP names and the missing
+  `__syncwarp` are version-gated, and RDNA1's missing signed dot4 uses llama.cpp's SDWA sequence
+  (`-DSTRATA_GFX1012_PORTABLE_DOT=ON`: the portable one).
+
+## Reports welcome
+
+These paths stay experimental until more people run them. A report with the card, the driver / ROCm version, the
+model and the engine log (`strata-<model>.log`) in an issue helps; [COMMUNITY_BENCHMARKS.md](COMMUNITY_BENCHMARKS.md)
+has the format for measurements.

From 58eee0a140ee967bc3cfe2aeac73ba364575a8cd Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sat, 3 Oct 2026 23:45:31 +0200
Subject: [PATCH 166/201] setup: the offer to share a model across two cards
 checks the model's own engine (CUDA 12 or 13)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/setup.py b/setup.py
index dac1d4e5d21..766d50115a9 100644
--- a/setup.py
+++ b/setup.py
@@ -842,7 +842,8 @@ def offer_together(cfg_path: Path, cfg: dict, yes: bool) -> dict:
     short = split_short(pair)             # #448: one card recommended (asked "n" by default), as for --resident
     for g in short:
         say(f"  {split_short_note(g)}.")
-    missing = [g for g in pair if not engine_runs_on(g)]
+    tk = config_toolkit(cfg)
+    missing = [g for g in pair if not (engine_runs_on(g) if tk == 13 else engine_runs_on(g, tk))]
     if missing:
         say("  The installed engine has no code for " + ", ".join(g["name"] for g in missing) + ": to use them "
             "together, run START-HERE.bat --setup --gpus " + ",".join(str(g["index"]) for g in pair))
@@ -3251,7 +3252,7 @@ def ensure_engine_for(cards, cfg_path: Path, cfg: dict, yes: bool) -> dict:
     tk = config_toolkit(cfg)
     if tk == 13 and any(int(g["arch"]) < CUDA13_MIN_ARCH for g in cards):
         return use_cuda12(cards, cfg_path, cfg, yes)
-    missing = [g for g in cards if not engine_runs_on(g, tk)]
+    missing = [g for g in cards if not (engine_runs_on(g) if tk == 13 else engine_runs_on(g, tk))]
     if not missing:
         return cfg
     eng = engine_dir(tk)

From 5047172c5941463defee81a39c0ba676831d4387 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:08:15 +0200
Subject: [PATCH 167/201] sycl: port 0.1.39 (re-migration with dpct 2025.3,
 3-way merge per docs/INTEL.md)

The SYCL port of PR #423 tracked 0.1.38; 13 of its migrated copies were behind
0.1.39's sources. Re-migrated 0.1.38 and 0.1.39 with sycl/tools/migrate.sh,
normalized, merged with sycl/tools/merge_upstream.py:

- clean merges: expert_cache, expert_source, native_dense, pinned, elementwise,
  kv_stream, iq_multi_parity, prefill, verify.hpp; q8_1_finite.hpp new (#606)
- verify.cpp: the #649 trace kept with the port's queue handling
  (STRATA_VERIFY_TRACE; the HIP-only coherent/doorbell switches stay HIP-only)
- generate.cpp: the port's --prefill-borrow beside --vram-elastic/--vram-segment-mib
- iq_kernels / native_mmvq: the port's kernels kept, #606's finite q8_1 scale
  and sum applied by hand (dpct's conflicts there were kernel-name hashes)
- expert_cache: --vram-elastic (#533) is CUDA-only on the port too (no driver
  VMM on Level Zero through dpct); it reports so instead of failing to build
- version 0.1.39

Compiled here with icpx 2026.1.1 (SPIR-V, no Intel GPU on this PC): strata
builds. Not run on an Arc.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 sycl/CMakeLists.txt                         |   2 +-
 sycl/include/strata/core/verify.hpp         |   9 +
 sycl/include/strata/kernels/q8_1_finite.hpp |  41 ++
 sycl/src/core/expert_cache.cpp              | 320 ++++++++-
 sycl/src/core/expert_source.cpp             | 328 +++++++--
 sycl/src/core/native_dense.cpp              |   9 +
 sycl/src/core/pinned.dp.cpp                 |  20 +-
 sycl/src/core/verify.cpp                    | 135 +++-
 sycl/src/kernels/cuda/elementwise.dp.cpp    |  66 ++
 sycl/src/kernels/cuda/iq_kernels.dp.cpp     |   7 +-
 sycl/src/kernels/cuda/kv_stream.dp.cpp      |  23 +
 sycl/src/kernels/cuda/native_mmvq.dp.cpp    |   7 +-
 sycl/src/kernels/iq_multi_parity.cpp        |  78 +++
 sycl/src/prefill/prefill.cpp                |  60 +-
 sycl/src/program/generate.cpp               | 695 ++++++++++++++++++--
 15 files changed, 1666 insertions(+), 134 deletions(-)
 create mode 100644 sycl/include/strata/kernels/q8_1_finite.hpp

diff --git a/sycl/CMakeLists.txt b/sycl/CMakeLists.txt
index fb25d7d530a..1b6094afc31 100644
--- a/sycl/CMakeLists.txt
+++ b/sycl/CMakeLists.txt
@@ -10,7 +10,7 @@
 #
 # Device code is JIT-compiled from SPIR-V unless STRATA_SYCL_AOT names a device (bmg-g31 for the Arc Pro B70).
 cmake_minimum_required(VERSION 3.24)
-project(strata_sycl VERSION 0.1.38 LANGUAGES C CXX)   # the upstream engine version this port tracks
+project(strata_sycl VERSION 0.1.39 LANGUAGES C CXX)   # the upstream engine version this port tracks
 set(STRATA_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/..)
 set(CMAKE_CXX_STANDARD 20)
 set(CMAKE_CXX_STANDARD_REQUIRED ON)
diff --git a/sycl/include/strata/core/verify.hpp b/sycl/include/strata/core/verify.hpp
index 11144a6488e..0db24e25f44 100644
--- a/sycl/include/strata/core/verify.hpp
+++ b/sycl/include/strata/core/verify.hpp
@@ -61,6 +61,9 @@ class Verifier {
 
     /// The watchdog's view of the window in flight (issue #31): the layer, the GPU's sequence, the flags.
     void diag(std::FILE* f) const;
+    /// #649 (STRATA_VERIFY_TRACE=1, opt-in): the last windows' host-side handshake events and the GPU's breadcrumbs
+    /// (in mapped memory, so they read while the GPU hangs).  Nothing when the trace is off.
+    void trace_dump(std::FILE* f) const;
 
     /// #267: raise every flag the window's spin kernels wait on past any ring (UINT32_MAX), so a window the GPU
     /// cannot finish drains instead of staying resident, then wait up to `timeout_ms` for its streams.  For the
@@ -193,6 +196,12 @@ class Verifier {
     int pending_commit_ = 0;                  ///< n_keep of a launched, unfinished commit (0: none)
     std::chrono::steady_clock::time_point pending_commit_t0_{};
     bool record_window(int T, dpct::queue_ptr cs, std::string &err);
+    // #649: STRATA_VERIFY_TRACE=1 - a host event ring (trace_ev) and GPU breadcrumbs: the profiler's stamp points,
+    // per layer and token group, written to mapped memory (null when the trace is off)
+    void trace_ev(const char* what, int64_t step, int64_t layer, int64_t aux) const;
+    unsigned long long* trace_h_ = nullptr;
+    unsigned long long* trace_m_ = nullptr;
+    size_t trace_n_ = 0;
     static constexpr int kProfPer = 33;              // stamps per layer (32 left the hc-read second
                                       // half's up-stamp at slot 32 = the next layer's slot 0: D8)
     bool prof_on_ = false;
diff --git a/sycl/include/strata/kernels/q8_1_finite.hpp b/sycl/include/strata/kernels/q8_1_finite.hpp
new file mode 100644
index 00000000000..fd9909206a4
--- /dev/null
+++ b/sycl/include/strata/kernels/q8_1_finite.hpp
@@ -0,0 +1,41 @@
+// include/strata/kernels/q8_1_finite.hpp - #606: the q8_1 activation block's scale and sum, kept finite.
+//
+// A q8_1 block stores its scale d = amax / 127 and the sum of its 32 raw activations as fp16. A sum past 65504 (one
+// massive-activation dimension among 32 values is enough) rounds to inf, and d does past amax = 8.3M; the dot
+// products then read inf * 0 = NaN, and a NaN in the residual ends as one token repeated (ggml-org/llama.cpp#23606
+// is the same defect). Clamped to the largest finite half, such a block gives an approximate product instead of NaN,
+// and the values are held to the int8 range they then exceed. Every block that was finite before is stored bit for
+// bit as before: values in (65504, 65520) round to 65504 anyway, and a finite block's |x / d| is at most 127. A NaN
+// stays NaN (the comparisons are false for it), so STRATA_DBG_NAN still sees one.
+#pragma once
+
+#define DPCT_PROFILING_ENABLED
+#include <sycl/sycl.hpp>
+#include <dpct/dpct.hpp>
+
+namespace strata::kernels {
+
+constexpr float kHalfMax = 65504.0f;
+
+__dpct_inline__ float q8_1_finite(const float v) {
+    return sycl::fabs(v) > kHalfMax ? sycl::copysign((float)kHalfMax, (float)v)
+                                    : v;
+}
+
+/// The block's quantized value of `xi` for the (finite) scale `d`; `amax` = 0 is an all-zero block.
+__dpct_inline__ int8_t q8_1_quant(const float xi, const float d,
+                                  const float amax) {
+    if (amax == 0.0f) return 0;
+    const float q = sycl::round(xi / d);
+    return (int8_t) (q > 127.0f ? 127.0f : q < -127.0f ? -127.0f : q);
+}
+
+__dpct_inline__ sycl::half2 q8_1_ds(const float d, const float sum) {
+    return sycl::half2(
+        sycl::vec<float, 1>(q8_1_finite(d))
+            .convert<sycl::half, sycl::rounding_mode::automatic>()[0],
+        sycl::vec<float, 1>(q8_1_finite(sum))
+            .convert<sycl::half, sycl::rounding_mode::automatic>()[0]);
+}
+
+}  // namespace strata::kernels
diff --git a/sycl/src/core/expert_cache.cpp b/sycl/src/core/expert_cache.cpp
index e60d1fae05c..56cd011a530 100644
--- a/sycl/src/core/expert_cache.cpp
+++ b/sycl/src/core/expert_cache.cpp
@@ -1,10 +1,17 @@
-// src/core/expert_cache.cpp - R4's slot storage and residency table.  Read the header first.
+#define DPCT_COMPAT_RT_VERSION 12080
+// src/core/expert_cache.cpp - R4's slot storage and residency table.  Read the
+// header first.
 #define DPCT_PROFILING_ENABLED
 #include <sycl/sycl.hpp>
 #include <dpct/dpct.hpp>
 #include "strata/sycl_queue.hpp"
 #include "strata/core/expert_cache.hpp"
 
+#if !defined(STRATA_USE_HIP)
+   // #533: the virtual memory management types (the functions come through the
+   // runtime's entry points)
+#endif
+
 #include <algorithm>
 #include <cstdio>
 #include <filesystem>
@@ -144,6 +151,303 @@ bool write_expert_profile(const std::string& path, int64_t n_layers, int64_t n_e
 
 ExpertCache::~ExpertCache() { close(); }
 
+// ---- #533: the segmented arena (--vram-elastic).  The driver API's virtual memory functions, looked up through the
+// runtime (no link against the driver library): one address range for the whole arena, backed by physical segments,
+// and the tail's segments unmapped / mapped again later.  Nothing here runs unless a segment size was set.
+#if 0   // SYCL port: no driver virtual memory management (--vram-elastic is CUDA-only, #533)
+namespace {
+struct Vmm {
+    int(CUDAAPI *device_get)(int *, int) = nullptr;
+    int(CUDAAPI *attribute)(int *, CUdevice_attribute, int) = nullptr;
+    int(CUDAAPI *granularity)(
+        size_t *, const dpct::experimental::mem_prop *,
+        sycl::ext::oneapi::experimental::granularity_mode) = nullptr;
+    int(CUDAAPI *reserve)(dpct::device_ptr *, size_t, size_t, dpct::device_ptr,
+                          unsigned long long) = nullptr;
+    int(CUDAAPI *address_free)(dpct::device_ptr, size_t) = nullptr;
+    int(CUDAAPI *create)(dpct::experimental::physical_mem_ptr *, size_t,
+                         const dpct::experimental::mem_prop *,
+                         unsigned long long) = nullptr;
+    int(CUDAAPI *release)(dpct::experimental::physical_mem_ptr) = nullptr;
+    int(CUDAAPI *map)(dpct::device_ptr, size_t, size_t,
+                      dpct::experimental::physical_mem_ptr,
+                      unsigned long long) = nullptr;
+    int(CUDAAPI *unmap)(dpct::device_ptr, size_t) = nullptr;
+    int(CUDAAPI *set_access)(dpct::device_ptr, size_t,
+                             const dpct::experimental::mem_access_desc *,
+                             size_t) = nullptr;
+    bool ok = false;
+};
+
+template <class F> bool entry(const char *name, F &f) try {
+    void* p = nullptr;
+    cudaDriverEntryPointQueryResult q{};
+#if DPCT_COMPAT_RT_VERSION >= 12050
+    /*
+    DPCT1007: Migration of cudaGetDriverEntryPointByVersion is not
+    supported.
+    */
+    const dpct::err0 e = cudaGetDriverEntryPointByVersion(
+        name, &p, 12000, cudaEnableDefault, &q);
+#else
+    const cudaError_t e = cudaGetDriverEntryPoint(name, &p, cudaEnableDefault, &q);
+#endif
+    if (e != 0 || q != cudaDriverEntryPointSuccess || p == nullptr) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        return false;
+    }
+    f = reinterpret_cast<F>(p);
+    return true;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+const Vmm& vmm() {
+    static const Vmm v = [] {
+        Vmm x;
+        x.ok = entry("cuDeviceGet", x.device_get) && entry("cuDeviceGetAttribute", x.attribute) &&
+               entry("cuMemGetAllocationGranularity", x.granularity) && entry("cuMemAddressReserve", x.reserve) &&
+               entry("cuMemAddressFree", x.address_free) && entry("cuMemCreate", x.create) &&
+               entry("cuMemRelease", x.release) && entry("cuMemMap", x.map) && entry("cuMemUnmap", x.unmap) &&
+               entry("cuMemSetAccess", x.set_access);
+        return x;
+    }();
+    return v;
+}
+
+dpct::experimental::mem_prop device_prop(int dev) {
+    dpct::experimental::mem_prop prop{};
+    prop.type = 0;
+    prop.location.type = 1;
+    prop.location.id = dev;
+    return prop;
+}
+
+// one segment: a physical allocation mapped at `va`, readable and writable by this device
+bool map_segment(const Vmm &v, int dev, dpct::device_ptr va, size_t bytes,
+                 unsigned long long &handle) {
+    const dpct::experimental::mem_prop prop = device_prop(dev);
+    dpct::experimental::physical_mem_ptr h = 0;
+    if (v.create(&h, bytes, &prop, 0) != 0) return false;
+    if (v.map(va, bytes, 0, h, 0) != 0) {
+        v.release(h);
+        return false;
+    }
+    dpct::experimental::mem_access_desc access{};
+    access.location.type = 1;
+    access.location.id = dev;
+    access.flags =
+        sycl::ext::oneapi::experimental::address_access_mode::read_write;
+    if (v.set_access(va, bytes, &access, 1) != 0) {
+        v.unmap(va, bytes);
+        v.release(h);
+        return false;
+    }
+    handle = (unsigned long long) h;
+    return true;
+}
+}  // namespace
+#endif
+
+bool ExpertCache::open_segmented(uint64_t want, std::string &err) try {
+#if 1   // SYCL port: --vram-elastic is CUDA-only (#533)
+    (void) want;
+    err = "ExpertCache: --vram-elastic (a segmented expert cache) is CUDA-only for now";
+    return false;
+#else
+    const Vmm& v = vmm();
+    int dev = 0, supported = 0;
+    int cu = 0;
+    if (!v.ok || DPCT_CHECK_ERROR(dev = dpct::get_current_device_id()) != 0 ||
+        v.device_get(&cu, dev) != 0 ||
+        v.attribute(&supported,
+                    CU_DEVICE_ATTRIBUTE_VIRTUAL_MEMORY_MANAGEMENT_SUPPORTED,
+                    cu) != 0 ||
+        !supported) {
+        err = "ExpertCache: --vram-elastic needs the driver's virtual memory management, which this GPU or driver "
+              "does not offer";
+        return false;
+    }
+    const dpct::experimental::mem_prop prop = device_prop(dev);
+    size_t gran = 0;
+    if (v.granularity(
+            &gran, &prop,
+            sycl::ext::oneapi::experimental::granularity_mode::recommended) !=
+            0 ||
+        gran == 0) {
+        err = "ExpertCache: cannot read the driver's allocation granularity";
+        return false;
+    }
+    const uint64_t g = (uint64_t) gran;
+    const uint64_t total = (want + g - 1) / g * g;
+    seg_ = (int64_t) (((uint64_t) seg_req_ + g - 1) / g * g);
+    dpct::device_ptr va = 0;
+    if (v.reserve(&va, (size_t)total, 0, 0, 0) != 0) {
+        err = "ExpertCache: cannot reserve the address range of the segmented expert cache";
+        return false;
+    }
+    base_ = reinterpret_cast<uint8_t*>(va);
+    reserved_ = total;
+    for (uint64_t at = 0; at < total; at += (uint64_t) seg_) {
+        segs_.push_back(0);
+        seg_size_.push_back((int64_t) std::min<uint64_t>((uint64_t) seg_, total - at));
+    }
+    for (size_t i = 0; i < segs_.size(); ++i) {
+        if (!map_segment(v, dev,
+                         va + (dpct::device_ptr)((uint64_t)i * (uint64_t)seg_),
+                         (size_t)seg_size_[i], segs_[i])) {
+            char buf[200];
+            std::snprintf(buf, sizeof buf, "ExpertCache: cudaMalloc failed: segment %zu of %zu (%.2f GiB) of the "
+                          "segmented cache could not be allocated", i + 1, segs_.size(),
+                          (double) seg_size_[i] / 1073741824.0);
+            err = buf;   // "cudaMalloc failed": the auto cache's smaller-retry path reads it as an allocation failure
+            release_segmented();
+            return false;
+        }
+        mapped_segs_ = (int64_t) i + 1;
+    }
+    return true;
+#endif
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+void ExpertCache::release_segmented() {
+#if 0   // SYCL port: no segmented arena (#533)
+    const Vmm& v = vmm();
+    if (base_ != nullptr) dpct::get_current_device().queues_wait_and_throw();
+    const dpct::device_ptr va = reinterpret_cast<dpct::device_ptr>(base_);
+    for (size_t i = 0; i < segs_.size(); ++i)
+        if (segs_[i] != 0) {
+            v.unmap(va + (dpct::device_ptr)((uint64_t)i * (uint64_t)seg_),
+                    (size_t)seg_size_[i]);
+            v.release((dpct::experimental::physical_mem_ptr)segs_[i]);
+        }
+    if (base_ != nullptr && reserved_ > 0) v.address_free(va, (size_t) reserved_);
+#endif
+    segs_.clear();
+    seg_size_.clear();
+    mapped_segs_ = 0;
+    reserved_ = 0;
+    base_ = nullptr;
+}
+
+int64_t ExpertCache::mapped_bytes() const {
+    if (segs_.empty()) return base_ != nullptr ? full_bytes() : 0;
+    int64_t b = 0;
+    for (int64_t i = 0; i < mapped_segs_; ++i) b += seg_size_[(size_t) i];
+    return b;
+}
+
+int64_t ExpertCache::slots_within(int64_t bytes) const {
+    if (bytes >= full_bytes()) return slots_;
+    if (bytes <= 0) return 0;
+    if (off_.empty()) return blob_ > 0 ? bytes / blob_ : 0;
+    // off_[i + 1] is slot i's end: count the slots whose end is at most `bytes`
+    return (int64_t) (std::upper_bound(off_.begin() + 1, off_.end(), (uint64_t) bytes) - (off_.begin() + 1));
+}
+
+bool ExpertCache::shrink(int64_t keep_bytes, std::string &err) try {
+    if (segs_.empty()) {
+        err = "the expert cache is not segmented (the engine needs --vram-elastic)";
+        return false;
+    }
+#if 1   // SYCL port: --vram-elastic is CUDA-only (#533)
+    (void) keep_bytes;
+    return false;
+#else
+    const Vmm& v = vmm();
+    int64_t keep = 0, at = 0;   // the segments [0, keep) hold the first keep_bytes
+    while (keep < (int64_t) segs_.size() && at < keep_bytes) at += seg_size_[(size_t) keep++];
+    if (keep >= mapped_segs_) return true;
+    if (DPCT_CHECK_ERROR(dpct::get_current_device().queues_wait_and_throw()) !=
+        0) {
+        /*
+        DPCT1009: SYCL reports errors using exceptions and does not use
+        error codes. Please replace the "get_error_string_dummy(...)" with a
+        real error-handling function.
+        */
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        err = std::string("the device failed before the cache shrank: ") +
+              dpct::get_error_string_dummy(0);
+        return false;
+    }
+    const dpct::device_ptr va = reinterpret_cast<dpct::device_ptr>(base_);
+    for (int64_t i = mapped_segs_ - 1; i >= keep; --i) {
+        const dpct::device_ptr p =
+            va + (dpct::device_ptr)((uint64_t)i * (uint64_t)seg_);
+        if (v.unmap(p, (size_t)seg_size_[(size_t)i]) != 0 ||
+            v.release((dpct::experimental::physical_mem_ptr)segs_[(size_t)i]) !=
+                0) {
+            err = "the driver refused to release an expert-cache segment";
+            live_slots_ = slots_within(mapped_bytes());
+            return false;
+        }
+        segs_[(size_t) i] = 0;
+        mapped_segs_ = i;
+    }
+    live_slots_ = slots_within(mapped_bytes());
+    return true;
+#endif
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
+bool ExpertCache::grow(int64_t want_bytes, std::string& err) {
+    if (segs_.empty()) {
+        err = "the expert cache is not segmented (the engine needs --vram-elastic)";
+        return false;
+    }
+#if 1   // SYCL port: --vram-elastic is CUDA-only (#533)
+    (void) want_bytes;
+    return false;
+#else
+    const Vmm& v = vmm();
+    int dev = 0;
+    dev = dpct::get_current_device_id();
+    const dpct::device_ptr va = reinterpret_cast<dpct::device_ptr>(base_);
+    int64_t at = mapped_bytes();
+    while (mapped_segs_ < (int64_t) segs_.size() && at + seg_size_[(size_t) mapped_segs_] <= want_bytes) {
+        const size_t i = (size_t) mapped_segs_;
+        if (!map_segment(v, dev,
+                         va + (dpct::device_ptr)((uint64_t)i * (uint64_t)seg_),
+                         (size_t)seg_size_[i], segs_[i])) {
+            /*
+            DPCT1010: SYCL uses exceptions to report errors and does not use
+            the error codes. The cudaGetLastError function call was replaced
+            with 0. You need to rewrite this code.
+            */
+            (void)0;
+            err = "the driver has no VRAM for another expert-cache segment";
+            live_slots_ = slots_within(mapped_bytes());
+            return false;
+        }
+        at += seg_size_[i];
+        ++mapped_segs_;
+    }
+    live_slots_ = slots_within(mapped_bytes());
+    return true;
+#endif
+}
+
 #if defined(STRATA_USE_HIP)
 bool ExpertCache::ensure_blocking_staging(std::size_t bytes, std::string& err) {
     if (bytes <= blocking_staging_bytes_) return true;
@@ -201,8 +505,11 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
         }
     }
 
-    if (DPCT_CHECK_ERROR(base_ = (uint8_t *)sycl::malloc_device(
-                             (size_t)want, dpct::get_in_order_queue())) != 0) {
+    if (seg_req_ > 0) {   // #533: --vram-elastic: physical segments behind one address range (zeroed below)
+        if (!open_segmented(want, err)) return false;
+    } else if (DPCT_CHECK_ERROR(
+                   base_ = (uint8_t *)sycl::malloc_device(
+                       (size_t)want, dpct::get_in_order_queue())) != 0) {
         base_ = nullptr;
         char buf[256];
         std::snprintf(
@@ -233,6 +540,7 @@ bool ExpertCache::open(int64_t n_slots, int64_t n_layers, int64_t n_expert,
 
     residency_.assign((size_t) (n_layers * n_expert), kNotResident);
     slots_ = n_slots;
+    live_slots_ = n_slots;
     n_layers_ = n_layers;
     n_expert_ = n_expert;
     blob_ = blob_bytes;
@@ -274,6 +582,7 @@ bool ExpertCache::open_sized(const std::vector<int64_t>& slot_bytes, int64_t n_l
     // one allocation of the summed size, through the uniform path's checks: n "slots" of 1 byte
     if (!open((int64_t) off.back(), n_layers, n_expert, 1, err)) return false;
     slots_ = (int64_t) slot_bytes.size();
+    live_slots_ = slots_;
     blob_ = mx;
     off_ = std::move(off);
 #if defined(STRATA_USE_HIP)
@@ -300,12 +609,15 @@ void ExpertCache::close() {
     blocking_staging_bytes_ = 0;
 #endif
     off_.clear();
-    if (base_ != nullptr) {
+    if (!segs_.empty()) {
+        release_segmented();
+    } else if (base_ != nullptr) {
         sycl::free(base_, dpct::get_in_order_queue());
         base_ = nullptr;
     }
     residency_.clear();
     slots_ = 0;
+    live_slots_ = 0;
     n_layers_ = 0;
     n_expert_ = 0;
     blob_ = 0;
diff --git a/sycl/src/core/expert_source.cpp b/sycl/src/core/expert_source.cpp
index 4e423e99e0d..e1177d8eb6c 100644
--- a/sycl/src/core/expert_source.cpp
+++ b/sycl/src/core/expert_source.cpp
@@ -219,18 +219,25 @@ bool read_cgroup_memory_stat(const std::filesystem::path& path, uint64_t current
 }
 #endif
 
-bool available_memory_bytes(uint64_t& bytes) {
+}  // namespace
+
+namespace detail {
+
+bool host_available_memory(HostMemory& m, const std::string& meminfo, const std::string& self_cgroup,
+                           const std::string& cgroup_root) {
+    m = HostMemory{};
 #if defined(_WIN32)
+    (void) meminfo; (void) self_cgroup; (void) cgroup_root;
     MEMORYSTATUSEX status{};
     status.dwLength = sizeof(status);
     if (!GlobalMemoryStatusEx(&status)) return false;
-    bytes = (uint64_t) status.ullAvailPhys;
-    return bytes > 0;
+    m.available = (uint64_t) status.ullAvailPhys;
+    return m.available > 0;
 #elif defined(__linux__)
     // MemAvailable includes reclaimable page cache, unlike _SC_AVPHYS_PAGES.
-    std::ifstream info("/proc/meminfo");
+    std::ifstream info(meminfo);
     std::string line;
-    bytes = 0;
+    uint64_t bytes = 0;
     while (std::getline(info, line)) {
         std::istringstream fields(line);
         std::string key, unit;
@@ -239,17 +246,26 @@ bool available_memory_bytes(uint64_t& bytes) {
             value <= std::numeric_limits<uint64_t>::max() / 1024) bytes = value * 1024;
     }
     if (bytes == 0) return false;
-    // Account for the tightest cgroup-v2 ancestor limit when its normal mount is visible.
+    // Account for the tightest cgroup ancestor limit when its normal mount is visible.
     // This is a point-in-time guard, not a reservation against concurrent allocations.
-    std::ifstream groups("/proc/self/cgroup");
+    std::ifstream groups(self_cgroup);
     if (!groups) return false;
-    bool resolved_v2 = false;
+    const std::filesystem::path root(cgroup_root);
+    bool v2 = false;
+    std::string v1_path;   // the memory controller's group (cgroup v1), when there is no v2 line
     while (std::getline(groups, line)) {
-        if (line.rfind("0::/", 0) != 0) continue;
-        const std::filesystem::path root("/sys/fs/cgroup");
+        if (line.rfind("0::/", 0) != 0) {
+            // v1: "N:controller[,controller]:/path"
+            const size_t c1 = line.find(':'), c2 = c1 == std::string::npos ? c1 : line.find(':', c1 + 1);
+            if (c2 == std::string::npos) continue;
+            std::istringstream ctl(line.substr(c1 + 1, c2 - c1 - 1));
+            for (std::string c; std::getline(ctl, c, ',');)
+                if (c == "memory") v1_path = line.substr(c2 + 1);
+            continue;
+        }
         auto path = (root / line.substr(4)).lexically_normal();
         if (path.string().rfind(root.string(), 0) != 0 || !std::filesystem::is_directory(path)) return false;
-        resolved_v2 = true;
+        v2 = true;
         while (path.string().rfind(root.string(), 0) == 0) {
             std::ifstream limit_file(path / "memory.max"), current_file(path / "memory.current");
             std::string limit;
@@ -263,28 +279,59 @@ bool available_memory_bytes(uint64_t& bytes) {
                     size_t consumed = 0;
                     const uint64_t cap = std::stoull(limit, &consumed);
                     if (consumed != limit.size()) return false;
-                    detail::CgroupMemoryStat stat;
+                    CgroupMemoryStat stat;
                     if (!read_cgroup_memory_stat(path, current, stat)) return false;
                     uint64_t cgroup_available = 0;
-                    if (!detail::cgroup_available_bytes(cap, stat, cgroup_available)) return false;
+                    if (!cgroup_available_bytes(cap, stat, cgroup_available)) return false;
                     bytes = std::min(bytes, cgroup_available);
+                    m.cgroup_limit = std::min(m.cgroup_limit, cap);
                 } catch (...) { return false; }
             }
             if (path == root) break;
             path = path.parent_path();
         }
     }
-    return resolved_v2;
+    if (!v2 && !v1_path.empty()) {
+        // #633: cgroup v1 (older Docker hosts, RHEL 7/8): the memory controller's group and its ancestors.  An
+        // unlimited group says a number near 2^63 (rounded to its page size); a group whose files are not
+        // visible (no mount in this namespace) is skipped - MemAvailable alone, as with no cgroup at all.
+        const std::filesystem::path mroot = root / "memory";
+        auto path = (mroot / v1_path.substr(v1_path.rfind('/', 0) == 0 ? 1 : 0)).lexically_normal();
+        while (path.string().rfind(mroot.string(), 0) == 0) {
+            std::ifstream limit_file(path / "memory.limit_in_bytes"), usage_file(path / "memory.usage_in_bytes");
+            uint64_t cap = 0, usage = 0;
+            if (limit_file >> cap && usage_file >> usage && cap < (1ull << 62)) {
+                bytes = std::min(bytes, usage < cap ? cap - usage : 0);
+                m.cgroup_limit = std::min(m.cgroup_limit, cap);
+            }
+            if (path == mroot) break;
+            path = path.parent_path();
+        }
+    }
+    m.available = bytes;
+    return true;
 #else
+    (void) meminfo; (void) self_cgroup; (void) cgroup_root;
     const long pages = sysconf(_SC_AVPHYS_PAGES);
     const long page_bytes = sysconf(_SC_PAGESIZE);
     if (pages <= 0 || page_bytes <= 0 ||
         (uint64_t) pages > std::numeric_limits<uint64_t>::max() / (uint64_t) page_bytes) return false;
-    bytes = (uint64_t) pages * (uint64_t) page_bytes;
-    return bytes > 0;
+    m.available = (uint64_t) pages * (uint64_t) page_bytes;
+    return m.available > 0;
 #endif
 }
 
+}  // namespace detail
+
+namespace {
+
+bool available_memory_bytes(uint64_t& bytes) {
+    detail::HostMemory m;
+    if (!detail::host_available_memory(m)) return false;
+    bytes = m.available;
+    return bytes > 0;
+}
+
 }  // namespace
 
 // ================================ THE FILE-BACKED SOURCE ================================
@@ -882,13 +929,14 @@ void FileExpertSource::fill_many(const std::vector<Fill>& todo) {
     for (auto& t : th) t.join();
 }
 
-bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
+uint64_t FileExpertSource::expert_bytes() const {
+    uint64_t total = 0;
+    for (uint64_t b : layer_blob_bytes_) total += b * (uint64_t) n_expert_;
+    return total;
+}
+
+bool FileExpertSource::open_direct(std::string& why) {
 #if defined(_WIN32)
-    if (base_ == nullptr || paths_.empty() || !direct_.empty()) {
-        why = !direct_.empty() ? "already unbuffered" : "no expert files open";
-        return !direct_.empty();
-    }
-    if (!experts_unbuffered(paths_, ram_bytes, why, /*cache_counts=*/false)) return false;
     for (const std::string& path : paths_) {
         const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
         std::vector<wchar_t> w((size_t) (wide > 0 ? wide : 1), L'\0');
@@ -909,6 +957,24 @@ bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
         for (uint64_t b : layer_blob_bytes_) stage_blob_ = std::max(stage_blob_, b);
     }
     return true;
+#else
+    (void) why;
+    return false;
+#endif
+}
+
+bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
+#if defined(_WIN32)
+    if (base_ == nullptr || paths_.empty() || !direct_.empty()) {
+        why = !direct_.empty() ? "already unbuffered" : "no expert files open";
+        return !direct_.empty();
+    }
+    // #577: the file tier reads the experts outside the RAM copy, not every byte of the shards (dense weights, the
+    // PLE table), and the copy holds at most every expert - the budget asked for can be more than that
+    const uint64_t experts = expert_bytes();
+    const uint64_t arena = std::min(ram_bytes, experts);
+    if (!experts_unbuffered(paths_, arena, why, /*cache_counts=*/false, experts - arena)) return false;
+    return open_direct(why);
 #else
     (void) ram_bytes;
     why = "through the file cache (not Windows)";
@@ -916,6 +982,39 @@ bool FileExpertSource::set_unbuffered(uint64_t ram_bytes, std::string& why) {
 #endif
 }
 
+bool FileExpertSource::recheck_unbuffered(std::string& why) {
+#if defined(_WIN32)
+    if (const char* env = std::getenv("STRATA_UNBUFFERED_LOAD"); env != nullptr && env[0] != '\0') {
+        why = std::string("STRATA_UNBUFFERED_LOAD=") + env;
+        return !direct_.empty();
+    }
+    if (base_ == nullptr || paths_.empty()) {
+        why = "no expert files open";
+        return false;
+    }
+    // #577: the RAM copy is built (and already out of the available RAM), so what the file cache would have to keep
+    // is exactly the experts outside it - the GPU cache's (refilled after a prompt borrowed their slots) and the
+    // ones neither holds
+    const uint64_t experts = expert_bytes();
+    const uint64_t read = experts > complement_bytes_ ? experts - complement_bytes_ : 0;
+    std::string w;
+    const bool ub = experts_unbuffered(paths_, 0, w, /*cache_counts=*/false, read);
+    char head[96];
+    std::snprintf(head, sizeof head, "re-checked with the RAM copy built (%.2f GiB): ",
+                  (double) complement_bytes_ / 1073741824.0);
+    why = head + w;
+    if (ub == !direct_.empty()) return ub;
+    if (ub) return open_direct(why);
+    // through the file cache after all: the mapped reads take over (staged() stays true for the GGUF in place)
+    for (void* d : direct_) CloseHandle((HANDLE) d);
+    direct_.clear();
+    return false;
+#else
+    why = "through the file cache (not Windows)";
+    return false;
+#endif
+}
+
 bool FileExpertSource::read_direct(const Fill* fills, size_t n) const {
 #if defined(_WIN32)
     // NTFS runs the unbuffered reads of a file one at a time while the file is mapped or cached anywhere (the engine
@@ -1241,9 +1340,9 @@ bool FileExpertSource::pin_cache_complement(
         err = std::string("FileExpertSource: GPU expert cache is not ready: ") +
               dpct::get_error_string_dummy(sync);
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         (void)0;
         return false;
@@ -1437,9 +1536,9 @@ bool FileExpertSource::pin_cache_complement(
                     note = std::string("no device alias (") +
                            dpct::get_error_string_dummy(aliased) + ")";
                     /*
-                    DPCT1010: SYCL uses exceptions to report errors and does
-                    not use the error codes. The cudaGetLastError function call
-                    was replaced with 0. You need to rewrite this code.
+                    DPCT1010: SYCL uses exceptions to report errors and
+                    does not use the error codes. The cudaGetLastError function
+                    call was replaced with 0. You need to rewrite this code.
                     */
                     (void)0;
                     (void)DPCT_CHECK_ERROR(
@@ -1458,8 +1557,8 @@ bool FileExpertSource::pin_cache_complement(
                 note = std::string("page-locking refused (") +
                        dpct::get_error_string_dummy(allocated) + ")";
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
@@ -1524,11 +1623,11 @@ bool FileExpertSource::pin_cache_complement(
                                 */
                                 (void)0;
                                 /*
-                                DPCT1027: The call to cudaHostUnregister was
-                                replaced with 0 because SYCL currently does not
-                                support registering of existing host memory for
-                                use by device. Use USM to allocate memory for
-                                use by host and device.
+                                DPCT1027: The call to cudaHostUnregister
+                                was replaced with 0 because SYCL currently does
+                                not support registering of existing host memory
+                                for use by device. Use USM to allocate memory
+                                for use by host and device.
                                 */
                                 (void)0;
                             }
@@ -1733,9 +1832,9 @@ bool FileExpertSource::reserve_exchanges(int64_t n, std::string &err) try {
         xstage_pinned_ = true;
     } else {
         /*
-        DPCT1010: SYCL uses exceptions to report errors and does not use the
-        error codes. The cudaGetLastError function call was replaced with 0. You
-        need to rewrite this code.
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
         */
         (void)0;
         p = std::malloc(total);
@@ -2152,7 +2251,8 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
             }
             if (kind[i] >= 0) {             // CUDA0, PCIe, or a remote/peer result staged into this row below
                 if (kind[i] == 0) ++d.cache_hits;
-                else if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
+                else ++d.offload_entries;                       // #588: PCIe or another GPU
+                if (kind[i] == 2 && d.peer != nullptr) ++d.peer_entries;
                 // multi-GPU: a direct peer launch is writing this row right now - zeroing it would race it
                 if (!(kind[i] == 2 && d.peer != nullptr && d.peer->launched_direct()))
                     std::memset(row, 0, (size_t) H * sizeof(float));
@@ -2686,10 +2786,9 @@ LoadStats load_experts_gguf(const std::string& gguf, uint8_t* dst, const strata:
 
 ArenaExpertSource::~ArenaExpertSource() { close(); }
 
-bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
-                             int64_t n_expert, int threads, std::string &err,
-                             uint64_t max_pinned_bytes,
-                             const std::string &shared_arena_file) try {
+bool ArenaExpertSource::open(const std::string& pack_dir, int64_t n_layers, int64_t n_expert, int threads,
+                             std::string& err, uint64_t max_pinned_bytes,
+                             const std::string& shared_arena_file) {
     close();
     const std::string path = pack_dir + "/experts.bin";
     // plan v0.3 P6: the layout (canonical, or a native pack's per-layer blobs) was loaded by the driver
@@ -2714,7 +2813,7 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
         std::ifstream f(path, std::ios::binary | std::ios::ate);
         if (!f) { err = "ArenaExpertSource: cannot open " + path; return false; }
         const uint64_t got = (uint64_t) f.tellg();
-        if (got != want) {
+        if (got != want && got != want + (uint64_t) blob) {   // + one blob: STRATA_ARENA_MMAP's padded file
             char buf[400];
             std::snprintf(buf, sizeof buf,
                           "ArenaExpertSource: %s is %llu B but %lld layers x %lld experts (blobs up to %lld B) "
@@ -2726,6 +2825,76 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
         }
     }
 
+    // STRATA_ARENA_MMAP=1 (a small-RAM machine whose GPUs hold most experts): the arena is the pack's experts.bin
+    // mapped READ-ONLY - not locked, not pinned.  The page cache keeps what the CPU pool and the prompt path
+    // actually read (the experts no VRAM cache holds) and gives back the rest under memory pressure; a page
+    // dropped is re-read from the file, so a result never depends on what is resident.  The GPUs then get no
+    // mapped alias: run with --pcie-frac 0.  The first start writes experts.bin (arena layout, padded by one blob
+    // so a whole-slot copy may start at any expert), later ones map it.
+#if defined(_WIN32)
+    static const bool arena_mmap = false;   // POSIX mmap/madvise: Linux only for now
+#else
+    static const bool arena_mmap = [] { const char* v = std::getenv("STRATA_ARENA_MMAP"); return v && v[0] == '1'; }();
+    if (arena_mmap) {
+        const uint64_t file_bytes = want + (uint64_t) blob;
+        uint64_t have = 0;
+        {
+            std::ifstream f(path, std::ios::binary | std::ios::ate);
+            if (f) have = (uint64_t) f.tellg();
+        }
+        if (have == file_bytes) {
+            const int fd = ::open(path.c_str(), O_RDONLY);
+            void* v = fd >= 0 ? mmap(nullptr, (size_t) file_bytes, PROT_READ, MAP_SHARED, fd, 0) : MAP_FAILED;
+            if (fd >= 0) ::close(fd);
+            if (v == MAP_FAILED) { err = "ArenaExpertSource: mmap of " + path + " failed"; return false; }
+            map_ = v;
+            map_bytes_ = file_bytes;
+            base_ = (const uint8_t*) v;
+            pinned_bytes_ = 0;
+            dev_slice_.clear();
+            slice_bytes_ = 0;
+            blobs_ = n_layers * n_expert;
+            n_expert_ = n_expert;
+            reads_ = 0;
+            note_ = "mapped read-only from " + path + " (STRATA_ARENA_MMAP: not locked, not pinned)";
+            gib_per_s_ = 0.0;
+            load_seconds_ = load_read_s_ = load_copy_s_ = 0.0;
+            return true;
+        }
+    }
+#endif
+
+    // #633: THE RAM BEFORE THE ALLOCATION.  On Linux the arena is an anonymous mapping that succeeds whatever the host
+    // has; its pages are committed as the load writes them, so a container whose memory limit is below the arena was
+    // killed by the OOM killer part-way through the load, without a message.  A hard cgroup limit below it is
+    // certain to end that way: refused, with the numbers.  Less RAM available than the arena (another program, an
+    // engine still exiting) is only a warning - the OS may make room - per the recommend-not-force rule.
+    ram_warning_.clear();
+    // (a shared arena, --shared-expert-arena, may already be in RAM for another engine: not checked)
+    if (detail::HostMemory hm; shared_arena_file.empty() && detail::host_available_memory(hm)) {
+        const uint64_t need = want + (uint64_t) blob;
+        const double gib = 1073741824.0;
+        char buf[512];
+        if (hm.cgroup_limit < need) {
+            std::snprintf(buf, sizeof buf,
+                          "ArenaExpertSource: the expert arena needs %.2f GiB of RAM but this process's memory limit "
+                          "(cgroup memory.max / memory.limit_in_bytes) is %.2f GiB: it would be killed while loading. "
+                          "Raise the container's limit, or run with less RAM: --mmap-experts with "
+                          "--resident-budget-gib N keeps only the hottest experts in RAM",
+                          (double) need / gib, (double) hm.cgroup_limit / gib);
+            err = buf;
+            return false;
+        }
+        if (hm.available < need) {
+            std::snprintf(buf, sizeof buf,
+                          "the expert arena needs %.2f GiB of RAM but %.2f GiB is available (%.2f GiB short): the load "
+                          "may swap or be stopped by the OS. Close other programs (or wait for an engine that is "
+                          "still exiting), or run with less RAM: --mmap-experts with --resident-budget-gib N",
+                          (double) need / gib, (double) hm.available / gib, (double) (need - hm.available) / gib);
+            ram_warning_ = buf;
+        }
+    }
+
     uint64_t pack_hash = 0;
     if (!shared_arena_file.empty() &&
         !shared_arena_pack_hash(pack_dir, path, gguf_, lay, pack_hash, err)) return false;
@@ -2784,6 +2953,30 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
         err = "ArenaExpertSource: the load read " + std::to_string(st.bytes) + " B of " + std::to_string(want);
         return false;
     }
+    // the first start: write experts.bin for the mapped starts after this one - only when the drive has room for it
+    // and 2 GiB more (a full drive fails other writes too); otherwise this start says so and runs pinned as before
+    std::error_code space_ec;
+    const uint64_t free_disk = arena_mmap && from_gguf ? (uint64_t) std::filesystem::space(
+        std::filesystem::path(path).parent_path(), space_ec).available : 0;
+    const bool room = !space_ec && free_disk >= want + (uint64_t) blob + (2ull << 30);
+    if (arena_mmap && from_gguf && !room)
+        std::fprintf(stderr, "strata generate: STRATA_ARENA_MMAP: NOT writing %s - %.1f GiB free on that drive, it needs "
+                             "%.1f GiB plus 2 GiB to spare; this start keeps the arena in RAM\n", path.c_str(),
+                     (double) free_disk / 1073741824.0, (double) (want + (uint64_t) blob) / 1073741824.0);
+    if (arena_mmap && from_gguf && room) {
+        const std::string tmp = path + ".tmp";
+        std::FILE* f = std::fopen(tmp.c_str(), "wb");
+        bool ok = f != nullptr && std::fwrite(a->data(), 1, (size_t) want, f) == (size_t) want;
+        if (ok) {
+            std::vector<uint8_t> pad((size_t) blob, 0);
+            ok = std::fwrite(pad.data(), 1, pad.size(), f) == pad.size();
+        }
+        if (f) ok = std::fclose(f) == 0 && ok;
+        if (ok) ok = std::rename(tmp.c_str(), path.c_str()) == 0;
+        if (!ok) std::remove(tmp.c_str());
+        std::fprintf(stderr, "strata generate: STRATA_ARENA_MMAP: %s %s (the next start maps it)\n",
+                     ok ? "wrote" : "could NOT write", path.c_str());
+    }
     arena_ = a;
     base_ = a->data();
     pinned_bytes_ = a->registered_bytes;
@@ -2796,8 +2989,8 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
             void* d = nullptr;
             if (DPCT_CHECK_ERROR(d = (void *)(void *)(base_ + off)) != 0) {
                 /*
-                DPCT1010: SYCL uses exceptions to report errors and does not
-                use the error codes. The cudaGetLastError function call was
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
                 replaced with 0. You need to rewrite this code.
                 */
                 (void)0;
@@ -2817,13 +3010,13 @@ bool ArenaExpertSource::open(const std::string &pack_dir, int64_t n_layers,
     load_copy_s_ = st.copy_seconds;
     return true;
 }
-catch (sycl::exception const &exc) {
-  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-            << ", line:" << __LINE__ << std::endl;
-  std::exit(1);
-}
 
 void ArenaExpertSource::close() {
+#if !defined(_WIN32)
+    if (map_ != nullptr) munmap(map_, (size_t) map_bytes_);
+#endif
+    map_ = nullptr;
+    map_bytes_ = 0;
     if (arena_ != nullptr) {
         delete (PinnedArena*) arena_;
         arena_ = nullptr;
@@ -2833,6 +3026,39 @@ void ArenaExpertSource::close() {
     n_expert_ = 0;
 }
 
+void ArenaExpertSource::prefetch(int64_t layer, int64_t expert) {
+#if defined(_WIN32)
+    (void) layer; (void) expert;
+#else
+    if (map_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const uint64_t off = lay.blob_offset(layer, expert) & ~(uint64_t) 4095;
+    const uint64_t end = lay.blob_offset(layer, expert) + lay.blob_bytes(layer);
+    madvise((uint8_t*) map_ + off, (size_t) (end - off), MADV_WILLNEED);
+#endif
+}
+
+// Only the pages wholly inside the blob: a page shared with a neighbour the CPU may still read stays.  MADV_DONTNEED
+// unmaps them from this process; they stay in the page cache as clean, unmapped pages - the first the kernel takes
+// back under pressure, and a minor fault away when the CPU needs the expert again (an adaptive swap evicts it).
+// Dropping them from the cache too (POSIX_FADV_DONTNEED) made every eviction a re-read from the disk: ~200 major
+// faults a second in decode, +8 ms a window.  The memory the arena used to hold was never the cache itself but
+// ROCclr's pin-in-place locks on it (see main) - locked pages are the ones the kernel cannot take back.
+uint64_t ArenaExpertSource::release(int64_t layer, int64_t expert) {
+#if defined(_WIN32)
+    (void) layer; (void) expert;
+    return 0;
+#else
+    if (map_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return 0;
+    const auto& lay = strata::kernels::cpu::expert_layout();
+    const uint64_t off = (lay.blob_offset(layer, expert) + 4095) & ~(uint64_t) 4095;
+    const uint64_t end = (lay.blob_offset(layer, expert) + lay.blob_bytes(layer)) & ~(uint64_t) 4095;
+    if (end <= off) return 0;
+    if (madvise((uint8_t*) map_ + off, (size_t) (end - off), MADV_DONTNEED) != 0) return 0;
+    return end - off;
+#endif
+}
+
 bool ArenaExpertSource::pinned(int64_t layer, int64_t expert) const {
     if (base_ == nullptr || layer < 0 || expert < 0 || expert >= n_expert_) return false;
     const auto& lay = strata::kernels::cpu::expert_layout();
diff --git a/sycl/src/core/native_dense.cpp b/sycl/src/core/native_dense.cpp
index 867c72767a8..4007db4b86c 100644
--- a/sycl/src/core/native_dense.cpp
+++ b/sycl/src/core/native_dense.cpp
@@ -8,6 +8,7 @@
 
 #include <algorithm>
 #include <climits>
+#include <cstdlib>
 #include <exception>
 #include <limits>
 #include <memory>
@@ -15,6 +16,12 @@
 
 namespace strata::core {
 namespace {
+int g_layer_lb = -1, g_layer_le = -1;   // set_layer_range; -1: every layer
+bool in_range(const std::string& name) {
+    if (g_layer_lb < 0 || name.rfind("blk.", 0) != 0) return true;
+    const int l = std::atoi(name.c_str() + 4);
+    return l >= g_layer_lb && l < g_layer_le;
+}
 bool eligible(const strata::TensorInfo& tensor, bool include_ple_key) {
     const auto& name = tensor.name;
     if (name.rfind("blk.", 0) != 0) return false;
@@ -60,6 +67,7 @@ bool NativeDense::served_names(const std::vector<std::string>& shards, bool incl
     }
 }
 
+void NativeDense::set_layer_range(int lb, int le) { g_layer_lb = lb; g_layer_le = le; }
 bool NativeDense::keep_unquantized_ple_key(const std::string& pack_dir, std::set<std::string>& skip,
                                            std::string& err) {
     const std::string key = "blk.1.ple_key.weight";
@@ -148,6 +156,7 @@ bool NativeDense::load(const std::vector<std::string> &shards,
             }
             for (const auto& tensor : gguf.tensors()) {
                 if (!eligible(tensor, include_ple_key)) continue;
+                if (!in_range(tensor.name) && tensor.name.find("ple") == std::string::npos) continue;
                 if (!seen.insert(tensor.name).second) {
                     err = "native dense: duplicate tensor " + tensor.name; return false;
                 }
diff --git a/sycl/src/core/pinned.dp.cpp b/sycl/src/core/pinned.dp.cpp
index 8e5aec734ad..6fdd17ce6fd 100644
--- a/sycl/src/core/pinned.dp.cpp
+++ b/sycl/src/core/pinned.dp.cpp
@@ -571,7 +571,7 @@ LoadStats load_experts_direct(const std::string& path, uint8_t* dst, const std::
 }
 
 bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_bytes, std::string& why,
-                        bool cache_counts) {
+                        bool cache_counts, uint64_t read_bytes) {
     const char* env = std::getenv("STRATA_UNBUFFERED_LOAD");
     if (env != nullptr && env[0] != '\0') {
         why = std::string("STRATA_UNBUFFERED_LOAD=") + env;
@@ -619,15 +619,21 @@ bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_by
     GlobalMemoryStatusEx(&ms);
     const uint64_t avail = ms.ullAvailPhys;
     // what the cache could keep beside the arena (~4 GiB for everything else)
-    const uint64_t room = avail > arena_bytes + (4ull << 30) ? avail - arena_bytes - (4ull << 30) : 0;
-    const bool keepable = room >= total_bytes;
-    char msg[200];
-    std::snprintf(msg, sizeof msg, "%d of %d probe reads from the file cache; %.1f GiB available, %.1f GiB of files",
-                  fast, n, (double) avail / (1ull << 30), (double) total_bytes / (1ull << 30));
+    const uint64_t need = read_bytes == kAllFileBytes ? total_bytes : read_bytes;
+    const bool keepable = strata::platform::file_cache_keeps(avail, arena_bytes, need);
+    char msg[256];
+    if (read_bytes == kAllFileBytes)
+        std::snprintf(msg, sizeof msg, "%d of %d probe reads from the file cache; %.1f GiB available, %.1f GiB of files",
+                      fast, n, (double) avail / (1ull << 30), (double) total_bytes / (1ull << 30));
+    else
+        std::snprintf(msg, sizeof msg, "%.1f GiB available, %.1f GiB of it still to be taken by the RAM copy, %.1f GiB "
+                      "of experts read from the files: the file cache %s keep them",
+                      (double) avail / (1ull << 30), (double) arena_bytes / (1ull << 30), (double) need / (1ull << 30),
+                      keepable ? "can" : "cannot");
     why = msg;
     return (!cached || !cache_counts) && !keepable;
 #else
-    (void) files; (void) arena_bytes; (void) cache_counts;
+    (void) files; (void) arena_bytes; (void) cache_counts; (void) read_bytes;
     why = "buffered (not Windows)";
     return false;
 #endif
diff --git a/sycl/src/core/verify.cpp b/sycl/src/core/verify.cpp
index 5a1d102f265..038f4d43a0f 100644
--- a/sycl/src/core/verify.cpp
+++ b/sycl/src/core/verify.cpp
@@ -71,6 +71,19 @@ struct Bump {
     }
 };
 
+// #649 (HIP, opt-in A/Bs for the gfx1030 verify timeouts; CUDA never reads them)
+//   STRATA_VERIFY_COHERENT=1  the handshake words and rows in explicitly coherent (fine-grained) host memory
+//   STRATA_DOORBELL_STORE=1   the GPU stores each step's ring instead of read-modify-writing it over PCIe
+bool env_on(const char* name) {
+    const char* e = std::getenv(name);
+    return e != nullptr && e[0] != 0 && e[0] != '0';
+}
+#if defined(STRATA_USE_HIP)
+const bool g_coherent = env_on("STRATA_VERIFY_COHERENT");
+const bool g_doorbell_store = env_on("STRATA_DOORBELL_STORE");
+#endif
+const bool g_trace = env_on("STRATA_VERIFY_TRACE");
+
 bool mapped(size_t bytes, void **h, void **d) try {
     /*
     DPCT1048: The original value cudaHostAllocMapped is not meaningful in the
@@ -136,6 +149,20 @@ void release_live_verifiers(std::FILE* f) {
         }
     if (f != nullptr) std::fflush(f);
 }
+// #649: the host side of STRATA_VERIFY_TRACE - a ring of the last kTraceN handshake events of every verifier
+struct TraceEv {
+    int64_t t_ns;
+    const void* who;
+    int64_t window, step, layer, aux;
+    uint32_t seq, flag, a, b;
+    const char* what;
+};
+constexpr uint64_t kTraceN = 4096;
+TraceEv g_trace_ring[kTraceN];
+std::atomic<uint64_t> g_trace_next{0};
+int64_t trace_now_ns() {
+    return std::chrono::duration_cast<std::chrono::nanoseconds>(Clock::now().time_since_epoch()).count();
+}
 std::string released_note(bool drained) {
     return drained ? "; its GPU waits were released and the GPU finished (#267)"
                    : "; its GPU waits were released but the GPU did not finish within 5 s (#267)";
@@ -150,6 +177,7 @@ const int64_t g_test_stall = [] {
 
 bool Verifier::release_gpu_waits(int timeout_ms) try {
     released_.store(true);
+    trace_ev("RELEASE", -1, -1, timeout_ms);
     // the words the spin kernels read (wait_flag_ge, wait_flag_ge_or) are mapped host memory, so a store here
     // reaches them with no API call; UINT32_MAX is past every ring.  (E-6's skip words are device memory, but
     // wait_flag_ge_or also returns on its flag.)  A host function raising flag B later only raises.
@@ -163,15 +191,78 @@ bool Verifier::release_gpu_waits(int timeout_ms) try {
     for (dpct::queue_ptr q : {cs_, copy_}) {
         if (q == nullptr) continue;
         while (!q->ext_oneapi_empty()) {
-            if (ms_since(t0) > timeout_ms) return false;
+            if (ms_since(t0) > timeout_ms) {
+                trace_ev("RELEASE-NOT-DRAINED", -1, -1, (int64_t) ms_since(t0));
+                return false;
+            }
             std::this_thread::sleep_for(std::chrono::milliseconds(1));
         }
     }
+    trace_ev("RELEASE-DRAINED", -1, -1, (int64_t) ms_since(t0));   // aux: ms the GPU took to finish once released
     return true;
 } catch (...) {
     return false;   // the runtime may already be tearing down (the watchdog's path ends the engine)
 }
 
+void Verifier::trace_ev(const char* what, int64_t step, int64_t layer, int64_t aux) const {
+    if (!g_trace) return;
+    auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
+    TraceEv& e = g_trace_ring[g_trace_next.fetch_add(1) % kTraceN];
+    e = {trace_now_ns(), this, windows, step, layer, aux, rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_), what};
+}
+
+void Verifier::trace_dump(std::FILE* f) const {
+    if (!g_trace || f == nullptr) return;
+    static const char* names[kProfPer] = {"pre", "hc-read0", "qkv gemv", "conv", "ab", "z", "rec", "kv-idx",
+                                          "k/v rope", "kv append", "q", "scores+topk", "kv-resolve", "attention",
+                                          "gate", "", "out-proj", "router+ring", "shared", "waitA", "VRAM hits", "waitB",
+                                          "PCIe grp", "waitCPU", "combine", "", "head", "", "", "", "", "", ""};
+    const uint64_t end = g_trace_next.load();
+    const uint64_t n = end < 160 ? end : 160;
+    std::fprintf(f, "strata verify trace (#649): the last %llu handshake events (host clock, us before the last; "
+                    "words: seq = GPU rang, flag = CPU served, A = plan, B = copies)\n", (unsigned long long) n);
+    const int64_t t_last = n ? g_trace_ring[(end - 1) % kTraceN].t_ns : 0;
+    for (uint64_t i = end - n; i < end; ++i) {
+        const TraceEv& e = g_trace_ring[i % kTraceN];
+        if (e.what == nullptr) continue;
+        std::fprintf(f, "  %10.1f %-20s v%p window %lld step %lld layer %lld aux %lld | seq %u flag %u A %u B %u\n",
+                     (double) (t_last - e.t_ns) / 1000.0, e.what, e.who, (long long) e.window, (long long) e.step,
+                     (long long) e.layer, (long long) e.aux, e.seq, e.flag, e.a, e.b);
+    }
+    if (trace_h_ == nullptr || g_ == nullptr) return;
+    // the breadcrumbs: every stamp point the GPU passed in this window (ns of the GPU clock after the window's first)
+    unsigned long long t0 = ~0ull;
+    for (size_t i = 0; i < trace_n_; ++i) {
+        const unsigned long long t = *(const volatile unsigned long long*) (trace_h_ + i);
+        if (t != 0 && t < t0) t0 = t;
+    }
+    if (t0 == ~0ull) {
+        std::fprintf(f, "strata verify trace: no GPU breadcrumb in this window (the GPU never started it)\n");
+        return;
+    }
+    int64_t last_l = -1;
+    for (int64_t l = 0; l <= g_->n_layers; ++l)
+        for (int i = 0; i < kProfPer; ++i)
+            for (int grp = 0; grp < 2; ++grp)
+                if (trace_h_[(size_t) ((l * kProfPer + i) * 2 + grp)] != 0) last_l = l;
+    std::fprintf(f, "strata verify trace: GPU breadcrumbs (us after the window's first), the GPU got as far as layer "
+                    "%lld:\n", (long long) last_l);
+    for (int64_t l = std::max<int64_t>(0, last_l - 2); l <= std::min<int64_t>(g_->n_layers, last_l + 1); ++l)
+        for (int grp = 0; grp < 2; ++grp) {
+            std::string line;
+            char b[64];
+            for (int i = 0; i < kProfPer; ++i) {
+                const unsigned long long t = trace_h_[(size_t) ((l * kProfPer + i) * 2 + grp)];
+                if (t == 0) continue;
+                std::snprintf(b, sizeof b, " %s(%d)=%.1f", names[i], i, (double) (t - t0) / 1000.0);
+                line += b;
+            }
+            if (!line.empty())
+                std::fprintf(f, "  layer %lld group %d:%s\n", (long long) l, grp, line.c_str());
+        }
+    std::fflush(f);
+}
+
 void Verifier::diag(std::FILE* f) const {
     auto rd = [](const uint32_t* p) { return p ? *(const volatile uint32_t*) p : 0u; };
     // #251: outside a verify stage these are the LAST window's numbers (it finished), not the stalled work's
@@ -180,6 +271,7 @@ void Verifier::diag(std::FILE* f) const {
     std::fprintf(f, "  verify window%s: %d tokens at position %lld, host at layer step %u; the GPU rang %u; flags: "
                     "served %u, plan (A) %u, copies (B) %u\n", current ? "" : " (last window, not the current stage)",
                  last_t_, (long long) last_pos0_, cur_layer_ + 1, rd(h_seq_), rd(h_flag_), rd(h_flagA_), rd(h_flagB_));
+    trace_dump(f);   // #649: STRATA_VERIFY_TRACE=1 only
 }
 
 Verifier::~Verifier() try {
@@ -357,6 +449,22 @@ bool Verifier::init(const WeightTable &wt, const ModelGeometry &g,
         return false;
     }
     dpct::get_in_order_queue().memset(arena_, 0, count.used).wait();
+    if (g_trace && trace_h_ == nullptr) {   // #649: the breadcrumbs, mapped so they read while the GPU hangs
+        trace_n_ = (size_t) (g.n_layers + 1) * kProfPer * 2;
+        if (!mapped(trace_n_ * 8, (void**) &trace_h_, (void**) &trace_m_)) {
+            trace_h_ = trace_m_ = nullptr;
+            trace_n_ = 0;
+        }
+#if defined(STRATA_USE_HIP)
+        std::fprintf(stderr, "strata verify trace (#649): on; coherent words %s, doorbell %s, HIP_HOST_COHERENT=%s "
+                             "HSA_ENABLE_SDMA=%s GPU_MAX_HW_QUEUES=%s\n", g_coherent ? "explicit" : "default",
+                     g_doorbell_store ? "stored" : "incremented", std::getenv("HIP_HOST_COHERENT") ? std::getenv("HIP_HOST_COHERENT") : "-",
+                     std::getenv("HSA_ENABLE_SDMA") ? std::getenv("HSA_ENABLE_SDMA") : "-",
+                     std::getenv("GPU_MAX_HW_QUEUES") ? std::getenv("GPU_MAX_HW_QUEUES") : "-");
+#else
+        std::fprintf(stderr, "strata verify trace (#649): on\n");
+#endif
+    }
     prof_on_ = std::getenv("STRATA_VERIFY_PROFILE") != nullptr;
     if (prof_on_) {
         const size_t np = (size_t) g.n_layers * kProfPer + 4;
@@ -473,6 +581,7 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
     // a host-side wait + clock (there is no %globaltimer here), so the existing stage profiler reports ms per stage.
     static const bool eager = std::getenv("STRATA_VERIFY_EAGER") != nullptr;
     auto stamp = [&](int64_t l, int i, int grp) {
+        if (trace_m_ != nullptr) gpu_stamp(trace_m_, (int) ((l * kProfPer + i) * 2 + grp), cs);   // #649
         if (!prof_on_ || grp != 0) return;
         if (eager) { cs->wait(); prof_h_[(size_t) (l * kProfPer + i)] = (unsigned long long) std::chrono::steady_clock::now().time_since_epoch().count(); }
         else gpu_stamp(prof_, (int) (l * kProfPer + i), cs);
@@ -781,6 +890,12 @@ bool Verifier::record_window(int T, dpct::queue_ptr cs, std::string &err) {
                           hits_.cache_base, slot_off_d_, (long long) hits_.blob,
                           plan_ + (size_t) grp * (size_t) (plan_i32_ + 16), (long long) max_t_ * K, skip_ + grp,
                           (uint32_t) ((l - lb_) * G + grp + 1), cs);
+#if defined(STRATA_USE_HIP)
+        if (g_doorbell_store)   // #649 A/B: the step's ring stored, not incremented over PCIe
+            doorbell_publish_value(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
+                                   m_ids_ + tb * K, m_w_ + tb * K, m_seq_, (uint32_t) ((l - lb_) * G + grp + 1), cs);
+        else
+#endif
         doorbell_publish(xm, ids_ + tb * K, w_ + tb * K, (int64_t) n * N, (int64_t) n * K, m_x_ + tb * N,
                          m_ids_ + tb * K, m_w_ + tb * K, m_seq_, cs);
         stamp(l, 17, grp);
@@ -1203,7 +1318,9 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     *(volatile uint32_t*) h_flag_ = 0;
     *(volatile uint32_t*) h_flagA_ = 0;
     *(volatile uint32_t*) h_flagB_ = 0;
+    if (trace_h_ != nullptr) std::memset(trace_h_, 0, trace_n_ * 8);   // #649: this window's breadcrumbs only
     std::atomic_thread_fence(std::memory_order_seq_cst);
+    trace_ev("WINDOW", -1, -1, pos0 * 16 + T);
     last_t_ = T;
     last_pos0_ = pos0;
     for (int t = 0; t < T; ++t) last_tokens_[t] = tokens[t];
@@ -1225,6 +1342,7 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     /*
     DPCT1000: Error handling if-stmt was detected but could not be rewritten.
     */
+    trace_ev("LAUNCHED", -1, -1, (int64_t) le);
     if (le != 0) {
         err =
             std::string("verify: launch: ") + dpct::get_error_string_dummy(le);
@@ -1261,6 +1379,8 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
                 const dpct::err0 q =
                     DPCT_CHECK_ERROR(((cs_)->ext_oneapi_empty()));
                 if (q != 1 && *seq < want) {
+                    trace_ev("NEVER-RANG", k, l, (int64_t) q);
+                    trace_dump(stderr);
                     err = "verify: layer " + std::to_string(l) +
                           " never rang (" +
                           /*
@@ -1278,11 +1398,20 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
             }
             if (now - a > std::chrono::seconds(20)) {
                 // #267: the caller ends the engine; no spin kernel may outlive it
+                trace_ev("TIMEOUT", k, l, (int64_t) !cs_->ext_oneapi_empty());   // SYCL port: 1 = still running
+                if (g_trace) {
+                    diag(stderr);   // the words and the breadcrumbs before the release ...
+                    const bool drained = release_gpu_waits(5000);
+                    trace_dump(stderr);   // ... and after it: did the GPU move once its waits were raised?
+                    err = "verify: timed out at layer " + std::to_string(l) + released_note(drained);
+                    return false;
+                }
                 err = "verify: timed out at layer " + std::to_string(l) + released_note(release_gpu_waits(5000));
                 return false;
             }
         }
         const Clock::time_point b = Clock::now();
+        if (g_trace) trace_ev("RANG", k, l, (int64_t) std::chrono::duration_cast<std::chrono::microseconds>(b - a).count());
         VDBG("layer %lld rang\n", (long long) l);
         cur_layer_ = want - 1;
         set_plan_slot(grp);
@@ -1292,6 +1421,8 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
             pool(user, h_x_ + (size_t) tb * g.n_embd, h_ids_ + (size_t) tb * ss.k, n, ss.k,
                  h_ymiss_ + (size_t) tb * ss.k * g.n_embd, l);
         VDBG("layer %lld served\n", (long long) l);
+        if (g_trace) trace_ev(*(volatile uint32_t*) h_flagA_ == want ? "SERVED" : "SERVED-NO-PLAN-YET", k, l,
+                              (int64_t) ms_since(b));   // aux: ms the CPU experts took
         progress_tick();
         std::atomic_thread_fence(std::memory_order_seq_cst);
         _mm_sfence();
@@ -1313,7 +1444,9 @@ bool Verifier::run(int T, const int32_t *tokens, int64_t pos0, PoolMultiFn pool,
     // #267: a window the GPU never finishes (a spin kernel that never sees its flag) holds the host here; the stall
     // watchdog then releases every verifier's GPU waits (release_live_verifiers) before it ends the engine, so no
     // spin kernel outlives the process.  The wait itself stays a blocking sync (a polling wait cost decode upstream).
+    trace_ev("SYNC", -1, -1, 0);
     const dpct::err0 se = DPCT_CHECK_ERROR(cs_->wait());
+    trace_ev("SYNCED", -1, -1, (int64_t) se);
     if (std::getenv("STRATA_VERIFY_DEBUG") != nullptr) {
         const Clock::time_point t_done = Clock::now();
         std::fprintf(stderr, "verify dbg: T=%d window: since previous window %.1f ms, staging %.1f ms, gpu %.1f ms\n", T,
diff --git a/sycl/src/kernels/cuda/elementwise.dp.cpp b/sycl/src/kernels/cuda/elementwise.dp.cpp
index 2d884b8dab3..6f01683237f 100644
--- a/sycl/src/kernels/cuda/elementwise.dp.cpp
+++ b/sycl/src/kernels/cuda/elementwise.dp.cpp
@@ -600,6 +600,72 @@ __dpct_inline__ void doorbell_publish_kernel(const float *__restrict__ x,
     }
 }
 
+// #649 (HIP, STRATA_DOORBELL_STORE=1): the same publish, but the ring is STORED (the step's own number, known at
+// capture) instead of read-modify-written over PCIe - one store, no read of host memory from the GPU.
+__dpct_inline__ void doorbell_publish_value_kernel(
+    const float *__restrict__ x, const int32_t *__restrict__ ids,
+    const float *__restrict__ w, int n, int k, float *x_out, int32_t *ids_out,
+    float *w_out, uint32_t *seq, uint32_t value) {
+    auto item_ct1 = sycl::ext::oneapi::this_work_item::get_nd_item<3>();
+#pragma unroll
+    for (int i = item_ct1.get_local_id(2); i < n;
+         i += item_ct1.get_local_range(2)) x_out[i] = x[i];
+    if ((int)item_ct1.get_local_id(2) < k) {
+        ids_out[item_ct1.get_local_id(2)] = ids[item_ct1.get_local_id(2)];
+        w_out[item_ct1.get_local_id(2)] = w[item_ct1.get_local_id(2)];
+    }
+    /*
+    DPCT1078: Consider replacing memory_order::acq_rel with
+    memory_order::seq_cst for correctness if strong memory order restrictions
+    are needed.
+    */
+    sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::system);
+    item_ct1.barrier(sycl::access::fence_space::local_space);
+    if (item_ct1.get_local_id(2) == 0) {
+        /*
+        DPCT1078: Consider replacing memory_order::acq_rel with
+        memory_order::seq_cst for correctness if strong memory order
+        restrictions are needed.
+        */
+        sycl::atomic_fence(sycl::memory_order::acq_rel,
+                           sycl::memory_scope::system);
+        *(volatile uint32_t*) seq = value;
+        /*
+        DPCT1078: Consider replacing memory_order::acq_rel with
+        memory_order::seq_cst for correctness if strong memory order
+        restrictions are needed.
+        */
+        sycl::atomic_fence(sycl::memory_order::acq_rel,
+                           sycl::memory_scope::system);
+    }
+}
+
+void doorbell_publish_value(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k,
+                            float* x_out, int32_t* ids_out, float* weights_out, uint32_t* d_seq, uint32_t value,
+                            void* stream) {
+    if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }
+    /*
+    DPCT1049: The work-group size passed to the SYCL kernel may exceed the
+    limit. To get the device limit, query info::device::max_work_group_size.
+    Adjust the work-group size if needed.
+    */
+    {
+        auto exp_props = sycl::ext::oneapi::experimental::properties{
+            sycl::ext::oneapi::experimental::use_root_sync};
+
+        strata::q_of(stream)
+            ->parallel_for<
+                dpct_kernel_name<class doorbell_publish_value_kernel_9bdb22>>(
+                sycl::nd_range<3>(sycl::range(1, 1, 1024),
+                                  sycl::range(1, 1, 1024)),
+                exp_props, [=](sycl::nd_item<3> item_ct1) {
+                    doorbell_publish_value_kernel(x, ids, weights, (int)n,
+                                                  (int)k, x_out, ids_out,
+                                                  weights_out, d_seq, value);
+                });
+    }
+}
+
 void doorbell_publish(const float* x, const int32_t* ids, const float* weights, int64_t n, int64_t k, float* x_out,
                       int32_t* ids_out, float* weights_out, uint32_t* d_seq, void* stream) {
     if (k > 1024) { std::fprintf(stderr, "doorbell_publish: k too large\n"); std::exit(1); }
diff --git a/sycl/src/kernels/cuda/iq_kernels.dp.cpp b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
index 5ae6b013a22..cecfcd81fb2 100644
--- a/sycl/src/kernels/cuda/iq_kernels.dp.cpp
+++ b/sycl/src/kernels/cuda/iq_kernels.dp.cpp
@@ -11,6 +11,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 #include "strata/kernels/dp4a.hpp"
+#include "strata/kernels/q8_1_finite.hpp"
 
 #define GGML_COMMON_DECL_SYCL
 #define GGML_COMMON_IMPL_SYCL
@@ -1564,11 +1565,11 @@ __dpct_inline__ void q8_1_store(const float xi, block_q8_1 *__restrict__ y,
             0xffffffffu, sycl::ext::oneapi::this_work_item::get_sub_group(),
             sum, o);
     }
-    const float d = amax / 127.0f;
-    const int8_t q = amax == 0.0f ? 0 : sycl::round(xi / d);
+    const float d = q8_1_finite(amax / 127.0f);   // #606: q8_1_finite.hpp - the same bits for every finite block
+    const int8_t q = q8_1_quant(xi, d, amax);
     const long long ib = i / 32, iqs = i % 32;
     y[ib].qs[iqs] = q;
-    if (iqs == 0) y[ib].ds = sycl::half2(d, sum);
+    if (iqs == 0) y[ib].ds = q8_1_ds(d, sum);
 }
 
 __dpct_inline__ void quantize_q8_1_kernel(const float *__restrict__ x,
diff --git a/sycl/src/kernels/cuda/kv_stream.dp.cpp b/sycl/src/kernels/cuda/kv_stream.dp.cpp
index c3cc23f0b9d..5c8566e3278 100644
--- a/sycl/src/kernels/cuda/kv_stream.dp.cpp
+++ b/sycl/src/kernels/cuda/kv_stream.dp.cpp
@@ -444,6 +444,29 @@ catch (sycl::exception const &exc) {
   std::exit(1);
 }
 
+void kv_unstage_to_host(const QsaAttnPools &stage, const KvHostPools &host,
+                        int fmt, int64_t b0, int64_t b1, const QsaShapes &s,
+                        void *stream) try {
+    if (b1 <= b0) return;
+    const Runs r = runs_of(stage, host, fmt, s);   // src: the host copy, dst: the staging pool (identity layout both)
+    for (int a = 0; a < r.n; ++a)
+        /*
+        DPCT1124: cudaMemcpyAsync is migrated to asynchronous memcpy API.
+        While the origin API might be synchronous, it depends on the type of
+        operand memory, so you may need to call wait() on event return by memcpy
+        API to ensure synchronization behavior.
+        */
+        if (DPCT_CHECK_ERROR(strata::q_of(stream)->memcpy(
+                (void *)(r.src[a] + b0 * r.len[a]), r.dst[a] + b0 * r.len[a],
+                (size_t)((b1 - b0) * r.len[a]))) != 0)
+            check("unstage");
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 KvStreamCounters kv_stream_counters(const KvStreamMap &m) try {
     int32_t c[kKvCtlInts] = {};
     KvStreamCounters r;
diff --git a/sycl/src/kernels/cuda/native_mmvq.dp.cpp b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
index 5f284fc5974..d44715a62d1 100644
--- a/sycl/src/kernels/cuda/native_mmvq.dp.cpp
+++ b/sycl/src/kernels/cuda/native_mmvq.dp.cpp
@@ -30,6 +30,7 @@
 #include "strata/sycl_queue.hpp"
 #include "strata/kernels/native_mmvq.hpp"
 #include "strata/kernels/dp4a.hpp"
+#include "strata/kernels/q8_1_finite.hpp"
 #include "strata/kernels/iq_kernels.hpp"
 
 #include <cstdint>
@@ -190,10 +191,10 @@ __dpct_inline__ void native_quantize_q8_1_kernel(const float *__restrict__ x,
     const float xi = x[i];
     const float amax = warp_max(sycl::fabs(xi));
     const float sum = warp_sum(xi);
-    const float d = amax / 127.0f;
-    const int8_t q = amax == 0.0f ? 0 : sycl::round(xi / d);
+    const float d = q8_1_finite(amax / 127.0f);   // #606: q8_1_finite.hpp - the same bits for every finite block
+    const int8_t q = q8_1_quant(xi, d, amax);
     y[i / Q8K].qs[i % Q8K] = q;
-    if (i % Q8K == 0) y[i / Q8K].ds = sycl::half2(d, sum);
+    if (i % Q8K == 0) y[i / Q8K].ds = q8_1_ds(d, sum);
 }
 
 // Exact pinned vec_dot_q5_K_q8_1_impl_vmmq expression and integer dot order.
diff --git a/sycl/src/kernels/iq_multi_parity.cpp b/sycl/src/kernels/iq_multi_parity.cpp
index 466d3f67fc1..ec795590df4 100644
--- a/sycl/src/kernels/iq_multi_parity.cpp
+++ b/sycl/src/kernels/iq_multi_parity.cpp
@@ -19,6 +19,7 @@
 #include <dpct/dpct.hpp>
 #include "strata/kernels/f16_bits.hpp"
 #include "strata/kernels/iq_kernels.hpp"
+#include "strata/kernels/native_mmvq.hpp"
 
 #include <algorithm>
 #include <cmath>
@@ -506,6 +507,82 @@ void bench(dpct::queue_ptr s, std::mt19937 &rng) {
     }
 }
 
+// #606: both q8_1 activation quantizers (quantize_q8_1_rows and native_quantize_q8_1) against a host transcription
+// of the 0.1.38 formula: every finite block bit for bit; a block whose sum (or scale) overflowed fp16 is now stored
+// finite (the largest half, its sign), with its values in the int8 range.
+void check_q8_1_finite(dpct::queue_ptr s, std::mt19937 &rng) {
+    const int n = 2560, rows = 3, nb = n / 32;
+    std::vector<float> x = random_x((size_t) rows * n, rng);
+    for (int i = 0; i < 32; ++i) x[(size_t) 5 * 32 + i] = 3000.0f;                  // sum 96,000: overflowed
+    for (int i = 0; i < 32; ++i) x[(size_t) 9 * 32 + i] = i == 3 ? -70000.0f : 0.5f;   // sum -69,984.5
+    for (int i = 0; i < 32; ++i) x[(size_t) 13 * 32 + i] = 2000.0f + i;            // sum 64,496: finite, kept
+    x[(size_t) n + 40] = 2.0e7f;                                                    // amax / 127 overflowed too
+    float* dx = dalloc<float>(x.size());
+    /*
+    DPCT1114: cudaMemcpy is migrated to asynchronization memcpy, assuming
+    in the original code the source host memory is pageable memory. If the
+    memory is not pageable, call wait() on event return by memcpy API to ensure
+    synchronization behavior.
+    */
+    ck(DPCT_CHECK_ERROR(
+           (dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue()).memcpy(dx, x.data(), x.size() * 4).wait()),
+       "x");
+    uint8_t* dq = dalloc<uint8_t>((size_t) rows * nb * 36);
+    for (int path = 0; path < 2; ++path) {
+        if (path == 0) k::quantize_q8_1_rows(dx, rows, n, dq, s);
+        else k::native_quantize_q8_1(dx, dq, n, rows, s);
+        ck(DPCT_CHECK_ERROR(s->wait()), "quantize");
+        std::vector<uint8_t> got((size_t) rows * nb * 36);
+        ck(DPCT_CHECK_ERROR((dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())
+                                .memcpy(got.data(), dq, got.size())
+                                .wait()),
+           "q");
+        int same = 0, clamped = 0, bad = 0;
+        for (int b = 0; b < rows * nb; ++b) {
+            const float* v = x.data() + (size_t) b * 32;
+            float lane[32], amax = 0.0f;
+            for (int i = 0; i < 32; ++i) { lane[i] = v[i]; amax = std::max(amax, std::fabs(v[i])); }
+            for (int o = 16; o > 0; o >>= 1) {   // the warp's butterfly: every lane ends with the same sum
+                float nx[32];
+                for (int i = 0; i < 32; ++i) nx[i] = lane[i] + lane[i ^ o];
+                std::memcpy(lane, nx, sizeof lane);
+            }
+            const float d = amax / 127.0f, sum = lane[0];
+            const uint8_t* g = got.data() + (size_t) b * 36;
+            uint16_t gd, gs;
+            std::memcpy(&gd, g, 2);
+            std::memcpy(&gs, g + 2, 2);
+            const uint16_t od = k::f16_from_f32(d), os = k::f16_from_f32(sum);
+            const bool finite_before = (od & 0x7c00) != 0x7c00 && (os & 0x7c00) != 0x7c00;
+            if (finite_before) {
+                uint8_t want[36];
+                std::memcpy(want, &od, 2);
+                std::memcpy(want + 2, &os, 2);
+                for (int i = 0; i < 32; ++i)   // CUDA's roundf: half away from zero, as std::round
+                    want[4 + i] = (uint8_t) (int8_t) (amax == 0.0f ? 0.0f : std::round(v[i] / d));
+                // native_mmvq.cu is built with --use_fast_math (its divisions are approximate): there the sum must be
+                // the same bits, the scale within one fp16 step and each value within one step
+                bool near = path == 1 && gs == os && std::abs((int) gd - (int) od) <= 1;
+                for (int i = 0; near && i < 32; ++i) near = std::abs((int) (int8_t) g[4 + i] - (int) (int8_t) want[4 + i]) <= 1;
+                if (std::memcmp(want, g, 36) == 0 || near) ++same;
+                else { ++bad; std::printf("  q8_1 path %d block %d: changed although it was finite\n", path, b); }
+            } else {
+                const float fd = k::f32_from_f16(gd), fs = k::f32_from_f16(gs);
+                bool ok = std::isfinite(fd) && std::isfinite(fs) && fd > 0.0f &&
+                          ((os & 0x7c00) != 0x7c00 ? gs == os : std::fabs(fs) == 65504.0f && (fs < 0) == (sum < 0));
+                for (int i = 0; i < 32; ++i) ok = ok && (int8_t) g[4 + i] >= -127 && (int8_t) g[4 + i] <= 127;
+                if (ok) ++clamped;
+                else { ++bad; std::printf("  q8_1 path %d block %d: d %g sum %g not finite and clamped\n", path, b, fd, fs); }
+            }
+        }
+        std::printf("q8_1 finite (%s): %d finite blocks as before, %d overflowed blocks clamped finite%s\n",
+                    path == 0 ? "quantize_q8_1_rows" : "native_quantize_q8_1", same, clamped, bad ? "  FAIL" : "");
+        g_fail += bad + (clamped != 3);
+    }
+    sycl::free(dx, dpct::get_in_order_queue());
+    sycl::free(dq, dpct::get_in_order_queue());
+}
+
 }  // namespace
 
 int main(int argc, char** argv) {
@@ -522,6 +599,7 @@ int main(int argc, char** argv) {
         for (int dt : {20, 42}) check_grouped(gu, dt, 2560, 640, s, rng);   // the model's shape
         check_grouped(gu, 23, 1024, 512, s, rng);                           // IQ4_XS down needs n_ff % 256 == 0
     }
+    check_q8_1_finite(s, rng);
     if (do_bench) bench(s, rng);
     std::printf("iq_multi_parity: %d failures\n", g_fail);
     dpct::get_current_device().destroy_queue(s);
diff --git a/sycl/src/prefill/prefill.cpp b/sycl/src/prefill/prefill.cpp
index 0c3882ea433..a4fac2c00c6 100644
--- a/sycl/src/prefill/prefill.cpp
+++ b/sycl/src/prefill/prefill.cpp
@@ -2113,8 +2113,41 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
         }
         host_setup_ms += ms_since(tsetup);
         bool normed = false;   // F-2: the previous half's write already normed R for this half (grs, xn16)
+        // #579 #613 (opt-in diagnosis, STRATA_PF_STEP_SYNC=1): the compute and copy streams are waited for after each
+        // step named below, a step that took over 250 ms is logged, and a stall's report names the step it is in.
+        // Slower (a sync per step); the bytes are the same.
+        static const bool step_sync = [] { const char* e = std::getenv("STRATA_PF_STEP_SYNC"); return e && e[0] == '1'; }();
+        auto pf_step = [&](const char *what, int64_t layer) {
+            try {
+        if (!step_sync) return;
+            core::progress_at(what, layer, p0);
+            const auto ts = Clock::now();
+            const dpct::err0 a = DPCT_CHECK_ERROR(m.cs->wait()),
+                             b = DPCT_CHECK_ERROR(m.copy->wait());
+            const double ms = ms_since(ts);
+            if (ms > 250.0 || a != 0 || b != 0)
+                std::fprintf(stderr,
+                             "strata pf-step: chunk from token %lld, layer "
+                             "%lld: %s took %.0f ms (%s / %s)\n",
+                             /*
+                             DPCT1009: SYCL reports errors using exceptions
+                             and does not use error codes. Please replace the
+                             "get_error_string_dummy(...)" with a real
+                             error-handling function.
+                             */
+                             (long long)p0, (long long)layer, what, ms,
+                             dpct::get_error_string_dummy(a),
+                             dpct::get_error_string_dummy(b));
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
         for (int64_t l = LB; l < LE; ++l) {
             core::progress_beat();   // the serve watchdog: a prompt chunk of 8192 tokens is still moving
+            if (l > LB) pf_step("reading the prompt (batched, step sync): the experts and the rest of layer", l - 1);
             core::progress_at("reading the prompt (batched): layer", l, p0);   // #251: a stall names layer and chunk
             const core::LayerView v(*m.wt, l);
             if (l == std::max<int64_t>(LB, 1) && !ple_land()) return false;   // the PLE rows, read from layer 1 on
@@ -2244,7 +2277,20 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                                                             core::qsa_kv_format(st),
                                                             (p0 + s.page_size - 1) / s.page_size, s, m.cs);
                         pt.mark(kPfQsa, cs);
+                        pf_step("reading the prompt (batched, step sync): the K/V staged from RAM at layer", l);
                     }
+                    // #579 #613 (HIP, opt-in A/B, STRATA_KV_HOST_DMA=1): the append writes the staging pool and the
+                    // resident slots only, and one DMA copies the chunk's blocks from the staging pool to the host copy
+                    // - no kernel writes host memory over PCIe.  The bytes every reader sees are the same (the staged
+                    // first block is complete; past the chunk's last cell nothing is read until a later append writes
+                    // it).  CUDA: never.
+#if defined(STRATA_USE_HIP)
+                    static const bool kv_host_dma = [] { const char* e = std::getenv("STRATA_KV_HOST_DMA"); return e && e[0] == '1'; }();
+#else
+                    constexpr bool kv_host_dma = false;
+#endif
+                    const bool host_by_dma = staged && kv_host_dma;
+                    const strata::kernels::KvHostPools* host_w = host_by_dma ? nullptr : &st.host;
                     if (st.kv_hybrid) {   // K8V4: K INT8 unrotated, V rotated Q4_0 (only V and the output rotate)
                         strata::kernels::fwht256_inplace_cuda(m.Vc, T * 2, m.cs);
                         kv_append(m.Kc, m.Kc, T, p0, st.page_table, s.page_size, nullptr, nullptr,
@@ -2259,12 +2305,17 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         }
                         if (st.kv_q4)
                             strata::kernels::kv_append_q4(st.k_q4, st.v_q4, st.page_table, p0, T, m.Kc, m.Vc, s, m.cs,
-                                                          &st.host, staged ? &m.stage : nullptr);
+                                                          host_w, staged ? &m.stage : nullptr);
                         else
                             kv_append(m.Kc, m.Vc, T, p0, st.page_table, s.page_size, st.kv_int8 ? nullptr : st.k_pool,
                                       st.kv_int8 ? nullptr : st.v_pool, st.k_q, st.v_q, st.k_scale, st.v_scale, m.cs,
-                                      &st.host, staged ? &m.stage : nullptr);
+                                      host_w, staged ? &m.stage : nullptr);
+                        if (host_by_dma)
+                            strata::kernels::kv_unstage_to_host(pools_of(m.stage, m.ident_table), st.host,
+                                                                core::qsa_kv_format(st), p0 / s.page_size,
+                                                                (p0 + T + s.page_size - 1) / s.page_size, s, m.cs);
                     }
+                    if (staged) pf_step("reading the prompt (batched, step sync): the K/V append at layer", l);
                     split_q(m.Qf, m.q, T, m.cs);
                     rms_rows(m.q, (const float*) wqn->data, T * 24, 256, 256, EPS, m.cs);
                     rope(m.q, T, 24, 256, 6144, p0, strata::kernels::rope_scaling(), m.cs);
@@ -2587,7 +2638,12 @@ bool Prefill::run(const int64_t *tokens, int64_t n, int64_t pos0,
                         */
                         else m.cs->memcpy(m.ids_host.data(), m.ids,
                                           (size_t)T * K * 4);
+                        // #579: a stall here is the GPU (this layer's attention and router, or the previous layer's
+                        // work), not the host: the watchdog's report says so (only its text changes)
+                        core::progress_at("reading the prompt (batched): waiting for the GPU (attention, router) at layer",
+                                          l, p0);
                         m.cs->wait();
+                        core::progress_at("reading the prompt (batched): layer", l, p0);
                         pt.fold();
                         if (pe.on) {   // the peer's marks so far are done: the primary waited for its last rows
                             /*
diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index d082ab67d67..26f3852da53 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -84,6 +84,8 @@ namespace strata::prefill { void set_nonresident_share(double share); }   // SYC
 #else
 #include <unistd.h>
 #include <cerrno>
+#include <sys/stat.h>
+#include <sys/sysmacros.h>
 #endif
 
 #include <array>
@@ -125,7 +127,116 @@ bool under_wddm() {
 #endif
 }
 
+// #620 #486: " (N MiB of M MiB VRAM free on this GPU)" for an allocation's failure message (clears the error first)
+std::string vram_free_note() try {
+    /*
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    (void)0;
+    size_t free_b = 0, total_b = 0;
+    /*
+    DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions for
+    device information which may not be supported by all compilers or runtimes.
+    You may need to adjust the code.
+    */
+    if (DPCT_CHECK_ERROR(
+            dpct::get_current_device().get_memory_info(free_b, total_b)) != 0) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use the
+        error codes. The cudaGetLastError function call was replaced with 0. You
+        need to rewrite this code.
+        */
+        (void)0;
+        return {};
+    }
+    char buf[96];
+    std::snprintf(buf, sizeof buf, " (%llu MiB of %llu MiB VRAM free on this GPU)", (unsigned long long) (free_b >> 20),
+                  (unsigned long long) (total_b >> 20));
+    return buf;
+}
+catch (sycl::exception const &exc) {
+  std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+            << ", line:" << __LINE__ << std::endl;
+  std::exit(1);
+}
+
 // perf-review D-4: the lent slots are refilled with queued copies and one wait; STRATA_REFILL_BLOCKING=1 waits on each
+// A file-backed arena on AMD (STRATA_ARENA_MMAP; the engine raises ROCclr's pin-in-place threshold, see main): an
+// adaptive swap copies one expert straight from the mapped file.  Through ROCclr's staging that copy blocks the host
+// (decode windows of 150+ ms); instead the batch's pages are locked here for the async copies and unlocked when they
+// have landed (unpin_blobs), so the release that follows can hand them back.  Neighbouring experts share a page and
+// a copy from a range only PART of which is registered fails ("invalid argument"), so the page ranges are merged
+// first and each merged span is registered once.  A span that does not register is copied through the staging
+// path.  Portable: a layer split copies to either card.
+// Whether pin_blobs locks anything (AMD on Linux with STRATA_ARENA_MMAP=1): the callers only gather the swaps' spans
+// then - `blob()` is not free (it counts reads, and the file tier may assemble the blob), so the default runs skip it.
+bool pin_blobs_on() {
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    static const bool on = std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1';
+    return on;
+#else
+    return false;
+#endif
+}
+int pin_blobs(std::vector<std::pair<uintptr_t, uintptr_t>> r, std::vector<void*>& live) {
+    int failed = 0;   // ranges left pageable (a copy from them still works, through the driver's staging)
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    if (!pin_blobs_on() || r.empty()) return 0;
+    for (auto& [a, e] : r) { a &= ~(uintptr_t) 4095; e = (e + 4095) & ~(uintptr_t) 4095; }
+    std::sort(r.begin(), r.end());
+    size_t k = 0;
+    for (size_t i = 1; i < r.size(); ++i) {
+        if (r[i].first <= r[k].second) r[k].second = std::max(r[k].second, r[i].second);
+        else r[++k] = r[i];
+    }
+    r.resize(k + 1);
+    for (const auto& [a, e] : r) {
+        if (cudaHostRegister((void*) a, (size_t) (e - a), cudaHostRegisterReadOnly | cudaHostRegisterPortable) ==
+            cudaSuccess)
+            live.push_back((void*) a);
+        else {
+            (void) cudaGetLastError();
+            ++failed;
+        }
+    }
+#else
+    (void) r; (void) live;
+#endif
+    return failed;
+}
+void unpin_blobs(std::vector<void*>& v) {
+    /*
+    DPCT1027: The call to cudaHostUnregister was replaced with 0 because
+    SYCL currently does not support registering of existing host memory for use
+    by device. Use USM to allocate memory for use by host and device.
+    */
+    for (void *p : v)(void) 0;
+    /*
+    DPCT1010: SYCL uses exceptions to report errors and does not use the
+    error codes. The cudaGetLastError function call was replaced with 0. You
+    need to rewrite this code.
+    */
+    (void)0;
+    v.clear();
+}
+
+// STRATA_RSS_TRACE=1: the process's mapped file pages (the arena) at a startup step - who reads the arena back
+void rss_probe(const char* where) {
+    static const bool on = std::getenv("STRATA_RSS_TRACE") != nullptr;
+    if (!on) return;
+    FILE* f = std::fopen("/proc/self/status", "r");
+    if (!f) return;
+    char line[256];
+    long long kb = -1;
+    while (std::fgets(line, sizeof line, f))
+        if (std::strncmp(line, "RssFile:", 8) == 0) { kb = std::atoll(line + 8); break; }
+    std::fclose(f);
+    std::fprintf(stderr, "strata rss: %s: RssFile %.2f GiB\n", where, (double) kb / (1024.0 * 1024.0));
+    std::fflush(stderr);
+}
+
 bool refill_blocking() {
     static const bool v = std::getenv("STRATA_REFILL_BLOCKING") != nullptr;
     return v;
@@ -367,6 +478,10 @@ struct Options {
     /// and the KV state, minus this reserve for the graphs, the hit scratch and the head.
     int vram_reserve_mib = 700;
     bool vram_reserve_given = false;   ///< --vram-reserve-mib on the command line (#496: no smaller automatic reserve)
+    /// #533 (opt-in): the expert cache in physical segments (CUDA virtual memory management), so the serve loop's
+    /// `VRAM <reserve_mib>` command can give part of it back to other programs and take it again.  Off: one cudaMalloc.
+    bool vram_elastic = false;
+    int64_t vram_segment_mib = 512;
     /// Plan v0.3 P5: batched prompt processing in chunks of this many tokens (0 = the token path).
     int64_t prefill_chunk = 0;
     /// `--prefill auto`: the largest chunk (up to 8192) whose buffers the expert cache can lend.  Every expert a chunk
@@ -440,6 +555,11 @@ struct Options {
     /// --serve: the token that opens a chat turn (<|im_start|>).  The last one in a prompt is where the chat's
     /// history ends and the new assistant turn begins, which is the checkpoint the next request can reuse.
     int64_t turn_token = 248045;
+    /// --serve (#458, opt-in): the role token of a short turn the server puts right before the new assistant turn
+    /// (the "system" of a trailing reasoning-effort turn).  When the turn before the last <|im_start|> opens with it,
+    /// the checkpoint goes in front of that turn instead, so it holds the conversation and not the effort text.
+    /// -1 = off (the checkpoint at the last <|im_start|>, as before).
+    int64_t tail_role_token = -1;
     /// --serve: a text part of the prompt of at most N tokens (a chat message, the assistant header, a short tool
     /// result) goes through the verify windows, S tokens at a time, instead of the batched prompt path (0 = always
     /// the batched path)
@@ -542,8 +662,13 @@ void usage() {
                  "  --conversation-cache-mib N  --serve: RAM budget for parked conversations (default 0 = off)\n"
                  "  --conversation-cache-slots N  --serve: at most N parked conversations (default 4)\n"
                  "  --conversation-cache-min-free-mib N  --serve: physical RAM floor when parking (default 2560)\n"
+                 "  --vram-elastic       --serve (#533, opt-in, NVIDIA): the expert cache in segments (--vram-segment-mib,\n"
+                 "                       default 512), so the command `VRAM <reserve_mib>` (the server's POST /v1/vram) can\n"
+                 "                       give VRAM back to other programs between requests and take it back later\n"
                  "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
                  "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
+                 "  --tail-role-token ID --serve: a turn of this role right before the last turn is left out of\n"
+                 "                       the conversation checkpoint (a trailing effort turn; default -1 = off)\n"
                  "  --short-read N       --serve: read at most N fresh text tokens through the decode windows instead\n"
                  "                       of the batched prompt path (default 64, 0 = off)\n"
                  "  --suffix-draft N     prompt lookup: draft from an earlier repeat of the last N+ tokens of context\n"
@@ -820,6 +945,55 @@ std::string stage_text() {
     return s;
 }
 
+#if !defined(_WIN32)
+// #605: whether `path` is on a rotational disk (1), not (0) or unknown (-1), from sysfs; `dev` is the disk's name
+int on_rotational_disk(const std::string& path, std::string& dev) {
+    struct stat st{};
+    if (::stat(path.c_str(), &st) != 0) return -1;
+    char sys[64];
+    std::snprintf(sys, sizeof sys, "/sys/dev/block/%u:%u", (unsigned) major(st.st_dev), (unsigned) minor(st.st_dev));
+    std::error_code ec;
+    std::filesystem::path p = std::filesystem::canonical(sys, ec);
+    for (int up = 0; !ec && up < 2; ++up, p = p.parent_path()) {   // a partition has its disk's queue
+        std::ifstream q(p / "queue" / "rotational");
+        int r = -1;
+        if (q >> r) {
+            dev = p.filename().string();
+            return r;
+        }
+    }
+    return -1;
+}
+
+// #605: the engine's threads in uninterruptible sleep (state D - almost always waiting for the disk), and where
+// (wchan): 16 threads in blk_io_schedule is a disk that cannot keep up, not a deadlock in the engine
+void disk_wait_threads(std::FILE* f) {
+    std::map<std::string, int> where;
+    int waiting = 0, threads = 0;
+    std::error_code ec;
+    for (const auto& e : std::filesystem::directory_iterator("/proc/self/task", ec)) {
+        ++threads;
+        std::ifstream st(e.path() / "stat");
+        std::string line;
+        std::getline(st, line);
+        const size_t rp = line.rfind(')');
+        if (rp == std::string::npos || rp + 2 >= line.size() || line[rp + 2] != 'D') continue;
+        ++waiting;
+        std::ifstream w(e.path() / "wchan");
+        std::string wc;
+        std::getline(w, wc);
+        ++where[wc.empty() || wc == "0" ? "?" : wc];
+    }
+    if (threads == 0) return;
+    std::string list;
+    for (const auto& [name, n] : where) list += (list.empty() ? " (" : ", ") + name + " x" + std::to_string(n);
+    if (!list.empty()) list += ")";
+    std::fprintf(f, "  threads waiting on the disk (state D): %d of %d%s%s\n", waiting, threads, list.c_str(),
+                 waiting > 0 ? " - the engine is waiting for the drive: a rotational or failing disk with --ple-io "
+                               "direct (#605: --ple-io ram), or a drive too slow for the reads asked of it" : "");
+}
+#endif
+
 void stall_report(std::FILE* f, uint64_t layers_during) {
     strata::core::Progress& p = strata::core::progress();
     std::fprintf(f, "strata serve: stall report (engine %s): stage \"%s\" for %lld s; %llu layers served since the "
@@ -833,6 +1007,9 @@ void stall_report(std::FILE* f, uint64_t layers_during) {
         }
         if (auto fn = strata::core::diag_pool_fn().load()) fn(f);
         if (auto fn = strata::core::diag_verify_fn().load()) fn(f);
+#if !defined(_WIN32)
+        disk_wait_threads(f);
+#endif
         const MemSample m = mem_sample();
         std::fprintf(f, "  memory: %llu MiB resident, %llu MiB %s, %llu MiB RAM available; %llu %s\n", m.rss_mib,
                      m.commit_mib,
@@ -1134,6 +1311,15 @@ int main(int argc, char **argv) try {
     // pipe or a file is block-buffered, so a program that dies loses every line it had already printed - which
     // turns "it crashed at step 7" into "it crashed somewhere", and the difference is a debugging session.
     std::setvbuf(stdout, nullptr, _IONBF, 0);
+#if (defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)) && !defined(_WIN32)
+    // AMD, a file-backed arena (STRATA_ARENA_MMAP): ROCclr copies a pageable source of 1 MiB or more by locking its
+    // pages in place (a GPU userptr), and keeps them - so every expert the VRAM fill copied from the mapped
+    // experts.bin stayed resident, the release of the VRAM-held ones was undone by the driver at once, and a
+    // 32 GB PC ran with ~0.3 GB free: the kernel swapped, and a turn's checkpoint took 25-80 s.  Above this size
+    // ROCclr stages through its own pinned buffers instead; decode is unchanged (49.06 vs 49.16 ms/window).
+    if (std::getenv("STRATA_ARENA_MMAP") && std::getenv("STRATA_ARENA_MMAP")[0] == '1')
+        setenv("GPU_PINNED_MIN_XFER_SIZE", "1000000", 0);   // MiB; an explicit setting wins
+#endif
     // Load every CUDA kernel when the context is created, before the expert cache takes the free VRAM.  With the
     // default lazy loading, a kernel first used mid-prompt (MMQ for IQ3_XXS at 64K+ on a 12 GB card) found no VRAM
     // left for its code and the engine ended ("out of memory: cudaFuncSetAttribute").  Costs ~30 MB of VRAM.
@@ -1281,6 +1467,8 @@ int main(int argc, char **argv) try {
         else if (a == "--no-split-rows") o.no_split_rows = true;
         else if (a == "--no-prefill-borrow") { o.no_prefill_borrow = true; borrow_explicit = true; }
         else if (a == "--prefill-borrow") { o.no_prefill_borrow = false; borrow_explicit = true; }
+        else if (a == "--vram-elastic") o.vram_elastic = true;
+        else if (a == "--vram-segment-mib") o.vram_segment_mib = std::atoll(next("--vram-segment-mib"));
         else if (a == "--prefill-until") o.prefill_until = std::atoll(next("--prefill-until"));
         else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
         else if (a == "--spec") o.spec = std::atoi(next("--spec"));
@@ -1318,6 +1506,7 @@ int main(int argc, char **argv) try {
         else if (a == "--prompt-cache-every") o.prompt_cache_every = std::max(0LL, std::atoll(next("--prompt-cache-every")));
         else if (a == "--prompt-cache-root") o.prompt_cache_root = std::max(0LL, std::atoll(next("--prompt-cache-root")));
         else if (a == "--turn-token") o.turn_token = std::atoll(next("--turn-token"));
+        else if (a == "--tail-role-token") o.tail_role_token = std::atoll(next("--tail-role-token"));
         else if (a == "--short-read") o.short_read = std::max(0LL, std::atoll(next("--short-read")));
         else if (a == "--suffix-draft") o.suffix_draft = std::max(0, std::atoi(next("--suffix-draft")));
         else if (a == "--mtp-max-t") o.mtp_max_t = std::max(0, std::atoi(next("--mtp-max-t")));
@@ -1477,7 +1666,9 @@ int main(int argc, char **argv) try {
         }
         if (!ok) {
             std::fprintf(stderr, "strata generate: --layer-split K[,K2..]|auto needs --serve, rising K from 2, and one "
-                                 "distinct GPU per K in --split-device (1..%d; or 0 with one K: the same GPU)\n", n_dev - 1);
+                                 "distinct GPU per K in --split-device (1..%d; or 0 with one K: the same GPU). K is the "
+                                 "FIRST LAYER of each later GPU, not a count of layers per card: \"24,36,42\" for 4 "
+                                 "GPUs, not \"24,12,6,6\" (got \"%s\")\n", n_dev - 1, o.layer_split.c_str());
             return 2;
         }
     }
@@ -2080,6 +2271,38 @@ int main(int argc, char **argv) try {
         }
         if (native_pack) skip.insert("token_embd.weight");
     }
+    // Layer split with explicit split points: every GPU holds only the dense weights of ITS layers (the PLE tensors
+    // stay everywhere).  Without this each card keeps a full copy (~3.4 GB for the Coder) that its stage never
+    // reads - VRAM the expert cache wants.  Opt-in, STRATA_STAGE_TRIM=1, on HIP and CUDA alike: measured on 2x MI50
+    // (PR #639), and the default waits for its author's re-run of the release branch on his cards.
+    const std::set<std::string> skip_base = skip;
+    const bool stage_trim = multi_gpu && !split_auto && !split_at.empty() && [] {
+        const char* v = std::getenv("STRATA_STAGE_TRIM");
+        return v != nullptr && v[0] != 0 && std::string(v) != "0";
+    }();
+    // keep_routers: CUDA0 with --mmap-experts keeps every layer's router (ffn_gate_inp, ~2.5 MiB a layer) - the file
+    // tier's routing-aware prefetch (RouterLookahead, below) copies all of them from CUDA0's arena, and would
+    // otherwise turn itself off
+    auto add_foreign = [&](int64_t lb, int64_t le, std::set<std::string>& out, bool keep_routers) {
+        std::FILE* f = std::fopen((o.pack + "/index.txt").c_str(), "rb");
+        if (!f) return;
+        char line[1024], name[256];
+        while (std::fgets(line, sizeof line, f)) {
+            if (line[0] == '#' || std::sscanf(line, "%255s", name) != 1) continue;
+            const std::string n = name;
+            if (n.rfind("blk.", 0) != 0 || n.find("ple") != std::string::npos) continue;
+            if (keep_routers && n.ends_with(".ffn_gate_inp.weight")) continue;
+            const int64_t l = std::atoll(name + 4);
+            if (l < lb || l >= le) out.insert(n);
+        }
+        std::fclose(f);
+    };
+    if (stage_trim) {
+        add_foreign(0, split_at[0], skip, o.mmap_experts);
+        strata::core::NativeDense::set_layer_range(0, (int) split_at[0]);
+        std::fprintf(stderr, "strata generate: layer split: CUDA0 loads the dense weights of layers 0-%lld only\n",
+                     (long long) split_at[0] - 1);
+    }
     uint64_t pool_bytes = 0;
     if (!strata::core::WeightTable::pool_bytes(o.pack, pool_bytes, err, skip.empty() ? nullptr : &skip)) {
         std::fprintf(stderr, "strata generate: %s\n", err.c_str());
@@ -2301,6 +2524,18 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+#if !defined(_WIN32)
+        if (pio.mode == strata::kernels::PleIo::Direct) {
+            // #605: --ple-io direct's random reads (up to --ple-inflight at once) are for SSDs; a rotational disk
+            // can take longer than the stall watchdog's 60 s for one prompt chunk's rows.  Recommended, not forced.
+            std::string dev;
+            if (!under_wddm() && on_rotational_disk(o.ple_gguf, dev) == 1)   // (WSL's virtual disk says rotational)
+                std::fprintf(stderr, "strata generate: WARNING: the n-gram table (%s) is on a rotational disk (%s): "
+                                     "--ple-io direct reads it at random and can stall a prompt for minutes (#605). "
+                                     "--ple-io ram (it then needs RAM for the table) or the model on an SSD is "
+                                     "recommended\n", o.ple_gguf.c_str(), dev.c_str());
+        }
+#endif
         if (pio.lock)
             std::fprintf(stderr, "strata generate: PLE table %s (--ple-io ram) in %.1f s\n",
                          ple_table.locked() ? "locked in RAM" : "loaded (not locked)",
@@ -2474,12 +2709,26 @@ int main(int argc, char **argv) try {
             return 1;
         }
         const strata::core::OnDevice on(st.dev);
+        std::set<std::string> skip_s = skip_base;
+        uint64_t pool_s = pool_bytes;
+        if (stage_trim) {
+            const int64_t lb = split_at[i], le = i + 1 < split_at.size() ? split_at[i + 1] : g.n_layers;
+            add_foreign(lb, le, skip_s, false);
+            strata::core::NativeDense::set_layer_range((int) lb, (int) le);
+            if (!strata::core::WeightTable::pool_bytes(o.pack, pool_s, err, &skip_s)) {
+                std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+                return 1;
+            }
+            std::fprintf(stderr, "strata generate: layer split: CUDA%d loads the dense weights of layers %lld-%lld only\n",
+                         st.dev, (long long) lb, (long long) le - 1);
+        } else {
+            skip_s = skip;
+        }
         void* arena_s = nullptr;
         if (DPCT_CHECK_ERROR(arena_s = (void *)sycl::malloc_device(
-                                 pool_bytes, dpct::get_in_order_queue())) !=
-                0 ||
-            !st.wt.load(o.pack, arena_s, pool_bytes, err,
-                        skip.empty() ? nullptr : &skip)) {
+                                 pool_s, dpct::get_in_order_queue())) != 0 ||
+            !st.wt.load(o.pack, arena_s, pool_s, err,
+                        skip_s.empty() ? nullptr : &skip_s)) {
             /*
             DPCT1026: The call to cudaGetLastError was removed because this
             functionality is redundant in SYCL.
@@ -2494,7 +2743,7 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: layer split, CUDA%d weights: %s (%llu MiB needed, %llu MiB of %llu "
                                  "MiB free on that card)\n", st.dev,
                          err.empty() ? "the weight arena does not fit" : err.c_str(),
-                         (unsigned long long) (pool_bytes >> 20), (unsigned long long) (free_b >> 20),
+                         (unsigned long long) (pool_s >> 20), (unsigned long long) (free_b >> 20),
                          (unsigned long long) (total_b >> 20));
             return 1;
         }
@@ -2871,8 +3120,9 @@ int main(int argc, char **argv) try {
         const strata::core::WeightRef* wo_s = st.wt.find("output.weight");
         if (wo_s == nullptr ||
             (last && !o.native_head_gguf.empty() && !st.head.load(o.native_head_shards, g.n_embd, wo_s->ne1, err))) {
-            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s\n", st.dev,
-                         wo_s == nullptr ? "output.weight is missing" : err.c_str());
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d head: %s%s\n", st.dev,
+                         wo_s == nullptr ? "output.weight is missing" : err.c_str(),
+                         wo_s == nullptr ? "" : vram_free_note().c_str());
             return 1;
         }
         size_t fb = 0, tb = 0;
@@ -2901,7 +3151,39 @@ int main(int argc, char **argv) try {
         static const strata::core::ModelGeometry draft_geometry{};
         // with a layer split across GPUs the drafter reads the last stage's residual: it lives on that device
         const strata::core::OnDevice on_mtp(last_st ? last_st->dev : -1);
-        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s\n", err.c_str()); return 1; }
+        if (!o.mtp.empty() && !mtp.load(o.mtp, draft_geometry, last_st ? last_st->ss : ss, o.spec, err, o.mtp_window)) { std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(), vram_free_note().c_str()); return 1; }
+    }
+    // THE HEAD BEFORE THE CACHE, AND BEFORE THE ARENA.  The expert cache takes what is free minus the reserve, so
+    // everything allocated after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after
+    // it and ate most of the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for
+    // good at its first verify window.  Loaded first, the cache is sized around it.  #620: and before the expert
+    // arena registers tens of GiB of host pages, like the drafter above - WDDM then refused the head's cudaMalloc on
+    // a 16 GB card with the desktop on the iGPU ("native head upload: out of memory" with GiBs free).
+    const strata::core::WeightRef* wo = wt.find("output.weight");
+    if (wo == nullptr) { std::fprintf(stderr, "strata generate: output.weight is missing\n"); return 1; }
+    const int64_t n_vocab = wo->ne1;
+    strata::core::NativeHead native_head;
+    if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
+        if (!native_head.load(o.native_head_shards, g.n_embd, n_vocab, err)) {
+            std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(), vram_free_note().c_str());
+            return 1;
+        }
+        std::fprintf(stderr, "strata generate: experimental native Q5_K head, %llu bytes\n",
+                     (unsigned long long) native_head.weight_bytes());
+    }
+    std::vector<float> logits((size_t) n_vocab);
+    float* d_logits = nullptr;
+    if (DPCT_CHECK_ERROR(
+            d_logits = (float *)sycl::malloc_device(
+                (size_t)n_vocab * 4, dpct::get_in_order_queue())) != 0) {
+        /*
+        DPCT1010: SYCL uses exceptions to report errors and does not use
+        the error codes. The cudaGetLastError function call was replaced with 0.
+        You need to rewrite this code.
+        */
+        (void)0;
+        std::fprintf(stderr, "strata generate: the logits buffer failed%s\n", vram_free_note().c_str());
+        return 1;
     }
     // Create the additional contexts after MTP has secured CUDA0 memory, but
     // before the host arena maps its expert pages into their address spaces.
@@ -3078,6 +3360,8 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: %s\n", err.c_str());
             return 1;
         }
+        if (!arena_src.ram_warning().empty())   // #633: said before the load's numbers, which it explains
+            std::fprintf(stderr, "strata generate: WARNING: %s\n", arena_src.ram_warning().c_str());
         std::fprintf(stderr, "strata generate: expert arena: %s\n", arena_src.note().c_str());
         std::fprintf(stderr, "strata generate: loaded %.2f GiB at %.2f GiB/s\n",
                      (double) strata::kernels::cpu::expert_layout().total / (1024.0 * 1024 * 1024),
@@ -3112,30 +3396,7 @@ int main(int argc, char **argv) try {
     // numbers if the slots do not fit, instead of handing back a cache smaller than it was asked for.
     mem_mark("the weights, the session and the drafter");
     strata::core::ExpertCache xcache;
-    // THE HEAD BEFORE THE CACHE.  The expert cache takes what is free minus the reserve, so everything allocated
-    // after it comes out of the reserve.  The native head (~0.5 GB with IQ3_S) was loaded after it and ate most of
-    // the 700 MiB: 128K IQ3_S ended with 30 MiB free, the driver paged, and a request stalled for good at its first
-    // verify window.  Loaded first, the cache is sized around it.
-    const strata::core::WeightRef* wo = wt.find("output.weight");
-    if (wo == nullptr) { std::fprintf(stderr, "strata generate: output.weight is missing\n"); return 1; }
-    const int64_t n_vocab = wo->ne1;
-    strata::core::NativeHead native_head;
-    if (!o.native_head_gguf.empty() && !multi_gpu) {   // a layer split's head is on its last stage
-        if (!native_head.load(o.native_head_shards, g.n_embd, n_vocab, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
-            return 1;
-        }
-        std::fprintf(stderr, "strata generate: experimental native Q5_K head, %llu bytes\n",
-                     (unsigned long long) native_head.weight_bytes());
-    }
-    std::vector<float> logits((size_t) n_vocab);
-    float* d_logits = nullptr;
-    if (DPCT_CHECK_ERROR(
-            d_logits = (float *)sycl::malloc_device(
-                (size_t)n_vocab * 4, dpct::get_in_order_queue())) != 0) {
-        std::fprintf(stderr, "strata generate: the logits buffer failed\n");
-        return 1;
-    }
+    // THE HEAD BEFORE THE CACHE: the native head and the logits are allocated above, before the expert arena (#620)
     const bool auto_cache = o.expert_cache < 0;
     bool reserve_adapted = false;   // #496: the auto sizing lowered the reserve so a small card's cache fits
     if (o.expert_cache < 0) {
@@ -3262,6 +3523,24 @@ int main(int argc, char **argv) try {
         }
         o.expert_cache = (int) sized_slots.size();
     }
+    // #533: --vram-elastic: the cache in physical segments (the VRAM command resizes it between requests).  One GPU,
+    // no helper caches, serve mode: anything else keeps the one cudaMalloc, said once.
+    if (o.vram_elastic) {
+        const char* why = !o.serve ? "it works between requests of --serve"
+                        : multi_gpu ? "a layer split has a cache per GPU"
+                        : std::any_of(o.expert_cache_remote.begin(), o.expert_cache_remote.end(),
+                                      [](int n) { return n > 0; }) ? "the helper caches on other GPUs"
+                        : o.vram_segment_mib < 64 ? "--vram-segment-mib is below 64" : nullptr;
+#if defined(STRATA_USE_HIP)
+        if (why == nullptr) why = "it is NVIDIA-only for now";
+#endif
+        if (why != nullptr) {
+            std::fprintf(stderr, "strata generate: --vram-elastic is off: %s\n", why);
+            o.vram_elastic = false;
+        } else {
+            xcache.set_segment_bytes(o.vram_segment_mib << 20);
+        }
+    }
     if (o.expert_cache > 0) {
         // keep the first `keep_bytes` of the cache (the profile's hottest experts first); false when nothing is left
         auto shrink_to = [&](int64_t keep_bytes) -> bool {
@@ -3562,6 +3841,17 @@ int main(int argc, char **argv) try {
         // to hold back is the windows - and `free_b` has already lost the drafter.
         const int64_t room = stage_room(st.dev, true, false);
         const strata::core::OnDevice on(st.dev);
+        {
+            size_t fb = 0, tb = 0;
+            /*
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(fb, tb);
+            std::fprintf(stderr, "strata generate: layer split, CUDA%d: %.2f GiB free of %.2f, room for experts %.2f GiB\n",
+                         st.dev, (double) fb / 1073741824.0, (double) tb / 1073741824.0, (double) room / 1073741824.0);
+        }
         std::vector<int64_t> sized;
         int64_t used = 0;
         for (const auto& pr : st.profile) {
@@ -4101,7 +4391,12 @@ int main(int argc, char **argv) try {
         strata::core::doorbell_reset(db);
         double mix = 0, ffn = 0, post = 0;
         if (!strata::core::session_replay_stages(g, 0, 0, ss, gr, main_cs, mix, ffn, post, err)) {
-            std::fprintf(stderr, "strata generate: %s\n", err.c_str());
+            // #610: a native (IQ) pack captures no per-layer graphs; the serve path times its window's stages
+            std::fprintf(stderr, "strata generate: %s%s\n", err.c_str(),
+                         native_pack ? " - a native (IQ) pack has no per-layer graphs to replay. Its decode window's GPU "
+                                       "stages are printed per request by the serve path instead: STRATA_VERIFY_PROFILE=1 "
+                                       "STRATA_DECODE_TIMING=1 with --serve (docs/DETAILS.md, \"Where a decode window's "
+                                       "time goes\")" : "");
             return 1;
         }
         const int reps = 20;
@@ -4422,6 +4717,31 @@ int main(int argc, char **argv) try {
         }
         thits.d_res = d_res;
         thits.n_expert = g.n_expert;
+        // a file-backed arena (STRATA_ARENA_MMAP): the experts no GPU holds are the ones the CPU pool and the
+        // prompt path will read - start reading them now instead of faulting them in 4 KB at a time mid-request
+        // ... and the ones a GPU holds are handed back first (STRATA_ARENA_RELEASE=0 keeps them): the fill read the
+        // whole arena, and left mapped and referenced it crowds every other allocation into swap
+        {
+            static const bool keep = std::getenv("STRATA_ARENA_RELEASE") && std::getenv("STRATA_ARENA_RELEASE")[0] == '0';
+            rss_probe("before the release");
+            uint64_t released = 0;
+            if (!keep)
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] != strata::core::kNotResident)
+                        released += srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);
+            if (released > 0)
+                std::fprintf(stderr, "strata generate: expert arena: %.2f GiB of VRAM-held experts handed back to the OS\n",
+                             (double) released / (1024.0 * 1024.0 * 1024.0));
+            rss_probe("after the release");
+            int64_t pf = 0;
+            for (size_t i = 0; i < host_res.size(); ++i)
+                if (host_res[i] == strata::core::kNotResident) {
+                    srcp->prefetch((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);
+                    ++pf;
+                }
+            (void) pf;
+            rss_probe("after the prefetch hints");
+        }
         for (auto& st : stages) {   // layer split across GPUs: the same table on every device
             const strata::core::OnDevice on(st->dev);
             if (DPCT_CHECK_ERROR(
@@ -4629,6 +4949,19 @@ int main(int argc, char **argv) try {
             std::fprintf(stderr, "strata generate: CPU expert residency: %s\n", err.c_str());
             return 1;
         }
+        // #577: the unbuffered choice above was made before the RAM copy existed, from the budget asked for; now the
+        // copy is built, decide again from the RAM it really holds and the expert bytes outside it (on a 96 GB PC
+        // the file cache keeps those, and every refill after a prompt read the drive instead).  Windows only: the
+        // unbuffered reads exist there alone
+#if defined(_WIN32)
+        if (o.mmap_experts && o.resident_budget > 0) {
+            std::string why;
+            const bool was = src.unbuffered();
+            const bool ub = src.recheck_unbuffered(why);
+            std::fprintf(stderr, "strata generate: the file tier reads %s%s (%s)\n",
+                         ub ? "unbuffered" : "through the file cache", ub == was ? "" : " (changed)", why.c_str());
+        }
+#endif
     }
     if (o.serve) {
         if (o.spec < 2 || o.mtp.empty() || o.prefill_chunk <= 0 ||
@@ -4866,6 +5199,7 @@ int main(int argc, char **argv) try {
         } else {
             std::fprintf(stderr, "strata serve: the prompt path allocates its own buffers (too few cache slots to borrow)\n");
         }
+        rss_probe("the prompt path set up");
         // layer split across GPUs: a prompt path per stage, each handing its chunk's rows to the next.
         // THE CHUNK STEPS DOWN INSTEAD OF EXITING.  A split's stage caches are sized after the arena is registered, and
         // the prompt path's own buffers (no loan) are not priced into them: with the whole arena pinned (#253) a
@@ -5275,10 +5609,33 @@ int main(int argc, char **argv) try {
         std::vector<int64_t> part_next(stages.size() + 1, INT64_MAX);
         // a checkpoint of the state after `cur[0, L)`; false only when the copy itself failed.  `parts`: the stages'
         // states saved at L (a split's mid-prompt checkpoint); without, they are read now (everything is at L)
-        auto checkpoint_at = [&](int64_t L, std::vector<ConvCheckpoint> *parts =
-                                                nullptr) -> bool {
+        // #613: why the last checkpoint_at failed - a failed device sync is the GPU itself (a hang Windows then resets),
+        // not the checkpoint, and the error says so
+        std::string ckpt_why;
+        auto gpu_sync_ok = [&]() -> bool {
             try {
-        if (o.prompt_cache <= 0 || L < 1) return true;
+        const dpct::err0 e = DPCT_CHECK_ERROR(
+            dpct::get_current_device().queues_wait_and_throw());
+            if (e == 0) return true;
+            /*
+            DPCT1009: SYCL reports errors using exceptions and does not use
+            error codes. Please replace the "get_error_string_dummy(...)" with a
+            real error-handling function.
+            */
+            ckpt_why = std::string(": the GPU stopped responding before it (") +
+                       dpct::get_error_string_dummy(e) +
+                       ") - a GPU hang; on Windows the driver is then reset";
+            return false;
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
+        auto checkpoint_at = [&](int64_t L, std::vector<ConvCheckpoint>* parts = nullptr) -> bool {
+            ckpt_why.clear();
+            if (o.prompt_cache <= 0 || L < 1) return true;
             for (ConvCheckpoint& c : checks)
                 if ((int64_t) c.ids.size() == L) { c.used = ++check_clock; return true; }
             ConvCheckpoint c;
@@ -5293,17 +5650,12 @@ int main(int argc, char **argv) try {
                 c.block_pos = std::move((*parts)[0].block_pos);
                 for (size_t i = 1; i < parts->size(); ++i) c.stage_parts.push_back(std::move((*parts)[i]));
             } else {
-                if (DPCT_CHECK_ERROR(
-                        dpct::get_current_device().queues_wait_and_throw()) !=
-                        0 ||
-                    !checkpoint_save(c, ss, g)) return false;
+                if (!gpu_sync_ok() || !checkpoint_save(c, ss, g)) return false;
                 for (auto& st : stages) {   // a layer split's later stages: their sessions' part
                     const strata::core::OnDevice on(st->dev);
                     ConvCheckpoint part;
                     part.ids = c.ids;
-                    if (DPCT_CHECK_ERROR(dpct::get_current_device()
-                                             .queues_wait_and_throw()) != 0 ||
-                        !checkpoint_save(part, st->ss, g)) return false;
+                    if (!gpu_sync_ok() || !checkpoint_save(part, st->ss, g)) return false;
                     c.stage_parts.push_back(std::move(part));
                 }
             }
@@ -5318,12 +5670,6 @@ int main(int argc, char **argv) try {
                 checks.erase(checks.begin() + (std::ptrdiff_t) victim);
             }
             return true;
-        }
-        catch (sycl::exception const &exc) {
-          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
-                    << ", line:" << __LINE__ << std::endl;
-          std::exit(1);
-        }
         };
         sp.on_chunk = [&](const float* R_rows, int64_t T, int64_t p0, std::string& e) -> bool {
             std::vector<int32_t> nxt((size_t) T);
@@ -5359,7 +5705,7 @@ int main(int argc, char **argv) try {
                 } else {
                     saved = checkpoint_at(done);
                 }
-                if (!saved) { e = "saving a conversation checkpoint failed"; return false; }
+                if (!saved) { e = "saving a conversation checkpoint failed" + ckpt_why; return false; }
                 pp_next_check = done + o.prompt_cache_every;
             }
             return true;
@@ -5411,6 +5757,7 @@ int main(int argc, char **argv) try {
         }
         // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
         std::vector<std::pair<int32_t, int32_t>> pending;
+        std::vector<void*> pin_live;   // the swaps' locked arena pages (pin_blob), unlocked once they have landed
         dpct::event_ptr adapt_ev = nullptr;
         adapt_ev = new sycl::event();
         // a layer split's later stages keep a copy of the residency table on their devices, and swap on their own
@@ -5456,8 +5803,12 @@ int main(int argc, char **argv) try {
                              sycl::info::event_command_status::complete) return;
                 }
             for (auto& st : stages) st->adapt_live = false;
+            unpin_blobs(pin_live);
             src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
-            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            for (const auto& [i, slot] : pending) {
+                host_res[(size_t) i] = slot;
+                srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);   // in VRAM now: RAM not needed
+            }
             pending.clear();
             res_upload();
         }
@@ -5495,6 +5846,14 @@ int main(int argc, char **argv) try {
             std::sort(swaps.begin(), swaps.end(), [](const Swap& a, const Swap& b) { return a.gain > b.gain; });
             if ((int) swaps.size() > o.adapt_swaps) swaps.resize((size_t) o.adapt_swaps);
             if (!resident_stage_swaps(src, xcache, host_res, g.n_expert, swaps, adapt_stream)) return false;
+            if (pin_blobs_on()) {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+                std::vector<std::pair<uintptr_t, uintptr_t>> spans;
+                for (const Swap& s : swaps)
+                    if (const uint8_t* b = srcp->blob(s.layer, s.in))
+                        spans.emplace_back((uintptr_t) b,
+                                           (uintptr_t) b + strata::kernels::cpu::expert_layout().blob_bytes(s.layer));
+                pin_blobs(std::move(spans), pin_live);
+            }
             bool main_live = false;
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
@@ -5517,11 +5876,31 @@ int main(int argc, char **argv) try {
                                     : xcache.device_slot(slot),
                                  b,
                                  (size_t)strata::kernels::cpu::expert_layout()
-                                     .blob_bytes(s.layer))) != 0)
+                                     .blob_bytes(s.layer))) != 0) {
+                    std::fprintf(stderr,
+                                 "strata serve: adaptive swap copy failed "
+                                 "(layer %d, slot %d, pinned %d): %s\n",
+                                 /*
+                                 DPCT1009: SYCL reports errors using
+                                 exceptions and does not use error codes. Please
+                                 replace the "get_error_string_dummy(...)" with
+                                 a real error-handling function.
+                                 */
+                                 /*
+                                 DPCT1010: SYCL uses exceptions to report
+                                 errors and does not use the error codes. The
+                                 cudaGetLastError function call was replaced
+                                 with 0. You need to rewrite this code.
+                                 */
+                                 (int)s.layer, (int)slot,
+                                 pin_live.empty() ? 0 : 1,
+                                 dpct::get_error_string_dummy(0));
                     return false;
+                }
                 if (gs) gs->adapt_live = true;
                 else main_live = true;
                 host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                srcp->prefetch(s.layer, s.out);   // a file-backed arena released its pages: read them back ahead
                 pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
             }
             if (!swaps.empty()) dpct::sync_barrier(adapt_ev, adapt_stream);
@@ -5643,6 +6022,7 @@ int main(int argc, char **argv) try {
             const int64_t free_mib = (int64_t) (free_b >> 20);
             if (free_mib >= 256) {
                 std::fprintf(stderr, "strata serve: %lld MiB of VRAM free with everything loaded\n", (long long) free_mib);
+                rss_probe("serving");
             } else if (reserve_adapted) {
                 // #496: the reserve was already lowered to make the cache fit - a bigger one would leave it no room
                 std::fprintf(stderr, "strata serve: WARNING: %lld MiB of VRAM free with everything loaded - this card "
@@ -5684,7 +6064,7 @@ int main(int argc, char **argv) try {
                         "expert_slots_primary=%lld expert_cache_primary_mib=%lld spec=%d "
                         "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
                         "spec_min_p=%.2f conversation_cache_mib=%lld conversation_cache_slots=%d "
-                        "conversation_cache_min_free_mib=%lld engine=" STRATA_VERSION "\n",
+                        "conversation_cache_min_free_mib=%lld tail_role_token=%lld vram_elastic=%d engine=" STRATA_VERSION "\n",
                         (long long) o.max_context, o.kv.c_str(),
                         (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1
                                          ? ss.qsa_states[ss.qsa_primary()].n_slots * 4 : 0),
@@ -5695,7 +6075,7 @@ int main(int argc, char **argv) try {
                         (long long) ((o.mmap_experts ? src.resident_bytes() : strata::kernels::cpu::expert_layout().total) >> 20),
                         pool.workers(), o.pcie_frac,
                         o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
-                        (long long) o.conversation_cache_min_free_mib);
+                        (long long) o.conversation_cache_min_free_mib, (long long) o.tail_role_token, xcache.segmented() ? 1 : 0);
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
@@ -5742,7 +6122,162 @@ int main(int argc, char **argv) try {
         bool mrope_identity = true;
         std::vector<float> img_rows;
         std::vector<const float*> row_ptr;
+        // ---- #533: VRAM <reserve_mib>, between requests, only with --vram-elastic.  It shrinks the expert cache
+        // until that much VRAM is free for other programs (a game, a CAD session), or grows it back towards its full
+        // size when more than that is free.  Never on its own: only this command (the server's POST /v1/vram) moves
+        // it.  A shrink gives back the cache's LAST segments: the experts in their slots become CPU misses, as any
+        // expert outside the cache is (no output changes beyond what a smaller cache decodes), the prompt path's
+        // loan moves down to the end of what is left (a smaller chunk when it no longer fits).  A grow maps them
+        // again and puts each slot's expert back (or, when the adaptive tier already brought that one back, the
+        // most-routed missing expert of the same layer); the adaptive tier carries on from there.
+        std::vector<std::pair<int32_t, int32_t>> vram_evicted;   // (residency index, slot) the shrinks took
+        const int64_t chunk_full = o.prefill_chunk;              // the loan's chunk with the whole cache
+        auto relend = [&]() {   // the prompt path's loan: the end of the slots left, its chunk as large as fits
+            if (pf_parts.empty() || pf_parts[0].first < 0) return;
+            PfPart& p = pf_parts[0];
+            const int64_t live = xcache.slots();
+            auto fits = [&](int64_t c) {
+                const int64_t k = part_slots(p, c);
+                return k > 0 && k + 128 <= live && !(o.prefill_auto && k * 100 > kAutoLendPct * live);
+            };
+            int64_t c = chunk_full;
+            while (c > 256 && !fits(c)) c = std::max<int64_t>(256, c / 2 / 256 * 256);
+            o.prefill_chunk = c;
+            p.first = (int32_t) std::max<int64_t>(0, live - part_slots(p, c));
+            p.first_now = -1;   // laid out again at the next loan
+        };
+        auto vram_command = [&](const std::string &cmd,
+                                std::string &e) -> bool {
+            // `VRAM` alone: the reserve the engine started with (--vram-reserve-mib)
+            try {
+        char *end = nullptr;
+            const bool bare = cmd.find_first_not_of(' ', 4) == std::string::npos;
+            const long long reserve = bare ? (long long) o.vram_reserve_mib : std::strtoll(cmd.c_str() + 4, &end, 10);
+            if (!bare && (end == cmd.c_str() + 4 || reserve < 0)) { e = "expected: VRAM [reserve_mib]"; return false; }
+            if (!xcache.segmented()) {
+                e = "VRAM needs an engine started with --vram-elastic (one NVIDIA GPU, --serve)";
+                return false;
+            }
+            if (src.complement_ready()) {
+                e = "VRAM: not with the resident low-RAM mode (the cache holds experts RAM does not)";
+                return false;
+            }
+            if (peer.valid()) { e = "VRAM: not with --peer-device"; return false; }
+            for (const PfPart& p : pf_parts)
+                if (!p.lent.empty()) { e = "VRAM: a prompt's loan is still out"; return false; }
+            if (!ver.wait_commit(e)) return false;
+            apply_pending(true);                     // the adaptive tier's swaps in flight land first
+            if (DPCT_CHECK_ERROR(
+                    dpct::get_current_device().queues_wait_and_throw()) != 0) {
+                /*
+                DPCT1009: SYCL reports errors using exceptions and does not
+                use error codes. Please replace the
+                "get_error_string_dummy(...)" with a real error-handling
+                function.
+                */
+                /*
+                DPCT1010: SYCL uses exceptions to report errors and does
+                not use the error codes. The cudaGetLastError function call was
+                replaced with 0. You need to rewrite this code.
+                */
+                e = std::string("VRAM: ") + dpct::get_error_string_dummy(0);
+                return false;
+            }
+            const auto t0 = Clock::now();
+            size_t free_b = 0, total_b = 0;
+            /*
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            const int64_t want_free = (int64_t) reserve << 20, mapped = xcache.mapped_bytes();
+            const int64_t before = xcache.slots();
+            // what stays at least: the prompt path's smallest loan (256 tokens) and the 128 slots it must leave
+            const int64_t floor_slots = std::min<int64_t>(xcache.full_slots(),
+                128 + (pf_parts.empty() || pf_parts[0].first < 0 ? 0 : part_slots(pf_parts[0], 256)));
+            std::string note;
+            if ((int64_t) free_b < want_free) {
+                const int64_t floor_b = xcache.bytes_of(floor_slots);
+                int64_t keep = mapped - (want_free - (int64_t) free_b);
+                if (keep < floor_b) {
+                    keep = floor_b;
+                    note = " (the cache keeps its smallest size: the prompt path's buffers)";
+                }
+                if (!xcache.shrink(keep, e)) return false;
+                const int64_t live = xcache.slots();
+                for (size_t i = 0; i < host_res.size(); ++i)
+                    if (host_res[i] >= live) {
+                        vram_evicted.emplace_back((int32_t) i, host_res[i]);
+                        host_res[i] = strata::core::kNotResident;
+                    }
+                res_upload();
+            } else if (mapped < xcache.full_bytes()) {
+                std::string gerr;
+                if (!xcache.grow(mapped + ((int64_t) free_b - want_free), gerr)) note = " (" + gerr + ")";
+                const int64_t live = xcache.slots();
+                std::string ferr;
+                std::vector<std::pair<int32_t, int32_t>> keep_out;
+                for (const auto& [i, slot] : vram_evicted) {
+                    if (slot >= live) { keep_out.emplace_back(i, slot); continue; }
+                    const int64_t layer = i / g.n_expert;
+                    int64_t pick = i;
+                    if (host_res[(size_t) i] >= 0) {   // back already (the adaptive tier): the layer's most-routed miss
+                        pick = -1;
+                        float best = -1.0f;
+                        for (int64_t ex = 0; ex < g.n_expert; ++ex) {
+                            const size_t j = (size_t) (layer * g.n_expert + ex);
+                            if (host_res[j] >= 0) continue;
+                            const float u = drive.d.usage.empty() ? 0.0f : drive.d.usage[j];
+                            if (u > best) { best = u; pick = (int64_t) j; }
+                        }
+                    }
+                    if (pick < 0) continue;
+                    const uint8_t* b = srcp->blob(layer, pick % g.n_expert);
+                    if (b == nullptr || !xcache.fill_slot_queued(slot, b, ferr,
+                            (int64_t) strata::kernels::cpu::expert_layout().blob_bytes(layer))) {
+                        e = "VRAM: refilling the cache failed: " + ferr;
+                        return false;
+                    }
+                    host_res[(size_t) pick] = slot;
+                }
+                vram_evicted.swap(keep_out);
+                if (!xcache.sync_queued(ferr)) { e = "VRAM: " + ferr; return false; }
+                res_upload();
+            }
+            relend();
+            /*
+            DPCT1106: 'cudaMemGetInfo' was migrated with the Intel
+            extensions for device information which may not be supported by all
+            compilers or runtimes. You may need to adjust the code.
+            */
+            dpct::get_current_device().get_memory_info(free_b, total_b);
+            std::fprintf(stderr, "strata serve: VRAM %lld MiB kept free: the expert cache %lld -> %lld of %lld slots "
+                                 "(%.2f of %.2f GiB), %lld MiB free now, prompt chunk %lld, in %.0f ms%s\n",
+                         reserve, (long long) before, (long long) xcache.slots(), (long long) xcache.full_slots(),
+                         (double) xcache.mapped_bytes() / 1073741824.0, (double) xcache.full_bytes() / 1073741824.0,
+                         (long long) (free_b >> 20), (long long) o.prefill_chunk,
+                         std::chrono::duration<double, std::milli>(Clock::now() - t0).count(), note.c_str());
+            std::printf("VRAM reserve_mib=%lld expert_slots=%lld expert_slots_full=%lld expert_cache_mib=%lld "
+                        "expert_cache_full_mib=%lld vram_free_mib=%lld prompt_chunk=%lld\n", reserve,
+                        (long long) xcache.slots(), (long long) xcache.full_slots(),
+                        (long long) (xcache.mapped_bytes() >> 20), (long long) (xcache.full_bytes() >> 20),
+                        (long long) (free_b >> 20), (long long) o.prefill_chunk);
+            return true;
+        }
+        catch (sycl::exception const &exc) {
+          std::cerr << exc.what() << "Exception caught at file:" << __FILE__
+                    << ", line:" << __LINE__ << std::endl;
+          std::exit(1);
+        }
+        };
         while (next_line(line)) {
+            if (line.rfind("VRAM", 0) == 0) {   // #533 (above): between requests, not a request
+                std::string verr;
+                if (!vram_command(line, verr)) std::printf("ERR %s\n", verr.c_str());
+                std::fflush(stdout);
+                continue;
+            }
             // #477: every --expert-profile-save-every minutes, before the next request (at QUIT: after the loop)
             if (!heat.empty() && line != "QUIT" && o.expert_profile_save_min > 0 &&
                 Clock::now() - profile_saved_at >= std::chrono::duration<double>(o.expert_profile_save_min * 60.0))
@@ -6319,6 +6854,15 @@ int main(int argc, char **argv) try {
             if (o.prompt_cache > 0 && o.turn_token >= 0)
                 for (int64_t i = n - 1; i > resume; --i)
                     if (ids[(size_t) i] == o.turn_token) { turn_at = i; break; }
+            // #458 (opt-in): a short turn of --tail-role-token's role right before the new assistant turn (the
+            // server's trailing reasoning-effort turn) stays out of the checkpoint, so the next request - another
+            // effort, or the next turn of the chat - finds the conversation without it
+            if (turn_at > 0 && o.tail_role_token >= 0)
+                for (int64_t i = turn_at - 1; i > resume; --i)
+                    if (ids[(size_t) i] == o.turn_token) {
+                        if (ids[(size_t) i + 1] == o.tail_role_token) turn_at = i;
+                        break;
+                    }
             // A prompt read from token 0 also stops at its FIRST turn boundary: the end of the system prompt (with
             // the tools), which every new chat of the same client shares.  That checkpoint becomes the chain's root,
             // which the retention policy pins (conv_cache.hpp), so the next new chat reads only what comes after it.
@@ -6376,7 +6920,7 @@ int main(int argc, char **argv) try {
                 }
                 at = to;
                 if ((to == turn_at || to == root_at) && !checkpoint_at(to)) {
-                    std::printf("ERR saving a conversation checkpoint failed\n");
+                    std::printf("ERR saving a conversation checkpoint failed%s\n", ckpt_why.c_str());
                     return 1;
                 }
             }
@@ -6426,6 +6970,7 @@ int main(int argc, char **argv) try {
             const int64_t ram0 = src.ram_reads(), files0 = src.file_reads();
             const uint64_t file_bytes0 = src.file_read_bytes();
             const int64_t decode_look0 = drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused;
+            const int64_t offload0 = drive.d.offload_entries;   // #588
             if (cancelled) finish = "cancel";
             while (!cancelled && produced_n < max_new) {
                 int T = S_mtp;
@@ -6715,6 +7260,7 @@ int main(int argc, char **argv) try {
             }
             const int64_t req_hits = drive.d.cache_hits - decode_hits0;
             const int64_t req_look = (drive.d.cache_hits + drive.d.cache_admitted + drive.d.cache_refused) - decode_look0;
+            const int64_t req_offload = drive.d.offload_entries - offload0;
             // #471: the prompt tokens this request read - all the fresh ones, or as far as the prompt pass got when a
             // cancel stopped it part-way (a cancelled request used to be logged and counted as having read them all)
             const int64_t fresh = n - resume;
@@ -6722,11 +7268,15 @@ int main(int argc, char **argv) try {
             // DONE <generated> <prompt> <prompt ms> <decode ms> <finish> <drafts accepted> <drafts offered> <reused> [hits] [lookups]
             //      [RAM blobs] [file blobs] [file MB]   (CS-T tiers; appended, so an older server reads the rest)
             //      [prompt tokens read]   (#471: fewer than <prompt> - <reused> when a cancel stopped the read)
-            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld\n", (long long) produced_n,
+            //      [offloaded]   (#588: the decode's routed experts the GPU read over PCIe or another GPU computed;
+            //                    not in [lookups])
+            std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld %lld\n",
+                        (long long) produced_n,
                         (long long) n, prompt_ms, decode_ms, finish, (long long) draft_accepted, (long long) draft_offered,
                         (long long) resume, (long long) req_hits, (long long) req_look,
                         (long long) (src.ram_reads() - ram0), (long long) (src.file_reads() - files0),
-                        (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n);
+                        (double) (src.file_read_bytes() - file_bytes0) / 1e6, (long long) read_n,
+                        (long long) req_offload);
             std::fflush(stdout);
             if (drive.routing != nullptr) std::fflush(drive.routing);   // the routing trace survives a crash and is watchable mid-session
             // "12288 of 98179" when cancelled mid-read (#471), the rate from what was read
@@ -6742,11 +7292,18 @@ int main(int argc, char **argv) try {
                          decode_ms > 0 ? 1000.0 * produced_n / decode_ms : 0.0, (long long) draft_accepted,
                          (long long) draft_offered, checks.size(), cancelled ? " (cancelled)" : "");
             // the VRAM share of the experts the pool looked up while decoding; experts it sent over PCIe for the GPU
-            // to read (--pcie-frac) are in neither count
+            // to read (--pcie-frac) are in neither count - #588: so that share is said beside it (raising --pcie-frac
+            // raises the hit rate while the PCIe reads may make the decode slower)
             if (req_look > 0) {
-                std::fprintf(stderr, "strata serve: decode expert cache hit rate: %.1f%% (%lld hits / %lld lookups)\n",
+                char off[160] = "";
+                if (req_offload > 0)
+                    std::snprintf(off, sizeof off, "; %lld more read by the GPU over PCIe or from another GPU (%.1f%% of "
+                                  "all %lld routed)", (long long) req_offload,
+                                  100.0 * (double) req_offload / (double) (req_look + req_offload),
+                                  (long long) (req_look + req_offload));
+                std::fprintf(stderr, "strata serve: decode expert cache hit rate: %.1f%% (%lld hits / %lld lookups)%s\n",
                              100.0 * (double) req_hits / (double) req_look,
-                             (long long) req_hits, (long long) req_look);
+                             (long long) req_hits, (long long) req_look, off);
             }
             // the resident RAM mode, cumulative: experts read from experts.bin since the copy was made (what the plain
             // mmap mode reads through the OS file cache, from the SSD when the RAM could not keep it)
@@ -7273,6 +7830,7 @@ int main(int argc, char **argv) try {
         }
         // plan v0.3 P6: swaps in flight - (residency index, slot) admitted when adapt_ev has completed
         std::vector<std::pair<int32_t, int32_t>> pending;
+        std::vector<void*> pin_live;   // the swaps' locked arena pages (pin_blob), unlocked once they have landed
         dpct::event_ptr adapt_ev = nullptr;
         adapt_ev = new sycl::event();
         int64_t adapt_rounds = 0;   // counted here: `rounds` is declared below the adapt lambda
@@ -7292,8 +7850,12 @@ int main(int argc, char **argv) try {
             }
             if (trace_pending)
                 std::fprintf(stderr, "strata: PENDING landed, %zu experts become resident\n", pending.size());
+            unpin_blobs(pin_live);
             src.commit_exchanges();   // the resident RAM mode: the evicted experts take their places in RAM
-            for (const auto& [i, slot] : pending) host_res[(size_t) i] = slot;
+            for (const auto& [i, slot] : pending) {
+                host_res[(size_t) i] = slot;
+                srcp->release((int64_t) i / g.n_expert, (int64_t) i % g.n_expert);   // in VRAM now: RAM not needed
+            }
             pending.clear();
             if (d_res != nullptr)
                 /*
@@ -7356,6 +7918,14 @@ int main(int argc, char **argv) try {
                 std::fprintf(stderr, "strata generate: an adaptive refill failed (copying evicted experts back)\n");
                 return false;
             }
+            if (pin_blobs_on()) {   // lock the batch's source pages (a file-backed arena on AMD; see pin_blobs)
+                std::vector<std::pair<uintptr_t, uintptr_t>> spans;
+                for (const Swap& s : swaps)
+                    if (const uint8_t* b = srcp->blob(s.layer, s.in))
+                        spans.emplace_back((uintptr_t) b,
+                                           (uintptr_t) b + strata::kernels::cpu::expert_layout().blob_bytes(s.layer));
+                pin_blobs(std::move(spans), pin_live);
+            }
             for (const Swap& s : swaps) {
                 const size_t in = (size_t) s.layer * g.n_expert + s.in, out = (size_t) s.layer * g.n_expert + s.out;
                 const int32_t slot = host_res[out];
@@ -7377,6 +7947,7 @@ int main(int argc, char **argv) try {
                     return false;
                 }
                 host_res[out] = strata::core::kNotResident;   // evicted now: the CPU computes it meanwhile
+                srcp->prefetch(s.layer, s.out);   // a file-backed arena released its pages: read them back ahead
                 pending.emplace_back((int32_t) in, slot);      // resident once the copy has landed
             }
             if (!swaps.empty()) dpct::sync_barrier(adapt_ev, adapt_stream);

From 84876f71adbe60a90ab83e8c3fa9e6146691af2c Mon Sep 17 00:00:00 2001
From: tmking01 <tmking01@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:08:16 +0200
Subject: [PATCH 168/201] sycl: stage_room reads the free VRAM (a layer split's
 later GPUs had none)

dpct left the DPCT1106 note but dropped cudaMemGetInfo in generate.cpp's
stage_room, so every later stage of --layer-split sized its expert cache from
0 bytes free and the second card crashed with 'expert cache: no room'.
Reported with the fix by tmking01 in #423 (2x Arc Pro B70); also a fixups.py
entry so a re-migration keeps it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 sycl/src/program/generate.cpp | 1 +
 sycl/tools/fixups.py          | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/sycl/src/program/generate.cpp b/sycl/src/program/generate.cpp
index 26f3852da53..1b050707ce6 100644
--- a/sycl/src/program/generate.cpp
+++ b/sycl/src/program/generate.cpp
@@ -2921,6 +2921,7 @@ int main(int argc, char **argv) try {
         try {
     const strata::core::OnDevice on(dev);
         size_t fb = 0, tb = 0;
+        dpct::get_current_device().get_memory_info(fb, tb);   // #423 (tmking01): dpct dropped cudaMemGetInfo here
         /*
         DPCT1106: 'cudaMemGetInfo' was migrated with the Intel extensions
         for device information which may not be supported by all compilers or
diff --git a/sycl/tools/fixups.py b/sycl/tools/fixups.py
index aa5ac8e54ab..b07d6a0e86a 100644
--- a/sycl/tools/fixups.py
+++ b/sycl/tools/fixups.py
@@ -297,3 +297,9 @@ def verify(s):
 for p in sorted((root / "src" / "kernels").glob("*_parity.cpp")):
     edit(str(p.relative_to(root)), sub(r"(?<!queues_wait_and_throw\(\), )dpct::get_in_order_queue\(\)(\s*)\.(memcpy|memset)\(",
                                        r"(dpct::get_current_device().queues_wait_and_throw(), dpct::get_in_order_queue())\1.\2("))
+
+# 0.1.39 (#423, tmking01): generate.cpp's stage_room (the expert cache of every later stage of a layer split) lost its
+# cudaMemGetInfo in the migration - the DPCT1106 note stayed, the call did not - so every later GPU read 0 bytes free.
+edit("src/program/generate.cpp", sub(
+    r"(    const strata::core::OnDevice on\(dev\);\n        size_t fb = 0, tb = 0;\n)(?!        dpct::get_current_device)",
+    r"\1        dpct::get_current_device().get_memory_info(fb, tb);   // #423 (tmking01): dpct dropped cudaMemGetInfo here\n"))

From 7ba023e264dc1354309583cc194d19b6c398d1eb Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:08:16 +0200
Subject: [PATCH 169/201] sycl: strata-sycl.sh passes ONEAPI_DEVICE_SELECTOR
 into the container

The image pins level_zero:0, so a two-card layer split could not see the second
Arc (#423, tmking01). Set ONEAPI_DEVICE_SELECTOR=level_zero:* for it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 sycl/serve/strata-sycl.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sycl/serve/strata-sycl.sh b/sycl/serve/strata-sycl.sh
index b64eb21f8a7..6299a597a04 100755
--- a/sycl/serve/strata-sycl.sh
+++ b/sycl/serve/strata-sycl.sh
@@ -7,6 +7,7 @@
 #   STRATA_SYCL_IMAGE  the runtime image                      (default: strata-sycl-dev)
 #   STRATA_SYCL_BIN    the engine binary, relative to the repo (default: build-sycl-aot/strata)
 #   STRATA_SYCL_NAME   the container's name                   (default: strata-sycl-serve)
+#   ONEAPI_DEVICE_SELECTOR  passed in when set (the image pins level_zero:0; level_zero:* for a two-card split, #423)
 set -euo pipefail
 here=$(cd "$(dirname "$0")/../.." && pwd)                 # the repo
 root=${STRATA_SYCL_ROOT:-$(dirname "$here")}
@@ -15,9 +16,12 @@ name=${STRATA_SYCL_NAME:-strata-sycl-serve}
 docker rm -f "$name" >/dev/null 2>&1 || true              # a container left behind by a killed server
 args=""
 for a in "$@"; do args+=" $(printf '%q' "$a")"; done
+sel=()
+[ -n "${ONEAPI_DEVICE_SELECTOR:-}" ] && sel=(-e "ONEAPI_DEVICE_SELECTOR=$ONEAPI_DEVICE_SELECTOR")
 # the port's run-time switches: the device-built verify plan without host handshakes (docs/INTEL.md)
 exec docker run --rm -i --name "$name" --device /dev/dri --oom-score-adj 1000 --stop-timeout 30 --no-healthcheck \
     -v "$root:/work" \
     -e STRATA_VERIFY_DEVICE_PLAN=1 -e STRATA_VERIFY_NO_HOST=1 -e STRATA_STAGER_THREADS=12 \
+    "${sel[@]}" \
     "${STRATA_SYCL_IMAGE:-strata-sycl-dev}" \
     "cd $repo_in && exec ${STRATA_SYCL_BIN:-build-sycl-aot/strata}$args"

From deee4473e8785d0101720a26416b423847adb1ff Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:22:59 +0200
Subject: [PATCH 170/201] #646 on 0.1.39b: the layer split and the CPU path as
 before, the resident plan for 8-token windows

- layer split: commit stays synchronous on a split (set_commit_async(!multi_gpu), the `|| next_ != nullptr`),
  no pre-staging of the next stage's inputs, kDrafterMib 1000 - the split's sizing and order as in 0.1.39
  (untested here: one GPU);
- the CPU expert kernels keep cpu_avx512_ok() (F/BW/VL/VNNI/VBMI): #646's AVX-512BW-only check would send a
  CPU without VNNI/VBMI to kernels that use them;
- resident_plan_kernel: one thread per window entry up to 128 (64 lost a 7- or 8-token window's last entries
  on the all-resident path);
- the host keeps zeroing the GPU's rows under STRATA_VERIFY_DEVICE_PLAN=1 (copy_or_zero_from_mapped copies
  every row there).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/core/expert_source.cpp         |  5 ++++-
 src/core/verify.cpp                |  4 ++--
 src/kernels/cpu/native_expert.cpp  |  4 ++--
 src/kernels/cuda/verify_kernels.cu | 18 +++++++++++-------
 src/program/generate.cpp           |  4 ++--
 5 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/src/core/expert_source.cpp b/src/core/expert_source.cpp
index 0f18cdc06a6..0ac6e39122a 100644
--- a/src/core/expert_source.cpp
+++ b/src/core/expert_source.cpp
@@ -2100,7 +2100,10 @@ void expert_pool_dispatch_multi(ExpertDispatch& d, const float* x_f, const int32
         }
     }
     static const bool dec_batch = [] { const char* v = std::getenv("STRATA_DEC_BATCH"); return v == nullptr || std::atoi(v) != 0; }();
-    const bool gpu_zeroes_hits = (d.plan != nullptr && n <= kMaxWindowEntries && n <= d.plan->cap && dec_batch);
+    // the GPU's copy_rows_from_mapped zeroes the rows it computed itself (dec_batch); STRATA_VERIFY_DEVICE_PLAN's
+    // copy_or_zero_from_mapped copies every row, so there the host still zeroes them
+    static const bool device_plan = [] { const char* v = std::getenv("STRATA_VERIFY_DEVICE_PLAN"); return v != nullptr && std::atoi(v) != 0; }();
+    const bool gpu_zeroes_hits = (d.plan != nullptr && n <= kMaxWindowEntries && n <= d.plan->cap && dec_batch && !device_plan);
     bool any_cpu = false;
     for (int64_t i = 0; i < n; ++i)
         if (kind[i] < 0) { any_cpu = true; break; }
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 84a56cb0451..ccfcbacbb1a 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -1423,7 +1423,7 @@ bool Verifier::run(int T, const int32_t* tokens, int64_t pos0, PoolMultiFn pool,
         ms_wait += std::chrono::duration<double, std::milli>(b - a).count();
         ms_pool += ms_since(b);
     }
-    if (next_ != nullptr) next_->stage_inputs(T, tokens, pos0);
+    // (#646 staged the next stage's inputs here; 0.1.39b keeps the layer split's order: each stage stages its own)
     progress_at("verify window: waiting for the GPU to finish the window (flags A/B/M raised)", (int64_t) T);
     // #267: a window the GPU never finishes (a spin kernel that never sees its flag) holds the host here; the stall
     // watchdog then releases every verifier's GPU waits (release_live_verifiers) before it ends the engine, so no
@@ -1642,7 +1642,7 @@ bool Verifier::commit(int n_keep, std::string& err) {
     // set_commit_async: no wait here - the next window runs on the same stream after it, and the drafter (its own
     // stream) reads only this window's final rows and its own K/V. h_commit_ is next written after the next window's
     // results are read, i.e. after this graph has run.  Everything else waits on commit_done_ (wait_commit).
-    if (!g_commit_async) {
+    if (!g_commit_async || next_ != nullptr) {
         const cudaError_t se = cudaStreamSynchronize(cs_);
         if (se != cudaSuccess) { err = std::string("verify: commit: ") + cudaGetErrorString(se); return false; }
     } else {
diff --git a/src/kernels/cpu/native_expert.cpp b/src/kernels/cpu/native_expert.cpp
index b274dc65921..0903761e619 100644
--- a/src/kernels/cpu/native_expert.cpp
+++ b/src/kernels/cpu/native_expert.cpp
@@ -83,7 +83,7 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // first, then the AVX-2 one (Zen 2/3, Intel 12th-14th gen).  STRATA_NO_IQ512 drops an AVX-512 CPU to the
     // AVX-2 kernel, STRATA_NO_IQ256 drops the AVX-2 kernel; ggml-cpu's single-token vec_dot is reached only with
     // both set (and on a CPU without AVX-512, STRATA_NO_IQ512 changes nothing).
-    static const bool avx512 = cpu_avx512bw_ok() && std::getenv("STRATA_NO_IQ512") == nullptr;
+    static const bool avx512 = cpu_avx512_ok() && std::getenv("STRATA_NO_IQ512") == nullptr;
     static const bool avx2 = std::getenv("STRATA_NO_IQ256") == nullptr;
     // #152: from how many tokens the multi-token kernels run (ggml's vec_dot below that).  The default 2 is the
     // measured-fastest rule, but a token's expert rows then round differently alone than in a group, so greedy output
@@ -101,7 +101,7 @@ void native_gu_rows(const NativeFmt& f, const uint8_t* blob, const void* const*
     // A format with only an AVX-2 kernel (IQ4_XS, #415) takes it on AVX-2 CPUs only: an AVX-512 CPU keeps ggml-cpu for
     // it, as before (its rows would round differently).  Each kernel only for the formats it implements: falling
     // through an empty switch would leave ff unwritten instead of falling back to ggml-cpu.
-    static const bool cpu512 = cpu_avx512bw_ok();
+    static const bool cpu512 = cpu_avx512_ok();
     if (nt >= mt_min && (iq512_supported(f.gu_type) || (!cpu512 && iq256_supported(f.gu_type)))) {
         if (avx512 && iq512_supported(f.gu_type)) {
             iq512_gu_rows(f.gu_type, blob, f.gu_row, f.up_off, (int) f.n_embd, act, nt, ff, r0, r1);
diff --git a/src/kernels/cuda/verify_kernels.cu b/src/kernels/cuda/verify_kernels.cu
index c26a8134079..9cbc6552e41 100644
--- a/src/kernels/cuda/verify_kernels.cu
+++ b/src/kernels/cuda/verify_kernels.cu
@@ -500,15 +500,19 @@ __global__ void wait_flag_ge_kernel(const volatile uint32_t* flag, uint32_t valu
 }  // namespace
 
 namespace {
-__global__ void resident_plan_kernel(const int32_t* __restrict__ ids, int n, int k, const int32_t* __restrict__ res,
+// one thread per window entry: up to kVerifyMaxT tokens x 10 routed experts (80), so 128 (#646 had 64: a window of
+// 7+ tokens lost its last entries)
+constexpr int kResidentPlanMax = 128;
+static_assert(kVerifyMaxT * 10 <= kResidentPlanMax, "resident_plan: one thread per entry");
+__global__ void __launch_bounds__(kResidentPlanMax) resident_plan_kernel(const int32_t* __restrict__ ids, int n, int k, const int32_t* __restrict__ res,
                                      int n_expert, const uint8_t* cache_base, const unsigned long long* slot_off,
                                      long long blob, int32_t* __restrict__ pl, long long capx, uint32_t* skip,
                                      uint32_t ring) {
-    __shared__ int32_t s_ids[64];
-    __shared__ unsigned long long s_ptr[64];
-    __shared__ int32_t s_first[64];
-    __shared__ int32_t s_cnt[64];
-    __shared__ int32_t s_gstart[64];
+    __shared__ int32_t s_ids[kResidentPlanMax];
+    __shared__ unsigned long long s_ptr[kResidentPlanMax];
+    __shared__ int32_t s_first[kResidentPlanMax];
+    __shared__ int32_t s_cnt[kResidentPlanMax];
+    __shared__ int32_t s_gstart[kResidentPlanMax];
     __shared__ int s_bad;
     const int tid = threadIdx.x;
     if (tid == 0) s_bad = 0;
@@ -609,7 +613,7 @@ __global__ void copy_or_zero_kernel(float4* __restrict__ dst, const volatile flo
 void resident_plan(const int32_t* ids, int n_entries, int k, const int32_t* res_layer, int n_expert,
                    const uint8_t* cache_base, const unsigned long long* slot_off, long long blob, int32_t* plan,
                    long long capx, uint32_t* skip, uint32_t ring, void* stream) {
-    resident_plan_kernel<<<1, 64, 0, (cudaStream_t) stream>>>(ids, n_entries, k, res_layer, n_expert, cache_base, slot_off,
+    resident_plan_kernel<<<1, kResidentPlanMax, 0, (cudaStream_t) stream>>>(ids, n_entries, k, res_layer, n_expert, cache_base, slot_off,
                                                               blob, plan, capx, skip, ring);
     check("resident_plan");
 }
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 1815b68e503..4b5780a19c7 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -2505,7 +2505,7 @@ int main(int argc, char** argv) {
             }
         }
     }
-    strata::core::Verifier::set_commit_async(!split_same);   // see Verifier::set_commit_async
+    strata::core::Verifier::set_commit_async(!multi_gpu);   // see Verifier::set_commit_async
     // ---- layer split across GPUs: each later stage's own copy of the dense weights, its session and (the last) the
     // head, made on its device before the host arena is mapped (as the drafter below, for the same WDDM reason)
     std::vector<std::unique_ptr<GpuStage>> stages;
@@ -2680,7 +2680,7 @@ int main(int argc, char** argv) {
     // those allocations are already made before a stage's cache is sized, so what has to be held back here is
     // the windows and - only on the stage that carries them - the drafter and the head.
     const int64_t kWindowMib = 96;       // the verify windows; 75 MiB measured, rounded up
-    const int64_t kDrafterMib = 1320;    // the MTP drafter (839 MiB) + the native Q5_K head (466 MiB), on the last stage only
+    const int64_t kDrafterMib = 1000;    // the MTP drafter (839 MiB) + the head, on the last stage only
     // #340: with the own prompt buffers chosen by the split's rule (not asked for with --no-prefill-borrow) the
     // boundary is searched as the borrowing configuration would (no reserve): the reserve then only makes the caches
     // smaller, which measured cost no decode (K=28 on 9070 XT + R9700: 58.4 tok/s own vs 58.5 borrowing), while a

From ca1a7c0c9141929b8535faab4c503a5f2efdacba Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:34:13 +0200
Subject: [PATCH 171/201] setup: --backend sycl tests; Windows points at Linux
 (setup_intel reads sysfs, which WSL has not)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                 |  2 +-
 tools/test_setup_sycl.py | 75 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 76 insertions(+), 1 deletion(-)
 create mode 100644 tools/test_setup_sycl.py

diff --git a/setup.py b/setup.py
index c61b488b268..a39f4cfd384 100644
--- a/setup.py
+++ b/setup.py
@@ -3212,7 +3212,7 @@ def sycl_setup(argv) -> int:
          "maintainers (no Intel card here). Expect rough edges; issues with your card and driver versions help.")
     if WIN:
         fail("the Intel Arc engine has no Windows setup yet (no ready-made Intel engine either)",
-             "run it on Linux, or in WSL2 Ubuntu with Intel's GPU driver: docs/INTEL_ARC.md")
+             "run it on Linux (Ubuntu 24.04 with Intel's GPU driver and oneAPI): docs/INTEL_ARC.md")
     say("  There is no ready-made Intel engine: it is built from source with Intel oneAPI (icpx + oneMKL),")
     say("  docs/INTEL_ARC.md. Setup continues with sycl/setup_intel.py.")
     rest, skip = [], False
diff --git a/tools/test_setup_sycl.py b/tools/test_setup_sycl.py
new file mode 100644
index 00000000000..2ff02b64a3a
--- /dev/null
+++ b/tools/test_setup_sycl.py
@@ -0,0 +1,75 @@
+"""Tests for setup.py --backend sycl, the experimental Intel Arc engine (sycl/, PR #423): it warns, stops with a clear
+message on Windows, and on Linux hands the run to sycl/setup_intel.py without its --backend flag. The CUDA / HIP
+paths never see it. No GPU, no network.
+
+    python -m unittest tools.test_setup_sycl
+"""
+from __future__ import annotations
+
+import contextlib
+import io
+import re
+import sys
+import unittest
+from pathlib import Path
+from unittest import mock
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+import setup  # noqa: E402
+
+
+def run(argv, win):
+    out = io.StringIO()
+    with mock.patch.object(setup, "WIN", win), mock.patch.object(setup.subprocess, "call", return_value=0) as call, \
+            contextlib.redirect_stdout(out):
+        try:
+            rc = setup.sycl_setup(argv)
+        except SystemExit as e:
+            rc = ("exit", e.code)
+    return rc, out.getvalue(), call
+
+
+class SyclBackend(unittest.TestCase):
+    def test_windows_stops_with_the_docs_pointer(self):
+        rc, out, call = run(["--backend", "sycl"], win=True)
+        self.assertEqual(rc, ("exit", 1))
+        self.assertIn("EXPERIMENTAL", out)
+        self.assertIn("docs/INTEL_ARC.md", out)
+        call.assert_not_called()
+
+    def test_linux_hands_over_to_setup_intel_without_the_backend_flag(self):
+        rc, out, call = run(["--model", "IQ2_XS", "--backend", "sycl", "--port", "8085"], win=False)
+        self.assertEqual(rc, 0)
+        self.assertIn("EXPERIMENTAL", out)
+        self.assertIn("built from source", out)
+        cmd = call.call_args[0][0]
+        self.assertTrue(cmd[1].endswith(str(Path("sycl") / "setup_intel.py")))
+        self.assertEqual(cmd[2:], ["--model", "IQ2_XS", "--port", "8085"])
+
+    def test_backend_equals_form_is_dropped_too(self):
+        _, _, call = run(["--backend=sycl", "--check"], win=False)
+        self.assertEqual(call.call_args[0][0][2:], ["--check"])
+
+    def test_the_parser_accepts_sycl(self):
+        src = (ROOT / "setup.py").read_text(encoding="utf-8")
+        self.assertRegex(src, r'"--backend", choices=\["cuda", "hip", "sycl"\]')
+
+    def test_setup_intel_finds_the_setup_functions_it_replaces(self):
+        """sycl/setup_intel.py swaps these steps; setup.py must still have them (it stops with a message otherwise)."""
+        src = (ROOT / "sycl" / "setup_intel.py").read_text(encoding="utf-8")
+        names = re.search(r'for name in \(([^)]*)\):', src).group(1)
+        for name in re.findall(r'"(\w+)"', names):
+            self.assertTrue(callable(getattr(setup, name, None)), name)
+
+
+class CMakeOption(unittest.TestCase):
+    def test_sycl_is_off_by_default_and_exclusive(self):
+        src = (ROOT / "CMakeLists.txt").read_text(encoding="utf-8-sig")
+        self.assertIn('option(STRATA_ENABLE_SYCL "EXPERIMENTAL', src)
+        self.assertRegex(src, r'option\(STRATA_ENABLE_SYCL "[^"]*" OFF\)')
+        self.assertIn("add_subdirectory(sycl)", src)
+
+
+if __name__ == "__main__":
+    unittest.main()

From f945515470924e7c9db30df27ebb122f6d701d7d Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:36:02 +0200
Subject: [PATCH 172/201] #646: the single-matrix mmvq does not stage the IQ
 grids (10-20% slower on the RTX 5070 at 3-8 columns)

The grouped expert kernels keep the staging (they gain). STRATA_IQ_STAGE_GRID_MMVQ=1 stages mmvq too; the
results are bitwise the same either way.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/kernels/cuda/iq_kernels.cu | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/kernels/cuda/iq_kernels.cu b/src/kernels/cuda/iq_kernels.cu
index 29b68788770..b8ab4a5aa75 100644
--- a/src/kernels/cuda/iq_kernels.cu
+++ b/src/kernels/cuda/iq_kernels.cu
@@ -1687,6 +1687,13 @@ bool g_stage_grid = [] {
     const char* v = std::getenv("STRATA_IQ_STAGE_GRID");
     return v == nullptr || v[0] == '\0' || v[0] != '0';
 }();
+// The single-matrix mmvq (128-thread blocks, one per 4 rows) pays the 2-8 KB staging per block: on the RTX 5070 its
+// IQ2_XS / IQ2_S / IQ1_M calls were 10-20% slower staged at 3-8 columns (iq_multi_parity --bench), while the grouped
+// expert kernels gain.  So mmvq stages only with STRATA_IQ_STAGE_GRID_MMVQ=1 (bitwise the same either way).
+bool g_stage_grid_mmvq = g_stage_grid && [] {
+    const char* v = std::getenv("STRATA_IQ_STAGE_GRID_MMVQ");
+    return v != nullptr && v[0] == '1';
+}();
 
 template<int TY>
 void launch_mmvq(const uint8_t* W, size_t rb, const block_q8_1* X, float* y, int n_in, int n_out, int ncols,
@@ -1695,7 +1702,7 @@ void launch_mmvq(const uint8_t* W, size_t rb, const block_q8_1* X, float* y, int
     if constexpr (!kSplit<TY>) mmvq_kernel<TY><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
     else if (g_old_kernels) mmvq_kernel<TY><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
     else if constexpr (kStageIqGrid<TY>) {
-        if (!g_stage_grid) {
+        if (!g_stage_grid_mmvq) {
             if (ncols <= 1) mmvq_multi_kernel<TY, 1, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
             else if (ncols == 2) mmvq_multi_kernel<TY, 2, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);
             else if (ncols <= 4) mmvq_multi_kernel<TY, 4, false><<<grid, block, 0, s>>>(W, rb, X, y, n_in, n_out, ncols);

From 031ff9411f63e0a52c93a8d76294c595594bd675 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:49:02 +0200
Subject: [PATCH 173/201] prefill gemm: STRATA_BF16_TC=2, a test mode that runs
 the FP16 path on any card (gemm_bf16_parity on sm_80+)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/prefill/gemm.cu | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/prefill/gemm.cu b/src/prefill/gemm.cu
index 445c7447e9e..a35daeb2a35 100644
--- a/src/prefill/gemm.cu
+++ b/src/prefill/gemm.cu
@@ -389,7 +389,7 @@ bool Gemm::init(void* stream, int64_t scratch_elems, std::string& err) {
 // product (STRATA_PREFILL_BF16X2's remainder, ~2^-9 of the original, deep in FP16's subnormal band) keeps cuBLAS.
 //   Default: on for compute capability 7.0 - 7.4 (Volta: only the experimental STRATA_EXPERIMENTAL_SM60 build runs
 //   there), OFF for 7.5 (RTX 20 in the ready-made engine: the sums round differently, so it is opt-in until it has
-//   been gated).  STRATA_BF16_TC=1 / =0 turns it on / off on any 7.x card.
+//   been gated).  STRATA_BF16_TC=1 / =0 turns it on / off on any 7.x card (=2, a test mode: on any card).
 // Pascal (6.x) has no tensor cores and cuBLAS has no BF16 GEMM for it (#395, measured NOT_SUPPORTED on a P40): both
 // operands are widened to fp32 by an exact shift and the product is cublasSgemm with the same fp32 accumulator.
 namespace {
@@ -437,14 +437,15 @@ int current_cc() {
 }
 // 0: cuBLAS's BF16 GEMM, 1: through FP16 (tensor cores), 2: through FP32 (Pascal)
 int bf16_path() {
-    const int cc = current_cc();
-    if (cc <= 0 || cc >= 80) return 0;
-    if (cc < 70) return 2;
     static const int forced = [] {
         const char* v = std::getenv("STRATA_BF16_TC");
-        return v != nullptr && v[0] != '\0' ? (std::atoi(v) != 0 ? 1 : 0) : -1;
+        return v != nullptr && v[0] != '\0' ? std::atoi(v) : -1;
     }();
-    if (forced >= 0) return forced;
+    const int cc = current_cc();
+    if (forced == 2 && cc > 0) return 1;   // a test mode: the FP16 path on any card (gemm_bf16_parity on sm_80+)
+    if (cc <= 0 || cc >= 80) return 0;
+    if (cc < 70) return 2;
+    if (forced >= 0) return forced != 0 ? 1 : 0;
     return cc < 75 ? 1 : 0;
 }
 bool grow(uint16_t*& p, int64_t& have, int64_t want) {   // `have`, `want`: 2-byte elements

From da3e9a1ff161164daf7e93658fac3ed56bddac5f Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 00:50:48 +0200
Subject: [PATCH 174/201] docs/INTEL_ARC.md: the experimental Intel Arc engine
 - what you need, the build, what is tested and what is not

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/INTEL_ARC.md | 126 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 126 insertions(+)
 create mode 100644 docs/INTEL_ARC.md

diff --git a/docs/INTEL_ARC.md b/docs/INTEL_ARC.md
new file mode 100644
index 00000000000..7b6acfeb637
--- /dev/null
+++ b/docs/INTEL_ARC.md
@@ -0,0 +1,126 @@
+# Intel Arc (experimental)
+
+Strata 0.1.39 includes an **experimental Intel Arc engine**: Strata's own engine ported to SYCL (Intel oneAPI).
+maxfridbe wrote it in [#423](https://github.com/Niko1221/Strata/pull/423), with fixes from the people testing it.
+The code is in `sycl/`, and the port's own notes, measurements and maintenance procedure are in
+[docs/INTEL.md](INTEL.md). This page covers what you need, how to build it, and what has been tested.
+
+**Experimental means:** the Strata maintainers have no Intel GPU. We compile the port and run its kernel tests, but
+we have not run it on an Arc. Every result on Arc hardware below comes from the community. The NVIDIA and AMD
+engines are unchanged: the Intel build is a separate CMake target, off by default.
+
+There is **no ready-made Intel engine** in the release zips. You build it from source on Linux.
+
+## What has been run, and by whom
+
+| | Hardware | Result | Reported in |
+|---|---|---|---|
+| Port author | Arc Pro B70 32 GB, Ubuntu 24.04 | Coder IQ1_M: 70-78 tok/s decode, ~790 tok/s prompt; IQ2_XS: 51-64 tok/s; 256K context measured | #423, [INTEL.md](INTEL.md) |
+| Community | 2x Arc Pro B70, `--layer-split` | Flash-Next IQ3_XXS 66 tok/s decode, 394 tok/s prompt (with the `stage_room` fix that is now in 0.1.39) | #423 |
+| Community | Arc Pro B50 16 GB | Coder IQ1_M ~23 tok/s, IQ2_XS ~25-27 tok/s, up to 128K | #423 |
+| Community | Arc B580 12 GB, WSL2 | IQ2_XS ~21 tok/s, Coder ~15 tok/s; **device loss also seen** | #423 |
+| Strata maintainers | no Arc | compile check and kernel tests on a CPU device only (below) | this release |
+
+The 0.1.39 port re-migrates 0.1.38's port onto the 0.1.39 engine sources (the #606 NaN fix, the #649 verify
+trace, the new prompt paths). It compiles and its kernel tests run, but **nobody has run the 0.1.39 port on an Arc
+yet**. The numbers in the table were measured on earlier versions.
+
+## What was tested here (0.1.39)
+
+- **Compiles:** Ubuntu 24.04 (WSL2), Intel oneAPI DPC++ 2026.1.1 + oneMKL 2026.1. The whole `sycl/` project
+  builds with 0 errors: the `strata` engine plus all 157 targets (the kernel parity tests and benches). The build is
+  SPIR-V (JIT). The AOT build (`STRATA_SYCL_AOT`) was not built here, because it needs `ocloc`.
+- **Kernel parity tests on a CPU** (`ONEAPI_DEVICE_SELECTOR=opencl:cpu`, Intel's OpenCL CPU runtime, AMD Ryzen 5 7600):
+  14 of 25 pass. That is the same set that PR #423's own 0.1.38 port passes on that device: the failures are tight
+  float tolerances on the CPU's math (rel 3e-6 against a 1e-6 limit), model fixtures that are not present, and two
+  tests that time out on a CPU. This is a check that the kernels compile and compute, not a test of an Arc.
+- **Setup:** `--backend sycl` warns, then hands over to `sycl/setup_intel.py` on Linux (unit tests:
+  `tools/test_setup_sycl.py`).
+- **Unchanged:** the CUDA engine's greedy output, checked byte-identical against the gated 0.1.39 build (Q2_0 and Coder).
+  The HIP build is not affected (the option is off by default).
+
+**Not tested by anyone yet:** Windows (no native build path; see below), Arc on WSL2 for the 0.1.39 port, the Alchemist
+A-series, integrated Arc GPUs (the B390 / Panther Lake in #515; the shared-memory planning does not exist yet), and
+images (not wired on Intel).
+
+## What you need
+
+- **Linux**, e.g. Ubuntu 24.04, with Intel's GPU driver (the `xe` or `i915` kernel driver plus the compute runtime /
+  Level Zero; on Ubuntu, `intel-opencl-icd libze1 libze-intel-gpu1`, or Intel's
+  [client GPU guide](https://dgpu-docs.intel.com/driver/client/overview.html)).
+- **Intel oneAPI**: the DPC++ compiler (`icpx`, 2025.3 or newer; 2026.1 is what was built here) and **oneMKL**. About 5 GB.
+- `cmake` 3.24+, `ninja`, `git` (the build fetches ggml unless you point `STRATA_GGML_DIR` at a llama.cpp checkout),
+  Python 3.
+- For `setup --backend sycl` today: **Docker**. `sycl/setup_intel.py` runs the engine in the `strata-sycl-dev`
+  image built from `sycl/tools/Dockerfile`. Note that the Dockerfile starts from a community llama.cpp SYCL image
+  (`ghcr.io/snailium/...`), not an Intel or Strata image.
+- VRAM: the port keeps the experts on the card (`--stream-experts`). A 32 GB card holds the Coder IQ1_M or IQ2_XS.
+  Smaller cards mirror part of the experts in RAM and are slower.
+
+## Build (Linux)
+
+Install oneAPI from Intel's apt repository (this is what was used here):
+
+```sh
+wget -qO- https://apt.repos.intel.com/intel-gpg-keys/GPG-PUB-KEY-INTEL-SW-PRODUCTS.PUB \
+  | sudo gpg --dearmor -o /usr/share/keyrings/oneapi-archive-keyring.gpg
+echo "deb [signed-by=/usr/share/keyrings/oneapi-archive-keyring.gpg] https://apt.repos.intel.com/oneapi all main" \
+  | sudo tee /etc/apt/sources.list.d/oneAPI.list
+sudo apt update
+sudo apt install intel-oneapi-compiler-dpcpp-cpp intel-oneapi-mkl-devel ninja-build cmake git
+```
+
+Then build the engine. Either command works: the first goes through the top-level CMake option, the second
+configures the `sycl/` project directly.
+
+```sh
+source /opt/intel/oneapi/setvars.sh
+cmake -S . -B build-sycl -G Ninja -DCMAKE_C_COMPILER=icx -DCMAKE_CXX_COMPILER=icpx -DSTRATA_ENABLE_SYCL=ON
+#   or: cmake -S sycl -B build-sycl -G Ninja -DCMAKE_C_COMPILER=icx -DCMAKE_CXX_COMPILER=icpx
+cmake --build build-sycl --target strata
+```
+
+Options:
+
+- `-DSTRATA_SYCL_AOT=bmg-g31` (Arc Pro B70) or `bmg-g21` (B580 / B570 / Pro B60) compiles the GPU code ahead of
+  time. This needs `ocloc` (Intel's `intel-ocloc` package). Without it, the first start JIT-compiles every kernel,
+  which takes about 47 s.
+- `-DSTRATA_SYCL_PARITY=OFF` skips the kernel tests (on by default). Run them with
+  `ctest --test-dir build-sycl` on the card.
+
+`setup_intel.py` looks for `build-sycl-aot/strata` or `build-sycl/strata` in the checkout. With the
+top-level option the engine is at `build-sycl/sycl/strata`, so either use `-S sycl` or set `STRATA_SYCL_BIN`.
+
+## Setup and running
+
+```sh
+./setup.sh --backend sycl [setup's usual options, e.g. --model IQ2_XS --context 32768]
+```
+
+This prints the experimental warning and continues with `sycl/setup_intel.py`. That script finds the Arc in sysfs,
+uses the SYCL engine you built, and writes the config and `run-<model>.sh`. It still downloads and packs the model
+the usual way. To run the engine by hand (no Docker), see "How to run it by hand" in [INTEL.md](INTEL.md).
+
+Things that matter on an Arc (details in INTEL.md):
+
+- **Do not ask for more VRAM than the card has.** On the `xe` driver, an allocation past VRAM can push buffers into
+  RAM until the machine runs out of memory and stalls. Leave about 1.5 GB free.
+- `SYCL_CACHE_PERSISTENT=0`: the persistent JIT cache crashed on Xe2 during the first compile.
+- Two cards: `ONEAPI_DEVICE_SELECTOR=level_zero:*` (the image pins `level_zero:0`; `strata-sycl.sh` now passes the
+  variable through) and `--layer-split`.
+- `STRATA_VERIFY_NO_HOST=1` (set by `strata-sycl.sh`) is only valid when every expert is in VRAM. On smaller cards
+  that path is the one that has hung, and #667 found the likely reason: the GPU does not see the CPU's flag
+  stores without a system fence.
+
+## Windows
+
+There is no Windows path yet. `setup --backend sycl` on Windows stops and points here. oneAPI exists for Windows,
+but `sycl/CMakeLists.txt` uses GCC-style flags (`-mavx512f`, `-fp-model=precise`, `-qmkl`) and the runner is a
+bash/Docker script, so a native Windows build would need work. Nobody has tried it. WSL2 with an Arc has been
+used by one tester (the B580 row above), but setup cannot detect the card there, because it reads `/sys/class/drm`,
+which WSL2 does not have.
+
+## Reporting a problem
+
+Open an issue with: the card, the driver version, `sycl-ls` output, the oneAPI version, the model and flags, and the
+engine's stderr. Results from real cards are what move this from experimental to supported.

From 552da41c9c7b3dfe81e186d2c53e2325df0d336a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 01:01:09 +0200
Subject: [PATCH 175/201] gfx906 build on 0.1.39: the segmented expert cache
 (#533) is CUDA-only there too; pinned.cu's std::max beside windows.h

PR #638 was cut from 0.1.38. 0.1.39's segmented expert cache (#533) keeps its cuMem* code out of HIP builds through
STRATA_USE_HIP, which the gfx906 compat build does not define, so it included <cuda.h>. Its virtual-memory blocks are
now behind STRATA_EC_NO_VMM (STRATA_USE_HIP or STRATA_HIP_GFX906); the CUDA and RDNA preprocessor output is unchanged.
(std::max) keeps windows.h's max macro out of two Windows-only lines (found by a Windows gfx906 compile check).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/core/expert_cache.cpp | 18 ++++++++++++------
 src/core/pinned.cu        |  4 ++--
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/src/core/expert_cache.cpp b/src/core/expert_cache.cpp
index e25f60e9fb2..b8df2faf4bb 100644
--- a/src/core/expert_cache.cpp
+++ b/src/core/expert_cache.cpp
@@ -1,8 +1,14 @@
 // src/core/expert_cache.cpp - R4's slot storage and residency table.  Read the header first.
 #include "strata/core/expert_cache.hpp"
 
+// #533's segmented cache uses CUDA's virtual memory management (cuMem*): not on HIP, neither the RDNA backend nor
+// the gfx906 compat build (PR #638), which compiles this file as HIP without STRATA_USE_HIP
+#if defined(STRATA_USE_HIP) || defined(STRATA_HIP_GFX906)
+#define STRATA_EC_NO_VMM 1
+#endif
+
 #include <cuda_runtime.h>
-#if !defined(STRATA_USE_HIP)
+#if !defined(STRATA_EC_NO_VMM)
 #include <cuda.h>   // #533: the virtual memory management types (the functions come through the runtime's entry points)
 #endif
 
@@ -148,7 +154,7 @@ ExpertCache::~ExpertCache() { close(); }
 // ---- #533: the segmented arena (--vram-elastic).  The driver API's virtual memory functions, looked up through the
 // runtime (no link against the driver library): one address range for the whole arena, backed by physical segments,
 // and the tail's segments unmapped / mapped again later.  Nothing here runs unless a segment size was set.
-#if !defined(STRATA_USE_HIP)
+#if !defined(STRATA_EC_NO_VMM)
 namespace {
 struct Vmm {
     CUresult (CUDAAPI* device_get)(CUdevice*, int) = nullptr;
@@ -227,7 +233,7 @@ bool map_segment(const Vmm& v, int dev, CUdeviceptr va, size_t bytes, unsigned l
 #endif
 
 bool ExpertCache::open_segmented(uint64_t want, std::string& err) {
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_EC_NO_VMM)
     (void) want;
     err = "ExpertCache: --vram-elastic (a segmented expert cache) is CUDA-only for now";
     return false;
@@ -280,7 +286,7 @@ bool ExpertCache::open_segmented(uint64_t want, std::string& err) {
 }
 
 void ExpertCache::release_segmented() {
-#if !defined(STRATA_USE_HIP)
+#if !defined(STRATA_EC_NO_VMM)
     const Vmm& v = vmm();
     if (base_ != nullptr) cudaDeviceSynchronize();
     const CUdeviceptr va = reinterpret_cast<CUdeviceptr>(base_);
@@ -318,7 +324,7 @@ bool ExpertCache::shrink(int64_t keep_bytes, std::string& err) {
         err = "the expert cache is not segmented (the engine needs --vram-elastic)";
         return false;
     }
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_EC_NO_VMM)
     (void) keep_bytes;
     return false;
 #else
@@ -352,7 +358,7 @@ bool ExpertCache::grow(int64_t want_bytes, std::string& err) {
         err = "the expert cache is not segmented (the engine needs --vram-elastic)";
         return false;
     }
-#if defined(STRATA_USE_HIP)
+#if defined(STRATA_EC_NO_VMM)
     (void) want_bytes;
     return false;
 #else
diff --git a/src/core/pinned.cu b/src/core/pinned.cu
index 780d93fb7ae..73b441f3901 100644
--- a/src/core/pinned.cu
+++ b/src/core/pinned.cu
@@ -452,7 +452,7 @@ LoadStats load_experts_direct(const std::string& path, uint8_t* dst, const std::
     std::mutex err_mu;
     std::string err;
     const int wide = MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, nullptr, 0);
-    std::vector<wchar_t> wpath((size_t) std::max(wide, 1), L'\0');
+    std::vector<wchar_t> wpath((size_t) (std::max)(wide, 1), L'\0');
     if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, path.c_str(), -1, wpath.data(), wide);
     auto worker = [&]() {
         HANDLE h = CreateFileW(wpath.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING,
@@ -520,7 +520,7 @@ bool experts_unbuffered(const std::vector<std::string>& files, uint64_t arena_by
     uint64_t seed = (uint64_t) GetTickCount64() * 6364136223846793005ull + 1442695040888963407ull;
     for (const std::string& f : files) {
         const int wide = MultiByteToWideChar(CP_UTF8, 0, f.c_str(), -1, nullptr, 0);
-        std::vector<wchar_t> w((size_t) std::max(wide, 1), L'\0');
+        std::vector<wchar_t> w((size_t) (std::max)(wide, 1), L'\0');
         if (wide > 0) MultiByteToWideChar(CP_UTF8, 0, f.c_str(), -1, w.data(), wide);
         HANDLE h = CreateFileW(w.data(), GENERIC_READ, FILE_SHARE_READ, nullptr, OPEN_EXISTING, FILE_FLAG_RANDOM_ACCESS,
                                nullptr);

From 2fbbfa28d385b8feb6cc4a2ca75175cf353c8eec Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 01:18:02 +0200
Subject: [PATCH 176/201] #465 engine: batch slots for one GPU - warn instead
 of refuse, windows over the active slots, slot conversation cache, prompts
 read beside decoding slots, BYIELD

- --slots N is the same as --batch N; a count the engine cannot run (no --serve, 1, more than 8, a split on one
  GPU, sessions that do not fit, --batch-groups that do not divide) is a warning and fewer slots or none, never a
  refusal; INFO says batch_slots=N when slots run
- a batch window runs over the active slots only (Verifier::run_slot_rows, graphs per row list): an idle slot is
  not written, so it keeps the conversation it served
- a request whose prompt starts with what an idle slot holds (all of it, or its turn checkpoint) continues from
  the slot's sessions instead of reading the history again
- with slots, a prompt is read one prompt chunk at a time (the same chunks as one run) and the slots decode
  between two chunks for half as long as the chunk took (STRATA_BATCH_DECODE_SHARE)
- BYIELD <slot>: the prompt being read stops at its next chunk boundary, the part read is copied into the slot,
  YIELDED <slot> <tokens> + DONE cancel; the same request sent again goes on from there with the same chunks
  and checkpoints (#656's cooperative preemption, a slot as the park)

Default (no --batch) unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/core/verify.hpp |  24 ++-
 src/core/verify.cpp            | 103 ++++++----
 src/program/generate.cpp       | 340 +++++++++++++++++++++++++++++----
 3 files changed, 384 insertions(+), 83 deletions(-)

diff --git a/include/strata/core/verify.hpp b/include/strata/core/verify.hpp
index f84a9d0a0b9..9e0f356867f 100644
--- a/include/strata/core/verify.hpp
+++ b/include/strata/core/verify.hpp
@@ -142,6 +142,10 @@ class Verifier {
     /// One batch window over slots [0, S): tokens[s] at positions pos[s]; out[s] = the greedy pick after it.
     bool run_slots(int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool, void* user, int32_t* out,
                    std::string& err);
+    /// The same over the S slots `rows` (row t is slot rows[t], any distinct slots in any order): the slots not
+    /// listed are not touched, so an idle slot keeps its state (a finished conversation it may continue later).
+    bool run_slot_rows(const int* rows, int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool, void* user,
+                       int32_t* out, std::string& err);
     /// Keep every row of the last batch window: each slot's state advances by its one token.
     bool commit_slots(std::string& err);
 
@@ -210,26 +214,32 @@ class Verifier {
     // batch windows (see init_slots)
     std::vector<SessionState*> slots_;
     bool batch_rec_ = false;               ///< record_window is capturing a batch window
-    int row_base_ = 0;                     ///< ... over slots [row_base_, row_base_ + T)
+    int row_base_ = 0;                     ///< ... its hand-off rows start here (a pipeline group's own rows)
+    int brow_[8] = {};                     ///< ... and row t is slot brow_[t]
     bool last_batch_ = false;              ///< the last run was a batch window (set_plan_slot: one group)
-    std::map<int, cudaGraphExec_t> exec_bm_, commit_bm_;   ///< key base * 16 + S
-    int last_base_ = 0;
+    std::map<uint64_t, cudaGraphExec_t> exec_bm_, commit_bm_;   ///< key: batch_key(rows, S, hand-off base)
+    int last_rows_[8] = {};                ///< the slots of the last batch window's rows
+    static uint64_t batch_key(const int* rows, int S, int hbase) {
+        uint64_t k = (uint64_t) hbase << 40 | (uint64_t) S << 32;
+        for (int t = 0; t < S; ++t) k |= (uint64_t) (rows[t] & 15) << (4 * t);
+        return k;
+    }
     // batch_launch / batch_poll
     bool b_running_ = false;
     int64_t b_k_ = 0, b_steps_ = 0;
     std::chrono::steady_clock::time_point b_last_;
     int32_t b_out_[8] = {};
     std::vector<strata::kernels::SamplerParams> slot_sp_;
-    bool sample_rows(int base, int S, std::string& err);   ///< the sampled slots' rows of the last batch window
+    bool sample_rows(int S, std::string& err);   ///< the sampled slots' rows of the last batch window
     int32_t* h_commitb_ = nullptr; int32_t* m_commitb_ = nullptr;   // per slot [1, 0, pos, -1 ..], stride 2 + max_t
     int32_t* commitb_ = nullptr;
     float* tail_snap_b_ = nullptr;         ///< per (slot, QSA layer) indexer tail snapshot
     void* arena_b_ = nullptr;
     int64_t last_pos_b_[8] = {};
-    bool capture_batch(int base, int S, std::string& err);
+    bool capture_batch(const int* rows, int S, int hbase, std::string& err);
     void collect_profile();   ///< STRATA_VERIFY_PROFILE: add the last window's stamps to prof_sum_
-    bool capture_commit_batch(int base, int S, std::string& err);
-    bool stage_batch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err);
+    bool capture_commit_batch(const int* rows, int S, int hbase, std::string& err);
+    bool stage_batch(const int* rows, int S, int hbase, const int32_t* tokens, const int64_t* pos, std::string& err);
     strata::kernels::SamplerParams sampling_ = [] {
         strata::kernels::SamplerParams s;
         s.greedy = true;
diff --git a/src/core/verify.cpp b/src/core/verify.cpp
index 868e32b1853..5ba7c93bf3a 100644
--- a/src/core/verify.cpp
+++ b/src/core/verify.cpp
@@ -537,7 +537,7 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
     if (!batch_rec_) groups_[T] = G;
     const int64_t nQall = g.n_qsa_layers();
     // a batch window: row t is slot t, whose state lives in its own session
-    auto slot_ss = [&](int t) -> SessionState& { return batch_rec_ ? *slots_[(size_t) (row_base_ + t)] : ss; };
+    auto slot_ss = [&](int t) -> SessionState& { return batch_rec_ ? *slots_[(size_t) brow_[t]] : ss; };
     const int hrow0 = batch_rec_ ? row_base_ : 0;   // a slot group's own hand-off rows
 
     // ---- the window's inputs, from mapped staging
@@ -736,7 +736,7 @@ bool Verifier::record_window(int T, cudaStream_t cs, std::string& err) {
                 stamp(l, 8, grp);
                 if (batch_rec_) {   // every slot's indexer tail, restored by its commit
                     for (int t = tb; t < te; ++t)
-                        copy_from_mapped(tail_snap_b_ + ((size_t) (row_base_ + t) * nQall + qi) * TS, slot_ss(t).qsa_states[qi].idx_tail,
+                        copy_from_mapped(tail_snap_b_ + ((size_t) brow_[t] * nQall + qi) * TS, slot_ss(t).qsa_states[qi].idx_tail,
                                          TS, cs);
                 } else
                 if (grp == 0) copy_from_mapped(tail_snap_ + (size_t) qi * TS, st.idx_tail, TS, cs);
@@ -1606,15 +1606,16 @@ bool Verifier::init_slots(const std::vector<SessionState*>& slots, std::string&
     return true;
 }
 
-bool Verifier::capture_batch(int base, int S, std::string& err) {
-    cudaGraphExec_t& ex = exec_bm_[base * 16 + S];
+bool Verifier::capture_batch(const int* rows, int S, int hbase, std::string& err) {
+    cudaGraphExec_t& ex = exec_bm_[batch_key(rows, S, hbase)];
     if (ex != nullptr) return true;
     if (cudaStreamBeginCapture(cs_, cudaStreamCaptureModeThreadLocal) != cudaSuccess) {
         err = "verify: begin batch capture failed";
         return false;
     }
     batch_rec_ = true;
-    row_base_ = base;
+    row_base_ = hbase;
+    for (int t = 0; t < S; ++t) brow_[t] = rows[t];
     std::string rerr;
     const bool ok = record_window(S, cs_, rerr);
     batch_rec_ = false;
@@ -1631,12 +1632,14 @@ bool Verifier::capture_batch(int base, int S, std::string& err) {
     if (ie != cudaSuccess) { err = std::string("verify: batch instantiate: ") + cudaGetErrorString(ie); return false; }
     cudaGraphUpload(ex, cs_);
     cudaStreamSynchronize(cs_);
-    std::fprintf(stderr, "strata verify: captured the batch window over slots [%d, %d)\n", base, base + S);
+    std::string list;
+    for (int t = 0; t < S; ++t) list += (t ? "," : "") + std::to_string(rows[t]);
+    std::fprintf(stderr, "strata verify: captured the batch window over slots %s\n", list.c_str());
     return true;
 }
 
-bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
-    cudaGraphExec_t& cex = commit_bm_[base * 16 + S];
+bool Verifier::capture_commit_batch(const int* rows, int S, int hbase, std::string& err) {
+    cudaGraphExec_t& cex = commit_bm_[batch_key(rows, S, hbase)];
     if (cex != nullptr) return true;
     using namespace strata::kernels;
     const ModelGeometry& g = *g_;
@@ -1653,7 +1656,8 @@ bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
     }
     bool ok = true;
     try {
-        copy_i32_from_mapped(commitb_ + (size_t) base * CB, m_commitb_ + (size_t) base * CB, S * CB, cs_);
+        for (int t = 0; t < S; ++t)
+            copy_i32_from_mapped(commitb_ + (size_t) rows[t] * CB, m_commitb_ + (size_t) rows[t] * CB, CB, cs_);
         int64_t qsa_index = 0, gdn_index = 0;
         for (int64_t l = 0; l < lb_; ++l) (is_qsa_layer(g, l) ? qsa_index : gdn_index) += 1;
         for (int64_t l = lb_; l < le_ && ok; ++l) {
@@ -1662,8 +1666,8 @@ bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
                 const WeightRef* wnm = need(v, "ssm_norm.weight", err);
                 if (!wnm) { ok = false; break; }
                 for (int t = 0; t < S; ++t) {
-                    SessionState& sx = *slots_[(size_t) (base + t)];
-                    const int32_t* keep = commitb_ + (size_t) (base + t) * CB;
+                    SessionState& sx = *slots_[(size_t) rows[t]];
+                    const int32_t* keep = commitb_ + (size_t) rows[t] * CB;
                     float* state = sx.gdn_state + (size_t) (gdn_index - sx.gdn_ord0) * gdn_floats;
                     float* conv = state + (uint64_t) g.ssm_state_size * g.ssm_v_heads * g.ssm_state_size;
                     gdn_conv_commit(conv, qkv_L_ + (size_t) gdn_index * MT * C + (size_t) t * C, (int) C, keep, cs_);
@@ -1678,10 +1682,10 @@ bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
                 const WeightRef* wikn = need(v, "indexer.k_norm.weight", err);
                 if (!wikn) { ok = false; break; }
                 for (int t = 0; t < S; ++t) {
-                    const QsaState& st = slots_[(size_t) (base + t)]->qsa_states[qsa_index];
-                    copy_from_mapped(st.idx_tail, tail_snap_b_ + ((size_t) (base + t) * nQ + qsa_index) * TS, TS, cs_);
+                    const QsaState& st = slots_[(size_t) rows[t]]->qsa_states[qsa_index];
+                    copy_from_mapped(st.idx_tail, tail_snap_b_ + ((size_t) rows[t] * nQ + qsa_index) * TS, TS, cs_);
                     const QsaIndexerBuffers ib{st.idx_tail, st.idx_dead, st.idx_pooled, st.idx_block_pos};
-                    native_qsa_indexer_append(idx_raw_L_ + (size_t) (qsa_index * MT + t) * ID, commitb_ + (size_t) (base + t) * CB + 2,
+                    native_qsa_indexer_append(idx_raw_L_ + (size_t) (qsa_index * MT + t) * ID, commitb_ + (size_t) rows[t] * CB + 2,
                                               0, (const float*) wikn->data, EPS, ib, s, st.max_cells, rope_scaling(), cs_);
                 }
                 ++qsa_index;
@@ -1689,8 +1693,8 @@ bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
         }
         if (ok && ss_->ple.ready() && ple_stage())
             for (int t = 0; t < S; ++t)
-                copy_indexed(slots_[(size_t) (base + t)]->ple_hist, hist_snap_ + (size_t) t * HS, HS,
-                             commitb_ + (size_t) (base + t) * CB + 1, HS, cs_);
+                copy_indexed(slots_[(size_t) rows[t]]->ple_hist, hist_snap_ + (size_t) t * HS, HS,
+                             commitb_ + (size_t) rows[t] * CB + 1, HS, cs_);
     } catch (const std::exception& e) {
         err = std::string("verify batch commit: ") + e.what();
         ok = false;
@@ -1710,17 +1714,26 @@ bool Verifier::capture_commit_batch(int base, int S, std::string& err) {
     return true;
 }
 
-bool Verifier::stage_batch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err) {
+bool Verifier::stage_batch(const int* rows, int S, int hbase, const int32_t* tokens, const int64_t* pos,
+                           std::string& err) {
     using namespace strata::kernels;
-    if (S < 1 || base < 0 || base + S > (int) slots_.size()) { err = "verify: batch rows out of range (init_slots)"; return false; }
+    if (S < 1 || S > max_t_ || hbase < 0 || hbase + S > (int) slots_.size()) {
+        err = "verify: batch rows out of range (init_slots)";
+        return false;
+    }
+    for (int t = 0; t < S; ++t) {
+        bool dup = false;
+        for (int u = 0; u < t; ++u) dup = dup || rows[u] == rows[t];
+        if (rows[t] < 0 || rows[t] >= (int) slots_.size() || dup) { err = "verify: a batch row's slot is out of range or twice"; return false; }
+    }
     if (released_.load()) { err = "verify: an earlier window never finished on the GPU (#267); restart the engine"; return false; }
     const ModelGeometry& g = *g_;
     for (int t = 0; t < S; ++t)
-        if (pos[t] < 0 || pos[t] + 1 > slots_[(size_t) (base + t)]->max_cells) {
-            err = "verify: slot " + std::to_string(base + t) + " runs past its context";
+        if (pos[t] < 0 || pos[t] + 1 > slots_[(size_t) rows[t]]->max_cells) {
+            err = "verify: slot " + std::to_string(rows[t]) + " runs past its context";
             return false;
         }
-    if (!capture_batch(base, S, err) || !capture_commit_batch(base, S, err)) return false;
+    if (!capture_batch(rows, S, hbase, err) || !capture_commit_batch(rows, S, hbase, err)) return false;
     const Clock::time_point t0 = Clock::now();
     const QsaShapes s = shapes_of(g);
     for (int t = 0; t < S; ++t) {
@@ -1733,18 +1746,18 @@ bool Verifier::stage_batch(int base, int S, const int32_t* tokens, const int64_t
         for (int64_t h = 0; h < g.idx_q_heads; ++h) pi[t * g.idx_q_heads + h] = (int32_t) pos[t];
     }
     if (ss_->ple.ready() && ple_stage()) {
-        uint32_t rows[kVerifyMaxT * PLE_N_HEADS];
+        uint32_t ple_rows[kVerifyMaxT * PLE_N_HEADS];   // (not `rows`: that is the slots of the window's rows)
         for (int t = 0; t < S; ++t) {
-            const SessionState& sx = *slots_[(size_t) (base + t)];
+            const SessionState& sx = *slots_[(size_t) rows[t]];
             int32_t prev[2] = {sx.ple_prev[0], sx.ple_prev[1]};
-            ngram_rows(&tokens[t], prev, 1, ss_->ple.consts, rows + t * PLE_N_HEADS);
+            ngram_rows(&tokens[t], prev, 1, ss_->ple.consts, ple_rows + t * PLE_N_HEADS);
         }
-        if (!ss_->ple.table->gather_batch(rows, (size_t) S, h_ple_, err)) return false;
+        if (!ss_->ple.table->gather_batch(ple_rows, (size_t) S, h_ple_, err)) return false;
     }
     // the commit's rows (a batch window keeps every row): [1, 0, position, -1 ..] per slot
     const int64_t CB = 2 + max_t_;
     for (int t = 0; t < S; ++t) {
-        int32_t* c = h_commitb_ + (size_t) (base + t) * CB;
+        int32_t* c = h_commitb_ + (size_t) rows[t] * CB;
         c[0] = 1;
         c[1] = 0;
         c[2] = (int32_t) pos[t];
@@ -1756,7 +1769,8 @@ bool Verifier::stage_batch(int base, int S, const int32_t* tokens, const int64_t
     *(volatile uint32_t*) h_flagB_ = 0;
     std::atomic_thread_fence(std::memory_order_seq_cst);
     last_t_ = S;
-    last_base_ = base;
+    for (int t = 0; t < S; ++t) last_rows_[t] = rows[t];
+    row_base_ = hbase;   // the graphs' key (and nothing else) reads it until the next stage_batch
     last_batch_ = true;
     for (int t = 0; t < S; ++t) { last_tokens_[t] = tokens[t]; last_pos_b_[t] = pos[t]; }
     ms_host += ms_since(t0);
@@ -1765,11 +1779,18 @@ bool Verifier::stage_batch(int base, int S, const int32_t* tokens, const int64_t
 
 bool Verifier::run_slots(int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool, void* user, int32_t* out,
                          std::string& err) {
+    int rows[8] = {};
+    for (int t = 0; t < S && t < 8; ++t) rows[t] = t;
+    return run_slot_rows(rows, S, tokens, pos, pool, user, out, err);
+}
+
+bool Verifier::run_slot_rows(const int* rows, int S, const int32_t* tokens, const int64_t* pos, PoolMultiFn pool,
+                             void* user, int32_t* out, std::string& err) {
     using namespace strata::kernels;
     const OnDevice on_device(device_);
     const ModelGeometry& g = *g_;
-    if (!stage_batch(0, S, tokens, pos, err)) return false;
-    const cudaError_t le = cudaGraphLaunch(exec_bm_[0 * 16 + S], cs_);
+    if (!stage_batch(rows, S, 0, tokens, pos, err)) return false;
+    const cudaError_t le = cudaGraphLaunch(exec_bm_[batch_key(rows, S, 0)], cs_);
     if (le != cudaSuccess) { err = std::string("verify: batch launch: ") + cudaGetErrorString(le); return false; }
     (void) cudaStreamQuery(cs_);
     volatile uint32_t* const seq = h_seq_;
@@ -1827,8 +1848,8 @@ bool Verifier::run_slots(int S, const int32_t* tokens, const int64_t* pos, PoolM
     cudaStreamSynchronize(copy_);
     if (prof_on_) collect_profile();
     ++windows;
-    if (le_ < g.n_layers) return next_ == nullptr || next_->run_slots(S, tokens, pos, pool, next_user_, out, err);
-    if (!sample_rows(0, S, err)) return false;
+    if (le_ < g.n_layers) return next_ == nullptr || next_->run_slot_rows(rows, S, tokens, pos, pool, next_user_, out, err);
+    if (!sample_rows(S, err)) return false;
     for (int t = 0; t < S; ++t) out[t] = ((volatile int32_t*) h_out_)[t];
     progress_at("decode");
     progress_beat();
@@ -1841,13 +1862,13 @@ bool Verifier::commit_slots(std::string& err) {
     const int S = last_t_;
     const Clock::time_point t0 = Clock::now();
     std::atomic_thread_fence(std::memory_order_seq_cst);
-    const cudaError_t le = cudaGraphLaunch(commit_bm_[last_base_ * 16 + S], cs_);
+    const cudaError_t le = cudaGraphLaunch(commit_bm_[batch_key(last_rows_, S, row_base_)], cs_);
     if (le != cudaSuccess) { err = std::string("verify: batch commit launch: ") + cudaGetErrorString(le); return false; }
     const cudaError_t se = cudaStreamSynchronize(cs_);
     if (se != cudaSuccess) { err = std::string("verify: batch commit: ") + cudaGetErrorString(se); return false; }
     if (ple_stage())
         for (int t = 0; t < S; ++t) {
-            SessionState& sx = *slots_[(size_t) (last_base_ + t)];
+            SessionState& sx = *slots_[(size_t) last_rows_[t]];
             sx.ple_prev[0] = sx.ple_prev[1];
             sx.ple_prev[1] = last_tokens_[t];
         }
@@ -1855,10 +1876,10 @@ bool Verifier::commit_slots(std::string& err) {
     return next_ == nullptr || next_->commit_slots(err);
 }
 
-bool Verifier::sample_rows(int base, int S, std::string& err) {
+bool Verifier::sample_rows(int S, std::string& err) {
     bool any = false;
     for (int t = 0; t < S; ++t) {
-        strata::kernels::SamplerParams sp = slot_sp_[(size_t) (base + t)];
+        strata::kernels::SamplerParams sp = slot_sp_[(size_t) last_rows_[t]];
         if (sp.greedy || sp.temperature <= 0.0f) continue;
         sp.counter = (uint64_t) last_pos_b_[t];   // Philox(seed, position): the solo window's draw for this position
         sp.penalty_last_n = 0;
@@ -1873,14 +1894,16 @@ bool Verifier::sample_rows(int base, int S, std::string& err) {
 bool Verifier::batch_launch(int base, int S, const int32_t* tokens, const int64_t* pos, std::string& err) {
     const OnDevice on_device(device_);
     if (b_running_) { err = "verify: batch_launch while this stage is busy"; return false; }
-    if (!stage_batch(base, S, tokens, pos, err)) return false;
-    cudaError_t le = cudaGraphLaunch(exec_bm_[base * 16 + S], cs_);
-    if (le == cudaSuccess) le = cudaGraphLaunch(commit_bm_[base * 16 + S], cs_);   // right behind it: every row is kept
+    int rows[8] = {};
+    for (int t = 0; t < S && t < 8; ++t) rows[t] = base + t;
+    if (!stage_batch(rows, S, base, tokens, pos, err)) return false;
+    cudaError_t le = cudaGraphLaunch(exec_bm_[batch_key(rows, S, base)], cs_);
+    if (le == cudaSuccess) le = cudaGraphLaunch(commit_bm_[batch_key(rows, S, base)], cs_);   // right behind it: every row is kept
     if (le != cudaSuccess) { err = std::string("verify: batch launch: ") + cudaGetErrorString(le); return false; }
     (void) cudaStreamQuery(cs_);
     if (ple_stage())   // the host's side of the commit (the hash's last two tokens)
         for (int t = 0; t < S; ++t) {
-            SessionState& sx = *slots_[(size_t) (base + t)];
+            SessionState& sx = *slots_[(size_t) rows[t]];
             sx.ple_prev[0] = sx.ple_prev[1];
             sx.ple_prev[1] = tokens[t];
         }
@@ -1945,7 +1968,7 @@ int Verifier::batch_poll(PoolMultiFn pool, void* user, std::string& err) {
     if (qc == cudaErrorNotReady) return 0;
     if (prof_on_) collect_profile();
     if (last_stage()) {
-        if (!sample_rows(last_base_, S, err)) { b_running_ = false; return -1; }
+        if (!sample_rows(S, err)) { b_running_ = false; return -1; }
         for (int t = 0; t < S; ++t) b_out_[t] = ((volatile int32_t*) h_out_)[t];
     }
     ++windows;
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 9978a45e4d3..270a7358393 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -617,6 +617,10 @@ void usage() {
                  "  --vram-elastic       --serve (#533, opt-in, NVIDIA): the expert cache in segments (--vram-segment-mib,\n"
                  "                       default 512), so the command `VRAM <reserve_mib>` (the server's POST /v1/vram) can\n"
                  "                       give VRAM back to other programs between requests and take it back later\n"
+                 "  --batch N / --slots N  --serve (opt-in): up to N requests decode together in batch slots (2..8),\n"
+                 "                       each slot with its own session (VRAM like the main one); docs/BATCHING.md\n"
+                 "  --batch-groups G     --batch with a layer split: the slots in G groups pipelined through the GPUs\n"
+                 "  --trim-stage-weights an explicit --layer-split: each GPU loads only its own layers' dense weights\n"
                  "  --prompt-cache-every N  --serve: also checkpoint every N fresh prompt tokens (default 16384, 0 = off)\n"
                  "  --turn-token ID      --serve: the token that opens a chat turn (default 248045, <|im_start|>)\n"
                  "  --tail-role-token ID --serve: a turn of this role right before the last turn is left out of\n"
@@ -1382,6 +1386,7 @@ int main(int argc, char** argv) {
         else if (a == "--dump-final-r") o.dump_final_r = next("--dump-final-r");
         else if (a == "--spec") o.spec = std::atoi(next("--spec"));
         else if (a == "--batch") o.batch = std::atoi(next("--batch"));
+        else if (a == "--slots") o.batch = std::atoi(next("--slots"));   // the same as --batch
         else if (a == "--trim-stage-weights") o.trim_stage_weights = true;
         else if (a == "--batch-groups") o.batch_groups = std::atoi(next("--batch-groups"));
         else if (a == "--spec-oracle") o.spec_oracle = next("--spec-oracle");
@@ -2889,26 +2894,51 @@ int main(int argc, char** argv) {
 
     // --batch: every stage carves o.batch more sessions like its own (same layer range and context), one per
     // slot of the batch windows.  Before the expert cache is sized, so `--expert-cache auto` leaves them room.
+    // Recommend, never force: a count the engine cannot run is said and adjusted (or batching left off) - the
+    // engine still starts and serves one request at a time.
     std::vector<std::vector<std::unique_ptr<strata::core::SessionState>>> bslot_ss;
+    if (o.batch != 0) {
+        const int cap = strata::kernels::kVerifyMaxT;
+        const char* off = !o.serve ? "it needs --serve" : o.batch < 2 ? "it needs 2 or more slots"
+                        : split_same ? "it needs each stage of a layer split on its own GPU" : nullptr;
+        if (off != nullptr) {
+            std::fprintf(stderr, "strata generate: WARNING: --batch %d is off: %s\n", o.batch, off);
+            o.batch = 0;
+        } else if (o.batch > cap) {
+            std::fprintf(stderr, "strata generate: WARNING: --batch %d: a batch window holds at most %d rows, so %d "
+                                 "slots\n", o.batch, cap, cap);
+            o.batch = cap;
+        }
+    }
+    if (o.batch > 0 && o.batch_groups > 1 && (stages.empty() || o.batch % o.batch_groups != 0)) {
+        std::fprintf(stderr, "strata generate: WARNING: --batch-groups %d needs a layer split and to divide --batch %d; "
+                             "one group\n", o.batch_groups, o.batch);
+        o.batch_groups = 1;
+    }
     if (o.batch > 0) {
-        if (!o.serve || o.batch < 2 || o.batch > strata::kernels::kVerifyMaxT) {
-            std::fprintf(stderr, "strata generate: --batch N needs --serve and 2 <= N <= %d\n", strata::kernels::kVerifyMaxT);
-            return 2;
-        }
         bslot_ss.resize(1 + stages.size());
+        int fit = o.batch;   // the slots every stage could carve
+        uint64_t bytes0 = 0;
         for (size_t k = 0; k < bslot_ss.size(); ++k) {
             const int dev = k == 0 ? 0 : stages[k - 1]->dev;
             const int64_t lo = k == 0 ? 0 : stages[k - 1]->lb;
             const int64_t hi = k == 0 ? (multi_gpu ? split_at[0] : -1) : stages[k - 1]->le;
             const strata::core::OnDevice on_k(dev);
             const uint64_t bytes = strata::core::session_bytes(g, o.max_context, K, lo, hi);
-            for (int b = 0; b < o.batch; ++b) {
+            if (k == 0) bytes0 = bytes;
+            for (int b = 0; b < fit; ++b) {
                 auto u = std::make_unique<strata::core::SessionState>();
                 void* buf = nullptr;
                 if (cudaMalloc(&buf, bytes) != cudaSuccess || strata::core::session_init(g, o.max_context, K, buf, *u, lo, hi) == 0) {
-                    std::fprintf(stderr, "strata generate: --batch: slot %d's session on CUDA%d does not fit (%.2f GiB each)\n",
-                                 b, dev, (double) bytes / 1073741824.0);
-                    return 1;
+                    cudaGetLastError();
+                    if (buf != nullptr) cudaFree(buf);
+                    size_t fb = 0, tb = 0;
+                    cudaMemGetInfo(&fb, &tb);
+                    std::fprintf(stderr, "strata generate: WARNING: --batch %d: slot %d's session does not fit on CUDA%d "
+                                         "(%.2f GiB each, %.2f GiB free); %d slot%s\n", o.batch, b, dev,
+                                 (double) bytes / 1073741824.0, (double) fb / 1073741824.0, b, b == 1 ? "" : "s");
+                    fit = b;
+                    break;
                 }
                 strata::core::session_zero(*u, g, nullptr, nullptr);
                 bslot_ss[k].push_back(std::move(u));
@@ -2917,7 +2947,21 @@ int main(int argc, char** argv) {
             size_t fb = 0, tb = 0;
             cudaMemGetInfo(&fb, &tb);
             std::fprintf(stderr, "strata generate: --batch: %d slot sessions on CUDA%d (%.2f GiB each); %.2f GiB free\n",
-                         o.batch, dev, (double) bytes / 1073741824.0, (double) fb / 1073741824.0);
+                         (int) bslot_ss[k].size(), dev, (double) bytes / 1073741824.0, (double) fb / 1073741824.0);
+        }
+        for (auto& v : bslot_ss) if ((int) v.size() > fit) v.resize((size_t) fit);   // the same count on every stage
+        if (fit < 2) {
+            std::fprintf(stderr, "strata generate: WARNING: --batch is off: not two slot sessions fit (a smaller "
+                                 "--max-context or KV streaming, --kv-resident, makes them smaller)\n");
+            bslot_ss.clear();
+            o.batch = 0;
+        } else {
+            o.batch = fit;
+            if (o.batch_groups > 1 && o.batch % o.batch_groups != 0) o.batch_groups = 1;
+            // the sessions' VRAM is the expert cache's: say what it costs (docs/BATCHING.md has the measured trade)
+            std::fprintf(stderr, "strata generate: --batch %d: the slot sessions take %.2f GiB of VRAM on CUDA0 that the "
+                                 "expert cache would otherwise hold\n", o.batch,
+                         (double) bytes0 * o.batch / 1073741824.0);
         }
     }
 
@@ -4876,10 +4920,6 @@ int main(int argc, char** argv) {
         }
         // each stage's verifier gets its stage's slot sessions
         if (o.batch > 0) {
-            if (split_same) {
-                std::fprintf(stderr, "strata serve: --batch needs each stage on its own GPU\n");
-                return 1;
-            }
             for (size_t k = 0; k < bslot_ss.size(); ++k) {
                 std::vector<strata::core::SessionState*> ptrs;
                 for (auto& u : bslot_ss[k]) ptrs.push_back(u.get());
@@ -5435,7 +5475,7 @@ int main(int argc, char** argv) {
                         "expert_slots_primary=%lld expert_cache_primary_mib=%lld spec=%d "
                         "mtp_max=%d lookup=%d vram_free_mib=%lld cvec=%s arena_mib=%lld pool_workers=%d pcie_frac=%.2f "
                         "spec_min_p=%.2f conversation_cache_mib=%lld conversation_cache_slots=%d "
-                        "conversation_cache_min_free_mib=%lld tail_role_token=%lld vram_elastic=%d engine=" STRATA_VERSION "\n",
+                        "conversation_cache_min_free_mib=%lld tail_role_token=%lld vram_elastic=%d%s engine=" STRATA_VERSION "\n",
                         (long long) o.max_context, o.kv.c_str(),
                         (long long) (g.n_qsa_layers() > 0 && ss.qsa_states[ss.qsa_primary()].kv_mode == 1
                                          ? ss.qsa_states[ss.qsa_primary()].n_slots * 4 : 0),
@@ -5446,7 +5486,8 @@ int main(int argc, char** argv) {
                         (long long) ((o.mmap_experts ? src.resident_bytes() : strata::kernels::cpu::expert_layout().total) >> 20),
                         pool.workers(), o.pcie_frac,
                         o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
-                        (long long) o.conversation_cache_min_free_mib, (long long) o.tail_role_token, xcache.segmented() ? 1 : 0);
+                        (long long) o.conversation_cache_min_free_mib, (long long) o.tail_role_token, xcache.segmented() ? 1 : 0,
+                        o.batch > 0 ? (" batch_slots=" + std::to_string(o.batch)).c_str() : "");
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the
@@ -5619,6 +5660,20 @@ int main(int argc, char** argv) {
             int64_t p = 0;                 ///< its position
             int64_t produced = 0, max_new = 0;
             Clock::time_point t0;
+            // the slot's own conversation cache: the tokens its sessions hold (the prompt, then every token a window
+            // fed).  Kept when the request ends (`cached`), so the next turn of that conversation continues from it
+            // instead of reading its history again (see `slot_source` in the request path).
+            std::vector<int32_t> ids;
+            bool cached = false;           ///< idle, and its sessions still hold `ids`
+            bool cvec = true;              ///< the control vector setting `ids` were read with
+            bool img = false;              ///< the conversation has pictures (never reused from the slot)
+            // the checkpoint its prompt read took at the last turn boundary (the history before the new turn's
+            // header): a client's next turn renders the history again WITHOUT this reply's thinking, so it matches
+            // the slot's tokens only up to there - the slot's K/V up to it plus this state continue from it
+            std::vector<ConvCheckpoint> checks;
+            // a prompt read that gave way to a waiting request (BYIELD): `ids` is the part read so far, and the same
+            // request continues from it (the read goes on with the same chunks; `from0`: it had started at token 0)
+            bool partial = false, partial_from0 = false;
         };
         std::vector<BSlot> bs((size_t) std::max(o.batch, 0));
         // timing of the batch windows since the slots were last all idle (one stderr line then)
@@ -5662,15 +5717,55 @@ int main(int argc, char** argv) {
             }
             return true;
         };
-        // one batch window over slots [0, highest active], inactive slots below it fed a pad token at position 0
+        // slot b's sessions -> the main ones (the reverse of copy_to_slot): a request that continues the
+        // conversation an idle slot holds reads on from there.  Every stage, the same calls.
+        // `at`: one of the slot's checkpoints - only the K/V up to it is copied and its state restored instead
+        auto copy_from_slot = [&](int b, const ConvCheckpoint* at, std::string& e) -> bool {
+            const int64_t upto = at != nullptr ? (int64_t) at->ids.size() : (int64_t) bs[(size_t) b].ids.size();
+            if (at != nullptr && at->stage_parts.size() != stages.size()) { e = "a checkpoint without its stage parts"; return false; }
+            for (size_t k = 0; k < bslot_ss.size(); ++k) {
+                strata::core::SessionState& from = *bslot_ss[k][(size_t) b];
+                strata::core::SessionState& to = k == 0 ? ss : stages[k - 1]->ss;
+                const strata::core::OnDevice on_k(k == 0 ? 0 : stages[k - 1]->dev);
+                if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch slot restore: device sync failed"; return false; }
+                if (at != nullptr) {
+                    if (!strata::core::conversation_checkpoint_restore(k == 0 ? *at : at->stage_parts[k - 1], to, g, e))
+                        return false;
+                } else {
+                    strata::core::ConversationCheckpoint ck;
+                    ck.ids = bs[(size_t) b].ids;
+                    if (!strata::core::conversation_checkpoint_save(ck, from, g, e) ||
+                        !strata::core::conversation_checkpoint_restore(ck, to, g, e))
+                        return false;
+                }
+                for (int64_t j = 0; j < from.qsa_alloc; ++j) {
+                    strata::core::ConversationKv img;
+                    if (!strata::core::conversation_kv_save(img, from.qsa_states[from.qsa_ord0 + j], g, upto, true, e))
+                        return false;
+                    if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch slot restore: device sync failed"; return false; }
+                    if (!strata::core::conversation_kv_restore(img, to.qsa_states[to.qsa_ord0 + j], g, upto, true, e))
+                        return false;
+                }
+                if (cudaDeviceSynchronize() != cudaSuccess) { e = "batch slot restore: device sync failed"; return false; }
+            }
+            return true;
+        };
+        // one batch window over the active slots only (row t is the t-th active slot): an idle slot is not touched,
+        // so it keeps the conversation it holds
         auto batch_step = [&]() -> bool {
             int S = 0;
-            for (int b = 0; b < (int) bs.size(); ++b) if (bs[(size_t) b].active) S = b + 1;
-            if (S == 0) return true;
+            int rows[strata::kernels::kVerifyMaxT] = {};
             int32_t tok[strata::kernels::kVerifyMaxT] = {}, outb[strata::kernels::kVerifyMaxT] = {};
             int64_t pos[strata::kernels::kVerifyMaxT] = {};
-            for (int b = 0; b < S; ++b)
-                if (bs[(size_t) b].active) { tok[b] = bs[(size_t) b].x; pos[b] = bs[(size_t) b].p; }
+            for (int b = 0; b < (int) bs.size() && S < strata::kernels::kVerifyMaxT; ++b)
+                if (bs[(size_t) b].active) {
+                    rows[S] = b;
+                    tok[S] = bs[(size_t) b].x;
+                    pos[S] = bs[(size_t) b].p;
+                    ++S;
+                }
+            if (S == 0) return true;
+            const bool was_busy = strata::core::progress().busy.load();
             strata::core::progress().busy.store(true);
             drive.d.layers = 0;
             drive.d.experts = 0;
@@ -5682,7 +5777,7 @@ int main(int argc, char** argv) {
                 bt_miss0 = drive.d.multi_misses; bt_hits0 = drive.d.cache_hits; bt_pcie0 = drive.d.pcie_experts;
             }
             const Clock::time_point w0 = Clock::now();
-            if (!ver.run_slots(S, tok, pos, win_pool_fn, win_pool_user, outb, err) || drive.d.failed) {
+            if (!ver.run_slot_rows(rows, S, tok, pos, win_pool_fn, win_pool_user, outb, err) || drive.d.failed) {
                 std::printf("ERR %s\n", drive.d.failed && drive.d.fail ? drive.d.fail : err.c_str());
                 return false;
             }
@@ -5697,10 +5792,11 @@ int main(int argc, char** argv) {
             bt_commit += msd(w1, w2);
             ++bt_windows;
             bt_rows += S;
-            for (int b = 0; b < S; ++b) {
+            for (int t = 0; t < S; ++t) {
+                const int b = rows[t];
                 BSlot& sl = bs[(size_t) b];
-                if (!sl.active) continue;
-                const int32_t y = outb[b];
+                const int32_t y = outb[t];
+                sl.ids.push_back(sl.x);    // the window fed it: the slot's sessions hold it now
                 std::printf("BT %d %d\n", b, (int) y);
                 ++sl.produced;
                 const bool eos = std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) y) != o.eos_ids.end();
@@ -5710,6 +5806,7 @@ int main(int argc, char** argv) {
                     const double ms = std::chrono::duration<double, std::milli>(Clock::now() - sl.t0).count();
                     std::printf("BDONE %d %lld %s %.1f\n", b, (long long) sl.produced, fin, ms);
                     sl.active = false;
+                    sl.cached = o.prompt_cache > 0 && !sl.img;   // its sessions hold sl.ids for the next turn
                 } else {
                     sl.x = y;
                     sl.p += 1;
@@ -5717,7 +5814,7 @@ int main(int argc, char** argv) {
             }
             std::fflush(stdout);
             bt_emit += msd(w2, Clock::now());
-            strata::core::progress().busy.store(false);
+            strata::core::progress().busy.store(was_busy);
             if (!batch_on() && bt_windows > 0) {
                 const double w = (double) bt_windows, wall = msd(bt_start, Clock::now());
                 const double L = (double) g.n_layers;
@@ -5741,10 +5838,6 @@ int main(int argc, char** argv) {
         // ---- --batch-groups: the slot groups pipelined through the stages (--batch-groups G > 1 with a layer split)
         const int n_pipe = (int) stages.size() + 1;
         const bool piped = o.batch > 0 && o.batch_groups > 1 && n_pipe > 1;
-        if (o.batch > 0 && o.batch_groups > 1 && (o.batch % o.batch_groups != 0 || !piped)) {
-            std::fprintf(stderr, "strata serve: --batch-groups needs a layer split and to divide --batch\n");
-            return 1;
-        }
         const int GS = piped ? o.batch / o.batch_groups : o.batch;
         struct PGroup {
             bool inflight = false;
@@ -5792,10 +5885,12 @@ int main(int argc, char** argv) {
                     const bool eos = std::find(o.eos_ids.begin(), o.eos_ids.end(), (int64_t) y) != o.eos_ids.end();
                     const char* fin = eos ? "stop" : sl.stop ? "cancel" : sl.produced >= sl.max_new ? "length"
                                     : sl.p + 2 > o.max_context ? "length" : nullptr;
+                    sl.ids.push_back(sl.x);
                     if (fin != nullptr) {
                         const double ms = std::chrono::duration<double, std::milli>(Clock::now() - sl.t0).count();
                         std::printf("BDONE %d %lld %s %.1f\n", gi * GS + t, (long long) sl.produced, fin, ms);
                         sl.active = false;
+                        sl.cached = false;   // the pipeline's pad rows: a pipelined slot is not reused as a cache
                     } else {
                         sl.x = y;
                         sl.p += 1;
@@ -5825,9 +5920,10 @@ int main(int argc, char** argv) {
                     rr = pick + 1;
                     PGroup& G = pg[(size_t) pick];
                     for (int t = 0; t < GS; ++t) {
-                        const BSlot& sl = bs[(size_t) (pick * GS + t)];
+                        BSlot& sl = bs[(size_t) (pick * GS + t)];
                         G.tok[t] = sl.active ? sl.x : 0;
                         G.pos[t] = sl.active ? sl.p : 0;
+                        if (!sl.active) sl.cached = false;   // its pad row writes its state
                     }
                     G.inflight = true;
                     G.stage = 0;
@@ -5880,6 +5976,7 @@ int main(int argc, char** argv) {
                 if (b >= 0 && b < (int) bs.size()) bs[(size_t) b].stop = true;
                 continue;
             }
+            if (line.rfind("BYIELD", 0) == 0) continue;   // for a prompt read that has ended meanwhile
             if (line.rfind("VRAM", 0) == 0) {   // #533 (above): between requests, not a request
                 std::string verr;
                 if (batch_on()) verr = "VRAM: not while batch slots are decoding";
@@ -6119,9 +6216,32 @@ int main(int argc, char** argv) {
                         from_live = false;
                     }
             }
+            // --batch: an idle slot that holds the start of this prompt (the conversation it served last) is a
+            // source too - its sessions are copied back below, so only the new part is read
+            int slot_source = -1;
+            int64_t slot_tokens = 0;
+            bool resumed_from0 = false;   // a prompt read parked in a slot (BYIELD) that had started at token 0
+            const ConvCheckpoint* slot_ck = nullptr;   // the slot's checkpoint the prompt continues from (else its end)
+            if (o.prompt_cache > 0 && req_imgs.empty())
+                for (int b = 0; b < (int) bs.size(); ++b) {
+                    const BSlot& sl = bs[(size_t) b];
+                    if (sl.active || !sl.cached || sl.cvec != want_cvec) continue;
+                    if ((int64_t) sl.ids.size() > std::max(resume, slot_tokens) && starts_with(sl.ids, {})) {
+                        slot_source = b;
+                        slot_tokens = (int64_t) sl.ids.size();
+                        slot_ck = nullptr;
+                    }
+                    for (const ConvCheckpoint& c : sl.checks)
+                        if ((int64_t) c.ids.size() > std::max(resume, slot_tokens) && starts_with(c.ids, c.imgs)) {
+                            slot_source = b;
+                            slot_tokens = (int64_t) c.ids.size();
+                            slot_ck = &c;
+                        }
+                }
             const auto parked = conversations.best(ids, req_imgs, want_cvec);
             std::optional<strata::core::SavedConversation> incoming;
-            if (parked.tokens > resume) incoming.emplace(conversations.take(parked.index));
+            if (parked.tokens > std::max(resume, slot_tokens)) incoming.emplace(conversations.take(parked.index));
+            if (incoming) slot_source = -1;
             // Reject the entire image before parking/overwriting the outgoing
             // state. Invalid entries can safely fall back to its existing prefix.
             if (incoming && incoming->stage_images.size() != stages.size()) {
@@ -6147,10 +6267,47 @@ int main(int argc, char** argv) {
             }
             // Preserve the outgoing branch before any checkpoint rewind, reset,
             // or incoming restore overwrites the positional state it requires.
-            if ((!from_live || incoming) && !park_current(incoming ? incoming->bytes() : 0)) {
+            if ((!from_live || incoming || slot_source >= 0) && !park_current(incoming ? incoming->bytes() : 0)) {
                 std::printf("ERR %s\n", err.c_str());
                 return 1;
             }
+            if (slot_source >= 0) {
+                const auto t0 = Clock::now();
+                if (!copy_from_slot(slot_source, slot_ck, err)) {
+                    // the main session may be half written: read this prompt from the start
+                    std::fprintf(stderr, "strata batch: restoring slot %d failed (%s); reading the prompt\n",
+                                 slot_source, err.c_str());
+                    err.clear();
+                    live.clear();
+                    live_imgs.clear();
+                    checks.clear();
+                    resume = 0;
+                    from_live = false;
+                } else {
+                    checks.clear();   // the main session's checkpoints were of the conversation it held before
+                    // a read that gave way, the same request again (into its own slot): on with it - its segments and
+                    // checkpoints as if it had not stopped
+                    if (slot_ck == nullptr && bs[(size_t) slot_source].partial && admit_slot == slot_source) {
+                        resumed_from0 = bs[(size_t) slot_source].partial_from0;
+                        for (const ConvCheckpoint& c : bs[(size_t) slot_source].checks) checks.push_back(c);
+                        bs[(size_t) slot_source].partial = false;
+                    }
+                    if (slot_ck != nullptr) {
+                        live = slot_ck->ids;
+                        checks.push_back(*slot_ck);   // the main session's chain has it now
+                        checks.back().used = ++check_clock;
+                    } else {
+                        live = bs[(size_t) slot_source].ids;
+                    }
+                    live_imgs.clear();
+                    resume = slot_tokens;
+                    from_live = true;
+                    std::fprintf(stderr, "strata batch: slot %d gave back %lld tokens of this conversation (%s) in "
+                                 "%.1f ms\n", slot_source, (long long) slot_tokens,
+                                 slot_ck != nullptr ? "its turn checkpoint" : "all it holds",
+                                 std::chrono::duration<double, std::milli>(Clock::now() - t0).count());
+                }
+            }
             if (incoming) {
                 const auto t0 = Clock::now();
                 if (strata::core::conversation_snapshot_restore(*incoming, ss, g,
@@ -6462,6 +6619,99 @@ int main(int argc, char** argv) {
                 }
                 return true;
             };
+            // --batch: a prompt read while slots are decoding goes one prompt chunk at a time (the same chunks as one
+            // run: each run starts where the last ended, at a multiple of the chunk), and between two chunks the slots
+            // decode for a share of the time the chunk took (STRATA_BATCH_DECODE_SHARE, default 0.5), so a long
+            // prompt does not stop the others.  The slots' windows then see the cache without the slots this prompt
+            // borrowed (marked missing: those experts run on the CPU), never a prompt buffer.
+            static const double decode_share = [] {
+                const char* v = std::getenv("STRATA_BATCH_DECODE_SHARE");
+                return v != nullptr ? std::max(0.0, std::atof(v)) : 0.5;
+            }();
+            bool batch_fatal = false;
+            int64_t il_parts = 0;   // the slots' windows run between this prompt's chunks
+            double il_ms = 0;
+            int64_t yielded_at = -1;   // BYIELD: the read stopped here and its slot holds it
+            int yielded_slot = -1;
+            // `BYIELD <slot>` (the server: a shorter request is waiting): at the next chunk boundary the part read so
+            // far is copied into <slot> (this admission's own, or a free one the server reserved for a solo request),
+            // the request ends with `YIELDED <slot> <tokens>` + DONE cancel, and the server sends it again later: it
+            // continues from the slot with the same chunks.  #656's cooperative preemption, with a slot as the park.
+            auto read_part = [&](int64_t a0, int64_t b0, std::string& e) -> bool {
+                // (a layer split reads its stages as a pipeline over one run's chunks: in pieces only beside slots)
+                if (o.batch <= 0 || piped || (!stages.empty() && !batch_on())) return sp.run(ids.data() + a0, b0 - a0, a0, e);
+                const int64_t C = std::max<int64_t>(sp.chunk(), 1);
+                for (int64_t q = a0; q < b0;) {
+                    const int64_t r = std::min(b0, q + C);
+                    const auto tq = Clock::now();
+                    if (!sp.run(ids.data() + q, r - q, q, e)) return false;
+                    q = r;
+                    if (q >= b0) continue;
+                    int ys = -1;
+                    {   // a BSTOP that came meanwhile ends its slot at its next window; a BYIELD is for this read
+                        std::lock_guard<std::mutex> lk(in_mu);
+                        for (auto it = in_lines.begin(); it != in_lines.end();) {
+                            if (it->rfind("BSTOP ", 0) == 0) {
+                                const int b = std::atoi(it->c_str() + 6);
+                                if (b >= 0 && b < (int) bs.size()) bs[(size_t) b].stop = true;
+                                it = in_lines.erase(it);
+                            } else if (it->rfind("BYIELD ", 0) == 0) {
+                                ys = std::atoi(it->c_str() + 7);
+                                it = in_lines.erase(it);
+                            } else {
+                                ++it;
+                            }
+                        }
+                    }
+                    if (ys >= 0) {
+                        // only where the rest is read the same way after it (more than a chunk and more than a short
+                        // read left), text only, and into a slot that is not decoding
+                        const bool can = ys < (int) bs.size() && !bs[(size_t) ys].active &&
+                                         (admit_slot < 0 || ys == admit_slot) && req_imgs.empty() && o.prompt_cache > 0 &&
+                                         b0 - q > std::max<int64_t>(C, o.short_read);
+                        std::string ye;
+                        const auto ty = Clock::now();
+                        std::vector<int32_t> pre(ids.begin(), ids.begin() + q);
+                        if (can && copy_to_slot(ys, pre, ye)) {
+                            BSlot& sl = bs[(size_t) ys];
+                            sl = BSlot{};
+                            sl.ids = std::move(pre);
+                            sl.cached = true;
+                            sl.partial = true;
+                            sl.partial_from0 = read_from == 0 || resumed_from0;
+                            sl.cvec = cvec_cached;
+                            for (const ConvCheckpoint& c : checks)   // the root / periodic checkpoints of this read
+                                if ((int64_t) c.ids.size() <= q && std::equal(c.ids.begin(), c.ids.end(), ids.begin(),
+                                        [](int32_t x, int64_t y) { return (int64_t) x == y; }))
+                                    sl.checks.push_back(c);
+                            yielded_at = q;
+                            yielded_slot = ys;
+                            std::fprintf(stderr, "strata batch: the prompt read gives way at %lld of %lld tokens; slot %d "
+                                                 "holds it (copied in %.1f ms)\n", (long long) q, (long long) n, ys,
+                                         std::chrono::duration<double, std::milli>(Clock::now() - ty).count());
+                            e = "yield";
+                            return false;
+                        }
+                        if (can) bs[(size_t) ys].cached = false;   // half written
+                        std::fprintf(stderr, "strata batch: BYIELD %d not taken at %lld of %lld%s%s\n", ys, (long long) q,
+                                     (long long) n, ye.empty() ? "" : ": ", ye.c_str());
+                    }
+                    if (decode_share <= 0.0 || !batch_on()) continue;
+                    const double budget = decode_share * std::chrono::duration<double, std::milli>(Clock::now() - tq).count();
+                    const auto td = Clock::now();
+                    do {
+                        if (!batch_step()) { batch_fatal = true; e = "a batch window failed"; return false; }
+                    } while (batch_on() && std::chrono::duration<double, std::milli>(Clock::now() - td).count() < budget);
+                    ++il_parts;
+                    il_ms += std::chrono::duration<double, std::milli>(Clock::now() - td).count();
+                    if (trace) {
+                        std::fprintf(stderr, "strata trace: prompt chunk to %lld, then the slots decoded %.0f ms\n",
+                                     (long long) q, std::chrono::duration<double, std::milli>(Clock::now() - td).count());
+                        std::fflush(stderr);
+                    }
+                }
+                return true;
+            };
             apply_pending(true);
             // per-request sampling for the verify window's head (greedy when temperature is absent)
             strata::kernels::SamplerParams req_sp;
@@ -6511,7 +6761,7 @@ int main(int argc, char** argv) {
             // (PR #65, code-martin.)  Only for a system prompt of --prompt-cache-root tokens or more: a small one
             // is cheaper to read again than the extra part costs (~0.3 s).
             int64_t root_at = -1;
-            if (o.prompt_cache > 0 && o.turn_token >= 0 && o.prompt_cache_root > 0 && read_from == 0)
+            if (o.prompt_cache > 0 && o.turn_token >= 0 && o.prompt_cache_root > 0 && (read_from == 0 || resumed_from0))
                 for (int64_t i = 1; i < turn_at; ++i)
                     if (ids[(size_t) i] == o.turn_token) {
                         if (i >= o.prompt_cache_root) root_at = i;
@@ -6531,7 +6781,7 @@ int main(int argc, char** argv) {
                     return 1;
                 }
                 const auto tsp = Clock::now();
-                const bool sp_ok = win ? read_windows(at, to, err) : sp.run(ids.data() + at, to - at, at, err);
+                const bool sp_ok = win ? read_windows(at, to, err) : read_part(at, to, err);
                 if (trace) {
                     std::fprintf(stderr, "strata trace: read %lld tokens (%s) in %.1f ms\n", (long long) (to - at),
                                  win ? "windows" : "batched",
@@ -6539,7 +6789,7 @@ int main(int argc, char** argv) {
                     std::fflush(stderr);
                 }
                 if (!sp_ok) {
-                    if (!stop_req.load()) {
+                    if (yielded_at < 0 && (batch_fatal || !stop_req.load())) {
                         std::fprintf(stderr, "strata serve: %s\n", err.c_str());
                         std::printf("ERR %s\n", err.c_str());
                         // #224: a CUDA fault (an illegal address) poisons the context for the whole process, and
@@ -6565,6 +6815,9 @@ int main(int argc, char** argv) {
                 return 1;
             }
             tr("prompt done (slots refilled)");
+            if (il_parts > 0)
+                std::fprintf(stderr, "strata batch: the prompt was read in %lld parts, the slots decoding %.0f ms between "
+                                     "them\n", (long long) il_parts + 1, il_ms);
             const double prompt_ms = std::chrono::duration<double, std::milli>(Clock::now() - r0).count();
             std::printf("REUSED %lld\n", (long long) resume);   // the prompt is read; the first window comes next
             std::fflush(stdout);
@@ -6864,6 +7117,7 @@ int main(int argc, char** argv) {
             //      [prompt tokens read]   (#471: fewer than <prompt> - <reused> when a cancel stopped the read)
             //      [offloaded]   (#588: the decode's routed experts the GPU read over PCIe or another GPU computed;
             //                    not in [lookups])
+            if (yielded_at >= 0) std::printf("YIELDED %d %lld\n", yielded_slot, (long long) yielded_at);
             std::printf("DONE %lld %lld %.1f %.1f %s %lld %lld %lld %lld %lld %lld %lld %.1f %lld %lld\n",
                         (long long) produced_n,
                         (long long) n, prompt_ms, decode_ms, finish, (long long) draft_accepted, (long long) draft_offered,
@@ -6873,9 +7127,12 @@ int main(int argc, char** argv) {
                         (long long) req_offload);
             std::fflush(stdout);
             if (admit_slot >= 0) {   // --batch: BADM <slot> <1 = continues in the batch windows | 0 = done>
-                bool cont = !cancelled && produced_n == 1 && admit_max_new > 1 && std::strcmp(finish, "length") == 0;
+                bool cont = !cancelled && produced_n == 1 && admit_max_new > 1 && std::strcmp(finish, "length") == 0 &&
+                            (int64_t) live.size() == p;
+                const auto tc0 = Clock::now();
                 if (cont && !copy_to_slot(admit_slot, live, err)) {
                     std::fprintf(stderr, "strata serve: batch admission failed: %s\n", err.c_str());
+                    bs[(size_t) admit_slot].cached = false;   // its sessions may be half written
                     cont = false;
                 }
                 if (cont) {
@@ -6888,6 +7145,17 @@ int main(int argc, char** argv) {
                     sl.produced = 1;
                     sl.max_new = admit_max_new;
                     sl.t0 = Clock::now();
+                    sl.ids = live;
+                    sl.cvec = cvec_cached;
+                    sl.img = !live_imgs.empty();   // pictures: not matched again by tokens alone, so not cached
+                    const ConvCheckpoint* best = nullptr;
+                    for (const ConvCheckpoint& c : checks)
+                        if (c.ids.size() < live.size() && (best == nullptr || c.ids.size() > best->ids.size()) &&
+                            std::equal(c.ids.begin(), c.ids.end(), live.begin()))
+                            best = &c;
+                    if (best != nullptr && !sl.img) sl.checks.push_back(*best);
+                    std::fprintf(stderr, "strata batch: slot %d takes %lld tokens (copied in %.1f ms)\n", admit_slot,
+                                 (long long) live.size(), std::chrono::duration<double, std::milli>(Clock::now() - tc0).count());
                 }
                 std::printf("BADM %d %d\n", admit_slot, cont ? 1 : 0);
                 std::fflush(stdout);

From bebfca97a2f8a33c1044a2d3d35403bed6d49a98 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 01:18:02 +0200
Subject: [PATCH 177/201] #465 server: "parallel": N, slots in /metrics, one
 status per request, a long prompt gives way to a short one

- "parallel": N in the run config passes --batch N (a value the engine cannot use is said and passed on: the
  engine warns and adjusts); the server uses the slot count the engine reports (INFO batch_slots)
- every running request keeps its own status, rate window and engine figures (history rows are their own);
  /metrics live.slots shows each slot (idle with the tokens it holds, reading, decoding with tok/s),
  /v1/status concurrency.serving says N
- a conversation's next turn goes to the slot that holds its start, a new one to an empty or the least recently
  used slot; a slot left at a stop token keeps what it holds
- a long prompt read (solo or an admission) gives way (BYIELD) to a waiting request with a prompt under half as
  long, at most twice; the part read waits in a reserved slot and the request goes on once the other is in
- the engine start and POST /v1/vram are serialized against parallel requests
- serve/test_parallel.py: a scripted engine behind the real StrataEngine and Service

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/server.py        | 407 +++++++++++++++++++++++++++++++++--------
 serve/test_parallel.py | 351 +++++++++++++++++++++++++++++++++++
 2 files changed, 680 insertions(+), 78 deletions(-)
 create mode 100644 serve/test_parallel.py

diff --git a/serve/server.py b/serve/server.py
index 52c6593770c..15e8de13d18 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -398,6 +398,25 @@ class StrataEngine:
     """
     silence_s = ENGINE_SILENCE_S         # #481: main() sets the config's engine_silence_s (survives restart())
     silent_note = None                   # #481: why the server ended a silent engine (death_note says it)
+    batch = 0                            # --batch: the engine's batch slots (0: one request at a time)
+
+    # `last`: the figures of the engine's last DONE line.  With batch slots several requests run at once, each on its
+    # own thread, so each one reads its own request's figures (Service.run records them); one at a time, the one dict.
+    @property
+    def last(self):
+        if self.batch:
+            tl = self.__dict__.setdefault("_tl", threading.local())
+            if not hasattr(tl, "last"):
+                tl.last = {}
+            return tl.last
+        return self.__dict__.get("_last", {})
+
+    @last.setter
+    def last(self, value):
+        self.__dict__["_last"] = value
+        if self.batch:
+            tl = self.__dict__.setdefault("_tl", threading.local())
+            tl.last = value
 
     def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str | None = None,
                  env: dict | None = None, lazy: bool = False):
@@ -466,8 +485,13 @@ def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str |
         self.ended = False                              # READY: alive from here (restart() set it True, #344)
         # the engine's stdout on a thread, so a request can wait with a timeout (heartbeats, cancel checks)
         self.lines: queue.Queue = queue.Queue()
-        # --batch: concurrent requests in the engine's batch slots (see generate_batched)
-        self.batch = int(args[args.index("--batch") + 1]) if "--batch" in args else 0
+        # --batch: concurrent requests in the engine's batch slots (see generate_batched).  The engine says how many
+        # it runs (INFO batch_slots=N: it may have fewer than asked, or none, when they do not fit)
+        asked = next((int(args[args.index(k) + 1]) for k in ("--batch", "--slots") if k in args), 0)
+        self.batch = int(self.info.get("batch_slots") or 0)
+        if asked and self.batch != asked:
+            print(f"[strata] parallel requests: {asked} asked, the engine runs {self.batch or 'one at a time'} "
+                  "(its log says why)", flush=True)
         groups = int(args[args.index("--batch-groups") + 1]) if "--batch-groups" in args else 1
         groups = groups if self.batch and groups > 0 and self.batch % groups == 0 else 1
         gs = self.batch // groups if self.batch else 0
@@ -475,8 +499,16 @@ def __init__(self, exe: str, args: list[str], cwd: str | None = None, log: str |
         self.slot_order = [g * gs + t for t in range(gs) for g in range(groups)]
         self.slot_q = [queue.Queue() for _ in range(self.batch)]
         self.slot_busy = [False] * self.batch
+        # what each slot's sessions hold (prompt + every token a window fed), so a conversation's next turn goes to
+        # the slot that has its start (the engine checks it again); when the slot was last used
+        self.slot_held: list[list[int]] = [[] for _ in range(self.batch)]
+        self.slot_used = [0.0] * self.batch
+        self.slot_live: list[dict | None] = [None] * self.batch   # /metrics: the request in each slot
         self.slot_cv = threading.Condition()
         self.waiting = 0                                # requests waiting for the control lines (ctl)
+        self.wait_lens: list[list[int]] = []            # ... their prompt lengths (a long read gives way to short ones)
+        self.ctl_epoch = 0                              # how often the control lines were taken
+        self._yielded = None                            # (slot, tokens read): the last request on them gave way
         self.ctl = threading.Lock()                     # one admission or solo request on the control lines at a time
         self.wlock = threading.Lock()                   # stdin writes from several request threads
         self.pump = threading.Thread(target=self._pump, daemon=True)
@@ -719,6 +751,10 @@ def _control(self, cancel, on_token, stop_when=None):
                 f = line.split()
                 self._ctl_result = ("badm", len(f) >= 3 and f[2] == "1")
                 return
+            elif line.startswith("YIELDED "):            # the read gave way (BYIELD): <slot> <tokens read>
+                f = line.split()
+                if len(f) >= 3 and f[1].lstrip("-").isdigit() and f[2].isdigit():
+                    self._yielded = (int(f[1]), int(f[2]))
             elif line.startswith("ERR"):
                 raise ValueError(line[4:].strip())
             if line.startswith("DONE") and self._ctl_mode == "solo":
@@ -742,61 +778,107 @@ def _drain_control(self, until: str, timeout: float = 300.0):
                 return line
         return None
 
-    def _release_slot_when_done(self, slot: int):
-        """A slot whose consumer left: BSTOP it and free it once the engine says BDONE (in the background)."""
+    def _release_slot_when_done(self, slot: int, stream: list[int] | None = None):
+        """A slot whose consumer left (a stop token, a stop string, a disconnect): BSTOP it and free it once the engine
+        says BDONE (in the background).  `stream`: the prompt and every token of it so far - with the tokens still to
+        come before BDONE, all but the last are what the slot holds then (the next turn of its conversation)."""
         try:
             self._send(f"BSTOP {slot}")
         except EngineDied:
             pass
         def wait():
             end = time.monotonic() + 600.0
+            tail = list(stream or [])
             while time.monotonic() < end:
                 try:
                     line = self.slot_q[slot].get(timeout=5.0)
                 except queue.Empty:
                     continue
-                if line is None or line.startswith("BDONE "):
+                if line is None:
+                    tail = []
+                    break
+                if line.startswith("BT "):
+                    try:
+                        tail.append(int(line.split()[2]))
+                    except (IndexError, ValueError):
+                        tail = []
+                if line.startswith("BDONE "):
                     break
+            self.slot_held[slot] = tail[:-1] if stream and tail else []
             with self.slot_cv:
                 self.slot_busy[slot] = False
                 self.slot_cv.notify_all()
         threading.Thread(target=wait, daemon=True).start()
 
+    YIELDS_MAX = 2   # #656: how often one request's prompt read gives way to a shorter waiting one
+
+    def _take_control(self, cancel, plen: int, after_epoch: int | None = None):
+        """Waits for the control lines (one prompt read at a time), yielding None heartbeats; False when cancelled.
+        `after_epoch`: a request whose read gave way lets the requests waiting then go first."""
+        entry = [plen]
+        with self.slot_cv:
+            self.waiting += 1
+            self.wait_lens.append(entry)
+        beat = time.monotonic()
+        try:
+            while True:
+                with self.slot_cv:
+                    turn = after_epoch is None or self.ctl_epoch > after_epoch or self.waiting <= 1
+                if turn and self.ctl.acquire(timeout=0.5):
+                    break
+                if not turn:
+                    with self.slot_cv:
+                        self.slot_cv.wait(timeout=0.5)
+                if cancel.is_set():
+                    return False
+                if time.monotonic() - beat >= 10.0:     # a heartbeat every 10 s, as the engine's own wait
+                    beat = time.monotonic()
+                    yield None
+        finally:
+            with self.slot_cv:
+                self.waiting -= 1
+                self.wait_lens.remove(entry)
+        with self.slot_cv:
+            self.ctl_epoch += 1
+            self.slot_cv.notify_all()
+        return True
+
+    def _shorter_waiting(self, plen: int) -> bool:
+        """#656: someone waits for the control lines with a prompt under half this one's: worth giving way to."""
+        with self.slot_cv:
+            return any(e[0] * 2 <= plen for e in self.wait_lens)
+
     def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
         """--batch.  Alone (no slot busy, nobody waiting): the solo path (GEN, with drafts: the fastest stream)
         - and when another request arrives meanwhile, this one is STOPped and continues in a batch slot (BGEN with
         its prompt + what it generated: the engine reuses that prefix).  Otherwise: BGEN into a free slot, then the
         slot's own BT lines until BDONE.  Several requests run at once; the control lines (prompt reading, admission)
-        are taken one request at a time.  A consumer that stops early leaves the engine in step: the solo request is
-        STOPped and read to its DONE, an admission to its BADM, a slot is BSTOPped and freed at its BDONE."""
+        are taken one request at a time - and a long prompt read gives way at a chunk boundary to a waiting request
+        with a much shorter prompt (#656: `BYIELD <slot>`; the part read waits in a slot and the read goes on after).
+        A consumer that stops early leaves the engine in step: the solo request is STOPped and read to its DONE, an
+        admission to its BADM, a slot is BSTOPped and freed at its BDONE."""
         self.progress = None
         keys = self.sampling_keys(sampling or {})
         out: list[int] = []
         pending: list[int] = []
-        with self.slot_cv:
-            self.waiting += 1
-        try:
-            while not self.ctl.acquire(timeout=10.0):
-                if cancel.is_set():
-                    return
-                yield None
-        finally:
-            with self.slot_cv:
-                self.waiting -= 1
+        prompt, left = list(ids), int(max_new)
+        ok = yield from self._take_control(cancel, len(prompt))
+        if not ok:
+            return
         holding = True
         btrace("ctl acquired")
-        slot = None
+        slot, gen0, reserved = None, None, None
         phase = "none"            # solo -> (admit -> slot) ; "done" once the engine has finished with this request
         stop_sent = False
+        yields = 0
         try:
             with self.slot_cv:
                 alone = not any(self.slot_busy) and self.waiting == 0
-            prompt, left = list(ids), int(max_new)
             if alone and left > 1:
                 head = f"GENI {left}{keys} {embeddings}" if embeddings else f"GEN {left}{keys}"
                 self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
                 phase = "solo"
-                self._ctl_mode, self._ctl_result = "solo", None
+                self._ctl_mode, self._ctl_result, self._yielded = "solo", None, None
                 def others():
                     with self.slot_cv:
                         return self.waiting > 0
@@ -806,46 +888,95 @@ def others():
                         out.append(t)
                         yield t
                     if x is None:                       # a heartbeat (False: a token, flushed above)
+                        if (reserved is None and not out and not embeddings and yields < self.YIELDS_MAX and
+                                self._shorter_waiting(len(prompt))):
+                            with self.slot_cv:          # the slot the part read will wait in
+                                reserved = self.pick_slot(prompt)
+                                if reserved is not None:
+                                    self.slot_busy[reserved] = True
+                            if reserved is not None:
+                                self._send(f"BYIELD {reserved}")
                         yield None
                 phase = "none"                          # its DONE is read
                 while pending:
                     t = pending.pop(0)
                     out.append(t)
                     yield t
-                finish = (self.last or {}).get("finish") if isinstance(self.last, dict) else None
-                left = int(max_new) - len(out)
-                if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
-                    return
-                prompt = list(ids) + out                # promoted: it continues in a batch slot from here
-            # a free slot (they free themselves at BDONE, which needs no control lines)
-            with self.slot_cv:
-                while True:
-                    slot = next((b for b in self.slot_order if not self.slot_busy[b]), None)
-                    if slot is not None:
-                        self.slot_busy[slot] = True
-                        break
-                    self.slot_cv.wait(timeout=10.0)
-                    if cancel.is_set():
+                if self._yielded is not None and reserved is not None and self._yielded[0] == reserved:
+                    slot, reserved = reserved, None     # gave way: the read goes on in that slot (below)
+                elif reserved is not None:              # it did not give way: the slot is free again
+                    with self.slot_cv:
+                        self.slot_busy[reserved] = False
+                        self.slot_cv.notify_all()
+                    reserved = None
+                if slot is None:
+                    finish = (self.last or {}).get("finish") if isinstance(self.last, dict) else None
+                    left = int(max_new) - len(out)
+                    if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
                         return
-            while not self.slot_q[slot].empty():
-                self.slot_q[slot].get_nowait()
-            head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
-            self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
-            phase = "admit"
-            self._ctl_mode, self._ctl_result = "batch", None
-            for x in self._control(cancel, pending.append):
+                    prompt = list(ids) + out            # promoted: it continues in a batch slot from here
+            while True:
+                if slot is None:
+                    # a free slot (they free themselves at BDONE, which needs no control lines): the one that holds
+                    # the start of this prompt (its conversation's last turn), else the one used longest ago
+                    with self.slot_cv:
+                        while True:
+                            slot = self.pick_slot(prompt)
+                            if slot is not None:
+                                self.slot_busy[slot] = True
+                                break
+                            self.slot_cv.wait(timeout=10.0)
+                            if cancel.is_set():
+                                return
+                if self._yielded is not None:           # it gave way: the others waiting then go first
+                    self.slot_held[slot] = list(prompt[:self._yielded[1]])
+                    self._yielded = None
+                    yields += 1
+                    self.ctl.release()
+                    holding = False
+                    with self.slot_cv:
+                        epoch = self.ctl_epoch
+                    ok = yield from self._take_control(cancel, len(prompt), after_epoch=epoch)
+                    if not ok:
+                        return
+                    holding = True
+                while not self.slot_q[slot].empty():
+                    self.slot_q[slot].get_nowait()
+                head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
+                live = {"slot": slot, "state": "reading", "prompt_tokens": len(prompt), "generated": 0,
+                        "started": time.time(), "first_token": None}
+                self.slot_live[slot] = live
+                self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+                self.slot_held[slot] = []               # the admission overwrites what the slot held
+                phase = "admit"
+                self._ctl_mode, self._ctl_result, self._yielded = "batch", None, None
+                asked = False
+                for x in self._control(cancel, pending.append):
+                    while pending:
+                        t = pending.pop(0)
+                        out.append(t)
+                        yield t
+                    if x is None:
+                        if (not asked and not embeddings and yields < self.YIELDS_MAX and
+                                self._shorter_waiting(len(prompt))):
+                            self._send(f"BYIELD {slot}")
+                            asked = True
+                        yield None
+                cont = bool(self._ctl_result and self._ctl_result[1])
+                phase = "slot" if cont else "none"
                 while pending:
-                    yield pending.pop(0)
-                if x is None:
-                    yield None
-            cont = bool(self._ctl_result and self._ctl_result[1])
-            phase = "slot" if cont else "none"
-            while pending:
-                yield pending.pop(0)
+                    t = pending.pop(0)
+                    out.append(t)
+                    yield t
+                if not cont and self._yielded is not None and self._yielded[0] == slot and not cancel.is_set():
+                    continue                            # gave way: again once the shorter request is in
+                break
             self.ctl.release()
             holding = False
             if not cont:
                 return
+            live.update(state="decoding", first_token=time.time(), generated=len(out))
+            gen0 = len(out) - 1                         # the admission's own token: the slot feeds it first
             while True:
                 try:
                     line = self.slot_q[slot].get(timeout=10.0)
@@ -859,17 +990,23 @@ def others():
                     phase = "none"
                     raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
                 if line.startswith("BT "):
+                    t = int(line.split()[2])
+                    out.append(t)
+                    live["generated"] = len(out)
                     if cancel.is_set():
                         if not stop_sent:
                             self._send(f"BSTOP {slot}")
                             stop_sent = True
                         continue
-                    yield int(line.split()[2])
+                    yield t
                 elif line.startswith("BDONE "):
                     phase = "none"
                     f = line.split()
                     if len(f) >= 5 and isinstance(self.last, dict):
-                        self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4])}
+                        self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4]),
+                                     "generated": int(f[2]) if f[2].isdigit() else self.last.get("generated")}
+                    # what the slot's sessions hold now: the prompt and every token fed (all but the last one)
+                    self.slot_held[slot] = list(prompt) + out[gen0:-1] if len(out) > gen0 else []
                     return
         finally:
             # a consumer that left early (or an error): keep the engine and this server in step
@@ -886,14 +1023,51 @@ def others():
                 pass
             if holding:
                 self.ctl.release()
+            if reserved is not None:
+                with self.slot_cv:
+                    self.slot_busy[reserved] = False
+                    self.slot_cv.notify_all()
             if slot is not None:
+                self.slot_live[slot] = None
+                self.slot_used[slot] = time.time()
                 if phase == "slot":
-                    self._release_slot_when_done(slot)    # freed at its BDONE
+                    self.slot_held[slot] = []
+                    stream = list(prompt) + out[gen0:] if gen0 is not None and len(out) > gen0 else None
+                    self._release_slot_when_done(slot, stream)    # freed at its BDONE
                 else:
                     with self.slot_cv:
                         self.slot_busy[slot] = False
                         self.slot_cv.notify_all()
 
+    def pick_slot(self, prompt: list[int]) -> int | None:
+        """A free slot for `prompt` (the caller holds slot_cv): the one whose held tokens are the longest start of the
+        prompt (the engine then reads only the rest), else an empty one, else the one used longest ago - so the
+        conversations other slots hold stay for their next turns.  None: every slot is busy."""
+        free = [b for b in self.slot_order if not self.slot_busy[b]]
+        if not free:
+            return None
+        def held_prefix(b):
+            h = self.slot_held[b]
+            return len(h) if h and len(h) < len(prompt) and prompt[:len(h)] == h else 0
+        best = max(free, key=held_prefix)
+        if held_prefix(best) > 0:
+            return best
+        return min(free, key=lambda b: (bool(self.slot_held[b]), self.slot_used[b]))
+
+    def slots_view(self) -> list[dict]:
+        """/metrics: each batch slot - idle (with the tokens it holds for a next turn), reading or decoding."""
+        now, view = time.time(), []
+        for b in range(self.batch):
+            r = self.slot_live[b]
+            if r is None:
+                view.append({"slot": b, "state": "idle", "held_tokens": len(self.slot_held[b])})
+                continue
+            ft = r.get("first_token")
+            view.append({"slot": b, "state": r["state"], "prompt_tokens": r["prompt_tokens"],
+                         "generated": r["generated"], "elapsed_s": round(now - r["started"], 1),
+                         "tok_s": round(r["generated"] / max(1e-6, now - ft), 1) if ft else None})
+        return view
+
     def generate(self, ids, max_new, sampling, cancel, embeddings=None):
         """Yields token ids, and None as a heartbeat every 10 s while the engine is quiet (reading a long prompt):
         the HTTP layer turns it into an SSE comment, which keeps clients' watchdogs calm and notices a client that
@@ -1263,9 +1437,34 @@ def engine_args(cfg: dict) -> list[str]:
         seg = cfg.get("vram_segment_mib")
         if isinstance(seg, int) and not isinstance(seg, bool) and seg > 0 and "--vram-segment-mib" not in args:
             args += ["--vram-segment-mib", str(seg)]
+    args += parallel_args(cfg, args)
     return learned_profile_args(cfg, args)
 
 
+PARALLEL_MAX = 8      # the engine's batch window holds at most 8 rows (kVerifyMaxT)
+
+
+def parallel_args(cfg: dict, args: list[str]) -> list[str]:
+    """#465 (opt-in): "parallel": N in the config - up to N requests decode together in the engine's batch slots
+    (--batch N); more wait their turn.  1 or absent: one request at a time, as before.  A value the engine cannot use
+    is said and passed on: the engine warns and adjusts (recommend, never force)."""
+    if "--batch" in args or "--slots" in args:
+        return []
+    n = cfg.get("parallel")
+    if n is None or n is False:
+        return []
+    if isinstance(n, bool) or not isinstance(n, int):
+        print(f'[strata] "parallel" must be a whole number of requests (2..{PARALLEL_MAX}), not {n!r}: ignored',
+              flush=True)
+        return []
+    if n <= 1:
+        return []
+    if n > PARALLEL_MAX:
+        print(f'[strata] "parallel": {n} - the engine runs at most {PARALLEL_MAX} requests together; it will use '
+              f"{PARALLEL_MAX}", flush=True)
+    return ["--batch", str(n)]
+
+
 def profile_shape(path: str) -> tuple[int, int] | None:
     """An expert profile's (layers, experts per layer), from its header (tools/make_profile.py's format), or None
     when the file is missing, is not one or is shorter than the pairs its header promises."""
@@ -1441,6 +1640,9 @@ def __init__(self, engine: Engine, tokenizer, template: ChatTemplate, model_name
         self.host_names: set[str] = set(LOOPBACK_NAMES)
         self.status = {"busy": False, "queued": 0}      # GET /status: what the model is doing right now
         self.rate = collections.deque(maxlen=32)        # (time, generated) samples for the live tok/s window
+        # "parallel" (the engine's batch slots): every running request's own status and rate window; self.status
+        # then says busy while any runs and shows the newest one
+        self.live_reqs: dict[int, tuple[dict, collections.deque]] = {}
         # #332: the API request monitor (/api-monitor) keeps the last 100 requests' prompts and answers in memory,
         # so it is off unless the config's "api_monitor" (or --api-monitor) turns it on
         self.api_monitor = False
@@ -1581,6 +1783,12 @@ def vram(self, reserve_mib: int | None) -> dict:
             raise ValueError("this engine cannot resize its VRAM use")
         if not self.fifo.acquire(timeout=self.vram_wait_s):
             raise ModelBusy("a request is still running; try again when it has finished")
+        # parallel requests do not hold the fifo: the engine's control lines (a prompt being admitted) are taken too,
+        # and the engine refuses a resize while a slot decodes
+        ctl = getattr(self.engine, "ctl", None) if getattr(self.engine, "batch", 0) else None
+        if ctl is not None and not ctl.acquire(timeout=self.vram_wait_s):
+            self.fifo.release()
+            raise ModelBusy("a request is still running; try again when it has finished")
         try:
             if not self.loaded():
                 self.vram_reserve = reserve_mib
@@ -1592,6 +1800,8 @@ def vram(self, reserve_mib: int | None) -> dict:
                   f"{out.get('expert_cache_full_mib')} MiB ({out.get('expert_slots')} experts)", flush=True)
             return {"status": "ok", **out}
         finally:
+            if ctl is not None:
+                ctl.release()
             self.fifo.release()
 
     def _say_died(self, e: Exception) -> None:
@@ -1707,10 +1917,19 @@ def start_telemetry(self):
                                        amd=getattr(self, "backend", None) == "hip")
 
     def _tok_s(self):
-        """tok/s over the last RATE_WINDOW_S seconds.  Returns 0.0 while nothing is generating."""
+        """tok/s over the last RATE_WINDOW_S seconds.  Returns 0.0 while nothing is generating.  With parallel requests:
+        the sum of theirs."""
+        with self.status_lock:
+            many = [(dict(st), list(rt)) for st, rt in self.live_reqs.values()]
+        if many:
+            return sum(self._rate_of(st, rt) for st, rt in many)
         with self.status_lock:
             s = dict(self.status)
             rate = list(self.rate)
+        return self._rate_of(s, rate)
+
+    @staticmethod
+    def _rate_of(s, rate):
         if not s.get("busy") or not s.get("first_token"):
             return 0.0
         now = time.time()
@@ -1723,10 +1942,9 @@ def _tok_s(self):
     def _tok_s_mean(self):
         """The whole-request mean since the first token (the old formula), kept so the two can be compared."""
         with self.status_lock:
-            s = dict(self.status)
-        if not s.get("busy") or not s.get("first_token"):
-            return 0.0
-        return s["generated"] / max(1e-6, time.time() - s["first_token"])
+            many = [dict(st) for st, _ in self.live_reqs.values()] or [dict(self.status)]
+        return sum(s["generated"] / max(1e-6, time.time() - s["first_token"]) for s in many
+                   if s.get("busy") and s.get("first_token"))
 
     def _prefill_tok_s_mean(self):
         """Engine-reported mean over newly read tokens, excluding the cached prefix."""
@@ -1770,6 +1988,8 @@ def metrics(self, all_requests=False) -> dict:
         the hardware (with a minute of history per series)."""
         with self.status_lock:
             s = dict(self.status)
+            if self.live_reqs:                          # parallel requests: the newest one's status
+                s = {**s, **dict(list(self.live_reqs.values())[-1][0]), "queued": s.get("queued", 0)}
             hist = list(self.history)
             totals = dict(self.totals)
         now = time.time()
@@ -1793,6 +2013,17 @@ def metrics(self, all_requests=False) -> dict:
                 "tok_s_window_s": RATE_WINDOW_S if state == "generating" else None}
         if state == "reading" and progress:
             live["prompt_read"], live["prompt_total"] = progress
+        par = int(getattr(self.engine, "batch", 0) or 0)
+        if par:                                         # #465: the requests running together, slot by slot
+            with self.status_lock:
+                running = len(self.live_reqs)
+            waiting = int(getattr(self.engine, "waiting", 0) or 0)
+            slots = self.engine.slots_view() if hasattr(self.engine, "slots_view") else []
+            busy_slots = sum(1 for x in slots if x["state"] != "idle")
+            live.update(parallel=par, running=running, slots=slots,
+                        waiting_for_slot=max(0, running - busy_slots) if running > busy_slots else waiting)
+            if running and state == "idle":
+                live["state"] = "generating"
         engine = {"model": self.model, "max_context": self.engine.max_context, "images": self.vision is not None,
                   **dict(getattr(self.engine, "info", {}) or {})}
         tel = self.telemetry.snapshot() if getattr(self, "telemetry", None) else {"now": {}, "history": {}, "static": {}}
@@ -1827,7 +2058,9 @@ def scaled(v, unit, digits=0):
             "started": int(self.started_at), "uptime_s": int(time.time() - self.started_at),
             "cache_max_tokens": ctx,
             "context": {"native": ctx, "max_positions": ctx},
-            "concurrency": {"serving": 1, "requested": 1},       # one request at a time; more wait their turn
+            # one request at a time (more wait their turn), or "parallel": N batch slots (#465)
+            "concurrency": {"serving": max(1, int(getattr(self.engine, "batch", 0) or 0)),
+                            "requested": max(1, int(getattr(self.engine, "batch", 0) or 0))},
             "dialects": ["/v1/chat/completions", "/v1/messages", "/v1/responses"],
             "vision": {"enabled": images, "available": images, "error": None},
             "activity": {"requests": totals["requests"] + int(busy), "in_flight": int(busy) + int(s.get("queued") or 0),
@@ -1934,13 +2167,13 @@ def prepare(self, messages, tools, kwargs, max_new=None):
             max_new = max(1, room)          # --fit-max-tokens: a shorter completion beats a 400
         return ids, kwargs.get("enable_thinking", True) is not False, max_new
 
-    def _note(self, n, evs):
+    def _note(self, n, evs, st=None, rate=None):
         with self.status_lock:
-            s = self.status
+            s = self.status if st is None else st
             s["generated"] = n
             if s.get("first_token") is None:
                 s["first_token"] = time.time()
-            self.rate.append((time.time(), n))          # the live rate's window over the last RATE_WINDOW_S
+            (self.rate if rate is None else rate).append((time.time(), n))   # the live rate's window (RATE_WINDOW_S)
             for ev in evs:
                 if ev.kind == "reasoning":
                     s["phase"] = "thinking"
@@ -1952,13 +2185,13 @@ def _note(self, n, evs):
                     s["phase"] = "tool call complete"
                 s["tail"] = ((s.get("tail") or "") + (ev.text or ""))[-600:]
 
-    def _progress(self, last_print, every=1.0):
+    def _progress(self, last_print, every=1.0, st=None):
         """A progress line in the server window every `every` seconds while a request runs."""
         now = time.time()
         if now - last_print < every:
             return last_print
         with self.status_lock:
-            s = dict(self.status)
+            s = dict(self.status if st is None else st)
         el = now - s.get("started", now)
         if s.get("first_token") is None:
             pr = getattr(self.engine, "progress", None)   # (position reached, prompt tokens): a reused prefix counts
@@ -1989,6 +2222,11 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
         engine_last0 = getattr(self.engine, "last", None)
         trace = getattr(self.request_trace, "record", None)
         waiting = time.perf_counter()
+        # #465: with "parallel" (the engine's batch slots) requests run at once: each keeps its own status and rate
+        # window (self.status says busy while any runs); one at a time they are self.status / self.rate, as before
+        par = bool(getattr(self.engine, "batch", 0))
+        st = {} if par else self.status
+        rate = collections.deque(maxlen=32) if par else self.rate
         with self.status_lock:
             self.status["queued"] += 1
         try:
@@ -2001,13 +2239,18 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                             trace["state"] = "generating"
                         self.status["queued"] -= 1
                     # issue #27: it died in an earlier request (or was unloaded) - start it again instead of failing
-                    self.ensure_loaded()
+                    # (parallel requests do not hold the fifo: one of them starts it, the others wait for that)
+                    with (self.fifo if par else contextlib.nullcontext()):
+                        self.ensure_loaded()
                     with self.status_lock:
-                        self.status.update(busy=True, phase="reading the prompt", prompt_tokens=len(ids),
-                                           generated=0, started=time.time(), first_token=None, tool=None, tail="",
-                                           max_tokens=max_new)
+                        st.update(busy=True, phase="reading the prompt", prompt_tokens=len(ids),
+                                  generated=0, started=time.time(), first_token=None, tool=None, tail="",
+                                  max_tokens=max_new)
+                        if par:
+                            self.live_reqs[id(st)] = (st, rate)
+                            self.status.update(st)
                         self.last_request_at = time.time()
-                        self.rate.clear()               # the previous request's samples must not leak into this one
+                        rate.clear()                    # the previous request's samples must not leak into this one
                     before = getattr(self.engine, "last", None)
                     last_print = time.time()
                     prompt, thought = ids, 0            # thought: the reasoning tokens so far (the budget's count)
@@ -2018,7 +2261,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                         try:
                             for t in gen:
                                 if t is None:               # heartbeat while the engine is quiet
-                                    last_print = self._progress(last_print)
+                                    last_print = self._progress(last_print, st=st)
                                     yield "ping", None
                                     continue
                                 n += 1
@@ -2038,8 +2281,8 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                     repeated = True     # #606: a degenerate output, not an answer: end it here
                                     break
                                 evs = parser.feed(detok.push(t))
-                                self._note(n, evs)
-                                last_print = self._progress(last_print)
+                                self._note(n, evs, st, rate)
+                                last_print = self._progress(last_print, st=st)
                                 for ev in evs:
                                     yield "event", ev
                                 if budget and parser.state == "reasoning":
@@ -2085,7 +2328,7 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                             raw_ids.append(t)
                             thinking_n += parser.state == "reasoning"
                             evs = parser.feed(detok.push(t))
-                            self._note(n, evs)
+                            self._note(n, evs, st, rate)
                             for ev in evs:
                                 yield "event", ev
                         prompt = prompt + seg + extra
@@ -2103,12 +2346,12 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                     # #266: settle this request's status, history and totals while still holding the fifo: once
                     # it is released the next request sets its own status, which this must not record or clear
                     with self.status_lock:
-                        if self.status.get("busy"):
+                        if st.get("busy"):
                             # only this request's DONE counts: same object means no DONE arrived (death, error,
                             # disconnect)
                             last = dict(getattr(self.engine, "last", {}) or {}) \
                                 if getattr(self.engine, "last", None) is not engine_last0 else {}
-                            started = self.status.get("started", time.time())
+                            started = st.get("started", time.time())
                             cvec = (getattr(self.engine, "info", {}) or {}).get("cvec", 0)
                             loaded = str(cvec) not in ("0", "", "None")
                             hit_rate = round(last["hits"] / last["lookups"], 3) if last.get("lookups") else None
@@ -2149,8 +2392,8 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                 self.last_timings = dict(timings, at=int(time.time())) if timings else None
                             self.last_request_at = time.time()
                             now = time.time()
-                            el = now - self.status.get("started", now)
-                            ft = self.status.get("first_token")
+                            el = now - st.get("started", now)
+                            ft = st.get("first_token")
                             rate = n / max(1e-6, now - ft) if ft else 0.0
                             hit_msg = f", expert cache {hit_rate*100:.1f}% hit" if hit_rate is not None else ""
                             if hit_msg and pcie_share:
@@ -2163,9 +2406,17 @@ def run(self, ids, thinking, tools, max_new, sampling, cancel) -> Iterator[tuple
                                       "strata-<model>.json for every request) leaves room to answer", flush=True)
                             if os.environ.get("STRATA_DEBUG") and raw_ids:
                                 print(f"[strata] raw: {self.tok.decode(raw_ids)!r}", flush=True)
-                        self.status["busy"] = False
-                        self.status.pop("tail", None)            # #212: the answer's end is not kept once it is done
-                        self.status.pop("tool", None)
+                        st["busy"] = False
+                        st.pop("tail", None)                     # #212: the answer's end is not kept once it is done
+                        st.pop("tool", None)
+                        if par:
+                            self.live_reqs.pop(id(st), None)
+                            if self.live_reqs:              # the newest request still running
+                                self.status.update(list(self.live_reqs.values())[-1][0])
+                            else:
+                                self.status.update(busy=False)
+                                self.status.pop("tail", None)
+                                self.status.pop("tool", None)
         finally:
             if emb:
                 Path(emb).unlink(missing_ok=True)
diff --git a/serve/test_parallel.py b/serve/test_parallel.py
new file mode 100644
index 00000000000..7369ee8c051
--- /dev/null
+++ b/serve/test_parallel.py
@@ -0,0 +1,351 @@
+"""#465: "parallel": N - several requests decode together in the engine's batch slots (--batch N).
+
+A fake engine (a Python script speaking the engine's GEN / BGEN / BT / BDONE / BADM / BSTOP lines) runs behind the
+real StrataEngine and Service, so the server's side is tested without a GPU: requests up to N run at once, more
+wait for a slot, /metrics shows the slots, each request's history row is its own, and a conversation's next turn
+goes back to the slot that holds it."""
+import json
+import sys
+import tempfile
+import threading
+import time
+import unittest
+import urllib.request
+from pathlib import Path
+from unittest import mock
+
+from serve.frontend import ChatTemplate
+from serve.server import ByteTokenizer, Service, StrataEngine, engine_args, parallel_args, serve
+
+# The fake engine: one token every STEP seconds per active slot (a "window" serves every active slot at once);
+# GEN (solo) streams T lines; BGEN reads the prompt (one T line, DONE), answers BADM and continues in the slot.
+# Every reply is the bytes of "ok, done." then <|im_end|> (ByteTokenizer: 257).
+FAKE_BATCH = r'''import queue, sys, threading, time
+args = sys.argv[1:]
+slots = int(args[args.index("--batch") + 1]) if "--batch" in args else 0
+fit = int(args[args.index("--fit") + 1]) if "--fit" in args else slots
+STEP = 0.02
+CH = 32
+lines, stop = queue.Queue(), threading.Event()
+def reader():
+    for l in sys.stdin:
+        l = l.strip()
+        if l == "STOP":
+            stop.set()
+        else:
+            lines.put(l)
+    lines.put(None)
+threading.Thread(target=reader, daemon=True).start()
+print("INFO engine=0.1.39" + (f" batch_slots={fit}" if fit >= 2 else ""), flush=True)
+print("READY 4096 stop", flush=True)
+R = list(b"ok, done.") + [257]
+def reply(ids):            # the rest of R after what the prompt already ends with (a request continued in a slot)
+    ids = [int(x) for x in ids]
+    k = max(k for k in range(len(R)) if k == 0 or ids[-k:] == R[:k])
+    return R[k:]
+active = {}          # slot -> [tokens left, max_new, produced]
+def window():        # one batch window: every active slot one token
+    for b in sorted(active):
+        left, max_new, produced = active[b]
+        t = left.pop(0) if left else 257
+        produced += 1
+        print(f"BT {b} {t}", flush=True)
+        if t == 257 or produced >= max_new:
+            print(f"BDONE {b} {produced} {'stop' if t == 257 else 'length'} 1.0", flush=True)
+            del active[b]
+        else:
+            active[b] = [left, max_new, produced]
+log = open(args[args.index("--log") + 1], "a") if "--log" in args else None
+while True:
+    try:
+        line = lines.get(timeout=STEP if active else None)
+    except queue.Empty:
+        line = ""
+    if line is None or line == "QUIT":
+        break
+    if line.startswith("BYIELD "):
+        continue                              # too late: the read it was for has ended
+    if line.startswith("BSTOP "):
+        b = int(line.split()[1])
+        if b in active:
+            active[b][1] = 0
+        continue
+    if line.startswith(("GEN ", "BGEN ")):
+        f = line.split()
+        slot = int(f[1]) if f[0] == "BGEN" else None
+        max_new = int(f[2] if f[0] == "BGEN" else f[1])
+        ids = f[-1].split(",")
+        if log:
+            log.write(f"{f[0]} {slot} {len(ids)} {max(len(active), 0)}\n"); log.flush()
+        toks = reply(ids)
+        stop.clear()
+        # the prompt read: CH tokens a chunk, a PP line each; a BYIELD <s> gives way at a chunk boundary
+        given = None
+        for q in range(CH, len(ids) - 1, CH):
+            time.sleep(STEP / 2)
+            print(f"PP {q} {len(ids)} 1 1", flush=True)
+            held = []
+            while True:
+                try:
+                    l2 = lines.get_nowait()
+                except queue.Empty:
+                    break
+                if l2 and l2.startswith("BYIELD "):
+                    ys = int(l2.split()[1])
+                    if len(ids) - 1 - q > CH and (slot is None or ys == slot) and given is None:
+                        given = (ys, q)
+                else:
+                    held.append(l2)
+            for l2 in held:
+                lines.put(l2)
+            if given:
+                break
+            if active and (q // CH) % 4 == 0:     # the slots decode between the prompt's chunks (as the engine)
+                window()
+        if given:
+            if log:
+                log.write(f"YIELD {given[0]} {given[1]}\n"); log.flush()
+            print(f"YIELDED {given[0]} {given[1]}", flush=True)
+            print(f"DONE 0 {len(ids)} 5.0 0.0 cancel 0 0 0", flush=True)
+            if slot is not None:
+                print(f"BADM {slot} 0", flush=True)
+            continue
+        n = 1 if slot is not None else max_new
+        out = 0
+        for t in toks[:n]:
+            if stop.is_set():
+                break
+            print(f"T {t}", flush=True)
+            out += 1
+            time.sleep(STEP)
+        fin = "stop" if out and toks[out - 1] == 257 else ("cancel" if stop.is_set() else "length")
+        print(f"DONE {out} {len(ids)} 5.0 {out * STEP * 1000:.1f} {fin} 0 0 0", flush=True)
+        if slot is not None:
+            cont = fin == "length" and max_new > 1
+            if cont:
+                active[slot] = [toks[1:], max_new, 1]
+            print(f"BADM {slot} {1 if cont else 0}", flush=True)
+        continue
+    if line:
+        print("ERR unknown " + line[:20], flush=True)
+        continue
+    window()
+'''
+
+
+class ParallelArgs(unittest.TestCase):
+    def test_parallel_config_key(self):
+        self.assertEqual(parallel_args({"parallel": 4}, []), ["--batch", "4"])
+        self.assertEqual(parallel_args({"parallel": 1}, []), [])
+        self.assertEqual(parallel_args({}, []), [])
+        self.assertEqual(parallel_args({"parallel": 2}, ["--batch", "3"]), [])       # the args' own value wins
+        self.assertEqual(parallel_args({"parallel": "4"}, []), [])                   # said and ignored
+        self.assertEqual(parallel_args({"parallel": True}, []), [])
+        self.assertEqual(parallel_args({"parallel": 12}, []), ["--batch", "12"])     # the engine warns and caps
+        args = engine_args({"args": ["--pack", "p"], "parallel": 2})
+        self.assertEqual(args[-2:], ["--batch", "2"])
+
+
+class PickSlot(unittest.TestCase):
+    def engine(self, n):
+        e = StrataEngine("missing-executable", [], lazy=True)
+        e.batch = n
+        e.slot_order = list(range(n))
+        e.slot_busy = [False] * n
+        e.slot_held = [[] for _ in range(n)]
+        e.slot_used = [0.0] * n
+        e.slot_live = [None] * n
+        return e
+
+    def test_the_slot_that_holds_the_conversation(self):
+        e = self.engine(3)
+        e.slot_held = [[1, 2, 3], [], [1, 2, 3, 4, 5]]
+        e.slot_used = [5.0, 0.0, 9.0]
+        self.assertEqual(e.pick_slot([1, 2, 3, 4, 5, 6]), 2)       # the longest held start
+        self.assertEqual(e.pick_slot([1, 2, 3, 9]), 0)
+        self.assertEqual(e.pick_slot([7, 8]), 1)                    # no match: the empty slot first
+        e.slot_busy[1] = True
+        self.assertEqual(e.pick_slot([7, 8]), 0)                    # then the one used longest ago
+        e.slot_busy = [True] * 3
+        self.assertIsNone(e.pick_slot([7, 8]))
+        e.slot_busy = [False] * 3
+        self.assertEqual(e.pick_slot([1, 2, 3]), 1)                 # a held prompt is never the WHOLE prompt
+
+    def test_slots_view(self):
+        e = self.engine(2)
+        e.slot_held[1] = [1, 2]
+        e.slot_live[0] = {"slot": 0, "state": "decoding", "prompt_tokens": 9, "generated": 4,
+                          "started": time.time() - 2, "first_token": time.time() - 1}
+        v = e.slots_view()
+        self.assertEqual(v[0]["state"], "decoding")
+        self.assertEqual(v[0]["generated"], 4)
+        self.assertEqual(v[1], {"slot": 1, "state": "idle", "held_tokens": 2})
+
+
+class ParallelService(unittest.TestCase):
+    """The real StrataEngine and Service over HTTP, the fake engine behind them."""
+
+    def start(self, slots, fit=None):
+        import serve.server as server
+        self.tmp = tempfile.TemporaryDirectory()
+        script = Path(self.tmp.name) / "fake_strata.py"
+        script.write_text(FAKE_BATCH, encoding="utf-8")
+        self.log = Path(self.tmp.name) / "requests.log"
+        real = server.subprocess.Popen
+        extra = ["--batch", str(slots)] + (["--fit", str(fit)] if fit is not None else []) + ["--log", str(self.log)]
+        with mock.patch.object(server.subprocess, "Popen",
+                               lambda cmd, **kw: real([sys.executable, str(script), *cmd[1:]], **kw)):
+            self.engine = StrataEngine("strata", extra)
+        tok = ByteTokenizer()
+        self.svc = Service(self.engine, tok, ChatTemplate(Path(__file__).parent / "chat_template.jinja"))
+        self.httpd = serve(self.svc, port=0)
+        self.base = f"http://127.0.0.1:{self.httpd.server_address[1]}"
+
+    def tearDown(self):
+        if getattr(self, "httpd", None):
+            self.httpd.shutdown()
+            self.httpd.server_close()
+        if getattr(self, "engine", None):
+            self.engine.unload()
+        if getattr(self, "tmp", None):
+            self.tmp.cleanup()
+
+    def chat(self, text, max_tokens=64):
+        body = {"messages": [{"role": "user", "content": text}], "max_tokens": max_tokens, "reasoning_effort": "none"}
+        req = urllib.request.Request(self.base + "/v1/chat/completions", data=json.dumps(body).encode(),
+                                     headers={"Content-Type": "application/json"})
+        with urllib.request.urlopen(req, timeout=60) as r:
+            return json.loads(r.read().decode())
+
+    def get(self, path):
+        with urllib.request.urlopen(self.base + path, timeout=10) as r:
+            return json.loads(r.read().decode())
+
+    def test_engine_reports_fewer_slots(self):
+        self.start(4, fit=2)
+        self.assertEqual(self.engine.batch, 2)
+        self.assertEqual(self.get("/v1/status")["concurrency"]["serving"], 2)
+
+    def test_engine_turns_batching_off(self):
+        self.start(4, fit=0)
+        self.assertEqual(self.engine.batch, 0)
+        self.assertEqual(self.chat("hi")["choices"][0]["message"]["content"], "ok, done.")
+
+    def test_concurrent_requests_share_the_slots(self):
+        self.start(2)
+        texts = ["first question", "second question, longer", "a third one waits for a slot"]
+        out, errors, seen = {}, [], []
+
+        def go(t):
+            try:
+                out[t] = self.chat(t)
+            except Exception as e:   # noqa: BLE001 - reported below
+                errors.append(e)
+
+        threads = [threading.Thread(target=go, args=(t,)) for t in texts]
+        for th in threads:
+            th.start()
+            time.sleep(0.05)
+        deadline = time.time() + 30
+        while any(th.is_alive() for th in threads) and time.time() < deadline:
+            m = self.get("/metrics")["live"]
+            seen.append(m)
+            time.sleep(0.01)
+        for th in threads:
+            th.join(30)
+        self.assertEqual(errors, [])
+        for t in texts:
+            self.assertEqual(out[t]["choices"][0]["message"]["content"], "ok, done.")
+        # the slots were reported, and a request was admitted while another decoded in a slot (the fake logs how many
+        # slots were active at each admission)
+        self.assertTrue(any(m.get("parallel") == 2 and len(m.get("slots", [])) == 2 for m in seen))
+        admitted = [int(x.split()[3]) for x in self.log.read_text().splitlines() if x.startswith("BGEN")]
+        self.assertIn(1, admitted)
+        # every request recorded its own row; nothing is left running
+        with self.svc.status_lock:
+            self.assertEqual(len(self.svc.history), 3)
+            self.assertEqual(self.svc.live_reqs, {})
+            self.assertFalse(self.svc.status["busy"])
+        self.assertEqual([r["output_tokens"] for r in self.svc.history], [len("ok, done.") + 1] * 3)
+        # never more than two in the slots at once (the fake logs how many were active at each admission)
+        active = [int(x.split()[3]) for x in self.log.read_text().splitlines() if x.startswith("BGEN")]
+        self.assertTrue(all(a <= 1 for a in active), active)
+
+    def race(self, first, second, delay=0.15, max_tokens=64):
+        """`first` sent, `second` after `delay` seconds; -> {text: (reply, seconds it took)}"""
+        res = {}
+
+        def go(t):
+            t0 = time.time()
+            r = self.chat(t, max_tokens=max_tokens)
+            res[t] = (r["choices"][0]["message"]["content"], time.time() - t0)
+        a = threading.Thread(target=go, args=(first,))
+        a.start()
+        time.sleep(delay)
+        go(second)
+        a.join(30)
+        return res
+
+    def test_a_long_prompt_gives_way_to_a_short_one(self):
+        """#656: a long solo prompt read gives way at a chunk boundary; the short request is answered first, then the
+        long one goes on (in the slot its part waited in) and is answered too."""
+        self.start(2)
+        long_q, short_q = "long " * 600, "short"
+        res = self.race(long_q, short_q)
+        self.assertEqual(res[long_q][0], "ok, done.")
+        self.assertEqual(res[short_q][0], "ok, done.")
+        # the long read takes ~1 s (3,000 tokens, 32 a chunk, 10 ms a chunk): the short one did not wait for it
+        self.assertLess(res[short_q][1], res[long_q][1] - 0.5, res)
+        log = self.log.read_text().splitlines()
+        self.assertTrue(any(x.startswith("YIELD ") for x in log), log)
+        with self.svc.status_lock:
+            self.assertEqual(len(self.svc.history), 2)
+        self.assertFalse(any(self.engine.slot_busy))
+
+    def test_an_admission_gives_way_too(self):
+        """The same while another request decodes in a slot: the long one is being admitted, a short one waits."""
+        self.start(3)
+        bg = threading.Thread(target=lambda: self.chat("background", max_tokens=60))
+        bg.start()
+        time.sleep(0.05)
+        long_q, short_q = "long " * 600, "short"
+        res = self.race(long_q, short_q)
+        bg.join(30)
+        self.assertEqual(res[long_q][0], "ok, done.")
+        self.assertLess(res[short_q][1], res[long_q][1] - 0.5, res)
+        log = self.log.read_text().splitlines()
+        self.assertTrue(any(x.startswith("YIELD ") for x in log), log)
+        self.assertFalse(any(self.engine.slot_busy))
+
+    def test_no_way_given_to_a_long_one(self):
+        """Two prompts of about the same length: no BYIELD (it only goes to a much shorter one)."""
+        self.start(2)
+        res = self.race("long " * 600, "lung " * 600)
+        self.assertEqual(sorted(r[0] for r in res.values()), ["ok, done."] * 2)
+        self.assertFalse(any(x.startswith("YIELD ") for x in self.log.read_text().splitlines()))
+
+    def test_next_turn_goes_back_to_its_slot(self):
+        self.start(2)
+        a = "conversation A, first turn"
+        r1 = {}
+        th = threading.Thread(target=lambda: r1.setdefault("x", self.chat("blocker", max_tokens=40)))
+        th.start()
+        time.sleep(0.05)
+        first = self.chat(a)
+        th.join(30)
+        deadline = time.time() + 10                     # a slot left at its stop token is freed at its BDONE
+        while not [h for h in self.engine.slot_held if h] and time.time() < deadline:
+            time.sleep(0.02)
+        held = [h for h in self.engine.slot_held if h]
+        self.assertTrue(held, "a finished slot request keeps what its slot holds")
+        # the held tokens are the prompt and every token fed: all of the reply but its last token
+        reply = list(b"ok, done.") + [257]
+        mine = [h for h in held if h[-len(reply) + 1:] == reply[:-1] and bytes(x for x in h if x < 256).find(b"conversation A") >= 0]
+        self.assertEqual(len(mine), 1, held)
+        slot = self.engine.slot_held.index(mine[0])
+        self.assertEqual(self.engine.pick_slot(mine[0] + [10, 11]), slot)
+        self.assertEqual(first["choices"][0]["message"]["content"], "ok, done.")
+
+
+if __name__ == "__main__":
+    unittest.main()

From 4795f98521c6fb4f87686b2fb8aaad1a6617c23e Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 01:18:02 +0200
Subject: [PATCH 178/201] #465 setup: --parallel N, and the count it recommends
 for the card

The slots' sessions may take a fifth of the expert cache (~VRAM less 5 GB), up to 4: 2 on 12 GB, 3 on 16 GB, 4
from 24 GB, none below. Without --parallel setup only says it once; with it the config gets "parallel": N and a
count above the recommendation is kept with a note.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 setup.py                     | 57 ++++++++++++++++++++++++++++++++++++
 tools/test_setup_parallel.py | 38 ++++++++++++++++++++++++
 2 files changed, 95 insertions(+)
 create mode 100644 tools/test_setup_parallel.py

diff --git a/setup.py b/setup.py
index f0d2a0d13b4..be9a034dbe3 100644
--- a/setup.py
+++ b/setup.py
@@ -3076,6 +3076,47 @@ def small_card_note(ctx: int, draft_vocab: str | None) -> list[str]:
     return lines
 
 
+PARALLEL_MAX = 8               # #465: the engine's batch window holds at most 8 requests
+PARALLEL_SHARE = 0.2           # #465: the slots' sessions may take this share of the VRAM the expert cache would hold
+
+
+def parallel_slot_gb(ctx: int, kv: str, streaming: bool) -> float:
+    """#465: the VRAM one batch slot's session takes: its KV cache (12 QSA layers; with KV streaming only the 32K
+    positions the attention reads stay in VRAM) and the DeltaNet state (~0.17 GB).  Measured: 0.56 GiB at 32K int8."""
+    kv_tok = 12 * (576 if kv == "q4_0" else 1056)
+    return (min(ctx, 32768) if streaming else ctx) * kv_tok / 1e9 + 0.17
+
+
+def parallel_recommend(vram_gb: float, ctx: int, kv: str, streaming: bool) -> int:
+    """#465: how many requests at once ("parallel") this card can take without the slots' sessions eating more than
+    PARALLEL_SHARE of its expert cache (~VRAM less 5 GB): 0 = none (one at a time).  Every slot's VRAM is expert cache
+    lost, and on a card whose experts mostly run on the CPU the batch reads ~as many experts as the requests one by one:
+    measured on a 12 GB RTX 5070 (Q2_0, 32K), 2 requests at once 66 tok/s together (one alone ~65), 4 at once 45."""
+    cache_gb = max(0.0, vram_gb - 5)
+    n = int(PARALLEL_SHARE * cache_gb / parallel_slot_gb(ctx, kv, streaming))
+    return min(4, n) if n >= 2 else 0
+
+
+def parallel_note(asked: int | None, vram_gb: float, ctx: int, kv: str, streaming: bool) -> list[str]:
+    """#465: what setup says about "parallel": the recommendation, or how the asked count compares with it (kept as
+    asked: recommend, never force)."""
+    rec = parallel_recommend(vram_gb, ctx, kv, streaming)
+    slot = parallel_slot_gb(ctx, kv, streaming)
+    if asked is None or asked <= 1:
+        if not rec:
+            return []
+        return [f"Several requests at once (opt-in): --parallel {rec} decodes up to {rec} together instead of one "
+                f"after the other (each takes ~{slot:.1f} GB of VRAM from the expert cache; docs/BATCHING.md)."]
+    lines = [f"parallel requests: {asked} at once (each takes ~{slot:.1f} GB of VRAM from the expert cache, "
+             f"{asked * slot:.1f} GB in all)"]
+    if asked > PARALLEL_MAX:
+        lines.append(f"the engine runs at most {PARALLEL_MAX} at once; it will use {PARALLEL_MAX}")
+    if asked > max(rec, 1):
+        lines.append(f"recommended for this card: {rec or 'one at a time'} - more slots leave fewer experts in VRAM, "
+                     "which can make every request slower; kept as you chose")
+    return lines
+
+
 DESKTOP_RESERVE_MIB = 3072     # #560 #516: what kept a KDE/Wayland desktop alive beside a full expert cache
 
 
@@ -3277,6 +3318,9 @@ def main() -> int:
     ap.add_argument("--vram-reserve-mib", type=int, metavar="N",
                     help="VRAM in MiB the engine leaves free for other programs (a game, another model; the engine's "
                          "default: 700); the expert cache takes that much less")
+    ap.add_argument("--parallel", type=int, metavar="N",
+                    help="up to N requests decode together (batch slots, opt-in; default: one at a time, the others "
+                         "wait). Each slot takes VRAM from the expert cache; setup says what it recommends")
     ap.add_argument("--kv-streaming", choices=["auto", "on", "off"], default="auto",
                     help="from a 64K context: keep the KV cache in RAM and only the attention's window in VRAM (more "
                          "experts fit on the GPU); auto: when the RAM has room for it")
@@ -3974,6 +4018,16 @@ def main() -> int:
         cfg["draft_vocab"] = draft_vocab
     if a.browser is not None:                          # #609: only when given (else an earlier choice is carried over)
         cfg["open_browser"] = a.browser
+    # #465: requests at once - written only when given (else an earlier "parallel" is carried over); a recommendation
+    streaming = "--kv-resident" in args
+    if a.parallel is not None:
+        if a.parallel >= 2:
+            cfg["parallel"] = a.parallel
+            for i, line in enumerate(parallel_note(a.parallel, gpu.get("vram_gb", 0.0), ctx, kv, streaming)):
+                (ok if i == 0 else warn)(line)
+        else:
+            cfg["parallel"] = 1
+            ok("parallel requests: one at a time (--parallel 1)")
     if vision != "none":
         old_cfg = ROOT / f"strata-{tag.lower()}.json"
         vt = vision_tokens(a.vision_tokens, vision, old_cfg if old_cfg.is_file() else adopted)
@@ -4013,6 +4067,9 @@ def main() -> int:
     say(f"  Next time:        just run {'START-HERE.bat' if WIN else './setup.sh'} (or {script.name}) - it starts right away")
     if vision != "none":
         say("  Images:           send them in the chat page, in chat.py (/image <path>) or over the API")
+    if a.parallel is None and not multi:               # #465: the opt-in, said once (nothing changes)
+        for line in parallel_note(None, gpu.get("vram_gb", 0.0), ctx, kv, "--kv-resident" in cfg["args"]):
+            say("  " + line)
     if tuned is False:                                 # #447: a failed tuning is repeated here, not only above
         say("  Tuning:           FAILED (the reason is above): the default settings stay - "
             f"{'START-HERE.bat' if WIN else './setup.sh'} --calibrate tries again")
diff --git a/tools/test_setup_parallel.py b/tools/test_setup_parallel.py
new file mode 100644
index 00000000000..7c3b94a320c
--- /dev/null
+++ b/tools/test_setup_parallel.py
@@ -0,0 +1,38 @@
+"""#465: setup's recommendation for "parallel" (several requests decoded together in the engine's batch slots).
+No GPU or download needed: python tools/test_setup_parallel.py"""
+import sys
+import unittest
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent.parent))
+import setup as S  # noqa: E402
+
+
+class Parallel(unittest.TestCase):
+    def test_slot_size(self):
+        # measured: a slot's session at 32K, int8 KV: 0.56 GiB = 0.60 GB
+        self.assertAlmostEqual(S.parallel_slot_gb(32768, "int8", False), 0.59, delta=0.03)
+        # KV streaming keeps only the attention's 32K positions in VRAM, whatever the context
+        self.assertEqual(S.parallel_slot_gb(262144, "int8", True), S.parallel_slot_gb(32768, "int8", False))
+        self.assertLess(S.parallel_slot_gb(32768, "q4_0", False), S.parallel_slot_gb(32768, "int8", False))
+
+    def test_recommendation_by_card(self):
+        self.assertEqual(S.parallel_recommend(8, 32768, "int8", False), 0)      # too small: one at a time
+        self.assertEqual(S.parallel_recommend(12, 32768, "int8", False), 2)     # the measured 5070
+        self.assertEqual(S.parallel_recommend(24, 32768, "int8", False), 4)
+        self.assertEqual(S.parallel_recommend(48, 32768, "int8", False), 4)     # capped at 4
+        self.assertEqual(S.parallel_recommend(12, 262144, "int8", False), 0)    # a 262K KV cache per slot: no
+        self.assertEqual(S.parallel_recommend(12, 262144, "int8", True), 2)     # ... unless it streams
+
+    def test_notes_recommend_never_force(self):
+        self.assertEqual(S.parallel_note(None, 8, 32768, "int8", False), [])
+        self.assertIn("--parallel 2", S.parallel_note(None, 12, 32768, "int8", False)[0])
+        lines = S.parallel_note(4, 12, 32768, "int8", False)
+        self.assertIn("4 at once", lines[0])
+        self.assertTrue(any("recommended for this card: 2" in x and "kept as you chose" in x for x in lines))
+        self.assertTrue(any("at most 8" in x for x in S.parallel_note(12, 48, 32768, "int8", False)))
+        self.assertEqual(len(S.parallel_note(2, 12, 32768, "int8", False)), 1)   # as recommended: no warning
+
+
+if __name__ == "__main__":
+    unittest.main()

From ec35cf078356a8af17735da3d764377ce59c4fa1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=87=8E=E7=94=9F=E3=81=AE=E7=94=B7?= <dailioh@gmail.com>
Date: Sun, 4 Oct 2026 01:29:24 +0200
Subject: [PATCH 179/201] cpu: preserve full thread affinity on Windows and
 Linux (#626)

Windows: pool workers pin with SetThreadGroupAffinity (the processor group was dropped: a 3990X's 63 workers
collapsed to 32 group-local masks); the host thread selects a CPU Set and restores the previous selection.
Linux: the complete, dynamically sized affinity mask is kept and restored (CPU IDs past 63).
pool_affinity_test (Windows) and pool_affinity_linux_test. Squashed from the PR's 8 commits (net diff).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 CMakeLists.txt                               |   9 +
 include/strata/core/session.hpp              |   3 +-
 include/strata/kernels/cpu/pool.hpp          |  22 +-
 src/core/session.cpp                         |   4 +-
 src/kernels/cpu/pool.cpp                     |  99 ++++---
 src/kernels/cpu/pool_affinity_linux.hpp      |  69 +++++
 src/kernels/cpu/pool_affinity_linux_test.cpp | 290 +++++++++++++++++++
 src/kernels/cpu/pool_affinity_test.cpp       | 148 ++++++++++
 src/kernels/cpu/pool_affinity_win.hpp        |  64 ++++
 9 files changed, 660 insertions(+), 48 deletions(-)
 create mode 100644 src/kernels/cpu/pool_affinity_linux.hpp
 create mode 100644 src/kernels/cpu/pool_affinity_linux_test.cpp
 create mode 100644 src/kernels/cpu/pool_affinity_test.cpp
 create mode 100644 src/kernels/cpu/pool_affinity_win.hpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 36d1a3fb3c3..045d92730ae 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1062,6 +1062,15 @@ if(STRATA_ENABLE_CUDA AND STRATA_BUILD_TESTS AND EXISTS "${CMAKE_CURRENT_SOURCE_
 endif()
 
 if(STRATA_BUILD_TESTS)
+  if(WIN32)
+    add_executable(pool_affinity_test src/kernels/cpu/pool_affinity_test.cpp)
+    target_link_libraries(pool_affinity_test PRIVATE strata_kernels_cpu)
+    add_test(NAME pool_affinity_test COMMAND pool_affinity_test)
+  elseif(CMAKE_SYSTEM_NAME STREQUAL "Linux")
+    add_executable(pool_affinity_test src/kernels/cpu/pool_affinity_linux_test.cpp)
+    target_link_libraries(pool_affinity_test PRIVATE strata_kernels_cpu)
+    add_test(NAME pool_affinity_test COMMAND pool_affinity_test)
+  endif()
   # Plan v0.3 P6: one expert applied to several tokens, bitwise vs the single-token kernel (synthetic, CPU only).
   # plan v0.3 P5: the device dequantizers vs the artifact's CPU dequantizers on the real shards (not a ctest: needs
   # the 38 GB model; run it by hand or from tools/gpu_session.py)
diff --git a/include/strata/core/session.hpp b/include/strata/core/session.hpp
index 6d1becfac4a..4d633205ea8 100644
--- a/include/strata/core/session.hpp
+++ b/include/strata/core/session.hpp
@@ -16,6 +16,7 @@
 
 #include "strata/core/hit_hook.hpp"
 #include "strata/core/layer.hpp"
+#include "strata/kernels/cpu/pool.hpp"
 
 #include <cuda_runtime.h>
 
@@ -369,7 +370,7 @@ struct SessionLoopScratch {
     float* y_miss = nullptr;        ///< pinned host staging for the pool's answer, `parts_bytes` long
     size_t parts_bytes = 0;
     cudaEvent_t probe = nullptr;
-    long long pinned_core = -1;     ///< the affinity to restore, or -1 if the host was never pinned
+    strata::kernels::cpu::ThreadAffinity pinned_core{};  ///< affinity to restore, or invalid if the host was not pinned
     bool pinned = false;
 
     /// Allocates the buffers and pins the host thread.  Call ONCE, at session setup.
diff --git a/include/strata/kernels/cpu/pool.hpp b/include/strata/kernels/cpu/pool.hpp
index 76bda6def83..662bb03c177 100644
--- a/include/strata/kernels/cpu/pool.hpp
+++ b/include/strata/kernels/cpu/pool.hpp
@@ -76,7 +76,7 @@ struct CpuTopology {
     int p_cores = 0;                ///< Physical performance cores
     int p_threads = 0;              ///< Total logical threads on performance cores
     int e_cores = 0;                ///< Efficient cores
-    std::vector<int> worker_cores;  ///< Ordered logical core IDs for workers (excluding host if skip_first)
+    std::vector<int> worker_cores;  ///< Ordered CPU IDs; on Windows, group * 64 + processor within the group
     int host_core = -1;             ///< Logical core reserved for host thread
 };
 
@@ -100,9 +100,23 @@ std::vector<int> physical_cores(bool skip_first, PoolAffinity affinity = PoolAff
 /// - exactly 5/6 of L9's 44.14 on 6 - and at **26.9 GB/s inside the host loop**, where the unpinned spinning
 /// host is free to land on a worker's core or its SMT sibling.  That 1.35x is not the kernel.
 ///
-/// Returns the PREVIOUS affinity mask, or -1 if the platform refused; pass it to `restore_thread_affinity`.
-long long pin_current_thread(int core);
-void restore_thread_affinity(long long previous);
+/// The previous host placement. `valid` is false when querying or setting placement failed.
+/// Windows uses a reversible CPU Set selection, leaving hard affinity (including Windows 11's implicit
+/// all-group eligibility) untouched. An empty selection restores inheritance from the process defaults.
+/// Linux stores the complete, dynamically sized native CPU mask, including CPU IDs above 63.
+struct ThreadAffinity {
+#if defined(_WIN32)
+    std::vector<unsigned long> cpu_sets;
+#else
+    std::vector<unsigned long> mask;
+#endif
+    bool valid = false;
+};
+
+/// Selects one encoded processor for the caller; Windows CPU Sets respect existing hard-affinity limits.
+/// Restore on the same calling thread. Pool-owned workers use hard group affinity instead.
+ThreadAffinity pin_current_thread(int core);
+void restore_thread_affinity(const ThreadAffinity& previous);
 
 class ExpertPool {
 public:
diff --git a/src/core/session.cpp b/src/core/session.cpp
index 14c61663bdf..40a44bd1262 100644
--- a/src/core/session.cpp
+++ b/src/core/session.cpp
@@ -547,7 +547,7 @@ bool SessionLoopScratch::init(size_t parts_bytes_in, std::string& err) {
     const std::vector<int> cores = strata::kernels::cpu::physical_cores(false);
     if (!cores.empty()) {
         pinned_core = strata::kernels::cpu::pin_current_thread(cores[0]);
-        pinned = true;
+        pinned = pinned_core.valid;
     }
     return true;
 }
@@ -558,7 +558,7 @@ void SessionLoopScratch::free() {
     if (pinned) {
         strata::kernels::cpu::restore_thread_affinity(pinned_core);
         pinned = false;
-        pinned_core = -1;
+        pinned_core = {};
     }
     if (probe != nullptr) { cudaEventDestroy(probe); probe = nullptr; }
     if (y_miss != nullptr) { cudaFreeHost(y_miss); y_miss = nullptr; }
diff --git a/src/kernels/cpu/pool.cpp b/src/kernels/cpu/pool.cpp
index 1919d2e9c6d..dd68abff64a 100644
--- a/src/kernels/cpu/pool.cpp
+++ b/src/kernels/cpu/pool.cpp
@@ -14,9 +14,11 @@
 #if defined(_WIN32)
 #define WIN32_LEAN_AND_MEAN
 #include <windows.h>
+#include "pool_affinity_win.hpp"
 #else
 #include <pthread.h>
 #include <sched.h>
+#include "pool_affinity_linux.hpp"
 #endif
 
 namespace strata::kernels::cpu {
@@ -36,7 +38,13 @@ CpuTopology detect_cpu_topology(bool skip_first, PoolAffinity affinity) {
     DWORD len = 0;
     GetLogicalProcessorInformationEx(RelationProcessorCore, nullptr, &len);
     if (len == 0) {
-        for (unsigned i = 0; i < std::thread::hardware_concurrency(); ++i) topo.worker_cores.push_back((int) i);
+        // Preserve group identity even when detailed core topology is unavailable.
+        const WORD groups = GetActiveProcessorGroupCount();
+        for (WORD group = 0; group < groups; ++group) {
+            const DWORD count = GetActiveProcessorCount(group);
+            if (count == 0 || count == (DWORD) -1 || count > 64) continue;
+            for (DWORD i = 0; i < count; ++i) topo.worker_cores.push_back((int) group * 64 + (int) i);
+        }
         if (skip_first && !topo.worker_cores.empty()) {
             topo.host_core = topo.worker_cores.front();
             topo.worker_cores.erase(topo.worker_cores.begin());
@@ -60,10 +68,12 @@ CpuTopology detect_cpu_topology(bool skip_first, PoolAffinity affinity) {
                 CoreDesc cd;
                 cd.efficiency = e->Processor.EfficiencyClass;
                 cd.has_smt = (e->Processor.Flags & LTP_PC_SMT) != 0;
-                const GROUP_AFFINITY& g = e->Processor.GroupMask[0];
-                for (int bit = 0; bit < 64; ++bit) {
-                    if (g.Mask & (1ull << bit)) {
-                        cd.lps.push_back((int) (g.Group * 64 + bit));
+                for (WORD group = 0; group < e->Processor.GroupCount; ++group) {
+                    const GROUP_AFFINITY& g = e->Processor.GroupMask[group];
+                    for (int bit = 0; bit < 64; ++bit) {
+                        if (g.Mask & (KAFFINITY(1) << bit)) {
+                            cd.lps.push_back((int) (g.Group * 64 + bit));
+                        }
                     }
                 }
                 if (!cd.lps.empty()) {
@@ -168,12 +178,8 @@ CpuTopology detect_cpu_topology(bool skip_first, PoolAffinity affinity) {
     };
 
     std::vector<int> allowed;
-    cpu_set_t set;
-    CPU_ZERO(&set);
-    if (sched_getaffinity(0, sizeof set, &set) == 0) {
-        for (int i = 0; i < CPU_SETSIZE; ++i)
-            if (CPU_ISSET(i, &set)) allowed.push_back(i);
-    } else {
+    std::vector<unsigned long> allowed_mask;
+    if (detail::get_thread_affinity(allowed_mask, &allowed) != 0) {
         for (unsigned i = 0; i < std::thread::hardware_concurrency(); ++i) allowed.push_back((int) i);
     }
 
@@ -273,49 +279,60 @@ std::vector<int> physical_cores(bool skip_first, PoolAffinity affinity) {
 
 namespace {
 
-void pin_this_thread(int core) {
-    if (core < 0) return;
+bool pin_this_thread(int core, [[maybe_unused]] int worker = -1) {
+    if (core < 0) return false;
 #if defined(_WIN32)
-    SetThreadAffinityMask(GetCurrentThread(), (DWORD_PTR) 1 << (core & 63));
+    return detail::set_thread_group_affinity(core, worker);
 #else
-    cpu_set_t set;
-    CPU_ZERO(&set);
-    CPU_SET(core, &set);
-    pthread_setaffinity_np(pthread_self(), sizeof set, &set);
+    const int error = detail::pin_thread_to_cpu(core);
+    if (error != 0)
+        std::fprintf(stderr, "strata cpu pool: affinity for worker %d (CPU %d) failed: %d; previous affinity kept\n",
+                     worker, core, error);
+    return error == 0;
 #endif
 }
 
 }  // namespace
 
-long long pin_current_thread(int core) {
-    if (core < 0) return -1;
+ThreadAffinity pin_current_thread(int core) {
+    if (core < 0) return {};
 #if defined(_WIN32)
-    // `SetThreadAffinityMask` RETURNS the previous mask, or 0 on failure - so 0 doubles as the error, which is
-    // why the caller must not treat it as a restorable value.
-    const DWORD_PTR prev = SetThreadAffinityMask(GetCurrentThread(), (DWORD_PTR) 1 << (core & 63));
-    return prev == 0 ? -1 : (long long) prev;
+    ThreadAffinity previous;
+    ULONG target = 0;
+    if (!detail::get_thread_cpu_sets(previous.cpu_sets) || !detail::cpu_set_for_core(core, target) ||
+        !SetThreadSelectedCpuSets(GetCurrentThread(), &target, 1)) {
+        std::fprintf(stderr, "strata cpu pool: host CPU Set selection for processor %d failed: %lu; previous placement kept\n",
+                     core, (unsigned long) GetLastError());
+        return {};
+    }
+    previous.valid = true;
+    return previous;
 #else
-    cpu_set_t prev;
-    CPU_ZERO(&prev);
-    if (pthread_getaffinity_np(pthread_self(), sizeof prev, &prev) != 0) return -1;
-    unsigned long mask = 0;
-    for (int i = 0; i < CPU_SETSIZE && i < 64; ++i)
-        if (CPU_ISSET(i, &prev)) mask |= 1ul << i;
-    pin_this_thread(core);
-    return (long long) mask;
+    ThreadAffinity previous;
+    int error = detail::get_thread_affinity(previous.mask);
+    if (error == 0) error = detail::pin_thread_to_cpu(core);
+    if (error != 0) {
+        std::fprintf(stderr, "strata cpu pool: host affinity for CPU %d failed: %d; previous affinity kept\n", core, error);
+        return {};
+    }
+    previous.valid = true;
+    return previous;
 #endif
 }
 
-void restore_thread_affinity(long long previous) {
-    if (previous <= 0) return;
+void restore_thread_affinity(const ThreadAffinity& previous) {
+    if (!previous.valid) return;
 #if defined(_WIN32)
-    SetThreadAffinityMask(GetCurrentThread(), (DWORD_PTR) previous);
+    // Clearing an originally empty selection restores process-default/all-group eligibility without
+    // turning the caller's implicit Windows 11 affinity into an explicit single-group hard mask.
+    if (!SetThreadSelectedCpuSets(GetCurrentThread(), previous.cpu_sets.empty() ? nullptr : previous.cpu_sets.data(),
+                                 (ULONG) previous.cpu_sets.size()))
+        std::fprintf(stderr, "strata cpu pool: host CPU Set restoration failed: %lu\n",
+                     (unsigned long) GetLastError());
 #else
-    cpu_set_t set;
-    CPU_ZERO(&set);
-    for (int i = 0; i < 64; ++i)
-        if ((previous >> i) & 1) CPU_SET(i, &set);
-    pthread_setaffinity_np(pthread_self(), sizeof set, &set);
+    const int error = detail::set_thread_affinity(previous.mask);
+    if (error != 0)
+        std::fprintf(stderr, "strata cpu pool: host affinity restoration failed: %d\n", error);
 #endif
 }
 
@@ -375,7 +392,7 @@ ExpertPool::ExpertPool(int n_workers, bool pin, bool host_works, PoolAffinity af
     for (int i = 0; i < n_; ++i) {
         const int core = pin ? (i < (int) topo_.worker_cores.size() ? topo_.worker_cores[(size_t) i] : -1) : -1;
         threads_.emplace_back([this, i, core] {
-            pin_this_thread(core);
+            pin_this_thread(core, i);
             worker(i);
         });
     }
diff --git a/src/kernels/cpu/pool_affinity_linux.hpp b/src/kernels/cpu/pool_affinity_linux.hpp
new file mode 100644
index 00000000000..0791ac5c7ab
--- /dev/null
+++ b/src/kernels/cpu/pool_affinity_linux.hpp
@@ -0,0 +1,69 @@
+#pragma once
+
+#if defined(__linux__)
+#include <pthread.h>
+#include <sched.h>
+
+#include <cerrno>
+#include <climits>
+#include <cstring>
+#include <vector>
+
+namespace strata::kernels::cpu::detail {
+
+// CPU_ALLOC and the sized macros also handle kernels whose CPU mask exceeds CPU_SETSIZE.
+// Keep the native mask opaque: copy its bytes for storage and use CPU_*_S to inspect it.
+class LinuxCpuSet {
+public:
+    explicit LinuxCpuSet(int cpus) : bytes(CPU_ALLOC_SIZE(cpus)), set(CPU_ALLOC(cpus)) {
+        if (set) CPU_ZERO_S(bytes, set);
+    }
+    ~LinuxCpuSet() { CPU_FREE(set); }
+    LinuxCpuSet(const LinuxCpuSet&) = delete;
+    LinuxCpuSet& operator=(const LinuxCpuSet&) = delete;
+
+    const size_t bytes;
+    cpu_set_t* const set;
+};
+
+// pthread affinity functions return an error number directly; they do not set errno.
+// A too-small query buffer returns EINVAL, even when the number of online CPUs is small.
+inline int get_thread_affinity(std::vector<unsigned long>& mask, std::vector<int>* cpus = nullptr) {
+    for (int count = CPU_SETSIZE;;) {
+        LinuxCpuSet current(count);
+        if (!current.set) return ENOMEM;
+        const int error = pthread_getaffinity_np(pthread_self(), current.bytes, current.set);
+        if (error == 0) {
+            mask.resize(current.bytes / sizeof(unsigned long));
+            std::memcpy(mask.data(), current.set, current.bytes);
+            if (cpus) {
+                cpus->clear();
+                for (int cpu = 0; cpu < count; ++cpu)
+                    if (CPU_ISSET_S(cpu, current.bytes, current.set)) cpus->push_back(cpu);
+            }
+            return 0;
+        }
+        if (error != EINVAL || count > INT_MAX / 2) return error;
+        count *= 2;
+    }
+}
+
+inline int set_thread_affinity(const std::vector<unsigned long>& mask) {
+    constexpr size_t word_bits = sizeof(unsigned long) * CHAR_BIT;
+    if (mask.empty() || mask.size() > INT_MAX / word_bits) return EINVAL;
+    LinuxCpuSet target(static_cast<int>(mask.size() * word_bits));
+    if (!target.set) return ENOMEM;
+    std::memcpy(target.set, mask.data(), target.bytes);
+    return pthread_setaffinity_np(pthread_self(), target.bytes, target.set);
+}
+
+inline int pin_thread_to_cpu(int core) {
+    if (core < 0 || core == INT_MAX) return EINVAL;
+    LinuxCpuSet target(core < CPU_SETSIZE ? CPU_SETSIZE : core + 1);
+    if (!target.set) return ENOMEM;
+    CPU_SET_S(core, target.bytes, target.set);
+    return pthread_setaffinity_np(pthread_self(), target.bytes, target.set);
+}
+
+}  // namespace strata::kernels::cpu::detail
+#endif
diff --git a/src/kernels/cpu/pool_affinity_linux_test.cpp b/src/kernels/cpu/pool_affinity_linux_test.cpp
new file mode 100644
index 00000000000..6b5752af1f4
--- /dev/null
+++ b/src/kernels/cpu/pool_affinity_linux_test.cpp
@@ -0,0 +1,290 @@
+#ifndef _GNU_SOURCE
+#define _GNU_SOURCE
+#endif
+
+#include "strata/kernels/cpu/pool.hpp"
+
+#include <algorithm>
+#include <cerrno>
+#include <climits>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <string>
+#include <thread>
+#include <vector>
+
+#if defined(__linux__)
+#include "pool_affinity_linux.hpp"
+
+#include <pthread.h>
+#include <sched.h>
+#include <unistd.h>
+
+namespace cpu = strata::kernels::cpu;
+
+class DynamicCpuSet {
+public:
+    explicit DynamicCpuSet(size_t count)
+        : count_(count), bytes_(CPU_ALLOC_SIZE(count)), set_(CPU_ALLOC(count)) {
+        if (set_) CPU_ZERO_S(bytes_, set_);
+    }
+
+    ~DynamicCpuSet() {
+        if (set_) CPU_FREE(set_);
+    }
+
+    DynamicCpuSet(const DynamicCpuSet&) = delete;
+    DynamicCpuSet& operator=(const DynamicCpuSet&) = delete;
+
+    cpu_set_t* get() { return set_; }
+    const cpu_set_t* get() const { return set_; }
+    size_t bytes() const { return bytes_; }
+    size_t count() const { return count_; }
+    explicit operator bool() const { return set_ != nullptr; }
+
+private:
+    size_t count_;
+    size_t bytes_;
+    cpu_set_t* set_;
+};
+
+static size_t initial_cpu_count() {
+    const long configured = sysconf(_SC_NPROCESSORS_CONF);
+    return (std::max)(size_t(128), configured > 0 ? (size_t) configured : size_t(0));
+}
+
+// Query with CPU_ALLOC rather than cpu_set_t: this must observe CPUs beyond CPU_SETSIZE too.
+static bool get_affinity(std::vector<int>& ids) {
+    size_t count = initial_cpu_count();
+    for (int attempt = 0; attempt < 8; ++attempt) {
+        DynamicCpuSet set(count);
+        if (!set) return false;
+        const int error = pthread_getaffinity_np(pthread_self(), set.bytes(), set.get());
+        if (error == 0) {
+            ids.clear();
+            for (size_t i = 0; i < set.count(); ++i)
+                if (CPU_ISSET_S(i, set.bytes(), set.get())) ids.push_back((int) i);
+            return !ids.empty();
+        }
+        if (error != EINVAL || count > (size_t(1) << 20)) {
+            std::fprintf(stderr, "pthread_getaffinity_np failed: %s\n", std::strerror(error));
+            return false;
+        }
+        count *= 2;
+    }
+    std::fprintf(stderr, "pthread_getaffinity_np still needs a larger CPU set\n");
+    return false;
+}
+
+static bool set_affinity(const std::vector<int>& ids) {
+    if (ids.empty()) return false;
+    const int highest = *std::max_element(ids.begin(), ids.end());
+    if (highest < 0) return false;
+    const size_t count = (std::max)(initial_cpu_count(), (size_t) highest + 1);
+    DynamicCpuSet set(count);
+    if (!set) return false;
+    for (int id : ids) {
+        if (id < 0 || (size_t) id >= count) return false;
+        CPU_SET_S((size_t) id, set.bytes(), set.get());
+    }
+    const int error = pthread_setaffinity_np(pthread_self(), set.bytes(), set.get());
+    if (error != 0) {
+        std::fprintf(stderr, "pthread_setaffinity_np failed: %s\n", std::strerror(error));
+        return false;
+    }
+    return true;
+}
+
+class OriginalAffinity {
+public:
+    bool capture() { return get_affinity(ids_); }
+    const std::vector<int>& ids() const { return ids_; }
+    bool restore() { return ids_.empty() || set_affinity(ids_); }
+    ~OriginalAffinity() { if (!ids_.empty()) set_affinity(ids_); }
+
+private:
+    std::vector<int> ids_;
+};
+
+static bool expect_affinity(const std::vector<int>& expected, const char* label) {
+    std::vector<int> actual;
+    if (!get_affinity(actual)) {
+        std::fprintf(stderr, "Linux affinity test: %s: cannot query current affinity\n", label);
+        return false;
+    }
+    if (actual != expected) {
+        std::fprintf(stderr, "Linux affinity test: %s: expected %zu CPUs, observed %zu\n",
+                     label, expected.size(), actual.size());
+        return false;
+    }
+    return true;
+}
+
+static bool round_trip_full_mask(const std::vector<int>& allowed) {
+    const int target = allowed.front();
+    const auto previous = cpu::pin_current_thread(target);
+    const bool pinned = previous.valid && expect_affinity({target}, "pin from full allowed mask");
+    cpu::restore_thread_affinity(previous);
+    return pinned && expect_affinity(allowed, "restore full allowed mask");
+}
+
+static bool topology_respects_current_mask() {
+    std::vector<int> allowed;
+    if (!get_affinity(allowed)) return false;
+    const auto topology = cpu::detect_cpu_topology(false);
+    if (topology.worker_cores.empty()) return false;
+    for (int core : topology.worker_cores) {
+        if (!std::binary_search(allowed.begin(), allowed.end(), core)) {
+            std::fprintf(stderr, "Linux affinity test: topology selected disallowed CPU %d\n", core);
+            return false;
+        }
+    }
+    return true;
+}
+
+static bool round_trip_sparse_nested(const std::vector<int>& allowed) {
+    if (allowed.size() < 2) {
+        std::puts("SKIP sparse/nested affinity: fewer than two allowed CPUs");
+        return true;
+    }
+    const std::vector<int> sparse{allowed.front(), allowed.back()};
+    if (!set_affinity(sparse) || !expect_affinity(sparse, "establish sparse mask") ||
+        !topology_respects_current_mask()) return false;
+
+    const auto outer = cpu::pin_current_thread(sparse.front());
+    const bool outer_pinned = outer.valid && expect_affinity({sparse.front()}, "outer pin");
+    if (!outer_pinned) {
+        cpu::restore_thread_affinity(outer);
+        return false;
+    }
+
+    const auto inner = cpu::pin_current_thread(sparse.back());
+    const bool inner_pinned = inner.valid && expect_affinity({sparse.back()}, "inner pin");
+    cpu::restore_thread_affinity(inner);
+    const bool outer_restored = expect_affinity({sparse.front()}, "restore inner pin to outer pin");
+    cpu::restore_thread_affinity(outer);
+    const bool sparse_restored = expect_affinity(sparse, "restore outer pin to sparse mask");
+    const bool full_restored = set_affinity(allowed) && expect_affinity(allowed, "restore full mask after sparse test");
+    return inner_pinned && outer_restored && sparse_restored && full_restored;
+}
+
+static bool round_trip_high_cpu(const std::vector<int>& allowed, bool require_high) {
+    const auto it = std::find_if(allowed.begin(), allowed.end(), [](int id) { return id >= 64; });
+    if (it == allowed.end()) {
+        if (require_high) {
+            std::fprintf(stderr, "Linux affinity test: --require-high-cpu requested, but no allowed CPU ID is >= 64\n");
+            return false;
+        }
+        std::puts("SKIP high-CPU affinity path: no allowed CPU ID is >= 64 (use --require-high-cpu to require it)");
+        return true;
+    }
+    const int target = allowed.front() == *it ? (allowed.size() > 1 ? allowed.back() : *it) : allowed.front();
+    if (target == *it) {
+        if (require_high) {
+            std::fprintf(stderr, "Linux affinity test: --require-high-cpu needs at least two allowed CPUs to test restoration\n");
+            return false;
+        }
+        std::puts("SKIP high-CPU affinity round trip: only one CPU is allowed, so no meaningful pin transition is possible");
+        return true;
+    }
+
+    // Restrict the caller to one high-numbered CPU, then pin to a different originally allowed CPU.
+    // Restoring the high-only mask catches truncation even when the original process mask is sparse.
+    const std::vector<int> high_only{*it};
+    if (!set_affinity(high_only) || !expect_affinity(high_only, "establish high-only mask") ||
+        !topology_respects_current_mask()) return false;
+    const auto previous = cpu::pin_current_thread(target);
+    const bool pinned = previous.valid && expect_affinity({target}, "pin away from high-only mask");
+    cpu::restore_thread_affinity(previous);
+    const bool restored = pinned && expect_affinity(high_only, "restore high-only mask");
+    if (restored) std::printf("High-CPU affinity round trip: saved CPU %d, pin target %d\n", *it, target);
+    return restored;
+}
+
+static bool negative_cpu_is_noop() {
+    std::vector<int> before;
+    if (!get_affinity(before)) return false;
+    const auto invalid = cpu::pin_current_thread(-1);
+    std::vector<int> after;
+    const bool unchanged = get_affinity(after) && before == after;
+    cpu::restore_thread_affinity(invalid);
+    return !invalid.valid && unchanged && expect_affinity(before, "negative CPU no-op");
+}
+
+static bool worker_thread_can_pin(int target) {
+    bool ok = false;
+    std::thread worker([&] {
+        std::vector<int> before;
+        if (!get_affinity(before)) return;
+        std::vector<unsigned long> saved;
+        if (cpu::detail::get_thread_affinity(saved) != 0) return;
+        const int pin_error = cpu::detail::pin_thread_to_cpu(target);
+        const bool pinned = pin_error == 0 && expect_affinity({target}, "worker thread helper pin") &&
+                            sched_getcpu() == target;
+        const int restore_error = cpu::detail::set_thread_affinity(saved);
+        ok = pinned && restore_error == 0 && expect_affinity(before, "worker thread helper restore");
+    });
+    worker.join();
+    return ok;
+}
+
+static bool failed_pin_preserves_affinity() {
+    std::vector<int> before;
+    if (!get_affinity(before)) return false;
+    // An ID outside the caller's current mask may still be online and legal, so it is not a
+    // reliable failure case. INT_MAX is rejected before allocating or changing any CPU set.
+    const int error = cpu::detail::pin_thread_to_cpu(INT_MAX);
+    std::vector<int> after;
+    const bool helper_unchanged = get_affinity(after) && before == after;
+    if (error == 0) {
+        std::fprintf(stderr, "Linux affinity test: pin_thread_to_cpu(INT_MAX) unexpectedly succeeded\n");
+        return false;
+    }
+    const auto invalid = cpu::pin_current_thread(INT_MAX);
+    cpu::restore_thread_affinity(invalid);
+    std::vector<int> after_public;
+    const bool public_unchanged = get_affinity(after_public) && before == after_public;
+    if (!helper_unchanged || invalid.valid || !public_unchanged)
+        std::fprintf(stderr, "Linux affinity test: failed pin changed the observed affinity or returned a valid snapshot\n");
+    return helper_unchanged && !invalid.valid && public_unchanged;
+}
+
+int main(int argc, char** argv) {
+    bool require_high = false;
+    for (int i = 1; i < argc; ++i) {
+        if (std::strcmp(argv[i], "--require-high-cpu") == 0) require_high = true;
+        else {
+            std::fprintf(stderr, "Unknown argument: %s\n", argv[i]);
+            return 2;
+        }
+    }
+
+    OriginalAffinity original;
+    if (!original.capture()) {
+        std::fprintf(stderr, "Linux affinity test: cannot capture original thread affinity\n");
+        return 1;
+    }
+    const auto allowed = original.ids();
+
+    bool ok = round_trip_full_mask(allowed) && worker_thread_can_pin(allowed.back());
+    if (ok) ok = round_trip_sparse_nested(allowed);
+    if (ok) ok = round_trip_high_cpu(allowed, require_high);
+    if (ok) ok = negative_cpu_is_noop();
+    if (ok) ok = failed_pin_preserves_affinity();
+    const bool restored = original.restore() && expect_affinity(allowed, "final original affinity cleanup");
+    if (!ok || !restored) return 1;
+
+    std::printf("Linux affinity test: full, sparse/nested, worker helper, invalid-target, failed-pin, and cleanup checks passed (%zu allowed CPUs)\n",
+                allowed.size());
+    return 0;
+}
+
+#else
+
+int main() {
+    std::puts("SKIP Linux affinity test: Linux is required");
+    return 0;
+}
+
+#endif
diff --git a/src/kernels/cpu/pool_affinity_test.cpp b/src/kernels/cpu/pool_affinity_test.cpp
new file mode 100644
index 00000000000..052ae59b233
--- /dev/null
+++ b/src/kernels/cpu/pool_affinity_test.cpp
@@ -0,0 +1,148 @@
+#include "strata/kernels/cpu/pool.hpp"
+#include "pool_affinity_win.hpp"
+
+#include <algorithm>
+#include <cstdio>
+#include <thread>
+#include <vector>
+
+namespace cpu = strata::kernels::cpu;
+
+static bool check(bool ok, const char* message) {
+    if (!ok) std::fprintf(stderr, "Windows affinity test: %s (error %lu)\n", message, (unsigned long) GetLastError());
+    return ok;
+}
+
+static bool select(const std::vector<ULONG>& ids) {
+    return SetThreadSelectedCpuSets(GetCurrentThread(), ids.empty() ? nullptr : ids.data(), (ULONG) ids.size()) != 0;
+}
+
+static bool selected_is(std::vector<ULONG> expected) {
+    std::vector<ULONG> actual;
+    if (!cpu::detail::get_thread_cpu_sets(actual)) return false;
+    std::sort(actual.begin(), actual.end());
+    std::sort(expected.begin(), expected.end());
+    return actual == expected;
+}
+
+// Establish reachability before the round trip: CPU Sets are soft affinity and cannot override an
+// existing job/hard-affinity restriction. Afterwards, require the same observable reachability.
+static bool observe(int core) {
+    for (int i = 0; i < 200; ++i) {
+        Sleep(1);
+        PROCESSOR_NUMBER current{};
+        GetCurrentProcessorNumberEx(&current);
+        if ((int) current.Group * 64 + current.Number == core) return true;
+    }
+    return false;
+}
+
+static bool host_round_trips(const std::vector<int>& cores, const std::vector<ULONG>& ids) {
+    if (!check(select({}), "clear initial thread CPU Sets")) return false;
+    std::vector<bool> reachable;
+    for (size_t i = 0; i < cores.size(); ++i) {
+        if (!check(select({ids[i]}), "select baseline CPU Set")) return false;
+        reachable.push_back(observe(cores[i]));
+    }
+    if (!check(select({}), "clear baseline CPU Sets")) return false;
+
+    for (size_t i = 0; i < cores.size(); ++i) {
+        const auto previous = cpu::pin_current_thread(cores[i]);
+        const bool pinned = previous.valid && previous.cpu_sets.empty() && selected_is({ids[i]});
+        cpu::restore_thread_affinity(previous);
+        if (!check(pinned && selected_is({}), "restore empty thread assignment")) return false;
+    }
+
+    // GetThreadGroupAffinity alone misses a lost implicit all-group state. Selecting each CPU Set
+    // again must still permit execution there, without ever setting a hard group affinity.
+    for (size_t i = 0; i < cores.size(); ++i) {
+        if (!check(select({ids[i]}), "select CPU Set after restore")) return false;
+        if (reachable[i]) {
+            if (!check(observe(cores[i]), "lost CPU/group eligibility after host restore")) return false;
+            std::printf("Host restore: still executes on group %d processor %d\n", cores[i] / 64, cores[i] & 63);
+        } else {
+            std::printf("SKIP scheduling observation for group %d: not reachable before test\n", cores[i] / 64);
+        }
+    }
+
+    // A nonempty selection may span groups. Nested host selections must restore the entire set.
+    if (!check(select(ids), "set existing multi-CPU selection")) return false;
+    const auto outer = cpu::pin_current_thread(cores.front());
+    const auto inner = cpu::pin_current_thread(cores.back());
+    const bool inner_ok = inner.valid && selected_is({ids.back()});
+    cpu::restore_thread_affinity(inner);
+    const bool outer_ok = outer.valid && selected_is({ids.front()});
+    cpu::restore_thread_affinity(outer);
+    if (!check(inner_ok && outer_ok && selected_is(ids), "restore nested / existing CPU Set selections")) return false;
+    const auto invalid = cpu::pin_current_thread(-1);
+    cpu::restore_thread_affinity(invalid);
+    if (!check(!invalid.valid && selected_is(ids), "invalid target must not mutate selection")) return false;
+    return check(select({}), "clear final host selection");
+}
+
+static bool inherited_default(int core, ULONG id, int temporary_core, ULONG temporary_id) {
+    ULONG count = 0;
+    if (!GetProcessDefaultCpuSets(GetCurrentProcess(), nullptr, 0, &count) &&
+        GetLastError() != ERROR_INSUFFICIENT_BUFFER) return false;
+    std::vector<ULONG> saved(count);
+    if (count && !GetProcessDefaultCpuSets(GetCurrentProcess(), saved.data(), count, &count)) return false;
+    saved.resize(count);
+    if (!check(SetProcessDefaultCpuSets(GetCurrentProcess(), &id, 1) != 0, "set process default")) return false;
+    bool ok = false;
+    std::thread host([&] {
+        if (!select({})) return;
+        const bool reachable = observe(core);
+        const auto previous = cpu::pin_current_thread(temporary_core);
+        const bool overridden = previous.valid && selected_is({temporary_id});
+        cpu::restore_thread_affinity(previous);
+        ULONG inherited = 0, required = 0;
+        ok = overridden && previous.cpu_sets.empty() && selected_is({}) &&
+             GetProcessDefaultCpuSets(GetCurrentProcess(), &inherited, 1, &required) &&
+             required == 1 && inherited == id && (!reachable || observe(core));
+    });
+    host.join();
+    const bool restored = SetProcessDefaultCpuSets(GetCurrentProcess(), saved.empty() ? nullptr : saved.data(),
+                                                  (ULONG) saved.size()) != 0;
+    return check(ok && restored, "restore inherited process default");
+}
+
+int main() {
+    const auto all = cpu::physical_cores(false);
+    std::vector<int> cores;
+    std::vector<ULONG> ids;
+    for (int core : all) {
+        if (std::any_of(cores.begin(), cores.end(), [core](int other) { return other / 64 == core / 64; })) continue;
+        ULONG id = 0;
+        if (!cpu::detail::cpu_set_for_core(core, id)) continue;
+        cores.push_back(core);
+        ids.push_back(id);
+    }
+    if (!check(!cores.empty(), "no usable CPU Sets")) return 1;
+    if (!check(cores.size() == GetActiveProcessorGroupCount(), "CPU Sets do not cover all active groups")) return 1;
+
+    // Hard pins belong on pool-owned threads; never contaminate the caller under test with one.
+    for (size_t i = 0; i < cores.size(); ++i) {
+        bool ok = false;
+        std::thread worker([&] {
+            if (!cpu::detail::set_thread_group_affinity(cores[i], (int) i)) return;
+            GROUP_AFFINITY pinned{};
+            if (!GetThreadGroupAffinity(GetCurrentThread(), &pinned)) return;
+            ok = pinned.Group == cores[i] / 64 && pinned.Mask == (KAFFINITY(1) << (cores[i] & 63));
+            // Host placement must also preserve an existing restrictive hard affinity.
+            const auto previous = cpu::pin_current_thread(cores.back());
+            cpu::restore_thread_affinity(previous);
+            GROUP_AFFINITY after{};
+            ok = ok && previous.valid && GetThreadGroupAffinity(GetCurrentThread(), &after) &&
+                 after.Group == pinned.Group && after.Mask == pinned.Mask;
+        });
+        worker.join();
+        if (!check(ok, "worker hard pin / caller hard-affinity preservation")) return 1;
+    }
+
+    bool host_ok = false;
+    std::thread host([&] { host_ok = host_round_trips(cores, ids); });
+    host.join();
+    if (!host_ok || !inherited_default(cores.back(), ids.back(), cores.front(), ids.front())) return 1;
+    std::printf("Windows affinity test: worker pins, host CPU Sets and process-default restoration passed (%zu groups)\n", cores.size());
+    return 0;
+}
diff --git a/src/kernels/cpu/pool_affinity_win.hpp b/src/kernels/cpu/pool_affinity_win.hpp
new file mode 100644
index 00000000000..6f0e4020227
--- /dev/null
+++ b/src/kernels/cpu/pool_affinity_win.hpp
@@ -0,0 +1,64 @@
+#pragma once
+
+#if defined(_WIN32)
+#ifndef WIN32_LEAN_AND_MEAN
+#define WIN32_LEAN_AND_MEAN
+#endif
+#include <windows.h>
+
+#include <cstdio>
+#include <cstddef>
+#include <vector>
+
+namespace strata::kernels::cpu::detail {
+
+// Hard affinity is only for pool-owned threads, which terminate with the pool. A caller's implicit
+// all-group affinity cannot be restored from PreviousGroupAffinity, so the host uses CPU Sets below.
+inline bool set_thread_group_affinity(int core, int worker) {
+    if (core < 0) return false;
+    GROUP_AFFINITY target{};
+    target.Group = (WORD) (core / 64);
+    target.Mask = KAFFINITY(1) << (core & 63);
+    if (SetThreadGroupAffinity(GetCurrentThread(), &target, nullptr)) return true;
+    std::fprintf(stderr, "strata cpu pool: SetThreadGroupAffinity for worker %d (group %u, mask 0x%llx) failed: %lu; previous affinity kept\n",
+                 worker, (unsigned) target.Group, (unsigned long long) target.Mask, (unsigned long) GetLastError());
+    return false;
+}
+
+inline bool get_thread_cpu_sets(std::vector<ULONG>& ids) {
+    ULONG count = 0;
+    if (!GetThreadSelectedCpuSets(GetCurrentThread(), nullptr, 0, &count) &&
+        GetLastError() != ERROR_INSUFFICIENT_BUFFER) return false;
+    ids.resize(count);
+    if (count == 0) return true;
+    if (!GetThreadSelectedCpuSets(GetCurrentThread(), ids.data(), count, &count)) return false;
+    ids.resize(count);
+    return true;
+}
+
+// CPU Set IDs are opaque: find the entry by both group and group-relative processor number.
+inline bool cpu_set_for_core(int core, ULONG& id) {
+    ULONG bytes = 0;
+    if (!GetSystemCpuSetInformation(nullptr, 0, &bytes, GetCurrentProcess(), 0) &&
+        GetLastError() != ERROR_INSUFFICIENT_BUFFER) return false;
+    std::vector<unsigned char> buffer(bytes);
+    if (bytes && !GetSystemCpuSetInformation(reinterpret_cast<PSYSTEM_CPU_SET_INFORMATION>(buffer.data()),
+                                            bytes, &bytes, GetCurrentProcess(), 0)) return false;
+    constexpr size_t header_size = offsetof(SYSTEM_CPU_SET_INFORMATION, CpuSet);
+    for (size_t offset = 0; offset + header_size <= bytes;) {
+        const auto* info = reinterpret_cast<const SYSTEM_CPU_SET_INFORMATION*>(buffer.data() + offset);
+        if (info->Size < header_size || info->Size > bytes - offset) break;
+        if (info->Type == CpuSetInformation && info->Size >= sizeof(SYSTEM_CPU_SET_INFORMATION) && info->CpuSet.Group == core / 64 &&
+            info->CpuSet.LogicalProcessorIndex == (core & 63) &&
+            (!info->CpuSet.Allocated || info->CpuSet.AllocatedToTargetProcess)) {
+            id = info->CpuSet.Id;
+            return true;
+        }
+        offset += info->Size;
+    }
+    SetLastError(ERROR_NOT_FOUND);
+    return false;
+}
+
+}  // namespace strata::kernels::cpu::detail
+#endif

From 9564c7373adfc933b92e5e7dbd16f6c6820b87b2 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 01:32:46 +0200
Subject: [PATCH 180/201] #465 tools: batch_interleave_test.py (a prompt read
 beside decoding slots, BYIELD, a next turn from its slot); batch_test.py on
 Windows

batch_test.py: the engine log in the temp folder, the CUDA DLLs on PATH, ASCII output, --mt-min (empty: the
engine's default kernels, for the invariance check without the exact settings).  server: /metrics live.waiting
and live.outside_slots instead of a guessed count.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/server.py                |   8 +-
 tools/batch_interleave_test.py | 189 +++++++++++++++++++++++++++++++++
 tools/batch_test.py            |  17 ++-
 3 files changed, 205 insertions(+), 9 deletions(-)
 create mode 100644 tools/batch_interleave_test.py

diff --git a/serve/server.py b/serve/server.py
index 15e8de13d18..241503542bc 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -2017,11 +2017,11 @@ def metrics(self, all_requests=False) -> dict:
         if par:                                         # #465: the requests running together, slot by slot
             with self.status_lock:
                 running = len(self.live_reqs)
-            waiting = int(getattr(self.engine, "waiting", 0) or 0)
             slots = self.engine.slots_view() if hasattr(self.engine, "slots_view") else []
-            busy_slots = sum(1 for x in slots if x["state"] != "idle")
-            live.update(parallel=par, running=running, slots=slots,
-                        waiting_for_slot=max(0, running - busy_slots) if running > busy_slots else waiting)
+            # the requests in flight that are not in a slot: the one alone on the solo path, or waiting their turn
+            in_slots = sum(1 for x in slots if x["state"] != "idle")
+            live.update(parallel=par, running=running, slots=slots, outside_slots=max(0, running - in_slots),
+                        waiting=int(getattr(self.engine, "waiting", 0) or 0))
             if running and state == "idle":
                 live["state"] = "generating"
         engine = {"model": self.model, "max_context": self.engine.max_context, "images": self.vision is not None,
diff --git a/tools/batch_interleave_test.py b/tools/batch_interleave_test.py
new file mode 100644
index 00000000000..9b2a1a7ffdc
--- /dev/null
+++ b/tools/batch_interleave_test.py
@@ -0,0 +1,189 @@
+#!/usr/bin/env python3
+"""Batch slots, the parts batch_test.py does not reach (#465): a long prompt read WHILE other slots decode (its
+chunks interleaved with their windows), and a conversation's next turn continued from the slot that holds it.
+
+  1. solo references (GEN): A, then A's next turn (from the live session), B, C (a long prompt)
+  2. the same in the slots: A in slot 0, B in slot 1 next to it, then C in slot 2 while A and B decode - every slot's
+     tokens must equal its solo tokens
+  3. A's next turn (BGEN into slot 0, which still holds A): read from the slot, its tokens must equal the solo next turn
+
+Exact comparisons need the same settings as batch_test.py (this script sets STRATA_IQ_MT_MIN=1):
+  python tools/batch_interleave_test.py --exe build/strata --config strata-<model>.json \\
+      --extra "--pcie-frac 0 --adapt-every 1000000 --no-prefill-borrow"
+Without --no-prefill-borrow the slots decoding during C's read see the expert cache without the slots C's prompt
+borrowed (those experts run on the CPU, which rounds differently): A's and B's text may then drift from solo.
+"""
+import argparse, json, os, sys, time
+from pathlib import Path
+
+sys.path.insert(0, str(Path(__file__).resolve().parent))
+from batch_test import Engine, tokenizer  # noqa: E402
+
+LONG = ("The history of mathematics is long and full of surprising turns. Early civilizations counted with tally marks, "
+        "then with symbols, and later with place-value systems that made arithmetic far easier. ")
+
+
+def run(eng, out, line, slot=None):
+    """Send one GEN/BGEN; returns (tokens of the request line, the BADM flag) - BT/BDONE of other slots are kept."""
+    eng.send(line)
+    got = []
+    for l in out:
+        if l.startswith("T "):
+            got.append(int(l.split()[1]))
+        elif l.startswith(("BT ", "BDONE ")):
+            eng.pending.append(l)
+        elif l.startswith("ERR"):
+            raise SystemExit("engine: " + l)
+        elif slot is None and l.startswith("DONE"):
+            return got, None
+        elif slot is not None and l.startswith("BADM "):
+            return got, l.split()[2] == "1"
+    raise SystemExit(f"the engine ended during: {line[:40]} (see {eng.log_path})")
+
+
+def main():
+    ap = argparse.ArgumentParser()
+    ap.add_argument("--exe", required=True)
+    ap.add_argument("--config", required=True)
+    ap.add_argument("--max-new", type=int, default=200)
+    ap.add_argument("--long", type=int, default=5000, help="tokens of the long prompt C (several prompt chunks)")
+    ap.add_argument("--extra", default="")
+    a = ap.parse_args()
+    cfg = json.loads(Path(a.config).read_text())
+    tok = tokenizer(cfg["tokenizer"])
+
+    def chat(q):
+        return tok.encode(f"<|im_start|>user\n{q}<|im_end|>\n<|im_start|>assistant\n<think>\n\n</think>\n\n",
+                          parse_special=True)
+    body = LONG * (a.long // max(1, len(tok.encode(LONG))) + 1)
+    A = chat("Write a Python function that merges overlapping intervals, then explain it.")
+    B = chat("Compare TCP and QUIC: handshake, congestion control, multiplexing.")
+    C = chat(body + "\nSummarize the text above in three sentences.")
+    D = chat(body + "\nWhat are the three most important ideas in the text above?")
+    E = chat("Describe the life cycle of a star like the Sun.")
+    print(f"prompts: A {len(A)}, B {len(B)}, C {len(C)} tokens", flush=True)
+    eng = Engine(a.exe, cfg, 3, {"STRATA_IQ_MT_MIN": "1"}, a.extra.split())
+    eng.pending = []
+    out = eng.lines()
+    ids = lambda v: ",".join(map(str, v))
+    M = a.max_new
+
+    # 1. solo
+    sA, _ = run(eng, out, f"GEN {M} {ids(A)}")
+    A2 = A + sA + chat("Now do the same in Rust.")
+    sA2, _ = run(eng, out, f"GEN {M} {ids(A2)}")
+    sB, _ = run(eng, out, f"GEN {M} {ids(B)}")
+    sC, _ = run(eng, out, f"GEN {M} {ids(C)}")
+    sD, _ = run(eng, out, f"GEN {M} {ids(D)}")
+    sE, _ = run(eng, out, f"GEN {M} {ids(E)}")
+    print(f"solo: A {len(sA)}, A2 {len(sA2)}, B {len(sB)}, C {len(sC)}, D {len(sD)}, E {len(sE)} tokens", flush=True)
+
+    # 2. the slots: A, B, then the long C while they decode
+    got = {0: [], 1: [], 2: []}
+    done = {}
+    t0 = time.time()
+    for s, P in ((0, A), (1, B), (2, C)):
+        first, cont = run(eng, out, f"BGEN {s} {M} {ids(P)}", slot=s)
+        got[s] += first
+        if not cont:
+            done[s] = True
+    t_admit = time.time() - t0
+    during_c = sum(1 for l in eng.pending if l.startswith("BT "))   # windows the slots ran while C was admitted
+
+    def drain():
+        while eng.pending or len(done) < 3:
+            l = eng.pending.pop(0) if eng.pending else next(out)
+            if l.startswith("BT "):
+                _, s, y = l.split()
+                got[int(s)].append(int(y))
+            elif l.startswith("BDONE "):
+                done[int(l.split()[1])] = True
+            elif l.startswith("ERR"):
+                raise SystemExit("engine: " + l)
+    drain()
+    print(f"slots: admissions {t_admit:.1f}s; {during_c} slot tokens arrived while the admissions read their prompts",
+          flush=True)
+    ok = True
+    for s, ref, name in ((0, sA, "A"), (1, sB, "B"), (2, sC, "C")):
+        same = got[s] == ref
+        ok &= same
+        d = next((k for k in range(min(len(got[s]), len(ref))) if got[s][k] != ref[k]), None)
+        print(f"slot {s} ({name}): {len(got[s])} tokens, solo {len(ref)}: "
+              f"{'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
+
+    # 3. A's next turn from slot 0 (the engine's log says "slot 0 gave back ...")
+    first, cont = run(eng, out, f"BGEN 0 {M} {ids(A2)}", slot=0)
+    got2, done = first, {}
+    if cont:
+        while True:
+            l = eng.pending.pop(0) if eng.pending else next(out)
+            if l.startswith("BT 0 "):
+                got2.append(int(l.split()[2]))
+            elif l.startswith("BDONE 0 "):
+                break
+    same = got2 == sA2
+    ok &= same
+    d = next((k for k in range(min(len(got2), len(sA2))) if got2[k] != sA2[k]), None)
+    print(f"A's next turn from its slot: {len(got2)} tokens, solo {len(sA2)}: "
+          f"{'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
+    # 4. a long prompt D gives way (BYIELD) to a short E at its first chunk boundary, then goes on from its slot
+    eng.send(f"BGEN 2 {M} {ids(D)}")
+    eng.send("BYIELD 2")
+    yielded = None
+    for l in out:
+        if l.startswith("YIELDED "):
+            yielded = l
+        elif l.startswith(("BT ", "BDONE ")):
+            eng.pending.append(l)
+        elif l.startswith("ERR"):
+            raise SystemExit("engine: " + l)
+        elif l.startswith("BADM 2 "):
+            break
+    print(f"D gave way: {yielded}", flush=True)
+    ok &= yielded is not None
+    got4 = {1: [], 2: []}
+    first, cont1 = run(eng, out, f"BGEN 1 {M} {ids(E)}", slot=1)
+    got4[1] += first
+    first, cont2 = run(eng, out, f"BGEN 2 {M} {ids(D)}", slot=2)
+    got4[2] += first
+    done4 = {s for s, c in ((1, cont1), (2, cont2)) if not c}
+    while len(done4) < 2:
+        l = eng.pending.pop(0) if eng.pending else next(out)
+        if l.startswith("BT "):
+            _, s, y = l.split()
+            if int(s) in got4:
+                got4[int(s)].append(int(y))
+        elif l.startswith("BDONE "):
+            done4.add(int(l.split()[1]))
+    for s, ref, name in ((1, sE, "E (short, admitted while D waited)"), (2, sD, "D (gave way, then went on)")):
+        same = got4[s] == ref
+        ok &= same
+        d = next((k for k in range(min(len(got4[s]), len(ref))) if got4[s][k] != ref[k]), None)
+        print(f"slot {s} {name}: {len(got4[s])} tokens, solo {len(ref)}: "
+              f"{'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
+    # 5. (a measurement, not a check) a SOLO next turn continued from slot 0: its tokens are exact either way, but the
+    # draft layer's own K/V was built for another conversation, so fewer drafts may be accepted than in a solo next
+    # turn whose drafter read the conversation (A2 in step 1)
+    A3 = A2 + got2 + chat("Now in Go.")
+    eng.send(f"GEN {M} {ids(A3)}")
+    for l in out:
+        if l.startswith(("BT ", "BDONE ")):
+            eng.pending.append(l)
+        elif l.startswith("DONE"):
+            f = l.split()
+            print(f"solo next turn from a slot: drafts accepted {f[6]} of {f[7]} ({f[1]} tokens in {f[4]} ms)",
+                  flush=True)
+            break
+    eng.send("QUIT")
+    eng.p.wait(timeout=180)
+    log = Path(eng.log_path).read_text(errors="replace")
+    for l in log.splitlines():
+        if "drafts accepted" in l:
+            print("  log:", l.split("strata serve: ")[-1][:160], flush=True)
+    for key in ("gave back", "takes", "the prompt was read in", "gives way"):
+        print(f"engine log '{key}': {log.count(key)} lines", flush=True)
+    return 0 if ok else 2
+
+
+if __name__ == "__main__":
+    sys.exit(main())
diff --git a/tools/batch_test.py b/tools/batch_test.py
index 835b1c4e806..4cb76027d10 100644
--- a/tools/batch_test.py
+++ b/tools/batch_test.py
@@ -5,7 +5,7 @@
   python3 tools/batch_test.py --exe engine/strata --config strata-<model>.json --batch 4 --n 4 \
       --extra "--layer-split 12,24,36 --trim-stage-weights --pcie-frac 0 --adapt-every 1000000"
 """
-import argparse, json, os, subprocess, sys, threading, time
+import argparse, json, os, subprocess, sys, tempfile, threading, time
 from pathlib import Path
 
 sys.path.insert(0, str(Path(__file__).resolve().parent))
@@ -44,13 +44,16 @@ def __init__(self, exe, cfg, batch, extra_env, extra_args):
         args += extra_args
         env = dict(os.environ, **extra_env)
         env["LD_LIBRARY_PATH"] = ":".join(cfg.get("lib_dirs", []) + [env.get("LD_LIBRARY_PATH", "")])
-        self.log = open("/tmp/batch_test_engine.log", "w")
+        if os.name == "nt":
+            env["PATH"] = os.pathsep.join(cfg.get("lib_dirs", []) + [env.get("PATH", "")])
+        self.log_path = os.environ.get("BATCH_TEST_LOG") or os.path.join(tempfile.gettempdir(), "batch_test_engine.log")
+        self.log = open(self.log_path, "w")
         self.p = subprocess.Popen([exe, "--serve", *args], cwd=cfg.get("cwd"), stdin=subprocess.PIPE,
                                   stdout=subprocess.PIPE, stderr=self.log, text=True, bufsize=1, env=env)
         for line in self.p.stdout:
             if line.startswith("READY"):
                 return
-        raise SystemExit("the engine ended before READY - see /tmp/batch_test_engine.log")
+        raise SystemExit(f"the engine ended before READY - see {self.log_path}")
 
     def send(self, line):
         self.p.stdin.write(line + "\n")
@@ -71,6 +74,7 @@ def main():
     ap.add_argument("--skip-solo", action="store_true")
     ap.add_argument("--keys", default="", help='sampling keys for every request, e.g. "temperature=0.7 top_k=20"')
     ap.add_argument("--extra", default="", help='more engine arguments in one string, e.g. "--adapt-every 1000000"')
+    ap.add_argument("--mt-min", default="1", help="STRATA_IQ_MT_MIN for the engine (1: exact; empty: the default)")
     a = ap.parse_args()
     cfg = json.loads(Path(a.config).read_text())
     tok = tokenizer(cfg["tokenizer"])
@@ -78,7 +82,10 @@ def main():
     for q in QUESTIONS[: a.n]:
         text = f"<|im_start|>user\n{q}<|im_end|>\n<|im_start|>assistant\n<think>\n\n</think>\n\n"
         prompts.append(tok.encode(text, parse_special=True))
-    eng = Engine(a.exe, cfg, a.batch, {"STRATA_IQ_MT_MIN": "1", "STRATA_DECODE_TIMING": "1", **({"STRATA_VERIFY_PROFILE": "1"} if os.environ.get("PROF") else {})}, a.extra.split())
+    env = {"STRATA_DECODE_TIMING": "1", **({"STRATA_VERIFY_PROFILE": "1"} if os.environ.get("PROF") else {})}
+    if a.mt_min:
+        env["STRATA_IQ_MT_MIN"] = a.mt_min
+    eng = Engine(a.exe, cfg, a.batch, env, a.extra.split())
     out = eng.lines()
 
     solo = []
@@ -144,7 +151,7 @@ def main():
             ok &= same
             first_diff = next((k for k in range(min(len(b), len(solo[i]))) if b[k] != solo[i][k]), None)
             print(f"slot {i}: {len(b)} tokens, solo {len(solo[i])}: {'IDENTICAL' if same else f'DIFFERS at {first_diff}'}")
-        print("   ", repr(tok.decode(b)[:160]))
+        print("   ", ascii(tok.decode(b)[:160]))
     eng.send("QUIT")
     eng.p.wait(timeout=180)   # the next run needs the GPUs back
     return 0 if ok else 2

From ab86bb4db3e7f1909d01a4b61a1af790640e07e6 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 02:13:51 +0200
Subject: [PATCH 181/201] docs: Older CPUs (experimental) - what setup does on
 a CPU without AVX2, what was measured

INSTALL.md gets the section (the build setup compiles, what differs, the forced-path numbers from a
Ryzen 5 7600 + RTX 5070, what is untested); the CPU rows of INSTALL.md / DETAILS.md and AI_SETUP.md
point to it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/AI_SETUP.md |  2 +-
 docs/DETAILS.md  |  2 +-
 docs/INSTALL.md  | 37 +++++++++++++++++++++++++++++++++----
 3 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/docs/AI_SETUP.md b/docs/AI_SETUP.md
index 8b6e1bb96c6..24f3da2ec40 100644
--- a/docs/AI_SETUP.md
+++ b/docs/AI_SETUP.md
@@ -48,7 +48,7 @@ Requirements (details: [INSTALL.md](INSTALL.md#what-you-need)):
 - **Driver:** NVIDIA 580 or newer. AMD on Linux: the kernel's amdgpu driver; on Windows: a current AMD Adrenalin
   driver. If the driver is missing or too old, tell the user to update it (NVIDIA App / nvidia.com/drivers, or AMD
   Software) and restart; do not install drivers yourself unless they ask.
-- **RAM:** 32 GB or more (see step 3). **Disk:** ~80 GB free, ideally on an NVMe SSD. **CPU:** x86-64 with AVX2.
+- **RAM:** 32 GB or more (see step 3). **Disk:** ~80 GB free, ideally on an NVMe SSD. **CPU:** x86-64 with AVX2. Without AVX2 (Xeon E5 v1/v2 and older) setup still installs, as an experimental and slow build it compiles on the PC (10-20 minutes): tell the user that before starting ([INSTALL.md](INSTALL.md#older-cpus-experimental)).
 - **OS:** Windows 10/11 or Linux (Ubuntu 22.04/24.04 are fully automatic).
 
 If the PC does not meet them, say which part is missing and stop.
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index dc64a554c33..a8935ccce8f 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -303,7 +303,7 @@ Everything else is installed for you the first time.
 | --- | --- |
 | GPU | NVIDIA **RTX 20, 30, 40 or 50 series**, **12 GB VRAM or more** (8 GB runs, slowly). Measured on an RTX 5070 and an RTX 3090; RTX 20 (Turing, since 0.1.27) was tested by a contributor on an RTX 2070. Or AMD **Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700, RX 6800 / 6900 series**: [AMD_HIP.md](AMD_HIP.md). |
 | RAM | **64 GB** recommended (see the table above). |
-| CPU | x86-64 with AVX2 (any Intel/AMD desktop CPU from the last ~8 years). AVX-512 (Ryzen 7000/9000) is a bit faster. |
+| CPU | x86-64 with AVX2 (any Intel/AMD desktop CPU from the last ~8 years). AVX-512 (Ryzen 7000/9000) is a bit faster. Older CPUs without AVX2 are experimental and slow: [Older CPUs](INSTALL.md#older-cpus-experimental). |
 | Disk | ~70-80 GB free for the model, ~6 GB for the MTP layer (+1 GB with images). **Q2_0 on an AVX-512 CPU** also writes a one-time ~40 GB pack for the fast CPU kernel (34 GB of experts in its layout, plus the dense weights). An NVMe SSD is strongly recommended. |
 | OS | Windows 10/11, or Linux (Ubuntu 22.04/24.04 get everything installed automatically). |
 
diff --git a/docs/INSTALL.md b/docs/INSTALL.md
index bc77768b2c3..4ab28fb12c9 100644
--- a/docs/INSTALL.md
+++ b/docs/INSTALL.md
@@ -5,9 +5,9 @@ AMD graphics card. The short version is in the [README](../README.md#install); a
 this for you with [AI_SETUP.md](AI_SETUP.md).
 
 > **On this page:** [What you need](#what-you-need) · [Windows](#windows) · [Linux](#linux) ·
-> [AMD cards](#amd-cards) · [Several cards](#two-or-three-cards) · [Docker](#docker-linux) · [Updating](#updating) ·
-> [Where things are stored](#where-things-are-stored) · [Setup's questions](#setups-questions) ·
-> [Tuning](#tuning-for-your-pc) · [All options](#options-without-questions)
+> [AMD cards](#amd-cards) · [Several cards](#two-or-three-cards) · [Docker](#docker-linux) ·
+> [Older CPUs](#older-cpus-experimental) · [Updating](#updating) · [Where things are stored](#where-things-are-stored) ·
+> [Setup's questions](#setups-questions) · [Tuning](#tuning-for-your-pc) · [All options](#options-without-questions)
 
 ## What you need
 
@@ -15,7 +15,7 @@ this for you with [AI_SETUP.md](AI_SETUP.md).
 | --- | --- |
 | **GPU** | **NVIDIA** RTX 20, 30, 40 or 50 series, **12 GB VRAM or more** (8 GB runs, slowly). Measured on an RTX 5070 and an RTX 3090; RTX 20 (Turing, since 0.1.27) was tested by a contributor on an RTX 2070. **AMD** Radeon RX 7900 XT / XTX, RX 9070 / 9070 XT and Radeon AI PRO R9700 (validated), RX 7800 XT / 7700 XT and RX 9060 XT (validated by their owners), RX 6800 / 6900 series (community-reported), with 12 GB of VRAM or more. See [AMD cards](#amd-cards). |
 | **RAM** | Enough for the size you pick ([which model](MODELS.md#pick-by-ram)); **64 GB** runs every size. A big GPU makes up for less RAM - the [low-RAM mode](MODELS.md#a-big-graphics-card-and-little-ram). |
-| **CPU** | x86-64 with AVX2 (any Intel/AMD desktop CPU from the last ~8 years). AVX-512 (Ryzen 7000/9000) is a bit faster. |
+| **CPU** | x86-64 with AVX2 (any Intel/AMD desktop CPU from the last ~8 years). AVX-512 (Ryzen 7000/9000) is a bit faster. Older CPUs without AVX2 are experimental and slow: [Older CPUs](#older-cpus-experimental). |
 | **Disk** | ~70-80 GB free for the model, ~6 GB for the MTP layer (+1 GB with images). **Q2_0 on an AVX-512 CPU** also writes a one-time ~40 GB copy of its experts for the fast CPU kernel. On Linux with an AMD card, ROCm takes ~10 GB more when setup installs it. An NVMe SSD is strongly recommended: it makes the first start much faster. |
 | **OS** | Windows 10/11, or Linux (Ubuntu 22.04/24.04 get everything installed automatically). |
 | **Driver** | **NVIDIA:** a current driver, version 580 or newer ([nvidia.com/drivers](https://www.nvidia.com/drivers) or the NVIDIA App). **AMD:** on Linux the kernel's amdgpu driver (no ROCm install needed); on Windows a current AMD Software: Adrenalin Edition driver ([amd.com/support](https://www.amd.com/en/support)). |
@@ -121,6 +121,35 @@ The same idea, in a container (NVIDIA cards).
    to a network. The image has a `HEALTHCHECK` on `/health`, so `docker ps` shows the container
    healthy once the model is loaded, and `GET /v1/status` says what it is running.
 
+## Older CPUs (experimental)
+
+Strata's ready-made engine needs AVX2 (Intel Haswell 2013, AMD Zen 2017 or newer). Since 0.1.39 an older CPU - AVX
+only (Sandy Bridge / Ivy Bridge, Xeon E5 v1/v2, AMD Bulldozer) or SSE4.2 only (Nehalem / Westmere, Xeon X5600) - runs
+as an **experimental** build that setup compiles on that PC. Run setup as usual: it says the CPU has no AVX2, warns
+that this is experimental and slow, and compiles the engine (10-20 minutes, once; Windows needs the Visual Studio Build
+Tools and the CUDA Toolkit, which setup offers to install). It does not stop. The ready-made engine still refuses such
+a CPU, and says so.
+
+What differs in that build (`STRATA_ISA_FLOOR=avx` or `none`, chosen from the CPU):
+
+- ggml-cpu is compiled for AVX or SSE4.2 instead of AVX2, and the CPU's share of the experts runs on its kernels.
+  Strata's own AVX2 / AVX-512 kernels stay in the program but are used only on a CPU that has them.
+- Only the i-quant models' packs run (every model setup installs on such a CPU); the AVX-512 Q2_0 pack does not.
+- Speed: the GPU part is unchanged and the CPU part is slower, so a GPU with more VRAM (more experts cached there)
+  helps most. With the older paths forced on a Ryzen 5 7600 + RTX 5070 and the expert cache held at 1500 slots, greedy
+  decode went from 26 to 11-17 tok/s with the AVX build and to 3.5-3.8 tok/s with the SSE4.2 build (Coder and IQ3_XXS,
+  10 prompts each, one run). An old Xeon with DDR3 will be slower than these.
+- Untested on a real old CPU by us. It was checked here by forcing the older paths on a Ryzen 5 7600
+  (`STRATA_FORCE_ISA=avx` or `sse`): the answers were sane and passed the engine's checks, but not the same token for
+  token as the normal build (ggml-cpu rounds the CPU experts differently, as the AVX2 kernel does from the AVX-512
+  one). Contributors ran earlier versions of the same approach on a Xeon E5-2680 (2.87 tok/s with a GTX 1080 Ti)
+  and on Xeon E5-2687W / X5690 machines.
+- AMD cards: Linux only (setup compiles the AMD engine there anyway); NVIDIA on Windows and Linux.
+- Two-socket Xeons: memory on the other socket is slow; keep the RAM on one CPU if you can.
+
+By hand: `cmake ... -DSTRATA_ISA_FLOOR=avx` (or `none`) builds it; `STRATA_ISA_FLOOR=avx` set for setup builds it on
+any PC (to try it). Problems and results on real hardware are welcome as GitHub issues.
+
 ## Updating
 
 **`UPDATE.bat`** (Linux: `./update.sh`) updates Strata without starting the model - for when the GPU is busy with

From 95562988f71e33d4dc9dbbb403acb48ace9a2241 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 02:38:16 +0200
Subject: [PATCH 182/201] #465 a request left alone in a slot goes back to the
 solo path; docs: BATCHING.md for one GPU, measured on the RTX 5070

server: a request decoding in a slot whose neighbours finished (no other slot busy, nobody waiting, at least 32
tokens allowed) is BSTOPped and continued on the solo path with its MTP drafts - the engine copies the slot's
sessions back (INFO slot_cache=1; at most twice per request; STRATA_PARALLEL_SOLO=0 keeps it in the slot).
engine: INFO batch_slots=N slot_cache=0|1.
tools/batch_interleave_test.py: the back-to-solo path, and a next turn from a slot's turn checkpoint (a client
that drops the reply's thinking).
docs: "parallel": N, what a slot costs and what setup recommends, the server's handling (interleaved prompt reads,
BYIELD, slot conversation cache, back to solo), exactness and its settings, the RTX 5070 measurements (the slots
buy waiting time, not speed, on a 12 GB card), the protocol; DETAILS / README / AI_SETUP mention the option.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 README.md                      |   3 +-
 docs/AI_SETUP.md               |   3 +-
 docs/BATCHING.md               | 134 ++++++++++++---
 docs/DETAILS.md                |   5 +-
 serve/server.py                | 290 +++++++++++++++++++--------------
 serve/test_parallel.py         |  38 ++++-
 tools/batch_interleave_test.py |  50 +++++-
 7 files changed, 361 insertions(+), 162 deletions(-)

diff --git a/README.md b/README.md
index b702820a699..1b3a3260222 100644
--- a/README.md
+++ b/README.md
@@ -134,7 +134,8 @@ Sizes, downloads and what fits where: [docs/MODELS.md](docs/MODELS.md). You can
 - **Pictures:** say yes to "Images?" in setup, then click **Picture** in the chat, or attach them in your app
   (AMD cards: on Linux through the processor, not on Windows yet).
 - **From your phone or another PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>` - always with a key.
-- **Good to know:** it answers one request at a time. The first message of a chat is read in full (about 1 minute
+- **Good to know:** it answers one request at a time (several at once is opt-in: `"parallel": 2`,
+  [BATCHING.md](docs/BATCHING.md)). The first message of a chat is read in full (about 1 minute
   per 30,000 tokens); follow-ups start in seconds.
 
 More: [where your chats are stored](docs/INSTALL.md#where-things-are-stored), [the API](docs/DETAILS.md#using-it).
diff --git a/docs/AI_SETUP.md b/docs/AI_SETUP.md
index 8b6e1bb96c6..e1679b38568 100644
--- a/docs/AI_SETUP.md
+++ b/docs/AI_SETUP.md
@@ -173,7 +173,8 @@ line when it is ready; the engine log is `strata-<model>.log` in the Strata fold
 - **Claude Code:** `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`, `ANTHROPIC_MODEL` set to a Claude model name it knows
   (Strata ignores the name), and any `ANTHROPIC_AUTH_TOKEN` (or the configured key).
 - **Thinking level:** `"reasoning_effort": "none" | "low" | "medium" | "high"` (default high).
-- Strata answers one request at a time. API details: [DETAILS.md](DETAILS.md#using-it).
+- Strata answers one request at a time; `"parallel": N` in the model's config (or setup `--parallel N`) decodes up to
+  N together ([BATCHING.md](BATCHING.md)). API details: [DETAILS.md](DETAILS.md#using-it).
 
 ## 9. When something fails
 
diff --git a/docs/BATCHING.md b/docs/BATCHING.md
index 9637b470060..cdce5fea4dc 100644
--- a/docs/BATCHING.md
+++ b/docs/BATCHING.md
@@ -1,16 +1,24 @@
-# Several conversations at once (batch slots)
+# Several requests at once (batch slots)
 
-By default Strata serves **one request at a time**: the others wait in the server's queue. With `--batch N`
-the engine keeps up to N conversations open and decodes them **together**: every verify window then carries one
-token of each conversation, so the dense weights, the shared expert and the head are read once per window for
-all of them. Combined with a layer split across several GPUs and `--batch-groups`, the cards also work on
-different conversations at the same time instead of waiting for each other.
+By default Strata serves **one request at a time**: the others wait in the server's queue. With `"parallel": N`
+(the engine's `--batch N`, also spelled `--slots N`) the engine keeps up to N conversations open and decodes them
+**together**: every verify window then carries one token of each conversation, so the dense weights, the shared
+expert, the head and every routed expert two conversations share are read once per window for all of them.
+Combined with a layer split across several GPUs and `--batch-groups`, the cards also work on different
+conversations at the same time instead of waiting for each other.
 
-It is opt-in and changes nothing when the options are absent.
+It is opt-in and changes nothing when the options are absent (#465; the engine part is PR #559).
 
 ## Turning it on
 
-Add the options to the `args` list of the model's config (`strata-<model>.json`) and restart:
+One GPU: add `"parallel": 2` to the model's config (`strata-<model>.json`) and restart, or run setup with
+`--parallel 2`. Setup says what it recommends for the card (below); a larger number is kept as asked, with a note.
+
+```
+"parallel": 2
+```
+
+With a layer split, the engine options go into the config's `args`:
 
 ```
 "args": [ ..., "--batch", "8", "--batch-groups", "4", "--trim-stage-weights" ],
@@ -19,36 +27,79 @@ Add the options to the `args` list of the model's config (`strata-<model>.json`)
 
 | Option | What it does |
 | --- | --- |
-| `--batch N` (2..8) | up to N conversations decoded together. Each slot gets its own state (a session carved like the stage's own: GDN recurrence, QSA K/V and indexer, PLE history) on every GPU of the split. |
+| `"parallel": N` / `--batch N` / `--slots N` (2..8) | up to N conversations decoded together; more requests wait for a free slot. Each slot gets its own state (a session carved like the stage's own: GDN recurrence, QSA K/V and indexer, PLE history) on every GPU of the split. |
 | `--batch-groups G` | with a layer split: the N slots in G groups that flow through the GPUs as a pipeline (GPU k runs one group while GPU k+1 runs another). G must divide N. 1 = all slots in one window, GPU after GPU. |
-| `--trim-stage-weights` | with an **explicit** `--layer-split` (e.g. `12,24,36`, not `auto`): every GPU loads only the dense weights of its own layers instead of the whole model's. The VRAM this frees goes to the expert cache - which is what makes batching pay, since several conversations together touch more distinct experts than one. Useful without `--batch` too. |
+| `--trim-stage-weights` | with an **explicit** `--layer-split` (e.g. `12,24,36`, not `auto`): every GPU loads only the dense weights of its own layers instead of the whole model's (the same as `STRATA_STAGE_TRIM=1`, PR #639). The VRAM this frees goes to the expert cache. Useful without `--batch` too. |
 
-The server needs nothing else: it reads `--batch` / `--batch-groups` from the engine's arguments.
+The engine never refuses a count it cannot run: it says so in its log and runs what it can - at most 8 slots (a
+window holds 8 rows), as many as fit in VRAM, or none (one request at a time) when not two fit. The server reads
+the count the engine reports (`INFO batch_slots=N`), and `GET /v1/status` says it (`concurrency.serving`).
+
+### What a slot costs, and what setup recommends
+
+Every slot's session takes VRAM that the expert cache would otherwise hold: 0.56 GiB at a 32K context with 8-bit
+KV, more with a longer context unless the KV cache streams (`--kv-resident`: then only the attention's 32K window
+stays in VRAM, and each slot's whole KV cache takes pinned RAM - 1.6 GB at 128K). On a card whose experts mostly run
+on the CPU, a batch also reads about as many distinct experts as the requests one by one (different conversations
+route to different experts), so the gain is in **latency** (nobody waits for a whole answer), and a request alone
+runs a little slower (the smaller expert cache) - see the measurements below. Setup recommends as many slots as take
+at most a fifth of the expert cache (~VRAM less 5 GB), up to 4: 2 on a 12 GB card, 3 on 16 GB, 4 from 24 GB; none
+below 12 GB.
 
 ## How the server uses the slots
 
 - **One request alone** runs on the usual solo path (verify windows with MTP drafts): the fastest single stream.
 - **When a second request arrives**, the first is stopped (`STOP`) and continues in a batch slot with its prompt
   plus what it generated so far - the engine's prompt cache holds exactly that, so nothing is read again - and the
-  new request is admitted next to it.
+  new request is admitted next to it. A request in a slot decodes **without MTP drafts** (one token per window).
+- **A request left alone in a slot** (the others finished, nobody waits) goes back to the solo path: the slot is
+  stopped, the engine copies its sessions back and decodes with MTP drafts again (at most twice per request; with
+  `--prompt-cache 0` it stays in the slot; `STRATA_PARALLEL_SOLO=0` turns it off). The draft layer's own K/V was
+  built for another conversation then, but measured it accepted as many drafts (140 of 172) as a draft layer that
+  read the conversation (140 of 173).
+- **More requests than slots** wait for a free one (`/metrics` -> `live.slots` shows each slot: idle, reading or
+  decoding, its tokens and tok/s; `live.running` the requests in flight).
 - **Each admission** reads the request's prompt through the usual prompt path (prompt cache and conversation
   checkpoints included) and produces its first token there; the state is then copied into the slot. Admissions
-  are taken one at a time; the slots already decoding pause meanwhile.
-- Slots are assigned so that consecutive requests land in different pipeline groups.
+  are taken one at a time, and **the slots decode between the prompt's chunks**: after each chunk (`--prefill`,
+  2048-8192 tokens) they decode for half as long as the chunk took (`STRATA_BATCH_DECODE_SHARE`, default 0.5), so
+  a long prompt slows the others down instead of stopping them. The chunks are the ones one uninterrupted read
+  takes, so the prompt's arithmetic is unchanged.
+- **A long prompt gives way to a short one** (#656's cooperative preemption): when a request with a prompt under
+  half as long is waiting, the server sends `BYIELD`; at its next chunk boundary the long read stops, the part read
+  so far is copied into a slot, the short request is admitted, and the long one then goes on from its slot with the
+  same chunks (at most twice per request).
+- **Each slot is a conversation cache.** A finished slot keeps what it holds (the prompt, the answer, and the
+  checkpoint at the prompt's last turn boundary); the next turn of that conversation goes to that slot and the
+  engine copies its state back (50-60 ms for a short conversation) instead of reading the history again - also for
+  a client that drops the reply's thinking from the history (the checkpoint matches up to the new turn). A new
+  conversation takes an empty slot, else the one used longest ago.
+- Slots are assigned so that consecutive requests land in different pipeline groups (`--batch-groups`).
 - A client that disconnects stops its slot (`BSTOP`); the others go on.
 
 ## Exactness
 
 A batch row's arithmetic is the single-token window's, so with greedy decoding **every conversation of a batch
 produces exactly the tokens it produces alone** - verified token by token for 8 concurrent conversations of 150
-tokens, with and without the pipeline (`tools/batch_test.py`). Two settings make that comparison exact:
+tokens, with and without the pipeline (`tools/batch_test.py`), and on one RTX 5070 for 4 conversations, for a long
+prompt read while two others decode, for a prompt that gave way and went on, for a next turn continued from its
+slot, and for a request stopped in its slot and continued on the solo path (`tools/batch_interleave_test.py`). These
+settings make the comparison exact:
 
 - `STRATA_IQ_MT_MIN=1` (the multi-token CPU expert kernels for every group, as for the solo path's own
-  exactness tests), and
+  exactness tests: by default an expert's rows round differently alone than in a group, so the output depends on
+  how many rows of a window share an expert - which differs between a batch and a request alone),
 - `--pcie-frac 0`: the PCIe share of the missed experts is chosen per window from the window's misses, so the
-  same expert can run on the GPU in one window and on the CPU in another, which rounds differently. With a share,
-  outputs stay coherent but can drift apart after some tokens, as they would between two solo runs whose windows
-  differ.
+  same expert can run on the GPU in one window and on the CPU in another, which rounds differently, and
+- `--adapt-every 1000000` (the VRAM tier fixed), and `--no-prefill-borrow` while a prompt is read beside decoding
+  slots: their windows then see the expert cache without the slots the prompt borrowed (those experts run on the
+  CPU).
+
+With the default settings the outputs stay coherent but drift apart after some tokens, as two solo runs whose
+windows differ can. Measured on the RTX 5070 (Q2_0, 4 conversations of 200 tokens, `tools/batch_test.py` without
+the settings above): one equal to its solo run, the others apart from token 0, 99 and 174 - the first token already
+differed for one, because the adaptive VRAM tier had moved experts between the solo runs and the batch; all four
+texts read as well as their solo runs.
 
 Sampled requests (temperature, top_p, top_k, min_p, seed) are drawn row by row with the solo window's
 counter-based draw (Philox(seed, position)).
@@ -56,16 +107,40 @@ counter-based draw (Philox(seed, position)).
 ## Limits (for now)
 
 - Batch windows carry no MTP drafts: a conversation in a slot decodes one token per window (the solo path keeps
-  its drafts, which is why a request alone is not put in a slot).
+  its drafts, which is why a request alone is not put in a slot, and goes back to it when left alone).
 - Repetition / frequency / presence penalties are not applied in batch windows.
-- `--batch-groups` needs every stage on its own GPU.
-- The slot sessions take VRAM (each one like the stage's own session; a few hundred MB per slot at 64K context
-  with KV streaming) and pinned RAM for their streamed K/V.
+- A prompt shorter than one chunk is read in one piece (the slots wait for it); a read gives way only at a chunk
+  boundary, and not for pictures.
+- Admissions are one at a time: two new long prompts are read one after the other.
+- `--batch-groups` needs every stage on its own GPU; a pipelined slot is not kept as a conversation cache.
+- The slot sessions take VRAM (above) and, with KV streaming, pinned RAM.
 
 ## Measured
 
+One RTX 5070 (12 GB), Ryzen 5 7600, 64 GB DDR5, Q2_0, 32K context, through the HTTP server: C different requests
+sent at once (an 800-word essay each, 256 tokens per answer, greedy, thinking off), median of 3 rounds:
+
+| Concurrent | Setting | Total tok/s | Per request tok/s | First token: median / last of the round |
+| ---: | --- | ---: | ---: | ---: |
+| 1 | one at a time (default) | 74.3 | 83.6 | 0.4 s / 0.4 s |
+| 1 | `"parallel": 2` | 64.6 | 71.5 | 0.4 s / 0.4 s |
+| 1 | `"parallel": 4` | 58.2 | 63.9 | 0.5 s / 0.5 s |
+| 2 | one at a time | 71.6 | 77.3 | 2.1 s / 4.1 s |
+| 2 | `"parallel": 2` | 59.6 | 32.5 | 0.7 s / 0.9 s |
+| 2 | `"parallel": 4` | 55.7 | 30.3 | 0.4 s / 0.7 s |
+| 4 | one at a time | 70.7 | 79.6 | 6.0 s / 11.2 s |
+| 4 | `"parallel": 2` | 61.9 | 32.8 | 4.7 s / 9.2 s |
+| 4 | `"parallel": 4` | 63.8 | 17.3 | 0.9 s / 1.7 s |
+
+On this card the slots buy **waiting time, not speed**: the fourth of four requests starts after 1.7 s instead of
+11.2 s, but together they decode ~10-20 % slower than one after the other, and a request alone loses 13 % (2 slots)
+or 24 % (4 slots), because the slots' sessions (0.56 GiB each) come out of the expert cache and most experts run
+on the CPU: a batch window over 4 conversations reads 24 CPU experts per layer against ~8 for one, so it costs about
+what the 4 tokens cost one after the other (`strata batch:` in the engine log: 54 ms per 4-row window, ~20 ms per
+1-row window). Cards that hold most experts in VRAM, and a layer split, are where the slots also add speed (below).
+
 A 4-GPU layer split (4 x 16 GB, PCIe Gen3), IQ3_S, `--batch 8 --batch-groups 4 --trim-stage-weights`, through
-the HTTP server, 400 tokens per answer, temperature 0.7:
+the HTTP server, 400 tokens per answer, temperature 0.7 (PR #559):
 
 | Concurrent requests | Per request | Total |
 | ---: | ---: | ---: |
@@ -90,11 +165,13 @@ two long conversations alternating through the HTTP server: the first turns took
 
 ## Testing
 
-Three scripts drive a built engine or a running server; each exits non-zero on a failure.
+Four scripts drive a built engine or a running server; each exits non-zero on a failure. `serve/test_parallel.py`
+tests the server's side with a scripted engine (no GPU).
 
 | Script | What it checks |
 | --- | --- |
 | `tools/batch_test.py` | the same prompts alone (`GEN`) and together in the batch slots (`BGEN`): every slot's greedy tokens equal its solo tokens; prints the aggregate rate. `--batch-groups` in `--extra` tests the pipeline, `--keys "temperature=0.7"` the sampled rows. |
+| `tools/batch_interleave_test.py` | a long prompt read while two slots decode, a prompt that gives way (`BYIELD`) and goes on, and a next turn continued from its slot: each equal to its solo tokens. |
 | `tools/parking_test.py` | a follow-up to a conversation decodes the same tokens whether its state stayed live or came back from the parking cache (with a layer split: every stage's image). |
 | `tools/early_close_test.py` | a client that stops reading a streamed answer early (alone, and with a second request running) does not leave its tokens to the next request (server). |
 
@@ -103,6 +180,8 @@ For exact comparisons pass `--pcie-frac 0 --adapt-every 1000000` (and the script
 ```
 python3 tools/batch_test.py --exe engine/strata --config strata-<model>.json --batch 8 --n 8 \
     --extra "--layer-split 12,24,36 --trim-stage-weights --batch-groups 4 --pcie-frac 0 --adapt-every 1000000"
+python3 tools/batch_interleave_test.py --exe engine/strata --config strata-<model>.json \
+    --extra "--pcie-frac 0 --adapt-every 1000000 --no-prefill-borrow"
 python3 tools/parking_test.py --exe engine/strata --config strata-<model>.json \
     --extra "--layer-split 12,24,36 --conversation-cache-mib 8192 --conversation-cache-slots 4 --pcie-frac 0"
 STRATA_KEY=<key> python3 tools/early_close_test.py http://127.0.0.1:8080
@@ -118,8 +197,11 @@ On top of `GEN` / `GENI`:
 | `BGENI <slot> <max_new> [keys] <file> <ids>` | in | the same with images |
 | `BADM <slot> <1/0>` | out | after the admission's `DONE`: 1 = it continues in the slot, 0 = it ended |
 | `BT <slot> <id>` | out | a token of that slot |
-| `BDONE <slot> <generated> <stop/length/cancel> <ms>` | out | the slot is free again |
+| `BDONE <slot> <generated> <stop/length/cancel> <ms>` | out | the slot is free again (it keeps its conversation) |
 | `BSTOP <slot>` | in | end that slot at its next window |
+| `BYIELD <slot>` | in | the prompt being read gives way at its next chunk boundary; its part read waits in `<slot>` (the admission's own, or a free slot for a solo request) |
+| `YIELDED <slot> <tokens>` | out | before the `DONE cancel` of a read that gave way: the request is sent again later and goes on from there |
+| `INFO ... batch_slots=N` | out | the slots the engine runs (only with `--batch`) |
 
 `tools/batch_test.py` drives the engine directly: the same prompts alone, then together, compared token by token,
 and the aggregate rate.
diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index d71e8bff2d9..1238ae70490 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -683,8 +683,9 @@ sizes and K/V bytes reused during capture. `STRATA_SNAPSHOT_FULL_CAPTURE=1` disa
 retention for diagnostic comparisons. Snapshots are not
 persisted across restarts.
 
-**Current limits (v1):** one request at a time, and one conversation cached at a time (switching between two chats
-re-reads the other one unless the opt-in cache above is enabled); images only when set up with them (below); no video. **Temperature / top_p / top_k / min_p /
+**Current limits (v1):** one request at a time unless `"parallel": N` is set (opt-in batch slots, up to N requests
+decoded together: [BATCHING.md](BATCHING.md)), and one conversation cached at a time (switching between two chats
+re-reads the other one unless the opt-in cache above is enabled, or each conversation keeps its own batch slot); images only when set up with them (below); no video. **Temperature / top_p / top_k / min_p /
 seed** are honored per request (OpenAI and Anthropic fields); with the default adaptive expert tier a sampled result
 is not reproducible run to run - for seed-reproducible output add `--adapt-every 100000` (static residency) to the
 engine arguments. The run config's optional `sampling` block sets the defaults for requests that leave the fields out
diff --git a/serve/server.py b/serve/server.py
index 241503542bc..9e669827c91 100644
--- a/serve/server.py
+++ b/serve/server.py
@@ -843,6 +843,19 @@ def _take_control(self, cancel, plen: int, after_epoch: int | None = None):
             self.slot_cv.notify_all()
         return True
 
+    SOLO_AGAIN_MAX = 2      # how often a request left alone in a slot goes back to the solo path
+    SOLO_AGAIN_MIN_LEFT = 32  # ... only with at least this many tokens still allowed (max_tokens)
+
+    def _may_go_solo(self, left: int, times: int, embeddings) -> bool:
+        """A request decoding in a slot that is alone now (no other slot busy, nobody waiting) goes back to the solo
+        path with its MTP drafts: the engine continues it from the slot's sessions (its slot cache; INFO
+        slot_cache=1).  STRATA_PARALLEL_SOLO=0 keeps it in the slot."""
+        if (embeddings or times >= self.SOLO_AGAIN_MAX or left < self.SOLO_AGAIN_MIN_LEFT or
+                not (self.info or {}).get("slot_cache") or os.environ.get("STRATA_PARALLEL_SOLO") == "0"):
+            return False
+        with self.slot_cv:
+            return sum(1 for b in self.slot_busy if b) == 1 and self.waiting == 0
+
     def _shorter_waiting(self, plen: int) -> bool:
         """#656: someone waits for the control lines with a prompt under half this one's: worth giving way to."""
         with self.slot_cv:
@@ -870,144 +883,169 @@ def generate_batched(self, ids, max_new, sampling, cancel, embeddings=None):
         slot, gen0, reserved = None, None, None
         phase = "none"            # solo -> (admit -> slot) ; "done" once the engine has finished with this request
         stop_sent = False
-        yields = 0
+        yields, solo_again = 0, 0
         try:
-            with self.slot_cv:
-                alone = not any(self.slot_busy) and self.waiting == 0
-            if alone and left > 1:
-                head = f"GENI {left}{keys} {embeddings}" if embeddings else f"GEN {left}{keys}"
-                self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
-                phase = "solo"
-                self._ctl_mode, self._ctl_result, self._yielded = "solo", None, None
-                def others():
-                    with self.slot_cv:
-                        return self.waiting > 0
-                for x in self._control(cancel, pending.append, stop_when=others):
+            while True:   # a request in a slot that is left alone goes back to the solo path
+                if not holding:
+                    ok = yield from self._take_control(cancel, len(prompt))
+                    if not ok:
+                        return
+                    holding = True
+                with self.slot_cv:
+                    alone = not any(self.slot_busy) and self.waiting == 0
+                if alone and left > 1:
+                    head = f"GENI {left}{keys} {embeddings}" if embeddings else f"GEN {left}{keys}"
+                    self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+                    phase = "solo"
+                    self._ctl_mode, self._ctl_result, self._yielded = "solo", None, None
+                    def others():
+                        with self.slot_cv:
+                            return self.waiting > 0
+                    for x in self._control(cancel, pending.append, stop_when=others):
+                        while pending:
+                            t = pending.pop(0)
+                            out.append(t)
+                            yield t
+                        if x is None:                       # a heartbeat (False: a token, flushed above)
+                            if (reserved is None and not out and not embeddings and yields < self.YIELDS_MAX and
+                                    self._shorter_waiting(len(prompt))):
+                                with self.slot_cv:          # the slot the part read will wait in
+                                    reserved = self.pick_slot(prompt)
+                                    if reserved is not None:
+                                        self.slot_busy[reserved] = True
+                                if reserved is not None:
+                                    self._send(f"BYIELD {reserved}")
+                            yield None
+                    phase = "none"                          # its DONE is read
                     while pending:
                         t = pending.pop(0)
                         out.append(t)
                         yield t
-                    if x is None:                       # a heartbeat (False: a token, flushed above)
-                        if (reserved is None and not out and not embeddings and yields < self.YIELDS_MAX and
-                                self._shorter_waiting(len(prompt))):
-                            with self.slot_cv:          # the slot the part read will wait in
-                                reserved = self.pick_slot(prompt)
-                                if reserved is not None:
-                                    self.slot_busy[reserved] = True
-                            if reserved is not None:
-                                self._send(f"BYIELD {reserved}")
-                        yield None
-                phase = "none"                          # its DONE is read
-                while pending:
-                    t = pending.pop(0)
-                    out.append(t)
-                    yield t
-                if self._yielded is not None and reserved is not None and self._yielded[0] == reserved:
-                    slot, reserved = reserved, None     # gave way: the read goes on in that slot (below)
-                elif reserved is not None:              # it did not give way: the slot is free again
-                    with self.slot_cv:
-                        self.slot_busy[reserved] = False
-                        self.slot_cv.notify_all()
-                    reserved = None
-                if slot is None:
-                    finish = (self.last or {}).get("finish") if isinstance(self.last, dict) else None
-                    left = int(max_new) - len(out)
-                    if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
-                        return
-                    prompt = list(ids) + out            # promoted: it continues in a batch slot from here
-            while True:
-                if slot is None:
-                    # a free slot (they free themselves at BDONE, which needs no control lines): the one that holds
-                    # the start of this prompt (its conversation's last turn), else the one used longest ago
-                    with self.slot_cv:
-                        while True:
-                            slot = self.pick_slot(prompt)
-                            if slot is not None:
-                                self.slot_busy[slot] = True
-                                break
-                            self.slot_cv.wait(timeout=10.0)
-                            if cancel.is_set():
-                                return
-                if self._yielded is not None:           # it gave way: the others waiting then go first
-                    self.slot_held[slot] = list(prompt[:self._yielded[1]])
-                    self._yielded = None
-                    yields += 1
-                    self.ctl.release()
-                    holding = False
-                    with self.slot_cv:
-                        epoch = self.ctl_epoch
-                    ok = yield from self._take_control(cancel, len(prompt), after_epoch=epoch)
-                    if not ok:
-                        return
-                    holding = True
-                while not self.slot_q[slot].empty():
-                    self.slot_q[slot].get_nowait()
-                head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
-                live = {"slot": slot, "state": "reading", "prompt_tokens": len(prompt), "generated": 0,
-                        "started": time.time(), "first_token": None}
-                self.slot_live[slot] = live
-                self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
-                self.slot_held[slot] = []               # the admission overwrites what the slot held
-                phase = "admit"
-                self._ctl_mode, self._ctl_result, self._yielded = "batch", None, None
-                asked = False
-                for x in self._control(cancel, pending.append):
+                    if self._yielded is not None and reserved is not None and self._yielded[0] == reserved:
+                        slot, reserved = reserved, None     # gave way: the read goes on in that slot (below)
+                    elif reserved is not None:              # it did not give way: the slot is free again
+                        with self.slot_cv:
+                            self.slot_busy[reserved] = False
+                            self.slot_cv.notify_all()
+                        reserved = None
+                    if slot is None:
+                        finish = (self.last or {}).get("finish") if isinstance(self.last, dict) else None
+                        left = int(max_new) - len(out)
+                        if cancel.is_set() or left <= 0 or finish in ("stop", "length") or (out and out[-1] in EOS_IDS):
+                            return
+                        prompt = list(ids) + out            # promoted: it continues in a batch slot from here
+                while True:
+                    if slot is None:
+                        # a free slot (they free themselves at BDONE, which needs no control lines): the one that holds
+                        # the start of this prompt (its conversation's last turn), else the one used longest ago
+                        with self.slot_cv:
+                            while True:
+                                slot = self.pick_slot(prompt)
+                                if slot is not None:
+                                    self.slot_busy[slot] = True
+                                    break
+                                self.slot_cv.wait(timeout=10.0)
+                                if cancel.is_set():
+                                    return
+                    if self._yielded is not None:           # it gave way: the others waiting then go first
+                        self.slot_held[slot] = list(prompt[:self._yielded[1]])
+                        self._yielded = None
+                        yields += 1
+                        self.ctl.release()
+                        holding = False
+                        with self.slot_cv:
+                            epoch = self.ctl_epoch
+                        ok = yield from self._take_control(cancel, len(prompt), after_epoch=epoch)
+                        if not ok:
+                            return
+                        holding = True
+                    while not self.slot_q[slot].empty():
+                        self.slot_q[slot].get_nowait()
+                    head = f"BGENI {slot} {left}{keys} {embeddings}" if embeddings else f"BGEN {slot} {left}{keys}"
+                    live = {"slot": slot, "state": "reading", "prompt_tokens": len(prompt), "generated": 0,
+                            "started": time.time(), "first_token": None}
+                    self.slot_live[slot] = live
+                    self._send(f"{head} {','.join(str(int(t)) for t in prompt)}")
+                    self.slot_held[slot] = []               # the admission overwrites what the slot held
+                    phase = "admit"
+                    self._ctl_mode, self._ctl_result, self._yielded = "batch", None, None
+                    asked = False
+                    for x in self._control(cancel, pending.append):
+                        while pending:
+                            t = pending.pop(0)
+                            out.append(t)
+                            yield t
+                        if x is None:
+                            if (not asked and not embeddings and yields < self.YIELDS_MAX and
+                                    self._shorter_waiting(len(prompt))):
+                                self._send(f"BYIELD {slot}")
+                                asked = True
+                            yield None
+                    cont = bool(self._ctl_result and self._ctl_result[1])
+                    phase = "slot" if cont else "none"
                     while pending:
                         t = pending.pop(0)
                         out.append(t)
                         yield t
-                    if x is None:
-                        if (not asked and not embeddings and yields < self.YIELDS_MAX and
-                                self._shorter_waiting(len(prompt))):
-                            self._send(f"BYIELD {slot}")
-                            asked = True
-                        yield None
-                cont = bool(self._ctl_result and self._ctl_result[1])
-                phase = "slot" if cont else "none"
-                while pending:
-                    t = pending.pop(0)
-                    out.append(t)
-                    yield t
-                if not cont and self._yielded is not None and self._yielded[0] == slot and not cancel.is_set():
-                    continue                            # gave way: again once the shorter request is in
-                break
-            self.ctl.release()
-            holding = False
-            if not cont:
-                return
-            live.update(state="decoding", first_token=time.time(), generated=len(out))
-            gen0 = len(out) - 1                         # the admission's own token: the slot feeds it first
-            while True:
-                try:
-                    line = self.slot_q[slot].get(timeout=10.0)
-                except queue.Empty:
-                    if cancel.is_set() and not stop_sent:
-                        self._send(f"BSTOP {slot}")
-                        stop_sent = True
-                    yield None
-                    continue
-                if line is None:
-                    phase = "none"
-                    raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
-                if line.startswith("BT "):
-                    t = int(line.split()[2])
-                    out.append(t)
-                    live["generated"] = len(out)
-                    if cancel.is_set():
-                        if not stop_sent:
+                    if not cont and self._yielded is not None and self._yielded[0] == slot and not cancel.is_set():
+                        continue                            # gave way: again once the shorter request is in
+                    break
+                self.ctl.release()
+                holding = False
+                if not cont:
+                    return
+                live.update(state="decoding", first_token=time.time(), generated=len(out))
+                gen0 = len(out) - 1                         # the admission's own token: the slot feeds it first
+                going_solo = False
+                while True:
+                    try:
+                        line = self.slot_q[slot].get(timeout=10.0)
+                    except queue.Empty:
+                        if cancel.is_set() and not stop_sent:
                             self._send(f"BSTOP {slot}")
                             stop_sent = True
+                        yield None
                         continue
-                    yield t
-                elif line.startswith("BDONE "):
-                    phase = "none"
-                    f = line.split()
-                    if len(f) >= 5 and isinstance(self.last, dict):
-                        self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4]),
-                                     "generated": int(f[2]) if f[2].isdigit() else self.last.get("generated")}
-                    # what the slot's sessions hold now: the prompt and every token fed (all but the last one)
-                    self.slot_held[slot] = list(prompt) + out[gen0:-1] if len(out) > gen0 else []
-                    return
+                    if line is None:
+                        phase = "none"
+                        raise EngineDied(f"the engine stopped unexpectedly (exit code {self.exit_code()})")
+                    if line.startswith("BT "):
+                        t = int(line.split()[2])
+                        out.append(t)
+                        live["generated"] = len(out)
+                        if cancel.is_set():
+                            if not stop_sent:
+                                self._send(f"BSTOP {slot}")
+                                stop_sent = True
+                            continue
+                        yield t
+                        if not going_solo and not stop_sent and self._may_go_solo(int(max_new) - len(out), solo_again,
+                                                                                  embeddings):
+                            self._send(f"BSTOP {slot}")         # alone now: on with the drafts (below)
+                            going_solo = True
+                    elif line.startswith("BDONE "):
+                        phase = "none"
+                        f = line.split()
+                        if len(f) >= 5 and isinstance(self.last, dict):
+                            self.last = {**self.last, "finish": f[3], "decode_ms": float(f[4]),
+                                         "generated": int(f[2]) if f[2].isdigit() else self.last.get("generated")}
+                        # what the slot's sessions hold now: the prompt and every token fed (all but the last one)
+                        self.slot_held[slot] = list(prompt) + out[gen0:-1] if len(out) > gen0 else []
+                        if (going_solo and f[3:4] == ["cancel"] and not cancel.is_set() and len(out) < int(max_new)
+                                and not (out and out[-1] in EOS_IDS)):
+                            # the solo path continues it: the engine copies the slot's sessions back (all but the
+                            # last token are in them) and decodes with MTP drafts again
+                            self.slot_live[slot] = None
+                            self.slot_used[slot] = time.time()
+                            with self.slot_cv:
+                                self.slot_busy[slot] = False
+                                self.slot_cv.notify_all()
+                            slot, gen0 = None, None
+                            prompt, left = list(ids) + out, int(max_new) - len(out)
+                            solo_again += 1
+                            btrace("back to the solo path")
+                            break
+                        return
         finally:
             # a consumer that left early (or an error): keep the engine and this server in step
             btrace("finally phase", phase, "slot", slot, "holding", holding)
diff --git a/serve/test_parallel.py b/serve/test_parallel.py
index 7369ee8c051..a5643653687 100644
--- a/serve/test_parallel.py
+++ b/serve/test_parallel.py
@@ -36,14 +36,18 @@ def reader():
             lines.put(l)
     lines.put(None)
 threading.Thread(target=reader, daemon=True).start()
-print("INFO engine=0.1.39" + (f" batch_slots={fit}" if fit >= 2 else ""), flush=True)
+print("INFO engine=0.1.39" + (f" batch_slots={fit}" if fit >= 2 else "") +
+      (" slot_cache=1" if "--slotcache" in args else ""), flush=True)
 print("READY 4096 stop", flush=True)
-R = list(b"ok, done.") + [257]
-def reply(ids):            # the rest of R after what the prompt already ends with (a request continued in a slot)
+LONG = list(b"LONGREPLY")
+def reply(ids):            # the rest of the reply after what the prompt already ends with (a request continued)
     ids = [int(x) for x in ids]
+    long_one = any(ids[i:i + len(LONG)] == LONG for i in range(len(ids)))
+    R = list(b"ok, " + b"la " * 15 + b"done." if long_one else b"ok, done.") + [257]
     k = max(k for k in range(len(R)) if k == 0 or ids[-k:] == R[:k])
     return R[k:]
 active = {}          # slot -> [tokens left, max_new, produced]
+stopped = set()      # BSTOPped slots: they end "cancel"
 def window():        # one batch window: every active slot one token
     for b in sorted(active):
         left, max_new, produced = active[b]
@@ -51,7 +55,9 @@ def window():        # one batch window: every active slot one token
         produced += 1
         print(f"BT {b} {t}", flush=True)
         if t == 257 or produced >= max_new:
-            print(f"BDONE {b} {produced} {'stop' if t == 257 else 'length'} 1.0", flush=True)
+            fin = 'stop' if t == 257 else 'cancel' if b in stopped else 'length'
+            stopped.discard(b)
+            print(f"BDONE {b} {produced} {fin} 1.0", flush=True)
             del active[b]
         else:
             active[b] = [left, max_new, produced]
@@ -69,6 +75,7 @@ def window():        # one batch window: every active slot one token
         b = int(line.split()[1])
         if b in active:
             active[b][1] = 0
+            stopped.add(b)
         continue
     if line.startswith(("GEN ", "BGEN ")):
         f = line.split()
@@ -185,7 +192,7 @@ def test_slots_view(self):
 class ParallelService(unittest.TestCase):
     """The real StrataEngine and Service over HTTP, the fake engine behind them."""
 
-    def start(self, slots, fit=None):
+    def start(self, slots, fit=None, slot_cache=False):
         import serve.server as server
         self.tmp = tempfile.TemporaryDirectory()
         script = Path(self.tmp.name) / "fake_strata.py"
@@ -193,6 +200,7 @@ def start(self, slots, fit=None):
         self.log = Path(self.tmp.name) / "requests.log"
         real = server.subprocess.Popen
         extra = ["--batch", str(slots)] + (["--fit", str(fit)] if fit is not None else []) + ["--log", str(self.log)]
+        extra += ["--slotcache"] if slot_cache else []
         with mock.patch.object(server.subprocess, "Popen",
                                lambda cmd, **kw: real([sys.executable, str(script), *cmd[1:]], **kw)):
             self.engine = StrataEngine("strata", extra)
@@ -324,6 +332,26 @@ def test_no_way_given_to_a_long_one(self):
         self.assertEqual(sorted(r[0] for r in res.values()), ["ok, done."] * 2)
         self.assertFalse(any(x.startswith("YIELD ") for x in self.log.read_text().splitlines()))
 
+    def test_left_alone_it_goes_back_to_the_solo_path(self):
+        """A request decoding in a slot whose neighbour finished goes back to the solo path (MTP drafts), continued
+        from its slot - only with an engine that keeps the slots' conversations (INFO slot_cache=1)."""
+        self.start(2, slot_cache=True)
+        res = {}
+        long = threading.Thread(target=lambda: res.setdefault("long", self.chat("LONGREPLY please", max_tokens=200)))
+        long.start()
+        time.sleep(0.05)
+        short = self.chat("short", max_tokens=200)
+        long.join(30)
+        self.assertEqual(short["choices"][0]["message"]["content"], "ok, done.")
+        self.assertEqual(res["long"]["choices"][0]["message"]["content"], "ok, " + "la " * 15 + "done.")
+        kinds = [x.split()[0] for x in self.log.read_text().splitlines()]
+        # solo, then both in slots, then the long one alone again: a GEN after the BGENs
+        self.assertIn("BGEN", kinds)
+        self.assertEqual(kinds[-1], "GEN", kinds)
+        self.assertFalse(any(self.engine.slot_busy))
+        with self.svc.status_lock:
+            self.assertEqual(len(self.svc.history), 2)
+
     def test_next_turn_goes_back_to_its_slot(self):
         self.start(2)
         a = "conversation A, first turn"
diff --git a/tools/batch_interleave_test.py b/tools/batch_interleave_test.py
index 9b2a1a7ffdc..a59109ae92f 100644
--- a/tools/batch_interleave_test.py
+++ b/tools/batch_interleave_test.py
@@ -6,6 +6,13 @@
   2. the same in the slots: A in slot 0, B in slot 1 next to it, then C in slot 2 while A and B decode - every slot's
      tokens must equal its solo tokens
   3. A's next turn (BGEN into slot 0, which still holds A): read from the slot, its tokens must equal the solo next turn
+  4. a long prompt D gives way (BYIELD) at its first chunk boundary, a short E is admitted, D goes on from its slot
+     while E decodes: both equal their solo tokens
+  6. A in a slot, stopped after 50 tokens and continued on the solo path (GEN of A + its tokens, from the slot): the
+     whole equals solo A (what the server does with a request left alone in a slot)
+  5. (a measurement) a solo next turn continued from a slot: the drafts accepted
+  7. F, A's history as a client sends it back without the reply's thinking, from slot 1's turn checkpoint: equal to
+     F solo (which continues from the same checkpoint of the live chain)
 
 Exact comparisons need the same settings as batch_test.py (this script sets STRATA_IQ_MT_MIN=1):
   python tools/batch_interleave_test.py --exe build/strata --config strata-<model>.json \\
@@ -72,6 +79,12 @@ def chat(q):
     sA, _ = run(eng, out, f"GEN {M} {ids(A)}")
     A2 = A + sA + chat("Now do the same in Rust.")
     sA2, _ = run(eng, out, f"GEN {M} {ids(A2)}")
+    # F: A's history as a client sends it back WITHOUT the reply's thinking - it shares A only up to A's last turn
+    # boundary (the checkpoint there); solo it continues from that checkpoint of the live chain
+    turn_at = max(i for i, t in enumerate(A) if t == A[0])          # A[0] is <|im_start|>
+    F = A[:turn_at] + tok.encode("<|im_start|>assistant\nA short answer.<|im_end|>\n", parse_special=True) + \
+        chat("Now in Go.")
+    sF, _ = run(eng, out, f"GEN {M} {ids(F)}")
     sB, _ = run(eng, out, f"GEN {M} {ids(B)}")
     sC, _ = run(eng, out, f"GEN {M} {ids(C)}")
     sD, _ = run(eng, out, f"GEN {M} {ids(D)}")
@@ -161,6 +174,27 @@ def drain():
         d = next((k for k in range(min(len(got4[s]), len(ref))) if got4[s][k] != ref[k]), None)
         print(f"slot {s} {name}: {len(got4[s])} tokens, solo {len(ref)}: "
               f"{'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
+    # 6. back to the solo path (what the server does with a request left alone in a slot): A in slot 1, BSTOP after
+    # 50 tokens, then GEN of A + what it produced - the engine continues from the slot with MTP drafts again
+    first, cont = run(eng, out, f"BGEN 1 {M} {ids(A)}", slot=1)
+    got6, sent = list(first), False
+    while cont:
+        l = eng.pending.pop(0) if eng.pending else next(out)
+        if l.startswith("BT 1 "):
+            got6.append(int(l.split()[2]))
+            if len(got6) >= 50 and not sent:
+                eng.send("BSTOP 1")
+                sent = True
+        elif l.startswith("BDONE 1 "):
+            break
+    tail6, _ = run(eng, out, f"GEN {M - len(got6)} {ids(A + got6)}") if len(got6) < M else ([], None)
+    same = got6 + tail6 == sA
+    ok &= same
+    both = got6 + tail6
+    d = next((k for k in range(min(len(both), len(sA))) if both[k] != sA[k]), None)
+    print(f"A in a slot, then solo again after {len(got6)} tokens: {len(both)} tokens, solo {len(sA)}: "
+          f"{'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
+
     # 5. (a measurement, not a check) a SOLO next turn continued from slot 0: its tokens are exact either way, but the
     # draft layer's own K/V was built for another conversation, so fewer drafts may be accepted than in a solo next
     # turn whose drafter read the conversation (A2 in step 1)
@@ -174,13 +208,27 @@ def drain():
             print(f"solo next turn from a slot: drafts accepted {f[6]} of {f[7]} ({f[1]} tokens in {f[4]} ms)",
                   flush=True)
             break
+    # 7. F from slot 1's turn checkpoint (slot 1 holds A since step 6): the engine log says "(its turn checkpoint)"
+    first, cont = run(eng, out, f"BGEN 2 {M} {ids(F)}", slot=2)
+    got7 = list(first)
+    while cont:
+        l = eng.pending.pop(0) if eng.pending else next(out)
+        if l.startswith("BT 2 "):
+            got7.append(int(l.split()[2]))
+        elif l.startswith("BDONE 2 "):
+            break
+    same = got7 == sF
+    ok &= same
+    d = next((k for k in range(min(len(got7), len(sF))) if got7[k] != sF[k]), None)
+    print(f"F (A's history without the reply's thinking) from slot 1's turn checkpoint: {len(got7)} tokens, solo "
+          f"{len(sF)}: {'IDENTICAL' if same else f'DIFFERS at {d}'}", flush=True)
     eng.send("QUIT")
     eng.p.wait(timeout=180)
     log = Path(eng.log_path).read_text(errors="replace")
     for l in log.splitlines():
         if "drafts accepted" in l:
             print("  log:", l.split("strata serve: ")[-1][:160], flush=True)
-    for key in ("gave back", "takes", "the prompt was read in", "gives way"):
+    for key in ("gave back", "its turn checkpoint", "takes", "the prompt was read in", "gives way"):
         print(f"engine log '{key}': {log.count(key)} lines", flush=True)
     return 0 if ok else 2
 

From 831a90f0cadf961e16b9f6747314d7f141967ba5 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 02:38:22 +0200
Subject: [PATCH 183/201] #465 engine: INFO slot_cache=0|1 beside batch_slots
 (the server sends a lone slot request back to the solo path only when the
 slots keep their conversations)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/program/generate.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 270a7358393..e32c0d71ac5 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -5487,7 +5487,8 @@ int main(int argc, char** argv) {
                         pool.workers(), o.pcie_frac,
                         o.spec_min_p, (long long) o.conversation_cache_mib, o.conversation_cache_slots,
                         (long long) o.conversation_cache_min_free_mib, (long long) o.tail_role_token, xcache.segmented() ? 1 : 0,
-                        o.batch > 0 ? (" batch_slots=" + std::to_string(o.batch)).c_str() : "");
+                        o.batch > 0 ? (" batch_slots=" + std::to_string(o.batch) +
+                                       " slot_cache=" + std::to_string(o.prompt_cache > 0 ? 1 : 0)).c_str() : "");
         }
         // issue #29: a request whose heartbeat (tokens, prompt chunks, verify windows) stops for this long is stuck on
         // a flag nobody will raise - end the engine with where it was, so the server starts it again instead of the

From 895a77bed97ee488079c15ee8dfb73eaf755dbee Mon Sep 17 00:00:00 2001
From: Gopi <gopi@example.com>
Date: Sat, 3 Oct 2026 08:17:56 +0530
Subject: [PATCH 184/201] prefill: the streamed ring is a byte budget, so a
 native pack sets its own slot count

The ring was 384 slots - a number measured on Q2_0, where a slot is one
expert blob of 1,382,400 B, so 506 MiB.  A slot is a whole blob, so on a
pack with bigger blobs the same 384 slots are a different amount of
memory: 1,912 MiB on Q8_0, more than half of an 8 GB card's expert cache,
and what kept that card at a 1024-token chunk when its own buffers would
have fitted 6144.  Measured on the 4-way rig, one env var and nothing
else: chunk 1024 -> 6144, prefill 87 -> 402 tok/s.

So the budget is the constant and the slot count is derived from the
pack's max blob: 384 on Q2_0 (pinned) or 96 (not), exactly as before, and
the pack it was tuned on does not move.  The fused rule (1024 slots, #136)
is preserved the same way, and `ring_cap()` still bounds the result.  This
is also what lets the auto chunk scan treat "the ring is full" as a plain
byte comparison.

Also exports the three accessors the scan needs: bytes_needed_no_ring
(the chunk's own buffers, without the ring), ring_max_slots (the cap in
slots) and ring_slots_for (what the ring resolves to for a chunk, after
the override, the env var and the pinned-share rule - what `init` lays out
and what the INFO line reports).

And one fix on the way: `bytes_needed` counted `carve`'s buffers from
memory and got two wrong - it took `xn` unconditionally, though `carve`
takes it only under STRATA_GR_UNFUSED, and it never took `grs`.  Net
T*(D-HC)*4 bytes too many: 42 MB at a 1024-token chunk.  The direction is
safe - the prompt path was told it had less room than it did - but it
under-sizes every loan.

Co-Authored-By: Claude Code <noreply@anthropic.com>
---
 include/strata/prefill/prefill.hpp | 15 +++++++++
 src/prefill/prefill.cpp            | 49 ++++++++++++++++++++++++++++--
 2 files changed, 61 insertions(+), 3 deletions(-)

diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index f0182700831..b3526f5b5d4 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -83,6 +83,21 @@ class Prefill {
     /// Device bytes `init` needs for a chunk of `chunk` tokens (what a borrowed region must hold).
     static uint64_t bytes_needed(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk);
 
+    /// The same without the streamed ring: what the chunk's own buffers cost.  The auto chunk scan sizes the chunk
+    /// first and hands the ring what the chunk leaves over, so it needs the chunk priced on its own.
+    static uint64_t bytes_needed_no_ring(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk);
+
+    /// The streamed ring's byte budget as a slot count for this pack (the measured slot count x Q2_0's blob, over
+    /// max_blob, never past ring_cap()):
+    /// what the auto chunk scan treats as a full ring.  A slot is one whole blob, so a pack with bigger blobs than
+    /// Q2_0's gets fewer of them for the same bytes - 384 on Q2_0, 199 on a 2.54 MiB-blob IQ3_S pack.
+    static int64_t ring_max_slots();
+
+    /// What the ring actually resolves to for a chunk of `chunk` tokens, after the override, STRATA_PREFILL_RING
+    /// and the pinned-share rule - the slot count `init` lays out.  The engine reports it on its INFO line so the
+    /// Monitor tab shows the pair the run really got, not what it asked for.
+    static int64_t ring_slots_for(int64_t chunk);
+
     /// Positions [pos0, pos0 + n) holding `tokens`; `ss.ple_prev` must be the two tokens before pos0 (oldest
     /// first, -1 for none) and is advanced to the last two of these.
     bool run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err);
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 82cea8a1b60..4f2654b0a9c 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -110,6 +110,14 @@ double g_pinned_share = 1.0;
 // 8192-token chunks: 96 slots 1153 tok/s, 384 1294 (the next layer's experts arrive during its attention half) -
 // and 96 when a large share goes through host copies (IQ3_S on 64 GB, a third unpinned: 96 slots 1216, 256 1070 -
 // the host copies are the limit and the bigger ring only takes cache slots).  STRATA_PREFILL_RING overrides.
+//
+// Those are slots on the pack they were measured on, and a slot is one WHOLE expert blob - a Q2_0 blob is
+// 1,382,400 B, so 384 slots is 506 MiB.  On a pack with bigger blobs the same slot count is a different amount of
+// memory: 1,912 MiB on Q8_0 (5,222,400 B), which is more than half of an 8 GB card's expert cache and what held
+// that card at a 1,024-token chunk when its own buffers would have fitted 6,144.  Measured on the 4-way rig, one
+// env var and nothing else: chunk 1,024 -> 6,144, prefill 87 -> 402 tok/s.  So the budget is kept in BYTES and the
+// slot count is derived from the pack (`ring_budget_slots`); Q2_0 still resolves to exactly 1024 (fused) and 384,
+// so the pack all of this was tuned on does not move.
 int g_ring_override = 0;   // #340: set by a layer split (Prefill::set_ring_override); 0 = the rule below
 // #136: the fused experts (STRATA_PF_FUSED=1) launch on a batch of a layer's streamed experts at once, so the ring
 // should hold a whole layer's (~460 of 512 on Q2_0): with 384 slots a layer's last batch waits for slots its own
@@ -138,6 +146,22 @@ inline bool fused_ring() {
 // the largest ring: 512 slots; 1024 with the Q2_0 pack's fused experts (P3's smaller buffers, measured there) - the
 // native packs' fused layers were measured at 512
 inline int ring_cap() { return fused_ring() && !strata::kernels::cpu::expert_layout().native ? RING_MAX : 512; }
+// The ring's budget in bytes: the measured slot counts above, at the blob size they were measured with.  It is
+// bytes and not slots because a slot is one whole blob and the blob is the pack's - see the note above.
+inline constexpr uint64_t Q2_0_BLOB = 1382400ull;   // the blob of the pack the ring was tuned on
+inline uint64_t ring_bytes() {
+    const uint64_t slots = fused_ring() ? 1024ull : 384ull;   // #136: a fused ring holds two layers' experts
+    return (g_pinned_share >= 0.9 ? slots : slots / 4) * Q2_0_BLOB;
+}
+// ...and what that buys on THIS pack, never past ring_cap(): the slot count `init` lays out, and what the auto
+// chunk scan treats as a full ring.  A pack whose blobs are larger than Q2_0's gets fewer slots for the same
+// bytes, which is the point - the ring competes with the expert cache for the same VRAM.
+inline int ring_budget_slots() {
+    const int64_t per = MAXBLOB();
+    const int64_t n = per > 0 ? (int64_t) (ring_bytes() / (uint64_t) per) : 0;
+    const int cap = ring_cap();
+    return (int) (n <= 0 ? 0 : (n > cap ? cap : n));
+}
 inline int ring_slots(size_t T) {
     const char* v = std::getenv("STRATA_PREFILL_RING");
 #if defined(STRATA_USE_HIP)
@@ -149,8 +173,11 @@ inline int ring_slots(size_t T) {
     }();
     if (!v && g_ring_override <= 0 && wmma) return (int64_t) T >= stream_all_min() ? 96 : STAGE;
 #endif
-    const int pinned_ring = fused_ring() ? 1024 : 384;
-    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : (g_pinned_share >= 0.9 ? pinned_ring : 96);
+    // the byte budget as this pack's slots: 1024 fused / 384 not on Q2_0, fewer on a pack with bigger blobs.  The
+    // unpinned arm stays a slot count (96): it was measured where the host copies are the limit, and there the ring
+    // is not what is competing for VRAM.
+    const int pinned_ring = g_pinned_share >= 0.9 ? ring_budget_slots() : 96;
+    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : pinned_ring;
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
     const int big = r < 16 ? 16 : r > ring_cap() ? ring_cap() : r;
     return (int64_t) T >= stream_all_min() ? big : STAGE;
@@ -1317,7 +1344,15 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     o.take<uint16_t>((size_t) GEMM_SCRATCH, ok);
     o.take<uint8_t>(GEMM_WS, ok);
     auto f = [&](size_t n) { o.take<float>(n, ok); };
-    f(T * N); f(T * D); f(T * D); o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
+    // `carve`'s order, buffer for buffer: emb, R, xn, grs, xn16, lo, lo16, gated, inj, mixed, mixed_bf, mixed_h,
+    // bo.  This counted `xn` unconditionally (carve takes it only under STRATA_GR_UNFUSED) and never counted
+    // `grs`.  Net over-count T*(D-HC)*4 bytes: 42 MB at a 1024-token chunk, 252 MB (48 Q8_0 slots) at 6144 - the
+    // prompt path was told it had less room than it did.  Safe - the direction is over-estimating, and `take`
+    // still bounds-checks - but it under-sizes every loan, so every chunk the scan picks is one step smaller.
+    f(T * N); f(T * D);
+    if (gr_unfused()) f(T * D);
+    f(T * HC);
+    o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
     f(T * D); f(T * HC); f(T * N); o.take<uint16_t>(T * N, ok); o.take<uint16_t>(T * N, ok); f(T * N);
     if (bf16x2_hc()) { o.take<uint16_t>(T * D, ok); o.take<uint16_t>(T * LR, ok); }
     if (bf16x2()) o.take<uint16_t>(T * N, ok);
@@ -1345,6 +1380,14 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     return o.used + (8u << 20);   // alignment slack
 }
 
+uint64_t Prefill::bytes_needed_no_ring(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk) {
+    return bytes_needed(g, ss, chunk) - (uint64_t) ring_slots((size_t) chunk) * (uint64_t) MAXBLOB();
+}
+
+int64_t Prefill::ring_max_slots() { return (int64_t) ring_budget_slots(); }
+
+int64_t Prefill::ring_slots_for(int64_t chunk) { return ring_slots((size_t) chunk); }
+
 namespace {
 
 const core::WeightRef* need(const core::LayerView& v, const char* suffix, std::string& err) {

From cef263f978b6e4f61269f8f7f599b2a919c89043 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 03:14:23 +0200
Subject: [PATCH 185/201] #465 docs: the final build's RTX 5070 numbers; the
 turn-checkpoint exactness check

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/BATCHING.md | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/docs/BATCHING.md b/docs/BATCHING.md
index cdce5fea4dc..10fb0c18b01 100644
--- a/docs/BATCHING.md
+++ b/docs/BATCHING.md
@@ -83,7 +83,8 @@ A batch row's arithmetic is the single-token window's, so with greedy decoding *
 produces exactly the tokens it produces alone** - verified token by token for 8 concurrent conversations of 150
 tokens, with and without the pipeline (`tools/batch_test.py`), and on one RTX 5070 for 4 conversations, for a long
 prompt read while two others decode, for a prompt that gave way and went on, for a next turn continued from its
-slot, and for a request stopped in its slot and continued on the solo path (`tools/batch_interleave_test.py`). These
+slot (from all it holds, and from its turn checkpoint without the reply's thinking), and for a request stopped in
+its slot and continued on the solo path (`tools/batch_interleave_test.py`). These
 settings make the comparison exact:
 
 - `STRATA_IQ_MT_MIN=1` (the multi-token CPU expert kernels for every group, as for the solo path's own
@@ -123,17 +124,17 @@ sent at once (an 800-word essay each, 256 tokens per answer, greedy, thinking of
 | Concurrent | Setting | Total tok/s | Per request tok/s | First token: median / last of the round |
 | ---: | --- | ---: | ---: | ---: |
 | 1 | one at a time (default) | 74.3 | 83.6 | 0.4 s / 0.4 s |
-| 1 | `"parallel": 2` | 64.6 | 71.5 | 0.4 s / 0.4 s |
-| 1 | `"parallel": 4` | 58.2 | 63.9 | 0.5 s / 0.5 s |
+| 1 | `"parallel": 2` | 67.3 | 74.8 | 0.4 s / 0.4 s |
+| 1 | `"parallel": 4` | 57.9 | 63.8 | 0.4 s / 0.4 s |
 | 2 | one at a time | 71.6 | 77.3 | 2.1 s / 4.1 s |
-| 2 | `"parallel": 2` | 59.6 | 32.5 | 0.7 s / 0.9 s |
-| 2 | `"parallel": 4` | 55.7 | 30.3 | 0.4 s / 0.7 s |
+| 2 | `"parallel": 2` | 61.0 | 32.6 | 0.5 s / 0.9 s |
+| 2 | `"parallel": 4` | 54.6 | 28.7 | 0.6 s / 0.7 s |
 | 4 | one at a time | 70.7 | 79.6 | 6.0 s / 11.2 s |
-| 4 | `"parallel": 2` | 61.9 | 32.8 | 4.7 s / 9.2 s |
-| 4 | `"parallel": 4` | 63.8 | 17.3 | 0.9 s / 1.7 s |
+| 4 | `"parallel": 2` | 61.2 | 32.2 | 4.5 s / 9.3 s |
+| 4 | `"parallel": 4` | 63.1 | 16.9 | 1.0 s / 1.8 s |
 
-On this card the slots buy **waiting time, not speed**: the fourth of four requests starts after 1.7 s instead of
-11.2 s, but together they decode ~10-20 % slower than one after the other, and a request alone loses 13 % (2 slots)
+On this card the slots buy **waiting time, not speed**: the fourth of four requests starts after 1.8 s instead of
+11.2 s, but together they decode 11-24 % slower than one after the other, and a request alone loses 11 % (2 slots)
 or 24 % (4 slots), because the slots' sessions (0.56 GiB each) come out of the expert cache and most experts run
 on the CPU: a batch window over 4 conversations reads 24 CPU experts per layer against ~8 for one, so it costs about
 what the 4 tokens cost one after the other (`strata batch:` in the engine log: 54 ms per 4-row window, ~20 ms per

From 0b651f8fdf2881b0776cb096fd2b0e4092059497 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 03:34:23 +0200
Subject: [PATCH 186/201] #465 serve/test_parallel: the first request decodes
 long enough to overlap the others on a busy PC

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 serve/test_parallel.py | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/serve/test_parallel.py b/serve/test_parallel.py
index a5643653687..a970fffae78 100644
--- a/serve/test_parallel.py
+++ b/serve/test_parallel.py
@@ -241,7 +241,9 @@ def test_engine_turns_batching_off(self):
 
     def test_concurrent_requests_share_the_slots(self):
         self.start(2)
-        texts = ["first question", "second question, longer", "a third one waits for a slot"]
+        # the first one decodes long enough for the others to arrive while it runs (also on a busy PC)
+        texts = ["first question LONGREPLY", "second question, longer", "a third one waits for a slot"]
+        reply = {t: "ok, " + "la " * 15 + "done." if "LONGREPLY" in t else "ok, done." for t in texts}
         out, errors, seen = {}, [], []
 
         def go(t):
@@ -263,7 +265,7 @@ def go(t):
             th.join(30)
         self.assertEqual(errors, [])
         for t in texts:
-            self.assertEqual(out[t]["choices"][0]["message"]["content"], "ok, done.")
+            self.assertEqual(out[t]["choices"][0]["message"]["content"], reply[t])
         # the slots were reported, and a request was admitted while another decoded in a slot (the fake logs how many
         # slots were active at each admission)
         self.assertTrue(any(m.get("parallel") == 2 and len(m.get("slots", [])) == 2 for m in seen))
@@ -274,7 +276,8 @@ def go(t):
             self.assertEqual(len(self.svc.history), 3)
             self.assertEqual(self.svc.live_reqs, {})
             self.assertFalse(self.svc.status["busy"])
-        self.assertEqual([r["output_tokens"] for r in self.svc.history], [len("ok, done.") + 1] * 3)
+        self.assertEqual(sorted(r["output_tokens"] for r in self.svc.history),
+                         sorted(len(reply[t]) + 1 for t in texts))
         # never more than two in the slots at once (the fake logs how many were active at each admission)
         active = [int(x.split()[3]) for x in self.log.read_text().splitlines() if x.startswith("BGEN")]
         self.assertTrue(all(a <= 1 for a in active), active)
@@ -356,7 +359,7 @@ def test_next_turn_goes_back_to_its_slot(self):
         self.start(2)
         a = "conversation A, first turn"
         r1 = {}
-        th = threading.Thread(target=lambda: r1.setdefault("x", self.chat("blocker", max_tokens=40)))
+        th = threading.Thread(target=lambda: r1.setdefault("x", self.chat("blocker LONGREPLY", max_tokens=200)))
         th.start()
         time.sleep(0.05)
         first = self.chat(a)

From 1a56d71b01a18190ff3a11b63c1c895f9f7061ef Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 03:36:22 +0200
Subject: [PATCH 187/201] #465 setup: recommend "parallel" only where the
 experts mostly fit in VRAM

On a card whose experts mostly run on the CPU the slots cost speed per request (RTX 5070, Q2_0: 11-24 %), so setup
now recommends slots only when the expert cache (every card of a split counted) still holds half of the model's
experts beside them (Q2_0: 24 GB and up, or a split); elsewhere it stays at one at a time and says "parallel N
reduces waiting for several users but costs about 10-25% speed per request on this card". --parallel N is
honoured as asked, as before. BATCHING.md: the table with the change against one at a time.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/BATCHING.md             | 39 +++++++++++++++-----------
 setup.py                     | 53 +++++++++++++++++++++++-------------
 tools/test_setup_parallel.py | 41 +++++++++++++++++++---------
 3 files changed, 85 insertions(+), 48 deletions(-)

diff --git a/docs/BATCHING.md b/docs/BATCHING.md
index 10fb0c18b01..7672dcc5861 100644
--- a/docs/BATCHING.md
+++ b/docs/BATCHING.md
@@ -12,7 +12,8 @@ It is opt-in and changes nothing when the options are absent (#465; the engine p
 ## Turning it on
 
 One GPU: add `"parallel": 2` to the model's config (`strata-<model>.json`) and restart, or run setup with
-`--parallel 2`. Setup says what it recommends for the card (below); a larger number is kept as asked, with a note.
+`--parallel 2`. Setup recommends it only where it does not cost speed (below); any number you ask for is kept as
+asked, with a note when it is more than setup would recommend.
 
 ```
 "parallel": 2
@@ -42,9 +43,14 @@ KV, more with a longer context unless the KV cache streams (`--kv-resident`: the
 stays in VRAM, and each slot's whole KV cache takes pinned RAM - 1.6 GB at 128K). On a card whose experts mostly run
 on the CPU, a batch also reads about as many distinct experts as the requests one by one (different conversations
 route to different experts), so the gain is in **latency** (nobody waits for a whole answer), and a request alone
-runs a little slower (the smaller expert cache) - see the measurements below. Setup recommends as many slots as take
-at most a fifth of the expert cache (~VRAM less 5 GB), up to 4: 2 on a 12 GB card, 3 on 16 GB, 4 from 24 GB; none
-below 12 GB.
+runs slower (the smaller expert cache): 11-24 % on a 12 GB card, see the measurements below.
+
+So setup recommends `"parallel"` **only where the experts mostly fit in VRAM**: the expert cache (each card's VRAM
+less ~5 GB, every card of a layer split counted) must still hold at least half of the model's experts beside the
+slots, and the slots may take at most a fifth of it, up to 4 slots. With Q2_0 at 32K that is 3 slots on a 24 GB
+card, 4 from 32 GB or on a split such as 2 x 16 GB; IQ3_S needs 32 GB or a split. Everywhere else (any 12 or 16 GB
+card alone) it stays at one at a time and setup says: "parallel N reduces waiting for several users but costs
+about 10-25% speed per request on this card". `--parallel N` is honoured as asked either way.
 
 ## How the server uses the slots
 
@@ -121,24 +127,25 @@ counter-based draw (Philox(seed, position)).
 One RTX 5070 (12 GB), Ryzen 5 7600, 64 GB DDR5, Q2_0, 32K context, through the HTTP server: C different requests
 sent at once (an 800-word essay each, 256 tokens per answer, greedy, thinking off), median of 3 rounds:
 
-| Concurrent | Setting | Total tok/s | Per request tok/s | First token: median / last of the round |
-| ---: | --- | ---: | ---: | ---: |
-| 1 | one at a time (default) | 74.3 | 83.6 | 0.4 s / 0.4 s |
-| 1 | `"parallel": 2` | 67.3 | 74.8 | 0.4 s / 0.4 s |
-| 1 | `"parallel": 4` | 57.9 | 63.8 | 0.4 s / 0.4 s |
-| 2 | one at a time | 71.6 | 77.3 | 2.1 s / 4.1 s |
-| 2 | `"parallel": 2` | 61.0 | 32.6 | 0.5 s / 0.9 s |
-| 2 | `"parallel": 4` | 54.6 | 28.7 | 0.6 s / 0.7 s |
-| 4 | one at a time | 70.7 | 79.6 | 6.0 s / 11.2 s |
-| 4 | `"parallel": 2` | 61.2 | 32.2 | 4.5 s / 9.3 s |
-| 4 | `"parallel": 4` | 63.1 | 16.9 | 1.0 s / 1.8 s |
+| Concurrent | Setting | Total tok/s | vs one at a time | Per request tok/s | First token: median / last of the round |
+| ---: | --- | ---: | ---: | ---: | ---: |
+| 1 | one at a time (default; what setup recommends on this card) | 74.3 | - | 83.6 | 0.4 s / 0.4 s |
+| 1 | `"parallel": 2` | 67.3 | -9 % | 74.8 | 0.4 s / 0.4 s |
+| 1 | `"parallel": 4` | 57.9 | -22 % | 63.8 | 0.4 s / 0.4 s |
+| 2 | one at a time | 71.6 | - | 77.3 | 2.1 s / 4.1 s |
+| 2 | `"parallel": 2` | 61.0 | -15 % | 32.6 | 0.5 s / 0.9 s |
+| 2 | `"parallel": 4` | 54.6 | -24 % | 28.7 | 0.6 s / 0.7 s |
+| 4 | one at a time | 70.7 | - | 79.6 | 6.0 s / 11.2 s |
+| 4 | `"parallel": 2` | 61.2 | -13 % | 32.2 | 4.5 s / 9.3 s |
+| 4 | `"parallel": 4` | 63.1 | -11 % | 16.9 | 1.0 s / 1.8 s |
 
 On this card the slots buy **waiting time, not speed**: the fourth of four requests starts after 1.8 s instead of
 11.2 s, but together they decode 11-24 % slower than one after the other, and a request alone loses 11 % (2 slots)
 or 24 % (4 slots), because the slots' sessions (0.56 GiB each) come out of the expert cache and most experts run
 on the CPU: a batch window over 4 conversations reads 24 CPU experts per layer against ~8 for one, so it costs about
 what the 4 tokens cost one after the other (`strata batch:` in the engine log: 54 ms per 4-row window, ~20 ms per
-1-row window). Cards that hold most experts in VRAM, and a layer split, are where the slots also add speed (below).
+1-row window). This is why setup leaves a 12 GB card at one at a time. Cards that hold most experts in VRAM, and a
+layer split, are where the slots also add speed (below).
 
 A 4-GPU layer split (4 x 16 GB, PCIe Gen3), IQ3_S, `--batch 8 --batch-groups 4 --trim-stage-weights`, through
 the HTTP server, 400 tokens per answer, temperature 0.7 (PR #559):
diff --git a/setup.py b/setup.py
index be9a034dbe3..b294fa06b10 100644
--- a/setup.py
+++ b/setup.py
@@ -3078,6 +3078,9 @@ def small_card_note(ctx: int, draft_vocab: str | None) -> list[str]:
 
 PARALLEL_MAX = 8               # #465: the engine's batch window holds at most 8 requests
 PARALLEL_SHARE = 0.2           # #465: the slots' sessions may take this share of the VRAM the expert cache would hold
+PARALLEL_HELD = 0.5            # #465: ... and only where the cache still holds this share of the experts beside them
+PARALLEL_COST_NOTE = ("parallel N reduces waiting for several users but costs about 10-25% speed per request on this "
+                      "card")
 
 
 def parallel_slot_gb(ctx: int, kv: str, streaming: bool) -> float:
@@ -3087,33 +3090,43 @@ def parallel_slot_gb(ctx: int, kv: str, streaming: bool) -> float:
     return (min(ctx, 32768) if streaming else ctx) * kv_tok / 1e9 + 0.17
 
 
-def parallel_recommend(vram_gb: float, ctx: int, kv: str, streaming: bool) -> int:
-    """#465: how many requests at once ("parallel") this card can take without the slots' sessions eating more than
-    PARALLEL_SHARE of its expert cache (~VRAM less 5 GB): 0 = none (one at a time).  Every slot's VRAM is expert cache
-    lost, and on a card whose experts mostly run on the CPU the batch reads ~as many experts as the requests one by one:
-    measured on a 12 GB RTX 5070 (Q2_0, 32K), 2 requests at once 66 tok/s together (one alone ~65), 4 at once 45."""
-    cache_gb = max(0.0, vram_gb - 5)
-    n = int(PARALLEL_SHARE * cache_gb / parallel_slot_gb(ctx, kv, streaming))
-    return min(4, n) if n >= 2 else 0
+def parallel_recommend(vram_gbs, arena_gb: float, ctx: int, kv: str, streaming: bool) -> int:
+    """#465: how many requests at once ("parallel") to recommend: 0 = none (one at a time).  Only where the experts
+    mostly fit in VRAM - the expert cache (each card's VRAM less ~5 GB, every card of a layer split) still holds
+    PARALLEL_HELD of the model's experts beside the slots' sessions, which take at most PARALLEL_SHARE of it, up to 4.
+    Where the experts mostly run on the CPU a batch reads about as many experts as the requests one by one and every
+    slot's VRAM is expert cache lost: measured on a 12 GB RTX 5070 (Q2_0, 32K), a request alone 11-24% slower with 2-4
+    slots, 4 requests together 63 tok/s against 71 one after the other (docs/BATCHING.md)."""
+    if isinstance(vram_gbs, (int, float)):
+        vram_gbs = [vram_gbs]
+    cache_gb = sum(max(0.0, v - 5) for v in vram_gbs)
+    slot = parallel_slot_gb(ctx, kv, streaming)
+    best = 0
+    for n in (2, 3, 4):
+        if n * slot <= PARALLEL_SHARE * cache_gb and (cache_gb - n * slot) >= PARALLEL_HELD * arena_gb:
+            best = n
+    return best
 
 
-def parallel_note(asked: int | None, vram_gb: float, ctx: int, kv: str, streaming: bool) -> list[str]:
-    """#465: what setup says about "parallel": the recommendation, or how the asked count compares with it (kept as
-    asked: recommend, never force)."""
-    rec = parallel_recommend(vram_gb, ctx, kv, streaming)
+def parallel_note(asked: int | None, vram_gbs, arena_gb: float, ctx: int, kv: str, streaming: bool) -> list[str]:
+    """#465: what setup says about "parallel": the recommendation (or, where it would cost speed, why it is left at
+    one), or how the asked count compares with it (kept as asked: recommend, never force)."""
+    rec = parallel_recommend(vram_gbs, arena_gb, ctx, kv, streaming)
     slot = parallel_slot_gb(ctx, kv, streaming)
     if asked is None or asked <= 1:
         if not rec:
-            return []
+            return [f"Several requests at once: left at one at a time - {PARALLEL_COST_NOTE} (docs/BATCHING.md)."]
         return [f"Several requests at once (opt-in): --parallel {rec} decodes up to {rec} together instead of one "
                 f"after the other (each takes ~{slot:.1f} GB of VRAM from the expert cache; docs/BATCHING.md)."]
     lines = [f"parallel requests: {asked} at once (each takes ~{slot:.1f} GB of VRAM from the expert cache, "
              f"{asked * slot:.1f} GB in all)"]
     if asked > PARALLEL_MAX:
         lines.append(f"the engine runs at most {PARALLEL_MAX} at once; it will use {PARALLEL_MAX}")
-    if asked > max(rec, 1):
-        lines.append(f"recommended for this card: {rec or 'one at a time'} - more slots leave fewer experts in VRAM, "
-                     "which can make every request slower; kept as you chose")
+    if not rec:
+        lines.append(f"recommended for this card: one at a time - {PARALLEL_COST_NOTE}; kept as you chose")
+    elif asked > rec:
+        lines.append(f"recommended for this card: {rec} - more slots leave fewer experts in VRAM, which can make every "
+                     "request slower; kept as you chose")
     return lines
 
 
@@ -4023,7 +4036,8 @@ def main() -> int:
     if a.parallel is not None:
         if a.parallel >= 2:
             cfg["parallel"] = a.parallel
-            for i, line in enumerate(parallel_note(a.parallel, gpu.get("vram_gb", 0.0), ctx, kv, streaming)):
+            for i, line in enumerate(parallel_note(a.parallel, [g.get("vram_gb", 0.0) for g in chosen],
+                                                   MODELS[model]["arena_gb"], ctx, kv, streaming)):
                 (ok if i == 0 else warn)(line)
         else:
             cfg["parallel"] = 1
@@ -4067,8 +4081,9 @@ def main() -> int:
     say(f"  Next time:        just run {'START-HERE.bat' if WIN else './setup.sh'} (or {script.name}) - it starts right away")
     if vision != "none":
         say("  Images:           send them in the chat page, in chat.py (/image <path>) or over the API")
-    if a.parallel is None and not multi:               # #465: the opt-in, said once (nothing changes)
-        for line in parallel_note(None, gpu.get("vram_gb", 0.0), ctx, kv, "--kv-resident" in cfg["args"]):
+    if a.parallel is None:                             # #465: the opt-in, said once (nothing changes)
+        for line in parallel_note(None, [g.get("vram_gb", 0.0) for g in chosen], MODELS[model]["arena_gb"], ctx, kv,
+                                  "--kv-resident" in cfg["args"]):
             say("  " + line)
     if tuned is False:                                 # #447: a failed tuning is repeated here, not only above
         say("  Tuning:           FAILED (the reason is above): the default settings stay - "
diff --git a/tools/test_setup_parallel.py b/tools/test_setup_parallel.py
index 7c3b94a320c..d654bdfde8e 100644
--- a/tools/test_setup_parallel.py
+++ b/tools/test_setup_parallel.py
@@ -16,22 +16,37 @@ def test_slot_size(self):
         self.assertEqual(S.parallel_slot_gb(262144, "int8", True), S.parallel_slot_gb(32768, "int8", False))
         self.assertLess(S.parallel_slot_gb(32768, "q4_0", False), S.parallel_slot_gb(32768, "int8", False))
 
-    def test_recommendation_by_card(self):
-        self.assertEqual(S.parallel_recommend(8, 32768, "int8", False), 0)      # too small: one at a time
-        self.assertEqual(S.parallel_recommend(12, 32768, "int8", False), 2)     # the measured 5070
-        self.assertEqual(S.parallel_recommend(24, 32768, "int8", False), 4)
-        self.assertEqual(S.parallel_recommend(48, 32768, "int8", False), 4)     # capped at 4
-        self.assertEqual(S.parallel_recommend(12, 262144, "int8", False), 0)    # a 262K KV cache per slot: no
-        self.assertEqual(S.parallel_recommend(12, 262144, "int8", True), 2)     # ... unless it streams
+    def test_recommendation_only_where_the_experts_mostly_fit(self):
+        q2, iq3s = S.MODELS["Q2_0"]["arena_gb"], S.MODELS["IQ3_S"]["arena_gb"]
+        # most experts on the CPU: slots cost speed per request (measured on the 12 GB 5070) - none recommended
+        self.assertEqual(S.parallel_recommend(12, q2, 32768, "int8", False), 0)
+        self.assertEqual(S.parallel_recommend(16, q2, 32768, "int8", False), 0)
+        self.assertEqual(S.parallel_recommend(24, iq3s, 32768, "int8", False), 0)
+        # the cache holds most of the experts beside the slots: recommended
+        self.assertEqual(S.parallel_recommend(24, q2, 32768, "int8", False), 3)
+        self.assertEqual(S.parallel_recommend(48, q2, 32768, "int8", False), 4)       # capped at 4
+        self.assertEqual(S.parallel_recommend([24, 24], iq3s, 32768, "int8", False), 4)   # a layer split: every card
+        self.assertEqual(S.parallel_recommend([16, 16], q2, 32768, "int8", False), 4)
+        self.assertEqual(S.parallel_recommend(32, q2, 262144, "int8", False), 0)      # a 262K KV per slot: no
+        self.assertEqual(S.parallel_recommend(32, q2, 262144, "int8", True), 4)       # ... unless it streams
 
     def test_notes_recommend_never_force(self):
-        self.assertEqual(S.parallel_note(None, 8, 32768, "int8", False), [])
-        self.assertIn("--parallel 2", S.parallel_note(None, 12, 32768, "int8", False)[0])
-        lines = S.parallel_note(4, 12, 32768, "int8", False)
+        q2 = S.MODELS["Q2_0"]["arena_gb"]
+        # 12 GB: left at one, with the reason
+        note = S.parallel_note(None, 12, q2, 32768, "int8", False)
+        self.assertEqual(len(note), 1)
+        self.assertIn("one at a time", note[0])
+        self.assertIn("costs about 10-25% speed per request on this card", note[0])
+        self.assertIn("--parallel 3", S.parallel_note(None, 24, q2, 32768, "int8", False)[0])
+        # asked on 12 GB: kept, with the cost said
+        lines = S.parallel_note(4, 12, q2, 32768, "int8", False)
         self.assertIn("4 at once", lines[0])
-        self.assertTrue(any("recommended for this card: 2" in x and "kept as you chose" in x for x in lines))
-        self.assertTrue(any("at most 8" in x for x in S.parallel_note(12, 48, 32768, "int8", False)))
-        self.assertEqual(len(S.parallel_note(2, 12, 32768, "int8", False)), 1)   # as recommended: no warning
+        self.assertTrue(any("one at a time" in x and "kept as you chose" in x and "10-25%" in x for x in lines))
+        # asked above the recommendation where it pays
+        lines = S.parallel_note(4, 24, q2, 32768, "int8", False)
+        self.assertTrue(any("recommended for this card: 3" in x for x in lines))
+        self.assertTrue(any("at most 8" in x for x in S.parallel_note(12, 48, q2, 32768, "int8", False)))
+        self.assertEqual(len(S.parallel_note(3, 24, q2, 32768, "int8", False)), 1)   # as recommended: no warning
 
 
 if __name__ == "__main__":

From 8c968a5b1151f2f99613aea02a067b4147f2ac4a Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 03:53:44 +0200
Subject: [PATCH 188/201] #583 on 0.1.39b: the ring's byte budget and the
 loan's corrected count opt-in (STRATA_RING_BYTES=1)

Default: 0.1.39's 384/1024-slot ring and bytes_needed count, so the default loan and output stay as they were.
The auto chunk scan (the PR's second commit) is not taken.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 src/prefill/prefill.cpp | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 4f2654b0a9c..df6cbc1a033 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -156,6 +156,13 @@ inline uint64_t ring_bytes() {
 // ...and what that buys on THIS pack, never past ring_cap(): the slot count `init` lays out, and what the auto
 // chunk scan treats as a full ring.  A pack whose blobs are larger than Q2_0's gets fewer slots for the same
 // bytes, which is the point - the ring competes with the expert cache for the same VRAM.
+// 0.1.39b: opt-in (STRATA_RING_BYTES=1).  It moves the prompt path's loan on a native pack (fewer ring slots, the
+// rest kept as cache slots), so a long prompt's experts are read through a different mix of resident and streamed
+// groups and its bits differ from the default's (RTX 5070, IQ3_XXS, 32K prompt: +14% to +26%).
+inline bool ring_bytes_on() {
+    static const bool on = [] { const char* v = std::getenv("STRATA_RING_BYTES"); return v != nullptr && v[0] == '1'; }();
+    return on;
+}
 inline int ring_budget_slots() {
     const int64_t per = MAXBLOB();
     const int64_t n = per > 0 ? (int64_t) (ring_bytes() / (uint64_t) per) : 0;
@@ -176,7 +183,7 @@ inline int ring_slots(size_t T) {
     // the byte budget as this pack's slots: 1024 fused / 384 not on Q2_0, fewer on a pack with bigger blobs.  The
     // unpinned arm stays a slot count (96): it was measured where the host copies are the limit, and there the ring
     // is not what is competing for VRAM.
-    const int pinned_ring = g_pinned_share >= 0.9 ? ring_budget_slots() : 96;
+    const int pinned_ring = g_pinned_share >= 0.9 ? (ring_bytes_on() ? ring_budget_slots() : fused_ring() ? 1024 : 384) : 96;
     const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : pinned_ring;
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
     const int big = r < 16 ? 16 : r > ring_cap() ? ring_cap() : r;
@@ -1349,9 +1356,13 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
     // `grs`.  Net over-count T*(D-HC)*4 bytes: 42 MB at a 1024-token chunk, 252 MB (48 Q8_0 slots) at 6144 - the
     // prompt path was told it had less room than it did.  Safe - the direction is over-estimating, and `take`
     // still bounds-checks - but it under-sizes every loan, so every chunk the scan picks is one step smaller.
-    f(T * N); f(T * D);
-    if (gr_unfused()) f(T * D);
-    f(T * HC);
+    if (ring_bytes_on()) {
+        f(T * N); f(T * D);
+        if (gr_unfused()) f(T * D);
+        f(T * HC);
+    } else {   // 0.1.39's count (the default loan stays as it was)
+        f(T * N); f(T * D); f(T * D);
+    }
     o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
     f(T * D); f(T * HC); f(T * N); o.take<uint16_t>(T * N, ok); o.take<uint16_t>(T * N, ok); f(T * N);
     if (bf16x2_hc()) { o.take<uint16_t>(T * D, ok); o.take<uint16_t>(T * LR, ok); }

From a93c2acace2997dfde28428fe489a6ee1e8814c6 Mon Sep 17 00:00:00 2001
From: Gopi <gopi@example.com>
Date: Sat, 3 Oct 2026 08:18:01 +0530
Subject: [PATCH 189/201] serve (auto): the chunk and the ring are one budget,
 and the ring is the better buy

`--prefill auto` walked a fixed list of chunk sizes - 32768, 16384, 8192,
6144, ... - and took the first that fitted, with the ring a fixed 384 slots
taken off the top before the chunk was ever considered.  Both halves of
that were wrong on a rig like this one.

The list is coarse exactly where it matters.  `bytes_needed` is a sum of
(T x positive constant) terms plus a max of such sums, so it rises
monotonically with T, and so does every test the scan applies - which makes
the largest chunk that fits a bisection on the 256-token grid the prompt
path already works on.  Seven probes against the list's ten, at one
`bytes_needed` each.  It matters because this rig affords ~8,700 tokens and
was handed 8192; 8704 is not on the list.

The order was wrong because chunk and ring spend the same borrowed VRAM,
and a ring slot is worth far more than a chunk token.  Measured here (2x
RTX 3060 + 2x RTX 5060, CUDA3 lending at its 90% cap, 120K prompt): 8960
tokens with the 17-slot ring that leaves reads at 963 tok/s, 8192/130 at
1,008, 7168 with the ring full at its 199-slot byte budget at 1,000, 5632/199
at 915.  A ring slot is worth ~0.53 tok/s and a chunk token ~0.05, so the 69
slots between a full ring and 8192's 130 are worth more than the 512 chunk
tokens they cost - and once the ring IS full, a smaller chunk buys nothing.
So: the largest chunk that still leaves the ring full, and only a rig where
no chunk can afford one falls back to the old rule with a kRingMin floor.

The room is counted in BYTES, not slots.  A ring slot is max_blob, but a
cache slot holds its own layer's blob - 2.15 MiB against a 2.54 MiB max_blob
here.  In slots the ring looked 18% cheaper than it is, a chunk whose ring
fitted only after that discount was refused outright, and the scan stopped a
step short.  `bytes_from_slots` is the inverse of the existing
`slots_from_bytes`, and `cache_slots_for` factors the latter out for the
serve path's per-participant version.  Both inverses clamp at k <= 0: the
lend budget is `min(slots - 128, pct * slots / 100)` and goes negative on a
cache under 128 slots, where `slots - k` is off_[slots] - the end of the
prefix sum, so that cache lends 0 bytes rather than reading past its offsets.

Upstream's per-participant `fits`/`fits_one` and the #448 diagnostic are kept:
the ring room is taken over the smallest participant, `alone` is the chunk
CUDA0 alone would read in, and the small-card warning is unchanged.

Verified on the rig: the scan picks 7680/199 against the old rule's 8960/17,
1018.8 and 1021.1 tok/s on two cold 120K prompts against 963.1 - +5.9%.
Q8_0 picks 5632/101, its 506 MiB budget over a 5,222,400 B blob.

Co-Authored-By: Claude Code <noreply@anthropic.com>

0.1.39b (Niko1221): behind STRATA_RING_BYTES=1 with the byte-budget ring; the default keeps 0.1.39's chunk list
(plan_lend and the serve scan), its log line gains the ring. The INFO fields (the Monitor commit) are not taken.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/prefill/prefill.hpp |   4 +
 src/prefill/prefill.cpp            |   2 +
 src/program/generate.cpp           | 227 +++++++++++++++++++++++------
 3 files changed, 188 insertions(+), 45 deletions(-)

diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index b3526f5b5d4..73bfa5a490f 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -98,6 +98,10 @@ class Prefill {
     /// Monitor tab shows the pair the run really got, not what it asked for.
     static int64_t ring_slots_for(int64_t chunk);
 
+    /// 0.1.39b: STRATA_RING_BYTES=1 (opt-in): the ring as a byte budget, the loan's corrected count and the auto chunk
+    /// scan that keeps the ring full (#583).  Off: 0.1.39's ring, loan and chunk list.
+    static bool ring_bytes_enabled();
+
     /// Positions [pos0, pos0 + n) holding `tokens`; `ss.ple_prev` must be the two tokens before pos0 (oldest
     /// first, -1 for none) and is advanced to the last two of these.
     bool run(const int64_t* tokens, int64_t n, int64_t pos0, std::string& err);
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index df6cbc1a033..4242ed26246 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -1399,6 +1399,8 @@ int64_t Prefill::ring_max_slots() { return (int64_t) ring_budget_slots(); }
 
 int64_t Prefill::ring_slots_for(int64_t chunk) { return ring_slots((size_t) chunk); }
 
+bool Prefill::ring_bytes_enabled() { return ring_bytes_on(); }
+
 namespace {
 
 const core::WeightRef* need(const core::LayerView& v, const char* suffix, std::string& err) {
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 4b5780a19c7..12660dcf470 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4266,8 +4266,9 @@ int main(int argc, char** argv) {
             }
         strata::prefill::Prefill::set_pinned_share(total ? (double) pinned / (double) total : 1.0);
     }
-    auto lend_slots = [&](int64_t c) -> int64_t {
-        const uint64_t need = strata::prefill::Prefill::bytes_needed(g, ss, c);
+    // bytes -> slots for CUDA0's cache: exact when it knows its per-slot offsets (a native pack's blobs differ
+    // per layer), otherwise max_blob each.
+    auto slots_from_bytes = [&](uint64_t need) -> int64_t {
         const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
         int64_t k = (int64_t) ((need + (uint64_t) blob - 1) / (uint64_t) blob);
         if (xcache.slot_offsets() != nullptr) {   // sized slots: take slots from the end until they hold `need`
@@ -4277,6 +4278,18 @@ int main(int argc, char** argv) {
         }
         return k;
     };
+    // ...and its inverse, for the ring's room: the bytes the cache's last `k` slots hold.  k can arrive <= 0: the
+    // caller's lend budget is `min(slots - 128, pct * slots / 100)` and goes negative on a cache smaller than 128
+    // slots, where `slots - k` would index slot_offsets() past its end.  Such a cache lends nothing, so say so.
+    auto bytes_from_slots = [&](int64_t k) -> uint64_t {
+        if (k <= 0) return 0;
+        if (xcache.slot_offsets() != nullptr)
+            return (uint64_t) (xcache.bytes() - (int64_t) xcache.slot_offsets()[xcache.slots() - k]);
+        return (uint64_t) k * (uint64_t) strata::kernels::cpu::expert_layout().max_blob;
+    };
+    auto lend_slots = [&](int64_t c) -> int64_t {
+        return slots_from_bytes(strata::prefill::Prefill::bytes_needed(g, ss, c));
+    };
     // `lend_bytes` went with the single-cache serve loan: a participant's loan is priced by `part_bytes` from its
     // OWN cache, and the only other user of the old helper was the serve path's own relayout.
     auto request_chunk = [](int64_t tokens, int64_t max_chunk) -> int64_t {
@@ -4287,7 +4300,7 @@ int main(int argc, char** argv) {
         return std::min(max_chunk, rounded);
     };
     // The prompt path's chunk and the slots it borrows for its buffers: the requested chunk halved until it fits,
-    // or with --prefill auto the largest of kAutoChunks whose buffers take at most kAutoLendPct % of the slots (a
+    // or with --prefill auto the largest chunk whose buffers take at most kAutoLendPct % of the slots (a
     // lent slot's expert is streamed during the prompt and refilled after it; measured on a 12 GB card, 32K Q2_0
     // prompt: 4096 791 tok/s, 6144 878, 8192 973 with 69% of the slots lent).  A request lends only what its own
     // prompt needs (Prefill::relayout), so a big chunk costs short prompts nothing.  0 = none fits.
@@ -4300,13 +4313,30 @@ int main(int argc, char** argv) {
         return v ? (int64_t) std::atoi(v)
                  : (int64_t) (strata::prefill::Prefill::pinned_share() >= 0.9 ? 90 : 85);
     }();
+    // The largest chunk --prefill auto may pick: the operator's ceiling (--prefill auto:N) and never past the
+    // context, but a bare `auto` always reaches 8192.  32768 and 16384 stay opt-in (#282): a 32K prompt with
+    // IQ2_XS (RTX 5090, 64K context) read at 5,624 tok/s in 8192-token chunks and 6,465 in one 32768 chunk (40K
+    // -> 18K experts streamed; an NVFP4 pack at 262K: 3,535 -> 5,201).
+    const int64_t auto_ceiling = std::max<int64_t>(8192, std::min<int64_t>(o.prefill_auto_max, o.max_context));
+    // The auto scan used to walk a fixed list of sizes - 32768, 16384, 8192, 6144, ... - and take the first that
+    // fit.  That list is coarse exactly where a rig needs it: this one affords ~8,700 tokens and was handed 8192,
+    // and 8704 is not on it.  `bytes_needed` is a sum of (T x positive constant) terms plus a max of such sums,
+    // so it rises monotonically with T, and so does every test the scan applies - which makes the largest size
+    // that fits a bisection on the 256-token grid the prompt path already works on (`request_chunk` rounds up to
+    // it).  log2(32768/256) = 7 probes, against the list's 10, at one `bytes_needed` per probe.
+    auto biggest_chunk = [](int64_t ceiling, auto&& ok) -> int64_t {
+        if (ceiling < 256) return 0;
+        int64_t lo = 1, hi = ceiling / 256, best = 0;   // n = T / 256, and ok() is monotone in n
+        while (lo <= hi) {
+            const int64_t mid = lo + (hi - lo) / 2;
+            if (ok(mid * 256)) { best = mid * 256; lo = mid + 1; } else hi = mid - 1;
+        }
+        return best;
+    };
     auto plan_lend = [&](int64_t& chunk) -> int64_t {
-        // 32768 and 16384 (#282, opt-in: --prefill auto:32768): a 32K prompt with IQ2_XS (RTX 5090, 64K context)
-        // read at 5,624 tok/s in 8192-token chunks and 6,465 in one 32768 chunk (40K -> 18K experts streamed; an
-        // NVFP4 pack at 262K: 3,535 -> 5,201)
-        static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
         auto slots_for = lend_slots;
-        if (o.prefill_auto) {
+        if (o.prefill_auto && !strata::prefill::Prefill::ring_bytes_enabled()) {   // 0.1.39's list (the default)
+            static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
             for (const int64_t c : kAutoChunks) {
                 // above 8192: only when asked for, and only when a prompt of the context can use it
                 if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;
@@ -4315,6 +4345,54 @@ int main(int argc, char** argv) {
             }
             return 0;
         }
+        if (o.prefill_auto) {   // STRATA_RING_BYTES=1 (#583)
+            // The chunk and the ring are one budget, and the ring is the better buy.  Measured on this 4-way
+            // IQ3_S rig (2x RTX 3060 + 2x RTX 5060, CUDA3 lending at its 90% cap) on a 120K prompt: 8960 tokens
+            // with the 17-slot ring that leaves reads at 963 tok/s, 8192/130 at 1,008, 7168 with the ring full at
+            // its 199-slot byte budget at 1,000, and 5632/199 at 915.  A ring slot is worth ~0.53 tok/s there and
+            // a chunk token ~0.05, so the 69 slots between a full ring and 8192's 130 are worth more than the
+            // 512 chunk tokens they cost - and once the ring IS full, shrinking the chunk further buys nothing.
+            // So: the largest chunk that still leaves the ring full.  Only a rig where no chunk at all can afford
+            // one falls back to the old rule, which takes the largest chunk whose ring clears kRingMin (the
+            // value at or below which ring_slots() returns STAGE and streaming is off).
+            constexpr int64_t kRingMin = 16;
+            const int64_t ring_max = strata::prefill::Prefill::ring_max_slots();
+            const int64_t budget = std::min(xcache.slots() - 128, kAutoLendPct * xcache.slots() / 100);
+            // The room is a BYTE budget.  A ring slot is max_blob bytes (`carve` lays out one whole blob each),
+            // while these cache slots hold their own layer's blob, which is smaller than max_blob unless the cache
+            // happens to hold the pack's biggest layer - on the 4-way IQ3_S rig that is 2.15 MiB a slot against a
+            // 2.54 MiB max_blob.  Counting the room in slots priced the ring at 0.85x what it costs, `fits` then
+            // rejected the whole chunk instead of shrinking the ring, and the scan stopped a step short: measured
+            // against chunk 6144/ring 199, 8192 was refused where the same bytes afford a ~87-slot ring.
+            const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+            const uint64_t avail = bytes_from_slots(budget);
+            auto room_of = [&](int64_t t) -> int64_t {
+                const uint64_t nonring = strata::prefill::Prefill::bytes_needed_no_ring(g, ss, t);
+                return std::min((int64_t) ((avail - std::min(avail, nonring)) / (uint64_t) blob), ring_max);
+            };
+            // `room_of` is capped at ring_max, so "the ring is full" is exactly room == ring_max, and both that
+            // test and the ones below it only get harder as t grows - the bisection stays valid.
+            auto scan = [&](int64_t floor) -> int64_t {
+                return biggest_chunk(auto_ceiling, [&](int64_t t) -> bool {
+                    const int64_t room = room_of(t);
+                    if (room < floor) return false;
+                    strata::prefill::Prefill::set_ring_override((int) room);
+                    // ring_slots() now returns `room` - unless STRATA_PREFILL_RING overrides it, in which case the
+                    // chunk has to fit THAT ring, which is the pre-fix rule and the A/B arm
+                    const int64_t k = slots_for(t);
+                    return k + 128 <= xcache.slots() && k * 100 <= kAutoLendPct * xcache.slots();
+                });
+            };
+            int64_t c = scan(ring_max);
+            if (c == 0) c = scan(kRingMin);
+            if (c > 0) {
+                // the probe left the override on its last trial; put it back on the chunk that won
+                strata::prefill::Prefill::set_ring_override((int) room_of(c));
+                chunk = c;
+                return slots_for(c);
+            }
+            return 0;
+        }
         for (int64_t c = chunk; c >= 256; c /= 2) {
             const int64_t k = slots_for(c);
             if (k + 128 <= xcache.slots()) { chunk = c; return k; }
@@ -4427,9 +4505,9 @@ int main(int argc, char** argv) {
             int64_t lent_chunk = 0;
             std::vector<std::pair<int32_t, int32_t>> lent;
         };
-        auto part_slots = [&](const PfPart& p, int64_t c) -> int64_t {
-            const uint64_t need = strata::prefill::Prefill::bytes_needed(g, *p.ses, c);
-            strata::core::ExpertCache& xc = *p.cache;
+        // bytes -> slots for one cache: exact when it knows its per-slot offsets (a native pack's blobs differ
+        // per layer), otherwise max_blob each.
+        auto cache_slots_for = [&](const strata::core::ExpertCache& xc, uint64_t need) -> int64_t {
             if (xc.slot_offsets() != nullptr) {   // sized slots: from the end until they hold `need`
                 int64_t k = 0;
                 while (k < xc.slots() &&
@@ -4439,6 +4517,9 @@ int main(int argc, char** argv) {
             const int64_t blob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
             return (int64_t) ((need + (uint64_t) blob - 1) / (uint64_t) blob);
         };
+        auto part_slots = [&](const PfPart& p, int64_t c) -> int64_t {
+            return cache_slots_for(*p.cache, strata::prefill::Prefill::bytes_needed(g, *p.ses, c));
+        };
         auto part_bytes = [&](const PfPart& p, int32_t first) -> uint64_t {
             strata::core::ExpertCache& xc = *p.cache;
             return xc.slot_offsets() ? (uint64_t) (xc.bytes() - (int64_t) xc.slot_offsets()[first])
@@ -4485,54 +4566,110 @@ int main(int argc, char** argv) {
                     if (!fits_one(p, c, cap)) return false;
                 return true;
             };
-            static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
-            auto pick = [&](const PfPart* only) -> int64_t {
-                if (o.prefill_auto) {
+            // The chunk and the ring are one budget.  The ring used to be a fixed 384 slots taken off the top
+            // before the chunk was considered: 506 MiB on a Q2_0 pack, where it was tuned, but 1,912 MiB on
+            // Q8_0, more than half an 8 GB card's cache - which is what kept that card at a 1024-token chunk.
+            // Size the chunk first and hand the ring what the smallest participant leaves over, up to the ring's
+            // byte budget - but hand it ALL of it, as in plan_lend: the ring is the better buy per byte (the
+            // measurements are there), so the chunk to take is the largest one that still leaves the ring full,
+            // not the largest one that leaves it anything at all.  kRingMin is the fallback floor for a rig where
+            // no chunk can afford a full ring; ring_slots() returns STAGE at or below it, which turns streaming
+            // off.
+            constexpr int64_t kRingMin = 16;
+            // The room is a BYTE budget, as in plan_lend: a ring slot is max_blob bytes, but a cache slot holds
+            // its own layer's blob, which on this rig averages 0.85 of it.  In slots the ring looked 18% cheaper
+            // than it is, and a chunk whose ring only fitted after that discount was refused outright - the scan
+            // stopped one step short while the chunk it did take had room to spare for the cap-sized ring.
+            const int64_t kBlob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
+            auto ring_room = [&](int64_t c, const PfPart* only) -> int64_t {
+                int64_t room = strata::prefill::Prefill::ring_max_slots();
+                for (const PfPart& p : pf_parts) {
+                    if (only != nullptr && &p != only) continue;
+                    // clamped at 0: a cache under 128 slots has a negative lend budget, and `slots - budget` is
+                    // then `slots`, which is off_[slots] - the end of the prefix sum, so that cache lends 0 bytes
+                    // rather than reading one entry past its offsets
+                    const int64_t budget = std::max<int64_t>(0, std::min(p.cache->slots() - 128,
+                                                                        kAutoLendPct * p.cache->slots() / 100));
+                    const uint64_t avail = part_bytes(p, (int32_t) (p.cache->slots() - budget));
+                    const uint64_t nonring = strata::prefill::Prefill::bytes_needed_no_ring(g, *p.ses, c);
+                    room = std::min(room, (int64_t) ((avail - std::min(avail, nonring)) / (uint64_t) kBlob));
+                }
+                return room;
+            };
+            // The largest chunk on the 256-token grid that `only` - or, with null, every stage - can lend with the
+            // ring still at its full byte budget (ring_room is capped at ring_max, so that is room == ring_max),
+            // under the operator's ceiling (auto_ceiling keeps a bare `auto` at 8192, #282).  Failing that, the
+            // largest chunk whose ring clears kRingMin.
+            auto scan = [&](const PfPart* only) -> int64_t {
+                if (!o.prefill_auto) {   // an explicit --prefill is the operator's number, and a loan of it only has to fit
+                    for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
+                        if (fits(c, false, only)) return c;
+                    return 0;
+                }
+                if (!strata::prefill::Prefill::ring_bytes_enabled()) {   // 0.1.39's list (the default)
+                    static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
                     for (const int64_t c : kAutoChunks) {
                         if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
                         if (fits(c, true, only)) return c;
                     }
-                } else {
-                    for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
-                        if (fits(c, false, only)) return c;
+                    return 0;
                 }
-                return 0;
+                auto probe = [&](int64_t floor) -> int64_t {
+                    return biggest_chunk(auto_ceiling, [&](int64_t t) -> bool {
+                        const int64_t room = ring_room(t, only);
+                        if (room < floor) return false;
+                        strata::prefill::Prefill::set_ring_override((int) room);
+                        // ring_slots() now returns `room` - unless STRATA_PREFILL_RING overrides it, in which
+                        // case the chunk has to fit THAT ring, which is the pre-fix rule and the A/B arm
+                        return fits(t, true, only);
+                    });
+                };
+                int64_t c = probe(strata::prefill::Prefill::ring_max_slots());
+                if (c == 0) c = probe(kRingMin);
+                return c;
             };
-            const int64_t chunk = pick(nullptr);
+            const int64_t chunk = scan(nullptr);
             // #448: a small card in a layer split caps every stage's chunk (an RTX 3080's 512-slot cache held a
             // 32 GB card's split to 512 tokens: prompts 6.2x slower, decode the same).  Named when it bites, so the
             // regression is one log line: each stage that cannot fund the chunk CUDA0 alone would read in.
-            if (pf_parts.size() > 1) {
-                const int64_t alone = pick(&pf_parts[0]);
-                if (alone > chunk) {
-                    for (size_t i = 1; i < pf_parts.size(); ++i) {
-                        const PfPart& p = pf_parts[i];
-                        if (fits_one(p, alone, o.prefill_auto)) continue;
-                        const int dev = p.dev < 0 ? 0 : p.dev;
-                        cudaDeviceProp prop{};
-                        if (cudaGetDeviceProperties(&prop, dev) != cudaSuccess) {
-                            (void) cudaGetLastError();
-                            prop.name[0] = 0;
-                        }
-                        const std::string pct =
-                            o.prefill_auto ? ", and lend at most " + std::to_string(kAutoLendPct) + "%" : "";
-                        std::fprintf(stderr, "strata serve: WARNING: prompt chunk %lld tokens, not %lld: CUDA%d (%s) "
-                                             "has %lld expert-cache slots, and a %lld-token chunk borrows %lld of them "
-                                             "(it must keep 128%s) - prompts read slower than on CUDA0 alone (#448)\n",
-                                     (long long) chunk, (long long) alone, dev, prop.name,
-                                     (long long) p.cache->slots(), (long long) alone,
-                                     (long long) part_slots(p, alone), pct.c_str());
-                        // the helper tiers start at CUDA1 without a split (and are enabled in order)
-                        std::fprintf(stderr, "strata serve:   a card this small can serve as a helper expert cache "
-                                             "instead of a split stage: without --layer-split, with %s "
-                                             "(docs/SECOND_GPU.md)\n",
-                                     dev == 1 ? "--expert-cache-device1 N" : "--expert-cache-device1..3 N, in order");
+            const int64_t alone = pf_parts.size() > 1 ? scan(&pf_parts[0]) : chunk;
+            // both scans left the ring override on their own last trial: put it back on the chunk that won, which
+            // is what `init` lays out and what the INFO line reports
+            if (chunk > 0 && o.prefill_auto && strata::prefill::Prefill::ring_bytes_enabled())
+                strata::prefill::Prefill::set_ring_override((int) ring_room(chunk, nullptr));
+            if (chunk > 0 && alone > chunk) {
+                for (size_t i = 1; i < pf_parts.size(); ++i) {
+                    const PfPart& p = pf_parts[i];
+                    if (fits_one(p, alone, o.prefill_auto)) continue;
+                    const int dev = p.dev < 0 ? 0 : p.dev;
+                    cudaDeviceProp prop{};
+                    if (cudaGetDeviceProperties(&prop, dev) != cudaSuccess) {
+                        (void) cudaGetLastError();
+                        prop.name[0] = 0;
                     }
+                    const std::string pct =
+                        o.prefill_auto ? ", and lend at most " + std::to_string(kAutoLendPct) + "%" : "";
+                    std::fprintf(stderr, "strata serve: WARNING: prompt chunk %lld tokens, not %lld: CUDA%d (%s) "
+                                         "has %lld expert-cache slots, and a %lld-token chunk borrows %lld of them "
+                                         "(it must keep 128%s) - prompts read slower than on CUDA0 alone (#448)\n",
+                                 (long long) chunk, (long long) alone, dev, prop.name,
+                                 (long long) p.cache->slots(), (long long) alone,
+                                 (long long) part_slots(p, alone), pct.c_str());
+                    // the helper tiers start at CUDA1 without a split (and are enabled in order)
+                    std::fprintf(stderr, "strata serve:   a card this small can serve as a helper expert cache "
+                                         "instead of a split stage: without --layer-split, with %s "
+                                         "(docs/SECOND_GPU.md)\n",
+                                 dev == 1 ? "--expert-cache-device1 N" : "--expert-cache-device1..3 N, in order");
                 }
             }
             if (chunk > 0) {
                 if (o.prefill_auto)
-                    std::fprintf(stderr, "strata serve: prompt chunk auto: %lld tokens\n", (long long) chunk);
+                    // the RESOLVED ring, not the room offered: ring_slots() clamps to [16, RING_MAX] and a chunk
+                    // under stream_all_min() gets STAGE, and STRATA_PREFILL_RING overrides both.  This is what
+                    // `init` lays out, and what the INFO line reports to the Monitor tab.
+                    std::fprintf(stderr, "strata serve: prompt chunk auto: %lld tokens, a %lld-slot ring\n",
+                                 (long long) chunk,
+                                 (long long) strata::prefill::Prefill::ring_slots_for(chunk));
                 else if (chunk != o.prefill_chunk)
                     std::fprintf(stderr, "strata serve: prompt chunk %lld -> %lld tokens so its buffers fit in "
                                          "every expert cache\n", (long long) o.prefill_chunk, (long long) chunk);

From 06586e3efa900d7621c654b1d26eb3ec880e4049 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 04:41:35 +0200
Subject: [PATCH 190/201] docs: STRATA_RING_BYTES=1 (#583, opt-in) with its RTX
 5070 numbers and quality check

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index dc64a554c33..5218890ad3a 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -1031,7 +1031,12 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
   0.1.7) drafts up to 5 tokens from the earlier copy, but only where its measured acceptance and cost say it pays:
   code edits 6-11% faster, other text unchanged. The drafts are checked like the MTP's, so the output is the same.
 - **Prompts** are processed in chunks of up to 8,192 tokens (`--prefill auto`; 32,768 opt-in) with the experts
-  streamed to the GPU over PCIe.
+  streamed to the GPU over PCIe. `STRATA_RING_BYTES=1` (opt-in, engine 0.1.39b, #583) sizes the streamed ring in
+  bytes for the pack and picks the largest auto chunk that keeps that ring full: an RTX 5070 with IQ3_XXS and a
+  partly pinned arena read a 32K prompt 14-26% faster (4K: 1-4% slower). It changes the bits of a long prompt
+  (the experts go through a different mix of cached and streamed groups), which is why it is not the default; in a
+  teacher-forced check against the FP16 prompt path its KL and top-1 agreement match the default's (8K KL 0.042 vs
+  0.054, 32K 0.020 vs 0.019).
 
 The full story, with measurements, bottlenecks and what comes next: **[docs/paper/Strata-Paper.pdf](paper/Strata-Paper.pdf)**.
 

From f1665640ac702126bb7d085be2dadb4247b2db6c Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 04:53:45 +0200
Subject: [PATCH 191/201] hip_compat:
 cudaFuncAttributePreferredSharedMemoryCarveout (#646's fused_gr carveout on
 HIP)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 include/strata/hip_compat/cuda_runtime.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/strata/hip_compat/cuda_runtime.h b/include/strata/hip_compat/cuda_runtime.h
index ccf9a913243..84f9c13be9b 100644
--- a/include/strata/hip_compat/cuda_runtime.h
+++ b/include/strata/hip_compat/cuda_runtime.h
@@ -41,6 +41,7 @@
 #define cudaFree hipFree
 #define cudaFreeHost hipFreeHost
 #define cudaFuncAttributeMaxDynamicSharedMemorySize hipFuncAttributeMaxDynamicSharedMemorySize
+#define cudaFuncAttributePreferredSharedMemoryCarveout hipFuncAttributePreferredSharedMemoryCarveout
 #define cudaGetDevice hipGetDevice
 #define cudaGetDeviceCount hipGetDeviceCount
 #define cudaGetDeviceProperties hipGetDeviceProperties

From 63d8f90c2ff23b5ca2409994910fe95732f557b0 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 07:57:23 +0200
Subject: [PATCH 192/201] setup: --remote-expert-opt recommended for 2+ GPU
 configs (#578)

Added where a config goes to several GPUs (setup --gpus / a multi-GPU install, start --gpus, "use both" at
start). Single-GPU configs are not touched. Opt-out: setup --no-remote-expert-opt, or "remote_expert_opt": false
in the config (a user key, kept on re-runs). The engine uses it only with a helper cache (--expert-cache-device1..3),
so a layer split runs as before. tools/test_setup_remote_opt.py; the 2x16 GB golden configs gain the flag.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/SECOND_GPU.md             | 10 ++++-
 setup.py                       | 28 +++++++++++++
 tools/test_setup_golden.json   |  6 ++-
 tools/test_setup_remote_opt.py | 74 ++++++++++++++++++++++++++++++++++
 tools/test_setup_risk.py       |  4 +-
 tools/test_setup_unsloth.py    |  2 +-
 6 files changed, 117 insertions(+), 7 deletions(-)
 create mode 100644 tools/test_setup_remote_opt.py

diff --git a/docs/SECOND_GPU.md b/docs/SECOND_GPU.md
index 11f4ea24901..8dd82b25ff8 100644
--- a/docs/SECOND_GPU.md
+++ b/docs/SECOND_GPU.md
@@ -86,8 +86,14 @@ until the generated tokens have been validated.
 
 ## Optional helper decode optimization
 
-`--remote-expert-opt` (default off, `--serve` only) optimizes the CUDA1-3
-helper caches above. The primary cache avoids admitting experts already held
+`--remote-expert-opt` (`--serve` only) optimizes the CUDA1-3 helper caches
+above. The engine's default is off; since 0.1.39b setup adds it to a config on
+two or more GPUs (`--gpus`, or "use both" at start). It acts only when a helper
+cache is configured; a layer split runs exactly as before. To leave it out:
+setup's `--no-remote-expert-opt`, or `"remote_expert_opt": false` in the
+model's `strata-*.json` (kept when setup runs again). Measured by the PR's
+author: dual RTX 4090 +63% mixed / +132% code decode over the plain helper
+path; RTX 5090 + 4090 +28% / +63%. The primary cache avoids admitting experts already held
 by a helper, and helpers replace cold experts with frequently routed CPU
 misses using their existing same-layer slots. Each helper reduces its expert
 outputs to a weighted partial sum on its GPU before returning one vector per
diff --git a/setup.py b/setup.py
index f0d2a0d13b4..81f6b2f8eba 100644
--- a/setup.py
+++ b/setup.py
@@ -740,6 +740,29 @@ def split_budget(cfg: dict) -> bool:
     return True
 
 
+REMOTE_EXPERT_OPT = "--remote-expert-opt"
+
+
+def recommend_remote_expert_opt(cfg: dict, off: bool = False) -> None:
+    """0.1.39b (#578): a config on two or more GPUs gets --remote-expert-opt - the helper expert caches
+    (--expert-cache-device1..3) then stay complementary to the main GPU's, return their rows already weighted and skip
+    the CPU's activation quantization where no expert is left to it (dual RTX 4090: +63% mixed, +132% code over the
+    plain helper path).  The engine uses it only with a helper cache; a layer split runs as before.  A recommendation:
+    `off` (setup's --no-remote-expert-opt) or "remote_expert_opt": false in the config keeps it out, and a single-GPU
+    config is not touched."""
+    if not isinstance(cfg.get("gpu"), list) or len(cfg["gpu"]) < 2:
+        return
+    args = cfg.setdefault("args", [])
+    if off or cfg.get("remote_expert_opt") is False:
+        if REMOTE_EXPERT_OPT in args:
+            args.remove(REMOTE_EXPERT_OPT)
+        return
+    if REMOTE_EXPERT_OPT not in args:
+        args.append(REMOTE_EXPERT_OPT)
+        ok("multi-GPU: --remote-expert-opt (helper expert caches complementary to the main GPU's, #578; "
+           "--no-remote-expert-opt leaves it out)")
+
+
 def offer_together(cfg_path: Path, cfg: dict, yes: bool) -> dict:
     """Starting a model set up for one card on a PC with two or more that can share it: asked once (the answer is
     saved in its config)."""
@@ -781,6 +804,7 @@ def offer_together(cfg_path: Path, cfg: dict, yes: bool) -> dict:
         cfg["layer_split"] = cfg.get("layer_split") or "auto"
         split_mmap(cfg)
         split_budget(cfg)
+        recommend_remote_expert_opt(cfg)
         ok("from now on this model runs on " + " + ".join(gpu_name(g) for g in pair))
     else:
         ok("staying on one GPU (START-HERE.bat --gpus " + ",".join(str(g["index"]) for g in pair) + " switches)")
@@ -2931,6 +2955,7 @@ def start(cfg_path: Path, port: int | None, gpu: int | list | None = None, open_
         cfg["gpu"], cfg["gpus_asked"] = gpu, True
         cfg["layer_split"] = layer_split or cfg.get("layer_split") or "auto"
         split_budget(cfg)                              # #498: before it is saved (it stops when the RAM is short)
+        recommend_remote_expert_opt(cfg)
         write_config(cfg_path, cfg)
         gpu = None
     elif gpu is not None:                              # --gpu N: this start only, on that card
@@ -3236,6 +3261,8 @@ def main() -> int:
     ap.add_argument("--layer-split", help="with --gpus: where each later GPU's layers start (\"18\", \"16,32\"), one "
                                           "rising number per GPU after the first - not layers per card; default "
                                           "auto, placed from each GPU's free VRAM")
+    ap.add_argument("--no-remote-expert-opt", action="store_true",
+                    help="with two or more GPUs: leave out --remote-expert-opt, which setup adds there (#578)")
     ap.add_argument("--host", help="where the server listens: 127.0.0.1 = this PC only (default), 0.0.0.0 = also other "
                                    "devices on your network (issue #26; set --api-key too)")
     ap.add_argument("--api-key", help="require this key from clients (recommended with --host 0.0.0.0)")
@@ -3966,6 +3993,7 @@ def main() -> int:
         cfg["gpu"] = multi
         cfg["layer_split"] = a.layer_split or "auto"
         ok(f"layer split across GPUs {multi} ({cfg['layer_split']})")
+        recommend_remote_expert_opt(cfg, off=a.no_remote_expert_opt)
     if a.host:
         cfg["host"] = a.host
     if a.api_key:
diff --git a/tools/test_setup_golden.json b/tools/test_setup_golden.json
index c2110bc5386..7431704a20e 100644
--- a/tools/test_setup_golden.json
+++ b/tools/test_setup_golden.json
@@ -482,7 +482,8 @@
     "--max-context",
     "65536",
     "--kv",
-    "int8"
+    "int8",
+    "--remote-expert-opt"
    ],
    "cwd": "<T>",
    "exe": "<T>/engine/<EXE>",
@@ -526,7 +527,8 @@
     "--max-context",
     "65536",
     "--kv",
-    "int8"
+    "int8",
+    "--remote-expert-opt"
    ],
    "cwd": "<T>",
    "exe": "<T>/engine/<EXE>",
diff --git a/tools/test_setup_remote_opt.py b/tools/test_setup_remote_opt.py
new file mode 100644
index 00000000000..7e57ee408d1
--- /dev/null
+++ b/tools/test_setup_remote_opt.py
@@ -0,0 +1,74 @@
+"""0.1.39b (#578): setup recommends --remote-expert-opt for a config on two or more GPUs, never for one, and keeps it
+out when asked (setup's --no-remote-expert-opt, or "remote_expert_opt": false in the config).
+
+    python -m unittest tools.test_setup_remote_opt
+"""
+from __future__ import annotations
+
+import sys
+import unittest
+from pathlib import Path
+from unittest import mock
+
+ROOT = Path(__file__).resolve().parents[1]
+sys.path.insert(0, str(ROOT))
+sys.path.insert(0, str(ROOT / "tools"))
+import setup  # noqa: E402
+from test_setup_golden import PROFILES, install  # noqa: E402
+
+FLAG = "--remote-expert-opt"
+
+
+class Rule(unittest.TestCase):
+    def setUp(self):
+        p = mock.patch.object(setup, "ok", lambda *a: None)
+        p.start()
+        self.addCleanup(p.stop)
+
+    def test_two_gpus_get_it_once(self):
+        cfg = {"args": ["--spec", "4"], "gpu": [0, 1]}
+        setup.recommend_remote_expert_opt(cfg)
+        setup.recommend_remote_expert_opt(cfg)
+        self.assertEqual(cfg["args"], ["--spec", "4", FLAG])
+
+    def test_one_gpu_is_untouched(self):
+        for gpu in (None, 0, [0]):
+            cfg = {"args": ["--spec", "4"]} if gpu is None else {"args": ["--spec", "4"], "gpu": gpu}
+            setup.recommend_remote_expert_opt(cfg)
+            self.assertEqual(cfg["args"], ["--spec", "4"], gpu)
+
+    def test_overrides(self):
+        cfg = {"args": ["--spec", "4", FLAG], "gpu": [0, 1]}
+        setup.recommend_remote_expert_opt(cfg, off=True)
+        self.assertEqual(cfg["args"], ["--spec", "4"])
+        cfg = {"args": ["--spec", "4"], "gpu": [0, 1, 2], "remote_expert_opt": False}
+        setup.recommend_remote_expert_opt(cfg)
+        self.assertEqual(cfg["args"], ["--spec", "4"])
+
+    def test_the_users_key_is_kept_on_a_rerun(self):
+        self.assertNotIn("remote_expert_opt", setup.SETUP_KEYS)   # #629: carried over, so the opt-out survives
+
+
+class Install(unittest.TestCase):
+    def test_install_on_two_gpus(self):
+        ram, found = PROFILES["47GB-2x16GB"]
+        args = ["--family", "qwen", "--no-start", "--model", "Q2_0"]
+        code, text, cfg, _ = install(ram, found, args)
+        self.assertEqual(code, 0, text)
+        self.assertIsInstance(cfg.get("gpu"), list)
+        self.assertEqual(cfg["args"].count(FLAG), 1)
+        self.assertIn("--no-remote-expert-opt leaves it out", text)
+        code, text, off, _ = install(ram, found, args + ["--no-remote-expert-opt"])
+        self.assertEqual(code, 0, text)
+        self.assertNotIn(FLAG, off["args"])
+        self.assertEqual([a for a in cfg["args"] if a != FLAG], off["args"])
+
+    def test_install_on_one_gpu(self):
+        ram, found = PROFILES["96GB-1x16GB"]
+        code, text, cfg, _ = install(ram, found, ["--family", "qwen", "--no-start", "--model", "Q2_0"])
+        self.assertEqual(code, 0, text)
+        self.assertNotIn(FLAG, cfg["args"])
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tools/test_setup_risk.py b/tools/test_setup_risk.py
index 5d5671214cf..366421d93d0 100644
--- a/tools/test_setup_risk.py
+++ b/tools/test_setup_risk.py
@@ -276,7 +276,7 @@ def test_offer_together_recommends_one_gpu_for_a_resident_config(self):
         code, out, asked, cfg = self.offer(["--resident-experts"], "y")
         self.assertIn("[n]", asked[0])
         self.assertEqual(cfg["gpu"], [0, 1])
-        self.assertEqual(cfg["args"], ["--mmap-experts"])
+        self.assertEqual(cfg["args"], ["--mmap-experts", "--remote-expert-opt"])   # 0.1.39b: #578 on 2+ GPUs
         code, out, asked, cfg = self.offer(["--mmap-experts"], None)           # other configs: as before
         self.assertEqual(cfg["gpu"], [0, 1])
 
@@ -296,7 +296,7 @@ def test_start_with_gpus(self):
             cfg = json.loads(p.read_text())
         self.assertIsNone(code, out)
         self.assertEqual(cfg["gpu"], [0, 1])
-        self.assertEqual(cfg["args"], ["--mmap-experts"])
+        self.assertEqual(cfg["args"], ["--mmap-experts", "--remote-expert-opt"])   # 0.1.39b: #578 on 2+ GPUs
         self.assertIn("no layer split yet", out)
         self.assertTrue(call.called)
 
diff --git a/tools/test_setup_unsloth.py b/tools/test_setup_unsloth.py
index 3cd0c998821..895b3ab6be3 100644
--- a/tools/test_setup_unsloth.py
+++ b/tools/test_setup_unsloth.py
@@ -480,7 +480,7 @@ def test_start_with_gpus_drops_the_budget(self):
         self.assertIsNone(code, out)
         self.assertTrue(started)
         self.assertEqual(cfg["gpu"], [0, 1])
-        self.assertEqual(cfg["args"], ["--pack", "p", "--kv", "int8"])
+        self.assertEqual(cfg["args"], ["--pack", "p", "--kv", "int8", "--remote-expert-opt"])   # 0.1.39b: #578
         self.assertIn("no RAM budget", out)
 
     def test_start_with_gpus_refused_without_the_ram(self):

From 5423a695eca21a9f0c33f1347fb60a085d68a99d Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 07:58:15 +0200
Subject: [PATCH 193/201] #583 default on (owner): STRATA_RING_BYTES=0 opts
 out; DETAILS.md with the measured quality

Changes default output on long prompts of native packs against 0.1.39 (expected; gate notes in the S40 report).

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/DETAILS.md                    | 15 +++++++++------
 include/strata/prefill/prefill.hpp |  4 ++--
 src/prefill/prefill.cpp            | 11 ++++++-----
 src/program/generate.cpp           |  6 +++---
 4 files changed, 20 insertions(+), 16 deletions(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 5218890ad3a..62563f853ae 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -1031,12 +1031,15 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
   0.1.7) drafts up to 5 tokens from the earlier copy, but only where its measured acceptance and cost say it pays:
   code edits 6-11% faster, other text unchanged. The drafts are checked like the MTP's, so the output is the same.
 - **Prompts** are processed in chunks of up to 8,192 tokens (`--prefill auto`; 32,768 opt-in) with the experts
-  streamed to the GPU over PCIe. `STRATA_RING_BYTES=1` (opt-in, engine 0.1.39b, #583) sizes the streamed ring in
-  bytes for the pack and picks the largest auto chunk that keeps that ring full: an RTX 5070 with IQ3_XXS and a
-  partly pinned arena read a 32K prompt 14-26% faster (4K: 1-4% slower). It changes the bits of a long prompt
-  (the experts go through a different mix of cached and streamed groups), which is why it is not the default; in a
-  teacher-forced check against the FP16 prompt path its KL and top-1 agreement match the default's (8K KL 0.042 vs
-  0.054, 32K 0.020 vs 0.019).
+  streamed to the GPU over PCIe. Since engine 0.1.39b (#583) the streamed ring is sized in bytes for the pack (a
+  native pack with bigger blobs gets fewer ring slots and keeps more cache slots) and `--prefill auto` picks the
+  largest chunk that keeps that ring full: an RTX 5070 with IQ3_XXS and a partly pinned arena reads a 32K prompt
+  14-26% faster (1,045 -> 1,190 tok/s at a 1,500-slot cache, -> 1,315 at 2,400; a 4K prompt 1-4% slower). Q2_0
+  keeps its 384-slot ring. It changes the bits of a long prompt against 0.1.39 (the experts go through a different
+  mix of cached and streamed groups). Measured quality, teacher-forced over the next 2,001 tokens of a long document
+  against the FP16 prompt path (IQ3_XXS, `--prefill auto`): 8K prompt KL 0.042 (0.1.39: 0.054), top-1 agreement
+  93.5% (92.2%); 32K prompt KL 0.020 (0.019), top-1 95.3% (95.0%) - the same band as before. `STRATA_RING_BYTES=0`
+  restores 0.1.39's ring, loan and chunk choice.
 
 The full story, with measurements, bottlenecks and what comes next: **[docs/paper/Strata-Paper.pdf](paper/Strata-Paper.pdf)**.
 
diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index 73bfa5a490f..ed633fd1046 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -98,8 +98,8 @@ class Prefill {
     /// Monitor tab shows the pair the run really got, not what it asked for.
     static int64_t ring_slots_for(int64_t chunk);
 
-    /// 0.1.39b: STRATA_RING_BYTES=1 (opt-in): the ring as a byte budget, the loan's corrected count and the auto chunk
-    /// scan that keeps the ring full (#583).  Off: 0.1.39's ring, loan and chunk list.
+    /// 0.1.39b (#583, the default): the ring as a byte budget, the loan's corrected count and the auto chunk scan that
+    /// keeps the ring full.  STRATA_RING_BYTES=0: 0.1.39's ring, loan and chunk list.
     static bool ring_bytes_enabled();
 
     /// Positions [pos0, pos0 + n) holding `tokens`; `ss.ple_prev` must be the two tokens before pos0 (oldest
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 4242ed26246..6af1ea5579a 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -156,11 +156,12 @@ inline uint64_t ring_bytes() {
 // ...and what that buys on THIS pack, never past ring_cap(): the slot count `init` lays out, and what the auto
 // chunk scan treats as a full ring.  A pack whose blobs are larger than Q2_0's gets fewer slots for the same
 // bytes, which is the point - the ring competes with the expert cache for the same VRAM.
-// 0.1.39b: opt-in (STRATA_RING_BYTES=1).  It moves the prompt path's loan on a native pack (fewer ring slots, the
-// rest kept as cache slots), so a long prompt's experts are read through a different mix of resident and streamed
-// groups and its bits differ from the default's (RTX 5070, IQ3_XXS, 32K prompt: +14% to +26%).
+// 0.1.39b: on by default (#583); STRATA_RING_BYTES=0 restores 0.1.39's ring, loan and auto chunk list.  It moves the
+// prompt path's loan on a native pack (fewer ring slots, the rest kept as cache slots, a larger auto chunk), so a long
+// prompt's experts are read through a different mix of resident and streamed groups and its bits differ from 0.1.39's
+// (RTX 5070, IQ3_XXS, 32K prompt: +14% to +26%; teacher-forced against the FP16 prompt path in the same band).
 inline bool ring_bytes_on() {
-    static const bool on = [] { const char* v = std::getenv("STRATA_RING_BYTES"); return v != nullptr && v[0] == '1'; }();
+    static const bool on = [] { const char* v = std::getenv("STRATA_RING_BYTES"); return v == nullptr || v[0] != '0'; }();
     return on;
 }
 inline int ring_budget_slots() {
@@ -1360,7 +1361,7 @@ uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::Session
         f(T * N); f(T * D);
         if (gr_unfused()) f(T * D);
         f(T * HC);
-    } else {   // 0.1.39's count (the default loan stays as it was)
+    } else {   // STRATA_RING_BYTES=0: 0.1.39's count
         f(T * N); f(T * D); f(T * D);
     }
     o.take<uint16_t>(T * D, ok); f(T * LR); o.take<uint16_t>(T * LR, ok);
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 12660dcf470..6d98693b926 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4335,7 +4335,7 @@ int main(int argc, char** argv) {
     };
     auto plan_lend = [&](int64_t& chunk) -> int64_t {
         auto slots_for = lend_slots;
-        if (o.prefill_auto && !strata::prefill::Prefill::ring_bytes_enabled()) {   // 0.1.39's list (the default)
+        if (o.prefill_auto && !strata::prefill::Prefill::ring_bytes_enabled()) {   // STRATA_RING_BYTES=0: 0.1.39's list
             static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
             for (const int64_t c : kAutoChunks) {
                 // above 8192: only when asked for, and only when a prompt of the context can use it
@@ -4345,7 +4345,7 @@ int main(int argc, char** argv) {
             }
             return 0;
         }
-        if (o.prefill_auto) {   // STRATA_RING_BYTES=1 (#583)
+        if (o.prefill_auto) {   // the default since 0.1.39b (#583)
             // The chunk and the ring are one budget, and the ring is the better buy.  Measured on this 4-way
             // IQ3_S rig (2x RTX 3060 + 2x RTX 5060, CUDA3 lending at its 90% cap) on a 120K prompt: 8960 tokens
             // with the 17-slot ring that leaves reads at 963 tok/s, 8192/130 at 1,008, 7168 with the ring full at
@@ -4606,7 +4606,7 @@ int main(int argc, char** argv) {
                         if (fits(c, false, only)) return c;
                     return 0;
                 }
-                if (!strata::prefill::Prefill::ring_bytes_enabled()) {   // 0.1.39's list (the default)
+                if (!strata::prefill::Prefill::ring_bytes_enabled()) {   // STRATA_RING_BYTES=0: 0.1.39's list
                     static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
                     for (const int64_t c : kAutoChunks) {
                         if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend

From bc0fc49ab254c3571fcfe23bbc9a62d7f97f66f0 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 08:01:18 +0200
Subject: [PATCH 194/201] setup: the CUDA 12 engine's driver floor per OS
 (Windows 527.41 -> 528, Linux 525); the wheel pins match the 12.9.1 toolkit

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
---
 docs/OLDER_GPUS.md | 5 +++--
 setup.py           | 6 ++++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/docs/OLDER_GPUS.md b/docs/OLDER_GPUS.md
index 05acac20b76..85479834d42 100644
--- a/docs/OLDER_GPUS.md
+++ b/docs/OLDER_GPUS.md
@@ -55,8 +55,9 @@ The choice is kept in the model's config (`"cuda": 12`): its starts and `UPDATE.
 their own engine. Setting the model up again chooses again (by its cards; add `--cuda 12` to keep a forced choice). A Pascal / Volta card added to a model at a start (`--gpus`) moves that model to the
 CUDA 12 engine.
 
-`--cuda 12` is also the way to run Strata with an NVIDIA driver older than 580 (CUDA 12 needs 525 or newer): setup's
-"driver too old" stop says so.
+`--cuda 12` is also the way to run Strata with an NVIDIA driver older than 580: CUDA 12 needs 528 or newer on Windows
+(527.41, NVIDIA's minor-version compatibility) and 525 on Linux; setup's "driver too old" stop says so. Such old
+drivers were not tested here.
 
 ### Mixed cards
 
diff --git a/setup.py b/setup.py
index 766d50115a9..66e6a4bd744 100644
--- a/setup.py
+++ b/setup.py
@@ -111,7 +111,9 @@ def hf_unpinned(url: str) -> str:
 CUDA13_MIN_ARCH = 75                   # the oldest compute capability CUDA 13 compiles for (sm_75, RTX 20)
 CUDA12_ASSET = "strata-windows-x64-cuda12.zip" if WIN else "strata-linux-x64-cuda12.zip"
 CUDA12_WHEELS = ["nvidia-cublas-cu12==12.9.1.4", "nvidia-cuda-runtime-cu12==12.9.79"]
-CUDA12_MIN_DRIVER = 525                # CUDA 12.x with minor-version compatibility (NVIDIA's table: 525.60 / 527.41)
+# CUDA 12.x minor-version compatibility (NVIDIA's table: Linux 525.60.13, Windows 527.41); the wheels match the 12.9.1
+# toolkit the CUDA 12 zip is built with (cuBLAS 12.9.1.4, runtime 12.9.79).  Not tested on such an old driver here.
+CUDA12_MIN_DRIVER = 528 if WIN else 525
 ENGINE12_DIR = "engine-cuda12"
 MIN_ENGINE = (0, 1, 39)                # v0.1.39: the #577 file-tier regression fixed, the OpenAI Responses API (#451, Codex), a reply stuck on one token ended (#606), the head before the arena (#620), effort_position (#458), --vram-reserve hot resize opt-in (#533), PR batch; v0.1.38: prompts faster (one gather per expert group #372, the first chunk's PLE rows beside layer 0 #374, DeltaNet three heads per thread #413), --kv q4_0 prompts on tensor cores (#452), Q5_0 experts on the GPU (#473), IQ4_XS on AVX-2 (#415), unbuffered expert loading on Windows (#357 #362), --peer-device (#531), a 6 GB card starts (#496), PR batch; v0.1.37: a silent engine is restarted (#481), Windows AMD counts the desktop's VRAM (#380 #377 #497), a steadier PCIe probe (#485), fixes #496 #495 #498 #505 #493; v0.1.36: a cancelled prompt logged as read so far (#471), the draft-head hint (#474), UPDATE.bat (#475), --expert-profile-save (#477); v0.1.35: Windows AMD uses its bundled HIP runtime (#468 #461), the low-RAM resident mode on Windows 32 GB (#467), fixes #460 #459 #446 #447 #457 #448 #444; v0.1.34: AMD on Windows (a ready-made HIP engine), an MCP server for AI assistants (tools/strata_mcp.py), a shorter README; v0.1.33: a portable image encoder again (#411 #412), setup recommends instead of forcing (#406 #403 #364 #384), fixes #352 #365 #369 #371 #375 #393 #408 #414; v0.1.32: split prompts faster (#340), AMD router +12%, Unsloth Q4 in setup, faster Q4 prompts, #326/#327/#342/#344 fixes, PR batch; v0.1.31: Unsloth UD-Q4_K_XL (experimental), GGUF-in-place low-RAM mode, Windows GGUF load 2x, server race + tokenizer fixes, AMD intrinsics; v0.1.30: short prompts faster (streaming from 1024 tokens), resident low-RAM variant, multi-GPU session carve, RDNA4; v0.1.29: sampled answers faster (split top-k), #154 correctness fixes; v0.1.28: the expert cache reserves the draft head, a cancelled request no longer fails the next; v0.1.27: RTX 20 (sm_75) in the ready-made engine, the HIP build without CUDA headers; v0.1.26: the draft layer's prompt pass in batches; v0.1.25: faster prompts (grouping off the copy engine, fused hyper-connection kernels), AMD HIP backend, --kv k8v4; v0.1.24: long prompts faster (QSA select on tensor cores); v0.1.23: image requests honor sampling, 8 GB cards start, batched verify window; v0.1.22: faster prompts (tensor-core attention), multi-GPU across images/steering/KV streaming; v0.1.21: multi-GPU layer split (--gpus); v0.1.20: system-prompt checkpoint, PCIe probe, hit rate; v0.1.19: penalties
 PY_PACKAGES = ["numpy", "jinja2", "regex", "pyyaml", "tqdm", "requests", "cmake", "ninja", "pillow", "psutil"]
@@ -3419,7 +3421,7 @@ def main() -> int:
     ap.add_argument("--cuda", choices=["12", "13", "auto"], default=os.environ.get("STRATA_CUDA") or None,
                     help="NVIDIA: the CUDA toolkit of this model's engine. auto (default): CUDA 13, the ready-made "
                          "engine; CUDA 12 (experimental) when a chosen card is older than CUDA 13 supports (Pascal, "
-                         "Volta). 12 also runs with an older driver (525+). docs/OLDER_GPUS.md")
+                         "Volta). 12 also runs with an older driver (Windows 528+, Linux 525+). docs/OLDER_GPUS.md")
     ap.add_argument("--prebuilt", default=os.environ.get("STRATA_PREBUILT_URL", PREBUILT_URL),
                     help="where the ready-made engine is (a URL folder or a local folder)")
     ap.add_argument("--check", action="store_true", help="only check this PC and exit")

From 5f199116d9eeed3bfeba94e8ee0db50930be51f9 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 10:10:54 +0200
Subject: [PATCH 195/201] #583: the byte-budget ring only where it gains; short
 prompts keep 0.1.39's ring

- a prompt that fits 0.1.39's auto chunk keeps 0.1.39's ring (Prefill::set_ring_budget's small_max): 4K prompts
  were 1-17% slower with the smaller ring (Coder -15%, IQ3_S -5%, IQ3_XXS -2%; 5 interleaved pairs each);
- ring slots are given up for a bigger chunk only where 0.1.39's rule held the chunk under 6144 (ring_cap_for);
  from 6144 on the ring keeps its 0.1.39 size (the Coder 6144/384 -> 7936/199 was -12% at 32K);
- the unpinned arm's cap stays 96 (the byte budget made it ~49 on IQ3_S);
- the scan sets its own ring budget instead of set_ring_override, so a layer split's 96-slot override (#340) is no
  longer clobbered by the scan.
RTX 5070 vs STRATA_RING_BYTES=0: 4K -0.7..+1.1% (bit-identical); 32K IQ3_XXS +18.5% (cache 1500) / +9.4%, Coder
+3.1%, IQ3_S +0.2%.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01QJJwUv9g3cD2ztX6KWS8rk
---
 docs/DETAILS.md                    | 10 ++--
 include/strata/prefill/prefill.hpp |  8 ++++
 src/prefill/prefill.cpp            | 35 ++++++++++++--
 src/program/generate.cpp           | 77 +++++++++++++++++++-----------
 4 files changed, 96 insertions(+), 34 deletions(-)

diff --git a/docs/DETAILS.md b/docs/DETAILS.md
index 62563f853ae..ec8b4fc4014 100644
--- a/docs/DETAILS.md
+++ b/docs/DETAILS.md
@@ -1033,9 +1033,13 @@ the document, +0.4% on the chat. Details: `bench/results/2026-09-27-esp/`.
 - **Prompts** are processed in chunks of up to 8,192 tokens (`--prefill auto`; 32,768 opt-in) with the experts
   streamed to the GPU over PCIe. Since engine 0.1.39b (#583) the streamed ring is sized in bytes for the pack (a
   native pack with bigger blobs gets fewer ring slots and keeps more cache slots) and `--prefill auto` picks the
-  largest chunk that keeps that ring full: an RTX 5070 with IQ3_XXS and a partly pinned arena reads a 32K prompt
-  14-26% faster (1,045 -> 1,190 tok/s at a 1,500-slot cache, -> 1,315 at 2,400; a 4K prompt 1-4% slower). Q2_0
-  keeps its 384-slot ring. It changes the bits of a long prompt against 0.1.39 (the experts go through a different
+  largest chunk that keeps that ring full. It only gives up ring slots where 0.1.39's rule held the chunk at 4,096
+  tokens or less; from 6,144 on it keeps 0.1.39's ring and only looks for a bigger chunk beside it (shrinking the
+  ring there measured slower: the Coder -12%), and a prompt that fits 0.1.39's chunk keeps 0.1.39's ring (one
+  chunk: a smaller ring only slowed it). RTX 5070, 32K prompts against `STRATA_RING_BYTES=0`, 2-3 interleaved
+  rounds: IQ3_XXS +18.5% at a 1,500-slot cache and +9% in another memory state, the Coder +3%, IQ3_S unchanged; 4K
+  prompts unchanged (-0.7% to +1.1%, bit-identical). Q2_0 (a fixed `--prefill 2048`) is not affected. It changes
+  the bits of a long prompt against 0.1.39 (the experts go through a different
   mix of cached and streamed groups). Measured quality, teacher-forced over the next 2,001 tokens of a long document
   against the FP16 prompt path (IQ3_XXS, `--prefill auto`): 8K prompt KL 0.042 (0.1.39: 0.054), top-1 agreement
   93.5% (92.2%); 32K prompt KL 0.020 (0.019), top-1 95.3% (95.0%) - the same band as before. `STRATA_RING_BYTES=0`
diff --git a/include/strata/prefill/prefill.hpp b/include/strata/prefill/prefill.hpp
index ed633fd1046..15df6e4e402 100644
--- a/include/strata/prefill/prefill.hpp
+++ b/include/strata/prefill/prefill.hpp
@@ -79,6 +79,9 @@ class Prefill {
     /// #340: the streamed ring's slot count for chunks that stream every expert, instead of the pinned-share rule
     /// (0 = that rule). Set before any `bytes_needed`/`init` (both count the ring); STRATA_PREFILL_RING still wins.
     static void set_ring_override(int slots);
+    /// #583: the auto chunk scan's byte-budget ring, for chunks above `small_max` (0.1.39's auto chunk: a prompt that
+    /// fits it keeps 0.1.39's ring).  0 slots = none.  A layer split's set_ring_override and STRATA_PREFILL_RING win.
+    static void set_ring_budget(int slots, int64_t small_max);
 
     /// Device bytes `init` needs for a chunk of `chunk` tokens (what a borrowed region must hold).
     static uint64_t bytes_needed(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk);
@@ -92,6 +95,11 @@ class Prefill {
     /// what the auto chunk scan treats as a full ring.  A slot is one whole blob, so a pack with bigger blobs than
     /// Q2_0's gets fewer of them for the same bytes - 384 on Q2_0, 199 on a 2.54 MiB-blob IQ3_S pack.
     static int64_t ring_max_slots();
+    /// 0.1.39's ring for this PC (1024 fused / 384 pinned / 96), within ring_cap().
+    static int64_t ring_default_slots();
+    /// #583: the ring the auto scan keeps full, given the chunk 0.1.39's rule picked: its byte budget where that rule's
+    /// chunk was small (< 6144), else 0.1.39's ring (measured: shrinking it for a bigger chunk lost there).
+    static int64_t ring_cap_for(int64_t old_chunk);
 
     /// What the ring actually resolves to for a chunk of `chunk` tokens, after the override, STRATA_PREFILL_RING
     /// and the pinned-share rule - the slot count `init` lays out.  The engine reports it on its INFO line so the
diff --git a/src/prefill/prefill.cpp b/src/prefill/prefill.cpp
index 6af1ea5579a..e76fb6ddc12 100644
--- a/src/prefill/prefill.cpp
+++ b/src/prefill/prefill.cpp
@@ -119,6 +119,11 @@ double g_pinned_share = 1.0;
 // slot count is derived from the pack (`ring_budget_slots`); Q2_0 still resolves to exactly 1024 (fused) and 384,
 // so the pack all of this was tuned on does not move.
 int g_ring_override = 0;   // #340: set by a layer split (Prefill::set_ring_override); 0 = the rule below
+// #583 (0.1.39b): the auto chunk scan's byte-budget ring (Prefill::set_ring_budget), for requests whose chunk is above
+// g_ring_small_max - the chunk 0.1.39's rule would have picked.  A prompt that fits that chunk keeps 0.1.39's ring:
+// on one chunk the smaller ring only slowed it (RTX 5070, 4K prompts: Coder -15%, IQ3_S -5%, IQ3_XXS -2%).
+int g_ring_budget = 0;
+int64_t g_ring_small_max = 0;
 // #136: the fused experts (STRATA_PF_FUSED=1) launch on a batch of a layer's streamed experts at once, so the ring
 // should hold a whole layer's (~460 of 512 on Q2_0): with 384 slots a layer's last batch waits for slots its own
 // first batch frees.  Measured on the 5070, Q2_0, the 4K / 32K code-agent prompts (one run each): fused at 384 slots
@@ -184,8 +189,11 @@ inline int ring_slots(size_t T) {
     // the byte budget as this pack's slots: 1024 fused / 384 not on Q2_0, fewer on a pack with bigger blobs.  The
     // unpinned arm stays a slot count (96): it was measured where the host copies are the limit, and there the ring
     // is not what is competing for VRAM.
-    const int pinned_ring = g_pinned_share >= 0.9 ? (ring_bytes_on() ? ring_budget_slots() : fused_ring() ? 1024 : 384) : 96;
-    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : pinned_ring;
+    // 0.1.39's ring (1024 fused / 384 pinned, 96 when a large share goes through host copies), and the #583 byte
+    // budget the auto scan chose for chunks past the size 0.1.39's rule would have picked (set_ring_budget)
+    const int pinned_ring = g_pinned_share >= 0.9 ? (fused_ring() ? 1024 : 384) : 96;
+    const bool budget = ring_bytes_on() && g_ring_budget > 0 && (int64_t) T > g_ring_small_max;
+    const int r = v ? std::atoi(v) : g_ring_override > 0 ? g_ring_override : budget ? g_ring_budget : pinned_ring;
     if (v && r == STAGE) return STAGE; // Explicit opt-in to routed-only staging, including large chunks.
     const int big = r < 16 ? 16 : r > ring_cap() ? ring_cap() : r;
     return (int64_t) T >= stream_all_min() ? big : STAGE;
@@ -1341,6 +1349,10 @@ bool Prefill::set_peer(core::PeerExperts* peer, int64_t cap_rows, std::string& e
 
 void Prefill::set_pinned_share(double share) { g_pinned_share = share; }
 void Prefill::set_ring_override(int slots) { g_ring_override = slots > 0 ? slots : 0; }
+void Prefill::set_ring_budget(int slots, int64_t small_max) {
+    g_ring_budget = slots > 0 ? slots : 0;
+    g_ring_small_max = small_max > 0 ? small_max : 0;
+}
 double Prefill::pinned_share() { return g_pinned_share; }
 
 uint64_t Prefill::bytes_needed(const core::ModelGeometry& g, const core::SessionState& ss, int64_t chunk) {
@@ -1396,7 +1408,24 @@ uint64_t Prefill::bytes_needed_no_ring(const core::ModelGeometry& g, const core:
     return bytes_needed(g, ss, chunk) - (uint64_t) ring_slots((size_t) chunk) * (uint64_t) MAXBLOB();
 }
 
-int64_t Prefill::ring_max_slots() { return (int64_t) ring_budget_slots(); }
+int64_t Prefill::ring_default_slots() {
+    const int r = g_pinned_share >= 0.9 ? (fused_ring() ? 1024 : 384) : 96;
+    return (int64_t) std::min(r, ring_cap());
+}
+
+int64_t Prefill::ring_cap_for(int64_t old_chunk) {
+    // 0.1.39b (#583, measured on the RTX 5070): giving up ring slots for a bigger chunk paid where 0.1.39's ring held
+    // the chunk at 4096 or less (IQ3_XXS 32K prompts +14% to +26%: 4096/384 -> 6656/56) and lost where 0.1.39 already
+    // read 6144-token chunks (the Coder: 6144/384 -> 7936/199, 32K -12%).  From kKeepRingChunk on the ring keeps its
+    // 0.1.39 size and the scan only looks for a bigger chunk next to it (IQ3_XXS unpinned 6144/96 -> 6912/96: +9%).
+    constexpr int64_t kKeepRingChunk = 6144;
+    return old_chunk >= kKeepRingChunk ? ring_default_slots() : ring_max_slots();
+}
+
+// the unpinned arm keeps its measured 96 (the PR's rule; the byte budget would have been ~49 slots on IQ3_S)
+int64_t Prefill::ring_max_slots() {
+    return g_pinned_share >= 0.9 ? (int64_t) ring_budget_slots() : (int64_t) std::min(96, ring_cap());
+}
 
 int64_t Prefill::ring_slots_for(int64_t chunk) { return ring_slots((size_t) chunk); }
 
diff --git a/src/program/generate.cpp b/src/program/generate.cpp
index 6d98693b926..819ffc848f9 100644
--- a/src/program/generate.cpp
+++ b/src/program/generate.cpp
@@ -4335,15 +4335,22 @@ int main(int argc, char** argv) {
     };
     auto plan_lend = [&](int64_t& chunk) -> int64_t {
         auto slots_for = lend_slots;
-        if (o.prefill_auto && !strata::prefill::Prefill::ring_bytes_enabled()) {   // STRATA_RING_BYTES=0: 0.1.39's list
+        // 0.1.39's list with its ring (also the size up to which a prompt keeps that ring under #583)
+        auto old_rule = [&]() -> int64_t {
+            strata::prefill::Prefill::set_ring_budget(0, 0);
             static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
             for (const int64_t c : kAutoChunks) {
                 // above 8192: only when asked for, and only when a prompt of the context can use it
                 if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;
                 const int64_t k = slots_for(c);
-                if (k + 128 <= xcache.slots() && k * 100 <= kAutoLendPct * xcache.slots()) { chunk = c; return k; }
+                if (k + 128 <= xcache.slots() && k * 100 <= kAutoLendPct * xcache.slots()) return c;
             }
             return 0;
+        };
+        if (o.prefill_auto && !strata::prefill::Prefill::ring_bytes_enabled()) {   // STRATA_RING_BYTES=0: 0.1.39's list
+            const int64_t c = old_rule();
+            if (c > 0) { chunk = c; return slots_for(c); }
+            return 0;
         }
         if (o.prefill_auto) {   // the default since 0.1.39b (#583)
             // The chunk and the ring are one budget, and the ring is the better buy.  Measured on this 4-way
@@ -4356,7 +4363,8 @@ int main(int argc, char** argv) {
             // one falls back to the old rule, which takes the largest chunk whose ring clears kRingMin (the
             // value at or below which ring_slots() returns STAGE and streaming is off).
             constexpr int64_t kRingMin = 16;
-            const int64_t ring_max = strata::prefill::Prefill::ring_max_slots();
+            const int64_t small = old_rule();   // 0.1.39's chunk (and its ring for the prompts that fit it)
+            const int64_t ring_max = strata::prefill::Prefill::ring_cap_for(small);
             const int64_t budget = std::min(xcache.slots() - 128, kAutoLendPct * xcache.slots() / 100);
             // The room is a BYTE budget.  A ring slot is max_blob bytes (`carve` lays out one whole blob each),
             // while these cache slots hold their own layer's blob, which is smaller than max_blob unless the cache
@@ -4376,7 +4384,7 @@ int main(int argc, char** argv) {
                 return biggest_chunk(auto_ceiling, [&](int64_t t) -> bool {
                     const int64_t room = room_of(t);
                     if (room < floor) return false;
-                    strata::prefill::Prefill::set_ring_override((int) room);
+                    strata::prefill::Prefill::set_ring_budget((int) room, 0);
                     // ring_slots() now returns `room` - unless STRATA_PREFILL_RING overrides it, in which case the
                     // chunk has to fit THAT ring, which is the pre-fix rule and the A/B arm
                     const int64_t k = slots_for(t);
@@ -4384,14 +4392,16 @@ int main(int argc, char** argv) {
                 });
             };
             int64_t c = scan(ring_max);
-            if (c == 0) c = scan(kRingMin);
-            if (c > 0) {
-                // the probe left the override on its last trial; put it back on the chunk that won
-                strata::prefill::Prefill::set_ring_override((int) room_of(c));
-                chunk = c;
-                return slots_for(c);
+            if (c == 0 && ring_max < strata::prefill::Prefill::ring_default_slots()) c = scan(kRingMin);
+            // a prompt that fits 0.1.39's chunk keeps 0.1.39's ring (one chunk: the smaller ring only slowed it)
+            if (small >= c) {   // the scan bought nothing: 0.1.39's choice
+                strata::prefill::Prefill::set_ring_budget(0, 0);
+                if (small > 0) { chunk = small; return slots_for(small); }
+                return 0;
             }
-            return 0;
+            strata::prefill::Prefill::set_ring_budget((int) room_of(c), small);
+            chunk = c;
+            return slots_for(c);
         }
         for (int64_t c = chunk; c >= 256; c /= 2) {
             const int64_t k = slots_for(c);
@@ -4581,8 +4591,8 @@ int main(int argc, char** argv) {
             // than it is, and a chunk whose ring only fitted after that discount was refused outright - the scan
             // stopped one step short while the chunk it did take had room to spare for the cap-sized ring.
             const int64_t kBlob = (int64_t) strata::kernels::cpu::expert_layout().max_blob;
-            auto ring_room = [&](int64_t c, const PfPart* only) -> int64_t {
-                int64_t room = strata::prefill::Prefill::ring_max_slots();
+            auto ring_room = [&](int64_t c, const PfPart* only, int64_t cap) -> int64_t {
+                int64_t room = cap;
                 for (const PfPart& p : pf_parts) {
                     if (only != nullptr && &p != only) continue;
                     // clamped at 0: a cache under 128 slots has a negative lend budget, and `slots - budget` is
@@ -4600,33 +4610,38 @@ int main(int argc, char** argv) {
             // ring still at its full byte budget (ring_room is capped at ring_max, so that is room == ring_max),
             // under the operator's ceiling (auto_ceiling keeps a bare `auto` at 8192, #282).  Failing that, the
             // largest chunk whose ring clears kRingMin.
+            // 0.1.39's list with its ring: the chunk it would pick, and the size up to which a prompt keeps that ring
+            auto old_pick = [&](const PfPart* only) -> int64_t {
+                strata::prefill::Prefill::set_ring_budget(0, 0);
+                static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
+                for (const int64_t c : kAutoChunks) {
+                    if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
+                    if (fits(c, true, only)) return c;
+                }
+                return 0;
+            };
             auto scan = [&](const PfPart* only) -> int64_t {
                 if (!o.prefill_auto) {   // an explicit --prefill is the operator's number, and a loan of it only has to fit
                     for (int64_t c = o.prefill_chunk; c >= 256; c /= 2)
                         if (fits(c, false, only)) return c;
                     return 0;
                 }
-                if (!strata::prefill::Prefill::ring_bytes_enabled()) {   // STRATA_RING_BYTES=0: 0.1.39's list
-                    static constexpr int64_t kAutoChunks[] = {32768, 16384, 8192, 6144, 4096, 3072, 2048, 1024, 512, 256};
-                    for (const int64_t c : kAutoChunks) {
-                        if (c > 8192 && (c > o.prefill_auto_max || c > o.max_context)) continue;   // #282, as plan_lend
-                        if (fits(c, true, only)) return c;
-                    }
-                    return 0;
-                }
+                if (!strata::prefill::Prefill::ring_bytes_enabled()) return old_pick(only);   // STRATA_RING_BYTES=0
+                const int64_t small = old_pick(only);
+                const int64_t cap = strata::prefill::Prefill::ring_cap_for(small);
                 auto probe = [&](int64_t floor) -> int64_t {
                     return biggest_chunk(auto_ceiling, [&](int64_t t) -> bool {
-                        const int64_t room = ring_room(t, only);
+                        const int64_t room = ring_room(t, only, cap);
                         if (room < floor) return false;
-                        strata::prefill::Prefill::set_ring_override((int) room);
+                        strata::prefill::Prefill::set_ring_budget((int) room, 0);
                         // ring_slots() now returns `room` - unless STRATA_PREFILL_RING overrides it, in which
                         // case the chunk has to fit THAT ring, which is the pre-fix rule and the A/B arm
                         return fits(t, true, only);
                     });
                 };
-                int64_t c = probe(strata::prefill::Prefill::ring_max_slots());
-                if (c == 0) c = probe(kRingMin);
-                return c;
+                int64_t c = probe(cap);
+                if (c == 0 && cap < strata::prefill::Prefill::ring_default_slots()) c = probe(kRingMin);
+                return std::max(c, small);   // never a smaller chunk than 0.1.39's
             };
             const int64_t chunk = scan(nullptr);
             // #448: a small card in a layer split caps every stage's chunk (an RTX 3080's 512-slot cache held a
@@ -4635,8 +4650,14 @@ int main(int argc, char** argv) {
             const int64_t alone = pf_parts.size() > 1 ? scan(&pf_parts[0]) : chunk;
             // both scans left the ring override on their own last trial: put it back on the chunk that won, which
             // is what `init` lays out and what the INFO line reports
-            if (chunk > 0 && o.prefill_auto && strata::prefill::Prefill::ring_bytes_enabled())
-                strata::prefill::Prefill::set_ring_override((int) ring_room(chunk, nullptr));
+            if (chunk > 0 && o.prefill_auto && strata::prefill::Prefill::ring_bytes_enabled()) {
+                // a prompt that fits 0.1.39's chunk keeps 0.1.39's ring (one chunk: the smaller ring only slowed
+                // it); the byte-budget ring is for the chunks past it
+                const int64_t small = old_pick(nullptr);
+                strata::prefill::Prefill::set_ring_budget(
+                    small >= chunk ? 0 : (int) ring_room(chunk, nullptr, strata::prefill::Prefill::ring_cap_for(small)),
+                    small);
+            }
             if (chunk > 0 && alone > chunk) {
                 for (size_t i = 1; i < pf_parts.size(); ++i) {
                     const PfPart& p = pf_parts[i];

From 8b36fa041fe33187b86aadf07fd83d4d73126bfb Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 13:17:54 +0200
Subject: [PATCH 196/201] docs: README refined + six translations

---
 README.de.md    | 218 ++++++++++++++++++++++++++++++++++++++++++++++++
 README.es.md    | 212 ++++++++++++++++++++++++++++++++++++++++++++++
 README.fr.md    | 217 +++++++++++++++++++++++++++++++++++++++++++++++
 README.ja.md    | 208 +++++++++++++++++++++++++++++++++++++++++++++
 README.md       | 178 +++++++++++++++++++++------------------
 README.pt-BR.md | 213 ++++++++++++++++++++++++++++++++++++++++++++++
 README.zh-CN.md | 197 +++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 1362 insertions(+), 81 deletions(-)
 create mode 100644 README.de.md
 create mode 100644 README.es.md
 create mode 100644 README.fr.md
 create mode 100644 README.ja.md
 create mode 100644 README.pt-BR.md
 create mode 100644 README.zh-CN.md

diff --git a/README.de.md b/README.de.md
new file mode 100644
index 00000000000..a3215ecf9f0
--- /dev/null
+++ b/README.de.md
@@ -0,0 +1,218 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · [简体中文](README.zh-CN.md) · [日本語](README.ja.md) · **Deutsch** · [Français](README.fr.md) · [Español](README.es.md) · [Português](README.pt-BR.md)
+
+<p align="center"><b>Ein KI-Modell mit 125 Milliarden Parametern auf deinem eigenen Gaming-PC</b><br>
+NVIDIA- oder AMD-Grafikkarte (ab 12 GB) · Windows oder Linux · kostenlos und Open Source</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Ein Voxel-Pagodengarten, den das Modell in Strata geschrieben hat, läuft im Browser"></a><br>
+<sub>Ein Voxel-Pagodengarten aus einem einzigen Prompt, auf einer RTX 5070 mit Strata (IQ3_S, 128K Kontext) ·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">ganzes Video (49 s)</a></sub></p>
+
+Strata lässt **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** auf einem normalen PC laufen.
+Das ist ein großes, kluges KI-Modell, das sonst meist einen Server braucht. Es chattet, schreibt Code, versteht
+Bilder und arbeitet mit deinen Apps und Coding-Agents zusammen. Nichts verlässt deinen PC.
+
+## Wie schnell ist es?
+
+Wir haben es auf zwei ganz normalen Gaming-PCs gemessen. Ein Token ist etwa ¾ eines Wortes.
+
+- **Schreibt Antworten:** wie schnell die Antwort in einem kurzen Chat erscheint. 60 Tokens pro Sekunde sind
+  schneller, als du lesen kannst.
+- **Liest deinen Prompt:** wie schnell es aufnimmt, was du schickst (hier ein Dokument, Code oder Chatverlauf mit
+  32K Tokens).
+
+<table>
+<tr><th>NVIDIA: RTX 5070 (12 GB), Ryzen 5 7600, 64 GB RAM</th><th>AMD: RX 9070 XT (16 GB), Ryzen 9 3900X, 47 GB RAM</th></tr>
+<tr><td>
+
+| Größe | Schreibt Antworten | Liest deinen Prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 94 Tokens/s | 2,650 Tokens/s |
+| **IQ2_XS** | 79 Tokens/s | 2,090 Tokens/s |
+| **IQ3_XXS** | 62 Tokens/s | 1,750 Tokens/s |
+| **IQ3_S** | 53 Tokens/s | 1,620 Tokens/s |
+| **Coder** | 55 Tokens/s | 2,180 Tokens/s |
+
+</td><td>
+
+| Größe | Schreibt Antworten | Liest deinen Prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 60 Tokens/s | 1,160 Tokens/s |
+| **IQ2_XS** | 52 Tokens/s | 1,110 Tokens/s |
+| **Coder** | 44 Tokens/s | 1,420 Tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA: Q2_0 mit Engine 0.1.36, die anderen Zeilen mit 0.1.26 (4K Antworten, 32K Prompts). Die vollständigen
+Tabellen stehen in [DETAILS.md](docs/DETAILS.md#speed-measured). Eine Karte mit mehr VRAM ist schneller: Eine
+RTX 3090 (24 GB) sollte etwa 100-140 Tokens pro Sekunde schreiben. Lange Chats und andere Karten:
+[Tempo jedes Modells](docs/MODELS.md#how-fast-is-each-size), [Ergebnisse aus der Community](docs/COMMUNITY_BENCHMARKS.md).
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
+<sub>Strata ist kostenlos. Wenn es auf deinem PC gut läuft, hält ein Kaffee die Arbeit daran am Laufen.</sub></p>
+
+## Was du brauchst
+
+| | |
+| --- | --- |
+| **Grafikkarte** | **NVIDIA** GeForce RTX 20, 30, 40 oder 50 Serie, oder **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 oder RX 6800 / 6900 Serie. Sie braucht **12 GB VRAM oder mehr**. |
+| **RAM** | 32 GB oder mehr. Dein RAM entscheidet, [welches Modell](#welches-modell-soll-ich-nehmen) passt. Mit 64 GB laufen alle Größen. |
+| **Festplatte** | Etwa 80 GB frei. Nimm wenn möglich eine SSD: Der erste Start geht dann viel schneller. |
+| **System** | Windows 10 / 11 oder Linux und ein aktueller Grafiktreiber von NVIDIA oder AMD. |
+
+Alles andere richtet der Installer ein. Zwei oder drei Karten können sich das Modell teilen ([Multi-GPU](docs/MULTI_GPU.md)).
+
+Experimentell, von Community-Mitgliedern auf ihren eigenen Rechnern geschrieben und getestet:
+
+- **Ältere Grafikkarten** (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT): [Ältere GPUs](docs/OLDER_GPUS.md).
+- **Intel Arc**, unter Linux aus dem Quellcode gebaut: [Intel Arc](docs/INTEL_ARC.md).
+- **Ältere Prozessoren ohne AVX2**: Sie funktionieren, aber langsam. [Ältere CPUs](docs/INSTALL.md#older-cpus-experimental).
+
+Die vollständige Liste: [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
+
+## Installieren
+
+### Lass deine KI es einrichten
+
+Nutzt du einen KI-Coding-Assistenten (Claude Code, Cursor, Codex, GitHub Copilot, ...)? Füge dort diesen Text ein:
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+Er prüft deine Grafikkarte, deinen RAM und deine Festplatte und wählt das passende Modell. Dann installiert und
+startet er es und sagt dir, wie du deine Apps verbindest. KI-Tools können Strata auch über seinen
+[MCP-Server](docs/MCP_SERVER.md) installieren, starten und stoppen.
+
+### Oder mach es selbst
+
+[Lade Strata herunter](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) und entpacke es (oder nutze
+`git clone`). **Windows:** Doppelklick auf **`START-HERE.bat`**. **Linux:** Führe im Strata-Ordner **`./setup.sh`** aus.
+
+Die Schritte sind für NVIDIA und AMD gleich. Der Installer erkennt deine Karte und richtet die passende Engine
+dafür ein. Er stellt dir ein paar Fragen:
+
+- welches Modell und welche Größe,
+- wie viel Kontext (wie viel Text sich das Modell merkt),
+- ob es Bilder lesen soll.
+
+Drück jedes Mal Enter, um die empfohlene Antwort zu nehmen. Dann lädt er das Modell herunter (etwa 70 GB) und
+startet es. Bricht der Download ab, starte ihn einfach neu: Er macht dort weiter, wo er aufgehört hat. Dein Browser
+öffnet die Strata-App unter `http://127.0.0.1:8080`.
+
+> **Während das Modell startet, kann dein PC 1-3 Minuten langsam sein oder nicht reagieren** (beim ersten Mal am
+> längsten). Strata lädt 35-55 GB in deinen RAM und reserviert einen Teil davon für die Grafikkarte. Das ist normal.
+> Warte und schließ das Fenster nicht. Im Fenster siehst du, was Strata gerade tut.
+
+**Beim nächsten Mal** startest du wieder `START-HERE.bat` (oder `./setup.sh`). Es startet sofort und lädt nichts
+doppelt herunter. Schließ das Fenster, um das Modell zu stoppen. `UPDATE.bat` (`./update.sh`) aktualisiert Strata,
+ohne es zu starten. Updates, Docker, mehrere Karten, wo die Dateien landen und alle Optionen:
+[docs/INSTALL.md](docs/INSTALL.md).
+
+## Welches Modell soll ich nehmen?
+
+Der Installer empfiehlt eins passend zu deinem RAM. Dasselbe Modell gibt es in mehreren Größen, mehr oder weniger
+stark komprimiert. Kleinere Größen sind schneller. Größere sind etwas klüger.
+
+| Dein RAM | Nimm | Warum |
+| --- | --- | --- |
+| **32 GB** | **Coder** | passt in 32 GB und ist für Code gemacht (mit einer 24-GB-Karte laufen auch Q2_0 und IQ2_XS) |
+| **48 GB** | **IQ2_XS** (oder Q2_0, das schnellste) | die größeren Größen passen nicht |
+| **64 GB** | **IQ2_XS** (empfohlen) oder IQ3_XXS / IQ3_S | alle Größen passen; IQ3_S ist das beste und das langsamste |
+| **96 GB oder mehr** | **IQ3_S** oder das 4-Bit-Modell von Unsloth (experimentell) | Platz für die größten Größen, auch wenn alles andere offen ist |
+
+- **[Coder](docs/MODELS.md#coder):** eine Version für Code, bei der die Hälfte der Experten entfernt wurde. Sie
+  erreicht 91 % des SWE-bench-Verified-Werts des vollen Modells (von ihren Autoren gemessen) und passt in 32 GB RAM.
+  Außerhalb von Code ist sie schwächer, auch bei chinesischem und anderem CJK-Text (#438). Nimm dafür Q2_0, IQ2_XS
+  oder IQ3_S, die alle Experten behalten.
+- **[Swift 1.5](docs/MODELS.md#swift-15):** ein Fine-Tune, das viel kürzer nachdenkt, bevor es antwortet. Du
+  bekommst die Antwort früher, bei etwa gleicher Qualität.
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimentell): am nächsten am vollen
+  Modell. Aber Strata liest das meiste davon während der Antwort von der SSD, deshalb schreibt es auf einem PC mit
+  64 GB nur 7-8.5 Tokens/s.
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs):** Das richtest du von Hand
+  ein. Es steht nicht im Menü des Installers.
+
+Größen, Downloads und was wohin passt: [docs/MODELS.md](docs/MODELS.md). Um später ein weiteres Modell
+hinzuzufügen, starte `SETUP.bat` (Linux: `./setup.sh --setup`).
+
+## So benutzt du es
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="Der Monitor-Tab der Strata-App neben einem Coding-Agent"><br>
+<sub>Der <b>Monitor</b> der Strata-App (links), während ein Coding-Agent den Pagodengarten aus dem Video schreibt (rechts)</sub></p>
+
+- **Im Browser:** Öffne `http://127.0.0.1:8080`. Dort gibt es **Chat**, einen Live-**Monitor** für das Modell und
+  deine GPU/CPU/RAM und **About** mit den Einstellungen und Adressen.
+- **Deine Apps und Coding-Agents:** Füge einen „OpenAI-kompatiblen“ Anbieter mit der Basis-URL
+  **`http://127.0.0.1:8080/v1`** hinzu. Jeder API-Key und jeder Modellname funktioniert.
+  - Apps, die die API von Anthropic nutzen: `http://127.0.0.1:8080/v1/messages` (Claude Code:
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  - Codex CLI und andere Apps, die die OpenAI Responses API nutzen: `/v1/responses`
+    ([Einrichtung](docs/DETAILS.md#the-responses-api-and-codex-cli)).
+- **Nachdenken:** Wähle **aus, niedrig, mittel oder hoch** im Chat-Menü oder unter „Reasoning Effort“ in deiner
+  App. Aus ist am schnellsten. Hoch ist am besten für schwierige Fragen.
+- **Bilder:** Antworte im Setup mit Ja auf „Images?“. Klick dann im Chat auf **Picture** oder hänge Bilder in deiner
+  App an. AMD-Karten lesen Bilder unter Linux über den Prozessor; unter Windows geht das noch nicht.
+- **Vom Handy oder einem anderen PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`. Setz immer einen
+  Key.
+- **Eine Anfrage nach der anderen:** Standardmäßig beantwortet Strata eine Anfrage, die anderen warten. Um mehrere
+  gleichzeitig zu beantworten, setz `"parallel": 2` ([BATCHING.md](docs/BATCHING.md)). Auf einer 12-GB-Karte wird
+  dadurch jede Antwort langsamer.
+- **Lange Prompts:** Strata liest die erste Nachricht eines Chats komplett, etwa 1 Minute pro 30,000 Tokens.
+  Folgenachrichten starten in Sekunden.
+
+Mehr: [wo deine Chats gespeichert werden](docs/INSTALL.md#where-things-are-stored), [die API](docs/DETAILS.md#using-it).
+
+## Etwas ist schiefgelaufen?
+
+- **Mein PC ist beim ersten Start von Strata eingefroren.** Das ist normal, während das Modell lädt. Warte und
+  schließ das Fenster nicht. Nach 10 Minuten immer noch eingefroren? Starte den PC neu, schließ andere Programme und
+  versuch es noch einmal, oder nimm eine kleinere Größe.
+- **Es hat beim Herunterladen oder Installieren aufgehört.** Starte `START-HERE.bat` (oder `./setup.sh`) noch
+  einmal. Es macht dort weiter, wo es aufgehört hat.
+- **Es ist sehr langsam und die Festplattenlampe blinkt ständig, oder es meldet „the engine stopped
+  unexpectedly“.** Dein PC hat nicht genug freien RAM. Schließ andere Programme (Browser brauchen viel) oder nimm
+  eine kleinere Größe (Q2_0 oder IQ2_XS).
+- **Es meldet, dass Port 8080 schon belegt ist.** Strata läuft bereits. Such nach seinem Fenster.
+
+Weitere Probleme und ihre Lösungen: [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). Kommst du nicht weiter?
+Öffne ein [Issue](https://github.com/Niko1221/Strata/issues) und hänge `strata-<model>.log` aus dem Strata-Ordner
+an. Du hast ein Sicherheitsproblem gefunden? Melde es vertraulich: [SECURITY.md](SECURITY.md).
+
+## Wie funktioniert es?
+
+Modelle wie dieses laufen normalerweise auf Servern mit Hunderten Gigabyte Grafikspeicher. Deine Grafikkarte hat
+12-24 GB. Strata bringt das Modell trotzdem unter, indem es **die Arbeit auf deinen ganzen PC verteilt**. Stell dir
+eine Küche vor: Was du ständig brauchst, bleibt auf der Arbeitsfläche, der Rest wartet in der Vorratskammer.
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="Die 24,576 Experten des Modells: die meistgenutzten auf der Grafikkarte, alle im RAM, eine Nachschlagetabelle auf der SSD"></p>
+
+- **Das Modell ist ein Team aus 24,576 kleinen Spezialisten („Experten“).** Jedes Wort braucht nur 10 davon.
+- **Deine Grafikkarte** hält die paar tausend Experten, die am häufigsten gebraucht werden. **Dein RAM** hält alle,
+  und **dein Prozessor** rechnet gleichzeitig am Rest. **Deine SSD** hält eine große Nachschlagetabelle.
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="Ein kleiner Helfer rät die nächsten Wörter; das große Modell prüft alle auf einmal und behält die richtigen"></p>
+
+- **Raten, dann prüfen:** Ein kleiner Helfer rät die nächsten paar Wörter. Das große Modell prüft sie alle auf
+  einmal. Du bekommst dieselbe Antwort, nur 1.6-1.8x schneller.
+- **Lange Texte werden in großen Stücken gelesen** (bis zu 8,192 Tokens auf einmal), mit über 1,000 Tokens pro
+  Sekunde.
+
+Die längere Erklärung: [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Jeder Teil und seine Zahlen:
+[die Details](docs/DETAILS.md#how-it-works) und das [Paper](docs/paper/Strata-Paper.pdf).
+
+## Danksagung und Lizenz
+
+Das Modell ist [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next) vom Qwen-Team. Komprimiert
+wurde es von [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5)
+und Unsloth. Strata nutzt Teile von [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). Alle Danksagungen:
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). Strata ist Open Source unter der [MIT-Lizenz](LICENSE). Ein
+paar Teile und alle Modelle haben eigene Lizenzen ([welche](docs/HOW_IT_WORKS.md#license)).
+
+## Strata unterstützen
+
+Strata ist kostenlos und Open Source. Wenn es dir nützt, kannst du die Entwicklung unterstützen:
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a></p>
diff --git a/README.es.md b/README.es.md
new file mode 100644
index 00000000000..60b5f1d9298
--- /dev/null
+++ b/README.es.md
@@ -0,0 +1,212 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · [简体中文](README.zh-CN.md) · [日本語](README.ja.md) · [Deutsch](README.de.md) · [Français](README.fr.md) · **Español** · [Português](README.pt-BR.md)
+
+<p align="center"><b>Ejecuta un modelo de IA de 125 mil millones de parámetros en tu propio PC gaming</b><br>
+Tarjeta gráfica NVIDIA o AMD (12 GB o más) · Windows o Linux · libre y de código abierto</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Un jardín con una pagoda de vóxeles que escribió el modelo de Strata, funcionando en el navegador"></a><br>
+<sub>Un jardín con una pagoda de vóxeles, hecho con un solo prompt en una RTX 5070 con Strata (IQ3_S, contexto de 128K) ·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">vídeo completo (49 s)</a></sub></p>
+
+Strata ejecuta **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** en un PC normal. Es un
+modelo de IA grande e inteligente que normalmente necesita un servidor. Conversa, escribe código, entiende imágenes
+y funciona con tus aplicaciones y agentes de programación. Nada sale de tu PC.
+
+## ¿Qué velocidad tiene?
+
+Lo medimos en dos PC gaming normales. Un token equivale más o menos a ¾ de una palabra.
+
+- **Escribe respuestas:** lo rápido que aparece la respuesta en un chat corto. 60 tokens por segundo es más rápido de lo que puedes leer.
+- **Lee tu prompt:** lo rápido que procesa lo que le envías (aquí, un documento, código o historial de chat de 32K tokens).
+
+<table>
+<tr><th>NVIDIA: RTX 5070 (12 GB), Ryzen 5 7600, 64 GB RAM</th><th>AMD: RX 9070 XT (16 GB), Ryzen 9 3900X, 47 GB RAM</th></tr>
+<tr><td>
+
+| Tamaño | Escribe respuestas | Lee tu prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 94 tokens/s | 2,650 tokens/s |
+| **IQ2_XS** | 79 tokens/s | 2,090 tokens/s |
+| **IQ3_XXS** | 62 tokens/s | 1,750 tokens/s |
+| **IQ3_S** | 53 tokens/s | 1,620 tokens/s |
+| **Coder** | 55 tokens/s | 2,180 tokens/s |
+
+</td><td>
+
+| Tamaño | Escribe respuestas | Lee tu prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 60 tokens/s | 1,160 tokens/s |
+| **IQ2_XS** | 52 tokens/s | 1,110 tokens/s |
+| **Coder** | 44 tokens/s | 1,420 tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA: Q2_0 con el motor 0.1.36, las demás filas con 0.1.26 (respuestas de 4K, prompts de 32K). Las tablas
+completas están en [DETAILS.md](docs/DETAILS.md#speed-measured). Una tarjeta con más VRAM es más rápida: una
+RTX 3090 (24 GB) debería escribir unos 100-140 tokens por segundo. Chats largos y otras tarjetas:
+[velocidad de cada modelo](docs/MODELS.md#how-fast-is-each-size), [resultados de la comunidad](docs/COMMUNITY_BENCHMARKS.md).
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
+<sub>Strata es gratis. Si funciona bien en tu PC, un café ayuda a seguir trabajando en él.</sub></p>
+
+## Qué necesitas
+
+| | |
+| --- | --- |
+| **Tarjeta gráfica** | **NVIDIA** GeForce serie RTX 20, 30, 40 o 50, o **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 o serie RX 6800 / 6900. Necesita **12 GB de VRAM o más**. |
+| **RAM** | 32 GB o más. Tu RAM decide [qué modelo](#qué-modelo-elijo) cabe. Con 64 GB funcionan todos los tamaños. |
+| **Disco** | Unos 80 GB libres. Usa un SSD si puedes: el primer arranque es mucho más rápido. |
+| **Sistema** | Windows 10 / 11 o Linux, y un controlador gráfico actual de NVIDIA o AMD. |
+
+El instalador prepara todo lo demás. Dos o tres tarjetas pueden repartirse el modelo ([multi-GPU](docs/MULTI_GPU.md)).
+
+Experimental, escrito y probado por miembros de la comunidad en sus propios equipos:
+
+- **Tarjetas gráficas antiguas** (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT): [Older GPUs](docs/OLDER_GPUS.md).
+- **Intel Arc**, compilado desde el código fuente en Linux: [Intel Arc](docs/INTEL_ARC.md).
+- **Procesadores antiguos sin AVX2**: funcionan, pero despacio. [Older CPUs](docs/INSTALL.md#older-cpus-experimental).
+
+La lista completa: [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
+
+## Instalación
+
+### Deja que tu IA lo instale
+
+¿Usas un asistente de programación con IA (Claude Code, Cursor, Codex, GitHub Copilot, ...)? Pega esto en él:
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+Revisa tu tarjeta gráfica, tu RAM y tu disco, y elige el modelo que cabe. Luego lo instala, lo arranca y te explica
+cómo conectar tus aplicaciones. Las herramientas de IA también pueden instalar, arrancar y detener Strata con su
+[servidor MCP](docs/MCP_SERVER.md).
+
+### O hazlo tú mismo
+
+[Descarga Strata](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) y descomprímelo (o usa `git clone`).
+**Windows:** haz doble clic en **`START-HERE.bat`**. **Linux:** ejecuta **`./setup.sh`** en la carpeta de Strata.
+
+Los pasos son los mismos para NVIDIA y AMD. El instalador detecta tu tarjeta y prepara el motor adecuado para ella.
+Te hace unas pocas preguntas:
+
+- qué modelo y qué tamaño,
+- cuánto contexto (cuánto texto tiene presente el modelo),
+- si debe entender imágenes.
+
+Pulsa Enter cada vez para usar la respuesta recomendada. Después descarga el modelo (unos 70 GB) y lo arranca. Si la
+descarga se detiene, vuelve a ejecutarlo: sigue donde lo dejó. Tu navegador abre la aplicación de Strata en
+`http://127.0.0.1:8080`.
+
+> **Mientras el modelo arranca, tu PC puede ir lento o dejar de responder durante 1-3 minutos** (más la primera vez).
+> Strata carga 35-55 GB en tu RAM y reserva una parte para la tarjeta gráfica. Es normal. Espera y no cierres la
+> ventana. La ventana muestra lo que está haciendo Strata.
+
+**La próxima vez**, vuelve a ejecutar `START-HERE.bat` (o `./setup.sh`). Arranca enseguida y no descarga nada dos
+veces. Cierra su ventana para detener el modelo. `UPDATE.bat` (`./update.sh`) actualiza Strata sin arrancarlo.
+Actualizaciones, Docker, varias tarjetas, dónde se guardan los archivos y todas las opciones: [docs/INSTALL.md](docs/INSTALL.md).
+
+## ¿Qué modelo elijo?
+
+El instalador te recomienda uno según tu RAM. El mismo modelo viene en varios tamaños, más o menos comprimidos. Los
+tamaños pequeños son más rápidos. Los grandes son algo más inteligentes.
+
+| Tu RAM | Elige | Por qué |
+| --- | --- | --- |
+| **32 GB** | **Coder** | cabe en 32 GB y está hecho para programar (con una tarjeta de 24 GB también funcionan Q2_0 e IQ2_XS) |
+| **48 GB** | **IQ2_XS** (o Q2_0, el más rápido) | los tamaños más grandes no caben |
+| **64 GB** | **IQ2_XS** (recomendado), o IQ3_XXS / IQ3_S | caben todos los tamaños; IQ3_S es el mejor y el más lento |
+| **96 GB o más** | **IQ3_S**, o el de 4 bits de Unsloth (experimental) | espacio para los tamaños más grandes con todo lo demás abierto |
+
+- **[Coder](docs/MODELS.md#coder):** una versión para programar a la que se le quitó la mitad de los expertos. Alcanza
+  el 91% de la puntuación SWE-bench Verified del modelo completo (medido por sus autores) y cabe en 32 GB de RAM. Es
+  más flojo fuera del código, también con chino y otros textos CJK (#438). Para eso, elige Q2_0, IQ2_XS o IQ3_S, que
+  conservan todos los expertos.
+- **[Swift 1.5](docs/MODELS.md#swift-15):** un ajuste fino que piensa mucho menos tiempo antes de responder. Recibes
+  la respuesta antes, con más o menos la misma calidad.
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): el más parecido al modelo
+  completo. Pero Strata lee la mayor parte desde el SSD mientras responde, así que solo escribe 7-8.5 tokens/s en un
+  PC con 64 GB.
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs):** se instala a mano. No está en
+  el menú del instalador.
+
+Tamaños, descargas y qué cabe dónde: [docs/MODELS.md](docs/MODELS.md). Para añadir otro modelo más adelante, ejecuta
+`SETUP.bat` (Linux: `./setup.sh --setup`).
+
+## Cómo usarlo
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="La pestaña Monitor de la aplicación de Strata junto a un agente de programación"><br>
+<sub>El <b>Monitor</b> de la aplicación de Strata (izquierda) mientras un agente de programación escribe el jardín de la pagoda del vídeo (derecha)</sub></p>
+
+- **En el navegador:** abre `http://127.0.0.1:8080`. Tiene **Chat**, un **Monitor** en vivo del modelo y de tu
+  GPU/CPU/RAM, y **About** con los ajustes y las direcciones.
+- **Tus aplicaciones y agentes de programación:** añade un proveedor "compatible con OpenAI" con la URL base
+  **`http://127.0.0.1:8080/v1`**. Sirve cualquier clave de API y cualquier nombre de modelo.
+  - Aplicaciones que usan la API de Anthropic: `http://127.0.0.1:8080/v1/messages` (Claude Code:
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  - Codex CLI y otras aplicaciones que usan la API Responses de OpenAI: `/v1/responses`
+    ([configuración](docs/DETAILS.md#the-responses-api-and-codex-cli)).
+- **Razonamiento:** elige **off, low, medium o high** en el menú del chat o en el "reasoning effort" de tu aplicación.
+  Off es lo más rápido. High es lo mejor para preguntas difíciles.
+- **Imágenes:** responde que sí a "Images?" en la instalación. Luego haz clic en **Picture** en el chat, o adjunta
+  imágenes en tu aplicación. Las tarjetas AMD leen imágenes en Linux a través del procesador; en Windows todavía no.
+- **Desde tu móvil u otro PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`. Pon siempre una clave.
+- **Una petición cada vez:** por defecto Strata responde una petición y las demás esperan. Para responder varias a la
+  vez, pon `"parallel": 2` ([BATCHING.md](docs/BATCHING.md)). En una tarjeta de 12 GB, cada respuesta va más lenta.
+- **Prompts largos:** Strata lee entero el primer mensaje de un chat, más o menos 1 minuto por cada 30,000 tokens. Los
+  mensajes siguientes empiezan en segundos.
+
+Más: [dónde se guardan tus chats](docs/INSTALL.md#where-things-are-stored), [la API](docs/DETAILS.md#using-it).
+
+## ¿Algo salió mal?
+
+- **Mi PC se congeló la primera vez que arrancó Strata.** Es normal mientras carga el modelo. Espera y no cierres la
+  ventana. ¿Sigue congelado después de 10 minutos? Reinicia el PC, cierra otros programas y vuelve a intentarlo, o
+  elige un tamaño más pequeño.
+- **Se detuvo durante la descarga o la instalación.** Vuelve a ejecutar `START-HERE.bat` (o `./setup.sh`). Sigue
+  donde se detuvo.
+- **Va muy lento y la luz del disco no deja de parpadear, o dice "the engine stopped unexpectedly".** Tu PC no tiene
+  suficiente RAM libre. Cierra otros programas (los navegadores usan mucha), o elige un tamaño más pequeño (Q2_0 o
+  IQ2_XS).
+- **Dice que el puerto 8080 ya está en uso.** Strata ya está en marcha. Busca su ventana.
+
+Más problemas y sus soluciones: [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). ¿Sigues atascado? Abre un
+[issue](https://github.com/Niko1221/Strata/issues) y adjunta `strata-<model>.log` de la carpeta de Strata. ¿Has
+encontrado un problema de seguridad? Infórmalo en privado: [SECURITY.md](SECURITY.md).
+
+## ¿Cómo funciona?
+
+Los modelos como este suelen funcionar en servidores con cientos de gigabytes de memoria gráfica. Tu tarjeta gráfica
+tiene 12-24 GB. Strata hace que el modelo quepa **repartiendo el trabajo por todo tu PC**. Piensa en una cocina: lo
+que usas todo el rato se queda en la encimera, y el resto espera en la despensa.
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="Los 24,576 expertos del modelo: los más usados en la tarjeta gráfica, todos en la RAM y una tabla de consulta en el SSD"></p>
+
+- **El modelo es un equipo de 24,576 pequeños especialistas ("expertos").** Cada palabra solo necesita 10 de ellos.
+- **Tu tarjeta gráfica** guarda los pocos miles de expertos que más se usan. **Tu RAM** los tiene todos, y **tu
+  procesador** trabaja con el resto al mismo tiempo. **Tu SSD** guarda una gran tabla de consulta.
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="Un pequeño ayudante adivina las siguientes palabras; el modelo grande las comprueba todas a la vez y se queda con las correctas"></p>
+
+- **Adivinar y comprobar:** un pequeño ayudante adivina las siguientes palabras. El modelo grande las comprueba todas
+  a la vez. Recibes la misma respuesta, 1.6-1.8x antes.
+- **Los textos largos se leen en trozos grandes** (hasta 8,192 tokens cada vez), a más de 1,000 tokens por segundo.
+
+La explicación larga: [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Cada parte y sus números:
+[los detalles](docs/DETAILS.md#how-it-works) y el [artículo](docs/paper/Strata-Paper.pdf).
+
+## Créditos y licencia
+
+El modelo es [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next), del equipo de Qwen. Lo
+comprimieron [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5)
+y Unsloth. Strata usa partes de [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). Todos los créditos:
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). Strata es de código abierto con la [licencia MIT](LICENSE).
+Algunas partes y cada modelo tienen sus propias licencias ([cuáles](docs/HOW_IT_WORKS.md#license)).
+
+## Apoya a Strata
+
+Strata es libre y de código abierto. Si te resulta útil, puedes apoyar su desarrollo:
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a></p>
diff --git a/README.fr.md b/README.fr.md
new file mode 100644
index 00000000000..352321695eb
--- /dev/null
+++ b/README.fr.md
@@ -0,0 +1,217 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · [简体中文](README.zh-CN.md) · [日本語](README.ja.md) · [Deutsch](README.de.md) · **Français** · [Español](README.es.md) · [Português](README.pt-BR.md)
+
+<p align="center"><b>Faites tourner un modèle d'IA de 125 milliards de paramètres sur votre propre PC de jeu</b><br>
+Carte graphique NVIDIA ou AMD (12 Go ou plus) · Windows ou Linux · gratuit et open source</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Un jardin de pagode en voxels écrit par le modèle de Strata, qui tourne dans le navigateur"></a><br>
+<sub>Un jardin de pagode en voxels, généré en une seule requête sur une RTX 5070 avec Strata (IQ3_S, contexte de 128K) ·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">vidéo complète (49 s)</a></sub></p>
+
+Strata fait tourner **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** sur un PC normal. C'est
+un grand modèle d'IA, très capable, qui demande d'habitude un serveur. Il discute, écrit du code, lit des images et
+fonctionne avec vos applications et vos agents de code. Rien ne quitte votre PC.
+
+## Quelle est sa vitesse ?
+
+Nous l'avons mesurée sur deux PC de jeu ordinaires. Un token correspond à environ ¾ d'un mot.
+
+- **Écrit les réponses :** la vitesse à laquelle la réponse s'affiche dans une courte discussion. 60 tokens par seconde, c'est plus rapide que votre lecture.
+- **Lit votre prompt :** la vitesse à laquelle il absorbe ce que vous envoyez (ici un document, du code ou un historique de discussion de 32K tokens).
+
+<table>
+<tr><th>NVIDIA : RTX 5070 (12 Go), Ryzen 5 7600, 64 Go de RAM</th><th>AMD : RX 9070 XT (16 Go), Ryzen 9 3900X, 47 Go de RAM</th></tr>
+<tr><td>
+
+| Taille | Écrit les réponses | Lit votre prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 94 tokens/s | 2,650 tokens/s |
+| **IQ2_XS** | 79 tokens/s | 2,090 tokens/s |
+| **IQ3_XXS** | 62 tokens/s | 1,750 tokens/s |
+| **IQ3_S** | 53 tokens/s | 1,620 tokens/s |
+| **Coder** | 55 tokens/s | 2,180 tokens/s |
+
+</td><td>
+
+| Taille | Écrit les réponses | Lit votre prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 60 tokens/s | 1,160 tokens/s |
+| **IQ2_XS** | 52 tokens/s | 1,110 tokens/s |
+| **Coder** | 44 tokens/s | 1,420 tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA : Q2_0 avec le moteur 0.1.36, les autres lignes avec 0.1.26 (réponses de 4K, prompts de 32K). Les tableaux
+complets sont dans [DETAILS.md](docs/DETAILS.md#speed-measured). Une carte avec plus de VRAM va plus vite : une
+RTX 3090 (24 Go) devrait écrire environ 100-140 tokens par seconde. Longues discussions et autres cartes :
+[vitesse de chaque modèle](docs/MODELS.md#how-fast-is-each-size), [résultats de la communauté](docs/COMMUNITY_BENCHMARKS.md).
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
+<sub>Strata est gratuit. S'il tourne bien sur votre PC, un café aide à poursuivre le travail.</sub></p>
+
+## Ce qu'il vous faut
+
+| | |
+| --- | --- |
+| **Carte graphique** | **NVIDIA** GeForce RTX série 20, 30, 40 ou 50, ou **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 ou série RX 6800 / 6900. Il faut **12 Go de VRAM ou plus**. |
+| **RAM** | 32 Go ou plus. Votre RAM décide [quel modèle](#quel-modèle-choisir-) tient. Avec 64 Go, toutes les tailles tournent. |
+| **Disque** | Environ 80 Go libres. Prenez un SSD si possible : le premier démarrage est bien plus rapide. |
+| **Système** | Windows 10 / 11 ou Linux, avec un pilote graphique NVIDIA ou AMD à jour. |
+
+L'installateur s'occupe de tout le reste. Deux ou trois cartes peuvent se partager le modèle ([multi-GPU](docs/MULTI_GPU.md)).
+
+Expérimental, écrit et testé par des membres de la communauté sur leurs propres machines :
+
+- **Cartes graphiques plus anciennes** (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT) : [Older GPUs](docs/OLDER_GPUS.md).
+- **Intel Arc**, compilé depuis les sources sous Linux : [Intel Arc](docs/INTEL_ARC.md).
+- **Processeurs plus anciens sans AVX2** : ça marche, mais lentement. [Older CPUs](docs/INSTALL.md#older-cpus-experimental).
+
+La liste complète : [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
+
+## Installation
+
+### Laissez votre IA l'installer
+
+Vous utilisez un assistant de code IA (Claude Code, Cursor, Codex, GitHub Copilot, ...) ? Collez-lui ceci :
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+Il vérifie votre carte graphique, votre RAM et votre disque, et choisit le modèle qui convient. Ensuite il l'installe,
+le démarre et vous explique comment connecter vos applications. Les outils d'IA peuvent aussi installer, démarrer et
+arrêter Strata grâce à son [serveur MCP](docs/MCP_SERVER.md).
+
+### Ou faites-le vous-même
+
+[Téléchargez Strata](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) et décompressez-le (ou faites un `git clone`).
+**Windows :** double-cliquez sur **`START-HERE.bat`**. **Linux :** lancez **`./setup.sh`** dans le dossier Strata.
+
+Les étapes sont les mêmes pour NVIDIA et AMD. L'installateur détecte votre carte et installe le bon moteur pour elle.
+Il vous pose quelques questions :
+
+- quel modèle et quelle taille,
+- combien de contexte (la quantité de texte que le modèle garde en tête),
+- s'il doit lire les images.
+
+Appuyez sur Entrée à chaque fois pour garder la réponse recommandée. Ensuite il télécharge le modèle (environ 70 Go)
+et le démarre. Si le téléchargement s'arrête, relancez-le : il reprend là où il s'était arrêté. Votre navigateur
+ouvre l'application Strata à l'adresse `http://127.0.0.1:8080`.
+
+> **Pendant le démarrage du modèle, votre PC peut ralentir ou ne plus répondre pendant 1-3 minutes** (plus longtemps la première fois).
+> Strata charge 35-55 Go dans votre RAM et en réserve une partie pour la carte graphique. C'est normal. Attendez, et
+> ne fermez pas la fenêtre. La fenêtre montre ce que fait Strata.
+
+**La fois suivante**, relancez `START-HERE.bat` (ou `./setup.sh`). Il démarre tout de suite et ne télécharge rien
+deux fois. Fermez sa fenêtre pour arrêter le modèle. `UPDATE.bat` (`./update.sh`) met Strata à jour sans le démarrer.
+Mises à jour, Docker, plusieurs cartes, emplacement des fichiers et toutes les options : [docs/INSTALL.md](docs/INSTALL.md).
+
+## Quel modèle choisir ?
+
+L'installateur en recommande un selon votre RAM. Le même modèle existe en plusieurs tailles, plus ou moins
+compressées. Les petites tailles sont plus rapides. Les grandes sont un peu plus intelligentes.
+
+| Votre RAM | Prenez | Pourquoi |
+| --- | --- | --- |
+| **32 Go** | **Coder** | il tient dans 32 Go et il est fait pour le code (avec une carte de 24 Go, Q2_0 et IQ2_XS tournent aussi) |
+| **48 Go** | **IQ2_XS** (ou Q2_0, le plus rapide) | les plus grandes tailles ne tiennent pas |
+| **64 Go** | **IQ2_XS** (recommandé), ou IQ3_XXS / IQ3_S | toutes les tailles tiennent ; IQ3_S est le meilleur et le plus lent |
+| **96 Go ou plus** | **IQ3_S**, ou le 4 bits d'Unsloth (expérimental) | de la place pour les plus grandes tailles, avec tout le reste ouvert |
+
+- **[Coder](docs/MODELS.md#coder) :** une version pour le code, avec la moitié des experts en moins. Elle atteint 91 %
+  du score SWE-bench Verified du modèle complet (mesuré par ses auteurs) et tient dans 32 Go de RAM. Elle est moins
+  bonne en dehors du code, y compris pour le chinois et les autres textes CJK (#438). Pour ces cas, prenez Q2_0,
+  IQ2_XS ou IQ3_S, qui gardent tous les experts.
+- **[Swift 1.5](docs/MODELS.md#swift-15) :** un fine-tune qui réfléchit bien moins longtemps avant de répondre. Vous
+  avez la réponse plus tôt, avec à peu près la même qualité.
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (expérimental) : le plus proche du modèle
+  complet. Mais Strata en lit la plus grande partie depuis le SSD pendant qu'il répond, donc il n'écrit que
+  7-8.5 tokens/s sur un PC avec 64 Go.
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs) :** vous l'installez à la main.
+  Il n'est pas dans le menu de l'installateur.
+
+Tailles, téléchargements et ce qui tient où : [docs/MODELS.md](docs/MODELS.md). Pour ajouter un autre modèle plus
+tard, lancez `SETUP.bat` (Linux : `./setup.sh --setup`).
+
+## Utilisation
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="L'onglet Monitor de l'application Strata à côté d'un agent de code"><br>
+<sub>Le <b>Monitor</b> de l'application Strata (à gauche) pendant qu'un agent de code écrit le jardin de pagode de la vidéo (à droite)</sub></p>
+
+- **Dans le navigateur :** ouvrez `http://127.0.0.1:8080`. Vous y trouvez **Chat**, un **Monitor** en direct du
+  modèle et de votre GPU/CPU/RAM, et **About** avec les réglages et les adresses.
+- **Vos applications et agents de code :** ajoutez un fournisseur « OpenAI-compatible » avec l'URL de base
+  **`http://127.0.0.1:8080/v1`**. N'importe quelle clé API et n'importe quel nom de modèle fonctionnent.
+  - Applications qui utilisent l'API d'Anthropic : `http://127.0.0.1:8080/v1/messages` (Claude Code :
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  - Codex CLI et les autres applications qui utilisent l'API OpenAI Responses : `/v1/responses`
+    ([configuration](docs/DETAILS.md#the-responses-api-and-codex-cli)).
+- **Réflexion :** choisissez **off, low, medium ou high** dans le menu du chat ou dans le « reasoning effort » de
+  votre application. Off est le plus rapide. High est le meilleur pour les questions difficiles.
+- **Images :** répondez oui à « Images? » pendant l'installation. Ensuite cliquez sur **Picture** dans le chat, ou
+  joignez des images dans votre application. Les cartes AMD lisent les images sous Linux via le processeur ; sous
+  Windows, pas encore.
+- **Depuis votre téléphone ou un autre PC :** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`. Définissez
+  toujours une clé.
+- **Une requête à la fois :** par défaut, Strata répond à une requête et les autres attendent. Pour répondre à
+  plusieurs en même temps, mettez `"parallel": 2` ([BATCHING.md](docs/BATCHING.md)). Sur une carte de 12 Go, chaque
+  réponse devient alors plus lente.
+- **Longs prompts :** Strata lit en entier le premier message d'une discussion, environ 1 minute pour 30,000 tokens.
+  Les messages suivants démarrent en quelques secondes.
+
+Plus d'infos : [où sont stockées vos discussions](docs/INSTALL.md#where-things-are-stored), [l'API](docs/DETAILS.md#using-it).
+
+## Un problème ?
+
+- **Mon PC s'est figé au premier démarrage de Strata.** C'est normal pendant le chargement du modèle. Attendez, et ne
+  fermez pas la fenêtre. Toujours figé après 10 minutes ? Redémarrez le PC, fermez les autres programmes et
+  réessayez, ou choisissez une taille plus petite.
+- **Il s'est arrêté pendant le téléchargement ou l'installation.** Relancez `START-HERE.bat` (ou `./setup.sh`). Il
+  reprend là où il s'était arrêté.
+- **C'est très lent et le voyant du disque clignote sans arrêt, ou il affiche « the engine stopped unexpectedly ».**
+  Votre PC n'a pas assez de RAM libre. Fermez les autres programmes (les navigateurs en utilisent beaucoup), ou
+  choisissez une taille plus petite (Q2_0 ou IQ2_XS).
+- **Il dit que le port 8080 est déjà utilisé.** Strata tourne déjà. Cherchez sa fenêtre.
+
+Autres problèmes et leurs solutions : [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). Toujours bloqué ? Ouvrez une
+[issue](https://github.com/Niko1221/Strata/issues) et joignez `strata-<model>.log` depuis le dossier Strata. Vous
+avez trouvé un problème de sécurité ? Signalez-le en privé : [SECURITY.md](SECURITY.md).
+
+## Comment ça marche ?
+
+Les modèles comme celui-ci tournent d'habitude sur des serveurs avec des centaines de gigaoctets de mémoire
+graphique. Votre carte graphique a 12-24 Go. Strata fait tenir le modèle en **répartissant le travail sur tout votre
+PC**. Pensez à une cuisine : ce que vous utilisez tout le temps reste sur le plan de travail, et le reste attend dans
+le placard.
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="Les 24,576 experts du modèle : les plus sollicités sur la carte graphique, tous en RAM, une table de correspondance sur le SSD"></p>
+
+- **Le modèle est une équipe de 24,576 petits spécialistes (les « experts »).** Chaque mot n'en demande que 10.
+- **Votre carte graphique** garde les quelques milliers d'experts les plus utilisés. **Votre RAM** les contient tous,
+  et **votre processeur** travaille sur les autres en même temps. **Votre SSD** contient une grande table de
+  correspondance.
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="Un petit assistant devine les mots suivants ; le grand modèle les vérifie tous d'un coup et garde les bons"></p>
+
+- **Deviner, puis vérifier :** un petit assistant devine les quelques mots suivants. Le grand modèle les vérifie
+  tous d'un coup. Vous obtenez la même réponse, 1.6-1.8x plus tôt.
+- **Les longs textes sont lus par gros morceaux** (jusqu'à 8,192 tokens à la fois), à plus de 1,000 tokens par seconde.
+
+L'explication plus longue : [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Chaque partie et ses chiffres :
+[les détails](docs/DETAILS.md#how-it-works) et l'[article](docs/paper/Strata-Paper.pdf).
+
+## Crédits et licence
+
+Le modèle est [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next), de l'équipe Qwen. Il a été
+compressé par [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5)
+et Unsloth. Strata utilise des parties de [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). Tous les
+crédits : [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). Strata est open source sous [licence MIT](LICENSE).
+Quelques parties et chaque modèle ont leur propre licence ([lesquelles](docs/HOW_IT_WORKS.md#license)).
+
+## Soutenir Strata
+
+Strata est gratuit et open source. S'il vous est utile, vous pouvez soutenir son développement :
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a></p>
diff --git a/README.ja.md b/README.ja.md
new file mode 100644
index 00000000000..29f61f670ce
--- /dev/null
+++ b/README.ja.md
@@ -0,0 +1,208 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · [简体中文](README.zh-CN.md) · **日本語** · [Deutsch](README.de.md) · [Français](README.fr.md) · [Español](README.es.md) · [Português](README.pt-BR.md)
+
+<p align="center"><b>1,250 億パラメータの AI モデルを、手元のゲーミング PC で動かす</b><br>
+NVIDIA または AMD のグラフィックカード（12 GB 以上） · Windows または Linux · 無料のオープンソース</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Strata のモデルが書いたボクセルの五重塔の庭。ブラウザで動いている様子"></a><br>
+<sub>ボクセルの五重塔の庭。1 回のプロンプトで作成し、RTX 5070 上の Strata（IQ3_S、128K コンテキスト）で実行 ·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">動画全体（49 秒）</a></sub></p>
+
+Strata は **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** を普通の PC で動かします。
+これは大きくて賢い AI モデルで、ふつうはサーバーが必要です。チャットをしたり、コードを書いたり、画像を読んだりできます。
+アプリやコーディングエージェントとも連携します。データが PC の外に出ることはありません。
+
+## どのくらい速い？
+
+ごく普通のゲーミング PC 2 台で測りました。1 トークンは英単語のおよそ ¾ です。
+
+- **回答の書き出し：** 短いチャットで返答が表示される速さです。毎秒 60 トークンあれば、読むより速く表示されます。
+- **プロンプトの読み込み：** 送った内容を取り込む速さです（ここでは 32K トークンの文書、コード、またはチャット履歴）。
+
+<table>
+<tr><th>NVIDIA: RTX 5070 (12 GB), Ryzen 5 7600, 64 GB RAM</th><th>AMD: RX 9070 XT (16 GB), Ryzen 9 3900X, 47 GB RAM</th></tr>
+<tr><td>
+
+| サイズ | 回答の書き出し | プロンプトの読み込み |
+| --- | ---: | ---: |
+| **Q2_0** | 94 tokens/s | 2,650 tokens/s |
+| **IQ2_XS** | 79 tokens/s | 2,090 tokens/s |
+| **IQ3_XXS** | 62 tokens/s | 1,750 tokens/s |
+| **IQ3_S** | 53 tokens/s | 1,620 tokens/s |
+| **Coder** | 55 tokens/s | 2,180 tokens/s |
+
+</td><td>
+
+| サイズ | 回答の書き出し | プロンプトの読み込み |
+| --- | ---: | ---: |
+| **Q2_0** | 60 tokens/s | 1,160 tokens/s |
+| **IQ2_XS** | 52 tokens/s | 1,110 tokens/s |
+| **Coder** | 44 tokens/s | 1,420 tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA：Q2_0 はエンジン 0.1.36、ほかの行は 0.1.26 で測定（回答 4K、プロンプト 32K）。表の全体は
+[DETAILS.md](docs/DETAILS.md#speed-measured) にあります。VRAM が多いカードほど速くなります。RTX 3090（24 GB）なら
+毎秒およそ 100-140 トークンで書き出せるはずです。長いチャットやほかのカードについて：[モデルごとの速度](docs/MODELS.md#how-fast-is-each-size)、
+[コミュニティの測定結果](docs/COMMUNITY_BENCHMARKS.md)。
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
+<sub>Strata は無料です。あなたの PC でうまく動いたら、コーヒー 1 杯の支援が開発を続ける力になります。</sub></p>
+
+## 必要なもの
+
+| | |
+| --- | --- |
+| **グラフィックカード** | **NVIDIA** GeForce RTX 20、30、40、50 シリーズ、または **AMD** Radeon RX 7900 XT / XTX、RX 7800 XT / 7700 XT、RX 9060 XT、RX 9070 / 9070 XT、Radeon AI PRO R9700、RX 6800 / 6900 シリーズ。**VRAM 12 GB 以上**が必要です。 |
+| **RAM** | 32 GB 以上。RAM の量で[使えるモデル](#どのモデルを選べばいい)が決まります。64 GB あればすべてのサイズが動きます。 |
+| **ディスク** | 空き容量が約 80 GB。できれば SSD を使ってください。初回の起動がずっと速くなります。 |
+| **OS** | Windows 10 / 11 または Linux。NVIDIA または AMD の最新のグラフィックドライバー。 |
+
+ほかに必要なものはすべてインストーラーが用意します。2 枚や 3 枚のカードでモデルを分担することもできます（[マルチ GPU](docs/MULTI_GPU.md)）。
+
+試験的なサポート。コミュニティのメンバーが自分のマシンで書き、テストしたものです：
+
+- **古いグラフィックカード**（Tesla P40 / V100、GTX 10、Radeon VII / MI50、RX 6700 XT、RX 5500 XT）：[Older GPUs](docs/OLDER_GPUS.md)。
+- **Intel Arc**（Linux でソースからビルド）：[Intel Arc](docs/INTEL_ARC.md)。
+- **AVX2 のない古いプロセッサー**：動きますが、遅いです。[Older CPUs](docs/INSTALL.md#older-cpus-experimental)。
+
+全リスト：[docs/INSTALL.md](docs/INSTALL.md#what-you-need)。
+
+## インストール
+
+### AI にセットアップしてもらう
+
+AI コーディングアシスタント（Claude Code、Cursor、Codex、GitHub Copilot など）を使っていますか？ これを貼り付けてください：
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+AI がグラフィックカード、RAM、ディスクを調べて、合うモデルを選びます。それからインストールして起動し、
+アプリのつなぎ方を教えてくれます。AI ツールは Strata の [MCP サーバー](docs/MCP_SERVER.md) を通じて、
+Strata のインストール、起動、停止もできます。
+
+### 自分でやる
+
+[Strata をダウンロード](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip)して展開します（または `git clone` します）。
+**Windows：** **`START-HERE.bat`** をダブルクリック。**Linux：** Strata フォルダーで **`./setup.sh`** を実行します。
+
+手順は NVIDIA でも AMD でも同じです。インストーラーがカードを見つけて、それに合うエンジンを用意します。
+いくつか質問があります：
+
+- どのモデルを、どのサイズで使うか
+- コンテキストをどのくらいにするか（モデルが覚えておけるテキストの量）
+- 画像を読ませるかどうか
+
+毎回 Enter を押せば、おすすめの答えになります。そのあとモデル（約 70 GB）をダウンロードして起動します。
+ダウンロードが止まったら、もう一度実行してください。続きから再開します。ブラウザーで Strata アプリが
+`http://127.0.0.1:8080` に開きます。
+
+> **モデルの起動中、1-3 分ほど PC が重くなったり、反応しなくなったりすることがあります**（初回がいちばん長いです）。
+> Strata は 35-55 GB を RAM に読み込み、その一部をグラフィックカード用に固定します。これは正常です。
+> ウィンドウを閉じずに待ってください。Strata が何をしているかはウィンドウに表示されます。
+
+**次回からは** `START-HERE.bat`（または `./setup.sh`）をもう一度実行します。すぐに起動し、同じものを 2 回ダウンロードすることはありません。
+モデルを止めるときはウィンドウを閉じます。`UPDATE.bat`（`./update.sh`）を使うと、Strata を起動せずに更新できます。
+更新、Docker、複数のカード、ファイルの保存場所、すべてのオプションについて：[docs/INSTALL.md](docs/INSTALL.md)。
+
+## どのモデルを選べばいい
+
+インストーラーが RAM に合わせてひとつ勧めます。同じモデルにも、圧縮の強さが違う複数のサイズがあります。
+小さいサイズほど速く、大きいサイズほど少し賢くなります。
+
+| RAM | 選ぶもの | 理由 |
+| --- | --- | --- |
+| **32 GB** | **Coder** | 32 GB に収まり、コード向けに作られている（24 GB のカードなら Q2_0 と IQ2_XS も動く） |
+| **48 GB** | **IQ2_XS**（または最速の Q2_0） | 大きいサイズは収まらない |
+| **64 GB** | **IQ2_XS**（おすすめ）、または IQ3_XXS / IQ3_S | すべてのサイズが収まる。IQ3_S がいちばん賢く、いちばん遅い |
+| **96 GB 以上** | **IQ3_S**、または Unsloth の 4-bit（試験的） | ほかのものを全部開いたままでも、最大のサイズが入る余裕がある |
+
+- **[Coder](docs/MODELS.md#coder)：** エキスパートを半分取り除いたコーディング向け版です。フルモデルの SWE-bench Verified スコアの
+  91% に届き（作者による測定）、32 GB の RAM に収まります。コード以外では弱く、中国語などの CJK のテキストも苦手です（#438）。
+  そうした用途には、すべてのエキスパートを残している Q2_0、IQ2_XS、IQ3_S を選んでください。
+- **[Swift 1.5](docs/MODELS.md#swift-15)：** 答える前に考える時間がずっと短いファインチューン版です。
+  ほぼ同じ品質のまま、答えが早く返ってきます。
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)**（試験的）：フルモデルにいちばん近いものです。
+  ただし答えている間、Strata はその大部分を SSD から読むので、64 GB の PC では毎秒 7-8.5 トークンしか書き出せません。
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs)：** 手動でセットアップします。
+  インストーラーのメニューにはありません。
+
+サイズ、ダウンロード、どれがどこに収まるかについて：[docs/MODELS.md](docs/MODELS.md)。あとで別のモデルを追加するには
+`SETUP.bat`（Linux：`./setup.sh --setup`）を実行します。
+
+## 使い方
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="Strata アプリの Monitor タブと、その横で動くコーディングエージェント"><br>
+<sub>Strata アプリの <b>Monitor</b>（左）。コーディングエージェントが動画の五重塔の庭を書いているところ（右）</sub></p>
+
+- **ブラウザーで：** `http://127.0.0.1:8080` を開きます。**Chat**、モデルと GPU/CPU/RAM の様子をリアルタイムで見る **Monitor**、
+  設定とアドレスが載った **About** があります。
+- **アプリやコーディングエージェントから：** 「OpenAI-compatible」プロバイダーを追加し、ベース URL に
+  **`http://127.0.0.1:8080/v1`** を指定します。API キーとモデル名は何でもかまいません。
+  - Anthropic の API を使うアプリ：`http://127.0.0.1:8080/v1/messages`（Claude Code：
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`）。
+  - Codex CLI など OpenAI Responses API を使うアプリ：`/v1/responses`
+    （[設定方法](docs/DETAILS.md#the-responses-api-and-codex-cli)）。
+- **思考（Thinking）：** チャットのメニュー、またはアプリの「reasoning effort」で **off、low、medium、high** を選びます。
+  off がいちばん速く、high は難しい質問に向いています。
+- **画像：** セットアップで「Images?」に yes と答えます。そのあとチャットで **Picture** をクリックするか、アプリで画像を添付します。
+  AMD のカードは、Linux ではプロセッサーを使って画像を読みます。Windows ではまだ読めません。
+- **スマートフォンや別の PC から：** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`。キーは必ず設定してください。
+- **リクエストは 1 つずつ：** 初期設定では Strata は 1 つのリクエストに答え、ほかは待ちます。複数に同時に答えるには
+  `"parallel": 2` を設定します（[BATCHING.md](docs/BATCHING.md)）。12 GB のカードでは、それぞれの回答が遅くなります。
+- **長いプロンプト：** Strata はチャットの最初のメッセージをすべて読みます。30,000 トークンあたり約 1 分かかります。
+  2 通目以降のメッセージは数秒で始まります。
+
+詳しくは：[チャットの保存場所](docs/INSTALL.md#where-things-are-stored)、[API](docs/DETAILS.md#using-it)。
+
+## うまくいかないとき
+
+- **Strata の初回起動で PC が固まった。** モデルの読み込み中はよくあることです。ウィンドウを閉じずに待ってください。
+  10 分たっても固まったまま？ PC を再起動し、ほかのプログラムを閉じてもう一度試すか、小さいサイズを選んでください。
+- **ダウンロードやインストールの途中で止まった。** `START-HERE.bat`（または `./setup.sh`）をもう一度実行してください。
+  止まったところから続きます。
+- **とても遅く、ディスクのランプが点滅し続ける。または「the engine stopped unexpectedly」と表示される。** PC の空き RAM が
+  足りません。ほかのプログラムを閉じるか（ブラウザーは多く使います）、小さいサイズ（Q2_0 または IQ2_XS）を選んでください。
+- **ポート 8080 がすでに使われていると表示される。** Strata はもう動いています。そのウィンドウを探してください。
+
+ほかの問題と解決方法：[docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md)。それでも解決しない場合は
+[issue](https://github.com/Niko1221/Strata/issues) を作成し、Strata フォルダーにある `strata-<model>.log` を添付してください。
+セキュリティの問題を見つけたら、非公開で報告してください：[SECURITY.md](SECURITY.md)。
+
+## しくみ
+
+このようなモデルは、ふつう数百ギガバイトのグラフィックメモリを持つサーバーで動きます。あなたのグラフィックカードは
+12-24 GB です。Strata は **PC 全体で作業を分担する** ことで、モデルを収めています。台所を思い浮かべてください。
+いつも使う道具は調理台に置き、残りは食料庫にしまっておきます。
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="モデルの 24,576 個のエキスパート：よく使うものはグラフィックカードに、すべては RAM に、ルックアップテーブルは SSD に"></p>
+
+- **モデルは 24,576 個の小さな専門家（「エキスパート」）のチームです。** 1 語ごとに必要なのはそのうち 10 個だけです。
+- **グラフィックカード** は、よく使われる数千個のエキスパートを持ちます。**RAM** はすべてのエキスパートを持ち、
+  **プロセッサー** が残りを同時に処理します。**SSD** は大きなルックアップテーブルを持ちます。
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="小さなヘルパーが次の単語を予想し、大きなモデルがまとめて確認して正しいものを残す"></p>
+
+- **予想してから確認：** 小さなヘルパーが次の数語を予想します。大きなモデルがそれをまとめて確認します。
+  答えは同じまま、1.6-1.8x 早く返ってきます。
+- **長いテキストは大きなまとまりで読みます**（一度に最大 8,192 トークン）。速さは毎秒 1,000 トークン以上です。
+
+もっと詳しい説明：[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md)。各部分とその数値：
+[詳細](docs/DETAILS.md#how-it-works)と[論文](docs/paper/Strata-Paper.pdf)。
+
+## クレジットとライセンス
+
+モデルは Qwen チームの [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next) です。
+圧縮は [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF)、UkisAI（Swift 1.5）、
+Unsloth によるものです。Strata は [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp) の一部を使っています。すべてのクレジット：
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits)。Strata は [MIT License](LICENSE) のオープンソースです。一部のパーツと
+すべてのモデルには、それぞれ独自のライセンスがあります（[どれか](docs/HOW_IT_WORKS.md#license)）。
+
+## Strata を支援する
+
+Strata は無料のオープンソースです。役に立ったら、開発を支援していただけます：
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a></p>
diff --git a/README.md b/README.md
index 6ce510f64d8..01cba01567b 100644
--- a/README.md
+++ b/README.md
@@ -1,5 +1,7 @@
 <h1 align="center">Strata</h1>
 
+**English** · [简体中文](README.zh-CN.md) · [日本語](README.ja.md) · [Deutsch](README.de.md) · [Français](README.fr.md) · [Español](README.es.md) · [Português](README.pt-BR.md)
+
 <p align="center"><b>Run a 125-billion-parameter AI model on your own gaming PC</b><br>
 NVIDIA or AMD graphics card (12 GB or more) · Windows or Linux · free and open source</p>
 
@@ -7,15 +9,16 @@ NVIDIA or AMD graphics card (12 GB or more) · Windows or Linux · free and open
 <sub>A voxel pagoda garden, 1 shot prompt running on an RTX 5070 with Strata (IQ3_S, 128K context) ·
 <a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">full video (49 s)</a></sub></p>
 
-Strata runs **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** - a large, smart AI model that
-normally needs a server - on a normal PC. It chats, writes code, reads pictures and works with your apps and coding
-agents, and nothing leaves your PC.
+Strata runs **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** on a normal PC. This is a
+large, smart AI model that usually needs a server. It chats, writes code, reads pictures and works with your apps
+and coding agents. Nothing leaves your PC.
 
 ## How fast is it?
 
-Measured on two ordinary gaming PCs. "Writes answers" is how fast the reply appears in a short chat; "reads your
-prompt" is how fast it takes in what you send (a 32K-token document, code or chat history). A token is about ¾ of a
-word, so 60 tokens per second is faster than you can read.
+We measured it on two ordinary gaming PCs. A token is about ¾ of a word.
+
+- **Writes answers:** how fast the reply appears in a short chat. 60 tokens per second is faster than you can read.
+- **Reads your prompt:** how fast it takes in what you send (here a 32K-token document, code or chat history).
 
 <table>
 <tr><th>NVIDIA: RTX 5070 (12 GB), Ryzen 5 7600, 64 GB RAM</th><th>AMD: RX 9070 XT (16 GB), Ryzen 9 3900X, 47 GB RAM</th></tr>
@@ -40,10 +43,10 @@ word, so 60 tokens per second is faster than you can read.
 </td></tr>
 </table>
 
-NVIDIA: Q2_0 with engine 0.1.36, the other rows with 0.1.26 (4K answers, 32K prompts; the full tables are in
-[DETAILS.md](docs/DETAILS.md#speed-measured)). A card with more VRAM is faster: an RTX 3090 (24 GB) should write
-roughly 100-140 tokens per second. Long chats,
-other cards: [speed of each model](docs/MODELS.md#how-fast-is-each-size), [community results](docs/COMMUNITY_BENCHMARKS.md).
+NVIDIA: Q2_0 with engine 0.1.36, the other rows with 0.1.26 (4K answers, 32K prompts). The full tables are in
+[DETAILS.md](docs/DETAILS.md#speed-measured). A card with more VRAM is faster: an RTX 3090 (24 GB) should write
+about 100-140 tokens per second. Long chats and other cards: [speed of each model](docs/MODELS.md#how-fast-is-each-size),
+[community results](docs/COMMUNITY_BENCHMARKS.md).
 
 <p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
 <sub>Strata is free. If it runs well on your PC, a coffee keeps the work on it going.</sub></p>
@@ -52,28 +55,33 @@ other cards: [speed of each model](docs/MODELS.md#how-fast-is-each-size), [commu
 
 | | |
 | --- | --- |
-| **Graphics card** | **NVIDIA** GeForce RTX 20, 30, 40 or 50 series, or **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 or RX 6800 / 6900 series - with **12 GB of VRAM or more** |
-| **RAM** | 32 GB or more - how much decides [which model](#which-model-should-i-pick) fits; 64 GB runs every size |
-| **Disk** | about 80 GB free, on an SSD if you can (the first start is much faster) |
-| **System** | Windows 10 / 11 or Linux, and a current graphics driver from NVIDIA or AMD |
-
-Everything else is installed for you. Two or three cards can share the model ([multi-GPU](docs/MULTI_GPU.md)).
-Older cards (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT) run through community-written,
-experimental paths: [Older GPUs](docs/OLDER_GPUS.md).
+| **Graphics card** | **NVIDIA** GeForce RTX 20, 30, 40 or 50 series, or **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 or RX 6800 / 6900 series. It needs **12 GB of VRAM or more**. |
+| **RAM** | 32 GB or more. Your RAM decides [which model](#which-model-should-i-pick) fits. 64 GB runs every size. |
+| **Disk** | About 80 GB free. Use an SSD if you can: the first start is much faster. |
+| **System** | Windows 10 / 11 or Linux, and a current graphics driver from NVIDIA or AMD. |
+
+The installer sets up everything else. Two or three cards can share the model ([multi-GPU](docs/MULTI_GPU.md)).
+
+Experimental, written and tested by community members on their own machines:
+
+- **Older graphics cards** (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT): [Older GPUs](docs/OLDER_GPUS.md).
+- **Intel Arc**, built from source on Linux: [Intel Arc](docs/INTEL_ARC.md).
+- **Older processors without AVX2**: they work, but slowly. [Older CPUs](docs/INSTALL.md#older-cpus-experimental).
+
 The full list: [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
 
 ## Install
 
 ### Let your AI set it up
 
-Use an AI coding assistant (Claude Code, Cursor, Codex, GitHub Copilot, ...)? Paste this into it:
+Do you use an AI coding assistant (Claude Code, Cursor, Codex, GitHub Copilot, ...)? Paste this into it:
 
 ```text
 Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
 ```
 
-It checks your graphics card, RAM and disk, picks the model that fits, installs it, starts it and tells you how to
-connect your apps. AI tools can also install, start and stop Strata themselves through its
+It checks your graphics card, RAM and disk and picks the model that fits. Then it installs and starts it and tells
+you how to connect your apps. AI tools can also install, start and stop Strata through its
 [MCP server](docs/MCP_SERVER.md).
 
 ### Or do it yourself
@@ -81,43 +89,48 @@ connect your apps. AI tools can also install, start and stop Strata themselves t
 [Download Strata](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) and unzip it (or `git clone` it).
 **Windows:** double-click **`START-HERE.bat`**. **Linux:** run **`./setup.sh`** in the Strata folder.
 
-The same steps for NVIDIA and AMD: the installer finds your card and sets up the right engine for it. It asks which
-model, which size, how much context (how much text it keeps in mind) and whether it should read pictures - press
-Enter each time for the recommended answer. Then it downloads the model (~70 GB; you can stop and it continues where
-it left off) and starts it. Your browser opens the Strata app at `http://127.0.0.1:8080`.
+The steps are the same for NVIDIA and AMD. The installer finds your card and sets up the right engine for it. It
+asks you a few questions:
+
+- which model and which size,
+- how much context (how much text the model keeps in mind),
+- whether it should read pictures.
+
+Press Enter each time for the recommended answer. Then it downloads the model (about 70 GB) and starts it. If the
+download stops, run it again: it continues where it left off. Your browser opens the Strata app at
+`http://127.0.0.1:8080`.
 
-> **While the model starts, your PC can be slow or stop responding for 1-3 minutes** (longest the first time): Strata
-> loads 35-55 GB into your RAM and locks part of it for the graphics card. That's normal - wait, and don't close the
-> window. The window tells you what it is doing.
+> **While the model starts, your PC can be slow or stop responding for 1-3 minutes** (longest the first time).
+> Strata loads 35-55 GB into your RAM and locks part of it for the graphics card. This is normal. Wait, and don't
+> close the window. The window shows what Strata is doing.
 
-**Next time**, run `START-HERE.bat` (or `./setup.sh`) again: it starts right away, nothing is downloaded twice. Close
+**Next time**, run `START-HERE.bat` (or `./setup.sh`) again. It starts right away and downloads nothing twice. Close
 its window to stop the model. `UPDATE.bat` (`./update.sh`) updates Strata without starting it. Updating, Docker,
-several cards, where the files go and every option:
-[docs/INSTALL.md](docs/INSTALL.md).
+several cards, where the files go and every option: [docs/INSTALL.md](docs/INSTALL.md).
 
 ## Which model should I pick?
 
-The installer recommends one for your RAM. The same model comes in sizes that are compressed more or less: smaller
-is faster, larger is a bit smarter.
+The installer recommends one for your RAM. The same model comes in several sizes, compressed more or less. Smaller
+sizes are faster. Larger sizes are a bit smarter.
 
 | Your RAM | Take | Why |
 | --- | --- | --- |
 | **32 GB** | **Coder** | it fits 32 GB, and it is made for code (with a 24 GB card, Q2_0 and IQ2_XS run too) |
 | **48 GB** | **IQ2_XS** (or Q2_0, the fastest) | the larger sizes do not fit |
-| **64 GB** | **IQ2_XS** (recommended), or IQ3_XXS / IQ3_S | every size fits; IQ3_S is the best, and the slowest |
+| **64 GB** | **IQ2_XS** (recommended), or IQ3_XXS / IQ3_S | every size fits; IQ3_S is the best and the slowest |
 | **96 GB or more** | **IQ3_S**, or Unsloth's 4-bit (experimental) | room for the largest sizes with everything else open |
 
-- **[Coder](docs/MODELS.md#coder)** - a coding version with half of the experts removed: 91% of the full model's
-  SWE-bench Verified score (by its authors), fits 32 GB of RAM. Weaker outside code, including Chinese and other
-  CJK text (#438): for those, take Q2_0, IQ2_XS or IQ3_S, which keep every expert.
-- **[Swift 1.5](docs/MODELS.md#swift-15)** - a fine-tune that thinks much shorter before it answers, so you get the
-  answer sooner, at about the same quality.
-- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental) - the closest to the full
-  model, but most of it is read from the SSD while it answers: 7-8.5 tokens/s on a 64 GB PC.
-- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs)** - a manual setup, not in the
-  installer's menu.
-
-Sizes, downloads and what fits where: [docs/MODELS.md](docs/MODELS.md). You can add another model later with
+- **[Coder](docs/MODELS.md#coder):** a coding version with half of the experts removed. It reaches 91% of the full
+  model's SWE-bench Verified score (measured by its authors) and fits 32 GB of RAM. It is weaker outside code,
+  including Chinese and other CJK text (#438). For those, take Q2_0, IQ2_XS or IQ3_S, which keep every expert.
+- **[Swift 1.5](docs/MODELS.md#swift-15):** a fine-tune that thinks for a much shorter time before it answers. You
+  get the answer sooner, at about the same quality.
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): the closest to the full
+  model. But Strata reads most of it from the SSD while it answers, so it writes only 7-8.5 tokens/s on a 64 GB PC.
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs):** you set it up by hand. It is
+  not in the installer's menu.
+
+Sizes, downloads and what fits where: [docs/MODELS.md](docs/MODELS.md). To add another model later, run
 `SETUP.bat` (Linux: `./setup.sh --setup`).
 
 ## Using it
@@ -125,65 +138,68 @@ Sizes, downloads and what fits where: [docs/MODELS.md](docs/MODELS.md). You can
 <p align="center"><img src="docs/media/runpagoda.png" width="900" alt="The Strata app's Monitor tab next to a coding agent"><br>
 <sub>The Strata app's <b>Monitor</b> (left) while a coding agent writes the pagoda garden from the video (right)</sub></p>
 
-- **In the browser:** `http://127.0.0.1:8080` - **Chat**, a live **Monitor** of the model and your GPU/CPU/RAM, and
-  **About** with the settings and addresses.
-- **Your apps and coding agents:** add an "OpenAI-compatible" provider with base URL **`http://127.0.0.1:8080/v1`**,
-  any API key and any model name. Apps that use Anthropic's API: `http://127.0.0.1:8080/v1/messages` (Claude Code:
-  `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`). Codex CLI and other Responses API apps: `/v1/responses`
-  ([setup](docs/DETAILS.md#the-responses-api-and-codex-cli)).
-- **Thinking:** choose **off, low, medium or high** in the chat menu or your app's "reasoning effort". Off is
-  fastest; high is best for hard questions.
-- **Pictures:** say yes to "Images?" in setup, then click **Picture** in the chat, or attach them in your app
-  (AMD cards: on Linux through the processor, not on Windows yet).
-- **From your phone or another PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>` - always with a key.
-- **Good to know:** it answers one request at a time (several at once is opt-in: `"parallel": 2`,
-  [BATCHING.md](docs/BATCHING.md)). The first message of a chat is read in full (about 1 minute
-  per 30,000 tokens); follow-ups start in seconds.
+- **In the browser:** open `http://127.0.0.1:8080`. It has **Chat**, a live **Monitor** of the model and your
+  GPU/CPU/RAM, and **About** with the settings and addresses.
+- **Your apps and coding agents:** add an "OpenAI-compatible" provider with the base URL
+  **`http://127.0.0.1:8080/v1`**. Any API key and any model name work.
+  - Apps that use Anthropic's API: `http://127.0.0.1:8080/v1/messages` (Claude Code:
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  - Codex CLI and other apps that use the OpenAI Responses API: `/v1/responses`
+    ([setup](docs/DETAILS.md#the-responses-api-and-codex-cli)).
+- **Thinking:** choose **off, low, medium or high** in the chat menu or in your app's "reasoning effort". Off is the
+  fastest. High is best for hard questions.
+- **Pictures:** say yes to "Images?" in setup. Then click **Picture** in the chat, or attach pictures in your app.
+  AMD cards read pictures on Linux through the processor; on Windows they can't yet.
+- **From your phone or another PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`. Always set a key.
+- **One request at a time:** by default Strata answers one request, and the others wait. To answer several at once,
+  set `"parallel": 2` ([BATCHING.md](docs/BATCHING.md)). On a 12 GB card this makes each answer slower.
+- **Long prompts:** Strata reads the first message of a chat in full, about 1 minute per 30,000 tokens. Follow-up
+  messages start in seconds.
 
 More: [where your chats are stored](docs/INSTALL.md#where-things-are-stored), [the API](docs/DETAILS.md#using-it).
 
 ## Something went wrong?
 
-- **My PC froze the first time Strata started.** Normal while it loads the model: wait, don't close the window.
-  Still frozen after 10 minutes? Restart the PC, close other programs and try again, or pick a smaller size.
-- **It stopped while downloading or installing.** Run `START-HERE.bat` (or `./setup.sh`) again: it continues where
+- **My PC froze the first time Strata started.** This is normal while it loads the model. Wait, and don't close the
+  window. Still frozen after 10 minutes? Restart the PC, close other programs and try again, or pick a smaller size.
+- **It stopped while downloading or installing.** Run `START-HERE.bat` (or `./setup.sh`) again. It continues where
   it stopped.
-- **It's very slow and the disk light keeps blinking, or "the engine stopped unexpectedly".** Not enough free RAM:
-  close other programs (browsers use a lot), or pick a smaller size (Q2_0 or IQ2_XS).
-- **It says port 8080 is already in use.** Strata is already running - look for its window.
+- **It's very slow and the disk light keeps blinking, or it says "the engine stopped unexpectedly".** Your PC does
+  not have enough free RAM. Close other programs (browsers use a lot), or pick a smaller size (Q2_0 or IQ2_XS).
+- **It says port 8080 is already in use.** Strata is already running. Look for its window.
 
 More problems and their fixes: [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). Still stuck? Open an
-[issue](https://github.com/Niko1221/Strata/issues) and attach `strata-<model>.log` from the Strata folder. A
+[issue](https://github.com/Niko1221/Strata/issues) and attach `strata-<model>.log` from the Strata folder. Found a
 security problem? Report it privately: [SECURITY.md](SECURITY.md).
 
 ## How does it work?
 
-Models like this one normally run on servers with hundreds of gigabytes of graphics memory. Your graphics card has
-12-24 GB. Strata makes it fit by **sharing the work across your whole PC** - like a kitchen, where the things you use
-all the time stay on the counter and the rest waits in the pantry.
+Models like this one usually run on servers with hundreds of gigabytes of graphics memory. Your graphics card has
+12-24 GB. Strata makes the model fit by **sharing the work across your whole PC**. Think of a kitchen: the things
+you use all the time stay on the counter, and the rest waits in the pantry.
 
 <p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="The model's 24,576 experts: the busiest on the graphics card, all of them in RAM, a lookup table on the SSD"></p>
 
-- **The model is a team of 24,576 small specialists ("experts"),** and each word needs only 10 of them.
-- **Your graphics card** keeps the few thousand experts that are asked most often; **your RAM** holds all of them,
+- **The model is a team of 24,576 small specialists ("experts").** Each word needs only 10 of them.
+- **Your graphics card** keeps the few thousand experts that are used most often. **Your RAM** holds all of them,
   and **your processor** works on the rest at the same time. **Your SSD** holds a big lookup table.
 
 <p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="A small helper guesses the next words; the big model checks them all at once and keeps the right ones"></p>
 
-- **Guess, then check:** a small helper guesses the next few words and the big model checks them all at once, so
-  you get the same answer, 1.6-1.8x sooner.
-- **Long texts are read in big pieces** (up to 8,192 tokens at a time): over 1,000 tokens per second.
+- **Guess, then check:** a small helper guesses the next few words. The big model checks them all at once. You get
+  the same answer, 1.6-1.8x sooner.
+- **Long texts are read in big pieces** (up to 8,192 tokens at a time), at over 1,000 tokens per second.
 
-The longer explanation: [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Every part and its numbers: [the
-details](docs/DETAILS.md#how-it-works) and the [paper](docs/paper/Strata-Paper.pdf).
+The longer explanation: [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Every part and its numbers:
+[the details](docs/DETAILS.md#how-it-works) and the [paper](docs/paper/Strata-Paper.pdf).
 
 ## Credits and license
 
-The model is [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next) by the Qwen team, compressed by
-[ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5) and Unsloth;
-Strata is built with parts of [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). All credits:
-[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). Strata is open source under the [MIT License](LICENSE); a few
-parts and every model carry their own licenses ([which ones](docs/HOW_IT_WORKS.md#license)).
+The model is [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next) by the Qwen team. It was
+compressed by [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5)
+and Unsloth. Strata uses parts of [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). All credits:
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). Strata is open source under the [MIT License](LICENSE). A few
+parts and every model have their own licenses ([which ones](docs/HOW_IT_WORKS.md#license)).
 
 ## Support Strata
 
diff --git a/README.pt-BR.md b/README.pt-BR.md
new file mode 100644
index 00000000000..4cead3b493f
--- /dev/null
+++ b/README.pt-BR.md
@@ -0,0 +1,213 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · [简体中文](README.zh-CN.md) · [日本語](README.ja.md) · [Deutsch](README.de.md) · [Français](README.fr.md) · [Español](README.es.md) · **Português**
+
+<p align="center"><b>Rode um modelo de IA de 125 bilhões de parâmetros no seu próprio PC gamer</b><br>
+Placa de vídeo NVIDIA ou AMD (12 GB ou mais) · Windows ou Linux · gratuito e de código aberto</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Um jardim com pagode em voxels que o modelo do Strata escreveu, rodando no navegador"></a><br>
+<sub>Um jardim com pagode em voxels, feito com um único prompt numa RTX 5070 com o Strata (IQ3_S, contexto de 128K) ·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">vídeo completo (49 s)</a></sub></p>
+
+O Strata roda o **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)** num PC comum. É um modelo
+de IA grande e inteligente que normalmente precisa de um servidor. Ele conversa, escreve código, entende imagens e
+funciona com seus apps e agentes de programação. Nada sai do seu PC.
+
+## Qual é a velocidade?
+
+Medimos em dois PCs gamer comuns. Um token equivale a cerca de ¾ de uma palavra.
+
+- **Escreve respostas:** a velocidade com que a resposta aparece numa conversa curta. 60 tokens por segundo é mais rápido do que você consegue ler.
+- **Lê seu prompt:** a velocidade com que ele absorve o que você envia (aqui, um documento, código ou histórico de conversa de 32K tokens).
+
+<table>
+<tr><th>NVIDIA: RTX 5070 (12 GB), Ryzen 5 7600, 64 GB de RAM</th><th>AMD: RX 9070 XT (16 GB), Ryzen 9 3900X, 47 GB de RAM</th></tr>
+<tr><td>
+
+| Tamanho | Escreve respostas | Lê seu prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 94 tokens/s | 2,650 tokens/s |
+| **IQ2_XS** | 79 tokens/s | 2,090 tokens/s |
+| **IQ3_XXS** | 62 tokens/s | 1,750 tokens/s |
+| **IQ3_S** | 53 tokens/s | 1,620 tokens/s |
+| **Coder** | 55 tokens/s | 2,180 tokens/s |
+
+</td><td>
+
+| Tamanho | Escreve respostas | Lê seu prompt |
+| --- | ---: | ---: |
+| **Q2_0** | 60 tokens/s | 1,160 tokens/s |
+| **IQ2_XS** | 52 tokens/s | 1,110 tokens/s |
+| **Coder** | 44 tokens/s | 1,420 tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA: Q2_0 com o engine 0.1.36, as outras linhas com 0.1.26 (respostas de 4K, prompts de 32K). As tabelas
+completas estão em [DETAILS.md](docs/DETAILS.md#speed-measured). Uma placa com mais VRAM é mais rápida: uma
+RTX 3090 (24 GB) deve escrever cerca de 100-140 tokens por segundo. Conversas longas e outras placas:
+[velocidade de cada modelo](docs/MODELS.md#how-fast-is-each-size), [resultados da comunidade](docs/COMMUNITY_BENCHMARKS.md).
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a><br>
+<sub>O Strata é gratuito. Se ele roda bem no seu PC, um café ajuda a manter o trabalho nele.</sub></p>
+
+## Do que você precisa
+
+| | |
+| --- | --- |
+| **Placa de vídeo** | **NVIDIA** GeForce RTX séries 20, 30, 40 ou 50, ou **AMD** Radeon RX 7900 XT / XTX, RX 7800 XT / 7700 XT, RX 9060 XT, RX 9070 / 9070 XT, Radeon AI PRO R9700 ou séries RX 6800 / 6900. Ela precisa de **12 GB de VRAM ou mais**. |
+| **RAM** | 32 GB ou mais. Sua RAM decide [qual modelo](#qual-modelo-devo-escolher) cabe. Com 64 GB, roda qualquer tamanho. |
+| **Disco** | Cerca de 80 GB livres. Use um SSD se puder: a primeira inicialização fica bem mais rápida. |
+| **Sistema** | Windows 10 / 11 ou Linux, e um driver de vídeo atualizado da NVIDIA ou da AMD. |
+
+O instalador cuida de todo o resto. Duas ou três placas podem dividir o modelo ([multi-GPU](docs/MULTI_GPU.md)).
+
+Experimental, escrito e testado por membros da comunidade nas próprias máquinas:
+
+- **Placas de vídeo mais antigas** (Tesla P40 / V100, GTX 10, Radeon VII / MI50, RX 6700 XT, RX 5500 XT): [Older GPUs](docs/OLDER_GPUS.md).
+- **Intel Arc**, compilado a partir do código-fonte no Linux: [Intel Arc](docs/INTEL_ARC.md).
+- **Processadores mais antigos sem AVX2**: funcionam, mas devagar. [Older CPUs](docs/INSTALL.md#older-cpus-experimental).
+
+A lista completa: [docs/INSTALL.md](docs/INSTALL.md#what-you-need).
+
+## Instalação
+
+### Deixe sua IA instalar
+
+Você usa um assistente de programação com IA (Claude Code, Cursor, Codex, GitHub Copilot, ...)? Cole isto nele:
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+Ele verifica sua placa de vídeo, RAM e disco e escolhe o modelo que cabe. Depois instala, inicia e explica como
+conectar seus apps. Ferramentas de IA também podem instalar, iniciar e parar o Strata pelo
+[servidor MCP](docs/MCP_SERVER.md) dele.
+
+### Ou faça você mesmo
+
+[Baixe o Strata](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) e descompacte (ou use `git clone`).
+**Windows:** clique duas vezes em **`START-HERE.bat`**. **Linux:** rode **`./setup.sh`** na pasta do Strata.
+
+Os passos são os mesmos para NVIDIA e AMD. O instalador encontra sua placa e configura o engine certo para ela.
+Ele faz algumas perguntas:
+
+- qual modelo e qual tamanho,
+- quanto contexto (quanto texto o modelo guarda na memória),
+- se ele deve entender imagens.
+
+Aperte Enter em cada uma para usar a resposta recomendada. Depois ele baixa o modelo (cerca de 70 GB) e o inicia.
+Se o download parar, rode de novo: ele continua de onde parou. Seu navegador abre o app do Strata em
+`http://127.0.0.1:8080`.
+
+> **Enquanto o modelo inicia, seu PC pode ficar lento ou parar de responder por 1-3 minutos** (mais na primeira vez).
+> O Strata carrega 35-55 GB na sua RAM e reserva parte dela para a placa de vídeo. Isso é normal. Espere e não
+> feche a janela. A janela mostra o que o Strata está fazendo.
+
+**Da próxima vez**, rode `START-HERE.bat` (ou `./setup.sh`) de novo. Ele inicia na hora e não baixa nada duas
+vezes. Feche a janela para parar o modelo. `UPDATE.bat` (`./update.sh`) atualiza o Strata sem iniciá-lo.
+Atualização, Docker, várias placas, onde ficam os arquivos e todas as opções: [docs/INSTALL.md](docs/INSTALL.md).
+
+## Qual modelo devo escolher?
+
+O instalador recomenda um de acordo com sua RAM. O mesmo modelo vem em vários tamanhos, mais ou menos comprimidos.
+Os tamanhos menores são mais rápidos. Os maiores são um pouco mais inteligentes.
+
+| Sua RAM | Escolha | Por quê |
+| --- | --- | --- |
+| **32 GB** | **Coder** | cabe em 32 GB e é feito para código (com uma placa de 24 GB, Q2_0 e IQ2_XS também rodam) |
+| **48 GB** | **IQ2_XS** (ou Q2_0, o mais rápido) | os tamanhos maiores não cabem |
+| **64 GB** | **IQ2_XS** (recomendado), ou IQ3_XXS / IQ3_S | todos os tamanhos cabem; IQ3_S é o melhor e o mais lento |
+| **96 GB ou mais** | **IQ3_S**, ou o 4-bit da Unsloth (experimental) | espaço para os maiores tamanhos com todo o resto aberto |
+
+- **[Coder](docs/MODELS.md#coder):** uma versão para programação com metade dos experts removida. Ela alcança 91%
+  da pontuação do modelo completo no SWE-bench Verified (medido pelos autores) e cabe em 32 GB de RAM. É mais fraca
+  fora do código, inclusive em chinês e outros textos CJK (#438). Para isso, escolha Q2_0, IQ2_XS ou IQ3_S, que
+  mantêm todos os experts.
+- **[Swift 1.5](docs/MODELS.md#swift-15):** um fine-tune que pensa por bem menos tempo antes de responder. Você
+  recebe a resposta mais cedo, com quase a mesma qualidade.
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): o mais próximo do modelo
+  completo. Mas o Strata lê a maior parte dele do SSD enquanto responde, então ele escreve só 7-8.5 tokens/s num PC
+  com 64 GB.
+- **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs):** você configura à mão. Ele
+  não está no menu do instalador.
+
+Tamanhos, downloads e o que cabe onde: [docs/MODELS.md](docs/MODELS.md). Para adicionar outro modelo depois, rode
+`SETUP.bat` (Linux: `./setup.sh --setup`).
+
+## Como usar
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="A aba Monitor do app Strata ao lado de um agente de programação"><br>
+<sub>O <b>Monitor</b> do app Strata (à esquerda) enquanto um agente de programação escreve o jardim com pagode do vídeo (à direita)</sub></p>
+
+- **No navegador:** abra `http://127.0.0.1:8080`. Lá tem o **Chat**, um **Monitor** ao vivo do modelo e da sua
+  GPU/CPU/RAM, e o **About** com as configurações e os endereços.
+- **Seus apps e agentes de programação:** adicione um provedor "OpenAI-compatible" com a URL base
+  **`http://127.0.0.1:8080/v1`**. Qualquer chave de API e qualquer nome de modelo funcionam.
+  - Apps que usam a API da Anthropic: `http://127.0.0.1:8080/v1/messages` (Claude Code:
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`).
+  - Codex CLI e outros apps que usam a OpenAI Responses API: `/v1/responses`
+    ([configuração](docs/DETAILS.md#the-responses-api-and-codex-cli)).
+- **Raciocínio:** escolha **off, low, medium ou high** no menu do chat ou no "reasoning effort" do seu app. Off é o
+  mais rápido. High é o melhor para perguntas difíceis.
+- **Imagens:** responda sim para "Images?" na instalação. Depois clique em **Picture** no chat, ou anexe imagens no
+  seu app. Placas AMD entendem imagens no Linux usando o processador; no Windows, ainda não.
+- **Do seu celular ou de outro PC:** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`. Sempre defina uma chave.
+- **Uma requisição por vez:** por padrão, o Strata responde uma requisição e as outras esperam. Para responder
+  várias ao mesmo tempo, defina `"parallel": 2` ([BATCHING.md](docs/BATCHING.md)). Numa placa de 12 GB, isso deixa
+  cada resposta mais lenta.
+- **Prompts longos:** o Strata lê a primeira mensagem de uma conversa inteira, cerca de 1 minuto a cada 30,000
+  tokens. As mensagens seguintes começam em segundos.
+
+Mais: [onde suas conversas ficam salvas](docs/INSTALL.md#where-things-are-stored), [a API](docs/DETAILS.md#using-it).
+
+## Algo deu errado?
+
+- **Meu PC travou na primeira vez que o Strata iniciou.** Isso é normal enquanto ele carrega o modelo. Espere e não
+  feche a janela. Ainda travado depois de 10 minutos? Reinicie o PC, feche outros programas e tente de novo, ou
+  escolha um tamanho menor.
+- **Parou durante o download ou a instalação.** Rode `START-HERE.bat` (ou `./setup.sh`) de novo. Ele continua de
+  onde parou.
+- **Está muito lento e a luz do disco não para de piscar, ou aparece "the engine stopped unexpectedly".** Seu PC
+  não tem RAM livre suficiente. Feche outros programas (navegadores usam muita), ou escolha um tamanho menor (Q2_0
+  ou IQ2_XS).
+- **Diz que a porta 8080 já está em uso.** O Strata já está rodando. Procure a janela dele.
+
+Mais problemas e como resolver: [docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md). Ainda sem solução? Abra uma
+[issue](https://github.com/Niko1221/Strata/issues) e anexe o `strata-<model>.log` da pasta do Strata. Encontrou um
+problema de segurança? Informe em particular: [SECURITY.md](SECURITY.md).
+
+## Como funciona?
+
+Modelos como este normalmente rodam em servidores com centenas de gigabytes de memória de vídeo. Sua placa de vídeo
+tem 12-24 GB. O Strata faz o modelo caber **dividindo o trabalho pelo PC inteiro**. Pense numa cozinha: o que você
+usa o tempo todo fica na bancada, e o resto espera na despensa.
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="Os 24,576 experts do modelo: os mais usados na placa de vídeo, todos na RAM, uma tabela de consulta no SSD"></p>
+
+- **O modelo é uma equipe de 24,576 pequenos especialistas ("experts").** Cada palavra precisa de só 10 deles.
+- **Sua placa de vídeo** guarda os poucos milhares de experts usados com mais frequência. **Sua RAM** guarda todos
+  eles, e **seu processador** trabalha no resto ao mesmo tempo. **Seu SSD** guarda uma grande tabela de consulta.
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="Um pequeno ajudante adivinha as próximas palavras; o modelo grande confere todas de uma vez e fica com as certas"></p>
+
+- **Adivinhar e conferir:** um pequeno ajudante adivinha as próximas palavras. O modelo grande confere todas de
+  uma vez. Você recebe a mesma resposta, 1.6-1.8x mais cedo.
+- **Textos longos são lidos em grandes pedaços** (até 8,192 tokens por vez), a mais de 1,000 tokens por segundo.
+
+A explicação mais longa: [docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md). Cada parte e seus números:
+[os detalhes](docs/DETAILS.md#how-it-works) e o [artigo](docs/paper/Strata-Paper.pdf).
+
+## Créditos e licença
+
+O modelo é o [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next), da equipe Qwen. Ele foi
+comprimido por [ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF), UkisAI (Swift 1.5)
+e Unsloth. O Strata usa partes do [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp). Todos os créditos:
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits). O Strata é de código aberto sob a [MIT License](LICENSE).
+Algumas partes e todos os modelos têm licenças próprias ([quais](docs/HOW_IT_WORKS.md#license)).
+
+## Apoie o Strata
+
+O Strata é gratuito e de código aberto. Se ele é útil para você, você pode apoiar o desenvolvimento:
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="Buy Me A Coffee" height="50"></a></p>
diff --git a/README.zh-CN.md b/README.zh-CN.md
new file mode 100644
index 00000000000..ac46df38631
--- /dev/null
+++ b/README.zh-CN.md
@@ -0,0 +1,197 @@
+<h1 align="center">Strata</h1>
+
+[English](README.md) · **简体中文** · [日本語](README.ja.md) · [Deutsch](README.de.md) · [Français](README.fr.md) · [Español](README.es.md) · [Português](README.pt-BR.md)
+
+<p align="center"><b>在你自己的游戏电脑上运行 1250 亿参数的 AI 模型</b><br>
+NVIDIA 或 AMD 显卡（12 GB 及以上）· Windows 或 Linux · 免费开源</p>
+
+<p align="center"><a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4"><img src="docs/media/pagoda-preview.webp" width="720" alt="Strata 的模型写出的体素宝塔花园，在浏览器中运行"></a><br>
+<sub>体素宝塔花园，一次提示生成，在 RTX 5070 上用 Strata 运行（IQ3_S，128K 上下文）·
+<a href="https://github.com/Niko1221/Strata/releases/download/v0.1.10/Pagoda.mp4">完整视频（49 秒）</a></sub></p>
+
+Strata 能在普通电脑上运行 **[Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)**。这是一个又大又聪明的
+AI 模型，通常要用服务器才能跑。它能聊天、写代码、看图片，还能配合你的应用和编程智能体一起工作。所有数据都留在你的电脑上。
+
+## 速度有多快？
+
+我们在两台普通的游戏电脑上做了测试。一个 token 大约相当于 ¾ 个英文单词。
+
+- **写回答：** 短对话中回复出现的速度。每秒 60 个 token 已经比你的阅读速度还快。
+- **读提示：** 读入你发送内容的速度（这里是一份 32K token 的文档、代码或聊天记录）。
+
+<table>
+<tr><th>NVIDIA：RTX 5070（12 GB）、Ryzen 5 7600、64 GB 内存</th><th>AMD：RX 9070 XT（16 GB）、Ryzen 9 3900X、47 GB 内存</th></tr>
+<tr><td>
+
+| 规格 | 写回答 | 读提示 |
+| --- | ---: | ---: |
+| **Q2_0** | 94 tokens/s | 2,650 tokens/s |
+| **IQ2_XS** | 79 tokens/s | 2,090 tokens/s |
+| **IQ3_XXS** | 62 tokens/s | 1,750 tokens/s |
+| **IQ3_S** | 53 tokens/s | 1,620 tokens/s |
+| **Coder** | 55 tokens/s | 2,180 tokens/s |
+
+</td><td>
+
+| 规格 | 写回答 | 读提示 |
+| --- | ---: | ---: |
+| **Q2_0** | 60 tokens/s | 1,160 tokens/s |
+| **IQ2_XS** | 52 tokens/s | 1,110 tokens/s |
+| **Coder** | 44 tokens/s | 1,420 tokens/s |
+
+</td></tr>
+</table>
+
+NVIDIA：Q2_0 用的是引擎 0.1.36，其他各行用的是 0.1.26（4K 回答，32K 提示）。完整表格见
+[DETAILS.md](docs/DETAILS.md#speed-measured)。显存越大的显卡越快：RTX 3090（24 GB）写回答应该能达到每秒约
+100-140 个 token。长对话和其他显卡的数据：[各模型的速度](docs/MODELS.md#how-fast-is-each-size)、
+[社区测试结果](docs/COMMUNITY_BENCHMARKS.md)。
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="请我喝杯咖啡" height="50"></a><br>
+<sub>Strata 是免费的。如果它在你的电脑上跑得不错，请我喝杯咖啡，让这个项目继续下去。</sub></p>
+
+## 你需要什么
+
+| | |
+| --- | --- |
+| **显卡** | **NVIDIA** GeForce RTX 20、30、40 或 50 系列，或 **AMD** Radeon RX 7900 XT / XTX、RX 7800 XT / 7700 XT、RX 9060 XT、RX 9070 / 9070 XT、Radeon AI PRO R9700 或 RX 6800 / 6900 系列。需要 **12 GB 或以上显存**。 |
+| **内存** | 32 GB 或以上。内存大小决定能装下[哪个模型](#该选哪个模型)。64 GB 可以运行所有规格。 |
+| **硬盘** | 约 80 GB 可用空间。尽量用 SSD：第一次启动会快很多。 |
+| **系统** | Windows 10 / 11 或 Linux，以及 NVIDIA 或 AMD 的最新显卡驱动。 |
+
+其他的都由安装程序搞定。两到三张显卡可以分担同一个模型（[多 GPU](docs/MULTI_GPU.md)）。
+
+实验性支持，由社区成员在自己的机器上编写和测试：
+
+- **较老的显卡**（Tesla P40 / V100、GTX 10、Radeon VII / MI50、RX 6700 XT、RX 5500 XT）：[较老的 GPU](docs/OLDER_GPUS.md)。
+- **Intel Arc**，在 Linux 上从源码构建：[Intel Arc](docs/INTEL_ARC.md)。
+- **不支持 AVX2 的老处理器**：能用，但很慢。[较老的 CPU](docs/INSTALL.md#older-cpus-experimental)。
+
+完整列表：[docs/INSTALL.md](docs/INSTALL.md#what-you-need)。
+
+## 安装
+
+### 让你的 AI 帮你装
+
+你在用 AI 编程助手吗（Claude Code、Cursor、Codex、GitHub Copilot 等）？把下面这段粘贴给它：
+
+```text
+Set up Strata on this PC for me: https://github.com/Niko1221/Strata - follow docs/AI_SETUP.md in that repository.
+```
+
+它会检查你的显卡、内存和硬盘，选出合适的模型。然后安装并启动它，再告诉你怎么连接你的应用。AI 工具也可以通过
+Strata 的 [MCP 服务器](docs/MCP_SERVER.md)来安装、启动和停止 Strata。
+
+### 或者自己动手
+
+[下载 Strata](https://github.com/Niko1221/Strata/archive/refs/heads/main.zip) 并解压（或者用 `git clone`）。
+**Windows：** 双击 **`START-HERE.bat`**。**Linux：** 在 Strata 文件夹里运行 **`./setup.sh`**。
+
+NVIDIA 和 AMD 的步骤完全一样。安装程序会识别你的显卡，并装好对应的引擎。它会问你几个问题：
+
+- 用哪个模型、哪个规格，
+- 上下文多大（模型能记住多少文字），
+- 是否要识别图片。
+
+每次直接按回车就是推荐选项。之后它会下载模型（约 70 GB）并启动。如果下载中断了，再运行一次即可：它会从中断的地方继续。
+浏览器会打开 Strata 应用，地址是 `http://127.0.0.1:8080`。
+
+> **模型启动时，你的电脑可能会变慢或卡住 1-3 分钟**（第一次最久）。
+> Strata 会把 35-55 GB 加载到内存，并为显卡锁定其中一部分。这是正常的。请耐心等待，不要关闭窗口。
+> 窗口里会显示 Strata 正在做什么。
+
+**下次使用时**，再运行一次 `START-HERE.bat`（或 `./setup.sh`）。它会马上启动，已下载的东西不会重复下载。关闭它的窗口就能停止模型。
+`UPDATE.bat`（`./update.sh`）只更新 Strata，不启动。更新、Docker、多张显卡、文件存放位置以及所有选项：
+[docs/INSTALL.md](docs/INSTALL.md)。
+
+## 该选哪个模型
+
+安装程序会根据你的内存推荐一个。同一个模型有几种规格，压缩程度不同。规格越小越快，越大越聪明一些。
+
+| 你的内存 | 选择 | 原因 |
+| --- | --- | --- |
+| **32 GB** | **Coder** | 32 GB 装得下，而且专为代码打造（如果显卡是 24 GB，Q2_0 和 IQ2_XS 也能跑） |
+| **48 GB** | **IQ2_XS**（或 Q2_0，最快） | 更大的规格装不下 |
+| **64 GB** | **IQ2_XS**（推荐），或 IQ3_XXS / IQ3_S | 所有规格都装得下；IQ3_S 最好，也最慢 |
+| **96 GB 或以上** | **IQ3_S**，或 Unsloth 的 4-bit 版本（实验性） | 开着其他程序也能放下最大的规格 |
+
+- **[Coder](docs/MODELS.md#coder)：** 编程版本，去掉了一半专家。它达到完整模型 SWE-bench Verified 分数的 91%（由其作者测得），
+  32 GB 内存就能装下。代码以外的能力较弱，包括中文和其他中日韩文本（#438）。这类用途请选 Q2_0、IQ2_XS 或 IQ3_S，
+  它们保留了所有专家。
+- **[Swift 1.5](docs/MODELS.md#swift-15)：** 一个微调版本，回答前思考的时间短得多。你能更早拿到答案，质量基本不变。
+- **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)**（实验性）：最接近完整模型。但 Strata
+  回答时要从 SSD 读取其中大部分内容，所以在 64 GB 的电脑上每秒只能写 7-8.5 个 token。
+- **[OrcaRouter 的 Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs)：** 需要手动设置，不在安装程序的菜单里。
+
+规格、下载以及各配置能装下什么：[docs/MODELS.md](docs/MODELS.md)。以后想再添加模型，运行
+`SETUP.bat`（Linux：`./setup.sh --setup`）。
+
+## 使用方法
+
+<p align="center"><img src="docs/media/runpagoda.png" width="900" alt="Strata 应用的 Monitor 标签页，旁边是一个编程智能体"><br>
+<sub>Strata 应用的 <b>Monitor</b>（左），编程智能体正在写视频里的宝塔花园（右）</sub></p>
+
+- **在浏览器里：** 打开 `http://127.0.0.1:8080`。里面有 **Chat**（聊天）、实时 **Monitor**（监控模型和你的
+  GPU/CPU/内存），以及 **About**（设置和地址）。
+- **你的应用和编程智能体：** 添加一个“OpenAI 兼容”的提供商，base URL 填 **`http://127.0.0.1:8080/v1`**。
+  API key 和模型名随便填都行。
+  - 使用 Anthropic API 的应用：`http://127.0.0.1:8080/v1/messages`（Claude Code：
+    `ANTHROPIC_BASE_URL=http://127.0.0.1:8080`）。
+  - Codex CLI 和其他使用 OpenAI Responses API 的应用：`/v1/responses`
+    （[设置方法](docs/DETAILS.md#the-responses-api-and-codex-cli)）。
+- **思考：** 在聊天菜单或应用的“reasoning effort”里选择 **off、low、medium 或 high**。off 最快，
+  high 最适合难题。
+- **图片：** 在安装时对“Images?”选是。然后在聊天里点 **Picture**，或在你的应用里附上图片。
+  AMD 显卡在 Linux 上通过处理器识别图片；在 Windows 上暂时还不行。
+- **从手机或另一台电脑访问：** `START-HERE.bat --setup --host 0.0.0.0 --api-key <secret>`。一定要设置 key。
+- **一次处理一个请求：** 默认情况下 Strata 一次只回答一个请求，其他请求排队等待。想同时回答多个，
+  设置 `"parallel": 2`（[BATCHING.md](docs/BATCHING.md)）。在 12 GB 显卡上，这会让每个回答变慢。
+- **长提示：** Strata 会完整读入对话的第一条消息，大约每 30,000 个 token 需要 1 分钟。之后的消息几秒内就开始回答。
+
+更多：[聊天记录存在哪里](docs/INSTALL.md#where-things-are-stored)、[API](docs/DETAILS.md#using-it)。
+
+## 出问题了？
+
+- **Strata 第一次启动时电脑卡死了。** 加载模型时这是正常的。请耐心等待，不要关闭窗口。
+  10 分钟后还卡着？重启电脑，关掉其他程序再试一次，或者换一个更小的规格。
+- **下载或安装时中断了。** 再运行一次 `START-HERE.bat`（或 `./setup.sh`）。它会从中断的地方继续。
+- **非常慢，硬盘灯一直闪，或者提示“the engine stopped unexpectedly”。** 你的电脑可用内存不够。
+  关掉其他程序（浏览器很占内存），或者换一个更小的规格（Q2_0 或 IQ2_XS）。
+- **提示 8080 端口已被占用。** Strata 已经在运行了。找一下它的窗口。
+
+更多问题和解决办法：[docs/TROUBLESHOOTING.md](docs/TROUBLESHOOTING.md)。还是解决不了？提交一个
+[issue](https://github.com/Niko1221/Strata/issues)，并附上 Strata 文件夹里的 `strata-<model>.log`。发现了安全问题？
+请私下报告：[SECURITY.md](SECURITY.md)。
+
+## 它是怎么工作的？
+
+这类模型通常运行在拥有数百 GB 显存的服务器上。而你的显卡只有 12-24 GB。Strata 让模型装得下的办法是
+**把工作分摊到整台电脑上**。可以想象一个厨房：常用的东西放在台面上，其余的放在储藏室里。
+
+<p align="center"><img src="docs/media/how-it-works.svg" width="860" alt="模型的 24,576 个专家：最常用的在显卡上，全部在内存里，一张查找表在 SSD 上"></p>
+
+- **这个模型是由 24,576 个小专家（“experts”）组成的团队。** 每个词只需要其中 10 个。
+- **你的显卡** 存放最常用的几千个专家。**你的内存** 存放全部专家，
+  **你的处理器** 同时处理其余的部分。**你的 SSD** 存放一张大查找表。
+
+<p align="center"><img src="docs/media/guess-and-check.svg" width="860" alt="一个小助手猜测接下来的几个词；大模型一次性全部检查，保留正确的"></p>
+
+- **先猜，再检查：** 一个小助手先猜接下来的几个词，大模型再一次性检查它们。答案完全一样，但快 1.6-1.8 倍。
+- **长文本分大块读入**（每次最多 8,192 个 token），速度超过每秒 1,000 个 token。
+
+更详细的解释：[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md)。每个部分及其数据：
+[详细说明](docs/DETAILS.md#how-it-works)和[论文](docs/paper/Strata-Paper.pdf)。
+
+## 致谢与许可证
+
+模型是 Qwen 团队的 [Qwen3.8-Flash-Next](https://huggingface.co/Qwen/Qwen3.8-Flash-Next)。它由
+[ISTA-DASLab](https://huggingface.co/ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF)、UkisAI（Swift 1.5）
+和 Unsloth 压缩。Strata 使用了 [llama.cpp / ggml](https://github.com/ggml-org/llama.cpp) 的部分代码。完整致谢：
+[docs/HOW_IT_WORKS.md](docs/HOW_IT_WORKS.md#credits)。Strata 以 [MIT 许可证](LICENSE)开源。少数部分和每个模型
+有各自的许可证（[具体是哪些](docs/HOW_IT_WORKS.md#license)）。
+
+## 支持 Strata
+
+Strata 免费且开源。如果它对你有用，欢迎支持它的开发：
+
+<p align="center"><a href="https://buymeacoffee.com/strataengine"><img src="https://cdn.buymeacoffee.com/buttons/v2/default-yellow.png" alt="请我喝杯咖啡" height="50"></a></p>

From c2d1f19a437448b30e20608d901190921c2fd410 Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 13:24:16 +0200
Subject: [PATCH 197/201] setup: Unsloth's UD-IQ4_XS is a regular choice (no
 longer experimental); UD-Q4_K_XL stays experimental

- "experimental" is per model now: MODELS["UD-Q4_K_XL"] keeps it, the unsloth family and UD-IQ4_XS drop it. The
  first menu lists the family without [experimental], with a one-line about (UD-IQ4_XS: a 94 GB download; under
  ~80 GB of RAM part of its experts are read from the SSD). Its size menu lists UD-IQ4_XS first (the default) and
  UD-Q4_K_XL second; an experimental size always sorts last. --model names are unchanged.
- UD-IQ4_XS: no EXPERIMENTAL warning, --check verdict without it. Images are asked (off by default), per model: the
  engine's image path has no restriction for this pack, which uses the original model's image encoder; not yet run
  with images. UD-Q4_K_XL keeps images off.
- MCP: the fallback tables mirror setup's (per-model experimental/vision), sizes in setup's order, per-size
  "experimental" and "images", the vision check per model.
- Docs: README and its six translations, MODELS, UNSLOTH_Q4, AI_SETUP, MCP_SERVER.
- Tests: the menus, the default, --model by name, images, --check, the pack/tokenizer paths; the golden configs
  are unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01QJJwUv9g3cD2ztX6KWS8rk
---
 README.de.md                |  5 ++-
 README.es.md                |  5 ++-
 README.fr.md                |  5 ++-
 README.ja.md                |  4 +-
 README.md                   |  5 ++-
 README.pt-BR.md             |  5 ++-
 README.zh-CN.md             |  4 +-
 docs/AI_SETUP.md            |  8 ++--
 docs/MCP_SERVER.md          |  2 +-
 docs/MODELS.md              | 26 ++++++-----
 docs/UNSLOTH_Q4.md          | 13 +++---
 setup.py                    | 42 +++++++++--------
 tools/strata_mcp.py         | 40 ++++++++++-------
 tools/test_setup_choices.py |  2 +-
 tools/test_setup_unsloth.py | 89 ++++++++++++++++++++++++++++++++-----
 tools/test_strata_mcp.py    | 22 ++++++++-
 16 files changed, 202 insertions(+), 75 deletions(-)

diff --git a/README.de.md b/README.de.md
index a3215ecf9f0..e400395e2a6 100644
--- a/README.de.md
+++ b/README.de.md
@@ -121,7 +121,7 @@ stark komprimiert. Kleinere Größen sind schneller. Größere sind etwas klüge
 | **32 GB** | **Coder** | passt in 32 GB und ist für Code gemacht (mit einer 24-GB-Karte laufen auch Q2_0 und IQ2_XS) |
 | **48 GB** | **IQ2_XS** (oder Q2_0, das schnellste) | die größeren Größen passen nicht |
 | **64 GB** | **IQ2_XS** (empfohlen) oder IQ3_XXS / IQ3_S | alle Größen passen; IQ3_S ist das beste und das langsamste |
-| **96 GB oder mehr** | **IQ3_S** oder das 4-Bit-Modell von Unsloth (experimentell) | Platz für die größten Größen, auch wenn alles andere offen ist |
+| **96 GB oder mehr** | **IQ3_S** oder Unsloths UD-IQ4_XS (~4 Bit) | Platz für die größten Größen, auch wenn alles andere offen ist |
 
 - **[Coder](docs/MODELS.md#coder):** eine Version für Code, bei der die Hälfte der Experten entfernt wurde. Sie
   erreicht 91 % des SWE-bench-Verified-Werts des vollen Modells (von ihren Autoren gemessen) und passt in 32 GB RAM.
@@ -129,6 +129,9 @@ stark komprimiert. Kleinere Größen sind schneller. Größere sind etwas klüge
   oder IQ3_S, die alle Experten behalten.
 - **[Swift 1.5](docs/MODELS.md#swift-15):** ein Fine-Tune, das viel kürzer nachdenkt, bevor es antwortet. Du
   bekommst die Antwort früher, bei etwa gleicher Qualität.
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs):** die ~4-Bit-Version von Unsloth, in der Qualität
+  zwischen IQ3_S und UD-Q4_K_XL. 94 GB Download. Mit weniger als ~80 GB RAM liest Strata einen Teil davon während
+  der Antwort von der SSD, dort ist es also langsamer (eine NVMe-SSD hilft).
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimentell): am nächsten am vollen
   Modell. Aber Strata liest das meiste davon während der Antwort von der SSD, deshalb schreibt es auf einem PC mit
   64 GB nur 7-8.5 Tokens/s.
diff --git a/README.es.md b/README.es.md
index 60b5f1d9298..936c13de10f 100644
--- a/README.es.md
+++ b/README.es.md
@@ -118,7 +118,7 @@ tamaños pequeños son más rápidos. Los grandes son algo más inteligentes.
 | **32 GB** | **Coder** | cabe en 32 GB y está hecho para programar (con una tarjeta de 24 GB también funcionan Q2_0 e IQ2_XS) |
 | **48 GB** | **IQ2_XS** (o Q2_0, el más rápido) | los tamaños más grandes no caben |
 | **64 GB** | **IQ2_XS** (recomendado), o IQ3_XXS / IQ3_S | caben todos los tamaños; IQ3_S es el mejor y el más lento |
-| **96 GB o más** | **IQ3_S**, o el de 4 bits de Unsloth (experimental) | espacio para los tamaños más grandes con todo lo demás abierto |
+| **96 GB o más** | **IQ3_S**, o el UD-IQ4_XS de Unsloth (~4 bits) | espacio para los tamaños más grandes con todo lo demás abierto |
 
 - **[Coder](docs/MODELS.md#coder):** una versión para programar a la que se le quitó la mitad de los expertos. Alcanza
   el 91% de la puntuación SWE-bench Verified del modelo completo (medido por sus autores) y cabe en 32 GB de RAM. Es
@@ -126,6 +126,9 @@ tamaños pequeños son más rápidos. Los grandes son algo más inteligentes.
   conservan todos los expertos.
 - **[Swift 1.5](docs/MODELS.md#swift-15):** un ajuste fino que piensa mucho menos tiempo antes de responder. Recibes
   la respuesta antes, con más o menos la misma calidad.
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs):** la versión de ~4 bits de Unsloth, entre IQ3_S y
+  UD-Q4_K_XL en calidad. Una descarga de 94 GB. Con menos de ~80 GB de RAM, Strata lee una parte desde el SSD
+  mientras responde, así que ahí es más lento (un SSD NVMe ayuda).
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): el más parecido al modelo
   completo. Pero Strata lee la mayor parte desde el SSD mientras responde, así que solo escribe 7-8.5 tokens/s en un
   PC con 64 GB.
diff --git a/README.fr.md b/README.fr.md
index 352321695eb..22faf7d8942 100644
--- a/README.fr.md
+++ b/README.fr.md
@@ -118,7 +118,7 @@ compressées. Les petites tailles sont plus rapides. Les grandes sont un peu plu
 | **32 Go** | **Coder** | il tient dans 32 Go et il est fait pour le code (avec une carte de 24 Go, Q2_0 et IQ2_XS tournent aussi) |
 | **48 Go** | **IQ2_XS** (ou Q2_0, le plus rapide) | les plus grandes tailles ne tiennent pas |
 | **64 Go** | **IQ2_XS** (recommandé), ou IQ3_XXS / IQ3_S | toutes les tailles tiennent ; IQ3_S est le meilleur et le plus lent |
-| **96 Go ou plus** | **IQ3_S**, ou le 4 bits d'Unsloth (expérimental) | de la place pour les plus grandes tailles, avec tout le reste ouvert |
+| **96 Go ou plus** | **IQ3_S**, ou l'UD-IQ4_XS d'Unsloth (~4 bits) | de la place pour les plus grandes tailles, avec tout le reste ouvert |
 
 - **[Coder](docs/MODELS.md#coder) :** une version pour le code, avec la moitié des experts en moins. Elle atteint 91 %
   du score SWE-bench Verified du modèle complet (mesuré par ses auteurs) et tient dans 32 Go de RAM. Elle est moins
@@ -126,6 +126,9 @@ compressées. Les petites tailles sont plus rapides. Les grandes sont un peu plu
   IQ2_XS ou IQ3_S, qui gardent tous les experts.
 - **[Swift 1.5](docs/MODELS.md#swift-15) :** un fine-tune qui réfléchit bien moins longtemps avant de répondre. Vous
   avez la réponse plus tôt, avec à peu près la même qualité.
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs)** : la version ~4 bits d'Unsloth, entre IQ3_S et
+  UD-Q4_K_XL en qualité. Un téléchargement de 94 Go. Avec moins de ~80 Go de RAM, Strata en lit une partie depuis
+  le SSD pendant qu'il répond, il y est donc plus lent (un SSD NVMe aide).
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (expérimental) : le plus proche du modèle
   complet. Mais Strata en lit la plus grande partie depuis le SSD pendant qu'il répond, donc il n'écrit que
   7-8.5 tokens/s sur un PC avec 64 Go.
diff --git a/README.ja.md b/README.ja.md
index 29f61f670ce..897322fb5c5 100644
--- a/README.ja.md
+++ b/README.ja.md
@@ -118,13 +118,15 @@ Strata のインストール、起動、停止もできます。
 | **32 GB** | **Coder** | 32 GB に収まり、コード向けに作られている（24 GB のカードなら Q2_0 と IQ2_XS も動く） |
 | **48 GB** | **IQ2_XS**（または最速の Q2_0） | 大きいサイズは収まらない |
 | **64 GB** | **IQ2_XS**（おすすめ）、または IQ3_XXS / IQ3_S | すべてのサイズが収まる。IQ3_S がいちばん賢く、いちばん遅い |
-| **96 GB 以上** | **IQ3_S**、または Unsloth の 4-bit（試験的） | ほかのものを全部開いたままでも、最大のサイズが入る余裕がある |
+| **96 GB 以上** | **IQ3_S**、または Unsloth の UD-IQ4_XS（約 4-bit） | ほかのものを全部開いたままでも、最大のサイズが入る余裕がある |
 
 - **[Coder](docs/MODELS.md#coder)：** エキスパートを半分取り除いたコーディング向け版です。フルモデルの SWE-bench Verified スコアの
   91% に届き（作者による測定）、32 GB の RAM に収まります。コード以外では弱く、中国語などの CJK のテキストも苦手です（#438）。
   そうした用途には、すべてのエキスパートを残している Q2_0、IQ2_XS、IQ3_S を選んでください。
 - **[Swift 1.5](docs/MODELS.md#swift-15)：** 答える前に考える時間がずっと短いファインチューン版です。
   ほぼ同じ品質のまま、答えが早く返ってきます。
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs)：** Unsloth の約 4-bit 版で、品質は IQ3_S と UD-Q4_K_XL の間です。
+  ダウンロードは 94 GB。RAM が約 80 GB 未満だと、答えている間に Strata がその一部を SSD から読むので遅くなります（NVMe SSD が有効です）。
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)**（試験的）：フルモデルにいちばん近いものです。
   ただし答えている間、Strata はその大部分を SSD から読むので、64 GB の PC では毎秒 7-8.5 トークンしか書き出せません。
 - **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs)：** 手動でセットアップします。
diff --git a/README.md b/README.md
index 01cba01567b..ae464b410d9 100644
--- a/README.md
+++ b/README.md
@@ -118,13 +118,16 @@ sizes are faster. Larger sizes are a bit smarter.
 | **32 GB** | **Coder** | it fits 32 GB, and it is made for code (with a 24 GB card, Q2_0 and IQ2_XS run too) |
 | **48 GB** | **IQ2_XS** (or Q2_0, the fastest) | the larger sizes do not fit |
 | **64 GB** | **IQ2_XS** (recommended), or IQ3_XXS / IQ3_S | every size fits; IQ3_S is the best and the slowest |
-| **96 GB or more** | **IQ3_S**, or Unsloth's 4-bit (experimental) | room for the largest sizes with everything else open |
+| **96 GB or more** | **IQ3_S**, or Unsloth's UD-IQ4_XS (~4-bit) | room for the largest sizes with everything else open |
 
 - **[Coder](docs/MODELS.md#coder):** a coding version with half of the experts removed. It reaches 91% of the full
   model's SWE-bench Verified score (measured by its authors) and fits 32 GB of RAM. It is weaker outside code,
   including Chinese and other CJK text (#438). For those, take Q2_0, IQ2_XS or IQ3_S, which keep every expert.
 - **[Swift 1.5](docs/MODELS.md#swift-15):** a fine-tune that thinks for a much shorter time before it answers. You
   get the answer sooner, at about the same quality.
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs):** Unsloth's ~4-bit version, between IQ3_S and
+  UD-Q4_K_XL in quality. A 94 GB download. With less than ~80 GB of RAM, Strata reads part of it from the SSD
+  while it answers, so it is slower there (an NVMe SSD helps).
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): the closest to the full
   model. But Strata reads most of it from the SSD while it answers, so it writes only 7-8.5 tokens/s on a 64 GB PC.
 - **[OrcaRouter's Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs):** you set it up by hand. It is
diff --git a/README.pt-BR.md b/README.pt-BR.md
index 4cead3b493f..a34dbf2f501 100644
--- a/README.pt-BR.md
+++ b/README.pt-BR.md
@@ -118,7 +118,7 @@ Os tamanhos menores são mais rápidos. Os maiores são um pouco mais inteligent
 | **32 GB** | **Coder** | cabe em 32 GB e é feito para código (com uma placa de 24 GB, Q2_0 e IQ2_XS também rodam) |
 | **48 GB** | **IQ2_XS** (ou Q2_0, o mais rápido) | os tamanhos maiores não cabem |
 | **64 GB** | **IQ2_XS** (recomendado), ou IQ3_XXS / IQ3_S | todos os tamanhos cabem; IQ3_S é o melhor e o mais lento |
-| **96 GB ou mais** | **IQ3_S**, ou o 4-bit da Unsloth (experimental) | espaço para os maiores tamanhos com todo o resto aberto |
+| **96 GB ou mais** | **IQ3_S**, ou o UD-IQ4_XS da Unsloth (~4-bit) | espaço para os maiores tamanhos com todo o resto aberto |
 
 - **[Coder](docs/MODELS.md#coder):** uma versão para programação com metade dos experts removida. Ela alcança 91%
   da pontuação do modelo completo no SWE-bench Verified (medido pelos autores) e cabe em 32 GB de RAM. É mais fraca
@@ -126,6 +126,9 @@ Os tamanhos menores são mais rápidos. Os maiores são um pouco mais inteligent
   mantêm todos os experts.
 - **[Swift 1.5](docs/MODELS.md#swift-15):** um fine-tune que pensa por bem menos tempo antes de responder. Você
   recebe a resposta mais cedo, com quase a mesma qualidade.
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs):** a versão de ~4 bits da Unsloth, entre IQ3_S e
+  UD-Q4_K_XL em qualidade. Um download de 94 GB. Com menos de ~80 GB de RAM, o Strata lê uma parte dele do SSD
+  enquanto responde, então ali ele fica mais lento (um SSD NVMe ajuda).
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)** (experimental): o mais próximo do modelo
   completo. Mas o Strata lê a maior parte dele do SSD enquanto responde, então ele escreve só 7-8.5 tokens/s num PC
   com 64 GB.
diff --git a/README.zh-CN.md b/README.zh-CN.md
index ac46df38631..6eb1220dd12 100644
--- a/README.zh-CN.md
+++ b/README.zh-CN.md
@@ -113,12 +113,14 @@ NVIDIA 和 AMD 的步骤完全一样。安装程序会识别你的显卡，并
 | **32 GB** | **Coder** | 32 GB 装得下，而且专为代码打造（如果显卡是 24 GB，Q2_0 和 IQ2_XS 也能跑） |
 | **48 GB** | **IQ2_XS**（或 Q2_0，最快） | 更大的规格装不下 |
 | **64 GB** | **IQ2_XS**（推荐），或 IQ3_XXS / IQ3_S | 所有规格都装得下；IQ3_S 最好，也最慢 |
-| **96 GB 或以上** | **IQ3_S**，或 Unsloth 的 4-bit 版本（实验性） | 开着其他程序也能放下最大的规格 |
+| **96 GB 或以上** | **IQ3_S**，或 Unsloth 的 UD-IQ4_XS（约 4-bit） | 开着其他程序也能放下最大的规格 |
 
 - **[Coder](docs/MODELS.md#coder)：** 编程版本，去掉了一半专家。它达到完整模型 SWE-bench Verified 分数的 91%（由其作者测得），
   32 GB 内存就能装下。代码以外的能力较弱，包括中文和其他中日韩文本（#438）。这类用途请选 Q2_0、IQ2_XS 或 IQ3_S，
   它们保留了所有专家。
 - **[Swift 1.5](docs/MODELS.md#swift-15)：** 一个微调版本，回答前思考的时间短得多。你能更早拿到答案，质量基本不变。
+- **[Unsloth UD-IQ4_XS](docs/MODELS.md#unsloth-ud-iq4_xs)：** Unsloth 的约 4-bit 版本，质量介于 IQ3_S 和 UD-Q4_K_XL 之间。
+  下载 94 GB。内存少于约 80 GB 时，Strata 回答时要从 SSD 读取其中一部分，所以会更慢（NVMe SSD 有帮助）。
 - **[Unsloth UD-Q4_K_XL](docs/MODELS.md#unsloth-ud-q4_k_xl-experimental)**（实验性）：最接近完整模型。但 Strata
   回答时要从 SSD 读取其中大部分内容，所以在 64 GB 的电脑上每秒只能写 7-8.5 个 token。
 - **[OrcaRouter 的 Uncensored IQ3_XXS](docs/MODELS.md#orcarouter-uncensored-iq3_xxs)：** 需要手动设置，不在安装程序的菜单里。
diff --git a/docs/AI_SETUP.md b/docs/AI_SETUP.md
index 93cf92189a3..3eb9dfcf15d 100644
--- a/docs/AI_SETUP.md
+++ b/docs/AI_SETUP.md
@@ -14,7 +14,7 @@ Work through the steps in order. Tell the user what you are doing in plain words
   user the key. Never put a tunnel or port forward in front of a server without a key.
 - Do not change the user's system beyond what setup does (setup installs Python for the user account if needed,
   and everything else inside the Strata folder and its `Strata-data` folder). Ask before installing drivers.
-- The model download is ~70 GB (up to 111 GB for Unsloth's 4-bit). Confirm the user is fine with that before you
+- The model download is ~70 GB (94 GB for Unsloth's UD-IQ4_XS, 111 GB for UD-Q4_K_XL). Confirm the user is fine with that before you
   start, especially on a metered connection.
 - Setup is long-running (an hour or more on a slow connection). Run it in the background or with a long timeout and
   poll its output; do not kill it because it is quiet for a while. It is resumable: running the same command again
@@ -73,7 +73,7 @@ By the PC's RAM (ask the user whether they mainly want it for code - then the Co
 | 32 GB | `--family coder` (size IQ1_M) | for code; with a 24 GB card Q2_0 and IQ2_XS also run (setup picks the low-RAM mode) |
 | 48 GB | `--family qwen --model IQ2_XS` | or `Q2_0` (fastest) |
 | 64 GB | `--family qwen --model IQ2_XS` (recommended) | `IQ3_XXS` / `IQ3_S` are slower and a bit better |
-| 96 GB+ | `--family qwen --model IQ3_S` | `--family unsloth --model UD-Q4_K_XL` is experimental: NVIDIA only, NVMe SSD, 7-8.5 tokens/s on 64 GB |
+| 96 GB+ | `--family qwen --model IQ3_S` | `--family unsloth --model UD-IQ4_XS` (~4-bit, 94 GB, part of the experts read from the SSD under ~80 GB of RAM); `--model UD-Q4_K_XL` is experimental: NVIDIA only, NVMe SSD, 7-8.5 tokens/s on 64 GB |
 
 `--family swift` (Swift 1.5, a fine-tune that thinks shorter; sizes Q2_0, IQ2_XS, IQ3_XXS) is the alternative to
 `qwen`. With `--yes` and no `--model`, setup picks the recommended size for the RAM itself. More: [MODELS.md](MODELS.md).
@@ -93,7 +93,7 @@ The flags (all of them: `START-HERE.bat --help`):
 | --- | --- |
 | `--yes` | take the recommended answer to every question (no prompts) |
 | `--family qwen\|swift\|coder\|unsloth` | the model version |
-| `--model Q2_0\|IQ2_XS\|IQ3_XXS\|IQ3_S\|IQ1_M\|UD-Q4_K_XL` | the size (the Coder is IQ1_M, Unsloth UD-Q4_K_XL) |
+| `--model Q2_0\|IQ2_XS\|IQ3_XXS\|IQ3_S\|IQ1_M\|UD-IQ4_XS\|UD-Q4_K_XL` | the size (the Coder is IQ1_M, Unsloth UD-IQ4_XS or UD-Q4_K_XL) |
 | `--context N` | context in tokens; default by VRAM: 32768 under 14 GB, 65536 under 20 GB, else 131072 |
 | `--vision yes\|no\|gpu\|cpu` | read pictures; `--yes` leaves images off. AMD cards: `cpu` |
 | `--gpu N` / `--gpus 0,1` / `--gpus all` | one card, or several sharing the model (default: the card with the most VRAM) |
@@ -133,7 +133,7 @@ Notes:
 ## 6. Start the server
 
 Setup prints the start script it wrote (`start script: run-<model>.bat`). The name is the family tag plus the size,
-lower case: `run-iq2_xs`, `run-swift-iq2_xs`, `run-coder-iq1_m`, `run-unsloth-ud-q4_k_xl`.
+lower case: `run-iq2_xs`, `run-swift-iq2_xs`, `run-coder-iq1_m`, `run-unsloth-ud-iq4_xs`.
 
 ```
 Windows (PowerShell):  Start-Process -FilePath ".\run-iq2_xs.bat"            (opens its own window)
diff --git a/docs/MCP_SERVER.md b/docs/MCP_SERVER.md
index b72c659c243..4fc053697f6 100644
--- a/docs/MCP_SERVER.md
+++ b/docs/MCP_SERVER.md
@@ -111,7 +111,7 @@ The command is `python <Strata folder>/tools/strata_mcp.py`. The transport is st
 | --- | --- | --- |
 | `strata_status` | Whether a model is running: the model, engine version, context, busy or idle, VRAM and RAM in use. What is installed: models, start scripts, engine version, data folder, downloads. An install in progress. This PC's hardware: OS, CPU, RAM, GPUs, page file, free disk. The model and context setup recommends for this PC. | `port`, `hardware` (true/false) |
 | `strata_models` | Every family and size setup offers, with download size, RAM needed, whether it fits this PC, and whether it is installed. Also the context lengths and the recommendation. | - |
-| `strata_install` | Runs setup without questions, in the background (see below). Without `confirm: true` it only returns the plan. A second call shows the progress. `cancel: true` stops the install. | `family` (qwen, swift, coder, unsloth), `model` (Q2_0, IQ2_XS, IQ3_XXS, IQ3_S, IQ1_M, UD-Q4_K_XL), `context` (8192 ... 524288), `vision` (no, yes, gpu, cpu), `kv` (int8, q4_0, k8v4), `gpu` (a number) or `gpus` ("0,2", "all"), `backend` (auto, cuda, hip), `low_ram`, `port`, `data_dir`, `confirm`, `cancel` |
+| `strata_install` | Runs setup without questions, in the background (see below). Without `confirm: true` it only returns the plan. A second call shows the progress. `cancel: true` stops the install. | `family` (qwen, swift, coder, unsloth), `model` (Q2_0, IQ2_XS, IQ3_XXS, IQ3_S, IQ1_M, UD-IQ4_XS, UD-Q4_K_XL), `context` (8192 ... 524288), `vision` (no, yes, gpu, cpu), `kv` (int8, q4_0, k8v4), `gpu` (a number) or `gpus` ("0,2", "all"), `backend` (auto, cuda, hip), `low_ram`, `port`, `data_dir`, `confirm`, `cancel` |
 | `strata_start` | Starts an installed model in the background and waits until it answers. If it is not ready after `wait_seconds` (default 50), it returns "loading". | `model` (an id from `strata_status`, e.g. `q2_0`, `coder-iq1_m`; default: the most recently used), `port`, `gpu`, `wait_seconds` (0-600) |
 | `strata_stop` | Unloads the model through the server's own API, then ends the server it started. | `port`, `force` |
 | `strata_logs` | The last lines of the server log, the engine log or the setup log. | `source` (server, engine, setup), `model`, `lines` (1-500) |
diff --git a/docs/MODELS.md b/docs/MODELS.md
index b2e0d00ed8d..1ffc87f5aa8 100644
--- a/docs/MODELS.md
+++ b/docs/MODELS.md
@@ -14,7 +14,7 @@ The installer recommends one for your PC; this page explains the choice. Back to
 | **32 GB** | **Coder** | it fits 32 GB; best at code, weaker at everything else ([why](#coder)). With a 24 GB card, Q2_0 and IQ2_XS run too ([low-RAM mode](#a-big-graphics-card-and-little-ram)) and are the better pick for general use |
 | **48 GB** | **IQ2_XS** (or Q2_0, the fastest) | the larger sizes do not fit |
 | **64 GB** | **IQ2_XS** (recommended), or IQ3_XXS / IQ3_S | every size fits (IQ3_S with little else open) |
-| **96 GB or more** | **IQ3_S**, or [Unsloth's 4-bit](#unsloth-ud-q4_k_xl-experimental) (experimental) | room for the largest sizes |
+| **96 GB or more** | **IQ3_S**, or [Unsloth's UD-IQ4_XS](#unsloth-ud-iq4_xs) (~4-bit) | room for the largest sizes |
 
 Not sure? Take **IQ2_XS**. The **Coder** is the one that fits a 32 GB PC, but it keeps only 256 of the 512 experts,
 chosen on code data, so it is weaker outside code and in languages other than English. For general use, or whenever
@@ -117,9 +117,22 @@ More: [details](DETAILS.md#or-swift-15-a-fine-tune-that-thinks-shorter).
 START-HERE.bat --setup --family swift --model IQ2_XS
 ```
 
+### Unsloth UD-IQ4_XS
+
+**Unsloth's UD-IQ4_XS** (~4-bit) is the fourth version in setup's menu (`--family unsloth`, its first size), a
+regular choice from 0.1.39: a 94 GB download with 59.5 GB of experts (IQ3_S and IQ4_NL), between IQ3_S and UD-Q4_K_XL
+in quality. Strata keeps your RAM minus 24 GB of the experts in RAM and reads the rest from the SSD while it answers:
+on a 64 GB PC part of them come from the SSD (slower; an NVMe SSD helps), from ~80 GB of RAM all of them stay in RAM.
+It needs 48 GB of RAM or more and engine 0.1.38 or newer; images are an option, as with the other models.
+Details: [UD-IQ4_XS](UNSLOTH_Q4.md#ud-iq4_xs-setup-from-0139-621).
+
+```
+START-HERE.bat --setup --family unsloth --model UD-IQ4_XS
+```
+
 ### Unsloth UD-Q4_K_XL (experimental)
 
-**Unsloth's 4-bit UD-Q4_K_XL** (experimental) is the fourth version in setup's menu (`--family unsloth`): the closest
+**Unsloth's 4-bit UD-Q4_K_XL** (experimental) is the second size of the same family (`--family unsloth`): the closest
 to the full model, but a 111 GB download whose 77 GB of experts do not fit in RAM. Strata keeps your RAM minus 24 GB
 of them in RAM and reads the rest from the SSD while it answers: 7-8.5 tokens/s on a 64 GB PC with a 12 GB GPU, several
 times slower than the sizes above, and long prompts are slow. It needs 48 GB of RAM or more, an NVMe SSD and one
@@ -129,15 +142,6 @@ NVIDIA GPU (no images yet). Details and measurements: [UD-Q4_K_XL](UNSLOTH_Q4.md
 START-HERE.bat --setup --family unsloth --model UD-Q4_K_XL
 ```
 
-**Unsloth's UD-IQ4_XS** (experimental, 0.1.39, #621) is the smaller choice of the same family: a 94 GB download with
-59.5 GB of experts (IQ3_S and IQ4_NL), between IQ3_S and UD-Q4_K_XL. Setup runs it the same way (a RAM budget of your
-RAM minus 24 GB, the rest from the SSD), so on a 64 GB PC far fewer experts come from the SSD than with UD-Q4_K_XL, and
-on 96 GB all of them stay in RAM. Not measured on NVIDIA yet: [details](UNSLOTH_Q4.md#ud-iq4_xs-experimental-setup-from-0139-621).
-
-```
-START-HERE.bat --setup --family unsloth --model UD-IQ4_XS
-```
-
 ### OrcaRouter Uncensored IQ3_XXS
 
 For **OrcaRouter's Flash-Next Uncensored IQ3_XXS**, see the [manual compatibility setup](ORCA.md). It needs an
diff --git a/docs/UNSLOTH_Q4.md b/docs/UNSLOTH_Q4.md
index 6bffe67f84b..e275dec7cc9 100644
--- a/docs/UNSLOTH_Q4.md
+++ b/docs/UNSLOTH_Q4.md
@@ -221,10 +221,11 @@ engine with `--short-read` covering the positions to compare; llama.cpp's side w
 | `STRATA_PARTIAL_PIN=1` | Registers the hottest part of the RAM budget (up to `STRATA_PARTIAL_PIN_GIB`, default 24) with the GPU driver, so the GPU computes a share of the misses over PCIe (`--pcie-frac`). Measured no faster on this PC, and it changes the numerics of those experts (GPU kernels instead of the CPU's), so off. |
 | `STRATA_FETCH_THREADS=N` | Threads that read the experts from the GGUF while it answers (default 8; 16 was no faster). The prompt path has its own: `STRATA_STAGER_THREADS` (default 32 here) and `STRATA_STAGER_RING` (128). |
 
-## UD-IQ4_XS (experimental, setup from 0.1.39, #621)
+## UD-IQ4_XS (setup from 0.1.39, #621)
 
-Unsloth's `UD-IQ4_XS` at the same revision is in setup too: `START-HERE.bat --setup --family unsloth --model
-UD-IQ4_XS` (engine 0.1.38 or newer). It sits between IQ3_S and UD-Q4_K_XL: its routed experts are IQ3_S gate/up (IQ4_XS
+Unsloth's `UD-IQ4_XS` at the same revision is in setup too, as a regular choice (not experimental; the Unsloth
+family's first size and its default): `START-HERE.bat --setup --family unsloth --model UD-IQ4_XS` (engine 0.1.38 or
+newer). It sits between IQ3_S and UD-Q4_K_XL: its routed experts are IQ3_S gate/up (IQ4_XS
 in one layer) with IQ4_NL downs (Q8_0 in five layers), 59.5 GB of them; the dense side (Q8_0 projections, the IQ4_NL
 PLE table, a Q6_K head) is UD-Q4_K_XL's. Three shards, 93.7 GB:
 
@@ -235,8 +236,10 @@ PLE table, a Q6_K head) is UD-Q4_K_XL's. Three shards, 93.7 GB:
 | `Qwen3.8-Flash-Next-UD-IQ4_XS-00003-of-00003.gguf` | 43,836,407,744 | `d4634e6d84f0ebb0940be15c90d3790bf6464e3dea3a1cddc567dc0e83ad8833` |
 
 Setup treats it like UD-Q4_K_XL (the list above): the same RAM budget (your RAM less 24 GB; at most all 55 GiB of its
-experts, so a 96 GB PC holds all of them), the pack with `--compat-bf16`, no `experts.bin`, one GPU by default, no
-images. It does not ask on AMD: its experts' formats have prompt kernels there too.
+experts, so a PC with ~80 GB of RAM or more holds all of them), the pack with `--compat-bf16`, no `experts.bin`, one
+GPU by default. It does not ask on AMD: its experts' formats have prompt kernels there too. Images are an option (asked,
+off by default; NVIDIA): the image path has no restriction for this pack, which uses the original model's image
+encoder; not yet run with images.
 
 What is known so far: it packs and runs on a Strix Halo (AMD gfx1151, 128 GB unified memory), where prompts read at
 ~820 tokens/s at 8K and 64K and the answers passed the retrieval checks at 8K and 64K. It has **not** been measured on
diff --git a/setup.py b/setup.py
index 96c40d115bb..d615996f514 100644
--- a/setup.py
+++ b/setup.py
@@ -138,14 +138,17 @@ def hf_unpinned(url: str) -> str:
     # keeps a RAM budget of them (--resident-budget-gib, chosen below) and reads the rest from the GGUF on the SSD
     "UD-Q4_K_XL": {"about": "4-bit (Unsloth Dynamic), EXPERIMENTAL: the best quality, but most experts come from the "
                             "SSD on a 64 GB PC (7-8.5 tokens/s measured)", "download_gb": 111.3, "ram_gb": 48,
-                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True, "nvidia_only": True},
-    # #621 EXPERIMENTAL: Unsloth's UD-IQ4_XS - IQ3_S gate/up experts with IQ4_NL (43 layers) or Q8_0 (5) downs, the
-    # dense side as UD-Q4_K_XL's; three shards.  Packed and run on a Strix Halo (AMD); not measured on NVIDIA yet.  Its
-    # 59.5 GB of experts: a RAM budget of them, like UD-Q4_K_XL, but far fewer read from the SSD on a 64 GB PC
-    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), EXPERIMENTAL: between IQ3_S and UD-Q4_K_XL; part of "
-                           "its experts come from the SSD on a 64 GB PC (not measured on NVIDIA yet)",
+                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True, "nvidia_only": True,
+                   "experimental": True},
+    # #621: Unsloth's UD-IQ4_XS - IQ3_S gate/up experts with IQ4_NL (43 layers) or Q8_0 (5) downs, the dense side as
+    # UD-Q4_K_XL's; three shards.  A regular choice from 0.1.39 (no longer experimental).  Its 59.5 GB of experts: a
+    # RAM budget of them, like UD-Q4_K_XL, but far fewer read from the SSD on a 64 GB PC and none from ~80 GB of RAM.
+    # Images: the vision path has no restriction for this pack (the same base model and image encoder), so setup asks
+    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), between IQ3_S and UD-Q4_K_XL in quality; on a PC with "
+                           "less than ~80 GB of RAM part of its experts are read from the SSD",
                   "download_gb": 93.7, "ram_gb": 48, "arena_gb": 59.5, "families": ("unsloth",), "budget": True,
-                  "shards": 3, "file": "Qwen3.8-Flash-Next-{q}-0000{i}-of-00003.gguf", "engine": (0, 1, 38)},
+                  "shards": 3, "file": "Qwen3.8-Flash-Next-{q}-0000{i}-of-00003.gguf", "engine": (0, 1, 38),
+                  "vision": True},
 }
 # The experimental Unsloth file's four shards at the pinned revision: name -> (bytes, sha256), checked after the
 # download (setup trusts no other model file by name and size alone either: check_shards reads their directories).
@@ -200,16 +203,16 @@ def hf_unpinned(url: str) -> str:
               "mmproj_hf": hf("ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-Coder-GGUF"),
               "mmproj": "mmproj-Qwen3.8-Flash-Next-BF16.gguf", "name": "qwen3.8-flash-next-coder",
               "profile": "expert-profile-coder.bin"},
-    # EXPERIMENTAL: Unsloth's UD-Q4_K_XL (four shards) and UD-IQ4_XS (three, #621) of the original model
-    # (docs/UNSLOTH_Q4.md); no images yet
-    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "by": "Unsloth's 4-bit quantizations (EXPERIMENTAL)",
-                "about": "UD-Q4_K_XL (111 GB download) or UD-IQ4_XS (94 GB); part of the experts read from the SSD: "
-                         "slower (UD-Q4_K_XL: 7-8.5 tokens/s on a 64 GB PC)",
+    # Unsloth's UD-IQ4_XS (three shards, #621; a regular choice from 0.1.39) and the EXPERIMENTAL UD-Q4_K_XL (four)
+    # of the original model (docs/UNSLOTH_Q4.md); "experimental" and "vision" are per model (MODELS)
+    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "by": "Unsloth's ~4-bit quantizations",
+                "about": "UD-IQ4_XS: a 94 GB download; with less than ~80 GB of RAM part of its experts are read from "
+                         "the SSD (UD-Q4_K_XL, 111 GB: experimental)",
                 "hf": hf("unsloth/Qwen3.8-Flash-Next-GGUF") + "{q}/",
                 "file": "Qwen3.8-Flash-Next-{q}-0000{i}-of-00004.gguf", "shards": 4, "tag": "unsloth-",
                 "mmproj_hf": hf("ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF"),
                 "mmproj": "mmproj-Qwen3.8-Flash-Next-BF16.gguf", "name": "qwen3.8-flash-next-unsloth",
-                "experimental": True, "vision": False, "pack_args": ["--compat-bf16"],
+                "vision": False, "pack_args": ["--compat-bf16"],
                 "sha256": {**UNSLOTH_SHARDS, **UNSLOTH_IQ4_XS_SHARDS}},
 }
 MMPROJ = "mmproj-Qwen3.8-Flash-Next-BF16.gguf"
@@ -3836,7 +3839,8 @@ def main() -> int:
         for m, d in MODELS.items():
             verdict = "fits" if ram >= d["ram_gb"] else "tight" if ram >= d["ram_gb"] - 8 else "does not fit"
             if d.get("budget"):
-                verdict = (f"EXPERIMENTAL, fits with {resident_budget_gib(m, ram)} GiB of its experts in RAM, the rest "
+                verdict = (("EXPERIMENTAL, " if d.get("experimental") else "") +
+                           f"fits with {resident_budget_gib(m, ram)} GiB of its experts in RAM, the rest "
                            "read from the SSD" if ram >= d["ram_gb"] else "does not fit")
                 if hip:                                # #429: not run on AMD yet (its prompt kernels are CUDA-only)
                     verdict += " - NVIDIA only so far, untested on AMD"
@@ -3864,6 +3868,7 @@ def main() -> int:
         say(f"  Its license: {fam['license']}")
     say()
     names = [m for m in MODELS if family in MODELS[m].get("families", ("qwen", "swift"))]
+    names.sort(key=lambda m: bool(MODELS[m].get("experimental")))   # an experimental size last, never the default
     if a.model and a.model not in names:
         # #444: say which family has that size, and (with --gguf-dir) which files Strata can run at all
         elsewhere_fams = [f for f in FAMILIES if f in MODELS[a.model].get("families", ("qwen", "swift"))]
@@ -3889,8 +3894,9 @@ def main() -> int:
         # Unsloth's UD-Q4_K_XL: a RAM budget of experts, the rest from the GGUF on the SSD - not the low-RAM mode (no
         # experts.bin: it would be another 77 GB on the disk), and one GPU (the budget mode has no layer split) unless
         # the RAM holds the GGUFs and 24 GB more: then several, without the budget, if asked for (#498)
-        warn(f"{model} is EXPERIMENTAL (docs/UNSLOTH_Q4.md): most of its experts are read from the SSD while it "
-             "answers, so it is several times slower than the 2-3-bit models; quality checked against llama.cpp")
+        if MODELS[model].get("experimental"):
+            warn(f"{model} is EXPERIMENTAL (docs/UNSLOTH_Q4.md): most of its experts are read from the SSD while it "
+                 "answers, so it is several times slower than the 2-3-bit models; quality checked against llama.cpp")
         if hip and MODELS[model].get("nvidia_only"):
             # #429 (jkuepker): checked before the 111 GB download.  The HIP engine has no prompt kernels for its
             # Q4_K / Q5_K experts (STRATA_MMQ_KQUANTS is CUDA-only) and it has not been run on AMD: asked, not refused
@@ -3986,7 +3992,7 @@ def main() -> int:
         kv = ["int8", "q4_0"][int(ask("KV cache?", ["1", "2"], "1", a.yes)) - 1]
     if ctx > 8192:
         ok(f"KV cache: {'8-bit' if kv == 'int8' else '4-bit (Hadamard-rotated)'}")
-    if fam.get("vision") is False:
+    if MODELS[model].get("vision", fam.get("vision")) is False:     # UD-IQ4_XS: images, unlike UD-Q4_K_XL
         vision = "none"
         if a.vision not in (None, "no", "none"):
             warn(f"images are not available with {model} yet: off")
@@ -4147,7 +4153,7 @@ def main() -> int:
                     pass
             download(fam["hf"].format(q=model) + s.name, s)
     check_shards(shards)
-    for s in shards:                                   # the experimental Unsloth file: pinned sizes and SHA-256
+    for s in shards:                                   # the Unsloth files: pinned sizes and SHA-256
         if s.name in fam.get("sha256", {}):
             verify_sha256(s, *fam["sha256"][s.name])
     ok("model files present")
diff --git a/tools/strata_mcp.py b/tools/strata_mcp.py
index bfbb7b41689..6857715aefa 100644
--- a/tools/strata_mcp.py
+++ b/tools/strata_mcp.py
@@ -61,10 +61,11 @@
               "ram_gb": 32, "arena_gb": 23.4, "families": ("coder",)},
     "UD-Q4_K_XL": {"about": "4-bit (Unsloth Dynamic), EXPERIMENTAL: the best quality, but most experts come from the "
                             "SSD on a 64 GB PC (7-8.5 tokens/s measured)", "download_gb": 111.3, "ram_gb": 48,
-                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True},
-    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), EXPERIMENTAL: between IQ3_S and UD-Q4_K_XL; part of "
-                           "its experts come from the SSD on a 64 GB PC (not measured on NVIDIA yet)",
-                  "download_gb": 93.7, "ram_gb": 48, "arena_gb": 59.5, "families": ("unsloth",), "budget": True},
+                   "arena_gb": 77.0, "families": ("unsloth",), "budget": True, "experimental": True},
+    "UD-IQ4_XS": {"about": "~4-bit i-quant (Unsloth Dynamic), between IQ3_S and UD-Q4_K_XL in quality; on a PC with "
+                           "less than ~80 GB of RAM part of its experts are read from the SSD",
+                  "download_gb": 93.7, "ram_gb": 48, "arena_gb": 59.5, "families": ("unsloth",), "budget": True,
+                  "vision": True},
 }
 FALLBACK_FAMILIES = {
     "qwen": {"title": "Qwen3.8-Flash-Next", "about": "the original model", "tag": ""},
@@ -72,10 +73,10 @@
                                              "authors' numbers)", "tag": "swift-"},
     "coder": {"title": "Qwen3.8-Flash-Next Coder", "about": "half the experts (code, tools, images kept): needs ~32 GB "
                                                             "of RAM, faster; weaker outside coding", "tag": "coder-"},
-    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "about": "UD-Q4_K_XL (111 GB download) or UD-IQ4_XS (94 GB); "
-                                                                  "part of the experts read from the SSD: slower "
-                                                                  "(UD-Q4_K_XL: 7-8.5 tokens/s on a 64 GB PC)",
-                "tag": "unsloth-", "experimental": True, "vision": False},
+    "unsloth": {"title": "Qwen3.8-Flash-Next (Unsloth)", "about": "UD-IQ4_XS: a 94 GB download; with less than ~80 GB "
+                                                                  "of RAM part of its experts are read from the SSD "
+                                                                  "(UD-Q4_K_XL, 111 GB: experimental)",
+                "tag": "unsloth-", "vision": False},
 }
 FALLBACK_CONTEXTS = [8192, 32768, 65536, 131072, 262144, 393216, 524288]
 BENCH_PROMPT = ("Write a short story (about 300 words) about a lighthouse keeper who finds a message in a bottle. "
@@ -426,7 +427,9 @@ def tables(self):
 
     @staticmethod
     def sizes_of(models, family) -> list:
-        return [m for m in models if family in models[m].get("families", ("qwen", "swift"))]
+        """The family's sizes as setup lists them: an experimental one last (never the default)."""
+        return sorted((m for m in models if family in models[m].get("families", ("qwen", "swift"))),
+                      key=lambda m: bool(models[m].get("experimental")))
 
     # ---- paths
     def settings_path(self) -> Path:
@@ -709,17 +712,21 @@ def model_table(self, hw: dict | None) -> list:
                     verdict = "fits" if ram >= d["ram_gb"] else "tight" if ram >= d["ram_gb"] - 8 else "does not fit"
                     try:
                         if d.get("budget"):
-                            verdict = ("experimental: part of its experts in RAM, the rest read from the SSD"
+                            verdict = (("experimental: " if d.get("experimental") else "")
+                                       + "part of its experts in RAM, the rest read from the SSD"
                                        if ram >= d["ram_gb"] else "does not fit")
                         elif S and S.low_ram_needed(m, ram) and S.low_ram_fits(m, ram, vram):
                             verdict = "fits in the low-RAM mode (slower: the GPU holds part of the experts)"
                     except Exception:                   # noqa: BLE001
                         pass
                 sizes.append({"model": m, "about": d["about"], "download_gb": d["download_gb"],
+                              "experimental": bool(d.get("experimental")),
+                              "images": d.get("vision", fd.get("vision", True)) is not False,
                               "ram_needed_gb": d["ram_gb"], "experts_gb": d.get("arena_gb"),
                               "on_this_pc": verdict, "installed": tag in have, "id": tag})
             out.append({"family": f, "title": fd["title"], "about": fd.get("about"),
-                        "experimental": bool(fd.get("experimental")), "images": fd.get("vision", True) is not False,
+                        "experimental": bool(fd.get("experimental")),
+                        "images": any(x["images"] for x in sizes) if sizes else fd.get("vision", True) is not False,
                         "sizes": sizes})
         return out
 
@@ -935,7 +942,7 @@ def tool_defs(models: dict, families: dict, contexts: list) -> list:
          "annotations": ro},
         {"name": "strata_models", "title": "Strata models",
          "description": "The models and sizes Strata's setup offers (families: qwen = Qwen3.8-Flash-Next, swift = "
-                        "Swift 1.5, coder = the Coder, unsloth = experimental 4-bit), with download size, RAM needed, "
+                        "Swift 1.5, coder = the Coder, unsloth = Unsloth's ~4-bit), with download size, RAM needed, "
                         "whether each fits this PC, which are installed, the context lengths, and the recommendation. "
                         "Read-only.",
          "inputSchema": {"type": "object", "additionalProperties": False, "properties": {}},
@@ -952,7 +959,8 @@ def tool_defs(models: dict, families: dict, contexts: list) -> list:
              "family": {"type": "string", "enum": list(families),
                         "description": "qwen = Qwen3.8-Flash-Next (the original), swift = Swift 1.5 (thinks "
                                        "shorter), coder = the Coder (half the experts, ~32 GB RAM, for code), "
-                                       "unsloth = 4-bit EXPERIMENTAL (slow)"},
+                                       "unsloth = Unsloth's ~4-bit (UD-IQ4_XS; UD-Q4_K_XL is "
+                                       "experimental), part of the experts read from the SSD"},
              "model": {"type": "string", "enum": list(models),
                        "description": "the size (quantization): see strata_models"},
              "context": {"type": "integer", "enum": contexts,
@@ -1224,8 +1232,8 @@ def install_plan(self, family, model, context, vision, kv, gpu, gpus, backend, l
             context = 32768 if vram < 14 else 65536 if vram < 20 else 131072
             if models[model].get("budget"):
                 context = 8192 if vram < 14 else 32768
-        if vision in ("yes", "gpu", "cpu") and families[family].get("vision") is False:
-            raise ToolError(f"images are not available with {families[family]['title']} yet: use vision=no")
+        if vision in ("yes", "gpu", "cpu") and models[model].get("vision", families[family].get("vision")) is False:
+            raise ToolError(f"images are not available with {families[family]['title']} {model} yet: use vision=no")
         if vision is not None and backend == "hip" and vision != "no":
             raise ToolError("images are not available on the AMD backend yet: use vision=no")
         target = self.check_data_dir(data_dir) if data_dir else s.data_dir()
@@ -1266,7 +1274,7 @@ def install_plan(self, family, model, context, vision, kv, gpu, gpus, backend, l
                             "the options (finished steps are skipped)")
         if families[family].get("license"):
             plan["license"] = families[family]["license"]
-        if families[family].get("experimental"):
+        if families[family].get("experimental") or models[model].get("experimental"):
             plan["experimental"] = True
         return plan, args
 
diff --git a/tools/test_setup_choices.py b/tools/test_setup_choices.py
index 65a39dbf755..c706a6230ef 100644
--- a/tools/test_setup_choices.py
+++ b/tools/test_setup_choices.py
@@ -145,7 +145,7 @@ def test_the_size_of_another_family(self):
             code, out, _, _ = install(ram, found, ["--gguf-dir", d, "--family", "unsloth", "--model", "IQ3_XXS"])
         self.assertEqual(code, 1)
         self.assertIn("has no IQ3_XXS model file", out)
-        self.assertIn("choose one of: UD-Q4_K_XL, UD-IQ4_XS (or IQ3_XXS: --family qwen --model IQ3_XXS, --family swift --model "
+        self.assertIn("choose one of: UD-IQ4_XS, UD-Q4_K_XL (or IQ3_XXS: --family qwen --model IQ3_XXS, --family swift --model "
                       "IQ3_XXS)", out)
         self.assertIn("Strata runs ISTA-DASLab's GSQ-RCO files", out)
 
diff --git a/tools/test_setup_unsloth.py b/tools/test_setup_unsloth.py
index 895b3ab6be3..9b9d271d9f7 100644
--- a/tools/test_setup_unsloth.py
+++ b/tools/test_setup_unsloth.py
@@ -1,4 +1,5 @@
-"""Tests for setup.py's experimental Unsloth UD-Q4_K_XL choice (docs/UNSLOTH_Q4.md): the four pinned shards with
+"""Tests for setup.py's Unsloth choices (docs/UNSLOTH_Q4.md): UD-IQ4_XS (regular from 0.1.39) and the experimental
+UD-Q4_K_XL: the four pinned shards with
 their sizes and SHA-256, the RAM budget from the PC's RAM, the pack with --compat-bf16 (never experts.bin), the
 engine version it needs, one GPU, no images.  Mocked - no GPU, no downloads, nothing written outside a temp folder.
 
@@ -36,7 +37,8 @@ def test_the_four_shards(self):
         self.assertEqual(fam["hf"].format(q=M),
                          f"https://huggingface.co/unsloth/Qwen3.8-Flash-Next-GGUF/resolve/{REV}/UD-Q4_K_XL/")
         self.assertEqual(setup.MODELS[M]["families"], ("unsloth",))   # no other family lists it
-        self.assertTrue(fam["experimental"])
+        self.assertTrue(setup.MODELS[M]["experimental"])               # 0.1.39: per model, not the family
+        self.assertFalse(fam.get("experimental"))
         self.assertEqual(list(setup.FAMILIES)[0], "qwen")             # not the default choice
 
     def test_not_in_the_other_families(self):
@@ -139,7 +141,18 @@ def setUp(self):
     def tearDown(self):
         self.tmp.cleanup()
 
-    def main(self, argv, ram=63.7, version="0.1.32", n_gpus=1, model=True, amd=(), free=500.0, m=M):
+    def main(self, argv, ram=63.7, version="0.1.32", n_gpus=1, model=True, amd=(), free=500.0, m=M, answers=None,
+             family=True):
+        """answers: None = --yes; else {words of a question: its answer} (Enter for the others), and every question
+        asked is kept in self.asked.  family=False: no --family (the first menu is shown)."""
+        self.asked = []
+
+        def fake_input(prompt=""):
+            if answers is None:
+                raise AssertionError(f"asked {prompt!r}")
+            self.asked.append(prompt)
+            return next((v for k, v in answers.items() if k in prompt), "")
+
         eng = self.t / "engine"
         eng.mkdir(exist_ok=True)
         (eng / "BUILD.json").write_text(json.dumps({"version": version, "source": "local"}))
@@ -180,10 +193,11 @@ def fake_run(cmd, *a, **k):
             mock.patch.object(setup, "saved_calibration", lambda cfg: None),
             mock.patch.object(setup, "start", mock.Mock(side_effect=AssertionError("started"))),
             mock.patch.dict(sys.modules, {"gguf_reader": types.SimpleNamespace(GGUFFile=FakeGGUF)}),
-            mock.patch.object(sys, "argv", ["setup.py", "--family", "unsloth", *(["--model", m] if model else []),
-                                            "--yes", "--no-start",
+            mock.patch.object(sys, "argv", ["setup.py", *(["--family", "unsloth"] if family else []),
+                                            *(["--model", m] if model else []),
+                                            *(["--yes"] if answers is None else []), "--no-start",
                                             "--models-dir", str(self.t / "models"), *argv]),
-            mock.patch("builtins.input", mock.Mock(side_effect=AssertionError("asked"))),
+            mock.patch("builtins.input", fake_input),
         ]
         with contextlib.ExitStack() as st:
             for p in patches:
@@ -247,7 +261,7 @@ def test_too_little_ram(self):
         code, out, cfg = self.main(["--context", "8192"], ram=31.9, model=False)   # --yes alone: still a stop
         self.assertEqual(code, 1)
         self.assertIn("needs 48 GB of RAM or more", out)
-        self.assertIn("--model UD-Q4_K_XL --yes", out)                             # the way to insist
+        self.assertIn("--model UD-IQ4_XS --yes", out)       # the way to insist (0.1.39: the family's default size)
         self.assertEqual(self.downloads, [])
 
     def test_amd_is_asked_before_the_download(self):
@@ -255,7 +269,9 @@ def test_amd_is_asked_before_the_download(self):
         download, saying why; it is not refused outright (the owner's rule: --model with --yes goes on)."""
         r9700 = [{"index": 0, "name": "AMD Radeon AI PRO R9700", "vram_gb": 31.9, "arch": "gfx1201",
                   "driver": "amdgpu"}]
-        code, out, cfg = self.main(["--context", "8192", "--backend", "hip"], model=False, amd=r9700)
+        # chosen in the menu (2 = UD-Q4_K_XL, after the regular UD-IQ4_XS), not by --model: the answer is no
+        code, out, cfg = self.main(["--context", "8192", "--backend", "hip", "--vision", "no"], model=False,
+                                   amd=r9700, answers={"Which size": "2", "Try it anyway": "n"})
         self.assertEqual(code, 1, out)
         self.assertIn("has not been run on AMD cards yet", out)
         self.assertIn("--model UD-Q4_K_XL --yes", out)
@@ -366,8 +382,9 @@ def test_yes_alone_keeps_one_gpu(self):
 
 
 class IQ4XS(Base):
-    """#621 (EXPERIMENTAL): Unsloth's UD-IQ4_XS - three pinned shards, the same RAM-budget setup as UD-Q4_K_XL (the
-    pack with --compat-bf16, never experts.bin, one GPU, no images), engine 0.1.38 or newer, no AMD question."""
+    """#621: Unsloth's UD-IQ4_XS, a regular (not experimental) choice from 0.1.39 - three pinned shards, the same
+    RAM-budget setup as UD-Q4_K_XL (the pack with --compat-bf16, never experts.bin, one GPU), engine 0.1.38 or newer,
+    no AMD question; images are asked like the 2-3-bit models' (off by default)."""
 
     def test_pins(self):
         fam = setup.FAMILIES["unsloth"]
@@ -396,7 +413,7 @@ def test_budget(self):
     def test_install(self):
         code, out, cfg = self.main(["--context", "8192"], version="0.1.38", m=X)
         self.assertEqual(code, 0, out)
-        self.assertIn("EXPERIMENTAL", out)
+        self.assertNotIn("is EXPERIMENTAL", out)                               # (the menu still lists UD-Q4_K_XL)
         base = f"https://huggingface.co/unsloth/Qwen3.8-Flash-Next-GGUF/resolve/{REV}/UD-IQ4_XS/"
         self.assertEqual(self.downloads, [base + n for n in setup.UNSLOTH_IQ4_XS_SHARDS])
         self.assertEqual(self.verified, [(n, *v) for n, v in setup.UNSLOTH_IQ4_XS_SHARDS.items()])
@@ -411,12 +428,62 @@ def test_install(self):
         for flag in ("--ple-gguf", "--mmap-experts", "--resident-experts", "--vision"):
             self.assertNotIn(flag, args)
         self.assertEqual(cfg["model_name"], "qwen3.8-flash-next-unsloth-ud-iq4_xs")
+        pack = self.t / "data" / "packs" / "unsloth-ud-iq4_xs"                 # its own pack and tokenizer
+        self.assertEqual(packs[0][packs[0].index("--out") + 1], str(pack))
+        self.assertEqual(args[args.index("--pack") + 1], str(pack))
+        self.assertEqual(cfg["tokenizer"], str(pack / "tokenizer"))
+        self.assertNotIn("vision", cfg)                                        # images: asked, off by default
         with tempfile.TemporaryDirectory() as t:                               # a start reads the choice back
             p = Path(t) / "strata-unsloth-ud-iq4_xs.json"
             p.write_text(json.dumps(cfg))
             ch = setup.choices_from_config(p)
             self.assertEqual((ch["family"], ch["model"]), ("unsloth", X))
 
+    def test_family_default_and_menus(self):
+        """The first menu lists the Unsloth family without [experimental]; its size menu puts UD-IQ4_XS first (the
+        default, Enter) and UD-Q4_K_XL second, still marked EXPERIMENTAL; --model names are unchanged."""
+        code, out, cfg = self.main(["--context", "8192", "--vision", "no"], version="0.1.38", model=False,
+                                   family=False, answers={"Which model": "4"}, m=X)
+        self.assertEqual(code, 0, out)
+        fam_line = next(ln for ln in out.splitlines() if ln.startswith("  4) "))
+        self.assertIn("Qwen3.8-Flash-Next (Unsloth)", fam_line)
+        self.assertIn("UD-IQ4_XS: a 94 GB download", fam_line)
+        self.assertNotIn("[experimental]", out)
+        size_lines = [ln for ln in out.splitlines() if ln.startswith(("  1) UD-", "  2) UD-"))]
+        self.assertEqual(len(size_lines), 2, out)
+        self.assertTrue(size_lines[0].startswith("  1) UD-IQ4_XS ~4-bit"), size_lines[0])
+        self.assertNotIn("EXPERIMENTAL", size_lines[0])
+        self.assertTrue(size_lines[1].startswith("  2) UD-Q4_K_XL 4-bit"), size_lines[1])
+        self.assertIn("EXPERIMENTAL", size_lines[1])
+        self.assertTrue(any("Which size" in q and "[1]" in q for q in self.asked), self.asked)
+        self.assertEqual(cfg["model_name"], "qwen3.8-flash-next-unsloth-ud-iq4_xs")
+        code, out, cfg = self.main(["--context", "8192"], version="0.1.38", model=False, m=X)   # --yes: same default
+        self.assertEqual(code, 0, out)
+        self.assertEqual(cfg["model_name"], "qwen3.8-flash-next-unsloth-ud-iq4_xs")
+        for m, name in ((M, "qwen3.8-flash-next-unsloth-ud-q4_k_xl"), (X, "qwen3.8-flash-next-unsloth-ud-iq4_xs")):
+            code, out, cfg = self.main(["--context", "8192"], version="0.1.38", m=m)        # --model by name
+            self.assertEqual((code, cfg["model_name"]), (0, name), out)
+
+    def test_images(self):
+        """Images on: the original model's image encoder (the same base model), the vision flags in the config."""
+        code, out, cfg = self.main(["--context", "8192", "--vision", "yes"], version="0.1.38", m=X)
+        self.assertEqual(code, 0, out)
+        self.assertNotIn("images are not available", out)
+        self.assertIn("images: on", out)
+        self.assertEqual(self.downloads[-1], setup.hf("ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF")
+                         + "mmproj-Qwen3.8-Flash-Next-BF16.gguf")
+        self.assertIn("--vision", cfg["args"])
+        self.assertTrue(cfg["vision"]["model"].endswith("UD-IQ4_XS-00001-of-00003.gguf"))
+        self.assertIn("--resident-budget-gib", cfg["args"])
+
+    def test_check_verdict(self):
+        code, out, _ = self.main(["--check"], m=X)
+        self.assertEqual(code, 0, out)
+        line = next(ln for ln in out.splitlines() if ln.strip().startswith(X))
+        self.assertIn("fits with 40 GiB of its experts in RAM", line)
+        self.assertNotIn("EXPERIMENTAL", line)
+        self.assertIn("EXPERIMENTAL", next(ln for ln in out.splitlines() if ln.strip().startswith(M)))
+
     def test_engine_0138(self):
         code, out, cfg = self.main(["--context", "8192"], version="0.1.37", m=X)
         self.assertEqual(code, 1)
diff --git a/tools/test_strata_mcp.py b/tools/test_strata_mcp.py
index 051380501c9..bacffb78044 100644
--- a/tools/test_strata_mcp.py
+++ b/tools/test_strata_mcp.py
@@ -300,7 +300,8 @@ def test_install_arguments(self):
         self.assertRejected("strata_install", {"backend": "rocm"}, "backend must be one of")
         self.assertRejected("strata_install", {"command": "setup.py --build"}, "unknown argument")
         self.assertRejected("strata_install", {"family": "swift", "model": "IQ3_S"}, "has no IQ3_S")
-        self.assertRejected("strata_install", {"family": "unsloth", "vision": "yes"}, "images are not available")
+        self.assertRejected("strata_install", {"family": "unsloth", "model": "UD-Q4_K_XL", "vision": "yes"},
+                            "images are not available")
         self.assertRejected("strata_install", {"vision": "yes\nrm"}, "control characters")
 
     def test_data_dir_paths(self):
@@ -545,12 +546,31 @@ def test_builtin_table_matches_setup(self):
         for m, d in S.MODELS.items():
             for k in ("download_gb", "ram_gb", "arena_gb"):
                 self.assertEqual(d[k], M.FALLBACK_MODELS[m][k], f"{m} {k}")
+            for k in ("experimental", "vision"):
+                self.assertEqual(d.get(k), M.FALLBACK_MODELS[m].get(k), f"{m} {k}")
             self.assertEqual(d.get("families", ("qwen", "swift")), M.FALLBACK_MODELS[m].get("families", ("qwen", "swift")))
         self.assertEqual(list(S.FAMILIES), list(M.FALLBACK_FAMILIES))
         for f, d in S.FAMILIES.items():
             self.assertEqual(d["tag"], M.FALLBACK_FAMILIES[f]["tag"])
         self.assertEqual(list(S.CONTEXTS), M.FALLBACK_CONTEXTS)
 
+    def test_unsloth_sizes(self):
+        """0.1.39: UD-IQ4_XS is a regular size, listed first (the family's default); UD-Q4_K_XL stays experimental."""
+        s = M.Strata(HERE.parent)
+        for models in (s.tables()[0], M.FALLBACK_MODELS):
+            self.assertEqual(s.sizes_of(models, "unsloth"), ["UD-IQ4_XS", "UD-Q4_K_XL"])
+            self.assertFalse(models["UD-IQ4_XS"].get("experimental"))
+            self.assertTrue(models["UD-Q4_K_XL"].get("experimental"))
+        self.assertEqual(s.sizes_of(M.FALLBACK_MODELS, "qwen"), ["Q2_0", "IQ2_XS", "IQ3_XXS", "IQ3_S"])
+        fam = next(f for f in s.model_table({"ram_gb": 63.7, "gpus": []}) if f["family"] == "unsloth")
+        self.assertFalse(fam["experimental"])
+        self.assertTrue(fam["images"])
+        by = {x["model"]: x for x in fam["sizes"]}
+        self.assertEqual((by["UD-IQ4_XS"]["experimental"], by["UD-IQ4_XS"]["images"]), (False, True))
+        self.assertEqual((by["UD-Q4_K_XL"]["experimental"], by["UD-Q4_K_XL"]["images"]), (True, False))
+        self.assertFalse(by["UD-IQ4_XS"]["on_this_pc"].startswith("experimental"))
+        self.assertTrue(by["UD-Q4_K_XL"]["on_this_pc"].startswith("experimental"))
+
     def test_recommendation_follows_ram(self):
         s = M.Strata(HERE.parent)
         gpu = [{"index": 0, "name": "x", "vram_gb": 24.0, "usable": True, "vendor": "nvidia"}]

From 6f32ec070f23ced9f50e704d854d775da52591ab Mon Sep 17 00:00:00 2001
From: Niko1221 <Niko1221@users.noreply.github.com>
Date: Sun, 4 Oct 2026 14:16:36 +0200
Subject: [PATCH 198/201] setup: a tip (not a change) for images on a 12 GB
 card: --vram-reserve-mib 1000 if a request stalls

With the image encoder on the GPU, the 700 MiB reserve can leave ~200 MiB free on a 12 GB card (UD-IQ4_XS
end-to-end check on an RTX 5070). Setup prints a one-line recommendation; the written config is unchanged.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01QJJwUv9g3cD2ztX6KWS8rk
---
 setup.py | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/setup.py b/setup.py
index d615996f514..80d1fba57ca 100644
--- a/setup.py
+++ b/setup.py
@@ -220,6 +220,7 @@ def hf_unpinned(url: str) -> str:
 ESP_VECTOR = ROOT / "data" / "experimental-speed-projection" / "Qwen3.8-Flash-Next-experimental-speed-projection.gguf"
 # the image encoder on the GPU (~1.2 GB at 1024 image tokens) warms up before the engine starts, so the engine
 # sizes its expert slots around it and the default reserve (700 MiB) is enough; engines before 0.1.2 need more
+VISION_GPU_SMALL_RESERVE_MIB = 1000    # the tip for images on a <= 12 GB card (the engine's LOW line asked ~1003)
 VISION = {"gpu": {"max_tokens": 1024, "reserve_mib": 700},
           "cpu": {"max_tokens": 300, "reserve_mib": 700}}
 EXE = "strata.exe" if WIN else "strata"
@@ -4293,6 +4294,10 @@ def main() -> int:
         args += ["--resident-budget-gib", f"{budget:g}"]   # GiB kept in RAM (#498: a layer split has no budget)
     if vision != "none":
         args += ["--vision", "--vram-reserve-mib", str(VISION[vision]["reserve_mib"])]
+        if vision == "gpu" and a.vram_reserve_mib is None and 0 < gpu.get("vram_gb", 0.0) <= 12.5:
+            # a tip only (recommend, never force): on a 12 GB card the encoder's 700 MiB can leave ~200 MiB free
+            print(f"  tip: images on a {gpu['vram_gb']:.0f} GB card can leave little VRAM free; if a request stalls, "
+                  f"run setup again with --vram-reserve-mib {VISION_GPU_SMALL_RESERVE_MIB}")
     if a.vram_reserve_mib is not None:                 # #493: VRAM left free for other programs (only when given)
         if "--vram-reserve-mib" in args:
             i = args.index("--vram-reserve-mib") + 1

From d51d7e9cbc327f90c2fd59b1e20a949033f594e2 Mon Sep 17 00:00:00 2001
From: Go <rhgo1749@naver.com>
Date: Mon, 5 Oct 2026 09:09:28 +0900
Subject: [PATCH 199/201] docs: record validated upstream 0.1.39 sync candidate

---
 docs/DECISIONS.md               |  2 +-
 docs/multigpu-roadmap.md        |  4 ++--
 docs/multigpu-shared-runtime.md | 12 +++++++++++-
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/docs/DECISIONS.md b/docs/DECISIONS.md
index e6f33e4025a..da4635a2a79 100644
--- a/docs/DECISIONS.md
+++ b/docs/DECISIONS.md
@@ -79,7 +79,7 @@ The current canonical multi-GPU documents are:
 
 Concrete reference-host hardware, tuning values, benchmark numbers, and production validation records intentionally live in the separate public recipe repository: [`rhgo1749/qwen3.8-flash-next-strata-gpu-per-lane-recipe`](https://github.com/rhgo1749/qwen3.8-flash-next-strata-gpu-per-lane-recipe).
 
-The production baseline remains independent GPU lanes with a shared host expert arena. The current promoted engine generation is **Strata 0.1.38**, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The 0.1.38 sync preserves the Phase 1/2 serving-control contract and the Phase 3 leader/follower shared-arena lifecycle while absorbing upstream 0.1.35-0.1.38 prompt/decode, reliability, telemetry/security, expert-profile persistence, unbuffered loading, and optional peer-tier work. Ordinary lanes explicitly strip inherited engine-internal multi-GPU flags and shared `--expert-profile-save` writers so only a future explicit Super-Lane/profile-ownership contract can re-enable them. The bounded compatibility gate passed the full Python serving suite (256 tests, 7 skipped), a CUDA 13.4 sm_120 Release `strata` build, focused shared-arena/profile source CTests, and a live three-lane shared-arena generation smoke. A matched single-lane compatibility A/B against the still-installed 0.1.31 production binary showed higher long-prompt prefill on 0.1.38 at roughly +9.5% for ~15K tokens and +7.3% for ~30K tokens; this is a bounded sync check, not a replacement for the retained full 0.1.30/0.1.31 campaigns. Upstream layer-split/peer execution remains complementary to the fork's independent request/session lanes. Hardware-specific measurements and caveats live in the public recipe repository.
+The production baseline remains independent GPU lanes with a shared host expert arena. The current promoted engine generation is **Strata 0.1.38**, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The next sync candidate is **Strata 0.1.39**, merged on `sync/upstream-0.1.39` at `3727c6bdfb12ba2ffc07402b68ae86c0ed2ac27f` from upstream `6f32ec070f23ced9f50e704d854d775da52591ab`; it is validated but not promoted until main moves. The candidate preserves the Phase 1/2 serving-control contract and the Phase 3 leader/follower shared-arena lifecycle while consuming upstream 0.1.39 batching, Responses API, conversation-cache telemetry, decode/kernel, CPU-pool, expert-cache and low-RAM/file-tier work. Ordinary lanes explicitly strip inherited engine-internal multi-GPU flags plus `parallel` / `--batch` / `--slots` / `--batch-groups` / `--trim-stage-weights`, and shared `--expert-profile-save` writers, so only future explicit contracts can re-enable nested execution. The 0.1.39 bounded gate passed the full Python serving suite (**333 tests, 7 skipped**), fresh CUDA 13.4 sm_120 Release builds with tests both off and on, focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests, a live single-lane model smoke, and a live three-lane shared-arena concurrent-generation smoke; follower lanes logged that the shared population was ready and skipped the repeated source expert load. The earlier 0.1.38 matched long-prompt compatibility A/B against the installed 0.1.31 binary remains historical evidence at roughly +9.5% for ~15K tokens and +7.3% for ~30K tokens; it is not relabeled as 0.1.39 performance evidence. Upstream layer-split/peer/batch execution remains complementary to the fork's independent request/session lanes. Hardware-specific measurements and caveats live in the public recipe repository.
 
 ## Template for a decision-bearing Issue
 
diff --git a/docs/multigpu-roadmap.md b/docs/multigpu-roadmap.md
index 749b251e87a..e3c1e641501 100644
--- a/docs/multigpu-roadmap.md
+++ b/docs/multigpu-roadmap.md
@@ -6,7 +6,7 @@ Roadmap authority is GitHub Issue #1 and its child Issues. This document summari
 
 ## Current production baseline
 
-The current promoted engine generation is **Strata 0.1.38** in this fork, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The 0.1.38 compatibility gate preserves the independent-lane architecture while consuming upstream prompt/decode, reliability, security/status, profile-persistence, unbuffered-load, and optional peer-tier primitives. Upstream layer-split/peer execution remains a challenger/backend primitive rather than a replacement for request-level lanes.
+The current promoted engine generation is **Strata 0.1.38** in this fork, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. A **validated 0.1.39 sync candidate** exists on `sync/upstream-0.1.39` at `3727c6bdfb12ba2ffc07402b68ae86c0ed2ac27f`, merging upstream `6f32ec070f23ced9f50e704d854d775da52591ab`; it is not promoted until main moves. The candidate preserves the independent-lane architecture while consuming upstream batching, Responses API, conversation-cache telemetry, decode/kernel, CPU-pool, expert-cache, low-RAM/file-tier, and layer-split improvements. Ordinary lanes strip inherited upstream internal batching just as they already strip inherited layer-split/peer execution, so those mechanisms remain explicit challenger/backend primitives rather than accidental replacements for request-level lanes.
 
 The architectural baseline is:
 
@@ -247,7 +247,7 @@ Until measurements justify them, this roadmap does **not** assume that Strata sh
 
 ## Near-term order
 
-1. Keep the completed Phase 1/2 serving-control and Phase 3 lifecycle gates as regression controls on the promoted 0.1.38 software baseline; retain the measured 0.1.30/0.1.31 evidence under its original engine generation.
+1. Keep the completed Phase 1/2 serving-control and Phase 3 lifecycle gates as regression controls on the promoted 0.1.38 software baseline. The validated 0.1.39 sync candidate has passed the bounded compatibility gate and should remain a candidate until explicitly promoted; retain measured 0.1.30/0.1.31/0.1.38 evidence under its original engine generation.
 2. Do not add another mandatory serving phase without a measured residual.
 3. Keep the completed decode-assist and static `2+1` measurements as **0.1.38 evidence-negative / deferred challengers**, not permanent rejections. Do not repeat the same reference-host sweeps without a material upstream, hardware, or workload change.
 4. Reopen decode assist or static Super-Lane with the smallest staged smoke that can show the crossover moved; only then repeat broader concurrency or lifecycle campaigns. Elastic Super-Lane remains gated on a successful future static crossover; cross-lane migration stays later.
diff --git a/docs/multigpu-shared-runtime.md b/docs/multigpu-shared-runtime.md
index 18c1cae1948..b3083d32b6a 100644
--- a/docs/multigpu-shared-runtime.md
+++ b/docs/multigpu-shared-runtime.md
@@ -17,7 +17,7 @@ Detailed reference-host hardware, tuning values, benchmark tables, and validatio
 
 ## Shared arena
 
-Strata 0.1.38 retains the file-backed arena primitive introduced upstream in 0.1.30 through `--shared-expert-arena FILE` (originating from this fork's upstream PR #129). On Linux, upstream `PinnedArena` maps one shared file with a 4 KiB header containing the arena geometry and pack fingerprint; incompatible size or pack identity is refused before the arena is used. The ordinary anonymous/hugetlb path remains unchanged when the option is absent. The Linux whole-arena pinning behavior used by the lane runtime remains intact; the WDDM shared-memory cap is Windows-specific unless explicitly overridden with `STRATA_ARENA_PIN_GIB`.
+The validated Strata 0.1.39 sync candidate retains the file-backed arena primitive introduced upstream in 0.1.30 through `--shared-expert-arena FILE` (originating from this fork's upstream PR #129). On Linux, upstream `PinnedArena` maps one shared file with a 4 KiB header containing the arena geometry and pack fingerprint; incompatible size or pack identity is refused before the arena is used. The ordinary anonymous/hugetlb path remains unchanged when the option is absent. The Linux whole-arena pinning behavior used by the lane runtime remains intact; the WDDM shared-memory cap is Windows-specific unless explicitly overridden with `STRATA_ARENA_PIN_GIB`.
 
 The lane supervisor composes that upstream primitive rather than intercepting `mmap`: it strips inherited shared-arena options, adds the same explicit `--shared-expert-arena` path to every shared lane, and removes the option entirely for the private-arena benchmark arm. The default backing lives under `/dev/shm`, matching upstream's tmpfs contract; an explicit `--arena-file` selects an operator-managed path. Automatically chosen backing files are removed on graceful supervisor exit, while explicit backing-file lifetime remains operator-owned.
 
@@ -76,6 +76,16 @@ The proxy also exposes `X-Strata-Lane-Index`, `X-Strata-Admission-Rank`, `X-Stra
 
 `balanced-additive-new-prefill-retained-state-proxy-v1` is the promoted Phase-2B default, while `safe-affinity-live-state-v1` remains an explicit rollback control; either may run without persistent benchmark tracing. Other placement policies remain experimental and require `--bench-trace-jsonl` when selected through `--bench-scheduler-policy`. All policies preserve existing-session affinity, health/capability filtering, one active generation per lane, affinity reservations, vision reservation and compatible FIFO ordering; they can only choose differently among idle lanes for a new session. The trace retains the historical `placement_key` / `selected_placement_key` fields for compatibility and adds the active `placement_score` / `selected_placement_score`, policy name, scope and proxy source. Policies that use the last completed request byte footprint say `retained-state-proxy` in their names and report `retained_last_completed_request_bytes_v1`; this is routing-state evidence, not engine-truth active load or compute cost. The promoted balanced-additive policy orders new-session candidates first by remembered affinity-session count and then by additive estimated new-prefill plus retained-state cost. Persistent-supervisor validation on the reference host kept all six measured waves at 2/2/2 session placement across two independent campaigns, while the safe and unbalanced additive controls each developed 6-to-1 concentration on later waves; exact measurements are retained in the public recipe repository.
 
+## Validated 0.1.39 sync candidate
+
+The `sync/upstream-0.1.39` branch merges upstream Strata **0.1.39** (`6f32ec070f23ced9f50e704d854d775da52591ab`) into the fork at merge commit `3727c6bdfb12ba2ffc07402b68ae86c0ed2ac27f`. Main remains on the promoted 0.1.38 baseline until an explicit promotion.
+
+The candidate keeps one ordinary whole-GPU engine per lane. Because upstream 0.1.39 adds engine-internal request batching and layer-split batch groups, the supervisor removes inherited top-level `parallel` and CLI `--batch`, `--slots`, `--batch-groups`, and `--trim-stage-weights` from ordinary lane configs, in addition to the existing layer-split/peer stripping. This prevents a copied upstream config from silently changing the Lanes concurrency unit from one request/session per independent engine into nested batching. A future hybrid-lane experiment must opt into that coupling explicitly.
+
+The supervisor also treats `/v1/responses` as generation work so the OpenAI Responses API follows the same admission, busy-lane exclusion, and lane selection path as Chat Completions and Anthropic Messages. Parking telemetry no longer extends the engine `DONE` record in this sync; upstream 0.1.39's native conversation-cache monitor owns that field space, avoiding the former semantic collision with upstream's appended offloaded-expert counter.
+
+The bounded 0.1.39 compatibility gate passed **333 Python serving tests with 7 skipped**, a fresh **CUDA 13.4 sm_120 Release `strata` build** with `STRATA_BUILD_TESTS=OFF`, a second fresh Release build with `STRATA_BUILD_TESTS=ON` that linked the full `strata` executable, and focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests. A live IQ3_XXS single-lane smoke generated successfully on GPU 0. A live three-lane 32K compatibility smoke then routed three simultaneous requests one each to GPUs 0/1/2; lane 0 populated the ~39.97 GiB shared expert arena once, while lanes 1 and 2 reported `shared population ready; source load skipped`. These are promotion/compatibility checks, not a new performance campaign.
+
 ## Current promoted engine baseline
 
 The shared-lane runtime is based on upstream Strata **0.1.38**, integrated from upstream commit `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The 3-lane reference contract remains one engine per GPU, 262144 context and 32768 resident KV per lane, disjoint CPU partitions, asymmetric per-lane PCIe tuning, and one upstream-native shared expert arena.

From 7908df12add176f7ca679ec05a1f46ed1a8a9d91 Mon Sep 17 00:00:00 2001
From: Go <rhgo1749@naver.com>
Date: Mon, 5 Oct 2026 12:21:30 +0900
Subject: [PATCH 200/201] docs: record 0.1.39 topology crossover evidence

---
 docs/DECISIONS.md                             |   2 +
 docs/multigpu-roadmap.md                      |   6 +-
 docs/multigpu-shared-runtime.md               |   2 +
 ...a-0.1.39-performance-crossover-20261005.md | 150 ++++++++++++++++++
 4 files changed, 157 insertions(+), 3 deletions(-)
 create mode 100644 docs/strata-0.1.39-performance-crossover-20261005.md

diff --git a/docs/DECISIONS.md b/docs/DECISIONS.md
index da4635a2a79..f80adc07e5c 100644
--- a/docs/DECISIONS.md
+++ b/docs/DECISIONS.md
@@ -81,6 +81,8 @@ Concrete reference-host hardware, tuning values, benchmark numbers, and producti
 
 The production baseline remains independent GPU lanes with a shared host expert arena. The current promoted engine generation is **Strata 0.1.38**, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The next sync candidate is **Strata 0.1.39**, merged on `sync/upstream-0.1.39` at `3727c6bdfb12ba2ffc07402b68ae86c0ed2ac27f` from upstream `6f32ec070f23ced9f50e704d854d775da52591ab`; it is validated but not promoted until main moves. The candidate preserves the Phase 1/2 serving-control contract and the Phase 3 leader/follower shared-arena lifecycle while consuming upstream 0.1.39 batching, Responses API, conversation-cache telemetry, decode/kernel, CPU-pool, expert-cache and low-RAM/file-tier work. Ordinary lanes explicitly strip inherited engine-internal multi-GPU flags plus `parallel` / `--batch` / `--slots` / `--batch-groups` / `--trim-stage-weights`, and shared `--expert-profile-save` writers, so only future explicit contracts can re-enable nested execution. The 0.1.39 bounded gate passed the full Python serving suite (**333 tests, 7 skipped**), fresh CUDA 13.4 sm_120 Release builds with tests both off and on, focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests, a live single-lane model smoke, and a live three-lane shared-arena concurrent-generation smoke; follower lanes logged that the shared population was ready and skipped the repeated source expert load. The earlier 0.1.38 matched long-prompt compatibility A/B against the installed 0.1.31 binary remains historical evidence at roughly +9.5% for ~15K tokens and +7.3% for ~30K tokens; it is not relabeled as 0.1.39 performance evidence. Upstream layer-split/peer/batch execution remains complementary to the fork's independent request/session lanes. Hardware-specific measurements and caveats live in the public recipe repository.
 
+The 2026-10-05 reference-host performance recheck changes one challenger conclusion without changing the promoted topology. On the 0.1.39 candidate, three independent lanes measured **192.16 ± 4.11 tok/s** common-wall aggregate TG for three fixed 512-token reasoning requests. The ordinary layer-split FIFO path is only a serial control (**118.75 ± 5.98 tok/s**), while upstream 0.1.39's explicit three-stage pipeline (`--layer-split 18,34 --batch 3 --batch-groups 3 --trim-stage-weights`, shared expert arena) reached **209.66 ± 4.02 tok/s**, **9.1% above** the independent-lane arm in that fixed decode region. Cold-prefill A/Bs show a workload-length crossover rather than a universal winner: at ~15K x3, independent lanes reached **5901.34 ± 55.16 tok/s** versus **3289.19 ± 18.83** for the pipelined split; at ~110K x3, the pipelined split reached **6028.09 ± 14.50** versus **5822.71 ± 4.49** for lanes. Every retained PP request reported `cache_n=0`. The medium/long PP nonce text is contract-matched rather than byte-identical across arms. This evidence reopens static layer-split/Super-Lane work as a measured workload-dependent challenger, but does not promote it over independent lanes or justify automatic topology changes. See `docs/strata-0.1.39-performance-crossover-20261005.md`.
+
 ## Template for a decision-bearing Issue
 
 ```markdown
diff --git a/docs/multigpu-roadmap.md b/docs/multigpu-roadmap.md
index e3c1e641501..fc099ea6242 100644
--- a/docs/multigpu-roadmap.md
+++ b/docs/multigpu-roadmap.md
@@ -156,7 +156,7 @@ Measure the crossover rather than assuming aggregation wins: single-request TTFT
 
 Do **not** begin with dynamic GPU bonding. Reopen bond/unbond policy only if the static `1+1+1` versus `2+1` experiment demonstrates a repeatable workload-dependent crossover large enough to justify topology changes. Any dynamic version must retain a clean independent-lane fallback and must not migrate an active session merely to rebalance GPUs.
 
-**Current status on Strata 0.1.38 / the reference host: deferred, evidence-negative as an always-on topology, but intentionally left open.** The matched static probe preserved the known single-request benefit (~99 tok/s for the two-GPU Super-Lane versus ~68 tok/s for an ordinary lane), but `2+1` did not establish a useful M=2 aggregate advantage and regressed M=3 aggregate goodput by about 15% versus `1+1+1`. This does not reject upstream layer split as a primitive. Reopen with a short single-request smoke, then M=2, then M=3 only if upstream materially improves layer-split decode/prefill, handoff/staging, split-auto placement, queueing/FIFO behavior, or another relevant execution path enough to move the crossover.
+**Current status on the Strata 0.1.39 sync candidate / reference host: reopened, with a measured workload-dependent crossover; not promoted as an always-on topology.** Upstream 0.1.39 materially changed the challenger by adding batch slots, layer-split pipeline groups, and stage-weight trimming. The ordinary FIFO layer-split path remains only a serial control (**118.75 ± 5.98 tok/s** for three fixed requests), but an explicit three-stage `18,34` split with `--batch 3 --batch-groups 3 --trim-stage-weights` and the shared expert arena reached **209.66 ± 4.02 tok/s**, versus **192.16 ± 4.11 tok/s** for `1+1+1` independent lanes in the matched fixed decode region. Cold-prefill results cross by length: ~15K x3 strongly favors lanes (**5901.34 vs 3289.19 tok/s**), while ~110K x3 narrowly favors the pipelined split (**6028.09 vs 5822.71 tok/s**). The PP arms are cold/no-reuse (`cache_n=0`) but workload/length matched rather than byte-identical because the nonce text encodes the arm. This reopens static Super-Lane/topology work, but the correct next gate is mixed prompt/output lengths, queue/tail behavior, failure-domain cost and reconfiguration overhead—not automatic bonding. Full evidence: [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
 
 ### Elastic Super-Lane lifecycle
 
@@ -249,8 +249,8 @@ Until measurements justify them, this roadmap does **not** assume that Strata sh
 
 1. Keep the completed Phase 1/2 serving-control and Phase 3 lifecycle gates as regression controls on the promoted 0.1.38 software baseline. The validated 0.1.39 sync candidate has passed the bounded compatibility gate and should remain a candidate until explicitly promoted; retain measured 0.1.30/0.1.31/0.1.38 evidence under its original engine generation.
 2. Do not add another mandatory serving phase without a measured residual.
-3. Keep the completed decode-assist and static `2+1` measurements as **0.1.38 evidence-negative / deferred challengers**, not permanent rejections. Do not repeat the same reference-host sweeps without a material upstream, hardware, or workload change.
-4. Reopen decode assist or static Super-Lane with the smallest staged smoke that can show the crossover moved; only then repeat broader concurrency or lifecycle campaigns. Elastic Super-Lane remains gated on a successful future static crossover; cross-lane migration stays later.
+3. Keep decode assist as **0.1.38 evidence-negative / deferred**, but treat static layer split / Super-Lane as **reopened on 0.1.39** because the measured batch-group pipeline now crosses independent lanes in some decode and very-long-prefill regions. Do not collapse the result into a universal winner claim.
+4. Before any topology promotion, test mixed prompt/output lengths, queue/tail behavior, power, failure-domain cost and the drain/reconfigure/restore lifecycle against the independent-lane fallback. Elastic Super-Lane remains gated on this broader static crossover holding after reconfiguration cost; cross-lane migration stays later.
 5. Treat upstream helper, peer, layer-split and load/unload controls as distinct execution/lifecycle primitives: helper offload is valid without P2P, peer execution is deferred on hardware without a validated P2P path, and neither automatically replaces independent lanes.
 
 The default bias remains deliberate simplicity: add coupling only when measurements show it buys something.
diff --git a/docs/multigpu-shared-runtime.md b/docs/multigpu-shared-runtime.md
index b3083d32b6a..cdde3f2e129 100644
--- a/docs/multigpu-shared-runtime.md
+++ b/docs/multigpu-shared-runtime.md
@@ -86,6 +86,8 @@ The supervisor also treats `/v1/responses` as generation work so the OpenAI Resp
 
 The bounded 0.1.39 compatibility gate passed **333 Python serving tests with 7 skipped**, a fresh **CUDA 13.4 sm_120 Release `strata` build** with `STRATA_BUILD_TESTS=OFF`, a second fresh Release build with `STRATA_BUILD_TESTS=ON` that linked the full `strata` executable, and focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests. A live IQ3_XXS single-lane smoke generated successfully on GPU 0. A live three-lane 32K compatibility smoke then routed three simultaneous requests one each to GPUs 0/1/2; lane 0 populated the ~39.97 GiB shared expert arena once, while lanes 1 and 2 reported `shared population ready; source load skipped`. These are promotion/compatibility checks, not a new performance campaign.
 
+A later bounded reference-host performance campaign did exercise the 0.1.39 execution challengers explicitly. Ordinary lanes still strip nested batch/layer-split flags by default, but a separate upstream-native three-GPU layer-split challenger using explicit split `18,34`, `--batch 3 --batch-groups 3 --trim-stage-weights`, and the same shared expert backing measured **209.66 ± 4.02 tok/s** common-wall aggregate TG for three fixed 512-token reasoning requests, versus **192.16 ± 4.11 tok/s** for three independent lanes. Cold-prefill results crossed by workload length: lanes led strongly at ~15K x3 (**5901.34 vs 3289.19 tok/s**), while the pipelined split narrowly led at ~110K x3 (**6028.09 vs 5822.71 tok/s**). This is challenger evidence, not a change to the ordinary lane contract; details and caveats are in [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
+
 ## Current promoted engine baseline
 
 The shared-lane runtime is based on upstream Strata **0.1.38**, integrated from upstream commit `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The 3-lane reference contract remains one engine per GPU, 262144 context and 32768 resident KV per lane, disjoint CPU partitions, asymmetric per-lane PCIe tuning, and one upstream-native shared expert arena.
diff --git a/docs/strata-0.1.39-performance-crossover-20261005.md b/docs/strata-0.1.39-performance-crossover-20261005.md
new file mode 100644
index 00000000000..964e9a95d42
--- /dev/null
+++ b/docs/strata-0.1.39-performance-crossover-20261005.md
@@ -0,0 +1,150 @@
+# Strata 0.1.39 performance crossover evidence — 2026-10-05
+
+## Scope and provenance
+
+This record belongs to the validated but not-yet-promoted Strata 0.1.39 sync candidate on `sync/upstream-0.1.39`.
+
+```text
+fork branch         sync/upstream-0.1.39
+fork candidate      d51d7e9cbc327f90c2fd59b1e20a949033f594e2
+upstream Strata     6f32ec070f23ced9f50e704d854d775da52591ab (v0.1.39)
+engine              Strata 0.1.39
+model/quant         Qwen3.8-Flash-Next GSQ-RCO IQ3_S
+host                Ryzen 9 9950X3D / 128 GB DDR5
+primary GPUs        RTX 5070 Ti 16 GB x3
+driver/CUDA         615.71.09 / CUDA 13.4
+context             262144 per independent lane unless noted
+resident KV         32768 per independent lane unless noted
+sampling            temperature=0, seed=1234
+```
+
+The 0.1.39 campaign reused the public recipe workload generator and current server/frontend. The fixed ~1.5K reasoning prompt used for scaling and decode has hash `429fe691f25560a1` and currently tokenizes to 1469 tokens. The retained 0.1.38 recipe recorded 1456 tokens for its earlier frontend path, so cross-version percentage comparisons are contract-matched rather than byte-identical. Within the 0.1.39 fixed-prompt TG challenger comparison, the independent-lane and layer-split arms use the same 1469-token prompt contract.
+
+## Independent-lane scaling
+
+Five retained repetitions per point:
+
+| Active lanes | Common-wall aggregate TG |
+| ---: | ---: |
+| 1 | **73.63 ± 1.67 tok/s** |
+| 2 | **143.19 ± 3.06 tok/s** |
+| 3 | **192.16 ± 4.11 tok/s** |
+
+The 3-lane result is 2.610x the one-lane result (87.0% scaling efficiency). Corrected mixed fiction/coding/reasoning serving measured **189.25 ± 5.07 tok/s** over nine retained runs.
+
+## Workload sensitivity
+
+Cold PP remained essentially flat versus the 0.1.38 campaign for the ~15K medium workloads, while warm decode generally improved. Retained 0.1.39 values include:
+
+| Workload | Cold PP | Warm TG |
+| --- | ---: | ---: |
+| fiction short | 878.6 tok/s | 72.28 tok/s |
+| coding short | 840.6 tok/s | 85.70 tok/s |
+| reasoning short | 872.2 tok/s | 79.24 tok/s |
+| fiction medium | 2799.1 tok/s | 69.22 tok/s |
+| coding medium | 2791.5 tok/s | 83.84 tok/s |
+| reasoning medium | 2803.4 tok/s | 70.48 tok/s |
+| long_review ~110K | 2719.0 tok/s | 66.20 tok/s |
+
+The long-review cold PP mean is **2719.02 ± 1.12 tok/s**. Warm decode at ~110K is slightly below the retained 0.1.38 mean, so this campaign does not claim a universal decode speedup.
+
+## Oversubscription
+
+| Requests | Aggregate TG |
+| ---: | ---: |
+| 3 | **190.26 ± 3.07 tok/s** |
+| 4 | **141.55 ± 0.90 tok/s** |
+| 6 | **191.06 ± 2.67 tok/s** |
+| 9 | **191.86 ± 1.52 tok/s** |
+
+The partial-second-wave M=4 trough remains. Queue-tail behavior still follows the multi-wave structure rather than turning into an unlimited continuous-batching claim for ordinary lanes.
+
+## Heterogeneous isolation
+
+Retained RTX 5070 Ti + RTX 5060 Ti ABBA:
+
+| Measurement | TG |
+| --- | ---: |
+| RTX 5070 Ti solo | **75.80 ± 2.21 tok/s** |
+| RTX 5070 Ti concurrent | **75.24 ± 1.56 tok/s** |
+| RTX 5060 Ti concurrent | **59.98 ± 1.23 tok/s** |
+| Common-wall aggregate | **118.68 ± 2.35 tok/s** |
+
+The raw fast-lane concurrent delta is **-0.74%**, again not a material pacing result.
+
+## Shared expert arena PSS
+
+Shared-arena physical memory remains structurally unchanged:
+
+| Context / resident KV | Shared two-engine PSS |
+| --- | ---: |
+| 32K / 8192 | **52.113 GiB** |
+| 262K / 32768 | **58.038 GiB** |
+
+A matched 0.1.39 private two-engine PSS value was not retained: while the second private ~46.8 GiB expert arena was being populated, systemd-oomd killed the DevSpace cgroup under host memory pressure. Do not substitute the 0.1.38 private number as a 0.1.39 measurement.
+
+## Layer-split challenger correction
+
+The first 0.1.39 three-request layer-split probe used the ordinary FIFO server path and therefore measured only a serial control:
+
+- one warm request: **120.62 ± 1.24 tok/s**
+- three simultaneous requests, FIFO common-wall aggregate: **118.75 ± 5.98 tok/s**
+- short cold PP control: **1047.45 ± 3.20 tok/s**
+
+That FIFO three-request number is **not** the 0.1.39 layer-split concurrency ceiling. Upstream 0.1.39 adds opt-in engine batch slots and layer-split pipeline groups.
+
+### Batch-only control
+
+Three-GPU layer split with `--batch 3` and the shared expert arena, but without pipeline groups, measured:
+
+**132.46 ± 3.61 tok/s** common-wall aggregate TG.
+
+A private-arena repeat measured 133.33 ± 3.41 tok/s, so the shared backing itself did not materially move this TG result.
+
+### Pipelined layer split
+
+The strongest measured challenger used:
+
+```text
+GPU order             0,2,1
+explicit split        18,34
+stages                0-17 / 18-33 / 34-47
+--batch               3
+--batch-groups        3
+--trim-stage-weights
+--shared-expert-arena enabled
+```
+
+The engine log confirmed `strata batch (pipelined, 3 groups of 1)`. Three fixed 512-token reasoning requests measured:
+
+**209.66 ± 4.02 tok/s** common-wall aggregate TG.
+
+Against the matched 0.1.39 independent-lane result of **192.16 ± 4.11 tok/s**, the pipelined layer-split challenger is **9.1% higher** in this fixed three-request decode region. This supersedes any interpretation that the FIFO control represented the best 0.1.39 layer-split concurrency path.
+
+The gain is coupled to pipeline execution and stage trimming: `--batch 3` without groups/trim reaches only **132.46 tok/s**, while the pipelined arm reaches **209.66 tok/s**.
+
+## Cold-prefill crossover
+
+To test prompt processing rather than warmed prefix reuse, every retained request used a unique nonce and reported `cache_n=0`. Three cold prompts were submitted simultaneously. The common-wall PP metric is total newly processed prompt tokens divided by the time until all three requests completed their one-token response.
+
+| Cold prompt regime | Independent lanes 1+1+1 | Pipelined layer split | Relative result |
+| --- | ---: | ---: | --- |
+| ~15K x3 | **5901.34 ± 55.16 tok/s** | 3289.19 ± 18.83 tok/s | **Lanes +79.4%** |
+| ~110K x3 | 5822.71 ± 4.49 tok/s | **6028.09 ± 14.50 tok/s** | **Layer split +3.5%** |
+
+The ~15K layer-split requests finish in a near-serial admission staircase (~4.6 s, ~9.1 s, ~13.7 s), even though each individual prompt runs at roughly 3.3K PP. Independent lanes instead prefill all three prompts concurrently.
+
+At ~110K, the layer-split intra-prompt chunk pipeline is fully utilized: each prompt processes at roughly 6.08-6.12K PP and the three-request common wall is ~54.7 s. That is enough to slightly exceed the independent-lane common-wall aggregate despite serial request admission.
+
+The 15K and 110K A/Bs are cold/no-reuse and workload/length matched, but the per-arm nonce text is not byte-identical (the harness encoded the arm name in the nonce). The crossover is large enough to be operationally interesting, but exact percentage claims should retain this caveat.
+
+## Architecture interpretation
+
+Strata 0.1.39 changes the static challenger landscape:
+
+- independent lanes remain strongly favored for multiple medium-length cold prompts and preserve separate failure/session domains;
+- upstream pipelined layer split can beat independent lanes for matched three-request decode on this host;
+- sufficiently long prompts can also cross over in favor of one pipelined layer-split engine because intra-prompt chunk pipelining becomes highly efficient;
+- the ordinary FIFO layer-split result is only a control and must not be used as the 0.1.39 concurrency ceiling.
+
+This does **not** by itself promote a Super-Lane or replace the production independent-lane topology. Real serving mixes include unequal prompt/output lengths, session affinity, queueing, failures and topology reconfiguration costs. The correct next architecture question is workload-aware topology selection, not a universal winner claim.

From 1a454ca80d698af863693c1b2d3fafac0b3b1ceb Mon Sep 17 00:00:00 2001
From: Go <rhgo1749@naver.com>
Date: Mon, 5 Oct 2026 12:35:36 +0900
Subject: [PATCH 201/201] docs: add M2 layer-split crossover evidence

---
 docs/DECISIONS.md                             |   2 +-
 docs/multigpu-roadmap.md                      |   2 +-
 docs/multigpu-shared-runtime.md               |   2 +-
 ...a-0.1.39-performance-crossover-20261005.md | 154 +++---------------
 4 files changed, 27 insertions(+), 133 deletions(-)

diff --git a/docs/DECISIONS.md b/docs/DECISIONS.md
index f80adc07e5c..d0e7e71fe48 100644
--- a/docs/DECISIONS.md
+++ b/docs/DECISIONS.md
@@ -81,7 +81,7 @@ Concrete reference-host hardware, tuning values, benchmark numbers, and producti
 
 The production baseline remains independent GPU lanes with a shared host expert arena. The current promoted engine generation is **Strata 0.1.38**, integrated from upstream `99f3dbd0b21d1401b3769e0c0d963913607f380b`. The next sync candidate is **Strata 0.1.39**, merged on `sync/upstream-0.1.39` at `3727c6bdfb12ba2ffc07402b68ae86c0ed2ac27f` from upstream `6f32ec070f23ced9f50e704d854d775da52591ab`; it is validated but not promoted until main moves. The candidate preserves the Phase 1/2 serving-control contract and the Phase 3 leader/follower shared-arena lifecycle while consuming upstream 0.1.39 batching, Responses API, conversation-cache telemetry, decode/kernel, CPU-pool, expert-cache and low-RAM/file-tier work. Ordinary lanes explicitly strip inherited engine-internal multi-GPU flags plus `parallel` / `--batch` / `--slots` / `--batch-groups` / `--trim-stage-weights`, and shared `--expert-profile-save` writers, so only future explicit contracts can re-enable nested execution. The 0.1.39 bounded gate passed the full Python serving suite (**333 tests, 7 skipped**), fresh CUDA 13.4 sm_120 Release builds with tests both off and on, focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests, a live single-lane model smoke, and a live three-lane shared-arena concurrent-generation smoke; follower lanes logged that the shared population was ready and skipped the repeated source expert load. The earlier 0.1.38 matched long-prompt compatibility A/B against the installed 0.1.31 binary remains historical evidence at roughly +9.5% for ~15K tokens and +7.3% for ~30K tokens; it is not relabeled as 0.1.39 performance evidence. Upstream layer-split/peer/batch execution remains complementary to the fork's independent request/session lanes. Hardware-specific measurements and caveats live in the public recipe repository.
 
-The 2026-10-05 reference-host performance recheck changes one challenger conclusion without changing the promoted topology. On the 0.1.39 candidate, three independent lanes measured **192.16 ± 4.11 tok/s** common-wall aggregate TG for three fixed 512-token reasoning requests. The ordinary layer-split FIFO path is only a serial control (**118.75 ± 5.98 tok/s**), while upstream 0.1.39's explicit three-stage pipeline (`--layer-split 18,34 --batch 3 --batch-groups 3 --trim-stage-weights`, shared expert arena) reached **209.66 ± 4.02 tok/s**, **9.1% above** the independent-lane arm in that fixed decode region. Cold-prefill A/Bs show a workload-length crossover rather than a universal winner: at ~15K x3, independent lanes reached **5901.34 ± 55.16 tok/s** versus **3289.19 ± 18.83** for the pipelined split; at ~110K x3, the pipelined split reached **6028.09 ± 14.50** versus **5822.71 ± 4.49** for lanes. Every retained PP request reported `cache_n=0`. The medium/long PP nonce text is contract-matched rather than byte-identical across arms. This evidence reopens static layer-split/Super-Lane work as a measured workload-dependent challenger, but does not promote it over independent lanes or justify automatic topology changes. See `docs/strata-0.1.39-performance-crossover-20261005.md`.
+The 2026-10-05 reference-host topology recheck changes one challenger conclusion without changing the promoted topology. The fixed upstream-native three-GPU layer-split pipeline (`--layer-split 18,34 --batch 3 --batch-groups 3 --trim-stage-weights`, shared expert arena) measured **147.84 ± 2.26 tok/s** at M=2 versus **143.19 ± 3.06** for two independent lanes (**+3.25%**) and **209.66 ± 4.02 tok/s** at M=3 versus **192.16 ± 4.11** for three lanes (**+9.11%**). The retained same-binary single-request layer-split control is **120.62 ± 1.24 tok/s** versus **73.63 ± 1.67** for one lane, but M=1 was not rerun under the exact batch3/groups3/trim config. Cold-prefill still crosses by workload length: ~15K x3 strongly favors lanes (**5901.34 vs 3289.19 tok/s**), while ~110K x3 narrowly favors layer split (**6028.09 vs 5822.71 tok/s**). Every retained PP request reported `cache_n=0`; the nonce text is workload/length matched rather than byte-identical across topology arms. The ordinary FIFO path is now treated only as a serial control. This evidence reopens static layer split / Super-Lane as a serious topology candidate but does not by itself change the production default. See `docs/strata-0.1.39-performance-crossover-20261005.md`.
 
 ## Template for a decision-bearing Issue
 
diff --git a/docs/multigpu-roadmap.md b/docs/multigpu-roadmap.md
index fc099ea6242..5916ccb4653 100644
--- a/docs/multigpu-roadmap.md
+++ b/docs/multigpu-roadmap.md
@@ -156,7 +156,7 @@ Measure the crossover rather than assuming aggregation wins: single-request TTFT
 
 Do **not** begin with dynamic GPU bonding. Reopen bond/unbond policy only if the static `1+1+1` versus `2+1` experiment demonstrates a repeatable workload-dependent crossover large enough to justify topology changes. Any dynamic version must retain a clean independent-lane fallback and must not migrate an active session merely to rebalance GPUs.
 
-**Current status on the Strata 0.1.39 sync candidate / reference host: reopened, with a measured workload-dependent crossover; not promoted as an always-on topology.** Upstream 0.1.39 materially changed the challenger by adding batch slots, layer-split pipeline groups, and stage-weight trimming. The ordinary FIFO layer-split path remains only a serial control (**118.75 ± 5.98 tok/s** for three fixed requests), but an explicit three-stage `18,34` split with `--batch 3 --batch-groups 3 --trim-stage-weights` and the shared expert arena reached **209.66 ± 4.02 tok/s**, versus **192.16 ± 4.11 tok/s** for `1+1+1` independent lanes in the matched fixed decode region. Cold-prefill results cross by length: ~15K x3 strongly favors lanes (**5901.34 vs 3289.19 tok/s**), while ~110K x3 narrowly favors the pipelined split (**6028.09 vs 5822.71 tok/s**). The PP arms are cold/no-reuse (`cache_n=0`) but workload/length matched rather than byte-identical because the nonce text encodes the arm. This reopens static Super-Lane/topology work, but the correct next gate is mixed prompt/output lengths, queue/tail behavior, failure-domain cost and reconfiguration overhead—not automatic bonding. Full evidence: [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
+**Current status on the Strata 0.1.39 sync candidate / reference host: reopened as a serious default-topology challenger; not yet promoted.** Upstream 0.1.39 materially changed the layer-split server through batch slots, pipeline groups and stage-weight trimming. The fixed three-GPU `18,34` pipeline with `--batch 3 --batch-groups 3 --trim-stage-weights` and the shared expert arena now beats independent lanes in the measured fixed decode region at both M=2 (**147.84 ± 2.26 vs 143.19 ± 3.06 tok/s, +3.25%**) and M=3 (**209.66 ± 4.02 vs 192.16 ± 4.11, +9.11%**). The retained M=1 layer-split control is also much faster than one lane, although that point was not rerun with the exact pipeline config. Cold-prefill is the important counterexample: ~15K x3 strongly favors lanes (**5901.34 vs 3289.19 tok/s**), while ~110K x3 narrowly favors the pipelined split (**6028.09 vs 5822.71 tok/s**). The next gate is therefore no longer more fixed microbenchmarks; it is mixed prompt/output lengths, session behavior, queue/tail latency, power, failure isolation and operational flexibility under the always-on three-GPU layer-split topology. Full evidence: [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
 
 ### Elastic Super-Lane lifecycle
 
diff --git a/docs/multigpu-shared-runtime.md b/docs/multigpu-shared-runtime.md
index cdde3f2e129..e77acc66913 100644
--- a/docs/multigpu-shared-runtime.md
+++ b/docs/multigpu-shared-runtime.md
@@ -86,7 +86,7 @@ The supervisor also treats `/v1/responses` as generation work so the OpenAI Resp
 
 The bounded 0.1.39 compatibility gate passed **333 Python serving tests with 7 skipped**, a fresh **CUDA 13.4 sm_120 Release `strata` build** with `STRATA_BUILD_TESTS=OFF`, a second fresh Release build with `STRATA_BUILD_TESTS=ON` that linked the full `strata` executable, and focused `pinned_shared_test`, `expert_profile_save_test`, and `file_expert_source_test` CTests. A live IQ3_XXS single-lane smoke generated successfully on GPU 0. A live three-lane 32K compatibility smoke then routed three simultaneous requests one each to GPUs 0/1/2; lane 0 populated the ~39.97 GiB shared expert arena once, while lanes 1 and 2 reported `shared population ready; source load skipped`. These are promotion/compatibility checks, not a new performance campaign.
 
-A later bounded reference-host performance campaign did exercise the 0.1.39 execution challengers explicitly. Ordinary lanes still strip nested batch/layer-split flags by default, but a separate upstream-native three-GPU layer-split challenger using explicit split `18,34`, `--batch 3 --batch-groups 3 --trim-stage-weights`, and the same shared expert backing measured **209.66 ± 4.02 tok/s** common-wall aggregate TG for three fixed 512-token reasoning requests, versus **192.16 ± 4.11 tok/s** for three independent lanes. Cold-prefill results crossed by workload length: lanes led strongly at ~15K x3 (**5901.34 vs 3289.19 tok/s**), while the pipelined split narrowly led at ~110K x3 (**6028.09 vs 5822.71 tok/s**). This is challenger evidence, not a change to the ordinary lane contract; details and caveats are in [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
+A later bounded reference-host topology campaign exercised the 0.1.39 execution challenger explicitly. Ordinary lanes still strip nested batch/layer-split flags by default, but a separate upstream-native three-GPU layer-split server using explicit split `18,34`, `--batch 3 --batch-groups 3 --trim-stage-weights`, and the same shared expert backing measured **147.84 ± 2.26 tok/s** at M=2 versus **143.19 ± 3.06** for two lanes and **209.66 ± 4.02 tok/s** at M=3 versus **192.16 ± 4.11** for three lanes. Cold-prefill crosses by length: lanes lead at ~15K x3 (**5901.34 vs 3289.19 tok/s**), while the pipelined split narrowly leads at ~110K x3 (**6028.09 vs 5822.71 tok/s**). This is challenger evidence, not a change to the ordinary lane contract; details and caveats are in [`strata-0.1.39-performance-crossover-20261005.md`](strata-0.1.39-performance-crossover-20261005.md).
 
 ## Current promoted engine baseline
 
diff --git a/docs/strata-0.1.39-performance-crossover-20261005.md b/docs/strata-0.1.39-performance-crossover-20261005.md
index 964e9a95d42..c82b6c59a8c 100644
--- a/docs/strata-0.1.39-performance-crossover-20261005.md
+++ b/docs/strata-0.1.39-performance-crossover-20261005.md
@@ -1,150 +1,44 @@
-# Strata 0.1.39 performance crossover evidence — 2026-10-05
+# Strata 0.1.39 topology crossover evidence — 2026-10-05
 
-## Scope and provenance
+## Status
 
-This record belongs to the validated but not-yet-promoted Strata 0.1.39 sync candidate on `sync/upstream-0.1.39`.
+This record belongs to the validated but not-yet-promoted Strata 0.1.39 sync candidate. It records only the measurements needed for the current topology decision; concrete raw evidence and supporting controls live in the public recipe repository.
 
-```text
-fork branch         sync/upstream-0.1.39
-fork candidate      d51d7e9cbc327f90c2fd59b1e20a949033f594e2
-upstream Strata     6f32ec070f23ced9f50e704d854d775da52591ab (v0.1.39)
-engine              Strata 0.1.39
-model/quant         Qwen3.8-Flash-Next GSQ-RCO IQ3_S
-host                Ryzen 9 9950X3D / 128 GB DDR5
-primary GPUs        RTX 5070 Ti 16 GB x3
-driver/CUDA         615.71.09 / CUDA 13.4
-context             262144 per independent lane unless noted
-resident KV         32768 per independent lane unless noted
-sampling            temperature=0, seed=1234
-```
+Measured source: `d51d7e9cbc327f90c2fd59b1e20a949033f594e2` on `sync/upstream-0.1.39`, upstream Strata `6f32ec070f23ced9f50e704d854d775da52591ab` (v0.1.39).
 
-The 0.1.39 campaign reused the public recipe workload generator and current server/frontend. The fixed ~1.5K reasoning prompt used for scaling and decode has hash `429fe691f25560a1` and currently tokenizes to 1469 tokens. The retained 0.1.38 recipe recorded 1456 tokens for its earlier frontend path, so cross-version percentage comparisons are contract-matched rather than byte-identical. Within the 0.1.39 fixed-prompt TG challenger comparison, the independent-lane and layer-split arms use the same 1469-token prompt contract.
+## Decode concurrency
 
-## Independent-lane scaling
+The strongest measured three-GPU upstream-native challenger uses explicit split `18,34`, `--batch 3 --batch-groups 3 --trim-stage-weights`, and the shared expert arena.
 
-Five retained repetitions per point:
+| Concurrent requests | Independent lanes | Three-GPU layer split | Result |
+| ---: | ---: | ---: | --- |
+| 1 | 73.63 ± 1.67 tok/s | **120.62 ± 1.24 tok/s**¹ | layer split +63.8% |
+| 2 | 143.19 ± 3.06 tok/s | **147.84 ± 2.26 tok/s** | layer split +3.25% |
+| 3 | 192.16 ± 4.11 tok/s | **209.66 ± 4.02 tok/s** | layer split +9.11% |
 
-| Active lanes | Common-wall aggregate TG |
-| ---: | ---: |
-| 1 | **73.63 ± 1.67 tok/s** |
-| 2 | **143.19 ± 3.06 tok/s** |
-| 3 | **192.16 ± 4.11 tok/s** |
+¹ M=1 is the retained same-binary three-GPU layer-split single-request control. The exact batch3/groups3/trim config was not rerun at M=1. M=2 and M=3 are exact measurements of the fixed pipelined config.
 
-The 3-lane result is 2.610x the one-lane result (87.0% scaling efficiency). Corrected mixed fiction/coding/reasoning serving measured **189.25 ± 5.07 tok/s** over nine retained runs.
+The M=2 engine remained in `strata batch (pipelined, 3 groups of 1)`; with only two active requests one group is unused. Both requests completed together at roughly 6.9 s mean E2E, not as a FIFO staircase.
 
-## Workload sensitivity
-
-Cold PP remained essentially flat versus the 0.1.38 campaign for the ~15K medium workloads, while warm decode generally improved. Retained 0.1.39 values include:
-
-| Workload | Cold PP | Warm TG |
-| --- | ---: | ---: |
-| fiction short | 878.6 tok/s | 72.28 tok/s |
-| coding short | 840.6 tok/s | 85.70 tok/s |
-| reasoning short | 872.2 tok/s | 79.24 tok/s |
-| fiction medium | 2799.1 tok/s | 69.22 tok/s |
-| coding medium | 2791.5 tok/s | 83.84 tok/s |
-| reasoning medium | 2803.4 tok/s | 70.48 tok/s |
-| long_review ~110K | 2719.0 tok/s | 66.20 tok/s |
-
-The long-review cold PP mean is **2719.02 ± 1.12 tok/s**. Warm decode at ~110K is slightly below the retained 0.1.38 mean, so this campaign does not claim a universal decode speedup.
-
-## Oversubscription
-
-| Requests | Aggregate TG |
-| ---: | ---: |
-| 3 | **190.26 ± 3.07 tok/s** |
-| 4 | **141.55 ± 0.90 tok/s** |
-| 6 | **191.06 ± 2.67 tok/s** |
-| 9 | **191.86 ± 1.52 tok/s** |
-
-The partial-second-wave M=4 trough remains. Queue-tail behavior still follows the multi-wave structure rather than turning into an unlimited continuous-batching claim for ordinary lanes.
-
-## Heterogeneous isolation
-
-Retained RTX 5070 Ti + RTX 5060 Ti ABBA:
-
-| Measurement | TG |
-| --- | ---: |
-| RTX 5070 Ti solo | **75.80 ± 2.21 tok/s** |
-| RTX 5070 Ti concurrent | **75.24 ± 1.56 tok/s** |
-| RTX 5060 Ti concurrent | **59.98 ± 1.23 tok/s** |
-| Common-wall aggregate | **118.68 ± 2.35 tok/s** |
-
-The raw fast-lane concurrent delta is **-0.74%**, again not a material pacing result.
-
-## Shared expert arena PSS
-
-Shared-arena physical memory remains structurally unchanged:
-
-| Context / resident KV | Shared two-engine PSS |
-| --- | ---: |
-| 32K / 8192 | **52.113 GiB** |
-| 262K / 32768 | **58.038 GiB** |
-
-A matched 0.1.39 private two-engine PSS value was not retained: while the second private ~46.8 GiB expert arena was being populated, systemd-oomd killed the DevSpace cgroup under host memory pressure. Do not substitute the 0.1.38 private number as a 0.1.39 measurement.
-
-## Layer-split challenger correction
-
-The first 0.1.39 three-request layer-split probe used the ordinary FIFO server path and therefore measured only a serial control:
-
-- one warm request: **120.62 ± 1.24 tok/s**
-- three simultaneous requests, FIFO common-wall aggregate: **118.75 ± 5.98 tok/s**
-- short cold PP control: **1047.45 ± 3.20 tok/s**
-
-That FIFO three-request number is **not** the 0.1.39 layer-split concurrency ceiling. Upstream 0.1.39 adds opt-in engine batch slots and layer-split pipeline groups.
-
-### Batch-only control
-
-Three-GPU layer split with `--batch 3` and the shared expert arena, but without pipeline groups, measured:
-
-**132.46 ± 3.61 tok/s** common-wall aggregate TG.
-
-A private-arena repeat measured 133.33 ± 3.41 tok/s, so the shared backing itself did not materially move this TG result.
-
-### Pipelined layer split
-
-The strongest measured challenger used:
-
-```text
-GPU order             0,2,1
-explicit split        18,34
-stages                0-17 / 18-33 / 34-47
---batch               3
---batch-groups        3
---trim-stage-weights
---shared-expert-arena enabled
-```
-
-The engine log confirmed `strata batch (pipelined, 3 groups of 1)`. Three fixed 512-token reasoning requests measured:
-
-**209.66 ± 4.02 tok/s** common-wall aggregate TG.
-
-Against the matched 0.1.39 independent-lane result of **192.16 ± 4.11 tok/s**, the pipelined layer-split challenger is **9.1% higher** in this fixed three-request decode region. This supersedes any interpretation that the FIFO control represented the best 0.1.39 layer-split concurrency path.
-
-The gain is coupled to pipeline execution and stage trimming: `--batch 3` without groups/trim reaches only **132.46 tok/s**, while the pipelined arm reaches **209.66 tok/s**.
+The old three-request FIFO result is therefore only a serial control, not the 0.1.39 layer-split concurrency ceiling.
 
 ## Cold-prefill crossover
 
-To test prompt processing rather than warmed prefix reuse, every retained request used a unique nonce and reported `cache_n=0`. Three cold prompts were submitted simultaneously. The common-wall PP metric is total newly processed prompt tokens divided by the time until all three requests completed their one-token response.
+Three cold prompts were submitted simultaneously and every retained request reported `cache_n=0`.
 
-| Cold prompt regime | Independent lanes 1+1+1 | Pipelined layer split | Relative result |
+| Prompt regime | Independent lanes | Pipelined layer split | Result |
 | --- | ---: | ---: | --- |
-| ~15K x3 | **5901.34 ± 55.16 tok/s** | 3289.19 ± 18.83 tok/s | **Lanes +79.4%** |
-| ~110K x3 | 5822.71 ± 4.49 tok/s | **6028.09 ± 14.50 tok/s** | **Layer split +3.5%** |
-
-The ~15K layer-split requests finish in a near-serial admission staircase (~4.6 s, ~9.1 s, ~13.7 s), even though each individual prompt runs at roughly 3.3K PP. Independent lanes instead prefill all three prompts concurrently.
+| ~15K x3 | **5901.34 ± 55.16 tok/s** | 3289.19 ± 18.83 | lanes +79.4% |
+| ~110K x3 | 5822.71 ± 4.49 | **6028.09 ± 14.50** | layer split +3.5% |
 
-At ~110K, the layer-split intra-prompt chunk pipeline is fully utilized: each prompt processes at roughly 6.08-6.12K PP and the three-request common wall is ~54.7 s. That is enough to slightly exceed the independent-lane common-wall aggregate despite serial request admission.
+The ~15K region favors independent request-level prefill. At ~110K the intra-prompt chunk pipeline is saturated enough to cross back slightly in favor of layer split.
 
-The 15K and 110K A/Bs are cold/no-reuse and workload/length matched, but the per-arm nonce text is not byte-identical (the harness encoded the arm name in the nonce). The crossover is large enough to be operationally interesting, but exact percentage claims should retain this caveat.
+The 15K/110K arms are workload/length matched but not byte-identical because the unique nonce encoded the topology arm.
 
-## Architecture interpretation
+## Decision impact
 
-Strata 0.1.39 changes the static challenger landscape:
+The 0.1.39 evidence no longer supports treating independent lanes as the general performance winner for concurrent decode. The fixed three-GPU layer-split server is ahead in the measured M=2 and M=3 decode regions, while medium multi-cold-prefill remains a large independent-lane advantage and very-long cold prefill crosses back toward layer split.
 
-- independent lanes remain strongly favored for multiple medium-length cold prompts and preserve separate failure/session domains;
-- upstream pipelined layer split can beat independent lanes for matched three-request decode on this host;
-- sufficiently long prompts can also cross over in favor of one pipelined layer-split engine because intra-prompt chunk pipelining becomes highly efficient;
-- the ordinary FIFO layer-split result is only a control and must not be used as the 0.1.39 concurrency ceiling.
+This reopens static layer split / Super-Lane as a serious production-topology candidate, but it does not yet change the default contract. Remaining promotion gates are workload mix, unequal prompt/output lengths, session behavior, queue/tail latency, failure isolation, power, and operational flexibility.
 
-This does **not** by itself promote a Super-Lane or replace the production independent-lane topology. Real serving mixes include unequal prompt/output lengths, session affinity, queueing, failures and topology reconfiguration costs. The correct next architecture question is workload-aware topology selection, not a universal winner claim.
+Public recipe record: https://github.com/rhgo1749/qwen3.8-flash-next-strata-gpu-per-lane-recipe/blob/main/docs/strata-0.1.39-performance-crossover-20261005.md